From 90ca4f5489b00d4e89e955261b280d6835c706c0 Mon Sep 17 00:00:00 2001 From: Federica Di Lauro Date: Fri, 6 Dec 2019 15:35:12 +0100 Subject: [PATCH] receive and trasmit work together --- uart_test/Core/Src/main.c | 21 +- uart_test/Debug/uart_test.list | 5832 ++++++++++++++++---------------- 2 files changed, 2955 insertions(+), 2898 deletions(-) diff --git a/uart_test/Core/Src/main.c b/uart_test/Core/Src/main.c index 03a5cde..bd3092f 100644 --- a/uart_test/Core/Src/main.c +++ b/uart_test/Core/Src/main.c @@ -65,8 +65,8 @@ static void MX_TIM3_Init(void); // COMMUNICATION STUFF -uint8_t *out_buffer; -uint8_t *in_buffer; +uint8_t *tx_buffer; +uint8_t *rx_buffer; odometry_msg odom_msg; velocity_msg vel_msg; @@ -111,12 +111,12 @@ int main(void) odom_msg.linear_velocity = 1.5; odom_msg.delta_time = 2.6; - out_buffer = (uint8_t *) &odom_msg; - in_buffer = (uint8_t*) &vel_msg; + tx_buffer = (uint8_t *) &odom_msg; + rx_buffer = (uint8_t*) &vel_msg; + HAL_UART_Receive_IT(&huart6, rx_buffer, 8); -// HAL_TIM_Base_Start_IT(&htim3); - HAL_UART_Receive_IT(&huart6, in_buffer, 8); + HAL_TIM_Base_Start_IT(&htim3); /* USER CODE END 2 */ @@ -124,10 +124,6 @@ int main(void) /* USER CODE BEGIN WHILE */ while (1) { -// HAL_UART_Transmit(&huart6, out_buffer, 12, 100); - -// HAL_Delay(100); - /* USER CODE END WHILE */ /* USER CODE BEGIN 3 */ @@ -277,13 +273,12 @@ static void MX_GPIO_Init(void) /* USER CODE BEGIN 4 */ void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) { if (htim->Instance == TIM3) { - HAL_UART_Transmit(&huart6, out_buffer, 12, 100); + HAL_UART_Transmit(&huart6, tx_buffer, 12, 100); } } void HAL_UART_RxCpltCallback(UART_HandleTypeDef *UartHandle) { - test++; - HAL_UART_Receive_IT(&huart6, in_buffer, 8); + HAL_UART_Receive_IT(&huart6, rx_buffer, 8); } void HAL_UART_ErrorCallback(UART_HandleTypeDef *UartHandle){ diff --git a/uart_test/Debug/uart_test.list b/uart_test/Debug/uart_test.list index 2c7883b..7658bb4 100644 --- a/uart_test/Debug/uart_test.list +++ b/uart_test/Debug/uart_test.list @@ -5,25 +5,25 @@ Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 000001f8 08000000 08000000 00010000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA - 1 .text 0000373c 080001f8 080001f8 000101f8 2**2 + 1 .text 00003794 080001f8 080001f8 000101f8 2**2 CONTENTS, ALLOC, LOAD, READONLY, CODE - 2 .rodata 00000018 08003934 08003934 00013934 2**2 + 2 .rodata 00000018 0800398c 0800398c 0001398c 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 3 .ARM.extab 00000000 0800394c 0800394c 0002000c 2**0 + 3 .ARM.extab 00000000 080039a4 080039a4 0002000c 2**0 CONTENTS - 4 .ARM 00000008 0800394c 0800394c 0001394c 2**2 + 4 .ARM 00000008 080039a4 080039a4 000139a4 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 5 .preinit_array 00000000 08003954 08003954 0002000c 2**0 + 5 .preinit_array 00000000 080039ac 080039ac 0002000c 2**0 CONTENTS, ALLOC, LOAD, DATA - 6 .init_array 00000004 08003954 08003954 00013954 2**2 + 6 .init_array 00000004 080039ac 080039ac 000139ac 2**2 CONTENTS, ALLOC, LOAD, DATA - 7 .fini_array 00000004 08003958 08003958 00013958 2**2 + 7 .fini_array 00000004 080039b0 080039b0 000139b0 2**2 CONTENTS, ALLOC, LOAD, DATA - 8 .data 0000000c 20000000 0800395c 00020000 2**2 + 8 .data 0000000c 20000000 080039b4 00020000 2**2 CONTENTS, ALLOC, LOAD, DATA - 9 .bss 00000108 2000000c 08003968 0002000c 2**2 + 9 .bss 00000104 2000000c 080039c0 0002000c 2**2 ALLOC - 10 ._user_heap_stack 00000604 20000114 08003968 00020114 2**0 + 10 ._user_heap_stack 00000600 20000110 080039c0 00020110 2**0 ALLOC 11 .ARM.attributes 0000002e 00000000 00000000 0002000c 2**0 CONTENTS, READONLY @@ -39,11 +39,11 @@ Idx Name Size VMA LMA File off Algn CONTENTS, READONLY, DEBUGGING 17 .debug_line 00008f01 00000000 00000000 00055176 2**0 CONTENTS, READONLY, DEBUGGING - 18 .debug_str 000f0c83 00000000 00000000 0005e077 2**0 + 18 .debug_str 000f0c82 00000000 00000000 0005e077 2**0 CONTENTS, READONLY, DEBUGGING - 19 .comment 0000007b 00000000 00000000 0014ecfa 2**0 + 19 .comment 0000007b 00000000 00000000 0014ecf9 2**0 CONTENTS, READONLY - 20 .debug_frame 00003400 00000000 00000000 0014ed78 2**2 + 20 .debug_frame 00003400 00000000 00000000 0014ed74 2**2 CONTENTS, READONLY, DEBUGGING Disassembly of section .text: @@ -62,7 +62,7 @@ Disassembly of section .text: 800020e: bd10 pop {r4, pc} 8000210: 2000000c .word 0x2000000c 8000214: 00000000 .word 0x00000000 - 8000218: 0800391c .word 0x0800391c + 8000218: 08003974 .word 0x08003974 0800021c : 800021c: b508 push {r3, lr} @@ -74,7 +74,7 @@ Disassembly of section .text: 800022a: bd08 pop {r3, pc} 800022c: 00000000 .word 0x00000000 8000230: 20000010 .word 0x20000010 - 8000234: 0800391c .word 0x0800391c + 8000234: 08003974 .word 0x08003974 08000238 <__aeabi_uldivmod>: 8000238: b953 cbnz r3, 8000250 <__aeabi_uldivmod+0x18> @@ -375,491 +375,489 @@ int main(void) /* Configure the system clock */ SystemClock_Config(); - 8000540: f000 f82c bl 800059c + 8000540: f000 f832 bl 80005a8 /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); - 8000544: f000 f924 bl 8000790 + 8000544: f000 f92a bl 800079c MX_USART6_UART_Init(); - 8000548: f000 f8f0 bl 800072c + 8000548: f000 f8f6 bl 8000738 MX_TIM3_Init(); - 800054c: f000 f8a0 bl 8000690 + 800054c: f000 f8a6 bl 800069c /* USER CODE BEGIN 2 */ odom_msg.angular_velocity = 0.2; - 8000550: 4b0b ldr r3, [pc, #44] ; (8000580 ) - 8000552: 4a0c ldr r2, [pc, #48] ; (8000584 ) + 8000550: 4b0d ldr r3, [pc, #52] ; (8000588 ) + 8000552: 4a0e ldr r2, [pc, #56] ; (800058c ) 8000554: 601a str r2, [r3, #0] odom_msg.linear_velocity = 1.5; - 8000556: 4b0a ldr r3, [pc, #40] ; (8000580 ) + 8000556: 4b0c ldr r3, [pc, #48] ; (8000588 ) 8000558: f04f 527f mov.w r2, #1069547520 ; 0x3fc00000 800055c: 605a str r2, [r3, #4] odom_msg.delta_time = 2.6; - 800055e: 4b08 ldr r3, [pc, #32] ; (8000580 ) - 8000560: 4a09 ldr r2, [pc, #36] ; (8000588 ) + 800055e: 4b0a ldr r3, [pc, #40] ; (8000588 ) + 8000560: 4a0b ldr r2, [pc, #44] ; (8000590 ) 8000562: 609a str r2, [r3, #8] - out_buffer = (uint8_t *) &odom_msg; - 8000564: 4b09 ldr r3, [pc, #36] ; (800058c ) - 8000566: 4a06 ldr r2, [pc, #24] ; (8000580 ) + tx_buffer = (uint8_t *) &odom_msg; + 8000564: 4b0b ldr r3, [pc, #44] ; (8000594 ) + 8000566: 4a08 ldr r2, [pc, #32] ; (8000588 ) 8000568: 601a str r2, [r3, #0] - in_buffer = (uint8_t*) &vel_msg; - 800056a: 4b09 ldr r3, [pc, #36] ; (8000590 ) - 800056c: 4a09 ldr r2, [pc, #36] ; (8000594 ) + rx_buffer = (uint8_t*) &vel_msg; + 800056a: 4b0b ldr r3, [pc, #44] ; (8000598 ) + 800056c: 4a0b ldr r2, [pc, #44] ; (800059c ) 800056e: 601a str r2, [r3, #0] - -// HAL_TIM_Base_Start_IT(&htim3); - HAL_UART_Receive_IT(&huart6, in_buffer, 8); - 8000570: 4b07 ldr r3, [pc, #28] ; (8000590 ) + HAL_UART_Receive_IT(&huart6, rx_buffer, 8); + 8000570: 4b09 ldr r3, [pc, #36] ; (8000598 ) 8000572: 681b ldr r3, [r3, #0] 8000574: 2208 movs r2, #8 8000576: 4619 mov r1, r3 - 8000578: 4807 ldr r0, [pc, #28] ; (8000598 ) - 800057a: f002 fb29 bl 8002bd0 + 8000578: 4809 ldr r0, [pc, #36] ; (80005a0 ) + 800057a: f002 fb55 bl 8002c28 + + HAL_TIM_Base_Start_IT(&htim3); + 800057e: 4809 ldr r0, [pc, #36] ; (80005a4 ) + 8000580: f001 fe92 bl 80022a8 /* USER CODE END 2 */ /* Infinite loop */ /* USER CODE BEGIN WHILE */ while (1) { - 800057e: e7fe b.n 800057e - 8000580: 20000034 .word 0x20000034 - 8000584: 3e4ccccd .word 0x3e4ccccd - 8000588: 40266666 .word 0x40266666 - 800058c: 20000040 .word 0x20000040 - 8000590: 20000044 .word 0x20000044 - 8000594: 2000002c .word 0x2000002c - 8000598: 20000088 .word 0x20000088 - -0800059c : + 8000584: e7fe b.n 8000584 + 8000586: bf00 nop + 8000588: 20000030 .word 0x20000030 + 800058c: 3e4ccccd .word 0x3e4ccccd + 8000590: 40266666 .word 0x40266666 + 8000594: 20000080 .word 0x20000080 + 8000598: 2000007c .word 0x2000007c + 800059c: 20000028 .word 0x20000028 + 80005a0: 20000084 .word 0x20000084 + 80005a4: 2000003c .word 0x2000003c + +080005a8 : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { - 800059c: b580 push {r7, lr} - 800059e: b0b8 sub sp, #224 ; 0xe0 - 80005a0: af00 add r7, sp, #0 + 80005a8: b580 push {r7, lr} + 80005aa: b0b8 sub sp, #224 ; 0xe0 + 80005ac: af00 add r7, sp, #0 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; - 80005a2: f107 03ac add.w r3, r7, #172 ; 0xac - 80005a6: 2234 movs r2, #52 ; 0x34 - 80005a8: 2100 movs r1, #0 - 80005aa: 4618 mov r0, r3 - 80005ac: f003 f9ae bl 800390c + 80005ae: f107 03ac add.w r3, r7, #172 ; 0xac + 80005b2: 2234 movs r2, #52 ; 0x34 + 80005b4: 2100 movs r1, #0 + 80005b6: 4618 mov r0, r3 + 80005b8: f003 f9d4 bl 8003964 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - 80005b0: f107 0398 add.w r3, r7, #152 ; 0x98 - 80005b4: 2200 movs r2, #0 - 80005b6: 601a str r2, [r3, #0] - 80005b8: 605a str r2, [r3, #4] - 80005ba: 609a str r2, [r3, #8] - 80005bc: 60da str r2, [r3, #12] - 80005be: 611a str r2, [r3, #16] + 80005bc: f107 0398 add.w r3, r7, #152 ; 0x98 + 80005c0: 2200 movs r2, #0 + 80005c2: 601a str r2, [r3, #0] + 80005c4: 605a str r2, [r3, #4] + 80005c6: 609a str r2, [r3, #8] + 80005c8: 60da str r2, [r3, #12] + 80005ca: 611a str r2, [r3, #16] RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; - 80005c0: f107 0308 add.w r3, r7, #8 - 80005c4: 2290 movs r2, #144 ; 0x90 - 80005c6: 2100 movs r1, #0 - 80005c8: 4618 mov r0, r3 - 80005ca: f003 f99f bl 800390c + 80005cc: f107 0308 add.w r3, r7, #8 + 80005d0: 2290 movs r2, #144 ; 0x90 + 80005d2: 2100 movs r1, #0 + 80005d4: 4618 mov r0, r3 + 80005d6: f003 f9c5 bl 8003964 /** Configure the main internal regulator output voltage */ __HAL_RCC_PWR_CLK_ENABLE(); - 80005ce: 4b2e ldr r3, [pc, #184] ; (8000688 ) - 80005d0: 6c1b ldr r3, [r3, #64] ; 0x40 - 80005d2: 4a2d ldr r2, [pc, #180] ; (8000688 ) - 80005d4: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 - 80005d8: 6413 str r3, [r2, #64] ; 0x40 - 80005da: 4b2b ldr r3, [pc, #172] ; (8000688 ) + 80005da: 4b2e ldr r3, [pc, #184] ; (8000694 ) 80005dc: 6c1b ldr r3, [r3, #64] ; 0x40 - 80005de: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 - 80005e2: 607b str r3, [r7, #4] - 80005e4: 687b ldr r3, [r7, #4] + 80005de: 4a2d ldr r2, [pc, #180] ; (8000694 ) + 80005e0: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 + 80005e4: 6413 str r3, [r2, #64] ; 0x40 + 80005e6: 4b2b ldr r3, [pc, #172] ; (8000694 ) + 80005e8: 6c1b ldr r3, [r3, #64] ; 0x40 + 80005ea: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 + 80005ee: 607b str r3, [r7, #4] + 80005f0: 687b ldr r3, [r7, #4] __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE3); - 80005e6: 4b29 ldr r3, [pc, #164] ; (800068c ) - 80005e8: 681b ldr r3, [r3, #0] - 80005ea: f423 4340 bic.w r3, r3, #49152 ; 0xc000 - 80005ee: 4a27 ldr r2, [pc, #156] ; (800068c ) - 80005f0: f443 4380 orr.w r3, r3, #16384 ; 0x4000 - 80005f4: 6013 str r3, [r2, #0] - 80005f6: 4b25 ldr r3, [pc, #148] ; (800068c ) - 80005f8: 681b ldr r3, [r3, #0] - 80005fa: f403 4340 and.w r3, r3, #49152 ; 0xc000 - 80005fe: 603b str r3, [r7, #0] - 8000600: 683b ldr r3, [r7, #0] + 80005f2: 4b29 ldr r3, [pc, #164] ; (8000698 ) + 80005f4: 681b ldr r3, [r3, #0] + 80005f6: f423 4340 bic.w r3, r3, #49152 ; 0xc000 + 80005fa: 4a27 ldr r2, [pc, #156] ; (8000698 ) + 80005fc: f443 4380 orr.w r3, r3, #16384 ; 0x4000 + 8000600: 6013 str r3, [r2, #0] + 8000602: 4b25 ldr r3, [pc, #148] ; (8000698 ) + 8000604: 681b ldr r3, [r3, #0] + 8000606: f403 4340 and.w r3, r3, #49152 ; 0xc000 + 800060a: 603b str r3, [r7, #0] + 800060c: 683b ldr r3, [r7, #0] /** Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; - 8000602: 2302 movs r3, #2 - 8000604: f8c7 30ac str.w r3, [r7, #172] ; 0xac + 800060e: 2302 movs r3, #2 + 8000610: f8c7 30ac str.w r3, [r7, #172] ; 0xac RCC_OscInitStruct.HSIState = RCC_HSI_ON; - 8000608: 2301 movs r3, #1 - 800060a: f8c7 30b8 str.w r3, [r7, #184] ; 0xb8 + 8000614: 2301 movs r3, #1 + 8000616: f8c7 30b8 str.w r3, [r7, #184] ; 0xb8 RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; - 800060e: 2310 movs r3, #16 - 8000610: f8c7 30bc str.w r3, [r7, #188] ; 0xbc + 800061a: 2310 movs r3, #16 + 800061c: f8c7 30bc str.w r3, [r7, #188] ; 0xbc RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; - 8000614: 2300 movs r3, #0 - 8000616: f8c7 30c4 str.w r3, [r7, #196] ; 0xc4 + 8000620: 2300 movs r3, #0 + 8000622: f8c7 30c4 str.w r3, [r7, #196] ; 0xc4 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - 800061a: f107 03ac add.w r3, r7, #172 ; 0xac - 800061e: 4618 mov r0, r3 - 8000620: f000 fdb0 bl 8001184 - 8000624: 4603 mov r3, r0 - 8000626: 2b00 cmp r3, #0 - 8000628: d001 beq.n 800062e + 8000626: f107 03ac add.w r3, r7, #172 ; 0xac + 800062a: 4618 mov r0, r3 + 800062c: f000 fdaa bl 8001184 + 8000630: 4603 mov r3, r0 + 8000632: 2b00 cmp r3, #0 + 8000634: d001 beq.n 800063a { Error_Handler(); - 800062a: f000 f913 bl 8000854 + 8000636: f000 f90d bl 8000854 } /** Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK - 800062e: 230f movs r3, #15 - 8000630: f8c7 3098 str.w r3, [r7, #152] ; 0x98 + 800063a: 230f movs r3, #15 + 800063c: f8c7 3098 str.w r3, [r7, #152] ; 0x98 |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI; - 8000634: 2300 movs r3, #0 - 8000636: f8c7 309c str.w r3, [r7, #156] ; 0x9c + 8000640: 2300 movs r3, #0 + 8000642: f8c7 309c str.w r3, [r7, #156] ; 0x9c RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - 800063a: 2300 movs r3, #0 - 800063c: f8c7 30a0 str.w r3, [r7, #160] ; 0xa0 + 8000646: 2300 movs r3, #0 + 8000648: f8c7 30a0 str.w r3, [r7, #160] ; 0xa0 RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; - 8000640: 2300 movs r3, #0 - 8000642: f8c7 30a4 str.w r3, [r7, #164] ; 0xa4 + 800064c: 2300 movs r3, #0 + 800064e: f8c7 30a4 str.w r3, [r7, #164] ; 0xa4 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; - 8000646: 2300 movs r3, #0 - 8000648: f8c7 30a8 str.w r3, [r7, #168] ; 0xa8 + 8000652: 2300 movs r3, #0 + 8000654: f8c7 30a8 str.w r3, [r7, #168] ; 0xa8 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) - 800064c: f107 0398 add.w r3, r7, #152 ; 0x98 - 8000650: 2100 movs r1, #0 - 8000652: 4618 mov r0, r3 - 8000654: f001 f808 bl 8001668 - 8000658: 4603 mov r3, r0 - 800065a: 2b00 cmp r3, #0 - 800065c: d001 beq.n 8000662 + 8000658: f107 0398 add.w r3, r7, #152 ; 0x98 + 800065c: 2100 movs r1, #0 + 800065e: 4618 mov r0, r3 + 8000660: f001 f802 bl 8001668 + 8000664: 4603 mov r3, r0 + 8000666: 2b00 cmp r3, #0 + 8000668: d001 beq.n 800066e { Error_Handler(); - 800065e: f000 f8f9 bl 8000854 + 800066a: f000 f8f3 bl 8000854 } PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART6; - 8000662: f44f 6300 mov.w r3, #2048 ; 0x800 - 8000666: 60bb str r3, [r7, #8] + 800066e: f44f 6300 mov.w r3, #2048 ; 0x800 + 8000672: 60bb str r3, [r7, #8] PeriphClkInitStruct.Usart6ClockSelection = RCC_USART6CLKSOURCE_PCLK2; - 8000668: 2300 movs r3, #0 - 800066a: 663b str r3, [r7, #96] ; 0x60 + 8000674: 2300 movs r3, #0 + 8000676: 663b str r3, [r7, #96] ; 0x60 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) - 800066c: f107 0308 add.w r3, r7, #8 - 8000670: 4618 mov r0, r3 - 8000672: f001 f9c7 bl 8001a04 - 8000676: 4603 mov r3, r0 - 8000678: 2b00 cmp r3, #0 - 800067a: d001 beq.n 8000680 + 8000678: f107 0308 add.w r3, r7, #8 + 800067c: 4618 mov r0, r3 + 800067e: f001 f9c1 bl 8001a04 + 8000682: 4603 mov r3, r0 + 8000684: 2b00 cmp r3, #0 + 8000686: d001 beq.n 800068c { Error_Handler(); - 800067c: f000 f8ea bl 8000854 + 8000688: f000 f8e4 bl 8000854 } } - 8000680: bf00 nop - 8000682: 37e0 adds r7, #224 ; 0xe0 - 8000684: 46bd mov sp, r7 - 8000686: bd80 pop {r7, pc} - 8000688: 40023800 .word 0x40023800 - 800068c: 40007000 .word 0x40007000 - -08000690 : + 800068c: bf00 nop + 800068e: 37e0 adds r7, #224 ; 0xe0 + 8000690: 46bd mov sp, r7 + 8000692: bd80 pop {r7, pc} + 8000694: 40023800 .word 0x40023800 + 8000698: 40007000 .word 0x40007000 + +0800069c : * @brief TIM3 Initialization Function * @param None * @retval None */ static void MX_TIM3_Init(void) { - 8000690: b580 push {r7, lr} - 8000692: b088 sub sp, #32 - 8000694: af00 add r7, sp, #0 + 800069c: b580 push {r7, lr} + 800069e: b088 sub sp, #32 + 80006a0: af00 add r7, sp, #0 /* USER CODE BEGIN TIM3_Init 0 */ /* USER CODE END TIM3_Init 0 */ TIM_ClockConfigTypeDef sClockSourceConfig = {0}; - 8000696: f107 0310 add.w r3, r7, #16 - 800069a: 2200 movs r2, #0 - 800069c: 601a str r2, [r3, #0] - 800069e: 605a str r2, [r3, #4] - 80006a0: 609a str r2, [r3, #8] - 80006a2: 60da str r2, [r3, #12] - TIM_MasterConfigTypeDef sMasterConfig = {0}; - 80006a4: 1d3b adds r3, r7, #4 + 80006a2: f107 0310 add.w r3, r7, #16 80006a6: 2200 movs r2, #0 80006a8: 601a str r2, [r3, #0] 80006aa: 605a str r2, [r3, #4] 80006ac: 609a str r2, [r3, #8] + 80006ae: 60da str r2, [r3, #12] + TIM_MasterConfigTypeDef sMasterConfig = {0}; + 80006b0: 1d3b adds r3, r7, #4 + 80006b2: 2200 movs r2, #0 + 80006b4: 601a str r2, [r3, #0] + 80006b6: 605a str r2, [r3, #4] + 80006b8: 609a str r2, [r3, #8] /* USER CODE BEGIN TIM3_Init 1 */ /* USER CODE END TIM3_Init 1 */ htim3.Instance = TIM3; - 80006ae: 4b1d ldr r3, [pc, #116] ; (8000724 ) - 80006b0: 4a1d ldr r2, [pc, #116] ; (8000728 ) - 80006b2: 601a str r2, [r3, #0] + 80006ba: 4b1d ldr r3, [pc, #116] ; (8000730 ) + 80006bc: 4a1d ldr r2, [pc, #116] ; (8000734 ) + 80006be: 601a str r2, [r3, #0] htim3.Init.Prescaler = 39999; - 80006b4: 4b1b ldr r3, [pc, #108] ; (8000724 ) - 80006b6: f649 423f movw r2, #39999 ; 0x9c3f - 80006ba: 605a str r2, [r3, #4] + 80006c0: 4b1b ldr r3, [pc, #108] ; (8000730 ) + 80006c2: f649 423f movw r2, #39999 ; 0x9c3f + 80006c6: 605a str r2, [r3, #4] htim3.Init.CounterMode = TIM_COUNTERMODE_UP; - 80006bc: 4b19 ldr r3, [pc, #100] ; (8000724 ) - 80006be: 2200 movs r2, #0 - 80006c0: 609a str r2, [r3, #8] + 80006c8: 4b19 ldr r3, [pc, #100] ; (8000730 ) + 80006ca: 2200 movs r2, #0 + 80006cc: 609a str r2, [r3, #8] htim3.Init.Period = 9; - 80006c2: 4b18 ldr r3, [pc, #96] ; (8000724 ) - 80006c4: 2209 movs r2, #9 - 80006c6: 60da str r2, [r3, #12] + 80006ce: 4b18 ldr r3, [pc, #96] ; (8000730 ) + 80006d0: 2209 movs r2, #9 + 80006d2: 60da str r2, [r3, #12] htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 80006c8: 4b16 ldr r3, [pc, #88] ; (8000724 ) - 80006ca: 2200 movs r2, #0 - 80006cc: 611a str r2, [r3, #16] + 80006d4: 4b16 ldr r3, [pc, #88] ; (8000730 ) + 80006d6: 2200 movs r2, #0 + 80006d8: 611a str r2, [r3, #16] htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 80006ce: 4b15 ldr r3, [pc, #84] ; (8000724 ) - 80006d0: 2200 movs r2, #0 - 80006d2: 619a str r2, [r3, #24] + 80006da: 4b15 ldr r3, [pc, #84] ; (8000730 ) + 80006dc: 2200 movs r2, #0 + 80006de: 619a str r2, [r3, #24] if (HAL_TIM_Base_Init(&htim3) != HAL_OK) - 80006d4: 4813 ldr r0, [pc, #76] ; (8000724 ) - 80006d6: f001 fdbb bl 8002250 - 80006da: 4603 mov r3, r0 - 80006dc: 2b00 cmp r3, #0 - 80006de: d001 beq.n 80006e4 + 80006e0: 4813 ldr r0, [pc, #76] ; (8000730 ) + 80006e2: f001 fdb5 bl 8002250 + 80006e6: 4603 mov r3, r0 + 80006e8: 2b00 cmp r3, #0 + 80006ea: d001 beq.n 80006f0 { Error_Handler(); - 80006e0: f000 f8b8 bl 8000854 + 80006ec: f000 f8b2 bl 8000854 } sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; - 80006e4: f44f 5380 mov.w r3, #4096 ; 0x1000 - 80006e8: 613b str r3, [r7, #16] + 80006f0: f44f 5380 mov.w r3, #4096 ; 0x1000 + 80006f4: 613b str r3, [r7, #16] if (HAL_TIM_ConfigClockSource(&htim3, &sClockSourceConfig) != HAL_OK) - 80006ea: f107 0310 add.w r3, r7, #16 - 80006ee: 4619 mov r1, r3 - 80006f0: 480c ldr r0, [pc, #48] ; (8000724 ) - 80006f2: f001 fef7 bl 80024e4 - 80006f6: 4603 mov r3, r0 - 80006f8: 2b00 cmp r3, #0 - 80006fa: d001 beq.n 8000700 + 80006f6: f107 0310 add.w r3, r7, #16 + 80006fa: 4619 mov r1, r3 + 80006fc: 480c ldr r0, [pc, #48] ; (8000730 ) + 80006fe: f001 ff1d bl 800253c + 8000702: 4603 mov r3, r0 + 8000704: 2b00 cmp r3, #0 + 8000706: d001 beq.n 800070c { Error_Handler(); - 80006fc: f000 f8aa bl 8000854 + 8000708: f000 f8a4 bl 8000854 } sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; - 8000700: 2300 movs r3, #0 - 8000702: 607b str r3, [r7, #4] + 800070c: 2300 movs r3, #0 + 800070e: 607b str r3, [r7, #4] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - 8000704: 2300 movs r3, #0 - 8000706: 60fb str r3, [r7, #12] + 8000710: 2300 movs r3, #0 + 8000712: 60fb str r3, [r7, #12] if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK) - 8000708: 1d3b adds r3, r7, #4 - 800070a: 4619 mov r1, r3 - 800070c: 4805 ldr r0, [pc, #20] ; (8000724 ) - 800070e: f002 f905 bl 800291c - 8000712: 4603 mov r3, r0 - 8000714: 2b00 cmp r3, #0 - 8000716: d001 beq.n 800071c + 8000714: 1d3b adds r3, r7, #4 + 8000716: 4619 mov r1, r3 + 8000718: 4805 ldr r0, [pc, #20] ; (8000730 ) + 800071a: f002 f92b bl 8002974 + 800071e: 4603 mov r3, r0 + 8000720: 2b00 cmp r3, #0 + 8000722: d001 beq.n 8000728 { Error_Handler(); - 8000718: f000 f89c bl 8000854 + 8000724: f000 f896 bl 8000854 } /* USER CODE BEGIN TIM3_Init 2 */ /* USER CODE END TIM3_Init 2 */ } - 800071c: bf00 nop - 800071e: 3720 adds r7, #32 - 8000720: 46bd mov sp, r7 - 8000722: bd80 pop {r7, pc} - 8000724: 20000048 .word 0x20000048 - 8000728: 40000400 .word 0x40000400 - -0800072c : + 8000728: bf00 nop + 800072a: 3720 adds r7, #32 + 800072c: 46bd mov sp, r7 + 800072e: bd80 pop {r7, pc} + 8000730: 2000003c .word 0x2000003c + 8000734: 40000400 .word 0x40000400 + +08000738 : * @brief USART6 Initialization Function * @param None * @retval None */ static void MX_USART6_UART_Init(void) { - 800072c: b580 push {r7, lr} - 800072e: af00 add r7, sp, #0 + 8000738: b580 push {r7, lr} + 800073a: af00 add r7, sp, #0 /* USER CODE END USART6_Init 0 */ /* USER CODE BEGIN USART6_Init 1 */ /* USER CODE END USART6_Init 1 */ huart6.Instance = USART6; - 8000730: 4b15 ldr r3, [pc, #84] ; (8000788 ) - 8000732: 4a16 ldr r2, [pc, #88] ; (800078c ) - 8000734: 601a str r2, [r3, #0] + 800073c: 4b15 ldr r3, [pc, #84] ; (8000794 ) + 800073e: 4a16 ldr r2, [pc, #88] ; (8000798 ) + 8000740: 601a str r2, [r3, #0] huart6.Init.BaudRate = 115200; - 8000736: 4b14 ldr r3, [pc, #80] ; (8000788 ) - 8000738: f44f 32e1 mov.w r2, #115200 ; 0x1c200 - 800073c: 605a str r2, [r3, #4] + 8000742: 4b14 ldr r3, [pc, #80] ; (8000794 ) + 8000744: f44f 32e1 mov.w r2, #115200 ; 0x1c200 + 8000748: 605a str r2, [r3, #4] huart6.Init.WordLength = UART_WORDLENGTH_9B; - 800073e: 4b12 ldr r3, [pc, #72] ; (8000788 ) - 8000740: f44f 5280 mov.w r2, #4096 ; 0x1000 - 8000744: 609a str r2, [r3, #8] + 800074a: 4b12 ldr r3, [pc, #72] ; (8000794 ) + 800074c: f44f 5280 mov.w r2, #4096 ; 0x1000 + 8000750: 609a str r2, [r3, #8] huart6.Init.StopBits = UART_STOPBITS_1; - 8000746: 4b10 ldr r3, [pc, #64] ; (8000788 ) - 8000748: 2200 movs r2, #0 - 800074a: 60da str r2, [r3, #12] + 8000752: 4b10 ldr r3, [pc, #64] ; (8000794 ) + 8000754: 2200 movs r2, #0 + 8000756: 60da str r2, [r3, #12] huart6.Init.Parity = UART_PARITY_ODD; - 800074c: 4b0e ldr r3, [pc, #56] ; (8000788 ) - 800074e: f44f 62c0 mov.w r2, #1536 ; 0x600 - 8000752: 611a str r2, [r3, #16] + 8000758: 4b0e ldr r3, [pc, #56] ; (8000794 ) + 800075a: f44f 62c0 mov.w r2, #1536 ; 0x600 + 800075e: 611a str r2, [r3, #16] huart6.Init.Mode = UART_MODE_TX_RX; - 8000754: 4b0c ldr r3, [pc, #48] ; (8000788 ) - 8000756: 220c movs r2, #12 - 8000758: 615a str r2, [r3, #20] + 8000760: 4b0c ldr r3, [pc, #48] ; (8000794 ) + 8000762: 220c movs r2, #12 + 8000764: 615a str r2, [r3, #20] huart6.Init.HwFlowCtl = UART_HWCONTROL_RTS_CTS; - 800075a: 4b0b ldr r3, [pc, #44] ; (8000788 ) - 800075c: f44f 7240 mov.w r2, #768 ; 0x300 - 8000760: 619a str r2, [r3, #24] + 8000766: 4b0b ldr r3, [pc, #44] ; (8000794 ) + 8000768: f44f 7240 mov.w r2, #768 ; 0x300 + 800076c: 619a str r2, [r3, #24] huart6.Init.OverSampling = UART_OVERSAMPLING_16; - 8000762: 4b09 ldr r3, [pc, #36] ; (8000788 ) - 8000764: 2200 movs r2, #0 - 8000766: 61da str r2, [r3, #28] + 800076e: 4b09 ldr r3, [pc, #36] ; (8000794 ) + 8000770: 2200 movs r2, #0 + 8000772: 61da str r2, [r3, #28] huart6.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; - 8000768: 4b07 ldr r3, [pc, #28] ; (8000788 ) - 800076a: 2200 movs r2, #0 - 800076c: 621a str r2, [r3, #32] + 8000774: 4b07 ldr r3, [pc, #28] ; (8000794 ) + 8000776: 2200 movs r2, #0 + 8000778: 621a str r2, [r3, #32] huart6.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; - 800076e: 4b06 ldr r3, [pc, #24] ; (8000788 ) - 8000770: 2200 movs r2, #0 - 8000772: 625a str r2, [r3, #36] ; 0x24 + 800077a: 4b06 ldr r3, [pc, #24] ; (8000794 ) + 800077c: 2200 movs r2, #0 + 800077e: 625a str r2, [r3, #36] ; 0x24 if (HAL_UART_Init(&huart6) != HAL_OK) - 8000774: 4804 ldr r0, [pc, #16] ; (8000788 ) - 8000776: f002 f94b bl 8002a10 - 800077a: 4603 mov r3, r0 - 800077c: 2b00 cmp r3, #0 - 800077e: d001 beq.n 8000784 + 8000780: 4804 ldr r0, [pc, #16] ; (8000794 ) + 8000782: f002 f971 bl 8002a68 + 8000786: 4603 mov r3, r0 + 8000788: 2b00 cmp r3, #0 + 800078a: d001 beq.n 8000790 { Error_Handler(); - 8000780: f000 f868 bl 8000854 + 800078c: f000 f862 bl 8000854 } /* USER CODE BEGIN USART6_Init 2 */ /* USER CODE END USART6_Init 2 */ } - 8000784: bf00 nop - 8000786: bd80 pop {r7, pc} - 8000788: 20000088 .word 0x20000088 - 800078c: 40011400 .word 0x40011400 + 8000790: bf00 nop + 8000792: bd80 pop {r7, pc} + 8000794: 20000084 .word 0x20000084 + 8000798: 40011400 .word 0x40011400 -08000790 : +0800079c : * @brief GPIO Initialization Function * @param None * @retval None */ static void MX_GPIO_Init(void) { - 8000790: b480 push {r7} - 8000792: b083 sub sp, #12 - 8000794: af00 add r7, sp, #0 + 800079c: b480 push {r7} + 800079e: b083 sub sp, #12 + 80007a0: af00 add r7, sp, #0 /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOG_CLK_ENABLE(); - 8000796: 4b0f ldr r3, [pc, #60] ; (80007d4 ) - 8000798: 6b1b ldr r3, [r3, #48] ; 0x30 - 800079a: 4a0e ldr r2, [pc, #56] ; (80007d4 ) - 800079c: f043 0340 orr.w r3, r3, #64 ; 0x40 - 80007a0: 6313 str r3, [r2, #48] ; 0x30 - 80007a2: 4b0c ldr r3, [pc, #48] ; (80007d4 ) + 80007a2: 4b0f ldr r3, [pc, #60] ; (80007e0 ) 80007a4: 6b1b ldr r3, [r3, #48] ; 0x30 - 80007a6: f003 0340 and.w r3, r3, #64 ; 0x40 - 80007aa: 607b str r3, [r7, #4] - 80007ac: 687b ldr r3, [r7, #4] - __HAL_RCC_GPIOC_CLK_ENABLE(); - 80007ae: 4b09 ldr r3, [pc, #36] ; (80007d4 ) + 80007a6: 4a0e ldr r2, [pc, #56] ; (80007e0 ) + 80007a8: f043 0340 orr.w r3, r3, #64 ; 0x40 + 80007ac: 6313 str r3, [r2, #48] ; 0x30 + 80007ae: 4b0c ldr r3, [pc, #48] ; (80007e0 ) 80007b0: 6b1b ldr r3, [r3, #48] ; 0x30 - 80007b2: 4a08 ldr r2, [pc, #32] ; (80007d4 ) - 80007b4: f043 0304 orr.w r3, r3, #4 - 80007b8: 6313 str r3, [r2, #48] ; 0x30 - 80007ba: 4b06 ldr r3, [pc, #24] ; (80007d4 ) + 80007b2: f003 0340 and.w r3, r3, #64 ; 0x40 + 80007b6: 607b str r3, [r7, #4] + 80007b8: 687b ldr r3, [r7, #4] + __HAL_RCC_GPIOC_CLK_ENABLE(); + 80007ba: 4b09 ldr r3, [pc, #36] ; (80007e0 ) 80007bc: 6b1b ldr r3, [r3, #48] ; 0x30 - 80007be: f003 0304 and.w r3, r3, #4 - 80007c2: 603b str r3, [r7, #0] - 80007c4: 683b ldr r3, [r7, #0] + 80007be: 4a08 ldr r2, [pc, #32] ; (80007e0 ) + 80007c0: f043 0304 orr.w r3, r3, #4 + 80007c4: 6313 str r3, [r2, #48] ; 0x30 + 80007c6: 4b06 ldr r3, [pc, #24] ; (80007e0 ) + 80007c8: 6b1b ldr r3, [r3, #48] ; 0x30 + 80007ca: f003 0304 and.w r3, r3, #4 + 80007ce: 603b str r3, [r7, #0] + 80007d0: 683b ldr r3, [r7, #0] } - 80007c6: bf00 nop - 80007c8: 370c adds r7, #12 - 80007ca: 46bd mov sp, r7 - 80007cc: f85d 7b04 ldr.w r7, [sp], #4 - 80007d0: 4770 bx lr 80007d2: bf00 nop - 80007d4: 40023800 .word 0x40023800 + 80007d4: 370c adds r7, #12 + 80007d6: 46bd mov sp, r7 + 80007d8: f85d 7b04 ldr.w r7, [sp], #4 + 80007dc: 4770 bx lr + 80007de: bf00 nop + 80007e0: 40023800 .word 0x40023800 -080007d8 : +080007e4 : /* USER CODE BEGIN 4 */ void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) { - 80007d8: b580 push {r7, lr} - 80007da: b082 sub sp, #8 - 80007dc: af00 add r7, sp, #0 - 80007de: 6078 str r0, [r7, #4] + 80007e4: b580 push {r7, lr} + 80007e6: b082 sub sp, #8 + 80007e8: af00 add r7, sp, #0 + 80007ea: 6078 str r0, [r7, #4] if (htim->Instance == TIM3) { - 80007e0: 687b ldr r3, [r7, #4] - 80007e2: 681b ldr r3, [r3, #0] - 80007e4: 4a06 ldr r2, [pc, #24] ; (8000800 ) - 80007e6: 4293 cmp r3, r2 - 80007e8: d106 bne.n 80007f8 - HAL_UART_Transmit(&huart6, out_buffer, 12, 100); - 80007ea: 4b06 ldr r3, [pc, #24] ; (8000804 ) - 80007ec: 6819 ldr r1, [r3, #0] - 80007ee: 2364 movs r3, #100 ; 0x64 - 80007f0: 220c movs r2, #12 - 80007f2: 4805 ldr r0, [pc, #20] ; (8000808 ) - 80007f4: f002 f95a bl 8002aac + 80007ec: 687b ldr r3, [r7, #4] + 80007ee: 681b ldr r3, [r3, #0] + 80007f0: 4a06 ldr r2, [pc, #24] ; (800080c ) + 80007f2: 4293 cmp r3, r2 + 80007f4: d106 bne.n 8000804 + HAL_UART_Transmit(&huart6, tx_buffer, 12, 100); + 80007f6: 4b06 ldr r3, [pc, #24] ; (8000810 ) + 80007f8: 6819 ldr r1, [r3, #0] + 80007fa: 2364 movs r3, #100 ; 0x64 + 80007fc: 220c movs r2, #12 + 80007fe: 4805 ldr r0, [pc, #20] ; (8000814 ) + 8000800: f002 f980 bl 8002b04 } } - 80007f8: bf00 nop - 80007fa: 3708 adds r7, #8 - 80007fc: 46bd mov sp, r7 - 80007fe: bd80 pop {r7, pc} - 8000800: 40000400 .word 0x40000400 - 8000804: 20000040 .word 0x20000040 - 8000808: 20000088 .word 0x20000088 + 8000804: bf00 nop + 8000806: 3708 adds r7, #8 + 8000808: 46bd mov sp, r7 + 800080a: bd80 pop {r7, pc} + 800080c: 40000400 .word 0x40000400 + 8000810: 20000080 .word 0x20000080 + 8000814: 20000084 .word 0x20000084 -0800080c : +08000818 : void HAL_UART_RxCpltCallback(UART_HandleTypeDef *UartHandle) { - 800080c: b580 push {r7, lr} - 800080e: b082 sub sp, #8 - 8000810: af00 add r7, sp, #0 - 8000812: 6078 str r0, [r7, #4] - test++; - 8000814: 4b07 ldr r3, [pc, #28] ; (8000834 ) - 8000816: 681b ldr r3, [r3, #0] - 8000818: 3301 adds r3, #1 - 800081a: 4a06 ldr r2, [pc, #24] ; (8000834 ) - 800081c: 6013 str r3, [r2, #0] - HAL_UART_Receive_IT(&huart6, in_buffer, 8); - 800081e: 4b06 ldr r3, [pc, #24] ; (8000838 ) - 8000820: 681b ldr r3, [r3, #0] - 8000822: 2208 movs r2, #8 - 8000824: 4619 mov r1, r3 - 8000826: 4805 ldr r0, [pc, #20] ; (800083c ) - 8000828: f002 f9d2 bl 8002bd0 + 8000818: b580 push {r7, lr} + 800081a: b082 sub sp, #8 + 800081c: af00 add r7, sp, #0 + 800081e: 6078 str r0, [r7, #4] + HAL_UART_Receive_IT(&huart6, rx_buffer, 8); + 8000820: 4b05 ldr r3, [pc, #20] ; (8000838 ) + 8000822: 681b ldr r3, [r3, #0] + 8000824: 2208 movs r2, #8 + 8000826: 4619 mov r1, r3 + 8000828: 4804 ldr r0, [pc, #16] ; (800083c ) + 800082a: f002 f9fd bl 8002c28 } - 800082c: bf00 nop - 800082e: 3708 adds r7, #8 - 8000830: 46bd mov sp, r7 - 8000832: bd80 pop {r7, pc} - 8000834: 20000028 .word 0x20000028 - 8000838: 20000044 .word 0x20000044 - 800083c: 20000088 .word 0x20000088 + 800082e: bf00 nop + 8000830: 3708 adds r7, #8 + 8000832: 46bd mov sp, r7 + 8000834: bd80 pop {r7, pc} + 8000836: bf00 nop + 8000838: 2000007c .word 0x2000007c + 800083c: 20000084 .word 0x20000084 08000840 : @@ -1312,7 +1310,7 @@ void TIM3_IRQHandler(void) /* USER CODE END TIM3_IRQn 0 */ HAL_TIM_IRQHandler(&htim3); 8000a2c: 4802 ldr r0, [pc, #8] ; (8000a38 ) - 8000a2e: f001 fc3a bl 80022a6 + 8000a2e: f001 fc65 bl 80022fc /* USER CODE BEGIN TIM3_IRQn 1 */ /* USER CODE END TIM3_IRQn 1 */ @@ -1320,7 +1318,7 @@ void TIM3_IRQHandler(void) 8000a32: bf00 nop 8000a34: bd80 pop {r7, pc} 8000a36: bf00 nop - 8000a38: 20000048 .word 0x20000048 + 8000a38: 2000003c .word 0x2000003c 08000a3c : @@ -1336,7 +1334,7 @@ void USART6_IRQHandler(void) /* USER CODE END USART6_IRQn 0 */ HAL_UART_IRQHandler(&huart6); 8000a40: 4802 ldr r0, [pc, #8] ; (8000a4c ) - 8000a42: f002 f967 bl 8002d14 + 8000a42: f002 f993 bl 8002d6c /* USER CODE BEGIN USART6_IRQn 1 */ /* USER CODE END USART6_IRQn 1 */ @@ -1344,7 +1342,7 @@ void USART6_IRQHandler(void) 8000a46: bf00 nop 8000a48: bd80 pop {r7, pc} 8000a4a: bf00 nop - 8000a4c: 20000088 .word 0x20000088 + 8000a4c: 20000084 .word 0x20000084 08000a50 : * SystemFrequency variable. @@ -1495,7 +1493,7 @@ LoopFillZerobss: 8000ae6: f7ff ffb3 bl 8000a50 /* Call static constructors */ bl __libc_init_array - 8000aea: f002 feeb bl 80038c4 <__libc_init_array> + 8000aea: f002 ff17 bl 800391c <__libc_init_array> /* Call the application's entry point.*/ bl main 8000aee: f7ff fd23 bl 8000538
@@ -1504,7 +1502,7 @@ LoopFillZerobss: ldr sp, =_estack /* set stack pointer */ 8000af4: 20080000 .word 0x20080000 ldr r3, =_sidata - 8000af8: 0800395c .word 0x0800395c + 8000af8: 080039b4 .word 0x080039b4 ldr r0, =_sdata 8000afc: 20000000 .word 0x20000000 ldr r3, =_edata @@ -1512,7 +1510,7 @@ LoopFillZerobss: ldr r2, =_sbss 8000b04: 2000000c .word 0x2000000c ldr r3, = _ebss - 8000b08: 20000114 .word 0x20000114 + 8000b08: 20000110 .word 0x20000110 08000b0c : * @retval None @@ -1648,7 +1646,7 @@ __weak void HAL_IncTick(void) 8000ba4: 4770 bx lr 8000ba6: bf00 nop 8000ba8: 20000008 .word 0x20000008 - 8000bac: 20000110 .word 0x20000110 + 8000bac: 2000010c .word 0x2000010c 08000bb0 : * @note This function is declared as __weak to be overwritten in case of other @@ -1668,7 +1666,7 @@ __weak uint32_t HAL_GetTick(void) 8000bbc: f85d 7b04 ldr.w r7, [sp], #4 8000bc0: 4770 bx lr 8000bc2: bf00 nop - 8000bc4: 20000110 .word 0x20000110 + 8000bc4: 2000010c .word 0x2000010c 08000bc8 <__NVIC_SetPriorityGrouping>: In case of a conflict between priority grouping and available @@ -3815,7 +3813,7 @@ HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, ui 8001826: bf00 nop 8001828: 40023c00 .word 0x40023c00 800182c: 40023800 .word 0x40023800 - 8001830: 08003934 .word 0x08003934 + 8001830: 0800398c .word 0x0800398c 8001834: 20000000 .word 0x20000000 08001838 : @@ -4051,7 +4049,7 @@ uint32_t HAL_RCC_GetPCLK1Freq(void) 80019d0: 4618 mov r0, r3 80019d2: bd80 pop {r7, pc} 80019d4: 40023800 .word 0x40023800 - 80019d8: 08003944 .word 0x08003944 + 80019d8: 0800399c .word 0x0800399c 080019dc : * @note Each time PCLK2 changes, this function must be called to update the @@ -4077,7 +4075,7 @@ uint32_t HAL_RCC_GetPCLK2Freq(void) 80019f8: 4618 mov r0, r3 80019fa: bd80 pop {r7, pc} 80019fc: 40023800 .word 0x40023800 - 8001a00: 08003944 .word 0x08003944 + 8001a00: 0800399c .word 0x0800399c 08001a04 : * the backup registers) are set to their reset values. @@ -5556,7 +5554,7 @@ HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim) 800228a: 3304 adds r3, #4 800228c: 4619 mov r1, r3 800228e: 4610 mov r0, r2 - 8002290: f000 fa0a bl 80026a8 + 8002290: f000 fa36 bl 8002700 /* Initialize the TIM state*/ htim->State = HAL_TIM_STATE_READY; @@ -5571,3866 +5569,3930 @@ HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim) 80022a0: 3708 adds r7, #8 80022a2: 46bd mov sp, r7 80022a4: bd80 pop {r7, pc} + ... + +080022a8 : + * @brief Starts the TIM Base generation in interrupt mode. + * @param htim TIM Base handle + * @retval HAL status + */ +HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim) +{ + 80022a8: b480 push {r7} + 80022aa: b085 sub sp, #20 + 80022ac: af00 add r7, sp, #0 + 80022ae: 6078 str r0, [r7, #4] -080022a6 : + /* Check the parameters */ + assert_param(IS_TIM_INSTANCE(htim->Instance)); + + /* Enable the TIM Update interrupt */ + __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE); + 80022b0: 687b ldr r3, [r7, #4] + 80022b2: 681b ldr r3, [r3, #0] + 80022b4: 68da ldr r2, [r3, #12] + 80022b6: 687b ldr r3, [r7, #4] + 80022b8: 681b ldr r3, [r3, #0] + 80022ba: f042 0201 orr.w r2, r2, #1 + 80022be: 60da str r2, [r3, #12] + + /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ + tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; + 80022c0: 687b ldr r3, [r7, #4] + 80022c2: 681b ldr r3, [r3, #0] + 80022c4: 689a ldr r2, [r3, #8] + 80022c6: 4b0c ldr r3, [pc, #48] ; (80022f8 ) + 80022c8: 4013 ands r3, r2 + 80022ca: 60fb str r3, [r7, #12] + if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 80022cc: 68fb ldr r3, [r7, #12] + 80022ce: 2b06 cmp r3, #6 + 80022d0: d00b beq.n 80022ea + 80022d2: 68fb ldr r3, [r7, #12] + 80022d4: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 + 80022d8: d007 beq.n 80022ea + { + __HAL_TIM_ENABLE(htim); + 80022da: 687b ldr r3, [r7, #4] + 80022dc: 681b ldr r3, [r3, #0] + 80022de: 681a ldr r2, [r3, #0] + 80022e0: 687b ldr r3, [r7, #4] + 80022e2: 681b ldr r3, [r3, #0] + 80022e4: f042 0201 orr.w r2, r2, #1 + 80022e8: 601a str r2, [r3, #0] + } + + /* Return function status */ + return HAL_OK; + 80022ea: 2300 movs r3, #0 +} + 80022ec: 4618 mov r0, r3 + 80022ee: 3714 adds r7, #20 + 80022f0: 46bd mov sp, r7 + 80022f2: f85d 7b04 ldr.w r7, [sp], #4 + 80022f6: 4770 bx lr + 80022f8: 00010007 .word 0x00010007 + +080022fc : * @brief This function handles TIM interrupts requests. * @param htim TIM handle * @retval None */ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) { - 80022a6: b580 push {r7, lr} - 80022a8: b082 sub sp, #8 - 80022aa: af00 add r7, sp, #0 - 80022ac: 6078 str r0, [r7, #4] + 80022fc: b580 push {r7, lr} + 80022fe: b082 sub sp, #8 + 8002300: af00 add r7, sp, #0 + 8002302: 6078 str r0, [r7, #4] /* Capture compare 1 event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) - 80022ae: 687b ldr r3, [r7, #4] - 80022b0: 681b ldr r3, [r3, #0] - 80022b2: 691b ldr r3, [r3, #16] - 80022b4: f003 0302 and.w r3, r3, #2 - 80022b8: 2b02 cmp r3, #2 - 80022ba: d122 bne.n 8002302 + 8002304: 687b ldr r3, [r7, #4] + 8002306: 681b ldr r3, [r3, #0] + 8002308: 691b ldr r3, [r3, #16] + 800230a: f003 0302 and.w r3, r3, #2 + 800230e: 2b02 cmp r3, #2 + 8002310: d122 bne.n 8002358 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) != RESET) - 80022bc: 687b ldr r3, [r7, #4] - 80022be: 681b ldr r3, [r3, #0] - 80022c0: 68db ldr r3, [r3, #12] - 80022c2: f003 0302 and.w r3, r3, #2 - 80022c6: 2b02 cmp r3, #2 - 80022c8: d11b bne.n 8002302 + 8002312: 687b ldr r3, [r7, #4] + 8002314: 681b ldr r3, [r3, #0] + 8002316: 68db ldr r3, [r3, #12] + 8002318: f003 0302 and.w r3, r3, #2 + 800231c: 2b02 cmp r3, #2 + 800231e: d11b bne.n 8002358 { { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1); - 80022ca: 687b ldr r3, [r7, #4] - 80022cc: 681b ldr r3, [r3, #0] - 80022ce: f06f 0202 mvn.w r2, #2 - 80022d2: 611a str r2, [r3, #16] + 8002320: 687b ldr r3, [r7, #4] + 8002322: 681b ldr r3, [r3, #0] + 8002324: f06f 0202 mvn.w r2, #2 + 8002328: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; - 80022d4: 687b ldr r3, [r7, #4] - 80022d6: 2201 movs r2, #1 - 80022d8: 771a strb r2, [r3, #28] + 800232a: 687b ldr r3, [r7, #4] + 800232c: 2201 movs r2, #1 + 800232e: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) - 80022da: 687b ldr r3, [r7, #4] - 80022dc: 681b ldr r3, [r3, #0] - 80022de: 699b ldr r3, [r3, #24] - 80022e0: f003 0303 and.w r3, r3, #3 - 80022e4: 2b00 cmp r3, #0 - 80022e6: d003 beq.n 80022f0 + 8002330: 687b ldr r3, [r7, #4] + 8002332: 681b ldr r3, [r3, #0] + 8002334: 699b ldr r3, [r3, #24] + 8002336: f003 0303 and.w r3, r3, #3 + 800233a: 2b00 cmp r3, #0 + 800233c: d003 beq.n 8002346 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); - 80022e8: 6878 ldr r0, [r7, #4] - 80022ea: f000 f9bf bl 800266c - 80022ee: e005 b.n 80022fc + 800233e: 6878 ldr r0, [r7, #4] + 8002340: f000 f9c0 bl 80026c4 + 8002344: e005 b.n 8002352 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); - 80022f0: 6878 ldr r0, [r7, #4] - 80022f2: f000 f9b1 bl 8002658 + 8002346: 6878 ldr r0, [r7, #4] + 8002348: f000 f9b2 bl 80026b0 HAL_TIM_PWM_PulseFinishedCallback(htim); - 80022f6: 6878 ldr r0, [r7, #4] - 80022f8: f000 f9c2 bl 8002680 + 800234c: 6878 ldr r0, [r7, #4] + 800234e: f000 f9c3 bl 80026d8 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - 80022fc: 687b ldr r3, [r7, #4] - 80022fe: 2200 movs r2, #0 - 8002300: 771a strb r2, [r3, #28] + 8002352: 687b ldr r3, [r7, #4] + 8002354: 2200 movs r2, #0 + 8002356: 771a strb r2, [r3, #28] } } } /* Capture compare 2 event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET) - 8002302: 687b ldr r3, [r7, #4] - 8002304: 681b ldr r3, [r3, #0] - 8002306: 691b ldr r3, [r3, #16] - 8002308: f003 0304 and.w r3, r3, #4 - 800230c: 2b04 cmp r3, #4 - 800230e: d122 bne.n 8002356 + 8002358: 687b ldr r3, [r7, #4] + 800235a: 681b ldr r3, [r3, #0] + 800235c: 691b ldr r3, [r3, #16] + 800235e: f003 0304 and.w r3, r3, #4 + 8002362: 2b04 cmp r3, #4 + 8002364: d122 bne.n 80023ac { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) != RESET) - 8002310: 687b ldr r3, [r7, #4] - 8002312: 681b ldr r3, [r3, #0] - 8002314: 68db ldr r3, [r3, #12] - 8002316: f003 0304 and.w r3, r3, #4 - 800231a: 2b04 cmp r3, #4 - 800231c: d11b bne.n 8002356 + 8002366: 687b ldr r3, [r7, #4] + 8002368: 681b ldr r3, [r3, #0] + 800236a: 68db ldr r3, [r3, #12] + 800236c: f003 0304 and.w r3, r3, #4 + 8002370: 2b04 cmp r3, #4 + 8002372: d11b bne.n 80023ac { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2); - 800231e: 687b ldr r3, [r7, #4] - 8002320: 681b ldr r3, [r3, #0] - 8002322: f06f 0204 mvn.w r2, #4 - 8002326: 611a str r2, [r3, #16] + 8002374: 687b ldr r3, [r7, #4] + 8002376: 681b ldr r3, [r3, #0] + 8002378: f06f 0204 mvn.w r2, #4 + 800237c: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; - 8002328: 687b ldr r3, [r7, #4] - 800232a: 2202 movs r2, #2 - 800232c: 771a strb r2, [r3, #28] + 800237e: 687b ldr r3, [r7, #4] + 8002380: 2202 movs r2, #2 + 8002382: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) - 800232e: 687b ldr r3, [r7, #4] - 8002330: 681b ldr r3, [r3, #0] - 8002332: 699b ldr r3, [r3, #24] - 8002334: f403 7340 and.w r3, r3, #768 ; 0x300 - 8002338: 2b00 cmp r3, #0 - 800233a: d003 beq.n 8002344 + 8002384: 687b ldr r3, [r7, #4] + 8002386: 681b ldr r3, [r3, #0] + 8002388: 699b ldr r3, [r3, #24] + 800238a: f403 7340 and.w r3, r3, #768 ; 0x300 + 800238e: 2b00 cmp r3, #0 + 8002390: d003 beq.n 800239a { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); - 800233c: 6878 ldr r0, [r7, #4] - 800233e: f000 f995 bl 800266c - 8002342: e005 b.n 8002350 + 8002392: 6878 ldr r0, [r7, #4] + 8002394: f000 f996 bl 80026c4 + 8002398: e005 b.n 80023a6 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); - 8002344: 6878 ldr r0, [r7, #4] - 8002346: f000 f987 bl 8002658 + 800239a: 6878 ldr r0, [r7, #4] + 800239c: f000 f988 bl 80026b0 HAL_TIM_PWM_PulseFinishedCallback(htim); - 800234a: 6878 ldr r0, [r7, #4] - 800234c: f000 f998 bl 8002680 + 80023a0: 6878 ldr r0, [r7, #4] + 80023a2: f000 f999 bl 80026d8 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - 8002350: 687b ldr r3, [r7, #4] - 8002352: 2200 movs r2, #0 - 8002354: 771a strb r2, [r3, #28] + 80023a6: 687b ldr r3, [r7, #4] + 80023a8: 2200 movs r2, #0 + 80023aa: 771a strb r2, [r3, #28] } } /* Capture compare 3 event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET) - 8002356: 687b ldr r3, [r7, #4] - 8002358: 681b ldr r3, [r3, #0] - 800235a: 691b ldr r3, [r3, #16] - 800235c: f003 0308 and.w r3, r3, #8 - 8002360: 2b08 cmp r3, #8 - 8002362: d122 bne.n 80023aa + 80023ac: 687b ldr r3, [r7, #4] + 80023ae: 681b ldr r3, [r3, #0] + 80023b0: 691b ldr r3, [r3, #16] + 80023b2: f003 0308 and.w r3, r3, #8 + 80023b6: 2b08 cmp r3, #8 + 80023b8: d122 bne.n 8002400 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) != RESET) - 8002364: 687b ldr r3, [r7, #4] - 8002366: 681b ldr r3, [r3, #0] - 8002368: 68db ldr r3, [r3, #12] - 800236a: f003 0308 and.w r3, r3, #8 - 800236e: 2b08 cmp r3, #8 - 8002370: d11b bne.n 80023aa + 80023ba: 687b ldr r3, [r7, #4] + 80023bc: 681b ldr r3, [r3, #0] + 80023be: 68db ldr r3, [r3, #12] + 80023c0: f003 0308 and.w r3, r3, #8 + 80023c4: 2b08 cmp r3, #8 + 80023c6: d11b bne.n 8002400 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3); - 8002372: 687b ldr r3, [r7, #4] - 8002374: 681b ldr r3, [r3, #0] - 8002376: f06f 0208 mvn.w r2, #8 - 800237a: 611a str r2, [r3, #16] + 80023c8: 687b ldr r3, [r7, #4] + 80023ca: 681b ldr r3, [r3, #0] + 80023cc: f06f 0208 mvn.w r2, #8 + 80023d0: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; - 800237c: 687b ldr r3, [r7, #4] - 800237e: 2204 movs r2, #4 - 8002380: 771a strb r2, [r3, #28] + 80023d2: 687b ldr r3, [r7, #4] + 80023d4: 2204 movs r2, #4 + 80023d6: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) - 8002382: 687b ldr r3, [r7, #4] - 8002384: 681b ldr r3, [r3, #0] - 8002386: 69db ldr r3, [r3, #28] - 8002388: f003 0303 and.w r3, r3, #3 - 800238c: 2b00 cmp r3, #0 - 800238e: d003 beq.n 8002398 + 80023d8: 687b ldr r3, [r7, #4] + 80023da: 681b ldr r3, [r3, #0] + 80023dc: 69db ldr r3, [r3, #28] + 80023de: f003 0303 and.w r3, r3, #3 + 80023e2: 2b00 cmp r3, #0 + 80023e4: d003 beq.n 80023ee { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); - 8002390: 6878 ldr r0, [r7, #4] - 8002392: f000 f96b bl 800266c - 8002396: e005 b.n 80023a4 + 80023e6: 6878 ldr r0, [r7, #4] + 80023e8: f000 f96c bl 80026c4 + 80023ec: e005 b.n 80023fa { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); - 8002398: 6878 ldr r0, [r7, #4] - 800239a: f000 f95d bl 8002658 + 80023ee: 6878 ldr r0, [r7, #4] + 80023f0: f000 f95e bl 80026b0 HAL_TIM_PWM_PulseFinishedCallback(htim); - 800239e: 6878 ldr r0, [r7, #4] - 80023a0: f000 f96e bl 8002680 + 80023f4: 6878 ldr r0, [r7, #4] + 80023f6: f000 f96f bl 80026d8 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - 80023a4: 687b ldr r3, [r7, #4] - 80023a6: 2200 movs r2, #0 - 80023a8: 771a strb r2, [r3, #28] + 80023fa: 687b ldr r3, [r7, #4] + 80023fc: 2200 movs r2, #0 + 80023fe: 771a strb r2, [r3, #28] } } /* Capture compare 4 event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET) - 80023aa: 687b ldr r3, [r7, #4] - 80023ac: 681b ldr r3, [r3, #0] - 80023ae: 691b ldr r3, [r3, #16] - 80023b0: f003 0310 and.w r3, r3, #16 - 80023b4: 2b10 cmp r3, #16 - 80023b6: d122 bne.n 80023fe + 8002400: 687b ldr r3, [r7, #4] + 8002402: 681b ldr r3, [r3, #0] + 8002404: 691b ldr r3, [r3, #16] + 8002406: f003 0310 and.w r3, r3, #16 + 800240a: 2b10 cmp r3, #16 + 800240c: d122 bne.n 8002454 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) != RESET) - 80023b8: 687b ldr r3, [r7, #4] - 80023ba: 681b ldr r3, [r3, #0] - 80023bc: 68db ldr r3, [r3, #12] - 80023be: f003 0310 and.w r3, r3, #16 - 80023c2: 2b10 cmp r3, #16 - 80023c4: d11b bne.n 80023fe + 800240e: 687b ldr r3, [r7, #4] + 8002410: 681b ldr r3, [r3, #0] + 8002412: 68db ldr r3, [r3, #12] + 8002414: f003 0310 and.w r3, r3, #16 + 8002418: 2b10 cmp r3, #16 + 800241a: d11b bne.n 8002454 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4); - 80023c6: 687b ldr r3, [r7, #4] - 80023c8: 681b ldr r3, [r3, #0] - 80023ca: f06f 0210 mvn.w r2, #16 - 80023ce: 611a str r2, [r3, #16] + 800241c: 687b ldr r3, [r7, #4] + 800241e: 681b ldr r3, [r3, #0] + 8002420: f06f 0210 mvn.w r2, #16 + 8002424: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; - 80023d0: 687b ldr r3, [r7, #4] - 80023d2: 2208 movs r2, #8 - 80023d4: 771a strb r2, [r3, #28] + 8002426: 687b ldr r3, [r7, #4] + 8002428: 2208 movs r2, #8 + 800242a: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) - 80023d6: 687b ldr r3, [r7, #4] - 80023d8: 681b ldr r3, [r3, #0] - 80023da: 69db ldr r3, [r3, #28] - 80023dc: f403 7340 and.w r3, r3, #768 ; 0x300 - 80023e0: 2b00 cmp r3, #0 - 80023e2: d003 beq.n 80023ec + 800242c: 687b ldr r3, [r7, #4] + 800242e: 681b ldr r3, [r3, #0] + 8002430: 69db ldr r3, [r3, #28] + 8002432: f403 7340 and.w r3, r3, #768 ; 0x300 + 8002436: 2b00 cmp r3, #0 + 8002438: d003 beq.n 8002442 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); - 80023e4: 6878 ldr r0, [r7, #4] - 80023e6: f000 f941 bl 800266c - 80023ea: e005 b.n 80023f8 + 800243a: 6878 ldr r0, [r7, #4] + 800243c: f000 f942 bl 80026c4 + 8002440: e005 b.n 800244e { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); - 80023ec: 6878 ldr r0, [r7, #4] - 80023ee: f000 f933 bl 8002658 + 8002442: 6878 ldr r0, [r7, #4] + 8002444: f000 f934 bl 80026b0 HAL_TIM_PWM_PulseFinishedCallback(htim); - 80023f2: 6878 ldr r0, [r7, #4] - 80023f4: f000 f944 bl 8002680 + 8002448: 6878 ldr r0, [r7, #4] + 800244a: f000 f945 bl 80026d8 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - 80023f8: 687b ldr r3, [r7, #4] - 80023fa: 2200 movs r2, #0 - 80023fc: 771a strb r2, [r3, #28] + 800244e: 687b ldr r3, [r7, #4] + 8002450: 2200 movs r2, #0 + 8002452: 771a strb r2, [r3, #28] } } /* TIM Update event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET) - 80023fe: 687b ldr r3, [r7, #4] - 8002400: 681b ldr r3, [r3, #0] - 8002402: 691b ldr r3, [r3, #16] - 8002404: f003 0301 and.w r3, r3, #1 - 8002408: 2b01 cmp r3, #1 - 800240a: d10e bne.n 800242a + 8002454: 687b ldr r3, [r7, #4] + 8002456: 681b ldr r3, [r3, #0] + 8002458: 691b ldr r3, [r3, #16] + 800245a: f003 0301 and.w r3, r3, #1 + 800245e: 2b01 cmp r3, #1 + 8002460: d10e bne.n 8002480 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) != RESET) - 800240c: 687b ldr r3, [r7, #4] - 800240e: 681b ldr r3, [r3, #0] - 8002410: 68db ldr r3, [r3, #12] - 8002412: f003 0301 and.w r3, r3, #1 - 8002416: 2b01 cmp r3, #1 - 8002418: d107 bne.n 800242a + 8002462: 687b ldr r3, [r7, #4] + 8002464: 681b ldr r3, [r3, #0] + 8002466: 68db ldr r3, [r3, #12] + 8002468: f003 0301 and.w r3, r3, #1 + 800246c: 2b01 cmp r3, #1 + 800246e: d107 bne.n 8002480 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); - 800241a: 687b ldr r3, [r7, #4] - 800241c: 681b ldr r3, [r3, #0] - 800241e: f06f 0201 mvn.w r2, #1 - 8002422: 611a str r2, [r3, #16] + 8002470: 687b ldr r3, [r7, #4] + 8002472: 681b ldr r3, [r3, #0] + 8002474: f06f 0201 mvn.w r2, #1 + 8002478: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->PeriodElapsedCallback(htim); #else HAL_TIM_PeriodElapsedCallback(htim); - 8002424: 6878 ldr r0, [r7, #4] - 8002426: f7fe f9d7 bl 80007d8 + 800247a: 6878 ldr r0, [r7, #4] + 800247c: f7fe f9b2 bl 80007e4 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM Break input event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET) - 800242a: 687b ldr r3, [r7, #4] - 800242c: 681b ldr r3, [r3, #0] - 800242e: 691b ldr r3, [r3, #16] - 8002430: f003 0380 and.w r3, r3, #128 ; 0x80 - 8002434: 2b80 cmp r3, #128 ; 0x80 - 8002436: d10e bne.n 8002456 + 8002480: 687b ldr r3, [r7, #4] + 8002482: 681b ldr r3, [r3, #0] + 8002484: 691b ldr r3, [r3, #16] + 8002486: f003 0380 and.w r3, r3, #128 ; 0x80 + 800248a: 2b80 cmp r3, #128 ; 0x80 + 800248c: d10e bne.n 80024ac { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) != RESET) - 8002438: 687b ldr r3, [r7, #4] - 800243a: 681b ldr r3, [r3, #0] - 800243c: 68db ldr r3, [r3, #12] - 800243e: f003 0380 and.w r3, r3, #128 ; 0x80 - 8002442: 2b80 cmp r3, #128 ; 0x80 - 8002444: d107 bne.n 8002456 + 800248e: 687b ldr r3, [r7, #4] + 8002490: 681b ldr r3, [r3, #0] + 8002492: 68db ldr r3, [r3, #12] + 8002494: f003 0380 and.w r3, r3, #128 ; 0x80 + 8002498: 2b80 cmp r3, #128 ; 0x80 + 800249a: d107 bne.n 80024ac { __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK); - 8002446: 687b ldr r3, [r7, #4] - 8002448: 681b ldr r3, [r3, #0] - 800244a: f06f 0280 mvn.w r2, #128 ; 0x80 - 800244e: 611a str r2, [r3, #16] + 800249c: 687b ldr r3, [r7, #4] + 800249e: 681b ldr r3, [r3, #0] + 80024a0: f06f 0280 mvn.w r2, #128 ; 0x80 + 80024a4: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->BreakCallback(htim); #else HAL_TIMEx_BreakCallback(htim); - 8002450: 6878 ldr r0, [r7, #4] - 8002452: f000 fac9 bl 80029e8 + 80024a6: 6878 ldr r0, [r7, #4] + 80024a8: f000 faca bl 8002a40 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM Break2 input event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK2) != RESET) - 8002456: 687b ldr r3, [r7, #4] - 8002458: 681b ldr r3, [r3, #0] - 800245a: 691b ldr r3, [r3, #16] - 800245c: f403 7380 and.w r3, r3, #256 ; 0x100 - 8002460: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 8002464: d10e bne.n 8002484 + 80024ac: 687b ldr r3, [r7, #4] + 80024ae: 681b ldr r3, [r3, #0] + 80024b0: 691b ldr r3, [r3, #16] + 80024b2: f403 7380 and.w r3, r3, #256 ; 0x100 + 80024b6: f5b3 7f80 cmp.w r3, #256 ; 0x100 + 80024ba: d10e bne.n 80024da { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) != RESET) - 8002466: 687b ldr r3, [r7, #4] - 8002468: 681b ldr r3, [r3, #0] - 800246a: 68db ldr r3, [r3, #12] - 800246c: f003 0380 and.w r3, r3, #128 ; 0x80 - 8002470: 2b80 cmp r3, #128 ; 0x80 - 8002472: d107 bne.n 8002484 + 80024bc: 687b ldr r3, [r7, #4] + 80024be: 681b ldr r3, [r3, #0] + 80024c0: 68db ldr r3, [r3, #12] + 80024c2: f003 0380 and.w r3, r3, #128 ; 0x80 + 80024c6: 2b80 cmp r3, #128 ; 0x80 + 80024c8: d107 bne.n 80024da { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_BREAK2); - 8002474: 687b ldr r3, [r7, #4] - 8002476: 681b ldr r3, [r3, #0] - 8002478: f46f 7280 mvn.w r2, #256 ; 0x100 - 800247c: 611a str r2, [r3, #16] + 80024ca: 687b ldr r3, [r7, #4] + 80024cc: 681b ldr r3, [r3, #0] + 80024ce: f46f 7280 mvn.w r2, #256 ; 0x100 + 80024d2: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->Break2Callback(htim); #else HAL_TIMEx_Break2Callback(htim); - 800247e: 6878 ldr r0, [r7, #4] - 8002480: f000 fabc bl 80029fc + 80024d4: 6878 ldr r0, [r7, #4] + 80024d6: f000 fabd bl 8002a54 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM Trigger detection event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET) - 8002484: 687b ldr r3, [r7, #4] - 8002486: 681b ldr r3, [r3, #0] - 8002488: 691b ldr r3, [r3, #16] - 800248a: f003 0340 and.w r3, r3, #64 ; 0x40 - 800248e: 2b40 cmp r3, #64 ; 0x40 - 8002490: d10e bne.n 80024b0 + 80024da: 687b ldr r3, [r7, #4] + 80024dc: 681b ldr r3, [r3, #0] + 80024de: 691b ldr r3, [r3, #16] + 80024e0: f003 0340 and.w r3, r3, #64 ; 0x40 + 80024e4: 2b40 cmp r3, #64 ; 0x40 + 80024e6: d10e bne.n 8002506 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) != RESET) - 8002492: 687b ldr r3, [r7, #4] - 8002494: 681b ldr r3, [r3, #0] - 8002496: 68db ldr r3, [r3, #12] - 8002498: f003 0340 and.w r3, r3, #64 ; 0x40 - 800249c: 2b40 cmp r3, #64 ; 0x40 - 800249e: d107 bne.n 80024b0 + 80024e8: 687b ldr r3, [r7, #4] + 80024ea: 681b ldr r3, [r3, #0] + 80024ec: 68db ldr r3, [r3, #12] + 80024ee: f003 0340 and.w r3, r3, #64 ; 0x40 + 80024f2: 2b40 cmp r3, #64 ; 0x40 + 80024f4: d107 bne.n 8002506 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); - 80024a0: 687b ldr r3, [r7, #4] - 80024a2: 681b ldr r3, [r3, #0] - 80024a4: f06f 0240 mvn.w r2, #64 ; 0x40 - 80024a8: 611a str r2, [r3, #16] + 80024f6: 687b ldr r3, [r7, #4] + 80024f8: 681b ldr r3, [r3, #0] + 80024fa: f06f 0240 mvn.w r2, #64 ; 0x40 + 80024fe: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->TriggerCallback(htim); #else HAL_TIM_TriggerCallback(htim); - 80024aa: 6878 ldr r0, [r7, #4] - 80024ac: f000 f8f2 bl 8002694 + 8002500: 6878 ldr r0, [r7, #4] + 8002502: f000 f8f3 bl 80026ec #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM commutation event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET) - 80024b0: 687b ldr r3, [r7, #4] - 80024b2: 681b ldr r3, [r3, #0] - 80024b4: 691b ldr r3, [r3, #16] - 80024b6: f003 0320 and.w r3, r3, #32 - 80024ba: 2b20 cmp r3, #32 - 80024bc: d10e bne.n 80024dc + 8002506: 687b ldr r3, [r7, #4] + 8002508: 681b ldr r3, [r3, #0] + 800250a: 691b ldr r3, [r3, #16] + 800250c: f003 0320 and.w r3, r3, #32 + 8002510: 2b20 cmp r3, #32 + 8002512: d10e bne.n 8002532 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) != RESET) - 80024be: 687b ldr r3, [r7, #4] - 80024c0: 681b ldr r3, [r3, #0] - 80024c2: 68db ldr r3, [r3, #12] - 80024c4: f003 0320 and.w r3, r3, #32 - 80024c8: 2b20 cmp r3, #32 - 80024ca: d107 bne.n 80024dc + 8002514: 687b ldr r3, [r7, #4] + 8002516: 681b ldr r3, [r3, #0] + 8002518: 68db ldr r3, [r3, #12] + 800251a: f003 0320 and.w r3, r3, #32 + 800251e: 2b20 cmp r3, #32 + 8002520: d107 bne.n 8002532 { __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM); - 80024cc: 687b ldr r3, [r7, #4] - 80024ce: 681b ldr r3, [r3, #0] - 80024d0: f06f 0220 mvn.w r2, #32 - 80024d4: 611a str r2, [r3, #16] + 8002522: 687b ldr r3, [r7, #4] + 8002524: 681b ldr r3, [r3, #0] + 8002526: f06f 0220 mvn.w r2, #32 + 800252a: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->CommutationCallback(htim); #else HAL_TIMEx_CommutCallback(htim); - 80024d6: 6878 ldr r0, [r7, #4] - 80024d8: f000 fa7c bl 80029d4 + 800252c: 6878 ldr r0, [r7, #4] + 800252e: f000 fa7d bl 8002a2c #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } } - 80024dc: bf00 nop - 80024de: 3708 adds r7, #8 - 80024e0: 46bd mov sp, r7 - 80024e2: bd80 pop {r7, pc} + 8002532: bf00 nop + 8002534: 3708 adds r7, #8 + 8002536: 46bd mov sp, r7 + 8002538: bd80 pop {r7, pc} + ... -080024e4 : +0800253c : * @param sClockSourceConfig pointer to a TIM_ClockConfigTypeDef structure that * contains the clock source information for the TIM peripheral. * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, TIM_ClockConfigTypeDef *sClockSourceConfig) { - 80024e4: b580 push {r7, lr} - 80024e6: b084 sub sp, #16 - 80024e8: af00 add r7, sp, #0 - 80024ea: 6078 str r0, [r7, #4] - 80024ec: 6039 str r1, [r7, #0] + 800253c: b580 push {r7, lr} + 800253e: b084 sub sp, #16 + 8002540: af00 add r7, sp, #0 + 8002542: 6078 str r0, [r7, #4] + 8002544: 6039 str r1, [r7, #0] uint32_t tmpsmcr; /* Process Locked */ __HAL_LOCK(htim); - 80024ee: 687b ldr r3, [r7, #4] - 80024f0: f893 303c ldrb.w r3, [r3, #60] ; 0x3c - 80024f4: 2b01 cmp r3, #1 - 80024f6: d101 bne.n 80024fc - 80024f8: 2302 movs r3, #2 - 80024fa: e0a6 b.n 800264a - 80024fc: 687b ldr r3, [r7, #4] - 80024fe: 2201 movs r2, #1 - 8002500: f883 203c strb.w r2, [r3, #60] ; 0x3c + 8002546: 687b ldr r3, [r7, #4] + 8002548: f893 303c ldrb.w r3, [r3, #60] ; 0x3c + 800254c: 2b01 cmp r3, #1 + 800254e: d101 bne.n 8002554 + 8002550: 2302 movs r3, #2 + 8002552: e0a6 b.n 80026a2 + 8002554: 687b ldr r3, [r7, #4] + 8002556: 2201 movs r2, #1 + 8002558: f883 203c strb.w r2, [r3, #60] ; 0x3c htim->State = HAL_TIM_STATE_BUSY; - 8002504: 687b ldr r3, [r7, #4] - 8002506: 2202 movs r2, #2 - 8002508: f883 203d strb.w r2, [r3, #61] ; 0x3d + 800255c: 687b ldr r3, [r7, #4] + 800255e: 2202 movs r2, #2 + 8002560: f883 203d strb.w r2, [r3, #61] ; 0x3d /* Check the parameters */ assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource)); /* Reset the SMS, TS, ECE, ETPS and ETRF bits */ tmpsmcr = htim->Instance->SMCR; - 800250c: 687b ldr r3, [r7, #4] - 800250e: 681b ldr r3, [r3, #0] - 8002510: 689b ldr r3, [r3, #8] - 8002512: 60fb str r3, [r7, #12] + 8002564: 687b ldr r3, [r7, #4] + 8002566: 681b ldr r3, [r3, #0] + 8002568: 689b ldr r3, [r3, #8] + 800256a: 60fb str r3, [r7, #12] tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS); - 8002514: 68fa ldr r2, [r7, #12] - 8002516: 4b4f ldr r3, [pc, #316] ; (8002654 ) - 8002518: 4013 ands r3, r2 - 800251a: 60fb str r3, [r7, #12] + 800256c: 68fa ldr r2, [r7, #12] + 800256e: 4b4f ldr r3, [pc, #316] ; (80026ac ) + 8002570: 4013 ands r3, r2 + 8002572: 60fb str r3, [r7, #12] tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); - 800251c: 68fb ldr r3, [r7, #12] - 800251e: f423 437f bic.w r3, r3, #65280 ; 0xff00 - 8002522: 60fb str r3, [r7, #12] + 8002574: 68fb ldr r3, [r7, #12] + 8002576: f423 437f bic.w r3, r3, #65280 ; 0xff00 + 800257a: 60fb str r3, [r7, #12] htim->Instance->SMCR = tmpsmcr; - 8002524: 687b ldr r3, [r7, #4] - 8002526: 681b ldr r3, [r3, #0] - 8002528: 68fa ldr r2, [r7, #12] - 800252a: 609a str r2, [r3, #8] + 800257c: 687b ldr r3, [r7, #4] + 800257e: 681b ldr r3, [r3, #0] + 8002580: 68fa ldr r2, [r7, #12] + 8002582: 609a str r2, [r3, #8] switch (sClockSourceConfig->ClockSource) - 800252c: 683b ldr r3, [r7, #0] - 800252e: 681b ldr r3, [r3, #0] - 8002530: 2b40 cmp r3, #64 ; 0x40 - 8002532: d067 beq.n 8002604 - 8002534: 2b40 cmp r3, #64 ; 0x40 - 8002536: d80b bhi.n 8002550 - 8002538: 2b10 cmp r3, #16 - 800253a: d073 beq.n 8002624 - 800253c: 2b10 cmp r3, #16 - 800253e: d802 bhi.n 8002546 - 8002540: 2b00 cmp r3, #0 - 8002542: d06f beq.n 8002624 + 8002584: 683b ldr r3, [r7, #0] + 8002586: 681b ldr r3, [r3, #0] + 8002588: 2b40 cmp r3, #64 ; 0x40 + 800258a: d067 beq.n 800265c + 800258c: 2b40 cmp r3, #64 ; 0x40 + 800258e: d80b bhi.n 80025a8 + 8002590: 2b10 cmp r3, #16 + 8002592: d073 beq.n 800267c + 8002594: 2b10 cmp r3, #16 + 8002596: d802 bhi.n 800259e + 8002598: 2b00 cmp r3, #0 + 800259a: d06f beq.n 800267c TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource); break; } default: break; - 8002544: e078 b.n 8002638 + 800259c: e078 b.n 8002690 switch (sClockSourceConfig->ClockSource) - 8002546: 2b20 cmp r3, #32 - 8002548: d06c beq.n 8002624 - 800254a: 2b30 cmp r3, #48 ; 0x30 - 800254c: d06a beq.n 8002624 + 800259e: 2b20 cmp r3, #32 + 80025a0: d06c beq.n 800267c + 80025a2: 2b30 cmp r3, #48 ; 0x30 + 80025a4: d06a beq.n 800267c break; - 800254e: e073 b.n 8002638 + 80025a6: e073 b.n 8002690 switch (sClockSourceConfig->ClockSource) - 8002550: 2b70 cmp r3, #112 ; 0x70 - 8002552: d00d beq.n 8002570 - 8002554: 2b70 cmp r3, #112 ; 0x70 - 8002556: d804 bhi.n 8002562 - 8002558: 2b50 cmp r3, #80 ; 0x50 - 800255a: d033 beq.n 80025c4 - 800255c: 2b60 cmp r3, #96 ; 0x60 - 800255e: d041 beq.n 80025e4 + 80025a8: 2b70 cmp r3, #112 ; 0x70 + 80025aa: d00d beq.n 80025c8 + 80025ac: 2b70 cmp r3, #112 ; 0x70 + 80025ae: d804 bhi.n 80025ba + 80025b0: 2b50 cmp r3, #80 ; 0x50 + 80025b2: d033 beq.n 800261c + 80025b4: 2b60 cmp r3, #96 ; 0x60 + 80025b6: d041 beq.n 800263c break; - 8002560: e06a b.n 8002638 + 80025b8: e06a b.n 8002690 switch (sClockSourceConfig->ClockSource) - 8002562: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 8002566: d066 beq.n 8002636 - 8002568: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 - 800256c: d017 beq.n 800259e + 80025ba: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 + 80025be: d066 beq.n 800268e + 80025c0: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 + 80025c4: d017 beq.n 80025f6 break; - 800256e: e063 b.n 8002638 + 80025c6: e063 b.n 8002690 TIM_ETR_SetConfig(htim->Instance, - 8002570: 687b ldr r3, [r7, #4] - 8002572: 6818 ldr r0, [r3, #0] - 8002574: 683b ldr r3, [r7, #0] - 8002576: 6899 ldr r1, [r3, #8] - 8002578: 683b ldr r3, [r7, #0] - 800257a: 685a ldr r2, [r3, #4] - 800257c: 683b ldr r3, [r7, #0] - 800257e: 68db ldr r3, [r3, #12] - 8002580: f000 f9ac bl 80028dc + 80025c8: 687b ldr r3, [r7, #4] + 80025ca: 6818 ldr r0, [r3, #0] + 80025cc: 683b ldr r3, [r7, #0] + 80025ce: 6899 ldr r1, [r3, #8] + 80025d0: 683b ldr r3, [r7, #0] + 80025d2: 685a ldr r2, [r3, #4] + 80025d4: 683b ldr r3, [r7, #0] + 80025d6: 68db ldr r3, [r3, #12] + 80025d8: f000 f9ac bl 8002934 tmpsmcr = htim->Instance->SMCR; - 8002584: 687b ldr r3, [r7, #4] - 8002586: 681b ldr r3, [r3, #0] - 8002588: 689b ldr r3, [r3, #8] - 800258a: 60fb str r3, [r7, #12] + 80025dc: 687b ldr r3, [r7, #4] + 80025de: 681b ldr r3, [r3, #0] + 80025e0: 689b ldr r3, [r3, #8] + 80025e2: 60fb str r3, [r7, #12] tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1); - 800258c: 68fb ldr r3, [r7, #12] - 800258e: f043 0377 orr.w r3, r3, #119 ; 0x77 - 8002592: 60fb str r3, [r7, #12] + 80025e4: 68fb ldr r3, [r7, #12] + 80025e6: f043 0377 orr.w r3, r3, #119 ; 0x77 + 80025ea: 60fb str r3, [r7, #12] htim->Instance->SMCR = tmpsmcr; - 8002594: 687b ldr r3, [r7, #4] - 8002596: 681b ldr r3, [r3, #0] - 8002598: 68fa ldr r2, [r7, #12] - 800259a: 609a str r2, [r3, #8] + 80025ec: 687b ldr r3, [r7, #4] + 80025ee: 681b ldr r3, [r3, #0] + 80025f0: 68fa ldr r2, [r7, #12] + 80025f2: 609a str r2, [r3, #8] break; - 800259c: e04c b.n 8002638 + 80025f4: e04c b.n 8002690 TIM_ETR_SetConfig(htim->Instance, - 800259e: 687b ldr r3, [r7, #4] - 80025a0: 6818 ldr r0, [r3, #0] - 80025a2: 683b ldr r3, [r7, #0] - 80025a4: 6899 ldr r1, [r3, #8] - 80025a6: 683b ldr r3, [r7, #0] - 80025a8: 685a ldr r2, [r3, #4] - 80025aa: 683b ldr r3, [r7, #0] - 80025ac: 68db ldr r3, [r3, #12] - 80025ae: f000 f995 bl 80028dc + 80025f6: 687b ldr r3, [r7, #4] + 80025f8: 6818 ldr r0, [r3, #0] + 80025fa: 683b ldr r3, [r7, #0] + 80025fc: 6899 ldr r1, [r3, #8] + 80025fe: 683b ldr r3, [r7, #0] + 8002600: 685a ldr r2, [r3, #4] + 8002602: 683b ldr r3, [r7, #0] + 8002604: 68db ldr r3, [r3, #12] + 8002606: f000 f995 bl 8002934 htim->Instance->SMCR |= TIM_SMCR_ECE; - 80025b2: 687b ldr r3, [r7, #4] - 80025b4: 681b ldr r3, [r3, #0] - 80025b6: 689a ldr r2, [r3, #8] - 80025b8: 687b ldr r3, [r7, #4] - 80025ba: 681b ldr r3, [r3, #0] - 80025bc: f442 4280 orr.w r2, r2, #16384 ; 0x4000 - 80025c0: 609a str r2, [r3, #8] + 800260a: 687b ldr r3, [r7, #4] + 800260c: 681b ldr r3, [r3, #0] + 800260e: 689a ldr r2, [r3, #8] + 8002610: 687b ldr r3, [r7, #4] + 8002612: 681b ldr r3, [r3, #0] + 8002614: f442 4280 orr.w r2, r2, #16384 ; 0x4000 + 8002618: 609a str r2, [r3, #8] break; - 80025c2: e039 b.n 8002638 + 800261a: e039 b.n 8002690 TIM_TI1_ConfigInputStage(htim->Instance, - 80025c4: 687b ldr r3, [r7, #4] - 80025c6: 6818 ldr r0, [r3, #0] - 80025c8: 683b ldr r3, [r7, #0] - 80025ca: 6859 ldr r1, [r3, #4] - 80025cc: 683b ldr r3, [r7, #0] - 80025ce: 68db ldr r3, [r3, #12] - 80025d0: 461a mov r2, r3 - 80025d2: f000 f909 bl 80027e8 + 800261c: 687b ldr r3, [r7, #4] + 800261e: 6818 ldr r0, [r3, #0] + 8002620: 683b ldr r3, [r7, #0] + 8002622: 6859 ldr r1, [r3, #4] + 8002624: 683b ldr r3, [r7, #0] + 8002626: 68db ldr r3, [r3, #12] + 8002628: 461a mov r2, r3 + 800262a: f000 f909 bl 8002840 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1); - 80025d6: 687b ldr r3, [r7, #4] - 80025d8: 681b ldr r3, [r3, #0] - 80025da: 2150 movs r1, #80 ; 0x50 - 80025dc: 4618 mov r0, r3 - 80025de: f000 f962 bl 80028a6 + 800262e: 687b ldr r3, [r7, #4] + 8002630: 681b ldr r3, [r3, #0] + 8002632: 2150 movs r1, #80 ; 0x50 + 8002634: 4618 mov r0, r3 + 8002636: f000 f962 bl 80028fe break; - 80025e2: e029 b.n 8002638 + 800263a: e029 b.n 8002690 TIM_TI2_ConfigInputStage(htim->Instance, - 80025e4: 687b ldr r3, [r7, #4] - 80025e6: 6818 ldr r0, [r3, #0] - 80025e8: 683b ldr r3, [r7, #0] - 80025ea: 6859 ldr r1, [r3, #4] - 80025ec: 683b ldr r3, [r7, #0] - 80025ee: 68db ldr r3, [r3, #12] - 80025f0: 461a mov r2, r3 - 80025f2: f000 f928 bl 8002846 + 800263c: 687b ldr r3, [r7, #4] + 800263e: 6818 ldr r0, [r3, #0] + 8002640: 683b ldr r3, [r7, #0] + 8002642: 6859 ldr r1, [r3, #4] + 8002644: 683b ldr r3, [r7, #0] + 8002646: 68db ldr r3, [r3, #12] + 8002648: 461a mov r2, r3 + 800264a: f000 f928 bl 800289e TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2); - 80025f6: 687b ldr r3, [r7, #4] - 80025f8: 681b ldr r3, [r3, #0] - 80025fa: 2160 movs r1, #96 ; 0x60 - 80025fc: 4618 mov r0, r3 - 80025fe: f000 f952 bl 80028a6 + 800264e: 687b ldr r3, [r7, #4] + 8002650: 681b ldr r3, [r3, #0] + 8002652: 2160 movs r1, #96 ; 0x60 + 8002654: 4618 mov r0, r3 + 8002656: f000 f952 bl 80028fe break; - 8002602: e019 b.n 8002638 + 800265a: e019 b.n 8002690 TIM_TI1_ConfigInputStage(htim->Instance, - 8002604: 687b ldr r3, [r7, #4] - 8002606: 6818 ldr r0, [r3, #0] - 8002608: 683b ldr r3, [r7, #0] - 800260a: 6859 ldr r1, [r3, #4] - 800260c: 683b ldr r3, [r7, #0] - 800260e: 68db ldr r3, [r3, #12] - 8002610: 461a mov r2, r3 - 8002612: f000 f8e9 bl 80027e8 + 800265c: 687b ldr r3, [r7, #4] + 800265e: 6818 ldr r0, [r3, #0] + 8002660: 683b ldr r3, [r7, #0] + 8002662: 6859 ldr r1, [r3, #4] + 8002664: 683b ldr r3, [r7, #0] + 8002666: 68db ldr r3, [r3, #12] + 8002668: 461a mov r2, r3 + 800266a: f000 f8e9 bl 8002840 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED); - 8002616: 687b ldr r3, [r7, #4] - 8002618: 681b ldr r3, [r3, #0] - 800261a: 2140 movs r1, #64 ; 0x40 - 800261c: 4618 mov r0, r3 - 800261e: f000 f942 bl 80028a6 + 800266e: 687b ldr r3, [r7, #4] + 8002670: 681b ldr r3, [r3, #0] + 8002672: 2140 movs r1, #64 ; 0x40 + 8002674: 4618 mov r0, r3 + 8002676: f000 f942 bl 80028fe break; - 8002622: e009 b.n 8002638 + 800267a: e009 b.n 8002690 TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource); - 8002624: 687b ldr r3, [r7, #4] - 8002626: 681a ldr r2, [r3, #0] - 8002628: 683b ldr r3, [r7, #0] - 800262a: 681b ldr r3, [r3, #0] - 800262c: 4619 mov r1, r3 - 800262e: 4610 mov r0, r2 - 8002630: f000 f939 bl 80028a6 + 800267c: 687b ldr r3, [r7, #4] + 800267e: 681a ldr r2, [r3, #0] + 8002680: 683b ldr r3, [r7, #0] + 8002682: 681b ldr r3, [r3, #0] + 8002684: 4619 mov r1, r3 + 8002686: 4610 mov r0, r2 + 8002688: f000 f939 bl 80028fe break; - 8002634: e000 b.n 8002638 + 800268c: e000 b.n 8002690 break; - 8002636: bf00 nop + 800268e: bf00 nop } htim->State = HAL_TIM_STATE_READY; - 8002638: 687b ldr r3, [r7, #4] - 800263a: 2201 movs r2, #1 - 800263c: f883 203d strb.w r2, [r3, #61] ; 0x3d + 8002690: 687b ldr r3, [r7, #4] + 8002692: 2201 movs r2, #1 + 8002694: f883 203d strb.w r2, [r3, #61] ; 0x3d __HAL_UNLOCK(htim); - 8002640: 687b ldr r3, [r7, #4] - 8002642: 2200 movs r2, #0 - 8002644: f883 203c strb.w r2, [r3, #60] ; 0x3c + 8002698: 687b ldr r3, [r7, #4] + 800269a: 2200 movs r2, #0 + 800269c: f883 203c strb.w r2, [r3, #60] ; 0x3c return HAL_OK; - 8002648: 2300 movs r3, #0 + 80026a0: 2300 movs r3, #0 } - 800264a: 4618 mov r0, r3 - 800264c: 3710 adds r7, #16 - 800264e: 46bd mov sp, r7 - 8002650: bd80 pop {r7, pc} - 8002652: bf00 nop - 8002654: fffeff88 .word 0xfffeff88 - -08002658 : + 80026a2: 4618 mov r0, r3 + 80026a4: 3710 adds r7, #16 + 80026a6: 46bd mov sp, r7 + 80026a8: bd80 pop {r7, pc} + 80026aa: bf00 nop + 80026ac: fffeff88 .word 0xfffeff88 + +080026b0 : * @brief Output Compare callback in non-blocking mode * @param htim TIM OC handle * @retval None */ __weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim) { - 8002658: b480 push {r7} - 800265a: b083 sub sp, #12 - 800265c: af00 add r7, sp, #0 - 800265e: 6078 str r0, [r7, #4] + 80026b0: b480 push {r7} + 80026b2: b083 sub sp, #12 + 80026b4: af00 add r7, sp, #0 + 80026b6: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file */ } - 8002660: bf00 nop - 8002662: 370c adds r7, #12 - 8002664: 46bd mov sp, r7 - 8002666: f85d 7b04 ldr.w r7, [sp], #4 - 800266a: 4770 bx lr + 80026b8: bf00 nop + 80026ba: 370c adds r7, #12 + 80026bc: 46bd mov sp, r7 + 80026be: f85d 7b04 ldr.w r7, [sp], #4 + 80026c2: 4770 bx lr -0800266c : +080026c4 : * @brief Input Capture callback in non-blocking mode * @param htim TIM IC handle * @retval None */ __weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim) { - 800266c: b480 push {r7} - 800266e: b083 sub sp, #12 - 8002670: af00 add r7, sp, #0 - 8002672: 6078 str r0, [r7, #4] + 80026c4: b480 push {r7} + 80026c6: b083 sub sp, #12 + 80026c8: af00 add r7, sp, #0 + 80026ca: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_IC_CaptureCallback could be implemented in the user file */ } - 8002674: bf00 nop - 8002676: 370c adds r7, #12 - 8002678: 46bd mov sp, r7 - 800267a: f85d 7b04 ldr.w r7, [sp], #4 - 800267e: 4770 bx lr + 80026cc: bf00 nop + 80026ce: 370c adds r7, #12 + 80026d0: 46bd mov sp, r7 + 80026d2: f85d 7b04 ldr.w r7, [sp], #4 + 80026d6: 4770 bx lr -08002680 : +080026d8 : * @brief PWM Pulse finished callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim) { - 8002680: b480 push {r7} - 8002682: b083 sub sp, #12 - 8002684: af00 add r7, sp, #0 - 8002686: 6078 str r0, [r7, #4] + 80026d8: b480 push {r7} + 80026da: b083 sub sp, #12 + 80026dc: af00 add r7, sp, #0 + 80026de: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file */ } - 8002688: bf00 nop - 800268a: 370c adds r7, #12 - 800268c: 46bd mov sp, r7 - 800268e: f85d 7b04 ldr.w r7, [sp], #4 - 8002692: 4770 bx lr + 80026e0: bf00 nop + 80026e2: 370c adds r7, #12 + 80026e4: 46bd mov sp, r7 + 80026e6: f85d 7b04 ldr.w r7, [sp], #4 + 80026ea: 4770 bx lr -08002694 : +080026ec : * @brief Hall Trigger detection callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim) { - 8002694: b480 push {r7} - 8002696: b083 sub sp, #12 - 8002698: af00 add r7, sp, #0 - 800269a: 6078 str r0, [r7, #4] + 80026ec: b480 push {r7} + 80026ee: b083 sub sp, #12 + 80026f0: af00 add r7, sp, #0 + 80026f2: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_TriggerCallback could be implemented in the user file */ } - 800269c: bf00 nop - 800269e: 370c adds r7, #12 - 80026a0: 46bd mov sp, r7 - 80026a2: f85d 7b04 ldr.w r7, [sp], #4 - 80026a6: 4770 bx lr + 80026f4: bf00 nop + 80026f6: 370c adds r7, #12 + 80026f8: 46bd mov sp, r7 + 80026fa: f85d 7b04 ldr.w r7, [sp], #4 + 80026fe: 4770 bx lr -080026a8 : +08002700 : * @param TIMx TIM peripheral * @param Structure TIM Base configuration structure * @retval None */ void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure) { - 80026a8: b480 push {r7} - 80026aa: b085 sub sp, #20 - 80026ac: af00 add r7, sp, #0 - 80026ae: 6078 str r0, [r7, #4] - 80026b0: 6039 str r1, [r7, #0] + 8002700: b480 push {r7} + 8002702: b085 sub sp, #20 + 8002704: af00 add r7, sp, #0 + 8002706: 6078 str r0, [r7, #4] + 8002708: 6039 str r1, [r7, #0] uint32_t tmpcr1; tmpcr1 = TIMx->CR1; - 80026b2: 687b ldr r3, [r7, #4] - 80026b4: 681b ldr r3, [r3, #0] - 80026b6: 60fb str r3, [r7, #12] + 800270a: 687b ldr r3, [r7, #4] + 800270c: 681b ldr r3, [r3, #0] + 800270e: 60fb str r3, [r7, #12] /* Set TIM Time Base Unit parameters ---------------------------------------*/ if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) - 80026b8: 687b ldr r3, [r7, #4] - 80026ba: 4a40 ldr r2, [pc, #256] ; (80027bc ) - 80026bc: 4293 cmp r3, r2 - 80026be: d013 beq.n 80026e8 - 80026c0: 687b ldr r3, [r7, #4] - 80026c2: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 - 80026c6: d00f beq.n 80026e8 - 80026c8: 687b ldr r3, [r7, #4] - 80026ca: 4a3d ldr r2, [pc, #244] ; (80027c0 ) - 80026cc: 4293 cmp r3, r2 - 80026ce: d00b beq.n 80026e8 - 80026d0: 687b ldr r3, [r7, #4] - 80026d2: 4a3c ldr r2, [pc, #240] ; (80027c4 ) - 80026d4: 4293 cmp r3, r2 - 80026d6: d007 beq.n 80026e8 - 80026d8: 687b ldr r3, [r7, #4] - 80026da: 4a3b ldr r2, [pc, #236] ; (80027c8 ) - 80026dc: 4293 cmp r3, r2 - 80026de: d003 beq.n 80026e8 - 80026e0: 687b ldr r3, [r7, #4] - 80026e2: 4a3a ldr r2, [pc, #232] ; (80027cc ) - 80026e4: 4293 cmp r3, r2 - 80026e6: d108 bne.n 80026fa + 8002710: 687b ldr r3, [r7, #4] + 8002712: 4a40 ldr r2, [pc, #256] ; (8002814 ) + 8002714: 4293 cmp r3, r2 + 8002716: d013 beq.n 8002740 + 8002718: 687b ldr r3, [r7, #4] + 800271a: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 + 800271e: d00f beq.n 8002740 + 8002720: 687b ldr r3, [r7, #4] + 8002722: 4a3d ldr r2, [pc, #244] ; (8002818 ) + 8002724: 4293 cmp r3, r2 + 8002726: d00b beq.n 8002740 + 8002728: 687b ldr r3, [r7, #4] + 800272a: 4a3c ldr r2, [pc, #240] ; (800281c ) + 800272c: 4293 cmp r3, r2 + 800272e: d007 beq.n 8002740 + 8002730: 687b ldr r3, [r7, #4] + 8002732: 4a3b ldr r2, [pc, #236] ; (8002820 ) + 8002734: 4293 cmp r3, r2 + 8002736: d003 beq.n 8002740 + 8002738: 687b ldr r3, [r7, #4] + 800273a: 4a3a ldr r2, [pc, #232] ; (8002824 ) + 800273c: 4293 cmp r3, r2 + 800273e: d108 bne.n 8002752 { /* Select the Counter Mode */ tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); - 80026e8: 68fb ldr r3, [r7, #12] - 80026ea: f023 0370 bic.w r3, r3, #112 ; 0x70 - 80026ee: 60fb str r3, [r7, #12] + 8002740: 68fb ldr r3, [r7, #12] + 8002742: f023 0370 bic.w r3, r3, #112 ; 0x70 + 8002746: 60fb str r3, [r7, #12] tmpcr1 |= Structure->CounterMode; - 80026f0: 683b ldr r3, [r7, #0] - 80026f2: 685b ldr r3, [r3, #4] - 80026f4: 68fa ldr r2, [r7, #12] - 80026f6: 4313 orrs r3, r2 - 80026f8: 60fb str r3, [r7, #12] + 8002748: 683b ldr r3, [r7, #0] + 800274a: 685b ldr r3, [r3, #4] + 800274c: 68fa ldr r2, [r7, #12] + 800274e: 4313 orrs r3, r2 + 8002750: 60fb str r3, [r7, #12] } if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) - 80026fa: 687b ldr r3, [r7, #4] - 80026fc: 4a2f ldr r2, [pc, #188] ; (80027bc ) - 80026fe: 4293 cmp r3, r2 - 8002700: d02b beq.n 800275a - 8002702: 687b ldr r3, [r7, #4] - 8002704: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 - 8002708: d027 beq.n 800275a - 800270a: 687b ldr r3, [r7, #4] - 800270c: 4a2c ldr r2, [pc, #176] ; (80027c0 ) - 800270e: 4293 cmp r3, r2 - 8002710: d023 beq.n 800275a - 8002712: 687b ldr r3, [r7, #4] - 8002714: 4a2b ldr r2, [pc, #172] ; (80027c4 ) - 8002716: 4293 cmp r3, r2 - 8002718: d01f beq.n 800275a - 800271a: 687b ldr r3, [r7, #4] - 800271c: 4a2a ldr r2, [pc, #168] ; (80027c8 ) - 800271e: 4293 cmp r3, r2 - 8002720: d01b beq.n 800275a - 8002722: 687b ldr r3, [r7, #4] - 8002724: 4a29 ldr r2, [pc, #164] ; (80027cc ) - 8002726: 4293 cmp r3, r2 - 8002728: d017 beq.n 800275a - 800272a: 687b ldr r3, [r7, #4] - 800272c: 4a28 ldr r2, [pc, #160] ; (80027d0 ) - 800272e: 4293 cmp r3, r2 - 8002730: d013 beq.n 800275a - 8002732: 687b ldr r3, [r7, #4] - 8002734: 4a27 ldr r2, [pc, #156] ; (80027d4 ) - 8002736: 4293 cmp r3, r2 - 8002738: d00f beq.n 800275a - 800273a: 687b ldr r3, [r7, #4] - 800273c: 4a26 ldr r2, [pc, #152] ; (80027d8 ) - 800273e: 4293 cmp r3, r2 - 8002740: d00b beq.n 800275a - 8002742: 687b ldr r3, [r7, #4] - 8002744: 4a25 ldr r2, [pc, #148] ; (80027dc ) - 8002746: 4293 cmp r3, r2 - 8002748: d007 beq.n 800275a - 800274a: 687b ldr r3, [r7, #4] - 800274c: 4a24 ldr r2, [pc, #144] ; (80027e0 ) - 800274e: 4293 cmp r3, r2 - 8002750: d003 beq.n 800275a 8002752: 687b ldr r3, [r7, #4] - 8002754: 4a23 ldr r2, [pc, #140] ; (80027e4 ) + 8002754: 4a2f ldr r2, [pc, #188] ; (8002814 ) 8002756: 4293 cmp r3, r2 - 8002758: d108 bne.n 800276c + 8002758: d02b beq.n 80027b2 + 800275a: 687b ldr r3, [r7, #4] + 800275c: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 + 8002760: d027 beq.n 80027b2 + 8002762: 687b ldr r3, [r7, #4] + 8002764: 4a2c ldr r2, [pc, #176] ; (8002818 ) + 8002766: 4293 cmp r3, r2 + 8002768: d023 beq.n 80027b2 + 800276a: 687b ldr r3, [r7, #4] + 800276c: 4a2b ldr r2, [pc, #172] ; (800281c ) + 800276e: 4293 cmp r3, r2 + 8002770: d01f beq.n 80027b2 + 8002772: 687b ldr r3, [r7, #4] + 8002774: 4a2a ldr r2, [pc, #168] ; (8002820 ) + 8002776: 4293 cmp r3, r2 + 8002778: d01b beq.n 80027b2 + 800277a: 687b ldr r3, [r7, #4] + 800277c: 4a29 ldr r2, [pc, #164] ; (8002824 ) + 800277e: 4293 cmp r3, r2 + 8002780: d017 beq.n 80027b2 + 8002782: 687b ldr r3, [r7, #4] + 8002784: 4a28 ldr r2, [pc, #160] ; (8002828 ) + 8002786: 4293 cmp r3, r2 + 8002788: d013 beq.n 80027b2 + 800278a: 687b ldr r3, [r7, #4] + 800278c: 4a27 ldr r2, [pc, #156] ; (800282c ) + 800278e: 4293 cmp r3, r2 + 8002790: d00f beq.n 80027b2 + 8002792: 687b ldr r3, [r7, #4] + 8002794: 4a26 ldr r2, [pc, #152] ; (8002830 ) + 8002796: 4293 cmp r3, r2 + 8002798: d00b beq.n 80027b2 + 800279a: 687b ldr r3, [r7, #4] + 800279c: 4a25 ldr r2, [pc, #148] ; (8002834 ) + 800279e: 4293 cmp r3, r2 + 80027a0: d007 beq.n 80027b2 + 80027a2: 687b ldr r3, [r7, #4] + 80027a4: 4a24 ldr r2, [pc, #144] ; (8002838 ) + 80027a6: 4293 cmp r3, r2 + 80027a8: d003 beq.n 80027b2 + 80027aa: 687b ldr r3, [r7, #4] + 80027ac: 4a23 ldr r2, [pc, #140] ; (800283c ) + 80027ae: 4293 cmp r3, r2 + 80027b0: d108 bne.n 80027c4 { /* Set the clock division */ tmpcr1 &= ~TIM_CR1_CKD; - 800275a: 68fb ldr r3, [r7, #12] - 800275c: f423 7340 bic.w r3, r3, #768 ; 0x300 - 8002760: 60fb str r3, [r7, #12] + 80027b2: 68fb ldr r3, [r7, #12] + 80027b4: f423 7340 bic.w r3, r3, #768 ; 0x300 + 80027b8: 60fb str r3, [r7, #12] tmpcr1 |= (uint32_t)Structure->ClockDivision; - 8002762: 683b ldr r3, [r7, #0] - 8002764: 68db ldr r3, [r3, #12] - 8002766: 68fa ldr r2, [r7, #12] - 8002768: 4313 orrs r3, r2 - 800276a: 60fb str r3, [r7, #12] + 80027ba: 683b ldr r3, [r7, #0] + 80027bc: 68db ldr r3, [r3, #12] + 80027be: 68fa ldr r2, [r7, #12] + 80027c0: 4313 orrs r3, r2 + 80027c2: 60fb str r3, [r7, #12] } /* Set the auto-reload preload */ MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); - 800276c: 68fb ldr r3, [r7, #12] - 800276e: f023 0280 bic.w r2, r3, #128 ; 0x80 - 8002772: 683b ldr r3, [r7, #0] - 8002774: 695b ldr r3, [r3, #20] - 8002776: 4313 orrs r3, r2 - 8002778: 60fb str r3, [r7, #12] + 80027c4: 68fb ldr r3, [r7, #12] + 80027c6: f023 0280 bic.w r2, r3, #128 ; 0x80 + 80027ca: 683b ldr r3, [r7, #0] + 80027cc: 695b ldr r3, [r3, #20] + 80027ce: 4313 orrs r3, r2 + 80027d0: 60fb str r3, [r7, #12] TIMx->CR1 = tmpcr1; - 800277a: 687b ldr r3, [r7, #4] - 800277c: 68fa ldr r2, [r7, #12] - 800277e: 601a str r2, [r3, #0] + 80027d2: 687b ldr r3, [r7, #4] + 80027d4: 68fa ldr r2, [r7, #12] + 80027d6: 601a str r2, [r3, #0] /* Set the Autoreload value */ TIMx->ARR = (uint32_t)Structure->Period ; - 8002780: 683b ldr r3, [r7, #0] - 8002782: 689a ldr r2, [r3, #8] - 8002784: 687b ldr r3, [r7, #4] - 8002786: 62da str r2, [r3, #44] ; 0x2c + 80027d8: 683b ldr r3, [r7, #0] + 80027da: 689a ldr r2, [r3, #8] + 80027dc: 687b ldr r3, [r7, #4] + 80027de: 62da str r2, [r3, #44] ; 0x2c /* Set the Prescaler value */ TIMx->PSC = Structure->Prescaler; - 8002788: 683b ldr r3, [r7, #0] - 800278a: 681a ldr r2, [r3, #0] - 800278c: 687b ldr r3, [r7, #4] - 800278e: 629a str r2, [r3, #40] ; 0x28 + 80027e0: 683b ldr r3, [r7, #0] + 80027e2: 681a ldr r2, [r3, #0] + 80027e4: 687b ldr r3, [r7, #4] + 80027e6: 629a str r2, [r3, #40] ; 0x28 if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) - 8002790: 687b ldr r3, [r7, #4] - 8002792: 4a0a ldr r2, [pc, #40] ; (80027bc ) - 8002794: 4293 cmp r3, r2 - 8002796: d003 beq.n 80027a0 - 8002798: 687b ldr r3, [r7, #4] - 800279a: 4a0c ldr r2, [pc, #48] ; (80027cc ) - 800279c: 4293 cmp r3, r2 - 800279e: d103 bne.n 80027a8 + 80027e8: 687b ldr r3, [r7, #4] + 80027ea: 4a0a ldr r2, [pc, #40] ; (8002814 ) + 80027ec: 4293 cmp r3, r2 + 80027ee: d003 beq.n 80027f8 + 80027f0: 687b ldr r3, [r7, #4] + 80027f2: 4a0c ldr r2, [pc, #48] ; (8002824 ) + 80027f4: 4293 cmp r3, r2 + 80027f6: d103 bne.n 8002800 { /* Set the Repetition Counter value */ TIMx->RCR = Structure->RepetitionCounter; - 80027a0: 683b ldr r3, [r7, #0] - 80027a2: 691a ldr r2, [r3, #16] - 80027a4: 687b ldr r3, [r7, #4] - 80027a6: 631a str r2, [r3, #48] ; 0x30 + 80027f8: 683b ldr r3, [r7, #0] + 80027fa: 691a ldr r2, [r3, #16] + 80027fc: 687b ldr r3, [r7, #4] + 80027fe: 631a str r2, [r3, #48] ; 0x30 } /* Generate an update event to reload the Prescaler and the repetition counter (only for advanced timer) value immediately */ TIMx->EGR = TIM_EGR_UG; - 80027a8: 687b ldr r3, [r7, #4] - 80027aa: 2201 movs r2, #1 - 80027ac: 615a str r2, [r3, #20] + 8002800: 687b ldr r3, [r7, #4] + 8002802: 2201 movs r2, #1 + 8002804: 615a str r2, [r3, #20] } - 80027ae: bf00 nop - 80027b0: 3714 adds r7, #20 - 80027b2: 46bd mov sp, r7 - 80027b4: f85d 7b04 ldr.w r7, [sp], #4 - 80027b8: 4770 bx lr - 80027ba: bf00 nop - 80027bc: 40010000 .word 0x40010000 - 80027c0: 40000400 .word 0x40000400 - 80027c4: 40000800 .word 0x40000800 - 80027c8: 40000c00 .word 0x40000c00 - 80027cc: 40010400 .word 0x40010400 - 80027d0: 40014000 .word 0x40014000 - 80027d4: 40014400 .word 0x40014400 - 80027d8: 40014800 .word 0x40014800 - 80027dc: 40001800 .word 0x40001800 - 80027e0: 40001c00 .word 0x40001c00 - 80027e4: 40002000 .word 0x40002000 - -080027e8 : + 8002806: bf00 nop + 8002808: 3714 adds r7, #20 + 800280a: 46bd mov sp, r7 + 800280c: f85d 7b04 ldr.w r7, [sp], #4 + 8002810: 4770 bx lr + 8002812: bf00 nop + 8002814: 40010000 .word 0x40010000 + 8002818: 40000400 .word 0x40000400 + 800281c: 40000800 .word 0x40000800 + 8002820: 40000c00 .word 0x40000c00 + 8002824: 40010400 .word 0x40010400 + 8002828: 40014000 .word 0x40014000 + 800282c: 40014400 .word 0x40014400 + 8002830: 40014800 .word 0x40014800 + 8002834: 40001800 .word 0x40001800 + 8002838: 40001c00 .word 0x40001c00 + 800283c: 40002000 .word 0x40002000 + +08002840 : * @param TIM_ICFilter Specifies the Input Capture Filter. * This parameter must be a value between 0x00 and 0x0F. * @retval None */ static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) { - 80027e8: b480 push {r7} - 80027ea: b087 sub sp, #28 - 80027ec: af00 add r7, sp, #0 - 80027ee: 60f8 str r0, [r7, #12] - 80027f0: 60b9 str r1, [r7, #8] - 80027f2: 607a str r2, [r7, #4] + 8002840: b480 push {r7} + 8002842: b087 sub sp, #28 + 8002844: af00 add r7, sp, #0 + 8002846: 60f8 str r0, [r7, #12] + 8002848: 60b9 str r1, [r7, #8] + 800284a: 607a str r2, [r7, #4] uint32_t tmpccmr1; uint32_t tmpccer; /* Disable the Channel 1: Reset the CC1E Bit */ tmpccer = TIMx->CCER; - 80027f4: 68fb ldr r3, [r7, #12] - 80027f6: 6a1b ldr r3, [r3, #32] - 80027f8: 617b str r3, [r7, #20] + 800284c: 68fb ldr r3, [r7, #12] + 800284e: 6a1b ldr r3, [r3, #32] + 8002850: 617b str r3, [r7, #20] TIMx->CCER &= ~TIM_CCER_CC1E; - 80027fa: 68fb ldr r3, [r7, #12] - 80027fc: 6a1b ldr r3, [r3, #32] - 80027fe: f023 0201 bic.w r2, r3, #1 - 8002802: 68fb ldr r3, [r7, #12] - 8002804: 621a str r2, [r3, #32] + 8002852: 68fb ldr r3, [r7, #12] + 8002854: 6a1b ldr r3, [r3, #32] + 8002856: f023 0201 bic.w r2, r3, #1 + 800285a: 68fb ldr r3, [r7, #12] + 800285c: 621a str r2, [r3, #32] tmpccmr1 = TIMx->CCMR1; - 8002806: 68fb ldr r3, [r7, #12] - 8002808: 699b ldr r3, [r3, #24] - 800280a: 613b str r3, [r7, #16] + 800285e: 68fb ldr r3, [r7, #12] + 8002860: 699b ldr r3, [r3, #24] + 8002862: 613b str r3, [r7, #16] /* Set the filter */ tmpccmr1 &= ~TIM_CCMR1_IC1F; - 800280c: 693b ldr r3, [r7, #16] - 800280e: f023 03f0 bic.w r3, r3, #240 ; 0xf0 - 8002812: 613b str r3, [r7, #16] + 8002864: 693b ldr r3, [r7, #16] + 8002866: f023 03f0 bic.w r3, r3, #240 ; 0xf0 + 800286a: 613b str r3, [r7, #16] tmpccmr1 |= (TIM_ICFilter << 4U); - 8002814: 687b ldr r3, [r7, #4] - 8002816: 011b lsls r3, r3, #4 - 8002818: 693a ldr r2, [r7, #16] - 800281a: 4313 orrs r3, r2 - 800281c: 613b str r3, [r7, #16] + 800286c: 687b ldr r3, [r7, #4] + 800286e: 011b lsls r3, r3, #4 + 8002870: 693a ldr r2, [r7, #16] + 8002872: 4313 orrs r3, r2 + 8002874: 613b str r3, [r7, #16] /* Select the Polarity and set the CC1E Bit */ tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP); - 800281e: 697b ldr r3, [r7, #20] - 8002820: f023 030a bic.w r3, r3, #10 - 8002824: 617b str r3, [r7, #20] + 8002876: 697b ldr r3, [r7, #20] + 8002878: f023 030a bic.w r3, r3, #10 + 800287c: 617b str r3, [r7, #20] tmpccer |= TIM_ICPolarity; - 8002826: 697a ldr r2, [r7, #20] - 8002828: 68bb ldr r3, [r7, #8] - 800282a: 4313 orrs r3, r2 - 800282c: 617b str r3, [r7, #20] + 800287e: 697a ldr r2, [r7, #20] + 8002880: 68bb ldr r3, [r7, #8] + 8002882: 4313 orrs r3, r2 + 8002884: 617b str r3, [r7, #20] /* Write to TIMx CCMR1 and CCER registers */ TIMx->CCMR1 = tmpccmr1; - 800282e: 68fb ldr r3, [r7, #12] - 8002830: 693a ldr r2, [r7, #16] - 8002832: 619a str r2, [r3, #24] + 8002886: 68fb ldr r3, [r7, #12] + 8002888: 693a ldr r2, [r7, #16] + 800288a: 619a str r2, [r3, #24] TIMx->CCER = tmpccer; - 8002834: 68fb ldr r3, [r7, #12] - 8002836: 697a ldr r2, [r7, #20] - 8002838: 621a str r2, [r3, #32] + 800288c: 68fb ldr r3, [r7, #12] + 800288e: 697a ldr r2, [r7, #20] + 8002890: 621a str r2, [r3, #32] } - 800283a: bf00 nop - 800283c: 371c adds r7, #28 - 800283e: 46bd mov sp, r7 - 8002840: f85d 7b04 ldr.w r7, [sp], #4 - 8002844: 4770 bx lr + 8002892: bf00 nop + 8002894: 371c adds r7, #28 + 8002896: 46bd mov sp, r7 + 8002898: f85d 7b04 ldr.w r7, [sp], #4 + 800289c: 4770 bx lr -08002846 : +0800289e : * @param TIM_ICFilter Specifies the Input Capture Filter. * This parameter must be a value between 0x00 and 0x0F. * @retval None */ static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) { - 8002846: b480 push {r7} - 8002848: b087 sub sp, #28 - 800284a: af00 add r7, sp, #0 - 800284c: 60f8 str r0, [r7, #12] - 800284e: 60b9 str r1, [r7, #8] - 8002850: 607a str r2, [r7, #4] + 800289e: b480 push {r7} + 80028a0: b087 sub sp, #28 + 80028a2: af00 add r7, sp, #0 + 80028a4: 60f8 str r0, [r7, #12] + 80028a6: 60b9 str r1, [r7, #8] + 80028a8: 607a str r2, [r7, #4] uint32_t tmpccmr1; uint32_t tmpccer; /* Disable the Channel 2: Reset the CC2E Bit */ TIMx->CCER &= ~TIM_CCER_CC2E; - 8002852: 68fb ldr r3, [r7, #12] - 8002854: 6a1b ldr r3, [r3, #32] - 8002856: f023 0210 bic.w r2, r3, #16 - 800285a: 68fb ldr r3, [r7, #12] - 800285c: 621a str r2, [r3, #32] + 80028aa: 68fb ldr r3, [r7, #12] + 80028ac: 6a1b ldr r3, [r3, #32] + 80028ae: f023 0210 bic.w r2, r3, #16 + 80028b2: 68fb ldr r3, [r7, #12] + 80028b4: 621a str r2, [r3, #32] tmpccmr1 = TIMx->CCMR1; - 800285e: 68fb ldr r3, [r7, #12] - 8002860: 699b ldr r3, [r3, #24] - 8002862: 617b str r3, [r7, #20] + 80028b6: 68fb ldr r3, [r7, #12] + 80028b8: 699b ldr r3, [r3, #24] + 80028ba: 617b str r3, [r7, #20] tmpccer = TIMx->CCER; - 8002864: 68fb ldr r3, [r7, #12] - 8002866: 6a1b ldr r3, [r3, #32] - 8002868: 613b str r3, [r7, #16] + 80028bc: 68fb ldr r3, [r7, #12] + 80028be: 6a1b ldr r3, [r3, #32] + 80028c0: 613b str r3, [r7, #16] /* Set the filter */ tmpccmr1 &= ~TIM_CCMR1_IC2F; - 800286a: 697b ldr r3, [r7, #20] - 800286c: f423 4370 bic.w r3, r3, #61440 ; 0xf000 - 8002870: 617b str r3, [r7, #20] + 80028c2: 697b ldr r3, [r7, #20] + 80028c4: f423 4370 bic.w r3, r3, #61440 ; 0xf000 + 80028c8: 617b str r3, [r7, #20] tmpccmr1 |= (TIM_ICFilter << 12U); - 8002872: 687b ldr r3, [r7, #4] - 8002874: 031b lsls r3, r3, #12 - 8002876: 697a ldr r2, [r7, #20] - 8002878: 4313 orrs r3, r2 - 800287a: 617b str r3, [r7, #20] + 80028ca: 687b ldr r3, [r7, #4] + 80028cc: 031b lsls r3, r3, #12 + 80028ce: 697a ldr r2, [r7, #20] + 80028d0: 4313 orrs r3, r2 + 80028d2: 617b str r3, [r7, #20] /* Select the Polarity and set the CC2E Bit */ tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP); - 800287c: 693b ldr r3, [r7, #16] - 800287e: f023 03a0 bic.w r3, r3, #160 ; 0xa0 - 8002882: 613b str r3, [r7, #16] + 80028d4: 693b ldr r3, [r7, #16] + 80028d6: f023 03a0 bic.w r3, r3, #160 ; 0xa0 + 80028da: 613b str r3, [r7, #16] tmpccer |= (TIM_ICPolarity << 4U); - 8002884: 68bb ldr r3, [r7, #8] - 8002886: 011b lsls r3, r3, #4 - 8002888: 693a ldr r2, [r7, #16] - 800288a: 4313 orrs r3, r2 - 800288c: 613b str r3, [r7, #16] + 80028dc: 68bb ldr r3, [r7, #8] + 80028de: 011b lsls r3, r3, #4 + 80028e0: 693a ldr r2, [r7, #16] + 80028e2: 4313 orrs r3, r2 + 80028e4: 613b str r3, [r7, #16] /* Write to TIMx CCMR1 and CCER registers */ TIMx->CCMR1 = tmpccmr1 ; - 800288e: 68fb ldr r3, [r7, #12] - 8002890: 697a ldr r2, [r7, #20] - 8002892: 619a str r2, [r3, #24] + 80028e6: 68fb ldr r3, [r7, #12] + 80028e8: 697a ldr r2, [r7, #20] + 80028ea: 619a str r2, [r3, #24] TIMx->CCER = tmpccer; - 8002894: 68fb ldr r3, [r7, #12] - 8002896: 693a ldr r2, [r7, #16] - 8002898: 621a str r2, [r3, #32] + 80028ec: 68fb ldr r3, [r7, #12] + 80028ee: 693a ldr r2, [r7, #16] + 80028f0: 621a str r2, [r3, #32] } - 800289a: bf00 nop - 800289c: 371c adds r7, #28 - 800289e: 46bd mov sp, r7 - 80028a0: f85d 7b04 ldr.w r7, [sp], #4 - 80028a4: 4770 bx lr + 80028f2: bf00 nop + 80028f4: 371c adds r7, #28 + 80028f6: 46bd mov sp, r7 + 80028f8: f85d 7b04 ldr.w r7, [sp], #4 + 80028fc: 4770 bx lr -080028a6 : +080028fe : * @arg TIM_TS_TI2FP2: Filtered Timer Input 2 * @arg TIM_TS_ETRF: External Trigger input * @retval None */ static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource) { - 80028a6: b480 push {r7} - 80028a8: b085 sub sp, #20 - 80028aa: af00 add r7, sp, #0 - 80028ac: 6078 str r0, [r7, #4] - 80028ae: 6039 str r1, [r7, #0] + 80028fe: b480 push {r7} + 8002900: b085 sub sp, #20 + 8002902: af00 add r7, sp, #0 + 8002904: 6078 str r0, [r7, #4] + 8002906: 6039 str r1, [r7, #0] uint32_t tmpsmcr; /* Get the TIMx SMCR register value */ tmpsmcr = TIMx->SMCR; - 80028b0: 687b ldr r3, [r7, #4] - 80028b2: 689b ldr r3, [r3, #8] - 80028b4: 60fb str r3, [r7, #12] + 8002908: 687b ldr r3, [r7, #4] + 800290a: 689b ldr r3, [r3, #8] + 800290c: 60fb str r3, [r7, #12] /* Reset the TS Bits */ tmpsmcr &= ~TIM_SMCR_TS; - 80028b6: 68fb ldr r3, [r7, #12] - 80028b8: f023 0370 bic.w r3, r3, #112 ; 0x70 - 80028bc: 60fb str r3, [r7, #12] + 800290e: 68fb ldr r3, [r7, #12] + 8002910: f023 0370 bic.w r3, r3, #112 ; 0x70 + 8002914: 60fb str r3, [r7, #12] /* Set the Input Trigger source and the slave mode*/ tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1); - 80028be: 683a ldr r2, [r7, #0] - 80028c0: 68fb ldr r3, [r7, #12] - 80028c2: 4313 orrs r3, r2 - 80028c4: f043 0307 orr.w r3, r3, #7 - 80028c8: 60fb str r3, [r7, #12] + 8002916: 683a ldr r2, [r7, #0] + 8002918: 68fb ldr r3, [r7, #12] + 800291a: 4313 orrs r3, r2 + 800291c: f043 0307 orr.w r3, r3, #7 + 8002920: 60fb str r3, [r7, #12] /* Write to TIMx SMCR */ TIMx->SMCR = tmpsmcr; - 80028ca: 687b ldr r3, [r7, #4] - 80028cc: 68fa ldr r2, [r7, #12] - 80028ce: 609a str r2, [r3, #8] + 8002922: 687b ldr r3, [r7, #4] + 8002924: 68fa ldr r2, [r7, #12] + 8002926: 609a str r2, [r3, #8] } - 80028d0: bf00 nop - 80028d2: 3714 adds r7, #20 - 80028d4: 46bd mov sp, r7 - 80028d6: f85d 7b04 ldr.w r7, [sp], #4 - 80028da: 4770 bx lr + 8002928: bf00 nop + 800292a: 3714 adds r7, #20 + 800292c: 46bd mov sp, r7 + 800292e: f85d 7b04 ldr.w r7, [sp], #4 + 8002932: 4770 bx lr -080028dc : +08002934 : * This parameter must be a value between 0x00 and 0x0F * @retval None */ void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler, uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter) { - 80028dc: b480 push {r7} - 80028de: b087 sub sp, #28 - 80028e0: af00 add r7, sp, #0 - 80028e2: 60f8 str r0, [r7, #12] - 80028e4: 60b9 str r1, [r7, #8] - 80028e6: 607a str r2, [r7, #4] - 80028e8: 603b str r3, [r7, #0] + 8002934: b480 push {r7} + 8002936: b087 sub sp, #28 + 8002938: af00 add r7, sp, #0 + 800293a: 60f8 str r0, [r7, #12] + 800293c: 60b9 str r1, [r7, #8] + 800293e: 607a str r2, [r7, #4] + 8002940: 603b str r3, [r7, #0] uint32_t tmpsmcr; tmpsmcr = TIMx->SMCR; - 80028ea: 68fb ldr r3, [r7, #12] - 80028ec: 689b ldr r3, [r3, #8] - 80028ee: 617b str r3, [r7, #20] + 8002942: 68fb ldr r3, [r7, #12] + 8002944: 689b ldr r3, [r3, #8] + 8002946: 617b str r3, [r7, #20] /* Reset the ETR Bits */ tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); - 80028f0: 697b ldr r3, [r7, #20] - 80028f2: f423 437f bic.w r3, r3, #65280 ; 0xff00 - 80028f6: 617b str r3, [r7, #20] + 8002948: 697b ldr r3, [r7, #20] + 800294a: f423 437f bic.w r3, r3, #65280 ; 0xff00 + 800294e: 617b str r3, [r7, #20] /* Set the Prescaler, the Filter value and the Polarity */ tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U))); - 80028f8: 683b ldr r3, [r7, #0] - 80028fa: 021a lsls r2, r3, #8 - 80028fc: 687b ldr r3, [r7, #4] - 80028fe: 431a orrs r2, r3 - 8002900: 68bb ldr r3, [r7, #8] - 8002902: 4313 orrs r3, r2 - 8002904: 697a ldr r2, [r7, #20] - 8002906: 4313 orrs r3, r2 - 8002908: 617b str r3, [r7, #20] + 8002950: 683b ldr r3, [r7, #0] + 8002952: 021a lsls r2, r3, #8 + 8002954: 687b ldr r3, [r7, #4] + 8002956: 431a orrs r2, r3 + 8002958: 68bb ldr r3, [r7, #8] + 800295a: 4313 orrs r3, r2 + 800295c: 697a ldr r2, [r7, #20] + 800295e: 4313 orrs r3, r2 + 8002960: 617b str r3, [r7, #20] /* Write to TIMx SMCR */ TIMx->SMCR = tmpsmcr; - 800290a: 68fb ldr r3, [r7, #12] - 800290c: 697a ldr r2, [r7, #20] - 800290e: 609a str r2, [r3, #8] + 8002962: 68fb ldr r3, [r7, #12] + 8002964: 697a ldr r2, [r7, #20] + 8002966: 609a str r2, [r3, #8] } - 8002910: bf00 nop - 8002912: 371c adds r7, #28 - 8002914: 46bd mov sp, r7 - 8002916: f85d 7b04 ldr.w r7, [sp], #4 - 800291a: 4770 bx lr + 8002968: bf00 nop + 800296a: 371c adds r7, #28 + 800296c: 46bd mov sp, r7 + 800296e: f85d 7b04 ldr.w r7, [sp], #4 + 8002972: 4770 bx lr -0800291c : +08002974 : * mode. * @retval HAL status */ HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef *sMasterConfig) { - 800291c: b480 push {r7} - 800291e: b085 sub sp, #20 - 8002920: af00 add r7, sp, #0 - 8002922: 6078 str r0, [r7, #4] - 8002924: 6039 str r1, [r7, #0] + 8002974: b480 push {r7} + 8002976: b085 sub sp, #20 + 8002978: af00 add r7, sp, #0 + 800297a: 6078 str r0, [r7, #4] + 800297c: 6039 str r1, [r7, #0] assert_param(IS_TIM_SYNCHRO_INSTANCE(htim->Instance)); assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); /* Check input state */ __HAL_LOCK(htim); - 8002926: 687b ldr r3, [r7, #4] - 8002928: f893 303c ldrb.w r3, [r3, #60] ; 0x3c - 800292c: 2b01 cmp r3, #1 - 800292e: d101 bne.n 8002934 - 8002930: 2302 movs r3, #2 - 8002932: e045 b.n 80029c0 - 8002934: 687b ldr r3, [r7, #4] - 8002936: 2201 movs r2, #1 - 8002938: f883 203c strb.w r2, [r3, #60] ; 0x3c + 800297e: 687b ldr r3, [r7, #4] + 8002980: f893 303c ldrb.w r3, [r3, #60] ; 0x3c + 8002984: 2b01 cmp r3, #1 + 8002986: d101 bne.n 800298c + 8002988: 2302 movs r3, #2 + 800298a: e045 b.n 8002a18 + 800298c: 687b ldr r3, [r7, #4] + 800298e: 2201 movs r2, #1 + 8002990: f883 203c strb.w r2, [r3, #60] ; 0x3c /* Change the handler state */ htim->State = HAL_TIM_STATE_BUSY; - 800293c: 687b ldr r3, [r7, #4] - 800293e: 2202 movs r2, #2 - 8002940: f883 203d strb.w r2, [r3, #61] ; 0x3d + 8002994: 687b ldr r3, [r7, #4] + 8002996: 2202 movs r2, #2 + 8002998: f883 203d strb.w r2, [r3, #61] ; 0x3d /* Get the TIMx CR2 register value */ tmpcr2 = htim->Instance->CR2; - 8002944: 687b ldr r3, [r7, #4] - 8002946: 681b ldr r3, [r3, #0] - 8002948: 685b ldr r3, [r3, #4] - 800294a: 60fb str r3, [r7, #12] + 800299c: 687b ldr r3, [r7, #4] + 800299e: 681b ldr r3, [r3, #0] + 80029a0: 685b ldr r3, [r3, #4] + 80029a2: 60fb str r3, [r7, #12] /* Get the TIMx SMCR register value */ tmpsmcr = htim->Instance->SMCR; - 800294c: 687b ldr r3, [r7, #4] - 800294e: 681b ldr r3, [r3, #0] - 8002950: 689b ldr r3, [r3, #8] - 8002952: 60bb str r3, [r7, #8] + 80029a4: 687b ldr r3, [r7, #4] + 80029a6: 681b ldr r3, [r3, #0] + 80029a8: 689b ldr r3, [r3, #8] + 80029aa: 60bb str r3, [r7, #8] /* If the timer supports ADC synchronization through TRGO2, set the master mode selection 2 */ if (IS_TIM_TRGO2_INSTANCE(htim->Instance)) - 8002954: 687b ldr r3, [r7, #4] - 8002956: 681b ldr r3, [r3, #0] - 8002958: 4a1c ldr r2, [pc, #112] ; (80029cc ) - 800295a: 4293 cmp r3, r2 - 800295c: d004 beq.n 8002968 - 800295e: 687b ldr r3, [r7, #4] - 8002960: 681b ldr r3, [r3, #0] - 8002962: 4a1b ldr r2, [pc, #108] ; (80029d0 ) - 8002964: 4293 cmp r3, r2 - 8002966: d108 bne.n 800297a + 80029ac: 687b ldr r3, [r7, #4] + 80029ae: 681b ldr r3, [r3, #0] + 80029b0: 4a1c ldr r2, [pc, #112] ; (8002a24 ) + 80029b2: 4293 cmp r3, r2 + 80029b4: d004 beq.n 80029c0 + 80029b6: 687b ldr r3, [r7, #4] + 80029b8: 681b ldr r3, [r3, #0] + 80029ba: 4a1b ldr r2, [pc, #108] ; (8002a28 ) + 80029bc: 4293 cmp r3, r2 + 80029be: d108 bne.n 80029d2 { /* Check the parameters */ assert_param(IS_TIM_TRGO2_SOURCE(sMasterConfig->MasterOutputTrigger2)); /* Clear the MMS2 bits */ tmpcr2 &= ~TIM_CR2_MMS2; - 8002968: 68fb ldr r3, [r7, #12] - 800296a: f423 0370 bic.w r3, r3, #15728640 ; 0xf00000 - 800296e: 60fb str r3, [r7, #12] + 80029c0: 68fb ldr r3, [r7, #12] + 80029c2: f423 0370 bic.w r3, r3, #15728640 ; 0xf00000 + 80029c6: 60fb str r3, [r7, #12] /* Select the TRGO2 source*/ tmpcr2 |= sMasterConfig->MasterOutputTrigger2; - 8002970: 683b ldr r3, [r7, #0] - 8002972: 685b ldr r3, [r3, #4] - 8002974: 68fa ldr r2, [r7, #12] - 8002976: 4313 orrs r3, r2 - 8002978: 60fb str r3, [r7, #12] + 80029c8: 683b ldr r3, [r7, #0] + 80029ca: 685b ldr r3, [r3, #4] + 80029cc: 68fa ldr r2, [r7, #12] + 80029ce: 4313 orrs r3, r2 + 80029d0: 60fb str r3, [r7, #12] } /* Reset the MMS Bits */ tmpcr2 &= ~TIM_CR2_MMS; - 800297a: 68fb ldr r3, [r7, #12] - 800297c: f023 0370 bic.w r3, r3, #112 ; 0x70 - 8002980: 60fb str r3, [r7, #12] + 80029d2: 68fb ldr r3, [r7, #12] + 80029d4: f023 0370 bic.w r3, r3, #112 ; 0x70 + 80029d8: 60fb str r3, [r7, #12] /* Select the TRGO source */ tmpcr2 |= sMasterConfig->MasterOutputTrigger; - 8002982: 683b ldr r3, [r7, #0] - 8002984: 681b ldr r3, [r3, #0] - 8002986: 68fa ldr r2, [r7, #12] - 8002988: 4313 orrs r3, r2 - 800298a: 60fb str r3, [r7, #12] + 80029da: 683b ldr r3, [r7, #0] + 80029dc: 681b ldr r3, [r3, #0] + 80029de: 68fa ldr r2, [r7, #12] + 80029e0: 4313 orrs r3, r2 + 80029e2: 60fb str r3, [r7, #12] /* Reset the MSM Bit */ tmpsmcr &= ~TIM_SMCR_MSM; - 800298c: 68bb ldr r3, [r7, #8] - 800298e: f023 0380 bic.w r3, r3, #128 ; 0x80 - 8002992: 60bb str r3, [r7, #8] + 80029e4: 68bb ldr r3, [r7, #8] + 80029e6: f023 0380 bic.w r3, r3, #128 ; 0x80 + 80029ea: 60bb str r3, [r7, #8] /* Set master mode */ tmpsmcr |= sMasterConfig->MasterSlaveMode; - 8002994: 683b ldr r3, [r7, #0] - 8002996: 689b ldr r3, [r3, #8] - 8002998: 68ba ldr r2, [r7, #8] - 800299a: 4313 orrs r3, r2 - 800299c: 60bb str r3, [r7, #8] + 80029ec: 683b ldr r3, [r7, #0] + 80029ee: 689b ldr r3, [r3, #8] + 80029f0: 68ba ldr r2, [r7, #8] + 80029f2: 4313 orrs r3, r2 + 80029f4: 60bb str r3, [r7, #8] /* Update TIMx CR2 */ htim->Instance->CR2 = tmpcr2; - 800299e: 687b ldr r3, [r7, #4] - 80029a0: 681b ldr r3, [r3, #0] - 80029a2: 68fa ldr r2, [r7, #12] - 80029a4: 605a str r2, [r3, #4] + 80029f6: 687b ldr r3, [r7, #4] + 80029f8: 681b ldr r3, [r3, #0] + 80029fa: 68fa ldr r2, [r7, #12] + 80029fc: 605a str r2, [r3, #4] /* Update TIMx SMCR */ htim->Instance->SMCR = tmpsmcr; - 80029a6: 687b ldr r3, [r7, #4] - 80029a8: 681b ldr r3, [r3, #0] - 80029aa: 68ba ldr r2, [r7, #8] - 80029ac: 609a str r2, [r3, #8] + 80029fe: 687b ldr r3, [r7, #4] + 8002a00: 681b ldr r3, [r3, #0] + 8002a02: 68ba ldr r2, [r7, #8] + 8002a04: 609a str r2, [r3, #8] /* Change the htim state */ htim->State = HAL_TIM_STATE_READY; - 80029ae: 687b ldr r3, [r7, #4] - 80029b0: 2201 movs r2, #1 - 80029b2: f883 203d strb.w r2, [r3, #61] ; 0x3d + 8002a06: 687b ldr r3, [r7, #4] + 8002a08: 2201 movs r2, #1 + 8002a0a: f883 203d strb.w r2, [r3, #61] ; 0x3d __HAL_UNLOCK(htim); - 80029b6: 687b ldr r3, [r7, #4] - 80029b8: 2200 movs r2, #0 - 80029ba: f883 203c strb.w r2, [r3, #60] ; 0x3c + 8002a0e: 687b ldr r3, [r7, #4] + 8002a10: 2200 movs r2, #0 + 8002a12: f883 203c strb.w r2, [r3, #60] ; 0x3c return HAL_OK; - 80029be: 2300 movs r3, #0 + 8002a16: 2300 movs r3, #0 } - 80029c0: 4618 mov r0, r3 - 80029c2: 3714 adds r7, #20 - 80029c4: 46bd mov sp, r7 - 80029c6: f85d 7b04 ldr.w r7, [sp], #4 - 80029ca: 4770 bx lr - 80029cc: 40010000 .word 0x40010000 - 80029d0: 40010400 .word 0x40010400 - -080029d4 : + 8002a18: 4618 mov r0, r3 + 8002a1a: 3714 adds r7, #20 + 8002a1c: 46bd mov sp, r7 + 8002a1e: f85d 7b04 ldr.w r7, [sp], #4 + 8002a22: 4770 bx lr + 8002a24: 40010000 .word 0x40010000 + 8002a28: 40010400 .word 0x40010400 + +08002a2c : * @brief Hall commutation changed callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim) { - 80029d4: b480 push {r7} - 80029d6: b083 sub sp, #12 - 80029d8: af00 add r7, sp, #0 - 80029da: 6078 str r0, [r7, #4] + 8002a2c: b480 push {r7} + 8002a2e: b083 sub sp, #12 + 8002a30: af00 add r7, sp, #0 + 8002a32: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIMEx_CommutCallback could be implemented in the user file */ } - 80029dc: bf00 nop - 80029de: 370c adds r7, #12 - 80029e0: 46bd mov sp, r7 - 80029e2: f85d 7b04 ldr.w r7, [sp], #4 - 80029e6: 4770 bx lr + 8002a34: bf00 nop + 8002a36: 370c adds r7, #12 + 8002a38: 46bd mov sp, r7 + 8002a3a: f85d 7b04 ldr.w r7, [sp], #4 + 8002a3e: 4770 bx lr -080029e8 : +08002a40 : * @brief Hall Break detection callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) { - 80029e8: b480 push {r7} - 80029ea: b083 sub sp, #12 - 80029ec: af00 add r7, sp, #0 - 80029ee: 6078 str r0, [r7, #4] + 8002a40: b480 push {r7} + 8002a42: b083 sub sp, #12 + 8002a44: af00 add r7, sp, #0 + 8002a46: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIMEx_BreakCallback could be implemented in the user file */ } - 80029f0: bf00 nop - 80029f2: 370c adds r7, #12 - 80029f4: 46bd mov sp, r7 - 80029f6: f85d 7b04 ldr.w r7, [sp], #4 - 80029fa: 4770 bx lr + 8002a48: bf00 nop + 8002a4a: 370c adds r7, #12 + 8002a4c: 46bd mov sp, r7 + 8002a4e: f85d 7b04 ldr.w r7, [sp], #4 + 8002a52: 4770 bx lr -080029fc : +08002a54 : * @brief Hall Break2 detection callback in non blocking mode * @param htim: TIM handle * @retval None */ __weak void HAL_TIMEx_Break2Callback(TIM_HandleTypeDef *htim) { - 80029fc: b480 push {r7} - 80029fe: b083 sub sp, #12 - 8002a00: af00 add r7, sp, #0 - 8002a02: 6078 str r0, [r7, #4] + 8002a54: b480 push {r7} + 8002a56: b083 sub sp, #12 + 8002a58: af00 add r7, sp, #0 + 8002a5a: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_TIMEx_Break2Callback could be implemented in the user file */ } - 8002a04: bf00 nop - 8002a06: 370c adds r7, #12 - 8002a08: 46bd mov sp, r7 - 8002a0a: f85d 7b04 ldr.w r7, [sp], #4 - 8002a0e: 4770 bx lr + 8002a5c: bf00 nop + 8002a5e: 370c adds r7, #12 + 8002a60: 46bd mov sp, r7 + 8002a62: f85d 7b04 ldr.w r7, [sp], #4 + 8002a66: 4770 bx lr -08002a10 : +08002a68 : * parameters in the UART_InitTypeDef and initialize the associated handle. * @param huart UART handle. * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart) { - 8002a10: b580 push {r7, lr} - 8002a12: b082 sub sp, #8 - 8002a14: af00 add r7, sp, #0 - 8002a16: 6078 str r0, [r7, #4] + 8002a68: b580 push {r7, lr} + 8002a6a: b082 sub sp, #8 + 8002a6c: af00 add r7, sp, #0 + 8002a6e: 6078 str r0, [r7, #4] /* Check the UART handle allocation */ if (huart == NULL) - 8002a18: 687b ldr r3, [r7, #4] - 8002a1a: 2b00 cmp r3, #0 - 8002a1c: d101 bne.n 8002a22 + 8002a70: 687b ldr r3, [r7, #4] + 8002a72: 2b00 cmp r3, #0 + 8002a74: d101 bne.n 8002a7a { return HAL_ERROR; - 8002a1e: 2301 movs r3, #1 - 8002a20: e040 b.n 8002aa4 + 8002a76: 2301 movs r3, #1 + 8002a78: e040 b.n 8002afc { /* Check the parameters */ assert_param(IS_UART_INSTANCE(huart->Instance)); } if (huart->gState == HAL_UART_STATE_RESET) - 8002a22: 687b ldr r3, [r7, #4] - 8002a24: 6f5b ldr r3, [r3, #116] ; 0x74 - 8002a26: 2b00 cmp r3, #0 - 8002a28: d106 bne.n 8002a38 + 8002a7a: 687b ldr r3, [r7, #4] + 8002a7c: 6f5b ldr r3, [r3, #116] ; 0x74 + 8002a7e: 2b00 cmp r3, #0 + 8002a80: d106 bne.n 8002a90 { /* Allocate lock resource and initialize it */ huart->Lock = HAL_UNLOCKED; - 8002a2a: 687b ldr r3, [r7, #4] - 8002a2c: 2200 movs r2, #0 - 8002a2e: f883 2070 strb.w r2, [r3, #112] ; 0x70 + 8002a82: 687b ldr r3, [r7, #4] + 8002a84: 2200 movs r2, #0 + 8002a86: f883 2070 strb.w r2, [r3, #112] ; 0x70 /* Init the low level hardware */ huart->MspInitCallback(huart); #else /* Init the low level hardware : GPIO, CLOCK */ HAL_UART_MspInit(huart); - 8002a32: 6878 ldr r0, [r7, #4] - 8002a34: f7fd ff60 bl 80008f8 + 8002a8a: 6878 ldr r0, [r7, #4] + 8002a8c: f7fd ff34 bl 80008f8 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ } huart->gState = HAL_UART_STATE_BUSY; - 8002a38: 687b ldr r3, [r7, #4] - 8002a3a: 2224 movs r2, #36 ; 0x24 - 8002a3c: 675a str r2, [r3, #116] ; 0x74 + 8002a90: 687b ldr r3, [r7, #4] + 8002a92: 2224 movs r2, #36 ; 0x24 + 8002a94: 675a str r2, [r3, #116] ; 0x74 /* Disable the Peripheral */ __HAL_UART_DISABLE(huart); - 8002a3e: 687b ldr r3, [r7, #4] - 8002a40: 681b ldr r3, [r3, #0] - 8002a42: 681a ldr r2, [r3, #0] - 8002a44: 687b ldr r3, [r7, #4] - 8002a46: 681b ldr r3, [r3, #0] - 8002a48: f022 0201 bic.w r2, r2, #1 - 8002a4c: 601a str r2, [r3, #0] + 8002a96: 687b ldr r3, [r7, #4] + 8002a98: 681b ldr r3, [r3, #0] + 8002a9a: 681a ldr r2, [r3, #0] + 8002a9c: 687b ldr r3, [r7, #4] + 8002a9e: 681b ldr r3, [r3, #0] + 8002aa0: f022 0201 bic.w r2, r2, #1 + 8002aa4: 601a str r2, [r3, #0] /* Set the UART Communication parameters */ if (UART_SetConfig(huart) == HAL_ERROR) - 8002a4e: 6878 ldr r0, [r7, #4] - 8002a50: f000 fa86 bl 8002f60 - 8002a54: 4603 mov r3, r0 - 8002a56: 2b01 cmp r3, #1 - 8002a58: d101 bne.n 8002a5e + 8002aa6: 6878 ldr r0, [r7, #4] + 8002aa8: f000 fa86 bl 8002fb8 + 8002aac: 4603 mov r3, r0 + 8002aae: 2b01 cmp r3, #1 + 8002ab0: d101 bne.n 8002ab6 { return HAL_ERROR; - 8002a5a: 2301 movs r3, #1 - 8002a5c: e022 b.n 8002aa4 + 8002ab2: 2301 movs r3, #1 + 8002ab4: e022 b.n 8002afc } if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) - 8002a5e: 687b ldr r3, [r7, #4] - 8002a60: 6a5b ldr r3, [r3, #36] ; 0x24 - 8002a62: 2b00 cmp r3, #0 - 8002a64: d002 beq.n 8002a6c + 8002ab6: 687b ldr r3, [r7, #4] + 8002ab8: 6a5b ldr r3, [r3, #36] ; 0x24 + 8002aba: 2b00 cmp r3, #0 + 8002abc: d002 beq.n 8002ac4 { UART_AdvFeatureConfig(huart); - 8002a66: 6878 ldr r0, [r7, #4] - 8002a68: f000 fd1e bl 80034a8 + 8002abe: 6878 ldr r0, [r7, #4] + 8002ac0: f000 fd1e bl 8003500 } /* In asynchronous mode, the following bits must be kept cleared: - LINEN and CLKEN bits in the USART_CR2 register, - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/ CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); - 8002a6c: 687b ldr r3, [r7, #4] - 8002a6e: 681b ldr r3, [r3, #0] - 8002a70: 685a ldr r2, [r3, #4] - 8002a72: 687b ldr r3, [r7, #4] - 8002a74: 681b ldr r3, [r3, #0] - 8002a76: f422 4290 bic.w r2, r2, #18432 ; 0x4800 - 8002a7a: 605a str r2, [r3, #4] + 8002ac4: 687b ldr r3, [r7, #4] + 8002ac6: 681b ldr r3, [r3, #0] + 8002ac8: 685a ldr r2, [r3, #4] + 8002aca: 687b ldr r3, [r7, #4] + 8002acc: 681b ldr r3, [r3, #0] + 8002ace: f422 4290 bic.w r2, r2, #18432 ; 0x4800 + 8002ad2: 605a str r2, [r3, #4] CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); - 8002a7c: 687b ldr r3, [r7, #4] - 8002a7e: 681b ldr r3, [r3, #0] - 8002a80: 689a ldr r2, [r3, #8] - 8002a82: 687b ldr r3, [r7, #4] - 8002a84: 681b ldr r3, [r3, #0] - 8002a86: f022 022a bic.w r2, r2, #42 ; 0x2a - 8002a8a: 609a str r2, [r3, #8] + 8002ad4: 687b ldr r3, [r7, #4] + 8002ad6: 681b ldr r3, [r3, #0] + 8002ad8: 689a ldr r2, [r3, #8] + 8002ada: 687b ldr r3, [r7, #4] + 8002adc: 681b ldr r3, [r3, #0] + 8002ade: f022 022a bic.w r2, r2, #42 ; 0x2a + 8002ae2: 609a str r2, [r3, #8] /* Enable the Peripheral */ __HAL_UART_ENABLE(huart); - 8002a8c: 687b ldr r3, [r7, #4] - 8002a8e: 681b ldr r3, [r3, #0] - 8002a90: 681a ldr r2, [r3, #0] - 8002a92: 687b ldr r3, [r7, #4] - 8002a94: 681b ldr r3, [r3, #0] - 8002a96: f042 0201 orr.w r2, r2, #1 - 8002a9a: 601a str r2, [r3, #0] + 8002ae4: 687b ldr r3, [r7, #4] + 8002ae6: 681b ldr r3, [r3, #0] + 8002ae8: 681a ldr r2, [r3, #0] + 8002aea: 687b ldr r3, [r7, #4] + 8002aec: 681b ldr r3, [r3, #0] + 8002aee: f042 0201 orr.w r2, r2, #1 + 8002af2: 601a str r2, [r3, #0] /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */ return (UART_CheckIdleState(huart)); - 8002a9c: 6878 ldr r0, [r7, #4] - 8002a9e: f000 fda5 bl 80035ec - 8002aa2: 4603 mov r3, r0 + 8002af4: 6878 ldr r0, [r7, #4] + 8002af6: f000 fda5 bl 8003644 + 8002afa: 4603 mov r3, r0 } - 8002aa4: 4618 mov r0, r3 - 8002aa6: 3708 adds r7, #8 - 8002aa8: 46bd mov sp, r7 - 8002aaa: bd80 pop {r7, pc} + 8002afc: 4618 mov r0, r3 + 8002afe: 3708 adds r7, #8 + 8002b00: 46bd mov sp, r7 + 8002b02: bd80 pop {r7, pc} -08002aac : +08002b04 : * @param Size Amount of data to be sent. * @param Timeout Timeout duration. * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout) { - 8002aac: b580 push {r7, lr} - 8002aae: b08a sub sp, #40 ; 0x28 - 8002ab0: af02 add r7, sp, #8 - 8002ab2: 60f8 str r0, [r7, #12] - 8002ab4: 60b9 str r1, [r7, #8] - 8002ab6: 603b str r3, [r7, #0] - 8002ab8: 4613 mov r3, r2 - 8002aba: 80fb strh r3, [r7, #6] + 8002b04: b580 push {r7, lr} + 8002b06: b08a sub sp, #40 ; 0x28 + 8002b08: af02 add r7, sp, #8 + 8002b0a: 60f8 str r0, [r7, #12] + 8002b0c: 60b9 str r1, [r7, #8] + 8002b0e: 603b str r3, [r7, #0] + 8002b10: 4613 mov r3, r2 + 8002b12: 80fb strh r3, [r7, #6] uint8_t *pdata8bits; uint16_t *pdata16bits; uint32_t tickstart; /* Check that a Tx process is not already ongoing */ if (huart->gState == HAL_UART_STATE_READY) - 8002abc: 68fb ldr r3, [r7, #12] - 8002abe: 6f5b ldr r3, [r3, #116] ; 0x74 - 8002ac0: 2b20 cmp r3, #32 - 8002ac2: d17f bne.n 8002bc4 + 8002b14: 68fb ldr r3, [r7, #12] + 8002b16: 6f5b ldr r3, [r3, #116] ; 0x74 + 8002b18: 2b20 cmp r3, #32 + 8002b1a: d17f bne.n 8002c1c { if ((pData == NULL) || (Size == 0U)) - 8002ac4: 68bb ldr r3, [r7, #8] - 8002ac6: 2b00 cmp r3, #0 - 8002ac8: d002 beq.n 8002ad0 - 8002aca: 88fb ldrh r3, [r7, #6] - 8002acc: 2b00 cmp r3, #0 - 8002ace: d101 bne.n 8002ad4 + 8002b1c: 68bb ldr r3, [r7, #8] + 8002b1e: 2b00 cmp r3, #0 + 8002b20: d002 beq.n 8002b28 + 8002b22: 88fb ldrh r3, [r7, #6] + 8002b24: 2b00 cmp r3, #0 + 8002b26: d101 bne.n 8002b2c { return HAL_ERROR; - 8002ad0: 2301 movs r3, #1 - 8002ad2: e078 b.n 8002bc6 + 8002b28: 2301 movs r3, #1 + 8002b2a: e078 b.n 8002c1e } /* Process Locked */ __HAL_LOCK(huart); - 8002ad4: 68fb ldr r3, [r7, #12] - 8002ad6: f893 3070 ldrb.w r3, [r3, #112] ; 0x70 - 8002ada: 2b01 cmp r3, #1 - 8002adc: d101 bne.n 8002ae2 - 8002ade: 2302 movs r3, #2 - 8002ae0: e071 b.n 8002bc6 - 8002ae2: 68fb ldr r3, [r7, #12] - 8002ae4: 2201 movs r2, #1 - 8002ae6: f883 2070 strb.w r2, [r3, #112] ; 0x70 + 8002b2c: 68fb ldr r3, [r7, #12] + 8002b2e: f893 3070 ldrb.w r3, [r3, #112] ; 0x70 + 8002b32: 2b01 cmp r3, #1 + 8002b34: d101 bne.n 8002b3a + 8002b36: 2302 movs r3, #2 + 8002b38: e071 b.n 8002c1e + 8002b3a: 68fb ldr r3, [r7, #12] + 8002b3c: 2201 movs r2, #1 + 8002b3e: f883 2070 strb.w r2, [r3, #112] ; 0x70 huart->ErrorCode = HAL_UART_ERROR_NONE; - 8002aea: 68fb ldr r3, [r7, #12] - 8002aec: 2200 movs r2, #0 - 8002aee: 67da str r2, [r3, #124] ; 0x7c + 8002b42: 68fb ldr r3, [r7, #12] + 8002b44: 2200 movs r2, #0 + 8002b46: 67da str r2, [r3, #124] ; 0x7c huart->gState = HAL_UART_STATE_BUSY_TX; - 8002af0: 68fb ldr r3, [r7, #12] - 8002af2: 2221 movs r2, #33 ; 0x21 - 8002af4: 675a str r2, [r3, #116] ; 0x74 + 8002b48: 68fb ldr r3, [r7, #12] + 8002b4a: 2221 movs r2, #33 ; 0x21 + 8002b4c: 675a str r2, [r3, #116] ; 0x74 /* Init tickstart for timeout managment*/ tickstart = HAL_GetTick(); - 8002af6: f7fe f85b bl 8000bb0 - 8002afa: 6178 str r0, [r7, #20] + 8002b4e: f7fe f82f bl 8000bb0 + 8002b52: 6178 str r0, [r7, #20] huart->TxXferSize = Size; - 8002afc: 68fb ldr r3, [r7, #12] - 8002afe: 88fa ldrh r2, [r7, #6] - 8002b00: f8a3 2050 strh.w r2, [r3, #80] ; 0x50 + 8002b54: 68fb ldr r3, [r7, #12] + 8002b56: 88fa ldrh r2, [r7, #6] + 8002b58: f8a3 2050 strh.w r2, [r3, #80] ; 0x50 huart->TxXferCount = Size; - 8002b04: 68fb ldr r3, [r7, #12] - 8002b06: 88fa ldrh r2, [r7, #6] - 8002b08: f8a3 2052 strh.w r2, [r3, #82] ; 0x52 + 8002b5c: 68fb ldr r3, [r7, #12] + 8002b5e: 88fa ldrh r2, [r7, #6] + 8002b60: f8a3 2052 strh.w r2, [r3, #82] ; 0x52 /* In case of 9bits/No Parity transfer, pData needs to be handled as a uint16_t pointer */ if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - 8002b0c: 68fb ldr r3, [r7, #12] - 8002b0e: 689b ldr r3, [r3, #8] - 8002b10: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 8002b14: d108 bne.n 8002b28 - 8002b16: 68fb ldr r3, [r7, #12] - 8002b18: 691b ldr r3, [r3, #16] - 8002b1a: 2b00 cmp r3, #0 - 8002b1c: d104 bne.n 8002b28 + 8002b64: 68fb ldr r3, [r7, #12] + 8002b66: 689b ldr r3, [r3, #8] + 8002b68: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 + 8002b6c: d108 bne.n 8002b80 + 8002b6e: 68fb ldr r3, [r7, #12] + 8002b70: 691b ldr r3, [r3, #16] + 8002b72: 2b00 cmp r3, #0 + 8002b74: d104 bne.n 8002b80 { pdata8bits = NULL; - 8002b1e: 2300 movs r3, #0 - 8002b20: 61fb str r3, [r7, #28] + 8002b76: 2300 movs r3, #0 + 8002b78: 61fb str r3, [r7, #28] pdata16bits = (uint16_t *) pData; - 8002b22: 68bb ldr r3, [r7, #8] - 8002b24: 61bb str r3, [r7, #24] - 8002b26: e003 b.n 8002b30 + 8002b7a: 68bb ldr r3, [r7, #8] + 8002b7c: 61bb str r3, [r7, #24] + 8002b7e: e003 b.n 8002b88 } else { pdata8bits = pData; - 8002b28: 68bb ldr r3, [r7, #8] - 8002b2a: 61fb str r3, [r7, #28] + 8002b80: 68bb ldr r3, [r7, #8] + 8002b82: 61fb str r3, [r7, #28] pdata16bits = NULL; - 8002b2c: 2300 movs r3, #0 - 8002b2e: 61bb str r3, [r7, #24] + 8002b84: 2300 movs r3, #0 + 8002b86: 61bb str r3, [r7, #24] } while (huart->TxXferCount > 0U) - 8002b30: e02c b.n 8002b8c + 8002b88: e02c b.n 8002be4 { if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) - 8002b32: 683b ldr r3, [r7, #0] - 8002b34: 9300 str r3, [sp, #0] - 8002b36: 697b ldr r3, [r7, #20] - 8002b38: 2200 movs r2, #0 - 8002b3a: 2180 movs r1, #128 ; 0x80 - 8002b3c: 68f8 ldr r0, [r7, #12] - 8002b3e: f000 fd84 bl 800364a - 8002b42: 4603 mov r3, r0 - 8002b44: 2b00 cmp r3, #0 - 8002b46: d001 beq.n 8002b4c + 8002b8a: 683b ldr r3, [r7, #0] + 8002b8c: 9300 str r3, [sp, #0] + 8002b8e: 697b ldr r3, [r7, #20] + 8002b90: 2200 movs r2, #0 + 8002b92: 2180 movs r1, #128 ; 0x80 + 8002b94: 68f8 ldr r0, [r7, #12] + 8002b96: f000 fd84 bl 80036a2 + 8002b9a: 4603 mov r3, r0 + 8002b9c: 2b00 cmp r3, #0 + 8002b9e: d001 beq.n 8002ba4 { return HAL_TIMEOUT; - 8002b48: 2303 movs r3, #3 - 8002b4a: e03c b.n 8002bc6 + 8002ba0: 2303 movs r3, #3 + 8002ba2: e03c b.n 8002c1e } if (pdata8bits == NULL) - 8002b4c: 69fb ldr r3, [r7, #28] - 8002b4e: 2b00 cmp r3, #0 - 8002b50: d10b bne.n 8002b6a + 8002ba4: 69fb ldr r3, [r7, #28] + 8002ba6: 2b00 cmp r3, #0 + 8002ba8: d10b bne.n 8002bc2 { huart->Instance->TDR = (uint16_t)(*pdata16bits & 0x01FFU); - 8002b52: 69bb ldr r3, [r7, #24] - 8002b54: 881b ldrh r3, [r3, #0] - 8002b56: 461a mov r2, r3 - 8002b58: 68fb ldr r3, [r7, #12] - 8002b5a: 681b ldr r3, [r3, #0] - 8002b5c: f3c2 0208 ubfx r2, r2, #0, #9 - 8002b60: 629a str r2, [r3, #40] ; 0x28 + 8002baa: 69bb ldr r3, [r7, #24] + 8002bac: 881b ldrh r3, [r3, #0] + 8002bae: 461a mov r2, r3 + 8002bb0: 68fb ldr r3, [r7, #12] + 8002bb2: 681b ldr r3, [r3, #0] + 8002bb4: f3c2 0208 ubfx r2, r2, #0, #9 + 8002bb8: 629a str r2, [r3, #40] ; 0x28 pdata16bits++; - 8002b62: 69bb ldr r3, [r7, #24] - 8002b64: 3302 adds r3, #2 - 8002b66: 61bb str r3, [r7, #24] - 8002b68: e007 b.n 8002b7a + 8002bba: 69bb ldr r3, [r7, #24] + 8002bbc: 3302 adds r3, #2 + 8002bbe: 61bb str r3, [r7, #24] + 8002bc0: e007 b.n 8002bd2 } else { huart->Instance->TDR = (uint8_t)(*pdata8bits & 0xFFU); - 8002b6a: 69fb ldr r3, [r7, #28] - 8002b6c: 781a ldrb r2, [r3, #0] - 8002b6e: 68fb ldr r3, [r7, #12] - 8002b70: 681b ldr r3, [r3, #0] - 8002b72: 629a str r2, [r3, #40] ; 0x28 + 8002bc2: 69fb ldr r3, [r7, #28] + 8002bc4: 781a ldrb r2, [r3, #0] + 8002bc6: 68fb ldr r3, [r7, #12] + 8002bc8: 681b ldr r3, [r3, #0] + 8002bca: 629a str r2, [r3, #40] ; 0x28 pdata8bits++; - 8002b74: 69fb ldr r3, [r7, #28] - 8002b76: 3301 adds r3, #1 - 8002b78: 61fb str r3, [r7, #28] + 8002bcc: 69fb ldr r3, [r7, #28] + 8002bce: 3301 adds r3, #1 + 8002bd0: 61fb str r3, [r7, #28] } huart->TxXferCount--; - 8002b7a: 68fb ldr r3, [r7, #12] - 8002b7c: f8b3 3052 ldrh.w r3, [r3, #82] ; 0x52 - 8002b80: b29b uxth r3, r3 - 8002b82: 3b01 subs r3, #1 - 8002b84: b29a uxth r2, r3 - 8002b86: 68fb ldr r3, [r7, #12] - 8002b88: f8a3 2052 strh.w r2, [r3, #82] ; 0x52 + 8002bd2: 68fb ldr r3, [r7, #12] + 8002bd4: f8b3 3052 ldrh.w r3, [r3, #82] ; 0x52 + 8002bd8: b29b uxth r3, r3 + 8002bda: 3b01 subs r3, #1 + 8002bdc: b29a uxth r2, r3 + 8002bde: 68fb ldr r3, [r7, #12] + 8002be0: f8a3 2052 strh.w r2, [r3, #82] ; 0x52 while (huart->TxXferCount > 0U) - 8002b8c: 68fb ldr r3, [r7, #12] - 8002b8e: f8b3 3052 ldrh.w r3, [r3, #82] ; 0x52 - 8002b92: b29b uxth r3, r3 - 8002b94: 2b00 cmp r3, #0 - 8002b96: d1cc bne.n 8002b32 + 8002be4: 68fb ldr r3, [r7, #12] + 8002be6: f8b3 3052 ldrh.w r3, [r3, #82] ; 0x52 + 8002bea: b29b uxth r3, r3 + 8002bec: 2b00 cmp r3, #0 + 8002bee: d1cc bne.n 8002b8a } if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK) - 8002b98: 683b ldr r3, [r7, #0] - 8002b9a: 9300 str r3, [sp, #0] - 8002b9c: 697b ldr r3, [r7, #20] - 8002b9e: 2200 movs r2, #0 - 8002ba0: 2140 movs r1, #64 ; 0x40 - 8002ba2: 68f8 ldr r0, [r7, #12] - 8002ba4: f000 fd51 bl 800364a - 8002ba8: 4603 mov r3, r0 - 8002baa: 2b00 cmp r3, #0 - 8002bac: d001 beq.n 8002bb2 + 8002bf0: 683b ldr r3, [r7, #0] + 8002bf2: 9300 str r3, [sp, #0] + 8002bf4: 697b ldr r3, [r7, #20] + 8002bf6: 2200 movs r2, #0 + 8002bf8: 2140 movs r1, #64 ; 0x40 + 8002bfa: 68f8 ldr r0, [r7, #12] + 8002bfc: f000 fd51 bl 80036a2 + 8002c00: 4603 mov r3, r0 + 8002c02: 2b00 cmp r3, #0 + 8002c04: d001 beq.n 8002c0a { return HAL_TIMEOUT; - 8002bae: 2303 movs r3, #3 - 8002bb0: e009 b.n 8002bc6 + 8002c06: 2303 movs r3, #3 + 8002c08: e009 b.n 8002c1e } /* At end of Tx process, restore huart->gState to Ready */ huart->gState = HAL_UART_STATE_READY; - 8002bb2: 68fb ldr r3, [r7, #12] - 8002bb4: 2220 movs r2, #32 - 8002bb6: 675a str r2, [r3, #116] ; 0x74 + 8002c0a: 68fb ldr r3, [r7, #12] + 8002c0c: 2220 movs r2, #32 + 8002c0e: 675a str r2, [r3, #116] ; 0x74 /* Process Unlocked */ __HAL_UNLOCK(huart); - 8002bb8: 68fb ldr r3, [r7, #12] - 8002bba: 2200 movs r2, #0 - 8002bbc: f883 2070 strb.w r2, [r3, #112] ; 0x70 + 8002c10: 68fb ldr r3, [r7, #12] + 8002c12: 2200 movs r2, #0 + 8002c14: f883 2070 strb.w r2, [r3, #112] ; 0x70 return HAL_OK; - 8002bc0: 2300 movs r3, #0 - 8002bc2: e000 b.n 8002bc6 + 8002c18: 2300 movs r3, #0 + 8002c1a: e000 b.n 8002c1e } else { return HAL_BUSY; - 8002bc4: 2302 movs r3, #2 + 8002c1c: 2302 movs r3, #2 } } - 8002bc6: 4618 mov r0, r3 - 8002bc8: 3720 adds r7, #32 - 8002bca: 46bd mov sp, r7 - 8002bcc: bd80 pop {r7, pc} + 8002c1e: 4618 mov r0, r3 + 8002c20: 3720 adds r7, #32 + 8002c22: 46bd mov sp, r7 + 8002c24: bd80 pop {r7, pc} ... -08002bd0 : +08002c28 : * @param pData Pointer to data buffer. * @param Size Amount of data to be received. * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) { - 8002bd0: b480 push {r7} - 8002bd2: b085 sub sp, #20 - 8002bd4: af00 add r7, sp, #0 - 8002bd6: 60f8 str r0, [r7, #12] - 8002bd8: 60b9 str r1, [r7, #8] - 8002bda: 4613 mov r3, r2 - 8002bdc: 80fb strh r3, [r7, #6] + 8002c28: b480 push {r7} + 8002c2a: b085 sub sp, #20 + 8002c2c: af00 add r7, sp, #0 + 8002c2e: 60f8 str r0, [r7, #12] + 8002c30: 60b9 str r1, [r7, #8] + 8002c32: 4613 mov r3, r2 + 8002c34: 80fb strh r3, [r7, #6] /* Check that a Rx process is not already ongoing */ if (huart->RxState == HAL_UART_STATE_READY) - 8002bde: 68fb ldr r3, [r7, #12] - 8002be0: 6f9b ldr r3, [r3, #120] ; 0x78 - 8002be2: 2b20 cmp r3, #32 - 8002be4: f040 808a bne.w 8002cfc + 8002c36: 68fb ldr r3, [r7, #12] + 8002c38: 6f9b ldr r3, [r3, #120] ; 0x78 + 8002c3a: 2b20 cmp r3, #32 + 8002c3c: f040 808a bne.w 8002d54 { if ((pData == NULL) || (Size == 0U)) - 8002be8: 68bb ldr r3, [r7, #8] - 8002bea: 2b00 cmp r3, #0 - 8002bec: d002 beq.n 8002bf4 - 8002bee: 88fb ldrh r3, [r7, #6] - 8002bf0: 2b00 cmp r3, #0 - 8002bf2: d101 bne.n 8002bf8 + 8002c40: 68bb ldr r3, [r7, #8] + 8002c42: 2b00 cmp r3, #0 + 8002c44: d002 beq.n 8002c4c + 8002c46: 88fb ldrh r3, [r7, #6] + 8002c48: 2b00 cmp r3, #0 + 8002c4a: d101 bne.n 8002c50 { return HAL_ERROR; - 8002bf4: 2301 movs r3, #1 - 8002bf6: e082 b.n 8002cfe + 8002c4c: 2301 movs r3, #1 + 8002c4e: e082 b.n 8002d56 } /* Process Locked */ __HAL_LOCK(huart); - 8002bf8: 68fb ldr r3, [r7, #12] - 8002bfa: f893 3070 ldrb.w r3, [r3, #112] ; 0x70 - 8002bfe: 2b01 cmp r3, #1 - 8002c00: d101 bne.n 8002c06 - 8002c02: 2302 movs r3, #2 - 8002c04: e07b b.n 8002cfe - 8002c06: 68fb ldr r3, [r7, #12] - 8002c08: 2201 movs r2, #1 - 8002c0a: f883 2070 strb.w r2, [r3, #112] ; 0x70 + 8002c50: 68fb ldr r3, [r7, #12] + 8002c52: f893 3070 ldrb.w r3, [r3, #112] ; 0x70 + 8002c56: 2b01 cmp r3, #1 + 8002c58: d101 bne.n 8002c5e + 8002c5a: 2302 movs r3, #2 + 8002c5c: e07b b.n 8002d56 + 8002c5e: 68fb ldr r3, [r7, #12] + 8002c60: 2201 movs r2, #1 + 8002c62: f883 2070 strb.w r2, [r3, #112] ; 0x70 huart->pRxBuffPtr = pData; - 8002c0e: 68fb ldr r3, [r7, #12] - 8002c10: 68ba ldr r2, [r7, #8] - 8002c12: 655a str r2, [r3, #84] ; 0x54 + 8002c66: 68fb ldr r3, [r7, #12] + 8002c68: 68ba ldr r2, [r7, #8] + 8002c6a: 655a str r2, [r3, #84] ; 0x54 huart->RxXferSize = Size; - 8002c14: 68fb ldr r3, [r7, #12] - 8002c16: 88fa ldrh r2, [r7, #6] - 8002c18: f8a3 2058 strh.w r2, [r3, #88] ; 0x58 + 8002c6c: 68fb ldr r3, [r7, #12] + 8002c6e: 88fa ldrh r2, [r7, #6] + 8002c70: f8a3 2058 strh.w r2, [r3, #88] ; 0x58 huart->RxXferCount = Size; - 8002c1c: 68fb ldr r3, [r7, #12] - 8002c1e: 88fa ldrh r2, [r7, #6] - 8002c20: f8a3 205a strh.w r2, [r3, #90] ; 0x5a + 8002c74: 68fb ldr r3, [r7, #12] + 8002c76: 88fa ldrh r2, [r7, #6] + 8002c78: f8a3 205a strh.w r2, [r3, #90] ; 0x5a huart->RxISR = NULL; - 8002c24: 68fb ldr r3, [r7, #12] - 8002c26: 2200 movs r2, #0 - 8002c28: 661a str r2, [r3, #96] ; 0x60 + 8002c7c: 68fb ldr r3, [r7, #12] + 8002c7e: 2200 movs r2, #0 + 8002c80: 661a str r2, [r3, #96] ; 0x60 /* Computation of UART mask to apply to RDR register */ UART_MASK_COMPUTATION(huart); - 8002c2a: 68fb ldr r3, [r7, #12] - 8002c2c: 689b ldr r3, [r3, #8] - 8002c2e: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 8002c32: d10e bne.n 8002c52 - 8002c34: 68fb ldr r3, [r7, #12] - 8002c36: 691b ldr r3, [r3, #16] - 8002c38: 2b00 cmp r3, #0 - 8002c3a: d105 bne.n 8002c48 - 8002c3c: 68fb ldr r3, [r7, #12] - 8002c3e: f240 12ff movw r2, #511 ; 0x1ff - 8002c42: f8a3 205c strh.w r2, [r3, #92] ; 0x5c - 8002c46: e02d b.n 8002ca4 - 8002c48: 68fb ldr r3, [r7, #12] - 8002c4a: 22ff movs r2, #255 ; 0xff - 8002c4c: f8a3 205c strh.w r2, [r3, #92] ; 0x5c - 8002c50: e028 b.n 8002ca4 - 8002c52: 68fb ldr r3, [r7, #12] - 8002c54: 689b ldr r3, [r3, #8] - 8002c56: 2b00 cmp r3, #0 - 8002c58: d10d bne.n 8002c76 - 8002c5a: 68fb ldr r3, [r7, #12] - 8002c5c: 691b ldr r3, [r3, #16] - 8002c5e: 2b00 cmp r3, #0 - 8002c60: d104 bne.n 8002c6c - 8002c62: 68fb ldr r3, [r7, #12] - 8002c64: 22ff movs r2, #255 ; 0xff - 8002c66: f8a3 205c strh.w r2, [r3, #92] ; 0x5c - 8002c6a: e01b b.n 8002ca4 - 8002c6c: 68fb ldr r3, [r7, #12] - 8002c6e: 227f movs r2, #127 ; 0x7f - 8002c70: f8a3 205c strh.w r2, [r3, #92] ; 0x5c - 8002c74: e016 b.n 8002ca4 - 8002c76: 68fb ldr r3, [r7, #12] - 8002c78: 689b ldr r3, [r3, #8] - 8002c7a: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 - 8002c7e: d10d bne.n 8002c9c - 8002c80: 68fb ldr r3, [r7, #12] - 8002c82: 691b ldr r3, [r3, #16] - 8002c84: 2b00 cmp r3, #0 - 8002c86: d104 bne.n 8002c92 - 8002c88: 68fb ldr r3, [r7, #12] - 8002c8a: 227f movs r2, #127 ; 0x7f - 8002c8c: f8a3 205c strh.w r2, [r3, #92] ; 0x5c - 8002c90: e008 b.n 8002ca4 - 8002c92: 68fb ldr r3, [r7, #12] - 8002c94: 223f movs r2, #63 ; 0x3f - 8002c96: f8a3 205c strh.w r2, [r3, #92] ; 0x5c - 8002c9a: e003 b.n 8002ca4 - 8002c9c: 68fb ldr r3, [r7, #12] - 8002c9e: 2200 movs r2, #0 - 8002ca0: f8a3 205c strh.w r2, [r3, #92] ; 0x5c + 8002c82: 68fb ldr r3, [r7, #12] + 8002c84: 689b ldr r3, [r3, #8] + 8002c86: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 + 8002c8a: d10e bne.n 8002caa + 8002c8c: 68fb ldr r3, [r7, #12] + 8002c8e: 691b ldr r3, [r3, #16] + 8002c90: 2b00 cmp r3, #0 + 8002c92: d105 bne.n 8002ca0 + 8002c94: 68fb ldr r3, [r7, #12] + 8002c96: f240 12ff movw r2, #511 ; 0x1ff + 8002c9a: f8a3 205c strh.w r2, [r3, #92] ; 0x5c + 8002c9e: e02d b.n 8002cfc + 8002ca0: 68fb ldr r3, [r7, #12] + 8002ca2: 22ff movs r2, #255 ; 0xff + 8002ca4: f8a3 205c strh.w r2, [r3, #92] ; 0x5c + 8002ca8: e028 b.n 8002cfc + 8002caa: 68fb ldr r3, [r7, #12] + 8002cac: 689b ldr r3, [r3, #8] + 8002cae: 2b00 cmp r3, #0 + 8002cb0: d10d bne.n 8002cce + 8002cb2: 68fb ldr r3, [r7, #12] + 8002cb4: 691b ldr r3, [r3, #16] + 8002cb6: 2b00 cmp r3, #0 + 8002cb8: d104 bne.n 8002cc4 + 8002cba: 68fb ldr r3, [r7, #12] + 8002cbc: 22ff movs r2, #255 ; 0xff + 8002cbe: f8a3 205c strh.w r2, [r3, #92] ; 0x5c + 8002cc2: e01b b.n 8002cfc + 8002cc4: 68fb ldr r3, [r7, #12] + 8002cc6: 227f movs r2, #127 ; 0x7f + 8002cc8: f8a3 205c strh.w r2, [r3, #92] ; 0x5c + 8002ccc: e016 b.n 8002cfc + 8002cce: 68fb ldr r3, [r7, #12] + 8002cd0: 689b ldr r3, [r3, #8] + 8002cd2: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 + 8002cd6: d10d bne.n 8002cf4 + 8002cd8: 68fb ldr r3, [r7, #12] + 8002cda: 691b ldr r3, [r3, #16] + 8002cdc: 2b00 cmp r3, #0 + 8002cde: d104 bne.n 8002cea + 8002ce0: 68fb ldr r3, [r7, #12] + 8002ce2: 227f movs r2, #127 ; 0x7f + 8002ce4: f8a3 205c strh.w r2, [r3, #92] ; 0x5c + 8002ce8: e008 b.n 8002cfc + 8002cea: 68fb ldr r3, [r7, #12] + 8002cec: 223f movs r2, #63 ; 0x3f + 8002cee: f8a3 205c strh.w r2, [r3, #92] ; 0x5c + 8002cf2: e003 b.n 8002cfc + 8002cf4: 68fb ldr r3, [r7, #12] + 8002cf6: 2200 movs r2, #0 + 8002cf8: f8a3 205c strh.w r2, [r3, #92] ; 0x5c huart->ErrorCode = HAL_UART_ERROR_NONE; - 8002ca4: 68fb ldr r3, [r7, #12] - 8002ca6: 2200 movs r2, #0 - 8002ca8: 67da str r2, [r3, #124] ; 0x7c + 8002cfc: 68fb ldr r3, [r7, #12] + 8002cfe: 2200 movs r2, #0 + 8002d00: 67da str r2, [r3, #124] ; 0x7c huart->RxState = HAL_UART_STATE_BUSY_RX; - 8002caa: 68fb ldr r3, [r7, #12] - 8002cac: 2222 movs r2, #34 ; 0x22 - 8002cae: 679a str r2, [r3, #120] ; 0x78 + 8002d02: 68fb ldr r3, [r7, #12] + 8002d04: 2222 movs r2, #34 ; 0x22 + 8002d06: 679a str r2, [r3, #120] ; 0x78 /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */ SET_BIT(huart->Instance->CR3, USART_CR3_EIE); - 8002cb0: 68fb ldr r3, [r7, #12] - 8002cb2: 681b ldr r3, [r3, #0] - 8002cb4: 689a ldr r2, [r3, #8] - 8002cb6: 68fb ldr r3, [r7, #12] - 8002cb8: 681b ldr r3, [r3, #0] - 8002cba: f042 0201 orr.w r2, r2, #1 - 8002cbe: 609a str r2, [r3, #8] + 8002d08: 68fb ldr r3, [r7, #12] + 8002d0a: 681b ldr r3, [r3, #0] + 8002d0c: 689a ldr r2, [r3, #8] + 8002d0e: 68fb ldr r3, [r7, #12] + 8002d10: 681b ldr r3, [r3, #0] + 8002d12: f042 0201 orr.w r2, r2, #1 + 8002d16: 609a str r2, [r3, #8] /* Set the Rx ISR function pointer according to the data word length */ if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - 8002cc0: 68fb ldr r3, [r7, #12] - 8002cc2: 689b ldr r3, [r3, #8] - 8002cc4: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 8002cc8: d107 bne.n 8002cda - 8002cca: 68fb ldr r3, [r7, #12] - 8002ccc: 691b ldr r3, [r3, #16] - 8002cce: 2b00 cmp r3, #0 - 8002cd0: d103 bne.n 8002cda + 8002d18: 68fb ldr r3, [r7, #12] + 8002d1a: 689b ldr r3, [r3, #8] + 8002d1c: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 + 8002d20: d107 bne.n 8002d32 + 8002d22: 68fb ldr r3, [r7, #12] + 8002d24: 691b ldr r3, [r3, #16] + 8002d26: 2b00 cmp r3, #0 + 8002d28: d103 bne.n 8002d32 { huart->RxISR = UART_RxISR_16BIT; - 8002cd2: 68fb ldr r3, [r7, #12] - 8002cd4: 4a0d ldr r2, [pc, #52] ; (8002d0c ) - 8002cd6: 661a str r2, [r3, #96] ; 0x60 - 8002cd8: e002 b.n 8002ce0 + 8002d2a: 68fb ldr r3, [r7, #12] + 8002d2c: 4a0d ldr r2, [pc, #52] ; (8002d64 ) + 8002d2e: 661a str r2, [r3, #96] ; 0x60 + 8002d30: e002 b.n 8002d38 } else { huart->RxISR = UART_RxISR_8BIT; - 8002cda: 68fb ldr r3, [r7, #12] - 8002cdc: 4a0c ldr r2, [pc, #48] ; (8002d10 ) - 8002cde: 661a str r2, [r3, #96] ; 0x60 + 8002d32: 68fb ldr r3, [r7, #12] + 8002d34: 4a0c ldr r2, [pc, #48] ; (8002d68 ) + 8002d36: 661a str r2, [r3, #96] ; 0x60 } /* Process Unlocked */ __HAL_UNLOCK(huart); - 8002ce0: 68fb ldr r3, [r7, #12] - 8002ce2: 2200 movs r2, #0 - 8002ce4: f883 2070 strb.w r2, [r3, #112] ; 0x70 + 8002d38: 68fb ldr r3, [r7, #12] + 8002d3a: 2200 movs r2, #0 + 8002d3c: f883 2070 strb.w r2, [r3, #112] ; 0x70 /* Enable the UART Parity Error interrupt and Data Register Not Empty interrupt */ SET_BIT(huart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE); - 8002ce8: 68fb ldr r3, [r7, #12] - 8002cea: 681b ldr r3, [r3, #0] - 8002cec: 681a ldr r2, [r3, #0] - 8002cee: 68fb ldr r3, [r7, #12] - 8002cf0: 681b ldr r3, [r3, #0] - 8002cf2: f442 7290 orr.w r2, r2, #288 ; 0x120 - 8002cf6: 601a str r2, [r3, #0] + 8002d40: 68fb ldr r3, [r7, #12] + 8002d42: 681b ldr r3, [r3, #0] + 8002d44: 681a ldr r2, [r3, #0] + 8002d46: 68fb ldr r3, [r7, #12] + 8002d48: 681b ldr r3, [r3, #0] + 8002d4a: f442 7290 orr.w r2, r2, #288 ; 0x120 + 8002d4e: 601a str r2, [r3, #0] return HAL_OK; - 8002cf8: 2300 movs r3, #0 - 8002cfa: e000 b.n 8002cfe + 8002d50: 2300 movs r3, #0 + 8002d52: e000 b.n 8002d56 } else { return HAL_BUSY; - 8002cfc: 2302 movs r3, #2 + 8002d54: 2302 movs r3, #2 } } - 8002cfe: 4618 mov r0, r3 - 8002d00: 3714 adds r7, #20 - 8002d02: 46bd mov sp, r7 - 8002d04: f85d 7b04 ldr.w r7, [sp], #4 - 8002d08: 4770 bx lr - 8002d0a: bf00 nop - 8002d0c: 0800381f .word 0x0800381f - 8002d10: 08003779 .word 0x08003779 - -08002d14 : + 8002d56: 4618 mov r0, r3 + 8002d58: 3714 adds r7, #20 + 8002d5a: 46bd mov sp, r7 + 8002d5c: f85d 7b04 ldr.w r7, [sp], #4 + 8002d60: 4770 bx lr + 8002d62: bf00 nop + 8002d64: 08003877 .word 0x08003877 + 8002d68: 080037d1 .word 0x080037d1 + +08002d6c : * @brief Handle UART interrupt request. * @param huart UART handle. * @retval None */ void HAL_UART_IRQHandler(UART_HandleTypeDef *huart) { - 8002d14: b580 push {r7, lr} - 8002d16: b088 sub sp, #32 - 8002d18: af00 add r7, sp, #0 - 8002d1a: 6078 str r0, [r7, #4] + 8002d6c: b580 push {r7, lr} + 8002d6e: b088 sub sp, #32 + 8002d70: af00 add r7, sp, #0 + 8002d72: 6078 str r0, [r7, #4] uint32_t isrflags = READ_REG(huart->Instance->ISR); - 8002d1c: 687b ldr r3, [r7, #4] - 8002d1e: 681b ldr r3, [r3, #0] - 8002d20: 69db ldr r3, [r3, #28] - 8002d22: 61fb str r3, [r7, #28] + 8002d74: 687b ldr r3, [r7, #4] + 8002d76: 681b ldr r3, [r3, #0] + 8002d78: 69db ldr r3, [r3, #28] + 8002d7a: 61fb str r3, [r7, #28] uint32_t cr1its = READ_REG(huart->Instance->CR1); - 8002d24: 687b ldr r3, [r7, #4] - 8002d26: 681b ldr r3, [r3, #0] - 8002d28: 681b ldr r3, [r3, #0] - 8002d2a: 61bb str r3, [r7, #24] + 8002d7c: 687b ldr r3, [r7, #4] + 8002d7e: 681b ldr r3, [r3, #0] + 8002d80: 681b ldr r3, [r3, #0] + 8002d82: 61bb str r3, [r7, #24] uint32_t cr3its = READ_REG(huart->Instance->CR3); - 8002d2c: 687b ldr r3, [r7, #4] - 8002d2e: 681b ldr r3, [r3, #0] - 8002d30: 689b ldr r3, [r3, #8] - 8002d32: 617b str r3, [r7, #20] + 8002d84: 687b ldr r3, [r7, #4] + 8002d86: 681b ldr r3, [r3, #0] + 8002d88: 689b ldr r3, [r3, #8] + 8002d8a: 617b str r3, [r7, #20] uint32_t errorflags; uint32_t errorcode; /* If no error occurs */ errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE)); - 8002d34: 69fb ldr r3, [r7, #28] - 8002d36: f003 030f and.w r3, r3, #15 - 8002d3a: 613b str r3, [r7, #16] + 8002d8c: 69fb ldr r3, [r7, #28] + 8002d8e: f003 030f and.w r3, r3, #15 + 8002d92: 613b str r3, [r7, #16] if (errorflags == 0U) - 8002d3c: 693b ldr r3, [r7, #16] - 8002d3e: 2b00 cmp r3, #0 - 8002d40: d113 bne.n 8002d6a + 8002d94: 693b ldr r3, [r7, #16] + 8002d96: 2b00 cmp r3, #0 + 8002d98: d113 bne.n 8002dc2 { /* UART in mode Receiver ---------------------------------------------------*/ if (((isrflags & USART_ISR_RXNE) != 0U) - 8002d42: 69fb ldr r3, [r7, #28] - 8002d44: f003 0320 and.w r3, r3, #32 - 8002d48: 2b00 cmp r3, #0 - 8002d4a: d00e beq.n 8002d6a + 8002d9a: 69fb ldr r3, [r7, #28] + 8002d9c: f003 0320 and.w r3, r3, #32 + 8002da0: 2b00 cmp r3, #0 + 8002da2: d00e beq.n 8002dc2 && ((cr1its & USART_CR1_RXNEIE) != 0U)) - 8002d4c: 69bb ldr r3, [r7, #24] - 8002d4e: f003 0320 and.w r3, r3, #32 - 8002d52: 2b00 cmp r3, #0 - 8002d54: d009 beq.n 8002d6a + 8002da4: 69bb ldr r3, [r7, #24] + 8002da6: f003 0320 and.w r3, r3, #32 + 8002daa: 2b00 cmp r3, #0 + 8002dac: d009 beq.n 8002dc2 { if (huart->RxISR != NULL) - 8002d56: 687b ldr r3, [r7, #4] - 8002d58: 6e1b ldr r3, [r3, #96] ; 0x60 - 8002d5a: 2b00 cmp r3, #0 - 8002d5c: f000 80eb beq.w 8002f36 + 8002dae: 687b ldr r3, [r7, #4] + 8002db0: 6e1b ldr r3, [r3, #96] ; 0x60 + 8002db2: 2b00 cmp r3, #0 + 8002db4: f000 80eb beq.w 8002f8e { huart->RxISR(huart); - 8002d60: 687b ldr r3, [r7, #4] - 8002d62: 6e1b ldr r3, [r3, #96] ; 0x60 - 8002d64: 6878 ldr r0, [r7, #4] - 8002d66: 4798 blx r3 + 8002db8: 687b ldr r3, [r7, #4] + 8002dba: 6e1b ldr r3, [r3, #96] ; 0x60 + 8002dbc: 6878 ldr r0, [r7, #4] + 8002dbe: 4798 blx r3 } return; - 8002d68: e0e5 b.n 8002f36 + 8002dc0: e0e5 b.n 8002f8e } } /* If some errors occur */ if ((errorflags != 0U) - 8002d6a: 693b ldr r3, [r7, #16] - 8002d6c: 2b00 cmp r3, #0 - 8002d6e: f000 80c0 beq.w 8002ef2 + 8002dc2: 693b ldr r3, [r7, #16] + 8002dc4: 2b00 cmp r3, #0 + 8002dc6: f000 80c0 beq.w 8002f4a && (((cr3its & USART_CR3_EIE) != 0U) - 8002d72: 697b ldr r3, [r7, #20] - 8002d74: f003 0301 and.w r3, r3, #1 - 8002d78: 2b00 cmp r3, #0 - 8002d7a: d105 bne.n 8002d88 + 8002dca: 697b ldr r3, [r7, #20] + 8002dcc: f003 0301 and.w r3, r3, #1 + 8002dd0: 2b00 cmp r3, #0 + 8002dd2: d105 bne.n 8002de0 || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != 0U))) - 8002d7c: 69bb ldr r3, [r7, #24] - 8002d7e: f403 7390 and.w r3, r3, #288 ; 0x120 - 8002d82: 2b00 cmp r3, #0 - 8002d84: f000 80b5 beq.w 8002ef2 + 8002dd4: 69bb ldr r3, [r7, #24] + 8002dd6: f403 7390 and.w r3, r3, #288 ; 0x120 + 8002dda: 2b00 cmp r3, #0 + 8002ddc: f000 80b5 beq.w 8002f4a { /* UART parity error interrupt occurred -------------------------------------*/ if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U)) - 8002d88: 69fb ldr r3, [r7, #28] - 8002d8a: f003 0301 and.w r3, r3, #1 - 8002d8e: 2b00 cmp r3, #0 - 8002d90: d00e beq.n 8002db0 - 8002d92: 69bb ldr r3, [r7, #24] - 8002d94: f403 7380 and.w r3, r3, #256 ; 0x100 - 8002d98: 2b00 cmp r3, #0 - 8002d9a: d009 beq.n 8002db0 + 8002de0: 69fb ldr r3, [r7, #28] + 8002de2: f003 0301 and.w r3, r3, #1 + 8002de6: 2b00 cmp r3, #0 + 8002de8: d00e beq.n 8002e08 + 8002dea: 69bb ldr r3, [r7, #24] + 8002dec: f403 7380 and.w r3, r3, #256 ; 0x100 + 8002df0: 2b00 cmp r3, #0 + 8002df2: d009 beq.n 8002e08 { __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF); - 8002d9c: 687b ldr r3, [r7, #4] - 8002d9e: 681b ldr r3, [r3, #0] - 8002da0: 2201 movs r2, #1 - 8002da2: 621a str r2, [r3, #32] + 8002df4: 687b ldr r3, [r7, #4] + 8002df6: 681b ldr r3, [r3, #0] + 8002df8: 2201 movs r2, #1 + 8002dfa: 621a str r2, [r3, #32] huart->ErrorCode |= HAL_UART_ERROR_PE; - 8002da4: 687b ldr r3, [r7, #4] - 8002da6: 6fdb ldr r3, [r3, #124] ; 0x7c - 8002da8: f043 0201 orr.w r2, r3, #1 - 8002dac: 687b ldr r3, [r7, #4] - 8002dae: 67da str r2, [r3, #124] ; 0x7c + 8002dfc: 687b ldr r3, [r7, #4] + 8002dfe: 6fdb ldr r3, [r3, #124] ; 0x7c + 8002e00: f043 0201 orr.w r2, r3, #1 + 8002e04: 687b ldr r3, [r7, #4] + 8002e06: 67da str r2, [r3, #124] ; 0x7c } /* UART frame error interrupt occurred --------------------------------------*/ if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U)) - 8002db0: 69fb ldr r3, [r7, #28] - 8002db2: f003 0302 and.w r3, r3, #2 - 8002db6: 2b00 cmp r3, #0 - 8002db8: d00e beq.n 8002dd8 - 8002dba: 697b ldr r3, [r7, #20] - 8002dbc: f003 0301 and.w r3, r3, #1 - 8002dc0: 2b00 cmp r3, #0 - 8002dc2: d009 beq.n 8002dd8 + 8002e08: 69fb ldr r3, [r7, #28] + 8002e0a: f003 0302 and.w r3, r3, #2 + 8002e0e: 2b00 cmp r3, #0 + 8002e10: d00e beq.n 8002e30 + 8002e12: 697b ldr r3, [r7, #20] + 8002e14: f003 0301 and.w r3, r3, #1 + 8002e18: 2b00 cmp r3, #0 + 8002e1a: d009 beq.n 8002e30 { __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF); - 8002dc4: 687b ldr r3, [r7, #4] - 8002dc6: 681b ldr r3, [r3, #0] - 8002dc8: 2202 movs r2, #2 - 8002dca: 621a str r2, [r3, #32] + 8002e1c: 687b ldr r3, [r7, #4] + 8002e1e: 681b ldr r3, [r3, #0] + 8002e20: 2202 movs r2, #2 + 8002e22: 621a str r2, [r3, #32] huart->ErrorCode |= HAL_UART_ERROR_FE; - 8002dcc: 687b ldr r3, [r7, #4] - 8002dce: 6fdb ldr r3, [r3, #124] ; 0x7c - 8002dd0: f043 0204 orr.w r2, r3, #4 - 8002dd4: 687b ldr r3, [r7, #4] - 8002dd6: 67da str r2, [r3, #124] ; 0x7c + 8002e24: 687b ldr r3, [r7, #4] + 8002e26: 6fdb ldr r3, [r3, #124] ; 0x7c + 8002e28: f043 0204 orr.w r2, r3, #4 + 8002e2c: 687b ldr r3, [r7, #4] + 8002e2e: 67da str r2, [r3, #124] ; 0x7c } /* UART noise error interrupt occurred --------------------------------------*/ if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U)) - 8002dd8: 69fb ldr r3, [r7, #28] - 8002dda: f003 0304 and.w r3, r3, #4 - 8002dde: 2b00 cmp r3, #0 - 8002de0: d00e beq.n 8002e00 - 8002de2: 697b ldr r3, [r7, #20] - 8002de4: f003 0301 and.w r3, r3, #1 - 8002de8: 2b00 cmp r3, #0 - 8002dea: d009 beq.n 8002e00 + 8002e30: 69fb ldr r3, [r7, #28] + 8002e32: f003 0304 and.w r3, r3, #4 + 8002e36: 2b00 cmp r3, #0 + 8002e38: d00e beq.n 8002e58 + 8002e3a: 697b ldr r3, [r7, #20] + 8002e3c: f003 0301 and.w r3, r3, #1 + 8002e40: 2b00 cmp r3, #0 + 8002e42: d009 beq.n 8002e58 { __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF); - 8002dec: 687b ldr r3, [r7, #4] - 8002dee: 681b ldr r3, [r3, #0] - 8002df0: 2204 movs r2, #4 - 8002df2: 621a str r2, [r3, #32] + 8002e44: 687b ldr r3, [r7, #4] + 8002e46: 681b ldr r3, [r3, #0] + 8002e48: 2204 movs r2, #4 + 8002e4a: 621a str r2, [r3, #32] huart->ErrorCode |= HAL_UART_ERROR_NE; - 8002df4: 687b ldr r3, [r7, #4] - 8002df6: 6fdb ldr r3, [r3, #124] ; 0x7c - 8002df8: f043 0202 orr.w r2, r3, #2 - 8002dfc: 687b ldr r3, [r7, #4] - 8002dfe: 67da str r2, [r3, #124] ; 0x7c + 8002e4c: 687b ldr r3, [r7, #4] + 8002e4e: 6fdb ldr r3, [r3, #124] ; 0x7c + 8002e50: f043 0202 orr.w r2, r3, #2 + 8002e54: 687b ldr r3, [r7, #4] + 8002e56: 67da str r2, [r3, #124] ; 0x7c } /* UART Over-Run interrupt occurred -----------------------------------------*/ if (((isrflags & USART_ISR_ORE) != 0U) - 8002e00: 69fb ldr r3, [r7, #28] - 8002e02: f003 0308 and.w r3, r3, #8 - 8002e06: 2b00 cmp r3, #0 - 8002e08: d013 beq.n 8002e32 + 8002e58: 69fb ldr r3, [r7, #28] + 8002e5a: f003 0308 and.w r3, r3, #8 + 8002e5e: 2b00 cmp r3, #0 + 8002e60: d013 beq.n 8002e8a && (((cr1its & USART_CR1_RXNEIE) != 0U) || - 8002e0a: 69bb ldr r3, [r7, #24] - 8002e0c: f003 0320 and.w r3, r3, #32 - 8002e10: 2b00 cmp r3, #0 - 8002e12: d104 bne.n 8002e1e + 8002e62: 69bb ldr r3, [r7, #24] + 8002e64: f003 0320 and.w r3, r3, #32 + 8002e68: 2b00 cmp r3, #0 + 8002e6a: d104 bne.n 8002e76 ((cr3its & USART_CR3_EIE) != 0U))) - 8002e14: 697b ldr r3, [r7, #20] - 8002e16: f003 0301 and.w r3, r3, #1 + 8002e6c: 697b ldr r3, [r7, #20] + 8002e6e: f003 0301 and.w r3, r3, #1 && (((cr1its & USART_CR1_RXNEIE) != 0U) || - 8002e1a: 2b00 cmp r3, #0 - 8002e1c: d009 beq.n 8002e32 + 8002e72: 2b00 cmp r3, #0 + 8002e74: d009 beq.n 8002e8a { __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF); - 8002e1e: 687b ldr r3, [r7, #4] - 8002e20: 681b ldr r3, [r3, #0] - 8002e22: 2208 movs r2, #8 - 8002e24: 621a str r2, [r3, #32] + 8002e76: 687b ldr r3, [r7, #4] + 8002e78: 681b ldr r3, [r3, #0] + 8002e7a: 2208 movs r2, #8 + 8002e7c: 621a str r2, [r3, #32] huart->ErrorCode |= HAL_UART_ERROR_ORE; - 8002e26: 687b ldr r3, [r7, #4] - 8002e28: 6fdb ldr r3, [r3, #124] ; 0x7c - 8002e2a: f043 0208 orr.w r2, r3, #8 - 8002e2e: 687b ldr r3, [r7, #4] - 8002e30: 67da str r2, [r3, #124] ; 0x7c + 8002e7e: 687b ldr r3, [r7, #4] + 8002e80: 6fdb ldr r3, [r3, #124] ; 0x7c + 8002e82: f043 0208 orr.w r2, r3, #8 + 8002e86: 687b ldr r3, [r7, #4] + 8002e88: 67da str r2, [r3, #124] ; 0x7c } /* Call UART Error Call back function if need be --------------------------*/ if (huart->ErrorCode != HAL_UART_ERROR_NONE) - 8002e32: 687b ldr r3, [r7, #4] - 8002e34: 6fdb ldr r3, [r3, #124] ; 0x7c - 8002e36: 2b00 cmp r3, #0 - 8002e38: d07f beq.n 8002f3a + 8002e8a: 687b ldr r3, [r7, #4] + 8002e8c: 6fdb ldr r3, [r3, #124] ; 0x7c + 8002e8e: 2b00 cmp r3, #0 + 8002e90: d07f beq.n 8002f92 { /* UART in mode Receiver ---------------------------------------------------*/ if (((isrflags & USART_ISR_RXNE) != 0U) - 8002e3a: 69fb ldr r3, [r7, #28] - 8002e3c: f003 0320 and.w r3, r3, #32 - 8002e40: 2b00 cmp r3, #0 - 8002e42: d00c beq.n 8002e5e + 8002e92: 69fb ldr r3, [r7, #28] + 8002e94: f003 0320 and.w r3, r3, #32 + 8002e98: 2b00 cmp r3, #0 + 8002e9a: d00c beq.n 8002eb6 && ((cr1its & USART_CR1_RXNEIE) != 0U)) - 8002e44: 69bb ldr r3, [r7, #24] - 8002e46: f003 0320 and.w r3, r3, #32 - 8002e4a: 2b00 cmp r3, #0 - 8002e4c: d007 beq.n 8002e5e + 8002e9c: 69bb ldr r3, [r7, #24] + 8002e9e: f003 0320 and.w r3, r3, #32 + 8002ea2: 2b00 cmp r3, #0 + 8002ea4: d007 beq.n 8002eb6 { if (huart->RxISR != NULL) - 8002e4e: 687b ldr r3, [r7, #4] - 8002e50: 6e1b ldr r3, [r3, #96] ; 0x60 - 8002e52: 2b00 cmp r3, #0 - 8002e54: d003 beq.n 8002e5e + 8002ea6: 687b ldr r3, [r7, #4] + 8002ea8: 6e1b ldr r3, [r3, #96] ; 0x60 + 8002eaa: 2b00 cmp r3, #0 + 8002eac: d003 beq.n 8002eb6 { huart->RxISR(huart); - 8002e56: 687b ldr r3, [r7, #4] - 8002e58: 6e1b ldr r3, [r3, #96] ; 0x60 - 8002e5a: 6878 ldr r0, [r7, #4] - 8002e5c: 4798 blx r3 + 8002eae: 687b ldr r3, [r7, #4] + 8002eb0: 6e1b ldr r3, [r3, #96] ; 0x60 + 8002eb2: 6878 ldr r0, [r7, #4] + 8002eb4: 4798 blx r3 } } /* If Overrun error occurs, or if any error occurs in DMA mode reception, consider error as blocking */ errorcode = huart->ErrorCode; - 8002e5e: 687b ldr r3, [r7, #4] - 8002e60: 6fdb ldr r3, [r3, #124] ; 0x7c - 8002e62: 60fb str r3, [r7, #12] + 8002eb6: 687b ldr r3, [r7, #4] + 8002eb8: 6fdb ldr r3, [r3, #124] ; 0x7c + 8002eba: 60fb str r3, [r7, #12] if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) || - 8002e64: 687b ldr r3, [r7, #4] - 8002e66: 681b ldr r3, [r3, #0] - 8002e68: 689b ldr r3, [r3, #8] - 8002e6a: f003 0340 and.w r3, r3, #64 ; 0x40 - 8002e6e: 2b40 cmp r3, #64 ; 0x40 - 8002e70: d004 beq.n 8002e7c + 8002ebc: 687b ldr r3, [r7, #4] + 8002ebe: 681b ldr r3, [r3, #0] + 8002ec0: 689b ldr r3, [r3, #8] + 8002ec2: f003 0340 and.w r3, r3, #64 ; 0x40 + 8002ec6: 2b40 cmp r3, #64 ; 0x40 + 8002ec8: d004 beq.n 8002ed4 ((errorcode & HAL_UART_ERROR_ORE) != 0U)) - 8002e72: 68fb ldr r3, [r7, #12] - 8002e74: f003 0308 and.w r3, r3, #8 + 8002eca: 68fb ldr r3, [r7, #12] + 8002ecc: f003 0308 and.w r3, r3, #8 if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) || - 8002e78: 2b00 cmp r3, #0 - 8002e7a: d031 beq.n 8002ee0 + 8002ed0: 2b00 cmp r3, #0 + 8002ed2: d031 beq.n 8002f38 { /* Blocking error : transfer is aborted Set the UART state ready to be able to start again the process, Disable Rx Interrupts, and disable Rx DMA request, if ongoing */ UART_EndRxTransfer(huart); - 8002e7c: 6878 ldr r0, [r7, #4] - 8002e7e: f000 fc2c bl 80036da + 8002ed4: 6878 ldr r0, [r7, #4] + 8002ed6: f000 fc2c bl 8003732 /* Disable the UART DMA Rx request if enabled */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 8002e82: 687b ldr r3, [r7, #4] - 8002e84: 681b ldr r3, [r3, #0] - 8002e86: 689b ldr r3, [r3, #8] - 8002e88: f003 0340 and.w r3, r3, #64 ; 0x40 - 8002e8c: 2b40 cmp r3, #64 ; 0x40 - 8002e8e: d123 bne.n 8002ed8 + 8002eda: 687b ldr r3, [r7, #4] + 8002edc: 681b ldr r3, [r3, #0] + 8002ede: 689b ldr r3, [r3, #8] + 8002ee0: f003 0340 and.w r3, r3, #64 ; 0x40 + 8002ee4: 2b40 cmp r3, #64 ; 0x40 + 8002ee6: d123 bne.n 8002f30 { CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - 8002e90: 687b ldr r3, [r7, #4] - 8002e92: 681b ldr r3, [r3, #0] - 8002e94: 689a ldr r2, [r3, #8] - 8002e96: 687b ldr r3, [r7, #4] - 8002e98: 681b ldr r3, [r3, #0] - 8002e9a: f022 0240 bic.w r2, r2, #64 ; 0x40 - 8002e9e: 609a str r2, [r3, #8] + 8002ee8: 687b ldr r3, [r7, #4] + 8002eea: 681b ldr r3, [r3, #0] + 8002eec: 689a ldr r2, [r3, #8] + 8002eee: 687b ldr r3, [r7, #4] + 8002ef0: 681b ldr r3, [r3, #0] + 8002ef2: f022 0240 bic.w r2, r2, #64 ; 0x40 + 8002ef6: 609a str r2, [r3, #8] /* Abort the UART DMA Rx channel */ if (huart->hdmarx != NULL) - 8002ea0: 687b ldr r3, [r7, #4] - 8002ea2: 6edb ldr r3, [r3, #108] ; 0x6c - 8002ea4: 2b00 cmp r3, #0 - 8002ea6: d013 beq.n 8002ed0 + 8002ef8: 687b ldr r3, [r7, #4] + 8002efa: 6edb ldr r3, [r3, #108] ; 0x6c + 8002efc: 2b00 cmp r3, #0 + 8002efe: d013 beq.n 8002f28 { /* Set the UART DMA Abort callback : will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */ huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError; - 8002ea8: 687b ldr r3, [r7, #4] - 8002eaa: 6edb ldr r3, [r3, #108] ; 0x6c - 8002eac: 4a26 ldr r2, [pc, #152] ; (8002f48 ) - 8002eae: 651a str r2, [r3, #80] ; 0x50 + 8002f00: 687b ldr r3, [r7, #4] + 8002f02: 6edb ldr r3, [r3, #108] ; 0x6c + 8002f04: 4a26 ldr r2, [pc, #152] ; (8002fa0 ) + 8002f06: 651a str r2, [r3, #80] ; 0x50 /* Abort DMA RX */ if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) - 8002eb0: 687b ldr r3, [r7, #4] - 8002eb2: 6edb ldr r3, [r3, #108] ; 0x6c - 8002eb4: 4618 mov r0, r3 - 8002eb6: f7fd ff98 bl 8000dea - 8002eba: 4603 mov r3, r0 - 8002ebc: 2b00 cmp r3, #0 - 8002ebe: d016 beq.n 8002eee + 8002f08: 687b ldr r3, [r7, #4] + 8002f0a: 6edb ldr r3, [r3, #108] ; 0x6c + 8002f0c: 4618 mov r0, r3 + 8002f0e: f7fd ff6c bl 8000dea + 8002f12: 4603 mov r3, r0 + 8002f14: 2b00 cmp r3, #0 + 8002f16: d016 beq.n 8002f46 { /* Call Directly huart->hdmarx->XferAbortCallback function in case of error */ huart->hdmarx->XferAbortCallback(huart->hdmarx); - 8002ec0: 687b ldr r3, [r7, #4] - 8002ec2: 6edb ldr r3, [r3, #108] ; 0x6c - 8002ec4: 6d1b ldr r3, [r3, #80] ; 0x50 - 8002ec6: 687a ldr r2, [r7, #4] - 8002ec8: 6ed2 ldr r2, [r2, #108] ; 0x6c - 8002eca: 4610 mov r0, r2 - 8002ecc: 4798 blx r3 + 8002f18: 687b ldr r3, [r7, #4] + 8002f1a: 6edb ldr r3, [r3, #108] ; 0x6c + 8002f1c: 6d1b ldr r3, [r3, #80] ; 0x50 + 8002f1e: 687a ldr r2, [r7, #4] + 8002f20: 6ed2 ldr r2, [r2, #108] ; 0x6c + 8002f22: 4610 mov r0, r2 + 8002f24: 4798 blx r3 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 8002ece: e00e b.n 8002eee + 8002f26: e00e b.n 8002f46 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); - 8002ed0: 6878 ldr r0, [r7, #4] - 8002ed2: f7fd fcb5 bl 8000840 + 8002f28: 6878 ldr r0, [r7, #4] + 8002f2a: f7fd fc89 bl 8000840 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 8002ed6: e00a b.n 8002eee + 8002f2e: e00a b.n 8002f46 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); - 8002ed8: 6878 ldr r0, [r7, #4] - 8002eda: f7fd fcb1 bl 8000840 + 8002f30: 6878 ldr r0, [r7, #4] + 8002f32: f7fd fc85 bl 8000840 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 8002ede: e006 b.n 8002eee + 8002f36: e006 b.n 8002f46 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); - 8002ee0: 6878 ldr r0, [r7, #4] - 8002ee2: f7fd fcad bl 8000840 + 8002f38: 6878 ldr r0, [r7, #4] + 8002f3a: f7fd fc81 bl 8000840 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ huart->ErrorCode = HAL_UART_ERROR_NONE; - 8002ee6: 687b ldr r3, [r7, #4] - 8002ee8: 2200 movs r2, #0 - 8002eea: 67da str r2, [r3, #124] ; 0x7c + 8002f3e: 687b ldr r3, [r7, #4] + 8002f40: 2200 movs r2, #0 + 8002f42: 67da str r2, [r3, #124] ; 0x7c } } return; - 8002eec: e025 b.n 8002f3a + 8002f44: e025 b.n 8002f92 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 8002eee: bf00 nop + 8002f46: bf00 nop return; - 8002ef0: e023 b.n 8002f3a + 8002f48: e023 b.n 8002f92 } /* End if some error occurs */ /* UART in mode Transmitter ------------------------------------------------*/ if (((isrflags & USART_ISR_TXE) != 0U) - 8002ef2: 69fb ldr r3, [r7, #28] - 8002ef4: f003 0380 and.w r3, r3, #128 ; 0x80 - 8002ef8: 2b00 cmp r3, #0 - 8002efa: d00d beq.n 8002f18 + 8002f4a: 69fb ldr r3, [r7, #28] + 8002f4c: f003 0380 and.w r3, r3, #128 ; 0x80 + 8002f50: 2b00 cmp r3, #0 + 8002f52: d00d beq.n 8002f70 && ((cr1its & USART_CR1_TXEIE) != 0U)) - 8002efc: 69bb ldr r3, [r7, #24] - 8002efe: f003 0380 and.w r3, r3, #128 ; 0x80 - 8002f02: 2b00 cmp r3, #0 - 8002f04: d008 beq.n 8002f18 + 8002f54: 69bb ldr r3, [r7, #24] + 8002f56: f003 0380 and.w r3, r3, #128 ; 0x80 + 8002f5a: 2b00 cmp r3, #0 + 8002f5c: d008 beq.n 8002f70 { if (huart->TxISR != NULL) - 8002f06: 687b ldr r3, [r7, #4] - 8002f08: 6e5b ldr r3, [r3, #100] ; 0x64 - 8002f0a: 2b00 cmp r3, #0 - 8002f0c: d017 beq.n 8002f3e + 8002f5e: 687b ldr r3, [r7, #4] + 8002f60: 6e5b ldr r3, [r3, #100] ; 0x64 + 8002f62: 2b00 cmp r3, #0 + 8002f64: d017 beq.n 8002f96 { huart->TxISR(huart); - 8002f0e: 687b ldr r3, [r7, #4] - 8002f10: 6e5b ldr r3, [r3, #100] ; 0x64 - 8002f12: 6878 ldr r0, [r7, #4] - 8002f14: 4798 blx r3 + 8002f66: 687b ldr r3, [r7, #4] + 8002f68: 6e5b ldr r3, [r3, #100] ; 0x64 + 8002f6a: 6878 ldr r0, [r7, #4] + 8002f6c: 4798 blx r3 } return; - 8002f16: e012 b.n 8002f3e + 8002f6e: e012 b.n 8002f96 } /* UART in mode Transmitter (transmission end) -----------------------------*/ if (((isrflags & USART_ISR_TC) != 0U) && ((cr1its & USART_CR1_TCIE) != 0U)) - 8002f18: 69fb ldr r3, [r7, #28] - 8002f1a: f003 0340 and.w r3, r3, #64 ; 0x40 - 8002f1e: 2b00 cmp r3, #0 - 8002f20: d00e beq.n 8002f40 - 8002f22: 69bb ldr r3, [r7, #24] - 8002f24: f003 0340 and.w r3, r3, #64 ; 0x40 - 8002f28: 2b00 cmp r3, #0 - 8002f2a: d009 beq.n 8002f40 + 8002f70: 69fb ldr r3, [r7, #28] + 8002f72: f003 0340 and.w r3, r3, #64 ; 0x40 + 8002f76: 2b00 cmp r3, #0 + 8002f78: d00e beq.n 8002f98 + 8002f7a: 69bb ldr r3, [r7, #24] + 8002f7c: f003 0340 and.w r3, r3, #64 ; 0x40 + 8002f80: 2b00 cmp r3, #0 + 8002f82: d009 beq.n 8002f98 { UART_EndTransmit_IT(huart); - 8002f2c: 6878 ldr r0, [r7, #4] - 8002f2e: f000 fc0a bl 8003746 + 8002f84: 6878 ldr r0, [r7, #4] + 8002f86: f000 fc0a bl 800379e return; - 8002f32: bf00 nop - 8002f34: e004 b.n 8002f40 + 8002f8a: bf00 nop + 8002f8c: e004 b.n 8002f98 return; - 8002f36: bf00 nop - 8002f38: e002 b.n 8002f40 + 8002f8e: bf00 nop + 8002f90: e002 b.n 8002f98 return; - 8002f3a: bf00 nop - 8002f3c: e000 b.n 8002f40 + 8002f92: bf00 nop + 8002f94: e000 b.n 8002f98 return; - 8002f3e: bf00 nop + 8002f96: bf00 nop } } - 8002f40: 3720 adds r7, #32 - 8002f42: 46bd mov sp, r7 - 8002f44: bd80 pop {r7, pc} - 8002f46: bf00 nop - 8002f48: 0800371b .word 0x0800371b + 8002f98: 3720 adds r7, #32 + 8002f9a: 46bd mov sp, r7 + 8002f9c: bd80 pop {r7, pc} + 8002f9e: bf00 nop + 8002fa0: 08003773 .word 0x08003773 -08002f4c : +08002fa4 : * @brief Tx Transfer completed callback. * @param huart UART handle. * @retval None */ __weak void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) { - 8002f4c: b480 push {r7} - 8002f4e: b083 sub sp, #12 - 8002f50: af00 add r7, sp, #0 - 8002f52: 6078 str r0, [r7, #4] + 8002fa4: b480 push {r7} + 8002fa6: b083 sub sp, #12 + 8002fa8: af00 add r7, sp, #0 + 8002faa: 6078 str r0, [r7, #4] UNUSED(huart); /* NOTE : This function should not be modified, when the callback is needed, the HAL_UART_TxCpltCallback can be implemented in the user file. */ } - 8002f54: bf00 nop - 8002f56: 370c adds r7, #12 - 8002f58: 46bd mov sp, r7 - 8002f5a: f85d 7b04 ldr.w r7, [sp], #4 - 8002f5e: 4770 bx lr + 8002fac: bf00 nop + 8002fae: 370c adds r7, #12 + 8002fb0: 46bd mov sp, r7 + 8002fb2: f85d 7b04 ldr.w r7, [sp], #4 + 8002fb6: 4770 bx lr -08002f60 : +08002fb8 : * @brief Configure the UART peripheral. * @param huart UART handle. * @retval HAL status */ HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart) { - 8002f60: b580 push {r7, lr} - 8002f62: b088 sub sp, #32 - 8002f64: af00 add r7, sp, #0 - 8002f66: 6078 str r0, [r7, #4] + 8002fb8: b580 push {r7, lr} + 8002fba: b088 sub sp, #32 + 8002fbc: af00 add r7, sp, #0 + 8002fbe: 6078 str r0, [r7, #4] uint32_t tmpreg; uint16_t brrtemp; UART_ClockSourceTypeDef clocksource; uint32_t usartdiv = 0x00000000U; - 8002f68: 2300 movs r3, #0 - 8002f6a: 61bb str r3, [r7, #24] + 8002fc0: 2300 movs r3, #0 + 8002fc2: 61bb str r3, [r7, #24] HAL_StatusTypeDef ret = HAL_OK; - 8002f6c: 2300 movs r3, #0 - 8002f6e: 75fb strb r3, [r7, #23] + 8002fc4: 2300 movs r3, #0 + 8002fc6: 75fb strb r3, [r7, #23] * the UART Word Length, Parity, Mode and oversampling: * set the M bits according to huart->Init.WordLength value * set PCE and PS bits according to huart->Init.Parity value * set TE and RE bits according to huart->Init.Mode value * set OVER8 bit according to huart->Init.OverSampling value */ tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling ; - 8002f70: 687b ldr r3, [r7, #4] - 8002f72: 689a ldr r2, [r3, #8] - 8002f74: 687b ldr r3, [r7, #4] - 8002f76: 691b ldr r3, [r3, #16] - 8002f78: 431a orrs r2, r3 - 8002f7a: 687b ldr r3, [r7, #4] - 8002f7c: 695b ldr r3, [r3, #20] - 8002f7e: 431a orrs r2, r3 - 8002f80: 687b ldr r3, [r7, #4] - 8002f82: 69db ldr r3, [r3, #28] - 8002f84: 4313 orrs r3, r2 - 8002f86: 613b str r3, [r7, #16] + 8002fc8: 687b ldr r3, [r7, #4] + 8002fca: 689a ldr r2, [r3, #8] + 8002fcc: 687b ldr r3, [r7, #4] + 8002fce: 691b ldr r3, [r3, #16] + 8002fd0: 431a orrs r2, r3 + 8002fd2: 687b ldr r3, [r7, #4] + 8002fd4: 695b ldr r3, [r3, #20] + 8002fd6: 431a orrs r2, r3 + 8002fd8: 687b ldr r3, [r7, #4] + 8002fda: 69db ldr r3, [r3, #28] + 8002fdc: 4313 orrs r3, r2 + 8002fde: 613b str r3, [r7, #16] MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg); - 8002f88: 687b ldr r3, [r7, #4] - 8002f8a: 681b ldr r3, [r3, #0] - 8002f8c: 681a ldr r2, [r3, #0] - 8002f8e: 4bb1 ldr r3, [pc, #708] ; (8003254 ) - 8002f90: 4013 ands r3, r2 - 8002f92: 687a ldr r2, [r7, #4] - 8002f94: 6812 ldr r2, [r2, #0] - 8002f96: 6939 ldr r1, [r7, #16] - 8002f98: 430b orrs r3, r1 - 8002f9a: 6013 str r3, [r2, #0] + 8002fe0: 687b ldr r3, [r7, #4] + 8002fe2: 681b ldr r3, [r3, #0] + 8002fe4: 681a ldr r2, [r3, #0] + 8002fe6: 4bb1 ldr r3, [pc, #708] ; (80032ac ) + 8002fe8: 4013 ands r3, r2 + 8002fea: 687a ldr r2, [r7, #4] + 8002fec: 6812 ldr r2, [r2, #0] + 8002fee: 6939 ldr r1, [r7, #16] + 8002ff0: 430b orrs r3, r1 + 8002ff2: 6013 str r3, [r2, #0] /*-------------------------- USART CR2 Configuration -----------------------*/ /* Configure the UART Stop Bits: Set STOP[13:12] bits according * to huart->Init.StopBits value */ MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); - 8002f9c: 687b ldr r3, [r7, #4] - 8002f9e: 681b ldr r3, [r3, #0] - 8002fa0: 685b ldr r3, [r3, #4] - 8002fa2: f423 5140 bic.w r1, r3, #12288 ; 0x3000 - 8002fa6: 687b ldr r3, [r7, #4] - 8002fa8: 68da ldr r2, [r3, #12] - 8002faa: 687b ldr r3, [r7, #4] - 8002fac: 681b ldr r3, [r3, #0] - 8002fae: 430a orrs r2, r1 - 8002fb0: 605a str r2, [r3, #4] + 8002ff4: 687b ldr r3, [r7, #4] + 8002ff6: 681b ldr r3, [r3, #0] + 8002ff8: 685b ldr r3, [r3, #4] + 8002ffa: f423 5140 bic.w r1, r3, #12288 ; 0x3000 + 8002ffe: 687b ldr r3, [r7, #4] + 8003000: 68da ldr r2, [r3, #12] + 8003002: 687b ldr r3, [r7, #4] + 8003004: 681b ldr r3, [r3, #0] + 8003006: 430a orrs r2, r1 + 8003008: 605a str r2, [r3, #4] /* Configure * - UART HardWare Flow Control: set CTSE and RTSE bits according * to huart->Init.HwFlowCtl value * - one-bit sampling method versus three samples' majority rule according * to huart->Init.OneBitSampling (not applicable to LPUART) */ tmpreg = (uint32_t)huart->Init.HwFlowCtl; - 8002fb2: 687b ldr r3, [r7, #4] - 8002fb4: 699b ldr r3, [r3, #24] - 8002fb6: 613b str r3, [r7, #16] + 800300a: 687b ldr r3, [r7, #4] + 800300c: 699b ldr r3, [r3, #24] + 800300e: 613b str r3, [r7, #16] tmpreg |= huart->Init.OneBitSampling; - 8002fb8: 687b ldr r3, [r7, #4] - 8002fba: 6a1b ldr r3, [r3, #32] - 8002fbc: 693a ldr r2, [r7, #16] - 8002fbe: 4313 orrs r3, r2 - 8002fc0: 613b str r3, [r7, #16] + 8003010: 687b ldr r3, [r7, #4] + 8003012: 6a1b ldr r3, [r3, #32] + 8003014: 693a ldr r2, [r7, #16] + 8003016: 4313 orrs r3, r2 + 8003018: 613b str r3, [r7, #16] MODIFY_REG(huart->Instance->CR3, USART_CR3_FIELDS, tmpreg); - 8002fc2: 687b ldr r3, [r7, #4] - 8002fc4: 681b ldr r3, [r3, #0] - 8002fc6: 689b ldr r3, [r3, #8] - 8002fc8: f423 6130 bic.w r1, r3, #2816 ; 0xb00 - 8002fcc: 687b ldr r3, [r7, #4] - 8002fce: 681b ldr r3, [r3, #0] - 8002fd0: 693a ldr r2, [r7, #16] - 8002fd2: 430a orrs r2, r1 - 8002fd4: 609a str r2, [r3, #8] + 800301a: 687b ldr r3, [r7, #4] + 800301c: 681b ldr r3, [r3, #0] + 800301e: 689b ldr r3, [r3, #8] + 8003020: f423 6130 bic.w r1, r3, #2816 ; 0xb00 + 8003024: 687b ldr r3, [r7, #4] + 8003026: 681b ldr r3, [r3, #0] + 8003028: 693a ldr r2, [r7, #16] + 800302a: 430a orrs r2, r1 + 800302c: 609a str r2, [r3, #8] /*-------------------------- USART BRR Configuration -----------------------*/ UART_GETCLOCKSOURCE(huart, clocksource); - 8002fd6: 687b ldr r3, [r7, #4] - 8002fd8: 681b ldr r3, [r3, #0] - 8002fda: 4a9f ldr r2, [pc, #636] ; (8003258 ) - 8002fdc: 4293 cmp r3, r2 - 8002fde: d121 bne.n 8003024 - 8002fe0: 4b9e ldr r3, [pc, #632] ; (800325c ) - 8002fe2: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 8002fe6: f003 0303 and.w r3, r3, #3 - 8002fea: 2b03 cmp r3, #3 - 8002fec: d816 bhi.n 800301c - 8002fee: a201 add r2, pc, #4 ; (adr r2, 8002ff4 ) - 8002ff0: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8002ff4: 08003005 .word 0x08003005 - 8002ff8: 08003011 .word 0x08003011 - 8002ffc: 0800300b .word 0x0800300b - 8003000: 08003017 .word 0x08003017 - 8003004: 2301 movs r3, #1 - 8003006: 77fb strb r3, [r7, #31] - 8003008: e151 b.n 80032ae - 800300a: 2302 movs r3, #2 - 800300c: 77fb strb r3, [r7, #31] - 800300e: e14e b.n 80032ae - 8003010: 2304 movs r3, #4 - 8003012: 77fb strb r3, [r7, #31] - 8003014: e14b b.n 80032ae - 8003016: 2308 movs r3, #8 - 8003018: 77fb strb r3, [r7, #31] - 800301a: e148 b.n 80032ae - 800301c: 2310 movs r3, #16 - 800301e: 77fb strb r3, [r7, #31] - 8003020: bf00 nop - 8003022: e144 b.n 80032ae - 8003024: 687b ldr r3, [r7, #4] - 8003026: 681b ldr r3, [r3, #0] - 8003028: 4a8d ldr r2, [pc, #564] ; (8003260 ) - 800302a: 4293 cmp r3, r2 - 800302c: d134 bne.n 8003098 - 800302e: 4b8b ldr r3, [pc, #556] ; (800325c ) - 8003030: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 8003034: f003 030c and.w r3, r3, #12 - 8003038: 2b0c cmp r3, #12 - 800303a: d829 bhi.n 8003090 - 800303c: a201 add r2, pc, #4 ; (adr r2, 8003044 ) - 800303e: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8003042: bf00 nop - 8003044: 08003079 .word 0x08003079 - 8003048: 08003091 .word 0x08003091 - 800304c: 08003091 .word 0x08003091 - 8003050: 08003091 .word 0x08003091 - 8003054: 08003085 .word 0x08003085 - 8003058: 08003091 .word 0x08003091 - 800305c: 08003091 .word 0x08003091 - 8003060: 08003091 .word 0x08003091 - 8003064: 0800307f .word 0x0800307f - 8003068: 08003091 .word 0x08003091 - 800306c: 08003091 .word 0x08003091 - 8003070: 08003091 .word 0x08003091 - 8003074: 0800308b .word 0x0800308b - 8003078: 2300 movs r3, #0 - 800307a: 77fb strb r3, [r7, #31] - 800307c: e117 b.n 80032ae - 800307e: 2302 movs r3, #2 - 8003080: 77fb strb r3, [r7, #31] - 8003082: e114 b.n 80032ae - 8003084: 2304 movs r3, #4 - 8003086: 77fb strb r3, [r7, #31] - 8003088: e111 b.n 80032ae - 800308a: 2308 movs r3, #8 - 800308c: 77fb strb r3, [r7, #31] - 800308e: e10e b.n 80032ae - 8003090: 2310 movs r3, #16 - 8003092: 77fb strb r3, [r7, #31] - 8003094: bf00 nop - 8003096: e10a b.n 80032ae - 8003098: 687b ldr r3, [r7, #4] - 800309a: 681b ldr r3, [r3, #0] - 800309c: 4a71 ldr r2, [pc, #452] ; (8003264 ) - 800309e: 4293 cmp r3, r2 - 80030a0: d120 bne.n 80030e4 - 80030a2: 4b6e ldr r3, [pc, #440] ; (800325c ) - 80030a4: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 80030a8: f003 0330 and.w r3, r3, #48 ; 0x30 - 80030ac: 2b10 cmp r3, #16 - 80030ae: d00f beq.n 80030d0 - 80030b0: 2b10 cmp r3, #16 - 80030b2: d802 bhi.n 80030ba - 80030b4: 2b00 cmp r3, #0 - 80030b6: d005 beq.n 80030c4 - 80030b8: e010 b.n 80030dc - 80030ba: 2b20 cmp r3, #32 - 80030bc: d005 beq.n 80030ca - 80030be: 2b30 cmp r3, #48 ; 0x30 - 80030c0: d009 beq.n 80030d6 - 80030c2: e00b b.n 80030dc - 80030c4: 2300 movs r3, #0 - 80030c6: 77fb strb r3, [r7, #31] - 80030c8: e0f1 b.n 80032ae - 80030ca: 2302 movs r3, #2 - 80030cc: 77fb strb r3, [r7, #31] - 80030ce: e0ee b.n 80032ae - 80030d0: 2304 movs r3, #4 + 800302e: 687b ldr r3, [r7, #4] + 8003030: 681b ldr r3, [r3, #0] + 8003032: 4a9f ldr r2, [pc, #636] ; (80032b0 ) + 8003034: 4293 cmp r3, r2 + 8003036: d121 bne.n 800307c + 8003038: 4b9e ldr r3, [pc, #632] ; (80032b4 ) + 800303a: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 800303e: f003 0303 and.w r3, r3, #3 + 8003042: 2b03 cmp r3, #3 + 8003044: d816 bhi.n 8003074 + 8003046: a201 add r2, pc, #4 ; (adr r2, 800304c ) + 8003048: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 800304c: 0800305d .word 0x0800305d + 8003050: 08003069 .word 0x08003069 + 8003054: 08003063 .word 0x08003063 + 8003058: 0800306f .word 0x0800306f + 800305c: 2301 movs r3, #1 + 800305e: 77fb strb r3, [r7, #31] + 8003060: e151 b.n 8003306 + 8003062: 2302 movs r3, #2 + 8003064: 77fb strb r3, [r7, #31] + 8003066: e14e b.n 8003306 + 8003068: 2304 movs r3, #4 + 800306a: 77fb strb r3, [r7, #31] + 800306c: e14b b.n 8003306 + 800306e: 2308 movs r3, #8 + 8003070: 77fb strb r3, [r7, #31] + 8003072: e148 b.n 8003306 + 8003074: 2310 movs r3, #16 + 8003076: 77fb strb r3, [r7, #31] + 8003078: bf00 nop + 800307a: e144 b.n 8003306 + 800307c: 687b ldr r3, [r7, #4] + 800307e: 681b ldr r3, [r3, #0] + 8003080: 4a8d ldr r2, [pc, #564] ; (80032b8 ) + 8003082: 4293 cmp r3, r2 + 8003084: d134 bne.n 80030f0 + 8003086: 4b8b ldr r3, [pc, #556] ; (80032b4 ) + 8003088: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 800308c: f003 030c and.w r3, r3, #12 + 8003090: 2b0c cmp r3, #12 + 8003092: d829 bhi.n 80030e8 + 8003094: a201 add r2, pc, #4 ; (adr r2, 800309c ) + 8003096: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 800309a: bf00 nop + 800309c: 080030d1 .word 0x080030d1 + 80030a0: 080030e9 .word 0x080030e9 + 80030a4: 080030e9 .word 0x080030e9 + 80030a8: 080030e9 .word 0x080030e9 + 80030ac: 080030dd .word 0x080030dd + 80030b0: 080030e9 .word 0x080030e9 + 80030b4: 080030e9 .word 0x080030e9 + 80030b8: 080030e9 .word 0x080030e9 + 80030bc: 080030d7 .word 0x080030d7 + 80030c0: 080030e9 .word 0x080030e9 + 80030c4: 080030e9 .word 0x080030e9 + 80030c8: 080030e9 .word 0x080030e9 + 80030cc: 080030e3 .word 0x080030e3 + 80030d0: 2300 movs r3, #0 80030d2: 77fb strb r3, [r7, #31] - 80030d4: e0eb b.n 80032ae - 80030d6: 2308 movs r3, #8 + 80030d4: e117 b.n 8003306 + 80030d6: 2302 movs r3, #2 80030d8: 77fb strb r3, [r7, #31] - 80030da: e0e8 b.n 80032ae - 80030dc: 2310 movs r3, #16 + 80030da: e114 b.n 8003306 + 80030dc: 2304 movs r3, #4 80030de: 77fb strb r3, [r7, #31] - 80030e0: bf00 nop - 80030e2: e0e4 b.n 80032ae - 80030e4: 687b ldr r3, [r7, #4] - 80030e6: 681b ldr r3, [r3, #0] - 80030e8: 4a5f ldr r2, [pc, #380] ; (8003268 ) - 80030ea: 4293 cmp r3, r2 - 80030ec: d120 bne.n 8003130 - 80030ee: 4b5b ldr r3, [pc, #364] ; (800325c ) - 80030f0: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 80030f4: f003 03c0 and.w r3, r3, #192 ; 0xc0 - 80030f8: 2b40 cmp r3, #64 ; 0x40 - 80030fa: d00f beq.n 800311c - 80030fc: 2b40 cmp r3, #64 ; 0x40 - 80030fe: d802 bhi.n 8003106 - 8003100: 2b00 cmp r3, #0 - 8003102: d005 beq.n 8003110 - 8003104: e010 b.n 8003128 - 8003106: 2b80 cmp r3, #128 ; 0x80 - 8003108: d005 beq.n 8003116 - 800310a: 2bc0 cmp r3, #192 ; 0xc0 - 800310c: d009 beq.n 8003122 - 800310e: e00b b.n 8003128 - 8003110: 2300 movs r3, #0 - 8003112: 77fb strb r3, [r7, #31] - 8003114: e0cb b.n 80032ae - 8003116: 2302 movs r3, #2 - 8003118: 77fb strb r3, [r7, #31] - 800311a: e0c8 b.n 80032ae - 800311c: 2304 movs r3, #4 + 80030e0: e111 b.n 8003306 + 80030e2: 2308 movs r3, #8 + 80030e4: 77fb strb r3, [r7, #31] + 80030e6: e10e b.n 8003306 + 80030e8: 2310 movs r3, #16 + 80030ea: 77fb strb r3, [r7, #31] + 80030ec: bf00 nop + 80030ee: e10a b.n 8003306 + 80030f0: 687b ldr r3, [r7, #4] + 80030f2: 681b ldr r3, [r3, #0] + 80030f4: 4a71 ldr r2, [pc, #452] ; (80032bc ) + 80030f6: 4293 cmp r3, r2 + 80030f8: d120 bne.n 800313c + 80030fa: 4b6e ldr r3, [pc, #440] ; (80032b4 ) + 80030fc: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 8003100: f003 0330 and.w r3, r3, #48 ; 0x30 + 8003104: 2b10 cmp r3, #16 + 8003106: d00f beq.n 8003128 + 8003108: 2b10 cmp r3, #16 + 800310a: d802 bhi.n 8003112 + 800310c: 2b00 cmp r3, #0 + 800310e: d005 beq.n 800311c + 8003110: e010 b.n 8003134 + 8003112: 2b20 cmp r3, #32 + 8003114: d005 beq.n 8003122 + 8003116: 2b30 cmp r3, #48 ; 0x30 + 8003118: d009 beq.n 800312e + 800311a: e00b b.n 8003134 + 800311c: 2300 movs r3, #0 800311e: 77fb strb r3, [r7, #31] - 8003120: e0c5 b.n 80032ae - 8003122: 2308 movs r3, #8 + 8003120: e0f1 b.n 8003306 + 8003122: 2302 movs r3, #2 8003124: 77fb strb r3, [r7, #31] - 8003126: e0c2 b.n 80032ae - 8003128: 2310 movs r3, #16 + 8003126: e0ee b.n 8003306 + 8003128: 2304 movs r3, #4 800312a: 77fb strb r3, [r7, #31] - 800312c: bf00 nop - 800312e: e0be b.n 80032ae - 8003130: 687b ldr r3, [r7, #4] - 8003132: 681b ldr r3, [r3, #0] - 8003134: 4a4d ldr r2, [pc, #308] ; (800326c ) - 8003136: 4293 cmp r3, r2 - 8003138: d124 bne.n 8003184 - 800313a: 4b48 ldr r3, [pc, #288] ; (800325c ) - 800313c: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 8003140: f403 7340 and.w r3, r3, #768 ; 0x300 - 8003144: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 8003148: d012 beq.n 8003170 - 800314a: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 800314e: d802 bhi.n 8003156 - 8003150: 2b00 cmp r3, #0 - 8003152: d007 beq.n 8003164 - 8003154: e012 b.n 800317c - 8003156: f5b3 7f00 cmp.w r3, #512 ; 0x200 - 800315a: d006 beq.n 800316a - 800315c: f5b3 7f40 cmp.w r3, #768 ; 0x300 - 8003160: d009 beq.n 8003176 - 8003162: e00b b.n 800317c - 8003164: 2300 movs r3, #0 - 8003166: 77fb strb r3, [r7, #31] - 8003168: e0a1 b.n 80032ae - 800316a: 2302 movs r3, #2 - 800316c: 77fb strb r3, [r7, #31] - 800316e: e09e b.n 80032ae - 8003170: 2304 movs r3, #4 - 8003172: 77fb strb r3, [r7, #31] - 8003174: e09b b.n 80032ae - 8003176: 2308 movs r3, #8 - 8003178: 77fb strb r3, [r7, #31] - 800317a: e098 b.n 80032ae - 800317c: 2310 movs r3, #16 - 800317e: 77fb strb r3, [r7, #31] - 8003180: bf00 nop - 8003182: e094 b.n 80032ae - 8003184: 687b ldr r3, [r7, #4] - 8003186: 681b ldr r3, [r3, #0] - 8003188: 4a39 ldr r2, [pc, #228] ; (8003270 ) - 800318a: 4293 cmp r3, r2 - 800318c: d124 bne.n 80031d8 - 800318e: 4b33 ldr r3, [pc, #204] ; (800325c ) - 8003190: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 8003194: f403 6340 and.w r3, r3, #3072 ; 0xc00 - 8003198: f5b3 6f80 cmp.w r3, #1024 ; 0x400 - 800319c: d012 beq.n 80031c4 - 800319e: f5b3 6f80 cmp.w r3, #1024 ; 0x400 - 80031a2: d802 bhi.n 80031aa - 80031a4: 2b00 cmp r3, #0 - 80031a6: d007 beq.n 80031b8 - 80031a8: e012 b.n 80031d0 - 80031aa: f5b3 6f00 cmp.w r3, #2048 ; 0x800 - 80031ae: d006 beq.n 80031be - 80031b0: f5b3 6f40 cmp.w r3, #3072 ; 0xc00 - 80031b4: d009 beq.n 80031ca - 80031b6: e00b b.n 80031d0 - 80031b8: 2301 movs r3, #1 - 80031ba: 77fb strb r3, [r7, #31] - 80031bc: e077 b.n 80032ae - 80031be: 2302 movs r3, #2 - 80031c0: 77fb strb r3, [r7, #31] - 80031c2: e074 b.n 80032ae - 80031c4: 2304 movs r3, #4 - 80031c6: 77fb strb r3, [r7, #31] - 80031c8: e071 b.n 80032ae - 80031ca: 2308 movs r3, #8 - 80031cc: 77fb strb r3, [r7, #31] - 80031ce: e06e b.n 80032ae - 80031d0: 2310 movs r3, #16 - 80031d2: 77fb strb r3, [r7, #31] - 80031d4: bf00 nop - 80031d6: e06a b.n 80032ae - 80031d8: 687b ldr r3, [r7, #4] - 80031da: 681b ldr r3, [r3, #0] - 80031dc: 4a25 ldr r2, [pc, #148] ; (8003274 ) - 80031de: 4293 cmp r3, r2 - 80031e0: d124 bne.n 800322c - 80031e2: 4b1e ldr r3, [pc, #120] ; (800325c ) - 80031e4: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 80031e8: f403 5340 and.w r3, r3, #12288 ; 0x3000 - 80031ec: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 80031f0: d012 beq.n 8003218 - 80031f2: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 80031f6: d802 bhi.n 80031fe - 80031f8: 2b00 cmp r3, #0 - 80031fa: d007 beq.n 800320c - 80031fc: e012 b.n 8003224 - 80031fe: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 - 8003202: d006 beq.n 8003212 - 8003204: f5b3 5f40 cmp.w r3, #12288 ; 0x3000 - 8003208: d009 beq.n 800321e - 800320a: e00b b.n 8003224 - 800320c: 2300 movs r3, #0 - 800320e: 77fb strb r3, [r7, #31] - 8003210: e04d b.n 80032ae - 8003212: 2302 movs r3, #2 - 8003214: 77fb strb r3, [r7, #31] - 8003216: e04a b.n 80032ae - 8003218: 2304 movs r3, #4 - 800321a: 77fb strb r3, [r7, #31] - 800321c: e047 b.n 80032ae - 800321e: 2308 movs r3, #8 - 8003220: 77fb strb r3, [r7, #31] - 8003222: e044 b.n 80032ae - 8003224: 2310 movs r3, #16 - 8003226: 77fb strb r3, [r7, #31] - 8003228: bf00 nop - 800322a: e040 b.n 80032ae - 800322c: 687b ldr r3, [r7, #4] - 800322e: 681b ldr r3, [r3, #0] - 8003230: 4a11 ldr r2, [pc, #68] ; (8003278 ) - 8003232: 4293 cmp r3, r2 - 8003234: d139 bne.n 80032aa - 8003236: 4b09 ldr r3, [pc, #36] ; (800325c ) - 8003238: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 800323c: f403 4340 and.w r3, r3, #49152 ; 0xc000 - 8003240: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 - 8003244: d027 beq.n 8003296 - 8003246: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 - 800324a: d817 bhi.n 800327c - 800324c: 2b00 cmp r3, #0 - 800324e: d01c beq.n 800328a - 8003250: e027 b.n 80032a2 - 8003252: bf00 nop - 8003254: efff69f3 .word 0xefff69f3 - 8003258: 40011000 .word 0x40011000 - 800325c: 40023800 .word 0x40023800 - 8003260: 40004400 .word 0x40004400 - 8003264: 40004800 .word 0x40004800 - 8003268: 40004c00 .word 0x40004c00 - 800326c: 40005000 .word 0x40005000 - 8003270: 40011400 .word 0x40011400 - 8003274: 40007800 .word 0x40007800 - 8003278: 40007c00 .word 0x40007c00 - 800327c: f5b3 4f00 cmp.w r3, #32768 ; 0x8000 - 8003280: d006 beq.n 8003290 - 8003282: f5b3 4f40 cmp.w r3, #49152 ; 0xc000 - 8003286: d009 beq.n 800329c - 8003288: e00b b.n 80032a2 - 800328a: 2300 movs r3, #0 - 800328c: 77fb strb r3, [r7, #31] - 800328e: e00e b.n 80032ae - 8003290: 2302 movs r3, #2 - 8003292: 77fb strb r3, [r7, #31] - 8003294: e00b b.n 80032ae - 8003296: 2304 movs r3, #4 - 8003298: 77fb strb r3, [r7, #31] - 800329a: e008 b.n 80032ae - 800329c: 2308 movs r3, #8 - 800329e: 77fb strb r3, [r7, #31] - 80032a0: e005 b.n 80032ae - 80032a2: 2310 movs r3, #16 - 80032a4: 77fb strb r3, [r7, #31] - 80032a6: bf00 nop - 80032a8: e001 b.n 80032ae - 80032aa: 2310 movs r3, #16 - 80032ac: 77fb strb r3, [r7, #31] + 800312c: e0eb b.n 8003306 + 800312e: 2308 movs r3, #8 + 8003130: 77fb strb r3, [r7, #31] + 8003132: e0e8 b.n 8003306 + 8003134: 2310 movs r3, #16 + 8003136: 77fb strb r3, [r7, #31] + 8003138: bf00 nop + 800313a: e0e4 b.n 8003306 + 800313c: 687b ldr r3, [r7, #4] + 800313e: 681b ldr r3, [r3, #0] + 8003140: 4a5f ldr r2, [pc, #380] ; (80032c0 ) + 8003142: 4293 cmp r3, r2 + 8003144: d120 bne.n 8003188 + 8003146: 4b5b ldr r3, [pc, #364] ; (80032b4 ) + 8003148: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 800314c: f003 03c0 and.w r3, r3, #192 ; 0xc0 + 8003150: 2b40 cmp r3, #64 ; 0x40 + 8003152: d00f beq.n 8003174 + 8003154: 2b40 cmp r3, #64 ; 0x40 + 8003156: d802 bhi.n 800315e + 8003158: 2b00 cmp r3, #0 + 800315a: d005 beq.n 8003168 + 800315c: e010 b.n 8003180 + 800315e: 2b80 cmp r3, #128 ; 0x80 + 8003160: d005 beq.n 800316e + 8003162: 2bc0 cmp r3, #192 ; 0xc0 + 8003164: d009 beq.n 800317a + 8003166: e00b b.n 8003180 + 8003168: 2300 movs r3, #0 + 800316a: 77fb strb r3, [r7, #31] + 800316c: e0cb b.n 8003306 + 800316e: 2302 movs r3, #2 + 8003170: 77fb strb r3, [r7, #31] + 8003172: e0c8 b.n 8003306 + 8003174: 2304 movs r3, #4 + 8003176: 77fb strb r3, [r7, #31] + 8003178: e0c5 b.n 8003306 + 800317a: 2308 movs r3, #8 + 800317c: 77fb strb r3, [r7, #31] + 800317e: e0c2 b.n 8003306 + 8003180: 2310 movs r3, #16 + 8003182: 77fb strb r3, [r7, #31] + 8003184: bf00 nop + 8003186: e0be b.n 8003306 + 8003188: 687b ldr r3, [r7, #4] + 800318a: 681b ldr r3, [r3, #0] + 800318c: 4a4d ldr r2, [pc, #308] ; (80032c4 ) + 800318e: 4293 cmp r3, r2 + 8003190: d124 bne.n 80031dc + 8003192: 4b48 ldr r3, [pc, #288] ; (80032b4 ) + 8003194: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 8003198: f403 7340 and.w r3, r3, #768 ; 0x300 + 800319c: f5b3 7f80 cmp.w r3, #256 ; 0x100 + 80031a0: d012 beq.n 80031c8 + 80031a2: f5b3 7f80 cmp.w r3, #256 ; 0x100 + 80031a6: d802 bhi.n 80031ae + 80031a8: 2b00 cmp r3, #0 + 80031aa: d007 beq.n 80031bc + 80031ac: e012 b.n 80031d4 + 80031ae: f5b3 7f00 cmp.w r3, #512 ; 0x200 + 80031b2: d006 beq.n 80031c2 + 80031b4: f5b3 7f40 cmp.w r3, #768 ; 0x300 + 80031b8: d009 beq.n 80031ce + 80031ba: e00b b.n 80031d4 + 80031bc: 2300 movs r3, #0 + 80031be: 77fb strb r3, [r7, #31] + 80031c0: e0a1 b.n 8003306 + 80031c2: 2302 movs r3, #2 + 80031c4: 77fb strb r3, [r7, #31] + 80031c6: e09e b.n 8003306 + 80031c8: 2304 movs r3, #4 + 80031ca: 77fb strb r3, [r7, #31] + 80031cc: e09b b.n 8003306 + 80031ce: 2308 movs r3, #8 + 80031d0: 77fb strb r3, [r7, #31] + 80031d2: e098 b.n 8003306 + 80031d4: 2310 movs r3, #16 + 80031d6: 77fb strb r3, [r7, #31] + 80031d8: bf00 nop + 80031da: e094 b.n 8003306 + 80031dc: 687b ldr r3, [r7, #4] + 80031de: 681b ldr r3, [r3, #0] + 80031e0: 4a39 ldr r2, [pc, #228] ; (80032c8 ) + 80031e2: 4293 cmp r3, r2 + 80031e4: d124 bne.n 8003230 + 80031e6: 4b33 ldr r3, [pc, #204] ; (80032b4 ) + 80031e8: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 80031ec: f403 6340 and.w r3, r3, #3072 ; 0xc00 + 80031f0: f5b3 6f80 cmp.w r3, #1024 ; 0x400 + 80031f4: d012 beq.n 800321c + 80031f6: f5b3 6f80 cmp.w r3, #1024 ; 0x400 + 80031fa: d802 bhi.n 8003202 + 80031fc: 2b00 cmp r3, #0 + 80031fe: d007 beq.n 8003210 + 8003200: e012 b.n 8003228 + 8003202: f5b3 6f00 cmp.w r3, #2048 ; 0x800 + 8003206: d006 beq.n 8003216 + 8003208: f5b3 6f40 cmp.w r3, #3072 ; 0xc00 + 800320c: d009 beq.n 8003222 + 800320e: e00b b.n 8003228 + 8003210: 2301 movs r3, #1 + 8003212: 77fb strb r3, [r7, #31] + 8003214: e077 b.n 8003306 + 8003216: 2302 movs r3, #2 + 8003218: 77fb strb r3, [r7, #31] + 800321a: e074 b.n 8003306 + 800321c: 2304 movs r3, #4 + 800321e: 77fb strb r3, [r7, #31] + 8003220: e071 b.n 8003306 + 8003222: 2308 movs r3, #8 + 8003224: 77fb strb r3, [r7, #31] + 8003226: e06e b.n 8003306 + 8003228: 2310 movs r3, #16 + 800322a: 77fb strb r3, [r7, #31] + 800322c: bf00 nop + 800322e: e06a b.n 8003306 + 8003230: 687b ldr r3, [r7, #4] + 8003232: 681b ldr r3, [r3, #0] + 8003234: 4a25 ldr r2, [pc, #148] ; (80032cc ) + 8003236: 4293 cmp r3, r2 + 8003238: d124 bne.n 8003284 + 800323a: 4b1e ldr r3, [pc, #120] ; (80032b4 ) + 800323c: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 8003240: f403 5340 and.w r3, r3, #12288 ; 0x3000 + 8003244: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 + 8003248: d012 beq.n 8003270 + 800324a: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 + 800324e: d802 bhi.n 8003256 + 8003250: 2b00 cmp r3, #0 + 8003252: d007 beq.n 8003264 + 8003254: e012 b.n 800327c + 8003256: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 + 800325a: d006 beq.n 800326a + 800325c: f5b3 5f40 cmp.w r3, #12288 ; 0x3000 + 8003260: d009 beq.n 8003276 + 8003262: e00b b.n 800327c + 8003264: 2300 movs r3, #0 + 8003266: 77fb strb r3, [r7, #31] + 8003268: e04d b.n 8003306 + 800326a: 2302 movs r3, #2 + 800326c: 77fb strb r3, [r7, #31] + 800326e: e04a b.n 8003306 + 8003270: 2304 movs r3, #4 + 8003272: 77fb strb r3, [r7, #31] + 8003274: e047 b.n 8003306 + 8003276: 2308 movs r3, #8 + 8003278: 77fb strb r3, [r7, #31] + 800327a: e044 b.n 8003306 + 800327c: 2310 movs r3, #16 + 800327e: 77fb strb r3, [r7, #31] + 8003280: bf00 nop + 8003282: e040 b.n 8003306 + 8003284: 687b ldr r3, [r7, #4] + 8003286: 681b ldr r3, [r3, #0] + 8003288: 4a11 ldr r2, [pc, #68] ; (80032d0 ) + 800328a: 4293 cmp r3, r2 + 800328c: d139 bne.n 8003302 + 800328e: 4b09 ldr r3, [pc, #36] ; (80032b4 ) + 8003290: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 8003294: f403 4340 and.w r3, r3, #49152 ; 0xc000 + 8003298: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 + 800329c: d027 beq.n 80032ee + 800329e: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 + 80032a2: d817 bhi.n 80032d4 + 80032a4: 2b00 cmp r3, #0 + 80032a6: d01c beq.n 80032e2 + 80032a8: e027 b.n 80032fa + 80032aa: bf00 nop + 80032ac: efff69f3 .word 0xefff69f3 + 80032b0: 40011000 .word 0x40011000 + 80032b4: 40023800 .word 0x40023800 + 80032b8: 40004400 .word 0x40004400 + 80032bc: 40004800 .word 0x40004800 + 80032c0: 40004c00 .word 0x40004c00 + 80032c4: 40005000 .word 0x40005000 + 80032c8: 40011400 .word 0x40011400 + 80032cc: 40007800 .word 0x40007800 + 80032d0: 40007c00 .word 0x40007c00 + 80032d4: f5b3 4f00 cmp.w r3, #32768 ; 0x8000 + 80032d8: d006 beq.n 80032e8 + 80032da: f5b3 4f40 cmp.w r3, #49152 ; 0xc000 + 80032de: d009 beq.n 80032f4 + 80032e0: e00b b.n 80032fa + 80032e2: 2300 movs r3, #0 + 80032e4: 77fb strb r3, [r7, #31] + 80032e6: e00e b.n 8003306 + 80032e8: 2302 movs r3, #2 + 80032ea: 77fb strb r3, [r7, #31] + 80032ec: e00b b.n 8003306 + 80032ee: 2304 movs r3, #4 + 80032f0: 77fb strb r3, [r7, #31] + 80032f2: e008 b.n 8003306 + 80032f4: 2308 movs r3, #8 + 80032f6: 77fb strb r3, [r7, #31] + 80032f8: e005 b.n 8003306 + 80032fa: 2310 movs r3, #16 + 80032fc: 77fb strb r3, [r7, #31] + 80032fe: bf00 nop + 8003300: e001 b.n 8003306 + 8003302: 2310 movs r3, #16 + 8003304: 77fb strb r3, [r7, #31] if (huart->Init.OverSampling == UART_OVERSAMPLING_8) - 80032ae: 687b ldr r3, [r7, #4] - 80032b0: 69db ldr r3, [r3, #28] - 80032b2: f5b3 4f00 cmp.w r3, #32768 ; 0x8000 - 80032b6: d17c bne.n 80033b2 + 8003306: 687b ldr r3, [r7, #4] + 8003308: 69db ldr r3, [r3, #28] + 800330a: f5b3 4f00 cmp.w r3, #32768 ; 0x8000 + 800330e: d17c bne.n 800340a { switch (clocksource) - 80032b8: 7ffb ldrb r3, [r7, #31] - 80032ba: 2b08 cmp r3, #8 - 80032bc: d859 bhi.n 8003372 - 80032be: a201 add r2, pc, #4 ; (adr r2, 80032c4 ) - 80032c0: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 80032c4: 080032e9 .word 0x080032e9 - 80032c8: 08003307 .word 0x08003307 - 80032cc: 08003325 .word 0x08003325 - 80032d0: 08003373 .word 0x08003373 - 80032d4: 0800333d .word 0x0800333d - 80032d8: 08003373 .word 0x08003373 - 80032dc: 08003373 .word 0x08003373 - 80032e0: 08003373 .word 0x08003373 - 80032e4: 0800335b .word 0x0800335b + 8003310: 7ffb ldrb r3, [r7, #31] + 8003312: 2b08 cmp r3, #8 + 8003314: d859 bhi.n 80033ca + 8003316: a201 add r2, pc, #4 ; (adr r2, 800331c ) + 8003318: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 800331c: 08003341 .word 0x08003341 + 8003320: 0800335f .word 0x0800335f + 8003324: 0800337d .word 0x0800337d + 8003328: 080033cb .word 0x080033cb + 800332c: 08003395 .word 0x08003395 + 8003330: 080033cb .word 0x080033cb + 8003334: 080033cb .word 0x080033cb + 8003338: 080033cb .word 0x080033cb + 800333c: 080033b3 .word 0x080033b3 { case UART_CLOCKSOURCE_PCLK1: usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate)); - 80032e8: f7fe fb64 bl 80019b4 - 80032ec: 4603 mov r3, r0 - 80032ee: 005a lsls r2, r3, #1 - 80032f0: 687b ldr r3, [r7, #4] - 80032f2: 685b ldr r3, [r3, #4] - 80032f4: 085b lsrs r3, r3, #1 - 80032f6: 441a add r2, r3 - 80032f8: 687b ldr r3, [r7, #4] - 80032fa: 685b ldr r3, [r3, #4] - 80032fc: fbb2 f3f3 udiv r3, r2, r3 - 8003300: b29b uxth r3, r3 - 8003302: 61bb str r3, [r7, #24] + 8003340: f7fe fb38 bl 80019b4 + 8003344: 4603 mov r3, r0 + 8003346: 005a lsls r2, r3, #1 + 8003348: 687b ldr r3, [r7, #4] + 800334a: 685b ldr r3, [r3, #4] + 800334c: 085b lsrs r3, r3, #1 + 800334e: 441a add r2, r3 + 8003350: 687b ldr r3, [r7, #4] + 8003352: 685b ldr r3, [r3, #4] + 8003354: fbb2 f3f3 udiv r3, r2, r3 + 8003358: b29b uxth r3, r3 + 800335a: 61bb str r3, [r7, #24] break; - 8003304: e038 b.n 8003378 + 800335c: e038 b.n 80033d0 case UART_CLOCKSOURCE_PCLK2: usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate)); - 8003306: f7fe fb69 bl 80019dc - 800330a: 4603 mov r3, r0 - 800330c: 005a lsls r2, r3, #1 - 800330e: 687b ldr r3, [r7, #4] - 8003310: 685b ldr r3, [r3, #4] - 8003312: 085b lsrs r3, r3, #1 - 8003314: 441a add r2, r3 - 8003316: 687b ldr r3, [r7, #4] - 8003318: 685b ldr r3, [r3, #4] - 800331a: fbb2 f3f3 udiv r3, r2, r3 - 800331e: b29b uxth r3, r3 - 8003320: 61bb str r3, [r7, #24] + 800335e: f7fe fb3d bl 80019dc + 8003362: 4603 mov r3, r0 + 8003364: 005a lsls r2, r3, #1 + 8003366: 687b ldr r3, [r7, #4] + 8003368: 685b ldr r3, [r3, #4] + 800336a: 085b lsrs r3, r3, #1 + 800336c: 441a add r2, r3 + 800336e: 687b ldr r3, [r7, #4] + 8003370: 685b ldr r3, [r3, #4] + 8003372: fbb2 f3f3 udiv r3, r2, r3 + 8003376: b29b uxth r3, r3 + 8003378: 61bb str r3, [r7, #24] break; - 8003322: e029 b.n 8003378 + 800337a: e029 b.n 80033d0 case UART_CLOCKSOURCE_HSI: usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HSI_VALUE, huart->Init.BaudRate)); - 8003324: 687b ldr r3, [r7, #4] - 8003326: 685b ldr r3, [r3, #4] - 8003328: 085a lsrs r2, r3, #1 - 800332a: 4b5d ldr r3, [pc, #372] ; (80034a0 ) - 800332c: 4413 add r3, r2 - 800332e: 687a ldr r2, [r7, #4] - 8003330: 6852 ldr r2, [r2, #4] - 8003332: fbb3 f3f2 udiv r3, r3, r2 - 8003336: b29b uxth r3, r3 - 8003338: 61bb str r3, [r7, #24] + 800337c: 687b ldr r3, [r7, #4] + 800337e: 685b ldr r3, [r3, #4] + 8003380: 085a lsrs r2, r3, #1 + 8003382: 4b5d ldr r3, [pc, #372] ; (80034f8 ) + 8003384: 4413 add r3, r2 + 8003386: 687a ldr r2, [r7, #4] + 8003388: 6852 ldr r2, [r2, #4] + 800338a: fbb3 f3f2 udiv r3, r3, r2 + 800338e: b29b uxth r3, r3 + 8003390: 61bb str r3, [r7, #24] break; - 800333a: e01d b.n 8003378 + 8003392: e01d b.n 80033d0 case UART_CLOCKSOURCE_SYSCLK: usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HAL_RCC_GetSysClockFreq(), huart->Init.BaudRate)); - 800333c: f7fe fa7c bl 8001838 - 8003340: 4603 mov r3, r0 - 8003342: 005a lsls r2, r3, #1 - 8003344: 687b ldr r3, [r7, #4] - 8003346: 685b ldr r3, [r3, #4] - 8003348: 085b lsrs r3, r3, #1 - 800334a: 441a add r2, r3 - 800334c: 687b ldr r3, [r7, #4] - 800334e: 685b ldr r3, [r3, #4] - 8003350: fbb2 f3f3 udiv r3, r2, r3 - 8003354: b29b uxth r3, r3 - 8003356: 61bb str r3, [r7, #24] + 8003394: f7fe fa50 bl 8001838 + 8003398: 4603 mov r3, r0 + 800339a: 005a lsls r2, r3, #1 + 800339c: 687b ldr r3, [r7, #4] + 800339e: 685b ldr r3, [r3, #4] + 80033a0: 085b lsrs r3, r3, #1 + 80033a2: 441a add r2, r3 + 80033a4: 687b ldr r3, [r7, #4] + 80033a6: 685b ldr r3, [r3, #4] + 80033a8: fbb2 f3f3 udiv r3, r2, r3 + 80033ac: b29b uxth r3, r3 + 80033ae: 61bb str r3, [r7, #24] break; - 8003358: e00e b.n 8003378 + 80033b0: e00e b.n 80033d0 case UART_CLOCKSOURCE_LSE: usartdiv = (uint16_t)(UART_DIV_SAMPLING8(LSE_VALUE, huart->Init.BaudRate)); - 800335a: 687b ldr r3, [r7, #4] - 800335c: 685b ldr r3, [r3, #4] - 800335e: 085b lsrs r3, r3, #1 - 8003360: f503 3280 add.w r2, r3, #65536 ; 0x10000 - 8003364: 687b ldr r3, [r7, #4] - 8003366: 685b ldr r3, [r3, #4] - 8003368: fbb2 f3f3 udiv r3, r2, r3 - 800336c: b29b uxth r3, r3 - 800336e: 61bb str r3, [r7, #24] + 80033b2: 687b ldr r3, [r7, #4] + 80033b4: 685b ldr r3, [r3, #4] + 80033b6: 085b lsrs r3, r3, #1 + 80033b8: f503 3280 add.w r2, r3, #65536 ; 0x10000 + 80033bc: 687b ldr r3, [r7, #4] + 80033be: 685b ldr r3, [r3, #4] + 80033c0: fbb2 f3f3 udiv r3, r2, r3 + 80033c4: b29b uxth r3, r3 + 80033c6: 61bb str r3, [r7, #24] break; - 8003370: e002 b.n 8003378 + 80033c8: e002 b.n 80033d0 case UART_CLOCKSOURCE_UNDEFINED: default: ret = HAL_ERROR; - 8003372: 2301 movs r3, #1 - 8003374: 75fb strb r3, [r7, #23] + 80033ca: 2301 movs r3, #1 + 80033cc: 75fb strb r3, [r7, #23] break; - 8003376: bf00 nop + 80033ce: bf00 nop } /* USARTDIV must be greater than or equal to 0d16 */ if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX)) - 8003378: 69bb ldr r3, [r7, #24] - 800337a: 2b0f cmp r3, #15 - 800337c: d916 bls.n 80033ac - 800337e: 69bb ldr r3, [r7, #24] - 8003380: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 8003384: d212 bcs.n 80033ac + 80033d0: 69bb ldr r3, [r7, #24] + 80033d2: 2b0f cmp r3, #15 + 80033d4: d916 bls.n 8003404 + 80033d6: 69bb ldr r3, [r7, #24] + 80033d8: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 + 80033dc: d212 bcs.n 8003404 { brrtemp = (uint16_t)(usartdiv & 0xFFF0U); - 8003386: 69bb ldr r3, [r7, #24] - 8003388: b29b uxth r3, r3 - 800338a: f023 030f bic.w r3, r3, #15 - 800338e: 81fb strh r3, [r7, #14] + 80033de: 69bb ldr r3, [r7, #24] + 80033e0: b29b uxth r3, r3 + 80033e2: f023 030f bic.w r3, r3, #15 + 80033e6: 81fb strh r3, [r7, #14] brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U); - 8003390: 69bb ldr r3, [r7, #24] - 8003392: 085b lsrs r3, r3, #1 - 8003394: b29b uxth r3, r3 - 8003396: f003 0307 and.w r3, r3, #7 - 800339a: b29a uxth r2, r3 - 800339c: 89fb ldrh r3, [r7, #14] - 800339e: 4313 orrs r3, r2 - 80033a0: 81fb strh r3, [r7, #14] + 80033e8: 69bb ldr r3, [r7, #24] + 80033ea: 085b lsrs r3, r3, #1 + 80033ec: b29b uxth r3, r3 + 80033ee: f003 0307 and.w r3, r3, #7 + 80033f2: b29a uxth r2, r3 + 80033f4: 89fb ldrh r3, [r7, #14] + 80033f6: 4313 orrs r3, r2 + 80033f8: 81fb strh r3, [r7, #14] huart->Instance->BRR = brrtemp; - 80033a2: 687b ldr r3, [r7, #4] - 80033a4: 681b ldr r3, [r3, #0] - 80033a6: 89fa ldrh r2, [r7, #14] - 80033a8: 60da str r2, [r3, #12] - 80033aa: e06e b.n 800348a + 80033fa: 687b ldr r3, [r7, #4] + 80033fc: 681b ldr r3, [r3, #0] + 80033fe: 89fa ldrh r2, [r7, #14] + 8003400: 60da str r2, [r3, #12] + 8003402: e06e b.n 80034e2 } else { ret = HAL_ERROR; - 80033ac: 2301 movs r3, #1 - 80033ae: 75fb strb r3, [r7, #23] - 80033b0: e06b b.n 800348a + 8003404: 2301 movs r3, #1 + 8003406: 75fb strb r3, [r7, #23] + 8003408: e06b b.n 80034e2 } } else { switch (clocksource) - 80033b2: 7ffb ldrb r3, [r7, #31] - 80033b4: 2b08 cmp r3, #8 - 80033b6: d857 bhi.n 8003468 - 80033b8: a201 add r2, pc, #4 ; (adr r2, 80033c0 ) - 80033ba: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 80033be: bf00 nop - 80033c0: 080033e5 .word 0x080033e5 - 80033c4: 08003401 .word 0x08003401 - 80033c8: 0800341d .word 0x0800341d - 80033cc: 08003469 .word 0x08003469 - 80033d0: 08003435 .word 0x08003435 - 80033d4: 08003469 .word 0x08003469 - 80033d8: 08003469 .word 0x08003469 - 80033dc: 08003469 .word 0x08003469 - 80033e0: 08003451 .word 0x08003451 + 800340a: 7ffb ldrb r3, [r7, #31] + 800340c: 2b08 cmp r3, #8 + 800340e: d857 bhi.n 80034c0 + 8003410: a201 add r2, pc, #4 ; (adr r2, 8003418 ) + 8003412: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 8003416: bf00 nop + 8003418: 0800343d .word 0x0800343d + 800341c: 08003459 .word 0x08003459 + 8003420: 08003475 .word 0x08003475 + 8003424: 080034c1 .word 0x080034c1 + 8003428: 0800348d .word 0x0800348d + 800342c: 080034c1 .word 0x080034c1 + 8003430: 080034c1 .word 0x080034c1 + 8003434: 080034c1 .word 0x080034c1 + 8003438: 080034a9 .word 0x080034a9 { case UART_CLOCKSOURCE_PCLK1: usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate)); - 80033e4: f7fe fae6 bl 80019b4 - 80033e8: 4602 mov r2, r0 - 80033ea: 687b ldr r3, [r7, #4] - 80033ec: 685b ldr r3, [r3, #4] - 80033ee: 085b lsrs r3, r3, #1 - 80033f0: 441a add r2, r3 - 80033f2: 687b ldr r3, [r7, #4] - 80033f4: 685b ldr r3, [r3, #4] - 80033f6: fbb2 f3f3 udiv r3, r2, r3 - 80033fa: b29b uxth r3, r3 - 80033fc: 61bb str r3, [r7, #24] + 800343c: f7fe faba bl 80019b4 + 8003440: 4602 mov r2, r0 + 8003442: 687b ldr r3, [r7, #4] + 8003444: 685b ldr r3, [r3, #4] + 8003446: 085b lsrs r3, r3, #1 + 8003448: 441a add r2, r3 + 800344a: 687b ldr r3, [r7, #4] + 800344c: 685b ldr r3, [r3, #4] + 800344e: fbb2 f3f3 udiv r3, r2, r3 + 8003452: b29b uxth r3, r3 + 8003454: 61bb str r3, [r7, #24] break; - 80033fe: e036 b.n 800346e + 8003456: e036 b.n 80034c6 case UART_CLOCKSOURCE_PCLK2: usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate)); - 8003400: f7fe faec bl 80019dc - 8003404: 4602 mov r2, r0 - 8003406: 687b ldr r3, [r7, #4] - 8003408: 685b ldr r3, [r3, #4] - 800340a: 085b lsrs r3, r3, #1 - 800340c: 441a add r2, r3 - 800340e: 687b ldr r3, [r7, #4] - 8003410: 685b ldr r3, [r3, #4] - 8003412: fbb2 f3f3 udiv r3, r2, r3 - 8003416: b29b uxth r3, r3 - 8003418: 61bb str r3, [r7, #24] + 8003458: f7fe fac0 bl 80019dc + 800345c: 4602 mov r2, r0 + 800345e: 687b ldr r3, [r7, #4] + 8003460: 685b ldr r3, [r3, #4] + 8003462: 085b lsrs r3, r3, #1 + 8003464: 441a add r2, r3 + 8003466: 687b ldr r3, [r7, #4] + 8003468: 685b ldr r3, [r3, #4] + 800346a: fbb2 f3f3 udiv r3, r2, r3 + 800346e: b29b uxth r3, r3 + 8003470: 61bb str r3, [r7, #24] break; - 800341a: e028 b.n 800346e + 8003472: e028 b.n 80034c6 case UART_CLOCKSOURCE_HSI: usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HSI_VALUE, huart->Init.BaudRate)); - 800341c: 687b ldr r3, [r7, #4] - 800341e: 685b ldr r3, [r3, #4] - 8003420: 085a lsrs r2, r3, #1 - 8003422: 4b20 ldr r3, [pc, #128] ; (80034a4 ) - 8003424: 4413 add r3, r2 - 8003426: 687a ldr r2, [r7, #4] - 8003428: 6852 ldr r2, [r2, #4] - 800342a: fbb3 f3f2 udiv r3, r3, r2 - 800342e: b29b uxth r3, r3 - 8003430: 61bb str r3, [r7, #24] + 8003474: 687b ldr r3, [r7, #4] + 8003476: 685b ldr r3, [r3, #4] + 8003478: 085a lsrs r2, r3, #1 + 800347a: 4b20 ldr r3, [pc, #128] ; (80034fc ) + 800347c: 4413 add r3, r2 + 800347e: 687a ldr r2, [r7, #4] + 8003480: 6852 ldr r2, [r2, #4] + 8003482: fbb3 f3f2 udiv r3, r3, r2 + 8003486: b29b uxth r3, r3 + 8003488: 61bb str r3, [r7, #24] break; - 8003432: e01c b.n 800346e + 800348a: e01c b.n 80034c6 case UART_CLOCKSOURCE_SYSCLK: usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetSysClockFreq(), huart->Init.BaudRate)); - 8003434: f7fe fa00 bl 8001838 - 8003438: 4602 mov r2, r0 - 800343a: 687b ldr r3, [r7, #4] - 800343c: 685b ldr r3, [r3, #4] - 800343e: 085b lsrs r3, r3, #1 - 8003440: 441a add r2, r3 - 8003442: 687b ldr r3, [r7, #4] - 8003444: 685b ldr r3, [r3, #4] - 8003446: fbb2 f3f3 udiv r3, r2, r3 - 800344a: b29b uxth r3, r3 - 800344c: 61bb str r3, [r7, #24] + 800348c: f7fe f9d4 bl 8001838 + 8003490: 4602 mov r2, r0 + 8003492: 687b ldr r3, [r7, #4] + 8003494: 685b ldr r3, [r3, #4] + 8003496: 085b lsrs r3, r3, #1 + 8003498: 441a add r2, r3 + 800349a: 687b ldr r3, [r7, #4] + 800349c: 685b ldr r3, [r3, #4] + 800349e: fbb2 f3f3 udiv r3, r2, r3 + 80034a2: b29b uxth r3, r3 + 80034a4: 61bb str r3, [r7, #24] break; - 800344e: e00e b.n 800346e + 80034a6: e00e b.n 80034c6 case UART_CLOCKSOURCE_LSE: usartdiv = (uint16_t)(UART_DIV_SAMPLING16(LSE_VALUE, huart->Init.BaudRate)); - 8003450: 687b ldr r3, [r7, #4] - 8003452: 685b ldr r3, [r3, #4] - 8003454: 085b lsrs r3, r3, #1 - 8003456: f503 4200 add.w r2, r3, #32768 ; 0x8000 - 800345a: 687b ldr r3, [r7, #4] - 800345c: 685b ldr r3, [r3, #4] - 800345e: fbb2 f3f3 udiv r3, r2, r3 - 8003462: b29b uxth r3, r3 - 8003464: 61bb str r3, [r7, #24] + 80034a8: 687b ldr r3, [r7, #4] + 80034aa: 685b ldr r3, [r3, #4] + 80034ac: 085b lsrs r3, r3, #1 + 80034ae: f503 4200 add.w r2, r3, #32768 ; 0x8000 + 80034b2: 687b ldr r3, [r7, #4] + 80034b4: 685b ldr r3, [r3, #4] + 80034b6: fbb2 f3f3 udiv r3, r2, r3 + 80034ba: b29b uxth r3, r3 + 80034bc: 61bb str r3, [r7, #24] break; - 8003466: e002 b.n 800346e + 80034be: e002 b.n 80034c6 case UART_CLOCKSOURCE_UNDEFINED: default: ret = HAL_ERROR; - 8003468: 2301 movs r3, #1 - 800346a: 75fb strb r3, [r7, #23] + 80034c0: 2301 movs r3, #1 + 80034c2: 75fb strb r3, [r7, #23] break; - 800346c: bf00 nop + 80034c4: bf00 nop } /* USARTDIV must be greater than or equal to 0d16 */ if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX)) - 800346e: 69bb ldr r3, [r7, #24] - 8003470: 2b0f cmp r3, #15 - 8003472: d908 bls.n 8003486 - 8003474: 69bb ldr r3, [r7, #24] - 8003476: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 800347a: d204 bcs.n 8003486 + 80034c6: 69bb ldr r3, [r7, #24] + 80034c8: 2b0f cmp r3, #15 + 80034ca: d908 bls.n 80034de + 80034cc: 69bb ldr r3, [r7, #24] + 80034ce: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 + 80034d2: d204 bcs.n 80034de { huart->Instance->BRR = usartdiv; - 800347c: 687b ldr r3, [r7, #4] - 800347e: 681b ldr r3, [r3, #0] - 8003480: 69ba ldr r2, [r7, #24] - 8003482: 60da str r2, [r3, #12] - 8003484: e001 b.n 800348a + 80034d4: 687b ldr r3, [r7, #4] + 80034d6: 681b ldr r3, [r3, #0] + 80034d8: 69ba ldr r2, [r7, #24] + 80034da: 60da str r2, [r3, #12] + 80034dc: e001 b.n 80034e2 } else { ret = HAL_ERROR; - 8003486: 2301 movs r3, #1 - 8003488: 75fb strb r3, [r7, #23] + 80034de: 2301 movs r3, #1 + 80034e0: 75fb strb r3, [r7, #23] } } /* Clear ISR function pointers */ huart->RxISR = NULL; - 800348a: 687b ldr r3, [r7, #4] - 800348c: 2200 movs r2, #0 - 800348e: 661a str r2, [r3, #96] ; 0x60 + 80034e2: 687b ldr r3, [r7, #4] + 80034e4: 2200 movs r2, #0 + 80034e6: 661a str r2, [r3, #96] ; 0x60 huart->TxISR = NULL; - 8003490: 687b ldr r3, [r7, #4] - 8003492: 2200 movs r2, #0 - 8003494: 665a str r2, [r3, #100] ; 0x64 + 80034e8: 687b ldr r3, [r7, #4] + 80034ea: 2200 movs r2, #0 + 80034ec: 665a str r2, [r3, #100] ; 0x64 return ret; - 8003496: 7dfb ldrb r3, [r7, #23] + 80034ee: 7dfb ldrb r3, [r7, #23] } - 8003498: 4618 mov r0, r3 - 800349a: 3720 adds r7, #32 - 800349c: 46bd mov sp, r7 - 800349e: bd80 pop {r7, pc} - 80034a0: 01e84800 .word 0x01e84800 - 80034a4: 00f42400 .word 0x00f42400 - -080034a8 : + 80034f0: 4618 mov r0, r3 + 80034f2: 3720 adds r7, #32 + 80034f4: 46bd mov sp, r7 + 80034f6: bd80 pop {r7, pc} + 80034f8: 01e84800 .word 0x01e84800 + 80034fc: 00f42400 .word 0x00f42400 + +08003500 : * @brief Configure the UART peripheral advanced features. * @param huart UART handle. * @retval None */ void UART_AdvFeatureConfig(UART_HandleTypeDef *huart) { - 80034a8: b480 push {r7} - 80034aa: b083 sub sp, #12 - 80034ac: af00 add r7, sp, #0 - 80034ae: 6078 str r0, [r7, #4] + 8003500: b480 push {r7} + 8003502: b083 sub sp, #12 + 8003504: af00 add r7, sp, #0 + 8003506: 6078 str r0, [r7, #4] /* Check whether the set of advanced features to configure is properly set */ assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit)); /* if required, configure TX pin active level inversion */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT)) - 80034b0: 687b ldr r3, [r7, #4] - 80034b2: 6a5b ldr r3, [r3, #36] ; 0x24 - 80034b4: f003 0301 and.w r3, r3, #1 - 80034b8: 2b00 cmp r3, #0 - 80034ba: d00a beq.n 80034d2 + 8003508: 687b ldr r3, [r7, #4] + 800350a: 6a5b ldr r3, [r3, #36] ; 0x24 + 800350c: f003 0301 and.w r3, r3, #1 + 8003510: 2b00 cmp r3, #0 + 8003512: d00a beq.n 800352a { assert_param(IS_UART_ADVFEATURE_TXINV(huart->AdvancedInit.TxPinLevelInvert)); MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert); - 80034bc: 687b ldr r3, [r7, #4] - 80034be: 681b ldr r3, [r3, #0] - 80034c0: 685b ldr r3, [r3, #4] - 80034c2: f423 3100 bic.w r1, r3, #131072 ; 0x20000 - 80034c6: 687b ldr r3, [r7, #4] - 80034c8: 6a9a ldr r2, [r3, #40] ; 0x28 - 80034ca: 687b ldr r3, [r7, #4] - 80034cc: 681b ldr r3, [r3, #0] - 80034ce: 430a orrs r2, r1 - 80034d0: 605a str r2, [r3, #4] + 8003514: 687b ldr r3, [r7, #4] + 8003516: 681b ldr r3, [r3, #0] + 8003518: 685b ldr r3, [r3, #4] + 800351a: f423 3100 bic.w r1, r3, #131072 ; 0x20000 + 800351e: 687b ldr r3, [r7, #4] + 8003520: 6a9a ldr r2, [r3, #40] ; 0x28 + 8003522: 687b ldr r3, [r7, #4] + 8003524: 681b ldr r3, [r3, #0] + 8003526: 430a orrs r2, r1 + 8003528: 605a str r2, [r3, #4] } /* if required, configure RX pin active level inversion */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXINVERT_INIT)) - 80034d2: 687b ldr r3, [r7, #4] - 80034d4: 6a5b ldr r3, [r3, #36] ; 0x24 - 80034d6: f003 0302 and.w r3, r3, #2 - 80034da: 2b00 cmp r3, #0 - 80034dc: d00a beq.n 80034f4 + 800352a: 687b ldr r3, [r7, #4] + 800352c: 6a5b ldr r3, [r3, #36] ; 0x24 + 800352e: f003 0302 and.w r3, r3, #2 + 8003532: 2b00 cmp r3, #0 + 8003534: d00a beq.n 800354c { assert_param(IS_UART_ADVFEATURE_RXINV(huart->AdvancedInit.RxPinLevelInvert)); MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert); - 80034de: 687b ldr r3, [r7, #4] - 80034e0: 681b ldr r3, [r3, #0] - 80034e2: 685b ldr r3, [r3, #4] - 80034e4: f423 3180 bic.w r1, r3, #65536 ; 0x10000 - 80034e8: 687b ldr r3, [r7, #4] - 80034ea: 6ada ldr r2, [r3, #44] ; 0x2c - 80034ec: 687b ldr r3, [r7, #4] - 80034ee: 681b ldr r3, [r3, #0] - 80034f0: 430a orrs r2, r1 - 80034f2: 605a str r2, [r3, #4] + 8003536: 687b ldr r3, [r7, #4] + 8003538: 681b ldr r3, [r3, #0] + 800353a: 685b ldr r3, [r3, #4] + 800353c: f423 3180 bic.w r1, r3, #65536 ; 0x10000 + 8003540: 687b ldr r3, [r7, #4] + 8003542: 6ada ldr r2, [r3, #44] ; 0x2c + 8003544: 687b ldr r3, [r7, #4] + 8003546: 681b ldr r3, [r3, #0] + 8003548: 430a orrs r2, r1 + 800354a: 605a str r2, [r3, #4] } /* if required, configure data inversion */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DATAINVERT_INIT)) - 80034f4: 687b ldr r3, [r7, #4] - 80034f6: 6a5b ldr r3, [r3, #36] ; 0x24 - 80034f8: f003 0304 and.w r3, r3, #4 - 80034fc: 2b00 cmp r3, #0 - 80034fe: d00a beq.n 8003516 + 800354c: 687b ldr r3, [r7, #4] + 800354e: 6a5b ldr r3, [r3, #36] ; 0x24 + 8003550: f003 0304 and.w r3, r3, #4 + 8003554: 2b00 cmp r3, #0 + 8003556: d00a beq.n 800356e { assert_param(IS_UART_ADVFEATURE_DATAINV(huart->AdvancedInit.DataInvert)); MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert); - 8003500: 687b ldr r3, [r7, #4] - 8003502: 681b ldr r3, [r3, #0] - 8003504: 685b ldr r3, [r3, #4] - 8003506: f423 2180 bic.w r1, r3, #262144 ; 0x40000 - 800350a: 687b ldr r3, [r7, #4] - 800350c: 6b1a ldr r2, [r3, #48] ; 0x30 - 800350e: 687b ldr r3, [r7, #4] - 8003510: 681b ldr r3, [r3, #0] - 8003512: 430a orrs r2, r1 - 8003514: 605a str r2, [r3, #4] + 8003558: 687b ldr r3, [r7, #4] + 800355a: 681b ldr r3, [r3, #0] + 800355c: 685b ldr r3, [r3, #4] + 800355e: f423 2180 bic.w r1, r3, #262144 ; 0x40000 + 8003562: 687b ldr r3, [r7, #4] + 8003564: 6b1a ldr r2, [r3, #48] ; 0x30 + 8003566: 687b ldr r3, [r7, #4] + 8003568: 681b ldr r3, [r3, #0] + 800356a: 430a orrs r2, r1 + 800356c: 605a str r2, [r3, #4] } /* if required, configure RX/TX pins swap */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT)) - 8003516: 687b ldr r3, [r7, #4] - 8003518: 6a5b ldr r3, [r3, #36] ; 0x24 - 800351a: f003 0308 and.w r3, r3, #8 - 800351e: 2b00 cmp r3, #0 - 8003520: d00a beq.n 8003538 + 800356e: 687b ldr r3, [r7, #4] + 8003570: 6a5b ldr r3, [r3, #36] ; 0x24 + 8003572: f003 0308 and.w r3, r3, #8 + 8003576: 2b00 cmp r3, #0 + 8003578: d00a beq.n 8003590 { assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap)); MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap); - 8003522: 687b ldr r3, [r7, #4] - 8003524: 681b ldr r3, [r3, #0] - 8003526: 685b ldr r3, [r3, #4] - 8003528: f423 4100 bic.w r1, r3, #32768 ; 0x8000 - 800352c: 687b ldr r3, [r7, #4] - 800352e: 6b5a ldr r2, [r3, #52] ; 0x34 - 8003530: 687b ldr r3, [r7, #4] - 8003532: 681b ldr r3, [r3, #0] - 8003534: 430a orrs r2, r1 - 8003536: 605a str r2, [r3, #4] + 800357a: 687b ldr r3, [r7, #4] + 800357c: 681b ldr r3, [r3, #0] + 800357e: 685b ldr r3, [r3, #4] + 8003580: f423 4100 bic.w r1, r3, #32768 ; 0x8000 + 8003584: 687b ldr r3, [r7, #4] + 8003586: 6b5a ldr r2, [r3, #52] ; 0x34 + 8003588: 687b ldr r3, [r7, #4] + 800358a: 681b ldr r3, [r3, #0] + 800358c: 430a orrs r2, r1 + 800358e: 605a str r2, [r3, #4] } /* if required, configure RX overrun detection disabling */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT)) - 8003538: 687b ldr r3, [r7, #4] - 800353a: 6a5b ldr r3, [r3, #36] ; 0x24 - 800353c: f003 0310 and.w r3, r3, #16 - 8003540: 2b00 cmp r3, #0 - 8003542: d00a beq.n 800355a + 8003590: 687b ldr r3, [r7, #4] + 8003592: 6a5b ldr r3, [r3, #36] ; 0x24 + 8003594: f003 0310 and.w r3, r3, #16 + 8003598: 2b00 cmp r3, #0 + 800359a: d00a beq.n 80035b2 { assert_param(IS_UART_OVERRUN(huart->AdvancedInit.OverrunDisable)); MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable); - 8003544: 687b ldr r3, [r7, #4] - 8003546: 681b ldr r3, [r3, #0] - 8003548: 689b ldr r3, [r3, #8] - 800354a: f423 5180 bic.w r1, r3, #4096 ; 0x1000 - 800354e: 687b ldr r3, [r7, #4] - 8003550: 6b9a ldr r2, [r3, #56] ; 0x38 - 8003552: 687b ldr r3, [r7, #4] - 8003554: 681b ldr r3, [r3, #0] - 8003556: 430a orrs r2, r1 - 8003558: 609a str r2, [r3, #8] + 800359c: 687b ldr r3, [r7, #4] + 800359e: 681b ldr r3, [r3, #0] + 80035a0: 689b ldr r3, [r3, #8] + 80035a2: f423 5180 bic.w r1, r3, #4096 ; 0x1000 + 80035a6: 687b ldr r3, [r7, #4] + 80035a8: 6b9a ldr r2, [r3, #56] ; 0x38 + 80035aa: 687b ldr r3, [r7, #4] + 80035ac: 681b ldr r3, [r3, #0] + 80035ae: 430a orrs r2, r1 + 80035b0: 609a str r2, [r3, #8] } /* if required, configure DMA disabling on reception error */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DMADISABLEONERROR_INIT)) - 800355a: 687b ldr r3, [r7, #4] - 800355c: 6a5b ldr r3, [r3, #36] ; 0x24 - 800355e: f003 0320 and.w r3, r3, #32 - 8003562: 2b00 cmp r3, #0 - 8003564: d00a beq.n 800357c + 80035b2: 687b ldr r3, [r7, #4] + 80035b4: 6a5b ldr r3, [r3, #36] ; 0x24 + 80035b6: f003 0320 and.w r3, r3, #32 + 80035ba: 2b00 cmp r3, #0 + 80035bc: d00a beq.n 80035d4 { assert_param(IS_UART_ADVFEATURE_DMAONRXERROR(huart->AdvancedInit.DMADisableonRxError)); MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError); - 8003566: 687b ldr r3, [r7, #4] - 8003568: 681b ldr r3, [r3, #0] - 800356a: 689b ldr r3, [r3, #8] - 800356c: f423 5100 bic.w r1, r3, #8192 ; 0x2000 - 8003570: 687b ldr r3, [r7, #4] - 8003572: 6bda ldr r2, [r3, #60] ; 0x3c - 8003574: 687b ldr r3, [r7, #4] - 8003576: 681b ldr r3, [r3, #0] - 8003578: 430a orrs r2, r1 - 800357a: 609a str r2, [r3, #8] + 80035be: 687b ldr r3, [r7, #4] + 80035c0: 681b ldr r3, [r3, #0] + 80035c2: 689b ldr r3, [r3, #8] + 80035c4: f423 5100 bic.w r1, r3, #8192 ; 0x2000 + 80035c8: 687b ldr r3, [r7, #4] + 80035ca: 6bda ldr r2, [r3, #60] ; 0x3c + 80035cc: 687b ldr r3, [r7, #4] + 80035ce: 681b ldr r3, [r3, #0] + 80035d0: 430a orrs r2, r1 + 80035d2: 609a str r2, [r3, #8] } /* if required, configure auto Baud rate detection scheme */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_AUTOBAUDRATE_INIT)) - 800357c: 687b ldr r3, [r7, #4] - 800357e: 6a5b ldr r3, [r3, #36] ; 0x24 - 8003580: f003 0340 and.w r3, r3, #64 ; 0x40 - 8003584: 2b00 cmp r3, #0 - 8003586: d01a beq.n 80035be + 80035d4: 687b ldr r3, [r7, #4] + 80035d6: 6a5b ldr r3, [r3, #36] ; 0x24 + 80035d8: f003 0340 and.w r3, r3, #64 ; 0x40 + 80035dc: 2b00 cmp r3, #0 + 80035de: d01a beq.n 8003616 { assert_param(IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(huart->Instance)); assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATE(huart->AdvancedInit.AutoBaudRateEnable)); MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable); - 8003588: 687b ldr r3, [r7, #4] - 800358a: 681b ldr r3, [r3, #0] - 800358c: 685b ldr r3, [r3, #4] - 800358e: f423 1180 bic.w r1, r3, #1048576 ; 0x100000 - 8003592: 687b ldr r3, [r7, #4] - 8003594: 6c1a ldr r2, [r3, #64] ; 0x40 - 8003596: 687b ldr r3, [r7, #4] - 8003598: 681b ldr r3, [r3, #0] - 800359a: 430a orrs r2, r1 - 800359c: 605a str r2, [r3, #4] + 80035e0: 687b ldr r3, [r7, #4] + 80035e2: 681b ldr r3, [r3, #0] + 80035e4: 685b ldr r3, [r3, #4] + 80035e6: f423 1180 bic.w r1, r3, #1048576 ; 0x100000 + 80035ea: 687b ldr r3, [r7, #4] + 80035ec: 6c1a ldr r2, [r3, #64] ; 0x40 + 80035ee: 687b ldr r3, [r7, #4] + 80035f0: 681b ldr r3, [r3, #0] + 80035f2: 430a orrs r2, r1 + 80035f4: 605a str r2, [r3, #4] /* set auto Baudrate detection parameters if detection is enabled */ if (huart->AdvancedInit.AutoBaudRateEnable == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE) - 800359e: 687b ldr r3, [r7, #4] - 80035a0: 6c1b ldr r3, [r3, #64] ; 0x40 - 80035a2: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000 - 80035a6: d10a bne.n 80035be + 80035f6: 687b ldr r3, [r7, #4] + 80035f8: 6c1b ldr r3, [r3, #64] ; 0x40 + 80035fa: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000 + 80035fe: d10a bne.n 8003616 { assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(huart->AdvancedInit.AutoBaudRateMode)); MODIFY_REG(huart->Instance->CR2, USART_CR2_ABRMODE, huart->AdvancedInit.AutoBaudRateMode); - 80035a8: 687b ldr r3, [r7, #4] - 80035aa: 681b ldr r3, [r3, #0] - 80035ac: 685b ldr r3, [r3, #4] - 80035ae: f423 01c0 bic.w r1, r3, #6291456 ; 0x600000 - 80035b2: 687b ldr r3, [r7, #4] - 80035b4: 6c5a ldr r2, [r3, #68] ; 0x44 - 80035b6: 687b ldr r3, [r7, #4] - 80035b8: 681b ldr r3, [r3, #0] - 80035ba: 430a orrs r2, r1 - 80035bc: 605a str r2, [r3, #4] + 8003600: 687b ldr r3, [r7, #4] + 8003602: 681b ldr r3, [r3, #0] + 8003604: 685b ldr r3, [r3, #4] + 8003606: f423 01c0 bic.w r1, r3, #6291456 ; 0x600000 + 800360a: 687b ldr r3, [r7, #4] + 800360c: 6c5a ldr r2, [r3, #68] ; 0x44 + 800360e: 687b ldr r3, [r7, #4] + 8003610: 681b ldr r3, [r3, #0] + 8003612: 430a orrs r2, r1 + 8003614: 605a str r2, [r3, #4] } } /* if required, configure MSB first on communication line */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_MSBFIRST_INIT)) - 80035be: 687b ldr r3, [r7, #4] - 80035c0: 6a5b ldr r3, [r3, #36] ; 0x24 - 80035c2: f003 0380 and.w r3, r3, #128 ; 0x80 - 80035c6: 2b00 cmp r3, #0 - 80035c8: d00a beq.n 80035e0 + 8003616: 687b ldr r3, [r7, #4] + 8003618: 6a5b ldr r3, [r3, #36] ; 0x24 + 800361a: f003 0380 and.w r3, r3, #128 ; 0x80 + 800361e: 2b00 cmp r3, #0 + 8003620: d00a beq.n 8003638 { assert_param(IS_UART_ADVFEATURE_MSBFIRST(huart->AdvancedInit.MSBFirst)); MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst); - 80035ca: 687b ldr r3, [r7, #4] - 80035cc: 681b ldr r3, [r3, #0] - 80035ce: 685b ldr r3, [r3, #4] - 80035d0: f423 2100 bic.w r1, r3, #524288 ; 0x80000 - 80035d4: 687b ldr r3, [r7, #4] - 80035d6: 6c9a ldr r2, [r3, #72] ; 0x48 - 80035d8: 687b ldr r3, [r7, #4] - 80035da: 681b ldr r3, [r3, #0] - 80035dc: 430a orrs r2, r1 - 80035de: 605a str r2, [r3, #4] + 8003622: 687b ldr r3, [r7, #4] + 8003624: 681b ldr r3, [r3, #0] + 8003626: 685b ldr r3, [r3, #4] + 8003628: f423 2100 bic.w r1, r3, #524288 ; 0x80000 + 800362c: 687b ldr r3, [r7, #4] + 800362e: 6c9a ldr r2, [r3, #72] ; 0x48 + 8003630: 687b ldr r3, [r7, #4] + 8003632: 681b ldr r3, [r3, #0] + 8003634: 430a orrs r2, r1 + 8003636: 605a str r2, [r3, #4] } } - 80035e0: bf00 nop - 80035e2: 370c adds r7, #12 - 80035e4: 46bd mov sp, r7 - 80035e6: f85d 7b04 ldr.w r7, [sp], #4 - 80035ea: 4770 bx lr + 8003638: bf00 nop + 800363a: 370c adds r7, #12 + 800363c: 46bd mov sp, r7 + 800363e: f85d 7b04 ldr.w r7, [sp], #4 + 8003642: 4770 bx lr -080035ec : +08003644 : * @brief Check the UART Idle State. * @param huart UART handle. * @retval HAL status */ HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart) { - 80035ec: b580 push {r7, lr} - 80035ee: b086 sub sp, #24 - 80035f0: af02 add r7, sp, #8 - 80035f2: 6078 str r0, [r7, #4] + 8003644: b580 push {r7, lr} + 8003646: b086 sub sp, #24 + 8003648: af02 add r7, sp, #8 + 800364a: 6078 str r0, [r7, #4] uint32_t tickstart; /* Initialize the UART ErrorCode */ huart->ErrorCode = HAL_UART_ERROR_NONE; - 80035f4: 687b ldr r3, [r7, #4] - 80035f6: 2200 movs r2, #0 - 80035f8: 67da str r2, [r3, #124] ; 0x7c + 800364c: 687b ldr r3, [r7, #4] + 800364e: 2200 movs r2, #0 + 8003650: 67da str r2, [r3, #124] ; 0x7c /* Init tickstart for timeout managment*/ tickstart = HAL_GetTick(); - 80035fa: f7fd fad9 bl 8000bb0 - 80035fe: 60f8 str r0, [r7, #12] + 8003652: f7fd faad bl 8000bb0 + 8003656: 60f8 str r0, [r7, #12] /* Check if the Transmitter is enabled */ if ((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE) - 8003600: 687b ldr r3, [r7, #4] - 8003602: 681b ldr r3, [r3, #0] - 8003604: 681b ldr r3, [r3, #0] - 8003606: f003 0308 and.w r3, r3, #8 - 800360a: 2b08 cmp r3, #8 - 800360c: d10e bne.n 800362c + 8003658: 687b ldr r3, [r7, #4] + 800365a: 681b ldr r3, [r3, #0] + 800365c: 681b ldr r3, [r3, #0] + 800365e: f003 0308 and.w r3, r3, #8 + 8003662: 2b08 cmp r3, #8 + 8003664: d10e bne.n 8003684 { /* Wait until TEACK flag is set */ if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK) - 800360e: f06f 437e mvn.w r3, #4261412864 ; 0xfe000000 - 8003612: 9300 str r3, [sp, #0] - 8003614: 68fb ldr r3, [r7, #12] - 8003616: 2200 movs r2, #0 - 8003618: f44f 1100 mov.w r1, #2097152 ; 0x200000 - 800361c: 6878 ldr r0, [r7, #4] - 800361e: f000 f814 bl 800364a - 8003622: 4603 mov r3, r0 - 8003624: 2b00 cmp r3, #0 - 8003626: d001 beq.n 800362c + 8003666: f06f 437e mvn.w r3, #4261412864 ; 0xfe000000 + 800366a: 9300 str r3, [sp, #0] + 800366c: 68fb ldr r3, [r7, #12] + 800366e: 2200 movs r2, #0 + 8003670: f44f 1100 mov.w r1, #2097152 ; 0x200000 + 8003674: 6878 ldr r0, [r7, #4] + 8003676: f000 f814 bl 80036a2 + 800367a: 4603 mov r3, r0 + 800367c: 2b00 cmp r3, #0 + 800367e: d001 beq.n 8003684 { /* Timeout occurred */ return HAL_TIMEOUT; - 8003628: 2303 movs r3, #3 - 800362a: e00a b.n 8003642 + 8003680: 2303 movs r3, #3 + 8003682: e00a b.n 800369a } } /* Initialize the UART State */ huart->gState = HAL_UART_STATE_READY; - 800362c: 687b ldr r3, [r7, #4] - 800362e: 2220 movs r2, #32 - 8003630: 675a str r2, [r3, #116] ; 0x74 + 8003684: 687b ldr r3, [r7, #4] + 8003686: 2220 movs r2, #32 + 8003688: 675a str r2, [r3, #116] ; 0x74 huart->RxState = HAL_UART_STATE_READY; - 8003632: 687b ldr r3, [r7, #4] - 8003634: 2220 movs r2, #32 - 8003636: 679a str r2, [r3, #120] ; 0x78 + 800368a: 687b ldr r3, [r7, #4] + 800368c: 2220 movs r2, #32 + 800368e: 679a str r2, [r3, #120] ; 0x78 /* Process Unlocked */ __HAL_UNLOCK(huart); - 8003638: 687b ldr r3, [r7, #4] - 800363a: 2200 movs r2, #0 - 800363c: f883 2070 strb.w r2, [r3, #112] ; 0x70 + 8003690: 687b ldr r3, [r7, #4] + 8003692: 2200 movs r2, #0 + 8003694: f883 2070 strb.w r2, [r3, #112] ; 0x70 return HAL_OK; - 8003640: 2300 movs r3, #0 + 8003698: 2300 movs r3, #0 } - 8003642: 4618 mov r0, r3 - 8003644: 3710 adds r7, #16 - 8003646: 46bd mov sp, r7 - 8003648: bd80 pop {r7, pc} + 800369a: 4618 mov r0, r3 + 800369c: 3710 adds r7, #16 + 800369e: 46bd mov sp, r7 + 80036a0: bd80 pop {r7, pc} -0800364a : +080036a2 : * @param Tickstart Tick start value * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout) { - 800364a: b580 push {r7, lr} - 800364c: b084 sub sp, #16 - 800364e: af00 add r7, sp, #0 - 8003650: 60f8 str r0, [r7, #12] - 8003652: 60b9 str r1, [r7, #8] - 8003654: 603b str r3, [r7, #0] - 8003656: 4613 mov r3, r2 - 8003658: 71fb strb r3, [r7, #7] + 80036a2: b580 push {r7, lr} + 80036a4: b084 sub sp, #16 + 80036a6: af00 add r7, sp, #0 + 80036a8: 60f8 str r0, [r7, #12] + 80036aa: 60b9 str r1, [r7, #8] + 80036ac: 603b str r3, [r7, #0] + 80036ae: 4613 mov r3, r2 + 80036b0: 71fb strb r3, [r7, #7] /* Wait until flag is set */ while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) - 800365a: e02a b.n 80036b2 + 80036b2: e02a b.n 800370a { /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) - 800365c: 69bb ldr r3, [r7, #24] - 800365e: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff - 8003662: d026 beq.n 80036b2 + 80036b4: 69bb ldr r3, [r7, #24] + 80036b6: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff + 80036ba: d026 beq.n 800370a { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) - 8003664: f7fd faa4 bl 8000bb0 - 8003668: 4602 mov r2, r0 - 800366a: 683b ldr r3, [r7, #0] - 800366c: 1ad3 subs r3, r2, r3 - 800366e: 69ba ldr r2, [r7, #24] - 8003670: 429a cmp r2, r3 - 8003672: d302 bcc.n 800367a - 8003674: 69bb ldr r3, [r7, #24] - 8003676: 2b00 cmp r3, #0 - 8003678: d11b bne.n 80036b2 + 80036bc: f7fd fa78 bl 8000bb0 + 80036c0: 4602 mov r2, r0 + 80036c2: 683b ldr r3, [r7, #0] + 80036c4: 1ad3 subs r3, r2, r3 + 80036c6: 69ba ldr r2, [r7, #24] + 80036c8: 429a cmp r2, r3 + 80036ca: d302 bcc.n 80036d2 + 80036cc: 69bb ldr r3, [r7, #24] + 80036ce: 2b00 cmp r3, #0 + 80036d0: d11b bne.n 800370a { /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */ CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE)); - 800367a: 68fb ldr r3, [r7, #12] - 800367c: 681b ldr r3, [r3, #0] - 800367e: 681a ldr r2, [r3, #0] - 8003680: 68fb ldr r3, [r7, #12] - 8003682: 681b ldr r3, [r3, #0] - 8003684: f422 72d0 bic.w r2, r2, #416 ; 0x1a0 - 8003688: 601a str r2, [r3, #0] + 80036d2: 68fb ldr r3, [r7, #12] + 80036d4: 681b ldr r3, [r3, #0] + 80036d6: 681a ldr r2, [r3, #0] + 80036d8: 68fb ldr r3, [r7, #12] + 80036da: 681b ldr r3, [r3, #0] + 80036dc: f422 72d0 bic.w r2, r2, #416 ; 0x1a0 + 80036e0: 601a str r2, [r3, #0] CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 800368a: 68fb ldr r3, [r7, #12] - 800368c: 681b ldr r3, [r3, #0] - 800368e: 689a ldr r2, [r3, #8] - 8003690: 68fb ldr r3, [r7, #12] - 8003692: 681b ldr r3, [r3, #0] - 8003694: f022 0201 bic.w r2, r2, #1 - 8003698: 609a str r2, [r3, #8] + 80036e2: 68fb ldr r3, [r7, #12] + 80036e4: 681b ldr r3, [r3, #0] + 80036e6: 689a ldr r2, [r3, #8] + 80036e8: 68fb ldr r3, [r7, #12] + 80036ea: 681b ldr r3, [r3, #0] + 80036ec: f022 0201 bic.w r2, r2, #1 + 80036f0: 609a str r2, [r3, #8] huart->gState = HAL_UART_STATE_READY; - 800369a: 68fb ldr r3, [r7, #12] - 800369c: 2220 movs r2, #32 - 800369e: 675a str r2, [r3, #116] ; 0x74 + 80036f2: 68fb ldr r3, [r7, #12] + 80036f4: 2220 movs r2, #32 + 80036f6: 675a str r2, [r3, #116] ; 0x74 huart->RxState = HAL_UART_STATE_READY; - 80036a0: 68fb ldr r3, [r7, #12] - 80036a2: 2220 movs r2, #32 - 80036a4: 679a str r2, [r3, #120] ; 0x78 + 80036f8: 68fb ldr r3, [r7, #12] + 80036fa: 2220 movs r2, #32 + 80036fc: 679a str r2, [r3, #120] ; 0x78 /* Process Unlocked */ __HAL_UNLOCK(huart); - 80036a6: 68fb ldr r3, [r7, #12] - 80036a8: 2200 movs r2, #0 - 80036aa: f883 2070 strb.w r2, [r3, #112] ; 0x70 + 80036fe: 68fb ldr r3, [r7, #12] + 8003700: 2200 movs r2, #0 + 8003702: f883 2070 strb.w r2, [r3, #112] ; 0x70 return HAL_TIMEOUT; - 80036ae: 2303 movs r3, #3 - 80036b0: e00f b.n 80036d2 + 8003706: 2303 movs r3, #3 + 8003708: e00f b.n 800372a while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) - 80036b2: 68fb ldr r3, [r7, #12] - 80036b4: 681b ldr r3, [r3, #0] - 80036b6: 69da ldr r2, [r3, #28] - 80036b8: 68bb ldr r3, [r7, #8] - 80036ba: 4013 ands r3, r2 - 80036bc: 68ba ldr r2, [r7, #8] - 80036be: 429a cmp r2, r3 - 80036c0: bf0c ite eq - 80036c2: 2301 moveq r3, #1 - 80036c4: 2300 movne r3, #0 - 80036c6: b2db uxtb r3, r3 - 80036c8: 461a mov r2, r3 - 80036ca: 79fb ldrb r3, [r7, #7] - 80036cc: 429a cmp r2, r3 - 80036ce: d0c5 beq.n 800365c + 800370a: 68fb ldr r3, [r7, #12] + 800370c: 681b ldr r3, [r3, #0] + 800370e: 69da ldr r2, [r3, #28] + 8003710: 68bb ldr r3, [r7, #8] + 8003712: 4013 ands r3, r2 + 8003714: 68ba ldr r2, [r7, #8] + 8003716: 429a cmp r2, r3 + 8003718: bf0c ite eq + 800371a: 2301 moveq r3, #1 + 800371c: 2300 movne r3, #0 + 800371e: b2db uxtb r3, r3 + 8003720: 461a mov r2, r3 + 8003722: 79fb ldrb r3, [r7, #7] + 8003724: 429a cmp r2, r3 + 8003726: d0c5 beq.n 80036b4 } } } return HAL_OK; - 80036d0: 2300 movs r3, #0 + 8003728: 2300 movs r3, #0 } - 80036d2: 4618 mov r0, r3 - 80036d4: 3710 adds r7, #16 - 80036d6: 46bd mov sp, r7 - 80036d8: bd80 pop {r7, pc} + 800372a: 4618 mov r0, r3 + 800372c: 3710 adds r7, #16 + 800372e: 46bd mov sp, r7 + 8003730: bd80 pop {r7, pc} -080036da : +08003732 : * @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion). * @param huart UART handle. * @retval None */ static void UART_EndRxTransfer(UART_HandleTypeDef *huart) { - 80036da: b480 push {r7} - 80036dc: b083 sub sp, #12 - 80036de: af00 add r7, sp, #0 - 80036e0: 6078 str r0, [r7, #4] + 8003732: b480 push {r7} + 8003734: b083 sub sp, #12 + 8003736: af00 add r7, sp, #0 + 8003738: 6078 str r0, [r7, #4] /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); - 80036e2: 687b ldr r3, [r7, #4] - 80036e4: 681b ldr r3, [r3, #0] - 80036e6: 681a ldr r2, [r3, #0] - 80036e8: 687b ldr r3, [r7, #4] - 80036ea: 681b ldr r3, [r3, #0] - 80036ec: f422 7290 bic.w r2, r2, #288 ; 0x120 - 80036f0: 601a str r2, [r3, #0] + 800373a: 687b ldr r3, [r7, #4] + 800373c: 681b ldr r3, [r3, #0] + 800373e: 681a ldr r2, [r3, #0] + 8003740: 687b ldr r3, [r7, #4] + 8003742: 681b ldr r3, [r3, #0] + 8003744: f422 7290 bic.w r2, r2, #288 ; 0x120 + 8003748: 601a str r2, [r3, #0] CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 80036f2: 687b ldr r3, [r7, #4] - 80036f4: 681b ldr r3, [r3, #0] - 80036f6: 689a ldr r2, [r3, #8] - 80036f8: 687b ldr r3, [r7, #4] - 80036fa: 681b ldr r3, [r3, #0] - 80036fc: f022 0201 bic.w r2, r2, #1 - 8003700: 609a str r2, [r3, #8] + 800374a: 687b ldr r3, [r7, #4] + 800374c: 681b ldr r3, [r3, #0] + 800374e: 689a ldr r2, [r3, #8] + 8003750: 687b ldr r3, [r7, #4] + 8003752: 681b ldr r3, [r3, #0] + 8003754: f022 0201 bic.w r2, r2, #1 + 8003758: 609a str r2, [r3, #8] /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; - 8003702: 687b ldr r3, [r7, #4] - 8003704: 2220 movs r2, #32 - 8003706: 679a str r2, [r3, #120] ; 0x78 + 800375a: 687b ldr r3, [r7, #4] + 800375c: 2220 movs r2, #32 + 800375e: 679a str r2, [r3, #120] ; 0x78 /* Reset RxIsr function pointer */ huart->RxISR = NULL; - 8003708: 687b ldr r3, [r7, #4] - 800370a: 2200 movs r2, #0 - 800370c: 661a str r2, [r3, #96] ; 0x60 + 8003760: 687b ldr r3, [r7, #4] + 8003762: 2200 movs r2, #0 + 8003764: 661a str r2, [r3, #96] ; 0x60 } - 800370e: bf00 nop - 8003710: 370c adds r7, #12 - 8003712: 46bd mov sp, r7 - 8003714: f85d 7b04 ldr.w r7, [sp], #4 - 8003718: 4770 bx lr + 8003766: bf00 nop + 8003768: 370c adds r7, #12 + 800376a: 46bd mov sp, r7 + 800376c: f85d 7b04 ldr.w r7, [sp], #4 + 8003770: 4770 bx lr -0800371a : +08003772 : * (To be called at end of DMA Abort procedure following error occurrence). * @param hdma DMA handle. * @retval None */ static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma) { - 800371a: b580 push {r7, lr} - 800371c: b084 sub sp, #16 - 800371e: af00 add r7, sp, #0 - 8003720: 6078 str r0, [r7, #4] + 8003772: b580 push {r7, lr} + 8003774: b084 sub sp, #16 + 8003776: af00 add r7, sp, #0 + 8003778: 6078 str r0, [r7, #4] UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); - 8003722: 687b ldr r3, [r7, #4] - 8003724: 6b9b ldr r3, [r3, #56] ; 0x38 - 8003726: 60fb str r3, [r7, #12] + 800377a: 687b ldr r3, [r7, #4] + 800377c: 6b9b ldr r3, [r3, #56] ; 0x38 + 800377e: 60fb str r3, [r7, #12] huart->RxXferCount = 0U; - 8003728: 68fb ldr r3, [r7, #12] - 800372a: 2200 movs r2, #0 - 800372c: f8a3 205a strh.w r2, [r3, #90] ; 0x5a + 8003780: 68fb ldr r3, [r7, #12] + 8003782: 2200 movs r2, #0 + 8003784: f8a3 205a strh.w r2, [r3, #90] ; 0x5a huart->TxXferCount = 0U; - 8003730: 68fb ldr r3, [r7, #12] - 8003732: 2200 movs r2, #0 - 8003734: f8a3 2052 strh.w r2, [r3, #82] ; 0x52 + 8003788: 68fb ldr r3, [r7, #12] + 800378a: 2200 movs r2, #0 + 800378c: f8a3 2052 strh.w r2, [r3, #82] ; 0x52 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); - 8003738: 68f8 ldr r0, [r7, #12] - 800373a: f7fd f881 bl 8000840 + 8003790: 68f8 ldr r0, [r7, #12] + 8003792: f7fd f855 bl 8000840 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } - 800373e: bf00 nop - 8003740: 3710 adds r7, #16 - 8003742: 46bd mov sp, r7 - 8003744: bd80 pop {r7, pc} + 8003796: bf00 nop + 8003798: 3710 adds r7, #16 + 800379a: 46bd mov sp, r7 + 800379c: bd80 pop {r7, pc} -08003746 : +0800379e : * @param huart pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ static void UART_EndTransmit_IT(UART_HandleTypeDef *huart) { - 8003746: b580 push {r7, lr} - 8003748: b082 sub sp, #8 - 800374a: af00 add r7, sp, #0 - 800374c: 6078 str r0, [r7, #4] + 800379e: b580 push {r7, lr} + 80037a0: b082 sub sp, #8 + 80037a2: af00 add r7, sp, #0 + 80037a4: 6078 str r0, [r7, #4] /* Disable the UART Transmit Complete Interrupt */ CLEAR_BIT(huart->Instance->CR1, USART_CR1_TCIE); - 800374e: 687b ldr r3, [r7, #4] - 8003750: 681b ldr r3, [r3, #0] - 8003752: 681a ldr r2, [r3, #0] - 8003754: 687b ldr r3, [r7, #4] - 8003756: 681b ldr r3, [r3, #0] - 8003758: f022 0240 bic.w r2, r2, #64 ; 0x40 - 800375c: 601a str r2, [r3, #0] + 80037a6: 687b ldr r3, [r7, #4] + 80037a8: 681b ldr r3, [r3, #0] + 80037aa: 681a ldr r2, [r3, #0] + 80037ac: 687b ldr r3, [r7, #4] + 80037ae: 681b ldr r3, [r3, #0] + 80037b0: f022 0240 bic.w r2, r2, #64 ; 0x40 + 80037b4: 601a str r2, [r3, #0] /* Tx process is ended, restore huart->gState to Ready */ huart->gState = HAL_UART_STATE_READY; - 800375e: 687b ldr r3, [r7, #4] - 8003760: 2220 movs r2, #32 - 8003762: 675a str r2, [r3, #116] ; 0x74 + 80037b6: 687b ldr r3, [r7, #4] + 80037b8: 2220 movs r2, #32 + 80037ba: 675a str r2, [r3, #116] ; 0x74 /* Cleat TxISR function pointer */ huart->TxISR = NULL; - 8003764: 687b ldr r3, [r7, #4] - 8003766: 2200 movs r2, #0 - 8003768: 665a str r2, [r3, #100] ; 0x64 + 80037bc: 687b ldr r3, [r7, #4] + 80037be: 2200 movs r2, #0 + 80037c0: 665a str r2, [r3, #100] ; 0x64 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Tx complete callback*/ huart->TxCpltCallback(huart); #else /*Call legacy weak Tx complete callback*/ HAL_UART_TxCpltCallback(huart); - 800376a: 6878 ldr r0, [r7, #4] - 800376c: f7ff fbee bl 8002f4c + 80037c2: 6878 ldr r0, [r7, #4] + 80037c4: f7ff fbee bl 8002fa4 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } - 8003770: bf00 nop - 8003772: 3708 adds r7, #8 - 8003774: 46bd mov sp, r7 - 8003776: bd80 pop {r7, pc} + 80037c8: bf00 nop + 80037ca: 3708 adds r7, #8 + 80037cc: 46bd mov sp, r7 + 80037ce: bd80 pop {r7, pc} -08003778 : +080037d0 : * @brief RX interrrupt handler for 7 or 8 bits data word length . * @param huart UART handle. * @retval None */ static void UART_RxISR_8BIT(UART_HandleTypeDef *huart) { - 8003778: b580 push {r7, lr} - 800377a: b084 sub sp, #16 - 800377c: af00 add r7, sp, #0 - 800377e: 6078 str r0, [r7, #4] + 80037d0: b580 push {r7, lr} + 80037d2: b084 sub sp, #16 + 80037d4: af00 add r7, sp, #0 + 80037d6: 6078 str r0, [r7, #4] uint16_t uhMask = huart->Mask; - 8003780: 687b ldr r3, [r7, #4] - 8003782: f8b3 305c ldrh.w r3, [r3, #92] ; 0x5c - 8003786: 81fb strh r3, [r7, #14] + 80037d8: 687b ldr r3, [r7, #4] + 80037da: f8b3 305c ldrh.w r3, [r3, #92] ; 0x5c + 80037de: 81fb strh r3, [r7, #14] uint16_t uhdata; /* Check that a Rx process is ongoing */ if (huart->RxState == HAL_UART_STATE_BUSY_RX) - 8003788: 687b ldr r3, [r7, #4] - 800378a: 6f9b ldr r3, [r3, #120] ; 0x78 - 800378c: 2b22 cmp r3, #34 ; 0x22 - 800378e: d13a bne.n 8003806 + 80037e0: 687b ldr r3, [r7, #4] + 80037e2: 6f9b ldr r3, [r3, #120] ; 0x78 + 80037e4: 2b22 cmp r3, #34 ; 0x22 + 80037e6: d13a bne.n 800385e { uhdata = (uint16_t) READ_REG(huart->Instance->RDR); - 8003790: 687b ldr r3, [r7, #4] - 8003792: 681b ldr r3, [r3, #0] - 8003794: 6a5b ldr r3, [r3, #36] ; 0x24 - 8003796: 81bb strh r3, [r7, #12] + 80037e8: 687b ldr r3, [r7, #4] + 80037ea: 681b ldr r3, [r3, #0] + 80037ec: 6a5b ldr r3, [r3, #36] ; 0x24 + 80037ee: 81bb strh r3, [r7, #12] *huart->pRxBuffPtr = (uint8_t)(uhdata & (uint8_t)uhMask); - 8003798: 89bb ldrh r3, [r7, #12] - 800379a: b2d9 uxtb r1, r3 - 800379c: 89fb ldrh r3, [r7, #14] - 800379e: b2da uxtb r2, r3 - 80037a0: 687b ldr r3, [r7, #4] - 80037a2: 6d5b ldr r3, [r3, #84] ; 0x54 - 80037a4: 400a ands r2, r1 - 80037a6: b2d2 uxtb r2, r2 - 80037a8: 701a strb r2, [r3, #0] + 80037f0: 89bb ldrh r3, [r7, #12] + 80037f2: b2d9 uxtb r1, r3 + 80037f4: 89fb ldrh r3, [r7, #14] + 80037f6: b2da uxtb r2, r3 + 80037f8: 687b ldr r3, [r7, #4] + 80037fa: 6d5b ldr r3, [r3, #84] ; 0x54 + 80037fc: 400a ands r2, r1 + 80037fe: b2d2 uxtb r2, r2 + 8003800: 701a strb r2, [r3, #0] huart->pRxBuffPtr++; - 80037aa: 687b ldr r3, [r7, #4] - 80037ac: 6d5b ldr r3, [r3, #84] ; 0x54 - 80037ae: 1c5a adds r2, r3, #1 - 80037b0: 687b ldr r3, [r7, #4] - 80037b2: 655a str r2, [r3, #84] ; 0x54 + 8003802: 687b ldr r3, [r7, #4] + 8003804: 6d5b ldr r3, [r3, #84] ; 0x54 + 8003806: 1c5a adds r2, r3, #1 + 8003808: 687b ldr r3, [r7, #4] + 800380a: 655a str r2, [r3, #84] ; 0x54 huart->RxXferCount--; - 80037b4: 687b ldr r3, [r7, #4] - 80037b6: f8b3 305a ldrh.w r3, [r3, #90] ; 0x5a - 80037ba: b29b uxth r3, r3 - 80037bc: 3b01 subs r3, #1 - 80037be: b29a uxth r2, r3 - 80037c0: 687b ldr r3, [r7, #4] - 80037c2: f8a3 205a strh.w r2, [r3, #90] ; 0x5a + 800380c: 687b ldr r3, [r7, #4] + 800380e: f8b3 305a ldrh.w r3, [r3, #90] ; 0x5a + 8003812: b29b uxth r3, r3 + 8003814: 3b01 subs r3, #1 + 8003816: b29a uxth r2, r3 + 8003818: 687b ldr r3, [r7, #4] + 800381a: f8a3 205a strh.w r2, [r3, #90] ; 0x5a if (huart->RxXferCount == 0U) - 80037c6: 687b ldr r3, [r7, #4] - 80037c8: f8b3 305a ldrh.w r3, [r3, #90] ; 0x5a - 80037cc: b29b uxth r3, r3 - 80037ce: 2b00 cmp r3, #0 - 80037d0: d121 bne.n 8003816 + 800381e: 687b ldr r3, [r7, #4] + 8003820: f8b3 305a ldrh.w r3, [r3, #90] ; 0x5a + 8003824: b29b uxth r3, r3 + 8003826: 2b00 cmp r3, #0 + 8003828: d121 bne.n 800386e { /* Disable the UART Parity Error Interrupt and RXNE interrupts */ CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); - 80037d2: 687b ldr r3, [r7, #4] - 80037d4: 681b ldr r3, [r3, #0] - 80037d6: 681a ldr r2, [r3, #0] - 80037d8: 687b ldr r3, [r7, #4] - 80037da: 681b ldr r3, [r3, #0] - 80037dc: f422 7290 bic.w r2, r2, #288 ; 0x120 - 80037e0: 601a str r2, [r3, #0] + 800382a: 687b ldr r3, [r7, #4] + 800382c: 681b ldr r3, [r3, #0] + 800382e: 681a ldr r2, [r3, #0] + 8003830: 687b ldr r3, [r7, #4] + 8003832: 681b ldr r3, [r3, #0] + 8003834: f422 7290 bic.w r2, r2, #288 ; 0x120 + 8003838: 601a str r2, [r3, #0] /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 80037e2: 687b ldr r3, [r7, #4] - 80037e4: 681b ldr r3, [r3, #0] - 80037e6: 689a ldr r2, [r3, #8] - 80037e8: 687b ldr r3, [r7, #4] - 80037ea: 681b ldr r3, [r3, #0] - 80037ec: f022 0201 bic.w r2, r2, #1 - 80037f0: 609a str r2, [r3, #8] + 800383a: 687b ldr r3, [r7, #4] + 800383c: 681b ldr r3, [r3, #0] + 800383e: 689a ldr r2, [r3, #8] + 8003840: 687b ldr r3, [r7, #4] + 8003842: 681b ldr r3, [r3, #0] + 8003844: f022 0201 bic.w r2, r2, #1 + 8003848: 609a str r2, [r3, #8] /* Rx process is completed, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; - 80037f2: 687b ldr r3, [r7, #4] - 80037f4: 2220 movs r2, #32 - 80037f6: 679a str r2, [r3, #120] ; 0x78 + 800384a: 687b ldr r3, [r7, #4] + 800384c: 2220 movs r2, #32 + 800384e: 679a str r2, [r3, #120] ; 0x78 /* Clear RxISR function pointer */ huart->RxISR = NULL; - 80037f8: 687b ldr r3, [r7, #4] - 80037fa: 2200 movs r2, #0 - 80037fc: 661a str r2, [r3, #96] ; 0x60 + 8003850: 687b ldr r3, [r7, #4] + 8003852: 2200 movs r2, #0 + 8003854: 661a str r2, [r3, #96] ; 0x60 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx complete callback*/ huart->RxCpltCallback(huart); #else /*Call legacy weak Rx complete callback*/ HAL_UART_RxCpltCallback(huart); - 80037fe: 6878 ldr r0, [r7, #4] - 8003800: f7fd f804 bl 800080c + 8003856: 6878 ldr r0, [r7, #4] + 8003858: f7fc ffde bl 8000818 else { /* Clear RXNE interrupt flag */ __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); } } - 8003804: e007 b.n 8003816 + 800385c: e007 b.n 800386e __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); - 8003806: 687b ldr r3, [r7, #4] - 8003808: 681b ldr r3, [r3, #0] - 800380a: 699a ldr r2, [r3, #24] - 800380c: 687b ldr r3, [r7, #4] - 800380e: 681b ldr r3, [r3, #0] - 8003810: f042 0208 orr.w r2, r2, #8 - 8003814: 619a str r2, [r3, #24] + 800385e: 687b ldr r3, [r7, #4] + 8003860: 681b ldr r3, [r3, #0] + 8003862: 699a ldr r2, [r3, #24] + 8003864: 687b ldr r3, [r7, #4] + 8003866: 681b ldr r3, [r3, #0] + 8003868: f042 0208 orr.w r2, r2, #8 + 800386c: 619a str r2, [r3, #24] } - 8003816: bf00 nop - 8003818: 3710 adds r7, #16 - 800381a: 46bd mov sp, r7 - 800381c: bd80 pop {r7, pc} + 800386e: bf00 nop + 8003870: 3710 adds r7, #16 + 8003872: 46bd mov sp, r7 + 8003874: bd80 pop {r7, pc} -0800381e : +08003876 : * interruptions have been enabled by HAL_UART_Receive_IT() * @param huart UART handle. * @retval None */ static void UART_RxISR_16BIT(UART_HandleTypeDef *huart) { - 800381e: b580 push {r7, lr} - 8003820: b084 sub sp, #16 - 8003822: af00 add r7, sp, #0 - 8003824: 6078 str r0, [r7, #4] + 8003876: b580 push {r7, lr} + 8003878: b084 sub sp, #16 + 800387a: af00 add r7, sp, #0 + 800387c: 6078 str r0, [r7, #4] uint16_t *tmp; uint16_t uhMask = huart->Mask; - 8003826: 687b ldr r3, [r7, #4] - 8003828: f8b3 305c ldrh.w r3, [r3, #92] ; 0x5c - 800382c: 81fb strh r3, [r7, #14] + 800387e: 687b ldr r3, [r7, #4] + 8003880: f8b3 305c ldrh.w r3, [r3, #92] ; 0x5c + 8003884: 81fb strh r3, [r7, #14] uint16_t uhdata; /* Check that a Rx process is ongoing */ if (huart->RxState == HAL_UART_STATE_BUSY_RX) - 800382e: 687b ldr r3, [r7, #4] - 8003830: 6f9b ldr r3, [r3, #120] ; 0x78 - 8003832: 2b22 cmp r3, #34 ; 0x22 - 8003834: d13a bne.n 80038ac + 8003886: 687b ldr r3, [r7, #4] + 8003888: 6f9b ldr r3, [r3, #120] ; 0x78 + 800388a: 2b22 cmp r3, #34 ; 0x22 + 800388c: d13a bne.n 8003904 { uhdata = (uint16_t) READ_REG(huart->Instance->RDR); - 8003836: 687b ldr r3, [r7, #4] - 8003838: 681b ldr r3, [r3, #0] - 800383a: 6a5b ldr r3, [r3, #36] ; 0x24 - 800383c: 81bb strh r3, [r7, #12] + 800388e: 687b ldr r3, [r7, #4] + 8003890: 681b ldr r3, [r3, #0] + 8003892: 6a5b ldr r3, [r3, #36] ; 0x24 + 8003894: 81bb strh r3, [r7, #12] tmp = (uint16_t *) huart->pRxBuffPtr ; - 800383e: 687b ldr r3, [r7, #4] - 8003840: 6d5b ldr r3, [r3, #84] ; 0x54 - 8003842: 60bb str r3, [r7, #8] + 8003896: 687b ldr r3, [r7, #4] + 8003898: 6d5b ldr r3, [r3, #84] ; 0x54 + 800389a: 60bb str r3, [r7, #8] *tmp = (uint16_t)(uhdata & uhMask); - 8003844: 89ba ldrh r2, [r7, #12] - 8003846: 89fb ldrh r3, [r7, #14] - 8003848: 4013 ands r3, r2 - 800384a: b29a uxth r2, r3 - 800384c: 68bb ldr r3, [r7, #8] - 800384e: 801a strh r2, [r3, #0] + 800389c: 89ba ldrh r2, [r7, #12] + 800389e: 89fb ldrh r3, [r7, #14] + 80038a0: 4013 ands r3, r2 + 80038a2: b29a uxth r2, r3 + 80038a4: 68bb ldr r3, [r7, #8] + 80038a6: 801a strh r2, [r3, #0] huart->pRxBuffPtr += 2U; - 8003850: 687b ldr r3, [r7, #4] - 8003852: 6d5b ldr r3, [r3, #84] ; 0x54 - 8003854: 1c9a adds r2, r3, #2 - 8003856: 687b ldr r3, [r7, #4] - 8003858: 655a str r2, [r3, #84] ; 0x54 + 80038a8: 687b ldr r3, [r7, #4] + 80038aa: 6d5b ldr r3, [r3, #84] ; 0x54 + 80038ac: 1c9a adds r2, r3, #2 + 80038ae: 687b ldr r3, [r7, #4] + 80038b0: 655a str r2, [r3, #84] ; 0x54 huart->RxXferCount--; - 800385a: 687b ldr r3, [r7, #4] - 800385c: f8b3 305a ldrh.w r3, [r3, #90] ; 0x5a - 8003860: b29b uxth r3, r3 - 8003862: 3b01 subs r3, #1 - 8003864: b29a uxth r2, r3 - 8003866: 687b ldr r3, [r7, #4] - 8003868: f8a3 205a strh.w r2, [r3, #90] ; 0x5a + 80038b2: 687b ldr r3, [r7, #4] + 80038b4: f8b3 305a ldrh.w r3, [r3, #90] ; 0x5a + 80038b8: b29b uxth r3, r3 + 80038ba: 3b01 subs r3, #1 + 80038bc: b29a uxth r2, r3 + 80038be: 687b ldr r3, [r7, #4] + 80038c0: f8a3 205a strh.w r2, [r3, #90] ; 0x5a if (huart->RxXferCount == 0U) - 800386c: 687b ldr r3, [r7, #4] - 800386e: f8b3 305a ldrh.w r3, [r3, #90] ; 0x5a - 8003872: b29b uxth r3, r3 - 8003874: 2b00 cmp r3, #0 - 8003876: d121 bne.n 80038bc + 80038c4: 687b ldr r3, [r7, #4] + 80038c6: f8b3 305a ldrh.w r3, [r3, #90] ; 0x5a + 80038ca: b29b uxth r3, r3 + 80038cc: 2b00 cmp r3, #0 + 80038ce: d121 bne.n 8003914 { /* Disable the UART Parity Error Interrupt and RXNE interrupt*/ CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); - 8003878: 687b ldr r3, [r7, #4] - 800387a: 681b ldr r3, [r3, #0] - 800387c: 681a ldr r2, [r3, #0] - 800387e: 687b ldr r3, [r7, #4] - 8003880: 681b ldr r3, [r3, #0] - 8003882: f422 7290 bic.w r2, r2, #288 ; 0x120 - 8003886: 601a str r2, [r3, #0] + 80038d0: 687b ldr r3, [r7, #4] + 80038d2: 681b ldr r3, [r3, #0] + 80038d4: 681a ldr r2, [r3, #0] + 80038d6: 687b ldr r3, [r7, #4] + 80038d8: 681b ldr r3, [r3, #0] + 80038da: f422 7290 bic.w r2, r2, #288 ; 0x120 + 80038de: 601a str r2, [r3, #0] /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 8003888: 687b ldr r3, [r7, #4] - 800388a: 681b ldr r3, [r3, #0] - 800388c: 689a ldr r2, [r3, #8] - 800388e: 687b ldr r3, [r7, #4] - 8003890: 681b ldr r3, [r3, #0] - 8003892: f022 0201 bic.w r2, r2, #1 - 8003896: 609a str r2, [r3, #8] + 80038e0: 687b ldr r3, [r7, #4] + 80038e2: 681b ldr r3, [r3, #0] + 80038e4: 689a ldr r2, [r3, #8] + 80038e6: 687b ldr r3, [r7, #4] + 80038e8: 681b ldr r3, [r3, #0] + 80038ea: f022 0201 bic.w r2, r2, #1 + 80038ee: 609a str r2, [r3, #8] /* Rx process is completed, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; - 8003898: 687b ldr r3, [r7, #4] - 800389a: 2220 movs r2, #32 - 800389c: 679a str r2, [r3, #120] ; 0x78 + 80038f0: 687b ldr r3, [r7, #4] + 80038f2: 2220 movs r2, #32 + 80038f4: 679a str r2, [r3, #120] ; 0x78 /* Clear RxISR function pointer */ huart->RxISR = NULL; - 800389e: 687b ldr r3, [r7, #4] - 80038a0: 2200 movs r2, #0 - 80038a2: 661a str r2, [r3, #96] ; 0x60 + 80038f6: 687b ldr r3, [r7, #4] + 80038f8: 2200 movs r2, #0 + 80038fa: 661a str r2, [r3, #96] ; 0x60 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx complete callback*/ huart->RxCpltCallback(huart); #else /*Call legacy weak Rx complete callback*/ HAL_UART_RxCpltCallback(huart); - 80038a4: 6878 ldr r0, [r7, #4] - 80038a6: f7fc ffb1 bl 800080c + 80038fc: 6878 ldr r0, [r7, #4] + 80038fe: f7fc ff8b bl 8000818 else { /* Clear RXNE interrupt flag */ __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); } } - 80038aa: e007 b.n 80038bc + 8003902: e007 b.n 8003914 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); - 80038ac: 687b ldr r3, [r7, #4] - 80038ae: 681b ldr r3, [r3, #0] - 80038b0: 699a ldr r2, [r3, #24] - 80038b2: 687b ldr r3, [r7, #4] - 80038b4: 681b ldr r3, [r3, #0] - 80038b6: f042 0208 orr.w r2, r2, #8 - 80038ba: 619a str r2, [r3, #24] + 8003904: 687b ldr r3, [r7, #4] + 8003906: 681b ldr r3, [r3, #0] + 8003908: 699a ldr r2, [r3, #24] + 800390a: 687b ldr r3, [r7, #4] + 800390c: 681b ldr r3, [r3, #0] + 800390e: f042 0208 orr.w r2, r2, #8 + 8003912: 619a str r2, [r3, #24] } - 80038bc: bf00 nop - 80038be: 3710 adds r7, #16 - 80038c0: 46bd mov sp, r7 - 80038c2: bd80 pop {r7, pc} - -080038c4 <__libc_init_array>: - 80038c4: b570 push {r4, r5, r6, lr} - 80038c6: 4e0d ldr r6, [pc, #52] ; (80038fc <__libc_init_array+0x38>) - 80038c8: 4c0d ldr r4, [pc, #52] ; (8003900 <__libc_init_array+0x3c>) - 80038ca: 1ba4 subs r4, r4, r6 - 80038cc: 10a4 asrs r4, r4, #2 - 80038ce: 2500 movs r5, #0 - 80038d0: 42a5 cmp r5, r4 - 80038d2: d109 bne.n 80038e8 <__libc_init_array+0x24> - 80038d4: 4e0b ldr r6, [pc, #44] ; (8003904 <__libc_init_array+0x40>) - 80038d6: 4c0c ldr r4, [pc, #48] ; (8003908 <__libc_init_array+0x44>) - 80038d8: f000 f820 bl 800391c <_init> - 80038dc: 1ba4 subs r4, r4, r6 - 80038de: 10a4 asrs r4, r4, #2 - 80038e0: 2500 movs r5, #0 - 80038e2: 42a5 cmp r5, r4 - 80038e4: d105 bne.n 80038f2 <__libc_init_array+0x2e> - 80038e6: bd70 pop {r4, r5, r6, pc} - 80038e8: f856 3025 ldr.w r3, [r6, r5, lsl #2] - 80038ec: 4798 blx r3 - 80038ee: 3501 adds r5, #1 - 80038f0: e7ee b.n 80038d0 <__libc_init_array+0xc> - 80038f2: f856 3025 ldr.w r3, [r6, r5, lsl #2] - 80038f6: 4798 blx r3 - 80038f8: 3501 adds r5, #1 - 80038fa: e7f2 b.n 80038e2 <__libc_init_array+0x1e> - 80038fc: 08003954 .word 0x08003954 - 8003900: 08003954 .word 0x08003954 - 8003904: 08003954 .word 0x08003954 - 8003908: 08003958 .word 0x08003958 - -0800390c : - 800390c: 4402 add r2, r0 - 800390e: 4603 mov r3, r0 - 8003910: 4293 cmp r3, r2 - 8003912: d100 bne.n 8003916 - 8003914: 4770 bx lr - 8003916: f803 1b01 strb.w r1, [r3], #1 - 800391a: e7f9 b.n 8003910 - -0800391c <_init>: - 800391c: b5f8 push {r3, r4, r5, r6, r7, lr} - 800391e: bf00 nop - 8003920: bcf8 pop {r3, r4, r5, r6, r7} - 8003922: bc08 pop {r3} - 8003924: 469e mov lr, r3 - 8003926: 4770 bx lr - -08003928 <_fini>: - 8003928: b5f8 push {r3, r4, r5, r6, r7, lr} - 800392a: bf00 nop - 800392c: bcf8 pop {r3, r4, r5, r6, r7} - 800392e: bc08 pop {r3} - 8003930: 469e mov lr, r3 - 8003932: 4770 bx lr + 8003914: bf00 nop + 8003916: 3710 adds r7, #16 + 8003918: 46bd mov sp, r7 + 800391a: bd80 pop {r7, pc} + +0800391c <__libc_init_array>: + 800391c: b570 push {r4, r5, r6, lr} + 800391e: 4e0d ldr r6, [pc, #52] ; (8003954 <__libc_init_array+0x38>) + 8003920: 4c0d ldr r4, [pc, #52] ; (8003958 <__libc_init_array+0x3c>) + 8003922: 1ba4 subs r4, r4, r6 + 8003924: 10a4 asrs r4, r4, #2 + 8003926: 2500 movs r5, #0 + 8003928: 42a5 cmp r5, r4 + 800392a: d109 bne.n 8003940 <__libc_init_array+0x24> + 800392c: 4e0b ldr r6, [pc, #44] ; (800395c <__libc_init_array+0x40>) + 800392e: 4c0c ldr r4, [pc, #48] ; (8003960 <__libc_init_array+0x44>) + 8003930: f000 f820 bl 8003974 <_init> + 8003934: 1ba4 subs r4, r4, r6 + 8003936: 10a4 asrs r4, r4, #2 + 8003938: 2500 movs r5, #0 + 800393a: 42a5 cmp r5, r4 + 800393c: d105 bne.n 800394a <__libc_init_array+0x2e> + 800393e: bd70 pop {r4, r5, r6, pc} + 8003940: f856 3025 ldr.w r3, [r6, r5, lsl #2] + 8003944: 4798 blx r3 + 8003946: 3501 adds r5, #1 + 8003948: e7ee b.n 8003928 <__libc_init_array+0xc> + 800394a: f856 3025 ldr.w r3, [r6, r5, lsl #2] + 800394e: 4798 blx r3 + 8003950: 3501 adds r5, #1 + 8003952: e7f2 b.n 800393a <__libc_init_array+0x1e> + 8003954: 080039ac .word 0x080039ac + 8003958: 080039ac .word 0x080039ac + 800395c: 080039ac .word 0x080039ac + 8003960: 080039b0 .word 0x080039b0 + +08003964 : + 8003964: 4402 add r2, r0 + 8003966: 4603 mov r3, r0 + 8003968: 4293 cmp r3, r2 + 800396a: d100 bne.n 800396e + 800396c: 4770 bx lr + 800396e: f803 1b01 strb.w r1, [r3], #1 + 8003972: e7f9 b.n 8003968 + +08003974 <_init>: + 8003974: b5f8 push {r3, r4, r5, r6, r7, lr} + 8003976: bf00 nop + 8003978: bcf8 pop {r3, r4, r5, r6, r7} + 800397a: bc08 pop {r3} + 800397c: 469e mov lr, r3 + 800397e: 4770 bx lr + +08003980 <_fini>: + 8003980: b5f8 push {r3, r4, r5, r6, r7, lr} + 8003982: bf00 nop + 8003984: bcf8 pop {r3, r4, r5, r6, r7} + 8003986: bc08 pop {r3} + 8003988: 469e mov lr, r3 + 800398a: 4770 bx lr -- 2.52.0