From 4818a250cd5b5611b80a18724f6cecc8a527629f Mon Sep 17 00:00:00 2001 From: Federica Di Lauro Date: Fri, 22 Nov 2019 13:02:51 +0100 Subject: [PATCH] rosserial works, testing odometry --- otto_controller_source/.cproject | 310 +- otto_controller_source/.mxproject | 21 +- otto_controller_source/.project | 3 + .../.settings/language.settings.xml | 4 +- .../org.eclipse.cdt.codan.core.prefs | 56 + .../.settings/org.eclipse.cdt.core.prefs | 167 - .../.settings/org.eclipse.cdt.ui.prefs | 3 - .../.settings/org.eclipse.core.runtime.prefs | 2 +- .../{ => Core}/Inc/STM32Hardware.h | 4 +- .../{ => Core}/Inc/actionlib/TestAction.h | 0 .../Inc/actionlib/TestActionFeedback.h | 0 .../{ => Core}/Inc/actionlib/TestActionGoal.h | 0 .../Inc/actionlib/TestActionResult.h | 0 .../{ => Core}/Inc/actionlib/TestFeedback.h | 0 .../{ => Core}/Inc/actionlib/TestGoal.h | 0 .../Inc/actionlib/TestRequestAction.h | 0 .../Inc/actionlib/TestRequestActionFeedback.h | 0 .../Inc/actionlib/TestRequestActionGoal.h | 0 .../Inc/actionlib/TestRequestActionResult.h | 0 .../Inc/actionlib/TestRequestFeedback.h | 0 .../Inc/actionlib/TestRequestGoal.h | 0 .../Inc/actionlib/TestRequestResult.h | 0 .../{ => Core}/Inc/actionlib/TestResult.h | 0 .../{ => Core}/Inc/actionlib/TwoIntsAction.h | 0 .../Inc/actionlib/TwoIntsActionFeedback.h | 0 .../Inc/actionlib/TwoIntsActionGoal.h | 0 .../Inc/actionlib/TwoIntsActionResult.h | 0 .../Inc/actionlib/TwoIntsFeedback.h | 0 .../{ => Core}/Inc/actionlib/TwoIntsGoal.h | 0 .../{ => Core}/Inc/actionlib/TwoIntsResult.h | 0 .../{ => Core}/Inc/actionlib_msgs/GoalID.h | 0 .../Inc/actionlib_msgs/GoalStatus.h | 0 .../Inc/actionlib_msgs/GoalStatusArray.h | 0 .../Inc/actionlib_tutorials/AveragingAction.h | 0 .../AveragingActionFeedback.h | 0 .../actionlib_tutorials/AveragingActionGoal.h | 0 .../AveragingActionResult.h | 0 .../actionlib_tutorials/AveragingFeedback.h | 0 .../Inc/actionlib_tutorials/AveragingGoal.h | 0 .../Inc/actionlib_tutorials/AveragingResult.h | 0 .../Inc/actionlib_tutorials/FibonacciAction.h | 0 .../FibonacciActionFeedback.h | 0 .../actionlib_tutorials/FibonacciActionGoal.h | 0 .../FibonacciActionResult.h | 0 .../actionlib_tutorials/FibonacciFeedback.h | 0 .../Inc/actionlib_tutorials/FibonacciGoal.h | 0 .../Inc/actionlib_tutorials/FibonacciResult.h | 0 .../{ => Core}/Inc/bond/Constants.h | 0 .../{ => Core}/Inc/bond/Status.h | 0 .../FollowJointTrajectoryAction.h | 0 .../FollowJointTrajectoryActionFeedback.h | 0 .../FollowJointTrajectoryActionGoal.h | 0 .../FollowJointTrajectoryActionResult.h | 0 .../FollowJointTrajectoryFeedback.h | 0 .../control_msgs/FollowJointTrajectoryGoal.h | 0 .../FollowJointTrajectoryResult.h | 0 .../Inc/control_msgs/GripperCommand.h | 0 .../Inc/control_msgs/GripperCommandAction.h | 0 .../GripperCommandActionFeedback.h | 0 .../control_msgs/GripperCommandActionGoal.h | 0 .../control_msgs/GripperCommandActionResult.h | 0 .../Inc/control_msgs/GripperCommandFeedback.h | 0 .../Inc/control_msgs/GripperCommandGoal.h | 0 .../Inc/control_msgs/GripperCommandResult.h | 0 .../Inc/control_msgs/JointControllerState.h | 0 .../{ => Core}/Inc/control_msgs/JointJog.h | 0 .../Inc/control_msgs/JointTolerance.h | 0 .../Inc/control_msgs/JointTrajectoryAction.h | 0 .../JointTrajectoryActionFeedback.h | 0 .../control_msgs/JointTrajectoryActionGoal.h | 0 .../JointTrajectoryActionResult.h | 0 .../JointTrajectoryControllerState.h | 0 .../control_msgs/JointTrajectoryFeedback.h | 0 .../Inc/control_msgs/JointTrajectoryGoal.h | 0 .../Inc/control_msgs/JointTrajectoryResult.h | 0 .../{ => Core}/Inc/control_msgs/PidState.h | 0 .../Inc/control_msgs/PointHeadAction.h | 0 .../control_msgs/PointHeadActionFeedback.h | 0 .../Inc/control_msgs/PointHeadActionGoal.h | 0 .../Inc/control_msgs/PointHeadActionResult.h | 0 .../Inc/control_msgs/PointHeadFeedback.h | 0 .../Inc/control_msgs/PointHeadGoal.h | 0 .../Inc/control_msgs/PointHeadResult.h | 0 .../Inc/control_msgs/QueryCalibrationState.h | 0 .../Inc/control_msgs/QueryTrajectoryState.h | 0 .../control_msgs/SingleJointPositionAction.h | 0 .../SingleJointPositionActionFeedback.h | 0 .../SingleJointPositionActionGoal.h | 0 .../SingleJointPositionActionResult.h | 0 .../SingleJointPositionFeedback.h | 0 .../control_msgs/SingleJointPositionGoal.h | 0 .../control_msgs/SingleJointPositionResult.h | 0 .../Inc/control_toolbox/SetPidGains.h | 0 .../controller_manager_msgs/ControllerState.h | 0 .../ControllerStatistics.h | 0 .../ControllersStatistics.h | 0 .../HardwareInterfaceResources.h | 0 .../ListControllerTypes.h | 0 .../controller_manager_msgs/ListControllers.h | 0 .../controller_manager_msgs/LoadController.h | 0 .../ReloadControllerLibraries.h | 0 .../SwitchController.h | 0 .../UnloadController.h | 0 .../Inc/diagnostic_msgs/AddDiagnostics.h | 0 .../Inc/diagnostic_msgs/DiagnosticArray.h | 0 .../Inc/diagnostic_msgs/DiagnosticStatus.h | 0 .../{ => Core}/Inc/diagnostic_msgs/KeyValue.h | 0 .../{ => Core}/Inc/diagnostic_msgs/SelfTest.h | 0 .../Inc/dynamic_reconfigure/BoolParameter.h | 0 .../Inc/dynamic_reconfigure/Config.h | 0 .../dynamic_reconfigure/ConfigDescription.h | 0 .../Inc/dynamic_reconfigure/DoubleParameter.h | 0 .../Inc/dynamic_reconfigure/Group.h | 0 .../Inc/dynamic_reconfigure/GroupState.h | 0 .../Inc/dynamic_reconfigure/IntParameter.h | 0 .../dynamic_reconfigure/ParamDescription.h | 0 .../Inc/dynamic_reconfigure/Reconfigure.h | 0 .../Inc/dynamic_reconfigure/SensorLevels.h | 0 .../Inc/dynamic_reconfigure/StrParameter.h | 0 .../{ => Core}/Inc/encoder.h | 3 +- .../Inc/gazebo_msgs/ApplyBodyWrench.h | 0 .../Inc/gazebo_msgs/ApplyJointEffort.h | 0 .../{ => Core}/Inc/gazebo_msgs/BodyRequest.h | 0 .../{ => Core}/Inc/gazebo_msgs/ContactState.h | 0 .../Inc/gazebo_msgs/ContactsState.h | 0 .../{ => Core}/Inc/gazebo_msgs/DeleteLight.h | 0 .../{ => Core}/Inc/gazebo_msgs/DeleteModel.h | 0 .../Inc/gazebo_msgs/GetJointProperties.h | 0 .../Inc/gazebo_msgs/GetLightProperties.h | 0 .../Inc/gazebo_msgs/GetLinkProperties.h | 0 .../{ => Core}/Inc/gazebo_msgs/GetLinkState.h | 0 .../Inc/gazebo_msgs/GetModelProperties.h | 0 .../Inc/gazebo_msgs/GetModelState.h | 0 .../Inc/gazebo_msgs/GetPhysicsProperties.h | 0 .../Inc/gazebo_msgs/GetWorldProperties.h | 0 .../{ => Core}/Inc/gazebo_msgs/JointRequest.h | 0 .../{ => Core}/Inc/gazebo_msgs/LinkState.h | 0 .../{ => Core}/Inc/gazebo_msgs/LinkStates.h | 0 .../{ => Core}/Inc/gazebo_msgs/ModelState.h | 0 .../{ => Core}/Inc/gazebo_msgs/ModelStates.h | 0 .../Inc/gazebo_msgs/ODEJointProperties.h | 0 .../{ => Core}/Inc/gazebo_msgs/ODEPhysics.h | 0 .../Inc/gazebo_msgs/SetJointProperties.h | 0 .../Inc/gazebo_msgs/SetJointTrajectory.h | 0 .../Inc/gazebo_msgs/SetLightProperties.h | 0 .../Inc/gazebo_msgs/SetLinkProperties.h | 0 .../{ => Core}/Inc/gazebo_msgs/SetLinkState.h | 0 .../Inc/gazebo_msgs/SetModelConfiguration.h | 0 .../Inc/gazebo_msgs/SetModelState.h | 0 .../Inc/gazebo_msgs/SetPhysicsProperties.h | 0 .../{ => Core}/Inc/gazebo_msgs/SpawnModel.h | 0 .../{ => Core}/Inc/gazebo_msgs/WorldState.h | 0 .../{ => Core}/Inc/geometry_msgs/Accel.h | 0 .../Inc/geometry_msgs/AccelStamped.h | 0 .../Inc/geometry_msgs/AccelWithCovariance.h | 0 .../AccelWithCovarianceStamped.h | 0 .../{ => Core}/Inc/geometry_msgs/Inertia.h | 0 .../Inc/geometry_msgs/InertiaStamped.h | 0 .../{ => Core}/Inc/geometry_msgs/Point.h | 0 .../{ => Core}/Inc/geometry_msgs/Point32.h | 0 .../Inc/geometry_msgs/PointStamped.h | 0 .../{ => Core}/Inc/geometry_msgs/Polygon.h | 0 .../Inc/geometry_msgs/PolygonStamped.h | 0 .../{ => Core}/Inc/geometry_msgs/Pose.h | 0 .../{ => Core}/Inc/geometry_msgs/Pose2D.h | 0 .../{ => Core}/Inc/geometry_msgs/PoseArray.h | 0 .../Inc/geometry_msgs/PoseStamped.h | 0 .../Inc/geometry_msgs/PoseWithCovariance.h | 0 .../geometry_msgs/PoseWithCovarianceStamped.h | 0 .../{ => Core}/Inc/geometry_msgs/Quaternion.h | 0 .../Inc/geometry_msgs/QuaternionStamped.h | 0 .../{ => Core}/Inc/geometry_msgs/Transform.h | 0 .../Inc/geometry_msgs/TransformStamped.h | 0 .../{ => Core}/Inc/geometry_msgs/Twist.h | 0 .../Inc/geometry_msgs/TwistStamped.h | 0 .../Inc/geometry_msgs/TwistWithCovariance.h | 0 .../TwistWithCovarianceStamped.h | 0 .../{ => Core}/Inc/geometry_msgs/Vector3.h | 0 .../Inc/geometry_msgs/Vector3Stamped.h | 0 .../{ => Core}/Inc/geometry_msgs/Wrench.h | 0 .../Inc/geometry_msgs/WrenchStamped.h | 0 .../Inc/laser_assembler/AssembleScans.h | 0 .../Inc/laser_assembler/AssembleScans2.h | 0 otto_controller_source/{ => Core}/Inc/main.h | 32 +- .../{ => Core}/Inc/map_msgs/GetMapROI.h | 0 .../{ => Core}/Inc/map_msgs/GetPointMap.h | 0 .../{ => Core}/Inc/map_msgs/GetPointMapROI.h | 0 .../Inc/map_msgs/OccupancyGridUpdate.h | 0 .../Inc/map_msgs/PointCloud2Update.h | 0 .../{ => Core}/Inc/map_msgs/ProjectedMap.h | 0 .../Inc/map_msgs/ProjectedMapInfo.h | 0 .../Inc/map_msgs/ProjectedMapsInfo.h | 0 .../{ => Core}/Inc/map_msgs/SaveMap.h | 0 .../Inc/map_msgs/SetMapProjections.h | 0 .../{ => Core}/Inc/nav_msgs/GetMap.h | 0 .../{ => Core}/Inc/nav_msgs/GetMapAction.h | 0 .../Inc/nav_msgs/GetMapActionFeedback.h | 0 .../Inc/nav_msgs/GetMapActionGoal.h | 0 .../Inc/nav_msgs/GetMapActionResult.h | 0 .../{ => Core}/Inc/nav_msgs/GetMapFeedback.h | 0 .../{ => Core}/Inc/nav_msgs/GetMapGoal.h | 0 .../{ => Core}/Inc/nav_msgs/GetMapResult.h | 0 .../{ => Core}/Inc/nav_msgs/GetPlan.h | 0 .../{ => Core}/Inc/nav_msgs/GridCells.h | 0 .../{ => Core}/Inc/nav_msgs/MapMetaData.h | 0 .../{ => Core}/Inc/nav_msgs/OccupancyGrid.h | 0 .../{ => Core}/Inc/nav_msgs/Odometry.h | 0 .../{ => Core}/Inc/nav_msgs/Path.h | 0 .../{ => Core}/Inc/nav_msgs/SetMap.h | 0 .../{ => Core}/Inc/nodelet/NodeletList.h | 0 .../{ => Core}/Inc/nodelet/NodeletLoad.h | 0 .../{ => Core}/Inc/nodelet/NodeletUnload.h | 0 .../{ => Core}/Inc/odometry_calc.h | 8 +- .../Inc/pcl_msgs/ModelCoefficients.h | 0 .../{ => Core}/Inc/pcl_msgs/PointIndices.h | 0 .../{ => Core}/Inc/pcl_msgs/PolygonMesh.h | 0 .../{ => Core}/Inc/pcl_msgs/Vertices.h | 0 .../Inc/polled_camera/GetPolledImage.h | 0 otto_controller_source/{ => Core}/Inc/ros.h | 0 .../{ => Core}/Inc/ros/duration.h | 0 .../{ => Core}/Inc/ros/msg.h | 0 .../{ => Core}/Inc/ros/node_handle.h | 0 .../{ => Core}/Inc/ros/publisher.h | 0 .../{ => Core}/Inc/ros/service_client.h | 0 .../{ => Core}/Inc/ros/service_server.h | 0 .../{ => Core}/Inc/ros/subscriber.h | 0 .../{ => Core}/Inc/ros/time.h | 0 .../{ => Core}/Inc/roscpp/Empty.h | 0 .../{ => Core}/Inc/roscpp/GetLoggers.h | 0 .../{ => Core}/Inc/roscpp/Logger.h | 0 .../{ => Core}/Inc/roscpp/SetLoggerLevel.h | 0 .../{ => Core}/Inc/roscpp_tutorials/TwoInts.h | 0 .../{ => Core}/Inc/rosgraph_msgs/Clock.h | 0 .../{ => Core}/Inc/rosgraph_msgs/Log.h | 0 .../Inc/rosgraph_msgs/TopicStatistics.h | 0 .../Inc/rospy_tutorials/AddTwoInts.h | 0 .../Inc/rospy_tutorials/BadTwoInts.h | 0 .../{ => Core}/Inc/rospy_tutorials/Floats.h | 0 .../Inc/rospy_tutorials/HeaderString.h | 0 .../{ => Core}/Inc/rosserial_msgs/Log.h | 0 .../Inc/rosserial_msgs/RequestMessageInfo.h | 0 .../Inc/rosserial_msgs/RequestParam.h | 0 .../Inc/rosserial_msgs/RequestServiceInfo.h | 0 .../{ => Core}/Inc/rosserial_msgs/TopicInfo.h | 0 .../{ => Core}/Inc/sensor_msgs/BatteryState.h | 0 .../{ => Core}/Inc/sensor_msgs/CameraInfo.h | 0 .../Inc/sensor_msgs/ChannelFloat32.h | 0 .../Inc/sensor_msgs/CompressedImage.h | 0 .../Inc/sensor_msgs/FluidPressure.h | 0 .../{ => Core}/Inc/sensor_msgs/Illuminance.h | 0 .../{ => Core}/Inc/sensor_msgs/Image.h | 0 .../{ => Core}/Inc/sensor_msgs/Imu.h | 0 .../{ => Core}/Inc/sensor_msgs/JointState.h | 0 .../{ => Core}/Inc/sensor_msgs/Joy.h | 0 .../{ => Core}/Inc/sensor_msgs/JoyFeedback.h | 0 .../Inc/sensor_msgs/JoyFeedbackArray.h | 0 .../{ => Core}/Inc/sensor_msgs/LaserEcho.h | 0 .../{ => Core}/Inc/sensor_msgs/LaserScan.h | 0 .../Inc/sensor_msgs/MagneticField.h | 0 .../Inc/sensor_msgs/MultiDOFJointState.h | 0 .../Inc/sensor_msgs/MultiEchoLaserScan.h | 0 .../{ => Core}/Inc/sensor_msgs/NavSatFix.h | 0 .../{ => Core}/Inc/sensor_msgs/NavSatStatus.h | 0 .../{ => Core}/Inc/sensor_msgs/PointCloud.h | 0 .../{ => Core}/Inc/sensor_msgs/PointCloud2.h | 0 .../{ => Core}/Inc/sensor_msgs/PointField.h | 0 .../{ => Core}/Inc/sensor_msgs/Range.h | 0 .../Inc/sensor_msgs/RegionOfInterest.h | 0 .../Inc/sensor_msgs/RelativeHumidity.h | 0 .../Inc/sensor_msgs/SetCameraInfo.h | 0 .../{ => Core}/Inc/sensor_msgs/Temperature.h | 0 .../Inc/sensor_msgs/TimeReference.h | 0 .../{ => Core}/Inc/shape_msgs/Mesh.h | 0 .../{ => Core}/Inc/shape_msgs/MeshTriangle.h | 0 .../{ => Core}/Inc/shape_msgs/Plane.h | 0 .../Inc/shape_msgs/SolidPrimitive.h | 0 .../SmachContainerInitialStatusCmd.h | 0 .../Inc/smach_msgs/SmachContainerStatus.h | 0 .../Inc/smach_msgs/SmachContainerStructure.h | 0 .../{ => Core}/Inc/std_msgs/Bool.h | 0 .../{ => Core}/Inc/std_msgs/Byte.h | 0 .../{ => Core}/Inc/std_msgs/ByteMultiArray.h | 0 .../{ => Core}/Inc/std_msgs/Char.h | 0 .../{ => Core}/Inc/std_msgs/ColorRGBA.h | 0 .../{ => Core}/Inc/std_msgs/Duration.h | 0 .../{ => Core}/Inc/std_msgs/Empty.h | 0 .../{ => Core}/Inc/std_msgs/Float32.h | 0 .../Inc/std_msgs/Float32MultiArray.h | 0 .../{ => Core}/Inc/std_msgs/Float64.h | 0 .../Inc/std_msgs/Float64MultiArray.h | 0 .../{ => Core}/Inc/std_msgs/Header.h | 0 .../{ => Core}/Inc/std_msgs/Int16.h | 0 .../{ => Core}/Inc/std_msgs/Int16MultiArray.h | 0 .../{ => Core}/Inc/std_msgs/Int32.h | 0 .../{ => Core}/Inc/std_msgs/Int32MultiArray.h | 0 .../{ => Core}/Inc/std_msgs/Int64.h | 0 .../{ => Core}/Inc/std_msgs/Int64MultiArray.h | 0 .../{ => Core}/Inc/std_msgs/Int8.h | 0 .../{ => Core}/Inc/std_msgs/Int8MultiArray.h | 0 .../Inc/std_msgs/MultiArrayDimension.h | 0 .../Inc/std_msgs/MultiArrayLayout.h | 0 .../{ => Core}/Inc/std_msgs/String.h | 0 .../{ => Core}/Inc/std_msgs/Time.h | 0 .../{ => Core}/Inc/std_msgs/UInt16.h | 0 .../Inc/std_msgs/UInt16MultiArray.h | 0 .../{ => Core}/Inc/std_msgs/UInt32.h | 0 .../Inc/std_msgs/UInt32MultiArray.h | 0 .../{ => Core}/Inc/std_msgs/UInt64.h | 0 .../Inc/std_msgs/UInt64MultiArray.h | 0 .../{ => Core}/Inc/std_msgs/UInt8.h | 0 .../{ => Core}/Inc/std_msgs/UInt8MultiArray.h | 0 .../{ => Core}/Inc/std_srvs/Empty.h | 0 .../{ => Core}/Inc/std_srvs/SetBool.h | 0 .../{ => Core}/Inc/std_srvs/Trigger.h | 0 .../Inc/stereo_msgs/DisparityImage.h | 0 .../{ => Core}/Inc/stm32f7xx_hal_conf.h | 0 .../{ => Core}/Inc/stm32f7xx_it.h | 1 + .../{ => Core}/Inc/tf/FrameGraph.h | 0 otto_controller_source/{ => Core}/Inc/tf/tf.h | 0 .../{ => Core}/Inc/tf/tfMessage.h | 0 .../{ => Core}/Inc/tf/transform_broadcaster.h | 0 .../{ => Core}/Inc/tf2_msgs/FrameGraph.h | 0 .../Inc/tf2_msgs/LookupTransformAction.h | 0 .../tf2_msgs/LookupTransformActionFeedback.h | 0 .../Inc/tf2_msgs/LookupTransformActionGoal.h | 0 .../tf2_msgs/LookupTransformActionResult.h | 0 .../Inc/tf2_msgs/LookupTransformFeedback.h | 0 .../Inc/tf2_msgs/LookupTransformGoal.h | 0 .../Inc/tf2_msgs/LookupTransformResult.h | 0 .../{ => Core}/Inc/tf2_msgs/TF2Error.h | 0 .../{ => Core}/Inc/tf2_msgs/TFMessage.h | 0 .../Inc/theora_image_transport/Packet.h | 0 .../{ => Core}/Inc/topic_tools/DemuxAdd.h | 0 .../{ => Core}/Inc/topic_tools/DemuxDelete.h | 0 .../{ => Core}/Inc/topic_tools/DemuxList.h | 0 .../{ => Core}/Inc/topic_tools/DemuxSelect.h | 0 .../{ => Core}/Inc/topic_tools/MuxAdd.h | 0 .../{ => Core}/Inc/topic_tools/MuxDelete.h | 0 .../{ => Core}/Inc/topic_tools/MuxList.h | 0 .../{ => Core}/Inc/topic_tools/MuxSelect.h | 0 .../Inc/trajectory_msgs/JointTrajectory.h | 0 .../trajectory_msgs/JointTrajectoryPoint.h | 0 .../trajectory_msgs/MultiDOFJointTrajectory.h | 0 .../MultiDOFJointTrajectoryPoint.h | 0 .../Inc/turtle_actionlib/ShapeAction.h | 0 .../turtle_actionlib/ShapeActionFeedback.h | 0 .../Inc/turtle_actionlib/ShapeActionGoal.h | 0 .../Inc/turtle_actionlib/ShapeActionResult.h | 0 .../Inc/turtle_actionlib/ShapeFeedback.h | 0 .../Inc/turtle_actionlib/ShapeGoal.h | 0 .../Inc/turtle_actionlib/ShapeResult.h | 0 .../Inc/turtle_actionlib/Velocity.h | 0 .../{ => Core}/Inc/turtlesim/Color.h | 0 .../{ => Core}/Inc/turtlesim/Kill.h | 0 .../{ => Core}/Inc/turtlesim/Pose.h | 0 .../{ => Core}/Inc/turtlesim/SetPen.h | 0 .../{ => Core}/Inc/turtlesim/Spawn.h | 0 .../Inc/turtlesim/TeleportAbsolute.h | 0 .../Inc/turtlesim/TeleportRelative.h | 0 .../Inc/visualization_msgs/ImageMarker.h | 0 .../visualization_msgs/InteractiveMarker.h | 0 .../InteractiveMarkerControl.h | 0 .../InteractiveMarkerFeedback.h | 0 .../InteractiveMarkerInit.h | 0 .../InteractiveMarkerPose.h | 0 .../InteractiveMarkerUpdate.h | 0 .../Inc/visualization_msgs/Marker.h | 0 .../Inc/visualization_msgs/MarkerArray.h | 0 .../Inc/visualization_msgs/MenuEntry.h | 0 .../{ => Core}/Src/duration.cpp | 0 .../{ => Core}/Src/encoder.cpp | 0 otto_controller_source/Core/Src/main.cpp | 618 + .../{ => Core}/Src/odometry_calc.cpp | 3 - .../{ => Core}/Src/stm32f7xx_hal_msp.c | 42 +- .../{ => Core}/Src/stm32f7xx_it.c | 15 + .../{ => Core}/Src/syscalls.c | 0 .../{ => Core}/Src/sysmem.c | 0 .../{ => Core}/Src/system_stm32f7xx.c | 0 .../{ => Core}/Src/time.cpp | 0 .../Startup/startup_stm32f767zitx.s | 0 .../Debug/Core/Src/subdir.mk | 68 + .../Debug/Core/Startup/subdir.mk | 16 + .../STM32F7xx_HAL_Driver/Src/subdir.mk | 36 +- otto_controller_source/Debug/Src/subdir.mk | 68 - otto_controller_source/Debug/makefile | 4 +- otto_controller_source/Debug/objects.list | 22 +- .../Debug/otto_controller_source.list | 44999 ++++++++-------- otto_controller_source/Debug/sources.mk | 4 +- .../Debug/st-link_gdbserver_log.txt | 3434 -- .../Release/Core/Src/subdir.mk | 68 + .../{Debug => Release/Core}/Startup/subdir.mk | 8 +- .../STM32F7xx_HAL_Driver/Src/subdir.mk | 104 + otto_controller_source/Release/makefile | 80 + otto_controller_source/Release/objects.list | 29 + otto_controller_source/Release/objects.mk | 8 + .../Release/otto_controller_source.list | 14742 +++++ otto_controller_source/Release/sources.mk | 32 + otto_controller_source/STM32F767ZITX_FLASH.ld | 16 +- otto_controller_source/STM32F767ZITX_RAM.ld | 16 +- otto_controller_source/Src/main.cpp | 604 - .../otto_controller_source Debug.cfg | 40 - .../otto_controller_source Debug.launch | 28 +- .../otto_controller_source.elf.cfg | 31 - .../otto_controller_source.ioc | 106 +- 404 files changed, 38633 insertions(+), 27222 deletions(-) create mode 100644 otto_controller_source/.settings/org.eclipse.cdt.codan.core.prefs delete mode 100644 otto_controller_source/.settings/org.eclipse.cdt.core.prefs delete mode 100644 otto_controller_source/.settings/org.eclipse.cdt.ui.prefs rename otto_controller_source/{ => Core}/Inc/STM32Hardware.h (97%) rename otto_controller_source/{ => Core}/Inc/actionlib/TestAction.h (100%) rename otto_controller_source/{ => Core}/Inc/actionlib/TestActionFeedback.h (100%) rename otto_controller_source/{ => Core}/Inc/actionlib/TestActionGoal.h (100%) rename otto_controller_source/{ => Core}/Inc/actionlib/TestActionResult.h (100%) rename otto_controller_source/{ => Core}/Inc/actionlib/TestFeedback.h (100%) rename otto_controller_source/{ => Core}/Inc/actionlib/TestGoal.h (100%) rename otto_controller_source/{ => Core}/Inc/actionlib/TestRequestAction.h (100%) rename otto_controller_source/{ => Core}/Inc/actionlib/TestRequestActionFeedback.h (100%) rename otto_controller_source/{ => Core}/Inc/actionlib/TestRequestActionGoal.h (100%) rename otto_controller_source/{ => Core}/Inc/actionlib/TestRequestActionResult.h (100%) rename otto_controller_source/{ => Core}/Inc/actionlib/TestRequestFeedback.h (100%) rename otto_controller_source/{ => Core}/Inc/actionlib/TestRequestGoal.h (100%) rename otto_controller_source/{ => Core}/Inc/actionlib/TestRequestResult.h (100%) rename otto_controller_source/{ => Core}/Inc/actionlib/TestResult.h (100%) rename otto_controller_source/{ => Core}/Inc/actionlib/TwoIntsAction.h (100%) rename otto_controller_source/{ => Core}/Inc/actionlib/TwoIntsActionFeedback.h (100%) rename otto_controller_source/{ => Core}/Inc/actionlib/TwoIntsActionGoal.h (100%) rename otto_controller_source/{ => Core}/Inc/actionlib/TwoIntsActionResult.h (100%) rename otto_controller_source/{ => Core}/Inc/actionlib/TwoIntsFeedback.h (100%) rename otto_controller_source/{ => Core}/Inc/actionlib/TwoIntsGoal.h (100%) rename otto_controller_source/{ => Core}/Inc/actionlib/TwoIntsResult.h (100%) rename otto_controller_source/{ => Core}/Inc/actionlib_msgs/GoalID.h (100%) rename otto_controller_source/{ => Core}/Inc/actionlib_msgs/GoalStatus.h (100%) rename otto_controller_source/{ => Core}/Inc/actionlib_msgs/GoalStatusArray.h (100%) rename otto_controller_source/{ => Core}/Inc/actionlib_tutorials/AveragingAction.h (100%) rename otto_controller_source/{ => Core}/Inc/actionlib_tutorials/AveragingActionFeedback.h (100%) rename otto_controller_source/{ => Core}/Inc/actionlib_tutorials/AveragingActionGoal.h (100%) rename otto_controller_source/{ => Core}/Inc/actionlib_tutorials/AveragingActionResult.h (100%) rename otto_controller_source/{ => Core}/Inc/actionlib_tutorials/AveragingFeedback.h (100%) rename otto_controller_source/{ => Core}/Inc/actionlib_tutorials/AveragingGoal.h (100%) rename otto_controller_source/{ => Core}/Inc/actionlib_tutorials/AveragingResult.h (100%) rename otto_controller_source/{ => Core}/Inc/actionlib_tutorials/FibonacciAction.h (100%) rename otto_controller_source/{ => Core}/Inc/actionlib_tutorials/FibonacciActionFeedback.h (100%) rename otto_controller_source/{ => Core}/Inc/actionlib_tutorials/FibonacciActionGoal.h (100%) rename otto_controller_source/{ => Core}/Inc/actionlib_tutorials/FibonacciActionResult.h (100%) rename otto_controller_source/{ => Core}/Inc/actionlib_tutorials/FibonacciFeedback.h (100%) rename otto_controller_source/{ => Core}/Inc/actionlib_tutorials/FibonacciGoal.h (100%) rename otto_controller_source/{ => Core}/Inc/actionlib_tutorials/FibonacciResult.h (100%) rename otto_controller_source/{ => Core}/Inc/bond/Constants.h (100%) rename otto_controller_source/{ => Core}/Inc/bond/Status.h (100%) rename otto_controller_source/{ => Core}/Inc/control_msgs/FollowJointTrajectoryAction.h (100%) rename otto_controller_source/{ => Core}/Inc/control_msgs/FollowJointTrajectoryActionFeedback.h (100%) rename otto_controller_source/{ => Core}/Inc/control_msgs/FollowJointTrajectoryActionGoal.h (100%) rename otto_controller_source/{ => Core}/Inc/control_msgs/FollowJointTrajectoryActionResult.h (100%) rename otto_controller_source/{ => Core}/Inc/control_msgs/FollowJointTrajectoryFeedback.h (100%) rename otto_controller_source/{ => Core}/Inc/control_msgs/FollowJointTrajectoryGoal.h (100%) rename otto_controller_source/{ => Core}/Inc/control_msgs/FollowJointTrajectoryResult.h (100%) rename otto_controller_source/{ => Core}/Inc/control_msgs/GripperCommand.h (100%) rename otto_controller_source/{ => Core}/Inc/control_msgs/GripperCommandAction.h (100%) rename otto_controller_source/{ => Core}/Inc/control_msgs/GripperCommandActionFeedback.h (100%) rename otto_controller_source/{ => Core}/Inc/control_msgs/GripperCommandActionGoal.h (100%) rename otto_controller_source/{ => Core}/Inc/control_msgs/GripperCommandActionResult.h (100%) rename otto_controller_source/{ => Core}/Inc/control_msgs/GripperCommandFeedback.h (100%) rename otto_controller_source/{ => Core}/Inc/control_msgs/GripperCommandGoal.h (100%) rename otto_controller_source/{ => Core}/Inc/control_msgs/GripperCommandResult.h (100%) rename otto_controller_source/{ => Core}/Inc/control_msgs/JointControllerState.h (100%) rename otto_controller_source/{ => Core}/Inc/control_msgs/JointJog.h (100%) rename otto_controller_source/{ => Core}/Inc/control_msgs/JointTolerance.h (100%) rename otto_controller_source/{ => Core}/Inc/control_msgs/JointTrajectoryAction.h (100%) rename otto_controller_source/{ => Core}/Inc/control_msgs/JointTrajectoryActionFeedback.h (100%) rename otto_controller_source/{ => Core}/Inc/control_msgs/JointTrajectoryActionGoal.h (100%) rename otto_controller_source/{ => Core}/Inc/control_msgs/JointTrajectoryActionResult.h (100%) rename otto_controller_source/{ => Core}/Inc/control_msgs/JointTrajectoryControllerState.h (100%) rename otto_controller_source/{ => Core}/Inc/control_msgs/JointTrajectoryFeedback.h (100%) rename otto_controller_source/{ => Core}/Inc/control_msgs/JointTrajectoryGoal.h (100%) rename otto_controller_source/{ => Core}/Inc/control_msgs/JointTrajectoryResult.h (100%) rename otto_controller_source/{ => Core}/Inc/control_msgs/PidState.h (100%) rename otto_controller_source/{ => Core}/Inc/control_msgs/PointHeadAction.h (100%) rename otto_controller_source/{ => Core}/Inc/control_msgs/PointHeadActionFeedback.h (100%) rename otto_controller_source/{ => Core}/Inc/control_msgs/PointHeadActionGoal.h (100%) rename otto_controller_source/{ => Core}/Inc/control_msgs/PointHeadActionResult.h (100%) rename otto_controller_source/{ => Core}/Inc/control_msgs/PointHeadFeedback.h (100%) rename otto_controller_source/{ => Core}/Inc/control_msgs/PointHeadGoal.h (100%) rename otto_controller_source/{ => Core}/Inc/control_msgs/PointHeadResult.h (100%) rename otto_controller_source/{ => Core}/Inc/control_msgs/QueryCalibrationState.h (100%) rename otto_controller_source/{ => Core}/Inc/control_msgs/QueryTrajectoryState.h (100%) rename otto_controller_source/{ => Core}/Inc/control_msgs/SingleJointPositionAction.h (100%) rename otto_controller_source/{ => Core}/Inc/control_msgs/SingleJointPositionActionFeedback.h (100%) rename otto_controller_source/{ => Core}/Inc/control_msgs/SingleJointPositionActionGoal.h (100%) rename otto_controller_source/{ => Core}/Inc/control_msgs/SingleJointPositionActionResult.h (100%) rename otto_controller_source/{ => Core}/Inc/control_msgs/SingleJointPositionFeedback.h (100%) rename otto_controller_source/{ => Core}/Inc/control_msgs/SingleJointPositionGoal.h (100%) rename otto_controller_source/{ => Core}/Inc/control_msgs/SingleJointPositionResult.h (100%) rename otto_controller_source/{ => Core}/Inc/control_toolbox/SetPidGains.h (100%) rename otto_controller_source/{ => Core}/Inc/controller_manager_msgs/ControllerState.h (100%) rename otto_controller_source/{ => Core}/Inc/controller_manager_msgs/ControllerStatistics.h (100%) rename otto_controller_source/{ => Core}/Inc/controller_manager_msgs/ControllersStatistics.h (100%) rename otto_controller_source/{ => Core}/Inc/controller_manager_msgs/HardwareInterfaceResources.h (100%) rename otto_controller_source/{ => Core}/Inc/controller_manager_msgs/ListControllerTypes.h (100%) rename otto_controller_source/{ => Core}/Inc/controller_manager_msgs/ListControllers.h (100%) rename otto_controller_source/{ => Core}/Inc/controller_manager_msgs/LoadController.h (100%) rename otto_controller_source/{ => Core}/Inc/controller_manager_msgs/ReloadControllerLibraries.h (100%) rename otto_controller_source/{ => Core}/Inc/controller_manager_msgs/SwitchController.h (100%) rename otto_controller_source/{ => Core}/Inc/controller_manager_msgs/UnloadController.h (100%) rename otto_controller_source/{ => Core}/Inc/diagnostic_msgs/AddDiagnostics.h (100%) rename otto_controller_source/{ => Core}/Inc/diagnostic_msgs/DiagnosticArray.h (100%) rename otto_controller_source/{ => Core}/Inc/diagnostic_msgs/DiagnosticStatus.h (100%) rename otto_controller_source/{ => Core}/Inc/diagnostic_msgs/KeyValue.h (100%) rename otto_controller_source/{ => Core}/Inc/diagnostic_msgs/SelfTest.h (100%) rename otto_controller_source/{ => Core}/Inc/dynamic_reconfigure/BoolParameter.h (100%) rename otto_controller_source/{ => Core}/Inc/dynamic_reconfigure/Config.h (100%) rename otto_controller_source/{ => Core}/Inc/dynamic_reconfigure/ConfigDescription.h (100%) rename otto_controller_source/{ => Core}/Inc/dynamic_reconfigure/DoubleParameter.h (100%) rename otto_controller_source/{ => Core}/Inc/dynamic_reconfigure/Group.h (100%) rename otto_controller_source/{ => Core}/Inc/dynamic_reconfigure/GroupState.h (100%) rename otto_controller_source/{ => Core}/Inc/dynamic_reconfigure/IntParameter.h (100%) rename otto_controller_source/{ => Core}/Inc/dynamic_reconfigure/ParamDescription.h (100%) rename otto_controller_source/{ => Core}/Inc/dynamic_reconfigure/Reconfigure.h (100%) rename otto_controller_source/{ => Core}/Inc/dynamic_reconfigure/SensorLevels.h (100%) rename otto_controller_source/{ => Core}/Inc/dynamic_reconfigure/StrParameter.h (100%) rename otto_controller_source/{ => Core}/Inc/encoder.h (87%) rename otto_controller_source/{ => Core}/Inc/gazebo_msgs/ApplyBodyWrench.h (100%) rename otto_controller_source/{ => Core}/Inc/gazebo_msgs/ApplyJointEffort.h (100%) rename otto_controller_source/{ => Core}/Inc/gazebo_msgs/BodyRequest.h (100%) rename otto_controller_source/{ => Core}/Inc/gazebo_msgs/ContactState.h (100%) rename otto_controller_source/{ => Core}/Inc/gazebo_msgs/ContactsState.h (100%) rename otto_controller_source/{ => Core}/Inc/gazebo_msgs/DeleteLight.h (100%) rename otto_controller_source/{ => Core}/Inc/gazebo_msgs/DeleteModel.h (100%) rename otto_controller_source/{ => Core}/Inc/gazebo_msgs/GetJointProperties.h (100%) rename otto_controller_source/{ => Core}/Inc/gazebo_msgs/GetLightProperties.h (100%) rename otto_controller_source/{ => Core}/Inc/gazebo_msgs/GetLinkProperties.h (100%) rename otto_controller_source/{ => Core}/Inc/gazebo_msgs/GetLinkState.h (100%) rename otto_controller_source/{ => Core}/Inc/gazebo_msgs/GetModelProperties.h (100%) rename otto_controller_source/{ => Core}/Inc/gazebo_msgs/GetModelState.h (100%) rename otto_controller_source/{ => Core}/Inc/gazebo_msgs/GetPhysicsProperties.h (100%) rename otto_controller_source/{ => Core}/Inc/gazebo_msgs/GetWorldProperties.h (100%) rename otto_controller_source/{ => Core}/Inc/gazebo_msgs/JointRequest.h (100%) rename otto_controller_source/{ => Core}/Inc/gazebo_msgs/LinkState.h (100%) rename otto_controller_source/{ => Core}/Inc/gazebo_msgs/LinkStates.h (100%) rename otto_controller_source/{ => Core}/Inc/gazebo_msgs/ModelState.h (100%) rename otto_controller_source/{ => Core}/Inc/gazebo_msgs/ModelStates.h (100%) rename otto_controller_source/{ => Core}/Inc/gazebo_msgs/ODEJointProperties.h (100%) rename otto_controller_source/{ => Core}/Inc/gazebo_msgs/ODEPhysics.h (100%) rename otto_controller_source/{ => Core}/Inc/gazebo_msgs/SetJointProperties.h (100%) rename otto_controller_source/{ => Core}/Inc/gazebo_msgs/SetJointTrajectory.h (100%) rename otto_controller_source/{ => Core}/Inc/gazebo_msgs/SetLightProperties.h (100%) rename otto_controller_source/{ => Core}/Inc/gazebo_msgs/SetLinkProperties.h (100%) rename otto_controller_source/{ => Core}/Inc/gazebo_msgs/SetLinkState.h (100%) rename otto_controller_source/{ => Core}/Inc/gazebo_msgs/SetModelConfiguration.h (100%) rename otto_controller_source/{ => Core}/Inc/gazebo_msgs/SetModelState.h (100%) rename otto_controller_source/{ => Core}/Inc/gazebo_msgs/SetPhysicsProperties.h (100%) rename otto_controller_source/{ => Core}/Inc/gazebo_msgs/SpawnModel.h (100%) rename otto_controller_source/{ => Core}/Inc/gazebo_msgs/WorldState.h (100%) rename otto_controller_source/{ => Core}/Inc/geometry_msgs/Accel.h (100%) rename otto_controller_source/{ => Core}/Inc/geometry_msgs/AccelStamped.h (100%) rename otto_controller_source/{ => Core}/Inc/geometry_msgs/AccelWithCovariance.h (100%) rename otto_controller_source/{ => Core}/Inc/geometry_msgs/AccelWithCovarianceStamped.h (100%) rename otto_controller_source/{ => Core}/Inc/geometry_msgs/Inertia.h (100%) rename otto_controller_source/{ => Core}/Inc/geometry_msgs/InertiaStamped.h (100%) rename otto_controller_source/{ => Core}/Inc/geometry_msgs/Point.h (100%) rename otto_controller_source/{ => Core}/Inc/geometry_msgs/Point32.h (100%) rename otto_controller_source/{ => Core}/Inc/geometry_msgs/PointStamped.h (100%) rename otto_controller_source/{ => Core}/Inc/geometry_msgs/Polygon.h (100%) rename otto_controller_source/{ => Core}/Inc/geometry_msgs/PolygonStamped.h (100%) rename otto_controller_source/{ => Core}/Inc/geometry_msgs/Pose.h (100%) rename otto_controller_source/{ => Core}/Inc/geometry_msgs/Pose2D.h (100%) rename otto_controller_source/{ => Core}/Inc/geometry_msgs/PoseArray.h (100%) rename otto_controller_source/{ => Core}/Inc/geometry_msgs/PoseStamped.h (100%) rename otto_controller_source/{ => Core}/Inc/geometry_msgs/PoseWithCovariance.h (100%) rename otto_controller_source/{ => Core}/Inc/geometry_msgs/PoseWithCovarianceStamped.h (100%) rename otto_controller_source/{ => Core}/Inc/geometry_msgs/Quaternion.h (100%) rename otto_controller_source/{ => Core}/Inc/geometry_msgs/QuaternionStamped.h (100%) rename otto_controller_source/{ => Core}/Inc/geometry_msgs/Transform.h (100%) rename otto_controller_source/{ => Core}/Inc/geometry_msgs/TransformStamped.h (100%) rename otto_controller_source/{ => Core}/Inc/geometry_msgs/Twist.h (100%) rename otto_controller_source/{ => Core}/Inc/geometry_msgs/TwistStamped.h (100%) rename otto_controller_source/{ => Core}/Inc/geometry_msgs/TwistWithCovariance.h (100%) rename otto_controller_source/{ => Core}/Inc/geometry_msgs/TwistWithCovarianceStamped.h (100%) rename otto_controller_source/{ => Core}/Inc/geometry_msgs/Vector3.h (100%) rename otto_controller_source/{ => Core}/Inc/geometry_msgs/Vector3Stamped.h (100%) rename otto_controller_source/{ => Core}/Inc/geometry_msgs/Wrench.h (100%) rename otto_controller_source/{ => Core}/Inc/geometry_msgs/WrenchStamped.h (100%) rename otto_controller_source/{ => Core}/Inc/laser_assembler/AssembleScans.h (100%) rename otto_controller_source/{ => Core}/Inc/laser_assembler/AssembleScans2.h (100%) rename otto_controller_source/{ => Core}/Inc/main.h (78%) rename otto_controller_source/{ => Core}/Inc/map_msgs/GetMapROI.h (100%) rename otto_controller_source/{ => Core}/Inc/map_msgs/GetPointMap.h (100%) rename otto_controller_source/{ => Core}/Inc/map_msgs/GetPointMapROI.h (100%) rename otto_controller_source/{ => Core}/Inc/map_msgs/OccupancyGridUpdate.h (100%) rename otto_controller_source/{ => Core}/Inc/map_msgs/PointCloud2Update.h (100%) rename otto_controller_source/{ => Core}/Inc/map_msgs/ProjectedMap.h (100%) rename otto_controller_source/{ => Core}/Inc/map_msgs/ProjectedMapInfo.h (100%) rename otto_controller_source/{ => Core}/Inc/map_msgs/ProjectedMapsInfo.h (100%) rename otto_controller_source/{ => Core}/Inc/map_msgs/SaveMap.h (100%) rename otto_controller_source/{ => Core}/Inc/map_msgs/SetMapProjections.h (100%) rename otto_controller_source/{ => Core}/Inc/nav_msgs/GetMap.h (100%) rename otto_controller_source/{ => Core}/Inc/nav_msgs/GetMapAction.h (100%) rename otto_controller_source/{ => Core}/Inc/nav_msgs/GetMapActionFeedback.h (100%) rename otto_controller_source/{ => Core}/Inc/nav_msgs/GetMapActionGoal.h (100%) rename otto_controller_source/{ => Core}/Inc/nav_msgs/GetMapActionResult.h (100%) rename otto_controller_source/{ => Core}/Inc/nav_msgs/GetMapFeedback.h (100%) rename otto_controller_source/{ => Core}/Inc/nav_msgs/GetMapGoal.h (100%) rename otto_controller_source/{ => Core}/Inc/nav_msgs/GetMapResult.h (100%) rename otto_controller_source/{ => Core}/Inc/nav_msgs/GetPlan.h (100%) rename otto_controller_source/{ => Core}/Inc/nav_msgs/GridCells.h (100%) rename otto_controller_source/{ => Core}/Inc/nav_msgs/MapMetaData.h (100%) rename otto_controller_source/{ => Core}/Inc/nav_msgs/OccupancyGrid.h (100%) rename otto_controller_source/{ => Core}/Inc/nav_msgs/Odometry.h (100%) rename otto_controller_source/{ => Core}/Inc/nav_msgs/Path.h (100%) rename otto_controller_source/{ => Core}/Inc/nav_msgs/SetMap.h (100%) rename otto_controller_source/{ => Core}/Inc/nodelet/NodeletList.h (100%) rename otto_controller_source/{ => Core}/Inc/nodelet/NodeletLoad.h (100%) rename otto_controller_source/{ => Core}/Inc/nodelet/NodeletUnload.h (100%) rename otto_controller_source/{ => Core}/Inc/odometry_calc.h (89%) rename otto_controller_source/{ => Core}/Inc/pcl_msgs/ModelCoefficients.h (100%) rename otto_controller_source/{ => Core}/Inc/pcl_msgs/PointIndices.h (100%) rename otto_controller_source/{ => Core}/Inc/pcl_msgs/PolygonMesh.h (100%) rename otto_controller_source/{ => Core}/Inc/pcl_msgs/Vertices.h (100%) rename otto_controller_source/{ => Core}/Inc/polled_camera/GetPolledImage.h (100%) rename otto_controller_source/{ => Core}/Inc/ros.h (100%) rename otto_controller_source/{ => Core}/Inc/ros/duration.h (100%) rename otto_controller_source/{ => Core}/Inc/ros/msg.h (100%) rename otto_controller_source/{ => Core}/Inc/ros/node_handle.h (100%) rename otto_controller_source/{ => Core}/Inc/ros/publisher.h (100%) rename otto_controller_source/{ => Core}/Inc/ros/service_client.h (100%) rename otto_controller_source/{ => Core}/Inc/ros/service_server.h (100%) rename otto_controller_source/{ => Core}/Inc/ros/subscriber.h (100%) rename otto_controller_source/{ => Core}/Inc/ros/time.h (100%) rename otto_controller_source/{ => Core}/Inc/roscpp/Empty.h (100%) rename otto_controller_source/{ => Core}/Inc/roscpp/GetLoggers.h (100%) rename otto_controller_source/{ => Core}/Inc/roscpp/Logger.h (100%) rename otto_controller_source/{ => Core}/Inc/roscpp/SetLoggerLevel.h (100%) rename otto_controller_source/{ => Core}/Inc/roscpp_tutorials/TwoInts.h (100%) rename otto_controller_source/{ => Core}/Inc/rosgraph_msgs/Clock.h (100%) rename otto_controller_source/{ => Core}/Inc/rosgraph_msgs/Log.h (100%) rename otto_controller_source/{ => Core}/Inc/rosgraph_msgs/TopicStatistics.h (100%) rename otto_controller_source/{ => Core}/Inc/rospy_tutorials/AddTwoInts.h (100%) rename otto_controller_source/{ => Core}/Inc/rospy_tutorials/BadTwoInts.h (100%) rename otto_controller_source/{ => Core}/Inc/rospy_tutorials/Floats.h (100%) rename otto_controller_source/{ => Core}/Inc/rospy_tutorials/HeaderString.h (100%) rename otto_controller_source/{ => Core}/Inc/rosserial_msgs/Log.h (100%) rename otto_controller_source/{ => Core}/Inc/rosserial_msgs/RequestMessageInfo.h (100%) rename otto_controller_source/{ => Core}/Inc/rosserial_msgs/RequestParam.h (100%) rename otto_controller_source/{ => Core}/Inc/rosserial_msgs/RequestServiceInfo.h (100%) rename otto_controller_source/{ => Core}/Inc/rosserial_msgs/TopicInfo.h (100%) rename otto_controller_source/{ => Core}/Inc/sensor_msgs/BatteryState.h (100%) rename otto_controller_source/{ => Core}/Inc/sensor_msgs/CameraInfo.h (100%) rename otto_controller_source/{ => Core}/Inc/sensor_msgs/ChannelFloat32.h (100%) rename otto_controller_source/{ => Core}/Inc/sensor_msgs/CompressedImage.h (100%) rename otto_controller_source/{ => Core}/Inc/sensor_msgs/FluidPressure.h (100%) rename otto_controller_source/{ => Core}/Inc/sensor_msgs/Illuminance.h (100%) rename otto_controller_source/{ => Core}/Inc/sensor_msgs/Image.h (100%) rename otto_controller_source/{ => Core}/Inc/sensor_msgs/Imu.h (100%) rename otto_controller_source/{ => Core}/Inc/sensor_msgs/JointState.h (100%) rename otto_controller_source/{ => Core}/Inc/sensor_msgs/Joy.h (100%) rename otto_controller_source/{ => Core}/Inc/sensor_msgs/JoyFeedback.h (100%) rename otto_controller_source/{ => Core}/Inc/sensor_msgs/JoyFeedbackArray.h (100%) rename otto_controller_source/{ => Core}/Inc/sensor_msgs/LaserEcho.h (100%) rename otto_controller_source/{ => Core}/Inc/sensor_msgs/LaserScan.h (100%) rename otto_controller_source/{ => Core}/Inc/sensor_msgs/MagneticField.h (100%) rename otto_controller_source/{ => Core}/Inc/sensor_msgs/MultiDOFJointState.h (100%) rename otto_controller_source/{ => Core}/Inc/sensor_msgs/MultiEchoLaserScan.h (100%) rename otto_controller_source/{ => Core}/Inc/sensor_msgs/NavSatFix.h (100%) rename otto_controller_source/{ => Core}/Inc/sensor_msgs/NavSatStatus.h (100%) rename otto_controller_source/{ => Core}/Inc/sensor_msgs/PointCloud.h (100%) rename otto_controller_source/{ => Core}/Inc/sensor_msgs/PointCloud2.h (100%) rename otto_controller_source/{ => Core}/Inc/sensor_msgs/PointField.h (100%) rename otto_controller_source/{ => Core}/Inc/sensor_msgs/Range.h (100%) rename otto_controller_source/{ => Core}/Inc/sensor_msgs/RegionOfInterest.h (100%) rename otto_controller_source/{ => Core}/Inc/sensor_msgs/RelativeHumidity.h (100%) rename otto_controller_source/{ => Core}/Inc/sensor_msgs/SetCameraInfo.h (100%) rename otto_controller_source/{ => Core}/Inc/sensor_msgs/Temperature.h (100%) rename otto_controller_source/{ => Core}/Inc/sensor_msgs/TimeReference.h (100%) rename otto_controller_source/{ => Core}/Inc/shape_msgs/Mesh.h (100%) rename otto_controller_source/{ => Core}/Inc/shape_msgs/MeshTriangle.h (100%) rename otto_controller_source/{ => Core}/Inc/shape_msgs/Plane.h (100%) rename otto_controller_source/{ => Core}/Inc/shape_msgs/SolidPrimitive.h (100%) rename otto_controller_source/{ => Core}/Inc/smach_msgs/SmachContainerInitialStatusCmd.h (100%) rename otto_controller_source/{ => Core}/Inc/smach_msgs/SmachContainerStatus.h (100%) rename otto_controller_source/{ => Core}/Inc/smach_msgs/SmachContainerStructure.h (100%) rename otto_controller_source/{ => Core}/Inc/std_msgs/Bool.h (100%) rename otto_controller_source/{ => Core}/Inc/std_msgs/Byte.h (100%) rename otto_controller_source/{ => Core}/Inc/std_msgs/ByteMultiArray.h (100%) rename otto_controller_source/{ => Core}/Inc/std_msgs/Char.h (100%) rename otto_controller_source/{ => Core}/Inc/std_msgs/ColorRGBA.h (100%) rename otto_controller_source/{ => Core}/Inc/std_msgs/Duration.h (100%) rename otto_controller_source/{ => Core}/Inc/std_msgs/Empty.h (100%) rename otto_controller_source/{ => Core}/Inc/std_msgs/Float32.h (100%) rename otto_controller_source/{ => Core}/Inc/std_msgs/Float32MultiArray.h (100%) rename otto_controller_source/{ => Core}/Inc/std_msgs/Float64.h (100%) rename otto_controller_source/{ => Core}/Inc/std_msgs/Float64MultiArray.h (100%) rename otto_controller_source/{ => Core}/Inc/std_msgs/Header.h (100%) rename otto_controller_source/{ => Core}/Inc/std_msgs/Int16.h (100%) rename otto_controller_source/{ => Core}/Inc/std_msgs/Int16MultiArray.h (100%) rename otto_controller_source/{ => Core}/Inc/std_msgs/Int32.h (100%) rename otto_controller_source/{ => Core}/Inc/std_msgs/Int32MultiArray.h (100%) rename otto_controller_source/{ => Core}/Inc/std_msgs/Int64.h (100%) rename otto_controller_source/{ => Core}/Inc/std_msgs/Int64MultiArray.h (100%) rename otto_controller_source/{ => Core}/Inc/std_msgs/Int8.h (100%) rename otto_controller_source/{ => Core}/Inc/std_msgs/Int8MultiArray.h (100%) rename otto_controller_source/{ => Core}/Inc/std_msgs/MultiArrayDimension.h (100%) rename otto_controller_source/{ => Core}/Inc/std_msgs/MultiArrayLayout.h (100%) rename otto_controller_source/{ => Core}/Inc/std_msgs/String.h (100%) rename otto_controller_source/{ => Core}/Inc/std_msgs/Time.h (100%) rename otto_controller_source/{ => Core}/Inc/std_msgs/UInt16.h (100%) rename otto_controller_source/{ => Core}/Inc/std_msgs/UInt16MultiArray.h (100%) rename otto_controller_source/{ => Core}/Inc/std_msgs/UInt32.h (100%) rename otto_controller_source/{ => Core}/Inc/std_msgs/UInt32MultiArray.h (100%) rename otto_controller_source/{ => Core}/Inc/std_msgs/UInt64.h (100%) rename otto_controller_source/{ => Core}/Inc/std_msgs/UInt64MultiArray.h (100%) rename otto_controller_source/{ => Core}/Inc/std_msgs/UInt8.h (100%) rename otto_controller_source/{ => Core}/Inc/std_msgs/UInt8MultiArray.h (100%) rename otto_controller_source/{ => Core}/Inc/std_srvs/Empty.h (100%) rename otto_controller_source/{ => Core}/Inc/std_srvs/SetBool.h (100%) rename otto_controller_source/{ => Core}/Inc/std_srvs/Trigger.h (100%) rename otto_controller_source/{ => Core}/Inc/stereo_msgs/DisparityImage.h (100%) rename otto_controller_source/{ => Core}/Inc/stm32f7xx_hal_conf.h (100%) rename otto_controller_source/{ => Core}/Inc/stm32f7xx_it.h (95%) rename otto_controller_source/{ => Core}/Inc/tf/FrameGraph.h (100%) rename otto_controller_source/{ => Core}/Inc/tf/tf.h (100%) rename otto_controller_source/{ => Core}/Inc/tf/tfMessage.h (100%) rename otto_controller_source/{ => Core}/Inc/tf/transform_broadcaster.h (100%) rename otto_controller_source/{ => Core}/Inc/tf2_msgs/FrameGraph.h (100%) rename otto_controller_source/{ => Core}/Inc/tf2_msgs/LookupTransformAction.h (100%) rename otto_controller_source/{ => Core}/Inc/tf2_msgs/LookupTransformActionFeedback.h (100%) rename otto_controller_source/{ => Core}/Inc/tf2_msgs/LookupTransformActionGoal.h (100%) rename otto_controller_source/{ => Core}/Inc/tf2_msgs/LookupTransformActionResult.h (100%) rename otto_controller_source/{ => Core}/Inc/tf2_msgs/LookupTransformFeedback.h (100%) rename otto_controller_source/{ => Core}/Inc/tf2_msgs/LookupTransformGoal.h (100%) rename otto_controller_source/{ => Core}/Inc/tf2_msgs/LookupTransformResult.h (100%) rename otto_controller_source/{ => Core}/Inc/tf2_msgs/TF2Error.h (100%) rename otto_controller_source/{ => Core}/Inc/tf2_msgs/TFMessage.h (100%) rename otto_controller_source/{ => Core}/Inc/theora_image_transport/Packet.h (100%) rename otto_controller_source/{ => Core}/Inc/topic_tools/DemuxAdd.h (100%) rename otto_controller_source/{ => Core}/Inc/topic_tools/DemuxDelete.h (100%) rename otto_controller_source/{ => Core}/Inc/topic_tools/DemuxList.h (100%) rename otto_controller_source/{ => Core}/Inc/topic_tools/DemuxSelect.h (100%) rename otto_controller_source/{ => Core}/Inc/topic_tools/MuxAdd.h (100%) rename otto_controller_source/{ => Core}/Inc/topic_tools/MuxDelete.h (100%) rename otto_controller_source/{ => Core}/Inc/topic_tools/MuxList.h (100%) rename otto_controller_source/{ => Core}/Inc/topic_tools/MuxSelect.h (100%) rename otto_controller_source/{ => Core}/Inc/trajectory_msgs/JointTrajectory.h (100%) rename otto_controller_source/{ => Core}/Inc/trajectory_msgs/JointTrajectoryPoint.h (100%) rename otto_controller_source/{ => Core}/Inc/trajectory_msgs/MultiDOFJointTrajectory.h (100%) rename otto_controller_source/{ => Core}/Inc/trajectory_msgs/MultiDOFJointTrajectoryPoint.h (100%) rename otto_controller_source/{ => Core}/Inc/turtle_actionlib/ShapeAction.h (100%) rename otto_controller_source/{ => Core}/Inc/turtle_actionlib/ShapeActionFeedback.h (100%) rename otto_controller_source/{ => Core}/Inc/turtle_actionlib/ShapeActionGoal.h (100%) rename otto_controller_source/{ => Core}/Inc/turtle_actionlib/ShapeActionResult.h (100%) rename otto_controller_source/{ => Core}/Inc/turtle_actionlib/ShapeFeedback.h (100%) rename otto_controller_source/{ => Core}/Inc/turtle_actionlib/ShapeGoal.h (100%) rename otto_controller_source/{ => Core}/Inc/turtle_actionlib/ShapeResult.h (100%) rename otto_controller_source/{ => Core}/Inc/turtle_actionlib/Velocity.h (100%) rename otto_controller_source/{ => Core}/Inc/turtlesim/Color.h (100%) rename otto_controller_source/{ => Core}/Inc/turtlesim/Kill.h (100%) rename otto_controller_source/{ => Core}/Inc/turtlesim/Pose.h (100%) rename otto_controller_source/{ => Core}/Inc/turtlesim/SetPen.h (100%) rename otto_controller_source/{ => Core}/Inc/turtlesim/Spawn.h (100%) rename otto_controller_source/{ => Core}/Inc/turtlesim/TeleportAbsolute.h (100%) rename otto_controller_source/{ => Core}/Inc/turtlesim/TeleportRelative.h (100%) rename otto_controller_source/{ => Core}/Inc/visualization_msgs/ImageMarker.h (100%) rename otto_controller_source/{ => Core}/Inc/visualization_msgs/InteractiveMarker.h (100%) rename otto_controller_source/{ => Core}/Inc/visualization_msgs/InteractiveMarkerControl.h (100%) rename otto_controller_source/{ => Core}/Inc/visualization_msgs/InteractiveMarkerFeedback.h (100%) rename otto_controller_source/{ => Core}/Inc/visualization_msgs/InteractiveMarkerInit.h (100%) rename otto_controller_source/{ => Core}/Inc/visualization_msgs/InteractiveMarkerPose.h (100%) rename otto_controller_source/{ => Core}/Inc/visualization_msgs/InteractiveMarkerUpdate.h (100%) rename otto_controller_source/{ => Core}/Inc/visualization_msgs/Marker.h (100%) rename otto_controller_source/{ => Core}/Inc/visualization_msgs/MarkerArray.h (100%) rename otto_controller_source/{ => Core}/Inc/visualization_msgs/MenuEntry.h (100%) rename otto_controller_source/{ => Core}/Src/duration.cpp (100%) rename otto_controller_source/{ => Core}/Src/encoder.cpp (100%) create mode 100644 otto_controller_source/Core/Src/main.cpp rename otto_controller_source/{ => Core}/Src/odometry_calc.cpp (95%) rename otto_controller_source/{ => Core}/Src/stm32f7xx_hal_msp.c (91%) rename otto_controller_source/{ => Core}/Src/stm32f7xx_it.c (92%) rename otto_controller_source/{ => Core}/Src/syscalls.c (100%) rename otto_controller_source/{ => Core}/Src/sysmem.c (100%) rename otto_controller_source/{ => Core}/Src/system_stm32f7xx.c (100%) rename otto_controller_source/{ => Core}/Src/time.cpp (100%) rename otto_controller_source/{ => Core}/Startup/startup_stm32f767zitx.s (100%) create mode 100644 otto_controller_source/Debug/Core/Src/subdir.mk create mode 100644 otto_controller_source/Debug/Core/Startup/subdir.mk delete mode 100644 otto_controller_source/Debug/Src/subdir.mk delete mode 100644 otto_controller_source/Debug/st-link_gdbserver_log.txt create mode 100644 otto_controller_source/Release/Core/Src/subdir.mk rename otto_controller_source/{Debug => Release/Core}/Startup/subdir.mk (60%) create mode 100644 otto_controller_source/Release/Drivers/STM32F7xx_HAL_Driver/Src/subdir.mk create mode 100644 otto_controller_source/Release/makefile create mode 100644 otto_controller_source/Release/objects.list create mode 100644 otto_controller_source/Release/objects.mk create mode 100644 otto_controller_source/Release/otto_controller_source.list create mode 100644 otto_controller_source/Release/sources.mk delete mode 100644 otto_controller_source/Src/main.cpp delete mode 100644 otto_controller_source/otto_controller_source Debug.cfg delete mode 100644 otto_controller_source/otto_controller_source.elf.cfg diff --git a/otto_controller_source/.cproject b/otto_controller_source/.cproject index dfb80fc..1a67ac4 100644 --- a/otto_controller_source/.cproject +++ b/otto_controller_source/.cproject @@ -1,8 +1,8 @@ - - + + @@ -13,97 +13,95 @@ - - - - - - + + @@ -114,87 +112,83 @@ - - - - - + - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + - + - + - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + diff --git a/otto_controller_source/.mxproject b/otto_controller_source/.mxproject index 1fe9200..700dc62 100644 --- a/otto_controller_source/.mxproject +++ b/otto_controller_source/.mxproject @@ -1,14 +1,23 @@ [PreviousGenFiles] -HeaderPath=/home/fdila/Projects/otto/otto_controller_source/Inc -HeaderFiles=stm32f7xx_it.h;stm32f7xx_hal_conf.h;main.h; -SourcePath=/home/fdila/Projects/otto/otto_controller_source/Src -SourceFiles=stm32f7xx_it.c;stm32f7xx_hal_msp.c;main.c; +AdvancedFolderStructure=true +HeaderFileListSize=3 +HeaderFiles#0=/home/fdila/Projects/otto-stm-test/otto_controller_source/Core/Inc/stm32f7xx_it.h +HeaderFiles#1=/home/fdila/Projects/otto-stm-test/otto_controller_source/Core/Inc/stm32f7xx_hal_conf.h +HeaderFiles#2=/home/fdila/Projects/otto-stm-test/otto_controller_source/Core/Inc/main.h +HeaderFolderListSize=1 +HeaderPath#0=/home/fdila/Projects/otto-stm-test/otto_controller_source/Core/Inc +SourceFileListSize=3 +SourceFiles#0=/home/fdila/Projects/otto-stm-test/otto_controller_source/Core/Src/stm32f7xx_it.c +SourceFiles#1=/home/fdila/Projects/otto-stm-test/otto_controller_source/Core/Src/stm32f7xx_hal_msp.c +SourceFiles#2=/home/fdila/Projects/otto-stm-test/otto_controller_source/Core/Src/main.c +SourceFolderListSize=1 +SourcePath#0=/home/fdila/Projects/otto-stm-test/otto_controller_source/Core/Src [PreviousLibFiles] LibFiles=Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h;Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h;Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h;Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h;Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h;Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h;Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/system_stm32f7xx.c;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/tz_context.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_cm4.h; [PreviousUsedCubeIDEFiles] -SourceFiles=Src/main.c;Src/stm32f7xx_it.c;Src/stm32f7xx_hal_msp.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c;Src/system_stm32f7xx.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c;Src/system_stm32f7xx.c;Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/system_stm32f7xx.c;; -HeaderPath=Drivers/STM32F7xx_HAL_Driver/Inc;Drivers/STM32F7xx_HAL_Driver/Inc/Legacy;Drivers/CMSIS/Device/ST/STM32F7xx/Include;Drivers/CMSIS/Include;Inc; +SourceFiles=Core/Src/main.c;Core/Src/stm32f7xx_it.c;Core/Src/stm32f7xx_hal_msp.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c;Core/Src/system_stm32f7xx.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c;Core/Src/system_stm32f7xx.c;Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/system_stm32f7xx.c;; +HeaderPath=Drivers/STM32F7xx_HAL_Driver/Inc;Drivers/STM32F7xx_HAL_Driver/Inc/Legacy;Drivers/CMSIS/Device/ST/STM32F7xx/Include;Drivers/CMSIS/Include;Core/Inc; CDefines=USE_HAL_DRIVER;STM32F767xx;USE_HAL_DRIVER;USE_HAL_DRIVER; diff --git a/otto_controller_source/.project b/otto_controller_source/.project index 264b008..d090414 100644 --- a/otto_controller_source/.project +++ b/otto_controller_source/.project @@ -23,7 +23,10 @@ com.st.stm32cube.ide.mcu.MCUCubeProjectNature org.eclipse.cdt.core.cnature com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature + com.st.stm32cube.ide.mcu.MCUAdvancedStructureProjectNature + com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature + com.st.stm32cube.ide.mcu.MCURootProjectNature org.eclipse.cdt.managedbuilder.core.managedBuildNature org.eclipse.cdt.managedbuilder.core.ScannerConfigNature org.eclipse.cdt.core.ccnature diff --git a/otto_controller_source/.settings/language.settings.xml b/otto_controller_source/.settings/language.settings.xml index 9f5fc1a..22e0f95 100644 --- a/otto_controller_source/.settings/language.settings.xml +++ b/otto_controller_source/.settings/language.settings.xml @@ -1,6 +1,6 @@ - + @@ -12,7 +12,7 @@ - + diff --git a/otto_controller_source/.settings/org.eclipse.cdt.codan.core.prefs b/otto_controller_source/.settings/org.eclipse.cdt.codan.core.prefs new file mode 100644 index 0000000..f957b85 --- /dev/null +++ b/otto_controller_source/.settings/org.eclipse.cdt.codan.core.prefs @@ -0,0 +1,56 @@ +com.st.stm32cube.ide.mcu.ide.oss.source.checker.libnano.problem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Float formatting support\\")"} +eclipse.preferences.version=1 +org.eclipse.cdt.codan.checkers.errnoreturn.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"No return\\")",implicit\=>false} +org.eclipse.cdt.codan.checkers.errreturnvalue.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Unused return value\\")"} +org.eclipse.cdt.codan.checkers.nocommentinside.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Nesting comments\\")"} +org.eclipse.cdt.codan.checkers.nolinecomment.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Line comments\\")"} +org.eclipse.cdt.codan.checkers.noreturn.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"No return value\\")",implicit\=>false} +org.eclipse.cdt.codan.internal.checkers.AbstractClassCreation.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Abstract class cannot be instantiated\\")"} +org.eclipse.cdt.codan.internal.checkers.AmbiguousProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Ambiguous problem\\")"} +org.eclipse.cdt.codan.internal.checkers.AssignmentInConditionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Assignment in condition\\")"} +org.eclipse.cdt.codan.internal.checkers.AssignmentToItselfProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Assignment to itself\\")"} +org.eclipse.cdt.codan.internal.checkers.CStyleCastProblem=-Warning +org.eclipse.cdt.codan.internal.checkers.CStyleCastProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"C-Style cast instead of C++ cast\\")"} +org.eclipse.cdt.codan.internal.checkers.CaseBreakProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"No break at end of case\\")",no_break_comment\=>"no break",last_case_param\=>false,empty_case_param\=>false,enable_fallthrough_quickfix_param\=>false} +org.eclipse.cdt.codan.internal.checkers.CatchByReference.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Catching by reference is recommended\\")",unknown\=>false,exceptions\=>()} +org.eclipse.cdt.codan.internal.checkers.CircularReferenceProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Circular inheritance\\")"} +org.eclipse.cdt.codan.internal.checkers.ClassMembersInitialization.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Class members should be properly initialized\\")",skip\=>true} +org.eclipse.cdt.codan.internal.checkers.CopyrightProblem=-Warning +org.eclipse.cdt.codan.internal.checkers.CopyrightProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Lack of copyright information\\")",regex\=>".*Copyright.*"} +org.eclipse.cdt.codan.internal.checkers.DecltypeAutoProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Invalid 'decltype(auto)' specifier\\")"} +org.eclipse.cdt.codan.internal.checkers.FieldResolutionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Field cannot be resolved\\")"} +org.eclipse.cdt.codan.internal.checkers.FunctionResolutionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Function cannot be resolved\\")"} +org.eclipse.cdt.codan.internal.checkers.GotoStatementProblem=-Warning +org.eclipse.cdt.codan.internal.checkers.GotoStatementProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Goto statement used\\")"} +org.eclipse.cdt.codan.internal.checkers.InvalidArguments.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Invalid arguments\\")"} +org.eclipse.cdt.codan.internal.checkers.InvalidTemplateArgumentsProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Invalid template argument\\")"} +org.eclipse.cdt.codan.internal.checkers.LabelStatementNotFoundProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Label statement not found\\")"} +org.eclipse.cdt.codan.internal.checkers.MemberDeclarationNotFoundProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Member declaration not found\\")"} +org.eclipse.cdt.codan.internal.checkers.MethodResolutionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Method cannot be resolved\\")"} +org.eclipse.cdt.codan.internal.checkers.MissCaseProblem=-Warning +org.eclipse.cdt.codan.internal.checkers.MissCaseProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Missing cases in switch\\")"} +org.eclipse.cdt.codan.internal.checkers.MissDefaultProblem=-Warning +org.eclipse.cdt.codan.internal.checkers.MissDefaultProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Missing default in switch\\")",defaultWithAllEnums\=>false} +org.eclipse.cdt.codan.internal.checkers.MissReferenceProblem=-Warning +org.eclipse.cdt.codan.internal.checkers.MissReferenceProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Missing reference return value in assignment operator\\")"} +org.eclipse.cdt.codan.internal.checkers.MissSelfCheckProblem=-Warning +org.eclipse.cdt.codan.internal.checkers.MissSelfCheckProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Missing self check in assignment operator\\")"} +org.eclipse.cdt.codan.internal.checkers.NamingConventionFunctionChecker.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Name convention for function\\")",pattern\=>"^[a-z]",macro\=>true,exceptions\=>()} +org.eclipse.cdt.codan.internal.checkers.NonVirtualDestructorProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Class has a virtual method and non-virtual destructor\\")"} +org.eclipse.cdt.codan.internal.checkers.OverloadProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Invalid overload\\")"} +org.eclipse.cdt.codan.internal.checkers.RedeclarationProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Invalid redeclaration\\")"} +org.eclipse.cdt.codan.internal.checkers.RedefinitionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Invalid redefinition\\")"} +org.eclipse.cdt.codan.internal.checkers.ReturnStyleProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Return with parenthesis\\")"} +org.eclipse.cdt.codan.internal.checkers.ScanfFormatStringSecurityProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Format String Vulnerability\\")"} +org.eclipse.cdt.codan.internal.checkers.StatementHasNoEffectProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Statement has no effect\\")",macro\=>true,exceptions\=>()} +org.eclipse.cdt.codan.internal.checkers.SuggestedParenthesisProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Suggested parenthesis around expression\\")",paramNot\=>false} +org.eclipse.cdt.codan.internal.checkers.SuspiciousSemicolonProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Suspicious semicolon\\")",else\=>false,afterelse\=>false} +org.eclipse.cdt.codan.internal.checkers.TypeResolutionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Type cannot be resolved\\")"} +org.eclipse.cdt.codan.internal.checkers.UnusedFunctionDeclarationProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Unused function declaration\\")",macro\=>true} +org.eclipse.cdt.codan.internal.checkers.UnusedStaticFunctionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Unused static function\\")",macro\=>true} +org.eclipse.cdt.codan.internal.checkers.UnusedVariableDeclarationProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Unused variable declaration in file scope\\")",macro\=>true,exceptions\=>("@(\#)","$Id")} +org.eclipse.cdt.codan.internal.checkers.UsingInHeaderProblem=-Warning +org.eclipse.cdt.codan.internal.checkers.UsingInHeaderProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Using directive in header\\")"} +org.eclipse.cdt.codan.internal.checkers.VariableResolutionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Symbol is not resolved\\")"} +org.eclipse.cdt.codan.internal.checkers.VirtualMethodCallProblem=-Error +org.eclipse.cdt.codan.internal.checkers.VirtualMethodCallProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Virtual method call in constructor/destructor\\")"} diff --git a/otto_controller_source/.settings/org.eclipse.cdt.core.prefs b/otto_controller_source/.settings/org.eclipse.cdt.core.prefs deleted file mode 100644 index cfb80d5..0000000 --- a/otto_controller_source/.settings/org.eclipse.cdt.core.prefs +++ /dev/null @@ -1,167 +0,0 @@ -eclipse.preferences.version=1 -org.eclipse.cdt.core.formatter.alignment_for_arguments_in_method_invocation=18 -org.eclipse.cdt.core.formatter.alignment_for_assignment=16 -org.eclipse.cdt.core.formatter.alignment_for_base_clause_in_type_declaration=16 -org.eclipse.cdt.core.formatter.alignment_for_binary_expression=16 -org.eclipse.cdt.core.formatter.alignment_for_compact_if=0 -org.eclipse.cdt.core.formatter.alignment_for_conditional_expression=34 -org.eclipse.cdt.core.formatter.alignment_for_conditional_expression_chain=18 -org.eclipse.cdt.core.formatter.alignment_for_constructor_initializer_list=83 -org.eclipse.cdt.core.formatter.alignment_for_declarator_list=16 -org.eclipse.cdt.core.formatter.alignment_for_enumerator_list=51 -org.eclipse.cdt.core.formatter.alignment_for_expression_list=0 -org.eclipse.cdt.core.formatter.alignment_for_expressions_in_array_initializer=16 -org.eclipse.cdt.core.formatter.alignment_for_member_access=16 -org.eclipse.cdt.core.formatter.alignment_for_overloaded_left_shift_chain=18 -org.eclipse.cdt.core.formatter.alignment_for_parameters_in_method_declaration=18 -org.eclipse.cdt.core.formatter.alignment_for_throws_clause_in_method_declaration=16 -org.eclipse.cdt.core.formatter.brace_position_for_array_initializer=end_of_line -org.eclipse.cdt.core.formatter.brace_position_for_block=end_of_line -org.eclipse.cdt.core.formatter.brace_position_for_block_in_case=end_of_line -org.eclipse.cdt.core.formatter.brace_position_for_method_declaration=end_of_line -org.eclipse.cdt.core.formatter.brace_position_for_namespace_declaration=end_of_line -org.eclipse.cdt.core.formatter.brace_position_for_switch=end_of_line -org.eclipse.cdt.core.formatter.brace_position_for_type_declaration=end_of_line -org.eclipse.cdt.core.formatter.comment.line_up_line_comment_in_blocks_on_first_column=false -org.eclipse.cdt.core.formatter.comment.min_distance_between_code_and_line_comment=2 -org.eclipse.cdt.core.formatter.comment.never_indent_line_comments_on_first_column=true -org.eclipse.cdt.core.formatter.comment.preserve_white_space_between_code_and_line_comments=true -org.eclipse.cdt.core.formatter.comment_formatter_off_tag=@formatter\:off -org.eclipse.cdt.core.formatter.comment_formatter_on_tag=@formatter\:on -org.eclipse.cdt.core.formatter.compact_else_if=true -org.eclipse.cdt.core.formatter.continuation_indentation=2 -org.eclipse.cdt.core.formatter.continuation_indentation_for_array_initializer=2 -org.eclipse.cdt.core.formatter.format_guardian_clause_on_one_line=false -org.eclipse.cdt.core.formatter.indent_access_specifier_compare_to_type_header=false -org.eclipse.cdt.core.formatter.indent_access_specifier_extra_spaces=1 -org.eclipse.cdt.core.formatter.indent_body_declarations_compare_to_access_specifier=true -org.eclipse.cdt.core.formatter.indent_body_declarations_compare_to_namespace_header=false -org.eclipse.cdt.core.formatter.indent_breaks_compare_to_cases=true -org.eclipse.cdt.core.formatter.indent_declaration_compare_to_template_header=false -org.eclipse.cdt.core.formatter.indent_empty_lines=false -org.eclipse.cdt.core.formatter.indent_statements_compare_to_block=true -org.eclipse.cdt.core.formatter.indent_statements_compare_to_body=true -org.eclipse.cdt.core.formatter.indent_switchstatements_compare_to_cases=true -org.eclipse.cdt.core.formatter.indent_switchstatements_compare_to_switch=true -org.eclipse.cdt.core.formatter.indentation.size=2 -org.eclipse.cdt.core.formatter.insert_new_line_after_opening_brace_in_array_initializer=do not insert -org.eclipse.cdt.core.formatter.insert_new_line_after_template_declaration=do not insert -org.eclipse.cdt.core.formatter.insert_new_line_at_end_of_file_if_missing=do not insert -org.eclipse.cdt.core.formatter.insert_new_line_before_catch_in_try_statement=do not insert -org.eclipse.cdt.core.formatter.insert_new_line_before_closing_brace_in_array_initializer=do not insert -org.eclipse.cdt.core.formatter.insert_new_line_before_colon_in_constructor_initializer_list=insert -org.eclipse.cdt.core.formatter.insert_new_line_before_else_in_if_statement=do not insert -org.eclipse.cdt.core.formatter.insert_new_line_before_identifier_in_function_declaration=do not insert -org.eclipse.cdt.core.formatter.insert_new_line_before_while_in_do_statement=do not insert -org.eclipse.cdt.core.formatter.insert_new_line_in_empty_block=insert -org.eclipse.cdt.core.formatter.insert_space_after_assignment_operator=insert -org.eclipse.cdt.core.formatter.insert_space_after_binary_operator=insert -org.eclipse.cdt.core.formatter.insert_space_after_closing_angle_bracket_in_template_arguments=insert -org.eclipse.cdt.core.formatter.insert_space_after_closing_angle_bracket_in_template_parameters=insert -org.eclipse.cdt.core.formatter.insert_space_after_closing_brace_in_block=insert -org.eclipse.cdt.core.formatter.insert_space_after_closing_paren_in_cast=insert -org.eclipse.cdt.core.formatter.insert_space_after_colon_in_base_clause=insert -org.eclipse.cdt.core.formatter.insert_space_after_colon_in_case=insert -org.eclipse.cdt.core.formatter.insert_space_after_colon_in_conditional=insert -org.eclipse.cdt.core.formatter.insert_space_after_colon_in_labeled_statement=insert -org.eclipse.cdt.core.formatter.insert_space_after_comma_in_array_initializer=insert -org.eclipse.cdt.core.formatter.insert_space_after_comma_in_base_types=insert -org.eclipse.cdt.core.formatter.insert_space_after_comma_in_declarator_list=insert -org.eclipse.cdt.core.formatter.insert_space_after_comma_in_enum_declarations=insert -org.eclipse.cdt.core.formatter.insert_space_after_comma_in_expression_list=insert -org.eclipse.cdt.core.formatter.insert_space_after_comma_in_method_declaration_parameters=insert -org.eclipse.cdt.core.formatter.insert_space_after_comma_in_method_declaration_throws=insert -org.eclipse.cdt.core.formatter.insert_space_after_comma_in_method_invocation_arguments=insert -org.eclipse.cdt.core.formatter.insert_space_after_comma_in_template_arguments=insert -org.eclipse.cdt.core.formatter.insert_space_after_comma_in_template_parameters=insert -org.eclipse.cdt.core.formatter.insert_space_after_opening_angle_bracket_in_template_arguments=do not insert -org.eclipse.cdt.core.formatter.insert_space_after_opening_angle_bracket_in_template_parameters=do not insert -org.eclipse.cdt.core.formatter.insert_space_after_opening_brace_in_array_initializer=insert -org.eclipse.cdt.core.formatter.insert_space_after_opening_bracket=do not insert -org.eclipse.cdt.core.formatter.insert_space_after_opening_paren_in_cast=do not insert -org.eclipse.cdt.core.formatter.insert_space_after_opening_paren_in_catch=do not insert -org.eclipse.cdt.core.formatter.insert_space_after_opening_paren_in_exception_specification=do not insert -org.eclipse.cdt.core.formatter.insert_space_after_opening_paren_in_for=do not insert -org.eclipse.cdt.core.formatter.insert_space_after_opening_paren_in_if=do not insert -org.eclipse.cdt.core.formatter.insert_space_after_opening_paren_in_method_declaration=do not insert -org.eclipse.cdt.core.formatter.insert_space_after_opening_paren_in_method_invocation=do not insert -org.eclipse.cdt.core.formatter.insert_space_after_opening_paren_in_parenthesized_expression=do not insert -org.eclipse.cdt.core.formatter.insert_space_after_opening_paren_in_switch=do not insert -org.eclipse.cdt.core.formatter.insert_space_after_opening_paren_in_while=do not insert -org.eclipse.cdt.core.formatter.insert_space_after_postfix_operator=do not insert -org.eclipse.cdt.core.formatter.insert_space_after_prefix_operator=do not insert -org.eclipse.cdt.core.formatter.insert_space_after_question_in_conditional=insert -org.eclipse.cdt.core.formatter.insert_space_after_semicolon_in_for=insert -org.eclipse.cdt.core.formatter.insert_space_after_unary_operator=do not insert -org.eclipse.cdt.core.formatter.insert_space_before_assignment_operator=insert -org.eclipse.cdt.core.formatter.insert_space_before_binary_operator=insert -org.eclipse.cdt.core.formatter.insert_space_before_closing_angle_bracket_in_template_arguments=do not insert -org.eclipse.cdt.core.formatter.insert_space_before_closing_angle_bracket_in_template_parameters=do not insert -org.eclipse.cdt.core.formatter.insert_space_before_closing_brace_in_array_initializer=insert -org.eclipse.cdt.core.formatter.insert_space_before_closing_bracket=do not insert -org.eclipse.cdt.core.formatter.insert_space_before_closing_paren_in_cast=do not insert -org.eclipse.cdt.core.formatter.insert_space_before_closing_paren_in_catch=do not insert -org.eclipse.cdt.core.formatter.insert_space_before_closing_paren_in_exception_specification=do not insert -org.eclipse.cdt.core.formatter.insert_space_before_closing_paren_in_for=do not insert -org.eclipse.cdt.core.formatter.insert_space_before_closing_paren_in_if=do not insert -org.eclipse.cdt.core.formatter.insert_space_before_closing_paren_in_method_declaration=do not insert -org.eclipse.cdt.core.formatter.insert_space_before_closing_paren_in_method_invocation=do not insert -org.eclipse.cdt.core.formatter.insert_space_before_closing_paren_in_parenthesized_expression=do not insert -org.eclipse.cdt.core.formatter.insert_space_before_closing_paren_in_switch=do not insert -org.eclipse.cdt.core.formatter.insert_space_before_closing_paren_in_while=do not insert -org.eclipse.cdt.core.formatter.insert_space_before_colon_in_base_clause=insert -org.eclipse.cdt.core.formatter.insert_space_before_colon_in_case=do not insert -org.eclipse.cdt.core.formatter.insert_space_before_colon_in_conditional=insert -org.eclipse.cdt.core.formatter.insert_space_before_colon_in_default=do not insert -org.eclipse.cdt.core.formatter.insert_space_before_colon_in_labeled_statement=do not insert -org.eclipse.cdt.core.formatter.insert_space_before_comma_in_array_initializer=do not insert -org.eclipse.cdt.core.formatter.insert_space_before_comma_in_base_types=do not insert -org.eclipse.cdt.core.formatter.insert_space_before_comma_in_declarator_list=do not insert -org.eclipse.cdt.core.formatter.insert_space_before_comma_in_enum_declarations=do not insert -org.eclipse.cdt.core.formatter.insert_space_before_comma_in_expression_list=do not insert -org.eclipse.cdt.core.formatter.insert_space_before_comma_in_method_declaration_parameters=do not insert -org.eclipse.cdt.core.formatter.insert_space_before_comma_in_method_declaration_throws=do not insert -org.eclipse.cdt.core.formatter.insert_space_before_comma_in_method_invocation_arguments=do not insert -org.eclipse.cdt.core.formatter.insert_space_before_comma_in_template_arguments=do not insert -org.eclipse.cdt.core.formatter.insert_space_before_comma_in_template_parameters=do not insert -org.eclipse.cdt.core.formatter.insert_space_before_opening_angle_bracket_in_template_arguments=do not insert -org.eclipse.cdt.core.formatter.insert_space_before_opening_angle_bracket_in_template_parameters=do not insert -org.eclipse.cdt.core.formatter.insert_space_before_opening_brace_in_array_initializer=insert -org.eclipse.cdt.core.formatter.insert_space_before_opening_brace_in_block=insert -org.eclipse.cdt.core.formatter.insert_space_before_opening_brace_in_method_declaration=insert -org.eclipse.cdt.core.formatter.insert_space_before_opening_brace_in_namespace_declaration=insert -org.eclipse.cdt.core.formatter.insert_space_before_opening_brace_in_switch=insert -org.eclipse.cdt.core.formatter.insert_space_before_opening_brace_in_type_declaration=insert -org.eclipse.cdt.core.formatter.insert_space_before_opening_bracket=do not insert -org.eclipse.cdt.core.formatter.insert_space_before_opening_paren_in_catch=insert -org.eclipse.cdt.core.formatter.insert_space_before_opening_paren_in_exception_specification=insert -org.eclipse.cdt.core.formatter.insert_space_before_opening_paren_in_for=insert -org.eclipse.cdt.core.formatter.insert_space_before_opening_paren_in_if=insert -org.eclipse.cdt.core.formatter.insert_space_before_opening_paren_in_method_declaration=do not insert -org.eclipse.cdt.core.formatter.insert_space_before_opening_paren_in_method_invocation=do not insert -org.eclipse.cdt.core.formatter.insert_space_before_opening_paren_in_parenthesized_expression=do not insert -org.eclipse.cdt.core.formatter.insert_space_before_opening_paren_in_switch=insert -org.eclipse.cdt.core.formatter.insert_space_before_opening_paren_in_while=insert -org.eclipse.cdt.core.formatter.insert_space_before_postfix_operator=do not insert -org.eclipse.cdt.core.formatter.insert_space_before_prefix_operator=do not insert -org.eclipse.cdt.core.formatter.insert_space_before_question_in_conditional=insert -org.eclipse.cdt.core.formatter.insert_space_before_semicolon=do not insert -org.eclipse.cdt.core.formatter.insert_space_before_semicolon_in_for=do not insert -org.eclipse.cdt.core.formatter.insert_space_before_unary_operator=do not insert -org.eclipse.cdt.core.formatter.insert_space_between_empty_braces_in_array_initializer=do not insert -org.eclipse.cdt.core.formatter.insert_space_between_empty_brackets=do not insert -org.eclipse.cdt.core.formatter.insert_space_between_empty_parens_in_exception_specification=do not insert -org.eclipse.cdt.core.formatter.insert_space_between_empty_parens_in_method_declaration=do not insert -org.eclipse.cdt.core.formatter.insert_space_between_empty_parens_in_method_invocation=do not insert -org.eclipse.cdt.core.formatter.join_wrapped_lines=true -org.eclipse.cdt.core.formatter.keep_else_statement_on_same_line=false -org.eclipse.cdt.core.formatter.keep_empty_array_initializer_on_one_line=false -org.eclipse.cdt.core.formatter.keep_imple_if_on_one_line=false -org.eclipse.cdt.core.formatter.keep_then_statement_on_same_line=false -org.eclipse.cdt.core.formatter.lineSplit=80 -org.eclipse.cdt.core.formatter.number_of_empty_lines_to_preserve=1 -org.eclipse.cdt.core.formatter.put_empty_statement_on_new_line=true -org.eclipse.cdt.core.formatter.tabulation.char=space -org.eclipse.cdt.core.formatter.tabulation.size=2 -org.eclipse.cdt.core.formatter.use_comment_formatter_tag=true -org.eclipse.cdt.core.formatter.use_tabs_only_for_leading_indentations=false diff --git a/otto_controller_source/.settings/org.eclipse.cdt.ui.prefs b/otto_controller_source/.settings/org.eclipse.cdt.ui.prefs deleted file mode 100644 index d5d8076..0000000 --- a/otto_controller_source/.settings/org.eclipse.cdt.ui.prefs +++ /dev/null @@ -1,3 +0,0 @@ -eclipse.preferences.version=1 -formatter_profile=_Google C++ -formatter_settings_version=1 diff --git a/otto_controller_source/.settings/org.eclipse.core.runtime.prefs b/otto_controller_source/.settings/org.eclipse.core.runtime.prefs index 71db4fe..0e915ed 100644 --- a/otto_controller_source/.settings/org.eclipse.core.runtime.prefs +++ b/otto_controller_source/.settings/org.eclipse.core.runtime.prefs @@ -1,3 +1,3 @@ content-types/enabled=true -content-types/org.eclipse.cdt.core.cxxHeader/file-extensions=h +content-types/org.eclipse.cdt.core.cxxHeader/file-names=.h eclipse.preferences.version=1 diff --git a/otto_controller_source/Inc/STM32Hardware.h b/otto_controller_source/Core/Inc/STM32Hardware.h similarity index 97% rename from otto_controller_source/Inc/STM32Hardware.h rename to otto_controller_source/Core/Inc/STM32Hardware.h index e446482..935386b 100644 --- a/otto_controller_source/Inc/STM32Hardware.h +++ b/otto_controller_source/Core/Inc/STM32Hardware.h @@ -38,7 +38,7 @@ #include "stm32f7xx_hal.h" #include "stm32f7xx_hal_uart.h" -extern UART_HandleTypeDef huart3; +extern UART_HandleTypeDef huart6; class STM32Hardware { protected: @@ -55,7 +55,7 @@ class STM32Hardware { public: STM32Hardware(): - huart(&huart3), rind(0), twind(0), tfind(0){ + huart(&huart6), rind(0), twind(0), tfind(0){ } STM32Hardware(UART_HandleTypeDef *huart_): diff --git a/otto_controller_source/Inc/actionlib/TestAction.h b/otto_controller_source/Core/Inc/actionlib/TestAction.h similarity index 100% rename from otto_controller_source/Inc/actionlib/TestAction.h rename to otto_controller_source/Core/Inc/actionlib/TestAction.h diff --git a/otto_controller_source/Inc/actionlib/TestActionFeedback.h b/otto_controller_source/Core/Inc/actionlib/TestActionFeedback.h similarity index 100% rename from otto_controller_source/Inc/actionlib/TestActionFeedback.h rename to otto_controller_source/Core/Inc/actionlib/TestActionFeedback.h diff --git a/otto_controller_source/Inc/actionlib/TestActionGoal.h b/otto_controller_source/Core/Inc/actionlib/TestActionGoal.h similarity index 100% rename from otto_controller_source/Inc/actionlib/TestActionGoal.h rename to otto_controller_source/Core/Inc/actionlib/TestActionGoal.h diff --git a/otto_controller_source/Inc/actionlib/TestActionResult.h b/otto_controller_source/Core/Inc/actionlib/TestActionResult.h similarity index 100% rename from otto_controller_source/Inc/actionlib/TestActionResult.h rename to otto_controller_source/Core/Inc/actionlib/TestActionResult.h diff --git a/otto_controller_source/Inc/actionlib/TestFeedback.h b/otto_controller_source/Core/Inc/actionlib/TestFeedback.h similarity index 100% rename from otto_controller_source/Inc/actionlib/TestFeedback.h rename to otto_controller_source/Core/Inc/actionlib/TestFeedback.h diff --git a/otto_controller_source/Inc/actionlib/TestGoal.h b/otto_controller_source/Core/Inc/actionlib/TestGoal.h similarity index 100% rename from otto_controller_source/Inc/actionlib/TestGoal.h rename to otto_controller_source/Core/Inc/actionlib/TestGoal.h diff --git a/otto_controller_source/Inc/actionlib/TestRequestAction.h b/otto_controller_source/Core/Inc/actionlib/TestRequestAction.h similarity index 100% rename from otto_controller_source/Inc/actionlib/TestRequestAction.h rename to otto_controller_source/Core/Inc/actionlib/TestRequestAction.h diff --git a/otto_controller_source/Inc/actionlib/TestRequestActionFeedback.h b/otto_controller_source/Core/Inc/actionlib/TestRequestActionFeedback.h similarity index 100% rename from otto_controller_source/Inc/actionlib/TestRequestActionFeedback.h rename to otto_controller_source/Core/Inc/actionlib/TestRequestActionFeedback.h diff --git a/otto_controller_source/Inc/actionlib/TestRequestActionGoal.h b/otto_controller_source/Core/Inc/actionlib/TestRequestActionGoal.h similarity index 100% rename from otto_controller_source/Inc/actionlib/TestRequestActionGoal.h rename to otto_controller_source/Core/Inc/actionlib/TestRequestActionGoal.h diff --git a/otto_controller_source/Inc/actionlib/TestRequestActionResult.h b/otto_controller_source/Core/Inc/actionlib/TestRequestActionResult.h similarity index 100% rename from otto_controller_source/Inc/actionlib/TestRequestActionResult.h rename to otto_controller_source/Core/Inc/actionlib/TestRequestActionResult.h diff --git a/otto_controller_source/Inc/actionlib/TestRequestFeedback.h b/otto_controller_source/Core/Inc/actionlib/TestRequestFeedback.h similarity index 100% rename from otto_controller_source/Inc/actionlib/TestRequestFeedback.h rename to otto_controller_source/Core/Inc/actionlib/TestRequestFeedback.h diff --git a/otto_controller_source/Inc/actionlib/TestRequestGoal.h b/otto_controller_source/Core/Inc/actionlib/TestRequestGoal.h similarity index 100% rename from otto_controller_source/Inc/actionlib/TestRequestGoal.h rename to otto_controller_source/Core/Inc/actionlib/TestRequestGoal.h diff --git a/otto_controller_source/Inc/actionlib/TestRequestResult.h b/otto_controller_source/Core/Inc/actionlib/TestRequestResult.h similarity index 100% rename from otto_controller_source/Inc/actionlib/TestRequestResult.h rename to otto_controller_source/Core/Inc/actionlib/TestRequestResult.h diff --git a/otto_controller_source/Inc/actionlib/TestResult.h b/otto_controller_source/Core/Inc/actionlib/TestResult.h similarity index 100% rename from otto_controller_source/Inc/actionlib/TestResult.h rename to otto_controller_source/Core/Inc/actionlib/TestResult.h diff --git a/otto_controller_source/Inc/actionlib/TwoIntsAction.h b/otto_controller_source/Core/Inc/actionlib/TwoIntsAction.h similarity index 100% rename from otto_controller_source/Inc/actionlib/TwoIntsAction.h rename to otto_controller_source/Core/Inc/actionlib/TwoIntsAction.h diff --git a/otto_controller_source/Inc/actionlib/TwoIntsActionFeedback.h b/otto_controller_source/Core/Inc/actionlib/TwoIntsActionFeedback.h similarity index 100% rename from otto_controller_source/Inc/actionlib/TwoIntsActionFeedback.h rename to otto_controller_source/Core/Inc/actionlib/TwoIntsActionFeedback.h diff --git a/otto_controller_source/Inc/actionlib/TwoIntsActionGoal.h b/otto_controller_source/Core/Inc/actionlib/TwoIntsActionGoal.h similarity index 100% rename from otto_controller_source/Inc/actionlib/TwoIntsActionGoal.h rename to otto_controller_source/Core/Inc/actionlib/TwoIntsActionGoal.h diff --git a/otto_controller_source/Inc/actionlib/TwoIntsActionResult.h b/otto_controller_source/Core/Inc/actionlib/TwoIntsActionResult.h similarity index 100% rename from otto_controller_source/Inc/actionlib/TwoIntsActionResult.h rename to otto_controller_source/Core/Inc/actionlib/TwoIntsActionResult.h diff --git a/otto_controller_source/Inc/actionlib/TwoIntsFeedback.h b/otto_controller_source/Core/Inc/actionlib/TwoIntsFeedback.h similarity index 100% rename from otto_controller_source/Inc/actionlib/TwoIntsFeedback.h rename to otto_controller_source/Core/Inc/actionlib/TwoIntsFeedback.h diff --git a/otto_controller_source/Inc/actionlib/TwoIntsGoal.h b/otto_controller_source/Core/Inc/actionlib/TwoIntsGoal.h similarity index 100% rename from otto_controller_source/Inc/actionlib/TwoIntsGoal.h rename to otto_controller_source/Core/Inc/actionlib/TwoIntsGoal.h diff --git a/otto_controller_source/Inc/actionlib/TwoIntsResult.h b/otto_controller_source/Core/Inc/actionlib/TwoIntsResult.h similarity index 100% rename from otto_controller_source/Inc/actionlib/TwoIntsResult.h rename to otto_controller_source/Core/Inc/actionlib/TwoIntsResult.h diff --git a/otto_controller_source/Inc/actionlib_msgs/GoalID.h b/otto_controller_source/Core/Inc/actionlib_msgs/GoalID.h similarity index 100% rename from otto_controller_source/Inc/actionlib_msgs/GoalID.h rename to otto_controller_source/Core/Inc/actionlib_msgs/GoalID.h diff --git a/otto_controller_source/Inc/actionlib_msgs/GoalStatus.h b/otto_controller_source/Core/Inc/actionlib_msgs/GoalStatus.h similarity index 100% rename from otto_controller_source/Inc/actionlib_msgs/GoalStatus.h rename to otto_controller_source/Core/Inc/actionlib_msgs/GoalStatus.h diff --git a/otto_controller_source/Inc/actionlib_msgs/GoalStatusArray.h b/otto_controller_source/Core/Inc/actionlib_msgs/GoalStatusArray.h similarity index 100% rename from otto_controller_source/Inc/actionlib_msgs/GoalStatusArray.h rename to otto_controller_source/Core/Inc/actionlib_msgs/GoalStatusArray.h diff --git a/otto_controller_source/Inc/actionlib_tutorials/AveragingAction.h b/otto_controller_source/Core/Inc/actionlib_tutorials/AveragingAction.h similarity index 100% rename from otto_controller_source/Inc/actionlib_tutorials/AveragingAction.h rename to otto_controller_source/Core/Inc/actionlib_tutorials/AveragingAction.h diff --git a/otto_controller_source/Inc/actionlib_tutorials/AveragingActionFeedback.h b/otto_controller_source/Core/Inc/actionlib_tutorials/AveragingActionFeedback.h similarity index 100% rename from otto_controller_source/Inc/actionlib_tutorials/AveragingActionFeedback.h rename to otto_controller_source/Core/Inc/actionlib_tutorials/AveragingActionFeedback.h diff --git a/otto_controller_source/Inc/actionlib_tutorials/AveragingActionGoal.h b/otto_controller_source/Core/Inc/actionlib_tutorials/AveragingActionGoal.h similarity index 100% rename from otto_controller_source/Inc/actionlib_tutorials/AveragingActionGoal.h rename to otto_controller_source/Core/Inc/actionlib_tutorials/AveragingActionGoal.h diff --git a/otto_controller_source/Inc/actionlib_tutorials/AveragingActionResult.h b/otto_controller_source/Core/Inc/actionlib_tutorials/AveragingActionResult.h similarity index 100% rename from otto_controller_source/Inc/actionlib_tutorials/AveragingActionResult.h rename to otto_controller_source/Core/Inc/actionlib_tutorials/AveragingActionResult.h diff --git a/otto_controller_source/Inc/actionlib_tutorials/AveragingFeedback.h b/otto_controller_source/Core/Inc/actionlib_tutorials/AveragingFeedback.h similarity index 100% rename from otto_controller_source/Inc/actionlib_tutorials/AveragingFeedback.h rename to otto_controller_source/Core/Inc/actionlib_tutorials/AveragingFeedback.h diff --git a/otto_controller_source/Inc/actionlib_tutorials/AveragingGoal.h b/otto_controller_source/Core/Inc/actionlib_tutorials/AveragingGoal.h similarity index 100% rename from otto_controller_source/Inc/actionlib_tutorials/AveragingGoal.h rename to otto_controller_source/Core/Inc/actionlib_tutorials/AveragingGoal.h diff --git a/otto_controller_source/Inc/actionlib_tutorials/AveragingResult.h b/otto_controller_source/Core/Inc/actionlib_tutorials/AveragingResult.h similarity index 100% rename from otto_controller_source/Inc/actionlib_tutorials/AveragingResult.h rename to otto_controller_source/Core/Inc/actionlib_tutorials/AveragingResult.h diff --git a/otto_controller_source/Inc/actionlib_tutorials/FibonacciAction.h b/otto_controller_source/Core/Inc/actionlib_tutorials/FibonacciAction.h similarity index 100% rename from otto_controller_source/Inc/actionlib_tutorials/FibonacciAction.h rename to otto_controller_source/Core/Inc/actionlib_tutorials/FibonacciAction.h diff --git a/otto_controller_source/Inc/actionlib_tutorials/FibonacciActionFeedback.h b/otto_controller_source/Core/Inc/actionlib_tutorials/FibonacciActionFeedback.h similarity index 100% rename from otto_controller_source/Inc/actionlib_tutorials/FibonacciActionFeedback.h rename to otto_controller_source/Core/Inc/actionlib_tutorials/FibonacciActionFeedback.h diff --git a/otto_controller_source/Inc/actionlib_tutorials/FibonacciActionGoal.h b/otto_controller_source/Core/Inc/actionlib_tutorials/FibonacciActionGoal.h similarity index 100% rename from otto_controller_source/Inc/actionlib_tutorials/FibonacciActionGoal.h rename to otto_controller_source/Core/Inc/actionlib_tutorials/FibonacciActionGoal.h diff --git a/otto_controller_source/Inc/actionlib_tutorials/FibonacciActionResult.h b/otto_controller_source/Core/Inc/actionlib_tutorials/FibonacciActionResult.h similarity index 100% rename from otto_controller_source/Inc/actionlib_tutorials/FibonacciActionResult.h rename to otto_controller_source/Core/Inc/actionlib_tutorials/FibonacciActionResult.h diff --git a/otto_controller_source/Inc/actionlib_tutorials/FibonacciFeedback.h b/otto_controller_source/Core/Inc/actionlib_tutorials/FibonacciFeedback.h similarity index 100% rename from otto_controller_source/Inc/actionlib_tutorials/FibonacciFeedback.h rename to otto_controller_source/Core/Inc/actionlib_tutorials/FibonacciFeedback.h diff --git a/otto_controller_source/Inc/actionlib_tutorials/FibonacciGoal.h b/otto_controller_source/Core/Inc/actionlib_tutorials/FibonacciGoal.h similarity index 100% rename from otto_controller_source/Inc/actionlib_tutorials/FibonacciGoal.h rename to otto_controller_source/Core/Inc/actionlib_tutorials/FibonacciGoal.h diff --git a/otto_controller_source/Inc/actionlib_tutorials/FibonacciResult.h b/otto_controller_source/Core/Inc/actionlib_tutorials/FibonacciResult.h similarity index 100% rename from otto_controller_source/Inc/actionlib_tutorials/FibonacciResult.h rename to otto_controller_source/Core/Inc/actionlib_tutorials/FibonacciResult.h diff --git a/otto_controller_source/Inc/bond/Constants.h b/otto_controller_source/Core/Inc/bond/Constants.h similarity index 100% rename from otto_controller_source/Inc/bond/Constants.h rename to otto_controller_source/Core/Inc/bond/Constants.h diff --git a/otto_controller_source/Inc/bond/Status.h b/otto_controller_source/Core/Inc/bond/Status.h similarity index 100% rename from otto_controller_source/Inc/bond/Status.h rename to otto_controller_source/Core/Inc/bond/Status.h diff --git a/otto_controller_source/Inc/control_msgs/FollowJointTrajectoryAction.h b/otto_controller_source/Core/Inc/control_msgs/FollowJointTrajectoryAction.h similarity index 100% rename from otto_controller_source/Inc/control_msgs/FollowJointTrajectoryAction.h rename to otto_controller_source/Core/Inc/control_msgs/FollowJointTrajectoryAction.h diff --git a/otto_controller_source/Inc/control_msgs/FollowJointTrajectoryActionFeedback.h b/otto_controller_source/Core/Inc/control_msgs/FollowJointTrajectoryActionFeedback.h similarity index 100% rename from otto_controller_source/Inc/control_msgs/FollowJointTrajectoryActionFeedback.h rename to otto_controller_source/Core/Inc/control_msgs/FollowJointTrajectoryActionFeedback.h diff --git a/otto_controller_source/Inc/control_msgs/FollowJointTrajectoryActionGoal.h b/otto_controller_source/Core/Inc/control_msgs/FollowJointTrajectoryActionGoal.h similarity index 100% rename from otto_controller_source/Inc/control_msgs/FollowJointTrajectoryActionGoal.h rename to otto_controller_source/Core/Inc/control_msgs/FollowJointTrajectoryActionGoal.h diff --git a/otto_controller_source/Inc/control_msgs/FollowJointTrajectoryActionResult.h b/otto_controller_source/Core/Inc/control_msgs/FollowJointTrajectoryActionResult.h similarity index 100% rename from otto_controller_source/Inc/control_msgs/FollowJointTrajectoryActionResult.h rename to otto_controller_source/Core/Inc/control_msgs/FollowJointTrajectoryActionResult.h diff --git a/otto_controller_source/Inc/control_msgs/FollowJointTrajectoryFeedback.h b/otto_controller_source/Core/Inc/control_msgs/FollowJointTrajectoryFeedback.h similarity index 100% rename from otto_controller_source/Inc/control_msgs/FollowJointTrajectoryFeedback.h rename to otto_controller_source/Core/Inc/control_msgs/FollowJointTrajectoryFeedback.h diff --git a/otto_controller_source/Inc/control_msgs/FollowJointTrajectoryGoal.h b/otto_controller_source/Core/Inc/control_msgs/FollowJointTrajectoryGoal.h similarity index 100% rename from otto_controller_source/Inc/control_msgs/FollowJointTrajectoryGoal.h rename to otto_controller_source/Core/Inc/control_msgs/FollowJointTrajectoryGoal.h diff --git a/otto_controller_source/Inc/control_msgs/FollowJointTrajectoryResult.h b/otto_controller_source/Core/Inc/control_msgs/FollowJointTrajectoryResult.h similarity index 100% rename from otto_controller_source/Inc/control_msgs/FollowJointTrajectoryResult.h rename to otto_controller_source/Core/Inc/control_msgs/FollowJointTrajectoryResult.h diff --git a/otto_controller_source/Inc/control_msgs/GripperCommand.h b/otto_controller_source/Core/Inc/control_msgs/GripperCommand.h similarity index 100% rename from otto_controller_source/Inc/control_msgs/GripperCommand.h rename to otto_controller_source/Core/Inc/control_msgs/GripperCommand.h diff --git a/otto_controller_source/Inc/control_msgs/GripperCommandAction.h b/otto_controller_source/Core/Inc/control_msgs/GripperCommandAction.h similarity index 100% rename from otto_controller_source/Inc/control_msgs/GripperCommandAction.h rename to otto_controller_source/Core/Inc/control_msgs/GripperCommandAction.h diff --git a/otto_controller_source/Inc/control_msgs/GripperCommandActionFeedback.h b/otto_controller_source/Core/Inc/control_msgs/GripperCommandActionFeedback.h similarity index 100% rename from otto_controller_source/Inc/control_msgs/GripperCommandActionFeedback.h rename to otto_controller_source/Core/Inc/control_msgs/GripperCommandActionFeedback.h diff --git a/otto_controller_source/Inc/control_msgs/GripperCommandActionGoal.h b/otto_controller_source/Core/Inc/control_msgs/GripperCommandActionGoal.h similarity index 100% rename from otto_controller_source/Inc/control_msgs/GripperCommandActionGoal.h rename to otto_controller_source/Core/Inc/control_msgs/GripperCommandActionGoal.h diff --git a/otto_controller_source/Inc/control_msgs/GripperCommandActionResult.h b/otto_controller_source/Core/Inc/control_msgs/GripperCommandActionResult.h similarity index 100% rename from otto_controller_source/Inc/control_msgs/GripperCommandActionResult.h rename to otto_controller_source/Core/Inc/control_msgs/GripperCommandActionResult.h diff --git a/otto_controller_source/Inc/control_msgs/GripperCommandFeedback.h b/otto_controller_source/Core/Inc/control_msgs/GripperCommandFeedback.h similarity index 100% rename from otto_controller_source/Inc/control_msgs/GripperCommandFeedback.h rename to otto_controller_source/Core/Inc/control_msgs/GripperCommandFeedback.h diff --git a/otto_controller_source/Inc/control_msgs/GripperCommandGoal.h b/otto_controller_source/Core/Inc/control_msgs/GripperCommandGoal.h similarity index 100% rename from otto_controller_source/Inc/control_msgs/GripperCommandGoal.h rename to otto_controller_source/Core/Inc/control_msgs/GripperCommandGoal.h diff --git a/otto_controller_source/Inc/control_msgs/GripperCommandResult.h b/otto_controller_source/Core/Inc/control_msgs/GripperCommandResult.h similarity index 100% rename from otto_controller_source/Inc/control_msgs/GripperCommandResult.h rename to otto_controller_source/Core/Inc/control_msgs/GripperCommandResult.h diff --git a/otto_controller_source/Inc/control_msgs/JointControllerState.h b/otto_controller_source/Core/Inc/control_msgs/JointControllerState.h similarity index 100% rename from otto_controller_source/Inc/control_msgs/JointControllerState.h rename to otto_controller_source/Core/Inc/control_msgs/JointControllerState.h diff --git a/otto_controller_source/Inc/control_msgs/JointJog.h b/otto_controller_source/Core/Inc/control_msgs/JointJog.h similarity index 100% rename from otto_controller_source/Inc/control_msgs/JointJog.h rename to otto_controller_source/Core/Inc/control_msgs/JointJog.h diff --git a/otto_controller_source/Inc/control_msgs/JointTolerance.h b/otto_controller_source/Core/Inc/control_msgs/JointTolerance.h similarity index 100% rename from otto_controller_source/Inc/control_msgs/JointTolerance.h rename to otto_controller_source/Core/Inc/control_msgs/JointTolerance.h diff --git a/otto_controller_source/Inc/control_msgs/JointTrajectoryAction.h b/otto_controller_source/Core/Inc/control_msgs/JointTrajectoryAction.h similarity index 100% rename from otto_controller_source/Inc/control_msgs/JointTrajectoryAction.h rename to otto_controller_source/Core/Inc/control_msgs/JointTrajectoryAction.h diff --git a/otto_controller_source/Inc/control_msgs/JointTrajectoryActionFeedback.h b/otto_controller_source/Core/Inc/control_msgs/JointTrajectoryActionFeedback.h similarity index 100% rename from otto_controller_source/Inc/control_msgs/JointTrajectoryActionFeedback.h rename to otto_controller_source/Core/Inc/control_msgs/JointTrajectoryActionFeedback.h diff --git a/otto_controller_source/Inc/control_msgs/JointTrajectoryActionGoal.h b/otto_controller_source/Core/Inc/control_msgs/JointTrajectoryActionGoal.h similarity index 100% rename from otto_controller_source/Inc/control_msgs/JointTrajectoryActionGoal.h rename to otto_controller_source/Core/Inc/control_msgs/JointTrajectoryActionGoal.h diff --git a/otto_controller_source/Inc/control_msgs/JointTrajectoryActionResult.h b/otto_controller_source/Core/Inc/control_msgs/JointTrajectoryActionResult.h similarity index 100% rename from otto_controller_source/Inc/control_msgs/JointTrajectoryActionResult.h rename to otto_controller_source/Core/Inc/control_msgs/JointTrajectoryActionResult.h diff --git a/otto_controller_source/Inc/control_msgs/JointTrajectoryControllerState.h b/otto_controller_source/Core/Inc/control_msgs/JointTrajectoryControllerState.h similarity index 100% rename from otto_controller_source/Inc/control_msgs/JointTrajectoryControllerState.h rename to otto_controller_source/Core/Inc/control_msgs/JointTrajectoryControllerState.h diff --git a/otto_controller_source/Inc/control_msgs/JointTrajectoryFeedback.h b/otto_controller_source/Core/Inc/control_msgs/JointTrajectoryFeedback.h similarity index 100% rename from otto_controller_source/Inc/control_msgs/JointTrajectoryFeedback.h rename to otto_controller_source/Core/Inc/control_msgs/JointTrajectoryFeedback.h diff --git a/otto_controller_source/Inc/control_msgs/JointTrajectoryGoal.h b/otto_controller_source/Core/Inc/control_msgs/JointTrajectoryGoal.h similarity index 100% rename from otto_controller_source/Inc/control_msgs/JointTrajectoryGoal.h rename to otto_controller_source/Core/Inc/control_msgs/JointTrajectoryGoal.h diff --git a/otto_controller_source/Inc/control_msgs/JointTrajectoryResult.h b/otto_controller_source/Core/Inc/control_msgs/JointTrajectoryResult.h similarity index 100% rename from otto_controller_source/Inc/control_msgs/JointTrajectoryResult.h rename to otto_controller_source/Core/Inc/control_msgs/JointTrajectoryResult.h diff --git a/otto_controller_source/Inc/control_msgs/PidState.h b/otto_controller_source/Core/Inc/control_msgs/PidState.h similarity index 100% rename from otto_controller_source/Inc/control_msgs/PidState.h rename to otto_controller_source/Core/Inc/control_msgs/PidState.h diff --git a/otto_controller_source/Inc/control_msgs/PointHeadAction.h b/otto_controller_source/Core/Inc/control_msgs/PointHeadAction.h similarity index 100% rename from otto_controller_source/Inc/control_msgs/PointHeadAction.h rename to otto_controller_source/Core/Inc/control_msgs/PointHeadAction.h diff --git a/otto_controller_source/Inc/control_msgs/PointHeadActionFeedback.h b/otto_controller_source/Core/Inc/control_msgs/PointHeadActionFeedback.h similarity index 100% rename from otto_controller_source/Inc/control_msgs/PointHeadActionFeedback.h rename to otto_controller_source/Core/Inc/control_msgs/PointHeadActionFeedback.h diff --git a/otto_controller_source/Inc/control_msgs/PointHeadActionGoal.h b/otto_controller_source/Core/Inc/control_msgs/PointHeadActionGoal.h similarity index 100% rename from otto_controller_source/Inc/control_msgs/PointHeadActionGoal.h rename to otto_controller_source/Core/Inc/control_msgs/PointHeadActionGoal.h diff --git a/otto_controller_source/Inc/control_msgs/PointHeadActionResult.h b/otto_controller_source/Core/Inc/control_msgs/PointHeadActionResult.h similarity index 100% rename from otto_controller_source/Inc/control_msgs/PointHeadActionResult.h rename to otto_controller_source/Core/Inc/control_msgs/PointHeadActionResult.h diff --git a/otto_controller_source/Inc/control_msgs/PointHeadFeedback.h b/otto_controller_source/Core/Inc/control_msgs/PointHeadFeedback.h similarity index 100% rename from otto_controller_source/Inc/control_msgs/PointHeadFeedback.h rename to otto_controller_source/Core/Inc/control_msgs/PointHeadFeedback.h diff --git a/otto_controller_source/Inc/control_msgs/PointHeadGoal.h b/otto_controller_source/Core/Inc/control_msgs/PointHeadGoal.h similarity index 100% rename from otto_controller_source/Inc/control_msgs/PointHeadGoal.h rename to otto_controller_source/Core/Inc/control_msgs/PointHeadGoal.h diff --git a/otto_controller_source/Inc/control_msgs/PointHeadResult.h b/otto_controller_source/Core/Inc/control_msgs/PointHeadResult.h similarity index 100% rename from otto_controller_source/Inc/control_msgs/PointHeadResult.h rename to otto_controller_source/Core/Inc/control_msgs/PointHeadResult.h diff --git a/otto_controller_source/Inc/control_msgs/QueryCalibrationState.h b/otto_controller_source/Core/Inc/control_msgs/QueryCalibrationState.h similarity index 100% rename from otto_controller_source/Inc/control_msgs/QueryCalibrationState.h rename to otto_controller_source/Core/Inc/control_msgs/QueryCalibrationState.h diff --git a/otto_controller_source/Inc/control_msgs/QueryTrajectoryState.h b/otto_controller_source/Core/Inc/control_msgs/QueryTrajectoryState.h similarity index 100% rename from otto_controller_source/Inc/control_msgs/QueryTrajectoryState.h rename to otto_controller_source/Core/Inc/control_msgs/QueryTrajectoryState.h diff --git a/otto_controller_source/Inc/control_msgs/SingleJointPositionAction.h b/otto_controller_source/Core/Inc/control_msgs/SingleJointPositionAction.h similarity index 100% rename from otto_controller_source/Inc/control_msgs/SingleJointPositionAction.h rename to otto_controller_source/Core/Inc/control_msgs/SingleJointPositionAction.h diff --git a/otto_controller_source/Inc/control_msgs/SingleJointPositionActionFeedback.h b/otto_controller_source/Core/Inc/control_msgs/SingleJointPositionActionFeedback.h similarity index 100% rename from otto_controller_source/Inc/control_msgs/SingleJointPositionActionFeedback.h rename to otto_controller_source/Core/Inc/control_msgs/SingleJointPositionActionFeedback.h diff --git a/otto_controller_source/Inc/control_msgs/SingleJointPositionActionGoal.h b/otto_controller_source/Core/Inc/control_msgs/SingleJointPositionActionGoal.h similarity index 100% rename from otto_controller_source/Inc/control_msgs/SingleJointPositionActionGoal.h rename to otto_controller_source/Core/Inc/control_msgs/SingleJointPositionActionGoal.h diff --git a/otto_controller_source/Inc/control_msgs/SingleJointPositionActionResult.h b/otto_controller_source/Core/Inc/control_msgs/SingleJointPositionActionResult.h similarity index 100% rename from otto_controller_source/Inc/control_msgs/SingleJointPositionActionResult.h rename to otto_controller_source/Core/Inc/control_msgs/SingleJointPositionActionResult.h diff --git a/otto_controller_source/Inc/control_msgs/SingleJointPositionFeedback.h b/otto_controller_source/Core/Inc/control_msgs/SingleJointPositionFeedback.h similarity index 100% rename from otto_controller_source/Inc/control_msgs/SingleJointPositionFeedback.h rename to otto_controller_source/Core/Inc/control_msgs/SingleJointPositionFeedback.h diff --git a/otto_controller_source/Inc/control_msgs/SingleJointPositionGoal.h b/otto_controller_source/Core/Inc/control_msgs/SingleJointPositionGoal.h similarity index 100% rename from otto_controller_source/Inc/control_msgs/SingleJointPositionGoal.h rename to otto_controller_source/Core/Inc/control_msgs/SingleJointPositionGoal.h diff --git a/otto_controller_source/Inc/control_msgs/SingleJointPositionResult.h b/otto_controller_source/Core/Inc/control_msgs/SingleJointPositionResult.h similarity index 100% rename from otto_controller_source/Inc/control_msgs/SingleJointPositionResult.h rename to otto_controller_source/Core/Inc/control_msgs/SingleJointPositionResult.h diff --git a/otto_controller_source/Inc/control_toolbox/SetPidGains.h b/otto_controller_source/Core/Inc/control_toolbox/SetPidGains.h similarity index 100% rename from otto_controller_source/Inc/control_toolbox/SetPidGains.h rename to otto_controller_source/Core/Inc/control_toolbox/SetPidGains.h diff --git a/otto_controller_source/Inc/controller_manager_msgs/ControllerState.h b/otto_controller_source/Core/Inc/controller_manager_msgs/ControllerState.h similarity index 100% rename from otto_controller_source/Inc/controller_manager_msgs/ControllerState.h rename to otto_controller_source/Core/Inc/controller_manager_msgs/ControllerState.h diff --git a/otto_controller_source/Inc/controller_manager_msgs/ControllerStatistics.h b/otto_controller_source/Core/Inc/controller_manager_msgs/ControllerStatistics.h similarity index 100% rename from otto_controller_source/Inc/controller_manager_msgs/ControllerStatistics.h rename to otto_controller_source/Core/Inc/controller_manager_msgs/ControllerStatistics.h diff --git a/otto_controller_source/Inc/controller_manager_msgs/ControllersStatistics.h b/otto_controller_source/Core/Inc/controller_manager_msgs/ControllersStatistics.h similarity index 100% rename from otto_controller_source/Inc/controller_manager_msgs/ControllersStatistics.h rename to otto_controller_source/Core/Inc/controller_manager_msgs/ControllersStatistics.h diff --git a/otto_controller_source/Inc/controller_manager_msgs/HardwareInterfaceResources.h b/otto_controller_source/Core/Inc/controller_manager_msgs/HardwareInterfaceResources.h similarity index 100% rename from otto_controller_source/Inc/controller_manager_msgs/HardwareInterfaceResources.h rename to otto_controller_source/Core/Inc/controller_manager_msgs/HardwareInterfaceResources.h diff --git a/otto_controller_source/Inc/controller_manager_msgs/ListControllerTypes.h b/otto_controller_source/Core/Inc/controller_manager_msgs/ListControllerTypes.h similarity index 100% rename from otto_controller_source/Inc/controller_manager_msgs/ListControllerTypes.h rename to otto_controller_source/Core/Inc/controller_manager_msgs/ListControllerTypes.h diff --git a/otto_controller_source/Inc/controller_manager_msgs/ListControllers.h b/otto_controller_source/Core/Inc/controller_manager_msgs/ListControllers.h similarity index 100% rename from otto_controller_source/Inc/controller_manager_msgs/ListControllers.h rename to otto_controller_source/Core/Inc/controller_manager_msgs/ListControllers.h diff --git a/otto_controller_source/Inc/controller_manager_msgs/LoadController.h b/otto_controller_source/Core/Inc/controller_manager_msgs/LoadController.h similarity index 100% rename from otto_controller_source/Inc/controller_manager_msgs/LoadController.h rename to otto_controller_source/Core/Inc/controller_manager_msgs/LoadController.h diff --git a/otto_controller_source/Inc/controller_manager_msgs/ReloadControllerLibraries.h b/otto_controller_source/Core/Inc/controller_manager_msgs/ReloadControllerLibraries.h similarity index 100% rename from otto_controller_source/Inc/controller_manager_msgs/ReloadControllerLibraries.h rename to otto_controller_source/Core/Inc/controller_manager_msgs/ReloadControllerLibraries.h diff --git a/otto_controller_source/Inc/controller_manager_msgs/SwitchController.h b/otto_controller_source/Core/Inc/controller_manager_msgs/SwitchController.h similarity index 100% rename from otto_controller_source/Inc/controller_manager_msgs/SwitchController.h rename to otto_controller_source/Core/Inc/controller_manager_msgs/SwitchController.h diff --git a/otto_controller_source/Inc/controller_manager_msgs/UnloadController.h b/otto_controller_source/Core/Inc/controller_manager_msgs/UnloadController.h similarity index 100% rename from otto_controller_source/Inc/controller_manager_msgs/UnloadController.h rename to otto_controller_source/Core/Inc/controller_manager_msgs/UnloadController.h diff --git a/otto_controller_source/Inc/diagnostic_msgs/AddDiagnostics.h b/otto_controller_source/Core/Inc/diagnostic_msgs/AddDiagnostics.h similarity index 100% rename from otto_controller_source/Inc/diagnostic_msgs/AddDiagnostics.h rename to otto_controller_source/Core/Inc/diagnostic_msgs/AddDiagnostics.h diff --git a/otto_controller_source/Inc/diagnostic_msgs/DiagnosticArray.h b/otto_controller_source/Core/Inc/diagnostic_msgs/DiagnosticArray.h similarity index 100% rename from otto_controller_source/Inc/diagnostic_msgs/DiagnosticArray.h rename to otto_controller_source/Core/Inc/diagnostic_msgs/DiagnosticArray.h diff --git a/otto_controller_source/Inc/diagnostic_msgs/DiagnosticStatus.h b/otto_controller_source/Core/Inc/diagnostic_msgs/DiagnosticStatus.h similarity index 100% rename from otto_controller_source/Inc/diagnostic_msgs/DiagnosticStatus.h rename to otto_controller_source/Core/Inc/diagnostic_msgs/DiagnosticStatus.h diff --git a/otto_controller_source/Inc/diagnostic_msgs/KeyValue.h b/otto_controller_source/Core/Inc/diagnostic_msgs/KeyValue.h similarity index 100% rename from otto_controller_source/Inc/diagnostic_msgs/KeyValue.h rename to otto_controller_source/Core/Inc/diagnostic_msgs/KeyValue.h diff --git a/otto_controller_source/Inc/diagnostic_msgs/SelfTest.h b/otto_controller_source/Core/Inc/diagnostic_msgs/SelfTest.h similarity index 100% rename from otto_controller_source/Inc/diagnostic_msgs/SelfTest.h rename to otto_controller_source/Core/Inc/diagnostic_msgs/SelfTest.h diff --git a/otto_controller_source/Inc/dynamic_reconfigure/BoolParameter.h b/otto_controller_source/Core/Inc/dynamic_reconfigure/BoolParameter.h similarity index 100% rename from otto_controller_source/Inc/dynamic_reconfigure/BoolParameter.h rename to otto_controller_source/Core/Inc/dynamic_reconfigure/BoolParameter.h diff --git a/otto_controller_source/Inc/dynamic_reconfigure/Config.h b/otto_controller_source/Core/Inc/dynamic_reconfigure/Config.h similarity index 100% rename from otto_controller_source/Inc/dynamic_reconfigure/Config.h rename to otto_controller_source/Core/Inc/dynamic_reconfigure/Config.h diff --git a/otto_controller_source/Inc/dynamic_reconfigure/ConfigDescription.h b/otto_controller_source/Core/Inc/dynamic_reconfigure/ConfigDescription.h similarity index 100% rename from otto_controller_source/Inc/dynamic_reconfigure/ConfigDescription.h rename to otto_controller_source/Core/Inc/dynamic_reconfigure/ConfigDescription.h diff --git a/otto_controller_source/Inc/dynamic_reconfigure/DoubleParameter.h b/otto_controller_source/Core/Inc/dynamic_reconfigure/DoubleParameter.h similarity index 100% rename from otto_controller_source/Inc/dynamic_reconfigure/DoubleParameter.h rename to otto_controller_source/Core/Inc/dynamic_reconfigure/DoubleParameter.h diff --git a/otto_controller_source/Inc/dynamic_reconfigure/Group.h b/otto_controller_source/Core/Inc/dynamic_reconfigure/Group.h similarity index 100% rename from otto_controller_source/Inc/dynamic_reconfigure/Group.h rename to otto_controller_source/Core/Inc/dynamic_reconfigure/Group.h diff --git a/otto_controller_source/Inc/dynamic_reconfigure/GroupState.h b/otto_controller_source/Core/Inc/dynamic_reconfigure/GroupState.h similarity index 100% rename from otto_controller_source/Inc/dynamic_reconfigure/GroupState.h rename to otto_controller_source/Core/Inc/dynamic_reconfigure/GroupState.h diff --git a/otto_controller_source/Inc/dynamic_reconfigure/IntParameter.h b/otto_controller_source/Core/Inc/dynamic_reconfigure/IntParameter.h similarity index 100% rename from otto_controller_source/Inc/dynamic_reconfigure/IntParameter.h rename to otto_controller_source/Core/Inc/dynamic_reconfigure/IntParameter.h diff --git a/otto_controller_source/Inc/dynamic_reconfigure/ParamDescription.h b/otto_controller_source/Core/Inc/dynamic_reconfigure/ParamDescription.h similarity index 100% rename from otto_controller_source/Inc/dynamic_reconfigure/ParamDescription.h rename to otto_controller_source/Core/Inc/dynamic_reconfigure/ParamDescription.h diff --git a/otto_controller_source/Inc/dynamic_reconfigure/Reconfigure.h b/otto_controller_source/Core/Inc/dynamic_reconfigure/Reconfigure.h similarity index 100% rename from otto_controller_source/Inc/dynamic_reconfigure/Reconfigure.h rename to otto_controller_source/Core/Inc/dynamic_reconfigure/Reconfigure.h diff --git a/otto_controller_source/Inc/dynamic_reconfigure/SensorLevels.h b/otto_controller_source/Core/Inc/dynamic_reconfigure/SensorLevels.h similarity index 100% rename from otto_controller_source/Inc/dynamic_reconfigure/SensorLevels.h rename to otto_controller_source/Core/Inc/dynamic_reconfigure/SensorLevels.h diff --git a/otto_controller_source/Inc/dynamic_reconfigure/StrParameter.h b/otto_controller_source/Core/Inc/dynamic_reconfigure/StrParameter.h similarity index 100% rename from otto_controller_source/Inc/dynamic_reconfigure/StrParameter.h rename to otto_controller_source/Core/Inc/dynamic_reconfigure/StrParameter.h diff --git a/otto_controller_source/Inc/encoder.h b/otto_controller_source/Core/Inc/encoder.h similarity index 87% rename from otto_controller_source/Inc/encoder.h rename to otto_controller_source/Core/Inc/encoder.h index 72f2236..ae884cf 100644 --- a/otto_controller_source/Inc/encoder.h +++ b/otto_controller_source/Core/Inc/encoder.h @@ -23,7 +23,8 @@ class Encoder { void Setup(); int GetCount() { - int count = ((int)__HAL_TIM_GET_COUNTER(timer_) - ((timer_->Init.Period)/2)); + int count = ((int)__HAL_TIM_GET_COUNTER(this->timer_) - + ((this->timer_->Init.Period)/2)); return count; } diff --git a/otto_controller_source/Inc/gazebo_msgs/ApplyBodyWrench.h b/otto_controller_source/Core/Inc/gazebo_msgs/ApplyBodyWrench.h similarity index 100% rename from otto_controller_source/Inc/gazebo_msgs/ApplyBodyWrench.h rename to otto_controller_source/Core/Inc/gazebo_msgs/ApplyBodyWrench.h diff --git a/otto_controller_source/Inc/gazebo_msgs/ApplyJointEffort.h b/otto_controller_source/Core/Inc/gazebo_msgs/ApplyJointEffort.h similarity index 100% rename from otto_controller_source/Inc/gazebo_msgs/ApplyJointEffort.h rename to otto_controller_source/Core/Inc/gazebo_msgs/ApplyJointEffort.h diff --git a/otto_controller_source/Inc/gazebo_msgs/BodyRequest.h b/otto_controller_source/Core/Inc/gazebo_msgs/BodyRequest.h similarity index 100% rename from otto_controller_source/Inc/gazebo_msgs/BodyRequest.h rename to otto_controller_source/Core/Inc/gazebo_msgs/BodyRequest.h diff --git a/otto_controller_source/Inc/gazebo_msgs/ContactState.h b/otto_controller_source/Core/Inc/gazebo_msgs/ContactState.h similarity index 100% rename from otto_controller_source/Inc/gazebo_msgs/ContactState.h rename to otto_controller_source/Core/Inc/gazebo_msgs/ContactState.h diff --git a/otto_controller_source/Inc/gazebo_msgs/ContactsState.h b/otto_controller_source/Core/Inc/gazebo_msgs/ContactsState.h similarity index 100% rename from otto_controller_source/Inc/gazebo_msgs/ContactsState.h rename to otto_controller_source/Core/Inc/gazebo_msgs/ContactsState.h diff --git a/otto_controller_source/Inc/gazebo_msgs/DeleteLight.h b/otto_controller_source/Core/Inc/gazebo_msgs/DeleteLight.h similarity index 100% rename from otto_controller_source/Inc/gazebo_msgs/DeleteLight.h rename to otto_controller_source/Core/Inc/gazebo_msgs/DeleteLight.h diff --git a/otto_controller_source/Inc/gazebo_msgs/DeleteModel.h b/otto_controller_source/Core/Inc/gazebo_msgs/DeleteModel.h similarity index 100% rename from otto_controller_source/Inc/gazebo_msgs/DeleteModel.h rename to otto_controller_source/Core/Inc/gazebo_msgs/DeleteModel.h diff --git a/otto_controller_source/Inc/gazebo_msgs/GetJointProperties.h b/otto_controller_source/Core/Inc/gazebo_msgs/GetJointProperties.h similarity index 100% rename from otto_controller_source/Inc/gazebo_msgs/GetJointProperties.h rename to otto_controller_source/Core/Inc/gazebo_msgs/GetJointProperties.h diff --git a/otto_controller_source/Inc/gazebo_msgs/GetLightProperties.h b/otto_controller_source/Core/Inc/gazebo_msgs/GetLightProperties.h similarity index 100% rename from otto_controller_source/Inc/gazebo_msgs/GetLightProperties.h rename to otto_controller_source/Core/Inc/gazebo_msgs/GetLightProperties.h diff --git a/otto_controller_source/Inc/gazebo_msgs/GetLinkProperties.h b/otto_controller_source/Core/Inc/gazebo_msgs/GetLinkProperties.h similarity index 100% rename from otto_controller_source/Inc/gazebo_msgs/GetLinkProperties.h rename to otto_controller_source/Core/Inc/gazebo_msgs/GetLinkProperties.h diff --git a/otto_controller_source/Inc/gazebo_msgs/GetLinkState.h b/otto_controller_source/Core/Inc/gazebo_msgs/GetLinkState.h similarity index 100% rename from otto_controller_source/Inc/gazebo_msgs/GetLinkState.h rename to otto_controller_source/Core/Inc/gazebo_msgs/GetLinkState.h diff --git a/otto_controller_source/Inc/gazebo_msgs/GetModelProperties.h b/otto_controller_source/Core/Inc/gazebo_msgs/GetModelProperties.h similarity index 100% rename from otto_controller_source/Inc/gazebo_msgs/GetModelProperties.h rename to otto_controller_source/Core/Inc/gazebo_msgs/GetModelProperties.h diff --git a/otto_controller_source/Inc/gazebo_msgs/GetModelState.h b/otto_controller_source/Core/Inc/gazebo_msgs/GetModelState.h similarity index 100% rename from otto_controller_source/Inc/gazebo_msgs/GetModelState.h rename to otto_controller_source/Core/Inc/gazebo_msgs/GetModelState.h diff --git a/otto_controller_source/Inc/gazebo_msgs/GetPhysicsProperties.h b/otto_controller_source/Core/Inc/gazebo_msgs/GetPhysicsProperties.h similarity index 100% rename from otto_controller_source/Inc/gazebo_msgs/GetPhysicsProperties.h rename to otto_controller_source/Core/Inc/gazebo_msgs/GetPhysicsProperties.h diff --git a/otto_controller_source/Inc/gazebo_msgs/GetWorldProperties.h b/otto_controller_source/Core/Inc/gazebo_msgs/GetWorldProperties.h similarity index 100% rename from otto_controller_source/Inc/gazebo_msgs/GetWorldProperties.h rename to otto_controller_source/Core/Inc/gazebo_msgs/GetWorldProperties.h diff --git a/otto_controller_source/Inc/gazebo_msgs/JointRequest.h b/otto_controller_source/Core/Inc/gazebo_msgs/JointRequest.h similarity index 100% rename from otto_controller_source/Inc/gazebo_msgs/JointRequest.h rename to otto_controller_source/Core/Inc/gazebo_msgs/JointRequest.h diff --git a/otto_controller_source/Inc/gazebo_msgs/LinkState.h b/otto_controller_source/Core/Inc/gazebo_msgs/LinkState.h similarity index 100% rename from otto_controller_source/Inc/gazebo_msgs/LinkState.h rename to otto_controller_source/Core/Inc/gazebo_msgs/LinkState.h diff --git a/otto_controller_source/Inc/gazebo_msgs/LinkStates.h b/otto_controller_source/Core/Inc/gazebo_msgs/LinkStates.h similarity index 100% rename from otto_controller_source/Inc/gazebo_msgs/LinkStates.h rename to otto_controller_source/Core/Inc/gazebo_msgs/LinkStates.h diff --git a/otto_controller_source/Inc/gazebo_msgs/ModelState.h b/otto_controller_source/Core/Inc/gazebo_msgs/ModelState.h similarity index 100% rename from otto_controller_source/Inc/gazebo_msgs/ModelState.h rename to otto_controller_source/Core/Inc/gazebo_msgs/ModelState.h diff --git a/otto_controller_source/Inc/gazebo_msgs/ModelStates.h b/otto_controller_source/Core/Inc/gazebo_msgs/ModelStates.h similarity index 100% rename from otto_controller_source/Inc/gazebo_msgs/ModelStates.h rename to otto_controller_source/Core/Inc/gazebo_msgs/ModelStates.h diff --git a/otto_controller_source/Inc/gazebo_msgs/ODEJointProperties.h b/otto_controller_source/Core/Inc/gazebo_msgs/ODEJointProperties.h similarity index 100% rename from otto_controller_source/Inc/gazebo_msgs/ODEJointProperties.h rename to otto_controller_source/Core/Inc/gazebo_msgs/ODEJointProperties.h diff --git a/otto_controller_source/Inc/gazebo_msgs/ODEPhysics.h b/otto_controller_source/Core/Inc/gazebo_msgs/ODEPhysics.h similarity index 100% rename from otto_controller_source/Inc/gazebo_msgs/ODEPhysics.h rename to otto_controller_source/Core/Inc/gazebo_msgs/ODEPhysics.h diff --git a/otto_controller_source/Inc/gazebo_msgs/SetJointProperties.h b/otto_controller_source/Core/Inc/gazebo_msgs/SetJointProperties.h similarity index 100% rename from otto_controller_source/Inc/gazebo_msgs/SetJointProperties.h rename to otto_controller_source/Core/Inc/gazebo_msgs/SetJointProperties.h diff --git a/otto_controller_source/Inc/gazebo_msgs/SetJointTrajectory.h b/otto_controller_source/Core/Inc/gazebo_msgs/SetJointTrajectory.h similarity index 100% rename from otto_controller_source/Inc/gazebo_msgs/SetJointTrajectory.h rename to otto_controller_source/Core/Inc/gazebo_msgs/SetJointTrajectory.h diff --git a/otto_controller_source/Inc/gazebo_msgs/SetLightProperties.h b/otto_controller_source/Core/Inc/gazebo_msgs/SetLightProperties.h similarity index 100% rename from otto_controller_source/Inc/gazebo_msgs/SetLightProperties.h rename to otto_controller_source/Core/Inc/gazebo_msgs/SetLightProperties.h diff --git a/otto_controller_source/Inc/gazebo_msgs/SetLinkProperties.h b/otto_controller_source/Core/Inc/gazebo_msgs/SetLinkProperties.h similarity index 100% rename from otto_controller_source/Inc/gazebo_msgs/SetLinkProperties.h rename to otto_controller_source/Core/Inc/gazebo_msgs/SetLinkProperties.h diff --git a/otto_controller_source/Inc/gazebo_msgs/SetLinkState.h b/otto_controller_source/Core/Inc/gazebo_msgs/SetLinkState.h similarity index 100% rename from otto_controller_source/Inc/gazebo_msgs/SetLinkState.h rename to otto_controller_source/Core/Inc/gazebo_msgs/SetLinkState.h diff --git a/otto_controller_source/Inc/gazebo_msgs/SetModelConfiguration.h b/otto_controller_source/Core/Inc/gazebo_msgs/SetModelConfiguration.h similarity index 100% rename from otto_controller_source/Inc/gazebo_msgs/SetModelConfiguration.h rename to otto_controller_source/Core/Inc/gazebo_msgs/SetModelConfiguration.h diff --git a/otto_controller_source/Inc/gazebo_msgs/SetModelState.h b/otto_controller_source/Core/Inc/gazebo_msgs/SetModelState.h similarity index 100% rename from otto_controller_source/Inc/gazebo_msgs/SetModelState.h rename to otto_controller_source/Core/Inc/gazebo_msgs/SetModelState.h diff --git a/otto_controller_source/Inc/gazebo_msgs/SetPhysicsProperties.h b/otto_controller_source/Core/Inc/gazebo_msgs/SetPhysicsProperties.h similarity index 100% rename from otto_controller_source/Inc/gazebo_msgs/SetPhysicsProperties.h rename to otto_controller_source/Core/Inc/gazebo_msgs/SetPhysicsProperties.h diff --git a/otto_controller_source/Inc/gazebo_msgs/SpawnModel.h b/otto_controller_source/Core/Inc/gazebo_msgs/SpawnModel.h similarity index 100% rename from otto_controller_source/Inc/gazebo_msgs/SpawnModel.h rename to otto_controller_source/Core/Inc/gazebo_msgs/SpawnModel.h diff --git a/otto_controller_source/Inc/gazebo_msgs/WorldState.h b/otto_controller_source/Core/Inc/gazebo_msgs/WorldState.h similarity index 100% rename from otto_controller_source/Inc/gazebo_msgs/WorldState.h rename to otto_controller_source/Core/Inc/gazebo_msgs/WorldState.h diff --git a/otto_controller_source/Inc/geometry_msgs/Accel.h b/otto_controller_source/Core/Inc/geometry_msgs/Accel.h similarity index 100% rename from otto_controller_source/Inc/geometry_msgs/Accel.h rename to otto_controller_source/Core/Inc/geometry_msgs/Accel.h diff --git a/otto_controller_source/Inc/geometry_msgs/AccelStamped.h b/otto_controller_source/Core/Inc/geometry_msgs/AccelStamped.h similarity index 100% rename from otto_controller_source/Inc/geometry_msgs/AccelStamped.h rename to otto_controller_source/Core/Inc/geometry_msgs/AccelStamped.h diff --git a/otto_controller_source/Inc/geometry_msgs/AccelWithCovariance.h b/otto_controller_source/Core/Inc/geometry_msgs/AccelWithCovariance.h similarity index 100% rename from otto_controller_source/Inc/geometry_msgs/AccelWithCovariance.h rename to otto_controller_source/Core/Inc/geometry_msgs/AccelWithCovariance.h diff --git a/otto_controller_source/Inc/geometry_msgs/AccelWithCovarianceStamped.h b/otto_controller_source/Core/Inc/geometry_msgs/AccelWithCovarianceStamped.h similarity index 100% rename from otto_controller_source/Inc/geometry_msgs/AccelWithCovarianceStamped.h rename to otto_controller_source/Core/Inc/geometry_msgs/AccelWithCovarianceStamped.h diff --git a/otto_controller_source/Inc/geometry_msgs/Inertia.h b/otto_controller_source/Core/Inc/geometry_msgs/Inertia.h similarity index 100% rename from otto_controller_source/Inc/geometry_msgs/Inertia.h rename to otto_controller_source/Core/Inc/geometry_msgs/Inertia.h diff --git a/otto_controller_source/Inc/geometry_msgs/InertiaStamped.h b/otto_controller_source/Core/Inc/geometry_msgs/InertiaStamped.h similarity index 100% rename from otto_controller_source/Inc/geometry_msgs/InertiaStamped.h rename to otto_controller_source/Core/Inc/geometry_msgs/InertiaStamped.h diff --git a/otto_controller_source/Inc/geometry_msgs/Point.h b/otto_controller_source/Core/Inc/geometry_msgs/Point.h similarity index 100% rename from otto_controller_source/Inc/geometry_msgs/Point.h rename to otto_controller_source/Core/Inc/geometry_msgs/Point.h diff --git a/otto_controller_source/Inc/geometry_msgs/Point32.h b/otto_controller_source/Core/Inc/geometry_msgs/Point32.h similarity index 100% rename from otto_controller_source/Inc/geometry_msgs/Point32.h rename to otto_controller_source/Core/Inc/geometry_msgs/Point32.h diff --git a/otto_controller_source/Inc/geometry_msgs/PointStamped.h b/otto_controller_source/Core/Inc/geometry_msgs/PointStamped.h similarity index 100% rename from otto_controller_source/Inc/geometry_msgs/PointStamped.h rename to otto_controller_source/Core/Inc/geometry_msgs/PointStamped.h diff --git a/otto_controller_source/Inc/geometry_msgs/Polygon.h b/otto_controller_source/Core/Inc/geometry_msgs/Polygon.h similarity index 100% rename from otto_controller_source/Inc/geometry_msgs/Polygon.h rename to otto_controller_source/Core/Inc/geometry_msgs/Polygon.h diff --git a/otto_controller_source/Inc/geometry_msgs/PolygonStamped.h b/otto_controller_source/Core/Inc/geometry_msgs/PolygonStamped.h similarity index 100% rename from otto_controller_source/Inc/geometry_msgs/PolygonStamped.h rename to otto_controller_source/Core/Inc/geometry_msgs/PolygonStamped.h diff --git a/otto_controller_source/Inc/geometry_msgs/Pose.h b/otto_controller_source/Core/Inc/geometry_msgs/Pose.h similarity index 100% rename from otto_controller_source/Inc/geometry_msgs/Pose.h rename to otto_controller_source/Core/Inc/geometry_msgs/Pose.h diff --git a/otto_controller_source/Inc/geometry_msgs/Pose2D.h b/otto_controller_source/Core/Inc/geometry_msgs/Pose2D.h similarity index 100% rename from otto_controller_source/Inc/geometry_msgs/Pose2D.h rename to otto_controller_source/Core/Inc/geometry_msgs/Pose2D.h diff --git a/otto_controller_source/Inc/geometry_msgs/PoseArray.h b/otto_controller_source/Core/Inc/geometry_msgs/PoseArray.h similarity index 100% rename from otto_controller_source/Inc/geometry_msgs/PoseArray.h rename to otto_controller_source/Core/Inc/geometry_msgs/PoseArray.h diff --git a/otto_controller_source/Inc/geometry_msgs/PoseStamped.h b/otto_controller_source/Core/Inc/geometry_msgs/PoseStamped.h similarity index 100% rename from otto_controller_source/Inc/geometry_msgs/PoseStamped.h rename to otto_controller_source/Core/Inc/geometry_msgs/PoseStamped.h diff --git a/otto_controller_source/Inc/geometry_msgs/PoseWithCovariance.h b/otto_controller_source/Core/Inc/geometry_msgs/PoseWithCovariance.h similarity index 100% rename from otto_controller_source/Inc/geometry_msgs/PoseWithCovariance.h rename to otto_controller_source/Core/Inc/geometry_msgs/PoseWithCovariance.h diff --git a/otto_controller_source/Inc/geometry_msgs/PoseWithCovarianceStamped.h b/otto_controller_source/Core/Inc/geometry_msgs/PoseWithCovarianceStamped.h similarity index 100% rename from otto_controller_source/Inc/geometry_msgs/PoseWithCovarianceStamped.h rename to otto_controller_source/Core/Inc/geometry_msgs/PoseWithCovarianceStamped.h diff --git a/otto_controller_source/Inc/geometry_msgs/Quaternion.h b/otto_controller_source/Core/Inc/geometry_msgs/Quaternion.h similarity index 100% rename from otto_controller_source/Inc/geometry_msgs/Quaternion.h rename to otto_controller_source/Core/Inc/geometry_msgs/Quaternion.h diff --git a/otto_controller_source/Inc/geometry_msgs/QuaternionStamped.h b/otto_controller_source/Core/Inc/geometry_msgs/QuaternionStamped.h similarity index 100% rename from otto_controller_source/Inc/geometry_msgs/QuaternionStamped.h rename to otto_controller_source/Core/Inc/geometry_msgs/QuaternionStamped.h diff --git a/otto_controller_source/Inc/geometry_msgs/Transform.h b/otto_controller_source/Core/Inc/geometry_msgs/Transform.h similarity index 100% rename from otto_controller_source/Inc/geometry_msgs/Transform.h rename to otto_controller_source/Core/Inc/geometry_msgs/Transform.h diff --git a/otto_controller_source/Inc/geometry_msgs/TransformStamped.h b/otto_controller_source/Core/Inc/geometry_msgs/TransformStamped.h similarity index 100% rename from otto_controller_source/Inc/geometry_msgs/TransformStamped.h rename to otto_controller_source/Core/Inc/geometry_msgs/TransformStamped.h diff --git a/otto_controller_source/Inc/geometry_msgs/Twist.h b/otto_controller_source/Core/Inc/geometry_msgs/Twist.h similarity index 100% rename from otto_controller_source/Inc/geometry_msgs/Twist.h rename to otto_controller_source/Core/Inc/geometry_msgs/Twist.h diff --git a/otto_controller_source/Inc/geometry_msgs/TwistStamped.h b/otto_controller_source/Core/Inc/geometry_msgs/TwistStamped.h similarity index 100% rename from otto_controller_source/Inc/geometry_msgs/TwistStamped.h rename to otto_controller_source/Core/Inc/geometry_msgs/TwistStamped.h diff --git a/otto_controller_source/Inc/geometry_msgs/TwistWithCovariance.h b/otto_controller_source/Core/Inc/geometry_msgs/TwistWithCovariance.h similarity index 100% rename from otto_controller_source/Inc/geometry_msgs/TwistWithCovariance.h rename to otto_controller_source/Core/Inc/geometry_msgs/TwistWithCovariance.h diff --git a/otto_controller_source/Inc/geometry_msgs/TwistWithCovarianceStamped.h b/otto_controller_source/Core/Inc/geometry_msgs/TwistWithCovarianceStamped.h similarity index 100% rename from otto_controller_source/Inc/geometry_msgs/TwistWithCovarianceStamped.h rename to otto_controller_source/Core/Inc/geometry_msgs/TwistWithCovarianceStamped.h diff --git a/otto_controller_source/Inc/geometry_msgs/Vector3.h b/otto_controller_source/Core/Inc/geometry_msgs/Vector3.h similarity index 100% rename from otto_controller_source/Inc/geometry_msgs/Vector3.h rename to otto_controller_source/Core/Inc/geometry_msgs/Vector3.h diff --git a/otto_controller_source/Inc/geometry_msgs/Vector3Stamped.h b/otto_controller_source/Core/Inc/geometry_msgs/Vector3Stamped.h similarity index 100% rename from otto_controller_source/Inc/geometry_msgs/Vector3Stamped.h rename to otto_controller_source/Core/Inc/geometry_msgs/Vector3Stamped.h diff --git a/otto_controller_source/Inc/geometry_msgs/Wrench.h b/otto_controller_source/Core/Inc/geometry_msgs/Wrench.h similarity index 100% rename from otto_controller_source/Inc/geometry_msgs/Wrench.h rename to otto_controller_source/Core/Inc/geometry_msgs/Wrench.h diff --git a/otto_controller_source/Inc/geometry_msgs/WrenchStamped.h b/otto_controller_source/Core/Inc/geometry_msgs/WrenchStamped.h similarity index 100% rename from otto_controller_source/Inc/geometry_msgs/WrenchStamped.h rename to otto_controller_source/Core/Inc/geometry_msgs/WrenchStamped.h diff --git a/otto_controller_source/Inc/laser_assembler/AssembleScans.h b/otto_controller_source/Core/Inc/laser_assembler/AssembleScans.h similarity index 100% rename from otto_controller_source/Inc/laser_assembler/AssembleScans.h rename to otto_controller_source/Core/Inc/laser_assembler/AssembleScans.h diff --git a/otto_controller_source/Inc/laser_assembler/AssembleScans2.h b/otto_controller_source/Core/Inc/laser_assembler/AssembleScans2.h similarity index 100% rename from otto_controller_source/Inc/laser_assembler/AssembleScans2.h rename to otto_controller_source/Core/Inc/laser_assembler/AssembleScans2.h diff --git a/otto_controller_source/Inc/main.h b/otto_controller_source/Core/Inc/main.h similarity index 78% rename from otto_controller_source/Inc/main.h rename to otto_controller_source/Core/Inc/main.h index e3beadd..9edfce0 100644 --- a/otto_controller_source/Inc/main.h +++ b/otto_controller_source/Core/Inc/main.h @@ -60,22 +60,22 @@ void Error_Handler(void); /* USER CODE END EFP */ /* Private defines -----------------------------------------------------------*/ -#define current_1_Pin GPIO_PIN_3 -#define current_1_GPIO_Port GPIOA -#define fault_2_Pin GPIO_PIN_6 -#define fault_2_GPIO_Port GPIOA -#define dir_1_Pin GPIO_PIN_13 -#define dir_1_GPIO_Port GPIOF -#define sleep_2_Pin GPIO_PIN_14 -#define sleep_2_GPIO_Port GPIOF -#define sleep_1_Pin GPIO_PIN_15 -#define sleep_1_GPIO_Port GPIOF -#define fault_1_Pin GPIO_PIN_9 -#define fault_1_GPIO_Port GPIOE -#define pwm_2_Pin GPIO_PIN_14 -#define pwm_2_GPIO_Port GPIOD -#define pwm_1_Pin GPIO_PIN_15 -#define pwm_1_GPIO_Port GPIOD +#define current1_Pin GPIO_PIN_3 +#define current1_GPIO_Port GPIOA +#define fault2_Pin GPIO_PIN_6 +#define fault2_GPIO_Port GPIOA +#define dir1_Pin GPIO_PIN_13 +#define dir1_GPIO_Port GPIOF +#define sleep2_Pin GPIO_PIN_14 +#define sleep2_GPIO_Port GPIOF +#define sleep1_Pin GPIO_PIN_15 +#define sleep1_GPIO_Port GPIOF +#define fault1_Pin GPIO_PIN_9 +#define fault1_GPIO_Port GPIOE +#define pwm2_Pin GPIO_PIN_14 +#define pwm2_GPIO_Port GPIOD +#define pwm1_Pin GPIO_PIN_15 +#define pwm1_GPIO_Port GPIOD /* USER CODE BEGIN Private defines */ /* USER CODE END Private defines */ diff --git a/otto_controller_source/Inc/map_msgs/GetMapROI.h b/otto_controller_source/Core/Inc/map_msgs/GetMapROI.h similarity index 100% rename from otto_controller_source/Inc/map_msgs/GetMapROI.h rename to otto_controller_source/Core/Inc/map_msgs/GetMapROI.h diff --git a/otto_controller_source/Inc/map_msgs/GetPointMap.h b/otto_controller_source/Core/Inc/map_msgs/GetPointMap.h similarity index 100% rename from otto_controller_source/Inc/map_msgs/GetPointMap.h rename to otto_controller_source/Core/Inc/map_msgs/GetPointMap.h diff --git a/otto_controller_source/Inc/map_msgs/GetPointMapROI.h b/otto_controller_source/Core/Inc/map_msgs/GetPointMapROI.h similarity index 100% rename from otto_controller_source/Inc/map_msgs/GetPointMapROI.h rename to otto_controller_source/Core/Inc/map_msgs/GetPointMapROI.h diff --git a/otto_controller_source/Inc/map_msgs/OccupancyGridUpdate.h b/otto_controller_source/Core/Inc/map_msgs/OccupancyGridUpdate.h similarity index 100% rename from otto_controller_source/Inc/map_msgs/OccupancyGridUpdate.h rename to otto_controller_source/Core/Inc/map_msgs/OccupancyGridUpdate.h diff --git a/otto_controller_source/Inc/map_msgs/PointCloud2Update.h b/otto_controller_source/Core/Inc/map_msgs/PointCloud2Update.h similarity index 100% rename from otto_controller_source/Inc/map_msgs/PointCloud2Update.h rename to otto_controller_source/Core/Inc/map_msgs/PointCloud2Update.h diff --git a/otto_controller_source/Inc/map_msgs/ProjectedMap.h b/otto_controller_source/Core/Inc/map_msgs/ProjectedMap.h similarity index 100% rename from otto_controller_source/Inc/map_msgs/ProjectedMap.h rename to otto_controller_source/Core/Inc/map_msgs/ProjectedMap.h diff --git a/otto_controller_source/Inc/map_msgs/ProjectedMapInfo.h b/otto_controller_source/Core/Inc/map_msgs/ProjectedMapInfo.h similarity index 100% rename from otto_controller_source/Inc/map_msgs/ProjectedMapInfo.h rename to otto_controller_source/Core/Inc/map_msgs/ProjectedMapInfo.h diff --git a/otto_controller_source/Inc/map_msgs/ProjectedMapsInfo.h b/otto_controller_source/Core/Inc/map_msgs/ProjectedMapsInfo.h similarity index 100% rename from otto_controller_source/Inc/map_msgs/ProjectedMapsInfo.h rename to otto_controller_source/Core/Inc/map_msgs/ProjectedMapsInfo.h diff --git a/otto_controller_source/Inc/map_msgs/SaveMap.h b/otto_controller_source/Core/Inc/map_msgs/SaveMap.h similarity index 100% rename from otto_controller_source/Inc/map_msgs/SaveMap.h rename to otto_controller_source/Core/Inc/map_msgs/SaveMap.h diff --git a/otto_controller_source/Inc/map_msgs/SetMapProjections.h b/otto_controller_source/Core/Inc/map_msgs/SetMapProjections.h similarity index 100% rename from otto_controller_source/Inc/map_msgs/SetMapProjections.h rename to otto_controller_source/Core/Inc/map_msgs/SetMapProjections.h diff --git a/otto_controller_source/Inc/nav_msgs/GetMap.h b/otto_controller_source/Core/Inc/nav_msgs/GetMap.h similarity index 100% rename from otto_controller_source/Inc/nav_msgs/GetMap.h rename to otto_controller_source/Core/Inc/nav_msgs/GetMap.h diff --git a/otto_controller_source/Inc/nav_msgs/GetMapAction.h b/otto_controller_source/Core/Inc/nav_msgs/GetMapAction.h similarity index 100% rename from otto_controller_source/Inc/nav_msgs/GetMapAction.h rename to otto_controller_source/Core/Inc/nav_msgs/GetMapAction.h diff --git a/otto_controller_source/Inc/nav_msgs/GetMapActionFeedback.h b/otto_controller_source/Core/Inc/nav_msgs/GetMapActionFeedback.h similarity index 100% rename from otto_controller_source/Inc/nav_msgs/GetMapActionFeedback.h rename to otto_controller_source/Core/Inc/nav_msgs/GetMapActionFeedback.h diff --git a/otto_controller_source/Inc/nav_msgs/GetMapActionGoal.h b/otto_controller_source/Core/Inc/nav_msgs/GetMapActionGoal.h similarity index 100% rename from otto_controller_source/Inc/nav_msgs/GetMapActionGoal.h rename to otto_controller_source/Core/Inc/nav_msgs/GetMapActionGoal.h diff --git a/otto_controller_source/Inc/nav_msgs/GetMapActionResult.h b/otto_controller_source/Core/Inc/nav_msgs/GetMapActionResult.h similarity index 100% rename from otto_controller_source/Inc/nav_msgs/GetMapActionResult.h rename to otto_controller_source/Core/Inc/nav_msgs/GetMapActionResult.h diff --git a/otto_controller_source/Inc/nav_msgs/GetMapFeedback.h b/otto_controller_source/Core/Inc/nav_msgs/GetMapFeedback.h similarity index 100% rename from otto_controller_source/Inc/nav_msgs/GetMapFeedback.h rename to otto_controller_source/Core/Inc/nav_msgs/GetMapFeedback.h diff --git a/otto_controller_source/Inc/nav_msgs/GetMapGoal.h b/otto_controller_source/Core/Inc/nav_msgs/GetMapGoal.h similarity index 100% rename from otto_controller_source/Inc/nav_msgs/GetMapGoal.h rename to otto_controller_source/Core/Inc/nav_msgs/GetMapGoal.h diff --git a/otto_controller_source/Inc/nav_msgs/GetMapResult.h b/otto_controller_source/Core/Inc/nav_msgs/GetMapResult.h similarity index 100% rename from otto_controller_source/Inc/nav_msgs/GetMapResult.h rename to otto_controller_source/Core/Inc/nav_msgs/GetMapResult.h diff --git a/otto_controller_source/Inc/nav_msgs/GetPlan.h b/otto_controller_source/Core/Inc/nav_msgs/GetPlan.h similarity index 100% rename from otto_controller_source/Inc/nav_msgs/GetPlan.h rename to otto_controller_source/Core/Inc/nav_msgs/GetPlan.h diff --git a/otto_controller_source/Inc/nav_msgs/GridCells.h b/otto_controller_source/Core/Inc/nav_msgs/GridCells.h similarity index 100% rename from otto_controller_source/Inc/nav_msgs/GridCells.h rename to otto_controller_source/Core/Inc/nav_msgs/GridCells.h diff --git a/otto_controller_source/Inc/nav_msgs/MapMetaData.h b/otto_controller_source/Core/Inc/nav_msgs/MapMetaData.h similarity index 100% rename from otto_controller_source/Inc/nav_msgs/MapMetaData.h rename to otto_controller_source/Core/Inc/nav_msgs/MapMetaData.h diff --git a/otto_controller_source/Inc/nav_msgs/OccupancyGrid.h b/otto_controller_source/Core/Inc/nav_msgs/OccupancyGrid.h similarity index 100% rename from otto_controller_source/Inc/nav_msgs/OccupancyGrid.h rename to otto_controller_source/Core/Inc/nav_msgs/OccupancyGrid.h diff --git a/otto_controller_source/Inc/nav_msgs/Odometry.h b/otto_controller_source/Core/Inc/nav_msgs/Odometry.h similarity index 100% rename from otto_controller_source/Inc/nav_msgs/Odometry.h rename to otto_controller_source/Core/Inc/nav_msgs/Odometry.h diff --git a/otto_controller_source/Inc/nav_msgs/Path.h b/otto_controller_source/Core/Inc/nav_msgs/Path.h similarity index 100% rename from otto_controller_source/Inc/nav_msgs/Path.h rename to otto_controller_source/Core/Inc/nav_msgs/Path.h diff --git a/otto_controller_source/Inc/nav_msgs/SetMap.h b/otto_controller_source/Core/Inc/nav_msgs/SetMap.h similarity index 100% rename from otto_controller_source/Inc/nav_msgs/SetMap.h rename to otto_controller_source/Core/Inc/nav_msgs/SetMap.h diff --git a/otto_controller_source/Inc/nodelet/NodeletList.h b/otto_controller_source/Core/Inc/nodelet/NodeletList.h similarity index 100% rename from otto_controller_source/Inc/nodelet/NodeletList.h rename to otto_controller_source/Core/Inc/nodelet/NodeletList.h diff --git a/otto_controller_source/Inc/nodelet/NodeletLoad.h b/otto_controller_source/Core/Inc/nodelet/NodeletLoad.h similarity index 100% rename from otto_controller_source/Inc/nodelet/NodeletLoad.h rename to otto_controller_source/Core/Inc/nodelet/NodeletLoad.h diff --git a/otto_controller_source/Inc/nodelet/NodeletUnload.h b/otto_controller_source/Core/Inc/nodelet/NodeletUnload.h similarity index 100% rename from otto_controller_source/Inc/nodelet/NodeletUnload.h rename to otto_controller_source/Core/Inc/nodelet/NodeletUnload.h diff --git a/otto_controller_source/Inc/odometry_calc.h b/otto_controller_source/Core/Inc/odometry_calc.h similarity index 89% rename from otto_controller_source/Inc/odometry_calc.h rename to otto_controller_source/Core/Inc/odometry_calc.h index d42bcfb..729b7d5 100644 --- a/otto_controller_source/Inc/odometry_calc.h +++ b/otto_controller_source/Core/Inc/odometry_calc.h @@ -1,8 +1,14 @@ #ifndef ODOMETRY_CALC_H #define ODOMETRY_CALC_H +#include +#include +#include +#include + +#include "main.h" #include "encoder.h" -#include "nav_msgs/Odometry.h" + class OdometryCalc{ public: diff --git a/otto_controller_source/Inc/pcl_msgs/ModelCoefficients.h b/otto_controller_source/Core/Inc/pcl_msgs/ModelCoefficients.h similarity index 100% rename from otto_controller_source/Inc/pcl_msgs/ModelCoefficients.h rename to otto_controller_source/Core/Inc/pcl_msgs/ModelCoefficients.h diff --git a/otto_controller_source/Inc/pcl_msgs/PointIndices.h b/otto_controller_source/Core/Inc/pcl_msgs/PointIndices.h similarity index 100% rename from otto_controller_source/Inc/pcl_msgs/PointIndices.h rename to otto_controller_source/Core/Inc/pcl_msgs/PointIndices.h diff --git a/otto_controller_source/Inc/pcl_msgs/PolygonMesh.h b/otto_controller_source/Core/Inc/pcl_msgs/PolygonMesh.h similarity index 100% rename from otto_controller_source/Inc/pcl_msgs/PolygonMesh.h rename to otto_controller_source/Core/Inc/pcl_msgs/PolygonMesh.h diff --git a/otto_controller_source/Inc/pcl_msgs/Vertices.h b/otto_controller_source/Core/Inc/pcl_msgs/Vertices.h similarity index 100% rename from otto_controller_source/Inc/pcl_msgs/Vertices.h rename to otto_controller_source/Core/Inc/pcl_msgs/Vertices.h diff --git a/otto_controller_source/Inc/polled_camera/GetPolledImage.h b/otto_controller_source/Core/Inc/polled_camera/GetPolledImage.h similarity index 100% rename from otto_controller_source/Inc/polled_camera/GetPolledImage.h rename to otto_controller_source/Core/Inc/polled_camera/GetPolledImage.h diff --git a/otto_controller_source/Inc/ros.h b/otto_controller_source/Core/Inc/ros.h similarity index 100% rename from otto_controller_source/Inc/ros.h rename to otto_controller_source/Core/Inc/ros.h diff --git a/otto_controller_source/Inc/ros/duration.h b/otto_controller_source/Core/Inc/ros/duration.h similarity index 100% rename from otto_controller_source/Inc/ros/duration.h rename to otto_controller_source/Core/Inc/ros/duration.h diff --git a/otto_controller_source/Inc/ros/msg.h b/otto_controller_source/Core/Inc/ros/msg.h similarity index 100% rename from otto_controller_source/Inc/ros/msg.h rename to otto_controller_source/Core/Inc/ros/msg.h diff --git a/otto_controller_source/Inc/ros/node_handle.h b/otto_controller_source/Core/Inc/ros/node_handle.h similarity index 100% rename from otto_controller_source/Inc/ros/node_handle.h rename to otto_controller_source/Core/Inc/ros/node_handle.h diff --git a/otto_controller_source/Inc/ros/publisher.h b/otto_controller_source/Core/Inc/ros/publisher.h similarity index 100% rename from otto_controller_source/Inc/ros/publisher.h rename to otto_controller_source/Core/Inc/ros/publisher.h diff --git a/otto_controller_source/Inc/ros/service_client.h b/otto_controller_source/Core/Inc/ros/service_client.h similarity index 100% rename from otto_controller_source/Inc/ros/service_client.h rename to otto_controller_source/Core/Inc/ros/service_client.h diff --git a/otto_controller_source/Inc/ros/service_server.h b/otto_controller_source/Core/Inc/ros/service_server.h similarity index 100% rename from otto_controller_source/Inc/ros/service_server.h rename to otto_controller_source/Core/Inc/ros/service_server.h diff --git a/otto_controller_source/Inc/ros/subscriber.h b/otto_controller_source/Core/Inc/ros/subscriber.h similarity index 100% rename from otto_controller_source/Inc/ros/subscriber.h rename to otto_controller_source/Core/Inc/ros/subscriber.h diff --git a/otto_controller_source/Inc/ros/time.h b/otto_controller_source/Core/Inc/ros/time.h similarity index 100% rename from otto_controller_source/Inc/ros/time.h rename to otto_controller_source/Core/Inc/ros/time.h diff --git a/otto_controller_source/Inc/roscpp/Empty.h b/otto_controller_source/Core/Inc/roscpp/Empty.h similarity index 100% rename from otto_controller_source/Inc/roscpp/Empty.h rename to otto_controller_source/Core/Inc/roscpp/Empty.h diff --git a/otto_controller_source/Inc/roscpp/GetLoggers.h b/otto_controller_source/Core/Inc/roscpp/GetLoggers.h similarity index 100% rename from otto_controller_source/Inc/roscpp/GetLoggers.h rename to otto_controller_source/Core/Inc/roscpp/GetLoggers.h diff --git a/otto_controller_source/Inc/roscpp/Logger.h b/otto_controller_source/Core/Inc/roscpp/Logger.h similarity index 100% rename from otto_controller_source/Inc/roscpp/Logger.h rename to otto_controller_source/Core/Inc/roscpp/Logger.h diff --git a/otto_controller_source/Inc/roscpp/SetLoggerLevel.h b/otto_controller_source/Core/Inc/roscpp/SetLoggerLevel.h similarity index 100% rename from otto_controller_source/Inc/roscpp/SetLoggerLevel.h rename to otto_controller_source/Core/Inc/roscpp/SetLoggerLevel.h diff --git a/otto_controller_source/Inc/roscpp_tutorials/TwoInts.h b/otto_controller_source/Core/Inc/roscpp_tutorials/TwoInts.h similarity index 100% rename from otto_controller_source/Inc/roscpp_tutorials/TwoInts.h rename to otto_controller_source/Core/Inc/roscpp_tutorials/TwoInts.h diff --git a/otto_controller_source/Inc/rosgraph_msgs/Clock.h b/otto_controller_source/Core/Inc/rosgraph_msgs/Clock.h similarity index 100% rename from otto_controller_source/Inc/rosgraph_msgs/Clock.h rename to otto_controller_source/Core/Inc/rosgraph_msgs/Clock.h diff --git a/otto_controller_source/Inc/rosgraph_msgs/Log.h b/otto_controller_source/Core/Inc/rosgraph_msgs/Log.h similarity index 100% rename from otto_controller_source/Inc/rosgraph_msgs/Log.h rename to otto_controller_source/Core/Inc/rosgraph_msgs/Log.h diff --git a/otto_controller_source/Inc/rosgraph_msgs/TopicStatistics.h b/otto_controller_source/Core/Inc/rosgraph_msgs/TopicStatistics.h similarity index 100% rename from otto_controller_source/Inc/rosgraph_msgs/TopicStatistics.h rename to otto_controller_source/Core/Inc/rosgraph_msgs/TopicStatistics.h diff --git a/otto_controller_source/Inc/rospy_tutorials/AddTwoInts.h b/otto_controller_source/Core/Inc/rospy_tutorials/AddTwoInts.h similarity index 100% rename from otto_controller_source/Inc/rospy_tutorials/AddTwoInts.h rename to otto_controller_source/Core/Inc/rospy_tutorials/AddTwoInts.h diff --git a/otto_controller_source/Inc/rospy_tutorials/BadTwoInts.h b/otto_controller_source/Core/Inc/rospy_tutorials/BadTwoInts.h similarity index 100% rename from otto_controller_source/Inc/rospy_tutorials/BadTwoInts.h rename to otto_controller_source/Core/Inc/rospy_tutorials/BadTwoInts.h diff --git a/otto_controller_source/Inc/rospy_tutorials/Floats.h b/otto_controller_source/Core/Inc/rospy_tutorials/Floats.h similarity index 100% rename from otto_controller_source/Inc/rospy_tutorials/Floats.h rename to otto_controller_source/Core/Inc/rospy_tutorials/Floats.h diff --git a/otto_controller_source/Inc/rospy_tutorials/HeaderString.h b/otto_controller_source/Core/Inc/rospy_tutorials/HeaderString.h similarity index 100% rename from otto_controller_source/Inc/rospy_tutorials/HeaderString.h rename to otto_controller_source/Core/Inc/rospy_tutorials/HeaderString.h diff --git a/otto_controller_source/Inc/rosserial_msgs/Log.h b/otto_controller_source/Core/Inc/rosserial_msgs/Log.h similarity index 100% rename from otto_controller_source/Inc/rosserial_msgs/Log.h rename to otto_controller_source/Core/Inc/rosserial_msgs/Log.h diff --git a/otto_controller_source/Inc/rosserial_msgs/RequestMessageInfo.h b/otto_controller_source/Core/Inc/rosserial_msgs/RequestMessageInfo.h similarity index 100% rename from otto_controller_source/Inc/rosserial_msgs/RequestMessageInfo.h rename to otto_controller_source/Core/Inc/rosserial_msgs/RequestMessageInfo.h diff --git a/otto_controller_source/Inc/rosserial_msgs/RequestParam.h b/otto_controller_source/Core/Inc/rosserial_msgs/RequestParam.h similarity index 100% rename from otto_controller_source/Inc/rosserial_msgs/RequestParam.h rename to otto_controller_source/Core/Inc/rosserial_msgs/RequestParam.h diff --git a/otto_controller_source/Inc/rosserial_msgs/RequestServiceInfo.h b/otto_controller_source/Core/Inc/rosserial_msgs/RequestServiceInfo.h similarity index 100% rename from otto_controller_source/Inc/rosserial_msgs/RequestServiceInfo.h rename to otto_controller_source/Core/Inc/rosserial_msgs/RequestServiceInfo.h diff --git a/otto_controller_source/Inc/rosserial_msgs/TopicInfo.h b/otto_controller_source/Core/Inc/rosserial_msgs/TopicInfo.h similarity index 100% rename from otto_controller_source/Inc/rosserial_msgs/TopicInfo.h rename to otto_controller_source/Core/Inc/rosserial_msgs/TopicInfo.h diff --git a/otto_controller_source/Inc/sensor_msgs/BatteryState.h b/otto_controller_source/Core/Inc/sensor_msgs/BatteryState.h similarity index 100% rename from otto_controller_source/Inc/sensor_msgs/BatteryState.h rename to otto_controller_source/Core/Inc/sensor_msgs/BatteryState.h diff --git a/otto_controller_source/Inc/sensor_msgs/CameraInfo.h b/otto_controller_source/Core/Inc/sensor_msgs/CameraInfo.h similarity index 100% rename from otto_controller_source/Inc/sensor_msgs/CameraInfo.h rename to otto_controller_source/Core/Inc/sensor_msgs/CameraInfo.h diff --git a/otto_controller_source/Inc/sensor_msgs/ChannelFloat32.h b/otto_controller_source/Core/Inc/sensor_msgs/ChannelFloat32.h similarity index 100% rename from otto_controller_source/Inc/sensor_msgs/ChannelFloat32.h rename to otto_controller_source/Core/Inc/sensor_msgs/ChannelFloat32.h diff --git a/otto_controller_source/Inc/sensor_msgs/CompressedImage.h b/otto_controller_source/Core/Inc/sensor_msgs/CompressedImage.h similarity index 100% rename from otto_controller_source/Inc/sensor_msgs/CompressedImage.h rename to otto_controller_source/Core/Inc/sensor_msgs/CompressedImage.h diff --git a/otto_controller_source/Inc/sensor_msgs/FluidPressure.h b/otto_controller_source/Core/Inc/sensor_msgs/FluidPressure.h similarity index 100% rename from otto_controller_source/Inc/sensor_msgs/FluidPressure.h rename to otto_controller_source/Core/Inc/sensor_msgs/FluidPressure.h diff --git a/otto_controller_source/Inc/sensor_msgs/Illuminance.h b/otto_controller_source/Core/Inc/sensor_msgs/Illuminance.h similarity index 100% rename from otto_controller_source/Inc/sensor_msgs/Illuminance.h rename to otto_controller_source/Core/Inc/sensor_msgs/Illuminance.h diff --git a/otto_controller_source/Inc/sensor_msgs/Image.h b/otto_controller_source/Core/Inc/sensor_msgs/Image.h similarity index 100% rename from otto_controller_source/Inc/sensor_msgs/Image.h rename to otto_controller_source/Core/Inc/sensor_msgs/Image.h diff --git a/otto_controller_source/Inc/sensor_msgs/Imu.h b/otto_controller_source/Core/Inc/sensor_msgs/Imu.h similarity index 100% rename from otto_controller_source/Inc/sensor_msgs/Imu.h rename to otto_controller_source/Core/Inc/sensor_msgs/Imu.h diff --git a/otto_controller_source/Inc/sensor_msgs/JointState.h b/otto_controller_source/Core/Inc/sensor_msgs/JointState.h similarity index 100% rename from otto_controller_source/Inc/sensor_msgs/JointState.h rename to otto_controller_source/Core/Inc/sensor_msgs/JointState.h diff --git a/otto_controller_source/Inc/sensor_msgs/Joy.h b/otto_controller_source/Core/Inc/sensor_msgs/Joy.h similarity index 100% rename from otto_controller_source/Inc/sensor_msgs/Joy.h rename to otto_controller_source/Core/Inc/sensor_msgs/Joy.h diff --git a/otto_controller_source/Inc/sensor_msgs/JoyFeedback.h b/otto_controller_source/Core/Inc/sensor_msgs/JoyFeedback.h similarity index 100% rename from otto_controller_source/Inc/sensor_msgs/JoyFeedback.h rename to otto_controller_source/Core/Inc/sensor_msgs/JoyFeedback.h diff --git a/otto_controller_source/Inc/sensor_msgs/JoyFeedbackArray.h b/otto_controller_source/Core/Inc/sensor_msgs/JoyFeedbackArray.h similarity index 100% rename from otto_controller_source/Inc/sensor_msgs/JoyFeedbackArray.h rename to otto_controller_source/Core/Inc/sensor_msgs/JoyFeedbackArray.h diff --git a/otto_controller_source/Inc/sensor_msgs/LaserEcho.h b/otto_controller_source/Core/Inc/sensor_msgs/LaserEcho.h similarity index 100% rename from otto_controller_source/Inc/sensor_msgs/LaserEcho.h rename to otto_controller_source/Core/Inc/sensor_msgs/LaserEcho.h diff --git a/otto_controller_source/Inc/sensor_msgs/LaserScan.h b/otto_controller_source/Core/Inc/sensor_msgs/LaserScan.h similarity index 100% rename from otto_controller_source/Inc/sensor_msgs/LaserScan.h rename to otto_controller_source/Core/Inc/sensor_msgs/LaserScan.h diff --git a/otto_controller_source/Inc/sensor_msgs/MagneticField.h b/otto_controller_source/Core/Inc/sensor_msgs/MagneticField.h similarity index 100% rename from otto_controller_source/Inc/sensor_msgs/MagneticField.h rename to otto_controller_source/Core/Inc/sensor_msgs/MagneticField.h diff --git a/otto_controller_source/Inc/sensor_msgs/MultiDOFJointState.h b/otto_controller_source/Core/Inc/sensor_msgs/MultiDOFJointState.h similarity index 100% rename from otto_controller_source/Inc/sensor_msgs/MultiDOFJointState.h rename to otto_controller_source/Core/Inc/sensor_msgs/MultiDOFJointState.h diff --git a/otto_controller_source/Inc/sensor_msgs/MultiEchoLaserScan.h b/otto_controller_source/Core/Inc/sensor_msgs/MultiEchoLaserScan.h similarity index 100% rename from otto_controller_source/Inc/sensor_msgs/MultiEchoLaserScan.h rename to otto_controller_source/Core/Inc/sensor_msgs/MultiEchoLaserScan.h diff --git a/otto_controller_source/Inc/sensor_msgs/NavSatFix.h b/otto_controller_source/Core/Inc/sensor_msgs/NavSatFix.h similarity index 100% rename from otto_controller_source/Inc/sensor_msgs/NavSatFix.h rename to otto_controller_source/Core/Inc/sensor_msgs/NavSatFix.h diff --git a/otto_controller_source/Inc/sensor_msgs/NavSatStatus.h b/otto_controller_source/Core/Inc/sensor_msgs/NavSatStatus.h similarity index 100% rename from otto_controller_source/Inc/sensor_msgs/NavSatStatus.h rename to otto_controller_source/Core/Inc/sensor_msgs/NavSatStatus.h diff --git a/otto_controller_source/Inc/sensor_msgs/PointCloud.h b/otto_controller_source/Core/Inc/sensor_msgs/PointCloud.h similarity index 100% rename from otto_controller_source/Inc/sensor_msgs/PointCloud.h rename to otto_controller_source/Core/Inc/sensor_msgs/PointCloud.h diff --git a/otto_controller_source/Inc/sensor_msgs/PointCloud2.h b/otto_controller_source/Core/Inc/sensor_msgs/PointCloud2.h similarity index 100% rename from otto_controller_source/Inc/sensor_msgs/PointCloud2.h rename to otto_controller_source/Core/Inc/sensor_msgs/PointCloud2.h diff --git a/otto_controller_source/Inc/sensor_msgs/PointField.h b/otto_controller_source/Core/Inc/sensor_msgs/PointField.h similarity index 100% rename from otto_controller_source/Inc/sensor_msgs/PointField.h rename to otto_controller_source/Core/Inc/sensor_msgs/PointField.h diff --git a/otto_controller_source/Inc/sensor_msgs/Range.h b/otto_controller_source/Core/Inc/sensor_msgs/Range.h similarity index 100% rename from otto_controller_source/Inc/sensor_msgs/Range.h rename to otto_controller_source/Core/Inc/sensor_msgs/Range.h diff --git a/otto_controller_source/Inc/sensor_msgs/RegionOfInterest.h b/otto_controller_source/Core/Inc/sensor_msgs/RegionOfInterest.h similarity index 100% rename from otto_controller_source/Inc/sensor_msgs/RegionOfInterest.h rename to otto_controller_source/Core/Inc/sensor_msgs/RegionOfInterest.h diff --git a/otto_controller_source/Inc/sensor_msgs/RelativeHumidity.h b/otto_controller_source/Core/Inc/sensor_msgs/RelativeHumidity.h similarity index 100% rename from otto_controller_source/Inc/sensor_msgs/RelativeHumidity.h rename to otto_controller_source/Core/Inc/sensor_msgs/RelativeHumidity.h diff --git a/otto_controller_source/Inc/sensor_msgs/SetCameraInfo.h b/otto_controller_source/Core/Inc/sensor_msgs/SetCameraInfo.h similarity index 100% rename from otto_controller_source/Inc/sensor_msgs/SetCameraInfo.h rename to otto_controller_source/Core/Inc/sensor_msgs/SetCameraInfo.h diff --git a/otto_controller_source/Inc/sensor_msgs/Temperature.h b/otto_controller_source/Core/Inc/sensor_msgs/Temperature.h similarity index 100% rename from otto_controller_source/Inc/sensor_msgs/Temperature.h rename to otto_controller_source/Core/Inc/sensor_msgs/Temperature.h diff --git a/otto_controller_source/Inc/sensor_msgs/TimeReference.h b/otto_controller_source/Core/Inc/sensor_msgs/TimeReference.h similarity index 100% rename from otto_controller_source/Inc/sensor_msgs/TimeReference.h rename to otto_controller_source/Core/Inc/sensor_msgs/TimeReference.h diff --git a/otto_controller_source/Inc/shape_msgs/Mesh.h b/otto_controller_source/Core/Inc/shape_msgs/Mesh.h similarity index 100% rename from otto_controller_source/Inc/shape_msgs/Mesh.h rename to otto_controller_source/Core/Inc/shape_msgs/Mesh.h diff --git a/otto_controller_source/Inc/shape_msgs/MeshTriangle.h b/otto_controller_source/Core/Inc/shape_msgs/MeshTriangle.h similarity index 100% rename from otto_controller_source/Inc/shape_msgs/MeshTriangle.h rename to otto_controller_source/Core/Inc/shape_msgs/MeshTriangle.h diff --git a/otto_controller_source/Inc/shape_msgs/Plane.h b/otto_controller_source/Core/Inc/shape_msgs/Plane.h similarity index 100% rename from otto_controller_source/Inc/shape_msgs/Plane.h rename to otto_controller_source/Core/Inc/shape_msgs/Plane.h diff --git a/otto_controller_source/Inc/shape_msgs/SolidPrimitive.h b/otto_controller_source/Core/Inc/shape_msgs/SolidPrimitive.h similarity index 100% rename from otto_controller_source/Inc/shape_msgs/SolidPrimitive.h rename to otto_controller_source/Core/Inc/shape_msgs/SolidPrimitive.h diff --git a/otto_controller_source/Inc/smach_msgs/SmachContainerInitialStatusCmd.h b/otto_controller_source/Core/Inc/smach_msgs/SmachContainerInitialStatusCmd.h similarity index 100% rename from otto_controller_source/Inc/smach_msgs/SmachContainerInitialStatusCmd.h rename to otto_controller_source/Core/Inc/smach_msgs/SmachContainerInitialStatusCmd.h diff --git a/otto_controller_source/Inc/smach_msgs/SmachContainerStatus.h b/otto_controller_source/Core/Inc/smach_msgs/SmachContainerStatus.h similarity index 100% rename from otto_controller_source/Inc/smach_msgs/SmachContainerStatus.h rename to otto_controller_source/Core/Inc/smach_msgs/SmachContainerStatus.h diff --git a/otto_controller_source/Inc/smach_msgs/SmachContainerStructure.h b/otto_controller_source/Core/Inc/smach_msgs/SmachContainerStructure.h similarity index 100% rename from otto_controller_source/Inc/smach_msgs/SmachContainerStructure.h rename to otto_controller_source/Core/Inc/smach_msgs/SmachContainerStructure.h diff --git a/otto_controller_source/Inc/std_msgs/Bool.h b/otto_controller_source/Core/Inc/std_msgs/Bool.h similarity index 100% rename from otto_controller_source/Inc/std_msgs/Bool.h rename to otto_controller_source/Core/Inc/std_msgs/Bool.h diff --git a/otto_controller_source/Inc/std_msgs/Byte.h b/otto_controller_source/Core/Inc/std_msgs/Byte.h similarity index 100% rename from otto_controller_source/Inc/std_msgs/Byte.h rename to otto_controller_source/Core/Inc/std_msgs/Byte.h diff --git a/otto_controller_source/Inc/std_msgs/ByteMultiArray.h b/otto_controller_source/Core/Inc/std_msgs/ByteMultiArray.h similarity index 100% rename from otto_controller_source/Inc/std_msgs/ByteMultiArray.h rename to otto_controller_source/Core/Inc/std_msgs/ByteMultiArray.h diff --git a/otto_controller_source/Inc/std_msgs/Char.h b/otto_controller_source/Core/Inc/std_msgs/Char.h similarity index 100% rename from otto_controller_source/Inc/std_msgs/Char.h rename to otto_controller_source/Core/Inc/std_msgs/Char.h diff --git a/otto_controller_source/Inc/std_msgs/ColorRGBA.h b/otto_controller_source/Core/Inc/std_msgs/ColorRGBA.h similarity index 100% rename from otto_controller_source/Inc/std_msgs/ColorRGBA.h rename to otto_controller_source/Core/Inc/std_msgs/ColorRGBA.h diff --git a/otto_controller_source/Inc/std_msgs/Duration.h b/otto_controller_source/Core/Inc/std_msgs/Duration.h similarity index 100% rename from otto_controller_source/Inc/std_msgs/Duration.h rename to otto_controller_source/Core/Inc/std_msgs/Duration.h diff --git a/otto_controller_source/Inc/std_msgs/Empty.h b/otto_controller_source/Core/Inc/std_msgs/Empty.h similarity index 100% rename from otto_controller_source/Inc/std_msgs/Empty.h rename to otto_controller_source/Core/Inc/std_msgs/Empty.h diff --git a/otto_controller_source/Inc/std_msgs/Float32.h b/otto_controller_source/Core/Inc/std_msgs/Float32.h similarity index 100% rename from otto_controller_source/Inc/std_msgs/Float32.h rename to otto_controller_source/Core/Inc/std_msgs/Float32.h diff --git a/otto_controller_source/Inc/std_msgs/Float32MultiArray.h b/otto_controller_source/Core/Inc/std_msgs/Float32MultiArray.h similarity index 100% rename from otto_controller_source/Inc/std_msgs/Float32MultiArray.h rename to otto_controller_source/Core/Inc/std_msgs/Float32MultiArray.h diff --git a/otto_controller_source/Inc/std_msgs/Float64.h b/otto_controller_source/Core/Inc/std_msgs/Float64.h similarity index 100% rename from otto_controller_source/Inc/std_msgs/Float64.h rename to otto_controller_source/Core/Inc/std_msgs/Float64.h diff --git a/otto_controller_source/Inc/std_msgs/Float64MultiArray.h b/otto_controller_source/Core/Inc/std_msgs/Float64MultiArray.h similarity index 100% rename from otto_controller_source/Inc/std_msgs/Float64MultiArray.h rename to otto_controller_source/Core/Inc/std_msgs/Float64MultiArray.h diff --git a/otto_controller_source/Inc/std_msgs/Header.h b/otto_controller_source/Core/Inc/std_msgs/Header.h similarity index 100% rename from otto_controller_source/Inc/std_msgs/Header.h rename to otto_controller_source/Core/Inc/std_msgs/Header.h diff --git a/otto_controller_source/Inc/std_msgs/Int16.h b/otto_controller_source/Core/Inc/std_msgs/Int16.h similarity index 100% rename from otto_controller_source/Inc/std_msgs/Int16.h rename to otto_controller_source/Core/Inc/std_msgs/Int16.h diff --git a/otto_controller_source/Inc/std_msgs/Int16MultiArray.h b/otto_controller_source/Core/Inc/std_msgs/Int16MultiArray.h similarity index 100% rename from otto_controller_source/Inc/std_msgs/Int16MultiArray.h rename to otto_controller_source/Core/Inc/std_msgs/Int16MultiArray.h diff --git a/otto_controller_source/Inc/std_msgs/Int32.h b/otto_controller_source/Core/Inc/std_msgs/Int32.h similarity index 100% rename from otto_controller_source/Inc/std_msgs/Int32.h rename to otto_controller_source/Core/Inc/std_msgs/Int32.h diff --git a/otto_controller_source/Inc/std_msgs/Int32MultiArray.h b/otto_controller_source/Core/Inc/std_msgs/Int32MultiArray.h similarity index 100% rename from otto_controller_source/Inc/std_msgs/Int32MultiArray.h rename to otto_controller_source/Core/Inc/std_msgs/Int32MultiArray.h diff --git a/otto_controller_source/Inc/std_msgs/Int64.h b/otto_controller_source/Core/Inc/std_msgs/Int64.h similarity index 100% rename from otto_controller_source/Inc/std_msgs/Int64.h rename to otto_controller_source/Core/Inc/std_msgs/Int64.h diff --git a/otto_controller_source/Inc/std_msgs/Int64MultiArray.h b/otto_controller_source/Core/Inc/std_msgs/Int64MultiArray.h similarity index 100% rename from otto_controller_source/Inc/std_msgs/Int64MultiArray.h rename to otto_controller_source/Core/Inc/std_msgs/Int64MultiArray.h diff --git a/otto_controller_source/Inc/std_msgs/Int8.h b/otto_controller_source/Core/Inc/std_msgs/Int8.h similarity index 100% rename from otto_controller_source/Inc/std_msgs/Int8.h rename to otto_controller_source/Core/Inc/std_msgs/Int8.h diff --git a/otto_controller_source/Inc/std_msgs/Int8MultiArray.h b/otto_controller_source/Core/Inc/std_msgs/Int8MultiArray.h similarity index 100% rename from otto_controller_source/Inc/std_msgs/Int8MultiArray.h rename to otto_controller_source/Core/Inc/std_msgs/Int8MultiArray.h diff --git a/otto_controller_source/Inc/std_msgs/MultiArrayDimension.h b/otto_controller_source/Core/Inc/std_msgs/MultiArrayDimension.h similarity index 100% rename from otto_controller_source/Inc/std_msgs/MultiArrayDimension.h rename to otto_controller_source/Core/Inc/std_msgs/MultiArrayDimension.h diff --git a/otto_controller_source/Inc/std_msgs/MultiArrayLayout.h b/otto_controller_source/Core/Inc/std_msgs/MultiArrayLayout.h similarity index 100% rename from otto_controller_source/Inc/std_msgs/MultiArrayLayout.h rename to otto_controller_source/Core/Inc/std_msgs/MultiArrayLayout.h diff --git a/otto_controller_source/Inc/std_msgs/String.h b/otto_controller_source/Core/Inc/std_msgs/String.h similarity index 100% rename from otto_controller_source/Inc/std_msgs/String.h rename to otto_controller_source/Core/Inc/std_msgs/String.h diff --git a/otto_controller_source/Inc/std_msgs/Time.h b/otto_controller_source/Core/Inc/std_msgs/Time.h similarity index 100% rename from otto_controller_source/Inc/std_msgs/Time.h rename to otto_controller_source/Core/Inc/std_msgs/Time.h diff --git a/otto_controller_source/Inc/std_msgs/UInt16.h b/otto_controller_source/Core/Inc/std_msgs/UInt16.h similarity index 100% rename from otto_controller_source/Inc/std_msgs/UInt16.h rename to otto_controller_source/Core/Inc/std_msgs/UInt16.h diff --git a/otto_controller_source/Inc/std_msgs/UInt16MultiArray.h b/otto_controller_source/Core/Inc/std_msgs/UInt16MultiArray.h similarity index 100% rename from otto_controller_source/Inc/std_msgs/UInt16MultiArray.h rename to otto_controller_source/Core/Inc/std_msgs/UInt16MultiArray.h diff --git a/otto_controller_source/Inc/std_msgs/UInt32.h b/otto_controller_source/Core/Inc/std_msgs/UInt32.h similarity index 100% rename from otto_controller_source/Inc/std_msgs/UInt32.h rename to otto_controller_source/Core/Inc/std_msgs/UInt32.h diff --git a/otto_controller_source/Inc/std_msgs/UInt32MultiArray.h b/otto_controller_source/Core/Inc/std_msgs/UInt32MultiArray.h similarity index 100% rename from otto_controller_source/Inc/std_msgs/UInt32MultiArray.h rename to otto_controller_source/Core/Inc/std_msgs/UInt32MultiArray.h diff --git a/otto_controller_source/Inc/std_msgs/UInt64.h b/otto_controller_source/Core/Inc/std_msgs/UInt64.h similarity index 100% rename from otto_controller_source/Inc/std_msgs/UInt64.h rename to otto_controller_source/Core/Inc/std_msgs/UInt64.h diff --git a/otto_controller_source/Inc/std_msgs/UInt64MultiArray.h b/otto_controller_source/Core/Inc/std_msgs/UInt64MultiArray.h similarity index 100% rename from otto_controller_source/Inc/std_msgs/UInt64MultiArray.h rename to otto_controller_source/Core/Inc/std_msgs/UInt64MultiArray.h diff --git a/otto_controller_source/Inc/std_msgs/UInt8.h b/otto_controller_source/Core/Inc/std_msgs/UInt8.h similarity index 100% rename from otto_controller_source/Inc/std_msgs/UInt8.h rename to otto_controller_source/Core/Inc/std_msgs/UInt8.h diff --git a/otto_controller_source/Inc/std_msgs/UInt8MultiArray.h b/otto_controller_source/Core/Inc/std_msgs/UInt8MultiArray.h similarity index 100% rename from otto_controller_source/Inc/std_msgs/UInt8MultiArray.h rename to otto_controller_source/Core/Inc/std_msgs/UInt8MultiArray.h diff --git a/otto_controller_source/Inc/std_srvs/Empty.h b/otto_controller_source/Core/Inc/std_srvs/Empty.h similarity index 100% rename from otto_controller_source/Inc/std_srvs/Empty.h rename to otto_controller_source/Core/Inc/std_srvs/Empty.h diff --git a/otto_controller_source/Inc/std_srvs/SetBool.h b/otto_controller_source/Core/Inc/std_srvs/SetBool.h similarity index 100% rename from otto_controller_source/Inc/std_srvs/SetBool.h rename to otto_controller_source/Core/Inc/std_srvs/SetBool.h diff --git a/otto_controller_source/Inc/std_srvs/Trigger.h b/otto_controller_source/Core/Inc/std_srvs/Trigger.h similarity index 100% rename from otto_controller_source/Inc/std_srvs/Trigger.h rename to otto_controller_source/Core/Inc/std_srvs/Trigger.h diff --git a/otto_controller_source/Inc/stereo_msgs/DisparityImage.h b/otto_controller_source/Core/Inc/stereo_msgs/DisparityImage.h similarity index 100% rename from otto_controller_source/Inc/stereo_msgs/DisparityImage.h rename to otto_controller_source/Core/Inc/stereo_msgs/DisparityImage.h diff --git a/otto_controller_source/Inc/stm32f7xx_hal_conf.h b/otto_controller_source/Core/Inc/stm32f7xx_hal_conf.h similarity index 100% rename from otto_controller_source/Inc/stm32f7xx_hal_conf.h rename to otto_controller_source/Core/Inc/stm32f7xx_hal_conf.h diff --git a/otto_controller_source/Inc/stm32f7xx_it.h b/otto_controller_source/Core/Inc/stm32f7xx_it.h similarity index 95% rename from otto_controller_source/Inc/stm32f7xx_it.h rename to otto_controller_source/Core/Inc/stm32f7xx_it.h index 7fe970c..b3e9d44 100644 --- a/otto_controller_source/Inc/stm32f7xx_it.h +++ b/otto_controller_source/Core/Inc/stm32f7xx_it.h @@ -62,6 +62,7 @@ void TIM3_IRQHandler(void); void USART3_IRQHandler(void); void DMA2_Stream1_IRQHandler(void); void DMA2_Stream6_IRQHandler(void); +void USART6_IRQHandler(void); /* USER CODE BEGIN EFP */ /* USER CODE END EFP */ diff --git a/otto_controller_source/Inc/tf/FrameGraph.h b/otto_controller_source/Core/Inc/tf/FrameGraph.h similarity index 100% rename from otto_controller_source/Inc/tf/FrameGraph.h rename to otto_controller_source/Core/Inc/tf/FrameGraph.h diff --git a/otto_controller_source/Inc/tf/tf.h b/otto_controller_source/Core/Inc/tf/tf.h similarity index 100% rename from otto_controller_source/Inc/tf/tf.h rename to otto_controller_source/Core/Inc/tf/tf.h diff --git a/otto_controller_source/Inc/tf/tfMessage.h b/otto_controller_source/Core/Inc/tf/tfMessage.h similarity index 100% rename from otto_controller_source/Inc/tf/tfMessage.h rename to otto_controller_source/Core/Inc/tf/tfMessage.h diff --git a/otto_controller_source/Inc/tf/transform_broadcaster.h b/otto_controller_source/Core/Inc/tf/transform_broadcaster.h similarity index 100% rename from otto_controller_source/Inc/tf/transform_broadcaster.h rename to otto_controller_source/Core/Inc/tf/transform_broadcaster.h diff --git a/otto_controller_source/Inc/tf2_msgs/FrameGraph.h b/otto_controller_source/Core/Inc/tf2_msgs/FrameGraph.h similarity index 100% rename from otto_controller_source/Inc/tf2_msgs/FrameGraph.h rename to otto_controller_source/Core/Inc/tf2_msgs/FrameGraph.h diff --git a/otto_controller_source/Inc/tf2_msgs/LookupTransformAction.h b/otto_controller_source/Core/Inc/tf2_msgs/LookupTransformAction.h similarity index 100% rename from otto_controller_source/Inc/tf2_msgs/LookupTransformAction.h rename to otto_controller_source/Core/Inc/tf2_msgs/LookupTransformAction.h diff --git a/otto_controller_source/Inc/tf2_msgs/LookupTransformActionFeedback.h b/otto_controller_source/Core/Inc/tf2_msgs/LookupTransformActionFeedback.h similarity index 100% rename from otto_controller_source/Inc/tf2_msgs/LookupTransformActionFeedback.h rename to otto_controller_source/Core/Inc/tf2_msgs/LookupTransformActionFeedback.h diff --git a/otto_controller_source/Inc/tf2_msgs/LookupTransformActionGoal.h b/otto_controller_source/Core/Inc/tf2_msgs/LookupTransformActionGoal.h similarity index 100% rename from otto_controller_source/Inc/tf2_msgs/LookupTransformActionGoal.h rename to otto_controller_source/Core/Inc/tf2_msgs/LookupTransformActionGoal.h diff --git a/otto_controller_source/Inc/tf2_msgs/LookupTransformActionResult.h b/otto_controller_source/Core/Inc/tf2_msgs/LookupTransformActionResult.h similarity index 100% rename from otto_controller_source/Inc/tf2_msgs/LookupTransformActionResult.h rename to otto_controller_source/Core/Inc/tf2_msgs/LookupTransformActionResult.h diff --git a/otto_controller_source/Inc/tf2_msgs/LookupTransformFeedback.h b/otto_controller_source/Core/Inc/tf2_msgs/LookupTransformFeedback.h similarity index 100% rename from otto_controller_source/Inc/tf2_msgs/LookupTransformFeedback.h rename to otto_controller_source/Core/Inc/tf2_msgs/LookupTransformFeedback.h diff --git a/otto_controller_source/Inc/tf2_msgs/LookupTransformGoal.h b/otto_controller_source/Core/Inc/tf2_msgs/LookupTransformGoal.h similarity index 100% rename from otto_controller_source/Inc/tf2_msgs/LookupTransformGoal.h rename to otto_controller_source/Core/Inc/tf2_msgs/LookupTransformGoal.h diff --git a/otto_controller_source/Inc/tf2_msgs/LookupTransformResult.h b/otto_controller_source/Core/Inc/tf2_msgs/LookupTransformResult.h similarity index 100% rename from otto_controller_source/Inc/tf2_msgs/LookupTransformResult.h rename to otto_controller_source/Core/Inc/tf2_msgs/LookupTransformResult.h diff --git a/otto_controller_source/Inc/tf2_msgs/TF2Error.h b/otto_controller_source/Core/Inc/tf2_msgs/TF2Error.h similarity index 100% rename from otto_controller_source/Inc/tf2_msgs/TF2Error.h rename to otto_controller_source/Core/Inc/tf2_msgs/TF2Error.h diff --git a/otto_controller_source/Inc/tf2_msgs/TFMessage.h b/otto_controller_source/Core/Inc/tf2_msgs/TFMessage.h similarity index 100% rename from otto_controller_source/Inc/tf2_msgs/TFMessage.h rename to otto_controller_source/Core/Inc/tf2_msgs/TFMessage.h diff --git a/otto_controller_source/Inc/theora_image_transport/Packet.h b/otto_controller_source/Core/Inc/theora_image_transport/Packet.h similarity index 100% rename from otto_controller_source/Inc/theora_image_transport/Packet.h rename to otto_controller_source/Core/Inc/theora_image_transport/Packet.h diff --git a/otto_controller_source/Inc/topic_tools/DemuxAdd.h b/otto_controller_source/Core/Inc/topic_tools/DemuxAdd.h similarity index 100% rename from otto_controller_source/Inc/topic_tools/DemuxAdd.h rename to otto_controller_source/Core/Inc/topic_tools/DemuxAdd.h diff --git a/otto_controller_source/Inc/topic_tools/DemuxDelete.h b/otto_controller_source/Core/Inc/topic_tools/DemuxDelete.h similarity index 100% rename from otto_controller_source/Inc/topic_tools/DemuxDelete.h rename to otto_controller_source/Core/Inc/topic_tools/DemuxDelete.h diff --git a/otto_controller_source/Inc/topic_tools/DemuxList.h b/otto_controller_source/Core/Inc/topic_tools/DemuxList.h similarity index 100% rename from otto_controller_source/Inc/topic_tools/DemuxList.h rename to otto_controller_source/Core/Inc/topic_tools/DemuxList.h diff --git a/otto_controller_source/Inc/topic_tools/DemuxSelect.h b/otto_controller_source/Core/Inc/topic_tools/DemuxSelect.h similarity index 100% rename from otto_controller_source/Inc/topic_tools/DemuxSelect.h rename to otto_controller_source/Core/Inc/topic_tools/DemuxSelect.h diff --git a/otto_controller_source/Inc/topic_tools/MuxAdd.h b/otto_controller_source/Core/Inc/topic_tools/MuxAdd.h similarity index 100% rename from otto_controller_source/Inc/topic_tools/MuxAdd.h rename to otto_controller_source/Core/Inc/topic_tools/MuxAdd.h diff --git a/otto_controller_source/Inc/topic_tools/MuxDelete.h b/otto_controller_source/Core/Inc/topic_tools/MuxDelete.h similarity index 100% rename from otto_controller_source/Inc/topic_tools/MuxDelete.h rename to otto_controller_source/Core/Inc/topic_tools/MuxDelete.h diff --git a/otto_controller_source/Inc/topic_tools/MuxList.h b/otto_controller_source/Core/Inc/topic_tools/MuxList.h similarity index 100% rename from otto_controller_source/Inc/topic_tools/MuxList.h rename to otto_controller_source/Core/Inc/topic_tools/MuxList.h diff --git a/otto_controller_source/Inc/topic_tools/MuxSelect.h b/otto_controller_source/Core/Inc/topic_tools/MuxSelect.h similarity index 100% rename from otto_controller_source/Inc/topic_tools/MuxSelect.h rename to otto_controller_source/Core/Inc/topic_tools/MuxSelect.h diff --git a/otto_controller_source/Inc/trajectory_msgs/JointTrajectory.h b/otto_controller_source/Core/Inc/trajectory_msgs/JointTrajectory.h similarity index 100% rename from otto_controller_source/Inc/trajectory_msgs/JointTrajectory.h rename to otto_controller_source/Core/Inc/trajectory_msgs/JointTrajectory.h diff --git a/otto_controller_source/Inc/trajectory_msgs/JointTrajectoryPoint.h b/otto_controller_source/Core/Inc/trajectory_msgs/JointTrajectoryPoint.h similarity index 100% rename from otto_controller_source/Inc/trajectory_msgs/JointTrajectoryPoint.h rename to otto_controller_source/Core/Inc/trajectory_msgs/JointTrajectoryPoint.h diff --git a/otto_controller_source/Inc/trajectory_msgs/MultiDOFJointTrajectory.h b/otto_controller_source/Core/Inc/trajectory_msgs/MultiDOFJointTrajectory.h similarity index 100% rename from otto_controller_source/Inc/trajectory_msgs/MultiDOFJointTrajectory.h rename to otto_controller_source/Core/Inc/trajectory_msgs/MultiDOFJointTrajectory.h diff --git a/otto_controller_source/Inc/trajectory_msgs/MultiDOFJointTrajectoryPoint.h b/otto_controller_source/Core/Inc/trajectory_msgs/MultiDOFJointTrajectoryPoint.h similarity index 100% rename from otto_controller_source/Inc/trajectory_msgs/MultiDOFJointTrajectoryPoint.h rename to otto_controller_source/Core/Inc/trajectory_msgs/MultiDOFJointTrajectoryPoint.h diff --git a/otto_controller_source/Inc/turtle_actionlib/ShapeAction.h b/otto_controller_source/Core/Inc/turtle_actionlib/ShapeAction.h similarity index 100% rename from otto_controller_source/Inc/turtle_actionlib/ShapeAction.h rename to otto_controller_source/Core/Inc/turtle_actionlib/ShapeAction.h diff --git a/otto_controller_source/Inc/turtle_actionlib/ShapeActionFeedback.h b/otto_controller_source/Core/Inc/turtle_actionlib/ShapeActionFeedback.h similarity index 100% rename from otto_controller_source/Inc/turtle_actionlib/ShapeActionFeedback.h rename to otto_controller_source/Core/Inc/turtle_actionlib/ShapeActionFeedback.h diff --git a/otto_controller_source/Inc/turtle_actionlib/ShapeActionGoal.h b/otto_controller_source/Core/Inc/turtle_actionlib/ShapeActionGoal.h similarity index 100% rename from otto_controller_source/Inc/turtle_actionlib/ShapeActionGoal.h rename to otto_controller_source/Core/Inc/turtle_actionlib/ShapeActionGoal.h diff --git a/otto_controller_source/Inc/turtle_actionlib/ShapeActionResult.h b/otto_controller_source/Core/Inc/turtle_actionlib/ShapeActionResult.h similarity index 100% rename from otto_controller_source/Inc/turtle_actionlib/ShapeActionResult.h rename to otto_controller_source/Core/Inc/turtle_actionlib/ShapeActionResult.h diff --git a/otto_controller_source/Inc/turtle_actionlib/ShapeFeedback.h b/otto_controller_source/Core/Inc/turtle_actionlib/ShapeFeedback.h similarity index 100% rename from otto_controller_source/Inc/turtle_actionlib/ShapeFeedback.h rename to otto_controller_source/Core/Inc/turtle_actionlib/ShapeFeedback.h diff --git a/otto_controller_source/Inc/turtle_actionlib/ShapeGoal.h b/otto_controller_source/Core/Inc/turtle_actionlib/ShapeGoal.h similarity index 100% rename from otto_controller_source/Inc/turtle_actionlib/ShapeGoal.h rename to otto_controller_source/Core/Inc/turtle_actionlib/ShapeGoal.h diff --git a/otto_controller_source/Inc/turtle_actionlib/ShapeResult.h b/otto_controller_source/Core/Inc/turtle_actionlib/ShapeResult.h similarity index 100% rename from otto_controller_source/Inc/turtle_actionlib/ShapeResult.h rename to otto_controller_source/Core/Inc/turtle_actionlib/ShapeResult.h diff --git a/otto_controller_source/Inc/turtle_actionlib/Velocity.h b/otto_controller_source/Core/Inc/turtle_actionlib/Velocity.h similarity index 100% rename from otto_controller_source/Inc/turtle_actionlib/Velocity.h rename to otto_controller_source/Core/Inc/turtle_actionlib/Velocity.h diff --git a/otto_controller_source/Inc/turtlesim/Color.h b/otto_controller_source/Core/Inc/turtlesim/Color.h similarity index 100% rename from otto_controller_source/Inc/turtlesim/Color.h rename to otto_controller_source/Core/Inc/turtlesim/Color.h diff --git a/otto_controller_source/Inc/turtlesim/Kill.h b/otto_controller_source/Core/Inc/turtlesim/Kill.h similarity index 100% rename from otto_controller_source/Inc/turtlesim/Kill.h rename to otto_controller_source/Core/Inc/turtlesim/Kill.h diff --git a/otto_controller_source/Inc/turtlesim/Pose.h b/otto_controller_source/Core/Inc/turtlesim/Pose.h similarity index 100% rename from otto_controller_source/Inc/turtlesim/Pose.h rename to otto_controller_source/Core/Inc/turtlesim/Pose.h diff --git a/otto_controller_source/Inc/turtlesim/SetPen.h b/otto_controller_source/Core/Inc/turtlesim/SetPen.h similarity index 100% rename from otto_controller_source/Inc/turtlesim/SetPen.h rename to otto_controller_source/Core/Inc/turtlesim/SetPen.h diff --git a/otto_controller_source/Inc/turtlesim/Spawn.h b/otto_controller_source/Core/Inc/turtlesim/Spawn.h similarity index 100% rename from otto_controller_source/Inc/turtlesim/Spawn.h rename to otto_controller_source/Core/Inc/turtlesim/Spawn.h diff --git a/otto_controller_source/Inc/turtlesim/TeleportAbsolute.h b/otto_controller_source/Core/Inc/turtlesim/TeleportAbsolute.h similarity index 100% rename from otto_controller_source/Inc/turtlesim/TeleportAbsolute.h rename to otto_controller_source/Core/Inc/turtlesim/TeleportAbsolute.h diff --git a/otto_controller_source/Inc/turtlesim/TeleportRelative.h b/otto_controller_source/Core/Inc/turtlesim/TeleportRelative.h similarity index 100% rename from otto_controller_source/Inc/turtlesim/TeleportRelative.h rename to otto_controller_source/Core/Inc/turtlesim/TeleportRelative.h diff --git a/otto_controller_source/Inc/visualization_msgs/ImageMarker.h b/otto_controller_source/Core/Inc/visualization_msgs/ImageMarker.h similarity index 100% rename from otto_controller_source/Inc/visualization_msgs/ImageMarker.h rename to otto_controller_source/Core/Inc/visualization_msgs/ImageMarker.h diff --git a/otto_controller_source/Inc/visualization_msgs/InteractiveMarker.h b/otto_controller_source/Core/Inc/visualization_msgs/InteractiveMarker.h similarity index 100% rename from otto_controller_source/Inc/visualization_msgs/InteractiveMarker.h rename to otto_controller_source/Core/Inc/visualization_msgs/InteractiveMarker.h diff --git a/otto_controller_source/Inc/visualization_msgs/InteractiveMarkerControl.h b/otto_controller_source/Core/Inc/visualization_msgs/InteractiveMarkerControl.h similarity index 100% rename from otto_controller_source/Inc/visualization_msgs/InteractiveMarkerControl.h rename to otto_controller_source/Core/Inc/visualization_msgs/InteractiveMarkerControl.h diff --git a/otto_controller_source/Inc/visualization_msgs/InteractiveMarkerFeedback.h b/otto_controller_source/Core/Inc/visualization_msgs/InteractiveMarkerFeedback.h similarity index 100% rename from otto_controller_source/Inc/visualization_msgs/InteractiveMarkerFeedback.h rename to otto_controller_source/Core/Inc/visualization_msgs/InteractiveMarkerFeedback.h diff --git a/otto_controller_source/Inc/visualization_msgs/InteractiveMarkerInit.h b/otto_controller_source/Core/Inc/visualization_msgs/InteractiveMarkerInit.h similarity index 100% rename from otto_controller_source/Inc/visualization_msgs/InteractiveMarkerInit.h rename to otto_controller_source/Core/Inc/visualization_msgs/InteractiveMarkerInit.h diff --git a/otto_controller_source/Inc/visualization_msgs/InteractiveMarkerPose.h b/otto_controller_source/Core/Inc/visualization_msgs/InteractiveMarkerPose.h similarity index 100% rename from otto_controller_source/Inc/visualization_msgs/InteractiveMarkerPose.h rename to otto_controller_source/Core/Inc/visualization_msgs/InteractiveMarkerPose.h diff --git a/otto_controller_source/Inc/visualization_msgs/InteractiveMarkerUpdate.h b/otto_controller_source/Core/Inc/visualization_msgs/InteractiveMarkerUpdate.h similarity index 100% rename from otto_controller_source/Inc/visualization_msgs/InteractiveMarkerUpdate.h rename to otto_controller_source/Core/Inc/visualization_msgs/InteractiveMarkerUpdate.h diff --git a/otto_controller_source/Inc/visualization_msgs/Marker.h b/otto_controller_source/Core/Inc/visualization_msgs/Marker.h similarity index 100% rename from otto_controller_source/Inc/visualization_msgs/Marker.h rename to otto_controller_source/Core/Inc/visualization_msgs/Marker.h diff --git a/otto_controller_source/Inc/visualization_msgs/MarkerArray.h b/otto_controller_source/Core/Inc/visualization_msgs/MarkerArray.h similarity index 100% rename from otto_controller_source/Inc/visualization_msgs/MarkerArray.h rename to otto_controller_source/Core/Inc/visualization_msgs/MarkerArray.h diff --git a/otto_controller_source/Inc/visualization_msgs/MenuEntry.h b/otto_controller_source/Core/Inc/visualization_msgs/MenuEntry.h similarity index 100% rename from otto_controller_source/Inc/visualization_msgs/MenuEntry.h rename to otto_controller_source/Core/Inc/visualization_msgs/MenuEntry.h diff --git a/otto_controller_source/Src/duration.cpp b/otto_controller_source/Core/Src/duration.cpp similarity index 100% rename from otto_controller_source/Src/duration.cpp rename to otto_controller_source/Core/Src/duration.cpp diff --git a/otto_controller_source/Src/encoder.cpp b/otto_controller_source/Core/Src/encoder.cpp similarity index 100% rename from otto_controller_source/Src/encoder.cpp rename to otto_controller_source/Core/Src/encoder.cpp diff --git a/otto_controller_source/Core/Src/main.cpp b/otto_controller_source/Core/Src/main.cpp new file mode 100644 index 0000000..fef8e78 --- /dev/null +++ b/otto_controller_source/Core/Src/main.cpp @@ -0,0 +1,618 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file : main.c + * @brief : Main program body + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2019 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ +#include +#include + +#include +#include +#include + +/* USER CODE END Includes */ + +/* Private typedef -----------------------------------------------------------*/ +/* USER CODE BEGIN PTD */ + +/* USER CODE END PTD */ + +/* Private define ------------------------------------------------------------*/ +/* USER CODE BEGIN PD */ +/* USER CODE END PD */ + +/* Private macro -------------------------------------------------------------*/ +/* USER CODE BEGIN PM */ + +/* USER CODE END PM */ + +/* Private variables ---------------------------------------------------------*/ + +TIM_HandleTypeDef htim2; +TIM_HandleTypeDef htim3; +TIM_HandleTypeDef htim4; +TIM_HandleTypeDef htim5; + +UART_HandleTypeDef huart3; +UART_HandleTypeDef huart6; +DMA_HandleTypeDef hdma_usart3_rx; +DMA_HandleTypeDef hdma_usart3_tx; +DMA_HandleTypeDef hdma_usart6_rx; +DMA_HandleTypeDef hdma_usart6_tx; + +/* USER CODE BEGIN PV */ + +//Odometry +Encoder left_encoder = Encoder(&htim2); +Encoder right_encoder = Encoder(&htim5); +OdometryCalc odom = OdometryCalc(left_encoder, right_encoder); + +//test stuff +float delta_r = 0; +float delta_l = 0; +float velocity_l = 0; +float velocity_r = 0; + +//ROS stuff +ros::NodeHandle nh; +std_msgs::String str_msg; +ros::Publisher chatter("chatter", &str_msg); +char hello[] = "Hello world!"; + +nav_msgs::Odometry odometry; +ros::Publisher odom_pub("odom_pub", &odometry); + +/* USER CODE END PV */ + +/* Private function prototypes -----------------------------------------------*/ +void SystemClock_Config(void); +static void MX_GPIO_Init(void); +static void MX_DMA_Init(void); +static void MX_TIM2_Init(void); +static void MX_TIM3_Init(void); +static void MX_TIM4_Init(void); +static void MX_TIM5_Init(void); +static void MX_USART3_UART_Init(void); +static void MX_USART6_UART_Init(void); +/* USER CODE BEGIN PFP */ + +/* USER CODE END PFP */ + +/* Private user code ---------------------------------------------------------*/ +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +/** + * @brief The application entry point. + * @retval int + */ +int main(void) { + /* USER CODE BEGIN 1 */ + + /* USER CODE END 1 */ + + /* MCU Configuration--------------------------------------------------------*/ + + /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ + HAL_Init(); + + /* USER CODE BEGIN Init */ + + /* USER CODE END Init */ + + /* Configure the system clock */ + SystemClock_Config(); + + /* USER CODE BEGIN SysInit */ + + /* USER CODE END SysInit */ + + /* Initialize all configured peripherals */ + MX_GPIO_Init(); + MX_DMA_Init(); + MX_TIM2_Init(); + MX_TIM3_Init(); + MX_TIM4_Init(); + MX_TIM5_Init(); + MX_USART3_UART_Init(); + MX_USART6_UART_Init(); + /* USER CODE BEGIN 2 */ + + nh.initNode(); + nh.advertise(chatter); + nh.advertise(odom_pub); + str_msg.data = hello; + + left_encoder.Setup(); + right_encoder.Setup(); + + //TODO sistemare il costruttore di odom, non dovrei fare io questa cosa a mano + odom.right_encoder_ = right_encoder; + odom.left_encoder_ = left_encoder; + +// HAL_TIM_Base_Start_IT(&htim3); + + /* USER CODE END 2 */ + + /* Infinite loop */ + /* USER CODE BEGIN WHILE */ + while (1) { + odom.OdometryUpdateMessage(); + odometry = odom.odometry_; + odom_pub.publish(&odometry); + /* USER CODE END WHILE */ + + /* USER CODE BEGIN 3 */ + } + /* USER CODE END 3 */ +} + +/** + * @brief System Clock Configuration + * @retval None + */ +void SystemClock_Config(void) { + RCC_OscInitTypeDef RCC_OscInitStruct = { 0 }; + RCC_ClkInitTypeDef RCC_ClkInitStruct = { 0 }; + RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = { 0 }; + + /** Configure the main internal regulator output voltage + */ + __HAL_RCC_PWR_CLK_ENABLE(); + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE3); + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { + Error_Handler(); + } + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK + | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) { + Error_Handler(); + } + PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART3 + | RCC_PERIPHCLK_USART6; + PeriphClkInitStruct.Usart3ClockSelection = RCC_USART3CLKSOURCE_PCLK1; + PeriphClkInitStruct.Usart6ClockSelection = RCC_USART6CLKSOURCE_PCLK2; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) { + Error_Handler(); + } +} + +/** + * @brief TIM2 Initialization Function + * @param None + * @retval None + */ +static void MX_TIM2_Init(void) { + + /* USER CODE BEGIN TIM2_Init 0 */ + + /* USER CODE END TIM2_Init 0 */ + + TIM_Encoder_InitTypeDef sConfig = { 0 }; + TIM_MasterConfigTypeDef sMasterConfig = { 0 }; + + /* USER CODE BEGIN TIM2_Init 1 */ + + /* USER CODE END TIM2_Init 1 */ + htim2.Instance = TIM2; + htim2.Init.Prescaler = 0; + htim2.Init.CounterMode = TIM_COUNTERMODE_UP; + htim2.Init.Period = 4294967295; + htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + sConfig.EncoderMode = TIM_ENCODERMODE_TI12; + sConfig.IC1Polarity = TIM_ICPOLARITY_RISING; + sConfig.IC1Selection = TIM_ICSELECTION_DIRECTTI; + sConfig.IC1Prescaler = TIM_ICPSC_DIV1; + sConfig.IC1Filter = 0; + sConfig.IC2Polarity = TIM_ICPOLARITY_RISING; + sConfig.IC2Selection = TIM_ICSELECTION_DIRECTTI; + sConfig.IC2Prescaler = TIM_ICPSC_DIV1; + sConfig.IC2Filter = 0; + if (HAL_TIM_Encoder_Init(&htim2, &sConfig) != HAL_OK) { + Error_Handler(); + } + sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; + sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) + != HAL_OK) { + Error_Handler(); + } + /* USER CODE BEGIN TIM2_Init 2 */ + + /* USER CODE END TIM2_Init 2 */ + +} + +/** + * @brief TIM3 Initialization Function + * @param None + * @retval None + */ +static void MX_TIM3_Init(void) { + + /* USER CODE BEGIN TIM3_Init 0 */ + + /* USER CODE END TIM3_Init 0 */ + + TIM_ClockConfigTypeDef sClockSourceConfig = { 0 }; + TIM_MasterConfigTypeDef sMasterConfig = { 0 }; + + /* USER CODE BEGIN TIM3_Init 1 */ + + /* USER CODE END TIM3_Init 1 */ + htim3.Instance = TIM3; + htim3.Init.Prescaler = 39999; + htim3.Init.CounterMode = TIM_COUNTERMODE_UP; + htim3.Init.Period = 9; + htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + if (HAL_TIM_Base_Init(&htim3) != HAL_OK) { + Error_Handler(); + } + sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; + if (HAL_TIM_ConfigClockSource(&htim3, &sClockSourceConfig) != HAL_OK) { + Error_Handler(); + } + sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; + sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) + != HAL_OK) { + Error_Handler(); + } + /* USER CODE BEGIN TIM3_Init 2 */ + + /* USER CODE END TIM3_Init 2 */ + +} + +/** + * @brief TIM4 Initialization Function + * @param None + * @retval None + */ +static void MX_TIM4_Init(void) { + + /* USER CODE BEGIN TIM4_Init 0 */ + + /* USER CODE END TIM4_Init 0 */ + + TIM_ClockConfigTypeDef sClockSourceConfig = { 0 }; + TIM_MasterConfigTypeDef sMasterConfig = { 0 }; + TIM_OC_InitTypeDef sConfigOC = { 0 }; + + /* USER CODE BEGIN TIM4_Init 1 */ + + /* USER CODE END TIM4_Init 1 */ + htim4.Instance = TIM4; + htim4.Init.Prescaler = 0; + htim4.Init.CounterMode = TIM_COUNTERMODE_UP; + htim4.Init.Period = 0; + htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + if (HAL_TIM_Base_Init(&htim4) != HAL_OK) { + Error_Handler(); + } + sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; + if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) { + Error_Handler(); + } + if (HAL_TIM_PWM_Init(&htim4) != HAL_OK) { + Error_Handler(); + } + sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; + sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) + != HAL_OK) { + Error_Handler(); + } + sConfigOC.OCMode = TIM_OCMODE_PWM1; + sConfigOC.Pulse = 0; + sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) + != HAL_OK) { + Error_Handler(); + } + if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_4) + != HAL_OK) { + Error_Handler(); + } + /* USER CODE BEGIN TIM4_Init 2 */ + + /* USER CODE END TIM4_Init 2 */ + HAL_TIM_MspPostInit(&htim4); + +} + +/** + * @brief TIM5 Initialization Function + * @param None + * @retval None + */ +static void MX_TIM5_Init(void) { + + /* USER CODE BEGIN TIM5_Init 0 */ + + /* USER CODE END TIM5_Init 0 */ + + TIM_Encoder_InitTypeDef sConfig = { 0 }; + TIM_MasterConfigTypeDef sMasterConfig = { 0 }; + + /* USER CODE BEGIN TIM5_Init 1 */ + + /* USER CODE END TIM5_Init 1 */ + htim5.Instance = TIM5; + htim5.Init.Prescaler = 0; + htim5.Init.CounterMode = TIM_COUNTERMODE_UP; + htim5.Init.Period = 4294967295; + htim5.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + htim5.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + sConfig.EncoderMode = TIM_ENCODERMODE_TI12; + sConfig.IC1Polarity = TIM_ICPOLARITY_RISING; + sConfig.IC1Selection = TIM_ICSELECTION_DIRECTTI; + sConfig.IC1Prescaler = TIM_ICPSC_DIV1; + sConfig.IC1Filter = 0; + sConfig.IC2Polarity = TIM_ICPOLARITY_RISING; + sConfig.IC2Selection = TIM_ICSELECTION_DIRECTTI; + sConfig.IC2Prescaler = TIM_ICPSC_DIV1; + sConfig.IC2Filter = 0; + if (HAL_TIM_Encoder_Init(&htim5, &sConfig) != HAL_OK) { + Error_Handler(); + } + sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; + sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + if (HAL_TIMEx_MasterConfigSynchronization(&htim5, &sMasterConfig) + != HAL_OK) { + Error_Handler(); + } + /* USER CODE BEGIN TIM5_Init 2 */ + + /* USER CODE END TIM5_Init 2 */ + +} + +/** + * @brief USART3 Initialization Function + * @param None + * @retval None + */ +static void MX_USART3_UART_Init(void) { + + /* USER CODE BEGIN USART3_Init 0 */ + + /* USER CODE END USART3_Init 0 */ + + /* USER CODE BEGIN USART3_Init 1 */ + + /* USER CODE END USART3_Init 1 */ + huart3.Instance = USART3; + huart3.Init.BaudRate = 115200; + huart3.Init.WordLength = UART_WORDLENGTH_8B; + huart3.Init.StopBits = UART_STOPBITS_1; + huart3.Init.Parity = UART_PARITY_NONE; + huart3.Init.Mode = UART_MODE_TX_RX; + huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE; + huart3.Init.OverSampling = UART_OVERSAMPLING_16; + huart3.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; + huart3.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; + if (HAL_UART_Init(&huart3) != HAL_OK) { + Error_Handler(); + } + /* USER CODE BEGIN USART3_Init 2 */ + + /* USER CODE END USART3_Init 2 */ + +} + +/** + * @brief USART6 Initialization Function + * @param None + * @retval None + */ +static void MX_USART6_UART_Init(void) { + + /* USER CODE BEGIN USART6_Init 0 */ + + /* USER CODE END USART6_Init 0 */ + + /* USER CODE BEGIN USART6_Init 1 */ + + /* USER CODE END USART6_Init 1 */ + huart6.Instance = USART6; + huart6.Init.BaudRate = 115200; + huart6.Init.WordLength = UART_WORDLENGTH_8B; + huart6.Init.StopBits = UART_STOPBITS_1; + huart6.Init.Parity = UART_PARITY_NONE; + huart6.Init.Mode = UART_MODE_TX_RX; + huart6.Init.HwFlowCtl = UART_HWCONTROL_NONE; + huart6.Init.OverSampling = UART_OVERSAMPLING_16; + huart6.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; + huart6.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; + if (HAL_UART_Init(&huart6) != HAL_OK) { + Error_Handler(); + } + /* USER CODE BEGIN USART6_Init 2 */ + + /* USER CODE END USART6_Init 2 */ + +} + +/** + * Enable DMA controller clock + */ +static void MX_DMA_Init(void) { + + /* DMA controller clock enable */ + __HAL_RCC_DMA1_CLK_ENABLE(); + __HAL_RCC_DMA2_CLK_ENABLE(); + + /* DMA interrupt init */ + /* DMA1_Stream1_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(DMA1_Stream1_IRQn, 0, 0); + HAL_NVIC_EnableIRQ(DMA1_Stream1_IRQn); + /* DMA1_Stream3_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(DMA1_Stream3_IRQn, 0, 0); + HAL_NVIC_EnableIRQ(DMA1_Stream3_IRQn); + /* DMA2_Stream1_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(DMA2_Stream1_IRQn, 0, 0); + HAL_NVIC_EnableIRQ(DMA2_Stream1_IRQn); + /* DMA2_Stream6_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(DMA2_Stream6_IRQn, 0, 0); + HAL_NVIC_EnableIRQ(DMA2_Stream6_IRQn); + +} + +/** + * @brief GPIO Initialization Function + * @param None + * @retval None + */ +static void MX_GPIO_Init(void) { + GPIO_InitTypeDef GPIO_InitStruct = { 0 }; + + /* GPIO Ports Clock Enable */ + __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOA_CLK_ENABLE(); + __HAL_RCC_GPIOF_CLK_ENABLE(); + __HAL_RCC_GPIOE_CLK_ENABLE(); + __HAL_RCC_GPIOD_CLK_ENABLE(); + __HAL_RCC_GPIOB_CLK_ENABLE(); + + /*Configure GPIO pin Output Level */ + HAL_GPIO_WritePin(GPIOF, dir1_Pin | sleep2_Pin | sleep1_Pin, + GPIO_PIN_RESET); + + /*Configure GPIO pin Output Level */ + HAL_GPIO_WritePin(GPIOB, GPIO_PIN_8, GPIO_PIN_RESET); + + /*Configure GPIO pin : PC0 */ + GPIO_InitStruct.Pin = GPIO_PIN_0; + GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); + + /*Configure GPIO pin : current1_Pin */ + GPIO_InitStruct.Pin = current1_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(current1_GPIO_Port, &GPIO_InitStruct); + + /*Configure GPIO pin : fault2_Pin */ + GPIO_InitStruct.Pin = fault2_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(fault2_GPIO_Port, &GPIO_InitStruct); + + /*Configure GPIO pins : dir1_Pin sleep2_Pin sleep1_Pin */ + GPIO_InitStruct.Pin = dir1_Pin | sleep2_Pin | sleep1_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); + + /*Configure GPIO pin : fault1_Pin */ + GPIO_InitStruct.Pin = fault1_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(fault1_GPIO_Port, &GPIO_InitStruct); + + /*Configure GPIO pin : PB8 */ + GPIO_InitStruct.Pin = GPIO_PIN_8; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + +} + +/* USER CODE BEGIN 4 */ +void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) { + if (htim->Instance == TIM3) { + velocity_l = left_encoder.GetLinearVelocity(); + velocity_r = right_encoder.GetLinearVelocity(); +// delta_r = right_encoder.current_millis_ - right_encoder.previous_millis_; +// delta_l = left_encoder.current_millis_ - left_encoder.previous_millis_; + +// odom.OdometryUpdateMessage(); +// odometry = odom.odometry_; +// odom_pub.publish(&odometry); + + chatter.publish(&str_msg); + nh.spinOnce(); + + } +} +void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) { + nh.getHardware()->flush(); +} + +void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) { + nh.getHardware()->reset_rbuf(); +} + +/* USER CODE END 4 */ + +/** + * @brief This function is executed in case of error occurrence. + * @retval None + */ +void Error_Handler(void) { + /* USER CODE BEGIN Error_Handler_Debug */ + /* User can add his own implementation to report the HAL error return state */ + + /* USER CODE END Error_Handler_Debug */ +} + +#ifdef USE_FULL_ASSERT +/** + * @brief Reports the name of the source file and the source line number + * where the assert_param error has occurred. + * @param file: pointer to the source file name + * @param line: assert_param error line source number + * @retval None + */ +void assert_failed(uint8_t *file, uint32_t line) +{ + /* USER CODE BEGIN 6 */ + /* User can add his own implementation to report the file name and line number, + tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ + /* USER CODE END 6 */ +} +#endif /* USE_FULL_ASSERT */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/otto_controller_source/Src/odometry_calc.cpp b/otto_controller_source/Core/Src/odometry_calc.cpp similarity index 95% rename from otto_controller_source/Src/odometry_calc.cpp rename to otto_controller_source/Core/Src/odometry_calc.cpp index db1bdfe..d0c6851 100644 --- a/otto_controller_source/Src/odometry_calc.cpp +++ b/otto_controller_source/Core/Src/odometry_calc.cpp @@ -1,7 +1,4 @@ #include "odometry_calc.h" -#include -#include -#include void OdometryCalc::OdometryUpdateMessage(){ float left_velocity = left_encoder_.GetLinearVelocity(); diff --git a/otto_controller_source/Src/stm32f7xx_hal_msp.c b/otto_controller_source/Core/Src/stm32f7xx_hal_msp.c similarity index 91% rename from otto_controller_source/Src/stm32f7xx_hal_msp.c rename to otto_controller_source/Core/Src/stm32f7xx_hal_msp.c index 4100bda..9ac67e0 100644 --- a/otto_controller_source/Src/stm32f7xx_hal_msp.c +++ b/otto_controller_source/Core/Src/stm32f7xx_hal_msp.c @@ -176,18 +176,7 @@ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) /* USER CODE END TIM3_MspInit 1 */ } - -} - -/** -* @brief TIM_PWM MSP Initialization -* This function configures the hardware resources used in this example -* @param htim_pwm: TIM_PWM handle pointer -* @retval None -*/ -void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef* htim_pwm) -{ - if(htim_pwm->Instance==TIM4) + else if(htim_base->Instance==TIM4) { /* USER CODE BEGIN TIM4_MspInit 0 */ @@ -215,7 +204,7 @@ void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim) PD14 ------> TIM4_CH3 PD15 ------> TIM4_CH4 */ - GPIO_InitStruct.Pin = pwm_2_Pin|pwm_1_Pin; + GPIO_InitStruct.Pin = pwm2_Pin|pwm1_Pin; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; @@ -299,18 +288,7 @@ void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base) /* USER CODE END TIM3_MspDeInit 1 */ } - -} - -/** -* @brief TIM_PWM MSP De-Initialization -* This function freeze the hardware resources used in this example -* @param htim_pwm: TIM_PWM handle pointer -* @retval None -*/ -void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef* htim_pwm) -{ - if(htim_pwm->Instance==TIM4) + else if(htim_base->Instance==TIM4) { /* USER CODE BEGIN TIM4_MspDeInit 0 */ @@ -363,7 +341,7 @@ void HAL_UART_MspInit(UART_HandleTypeDef* huart) hdma_usart3_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; hdma_usart3_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; hdma_usart3_rx.Init.Mode = DMA_NORMAL; - hdma_usart3_rx.Init.Priority = DMA_PRIORITY_HIGH; + hdma_usart3_rx.Init.Priority = DMA_PRIORITY_LOW; hdma_usart3_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; if (HAL_DMA_Init(&hdma_usart3_rx) != HAL_OK) { @@ -381,7 +359,7 @@ void HAL_UART_MspInit(UART_HandleTypeDef* huart) hdma_usart3_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; hdma_usart3_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; hdma_usart3_tx.Init.Mode = DMA_NORMAL; - hdma_usart3_tx.Init.Priority = DMA_PRIORITY_HIGH; + hdma_usart3_tx.Init.Priority = DMA_PRIORITY_LOW; hdma_usart3_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; if (HAL_DMA_Init(&hdma_usart3_tx) != HAL_OK) { @@ -427,7 +405,7 @@ void HAL_UART_MspInit(UART_HandleTypeDef* huart) hdma_usart6_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; hdma_usart6_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; hdma_usart6_rx.Init.Mode = DMA_NORMAL; - hdma_usart6_rx.Init.Priority = DMA_PRIORITY_HIGH; + hdma_usart6_rx.Init.Priority = DMA_PRIORITY_LOW; hdma_usart6_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; if (HAL_DMA_Init(&hdma_usart6_rx) != HAL_OK) { @@ -445,7 +423,7 @@ void HAL_UART_MspInit(UART_HandleTypeDef* huart) hdma_usart6_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; hdma_usart6_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; hdma_usart6_tx.Init.Mode = DMA_NORMAL; - hdma_usart6_tx.Init.Priority = DMA_PRIORITY_HIGH; + hdma_usart6_tx.Init.Priority = DMA_PRIORITY_LOW; hdma_usart6_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; if (HAL_DMA_Init(&hdma_usart6_tx) != HAL_OK) { @@ -454,6 +432,9 @@ void HAL_UART_MspInit(UART_HandleTypeDef* huart) __HAL_LINKDMA(huart,hdmatx,hdma_usart6_tx); + /* USART6 interrupt Init */ + HAL_NVIC_SetPriority(USART6_IRQn, 0, 0); + HAL_NVIC_EnableIRQ(USART6_IRQn); /* USER CODE BEGIN USART6_MspInit 1 */ /* USER CODE END USART6_MspInit 1 */ @@ -510,6 +491,9 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* huart) /* USART6 DMA DeInit */ HAL_DMA_DeInit(huart->hdmarx); HAL_DMA_DeInit(huart->hdmatx); + + /* USART6 interrupt DeInit */ + HAL_NVIC_DisableIRQ(USART6_IRQn); /* USER CODE BEGIN USART6_MspDeInit 1 */ /* USER CODE END USART6_MspDeInit 1 */ diff --git a/otto_controller_source/Src/stm32f7xx_it.c b/otto_controller_source/Core/Src/stm32f7xx_it.c similarity index 92% rename from otto_controller_source/Src/stm32f7xx_it.c rename to otto_controller_source/Core/Src/stm32f7xx_it.c index c47b9b1..4f1c9c6 100644 --- a/otto_controller_source/Src/stm32f7xx_it.c +++ b/otto_controller_source/Core/Src/stm32f7xx_it.c @@ -62,6 +62,7 @@ extern DMA_HandleTypeDef hdma_usart3_tx; extern DMA_HandleTypeDef hdma_usart6_rx; extern DMA_HandleTypeDef hdma_usart6_tx; extern UART_HandleTypeDef huart3; +extern UART_HandleTypeDef huart6; /* USER CODE BEGIN EV */ /* USER CODE END EV */ @@ -286,6 +287,20 @@ void DMA2_Stream6_IRQHandler(void) /* USER CODE END DMA2_Stream6_IRQn 1 */ } +/** + * @brief This function handles USART6 global interrupt. + */ +void USART6_IRQHandler(void) +{ + /* USER CODE BEGIN USART6_IRQn 0 */ + + /* USER CODE END USART6_IRQn 0 */ + HAL_UART_IRQHandler(&huart6); + /* USER CODE BEGIN USART6_IRQn 1 */ + + /* USER CODE END USART6_IRQn 1 */ +} + /* USER CODE BEGIN 1 */ /* USER CODE END 1 */ diff --git a/otto_controller_source/Src/syscalls.c b/otto_controller_source/Core/Src/syscalls.c similarity index 100% rename from otto_controller_source/Src/syscalls.c rename to otto_controller_source/Core/Src/syscalls.c diff --git a/otto_controller_source/Src/sysmem.c b/otto_controller_source/Core/Src/sysmem.c similarity index 100% rename from otto_controller_source/Src/sysmem.c rename to otto_controller_source/Core/Src/sysmem.c diff --git a/otto_controller_source/Src/system_stm32f7xx.c b/otto_controller_source/Core/Src/system_stm32f7xx.c similarity index 100% rename from otto_controller_source/Src/system_stm32f7xx.c rename to otto_controller_source/Core/Src/system_stm32f7xx.c diff --git a/otto_controller_source/Src/time.cpp b/otto_controller_source/Core/Src/time.cpp similarity index 100% rename from otto_controller_source/Src/time.cpp rename to otto_controller_source/Core/Src/time.cpp diff --git a/otto_controller_source/Startup/startup_stm32f767zitx.s b/otto_controller_source/Core/Startup/startup_stm32f767zitx.s similarity index 100% rename from otto_controller_source/Startup/startup_stm32f767zitx.s rename to otto_controller_source/Core/Startup/startup_stm32f767zitx.s diff --git a/otto_controller_source/Debug/Core/Src/subdir.mk b/otto_controller_source/Debug/Core/Src/subdir.mk new file mode 100644 index 0000000..873f05b --- /dev/null +++ b/otto_controller_source/Debug/Core/Src/subdir.mk @@ -0,0 +1,68 @@ +################################################################################ +# Automatically-generated file. Do not edit! +################################################################################ + +# Add inputs and outputs from these tool invocations to the build variables +C_SRCS += \ +../Core/Src/stm32f7xx_hal_msp.c \ +../Core/Src/stm32f7xx_it.c \ +../Core/Src/syscalls.c \ +../Core/Src/sysmem.c \ +../Core/Src/system_stm32f7xx.c + +CPP_SRCS += \ +../Core/Src/duration.cpp \ +../Core/Src/encoder.cpp \ +../Core/Src/main.cpp \ +../Core/Src/odometry_calc.cpp \ +../Core/Src/time.cpp + +OBJS += \ +./Core/Src/duration.o \ +./Core/Src/encoder.o \ +./Core/Src/main.o \ +./Core/Src/odometry_calc.o \ +./Core/Src/stm32f7xx_hal_msp.o \ +./Core/Src/stm32f7xx_it.o \ +./Core/Src/syscalls.o \ +./Core/Src/sysmem.o \ +./Core/Src/system_stm32f7xx.o \ +./Core/Src/time.o + +C_DEPS += \ +./Core/Src/stm32f7xx_hal_msp.d \ +./Core/Src/stm32f7xx_it.d \ +./Core/Src/syscalls.d \ +./Core/Src/sysmem.d \ +./Core/Src/system_stm32f7xx.d + +CPP_DEPS += \ +./Core/Src/duration.d \ +./Core/Src/encoder.d \ +./Core/Src/main.d \ +./Core/Src/odometry_calc.d \ +./Core/Src/time.d + + +# Each subdirectory must supply rules for building sources it contributes +Core/Src/duration.o: ../Core/Src/duration.cpp + arm-none-eabi-g++ "$<" -mcpu=cortex-m7 -std=gnu++14 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -fno-exceptions -fno-rtti -fno-threadsafe-statics -fno-use-cxa-atexit -Wall -fstack-usage -MMD -MP -MF"Core/Src/duration.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" +Core/Src/encoder.o: ../Core/Src/encoder.cpp + arm-none-eabi-g++ "$<" -mcpu=cortex-m7 -std=gnu++14 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -fno-exceptions -fno-rtti -fno-threadsafe-statics -fno-use-cxa-atexit -Wall -fstack-usage -MMD -MP -MF"Core/Src/encoder.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" +Core/Src/main.o: ../Core/Src/main.cpp + arm-none-eabi-g++ "$<" -mcpu=cortex-m7 -std=gnu++14 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -fno-exceptions -fno-rtti -fno-threadsafe-statics -fno-use-cxa-atexit -Wall -fstack-usage -MMD -MP -MF"Core/Src/main.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" +Core/Src/odometry_calc.o: ../Core/Src/odometry_calc.cpp + arm-none-eabi-g++ "$<" -mcpu=cortex-m7 -std=gnu++14 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -fno-exceptions -fno-rtti -fno-threadsafe-statics -fno-use-cxa-atexit -Wall -fstack-usage -MMD -MP -MF"Core/Src/odometry_calc.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" +Core/Src/stm32f7xx_hal_msp.o: ../Core/Src/stm32f7xx_hal_msp.c + arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/stm32f7xx_hal_msp.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" +Core/Src/stm32f7xx_it.o: ../Core/Src/stm32f7xx_it.c + arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/stm32f7xx_it.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" +Core/Src/syscalls.o: ../Core/Src/syscalls.c + arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/syscalls.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" +Core/Src/sysmem.o: ../Core/Src/sysmem.c + arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/sysmem.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" +Core/Src/system_stm32f7xx.o: ../Core/Src/system_stm32f7xx.c + arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/system_stm32f7xx.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" +Core/Src/time.o: ../Core/Src/time.cpp + arm-none-eabi-g++ "$<" -mcpu=cortex-m7 -std=gnu++14 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -fno-exceptions -fno-rtti -fno-threadsafe-statics -fno-use-cxa-atexit -Wall -fstack-usage -MMD -MP -MF"Core/Src/time.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" + diff --git a/otto_controller_source/Debug/Core/Startup/subdir.mk b/otto_controller_source/Debug/Core/Startup/subdir.mk new file mode 100644 index 0000000..481e2a5 --- /dev/null +++ b/otto_controller_source/Debug/Core/Startup/subdir.mk @@ -0,0 +1,16 @@ +################################################################################ +# Automatically-generated file. Do not edit! +################################################################################ + +# Add inputs and outputs from these tool invocations to the build variables +S_SRCS += \ +../Core/Startup/startup_stm32f767zitx.s + +OBJS += \ +./Core/Startup/startup_stm32f767zitx.o + + +# Each subdirectory must supply rules for building sources it contributes +Core/Startup/%.o: ../Core/Startup/%.s + arm-none-eabi-gcc -mcpu=cortex-m7 -g3 -c -x assembler-with-cpp --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" "$<" + diff --git a/otto_controller_source/Debug/Drivers/STM32F7xx_HAL_Driver/Src/subdir.mk b/otto_controller_source/Debug/Drivers/STM32F7xx_HAL_Driver/Src/subdir.mk index cc497af..2a0a6ce 100644 --- a/otto_controller_source/Debug/Drivers/STM32F7xx_HAL_Driver/Src/subdir.mk +++ b/otto_controller_source/Debug/Drivers/STM32F7xx_HAL_Driver/Src/subdir.mk @@ -66,39 +66,39 @@ C_DEPS += \ # Each subdirectory must supply rules for building sources it contributes Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Inc -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" + arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Inc -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" + arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Inc -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" + arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Inc -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" + arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Inc -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" + arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Inc -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" + arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Inc -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" + arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Inc -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" + arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Inc -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" + arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Inc -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" + arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Inc -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" + arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Inc -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" + arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Inc -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" + arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Inc -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" + arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Inc -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" + arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Inc -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" + arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Inc -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" + arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Inc -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" + arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" diff --git a/otto_controller_source/Debug/Src/subdir.mk b/otto_controller_source/Debug/Src/subdir.mk deleted file mode 100644 index fb5a19e..0000000 --- a/otto_controller_source/Debug/Src/subdir.mk +++ /dev/null @@ -1,68 +0,0 @@ -################################################################################ -# Automatically-generated file. Do not edit! -################################################################################ - -# Add inputs and outputs from these tool invocations to the build variables -C_SRCS += \ -../Src/stm32f7xx_hal_msp.c \ -../Src/stm32f7xx_it.c \ -../Src/syscalls.c \ -../Src/sysmem.c \ -../Src/system_stm32f7xx.c - -CPP_SRCS += \ -../Src/duration.cpp \ -../Src/encoder.cpp \ -../Src/main.cpp \ -../Src/odometry_calc.cpp \ -../Src/time.cpp - -OBJS += \ -./Src/duration.o \ -./Src/encoder.o \ -./Src/main.o \ -./Src/odometry_calc.o \ -./Src/stm32f7xx_hal_msp.o \ -./Src/stm32f7xx_it.o \ -./Src/syscalls.o \ -./Src/sysmem.o \ -./Src/system_stm32f7xx.o \ -./Src/time.o - -C_DEPS += \ -./Src/stm32f7xx_hal_msp.d \ -./Src/stm32f7xx_it.d \ -./Src/syscalls.d \ -./Src/sysmem.d \ -./Src/system_stm32f7xx.d - -CPP_DEPS += \ -./Src/duration.d \ -./Src/encoder.d \ -./Src/main.d \ -./Src/odometry_calc.d \ -./Src/time.d - - -# Each subdirectory must supply rules for building sources it contributes -Src/duration.o: ../Src/duration.cpp - arm-none-eabi-g++ "$<" -mcpu=cortex-m7 -std=gnu++14 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Inc -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -fno-exceptions -fno-rtti -fno-threadsafe-statics -fno-use-cxa-atexit -Wall -fstack-usage -MMD -MP -MF"Src/duration.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" -Src/encoder.o: ../Src/encoder.cpp - arm-none-eabi-g++ "$<" -mcpu=cortex-m7 -std=gnu++14 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Inc -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -fno-exceptions -fno-rtti -fno-threadsafe-statics -fno-use-cxa-atexit -Wall -fstack-usage -MMD -MP -MF"Src/encoder.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" -Src/main.o: ../Src/main.cpp - arm-none-eabi-g++ "$<" -mcpu=cortex-m7 -std=gnu++14 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Inc -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -fno-exceptions -fno-rtti -fno-threadsafe-statics -fno-use-cxa-atexit -Wall -fstack-usage -MMD -MP -MF"Src/main.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" -Src/odometry_calc.o: ../Src/odometry_calc.cpp - arm-none-eabi-g++ "$<" -mcpu=cortex-m7 -std=gnu++14 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Inc -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -fno-exceptions -fno-rtti -fno-threadsafe-statics -fno-use-cxa-atexit -Wall -fstack-usage -MMD -MP -MF"Src/odometry_calc.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" -Src/stm32f7xx_hal_msp.o: ../Src/stm32f7xx_hal_msp.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Inc -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Src/stm32f7xx_hal_msp.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" -Src/stm32f7xx_it.o: ../Src/stm32f7xx_it.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Inc -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Src/stm32f7xx_it.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" -Src/syscalls.o: ../Src/syscalls.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Inc -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Src/syscalls.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" -Src/sysmem.o: ../Src/sysmem.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Inc -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Src/sysmem.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" -Src/system_stm32f7xx.o: ../Src/system_stm32f7xx.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Inc -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Src/system_stm32f7xx.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" -Src/time.o: ../Src/time.cpp - arm-none-eabi-g++ "$<" -mcpu=cortex-m7 -std=gnu++14 -g3 -DUSE_HAL_DRIVER -DSTM32F767xx -DDEBUG -c -I../Inc -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -fno-exceptions -fno-rtti -fno-threadsafe-statics -fno-use-cxa-atexit -Wall -fstack-usage -MMD -MP -MF"Src/time.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" - diff --git a/otto_controller_source/Debug/makefile b/otto_controller_source/Debug/makefile index 25f8813..be3ddb4 100644 --- a/otto_controller_source/Debug/makefile +++ b/otto_controller_source/Debug/makefile @@ -8,9 +8,9 @@ RM := rm -rf # All of the sources participating in the build are defined here -include sources.mk --include Startup/subdir.mk --include Src/subdir.mk -include Drivers/STM32F7xx_HAL_Driver/Src/subdir.mk +-include Core/Startup/subdir.mk +-include Core/Src/subdir.mk -include subdir.mk -include objects.mk diff --git a/otto_controller_source/Debug/objects.list b/otto_controller_source/Debug/objects.list index 1dffa7f..a53335a 100644 --- a/otto_controller_source/Debug/objects.list +++ b/otto_controller_source/Debug/objects.list @@ -1,3 +1,14 @@ +"Core/Src/duration.o" +"Core/Src/encoder.o" +"Core/Src/main.o" +"Core/Src/odometry_calc.o" +"Core/Src/stm32f7xx_hal_msp.o" +"Core/Src/stm32f7xx_it.o" +"Core/Src/syscalls.o" +"Core/Src/sysmem.o" +"Core/Src/system_stm32f7xx.o" +"Core/Src/time.o" +"Core/Startup/startup_stm32f767zitx.o" "Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o" "Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o" "Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o" @@ -16,14 +27,3 @@ "Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o" "Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o" "Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o" -"Src/duration.o" -"Src/encoder.o" -"Src/main.o" -"Src/odometry_calc.o" -"Src/stm32f7xx_hal_msp.o" -"Src/stm32f7xx_it.o" -"Src/syscalls.o" -"Src/sysmem.o" -"Src/system_stm32f7xx.o" -"Src/time.o" -"Startup/startup_stm32f767zitx.o" diff --git a/otto_controller_source/Debug/otto_controller_source.list b/otto_controller_source/Debug/otto_controller_source.list index 50b86b1..83911d8 100644 --- a/otto_controller_source/Debug/otto_controller_source.list +++ b/otto_controller_source/Debug/otto_controller_source.list @@ -5,45 +5,45 @@ Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 000001f8 08000000 08000000 00010000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA - 1 .text 00009ec8 080001f8 080001f8 000101f8 2**3 + 1 .text 00009f30 080001f8 080001f8 000101f8 2**3 CONTENTS, ALLOC, LOAD, READONLY, CODE - 2 .rodata 00000ac8 0800a0c0 0800a0c0 0001a0c0 2**3 + 2 .rodata 00000ac8 0800a128 0800a128 0001a128 2**3 CONTENTS, ALLOC, LOAD, READONLY, DATA - 3 .ARM.extab 00000000 0800ab88 0800ab88 00020084 2**0 + 3 .ARM.extab 00000000 0800abf0 0800abf0 00020084 2**0 CONTENTS - 4 .ARM 00000008 0800ab88 0800ab88 0001ab88 2**2 + 4 .ARM 00000008 0800abf0 0800abf0 0001abf0 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 5 .preinit_array 00000000 0800ab90 0800ab90 00020084 2**0 + 5 .preinit_array 00000000 0800abf8 0800abf8 00020084 2**0 CONTENTS, ALLOC, LOAD, DATA - 6 .init_array 00000008 0800ab90 0800ab90 0001ab90 2**2 + 6 .init_array 00000008 0800abf8 0800abf8 0001abf8 2**2 CONTENTS, ALLOC, LOAD, DATA - 7 .fini_array 00000004 0800ab98 0800ab98 0001ab98 2**2 + 7 .fini_array 00000004 0800ac00 0800ac00 0001ac00 2**2 CONTENTS, ALLOC, LOAD, DATA - 8 .data 00000084 20000000 0800ab9c 00020000 2**2 + 8 .data 00000084 20000000 0800ac04 00020000 2**2 CONTENTS, ALLOC, LOAD, DATA - 9 .bss 00000e38 20000084 0800ac20 00020084 2**2 + 9 .bss 00000e40 20000084 0800ac88 00020084 2**2 ALLOC - 10 ._user_heap_stack 00000604 20000ebc 0800ac20 00020ebc 2**0 + 10 ._user_heap_stack 00000604 20000ec4 0800ac88 00020ec4 2**0 ALLOC 11 .ARM.attributes 0000002e 00000000 00000000 00020084 2**0 CONTENTS, READONLY - 12 .debug_info 00019598 00000000 00000000 000200b2 2**0 + 12 .debug_info 00019581 00000000 00000000 000200b2 2**0 CONTENTS, READONLY, DEBUGGING - 13 .debug_abbrev 000030a1 00000000 00000000 0003964a 2**0 + 13 .debug_abbrev 00003056 00000000 00000000 00039633 2**0 CONTENTS, READONLY, DEBUGGING - 14 .debug_aranges 00001230 00000000 00000000 0003c6f0 2**3 + 14 .debug_aranges 00001228 00000000 00000000 0003c690 2**3 CONTENTS, READONLY, DEBUGGING - 15 .debug_ranges 00001120 00000000 00000000 0003d920 2**3 + 15 .debug_ranges 00001118 00000000 00000000 0003d8b8 2**3 CONTENTS, READONLY, DEBUGGING - 16 .debug_macro 00029a16 00000000 00000000 0003ea40 2**0 + 16 .debug_macro 0002981b 00000000 00000000 0003e9d0 2**0 CONTENTS, READONLY, DEBUGGING - 17 .debug_line 0000cf1f 00000000 00000000 00068456 2**0 + 17 .debug_line 0000d02f 00000000 00000000 000681eb 2**0 CONTENTS, READONLY, DEBUGGING - 18 .debug_str 000fc058 00000000 00000000 00075375 2**0 + 18 .debug_str 000fc083 00000000 00000000 0007521a 2**0 CONTENTS, READONLY, DEBUGGING - 19 .comment 0000007b 00000000 00000000 001713cd 2**0 + 19 .comment 0000007b 00000000 00000000 0017129d 2**0 CONTENTS, READONLY - 20 .debug_frame 00005508 00000000 00000000 00171448 2**2 + 20 .debug_frame 000054d8 00000000 00000000 00171318 2**2 CONTENTS, READONLY, DEBUGGING Disassembly of section .text: @@ -62,7 +62,7 @@ Disassembly of section .text: 800020e: bd10 pop {r4, pc} 8000210: 20000084 .word 0x20000084 8000214: 00000000 .word 0x00000000 - 8000218: 0800a0a8 .word 0x0800a0a8 + 8000218: 0800a110 .word 0x0800a110 0800021c : 800021c: b508 push {r3, lr} @@ -74,7 +74,7 @@ Disassembly of section .text: 800022a: bd08 pop {r3, pc} 800022c: 00000000 .word 0x00000000 8000230: 20000088 .word 0x20000088 - 8000234: 0800a0a8 .word 0x0800a0a8 + 8000234: 0800a110 .word 0x0800a110 08000238 : 8000238: 4603 mov r3, r0 @@ -362,23563 +362,23612 @@ Disassembly of section .text: 8000544: 4770 bx lr 8000546: bf00 nop -08000548 : - * need to ensure that the SysTick time base is always set to 1 millisecond - * to have correct HAL operation. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_Init(void) -{ - 8000548: b580 push {r7, lr} - 800054a: af00 add r7, sp, #0 -#if (PREFETCH_ENABLE != 0U) - __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); -#endif /* PREFETCH_ENABLE */ +08000548 <_ZN7Encoder8GetCountEv>: - /* Set Interrupt Group Priority */ - HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); - 800054c: 2003 movs r0, #3 - 800054e: f000 f929 bl 80007a4 + Encoder(TIM_HandleTypeDef* timer); - /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */ - HAL_InitTick(TICK_INT_PRIORITY); - 8000552: 2000 movs r0, #0 - 8000554: f000 f806 bl 8000564 - - /* Init the low level hardware */ - HAL_MspInit(); - 8000558: f007 fca2 bl 8007ea0 - - /* Return function status */ - return HAL_OK; - 800055c: 2300 movs r3, #0 -} - 800055e: 4618 mov r0, r3 - 8000560: bd80 pop {r7, pc} - ... + void Setup(); -08000564 : - * implementation in user file. - * @param TickPriority Tick interrupt priority. - * @retval HAL status - */ -__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) -{ - 8000564: b580 push {r7, lr} - 8000566: b082 sub sp, #8 - 8000568: af00 add r7, sp, #0 - 800056a: 6078 str r0, [r7, #4] - /* Configure the SysTick to have interrupt in 1ms time basis*/ - if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) - 800056c: 4b12 ldr r3, [pc, #72] ; (80005b8 ) - 800056e: 681a ldr r2, [r3, #0] - 8000570: 4b12 ldr r3, [pc, #72] ; (80005bc ) - 8000572: 781b ldrb r3, [r3, #0] - 8000574: 4619 mov r1, r3 - 8000576: f44f 737a mov.w r3, #1000 ; 0x3e8 - 800057a: fbb3 f3f1 udiv r3, r3, r1 - 800057e: fbb2 f3f3 udiv r3, r2, r3 - 8000582: 4618 mov r0, r3 - 8000584: f000 f943 bl 800080e - 8000588: 4603 mov r3, r0 - 800058a: 2b00 cmp r3, #0 - 800058c: d001 beq.n 8000592 - { - return HAL_ERROR; - 800058e: 2301 movs r3, #1 - 8000590: e00e b.n 80005b0 + int GetCount() { + 8000548: b480 push {r7} + 800054a: b085 sub sp, #20 + 800054c: af00 add r7, sp, #0 + 800054e: 6078 str r0, [r7, #4] + int count = ((int)__HAL_TIM_GET_COUNTER(this->timer_) - + 8000550: 687b ldr r3, [r7, #4] + 8000552: 681b ldr r3, [r3, #0] + 8000554: 681b ldr r3, [r3, #0] + 8000556: 6a5a ldr r2, [r3, #36] ; 0x24 + ((this->timer_->Init.Period)/2)); + 8000558: 687b ldr r3, [r7, #4] + 800055a: 681b ldr r3, [r3, #0] + 800055c: 68db ldr r3, [r3, #12] + 800055e: 085b lsrs r3, r3, #1 + int count = ((int)__HAL_TIM_GET_COUNTER(this->timer_) - + 8000560: 1ad3 subs r3, r2, r3 + ((this->timer_->Init.Period)/2)); + 8000562: 60fb str r3, [r7, #12] + return count; + 8000564: 68fb ldr r3, [r7, #12] } + 8000566: 4618 mov r0, r3 + 8000568: 3714 adds r7, #20 + 800056a: 46bd mov sp, r7 + 800056c: f85d 7b04 ldr.w r7, [sp], #4 + 8000570: 4770 bx lr - /* Configure the SysTick IRQ priority */ - if (TickPriority < (1UL << __NVIC_PRIO_BITS)) - 8000592: 687b ldr r3, [r7, #4] - 8000594: 2b0f cmp r3, #15 - 8000596: d80a bhi.n 80005ae - { - HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); - 8000598: 2200 movs r2, #0 - 800059a: 6879 ldr r1, [r7, #4] - 800059c: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff - 80005a0: f000 f90b bl 80007ba - uwTickPrio = TickPriority; - 80005a4: 4a06 ldr r2, [pc, #24] ; (80005c0 ) - 80005a6: 687b ldr r3, [r7, #4] - 80005a8: 6013 str r3, [r2, #0] - { - return HAL_ERROR; +08000572 <_ZN7Encoder10ResetCountEv>: + + void ResetCount() { + 8000572: b480 push {r7} + 8000574: b083 sub sp, #12 + 8000576: af00 add r7, sp, #0 + 8000578: 6078 str r0, [r7, #4] + //set counter to half its maximum value + __HAL_TIM_SET_COUNTER(timer_, (timer_->Init.Period)/2); + 800057a: 687b ldr r3, [r7, #4] + 800057c: 681b ldr r3, [r3, #0] + 800057e: 68da ldr r2, [r3, #12] + 8000580: 687b ldr r3, [r7, #4] + 8000582: 681b ldr r3, [r3, #0] + 8000584: 681b ldr r3, [r3, #0] + 8000586: 0852 lsrs r2, r2, #1 + 8000588: 625a str r2, [r3, #36] ; 0x24 } + 800058a: bf00 nop + 800058c: 370c adds r7, #12 + 800058e: 46bd mov sp, r7 + 8000590: f85d 7b04 ldr.w r7, [sp], #4 + 8000594: 4770 bx lr + ... - /* Return function status */ - return HAL_OK; - 80005aa: 2300 movs r3, #0 - 80005ac: e000 b.n 80005b0 - return HAL_ERROR; - 80005ae: 2301 movs r3, #1 -} - 80005b0: 4618 mov r0, r3 - 80005b2: 3708 adds r7, #8 - 80005b4: 46bd mov sp, r7 - 80005b6: bd80 pop {r7, pc} - 80005b8: 20000018 .word 0x20000018 - 80005bc: 20000004 .word 0x20000004 - 80005c0: 20000000 .word 0x20000000 - -080005c4 : - * @note This function is declared as __weak to be overwritten in case of other - * implementations in user file. - * @retval None - */ -__weak void HAL_IncTick(void) -{ - 80005c4: b480 push {r7} - 80005c6: af00 add r7, sp, #0 - uwTick += uwTickFreq; - 80005c8: 4b06 ldr r3, [pc, #24] ; (80005e4 ) - 80005ca: 781b ldrb r3, [r3, #0] - 80005cc: 461a mov r2, r3 - 80005ce: 4b06 ldr r3, [pc, #24] ; (80005e8 ) - 80005d0: 681b ldr r3, [r3, #0] - 80005d2: 4413 add r3, r2 - 80005d4: 4a04 ldr r2, [pc, #16] ; (80005e8 ) - 80005d6: 6013 str r3, [r2, #0] +08000598 <_ZN7EncoderC1EP17TIM_HandleTypeDef>: +#include "encoder.h" + +Encoder::Encoder(TIM_HandleTypeDef* timer) { + 8000598: b480 push {r7} + 800059a: b083 sub sp, #12 + 800059c: af00 add r7, sp, #0 + 800059e: 6078 str r0, [r7, #4] + 80005a0: 6039 str r1, [r7, #0] + 80005a2: 687b ldr r3, [r7, #4] + 80005a4: 4a08 ldr r2, [pc, #32] ; (80005c8 <_ZN7EncoderC1EP17TIM_HandleTypeDef+0x30>) + 80005a6: 611a str r2, [r3, #16] + 80005a8: 687b ldr r3, [r7, #4] + 80005aa: 4a08 ldr r2, [pc, #32] ; (80005cc <_ZN7EncoderC1EP17TIM_HandleTypeDef+0x34>) + 80005ac: 615a str r2, [r3, #20] + 80005ae: 687b ldr r3, [r7, #4] + 80005b0: 4a07 ldr r2, [pc, #28] ; (80005d0 <_ZN7EncoderC1EP17TIM_HandleTypeDef+0x38>) + 80005b2: 619a str r2, [r3, #24] + timer_ = timer; + 80005b4: 687b ldr r3, [r7, #4] + 80005b6: 683a ldr r2, [r7, #0] + 80005b8: 601a str r2, [r3, #0] } - 80005d8: bf00 nop - 80005da: 46bd mov sp, r7 - 80005dc: f85d 7b04 ldr.w r7, [sp], #4 - 80005e0: 4770 bx lr - 80005e2: bf00 nop - 80005e4: 20000004 .word 0x20000004 - 80005e8: 20000eb4 .word 0x20000eb4 - -080005ec : - * @note This function is declared as __weak to be overwritten in case of other - * implementations in user file. - * @retval tick value - */ -__weak uint32_t HAL_GetTick(void) -{ - 80005ec: b480 push {r7} - 80005ee: af00 add r7, sp, #0 - return uwTick; - 80005f0: 4b03 ldr r3, [pc, #12] ; (8000600 ) - 80005f2: 681b ldr r3, [r3, #0] + 80005ba: 687b ldr r3, [r7, #4] + 80005bc: 4618 mov r0, r3 + 80005be: 370c adds r7, #12 + 80005c0: 46bd mov sp, r7 + 80005c2: f85d 7b04 ldr.w r7, [sp], #4 + 80005c6: 4770 bx lr + 80005c8: 00012110 .word 0x00012110 + 80005cc: 40490fd0 .word 0x40490fd0 + 80005d0: 3f40ff97 .word 0x3f40ff97 + +080005d4 <_ZN7Encoder5SetupEv>: + +void Encoder::Setup() { + 80005d4: b580 push {r7, lr} + 80005d6: b082 sub sp, #8 + 80005d8: af00 add r7, sp, #0 + 80005da: 6078 str r0, [r7, #4] + HAL_TIM_Encoder_Start(timer_, TIM_CHANNEL_ALL); + 80005dc: 687b ldr r3, [r7, #4] + 80005de: 681b ldr r3, [r3, #0] + 80005e0: 213c movs r1, #60 ; 0x3c + 80005e2: 4618 mov r0, r3 + 80005e4: f006 f96e bl 80068c4 + this->ResetCount(); + 80005e8: 6878 ldr r0, [r7, #4] + 80005ea: f7ff ffc2 bl 8000572 <_ZN7Encoder10ResetCountEv> + this->previous_millis_ = 0; + 80005ee: 687b ldr r3, [r7, #4] + 80005f0: 2200 movs r2, #0 + 80005f2: 605a str r2, [r3, #4] + this->current_millis_ = HAL_GetTick(); + 80005f4: f004 f994 bl 8004920 + 80005f8: 4602 mov r2, r0 + 80005fa: 687b ldr r3, [r7, #4] + 80005fc: 609a str r2, [r3, #8] } - 80005f4: 4618 mov r0, r3 - 80005f6: 46bd mov sp, r7 - 80005f8: f85d 7b04 ldr.w r7, [sp], #4 - 80005fc: 4770 bx lr 80005fe: bf00 nop - 8000600: 20000eb4 .word 0x20000eb4 + 8000600: 3708 adds r7, #8 + 8000602: 46bd mov sp, r7 + 8000604: bd80 pop {r7, pc} -08000604 <__NVIC_SetPriorityGrouping>: - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Priority grouping field. - */ -__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) -{ - 8000604: b480 push {r7} - 8000606: b085 sub sp, #20 - 8000608: af00 add r7, sp, #0 - 800060a: 6078 str r0, [r7, #4] - uint32_t reg_value; - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - 800060c: 687b ldr r3, [r7, #4] - 800060e: f003 0307 and.w r3, r3, #7 - 8000612: 60fb str r3, [r7, #12] +08000606 <_ZN7Encoder12UpdateValuesEv>: - reg_value = SCB->AIRCR; /* read old register configuration */ - 8000614: 4b0b ldr r3, [pc, #44] ; (8000644 <__NVIC_SetPriorityGrouping+0x40>) - 8000616: 68db ldr r3, [r3, #12] - 8000618: 60bb str r3, [r7, #8] - reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ - 800061a: 68ba ldr r2, [r7, #8] - 800061c: f64f 03ff movw r3, #63743 ; 0xf8ff - 8000620: 4013 ands r3, r2 - 8000622: 60bb str r3, [r7, #8] - reg_value = (reg_value | - ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ - 8000624: 68fb ldr r3, [r7, #12] - 8000626: 021a lsls r2, r3, #8 - ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - 8000628: 68bb ldr r3, [r7, #8] - 800062a: 431a orrs r2, r3 - reg_value = (reg_value | - 800062c: 4b06 ldr r3, [pc, #24] ; (8000648 <__NVIC_SetPriorityGrouping+0x44>) - 800062e: 4313 orrs r3, r2 - 8000630: 60bb str r3, [r7, #8] - SCB->AIRCR = reg_value; - 8000632: 4a04 ldr r2, [pc, #16] ; (8000644 <__NVIC_SetPriorityGrouping+0x40>) - 8000634: 68bb ldr r3, [r7, #8] - 8000636: 60d3 str r3, [r2, #12] +void Encoder::UpdateValues() { + 8000606: b580 push {r7, lr} + 8000608: b082 sub sp, #8 + 800060a: af00 add r7, sp, #0 + 800060c: 6078 str r0, [r7, #4] + this->previous_millis_ = this->current_millis_; + 800060e: 687b ldr r3, [r7, #4] + 8000610: 689a ldr r2, [r3, #8] + 8000612: 687b ldr r3, [r7, #4] + 8000614: 605a str r2, [r3, #4] + this->current_millis_ = HAL_GetTick(); + 8000616: f004 f983 bl 8004920 + 800061a: 4602 mov r2, r0 + 800061c: 687b ldr r3, [r7, #4] + 800061e: 609a str r2, [r3, #8] + this->ticks_ = this->GetCount(); + 8000620: 6878 ldr r0, [r7, #4] + 8000622: f7ff ff91 bl 8000548 <_ZN7Encoder8GetCountEv> + 8000626: 4602 mov r2, r0 + 8000628: 687b ldr r3, [r7, #4] + 800062a: 60da str r2, [r3, #12] + this->ResetCount(); + 800062c: 6878 ldr r0, [r7, #4] + 800062e: f7ff ffa0 bl 8000572 <_ZN7Encoder10ResetCountEv> } - 8000638: bf00 nop - 800063a: 3714 adds r7, #20 - 800063c: 46bd mov sp, r7 - 800063e: f85d 7b04 ldr.w r7, [sp], #4 - 8000642: 4770 bx lr - 8000644: e000ed00 .word 0xe000ed00 - 8000648: 05fa0000 .word 0x05fa0000 - -0800064c <__NVIC_GetPriorityGrouping>: - \brief Get Priority Grouping - \details Reads the priority grouping field from the NVIC Interrupt Controller. - \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). - */ -__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) -{ - 800064c: b480 push {r7} - 800064e: af00 add r7, sp, #0 - return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); - 8000650: 4b04 ldr r3, [pc, #16] ; (8000664 <__NVIC_GetPriorityGrouping+0x18>) - 8000652: 68db ldr r3, [r3, #12] - 8000654: 0a1b lsrs r3, r3, #8 - 8000656: f003 0307 and.w r3, r3, #7 + 8000632: bf00 nop + 8000634: 3708 adds r7, #8 + 8000636: 46bd mov sp, r7 + 8000638: bd80 pop {r7, pc} + ... + +0800063c <_ZN7Encoder17GetLinearVelocityEv>: + float meters = ((float) this->ticks_ * kWheelCircumference) + / kTicksPerRevolution; + return meters; } - 800065a: 4618 mov r0, r3 - 800065c: 46bd mov sp, r7 - 800065e: f85d 7b04 ldr.w r7, [sp], #4 - 8000662: 4770 bx lr - 8000664: e000ed00 .word 0xe000ed00 -08000668 <__NVIC_EnableIRQ>: - \details Enables a device specific interrupt in the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) -{ - 8000668: b480 push {r7} - 800066a: b083 sub sp, #12 - 800066c: af00 add r7, sp, #0 - 800066e: 4603 mov r3, r0 - 8000670: 71fb strb r3, [r7, #7] - if ((int32_t)(IRQn) >= 0) - 8000672: f997 3007 ldrsb.w r3, [r7, #7] - 8000676: 2b00 cmp r3, #0 - 8000678: db0b blt.n 8000692 <__NVIC_EnableIRQ+0x2a> - { - NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - 800067a: 79fb ldrb r3, [r7, #7] - 800067c: f003 021f and.w r2, r3, #31 - 8000680: 4907 ldr r1, [pc, #28] ; (80006a0 <__NVIC_EnableIRQ+0x38>) - 8000682: f997 3007 ldrsb.w r3, [r7, #7] - 8000686: 095b lsrs r3, r3, #5 - 8000688: 2001 movs r0, #1 - 800068a: fa00 f202 lsl.w r2, r0, r2 - 800068e: f841 2023 str.w r2, [r1, r3, lsl #2] - } +float Encoder::GetLinearVelocity() { + 800063c: b580 push {r7, lr} + 800063e: b086 sub sp, #24 + 8000640: af00 add r7, sp, #0 + 8000642: 6078 str r0, [r7, #4] + this->UpdateValues(); + 8000644: 6878 ldr r0, [r7, #4] + 8000646: f7ff ffde bl 8000606 <_ZN7Encoder12UpdateValuesEv> + float meters = ((float) this->ticks_ * kWheelCircumference) + 800064a: 687b ldr r3, [r7, #4] + 800064c: 68db ldr r3, [r3, #12] + 800064e: ee07 3a90 vmov s15, r3 + 8000652: eeb8 7ae7 vcvt.f32.s32 s14, s15 + 8000656: 687b ldr r3, [r7, #4] + 8000658: edd3 7a06 vldr s15, [r3, #24] + 800065c: ee67 6a27 vmul.f32 s13, s14, s15 + / kTicksPerRevolution; + 8000660: 687b ldr r3, [r7, #4] + 8000662: 691b ldr r3, [r3, #16] + 8000664: ee07 3a90 vmov s15, r3 + 8000668: eeb8 7a67 vcvt.f32.u32 s14, s15 + float meters = ((float) this->ticks_ * kWheelCircumference) + 800066c: eec6 7a87 vdiv.f32 s15, s13, s14 + 8000670: edc7 7a05 vstr s15, [r7, #20] + float deltaTime = this->current_millis_ - this->previous_millis_; + 8000674: 687b ldr r3, [r7, #4] + 8000676: 689a ldr r2, [r3, #8] + 8000678: 687b ldr r3, [r7, #4] + 800067a: 685b ldr r3, [r3, #4] + 800067c: 1ad3 subs r3, r2, r3 + 800067e: ee07 3a90 vmov s15, r3 + 8000682: eef8 7a67 vcvt.f32.u32 s15, s15 + 8000686: edc7 7a04 vstr s15, [r7, #16] + float linear_velocity = (meters / (deltaTime / 1000)); + 800068a: edd7 7a04 vldr s15, [r7, #16] + 800068e: eddf 6a09 vldr s13, [pc, #36] ; 80006b4 <_ZN7Encoder17GetLinearVelocityEv+0x78> + 8000692: ee87 7aa6 vdiv.f32 s14, s15, s13 + 8000696: edd7 6a05 vldr s13, [r7, #20] + 800069a: eec6 7a87 vdiv.f32 s15, s13, s14 + 800069e: edc7 7a03 vstr s15, [r7, #12] + return linear_velocity; + 80006a2: 68fb ldr r3, [r7, #12] + 80006a4: ee07 3a90 vmov s15, r3 } - 8000692: bf00 nop - 8000694: 370c adds r7, #12 - 8000696: 46bd mov sp, r7 - 8000698: f85d 7b04 ldr.w r7, [sp], #4 - 800069c: 4770 bx lr - 800069e: bf00 nop - 80006a0: e000e100 .word 0xe000e100 - -080006a4 <__NVIC_SetPriority>: - \param [in] IRQn Interrupt number. - \param [in] priority Priority to set. - \note The priority cannot be set for every processor exception. - */ -__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) -{ - 80006a4: b480 push {r7} - 80006a6: b083 sub sp, #12 - 80006a8: af00 add r7, sp, #0 - 80006aa: 4603 mov r3, r0 - 80006ac: 6039 str r1, [r7, #0] - 80006ae: 71fb strb r3, [r7, #7] - if ((int32_t)(IRQn) >= 0) - 80006b0: f997 3007 ldrsb.w r3, [r7, #7] - 80006b4: 2b00 cmp r3, #0 - 80006b6: db0a blt.n 80006ce <__NVIC_SetPriority+0x2a> - { - NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - 80006b8: 683b ldr r3, [r7, #0] - 80006ba: b2da uxtb r2, r3 - 80006bc: 490c ldr r1, [pc, #48] ; (80006f0 <__NVIC_SetPriority+0x4c>) - 80006be: f997 3007 ldrsb.w r3, [r7, #7] - 80006c2: 0112 lsls r2, r2, #4 - 80006c4: b2d2 uxtb r2, r2 - 80006c6: 440b add r3, r1 - 80006c8: f883 2300 strb.w r2, [r3, #768] ; 0x300 - } - else + 80006a8: eeb0 0a67 vmov.f32 s0, s15 + 80006ac: 3718 adds r7, #24 + 80006ae: 46bd mov sp, r7 + 80006b0: bd80 pop {r7, pc} + 80006b2: bf00 nop + 80006b4: 447a0000 .word 0x447a0000 + +080006b8 <_ZN3ros3Msg19serializeAvrFloat64EPhf>: + * @param[in] f value to serialize. + * + * @return number of bytes to advance the buffer pointer. + * + */ + static int serializeAvrFloat64(unsigned char* outbuffer, const float f) + 80006b8: b480 push {r7} + 80006ba: b087 sub sp, #28 + 80006bc: af00 add r7, sp, #0 + 80006be: 6078 str r0, [r7, #4] + 80006c0: ed87 0a00 vstr s0, [r7] { - SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } -} - 80006cc: e00a b.n 80006e4 <__NVIC_SetPriority+0x40> - SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - 80006ce: 683b ldr r3, [r7, #0] - 80006d0: b2da uxtb r2, r3 - 80006d2: 4908 ldr r1, [pc, #32] ; (80006f4 <__NVIC_SetPriority+0x50>) - 80006d4: 79fb ldrb r3, [r7, #7] - 80006d6: f003 030f and.w r3, r3, #15 - 80006da: 3b04 subs r3, #4 - 80006dc: 0112 lsls r2, r2, #4 - 80006de: b2d2 uxtb r2, r2 - 80006e0: 440b add r3, r1 - 80006e2: 761a strb r2, [r3, #24] -} - 80006e4: bf00 nop - 80006e6: 370c adds r7, #12 - 80006e8: 46bd mov sp, r7 - 80006ea: f85d 7b04 ldr.w r7, [sp], #4 - 80006ee: 4770 bx lr - 80006f0: e000e100 .word 0xe000e100 - 80006f4: e000ed00 .word 0xe000ed00 - -080006f8 : - \param [in] PreemptPriority Preemptive priority value (starting from 0). - \param [in] SubPriority Subpriority value (starting from 0). - \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). - */ -__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) -{ - 80006f8: b480 push {r7} - 80006fa: b089 sub sp, #36 ; 0x24 - 80006fc: af00 add r7, sp, #0 - 80006fe: 60f8 str r0, [r7, #12] - 8000700: 60b9 str r1, [r7, #8] - 8000702: 607a str r2, [r7, #4] - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + const int32_t* val = (int32_t*) &f; + 80006c4: 463b mov r3, r7 + 80006c6: 613b str r3, [r7, #16] + int32_t exp = ((*val >> 23) & 255); + 80006c8: 693b ldr r3, [r7, #16] + 80006ca: 681b ldr r3, [r3, #0] + 80006cc: 15db asrs r3, r3, #23 + 80006ce: b2db uxtb r3, r3 + 80006d0: 617b str r3, [r7, #20] + if (exp != 0) + 80006d2: 697b ldr r3, [r7, #20] + 80006d4: 2b00 cmp r3, #0 + 80006d6: d003 beq.n 80006e0 <_ZN3ros3Msg19serializeAvrFloat64EPhf+0x28> + { + exp += 1023 - 127; + 80006d8: 697b ldr r3, [r7, #20] + 80006da: f503 7360 add.w r3, r3, #896 ; 0x380 + 80006de: 617b str r3, [r7, #20] + } + + int32_t sig = *val; + 80006e0: 693b ldr r3, [r7, #16] + 80006e2: 681b ldr r3, [r3, #0] + 80006e4: 60fb str r3, [r7, #12] + *(outbuffer++) = 0; + 80006e6: 687b ldr r3, [r7, #4] + 80006e8: 1c5a adds r2, r3, #1 + 80006ea: 607a str r2, [r7, #4] + 80006ec: 2200 movs r2, #0 + 80006ee: 701a strb r2, [r3, #0] + *(outbuffer++) = 0; + 80006f0: 687b ldr r3, [r7, #4] + 80006f2: 1c5a adds r2, r3, #1 + 80006f4: 607a str r2, [r7, #4] + 80006f6: 2200 movs r2, #0 + 80006f8: 701a strb r2, [r3, #0] + *(outbuffer++) = 0; + 80006fa: 687b ldr r3, [r7, #4] + 80006fc: 1c5a adds r2, r3, #1 + 80006fe: 607a str r2, [r7, #4] + 8000700: 2200 movs r2, #0 + 8000702: 701a strb r2, [r3, #0] + *(outbuffer++) = (sig << 5) & 0xff; 8000704: 68fb ldr r3, [r7, #12] - 8000706: f003 0307 and.w r3, r3, #7 - 800070a: 61fb str r3, [r7, #28] - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; + 8000706: 0159 lsls r1, r3, #5 + 8000708: 687b ldr r3, [r7, #4] + 800070a: 1c5a adds r2, r3, #1 + 800070c: 607a str r2, [r7, #4] + 800070e: b2ca uxtb r2, r1 + 8000710: 701a strb r2, [r3, #0] + *(outbuffer++) = (sig >> 3) & 0xff; + 8000712: 68fb ldr r3, [r7, #12] + 8000714: 10d9 asrs r1, r3, #3 + 8000716: 687b ldr r3, [r7, #4] + 8000718: 1c5a adds r2, r3, #1 + 800071a: 607a str r2, [r7, #4] + 800071c: b2ca uxtb r2, r1 + 800071e: 701a strb r2, [r3, #0] + *(outbuffer++) = (sig >> 11) & 0xff; + 8000720: 68fb ldr r3, [r7, #12] + 8000722: 12d9 asrs r1, r3, #11 + 8000724: 687b ldr r3, [r7, #4] + 8000726: 1c5a adds r2, r3, #1 + 8000728: 607a str r2, [r7, #4] + 800072a: b2ca uxtb r2, r1 + 800072c: 701a strb r2, [r3, #0] + *(outbuffer++) = ((exp << 4) & 0xF0) | ((sig >> 19) & 0x0F); + 800072e: 697b ldr r3, [r7, #20] + 8000730: 011b lsls r3, r3, #4 + 8000732: b25a sxtb r2, r3 + 8000734: 68fb ldr r3, [r7, #12] + 8000736: 14db asrs r3, r3, #19 + 8000738: b25b sxtb r3, r3 + 800073a: f003 030f and.w r3, r3, #15 + 800073e: b25b sxtb r3, r3 + 8000740: 4313 orrs r3, r2 + 8000742: b259 sxtb r1, r3 + 8000744: 687b ldr r3, [r7, #4] + 8000746: 1c5a adds r2, r3, #1 + 8000748: 607a str r2, [r7, #4] + 800074a: b2ca uxtb r2, r1 + 800074c: 701a strb r2, [r3, #0] + *(outbuffer++) = (exp >> 4) & 0x7F; + 800074e: 697b ldr r3, [r7, #20] + 8000750: 111b asrs r3, r3, #4 + 8000752: b2da uxtb r2, r3 + 8000754: 687b ldr r3, [r7, #4] + 8000756: 1c59 adds r1, r3, #1 + 8000758: 6079 str r1, [r7, #4] + 800075a: f002 027f and.w r2, r2, #127 ; 0x7f + 800075e: b2d2 uxtb r2, r2 + 8000760: 701a strb r2, [r3, #0] - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - 800070c: 69fb ldr r3, [r7, #28] - 800070e: f1c3 0307 rsb r3, r3, #7 - 8000712: 2b04 cmp r3, #4 - 8000714: bf28 it cs - 8000716: 2304 movcs r3, #4 - 8000718: 61bb str r3, [r7, #24] - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - 800071a: 69fb ldr r3, [r7, #28] - 800071c: 3304 adds r3, #4 - 800071e: 2b06 cmp r3, #6 - 8000720: d902 bls.n 8000728 - 8000722: 69fb ldr r3, [r7, #28] - 8000724: 3b03 subs r3, #3 - 8000726: e000 b.n 800072a - 8000728: 2300 movs r3, #0 - 800072a: 617b str r3, [r7, #20] + // Mark negative bit as necessary. + if (f < 0) + 8000762: edd7 7a00 vldr s15, [r7] + 8000766: eef5 7ac0 vcmpe.f32 s15, #0.0 + 800076a: eef1 fa10 vmrs APSR_nzcv, fpscr + 800076e: d508 bpl.n 8000782 <_ZN3ros3Msg19serializeAvrFloat64EPhf+0xca> + { + *(outbuffer - 1) |= 0x80; + 8000770: 687b ldr r3, [r7, #4] + 8000772: 3b01 subs r3, #1 + 8000774: 781a ldrb r2, [r3, #0] + 8000776: 687b ldr r3, [r7, #4] + 8000778: 3b01 subs r3, #1 + 800077a: f062 027f orn r2, r2, #127 ; 0x7f + 800077e: b2d2 uxtb r2, r2 + 8000780: 701a strb r2, [r3, #0] + } - return ( - ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - 800072c: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff - 8000730: 69bb ldr r3, [r7, #24] - 8000732: fa02 f303 lsl.w r3, r2, r3 - 8000736: 43da mvns r2, r3 - 8000738: 68bb ldr r3, [r7, #8] - 800073a: 401a ands r2, r3 - 800073c: 697b ldr r3, [r7, #20] - 800073e: 409a lsls r2, r3 - ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) - 8000740: f04f 31ff mov.w r1, #4294967295 ; 0xffffffff - 8000744: 697b ldr r3, [r7, #20] - 8000746: fa01 f303 lsl.w r3, r1, r3 - 800074a: 43d9 mvns r1, r3 - 800074c: 687b ldr r3, [r7, #4] - 800074e: 400b ands r3, r1 - ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - 8000750: 4313 orrs r3, r2 - ); -} - 8000752: 4618 mov r0, r3 - 8000754: 3724 adds r7, #36 ; 0x24 - 8000756: 46bd mov sp, r7 - 8000758: f85d 7b04 ldr.w r7, [sp], #4 - 800075c: 4770 bx lr - ... + return 8; + 8000782: 2308 movs r3, #8 + } + 8000784: 4618 mov r0, r3 + 8000786: 371c adds r7, #28 + 8000788: 46bd mov sp, r7 + 800078a: f85d 7b04 ldr.w r7, [sp], #4 + 800078e: 4770 bx lr -08000760 : - \note When the variable __Vendor_SysTickConfig is set to 1, then the - function SysTick_Config is not included. In this case, the file device.h - must contain a vendor-specific implementation of this function. - */ -__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) -{ - 8000760: b580 push {r7, lr} - 8000762: b082 sub sp, #8 - 8000764: af00 add r7, sp, #0 - 8000766: 6078 str r0, [r7, #4] - if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - 8000768: 687b ldr r3, [r7, #4] - 800076a: 3b01 subs r3, #1 - 800076c: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000 - 8000770: d301 bcc.n 8000776 +08000790 <_ZN3ros3Msg21deserializeAvrFloat64EPKhPf>: + * @param[in] inbuffer pointer for buffer to deserialize from. + * @param[out] f pointer to place the deserialized value in. + * + * @return number of bytes to advance the buffer pointer. + */ + static int deserializeAvrFloat64(const unsigned char* inbuffer, float* f) + 8000790: b480 push {r7} + 8000792: b085 sub sp, #20 + 8000794: af00 add r7, sp, #0 + 8000796: 6078 str r0, [r7, #4] + 8000798: 6039 str r1, [r7, #0] { - return (1UL); /* Reload value impossible */ - 8000772: 2301 movs r3, #1 - 8000774: e00f b.n 8000796 - } + uint32_t* val = (uint32_t*)f; + 800079a: 683b ldr r3, [r7, #0] + 800079c: 60fb str r3, [r7, #12] + inbuffer += 3; + 800079e: 687b ldr r3, [r7, #4] + 80007a0: 3303 adds r3, #3 + 80007a2: 607b str r3, [r7, #4] - SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - 8000776: 4a0a ldr r2, [pc, #40] ; (80007a0 ) - 8000778: 687b ldr r3, [r7, #4] - 800077a: 3b01 subs r3, #1 - 800077c: 6053 str r3, [r2, #4] - NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - 800077e: 210f movs r1, #15 - 8000780: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff - 8000784: f7ff ff8e bl 80006a4 <__NVIC_SetPriority> - SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - 8000788: 4b05 ldr r3, [pc, #20] ; (80007a0 ) - 800078a: 2200 movs r2, #0 - 800078c: 609a str r2, [r3, #8] - SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - 800078e: 4b04 ldr r3, [pc, #16] ; (80007a0 ) - 8000790: 2207 movs r2, #7 - 8000792: 601a str r2, [r3, #0] - SysTick_CTRL_TICKINT_Msk | - SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ - return (0UL); /* Function successful */ - 8000794: 2300 movs r3, #0 -} - 8000796: 4618 mov r0, r3 - 8000798: 3708 adds r7, #8 - 800079a: 46bd mov sp, r7 - 800079c: bd80 pop {r7, pc} - 800079e: bf00 nop - 80007a0: e000e010 .word 0xe000e010 - -080007a4 : - * @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible. - * The pending IRQ priority will be managed only by the subpriority. - * @retval None - */ -void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup) -{ - 80007a4: b580 push {r7, lr} - 80007a6: b082 sub sp, #8 - 80007a8: af00 add r7, sp, #0 - 80007aa: 6078 str r0, [r7, #4] - /* Check the parameters */ - assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); - - /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */ - NVIC_SetPriorityGrouping(PriorityGroup); - 80007ac: 6878 ldr r0, [r7, #4] - 80007ae: f7ff ff29 bl 8000604 <__NVIC_SetPriorityGrouping> -} - 80007b2: bf00 nop - 80007b4: 3708 adds r7, #8 - 80007b6: 46bd mov sp, r7 - 80007b8: bd80 pop {r7, pc} + // Copy truncated mantissa. + *val = ((uint32_t)(*(inbuffer++)) >> 5 & 0x07); + 80007a4: 687b ldr r3, [r7, #4] + 80007a6: 1c5a adds r2, r3, #1 + 80007a8: 607a str r2, [r7, #4] + 80007aa: 781b ldrb r3, [r3, #0] + 80007ac: 095b lsrs r3, r3, #5 + 80007ae: f003 0207 and.w r2, r3, #7 + 80007b2: 68fb ldr r3, [r7, #12] + 80007b4: 601a str r2, [r3, #0] + *val |= ((uint32_t)(*(inbuffer++)) & 0xff) << 3; + 80007b6: 687b ldr r3, [r7, #4] + 80007b8: 1c5a adds r2, r3, #1 + 80007ba: 607a str r2, [r7, #4] + 80007bc: 781b ldrb r3, [r3, #0] + 80007be: 00da lsls r2, r3, #3 + 80007c0: 68fb ldr r3, [r7, #12] + 80007c2: 681b ldr r3, [r3, #0] + 80007c4: 431a orrs r2, r3 + 80007c6: 68fb ldr r3, [r7, #12] + 80007c8: 601a str r2, [r3, #0] + *val |= ((uint32_t)(*(inbuffer++)) & 0xff) << 11; + 80007ca: 687b ldr r3, [r7, #4] + 80007cc: 1c5a adds r2, r3, #1 + 80007ce: 607a str r2, [r7, #4] + 80007d0: 781b ldrb r3, [r3, #0] + 80007d2: 02da lsls r2, r3, #11 + 80007d4: 68fb ldr r3, [r7, #12] + 80007d6: 681b ldr r3, [r3, #0] + 80007d8: 431a orrs r2, r3 + 80007da: 68fb ldr r3, [r7, #12] + 80007dc: 601a str r2, [r3, #0] + *val |= ((uint32_t)(*inbuffer) & 0x0f) << 19; + 80007de: 68fb ldr r3, [r7, #12] + 80007e0: 681a ldr r2, [r3, #0] + 80007e2: 687b ldr r3, [r7, #4] + 80007e4: 781b ldrb r3, [r3, #0] + 80007e6: 04db lsls r3, r3, #19 + 80007e8: f403 03f0 and.w r3, r3, #7864320 ; 0x780000 + 80007ec: 431a orrs r2, r3 + 80007ee: 68fb ldr r3, [r7, #12] + 80007f0: 601a str r2, [r3, #0] -080007ba : - * This parameter can be a value between 0 and 15 - * A lower priority value indicates a higher priority. - * @retval None - */ -void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) -{ - 80007ba: b580 push {r7, lr} - 80007bc: b086 sub sp, #24 - 80007be: af00 add r7, sp, #0 - 80007c0: 4603 mov r3, r0 - 80007c2: 60b9 str r1, [r7, #8] - 80007c4: 607a str r2, [r7, #4] - 80007c6: 73fb strb r3, [r7, #15] - uint32_t prioritygroup = 0x00; - 80007c8: 2300 movs r3, #0 - 80007ca: 617b str r3, [r7, #20] - - /* Check the parameters */ - assert_param(IS_NVIC_SUB_PRIORITY(SubPriority)); - assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); - - prioritygroup = NVIC_GetPriorityGrouping(); - 80007cc: f7ff ff3e bl 800064c <__NVIC_GetPriorityGrouping> - 80007d0: 6178 str r0, [r7, #20] - - NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority)); - 80007d2: 687a ldr r2, [r7, #4] - 80007d4: 68b9 ldr r1, [r7, #8] - 80007d6: 6978 ldr r0, [r7, #20] - 80007d8: f7ff ff8e bl 80006f8 - 80007dc: 4602 mov r2, r0 - 80007de: f997 300f ldrsb.w r3, [r7, #15] - 80007e2: 4611 mov r1, r2 - 80007e4: 4618 mov r0, r3 - 80007e6: f7ff ff5d bl 80006a4 <__NVIC_SetPriority> -} - 80007ea: bf00 nop - 80007ec: 3718 adds r7, #24 - 80007ee: 46bd mov sp, r7 - 80007f0: bd80 pop {r7, pc} + // Copy truncated exponent. + uint32_t exp = ((uint32_t)(*(inbuffer++)) & 0xf0) >> 4; + 80007f2: 687b ldr r3, [r7, #4] + 80007f4: 1c5a adds r2, r3, #1 + 80007f6: 607a str r2, [r7, #4] + 80007f8: 781b ldrb r3, [r3, #0] + 80007fa: 091b lsrs r3, r3, #4 + 80007fc: f003 030f and.w r3, r3, #15 + 8000800: 60bb str r3, [r7, #8] + exp |= ((uint32_t)(*inbuffer) & 0x7f) << 4; + 8000802: 687b ldr r3, [r7, #4] + 8000804: 781b ldrb r3, [r3, #0] + 8000806: 011b lsls r3, r3, #4 + 8000808: f403 62fe and.w r2, r3, #2032 ; 0x7f0 + 800080c: 68bb ldr r3, [r7, #8] + 800080e: 4313 orrs r3, r2 + 8000810: 60bb str r3, [r7, #8] + if (exp != 0) + 8000812: 68bb ldr r3, [r7, #8] + 8000814: 2b00 cmp r3, #0 + 8000816: d008 beq.n 800082a <_ZN3ros3Msg21deserializeAvrFloat64EPKhPf+0x9a> + { + *val |= ((exp) - 1023 + 127) << 23; + 8000818: 68fb ldr r3, [r7, #12] + 800081a: 681a ldr r2, [r3, #0] + 800081c: 68bb ldr r3, [r7, #8] + 800081e: f5a3 7360 sub.w r3, r3, #896 ; 0x380 + 8000822: 05db lsls r3, r3, #23 + 8000824: 431a orrs r2, r3 + 8000826: 68fb ldr r3, [r7, #12] + 8000828: 601a str r2, [r3, #0] + } -080007f2 : - * This parameter can be an enumerator of IRQn_Type enumeration - * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f7xxxx.h)) - * @retval None - */ -void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) -{ - 80007f2: b580 push {r7, lr} - 80007f4: b082 sub sp, #8 - 80007f6: af00 add r7, sp, #0 - 80007f8: 4603 mov r3, r0 - 80007fa: 71fb strb r3, [r7, #7] - /* Check the parameters */ - assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); - - /* Enable interrupt */ - NVIC_EnableIRQ(IRQn); - 80007fc: f997 3007 ldrsb.w r3, [r7, #7] - 8000800: 4618 mov r0, r3 - 8000802: f7ff ff31 bl 8000668 <__NVIC_EnableIRQ> -} - 8000806: bf00 nop - 8000808: 3708 adds r7, #8 - 800080a: 46bd mov sp, r7 - 800080c: bd80 pop {r7, pc} - -0800080e : - * @param TicksNumb Specifies the ticks Number of ticks between two interrupts. - * @retval status: - 0 Function succeeded. - * - 1 Function failed. - */ -uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) -{ - 800080e: b580 push {r7, lr} - 8000810: b082 sub sp, #8 - 8000812: af00 add r7, sp, #0 - 8000814: 6078 str r0, [r7, #4] - return SysTick_Config(TicksNumb); - 8000816: 6878 ldr r0, [r7, #4] - 8000818: f7ff ffa2 bl 8000760 - 800081c: 4603 mov r3, r0 -} - 800081e: 4618 mov r0, r3 - 8000820: 3708 adds r7, #8 - 8000822: 46bd mov sp, r7 - 8000824: bd80 pop {r7, pc} - ... - -08000828 : - * @param hdma Pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA Stream. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma) -{ - 8000828: b580 push {r7, lr} - 800082a: b086 sub sp, #24 - 800082c: af00 add r7, sp, #0 - 800082e: 6078 str r0, [r7, #4] - uint32_t tmp = 0U; - 8000830: 2300 movs r3, #0 - 8000832: 617b str r3, [r7, #20] - uint32_t tickstart = HAL_GetTick(); - 8000834: f7ff feda bl 80005ec - 8000838: 6138 str r0, [r7, #16] - DMA_Base_Registers *regs; + // Copy negative sign. + *val |= ((uint32_t)(*(inbuffer++)) & 0x80) << 24; + 800082a: 687b ldr r3, [r7, #4] + 800082c: 1c5a adds r2, r3, #1 + 800082e: 607a str r2, [r7, #4] + 8000830: 781b ldrb r3, [r3, #0] + 8000832: 061b lsls r3, r3, #24 + 8000834: f003 4200 and.w r2, r3, #2147483648 ; 0x80000000 + 8000838: 68fb ldr r3, [r7, #12] + 800083a: 681b ldr r3, [r3, #0] + 800083c: 431a orrs r2, r3 + 800083e: 68fb ldr r3, [r7, #12] + 8000840: 601a str r2, [r3, #0] - /* Check the DMA peripheral state */ - if(hdma == NULL) - 800083a: 687b ldr r3, [r7, #4] - 800083c: 2b00 cmp r3, #0 - 800083e: d101 bne.n 8000844 - { - return HAL_ERROR; - 8000840: 2301 movs r3, #1 - 8000842: e099 b.n 8000978 - assert_param(IS_DMA_MEMORY_BURST(hdma->Init.MemBurst)); - assert_param(IS_DMA_PERIPHERAL_BURST(hdma->Init.PeriphBurst)); + return 8; + 8000842: 2308 movs r3, #8 } - - /* Allocate lock resource */ - __HAL_UNLOCK(hdma); - 8000844: 687b ldr r3, [r7, #4] - 8000846: 2200 movs r2, #0 - 8000848: f883 2034 strb.w r2, [r3, #52] ; 0x34 + 8000844: 4618 mov r0, r3 + 8000846: 3714 adds r7, #20 + 8000848: 46bd mov sp, r7 + 800084a: f85d 7b04 ldr.w r7, [sp], #4 + 800084e: 4770 bx lr - /* Change DMA peripheral state */ - hdma->State = HAL_DMA_STATE_BUSY; - 800084c: 687b ldr r3, [r7, #4] - 800084e: 2202 movs r2, #2 - 8000850: f883 2035 strb.w r2, [r3, #53] ; 0x35 - - /* Disable the peripheral */ - __HAL_DMA_DISABLE(hdma); - 8000854: 687b ldr r3, [r7, #4] - 8000856: 681b ldr r3, [r3, #0] - 8000858: 681a ldr r2, [r3, #0] +08000850 <_ZN3ros3MsgC1Ev>: +class Msg + 8000850: b480 push {r7} + 8000852: b083 sub sp, #12 + 8000854: af00 add r7, sp, #0 + 8000856: 6078 str r0, [r7, #4] + 8000858: 4a04 ldr r2, [pc, #16] ; (800086c <_ZN3ros3MsgC1Ev+0x1c>) 800085a: 687b ldr r3, [r7, #4] - 800085c: 681b ldr r3, [r3, #0] - 800085e: f022 0201 bic.w r2, r2, #1 - 8000862: 601a str r2, [r3, #0] - - /* Check if the DMA Stream is effectively disabled */ - while((hdma->Instance->CR & DMA_SxCR_EN) != RESET) - 8000864: e00f b.n 8000886 + 800085c: 601a str r2, [r3, #0] + 800085e: 687b ldr r3, [r7, #4] + 8000860: 4618 mov r0, r3 + 8000862: 370c adds r7, #12 + 8000864: 46bd mov sp, r7 + 8000866: f85d 7b04 ldr.w r7, [sp], #4 + 800086a: 4770 bx lr + 800086c: 0800a618 .word 0x0800a618 + +08000870 <_ZN8std_msgs6StringC1Ev>: { - /* Check for the Timeout */ - if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA_ABORT) - 8000866: f7ff fec1 bl 80005ec - 800086a: 4602 mov r2, r0 - 800086c: 693b ldr r3, [r7, #16] - 800086e: 1ad3 subs r3, r2, r3 - 8000870: 2b05 cmp r3, #5 - 8000872: d908 bls.n 8000886 - { - /* Update error code */ - hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT; - 8000874: 687b ldr r3, [r7, #4] - 8000876: 2220 movs r2, #32 - 8000878: 655a str r2, [r3, #84] ; 0x54 - - /* Change the DMA state */ - hdma->State = HAL_DMA_STATE_TIMEOUT; - 800087a: 687b ldr r3, [r7, #4] - 800087c: 2203 movs r2, #3 - 800087e: f883 2035 strb.w r2, [r3, #53] ; 0x35 - - return HAL_TIMEOUT; - 8000882: 2303 movs r3, #3 - 8000884: e078 b.n 8000978 - while((hdma->Instance->CR & DMA_SxCR_EN) != RESET) + public: + typedef const char* _data_type; + _data_type data; + + String(): + 8000870: b580 push {r7, lr} + 8000872: b082 sub sp, #8 + 8000874: af00 add r7, sp, #0 + 8000876: 6078 str r0, [r7, #4] + data("") + 8000878: 687b ldr r3, [r7, #4] + 800087a: 4618 mov r0, r3 + 800087c: f7ff ffe8 bl 8000850 <_ZN3ros3MsgC1Ev> + 8000880: 4a05 ldr r2, [pc, #20] ; (8000898 <_ZN8std_msgs6StringC1Ev+0x28>) + 8000882: 687b ldr r3, [r7, #4] + 8000884: 601a str r2, [r3, #0] 8000886: 687b ldr r3, [r7, #4] - 8000888: 681b ldr r3, [r3, #0] - 800088a: 681b ldr r3, [r3, #0] - 800088c: f003 0301 and.w r3, r3, #1 - 8000890: 2b00 cmp r3, #0 - 8000892: d1e8 bne.n 8000866 + 8000888: 4a04 ldr r2, [pc, #16] ; (800089c <_ZN8std_msgs6StringC1Ev+0x2c>) + 800088a: 605a str r2, [r3, #4] + { } - } - - /* Get the CR register value */ - tmp = hdma->Instance->CR; - 8000894: 687b ldr r3, [r7, #4] - 8000896: 681b ldr r3, [r3, #0] - 8000898: 681b ldr r3, [r3, #0] - 800089a: 617b str r3, [r7, #20] + 800088c: 687b ldr r3, [r7, #4] + 800088e: 4618 mov r0, r3 + 8000890: 3708 adds r7, #8 + 8000892: 46bd mov sp, r7 + 8000894: bd80 pop {r7, pc} + 8000896: bf00 nop + 8000898: 0800a600 .word 0x0800a600 + 800089c: 0800a128 .word 0x0800a128 - /* Clear CHSEL, MBURST, PBURST, PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR, CT and DBM bits */ - tmp &= ((uint32_t)~(DMA_SxCR_CHSEL | DMA_SxCR_MBURST | DMA_SxCR_PBURST | \ - 800089c: 697a ldr r2, [r7, #20] - 800089e: 4b38 ldr r3, [pc, #224] ; (8000980 ) - 80008a0: 4013 ands r3, r2 - 80008a2: 617b str r3, [r7, #20] - DMA_SxCR_PL | DMA_SxCR_MSIZE | DMA_SxCR_PSIZE | \ - DMA_SxCR_MINC | DMA_SxCR_PINC | DMA_SxCR_CIRC | \ - DMA_SxCR_DIR | DMA_SxCR_CT | DMA_SxCR_DBM)); +080008a0 <_ZNK8std_msgs6String9serializeEPh>: - /* Prepare the DMA Stream configuration */ - tmp |= hdma->Init.Channel | hdma->Init.Direction | - 80008a4: 687b ldr r3, [r7, #4] - 80008a6: 685a ldr r2, [r3, #4] - 80008a8: 687b ldr r3, [r7, #4] - 80008aa: 689b ldr r3, [r3, #8] - 80008ac: 431a orrs r2, r3 - hdma->Init.PeriphInc | hdma->Init.MemInc | + virtual int serialize(unsigned char *outbuffer) const + 80008a0: b580 push {r7, lr} + 80008a2: b084 sub sp, #16 + 80008a4: af00 add r7, sp, #0 + 80008a6: 6078 str r0, [r7, #4] + 80008a8: 6039 str r1, [r7, #0] + { + int offset = 0; + 80008aa: 2300 movs r3, #0 + 80008ac: 60fb str r3, [r7, #12] + uint32_t length_data = strlen(this->data); 80008ae: 687b ldr r3, [r7, #4] - 80008b0: 68db ldr r3, [r3, #12] - tmp |= hdma->Init.Channel | hdma->Init.Direction | - 80008b2: 431a orrs r2, r3 - hdma->Init.PeriphInc | hdma->Init.MemInc | - 80008b4: 687b ldr r3, [r7, #4] - 80008b6: 691b ldr r3, [r3, #16] - 80008b8: 431a orrs r2, r3 - hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | - 80008ba: 687b ldr r3, [r7, #4] - 80008bc: 695b ldr r3, [r3, #20] - hdma->Init.PeriphInc | hdma->Init.MemInc | - 80008be: 431a orrs r2, r3 - hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | - 80008c0: 687b ldr r3, [r7, #4] - 80008c2: 699b ldr r3, [r3, #24] - 80008c4: 431a orrs r2, r3 - hdma->Init.Mode | hdma->Init.Priority; - 80008c6: 687b ldr r3, [r7, #4] - 80008c8: 69db ldr r3, [r3, #28] - hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | - 80008ca: 431a orrs r2, r3 - hdma->Init.Mode | hdma->Init.Priority; - 80008cc: 687b ldr r3, [r7, #4] - 80008ce: 6a1b ldr r3, [r3, #32] - 80008d0: 4313 orrs r3, r2 - tmp |= hdma->Init.Channel | hdma->Init.Direction | - 80008d2: 697a ldr r2, [r7, #20] - 80008d4: 4313 orrs r3, r2 - 80008d6: 617b str r3, [r7, #20] - - /* the Memory burst and peripheral burst are not used when the FIFO is disabled */ - if(hdma->Init.FIFOMode == DMA_FIFOMODE_ENABLE) - 80008d8: 687b ldr r3, [r7, #4] - 80008da: 6a5b ldr r3, [r3, #36] ; 0x24 - 80008dc: 2b04 cmp r3, #4 - 80008de: d107 bne.n 80008f0 - { - /* Get memory burst and peripheral burst */ - tmp |= hdma->Init.MemBurst | hdma->Init.PeriphBurst; - 80008e0: 687b ldr r3, [r7, #4] - 80008e2: 6ada ldr r2, [r3, #44] ; 0x2c - 80008e4: 687b ldr r3, [r7, #4] - 80008e6: 6b1b ldr r3, [r3, #48] ; 0x30 - 80008e8: 4313 orrs r3, r2 - 80008ea: 697a ldr r2, [r7, #20] - 80008ec: 4313 orrs r3, r2 - 80008ee: 617b str r3, [r7, #20] - } - - /* Write to DMA Stream CR register */ - hdma->Instance->CR = tmp; - 80008f0: 687b ldr r3, [r7, #4] - 80008f2: 681b ldr r3, [r3, #0] - 80008f4: 697a ldr r2, [r7, #20] - 80008f6: 601a str r2, [r3, #0] - - /* Get the FCR register value */ - tmp = hdma->Instance->FCR; - 80008f8: 687b ldr r3, [r7, #4] - 80008fa: 681b ldr r3, [r3, #0] - 80008fc: 695b ldr r3, [r3, #20] - 80008fe: 617b str r3, [r7, #20] - - /* Clear Direct mode and FIFO threshold bits */ - tmp &= (uint32_t)~(DMA_SxFCR_DMDIS | DMA_SxFCR_FTH); - 8000900: 697b ldr r3, [r7, #20] - 8000902: f023 0307 bic.w r3, r3, #7 - 8000906: 617b str r3, [r7, #20] + 80008b0: 685b ldr r3, [r3, #4] + 80008b2: 4618 mov r0, r3 + 80008b4: f7ff fcc0 bl 8000238 + 80008b8: 60b8 str r0, [r7, #8] + varToArr(outbuffer + offset, length_data); + 80008ba: 68fb ldr r3, [r7, #12] + 80008bc: 683a ldr r2, [r7, #0] + 80008be: 4413 add r3, r2 + 80008c0: 68b9 ldr r1, [r7, #8] + 80008c2: 4618 mov r0, r3 + 80008c4: f002 fcef bl 80032a6 <_ZN3ros3Msg8varToArrIPhmEEvT_T0_> + offset += 4; + 80008c8: 68fb ldr r3, [r7, #12] + 80008ca: 3304 adds r3, #4 + 80008cc: 60fb str r3, [r7, #12] + memcpy(outbuffer + offset, this->data, length_data); + 80008ce: 68fb ldr r3, [r7, #12] + 80008d0: 683a ldr r2, [r7, #0] + 80008d2: 18d0 adds r0, r2, r3 + 80008d4: 687b ldr r3, [r7, #4] + 80008d6: 685b ldr r3, [r3, #4] + 80008d8: 68ba ldr r2, [r7, #8] + 80008da: 4619 mov r1, r3 + 80008dc: f009 fad0 bl 8009e80 + offset += length_data; + 80008e0: 68fa ldr r2, [r7, #12] + 80008e2: 68bb ldr r3, [r7, #8] + 80008e4: 4413 add r3, r2 + 80008e6: 60fb str r3, [r7, #12] + return offset; + 80008e8: 68fb ldr r3, [r7, #12] + } + 80008ea: 4618 mov r0, r3 + 80008ec: 3710 adds r7, #16 + 80008ee: 46bd mov sp, r7 + 80008f0: bd80 pop {r7, pc} - /* Prepare the DMA Stream FIFO configuration */ - tmp |= hdma->Init.FIFOMode; - 8000908: 687b ldr r3, [r7, #4] - 800090a: 6a5b ldr r3, [r3, #36] ; 0x24 - 800090c: 697a ldr r2, [r7, #20] - 800090e: 4313 orrs r3, r2 - 8000910: 617b str r3, [r7, #20] +080008f2 <_ZN8std_msgs6String11deserializeEPh>: - /* The FIFO threshold is not used when the FIFO mode is disabled */ - if(hdma->Init.FIFOMode == DMA_FIFOMODE_ENABLE) - 8000912: 687b ldr r3, [r7, #4] - 8000914: 6a5b ldr r3, [r3, #36] ; 0x24 - 8000916: 2b04 cmp r3, #4 - 8000918: d117 bne.n 800094a - { - /* Get the FIFO threshold */ - tmp |= hdma->Init.FIFOThreshold; - 800091a: 687b ldr r3, [r7, #4] - 800091c: 6a9b ldr r3, [r3, #40] ; 0x28 - 800091e: 697a ldr r2, [r7, #20] - 8000920: 4313 orrs r3, r2 - 8000922: 617b str r3, [r7, #20] - - /* Check compatibility between FIFO threshold level and size of the memory burst */ - /* for INCR4, INCR8, INCR16 bursts */ - if (hdma->Init.MemBurst != DMA_MBURST_SINGLE) - 8000924: 687b ldr r3, [r7, #4] - 8000926: 6adb ldr r3, [r3, #44] ; 0x2c - 8000928: 2b00 cmp r3, #0 - 800092a: d00e beq.n 800094a + virtual int deserialize(unsigned char *inbuffer) + 80008f2: b580 push {r7, lr} + 80008f4: b086 sub sp, #24 + 80008f6: af00 add r7, sp, #0 + 80008f8: 6078 str r0, [r7, #4] + 80008fa: 6039 str r1, [r7, #0] { - if (DMA_CheckFifoParam(hdma) != HAL_OK) - 800092c: 6878 ldr r0, [r7, #4] - 800092e: f000 fa99 bl 8000e64 - 8000932: 4603 mov r3, r0 - 8000934: 2b00 cmp r3, #0 - 8000936: d008 beq.n 800094a - { - /* Update error code */ - hdma->ErrorCode = HAL_DMA_ERROR_PARAM; - 8000938: 687b ldr r3, [r7, #4] - 800093a: 2240 movs r2, #64 ; 0x40 - 800093c: 655a str r2, [r3, #84] ; 0x54 - - /* Change the DMA state */ - hdma->State = HAL_DMA_STATE_READY; - 800093e: 687b ldr r3, [r7, #4] - 8000940: 2201 movs r2, #1 - 8000942: f883 2035 strb.w r2, [r3, #53] ; 0x35 - - return HAL_ERROR; - 8000946: 2301 movs r3, #1 - 8000948: e016 b.n 8000978 + int offset = 0; + 80008fc: 2300 movs r3, #0 + 80008fe: 613b str r3, [r7, #16] + uint32_t length_data; + arrToVar(length_data, (inbuffer + offset)); + 8000900: 693b ldr r3, [r7, #16] + 8000902: 683a ldr r2, [r7, #0] + 8000904: 441a add r2, r3 + 8000906: f107 030c add.w r3, r7, #12 + 800090a: 4611 mov r1, r2 + 800090c: 4618 mov r0, r3 + 800090e: f002 fce8 bl 80032e2 <_ZN3ros3Msg8arrToVarImPhEEvRT_T0_> + offset += 4; + 8000912: 693b ldr r3, [r7, #16] + 8000914: 3304 adds r3, #4 + 8000916: 613b str r3, [r7, #16] + for(unsigned int k= offset; k< offset+length_data; ++k){ + 8000918: 693b ldr r3, [r7, #16] + 800091a: 617b str r3, [r7, #20] + 800091c: 693a ldr r2, [r7, #16] + 800091e: 68fb ldr r3, [r7, #12] + 8000920: 4413 add r3, r2 + 8000922: 697a ldr r2, [r7, #20] + 8000924: 429a cmp r2, r3 + 8000926: d20c bcs.n 8000942 <_ZN8std_msgs6String11deserializeEPh+0x50> + inbuffer[k-1]=inbuffer[k]; + 8000928: 683a ldr r2, [r7, #0] + 800092a: 697b ldr r3, [r7, #20] + 800092c: 441a add r2, r3 + 800092e: 697b ldr r3, [r7, #20] + 8000930: 3b01 subs r3, #1 + 8000932: 6839 ldr r1, [r7, #0] + 8000934: 440b add r3, r1 + 8000936: 7812 ldrb r2, [r2, #0] + 8000938: 701a strb r2, [r3, #0] + for(unsigned int k= offset; k< offset+length_data; ++k){ + 800093a: 697b ldr r3, [r7, #20] + 800093c: 3301 adds r3, #1 + 800093e: 617b str r3, [r7, #20] + 8000940: e7ec b.n 800091c <_ZN8std_msgs6String11deserializeEPh+0x2a> } + inbuffer[offset+length_data-1]=0; + 8000942: 693a ldr r2, [r7, #16] + 8000944: 68fb ldr r3, [r7, #12] + 8000946: 4413 add r3, r2 + 8000948: 3b01 subs r3, #1 + 800094a: 683a ldr r2, [r7, #0] + 800094c: 4413 add r3, r2 + 800094e: 2200 movs r2, #0 + 8000950: 701a strb r2, [r3, #0] + this->data = (char *)(inbuffer + offset-1); + 8000952: 693b ldr r3, [r7, #16] + 8000954: 3b01 subs r3, #1 + 8000956: 683a ldr r2, [r7, #0] + 8000958: 441a add r2, r3 + 800095a: 687b ldr r3, [r7, #4] + 800095c: 605a str r2, [r3, #4] + offset += length_data; + 800095e: 693a ldr r2, [r7, #16] + 8000960: 68fb ldr r3, [r7, #12] + 8000962: 4413 add r3, r2 + 8000964: 613b str r3, [r7, #16] + return offset; + 8000966: 693b ldr r3, [r7, #16] } - } - - /* Write to DMA Stream FCR */ - hdma->Instance->FCR = tmp; - 800094a: 687b ldr r3, [r7, #4] - 800094c: 681b ldr r3, [r3, #0] - 800094e: 697a ldr r2, [r7, #20] - 8000950: 615a str r2, [r3, #20] - - /* Initialize StreamBaseAddress and StreamIndex parameters to be used to calculate - DMA steam Base Address needed by HAL_DMA_IRQHandler() and HAL_DMA_PollForTransfer() */ - regs = (DMA_Base_Registers *)DMA_CalcBaseAndBitshift(hdma); - 8000952: 6878 ldr r0, [r7, #4] - 8000954: f000 fa50 bl 8000df8 - 8000958: 4603 mov r3, r0 - 800095a: 60fb str r3, [r7, #12] - - /* Clear all interrupt flags */ - regs->IFCR = 0x3FU << hdma->StreamIndex; - 800095c: 687b ldr r3, [r7, #4] - 800095e: 6ddb ldr r3, [r3, #92] ; 0x5c - 8000960: 223f movs r2, #63 ; 0x3f - 8000962: 409a lsls r2, r3 - 8000964: 68fb ldr r3, [r7, #12] - 8000966: 609a str r2, [r3, #8] - - /* Initialize the error code */ - hdma->ErrorCode = HAL_DMA_ERROR_NONE; - 8000968: 687b ldr r3, [r7, #4] - 800096a: 2200 movs r2, #0 - 800096c: 655a str r2, [r3, #84] ; 0x54 - - /* Initialize the DMA state */ - hdma->State = HAL_DMA_STATE_READY; - 800096e: 687b ldr r3, [r7, #4] - 8000970: 2201 movs r2, #1 - 8000972: f883 2035 strb.w r2, [r3, #53] ; 0x35 + 8000968: 4618 mov r0, r3 + 800096a: 3718 adds r7, #24 + 800096c: 46bd mov sp, r7 + 800096e: bd80 pop {r7, pc} - return HAL_OK; - 8000976: 2300 movs r3, #0 -} - 8000978: 4618 mov r0, r3 - 800097a: 3718 adds r7, #24 - 800097c: 46bd mov sp, r7 - 800097e: bd80 pop {r7, pc} - 8000980: e010803f .word 0xe010803f +08000970 <_ZN8std_msgs6String7getTypeEv>: -08000984 : - * @param DstAddress The destination memory Buffer address - * @param DataLength The length of data to be transferred from source to destination - * @retval HAL status - */ -HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) + const char * getType(){ return "std_msgs/String"; }; + 8000970: b480 push {r7} + 8000972: b083 sub sp, #12 + 8000974: af00 add r7, sp, #0 + 8000976: 6078 str r0, [r7, #4] + 8000978: 4b03 ldr r3, [pc, #12] ; (8000988 <_ZN8std_msgs6String7getTypeEv+0x18>) + 800097a: 4618 mov r0, r3 + 800097c: 370c adds r7, #12 + 800097e: 46bd mov sp, r7 + 8000980: f85d 7b04 ldr.w r7, [sp], #4 + 8000984: 4770 bx lr + 8000986: bf00 nop + 8000988: 0800a12c .word 0x0800a12c + +0800098c <_ZN8std_msgs6String6getMD5Ev>: + const char * getMD5(){ return "992ce8a1687cec8c8bd883ec73ca41d1"; }; + 800098c: b480 push {r7} + 800098e: b083 sub sp, #12 + 8000990: af00 add r7, sp, #0 + 8000992: 6078 str r0, [r7, #4] + 8000994: 4b03 ldr r3, [pc, #12] ; (80009a4 <_ZN8std_msgs6String6getMD5Ev+0x18>) + 8000996: 4618 mov r0, r3 + 8000998: 370c adds r7, #12 + 800099a: 46bd mov sp, r7 + 800099c: f85d 7b04 ldr.w r7, [sp], #4 + 80009a0: 4770 bx lr + 80009a2: bf00 nop + 80009a4: 0800a13c .word 0x0800a13c + +080009a8 <_ZN3ros4TimeC1Ev>: +class Time { - 8000984: b580 push {r7, lr} - 8000986: b086 sub sp, #24 - 8000988: af00 add r7, sp, #0 - 800098a: 60f8 str r0, [r7, #12] - 800098c: 60b9 str r1, [r7, #8] - 800098e: 607a str r2, [r7, #4] - 8000990: 603b str r3, [r7, #0] - HAL_StatusTypeDef status = HAL_OK; - 8000992: 2300 movs r3, #0 - 8000994: 75fb strb r3, [r7, #23] +public: + uint32_t sec, nsec; - /* calculate DMA base and stream number */ - DMA_Base_Registers *regs = (DMA_Base_Registers *)hdma->StreamBaseAddress; - 8000996: 68fb ldr r3, [r7, #12] - 8000998: 6d9b ldr r3, [r3, #88] ; 0x58 - 800099a: 613b str r3, [r7, #16] - - /* Check the parameters */ - assert_param(IS_DMA_BUFFER_SIZE(DataLength)); - - /* Process locked */ - __HAL_LOCK(hdma); - 800099c: 68fb ldr r3, [r7, #12] - 800099e: f893 3034 ldrb.w r3, [r3, #52] ; 0x34 - 80009a2: 2b01 cmp r3, #1 - 80009a4: d101 bne.n 80009aa - 80009a6: 2302 movs r3, #2 - 80009a8: e048 b.n 8000a3c - 80009aa: 68fb ldr r3, [r7, #12] - 80009ac: 2201 movs r2, #1 - 80009ae: f883 2034 strb.w r2, [r3, #52] ; 0x34 - - if(HAL_DMA_STATE_READY == hdma->State) - 80009b2: 68fb ldr r3, [r7, #12] - 80009b4: f893 3035 ldrb.w r3, [r3, #53] ; 0x35 - 80009b8: b2db uxtb r3, r3 - 80009ba: 2b01 cmp r3, #1 - 80009bc: d137 bne.n 8000a2e + Time() : sec(0), nsec(0) {} + 80009a8: b480 push {r7} + 80009aa: b083 sub sp, #12 + 80009ac: af00 add r7, sp, #0 + 80009ae: 6078 str r0, [r7, #4] + 80009b0: 687b ldr r3, [r7, #4] + 80009b2: 2200 movs r2, #0 + 80009b4: 601a str r2, [r3, #0] + 80009b6: 687b ldr r3, [r7, #4] + 80009b8: 2200 movs r2, #0 + 80009ba: 605a str r2, [r3, #4] + 80009bc: 687b ldr r3, [r7, #4] + 80009be: 4618 mov r0, r3 + 80009c0: 370c adds r7, #12 + 80009c2: 46bd mov sp, r7 + 80009c4: f85d 7b04 ldr.w r7, [sp], #4 + 80009c8: 4770 bx lr + ... + +080009cc <_ZN8std_msgs4TimeC1Ev>: { - /* Change DMA peripheral state */ - hdma->State = HAL_DMA_STATE_BUSY; - 80009be: 68fb ldr r3, [r7, #12] - 80009c0: 2202 movs r2, #2 - 80009c2: f883 2035 strb.w r2, [r3, #53] ; 0x35 - - /* Initialize the error code */ - hdma->ErrorCode = HAL_DMA_ERROR_NONE; - 80009c6: 68fb ldr r3, [r7, #12] - 80009c8: 2200 movs r2, #0 - 80009ca: 655a str r2, [r3, #84] ; 0x54 - - /* Configure the source, destination address and the data length */ - DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength); - 80009cc: 683b ldr r3, [r7, #0] - 80009ce: 687a ldr r2, [r7, #4] - 80009d0: 68b9 ldr r1, [r7, #8] - 80009d2: 68f8 ldr r0, [r7, #12] - 80009d4: f000 f9e2 bl 8000d9c - - /* Clear all interrupt flags at correct offset within the register */ - regs->IFCR = 0x3FU << hdma->StreamIndex; - 80009d8: 68fb ldr r3, [r7, #12] - 80009da: 6ddb ldr r3, [r3, #92] ; 0x5c - 80009dc: 223f movs r2, #63 ; 0x3f - 80009de: 409a lsls r2, r3 - 80009e0: 693b ldr r3, [r7, #16] - 80009e2: 609a str r2, [r3, #8] - - /* Enable Common interrupts*/ - hdma->Instance->CR |= DMA_IT_TC | DMA_IT_TE | DMA_IT_DME; - 80009e4: 68fb ldr r3, [r7, #12] - 80009e6: 681b ldr r3, [r3, #0] - 80009e8: 681a ldr r2, [r3, #0] - 80009ea: 68fb ldr r3, [r7, #12] - 80009ec: 681b ldr r3, [r3, #0] - 80009ee: f042 0216 orr.w r2, r2, #22 - 80009f2: 601a str r2, [r3, #0] - hdma->Instance->FCR |= DMA_IT_FE; - 80009f4: 68fb ldr r3, [r7, #12] - 80009f6: 681b ldr r3, [r3, #0] - 80009f8: 695a ldr r2, [r3, #20] - 80009fa: 68fb ldr r3, [r7, #12] - 80009fc: 681b ldr r3, [r3, #0] - 80009fe: f042 0280 orr.w r2, r2, #128 ; 0x80 - 8000a02: 615a str r2, [r3, #20] - - if(hdma->XferHalfCpltCallback != NULL) - 8000a04: 68fb ldr r3, [r7, #12] - 8000a06: 6c1b ldr r3, [r3, #64] ; 0x40 - 8000a08: 2b00 cmp r3, #0 - 8000a0a: d007 beq.n 8000a1c + public: + typedef ros::Time _data_type; + _data_type data; + + Time(): + 80009cc: b580 push {r7, lr} + 80009ce: b082 sub sp, #8 + 80009d0: af00 add r7, sp, #0 + 80009d2: 6078 str r0, [r7, #4] + data() + 80009d4: 687b ldr r3, [r7, #4] + 80009d6: 4618 mov r0, r3 + 80009d8: f7ff ff3a bl 8000850 <_ZN3ros3MsgC1Ev> + 80009dc: 4a06 ldr r2, [pc, #24] ; (80009f8 <_ZN8std_msgs4TimeC1Ev+0x2c>) + 80009de: 687b ldr r3, [r7, #4] + 80009e0: 601a str r2, [r3, #0] + 80009e2: 687b ldr r3, [r7, #4] + 80009e4: 3304 adds r3, #4 + 80009e6: 4618 mov r0, r3 + 80009e8: f7ff ffde bl 80009a8 <_ZN3ros4TimeC1Ev> { - hdma->Instance->CR |= DMA_IT_HT; - 8000a0c: 68fb ldr r3, [r7, #12] - 8000a0e: 681b ldr r3, [r3, #0] - 8000a10: 681a ldr r2, [r3, #0] - 8000a12: 68fb ldr r3, [r7, #12] - 8000a14: 681b ldr r3, [r3, #0] - 8000a16: f042 0208 orr.w r2, r2, #8 - 8000a1a: 601a str r2, [r3, #0] } - - /* Enable the Peripheral */ - __HAL_DMA_ENABLE(hdma); - 8000a1c: 68fb ldr r3, [r7, #12] - 8000a1e: 681b ldr r3, [r3, #0] - 8000a20: 681a ldr r2, [r3, #0] - 8000a22: 68fb ldr r3, [r7, #12] - 8000a24: 681b ldr r3, [r3, #0] - 8000a26: f042 0201 orr.w r2, r2, #1 - 8000a2a: 601a str r2, [r3, #0] - 8000a2c: e005 b.n 8000a3a - } - else - { - /* Process unlocked */ - __HAL_UNLOCK(hdma); - 8000a2e: 68fb ldr r3, [r7, #12] - 8000a30: 2200 movs r2, #0 - 8000a32: f883 2034 strb.w r2, [r3, #52] ; 0x34 - - /* Return error status */ - status = HAL_BUSY; - 8000a36: 2302 movs r3, #2 - 8000a38: 75fb strb r3, [r7, #23] - } - - return status; - 8000a3a: 7dfb ldrb r3, [r7, #23] -} - 8000a3c: 4618 mov r0, r3 - 8000a3e: 3718 adds r7, #24 - 8000a40: 46bd mov sp, r7 - 8000a42: bd80 pop {r7, pc} - -08000a44 : - * @param hdma pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA Stream. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma) -{ - 8000a44: b480 push {r7} - 8000a46: b083 sub sp, #12 - 8000a48: af00 add r7, sp, #0 - 8000a4a: 6078 str r0, [r7, #4] - if(hdma->State != HAL_DMA_STATE_BUSY) - 8000a4c: 687b ldr r3, [r7, #4] - 8000a4e: f893 3035 ldrb.w r3, [r3, #53] ; 0x35 - 8000a52: b2db uxtb r3, r3 - 8000a54: 2b02 cmp r3, #2 - 8000a56: d004 beq.n 8000a62 - { - hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; - 8000a58: 687b ldr r3, [r7, #4] - 8000a5a: 2280 movs r2, #128 ; 0x80 - 8000a5c: 655a str r2, [r3, #84] ; 0x54 - return HAL_ERROR; - 8000a5e: 2301 movs r3, #1 - 8000a60: e00c b.n 8000a7c - } - else - { - /* Set Abort State */ - hdma->State = HAL_DMA_STATE_ABORT; - 8000a62: 687b ldr r3, [r7, #4] - 8000a64: 2205 movs r2, #5 - 8000a66: f883 2035 strb.w r2, [r3, #53] ; 0x35 - - /* Disable the stream */ - __HAL_DMA_DISABLE(hdma); - 8000a6a: 687b ldr r3, [r7, #4] - 8000a6c: 681b ldr r3, [r3, #0] - 8000a6e: 681a ldr r2, [r3, #0] - 8000a70: 687b ldr r3, [r7, #4] - 8000a72: 681b ldr r3, [r3, #0] - 8000a74: f022 0201 bic.w r2, r2, #1 - 8000a78: 601a str r2, [r3, #0] - } + 80009ec: 687b ldr r3, [r7, #4] + 80009ee: 4618 mov r0, r3 + 80009f0: 3708 adds r7, #8 + 80009f2: 46bd mov sp, r7 + 80009f4: bd80 pop {r7, pc} + 80009f6: bf00 nop + 80009f8: 0800a5e8 .word 0x0800a5e8 - return HAL_OK; - 8000a7a: 2300 movs r3, #0 -} - 8000a7c: 4618 mov r0, r3 - 8000a7e: 370c adds r7, #12 - 8000a80: 46bd mov sp, r7 - 8000a82: f85d 7b04 ldr.w r7, [sp], #4 - 8000a86: 4770 bx lr +080009fc <_ZNK8std_msgs4Time9serializeEPh>: -08000a88 : - * @param hdma pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA Stream. - * @retval None - */ -void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma) -{ - 8000a88: b580 push {r7, lr} - 8000a8a: b086 sub sp, #24 - 8000a8c: af00 add r7, sp, #0 - 8000a8e: 6078 str r0, [r7, #4] - uint32_t tmpisr; - __IO uint32_t count = 0; - 8000a90: 2300 movs r3, #0 - 8000a92: 60bb str r3, [r7, #8] - uint32_t timeout = SystemCoreClock / 9600; - 8000a94: 4b92 ldr r3, [pc, #584] ; (8000ce0 ) - 8000a96: 681b ldr r3, [r3, #0] - 8000a98: 4a92 ldr r2, [pc, #584] ; (8000ce4 ) - 8000a9a: fba2 2303 umull r2, r3, r2, r3 - 8000a9e: 0a9b lsrs r3, r3, #10 - 8000aa0: 617b str r3, [r7, #20] - - /* calculate DMA base and stream number */ - DMA_Base_Registers *regs = (DMA_Base_Registers *)hdma->StreamBaseAddress; - 8000aa2: 687b ldr r3, [r7, #4] - 8000aa4: 6d9b ldr r3, [r3, #88] ; 0x58 - 8000aa6: 613b str r3, [r7, #16] + virtual int serialize(unsigned char *outbuffer) const + 80009fc: b480 push {r7} + 80009fe: b085 sub sp, #20 + 8000a00: af00 add r7, sp, #0 + 8000a02: 6078 str r0, [r7, #4] + 8000a04: 6039 str r1, [r7, #0] + { + int offset = 0; + 8000a06: 2300 movs r3, #0 + 8000a08: 60fb str r3, [r7, #12] + *(outbuffer + offset + 0) = (this->data.sec >> (8 * 0)) & 0xFF; + 8000a0a: 687b ldr r3, [r7, #4] + 8000a0c: 6859 ldr r1, [r3, #4] + 8000a0e: 68fb ldr r3, [r7, #12] + 8000a10: 683a ldr r2, [r7, #0] + 8000a12: 4413 add r3, r2 + 8000a14: b2ca uxtb r2, r1 + 8000a16: 701a strb r2, [r3, #0] + *(outbuffer + offset + 1) = (this->data.sec >> (8 * 1)) & 0xFF; + 8000a18: 687b ldr r3, [r7, #4] + 8000a1a: 685b ldr r3, [r3, #4] + 8000a1c: 0a19 lsrs r1, r3, #8 + 8000a1e: 68fb ldr r3, [r7, #12] + 8000a20: 3301 adds r3, #1 + 8000a22: 683a ldr r2, [r7, #0] + 8000a24: 4413 add r3, r2 + 8000a26: b2ca uxtb r2, r1 + 8000a28: 701a strb r2, [r3, #0] + *(outbuffer + offset + 2) = (this->data.sec >> (8 * 2)) & 0xFF; + 8000a2a: 687b ldr r3, [r7, #4] + 8000a2c: 685b ldr r3, [r3, #4] + 8000a2e: 0c19 lsrs r1, r3, #16 + 8000a30: 68fb ldr r3, [r7, #12] + 8000a32: 3302 adds r3, #2 + 8000a34: 683a ldr r2, [r7, #0] + 8000a36: 4413 add r3, r2 + 8000a38: b2ca uxtb r2, r1 + 8000a3a: 701a strb r2, [r3, #0] + *(outbuffer + offset + 3) = (this->data.sec >> (8 * 3)) & 0xFF; + 8000a3c: 687b ldr r3, [r7, #4] + 8000a3e: 685b ldr r3, [r3, #4] + 8000a40: 0e19 lsrs r1, r3, #24 + 8000a42: 68fb ldr r3, [r7, #12] + 8000a44: 3303 adds r3, #3 + 8000a46: 683a ldr r2, [r7, #0] + 8000a48: 4413 add r3, r2 + 8000a4a: b2ca uxtb r2, r1 + 8000a4c: 701a strb r2, [r3, #0] + offset += sizeof(this->data.sec); + 8000a4e: 68fb ldr r3, [r7, #12] + 8000a50: 3304 adds r3, #4 + 8000a52: 60fb str r3, [r7, #12] + *(outbuffer + offset + 0) = (this->data.nsec >> (8 * 0)) & 0xFF; + 8000a54: 687b ldr r3, [r7, #4] + 8000a56: 6899 ldr r1, [r3, #8] + 8000a58: 68fb ldr r3, [r7, #12] + 8000a5a: 683a ldr r2, [r7, #0] + 8000a5c: 4413 add r3, r2 + 8000a5e: b2ca uxtb r2, r1 + 8000a60: 701a strb r2, [r3, #0] + *(outbuffer + offset + 1) = (this->data.nsec >> (8 * 1)) & 0xFF; + 8000a62: 687b ldr r3, [r7, #4] + 8000a64: 689b ldr r3, [r3, #8] + 8000a66: 0a19 lsrs r1, r3, #8 + 8000a68: 68fb ldr r3, [r7, #12] + 8000a6a: 3301 adds r3, #1 + 8000a6c: 683a ldr r2, [r7, #0] + 8000a6e: 4413 add r3, r2 + 8000a70: b2ca uxtb r2, r1 + 8000a72: 701a strb r2, [r3, #0] + *(outbuffer + offset + 2) = (this->data.nsec >> (8 * 2)) & 0xFF; + 8000a74: 687b ldr r3, [r7, #4] + 8000a76: 689b ldr r3, [r3, #8] + 8000a78: 0c19 lsrs r1, r3, #16 + 8000a7a: 68fb ldr r3, [r7, #12] + 8000a7c: 3302 adds r3, #2 + 8000a7e: 683a ldr r2, [r7, #0] + 8000a80: 4413 add r3, r2 + 8000a82: b2ca uxtb r2, r1 + 8000a84: 701a strb r2, [r3, #0] + *(outbuffer + offset + 3) = (this->data.nsec >> (8 * 3)) & 0xFF; + 8000a86: 687b ldr r3, [r7, #4] + 8000a88: 689b ldr r3, [r3, #8] + 8000a8a: 0e19 lsrs r1, r3, #24 + 8000a8c: 68fb ldr r3, [r7, #12] + 8000a8e: 3303 adds r3, #3 + 8000a90: 683a ldr r2, [r7, #0] + 8000a92: 4413 add r3, r2 + 8000a94: b2ca uxtb r2, r1 + 8000a96: 701a strb r2, [r3, #0] + offset += sizeof(this->data.nsec); + 8000a98: 68fb ldr r3, [r7, #12] + 8000a9a: 3304 adds r3, #4 + 8000a9c: 60fb str r3, [r7, #12] + return offset; + 8000a9e: 68fb ldr r3, [r7, #12] + } + 8000aa0: 4618 mov r0, r3 + 8000aa2: 3714 adds r7, #20 + 8000aa4: 46bd mov sp, r7 + 8000aa6: f85d 7b04 ldr.w r7, [sp], #4 + 8000aaa: 4770 bx lr - tmpisr = regs->ISR; - 8000aa8: 693b ldr r3, [r7, #16] - 8000aaa: 681b ldr r3, [r3, #0] - 8000aac: 60fb str r3, [r7, #12] +08000aac <_ZN8std_msgs4Time11deserializeEPh>: - /* Transfer Error Interrupt management ***************************************/ - if ((tmpisr & (DMA_FLAG_TEIF0_4 << hdma->StreamIndex)) != RESET) - 8000aae: 687b ldr r3, [r7, #4] - 8000ab0: 6ddb ldr r3, [r3, #92] ; 0x5c - 8000ab2: 2208 movs r2, #8 - 8000ab4: 409a lsls r2, r3 - 8000ab6: 68fb ldr r3, [r7, #12] - 8000ab8: 4013 ands r3, r2 - 8000aba: 2b00 cmp r3, #0 - 8000abc: d01a beq.n 8000af4 - { - if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TE) != RESET) - 8000abe: 687b ldr r3, [r7, #4] - 8000ac0: 681b ldr r3, [r3, #0] - 8000ac2: 681b ldr r3, [r3, #0] - 8000ac4: f003 0304 and.w r3, r3, #4 - 8000ac8: 2b00 cmp r3, #0 - 8000aca: d013 beq.n 8000af4 + virtual int deserialize(unsigned char *inbuffer) + 8000aac: b480 push {r7} + 8000aae: b085 sub sp, #20 + 8000ab0: af00 add r7, sp, #0 + 8000ab2: 6078 str r0, [r7, #4] + 8000ab4: 6039 str r1, [r7, #0] { - /* Disable the transfer error interrupt */ - hdma->Instance->CR &= ~(DMA_IT_TE); - 8000acc: 687b ldr r3, [r7, #4] - 8000ace: 681b ldr r3, [r3, #0] - 8000ad0: 681a ldr r2, [r3, #0] - 8000ad2: 687b ldr r3, [r7, #4] - 8000ad4: 681b ldr r3, [r3, #0] - 8000ad6: f022 0204 bic.w r2, r2, #4 - 8000ada: 601a str r2, [r3, #0] - - /* Clear the transfer error flag */ - regs->IFCR = DMA_FLAG_TEIF0_4 << hdma->StreamIndex; - 8000adc: 687b ldr r3, [r7, #4] - 8000ade: 6ddb ldr r3, [r3, #92] ; 0x5c - 8000ae0: 2208 movs r2, #8 - 8000ae2: 409a lsls r2, r3 - 8000ae4: 693b ldr r3, [r7, #16] - 8000ae6: 609a str r2, [r3, #8] - - /* Update error code */ - hdma->ErrorCode |= HAL_DMA_ERROR_TE; - 8000ae8: 687b ldr r3, [r7, #4] - 8000aea: 6d5b ldr r3, [r3, #84] ; 0x54 - 8000aec: f043 0201 orr.w r2, r3, #1 + int offset = 0; + 8000ab6: 2300 movs r3, #0 + 8000ab8: 60fb str r3, [r7, #12] + this->data.sec = ((uint32_t) (*(inbuffer + offset))); + 8000aba: 68fb ldr r3, [r7, #12] + 8000abc: 683a ldr r2, [r7, #0] + 8000abe: 4413 add r3, r2 + 8000ac0: 781b ldrb r3, [r3, #0] + 8000ac2: 461a mov r2, r3 + 8000ac4: 687b ldr r3, [r7, #4] + 8000ac6: 605a str r2, [r3, #4] + this->data.sec |= ((uint32_t) (*(inbuffer + offset + 1))) << (8 * 1); + 8000ac8: 687b ldr r3, [r7, #4] + 8000aca: 685a ldr r2, [r3, #4] + 8000acc: 68fb ldr r3, [r7, #12] + 8000ace: 3301 adds r3, #1 + 8000ad0: 6839 ldr r1, [r7, #0] + 8000ad2: 440b add r3, r1 + 8000ad4: 781b ldrb r3, [r3, #0] + 8000ad6: 021b lsls r3, r3, #8 + 8000ad8: 431a orrs r2, r3 + 8000ada: 687b ldr r3, [r7, #4] + 8000adc: 605a str r2, [r3, #4] + this->data.sec |= ((uint32_t) (*(inbuffer + offset + 2))) << (8 * 2); + 8000ade: 687b ldr r3, [r7, #4] + 8000ae0: 685a ldr r2, [r3, #4] + 8000ae2: 68fb ldr r3, [r7, #12] + 8000ae4: 3302 adds r3, #2 + 8000ae6: 6839 ldr r1, [r7, #0] + 8000ae8: 440b add r3, r1 + 8000aea: 781b ldrb r3, [r3, #0] + 8000aec: 041b lsls r3, r3, #16 + 8000aee: 431a orrs r2, r3 8000af0: 687b ldr r3, [r7, #4] - 8000af2: 655a str r2, [r3, #84] ; 0x54 - } - } - /* FIFO Error Interrupt management ******************************************/ - if ((tmpisr & (DMA_FLAG_FEIF0_4 << hdma->StreamIndex)) != RESET) + 8000af2: 605a str r2, [r3, #4] + this->data.sec |= ((uint32_t) (*(inbuffer + offset + 3))) << (8 * 3); 8000af4: 687b ldr r3, [r7, #4] - 8000af6: 6ddb ldr r3, [r3, #92] ; 0x5c - 8000af8: 2201 movs r2, #1 - 8000afa: 409a lsls r2, r3 - 8000afc: 68fb ldr r3, [r7, #12] - 8000afe: 4013 ands r3, r2 - 8000b00: 2b00 cmp r3, #0 - 8000b02: d012 beq.n 8000b2a - { - if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_FE) != RESET) - 8000b04: 687b ldr r3, [r7, #4] - 8000b06: 681b ldr r3, [r3, #0] - 8000b08: 695b ldr r3, [r3, #20] - 8000b0a: f003 0380 and.w r3, r3, #128 ; 0x80 - 8000b0e: 2b00 cmp r3, #0 - 8000b10: d00b beq.n 8000b2a - { - /* Clear the FIFO error flag */ - regs->IFCR = DMA_FLAG_FEIF0_4 << hdma->StreamIndex; - 8000b12: 687b ldr r3, [r7, #4] - 8000b14: 6ddb ldr r3, [r3, #92] ; 0x5c - 8000b16: 2201 movs r2, #1 - 8000b18: 409a lsls r2, r3 - 8000b1a: 693b ldr r3, [r7, #16] + 8000af6: 685a ldr r2, [r3, #4] + 8000af8: 68fb ldr r3, [r7, #12] + 8000afa: 3303 adds r3, #3 + 8000afc: 6839 ldr r1, [r7, #0] + 8000afe: 440b add r3, r1 + 8000b00: 781b ldrb r3, [r3, #0] + 8000b02: 061b lsls r3, r3, #24 + 8000b04: 431a orrs r2, r3 + 8000b06: 687b ldr r3, [r7, #4] + 8000b08: 605a str r2, [r3, #4] + offset += sizeof(this->data.sec); + 8000b0a: 68fb ldr r3, [r7, #12] + 8000b0c: 3304 adds r3, #4 + 8000b0e: 60fb str r3, [r7, #12] + this->data.nsec = ((uint32_t) (*(inbuffer + offset))); + 8000b10: 68fb ldr r3, [r7, #12] + 8000b12: 683a ldr r2, [r7, #0] + 8000b14: 4413 add r3, r2 + 8000b16: 781b ldrb r3, [r3, #0] + 8000b18: 461a mov r2, r3 + 8000b1a: 687b ldr r3, [r7, #4] 8000b1c: 609a str r2, [r3, #8] - - /* Update error code */ - hdma->ErrorCode |= HAL_DMA_ERROR_FE; + this->data.nsec |= ((uint32_t) (*(inbuffer + offset + 1))) << (8 * 1); 8000b1e: 687b ldr r3, [r7, #4] - 8000b20: 6d5b ldr r3, [r3, #84] ; 0x54 - 8000b22: f043 0202 orr.w r2, r3, #2 - 8000b26: 687b ldr r3, [r7, #4] - 8000b28: 655a str r2, [r3, #84] ; 0x54 - } - } - /* Direct Mode Error Interrupt management ***********************************/ - if ((tmpisr & (DMA_FLAG_DMEIF0_4 << hdma->StreamIndex)) != RESET) - 8000b2a: 687b ldr r3, [r7, #4] - 8000b2c: 6ddb ldr r3, [r3, #92] ; 0x5c - 8000b2e: 2204 movs r2, #4 - 8000b30: 409a lsls r2, r3 - 8000b32: 68fb ldr r3, [r7, #12] - 8000b34: 4013 ands r3, r2 - 8000b36: 2b00 cmp r3, #0 - 8000b38: d012 beq.n 8000b60 - { - if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_DME) != RESET) - 8000b3a: 687b ldr r3, [r7, #4] - 8000b3c: 681b ldr r3, [r3, #0] - 8000b3e: 681b ldr r3, [r3, #0] - 8000b40: f003 0302 and.w r3, r3, #2 - 8000b44: 2b00 cmp r3, #0 - 8000b46: d00b beq.n 8000b60 - { - /* Clear the direct mode error flag */ - regs->IFCR = DMA_FLAG_DMEIF0_4 << hdma->StreamIndex; - 8000b48: 687b ldr r3, [r7, #4] - 8000b4a: 6ddb ldr r3, [r3, #92] ; 0x5c - 8000b4c: 2204 movs r2, #4 - 8000b4e: 409a lsls r2, r3 - 8000b50: 693b ldr r3, [r7, #16] - 8000b52: 609a str r2, [r3, #8] - - /* Update error code */ - hdma->ErrorCode |= HAL_DMA_ERROR_DME; - 8000b54: 687b ldr r3, [r7, #4] - 8000b56: 6d5b ldr r3, [r3, #84] ; 0x54 - 8000b58: f043 0204 orr.w r2, r3, #4 + 8000b20: 689a ldr r2, [r3, #8] + 8000b22: 68fb ldr r3, [r7, #12] + 8000b24: 3301 adds r3, #1 + 8000b26: 6839 ldr r1, [r7, #0] + 8000b28: 440b add r3, r1 + 8000b2a: 781b ldrb r3, [r3, #0] + 8000b2c: 021b lsls r3, r3, #8 + 8000b2e: 431a orrs r2, r3 + 8000b30: 687b ldr r3, [r7, #4] + 8000b32: 609a str r2, [r3, #8] + this->data.nsec |= ((uint32_t) (*(inbuffer + offset + 2))) << (8 * 2); + 8000b34: 687b ldr r3, [r7, #4] + 8000b36: 689a ldr r2, [r3, #8] + 8000b38: 68fb ldr r3, [r7, #12] + 8000b3a: 3302 adds r3, #2 + 8000b3c: 6839 ldr r1, [r7, #0] + 8000b3e: 440b add r3, r1 + 8000b40: 781b ldrb r3, [r3, #0] + 8000b42: 041b lsls r3, r3, #16 + 8000b44: 431a orrs r2, r3 + 8000b46: 687b ldr r3, [r7, #4] + 8000b48: 609a str r2, [r3, #8] + this->data.nsec |= ((uint32_t) (*(inbuffer + offset + 3))) << (8 * 3); + 8000b4a: 687b ldr r3, [r7, #4] + 8000b4c: 689a ldr r2, [r3, #8] + 8000b4e: 68fb ldr r3, [r7, #12] + 8000b50: 3303 adds r3, #3 + 8000b52: 6839 ldr r1, [r7, #0] + 8000b54: 440b add r3, r1 + 8000b56: 781b ldrb r3, [r3, #0] + 8000b58: 061b lsls r3, r3, #24 + 8000b5a: 431a orrs r2, r3 8000b5c: 687b ldr r3, [r7, #4] - 8000b5e: 655a str r2, [r3, #84] ; 0x54 - } - } - /* Half Transfer Complete Interrupt management ******************************/ - if ((tmpisr & (DMA_FLAG_HTIF0_4 << hdma->StreamIndex)) != RESET) - 8000b60: 687b ldr r3, [r7, #4] - 8000b62: 6ddb ldr r3, [r3, #92] ; 0x5c - 8000b64: 2210 movs r2, #16 - 8000b66: 409a lsls r2, r3 - 8000b68: 68fb ldr r3, [r7, #12] - 8000b6a: 4013 ands r3, r2 - 8000b6c: 2b00 cmp r3, #0 - 8000b6e: d043 beq.n 8000bf8 - { - if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_HT) != RESET) - 8000b70: 687b ldr r3, [r7, #4] - 8000b72: 681b ldr r3, [r3, #0] - 8000b74: 681b ldr r3, [r3, #0] - 8000b76: f003 0308 and.w r3, r3, #8 - 8000b7a: 2b00 cmp r3, #0 - 8000b7c: d03c beq.n 8000bf8 - { - /* Clear the half transfer complete flag */ - regs->IFCR = DMA_FLAG_HTIF0_4 << hdma->StreamIndex; - 8000b7e: 687b ldr r3, [r7, #4] - 8000b80: 6ddb ldr r3, [r3, #92] ; 0x5c - 8000b82: 2210 movs r2, #16 - 8000b84: 409a lsls r2, r3 - 8000b86: 693b ldr r3, [r7, #16] - 8000b88: 609a str r2, [r3, #8] - - /* Multi_Buffering mode enabled */ - if(((hdma->Instance->CR) & (uint32_t)(DMA_SxCR_DBM)) != RESET) - 8000b8a: 687b ldr r3, [r7, #4] - 8000b8c: 681b ldr r3, [r3, #0] - 8000b8e: 681b ldr r3, [r3, #0] - 8000b90: f403 2380 and.w r3, r3, #262144 ; 0x40000 - 8000b94: 2b00 cmp r3, #0 - 8000b96: d018 beq.n 8000bca - { - /* Current memory buffer used is Memory 0 */ - if((hdma->Instance->CR & DMA_SxCR_CT) == RESET) - 8000b98: 687b ldr r3, [r7, #4] - 8000b9a: 681b ldr r3, [r3, #0] - 8000b9c: 681b ldr r3, [r3, #0] - 8000b9e: f403 2300 and.w r3, r3, #524288 ; 0x80000 - 8000ba2: 2b00 cmp r3, #0 - 8000ba4: d108 bne.n 8000bb8 - { - if(hdma->XferHalfCpltCallback != NULL) - 8000ba6: 687b ldr r3, [r7, #4] - 8000ba8: 6c1b ldr r3, [r3, #64] ; 0x40 - 8000baa: 2b00 cmp r3, #0 - 8000bac: d024 beq.n 8000bf8 - { - /* Half transfer callback */ - hdma->XferHalfCpltCallback(hdma); - 8000bae: 687b ldr r3, [r7, #4] - 8000bb0: 6c1b ldr r3, [r3, #64] ; 0x40 - 8000bb2: 6878 ldr r0, [r7, #4] - 8000bb4: 4798 blx r3 - 8000bb6: e01f b.n 8000bf8 - } - } - /* Current memory buffer used is Memory 1 */ - else - { - if(hdma->XferM1HalfCpltCallback != NULL) - 8000bb8: 687b ldr r3, [r7, #4] - 8000bba: 6c9b ldr r3, [r3, #72] ; 0x48 - 8000bbc: 2b00 cmp r3, #0 - 8000bbe: d01b beq.n 8000bf8 - { - /* Half transfer callback */ - hdma->XferM1HalfCpltCallback(hdma); - 8000bc0: 687b ldr r3, [r7, #4] - 8000bc2: 6c9b ldr r3, [r3, #72] ; 0x48 - 8000bc4: 6878 ldr r0, [r7, #4] - 8000bc6: 4798 blx r3 - 8000bc8: e016 b.n 8000bf8 - } - } - else - { - /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */ - if((hdma->Instance->CR & DMA_SxCR_CIRC) == RESET) - 8000bca: 687b ldr r3, [r7, #4] - 8000bcc: 681b ldr r3, [r3, #0] - 8000bce: 681b ldr r3, [r3, #0] - 8000bd0: f403 7380 and.w r3, r3, #256 ; 0x100 - 8000bd4: 2b00 cmp r3, #0 - 8000bd6: d107 bne.n 8000be8 - { - /* Disable the half transfer interrupt */ - hdma->Instance->CR &= ~(DMA_IT_HT); - 8000bd8: 687b ldr r3, [r7, #4] - 8000bda: 681b ldr r3, [r3, #0] - 8000bdc: 681a ldr r2, [r3, #0] - 8000bde: 687b ldr r3, [r7, #4] - 8000be0: 681b ldr r3, [r3, #0] - 8000be2: f022 0208 bic.w r2, r2, #8 - 8000be6: 601a str r2, [r3, #0] - } - - if(hdma->XferHalfCpltCallback != NULL) - 8000be8: 687b ldr r3, [r7, #4] - 8000bea: 6c1b ldr r3, [r3, #64] ; 0x40 - 8000bec: 2b00 cmp r3, #0 - 8000bee: d003 beq.n 8000bf8 - { - /* Half transfer callback */ - hdma->XferHalfCpltCallback(hdma); - 8000bf0: 687b ldr r3, [r7, #4] - 8000bf2: 6c1b ldr r3, [r3, #64] ; 0x40 - 8000bf4: 6878 ldr r0, [r7, #4] - 8000bf6: 4798 blx r3 - } - } + 8000b5e: 609a str r2, [r3, #8] + offset += sizeof(this->data.nsec); + 8000b60: 68fb ldr r3, [r7, #12] + 8000b62: 3304 adds r3, #4 + 8000b64: 60fb str r3, [r7, #12] + return offset; + 8000b66: 68fb ldr r3, [r7, #12] } - } - /* Transfer Complete Interrupt management ***********************************/ - if ((tmpisr & (DMA_FLAG_TCIF0_4 << hdma->StreamIndex)) != RESET) - 8000bf8: 687b ldr r3, [r7, #4] - 8000bfa: 6ddb ldr r3, [r3, #92] ; 0x5c - 8000bfc: 2220 movs r2, #32 - 8000bfe: 409a lsls r2, r3 - 8000c00: 68fb ldr r3, [r7, #12] - 8000c02: 4013 ands r3, r2 - 8000c04: 2b00 cmp r3, #0 - 8000c06: f000 808e beq.w 8000d26 - { - if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TC) != RESET) - 8000c0a: 687b ldr r3, [r7, #4] - 8000c0c: 681b ldr r3, [r3, #0] - 8000c0e: 681b ldr r3, [r3, #0] - 8000c10: f003 0310 and.w r3, r3, #16 - 8000c14: 2b00 cmp r3, #0 - 8000c16: f000 8086 beq.w 8000d26 - { - /* Clear the transfer complete flag */ - regs->IFCR = DMA_FLAG_TCIF0_4 << hdma->StreamIndex; - 8000c1a: 687b ldr r3, [r7, #4] - 8000c1c: 6ddb ldr r3, [r3, #92] ; 0x5c - 8000c1e: 2220 movs r2, #32 - 8000c20: 409a lsls r2, r3 - 8000c22: 693b ldr r3, [r7, #16] - 8000c24: 609a str r2, [r3, #8] - - if(HAL_DMA_STATE_ABORT == hdma->State) - 8000c26: 687b ldr r3, [r7, #4] - 8000c28: f893 3035 ldrb.w r3, [r3, #53] ; 0x35 - 8000c2c: b2db uxtb r3, r3 - 8000c2e: 2b05 cmp r3, #5 - 8000c30: d136 bne.n 8000ca0 - { - /* Disable all the transfer interrupts */ - hdma->Instance->CR &= ~(DMA_IT_TC | DMA_IT_TE | DMA_IT_DME); - 8000c32: 687b ldr r3, [r7, #4] - 8000c34: 681b ldr r3, [r3, #0] - 8000c36: 681a ldr r2, [r3, #0] - 8000c38: 687b ldr r3, [r7, #4] - 8000c3a: 681b ldr r3, [r3, #0] - 8000c3c: f022 0216 bic.w r2, r2, #22 - 8000c40: 601a str r2, [r3, #0] - hdma->Instance->FCR &= ~(DMA_IT_FE); - 8000c42: 687b ldr r3, [r7, #4] - 8000c44: 681b ldr r3, [r3, #0] - 8000c46: 695a ldr r2, [r3, #20] - 8000c48: 687b ldr r3, [r7, #4] - 8000c4a: 681b ldr r3, [r3, #0] - 8000c4c: f022 0280 bic.w r2, r2, #128 ; 0x80 - 8000c50: 615a str r2, [r3, #20] - - if((hdma->XferHalfCpltCallback != NULL) || (hdma->XferM1HalfCpltCallback != NULL)) - 8000c52: 687b ldr r3, [r7, #4] - 8000c54: 6c1b ldr r3, [r3, #64] ; 0x40 - 8000c56: 2b00 cmp r3, #0 - 8000c58: d103 bne.n 8000c62 - 8000c5a: 687b ldr r3, [r7, #4] - 8000c5c: 6c9b ldr r3, [r3, #72] ; 0x48 - 8000c5e: 2b00 cmp r3, #0 - 8000c60: d007 beq.n 8000c72 - { - hdma->Instance->CR &= ~(DMA_IT_HT); - 8000c62: 687b ldr r3, [r7, #4] - 8000c64: 681b ldr r3, [r3, #0] - 8000c66: 681a ldr r2, [r3, #0] - 8000c68: 687b ldr r3, [r7, #4] - 8000c6a: 681b ldr r3, [r3, #0] - 8000c6c: f022 0208 bic.w r2, r2, #8 - 8000c70: 601a str r2, [r3, #0] - } + 8000b68: 4618 mov r0, r3 + 8000b6a: 3714 adds r7, #20 + 8000b6c: 46bd mov sp, r7 + 8000b6e: f85d 7b04 ldr.w r7, [sp], #4 + 8000b72: 4770 bx lr - /* Clear all interrupt flags at correct offset within the register */ - regs->IFCR = 0x3FU << hdma->StreamIndex; - 8000c72: 687b ldr r3, [r7, #4] - 8000c74: 6ddb ldr r3, [r3, #92] ; 0x5c - 8000c76: 223f movs r2, #63 ; 0x3f - 8000c78: 409a lsls r2, r3 - 8000c7a: 693b ldr r3, [r7, #16] - 8000c7c: 609a str r2, [r3, #8] +08000b74 <_ZN8std_msgs4Time7getTypeEv>: - /* Process Unlocked */ - __HAL_UNLOCK(hdma); - 8000c7e: 687b ldr r3, [r7, #4] - 8000c80: 2200 movs r2, #0 - 8000c82: f883 2034 strb.w r2, [r3, #52] ; 0x34 + const char * getType(){ return "std_msgs/Time"; }; + 8000b74: b480 push {r7} + 8000b76: b083 sub sp, #12 + 8000b78: af00 add r7, sp, #0 + 8000b7a: 6078 str r0, [r7, #4] + 8000b7c: 4b03 ldr r3, [pc, #12] ; (8000b8c <_ZN8std_msgs4Time7getTypeEv+0x18>) + 8000b7e: 4618 mov r0, r3 + 8000b80: 370c adds r7, #12 + 8000b82: 46bd mov sp, r7 + 8000b84: f85d 7b04 ldr.w r7, [sp], #4 + 8000b88: 4770 bx lr + 8000b8a: bf00 nop + 8000b8c: 0800a160 .word 0x0800a160 + +08000b90 <_ZN8std_msgs4Time6getMD5Ev>: + const char * getMD5(){ return "cd7166c74c552c311fbcc2fe5a7bc289"; }; + 8000b90: b480 push {r7} + 8000b92: b083 sub sp, #12 + 8000b94: af00 add r7, sp, #0 + 8000b96: 6078 str r0, [r7, #4] + 8000b98: 4b03 ldr r3, [pc, #12] ; (8000ba8 <_ZN8std_msgs4Time6getMD5Ev+0x18>) + 8000b9a: 4618 mov r0, r3 + 8000b9c: 370c adds r7, #12 + 8000b9e: 46bd mov sp, r7 + 8000ba0: f85d 7b04 ldr.w r7, [sp], #4 + 8000ba4: 4770 bx lr + 8000ba6: bf00 nop + 8000ba8: 0800a170 .word 0x0800a170 + +08000bac <_ZN14rosserial_msgs9TopicInfoC1Ev>: + enum { ID_PARAMETER_REQUEST = 6 }; + enum { ID_LOG = 7 }; + enum { ID_TIME = 10 }; + enum { ID_TX_STOP = 11 }; - /* Change the DMA state */ - hdma->State = HAL_DMA_STATE_READY; - 8000c86: 687b ldr r3, [r7, #4] - 8000c88: 2201 movs r2, #1 - 8000c8a: f883 2035 strb.w r2, [r3, #53] ; 0x35 + TopicInfo(): + 8000bac: b580 push {r7, lr} + 8000bae: b082 sub sp, #8 + 8000bb0: af00 add r7, sp, #0 + 8000bb2: 6078 str r0, [r7, #4] + topic_id(0), + topic_name(""), + message_type(""), + md5sum(""), + buffer_size(0) + 8000bb4: 687b ldr r3, [r7, #4] + 8000bb6: 4618 mov r0, r3 + 8000bb8: f7ff fe4a bl 8000850 <_ZN3ros3MsgC1Ev> + 8000bbc: 4a0b ldr r2, [pc, #44] ; (8000bec <_ZN14rosserial_msgs9TopicInfoC1Ev+0x40>) + 8000bbe: 687b ldr r3, [r7, #4] + 8000bc0: 601a str r2, [r3, #0] + 8000bc2: 687b ldr r3, [r7, #4] + 8000bc4: 2200 movs r2, #0 + 8000bc6: 809a strh r2, [r3, #4] + 8000bc8: 687b ldr r3, [r7, #4] + 8000bca: 4a09 ldr r2, [pc, #36] ; (8000bf0 <_ZN14rosserial_msgs9TopicInfoC1Ev+0x44>) + 8000bcc: 609a str r2, [r3, #8] + 8000bce: 687b ldr r3, [r7, #4] + 8000bd0: 4a07 ldr r2, [pc, #28] ; (8000bf0 <_ZN14rosserial_msgs9TopicInfoC1Ev+0x44>) + 8000bd2: 60da str r2, [r3, #12] + 8000bd4: 687b ldr r3, [r7, #4] + 8000bd6: 4a06 ldr r2, [pc, #24] ; (8000bf0 <_ZN14rosserial_msgs9TopicInfoC1Ev+0x44>) + 8000bd8: 611a str r2, [r3, #16] + 8000bda: 687b ldr r3, [r7, #4] + 8000bdc: 2200 movs r2, #0 + 8000bde: 615a str r2, [r3, #20] + { + } + 8000be0: 687b ldr r3, [r7, #4] + 8000be2: 4618 mov r0, r3 + 8000be4: 3708 adds r7, #8 + 8000be6: 46bd mov sp, r7 + 8000be8: bd80 pop {r7, pc} + 8000bea: bf00 nop + 8000bec: 0800a5d0 .word 0x0800a5d0 + 8000bf0: 0800a128 .word 0x0800a128 - if(hdma->XferAbortCallback != NULL) - 8000c8e: 687b ldr r3, [r7, #4] - 8000c90: 6d1b ldr r3, [r3, #80] ; 0x50 - 8000c92: 2b00 cmp r3, #0 - 8000c94: d07d beq.n 8000d92 - { - hdma->XferAbortCallback(hdma); - 8000c96: 687b ldr r3, [r7, #4] - 8000c98: 6d1b ldr r3, [r3, #80] ; 0x50 - 8000c9a: 6878 ldr r0, [r7, #4] - 8000c9c: 4798 blx r3 - } - return; - 8000c9e: e078 b.n 8000d92 - } +08000bf4 <_ZNK14rosserial_msgs9TopicInfo9serializeEPh>: - if(((hdma->Instance->CR) & (uint32_t)(DMA_SxCR_DBM)) != RESET) - 8000ca0: 687b ldr r3, [r7, #4] - 8000ca2: 681b ldr r3, [r3, #0] - 8000ca4: 681b ldr r3, [r3, #0] - 8000ca6: f403 2380 and.w r3, r3, #262144 ; 0x40000 - 8000caa: 2b00 cmp r3, #0 - 8000cac: d01c beq.n 8000ce8 - { - /* Current memory buffer used is Memory 0 */ - if((hdma->Instance->CR & DMA_SxCR_CT) == RESET) - 8000cae: 687b ldr r3, [r7, #4] - 8000cb0: 681b ldr r3, [r3, #0] - 8000cb2: 681b ldr r3, [r3, #0] - 8000cb4: f403 2300 and.w r3, r3, #524288 ; 0x80000 - 8000cb8: 2b00 cmp r3, #0 - 8000cba: d108 bne.n 8000cce - { - if(hdma->XferM1CpltCallback != NULL) - 8000cbc: 687b ldr r3, [r7, #4] - 8000cbe: 6c5b ldr r3, [r3, #68] ; 0x44 - 8000cc0: 2b00 cmp r3, #0 - 8000cc2: d030 beq.n 8000d26 - { - /* Transfer complete Callback for memory1 */ - hdma->XferM1CpltCallback(hdma); + virtual int serialize(unsigned char *outbuffer) const + 8000bf4: b580 push {r7, lr} + 8000bf6: b088 sub sp, #32 + 8000bf8: af00 add r7, sp, #0 + 8000bfa: 6078 str r0, [r7, #4] + 8000bfc: 6039 str r1, [r7, #0] + { + int offset = 0; + 8000bfe: 2300 movs r3, #0 + 8000c00: 61fb str r3, [r7, #28] + *(outbuffer + offset + 0) = (this->topic_id >> (8 * 0)) & 0xFF; + 8000c02: 687b ldr r3, [r7, #4] + 8000c04: 8899 ldrh r1, [r3, #4] + 8000c06: 69fb ldr r3, [r7, #28] + 8000c08: 683a ldr r2, [r7, #0] + 8000c0a: 4413 add r3, r2 + 8000c0c: b2ca uxtb r2, r1 + 8000c0e: 701a strb r2, [r3, #0] + *(outbuffer + offset + 1) = (this->topic_id >> (8 * 1)) & 0xFF; + 8000c10: 687b ldr r3, [r7, #4] + 8000c12: 889b ldrh r3, [r3, #4] + 8000c14: 0a1b lsrs r3, r3, #8 + 8000c16: b299 uxth r1, r3 + 8000c18: 69fb ldr r3, [r7, #28] + 8000c1a: 3301 adds r3, #1 + 8000c1c: 683a ldr r2, [r7, #0] + 8000c1e: 4413 add r3, r2 + 8000c20: b2ca uxtb r2, r1 + 8000c22: 701a strb r2, [r3, #0] + offset += sizeof(this->topic_id); + 8000c24: 69fb ldr r3, [r7, #28] + 8000c26: 3302 adds r3, #2 + 8000c28: 61fb str r3, [r7, #28] + uint32_t length_topic_name = strlen(this->topic_name); + 8000c2a: 687b ldr r3, [r7, #4] + 8000c2c: 689b ldr r3, [r3, #8] + 8000c2e: 4618 mov r0, r3 + 8000c30: f7ff fb02 bl 8000238 + 8000c34: 61b8 str r0, [r7, #24] + varToArr(outbuffer + offset, length_topic_name); + 8000c36: 69fb ldr r3, [r7, #28] + 8000c38: 683a ldr r2, [r7, #0] + 8000c3a: 4413 add r3, r2 + 8000c3c: 69b9 ldr r1, [r7, #24] + 8000c3e: 4618 mov r0, r3 + 8000c40: f002 fb31 bl 80032a6 <_ZN3ros3Msg8varToArrIPhmEEvT_T0_> + offset += 4; + 8000c44: 69fb ldr r3, [r7, #28] + 8000c46: 3304 adds r3, #4 + 8000c48: 61fb str r3, [r7, #28] + memcpy(outbuffer + offset, this->topic_name, length_topic_name); + 8000c4a: 69fb ldr r3, [r7, #28] + 8000c4c: 683a ldr r2, [r7, #0] + 8000c4e: 18d0 adds r0, r2, r3 + 8000c50: 687b ldr r3, [r7, #4] + 8000c52: 689b ldr r3, [r3, #8] + 8000c54: 69ba ldr r2, [r7, #24] + 8000c56: 4619 mov r1, r3 + 8000c58: f009 f912 bl 8009e80 + offset += length_topic_name; + 8000c5c: 69fa ldr r2, [r7, #28] + 8000c5e: 69bb ldr r3, [r7, #24] + 8000c60: 4413 add r3, r2 + 8000c62: 61fb str r3, [r7, #28] + uint32_t length_message_type = strlen(this->message_type); + 8000c64: 687b ldr r3, [r7, #4] + 8000c66: 68db ldr r3, [r3, #12] + 8000c68: 4618 mov r0, r3 + 8000c6a: f7ff fae5 bl 8000238 + 8000c6e: 6178 str r0, [r7, #20] + varToArr(outbuffer + offset, length_message_type); + 8000c70: 69fb ldr r3, [r7, #28] + 8000c72: 683a ldr r2, [r7, #0] + 8000c74: 4413 add r3, r2 + 8000c76: 6979 ldr r1, [r7, #20] + 8000c78: 4618 mov r0, r3 + 8000c7a: f002 fb14 bl 80032a6 <_ZN3ros3Msg8varToArrIPhmEEvT_T0_> + offset += 4; + 8000c7e: 69fb ldr r3, [r7, #28] + 8000c80: 3304 adds r3, #4 + 8000c82: 61fb str r3, [r7, #28] + memcpy(outbuffer + offset, this->message_type, length_message_type); + 8000c84: 69fb ldr r3, [r7, #28] + 8000c86: 683a ldr r2, [r7, #0] + 8000c88: 18d0 adds r0, r2, r3 + 8000c8a: 687b ldr r3, [r7, #4] + 8000c8c: 68db ldr r3, [r3, #12] + 8000c8e: 697a ldr r2, [r7, #20] + 8000c90: 4619 mov r1, r3 + 8000c92: f009 f8f5 bl 8009e80 + offset += length_message_type; + 8000c96: 69fa ldr r2, [r7, #28] + 8000c98: 697b ldr r3, [r7, #20] + 8000c9a: 4413 add r3, r2 + 8000c9c: 61fb str r3, [r7, #28] + uint32_t length_md5sum = strlen(this->md5sum); + 8000c9e: 687b ldr r3, [r7, #4] + 8000ca0: 691b ldr r3, [r3, #16] + 8000ca2: 4618 mov r0, r3 + 8000ca4: f7ff fac8 bl 8000238 + 8000ca8: 6138 str r0, [r7, #16] + varToArr(outbuffer + offset, length_md5sum); + 8000caa: 69fb ldr r3, [r7, #28] + 8000cac: 683a ldr r2, [r7, #0] + 8000cae: 4413 add r3, r2 + 8000cb0: 6939 ldr r1, [r7, #16] + 8000cb2: 4618 mov r0, r3 + 8000cb4: f002 faf7 bl 80032a6 <_ZN3ros3Msg8varToArrIPhmEEvT_T0_> + offset += 4; + 8000cb8: 69fb ldr r3, [r7, #28] + 8000cba: 3304 adds r3, #4 + 8000cbc: 61fb str r3, [r7, #28] + memcpy(outbuffer + offset, this->md5sum, length_md5sum); + 8000cbe: 69fb ldr r3, [r7, #28] + 8000cc0: 683a ldr r2, [r7, #0] + 8000cc2: 18d0 adds r0, r2, r3 8000cc4: 687b ldr r3, [r7, #4] - 8000cc6: 6c5b ldr r3, [r3, #68] ; 0x44 - 8000cc8: 6878 ldr r0, [r7, #4] - 8000cca: 4798 blx r3 - 8000ccc: e02b b.n 8000d26 - } - } - /* Current memory buffer used is Memory 1 */ - else - { - if(hdma->XferCpltCallback != NULL) - 8000cce: 687b ldr r3, [r7, #4] - 8000cd0: 6bdb ldr r3, [r3, #60] ; 0x3c - 8000cd2: 2b00 cmp r3, #0 - 8000cd4: d027 beq.n 8000d26 - { - /* Transfer complete Callback for memory0 */ - hdma->XferCpltCallback(hdma); - 8000cd6: 687b ldr r3, [r7, #4] - 8000cd8: 6bdb ldr r3, [r3, #60] ; 0x3c - 8000cda: 6878 ldr r0, [r7, #4] - 8000cdc: 4798 blx r3 - 8000cde: e022 b.n 8000d26 - 8000ce0: 20000018 .word 0x20000018 - 8000ce4: 1b4e81b5 .word 0x1b4e81b5 - } - } - /* Disable the transfer complete interrupt if the DMA mode is not CIRCULAR */ - else - { - if((hdma->Instance->CR & DMA_SxCR_CIRC) == RESET) - 8000ce8: 687b ldr r3, [r7, #4] - 8000cea: 681b ldr r3, [r3, #0] - 8000cec: 681b ldr r3, [r3, #0] - 8000cee: f403 7380 and.w r3, r3, #256 ; 0x100 - 8000cf2: 2b00 cmp r3, #0 - 8000cf4: d10f bne.n 8000d16 - { - /* Disable the transfer complete interrupt */ - hdma->Instance->CR &= ~(DMA_IT_TC); - 8000cf6: 687b ldr r3, [r7, #4] - 8000cf8: 681b ldr r3, [r3, #0] - 8000cfa: 681a ldr r2, [r3, #0] - 8000cfc: 687b ldr r3, [r7, #4] - 8000cfe: 681b ldr r3, [r3, #0] - 8000d00: f022 0210 bic.w r2, r2, #16 - 8000d04: 601a str r2, [r3, #0] - - /* Process Unlocked */ - __HAL_UNLOCK(hdma); - 8000d06: 687b ldr r3, [r7, #4] - 8000d08: 2200 movs r2, #0 - 8000d0a: f883 2034 strb.w r2, [r3, #52] ; 0x34 + 8000cc6: 691b ldr r3, [r3, #16] + 8000cc8: 693a ldr r2, [r7, #16] + 8000cca: 4619 mov r1, r3 + 8000ccc: f009 f8d8 bl 8009e80 + offset += length_md5sum; + 8000cd0: 69fa ldr r2, [r7, #28] + 8000cd2: 693b ldr r3, [r7, #16] + 8000cd4: 4413 add r3, r2 + 8000cd6: 61fb str r3, [r7, #28] + union { + int32_t real; + uint32_t base; + } u_buffer_size; + u_buffer_size.real = this->buffer_size; + 8000cd8: 687b ldr r3, [r7, #4] + 8000cda: 695b ldr r3, [r3, #20] + 8000cdc: 60fb str r3, [r7, #12] + *(outbuffer + offset + 0) = (u_buffer_size.base >> (8 * 0)) & 0xFF; + 8000cde: 68f9 ldr r1, [r7, #12] + 8000ce0: 69fb ldr r3, [r7, #28] + 8000ce2: 683a ldr r2, [r7, #0] + 8000ce4: 4413 add r3, r2 + 8000ce6: b2ca uxtb r2, r1 + 8000ce8: 701a strb r2, [r3, #0] + *(outbuffer + offset + 1) = (u_buffer_size.base >> (8 * 1)) & 0xFF; + 8000cea: 68fb ldr r3, [r7, #12] + 8000cec: 0a19 lsrs r1, r3, #8 + 8000cee: 69fb ldr r3, [r7, #28] + 8000cf0: 3301 adds r3, #1 + 8000cf2: 683a ldr r2, [r7, #0] + 8000cf4: 4413 add r3, r2 + 8000cf6: b2ca uxtb r2, r1 + 8000cf8: 701a strb r2, [r3, #0] + *(outbuffer + offset + 2) = (u_buffer_size.base >> (8 * 2)) & 0xFF; + 8000cfa: 68fb ldr r3, [r7, #12] + 8000cfc: 0c19 lsrs r1, r3, #16 + 8000cfe: 69fb ldr r3, [r7, #28] + 8000d00: 3302 adds r3, #2 + 8000d02: 683a ldr r2, [r7, #0] + 8000d04: 4413 add r3, r2 + 8000d06: b2ca uxtb r2, r1 + 8000d08: 701a strb r2, [r3, #0] + *(outbuffer + offset + 3) = (u_buffer_size.base >> (8 * 3)) & 0xFF; + 8000d0a: 68fb ldr r3, [r7, #12] + 8000d0c: 0e19 lsrs r1, r3, #24 + 8000d0e: 69fb ldr r3, [r7, #28] + 8000d10: 3303 adds r3, #3 + 8000d12: 683a ldr r2, [r7, #0] + 8000d14: 4413 add r3, r2 + 8000d16: b2ca uxtb r2, r1 + 8000d18: 701a strb r2, [r3, #0] + offset += sizeof(this->buffer_size); + 8000d1a: 69fb ldr r3, [r7, #28] + 8000d1c: 3304 adds r3, #4 + 8000d1e: 61fb str r3, [r7, #28] + return offset; + 8000d20: 69fb ldr r3, [r7, #28] + } + 8000d22: 4618 mov r0, r3 + 8000d24: 3720 adds r7, #32 + 8000d26: 46bd mov sp, r7 + 8000d28: bd80 pop {r7, pc} - /* Change the DMA state */ - hdma->State = HAL_DMA_STATE_READY; - 8000d0e: 687b ldr r3, [r7, #4] - 8000d10: 2201 movs r2, #1 - 8000d12: f883 2035 strb.w r2, [r3, #53] ; 0x35 - } +08000d2a <_ZN14rosserial_msgs9TopicInfo11deserializeEPh>: - if(hdma->XferCpltCallback != NULL) - 8000d16: 687b ldr r3, [r7, #4] - 8000d18: 6bdb ldr r3, [r3, #60] ; 0x3c - 8000d1a: 2b00 cmp r3, #0 - 8000d1c: d003 beq.n 8000d26 - { - /* Transfer complete callback */ - hdma->XferCpltCallback(hdma); - 8000d1e: 687b ldr r3, [r7, #4] - 8000d20: 6bdb ldr r3, [r3, #60] ; 0x3c - 8000d22: 6878 ldr r0, [r7, #4] - 8000d24: 4798 blx r3 - } - } - } - - /* manage error case */ - if(hdma->ErrorCode != HAL_DMA_ERROR_NONE) - 8000d26: 687b ldr r3, [r7, #4] - 8000d28: 6d5b ldr r3, [r3, #84] ; 0x54 - 8000d2a: 2b00 cmp r3, #0 - 8000d2c: d032 beq.n 8000d94 - { - if((hdma->ErrorCode & HAL_DMA_ERROR_TE) != RESET) - 8000d2e: 687b ldr r3, [r7, #4] - 8000d30: 6d5b ldr r3, [r3, #84] ; 0x54 - 8000d32: f003 0301 and.w r3, r3, #1 - 8000d36: 2b00 cmp r3, #0 - 8000d38: d022 beq.n 8000d80 + virtual int deserialize(unsigned char *inbuffer) + 8000d2a: b580 push {r7, lr} + 8000d2c: b08a sub sp, #40 ; 0x28 + 8000d2e: af00 add r7, sp, #0 + 8000d30: 6078 str r0, [r7, #4] + 8000d32: 6039 str r1, [r7, #0] { - hdma->State = HAL_DMA_STATE_ABORT; - 8000d3a: 687b ldr r3, [r7, #4] - 8000d3c: 2205 movs r2, #5 - 8000d3e: f883 2035 strb.w r2, [r3, #53] ; 0x35 - - /* Disable the stream */ - __HAL_DMA_DISABLE(hdma); + int offset = 0; + 8000d34: 2300 movs r3, #0 + 8000d36: 61bb str r3, [r7, #24] + this->topic_id = ((uint16_t) (*(inbuffer + offset))); + 8000d38: 69bb ldr r3, [r7, #24] + 8000d3a: 683a ldr r2, [r7, #0] + 8000d3c: 4413 add r3, r2 + 8000d3e: 781b ldrb r3, [r3, #0] + 8000d40: b29a uxth r2, r3 8000d42: 687b ldr r3, [r7, #4] - 8000d44: 681b ldr r3, [r3, #0] - 8000d46: 681a ldr r2, [r3, #0] - 8000d48: 687b ldr r3, [r7, #4] - 8000d4a: 681b ldr r3, [r3, #0] - 8000d4c: f022 0201 bic.w r2, r2, #1 - 8000d50: 601a str r2, [r3, #0] - - do - { - if (++count > timeout) - 8000d52: 68bb ldr r3, [r7, #8] - 8000d54: 3301 adds r3, #1 - 8000d56: 60bb str r3, [r7, #8] - 8000d58: 697a ldr r2, [r7, #20] - 8000d5a: 429a cmp r2, r3 - 8000d5c: d307 bcc.n 8000d6e - { - break; - } + 8000d44: 809a strh r2, [r3, #4] + this->topic_id |= ((uint16_t) (*(inbuffer + offset + 1))) << (8 * 1); + 8000d46: 687b ldr r3, [r7, #4] + 8000d48: 889b ldrh r3, [r3, #4] + 8000d4a: b21a sxth r2, r3 + 8000d4c: 69bb ldr r3, [r7, #24] + 8000d4e: 3301 adds r3, #1 + 8000d50: 6839 ldr r1, [r7, #0] + 8000d52: 440b add r3, r1 + 8000d54: 781b ldrb r3, [r3, #0] + 8000d56: 021b lsls r3, r3, #8 + 8000d58: b21b sxth r3, r3 + 8000d5a: 4313 orrs r3, r2 + 8000d5c: b21b sxth r3, r3 + 8000d5e: b29a uxth r2, r3 + 8000d60: 687b ldr r3, [r7, #4] + 8000d62: 809a strh r2, [r3, #4] + offset += sizeof(this->topic_id); + 8000d64: 69bb ldr r3, [r7, #24] + 8000d66: 3302 adds r3, #2 + 8000d68: 61bb str r3, [r7, #24] + uint32_t length_topic_name; + arrToVar(length_topic_name, (inbuffer + offset)); + 8000d6a: 69bb ldr r3, [r7, #24] + 8000d6c: 683a ldr r2, [r7, #0] + 8000d6e: 441a add r2, r3 + 8000d70: f107 0314 add.w r3, r7, #20 + 8000d74: 4611 mov r1, r2 + 8000d76: 4618 mov r0, r3 + 8000d78: f002 fab3 bl 80032e2 <_ZN3ros3Msg8arrToVarImPhEEvRT_T0_> + offset += 4; + 8000d7c: 69bb ldr r3, [r7, #24] + 8000d7e: 3304 adds r3, #4 + 8000d80: 61bb str r3, [r7, #24] + for(unsigned int k= offset; k< offset+length_topic_name; ++k){ + 8000d82: 69bb ldr r3, [r7, #24] + 8000d84: 627b str r3, [r7, #36] ; 0x24 + 8000d86: 69ba ldr r2, [r7, #24] + 8000d88: 697b ldr r3, [r7, #20] + 8000d8a: 4413 add r3, r2 + 8000d8c: 6a7a ldr r2, [r7, #36] ; 0x24 + 8000d8e: 429a cmp r2, r3 + 8000d90: d20c bcs.n 8000dac <_ZN14rosserial_msgs9TopicInfo11deserializeEPh+0x82> + inbuffer[k-1]=inbuffer[k]; + 8000d92: 683a ldr r2, [r7, #0] + 8000d94: 6a7b ldr r3, [r7, #36] ; 0x24 + 8000d96: 441a add r2, r3 + 8000d98: 6a7b ldr r3, [r7, #36] ; 0x24 + 8000d9a: 3b01 subs r3, #1 + 8000d9c: 6839 ldr r1, [r7, #0] + 8000d9e: 440b add r3, r1 + 8000da0: 7812 ldrb r2, [r2, #0] + 8000da2: 701a strb r2, [r3, #0] + for(unsigned int k= offset; k< offset+length_topic_name; ++k){ + 8000da4: 6a7b ldr r3, [r7, #36] ; 0x24 + 8000da6: 3301 adds r3, #1 + 8000da8: 627b str r3, [r7, #36] ; 0x24 + 8000daa: e7ec b.n 8000d86 <_ZN14rosserial_msgs9TopicInfo11deserializeEPh+0x5c> } - while((hdma->Instance->CR & DMA_SxCR_EN) != RESET); - 8000d5e: 687b ldr r3, [r7, #4] - 8000d60: 681b ldr r3, [r3, #0] - 8000d62: 681b ldr r3, [r3, #0] - 8000d64: f003 0301 and.w r3, r3, #1 - 8000d68: 2b00 cmp r3, #0 - 8000d6a: d1f2 bne.n 8000d52 - 8000d6c: e000 b.n 8000d70 - break; - 8000d6e: bf00 nop + inbuffer[offset+length_topic_name-1]=0; + 8000dac: 69ba ldr r2, [r7, #24] + 8000dae: 697b ldr r3, [r7, #20] + 8000db0: 4413 add r3, r2 + 8000db2: 3b01 subs r3, #1 + 8000db4: 683a ldr r2, [r7, #0] + 8000db6: 4413 add r3, r2 + 8000db8: 2200 movs r2, #0 + 8000dba: 701a strb r2, [r3, #0] + this->topic_name = (char *)(inbuffer + offset-1); + 8000dbc: 69bb ldr r3, [r7, #24] + 8000dbe: 3b01 subs r3, #1 + 8000dc0: 683a ldr r2, [r7, #0] + 8000dc2: 441a add r2, r3 + 8000dc4: 687b ldr r3, [r7, #4] + 8000dc6: 609a str r2, [r3, #8] + offset += length_topic_name; + 8000dc8: 69ba ldr r2, [r7, #24] + 8000dca: 697b ldr r3, [r7, #20] + 8000dcc: 4413 add r3, r2 + 8000dce: 61bb str r3, [r7, #24] + uint32_t length_message_type; + arrToVar(length_message_type, (inbuffer + offset)); + 8000dd0: 69bb ldr r3, [r7, #24] + 8000dd2: 683a ldr r2, [r7, #0] + 8000dd4: 441a add r2, r3 + 8000dd6: f107 0310 add.w r3, r7, #16 + 8000dda: 4611 mov r1, r2 + 8000ddc: 4618 mov r0, r3 + 8000dde: f002 fa80 bl 80032e2 <_ZN3ros3Msg8arrToVarImPhEEvRT_T0_> + offset += 4; + 8000de2: 69bb ldr r3, [r7, #24] + 8000de4: 3304 adds r3, #4 + 8000de6: 61bb str r3, [r7, #24] + for(unsigned int k= offset; k< offset+length_message_type; ++k){ + 8000de8: 69bb ldr r3, [r7, #24] + 8000dea: 623b str r3, [r7, #32] + 8000dec: 69ba ldr r2, [r7, #24] + 8000dee: 693b ldr r3, [r7, #16] + 8000df0: 4413 add r3, r2 + 8000df2: 6a3a ldr r2, [r7, #32] + 8000df4: 429a cmp r2, r3 + 8000df6: d20c bcs.n 8000e12 <_ZN14rosserial_msgs9TopicInfo11deserializeEPh+0xe8> + inbuffer[k-1]=inbuffer[k]; + 8000df8: 683a ldr r2, [r7, #0] + 8000dfa: 6a3b ldr r3, [r7, #32] + 8000dfc: 441a add r2, r3 + 8000dfe: 6a3b ldr r3, [r7, #32] + 8000e00: 3b01 subs r3, #1 + 8000e02: 6839 ldr r1, [r7, #0] + 8000e04: 440b add r3, r1 + 8000e06: 7812 ldrb r2, [r2, #0] + 8000e08: 701a strb r2, [r3, #0] + for(unsigned int k= offset; k< offset+length_message_type; ++k){ + 8000e0a: 6a3b ldr r3, [r7, #32] + 8000e0c: 3301 adds r3, #1 + 8000e0e: 623b str r3, [r7, #32] + 8000e10: e7ec b.n 8000dec <_ZN14rosserial_msgs9TopicInfo11deserializeEPh+0xc2> + } + inbuffer[offset+length_message_type-1]=0; + 8000e12: 69ba ldr r2, [r7, #24] + 8000e14: 693b ldr r3, [r7, #16] + 8000e16: 4413 add r3, r2 + 8000e18: 3b01 subs r3, #1 + 8000e1a: 683a ldr r2, [r7, #0] + 8000e1c: 4413 add r3, r2 + 8000e1e: 2200 movs r2, #0 + 8000e20: 701a strb r2, [r3, #0] + this->message_type = (char *)(inbuffer + offset-1); + 8000e22: 69bb ldr r3, [r7, #24] + 8000e24: 3b01 subs r3, #1 + 8000e26: 683a ldr r2, [r7, #0] + 8000e28: 441a add r2, r3 + 8000e2a: 687b ldr r3, [r7, #4] + 8000e2c: 60da str r2, [r3, #12] + offset += length_message_type; + 8000e2e: 69ba ldr r2, [r7, #24] + 8000e30: 693b ldr r3, [r7, #16] + 8000e32: 4413 add r3, r2 + 8000e34: 61bb str r3, [r7, #24] + uint32_t length_md5sum; + arrToVar(length_md5sum, (inbuffer + offset)); + 8000e36: 69bb ldr r3, [r7, #24] + 8000e38: 683a ldr r2, [r7, #0] + 8000e3a: 441a add r2, r3 + 8000e3c: f107 030c add.w r3, r7, #12 + 8000e40: 4611 mov r1, r2 + 8000e42: 4618 mov r0, r3 + 8000e44: f002 fa4d bl 80032e2 <_ZN3ros3Msg8arrToVarImPhEEvRT_T0_> + offset += 4; + 8000e48: 69bb ldr r3, [r7, #24] + 8000e4a: 3304 adds r3, #4 + 8000e4c: 61bb str r3, [r7, #24] + for(unsigned int k= offset; k< offset+length_md5sum; ++k){ + 8000e4e: 69bb ldr r3, [r7, #24] + 8000e50: 61fb str r3, [r7, #28] + 8000e52: 69ba ldr r2, [r7, #24] + 8000e54: 68fb ldr r3, [r7, #12] + 8000e56: 4413 add r3, r2 + 8000e58: 69fa ldr r2, [r7, #28] + 8000e5a: 429a cmp r2, r3 + 8000e5c: d20c bcs.n 8000e78 <_ZN14rosserial_msgs9TopicInfo11deserializeEPh+0x14e> + inbuffer[k-1]=inbuffer[k]; + 8000e5e: 683a ldr r2, [r7, #0] + 8000e60: 69fb ldr r3, [r7, #28] + 8000e62: 441a add r2, r3 + 8000e64: 69fb ldr r3, [r7, #28] + 8000e66: 3b01 subs r3, #1 + 8000e68: 6839 ldr r1, [r7, #0] + 8000e6a: 440b add r3, r1 + 8000e6c: 7812 ldrb r2, [r2, #0] + 8000e6e: 701a strb r2, [r3, #0] + for(unsigned int k= offset; k< offset+length_md5sum; ++k){ + 8000e70: 69fb ldr r3, [r7, #28] + 8000e72: 3301 adds r3, #1 + 8000e74: 61fb str r3, [r7, #28] + 8000e76: e7ec b.n 8000e52 <_ZN14rosserial_msgs9TopicInfo11deserializeEPh+0x128> + } + inbuffer[offset+length_md5sum-1]=0; + 8000e78: 69ba ldr r2, [r7, #24] + 8000e7a: 68fb ldr r3, [r7, #12] + 8000e7c: 4413 add r3, r2 + 8000e7e: 3b01 subs r3, #1 + 8000e80: 683a ldr r2, [r7, #0] + 8000e82: 4413 add r3, r2 + 8000e84: 2200 movs r2, #0 + 8000e86: 701a strb r2, [r3, #0] + this->md5sum = (char *)(inbuffer + offset-1); + 8000e88: 69bb ldr r3, [r7, #24] + 8000e8a: 3b01 subs r3, #1 + 8000e8c: 683a ldr r2, [r7, #0] + 8000e8e: 441a add r2, r3 + 8000e90: 687b ldr r3, [r7, #4] + 8000e92: 611a str r2, [r3, #16] + offset += length_md5sum; + 8000e94: 69ba ldr r2, [r7, #24] + 8000e96: 68fb ldr r3, [r7, #12] + 8000e98: 4413 add r3, r2 + 8000e9a: 61bb str r3, [r7, #24] + union { + int32_t real; + uint32_t base; + } u_buffer_size; + u_buffer_size.base = 0; + 8000e9c: 2300 movs r3, #0 + 8000e9e: 60bb str r3, [r7, #8] + u_buffer_size.base |= ((uint32_t) (*(inbuffer + offset + 0))) << (8 * 0); + 8000ea0: 68bb ldr r3, [r7, #8] + 8000ea2: 69ba ldr r2, [r7, #24] + 8000ea4: 6839 ldr r1, [r7, #0] + 8000ea6: 440a add r2, r1 + 8000ea8: 7812 ldrb r2, [r2, #0] + 8000eaa: 4313 orrs r3, r2 + 8000eac: 60bb str r3, [r7, #8] + u_buffer_size.base |= ((uint32_t) (*(inbuffer + offset + 1))) << (8 * 1); + 8000eae: 68ba ldr r2, [r7, #8] + 8000eb0: 69bb ldr r3, [r7, #24] + 8000eb2: 3301 adds r3, #1 + 8000eb4: 6839 ldr r1, [r7, #0] + 8000eb6: 440b add r3, r1 + 8000eb8: 781b ldrb r3, [r3, #0] + 8000eba: 021b lsls r3, r3, #8 + 8000ebc: 4313 orrs r3, r2 + 8000ebe: 60bb str r3, [r7, #8] + u_buffer_size.base |= ((uint32_t) (*(inbuffer + offset + 2))) << (8 * 2); + 8000ec0: 68ba ldr r2, [r7, #8] + 8000ec2: 69bb ldr r3, [r7, #24] + 8000ec4: 3302 adds r3, #2 + 8000ec6: 6839 ldr r1, [r7, #0] + 8000ec8: 440b add r3, r1 + 8000eca: 781b ldrb r3, [r3, #0] + 8000ecc: 041b lsls r3, r3, #16 + 8000ece: 4313 orrs r3, r2 + 8000ed0: 60bb str r3, [r7, #8] + u_buffer_size.base |= ((uint32_t) (*(inbuffer + offset + 3))) << (8 * 3); + 8000ed2: 68ba ldr r2, [r7, #8] + 8000ed4: 69bb ldr r3, [r7, #24] + 8000ed6: 3303 adds r3, #3 + 8000ed8: 6839 ldr r1, [r7, #0] + 8000eda: 440b add r3, r1 + 8000edc: 781b ldrb r3, [r3, #0] + 8000ede: 061b lsls r3, r3, #24 + 8000ee0: 4313 orrs r3, r2 + 8000ee2: 60bb str r3, [r7, #8] + this->buffer_size = u_buffer_size.real; + 8000ee4: 68ba ldr r2, [r7, #8] + 8000ee6: 687b ldr r3, [r7, #4] + 8000ee8: 615a str r2, [r3, #20] + offset += sizeof(this->buffer_size); + 8000eea: 69bb ldr r3, [r7, #24] + 8000eec: 3304 adds r3, #4 + 8000eee: 61bb str r3, [r7, #24] + return offset; + 8000ef0: 69bb ldr r3, [r7, #24] + } + 8000ef2: 4618 mov r0, r3 + 8000ef4: 3728 adds r7, #40 ; 0x28 + 8000ef6: 46bd mov sp, r7 + 8000ef8: bd80 pop {r7, pc} + ... - /* Process Unlocked */ - __HAL_UNLOCK(hdma); - 8000d70: 687b ldr r3, [r7, #4] - 8000d72: 2200 movs r2, #0 - 8000d74: f883 2034 strb.w r2, [r3, #52] ; 0x34 +08000efc <_ZN14rosserial_msgs9TopicInfo7getTypeEv>: - /* Change the DMA state */ - hdma->State = HAL_DMA_STATE_READY; - 8000d78: 687b ldr r3, [r7, #4] - 8000d7a: 2201 movs r2, #1 - 8000d7c: f883 2035 strb.w r2, [r3, #53] ; 0x35 + const char * getType(){ return "rosserial_msgs/TopicInfo"; }; + 8000efc: b480 push {r7} + 8000efe: b083 sub sp, #12 + 8000f00: af00 add r7, sp, #0 + 8000f02: 6078 str r0, [r7, #4] + 8000f04: 4b03 ldr r3, [pc, #12] ; (8000f14 <_ZN14rosserial_msgs9TopicInfo7getTypeEv+0x18>) + 8000f06: 4618 mov r0, r3 + 8000f08: 370c adds r7, #12 + 8000f0a: 46bd mov sp, r7 + 8000f0c: f85d 7b04 ldr.w r7, [sp], #4 + 8000f10: 4770 bx lr + 8000f12: bf00 nop + 8000f14: 0800a194 .word 0x0800a194 + +08000f18 <_ZN14rosserial_msgs9TopicInfo6getMD5Ev>: + const char * getMD5(){ return "0ad51f88fc44892f8c10684077646005"; }; + 8000f18: b480 push {r7} + 8000f1a: b083 sub sp, #12 + 8000f1c: af00 add r7, sp, #0 + 8000f1e: 6078 str r0, [r7, #4] + 8000f20: 4b03 ldr r3, [pc, #12] ; (8000f30 <_ZN14rosserial_msgs9TopicInfo6getMD5Ev+0x18>) + 8000f22: 4618 mov r0, r3 + 8000f24: 370c adds r7, #12 + 8000f26: 46bd mov sp, r7 + 8000f28: f85d 7b04 ldr.w r7, [sp], #4 + 8000f2c: 4770 bx lr + 8000f2e: bf00 nop + 8000f30: 0800a1b0 .word 0x0800a1b0 + +08000f34 <_ZN14rosserial_msgs3LogC1Ev>: + enum { INFO = 1 }; + enum { WARN = 2 }; + enum { ERROR = 3 }; + enum { FATAL = 4 }; + + Log(): + 8000f34: b580 push {r7, lr} + 8000f36: b082 sub sp, #8 + 8000f38: af00 add r7, sp, #0 + 8000f3a: 6078 str r0, [r7, #4] + level(0), + msg("") + 8000f3c: 687b ldr r3, [r7, #4] + 8000f3e: 4618 mov r0, r3 + 8000f40: f7ff fc86 bl 8000850 <_ZN3ros3MsgC1Ev> + 8000f44: 4a06 ldr r2, [pc, #24] ; (8000f60 <_ZN14rosserial_msgs3LogC1Ev+0x2c>) + 8000f46: 687b ldr r3, [r7, #4] + 8000f48: 601a str r2, [r3, #0] + 8000f4a: 687b ldr r3, [r7, #4] + 8000f4c: 2200 movs r2, #0 + 8000f4e: 711a strb r2, [r3, #4] + 8000f50: 687b ldr r3, [r7, #4] + 8000f52: 4a04 ldr r2, [pc, #16] ; (8000f64 <_ZN14rosserial_msgs3LogC1Ev+0x30>) + 8000f54: 609a str r2, [r3, #8] + { } + 8000f56: 687b ldr r3, [r7, #4] + 8000f58: 4618 mov r0, r3 + 8000f5a: 3708 adds r7, #8 + 8000f5c: 46bd mov sp, r7 + 8000f5e: bd80 pop {r7, pc} + 8000f60: 0800a5b8 .word 0x0800a5b8 + 8000f64: 0800a128 .word 0x0800a128 - if(hdma->XferErrorCallback != NULL) - 8000d80: 687b ldr r3, [r7, #4] - 8000d82: 6cdb ldr r3, [r3, #76] ; 0x4c - 8000d84: 2b00 cmp r3, #0 - 8000d86: d005 beq.n 8000d94 +08000f68 <_ZNK14rosserial_msgs3Log9serializeEPh>: + + virtual int serialize(unsigned char *outbuffer) const + 8000f68: b580 push {r7, lr} + 8000f6a: b084 sub sp, #16 + 8000f6c: af00 add r7, sp, #0 + 8000f6e: 6078 str r0, [r7, #4] + 8000f70: 6039 str r1, [r7, #0] { - /* Transfer error callback */ - hdma->XferErrorCallback(hdma); - 8000d88: 687b ldr r3, [r7, #4] - 8000d8a: 6cdb ldr r3, [r3, #76] ; 0x4c - 8000d8c: 6878 ldr r0, [r7, #4] - 8000d8e: 4798 blx r3 - 8000d90: e000 b.n 8000d94 - return; - 8000d92: bf00 nop + int offset = 0; + 8000f72: 2300 movs r3, #0 + 8000f74: 60fb str r3, [r7, #12] + *(outbuffer + offset + 0) = (this->level >> (8 * 0)) & 0xFF; + 8000f76: 68fb ldr r3, [r7, #12] + 8000f78: 683a ldr r2, [r7, #0] + 8000f7a: 4413 add r3, r2 + 8000f7c: 687a ldr r2, [r7, #4] + 8000f7e: 7912 ldrb r2, [r2, #4] + 8000f80: 701a strb r2, [r3, #0] + offset += sizeof(this->level); + 8000f82: 68fb ldr r3, [r7, #12] + 8000f84: 3301 adds r3, #1 + 8000f86: 60fb str r3, [r7, #12] + uint32_t length_msg = strlen(this->msg); + 8000f88: 687b ldr r3, [r7, #4] + 8000f8a: 689b ldr r3, [r3, #8] + 8000f8c: 4618 mov r0, r3 + 8000f8e: f7ff f953 bl 8000238 + 8000f92: 60b8 str r0, [r7, #8] + varToArr(outbuffer + offset, length_msg); + 8000f94: 68fb ldr r3, [r7, #12] + 8000f96: 683a ldr r2, [r7, #0] + 8000f98: 4413 add r3, r2 + 8000f9a: 68b9 ldr r1, [r7, #8] + 8000f9c: 4618 mov r0, r3 + 8000f9e: f002 f982 bl 80032a6 <_ZN3ros3Msg8varToArrIPhmEEvT_T0_> + offset += 4; + 8000fa2: 68fb ldr r3, [r7, #12] + 8000fa4: 3304 adds r3, #4 + 8000fa6: 60fb str r3, [r7, #12] + memcpy(outbuffer + offset, this->msg, length_msg); + 8000fa8: 68fb ldr r3, [r7, #12] + 8000faa: 683a ldr r2, [r7, #0] + 8000fac: 18d0 adds r0, r2, r3 + 8000fae: 687b ldr r3, [r7, #4] + 8000fb0: 689b ldr r3, [r3, #8] + 8000fb2: 68ba ldr r2, [r7, #8] + 8000fb4: 4619 mov r1, r3 + 8000fb6: f008 ff63 bl 8009e80 + offset += length_msg; + 8000fba: 68fa ldr r2, [r7, #12] + 8000fbc: 68bb ldr r3, [r7, #8] + 8000fbe: 4413 add r3, r2 + 8000fc0: 60fb str r3, [r7, #12] + return offset; + 8000fc2: 68fb ldr r3, [r7, #12] } - } -} - 8000d94: 3718 adds r7, #24 - 8000d96: 46bd mov sp, r7 - 8000d98: bd80 pop {r7, pc} - 8000d9a: bf00 nop + 8000fc4: 4618 mov r0, r3 + 8000fc6: 3710 adds r7, #16 + 8000fc8: 46bd mov sp, r7 + 8000fca: bd80 pop {r7, pc} -08000d9c : - * @param DstAddress The destination memory Buffer address - * @param DataLength The length of data to be transferred from source to destination - * @retval HAL status - */ -static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) -{ - 8000d9c: b480 push {r7} - 8000d9e: b085 sub sp, #20 - 8000da0: af00 add r7, sp, #0 - 8000da2: 60f8 str r0, [r7, #12] - 8000da4: 60b9 str r1, [r7, #8] - 8000da6: 607a str r2, [r7, #4] - 8000da8: 603b str r3, [r7, #0] - /* Clear DBM bit */ - hdma->Instance->CR &= (uint32_t)(~DMA_SxCR_DBM); - 8000daa: 68fb ldr r3, [r7, #12] - 8000dac: 681b ldr r3, [r3, #0] - 8000dae: 681a ldr r2, [r3, #0] - 8000db0: 68fb ldr r3, [r7, #12] - 8000db2: 681b ldr r3, [r3, #0] - 8000db4: f422 2280 bic.w r2, r2, #262144 ; 0x40000 - 8000db8: 601a str r2, [r3, #0] +08000fcc <_ZN14rosserial_msgs3Log11deserializeEPh>: - /* Configure DMA Stream data length */ - hdma->Instance->NDTR = DataLength; - 8000dba: 68fb ldr r3, [r7, #12] - 8000dbc: 681b ldr r3, [r3, #0] - 8000dbe: 683a ldr r2, [r7, #0] - 8000dc0: 605a str r2, [r3, #4] + virtual int deserialize(unsigned char *inbuffer) + 8000fcc: b580 push {r7, lr} + 8000fce: b086 sub sp, #24 + 8000fd0: af00 add r7, sp, #0 + 8000fd2: 6078 str r0, [r7, #4] + 8000fd4: 6039 str r1, [r7, #0] + { + int offset = 0; + 8000fd6: 2300 movs r3, #0 + 8000fd8: 613b str r3, [r7, #16] + this->level = ((uint8_t) (*(inbuffer + offset))); + 8000fda: 693b ldr r3, [r7, #16] + 8000fdc: 683a ldr r2, [r7, #0] + 8000fde: 4413 add r3, r2 + 8000fe0: 781a ldrb r2, [r3, #0] + 8000fe2: 687b ldr r3, [r7, #4] + 8000fe4: 711a strb r2, [r3, #4] + offset += sizeof(this->level); + 8000fe6: 693b ldr r3, [r7, #16] + 8000fe8: 3301 adds r3, #1 + 8000fea: 613b str r3, [r7, #16] + uint32_t length_msg; + arrToVar(length_msg, (inbuffer + offset)); + 8000fec: 693b ldr r3, [r7, #16] + 8000fee: 683a ldr r2, [r7, #0] + 8000ff0: 441a add r2, r3 + 8000ff2: f107 030c add.w r3, r7, #12 + 8000ff6: 4611 mov r1, r2 + 8000ff8: 4618 mov r0, r3 + 8000ffa: f002 f972 bl 80032e2 <_ZN3ros3Msg8arrToVarImPhEEvRT_T0_> + offset += 4; + 8000ffe: 693b ldr r3, [r7, #16] + 8001000: 3304 adds r3, #4 + 8001002: 613b str r3, [r7, #16] + for(unsigned int k= offset; k< offset+length_msg; ++k){ + 8001004: 693b ldr r3, [r7, #16] + 8001006: 617b str r3, [r7, #20] + 8001008: 693a ldr r2, [r7, #16] + 800100a: 68fb ldr r3, [r7, #12] + 800100c: 4413 add r3, r2 + 800100e: 697a ldr r2, [r7, #20] + 8001010: 429a cmp r2, r3 + 8001012: d20c bcs.n 800102e <_ZN14rosserial_msgs3Log11deserializeEPh+0x62> + inbuffer[k-1]=inbuffer[k]; + 8001014: 683a ldr r2, [r7, #0] + 8001016: 697b ldr r3, [r7, #20] + 8001018: 441a add r2, r3 + 800101a: 697b ldr r3, [r7, #20] + 800101c: 3b01 subs r3, #1 + 800101e: 6839 ldr r1, [r7, #0] + 8001020: 440b add r3, r1 + 8001022: 7812 ldrb r2, [r2, #0] + 8001024: 701a strb r2, [r3, #0] + for(unsigned int k= offset; k< offset+length_msg; ++k){ + 8001026: 697b ldr r3, [r7, #20] + 8001028: 3301 adds r3, #1 + 800102a: 617b str r3, [r7, #20] + 800102c: e7ec b.n 8001008 <_ZN14rosserial_msgs3Log11deserializeEPh+0x3c> + } + inbuffer[offset+length_msg-1]=0; + 800102e: 693a ldr r2, [r7, #16] + 8001030: 68fb ldr r3, [r7, #12] + 8001032: 4413 add r3, r2 + 8001034: 3b01 subs r3, #1 + 8001036: 683a ldr r2, [r7, #0] + 8001038: 4413 add r3, r2 + 800103a: 2200 movs r2, #0 + 800103c: 701a strb r2, [r3, #0] + this->msg = (char *)(inbuffer + offset-1); + 800103e: 693b ldr r3, [r7, #16] + 8001040: 3b01 subs r3, #1 + 8001042: 683a ldr r2, [r7, #0] + 8001044: 441a add r2, r3 + 8001046: 687b ldr r3, [r7, #4] + 8001048: 609a str r2, [r3, #8] + offset += length_msg; + 800104a: 693a ldr r2, [r7, #16] + 800104c: 68fb ldr r3, [r7, #12] + 800104e: 4413 add r3, r2 + 8001050: 613b str r3, [r7, #16] + return offset; + 8001052: 693b ldr r3, [r7, #16] + } + 8001054: 4618 mov r0, r3 + 8001056: 3718 adds r7, #24 + 8001058: 46bd mov sp, r7 + 800105a: bd80 pop {r7, pc} - /* Memory to Peripheral */ - if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH) - 8000dc2: 68fb ldr r3, [r7, #12] - 8000dc4: 689b ldr r3, [r3, #8] - 8000dc6: 2b40 cmp r3, #64 ; 0x40 - 8000dc8: d108 bne.n 8000ddc - { - /* Configure DMA Stream destination address */ - hdma->Instance->PAR = DstAddress; - 8000dca: 68fb ldr r3, [r7, #12] - 8000dcc: 681b ldr r3, [r3, #0] - 8000dce: 687a ldr r2, [r7, #4] - 8000dd0: 609a str r2, [r3, #8] +0800105c <_ZN14rosserial_msgs3Log7getTypeEv>: - /* Configure DMA Stream source address */ - hdma->Instance->M0AR = SrcAddress; - 8000dd2: 68fb ldr r3, [r7, #12] - 8000dd4: 681b ldr r3, [r3, #0] - 8000dd6: 68ba ldr r2, [r7, #8] - 8000dd8: 60da str r2, [r3, #12] - hdma->Instance->PAR = SrcAddress; + const char * getType(){ return "rosserial_msgs/Log"; }; + 800105c: b480 push {r7} + 800105e: b083 sub sp, #12 + 8001060: af00 add r7, sp, #0 + 8001062: 6078 str r0, [r7, #4] + 8001064: 4b03 ldr r3, [pc, #12] ; (8001074 <_ZN14rosserial_msgs3Log7getTypeEv+0x18>) + 8001066: 4618 mov r0, r3 + 8001068: 370c adds r7, #12 + 800106a: 46bd mov sp, r7 + 800106c: f85d 7b04 ldr.w r7, [sp], #4 + 8001070: 4770 bx lr + 8001072: bf00 nop + 8001074: 0800a1d4 .word 0x0800a1d4 + +08001078 <_ZN14rosserial_msgs3Log6getMD5Ev>: + const char * getMD5(){ return "11abd731c25933261cd6183bd12d6295"; }; + 8001078: b480 push {r7} + 800107a: b083 sub sp, #12 + 800107c: af00 add r7, sp, #0 + 800107e: 6078 str r0, [r7, #4] + 8001080: 4b03 ldr r3, [pc, #12] ; (8001090 <_ZN14rosserial_msgs3Log6getMD5Ev+0x18>) + 8001082: 4618 mov r0, r3 + 8001084: 370c adds r7, #12 + 8001086: 46bd mov sp, r7 + 8001088: f85d 7b04 ldr.w r7, [sp], #4 + 800108c: 4770 bx lr + 800108e: bf00 nop + 8001090: 0800a1e8 .word 0x0800a1e8 + +08001094 <_ZN14rosserial_msgs20RequestParamResponseC1Ev>: + uint32_t strings_length; + typedef char* _strings_type; + _strings_type st_strings; + _strings_type * strings; - /* Configure DMA Stream destination address */ - hdma->Instance->M0AR = DstAddress; - } -} - 8000dda: e007 b.n 8000dec - hdma->Instance->PAR = SrcAddress; - 8000ddc: 68fb ldr r3, [r7, #12] - 8000dde: 681b ldr r3, [r3, #0] - 8000de0: 68ba ldr r2, [r7, #8] - 8000de2: 609a str r2, [r3, #8] - hdma->Instance->M0AR = DstAddress; - 8000de4: 68fb ldr r3, [r7, #12] - 8000de6: 681b ldr r3, [r3, #0] - 8000de8: 687a ldr r2, [r7, #4] - 8000dea: 60da str r2, [r3, #12] -} - 8000dec: bf00 nop - 8000dee: 3714 adds r7, #20 - 8000df0: 46bd mov sp, r7 - 8000df2: f85d 7b04 ldr.w r7, [sp], #4 - 8000df6: 4770 bx lr + RequestParamResponse(): + 8001094: b580 push {r7, lr} + 8001096: b082 sub sp, #8 + 8001098: af00 add r7, sp, #0 + 800109a: 6078 str r0, [r7, #4] + ints_length(0), ints(NULL), + floats_length(0), floats(NULL), + strings_length(0), strings(NULL) + 800109c: 687b ldr r3, [r7, #4] + 800109e: 4618 mov r0, r3 + 80010a0: f7ff fbd6 bl 8000850 <_ZN3ros3MsgC1Ev> + 80010a4: 4a0c ldr r2, [pc, #48] ; (80010d8 <_ZN14rosserial_msgs20RequestParamResponseC1Ev+0x44>) + 80010a6: 687b ldr r3, [r7, #4] + 80010a8: 601a str r2, [r3, #0] + 80010aa: 687b ldr r3, [r7, #4] + 80010ac: 2200 movs r2, #0 + 80010ae: 605a str r2, [r3, #4] + 80010b0: 687b ldr r3, [r7, #4] + 80010b2: 2200 movs r2, #0 + 80010b4: 60da str r2, [r3, #12] + 80010b6: 687b ldr r3, [r7, #4] + 80010b8: 2200 movs r2, #0 + 80010ba: 611a str r2, [r3, #16] + 80010bc: 687b ldr r3, [r7, #4] + 80010be: 2200 movs r2, #0 + 80010c0: 619a str r2, [r3, #24] + 80010c2: 687b ldr r3, [r7, #4] + 80010c4: 2200 movs r2, #0 + 80010c6: 61da str r2, [r3, #28] + 80010c8: 687b ldr r3, [r7, #4] + 80010ca: 2200 movs r2, #0 + 80010cc: 625a str r2, [r3, #36] ; 0x24 + { + } + 80010ce: 687b ldr r3, [r7, #4] + 80010d0: 4618 mov r0, r3 + 80010d2: 3708 adds r7, #8 + 80010d4: 46bd mov sp, r7 + 80010d6: bd80 pop {r7, pc} + 80010d8: 0800a5a0 .word 0x0800a5a0 -08000df8 : - * @param hdma pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA Stream. - * @retval Stream base address - */ -static uint32_t DMA_CalcBaseAndBitshift(DMA_HandleTypeDef *hdma) -{ - 8000df8: b480 push {r7} - 8000dfa: b085 sub sp, #20 - 8000dfc: af00 add r7, sp, #0 - 8000dfe: 6078 str r0, [r7, #4] - uint32_t stream_number = (((uint32_t)hdma->Instance & 0xFFU) - 16U) / 24U; - 8000e00: 687b ldr r3, [r7, #4] - 8000e02: 681b ldr r3, [r3, #0] - 8000e04: b2db uxtb r3, r3 - 8000e06: 3b10 subs r3, #16 - 8000e08: 4a13 ldr r2, [pc, #76] ; (8000e58 ) - 8000e0a: fba2 2303 umull r2, r3, r2, r3 - 8000e0e: 091b lsrs r3, r3, #4 - 8000e10: 60fb str r3, [r7, #12] - - /* lookup table for necessary bitshift of flags within status registers */ - static const uint8_t flagBitshiftOffset[8U] = {0U, 6U, 16U, 22U, 0U, 6U, 16U, 22U}; - hdma->StreamIndex = flagBitshiftOffset[stream_number]; - 8000e12: 4a12 ldr r2, [pc, #72] ; (8000e5c ) - 8000e14: 68fb ldr r3, [r7, #12] - 8000e16: 4413 add r3, r2 - 8000e18: 781b ldrb r3, [r3, #0] - 8000e1a: 461a mov r2, r3 - 8000e1c: 687b ldr r3, [r7, #4] - 8000e1e: 65da str r2, [r3, #92] ; 0x5c - - if (stream_number > 3U) - 8000e20: 68fb ldr r3, [r7, #12] - 8000e22: 2b03 cmp r3, #3 - 8000e24: d908 bls.n 8000e38 - { - /* return pointer to HISR and HIFCR */ - hdma->StreamBaseAddress = (((uint32_t)hdma->Instance & (uint32_t)(~0x3FFU)) + 4U); - 8000e26: 687b ldr r3, [r7, #4] - 8000e28: 681b ldr r3, [r3, #0] - 8000e2a: 461a mov r2, r3 - 8000e2c: 4b0c ldr r3, [pc, #48] ; (8000e60 ) - 8000e2e: 4013 ands r3, r2 - 8000e30: 1d1a adds r2, r3, #4 - 8000e32: 687b ldr r3, [r7, #4] - 8000e34: 659a str r2, [r3, #88] ; 0x58 - 8000e36: e006 b.n 8000e46 - } - else - { - /* return pointer to LISR and LIFCR */ - hdma->StreamBaseAddress = ((uint32_t)hdma->Instance & (uint32_t)(~0x3FFU)); - 8000e38: 687b ldr r3, [r7, #4] - 8000e3a: 681b ldr r3, [r3, #0] - 8000e3c: 461a mov r2, r3 - 8000e3e: 4b08 ldr r3, [pc, #32] ; (8000e60 ) - 8000e40: 4013 ands r3, r2 - 8000e42: 687a ldr r2, [r7, #4] - 8000e44: 6593 str r3, [r2, #88] ; 0x58 - } - - return hdma->StreamBaseAddress; - 8000e46: 687b ldr r3, [r7, #4] - 8000e48: 6d9b ldr r3, [r3, #88] ; 0x58 -} - 8000e4a: 4618 mov r0, r3 - 8000e4c: 3714 adds r7, #20 - 8000e4e: 46bd mov sp, r7 - 8000e50: f85d 7b04 ldr.w r7, [sp], #4 - 8000e54: 4770 bx lr - 8000e56: bf00 nop - 8000e58: aaaaaaab .word 0xaaaaaaab - 8000e5c: 0800a414 .word 0x0800a414 - 8000e60: fffffc00 .word 0xfffffc00 - -08000e64 : - * @param hdma pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA Stream. - * @retval HAL status - */ -static HAL_StatusTypeDef DMA_CheckFifoParam(DMA_HandleTypeDef *hdma) -{ - 8000e64: b480 push {r7} - 8000e66: b085 sub sp, #20 - 8000e68: af00 add r7, sp, #0 - 8000e6a: 6078 str r0, [r7, #4] - HAL_StatusTypeDef status = HAL_OK; - 8000e6c: 2300 movs r3, #0 - 8000e6e: 73fb strb r3, [r7, #15] - uint32_t tmp = hdma->Init.FIFOThreshold; - 8000e70: 687b ldr r3, [r7, #4] - 8000e72: 6a9b ldr r3, [r3, #40] ; 0x28 - 8000e74: 60bb str r3, [r7, #8] - - /* Memory Data size equal to Byte */ - if(hdma->Init.MemDataAlignment == DMA_MDATAALIGN_BYTE) - 8000e76: 687b ldr r3, [r7, #4] - 8000e78: 699b ldr r3, [r3, #24] - 8000e7a: 2b00 cmp r3, #0 - 8000e7c: d11f bne.n 8000ebe - { - switch (tmp) - 8000e7e: 68bb ldr r3, [r7, #8] - 8000e80: 2b03 cmp r3, #3 - 8000e82: d855 bhi.n 8000f30 - 8000e84: a201 add r2, pc, #4 ; (adr r2, 8000e8c ) - 8000e86: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8000e8a: bf00 nop - 8000e8c: 08000e9d .word 0x08000e9d - 8000e90: 08000eaf .word 0x08000eaf - 8000e94: 08000e9d .word 0x08000e9d - 8000e98: 08000f31 .word 0x08000f31 +080010dc <_ZNK14rosserial_msgs20RequestParamResponse9serializeEPh>: + + virtual int serialize(unsigned char *outbuffer) const + 80010dc: b580 push {r7, lr} + 80010de: b08a sub sp, #40 ; 0x28 + 80010e0: af00 add r7, sp, #0 + 80010e2: 6078 str r0, [r7, #4] + 80010e4: 6039 str r1, [r7, #0] { - case DMA_FIFO_THRESHOLD_1QUARTERFULL: - case DMA_FIFO_THRESHOLD_3QUARTERSFULL: - if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1) - 8000e9c: 687b ldr r3, [r7, #4] - 8000e9e: 6adb ldr r3, [r3, #44] ; 0x2c - 8000ea0: f003 7380 and.w r3, r3, #16777216 ; 0x1000000 - 8000ea4: 2b00 cmp r3, #0 - 8000ea6: d045 beq.n 8000f34 - { - status = HAL_ERROR; - 8000ea8: 2301 movs r3, #1 - 8000eaa: 73fb strb r3, [r7, #15] + int offset = 0; + 80010e6: 2300 movs r3, #0 + 80010e8: 627b str r3, [r7, #36] ; 0x24 + *(outbuffer + offset + 0) = (this->ints_length >> (8 * 0)) & 0xFF; + 80010ea: 687b ldr r3, [r7, #4] + 80010ec: 6859 ldr r1, [r3, #4] + 80010ee: 6a7b ldr r3, [r7, #36] ; 0x24 + 80010f0: 683a ldr r2, [r7, #0] + 80010f2: 4413 add r3, r2 + 80010f4: b2ca uxtb r2, r1 + 80010f6: 701a strb r2, [r3, #0] + *(outbuffer + offset + 1) = (this->ints_length >> (8 * 1)) & 0xFF; + 80010f8: 687b ldr r3, [r7, #4] + 80010fa: 685b ldr r3, [r3, #4] + 80010fc: 0a19 lsrs r1, r3, #8 + 80010fe: 6a7b ldr r3, [r7, #36] ; 0x24 + 8001100: 3301 adds r3, #1 + 8001102: 683a ldr r2, [r7, #0] + 8001104: 4413 add r3, r2 + 8001106: b2ca uxtb r2, r1 + 8001108: 701a strb r2, [r3, #0] + *(outbuffer + offset + 2) = (this->ints_length >> (8 * 2)) & 0xFF; + 800110a: 687b ldr r3, [r7, #4] + 800110c: 685b ldr r3, [r3, #4] + 800110e: 0c19 lsrs r1, r3, #16 + 8001110: 6a7b ldr r3, [r7, #36] ; 0x24 + 8001112: 3302 adds r3, #2 + 8001114: 683a ldr r2, [r7, #0] + 8001116: 4413 add r3, r2 + 8001118: b2ca uxtb r2, r1 + 800111a: 701a strb r2, [r3, #0] + *(outbuffer + offset + 3) = (this->ints_length >> (8 * 3)) & 0xFF; + 800111c: 687b ldr r3, [r7, #4] + 800111e: 685b ldr r3, [r3, #4] + 8001120: 0e19 lsrs r1, r3, #24 + 8001122: 6a7b ldr r3, [r7, #36] ; 0x24 + 8001124: 3303 adds r3, #3 + 8001126: 683a ldr r2, [r7, #0] + 8001128: 4413 add r3, r2 + 800112a: b2ca uxtb r2, r1 + 800112c: 701a strb r2, [r3, #0] + offset += sizeof(this->ints_length); + 800112e: 6a7b ldr r3, [r7, #36] ; 0x24 + 8001130: 3304 adds r3, #4 + 8001132: 627b str r3, [r7, #36] ; 0x24 + for( uint32_t i = 0; i < ints_length; i++){ + 8001134: 2300 movs r3, #0 + 8001136: 623b str r3, [r7, #32] + 8001138: 687b ldr r3, [r7, #4] + 800113a: 685b ldr r3, [r3, #4] + 800113c: 6a3a ldr r2, [r7, #32] + 800113e: 429a cmp r2, r3 + 8001140: d22b bcs.n 800119a <_ZNK14rosserial_msgs20RequestParamResponse9serializeEPh+0xbe> + union { + int32_t real; + uint32_t base; + } u_intsi; + u_intsi.real = this->ints[i]; + 8001142: 687b ldr r3, [r7, #4] + 8001144: 68da ldr r2, [r3, #12] + 8001146: 6a3b ldr r3, [r7, #32] + 8001148: 009b lsls r3, r3, #2 + 800114a: 4413 add r3, r2 + 800114c: 681b ldr r3, [r3, #0] + 800114e: 613b str r3, [r7, #16] + *(outbuffer + offset + 0) = (u_intsi.base >> (8 * 0)) & 0xFF; + 8001150: 6939 ldr r1, [r7, #16] + 8001152: 6a7b ldr r3, [r7, #36] ; 0x24 + 8001154: 683a ldr r2, [r7, #0] + 8001156: 4413 add r3, r2 + 8001158: b2ca uxtb r2, r1 + 800115a: 701a strb r2, [r3, #0] + *(outbuffer + offset + 1) = (u_intsi.base >> (8 * 1)) & 0xFF; + 800115c: 693b ldr r3, [r7, #16] + 800115e: 0a19 lsrs r1, r3, #8 + 8001160: 6a7b ldr r3, [r7, #36] ; 0x24 + 8001162: 3301 adds r3, #1 + 8001164: 683a ldr r2, [r7, #0] + 8001166: 4413 add r3, r2 + 8001168: b2ca uxtb r2, r1 + 800116a: 701a strb r2, [r3, #0] + *(outbuffer + offset + 2) = (u_intsi.base >> (8 * 2)) & 0xFF; + 800116c: 693b ldr r3, [r7, #16] + 800116e: 0c19 lsrs r1, r3, #16 + 8001170: 6a7b ldr r3, [r7, #36] ; 0x24 + 8001172: 3302 adds r3, #2 + 8001174: 683a ldr r2, [r7, #0] + 8001176: 4413 add r3, r2 + 8001178: b2ca uxtb r2, r1 + 800117a: 701a strb r2, [r3, #0] + *(outbuffer + offset + 3) = (u_intsi.base >> (8 * 3)) & 0xFF; + 800117c: 693b ldr r3, [r7, #16] + 800117e: 0e19 lsrs r1, r3, #24 + 8001180: 6a7b ldr r3, [r7, #36] ; 0x24 + 8001182: 3303 adds r3, #3 + 8001184: 683a ldr r2, [r7, #0] + 8001186: 4413 add r3, r2 + 8001188: b2ca uxtb r2, r1 + 800118a: 701a strb r2, [r3, #0] + offset += sizeof(this->ints[i]); + 800118c: 6a7b ldr r3, [r7, #36] ; 0x24 + 800118e: 3304 adds r3, #4 + 8001190: 627b str r3, [r7, #36] ; 0x24 + for( uint32_t i = 0; i < ints_length; i++){ + 8001192: 6a3b ldr r3, [r7, #32] + 8001194: 3301 adds r3, #1 + 8001196: 623b str r3, [r7, #32] + 8001198: e7ce b.n 8001138 <_ZNK14rosserial_msgs20RequestParamResponse9serializeEPh+0x5c> } - break; - 8000eac: e042 b.n 8000f34 - case DMA_FIFO_THRESHOLD_HALFFULL: - if (hdma->Init.MemBurst == DMA_MBURST_INC16) - 8000eae: 687b ldr r3, [r7, #4] - 8000eb0: 6adb ldr r3, [r3, #44] ; 0x2c - 8000eb2: f1b3 7fc0 cmp.w r3, #25165824 ; 0x1800000 - 8000eb6: d13f bne.n 8000f38 - { - status = HAL_ERROR; - 8000eb8: 2301 movs r3, #1 - 8000eba: 73fb strb r3, [r7, #15] + *(outbuffer + offset + 0) = (this->floats_length >> (8 * 0)) & 0xFF; + 800119a: 687b ldr r3, [r7, #4] + 800119c: 6919 ldr r1, [r3, #16] + 800119e: 6a7b ldr r3, [r7, #36] ; 0x24 + 80011a0: 683a ldr r2, [r7, #0] + 80011a2: 4413 add r3, r2 + 80011a4: b2ca uxtb r2, r1 + 80011a6: 701a strb r2, [r3, #0] + *(outbuffer + offset + 1) = (this->floats_length >> (8 * 1)) & 0xFF; + 80011a8: 687b ldr r3, [r7, #4] + 80011aa: 691b ldr r3, [r3, #16] + 80011ac: 0a19 lsrs r1, r3, #8 + 80011ae: 6a7b ldr r3, [r7, #36] ; 0x24 + 80011b0: 3301 adds r3, #1 + 80011b2: 683a ldr r2, [r7, #0] + 80011b4: 4413 add r3, r2 + 80011b6: b2ca uxtb r2, r1 + 80011b8: 701a strb r2, [r3, #0] + *(outbuffer + offset + 2) = (this->floats_length >> (8 * 2)) & 0xFF; + 80011ba: 687b ldr r3, [r7, #4] + 80011bc: 691b ldr r3, [r3, #16] + 80011be: 0c19 lsrs r1, r3, #16 + 80011c0: 6a7b ldr r3, [r7, #36] ; 0x24 + 80011c2: 3302 adds r3, #2 + 80011c4: 683a ldr r2, [r7, #0] + 80011c6: 4413 add r3, r2 + 80011c8: b2ca uxtb r2, r1 + 80011ca: 701a strb r2, [r3, #0] + *(outbuffer + offset + 3) = (this->floats_length >> (8 * 3)) & 0xFF; + 80011cc: 687b ldr r3, [r7, #4] + 80011ce: 691b ldr r3, [r3, #16] + 80011d0: 0e19 lsrs r1, r3, #24 + 80011d2: 6a7b ldr r3, [r7, #36] ; 0x24 + 80011d4: 3303 adds r3, #3 + 80011d6: 683a ldr r2, [r7, #0] + 80011d8: 4413 add r3, r2 + 80011da: b2ca uxtb r2, r1 + 80011dc: 701a strb r2, [r3, #0] + offset += sizeof(this->floats_length); + 80011de: 6a7b ldr r3, [r7, #36] ; 0x24 + 80011e0: 3304 adds r3, #4 + 80011e2: 627b str r3, [r7, #36] ; 0x24 + for( uint32_t i = 0; i < floats_length; i++){ + 80011e4: 2300 movs r3, #0 + 80011e6: 61fb str r3, [r7, #28] + 80011e8: 687b ldr r3, [r7, #4] + 80011ea: 691b ldr r3, [r3, #16] + 80011ec: 69fa ldr r2, [r7, #28] + 80011ee: 429a cmp r2, r3 + 80011f0: d22b bcs.n 800124a <_ZNK14rosserial_msgs20RequestParamResponse9serializeEPh+0x16e> + union { + float real; + uint32_t base; + } u_floatsi; + u_floatsi.real = this->floats[i]; + 80011f2: 687b ldr r3, [r7, #4] + 80011f4: 699a ldr r2, [r3, #24] + 80011f6: 69fb ldr r3, [r7, #28] + 80011f8: 009b lsls r3, r3, #2 + 80011fa: 4413 add r3, r2 + 80011fc: 681b ldr r3, [r3, #0] + 80011fe: 60fb str r3, [r7, #12] + *(outbuffer + offset + 0) = (u_floatsi.base >> (8 * 0)) & 0xFF; + 8001200: 68f9 ldr r1, [r7, #12] + 8001202: 6a7b ldr r3, [r7, #36] ; 0x24 + 8001204: 683a ldr r2, [r7, #0] + 8001206: 4413 add r3, r2 + 8001208: b2ca uxtb r2, r1 + 800120a: 701a strb r2, [r3, #0] + *(outbuffer + offset + 1) = (u_floatsi.base >> (8 * 1)) & 0xFF; + 800120c: 68fb ldr r3, [r7, #12] + 800120e: 0a19 lsrs r1, r3, #8 + 8001210: 6a7b ldr r3, [r7, #36] ; 0x24 + 8001212: 3301 adds r3, #1 + 8001214: 683a ldr r2, [r7, #0] + 8001216: 4413 add r3, r2 + 8001218: b2ca uxtb r2, r1 + 800121a: 701a strb r2, [r3, #0] + *(outbuffer + offset + 2) = (u_floatsi.base >> (8 * 2)) & 0xFF; + 800121c: 68fb ldr r3, [r7, #12] + 800121e: 0c19 lsrs r1, r3, #16 + 8001220: 6a7b ldr r3, [r7, #36] ; 0x24 + 8001222: 3302 adds r3, #2 + 8001224: 683a ldr r2, [r7, #0] + 8001226: 4413 add r3, r2 + 8001228: b2ca uxtb r2, r1 + 800122a: 701a strb r2, [r3, #0] + *(outbuffer + offset + 3) = (u_floatsi.base >> (8 * 3)) & 0xFF; + 800122c: 68fb ldr r3, [r7, #12] + 800122e: 0e19 lsrs r1, r3, #24 + 8001230: 6a7b ldr r3, [r7, #36] ; 0x24 + 8001232: 3303 adds r3, #3 + 8001234: 683a ldr r2, [r7, #0] + 8001236: 4413 add r3, r2 + 8001238: b2ca uxtb r2, r1 + 800123a: 701a strb r2, [r3, #0] + offset += sizeof(this->floats[i]); + 800123c: 6a7b ldr r3, [r7, #36] ; 0x24 + 800123e: 3304 adds r3, #4 + 8001240: 627b str r3, [r7, #36] ; 0x24 + for( uint32_t i = 0; i < floats_length; i++){ + 8001242: 69fb ldr r3, [r7, #28] + 8001244: 3301 adds r3, #1 + 8001246: 61fb str r3, [r7, #28] + 8001248: e7ce b.n 80011e8 <_ZNK14rosserial_msgs20RequestParamResponse9serializeEPh+0x10c> } - break; - 8000ebc: e03c b.n 8000f38 - break; + *(outbuffer + offset + 0) = (this->strings_length >> (8 * 0)) & 0xFF; + 800124a: 687b ldr r3, [r7, #4] + 800124c: 69d9 ldr r1, [r3, #28] + 800124e: 6a7b ldr r3, [r7, #36] ; 0x24 + 8001250: 683a ldr r2, [r7, #0] + 8001252: 4413 add r3, r2 + 8001254: b2ca uxtb r2, r1 + 8001256: 701a strb r2, [r3, #0] + *(outbuffer + offset + 1) = (this->strings_length >> (8 * 1)) & 0xFF; + 8001258: 687b ldr r3, [r7, #4] + 800125a: 69db ldr r3, [r3, #28] + 800125c: 0a19 lsrs r1, r3, #8 + 800125e: 6a7b ldr r3, [r7, #36] ; 0x24 + 8001260: 3301 adds r3, #1 + 8001262: 683a ldr r2, [r7, #0] + 8001264: 4413 add r3, r2 + 8001266: b2ca uxtb r2, r1 + 8001268: 701a strb r2, [r3, #0] + *(outbuffer + offset + 2) = (this->strings_length >> (8 * 2)) & 0xFF; + 800126a: 687b ldr r3, [r7, #4] + 800126c: 69db ldr r3, [r3, #28] + 800126e: 0c19 lsrs r1, r3, #16 + 8001270: 6a7b ldr r3, [r7, #36] ; 0x24 + 8001272: 3302 adds r3, #2 + 8001274: 683a ldr r2, [r7, #0] + 8001276: 4413 add r3, r2 + 8001278: b2ca uxtb r2, r1 + 800127a: 701a strb r2, [r3, #0] + *(outbuffer + offset + 3) = (this->strings_length >> (8 * 3)) & 0xFF; + 800127c: 687b ldr r3, [r7, #4] + 800127e: 69db ldr r3, [r3, #28] + 8001280: 0e19 lsrs r1, r3, #24 + 8001282: 6a7b ldr r3, [r7, #36] ; 0x24 + 8001284: 3303 adds r3, #3 + 8001286: 683a ldr r2, [r7, #0] + 8001288: 4413 add r3, r2 + 800128a: b2ca uxtb r2, r1 + 800128c: 701a strb r2, [r3, #0] + offset += sizeof(this->strings_length); + 800128e: 6a7b ldr r3, [r7, #36] ; 0x24 + 8001290: 3304 adds r3, #4 + 8001292: 627b str r3, [r7, #36] ; 0x24 + for( uint32_t i = 0; i < strings_length; i++){ + 8001294: 2300 movs r3, #0 + 8001296: 61bb str r3, [r7, #24] + 8001298: 687b ldr r3, [r7, #4] + 800129a: 69db ldr r3, [r3, #28] + 800129c: 69ba ldr r2, [r7, #24] + 800129e: 429a cmp r2, r3 + 80012a0: d228 bcs.n 80012f4 <_ZNK14rosserial_msgs20RequestParamResponse9serializeEPh+0x218> + uint32_t length_stringsi = strlen(this->strings[i]); + 80012a2: 687b ldr r3, [r7, #4] + 80012a4: 6a5a ldr r2, [r3, #36] ; 0x24 + 80012a6: 69bb ldr r3, [r7, #24] + 80012a8: 009b lsls r3, r3, #2 + 80012aa: 4413 add r3, r2 + 80012ac: 681b ldr r3, [r3, #0] + 80012ae: 4618 mov r0, r3 + 80012b0: f7fe ffc2 bl 8000238 + 80012b4: 6178 str r0, [r7, #20] + varToArr(outbuffer + offset, length_stringsi); + 80012b6: 6a7b ldr r3, [r7, #36] ; 0x24 + 80012b8: 683a ldr r2, [r7, #0] + 80012ba: 4413 add r3, r2 + 80012bc: 6979 ldr r1, [r7, #20] + 80012be: 4618 mov r0, r3 + 80012c0: f001 fff1 bl 80032a6 <_ZN3ros3Msg8varToArrIPhmEEvT_T0_> + offset += 4; + 80012c4: 6a7b ldr r3, [r7, #36] ; 0x24 + 80012c6: 3304 adds r3, #4 + 80012c8: 627b str r3, [r7, #36] ; 0x24 + memcpy(outbuffer + offset, this->strings[i], length_stringsi); + 80012ca: 6a7b ldr r3, [r7, #36] ; 0x24 + 80012cc: 683a ldr r2, [r7, #0] + 80012ce: 18d0 adds r0, r2, r3 + 80012d0: 687b ldr r3, [r7, #4] + 80012d2: 6a5a ldr r2, [r3, #36] ; 0x24 + 80012d4: 69bb ldr r3, [r7, #24] + 80012d6: 009b lsls r3, r3, #2 + 80012d8: 4413 add r3, r2 + 80012da: 681b ldr r3, [r3, #0] + 80012dc: 697a ldr r2, [r7, #20] + 80012de: 4619 mov r1, r3 + 80012e0: f008 fdce bl 8009e80 + offset += length_stringsi; + 80012e4: 6a7a ldr r2, [r7, #36] ; 0x24 + 80012e6: 697b ldr r3, [r7, #20] + 80012e8: 4413 add r3, r2 + 80012ea: 627b str r3, [r7, #36] ; 0x24 + for( uint32_t i = 0; i < strings_length; i++){ + 80012ec: 69bb ldr r3, [r7, #24] + 80012ee: 3301 adds r3, #1 + 80012f0: 61bb str r3, [r7, #24] + 80012f2: e7d1 b.n 8001298 <_ZNK14rosserial_msgs20RequestParamResponse9serializeEPh+0x1bc> + } + return offset; + 80012f4: 6a7b ldr r3, [r7, #36] ; 0x24 } - } - - /* Memory Data size equal to Half-Word */ - else if (hdma->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD) - 8000ebe: 687b ldr r3, [r7, #4] - 8000ec0: 699b ldr r3, [r3, #24] - 8000ec2: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 - 8000ec6: d121 bne.n 8000f0c - { - switch (tmp) - 8000ec8: 68bb ldr r3, [r7, #8] - 8000eca: 2b03 cmp r3, #3 - 8000ecc: d836 bhi.n 8000f3c - 8000ece: a201 add r2, pc, #4 ; (adr r2, 8000ed4 ) - 8000ed0: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8000ed4: 08000ee5 .word 0x08000ee5 - 8000ed8: 08000eeb .word 0x08000eeb - 8000edc: 08000ee5 .word 0x08000ee5 - 8000ee0: 08000efd .word 0x08000efd + 80012f6: 4618 mov r0, r3 + 80012f8: 3728 adds r7, #40 ; 0x28 + 80012fa: 46bd mov sp, r7 + 80012fc: bd80 pop {r7, pc} + +080012fe <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh>: + + virtual int deserialize(unsigned char *inbuffer) + 80012fe: b580 push {r7, lr} + 8001300: b08e sub sp, #56 ; 0x38 + 8001302: af00 add r7, sp, #0 + 8001304: 6078 str r0, [r7, #4] + 8001306: 6039 str r1, [r7, #0] { - case DMA_FIFO_THRESHOLD_1QUARTERFULL: - case DMA_FIFO_THRESHOLD_3QUARTERSFULL: - status = HAL_ERROR; - 8000ee4: 2301 movs r3, #1 - 8000ee6: 73fb strb r3, [r7, #15] - break; - 8000ee8: e02f b.n 8000f4a - case DMA_FIFO_THRESHOLD_HALFFULL: - if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1) - 8000eea: 687b ldr r3, [r7, #4] - 8000eec: 6adb ldr r3, [r3, #44] ; 0x2c - 8000eee: f003 7380 and.w r3, r3, #16777216 ; 0x1000000 - 8000ef2: 2b00 cmp r3, #0 - 8000ef4: d024 beq.n 8000f40 - { - status = HAL_ERROR; - 8000ef6: 2301 movs r3, #1 - 8000ef8: 73fb strb r3, [r7, #15] + int offset = 0; + 8001308: 2300 movs r3, #0 + 800130a: 637b str r3, [r7, #52] ; 0x34 + uint32_t ints_lengthT = ((uint32_t) (*(inbuffer + offset))); + 800130c: 6b7b ldr r3, [r7, #52] ; 0x34 + 800130e: 683a ldr r2, [r7, #0] + 8001310: 4413 add r3, r2 + 8001312: 781b ldrb r3, [r3, #0] + 8001314: 623b str r3, [r7, #32] + ints_lengthT |= ((uint32_t) (*(inbuffer + offset + 1))) << (8 * 1); + 8001316: 6b7b ldr r3, [r7, #52] ; 0x34 + 8001318: 3301 adds r3, #1 + 800131a: 683a ldr r2, [r7, #0] + 800131c: 4413 add r3, r2 + 800131e: 781b ldrb r3, [r3, #0] + 8001320: 021b lsls r3, r3, #8 + 8001322: 6a3a ldr r2, [r7, #32] + 8001324: 4313 orrs r3, r2 + 8001326: 623b str r3, [r7, #32] + ints_lengthT |= ((uint32_t) (*(inbuffer + offset + 2))) << (8 * 2); + 8001328: 6b7b ldr r3, [r7, #52] ; 0x34 + 800132a: 3302 adds r3, #2 + 800132c: 683a ldr r2, [r7, #0] + 800132e: 4413 add r3, r2 + 8001330: 781b ldrb r3, [r3, #0] + 8001332: 041b lsls r3, r3, #16 + 8001334: 6a3a ldr r2, [r7, #32] + 8001336: 4313 orrs r3, r2 + 8001338: 623b str r3, [r7, #32] + ints_lengthT |= ((uint32_t) (*(inbuffer + offset + 3))) << (8 * 3); + 800133a: 6b7b ldr r3, [r7, #52] ; 0x34 + 800133c: 3303 adds r3, #3 + 800133e: 683a ldr r2, [r7, #0] + 8001340: 4413 add r3, r2 + 8001342: 781b ldrb r3, [r3, #0] + 8001344: 061b lsls r3, r3, #24 + 8001346: 6a3a ldr r2, [r7, #32] + 8001348: 4313 orrs r3, r2 + 800134a: 623b str r3, [r7, #32] + offset += sizeof(this->ints_length); + 800134c: 6b7b ldr r3, [r7, #52] ; 0x34 + 800134e: 3304 adds r3, #4 + 8001350: 637b str r3, [r7, #52] ; 0x34 + if(ints_lengthT > ints_length) + 8001352: 687b ldr r3, [r7, #4] + 8001354: 685b ldr r3, [r3, #4] + 8001356: 6a3a ldr r2, [r7, #32] + 8001358: 429a cmp r2, r3 + 800135a: d90a bls.n 8001372 <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x74> + this->ints = (int32_t*)realloc(this->ints, ints_lengthT * sizeof(int32_t)); + 800135c: 687b ldr r3, [r7, #4] + 800135e: 68da ldr r2, [r3, #12] + 8001360: 6a3b ldr r3, [r7, #32] + 8001362: 009b lsls r3, r3, #2 + 8001364: 4619 mov r1, r3 + 8001366: 4610 mov r0, r2 + 8001368: f008 fd9e bl 8009ea8 + 800136c: 4602 mov r2, r0 + 800136e: 687b ldr r3, [r7, #4] + 8001370: 60da str r2, [r3, #12] + ints_length = ints_lengthT; + 8001372: 687b ldr r3, [r7, #4] + 8001374: 6a3a ldr r2, [r7, #32] + 8001376: 605a str r2, [r3, #4] + for( uint32_t i = 0; i < ints_length; i++){ + 8001378: 2300 movs r3, #0 + 800137a: 633b str r3, [r7, #48] ; 0x30 + 800137c: 687b ldr r3, [r7, #4] + 800137e: 685b ldr r3, [r3, #4] + 8001380: 6b3a ldr r2, [r7, #48] ; 0x30 + 8001382: 429a cmp r2, r3 + 8001384: d236 bcs.n 80013f4 <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0xf6> + union { + int32_t real; + uint32_t base; + } u_st_ints; + u_st_ints.base = 0; + 8001386: 2300 movs r3, #0 + 8001388: 617b str r3, [r7, #20] + u_st_ints.base |= ((uint32_t) (*(inbuffer + offset + 0))) << (8 * 0); + 800138a: 697b ldr r3, [r7, #20] + 800138c: 6b7a ldr r2, [r7, #52] ; 0x34 + 800138e: 6839 ldr r1, [r7, #0] + 8001390: 440a add r2, r1 + 8001392: 7812 ldrb r2, [r2, #0] + 8001394: 4313 orrs r3, r2 + 8001396: 617b str r3, [r7, #20] + u_st_ints.base |= ((uint32_t) (*(inbuffer + offset + 1))) << (8 * 1); + 8001398: 697a ldr r2, [r7, #20] + 800139a: 6b7b ldr r3, [r7, #52] ; 0x34 + 800139c: 3301 adds r3, #1 + 800139e: 6839 ldr r1, [r7, #0] + 80013a0: 440b add r3, r1 + 80013a2: 781b ldrb r3, [r3, #0] + 80013a4: 021b lsls r3, r3, #8 + 80013a6: 4313 orrs r3, r2 + 80013a8: 617b str r3, [r7, #20] + u_st_ints.base |= ((uint32_t) (*(inbuffer + offset + 2))) << (8 * 2); + 80013aa: 697a ldr r2, [r7, #20] + 80013ac: 6b7b ldr r3, [r7, #52] ; 0x34 + 80013ae: 3302 adds r3, #2 + 80013b0: 6839 ldr r1, [r7, #0] + 80013b2: 440b add r3, r1 + 80013b4: 781b ldrb r3, [r3, #0] + 80013b6: 041b lsls r3, r3, #16 + 80013b8: 4313 orrs r3, r2 + 80013ba: 617b str r3, [r7, #20] + u_st_ints.base |= ((uint32_t) (*(inbuffer + offset + 3))) << (8 * 3); + 80013bc: 697a ldr r2, [r7, #20] + 80013be: 6b7b ldr r3, [r7, #52] ; 0x34 + 80013c0: 3303 adds r3, #3 + 80013c2: 6839 ldr r1, [r7, #0] + 80013c4: 440b add r3, r1 + 80013c6: 781b ldrb r3, [r3, #0] + 80013c8: 061b lsls r3, r3, #24 + 80013ca: 4313 orrs r3, r2 + 80013cc: 617b str r3, [r7, #20] + this->st_ints = u_st_ints.real; + 80013ce: 697a ldr r2, [r7, #20] + 80013d0: 687b ldr r3, [r7, #4] + 80013d2: 609a str r2, [r3, #8] + offset += sizeof(this->st_ints); + 80013d4: 6b7b ldr r3, [r7, #52] ; 0x34 + 80013d6: 3304 adds r3, #4 + 80013d8: 637b str r3, [r7, #52] ; 0x34 + memcpy( &(this->ints[i]), &(this->st_ints), sizeof(int32_t)); + 80013da: 687b ldr r3, [r7, #4] + 80013dc: 68da ldr r2, [r3, #12] + 80013de: 6b3b ldr r3, [r7, #48] ; 0x30 + 80013e0: 009b lsls r3, r3, #2 + 80013e2: 4413 add r3, r2 + 80013e4: 687a ldr r2, [r7, #4] + 80013e6: 3208 adds r2, #8 + 80013e8: 6812 ldr r2, [r2, #0] + 80013ea: 601a str r2, [r3, #0] + for( uint32_t i = 0; i < ints_length; i++){ + 80013ec: 6b3b ldr r3, [r7, #48] ; 0x30 + 80013ee: 3301 adds r3, #1 + 80013f0: 633b str r3, [r7, #48] ; 0x30 + 80013f2: e7c3 b.n 800137c <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x7e> } - break; - 8000efa: e021 b.n 8000f40 - case DMA_FIFO_THRESHOLD_FULL: - if (hdma->Init.MemBurst == DMA_MBURST_INC16) - 8000efc: 687b ldr r3, [r7, #4] - 8000efe: 6adb ldr r3, [r3, #44] ; 0x2c - 8000f00: f1b3 7fc0 cmp.w r3, #25165824 ; 0x1800000 - 8000f04: d11e bne.n 8000f44 - { - status = HAL_ERROR; - 8000f06: 2301 movs r3, #1 - 8000f08: 73fb strb r3, [r7, #15] + uint32_t floats_lengthT = ((uint32_t) (*(inbuffer + offset))); + 80013f4: 6b7b ldr r3, [r7, #52] ; 0x34 + 80013f6: 683a ldr r2, [r7, #0] + 80013f8: 4413 add r3, r2 + 80013fa: 781b ldrb r3, [r3, #0] + 80013fc: 61fb str r3, [r7, #28] + floats_lengthT |= ((uint32_t) (*(inbuffer + offset + 1))) << (8 * 1); + 80013fe: 6b7b ldr r3, [r7, #52] ; 0x34 + 8001400: 3301 adds r3, #1 + 8001402: 683a ldr r2, [r7, #0] + 8001404: 4413 add r3, r2 + 8001406: 781b ldrb r3, [r3, #0] + 8001408: 021b lsls r3, r3, #8 + 800140a: 69fa ldr r2, [r7, #28] + 800140c: 4313 orrs r3, r2 + 800140e: 61fb str r3, [r7, #28] + floats_lengthT |= ((uint32_t) (*(inbuffer + offset + 2))) << (8 * 2); + 8001410: 6b7b ldr r3, [r7, #52] ; 0x34 + 8001412: 3302 adds r3, #2 + 8001414: 683a ldr r2, [r7, #0] + 8001416: 4413 add r3, r2 + 8001418: 781b ldrb r3, [r3, #0] + 800141a: 041b lsls r3, r3, #16 + 800141c: 69fa ldr r2, [r7, #28] + 800141e: 4313 orrs r3, r2 + 8001420: 61fb str r3, [r7, #28] + floats_lengthT |= ((uint32_t) (*(inbuffer + offset + 3))) << (8 * 3); + 8001422: 6b7b ldr r3, [r7, #52] ; 0x34 + 8001424: 3303 adds r3, #3 + 8001426: 683a ldr r2, [r7, #0] + 8001428: 4413 add r3, r2 + 800142a: 781b ldrb r3, [r3, #0] + 800142c: 061b lsls r3, r3, #24 + 800142e: 69fa ldr r2, [r7, #28] + 8001430: 4313 orrs r3, r2 + 8001432: 61fb str r3, [r7, #28] + offset += sizeof(this->floats_length); + 8001434: 6b7b ldr r3, [r7, #52] ; 0x34 + 8001436: 3304 adds r3, #4 + 8001438: 637b str r3, [r7, #52] ; 0x34 + if(floats_lengthT > floats_length) + 800143a: 687b ldr r3, [r7, #4] + 800143c: 691b ldr r3, [r3, #16] + 800143e: 69fa ldr r2, [r7, #28] + 8001440: 429a cmp r2, r3 + 8001442: d90a bls.n 800145a <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x15c> + this->floats = (float*)realloc(this->floats, floats_lengthT * sizeof(float)); + 8001444: 687b ldr r3, [r7, #4] + 8001446: 699a ldr r2, [r3, #24] + 8001448: 69fb ldr r3, [r7, #28] + 800144a: 009b lsls r3, r3, #2 + 800144c: 4619 mov r1, r3 + 800144e: 4610 mov r0, r2 + 8001450: f008 fd2a bl 8009ea8 + 8001454: 4602 mov r2, r0 + 8001456: 687b ldr r3, [r7, #4] + 8001458: 619a str r2, [r3, #24] + floats_length = floats_lengthT; + 800145a: 687b ldr r3, [r7, #4] + 800145c: 69fa ldr r2, [r7, #28] + 800145e: 611a str r2, [r3, #16] + for( uint32_t i = 0; i < floats_length; i++){ + 8001460: 2300 movs r3, #0 + 8001462: 62fb str r3, [r7, #44] ; 0x2c + 8001464: 687b ldr r3, [r7, #4] + 8001466: 691b ldr r3, [r3, #16] + 8001468: 6afa ldr r2, [r7, #44] ; 0x2c + 800146a: 429a cmp r2, r3 + 800146c: d236 bcs.n 80014dc <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x1de> + union { + float real; + uint32_t base; + } u_st_floats; + u_st_floats.base = 0; + 800146e: 2300 movs r3, #0 + 8001470: 613b str r3, [r7, #16] + u_st_floats.base |= ((uint32_t) (*(inbuffer + offset + 0))) << (8 * 0); + 8001472: 693b ldr r3, [r7, #16] + 8001474: 6b7a ldr r2, [r7, #52] ; 0x34 + 8001476: 6839 ldr r1, [r7, #0] + 8001478: 440a add r2, r1 + 800147a: 7812 ldrb r2, [r2, #0] + 800147c: 4313 orrs r3, r2 + 800147e: 613b str r3, [r7, #16] + u_st_floats.base |= ((uint32_t) (*(inbuffer + offset + 1))) << (8 * 1); + 8001480: 693a ldr r2, [r7, #16] + 8001482: 6b7b ldr r3, [r7, #52] ; 0x34 + 8001484: 3301 adds r3, #1 + 8001486: 6839 ldr r1, [r7, #0] + 8001488: 440b add r3, r1 + 800148a: 781b ldrb r3, [r3, #0] + 800148c: 021b lsls r3, r3, #8 + 800148e: 4313 orrs r3, r2 + 8001490: 613b str r3, [r7, #16] + u_st_floats.base |= ((uint32_t) (*(inbuffer + offset + 2))) << (8 * 2); + 8001492: 693a ldr r2, [r7, #16] + 8001494: 6b7b ldr r3, [r7, #52] ; 0x34 + 8001496: 3302 adds r3, #2 + 8001498: 6839 ldr r1, [r7, #0] + 800149a: 440b add r3, r1 + 800149c: 781b ldrb r3, [r3, #0] + 800149e: 041b lsls r3, r3, #16 + 80014a0: 4313 orrs r3, r2 + 80014a2: 613b str r3, [r7, #16] + u_st_floats.base |= ((uint32_t) (*(inbuffer + offset + 3))) << (8 * 3); + 80014a4: 693a ldr r2, [r7, #16] + 80014a6: 6b7b ldr r3, [r7, #52] ; 0x34 + 80014a8: 3303 adds r3, #3 + 80014aa: 6839 ldr r1, [r7, #0] + 80014ac: 440b add r3, r1 + 80014ae: 781b ldrb r3, [r3, #0] + 80014b0: 061b lsls r3, r3, #24 + 80014b2: 4313 orrs r3, r2 + 80014b4: 613b str r3, [r7, #16] + this->st_floats = u_st_floats.real; + 80014b6: 693a ldr r2, [r7, #16] + 80014b8: 687b ldr r3, [r7, #4] + 80014ba: 615a str r2, [r3, #20] + offset += sizeof(this->st_floats); + 80014bc: 6b7b ldr r3, [r7, #52] ; 0x34 + 80014be: 3304 adds r3, #4 + 80014c0: 637b str r3, [r7, #52] ; 0x34 + memcpy( &(this->floats[i]), &(this->st_floats), sizeof(float)); + 80014c2: 687b ldr r3, [r7, #4] + 80014c4: 699a ldr r2, [r3, #24] + 80014c6: 6afb ldr r3, [r7, #44] ; 0x2c + 80014c8: 009b lsls r3, r3, #2 + 80014ca: 4413 add r3, r2 + 80014cc: 687a ldr r2, [r7, #4] + 80014ce: 3214 adds r2, #20 + 80014d0: 6812 ldr r2, [r2, #0] + 80014d2: 601a str r2, [r3, #0] + for( uint32_t i = 0; i < floats_length; i++){ + 80014d4: 6afb ldr r3, [r7, #44] ; 0x2c + 80014d6: 3301 adds r3, #1 + 80014d8: 62fb str r3, [r7, #44] ; 0x2c + 80014da: e7c3 b.n 8001464 <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x166> } - break; - 8000f0a: e01b b.n 8000f44 - } - - /* Memory Data size equal to Word */ - else - { - switch (tmp) - 8000f0c: 68bb ldr r3, [r7, #8] - 8000f0e: 2b02 cmp r3, #2 - 8000f10: d902 bls.n 8000f18 - 8000f12: 2b03 cmp r3, #3 - 8000f14: d003 beq.n 8000f1e - { - status = HAL_ERROR; + uint32_t strings_lengthT = ((uint32_t) (*(inbuffer + offset))); + 80014dc: 6b7b ldr r3, [r7, #52] ; 0x34 + 80014de: 683a ldr r2, [r7, #0] + 80014e0: 4413 add r3, r2 + 80014e2: 781b ldrb r3, [r3, #0] + 80014e4: 61bb str r3, [r7, #24] + strings_lengthT |= ((uint32_t) (*(inbuffer + offset + 1))) << (8 * 1); + 80014e6: 6b7b ldr r3, [r7, #52] ; 0x34 + 80014e8: 3301 adds r3, #1 + 80014ea: 683a ldr r2, [r7, #0] + 80014ec: 4413 add r3, r2 + 80014ee: 781b ldrb r3, [r3, #0] + 80014f0: 021b lsls r3, r3, #8 + 80014f2: 69ba ldr r2, [r7, #24] + 80014f4: 4313 orrs r3, r2 + 80014f6: 61bb str r3, [r7, #24] + strings_lengthT |= ((uint32_t) (*(inbuffer + offset + 2))) << (8 * 2); + 80014f8: 6b7b ldr r3, [r7, #52] ; 0x34 + 80014fa: 3302 adds r3, #2 + 80014fc: 683a ldr r2, [r7, #0] + 80014fe: 4413 add r3, r2 + 8001500: 781b ldrb r3, [r3, #0] + 8001502: 041b lsls r3, r3, #16 + 8001504: 69ba ldr r2, [r7, #24] + 8001506: 4313 orrs r3, r2 + 8001508: 61bb str r3, [r7, #24] + strings_lengthT |= ((uint32_t) (*(inbuffer + offset + 3))) << (8 * 3); + 800150a: 6b7b ldr r3, [r7, #52] ; 0x34 + 800150c: 3303 adds r3, #3 + 800150e: 683a ldr r2, [r7, #0] + 8001510: 4413 add r3, r2 + 8001512: 781b ldrb r3, [r3, #0] + 8001514: 061b lsls r3, r3, #24 + 8001516: 69ba ldr r2, [r7, #24] + 8001518: 4313 orrs r3, r2 + 800151a: 61bb str r3, [r7, #24] + offset += sizeof(this->strings_length); + 800151c: 6b7b ldr r3, [r7, #52] ; 0x34 + 800151e: 3304 adds r3, #4 + 8001520: 637b str r3, [r7, #52] ; 0x34 + if(strings_lengthT > strings_length) + 8001522: 687b ldr r3, [r7, #4] + 8001524: 69db ldr r3, [r3, #28] + 8001526: 69ba ldr r2, [r7, #24] + 8001528: 429a cmp r2, r3 + 800152a: d90a bls.n 8001542 <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x244> + this->strings = (char**)realloc(this->strings, strings_lengthT * sizeof(char*)); + 800152c: 687b ldr r3, [r7, #4] + 800152e: 6a5a ldr r2, [r3, #36] ; 0x24 + 8001530: 69bb ldr r3, [r7, #24] + 8001532: 009b lsls r3, r3, #2 + 8001534: 4619 mov r1, r3 + 8001536: 4610 mov r0, r2 + 8001538: f008 fcb6 bl 8009ea8 + 800153c: 4602 mov r2, r0 + 800153e: 687b ldr r3, [r7, #4] + 8001540: 625a str r2, [r3, #36] ; 0x24 + strings_length = strings_lengthT; + 8001542: 687b ldr r3, [r7, #4] + 8001544: 69ba ldr r2, [r7, #24] + 8001546: 61da str r2, [r3, #28] + for( uint32_t i = 0; i < strings_length; i++){ + 8001548: 2300 movs r3, #0 + 800154a: 62bb str r3, [r7, #40] ; 0x28 + 800154c: 687b ldr r3, [r7, #4] + 800154e: 69db ldr r3, [r3, #28] + 8001550: 6aba ldr r2, [r7, #40] ; 0x28 + 8001552: 429a cmp r2, r3 + 8001554: d23f bcs.n 80015d6 <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x2d8> + uint32_t length_st_strings; + arrToVar(length_st_strings, (inbuffer + offset)); + 8001556: 6b7b ldr r3, [r7, #52] ; 0x34 + 8001558: 683a ldr r2, [r7, #0] + 800155a: 441a add r2, r3 + 800155c: f107 030c add.w r3, r7, #12 + 8001560: 4611 mov r1, r2 + 8001562: 4618 mov r0, r3 + 8001564: f001 febd bl 80032e2 <_ZN3ros3Msg8arrToVarImPhEEvRT_T0_> + offset += 4; + 8001568: 6b7b ldr r3, [r7, #52] ; 0x34 + 800156a: 3304 adds r3, #4 + 800156c: 637b str r3, [r7, #52] ; 0x34 + for(unsigned int k= offset; k< offset+length_st_strings; ++k){ + 800156e: 6b7b ldr r3, [r7, #52] ; 0x34 + 8001570: 627b str r3, [r7, #36] ; 0x24 + 8001572: 6b7a ldr r2, [r7, #52] ; 0x34 + 8001574: 68fb ldr r3, [r7, #12] + 8001576: 4413 add r3, r2 + 8001578: 6a7a ldr r2, [r7, #36] ; 0x24 + 800157a: 429a cmp r2, r3 + 800157c: d20c bcs.n 8001598 <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x29a> + inbuffer[k-1]=inbuffer[k]; + 800157e: 683a ldr r2, [r7, #0] + 8001580: 6a7b ldr r3, [r7, #36] ; 0x24 + 8001582: 441a add r2, r3 + 8001584: 6a7b ldr r3, [r7, #36] ; 0x24 + 8001586: 3b01 subs r3, #1 + 8001588: 6839 ldr r1, [r7, #0] + 800158a: 440b add r3, r1 + 800158c: 7812 ldrb r2, [r2, #0] + 800158e: 701a strb r2, [r3, #0] + for(unsigned int k= offset; k< offset+length_st_strings; ++k){ + 8001590: 6a7b ldr r3, [r7, #36] ; 0x24 + 8001592: 3301 adds r3, #1 + 8001594: 627b str r3, [r7, #36] ; 0x24 + 8001596: e7ec b.n 8001572 <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x274> } - break; - default: - break; - 8000f16: e018 b.n 8000f4a - status = HAL_ERROR; - 8000f18: 2301 movs r3, #1 - 8000f1a: 73fb strb r3, [r7, #15] - break; - 8000f1c: e015 b.n 8000f4a - if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1) - 8000f1e: 687b ldr r3, [r7, #4] - 8000f20: 6adb ldr r3, [r3, #44] ; 0x2c - 8000f22: f003 7380 and.w r3, r3, #16777216 ; 0x1000000 - 8000f26: 2b00 cmp r3, #0 - 8000f28: d00e beq.n 8000f48 - status = HAL_ERROR; - 8000f2a: 2301 movs r3, #1 - 8000f2c: 73fb strb r3, [r7, #15] - break; - 8000f2e: e00b b.n 8000f48 - break; - 8000f30: bf00 nop - 8000f32: e00a b.n 8000f4a - break; - 8000f34: bf00 nop - 8000f36: e008 b.n 8000f4a - break; - 8000f38: bf00 nop - 8000f3a: e006 b.n 8000f4a - break; - 8000f3c: bf00 nop - 8000f3e: e004 b.n 8000f4a - break; - 8000f40: bf00 nop - 8000f42: e002 b.n 8000f4a - break; - 8000f44: bf00 nop - 8000f46: e000 b.n 8000f4a - break; - 8000f48: bf00 nop + inbuffer[offset+length_st_strings-1]=0; + 8001598: 6b7a ldr r2, [r7, #52] ; 0x34 + 800159a: 68fb ldr r3, [r7, #12] + 800159c: 4413 add r3, r2 + 800159e: 3b01 subs r3, #1 + 80015a0: 683a ldr r2, [r7, #0] + 80015a2: 4413 add r3, r2 + 80015a4: 2200 movs r2, #0 + 80015a6: 701a strb r2, [r3, #0] + this->st_strings = (char *)(inbuffer + offset-1); + 80015a8: 6b7b ldr r3, [r7, #52] ; 0x34 + 80015aa: 3b01 subs r3, #1 + 80015ac: 683a ldr r2, [r7, #0] + 80015ae: 441a add r2, r3 + 80015b0: 687b ldr r3, [r7, #4] + 80015b2: 621a str r2, [r3, #32] + offset += length_st_strings; + 80015b4: 6b7a ldr r2, [r7, #52] ; 0x34 + 80015b6: 68fb ldr r3, [r7, #12] + 80015b8: 4413 add r3, r2 + 80015ba: 637b str r3, [r7, #52] ; 0x34 + memcpy( &(this->strings[i]), &(this->st_strings), sizeof(char*)); + 80015bc: 687b ldr r3, [r7, #4] + 80015be: 6a5a ldr r2, [r3, #36] ; 0x24 + 80015c0: 6abb ldr r3, [r7, #40] ; 0x28 + 80015c2: 009b lsls r3, r3, #2 + 80015c4: 4413 add r3, r2 + 80015c6: 687a ldr r2, [r7, #4] + 80015c8: 3220 adds r2, #32 + 80015ca: 6812 ldr r2, [r2, #0] + 80015cc: 601a str r2, [r3, #0] + for( uint32_t i = 0; i < strings_length; i++){ + 80015ce: 6abb ldr r3, [r7, #40] ; 0x28 + 80015d0: 3301 adds r3, #1 + 80015d2: 62bb str r3, [r7, #40] ; 0x28 + 80015d4: e7ba b.n 800154c <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x24e> + } + return offset; + 80015d6: 6b7b ldr r3, [r7, #52] ; 0x34 } - } - - return status; - 8000f4a: 7bfb ldrb r3, [r7, #15] -} - 8000f4c: 4618 mov r0, r3 - 8000f4e: 3714 adds r7, #20 - 8000f50: 46bd mov sp, r7 - 8000f52: f85d 7b04 ldr.w r7, [sp], #4 - 8000f56: 4770 bx lr + 80015d8: 4618 mov r0, r3 + 80015da: 3738 adds r7, #56 ; 0x38 + 80015dc: 46bd mov sp, r7 + 80015de: bd80 pop {r7, pc} -08000f58 : - * @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains - * the configuration information for the specified GPIO peripheral. - * @retval None - */ -void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) +080015e0 <_ZN14rosserial_msgs20RequestParamResponse7getTypeEv>: + + const char * getType(){ return REQUESTPARAM; }; + 80015e0: b480 push {r7} + 80015e2: b083 sub sp, #12 + 80015e4: af00 add r7, sp, #0 + 80015e6: 6078 str r0, [r7, #4] + 80015e8: 4b03 ldr r3, [pc, #12] ; (80015f8 <_ZN14rosserial_msgs20RequestParamResponse7getTypeEv+0x18>) + 80015ea: 4618 mov r0, r3 + 80015ec: 370c adds r7, #12 + 80015ee: 46bd mov sp, r7 + 80015f0: f85d 7b04 ldr.w r7, [sp], #4 + 80015f4: 4770 bx lr + 80015f6: bf00 nop + 80015f8: 0800a47c .word 0x0800a47c + +080015fc <_ZN14rosserial_msgs20RequestParamResponse6getMD5Ev>: + const char * getMD5(){ return "9f0e98bda65981986ddf53afa7a40e49"; }; + 80015fc: b480 push {r7} + 80015fe: b083 sub sp, #12 + 8001600: af00 add r7, sp, #0 + 8001602: 6078 str r0, [r7, #4] + 8001604: 4b03 ldr r3, [pc, #12] ; (8001614 <_ZN14rosserial_msgs20RequestParamResponse6getMD5Ev+0x18>) + 8001606: 4618 mov r0, r3 + 8001608: 370c adds r7, #12 + 800160a: 46bd mov sp, r7 + 800160c: f85d 7b04 ldr.w r7, [sp], #4 + 8001610: 4770 bx lr + 8001612: bf00 nop + 8001614: 0800a20c .word 0x0800a20c + +08001618 <_ZN3ros9PublisherC1EPKcPNS_3MsgEi>: + +/* Generic Publisher */ +class Publisher { - 8000f58: b480 push {r7} - 8000f5a: b089 sub sp, #36 ; 0x24 - 8000f5c: af00 add r7, sp, #0 - 8000f5e: 6078 str r0, [r7, #4] - 8000f60: 6039 str r1, [r7, #0] - uint32_t position = 0x00; - 8000f62: 2300 movs r3, #0 - 8000f64: 61fb str r3, [r7, #28] - uint32_t ioposition = 0x00; - 8000f66: 2300 movs r3, #0 - 8000f68: 617b str r3, [r7, #20] - uint32_t iocurrent = 0x00; - 8000f6a: 2300 movs r3, #0 - 8000f6c: 613b str r3, [r7, #16] - uint32_t temp = 0x00; - 8000f6e: 2300 movs r3, #0 - 8000f70: 61bb str r3, [r7, #24] - assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); - assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); - assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); +public: + Publisher(const char * topic_name, Msg * msg, int endpoint = rosserial_msgs::TopicInfo::ID_PUBLISHER) : + 8001618: b480 push {r7} + 800161a: b085 sub sp, #20 + 800161c: af00 add r7, sp, #0 + 800161e: 60f8 str r0, [r7, #12] + 8001620: 60b9 str r1, [r7, #8] + 8001622: 607a str r2, [r7, #4] + 8001624: 603b str r3, [r7, #0] + topic_(topic_name), + msg_(msg), + endpoint_(endpoint) {}; + 8001626: 68fb ldr r3, [r7, #12] + 8001628: 68ba ldr r2, [r7, #8] + 800162a: 601a str r2, [r3, #0] + 800162c: 68fb ldr r3, [r7, #12] + 800162e: 687a ldr r2, [r7, #4] + 8001630: 605a str r2, [r3, #4] + 8001632: 68fb ldr r3, [r7, #12] + 8001634: 683a ldr r2, [r7, #0] + 8001636: 611a str r2, [r3, #16] + 8001638: 68fb ldr r3, [r7, #12] + 800163a: 4618 mov r0, r3 + 800163c: 3714 adds r7, #20 + 800163e: 46bd mov sp, r7 + 8001640: f85d 7b04 ldr.w r7, [sp], #4 + 8001644: 4770 bx lr + +08001646 <_ZN3ros9Publisher7publishEPKNS_3MsgE>: - /* Configure the port pins */ - for(position = 0; position < GPIO_NUMBER; position++) - 8000f72: 2300 movs r3, #0 - 8000f74: 61fb str r3, [r7, #28] - 8000f76: e175 b.n 8001264 + int publish(const Msg * msg) + 8001646: b580 push {r7, lr} + 8001648: b082 sub sp, #8 + 800164a: af00 add r7, sp, #0 + 800164c: 6078 str r0, [r7, #4] + 800164e: 6039 str r1, [r7, #0] { - /* Get the IO position */ - ioposition = ((uint32_t)0x01) << position; - 8000f78: 2201 movs r2, #1 - 8000f7a: 69fb ldr r3, [r7, #28] - 8000f7c: fa02 f303 lsl.w r3, r2, r3 - 8000f80: 617b str r3, [r7, #20] - /* Get the current IO position */ - iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; - 8000f82: 683b ldr r3, [r7, #0] - 8000f84: 681b ldr r3, [r3, #0] - 8000f86: 697a ldr r2, [r7, #20] - 8000f88: 4013 ands r3, r2 - 8000f8a: 613b str r3, [r7, #16] + return nh_->publish(id_, msg); + 8001650: 687b ldr r3, [r7, #4] + 8001652: 68d8 ldr r0, [r3, #12] + 8001654: 687b ldr r3, [r7, #4] + 8001656: 68db ldr r3, [r3, #12] + 8001658: 681b ldr r3, [r3, #0] + 800165a: 681b ldr r3, [r3, #0] + 800165c: 687a ldr r2, [r7, #4] + 800165e: 6891 ldr r1, [r2, #8] + 8001660: 683a ldr r2, [r7, #0] + 8001662: 4798 blx r3 + 8001664: 4603 mov r3, r0 + }; + 8001666: 4618 mov r0, r3 + 8001668: 3708 adds r7, #8 + 800166a: 46bd mov sp, r7 + 800166c: bd80 pop {r7, pc} - if(iocurrent == ioposition) - 8000f8c: 693a ldr r2, [r7, #16] - 8000f8e: 697b ldr r3, [r7, #20] - 8000f90: 429a cmp r2, r3 - 8000f92: f040 8164 bne.w 800125e - { - /*--------------------- GPIO Mode Configuration ------------------------*/ - /* In case of Alternate function mode selection */ - if((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) - 8000f96: 683b ldr r3, [r7, #0] - 8000f98: 685b ldr r3, [r3, #4] - 8000f9a: 2b02 cmp r3, #2 - 8000f9c: d003 beq.n 8000fa6 - 8000f9e: 683b ldr r3, [r7, #0] - 8000fa0: 685b ldr r3, [r3, #4] - 8000fa2: 2b12 cmp r3, #18 - 8000fa4: d123 bne.n 8000fee - { - /* Check the Alternate function parameter */ - assert_param(IS_GPIO_AF(GPIO_Init->Alternate)); - - /* Configure Alternate function mapped with the current IO */ - temp = GPIOx->AFR[position >> 3]; - 8000fa6: 69fb ldr r3, [r7, #28] - 8000fa8: 08da lsrs r2, r3, #3 - 8000faa: 687b ldr r3, [r7, #4] - 8000fac: 3208 adds r2, #8 - 8000fae: f853 3022 ldr.w r3, [r3, r2, lsl #2] - 8000fb2: 61bb str r3, [r7, #24] - temp &= ~((uint32_t)0xF << ((uint32_t)(position & (uint32_t)0x07) * 4)) ; - 8000fb4: 69fb ldr r3, [r7, #28] - 8000fb6: f003 0307 and.w r3, r3, #7 - 8000fba: 009b lsls r3, r3, #2 - 8000fbc: 220f movs r2, #15 - 8000fbe: fa02 f303 lsl.w r3, r2, r3 - 8000fc2: 43db mvns r3, r3 - 8000fc4: 69ba ldr r2, [r7, #24] - 8000fc6: 4013 ands r3, r2 - 8000fc8: 61bb str r3, [r7, #24] - temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & (uint32_t)0x07) * 4)); - 8000fca: 683b ldr r3, [r7, #0] - 8000fcc: 691a ldr r2, [r3, #16] - 8000fce: 69fb ldr r3, [r7, #28] - 8000fd0: f003 0307 and.w r3, r3, #7 - 8000fd4: 009b lsls r3, r3, #2 - 8000fd6: fa02 f303 lsl.w r3, r2, r3 - 8000fda: 69ba ldr r2, [r7, #24] - 8000fdc: 4313 orrs r3, r2 - 8000fde: 61bb str r3, [r7, #24] - GPIOx->AFR[position >> 3] = temp; - 8000fe0: 69fb ldr r3, [r7, #28] - 8000fe2: 08da lsrs r2, r3, #3 - 8000fe4: 687b ldr r3, [r7, #4] - 8000fe6: 3208 adds r2, #8 - 8000fe8: 69b9 ldr r1, [r7, #24] - 8000fea: f843 1022 str.w r1, [r3, r2, lsl #2] - } +0800166e <_ZN3ros9Publisher15getEndpointTypeEv>: + int getEndpointType() + 800166e: b480 push {r7} + 8001670: b083 sub sp, #12 + 8001672: af00 add r7, sp, #0 + 8001674: 6078 str r0, [r7, #4] + { + return endpoint_; + 8001676: 687b ldr r3, [r7, #4] + 8001678: 691b ldr r3, [r3, #16] + } + 800167a: 4618 mov r0, r3 + 800167c: 370c adds r7, #12 + 800167e: 46bd mov sp, r7 + 8001680: f85d 7b04 ldr.w r7, [sp], #4 + 8001684: 4770 bx lr - /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ - temp = GPIOx->MODER; - 8000fee: 687b ldr r3, [r7, #4] - 8000ff0: 681b ldr r3, [r3, #0] - 8000ff2: 61bb str r3, [r7, #24] - temp &= ~(GPIO_MODER_MODER0 << (position * 2)); - 8000ff4: 69fb ldr r3, [r7, #28] - 8000ff6: 005b lsls r3, r3, #1 - 8000ff8: 2203 movs r2, #3 - 8000ffa: fa02 f303 lsl.w r3, r2, r3 - 8000ffe: 43db mvns r3, r3 - 8001000: 69ba ldr r2, [r7, #24] - 8001002: 4013 ands r3, r2 - 8001004: 61bb str r3, [r7, #24] - temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2)); - 8001006: 683b ldr r3, [r7, #0] - 8001008: 685b ldr r3, [r3, #4] - 800100a: f003 0203 and.w r2, r3, #3 - 800100e: 69fb ldr r3, [r7, #28] - 8001010: 005b lsls r3, r3, #1 - 8001012: fa02 f303 lsl.w r3, r2, r3 - 8001016: 69ba ldr r2, [r7, #24] - 8001018: 4313 orrs r3, r2 - 800101a: 61bb str r3, [r7, #24] - GPIOx->MODER = temp; - 800101c: 687b ldr r3, [r7, #4] - 800101e: 69ba ldr r2, [r7, #24] - 8001020: 601a str r2, [r3, #0] +08001686 <_ZN13STM32Hardware10getRdmaIndEv>: + UART_HandleTypeDef *huart; - /* In case of Output or Alternate function mode selection */ - if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) || - 8001022: 683b ldr r3, [r7, #0] - 8001024: 685b ldr r3, [r3, #4] - 8001026: 2b01 cmp r3, #1 - 8001028: d00b beq.n 8001042 - 800102a: 683b ldr r3, [r7, #0] - 800102c: 685b ldr r3, [r3, #4] - 800102e: 2b02 cmp r3, #2 - 8001030: d007 beq.n 8001042 - (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) - 8001032: 683b ldr r3, [r7, #0] - 8001034: 685b ldr r3, [r3, #4] - if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) || - 8001036: 2b11 cmp r3, #17 - 8001038: d003 beq.n 8001042 - (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) - 800103a: 683b ldr r3, [r7, #0] - 800103c: 685b ldr r3, [r3, #4] - 800103e: 2b12 cmp r3, #18 - 8001040: d130 bne.n 80010a4 - { - /* Check the Speed parameter */ - assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); - /* Configure the IO Speed */ - temp = GPIOx->OSPEEDR; - 8001042: 687b ldr r3, [r7, #4] - 8001044: 689b ldr r3, [r3, #8] - 8001046: 61bb str r3, [r7, #24] - temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2)); - 8001048: 69fb ldr r3, [r7, #28] - 800104a: 005b lsls r3, r3, #1 - 800104c: 2203 movs r2, #3 - 800104e: fa02 f303 lsl.w r3, r2, r3 - 8001052: 43db mvns r3, r3 - 8001054: 69ba ldr r2, [r7, #24] - 8001056: 4013 ands r3, r2 - 8001058: 61bb str r3, [r7, #24] - temp |= (GPIO_Init->Speed << (position * 2)); - 800105a: 683b ldr r3, [r7, #0] - 800105c: 68da ldr r2, [r3, #12] - 800105e: 69fb ldr r3, [r7, #28] - 8001060: 005b lsls r3, r3, #1 - 8001062: fa02 f303 lsl.w r3, r2, r3 - 8001066: 69ba ldr r2, [r7, #24] - 8001068: 4313 orrs r3, r2 - 800106a: 61bb str r3, [r7, #24] - GPIOx->OSPEEDR = temp; - 800106c: 687b ldr r3, [r7, #4] - 800106e: 69ba ldr r2, [r7, #24] - 8001070: 609a str r2, [r3, #8] + const static uint16_t rbuflen = 128; + uint8_t rbuf[rbuflen]; + uint32_t rind; + inline uint32_t getRdmaInd(void){ return (rbuflen - huart->hdmarx->Instance->NDTR) & (rbuflen - 1); } + 8001686: b480 push {r7} + 8001688: b083 sub sp, #12 + 800168a: af00 add r7, sp, #0 + 800168c: 6078 str r0, [r7, #4] + 800168e: 687b ldr r3, [r7, #4] + 8001690: 681b ldr r3, [r3, #0] + 8001692: 6edb ldr r3, [r3, #108] ; 0x6c + 8001694: 681b ldr r3, [r3, #0] + 8001696: 685b ldr r3, [r3, #4] + 8001698: 425b negs r3, r3 + 800169a: f003 037f and.w r3, r3, #127 ; 0x7f + 800169e: 4618 mov r0, r3 + 80016a0: 370c adds r7, #12 + 80016a2: 46bd mov sp, r7 + 80016a4: f85d 7b04 ldr.w r7, [sp], #4 + 80016a8: 4770 bx lr + ... - /* Configure the IO Output Type */ - temp = GPIOx->OTYPER; - 8001072: 687b ldr r3, [r7, #4] - 8001074: 685b ldr r3, [r3, #4] - 8001076: 61bb str r3, [r7, #24] - temp &= ~(GPIO_OTYPER_OT_0 << position) ; - 8001078: 2201 movs r2, #1 - 800107a: 69fb ldr r3, [r7, #28] - 800107c: fa02 f303 lsl.w r3, r2, r3 - 8001080: 43db mvns r3, r3 - 8001082: 69ba ldr r2, [r7, #24] - 8001084: 4013 ands r3, r2 - 8001086: 61bb str r3, [r7, #24] - temp |= (((GPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4) << position); - 8001088: 683b ldr r3, [r7, #0] - 800108a: 685b ldr r3, [r3, #4] - 800108c: 091b lsrs r3, r3, #4 - 800108e: f003 0201 and.w r2, r3, #1 - 8001092: 69fb ldr r3, [r7, #28] - 8001094: fa02 f303 lsl.w r3, r2, r3 - 8001098: 69ba ldr r2, [r7, #24] - 800109a: 4313 orrs r3, r2 - 800109c: 61bb str r3, [r7, #24] - GPIOx->OTYPER = temp; - 800109e: 687b ldr r3, [r7, #4] - 80010a0: 69ba ldr r2, [r7, #24] - 80010a2: 605a str r2, [r3, #4] - } +080016ac <_ZN13STM32HardwareC1Ev>: + const static uint16_t tbuflen = 256; + uint8_t tbuf[tbuflen]; + uint32_t twind, tfind; - /* Activate the Pull-up or Pull down resistor for the current IO */ - temp = GPIOx->PUPDR; - 80010a4: 687b ldr r3, [r7, #4] - 80010a6: 68db ldr r3, [r3, #12] - 80010a8: 61bb str r3, [r7, #24] - temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2)); - 80010aa: 69fb ldr r3, [r7, #28] - 80010ac: 005b lsls r3, r3, #1 - 80010ae: 2203 movs r2, #3 - 80010b0: fa02 f303 lsl.w r3, r2, r3 - 80010b4: 43db mvns r3, r3 - 80010b6: 69ba ldr r2, [r7, #24] - 80010b8: 4013 ands r3, r2 - 80010ba: 61bb str r3, [r7, #24] - temp |= ((GPIO_Init->Pull) << (position * 2)); - 80010bc: 683b ldr r3, [r7, #0] - 80010be: 689a ldr r2, [r3, #8] - 80010c0: 69fb ldr r3, [r7, #28] - 80010c2: 005b lsls r3, r3, #1 - 80010c4: fa02 f303 lsl.w r3, r2, r3 - 80010c8: 69ba ldr r2, [r7, #24] - 80010ca: 4313 orrs r3, r2 - 80010cc: 61bb str r3, [r7, #24] - GPIOx->PUPDR = temp; - 80010ce: 687b ldr r3, [r7, #4] - 80010d0: 69ba ldr r2, [r7, #24] - 80010d2: 60da str r2, [r3, #12] + public: + STM32Hardware(): + 80016ac: b480 push {r7} + 80016ae: b083 sub sp, #12 + 80016b0: af00 add r7, sp, #0 + 80016b2: 6078 str r0, [r7, #4] + huart(&huart6), rind(0), twind(0), tfind(0){ + 80016b4: 687b ldr r3, [r7, #4] + 80016b6: 4a0a ldr r2, [pc, #40] ; (80016e0 <_ZN13STM32HardwareC1Ev+0x34>) + 80016b8: 601a str r2, [r3, #0] + 80016ba: 687b ldr r3, [r7, #4] + 80016bc: 2200 movs r2, #0 + 80016be: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 80016c2: 687b ldr r3, [r7, #4] + 80016c4: 2200 movs r2, #0 + 80016c6: f8c3 2188 str.w r2, [r3, #392] ; 0x188 + 80016ca: 687b ldr r3, [r7, #4] + 80016cc: 2200 movs r2, #0 + 80016ce: f8c3 218c str.w r2, [r3, #396] ; 0x18c + } + 80016d2: 687b ldr r3, [r7, #4] + 80016d4: 4618 mov r0, r3 + 80016d6: 370c adds r7, #12 + 80016d8: 46bd mov sp, r7 + 80016da: f85d 7b04 ldr.w r7, [sp], #4 + 80016de: 4770 bx lr + 80016e0: 20000224 .word 0x20000224 - /*--------------------- EXTI Mode Configuration ------------------------*/ - /* Configure the External Interrupt or event for the current IO */ - if((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) - 80010d4: 683b ldr r3, [r7, #0] - 80010d6: 685b ldr r3, [r3, #4] - 80010d8: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 - 80010dc: 2b00 cmp r3, #0 - 80010de: f000 80be beq.w 800125e - { - /* Enable SYSCFG Clock */ - __HAL_RCC_SYSCFG_CLK_ENABLE(); - 80010e2: 4b65 ldr r3, [pc, #404] ; (8001278 ) - 80010e4: 6c5b ldr r3, [r3, #68] ; 0x44 - 80010e6: 4a64 ldr r2, [pc, #400] ; (8001278 ) - 80010e8: f443 4380 orr.w r3, r3, #16384 ; 0x4000 - 80010ec: 6453 str r3, [r2, #68] ; 0x44 - 80010ee: 4b62 ldr r3, [pc, #392] ; (8001278 ) - 80010f0: 6c5b ldr r3, [r3, #68] ; 0x44 - 80010f2: f403 4380 and.w r3, r3, #16384 ; 0x4000 - 80010f6: 60fb str r3, [r7, #12] - 80010f8: 68fb ldr r3, [r7, #12] +080016e4 <_ZN13STM32Hardware4initEv>: - temp = SYSCFG->EXTICR[position >> 2]; - 80010fa: 4a60 ldr r2, [pc, #384] ; (800127c ) - 80010fc: 69fb ldr r3, [r7, #28] - 80010fe: 089b lsrs r3, r3, #2 - 8001100: 3302 adds r3, #2 - 8001102: f852 3023 ldr.w r3, [r2, r3, lsl #2] - 8001106: 61bb str r3, [r7, #24] - temp &= ~(((uint32_t)0x0F) << (4 * (position & 0x03))); - 8001108: 69fb ldr r3, [r7, #28] - 800110a: f003 0303 and.w r3, r3, #3 - 800110e: 009b lsls r3, r3, #2 - 8001110: 220f movs r2, #15 - 8001112: fa02 f303 lsl.w r3, r2, r3 - 8001116: 43db mvns r3, r3 - 8001118: 69ba ldr r2, [r7, #24] - 800111a: 4013 ands r3, r2 - 800111c: 61bb str r3, [r7, #24] - temp |= ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4 * (position & 0x03))); - 800111e: 687b ldr r3, [r7, #4] - 8001120: 4a57 ldr r2, [pc, #348] ; (8001280 ) - 8001122: 4293 cmp r3, r2 - 8001124: d037 beq.n 8001196 - 8001126: 687b ldr r3, [r7, #4] - 8001128: 4a56 ldr r2, [pc, #344] ; (8001284 ) - 800112a: 4293 cmp r3, r2 - 800112c: d031 beq.n 8001192 - 800112e: 687b ldr r3, [r7, #4] - 8001130: 4a55 ldr r2, [pc, #340] ; (8001288 ) - 8001132: 4293 cmp r3, r2 - 8001134: d02b beq.n 800118e - 8001136: 687b ldr r3, [r7, #4] - 8001138: 4a54 ldr r2, [pc, #336] ; (800128c ) - 800113a: 4293 cmp r3, r2 - 800113c: d025 beq.n 800118a - 800113e: 687b ldr r3, [r7, #4] - 8001140: 4a53 ldr r2, [pc, #332] ; (8001290 ) - 8001142: 4293 cmp r3, r2 - 8001144: d01f beq.n 8001186 - 8001146: 687b ldr r3, [r7, #4] - 8001148: 4a52 ldr r2, [pc, #328] ; (8001294 ) - 800114a: 4293 cmp r3, r2 - 800114c: d019 beq.n 8001182 - 800114e: 687b ldr r3, [r7, #4] - 8001150: 4a51 ldr r2, [pc, #324] ; (8001298 ) - 8001152: 4293 cmp r3, r2 - 8001154: d013 beq.n 800117e - 8001156: 687b ldr r3, [r7, #4] - 8001158: 4a50 ldr r2, [pc, #320] ; (800129c ) - 800115a: 4293 cmp r3, r2 - 800115c: d00d beq.n 800117a - 800115e: 687b ldr r3, [r7, #4] - 8001160: 4a4f ldr r2, [pc, #316] ; (80012a0 ) - 8001162: 4293 cmp r3, r2 - 8001164: d007 beq.n 8001176 - 8001166: 687b ldr r3, [r7, #4] - 8001168: 4a4e ldr r2, [pc, #312] ; (80012a4 ) - 800116a: 4293 cmp r3, r2 - 800116c: d101 bne.n 8001172 - 800116e: 2309 movs r3, #9 - 8001170: e012 b.n 8001198 - 8001172: 230a movs r3, #10 - 8001174: e010 b.n 8001198 - 8001176: 2308 movs r3, #8 - 8001178: e00e b.n 8001198 - 800117a: 2307 movs r3, #7 - 800117c: e00c b.n 8001198 - 800117e: 2306 movs r3, #6 - 8001180: e00a b.n 8001198 - 8001182: 2305 movs r3, #5 - 8001184: e008 b.n 8001198 - 8001186: 2304 movs r3, #4 - 8001188: e006 b.n 8001198 - 800118a: 2303 movs r3, #3 - 800118c: e004 b.n 8001198 - 800118e: 2302 movs r3, #2 - 8001190: e002 b.n 8001198 - 8001192: 2301 movs r3, #1 - 8001194: e000 b.n 8001198 - 8001196: 2300 movs r3, #0 - 8001198: 69fa ldr r2, [r7, #28] - 800119a: f002 0203 and.w r2, r2, #3 - 800119e: 0092 lsls r2, r2, #2 - 80011a0: 4093 lsls r3, r2 - 80011a2: 69ba ldr r2, [r7, #24] - 80011a4: 4313 orrs r3, r2 - 80011a6: 61bb str r3, [r7, #24] - SYSCFG->EXTICR[position >> 2] = temp; - 80011a8: 4934 ldr r1, [pc, #208] ; (800127c ) - 80011aa: 69fb ldr r3, [r7, #28] - 80011ac: 089b lsrs r3, r3, #2 - 80011ae: 3302 adds r3, #2 - 80011b0: 69ba ldr r2, [r7, #24] - 80011b2: f841 2023 str.w r2, [r1, r3, lsl #2] + STM32Hardware(UART_HandleTypeDef *huart_): + huart(huart_), rind(0), twind(0), tfind(0){ + } + + void init(){ + 80016e4: b580 push {r7, lr} + 80016e6: b082 sub sp, #8 + 80016e8: af00 add r7, sp, #0 + 80016ea: 6078 str r0, [r7, #4] + reset_rbuf(); + 80016ec: 6878 ldr r0, [r7, #4] + 80016ee: f000 f804 bl 80016fa <_ZN13STM32Hardware10reset_rbufEv> + } + 80016f2: bf00 nop + 80016f4: 3708 adds r7, #8 + 80016f6: 46bd mov sp, r7 + 80016f8: bd80 pop {r7, pc} - /* Clear EXTI line configuration */ - temp = EXTI->IMR; - 80011b6: 4b3c ldr r3, [pc, #240] ; (80012a8 ) - 80011b8: 681b ldr r3, [r3, #0] - 80011ba: 61bb str r3, [r7, #24] - temp &= ~((uint32_t)iocurrent); - 80011bc: 693b ldr r3, [r7, #16] - 80011be: 43db mvns r3, r3 - 80011c0: 69ba ldr r2, [r7, #24] - 80011c2: 4013 ands r3, r2 - 80011c4: 61bb str r3, [r7, #24] - if((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) - 80011c6: 683b ldr r3, [r7, #0] - 80011c8: 685b ldr r3, [r3, #4] - 80011ca: f403 3380 and.w r3, r3, #65536 ; 0x10000 - 80011ce: 2b00 cmp r3, #0 - 80011d0: d003 beq.n 80011da - { - temp |= iocurrent; - 80011d2: 69ba ldr r2, [r7, #24] - 80011d4: 693b ldr r3, [r7, #16] - 80011d6: 4313 orrs r3, r2 - 80011d8: 61bb str r3, [r7, #24] - } - EXTI->IMR = temp; - 80011da: 4a33 ldr r2, [pc, #204] ; (80012a8 ) - 80011dc: 69bb ldr r3, [r7, #24] - 80011de: 6013 str r3, [r2, #0] +080016fa <_ZN13STM32Hardware10reset_rbufEv>: - temp = EXTI->EMR; - 80011e0: 4b31 ldr r3, [pc, #196] ; (80012a8 ) - 80011e2: 685b ldr r3, [r3, #4] - 80011e4: 61bb str r3, [r7, #24] - temp &= ~((uint32_t)iocurrent); - 80011e6: 693b ldr r3, [r7, #16] - 80011e8: 43db mvns r3, r3 - 80011ea: 69ba ldr r2, [r7, #24] - 80011ec: 4013 ands r3, r2 - 80011ee: 61bb str r3, [r7, #24] - if((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) - 80011f0: 683b ldr r3, [r7, #0] - 80011f2: 685b ldr r3, [r3, #4] - 80011f4: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 80011f8: 2b00 cmp r3, #0 - 80011fa: d003 beq.n 8001204 - { - temp |= iocurrent; - 80011fc: 69ba ldr r2, [r7, #24] - 80011fe: 693b ldr r3, [r7, #16] - 8001200: 4313 orrs r3, r2 - 8001202: 61bb str r3, [r7, #24] - } - EXTI->EMR = temp; - 8001204: 4a28 ldr r2, [pc, #160] ; (80012a8 ) - 8001206: 69bb ldr r3, [r7, #24] - 8001208: 6053 str r3, [r2, #4] + void reset_rbuf(void){ + 80016fa: b580 push {r7, lr} + 80016fc: b082 sub sp, #8 + 80016fe: af00 add r7, sp, #0 + 8001700: 6078 str r0, [r7, #4] + HAL_UART_Receive_DMA(huart, rbuf, rbuflen); + 8001702: 687b ldr r3, [r7, #4] + 8001704: 6818 ldr r0, [r3, #0] + 8001706: 687b ldr r3, [r7, #4] + 8001708: 3304 adds r3, #4 + 800170a: 2280 movs r2, #128 ; 0x80 + 800170c: 4619 mov r1, r3 + 800170e: f006 f92b bl 8007968 + } + 8001712: bf00 nop + 8001714: 3708 adds r7, #8 + 8001716: 46bd mov sp, r7 + 8001718: bd80 pop {r7, pc} - /* Clear Rising Falling edge configuration */ - temp = EXTI->RTSR; - 800120a: 4b27 ldr r3, [pc, #156] ; (80012a8 ) - 800120c: 689b ldr r3, [r3, #8] - 800120e: 61bb str r3, [r7, #24] - temp &= ~((uint32_t)iocurrent); - 8001210: 693b ldr r3, [r7, #16] - 8001212: 43db mvns r3, r3 - 8001214: 69ba ldr r2, [r7, #24] - 8001216: 4013 ands r3, r2 - 8001218: 61bb str r3, [r7, #24] - if((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) - 800121a: 683b ldr r3, [r7, #0] - 800121c: 685b ldr r3, [r3, #4] - 800121e: f403 1380 and.w r3, r3, #1048576 ; 0x100000 - 8001222: 2b00 cmp r3, #0 - 8001224: d003 beq.n 800122e - { - temp |= iocurrent; - 8001226: 69ba ldr r2, [r7, #24] - 8001228: 693b ldr r3, [r7, #16] - 800122a: 4313 orrs r3, r2 - 800122c: 61bb str r3, [r7, #24] - } - EXTI->RTSR = temp; - 800122e: 4a1e ldr r2, [pc, #120] ; (80012a8 ) - 8001230: 69bb ldr r3, [r7, #24] - 8001232: 6093 str r3, [r2, #8] +0800171a <_ZN13STM32Hardware4readEv>: - temp = EXTI->FTSR; - 8001234: 4b1c ldr r3, [pc, #112] ; (80012a8 ) - 8001236: 68db ldr r3, [r3, #12] - 8001238: 61bb str r3, [r7, #24] - temp &= ~((uint32_t)iocurrent); - 800123a: 693b ldr r3, [r7, #16] - 800123c: 43db mvns r3, r3 - 800123e: 69ba ldr r2, [r7, #24] - 8001240: 4013 ands r3, r2 - 8001242: 61bb str r3, [r7, #24] - if((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) - 8001244: 683b ldr r3, [r7, #0] - 8001246: 685b ldr r3, [r3, #4] - 8001248: f403 1300 and.w r3, r3, #2097152 ; 0x200000 - 800124c: 2b00 cmp r3, #0 - 800124e: d003 beq.n 8001258 - { - temp |= iocurrent; - 8001250: 69ba ldr r2, [r7, #24] - 8001252: 693b ldr r3, [r7, #16] - 8001254: 4313 orrs r3, r2 - 8001256: 61bb str r3, [r7, #24] - } - EXTI->FTSR = temp; - 8001258: 4a13 ldr r2, [pc, #76] ; (80012a8 ) - 800125a: 69bb ldr r3, [r7, #24] - 800125c: 60d3 str r3, [r2, #12] - for(position = 0; position < GPIO_NUMBER; position++) - 800125e: 69fb ldr r3, [r7, #28] - 8001260: 3301 adds r3, #1 - 8001262: 61fb str r3, [r7, #28] - 8001264: 69fb ldr r3, [r7, #28] - 8001266: 2b0f cmp r3, #15 - 8001268: f67f ae86 bls.w 8000f78 + int read(){ + 800171a: b590 push {r4, r7, lr} + 800171c: b085 sub sp, #20 + 800171e: af00 add r7, sp, #0 + 8001720: 6078 str r0, [r7, #4] + int c = -1; + 8001722: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff + 8001726: 60fb str r3, [r7, #12] + if(rind != getRdmaInd()){ + 8001728: 687b ldr r3, [r7, #4] + 800172a: f8d3 4084 ldr.w r4, [r3, #132] ; 0x84 + 800172e: 6878 ldr r0, [r7, #4] + 8001730: f7ff ffa9 bl 8001686 <_ZN13STM32Hardware10getRdmaIndEv> + 8001734: 4603 mov r3, r0 + 8001736: 429c cmp r4, r3 + 8001738: bf14 ite ne + 800173a: 2301 movne r3, #1 + 800173c: 2300 moveq r3, #0 + 800173e: b2db uxtb r3, r3 + 8001740: 2b00 cmp r3, #0 + 8001742: d012 beq.n 800176a <_ZN13STM32Hardware4readEv+0x50> + c = rbuf[rind++]; + 8001744: 687b ldr r3, [r7, #4] + 8001746: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 + 800174a: 1c59 adds r1, r3, #1 + 800174c: 687a ldr r2, [r7, #4] + 800174e: f8c2 1084 str.w r1, [r2, #132] ; 0x84 + 8001752: 687a ldr r2, [r7, #4] + 8001754: 4413 add r3, r2 + 8001756: 791b ldrb r3, [r3, #4] + 8001758: 60fb str r3, [r7, #12] + rind &= rbuflen - 1; + 800175a: 687b ldr r3, [r7, #4] + 800175c: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 + 8001760: f003 027f and.w r2, r3, #127 ; 0x7f + 8001764: 687b ldr r3, [r7, #4] + 8001766: f8c3 2084 str.w r2, [r3, #132] ; 0x84 } + return c; + 800176a: 68fb ldr r3, [r7, #12] } - } -} - 800126c: bf00 nop - 800126e: 3724 adds r7, #36 ; 0x24 - 8001270: 46bd mov sp, r7 - 8001272: f85d 7b04 ldr.w r7, [sp], #4 - 8001276: 4770 bx lr - 8001278: 40023800 .word 0x40023800 - 800127c: 40013800 .word 0x40013800 - 8001280: 40020000 .word 0x40020000 - 8001284: 40020400 .word 0x40020400 - 8001288: 40020800 .word 0x40020800 - 800128c: 40020c00 .word 0x40020c00 - 8001290: 40021000 .word 0x40021000 - 8001294: 40021400 .word 0x40021400 - 8001298: 40021800 .word 0x40021800 - 800129c: 40021c00 .word 0x40021c00 - 80012a0: 40022000 .word 0x40022000 - 80012a4: 40022400 .word 0x40022400 - 80012a8: 40013c00 .word 0x40013c00 - -080012ac : - * @arg GPIO_PIN_RESET: to clear the port pin - * @arg GPIO_PIN_SET: to set the port pin - * @retval None - */ -void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) -{ - 80012ac: b480 push {r7} - 80012ae: b083 sub sp, #12 - 80012b0: af00 add r7, sp, #0 - 80012b2: 6078 str r0, [r7, #4] - 80012b4: 460b mov r3, r1 - 80012b6: 807b strh r3, [r7, #2] - 80012b8: 4613 mov r3, r2 - 80012ba: 707b strb r3, [r7, #1] - /* Check the parameters */ - assert_param(IS_GPIO_PIN(GPIO_Pin)); - assert_param(IS_GPIO_PIN_ACTION(PinState)); - - if(PinState != GPIO_PIN_RESET) - 80012bc: 787b ldrb r3, [r7, #1] - 80012be: 2b00 cmp r3, #0 - 80012c0: d003 beq.n 80012ca - { - GPIOx->BSRR = GPIO_Pin; - 80012c2: 887a ldrh r2, [r7, #2] - 80012c4: 687b ldr r3, [r7, #4] - 80012c6: 619a str r2, [r3, #24] - } - else - { - GPIOx->BSRR = (uint32_t)GPIO_Pin << 16; - } -} - 80012c8: e003 b.n 80012d2 - GPIOx->BSRR = (uint32_t)GPIO_Pin << 16; - 80012ca: 887b ldrh r3, [r7, #2] - 80012cc: 041a lsls r2, r3, #16 - 80012ce: 687b ldr r3, [r7, #4] - 80012d0: 619a str r2, [r3, #24] -} - 80012d2: bf00 nop - 80012d4: 370c adds r7, #12 - 80012d6: 46bd mov sp, r7 - 80012d8: f85d 7b04 ldr.w r7, [sp], #4 - 80012dc: 4770 bx lr - ... - -080012e0 : - * supported by this function. User should request a transition to HSE Off - * first and then HSE On or HSE Bypass. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) -{ - 80012e0: b580 push {r7, lr} - 80012e2: b086 sub sp, #24 - 80012e4: af00 add r7, sp, #0 - 80012e6: 6078 str r0, [r7, #4] - uint32_t tickstart; - FlagStatus pwrclkchanged = RESET; - 80012e8: 2300 movs r3, #0 - 80012ea: 75fb strb r3, [r7, #23] - - /* Check Null pointer */ - if(RCC_OscInitStruct == NULL) - 80012ec: 687b ldr r3, [r7, #4] - 80012ee: 2b00 cmp r3, #0 - 80012f0: d101 bne.n 80012f6 - { - return HAL_ERROR; - 80012f2: 2301 movs r3, #1 - 80012f4: e25e b.n 80017b4 - - /* Check the parameters */ - assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); + 800176c: 4618 mov r0, r3 + 800176e: 3714 adds r7, #20 + 8001770: 46bd mov sp, r7 + 8001772: bd90 pop {r4, r7, pc} - /*------------------------------- HSE Configuration ------------------------*/ - if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) - 80012f6: 687b ldr r3, [r7, #4] - 80012f8: 681b ldr r3, [r3, #0] - 80012fa: f003 0301 and.w r3, r3, #1 - 80012fe: 2b00 cmp r3, #0 - 8001300: f000 8087 beq.w 8001412 - { - /* Check the parameters */ - assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); - /* When the HSE is used as system clock or clock source for PLL, It can not be disabled */ - if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) - 8001304: 4b96 ldr r3, [pc, #600] ; (8001560 ) - 8001306: 689b ldr r3, [r3, #8] - 8001308: f003 030c and.w r3, r3, #12 - 800130c: 2b04 cmp r3, #4 - 800130e: d00c beq.n 800132a - || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE))) - 8001310: 4b93 ldr r3, [pc, #588] ; (8001560 ) - 8001312: 689b ldr r3, [r3, #8] - 8001314: f003 030c and.w r3, r3, #12 - 8001318: 2b08 cmp r3, #8 - 800131a: d112 bne.n 8001342 - 800131c: 4b90 ldr r3, [pc, #576] ; (8001560 ) - 800131e: 685b ldr r3, [r3, #4] - 8001320: f403 0380 and.w r3, r3, #4194304 ; 0x400000 - 8001324: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000 - 8001328: d10b bne.n 8001342 - { - if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) - 800132a: 4b8d ldr r3, [pc, #564] ; (8001560 ) - 800132c: 681b ldr r3, [r3, #0] - 800132e: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 8001332: 2b00 cmp r3, #0 - 8001334: d06c beq.n 8001410 - 8001336: 687b ldr r3, [r7, #4] - 8001338: 685b ldr r3, [r3, #4] - 800133a: 2b00 cmp r3, #0 - 800133c: d168 bne.n 8001410 - { - return HAL_ERROR; - 800133e: 2301 movs r3, #1 - 8001340: e238 b.n 80017b4 - } - } - else - { - /* Set the new HSE configuration ---------------------------------------*/ - __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); - 8001342: 687b ldr r3, [r7, #4] - 8001344: 685b ldr r3, [r3, #4] - 8001346: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 800134a: d106 bne.n 800135a - 800134c: 4b84 ldr r3, [pc, #528] ; (8001560 ) - 800134e: 681b ldr r3, [r3, #0] - 8001350: 4a83 ldr r2, [pc, #524] ; (8001560 ) - 8001352: f443 3380 orr.w r3, r3, #65536 ; 0x10000 - 8001356: 6013 str r3, [r2, #0] - 8001358: e02e b.n 80013b8 - 800135a: 687b ldr r3, [r7, #4] - 800135c: 685b ldr r3, [r3, #4] - 800135e: 2b00 cmp r3, #0 - 8001360: d10c bne.n 800137c - 8001362: 4b7f ldr r3, [pc, #508] ; (8001560 ) - 8001364: 681b ldr r3, [r3, #0] - 8001366: 4a7e ldr r2, [pc, #504] ; (8001560 ) - 8001368: f423 3380 bic.w r3, r3, #65536 ; 0x10000 - 800136c: 6013 str r3, [r2, #0] - 800136e: 4b7c ldr r3, [pc, #496] ; (8001560 ) - 8001370: 681b ldr r3, [r3, #0] - 8001372: 4a7b ldr r2, [pc, #492] ; (8001560 ) - 8001374: f423 2380 bic.w r3, r3, #262144 ; 0x40000 - 8001378: 6013 str r3, [r2, #0] - 800137a: e01d b.n 80013b8 - 800137c: 687b ldr r3, [r7, #4] - 800137e: 685b ldr r3, [r3, #4] - 8001380: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000 - 8001384: d10c bne.n 80013a0 - 8001386: 4b76 ldr r3, [pc, #472] ; (8001560 ) - 8001388: 681b ldr r3, [r3, #0] - 800138a: 4a75 ldr r2, [pc, #468] ; (8001560 ) - 800138c: f443 2380 orr.w r3, r3, #262144 ; 0x40000 - 8001390: 6013 str r3, [r2, #0] - 8001392: 4b73 ldr r3, [pc, #460] ; (8001560 ) - 8001394: 681b ldr r3, [r3, #0] - 8001396: 4a72 ldr r2, [pc, #456] ; (8001560 ) - 8001398: f443 3380 orr.w r3, r3, #65536 ; 0x10000 - 800139c: 6013 str r3, [r2, #0] - 800139e: e00b b.n 80013b8 - 80013a0: 4b6f ldr r3, [pc, #444] ; (8001560 ) - 80013a2: 681b ldr r3, [r3, #0] - 80013a4: 4a6e ldr r2, [pc, #440] ; (8001560 ) - 80013a6: f423 3380 bic.w r3, r3, #65536 ; 0x10000 - 80013aa: 6013 str r3, [r2, #0] - 80013ac: 4b6c ldr r3, [pc, #432] ; (8001560 ) - 80013ae: 681b ldr r3, [r3, #0] - 80013b0: 4a6b ldr r2, [pc, #428] ; (8001560 ) - 80013b2: f423 2380 bic.w r3, r3, #262144 ; 0x40000 - 80013b6: 6013 str r3, [r2, #0] +08001774 <_ZN13STM32Hardware5flushEv>: - /* Check the HSE State */ - if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF) - 80013b8: 687b ldr r3, [r7, #4] - 80013ba: 685b ldr r3, [r3, #4] - 80013bc: 2b00 cmp r3, #0 - 80013be: d013 beq.n 80013e8 - { - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - 80013c0: f7ff f914 bl 80005ec - 80013c4: 6138 str r0, [r7, #16] + void flush(void){ + 8001774: b580 push {r7, lr} + 8001776: b084 sub sp, #16 + 8001778: af00 add r7, sp, #0 + 800177a: 6078 str r0, [r7, #4] + static bool mutex = false; - /* Wait till HSE is ready */ - while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) - 80013c6: e008 b.n 80013da - { - if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) - 80013c8: f7ff f910 bl 80005ec - 80013cc: 4602 mov r2, r0 - 80013ce: 693b ldr r3, [r7, #16] - 80013d0: 1ad3 subs r3, r2, r3 - 80013d2: 2b64 cmp r3, #100 ; 0x64 - 80013d4: d901 bls.n 80013da - { - return HAL_TIMEOUT; - 80013d6: 2303 movs r3, #3 - 80013d8: e1ec b.n 80017b4 - while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) - 80013da: 4b61 ldr r3, [pc, #388] ; (8001560 ) - 80013dc: 681b ldr r3, [r3, #0] - 80013de: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 80013e2: 2b00 cmp r3, #0 - 80013e4: d0f0 beq.n 80013c8 - 80013e6: e014 b.n 8001412 - } - } - else - { - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - 80013e8: f7ff f900 bl 80005ec - 80013ec: 6138 str r0, [r7, #16] + if((huart->gState == HAL_UART_STATE_READY) && !mutex){ + 800177c: 687b ldr r3, [r7, #4] + 800177e: 681b ldr r3, [r3, #0] + 8001780: 6f5b ldr r3, [r3, #116] ; 0x74 + 8001782: 2b20 cmp r3, #32 + 8001784: d108 bne.n 8001798 <_ZN13STM32Hardware5flushEv+0x24> + 8001786: 4b27 ldr r3, [pc, #156] ; (8001824 <_ZN13STM32Hardware5flushEv+0xb0>) + 8001788: 781b ldrb r3, [r3, #0] + 800178a: f083 0301 eor.w r3, r3, #1 + 800178e: b2db uxtb r3, r3 + 8001790: 2b00 cmp r3, #0 + 8001792: d001 beq.n 8001798 <_ZN13STM32Hardware5flushEv+0x24> + 8001794: 2301 movs r3, #1 + 8001796: e000 b.n 800179a <_ZN13STM32Hardware5flushEv+0x26> + 8001798: 2300 movs r3, #0 + 800179a: 2b00 cmp r3, #0 + 800179c: d03d beq.n 800181a <_ZN13STM32Hardware5flushEv+0xa6> + mutex = true; + 800179e: 4b21 ldr r3, [pc, #132] ; (8001824 <_ZN13STM32Hardware5flushEv+0xb0>) + 80017a0: 2201 movs r2, #1 + 80017a2: 701a strb r2, [r3, #0] - /* Wait till HSE is bypassed or disabled */ - while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) - 80013ee: e008 b.n 8001402 - { - if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) - 80013f0: f7ff f8fc bl 80005ec - 80013f4: 4602 mov r2, r0 - 80013f6: 693b ldr r3, [r7, #16] - 80013f8: 1ad3 subs r3, r2, r3 - 80013fa: 2b64 cmp r3, #100 ; 0x64 - 80013fc: d901 bls.n 8001402 - { - return HAL_TIMEOUT; - 80013fe: 2303 movs r3, #3 - 8001400: e1d8 b.n 80017b4 - while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) - 8001402: 4b57 ldr r3, [pc, #348] ; (8001560 ) - 8001404: 681b ldr r3, [r3, #0] - 8001406: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 800140a: 2b00 cmp r3, #0 - 800140c: d1f0 bne.n 80013f0 - 800140e: e000 b.n 8001412 - if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) - 8001410: bf00 nop + if(twind != tfind){ + 80017a4: 687b ldr r3, [r7, #4] + 80017a6: f8d3 2188 ldr.w r2, [r3, #392] ; 0x188 + 80017aa: 687b ldr r3, [r7, #4] + 80017ac: f8d3 318c ldr.w r3, [r3, #396] ; 0x18c + 80017b0: 429a cmp r2, r3 + 80017b2: d02f beq.n 8001814 <_ZN13STM32Hardware5flushEv+0xa0> + uint16_t len = tfind < twind ? twind - tfind : tbuflen - tfind; + 80017b4: 687b ldr r3, [r7, #4] + 80017b6: f8d3 218c ldr.w r2, [r3, #396] ; 0x18c + 80017ba: 687b ldr r3, [r7, #4] + 80017bc: f8d3 3188 ldr.w r3, [r3, #392] ; 0x188 + 80017c0: 429a cmp r2, r3 + 80017c2: d20a bcs.n 80017da <_ZN13STM32Hardware5flushEv+0x66> + 80017c4: 687b ldr r3, [r7, #4] + 80017c6: f8d3 3188 ldr.w r3, [r3, #392] ; 0x188 + 80017ca: b29a uxth r2, r3 + 80017cc: 687b ldr r3, [r7, #4] + 80017ce: f8d3 318c ldr.w r3, [r3, #396] ; 0x18c + 80017d2: b29b uxth r3, r3 + 80017d4: 1ad3 subs r3, r2, r3 + 80017d6: b29b uxth r3, r3 + 80017d8: e006 b.n 80017e8 <_ZN13STM32Hardware5flushEv+0x74> + 80017da: 687b ldr r3, [r7, #4] + 80017dc: f8d3 318c ldr.w r3, [r3, #396] ; 0x18c + 80017e0: b29b uxth r3, r3 + 80017e2: f5c3 7380 rsb r3, r3, #256 ; 0x100 + 80017e6: b29b uxth r3, r3 + 80017e8: 81fb strh r3, [r7, #14] + HAL_UART_Transmit_DMA(huart, &(tbuf[tfind]), len); + 80017ea: 687b ldr r3, [r7, #4] + 80017ec: 6818 ldr r0, [r3, #0] + 80017ee: 687b ldr r3, [r7, #4] + 80017f0: f8d3 318c ldr.w r3, [r3, #396] ; 0x18c + 80017f4: 3388 adds r3, #136 ; 0x88 + 80017f6: 687a ldr r2, [r7, #4] + 80017f8: 4413 add r3, r2 + 80017fa: 89fa ldrh r2, [r7, #14] + 80017fc: 4619 mov r1, r3 + 80017fe: f006 f837 bl 8007870 + tfind = (tfind + len) & (tbuflen - 1); + 8001802: 687b ldr r3, [r7, #4] + 8001804: f8d3 218c ldr.w r2, [r3, #396] ; 0x18c + 8001808: 89fb ldrh r3, [r7, #14] + 800180a: 4413 add r3, r2 + 800180c: b2da uxtb r2, r3 + 800180e: 687b ldr r3, [r7, #4] + 8001810: f8c3 218c str.w r2, [r3, #396] ; 0x18c } + mutex = false; + 8001814: 4b03 ldr r3, [pc, #12] ; (8001824 <_ZN13STM32Hardware5flushEv+0xb0>) + 8001816: 2200 movs r2, #0 + 8001818: 701a strb r2, [r3, #0] } } - } - /*----------------------------- HSI Configuration --------------------------*/ - if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) - 8001412: 687b ldr r3, [r7, #4] - 8001414: 681b ldr r3, [r3, #0] - 8001416: f003 0302 and.w r3, r3, #2 - 800141a: 2b00 cmp r3, #0 - 800141c: d069 beq.n 80014f2 - /* Check the parameters */ - assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); - assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); + 800181a: bf00 nop + 800181c: 3710 adds r7, #16 + 800181e: 46bd mov sp, r7 + 8001820: bd80 pop {r7, pc} + 8001822: bf00 nop + 8001824: 200000a0 .word 0x200000a0 - /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */ - if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) - 800141e: 4b50 ldr r3, [pc, #320] ; (8001560 ) - 8001420: 689b ldr r3, [r3, #8] - 8001422: f003 030c and.w r3, r3, #12 - 8001426: 2b00 cmp r3, #0 - 8001428: d00b beq.n 8001442 - || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI))) - 800142a: 4b4d ldr r3, [pc, #308] ; (8001560 ) - 800142c: 689b ldr r3, [r3, #8] - 800142e: f003 030c and.w r3, r3, #12 - 8001432: 2b08 cmp r3, #8 - 8001434: d11c bne.n 8001470 - 8001436: 4b4a ldr r3, [pc, #296] ; (8001560 ) - 8001438: 685b ldr r3, [r3, #4] - 800143a: f403 0380 and.w r3, r3, #4194304 ; 0x400000 - 800143e: 2b00 cmp r3, #0 - 8001440: d116 bne.n 8001470 - { - /* When HSI is used as system clock it will not disabled */ - if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) - 8001442: 4b47 ldr r3, [pc, #284] ; (8001560 ) - 8001444: 681b ldr r3, [r3, #0] - 8001446: f003 0302 and.w r3, r3, #2 - 800144a: 2b00 cmp r3, #0 - 800144c: d005 beq.n 800145a - 800144e: 687b ldr r3, [r7, #4] - 8001450: 68db ldr r3, [r3, #12] - 8001452: 2b01 cmp r3, #1 - 8001454: d001 beq.n 800145a - { - return HAL_ERROR; - 8001456: 2301 movs r3, #1 - 8001458: e1ac b.n 80017b4 - } - /* Otherwise, just the calibration is allowed */ - else - { - /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ - __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - 800145a: 4b41 ldr r3, [pc, #260] ; (8001560 ) - 800145c: 681b ldr r3, [r3, #0] - 800145e: f023 02f8 bic.w r2, r3, #248 ; 0xf8 - 8001462: 687b ldr r3, [r7, #4] - 8001464: 691b ldr r3, [r3, #16] - 8001466: 00db lsls r3, r3, #3 - 8001468: 493d ldr r1, [pc, #244] ; (8001560 ) - 800146a: 4313 orrs r3, r2 - 800146c: 600b str r3, [r1, #0] - if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) - 800146e: e040 b.n 80014f2 - } - } - else - { - /* Check the HSI State */ - if((RCC_OscInitStruct->HSIState)!= RCC_HSI_OFF) - 8001470: 687b ldr r3, [r7, #4] - 8001472: 68db ldr r3, [r3, #12] - 8001474: 2b00 cmp r3, #0 - 8001476: d023 beq.n 80014c0 - { - /* Enable the Internal High Speed oscillator (HSI). */ - __HAL_RCC_HSI_ENABLE(); - 8001478: 4b39 ldr r3, [pc, #228] ; (8001560 ) - 800147a: 681b ldr r3, [r3, #0] - 800147c: 4a38 ldr r2, [pc, #224] ; (8001560 ) - 800147e: f043 0301 orr.w r3, r3, #1 - 8001482: 6013 str r3, [r2, #0] +08001828 <_ZN13STM32Hardware5writeEPhi>: - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - 8001484: f7ff f8b2 bl 80005ec - 8001488: 6138 str r0, [r7, #16] + void write(uint8_t* data, int length){ + 8001828: b580 push {r7, lr} + 800182a: b086 sub sp, #24 + 800182c: af00 add r7, sp, #0 + 800182e: 60f8 str r0, [r7, #12] + 8001830: 60b9 str r1, [r7, #8] + 8001832: 607a str r2, [r7, #4] - /* Wait till HSI is ready */ - while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) - 800148a: e008 b.n 800149e - { - if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) - 800148c: f7ff f8ae bl 80005ec - 8001490: 4602 mov r2, r0 - 8001492: 693b ldr r3, [r7, #16] - 8001494: 1ad3 subs r3, r2, r3 - 8001496: 2b02 cmp r3, #2 - 8001498: d901 bls.n 800149e - { - return HAL_TIMEOUT; - 800149a: 2303 movs r3, #3 - 800149c: e18a b.n 80017b4 - while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) - 800149e: 4b30 ldr r3, [pc, #192] ; (8001560 ) - 80014a0: 681b ldr r3, [r3, #0] - 80014a2: f003 0302 and.w r3, r3, #2 - 80014a6: 2b00 cmp r3, #0 - 80014a8: d0f0 beq.n 800148c - } - } - /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ - __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - 80014aa: 4b2d ldr r3, [pc, #180] ; (8001560 ) - 80014ac: 681b ldr r3, [r3, #0] - 80014ae: f023 02f8 bic.w r2, r3, #248 ; 0xf8 - 80014b2: 687b ldr r3, [r7, #4] - 80014b4: 691b ldr r3, [r3, #16] - 80014b6: 00db lsls r3, r3, #3 - 80014b8: 4929 ldr r1, [pc, #164] ; (8001560 ) - 80014ba: 4313 orrs r3, r2 - 80014bc: 600b str r3, [r1, #0] - 80014be: e018 b.n 80014f2 - } - else - { - /* Disable the Internal High Speed oscillator (HSI). */ - __HAL_RCC_HSI_DISABLE(); - 80014c0: 4b27 ldr r3, [pc, #156] ; (8001560 ) - 80014c2: 681b ldr r3, [r3, #0] - 80014c4: 4a26 ldr r2, [pc, #152] ; (8001560 ) - 80014c6: f023 0301 bic.w r3, r3, #1 - 80014ca: 6013 str r3, [r2, #0] + int n = length; + 8001834: 687b ldr r3, [r7, #4] + 8001836: 617b str r3, [r7, #20] + n = n <= tbuflen ? n : tbuflen; + 8001838: 697b ldr r3, [r7, #20] + 800183a: f5b3 7f80 cmp.w r3, #256 ; 0x100 + 800183e: bfa8 it ge + 8001840: f44f 7380 movge.w r3, #256 ; 0x100 + 8001844: 617b str r3, [r7, #20] - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - 80014cc: f7ff f88e bl 80005ec - 80014d0: 6138 str r0, [r7, #16] + int n_tail = n <= tbuflen - twind ? n : tbuflen - twind; + 8001846: 68fb ldr r3, [r7, #12] + 8001848: f8d3 3188 ldr.w r3, [r3, #392] ; 0x188 + 800184c: f5c3 7280 rsb r2, r3, #256 ; 0x100 + 8001850: 697b ldr r3, [r7, #20] + 8001852: 4293 cmp r3, r2 + 8001854: bf28 it cs + 8001856: 4613 movcs r3, r2 + 8001858: 613b str r3, [r7, #16] + memcpy(&(tbuf[twind]), data, n_tail); + 800185a: 68fb ldr r3, [r7, #12] + 800185c: f8d3 3188 ldr.w r3, [r3, #392] ; 0x188 + 8001860: 3388 adds r3, #136 ; 0x88 + 8001862: 68fa ldr r2, [r7, #12] + 8001864: 4413 add r3, r2 + 8001866: 693a ldr r2, [r7, #16] + 8001868: 68b9 ldr r1, [r7, #8] + 800186a: 4618 mov r0, r3 + 800186c: f008 fb08 bl 8009e80 + twind = (twind + n) & (tbuflen - 1); + 8001870: 68fb ldr r3, [r7, #12] + 8001872: f8d3 2188 ldr.w r2, [r3, #392] ; 0x188 + 8001876: 697b ldr r3, [r7, #20] + 8001878: 4413 add r3, r2 + 800187a: b2da uxtb r2, r3 + 800187c: 68fb ldr r3, [r7, #12] + 800187e: f8c3 2188 str.w r2, [r3, #392] ; 0x188 - /* Wait till HSI is ready */ - while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) - 80014d2: e008 b.n 80014e6 - { - if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) - 80014d4: f7ff f88a bl 80005ec - 80014d8: 4602 mov r2, r0 - 80014da: 693b ldr r3, [r7, #16] - 80014dc: 1ad3 subs r3, r2, r3 - 80014de: 2b02 cmp r3, #2 - 80014e0: d901 bls.n 80014e6 - { - return HAL_TIMEOUT; - 80014e2: 2303 movs r3, #3 - 80014e4: e166 b.n 80017b4 - while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) - 80014e6: 4b1e ldr r3, [pc, #120] ; (8001560 ) - 80014e8: 681b ldr r3, [r3, #0] - 80014ea: f003 0302 and.w r3, r3, #2 - 80014ee: 2b00 cmp r3, #0 - 80014f0: d1f0 bne.n 80014d4 - } + if(n != n_tail){ + 8001882: 697a ldr r2, [r7, #20] + 8001884: 693b ldr r3, [r7, #16] + 8001886: 429a cmp r2, r3 + 8001888: d00b beq.n 80018a2 <_ZN13STM32Hardware5writeEPhi+0x7a> + memcpy(tbuf, &(data[n_tail]), n - n_tail); + 800188a: 68fb ldr r3, [r7, #12] + 800188c: f103 0088 add.w r0, r3, #136 ; 0x88 + 8001890: 693b ldr r3, [r7, #16] + 8001892: 68ba ldr r2, [r7, #8] + 8001894: 18d1 adds r1, r2, r3 + 8001896: 697a ldr r2, [r7, #20] + 8001898: 693b ldr r3, [r7, #16] + 800189a: 1ad3 subs r3, r2, r3 + 800189c: 461a mov r2, r3 + 800189e: f008 faef bl 8009e80 } - } - } - /*------------------------------ LSI Configuration -------------------------*/ - if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) - 80014f2: 687b ldr r3, [r7, #4] - 80014f4: 681b ldr r3, [r3, #0] - 80014f6: f003 0308 and.w r3, r3, #8 - 80014fa: 2b00 cmp r3, #0 - 80014fc: d038 beq.n 8001570 - { - /* Check the parameters */ - assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); - - /* Check the LSI State */ - if((RCC_OscInitStruct->LSIState)!= RCC_LSI_OFF) - 80014fe: 687b ldr r3, [r7, #4] - 8001500: 695b ldr r3, [r3, #20] - 8001502: 2b00 cmp r3, #0 - 8001504: d019 beq.n 800153a - { - /* Enable the Internal Low Speed oscillator (LSI). */ - __HAL_RCC_LSI_ENABLE(); - 8001506: 4b16 ldr r3, [pc, #88] ; (8001560 ) - 8001508: 6f5b ldr r3, [r3, #116] ; 0x74 - 800150a: 4a15 ldr r2, [pc, #84] ; (8001560 ) - 800150c: f043 0301 orr.w r3, r3, #1 - 8001510: 6753 str r3, [r2, #116] ; 0x74 - - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - 8001512: f7ff f86b bl 80005ec - 8001516: 6138 str r0, [r7, #16] - /* Wait till LSI is ready */ - while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) - 8001518: e008 b.n 800152c - { - if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) - 800151a: f7ff f867 bl 80005ec - 800151e: 4602 mov r2, r0 - 8001520: 693b ldr r3, [r7, #16] - 8001522: 1ad3 subs r3, r2, r3 - 8001524: 2b02 cmp r3, #2 - 8001526: d901 bls.n 800152c - { - return HAL_TIMEOUT; - 8001528: 2303 movs r3, #3 - 800152a: e143 b.n 80017b4 - while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) - 800152c: 4b0c ldr r3, [pc, #48] ; (8001560 ) - 800152e: 6f5b ldr r3, [r3, #116] ; 0x74 - 8001530: f003 0302 and.w r3, r3, #2 - 8001534: 2b00 cmp r3, #0 - 8001536: d0f0 beq.n 800151a - 8001538: e01a b.n 8001570 - } + flush(); + 80018a2: 68f8 ldr r0, [r7, #12] + 80018a4: f7ff ff66 bl 8001774 <_ZN13STM32Hardware5flushEv> } - else - { - /* Disable the Internal Low Speed oscillator (LSI). */ - __HAL_RCC_LSI_DISABLE(); - 800153a: 4b09 ldr r3, [pc, #36] ; (8001560 ) - 800153c: 6f5b ldr r3, [r3, #116] ; 0x74 - 800153e: 4a08 ldr r2, [pc, #32] ; (8001560 ) - 8001540: f023 0301 bic.w r3, r3, #1 - 8001544: 6753 str r3, [r2, #116] ; 0x74 + 80018a8: bf00 nop + 80018aa: 3718 adds r7, #24 + 80018ac: 46bd mov sp, r7 + 80018ae: bd80 pop {r7, pc} - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - 8001546: f7ff f851 bl 80005ec - 800154a: 6138 str r0, [r7, #16] +080018b0 <_ZN13STM32Hardware4timeEv>: - /* Wait till LSI is ready */ - while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) - 800154c: e00a b.n 8001564 - { - if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) - 800154e: f7ff f84d bl 80005ec - 8001552: 4602 mov r2, r0 - 8001554: 693b ldr r3, [r7, #16] - 8001556: 1ad3 subs r3, r2, r3 - 8001558: 2b02 cmp r3, #2 - 800155a: d903 bls.n 8001564 - { - return HAL_TIMEOUT; - 800155c: 2303 movs r3, #3 - 800155e: e129 b.n 80017b4 - 8001560: 40023800 .word 0x40023800 - while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) - 8001564: 4b95 ldr r3, [pc, #596] ; (80017bc ) - 8001566: 6f5b ldr r3, [r3, #116] ; 0x74 - 8001568: f003 0302 and.w r3, r3, #2 - 800156c: 2b00 cmp r3, #0 - 800156e: d1ee bne.n 800154e - } - } - } + unsigned long time(){ return HAL_GetTick(); } + 80018b0: b580 push {r7, lr} + 80018b2: b082 sub sp, #8 + 80018b4: af00 add r7, sp, #0 + 80018b6: 6078 str r0, [r7, #4] + 80018b8: f003 f832 bl 8004920 + 80018bc: 4603 mov r3, r0 + 80018be: 4618 mov r0, r3 + 80018c0: 3708 adds r7, #8 + 80018c2: 46bd mov sp, r7 + 80018c4: bd80 pop {r7, pc} + ... + +080018c8 <_ZN7EncoderC1Ev>: + Encoder(){ + 80018c8: b480 push {r7} + 80018ca: b083 sub sp, #12 + 80018cc: af00 add r7, sp, #0 + 80018ce: 6078 str r0, [r7, #4] + 80018d0: 687b ldr r3, [r7, #4] + 80018d2: 4a09 ldr r2, [pc, #36] ; (80018f8 <_ZN7EncoderC1Ev+0x30>) + 80018d4: 611a str r2, [r3, #16] + 80018d6: 687b ldr r3, [r7, #4] + 80018d8: 4a08 ldr r2, [pc, #32] ; (80018fc <_ZN7EncoderC1Ev+0x34>) + 80018da: 615a str r2, [r3, #20] + 80018dc: 687b ldr r3, [r7, #4] + 80018de: 4a08 ldr r2, [pc, #32] ; (8001900 <_ZN7EncoderC1Ev+0x38>) + 80018e0: 619a str r2, [r3, #24] + timer_ = NULL; + 80018e2: 687b ldr r3, [r7, #4] + 80018e4: 2200 movs r2, #0 + 80018e6: 601a str r2, [r3, #0] } - /*------------------------------ LSE Configuration -------------------------*/ - if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) - 8001570: 687b ldr r3, [r7, #4] - 8001572: 681b ldr r3, [r3, #0] - 8001574: f003 0304 and.w r3, r3, #4 - 8001578: 2b00 cmp r3, #0 - 800157a: f000 80a4 beq.w 80016c6 - /* Check the parameters */ - assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); + 80018e8: 687b ldr r3, [r7, #4] + 80018ea: 4618 mov r0, r3 + 80018ec: 370c adds r7, #12 + 80018ee: 46bd mov sp, r7 + 80018f0: f85d 7b04 ldr.w r7, [sp], #4 + 80018f4: 4770 bx lr + 80018f6: bf00 nop + 80018f8: 00012110 .word 0x00012110 + 80018fc: 40490fd0 .word 0x40490fd0 + 8001900: 3f40ff97 .word 0x3f40ff97 + +08001904 <_ZN8std_msgs6HeaderC1Ev>: + typedef ros::Time _stamp_type; + _stamp_type stamp; + typedef const char* _frame_id_type; + _frame_id_type frame_id; - /* Update LSE configuration in Backup Domain control register */ - /* Requires to enable write access to Backup Domain of necessary */ - if(__HAL_RCC_PWR_IS_CLK_DISABLED()) - 800157e: 4b8f ldr r3, [pc, #572] ; (80017bc ) - 8001580: 6c1b ldr r3, [r3, #64] ; 0x40 - 8001582: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 - 8001586: 2b00 cmp r3, #0 - 8001588: d10d bne.n 80015a6 + Header(): + 8001904: b580 push {r7, lr} + 8001906: b082 sub sp, #8 + 8001908: af00 add r7, sp, #0 + 800190a: 6078 str r0, [r7, #4] + seq(0), + stamp(), + frame_id("") + 800190c: 687b ldr r3, [r7, #4] + 800190e: 4618 mov r0, r3 + 8001910: f7fe ff9e bl 8000850 <_ZN3ros3MsgC1Ev> + 8001914: 4a09 ldr r2, [pc, #36] ; (800193c <_ZN8std_msgs6HeaderC1Ev+0x38>) + 8001916: 687b ldr r3, [r7, #4] + 8001918: 601a str r2, [r3, #0] + 800191a: 687b ldr r3, [r7, #4] + 800191c: 2200 movs r2, #0 + 800191e: 605a str r2, [r3, #4] + 8001920: 687b ldr r3, [r7, #4] + 8001922: 3308 adds r3, #8 + 8001924: 4618 mov r0, r3 + 8001926: f7ff f83f bl 80009a8 <_ZN3ros4TimeC1Ev> + 800192a: 687b ldr r3, [r7, #4] + 800192c: 4a04 ldr r2, [pc, #16] ; (8001940 <_ZN8std_msgs6HeaderC1Ev+0x3c>) + 800192e: 611a str r2, [r3, #16] { - /* Enable Power Clock*/ - __HAL_RCC_PWR_CLK_ENABLE(); - 800158a: 4b8c ldr r3, [pc, #560] ; (80017bc ) - 800158c: 6c1b ldr r3, [r3, #64] ; 0x40 - 800158e: 4a8b ldr r2, [pc, #556] ; (80017bc ) - 8001590: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 - 8001594: 6413 str r3, [r2, #64] ; 0x40 - 8001596: 4b89 ldr r3, [pc, #548] ; (80017bc ) - 8001598: 6c1b ldr r3, [r3, #64] ; 0x40 - 800159a: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 - 800159e: 60fb str r3, [r7, #12] - 80015a0: 68fb ldr r3, [r7, #12] - pwrclkchanged = SET; - 80015a2: 2301 movs r3, #1 - 80015a4: 75fb strb r3, [r7, #23] } + 8001930: 687b ldr r3, [r7, #4] + 8001932: 4618 mov r0, r3 + 8001934: 3708 adds r7, #8 + 8001936: 46bd mov sp, r7 + 8001938: bd80 pop {r7, pc} + 800193a: bf00 nop + 800193c: 0800a574 .word 0x0800a574 + 8001940: 0800a128 .word 0x0800a128 - if(HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP)) - 80015a6: 4b86 ldr r3, [pc, #536] ; (80017c0 ) - 80015a8: 681b ldr r3, [r3, #0] - 80015aa: f403 7380 and.w r3, r3, #256 ; 0x100 - 80015ae: 2b00 cmp r3, #0 - 80015b0: d118 bne.n 80015e4 - { - /* Enable write access to Backup domain */ - PWR->CR1 |= PWR_CR1_DBP; - 80015b2: 4b83 ldr r3, [pc, #524] ; (80017c0 ) - 80015b4: 681b ldr r3, [r3, #0] - 80015b6: 4a82 ldr r2, [pc, #520] ; (80017c0 ) - 80015b8: f443 7380 orr.w r3, r3, #256 ; 0x100 - 80015bc: 6013 str r3, [r2, #0] - - /* Wait for Backup domain Write protection disable */ - tickstart = HAL_GetTick(); - 80015be: f7ff f815 bl 80005ec - 80015c2: 6138 str r0, [r7, #16] - - while(HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP)) - 80015c4: e008 b.n 80015d8 - { - if((HAL_GetTick() - tickstart ) > RCC_DBP_TIMEOUT_VALUE) - 80015c6: f7ff f811 bl 80005ec - 80015ca: 4602 mov r2, r0 - 80015cc: 693b ldr r3, [r7, #16] - 80015ce: 1ad3 subs r3, r2, r3 - 80015d0: 2b64 cmp r3, #100 ; 0x64 - 80015d2: d901 bls.n 80015d8 - { - return HAL_TIMEOUT; - 80015d4: 2303 movs r3, #3 - 80015d6: e0ed b.n 80017b4 - while(HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP)) - 80015d8: 4b79 ldr r3, [pc, #484] ; (80017c0 ) - 80015da: 681b ldr r3, [r3, #0] - 80015dc: f403 7380 and.w r3, r3, #256 ; 0x100 - 80015e0: 2b00 cmp r3, #0 - 80015e2: d0f0 beq.n 80015c6 - } - } - } +08001944 <_ZNK8std_msgs6Header9serializeEPh>: - /* Set the new LSE configuration -----------------------------------------*/ - __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); - 80015e4: 687b ldr r3, [r7, #4] - 80015e6: 689b ldr r3, [r3, #8] - 80015e8: 2b01 cmp r3, #1 - 80015ea: d106 bne.n 80015fa - 80015ec: 4b73 ldr r3, [pc, #460] ; (80017bc ) - 80015ee: 6f1b ldr r3, [r3, #112] ; 0x70 - 80015f0: 4a72 ldr r2, [pc, #456] ; (80017bc ) - 80015f2: f043 0301 orr.w r3, r3, #1 - 80015f6: 6713 str r3, [r2, #112] ; 0x70 - 80015f8: e02d b.n 8001656 - 80015fa: 687b ldr r3, [r7, #4] - 80015fc: 689b ldr r3, [r3, #8] - 80015fe: 2b00 cmp r3, #0 - 8001600: d10c bne.n 800161c - 8001602: 4b6e ldr r3, [pc, #440] ; (80017bc ) - 8001604: 6f1b ldr r3, [r3, #112] ; 0x70 - 8001606: 4a6d ldr r2, [pc, #436] ; (80017bc ) - 8001608: f023 0301 bic.w r3, r3, #1 - 800160c: 6713 str r3, [r2, #112] ; 0x70 - 800160e: 4b6b ldr r3, [pc, #428] ; (80017bc ) - 8001610: 6f1b ldr r3, [r3, #112] ; 0x70 - 8001612: 4a6a ldr r2, [pc, #424] ; (80017bc ) - 8001614: f023 0304 bic.w r3, r3, #4 - 8001618: 6713 str r3, [r2, #112] ; 0x70 - 800161a: e01c b.n 8001656 - 800161c: 687b ldr r3, [r7, #4] - 800161e: 689b ldr r3, [r3, #8] - 8001620: 2b05 cmp r3, #5 - 8001622: d10c bne.n 800163e - 8001624: 4b65 ldr r3, [pc, #404] ; (80017bc ) - 8001626: 6f1b ldr r3, [r3, #112] ; 0x70 - 8001628: 4a64 ldr r2, [pc, #400] ; (80017bc ) - 800162a: f043 0304 orr.w r3, r3, #4 - 800162e: 6713 str r3, [r2, #112] ; 0x70 - 8001630: 4b62 ldr r3, [pc, #392] ; (80017bc ) - 8001632: 6f1b ldr r3, [r3, #112] ; 0x70 - 8001634: 4a61 ldr r2, [pc, #388] ; (80017bc ) - 8001636: f043 0301 orr.w r3, r3, #1 - 800163a: 6713 str r3, [r2, #112] ; 0x70 - 800163c: e00b b.n 8001656 - 800163e: 4b5f ldr r3, [pc, #380] ; (80017bc ) - 8001640: 6f1b ldr r3, [r3, #112] ; 0x70 - 8001642: 4a5e ldr r2, [pc, #376] ; (80017bc ) - 8001644: f023 0301 bic.w r3, r3, #1 - 8001648: 6713 str r3, [r2, #112] ; 0x70 - 800164a: 4b5c ldr r3, [pc, #368] ; (80017bc ) - 800164c: 6f1b ldr r3, [r3, #112] ; 0x70 - 800164e: 4a5b ldr r2, [pc, #364] ; (80017bc ) - 8001650: f023 0304 bic.w r3, r3, #4 - 8001654: 6713 str r3, [r2, #112] ; 0x70 - /* Check the LSE State */ - if((RCC_OscInitStruct->LSEState) != RCC_LSE_OFF) - 8001656: 687b ldr r3, [r7, #4] - 8001658: 689b ldr r3, [r3, #8] - 800165a: 2b00 cmp r3, #0 - 800165c: d015 beq.n 800168a + virtual int serialize(unsigned char *outbuffer) const + 8001944: b580 push {r7, lr} + 8001946: b084 sub sp, #16 + 8001948: af00 add r7, sp, #0 + 800194a: 6078 str r0, [r7, #4] + 800194c: 6039 str r1, [r7, #0] { - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - 800165e: f7fe ffc5 bl 80005ec - 8001662: 6138 str r0, [r7, #16] - - /* Wait till LSE is ready */ - while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) - 8001664: e00a b.n 800167c - { - if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) - 8001666: f7fe ffc1 bl 80005ec - 800166a: 4602 mov r2, r0 - 800166c: 693b ldr r3, [r7, #16] - 800166e: 1ad3 subs r3, r2, r3 - 8001670: f241 3288 movw r2, #5000 ; 0x1388 - 8001674: 4293 cmp r3, r2 - 8001676: d901 bls.n 800167c - { - return HAL_TIMEOUT; - 8001678: 2303 movs r3, #3 - 800167a: e09b b.n 80017b4 - while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) - 800167c: 4b4f ldr r3, [pc, #316] ; (80017bc ) - 800167e: 6f1b ldr r3, [r3, #112] ; 0x70 - 8001680: f003 0302 and.w r3, r3, #2 - 8001684: 2b00 cmp r3, #0 - 8001686: d0ee beq.n 8001666 - 8001688: e014 b.n 80016b4 - } + int offset = 0; + 800194e: 2300 movs r3, #0 + 8001950: 60fb str r3, [r7, #12] + *(outbuffer + offset + 0) = (this->seq >> (8 * 0)) & 0xFF; + 8001952: 687b ldr r3, [r7, #4] + 8001954: 6859 ldr r1, [r3, #4] + 8001956: 68fb ldr r3, [r7, #12] + 8001958: 683a ldr r2, [r7, #0] + 800195a: 4413 add r3, r2 + 800195c: b2ca uxtb r2, r1 + 800195e: 701a strb r2, [r3, #0] + *(outbuffer + offset + 1) = (this->seq >> (8 * 1)) & 0xFF; + 8001960: 687b ldr r3, [r7, #4] + 8001962: 685b ldr r3, [r3, #4] + 8001964: 0a19 lsrs r1, r3, #8 + 8001966: 68fb ldr r3, [r7, #12] + 8001968: 3301 adds r3, #1 + 800196a: 683a ldr r2, [r7, #0] + 800196c: 4413 add r3, r2 + 800196e: b2ca uxtb r2, r1 + 8001970: 701a strb r2, [r3, #0] + *(outbuffer + offset + 2) = (this->seq >> (8 * 2)) & 0xFF; + 8001972: 687b ldr r3, [r7, #4] + 8001974: 685b ldr r3, [r3, #4] + 8001976: 0c19 lsrs r1, r3, #16 + 8001978: 68fb ldr r3, [r7, #12] + 800197a: 3302 adds r3, #2 + 800197c: 683a ldr r2, [r7, #0] + 800197e: 4413 add r3, r2 + 8001980: b2ca uxtb r2, r1 + 8001982: 701a strb r2, [r3, #0] + *(outbuffer + offset + 3) = (this->seq >> (8 * 3)) & 0xFF; + 8001984: 687b ldr r3, [r7, #4] + 8001986: 685b ldr r3, [r3, #4] + 8001988: 0e19 lsrs r1, r3, #24 + 800198a: 68fb ldr r3, [r7, #12] + 800198c: 3303 adds r3, #3 + 800198e: 683a ldr r2, [r7, #0] + 8001990: 4413 add r3, r2 + 8001992: b2ca uxtb r2, r1 + 8001994: 701a strb r2, [r3, #0] + offset += sizeof(this->seq); + 8001996: 68fb ldr r3, [r7, #12] + 8001998: 3304 adds r3, #4 + 800199a: 60fb str r3, [r7, #12] + *(outbuffer + offset + 0) = (this->stamp.sec >> (8 * 0)) & 0xFF; + 800199c: 687b ldr r3, [r7, #4] + 800199e: 6899 ldr r1, [r3, #8] + 80019a0: 68fb ldr r3, [r7, #12] + 80019a2: 683a ldr r2, [r7, #0] + 80019a4: 4413 add r3, r2 + 80019a6: b2ca uxtb r2, r1 + 80019a8: 701a strb r2, [r3, #0] + *(outbuffer + offset + 1) = (this->stamp.sec >> (8 * 1)) & 0xFF; + 80019aa: 687b ldr r3, [r7, #4] + 80019ac: 689b ldr r3, [r3, #8] + 80019ae: 0a19 lsrs r1, r3, #8 + 80019b0: 68fb ldr r3, [r7, #12] + 80019b2: 3301 adds r3, #1 + 80019b4: 683a ldr r2, [r7, #0] + 80019b6: 4413 add r3, r2 + 80019b8: b2ca uxtb r2, r1 + 80019ba: 701a strb r2, [r3, #0] + *(outbuffer + offset + 2) = (this->stamp.sec >> (8 * 2)) & 0xFF; + 80019bc: 687b ldr r3, [r7, #4] + 80019be: 689b ldr r3, [r3, #8] + 80019c0: 0c19 lsrs r1, r3, #16 + 80019c2: 68fb ldr r3, [r7, #12] + 80019c4: 3302 adds r3, #2 + 80019c6: 683a ldr r2, [r7, #0] + 80019c8: 4413 add r3, r2 + 80019ca: b2ca uxtb r2, r1 + 80019cc: 701a strb r2, [r3, #0] + *(outbuffer + offset + 3) = (this->stamp.sec >> (8 * 3)) & 0xFF; + 80019ce: 687b ldr r3, [r7, #4] + 80019d0: 689b ldr r3, [r3, #8] + 80019d2: 0e19 lsrs r1, r3, #24 + 80019d4: 68fb ldr r3, [r7, #12] + 80019d6: 3303 adds r3, #3 + 80019d8: 683a ldr r2, [r7, #0] + 80019da: 4413 add r3, r2 + 80019dc: b2ca uxtb r2, r1 + 80019de: 701a strb r2, [r3, #0] + offset += sizeof(this->stamp.sec); + 80019e0: 68fb ldr r3, [r7, #12] + 80019e2: 3304 adds r3, #4 + 80019e4: 60fb str r3, [r7, #12] + *(outbuffer + offset + 0) = (this->stamp.nsec >> (8 * 0)) & 0xFF; + 80019e6: 687b ldr r3, [r7, #4] + 80019e8: 68d9 ldr r1, [r3, #12] + 80019ea: 68fb ldr r3, [r7, #12] + 80019ec: 683a ldr r2, [r7, #0] + 80019ee: 4413 add r3, r2 + 80019f0: b2ca uxtb r2, r1 + 80019f2: 701a strb r2, [r3, #0] + *(outbuffer + offset + 1) = (this->stamp.nsec >> (8 * 1)) & 0xFF; + 80019f4: 687b ldr r3, [r7, #4] + 80019f6: 68db ldr r3, [r3, #12] + 80019f8: 0a19 lsrs r1, r3, #8 + 80019fa: 68fb ldr r3, [r7, #12] + 80019fc: 3301 adds r3, #1 + 80019fe: 683a ldr r2, [r7, #0] + 8001a00: 4413 add r3, r2 + 8001a02: b2ca uxtb r2, r1 + 8001a04: 701a strb r2, [r3, #0] + *(outbuffer + offset + 2) = (this->stamp.nsec >> (8 * 2)) & 0xFF; + 8001a06: 687b ldr r3, [r7, #4] + 8001a08: 68db ldr r3, [r3, #12] + 8001a0a: 0c19 lsrs r1, r3, #16 + 8001a0c: 68fb ldr r3, [r7, #12] + 8001a0e: 3302 adds r3, #2 + 8001a10: 683a ldr r2, [r7, #0] + 8001a12: 4413 add r3, r2 + 8001a14: b2ca uxtb r2, r1 + 8001a16: 701a strb r2, [r3, #0] + *(outbuffer + offset + 3) = (this->stamp.nsec >> (8 * 3)) & 0xFF; + 8001a18: 687b ldr r3, [r7, #4] + 8001a1a: 68db ldr r3, [r3, #12] + 8001a1c: 0e19 lsrs r1, r3, #24 + 8001a1e: 68fb ldr r3, [r7, #12] + 8001a20: 3303 adds r3, #3 + 8001a22: 683a ldr r2, [r7, #0] + 8001a24: 4413 add r3, r2 + 8001a26: b2ca uxtb r2, r1 + 8001a28: 701a strb r2, [r3, #0] + offset += sizeof(this->stamp.nsec); + 8001a2a: 68fb ldr r3, [r7, #12] + 8001a2c: 3304 adds r3, #4 + 8001a2e: 60fb str r3, [r7, #12] + uint32_t length_frame_id = strlen(this->frame_id); + 8001a30: 687b ldr r3, [r7, #4] + 8001a32: 691b ldr r3, [r3, #16] + 8001a34: 4618 mov r0, r3 + 8001a36: f7fe fbff bl 8000238 + 8001a3a: 60b8 str r0, [r7, #8] + varToArr(outbuffer + offset, length_frame_id); + 8001a3c: 68fb ldr r3, [r7, #12] + 8001a3e: 683a ldr r2, [r7, #0] + 8001a40: 4413 add r3, r2 + 8001a42: 68b9 ldr r1, [r7, #8] + 8001a44: 4618 mov r0, r3 + 8001a46: f001 fc2e bl 80032a6 <_ZN3ros3Msg8varToArrIPhmEEvT_T0_> + offset += 4; + 8001a4a: 68fb ldr r3, [r7, #12] + 8001a4c: 3304 adds r3, #4 + 8001a4e: 60fb str r3, [r7, #12] + memcpy(outbuffer + offset, this->frame_id, length_frame_id); + 8001a50: 68fb ldr r3, [r7, #12] + 8001a52: 683a ldr r2, [r7, #0] + 8001a54: 18d0 adds r0, r2, r3 + 8001a56: 687b ldr r3, [r7, #4] + 8001a58: 691b ldr r3, [r3, #16] + 8001a5a: 68ba ldr r2, [r7, #8] + 8001a5c: 4619 mov r1, r3 + 8001a5e: f008 fa0f bl 8009e80 + offset += length_frame_id; + 8001a62: 68fa ldr r2, [r7, #12] + 8001a64: 68bb ldr r3, [r7, #8] + 8001a66: 4413 add r3, r2 + 8001a68: 60fb str r3, [r7, #12] + return offset; + 8001a6a: 68fb ldr r3, [r7, #12] } - else - { - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - 800168a: f7fe ffaf bl 80005ec - 800168e: 6138 str r0, [r7, #16] + 8001a6c: 4618 mov r0, r3 + 8001a6e: 3710 adds r7, #16 + 8001a70: 46bd mov sp, r7 + 8001a72: bd80 pop {r7, pc} - /* Wait till LSE is ready */ - while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) - 8001690: e00a b.n 80016a8 - { - if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) - 8001692: f7fe ffab bl 80005ec - 8001696: 4602 mov r2, r0 - 8001698: 693b ldr r3, [r7, #16] - 800169a: 1ad3 subs r3, r2, r3 - 800169c: f241 3288 movw r2, #5000 ; 0x1388 - 80016a0: 4293 cmp r3, r2 - 80016a2: d901 bls.n 80016a8 - { - return HAL_TIMEOUT; - 80016a4: 2303 movs r3, #3 - 80016a6: e085 b.n 80017b4 - while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) - 80016a8: 4b44 ldr r3, [pc, #272] ; (80017bc ) - 80016aa: 6f1b ldr r3, [r3, #112] ; 0x70 - 80016ac: f003 0302 and.w r3, r3, #2 - 80016b0: 2b00 cmp r3, #0 - 80016b2: d1ee bne.n 8001692 - } +08001a74 <_ZN8std_msgs6Header11deserializeEPh>: + + virtual int deserialize(unsigned char *inbuffer) + 8001a74: b580 push {r7, lr} + 8001a76: b086 sub sp, #24 + 8001a78: af00 add r7, sp, #0 + 8001a7a: 6078 str r0, [r7, #4] + 8001a7c: 6039 str r1, [r7, #0] + { + int offset = 0; + 8001a7e: 2300 movs r3, #0 + 8001a80: 613b str r3, [r7, #16] + this->seq = ((uint32_t) (*(inbuffer + offset))); + 8001a82: 693b ldr r3, [r7, #16] + 8001a84: 683a ldr r2, [r7, #0] + 8001a86: 4413 add r3, r2 + 8001a88: 781b ldrb r3, [r3, #0] + 8001a8a: 461a mov r2, r3 + 8001a8c: 687b ldr r3, [r7, #4] + 8001a8e: 605a str r2, [r3, #4] + this->seq |= ((uint32_t) (*(inbuffer + offset + 1))) << (8 * 1); + 8001a90: 687b ldr r3, [r7, #4] + 8001a92: 685a ldr r2, [r3, #4] + 8001a94: 693b ldr r3, [r7, #16] + 8001a96: 3301 adds r3, #1 + 8001a98: 6839 ldr r1, [r7, #0] + 8001a9a: 440b add r3, r1 + 8001a9c: 781b ldrb r3, [r3, #0] + 8001a9e: 021b lsls r3, r3, #8 + 8001aa0: 431a orrs r2, r3 + 8001aa2: 687b ldr r3, [r7, #4] + 8001aa4: 605a str r2, [r3, #4] + this->seq |= ((uint32_t) (*(inbuffer + offset + 2))) << (8 * 2); + 8001aa6: 687b ldr r3, [r7, #4] + 8001aa8: 685a ldr r2, [r3, #4] + 8001aaa: 693b ldr r3, [r7, #16] + 8001aac: 3302 adds r3, #2 + 8001aae: 6839 ldr r1, [r7, #0] + 8001ab0: 440b add r3, r1 + 8001ab2: 781b ldrb r3, [r3, #0] + 8001ab4: 041b lsls r3, r3, #16 + 8001ab6: 431a orrs r2, r3 + 8001ab8: 687b ldr r3, [r7, #4] + 8001aba: 605a str r2, [r3, #4] + this->seq |= ((uint32_t) (*(inbuffer + offset + 3))) << (8 * 3); + 8001abc: 687b ldr r3, [r7, #4] + 8001abe: 685a ldr r2, [r3, #4] + 8001ac0: 693b ldr r3, [r7, #16] + 8001ac2: 3303 adds r3, #3 + 8001ac4: 6839 ldr r1, [r7, #0] + 8001ac6: 440b add r3, r1 + 8001ac8: 781b ldrb r3, [r3, #0] + 8001aca: 061b lsls r3, r3, #24 + 8001acc: 431a orrs r2, r3 + 8001ace: 687b ldr r3, [r7, #4] + 8001ad0: 605a str r2, [r3, #4] + offset += sizeof(this->seq); + 8001ad2: 693b ldr r3, [r7, #16] + 8001ad4: 3304 adds r3, #4 + 8001ad6: 613b str r3, [r7, #16] + this->stamp.sec = ((uint32_t) (*(inbuffer + offset))); + 8001ad8: 693b ldr r3, [r7, #16] + 8001ada: 683a ldr r2, [r7, #0] + 8001adc: 4413 add r3, r2 + 8001ade: 781b ldrb r3, [r3, #0] + 8001ae0: 461a mov r2, r3 + 8001ae2: 687b ldr r3, [r7, #4] + 8001ae4: 609a str r2, [r3, #8] + this->stamp.sec |= ((uint32_t) (*(inbuffer + offset + 1))) << (8 * 1); + 8001ae6: 687b ldr r3, [r7, #4] + 8001ae8: 689a ldr r2, [r3, #8] + 8001aea: 693b ldr r3, [r7, #16] + 8001aec: 3301 adds r3, #1 + 8001aee: 6839 ldr r1, [r7, #0] + 8001af0: 440b add r3, r1 + 8001af2: 781b ldrb r3, [r3, #0] + 8001af4: 021b lsls r3, r3, #8 + 8001af6: 431a orrs r2, r3 + 8001af8: 687b ldr r3, [r7, #4] + 8001afa: 609a str r2, [r3, #8] + this->stamp.sec |= ((uint32_t) (*(inbuffer + offset + 2))) << (8 * 2); + 8001afc: 687b ldr r3, [r7, #4] + 8001afe: 689a ldr r2, [r3, #8] + 8001b00: 693b ldr r3, [r7, #16] + 8001b02: 3302 adds r3, #2 + 8001b04: 6839 ldr r1, [r7, #0] + 8001b06: 440b add r3, r1 + 8001b08: 781b ldrb r3, [r3, #0] + 8001b0a: 041b lsls r3, r3, #16 + 8001b0c: 431a orrs r2, r3 + 8001b0e: 687b ldr r3, [r7, #4] + 8001b10: 609a str r2, [r3, #8] + this->stamp.sec |= ((uint32_t) (*(inbuffer + offset + 3))) << (8 * 3); + 8001b12: 687b ldr r3, [r7, #4] + 8001b14: 689a ldr r2, [r3, #8] + 8001b16: 693b ldr r3, [r7, #16] + 8001b18: 3303 adds r3, #3 + 8001b1a: 6839 ldr r1, [r7, #0] + 8001b1c: 440b add r3, r1 + 8001b1e: 781b ldrb r3, [r3, #0] + 8001b20: 061b lsls r3, r3, #24 + 8001b22: 431a orrs r2, r3 + 8001b24: 687b ldr r3, [r7, #4] + 8001b26: 609a str r2, [r3, #8] + offset += sizeof(this->stamp.sec); + 8001b28: 693b ldr r3, [r7, #16] + 8001b2a: 3304 adds r3, #4 + 8001b2c: 613b str r3, [r7, #16] + this->stamp.nsec = ((uint32_t) (*(inbuffer + offset))); + 8001b2e: 693b ldr r3, [r7, #16] + 8001b30: 683a ldr r2, [r7, #0] + 8001b32: 4413 add r3, r2 + 8001b34: 781b ldrb r3, [r3, #0] + 8001b36: 461a mov r2, r3 + 8001b38: 687b ldr r3, [r7, #4] + 8001b3a: 60da str r2, [r3, #12] + this->stamp.nsec |= ((uint32_t) (*(inbuffer + offset + 1))) << (8 * 1); + 8001b3c: 687b ldr r3, [r7, #4] + 8001b3e: 68da ldr r2, [r3, #12] + 8001b40: 693b ldr r3, [r7, #16] + 8001b42: 3301 adds r3, #1 + 8001b44: 6839 ldr r1, [r7, #0] + 8001b46: 440b add r3, r1 + 8001b48: 781b ldrb r3, [r3, #0] + 8001b4a: 021b lsls r3, r3, #8 + 8001b4c: 431a orrs r2, r3 + 8001b4e: 687b ldr r3, [r7, #4] + 8001b50: 60da str r2, [r3, #12] + this->stamp.nsec |= ((uint32_t) (*(inbuffer + offset + 2))) << (8 * 2); + 8001b52: 687b ldr r3, [r7, #4] + 8001b54: 68da ldr r2, [r3, #12] + 8001b56: 693b ldr r3, [r7, #16] + 8001b58: 3302 adds r3, #2 + 8001b5a: 6839 ldr r1, [r7, #0] + 8001b5c: 440b add r3, r1 + 8001b5e: 781b ldrb r3, [r3, #0] + 8001b60: 041b lsls r3, r3, #16 + 8001b62: 431a orrs r2, r3 + 8001b64: 687b ldr r3, [r7, #4] + 8001b66: 60da str r2, [r3, #12] + this->stamp.nsec |= ((uint32_t) (*(inbuffer + offset + 3))) << (8 * 3); + 8001b68: 687b ldr r3, [r7, #4] + 8001b6a: 68da ldr r2, [r3, #12] + 8001b6c: 693b ldr r3, [r7, #16] + 8001b6e: 3303 adds r3, #3 + 8001b70: 6839 ldr r1, [r7, #0] + 8001b72: 440b add r3, r1 + 8001b74: 781b ldrb r3, [r3, #0] + 8001b76: 061b lsls r3, r3, #24 + 8001b78: 431a orrs r2, r3 + 8001b7a: 687b ldr r3, [r7, #4] + 8001b7c: 60da str r2, [r3, #12] + offset += sizeof(this->stamp.nsec); + 8001b7e: 693b ldr r3, [r7, #16] + 8001b80: 3304 adds r3, #4 + 8001b82: 613b str r3, [r7, #16] + uint32_t length_frame_id; + arrToVar(length_frame_id, (inbuffer + offset)); + 8001b84: 693b ldr r3, [r7, #16] + 8001b86: 683a ldr r2, [r7, #0] + 8001b88: 441a add r2, r3 + 8001b8a: f107 030c add.w r3, r7, #12 + 8001b8e: 4611 mov r1, r2 + 8001b90: 4618 mov r0, r3 + 8001b92: f001 fba6 bl 80032e2 <_ZN3ros3Msg8arrToVarImPhEEvRT_T0_> + offset += 4; + 8001b96: 693b ldr r3, [r7, #16] + 8001b98: 3304 adds r3, #4 + 8001b9a: 613b str r3, [r7, #16] + for(unsigned int k= offset; k< offset+length_frame_id; ++k){ + 8001b9c: 693b ldr r3, [r7, #16] + 8001b9e: 617b str r3, [r7, #20] + 8001ba0: 693a ldr r2, [r7, #16] + 8001ba2: 68fb ldr r3, [r7, #12] + 8001ba4: 4413 add r3, r2 + 8001ba6: 697a ldr r2, [r7, #20] + 8001ba8: 429a cmp r2, r3 + 8001baa: d20c bcs.n 8001bc6 <_ZN8std_msgs6Header11deserializeEPh+0x152> + inbuffer[k-1]=inbuffer[k]; + 8001bac: 683a ldr r2, [r7, #0] + 8001bae: 697b ldr r3, [r7, #20] + 8001bb0: 441a add r2, r3 + 8001bb2: 697b ldr r3, [r7, #20] + 8001bb4: 3b01 subs r3, #1 + 8001bb6: 6839 ldr r1, [r7, #0] + 8001bb8: 440b add r3, r1 + 8001bba: 7812 ldrb r2, [r2, #0] + 8001bbc: 701a strb r2, [r3, #0] + for(unsigned int k= offset; k< offset+length_frame_id; ++k){ + 8001bbe: 697b ldr r3, [r7, #20] + 8001bc0: 3301 adds r3, #1 + 8001bc2: 617b str r3, [r7, #20] + 8001bc4: e7ec b.n 8001ba0 <_ZN8std_msgs6Header11deserializeEPh+0x12c> } + inbuffer[offset+length_frame_id-1]=0; + 8001bc6: 693a ldr r2, [r7, #16] + 8001bc8: 68fb ldr r3, [r7, #12] + 8001bca: 4413 add r3, r2 + 8001bcc: 3b01 subs r3, #1 + 8001bce: 683a ldr r2, [r7, #0] + 8001bd0: 4413 add r3, r2 + 8001bd2: 2200 movs r2, #0 + 8001bd4: 701a strb r2, [r3, #0] + this->frame_id = (char *)(inbuffer + offset-1); + 8001bd6: 693b ldr r3, [r7, #16] + 8001bd8: 3b01 subs r3, #1 + 8001bda: 683a ldr r2, [r7, #0] + 8001bdc: 441a add r2, r3 + 8001bde: 687b ldr r3, [r7, #4] + 8001be0: 611a str r2, [r3, #16] + offset += length_frame_id; + 8001be2: 693a ldr r2, [r7, #16] + 8001be4: 68fb ldr r3, [r7, #12] + 8001be6: 4413 add r3, r2 + 8001be8: 613b str r3, [r7, #16] + return offset; + 8001bea: 693b ldr r3, [r7, #16] } + 8001bec: 4618 mov r0, r3 + 8001bee: 3718 adds r7, #24 + 8001bf0: 46bd mov sp, r7 + 8001bf2: bd80 pop {r7, pc} - /* Restore clock configuration if changed */ - if(pwrclkchanged == SET) - 80016b4: 7dfb ldrb r3, [r7, #23] - 80016b6: 2b01 cmp r3, #1 - 80016b8: d105 bne.n 80016c6 +08001bf4 <_ZN8std_msgs6Header7getTypeEv>: + + const char * getType(){ return "std_msgs/Header"; }; + 8001bf4: b480 push {r7} + 8001bf6: b083 sub sp, #12 + 8001bf8: af00 add r7, sp, #0 + 8001bfa: 6078 str r0, [r7, #4] + 8001bfc: 4b03 ldr r3, [pc, #12] ; (8001c0c <_ZN8std_msgs6Header7getTypeEv+0x18>) + 8001bfe: 4618 mov r0, r3 + 8001c00: 370c adds r7, #12 + 8001c02: 46bd mov sp, r7 + 8001c04: f85d 7b04 ldr.w r7, [sp], #4 + 8001c08: 4770 bx lr + 8001c0a: bf00 nop + 8001c0c: 0800a230 .word 0x0800a230 + +08001c10 <_ZN8std_msgs6Header6getMD5Ev>: + const char * getMD5(){ return "2176decaecbce78abc3b96ef049fabed"; }; + 8001c10: b480 push {r7} + 8001c12: b083 sub sp, #12 + 8001c14: af00 add r7, sp, #0 + 8001c16: 6078 str r0, [r7, #4] + 8001c18: 4b03 ldr r3, [pc, #12] ; (8001c28 <_ZN8std_msgs6Header6getMD5Ev+0x18>) + 8001c1a: 4618 mov r0, r3 + 8001c1c: 370c adds r7, #12 + 8001c1e: 46bd mov sp, r7 + 8001c20: f85d 7b04 ldr.w r7, [sp], #4 + 8001c24: 4770 bx lr + 8001c26: bf00 nop + 8001c28: 0800a240 .word 0x0800a240 + +08001c2c <_ZN13geometry_msgs5PointC1Ev>: + typedef float _y_type; + _y_type y; + typedef float _z_type; + _z_type z; + + Point(): + 8001c2c: b580 push {r7, lr} + 8001c2e: b082 sub sp, #8 + 8001c30: af00 add r7, sp, #0 + 8001c32: 6078 str r0, [r7, #4] + x(0), + y(0), + z(0) + 8001c34: 687b ldr r3, [r7, #4] + 8001c36: 4618 mov r0, r3 + 8001c38: f7fe fe0a bl 8000850 <_ZN3ros3MsgC1Ev> + 8001c3c: 4a09 ldr r2, [pc, #36] ; (8001c64 <_ZN13geometry_msgs5PointC1Ev+0x38>) + 8001c3e: 687b ldr r3, [r7, #4] + 8001c40: 601a str r2, [r3, #0] + 8001c42: 687b ldr r3, [r7, #4] + 8001c44: f04f 0200 mov.w r2, #0 + 8001c48: 605a str r2, [r3, #4] + 8001c4a: 687b ldr r3, [r7, #4] + 8001c4c: f04f 0200 mov.w r2, #0 + 8001c50: 609a str r2, [r3, #8] + 8001c52: 687b ldr r3, [r7, #4] + 8001c54: f04f 0200 mov.w r2, #0 + 8001c58: 60da str r2, [r3, #12] { - __HAL_RCC_PWR_CLK_DISABLE(); - 80016ba: 4b40 ldr r3, [pc, #256] ; (80017bc ) - 80016bc: 6c1b ldr r3, [r3, #64] ; 0x40 - 80016be: 4a3f ldr r2, [pc, #252] ; (80017bc ) - 80016c0: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000 - 80016c4: 6413 str r3, [r2, #64] ; 0x40 } - } - /*-------------------------------- PLL Configuration -----------------------*/ - /* Check the parameters */ - assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); - if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) - 80016c6: 687b ldr r3, [r7, #4] - 80016c8: 699b ldr r3, [r3, #24] - 80016ca: 2b00 cmp r3, #0 - 80016cc: d071 beq.n 80017b2 - { - /* Check if the PLL is used as system clock or not */ - if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) - 80016ce: 4b3b ldr r3, [pc, #236] ; (80017bc ) - 80016d0: 689b ldr r3, [r3, #8] - 80016d2: f003 030c and.w r3, r3, #12 - 80016d6: 2b08 cmp r3, #8 - 80016d8: d069 beq.n 80017ae - { - if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) - 80016da: 687b ldr r3, [r7, #4] - 80016dc: 699b ldr r3, [r3, #24] - 80016de: 2b02 cmp r3, #2 - 80016e0: d14b bne.n 800177a -#if defined (RCC_PLLCFGR_PLLR) - assert_param(IS_RCC_PLLR_VALUE(RCC_OscInitStruct->PLL.PLLR)); -#endif + 8001c5a: 687b ldr r3, [r7, #4] + 8001c5c: 4618 mov r0, r3 + 8001c5e: 3708 adds r7, #8 + 8001c60: 46bd mov sp, r7 + 8001c62: bd80 pop {r7, pc} + 8001c64: 0800a55c .word 0x0800a55c - /* Disable the main PLL. */ - __HAL_RCC_PLL_DISABLE(); - 80016e2: 4b36 ldr r3, [pc, #216] ; (80017bc ) - 80016e4: 681b ldr r3, [r3, #0] - 80016e6: 4a35 ldr r2, [pc, #212] ; (80017bc ) - 80016e8: f023 7380 bic.w r3, r3, #16777216 ; 0x1000000 - 80016ec: 6013 str r3, [r2, #0] +08001c68 <_ZNK13geometry_msgs5Point9serializeEPh>: - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - 80016ee: f7fe ff7d bl 80005ec - 80016f2: 6138 str r0, [r7, #16] + virtual int serialize(unsigned char *outbuffer) const + 8001c68: b580 push {r7, lr} + 8001c6a: b084 sub sp, #16 + 8001c6c: af00 add r7, sp, #0 + 8001c6e: 6078 str r0, [r7, #4] + 8001c70: 6039 str r1, [r7, #0] + { + int offset = 0; + 8001c72: 2300 movs r3, #0 + 8001c74: 60fb str r3, [r7, #12] + offset += serializeAvrFloat64(outbuffer + offset, this->x); + 8001c76: 68fb ldr r3, [r7, #12] + 8001c78: 683a ldr r2, [r7, #0] + 8001c7a: 441a add r2, r3 + 8001c7c: 687b ldr r3, [r7, #4] + 8001c7e: edd3 7a01 vldr s15, [r3, #4] + 8001c82: eeb0 0a67 vmov.f32 s0, s15 + 8001c86: 4610 mov r0, r2 + 8001c88: f7fe fd16 bl 80006b8 <_ZN3ros3Msg19serializeAvrFloat64EPhf> + 8001c8c: 4602 mov r2, r0 + 8001c8e: 68fb ldr r3, [r7, #12] + 8001c90: 4413 add r3, r2 + 8001c92: 60fb str r3, [r7, #12] + offset += serializeAvrFloat64(outbuffer + offset, this->y); + 8001c94: 68fb ldr r3, [r7, #12] + 8001c96: 683a ldr r2, [r7, #0] + 8001c98: 441a add r2, r3 + 8001c9a: 687b ldr r3, [r7, #4] + 8001c9c: edd3 7a02 vldr s15, [r3, #8] + 8001ca0: eeb0 0a67 vmov.f32 s0, s15 + 8001ca4: 4610 mov r0, r2 + 8001ca6: f7fe fd07 bl 80006b8 <_ZN3ros3Msg19serializeAvrFloat64EPhf> + 8001caa: 4602 mov r2, r0 + 8001cac: 68fb ldr r3, [r7, #12] + 8001cae: 4413 add r3, r2 + 8001cb0: 60fb str r3, [r7, #12] + offset += serializeAvrFloat64(outbuffer + offset, this->z); + 8001cb2: 68fb ldr r3, [r7, #12] + 8001cb4: 683a ldr r2, [r7, #0] + 8001cb6: 441a add r2, r3 + 8001cb8: 687b ldr r3, [r7, #4] + 8001cba: edd3 7a03 vldr s15, [r3, #12] + 8001cbe: eeb0 0a67 vmov.f32 s0, s15 + 8001cc2: 4610 mov r0, r2 + 8001cc4: f7fe fcf8 bl 80006b8 <_ZN3ros3Msg19serializeAvrFloat64EPhf> + 8001cc8: 4602 mov r2, r0 + 8001cca: 68fb ldr r3, [r7, #12] + 8001ccc: 4413 add r3, r2 + 8001cce: 60fb str r3, [r7, #12] + return offset; + 8001cd0: 68fb ldr r3, [r7, #12] + } + 8001cd2: 4618 mov r0, r3 + 8001cd4: 3710 adds r7, #16 + 8001cd6: 46bd mov sp, r7 + 8001cd8: bd80 pop {r7, pc} - /* Wait till PLL is ready */ - while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 80016f4: e008 b.n 8001708 - { - if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) - 80016f6: f7fe ff79 bl 80005ec - 80016fa: 4602 mov r2, r0 - 80016fc: 693b ldr r3, [r7, #16] - 80016fe: 1ad3 subs r3, r2, r3 - 8001700: 2b02 cmp r3, #2 - 8001702: d901 bls.n 8001708 - { - return HAL_TIMEOUT; - 8001704: 2303 movs r3, #3 - 8001706: e055 b.n 80017b4 - while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 8001708: 4b2c ldr r3, [pc, #176] ; (80017bc ) - 800170a: 681b ldr r3, [r3, #0] - 800170c: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 8001710: 2b00 cmp r3, #0 - 8001712: d1f0 bne.n 80016f6 - } - } +08001cda <_ZN13geometry_msgs5Point11deserializeEPh>: - /* Configure the main PLL clock source, multiplication and division factors. */ -#if defined (RCC_PLLCFGR_PLLR) - __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, - 8001714: 687b ldr r3, [r7, #4] - 8001716: 69da ldr r2, [r3, #28] - 8001718: 687b ldr r3, [r7, #4] - 800171a: 6a1b ldr r3, [r3, #32] - 800171c: 431a orrs r2, r3 - 800171e: 687b ldr r3, [r7, #4] - 8001720: 6a5b ldr r3, [r3, #36] ; 0x24 - 8001722: 019b lsls r3, r3, #6 - 8001724: 431a orrs r2, r3 - 8001726: 687b ldr r3, [r7, #4] - 8001728: 6a9b ldr r3, [r3, #40] ; 0x28 - 800172a: 085b lsrs r3, r3, #1 - 800172c: 3b01 subs r3, #1 - 800172e: 041b lsls r3, r3, #16 - 8001730: 431a orrs r2, r3 - 8001732: 687b ldr r3, [r7, #4] - 8001734: 6adb ldr r3, [r3, #44] ; 0x2c - 8001736: 061b lsls r3, r3, #24 - 8001738: 431a orrs r2, r3 - 800173a: 687b ldr r3, [r7, #4] - 800173c: 6b1b ldr r3, [r3, #48] ; 0x30 - 800173e: 071b lsls r3, r3, #28 - 8001740: 491e ldr r1, [pc, #120] ; (80017bc ) - 8001742: 4313 orrs r3, r2 - 8001744: 604b str r3, [r1, #4] - RCC_OscInitStruct->PLL.PLLP, - RCC_OscInitStruct->PLL.PLLQ); -#endif + virtual int deserialize(unsigned char *inbuffer) + 8001cda: b580 push {r7, lr} + 8001cdc: b084 sub sp, #16 + 8001cde: af00 add r7, sp, #0 + 8001ce0: 6078 str r0, [r7, #4] + 8001ce2: 6039 str r1, [r7, #0] + { + int offset = 0; + 8001ce4: 2300 movs r3, #0 + 8001ce6: 60fb str r3, [r7, #12] + offset += deserializeAvrFloat64(inbuffer + offset, &(this->x)); + 8001ce8: 68fb ldr r3, [r7, #12] + 8001cea: 683a ldr r2, [r7, #0] + 8001cec: 441a add r2, r3 + 8001cee: 687b ldr r3, [r7, #4] + 8001cf0: 3304 adds r3, #4 + 8001cf2: 4619 mov r1, r3 + 8001cf4: 4610 mov r0, r2 + 8001cf6: f7fe fd4b bl 8000790 <_ZN3ros3Msg21deserializeAvrFloat64EPKhPf> + 8001cfa: 4602 mov r2, r0 + 8001cfc: 68fb ldr r3, [r7, #12] + 8001cfe: 4413 add r3, r2 + 8001d00: 60fb str r3, [r7, #12] + offset += deserializeAvrFloat64(inbuffer + offset, &(this->y)); + 8001d02: 68fb ldr r3, [r7, #12] + 8001d04: 683a ldr r2, [r7, #0] + 8001d06: 441a add r2, r3 + 8001d08: 687b ldr r3, [r7, #4] + 8001d0a: 3308 adds r3, #8 + 8001d0c: 4619 mov r1, r3 + 8001d0e: 4610 mov r0, r2 + 8001d10: f7fe fd3e bl 8000790 <_ZN3ros3Msg21deserializeAvrFloat64EPKhPf> + 8001d14: 4602 mov r2, r0 + 8001d16: 68fb ldr r3, [r7, #12] + 8001d18: 4413 add r3, r2 + 8001d1a: 60fb str r3, [r7, #12] + offset += deserializeAvrFloat64(inbuffer + offset, &(this->z)); + 8001d1c: 68fb ldr r3, [r7, #12] + 8001d1e: 683a ldr r2, [r7, #0] + 8001d20: 441a add r2, r3 + 8001d22: 687b ldr r3, [r7, #4] + 8001d24: 330c adds r3, #12 + 8001d26: 4619 mov r1, r3 + 8001d28: 4610 mov r0, r2 + 8001d2a: f7fe fd31 bl 8000790 <_ZN3ros3Msg21deserializeAvrFloat64EPKhPf> + 8001d2e: 4602 mov r2, r0 + 8001d30: 68fb ldr r3, [r7, #12] + 8001d32: 4413 add r3, r2 + 8001d34: 60fb str r3, [r7, #12] + return offset; + 8001d36: 68fb ldr r3, [r7, #12] + } + 8001d38: 4618 mov r0, r3 + 8001d3a: 3710 adds r7, #16 + 8001d3c: 46bd mov sp, r7 + 8001d3e: bd80 pop {r7, pc} - /* Enable the main PLL. */ - __HAL_RCC_PLL_ENABLE(); - 8001746: 4b1d ldr r3, [pc, #116] ; (80017bc ) - 8001748: 681b ldr r3, [r3, #0] - 800174a: 4a1c ldr r2, [pc, #112] ; (80017bc ) - 800174c: f043 7380 orr.w r3, r3, #16777216 ; 0x1000000 - 8001750: 6013 str r3, [r2, #0] +08001d40 <_ZN13geometry_msgs5Point7getTypeEv>: - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - 8001752: f7fe ff4b bl 80005ec - 8001756: 6138 str r0, [r7, #16] + const char * getType(){ return "geometry_msgs/Point"; }; + 8001d40: b480 push {r7} + 8001d42: b083 sub sp, #12 + 8001d44: af00 add r7, sp, #0 + 8001d46: 6078 str r0, [r7, #4] + 8001d48: 4b03 ldr r3, [pc, #12] ; (8001d58 <_ZN13geometry_msgs5Point7getTypeEv+0x18>) + 8001d4a: 4618 mov r0, r3 + 8001d4c: 370c adds r7, #12 + 8001d4e: 46bd mov sp, r7 + 8001d50: f85d 7b04 ldr.w r7, [sp], #4 + 8001d54: 4770 bx lr + 8001d56: bf00 nop + 8001d58: 0800a264 .word 0x0800a264 + +08001d5c <_ZN13geometry_msgs5Point6getMD5Ev>: + const char * getMD5(){ return "4a842b65f413084dc2b10fb484ea7f17"; }; + 8001d5c: b480 push {r7} + 8001d5e: b083 sub sp, #12 + 8001d60: af00 add r7, sp, #0 + 8001d62: 6078 str r0, [r7, #4] + 8001d64: 4b03 ldr r3, [pc, #12] ; (8001d74 <_ZN13geometry_msgs5Point6getMD5Ev+0x18>) + 8001d66: 4618 mov r0, r3 + 8001d68: 370c adds r7, #12 + 8001d6a: 46bd mov sp, r7 + 8001d6c: f85d 7b04 ldr.w r7, [sp], #4 + 8001d70: 4770 bx lr + 8001d72: bf00 nop + 8001d74: 0800a278 .word 0x0800a278 + +08001d78 <_ZN13geometry_msgs10QuaternionC1Ev>: + typedef float _z_type; + _z_type z; + typedef float _w_type; + _w_type w; - /* Wait till PLL is ready */ - while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) - 8001758: e008 b.n 800176c - { - if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) - 800175a: f7fe ff47 bl 80005ec - 800175e: 4602 mov r2, r0 - 8001760: 693b ldr r3, [r7, #16] - 8001762: 1ad3 subs r3, r2, r3 - 8001764: 2b02 cmp r3, #2 - 8001766: d901 bls.n 800176c - { - return HAL_TIMEOUT; - 8001768: 2303 movs r3, #3 - 800176a: e023 b.n 80017b4 - while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) - 800176c: 4b13 ldr r3, [pc, #76] ; (80017bc ) - 800176e: 681b ldr r3, [r3, #0] - 8001770: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 8001774: 2b00 cmp r3, #0 - 8001776: d0f0 beq.n 800175a - 8001778: e01b b.n 80017b2 - } - } - else - { - /* Disable the main PLL. */ - __HAL_RCC_PLL_DISABLE(); - 800177a: 4b10 ldr r3, [pc, #64] ; (80017bc ) - 800177c: 681b ldr r3, [r3, #0] - 800177e: 4a0f ldr r2, [pc, #60] ; (80017bc ) - 8001780: f023 7380 bic.w r3, r3, #16777216 ; 0x1000000 - 8001784: 6013 str r3, [r2, #0] + Quaternion(): + 8001d78: b580 push {r7, lr} + 8001d7a: b082 sub sp, #8 + 8001d7c: af00 add r7, sp, #0 + 8001d7e: 6078 str r0, [r7, #4] + x(0), + y(0), + z(0), + w(0) + 8001d80: 687b ldr r3, [r7, #4] + 8001d82: 4618 mov r0, r3 + 8001d84: f7fe fd64 bl 8000850 <_ZN3ros3MsgC1Ev> + 8001d88: 4a0b ldr r2, [pc, #44] ; (8001db8 <_ZN13geometry_msgs10QuaternionC1Ev+0x40>) + 8001d8a: 687b ldr r3, [r7, #4] + 8001d8c: 601a str r2, [r3, #0] + 8001d8e: 687b ldr r3, [r7, #4] + 8001d90: f04f 0200 mov.w r2, #0 + 8001d94: 605a str r2, [r3, #4] + 8001d96: 687b ldr r3, [r7, #4] + 8001d98: f04f 0200 mov.w r2, #0 + 8001d9c: 609a str r2, [r3, #8] + 8001d9e: 687b ldr r3, [r7, #4] + 8001da0: f04f 0200 mov.w r2, #0 + 8001da4: 60da str r2, [r3, #12] + 8001da6: 687b ldr r3, [r7, #4] + 8001da8: f04f 0200 mov.w r2, #0 + 8001dac: 611a str r2, [r3, #16] + { + } + 8001dae: 687b ldr r3, [r7, #4] + 8001db0: 4618 mov r0, r3 + 8001db2: 3708 adds r7, #8 + 8001db4: 46bd mov sp, r7 + 8001db6: bd80 pop {r7, pc} + 8001db8: 0800a544 .word 0x0800a544 - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - 8001786: f7fe ff31 bl 80005ec - 800178a: 6138 str r0, [r7, #16] +08001dbc <_ZNK13geometry_msgs10Quaternion9serializeEPh>: - /* Wait till PLL is ready */ - while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 800178c: e008 b.n 80017a0 - { - if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) - 800178e: f7fe ff2d bl 80005ec - 8001792: 4602 mov r2, r0 - 8001794: 693b ldr r3, [r7, #16] - 8001796: 1ad3 subs r3, r2, r3 - 8001798: 2b02 cmp r3, #2 - 800179a: d901 bls.n 80017a0 - { - return HAL_TIMEOUT; - 800179c: 2303 movs r3, #3 - 800179e: e009 b.n 80017b4 - while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 80017a0: 4b06 ldr r3, [pc, #24] ; (80017bc ) - 80017a2: 681b ldr r3, [r3, #0] - 80017a4: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 80017a8: 2b00 cmp r3, #0 - 80017aa: d1f0 bne.n 800178e - 80017ac: e001 b.n 80017b2 - } - } + virtual int serialize(unsigned char *outbuffer) const + 8001dbc: b580 push {r7, lr} + 8001dbe: b084 sub sp, #16 + 8001dc0: af00 add r7, sp, #0 + 8001dc2: 6078 str r0, [r7, #4] + 8001dc4: 6039 str r1, [r7, #0] + { + int offset = 0; + 8001dc6: 2300 movs r3, #0 + 8001dc8: 60fb str r3, [r7, #12] + offset += serializeAvrFloat64(outbuffer + offset, this->x); + 8001dca: 68fb ldr r3, [r7, #12] + 8001dcc: 683a ldr r2, [r7, #0] + 8001dce: 441a add r2, r3 + 8001dd0: 687b ldr r3, [r7, #4] + 8001dd2: edd3 7a01 vldr s15, [r3, #4] + 8001dd6: eeb0 0a67 vmov.f32 s0, s15 + 8001dda: 4610 mov r0, r2 + 8001ddc: f7fe fc6c bl 80006b8 <_ZN3ros3Msg19serializeAvrFloat64EPhf> + 8001de0: 4602 mov r2, r0 + 8001de2: 68fb ldr r3, [r7, #12] + 8001de4: 4413 add r3, r2 + 8001de6: 60fb str r3, [r7, #12] + offset += serializeAvrFloat64(outbuffer + offset, this->y); + 8001de8: 68fb ldr r3, [r7, #12] + 8001dea: 683a ldr r2, [r7, #0] + 8001dec: 441a add r2, r3 + 8001dee: 687b ldr r3, [r7, #4] + 8001df0: edd3 7a02 vldr s15, [r3, #8] + 8001df4: eeb0 0a67 vmov.f32 s0, s15 + 8001df8: 4610 mov r0, r2 + 8001dfa: f7fe fc5d bl 80006b8 <_ZN3ros3Msg19serializeAvrFloat64EPhf> + 8001dfe: 4602 mov r2, r0 + 8001e00: 68fb ldr r3, [r7, #12] + 8001e02: 4413 add r3, r2 + 8001e04: 60fb str r3, [r7, #12] + offset += serializeAvrFloat64(outbuffer + offset, this->z); + 8001e06: 68fb ldr r3, [r7, #12] + 8001e08: 683a ldr r2, [r7, #0] + 8001e0a: 441a add r2, r3 + 8001e0c: 687b ldr r3, [r7, #4] + 8001e0e: edd3 7a03 vldr s15, [r3, #12] + 8001e12: eeb0 0a67 vmov.f32 s0, s15 + 8001e16: 4610 mov r0, r2 + 8001e18: f7fe fc4e bl 80006b8 <_ZN3ros3Msg19serializeAvrFloat64EPhf> + 8001e1c: 4602 mov r2, r0 + 8001e1e: 68fb ldr r3, [r7, #12] + 8001e20: 4413 add r3, r2 + 8001e22: 60fb str r3, [r7, #12] + offset += serializeAvrFloat64(outbuffer + offset, this->w); + 8001e24: 68fb ldr r3, [r7, #12] + 8001e26: 683a ldr r2, [r7, #0] + 8001e28: 441a add r2, r3 + 8001e2a: 687b ldr r3, [r7, #4] + 8001e2c: edd3 7a04 vldr s15, [r3, #16] + 8001e30: eeb0 0a67 vmov.f32 s0, s15 + 8001e34: 4610 mov r0, r2 + 8001e36: f7fe fc3f bl 80006b8 <_ZN3ros3Msg19serializeAvrFloat64EPhf> + 8001e3a: 4602 mov r2, r0 + 8001e3c: 68fb ldr r3, [r7, #12] + 8001e3e: 4413 add r3, r2 + 8001e40: 60fb str r3, [r7, #12] + return offset; + 8001e42: 68fb ldr r3, [r7, #12] } - else + 8001e44: 4618 mov r0, r3 + 8001e46: 3710 adds r7, #16 + 8001e48: 46bd mov sp, r7 + 8001e4a: bd80 pop {r7, pc} + +08001e4c <_ZN13geometry_msgs10Quaternion11deserializeEPh>: + + virtual int deserialize(unsigned char *inbuffer) + 8001e4c: b580 push {r7, lr} + 8001e4e: b084 sub sp, #16 + 8001e50: af00 add r7, sp, #0 + 8001e52: 6078 str r0, [r7, #4] + 8001e54: 6039 str r1, [r7, #0] { - return HAL_ERROR; - 80017ae: 2301 movs r3, #1 - 80017b0: e000 b.n 80017b4 + int offset = 0; + 8001e56: 2300 movs r3, #0 + 8001e58: 60fb str r3, [r7, #12] + offset += deserializeAvrFloat64(inbuffer + offset, &(this->x)); + 8001e5a: 68fb ldr r3, [r7, #12] + 8001e5c: 683a ldr r2, [r7, #0] + 8001e5e: 441a add r2, r3 + 8001e60: 687b ldr r3, [r7, #4] + 8001e62: 3304 adds r3, #4 + 8001e64: 4619 mov r1, r3 + 8001e66: 4610 mov r0, r2 + 8001e68: f7fe fc92 bl 8000790 <_ZN3ros3Msg21deserializeAvrFloat64EPKhPf> + 8001e6c: 4602 mov r2, r0 + 8001e6e: 68fb ldr r3, [r7, #12] + 8001e70: 4413 add r3, r2 + 8001e72: 60fb str r3, [r7, #12] + offset += deserializeAvrFloat64(inbuffer + offset, &(this->y)); + 8001e74: 68fb ldr r3, [r7, #12] + 8001e76: 683a ldr r2, [r7, #0] + 8001e78: 441a add r2, r3 + 8001e7a: 687b ldr r3, [r7, #4] + 8001e7c: 3308 adds r3, #8 + 8001e7e: 4619 mov r1, r3 + 8001e80: 4610 mov r0, r2 + 8001e82: f7fe fc85 bl 8000790 <_ZN3ros3Msg21deserializeAvrFloat64EPKhPf> + 8001e86: 4602 mov r2, r0 + 8001e88: 68fb ldr r3, [r7, #12] + 8001e8a: 4413 add r3, r2 + 8001e8c: 60fb str r3, [r7, #12] + offset += deserializeAvrFloat64(inbuffer + offset, &(this->z)); + 8001e8e: 68fb ldr r3, [r7, #12] + 8001e90: 683a ldr r2, [r7, #0] + 8001e92: 441a add r2, r3 + 8001e94: 687b ldr r3, [r7, #4] + 8001e96: 330c adds r3, #12 + 8001e98: 4619 mov r1, r3 + 8001e9a: 4610 mov r0, r2 + 8001e9c: f7fe fc78 bl 8000790 <_ZN3ros3Msg21deserializeAvrFloat64EPKhPf> + 8001ea0: 4602 mov r2, r0 + 8001ea2: 68fb ldr r3, [r7, #12] + 8001ea4: 4413 add r3, r2 + 8001ea6: 60fb str r3, [r7, #12] + offset += deserializeAvrFloat64(inbuffer + offset, &(this->w)); + 8001ea8: 68fb ldr r3, [r7, #12] + 8001eaa: 683a ldr r2, [r7, #0] + 8001eac: 441a add r2, r3 + 8001eae: 687b ldr r3, [r7, #4] + 8001eb0: 3310 adds r3, #16 + 8001eb2: 4619 mov r1, r3 + 8001eb4: 4610 mov r0, r2 + 8001eb6: f7fe fc6b bl 8000790 <_ZN3ros3Msg21deserializeAvrFloat64EPKhPf> + 8001eba: 4602 mov r2, r0 + 8001ebc: 68fb ldr r3, [r7, #12] + 8001ebe: 4413 add r3, r2 + 8001ec0: 60fb str r3, [r7, #12] + return offset; + 8001ec2: 68fb ldr r3, [r7, #12] } - } - return HAL_OK; - 80017b2: 2300 movs r3, #0 -} - 80017b4: 4618 mov r0, r3 - 80017b6: 3718 adds r7, #24 - 80017b8: 46bd mov sp, r7 - 80017ba: bd80 pop {r7, pc} - 80017bc: 40023800 .word 0x40023800 - 80017c0: 40007000 .word 0x40007000 - -080017c4 : - * HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency - * (for more details refer to section above "Initialization/de-initialization functions") - * @retval None - */ -HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) -{ - 80017c4: b580 push {r7, lr} - 80017c6: b084 sub sp, #16 - 80017c8: af00 add r7, sp, #0 - 80017ca: 6078 str r0, [r7, #4] - 80017cc: 6039 str r1, [r7, #0] - uint32_t tickstart = 0; - 80017ce: 2300 movs r3, #0 - 80017d0: 60fb str r3, [r7, #12] + 8001ec4: 4618 mov r0, r3 + 8001ec6: 3710 adds r7, #16 + 8001ec8: 46bd mov sp, r7 + 8001eca: bd80 pop {r7, pc} - /* Check Null pointer */ - if(RCC_ClkInitStruct == NULL) - 80017d2: 687b ldr r3, [r7, #4] - 80017d4: 2b00 cmp r3, #0 - 80017d6: d101 bne.n 80017dc - { - return HAL_ERROR; - 80017d8: 2301 movs r3, #1 - 80017da: e0ce b.n 800197a - /* To correctly read data from FLASH memory, the number of wait states (LATENCY) - must be correctly programmed according to the frequency of the CPU clock - (HCLK) and the supply voltage of the device. */ +08001ecc <_ZN13geometry_msgs10Quaternion7getTypeEv>: - /* Increasing the CPU frequency */ - if(FLatency > __HAL_FLASH_GET_LATENCY()) - 80017dc: 4b69 ldr r3, [pc, #420] ; (8001984 ) - 80017de: 681b ldr r3, [r3, #0] - 80017e0: f003 030f and.w r3, r3, #15 - 80017e4: 683a ldr r2, [r7, #0] - 80017e6: 429a cmp r2, r3 - 80017e8: d910 bls.n 800180c - { - /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ - __HAL_FLASH_SET_LATENCY(FLatency); - 80017ea: 4b66 ldr r3, [pc, #408] ; (8001984 ) - 80017ec: 681b ldr r3, [r3, #0] - 80017ee: f023 020f bic.w r2, r3, #15 - 80017f2: 4964 ldr r1, [pc, #400] ; (8001984 ) - 80017f4: 683b ldr r3, [r7, #0] - 80017f6: 4313 orrs r3, r2 - 80017f8: 600b str r3, [r1, #0] + const char * getType(){ return "geometry_msgs/Quaternion"; }; + 8001ecc: b480 push {r7} + 8001ece: b083 sub sp, #12 + 8001ed0: af00 add r7, sp, #0 + 8001ed2: 6078 str r0, [r7, #4] + 8001ed4: 4b03 ldr r3, [pc, #12] ; (8001ee4 <_ZN13geometry_msgs10Quaternion7getTypeEv+0x18>) + 8001ed6: 4618 mov r0, r3 + 8001ed8: 370c adds r7, #12 + 8001eda: 46bd mov sp, r7 + 8001edc: f85d 7b04 ldr.w r7, [sp], #4 + 8001ee0: 4770 bx lr + 8001ee2: bf00 nop + 8001ee4: 0800a29c .word 0x0800a29c + +08001ee8 <_ZN13geometry_msgs10Quaternion6getMD5Ev>: + const char * getMD5(){ return "a779879fadf0160734f906b8c19c7004"; }; + 8001ee8: b480 push {r7} + 8001eea: b083 sub sp, #12 + 8001eec: af00 add r7, sp, #0 + 8001eee: 6078 str r0, [r7, #4] + 8001ef0: 4b03 ldr r3, [pc, #12] ; (8001f00 <_ZN13geometry_msgs10Quaternion6getMD5Ev+0x18>) + 8001ef2: 4618 mov r0, r3 + 8001ef4: 370c adds r7, #12 + 8001ef6: 46bd mov sp, r7 + 8001ef8: f85d 7b04 ldr.w r7, [sp], #4 + 8001efc: 4770 bx lr + 8001efe: bf00 nop + 8001f00: 0800a2b8 .word 0x0800a2b8 + +08001f04 <_ZN13geometry_msgs4PoseC1Ev>: + typedef geometry_msgs::Point _position_type; + _position_type position; + typedef geometry_msgs::Quaternion _orientation_type; + _orientation_type orientation; - /* Check that the new number of wait states is taken into account to access the Flash - memory by reading the FLASH_ACR register */ - if(__HAL_FLASH_GET_LATENCY() != FLatency) - 80017fa: 4b62 ldr r3, [pc, #392] ; (8001984 ) - 80017fc: 681b ldr r3, [r3, #0] - 80017fe: f003 030f and.w r3, r3, #15 - 8001802: 683a ldr r2, [r7, #0] - 8001804: 429a cmp r2, r3 - 8001806: d001 beq.n 800180c + Pose(): + 8001f04: b580 push {r7, lr} + 8001f06: b082 sub sp, #8 + 8001f08: af00 add r7, sp, #0 + 8001f0a: 6078 str r0, [r7, #4] + position(), + orientation() + 8001f0c: 687b ldr r3, [r7, #4] + 8001f0e: 4618 mov r0, r3 + 8001f10: f7fe fc9e bl 8000850 <_ZN3ros3MsgC1Ev> + 8001f14: 4a08 ldr r2, [pc, #32] ; (8001f38 <_ZN13geometry_msgs4PoseC1Ev+0x34>) + 8001f16: 687b ldr r3, [r7, #4] + 8001f18: 601a str r2, [r3, #0] + 8001f1a: 687b ldr r3, [r7, #4] + 8001f1c: 3304 adds r3, #4 + 8001f1e: 4618 mov r0, r3 + 8001f20: f7ff fe84 bl 8001c2c <_ZN13geometry_msgs5PointC1Ev> + 8001f24: 687b ldr r3, [r7, #4] + 8001f26: 3314 adds r3, #20 + 8001f28: 4618 mov r0, r3 + 8001f2a: f7ff ff25 bl 8001d78 <_ZN13geometry_msgs10QuaternionC1Ev> { - return HAL_ERROR; - 8001808: 2301 movs r3, #1 - 800180a: e0b6 b.n 800197a } - } + 8001f2e: 687b ldr r3, [r7, #4] + 8001f30: 4618 mov r0, r3 + 8001f32: 3708 adds r7, #8 + 8001f34: 46bd mov sp, r7 + 8001f36: bd80 pop {r7, pc} + 8001f38: 0800a52c .word 0x0800a52c - /*-------------------------- HCLK Configuration --------------------------*/ - if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) - 800180c: 687b ldr r3, [r7, #4] - 800180e: 681b ldr r3, [r3, #0] - 8001810: f003 0302 and.w r3, r3, #2 - 8001814: 2b00 cmp r3, #0 - 8001816: d020 beq.n 800185a - { - /* Set the highest APBx dividers in order to ensure that we do not go through - a non-spec phase whatever we decrease or increase HCLK. */ - if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) - 8001818: 687b ldr r3, [r7, #4] - 800181a: 681b ldr r3, [r3, #0] - 800181c: f003 0304 and.w r3, r3, #4 - 8001820: 2b00 cmp r3, #0 - 8001822: d005 beq.n 8001830 +08001f3c <_ZNK13geometry_msgs4Pose9serializeEPh>: + + virtual int serialize(unsigned char *outbuffer) const + 8001f3c: b580 push {r7, lr} + 8001f3e: b084 sub sp, #16 + 8001f40: af00 add r7, sp, #0 + 8001f42: 6078 str r0, [r7, #4] + 8001f44: 6039 str r1, [r7, #0] { - MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16); - 8001824: 4b58 ldr r3, [pc, #352] ; (8001988 ) - 8001826: 689b ldr r3, [r3, #8] - 8001828: 4a57 ldr r2, [pc, #348] ; (8001988 ) - 800182a: f443 53e0 orr.w r3, r3, #7168 ; 0x1c00 - 800182e: 6093 str r3, [r2, #8] + int offset = 0; + 8001f46: 2300 movs r3, #0 + 8001f48: 60fb str r3, [r7, #12] + offset += this->position.serialize(outbuffer + offset); + 8001f4a: 687b ldr r3, [r7, #4] + 8001f4c: 1d18 adds r0, r3, #4 + 8001f4e: 68fb ldr r3, [r7, #12] + 8001f50: 683a ldr r2, [r7, #0] + 8001f52: 4413 add r3, r2 + 8001f54: 4619 mov r1, r3 + 8001f56: f7ff fe87 bl 8001c68 <_ZNK13geometry_msgs5Point9serializeEPh> + 8001f5a: 4602 mov r2, r0 + 8001f5c: 68fb ldr r3, [r7, #12] + 8001f5e: 4413 add r3, r2 + 8001f60: 60fb str r3, [r7, #12] + offset += this->orientation.serialize(outbuffer + offset); + 8001f62: 687b ldr r3, [r7, #4] + 8001f64: f103 0014 add.w r0, r3, #20 + 8001f68: 68fb ldr r3, [r7, #12] + 8001f6a: 683a ldr r2, [r7, #0] + 8001f6c: 4413 add r3, r2 + 8001f6e: 4619 mov r1, r3 + 8001f70: f7ff ff24 bl 8001dbc <_ZNK13geometry_msgs10Quaternion9serializeEPh> + 8001f74: 4602 mov r2, r0 + 8001f76: 68fb ldr r3, [r7, #12] + 8001f78: 4413 add r3, r2 + 8001f7a: 60fb str r3, [r7, #12] + return offset; + 8001f7c: 68fb ldr r3, [r7, #12] } + 8001f7e: 4618 mov r0, r3 + 8001f80: 3710 adds r7, #16 + 8001f82: 46bd mov sp, r7 + 8001f84: bd80 pop {r7, pc} - if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) - 8001830: 687b ldr r3, [r7, #4] - 8001832: 681b ldr r3, [r3, #0] - 8001834: f003 0308 and.w r3, r3, #8 - 8001838: 2b00 cmp r3, #0 - 800183a: d005 beq.n 8001848 +08001f86 <_ZN13geometry_msgs4Pose11deserializeEPh>: + + virtual int deserialize(unsigned char *inbuffer) + 8001f86: b580 push {r7, lr} + 8001f88: b084 sub sp, #16 + 8001f8a: af00 add r7, sp, #0 + 8001f8c: 6078 str r0, [r7, #4] + 8001f8e: 6039 str r1, [r7, #0] { - MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3)); - 800183c: 4b52 ldr r3, [pc, #328] ; (8001988 ) - 800183e: 689b ldr r3, [r3, #8] - 8001840: 4a51 ldr r2, [pc, #324] ; (8001988 ) - 8001842: f443 4360 orr.w r3, r3, #57344 ; 0xe000 - 8001846: 6093 str r3, [r2, #8] + int offset = 0; + 8001f90: 2300 movs r3, #0 + 8001f92: 60fb str r3, [r7, #12] + offset += this->position.deserialize(inbuffer + offset); + 8001f94: 687b ldr r3, [r7, #4] + 8001f96: 1d18 adds r0, r3, #4 + 8001f98: 68fb ldr r3, [r7, #12] + 8001f9a: 683a ldr r2, [r7, #0] + 8001f9c: 4413 add r3, r2 + 8001f9e: 4619 mov r1, r3 + 8001fa0: f7ff fe9b bl 8001cda <_ZN13geometry_msgs5Point11deserializeEPh> + 8001fa4: 4602 mov r2, r0 + 8001fa6: 68fb ldr r3, [r7, #12] + 8001fa8: 4413 add r3, r2 + 8001faa: 60fb str r3, [r7, #12] + offset += this->orientation.deserialize(inbuffer + offset); + 8001fac: 687b ldr r3, [r7, #4] + 8001fae: f103 0014 add.w r0, r3, #20 + 8001fb2: 68fb ldr r3, [r7, #12] + 8001fb4: 683a ldr r2, [r7, #0] + 8001fb6: 4413 add r3, r2 + 8001fb8: 4619 mov r1, r3 + 8001fba: f7ff ff47 bl 8001e4c <_ZN13geometry_msgs10Quaternion11deserializeEPh> + 8001fbe: 4602 mov r2, r0 + 8001fc0: 68fb ldr r3, [r7, #12] + 8001fc2: 4413 add r3, r2 + 8001fc4: 60fb str r3, [r7, #12] + return offset; + 8001fc6: 68fb ldr r3, [r7, #12] } + 8001fc8: 4618 mov r0, r3 + 8001fca: 3710 adds r7, #16 + 8001fcc: 46bd mov sp, r7 + 8001fce: bd80 pop {r7, pc} - /* Set the new HCLK clock divider */ - assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); - MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); - 8001848: 4b4f ldr r3, [pc, #316] ; (8001988 ) - 800184a: 689b ldr r3, [r3, #8] - 800184c: f023 02f0 bic.w r2, r3, #240 ; 0xf0 - 8001850: 687b ldr r3, [r7, #4] - 8001852: 689b ldr r3, [r3, #8] - 8001854: 494c ldr r1, [pc, #304] ; (8001988 ) - 8001856: 4313 orrs r3, r2 - 8001858: 608b str r3, [r1, #8] - } +08001fd0 <_ZN13geometry_msgs4Pose7getTypeEv>: - /*------------------------- SYSCLK Configuration ---------------------------*/ - if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) - 800185a: 687b ldr r3, [r7, #4] - 800185c: 681b ldr r3, [r3, #0] - 800185e: f003 0301 and.w r3, r3, #1 - 8001862: 2b00 cmp r3, #0 - 8001864: d040 beq.n 80018e8 - { - assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); + const char * getType(){ return "geometry_msgs/Pose"; }; + 8001fd0: b480 push {r7} + 8001fd2: b083 sub sp, #12 + 8001fd4: af00 add r7, sp, #0 + 8001fd6: 6078 str r0, [r7, #4] + 8001fd8: 4b03 ldr r3, [pc, #12] ; (8001fe8 <_ZN13geometry_msgs4Pose7getTypeEv+0x18>) + 8001fda: 4618 mov r0, r3 + 8001fdc: 370c adds r7, #12 + 8001fde: 46bd mov sp, r7 + 8001fe0: f85d 7b04 ldr.w r7, [sp], #4 + 8001fe4: 4770 bx lr + 8001fe6: bf00 nop + 8001fe8: 0800a2dc .word 0x0800a2dc + +08001fec <_ZN13geometry_msgs4Pose6getMD5Ev>: + const char * getMD5(){ return "e45d45a5a1ce597b249e23fb30fc871f"; }; + 8001fec: b480 push {r7} + 8001fee: b083 sub sp, #12 + 8001ff0: af00 add r7, sp, #0 + 8001ff2: 6078 str r0, [r7, #4] + 8001ff4: 4b03 ldr r3, [pc, #12] ; (8002004 <_ZN13geometry_msgs4Pose6getMD5Ev+0x18>) + 8001ff6: 4618 mov r0, r3 + 8001ff8: 370c adds r7, #12 + 8001ffa: 46bd mov sp, r7 + 8001ffc: f85d 7b04 ldr.w r7, [sp], #4 + 8002000: 4770 bx lr + 8002002: bf00 nop + 8002004: 0800a2f0 .word 0x0800a2f0 + +08002008 <_ZN13geometry_msgs18PoseWithCovarianceC1Ev>: + public: + typedef geometry_msgs::Pose _pose_type; + _pose_type pose; + float covariance[36]; - /* HSE is selected as System Clock Source */ - if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) - 8001866: 687b ldr r3, [r7, #4] - 8001868: 685b ldr r3, [r3, #4] - 800186a: 2b01 cmp r3, #1 - 800186c: d107 bne.n 800187e + PoseWithCovariance(): + 8002008: b580 push {r7, lr} + 800200a: b082 sub sp, #8 + 800200c: af00 add r7, sp, #0 + 800200e: 6078 str r0, [r7, #4] + pose(), + covariance() + 8002010: 687b ldr r3, [r7, #4] + 8002012: 4618 mov r0, r3 + 8002014: f7fe fc1c bl 8000850 <_ZN3ros3MsgC1Ev> + 8002018: 4a0c ldr r2, [pc, #48] ; (800204c <_ZN13geometry_msgs18PoseWithCovarianceC1Ev+0x44>) + 800201a: 687b ldr r3, [r7, #4] + 800201c: 601a str r2, [r3, #0] + 800201e: 687b ldr r3, [r7, #4] + 8002020: 3304 adds r3, #4 + 8002022: 4618 mov r0, r3 + 8002024: f7ff ff6e bl 8001f04 <_ZN13geometry_msgs4PoseC1Ev> + 8002028: 687b ldr r3, [r7, #4] + 800202a: f103 022c add.w r2, r3, #44 ; 0x2c + 800202e: 2323 movs r3, #35 ; 0x23 + 8002030: 2b00 cmp r3, #0 + 8002032: db05 blt.n 8002040 <_ZN13geometry_msgs18PoseWithCovarianceC1Ev+0x38> + 8002034: f04f 0100 mov.w r1, #0 + 8002038: 6011 str r1, [r2, #0] + 800203a: 3204 adds r2, #4 + 800203c: 3b01 subs r3, #1 + 800203e: e7f7 b.n 8002030 <_ZN13geometry_msgs18PoseWithCovarianceC1Ev+0x28> { - /* Check the HSE ready flag */ - if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) - 800186e: 4b46 ldr r3, [pc, #280] ; (8001988 ) - 8001870: 681b ldr r3, [r3, #0] - 8001872: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 8001876: 2b00 cmp r3, #0 - 8001878: d115 bne.n 80018a6 - { - return HAL_ERROR; - 800187a: 2301 movs r3, #1 - 800187c: e07d b.n 800197a - } } - /* PLL is selected as System Clock Source */ - else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) - 800187e: 687b ldr r3, [r7, #4] - 8001880: 685b ldr r3, [r3, #4] - 8001882: 2b02 cmp r3, #2 - 8001884: d107 bne.n 8001896 + 8002040: 687b ldr r3, [r7, #4] + 8002042: 4618 mov r0, r3 + 8002044: 3708 adds r7, #8 + 8002046: 46bd mov sp, r7 + 8002048: bd80 pop {r7, pc} + 800204a: bf00 nop + 800204c: 0800a514 .word 0x0800a514 + +08002050 <_ZNK13geometry_msgs18PoseWithCovariance9serializeEPh>: + + virtual int serialize(unsigned char *outbuffer) const + 8002050: b580 push {r7, lr} + 8002052: b084 sub sp, #16 + 8002054: af00 add r7, sp, #0 + 8002056: 6078 str r0, [r7, #4] + 8002058: 6039 str r1, [r7, #0] { - /* Check the PLL ready flag */ - if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) - 8001886: 4b40 ldr r3, [pc, #256] ; (8001988 ) - 8001888: 681b ldr r3, [r3, #0] - 800188a: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 800188e: 2b00 cmp r3, #0 - 8001890: d109 bne.n 80018a6 - { - return HAL_ERROR; - 8001892: 2301 movs r3, #1 - 8001894: e071 b.n 800197a + int offset = 0; + 800205a: 2300 movs r3, #0 + 800205c: 60fb str r3, [r7, #12] + offset += this->pose.serialize(outbuffer + offset); + 800205e: 687b ldr r3, [r7, #4] + 8002060: 1d18 adds r0, r3, #4 + 8002062: 68fb ldr r3, [r7, #12] + 8002064: 683a ldr r2, [r7, #0] + 8002066: 4413 add r3, r2 + 8002068: 4619 mov r1, r3 + 800206a: f7ff ff67 bl 8001f3c <_ZNK13geometry_msgs4Pose9serializeEPh> + 800206e: 4602 mov r2, r0 + 8002070: 68fb ldr r3, [r7, #12] + 8002072: 4413 add r3, r2 + 8002074: 60fb str r3, [r7, #12] + for( uint32_t i = 0; i < 36; i++){ + 8002076: 2300 movs r3, #0 + 8002078: 60bb str r3, [r7, #8] + 800207a: 68bb ldr r3, [r7, #8] + 800207c: 2b23 cmp r3, #35 ; 0x23 + 800207e: d817 bhi.n 80020b0 <_ZNK13geometry_msgs18PoseWithCovariance9serializeEPh+0x60> + offset += serializeAvrFloat64(outbuffer + offset, this->covariance[i]); + 8002080: 68fb ldr r3, [r7, #12] + 8002082: 683a ldr r2, [r7, #0] + 8002084: 18d1 adds r1, r2, r3 + 8002086: 687a ldr r2, [r7, #4] + 8002088: 68bb ldr r3, [r7, #8] + 800208a: 330a adds r3, #10 + 800208c: 009b lsls r3, r3, #2 + 800208e: 4413 add r3, r2 + 8002090: 3304 adds r3, #4 + 8002092: edd3 7a00 vldr s15, [r3] + 8002096: eeb0 0a67 vmov.f32 s0, s15 + 800209a: 4608 mov r0, r1 + 800209c: f7fe fb0c bl 80006b8 <_ZN3ros3Msg19serializeAvrFloat64EPhf> + 80020a0: 4602 mov r2, r0 + 80020a2: 68fb ldr r3, [r7, #12] + 80020a4: 4413 add r3, r2 + 80020a6: 60fb str r3, [r7, #12] + for( uint32_t i = 0; i < 36; i++){ + 80020a8: 68bb ldr r3, [r7, #8] + 80020aa: 3301 adds r3, #1 + 80020ac: 60bb str r3, [r7, #8] + 80020ae: e7e4 b.n 800207a <_ZNK13geometry_msgs18PoseWithCovariance9serializeEPh+0x2a> + } + return offset; + 80020b0: 68fb ldr r3, [r7, #12] } - /* HSI is selected as System Clock Source */ - else + 80020b2: 4618 mov r0, r3 + 80020b4: 3710 adds r7, #16 + 80020b6: 46bd mov sp, r7 + 80020b8: bd80 pop {r7, pc} + +080020ba <_ZN13geometry_msgs18PoseWithCovariance11deserializeEPh>: + + virtual int deserialize(unsigned char *inbuffer) + 80020ba: b580 push {r7, lr} + 80020bc: b084 sub sp, #16 + 80020be: af00 add r7, sp, #0 + 80020c0: 6078 str r0, [r7, #4] + 80020c2: 6039 str r1, [r7, #0] { - /* Check the HSI ready flag */ - if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) - 8001896: 4b3c ldr r3, [pc, #240] ; (8001988 ) - 8001898: 681b ldr r3, [r3, #0] - 800189a: f003 0302 and.w r3, r3, #2 - 800189e: 2b00 cmp r3, #0 - 80018a0: d101 bne.n 80018a6 - { - return HAL_ERROR; - 80018a2: 2301 movs r3, #1 - 80018a4: e069 b.n 800197a + int offset = 0; + 80020c4: 2300 movs r3, #0 + 80020c6: 60fb str r3, [r7, #12] + offset += this->pose.deserialize(inbuffer + offset); + 80020c8: 687b ldr r3, [r7, #4] + 80020ca: 1d18 adds r0, r3, #4 + 80020cc: 68fb ldr r3, [r7, #12] + 80020ce: 683a ldr r2, [r7, #0] + 80020d0: 4413 add r3, r2 + 80020d2: 4619 mov r1, r3 + 80020d4: f7ff ff57 bl 8001f86 <_ZN13geometry_msgs4Pose11deserializeEPh> + 80020d8: 4602 mov r2, r0 + 80020da: 68fb ldr r3, [r7, #12] + 80020dc: 4413 add r3, r2 + 80020de: 60fb str r3, [r7, #12] + for( uint32_t i = 0; i < 36; i++){ + 80020e0: 2300 movs r3, #0 + 80020e2: 60bb str r3, [r7, #8] + 80020e4: 68bb ldr r3, [r7, #8] + 80020e6: 2b23 cmp r3, #35 ; 0x23 + 80020e8: d813 bhi.n 8002112 <_ZN13geometry_msgs18PoseWithCovariance11deserializeEPh+0x58> + offset += deserializeAvrFloat64(inbuffer + offset, &(this->covariance[i])); + 80020ea: 68fb ldr r3, [r7, #12] + 80020ec: 683a ldr r2, [r7, #0] + 80020ee: 18d0 adds r0, r2, r3 + 80020f0: 68bb ldr r3, [r7, #8] + 80020f2: 330a adds r3, #10 + 80020f4: 009b lsls r3, r3, #2 + 80020f6: 687a ldr r2, [r7, #4] + 80020f8: 4413 add r3, r2 + 80020fa: 3304 adds r3, #4 + 80020fc: 4619 mov r1, r3 + 80020fe: f7fe fb47 bl 8000790 <_ZN3ros3Msg21deserializeAvrFloat64EPKhPf> + 8002102: 4602 mov r2, r0 + 8002104: 68fb ldr r3, [r7, #12] + 8002106: 4413 add r3, r2 + 8002108: 60fb str r3, [r7, #12] + for( uint32_t i = 0; i < 36; i++){ + 800210a: 68bb ldr r3, [r7, #8] + 800210c: 3301 adds r3, #1 + 800210e: 60bb str r3, [r7, #8] + 8002110: e7e8 b.n 80020e4 <_ZN13geometry_msgs18PoseWithCovariance11deserializeEPh+0x2a> } + return offset; + 8002112: 68fb ldr r3, [r7, #12] } + 8002114: 4618 mov r0, r3 + 8002116: 3710 adds r7, #16 + 8002118: 46bd mov sp, r7 + 800211a: bd80 pop {r7, pc} - __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); - 80018a6: 4b38 ldr r3, [pc, #224] ; (8001988 ) - 80018a8: 689b ldr r3, [r3, #8] - 80018aa: f023 0203 bic.w r2, r3, #3 - 80018ae: 687b ldr r3, [r7, #4] - 80018b0: 685b ldr r3, [r3, #4] - 80018b2: 4935 ldr r1, [pc, #212] ; (8001988 ) - 80018b4: 4313 orrs r3, r2 - 80018b6: 608b str r3, [r1, #8] +0800211c <_ZN13geometry_msgs18PoseWithCovariance7getTypeEv>: - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - 80018b8: f7fe fe98 bl 80005ec - 80018bc: 60f8 str r0, [r7, #12] + const char * getType(){ return "geometry_msgs/PoseWithCovariance"; }; + 800211c: b480 push {r7} + 800211e: b083 sub sp, #12 + 8002120: af00 add r7, sp, #0 + 8002122: 6078 str r0, [r7, #4] + 8002124: 4b03 ldr r3, [pc, #12] ; (8002134 <_ZN13geometry_msgs18PoseWithCovariance7getTypeEv+0x18>) + 8002126: 4618 mov r0, r3 + 8002128: 370c adds r7, #12 + 800212a: 46bd mov sp, r7 + 800212c: f85d 7b04 ldr.w r7, [sp], #4 + 8002130: 4770 bx lr + 8002132: bf00 nop + 8002134: 0800a314 .word 0x0800a314 + +08002138 <_ZN13geometry_msgs18PoseWithCovariance6getMD5Ev>: + const char * getMD5(){ return "c23e848cf1b7533a8d7c259073a97e6f"; }; + 8002138: b480 push {r7} + 800213a: b083 sub sp, #12 + 800213c: af00 add r7, sp, #0 + 800213e: 6078 str r0, [r7, #4] + 8002140: 4b03 ldr r3, [pc, #12] ; (8002150 <_ZN13geometry_msgs18PoseWithCovariance6getMD5Ev+0x18>) + 8002142: 4618 mov r0, r3 + 8002144: 370c adds r7, #12 + 8002146: 46bd mov sp, r7 + 8002148: f85d 7b04 ldr.w r7, [sp], #4 + 800214c: 4770 bx lr + 800214e: bf00 nop + 8002150: 0800a338 .word 0x0800a338 + +08002154 <_ZN13geometry_msgs7Vector3C1Ev>: + typedef float _y_type; + _y_type y; + typedef float _z_type; + _z_type z; - while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) - 80018be: e00a b.n 80018d6 + Vector3(): + 8002154: b580 push {r7, lr} + 8002156: b082 sub sp, #8 + 8002158: af00 add r7, sp, #0 + 800215a: 6078 str r0, [r7, #4] + x(0), + y(0), + z(0) + 800215c: 687b ldr r3, [r7, #4] + 800215e: 4618 mov r0, r3 + 8002160: f7fe fb76 bl 8000850 <_ZN3ros3MsgC1Ev> + 8002164: 4a09 ldr r2, [pc, #36] ; (800218c <_ZN13geometry_msgs7Vector3C1Ev+0x38>) + 8002166: 687b ldr r3, [r7, #4] + 8002168: 601a str r2, [r3, #0] + 800216a: 687b ldr r3, [r7, #4] + 800216c: f04f 0200 mov.w r2, #0 + 8002170: 605a str r2, [r3, #4] + 8002172: 687b ldr r3, [r7, #4] + 8002174: f04f 0200 mov.w r2, #0 + 8002178: 609a str r2, [r3, #8] + 800217a: 687b ldr r3, [r7, #4] + 800217c: f04f 0200 mov.w r2, #0 + 8002180: 60da str r2, [r3, #12] { - if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) - 80018c0: f7fe fe94 bl 80005ec - 80018c4: 4602 mov r2, r0 - 80018c6: 68fb ldr r3, [r7, #12] - 80018c8: 1ad3 subs r3, r2, r3 - 80018ca: f241 3288 movw r2, #5000 ; 0x1388 - 80018ce: 4293 cmp r3, r2 - 80018d0: d901 bls.n 80018d6 - { - return HAL_TIMEOUT; - 80018d2: 2303 movs r3, #3 - 80018d4: e051 b.n 800197a - while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) - 80018d6: 4b2c ldr r3, [pc, #176] ; (8001988 ) - 80018d8: 689b ldr r3, [r3, #8] - 80018da: f003 020c and.w r2, r3, #12 - 80018de: 687b ldr r3, [r7, #4] - 80018e0: 685b ldr r3, [r3, #4] - 80018e2: 009b lsls r3, r3, #2 - 80018e4: 429a cmp r2, r3 - 80018e6: d1eb bne.n 80018c0 - } } - } + 8002182: 687b ldr r3, [r7, #4] + 8002184: 4618 mov r0, r3 + 8002186: 3708 adds r7, #8 + 8002188: 46bd mov sp, r7 + 800218a: bd80 pop {r7, pc} + 800218c: 0800a4fc .word 0x0800a4fc - /* Decreasing the number of wait states because of lower CPU frequency */ - if(FLatency < __HAL_FLASH_GET_LATENCY()) - 80018e8: 4b26 ldr r3, [pc, #152] ; (8001984 ) - 80018ea: 681b ldr r3, [r3, #0] - 80018ec: f003 030f and.w r3, r3, #15 - 80018f0: 683a ldr r2, [r7, #0] - 80018f2: 429a cmp r2, r3 - 80018f4: d210 bcs.n 8001918 - { - /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ - __HAL_FLASH_SET_LATENCY(FLatency); - 80018f6: 4b23 ldr r3, [pc, #140] ; (8001984 ) - 80018f8: 681b ldr r3, [r3, #0] - 80018fa: f023 020f bic.w r2, r3, #15 - 80018fe: 4921 ldr r1, [pc, #132] ; (8001984 ) - 8001900: 683b ldr r3, [r7, #0] - 8001902: 4313 orrs r3, r2 - 8001904: 600b str r3, [r1, #0] +08002190 <_ZNK13geometry_msgs7Vector39serializeEPh>: - /* Check that the new number of wait states is taken into account to access the Flash - memory by reading the FLASH_ACR register */ - if(__HAL_FLASH_GET_LATENCY() != FLatency) - 8001906: 4b1f ldr r3, [pc, #124] ; (8001984 ) - 8001908: 681b ldr r3, [r3, #0] - 800190a: f003 030f and.w r3, r3, #15 - 800190e: 683a ldr r2, [r7, #0] - 8001910: 429a cmp r2, r3 - 8001912: d001 beq.n 8001918 + virtual int serialize(unsigned char *outbuffer) const + 8002190: b580 push {r7, lr} + 8002192: b084 sub sp, #16 + 8002194: af00 add r7, sp, #0 + 8002196: 6078 str r0, [r7, #4] + 8002198: 6039 str r1, [r7, #0] { - return HAL_ERROR; - 8001914: 2301 movs r3, #1 - 8001916: e030 b.n 800197a + int offset = 0; + 800219a: 2300 movs r3, #0 + 800219c: 60fb str r3, [r7, #12] + offset += serializeAvrFloat64(outbuffer + offset, this->x); + 800219e: 68fb ldr r3, [r7, #12] + 80021a0: 683a ldr r2, [r7, #0] + 80021a2: 441a add r2, r3 + 80021a4: 687b ldr r3, [r7, #4] + 80021a6: edd3 7a01 vldr s15, [r3, #4] + 80021aa: eeb0 0a67 vmov.f32 s0, s15 + 80021ae: 4610 mov r0, r2 + 80021b0: f7fe fa82 bl 80006b8 <_ZN3ros3Msg19serializeAvrFloat64EPhf> + 80021b4: 4602 mov r2, r0 + 80021b6: 68fb ldr r3, [r7, #12] + 80021b8: 4413 add r3, r2 + 80021ba: 60fb str r3, [r7, #12] + offset += serializeAvrFloat64(outbuffer + offset, this->y); + 80021bc: 68fb ldr r3, [r7, #12] + 80021be: 683a ldr r2, [r7, #0] + 80021c0: 441a add r2, r3 + 80021c2: 687b ldr r3, [r7, #4] + 80021c4: edd3 7a02 vldr s15, [r3, #8] + 80021c8: eeb0 0a67 vmov.f32 s0, s15 + 80021cc: 4610 mov r0, r2 + 80021ce: f7fe fa73 bl 80006b8 <_ZN3ros3Msg19serializeAvrFloat64EPhf> + 80021d2: 4602 mov r2, r0 + 80021d4: 68fb ldr r3, [r7, #12] + 80021d6: 4413 add r3, r2 + 80021d8: 60fb str r3, [r7, #12] + offset += serializeAvrFloat64(outbuffer + offset, this->z); + 80021da: 68fb ldr r3, [r7, #12] + 80021dc: 683a ldr r2, [r7, #0] + 80021de: 441a add r2, r3 + 80021e0: 687b ldr r3, [r7, #4] + 80021e2: edd3 7a03 vldr s15, [r3, #12] + 80021e6: eeb0 0a67 vmov.f32 s0, s15 + 80021ea: 4610 mov r0, r2 + 80021ec: f7fe fa64 bl 80006b8 <_ZN3ros3Msg19serializeAvrFloat64EPhf> + 80021f0: 4602 mov r2, r0 + 80021f2: 68fb ldr r3, [r7, #12] + 80021f4: 4413 add r3, r2 + 80021f6: 60fb str r3, [r7, #12] + return offset; + 80021f8: 68fb ldr r3, [r7, #12] } - } - - /*-------------------------- PCLK1 Configuration ---------------------------*/ - if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) - 8001918: 687b ldr r3, [r7, #4] - 800191a: 681b ldr r3, [r3, #0] - 800191c: f003 0304 and.w r3, r3, #4 - 8001920: 2b00 cmp r3, #0 - 8001922: d008 beq.n 8001936 - { - assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); - MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); - 8001924: 4b18 ldr r3, [pc, #96] ; (8001988 ) - 8001926: 689b ldr r3, [r3, #8] - 8001928: f423 52e0 bic.w r2, r3, #7168 ; 0x1c00 - 800192c: 687b ldr r3, [r7, #4] - 800192e: 68db ldr r3, [r3, #12] - 8001930: 4915 ldr r1, [pc, #84] ; (8001988 ) - 8001932: 4313 orrs r3, r2 - 8001934: 608b str r3, [r1, #8] - } + 80021fa: 4618 mov r0, r3 + 80021fc: 3710 adds r7, #16 + 80021fe: 46bd mov sp, r7 + 8002200: bd80 pop {r7, pc} - /*-------------------------- PCLK2 Configuration ---------------------------*/ - if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) - 8001936: 687b ldr r3, [r7, #4] - 8001938: 681b ldr r3, [r3, #0] - 800193a: f003 0308 and.w r3, r3, #8 - 800193e: 2b00 cmp r3, #0 - 8001940: d009 beq.n 8001956 - { - assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); - MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3)); - 8001942: 4b11 ldr r3, [pc, #68] ; (8001988 ) - 8001944: 689b ldr r3, [r3, #8] - 8001946: f423 4260 bic.w r2, r3, #57344 ; 0xe000 - 800194a: 687b ldr r3, [r7, #4] - 800194c: 691b ldr r3, [r3, #16] - 800194e: 00db lsls r3, r3, #3 - 8001950: 490d ldr r1, [pc, #52] ; (8001988 ) - 8001952: 4313 orrs r3, r2 - 8001954: 608b str r3, [r1, #8] - } +08002202 <_ZN13geometry_msgs7Vector311deserializeEPh>: - /* Update the SystemCoreClock global variable */ - SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos]; - 8001956: f000 f81d bl 8001994 - 800195a: 4601 mov r1, r0 - 800195c: 4b0a ldr r3, [pc, #40] ; (8001988 ) - 800195e: 689b ldr r3, [r3, #8] - 8001960: 091b lsrs r3, r3, #4 - 8001962: f003 030f and.w r3, r3, #15 - 8001966: 4a09 ldr r2, [pc, #36] ; (800198c ) - 8001968: 5cd3 ldrb r3, [r2, r3] - 800196a: fa21 f303 lsr.w r3, r1, r3 - 800196e: 4a08 ldr r2, [pc, #32] ; (8001990 ) - 8001970: 6013 str r3, [r2, #0] + virtual int deserialize(unsigned char *inbuffer) + 8002202: b580 push {r7, lr} + 8002204: b084 sub sp, #16 + 8002206: af00 add r7, sp, #0 + 8002208: 6078 str r0, [r7, #4] + 800220a: 6039 str r1, [r7, #0] + { + int offset = 0; + 800220c: 2300 movs r3, #0 + 800220e: 60fb str r3, [r7, #12] + offset += deserializeAvrFloat64(inbuffer + offset, &(this->x)); + 8002210: 68fb ldr r3, [r7, #12] + 8002212: 683a ldr r2, [r7, #0] + 8002214: 441a add r2, r3 + 8002216: 687b ldr r3, [r7, #4] + 8002218: 3304 adds r3, #4 + 800221a: 4619 mov r1, r3 + 800221c: 4610 mov r0, r2 + 800221e: f7fe fab7 bl 8000790 <_ZN3ros3Msg21deserializeAvrFloat64EPKhPf> + 8002222: 4602 mov r2, r0 + 8002224: 68fb ldr r3, [r7, #12] + 8002226: 4413 add r3, r2 + 8002228: 60fb str r3, [r7, #12] + offset += deserializeAvrFloat64(inbuffer + offset, &(this->y)); + 800222a: 68fb ldr r3, [r7, #12] + 800222c: 683a ldr r2, [r7, #0] + 800222e: 441a add r2, r3 + 8002230: 687b ldr r3, [r7, #4] + 8002232: 3308 adds r3, #8 + 8002234: 4619 mov r1, r3 + 8002236: 4610 mov r0, r2 + 8002238: f7fe faaa bl 8000790 <_ZN3ros3Msg21deserializeAvrFloat64EPKhPf> + 800223c: 4602 mov r2, r0 + 800223e: 68fb ldr r3, [r7, #12] + 8002240: 4413 add r3, r2 + 8002242: 60fb str r3, [r7, #12] + offset += deserializeAvrFloat64(inbuffer + offset, &(this->z)); + 8002244: 68fb ldr r3, [r7, #12] + 8002246: 683a ldr r2, [r7, #0] + 8002248: 441a add r2, r3 + 800224a: 687b ldr r3, [r7, #4] + 800224c: 330c adds r3, #12 + 800224e: 4619 mov r1, r3 + 8002250: 4610 mov r0, r2 + 8002252: f7fe fa9d bl 8000790 <_ZN3ros3Msg21deserializeAvrFloat64EPKhPf> + 8002256: 4602 mov r2, r0 + 8002258: 68fb ldr r3, [r7, #12] + 800225a: 4413 add r3, r2 + 800225c: 60fb str r3, [r7, #12] + return offset; + 800225e: 68fb ldr r3, [r7, #12] + } + 8002260: 4618 mov r0, r3 + 8002262: 3710 adds r7, #16 + 8002264: 46bd mov sp, r7 + 8002266: bd80 pop {r7, pc} - /* Configure the source of time base considering new system clocks settings*/ - HAL_InitTick (TICK_INT_PRIORITY); - 8001972: 2000 movs r0, #0 - 8001974: f7fe fdf6 bl 8000564 +08002268 <_ZN13geometry_msgs7Vector37getTypeEv>: - return HAL_OK; - 8001978: 2300 movs r3, #0 -} - 800197a: 4618 mov r0, r3 - 800197c: 3710 adds r7, #16 - 800197e: 46bd mov sp, r7 - 8001980: bd80 pop {r7, pc} - 8001982: bf00 nop - 8001984: 40023c00 .word 0x40023c00 - 8001988: 40023800 .word 0x40023800 - 800198c: 0800a5c8 .word 0x0800a5c8 - 8001990: 20000018 .word 0x20000018 - -08001994 : - * - * - * @retval SYSCLK frequency - */ -uint32_t HAL_RCC_GetSysClockFreq(void) -{ - 8001994: b5f0 push {r4, r5, r6, r7, lr} - 8001996: b085 sub sp, #20 - 8001998: af00 add r7, sp, #0 - uint32_t pllm = 0, pllvco = 0, pllp = 0; - 800199a: 2300 movs r3, #0 - 800199c: 607b str r3, [r7, #4] - 800199e: 2300 movs r3, #0 - 80019a0: 60fb str r3, [r7, #12] - 80019a2: 2300 movs r3, #0 - 80019a4: 603b str r3, [r7, #0] - uint32_t sysclockfreq = 0; - 80019a6: 2300 movs r3, #0 - 80019a8: 60bb str r3, [r7, #8] + const char * getType(){ return "geometry_msgs/Vector3"; }; + 8002268: b480 push {r7} + 800226a: b083 sub sp, #12 + 800226c: af00 add r7, sp, #0 + 800226e: 6078 str r0, [r7, #4] + 8002270: 4b03 ldr r3, [pc, #12] ; (8002280 <_ZN13geometry_msgs7Vector37getTypeEv+0x18>) + 8002272: 4618 mov r0, r3 + 8002274: 370c adds r7, #12 + 8002276: 46bd mov sp, r7 + 8002278: f85d 7b04 ldr.w r7, [sp], #4 + 800227c: 4770 bx lr + 800227e: bf00 nop + 8002280: 0800a35c .word 0x0800a35c + +08002284 <_ZN13geometry_msgs7Vector36getMD5Ev>: + const char * getMD5(){ return "4a842b65f413084dc2b10fb484ea7f17"; }; + 8002284: b480 push {r7} + 8002286: b083 sub sp, #12 + 8002288: af00 add r7, sp, #0 + 800228a: 6078 str r0, [r7, #4] + 800228c: 4b03 ldr r3, [pc, #12] ; (800229c <_ZN13geometry_msgs7Vector36getMD5Ev+0x18>) + 800228e: 4618 mov r0, r3 + 8002290: 370c adds r7, #12 + 8002292: 46bd mov sp, r7 + 8002294: f85d 7b04 ldr.w r7, [sp], #4 + 8002298: 4770 bx lr + 800229a: bf00 nop + 800229c: 0800a278 .word 0x0800a278 + +080022a0 <_ZN13geometry_msgs5TwistC1Ev>: + typedef geometry_msgs::Vector3 _linear_type; + _linear_type linear; + typedef geometry_msgs::Vector3 _angular_type; + _angular_type angular; - /* Get SYSCLK source -------------------------------------------------------*/ - switch (RCC->CFGR & RCC_CFGR_SWS) - 80019aa: 4b50 ldr r3, [pc, #320] ; (8001aec ) - 80019ac: 689b ldr r3, [r3, #8] - 80019ae: f003 030c and.w r3, r3, #12 - 80019b2: 2b04 cmp r3, #4 - 80019b4: d007 beq.n 80019c6 - 80019b6: 2b08 cmp r3, #8 - 80019b8: d008 beq.n 80019cc - 80019ba: 2b00 cmp r3, #0 - 80019bc: f040 808d bne.w 8001ada - { - case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */ + Twist(): + 80022a0: b580 push {r7, lr} + 80022a2: b082 sub sp, #8 + 80022a4: af00 add r7, sp, #0 + 80022a6: 6078 str r0, [r7, #4] + linear(), + angular() + 80022a8: 687b ldr r3, [r7, #4] + 80022aa: 4618 mov r0, r3 + 80022ac: f7fe fad0 bl 8000850 <_ZN3ros3MsgC1Ev> + 80022b0: 4a08 ldr r2, [pc, #32] ; (80022d4 <_ZN13geometry_msgs5TwistC1Ev+0x34>) + 80022b2: 687b ldr r3, [r7, #4] + 80022b4: 601a str r2, [r3, #0] + 80022b6: 687b ldr r3, [r7, #4] + 80022b8: 3304 adds r3, #4 + 80022ba: 4618 mov r0, r3 + 80022bc: f7ff ff4a bl 8002154 <_ZN13geometry_msgs7Vector3C1Ev> + 80022c0: 687b ldr r3, [r7, #4] + 80022c2: 3314 adds r3, #20 + 80022c4: 4618 mov r0, r3 + 80022c6: f7ff ff45 bl 8002154 <_ZN13geometry_msgs7Vector3C1Ev> { - sysclockfreq = HSI_VALUE; - 80019c0: 4b4b ldr r3, [pc, #300] ; (8001af0 ) - 80019c2: 60bb str r3, [r7, #8] - break; - 80019c4: e08c b.n 8001ae0 } - case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock source */ + 80022ca: 687b ldr r3, [r7, #4] + 80022cc: 4618 mov r0, r3 + 80022ce: 3708 adds r7, #8 + 80022d0: 46bd mov sp, r7 + 80022d2: bd80 pop {r7, pc} + 80022d4: 0800a4e4 .word 0x0800a4e4 + +080022d8 <_ZNK13geometry_msgs5Twist9serializeEPh>: + + virtual int serialize(unsigned char *outbuffer) const + 80022d8: b580 push {r7, lr} + 80022da: b084 sub sp, #16 + 80022dc: af00 add r7, sp, #0 + 80022de: 6078 str r0, [r7, #4] + 80022e0: 6039 str r1, [r7, #0] { - sysclockfreq = HSE_VALUE; - 80019c6: 4b4b ldr r3, [pc, #300] ; (8001af4 ) - 80019c8: 60bb str r3, [r7, #8] - break; - 80019ca: e089 b.n 8001ae0 + int offset = 0; + 80022e2: 2300 movs r3, #0 + 80022e4: 60fb str r3, [r7, #12] + offset += this->linear.serialize(outbuffer + offset); + 80022e6: 687b ldr r3, [r7, #4] + 80022e8: 1d18 adds r0, r3, #4 + 80022ea: 68fb ldr r3, [r7, #12] + 80022ec: 683a ldr r2, [r7, #0] + 80022ee: 4413 add r3, r2 + 80022f0: 4619 mov r1, r3 + 80022f2: f7ff ff4d bl 8002190 <_ZNK13geometry_msgs7Vector39serializeEPh> + 80022f6: 4602 mov r2, r0 + 80022f8: 68fb ldr r3, [r7, #12] + 80022fa: 4413 add r3, r2 + 80022fc: 60fb str r3, [r7, #12] + offset += this->angular.serialize(outbuffer + offset); + 80022fe: 687b ldr r3, [r7, #4] + 8002300: f103 0014 add.w r0, r3, #20 + 8002304: 68fb ldr r3, [r7, #12] + 8002306: 683a ldr r2, [r7, #0] + 8002308: 4413 add r3, r2 + 800230a: 4619 mov r1, r3 + 800230c: f7ff ff40 bl 8002190 <_ZNK13geometry_msgs7Vector39serializeEPh> + 8002310: 4602 mov r2, r0 + 8002312: 68fb ldr r3, [r7, #12] + 8002314: 4413 add r3, r2 + 8002316: 60fb str r3, [r7, #12] + return offset; + 8002318: 68fb ldr r3, [r7, #12] } - case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock source */ - { - /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN - SYSCLK = PLL_VCO / PLLP */ - pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM; - 80019cc: 4b47 ldr r3, [pc, #284] ; (8001aec ) - 80019ce: 685b ldr r3, [r3, #4] - 80019d0: f003 033f and.w r3, r3, #63 ; 0x3f - 80019d4: 607b str r3, [r7, #4] - if (__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLCFGR_PLLSRC_HSI) - 80019d6: 4b45 ldr r3, [pc, #276] ; (8001aec ) - 80019d8: 685b ldr r3, [r3, #4] - 80019da: f403 0380 and.w r3, r3, #4194304 ; 0x400000 - 80019de: 2b00 cmp r3, #0 - 80019e0: d023 beq.n 8001a2a - { - /* HSE used as PLL clock source */ - pllvco = (uint32_t) ((((uint64_t) HSE_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm); - 80019e2: 4b42 ldr r3, [pc, #264] ; (8001aec ) - 80019e4: 685b ldr r3, [r3, #4] - 80019e6: 099b lsrs r3, r3, #6 - 80019e8: f04f 0400 mov.w r4, #0 - 80019ec: f240 11ff movw r1, #511 ; 0x1ff - 80019f0: f04f 0200 mov.w r2, #0 - 80019f4: ea03 0501 and.w r5, r3, r1 - 80019f8: ea04 0602 and.w r6, r4, r2 - 80019fc: 4a3d ldr r2, [pc, #244] ; (8001af4 ) - 80019fe: fb02 f106 mul.w r1, r2, r6 - 8001a02: 2200 movs r2, #0 - 8001a04: fb02 f205 mul.w r2, r2, r5 - 8001a08: 440a add r2, r1 - 8001a0a: 493a ldr r1, [pc, #232] ; (8001af4 ) - 8001a0c: fba5 0101 umull r0, r1, r5, r1 - 8001a10: 1853 adds r3, r2, r1 - 8001a12: 4619 mov r1, r3 - 8001a14: 687b ldr r3, [r7, #4] - 8001a16: f04f 0400 mov.w r4, #0 - 8001a1a: 461a mov r2, r3 - 8001a1c: 4623 mov r3, r4 - 8001a1e: f7fe fc13 bl 8000248 <__aeabi_uldivmod> - 8001a22: 4603 mov r3, r0 - 8001a24: 460c mov r4, r1 - 8001a26: 60fb str r3, [r7, #12] - 8001a28: e049 b.n 8001abe - } - else - { - /* HSI used as PLL clock source */ - pllvco = (uint32_t) ((((uint64_t) HSI_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm); - 8001a2a: 4b30 ldr r3, [pc, #192] ; (8001aec ) - 8001a2c: 685b ldr r3, [r3, #4] - 8001a2e: 099b lsrs r3, r3, #6 - 8001a30: f04f 0400 mov.w r4, #0 - 8001a34: f240 11ff movw r1, #511 ; 0x1ff - 8001a38: f04f 0200 mov.w r2, #0 - 8001a3c: ea03 0501 and.w r5, r3, r1 - 8001a40: ea04 0602 and.w r6, r4, r2 - 8001a44: 4629 mov r1, r5 - 8001a46: 4632 mov r2, r6 - 8001a48: f04f 0300 mov.w r3, #0 - 8001a4c: f04f 0400 mov.w r4, #0 - 8001a50: 0154 lsls r4, r2, #5 - 8001a52: ea44 64d1 orr.w r4, r4, r1, lsr #27 - 8001a56: 014b lsls r3, r1, #5 - 8001a58: 4619 mov r1, r3 - 8001a5a: 4622 mov r2, r4 - 8001a5c: 1b49 subs r1, r1, r5 - 8001a5e: eb62 0206 sbc.w r2, r2, r6 - 8001a62: f04f 0300 mov.w r3, #0 - 8001a66: f04f 0400 mov.w r4, #0 - 8001a6a: 0194 lsls r4, r2, #6 - 8001a6c: ea44 6491 orr.w r4, r4, r1, lsr #26 - 8001a70: 018b lsls r3, r1, #6 - 8001a72: 1a5b subs r3, r3, r1 - 8001a74: eb64 0402 sbc.w r4, r4, r2 - 8001a78: f04f 0100 mov.w r1, #0 - 8001a7c: f04f 0200 mov.w r2, #0 - 8001a80: 00e2 lsls r2, r4, #3 - 8001a82: ea42 7253 orr.w r2, r2, r3, lsr #29 - 8001a86: 00d9 lsls r1, r3, #3 - 8001a88: 460b mov r3, r1 - 8001a8a: 4614 mov r4, r2 - 8001a8c: 195b adds r3, r3, r5 - 8001a8e: eb44 0406 adc.w r4, r4, r6 - 8001a92: f04f 0100 mov.w r1, #0 - 8001a96: f04f 0200 mov.w r2, #0 - 8001a9a: 02a2 lsls r2, r4, #10 - 8001a9c: ea42 5293 orr.w r2, r2, r3, lsr #22 - 8001aa0: 0299 lsls r1, r3, #10 - 8001aa2: 460b mov r3, r1 - 8001aa4: 4614 mov r4, r2 - 8001aa6: 4618 mov r0, r3 - 8001aa8: 4621 mov r1, r4 - 8001aaa: 687b ldr r3, [r7, #4] - 8001aac: f04f 0400 mov.w r4, #0 - 8001ab0: 461a mov r2, r3 - 8001ab2: 4623 mov r3, r4 - 8001ab4: f7fe fbc8 bl 8000248 <__aeabi_uldivmod> - 8001ab8: 4603 mov r3, r0 - 8001aba: 460c mov r4, r1 - 8001abc: 60fb str r3, [r7, #12] - } - pllp = ((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >> RCC_PLLCFGR_PLLP_Pos) + 1 ) *2); - 8001abe: 4b0b ldr r3, [pc, #44] ; (8001aec ) - 8001ac0: 685b ldr r3, [r3, #4] - 8001ac2: 0c1b lsrs r3, r3, #16 - 8001ac4: f003 0303 and.w r3, r3, #3 - 8001ac8: 3301 adds r3, #1 - 8001aca: 005b lsls r3, r3, #1 - 8001acc: 603b str r3, [r7, #0] + 800231a: 4618 mov r0, r3 + 800231c: 3710 adds r7, #16 + 800231e: 46bd mov sp, r7 + 8002320: bd80 pop {r7, pc} - sysclockfreq = pllvco/pllp; - 8001ace: 68fa ldr r2, [r7, #12] - 8001ad0: 683b ldr r3, [r7, #0] - 8001ad2: fbb2 f3f3 udiv r3, r2, r3 - 8001ad6: 60bb str r3, [r7, #8] - break; - 8001ad8: e002 b.n 8001ae0 - } - default: +08002322 <_ZN13geometry_msgs5Twist11deserializeEPh>: + + virtual int deserialize(unsigned char *inbuffer) + 8002322: b580 push {r7, lr} + 8002324: b084 sub sp, #16 + 8002326: af00 add r7, sp, #0 + 8002328: 6078 str r0, [r7, #4] + 800232a: 6039 str r1, [r7, #0] { - sysclockfreq = HSI_VALUE; - 8001ada: 4b05 ldr r3, [pc, #20] ; (8001af0 ) - 8001adc: 60bb str r3, [r7, #8] - break; - 8001ade: bf00 nop + int offset = 0; + 800232c: 2300 movs r3, #0 + 800232e: 60fb str r3, [r7, #12] + offset += this->linear.deserialize(inbuffer + offset); + 8002330: 687b ldr r3, [r7, #4] + 8002332: 1d18 adds r0, r3, #4 + 8002334: 68fb ldr r3, [r7, #12] + 8002336: 683a ldr r2, [r7, #0] + 8002338: 4413 add r3, r2 + 800233a: 4619 mov r1, r3 + 800233c: f7ff ff61 bl 8002202 <_ZN13geometry_msgs7Vector311deserializeEPh> + 8002340: 4602 mov r2, r0 + 8002342: 68fb ldr r3, [r7, #12] + 8002344: 4413 add r3, r2 + 8002346: 60fb str r3, [r7, #12] + offset += this->angular.deserialize(inbuffer + offset); + 8002348: 687b ldr r3, [r7, #4] + 800234a: f103 0014 add.w r0, r3, #20 + 800234e: 68fb ldr r3, [r7, #12] + 8002350: 683a ldr r2, [r7, #0] + 8002352: 4413 add r3, r2 + 8002354: 4619 mov r1, r3 + 8002356: f7ff ff54 bl 8002202 <_ZN13geometry_msgs7Vector311deserializeEPh> + 800235a: 4602 mov r2, r0 + 800235c: 68fb ldr r3, [r7, #12] + 800235e: 4413 add r3, r2 + 8002360: 60fb str r3, [r7, #12] + return offset; + 8002362: 68fb ldr r3, [r7, #12] } - } - return sysclockfreq; - 8001ae0: 68bb ldr r3, [r7, #8] -} - 8001ae2: 4618 mov r0, r3 - 8001ae4: 3714 adds r7, #20 - 8001ae6: 46bd mov sp, r7 - 8001ae8: bdf0 pop {r4, r5, r6, r7, pc} - 8001aea: bf00 nop - 8001aec: 40023800 .word 0x40023800 - 8001af0: 00f42400 .word 0x00f42400 - 8001af4: 017d7840 .word 0x017d7840 - -08001af8 : - * right HCLK value. Otherwise, any configuration based on this function will be incorrect. - * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency. - * @retval HCLK frequency - */ -uint32_t HAL_RCC_GetHCLKFreq(void) -{ - 8001af8: b480 push {r7} - 8001afa: af00 add r7, sp, #0 - return SystemCoreClock; - 8001afc: 4b03 ldr r3, [pc, #12] ; (8001b0c ) - 8001afe: 681b ldr r3, [r3, #0] -} - 8001b00: 4618 mov r0, r3 - 8001b02: 46bd mov sp, r7 - 8001b04: f85d 7b04 ldr.w r7, [sp], #4 - 8001b08: 4770 bx lr - 8001b0a: bf00 nop - 8001b0c: 20000018 .word 0x20000018 - -08001b10 : - * @note Each time PCLK1 changes, this function must be called to update the - * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect. - * @retval PCLK1 frequency - */ -uint32_t HAL_RCC_GetPCLK1Freq(void) -{ - 8001b10: b580 push {r7, lr} - 8001b12: af00 add r7, sp, #0 - /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ - return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1)>> RCC_CFGR_PPRE1_Pos]); - 8001b14: f7ff fff0 bl 8001af8 - 8001b18: 4601 mov r1, r0 - 8001b1a: 4b05 ldr r3, [pc, #20] ; (8001b30 ) - 8001b1c: 689b ldr r3, [r3, #8] - 8001b1e: 0a9b lsrs r3, r3, #10 - 8001b20: f003 0307 and.w r3, r3, #7 - 8001b24: 4a03 ldr r2, [pc, #12] ; (8001b34 ) - 8001b26: 5cd3 ldrb r3, [r2, r3] - 8001b28: fa21 f303 lsr.w r3, r1, r3 -} - 8001b2c: 4618 mov r0, r3 - 8001b2e: bd80 pop {r7, pc} - 8001b30: 40023800 .word 0x40023800 - 8001b34: 0800a5d8 .word 0x0800a5d8 - -08001b38 : - * @note Each time PCLK2 changes, this function must be called to update the - * right PCLK2 value. Otherwise, any configuration based on this function will be incorrect. - * @retval PCLK2 frequency - */ -uint32_t HAL_RCC_GetPCLK2Freq(void) -{ - 8001b38: b580 push {r7, lr} - 8001b3a: af00 add r7, sp, #0 - /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/ - return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2)>> RCC_CFGR_PPRE2_Pos]); - 8001b3c: f7ff ffdc bl 8001af8 - 8001b40: 4601 mov r1, r0 - 8001b42: 4b05 ldr r3, [pc, #20] ; (8001b58 ) - 8001b44: 689b ldr r3, [r3, #8] - 8001b46: 0b5b lsrs r3, r3, #13 - 8001b48: f003 0307 and.w r3, r3, #7 - 8001b4c: 4a03 ldr r2, [pc, #12] ; (8001b5c ) - 8001b4e: 5cd3 ldrb r3, [r2, r3] - 8001b50: fa21 f303 lsr.w r3, r1, r3 -} - 8001b54: 4618 mov r0, r3 - 8001b56: bd80 pop {r7, pc} - 8001b58: 40023800 .word 0x40023800 - 8001b5c: 0800a5d8 .word 0x0800a5d8 + 8002364: 4618 mov r0, r3 + 8002366: 3710 adds r7, #16 + 8002368: 46bd mov sp, r7 + 800236a: bd80 pop {r7, pc} -08001b60 : - * the backup registers) are set to their reset values. - * - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) -{ - 8001b60: b580 push {r7, lr} - 8001b62: b088 sub sp, #32 - 8001b64: af00 add r7, sp, #0 - 8001b66: 6078 str r0, [r7, #4] - uint32_t tickstart = 0; - 8001b68: 2300 movs r3, #0 - 8001b6a: 617b str r3, [r7, #20] - uint32_t tmpreg0 = 0; - 8001b6c: 2300 movs r3, #0 - 8001b6e: 613b str r3, [r7, #16] - uint32_t tmpreg1 = 0; - 8001b70: 2300 movs r3, #0 - 8001b72: 60fb str r3, [r7, #12] - uint32_t plli2sused = 0; - 8001b74: 2300 movs r3, #0 - 8001b76: 61fb str r3, [r7, #28] - uint32_t pllsaiused = 0; - 8001b78: 2300 movs r3, #0 - 8001b7a: 61bb str r3, [r7, #24] +0800236c <_ZN13geometry_msgs5Twist7getTypeEv>: - /* Check the parameters */ - assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection)); + const char * getType(){ return "geometry_msgs/Twist"; }; + 800236c: b480 push {r7} + 800236e: b083 sub sp, #12 + 8002370: af00 add r7, sp, #0 + 8002372: 6078 str r0, [r7, #4] + 8002374: 4b03 ldr r3, [pc, #12] ; (8002384 <_ZN13geometry_msgs5Twist7getTypeEv+0x18>) + 8002376: 4618 mov r0, r3 + 8002378: 370c adds r7, #12 + 800237a: 46bd mov sp, r7 + 800237c: f85d 7b04 ldr.w r7, [sp], #4 + 8002380: 4770 bx lr + 8002382: bf00 nop + 8002384: 0800a374 .word 0x0800a374 + +08002388 <_ZN13geometry_msgs5Twist6getMD5Ev>: + const char * getMD5(){ return "9f195f881246fdfa2798d1d3eebca84a"; }; + 8002388: b480 push {r7} + 800238a: b083 sub sp, #12 + 800238c: af00 add r7, sp, #0 + 800238e: 6078 str r0, [r7, #4] + 8002390: 4b03 ldr r3, [pc, #12] ; (80023a0 <_ZN13geometry_msgs5Twist6getMD5Ev+0x18>) + 8002392: 4618 mov r0, r3 + 8002394: 370c adds r7, #12 + 8002396: 46bd mov sp, r7 + 8002398: f85d 7b04 ldr.w r7, [sp], #4 + 800239c: 4770 bx lr + 800239e: bf00 nop + 80023a0: 0800a388 .word 0x0800a388 + +080023a4 <_ZN13geometry_msgs19TwistWithCovarianceC1Ev>: + public: + typedef geometry_msgs::Twist _twist_type; + _twist_type twist; + float covariance[36]; - /*----------------------------------- I2S configuration ----------------------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S) == (RCC_PERIPHCLK_I2S)) - 8001b7c: 687b ldr r3, [r7, #4] - 8001b7e: 681b ldr r3, [r3, #0] - 8001b80: f003 0301 and.w r3, r3, #1 - 8001b84: 2b00 cmp r3, #0 - 8001b86: d012 beq.n 8001bae - { - /* Check the parameters */ - assert_param(IS_RCC_I2SCLKSOURCE(PeriphClkInit->I2sClockSelection)); + TwistWithCovariance(): + 80023a4: b580 push {r7, lr} + 80023a6: b082 sub sp, #8 + 80023a8: af00 add r7, sp, #0 + 80023aa: 6078 str r0, [r7, #4] + twist(), + covariance() + 80023ac: 687b ldr r3, [r7, #4] + 80023ae: 4618 mov r0, r3 + 80023b0: f7fe fa4e bl 8000850 <_ZN3ros3MsgC1Ev> + 80023b4: 4a0c ldr r2, [pc, #48] ; (80023e8 <_ZN13geometry_msgs19TwistWithCovarianceC1Ev+0x44>) + 80023b6: 687b ldr r3, [r7, #4] + 80023b8: 601a str r2, [r3, #0] + 80023ba: 687b ldr r3, [r7, #4] + 80023bc: 3304 adds r3, #4 + 80023be: 4618 mov r0, r3 + 80023c0: f7ff ff6e bl 80022a0 <_ZN13geometry_msgs5TwistC1Ev> + 80023c4: 687b ldr r3, [r7, #4] + 80023c6: f103 0228 add.w r2, r3, #40 ; 0x28 + 80023ca: 2323 movs r3, #35 ; 0x23 + 80023cc: 2b00 cmp r3, #0 + 80023ce: db05 blt.n 80023dc <_ZN13geometry_msgs19TwistWithCovarianceC1Ev+0x38> + 80023d0: f04f 0100 mov.w r1, #0 + 80023d4: 6011 str r1, [r2, #0] + 80023d6: 3204 adds r2, #4 + 80023d8: 3b01 subs r3, #1 + 80023da: e7f7 b.n 80023cc <_ZN13geometry_msgs19TwistWithCovarianceC1Ev+0x28> + { + } + 80023dc: 687b ldr r3, [r7, #4] + 80023de: 4618 mov r0, r3 + 80023e0: 3708 adds r7, #8 + 80023e2: 46bd mov sp, r7 + 80023e4: bd80 pop {r7, pc} + 80023e6: bf00 nop + 80023e8: 0800a4cc .word 0x0800a4cc - /* Configure I2S Clock source */ - __HAL_RCC_I2S_CONFIG(PeriphClkInit->I2sClockSelection); - 8001b88: 4b69 ldr r3, [pc, #420] ; (8001d30 ) - 8001b8a: 689b ldr r3, [r3, #8] - 8001b8c: 4a68 ldr r2, [pc, #416] ; (8001d30 ) - 8001b8e: f423 0300 bic.w r3, r3, #8388608 ; 0x800000 - 8001b92: 6093 str r3, [r2, #8] - 8001b94: 4b66 ldr r3, [pc, #408] ; (8001d30 ) - 8001b96: 689a ldr r2, [r3, #8] - 8001b98: 687b ldr r3, [r7, #4] - 8001b9a: 6b5b ldr r3, [r3, #52] ; 0x34 - 8001b9c: 4964 ldr r1, [pc, #400] ; (8001d30 ) - 8001b9e: 4313 orrs r3, r2 - 8001ba0: 608b str r3, [r1, #8] +080023ec <_ZNK13geometry_msgs19TwistWithCovariance9serializeEPh>: - /* Enable the PLLI2S when it's used as clock source for I2S */ - if(PeriphClkInit->I2sClockSelection == RCC_I2SCLKSOURCE_PLLI2S) - 8001ba2: 687b ldr r3, [r7, #4] - 8001ba4: 6b5b ldr r3, [r3, #52] ; 0x34 - 8001ba6: 2b00 cmp r3, #0 - 8001ba8: d101 bne.n 8001bae + virtual int serialize(unsigned char *outbuffer) const + 80023ec: b580 push {r7, lr} + 80023ee: b084 sub sp, #16 + 80023f0: af00 add r7, sp, #0 + 80023f2: 6078 str r0, [r7, #4] + 80023f4: 6039 str r1, [r7, #0] { - plli2sused = 1; - 8001baa: 2301 movs r3, #1 - 8001bac: 61fb str r3, [r7, #28] + int offset = 0; + 80023f6: 2300 movs r3, #0 + 80023f8: 60fb str r3, [r7, #12] + offset += this->twist.serialize(outbuffer + offset); + 80023fa: 687b ldr r3, [r7, #4] + 80023fc: 1d18 adds r0, r3, #4 + 80023fe: 68fb ldr r3, [r7, #12] + 8002400: 683a ldr r2, [r7, #0] + 8002402: 4413 add r3, r2 + 8002404: 4619 mov r1, r3 + 8002406: f7ff ff67 bl 80022d8 <_ZNK13geometry_msgs5Twist9serializeEPh> + 800240a: 4602 mov r2, r0 + 800240c: 68fb ldr r3, [r7, #12] + 800240e: 4413 add r3, r2 + 8002410: 60fb str r3, [r7, #12] + for( uint32_t i = 0; i < 36; i++){ + 8002412: 2300 movs r3, #0 + 8002414: 60bb str r3, [r7, #8] + 8002416: 68bb ldr r3, [r7, #8] + 8002418: 2b23 cmp r3, #35 ; 0x23 + 800241a: d816 bhi.n 800244a <_ZNK13geometry_msgs19TwistWithCovariance9serializeEPh+0x5e> + offset += serializeAvrFloat64(outbuffer + offset, this->covariance[i]); + 800241c: 68fb ldr r3, [r7, #12] + 800241e: 683a ldr r2, [r7, #0] + 8002420: 18d1 adds r1, r2, r3 + 8002422: 687a ldr r2, [r7, #4] + 8002424: 68bb ldr r3, [r7, #8] + 8002426: 330a adds r3, #10 + 8002428: 009b lsls r3, r3, #2 + 800242a: 4413 add r3, r2 + 800242c: edd3 7a00 vldr s15, [r3] + 8002430: eeb0 0a67 vmov.f32 s0, s15 + 8002434: 4608 mov r0, r1 + 8002436: f7fe f93f bl 80006b8 <_ZN3ros3Msg19serializeAvrFloat64EPhf> + 800243a: 4602 mov r2, r0 + 800243c: 68fb ldr r3, [r7, #12] + 800243e: 4413 add r3, r2 + 8002440: 60fb str r3, [r7, #12] + for( uint32_t i = 0; i < 36; i++){ + 8002442: 68bb ldr r3, [r7, #8] + 8002444: 3301 adds r3, #1 + 8002446: 60bb str r3, [r7, #8] + 8002448: e7e5 b.n 8002416 <_ZNK13geometry_msgs19TwistWithCovariance9serializeEPh+0x2a> + } + return offset; + 800244a: 68fb ldr r3, [r7, #12] } - } + 800244c: 4618 mov r0, r3 + 800244e: 3710 adds r7, #16 + 8002450: 46bd mov sp, r7 + 8002452: bd80 pop {r7, pc} - /*------------------------------------ SAI1 configuration --------------------------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == (RCC_PERIPHCLK_SAI1)) - 8001bae: 687b ldr r3, [r7, #4] - 8001bb0: 681b ldr r3, [r3, #0] - 8001bb2: f403 2300 and.w r3, r3, #524288 ; 0x80000 - 8001bb6: 2b00 cmp r3, #0 - 8001bb8: d017 beq.n 8001bea - { - /* Check the parameters */ - assert_param(IS_RCC_SAI1CLKSOURCE(PeriphClkInit->Sai1ClockSelection)); +08002454 <_ZN13geometry_msgs19TwistWithCovariance11deserializeEPh>: - /* Configure SAI1 Clock source */ - __HAL_RCC_SAI1_CONFIG(PeriphClkInit->Sai1ClockSelection); - 8001bba: 4b5d ldr r3, [pc, #372] ; (8001d30 ) - 8001bbc: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c - 8001bc0: f423 1240 bic.w r2, r3, #3145728 ; 0x300000 - 8001bc4: 687b ldr r3, [r7, #4] - 8001bc6: 6bdb ldr r3, [r3, #60] ; 0x3c - 8001bc8: 4959 ldr r1, [pc, #356] ; (8001d30 ) - 8001bca: 4313 orrs r3, r2 - 8001bcc: f8c1 308c str.w r3, [r1, #140] ; 0x8c - /* Enable the PLLI2S when it's used as clock source for SAI */ - if(PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLI2S) - 8001bd0: 687b ldr r3, [r7, #4] - 8001bd2: 6bdb ldr r3, [r3, #60] ; 0x3c - 8001bd4: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000 - 8001bd8: d101 bne.n 8001bde + virtual int deserialize(unsigned char *inbuffer) + 8002454: b580 push {r7, lr} + 8002456: b084 sub sp, #16 + 8002458: af00 add r7, sp, #0 + 800245a: 6078 str r0, [r7, #4] + 800245c: 6039 str r1, [r7, #0] { - plli2sused = 1; - 8001bda: 2301 movs r3, #1 - 8001bdc: 61fb str r3, [r7, #28] + int offset = 0; + 800245e: 2300 movs r3, #0 + 8002460: 60fb str r3, [r7, #12] + offset += this->twist.deserialize(inbuffer + offset); + 8002462: 687b ldr r3, [r7, #4] + 8002464: 1d18 adds r0, r3, #4 + 8002466: 68fb ldr r3, [r7, #12] + 8002468: 683a ldr r2, [r7, #0] + 800246a: 4413 add r3, r2 + 800246c: 4619 mov r1, r3 + 800246e: f7ff ff58 bl 8002322 <_ZN13geometry_msgs5Twist11deserializeEPh> + 8002472: 4602 mov r2, r0 + 8002474: 68fb ldr r3, [r7, #12] + 8002476: 4413 add r3, r2 + 8002478: 60fb str r3, [r7, #12] + for( uint32_t i = 0; i < 36; i++){ + 800247a: 2300 movs r3, #0 + 800247c: 60bb str r3, [r7, #8] + 800247e: 68bb ldr r3, [r7, #8] + 8002480: 2b23 cmp r3, #35 ; 0x23 + 8002482: d812 bhi.n 80024aa <_ZN13geometry_msgs19TwistWithCovariance11deserializeEPh+0x56> + offset += deserializeAvrFloat64(inbuffer + offset, &(this->covariance[i])); + 8002484: 68fb ldr r3, [r7, #12] + 8002486: 683a ldr r2, [r7, #0] + 8002488: 18d0 adds r0, r2, r3 + 800248a: 68bb ldr r3, [r7, #8] + 800248c: 330a adds r3, #10 + 800248e: 009b lsls r3, r3, #2 + 8002490: 687a ldr r2, [r7, #4] + 8002492: 4413 add r3, r2 + 8002494: 4619 mov r1, r3 + 8002496: f7fe f97b bl 8000790 <_ZN3ros3Msg21deserializeAvrFloat64EPKhPf> + 800249a: 4602 mov r2, r0 + 800249c: 68fb ldr r3, [r7, #12] + 800249e: 4413 add r3, r2 + 80024a0: 60fb str r3, [r7, #12] + for( uint32_t i = 0; i < 36; i++){ + 80024a2: 68bb ldr r3, [r7, #8] + 80024a4: 3301 adds r3, #1 + 80024a6: 60bb str r3, [r7, #8] + 80024a8: e7e9 b.n 800247e <_ZN13geometry_msgs19TwistWithCovariance11deserializeEPh+0x2a> + } + return offset; + 80024aa: 68fb ldr r3, [r7, #12] } - /* Enable the PLLSAI when it's used as clock source for SAI */ - if(PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLSAI) - 8001bde: 687b ldr r3, [r7, #4] - 8001be0: 6bdb ldr r3, [r3, #60] ; 0x3c - 8001be2: 2b00 cmp r3, #0 - 8001be4: d101 bne.n 8001bea + 80024ac: 4618 mov r0, r3 + 80024ae: 3710 adds r7, #16 + 80024b0: 46bd mov sp, r7 + 80024b2: bd80 pop {r7, pc} + +080024b4 <_ZN13geometry_msgs19TwistWithCovariance7getTypeEv>: + + const char * getType(){ return "geometry_msgs/TwistWithCovariance"; }; + 80024b4: b480 push {r7} + 80024b6: b083 sub sp, #12 + 80024b8: af00 add r7, sp, #0 + 80024ba: 6078 str r0, [r7, #4] + 80024bc: 4b03 ldr r3, [pc, #12] ; (80024cc <_ZN13geometry_msgs19TwistWithCovariance7getTypeEv+0x18>) + 80024be: 4618 mov r0, r3 + 80024c0: 370c adds r7, #12 + 80024c2: 46bd mov sp, r7 + 80024c4: f85d 7b04 ldr.w r7, [sp], #4 + 80024c8: 4770 bx lr + 80024ca: bf00 nop + 80024cc: 0800a3ac .word 0x0800a3ac + +080024d0 <_ZN13geometry_msgs19TwistWithCovariance6getMD5Ev>: + const char * getMD5(){ return "1fe8a28e6890a4cc3ae4c3ca5c7d82e6"; }; + 80024d0: b480 push {r7} + 80024d2: b083 sub sp, #12 + 80024d4: af00 add r7, sp, #0 + 80024d6: 6078 str r0, [r7, #4] + 80024d8: 4b03 ldr r3, [pc, #12] ; (80024e8 <_ZN13geometry_msgs19TwistWithCovariance6getMD5Ev+0x18>) + 80024da: 4618 mov r0, r3 + 80024dc: 370c adds r7, #12 + 80024de: 46bd mov sp, r7 + 80024e0: f85d 7b04 ldr.w r7, [sp], #4 + 80024e4: 4770 bx lr + 80024e6: bf00 nop + 80024e8: 0800a3d0 .word 0x0800a3d0 + +080024ec <_ZN8nav_msgs8OdometryC1Ev>: + typedef geometry_msgs::PoseWithCovariance _pose_type; + _pose_type pose; + typedef geometry_msgs::TwistWithCovariance _twist_type; + _twist_type twist; + + Odometry(): + 80024ec: b580 push {r7, lr} + 80024ee: b082 sub sp, #8 + 80024f0: af00 add r7, sp, #0 + 80024f2: 6078 str r0, [r7, #4] + header(), + child_frame_id(""), + pose(), + twist() + 80024f4: 687b ldr r3, [r7, #4] + 80024f6: 4618 mov r0, r3 + 80024f8: f7fe f9aa bl 8000850 <_ZN3ros3MsgC1Ev> + 80024fc: 4a0c ldr r2, [pc, #48] ; (8002530 <_ZN8nav_msgs8OdometryC1Ev+0x44>) + 80024fe: 687b ldr r3, [r7, #4] + 8002500: 601a str r2, [r3, #0] + 8002502: 687b ldr r3, [r7, #4] + 8002504: 3304 adds r3, #4 + 8002506: 4618 mov r0, r3 + 8002508: f7ff f9fc bl 8001904 <_ZN8std_msgs6HeaderC1Ev> + 800250c: 687b ldr r3, [r7, #4] + 800250e: 4a09 ldr r2, [pc, #36] ; (8002534 <_ZN8nav_msgs8OdometryC1Ev+0x48>) + 8002510: 619a str r2, [r3, #24] + 8002512: 687b ldr r3, [r7, #4] + 8002514: 331c adds r3, #28 + 8002516: 4618 mov r0, r3 + 8002518: f7ff fd76 bl 8002008 <_ZN13geometry_msgs18PoseWithCovarianceC1Ev> + 800251c: 687b ldr r3, [r7, #4] + 800251e: 33d8 adds r3, #216 ; 0xd8 + 8002520: 4618 mov r0, r3 + 8002522: f7ff ff3f bl 80023a4 <_ZN13geometry_msgs19TwistWithCovarianceC1Ev> { - pllsaiused = 1; - 8001be6: 2301 movs r3, #1 - 8001be8: 61bb str r3, [r7, #24] } - } + 8002526: 687b ldr r3, [r7, #4] + 8002528: 4618 mov r0, r3 + 800252a: 3708 adds r7, #8 + 800252c: 46bd mov sp, r7 + 800252e: bd80 pop {r7, pc} + 8002530: 0800a4b4 .word 0x0800a4b4 + 8002534: 0800a128 .word 0x0800a128 - /*------------------------------------ SAI2 configuration --------------------------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == (RCC_PERIPHCLK_SAI2)) - 8001bea: 687b ldr r3, [r7, #4] - 8001bec: 681b ldr r3, [r3, #0] - 8001bee: f403 1380 and.w r3, r3, #1048576 ; 0x100000 - 8001bf2: 2b00 cmp r3, #0 - 8001bf4: d017 beq.n 8001c26 - { - /* Check the parameters */ - assert_param(IS_RCC_SAI2CLKSOURCE(PeriphClkInit->Sai2ClockSelection)); - - /* Configure SAI2 Clock source */ - __HAL_RCC_SAI2_CONFIG(PeriphClkInit->Sai2ClockSelection); - 8001bf6: 4b4e ldr r3, [pc, #312] ; (8001d30 ) - 8001bf8: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c - 8001bfc: f423 0240 bic.w r2, r3, #12582912 ; 0xc00000 - 8001c00: 687b ldr r3, [r7, #4] - 8001c02: 6c1b ldr r3, [r3, #64] ; 0x40 - 8001c04: 494a ldr r1, [pc, #296] ; (8001d30 ) - 8001c06: 4313 orrs r3, r2 - 8001c08: f8c1 308c str.w r3, [r1, #140] ; 0x8c +08002538 <_ZNK8nav_msgs8Odometry9serializeEPh>: - /* Enable the PLLI2S when it's used as clock source for SAI */ - if(PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLI2S) - 8001c0c: 687b ldr r3, [r7, #4] - 8001c0e: 6c1b ldr r3, [r3, #64] ; 0x40 - 8001c10: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000 - 8001c14: d101 bne.n 8001c1a + virtual int serialize(unsigned char *outbuffer) const + 8002538: b580 push {r7, lr} + 800253a: b084 sub sp, #16 + 800253c: af00 add r7, sp, #0 + 800253e: 6078 str r0, [r7, #4] + 8002540: 6039 str r1, [r7, #0] { - plli2sused = 1; - 8001c16: 2301 movs r3, #1 - 8001c18: 61fb str r3, [r7, #28] + int offset = 0; + 8002542: 2300 movs r3, #0 + 8002544: 60fb str r3, [r7, #12] + offset += this->header.serialize(outbuffer + offset); + 8002546: 687b ldr r3, [r7, #4] + 8002548: 1d18 adds r0, r3, #4 + 800254a: 68fb ldr r3, [r7, #12] + 800254c: 683a ldr r2, [r7, #0] + 800254e: 4413 add r3, r2 + 8002550: 4619 mov r1, r3 + 8002552: f7ff f9f7 bl 8001944 <_ZNK8std_msgs6Header9serializeEPh> + 8002556: 4602 mov r2, r0 + 8002558: 68fb ldr r3, [r7, #12] + 800255a: 4413 add r3, r2 + 800255c: 60fb str r3, [r7, #12] + uint32_t length_child_frame_id = strlen(this->child_frame_id); + 800255e: 687b ldr r3, [r7, #4] + 8002560: 699b ldr r3, [r3, #24] + 8002562: 4618 mov r0, r3 + 8002564: f7fd fe68 bl 8000238 + 8002568: 60b8 str r0, [r7, #8] + varToArr(outbuffer + offset, length_child_frame_id); + 800256a: 68fb ldr r3, [r7, #12] + 800256c: 683a ldr r2, [r7, #0] + 800256e: 4413 add r3, r2 + 8002570: 68b9 ldr r1, [r7, #8] + 8002572: 4618 mov r0, r3 + 8002574: f000 fe97 bl 80032a6 <_ZN3ros3Msg8varToArrIPhmEEvT_T0_> + offset += 4; + 8002578: 68fb ldr r3, [r7, #12] + 800257a: 3304 adds r3, #4 + 800257c: 60fb str r3, [r7, #12] + memcpy(outbuffer + offset, this->child_frame_id, length_child_frame_id); + 800257e: 68fb ldr r3, [r7, #12] + 8002580: 683a ldr r2, [r7, #0] + 8002582: 18d0 adds r0, r2, r3 + 8002584: 687b ldr r3, [r7, #4] + 8002586: 699b ldr r3, [r3, #24] + 8002588: 68ba ldr r2, [r7, #8] + 800258a: 4619 mov r1, r3 + 800258c: f007 fc78 bl 8009e80 + offset += length_child_frame_id; + 8002590: 68fa ldr r2, [r7, #12] + 8002592: 68bb ldr r3, [r7, #8] + 8002594: 4413 add r3, r2 + 8002596: 60fb str r3, [r7, #12] + offset += this->pose.serialize(outbuffer + offset); + 8002598: 687b ldr r3, [r7, #4] + 800259a: f103 001c add.w r0, r3, #28 + 800259e: 68fb ldr r3, [r7, #12] + 80025a0: 683a ldr r2, [r7, #0] + 80025a2: 4413 add r3, r2 + 80025a4: 4619 mov r1, r3 + 80025a6: f7ff fd53 bl 8002050 <_ZNK13geometry_msgs18PoseWithCovariance9serializeEPh> + 80025aa: 4602 mov r2, r0 + 80025ac: 68fb ldr r3, [r7, #12] + 80025ae: 4413 add r3, r2 + 80025b0: 60fb str r3, [r7, #12] + offset += this->twist.serialize(outbuffer + offset); + 80025b2: 687b ldr r3, [r7, #4] + 80025b4: f103 00d8 add.w r0, r3, #216 ; 0xd8 + 80025b8: 68fb ldr r3, [r7, #12] + 80025ba: 683a ldr r2, [r7, #0] + 80025bc: 4413 add r3, r2 + 80025be: 4619 mov r1, r3 + 80025c0: f7ff ff14 bl 80023ec <_ZNK13geometry_msgs19TwistWithCovariance9serializeEPh> + 80025c4: 4602 mov r2, r0 + 80025c6: 68fb ldr r3, [r7, #12] + 80025c8: 4413 add r3, r2 + 80025ca: 60fb str r3, [r7, #12] + return offset; + 80025cc: 68fb ldr r3, [r7, #12] } - /* Enable the PLLSAI when it's used as clock source for SAI */ - if(PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLSAI) - 8001c1a: 687b ldr r3, [r7, #4] - 8001c1c: 6c1b ldr r3, [r3, #64] ; 0x40 - 8001c1e: 2b00 cmp r3, #0 - 8001c20: d101 bne.n 8001c26 + 80025ce: 4618 mov r0, r3 + 80025d0: 3710 adds r7, #16 + 80025d2: 46bd mov sp, r7 + 80025d4: bd80 pop {r7, pc} + +080025d6 <_ZN8nav_msgs8Odometry11deserializeEPh>: + + virtual int deserialize(unsigned char *inbuffer) + 80025d6: b580 push {r7, lr} + 80025d8: b086 sub sp, #24 + 80025da: af00 add r7, sp, #0 + 80025dc: 6078 str r0, [r7, #4] + 80025de: 6039 str r1, [r7, #0] { - pllsaiused = 1; - 8001c22: 2301 movs r3, #1 - 8001c24: 61bb str r3, [r7, #24] + int offset = 0; + 80025e0: 2300 movs r3, #0 + 80025e2: 613b str r3, [r7, #16] + offset += this->header.deserialize(inbuffer + offset); + 80025e4: 687b ldr r3, [r7, #4] + 80025e6: 1d18 adds r0, r3, #4 + 80025e8: 693b ldr r3, [r7, #16] + 80025ea: 683a ldr r2, [r7, #0] + 80025ec: 4413 add r3, r2 + 80025ee: 4619 mov r1, r3 + 80025f0: f7ff fa40 bl 8001a74 <_ZN8std_msgs6Header11deserializeEPh> + 80025f4: 4602 mov r2, r0 + 80025f6: 693b ldr r3, [r7, #16] + 80025f8: 4413 add r3, r2 + 80025fa: 613b str r3, [r7, #16] + uint32_t length_child_frame_id; + arrToVar(length_child_frame_id, (inbuffer + offset)); + 80025fc: 693b ldr r3, [r7, #16] + 80025fe: 683a ldr r2, [r7, #0] + 8002600: 441a add r2, r3 + 8002602: f107 030c add.w r3, r7, #12 + 8002606: 4611 mov r1, r2 + 8002608: 4618 mov r0, r3 + 800260a: f000 fe6a bl 80032e2 <_ZN3ros3Msg8arrToVarImPhEEvRT_T0_> + offset += 4; + 800260e: 693b ldr r3, [r7, #16] + 8002610: 3304 adds r3, #4 + 8002612: 613b str r3, [r7, #16] + for(unsigned int k= offset; k< offset+length_child_frame_id; ++k){ + 8002614: 693b ldr r3, [r7, #16] + 8002616: 617b str r3, [r7, #20] + 8002618: 693a ldr r2, [r7, #16] + 800261a: 68fb ldr r3, [r7, #12] + 800261c: 4413 add r3, r2 + 800261e: 697a ldr r2, [r7, #20] + 8002620: 429a cmp r2, r3 + 8002622: d20c bcs.n 800263e <_ZN8nav_msgs8Odometry11deserializeEPh+0x68> + inbuffer[k-1]=inbuffer[k]; + 8002624: 683a ldr r2, [r7, #0] + 8002626: 697b ldr r3, [r7, #20] + 8002628: 441a add r2, r3 + 800262a: 697b ldr r3, [r7, #20] + 800262c: 3b01 subs r3, #1 + 800262e: 6839 ldr r1, [r7, #0] + 8002630: 440b add r3, r1 + 8002632: 7812 ldrb r2, [r2, #0] + 8002634: 701a strb r2, [r3, #0] + for(unsigned int k= offset; k< offset+length_child_frame_id; ++k){ + 8002636: 697b ldr r3, [r7, #20] + 8002638: 3301 adds r3, #1 + 800263a: 617b str r3, [r7, #20] + 800263c: e7ec b.n 8002618 <_ZN8nav_msgs8Odometry11deserializeEPh+0x42> + } + inbuffer[offset+length_child_frame_id-1]=0; + 800263e: 693a ldr r2, [r7, #16] + 8002640: 68fb ldr r3, [r7, #12] + 8002642: 4413 add r3, r2 + 8002644: 3b01 subs r3, #1 + 8002646: 683a ldr r2, [r7, #0] + 8002648: 4413 add r3, r2 + 800264a: 2200 movs r2, #0 + 800264c: 701a strb r2, [r3, #0] + this->child_frame_id = (char *)(inbuffer + offset-1); + 800264e: 693b ldr r3, [r7, #16] + 8002650: 3b01 subs r3, #1 + 8002652: 683a ldr r2, [r7, #0] + 8002654: 441a add r2, r3 + 8002656: 687b ldr r3, [r7, #4] + 8002658: 619a str r2, [r3, #24] + offset += length_child_frame_id; + 800265a: 693a ldr r2, [r7, #16] + 800265c: 68fb ldr r3, [r7, #12] + 800265e: 4413 add r3, r2 + 8002660: 613b str r3, [r7, #16] + offset += this->pose.deserialize(inbuffer + offset); + 8002662: 687b ldr r3, [r7, #4] + 8002664: f103 001c add.w r0, r3, #28 + 8002668: 693b ldr r3, [r7, #16] + 800266a: 683a ldr r2, [r7, #0] + 800266c: 4413 add r3, r2 + 800266e: 4619 mov r1, r3 + 8002670: f7ff fd23 bl 80020ba <_ZN13geometry_msgs18PoseWithCovariance11deserializeEPh> + 8002674: 4602 mov r2, r0 + 8002676: 693b ldr r3, [r7, #16] + 8002678: 4413 add r3, r2 + 800267a: 613b str r3, [r7, #16] + offset += this->twist.deserialize(inbuffer + offset); + 800267c: 687b ldr r3, [r7, #4] + 800267e: f103 00d8 add.w r0, r3, #216 ; 0xd8 + 8002682: 693b ldr r3, [r7, #16] + 8002684: 683a ldr r2, [r7, #0] + 8002686: 4413 add r3, r2 + 8002688: 4619 mov r1, r3 + 800268a: f7ff fee3 bl 8002454 <_ZN13geometry_msgs19TwistWithCovariance11deserializeEPh> + 800268e: 4602 mov r2, r0 + 8002690: 693b ldr r3, [r7, #16] + 8002692: 4413 add r3, r2 + 8002694: 613b str r3, [r7, #16] + return offset; + 8002696: 693b ldr r3, [r7, #16] } + 8002698: 4618 mov r0, r3 + 800269a: 3718 adds r7, #24 + 800269c: 46bd mov sp, r7 + 800269e: bd80 pop {r7, pc} + +080026a0 <_ZN8nav_msgs8Odometry7getTypeEv>: + + const char * getType(){ return "nav_msgs/Odometry"; }; + 80026a0: b480 push {r7} + 80026a2: b083 sub sp, #12 + 80026a4: af00 add r7, sp, #0 + 80026a6: 6078 str r0, [r7, #4] + 80026a8: 4b03 ldr r3, [pc, #12] ; (80026b8 <_ZN8nav_msgs8Odometry7getTypeEv+0x18>) + 80026aa: 4618 mov r0, r3 + 80026ac: 370c adds r7, #12 + 80026ae: 46bd mov sp, r7 + 80026b0: f85d 7b04 ldr.w r7, [sp], #4 + 80026b4: 4770 bx lr + 80026b6: bf00 nop + 80026b8: 0800a3f4 .word 0x0800a3f4 + +080026bc <_ZN8nav_msgs8Odometry6getMD5Ev>: + const char * getMD5(){ return "cd5e73d190d741a2f92e81eda573aca7"; }; + 80026bc: b480 push {r7} + 80026be: b083 sub sp, #12 + 80026c0: af00 add r7, sp, #0 + 80026c2: 6078 str r0, [r7, #4] + 80026c4: 4b03 ldr r3, [pc, #12] ; (80026d4 <_ZN8nav_msgs8Odometry6getMD5Ev+0x18>) + 80026c6: 4618 mov r0, r3 + 80026c8: 370c adds r7, #12 + 80026ca: 46bd mov sp, r7 + 80026cc: f85d 7b04 ldr.w r7, [sp], #4 + 80026d0: 4770 bx lr + 80026d2: bf00 nop + 80026d4: 0800a408 .word 0x0800a408 + +080026d8 <_ZN12OdometryCalcC1E7EncoderS0_>: + odometry_.twist.twist.linear.x = 0; + + kBaseline = 0.35; //in meters } - /*-------------------------------------- SPDIF-RX Configuration -----------------------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPDIFRX) == RCC_PERIPHCLK_SPDIFRX) - 8001c26: 687b ldr r3, [r7, #4] - 8001c28: 681b ldr r3, [r3, #0] - 8001c2a: f003 7380 and.w r3, r3, #16777216 ; 0x1000000 - 8001c2e: 2b00 cmp r3, #0 - 8001c30: d001 beq.n 8001c36 - { - plli2sused = 1; - 8001c32: 2301 movs r3, #1 - 8001c34: 61fb str r3, [r7, #28] + OdometryCalc(Encoder left, Encoder right){ + 80026d8: b084 sub sp, #16 + 80026da: b5b0 push {r4, r5, r7, lr} + 80026dc: b090 sub sp, #64 ; 0x40 + 80026de: af00 add r7, sp, #0 + 80026e0: 6078 str r0, [r7, #4] + 80026e2: f107 0054 add.w r0, r7, #84 ; 0x54 + 80026e6: e880 000e stmia.w r0, {r1, r2, r3} + 80026ea: 687b ldr r3, [r7, #4] + 80026ec: 4618 mov r0, r3 + 80026ee: f7ff f8eb bl 80018c8 <_ZN7EncoderC1Ev> + 80026f2: 687b ldr r3, [r7, #4] + 80026f4: 331c adds r3, #28 + 80026f6: 4618 mov r0, r3 + 80026f8: f7ff f8e6 bl 80018c8 <_ZN7EncoderC1Ev> + 80026fc: 687b ldr r3, [r7, #4] + 80026fe: 333c adds r3, #60 ; 0x3c + 8002700: 4618 mov r0, r3 + 8002702: f7ff fef3 bl 80024ec <_ZN8nav_msgs8OdometryC1Ev> + Encoder left_encoder_ = left; + 8002706: f107 0424 add.w r4, r7, #36 ; 0x24 + 800270a: f107 0554 add.w r5, r7, #84 ; 0x54 + 800270e: cd0f ldmia r5!, {r0, r1, r2, r3} + 8002710: c40f stmia r4!, {r0, r1, r2, r3} + 8002712: e895 0007 ldmia.w r5, {r0, r1, r2} + 8002716: e884 0007 stmia.w r4, {r0, r1, r2} + Encoder right_encoder_ = right; + 800271a: f107 0408 add.w r4, r7, #8 + 800271e: f107 0570 add.w r5, r7, #112 ; 0x70 + 8002722: cd0f ldmia r5!, {r0, r1, r2, r3} + 8002724: c40f stmia r4!, {r0, r1, r2, r3} + 8002726: e895 0007 ldmia.w r5, {r0, r1, r2} + 800272a: e884 0007 stmia.w r4, {r0, r1, r2} } + 800272e: 687b ldr r3, [r7, #4] + 8002730: 4618 mov r0, r3 + 8002732: 3740 adds r7, #64 ; 0x40 + 8002734: 46bd mov sp, r7 + 8002736: e8bd 40b0 ldmia.w sp!, {r4, r5, r7, lr} + 800273a: b004 add sp, #16 + 800273c: 4770 bx lr + +0800273e <_ZN3ros3MsgaSERKS0_>: + 800273e: b480 push {r7} + 8002740: b083 sub sp, #12 + 8002742: af00 add r7, sp, #0 + 8002744: 6078 str r0, [r7, #4] + 8002746: 6039 str r1, [r7, #0] + 8002748: 687b ldr r3, [r7, #4] + 800274a: 4618 mov r0, r3 + 800274c: 370c adds r7, #12 + 800274e: 46bd mov sp, r7 + 8002750: f85d 7b04 ldr.w r7, [sp], #4 + 8002754: 4770 bx lr + +08002756 <_ZN8std_msgs6HeaderaSERKS0_>: + class Header : public ros::Msg + 8002756: b580 push {r7, lr} + 8002758: b082 sub sp, #8 + 800275a: af00 add r7, sp, #0 + 800275c: 6078 str r0, [r7, #4] + 800275e: 6039 str r1, [r7, #0] + 8002760: 687b ldr r3, [r7, #4] + 8002762: 683a ldr r2, [r7, #0] + 8002764: 4611 mov r1, r2 + 8002766: 4618 mov r0, r3 + 8002768: f7ff ffe9 bl 800273e <_ZN3ros3MsgaSERKS0_> + 800276c: 683b ldr r3, [r7, #0] + 800276e: 685a ldr r2, [r3, #4] + 8002770: 687b ldr r3, [r7, #4] + 8002772: 605a str r2, [r3, #4] + 8002774: 687b ldr r3, [r7, #4] + 8002776: 683a ldr r2, [r7, #0] + 8002778: 3308 adds r3, #8 + 800277a: 3208 adds r2, #8 + 800277c: e892 0003 ldmia.w r2, {r0, r1} + 8002780: e883 0003 stmia.w r3, {r0, r1} + 8002784: 683b ldr r3, [r7, #0] + 8002786: 691a ldr r2, [r3, #16] + 8002788: 687b ldr r3, [r7, #4] + 800278a: 611a str r2, [r3, #16] + 800278c: 687b ldr r3, [r7, #4] + 800278e: 4618 mov r0, r3 + 8002790: 3708 adds r7, #8 + 8002792: 46bd mov sp, r7 + 8002794: bd80 pop {r7, pc} + +08002796 <_ZN13geometry_msgs5PointaSERKS0_>: + class Point : public ros::Msg + 8002796: b580 push {r7, lr} + 8002798: b082 sub sp, #8 + 800279a: af00 add r7, sp, #0 + 800279c: 6078 str r0, [r7, #4] + 800279e: 6039 str r1, [r7, #0] + 80027a0: 687b ldr r3, [r7, #4] + 80027a2: 683a ldr r2, [r7, #0] + 80027a4: 4611 mov r1, r2 + 80027a6: 4618 mov r0, r3 + 80027a8: f7ff ffc9 bl 800273e <_ZN3ros3MsgaSERKS0_> + 80027ac: 683b ldr r3, [r7, #0] + 80027ae: 685a ldr r2, [r3, #4] + 80027b0: 687b ldr r3, [r7, #4] + 80027b2: 605a str r2, [r3, #4] + 80027b4: 683b ldr r3, [r7, #0] + 80027b6: 689a ldr r2, [r3, #8] + 80027b8: 687b ldr r3, [r7, #4] + 80027ba: 609a str r2, [r3, #8] + 80027bc: 683b ldr r3, [r7, #0] + 80027be: 68da ldr r2, [r3, #12] + 80027c0: 687b ldr r3, [r7, #4] + 80027c2: 60da str r2, [r3, #12] + 80027c4: 687b ldr r3, [r7, #4] + 80027c6: 4618 mov r0, r3 + 80027c8: 3708 adds r7, #8 + 80027ca: 46bd mov sp, r7 + 80027cc: bd80 pop {r7, pc} + +080027ce <_ZN13geometry_msgs10QuaternionaSERKS0_>: + class Quaternion : public ros::Msg + 80027ce: b580 push {r7, lr} + 80027d0: b082 sub sp, #8 + 80027d2: af00 add r7, sp, #0 + 80027d4: 6078 str r0, [r7, #4] + 80027d6: 6039 str r1, [r7, #0] + 80027d8: 687b ldr r3, [r7, #4] + 80027da: 683a ldr r2, [r7, #0] + 80027dc: 4611 mov r1, r2 + 80027de: 4618 mov r0, r3 + 80027e0: f7ff ffad bl 800273e <_ZN3ros3MsgaSERKS0_> + 80027e4: 683b ldr r3, [r7, #0] + 80027e6: 685a ldr r2, [r3, #4] + 80027e8: 687b ldr r3, [r7, #4] + 80027ea: 605a str r2, [r3, #4] + 80027ec: 683b ldr r3, [r7, #0] + 80027ee: 689a ldr r2, [r3, #8] + 80027f0: 687b ldr r3, [r7, #4] + 80027f2: 609a str r2, [r3, #8] + 80027f4: 683b ldr r3, [r7, #0] + 80027f6: 68da ldr r2, [r3, #12] + 80027f8: 687b ldr r3, [r7, #4] + 80027fa: 60da str r2, [r3, #12] + 80027fc: 683b ldr r3, [r7, #0] + 80027fe: 691a ldr r2, [r3, #16] + 8002800: 687b ldr r3, [r7, #4] + 8002802: 611a str r2, [r3, #16] + 8002804: 687b ldr r3, [r7, #4] + 8002806: 4618 mov r0, r3 + 8002808: 3708 adds r7, #8 + 800280a: 46bd mov sp, r7 + 800280c: bd80 pop {r7, pc} + +0800280e <_ZN13geometry_msgs4PoseaSERKS0_>: + class Pose : public ros::Msg + 800280e: b580 push {r7, lr} + 8002810: b082 sub sp, #8 + 8002812: af00 add r7, sp, #0 + 8002814: 6078 str r0, [r7, #4] + 8002816: 6039 str r1, [r7, #0] + 8002818: 687b ldr r3, [r7, #4] + 800281a: 683a ldr r2, [r7, #0] + 800281c: 4611 mov r1, r2 + 800281e: 4618 mov r0, r3 + 8002820: f7ff ff8d bl 800273e <_ZN3ros3MsgaSERKS0_> + 8002824: 687b ldr r3, [r7, #4] + 8002826: 1d1a adds r2, r3, #4 + 8002828: 683b ldr r3, [r7, #0] + 800282a: 3304 adds r3, #4 + 800282c: 4619 mov r1, r3 + 800282e: 4610 mov r0, r2 + 8002830: f7ff ffb1 bl 8002796 <_ZN13geometry_msgs5PointaSERKS0_> + 8002834: 687b ldr r3, [r7, #4] + 8002836: f103 0214 add.w r2, r3, #20 + 800283a: 683b ldr r3, [r7, #0] + 800283c: 3314 adds r3, #20 + 800283e: 4619 mov r1, r3 + 8002840: 4610 mov r0, r2 + 8002842: f7ff ffc4 bl 80027ce <_ZN13geometry_msgs10QuaternionaSERKS0_> + 8002846: 687b ldr r3, [r7, #4] + 8002848: 4618 mov r0, r3 + 800284a: 3708 adds r7, #8 + 800284c: 46bd mov sp, r7 + 800284e: bd80 pop {r7, pc} + +08002850 <_ZN13geometry_msgs18PoseWithCovarianceaSERKS0_>: + class PoseWithCovariance : public ros::Msg + 8002850: b580 push {r7, lr} + 8002852: b082 sub sp, #8 + 8002854: af00 add r7, sp, #0 + 8002856: 6078 str r0, [r7, #4] + 8002858: 6039 str r1, [r7, #0] + 800285a: 687b ldr r3, [r7, #4] + 800285c: 683a ldr r2, [r7, #0] + 800285e: 4611 mov r1, r2 + 8002860: 4618 mov r0, r3 + 8002862: f7ff ff6c bl 800273e <_ZN3ros3MsgaSERKS0_> + 8002866: 687b ldr r3, [r7, #4] + 8002868: 1d1a adds r2, r3, #4 + 800286a: 683b ldr r3, [r7, #0] + 800286c: 3304 adds r3, #4 + 800286e: 4619 mov r1, r3 + 8002870: 4610 mov r0, r2 + 8002872: f7ff ffcc bl 800280e <_ZN13geometry_msgs4PoseaSERKS0_> + 8002876: 687b ldr r3, [r7, #4] + 8002878: f103 012c add.w r1, r3, #44 ; 0x2c + 800287c: 2223 movs r2, #35 ; 0x23 + 800287e: 683b ldr r3, [r7, #0] + 8002880: 332c adds r3, #44 ; 0x2c + 8002882: 2a00 cmp r2, #0 + 8002884: db05 blt.n 8002892 <_ZN13geometry_msgs18PoseWithCovarianceaSERKS0_+0x42> + 8002886: 6818 ldr r0, [r3, #0] + 8002888: 6008 str r0, [r1, #0] + 800288a: 3104 adds r1, #4 + 800288c: 3304 adds r3, #4 + 800288e: 3a01 subs r2, #1 + 8002890: e7f7 b.n 8002882 <_ZN13geometry_msgs18PoseWithCovarianceaSERKS0_+0x32> + 8002892: 687b ldr r3, [r7, #4] + 8002894: 4618 mov r0, r3 + 8002896: 3708 adds r7, #8 + 8002898: 46bd mov sp, r7 + 800289a: bd80 pop {r7, pc} + +0800289c <_ZN13geometry_msgs7Vector3aSERKS0_>: + class Vector3 : public ros::Msg + 800289c: b580 push {r7, lr} + 800289e: b082 sub sp, #8 + 80028a0: af00 add r7, sp, #0 + 80028a2: 6078 str r0, [r7, #4] + 80028a4: 6039 str r1, [r7, #0] + 80028a6: 687b ldr r3, [r7, #4] + 80028a8: 683a ldr r2, [r7, #0] + 80028aa: 4611 mov r1, r2 + 80028ac: 4618 mov r0, r3 + 80028ae: f7ff ff46 bl 800273e <_ZN3ros3MsgaSERKS0_> + 80028b2: 683b ldr r3, [r7, #0] + 80028b4: 685a ldr r2, [r3, #4] + 80028b6: 687b ldr r3, [r7, #4] + 80028b8: 605a str r2, [r3, #4] + 80028ba: 683b ldr r3, [r7, #0] + 80028bc: 689a ldr r2, [r3, #8] + 80028be: 687b ldr r3, [r7, #4] + 80028c0: 609a str r2, [r3, #8] + 80028c2: 683b ldr r3, [r7, #0] + 80028c4: 68da ldr r2, [r3, #12] + 80028c6: 687b ldr r3, [r7, #4] + 80028c8: 60da str r2, [r3, #12] + 80028ca: 687b ldr r3, [r7, #4] + 80028cc: 4618 mov r0, r3 + 80028ce: 3708 adds r7, #8 + 80028d0: 46bd mov sp, r7 + 80028d2: bd80 pop {r7, pc} + +080028d4 <_ZN13geometry_msgs5TwistaSERKS0_>: + class Twist : public ros::Msg + 80028d4: b580 push {r7, lr} + 80028d6: b082 sub sp, #8 + 80028d8: af00 add r7, sp, #0 + 80028da: 6078 str r0, [r7, #4] + 80028dc: 6039 str r1, [r7, #0] + 80028de: 687b ldr r3, [r7, #4] + 80028e0: 683a ldr r2, [r7, #0] + 80028e2: 4611 mov r1, r2 + 80028e4: 4618 mov r0, r3 + 80028e6: f7ff ff2a bl 800273e <_ZN3ros3MsgaSERKS0_> + 80028ea: 687b ldr r3, [r7, #4] + 80028ec: 1d1a adds r2, r3, #4 + 80028ee: 683b ldr r3, [r7, #0] + 80028f0: 3304 adds r3, #4 + 80028f2: 4619 mov r1, r3 + 80028f4: 4610 mov r0, r2 + 80028f6: f7ff ffd1 bl 800289c <_ZN13geometry_msgs7Vector3aSERKS0_> + 80028fa: 687b ldr r3, [r7, #4] + 80028fc: f103 0214 add.w r2, r3, #20 + 8002900: 683b ldr r3, [r7, #0] + 8002902: 3314 adds r3, #20 + 8002904: 4619 mov r1, r3 + 8002906: 4610 mov r0, r2 + 8002908: f7ff ffc8 bl 800289c <_ZN13geometry_msgs7Vector3aSERKS0_> + 800290c: 687b ldr r3, [r7, #4] + 800290e: 4618 mov r0, r3 + 8002910: 3708 adds r7, #8 + 8002912: 46bd mov sp, r7 + 8002914: bd80 pop {r7, pc} + +08002916 <_ZN13geometry_msgs19TwistWithCovarianceaSERKS0_>: + class TwistWithCovariance : public ros::Msg + 8002916: b580 push {r7, lr} + 8002918: b082 sub sp, #8 + 800291a: af00 add r7, sp, #0 + 800291c: 6078 str r0, [r7, #4] + 800291e: 6039 str r1, [r7, #0] + 8002920: 687b ldr r3, [r7, #4] + 8002922: 683a ldr r2, [r7, #0] + 8002924: 4611 mov r1, r2 + 8002926: 4618 mov r0, r3 + 8002928: f7ff ff09 bl 800273e <_ZN3ros3MsgaSERKS0_> + 800292c: 687b ldr r3, [r7, #4] + 800292e: 1d1a adds r2, r3, #4 + 8002930: 683b ldr r3, [r7, #0] + 8002932: 3304 adds r3, #4 + 8002934: 4619 mov r1, r3 + 8002936: 4610 mov r0, r2 + 8002938: f7ff ffcc bl 80028d4 <_ZN13geometry_msgs5TwistaSERKS0_> + 800293c: 687b ldr r3, [r7, #4] + 800293e: f103 0128 add.w r1, r3, #40 ; 0x28 + 8002942: 2223 movs r2, #35 ; 0x23 + 8002944: 683b ldr r3, [r7, #0] + 8002946: 3328 adds r3, #40 ; 0x28 + 8002948: 2a00 cmp r2, #0 + 800294a: db05 blt.n 8002958 <_ZN13geometry_msgs19TwistWithCovarianceaSERKS0_+0x42> + 800294c: 6818 ldr r0, [r3, #0] + 800294e: 6008 str r0, [r1, #0] + 8002950: 3104 adds r1, #4 + 8002952: 3304 adds r3, #4 + 8002954: 3a01 subs r2, #1 + 8002956: e7f7 b.n 8002948 <_ZN13geometry_msgs19TwistWithCovarianceaSERKS0_+0x32> + 8002958: 687b ldr r3, [r7, #4] + 800295a: 4618 mov r0, r3 + 800295c: 3708 adds r7, #8 + 800295e: 46bd mov sp, r7 + 8002960: bd80 pop {r7, pc} + +08002962 <_ZN8nav_msgs8OdometryaSERKS0_>: + class Odometry : public ros::Msg + 8002962: b580 push {r7, lr} + 8002964: b082 sub sp, #8 + 8002966: af00 add r7, sp, #0 + 8002968: 6078 str r0, [r7, #4] + 800296a: 6039 str r1, [r7, #0] + 800296c: 687b ldr r3, [r7, #4] + 800296e: 683a ldr r2, [r7, #0] + 8002970: 4611 mov r1, r2 + 8002972: 4618 mov r0, r3 + 8002974: f7ff fee3 bl 800273e <_ZN3ros3MsgaSERKS0_> + 8002978: 687b ldr r3, [r7, #4] + 800297a: 1d1a adds r2, r3, #4 + 800297c: 683b ldr r3, [r7, #0] + 800297e: 3304 adds r3, #4 + 8002980: 4619 mov r1, r3 + 8002982: 4610 mov r0, r2 + 8002984: f7ff fee7 bl 8002756 <_ZN8std_msgs6HeaderaSERKS0_> + 8002988: 683b ldr r3, [r7, #0] + 800298a: 699a ldr r2, [r3, #24] + 800298c: 687b ldr r3, [r7, #4] + 800298e: 619a str r2, [r3, #24] + 8002990: 687b ldr r3, [r7, #4] + 8002992: f103 021c add.w r2, r3, #28 + 8002996: 683b ldr r3, [r7, #0] + 8002998: 331c adds r3, #28 + 800299a: 4619 mov r1, r3 + 800299c: 4610 mov r0, r2 + 800299e: f7ff ff57 bl 8002850 <_ZN13geometry_msgs18PoseWithCovarianceaSERKS0_> + 80029a2: 687b ldr r3, [r7, #4] + 80029a4: f103 02d8 add.w r2, r3, #216 ; 0xd8 + 80029a8: 683b ldr r3, [r7, #0] + 80029aa: 33d8 adds r3, #216 ; 0xd8 + 80029ac: 4619 mov r1, r3 + 80029ae: 4610 mov r0, r2 + 80029b0: f7ff ffb1 bl 8002916 <_ZN13geometry_msgs19TwistWithCovarianceaSERKS0_> + 80029b4: 687b ldr r3, [r7, #4] + 80029b6: 4618 mov r0, r3 + 80029b8: 3708 adds r7, #8 + 80029ba: 46bd mov sp, r7 + 80029bc: bd80 pop {r7, pc} + ... - /*------------------------------------ RTC configuration --------------------------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == (RCC_PERIPHCLK_RTC)) - 8001c36: 687b ldr r3, [r7, #4] - 8001c38: 681b ldr r3, [r3, #0] - 8001c3a: f003 0320 and.w r3, r3, #32 - 8001c3e: 2b00 cmp r3, #0 - 8001c40: f000 808b beq.w 8001d5a - { - /* Check for RTC Parameters used to output RTCCLK */ - assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection)); +080029c0
: - /* Enable Power Clock*/ - __HAL_RCC_PWR_CLK_ENABLE(); - 8001c44: 4b3a ldr r3, [pc, #232] ; (8001d30 ) - 8001c46: 6c1b ldr r3, [r3, #64] ; 0x40 - 8001c48: 4a39 ldr r2, [pc, #228] ; (8001d30 ) - 8001c4a: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 - 8001c4e: 6413 str r3, [r2, #64] ; 0x40 - 8001c50: 4b37 ldr r3, [pc, #220] ; (8001d30 ) - 8001c52: 6c1b ldr r3, [r3, #64] ; 0x40 - 8001c54: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 - 8001c58: 60bb str r3, [r7, #8] - 8001c5a: 68bb ldr r3, [r7, #8] +/** + * @brief The application entry point. + * @retval int + */ +int main(void) { + 80029c0: b5b0 push {r4, r5, r7, lr} + 80029c2: af00 add r7, sp, #0 + /* USER CODE END 1 */ + + /* MCU Configuration--------------------------------------------------------*/ + + /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ + HAL_Init(); + 80029c4: f001 ff5b bl 800487e + /* USER CODE BEGIN Init */ + + /* USER CODE END Init */ + + /* Configure the system clock */ + SystemClock_Config(); + 80029c8: f000 f85e bl 8002a88 <_Z18SystemClock_Configv> + /* USER CODE BEGIN SysInit */ + + /* USER CODE END SysInit */ + + /* Initialize all configured peripherals */ + MX_GPIO_Init(); + 80029cc: f000 fb4e bl 800306c <_ZL12MX_GPIO_Initv> + MX_DMA_Init(); + 80029d0: f000 fb0a bl 8002fe8 <_ZL11MX_DMA_Initv> + MX_TIM2_Init(); + 80029d4: f000 f8e4 bl 8002ba0 <_ZL12MX_TIM2_Initv> + MX_TIM3_Init(); + 80029d8: f000 f940 bl 8002c5c <_ZL12MX_TIM3_Initv> + MX_TIM4_Init(); + 80029dc: f000 f99c bl 8002d18 <_ZL12MX_TIM4_Initv> + MX_TIM5_Init(); + 80029e0: f000 fa3a bl 8002e58 <_ZL12MX_TIM5_Initv> + MX_USART3_UART_Init(); + 80029e4: f000 fa98 bl 8002f18 <_ZL19MX_USART3_UART_Initv> + MX_USART6_UART_Init(); + 80029e8: f000 faca bl 8002f80 <_ZL19MX_USART6_UART_Initv> + /* USER CODE BEGIN 2 */ + + nh.initNode(); + 80029ec: 481c ldr r0, [pc, #112] ; (8002a60 ) + 80029ee: f000 fd2d bl 800344c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8initNodeEv> + nh.advertise(chatter); + 80029f2: 491c ldr r1, [pc, #112] ; (8002a64 ) + 80029f4: 481a ldr r0, [pc, #104] ; (8002a60 ) + 80029f6: f000 fd46 bl 8003486 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE9advertiseERNS_9PublisherE> + nh.advertise(odom_pub); + 80029fa: 491b ldr r1, [pc, #108] ; (8002a68 ) + 80029fc: 4818 ldr r0, [pc, #96] ; (8002a60 ) + 80029fe: f000 fd42 bl 8003486 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE9advertiseERNS_9PublisherE> + str_msg.data = hello; + 8002a02: 4b1a ldr r3, [pc, #104] ; (8002a6c ) + 8002a04: 4a1a ldr r2, [pc, #104] ; (8002a70 ) + 8002a06: 605a str r2, [r3, #4] + + left_encoder.Setup(); + 8002a08: 481a ldr r0, [pc, #104] ; (8002a74 ) + 8002a0a: f7fd fde3 bl 80005d4 <_ZN7Encoder5SetupEv> + right_encoder.Setup(); + 8002a0e: 481a ldr r0, [pc, #104] ; (8002a78 ) + 8002a10: f7fd fde0 bl 80005d4 <_ZN7Encoder5SetupEv> + + + odom.right_encoder_ = right_encoder; + 8002a14: 4b19 ldr r3, [pc, #100] ; (8002a7c ) + 8002a16: 4a18 ldr r2, [pc, #96] ; (8002a78 ) + 8002a18: f103 041c add.w r4, r3, #28 + 8002a1c: 4615 mov r5, r2 + 8002a1e: cd0f ldmia r5!, {r0, r1, r2, r3} + 8002a20: c40f stmia r4!, {r0, r1, r2, r3} + 8002a22: e895 0007 ldmia.w r5, {r0, r1, r2} + 8002a26: e884 0007 stmia.w r4, {r0, r1, r2} + odom.left_encoder_ = left_encoder; + 8002a2a: 4a14 ldr r2, [pc, #80] ; (8002a7c ) + 8002a2c: 4b11 ldr r3, [pc, #68] ; (8002a74 ) + 8002a2e: 4614 mov r4, r2 + 8002a30: 461d mov r5, r3 + 8002a32: cd0f ldmia r5!, {r0, r1, r2, r3} + 8002a34: c40f stmia r4!, {r0, r1, r2, r3} + 8002a36: e895 0007 ldmia.w r5, {r0, r1, r2} + 8002a3a: e884 0007 stmia.w r4, {r0, r1, r2} + /* USER CODE END 2 */ + + /* Infinite loop */ + /* USER CODE BEGIN WHILE */ + while (1) { + __HAL_TIM_GET_COUNTER(left_encoder.timer_); + 8002a3e: 4b0d ldr r3, [pc, #52] ; (8002a74 ) + 8002a40: 681b ldr r3, [r3, #0] + 8002a42: 681b ldr r3, [r3, #0] + 8002a44: 6a5b ldr r3, [r3, #36] ; 0x24 + odom.OdometryUpdateMessage(); + 8002a46: 480d ldr r0, [pc, #52] ; (8002a7c ) + 8002a48: f001 fa43 bl 8003ed2 <_ZN12OdometryCalc21OdometryUpdateMessageEv> + odometry = odom.odometry_; + 8002a4c: 490c ldr r1, [pc, #48] ; (8002a80 ) + 8002a4e: 480d ldr r0, [pc, #52] ; (8002a84 ) + 8002a50: f7ff ff87 bl 8002962 <_ZN8nav_msgs8OdometryaSERKS0_> + odom_pub.publish(&odometry); + 8002a54: 490b ldr r1, [pc, #44] ; (8002a84 ) + 8002a56: 4804 ldr r0, [pc, #16] ; (8002a68 ) + 8002a58: f7fe fdf5 bl 8001646 <_ZN3ros9Publisher7publishEPKNS_3MsgE> + __HAL_TIM_GET_COUNTER(left_encoder.timer_); + 8002a5c: e7ef b.n 8002a3e + 8002a5e: bf00 nop + 8002a60: 20000634 .word 0x20000634 + 8002a64: 20000cf8 .word 0x20000cf8 + 8002a68: 20000e9c .word 0x20000e9c + 8002a6c: 20000cf0 .word 0x20000cf0 + 8002a70: 20000000 .word 0x20000000 + 8002a74: 20000424 .word 0x20000424 + 8002a78: 20000440 .word 0x20000440 + 8002a7c: 2000045c .word 0x2000045c + 8002a80: 20000498 .word 0x20000498 + 8002a84: 20000d0c .word 0x20000d0c + +08002a88 <_Z18SystemClock_Configv>: - /* Enable write access to Backup domain */ - PWR->CR1 |= PWR_CR1_DBP; - 8001c5c: 4b35 ldr r3, [pc, #212] ; (8001d34 ) - 8001c5e: 681b ldr r3, [r3, #0] - 8001c60: 4a34 ldr r2, [pc, #208] ; (8001d34 ) - 8001c62: f443 7380 orr.w r3, r3, #256 ; 0x100 - 8001c66: 6013 str r3, [r2, #0] +/** + * @brief System Clock Configuration + * @retval None + */ +void SystemClock_Config(void) { + 8002a88: b580 push {r7, lr} + 8002a8a: b0b8 sub sp, #224 ; 0xe0 + 8002a8c: af00 add r7, sp, #0 + RCC_OscInitTypeDef RCC_OscInitStruct = { 0 }; + 8002a8e: f107 03ac add.w r3, r7, #172 ; 0xac + 8002a92: 2234 movs r2, #52 ; 0x34 + 8002a94: 2100 movs r1, #0 + 8002a96: 4618 mov r0, r3 + 8002a98: f007 f9fd bl 8009e96 + RCC_ClkInitTypeDef RCC_ClkInitStruct = { 0 }; + 8002a9c: f107 0398 add.w r3, r7, #152 ; 0x98 + 8002aa0: 2200 movs r2, #0 + 8002aa2: 601a str r2, [r3, #0] + 8002aa4: 605a str r2, [r3, #4] + 8002aa6: 609a str r2, [r3, #8] + 8002aa8: 60da str r2, [r3, #12] + 8002aaa: 611a str r2, [r3, #16] + RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = { 0 }; + 8002aac: f107 0308 add.w r3, r7, #8 + 8002ab0: 2290 movs r2, #144 ; 0x90 + 8002ab2: 2100 movs r1, #0 + 8002ab4: 4618 mov r0, r3 + 8002ab6: f007 f9ee bl 8009e96 + + /** Configure the main internal regulator output voltage + */ + __HAL_RCC_PWR_CLK_ENABLE(); + 8002aba: 4b37 ldr r3, [pc, #220] ; (8002b98 <_Z18SystemClock_Configv+0x110>) + 8002abc: 6c1b ldr r3, [r3, #64] ; 0x40 + 8002abe: 4a36 ldr r2, [pc, #216] ; (8002b98 <_Z18SystemClock_Configv+0x110>) + 8002ac0: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 + 8002ac4: 6413 str r3, [r2, #64] ; 0x40 + 8002ac6: 4b34 ldr r3, [pc, #208] ; (8002b98 <_Z18SystemClock_Configv+0x110>) + 8002ac8: 6c1b ldr r3, [r3, #64] ; 0x40 + 8002aca: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 + 8002ace: 607b str r3, [r7, #4] + 8002ad0: 687b ldr r3, [r7, #4] + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE3); + 8002ad2: 4b32 ldr r3, [pc, #200] ; (8002b9c <_Z18SystemClock_Configv+0x114>) + 8002ad4: 681b ldr r3, [r3, #0] + 8002ad6: f423 4340 bic.w r3, r3, #49152 ; 0xc000 + 8002ada: 4a30 ldr r2, [pc, #192] ; (8002b9c <_Z18SystemClock_Configv+0x114>) + 8002adc: f443 4380 orr.w r3, r3, #16384 ; 0x4000 + 8002ae0: 6013 str r3, [r2, #0] + 8002ae2: 4b2e ldr r3, [pc, #184] ; (8002b9c <_Z18SystemClock_Configv+0x114>) + 8002ae4: 681b ldr r3, [r3, #0] + 8002ae6: f403 4340 and.w r3, r3, #49152 ; 0xc000 + 8002aea: 603b str r3, [r7, #0] + 8002aec: 683b ldr r3, [r7, #0] + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + 8002aee: 2302 movs r3, #2 + 8002af0: f8c7 30ac str.w r3, [r7, #172] ; 0xac + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + 8002af4: 2301 movs r3, #1 + 8002af6: f8c7 30b8 str.w r3, [r7, #184] ; 0xb8 + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + 8002afa: 2310 movs r3, #16 + 8002afc: f8c7 30bc str.w r3, [r7, #188] ; 0xbc + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; + 8002b00: 2300 movs r3, #0 + 8002b02: f8c7 30c4 str.w r3, [r7, #196] ; 0xc4 + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { + 8002b06: f107 03ac add.w r3, r7, #172 ; 0xac + 8002b0a: 4618 mov r0, r3 + 8002b0c: f002 fd82 bl 8005614 + 8002b10: 4603 mov r3, r0 + 8002b12: 2b00 cmp r3, #0 + 8002b14: bf14 ite ne + 8002b16: 2301 movne r3, #1 + 8002b18: 2300 moveq r3, #0 + 8002b1a: b2db uxtb r3, r3 + 8002b1c: 2b00 cmp r3, #0 + 8002b1e: d001 beq.n 8002b24 <_Z18SystemClock_Configv+0x9c> + Error_Handler(); + 8002b20: f000 fbba bl 8003298 + } + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK + 8002b24: 230f movs r3, #15 + 8002b26: f8c7 3098 str.w r3, [r7, #152] ; 0x98 + | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI; + 8002b2a: 2300 movs r3, #0 + 8002b2c: f8c7 309c str.w r3, [r7, #156] ; 0x9c + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + 8002b30: 2300 movs r3, #0 + 8002b32: f8c7 30a0 str.w r3, [r7, #160] ; 0xa0 + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + 8002b36: 2300 movs r3, #0 + 8002b38: f8c7 30a4 str.w r3, [r7, #164] ; 0xa4 + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + 8002b3c: 2300 movs r3, #0 + 8002b3e: f8c7 30a8 str.w r3, [r7, #168] ; 0xa8 + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) { + 8002b42: f107 0398 add.w r3, r7, #152 ; 0x98 + 8002b46: 2100 movs r1, #0 + 8002b48: 4618 mov r0, r3 + 8002b4a: f002 ffd5 bl 8005af8 + 8002b4e: 4603 mov r3, r0 + 8002b50: 2b00 cmp r3, #0 + 8002b52: bf14 ite ne + 8002b54: 2301 movne r3, #1 + 8002b56: 2300 moveq r3, #0 + 8002b58: b2db uxtb r3, r3 + 8002b5a: 2b00 cmp r3, #0 + 8002b5c: d001 beq.n 8002b62 <_Z18SystemClock_Configv+0xda> + Error_Handler(); + 8002b5e: f000 fb9b bl 8003298 + } + PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART3 + 8002b62: f44f 6310 mov.w r3, #2304 ; 0x900 + 8002b66: 60bb str r3, [r7, #8] + | RCC_PERIPHCLK_USART6; + PeriphClkInitStruct.Usart3ClockSelection = RCC_USART3CLKSOURCE_PCLK1; + 8002b68: 2300 movs r3, #0 + 8002b6a: 657b str r3, [r7, #84] ; 0x54 + PeriphClkInitStruct.Usart6ClockSelection = RCC_USART6CLKSOURCE_PCLK2; + 8002b6c: 2300 movs r3, #0 + 8002b6e: 663b str r3, [r7, #96] ; 0x60 + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) { + 8002b70: f107 0308 add.w r3, r7, #8 + 8002b74: 4618 mov r0, r3 + 8002b76: f003 f98d bl 8005e94 + 8002b7a: 4603 mov r3, r0 + 8002b7c: 2b00 cmp r3, #0 + 8002b7e: bf14 ite ne + 8002b80: 2301 movne r3, #1 + 8002b82: 2300 moveq r3, #0 + 8002b84: b2db uxtb r3, r3 + 8002b86: 2b00 cmp r3, #0 + 8002b88: d001 beq.n 8002b8e <_Z18SystemClock_Configv+0x106> + Error_Handler(); + 8002b8a: f000 fb85 bl 8003298 + } +} + 8002b8e: bf00 nop + 8002b90: 37e0 adds r7, #224 ; 0xe0 + 8002b92: 46bd mov sp, r7 + 8002b94: bd80 pop {r7, pc} + 8002b96: bf00 nop + 8002b98: 40023800 .word 0x40023800 + 8002b9c: 40007000 .word 0x40007000 + +08002ba0 <_ZL12MX_TIM2_Initv>: +/** + * @brief TIM2 Initialization Function + * @param None + * @retval None + */ +static void MX_TIM2_Init(void) { + 8002ba0: b580 push {r7, lr} + 8002ba2: b08c sub sp, #48 ; 0x30 + 8002ba4: af00 add r7, sp, #0 + + /* USER CODE BEGIN TIM2_Init 0 */ + + /* USER CODE END TIM2_Init 0 */ + + TIM_Encoder_InitTypeDef sConfig = { 0 }; + 8002ba6: f107 030c add.w r3, r7, #12 + 8002baa: 2224 movs r2, #36 ; 0x24 + 8002bac: 2100 movs r1, #0 + 8002bae: 4618 mov r0, r3 + 8002bb0: f007 f971 bl 8009e96 + TIM_MasterConfigTypeDef sMasterConfig = { 0 }; + 8002bb4: 463b mov r3, r7 + 8002bb6: 2200 movs r2, #0 + 8002bb8: 601a str r2, [r3, #0] + 8002bba: 605a str r2, [r3, #4] + 8002bbc: 609a str r2, [r3, #8] + + /* USER CODE BEGIN TIM2_Init 1 */ + + /* USER CODE END TIM2_Init 1 */ + htim2.Instance = TIM2; + 8002bbe: 4b26 ldr r3, [pc, #152] ; (8002c58 <_ZL12MX_TIM2_Initv+0xb8>) + 8002bc0: f04f 4280 mov.w r2, #1073741824 ; 0x40000000 + 8002bc4: 601a str r2, [r3, #0] + htim2.Init.Prescaler = 0; + 8002bc6: 4b24 ldr r3, [pc, #144] ; (8002c58 <_ZL12MX_TIM2_Initv+0xb8>) + 8002bc8: 2200 movs r2, #0 + 8002bca: 605a str r2, [r3, #4] + htim2.Init.CounterMode = TIM_COUNTERMODE_UP; + 8002bcc: 4b22 ldr r3, [pc, #136] ; (8002c58 <_ZL12MX_TIM2_Initv+0xb8>) + 8002bce: 2200 movs r2, #0 + 8002bd0: 609a str r2, [r3, #8] + htim2.Init.Period = 4294967295; + 8002bd2: 4b21 ldr r3, [pc, #132] ; (8002c58 <_ZL12MX_TIM2_Initv+0xb8>) + 8002bd4: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff + 8002bd8: 60da str r2, [r3, #12] + htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 8002bda: 4b1f ldr r3, [pc, #124] ; (8002c58 <_ZL12MX_TIM2_Initv+0xb8>) + 8002bdc: 2200 movs r2, #0 + 8002bde: 611a str r2, [r3, #16] + htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + 8002be0: 4b1d ldr r3, [pc, #116] ; (8002c58 <_ZL12MX_TIM2_Initv+0xb8>) + 8002be2: 2200 movs r2, #0 + 8002be4: 619a str r2, [r3, #24] + sConfig.EncoderMode = TIM_ENCODERMODE_TI12; + 8002be6: 2303 movs r3, #3 + 8002be8: 60fb str r3, [r7, #12] + sConfig.IC1Polarity = TIM_ICPOLARITY_RISING; + 8002bea: 2300 movs r3, #0 + 8002bec: 613b str r3, [r7, #16] + sConfig.IC1Selection = TIM_ICSELECTION_DIRECTTI; + 8002bee: 2301 movs r3, #1 + 8002bf0: 617b str r3, [r7, #20] + sConfig.IC1Prescaler = TIM_ICPSC_DIV1; + 8002bf2: 2300 movs r3, #0 + 8002bf4: 61bb str r3, [r7, #24] + sConfig.IC1Filter = 0; + 8002bf6: 2300 movs r3, #0 + 8002bf8: 61fb str r3, [r7, #28] + sConfig.IC2Polarity = TIM_ICPOLARITY_RISING; + 8002bfa: 2300 movs r3, #0 + 8002bfc: 623b str r3, [r7, #32] + sConfig.IC2Selection = TIM_ICSELECTION_DIRECTTI; + 8002bfe: 2301 movs r3, #1 + 8002c00: 627b str r3, [r7, #36] ; 0x24 + sConfig.IC2Prescaler = TIM_ICPSC_DIV1; + 8002c02: 2300 movs r3, #0 + 8002c04: 62bb str r3, [r7, #40] ; 0x28 + sConfig.IC2Filter = 0; + 8002c06: 2300 movs r3, #0 + 8002c08: 62fb str r3, [r7, #44] ; 0x2c + if (HAL_TIM_Encoder_Init(&htim2, &sConfig) != HAL_OK) { + 8002c0a: f107 030c add.w r3, r7, #12 + 8002c0e: 4619 mov r1, r3 + 8002c10: 4811 ldr r0, [pc, #68] ; (8002c58 <_ZL12MX_TIM2_Initv+0xb8>) + 8002c12: f003 fdc5 bl 80067a0 + 8002c16: 4603 mov r3, r0 + 8002c18: 2b00 cmp r3, #0 + 8002c1a: bf14 ite ne + 8002c1c: 2301 movne r3, #1 + 8002c1e: 2300 moveq r3, #0 + 8002c20: b2db uxtb r3, r3 + 8002c22: 2b00 cmp r3, #0 + 8002c24: d001 beq.n 8002c2a <_ZL12MX_TIM2_Initv+0x8a> + Error_Handler(); + 8002c26: f000 fb37 bl 8003298 + } + sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; + 8002c2a: 2300 movs r3, #0 + 8002c2c: 603b str r3, [r7, #0] + sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + 8002c2e: 2300 movs r3, #0 + 8002c30: 60bb str r3, [r7, #8] + if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) + 8002c32: 463b mov r3, r7 + 8002c34: 4619 mov r1, r3 + 8002c36: 4808 ldr r0, [pc, #32] ; (8002c58 <_ZL12MX_TIM2_Initv+0xb8>) + 8002c38: f004 fd52 bl 80076e0 + 8002c3c: 4603 mov r3, r0 + != HAL_OK) { + 8002c3e: 2b00 cmp r3, #0 + 8002c40: bf14 ite ne + 8002c42: 2301 movne r3, #1 + 8002c44: 2300 moveq r3, #0 + 8002c46: b2db uxtb r3, r3 + if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) + 8002c48: 2b00 cmp r3, #0 + 8002c4a: d001 beq.n 8002c50 <_ZL12MX_TIM2_Initv+0xb0> + Error_Handler(); + 8002c4c: f000 fb24 bl 8003298 + } + /* USER CODE BEGIN TIM2_Init 2 */ - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - 8001c68: f7fe fcc0 bl 80005ec - 8001c6c: 6178 str r0, [r7, #20] + /* USER CODE END TIM2_Init 2 */ - /* Wait for Backup domain Write protection disable */ - while((PWR->CR1 & PWR_CR1_DBP) == RESET) - 8001c6e: e008 b.n 8001c82 - { - if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) - 8001c70: f7fe fcbc bl 80005ec - 8001c74: 4602 mov r2, r0 - 8001c76: 697b ldr r3, [r7, #20] - 8001c78: 1ad3 subs r3, r2, r3 - 8001c7a: 2b64 cmp r3, #100 ; 0x64 - 8001c7c: d901 bls.n 8001c82 - { - return HAL_TIMEOUT; - 8001c7e: 2303 movs r3, #3 - 8001c80: e38d b.n 800239e - while((PWR->CR1 & PWR_CR1_DBP) == RESET) - 8001c82: 4b2c ldr r3, [pc, #176] ; (8001d34 ) - 8001c84: 681b ldr r3, [r3, #0] - 8001c86: f403 7380 and.w r3, r3, #256 ; 0x100 - 8001c8a: 2b00 cmp r3, #0 - 8001c8c: d0f0 beq.n 8001c70 - } - } +} + 8002c50: bf00 nop + 8002c52: 3730 adds r7, #48 ; 0x30 + 8002c54: 46bd mov sp, r7 + 8002c56: bd80 pop {r7, pc} + 8002c58: 200000a4 .word 0x200000a4 - /* Reset the Backup domain only if the RTC Clock source selection is modified */ - tmpreg0 = (RCC->BDCR & RCC_BDCR_RTCSEL); - 8001c8e: 4b28 ldr r3, [pc, #160] ; (8001d30 ) - 8001c90: 6f1b ldr r3, [r3, #112] ; 0x70 - 8001c92: f403 7340 and.w r3, r3, #768 ; 0x300 - 8001c96: 613b str r3, [r7, #16] +08002c5c <_ZL12MX_TIM3_Initv>: +/** + * @brief TIM3 Initialization Function + * @param None + * @retval None + */ +static void MX_TIM3_Init(void) { + 8002c5c: b580 push {r7, lr} + 8002c5e: b088 sub sp, #32 + 8002c60: af00 add r7, sp, #0 + + /* USER CODE BEGIN TIM3_Init 0 */ + + /* USER CODE END TIM3_Init 0 */ + + TIM_ClockConfigTypeDef sClockSourceConfig = { 0 }; + 8002c62: f107 0310 add.w r3, r7, #16 + 8002c66: 2200 movs r2, #0 + 8002c68: 601a str r2, [r3, #0] + 8002c6a: 605a str r2, [r3, #4] + 8002c6c: 609a str r2, [r3, #8] + 8002c6e: 60da str r2, [r3, #12] + TIM_MasterConfigTypeDef sMasterConfig = { 0 }; + 8002c70: 1d3b adds r3, r7, #4 + 8002c72: 2200 movs r2, #0 + 8002c74: 601a str r2, [r3, #0] + 8002c76: 605a str r2, [r3, #4] + 8002c78: 609a str r2, [r3, #8] + + /* USER CODE BEGIN TIM3_Init 1 */ + + /* USER CODE END TIM3_Init 1 */ + htim3.Instance = TIM3; + 8002c7a: 4b25 ldr r3, [pc, #148] ; (8002d10 <_ZL12MX_TIM3_Initv+0xb4>) + 8002c7c: 4a25 ldr r2, [pc, #148] ; (8002d14 <_ZL12MX_TIM3_Initv+0xb8>) + 8002c7e: 601a str r2, [r3, #0] + htim3.Init.Prescaler = 39999; + 8002c80: 4b23 ldr r3, [pc, #140] ; (8002d10 <_ZL12MX_TIM3_Initv+0xb4>) + 8002c82: f649 423f movw r2, #39999 ; 0x9c3f + 8002c86: 605a str r2, [r3, #4] + htim3.Init.CounterMode = TIM_COUNTERMODE_UP; + 8002c88: 4b21 ldr r3, [pc, #132] ; (8002d10 <_ZL12MX_TIM3_Initv+0xb4>) + 8002c8a: 2200 movs r2, #0 + 8002c8c: 609a str r2, [r3, #8] + htim3.Init.Period = 9; + 8002c8e: 4b20 ldr r3, [pc, #128] ; (8002d10 <_ZL12MX_TIM3_Initv+0xb4>) + 8002c90: 2209 movs r2, #9 + 8002c92: 60da str r2, [r3, #12] + htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 8002c94: 4b1e ldr r3, [pc, #120] ; (8002d10 <_ZL12MX_TIM3_Initv+0xb4>) + 8002c96: 2200 movs r2, #0 + 8002c98: 611a str r2, [r3, #16] + htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + 8002c9a: 4b1d ldr r3, [pc, #116] ; (8002d10 <_ZL12MX_TIM3_Initv+0xb4>) + 8002c9c: 2200 movs r2, #0 + 8002c9e: 619a str r2, [r3, #24] + if (HAL_TIM_Base_Init(&htim3) != HAL_OK) { + 8002ca0: 481b ldr r0, [pc, #108] ; (8002d10 <_ZL12MX_TIM3_Initv+0xb4>) + 8002ca2: f003 fd1d bl 80066e0 + 8002ca6: 4603 mov r3, r0 + 8002ca8: 2b00 cmp r3, #0 + 8002caa: bf14 ite ne + 8002cac: 2301 movne r3, #1 + 8002cae: 2300 moveq r3, #0 + 8002cb0: b2db uxtb r3, r3 + 8002cb2: 2b00 cmp r3, #0 + 8002cb4: d001 beq.n 8002cba <_ZL12MX_TIM3_Initv+0x5e> + Error_Handler(); + 8002cb6: f000 faef bl 8003298 + } + sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; + 8002cba: f44f 5380 mov.w r3, #4096 ; 0x1000 + 8002cbe: 613b str r3, [r7, #16] + if (HAL_TIM_ConfigClockSource(&htim3, &sClockSourceConfig) != HAL_OK) { + 8002cc0: f107 0310 add.w r3, r7, #16 + 8002cc4: 4619 mov r1, r3 + 8002cc6: 4812 ldr r0, [pc, #72] ; (8002d10 <_ZL12MX_TIM3_Initv+0xb4>) + 8002cc8: f004 f86a bl 8006da0 + 8002ccc: 4603 mov r3, r0 + 8002cce: 2b00 cmp r3, #0 + 8002cd0: bf14 ite ne + 8002cd2: 2301 movne r3, #1 + 8002cd4: 2300 moveq r3, #0 + 8002cd6: b2db uxtb r3, r3 + 8002cd8: 2b00 cmp r3, #0 + 8002cda: d001 beq.n 8002ce0 <_ZL12MX_TIM3_Initv+0x84> + Error_Handler(); + 8002cdc: f000 fadc bl 8003298 + } + sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; + 8002ce0: 2300 movs r3, #0 + 8002ce2: 607b str r3, [r7, #4] + sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + 8002ce4: 2300 movs r3, #0 + 8002ce6: 60fb str r3, [r7, #12] + if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) + 8002ce8: 1d3b adds r3, r7, #4 + 8002cea: 4619 mov r1, r3 + 8002cec: 4808 ldr r0, [pc, #32] ; (8002d10 <_ZL12MX_TIM3_Initv+0xb4>) + 8002cee: f004 fcf7 bl 80076e0 + 8002cf2: 4603 mov r3, r0 + != HAL_OK) { + 8002cf4: 2b00 cmp r3, #0 + 8002cf6: bf14 ite ne + 8002cf8: 2301 movne r3, #1 + 8002cfa: 2300 moveq r3, #0 + 8002cfc: b2db uxtb r3, r3 + if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) + 8002cfe: 2b00 cmp r3, #0 + 8002d00: d001 beq.n 8002d06 <_ZL12MX_TIM3_Initv+0xaa> + Error_Handler(); + 8002d02: f000 fac9 bl 8003298 + } + /* USER CODE BEGIN TIM3_Init 2 */ - if((tmpreg0 != 0x00000000U) && (tmpreg0 != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL))) - 8001c98: 693b ldr r3, [r7, #16] - 8001c9a: 2b00 cmp r3, #0 - 8001c9c: d035 beq.n 8001d0a - 8001c9e: 687b ldr r3, [r7, #4] - 8001ca0: 6b1b ldr r3, [r3, #48] ; 0x30 - 8001ca2: f403 7340 and.w r3, r3, #768 ; 0x300 - 8001ca6: 693a ldr r2, [r7, #16] - 8001ca8: 429a cmp r2, r3 - 8001caa: d02e beq.n 8001d0a - { - /* Store the content of BDCR register before the reset of Backup Domain */ - tmpreg0 = (RCC->BDCR & ~(RCC_BDCR_RTCSEL)); - 8001cac: 4b20 ldr r3, [pc, #128] ; (8001d30 ) - 8001cae: 6f1b ldr r3, [r3, #112] ; 0x70 - 8001cb0: f423 7340 bic.w r3, r3, #768 ; 0x300 - 8001cb4: 613b str r3, [r7, #16] + /* USER CODE END TIM3_Init 2 */ - /* RTC Clock selection can be changed only if the Backup Domain is reset */ - __HAL_RCC_BACKUPRESET_FORCE(); - 8001cb6: 4b1e ldr r3, [pc, #120] ; (8001d30 ) - 8001cb8: 6f1b ldr r3, [r3, #112] ; 0x70 - 8001cba: 4a1d ldr r2, [pc, #116] ; (8001d30 ) - 8001cbc: f443 3380 orr.w r3, r3, #65536 ; 0x10000 - 8001cc0: 6713 str r3, [r2, #112] ; 0x70 - __HAL_RCC_BACKUPRESET_RELEASE(); - 8001cc2: 4b1b ldr r3, [pc, #108] ; (8001d30 ) - 8001cc4: 6f1b ldr r3, [r3, #112] ; 0x70 - 8001cc6: 4a1a ldr r2, [pc, #104] ; (8001d30 ) - 8001cc8: f423 3380 bic.w r3, r3, #65536 ; 0x10000 - 8001ccc: 6713 str r3, [r2, #112] ; 0x70 +} + 8002d06: bf00 nop + 8002d08: 3720 adds r7, #32 + 8002d0a: 46bd mov sp, r7 + 8002d0c: bd80 pop {r7, pc} + 8002d0e: bf00 nop + 8002d10: 200000e4 .word 0x200000e4 + 8002d14: 40000400 .word 0x40000400 + +08002d18 <_ZL12MX_TIM4_Initv>: +/** + * @brief TIM4 Initialization Function + * @param None + * @retval None + */ +static void MX_TIM4_Init(void) { + 8002d18: b580 push {r7, lr} + 8002d1a: b08e sub sp, #56 ; 0x38 + 8002d1c: af00 add r7, sp, #0 + + /* USER CODE BEGIN TIM4_Init 0 */ + + /* USER CODE END TIM4_Init 0 */ + + TIM_ClockConfigTypeDef sClockSourceConfig = { 0 }; + 8002d1e: f107 0328 add.w r3, r7, #40 ; 0x28 + 8002d22: 2200 movs r2, #0 + 8002d24: 601a str r2, [r3, #0] + 8002d26: 605a str r2, [r3, #4] + 8002d28: 609a str r2, [r3, #8] + 8002d2a: 60da str r2, [r3, #12] + TIM_MasterConfigTypeDef sMasterConfig = { 0 }; + 8002d2c: f107 031c add.w r3, r7, #28 + 8002d30: 2200 movs r2, #0 + 8002d32: 601a str r2, [r3, #0] + 8002d34: 605a str r2, [r3, #4] + 8002d36: 609a str r2, [r3, #8] + TIM_OC_InitTypeDef sConfigOC = { 0 }; + 8002d38: 463b mov r3, r7 + 8002d3a: 2200 movs r2, #0 + 8002d3c: 601a str r2, [r3, #0] + 8002d3e: 605a str r2, [r3, #4] + 8002d40: 609a str r2, [r3, #8] + 8002d42: 60da str r2, [r3, #12] + 8002d44: 611a str r2, [r3, #16] + 8002d46: 615a str r2, [r3, #20] + 8002d48: 619a str r2, [r3, #24] + + /* USER CODE BEGIN TIM4_Init 1 */ + + /* USER CODE END TIM4_Init 1 */ + htim4.Instance = TIM4; + 8002d4a: 4b41 ldr r3, [pc, #260] ; (8002e50 <_ZL12MX_TIM4_Initv+0x138>) + 8002d4c: 4a41 ldr r2, [pc, #260] ; (8002e54 <_ZL12MX_TIM4_Initv+0x13c>) + 8002d4e: 601a str r2, [r3, #0] + htim4.Init.Prescaler = 0; + 8002d50: 4b3f ldr r3, [pc, #252] ; (8002e50 <_ZL12MX_TIM4_Initv+0x138>) + 8002d52: 2200 movs r2, #0 + 8002d54: 605a str r2, [r3, #4] + htim4.Init.CounterMode = TIM_COUNTERMODE_UP; + 8002d56: 4b3e ldr r3, [pc, #248] ; (8002e50 <_ZL12MX_TIM4_Initv+0x138>) + 8002d58: 2200 movs r2, #0 + 8002d5a: 609a str r2, [r3, #8] + htim4.Init.Period = 0; + 8002d5c: 4b3c ldr r3, [pc, #240] ; (8002e50 <_ZL12MX_TIM4_Initv+0x138>) + 8002d5e: 2200 movs r2, #0 + 8002d60: 60da str r2, [r3, #12] + htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 8002d62: 4b3b ldr r3, [pc, #236] ; (8002e50 <_ZL12MX_TIM4_Initv+0x138>) + 8002d64: 2200 movs r2, #0 + 8002d66: 611a str r2, [r3, #16] + htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + 8002d68: 4b39 ldr r3, [pc, #228] ; (8002e50 <_ZL12MX_TIM4_Initv+0x138>) + 8002d6a: 2200 movs r2, #0 + 8002d6c: 619a str r2, [r3, #24] + if (HAL_TIM_Base_Init(&htim4) != HAL_OK) { + 8002d6e: 4838 ldr r0, [pc, #224] ; (8002e50 <_ZL12MX_TIM4_Initv+0x138>) + 8002d70: f003 fcb6 bl 80066e0 + 8002d74: 4603 mov r3, r0 + 8002d76: 2b00 cmp r3, #0 + 8002d78: bf14 ite ne + 8002d7a: 2301 movne r3, #1 + 8002d7c: 2300 moveq r3, #0 + 8002d7e: b2db uxtb r3, r3 + 8002d80: 2b00 cmp r3, #0 + 8002d82: d001 beq.n 8002d88 <_ZL12MX_TIM4_Initv+0x70> + Error_Handler(); + 8002d84: f000 fa88 bl 8003298 + } + sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; + 8002d88: f44f 5380 mov.w r3, #4096 ; 0x1000 + 8002d8c: 62bb str r3, [r7, #40] ; 0x28 + if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) { + 8002d8e: f107 0328 add.w r3, r7, #40 ; 0x28 + 8002d92: 4619 mov r1, r3 + 8002d94: 482e ldr r0, [pc, #184] ; (8002e50 <_ZL12MX_TIM4_Initv+0x138>) + 8002d96: f004 f803 bl 8006da0 + 8002d9a: 4603 mov r3, r0 + 8002d9c: 2b00 cmp r3, #0 + 8002d9e: bf14 ite ne + 8002da0: 2301 movne r3, #1 + 8002da2: 2300 moveq r3, #0 + 8002da4: b2db uxtb r3, r3 + 8002da6: 2b00 cmp r3, #0 + 8002da8: d001 beq.n 8002dae <_ZL12MX_TIM4_Initv+0x96> + Error_Handler(); + 8002daa: f000 fa75 bl 8003298 + } + if (HAL_TIM_PWM_Init(&htim4) != HAL_OK) { + 8002dae: 4828 ldr r0, [pc, #160] ; (8002e50 <_ZL12MX_TIM4_Initv+0x138>) + 8002db0: f003 fcc1 bl 8006736 + 8002db4: 4603 mov r3, r0 + 8002db6: 2b00 cmp r3, #0 + 8002db8: bf14 ite ne + 8002dba: 2301 movne r3, #1 + 8002dbc: 2300 moveq r3, #0 + 8002dbe: b2db uxtb r3, r3 + 8002dc0: 2b00 cmp r3, #0 + 8002dc2: d001 beq.n 8002dc8 <_ZL12MX_TIM4_Initv+0xb0> + Error_Handler(); + 8002dc4: f000 fa68 bl 8003298 + } + sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; + 8002dc8: 2300 movs r3, #0 + 8002dca: 61fb str r3, [r7, #28] + sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + 8002dcc: 2300 movs r3, #0 + 8002dce: 627b str r3, [r7, #36] ; 0x24 + if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) + 8002dd0: f107 031c add.w r3, r7, #28 + 8002dd4: 4619 mov r1, r3 + 8002dd6: 481e ldr r0, [pc, #120] ; (8002e50 <_ZL12MX_TIM4_Initv+0x138>) + 8002dd8: f004 fc82 bl 80076e0 + 8002ddc: 4603 mov r3, r0 + != HAL_OK) { + 8002dde: 2b00 cmp r3, #0 + 8002de0: bf14 ite ne + 8002de2: 2301 movne r3, #1 + 8002de4: 2300 moveq r3, #0 + 8002de6: b2db uxtb r3, r3 + if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) + 8002de8: 2b00 cmp r3, #0 + 8002dea: d001 beq.n 8002df0 <_ZL12MX_TIM4_Initv+0xd8> + Error_Handler(); + 8002dec: f000 fa54 bl 8003298 + } + sConfigOC.OCMode = TIM_OCMODE_PWM1; + 8002df0: 2360 movs r3, #96 ; 0x60 + 8002df2: 603b str r3, [r7, #0] + sConfigOC.Pulse = 0; + 8002df4: 2300 movs r3, #0 + 8002df6: 607b str r3, [r7, #4] + sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + 8002df8: 2300 movs r3, #0 + 8002dfa: 60bb str r3, [r7, #8] + sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + 8002dfc: 2300 movs r3, #0 + 8002dfe: 613b str r3, [r7, #16] + if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) + 8002e00: 463b mov r3, r7 + 8002e02: 2208 movs r2, #8 + 8002e04: 4619 mov r1, r3 + 8002e06: 4812 ldr r0, [pc, #72] ; (8002e50 <_ZL12MX_TIM4_Initv+0x138>) + 8002e08: f003 feb2 bl 8006b70 + 8002e0c: 4603 mov r3, r0 + != HAL_OK) { + 8002e0e: 2b00 cmp r3, #0 + 8002e10: bf14 ite ne + 8002e12: 2301 movne r3, #1 + 8002e14: 2300 moveq r3, #0 + 8002e16: b2db uxtb r3, r3 + if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) + 8002e18: 2b00 cmp r3, #0 + 8002e1a: d001 beq.n 8002e20 <_ZL12MX_TIM4_Initv+0x108> + Error_Handler(); + 8002e1c: f000 fa3c bl 8003298 + } + if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_4) + 8002e20: 463b mov r3, r7 + 8002e22: 220c movs r2, #12 + 8002e24: 4619 mov r1, r3 + 8002e26: 480a ldr r0, [pc, #40] ; (8002e50 <_ZL12MX_TIM4_Initv+0x138>) + 8002e28: f003 fea2 bl 8006b70 + 8002e2c: 4603 mov r3, r0 + != HAL_OK) { + 8002e2e: 2b00 cmp r3, #0 + 8002e30: bf14 ite ne + 8002e32: 2301 movne r3, #1 + 8002e34: 2300 moveq r3, #0 + 8002e36: b2db uxtb r3, r3 + if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_4) + 8002e38: 2b00 cmp r3, #0 + 8002e3a: d001 beq.n 8002e40 <_ZL12MX_TIM4_Initv+0x128> + Error_Handler(); + 8002e3c: f000 fa2c bl 8003298 + } + /* USER CODE BEGIN TIM4_Init 2 */ - /* Restore the Content of BDCR register */ - RCC->BDCR = tmpreg0; - 8001cce: 4a18 ldr r2, [pc, #96] ; (8001d30 ) - 8001cd0: 693b ldr r3, [r7, #16] - 8001cd2: 6713 str r3, [r2, #112] ; 0x70 + /* USER CODE END TIM4_Init 2 */ + HAL_TIM_MspPostInit(&htim4); + 8002e40: 4803 ldr r0, [pc, #12] ; (8002e50 <_ZL12MX_TIM4_Initv+0x138>) + 8002e42: f001 fa47 bl 80042d4 - /* Wait for LSE reactivation if LSE was enable prior to Backup Domain reset */ - if (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSEON)) - 8001cd4: 4b16 ldr r3, [pc, #88] ; (8001d30 ) - 8001cd6: 6f1b ldr r3, [r3, #112] ; 0x70 - 8001cd8: f003 0301 and.w r3, r3, #1 - 8001cdc: 2b01 cmp r3, #1 - 8001cde: d114 bne.n 8001d0a - { - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - 8001ce0: f7fe fc84 bl 80005ec - 8001ce4: 6178 str r0, [r7, #20] +} + 8002e46: bf00 nop + 8002e48: 3738 adds r7, #56 ; 0x38 + 8002e4a: 46bd mov sp, r7 + 8002e4c: bd80 pop {r7, pc} + 8002e4e: bf00 nop + 8002e50: 20000124 .word 0x20000124 + 8002e54: 40000800 .word 0x40000800 + +08002e58 <_ZL12MX_TIM5_Initv>: +/** + * @brief TIM5 Initialization Function + * @param None + * @retval None + */ +static void MX_TIM5_Init(void) { + 8002e58: b580 push {r7, lr} + 8002e5a: b08c sub sp, #48 ; 0x30 + 8002e5c: af00 add r7, sp, #0 + + /* USER CODE BEGIN TIM5_Init 0 */ + + /* USER CODE END TIM5_Init 0 */ + + TIM_Encoder_InitTypeDef sConfig = { 0 }; + 8002e5e: f107 030c add.w r3, r7, #12 + 8002e62: 2224 movs r2, #36 ; 0x24 + 8002e64: 2100 movs r1, #0 + 8002e66: 4618 mov r0, r3 + 8002e68: f007 f815 bl 8009e96 + TIM_MasterConfigTypeDef sMasterConfig = { 0 }; + 8002e6c: 463b mov r3, r7 + 8002e6e: 2200 movs r2, #0 + 8002e70: 601a str r2, [r3, #0] + 8002e72: 605a str r2, [r3, #4] + 8002e74: 609a str r2, [r3, #8] + + /* USER CODE BEGIN TIM5_Init 1 */ + + /* USER CODE END TIM5_Init 1 */ + htim5.Instance = TIM5; + 8002e76: 4b26 ldr r3, [pc, #152] ; (8002f10 <_ZL12MX_TIM5_Initv+0xb8>) + 8002e78: 4a26 ldr r2, [pc, #152] ; (8002f14 <_ZL12MX_TIM5_Initv+0xbc>) + 8002e7a: 601a str r2, [r3, #0] + htim5.Init.Prescaler = 0; + 8002e7c: 4b24 ldr r3, [pc, #144] ; (8002f10 <_ZL12MX_TIM5_Initv+0xb8>) + 8002e7e: 2200 movs r2, #0 + 8002e80: 605a str r2, [r3, #4] + htim5.Init.CounterMode = TIM_COUNTERMODE_UP; + 8002e82: 4b23 ldr r3, [pc, #140] ; (8002f10 <_ZL12MX_TIM5_Initv+0xb8>) + 8002e84: 2200 movs r2, #0 + 8002e86: 609a str r2, [r3, #8] + htim5.Init.Period = 4294967295; + 8002e88: 4b21 ldr r3, [pc, #132] ; (8002f10 <_ZL12MX_TIM5_Initv+0xb8>) + 8002e8a: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff + 8002e8e: 60da str r2, [r3, #12] + htim5.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 8002e90: 4b1f ldr r3, [pc, #124] ; (8002f10 <_ZL12MX_TIM5_Initv+0xb8>) + 8002e92: 2200 movs r2, #0 + 8002e94: 611a str r2, [r3, #16] + htim5.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + 8002e96: 4b1e ldr r3, [pc, #120] ; (8002f10 <_ZL12MX_TIM5_Initv+0xb8>) + 8002e98: 2200 movs r2, #0 + 8002e9a: 619a str r2, [r3, #24] + sConfig.EncoderMode = TIM_ENCODERMODE_TI12; + 8002e9c: 2303 movs r3, #3 + 8002e9e: 60fb str r3, [r7, #12] + sConfig.IC1Polarity = TIM_ICPOLARITY_RISING; + 8002ea0: 2300 movs r3, #0 + 8002ea2: 613b str r3, [r7, #16] + sConfig.IC1Selection = TIM_ICSELECTION_DIRECTTI; + 8002ea4: 2301 movs r3, #1 + 8002ea6: 617b str r3, [r7, #20] + sConfig.IC1Prescaler = TIM_ICPSC_DIV1; + 8002ea8: 2300 movs r3, #0 + 8002eaa: 61bb str r3, [r7, #24] + sConfig.IC1Filter = 0; + 8002eac: 2300 movs r3, #0 + 8002eae: 61fb str r3, [r7, #28] + sConfig.IC2Polarity = TIM_ICPOLARITY_RISING; + 8002eb0: 2300 movs r3, #0 + 8002eb2: 623b str r3, [r7, #32] + sConfig.IC2Selection = TIM_ICSELECTION_DIRECTTI; + 8002eb4: 2301 movs r3, #1 + 8002eb6: 627b str r3, [r7, #36] ; 0x24 + sConfig.IC2Prescaler = TIM_ICPSC_DIV1; + 8002eb8: 2300 movs r3, #0 + 8002eba: 62bb str r3, [r7, #40] ; 0x28 + sConfig.IC2Filter = 0; + 8002ebc: 2300 movs r3, #0 + 8002ebe: 62fb str r3, [r7, #44] ; 0x2c + if (HAL_TIM_Encoder_Init(&htim5, &sConfig) != HAL_OK) { + 8002ec0: f107 030c add.w r3, r7, #12 + 8002ec4: 4619 mov r1, r3 + 8002ec6: 4812 ldr r0, [pc, #72] ; (8002f10 <_ZL12MX_TIM5_Initv+0xb8>) + 8002ec8: f003 fc6a bl 80067a0 + 8002ecc: 4603 mov r3, r0 + 8002ece: 2b00 cmp r3, #0 + 8002ed0: bf14 ite ne + 8002ed2: 2301 movne r3, #1 + 8002ed4: 2300 moveq r3, #0 + 8002ed6: b2db uxtb r3, r3 + 8002ed8: 2b00 cmp r3, #0 + 8002eda: d001 beq.n 8002ee0 <_ZL12MX_TIM5_Initv+0x88> + Error_Handler(); + 8002edc: f000 f9dc bl 8003298 + } + sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; + 8002ee0: 2300 movs r3, #0 + 8002ee2: 603b str r3, [r7, #0] + sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + 8002ee4: 2300 movs r3, #0 + 8002ee6: 60bb str r3, [r7, #8] + if (HAL_TIMEx_MasterConfigSynchronization(&htim5, &sMasterConfig) + 8002ee8: 463b mov r3, r7 + 8002eea: 4619 mov r1, r3 + 8002eec: 4808 ldr r0, [pc, #32] ; (8002f10 <_ZL12MX_TIM5_Initv+0xb8>) + 8002eee: f004 fbf7 bl 80076e0 + 8002ef2: 4603 mov r3, r0 + != HAL_OK) { + 8002ef4: 2b00 cmp r3, #0 + 8002ef6: bf14 ite ne + 8002ef8: 2301 movne r3, #1 + 8002efa: 2300 moveq r3, #0 + 8002efc: b2db uxtb r3, r3 + if (HAL_TIMEx_MasterConfigSynchronization(&htim5, &sMasterConfig) + 8002efe: 2b00 cmp r3, #0 + 8002f00: d001 beq.n 8002f06 <_ZL12MX_TIM5_Initv+0xae> + Error_Handler(); + 8002f02: f000 f9c9 bl 8003298 + } + /* USER CODE BEGIN TIM5_Init 2 */ - /* Wait till LSE is ready */ - while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) - 8001ce6: e00a b.n 8001cfe - { - if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) - 8001ce8: f7fe fc80 bl 80005ec - 8001cec: 4602 mov r2, r0 - 8001cee: 697b ldr r3, [r7, #20] - 8001cf0: 1ad3 subs r3, r2, r3 - 8001cf2: f241 3288 movw r2, #5000 ; 0x1388 - 8001cf6: 4293 cmp r3, r2 - 8001cf8: d901 bls.n 8001cfe - { - return HAL_TIMEOUT; - 8001cfa: 2303 movs r3, #3 - 8001cfc: e34f b.n 800239e - while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) - 8001cfe: 4b0c ldr r3, [pc, #48] ; (8001d30 ) - 8001d00: 6f1b ldr r3, [r3, #112] ; 0x70 - 8001d02: f003 0302 and.w r3, r3, #2 - 8001d06: 2b00 cmp r3, #0 - 8001d08: d0ee beq.n 8001ce8 - } - } - } - } - __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); - 8001d0a: 687b ldr r3, [r7, #4] - 8001d0c: 6b1b ldr r3, [r3, #48] ; 0x30 - 8001d0e: f403 7340 and.w r3, r3, #768 ; 0x300 - 8001d12: f5b3 7f40 cmp.w r3, #768 ; 0x300 - 8001d16: d111 bne.n 8001d3c - 8001d18: 4b05 ldr r3, [pc, #20] ; (8001d30 ) - 8001d1a: 689b ldr r3, [r3, #8] - 8001d1c: f423 12f8 bic.w r2, r3, #2031616 ; 0x1f0000 - 8001d20: 687b ldr r3, [r7, #4] - 8001d22: 6b19 ldr r1, [r3, #48] ; 0x30 - 8001d24: 4b04 ldr r3, [pc, #16] ; (8001d38 ) - 8001d26: 400b ands r3, r1 - 8001d28: 4901 ldr r1, [pc, #4] ; (8001d30 ) - 8001d2a: 4313 orrs r3, r2 - 8001d2c: 608b str r3, [r1, #8] - 8001d2e: e00b b.n 8001d48 - 8001d30: 40023800 .word 0x40023800 - 8001d34: 40007000 .word 0x40007000 - 8001d38: 0ffffcff .word 0x0ffffcff - 8001d3c: 4bb3 ldr r3, [pc, #716] ; (800200c ) - 8001d3e: 689b ldr r3, [r3, #8] - 8001d40: 4ab2 ldr r2, [pc, #712] ; (800200c ) - 8001d42: f423 13f8 bic.w r3, r3, #2031616 ; 0x1f0000 - 8001d46: 6093 str r3, [r2, #8] - 8001d48: 4bb0 ldr r3, [pc, #704] ; (800200c ) - 8001d4a: 6f1a ldr r2, [r3, #112] ; 0x70 - 8001d4c: 687b ldr r3, [r7, #4] - 8001d4e: 6b1b ldr r3, [r3, #48] ; 0x30 - 8001d50: f3c3 030b ubfx r3, r3, #0, #12 - 8001d54: 49ad ldr r1, [pc, #692] ; (800200c ) - 8001d56: 4313 orrs r3, r2 - 8001d58: 670b str r3, [r1, #112] ; 0x70 - } + /* USER CODE END TIM5_Init 2 */ - /*------------------------------------ TIM configuration --------------------------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM) == (RCC_PERIPHCLK_TIM)) - 8001d5a: 687b ldr r3, [r7, #4] - 8001d5c: 681b ldr r3, [r3, #0] - 8001d5e: f003 0310 and.w r3, r3, #16 - 8001d62: 2b00 cmp r3, #0 - 8001d64: d010 beq.n 8001d88 - { - /* Check the parameters */ - assert_param(IS_RCC_TIMPRES(PeriphClkInit->TIMPresSelection)); +} + 8002f06: bf00 nop + 8002f08: 3730 adds r7, #48 ; 0x30 + 8002f0a: 46bd mov sp, r7 + 8002f0c: bd80 pop {r7, pc} + 8002f0e: bf00 nop + 8002f10: 20000164 .word 0x20000164 + 8002f14: 40000c00 .word 0x40000c00 + +08002f18 <_ZL19MX_USART3_UART_Initv>: +/** + * @brief USART3 Initialization Function + * @param None + * @retval None + */ +static void MX_USART3_UART_Init(void) { + 8002f18: b580 push {r7, lr} + 8002f1a: af00 add r7, sp, #0 + /* USER CODE END USART3_Init 0 */ + + /* USER CODE BEGIN USART3_Init 1 */ + + /* USER CODE END USART3_Init 1 */ + huart3.Instance = USART3; + 8002f1c: 4b16 ldr r3, [pc, #88] ; (8002f78 <_ZL19MX_USART3_UART_Initv+0x60>) + 8002f1e: 4a17 ldr r2, [pc, #92] ; (8002f7c <_ZL19MX_USART3_UART_Initv+0x64>) + 8002f20: 601a str r2, [r3, #0] + huart3.Init.BaudRate = 115200; + 8002f22: 4b15 ldr r3, [pc, #84] ; (8002f78 <_ZL19MX_USART3_UART_Initv+0x60>) + 8002f24: f44f 32e1 mov.w r2, #115200 ; 0x1c200 + 8002f28: 605a str r2, [r3, #4] + huart3.Init.WordLength = UART_WORDLENGTH_8B; + 8002f2a: 4b13 ldr r3, [pc, #76] ; (8002f78 <_ZL19MX_USART3_UART_Initv+0x60>) + 8002f2c: 2200 movs r2, #0 + 8002f2e: 609a str r2, [r3, #8] + huart3.Init.StopBits = UART_STOPBITS_1; + 8002f30: 4b11 ldr r3, [pc, #68] ; (8002f78 <_ZL19MX_USART3_UART_Initv+0x60>) + 8002f32: 2200 movs r2, #0 + 8002f34: 60da str r2, [r3, #12] + huart3.Init.Parity = UART_PARITY_NONE; + 8002f36: 4b10 ldr r3, [pc, #64] ; (8002f78 <_ZL19MX_USART3_UART_Initv+0x60>) + 8002f38: 2200 movs r2, #0 + 8002f3a: 611a str r2, [r3, #16] + huart3.Init.Mode = UART_MODE_TX_RX; + 8002f3c: 4b0e ldr r3, [pc, #56] ; (8002f78 <_ZL19MX_USART3_UART_Initv+0x60>) + 8002f3e: 220c movs r2, #12 + 8002f40: 615a str r2, [r3, #20] + huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE; + 8002f42: 4b0d ldr r3, [pc, #52] ; (8002f78 <_ZL19MX_USART3_UART_Initv+0x60>) + 8002f44: 2200 movs r2, #0 + 8002f46: 619a str r2, [r3, #24] + huart3.Init.OverSampling = UART_OVERSAMPLING_16; + 8002f48: 4b0b ldr r3, [pc, #44] ; (8002f78 <_ZL19MX_USART3_UART_Initv+0x60>) + 8002f4a: 2200 movs r2, #0 + 8002f4c: 61da str r2, [r3, #28] + huart3.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; + 8002f4e: 4b0a ldr r3, [pc, #40] ; (8002f78 <_ZL19MX_USART3_UART_Initv+0x60>) + 8002f50: 2200 movs r2, #0 + 8002f52: 621a str r2, [r3, #32] + huart3.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; + 8002f54: 4b08 ldr r3, [pc, #32] ; (8002f78 <_ZL19MX_USART3_UART_Initv+0x60>) + 8002f56: 2200 movs r2, #0 + 8002f58: 625a str r2, [r3, #36] ; 0x24 + if (HAL_UART_Init(&huart3) != HAL_OK) { + 8002f5a: 4807 ldr r0, [pc, #28] ; (8002f78 <_ZL19MX_USART3_UART_Initv+0x60>) + 8002f5c: f004 fc3a bl 80077d4 + 8002f60: 4603 mov r3, r0 + 8002f62: 2b00 cmp r3, #0 + 8002f64: bf14 ite ne + 8002f66: 2301 movne r3, #1 + 8002f68: 2300 moveq r3, #0 + 8002f6a: b2db uxtb r3, r3 + 8002f6c: 2b00 cmp r3, #0 + 8002f6e: d001 beq.n 8002f74 <_ZL19MX_USART3_UART_Initv+0x5c> + Error_Handler(); + 8002f70: f000 f992 bl 8003298 + } + /* USER CODE BEGIN USART3_Init 2 */ - /* Configure Timer Prescaler */ - __HAL_RCC_TIMCLKPRESCALER(PeriphClkInit->TIMPresSelection); - 8001d66: 4ba9 ldr r3, [pc, #676] ; (800200c ) - 8001d68: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c - 8001d6c: 4aa7 ldr r2, [pc, #668] ; (800200c ) - 8001d6e: f023 7380 bic.w r3, r3, #16777216 ; 0x1000000 - 8001d72: f8c2 308c str.w r3, [r2, #140] ; 0x8c - 8001d76: 4ba5 ldr r3, [pc, #660] ; (800200c ) - 8001d78: f8d3 208c ldr.w r2, [r3, #140] ; 0x8c - 8001d7c: 687b ldr r3, [r7, #4] - 8001d7e: 6b9b ldr r3, [r3, #56] ; 0x38 - 8001d80: 49a2 ldr r1, [pc, #648] ; (800200c ) - 8001d82: 4313 orrs r3, r2 - 8001d84: f8c1 308c str.w r3, [r1, #140] ; 0x8c - } + /* USER CODE END USART3_Init 2 */ - /*-------------------------------------- I2C1 Configuration -----------------------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1) - 8001d88: 687b ldr r3, [r7, #4] - 8001d8a: 681b ldr r3, [r3, #0] - 8001d8c: f403 4380 and.w r3, r3, #16384 ; 0x4000 - 8001d90: 2b00 cmp r3, #0 - 8001d92: d00a beq.n 8001daa - { - /* Check the parameters */ - assert_param(IS_RCC_I2C1CLKSOURCE(PeriphClkInit->I2c1ClockSelection)); +} + 8002f74: bf00 nop + 8002f76: bd80 pop {r7, pc} + 8002f78: 200001a4 .word 0x200001a4 + 8002f7c: 40004800 .word 0x40004800 - /* Configure the I2C1 clock source */ - __HAL_RCC_I2C1_CONFIG(PeriphClkInit->I2c1ClockSelection); - 8001d94: 4b9d ldr r3, [pc, #628] ; (800200c ) - 8001d96: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 8001d9a: f423 3240 bic.w r2, r3, #196608 ; 0x30000 - 8001d9e: 687b ldr r3, [r7, #4] - 8001da0: 6e5b ldr r3, [r3, #100] ; 0x64 - 8001da2: 499a ldr r1, [pc, #616] ; (800200c ) - 8001da4: 4313 orrs r3, r2 - 8001da6: f8c1 3090 str.w r3, [r1, #144] ; 0x90 - } +08002f80 <_ZL19MX_USART6_UART_Initv>: +/** + * @brief USART6 Initialization Function + * @param None + * @retval None + */ +static void MX_USART6_UART_Init(void) { + 8002f80: b580 push {r7, lr} + 8002f82: af00 add r7, sp, #0 + /* USER CODE END USART6_Init 0 */ + + /* USER CODE BEGIN USART6_Init 1 */ + + /* USER CODE END USART6_Init 1 */ + huart6.Instance = USART6; + 8002f84: 4b16 ldr r3, [pc, #88] ; (8002fe0 <_ZL19MX_USART6_UART_Initv+0x60>) + 8002f86: 4a17 ldr r2, [pc, #92] ; (8002fe4 <_ZL19MX_USART6_UART_Initv+0x64>) + 8002f88: 601a str r2, [r3, #0] + huart6.Init.BaudRate = 115200; + 8002f8a: 4b15 ldr r3, [pc, #84] ; (8002fe0 <_ZL19MX_USART6_UART_Initv+0x60>) + 8002f8c: f44f 32e1 mov.w r2, #115200 ; 0x1c200 + 8002f90: 605a str r2, [r3, #4] + huart6.Init.WordLength = UART_WORDLENGTH_8B; + 8002f92: 4b13 ldr r3, [pc, #76] ; (8002fe0 <_ZL19MX_USART6_UART_Initv+0x60>) + 8002f94: 2200 movs r2, #0 + 8002f96: 609a str r2, [r3, #8] + huart6.Init.StopBits = UART_STOPBITS_1; + 8002f98: 4b11 ldr r3, [pc, #68] ; (8002fe0 <_ZL19MX_USART6_UART_Initv+0x60>) + 8002f9a: 2200 movs r2, #0 + 8002f9c: 60da str r2, [r3, #12] + huart6.Init.Parity = UART_PARITY_NONE; + 8002f9e: 4b10 ldr r3, [pc, #64] ; (8002fe0 <_ZL19MX_USART6_UART_Initv+0x60>) + 8002fa0: 2200 movs r2, #0 + 8002fa2: 611a str r2, [r3, #16] + huart6.Init.Mode = UART_MODE_TX_RX; + 8002fa4: 4b0e ldr r3, [pc, #56] ; (8002fe0 <_ZL19MX_USART6_UART_Initv+0x60>) + 8002fa6: 220c movs r2, #12 + 8002fa8: 615a str r2, [r3, #20] + huart6.Init.HwFlowCtl = UART_HWCONTROL_NONE; + 8002faa: 4b0d ldr r3, [pc, #52] ; (8002fe0 <_ZL19MX_USART6_UART_Initv+0x60>) + 8002fac: 2200 movs r2, #0 + 8002fae: 619a str r2, [r3, #24] + huart6.Init.OverSampling = UART_OVERSAMPLING_16; + 8002fb0: 4b0b ldr r3, [pc, #44] ; (8002fe0 <_ZL19MX_USART6_UART_Initv+0x60>) + 8002fb2: 2200 movs r2, #0 + 8002fb4: 61da str r2, [r3, #28] + huart6.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; + 8002fb6: 4b0a ldr r3, [pc, #40] ; (8002fe0 <_ZL19MX_USART6_UART_Initv+0x60>) + 8002fb8: 2200 movs r2, #0 + 8002fba: 621a str r2, [r3, #32] + huart6.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; + 8002fbc: 4b08 ldr r3, [pc, #32] ; (8002fe0 <_ZL19MX_USART6_UART_Initv+0x60>) + 8002fbe: 2200 movs r2, #0 + 8002fc0: 625a str r2, [r3, #36] ; 0x24 + if (HAL_UART_Init(&huart6) != HAL_OK) { + 8002fc2: 4807 ldr r0, [pc, #28] ; (8002fe0 <_ZL19MX_USART6_UART_Initv+0x60>) + 8002fc4: f004 fc06 bl 80077d4 + 8002fc8: 4603 mov r3, r0 + 8002fca: 2b00 cmp r3, #0 + 8002fcc: bf14 ite ne + 8002fce: 2301 movne r3, #1 + 8002fd0: 2300 moveq r3, #0 + 8002fd2: b2db uxtb r3, r3 + 8002fd4: 2b00 cmp r3, #0 + 8002fd6: d001 beq.n 8002fdc <_ZL19MX_USART6_UART_Initv+0x5c> + Error_Handler(); + 8002fd8: f000 f95e bl 8003298 + } + /* USER CODE BEGIN USART6_Init 2 */ - /*-------------------------------------- I2C2 Configuration -----------------------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C2) == RCC_PERIPHCLK_I2C2) - 8001daa: 687b ldr r3, [r7, #4] - 8001dac: 681b ldr r3, [r3, #0] - 8001dae: f403 4300 and.w r3, r3, #32768 ; 0x8000 - 8001db2: 2b00 cmp r3, #0 - 8001db4: d00a beq.n 8001dcc - { - /* Check the parameters */ - assert_param(IS_RCC_I2C2CLKSOURCE(PeriphClkInit->I2c2ClockSelection)); + /* USER CODE END USART6_Init 2 */ - /* Configure the I2C2 clock source */ - __HAL_RCC_I2C2_CONFIG(PeriphClkInit->I2c2ClockSelection); - 8001db6: 4b95 ldr r3, [pc, #596] ; (800200c ) - 8001db8: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 8001dbc: f423 2240 bic.w r2, r3, #786432 ; 0xc0000 - 8001dc0: 687b ldr r3, [r7, #4] - 8001dc2: 6e9b ldr r3, [r3, #104] ; 0x68 - 8001dc4: 4991 ldr r1, [pc, #580] ; (800200c ) - 8001dc6: 4313 orrs r3, r2 - 8001dc8: f8c1 3090 str.w r3, [r1, #144] ; 0x90 - } +} + 8002fdc: bf00 nop + 8002fde: bd80 pop {r7, pc} + 8002fe0: 20000224 .word 0x20000224 + 8002fe4: 40011400 .word 0x40011400 - /*-------------------------------------- I2C3 Configuration -----------------------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C3) == RCC_PERIPHCLK_I2C3) - 8001dcc: 687b ldr r3, [r7, #4] - 8001dce: 681b ldr r3, [r3, #0] - 8001dd0: f403 3380 and.w r3, r3, #65536 ; 0x10000 - 8001dd4: 2b00 cmp r3, #0 - 8001dd6: d00a beq.n 8001dee - { - /* Check the parameters */ - assert_param(IS_RCC_I2C3CLKSOURCE(PeriphClkInit->I2c3ClockSelection)); +08002fe8 <_ZL11MX_DMA_Initv>: - /* Configure the I2C3 clock source */ - __HAL_RCC_I2C3_CONFIG(PeriphClkInit->I2c3ClockSelection); - 8001dd8: 4b8c ldr r3, [pc, #560] ; (800200c ) - 8001dda: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 8001dde: f423 1240 bic.w r2, r3, #3145728 ; 0x300000 - 8001de2: 687b ldr r3, [r7, #4] - 8001de4: 6edb ldr r3, [r3, #108] ; 0x6c - 8001de6: 4989 ldr r1, [pc, #548] ; (800200c ) - 8001de8: 4313 orrs r3, r2 - 8001dea: f8c1 3090 str.w r3, [r1, #144] ; 0x90 - } - - /*-------------------------------------- I2C4 Configuration -----------------------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C4) == RCC_PERIPHCLK_I2C4) - 8001dee: 687b ldr r3, [r7, #4] - 8001df0: 681b ldr r3, [r3, #0] - 8001df2: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 8001df6: 2b00 cmp r3, #0 - 8001df8: d00a beq.n 8001e10 - { - /* Check the parameters */ - assert_param(IS_RCC_I2C4CLKSOURCE(PeriphClkInit->I2c4ClockSelection)); - - /* Configure the I2C4 clock source */ - __HAL_RCC_I2C4_CONFIG(PeriphClkInit->I2c4ClockSelection); - 8001dfa: 4b84 ldr r3, [pc, #528] ; (800200c ) - 8001dfc: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 8001e00: f423 0240 bic.w r2, r3, #12582912 ; 0xc00000 - 8001e04: 687b ldr r3, [r7, #4] - 8001e06: 6f1b ldr r3, [r3, #112] ; 0x70 - 8001e08: 4980 ldr r1, [pc, #512] ; (800200c ) - 8001e0a: 4313 orrs r3, r2 - 8001e0c: f8c1 3090 str.w r3, [r1, #144] ; 0x90 - } - - /*-------------------------------------- USART1 Configuration -----------------------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1) - 8001e10: 687b ldr r3, [r7, #4] - 8001e12: 681b ldr r3, [r3, #0] - 8001e14: f003 0340 and.w r3, r3, #64 ; 0x40 - 8001e18: 2b00 cmp r3, #0 - 8001e1a: d00a beq.n 8001e32 - { - /* Check the parameters */ - assert_param(IS_RCC_USART1CLKSOURCE(PeriphClkInit->Usart1ClockSelection)); - - /* Configure the USART1 clock source */ - __HAL_RCC_USART1_CONFIG(PeriphClkInit->Usart1ClockSelection); - 8001e1c: 4b7b ldr r3, [pc, #492] ; (800200c ) - 8001e1e: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 8001e22: f023 0203 bic.w r2, r3, #3 - 8001e26: 687b ldr r3, [r7, #4] - 8001e28: 6c5b ldr r3, [r3, #68] ; 0x44 - 8001e2a: 4978 ldr r1, [pc, #480] ; (800200c ) - 8001e2c: 4313 orrs r3, r2 - 8001e2e: f8c1 3090 str.w r3, [r1, #144] ; 0x90 - } +/** + * Enable DMA controller clock + */ +static void MX_DMA_Init(void) { + 8002fe8: b580 push {r7, lr} + 8002fea: b082 sub sp, #8 + 8002fec: af00 add r7, sp, #0 + + /* DMA controller clock enable */ + __HAL_RCC_DMA1_CLK_ENABLE(); + 8002fee: 4b1e ldr r3, [pc, #120] ; (8003068 <_ZL11MX_DMA_Initv+0x80>) + 8002ff0: 6b1b ldr r3, [r3, #48] ; 0x30 + 8002ff2: 4a1d ldr r2, [pc, #116] ; (8003068 <_ZL11MX_DMA_Initv+0x80>) + 8002ff4: f443 1300 orr.w r3, r3, #2097152 ; 0x200000 + 8002ff8: 6313 str r3, [r2, #48] ; 0x30 + 8002ffa: 4b1b ldr r3, [pc, #108] ; (8003068 <_ZL11MX_DMA_Initv+0x80>) + 8002ffc: 6b1b ldr r3, [r3, #48] ; 0x30 + 8002ffe: f403 1300 and.w r3, r3, #2097152 ; 0x200000 + 8003002: 607b str r3, [r7, #4] + 8003004: 687b ldr r3, [r7, #4] + __HAL_RCC_DMA2_CLK_ENABLE(); + 8003006: 4b18 ldr r3, [pc, #96] ; (8003068 <_ZL11MX_DMA_Initv+0x80>) + 8003008: 6b1b ldr r3, [r3, #48] ; 0x30 + 800300a: 4a17 ldr r2, [pc, #92] ; (8003068 <_ZL11MX_DMA_Initv+0x80>) + 800300c: f443 0380 orr.w r3, r3, #4194304 ; 0x400000 + 8003010: 6313 str r3, [r2, #48] ; 0x30 + 8003012: 4b15 ldr r3, [pc, #84] ; (8003068 <_ZL11MX_DMA_Initv+0x80>) + 8003014: 6b1b ldr r3, [r3, #48] ; 0x30 + 8003016: f403 0380 and.w r3, r3, #4194304 ; 0x400000 + 800301a: 603b str r3, [r7, #0] + 800301c: 683b ldr r3, [r7, #0] + + /* DMA interrupt init */ + /* DMA1_Stream1_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(DMA1_Stream1_IRQn, 0, 0); + 800301e: 2200 movs r2, #0 + 8003020: 2100 movs r1, #0 + 8003022: 200c movs r0, #12 + 8003024: f001 fd63 bl 8004aee + HAL_NVIC_EnableIRQ(DMA1_Stream1_IRQn); + 8003028: 200c movs r0, #12 + 800302a: f001 fd7c bl 8004b26 + /* DMA1_Stream3_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(DMA1_Stream3_IRQn, 0, 0); + 800302e: 2200 movs r2, #0 + 8003030: 2100 movs r1, #0 + 8003032: 200e movs r0, #14 + 8003034: f001 fd5b bl 8004aee + HAL_NVIC_EnableIRQ(DMA1_Stream3_IRQn); + 8003038: 200e movs r0, #14 + 800303a: f001 fd74 bl 8004b26 + /* DMA2_Stream1_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(DMA2_Stream1_IRQn, 0, 0); + 800303e: 2200 movs r2, #0 + 8003040: 2100 movs r1, #0 + 8003042: 2039 movs r0, #57 ; 0x39 + 8003044: f001 fd53 bl 8004aee + HAL_NVIC_EnableIRQ(DMA2_Stream1_IRQn); + 8003048: 2039 movs r0, #57 ; 0x39 + 800304a: f001 fd6c bl 8004b26 + /* DMA2_Stream6_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(DMA2_Stream6_IRQn, 0, 0); + 800304e: 2200 movs r2, #0 + 8003050: 2100 movs r1, #0 + 8003052: 2045 movs r0, #69 ; 0x45 + 8003054: f001 fd4b bl 8004aee + HAL_NVIC_EnableIRQ(DMA2_Stream6_IRQn); + 8003058: 2045 movs r0, #69 ; 0x45 + 800305a: f001 fd64 bl 8004b26 - /*-------------------------------------- USART2 Configuration -----------------------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2) - 8001e32: 687b ldr r3, [r7, #4] - 8001e34: 681b ldr r3, [r3, #0] - 8001e36: f003 0380 and.w r3, r3, #128 ; 0x80 - 8001e3a: 2b00 cmp r3, #0 - 8001e3c: d00a beq.n 8001e54 - { - /* Check the parameters */ - assert_param(IS_RCC_USART2CLKSOURCE(PeriphClkInit->Usart2ClockSelection)); +} + 800305e: bf00 nop + 8003060: 3708 adds r7, #8 + 8003062: 46bd mov sp, r7 + 8003064: bd80 pop {r7, pc} + 8003066: bf00 nop + 8003068: 40023800 .word 0x40023800 + +0800306c <_ZL12MX_GPIO_Initv>: +/** + * @brief GPIO Initialization Function + * @param None + * @retval None + */ +static void MX_GPIO_Init(void) { + 800306c: b580 push {r7, lr} + 800306e: b08c sub sp, #48 ; 0x30 + 8003070: af00 add r7, sp, #0 + GPIO_InitTypeDef GPIO_InitStruct = { 0 }; + 8003072: f107 031c add.w r3, r7, #28 + 8003076: 2200 movs r2, #0 + 8003078: 601a str r2, [r3, #0] + 800307a: 605a str r2, [r3, #4] + 800307c: 609a str r2, [r3, #8] + 800307e: 60da str r2, [r3, #12] + 8003080: 611a str r2, [r3, #16] + + /* GPIO Ports Clock Enable */ + __HAL_RCC_GPIOC_CLK_ENABLE(); + 8003082: 4b53 ldr r3, [pc, #332] ; (80031d0 <_ZL12MX_GPIO_Initv+0x164>) + 8003084: 6b1b ldr r3, [r3, #48] ; 0x30 + 8003086: 4a52 ldr r2, [pc, #328] ; (80031d0 <_ZL12MX_GPIO_Initv+0x164>) + 8003088: f043 0304 orr.w r3, r3, #4 + 800308c: 6313 str r3, [r2, #48] ; 0x30 + 800308e: 4b50 ldr r3, [pc, #320] ; (80031d0 <_ZL12MX_GPIO_Initv+0x164>) + 8003090: 6b1b ldr r3, [r3, #48] ; 0x30 + 8003092: f003 0304 and.w r3, r3, #4 + 8003096: 61bb str r3, [r7, #24] + 8003098: 69bb ldr r3, [r7, #24] + __HAL_RCC_GPIOA_CLK_ENABLE(); + 800309a: 4b4d ldr r3, [pc, #308] ; (80031d0 <_ZL12MX_GPIO_Initv+0x164>) + 800309c: 6b1b ldr r3, [r3, #48] ; 0x30 + 800309e: 4a4c ldr r2, [pc, #304] ; (80031d0 <_ZL12MX_GPIO_Initv+0x164>) + 80030a0: f043 0301 orr.w r3, r3, #1 + 80030a4: 6313 str r3, [r2, #48] ; 0x30 + 80030a6: 4b4a ldr r3, [pc, #296] ; (80031d0 <_ZL12MX_GPIO_Initv+0x164>) + 80030a8: 6b1b ldr r3, [r3, #48] ; 0x30 + 80030aa: f003 0301 and.w r3, r3, #1 + 80030ae: 617b str r3, [r7, #20] + 80030b0: 697b ldr r3, [r7, #20] + __HAL_RCC_GPIOF_CLK_ENABLE(); + 80030b2: 4b47 ldr r3, [pc, #284] ; (80031d0 <_ZL12MX_GPIO_Initv+0x164>) + 80030b4: 6b1b ldr r3, [r3, #48] ; 0x30 + 80030b6: 4a46 ldr r2, [pc, #280] ; (80031d0 <_ZL12MX_GPIO_Initv+0x164>) + 80030b8: f043 0320 orr.w r3, r3, #32 + 80030bc: 6313 str r3, [r2, #48] ; 0x30 + 80030be: 4b44 ldr r3, [pc, #272] ; (80031d0 <_ZL12MX_GPIO_Initv+0x164>) + 80030c0: 6b1b ldr r3, [r3, #48] ; 0x30 + 80030c2: f003 0320 and.w r3, r3, #32 + 80030c6: 613b str r3, [r7, #16] + 80030c8: 693b ldr r3, [r7, #16] + __HAL_RCC_GPIOE_CLK_ENABLE(); + 80030ca: 4b41 ldr r3, [pc, #260] ; (80031d0 <_ZL12MX_GPIO_Initv+0x164>) + 80030cc: 6b1b ldr r3, [r3, #48] ; 0x30 + 80030ce: 4a40 ldr r2, [pc, #256] ; (80031d0 <_ZL12MX_GPIO_Initv+0x164>) + 80030d0: f043 0310 orr.w r3, r3, #16 + 80030d4: 6313 str r3, [r2, #48] ; 0x30 + 80030d6: 4b3e ldr r3, [pc, #248] ; (80031d0 <_ZL12MX_GPIO_Initv+0x164>) + 80030d8: 6b1b ldr r3, [r3, #48] ; 0x30 + 80030da: f003 0310 and.w r3, r3, #16 + 80030de: 60fb str r3, [r7, #12] + 80030e0: 68fb ldr r3, [r7, #12] + __HAL_RCC_GPIOD_CLK_ENABLE(); + 80030e2: 4b3b ldr r3, [pc, #236] ; (80031d0 <_ZL12MX_GPIO_Initv+0x164>) + 80030e4: 6b1b ldr r3, [r3, #48] ; 0x30 + 80030e6: 4a3a ldr r2, [pc, #232] ; (80031d0 <_ZL12MX_GPIO_Initv+0x164>) + 80030e8: f043 0308 orr.w r3, r3, #8 + 80030ec: 6313 str r3, [r2, #48] ; 0x30 + 80030ee: 4b38 ldr r3, [pc, #224] ; (80031d0 <_ZL12MX_GPIO_Initv+0x164>) + 80030f0: 6b1b ldr r3, [r3, #48] ; 0x30 + 80030f2: f003 0308 and.w r3, r3, #8 + 80030f6: 60bb str r3, [r7, #8] + 80030f8: 68bb ldr r3, [r7, #8] + __HAL_RCC_GPIOB_CLK_ENABLE(); + 80030fa: 4b35 ldr r3, [pc, #212] ; (80031d0 <_ZL12MX_GPIO_Initv+0x164>) + 80030fc: 6b1b ldr r3, [r3, #48] ; 0x30 + 80030fe: 4a34 ldr r2, [pc, #208] ; (80031d0 <_ZL12MX_GPIO_Initv+0x164>) + 8003100: f043 0302 orr.w r3, r3, #2 + 8003104: 6313 str r3, [r2, #48] ; 0x30 + 8003106: 4b32 ldr r3, [pc, #200] ; (80031d0 <_ZL12MX_GPIO_Initv+0x164>) + 8003108: 6b1b ldr r3, [r3, #48] ; 0x30 + 800310a: f003 0302 and.w r3, r3, #2 + 800310e: 607b str r3, [r7, #4] + 8003110: 687b ldr r3, [r7, #4] + + /*Configure GPIO pin Output Level */ + HAL_GPIO_WritePin(GPIOF, dir1_Pin | sleep2_Pin | sleep1_Pin, + 8003112: 2200 movs r2, #0 + 8003114: f44f 4160 mov.w r1, #57344 ; 0xe000 + 8003118: 482e ldr r0, [pc, #184] ; (80031d4 <_ZL12MX_GPIO_Initv+0x168>) + 800311a: f002 fa61 bl 80055e0 + GPIO_PIN_RESET); + + /*Configure GPIO pin Output Level */ + HAL_GPIO_WritePin(GPIOB, GPIO_PIN_8, GPIO_PIN_RESET); + 800311e: 2200 movs r2, #0 + 8003120: f44f 7180 mov.w r1, #256 ; 0x100 + 8003124: 482c ldr r0, [pc, #176] ; (80031d8 <_ZL12MX_GPIO_Initv+0x16c>) + 8003126: f002 fa5b bl 80055e0 + + /*Configure GPIO pin : PC0 */ + GPIO_InitStruct.Pin = GPIO_PIN_0; + 800312a: 2301 movs r3, #1 + 800312c: 61fb str r3, [r7, #28] + GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; + 800312e: 2303 movs r3, #3 + 8003130: 623b str r3, [r7, #32] + GPIO_InitStruct.Pull = GPIO_NOPULL; + 8003132: 2300 movs r3, #0 + 8003134: 627b str r3, [r7, #36] ; 0x24 + HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); + 8003136: f107 031c add.w r3, r7, #28 + 800313a: 4619 mov r1, r3 + 800313c: 4827 ldr r0, [pc, #156] ; (80031dc <_ZL12MX_GPIO_Initv+0x170>) + 800313e: f002 f8a5 bl 800528c + + /*Configure GPIO pin : current1_Pin */ + GPIO_InitStruct.Pin = current1_Pin; + 8003142: 2308 movs r3, #8 + 8003144: 61fb str r3, [r7, #28] + GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; + 8003146: 2303 movs r3, #3 + 8003148: 623b str r3, [r7, #32] + GPIO_InitStruct.Pull = GPIO_NOPULL; + 800314a: 2300 movs r3, #0 + 800314c: 627b str r3, [r7, #36] ; 0x24 + HAL_GPIO_Init(current1_GPIO_Port, &GPIO_InitStruct); + 800314e: f107 031c add.w r3, r7, #28 + 8003152: 4619 mov r1, r3 + 8003154: 4822 ldr r0, [pc, #136] ; (80031e0 <_ZL12MX_GPIO_Initv+0x174>) + 8003156: f002 f899 bl 800528c + + /*Configure GPIO pin : fault2_Pin */ + GPIO_InitStruct.Pin = fault2_Pin; + 800315a: 2340 movs r3, #64 ; 0x40 + 800315c: 61fb str r3, [r7, #28] + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + 800315e: 2300 movs r3, #0 + 8003160: 623b str r3, [r7, #32] + GPIO_InitStruct.Pull = GPIO_NOPULL; + 8003162: 2300 movs r3, #0 + 8003164: 627b str r3, [r7, #36] ; 0x24 + HAL_GPIO_Init(fault2_GPIO_Port, &GPIO_InitStruct); + 8003166: f107 031c add.w r3, r7, #28 + 800316a: 4619 mov r1, r3 + 800316c: 481c ldr r0, [pc, #112] ; (80031e0 <_ZL12MX_GPIO_Initv+0x174>) + 800316e: f002 f88d bl 800528c + + /*Configure GPIO pins : dir1_Pin sleep2_Pin sleep1_Pin */ + GPIO_InitStruct.Pin = dir1_Pin | sleep2_Pin | sleep1_Pin; + 8003172: f44f 4360 mov.w r3, #57344 ; 0xe000 + 8003176: 61fb str r3, [r7, #28] + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + 8003178: 2301 movs r3, #1 + 800317a: 623b str r3, [r7, #32] + GPIO_InitStruct.Pull = GPIO_NOPULL; + 800317c: 2300 movs r3, #0 + 800317e: 627b str r3, [r7, #36] ; 0x24 + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + 8003180: 2300 movs r3, #0 + 8003182: 62bb str r3, [r7, #40] ; 0x28 + HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); + 8003184: f107 031c add.w r3, r7, #28 + 8003188: 4619 mov r1, r3 + 800318a: 4812 ldr r0, [pc, #72] ; (80031d4 <_ZL12MX_GPIO_Initv+0x168>) + 800318c: f002 f87e bl 800528c + + /*Configure GPIO pin : fault1_Pin */ + GPIO_InitStruct.Pin = fault1_Pin; + 8003190: f44f 7300 mov.w r3, #512 ; 0x200 + 8003194: 61fb str r3, [r7, #28] + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + 8003196: 2300 movs r3, #0 + 8003198: 623b str r3, [r7, #32] + GPIO_InitStruct.Pull = GPIO_NOPULL; + 800319a: 2300 movs r3, #0 + 800319c: 627b str r3, [r7, #36] ; 0x24 + HAL_GPIO_Init(fault1_GPIO_Port, &GPIO_InitStruct); + 800319e: f107 031c add.w r3, r7, #28 + 80031a2: 4619 mov r1, r3 + 80031a4: 480f ldr r0, [pc, #60] ; (80031e4 <_ZL12MX_GPIO_Initv+0x178>) + 80031a6: f002 f871 bl 800528c + + /*Configure GPIO pin : PB8 */ + GPIO_InitStruct.Pin = GPIO_PIN_8; + 80031aa: f44f 7380 mov.w r3, #256 ; 0x100 + 80031ae: 61fb str r3, [r7, #28] + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + 80031b0: 2301 movs r3, #1 + 80031b2: 623b str r3, [r7, #32] + GPIO_InitStruct.Pull = GPIO_NOPULL; + 80031b4: 2300 movs r3, #0 + 80031b6: 627b str r3, [r7, #36] ; 0x24 + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + 80031b8: 2300 movs r3, #0 + 80031ba: 62bb str r3, [r7, #40] ; 0x28 + HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 80031bc: f107 031c add.w r3, r7, #28 + 80031c0: 4619 mov r1, r3 + 80031c2: 4805 ldr r0, [pc, #20] ; (80031d8 <_ZL12MX_GPIO_Initv+0x16c>) + 80031c4: f002 f862 bl 800528c - /* Configure the USART2 clock source */ - __HAL_RCC_USART2_CONFIG(PeriphClkInit->Usart2ClockSelection); - 8001e3e: 4b73 ldr r3, [pc, #460] ; (800200c ) - 8001e40: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 8001e44: f023 020c bic.w r2, r3, #12 - 8001e48: 687b ldr r3, [r7, #4] - 8001e4a: 6c9b ldr r3, [r3, #72] ; 0x48 - 8001e4c: 496f ldr r1, [pc, #444] ; (800200c ) - 8001e4e: 4313 orrs r3, r2 - 8001e50: f8c1 3090 str.w r3, [r1, #144] ; 0x90 - } +} + 80031c8: bf00 nop + 80031ca: 3730 adds r7, #48 ; 0x30 + 80031cc: 46bd mov sp, r7 + 80031ce: bd80 pop {r7, pc} + 80031d0: 40023800 .word 0x40023800 + 80031d4: 40021400 .word 0x40021400 + 80031d8: 40020400 .word 0x40020400 + 80031dc: 40020800 .word 0x40020800 + 80031e0: 40020000 .word 0x40020000 + 80031e4: 40021000 .word 0x40021000 + +080031e8 : - /*-------------------------------------- USART3 Configuration -----------------------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART3) == RCC_PERIPHCLK_USART3) - 8001e54: 687b ldr r3, [r7, #4] - 8001e56: 681b ldr r3, [r3, #0] - 8001e58: f403 7380 and.w r3, r3, #256 ; 0x100 - 8001e5c: 2b00 cmp r3, #0 - 8001e5e: d00a beq.n 8001e76 - { - /* Check the parameters */ - assert_param(IS_RCC_USART3CLKSOURCE(PeriphClkInit->Usart3ClockSelection)); +/* USER CODE BEGIN 4 */ +void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) { + 80031e8: b580 push {r7, lr} + 80031ea: b082 sub sp, #8 + 80031ec: af00 add r7, sp, #0 + 80031ee: 6078 str r0, [r7, #4] + if (htim->Instance == TIM3) { + 80031f0: 687b ldr r3, [r7, #4] + 80031f2: 681b ldr r3, [r3, #0] + 80031f4: 4a0e ldr r2, [pc, #56] ; (8003230 ) + 80031f6: 4293 cmp r3, r2 + 80031f8: d116 bne.n 8003228 + velocity_l = left_encoder.GetLinearVelocity(); + 80031fa: 480e ldr r0, [pc, #56] ; (8003234 ) + 80031fc: f7fd fa1e bl 800063c <_ZN7Encoder17GetLinearVelocityEv> + 8003200: eef0 7a40 vmov.f32 s15, s0 + 8003204: 4b0c ldr r3, [pc, #48] ; (8003238 ) + 8003206: edc3 7a00 vstr s15, [r3] + velocity_r = right_encoder.GetLinearVelocity(); + 800320a: 480c ldr r0, [pc, #48] ; (800323c ) + 800320c: f7fd fa16 bl 800063c <_ZN7Encoder17GetLinearVelocityEv> + 8003210: eef0 7a40 vmov.f32 s15, s0 + 8003214: 4b0a ldr r3, [pc, #40] ; (8003240 ) + 8003216: edc3 7a00 vstr s15, [r3] + +// odom.OdometryUpdateMessage(); +// odometry = odom.odometry_; +// odom_pub.publish(&odometry); + + chatter.publish(&str_msg); + 800321a: 490a ldr r1, [pc, #40] ; (8003244 ) + 800321c: 480a ldr r0, [pc, #40] ; (8003248 ) + 800321e: f7fe fa12 bl 8001646 <_ZN3ros9Publisher7publishEPKNS_3MsgE> + nh.spinOnce(); + 8003222: 480a ldr r0, [pc, #40] ; (800324c ) + 8003224: f000 f95f bl 80034e6 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv> - /* Configure the USART3 clock source */ - __HAL_RCC_USART3_CONFIG(PeriphClkInit->Usart3ClockSelection); - 8001e60: 4b6a ldr r3, [pc, #424] ; (800200c ) - 8001e62: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 8001e66: f023 0230 bic.w r2, r3, #48 ; 0x30 - 8001e6a: 687b ldr r3, [r7, #4] - 8001e6c: 6cdb ldr r3, [r3, #76] ; 0x4c - 8001e6e: 4967 ldr r1, [pc, #412] ; (800200c ) - 8001e70: 4313 orrs r3, r2 - 8001e72: f8c1 3090 str.w r3, [r1, #144] ; 0x90 - } + } +} + 8003228: bf00 nop + 800322a: 3708 adds r7, #8 + 800322c: 46bd mov sp, r7 + 800322e: bd80 pop {r7, pc} + 8003230: 40000400 .word 0x40000400 + 8003234: 20000424 .word 0x20000424 + 8003238: 2000062c .word 0x2000062c + 800323c: 20000440 .word 0x20000440 + 8003240: 20000630 .word 0x20000630 + 8003244: 20000cf0 .word 0x20000cf0 + 8003248: 20000cf8 .word 0x20000cf8 + 800324c: 20000634 .word 0x20000634 + +08003250 : +void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) { + 8003250: b580 push {r7, lr} + 8003252: b082 sub sp, #8 + 8003254: af00 add r7, sp, #0 + 8003256: 6078 str r0, [r7, #4] + nh.getHardware()->flush(); + 8003258: 4805 ldr r0, [pc, #20] ; (8003270 ) + 800325a: f000 fb20 bl 800389e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE11getHardwareEv> + 800325e: 4603 mov r3, r0 + 8003260: 4618 mov r0, r3 + 8003262: f7fe fa87 bl 8001774 <_ZN13STM32Hardware5flushEv> +} + 8003266: bf00 nop + 8003268: 3708 adds r7, #8 + 800326a: 46bd mov sp, r7 + 800326c: bd80 pop {r7, pc} + 800326e: bf00 nop + 8003270: 20000634 .word 0x20000634 - /*-------------------------------------- UART4 Configuration -----------------------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART4) == RCC_PERIPHCLK_UART4) - 8001e76: 687b ldr r3, [r7, #4] - 8001e78: 681b ldr r3, [r3, #0] - 8001e7a: f403 7300 and.w r3, r3, #512 ; 0x200 - 8001e7e: 2b00 cmp r3, #0 - 8001e80: d00a beq.n 8001e98 - { - /* Check the parameters */ - assert_param(IS_RCC_UART4CLKSOURCE(PeriphClkInit->Uart4ClockSelection)); +08003274 : - /* Configure the UART4 clock source */ - __HAL_RCC_UART4_CONFIG(PeriphClkInit->Uart4ClockSelection); - 8001e82: 4b62 ldr r3, [pc, #392] ; (800200c ) - 8001e84: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 8001e88: f023 02c0 bic.w r2, r3, #192 ; 0xc0 - 8001e8c: 687b ldr r3, [r7, #4] - 8001e8e: 6d1b ldr r3, [r3, #80] ; 0x50 - 8001e90: 495e ldr r1, [pc, #376] ; (800200c ) - 8001e92: 4313 orrs r3, r2 - 8001e94: f8c1 3090 str.w r3, [r1, #144] ; 0x90 - } +void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) { + 8003274: b580 push {r7, lr} + 8003276: b082 sub sp, #8 + 8003278: af00 add r7, sp, #0 + 800327a: 6078 str r0, [r7, #4] + nh.getHardware()->reset_rbuf(); + 800327c: 4805 ldr r0, [pc, #20] ; (8003294 ) + 800327e: f000 fb0e bl 800389e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE11getHardwareEv> + 8003282: 4603 mov r3, r0 + 8003284: 4618 mov r0, r3 + 8003286: f7fe fa38 bl 80016fa <_ZN13STM32Hardware10reset_rbufEv> +} + 800328a: bf00 nop + 800328c: 3708 adds r7, #8 + 800328e: 46bd mov sp, r7 + 8003290: bd80 pop {r7, pc} + 8003292: bf00 nop + 8003294: 20000634 .word 0x20000634 - /*-------------------------------------- UART5 Configuration -----------------------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART5) == RCC_PERIPHCLK_UART5) - 8001e98: 687b ldr r3, [r7, #4] - 8001e9a: 681b ldr r3, [r3, #0] - 8001e9c: f403 6380 and.w r3, r3, #1024 ; 0x400 - 8001ea0: 2b00 cmp r3, #0 - 8001ea2: d00a beq.n 8001eba - { - /* Check the parameters */ - assert_param(IS_RCC_UART5CLKSOURCE(PeriphClkInit->Uart5ClockSelection)); +08003298 : - /* Configure the UART5 clock source */ - __HAL_RCC_UART5_CONFIG(PeriphClkInit->Uart5ClockSelection); - 8001ea4: 4b59 ldr r3, [pc, #356] ; (800200c ) - 8001ea6: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 8001eaa: f423 7240 bic.w r2, r3, #768 ; 0x300 - 8001eae: 687b ldr r3, [r7, #4] - 8001eb0: 6d5b ldr r3, [r3, #84] ; 0x54 - 8001eb2: 4956 ldr r1, [pc, #344] ; (800200c ) - 8001eb4: 4313 orrs r3, r2 - 8001eb6: f8c1 3090 str.w r3, [r1, #144] ; 0x90 - } +/** + * @brief This function is executed in case of error occurrence. + * @retval None + */ +void Error_Handler(void) { + 8003298: b480 push {r7} + 800329a: af00 add r7, sp, #0 + /* USER CODE BEGIN Error_Handler_Debug */ + /* User can add his own implementation to report the HAL error return state */ - /*-------------------------------------- USART6 Configuration -----------------------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART6) == RCC_PERIPHCLK_USART6) - 8001eba: 687b ldr r3, [r7, #4] - 8001ebc: 681b ldr r3, [r3, #0] - 8001ebe: f403 6300 and.w r3, r3, #2048 ; 0x800 - 8001ec2: 2b00 cmp r3, #0 - 8001ec4: d00a beq.n 8001edc - { - /* Check the parameters */ - assert_param(IS_RCC_USART6CLKSOURCE(PeriphClkInit->Usart6ClockSelection)); + /* USER CODE END Error_Handler_Debug */ +} + 800329c: bf00 nop + 800329e: 46bd mov sp, r7 + 80032a0: f85d 7b04 ldr.w r7, [sp], #4 + 80032a4: 4770 bx lr - /* Configure the USART6 clock source */ - __HAL_RCC_USART6_CONFIG(PeriphClkInit->Usart6ClockSelection); - 8001ec6: 4b51 ldr r3, [pc, #324] ; (800200c ) - 8001ec8: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 8001ecc: f423 6240 bic.w r2, r3, #3072 ; 0xc00 - 8001ed0: 687b ldr r3, [r7, #4] - 8001ed2: 6d9b ldr r3, [r3, #88] ; 0x58 - 8001ed4: 494d ldr r1, [pc, #308] ; (800200c ) - 8001ed6: 4313 orrs r3, r2 - 8001ed8: f8c1 3090 str.w r3, [r1, #144] ; 0x90 - } +080032a6 <_ZN3ros3Msg8varToArrIPhmEEvT_T0_>: - /*-------------------------------------- UART7 Configuration -----------------------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART7) == RCC_PERIPHCLK_UART7) - 8001edc: 687b ldr r3, [r7, #4] - 8001ede: 681b ldr r3, [r3, #0] - 8001ee0: f403 5380 and.w r3, r3, #4096 ; 0x1000 - 8001ee4: 2b00 cmp r3, #0 - 8001ee6: d00a beq.n 8001efe + // Copy data from variable into a byte array + template + static void varToArr(A arr, const V var) + 80032a6: b480 push {r7} + 80032a8: b085 sub sp, #20 + 80032aa: af00 add r7, sp, #0 + 80032ac: 6078 str r0, [r7, #4] + 80032ae: 6039 str r1, [r7, #0] { - /* Check the parameters */ - assert_param(IS_RCC_UART7CLKSOURCE(PeriphClkInit->Uart7ClockSelection)); - - /* Configure the UART7 clock source */ - __HAL_RCC_UART7_CONFIG(PeriphClkInit->Uart7ClockSelection); - 8001ee8: 4b48 ldr r3, [pc, #288] ; (800200c ) - 8001eea: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 8001eee: f423 5240 bic.w r2, r3, #12288 ; 0x3000 - 8001ef2: 687b ldr r3, [r7, #4] - 8001ef4: 6ddb ldr r3, [r3, #92] ; 0x5c - 8001ef6: 4945 ldr r1, [pc, #276] ; (800200c ) - 8001ef8: 4313 orrs r3, r2 - 8001efa: f8c1 3090 str.w r3, [r1, #144] ; 0x90 + for (size_t i = 0; i < sizeof(V); i++) + 80032b0: 2300 movs r3, #0 + 80032b2: 60fb str r3, [r7, #12] + 80032b4: 68fb ldr r3, [r7, #12] + 80032b6: 2b03 cmp r3, #3 + 80032b8: d80d bhi.n 80032d6 <_ZN3ros3Msg8varToArrIPhmEEvT_T0_+0x30> + arr[i] = (var >> (8 * i)); + 80032ba: 68fb ldr r3, [r7, #12] + 80032bc: 00db lsls r3, r3, #3 + 80032be: 683a ldr r2, [r7, #0] + 80032c0: fa22 f103 lsr.w r1, r2, r3 + 80032c4: 687a ldr r2, [r7, #4] + 80032c6: 68fb ldr r3, [r7, #12] + 80032c8: 4413 add r3, r2 + 80032ca: b2ca uxtb r2, r1 + 80032cc: 701a strb r2, [r3, #0] + for (size_t i = 0; i < sizeof(V); i++) + 80032ce: 68fb ldr r3, [r7, #12] + 80032d0: 3301 adds r3, #1 + 80032d2: 60fb str r3, [r7, #12] + 80032d4: e7ee b.n 80032b4 <_ZN3ros3Msg8varToArrIPhmEEvT_T0_+0xe> } + 80032d6: bf00 nop + 80032d8: 3714 adds r7, #20 + 80032da: 46bd mov sp, r7 + 80032dc: f85d 7b04 ldr.w r7, [sp], #4 + 80032e0: 4770 bx lr - /*-------------------------------------- UART8 Configuration -----------------------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART8) == RCC_PERIPHCLK_UART8) - 8001efe: 687b ldr r3, [r7, #4] - 8001f00: 681b ldr r3, [r3, #0] - 8001f02: f403 5300 and.w r3, r3, #8192 ; 0x2000 - 8001f06: 2b00 cmp r3, #0 - 8001f08: d00a beq.n 8001f20 - { - /* Check the parameters */ - assert_param(IS_RCC_UART8CLKSOURCE(PeriphClkInit->Uart8ClockSelection)); - - /* Configure the UART8 clock source */ - __HAL_RCC_UART8_CONFIG(PeriphClkInit->Uart8ClockSelection); - 8001f0a: 4b40 ldr r3, [pc, #256] ; (800200c ) - 8001f0c: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 8001f10: f423 4240 bic.w r2, r3, #49152 ; 0xc000 - 8001f14: 687b ldr r3, [r7, #4] - 8001f16: 6e1b ldr r3, [r3, #96] ; 0x60 - 8001f18: 493c ldr r1, [pc, #240] ; (800200c ) - 8001f1a: 4313 orrs r3, r2 - 8001f1c: f8c1 3090 str.w r3, [r1, #144] ; 0x90 - } +080032e2 <_ZN3ros3Msg8arrToVarImPhEEvRT_T0_>: - /*--------------------------------------- CEC Configuration -----------------------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CEC) == RCC_PERIPHCLK_CEC) - 8001f20: 687b ldr r3, [r7, #4] - 8001f22: 681b ldr r3, [r3, #0] - 8001f24: f403 0380 and.w r3, r3, #4194304 ; 0x400000 - 8001f28: 2b00 cmp r3, #0 - 8001f2a: d00a beq.n 8001f42 + // Copy data from a byte array into variable + template + static void arrToVar(V& var, const A arr) + 80032e2: b480 push {r7} + 80032e4: b085 sub sp, #20 + 80032e6: af00 add r7, sp, #0 + 80032e8: 6078 str r0, [r7, #4] + 80032ea: 6039 str r1, [r7, #0] { - /* Check the parameters */ - assert_param(IS_RCC_CECCLKSOURCE(PeriphClkInit->CecClockSelection)); - - /* Configure the CEC clock source */ - __HAL_RCC_CEC_CONFIG(PeriphClkInit->CecClockSelection); - 8001f2c: 4b37 ldr r3, [pc, #220] ; (800200c ) - 8001f2e: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 8001f32: f023 6280 bic.w r2, r3, #67108864 ; 0x4000000 - 8001f36: 687b ldr r3, [r7, #4] - 8001f38: 6f9b ldr r3, [r3, #120] ; 0x78 - 8001f3a: 4934 ldr r1, [pc, #208] ; (800200c ) - 8001f3c: 4313 orrs r3, r2 - 8001f3e: f8c1 3090 str.w r3, [r1, #144] ; 0x90 + var = 0; + 80032ec: 687b ldr r3, [r7, #4] + 80032ee: 2200 movs r2, #0 + 80032f0: 601a str r2, [r3, #0] + for (size_t i = 0; i < sizeof(V); i++) + 80032f2: 2300 movs r3, #0 + 80032f4: 60fb str r3, [r7, #12] + 80032f6: 68fb ldr r3, [r7, #12] + 80032f8: 2b03 cmp r3, #3 + 80032fa: d811 bhi.n 8003320 <_ZN3ros3Msg8arrToVarImPhEEvRT_T0_+0x3e> + var |= (arr[i] << (8 * i)); + 80032fc: 687b ldr r3, [r7, #4] + 80032fe: 681b ldr r3, [r3, #0] + 8003300: 6839 ldr r1, [r7, #0] + 8003302: 68fa ldr r2, [r7, #12] + 8003304: 440a add r2, r1 + 8003306: 7812 ldrb r2, [r2, #0] + 8003308: 4611 mov r1, r2 + 800330a: 68fa ldr r2, [r7, #12] + 800330c: 00d2 lsls r2, r2, #3 + 800330e: fa01 f202 lsl.w r2, r1, r2 + 8003312: 431a orrs r2, r3 + 8003314: 687b ldr r3, [r7, #4] + 8003316: 601a str r2, [r3, #0] + for (size_t i = 0; i < sizeof(V); i++) + 8003318: 68fb ldr r3, [r7, #12] + 800331a: 3301 adds r3, #1 + 800331c: 60fb str r3, [r7, #12] + 800331e: e7ea b.n 80032f6 <_ZN3ros3Msg8arrToVarImPhEEvRT_T0_+0x14> } + 8003320: bf00 nop + 8003322: 3714 adds r7, #20 + 8003324: 46bd mov sp, r7 + 8003326: f85d 7b04 ldr.w r7, [sp], #4 + 800332a: 4770 bx lr - /*-------------------------------------- CK48 Configuration -----------------------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CLK48) == RCC_PERIPHCLK_CLK48) - 8001f42: 687b ldr r3, [r7, #4] - 8001f44: 681b ldr r3, [r3, #0] - 8001f46: f403 1300 and.w r3, r3, #2097152 ; 0x200000 - 8001f4a: 2b00 cmp r3, #0 - 8001f4c: d011 beq.n 8001f72 - { - /* Check the parameters */ - assert_param(IS_RCC_CLK48SOURCE(PeriphClkInit->Clk48ClockSelection)); +0800332c <_ZN3ros15NodeHandleBase_C1Ev>: +#include "ros/msg.h" - /* Configure the CLK48 source */ - __HAL_RCC_CLK48_CONFIG(PeriphClkInit->Clk48ClockSelection); - 8001f4e: 4b2f ldr r3, [pc, #188] ; (800200c ) - 8001f50: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 8001f54: f023 6200 bic.w r2, r3, #134217728 ; 0x8000000 - 8001f58: 687b ldr r3, [r7, #4] - 8001f5a: 6fdb ldr r3, [r3, #124] ; 0x7c - 8001f5c: 492b ldr r1, [pc, #172] ; (800200c ) - 8001f5e: 4313 orrs r3, r2 - 8001f60: f8c1 3090 str.w r3, [r1, #144] ; 0x90 +namespace ros +{ - /* Enable the PLLSAI when it's used as clock source for CK48 */ - if(PeriphClkInit->Clk48ClockSelection == RCC_CLK48SOURCE_PLLSAIP) - 8001f64: 687b ldr r3, [r7, #4] - 8001f66: 6fdb ldr r3, [r3, #124] ; 0x7c - 8001f68: f1b3 6f00 cmp.w r3, #134217728 ; 0x8000000 - 8001f6c: d101 bne.n 8001f72 - { - pllsaiused = 1; - 8001f6e: 2301 movs r3, #1 - 8001f70: 61bb str r3, [r7, #24] - } - } +class NodeHandleBase_ + 800332c: b480 push {r7} + 800332e: b083 sub sp, #12 + 8003330: af00 add r7, sp, #0 + 8003332: 6078 str r0, [r7, #4] + 8003334: 4a04 ldr r2, [pc, #16] ; (8003348 <_ZN3ros15NodeHandleBase_C1Ev+0x1c>) + 8003336: 687b ldr r3, [r7, #4] + 8003338: 601a str r2, [r3, #0] + 800333a: 687b ldr r3, [r7, #4] + 800333c: 4618 mov r0, r3 + 800333e: 370c adds r7, #12 + 8003340: 46bd mov sp, r7 + 8003342: f85d 7b04 ldr.w r7, [sp], #4 + 8003346: 4770 bx lr + 8003348: 0800a58c .word 0x0800a58c + +0800334c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev>: - /*-------------------------------------- LTDC Configuration -----------------------------------*/ -#if defined(STM32F746xx) || defined(STM32F756xx) || defined (STM32F767xx) || defined (STM32F769xx) || defined (STM32F777xx) || defined (STM32F779xx) || defined (STM32F750xx) - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LTDC) == RCC_PERIPHCLK_LTDC) - 8001f72: 687b ldr r3, [r7, #4] - 8001f74: 681b ldr r3, [r3, #0] - 8001f76: f003 0308 and.w r3, r3, #8 - 8001f7a: 2b00 cmp r3, #0 - 8001f7c: d001 beq.n 8001f82 + /* + * Setup Functions + */ +public: + NodeHandle_() : configured_(false) + 800334c: b580 push {r7, lr} + 800334e: b086 sub sp, #24 + 8003350: af00 add r7, sp, #0 + 8003352: 6078 str r0, [r7, #4] + 8003354: 687b ldr r3, [r7, #4] + 8003356: 4618 mov r0, r3 + 8003358: f7ff ffe8 bl 800332c <_ZN3ros15NodeHandleBase_C1Ev> + 800335c: 4a3a ldr r2, [pc, #232] ; (8003448 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev+0xfc>) + 800335e: 687b ldr r3, [r7, #4] + 8003360: 601a str r2, [r3, #0] + 8003362: 687b ldr r3, [r7, #4] + 8003364: 3304 adds r3, #4 + 8003366: 4618 mov r0, r3 + 8003368: f7fe f9a0 bl 80016ac <_ZN13STM32HardwareC1Ev> + 800336c: 687b ldr r3, [r7, #4] + 800336e: 2200 movs r2, #0 + 8003370: f883 2680 strb.w r2, [r3, #1664] ; 0x680 + 8003374: 687b ldr r3, [r7, #4] + 8003376: f203 6394 addw r3, r3, #1684 ; 0x694 + 800337a: 4618 mov r0, r3 + 800337c: f7fd fe8a bl 8001094 <_ZN14rosserial_msgs20RequestParamResponseC1Ev> { - pllsaiused = 1; - 8001f7e: 2301 movs r3, #1 - 8001f80: 61bb str r3, [r7, #24] - } -#endif /* STM32F746xx || STM32F756xx || STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx || STM32F750xx */ - /*-------------------------------------- LPTIM1 Configuration -----------------------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM1) == RCC_PERIPHCLK_LPTIM1) - 8001f82: 687b ldr r3, [r7, #4] - 8001f84: 681b ldr r3, [r3, #0] - 8001f86: f403 2380 and.w r3, r3, #262144 ; 0x40000 - 8001f8a: 2b00 cmp r3, #0 - 8001f8c: d00a beq.n 8001fa4 - { - /* Check the parameters */ - assert_param(IS_RCC_LPTIM1CLK(PeriphClkInit->Lptim1ClockSelection)); + for (unsigned int i = 0; i < MAX_PUBLISHERS; i++) + 8003380: 2300 movs r3, #0 + 8003382: 617b str r3, [r7, #20] + 8003384: 697b ldr r3, [r7, #20] + 8003386: 2b18 cmp r3, #24 + 8003388: d80b bhi.n 80033a2 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev+0x56> + publishers[i] = 0; + 800338a: 687a ldr r2, [r7, #4] + 800338c: 697b ldr r3, [r7, #20] + 800338e: f503 73b4 add.w r3, r3, #360 ; 0x168 + 8003392: 009b lsls r3, r3, #2 + 8003394: 4413 add r3, r2 + 8003396: 2200 movs r2, #0 + 8003398: 605a str r2, [r3, #4] + for (unsigned int i = 0; i < MAX_PUBLISHERS; i++) + 800339a: 697b ldr r3, [r7, #20] + 800339c: 3301 adds r3, #1 + 800339e: 617b str r3, [r7, #20] + 80033a0: e7f0 b.n 8003384 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev+0x38> - /* Configure the LTPIM1 clock source */ - __HAL_RCC_LPTIM1_CONFIG(PeriphClkInit->Lptim1ClockSelection); - 8001f8e: 4b1f ldr r3, [pc, #124] ; (800200c ) - 8001f90: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 8001f94: f023 7240 bic.w r2, r3, #50331648 ; 0x3000000 - 8001f98: 687b ldr r3, [r7, #4] - 8001f9a: 6f5b ldr r3, [r3, #116] ; 0x74 - 8001f9c: 491b ldr r1, [pc, #108] ; (800200c ) - 8001f9e: 4313 orrs r3, r2 - 8001fa0: f8c1 3090 str.w r3, [r1, #144] ; 0x90 - } + for (unsigned int i = 0; i < MAX_SUBSCRIBERS; i++) + 80033a2: 2300 movs r3, #0 + 80033a4: 613b str r3, [r7, #16] + 80033a6: 693b ldr r3, [r7, #16] + 80033a8: 2b18 cmp r3, #24 + 80033aa: d80a bhi.n 80033c2 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev+0x76> + subscribers[i] = 0; + 80033ac: 687b ldr r3, [r7, #4] + 80033ae: 693a ldr r2, [r7, #16] + 80033b0: f502 72c1 add.w r2, r2, #386 ; 0x182 + 80033b4: 2100 movs r1, #0 + 80033b6: f843 1022 str.w r1, [r3, r2, lsl #2] + for (unsigned int i = 0; i < MAX_SUBSCRIBERS; i++) + 80033ba: 693b ldr r3, [r7, #16] + 80033bc: 3301 adds r3, #1 + 80033be: 613b str r3, [r7, #16] + 80033c0: e7f1 b.n 80033a6 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev+0x5a> - /*------------------------------------- SDMMC1 Configuration ------------------------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SDMMC1) == RCC_PERIPHCLK_SDMMC1) - 8001fa4: 687b ldr r3, [r7, #4] - 8001fa6: 681b ldr r3, [r3, #0] - 8001fa8: f403 0300 and.w r3, r3, #8388608 ; 0x800000 - 8001fac: 2b00 cmp r3, #0 - 8001fae: d00b beq.n 8001fc8 - { - /* Check the parameters */ - assert_param(IS_RCC_SDMMC1CLKSOURCE(PeriphClkInit->Sdmmc1ClockSelection)); + for (unsigned int i = 0; i < INPUT_SIZE; i++) + 80033c2: 2300 movs r3, #0 + 80033c4: 60fb str r3, [r7, #12] + 80033c6: 68fb ldr r3, [r7, #12] + 80033c8: f5b3 7f00 cmp.w r3, #512 ; 0x200 + 80033cc: d20a bcs.n 80033e4 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev+0x98> + message_in[i] = 0; + 80033ce: 687a ldr r2, [r7, #4] + 80033d0: 68fb ldr r3, [r7, #12] + 80033d2: 4413 add r3, r2 + 80033d4: f503 73d2 add.w r3, r3, #420 ; 0x1a4 + 80033d8: 2200 movs r2, #0 + 80033da: 701a strb r2, [r3, #0] + for (unsigned int i = 0; i < INPUT_SIZE; i++) + 80033dc: 68fb ldr r3, [r7, #12] + 80033de: 3301 adds r3, #1 + 80033e0: 60fb str r3, [r7, #12] + 80033e2: e7f0 b.n 80033c6 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev+0x7a> - /* Configure the SDMMC1 clock source */ - __HAL_RCC_SDMMC1_CONFIG(PeriphClkInit->Sdmmc1ClockSelection); - 8001fb0: 4b16 ldr r3, [pc, #88] ; (800200c ) - 8001fb2: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 8001fb6: f023 5280 bic.w r2, r3, #268435456 ; 0x10000000 - 8001fba: 687b ldr r3, [r7, #4] - 8001fbc: f8d3 3080 ldr.w r3, [r3, #128] ; 0x80 - 8001fc0: 4912 ldr r1, [pc, #72] ; (800200c ) - 8001fc2: 4313 orrs r3, r2 - 8001fc4: f8c1 3090 str.w r3, [r1, #144] ; 0x90 - } + for (unsigned int i = 0; i < OUTPUT_SIZE; i++) + 80033e4: 2300 movs r3, #0 + 80033e6: 60bb str r3, [r7, #8] + 80033e8: 68bb ldr r3, [r7, #8] + 80033ea: f5b3 7f00 cmp.w r3, #512 ; 0x200 + 80033ee: d20a bcs.n 8003406 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev+0xba> + message_out[i] = 0; + 80033f0: 687a ldr r2, [r7, #4] + 80033f2: 68bb ldr r3, [r7, #8] + 80033f4: 4413 add r3, r2 + 80033f6: f503 7369 add.w r3, r3, #932 ; 0x3a4 + 80033fa: 2200 movs r2, #0 + 80033fc: 701a strb r2, [r3, #0] + for (unsigned int i = 0; i < OUTPUT_SIZE; i++) + 80033fe: 68bb ldr r3, [r7, #8] + 8003400: 3301 adds r3, #1 + 8003402: 60bb str r3, [r7, #8] + 8003404: e7f0 b.n 80033e8 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev+0x9c> -#if defined (STM32F765xx) || defined (STM32F767xx) || defined (STM32F769xx) || defined (STM32F777xx) || defined (STM32F779xx) - /*------------------------------------- SDMMC2 Configuration ------------------------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SDMMC2) == RCC_PERIPHCLK_SDMMC2) - 8001fc8: 687b ldr r3, [r7, #4] - 8001fca: 681b ldr r3, [r3, #0] - 8001fcc: f003 6380 and.w r3, r3, #67108864 ; 0x4000000 - 8001fd0: 2b00 cmp r3, #0 - 8001fd2: d00b beq.n 8001fec - { - /* Check the parameters */ - assert_param(IS_RCC_SDMMC2CLKSOURCE(PeriphClkInit->Sdmmc2ClockSelection)); + req_param_resp.ints_length = 0; + 8003406: 687b ldr r3, [r7, #4] + 8003408: 2200 movs r2, #0 + 800340a: f8c3 2698 str.w r2, [r3, #1688] ; 0x698 + req_param_resp.ints = NULL; + 800340e: 687b ldr r3, [r7, #4] + 8003410: 2200 movs r2, #0 + 8003412: f8c3 26a0 str.w r2, [r3, #1696] ; 0x6a0 + req_param_resp.floats_length = 0; + 8003416: 687b ldr r3, [r7, #4] + 8003418: 2200 movs r2, #0 + 800341a: f8c3 26a4 str.w r2, [r3, #1700] ; 0x6a4 + req_param_resp.floats = NULL; + 800341e: 687b ldr r3, [r7, #4] + 8003420: 2200 movs r2, #0 + 8003422: f8c3 26ac str.w r2, [r3, #1708] ; 0x6ac + req_param_resp.ints_length = 0; + 8003426: 687b ldr r3, [r7, #4] + 8003428: 2200 movs r2, #0 + 800342a: f8c3 2698 str.w r2, [r3, #1688] ; 0x698 + req_param_resp.ints = NULL; + 800342e: 687b ldr r3, [r7, #4] + 8003430: 2200 movs r2, #0 + 8003432: f8c3 26a0 str.w r2, [r3, #1696] ; 0x6a0 - /* Configure the SDMMC2 clock source */ - __HAL_RCC_SDMMC2_CONFIG(PeriphClkInit->Sdmmc2ClockSelection); - 8001fd4: 4b0d ldr r3, [pc, #52] ; (800200c ) - 8001fd6: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 8001fda: f023 5200 bic.w r2, r3, #536870912 ; 0x20000000 - 8001fde: 687b ldr r3, [r7, #4] - 8001fe0: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 - 8001fe4: 4909 ldr r1, [pc, #36] ; (800200c ) - 8001fe6: 4313 orrs r3, r2 - 8001fe8: f8c1 3090 str.w r3, [r1, #144] ; 0x90 + spin_timeout_ = 0; + 8003436: 687b ldr r3, [r7, #4] + 8003438: 2200 movs r2, #0 + 800343a: f8c3 21a0 str.w r2, [r3, #416] ; 0x1a0 } - - /*------------------------------------- DFSDM1 Configuration -------------------------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_DFSDM1) == RCC_PERIPHCLK_DFSDM1) - 8001fec: 687b ldr r3, [r7, #4] - 8001fee: 681b ldr r3, [r3, #0] - 8001ff0: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 - 8001ff4: 2b00 cmp r3, #0 - 8001ff6: d00f beq.n 8002018 + 800343e: 687b ldr r3, [r7, #4] + 8003440: 4618 mov r0, r3 + 8003442: 3718 adds r7, #24 + 8003444: 46bd mov sp, r7 + 8003446: bd80 pop {r7, pc} + 8003448: 0800a4a0 .word 0x0800a4a0 + +0800344c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8initNodeEv>: { - /* Check the parameters */ - assert_param(IS_RCC_DFSDM1CLKSOURCE(PeriphClkInit->Dfsdm1ClockSelection)); - - /* Configure the DFSDM1 interface clock source */ - __HAL_RCC_DFSDM1_CONFIG(PeriphClkInit->Dfsdm1ClockSelection); - 8001ff8: 4b04 ldr r3, [pc, #16] ; (800200c ) - 8001ffa: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c - 8001ffe: f023 7200 bic.w r2, r3, #33554432 ; 0x2000000 - 8002002: 687b ldr r3, [r7, #4] - 8002004: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 - 8002008: e002 b.n 8002010 - 800200a: bf00 nop - 800200c: 40023800 .word 0x40023800 - 8002010: 4985 ldr r1, [pc, #532] ; (8002228 ) - 8002012: 4313 orrs r3, r2 - 8002014: f8c1 308c str.w r3, [r1, #140] ; 0x8c + return &hardware_; } - /*------------------------------------- DFSDM AUDIO Configuration -------------------------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_DFSDM1_AUDIO) == RCC_PERIPHCLK_DFSDM1_AUDIO) - 8002018: 687b ldr r3, [r7, #4] - 800201a: 681b ldr r3, [r3, #0] - 800201c: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 - 8002020: 2b00 cmp r3, #0 - 8002022: d00b beq.n 800203c + /* Start serial, initialize buffers */ + void initNode() + 800344c: b580 push {r7, lr} + 800344e: b082 sub sp, #8 + 8003450: af00 add r7, sp, #0 + 8003452: 6078 str r0, [r7, #4] { - /* Check the parameters */ - assert_param(IS_RCC_DFSDM1AUDIOCLKSOURCE(PeriphClkInit->Dfsdm1AudioClockSelection)); + hardware_.init(); + 8003454: 687b ldr r3, [r7, #4] + 8003456: 3304 adds r3, #4 + 8003458: 4618 mov r0, r3 + 800345a: f7fe f943 bl 80016e4 <_ZN13STM32Hardware4initEv> + mode_ = 0; + 800345e: 687b ldr r3, [r7, #4] + 8003460: 2200 movs r2, #0 + 8003462: f8c3 266c str.w r2, [r3, #1644] ; 0x66c + bytes_ = 0; + 8003466: 687b ldr r3, [r7, #4] + 8003468: 2200 movs r2, #0 + 800346a: f8c3 2670 str.w r2, [r3, #1648] ; 0x670 + index_ = 0; + 800346e: 687b ldr r3, [r7, #4] + 8003470: 2200 movs r2, #0 + 8003472: f8c3 2678 str.w r2, [r3, #1656] ; 0x678 + topic_ = 0; + 8003476: 687b ldr r3, [r7, #4] + 8003478: 2200 movs r2, #0 + 800347a: f8c3 2674 str.w r2, [r3, #1652] ; 0x674 + }; + 800347e: bf00 nop + 8003480: 3708 adds r7, #8 + 8003482: 46bd mov sp, r7 + 8003484: bd80 pop {r7, pc} - /* Configure the DFSDM interface clock source */ - __HAL_RCC_DFSDM1AUDIO_CONFIG(PeriphClkInit->Dfsdm1AudioClockSelection); - 8002024: 4b80 ldr r3, [pc, #512] ; (8002228 ) - 8002026: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c - 800202a: f023 6280 bic.w r2, r3, #67108864 ; 0x4000000 - 800202e: 687b ldr r3, [r7, #4] - 8002030: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c - 8002034: 497c ldr r1, [pc, #496] ; (8002228 ) - 8002036: 4313 orrs r3, r2 - 8002038: f8c1 308c str.w r3, [r1, #140] ; 0x8c - } -#endif /* STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */ +08003486 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE9advertiseERNS_9PublisherE>: + /******************************************************************** + * Topic Management + */ - /*-------------------------------------- PLLI2S Configuration ---------------------------------*/ - /* PLLI2S is configured when a peripheral will use it as source clock : SAI1, SAI2, I2S or SPDIF-RX */ - if((plli2sused == 1) || (PeriphClkInit->PeriphClockSelection == RCC_PERIPHCLK_PLLI2S)) - 800203c: 69fb ldr r3, [r7, #28] - 800203e: 2b01 cmp r3, #1 - 8002040: d005 beq.n 800204e - 8002042: 687b ldr r3, [r7, #4] - 8002044: 681b ldr r3, [r3, #0] - 8002046: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 - 800204a: f040 80d6 bne.w 80021fa + /* Register a new publisher */ + bool advertise(Publisher & p) + 8003486: b480 push {r7} + 8003488: b085 sub sp, #20 + 800348a: af00 add r7, sp, #0 + 800348c: 6078 str r0, [r7, #4] + 800348e: 6039 str r1, [r7, #0] { - /* Disable the PLLI2S */ - __HAL_RCC_PLLI2S_DISABLE(); - 800204e: 4b76 ldr r3, [pc, #472] ; (8002228 ) - 8002050: 681b ldr r3, [r3, #0] - 8002052: 4a75 ldr r2, [pc, #468] ; (8002228 ) - 8002054: f023 6380 bic.w r3, r3, #67108864 ; 0x4000000 - 8002058: 6013 str r3, [r2, #0] - - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - 800205a: f7fe fac7 bl 80005ec - 800205e: 6178 str r0, [r7, #20] - - /* Wait till PLLI2S is disabled */ - while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) != RESET) - 8002060: e008 b.n 8002074 + for (int i = 0; i < MAX_PUBLISHERS; i++) + 8003490: 2300 movs r3, #0 + 8003492: 60fb str r3, [r7, #12] + 8003494: 68fb ldr r3, [r7, #12] + 8003496: 2b18 cmp r3, #24 + 8003498: dc1e bgt.n 80034d8 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE9advertiseERNS_9PublisherE+0x52> { - if((HAL_GetTick() - tickstart) > PLLI2S_TIMEOUT_VALUE) - 8002062: f7fe fac3 bl 80005ec - 8002066: 4602 mov r2, r0 - 8002068: 697b ldr r3, [r7, #20] - 800206a: 1ad3 subs r3, r2, r3 - 800206c: 2b64 cmp r3, #100 ; 0x64 - 800206e: d901 bls.n 8002074 + if (publishers[i] == 0) // empty slot + 800349a: 687a ldr r2, [r7, #4] + 800349c: 68fb ldr r3, [r7, #12] + 800349e: f503 73b4 add.w r3, r3, #360 ; 0x168 + 80034a2: 009b lsls r3, r3, #2 + 80034a4: 4413 add r3, r2 + 80034a6: 685b ldr r3, [r3, #4] + 80034a8: 2b00 cmp r3, #0 + 80034aa: d111 bne.n 80034d0 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE9advertiseERNS_9PublisherE+0x4a> { - /* return in case of Timeout detected */ - return HAL_TIMEOUT; - 8002070: 2303 movs r3, #3 - 8002072: e194 b.n 800239e - while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) != RESET) - 8002074: 4b6c ldr r3, [pc, #432] ; (8002228 ) - 8002076: 681b ldr r3, [r3, #0] - 8002078: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 - 800207c: 2b00 cmp r3, #0 - 800207e: d1f0 bne.n 8002062 - - /* check for common PLLI2S Parameters */ - assert_param(IS_RCC_PLLI2SN_VALUE(PeriphClkInit->PLLI2S.PLLI2SN)); + publishers[i] = &p; + 80034ac: 687a ldr r2, [r7, #4] + 80034ae: 68fb ldr r3, [r7, #12] + 80034b0: f503 73b4 add.w r3, r3, #360 ; 0x168 + 80034b4: 009b lsls r3, r3, #2 + 80034b6: 4413 add r3, r2 + 80034b8: 683a ldr r2, [r7, #0] + 80034ba: 605a str r2, [r3, #4] + p.id_ = i + 100 + MAX_SUBSCRIBERS; + 80034bc: 68fb ldr r3, [r7, #12] + 80034be: f103 027d add.w r2, r3, #125 ; 0x7d + 80034c2: 683b ldr r3, [r7, #0] + 80034c4: 609a str r2, [r3, #8] + p.nh_ = this; + 80034c6: 687a ldr r2, [r7, #4] + 80034c8: 683b ldr r3, [r7, #0] + 80034ca: 60da str r2, [r3, #12] + return true; + 80034cc: 2301 movs r3, #1 + 80034ce: e004 b.n 80034da <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE9advertiseERNS_9PublisherE+0x54> + for (int i = 0; i < MAX_PUBLISHERS; i++) + 80034d0: 68fb ldr r3, [r7, #12] + 80034d2: 3301 adds r3, #1 + 80034d4: 60fb str r3, [r7, #12] + 80034d6: e7dd b.n 8003494 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE9advertiseERNS_9PublisherE+0xe> + } + } + return false; + 80034d8: 2300 movs r3, #0 + } + 80034da: 4618 mov r0, r3 + 80034dc: 3714 adds r7, #20 + 80034de: 46bd mov sp, r7 + 80034e0: f85d 7b04 ldr.w r7, [sp], #4 + 80034e4: 4770 bx lr - /*----------------- In Case of PLLI2S is selected as source clock for I2S -------------------*/ - if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S) == RCC_PERIPHCLK_I2S) && (PeriphClkInit->I2sClockSelection == RCC_I2SCLKSOURCE_PLLI2S))) - 8002080: 687b ldr r3, [r7, #4] - 8002082: 681b ldr r3, [r3, #0] - 8002084: f003 0301 and.w r3, r3, #1 - 8002088: 2b00 cmp r3, #0 - 800208a: d021 beq.n 80020d0 - 800208c: 687b ldr r3, [r7, #4] - 800208e: 6b5b ldr r3, [r3, #52] ; 0x34 - 8002090: 2b00 cmp r3, #0 - 8002092: d11d bne.n 80020d0 - { - /* check for Parameters */ - assert_param(IS_RCC_PLLI2SR_VALUE(PeriphClkInit->PLLI2S.PLLI2SR)); - - /* Read PLLI2SP and PLLI2SQ value from PLLI2SCFGR register (this value is not needed for I2S configuration) */ - tmpreg0 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SP) >> RCC_PLLI2SCFGR_PLLI2SP_Pos); - 8002094: 4b64 ldr r3, [pc, #400] ; (8002228 ) - 8002096: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 - 800209a: 0c1b lsrs r3, r3, #16 - 800209c: f003 0303 and.w r3, r3, #3 - 80020a0: 613b str r3, [r7, #16] - tmpreg1 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SQ) >> RCC_PLLI2SCFGR_PLLI2SQ_Pos); - 80020a2: 4b61 ldr r3, [pc, #388] ; (8002228 ) - 80020a4: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 - 80020a8: 0e1b lsrs r3, r3, #24 - 80020aa: f003 030f and.w r3, r3, #15 - 80020ae: 60fb str r3, [r7, #12] - /* Configure the PLLI2S division factors */ - /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) x (PLLI2SN/PLLM) */ - /* I2SCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SR */ - __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN , tmpreg0, tmpreg1, PeriphClkInit->PLLI2S.PLLI2SR); - 80020b0: 687b ldr r3, [r7, #4] - 80020b2: 685b ldr r3, [r3, #4] - 80020b4: 019a lsls r2, r3, #6 - 80020b6: 693b ldr r3, [r7, #16] - 80020b8: 041b lsls r3, r3, #16 - 80020ba: 431a orrs r2, r3 - 80020bc: 68fb ldr r3, [r7, #12] - 80020be: 061b lsls r3, r3, #24 - 80020c0: 431a orrs r2, r3 - 80020c2: 687b ldr r3, [r7, #4] - 80020c4: 689b ldr r3, [r3, #8] - 80020c6: 071b lsls r3, r3, #28 - 80020c8: 4957 ldr r1, [pc, #348] ; (8002228 ) - 80020ca: 4313 orrs r3, r2 - 80020cc: f8c1 3084 str.w r3, [r1, #132] ; 0x84 - } +080034e6 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv>: + virtual int spinOnce() + 80034e6: b580 push {r7, lr} + 80034e8: b084 sub sp, #16 + 80034ea: af00 add r7, sp, #0 + 80034ec: 6078 str r0, [r7, #4] + uint32_t c_time = hardware_.time(); + 80034ee: 687b ldr r3, [r7, #4] + 80034f0: 3304 adds r3, #4 + 80034f2: 4618 mov r0, r3 + 80034f4: f7fe f9dc bl 80018b0 <_ZN13STM32Hardware4timeEv> + 80034f8: 60f8 str r0, [r7, #12] + if ((c_time - last_sync_receive_time) > (SYNC_SECONDS * 2200)) + 80034fa: 687b ldr r3, [r7, #4] + 80034fc: f8d3 3688 ldr.w r3, [r3, #1672] ; 0x688 + 8003500: 68fa ldr r2, [r7, #12] + 8003502: 1ad3 subs r3, r2, r3 + 8003504: f642 22f8 movw r2, #11000 ; 0x2af8 + 8003508: 4293 cmp r3, r2 + 800350a: d903 bls.n 8003514 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x2e> + configured_ = false; + 800350c: 687b ldr r3, [r7, #4] + 800350e: 2200 movs r2, #0 + 8003510: f883 2680 strb.w r2, [r3, #1664] ; 0x680 + if (mode_ != MODE_FIRST_FF) + 8003514: 687b ldr r3, [r7, #4] + 8003516: f8d3 366c ldr.w r3, [r3, #1644] ; 0x66c + 800351a: 2b00 cmp r3, #0 + 800351c: d009 beq.n 8003532 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c> + if (c_time > last_msg_timeout_time) + 800351e: 687b ldr r3, [r7, #4] + 8003520: f8d3 368c ldr.w r3, [r3, #1676] ; 0x68c + 8003524: 68fa ldr r2, [r7, #12] + 8003526: 429a cmp r2, r3 + 8003528: d903 bls.n 8003532 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c> + mode_ = MODE_FIRST_FF; + 800352a: 687b ldr r3, [r7, #4] + 800352c: 2200 movs r2, #0 + 800352e: f8c3 266c str.w r2, [r3, #1644] ; 0x66c + if (spin_timeout_ > 0) + 8003532: 687b ldr r3, [r7, #4] + 8003534: f8d3 31a0 ldr.w r3, [r3, #416] ; 0x1a0 + 8003538: 2b00 cmp r3, #0 + 800353a: d014 beq.n 8003566 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x80> + if ((hardware_.time() - c_time) > spin_timeout_) + 800353c: 687b ldr r3, [r7, #4] + 800353e: 3304 adds r3, #4 + 8003540: 4618 mov r0, r3 + 8003542: f7fe f9b5 bl 80018b0 <_ZN13STM32Hardware4timeEv> + 8003546: 4602 mov r2, r0 + 8003548: 68fb ldr r3, [r7, #12] + 800354a: 1ad2 subs r2, r2, r3 + 800354c: 687b ldr r3, [r7, #4] + 800354e: f8d3 31a0 ldr.w r3, [r3, #416] ; 0x1a0 + 8003552: 429a cmp r2, r3 + 8003554: bf8c ite hi + 8003556: 2301 movhi r3, #1 + 8003558: 2300 movls r3, #0 + 800355a: b2db uxtb r3, r3 + 800355c: 2b00 cmp r3, #0 + 800355e: d002 beq.n 8003566 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x80> + return SPIN_TIMEOUT; + 8003560: f06f 0301 mvn.w r3, #1 + 8003564: e197 b.n 8003896 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x3b0> + int data = hardware_.read(); + 8003566: 687b ldr r3, [r7, #4] + 8003568: 3304 adds r3, #4 + 800356a: 4618 mov r0, r3 + 800356c: f7fe f8d5 bl 800171a <_ZN13STM32Hardware4readEv> + 8003570: 60b8 str r0, [r7, #8] + if (data < 0) + 8003572: 68bb ldr r3, [r7, #8] + 8003574: 2b00 cmp r3, #0 + 8003576: f2c0 8177 blt.w 8003868 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x382> + checksum_ += data; + 800357a: 687b ldr r3, [r7, #4] + 800357c: f8d3 267c ldr.w r2, [r3, #1660] ; 0x67c + 8003580: 68bb ldr r3, [r7, #8] + 8003582: 441a add r2, r3 + 8003584: 687b ldr r3, [r7, #4] + 8003586: f8c3 267c str.w r2, [r3, #1660] ; 0x67c + if (mode_ == MODE_MESSAGE) /* message data being recieved */ + 800358a: 687b ldr r3, [r7, #4] + 800358c: f8d3 366c ldr.w r3, [r3, #1644] ; 0x66c + 8003590: 2b07 cmp r3, #7 + 8003592: d11e bne.n 80035d2 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0xec> + message_in[index_++] = data; + 8003594: 687b ldr r3, [r7, #4] + 8003596: f8d3 3678 ldr.w r3, [r3, #1656] ; 0x678 + 800359a: 1c59 adds r1, r3, #1 + 800359c: 687a ldr r2, [r7, #4] + 800359e: f8c2 1678 str.w r1, [r2, #1656] ; 0x678 + 80035a2: 68ba ldr r2, [r7, #8] + 80035a4: b2d1 uxtb r1, r2 + 80035a6: 687a ldr r2, [r7, #4] + 80035a8: 4413 add r3, r2 + 80035aa: 460a mov r2, r1 + 80035ac: f883 21a4 strb.w r2, [r3, #420] ; 0x1a4 + bytes_--; + 80035b0: 687b ldr r3, [r7, #4] + 80035b2: f8d3 3670 ldr.w r3, [r3, #1648] ; 0x670 + 80035b6: 1e5a subs r2, r3, #1 + 80035b8: 687b ldr r3, [r7, #4] + 80035ba: f8c3 2670 str.w r2, [r3, #1648] ; 0x670 + if (bytes_ == 0) /* is message complete? if so, checksum */ + 80035be: 687b ldr r3, [r7, #4] + 80035c0: f8d3 3670 ldr.w r3, [r3, #1648] ; 0x670 + 80035c4: 2b00 cmp r3, #0 + 80035c6: d1b4 bne.n 8003532 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c> + mode_ = MODE_MSG_CHECKSUM; + 80035c8: 687b ldr r3, [r7, #4] + 80035ca: 2208 movs r2, #8 + 80035cc: f8c3 266c str.w r2, [r3, #1644] ; 0x66c + 80035d0: e7af b.n 8003532 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c> + else if (mode_ == MODE_FIRST_FF) + 80035d2: 687b ldr r3, [r7, #4] + 80035d4: f8d3 366c ldr.w r3, [r3, #1644] ; 0x66c + 80035d8: 2b00 cmp r3, #0 + 80035da: d128 bne.n 800362e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x148> + if (data == 0xff) + 80035dc: 68bb ldr r3, [r7, #8] + 80035de: 2bff cmp r3, #255 ; 0xff + 80035e0: d10d bne.n 80035fe <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x118> + mode_++; + 80035e2: 687b ldr r3, [r7, #4] + 80035e4: f8d3 366c ldr.w r3, [r3, #1644] ; 0x66c + 80035e8: 1c5a adds r2, r3, #1 + 80035ea: 687b ldr r3, [r7, #4] + 80035ec: f8c3 266c str.w r2, [r3, #1644] ; 0x66c + last_msg_timeout_time = c_time + SERIAL_MSG_TIMEOUT; + 80035f0: 68fb ldr r3, [r7, #12] + 80035f2: f103 0214 add.w r2, r3, #20 + 80035f6: 687b ldr r3, [r7, #4] + 80035f8: f8c3 268c str.w r2, [r3, #1676] ; 0x68c + 80035fc: e799 b.n 8003532 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c> + else if (hardware_.time() - c_time > (SYNC_SECONDS * 1000)) + 80035fe: 687b ldr r3, [r7, #4] + 8003600: 3304 adds r3, #4 + 8003602: 4618 mov r0, r3 + 8003604: f7fe f954 bl 80018b0 <_ZN13STM32Hardware4timeEv> + 8003608: 4602 mov r2, r0 + 800360a: 68fb ldr r3, [r7, #12] + 800360c: 1ad3 subs r3, r2, r3 + 800360e: f241 3288 movw r2, #5000 ; 0x1388 + 8003612: 4293 cmp r3, r2 + 8003614: bf8c ite hi + 8003616: 2301 movhi r3, #1 + 8003618: 2300 movls r3, #0 + 800361a: b2db uxtb r3, r3 + 800361c: 2b00 cmp r3, #0 + 800361e: d088 beq.n 8003532 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c> + configured_ = false; + 8003620: 687b ldr r3, [r7, #4] + 8003622: 2200 movs r2, #0 + 8003624: f883 2680 strb.w r2, [r3, #1664] ; 0x680 + return SPIN_TIMEOUT; + 8003628: f06f 0301 mvn.w r3, #1 + 800362c: e133 b.n 8003896 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x3b0> + else if (mode_ == MODE_PROTOCOL_VER) + 800362e: 687b ldr r3, [r7, #4] + 8003630: f8d3 366c ldr.w r3, [r3, #1644] ; 0x66c + 8003634: 2b01 cmp r3, #1 + 8003636: d11b bne.n 8003670 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x18a> + if (data == PROTOCOL_VER) + 8003638: 68bb ldr r3, [r7, #8] + 800363a: 2bfe cmp r3, #254 ; 0xfe + 800363c: d107 bne.n 800364e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x168> + mode_++; + 800363e: 687b ldr r3, [r7, #4] + 8003640: f8d3 366c ldr.w r3, [r3, #1644] ; 0x66c + 8003644: 1c5a adds r2, r3, #1 + 8003646: 687b ldr r3, [r7, #4] + 8003648: f8c3 266c str.w r2, [r3, #1644] ; 0x66c + 800364c: e771 b.n 8003532 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c> + mode_ = MODE_FIRST_FF; + 800364e: 687b ldr r3, [r7, #4] + 8003650: 2200 movs r2, #0 + 8003652: f8c3 266c str.w r2, [r3, #1644] ; 0x66c + if (configured_ == false) + 8003656: 687b ldr r3, [r7, #4] + 8003658: f893 3680 ldrb.w r3, [r3, #1664] ; 0x680 + 800365c: f083 0301 eor.w r3, r3, #1 + 8003660: b2db uxtb r3, r3 + 8003662: 2b00 cmp r3, #0 + 8003664: f43f af65 beq.w 8003532 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c> + requestSyncTime(); /* send a msg back showing our protocol version */ + 8003668: 6878 ldr r0, [r7, #4] + 800366a: f000 f924 bl 80038b6 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15requestSyncTimeEv> + 800366e: e760 b.n 8003532 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c> + else if (mode_ == MODE_SIZE_L) /* bottom half of message size */ + 8003670: 687b ldr r3, [r7, #4] + 8003672: f8d3 366c ldr.w r3, [r3, #1644] ; 0x66c + 8003676: 2b02 cmp r3, #2 + 8003678: d113 bne.n 80036a2 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x1bc> + bytes_ = data; + 800367a: 687b ldr r3, [r7, #4] + 800367c: 68ba ldr r2, [r7, #8] + 800367e: f8c3 2670 str.w r2, [r3, #1648] ; 0x670 + index_ = 0; + 8003682: 687b ldr r3, [r7, #4] + 8003684: 2200 movs r2, #0 + 8003686: f8c3 2678 str.w r2, [r3, #1656] ; 0x678 + mode_++; + 800368a: 687b ldr r3, [r7, #4] + 800368c: f8d3 366c ldr.w r3, [r3, #1644] ; 0x66c + 8003690: 1c5a adds r2, r3, #1 + 8003692: 687b ldr r3, [r7, #4] + 8003694: f8c3 266c str.w r2, [r3, #1644] ; 0x66c + checksum_ = data; /* first byte for calculating size checksum */ + 8003698: 687b ldr r3, [r7, #4] + 800369a: 68ba ldr r2, [r7, #8] + 800369c: f8c3 267c str.w r2, [r3, #1660] ; 0x67c + 80036a0: e747 b.n 8003532 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c> + else if (mode_ == MODE_SIZE_H) /* top half of message size */ + 80036a2: 687b ldr r3, [r7, #4] + 80036a4: f8d3 366c ldr.w r3, [r3, #1644] ; 0x66c + 80036a8: 2b03 cmp r3, #3 + 80036aa: d110 bne.n 80036ce <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x1e8> + bytes_ += data << 8; + 80036ac: 687b ldr r3, [r7, #4] + 80036ae: f8d3 2670 ldr.w r2, [r3, #1648] ; 0x670 + 80036b2: 68bb ldr r3, [r7, #8] + 80036b4: 021b lsls r3, r3, #8 + 80036b6: 441a add r2, r3 + 80036b8: 687b ldr r3, [r7, #4] + 80036ba: f8c3 2670 str.w r2, [r3, #1648] ; 0x670 + mode_++; + 80036be: 687b ldr r3, [r7, #4] + 80036c0: f8d3 366c ldr.w r3, [r3, #1644] ; 0x66c + 80036c4: 1c5a adds r2, r3, #1 + 80036c6: 687b ldr r3, [r7, #4] + 80036c8: f8c3 266c str.w r2, [r3, #1644] ; 0x66c + 80036cc: e731 b.n 8003532 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c> + else if (mode_ == MODE_SIZE_CHECKSUM) + 80036ce: 687b ldr r3, [r7, #4] + 80036d0: f8d3 366c ldr.w r3, [r3, #1644] ; 0x66c + 80036d4: 2b04 cmp r3, #4 + 80036d6: d116 bne.n 8003706 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x220> + if ((checksum_ % 256) == 255) + 80036d8: 687b ldr r3, [r7, #4] + 80036da: f8d3 367c ldr.w r3, [r3, #1660] ; 0x67c + 80036de: 425a negs r2, r3 + 80036e0: b2db uxtb r3, r3 + 80036e2: b2d2 uxtb r2, r2 + 80036e4: bf58 it pl + 80036e6: 4253 negpl r3, r2 + 80036e8: 2bff cmp r3, #255 ; 0xff + 80036ea: d107 bne.n 80036fc <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x216> + mode_++; + 80036ec: 687b ldr r3, [r7, #4] + 80036ee: f8d3 366c ldr.w r3, [r3, #1644] ; 0x66c + 80036f2: 1c5a adds r2, r3, #1 + 80036f4: 687b ldr r3, [r7, #4] + 80036f6: f8c3 266c str.w r2, [r3, #1644] ; 0x66c + 80036fa: e71a b.n 8003532 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c> + mode_ = MODE_FIRST_FF; /* Abandon the frame if the msg len is wrong */ + 80036fc: 687b ldr r3, [r7, #4] + 80036fe: 2200 movs r2, #0 + 8003700: f8c3 266c str.w r2, [r3, #1644] ; 0x66c + 8003704: e715 b.n 8003532 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c> + else if (mode_ == MODE_TOPIC_L) /* bottom half of topic id */ + 8003706: 687b ldr r3, [r7, #4] + 8003708: f8d3 366c ldr.w r3, [r3, #1644] ; 0x66c + 800370c: 2b05 cmp r3, #5 + 800370e: d10f bne.n 8003730 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x24a> + topic_ = data; + 8003710: 687b ldr r3, [r7, #4] + 8003712: 68ba ldr r2, [r7, #8] + 8003714: f8c3 2674 str.w r2, [r3, #1652] ; 0x674 + mode_++; + 8003718: 687b ldr r3, [r7, #4] + 800371a: f8d3 366c ldr.w r3, [r3, #1644] ; 0x66c + 800371e: 1c5a adds r2, r3, #1 + 8003720: 687b ldr r3, [r7, #4] + 8003722: f8c3 266c str.w r2, [r3, #1644] ; 0x66c + checksum_ = data; /* first byte included in checksum */ + 8003726: 687b ldr r3, [r7, #4] + 8003728: 68ba ldr r2, [r7, #8] + 800372a: f8c3 267c str.w r2, [r3, #1660] ; 0x67c + 800372e: e700 b.n 8003532 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c> + else if (mode_ == MODE_TOPIC_H) /* top half of topic id */ + 8003730: 687b ldr r3, [r7, #4] + 8003732: f8d3 366c ldr.w r3, [r3, #1644] ; 0x66c + 8003736: 2b06 cmp r3, #6 + 8003738: d117 bne.n 800376a <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x284> + topic_ += data << 8; + 800373a: 687b ldr r3, [r7, #4] + 800373c: f8d3 2674 ldr.w r2, [r3, #1652] ; 0x674 + 8003740: 68bb ldr r3, [r7, #8] + 8003742: 021b lsls r3, r3, #8 + 8003744: 441a add r2, r3 + 8003746: 687b ldr r3, [r7, #4] + 8003748: f8c3 2674 str.w r2, [r3, #1652] ; 0x674 + mode_ = MODE_MESSAGE; + 800374c: 687b ldr r3, [r7, #4] + 800374e: 2207 movs r2, #7 + 8003750: f8c3 266c str.w r2, [r3, #1644] ; 0x66c + if (bytes_ == 0) + 8003754: 687b ldr r3, [r7, #4] + 8003756: f8d3 3670 ldr.w r3, [r3, #1648] ; 0x670 + 800375a: 2b00 cmp r3, #0 + 800375c: f47f aee9 bne.w 8003532 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c> + mode_ = MODE_MSG_CHECKSUM; + 8003760: 687b ldr r3, [r7, #4] + 8003762: 2208 movs r2, #8 + 8003764: f8c3 266c str.w r2, [r3, #1644] ; 0x66c + 8003768: e6e3 b.n 8003532 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c> + else if (mode_ == MODE_MSG_CHECKSUM) /* do checksum */ + 800376a: 687b ldr r3, [r7, #4] + 800376c: f8d3 366c ldr.w r3, [r3, #1644] ; 0x66c + 8003770: 2b08 cmp r3, #8 + 8003772: f47f aede bne.w 8003532 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c> + mode_ = MODE_FIRST_FF; + 8003776: 687b ldr r3, [r7, #4] + 8003778: 2200 movs r2, #0 + 800377a: f8c3 266c str.w r2, [r3, #1644] ; 0x66c + if ((checksum_ % 256) == 255) + 800377e: 687b ldr r3, [r7, #4] + 8003780: f8d3 367c ldr.w r3, [r3, #1660] ; 0x67c + 8003784: 425a negs r2, r3 + 8003786: b2db uxtb r3, r3 + 8003788: b2d2 uxtb r2, r2 + 800378a: bf58 it pl + 800378c: 4253 negpl r3, r2 + 800378e: 2bff cmp r3, #255 ; 0xff + 8003790: f47f aecf bne.w 8003532 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c> + if (topic_ == TopicInfo::ID_PUBLISHER) + 8003794: 687b ldr r3, [r7, #4] + 8003796: f8d3 3674 ldr.w r3, [r3, #1652] ; 0x674 + 800379a: 2b00 cmp r3, #0 + 800379c: d110 bne.n 80037c0 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x2da> + requestSyncTime(); + 800379e: 6878 ldr r0, [r7, #4] + 80037a0: f000 f889 bl 80038b6 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15requestSyncTimeEv> + negotiateTopics(); + 80037a4: 6878 ldr r0, [r7, #4] + 80037a6: f000 f8a4 bl 80038f2 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv> + last_sync_time = c_time; + 80037aa: 687b ldr r3, [r7, #4] + 80037ac: 68fa ldr r2, [r7, #12] + 80037ae: f8c3 2684 str.w r2, [r3, #1668] ; 0x684 + last_sync_receive_time = c_time; + 80037b2: 687b ldr r3, [r7, #4] + 80037b4: 68fa ldr r2, [r7, #12] + 80037b6: f8c3 2688 str.w r2, [r3, #1672] ; 0x688 + return SPIN_ERR; + 80037ba: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff + 80037be: e06a b.n 8003896 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x3b0> + else if (topic_ == TopicInfo::ID_TIME) + 80037c0: 687b ldr r3, [r7, #4] + 80037c2: f8d3 3674 ldr.w r3, [r3, #1652] ; 0x674 + 80037c6: 2b0a cmp r3, #10 + 80037c8: d107 bne.n 80037da <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x2f4> + syncTime(message_in); + 80037ca: 687b ldr r3, [r7, #4] + 80037cc: f503 73d2 add.w r3, r3, #420 ; 0x1a4 + 80037d0: 4619 mov r1, r3 + 80037d2: 6878 ldr r0, [r7, #4] + 80037d4: f000 f96c bl 8003ab0 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8syncTimeEPh> + 80037d8: e6ab b.n 8003532 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c> + else if (topic_ == TopicInfo::ID_PARAMETER_REQUEST) + 80037da: 687b ldr r3, [r7, #4] + 80037dc: f8d3 3674 ldr.w r3, [r3, #1652] ; 0x674 + 80037e0: 2b06 cmp r3, #6 + 80037e2: d10e bne.n 8003802 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x31c> + req_param_resp.deserialize(message_in); + 80037e4: 687b ldr r3, [r7, #4] + 80037e6: f203 6294 addw r2, r3, #1684 ; 0x694 + 80037ea: 687b ldr r3, [r7, #4] + 80037ec: f503 73d2 add.w r3, r3, #420 ; 0x1a4 + 80037f0: 4619 mov r1, r3 + 80037f2: 4610 mov r0, r2 + 80037f4: f7fd fd83 bl 80012fe <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh> + param_recieved = true; + 80037f8: 687b ldr r3, [r7, #4] + 80037fa: 2201 movs r2, #1 + 80037fc: f883 2690 strb.w r2, [r3, #1680] ; 0x690 + 8003800: e697 b.n 8003532 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c> + else if (topic_ == TopicInfo::ID_TX_STOP) + 8003802: 687b ldr r3, [r7, #4] + 8003804: f8d3 3674 ldr.w r3, [r3, #1652] ; 0x674 + 8003808: 2b0b cmp r3, #11 + 800380a: d104 bne.n 8003816 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x330> + configured_ = false; + 800380c: 687b ldr r3, [r7, #4] + 800380e: 2200 movs r2, #0 + 8003810: f883 2680 strb.w r2, [r3, #1664] ; 0x680 + 8003814: e68d b.n 8003532 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c> + if (subscribers[topic_ - 100]) + 8003816: 687b ldr r3, [r7, #4] + 8003818: f8d3 3674 ldr.w r3, [r3, #1652] ; 0x674 + 800381c: f1a3 0264 sub.w r2, r3, #100 ; 0x64 + 8003820: 687b ldr r3, [r7, #4] + 8003822: f502 72c1 add.w r2, r2, #386 ; 0x182 + 8003826: f853 3022 ldr.w r3, [r3, r2, lsl #2] + 800382a: 2b00 cmp r3, #0 + 800382c: f43f ae81 beq.w 8003532 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c> + subscribers[topic_ - 100]->callback(message_in); + 8003830: 687b ldr r3, [r7, #4] + 8003832: f8d3 3674 ldr.w r3, [r3, #1652] ; 0x674 + 8003836: f1a3 0264 sub.w r2, r3, #100 ; 0x64 + 800383a: 687b ldr r3, [r7, #4] + 800383c: f502 72c1 add.w r2, r2, #386 ; 0x182 + 8003840: f853 0022 ldr.w r0, [r3, r2, lsl #2] + 8003844: 687b ldr r3, [r7, #4] + 8003846: f8d3 3674 ldr.w r3, [r3, #1652] ; 0x674 + 800384a: f1a3 0264 sub.w r2, r3, #100 ; 0x64 + 800384e: 687b ldr r3, [r7, #4] + 8003850: f502 72c1 add.w r2, r2, #386 ; 0x182 + 8003854: f853 3022 ldr.w r3, [r3, r2, lsl #2] + 8003858: 681b ldr r3, [r3, #0] + 800385a: 681b ldr r3, [r3, #0] + 800385c: 687a ldr r2, [r7, #4] + 800385e: f502 72d2 add.w r2, r2, #420 ; 0x1a4 + 8003862: 4611 mov r1, r2 + 8003864: 4798 blx r3 + while (true) + 8003866: e664 b.n 8003532 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c> + break; + 8003868: bf00 nop + if (configured_ && ((c_time - last_sync_time) > (SYNC_SECONDS * 500))) + 800386a: 687b ldr r3, [r7, #4] + 800386c: f893 3680 ldrb.w r3, [r3, #1664] ; 0x680 + 8003870: 2b00 cmp r3, #0 + 8003872: d00f beq.n 8003894 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x3ae> + 8003874: 687b ldr r3, [r7, #4] + 8003876: f8d3 3684 ldr.w r3, [r3, #1668] ; 0x684 + 800387a: 68fa ldr r2, [r7, #12] + 800387c: 1ad3 subs r3, r2, r3 + 800387e: f640 12c4 movw r2, #2500 ; 0x9c4 + 8003882: 4293 cmp r3, r2 + 8003884: d906 bls.n 8003894 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x3ae> + requestSyncTime(); + 8003886: 6878 ldr r0, [r7, #4] + 8003888: f000 f815 bl 80038b6 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15requestSyncTimeEv> + last_sync_time = c_time; + 800388c: 687b ldr r3, [r7, #4] + 800388e: 68fa ldr r2, [r7, #12] + 8003890: f8c3 2684 str.w r2, [r3, #1668] ; 0x684 + return SPIN_OK; + 8003894: 2300 movs r3, #0 + } + 8003896: 4618 mov r0, r3 + 8003898: 3710 adds r7, #16 + 800389a: 46bd mov sp, r7 + 800389c: bd80 pop {r7, pc} - /*----------------- In Case of PLLI2S is selected as source clock for SAI -------------------*/ - if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) && (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLI2S)) || - 80020d0: 687b ldr r3, [r7, #4] - 80020d2: 681b ldr r3, [r3, #0] - 80020d4: f403 2300 and.w r3, r3, #524288 ; 0x80000 - 80020d8: 2b00 cmp r3, #0 - 80020da: d004 beq.n 80020e6 - 80020dc: 687b ldr r3, [r7, #4] - 80020de: 6bdb ldr r3, [r3, #60] ; 0x3c - 80020e0: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000 - 80020e4: d00a beq.n 80020fc - ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLI2S))) - 80020e6: 687b ldr r3, [r7, #4] - 80020e8: 681b ldr r3, [r3, #0] - 80020ea: f403 1380 and.w r3, r3, #1048576 ; 0x100000 - if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) && (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLI2S)) || - 80020ee: 2b00 cmp r3, #0 - 80020f0: d02e beq.n 8002150 - ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLI2S))) - 80020f2: 687b ldr r3, [r7, #4] - 80020f4: 6c1b ldr r3, [r3, #64] ; 0x40 - 80020f6: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000 - 80020fa: d129 bne.n 8002150 - assert_param(IS_RCC_PLLI2SQ_VALUE(PeriphClkInit->PLLI2S.PLLI2SQ)); - /* Check for PLLI2S/DIVQ parameters */ - assert_param(IS_RCC_PLLI2S_DIVQ_VALUE(PeriphClkInit->PLLI2SDivQ)); +0800389e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE11getHardwareEv>: + Hardware* getHardware() + 800389e: b480 push {r7} + 80038a0: b083 sub sp, #12 + 80038a2: af00 add r7, sp, #0 + 80038a4: 6078 str r0, [r7, #4] + return &hardware_; + 80038a6: 687b ldr r3, [r7, #4] + 80038a8: 3304 adds r3, #4 + } + 80038aa: 4618 mov r0, r3 + 80038ac: 370c adds r7, #12 + 80038ae: 46bd mov sp, r7 + 80038b0: f85d 7b04 ldr.w r7, [sp], #4 + 80038b4: 4770 bx lr - /* Read PLLI2SP and PLLI2SR values from PLLI2SCFGR register (this value is not needed for SAI configuration) */ - tmpreg0 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SP) >> RCC_PLLI2SCFGR_PLLI2SP_Pos); - 80020fc: 4b4a ldr r3, [pc, #296] ; (8002228 ) - 80020fe: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 - 8002102: 0c1b lsrs r3, r3, #16 - 8002104: f003 0303 and.w r3, r3, #3 - 8002108: 613b str r3, [r7, #16] - tmpreg1 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos); - 800210a: 4b47 ldr r3, [pc, #284] ; (8002228 ) - 800210c: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 - 8002110: 0f1b lsrs r3, r3, #28 - 8002112: f003 0307 and.w r3, r3, #7 - 8002116: 60fb str r3, [r7, #12] - /* Configure the PLLI2S division factors */ - /* PLLI2S_VCO Input = PLL_SOURCE/PLLM */ - /* PLLI2S_VCO Output = PLLI2S_VCO Input * PLLI2SN */ - /* SAI_CLK(first level) = PLLI2S_VCO Output/PLLI2SQ */ - __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN, tmpreg0, PeriphClkInit->PLLI2S.PLLI2SQ, tmpreg1); - 8002118: 687b ldr r3, [r7, #4] - 800211a: 685b ldr r3, [r3, #4] - 800211c: 019a lsls r2, r3, #6 - 800211e: 693b ldr r3, [r7, #16] - 8002120: 041b lsls r3, r3, #16 - 8002122: 431a orrs r2, r3 - 8002124: 687b ldr r3, [r7, #4] - 8002126: 68db ldr r3, [r3, #12] - 8002128: 061b lsls r3, r3, #24 - 800212a: 431a orrs r2, r3 - 800212c: 68fb ldr r3, [r7, #12] - 800212e: 071b lsls r3, r3, #28 - 8002130: 493d ldr r1, [pc, #244] ; (8002228 ) - 8002132: 4313 orrs r3, r2 - 8002134: f8c1 3084 str.w r3, [r1, #132] ; 0x84 +080038b6 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15requestSyncTimeEv>: + void requestSyncTime() + 80038b6: b580 push {r7, lr} + 80038b8: b086 sub sp, #24 + 80038ba: af00 add r7, sp, #0 + 80038bc: 6078 str r0, [r7, #4] + std_msgs::Time t; + 80038be: f107 030c add.w r3, r7, #12 + 80038c2: 4618 mov r0, r3 + 80038c4: f7fd f882 bl 80009cc <_ZN8std_msgs4TimeC1Ev> + publish(TopicInfo::ID_TIME, &t); + 80038c8: 687b ldr r3, [r7, #4] + 80038ca: 681b ldr r3, [r3, #0] + 80038cc: 681b ldr r3, [r3, #0] + 80038ce: f107 020c add.w r2, r7, #12 + 80038d2: 210a movs r1, #10 + 80038d4: 6878 ldr r0, [r7, #4] + 80038d6: 4798 blx r3 + rt_time = hardware_.time(); + 80038d8: 687b ldr r3, [r7, #4] + 80038da: 3304 adds r3, #4 + 80038dc: 4618 mov r0, r3 + 80038de: f7fd ffe7 bl 80018b0 <_ZN13STM32Hardware4timeEv> + 80038e2: 4602 mov r2, r0 + 80038e4: 687b ldr r3, [r7, #4] + 80038e6: f8c3 2194 str.w r2, [r3, #404] ; 0x194 + } + 80038ea: bf00 nop + 80038ec: 3718 adds r7, #24 + 80038ee: 46bd mov sp, r7 + 80038f0: bd80 pop {r7, pc} - /* SAI_CLK_x = SAI_CLK(first level)/PLLI2SDIVQ */ - __HAL_RCC_PLLI2S_PLLSAICLKDIVQ_CONFIG(PeriphClkInit->PLLI2SDivQ); - 8002138: 4b3b ldr r3, [pc, #236] ; (8002228 ) - 800213a: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c - 800213e: f023 021f bic.w r2, r3, #31 - 8002142: 687b ldr r3, [r7, #4] - 8002144: 6a5b ldr r3, [r3, #36] ; 0x24 - 8002146: 3b01 subs r3, #1 - 8002148: 4937 ldr r1, [pc, #220] ; (8002228 ) - 800214a: 4313 orrs r3, r2 - 800214c: f8c1 308c str.w r3, [r1, #140] ; 0x8c +080038f2 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv>: + } } + return false; + } - /*----------------- In Case of PLLI2S is selected as source clock for SPDIF-RX -------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPDIFRX) == RCC_PERIPHCLK_SPDIFRX) - 8002150: 687b ldr r3, [r7, #4] - 8002152: 681b ldr r3, [r3, #0] - 8002154: f003 7380 and.w r3, r3, #16777216 ; 0x1000000 - 8002158: 2b00 cmp r3, #0 - 800215a: d01d beq.n 8002198 + void negotiateTopics() + 80038f2: b590 push {r4, r7, lr} + 80038f4: b08b sub sp, #44 ; 0x2c + 80038f6: af00 add r7, sp, #0 + 80038f8: 6078 str r0, [r7, #4] + { + rosserial_msgs::TopicInfo ti; + 80038fa: f107 030c add.w r3, r7, #12 + 80038fe: 4618 mov r0, r3 + 8003900: f7fd f954 bl 8000bac <_ZN14rosserial_msgs9TopicInfoC1Ev> + int i; + for (i = 0; i < MAX_PUBLISHERS; i++) + 8003904: 2300 movs r3, #0 + 8003906: 627b str r3, [r7, #36] ; 0x24 + 8003908: 6a7b ldr r3, [r7, #36] ; 0x24 + 800390a: 2b18 cmp r3, #24 + 800390c: dc63 bgt.n 80039d6 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0xe4> { - /* check for Parameters */ - assert_param(IS_RCC_PLLI2SP_VALUE(PeriphClkInit->PLLI2S.PLLI2SP)); - - /* Read PLLI2SR value from PLLI2SCFGR register (this value is not needed for SPDIF-RX configuration) */ - tmpreg0 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SQ) >> RCC_PLLI2SCFGR_PLLI2SQ_Pos); - 800215c: 4b32 ldr r3, [pc, #200] ; (8002228 ) - 800215e: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 - 8002162: 0e1b lsrs r3, r3, #24 - 8002164: f003 030f and.w r3, r3, #15 - 8002168: 613b str r3, [r7, #16] - tmpreg1 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos); - 800216a: 4b2f ldr r3, [pc, #188] ; (8002228 ) - 800216c: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 - 8002170: 0f1b lsrs r3, r3, #28 - 8002172: f003 0307 and.w r3, r3, #7 - 8002176: 60fb str r3, [r7, #12] - /* Configure the PLLI2S division factors */ - /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) x (PLLI2SN/PLLM) */ - /* SPDIFCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SP */ - __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN , PeriphClkInit->PLLI2S.PLLI2SP, tmpreg0, tmpreg1); - 8002178: 687b ldr r3, [r7, #4] - 800217a: 685b ldr r3, [r3, #4] - 800217c: 019a lsls r2, r3, #6 - 800217e: 687b ldr r3, [r7, #4] - 8002180: 691b ldr r3, [r3, #16] - 8002182: 041b lsls r3, r3, #16 - 8002184: 431a orrs r2, r3 - 8002186: 693b ldr r3, [r7, #16] - 8002188: 061b lsls r3, r3, #24 - 800218a: 431a orrs r2, r3 - 800218c: 68fb ldr r3, [r7, #12] - 800218e: 071b lsls r3, r3, #28 - 8002190: 4925 ldr r1, [pc, #148] ; (8002228 ) - 8002192: 4313 orrs r3, r2 - 8002194: f8c1 3084 str.w r3, [r1, #132] ; 0x84 - } - - /*----------------- In Case of PLLI2S is just selected -----------------*/ - if((PeriphClkInit->PeriphClockSelection & RCC_PERIPHCLK_PLLI2S) == RCC_PERIPHCLK_PLLI2S) - 8002198: 687b ldr r3, [r7, #4] - 800219a: 681b ldr r3, [r3, #0] - 800219c: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 80021a0: 2b00 cmp r3, #0 - 80021a2: d011 beq.n 80021c8 - assert_param(IS_RCC_PLLI2SQ_VALUE(PeriphClkInit->PLLI2S.PLLI2SQ)); - - /* Configure the PLLI2S division factors */ - /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) x (PLLI2SN/PLLI2SM) */ - /* SPDIFRXCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SP */ - __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN , PeriphClkInit->PLLI2S.PLLI2SP, PeriphClkInit->PLLI2S.PLLI2SQ, PeriphClkInit->PLLI2S.PLLI2SR); - 80021a4: 687b ldr r3, [r7, #4] - 80021a6: 685b ldr r3, [r3, #4] - 80021a8: 019a lsls r2, r3, #6 - 80021aa: 687b ldr r3, [r7, #4] - 80021ac: 691b ldr r3, [r3, #16] - 80021ae: 041b lsls r3, r3, #16 - 80021b0: 431a orrs r2, r3 - 80021b2: 687b ldr r3, [r7, #4] - 80021b4: 68db ldr r3, [r3, #12] - 80021b6: 061b lsls r3, r3, #24 - 80021b8: 431a orrs r2, r3 - 80021ba: 687b ldr r3, [r7, #4] - 80021bc: 689b ldr r3, [r3, #8] - 80021be: 071b lsls r3, r3, #28 - 80021c0: 4919 ldr r1, [pc, #100] ; (8002228 ) - 80021c2: 4313 orrs r3, r2 - 80021c4: f8c1 3084 str.w r3, [r1, #132] ; 0x84 + if (publishers[i] != 0) // non-empty slot + 800390e: 687a ldr r2, [r7, #4] + 8003910: 6a7b ldr r3, [r7, #36] ; 0x24 + 8003912: f503 73b4 add.w r3, r3, #360 ; 0x168 + 8003916: 009b lsls r3, r3, #2 + 8003918: 4413 add r3, r2 + 800391a: 685b ldr r3, [r3, #4] + 800391c: 2b00 cmp r3, #0 + 800391e: d056 beq.n 80039ce <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0xdc> + { + ti.topic_id = publishers[i]->id_; + 8003920: 687a ldr r2, [r7, #4] + 8003922: 6a7b ldr r3, [r7, #36] ; 0x24 + 8003924: f503 73b4 add.w r3, r3, #360 ; 0x168 + 8003928: 009b lsls r3, r3, #2 + 800392a: 4413 add r3, r2 + 800392c: 685b ldr r3, [r3, #4] + 800392e: 689b ldr r3, [r3, #8] + 8003930: b29b uxth r3, r3 + 8003932: 823b strh r3, [r7, #16] + ti.topic_name = (char *) publishers[i]->topic_; + 8003934: 687a ldr r2, [r7, #4] + 8003936: 6a7b ldr r3, [r7, #36] ; 0x24 + 8003938: f503 73b4 add.w r3, r3, #360 ; 0x168 + 800393c: 009b lsls r3, r3, #2 + 800393e: 4413 add r3, r2 + 8003940: 685b ldr r3, [r3, #4] + 8003942: 681b ldr r3, [r3, #0] + 8003944: 617b str r3, [r7, #20] + ti.message_type = (char *) publishers[i]->msg_->getType(); + 8003946: 687a ldr r2, [r7, #4] + 8003948: 6a7b ldr r3, [r7, #36] ; 0x24 + 800394a: f503 73b4 add.w r3, r3, #360 ; 0x168 + 800394e: 009b lsls r3, r3, #2 + 8003950: 4413 add r3, r2 + 8003952: 685b ldr r3, [r3, #4] + 8003954: 6859 ldr r1, [r3, #4] + 8003956: 687a ldr r2, [r7, #4] + 8003958: 6a7b ldr r3, [r7, #36] ; 0x24 + 800395a: f503 73b4 add.w r3, r3, #360 ; 0x168 + 800395e: 009b lsls r3, r3, #2 + 8003960: 4413 add r3, r2 + 8003962: 685b ldr r3, [r3, #4] + 8003964: 685b ldr r3, [r3, #4] + 8003966: 681b ldr r3, [r3, #0] + 8003968: 3308 adds r3, #8 + 800396a: 681b ldr r3, [r3, #0] + 800396c: 4608 mov r0, r1 + 800396e: 4798 blx r3 + 8003970: 4603 mov r3, r0 + 8003972: 61bb str r3, [r7, #24] + ti.md5sum = (char *) publishers[i]->msg_->getMD5(); + 8003974: 687a ldr r2, [r7, #4] + 8003976: 6a7b ldr r3, [r7, #36] ; 0x24 + 8003978: f503 73b4 add.w r3, r3, #360 ; 0x168 + 800397c: 009b lsls r3, r3, #2 + 800397e: 4413 add r3, r2 + 8003980: 685b ldr r3, [r3, #4] + 8003982: 6859 ldr r1, [r3, #4] + 8003984: 687a ldr r2, [r7, #4] + 8003986: 6a7b ldr r3, [r7, #36] ; 0x24 + 8003988: f503 73b4 add.w r3, r3, #360 ; 0x168 + 800398c: 009b lsls r3, r3, #2 + 800398e: 4413 add r3, r2 + 8003990: 685b ldr r3, [r3, #4] + 8003992: 685b ldr r3, [r3, #4] + 8003994: 681b ldr r3, [r3, #0] + 8003996: 330c adds r3, #12 + 8003998: 681b ldr r3, [r3, #0] + 800399a: 4608 mov r0, r1 + 800399c: 4798 blx r3 + 800399e: 4603 mov r3, r0 + 80039a0: 61fb str r3, [r7, #28] + ti.buffer_size = OUTPUT_SIZE; + 80039a2: f44f 7300 mov.w r3, #512 ; 0x200 + 80039a6: 623b str r3, [r7, #32] + publish(publishers[i]->getEndpointType(), &ti); + 80039a8: 687b ldr r3, [r7, #4] + 80039aa: 681b ldr r3, [r3, #0] + 80039ac: 681c ldr r4, [r3, #0] + 80039ae: 687a ldr r2, [r7, #4] + 80039b0: 6a7b ldr r3, [r7, #36] ; 0x24 + 80039b2: f503 73b4 add.w r3, r3, #360 ; 0x168 + 80039b6: 009b lsls r3, r3, #2 + 80039b8: 4413 add r3, r2 + 80039ba: 685b ldr r3, [r3, #4] + 80039bc: 4618 mov r0, r3 + 80039be: f7fd fe56 bl 800166e <_ZN3ros9Publisher15getEndpointTypeEv> + 80039c2: 4601 mov r1, r0 + 80039c4: f107 030c add.w r3, r7, #12 + 80039c8: 461a mov r2, r3 + 80039ca: 6878 ldr r0, [r7, #4] + 80039cc: 47a0 blx r4 + for (i = 0; i < MAX_PUBLISHERS; i++) + 80039ce: 6a7b ldr r3, [r7, #36] ; 0x24 + 80039d0: 3301 adds r3, #1 + 80039d2: 627b str r3, [r7, #36] ; 0x24 + 80039d4: e798 b.n 8003908 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x16> + } } - - /* Enable the PLLI2S */ - __HAL_RCC_PLLI2S_ENABLE(); - 80021c8: 4b17 ldr r3, [pc, #92] ; (8002228 ) - 80021ca: 681b ldr r3, [r3, #0] - 80021cc: 4a16 ldr r2, [pc, #88] ; (8002228 ) - 80021ce: f043 6380 orr.w r3, r3, #67108864 ; 0x4000000 - 80021d2: 6013 str r3, [r2, #0] - - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - 80021d4: f7fe fa0a bl 80005ec - 80021d8: 6178 str r0, [r7, #20] - - /* Wait till PLLI2S is ready */ - while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) == RESET) - 80021da: e008 b.n 80021ee + for (i = 0; i < MAX_SUBSCRIBERS; i++) + 80039d6: 2300 movs r3, #0 + 80039d8: 627b str r3, [r7, #36] ; 0x24 + 80039da: 6a7b ldr r3, [r7, #36] ; 0x24 + 80039dc: 2b18 cmp r3, #24 + 80039de: dc5f bgt.n 8003aa0 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x1ae> { - if((HAL_GetTick() - tickstart) > PLLI2S_TIMEOUT_VALUE) - 80021dc: f7fe fa06 bl 80005ec - 80021e0: 4602 mov r2, r0 - 80021e2: 697b ldr r3, [r7, #20] - 80021e4: 1ad3 subs r3, r2, r3 - 80021e6: 2b64 cmp r3, #100 ; 0x64 - 80021e8: d901 bls.n 80021ee + if (subscribers[i] != 0) // non-empty slot + 80039e0: 687b ldr r3, [r7, #4] + 80039e2: 6a7a ldr r2, [r7, #36] ; 0x24 + 80039e4: f502 72c1 add.w r2, r2, #386 ; 0x182 + 80039e8: f853 3022 ldr.w r3, [r3, r2, lsl #2] + 80039ec: 2b00 cmp r3, #0 + 80039ee: d053 beq.n 8003a98 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x1a6> { - /* return in case of Timeout detected */ - return HAL_TIMEOUT; - 80021ea: 2303 movs r3, #3 - 80021ec: e0d7 b.n 800239e - while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) == RESET) - 80021ee: 4b0e ldr r3, [pc, #56] ; (8002228 ) - 80021f0: 681b ldr r3, [r3, #0] - 80021f2: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 - 80021f6: 2b00 cmp r3, #0 - 80021f8: d0f0 beq.n 80021dc + ti.topic_id = subscribers[i]->id_; + 80039f0: 687b ldr r3, [r7, #4] + 80039f2: 6a7a ldr r2, [r7, #36] ; 0x24 + 80039f4: f502 72c1 add.w r2, r2, #386 ; 0x182 + 80039f8: f853 3022 ldr.w r3, [r3, r2, lsl #2] + 80039fc: 685b ldr r3, [r3, #4] + 80039fe: b29b uxth r3, r3 + 8003a00: 823b strh r3, [r7, #16] + ti.topic_name = (char *) subscribers[i]->topic_; + 8003a02: 687b ldr r3, [r7, #4] + 8003a04: 6a7a ldr r2, [r7, #36] ; 0x24 + 8003a06: f502 72c1 add.w r2, r2, #386 ; 0x182 + 8003a0a: f853 3022 ldr.w r3, [r3, r2, lsl #2] + 8003a0e: 689b ldr r3, [r3, #8] + 8003a10: 617b str r3, [r7, #20] + ti.message_type = (char *) subscribers[i]->getMsgType(); + 8003a12: 687b ldr r3, [r7, #4] + 8003a14: 6a7a ldr r2, [r7, #36] ; 0x24 + 8003a16: f502 72c1 add.w r2, r2, #386 ; 0x182 + 8003a1a: f853 1022 ldr.w r1, [r3, r2, lsl #2] + 8003a1e: 687b ldr r3, [r7, #4] + 8003a20: 6a7a ldr r2, [r7, #36] ; 0x24 + 8003a22: f502 72c1 add.w r2, r2, #386 ; 0x182 + 8003a26: f853 3022 ldr.w r3, [r3, r2, lsl #2] + 8003a2a: 681b ldr r3, [r3, #0] + 8003a2c: 3308 adds r3, #8 + 8003a2e: 681b ldr r3, [r3, #0] + 8003a30: 4608 mov r0, r1 + 8003a32: 4798 blx r3 + 8003a34: 4603 mov r3, r0 + 8003a36: 61bb str r3, [r7, #24] + ti.md5sum = (char *) subscribers[i]->getMsgMD5(); + 8003a38: 687b ldr r3, [r7, #4] + 8003a3a: 6a7a ldr r2, [r7, #36] ; 0x24 + 8003a3c: f502 72c1 add.w r2, r2, #386 ; 0x182 + 8003a40: f853 1022 ldr.w r1, [r3, r2, lsl #2] + 8003a44: 687b ldr r3, [r7, #4] + 8003a46: 6a7a ldr r2, [r7, #36] ; 0x24 + 8003a48: f502 72c1 add.w r2, r2, #386 ; 0x182 + 8003a4c: f853 3022 ldr.w r3, [r3, r2, lsl #2] + 8003a50: 681b ldr r3, [r3, #0] + 8003a52: 330c adds r3, #12 + 8003a54: 681b ldr r3, [r3, #0] + 8003a56: 4608 mov r0, r1 + 8003a58: 4798 blx r3 + 8003a5a: 4603 mov r3, r0 + 8003a5c: 61fb str r3, [r7, #28] + ti.buffer_size = INPUT_SIZE; + 8003a5e: f44f 7300 mov.w r3, #512 ; 0x200 + 8003a62: 623b str r3, [r7, #32] + publish(subscribers[i]->getEndpointType(), &ti); + 8003a64: 687b ldr r3, [r7, #4] + 8003a66: 681b ldr r3, [r3, #0] + 8003a68: 681c ldr r4, [r3, #0] + 8003a6a: 687b ldr r3, [r7, #4] + 8003a6c: 6a7a ldr r2, [r7, #36] ; 0x24 + 8003a6e: f502 72c1 add.w r2, r2, #386 ; 0x182 + 8003a72: f853 1022 ldr.w r1, [r3, r2, lsl #2] + 8003a76: 687b ldr r3, [r7, #4] + 8003a78: 6a7a ldr r2, [r7, #36] ; 0x24 + 8003a7a: f502 72c1 add.w r2, r2, #386 ; 0x182 + 8003a7e: f853 3022 ldr.w r3, [r3, r2, lsl #2] + 8003a82: 681b ldr r3, [r3, #0] + 8003a84: 3304 adds r3, #4 + 8003a86: 681b ldr r3, [r3, #0] + 8003a88: 4608 mov r0, r1 + 8003a8a: 4798 blx r3 + 8003a8c: 4601 mov r1, r0 + 8003a8e: f107 030c add.w r3, r7, #12 + 8003a92: 461a mov r2, r3 + 8003a94: 6878 ldr r0, [r7, #4] + 8003a96: 47a0 blx r4 + for (i = 0; i < MAX_SUBSCRIBERS; i++) + 8003a98: 6a7b ldr r3, [r7, #36] ; 0x24 + 8003a9a: 3301 adds r3, #1 + 8003a9c: 627b str r3, [r7, #36] ; 0x24 + 8003a9e: e79c b.n 80039da <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0xe8> + } } + configured_ = true; + 8003aa0: 687b ldr r3, [r7, #4] + 8003aa2: 2201 movs r2, #1 + 8003aa4: f883 2680 strb.w r2, [r3, #1664] ; 0x680 } + 8003aa8: bf00 nop + 8003aaa: 372c adds r7, #44 ; 0x2c + 8003aac: 46bd mov sp, r7 + 8003aae: bd90 pop {r4, r7, pc} - /*-------------------------------------- PLLSAI Configuration ---------------------------------*/ - /* PLLSAI is configured when a peripheral will use it as source clock : SAI1, SAI2, LTDC or CK48 */ - if(pllsaiused == 1) - 80021fa: 69bb ldr r3, [r7, #24] - 80021fc: 2b01 cmp r3, #1 - 80021fe: f040 80cd bne.w 800239c - { - /* Disable PLLSAI Clock */ - __HAL_RCC_PLLSAI_DISABLE(); - 8002202: 4b09 ldr r3, [pc, #36] ; (8002228 ) - 8002204: 681b ldr r3, [r3, #0] - 8002206: 4a08 ldr r2, [pc, #32] ; (8002228 ) - 8002208: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000 - 800220c: 6013 str r3, [r2, #0] - - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - 800220e: f7fe f9ed bl 80005ec - 8002212: 6178 str r0, [r7, #20] +08003ab0 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8syncTimeEPh>: + void syncTime(uint8_t * data) + 8003ab0: b580 push {r7, lr} + 8003ab2: b086 sub sp, #24 + 8003ab4: af00 add r7, sp, #0 + 8003ab6: 6078 str r0, [r7, #4] + 8003ab8: 6039 str r1, [r7, #0] + std_msgs::Time t; + 8003aba: f107 0308 add.w r3, r7, #8 + 8003abe: 4618 mov r0, r3 + 8003ac0: f7fc ff84 bl 80009cc <_ZN8std_msgs4TimeC1Ev> + uint32_t offset = hardware_.time() - rt_time; + 8003ac4: 687b ldr r3, [r7, #4] + 8003ac6: 3304 adds r3, #4 + 8003ac8: 4618 mov r0, r3 + 8003aca: f7fd fef1 bl 80018b0 <_ZN13STM32Hardware4timeEv> + 8003ace: 4602 mov r2, r0 + 8003ad0: 687b ldr r3, [r7, #4] + 8003ad2: f8d3 3194 ldr.w r3, [r3, #404] ; 0x194 + 8003ad6: 1ad3 subs r3, r2, r3 + 8003ad8: 617b str r3, [r7, #20] + t.deserialize(data); + 8003ada: f107 0308 add.w r3, r7, #8 + 8003ade: 6839 ldr r1, [r7, #0] + 8003ae0: 4618 mov r0, r3 + 8003ae2: f7fc ffe3 bl 8000aac <_ZN8std_msgs4Time11deserializeEPh> + t.data.sec += offset / 1000; + 8003ae6: 68fa ldr r2, [r7, #12] + 8003ae8: 697b ldr r3, [r7, #20] + 8003aea: 4915 ldr r1, [pc, #84] ; (8003b40 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8syncTimeEPh+0x90>) + 8003aec: fba1 1303 umull r1, r3, r1, r3 + 8003af0: 099b lsrs r3, r3, #6 + 8003af2: 4413 add r3, r2 + 8003af4: 60fb str r3, [r7, #12] + t.data.nsec += (offset % 1000) * 1000000UL; + 8003af6: 6939 ldr r1, [r7, #16] + 8003af8: 697a ldr r2, [r7, #20] + 8003afa: 4b11 ldr r3, [pc, #68] ; (8003b40 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8syncTimeEPh+0x90>) + 8003afc: fba3 0302 umull r0, r3, r3, r2 + 8003b00: 099b lsrs r3, r3, #6 + 8003b02: f44f 707a mov.w r0, #1000 ; 0x3e8 + 8003b06: fb00 f303 mul.w r3, r0, r3 + 8003b0a: 1ad3 subs r3, r2, r3 + 8003b0c: 4a0d ldr r2, [pc, #52] ; (8003b44 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8syncTimeEPh+0x94>) + 8003b0e: fb02 f303 mul.w r3, r2, r3 + 8003b12: 440b add r3, r1 + 8003b14: 613b str r3, [r7, #16] + this->setNow(t.data); + 8003b16: f107 0308 add.w r3, r7, #8 + 8003b1a: 3304 adds r3, #4 + 8003b1c: 4619 mov r1, r3 + 8003b1e: 6878 ldr r0, [r7, #4] + 8003b20: f000 f8a4 bl 8003c6c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE6setNowERNS_4TimeE> + last_sync_receive_time = hardware_.time(); + 8003b24: 687b ldr r3, [r7, #4] + 8003b26: 3304 adds r3, #4 + 8003b28: 4618 mov r0, r3 + 8003b2a: f7fd fec1 bl 80018b0 <_ZN13STM32Hardware4timeEv> + 8003b2e: 4602 mov r2, r0 + 8003b30: 687b ldr r3, [r7, #4] + 8003b32: f8c3 2688 str.w r2, [r3, #1672] ; 0x688 + } + 8003b36: bf00 nop + 8003b38: 3718 adds r7, #24 + 8003b3a: 46bd mov sp, r7 + 8003b3c: bd80 pop {r7, pc} + 8003b3e: bf00 nop + 8003b40: 10624dd3 .word 0x10624dd3 + 8003b44: 000f4240 .word 0x000f4240 - /* Wait till PLLSAI is disabled */ - while(__HAL_RCC_PLLSAI_GET_FLAG() != RESET) - 8002214: e00a b.n 800222c - { - if((HAL_GetTick() - tickstart) > PLLSAI_TIMEOUT_VALUE) - 8002216: f7fe f9e9 bl 80005ec - 800221a: 4602 mov r2, r0 - 800221c: 697b ldr r3, [r7, #20] - 800221e: 1ad3 subs r3, r2, r3 - 8002220: 2b64 cmp r3, #100 ; 0x64 - 8002222: d903 bls.n 800222c - { - /* return in case of Timeout detected */ - return HAL_TIMEOUT; - 8002224: 2303 movs r3, #3 - 8002226: e0ba b.n 800239e - 8002228: 40023800 .word 0x40023800 - while(__HAL_RCC_PLLSAI_GET_FLAG() != RESET) - 800222c: 4b5e ldr r3, [pc, #376] ; (80023a8 ) - 800222e: 681b ldr r3, [r3, #0] - 8002230: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 - 8002234: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 8002238: d0ed beq.n 8002216 +08003b48 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE>: - /* Check the PLLSAI division factors */ - assert_param(IS_RCC_PLLSAIN_VALUE(PeriphClkInit->PLLSAI.PLLSAIN)); + virtual int publish(int id, const Msg * msg) + 8003b48: b580 push {r7, lr} + 8003b4a: b088 sub sp, #32 + 8003b4c: af00 add r7, sp, #0 + 8003b4e: 60f8 str r0, [r7, #12] + 8003b50: 60b9 str r1, [r7, #8] + 8003b52: 607a str r2, [r7, #4] + { + if (id >= 100 && !configured_) + 8003b54: 68bb ldr r3, [r7, #8] + 8003b56: 2b63 cmp r3, #99 ; 0x63 + 8003b58: dd09 ble.n 8003b6e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x26> + 8003b5a: 68fb ldr r3, [r7, #12] + 8003b5c: f893 3680 ldrb.w r3, [r3, #1664] ; 0x680 + 8003b60: f083 0301 eor.w r3, r3, #1 + 8003b64: b2db uxtb r3, r3 + 8003b66: 2b00 cmp r3, #0 + 8003b68: d001 beq.n 8003b6e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x26> + return 0; + 8003b6a: 2300 movs r3, #0 + 8003b6c: e077 b.n 8003c5e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x116> - /*----------------- In Case of PLLSAI is selected as source clock for SAI -------------------*/ - if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) && (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLSAI)) ||\ - 800223a: 687b ldr r3, [r7, #4] - 800223c: 681b ldr r3, [r3, #0] - 800223e: f403 2300 and.w r3, r3, #524288 ; 0x80000 - 8002242: 2b00 cmp r3, #0 - 8002244: d003 beq.n 800224e - 8002246: 687b ldr r3, [r7, #4] - 8002248: 6bdb ldr r3, [r3, #60] ; 0x3c - 800224a: 2b00 cmp r3, #0 - 800224c: d009 beq.n 8002262 - ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLSAI))) - 800224e: 687b ldr r3, [r7, #4] - 8002250: 681b ldr r3, [r3, #0] - 8002252: f403 1380 and.w r3, r3, #1048576 ; 0x100000 - if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) && (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLSAI)) ||\ - 8002256: 2b00 cmp r3, #0 - 8002258: d02e beq.n 80022b8 - ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLSAI))) - 800225a: 687b ldr r3, [r7, #4] - 800225c: 6c1b ldr r3, [r3, #64] ; 0x40 - 800225e: 2b00 cmp r3, #0 - 8002260: d12a bne.n 80022b8 - assert_param(IS_RCC_PLLSAIQ_VALUE(PeriphClkInit->PLLSAI.PLLSAIQ)); - /* check for PLLSAI/DIVQ Parameter */ - assert_param(IS_RCC_PLLSAI_DIVQ_VALUE(PeriphClkInit->PLLSAIDivQ)); + /* serialize message */ + int l = msg->serialize(message_out + 7); + 8003b6e: 687b ldr r3, [r7, #4] + 8003b70: 681b ldr r3, [r3, #0] + 8003b72: 681b ldr r3, [r3, #0] + 8003b74: 68fa ldr r2, [r7, #12] + 8003b76: f502 7269 add.w r2, r2, #932 ; 0x3a4 + 8003b7a: 3207 adds r2, #7 + 8003b7c: 4611 mov r1, r2 + 8003b7e: 6878 ldr r0, [r7, #4] + 8003b80: 4798 blx r3 + 8003b82: 6178 str r0, [r7, #20] - /* Read PLLSAIP value from PLLSAICFGR register (this value is not needed for SAI configuration) */ - tmpreg0 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIP) >> RCC_PLLSAICFGR_PLLSAIP_Pos); - 8002262: 4b51 ldr r3, [pc, #324] ; (80023a8 ) - 8002264: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 - 8002268: 0c1b lsrs r3, r3, #16 - 800226a: f003 0303 and.w r3, r3, #3 - 800226e: 613b str r3, [r7, #16] - tmpreg1 = ((RCC->PLLSAICFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLSAICFGR_PLLSAIR_Pos); - 8002270: 4b4d ldr r3, [pc, #308] ; (80023a8 ) - 8002272: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 - 8002276: 0f1b lsrs r3, r3, #28 - 8002278: f003 0307 and.w r3, r3, #7 - 800227c: 60fb str r3, [r7, #12] - /* PLLSAI_VCO Input = PLL_SOURCE/PLLM */ - /* PLLSAI_VCO Output = PLLSAI_VCO Input * PLLSAIN */ - /* SAI_CLK(first level) = PLLSAI_VCO Output/PLLSAIQ */ - __HAL_RCC_PLLSAI_CONFIG(PeriphClkInit->PLLSAI.PLLSAIN , tmpreg0, PeriphClkInit->PLLSAI.PLLSAIQ, tmpreg1); - 800227e: 687b ldr r3, [r7, #4] - 8002280: 695b ldr r3, [r3, #20] - 8002282: 019a lsls r2, r3, #6 - 8002284: 693b ldr r3, [r7, #16] - 8002286: 041b lsls r3, r3, #16 - 8002288: 431a orrs r2, r3 - 800228a: 687b ldr r3, [r7, #4] - 800228c: 699b ldr r3, [r3, #24] - 800228e: 061b lsls r3, r3, #24 - 8002290: 431a orrs r2, r3 - 8002292: 68fb ldr r3, [r7, #12] - 8002294: 071b lsls r3, r3, #28 - 8002296: 4944 ldr r1, [pc, #272] ; (80023a8 ) - 8002298: 4313 orrs r3, r2 - 800229a: f8c1 3088 str.w r3, [r1, #136] ; 0x88 + /* setup the header */ + message_out[0] = 0xff; + 8003b84: 68fb ldr r3, [r7, #12] + 8003b86: 22ff movs r2, #255 ; 0xff + 8003b88: f883 23a4 strb.w r2, [r3, #932] ; 0x3a4 + message_out[1] = PROTOCOL_VER; + 8003b8c: 68fb ldr r3, [r7, #12] + 8003b8e: 22fe movs r2, #254 ; 0xfe + 8003b90: f883 23a5 strb.w r2, [r3, #933] ; 0x3a5 + message_out[2] = (uint8_t)((uint16_t)l & 255); + 8003b94: 697b ldr r3, [r7, #20] + 8003b96: b2da uxtb r2, r3 + 8003b98: 68fb ldr r3, [r7, #12] + 8003b9a: f883 23a6 strb.w r2, [r3, #934] ; 0x3a6 + message_out[3] = (uint8_t)((uint16_t)l >> 8); + 8003b9e: 697b ldr r3, [r7, #20] + 8003ba0: b29b uxth r3, r3 + 8003ba2: 121b asrs r3, r3, #8 + 8003ba4: b2da uxtb r2, r3 + 8003ba6: 68fb ldr r3, [r7, #12] + 8003ba8: f883 23a7 strb.w r2, [r3, #935] ; 0x3a7 + message_out[4] = 255 - ((message_out[2] + message_out[3]) % 256); + 8003bac: 68fb ldr r3, [r7, #12] + 8003bae: f893 23a6 ldrb.w r2, [r3, #934] ; 0x3a6 + 8003bb2: 68fb ldr r3, [r7, #12] + 8003bb4: f893 33a7 ldrb.w r3, [r3, #935] ; 0x3a7 + 8003bb8: 4413 add r3, r2 + 8003bba: b2db uxtb r3, r3 + 8003bbc: 43db mvns r3, r3 + 8003bbe: b2da uxtb r2, r3 + 8003bc0: 68fb ldr r3, [r7, #12] + 8003bc2: f883 23a8 strb.w r2, [r3, #936] ; 0x3a8 + message_out[5] = (uint8_t)((int16_t)id & 255); + 8003bc6: 68bb ldr r3, [r7, #8] + 8003bc8: b2da uxtb r2, r3 + 8003bca: 68fb ldr r3, [r7, #12] + 8003bcc: f883 23a9 strb.w r2, [r3, #937] ; 0x3a9 + message_out[6] = (uint8_t)((int16_t)id >> 8); + 8003bd0: 68bb ldr r3, [r7, #8] + 8003bd2: b21b sxth r3, r3 + 8003bd4: 121b asrs r3, r3, #8 + 8003bd6: b2da uxtb r2, r3 + 8003bd8: 68fb ldr r3, [r7, #12] + 8003bda: f883 23aa strb.w r2, [r3, #938] ; 0x3aa - /* SAI_CLK_x = SAI_CLK(first level)/PLLSAIDIVQ */ - __HAL_RCC_PLLSAI_PLLSAICLKDIVQ_CONFIG(PeriphClkInit->PLLSAIDivQ); - 800229e: 4b42 ldr r3, [pc, #264] ; (80023a8 ) - 80022a0: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c - 80022a4: f423 52f8 bic.w r2, r3, #7936 ; 0x1f00 - 80022a8: 687b ldr r3, [r7, #4] - 80022aa: 6a9b ldr r3, [r3, #40] ; 0x28 - 80022ac: 3b01 subs r3, #1 - 80022ae: 021b lsls r3, r3, #8 - 80022b0: 493d ldr r1, [pc, #244] ; (80023a8 ) - 80022b2: 4313 orrs r3, r2 - 80022b4: f8c1 308c str.w r3, [r1, #140] ; 0x8c - } + /* calculate checksum */ + int chk = 0; + 8003bde: 2300 movs r3, #0 + 8003be0: 61fb str r3, [r7, #28] + for (int i = 5; i < l + 7; i++) + 8003be2: 2305 movs r3, #5 + 8003be4: 61bb str r3, [r7, #24] + 8003be6: 697b ldr r3, [r7, #20] + 8003be8: 3307 adds r3, #7 + 8003bea: 69ba ldr r2, [r7, #24] + 8003bec: 429a cmp r2, r3 + 8003bee: da0d bge.n 8003c0c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0xc4> + chk += message_out[i]; + 8003bf0: 68fa ldr r2, [r7, #12] + 8003bf2: 69bb ldr r3, [r7, #24] + 8003bf4: 4413 add r3, r2 + 8003bf6: f503 7369 add.w r3, r3, #932 ; 0x3a4 + 8003bfa: 781b ldrb r3, [r3, #0] + 8003bfc: 461a mov r2, r3 + 8003bfe: 69fb ldr r3, [r7, #28] + 8003c00: 4413 add r3, r2 + 8003c02: 61fb str r3, [r7, #28] + for (int i = 5; i < l + 7; i++) + 8003c04: 69bb ldr r3, [r7, #24] + 8003c06: 3301 adds r3, #1 + 8003c08: 61bb str r3, [r7, #24] + 8003c0a: e7ec b.n 8003be6 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x9e> + l += 7; + 8003c0c: 697b ldr r3, [r7, #20] + 8003c0e: 3307 adds r3, #7 + 8003c10: 617b str r3, [r7, #20] + message_out[l++] = 255 - (chk % 256); + 8003c12: 69fb ldr r3, [r7, #28] + 8003c14: 425a negs r2, r3 + 8003c16: b2db uxtb r3, r3 + 8003c18: b2d2 uxtb r2, r2 + 8003c1a: bf58 it pl + 8003c1c: 4253 negpl r3, r2 + 8003c1e: b2da uxtb r2, r3 + 8003c20: 697b ldr r3, [r7, #20] + 8003c22: 1c59 adds r1, r3, #1 + 8003c24: 6179 str r1, [r7, #20] + 8003c26: 43d2 mvns r2, r2 + 8003c28: b2d1 uxtb r1, r2 + 8003c2a: 68fa ldr r2, [r7, #12] + 8003c2c: 4413 add r3, r2 + 8003c2e: 460a mov r2, r1 + 8003c30: f883 23a4 strb.w r2, [r3, #932] ; 0x3a4 - /*----------------- In Case of PLLSAI is selected as source clock for CLK48 -------------------*/ - /* In Case of PLLI2S is selected as source clock for CK48 */ - if((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CLK48) == RCC_PERIPHCLK_CLK48) && (PeriphClkInit->Clk48ClockSelection == RCC_CLK48SOURCE_PLLSAIP)) - 80022b8: 687b ldr r3, [r7, #4] - 80022ba: 681b ldr r3, [r3, #0] - 80022bc: f403 1300 and.w r3, r3, #2097152 ; 0x200000 - 80022c0: 2b00 cmp r3, #0 - 80022c2: d022 beq.n 800230a - 80022c4: 687b ldr r3, [r7, #4] - 80022c6: 6fdb ldr r3, [r3, #124] ; 0x7c - 80022c8: f1b3 6f00 cmp.w r3, #134217728 ; 0x8000000 - 80022cc: d11d bne.n 800230a - { - /* check for Parameters */ - assert_param(IS_RCC_PLLSAIP_VALUE(PeriphClkInit->PLLSAI.PLLSAIP)); - /* Read PLLSAIQ and PLLSAIR value from PLLSAICFGR register (this value is not needed for CK48 configuration) */ - tmpreg0 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIQ) >> RCC_PLLSAICFGR_PLLSAIQ_Pos); - 80022ce: 4b36 ldr r3, [pc, #216] ; (80023a8 ) - 80022d0: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 - 80022d4: 0e1b lsrs r3, r3, #24 - 80022d6: f003 030f and.w r3, r3, #15 - 80022da: 613b str r3, [r7, #16] - tmpreg1 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIR) >> RCC_PLLSAICFGR_PLLSAIR_Pos); - 80022dc: 4b32 ldr r3, [pc, #200] ; (80023a8 ) - 80022de: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 - 80022e2: 0f1b lsrs r3, r3, #28 - 80022e4: f003 0307 and.w r3, r3, #7 - 80022e8: 60fb str r3, [r7, #12] - - /* Configure the PLLSAI division factors */ - /* PLLSAI_VCO = f(VCO clock) = f(PLLSAI clock input) x (PLLI2SN/PLLM) */ - /* 48CLK = f(PLLSAI clock output) = f(VCO clock) / PLLSAIP */ - __HAL_RCC_PLLSAI_CONFIG(PeriphClkInit->PLLSAI.PLLSAIN , PeriphClkInit->PLLSAI.PLLSAIP, tmpreg0, tmpreg1); - 80022ea: 687b ldr r3, [r7, #4] - 80022ec: 695b ldr r3, [r3, #20] - 80022ee: 019a lsls r2, r3, #6 - 80022f0: 687b ldr r3, [r7, #4] - 80022f2: 6a1b ldr r3, [r3, #32] - 80022f4: 041b lsls r3, r3, #16 - 80022f6: 431a orrs r2, r3 - 80022f8: 693b ldr r3, [r7, #16] - 80022fa: 061b lsls r3, r3, #24 - 80022fc: 431a orrs r2, r3 - 80022fe: 68fb ldr r3, [r7, #12] - 8002300: 071b lsls r3, r3, #28 - 8002302: 4929 ldr r1, [pc, #164] ; (80023a8 ) - 8002304: 4313 orrs r3, r2 - 8002306: f8c1 3088 str.w r3, [r1, #136] ; 0x88 - } - -#if defined(STM32F746xx) || defined(STM32F756xx) || defined (STM32F767xx) || defined (STM32F769xx) || defined (STM32F777xx) || defined (STM32F779xx) || defined (STM32F750xx) - /*---------------------------- LTDC configuration -------------------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LTDC) == (RCC_PERIPHCLK_LTDC)) - 800230a: 687b ldr r3, [r7, #4] - 800230c: 681b ldr r3, [r3, #0] - 800230e: f003 0308 and.w r3, r3, #8 - 8002312: 2b00 cmp r3, #0 - 8002314: d028 beq.n 8002368 + if (l <= OUTPUT_SIZE) + 8003c34: 697b ldr r3, [r7, #20] + 8003c36: f5b3 7f00 cmp.w r3, #512 ; 0x200 + 8003c3a: dc0a bgt.n 8003c52 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x10a> { - assert_param(IS_RCC_PLLSAIR_VALUE(PeriphClkInit->PLLSAI.PLLSAIR)); - assert_param(IS_RCC_PLLSAI_DIVR_VALUE(PeriphClkInit->PLLSAIDivR)); - - /* Read PLLSAIP and PLLSAIQ value from PLLSAICFGR register (these value are not needed for LTDC configuration) */ - tmpreg0 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIQ) >> RCC_PLLSAICFGR_PLLSAIQ_Pos); - 8002316: 4b24 ldr r3, [pc, #144] ; (80023a8 ) - 8002318: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 - 800231c: 0e1b lsrs r3, r3, #24 - 800231e: f003 030f and.w r3, r3, #15 - 8002322: 613b str r3, [r7, #16] - tmpreg1 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIP) >> RCC_PLLSAICFGR_PLLSAIP_Pos); - 8002324: 4b20 ldr r3, [pc, #128] ; (80023a8 ) - 8002326: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 - 800232a: 0c1b lsrs r3, r3, #16 - 800232c: f003 0303 and.w r3, r3, #3 - 8002330: 60fb str r3, [r7, #12] - - /* PLLSAI_VCO Input = PLL_SOURCE/PLLM */ - /* PLLSAI_VCO Output = PLLSAI_VCO Input * PLLSAIN */ - /* LTDC_CLK(first level) = PLLSAI_VCO Output/PLLSAIR */ - __HAL_RCC_PLLSAI_CONFIG(PeriphClkInit->PLLSAI.PLLSAIN , tmpreg1, tmpreg0, PeriphClkInit->PLLSAI.PLLSAIR); - 8002332: 687b ldr r3, [r7, #4] - 8002334: 695b ldr r3, [r3, #20] - 8002336: 019a lsls r2, r3, #6 - 8002338: 68fb ldr r3, [r7, #12] - 800233a: 041b lsls r3, r3, #16 - 800233c: 431a orrs r2, r3 - 800233e: 693b ldr r3, [r7, #16] - 8002340: 061b lsls r3, r3, #24 - 8002342: 431a orrs r2, r3 - 8002344: 687b ldr r3, [r7, #4] - 8002346: 69db ldr r3, [r3, #28] - 8002348: 071b lsls r3, r3, #28 - 800234a: 4917 ldr r1, [pc, #92] ; (80023a8 ) - 800234c: 4313 orrs r3, r2 - 800234e: f8c1 3088 str.w r3, [r1, #136] ; 0x88 - - /* LTDC_CLK = LTDC_CLK(first level)/PLLSAIDIVR */ - __HAL_RCC_PLLSAI_PLLSAICLKDIVR_CONFIG(PeriphClkInit->PLLSAIDivR); - 8002352: 4b15 ldr r3, [pc, #84] ; (80023a8 ) - 8002354: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c - 8002358: f423 3240 bic.w r2, r3, #196608 ; 0x30000 - 800235c: 687b ldr r3, [r7, #4] - 800235e: 6adb ldr r3, [r3, #44] ; 0x2c - 8002360: 4911 ldr r1, [pc, #68] ; (80023a8 ) - 8002362: 4313 orrs r3, r2 - 8002364: f8c1 308c str.w r3, [r1, #140] ; 0x8c + hardware_.write(message_out, l); + 8003c3c: 68fb ldr r3, [r7, #12] + 8003c3e: 1d18 adds r0, r3, #4 + 8003c40: 68fb ldr r3, [r7, #12] + 8003c42: f503 7369 add.w r3, r3, #932 ; 0x3a4 + 8003c46: 697a ldr r2, [r7, #20] + 8003c48: 4619 mov r1, r3 + 8003c4a: f7fd fded bl 8001828 <_ZN13STM32Hardware5writeEPhi> + return l; + 8003c4e: 697b ldr r3, [r7, #20] + 8003c50: e005 b.n 8003c5e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x116> } -#endif /* STM32F746xx || STM32F756xx || STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx || STM32F750xx */ - - /* Enable PLLSAI Clock */ - __HAL_RCC_PLLSAI_ENABLE(); - 8002368: 4b0f ldr r3, [pc, #60] ; (80023a8 ) - 800236a: 681b ldr r3, [r3, #0] - 800236c: 4a0e ldr r2, [pc, #56] ; (80023a8 ) - 800236e: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 - 8002372: 6013 str r3, [r2, #0] - - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - 8002374: f7fe f93a bl 80005ec - 8002378: 6178 str r0, [r7, #20] - - /* Wait till PLLSAI is ready */ - while(__HAL_RCC_PLLSAI_GET_FLAG() == RESET) - 800237a: e008 b.n 800238e + else { - if((HAL_GetTick() - tickstart) > PLLSAI_TIMEOUT_VALUE) - 800237c: f7fe f936 bl 80005ec - 8002380: 4602 mov r2, r0 - 8002382: 697b ldr r3, [r7, #20] - 8002384: 1ad3 subs r3, r2, r3 - 8002386: 2b64 cmp r3, #100 ; 0x64 - 8002388: d901 bls.n 800238e - { - /* return in case of Timeout detected */ - return HAL_TIMEOUT; - 800238a: 2303 movs r3, #3 - 800238c: e007 b.n 800239e - while(__HAL_RCC_PLLSAI_GET_FLAG() == RESET) - 800238e: 4b06 ldr r3, [pc, #24] ; (80023a8 ) - 8002390: 681b ldr r3, [r3, #0] - 8002392: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 - 8002396: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 800239a: d1ef bne.n 800237c - } + logerror("Message from device dropped: message larger than buffer."); + 8003c52: 4905 ldr r1, [pc, #20] ; (8003c68 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x120>) + 8003c54: 68f8 ldr r0, [r7, #12] + 8003c56: f000 f849 bl 8003cec <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8logerrorEPKc> + return -1; + 8003c5a: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff } } - return HAL_OK; - 800239c: 2300 movs r3, #0 -} - 800239e: 4618 mov r0, r3 - 80023a0: 3720 adds r7, #32 - 80023a2: 46bd mov sp, r7 - 80023a4: bd80 pop {r7, pc} - 80023a6: bf00 nop - 80023a8: 40023800 .word 0x40023800 - -080023ac : - * Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init() - * @param htim TIM Base handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim) -{ - 80023ac: b580 push {r7, lr} - 80023ae: b082 sub sp, #8 - 80023b0: af00 add r7, sp, #0 - 80023b2: 6078 str r0, [r7, #4] - /* Check the TIM handle allocation */ - if (htim == NULL) - 80023b4: 687b ldr r3, [r7, #4] - 80023b6: 2b00 cmp r3, #0 - 80023b8: d101 bne.n 80023be + 8003c5e: 4618 mov r0, r3 + 8003c60: 3720 adds r7, #32 + 8003c62: 46bd mov sp, r7 + 8003c64: bd80 pop {r7, pc} + 8003c66: bf00 nop + 8003c68: 0800a42c .word 0x0800a42c + +08003c6c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE6setNowERNS_4TimeE>: + void setNow(Time & new_now) + 8003c6c: b580 push {r7, lr} + 8003c6e: b084 sub sp, #16 + 8003c70: af00 add r7, sp, #0 + 8003c72: 6078 str r0, [r7, #4] + 8003c74: 6039 str r1, [r7, #0] + uint32_t ms = hardware_.time(); + 8003c76: 687b ldr r3, [r7, #4] + 8003c78: 3304 adds r3, #4 + 8003c7a: 4618 mov r0, r3 + 8003c7c: f7fd fe18 bl 80018b0 <_ZN13STM32Hardware4timeEv> + 8003c80: 60f8 str r0, [r7, #12] + sec_offset = new_now.sec - ms / 1000 - 1; + 8003c82: 683b ldr r3, [r7, #0] + 8003c84: 681a ldr r2, [r3, #0] + 8003c86: 68fb ldr r3, [r7, #12] + 8003c88: 4915 ldr r1, [pc, #84] ; (8003ce0 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE6setNowERNS_4TimeE+0x74>) + 8003c8a: fba1 1303 umull r1, r3, r1, r3 + 8003c8e: 099b lsrs r3, r3, #6 + 8003c90: 1ad3 subs r3, r2, r3 + 8003c92: 1e5a subs r2, r3, #1 + 8003c94: 687b ldr r3, [r7, #4] + 8003c96: f8c3 2198 str.w r2, [r3, #408] ; 0x198 + nsec_offset = new_now.nsec - (ms % 1000) * 1000000UL + 1000000000UL; + 8003c9a: 683b ldr r3, [r7, #0] + 8003c9c: 6859 ldr r1, [r3, #4] + 8003c9e: 68fa ldr r2, [r7, #12] + 8003ca0: 4b0f ldr r3, [pc, #60] ; (8003ce0 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE6setNowERNS_4TimeE+0x74>) + 8003ca2: fba3 0302 umull r0, r3, r3, r2 + 8003ca6: 099b lsrs r3, r3, #6 + 8003ca8: f44f 707a mov.w r0, #1000 ; 0x3e8 + 8003cac: fb00 f303 mul.w r3, r0, r3 + 8003cb0: 1ad3 subs r3, r2, r3 + 8003cb2: 4a0c ldr r2, [pc, #48] ; (8003ce4 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE6setNowERNS_4TimeE+0x78>) + 8003cb4: fb02 f303 mul.w r3, r2, r3 + 8003cb8: 1aca subs r2, r1, r3 + 8003cba: 4b0b ldr r3, [pc, #44] ; (8003ce8 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE6setNowERNS_4TimeE+0x7c>) + 8003cbc: 4413 add r3, r2 + 8003cbe: 687a ldr r2, [r7, #4] + 8003cc0: f8c2 319c str.w r3, [r2, #412] ; 0x19c + normalizeSecNSec(sec_offset, nsec_offset); + 8003cc4: 687b ldr r3, [r7, #4] + 8003cc6: f503 72cc add.w r2, r3, #408 ; 0x198 + 8003cca: 687b ldr r3, [r7, #4] + 8003ccc: f503 73ce add.w r3, r3, #412 ; 0x19c + 8003cd0: 4619 mov r1, r3 + 8003cd2: 4610 mov r0, r2 + 8003cd4: f000 fd7e bl 80047d4 <_ZN3ros16normalizeSecNSecERmS0_> + } + 8003cd8: bf00 nop + 8003cda: 3710 adds r7, #16 + 8003cdc: 46bd mov sp, r7 + 8003cde: bd80 pop {r7, pc} + 8003ce0: 10624dd3 .word 0x10624dd3 + 8003ce4: 000f4240 .word 0x000f4240 + 8003ce8: 3b9aca00 .word 0x3b9aca00 + +08003cec <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8logerrorEPKc>: + } + void logwarn(const char *msg) { - return HAL_ERROR; - 80023ba: 2301 movs r3, #1 - 80023bc: e01d b.n 80023fa - assert_param(IS_TIM_INSTANCE(htim->Instance)); - assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); - assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); - assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); - - if (htim->State == HAL_TIM_STATE_RESET) - 80023be: 687b ldr r3, [r7, #4] - 80023c0: f893 303d ldrb.w r3, [r3, #61] ; 0x3d - 80023c4: b2db uxtb r3, r3 - 80023c6: 2b00 cmp r3, #0 - 80023c8: d106 bne.n 80023d8 + log(rosserial_msgs::Log::WARN, msg); + } + void logerror(const char*msg) + 8003cec: b580 push {r7, lr} + 8003cee: b082 sub sp, #8 + 8003cf0: af00 add r7, sp, #0 + 8003cf2: 6078 str r0, [r7, #4] + 8003cf4: 6039 str r1, [r7, #0] { - /* Allocate lock resource and initialize it */ - htim->Lock = HAL_UNLOCKED; - 80023ca: 687b ldr r3, [r7, #4] - 80023cc: 2200 movs r2, #0 - 80023ce: f883 203c strb.w r2, [r3, #60] ; 0x3c - } - /* Init the low level hardware : GPIO, CLOCK, NVIC */ - htim->Base_MspInitCallback(htim); -#else - /* Init the low level hardware : GPIO, CLOCK, NVIC */ - HAL_TIM_Base_MspInit(htim); - 80023d2: 6878 ldr r0, [r7, #4] - 80023d4: f005 fe18 bl 8008008 -#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + log(rosserial_msgs::Log::ERROR, msg); + 8003cf6: 683a ldr r2, [r7, #0] + 8003cf8: 2103 movs r1, #3 + 8003cfa: 6878 ldr r0, [r7, #4] + 8003cfc: f000 f804 bl 8003d08 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE3logEcPKc> } + 8003d00: bf00 nop + 8003d02: 3708 adds r7, #8 + 8003d04: 46bd mov sp, r7 + 8003d06: bd80 pop {r7, pc} - /* Set the TIM state */ - htim->State = HAL_TIM_STATE_BUSY; - 80023d8: 687b ldr r3, [r7, #4] - 80023da: 2202 movs r2, #2 - 80023dc: f883 203d strb.w r2, [r3, #61] ; 0x3d - - /* Set the Time Base configuration */ - TIM_Base_SetConfig(htim->Instance, &htim->Init); - 80023e0: 687b ldr r3, [r7, #4] - 80023e2: 681a ldr r2, [r3, #0] - 80023e4: 687b ldr r3, [r7, #4] - 80023e6: 3304 adds r3, #4 - 80023e8: 4619 mov r1, r3 - 80023ea: 4610 mov r0, r2 - 80023ec: f000 fc42 bl 8002c74 +08003d08 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE3logEcPKc>: + void log(char byte, const char * msg) + 8003d08: b580 push {r7, lr} + 8003d0a: b088 sub sp, #32 + 8003d0c: af00 add r7, sp, #0 + 8003d0e: 60f8 str r0, [r7, #12] + 8003d10: 460b mov r3, r1 + 8003d12: 607a str r2, [r7, #4] + 8003d14: 72fb strb r3, [r7, #11] + rosserial_msgs::Log l; + 8003d16: f107 0314 add.w r3, r7, #20 + 8003d1a: 4618 mov r0, r3 + 8003d1c: f7fd f90a bl 8000f34 <_ZN14rosserial_msgs3LogC1Ev> + l.level = byte; + 8003d20: 7afb ldrb r3, [r7, #11] + 8003d22: 763b strb r3, [r7, #24] + l.msg = (char*)msg; + 8003d24: 687b ldr r3, [r7, #4] + 8003d26: 61fb str r3, [r7, #28] + publish(rosserial_msgs::TopicInfo::ID_LOG, &l); + 8003d28: 68fb ldr r3, [r7, #12] + 8003d2a: 681b ldr r3, [r3, #0] + 8003d2c: 681b ldr r3, [r3, #0] + 8003d2e: f107 0214 add.w r2, r7, #20 + 8003d32: 2107 movs r1, #7 + 8003d34: 68f8 ldr r0, [r7, #12] + 8003d36: 4798 blx r3 + } + 8003d38: bf00 nop + 8003d3a: 3720 adds r7, #32 + 8003d3c: 46bd mov sp, r7 + 8003d3e: bd80 pop {r7, pc} + +08003d40 <_Z41__static_initialization_and_destruction_0ii>: + 8003d40: b5f0 push {r4, r5, r6, r7, lr} + 8003d42: b08f sub sp, #60 ; 0x3c + 8003d44: af0c add r7, sp, #48 ; 0x30 + 8003d46: 6078 str r0, [r7, #4] + 8003d48: 6039 str r1, [r7, #0] + 8003d4a: 687b ldr r3, [r7, #4] + 8003d4c: 2b01 cmp r3, #1 + 8003d4e: d136 bne.n 8003dbe <_Z41__static_initialization_and_destruction_0ii+0x7e> + 8003d50: 683b ldr r3, [r7, #0] + 8003d52: f64f 72ff movw r2, #65535 ; 0xffff + 8003d56: 4293 cmp r3, r2 + 8003d58: d131 bne.n 8003dbe <_Z41__static_initialization_and_destruction_0ii+0x7e> +Encoder left_encoder = Encoder(&htim2); + 8003d5a: 491b ldr r1, [pc, #108] ; (8003dc8 <_Z41__static_initialization_and_destruction_0ii+0x88>) + 8003d5c: 481b ldr r0, [pc, #108] ; (8003dcc <_Z41__static_initialization_and_destruction_0ii+0x8c>) + 8003d5e: f7fc fc1b bl 8000598 <_ZN7EncoderC1EP17TIM_HandleTypeDef> +Encoder right_encoder = Encoder(&htim5); + 8003d62: 491b ldr r1, [pc, #108] ; (8003dd0 <_Z41__static_initialization_and_destruction_0ii+0x90>) + 8003d64: 481b ldr r0, [pc, #108] ; (8003dd4 <_Z41__static_initialization_and_destruction_0ii+0x94>) + 8003d66: f7fc fc17 bl 8000598 <_ZN7EncoderC1EP17TIM_HandleTypeDef> +OdometryCalc odom = OdometryCalc(left_encoder, right_encoder); + 8003d6a: 4e18 ldr r6, [pc, #96] ; (8003dcc <_Z41__static_initialization_and_destruction_0ii+0x8c>) + 8003d6c: 4b19 ldr r3, [pc, #100] ; (8003dd4 <_Z41__static_initialization_and_destruction_0ii+0x94>) + 8003d6e: ac04 add r4, sp, #16 + 8003d70: 461d mov r5, r3 + 8003d72: cd0f ldmia r5!, {r0, r1, r2, r3} + 8003d74: c40f stmia r4!, {r0, r1, r2, r3} + 8003d76: e895 0007 ldmia.w r5, {r0, r1, r2} + 8003d7a: e884 0007 stmia.w r4, {r0, r1, r2} + 8003d7e: 466c mov r4, sp + 8003d80: f106 030c add.w r3, r6, #12 + 8003d84: cb0f ldmia r3, {r0, r1, r2, r3} + 8003d86: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8003d8a: e896 000e ldmia.w r6, {r1, r2, r3} + 8003d8e: 4812 ldr r0, [pc, #72] ; (8003dd8 <_Z41__static_initialization_and_destruction_0ii+0x98>) + 8003d90: f7fe fca2 bl 80026d8 <_ZN12OdometryCalcC1E7EncoderS0_> +ros::NodeHandle nh; + 8003d94: 4811 ldr r0, [pc, #68] ; (8003ddc <_Z41__static_initialization_and_destruction_0ii+0x9c>) + 8003d96: f7ff fad9 bl 800334c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev> +std_msgs::String str_msg; + 8003d9a: 4811 ldr r0, [pc, #68] ; (8003de0 <_Z41__static_initialization_and_destruction_0ii+0xa0>) + 8003d9c: f7fc fd68 bl 8000870 <_ZN8std_msgs6StringC1Ev> +ros::Publisher chatter("chatter", &str_msg); + 8003da0: 2300 movs r3, #0 + 8003da2: 4a0f ldr r2, [pc, #60] ; (8003de0 <_Z41__static_initialization_and_destruction_0ii+0xa0>) + 8003da4: 490f ldr r1, [pc, #60] ; (8003de4 <_Z41__static_initialization_and_destruction_0ii+0xa4>) + 8003da6: 4810 ldr r0, [pc, #64] ; (8003de8 <_Z41__static_initialization_and_destruction_0ii+0xa8>) + 8003da8: f7fd fc36 bl 8001618 <_ZN3ros9PublisherC1EPKcPNS_3MsgEi> +nav_msgs::Odometry odometry; + 8003dac: 480f ldr r0, [pc, #60] ; (8003dec <_Z41__static_initialization_and_destruction_0ii+0xac>) + 8003dae: f7fe fb9d bl 80024ec <_ZN8nav_msgs8OdometryC1Ev> +ros::Publisher odom_pub("odom_pub", &odometry); + 8003db2: 2300 movs r3, #0 + 8003db4: 4a0d ldr r2, [pc, #52] ; (8003dec <_Z41__static_initialization_and_destruction_0ii+0xac>) + 8003db6: 490e ldr r1, [pc, #56] ; (8003df0 <_Z41__static_initialization_and_destruction_0ii+0xb0>) + 8003db8: 480e ldr r0, [pc, #56] ; (8003df4 <_Z41__static_initialization_and_destruction_0ii+0xb4>) + 8003dba: f7fd fc2d bl 8001618 <_ZN3ros9PublisherC1EPKcPNS_3MsgEi> +} + 8003dbe: bf00 nop + 8003dc0: 370c adds r7, #12 + 8003dc2: 46bd mov sp, r7 + 8003dc4: bdf0 pop {r4, r5, r6, r7, pc} + 8003dc6: bf00 nop + 8003dc8: 200000a4 .word 0x200000a4 + 8003dcc: 20000424 .word 0x20000424 + 8003dd0: 20000164 .word 0x20000164 + 8003dd4: 20000440 .word 0x20000440 + 8003dd8: 2000045c .word 0x2000045c + 8003ddc: 20000634 .word 0x20000634 + 8003de0: 20000cf0 .word 0x20000cf0 + 8003de4: 0800a468 .word 0x0800a468 + 8003de8: 20000cf8 .word 0x20000cf8 + 8003dec: 20000d0c .word 0x20000d0c + 8003df0: 0800a470 .word 0x0800a470 + 8003df4: 20000e9c .word 0x20000e9c + +08003df8 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE9connectedEv>: + virtual bool connected() + 8003df8: b480 push {r7} + 8003dfa: b083 sub sp, #12 + 8003dfc: af00 add r7, sp, #0 + 8003dfe: 6078 str r0, [r7, #4] + return configured_; + 8003e00: 687b ldr r3, [r7, #4] + 8003e02: f893 3680 ldrb.w r3, [r3, #1664] ; 0x680 + }; + 8003e06: 4618 mov r0, r3 + 8003e08: 370c adds r7, #12 + 8003e0a: 46bd mov sp, r7 + 8003e0c: f85d 7b04 ldr.w r7, [sp], #4 + 8003e10: 4770 bx lr + +08003e12 <_GLOBAL__sub_I_htim2>: + 8003e12: b580 push {r7, lr} + 8003e14: af00 add r7, sp, #0 + 8003e16: f64f 71ff movw r1, #65535 ; 0xffff + 8003e1a: 2001 movs r0, #1 + 8003e1c: f7ff ff90 bl 8003d40 <_Z41__static_initialization_and_destruction_0ii> + 8003e20: bd80 pop {r7, pc} + +08003e22 <_ZSt3cosf>: + using ::cos; - /* Initialize the TIM state*/ - htim->State = HAL_TIM_STATE_READY; - 80023f0: 687b ldr r3, [r7, #4] - 80023f2: 2201 movs r2, #1 - 80023f4: f883 203d strb.w r2, [r3, #61] ; 0x3d +#ifndef __CORRECT_ISO_CPP_MATH_H_PROTO + inline _GLIBCXX_CONSTEXPR float + cos(float __x) + { return __builtin_cosf(__x); } + 8003e22: b580 push {r7, lr} + 8003e24: b082 sub sp, #8 + 8003e26: af00 add r7, sp, #0 + 8003e28: ed87 0a01 vstr s0, [r7, #4] + 8003e2c: ed97 0a01 vldr s0, [r7, #4] + 8003e30: f004 fcba bl 80087a8 + 8003e34: eef0 7a40 vmov.f32 s15, s0 + 8003e38: eeb0 0a67 vmov.f32 s0, s15 + 8003e3c: 3708 adds r7, #8 + 8003e3e: 46bd mov sp, r7 + 8003e40: bd80 pop {r7, pc} + +08003e42 <_ZSt3sinf>: + using ::sin; - return HAL_OK; - 80023f8: 2300 movs r3, #0 -} - 80023fa: 4618 mov r0, r3 - 80023fc: 3708 adds r7, #8 - 80023fe: 46bd mov sp, r7 - 8002400: bd80 pop {r7, pc} - ... +#ifndef __CORRECT_ISO_CPP_MATH_H_PROTO + inline _GLIBCXX_CONSTEXPR float + sin(float __x) + { return __builtin_sinf(__x); } + 8003e42: b580 push {r7, lr} + 8003e44: b082 sub sp, #8 + 8003e46: af00 add r7, sp, #0 + 8003e48: ed87 0a01 vstr s0, [r7, #4] + 8003e4c: ed97 0a01 vldr s0, [r7, #4] + 8003e50: f004 fcea bl 8008828 + 8003e54: eef0 7a40 vmov.f32 s15, s0 + 8003e58: eeb0 0a67 vmov.f32 s0, s15 + 8003e5c: 3708 adds r7, #8 + 8003e5e: 46bd mov sp, r7 + 8003e60: bd80 pop {r7, pc} + +08003e62 <_ZN2tfL23createQuaternionFromYawEd>: -08002404 : - * @brief Starts the TIM Base generation in interrupt mode. - * @param htim TIM Base handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim) +namespace tf { - 8002404: b480 push {r7} - 8002406: b085 sub sp, #20 - 8002408: af00 add r7, sp, #0 - 800240a: 6078 str r0, [r7, #4] - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); +static inline geometry_msgs::Quaternion createQuaternionFromYaw(double yaw) +{ + 8003e62: b580 push {r7, lr} + 8003e64: b084 sub sp, #16 + 8003e66: af00 add r7, sp, #0 + 8003e68: 60f8 str r0, [r7, #12] + 8003e6a: ed87 0b00 vstr d0, [r7] + geometry_msgs::Quaternion q; + 8003e6e: 68f8 ldr r0, [r7, #12] + 8003e70: f7fd ff82 bl 8001d78 <_ZN13geometry_msgs10QuaternionC1Ev> + q.x = 0; + 8003e74: 68fb ldr r3, [r7, #12] + 8003e76: f04f 0200 mov.w r2, #0 + 8003e7a: 605a str r2, [r3, #4] + q.y = 0; + 8003e7c: 68fb ldr r3, [r7, #12] + 8003e7e: f04f 0200 mov.w r2, #0 + 8003e82: 609a str r2, [r3, #8] + q.z = sin(yaw * 0.5); + 8003e84: ed97 7b00 vldr d7, [r7] + 8003e88: eeb6 6b00 vmov.f64 d6, #96 ; 0x3f000000 0.5 + 8003e8c: ee27 7b06 vmul.f64 d7, d7, d6 + 8003e90: eeb0 0b47 vmov.f64 d0, d7 + 8003e94: f004 fc4c bl 8008730 + 8003e98: eeb0 7b40 vmov.f64 d7, d0 + 8003e9c: eef7 7bc7 vcvt.f32.f64 s15, d7 + 8003ea0: 68fb ldr r3, [r7, #12] + 8003ea2: edc3 7a03 vstr s15, [r3, #12] + q.w = cos(yaw * 0.5); + 8003ea6: ed97 7b00 vldr d7, [r7] + 8003eaa: eeb6 6b00 vmov.f64 d6, #96 ; 0x3f000000 0.5 + 8003eae: ee27 7b06 vmul.f64 d7, d7, d6 + 8003eb2: eeb0 0b47 vmov.f64 d0, d7 + 8003eb6: f004 fbff bl 80086b8 + 8003eba: eeb0 7b40 vmov.f64 d7, d0 + 8003ebe: eef7 7bc7 vcvt.f32.f64 s15, d7 + 8003ec2: 68fb ldr r3, [r7, #12] + 8003ec4: edc3 7a04 vstr s15, [r3, #16] + return q; + 8003ec8: bf00 nop +} + 8003eca: 68f8 ldr r0, [r7, #12] + 8003ecc: 3710 adds r7, #16 + 8003ece: 46bd mov sp, r7 + 8003ed0: bd80 pop {r7, pc} - /* Enable the TIM Update interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE); - 800240c: 687b ldr r3, [r7, #4] - 800240e: 681b ldr r3, [r3, #0] - 8002410: 68da ldr r2, [r3, #12] - 8002412: 687b ldr r3, [r7, #4] - 8002414: 681b ldr r3, [r3, #0] - 8002416: f042 0201 orr.w r2, r2, #1 - 800241a: 60da str r2, [r3, #12] - - /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ - tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; - 800241c: 687b ldr r3, [r7, #4] - 800241e: 681b ldr r3, [r3, #0] - 8002420: 689a ldr r2, [r3, #8] - 8002422: 4b0c ldr r3, [pc, #48] ; (8002454 ) - 8002424: 4013 ands r3, r2 - 8002426: 60fb str r3, [r7, #12] - if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) - 8002428: 68fb ldr r3, [r7, #12] - 800242a: 2b06 cmp r3, #6 - 800242c: d00b beq.n 8002446 - 800242e: 68fb ldr r3, [r7, #12] - 8002430: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 8002434: d007 beq.n 8002446 - { - __HAL_TIM_ENABLE(htim); - 8002436: 687b ldr r3, [r7, #4] - 8002438: 681b ldr r3, [r3, #0] - 800243a: 681a ldr r2, [r3, #0] - 800243c: 687b ldr r3, [r7, #4] - 800243e: 681b ldr r3, [r3, #0] - 8002440: f042 0201 orr.w r2, r2, #1 - 8002444: 601a str r2, [r3, #0] - } +08003ed2 <_ZN12OdometryCalc21OdometryUpdateMessageEv>: +#include "odometry_calc.h" - /* Return function status */ - return HAL_OK; - 8002446: 2300 movs r3, #0 -} - 8002448: 4618 mov r0, r3 - 800244a: 3714 adds r7, #20 - 800244c: 46bd mov sp, r7 - 800244e: f85d 7b04 ldr.w r7, [sp], #4 - 8002452: 4770 bx lr - 8002454: 00010007 .word 0x00010007 - -08002458 : - * Ex: call @ref HAL_TIM_PWM_DeInit() before HAL_TIM_PWM_Init() - * @param htim TIM PWM handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim) -{ - 8002458: b580 push {r7, lr} - 800245a: b082 sub sp, #8 - 800245c: af00 add r7, sp, #0 - 800245e: 6078 str r0, [r7, #4] - /* Check the TIM handle allocation */ - if (htim == NULL) - 8002460: 687b ldr r3, [r7, #4] - 8002462: 2b00 cmp r3, #0 - 8002464: d101 bne.n 800246a - { - return HAL_ERROR; - 8002466: 2301 movs r3, #1 - 8002468: e01d b.n 80024a6 - assert_param(IS_TIM_INSTANCE(htim->Instance)); - assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); - assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); - assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); +void OdometryCalc::OdometryUpdateMessage(){ + 8003ed2: b580 push {r7, lr} + 8003ed4: ed2d 8b02 vpush {d8} + 8003ed8: b094 sub sp, #80 ; 0x50 + 8003eda: af00 add r7, sp, #0 + 8003edc: 6078 str r0, [r7, #4] + float left_velocity = left_encoder_.GetLinearVelocity(); + 8003ede: 687b ldr r3, [r7, #4] + 8003ee0: 4618 mov r0, r3 + 8003ee2: f7fc fbab bl 800063c <_ZN7Encoder17GetLinearVelocityEv> + 8003ee6: ed87 0a12 vstr s0, [r7, #72] ; 0x48 + float right_velocity = right_encoder_.GetLinearVelocity(); + 8003eea: 687b ldr r3, [r7, #4] + 8003eec: 331c adds r3, #28 + 8003eee: 4618 mov r0, r3 + 8003ef0: f7fc fba4 bl 800063c <_ZN7Encoder17GetLinearVelocityEv> + 8003ef4: ed87 0a11 vstr s0, [r7, #68] ; 0x44 - if (htim->State == HAL_TIM_STATE_RESET) - 800246a: 687b ldr r3, [r7, #4] - 800246c: f893 303d ldrb.w r3, [r3, #61] ; 0x3d - 8002470: b2db uxtb r3, r3 - 8002472: 2b00 cmp r3, #0 - 8002474: d106 bne.n 8002484 - { - /* Allocate lock resource and initialize it */ - htim->Lock = HAL_UNLOCKED; - 8002476: 687b ldr r3, [r7, #4] - 8002478: 2200 movs r2, #0 - 800247a: f883 203c strb.w r2, [r3, #60] ; 0x3c - } - /* Init the low level hardware : GPIO, CLOCK, NVIC */ - htim->PWM_MspInitCallback(htim); -#else - /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ - HAL_TIM_PWM_MspInit(htim); - 800247e: 6878 ldr r0, [r7, #4] - 8002480: f005 fde8 bl 8008054 -#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ - } + float x = odometry_.pose.pose.position.x; + 8003ef8: 687b ldr r3, [r7, #4] + 8003efa: 6e5b ldr r3, [r3, #100] ; 0x64 + 8003efc: 643b str r3, [r7, #64] ; 0x40 + float y = odometry_.pose.pose.position.y; + 8003efe: 687b ldr r3, [r7, #4] + 8003f00: 6e9b ldr r3, [r3, #104] ; 0x68 + 8003f02: 63fb str r3, [r7, #60] ; 0x3c - /* Set the TIM state */ - htim->State = HAL_TIM_STATE_BUSY; - 8002484: 687b ldr r3, [r7, #4] - 8002486: 2202 movs r2, #2 - 8002488: f883 203d strb.w r2, [r3, #61] ; 0x3d + //verificato che delta_r == delta_l + float delta_time = left_encoder_.current_millis_ - + 8003f04: 687b ldr r3, [r7, #4] + 8003f06: 689a ldr r2, [r3, #8] + left_encoder_.previous_millis_; + 8003f08: 687b ldr r3, [r7, #4] + 8003f0a: 685b ldr r3, [r3, #4] + float delta_time = left_encoder_.current_millis_ - + 8003f0c: 1ad3 subs r3, r2, r3 + 8003f0e: ee07 3a90 vmov s15, r3 + 8003f12: eef8 7a67 vcvt.f32.u32 s15, s15 + 8003f16: edc7 7a0e vstr s15, [r7, #56] ; 0x38 - /* Init the base time for the PWM */ - TIM_Base_SetConfig(htim->Instance, &htim->Init); - 800248c: 687b ldr r3, [r7, #4] - 800248e: 681a ldr r2, [r3, #0] - 8002490: 687b ldr r3, [r7, #4] - 8002492: 3304 adds r3, #4 - 8002494: 4619 mov r1, r3 - 8002496: 4610 mov r0, r2 - 8002498: f000 fbec bl 8002c74 + // calcoli vari + float linear_velocity = (left_velocity + right_velocity) / 2; + 8003f1a: ed97 7a12 vldr s14, [r7, #72] ; 0x48 + 8003f1e: edd7 7a11 vldr s15, [r7, #68] ; 0x44 + 8003f22: ee37 7a27 vadd.f32 s14, s14, s15 + 8003f26: eef0 6a00 vmov.f32 s13, #0 ; 0x40000000 2.0 + 8003f2a: eec7 7a26 vdiv.f32 s15, s14, s13 + 8003f2e: edc7 7a0d vstr s15, [r7, #52] ; 0x34 + float angular_velocity; + if (right_velocity - left_velocity == 0) + 8003f32: ed97 7a11 vldr s14, [r7, #68] ; 0x44 + 8003f36: edd7 7a12 vldr s15, [r7, #72] ; 0x48 + 8003f3a: ee77 7a67 vsub.f32 s15, s14, s15 + 8003f3e: eef5 7a40 vcmp.f32 s15, #0.0 + 8003f42: eef1 fa10 vmrs APSR_nzcv, fpscr + 8003f46: d103 bne.n 8003f50 <_ZN12OdometryCalc21OdometryUpdateMessageEv+0x7e> + angular_velocity = 0; + 8003f48: f04f 0300 mov.w r3, #0 + 8003f4c: 64fb str r3, [r7, #76] ; 0x4c + 8003f4e: e00c b.n 8003f6a <_ZN12OdometryCalc21OdometryUpdateMessageEv+0x98> + else + angular_velocity = (right_velocity - left_velocity) / kBaseline; + 8003f50: ed97 7a11 vldr s14, [r7, #68] ; 0x44 + 8003f54: edd7 7a12 vldr s15, [r7, #72] ; 0x48 + 8003f58: ee77 6a67 vsub.f32 s13, s14, s15 + 8003f5c: 687b ldr r3, [r7, #4] + 8003f5e: ed93 7a73 vldr s14, [r3, #460] ; 0x1cc + 8003f62: eec6 7a87 vdiv.f32 s15, s13, s14 + 8003f66: edc7 7a13 vstr s15, [r7, #76] ; 0x4c + float diff = angular_velocity / delta_time; + 8003f6a: edd7 6a13 vldr s13, [r7, #76] ; 0x4c + 8003f6e: ed97 7a0e vldr s14, [r7, #56] ; 0x38 + 8003f72: eec6 7a87 vdiv.f32 s15, s13, s14 + 8003f76: edc7 7a0c vstr s15, [r7, #48] ; 0x30 + float r = (kBaseline / 2) * ((right_velocity + left_velocity) / + 8003f7a: 687b ldr r3, [r7, #4] + 8003f7c: edd3 7a73 vldr s15, [r3, #460] ; 0x1cc + 8003f80: eef0 6a00 vmov.f32 s13, #0 ; 0x40000000 2.0 + 8003f84: ee87 7aa6 vdiv.f32 s14, s15, s13 + 8003f88: edd7 6a11 vldr s13, [r7, #68] ; 0x44 + 8003f8c: edd7 7a12 vldr s15, [r7, #72] ; 0x48 + 8003f90: ee36 6aa7 vadd.f32 s12, s13, s15 + (right_velocity - left_velocity)); + 8003f94: edd7 6a11 vldr s13, [r7, #68] ; 0x44 + 8003f98: edd7 7a12 vldr s15, [r7, #72] ; 0x48 + 8003f9c: ee76 6ae7 vsub.f32 s13, s13, s15 + float r = (kBaseline / 2) * ((right_velocity + left_velocity) / + 8003fa0: eec6 7a26 vdiv.f32 s15, s12, s13 + 8003fa4: ee67 7a27 vmul.f32 s15, s14, s15 + 8003fa8: edc7 7a0b vstr s15, [r7, #44] ; 0x2c + float icc_x = x - r * std::sin(theta_); + 8003fac: 687b ldr r3, [r7, #4] + 8003fae: edd3 7a0e vldr s15, [r3, #56] ; 0x38 + 8003fb2: eeb0 0a67 vmov.f32 s0, s15 + 8003fb6: f7ff ff44 bl 8003e42 <_ZSt3sinf> + 8003fba: eeb0 7a40 vmov.f32 s14, s0 + 8003fbe: edd7 7a0b vldr s15, [r7, #44] ; 0x2c + 8003fc2: ee67 7a27 vmul.f32 s15, s14, s15 + 8003fc6: ed97 7a10 vldr s14, [r7, #64] ; 0x40 + 8003fca: ee77 7a67 vsub.f32 s15, s14, s15 + 8003fce: edc7 7a0a vstr s15, [r7, #40] ; 0x28 + float icc_y = y + r * std::cos(theta_); + 8003fd2: 687b ldr r3, [r7, #4] + 8003fd4: edd3 7a0e vldr s15, [r3, #56] ; 0x38 + 8003fd8: eeb0 0a67 vmov.f32 s0, s15 + 8003fdc: f7ff ff21 bl 8003e22 <_ZSt3cosf> + 8003fe0: eeb0 7a40 vmov.f32 s14, s0 + 8003fe4: edd7 7a0b vldr s15, [r7, #44] ; 0x2c + 8003fe8: ee67 7a27 vmul.f32 s15, s14, s15 + 8003fec: ed97 7a0f vldr s14, [r7, #60] ; 0x3c + 8003ff0: ee77 7a27 vadd.f32 s15, s14, s15 + 8003ff4: edc7 7a09 vstr s15, [r7, #36] ; 0x24 + float new_x = std::cos(diff) * (x - icc_x) - + 8003ff8: ed97 0a0c vldr s0, [r7, #48] ; 0x30 + 8003ffc: f7ff ff11 bl 8003e22 <_ZSt3cosf> + 8004000: eef0 6a40 vmov.f32 s13, s0 + 8004004: ed97 7a10 vldr s14, [r7, #64] ; 0x40 + 8004008: edd7 7a0a vldr s15, [r7, #40] ; 0x28 + 800400c: ee77 7a67 vsub.f32 s15, s14, s15 + 8004010: ee26 8aa7 vmul.f32 s16, s13, s15 + std::sin(diff) * (y - icc_y) + icc_x; + 8004014: ed97 0a0c vldr s0, [r7, #48] ; 0x30 + 8004018: f7ff ff13 bl 8003e42 <_ZSt3sinf> + 800401c: eef0 6a40 vmov.f32 s13, s0 + 8004020: ed97 7a0f vldr s14, [r7, #60] ; 0x3c + 8004024: edd7 7a09 vldr s15, [r7, #36] ; 0x24 + 8004028: ee77 7a67 vsub.f32 s15, s14, s15 + 800402c: ee66 7aa7 vmul.f32 s15, s13, s15 + float new_x = std::cos(diff) * (x - icc_x) - + 8004030: ee78 7a67 vsub.f32 s15, s16, s15 + std::sin(diff) * (y - icc_y) + icc_x; + 8004034: ed97 7a0a vldr s14, [r7, #40] ; 0x28 + 8004038: ee77 7a27 vadd.f32 s15, s14, s15 + 800403c: edc7 7a08 vstr s15, [r7, #32] + float new_y = std::sin(diff) * (y - icc_y) + + 8004040: ed97 0a0c vldr s0, [r7, #48] ; 0x30 + 8004044: f7ff fefd bl 8003e42 <_ZSt3sinf> + 8004048: eef0 6a40 vmov.f32 s13, s0 + 800404c: ed97 7a0f vldr s14, [r7, #60] ; 0x3c + 8004050: edd7 7a09 vldr s15, [r7, #36] ; 0x24 + 8004054: ee77 7a67 vsub.f32 s15, s14, s15 + 8004058: ee26 8aa7 vmul.f32 s16, s13, s15 + std::cos(diff) * (y - icc_y) + icc_y; + 800405c: ed97 0a0c vldr s0, [r7, #48] ; 0x30 + 8004060: f7ff fedf bl 8003e22 <_ZSt3cosf> + 8004064: eef0 6a40 vmov.f32 s13, s0 + 8004068: ed97 7a0f vldr s14, [r7, #60] ; 0x3c + 800406c: edd7 7a09 vldr s15, [r7, #36] ; 0x24 + 8004070: ee77 7a67 vsub.f32 s15, s14, s15 + 8004074: ee66 7aa7 vmul.f32 s15, s13, s15 + float new_y = std::sin(diff) * (y - icc_y) + + 8004078: ee78 7a27 vadd.f32 s15, s16, s15 + std::cos(diff) * (y - icc_y) + icc_y; + 800407c: ed97 7a09 vldr s14, [r7, #36] ; 0x24 + 8004080: ee77 7a27 vadd.f32 s15, s14, s15 + 8004084: edc7 7a07 vstr s15, [r7, #28] + theta_ = theta_ + diff; + 8004088: 687b ldr r3, [r7, #4] + 800408a: ed93 7a0e vldr s14, [r3, #56] ; 0x38 + 800408e: edd7 7a0c vldr s15, [r7, #48] ; 0x30 + 8004092: ee77 7a27 vadd.f32 s15, s14, s15 + 8004096: 687b ldr r3, [r7, #4] + 8004098: edc3 7a0e vstr s15, [r3, #56] ; 0x38 + geometry_msgs::Quaternion q = tf::createQuaternionFromYaw(theta_); + 800409c: 687b ldr r3, [r7, #4] + 800409e: edd3 7a0e vldr s15, [r3, #56] ; 0x38 + 80040a2: eeb7 7ae7 vcvt.f64.f32 d7, s15 + 80040a6: f107 0308 add.w r3, r7, #8 + 80040aa: eeb0 0b47 vmov.f64 d0, d7 + 80040ae: 4618 mov r0, r3 + 80040b0: f7ff fed7 bl 8003e62 <_ZN2tfL23createQuaternionFromYawEd> - /* Initialize the TIM state*/ - htim->State = HAL_TIM_STATE_READY; - 800249c: 687b ldr r3, [r7, #4] - 800249e: 2201 movs r2, #1 - 80024a0: f883 203d strb.w r2, [r3, #61] ; 0x3d + //update msg + odometry_.pose.pose.position.x = new_x; + 80040b4: 687b ldr r3, [r7, #4] + 80040b6: 6a3a ldr r2, [r7, #32] + 80040b8: 665a str r2, [r3, #100] ; 0x64 + odometry_.pose.pose.position.y = new_y; + 80040ba: 687b ldr r3, [r7, #4] + 80040bc: 69fa ldr r2, [r7, #28] + 80040be: 669a str r2, [r3, #104] ; 0x68 + odometry_.pose.pose.orientation.x = q.x; + 80040c0: 68fa ldr r2, [r7, #12] + 80040c2: 687b ldr r3, [r7, #4] + 80040c4: 675a str r2, [r3, #116] ; 0x74 + odometry_.pose.pose.orientation.y = q.y; + 80040c6: 693a ldr r2, [r7, #16] + 80040c8: 687b ldr r3, [r7, #4] + 80040ca: 679a str r2, [r3, #120] ; 0x78 + odometry_.pose.pose.orientation.z = q.z; + 80040cc: 697a ldr r2, [r7, #20] + 80040ce: 687b ldr r3, [r7, #4] + 80040d0: 67da str r2, [r3, #124] ; 0x7c + odometry_.pose.pose.orientation.w = q.w; + 80040d2: 69ba ldr r2, [r7, #24] + 80040d4: 687b ldr r3, [r7, #4] + 80040d6: f8c3 2080 str.w r2, [r3, #128] ; 0x80 + odometry_.twist.twist.linear.x = linear_velocity; + 80040da: 687b ldr r3, [r7, #4] + 80040dc: 6b7a ldr r2, [r7, #52] ; 0x34 + 80040de: f8c3 2120 str.w r2, [r3, #288] ; 0x120 + odometry_.twist.twist.angular.z = angular_velocity; + 80040e2: 687b ldr r3, [r7, #4] + 80040e4: 6cfa ldr r2, [r7, #76] ; 0x4c + 80040e6: f8c3 2138 str.w r2, [r3, #312] ; 0x138 - return HAL_OK; - 80024a4: 2300 movs r3, #0 + return; + 80040ea: bf00 nop } - 80024a6: 4618 mov r0, r3 - 80024a8: 3708 adds r7, #8 - 80024aa: 46bd mov sp, r7 - 80024ac: bd80 pop {r7, pc} + 80040ec: 3750 adds r7, #80 ; 0x50 + 80040ee: 46bd mov sp, r7 + 80040f0: ecbd 8b02 vpop {d8} + 80040f4: bd80 pop {r7, pc} ... -080024b0 : - * @param htim TIM Encoder Interface handle - * @param sConfig TIM Encoder Interface configuration structure - * @retval HAL status +080040f8 : +void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim); + /** + * Initializes the Global MSP. */ -HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *htim, TIM_Encoder_InitTypeDef *sConfig) +void HAL_MspInit(void) { - 80024b0: b580 push {r7, lr} - 80024b2: b086 sub sp, #24 - 80024b4: af00 add r7, sp, #0 - 80024b6: 6078 str r0, [r7, #4] - 80024b8: 6039 str r1, [r7, #0] - uint32_t tmpsmcr; - uint32_t tmpccmr1; - uint32_t tmpccer; + 80040f8: b480 push {r7} + 80040fa: b083 sub sp, #12 + 80040fc: af00 add r7, sp, #0 + /* USER CODE BEGIN MspInit 0 */ - /* Check the TIM handle allocation */ - if (htim == NULL) - 80024ba: 687b ldr r3, [r7, #4] - 80024bc: 2b00 cmp r3, #0 - 80024be: d101 bne.n 80024c4 - { - return HAL_ERROR; - 80024c0: 2301 movs r3, #1 - 80024c2: e07b b.n 80025bc - assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler)); - assert_param(IS_TIM_IC_PRESCALER(sConfig->IC2Prescaler)); - assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter)); - assert_param(IS_TIM_IC_FILTER(sConfig->IC2Filter)); + /* USER CODE END MspInit 0 */ - if (htim->State == HAL_TIM_STATE_RESET) - 80024c4: 687b ldr r3, [r7, #4] - 80024c6: f893 303d ldrb.w r3, [r3, #61] ; 0x3d - 80024ca: b2db uxtb r3, r3 - 80024cc: 2b00 cmp r3, #0 - 80024ce: d106 bne.n 80024de - { - /* Allocate lock resource and initialize it */ - htim->Lock = HAL_UNLOCKED; - 80024d0: 687b ldr r3, [r7, #4] - 80024d2: 2200 movs r2, #0 - 80024d4: f883 203c strb.w r2, [r3, #60] ; 0x3c - } - /* Init the low level hardware : GPIO, CLOCK, NVIC */ - htim->Encoder_MspInitCallback(htim); -#else - /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ - HAL_TIM_Encoder_MspInit(htim); - 80024d8: 6878 ldr r0, [r7, #4] - 80024da: f005 fd05 bl 8007ee8 -#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ - } - - /* Set the TIM state */ - htim->State = HAL_TIM_STATE_BUSY; - 80024de: 687b ldr r3, [r7, #4] - 80024e0: 2202 movs r2, #2 - 80024e2: f883 203d strb.w r2, [r3, #61] ; 0x3d + __HAL_RCC_PWR_CLK_ENABLE(); + 80040fe: 4b0f ldr r3, [pc, #60] ; (800413c ) + 8004100: 6c1b ldr r3, [r3, #64] ; 0x40 + 8004102: 4a0e ldr r2, [pc, #56] ; (800413c ) + 8004104: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 + 8004108: 6413 str r3, [r2, #64] ; 0x40 + 800410a: 4b0c ldr r3, [pc, #48] ; (800413c ) + 800410c: 6c1b ldr r3, [r3, #64] ; 0x40 + 800410e: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 + 8004112: 607b str r3, [r7, #4] + 8004114: 687b ldr r3, [r7, #4] + __HAL_RCC_SYSCFG_CLK_ENABLE(); + 8004116: 4b09 ldr r3, [pc, #36] ; (800413c ) + 8004118: 6c5b ldr r3, [r3, #68] ; 0x44 + 800411a: 4a08 ldr r2, [pc, #32] ; (800413c ) + 800411c: f443 4380 orr.w r3, r3, #16384 ; 0x4000 + 8004120: 6453 str r3, [r2, #68] ; 0x44 + 8004122: 4b06 ldr r3, [pc, #24] ; (800413c ) + 8004124: 6c5b ldr r3, [r3, #68] ; 0x44 + 8004126: f403 4380 and.w r3, r3, #16384 ; 0x4000 + 800412a: 603b str r3, [r7, #0] + 800412c: 683b ldr r3, [r7, #0] + /* System interrupt init*/ - /* Reset the SMS and ECE bits */ - htim->Instance->SMCR &= ~(TIM_SMCR_SMS | TIM_SMCR_ECE); - 80024e6: 687b ldr r3, [r7, #4] - 80024e8: 681b ldr r3, [r3, #0] - 80024ea: 6899 ldr r1, [r3, #8] - 80024ec: 687b ldr r3, [r7, #4] - 80024ee: 681a ldr r2, [r3, #0] - 80024f0: 4b34 ldr r3, [pc, #208] ; (80025c4 ) - 80024f2: 400b ands r3, r1 - 80024f4: 6093 str r3, [r2, #8] + /* USER CODE BEGIN MspInit 1 */ - /* Configure the Time base in the Encoder Mode */ - TIM_Base_SetConfig(htim->Instance, &htim->Init); - 80024f6: 687b ldr r3, [r7, #4] - 80024f8: 681a ldr r2, [r3, #0] - 80024fa: 687b ldr r3, [r7, #4] - 80024fc: 3304 adds r3, #4 - 80024fe: 4619 mov r1, r3 - 8002500: 4610 mov r0, r2 - 8002502: f000 fbb7 bl 8002c74 + /* USER CODE END MspInit 1 */ +} + 800412e: bf00 nop + 8004130: 370c adds r7, #12 + 8004132: 46bd mov sp, r7 + 8004134: f85d 7b04 ldr.w r7, [sp], #4 + 8004138: 4770 bx lr + 800413a: bf00 nop + 800413c: 40023800 .word 0x40023800 + +08004140 : +* This function configures the hardware resources used in this example +* @param htim_encoder: TIM_Encoder handle pointer +* @retval None +*/ +void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef* htim_encoder) +{ + 8004140: b580 push {r7, lr} + 8004142: b08c sub sp, #48 ; 0x30 + 8004144: af00 add r7, sp, #0 + 8004146: 6078 str r0, [r7, #4] + GPIO_InitTypeDef GPIO_InitStruct = {0}; + 8004148: f107 031c add.w r3, r7, #28 + 800414c: 2200 movs r2, #0 + 800414e: 601a str r2, [r3, #0] + 8004150: 605a str r2, [r3, #4] + 8004152: 609a str r2, [r3, #8] + 8004154: 60da str r2, [r3, #12] + 8004156: 611a str r2, [r3, #16] + if(htim_encoder->Instance==TIM2) + 8004158: 687b ldr r3, [r7, #4] + 800415a: 681b ldr r3, [r3, #0] + 800415c: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 + 8004160: d144 bne.n 80041ec + { + /* USER CODE BEGIN TIM2_MspInit 0 */ - /* Get the TIMx SMCR register value */ - tmpsmcr = htim->Instance->SMCR; - 8002506: 687b ldr r3, [r7, #4] - 8002508: 681b ldr r3, [r3, #0] - 800250a: 689b ldr r3, [r3, #8] - 800250c: 617b str r3, [r7, #20] + /* USER CODE END TIM2_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_TIM2_CLK_ENABLE(); + 8004162: 4b3b ldr r3, [pc, #236] ; (8004250 ) + 8004164: 6c1b ldr r3, [r3, #64] ; 0x40 + 8004166: 4a3a ldr r2, [pc, #232] ; (8004250 ) + 8004168: f043 0301 orr.w r3, r3, #1 + 800416c: 6413 str r3, [r2, #64] ; 0x40 + 800416e: 4b38 ldr r3, [pc, #224] ; (8004250 ) + 8004170: 6c1b ldr r3, [r3, #64] ; 0x40 + 8004172: f003 0301 and.w r3, r3, #1 + 8004176: 61bb str r3, [r7, #24] + 8004178: 69bb ldr r3, [r7, #24] + + __HAL_RCC_GPIOA_CLK_ENABLE(); + 800417a: 4b35 ldr r3, [pc, #212] ; (8004250 ) + 800417c: 6b1b ldr r3, [r3, #48] ; 0x30 + 800417e: 4a34 ldr r2, [pc, #208] ; (8004250 ) + 8004180: f043 0301 orr.w r3, r3, #1 + 8004184: 6313 str r3, [r2, #48] ; 0x30 + 8004186: 4b32 ldr r3, [pc, #200] ; (8004250 ) + 8004188: 6b1b ldr r3, [r3, #48] ; 0x30 + 800418a: f003 0301 and.w r3, r3, #1 + 800418e: 617b str r3, [r7, #20] + 8004190: 697b ldr r3, [r7, #20] + __HAL_RCC_GPIOB_CLK_ENABLE(); + 8004192: 4b2f ldr r3, [pc, #188] ; (8004250 ) + 8004194: 6b1b ldr r3, [r3, #48] ; 0x30 + 8004196: 4a2e ldr r2, [pc, #184] ; (8004250 ) + 8004198: f043 0302 orr.w r3, r3, #2 + 800419c: 6313 str r3, [r2, #48] ; 0x30 + 800419e: 4b2c ldr r3, [pc, #176] ; (8004250 ) + 80041a0: 6b1b ldr r3, [r3, #48] ; 0x30 + 80041a2: f003 0302 and.w r3, r3, #2 + 80041a6: 613b str r3, [r7, #16] + 80041a8: 693b ldr r3, [r7, #16] + /**TIM2 GPIO Configuration + PA5 ------> TIM2_CH1 + PB3 ------> TIM2_CH2 + */ + GPIO_InitStruct.Pin = GPIO_PIN_5; + 80041aa: 2320 movs r3, #32 + 80041ac: 61fb str r3, [r7, #28] + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + 80041ae: 2302 movs r3, #2 + 80041b0: 623b str r3, [r7, #32] + GPIO_InitStruct.Pull = GPIO_NOPULL; + 80041b2: 2300 movs r3, #0 + 80041b4: 627b str r3, [r7, #36] ; 0x24 + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + 80041b6: 2300 movs r3, #0 + 80041b8: 62bb str r3, [r7, #40] ; 0x28 + GPIO_InitStruct.Alternate = GPIO_AF1_TIM2; + 80041ba: 2301 movs r3, #1 + 80041bc: 62fb str r3, [r7, #44] ; 0x2c + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 80041be: f107 031c add.w r3, r7, #28 + 80041c2: 4619 mov r1, r3 + 80041c4: 4823 ldr r0, [pc, #140] ; (8004254 ) + 80041c6: f001 f861 bl 800528c - /* Get the TIMx CCMR1 register value */ - tmpccmr1 = htim->Instance->CCMR1; - 800250e: 687b ldr r3, [r7, #4] - 8002510: 681b ldr r3, [r3, #0] - 8002512: 699b ldr r3, [r3, #24] - 8002514: 613b str r3, [r7, #16] + GPIO_InitStruct.Pin = GPIO_PIN_3; + 80041ca: 2308 movs r3, #8 + 80041cc: 61fb str r3, [r7, #28] + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + 80041ce: 2302 movs r3, #2 + 80041d0: 623b str r3, [r7, #32] + GPIO_InitStruct.Pull = GPIO_NOPULL; + 80041d2: 2300 movs r3, #0 + 80041d4: 627b str r3, [r7, #36] ; 0x24 + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + 80041d6: 2300 movs r3, #0 + 80041d8: 62bb str r3, [r7, #40] ; 0x28 + GPIO_InitStruct.Alternate = GPIO_AF1_TIM2; + 80041da: 2301 movs r3, #1 + 80041dc: 62fb str r3, [r7, #44] ; 0x2c + HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 80041de: f107 031c add.w r3, r7, #28 + 80041e2: 4619 mov r1, r3 + 80041e4: 481c ldr r0, [pc, #112] ; (8004258 ) + 80041e6: f001 f851 bl 800528c + /* USER CODE BEGIN TIM5_MspInit 1 */ - /* Get the TIMx CCER register value */ - tmpccer = htim->Instance->CCER; - 8002516: 687b ldr r3, [r7, #4] - 8002518: 681b ldr r3, [r3, #0] - 800251a: 6a1b ldr r3, [r3, #32] - 800251c: 60fb str r3, [r7, #12] + /* USER CODE END TIM5_MspInit 1 */ + } - /* Set the encoder Mode */ - tmpsmcr |= sConfig->EncoderMode; - 800251e: 683b ldr r3, [r7, #0] - 8002520: 681b ldr r3, [r3, #0] - 8002522: 697a ldr r2, [r7, #20] - 8002524: 4313 orrs r3, r2 - 8002526: 617b str r3, [r7, #20] +} + 80041ea: e02c b.n 8004246 + else if(htim_encoder->Instance==TIM5) + 80041ec: 687b ldr r3, [r7, #4] + 80041ee: 681b ldr r3, [r3, #0] + 80041f0: 4a1a ldr r2, [pc, #104] ; (800425c ) + 80041f2: 4293 cmp r3, r2 + 80041f4: d127 bne.n 8004246 + __HAL_RCC_TIM5_CLK_ENABLE(); + 80041f6: 4b16 ldr r3, [pc, #88] ; (8004250 ) + 80041f8: 6c1b ldr r3, [r3, #64] ; 0x40 + 80041fa: 4a15 ldr r2, [pc, #84] ; (8004250 ) + 80041fc: f043 0308 orr.w r3, r3, #8 + 8004200: 6413 str r3, [r2, #64] ; 0x40 + 8004202: 4b13 ldr r3, [pc, #76] ; (8004250 ) + 8004204: 6c1b ldr r3, [r3, #64] ; 0x40 + 8004206: f003 0308 and.w r3, r3, #8 + 800420a: 60fb str r3, [r7, #12] + 800420c: 68fb ldr r3, [r7, #12] + __HAL_RCC_GPIOA_CLK_ENABLE(); + 800420e: 4b10 ldr r3, [pc, #64] ; (8004250 ) + 8004210: 6b1b ldr r3, [r3, #48] ; 0x30 + 8004212: 4a0f ldr r2, [pc, #60] ; (8004250 ) + 8004214: f043 0301 orr.w r3, r3, #1 + 8004218: 6313 str r3, [r2, #48] ; 0x30 + 800421a: 4b0d ldr r3, [pc, #52] ; (8004250 ) + 800421c: 6b1b ldr r3, [r3, #48] ; 0x30 + 800421e: f003 0301 and.w r3, r3, #1 + 8004222: 60bb str r3, [r7, #8] + 8004224: 68bb ldr r3, [r7, #8] + GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1; + 8004226: 2303 movs r3, #3 + 8004228: 61fb str r3, [r7, #28] + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + 800422a: 2302 movs r3, #2 + 800422c: 623b str r3, [r7, #32] + GPIO_InitStruct.Pull = GPIO_NOPULL; + 800422e: 2300 movs r3, #0 + 8004230: 627b str r3, [r7, #36] ; 0x24 + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + 8004232: 2300 movs r3, #0 + 8004234: 62bb str r3, [r7, #40] ; 0x28 + GPIO_InitStruct.Alternate = GPIO_AF2_TIM5; + 8004236: 2302 movs r3, #2 + 8004238: 62fb str r3, [r7, #44] ; 0x2c + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 800423a: f107 031c add.w r3, r7, #28 + 800423e: 4619 mov r1, r3 + 8004240: 4804 ldr r0, [pc, #16] ; (8004254 ) + 8004242: f001 f823 bl 800528c +} + 8004246: bf00 nop + 8004248: 3730 adds r7, #48 ; 0x30 + 800424a: 46bd mov sp, r7 + 800424c: bd80 pop {r7, pc} + 800424e: bf00 nop + 8004250: 40023800 .word 0x40023800 + 8004254: 40020000 .word 0x40020000 + 8004258: 40020400 .word 0x40020400 + 800425c: 40000c00 .word 0x40000c00 + +08004260 : +* This function configures the hardware resources used in this example +* @param htim_base: TIM_Base handle pointer +* @retval None +*/ +void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) +{ + 8004260: b580 push {r7, lr} + 8004262: b084 sub sp, #16 + 8004264: af00 add r7, sp, #0 + 8004266: 6078 str r0, [r7, #4] + if(htim_base->Instance==TIM3) + 8004268: 687b ldr r3, [r7, #4] + 800426a: 681b ldr r3, [r3, #0] + 800426c: 4a16 ldr r2, [pc, #88] ; (80042c8 ) + 800426e: 4293 cmp r3, r2 + 8004270: d114 bne.n 800429c + { + /* USER CODE BEGIN TIM3_MspInit 0 */ - /* Select the Capture Compare 1 and the Capture Compare 2 as input */ - tmpccmr1 &= ~(TIM_CCMR1_CC1S | TIM_CCMR1_CC2S); - 8002528: 693a ldr r2, [r7, #16] - 800252a: 4b27 ldr r3, [pc, #156] ; (80025c8 ) - 800252c: 4013 ands r3, r2 - 800252e: 613b str r3, [r7, #16] - tmpccmr1 |= (sConfig->IC1Selection | (sConfig->IC2Selection << 8U)); - 8002530: 683b ldr r3, [r7, #0] - 8002532: 689a ldr r2, [r3, #8] - 8002534: 683b ldr r3, [r7, #0] - 8002536: 699b ldr r3, [r3, #24] - 8002538: 021b lsls r3, r3, #8 - 800253a: 4313 orrs r3, r2 - 800253c: 693a ldr r2, [r7, #16] - 800253e: 4313 orrs r3, r2 - 8002540: 613b str r3, [r7, #16] + /* USER CODE END TIM3_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_TIM3_CLK_ENABLE(); + 8004272: 4b16 ldr r3, [pc, #88] ; (80042cc ) + 8004274: 6c1b ldr r3, [r3, #64] ; 0x40 + 8004276: 4a15 ldr r2, [pc, #84] ; (80042cc ) + 8004278: f043 0302 orr.w r3, r3, #2 + 800427c: 6413 str r3, [r2, #64] ; 0x40 + 800427e: 4b13 ldr r3, [pc, #76] ; (80042cc ) + 8004280: 6c1b ldr r3, [r3, #64] ; 0x40 + 8004282: f003 0302 and.w r3, r3, #2 + 8004286: 60fb str r3, [r7, #12] + 8004288: 68fb ldr r3, [r7, #12] + /* TIM3 interrupt Init */ + HAL_NVIC_SetPriority(TIM3_IRQn, 0, 0); + 800428a: 2200 movs r2, #0 + 800428c: 2100 movs r1, #0 + 800428e: 201d movs r0, #29 + 8004290: f000 fc2d bl 8004aee + HAL_NVIC_EnableIRQ(TIM3_IRQn); + 8004294: 201d movs r0, #29 + 8004296: f000 fc46 bl 8004b26 + /* USER CODE BEGIN TIM4_MspInit 1 */ - /* Set the Capture Compare 1 and the Capture Compare 2 prescalers and filters */ - tmpccmr1 &= ~(TIM_CCMR1_IC1PSC | TIM_CCMR1_IC2PSC); - 8002542: 693a ldr r2, [r7, #16] - 8002544: 4b21 ldr r3, [pc, #132] ; (80025cc ) - 8002546: 4013 ands r3, r2 - 8002548: 613b str r3, [r7, #16] - tmpccmr1 &= ~(TIM_CCMR1_IC1F | TIM_CCMR1_IC2F); - 800254a: 693a ldr r2, [r7, #16] - 800254c: 4b20 ldr r3, [pc, #128] ; (80025d0 ) - 800254e: 4013 ands r3, r2 - 8002550: 613b str r3, [r7, #16] - tmpccmr1 |= sConfig->IC1Prescaler | (sConfig->IC2Prescaler << 8U); - 8002552: 683b ldr r3, [r7, #0] - 8002554: 68da ldr r2, [r3, #12] - 8002556: 683b ldr r3, [r7, #0] - 8002558: 69db ldr r3, [r3, #28] - 800255a: 021b lsls r3, r3, #8 - 800255c: 4313 orrs r3, r2 - 800255e: 693a ldr r2, [r7, #16] - 8002560: 4313 orrs r3, r2 - 8002562: 613b str r3, [r7, #16] - tmpccmr1 |= (sConfig->IC1Filter << 4U) | (sConfig->IC2Filter << 12U); - 8002564: 683b ldr r3, [r7, #0] - 8002566: 691b ldr r3, [r3, #16] - 8002568: 011a lsls r2, r3, #4 - 800256a: 683b ldr r3, [r7, #0] - 800256c: 6a1b ldr r3, [r3, #32] - 800256e: 031b lsls r3, r3, #12 - 8002570: 4313 orrs r3, r2 - 8002572: 693a ldr r2, [r7, #16] - 8002574: 4313 orrs r3, r2 - 8002576: 613b str r3, [r7, #16] + /* USER CODE END TIM4_MspInit 1 */ + } - /* Set the TI1 and the TI2 Polarities */ - tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC2P); - 8002578: 68fb ldr r3, [r7, #12] - 800257a: f023 0322 bic.w r3, r3, #34 ; 0x22 - 800257e: 60fb str r3, [r7, #12] - tmpccer &= ~(TIM_CCER_CC1NP | TIM_CCER_CC2NP); - 8002580: 68fb ldr r3, [r7, #12] - 8002582: f023 0388 bic.w r3, r3, #136 ; 0x88 - 8002586: 60fb str r3, [r7, #12] - tmpccer |= sConfig->IC1Polarity | (sConfig->IC2Polarity << 4U); - 8002588: 683b ldr r3, [r7, #0] - 800258a: 685a ldr r2, [r3, #4] - 800258c: 683b ldr r3, [r7, #0] - 800258e: 695b ldr r3, [r3, #20] - 8002590: 011b lsls r3, r3, #4 - 8002592: 4313 orrs r3, r2 - 8002594: 68fa ldr r2, [r7, #12] - 8002596: 4313 orrs r3, r2 - 8002598: 60fb str r3, [r7, #12] +} + 800429a: e010 b.n 80042be + else if(htim_base->Instance==TIM4) + 800429c: 687b ldr r3, [r7, #4] + 800429e: 681b ldr r3, [r3, #0] + 80042a0: 4a0b ldr r2, [pc, #44] ; (80042d0 ) + 80042a2: 4293 cmp r3, r2 + 80042a4: d10b bne.n 80042be + __HAL_RCC_TIM4_CLK_ENABLE(); + 80042a6: 4b09 ldr r3, [pc, #36] ; (80042cc ) + 80042a8: 6c1b ldr r3, [r3, #64] ; 0x40 + 80042aa: 4a08 ldr r2, [pc, #32] ; (80042cc ) + 80042ac: f043 0304 orr.w r3, r3, #4 + 80042b0: 6413 str r3, [r2, #64] ; 0x40 + 80042b2: 4b06 ldr r3, [pc, #24] ; (80042cc ) + 80042b4: 6c1b ldr r3, [r3, #64] ; 0x40 + 80042b6: f003 0304 and.w r3, r3, #4 + 80042ba: 60bb str r3, [r7, #8] + 80042bc: 68bb ldr r3, [r7, #8] +} + 80042be: bf00 nop + 80042c0: 3710 adds r7, #16 + 80042c2: 46bd mov sp, r7 + 80042c4: bd80 pop {r7, pc} + 80042c6: bf00 nop + 80042c8: 40000400 .word 0x40000400 + 80042cc: 40023800 .word 0x40023800 + 80042d0: 40000800 .word 0x40000800 - /* Write to TIMx SMCR */ - htim->Instance->SMCR = tmpsmcr; - 800259a: 687b ldr r3, [r7, #4] - 800259c: 681b ldr r3, [r3, #0] - 800259e: 697a ldr r2, [r7, #20] - 80025a0: 609a str r2, [r3, #8] +080042d4 : - /* Write to TIMx CCMR1 */ - htim->Instance->CCMR1 = tmpccmr1; - 80025a2: 687b ldr r3, [r7, #4] - 80025a4: 681b ldr r3, [r3, #0] - 80025a6: 693a ldr r2, [r7, #16] - 80025a8: 619a str r2, [r3, #24] +void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim) +{ + 80042d4: b580 push {r7, lr} + 80042d6: b088 sub sp, #32 + 80042d8: af00 add r7, sp, #0 + 80042da: 6078 str r0, [r7, #4] + GPIO_InitTypeDef GPIO_InitStruct = {0}; + 80042dc: f107 030c add.w r3, r7, #12 + 80042e0: 2200 movs r2, #0 + 80042e2: 601a str r2, [r3, #0] + 80042e4: 605a str r2, [r3, #4] + 80042e6: 609a str r2, [r3, #8] + 80042e8: 60da str r2, [r3, #12] + 80042ea: 611a str r2, [r3, #16] + if(htim->Instance==TIM4) + 80042ec: 687b ldr r3, [r7, #4] + 80042ee: 681b ldr r3, [r3, #0] + 80042f0: 4a11 ldr r2, [pc, #68] ; (8004338 ) + 80042f2: 4293 cmp r3, r2 + 80042f4: d11c bne.n 8004330 + { + /* USER CODE BEGIN TIM4_MspPostInit 0 */ - /* Write to TIMx CCER */ - htim->Instance->CCER = tmpccer; - 80025aa: 687b ldr r3, [r7, #4] - 80025ac: 681b ldr r3, [r3, #0] - 80025ae: 68fa ldr r2, [r7, #12] - 80025b0: 621a str r2, [r3, #32] + /* USER CODE END TIM4_MspPostInit 0 */ + + __HAL_RCC_GPIOD_CLK_ENABLE(); + 80042f6: 4b11 ldr r3, [pc, #68] ; (800433c ) + 80042f8: 6b1b ldr r3, [r3, #48] ; 0x30 + 80042fa: 4a10 ldr r2, [pc, #64] ; (800433c ) + 80042fc: f043 0308 orr.w r3, r3, #8 + 8004300: 6313 str r3, [r2, #48] ; 0x30 + 8004302: 4b0e ldr r3, [pc, #56] ; (800433c ) + 8004304: 6b1b ldr r3, [r3, #48] ; 0x30 + 8004306: f003 0308 and.w r3, r3, #8 + 800430a: 60bb str r3, [r7, #8] + 800430c: 68bb ldr r3, [r7, #8] + /**TIM4 GPIO Configuration + PD14 ------> TIM4_CH3 + PD15 ------> TIM4_CH4 + */ + GPIO_InitStruct.Pin = pwm2_Pin|pwm1_Pin; + 800430e: f44f 4340 mov.w r3, #49152 ; 0xc000 + 8004312: 60fb str r3, [r7, #12] + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + 8004314: 2302 movs r3, #2 + 8004316: 613b str r3, [r7, #16] + GPIO_InitStruct.Pull = GPIO_NOPULL; + 8004318: 2300 movs r3, #0 + 800431a: 617b str r3, [r7, #20] + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + 800431c: 2300 movs r3, #0 + 800431e: 61bb str r3, [r7, #24] + GPIO_InitStruct.Alternate = GPIO_AF2_TIM4; + 8004320: 2302 movs r3, #2 + 8004322: 61fb str r3, [r7, #28] + HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); + 8004324: f107 030c add.w r3, r7, #12 + 8004328: 4619 mov r1, r3 + 800432a: 4805 ldr r0, [pc, #20] ; (8004340 ) + 800432c: f000 ffae bl 800528c + /* USER CODE BEGIN TIM4_MspPostInit 1 */ - /* Initialize the TIM state*/ - htim->State = HAL_TIM_STATE_READY; - 80025b2: 687b ldr r3, [r7, #4] - 80025b4: 2201 movs r2, #1 - 80025b6: f883 203d strb.w r2, [r3, #61] ; 0x3d + /* USER CODE END TIM4_MspPostInit 1 */ + } - return HAL_OK; - 80025ba: 2300 movs r3, #0 } - 80025bc: 4618 mov r0, r3 - 80025be: 3718 adds r7, #24 - 80025c0: 46bd mov sp, r7 - 80025c2: bd80 pop {r7, pc} - 80025c4: fffebff8 .word 0xfffebff8 - 80025c8: fffffcfc .word 0xfffffcfc - 80025cc: fffff3f3 .word 0xfffff3f3 - 80025d0: ffff0f0f .word 0xffff0f0f - -080025d4 : - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_Encoder_Start(TIM_HandleTypeDef *htim, uint32_t Channel) + 8004330: bf00 nop + 8004332: 3720 adds r7, #32 + 8004334: 46bd mov sp, r7 + 8004336: bd80 pop {r7, pc} + 8004338: 40000800 .word 0x40000800 + 800433c: 40023800 .word 0x40023800 + 8004340: 40020c00 .word 0x40020c00 + +08004344 : +* This function configures the hardware resources used in this example +* @param huart: UART handle pointer +* @retval None +*/ +void HAL_UART_MspInit(UART_HandleTypeDef* huart) { - 80025d4: b580 push {r7, lr} - 80025d6: b082 sub sp, #8 - 80025d8: af00 add r7, sp, #0 - 80025da: 6078 str r0, [r7, #4] - 80025dc: 6039 str r1, [r7, #0] - /* Check the parameters */ - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - - /* Enable the encoder interface channels */ - switch (Channel) - 80025de: 683b ldr r3, [r7, #0] - 80025e0: 2b00 cmp r3, #0 - 80025e2: d002 beq.n 80025ea - 80025e4: 2b04 cmp r3, #4 - 80025e6: d008 beq.n 80025fa - 80025e8: e00f b.n 800260a + 8004344: b580 push {r7, lr} + 8004346: b08c sub sp, #48 ; 0x30 + 8004348: af00 add r7, sp, #0 + 800434a: 6078 str r0, [r7, #4] + GPIO_InitTypeDef GPIO_InitStruct = {0}; + 800434c: f107 031c add.w r3, r7, #28 + 8004350: 2200 movs r2, #0 + 8004352: 601a str r2, [r3, #0] + 8004354: 605a str r2, [r3, #4] + 8004356: 609a str r2, [r3, #8] + 8004358: 60da str r2, [r3, #12] + 800435a: 611a str r2, [r3, #16] + if(huart->Instance==USART3) + 800435c: 687b ldr r3, [r7, #4] + 800435e: 681b ldr r3, [r3, #0] + 8004360: 4a93 ldr r2, [pc, #588] ; (80045b0 ) + 8004362: 4293 cmp r3, r2 + 8004364: f040 808e bne.w 8004484 { - case TIM_CHANNEL_1: - { - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); - 80025ea: 687b ldr r3, [r7, #4] - 80025ec: 681b ldr r3, [r3, #0] - 80025ee: 2201 movs r2, #1 - 80025f0: 2100 movs r1, #0 - 80025f2: 4618 mov r0, r3 - 80025f4: f000 fed6 bl 80033a4 - break; - 80025f8: e016 b.n 8002628 - } + /* USER CODE BEGIN USART3_MspInit 0 */ - case TIM_CHANNEL_2: + /* USER CODE END USART3_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_USART3_CLK_ENABLE(); + 8004368: 4b92 ldr r3, [pc, #584] ; (80045b4 ) + 800436a: 6c1b ldr r3, [r3, #64] ; 0x40 + 800436c: 4a91 ldr r2, [pc, #580] ; (80045b4 ) + 800436e: f443 2380 orr.w r3, r3, #262144 ; 0x40000 + 8004372: 6413 str r3, [r2, #64] ; 0x40 + 8004374: 4b8f ldr r3, [pc, #572] ; (80045b4 ) + 8004376: 6c1b ldr r3, [r3, #64] ; 0x40 + 8004378: f403 2380 and.w r3, r3, #262144 ; 0x40000 + 800437c: 61bb str r3, [r7, #24] + 800437e: 69bb ldr r3, [r7, #24] + + __HAL_RCC_GPIOD_CLK_ENABLE(); + 8004380: 4b8c ldr r3, [pc, #560] ; (80045b4 ) + 8004382: 6b1b ldr r3, [r3, #48] ; 0x30 + 8004384: 4a8b ldr r2, [pc, #556] ; (80045b4 ) + 8004386: f043 0308 orr.w r3, r3, #8 + 800438a: 6313 str r3, [r2, #48] ; 0x30 + 800438c: 4b89 ldr r3, [pc, #548] ; (80045b4 ) + 800438e: 6b1b ldr r3, [r3, #48] ; 0x30 + 8004390: f003 0308 and.w r3, r3, #8 + 8004394: 617b str r3, [r7, #20] + 8004396: 697b ldr r3, [r7, #20] + /**USART3 GPIO Configuration + PD8 ------> USART3_TX + PD9 ------> USART3_RX + */ + GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9; + 8004398: f44f 7340 mov.w r3, #768 ; 0x300 + 800439c: 61fb str r3, [r7, #28] + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + 800439e: 2302 movs r3, #2 + 80043a0: 623b str r3, [r7, #32] + GPIO_InitStruct.Pull = GPIO_NOPULL; + 80043a2: 2300 movs r3, #0 + 80043a4: 627b str r3, [r7, #36] ; 0x24 + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + 80043a6: 2303 movs r3, #3 + 80043a8: 62bb str r3, [r7, #40] ; 0x28 + GPIO_InitStruct.Alternate = GPIO_AF7_USART3; + 80043aa: 2307 movs r3, #7 + 80043ac: 62fb str r3, [r7, #44] ; 0x2c + HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); + 80043ae: f107 031c add.w r3, r7, #28 + 80043b2: 4619 mov r1, r3 + 80043b4: 4880 ldr r0, [pc, #512] ; (80045b8 ) + 80043b6: f000 ff69 bl 800528c + + /* USART3 DMA Init */ + /* USART3_RX Init */ + hdma_usart3_rx.Instance = DMA1_Stream1; + 80043ba: 4b80 ldr r3, [pc, #512] ; (80045bc ) + 80043bc: 4a80 ldr r2, [pc, #512] ; (80045c0 ) + 80043be: 601a str r2, [r3, #0] + hdma_usart3_rx.Init.Channel = DMA_CHANNEL_4; + 80043c0: 4b7e ldr r3, [pc, #504] ; (80045bc ) + 80043c2: f04f 6200 mov.w r2, #134217728 ; 0x8000000 + 80043c6: 605a str r2, [r3, #4] + hdma_usart3_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; + 80043c8: 4b7c ldr r3, [pc, #496] ; (80045bc ) + 80043ca: 2200 movs r2, #0 + 80043cc: 609a str r2, [r3, #8] + hdma_usart3_rx.Init.PeriphInc = DMA_PINC_DISABLE; + 80043ce: 4b7b ldr r3, [pc, #492] ; (80045bc ) + 80043d0: 2200 movs r2, #0 + 80043d2: 60da str r2, [r3, #12] + hdma_usart3_rx.Init.MemInc = DMA_MINC_ENABLE; + 80043d4: 4b79 ldr r3, [pc, #484] ; (80045bc ) + 80043d6: f44f 6280 mov.w r2, #1024 ; 0x400 + 80043da: 611a str r2, [r3, #16] + hdma_usart3_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; + 80043dc: 4b77 ldr r3, [pc, #476] ; (80045bc ) + 80043de: 2200 movs r2, #0 + 80043e0: 615a str r2, [r3, #20] + hdma_usart3_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; + 80043e2: 4b76 ldr r3, [pc, #472] ; (80045bc ) + 80043e4: 2200 movs r2, #0 + 80043e6: 619a str r2, [r3, #24] + hdma_usart3_rx.Init.Mode = DMA_NORMAL; + 80043e8: 4b74 ldr r3, [pc, #464] ; (80045bc ) + 80043ea: 2200 movs r2, #0 + 80043ec: 61da str r2, [r3, #28] + hdma_usart3_rx.Init.Priority = DMA_PRIORITY_LOW; + 80043ee: 4b73 ldr r3, [pc, #460] ; (80045bc ) + 80043f0: 2200 movs r2, #0 + 80043f2: 621a str r2, [r3, #32] + hdma_usart3_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; + 80043f4: 4b71 ldr r3, [pc, #452] ; (80045bc ) + 80043f6: 2200 movs r2, #0 + 80043f8: 625a str r2, [r3, #36] ; 0x24 + if (HAL_DMA_Init(&hdma_usart3_rx) != HAL_OK) + 80043fa: 4870 ldr r0, [pc, #448] ; (80045bc ) + 80043fc: f000 fbae bl 8004b5c + 8004400: 4603 mov r3, r0 + 8004402: 2b00 cmp r3, #0 + 8004404: d001 beq.n 800440a { - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); - 80025fa: 687b ldr r3, [r7, #4] - 80025fc: 681b ldr r3, [r3, #0] - 80025fe: 2201 movs r2, #1 - 8002600: 2104 movs r1, #4 - 8002602: 4618 mov r0, r3 - 8002604: f000 fece bl 80033a4 - break; - 8002608: e00e b.n 8002628 + Error_Handler(); + 8004406: f7fe ff47 bl 8003298 } - default : + __HAL_LINKDMA(huart,hdmarx,hdma_usart3_rx); + 800440a: 687b ldr r3, [r7, #4] + 800440c: 4a6b ldr r2, [pc, #428] ; (80045bc ) + 800440e: 66da str r2, [r3, #108] ; 0x6c + 8004410: 4a6a ldr r2, [pc, #424] ; (80045bc ) + 8004412: 687b ldr r3, [r7, #4] + 8004414: 6393 str r3, [r2, #56] ; 0x38 + + /* USART3_TX Init */ + hdma_usart3_tx.Instance = DMA1_Stream3; + 8004416: 4b6b ldr r3, [pc, #428] ; (80045c4 ) + 8004418: 4a6b ldr r2, [pc, #428] ; (80045c8 ) + 800441a: 601a str r2, [r3, #0] + hdma_usart3_tx.Init.Channel = DMA_CHANNEL_4; + 800441c: 4b69 ldr r3, [pc, #420] ; (80045c4 ) + 800441e: f04f 6200 mov.w r2, #134217728 ; 0x8000000 + 8004422: 605a str r2, [r3, #4] + hdma_usart3_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; + 8004424: 4b67 ldr r3, [pc, #412] ; (80045c4 ) + 8004426: 2240 movs r2, #64 ; 0x40 + 8004428: 609a str r2, [r3, #8] + hdma_usart3_tx.Init.PeriphInc = DMA_PINC_DISABLE; + 800442a: 4b66 ldr r3, [pc, #408] ; (80045c4 ) + 800442c: 2200 movs r2, #0 + 800442e: 60da str r2, [r3, #12] + hdma_usart3_tx.Init.MemInc = DMA_MINC_ENABLE; + 8004430: 4b64 ldr r3, [pc, #400] ; (80045c4 ) + 8004432: f44f 6280 mov.w r2, #1024 ; 0x400 + 8004436: 611a str r2, [r3, #16] + hdma_usart3_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; + 8004438: 4b62 ldr r3, [pc, #392] ; (80045c4 ) + 800443a: 2200 movs r2, #0 + 800443c: 615a str r2, [r3, #20] + hdma_usart3_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; + 800443e: 4b61 ldr r3, [pc, #388] ; (80045c4 ) + 8004440: 2200 movs r2, #0 + 8004442: 619a str r2, [r3, #24] + hdma_usart3_tx.Init.Mode = DMA_NORMAL; + 8004444: 4b5f ldr r3, [pc, #380] ; (80045c4 ) + 8004446: 2200 movs r2, #0 + 8004448: 61da str r2, [r3, #28] + hdma_usart3_tx.Init.Priority = DMA_PRIORITY_LOW; + 800444a: 4b5e ldr r3, [pc, #376] ; (80045c4 ) + 800444c: 2200 movs r2, #0 + 800444e: 621a str r2, [r3, #32] + hdma_usart3_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; + 8004450: 4b5c ldr r3, [pc, #368] ; (80045c4 ) + 8004452: 2200 movs r2, #0 + 8004454: 625a str r2, [r3, #36] ; 0x24 + if (HAL_DMA_Init(&hdma_usart3_tx) != HAL_OK) + 8004456: 485b ldr r0, [pc, #364] ; (80045c4 ) + 8004458: f000 fb80 bl 8004b5c + 800445c: 4603 mov r3, r0 + 800445e: 2b00 cmp r3, #0 + 8004460: d001 beq.n 8004466 { - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); - 800260a: 687b ldr r3, [r7, #4] - 800260c: 681b ldr r3, [r3, #0] - 800260e: 2201 movs r2, #1 - 8002610: 2100 movs r1, #0 - 8002612: 4618 mov r0, r3 - 8002614: f000 fec6 bl 80033a4 - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); - 8002618: 687b ldr r3, [r7, #4] - 800261a: 681b ldr r3, [r3, #0] - 800261c: 2201 movs r2, #1 - 800261e: 2104 movs r1, #4 - 8002620: 4618 mov r0, r3 - 8002622: f000 febf bl 80033a4 - break; - 8002626: bf00 nop + Error_Handler(); + 8004462: f7fe ff19 bl 8003298 } - } - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - 8002628: 687b ldr r3, [r7, #4] - 800262a: 681b ldr r3, [r3, #0] - 800262c: 681a ldr r2, [r3, #0] - 800262e: 687b ldr r3, [r7, #4] - 8002630: 681b ldr r3, [r3, #0] - 8002632: f042 0201 orr.w r2, r2, #1 - 8002636: 601a str r2, [r3, #0] - /* Return function status */ - return HAL_OK; - 8002638: 2300 movs r3, #0 -} - 800263a: 4618 mov r0, r3 - 800263c: 3708 adds r7, #8 - 800263e: 46bd mov sp, r7 - 8002640: bd80 pop {r7, pc} + __HAL_LINKDMA(huart,hdmatx,hdma_usart3_tx); + 8004466: 687b ldr r3, [r7, #4] + 8004468: 4a56 ldr r2, [pc, #344] ; (80045c4 ) + 800446a: 669a str r2, [r3, #104] ; 0x68 + 800446c: 4a55 ldr r2, [pc, #340] ; (80045c4 ) + 800446e: 687b ldr r3, [r7, #4] + 8004470: 6393 str r3, [r2, #56] ; 0x38 -08002642 : - * @brief This function handles TIM interrupts requests. - * @param htim TIM handle - * @retval None - */ -void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) -{ - 8002642: b580 push {r7, lr} - 8002644: b082 sub sp, #8 - 8002646: af00 add r7, sp, #0 - 8002648: 6078 str r0, [r7, #4] - /* Capture compare 1 event */ - if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) - 800264a: 687b ldr r3, [r7, #4] - 800264c: 681b ldr r3, [r3, #0] - 800264e: 691b ldr r3, [r3, #16] - 8002650: f003 0302 and.w r3, r3, #2 - 8002654: 2b02 cmp r3, #2 - 8002656: d122 bne.n 800269e - { - if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) != RESET) - 8002658: 687b ldr r3, [r7, #4] - 800265a: 681b ldr r3, [r3, #0] - 800265c: 68db ldr r3, [r3, #12] - 800265e: f003 0302 and.w r3, r3, #2 - 8002662: 2b02 cmp r3, #2 - 8002664: d11b bne.n 800269e - { - { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1); - 8002666: 687b ldr r3, [r7, #4] - 8002668: 681b ldr r3, [r3, #0] - 800266a: f06f 0202 mvn.w r2, #2 - 800266e: 611a str r2, [r3, #16] - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; - 8002670: 687b ldr r3, [r7, #4] - 8002672: 2201 movs r2, #1 - 8002674: 771a strb r2, [r3, #28] + /* USART3 interrupt Init */ + HAL_NVIC_SetPriority(USART3_IRQn, 0, 0); + 8004472: 2200 movs r2, #0 + 8004474: 2100 movs r1, #0 + 8004476: 2027 movs r0, #39 ; 0x27 + 8004478: f000 fb39 bl 8004aee + HAL_NVIC_EnableIRQ(USART3_IRQn); + 800447c: 2027 movs r0, #39 ; 0x27 + 800447e: f000 fb52 bl 8004b26 + /* USER CODE BEGIN USART6_MspInit 1 */ - /* Input capture event */ - if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) - 8002676: 687b ldr r3, [r7, #4] - 8002678: 681b ldr r3, [r3, #0] - 800267a: 699b ldr r3, [r3, #24] - 800267c: f003 0303 and.w r3, r3, #3 - 8002680: 2b00 cmp r3, #0 - 8002682: d003 beq.n 800268c - { -#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) - htim->IC_CaptureCallback(htim); -#else - HAL_TIM_IC_CaptureCallback(htim); - 8002684: 6878 ldr r0, [r7, #4] - 8002686: f000 fad7 bl 8002c38 - 800268a: e005 b.n 8002698 - { -#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) - htim->OC_DelayElapsedCallback(htim); - htim->PWM_PulseFinishedCallback(htim); -#else - HAL_TIM_OC_DelayElapsedCallback(htim); - 800268c: 6878 ldr r0, [r7, #4] - 800268e: f000 fac9 bl 8002c24 - HAL_TIM_PWM_PulseFinishedCallback(htim); - 8002692: 6878 ldr r0, [r7, #4] - 8002694: f000 fada bl 8002c4c -#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ - } - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - 8002698: 687b ldr r3, [r7, #4] - 800269a: 2200 movs r2, #0 - 800269c: 771a strb r2, [r3, #28] - } - } - } - /* Capture compare 2 event */ - if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET) - 800269e: 687b ldr r3, [r7, #4] - 80026a0: 681b ldr r3, [r3, #0] - 80026a2: 691b ldr r3, [r3, #16] - 80026a4: f003 0304 and.w r3, r3, #4 - 80026a8: 2b04 cmp r3, #4 - 80026aa: d122 bne.n 80026f2 - { - if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) != RESET) - 80026ac: 687b ldr r3, [r7, #4] - 80026ae: 681b ldr r3, [r3, #0] - 80026b0: 68db ldr r3, [r3, #12] - 80026b2: f003 0304 and.w r3, r3, #4 - 80026b6: 2b04 cmp r3, #4 - 80026b8: d11b bne.n 80026f2 - { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2); - 80026ba: 687b ldr r3, [r7, #4] - 80026bc: 681b ldr r3, [r3, #0] - 80026be: f06f 0204 mvn.w r2, #4 - 80026c2: 611a str r2, [r3, #16] - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; - 80026c4: 687b ldr r3, [r7, #4] - 80026c6: 2202 movs r2, #2 - 80026c8: 771a strb r2, [r3, #28] - /* Input capture event */ - if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) - 80026ca: 687b ldr r3, [r7, #4] - 80026cc: 681b ldr r3, [r3, #0] - 80026ce: 699b ldr r3, [r3, #24] - 80026d0: f403 7340 and.w r3, r3, #768 ; 0x300 - 80026d4: 2b00 cmp r3, #0 - 80026d6: d003 beq.n 80026e0 - { -#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) - htim->IC_CaptureCallback(htim); -#else - HAL_TIM_IC_CaptureCallback(htim); - 80026d8: 6878 ldr r0, [r7, #4] - 80026da: f000 faad bl 8002c38 - 80026de: e005 b.n 80026ec - { -#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) - htim->OC_DelayElapsedCallback(htim); - htim->PWM_PulseFinishedCallback(htim); -#else - HAL_TIM_OC_DelayElapsedCallback(htim); - 80026e0: 6878 ldr r0, [r7, #4] - 80026e2: f000 fa9f bl 8002c24 - HAL_TIM_PWM_PulseFinishedCallback(htim); - 80026e6: 6878 ldr r0, [r7, #4] - 80026e8: f000 fab0 bl 8002c4c -#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ - } - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - 80026ec: 687b ldr r3, [r7, #4] - 80026ee: 2200 movs r2, #0 - 80026f0: 771a strb r2, [r3, #28] - } - } - /* Capture compare 3 event */ - if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET) - 80026f2: 687b ldr r3, [r7, #4] - 80026f4: 681b ldr r3, [r3, #0] - 80026f6: 691b ldr r3, [r3, #16] - 80026f8: f003 0308 and.w r3, r3, #8 - 80026fc: 2b08 cmp r3, #8 - 80026fe: d122 bne.n 8002746 - { - if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) != RESET) - 8002700: 687b ldr r3, [r7, #4] - 8002702: 681b ldr r3, [r3, #0] - 8002704: 68db ldr r3, [r3, #12] - 8002706: f003 0308 and.w r3, r3, #8 - 800270a: 2b08 cmp r3, #8 - 800270c: d11b bne.n 8002746 - { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3); - 800270e: 687b ldr r3, [r7, #4] - 8002710: 681b ldr r3, [r3, #0] - 8002712: f06f 0208 mvn.w r2, #8 - 8002716: 611a str r2, [r3, #16] - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; - 8002718: 687b ldr r3, [r7, #4] - 800271a: 2204 movs r2, #4 - 800271c: 771a strb r2, [r3, #28] - /* Input capture event */ - if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) - 800271e: 687b ldr r3, [r7, #4] - 8002720: 681b ldr r3, [r3, #0] - 8002722: 69db ldr r3, [r3, #28] - 8002724: f003 0303 and.w r3, r3, #3 - 8002728: 2b00 cmp r3, #0 - 800272a: d003 beq.n 8002734 - { -#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) - htim->IC_CaptureCallback(htim); -#else - HAL_TIM_IC_CaptureCallback(htim); - 800272c: 6878 ldr r0, [r7, #4] - 800272e: f000 fa83 bl 8002c38 - 8002732: e005 b.n 8002740 - { -#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) - htim->OC_DelayElapsedCallback(htim); - htim->PWM_PulseFinishedCallback(htim); -#else - HAL_TIM_OC_DelayElapsedCallback(htim); - 8002734: 6878 ldr r0, [r7, #4] - 8002736: f000 fa75 bl 8002c24 - HAL_TIM_PWM_PulseFinishedCallback(htim); - 800273a: 6878 ldr r0, [r7, #4] - 800273c: f000 fa86 bl 8002c4c -#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ - } - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - 8002740: 687b ldr r3, [r7, #4] - 8002742: 2200 movs r2, #0 - 8002744: 771a strb r2, [r3, #28] - } - } - /* Capture compare 4 event */ - if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET) - 8002746: 687b ldr r3, [r7, #4] - 8002748: 681b ldr r3, [r3, #0] - 800274a: 691b ldr r3, [r3, #16] - 800274c: f003 0310 and.w r3, r3, #16 - 8002750: 2b10 cmp r3, #16 - 8002752: d122 bne.n 800279a - { - if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) != RESET) - 8002754: 687b ldr r3, [r7, #4] - 8002756: 681b ldr r3, [r3, #0] - 8002758: 68db ldr r3, [r3, #12] - 800275a: f003 0310 and.w r3, r3, #16 - 800275e: 2b10 cmp r3, #16 - 8002760: d11b bne.n 800279a - { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4); - 8002762: 687b ldr r3, [r7, #4] - 8002764: 681b ldr r3, [r3, #0] - 8002766: f06f 0210 mvn.w r2, #16 - 800276a: 611a str r2, [r3, #16] - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; - 800276c: 687b ldr r3, [r7, #4] - 800276e: 2208 movs r2, #8 - 8002770: 771a strb r2, [r3, #28] - /* Input capture event */ - if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) - 8002772: 687b ldr r3, [r7, #4] - 8002774: 681b ldr r3, [r3, #0] - 8002776: 69db ldr r3, [r3, #28] - 8002778: f403 7340 and.w r3, r3, #768 ; 0x300 - 800277c: 2b00 cmp r3, #0 - 800277e: d003 beq.n 8002788 - { -#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) - htim->IC_CaptureCallback(htim); -#else - HAL_TIM_IC_CaptureCallback(htim); - 8002780: 6878 ldr r0, [r7, #4] - 8002782: f000 fa59 bl 8002c38 - 8002786: e005 b.n 8002794 - { -#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) - htim->OC_DelayElapsedCallback(htim); - htim->PWM_PulseFinishedCallback(htim); -#else - HAL_TIM_OC_DelayElapsedCallback(htim); - 8002788: 6878 ldr r0, [r7, #4] - 800278a: f000 fa4b bl 8002c24 - HAL_TIM_PWM_PulseFinishedCallback(htim); - 800278e: 6878 ldr r0, [r7, #4] - 8002790: f000 fa5c bl 8002c4c -#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ - } - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - 8002794: 687b ldr r3, [r7, #4] - 8002796: 2200 movs r2, #0 - 8002798: 771a strb r2, [r3, #28] - } - } - /* TIM Update event */ - if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET) - 800279a: 687b ldr r3, [r7, #4] - 800279c: 681b ldr r3, [r3, #0] - 800279e: 691b ldr r3, [r3, #16] - 80027a0: f003 0301 and.w r3, r3, #1 - 80027a4: 2b01 cmp r3, #1 - 80027a6: d10e bne.n 80027c6 - { - if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) != RESET) - 80027a8: 687b ldr r3, [r7, #4] - 80027aa: 681b ldr r3, [r3, #0] - 80027ac: 68db ldr r3, [r3, #12] - 80027ae: f003 0301 and.w r3, r3, #1 - 80027b2: 2b01 cmp r3, #1 - 80027b4: d107 bne.n 80027c6 - { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); - 80027b6: 687b ldr r3, [r7, #4] - 80027b8: 681b ldr r3, [r3, #0] - 80027ba: f06f 0201 mvn.w r2, #1 - 80027be: 611a str r2, [r3, #16] -#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) - htim->PeriodElapsedCallback(htim); -#else - HAL_TIM_PeriodElapsedCallback(htim); - 80027c0: 6878 ldr r0, [r7, #4] - 80027c2: f004 fbe9 bl 8006f98 -#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ - } - } - /* TIM Break input event */ - if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET) - 80027c6: 687b ldr r3, [r7, #4] - 80027c8: 681b ldr r3, [r3, #0] - 80027ca: 691b ldr r3, [r3, #16] - 80027cc: f003 0380 and.w r3, r3, #128 ; 0x80 - 80027d0: 2b80 cmp r3, #128 ; 0x80 - 80027d2: d10e bne.n 80027f2 - { - if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) != RESET) - 80027d4: 687b ldr r3, [r7, #4] - 80027d6: 681b ldr r3, [r3, #0] - 80027d8: 68db ldr r3, [r3, #12] - 80027da: f003 0380 and.w r3, r3, #128 ; 0x80 - 80027de: 2b80 cmp r3, #128 ; 0x80 - 80027e0: d107 bne.n 80027f2 - { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK); - 80027e2: 687b ldr r3, [r7, #4] - 80027e4: 681b ldr r3, [r3, #0] - 80027e6: f06f 0280 mvn.w r2, #128 ; 0x80 - 80027ea: 611a str r2, [r3, #16] -#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) - htim->BreakCallback(htim); -#else - HAL_TIMEx_BreakCallback(htim); - 80027ec: 6878 ldr r0, [r7, #4] - 80027ee: f000 fe65 bl 80034bc -#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ - } - } - /* TIM Break2 input event */ - if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK2) != RESET) - 80027f2: 687b ldr r3, [r7, #4] - 80027f4: 681b ldr r3, [r3, #0] - 80027f6: 691b ldr r3, [r3, #16] - 80027f8: f403 7380 and.w r3, r3, #256 ; 0x100 - 80027fc: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 8002800: d10e bne.n 8002820 - { - if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) != RESET) - 8002802: 687b ldr r3, [r7, #4] - 8002804: 681b ldr r3, [r3, #0] - 8002806: 68db ldr r3, [r3, #12] - 8002808: f003 0380 and.w r3, r3, #128 ; 0x80 - 800280c: 2b80 cmp r3, #128 ; 0x80 - 800280e: d107 bne.n 8002820 - { - __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_BREAK2); - 8002810: 687b ldr r3, [r7, #4] - 8002812: 681b ldr r3, [r3, #0] - 8002814: f46f 7280 mvn.w r2, #256 ; 0x100 - 8002818: 611a str r2, [r3, #16] -#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) - htim->Break2Callback(htim); -#else - HAL_TIMEx_Break2Callback(htim); - 800281a: 6878 ldr r0, [r7, #4] - 800281c: f000 fe58 bl 80034d0 -#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ - } - } - /* TIM Trigger detection event */ - if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET) - 8002820: 687b ldr r3, [r7, #4] - 8002822: 681b ldr r3, [r3, #0] - 8002824: 691b ldr r3, [r3, #16] - 8002826: f003 0340 and.w r3, r3, #64 ; 0x40 - 800282a: 2b40 cmp r3, #64 ; 0x40 - 800282c: d10e bne.n 800284c - { - if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) != RESET) - 800282e: 687b ldr r3, [r7, #4] - 8002830: 681b ldr r3, [r3, #0] - 8002832: 68db ldr r3, [r3, #12] - 8002834: f003 0340 and.w r3, r3, #64 ; 0x40 - 8002838: 2b40 cmp r3, #64 ; 0x40 - 800283a: d107 bne.n 800284c - { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); - 800283c: 687b ldr r3, [r7, #4] - 800283e: 681b ldr r3, [r3, #0] - 8002840: f06f 0240 mvn.w r2, #64 ; 0x40 - 8002844: 611a str r2, [r3, #16] -#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) - htim->TriggerCallback(htim); -#else - HAL_TIM_TriggerCallback(htim); - 8002846: 6878 ldr r0, [r7, #4] - 8002848: f000 fa0a bl 8002c60 -#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ - } - } - /* TIM commutation event */ - if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET) - 800284c: 687b ldr r3, [r7, #4] - 800284e: 681b ldr r3, [r3, #0] - 8002850: 691b ldr r3, [r3, #16] - 8002852: f003 0320 and.w r3, r3, #32 - 8002856: 2b20 cmp r3, #32 - 8002858: d10e bne.n 8002878 - { - if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) != RESET) - 800285a: 687b ldr r3, [r7, #4] - 800285c: 681b ldr r3, [r3, #0] - 800285e: 68db ldr r3, [r3, #12] - 8002860: f003 0320 and.w r3, r3, #32 - 8002864: 2b20 cmp r3, #32 - 8002866: d107 bne.n 8002878 - { - __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM); - 8002868: 687b ldr r3, [r7, #4] - 800286a: 681b ldr r3, [r3, #0] - 800286c: f06f 0220 mvn.w r2, #32 - 8002870: 611a str r2, [r3, #16] -#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) - htim->CommutationCallback(htim); -#else - HAL_TIMEx_CommutCallback(htim); - 8002872: 6878 ldr r0, [r7, #4] - 8002874: f000 fe18 bl 80034a8 -#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ - } + /* USER CODE END USART6_MspInit 1 */ } + +} + 8004482: e091 b.n 80045a8 + else if(huart->Instance==USART6) + 8004484: 687b ldr r3, [r7, #4] + 8004486: 681b ldr r3, [r3, #0] + 8004488: 4a50 ldr r2, [pc, #320] ; (80045cc ) + 800448a: 4293 cmp r3, r2 + 800448c: f040 808c bne.w 80045a8 + __HAL_RCC_USART6_CLK_ENABLE(); + 8004490: 4b48 ldr r3, [pc, #288] ; (80045b4 ) + 8004492: 6c5b ldr r3, [r3, #68] ; 0x44 + 8004494: 4a47 ldr r2, [pc, #284] ; (80045b4 ) + 8004496: f043 0320 orr.w r3, r3, #32 + 800449a: 6453 str r3, [r2, #68] ; 0x44 + 800449c: 4b45 ldr r3, [pc, #276] ; (80045b4 ) + 800449e: 6c5b ldr r3, [r3, #68] ; 0x44 + 80044a0: f003 0320 and.w r3, r3, #32 + 80044a4: 613b str r3, [r7, #16] + 80044a6: 693b ldr r3, [r7, #16] + __HAL_RCC_GPIOC_CLK_ENABLE(); + 80044a8: 4b42 ldr r3, [pc, #264] ; (80045b4 ) + 80044aa: 6b1b ldr r3, [r3, #48] ; 0x30 + 80044ac: 4a41 ldr r2, [pc, #260] ; (80045b4 ) + 80044ae: f043 0304 orr.w r3, r3, #4 + 80044b2: 6313 str r3, [r2, #48] ; 0x30 + 80044b4: 4b3f ldr r3, [pc, #252] ; (80045b4 ) + 80044b6: 6b1b ldr r3, [r3, #48] ; 0x30 + 80044b8: f003 0304 and.w r3, r3, #4 + 80044bc: 60fb str r3, [r7, #12] + 80044be: 68fb ldr r3, [r7, #12] + GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7; + 80044c0: 23c0 movs r3, #192 ; 0xc0 + 80044c2: 61fb str r3, [r7, #28] + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + 80044c4: 2302 movs r3, #2 + 80044c6: 623b str r3, [r7, #32] + GPIO_InitStruct.Pull = GPIO_NOPULL; + 80044c8: 2300 movs r3, #0 + 80044ca: 627b str r3, [r7, #36] ; 0x24 + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + 80044cc: 2303 movs r3, #3 + 80044ce: 62bb str r3, [r7, #40] ; 0x28 + GPIO_InitStruct.Alternate = GPIO_AF8_USART6; + 80044d0: 2308 movs r3, #8 + 80044d2: 62fb str r3, [r7, #44] ; 0x2c + HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); + 80044d4: f107 031c add.w r3, r7, #28 + 80044d8: 4619 mov r1, r3 + 80044da: 483d ldr r0, [pc, #244] ; (80045d0 ) + 80044dc: f000 fed6 bl 800528c + hdma_usart6_rx.Instance = DMA2_Stream1; + 80044e0: 4b3c ldr r3, [pc, #240] ; (80045d4 ) + 80044e2: 4a3d ldr r2, [pc, #244] ; (80045d8 ) + 80044e4: 601a str r2, [r3, #0] + hdma_usart6_rx.Init.Channel = DMA_CHANNEL_5; + 80044e6: 4b3b ldr r3, [pc, #236] ; (80045d4 ) + 80044e8: f04f 6220 mov.w r2, #167772160 ; 0xa000000 + 80044ec: 605a str r2, [r3, #4] + hdma_usart6_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; + 80044ee: 4b39 ldr r3, [pc, #228] ; (80045d4 ) + 80044f0: 2200 movs r2, #0 + 80044f2: 609a str r2, [r3, #8] + hdma_usart6_rx.Init.PeriphInc = DMA_PINC_DISABLE; + 80044f4: 4b37 ldr r3, [pc, #220] ; (80045d4 ) + 80044f6: 2200 movs r2, #0 + 80044f8: 60da str r2, [r3, #12] + hdma_usart6_rx.Init.MemInc = DMA_MINC_ENABLE; + 80044fa: 4b36 ldr r3, [pc, #216] ; (80045d4 ) + 80044fc: f44f 6280 mov.w r2, #1024 ; 0x400 + 8004500: 611a str r2, [r3, #16] + hdma_usart6_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; + 8004502: 4b34 ldr r3, [pc, #208] ; (80045d4 ) + 8004504: 2200 movs r2, #0 + 8004506: 615a str r2, [r3, #20] + hdma_usart6_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; + 8004508: 4b32 ldr r3, [pc, #200] ; (80045d4 ) + 800450a: 2200 movs r2, #0 + 800450c: 619a str r2, [r3, #24] + hdma_usart6_rx.Init.Mode = DMA_NORMAL; + 800450e: 4b31 ldr r3, [pc, #196] ; (80045d4 ) + 8004510: 2200 movs r2, #0 + 8004512: 61da str r2, [r3, #28] + hdma_usart6_rx.Init.Priority = DMA_PRIORITY_LOW; + 8004514: 4b2f ldr r3, [pc, #188] ; (80045d4 ) + 8004516: 2200 movs r2, #0 + 8004518: 621a str r2, [r3, #32] + hdma_usart6_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; + 800451a: 4b2e ldr r3, [pc, #184] ; (80045d4 ) + 800451c: 2200 movs r2, #0 + 800451e: 625a str r2, [r3, #36] ; 0x24 + if (HAL_DMA_Init(&hdma_usart6_rx) != HAL_OK) + 8004520: 482c ldr r0, [pc, #176] ; (80045d4 ) + 8004522: f000 fb1b bl 8004b5c + 8004526: 4603 mov r3, r0 + 8004528: 2b00 cmp r3, #0 + 800452a: d001 beq.n 8004530 + Error_Handler(); + 800452c: f7fe feb4 bl 8003298 + __HAL_LINKDMA(huart,hdmarx,hdma_usart6_rx); + 8004530: 687b ldr r3, [r7, #4] + 8004532: 4a28 ldr r2, [pc, #160] ; (80045d4 ) + 8004534: 66da str r2, [r3, #108] ; 0x6c + 8004536: 4a27 ldr r2, [pc, #156] ; (80045d4 ) + 8004538: 687b ldr r3, [r7, #4] + 800453a: 6393 str r3, [r2, #56] ; 0x38 + hdma_usart6_tx.Instance = DMA2_Stream6; + 800453c: 4b27 ldr r3, [pc, #156] ; (80045dc ) + 800453e: 4a28 ldr r2, [pc, #160] ; (80045e0 ) + 8004540: 601a str r2, [r3, #0] + hdma_usart6_tx.Init.Channel = DMA_CHANNEL_5; + 8004542: 4b26 ldr r3, [pc, #152] ; (80045dc ) + 8004544: f04f 6220 mov.w r2, #167772160 ; 0xa000000 + 8004548: 605a str r2, [r3, #4] + hdma_usart6_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; + 800454a: 4b24 ldr r3, [pc, #144] ; (80045dc ) + 800454c: 2240 movs r2, #64 ; 0x40 + 800454e: 609a str r2, [r3, #8] + hdma_usart6_tx.Init.PeriphInc = DMA_PINC_DISABLE; + 8004550: 4b22 ldr r3, [pc, #136] ; (80045dc ) + 8004552: 2200 movs r2, #0 + 8004554: 60da str r2, [r3, #12] + hdma_usart6_tx.Init.MemInc = DMA_MINC_ENABLE; + 8004556: 4b21 ldr r3, [pc, #132] ; (80045dc ) + 8004558: f44f 6280 mov.w r2, #1024 ; 0x400 + 800455c: 611a str r2, [r3, #16] + hdma_usart6_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; + 800455e: 4b1f ldr r3, [pc, #124] ; (80045dc ) + 8004560: 2200 movs r2, #0 + 8004562: 615a str r2, [r3, #20] + hdma_usart6_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; + 8004564: 4b1d ldr r3, [pc, #116] ; (80045dc ) + 8004566: 2200 movs r2, #0 + 8004568: 619a str r2, [r3, #24] + hdma_usart6_tx.Init.Mode = DMA_NORMAL; + 800456a: 4b1c ldr r3, [pc, #112] ; (80045dc ) + 800456c: 2200 movs r2, #0 + 800456e: 61da str r2, [r3, #28] + hdma_usart6_tx.Init.Priority = DMA_PRIORITY_LOW; + 8004570: 4b1a ldr r3, [pc, #104] ; (80045dc ) + 8004572: 2200 movs r2, #0 + 8004574: 621a str r2, [r3, #32] + hdma_usart6_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; + 8004576: 4b19 ldr r3, [pc, #100] ; (80045dc ) + 8004578: 2200 movs r2, #0 + 800457a: 625a str r2, [r3, #36] ; 0x24 + if (HAL_DMA_Init(&hdma_usart6_tx) != HAL_OK) + 800457c: 4817 ldr r0, [pc, #92] ; (80045dc ) + 800457e: f000 faed bl 8004b5c + 8004582: 4603 mov r3, r0 + 8004584: 2b00 cmp r3, #0 + 8004586: d001 beq.n 800458c + Error_Handler(); + 8004588: f7fe fe86 bl 8003298 + __HAL_LINKDMA(huart,hdmatx,hdma_usart6_tx); + 800458c: 687b ldr r3, [r7, #4] + 800458e: 4a13 ldr r2, [pc, #76] ; (80045dc ) + 8004590: 669a str r2, [r3, #104] ; 0x68 + 8004592: 4a12 ldr r2, [pc, #72] ; (80045dc ) + 8004594: 687b ldr r3, [r7, #4] + 8004596: 6393 str r3, [r2, #56] ; 0x38 + HAL_NVIC_SetPriority(USART6_IRQn, 0, 0); + 8004598: 2200 movs r2, #0 + 800459a: 2100 movs r1, #0 + 800459c: 2047 movs r0, #71 ; 0x47 + 800459e: f000 faa6 bl 8004aee + HAL_NVIC_EnableIRQ(USART6_IRQn); + 80045a2: 2047 movs r0, #71 ; 0x47 + 80045a4: f000 fabf bl 8004b26 } - 8002878: bf00 nop - 800287a: 3708 adds r7, #8 - 800287c: 46bd mov sp, r7 - 800287e: bd80 pop {r7, pc} + 80045a8: bf00 nop + 80045aa: 3730 adds r7, #48 ; 0x30 + 80045ac: 46bd mov sp, r7 + 80045ae: bd80 pop {r7, pc} + 80045b0: 40004800 .word 0x40004800 + 80045b4: 40023800 .word 0x40023800 + 80045b8: 40020c00 .word 0x40020c00 + 80045bc: 200002a4 .word 0x200002a4 + 80045c0: 40026028 .word 0x40026028 + 80045c4: 20000304 .word 0x20000304 + 80045c8: 40026058 .word 0x40026058 + 80045cc: 40011400 .word 0x40011400 + 80045d0: 40020800 .word 0x40020800 + 80045d4: 20000364 .word 0x20000364 + 80045d8: 40026428 .word 0x40026428 + 80045dc: 200003c4 .word 0x200003c4 + 80045e0: 400264a0 .word 0x400264a0 + +080045e4 : +/******************************************************************************/ +/** + * @brief This function handles Non maskable interrupt. + */ +void NMI_Handler(void) +{ + 80045e4: b480 push {r7} + 80045e6: af00 add r7, sp, #0 -08002880 : - * @retval HAL status + /* USER CODE END NonMaskableInt_IRQn 0 */ + /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ + + /* USER CODE END NonMaskableInt_IRQn 1 */ +} + 80045e8: bf00 nop + 80045ea: 46bd mov sp, r7 + 80045ec: f85d 7b04 ldr.w r7, [sp], #4 + 80045f0: 4770 bx lr + +080045f2 : + +/** + * @brief This function handles Hard fault interrupt. */ -HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim, - TIM_OC_InitTypeDef *sConfig, - uint32_t Channel) +void HardFault_Handler(void) { - 8002880: b580 push {r7, lr} - 8002882: b084 sub sp, #16 - 8002884: af00 add r7, sp, #0 - 8002886: 60f8 str r0, [r7, #12] - 8002888: 60b9 str r1, [r7, #8] - 800288a: 607a str r2, [r7, #4] - assert_param(IS_TIM_PWM_MODE(sConfig->OCMode)); - assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity)); - assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode)); + 80045f2: b480 push {r7} + 80045f4: af00 add r7, sp, #0 + /* USER CODE BEGIN HardFault_IRQn 0 */ - /* Process Locked */ - __HAL_LOCK(htim); - 800288c: 68fb ldr r3, [r7, #12] - 800288e: f893 303c ldrb.w r3, [r3, #60] ; 0x3c - 8002892: 2b01 cmp r3, #1 - 8002894: d101 bne.n 800289a - 8002896: 2302 movs r3, #2 - 8002898: e105 b.n 8002aa6 - 800289a: 68fb ldr r3, [r7, #12] - 800289c: 2201 movs r2, #1 - 800289e: f883 203c strb.w r2, [r3, #60] ; 0x3c + /* USER CODE END HardFault_IRQn 0 */ + while (1) + 80045f6: e7fe b.n 80045f6 - htim->State = HAL_TIM_STATE_BUSY; - 80028a2: 68fb ldr r3, [r7, #12] - 80028a4: 2202 movs r2, #2 - 80028a6: f883 203d strb.w r2, [r3, #61] ; 0x3d +080045f8 : - switch (Channel) - 80028aa: 687b ldr r3, [r7, #4] - 80028ac: 2b14 cmp r3, #20 - 80028ae: f200 80f0 bhi.w 8002a92 - 80028b2: a201 add r2, pc, #4 ; (adr r2, 80028b8 ) - 80028b4: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 80028b8: 0800290d .word 0x0800290d - 80028bc: 08002a93 .word 0x08002a93 - 80028c0: 08002a93 .word 0x08002a93 - 80028c4: 08002a93 .word 0x08002a93 - 80028c8: 0800294d .word 0x0800294d - 80028cc: 08002a93 .word 0x08002a93 - 80028d0: 08002a93 .word 0x08002a93 - 80028d4: 08002a93 .word 0x08002a93 - 80028d8: 0800298f .word 0x0800298f - 80028dc: 08002a93 .word 0x08002a93 - 80028e0: 08002a93 .word 0x08002a93 - 80028e4: 08002a93 .word 0x08002a93 - 80028e8: 080029cf .word 0x080029cf - 80028ec: 08002a93 .word 0x08002a93 - 80028f0: 08002a93 .word 0x08002a93 - 80028f4: 08002a93 .word 0x08002a93 - 80028f8: 08002a11 .word 0x08002a11 - 80028fc: 08002a93 .word 0x08002a93 - 8002900: 08002a93 .word 0x08002a93 - 8002904: 08002a93 .word 0x08002a93 - 8002908: 08002a51 .word 0x08002a51 - { - /* Check the parameters */ - assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); +/** + * @brief This function handles Memory management fault. + */ +void MemManage_Handler(void) +{ + 80045f8: b480 push {r7} + 80045fa: af00 add r7, sp, #0 + /* USER CODE BEGIN MemoryManagement_IRQn 0 */ - /* Configure the Channel 1 in PWM mode */ - TIM_OC1_SetConfig(htim->Instance, sConfig); - 800290c: 68fb ldr r3, [r7, #12] - 800290e: 681b ldr r3, [r3, #0] - 8002910: 68b9 ldr r1, [r7, #8] - 8002912: 4618 mov r0, r3 - 8002914: f000 fa4e bl 8002db4 + /* USER CODE END MemoryManagement_IRQn 0 */ + while (1) + 80045fc: e7fe b.n 80045fc - /* Set the Preload enable bit for channel1 */ - htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE; - 8002918: 68fb ldr r3, [r7, #12] - 800291a: 681b ldr r3, [r3, #0] - 800291c: 699a ldr r2, [r3, #24] - 800291e: 68fb ldr r3, [r7, #12] - 8002920: 681b ldr r3, [r3, #0] - 8002922: f042 0208 orr.w r2, r2, #8 - 8002926: 619a str r2, [r3, #24] +080045fe : - /* Configure the Output Fast mode */ - htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE; - 8002928: 68fb ldr r3, [r7, #12] - 800292a: 681b ldr r3, [r3, #0] - 800292c: 699a ldr r2, [r3, #24] - 800292e: 68fb ldr r3, [r7, #12] - 8002930: 681b ldr r3, [r3, #0] - 8002932: f022 0204 bic.w r2, r2, #4 - 8002936: 619a str r2, [r3, #24] - htim->Instance->CCMR1 |= sConfig->OCFastMode; - 8002938: 68fb ldr r3, [r7, #12] - 800293a: 681b ldr r3, [r3, #0] - 800293c: 6999 ldr r1, [r3, #24] - 800293e: 68bb ldr r3, [r7, #8] - 8002940: 691a ldr r2, [r3, #16] - 8002942: 68fb ldr r3, [r7, #12] - 8002944: 681b ldr r3, [r3, #0] - 8002946: 430a orrs r2, r1 - 8002948: 619a str r2, [r3, #24] - break; - 800294a: e0a3 b.n 8002a94 - { - /* Check the parameters */ - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); +/** + * @brief This function handles Pre-fetch fault, memory access fault. + */ +void BusFault_Handler(void) +{ + 80045fe: b480 push {r7} + 8004600: af00 add r7, sp, #0 + /* USER CODE BEGIN BusFault_IRQn 0 */ - /* Configure the Channel 2 in PWM mode */ - TIM_OC2_SetConfig(htim->Instance, sConfig); - 800294c: 68fb ldr r3, [r7, #12] - 800294e: 681b ldr r3, [r3, #0] - 8002950: 68b9 ldr r1, [r7, #8] - 8002952: 4618 mov r0, r3 - 8002954: f000 faa0 bl 8002e98 + /* USER CODE END BusFault_IRQn 0 */ + while (1) + 8004602: e7fe b.n 8004602 + +08004604 : + +/** + * @brief This function handles Undefined instruction or illegal state. + */ +void UsageFault_Handler(void) +{ + 8004604: b480 push {r7} + 8004606: af00 add r7, sp, #0 + /* USER CODE BEGIN UsageFault_IRQn 0 */ + + /* USER CODE END UsageFault_IRQn 0 */ + while (1) + 8004608: e7fe b.n 8004608 + +0800460a : + +/** + * @brief This function handles System service call via SWI instruction. + */ +void SVC_Handler(void) +{ + 800460a: b480 push {r7} + 800460c: af00 add r7, sp, #0 + + /* USER CODE END SVCall_IRQn 0 */ + /* USER CODE BEGIN SVCall_IRQn 1 */ + + /* USER CODE END SVCall_IRQn 1 */ +} + 800460e: bf00 nop + 8004610: 46bd mov sp, r7 + 8004612: f85d 7b04 ldr.w r7, [sp], #4 + 8004616: 4770 bx lr + +08004618 : + +/** + * @brief This function handles Debug monitor. + */ +void DebugMon_Handler(void) +{ + 8004618: b480 push {r7} + 800461a: af00 add r7, sp, #0 + + /* USER CODE END DebugMonitor_IRQn 0 */ + /* USER CODE BEGIN DebugMonitor_IRQn 1 */ + + /* USER CODE END DebugMonitor_IRQn 1 */ +} + 800461c: bf00 nop + 800461e: 46bd mov sp, r7 + 8004620: f85d 7b04 ldr.w r7, [sp], #4 + 8004624: 4770 bx lr + +08004626 : + +/** + * @brief This function handles Pendable request for system service. + */ +void PendSV_Handler(void) +{ + 8004626: b480 push {r7} + 8004628: af00 add r7, sp, #0 + + /* USER CODE END PendSV_IRQn 0 */ + /* USER CODE BEGIN PendSV_IRQn 1 */ + + /* USER CODE END PendSV_IRQn 1 */ +} + 800462a: bf00 nop + 800462c: 46bd mov sp, r7 + 800462e: f85d 7b04 ldr.w r7, [sp], #4 + 8004632: 4770 bx lr + +08004634 : + +/** + * @brief This function handles System tick timer. + */ +void SysTick_Handler(void) +{ + 8004634: b580 push {r7, lr} + 8004636: af00 add r7, sp, #0 + /* USER CODE BEGIN SysTick_IRQn 0 */ + + /* USER CODE END SysTick_IRQn 0 */ + HAL_IncTick(); + 8004638: f000 f95e bl 80048f8 + /* USER CODE BEGIN SysTick_IRQn 1 */ + + /* USER CODE END SysTick_IRQn 1 */ +} + 800463c: bf00 nop + 800463e: bd80 pop {r7, pc} + +08004640 : + +/** + * @brief This function handles DMA1 stream1 global interrupt. + */ +void DMA1_Stream1_IRQHandler(void) +{ + 8004640: b580 push {r7, lr} + 8004642: af00 add r7, sp, #0 + /* USER CODE BEGIN DMA1_Stream1_IRQn 0 */ + + /* USER CODE END DMA1_Stream1_IRQn 0 */ + HAL_DMA_IRQHandler(&hdma_usart3_rx); + 8004644: 4802 ldr r0, [pc, #8] ; (8004650 ) + 8004646: f000 fbb9 bl 8004dbc + /* USER CODE BEGIN DMA1_Stream1_IRQn 1 */ + + /* USER CODE END DMA1_Stream1_IRQn 1 */ +} + 800464a: bf00 nop + 800464c: bd80 pop {r7, pc} + 800464e: bf00 nop + 8004650: 200002a4 .word 0x200002a4 + +08004654 : + +/** + * @brief This function handles DMA1 stream3 global interrupt. + */ +void DMA1_Stream3_IRQHandler(void) +{ + 8004654: b580 push {r7, lr} + 8004656: af00 add r7, sp, #0 + /* USER CODE BEGIN DMA1_Stream3_IRQn 0 */ + + /* USER CODE END DMA1_Stream3_IRQn 0 */ + HAL_DMA_IRQHandler(&hdma_usart3_tx); + 8004658: 4802 ldr r0, [pc, #8] ; (8004664 ) + 800465a: f000 fbaf bl 8004dbc + /* USER CODE BEGIN DMA1_Stream3_IRQn 1 */ + + /* USER CODE END DMA1_Stream3_IRQn 1 */ +} + 800465e: bf00 nop + 8004660: bd80 pop {r7, pc} + 8004662: bf00 nop + 8004664: 20000304 .word 0x20000304 + +08004668 : + +/** + * @brief This function handles TIM3 global interrupt. + */ +void TIM3_IRQHandler(void) +{ + 8004668: b580 push {r7, lr} + 800466a: af00 add r7, sp, #0 + /* USER CODE BEGIN TIM3_IRQn 0 */ + + /* USER CODE END TIM3_IRQn 0 */ + HAL_TIM_IRQHandler(&htim3); + 800466c: 4802 ldr r0, [pc, #8] ; (8004678 ) + 800466e: f002 f960 bl 8006932 + /* USER CODE BEGIN TIM3_IRQn 1 */ + + /* USER CODE END TIM3_IRQn 1 */ +} + 8004672: bf00 nop + 8004674: bd80 pop {r7, pc} + 8004676: bf00 nop + 8004678: 200000e4 .word 0x200000e4 + +0800467c : + +/** + * @brief This function handles USART3 global interrupt. + */ +void USART3_IRQHandler(void) +{ + 800467c: b580 push {r7, lr} + 800467e: af00 add r7, sp, #0 + /* USER CODE BEGIN USART3_IRQn 0 */ + + /* USER CODE END USART3_IRQn 0 */ + HAL_UART_IRQHandler(&huart3); + 8004680: 4802 ldr r0, [pc, #8] ; (800468c ) + 8004682: f003 f9f5 bl 8007a70 + /* USER CODE BEGIN USART3_IRQn 1 */ + + /* USER CODE END USART3_IRQn 1 */ +} + 8004686: bf00 nop + 8004688: bd80 pop {r7, pc} + 800468a: bf00 nop + 800468c: 200001a4 .word 0x200001a4 + +08004690 : + +/** + * @brief This function handles DMA2 stream1 global interrupt. + */ +void DMA2_Stream1_IRQHandler(void) +{ + 8004690: b580 push {r7, lr} + 8004692: af00 add r7, sp, #0 + /* USER CODE BEGIN DMA2_Stream1_IRQn 0 */ + + /* USER CODE END DMA2_Stream1_IRQn 0 */ + HAL_DMA_IRQHandler(&hdma_usart6_rx); + 8004694: 4802 ldr r0, [pc, #8] ; (80046a0 ) + 8004696: f000 fb91 bl 8004dbc + /* USER CODE BEGIN DMA2_Stream1_IRQn 1 */ + + /* USER CODE END DMA2_Stream1_IRQn 1 */ +} + 800469a: bf00 nop + 800469c: bd80 pop {r7, pc} + 800469e: bf00 nop + 80046a0: 20000364 .word 0x20000364 + +080046a4 : + +/** + * @brief This function handles DMA2 stream6 global interrupt. + */ +void DMA2_Stream6_IRQHandler(void) +{ + 80046a4: b580 push {r7, lr} + 80046a6: af00 add r7, sp, #0 + /* USER CODE BEGIN DMA2_Stream6_IRQn 0 */ + + /* USER CODE END DMA2_Stream6_IRQn 0 */ + HAL_DMA_IRQHandler(&hdma_usart6_tx); + 80046a8: 4802 ldr r0, [pc, #8] ; (80046b4 ) + 80046aa: f000 fb87 bl 8004dbc + /* USER CODE BEGIN DMA2_Stream6_IRQn 1 */ + + /* USER CODE END DMA2_Stream6_IRQn 1 */ +} + 80046ae: bf00 nop + 80046b0: bd80 pop {r7, pc} + 80046b2: bf00 nop + 80046b4: 200003c4 .word 0x200003c4 + +080046b8 : + +/** + * @brief This function handles USART6 global interrupt. + */ +void USART6_IRQHandler(void) +{ + 80046b8: b580 push {r7, lr} + 80046ba: af00 add r7, sp, #0 + /* USER CODE BEGIN USART6_IRQn 0 */ + + /* USER CODE END USART6_IRQn 0 */ + HAL_UART_IRQHandler(&huart6); + 80046bc: 4802 ldr r0, [pc, #8] ; (80046c8 ) + 80046be: f003 f9d7 bl 8007a70 + /* USER CODE BEGIN USART6_IRQn 1 */ + + /* USER CODE END USART6_IRQn 1 */ +} + 80046c2: bf00 nop + 80046c4: bd80 pop {r7, pc} + 80046c6: bf00 nop + 80046c8: 20000224 .word 0x20000224 + +080046cc <_getpid>: +void initialise_monitor_handles() +{ +} + +int _getpid(void) +{ + 80046cc: b480 push {r7} + 80046ce: af00 add r7, sp, #0 + return 1; + 80046d0: 2301 movs r3, #1 +} + 80046d2: 4618 mov r0, r3 + 80046d4: 46bd mov sp, r7 + 80046d6: f85d 7b04 ldr.w r7, [sp], #4 + 80046da: 4770 bx lr + +080046dc <_kill>: + +int _kill(int pid, int sig) +{ + 80046dc: b580 push {r7, lr} + 80046de: b082 sub sp, #8 + 80046e0: af00 add r7, sp, #0 + 80046e2: 6078 str r0, [r7, #4] + 80046e4: 6039 str r1, [r7, #0] + errno = EINVAL; + 80046e6: f005 fba1 bl 8009e2c <__errno> + 80046ea: 4602 mov r2, r0 + 80046ec: 2316 movs r3, #22 + 80046ee: 6013 str r3, [r2, #0] + return -1; + 80046f0: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff +} + 80046f4: 4618 mov r0, r3 + 80046f6: 3708 adds r7, #8 + 80046f8: 46bd mov sp, r7 + 80046fa: bd80 pop {r7, pc} + +080046fc <_exit>: + +void _exit (int status) +{ + 80046fc: b580 push {r7, lr} + 80046fe: b082 sub sp, #8 + 8004700: af00 add r7, sp, #0 + 8004702: 6078 str r0, [r7, #4] + _kill(status, -1); + 8004704: f04f 31ff mov.w r1, #4294967295 ; 0xffffffff + 8004708: 6878 ldr r0, [r7, #4] + 800470a: f7ff ffe7 bl 80046dc <_kill> + while (1) {} /* Make sure we hang here */ + 800470e: e7fe b.n 800470e <_exit+0x12> + +08004710 <_sbrk>: +/** + _sbrk + Increase program data space. Malloc and related functions depend on this +**/ +caddr_t _sbrk(int incr) +{ + 8004710: b580 push {r7, lr} + 8004712: b084 sub sp, #16 + 8004714: af00 add r7, sp, #0 + 8004716: 6078 str r0, [r7, #4] + extern char end asm("end"); + static char *heap_end; + char *prev_heap_end; + + if (heap_end == 0) + 8004718: 4b11 ldr r3, [pc, #68] ; (8004760 <_sbrk+0x50>) + 800471a: 681b ldr r3, [r3, #0] + 800471c: 2b00 cmp r3, #0 + 800471e: d102 bne.n 8004726 <_sbrk+0x16> + heap_end = &end; + 8004720: 4b0f ldr r3, [pc, #60] ; (8004760 <_sbrk+0x50>) + 8004722: 4a10 ldr r2, [pc, #64] ; (8004764 <_sbrk+0x54>) + 8004724: 601a str r2, [r3, #0] + + prev_heap_end = heap_end; + 8004726: 4b0e ldr r3, [pc, #56] ; (8004760 <_sbrk+0x50>) + 8004728: 681b ldr r3, [r3, #0] + 800472a: 60fb str r3, [r7, #12] + if (heap_end + incr > stack_ptr) + 800472c: 4b0c ldr r3, [pc, #48] ; (8004760 <_sbrk+0x50>) + 800472e: 681a ldr r2, [r3, #0] + 8004730: 687b ldr r3, [r7, #4] + 8004732: 4413 add r3, r2 + 8004734: 466a mov r2, sp + 8004736: 4293 cmp r3, r2 + 8004738: d907 bls.n 800474a <_sbrk+0x3a> + { + errno = ENOMEM; + 800473a: f005 fb77 bl 8009e2c <__errno> + 800473e: 4602 mov r2, r0 + 8004740: 230c movs r3, #12 + 8004742: 6013 str r3, [r2, #0] + return (caddr_t) -1; + 8004744: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff + 8004748: e006 b.n 8004758 <_sbrk+0x48> + } + + heap_end += incr; + 800474a: 4b05 ldr r3, [pc, #20] ; (8004760 <_sbrk+0x50>) + 800474c: 681a ldr r2, [r3, #0] + 800474e: 687b ldr r3, [r7, #4] + 8004750: 4413 add r3, r2 + 8004752: 4a03 ldr r2, [pc, #12] ; (8004760 <_sbrk+0x50>) + 8004754: 6013 str r3, [r2, #0] + + return (caddr_t) prev_heap_end; + 8004756: 68fb ldr r3, [r7, #12] +} + 8004758: 4618 mov r0, r3 + 800475a: 3710 adds r7, #16 + 800475c: 46bd mov sp, r7 + 800475e: bd80 pop {r7, pc} + 8004760: 20000eb0 .word 0x20000eb0 + 8004764: 20000ec8 .word 0x20000ec8 + +08004768 : + * SystemFrequency variable. + * @param None + * @retval None + */ +void SystemInit(void) +{ + 8004768: b480 push {r7} + 800476a: af00 add r7, sp, #0 + /* FPU settings ------------------------------------------------------------*/ + #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) + SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */ + 800476c: 4b15 ldr r3, [pc, #84] ; (80047c4 ) + 800476e: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 + 8004772: 4a14 ldr r2, [pc, #80] ; (80047c4 ) + 8004774: f443 0370 orr.w r3, r3, #15728640 ; 0xf00000 + 8004778: f8c2 3088 str.w r3, [r2, #136] ; 0x88 + #endif + /* Reset the RCC clock configuration to the default reset state ------------*/ + /* Set HSION bit */ + RCC->CR |= (uint32_t)0x00000001; + 800477c: 4b12 ldr r3, [pc, #72] ; (80047c8 ) + 800477e: 681b ldr r3, [r3, #0] + 8004780: 4a11 ldr r2, [pc, #68] ; (80047c8 ) + 8004782: f043 0301 orr.w r3, r3, #1 + 8004786: 6013 str r3, [r2, #0] + + /* Reset CFGR register */ + RCC->CFGR = 0x00000000; + 8004788: 4b0f ldr r3, [pc, #60] ; (80047c8 ) + 800478a: 2200 movs r2, #0 + 800478c: 609a str r2, [r3, #8] + + /* Reset HSEON, CSSON and PLLON bits */ + RCC->CR &= (uint32_t)0xFEF6FFFF; + 800478e: 4b0e ldr r3, [pc, #56] ; (80047c8 ) + 8004790: 681a ldr r2, [r3, #0] + 8004792: 490d ldr r1, [pc, #52] ; (80047c8 ) + 8004794: 4b0d ldr r3, [pc, #52] ; (80047cc ) + 8004796: 4013 ands r3, r2 + 8004798: 600b str r3, [r1, #0] - /* Set the Preload enable bit for channel2 */ - htim->Instance->CCMR1 |= TIM_CCMR1_OC2PE; - 8002958: 68fb ldr r3, [r7, #12] - 800295a: 681b ldr r3, [r3, #0] - 800295c: 699a ldr r2, [r3, #24] - 800295e: 68fb ldr r3, [r7, #12] - 8002960: 681b ldr r3, [r3, #0] - 8002962: f442 6200 orr.w r2, r2, #2048 ; 0x800 - 8002966: 619a str r2, [r3, #24] + /* Reset PLLCFGR register */ + RCC->PLLCFGR = 0x24003010; + 800479a: 4b0b ldr r3, [pc, #44] ; (80047c8 ) + 800479c: 4a0c ldr r2, [pc, #48] ; (80047d0 ) + 800479e: 605a str r2, [r3, #4] - /* Configure the Output Fast mode */ - htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE; - 8002968: 68fb ldr r3, [r7, #12] - 800296a: 681b ldr r3, [r3, #0] - 800296c: 699a ldr r2, [r3, #24] - 800296e: 68fb ldr r3, [r7, #12] - 8002970: 681b ldr r3, [r3, #0] - 8002972: f422 6280 bic.w r2, r2, #1024 ; 0x400 - 8002976: 619a str r2, [r3, #24] - htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U; - 8002978: 68fb ldr r3, [r7, #12] - 800297a: 681b ldr r3, [r3, #0] - 800297c: 6999 ldr r1, [r3, #24] - 800297e: 68bb ldr r3, [r7, #8] - 8002980: 691b ldr r3, [r3, #16] - 8002982: 021a lsls r2, r3, #8 - 8002984: 68fb ldr r3, [r7, #12] - 8002986: 681b ldr r3, [r3, #0] - 8002988: 430a orrs r2, r1 - 800298a: 619a str r2, [r3, #24] - break; - 800298c: e082 b.n 8002a94 - { - /* Check the parameters */ - assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); + /* Reset HSEBYP bit */ + RCC->CR &= (uint32_t)0xFFFBFFFF; + 80047a0: 4b09 ldr r3, [pc, #36] ; (80047c8 ) + 80047a2: 681b ldr r3, [r3, #0] + 80047a4: 4a08 ldr r2, [pc, #32] ; (80047c8 ) + 80047a6: f423 2380 bic.w r3, r3, #262144 ; 0x40000 + 80047aa: 6013 str r3, [r2, #0] - /* Configure the Channel 3 in PWM mode */ - TIM_OC3_SetConfig(htim->Instance, sConfig); - 800298e: 68fb ldr r3, [r7, #12] - 8002990: 681b ldr r3, [r3, #0] - 8002992: 68b9 ldr r1, [r7, #8] - 8002994: 4618 mov r0, r3 - 8002996: f000 faf7 bl 8002f88 + /* Disable all interrupts */ + RCC->CIR = 0x00000000; + 80047ac: 4b06 ldr r3, [pc, #24] ; (80047c8 ) + 80047ae: 2200 movs r2, #0 + 80047b0: 60da str r2, [r3, #12] - /* Set the Preload enable bit for channel3 */ - htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE; - 800299a: 68fb ldr r3, [r7, #12] - 800299c: 681b ldr r3, [r3, #0] - 800299e: 69da ldr r2, [r3, #28] - 80029a0: 68fb ldr r3, [r7, #12] - 80029a2: 681b ldr r3, [r3, #0] - 80029a4: f042 0208 orr.w r2, r2, #8 - 80029a8: 61da str r2, [r3, #28] + /* Configure the Vector Table location add offset address ------------------*/ +#ifdef VECT_TAB_SRAM + SCB->VTOR = RAMDTCM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ +#else + SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ + 80047b2: 4b04 ldr r3, [pc, #16] ; (80047c4 ) + 80047b4: f04f 6200 mov.w r2, #134217728 ; 0x8000000 + 80047b8: 609a str r2, [r3, #8] +#endif +} + 80047ba: bf00 nop + 80047bc: 46bd mov sp, r7 + 80047be: f85d 7b04 ldr.w r7, [sp], #4 + 80047c2: 4770 bx lr + 80047c4: e000ed00 .word 0xe000ed00 + 80047c8: 40023800 .word 0x40023800 + 80047cc: fef6ffff .word 0xfef6ffff + 80047d0: 24003010 .word 0x24003010 + +080047d4 <_ZN3ros16normalizeSecNSecERmS0_>: +#include "ros/time.h" - /* Configure the Output Fast mode */ - htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE; - 80029aa: 68fb ldr r3, [r7, #12] - 80029ac: 681b ldr r3, [r3, #0] - 80029ae: 69da ldr r2, [r3, #28] - 80029b0: 68fb ldr r3, [r7, #12] - 80029b2: 681b ldr r3, [r3, #0] - 80029b4: f022 0204 bic.w r2, r2, #4 - 80029b8: 61da str r2, [r3, #28] - htim->Instance->CCMR2 |= sConfig->OCFastMode; - 80029ba: 68fb ldr r3, [r7, #12] - 80029bc: 681b ldr r3, [r3, #0] - 80029be: 69d9 ldr r1, [r3, #28] - 80029c0: 68bb ldr r3, [r7, #8] - 80029c2: 691a ldr r2, [r3, #16] - 80029c4: 68fb ldr r3, [r7, #12] - 80029c6: 681b ldr r3, [r3, #0] - 80029c8: 430a orrs r2, r1 - 80029ca: 61da str r2, [r3, #28] - break; - 80029cc: e062 b.n 8002a94 - { - /* Check the parameters */ - assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); +namespace ros +{ +void normalizeSecNSec(uint32_t& sec, uint32_t& nsec) +{ + 80047d4: b480 push {r7} + 80047d6: b085 sub sp, #20 + 80047d8: af00 add r7, sp, #0 + 80047da: 6078 str r0, [r7, #4] + 80047dc: 6039 str r1, [r7, #0] + uint32_t nsec_part = nsec % 1000000000UL; + 80047de: 683b ldr r3, [r7, #0] + 80047e0: 681b ldr r3, [r3, #0] + 80047e2: 0a5a lsrs r2, r3, #9 + 80047e4: 490f ldr r1, [pc, #60] ; (8004824 <_ZN3ros16normalizeSecNSecERmS0_+0x50>) + 80047e6: fba1 1202 umull r1, r2, r1, r2 + 80047ea: 09d2 lsrs r2, r2, #7 + 80047ec: 490e ldr r1, [pc, #56] ; (8004828 <_ZN3ros16normalizeSecNSecERmS0_+0x54>) + 80047ee: fb01 f202 mul.w r2, r1, r2 + 80047f2: 1a9b subs r3, r3, r2 + 80047f4: 60fb str r3, [r7, #12] + uint32_t sec_part = nsec / 1000000000UL; + 80047f6: 683b ldr r3, [r7, #0] + 80047f8: 681b ldr r3, [r3, #0] + 80047fa: 0a5b lsrs r3, r3, #9 + 80047fc: 4a09 ldr r2, [pc, #36] ; (8004824 <_ZN3ros16normalizeSecNSecERmS0_+0x50>) + 80047fe: fba2 2303 umull r2, r3, r2, r3 + 8004802: 09db lsrs r3, r3, #7 + 8004804: 60bb str r3, [r7, #8] + sec += sec_part; + 8004806: 687b ldr r3, [r7, #4] + 8004808: 681a ldr r2, [r3, #0] + 800480a: 68bb ldr r3, [r7, #8] + 800480c: 441a add r2, r3 + 800480e: 687b ldr r3, [r7, #4] + 8004810: 601a str r2, [r3, #0] + nsec = nsec_part; + 8004812: 683b ldr r3, [r7, #0] + 8004814: 68fa ldr r2, [r7, #12] + 8004816: 601a str r2, [r3, #0] +} + 8004818: bf00 nop + 800481a: 3714 adds r7, #20 + 800481c: 46bd mov sp, r7 + 800481e: f85d 7b04 ldr.w r7, [sp], #4 + 8004822: 4770 bx lr + 8004824: 00044b83 .word 0x00044b83 + 8004828: 3b9aca00 .word 0x3b9aca00 - /* Configure the Channel 4 in PWM mode */ - TIM_OC4_SetConfig(htim->Instance, sConfig); - 80029ce: 68fb ldr r3, [r7, #12] - 80029d0: 681b ldr r3, [r3, #0] - 80029d2: 68b9 ldr r1, [r7, #8] - 80029d4: 4618 mov r0, r3 - 80029d6: f000 fb4d bl 8003074 +0800482c : - /* Set the Preload enable bit for channel4 */ - htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE; - 80029da: 68fb ldr r3, [r7, #12] - 80029dc: 681b ldr r3, [r3, #0] - 80029de: 69da ldr r2, [r3, #28] - 80029e0: 68fb ldr r3, [r7, #12] - 80029e2: 681b ldr r3, [r3, #0] - 80029e4: f442 6200 orr.w r2, r2, #2048 ; 0x800 - 80029e8: 61da str r2, [r3, #28] + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr sp, =_estack /* set stack pointer */ + 800482c: f8df d034 ldr.w sp, [pc, #52] ; 8004864 - /* Configure the Output Fast mode */ - htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE; - 80029ea: 68fb ldr r3, [r7, #12] - 80029ec: 681b ldr r3, [r3, #0] - 80029ee: 69da ldr r2, [r3, #28] - 80029f0: 68fb ldr r3, [r7, #12] - 80029f2: 681b ldr r3, [r3, #0] - 80029f4: f422 6280 bic.w r2, r2, #1024 ; 0x400 - 80029f8: 61da str r2, [r3, #28] - htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U; - 80029fa: 68fb ldr r3, [r7, #12] - 80029fc: 681b ldr r3, [r3, #0] - 80029fe: 69d9 ldr r1, [r3, #28] - 8002a00: 68bb ldr r3, [r7, #8] - 8002a02: 691b ldr r3, [r3, #16] - 8002a04: 021a lsls r2, r3, #8 - 8002a06: 68fb ldr r3, [r7, #12] - 8002a08: 681b ldr r3, [r3, #0] - 8002a0a: 430a orrs r2, r1 - 8002a0c: 61da str r2, [r3, #28] - break; - 8002a0e: e041 b.n 8002a94 - { - /* Check the parameters */ - assert_param(IS_TIM_CC5_INSTANCE(htim->Instance)); +/* Copy the data segment initializers from flash to SRAM */ + movs r1, #0 + 8004830: 2100 movs r1, #0 + b LoopCopyDataInit + 8004832: e003 b.n 800483c - /* Configure the Channel 5 in PWM mode */ - TIM_OC5_SetConfig(htim->Instance, sConfig); - 8002a10: 68fb ldr r3, [r7, #12] - 8002a12: 681b ldr r3, [r3, #0] - 8002a14: 68b9 ldr r1, [r7, #8] - 8002a16: 4618 mov r0, r3 - 8002a18: f000 fb84 bl 8003124 +08004834 : - /* Set the Preload enable bit for channel5*/ - htim->Instance->CCMR3 |= TIM_CCMR3_OC5PE; - 8002a1c: 68fb ldr r3, [r7, #12] - 8002a1e: 681b ldr r3, [r3, #0] - 8002a20: 6d5a ldr r2, [r3, #84] ; 0x54 - 8002a22: 68fb ldr r3, [r7, #12] - 8002a24: 681b ldr r3, [r3, #0] - 8002a26: f042 0208 orr.w r2, r2, #8 - 8002a2a: 655a str r2, [r3, #84] ; 0x54 +CopyDataInit: + ldr r3, =_sidata + 8004834: 4b0c ldr r3, [pc, #48] ; (8004868 ) + ldr r3, [r3, r1] + 8004836: 585b ldr r3, [r3, r1] + str r3, [r0, r1] + 8004838: 5043 str r3, [r0, r1] + adds r1, r1, #4 + 800483a: 3104 adds r1, #4 - /* Configure the Output Fast mode */ - htim->Instance->CCMR3 &= ~TIM_CCMR3_OC5FE; - 8002a2c: 68fb ldr r3, [r7, #12] - 8002a2e: 681b ldr r3, [r3, #0] - 8002a30: 6d5a ldr r2, [r3, #84] ; 0x54 - 8002a32: 68fb ldr r3, [r7, #12] - 8002a34: 681b ldr r3, [r3, #0] - 8002a36: f022 0204 bic.w r2, r2, #4 - 8002a3a: 655a str r2, [r3, #84] ; 0x54 - htim->Instance->CCMR3 |= sConfig->OCFastMode; - 8002a3c: 68fb ldr r3, [r7, #12] - 8002a3e: 681b ldr r3, [r3, #0] - 8002a40: 6d59 ldr r1, [r3, #84] ; 0x54 - 8002a42: 68bb ldr r3, [r7, #8] - 8002a44: 691a ldr r2, [r3, #16] - 8002a46: 68fb ldr r3, [r7, #12] - 8002a48: 681b ldr r3, [r3, #0] - 8002a4a: 430a orrs r2, r1 - 8002a4c: 655a str r2, [r3, #84] ; 0x54 - break; - 8002a4e: e021 b.n 8002a94 - { - /* Check the parameters */ - assert_param(IS_TIM_CC6_INSTANCE(htim->Instance)); +0800483c : + +LoopCopyDataInit: + ldr r0, =_sdata + 800483c: 480b ldr r0, [pc, #44] ; (800486c ) + ldr r3, =_edata + 800483e: 4b0c ldr r3, [pc, #48] ; (8004870 ) + adds r2, r0, r1 + 8004840: 1842 adds r2, r0, r1 + cmp r2, r3 + 8004842: 429a cmp r2, r3 + bcc CopyDataInit + 8004844: d3f6 bcc.n 8004834 + ldr r2, =_sbss + 8004846: 4a0b ldr r2, [pc, #44] ; (8004874 ) + b LoopFillZerobss + 8004848: e002 b.n 8004850 - /* Configure the Channel 6 in PWM mode */ - TIM_OC6_SetConfig(htim->Instance, sConfig); - 8002a50: 68fb ldr r3, [r7, #12] - 8002a52: 681b ldr r3, [r3, #0] - 8002a54: 68b9 ldr r1, [r7, #8] - 8002a56: 4618 mov r0, r3 - 8002a58: f000 fbb6 bl 80031c8 +0800484a : +/* Zero fill the bss segment. */ +FillZerobss: + movs r3, #0 + 800484a: 2300 movs r3, #0 + str r3, [r2], #4 + 800484c: f842 3b04 str.w r3, [r2], #4 - /* Set the Preload enable bit for channel6 */ - htim->Instance->CCMR3 |= TIM_CCMR3_OC6PE; - 8002a5c: 68fb ldr r3, [r7, #12] - 8002a5e: 681b ldr r3, [r3, #0] - 8002a60: 6d5a ldr r2, [r3, #84] ; 0x54 - 8002a62: 68fb ldr r3, [r7, #12] - 8002a64: 681b ldr r3, [r3, #0] - 8002a66: f442 6200 orr.w r2, r2, #2048 ; 0x800 - 8002a6a: 655a str r2, [r3, #84] ; 0x54 +08004850 : + +LoopFillZerobss: + ldr r3, = _ebss + 8004850: 4b09 ldr r3, [pc, #36] ; (8004878 ) + cmp r2, r3 + 8004852: 429a cmp r2, r3 + bcc FillZerobss + 8004854: d3f9 bcc.n 800484a - /* Configure the Output Fast mode */ - htim->Instance->CCMR3 &= ~TIM_CCMR3_OC6FE; - 8002a6c: 68fb ldr r3, [r7, #12] - 8002a6e: 681b ldr r3, [r3, #0] - 8002a70: 6d5a ldr r2, [r3, #84] ; 0x54 - 8002a72: 68fb ldr r3, [r7, #12] - 8002a74: 681b ldr r3, [r3, #0] - 8002a76: f422 6280 bic.w r2, r2, #1024 ; 0x400 - 8002a7a: 655a str r2, [r3, #84] ; 0x54 - htim->Instance->CCMR3 |= sConfig->OCFastMode << 8U; - 8002a7c: 68fb ldr r3, [r7, #12] - 8002a7e: 681b ldr r3, [r3, #0] - 8002a80: 6d59 ldr r1, [r3, #84] ; 0x54 - 8002a82: 68bb ldr r3, [r7, #8] - 8002a84: 691b ldr r3, [r3, #16] - 8002a86: 021a lsls r2, r3, #8 - 8002a88: 68fb ldr r3, [r7, #12] - 8002a8a: 681b ldr r3, [r3, #0] - 8002a8c: 430a orrs r2, r1 - 8002a8e: 655a str r2, [r3, #84] ; 0x54 - break; - 8002a90: e000 b.n 8002a94 - } +/* Call the clock system initialization function.*/ + bl SystemInit + 8004856: f7ff ff87 bl 8004768 +/* Call static constructors */ + bl __libc_init_array + 800485a: f005 faed bl 8009e38 <__libc_init_array> +/* Call the application's entry point.*/ + bl main + 800485e: f7fe f8af bl 80029c0
+ bx lr + 8004862: 4770 bx lr + ldr sp, =_estack /* set stack pointer */ + 8004864: 20080000 .word 0x20080000 + ldr r3, =_sidata + 8004868: 0800ac04 .word 0x0800ac04 + ldr r0, =_sdata + 800486c: 20000000 .word 0x20000000 + ldr r3, =_edata + 8004870: 20000084 .word 0x20000084 + ldr r2, =_sbss + 8004874: 20000084 .word 0x20000084 + ldr r3, = _ebss + 8004878: 20000ec4 .word 0x20000ec4 - default: - break; - 8002a92: bf00 nop - } +0800487c : + * @retval None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + 800487c: e7fe b.n 800487c - htim->State = HAL_TIM_STATE_READY; - 8002a94: 68fb ldr r3, [r7, #12] - 8002a96: 2201 movs r2, #1 - 8002a98: f883 203d strb.w r2, [r3, #61] ; 0x3d +0800487e : + * need to ensure that the SysTick time base is always set to 1 millisecond + * to have correct HAL operation. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_Init(void) +{ + 800487e: b580 push {r7, lr} + 8004880: af00 add r7, sp, #0 +#if (PREFETCH_ENABLE != 0U) + __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); +#endif /* PREFETCH_ENABLE */ - __HAL_UNLOCK(htim); - 8002a9c: 68fb ldr r3, [r7, #12] - 8002a9e: 2200 movs r2, #0 - 8002aa0: f883 203c strb.w r2, [r3, #60] ; 0x3c + /* Set Interrupt Group Priority */ + HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); + 8004882: 2003 movs r0, #3 + 8004884: f000 f928 bl 8004ad8 + /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */ + HAL_InitTick(TICK_INT_PRIORITY); + 8004888: 2000 movs r0, #0 + 800488a: f000 f805 bl 8004898 + + /* Init the low level hardware */ + HAL_MspInit(); + 800488e: f7ff fc33 bl 80040f8 + + /* Return function status */ return HAL_OK; - 8002aa4: 2300 movs r3, #0 + 8004892: 2300 movs r3, #0 } - 8002aa6: 4618 mov r0, r3 - 8002aa8: 3710 adds r7, #16 - 8002aaa: 46bd mov sp, r7 - 8002aac: bd80 pop {r7, pc} - 8002aae: bf00 nop + 8004894: 4618 mov r0, r3 + 8004896: bd80 pop {r7, pc} -08002ab0 : - * @param sClockSourceConfig pointer to a TIM_ClockConfigTypeDef structure that - * contains the clock source information for the TIM peripheral. +08004898 : + * implementation in user file. + * @param TickPriority Tick interrupt priority. * @retval HAL status */ -HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, TIM_ClockConfigTypeDef *sClockSourceConfig) +__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { - 8002ab0: b580 push {r7, lr} - 8002ab2: b084 sub sp, #16 - 8002ab4: af00 add r7, sp, #0 - 8002ab6: 6078 str r0, [r7, #4] - 8002ab8: 6039 str r1, [r7, #0] - uint32_t tmpsmcr; - - /* Process Locked */ - __HAL_LOCK(htim); - 8002aba: 687b ldr r3, [r7, #4] - 8002abc: f893 303c ldrb.w r3, [r3, #60] ; 0x3c - 8002ac0: 2b01 cmp r3, #1 - 8002ac2: d101 bne.n 8002ac8 - 8002ac4: 2302 movs r3, #2 - 8002ac6: e0a6 b.n 8002c16 - 8002ac8: 687b ldr r3, [r7, #4] - 8002aca: 2201 movs r2, #1 - 8002acc: f883 203c strb.w r2, [r3, #60] ; 0x3c - - htim->State = HAL_TIM_STATE_BUSY; - 8002ad0: 687b ldr r3, [r7, #4] - 8002ad2: 2202 movs r2, #2 - 8002ad4: f883 203d strb.w r2, [r3, #61] ; 0x3d - - /* Check the parameters */ - assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource)); - - /* Reset the SMS, TS, ECE, ETPS and ETRF bits */ - tmpsmcr = htim->Instance->SMCR; - 8002ad8: 687b ldr r3, [r7, #4] - 8002ada: 681b ldr r3, [r3, #0] - 8002adc: 689b ldr r3, [r3, #8] - 8002ade: 60fb str r3, [r7, #12] - tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS); - 8002ae0: 68fa ldr r2, [r7, #12] - 8002ae2: 4b4f ldr r3, [pc, #316] ; (8002c20 ) - 8002ae4: 4013 ands r3, r2 - 8002ae6: 60fb str r3, [r7, #12] - tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); - 8002ae8: 68fb ldr r3, [r7, #12] - 8002aea: f423 437f bic.w r3, r3, #65280 ; 0xff00 - 8002aee: 60fb str r3, [r7, #12] - htim->Instance->SMCR = tmpsmcr; - 8002af0: 687b ldr r3, [r7, #4] - 8002af2: 681b ldr r3, [r3, #0] - 8002af4: 68fa ldr r2, [r7, #12] - 8002af6: 609a str r2, [r3, #8] - - switch (sClockSourceConfig->ClockSource) - 8002af8: 683b ldr r3, [r7, #0] - 8002afa: 681b ldr r3, [r3, #0] - 8002afc: 2b40 cmp r3, #64 ; 0x40 - 8002afe: d067 beq.n 8002bd0 - 8002b00: 2b40 cmp r3, #64 ; 0x40 - 8002b02: d80b bhi.n 8002b1c - 8002b04: 2b10 cmp r3, #16 - 8002b06: d073 beq.n 8002bf0 - 8002b08: 2b10 cmp r3, #16 - 8002b0a: d802 bhi.n 8002b12 - 8002b0c: 2b00 cmp r3, #0 - 8002b0e: d06f beq.n 8002bf0 - TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource); - break; - } - - default: - break; - 8002b10: e078 b.n 8002c04 - switch (sClockSourceConfig->ClockSource) - 8002b12: 2b20 cmp r3, #32 - 8002b14: d06c beq.n 8002bf0 - 8002b16: 2b30 cmp r3, #48 ; 0x30 - 8002b18: d06a beq.n 8002bf0 - break; - 8002b1a: e073 b.n 8002c04 - switch (sClockSourceConfig->ClockSource) - 8002b1c: 2b70 cmp r3, #112 ; 0x70 - 8002b1e: d00d beq.n 8002b3c - 8002b20: 2b70 cmp r3, #112 ; 0x70 - 8002b22: d804 bhi.n 8002b2e - 8002b24: 2b50 cmp r3, #80 ; 0x50 - 8002b26: d033 beq.n 8002b90 - 8002b28: 2b60 cmp r3, #96 ; 0x60 - 8002b2a: d041 beq.n 8002bb0 - break; - 8002b2c: e06a b.n 8002c04 - switch (sClockSourceConfig->ClockSource) - 8002b2e: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 8002b32: d066 beq.n 8002c02 - 8002b34: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 - 8002b38: d017 beq.n 8002b6a - break; - 8002b3a: e063 b.n 8002c04 - TIM_ETR_SetConfig(htim->Instance, - 8002b3c: 687b ldr r3, [r7, #4] - 8002b3e: 6818 ldr r0, [r3, #0] - 8002b40: 683b ldr r3, [r7, #0] - 8002b42: 6899 ldr r1, [r3, #8] - 8002b44: 683b ldr r3, [r7, #0] - 8002b46: 685a ldr r2, [r3, #4] - 8002b48: 683b ldr r3, [r7, #0] - 8002b4a: 68db ldr r3, [r3, #12] - 8002b4c: f000 fc0a bl 8003364 - tmpsmcr = htim->Instance->SMCR; - 8002b50: 687b ldr r3, [r7, #4] - 8002b52: 681b ldr r3, [r3, #0] - 8002b54: 689b ldr r3, [r3, #8] - 8002b56: 60fb str r3, [r7, #12] - tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1); - 8002b58: 68fb ldr r3, [r7, #12] - 8002b5a: f043 0377 orr.w r3, r3, #119 ; 0x77 - 8002b5e: 60fb str r3, [r7, #12] - htim->Instance->SMCR = tmpsmcr; - 8002b60: 687b ldr r3, [r7, #4] - 8002b62: 681b ldr r3, [r3, #0] - 8002b64: 68fa ldr r2, [r7, #12] - 8002b66: 609a str r2, [r3, #8] - break; - 8002b68: e04c b.n 8002c04 - TIM_ETR_SetConfig(htim->Instance, - 8002b6a: 687b ldr r3, [r7, #4] - 8002b6c: 6818 ldr r0, [r3, #0] - 8002b6e: 683b ldr r3, [r7, #0] - 8002b70: 6899 ldr r1, [r3, #8] - 8002b72: 683b ldr r3, [r7, #0] - 8002b74: 685a ldr r2, [r3, #4] - 8002b76: 683b ldr r3, [r7, #0] - 8002b78: 68db ldr r3, [r3, #12] - 8002b7a: f000 fbf3 bl 8003364 - htim->Instance->SMCR |= TIM_SMCR_ECE; - 8002b7e: 687b ldr r3, [r7, #4] - 8002b80: 681b ldr r3, [r3, #0] - 8002b82: 689a ldr r2, [r3, #8] - 8002b84: 687b ldr r3, [r7, #4] - 8002b86: 681b ldr r3, [r3, #0] - 8002b88: f442 4280 orr.w r2, r2, #16384 ; 0x4000 - 8002b8c: 609a str r2, [r3, #8] - break; - 8002b8e: e039 b.n 8002c04 - TIM_TI1_ConfigInputStage(htim->Instance, - 8002b90: 687b ldr r3, [r7, #4] - 8002b92: 6818 ldr r0, [r3, #0] - 8002b94: 683b ldr r3, [r7, #0] - 8002b96: 6859 ldr r1, [r3, #4] - 8002b98: 683b ldr r3, [r7, #0] - 8002b9a: 68db ldr r3, [r3, #12] - 8002b9c: 461a mov r2, r3 - 8002b9e: f000 fb67 bl 8003270 - TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1); - 8002ba2: 687b ldr r3, [r7, #4] - 8002ba4: 681b ldr r3, [r3, #0] - 8002ba6: 2150 movs r1, #80 ; 0x50 - 8002ba8: 4618 mov r0, r3 - 8002baa: f000 fbc0 bl 800332e - break; - 8002bae: e029 b.n 8002c04 - TIM_TI2_ConfigInputStage(htim->Instance, - 8002bb0: 687b ldr r3, [r7, #4] - 8002bb2: 6818 ldr r0, [r3, #0] - 8002bb4: 683b ldr r3, [r7, #0] - 8002bb6: 6859 ldr r1, [r3, #4] - 8002bb8: 683b ldr r3, [r7, #0] - 8002bba: 68db ldr r3, [r3, #12] - 8002bbc: 461a mov r2, r3 - 8002bbe: f000 fb86 bl 80032ce - TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2); - 8002bc2: 687b ldr r3, [r7, #4] - 8002bc4: 681b ldr r3, [r3, #0] - 8002bc6: 2160 movs r1, #96 ; 0x60 - 8002bc8: 4618 mov r0, r3 - 8002bca: f000 fbb0 bl 800332e - break; - 8002bce: e019 b.n 8002c04 - TIM_TI1_ConfigInputStage(htim->Instance, - 8002bd0: 687b ldr r3, [r7, #4] - 8002bd2: 6818 ldr r0, [r3, #0] - 8002bd4: 683b ldr r3, [r7, #0] - 8002bd6: 6859 ldr r1, [r3, #4] - 8002bd8: 683b ldr r3, [r7, #0] - 8002bda: 68db ldr r3, [r3, #12] - 8002bdc: 461a mov r2, r3 - 8002bde: f000 fb47 bl 8003270 - TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED); - 8002be2: 687b ldr r3, [r7, #4] - 8002be4: 681b ldr r3, [r3, #0] - 8002be6: 2140 movs r1, #64 ; 0x40 - 8002be8: 4618 mov r0, r3 - 8002bea: f000 fba0 bl 800332e - break; - 8002bee: e009 b.n 8002c04 - TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource); - 8002bf0: 687b ldr r3, [r7, #4] - 8002bf2: 681a ldr r2, [r3, #0] - 8002bf4: 683b ldr r3, [r7, #0] - 8002bf6: 681b ldr r3, [r3, #0] - 8002bf8: 4619 mov r1, r3 - 8002bfa: 4610 mov r0, r2 - 8002bfc: f000 fb97 bl 800332e - break; - 8002c00: e000 b.n 8002c04 - break; - 8002c02: bf00 nop + 8004898: b580 push {r7, lr} + 800489a: b082 sub sp, #8 + 800489c: af00 add r7, sp, #0 + 800489e: 6078 str r0, [r7, #4] + /* Configure the SysTick to have interrupt in 1ms time basis*/ + if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) + 80048a0: 4b12 ldr r3, [pc, #72] ; (80048ec ) + 80048a2: 681a ldr r2, [r3, #0] + 80048a4: 4b12 ldr r3, [pc, #72] ; (80048f0 ) + 80048a6: 781b ldrb r3, [r3, #0] + 80048a8: 4619 mov r1, r3 + 80048aa: f44f 737a mov.w r3, #1000 ; 0x3e8 + 80048ae: fbb3 f3f1 udiv r3, r3, r1 + 80048b2: fbb2 f3f3 udiv r3, r2, r3 + 80048b6: 4618 mov r0, r3 + 80048b8: f000 f943 bl 8004b42 + 80048bc: 4603 mov r3, r0 + 80048be: 2b00 cmp r3, #0 + 80048c0: d001 beq.n 80048c6 + { + return HAL_ERROR; + 80048c2: 2301 movs r3, #1 + 80048c4: e00e b.n 80048e4 } - htim->State = HAL_TIM_STATE_READY; - 8002c04: 687b ldr r3, [r7, #4] - 8002c06: 2201 movs r2, #1 - 8002c08: f883 203d strb.w r2, [r3, #61] ; 0x3d - __HAL_UNLOCK(htim); - 8002c0c: 687b ldr r3, [r7, #4] - 8002c0e: 2200 movs r2, #0 - 8002c10: f883 203c strb.w r2, [r3, #60] ; 0x3c + /* Configure the SysTick IRQ priority */ + if (TickPriority < (1UL << __NVIC_PRIO_BITS)) + 80048c6: 687b ldr r3, [r7, #4] + 80048c8: 2b0f cmp r3, #15 + 80048ca: d80a bhi.n 80048e2 + { + HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); + 80048cc: 2200 movs r2, #0 + 80048ce: 6879 ldr r1, [r7, #4] + 80048d0: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff + 80048d4: f000 f90b bl 8004aee + uwTickPrio = TickPriority; + 80048d8: 4a06 ldr r2, [pc, #24] ; (80048f4 ) + 80048da: 687b ldr r3, [r7, #4] + 80048dc: 6013 str r3, [r2, #0] + { + return HAL_ERROR; + } + /* Return function status */ return HAL_OK; - 8002c14: 2300 movs r3, #0 + 80048de: 2300 movs r3, #0 + 80048e0: e000 b.n 80048e4 + return HAL_ERROR; + 80048e2: 2301 movs r3, #1 } - 8002c16: 4618 mov r0, r3 - 8002c18: 3710 adds r7, #16 - 8002c1a: 46bd mov sp, r7 - 8002c1c: bd80 pop {r7, pc} - 8002c1e: bf00 nop - 8002c20: fffeff88 .word 0xfffeff88 - -08002c24 : - * @brief Output Compare callback in non-blocking mode - * @param htim TIM OC handle + 80048e4: 4618 mov r0, r3 + 80048e6: 3708 adds r7, #8 + 80048e8: 46bd mov sp, r7 + 80048ea: bd80 pop {r7, pc} + 80048ec: 20000010 .word 0x20000010 + 80048f0: 20000018 .word 0x20000018 + 80048f4: 20000014 .word 0x20000014 + +080048f8 : + * @note This function is declared as __weak to be overwritten in case of other + * implementations in user file. * @retval None */ -__weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim) +__weak void HAL_IncTick(void) { - 8002c24: b480 push {r7} - 8002c26: b083 sub sp, #12 - 8002c28: af00 add r7, sp, #0 - 8002c2a: 6078 str r0, [r7, #4] - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file - */ + 80048f8: b480 push {r7} + 80048fa: af00 add r7, sp, #0 + uwTick += uwTickFreq; + 80048fc: 4b06 ldr r3, [pc, #24] ; (8004918 ) + 80048fe: 781b ldrb r3, [r3, #0] + 8004900: 461a mov r2, r3 + 8004902: 4b06 ldr r3, [pc, #24] ; (800491c ) + 8004904: 681b ldr r3, [r3, #0] + 8004906: 4413 add r3, r2 + 8004908: 4a04 ldr r2, [pc, #16] ; (800491c ) + 800490a: 6013 str r3, [r2, #0] } - 8002c2c: bf00 nop - 8002c2e: 370c adds r7, #12 - 8002c30: 46bd mov sp, r7 - 8002c32: f85d 7b04 ldr.w r7, [sp], #4 - 8002c36: 4770 bx lr - -08002c38 : - * @brief Input Capture callback in non-blocking mode - * @param htim TIM IC handle - * @retval None + 800490c: bf00 nop + 800490e: 46bd mov sp, r7 + 8004910: f85d 7b04 ldr.w r7, [sp], #4 + 8004914: 4770 bx lr + 8004916: bf00 nop + 8004918: 20000018 .word 0x20000018 + 800491c: 20000ebc .word 0x20000ebc + +08004920 : + * @note This function is declared as __weak to be overwritten in case of other + * implementations in user file. + * @retval tick value */ -__weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim) +__weak uint32_t HAL_GetTick(void) { - 8002c38: b480 push {r7} - 8002c3a: b083 sub sp, #12 - 8002c3c: af00 add r7, sp, #0 - 8002c3e: 6078 str r0, [r7, #4] - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_IC_CaptureCallback could be implemented in the user file - */ + 8004920: b480 push {r7} + 8004922: af00 add r7, sp, #0 + return uwTick; + 8004924: 4b03 ldr r3, [pc, #12] ; (8004934 ) + 8004926: 681b ldr r3, [r3, #0] } - 8002c40: bf00 nop - 8002c42: 370c adds r7, #12 - 8002c44: 46bd mov sp, r7 - 8002c46: f85d 7b04 ldr.w r7, [sp], #4 - 8002c4a: 4770 bx lr - -08002c4c : - * @brief PWM Pulse finished callback in non-blocking mode - * @param htim TIM handle - * @retval None - */ -__weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim) + 8004928: 4618 mov r0, r3 + 800492a: 46bd mov sp, r7 + 800492c: f85d 7b04 ldr.w r7, [sp], #4 + 8004930: 4770 bx lr + 8004932: bf00 nop + 8004934: 20000ebc .word 0x20000ebc + +08004938 <__NVIC_SetPriorityGrouping>: + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Priority grouping field. + */ +__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { - 8002c4c: b480 push {r7} - 8002c4e: b083 sub sp, #12 - 8002c50: af00 add r7, sp, #0 - 8002c52: 6078 str r0, [r7, #4] - UNUSED(htim); + 8004938: b480 push {r7} + 800493a: b085 sub sp, #20 + 800493c: af00 add r7, sp, #0 + 800493e: 6078 str r0, [r7, #4] + uint32_t reg_value; + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + 8004940: 687b ldr r3, [r7, #4] + 8004942: f003 0307 and.w r3, r3, #7 + 8004946: 60fb str r3, [r7, #12] - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file - */ + reg_value = SCB->AIRCR; /* read old register configuration */ + 8004948: 4b0b ldr r3, [pc, #44] ; (8004978 <__NVIC_SetPriorityGrouping+0x40>) + 800494a: 68db ldr r3, [r3, #12] + 800494c: 60bb str r3, [r7, #8] + reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ + 800494e: 68ba ldr r2, [r7, #8] + 8004950: f64f 03ff movw r3, #63743 ; 0xf8ff + 8004954: 4013 ands r3, r2 + 8004956: 60bb str r3, [r7, #8] + reg_value = (reg_value | + ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ + 8004958: 68fb ldr r3, [r7, #12] + 800495a: 021a lsls r2, r3, #8 + ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + 800495c: 68bb ldr r3, [r7, #8] + 800495e: 431a orrs r2, r3 + reg_value = (reg_value | + 8004960: 4b06 ldr r3, [pc, #24] ; (800497c <__NVIC_SetPriorityGrouping+0x44>) + 8004962: 4313 orrs r3, r2 + 8004964: 60bb str r3, [r7, #8] + SCB->AIRCR = reg_value; + 8004966: 4a04 ldr r2, [pc, #16] ; (8004978 <__NVIC_SetPriorityGrouping+0x40>) + 8004968: 68bb ldr r3, [r7, #8] + 800496a: 60d3 str r3, [r2, #12] } - 8002c54: bf00 nop - 8002c56: 370c adds r7, #12 - 8002c58: 46bd mov sp, r7 - 8002c5a: f85d 7b04 ldr.w r7, [sp], #4 - 8002c5e: 4770 bx lr - -08002c60 : - * @brief Hall Trigger detection callback in non-blocking mode - * @param htim TIM handle - * @retval None - */ -__weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim) + 800496c: bf00 nop + 800496e: 3714 adds r7, #20 + 8004970: 46bd mov sp, r7 + 8004972: f85d 7b04 ldr.w r7, [sp], #4 + 8004976: 4770 bx lr + 8004978: e000ed00 .word 0xe000ed00 + 800497c: 05fa0000 .word 0x05fa0000 + +08004980 <__NVIC_GetPriorityGrouping>: + \brief Get Priority Grouping + \details Reads the priority grouping field from the NVIC Interrupt Controller. + \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). + */ +__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) { - 8002c60: b480 push {r7} - 8002c62: b083 sub sp, #12 - 8002c64: af00 add r7, sp, #0 - 8002c66: 6078 str r0, [r7, #4] - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_TriggerCallback could be implemented in the user file - */ + 8004980: b480 push {r7} + 8004982: af00 add r7, sp, #0 + return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); + 8004984: 4b04 ldr r3, [pc, #16] ; (8004998 <__NVIC_GetPriorityGrouping+0x18>) + 8004986: 68db ldr r3, [r3, #12] + 8004988: 0a1b lsrs r3, r3, #8 + 800498a: f003 0307 and.w r3, r3, #7 } - 8002c68: bf00 nop - 8002c6a: 370c adds r7, #12 - 8002c6c: 46bd mov sp, r7 - 8002c6e: f85d 7b04 ldr.w r7, [sp], #4 - 8002c72: 4770 bx lr + 800498e: 4618 mov r0, r3 + 8004990: 46bd mov sp, r7 + 8004992: f85d 7b04 ldr.w r7, [sp], #4 + 8004996: 4770 bx lr + 8004998: e000ed00 .word 0xe000ed00 -08002c74 : - * @param TIMx TIM peripheral - * @param Structure TIM Base configuration structure - * @retval None - */ -void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure) +0800499c <__NVIC_EnableIRQ>: + \details Enables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) { - 8002c74: b480 push {r7} - 8002c76: b085 sub sp, #20 - 8002c78: af00 add r7, sp, #0 - 8002c7a: 6078 str r0, [r7, #4] - 8002c7c: 6039 str r1, [r7, #0] - uint32_t tmpcr1; - tmpcr1 = TIMx->CR1; - 8002c7e: 687b ldr r3, [r7, #4] - 8002c80: 681b ldr r3, [r3, #0] - 8002c82: 60fb str r3, [r7, #12] - - /* Set TIM Time Base Unit parameters ---------------------------------------*/ - if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) - 8002c84: 687b ldr r3, [r7, #4] - 8002c86: 4a40 ldr r2, [pc, #256] ; (8002d88 ) - 8002c88: 4293 cmp r3, r2 - 8002c8a: d013 beq.n 8002cb4 - 8002c8c: 687b ldr r3, [r7, #4] - 8002c8e: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 - 8002c92: d00f beq.n 8002cb4 - 8002c94: 687b ldr r3, [r7, #4] - 8002c96: 4a3d ldr r2, [pc, #244] ; (8002d8c ) - 8002c98: 4293 cmp r3, r2 - 8002c9a: d00b beq.n 8002cb4 - 8002c9c: 687b ldr r3, [r7, #4] - 8002c9e: 4a3c ldr r2, [pc, #240] ; (8002d90 ) - 8002ca0: 4293 cmp r3, r2 - 8002ca2: d007 beq.n 8002cb4 - 8002ca4: 687b ldr r3, [r7, #4] - 8002ca6: 4a3b ldr r2, [pc, #236] ; (8002d94 ) - 8002ca8: 4293 cmp r3, r2 - 8002caa: d003 beq.n 8002cb4 - 8002cac: 687b ldr r3, [r7, #4] - 8002cae: 4a3a ldr r2, [pc, #232] ; (8002d98 ) - 8002cb0: 4293 cmp r3, r2 - 8002cb2: d108 bne.n 8002cc6 + 800499c: b480 push {r7} + 800499e: b083 sub sp, #12 + 80049a0: af00 add r7, sp, #0 + 80049a2: 4603 mov r3, r0 + 80049a4: 71fb strb r3, [r7, #7] + if ((int32_t)(IRQn) >= 0) + 80049a6: f997 3007 ldrsb.w r3, [r7, #7] + 80049aa: 2b00 cmp r3, #0 + 80049ac: db0b blt.n 80049c6 <__NVIC_EnableIRQ+0x2a> { - /* Select the Counter Mode */ - tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); - 8002cb4: 68fb ldr r3, [r7, #12] - 8002cb6: f023 0370 bic.w r3, r3, #112 ; 0x70 - 8002cba: 60fb str r3, [r7, #12] - tmpcr1 |= Structure->CounterMode; - 8002cbc: 683b ldr r3, [r7, #0] - 8002cbe: 685b ldr r3, [r3, #4] - 8002cc0: 68fa ldr r2, [r7, #12] - 8002cc2: 4313 orrs r3, r2 - 8002cc4: 60fb str r3, [r7, #12] + NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + 80049ae: 79fb ldrb r3, [r7, #7] + 80049b0: f003 021f and.w r2, r3, #31 + 80049b4: 4907 ldr r1, [pc, #28] ; (80049d4 <__NVIC_EnableIRQ+0x38>) + 80049b6: f997 3007 ldrsb.w r3, [r7, #7] + 80049ba: 095b lsrs r3, r3, #5 + 80049bc: 2001 movs r0, #1 + 80049be: fa00 f202 lsl.w r2, r0, r2 + 80049c2: f841 2023 str.w r2, [r1, r3, lsl #2] } - - if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) - 8002cc6: 687b ldr r3, [r7, #4] - 8002cc8: 4a2f ldr r2, [pc, #188] ; (8002d88 ) - 8002cca: 4293 cmp r3, r2 - 8002ccc: d02b beq.n 8002d26 - 8002cce: 687b ldr r3, [r7, #4] - 8002cd0: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 - 8002cd4: d027 beq.n 8002d26 - 8002cd6: 687b ldr r3, [r7, #4] - 8002cd8: 4a2c ldr r2, [pc, #176] ; (8002d8c ) - 8002cda: 4293 cmp r3, r2 - 8002cdc: d023 beq.n 8002d26 - 8002cde: 687b ldr r3, [r7, #4] - 8002ce0: 4a2b ldr r2, [pc, #172] ; (8002d90 ) - 8002ce2: 4293 cmp r3, r2 - 8002ce4: d01f beq.n 8002d26 - 8002ce6: 687b ldr r3, [r7, #4] - 8002ce8: 4a2a ldr r2, [pc, #168] ; (8002d94 ) - 8002cea: 4293 cmp r3, r2 - 8002cec: d01b beq.n 8002d26 - 8002cee: 687b ldr r3, [r7, #4] - 8002cf0: 4a29 ldr r2, [pc, #164] ; (8002d98 ) - 8002cf2: 4293 cmp r3, r2 - 8002cf4: d017 beq.n 8002d26 - 8002cf6: 687b ldr r3, [r7, #4] - 8002cf8: 4a28 ldr r2, [pc, #160] ; (8002d9c ) - 8002cfa: 4293 cmp r3, r2 - 8002cfc: d013 beq.n 8002d26 - 8002cfe: 687b ldr r3, [r7, #4] - 8002d00: 4a27 ldr r2, [pc, #156] ; (8002da0 ) - 8002d02: 4293 cmp r3, r2 - 8002d04: d00f beq.n 8002d26 - 8002d06: 687b ldr r3, [r7, #4] - 8002d08: 4a26 ldr r2, [pc, #152] ; (8002da4 ) - 8002d0a: 4293 cmp r3, r2 - 8002d0c: d00b beq.n 8002d26 - 8002d0e: 687b ldr r3, [r7, #4] - 8002d10: 4a25 ldr r2, [pc, #148] ; (8002da8 ) - 8002d12: 4293 cmp r3, r2 - 8002d14: d007 beq.n 8002d26 - 8002d16: 687b ldr r3, [r7, #4] - 8002d18: 4a24 ldr r2, [pc, #144] ; (8002dac ) - 8002d1a: 4293 cmp r3, r2 - 8002d1c: d003 beq.n 8002d26 - 8002d1e: 687b ldr r3, [r7, #4] - 8002d20: 4a23 ldr r2, [pc, #140] ; (8002db0 ) - 8002d22: 4293 cmp r3, r2 - 8002d24: d108 bne.n 8002d38 +} + 80049c6: bf00 nop + 80049c8: 370c adds r7, #12 + 80049ca: 46bd mov sp, r7 + 80049cc: f85d 7b04 ldr.w r7, [sp], #4 + 80049d0: 4770 bx lr + 80049d2: bf00 nop + 80049d4: e000e100 .word 0xe000e100 + +080049d8 <__NVIC_SetPriority>: + \param [in] IRQn Interrupt number. + \param [in] priority Priority to set. + \note The priority cannot be set for every processor exception. + */ +__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + 80049d8: b480 push {r7} + 80049da: b083 sub sp, #12 + 80049dc: af00 add r7, sp, #0 + 80049de: 4603 mov r3, r0 + 80049e0: 6039 str r1, [r7, #0] + 80049e2: 71fb strb r3, [r7, #7] + if ((int32_t)(IRQn) >= 0) + 80049e4: f997 3007 ldrsb.w r3, [r7, #7] + 80049e8: 2b00 cmp r3, #0 + 80049ea: db0a blt.n 8004a02 <__NVIC_SetPriority+0x2a> { - /* Set the clock division */ - tmpcr1 &= ~TIM_CR1_CKD; - 8002d26: 68fb ldr r3, [r7, #12] - 8002d28: f423 7340 bic.w r3, r3, #768 ; 0x300 - 8002d2c: 60fb str r3, [r7, #12] - tmpcr1 |= (uint32_t)Structure->ClockDivision; - 8002d2e: 683b ldr r3, [r7, #0] - 8002d30: 68db ldr r3, [r3, #12] - 8002d32: 68fa ldr r2, [r7, #12] - 8002d34: 4313 orrs r3, r2 - 8002d36: 60fb str r3, [r7, #12] + NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + 80049ec: 683b ldr r3, [r7, #0] + 80049ee: b2da uxtb r2, r3 + 80049f0: 490c ldr r1, [pc, #48] ; (8004a24 <__NVIC_SetPriority+0x4c>) + 80049f2: f997 3007 ldrsb.w r3, [r7, #7] + 80049f6: 0112 lsls r2, r2, #4 + 80049f8: b2d2 uxtb r2, r2 + 80049fa: 440b add r3, r1 + 80049fc: f883 2300 strb.w r2, [r3, #768] ; 0x300 } - - /* Set the auto-reload preload */ - MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); - 8002d38: 68fb ldr r3, [r7, #12] - 8002d3a: f023 0280 bic.w r2, r3, #128 ; 0x80 - 8002d3e: 683b ldr r3, [r7, #0] - 8002d40: 695b ldr r3, [r3, #20] - 8002d42: 4313 orrs r3, r2 - 8002d44: 60fb str r3, [r7, #12] - - TIMx->CR1 = tmpcr1; - 8002d46: 687b ldr r3, [r7, #4] - 8002d48: 68fa ldr r2, [r7, #12] - 8002d4a: 601a str r2, [r3, #0] - - /* Set the Autoreload value */ - TIMx->ARR = (uint32_t)Structure->Period ; - 8002d4c: 683b ldr r3, [r7, #0] - 8002d4e: 689a ldr r2, [r3, #8] - 8002d50: 687b ldr r3, [r7, #4] - 8002d52: 62da str r2, [r3, #44] ; 0x2c - - /* Set the Prescaler value */ - TIMx->PSC = Structure->Prescaler; - 8002d54: 683b ldr r3, [r7, #0] - 8002d56: 681a ldr r2, [r3, #0] - 8002d58: 687b ldr r3, [r7, #4] - 8002d5a: 629a str r2, [r3, #40] ; 0x28 - - if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) - 8002d5c: 687b ldr r3, [r7, #4] - 8002d5e: 4a0a ldr r2, [pc, #40] ; (8002d88 ) - 8002d60: 4293 cmp r3, r2 - 8002d62: d003 beq.n 8002d6c - 8002d64: 687b ldr r3, [r7, #4] - 8002d66: 4a0c ldr r2, [pc, #48] ; (8002d98 ) - 8002d68: 4293 cmp r3, r2 - 8002d6a: d103 bne.n 8002d74 + else { - /* Set the Repetition Counter value */ - TIMx->RCR = Structure->RepetitionCounter; - 8002d6c: 683b ldr r3, [r7, #0] - 8002d6e: 691a ldr r2, [r3, #16] - 8002d70: 687b ldr r3, [r7, #4] - 8002d72: 631a str r2, [r3, #48] ; 0x30 + SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); } - - /* Generate an update event to reload the Prescaler - and the repetition counter (only for advanced timer) value immediately */ - TIMx->EGR = TIM_EGR_UG; - 8002d74: 687b ldr r3, [r7, #4] - 8002d76: 2201 movs r2, #1 - 8002d78: 615a str r2, [r3, #20] } - 8002d7a: bf00 nop - 8002d7c: 3714 adds r7, #20 - 8002d7e: 46bd mov sp, r7 - 8002d80: f85d 7b04 ldr.w r7, [sp], #4 - 8002d84: 4770 bx lr - 8002d86: bf00 nop - 8002d88: 40010000 .word 0x40010000 - 8002d8c: 40000400 .word 0x40000400 - 8002d90: 40000800 .word 0x40000800 - 8002d94: 40000c00 .word 0x40000c00 - 8002d98: 40010400 .word 0x40010400 - 8002d9c: 40014000 .word 0x40014000 - 8002da0: 40014400 .word 0x40014400 - 8002da4: 40014800 .word 0x40014800 - 8002da8: 40001800 .word 0x40001800 - 8002dac: 40001c00 .word 0x40001c00 - 8002db0: 40002000 .word 0x40002000 - -08002db4 : - * @param TIMx to select the TIM peripheral - * @param OC_Config The ouput configuration structure - * @retval None - */ -static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config) + 8004a00: e00a b.n 8004a18 <__NVIC_SetPriority+0x40> + SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + 8004a02: 683b ldr r3, [r7, #0] + 8004a04: b2da uxtb r2, r3 + 8004a06: 4908 ldr r1, [pc, #32] ; (8004a28 <__NVIC_SetPriority+0x50>) + 8004a08: 79fb ldrb r3, [r7, #7] + 8004a0a: f003 030f and.w r3, r3, #15 + 8004a0e: 3b04 subs r3, #4 + 8004a10: 0112 lsls r2, r2, #4 + 8004a12: b2d2 uxtb r2, r2 + 8004a14: 440b add r3, r1 + 8004a16: 761a strb r2, [r3, #24] +} + 8004a18: bf00 nop + 8004a1a: 370c adds r7, #12 + 8004a1c: 46bd mov sp, r7 + 8004a1e: f85d 7b04 ldr.w r7, [sp], #4 + 8004a22: 4770 bx lr + 8004a24: e000e100 .word 0xe000e100 + 8004a28: e000ed00 .word 0xe000ed00 + +08004a2c : + \param [in] PreemptPriority Preemptive priority value (starting from 0). + \param [in] SubPriority Subpriority value (starting from 0). + \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). + */ +__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) { - 8002db4: b480 push {r7} - 8002db6: b087 sub sp, #28 - 8002db8: af00 add r7, sp, #0 - 8002dba: 6078 str r0, [r7, #4] - 8002dbc: 6039 str r1, [r7, #0] - uint32_t tmpccmrx; - uint32_t tmpccer; - uint32_t tmpcr2; - - /* Disable the Channel 1: Reset the CC1E Bit */ - TIMx->CCER &= ~TIM_CCER_CC1E; - 8002dbe: 687b ldr r3, [r7, #4] - 8002dc0: 6a1b ldr r3, [r3, #32] - 8002dc2: f023 0201 bic.w r2, r3, #1 - 8002dc6: 687b ldr r3, [r7, #4] - 8002dc8: 621a str r2, [r3, #32] - - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; - 8002dca: 687b ldr r3, [r7, #4] - 8002dcc: 6a1b ldr r3, [r3, #32] - 8002dce: 617b str r3, [r7, #20] - /* Get the TIMx CR2 register value */ - tmpcr2 = TIMx->CR2; - 8002dd0: 687b ldr r3, [r7, #4] - 8002dd2: 685b ldr r3, [r3, #4] - 8002dd4: 613b str r3, [r7, #16] - - /* Get the TIMx CCMR1 register value */ - tmpccmrx = TIMx->CCMR1; - 8002dd6: 687b ldr r3, [r7, #4] - 8002dd8: 699b ldr r3, [r3, #24] - 8002dda: 60fb str r3, [r7, #12] + 8004a2c: b480 push {r7} + 8004a2e: b089 sub sp, #36 ; 0x24 + 8004a30: af00 add r7, sp, #0 + 8004a32: 60f8 str r0, [r7, #12] + 8004a34: 60b9 str r1, [r7, #8] + 8004a36: 607a str r2, [r7, #4] + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + 8004a38: 68fb ldr r3, [r7, #12] + 8004a3a: f003 0307 and.w r3, r3, #7 + 8004a3e: 61fb str r3, [r7, #28] + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; - /* Reset the Output Compare Mode Bits */ - tmpccmrx &= ~TIM_CCMR1_OC1M; - 8002ddc: 68fa ldr r2, [r7, #12] - 8002dde: 4b2b ldr r3, [pc, #172] ; (8002e8c ) - 8002de0: 4013 ands r3, r2 - 8002de2: 60fb str r3, [r7, #12] - tmpccmrx &= ~TIM_CCMR1_CC1S; - 8002de4: 68fb ldr r3, [r7, #12] - 8002de6: f023 0303 bic.w r3, r3, #3 - 8002dea: 60fb str r3, [r7, #12] - /* Select the Output Compare Mode */ - tmpccmrx |= OC_Config->OCMode; - 8002dec: 683b ldr r3, [r7, #0] - 8002dee: 681b ldr r3, [r3, #0] - 8002df0: 68fa ldr r2, [r7, #12] - 8002df2: 4313 orrs r3, r2 - 8002df4: 60fb str r3, [r7, #12] + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + 8004a40: 69fb ldr r3, [r7, #28] + 8004a42: f1c3 0307 rsb r3, r3, #7 + 8004a46: 2b04 cmp r3, #4 + 8004a48: bf28 it cs + 8004a4a: 2304 movcs r3, #4 + 8004a4c: 61bb str r3, [r7, #24] + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + 8004a4e: 69fb ldr r3, [r7, #28] + 8004a50: 3304 adds r3, #4 + 8004a52: 2b06 cmp r3, #6 + 8004a54: d902 bls.n 8004a5c + 8004a56: 69fb ldr r3, [r7, #28] + 8004a58: 3b03 subs r3, #3 + 8004a5a: e000 b.n 8004a5e + 8004a5c: 2300 movs r3, #0 + 8004a5e: 617b str r3, [r7, #20] - /* Reset the Output Polarity level */ - tmpccer &= ~TIM_CCER_CC1P; - 8002df6: 697b ldr r3, [r7, #20] - 8002df8: f023 0302 bic.w r3, r3, #2 - 8002dfc: 617b str r3, [r7, #20] - /* Set the Output Compare Polarity */ - tmpccer |= OC_Config->OCPolarity; - 8002dfe: 683b ldr r3, [r7, #0] - 8002e00: 689b ldr r3, [r3, #8] - 8002e02: 697a ldr r2, [r7, #20] - 8002e04: 4313 orrs r3, r2 - 8002e06: 617b str r3, [r7, #20] + return ( + ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | + 8004a60: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff + 8004a64: 69bb ldr r3, [r7, #24] + 8004a66: fa02 f303 lsl.w r3, r2, r3 + 8004a6a: 43da mvns r2, r3 + 8004a6c: 68bb ldr r3, [r7, #8] + 8004a6e: 401a ands r2, r3 + 8004a70: 697b ldr r3, [r7, #20] + 8004a72: 409a lsls r2, r3 + ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) + 8004a74: f04f 31ff mov.w r1, #4294967295 ; 0xffffffff + 8004a78: 697b ldr r3, [r7, #20] + 8004a7a: fa01 f303 lsl.w r3, r1, r3 + 8004a7e: 43d9 mvns r1, r3 + 8004a80: 687b ldr r3, [r7, #4] + 8004a82: 400b ands r3, r1 + ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | + 8004a84: 4313 orrs r3, r2 + ); +} + 8004a86: 4618 mov r0, r3 + 8004a88: 3724 adds r7, #36 ; 0x24 + 8004a8a: 46bd mov sp, r7 + 8004a8c: f85d 7b04 ldr.w r7, [sp], #4 + 8004a90: 4770 bx lr + ... - if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_1)) - 8002e08: 687b ldr r3, [r7, #4] - 8002e0a: 4a21 ldr r2, [pc, #132] ; (8002e90 ) - 8002e0c: 4293 cmp r3, r2 - 8002e0e: d003 beq.n 8002e18 - 8002e10: 687b ldr r3, [r7, #4] - 8002e12: 4a20 ldr r2, [pc, #128] ; (8002e94 ) - 8002e14: 4293 cmp r3, r2 - 8002e16: d10c bne.n 8002e32 +08004a94 : + \note When the variable __Vendor_SysTickConfig is set to 1, then the + function SysTick_Config is not included. In this case, the file device.h + must contain a vendor-specific implementation of this function. + */ +__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) +{ + 8004a94: b580 push {r7, lr} + 8004a96: b082 sub sp, #8 + 8004a98: af00 add r7, sp, #0 + 8004a9a: 6078 str r0, [r7, #4] + if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + 8004a9c: 687b ldr r3, [r7, #4] + 8004a9e: 3b01 subs r3, #1 + 8004aa0: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000 + 8004aa4: d301 bcc.n 8004aaa { - /* Check parameters */ - assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); - - /* Reset the Output N Polarity level */ - tmpccer &= ~TIM_CCER_CC1NP; - 8002e18: 697b ldr r3, [r7, #20] - 8002e1a: f023 0308 bic.w r3, r3, #8 - 8002e1e: 617b str r3, [r7, #20] - /* Set the Output N Polarity */ - tmpccer |= OC_Config->OCNPolarity; - 8002e20: 683b ldr r3, [r7, #0] - 8002e22: 68db ldr r3, [r3, #12] - 8002e24: 697a ldr r2, [r7, #20] - 8002e26: 4313 orrs r3, r2 - 8002e28: 617b str r3, [r7, #20] - /* Reset the Output N State */ - tmpccer &= ~TIM_CCER_CC1NE; - 8002e2a: 697b ldr r3, [r7, #20] - 8002e2c: f023 0304 bic.w r3, r3, #4 - 8002e30: 617b str r3, [r7, #20] - } - - if (IS_TIM_BREAK_INSTANCE(TIMx)) - 8002e32: 687b ldr r3, [r7, #4] - 8002e34: 4a16 ldr r2, [pc, #88] ; (8002e90 ) - 8002e36: 4293 cmp r3, r2 - 8002e38: d003 beq.n 8002e42 - 8002e3a: 687b ldr r3, [r7, #4] - 8002e3c: 4a15 ldr r2, [pc, #84] ; (8002e94 ) - 8002e3e: 4293 cmp r3, r2 - 8002e40: d111 bne.n 8002e66 - /* Check parameters */ - assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); - assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); - - /* Reset the Output Compare and Output Compare N IDLE State */ - tmpcr2 &= ~TIM_CR2_OIS1; - 8002e42: 693b ldr r3, [r7, #16] - 8002e44: f423 7380 bic.w r3, r3, #256 ; 0x100 - 8002e48: 613b str r3, [r7, #16] - tmpcr2 &= ~TIM_CR2_OIS1N; - 8002e4a: 693b ldr r3, [r7, #16] - 8002e4c: f423 7300 bic.w r3, r3, #512 ; 0x200 - 8002e50: 613b str r3, [r7, #16] - /* Set the Output Idle state */ - tmpcr2 |= OC_Config->OCIdleState; - 8002e52: 683b ldr r3, [r7, #0] - 8002e54: 695b ldr r3, [r3, #20] - 8002e56: 693a ldr r2, [r7, #16] - 8002e58: 4313 orrs r3, r2 - 8002e5a: 613b str r3, [r7, #16] - /* Set the Output N Idle state */ - tmpcr2 |= OC_Config->OCNIdleState; - 8002e5c: 683b ldr r3, [r7, #0] - 8002e5e: 699b ldr r3, [r3, #24] - 8002e60: 693a ldr r2, [r7, #16] - 8002e62: 4313 orrs r3, r2 - 8002e64: 613b str r3, [r7, #16] + return (1UL); /* Reload value impossible */ + 8004aa6: 2301 movs r3, #1 + 8004aa8: e00f b.n 8004aca } - /* Write to TIMx CR2 */ - TIMx->CR2 = tmpcr2; - 8002e66: 687b ldr r3, [r7, #4] - 8002e68: 693a ldr r2, [r7, #16] - 8002e6a: 605a str r2, [r3, #4] - - /* Write to TIMx CCMR1 */ - TIMx->CCMR1 = tmpccmrx; - 8002e6c: 687b ldr r3, [r7, #4] - 8002e6e: 68fa ldr r2, [r7, #12] - 8002e70: 619a str r2, [r3, #24] - - /* Set the Capture Compare Register value */ - TIMx->CCR1 = OC_Config->Pulse; - 8002e72: 683b ldr r3, [r7, #0] - 8002e74: 685a ldr r2, [r3, #4] - 8002e76: 687b ldr r3, [r7, #4] - 8002e78: 635a str r2, [r3, #52] ; 0x34 + SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + 8004aaa: 4a0a ldr r2, [pc, #40] ; (8004ad4 ) + 8004aac: 687b ldr r3, [r7, #4] + 8004aae: 3b01 subs r3, #1 + 8004ab0: 6053 str r3, [r2, #4] + NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ + 8004ab2: 210f movs r1, #15 + 8004ab4: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff + 8004ab8: f7ff ff8e bl 80049d8 <__NVIC_SetPriority> + SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ + 8004abc: 4b05 ldr r3, [pc, #20] ; (8004ad4 ) + 8004abe: 2200 movs r2, #0 + 8004ac0: 609a str r2, [r3, #8] + SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + 8004ac2: 4b04 ldr r3, [pc, #16] ; (8004ad4 ) + 8004ac4: 2207 movs r2, #7 + 8004ac6: 601a str r2, [r3, #0] + SysTick_CTRL_TICKINT_Msk | + SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ + return (0UL); /* Function successful */ + 8004ac8: 2300 movs r3, #0 +} + 8004aca: 4618 mov r0, r3 + 8004acc: 3708 adds r7, #8 + 8004ace: 46bd mov sp, r7 + 8004ad0: bd80 pop {r7, pc} + 8004ad2: bf00 nop + 8004ad4: e000e010 .word 0xe000e010 + +08004ad8 : + * @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible. + * The pending IRQ priority will be managed only by the subpriority. + * @retval None + */ +void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup) +{ + 8004ad8: b580 push {r7, lr} + 8004ada: b082 sub sp, #8 + 8004adc: af00 add r7, sp, #0 + 8004ade: 6078 str r0, [r7, #4] + /* Check the parameters */ + assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); + + /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */ + NVIC_SetPriorityGrouping(PriorityGroup); + 8004ae0: 6878 ldr r0, [r7, #4] + 8004ae2: f7ff ff29 bl 8004938 <__NVIC_SetPriorityGrouping> +} + 8004ae6: bf00 nop + 8004ae8: 3708 adds r7, #8 + 8004aea: 46bd mov sp, r7 + 8004aec: bd80 pop {r7, pc} - /* Write to TIMx CCER */ - TIMx->CCER = tmpccer; - 8002e7a: 687b ldr r3, [r7, #4] - 8002e7c: 697a ldr r2, [r7, #20] - 8002e7e: 621a str r2, [r3, #32] +08004aee : + * This parameter can be a value between 0 and 15 + * A lower priority value indicates a higher priority. + * @retval None + */ +void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) +{ + 8004aee: b580 push {r7, lr} + 8004af0: b086 sub sp, #24 + 8004af2: af00 add r7, sp, #0 + 8004af4: 4603 mov r3, r0 + 8004af6: 60b9 str r1, [r7, #8] + 8004af8: 607a str r2, [r7, #4] + 8004afa: 73fb strb r3, [r7, #15] + uint32_t prioritygroup = 0x00; + 8004afc: 2300 movs r3, #0 + 8004afe: 617b str r3, [r7, #20] + + /* Check the parameters */ + assert_param(IS_NVIC_SUB_PRIORITY(SubPriority)); + assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); + + prioritygroup = NVIC_GetPriorityGrouping(); + 8004b00: f7ff ff3e bl 8004980 <__NVIC_GetPriorityGrouping> + 8004b04: 6178 str r0, [r7, #20] + + NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority)); + 8004b06: 687a ldr r2, [r7, #4] + 8004b08: 68b9 ldr r1, [r7, #8] + 8004b0a: 6978 ldr r0, [r7, #20] + 8004b0c: f7ff ff8e bl 8004a2c + 8004b10: 4602 mov r2, r0 + 8004b12: f997 300f ldrsb.w r3, [r7, #15] + 8004b16: 4611 mov r1, r2 + 8004b18: 4618 mov r0, r3 + 8004b1a: f7ff ff5d bl 80049d8 <__NVIC_SetPriority> } - 8002e80: bf00 nop - 8002e82: 371c adds r7, #28 - 8002e84: 46bd mov sp, r7 - 8002e86: f85d 7b04 ldr.w r7, [sp], #4 - 8002e8a: 4770 bx lr - 8002e8c: fffeff8f .word 0xfffeff8f - 8002e90: 40010000 .word 0x40010000 - 8002e94: 40010400 .word 0x40010400 - -08002e98 : - * @param TIMx to select the TIM peripheral - * @param OC_Config The ouput configuration structure + 8004b1e: bf00 nop + 8004b20: 3718 adds r7, #24 + 8004b22: 46bd mov sp, r7 + 8004b24: bd80 pop {r7, pc} + +08004b26 : + * This parameter can be an enumerator of IRQn_Type enumeration + * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f7xxxx.h)) * @retval None */ -void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config) +void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) { - 8002e98: b480 push {r7} - 8002e9a: b087 sub sp, #28 - 8002e9c: af00 add r7, sp, #0 - 8002e9e: 6078 str r0, [r7, #4] - 8002ea0: 6039 str r1, [r7, #0] - uint32_t tmpccmrx; - uint32_t tmpccer; - uint32_t tmpcr2; + 8004b26: b580 push {r7, lr} + 8004b28: b082 sub sp, #8 + 8004b2a: af00 add r7, sp, #0 + 8004b2c: 4603 mov r3, r0 + 8004b2e: 71fb strb r3, [r7, #7] + /* Check the parameters */ + assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); + + /* Enable interrupt */ + NVIC_EnableIRQ(IRQn); + 8004b30: f997 3007 ldrsb.w r3, [r7, #7] + 8004b34: 4618 mov r0, r3 + 8004b36: f7ff ff31 bl 800499c <__NVIC_EnableIRQ> +} + 8004b3a: bf00 nop + 8004b3c: 3708 adds r7, #8 + 8004b3e: 46bd mov sp, r7 + 8004b40: bd80 pop {r7, pc} - /* Disable the Channel 2: Reset the CC2E Bit */ - TIMx->CCER &= ~TIM_CCER_CC2E; - 8002ea2: 687b ldr r3, [r7, #4] - 8002ea4: 6a1b ldr r3, [r3, #32] - 8002ea6: f023 0210 bic.w r2, r3, #16 - 8002eaa: 687b ldr r3, [r7, #4] - 8002eac: 621a str r2, [r3, #32] +08004b42 : + * @param TicksNumb Specifies the ticks Number of ticks between two interrupts. + * @retval status: - 0 Function succeeded. + * - 1 Function failed. + */ +uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) +{ + 8004b42: b580 push {r7, lr} + 8004b44: b082 sub sp, #8 + 8004b46: af00 add r7, sp, #0 + 8004b48: 6078 str r0, [r7, #4] + return SysTick_Config(TicksNumb); + 8004b4a: 6878 ldr r0, [r7, #4] + 8004b4c: f7ff ffa2 bl 8004a94 + 8004b50: 4603 mov r3, r0 +} + 8004b52: 4618 mov r0, r3 + 8004b54: 3708 adds r7, #8 + 8004b56: 46bd mov sp, r7 + 8004b58: bd80 pop {r7, pc} + ... - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; - 8002eae: 687b ldr r3, [r7, #4] - 8002eb0: 6a1b ldr r3, [r3, #32] - 8002eb2: 617b str r3, [r7, #20] - /* Get the TIMx CR2 register value */ - tmpcr2 = TIMx->CR2; - 8002eb4: 687b ldr r3, [r7, #4] - 8002eb6: 685b ldr r3, [r3, #4] - 8002eb8: 613b str r3, [r7, #16] +08004b5c : + * @param hdma Pointer to a DMA_HandleTypeDef structure that contains + * the configuration information for the specified DMA Stream. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma) +{ + 8004b5c: b580 push {r7, lr} + 8004b5e: b086 sub sp, #24 + 8004b60: af00 add r7, sp, #0 + 8004b62: 6078 str r0, [r7, #4] + uint32_t tmp = 0U; + 8004b64: 2300 movs r3, #0 + 8004b66: 617b str r3, [r7, #20] + uint32_t tickstart = HAL_GetTick(); + 8004b68: f7ff feda bl 8004920 + 8004b6c: 6138 str r0, [r7, #16] + DMA_Base_Registers *regs; - /* Get the TIMx CCMR1 register value */ - tmpccmrx = TIMx->CCMR1; - 8002eba: 687b ldr r3, [r7, #4] - 8002ebc: 699b ldr r3, [r3, #24] - 8002ebe: 60fb str r3, [r7, #12] + /* Check the DMA peripheral state */ + if(hdma == NULL) + 8004b6e: 687b ldr r3, [r7, #4] + 8004b70: 2b00 cmp r3, #0 + 8004b72: d101 bne.n 8004b78 + { + return HAL_ERROR; + 8004b74: 2301 movs r3, #1 + 8004b76: e099 b.n 8004cac + assert_param(IS_DMA_MEMORY_BURST(hdma->Init.MemBurst)); + assert_param(IS_DMA_PERIPHERAL_BURST(hdma->Init.PeriphBurst)); + } + + /* Allocate lock resource */ + __HAL_UNLOCK(hdma); + 8004b78: 687b ldr r3, [r7, #4] + 8004b7a: 2200 movs r2, #0 + 8004b7c: f883 2034 strb.w r2, [r3, #52] ; 0x34 - /* Reset the Output Compare mode and Capture/Compare selection Bits */ - tmpccmrx &= ~TIM_CCMR1_OC2M; - 8002ec0: 68fa ldr r2, [r7, #12] - 8002ec2: 4b2e ldr r3, [pc, #184] ; (8002f7c ) - 8002ec4: 4013 ands r3, r2 - 8002ec6: 60fb str r3, [r7, #12] - tmpccmrx &= ~TIM_CCMR1_CC2S; - 8002ec8: 68fb ldr r3, [r7, #12] - 8002eca: f423 7340 bic.w r3, r3, #768 ; 0x300 - 8002ece: 60fb str r3, [r7, #12] + /* Change DMA peripheral state */ + hdma->State = HAL_DMA_STATE_BUSY; + 8004b80: 687b ldr r3, [r7, #4] + 8004b82: 2202 movs r2, #2 + 8004b84: f883 2035 strb.w r2, [r3, #53] ; 0x35 + + /* Disable the peripheral */ + __HAL_DMA_DISABLE(hdma); + 8004b88: 687b ldr r3, [r7, #4] + 8004b8a: 681b ldr r3, [r3, #0] + 8004b8c: 681a ldr r2, [r3, #0] + 8004b8e: 687b ldr r3, [r7, #4] + 8004b90: 681b ldr r3, [r3, #0] + 8004b92: f022 0201 bic.w r2, r2, #1 + 8004b96: 601a str r2, [r3, #0] + + /* Check if the DMA Stream is effectively disabled */ + while((hdma->Instance->CR & DMA_SxCR_EN) != RESET) + 8004b98: e00f b.n 8004bba + { + /* Check for the Timeout */ + if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA_ABORT) + 8004b9a: f7ff fec1 bl 8004920 + 8004b9e: 4602 mov r2, r0 + 8004ba0: 693b ldr r3, [r7, #16] + 8004ba2: 1ad3 subs r3, r2, r3 + 8004ba4: 2b05 cmp r3, #5 + 8004ba6: d908 bls.n 8004bba + { + /* Update error code */ + hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT; + 8004ba8: 687b ldr r3, [r7, #4] + 8004baa: 2220 movs r2, #32 + 8004bac: 655a str r2, [r3, #84] ; 0x54 + + /* Change the DMA state */ + hdma->State = HAL_DMA_STATE_TIMEOUT; + 8004bae: 687b ldr r3, [r7, #4] + 8004bb0: 2203 movs r2, #3 + 8004bb2: f883 2035 strb.w r2, [r3, #53] ; 0x35 + + return HAL_TIMEOUT; + 8004bb6: 2303 movs r3, #3 + 8004bb8: e078 b.n 8004cac + while((hdma->Instance->CR & DMA_SxCR_EN) != RESET) + 8004bba: 687b ldr r3, [r7, #4] + 8004bbc: 681b ldr r3, [r3, #0] + 8004bbe: 681b ldr r3, [r3, #0] + 8004bc0: f003 0301 and.w r3, r3, #1 + 8004bc4: 2b00 cmp r3, #0 + 8004bc6: d1e8 bne.n 8004b9a + } + } + + /* Get the CR register value */ + tmp = hdma->Instance->CR; + 8004bc8: 687b ldr r3, [r7, #4] + 8004bca: 681b ldr r3, [r3, #0] + 8004bcc: 681b ldr r3, [r3, #0] + 8004bce: 617b str r3, [r7, #20] - /* Select the Output Compare Mode */ - tmpccmrx |= (OC_Config->OCMode << 8U); - 8002ed0: 683b ldr r3, [r7, #0] - 8002ed2: 681b ldr r3, [r3, #0] - 8002ed4: 021b lsls r3, r3, #8 - 8002ed6: 68fa ldr r2, [r7, #12] - 8002ed8: 4313 orrs r3, r2 - 8002eda: 60fb str r3, [r7, #12] + /* Clear CHSEL, MBURST, PBURST, PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR, CT and DBM bits */ + tmp &= ((uint32_t)~(DMA_SxCR_CHSEL | DMA_SxCR_MBURST | DMA_SxCR_PBURST | \ + 8004bd0: 697a ldr r2, [r7, #20] + 8004bd2: 4b38 ldr r3, [pc, #224] ; (8004cb4 ) + 8004bd4: 4013 ands r3, r2 + 8004bd6: 617b str r3, [r7, #20] + DMA_SxCR_PL | DMA_SxCR_MSIZE | DMA_SxCR_PSIZE | \ + DMA_SxCR_MINC | DMA_SxCR_PINC | DMA_SxCR_CIRC | \ + DMA_SxCR_DIR | DMA_SxCR_CT | DMA_SxCR_DBM)); - /* Reset the Output Polarity level */ - tmpccer &= ~TIM_CCER_CC2P; - 8002edc: 697b ldr r3, [r7, #20] - 8002ede: f023 0320 bic.w r3, r3, #32 - 8002ee2: 617b str r3, [r7, #20] - /* Set the Output Compare Polarity */ - tmpccer |= (OC_Config->OCPolarity << 4U); - 8002ee4: 683b ldr r3, [r7, #0] - 8002ee6: 689b ldr r3, [r3, #8] - 8002ee8: 011b lsls r3, r3, #4 - 8002eea: 697a ldr r2, [r7, #20] - 8002eec: 4313 orrs r3, r2 - 8002eee: 617b str r3, [r7, #20] + /* Prepare the DMA Stream configuration */ + tmp |= hdma->Init.Channel | hdma->Init.Direction | + 8004bd8: 687b ldr r3, [r7, #4] + 8004bda: 685a ldr r2, [r3, #4] + 8004bdc: 687b ldr r3, [r7, #4] + 8004bde: 689b ldr r3, [r3, #8] + 8004be0: 431a orrs r2, r3 + hdma->Init.PeriphInc | hdma->Init.MemInc | + 8004be2: 687b ldr r3, [r7, #4] + 8004be4: 68db ldr r3, [r3, #12] + tmp |= hdma->Init.Channel | hdma->Init.Direction | + 8004be6: 431a orrs r2, r3 + hdma->Init.PeriphInc | hdma->Init.MemInc | + 8004be8: 687b ldr r3, [r7, #4] + 8004bea: 691b ldr r3, [r3, #16] + 8004bec: 431a orrs r2, r3 + hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | + 8004bee: 687b ldr r3, [r7, #4] + 8004bf0: 695b ldr r3, [r3, #20] + hdma->Init.PeriphInc | hdma->Init.MemInc | + 8004bf2: 431a orrs r2, r3 + hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | + 8004bf4: 687b ldr r3, [r7, #4] + 8004bf6: 699b ldr r3, [r3, #24] + 8004bf8: 431a orrs r2, r3 + hdma->Init.Mode | hdma->Init.Priority; + 8004bfa: 687b ldr r3, [r7, #4] + 8004bfc: 69db ldr r3, [r3, #28] + hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | + 8004bfe: 431a orrs r2, r3 + hdma->Init.Mode | hdma->Init.Priority; + 8004c00: 687b ldr r3, [r7, #4] + 8004c02: 6a1b ldr r3, [r3, #32] + 8004c04: 4313 orrs r3, r2 + tmp |= hdma->Init.Channel | hdma->Init.Direction | + 8004c06: 697a ldr r2, [r7, #20] + 8004c08: 4313 orrs r3, r2 + 8004c0a: 617b str r3, [r7, #20] - if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_2)) - 8002ef0: 687b ldr r3, [r7, #4] - 8002ef2: 4a23 ldr r2, [pc, #140] ; (8002f80 ) - 8002ef4: 4293 cmp r3, r2 - 8002ef6: d003 beq.n 8002f00 - 8002ef8: 687b ldr r3, [r7, #4] - 8002efa: 4a22 ldr r2, [pc, #136] ; (8002f84 ) - 8002efc: 4293 cmp r3, r2 - 8002efe: d10d bne.n 8002f1c + /* the Memory burst and peripheral burst are not used when the FIFO is disabled */ + if(hdma->Init.FIFOMode == DMA_FIFOMODE_ENABLE) + 8004c0c: 687b ldr r3, [r7, #4] + 8004c0e: 6a5b ldr r3, [r3, #36] ; 0x24 + 8004c10: 2b04 cmp r3, #4 + 8004c12: d107 bne.n 8004c24 { - assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); + /* Get memory burst and peripheral burst */ + tmp |= hdma->Init.MemBurst | hdma->Init.PeriphBurst; + 8004c14: 687b ldr r3, [r7, #4] + 8004c16: 6ada ldr r2, [r3, #44] ; 0x2c + 8004c18: 687b ldr r3, [r7, #4] + 8004c1a: 6b1b ldr r3, [r3, #48] ; 0x30 + 8004c1c: 4313 orrs r3, r2 + 8004c1e: 697a ldr r2, [r7, #20] + 8004c20: 4313 orrs r3, r2 + 8004c22: 617b str r3, [r7, #20] + } + + /* Write to DMA Stream CR register */ + hdma->Instance->CR = tmp; + 8004c24: 687b ldr r3, [r7, #4] + 8004c26: 681b ldr r3, [r3, #0] + 8004c28: 697a ldr r2, [r7, #20] + 8004c2a: 601a str r2, [r3, #0] - /* Reset the Output N Polarity level */ - tmpccer &= ~TIM_CCER_CC2NP; - 8002f00: 697b ldr r3, [r7, #20] - 8002f02: f023 0380 bic.w r3, r3, #128 ; 0x80 - 8002f06: 617b str r3, [r7, #20] - /* Set the Output N Polarity */ - tmpccer |= (OC_Config->OCNPolarity << 4U); - 8002f08: 683b ldr r3, [r7, #0] - 8002f0a: 68db ldr r3, [r3, #12] - 8002f0c: 011b lsls r3, r3, #4 - 8002f0e: 697a ldr r2, [r7, #20] - 8002f10: 4313 orrs r3, r2 - 8002f12: 617b str r3, [r7, #20] - /* Reset the Output N State */ - tmpccer &= ~TIM_CCER_CC2NE; - 8002f14: 697b ldr r3, [r7, #20] - 8002f16: f023 0340 bic.w r3, r3, #64 ; 0x40 - 8002f1a: 617b str r3, [r7, #20] + /* Get the FCR register value */ + tmp = hdma->Instance->FCR; + 8004c2c: 687b ldr r3, [r7, #4] + 8004c2e: 681b ldr r3, [r3, #0] + 8004c30: 695b ldr r3, [r3, #20] + 8004c32: 617b str r3, [r7, #20] - } + /* Clear Direct mode and FIFO threshold bits */ + tmp &= (uint32_t)~(DMA_SxFCR_DMDIS | DMA_SxFCR_FTH); + 8004c34: 697b ldr r3, [r7, #20] + 8004c36: f023 0307 bic.w r3, r3, #7 + 8004c3a: 617b str r3, [r7, #20] - if (IS_TIM_BREAK_INSTANCE(TIMx)) - 8002f1c: 687b ldr r3, [r7, #4] - 8002f1e: 4a18 ldr r2, [pc, #96] ; (8002f80 ) - 8002f20: 4293 cmp r3, r2 - 8002f22: d003 beq.n 8002f2c - 8002f24: 687b ldr r3, [r7, #4] - 8002f26: 4a17 ldr r2, [pc, #92] ; (8002f84 ) - 8002f28: 4293 cmp r3, r2 - 8002f2a: d113 bne.n 8002f54 - /* Check parameters */ - assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); - assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); + /* Prepare the DMA Stream FIFO configuration */ + tmp |= hdma->Init.FIFOMode; + 8004c3c: 687b ldr r3, [r7, #4] + 8004c3e: 6a5b ldr r3, [r3, #36] ; 0x24 + 8004c40: 697a ldr r2, [r7, #20] + 8004c42: 4313 orrs r3, r2 + 8004c44: 617b str r3, [r7, #20] - /* Reset the Output Compare and Output Compare N IDLE State */ - tmpcr2 &= ~TIM_CR2_OIS2; - 8002f2c: 693b ldr r3, [r7, #16] - 8002f2e: f423 6380 bic.w r3, r3, #1024 ; 0x400 - 8002f32: 613b str r3, [r7, #16] - tmpcr2 &= ~TIM_CR2_OIS2N; - 8002f34: 693b ldr r3, [r7, #16] - 8002f36: f423 6300 bic.w r3, r3, #2048 ; 0x800 - 8002f3a: 613b str r3, [r7, #16] - /* Set the Output Idle state */ - tmpcr2 |= (OC_Config->OCIdleState << 2U); - 8002f3c: 683b ldr r3, [r7, #0] - 8002f3e: 695b ldr r3, [r3, #20] - 8002f40: 009b lsls r3, r3, #2 - 8002f42: 693a ldr r2, [r7, #16] - 8002f44: 4313 orrs r3, r2 - 8002f46: 613b str r3, [r7, #16] - /* Set the Output N Idle state */ - tmpcr2 |= (OC_Config->OCNIdleState << 2U); - 8002f48: 683b ldr r3, [r7, #0] - 8002f4a: 699b ldr r3, [r3, #24] - 8002f4c: 009b lsls r3, r3, #2 - 8002f4e: 693a ldr r2, [r7, #16] - 8002f50: 4313 orrs r3, r2 - 8002f52: 613b str r3, [r7, #16] + /* The FIFO threshold is not used when the FIFO mode is disabled */ + if(hdma->Init.FIFOMode == DMA_FIFOMODE_ENABLE) + 8004c46: 687b ldr r3, [r7, #4] + 8004c48: 6a5b ldr r3, [r3, #36] ; 0x24 + 8004c4a: 2b04 cmp r3, #4 + 8004c4c: d117 bne.n 8004c7e + { + /* Get the FIFO threshold */ + tmp |= hdma->Init.FIFOThreshold; + 8004c4e: 687b ldr r3, [r7, #4] + 8004c50: 6a9b ldr r3, [r3, #40] ; 0x28 + 8004c52: 697a ldr r2, [r7, #20] + 8004c54: 4313 orrs r3, r2 + 8004c56: 617b str r3, [r7, #20] + + /* Check compatibility between FIFO threshold level and size of the memory burst */ + /* for INCR4, INCR8, INCR16 bursts */ + if (hdma->Init.MemBurst != DMA_MBURST_SINGLE) + 8004c58: 687b ldr r3, [r7, #4] + 8004c5a: 6adb ldr r3, [r3, #44] ; 0x2c + 8004c5c: 2b00 cmp r3, #0 + 8004c5e: d00e beq.n 8004c7e + { + if (DMA_CheckFifoParam(hdma) != HAL_OK) + 8004c60: 6878 ldr r0, [r7, #4] + 8004c62: f000 fa99 bl 8005198 + 8004c66: 4603 mov r3, r0 + 8004c68: 2b00 cmp r3, #0 + 8004c6a: d008 beq.n 8004c7e + { + /* Update error code */ + hdma->ErrorCode = HAL_DMA_ERROR_PARAM; + 8004c6c: 687b ldr r3, [r7, #4] + 8004c6e: 2240 movs r2, #64 ; 0x40 + 8004c70: 655a str r2, [r3, #84] ; 0x54 + + /* Change the DMA state */ + hdma->State = HAL_DMA_STATE_READY; + 8004c72: 687b ldr r3, [r7, #4] + 8004c74: 2201 movs r2, #1 + 8004c76: f883 2035 strb.w r2, [r3, #53] ; 0x35 + + return HAL_ERROR; + 8004c7a: 2301 movs r3, #1 + 8004c7c: e016 b.n 8004cac + } + } } + + /* Write to DMA Stream FCR */ + hdma->Instance->FCR = tmp; + 8004c7e: 687b ldr r3, [r7, #4] + 8004c80: 681b ldr r3, [r3, #0] + 8004c82: 697a ldr r2, [r7, #20] + 8004c84: 615a str r2, [r3, #20] - /* Write to TIMx CR2 */ - TIMx->CR2 = tmpcr2; - 8002f54: 687b ldr r3, [r7, #4] - 8002f56: 693a ldr r2, [r7, #16] - 8002f58: 605a str r2, [r3, #4] - - /* Write to TIMx CCMR1 */ - TIMx->CCMR1 = tmpccmrx; - 8002f5a: 687b ldr r3, [r7, #4] - 8002f5c: 68fa ldr r2, [r7, #12] - 8002f5e: 619a str r2, [r3, #24] + /* Initialize StreamBaseAddress and StreamIndex parameters to be used to calculate + DMA steam Base Address needed by HAL_DMA_IRQHandler() and HAL_DMA_PollForTransfer() */ + regs = (DMA_Base_Registers *)DMA_CalcBaseAndBitshift(hdma); + 8004c86: 6878 ldr r0, [r7, #4] + 8004c88: f000 fa50 bl 800512c + 8004c8c: 4603 mov r3, r0 + 8004c8e: 60fb str r3, [r7, #12] + + /* Clear all interrupt flags */ + regs->IFCR = 0x3FU << hdma->StreamIndex; + 8004c90: 687b ldr r3, [r7, #4] + 8004c92: 6ddb ldr r3, [r3, #92] ; 0x5c + 8004c94: 223f movs r2, #63 ; 0x3f + 8004c96: 409a lsls r2, r3 + 8004c98: 68fb ldr r3, [r7, #12] + 8004c9a: 609a str r2, [r3, #8] - /* Set the Capture Compare Register value */ - TIMx->CCR2 = OC_Config->Pulse; - 8002f60: 683b ldr r3, [r7, #0] - 8002f62: 685a ldr r2, [r3, #4] - 8002f64: 687b ldr r3, [r7, #4] - 8002f66: 639a str r2, [r3, #56] ; 0x38 + /* Initialize the error code */ + hdma->ErrorCode = HAL_DMA_ERROR_NONE; + 8004c9c: 687b ldr r3, [r7, #4] + 8004c9e: 2200 movs r2, #0 + 8004ca0: 655a str r2, [r3, #84] ; 0x54 + + /* Initialize the DMA state */ + hdma->State = HAL_DMA_STATE_READY; + 8004ca2: 687b ldr r3, [r7, #4] + 8004ca4: 2201 movs r2, #1 + 8004ca6: f883 2035 strb.w r2, [r3, #53] ; 0x35 - /* Write to TIMx CCER */ - TIMx->CCER = tmpccer; - 8002f68: 687b ldr r3, [r7, #4] - 8002f6a: 697a ldr r2, [r7, #20] - 8002f6c: 621a str r2, [r3, #32] + return HAL_OK; + 8004caa: 2300 movs r3, #0 } - 8002f6e: bf00 nop - 8002f70: 371c adds r7, #28 - 8002f72: 46bd mov sp, r7 - 8002f74: f85d 7b04 ldr.w r7, [sp], #4 - 8002f78: 4770 bx lr - 8002f7a: bf00 nop - 8002f7c: feff8fff .word 0xfeff8fff - 8002f80: 40010000 .word 0x40010000 - 8002f84: 40010400 .word 0x40010400 - -08002f88 : - * @param TIMx to select the TIM peripheral - * @param OC_Config The ouput configuration structure - * @retval None + 8004cac: 4618 mov r0, r3 + 8004cae: 3718 adds r7, #24 + 8004cb0: 46bd mov sp, r7 + 8004cb2: bd80 pop {r7, pc} + 8004cb4: e010803f .word 0xe010803f + +08004cb8 : + * @param DstAddress The destination memory Buffer address + * @param DataLength The length of data to be transferred from source to destination + * @retval HAL status */ -static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config) +HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) { - 8002f88: b480 push {r7} - 8002f8a: b087 sub sp, #28 - 8002f8c: af00 add r7, sp, #0 - 8002f8e: 6078 str r0, [r7, #4] - 8002f90: 6039 str r1, [r7, #0] - uint32_t tmpccmrx; - uint32_t tmpccer; - uint32_t tmpcr2; - - /* Disable the Channel 3: Reset the CC2E Bit */ - TIMx->CCER &= ~TIM_CCER_CC3E; - 8002f92: 687b ldr r3, [r7, #4] - 8002f94: 6a1b ldr r3, [r3, #32] - 8002f96: f423 7280 bic.w r2, r3, #256 ; 0x100 - 8002f9a: 687b ldr r3, [r7, #4] - 8002f9c: 621a str r2, [r3, #32] - - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; - 8002f9e: 687b ldr r3, [r7, #4] - 8002fa0: 6a1b ldr r3, [r3, #32] - 8002fa2: 617b str r3, [r7, #20] - /* Get the TIMx CR2 register value */ - tmpcr2 = TIMx->CR2; - 8002fa4: 687b ldr r3, [r7, #4] - 8002fa6: 685b ldr r3, [r3, #4] - 8002fa8: 613b str r3, [r7, #16] - - /* Get the TIMx CCMR2 register value */ - tmpccmrx = TIMx->CCMR2; - 8002faa: 687b ldr r3, [r7, #4] - 8002fac: 69db ldr r3, [r3, #28] - 8002fae: 60fb str r3, [r7, #12] - - /* Reset the Output Compare mode and Capture/Compare selection Bits */ - tmpccmrx &= ~TIM_CCMR2_OC3M; - 8002fb0: 68fa ldr r2, [r7, #12] - 8002fb2: 4b2d ldr r3, [pc, #180] ; (8003068 ) - 8002fb4: 4013 ands r3, r2 - 8002fb6: 60fb str r3, [r7, #12] - tmpccmrx &= ~TIM_CCMR2_CC3S; - 8002fb8: 68fb ldr r3, [r7, #12] - 8002fba: f023 0303 bic.w r3, r3, #3 - 8002fbe: 60fb str r3, [r7, #12] - /* Select the Output Compare Mode */ - tmpccmrx |= OC_Config->OCMode; - 8002fc0: 683b ldr r3, [r7, #0] - 8002fc2: 681b ldr r3, [r3, #0] - 8002fc4: 68fa ldr r2, [r7, #12] - 8002fc6: 4313 orrs r3, r2 - 8002fc8: 60fb str r3, [r7, #12] - - /* Reset the Output Polarity level */ - tmpccer &= ~TIM_CCER_CC3P; - 8002fca: 697b ldr r3, [r7, #20] - 8002fcc: f423 7300 bic.w r3, r3, #512 ; 0x200 - 8002fd0: 617b str r3, [r7, #20] - /* Set the Output Compare Polarity */ - tmpccer |= (OC_Config->OCPolarity << 8U); - 8002fd2: 683b ldr r3, [r7, #0] - 8002fd4: 689b ldr r3, [r3, #8] - 8002fd6: 021b lsls r3, r3, #8 - 8002fd8: 697a ldr r2, [r7, #20] - 8002fda: 4313 orrs r3, r2 - 8002fdc: 617b str r3, [r7, #20] + 8004cb8: b580 push {r7, lr} + 8004cba: b086 sub sp, #24 + 8004cbc: af00 add r7, sp, #0 + 8004cbe: 60f8 str r0, [r7, #12] + 8004cc0: 60b9 str r1, [r7, #8] + 8004cc2: 607a str r2, [r7, #4] + 8004cc4: 603b str r3, [r7, #0] + HAL_StatusTypeDef status = HAL_OK; + 8004cc6: 2300 movs r3, #0 + 8004cc8: 75fb strb r3, [r7, #23] - if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_3)) - 8002fde: 687b ldr r3, [r7, #4] - 8002fe0: 4a22 ldr r2, [pc, #136] ; (800306c ) - 8002fe2: 4293 cmp r3, r2 - 8002fe4: d003 beq.n 8002fee - 8002fe6: 687b ldr r3, [r7, #4] - 8002fe8: 4a21 ldr r2, [pc, #132] ; (8003070 ) - 8002fea: 4293 cmp r3, r2 - 8002fec: d10d bne.n 800300a + /* calculate DMA base and stream number */ + DMA_Base_Registers *regs = (DMA_Base_Registers *)hdma->StreamBaseAddress; + 8004cca: 68fb ldr r3, [r7, #12] + 8004ccc: 6d9b ldr r3, [r3, #88] ; 0x58 + 8004cce: 613b str r3, [r7, #16] + + /* Check the parameters */ + assert_param(IS_DMA_BUFFER_SIZE(DataLength)); + + /* Process locked */ + __HAL_LOCK(hdma); + 8004cd0: 68fb ldr r3, [r7, #12] + 8004cd2: f893 3034 ldrb.w r3, [r3, #52] ; 0x34 + 8004cd6: 2b01 cmp r3, #1 + 8004cd8: d101 bne.n 8004cde + 8004cda: 2302 movs r3, #2 + 8004cdc: e048 b.n 8004d70 + 8004cde: 68fb ldr r3, [r7, #12] + 8004ce0: 2201 movs r2, #1 + 8004ce2: f883 2034 strb.w r2, [r3, #52] ; 0x34 + + if(HAL_DMA_STATE_READY == hdma->State) + 8004ce6: 68fb ldr r3, [r7, #12] + 8004ce8: f893 3035 ldrb.w r3, [r3, #53] ; 0x35 + 8004cec: b2db uxtb r3, r3 + 8004cee: 2b01 cmp r3, #1 + 8004cf0: d137 bne.n 8004d62 { - assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); - - /* Reset the Output N Polarity level */ - tmpccer &= ~TIM_CCER_CC3NP; - 8002fee: 697b ldr r3, [r7, #20] - 8002ff0: f423 6300 bic.w r3, r3, #2048 ; 0x800 - 8002ff4: 617b str r3, [r7, #20] - /* Set the Output N Polarity */ - tmpccer |= (OC_Config->OCNPolarity << 8U); - 8002ff6: 683b ldr r3, [r7, #0] - 8002ff8: 68db ldr r3, [r3, #12] - 8002ffa: 021b lsls r3, r3, #8 - 8002ffc: 697a ldr r2, [r7, #20] - 8002ffe: 4313 orrs r3, r2 - 8003000: 617b str r3, [r7, #20] - /* Reset the Output N State */ - tmpccer &= ~TIM_CCER_CC3NE; - 8003002: 697b ldr r3, [r7, #20] - 8003004: f423 6380 bic.w r3, r3, #1024 ; 0x400 - 8003008: 617b str r3, [r7, #20] + /* Change DMA peripheral state */ + hdma->State = HAL_DMA_STATE_BUSY; + 8004cf2: 68fb ldr r3, [r7, #12] + 8004cf4: 2202 movs r2, #2 + 8004cf6: f883 2035 strb.w r2, [r3, #53] ; 0x35 + + /* Initialize the error code */ + hdma->ErrorCode = HAL_DMA_ERROR_NONE; + 8004cfa: 68fb ldr r3, [r7, #12] + 8004cfc: 2200 movs r2, #0 + 8004cfe: 655a str r2, [r3, #84] ; 0x54 + + /* Configure the source, destination address and the data length */ + DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength); + 8004d00: 683b ldr r3, [r7, #0] + 8004d02: 687a ldr r2, [r7, #4] + 8004d04: 68b9 ldr r1, [r7, #8] + 8004d06: 68f8 ldr r0, [r7, #12] + 8004d08: f000 f9e2 bl 80050d0 + + /* Clear all interrupt flags at correct offset within the register */ + regs->IFCR = 0x3FU << hdma->StreamIndex; + 8004d0c: 68fb ldr r3, [r7, #12] + 8004d0e: 6ddb ldr r3, [r3, #92] ; 0x5c + 8004d10: 223f movs r2, #63 ; 0x3f + 8004d12: 409a lsls r2, r3 + 8004d14: 693b ldr r3, [r7, #16] + 8004d16: 609a str r2, [r3, #8] + + /* Enable Common interrupts*/ + hdma->Instance->CR |= DMA_IT_TC | DMA_IT_TE | DMA_IT_DME; + 8004d18: 68fb ldr r3, [r7, #12] + 8004d1a: 681b ldr r3, [r3, #0] + 8004d1c: 681a ldr r2, [r3, #0] + 8004d1e: 68fb ldr r3, [r7, #12] + 8004d20: 681b ldr r3, [r3, #0] + 8004d22: f042 0216 orr.w r2, r2, #22 + 8004d26: 601a str r2, [r3, #0] + hdma->Instance->FCR |= DMA_IT_FE; + 8004d28: 68fb ldr r3, [r7, #12] + 8004d2a: 681b ldr r3, [r3, #0] + 8004d2c: 695a ldr r2, [r3, #20] + 8004d2e: 68fb ldr r3, [r7, #12] + 8004d30: 681b ldr r3, [r3, #0] + 8004d32: f042 0280 orr.w r2, r2, #128 ; 0x80 + 8004d36: 615a str r2, [r3, #20] + + if(hdma->XferHalfCpltCallback != NULL) + 8004d38: 68fb ldr r3, [r7, #12] + 8004d3a: 6c1b ldr r3, [r3, #64] ; 0x40 + 8004d3c: 2b00 cmp r3, #0 + 8004d3e: d007 beq.n 8004d50 + { + hdma->Instance->CR |= DMA_IT_HT; + 8004d40: 68fb ldr r3, [r7, #12] + 8004d42: 681b ldr r3, [r3, #0] + 8004d44: 681a ldr r2, [r3, #0] + 8004d46: 68fb ldr r3, [r7, #12] + 8004d48: 681b ldr r3, [r3, #0] + 8004d4a: f042 0208 orr.w r2, r2, #8 + 8004d4e: 601a str r2, [r3, #0] + } + + /* Enable the Peripheral */ + __HAL_DMA_ENABLE(hdma); + 8004d50: 68fb ldr r3, [r7, #12] + 8004d52: 681b ldr r3, [r3, #0] + 8004d54: 681a ldr r2, [r3, #0] + 8004d56: 68fb ldr r3, [r7, #12] + 8004d58: 681b ldr r3, [r3, #0] + 8004d5a: f042 0201 orr.w r2, r2, #1 + 8004d5e: 601a str r2, [r3, #0] + 8004d60: e005 b.n 8004d6e } + else + { + /* Process unlocked */ + __HAL_UNLOCK(hdma); + 8004d62: 68fb ldr r3, [r7, #12] + 8004d64: 2200 movs r2, #0 + 8004d66: f883 2034 strb.w r2, [r3, #52] ; 0x34 + + /* Return error status */ + status = HAL_BUSY; + 8004d6a: 2302 movs r3, #2 + 8004d6c: 75fb strb r3, [r7, #23] + } + + return status; + 8004d6e: 7dfb ldrb r3, [r7, #23] +} + 8004d70: 4618 mov r0, r3 + 8004d72: 3718 adds r7, #24 + 8004d74: 46bd mov sp, r7 + 8004d76: bd80 pop {r7, pc} - if (IS_TIM_BREAK_INSTANCE(TIMx)) - 800300a: 687b ldr r3, [r7, #4] - 800300c: 4a17 ldr r2, [pc, #92] ; (800306c ) - 800300e: 4293 cmp r3, r2 - 8003010: d003 beq.n 800301a - 8003012: 687b ldr r3, [r7, #4] - 8003014: 4a16 ldr r2, [pc, #88] ; (8003070 ) - 8003016: 4293 cmp r3, r2 - 8003018: d113 bne.n 8003042 - /* Check parameters */ - assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); - assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); - - /* Reset the Output Compare and Output Compare N IDLE State */ - tmpcr2 &= ~TIM_CR2_OIS3; - 800301a: 693b ldr r3, [r7, #16] - 800301c: f423 5380 bic.w r3, r3, #4096 ; 0x1000 - 8003020: 613b str r3, [r7, #16] - tmpcr2 &= ~TIM_CR2_OIS3N; - 8003022: 693b ldr r3, [r7, #16] - 8003024: f423 5300 bic.w r3, r3, #8192 ; 0x2000 - 8003028: 613b str r3, [r7, #16] - /* Set the Output Idle state */ - tmpcr2 |= (OC_Config->OCIdleState << 4U); - 800302a: 683b ldr r3, [r7, #0] - 800302c: 695b ldr r3, [r3, #20] - 800302e: 011b lsls r3, r3, #4 - 8003030: 693a ldr r2, [r7, #16] - 8003032: 4313 orrs r3, r2 - 8003034: 613b str r3, [r7, #16] - /* Set the Output N Idle state */ - tmpcr2 |= (OC_Config->OCNIdleState << 4U); - 8003036: 683b ldr r3, [r7, #0] - 8003038: 699b ldr r3, [r3, #24] - 800303a: 011b lsls r3, r3, #4 - 800303c: 693a ldr r2, [r7, #16] - 800303e: 4313 orrs r3, r2 - 8003040: 613b str r3, [r7, #16] +08004d78 : + * @param hdma pointer to a DMA_HandleTypeDef structure that contains + * the configuration information for the specified DMA Stream. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma) +{ + 8004d78: b480 push {r7} + 8004d7a: b083 sub sp, #12 + 8004d7c: af00 add r7, sp, #0 + 8004d7e: 6078 str r0, [r7, #4] + if(hdma->State != HAL_DMA_STATE_BUSY) + 8004d80: 687b ldr r3, [r7, #4] + 8004d82: f893 3035 ldrb.w r3, [r3, #53] ; 0x35 + 8004d86: b2db uxtb r3, r3 + 8004d88: 2b02 cmp r3, #2 + 8004d8a: d004 beq.n 8004d96 + { + hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; + 8004d8c: 687b ldr r3, [r7, #4] + 8004d8e: 2280 movs r2, #128 ; 0x80 + 8004d90: 655a str r2, [r3, #84] ; 0x54 + return HAL_ERROR; + 8004d92: 2301 movs r3, #1 + 8004d94: e00c b.n 8004db0 + } + else + { + /* Set Abort State */ + hdma->State = HAL_DMA_STATE_ABORT; + 8004d96: 687b ldr r3, [r7, #4] + 8004d98: 2205 movs r2, #5 + 8004d9a: f883 2035 strb.w r2, [r3, #53] ; 0x35 + + /* Disable the stream */ + __HAL_DMA_DISABLE(hdma); + 8004d9e: 687b ldr r3, [r7, #4] + 8004da0: 681b ldr r3, [r3, #0] + 8004da2: 681a ldr r2, [r3, #0] + 8004da4: 687b ldr r3, [r7, #4] + 8004da6: 681b ldr r3, [r3, #0] + 8004da8: f022 0201 bic.w r2, r2, #1 + 8004dac: 601a str r2, [r3, #0] } - /* Write to TIMx CR2 */ - TIMx->CR2 = tmpcr2; - 8003042: 687b ldr r3, [r7, #4] - 8003044: 693a ldr r2, [r7, #16] - 8003046: 605a str r2, [r3, #4] - - /* Write to TIMx CCMR2 */ - TIMx->CCMR2 = tmpccmrx; - 8003048: 687b ldr r3, [r7, #4] - 800304a: 68fa ldr r2, [r7, #12] - 800304c: 61da str r2, [r3, #28] - - /* Set the Capture Compare Register value */ - TIMx->CCR3 = OC_Config->Pulse; - 800304e: 683b ldr r3, [r7, #0] - 8003050: 685a ldr r2, [r3, #4] - 8003052: 687b ldr r3, [r7, #4] - 8003054: 63da str r2, [r3, #60] ; 0x3c - - /* Write to TIMx CCER */ - TIMx->CCER = tmpccer; - 8003056: 687b ldr r3, [r7, #4] - 8003058: 697a ldr r2, [r7, #20] - 800305a: 621a str r2, [r3, #32] + return HAL_OK; + 8004dae: 2300 movs r3, #0 } - 800305c: bf00 nop - 800305e: 371c adds r7, #28 - 8003060: 46bd mov sp, r7 - 8003062: f85d 7b04 ldr.w r7, [sp], #4 - 8003066: 4770 bx lr - 8003068: fffeff8f .word 0xfffeff8f - 800306c: 40010000 .word 0x40010000 - 8003070: 40010400 .word 0x40010400 - -08003074 : - * @param TIMx to select the TIM peripheral - * @param OC_Config The ouput configuration structure + 8004db0: 4618 mov r0, r3 + 8004db2: 370c adds r7, #12 + 8004db4: 46bd mov sp, r7 + 8004db6: f85d 7b04 ldr.w r7, [sp], #4 + 8004dba: 4770 bx lr + +08004dbc : + * @param hdma pointer to a DMA_HandleTypeDef structure that contains + * the configuration information for the specified DMA Stream. * @retval None */ -static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config) +void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma) { - 8003074: b480 push {r7} - 8003076: b087 sub sp, #28 - 8003078: af00 add r7, sp, #0 - 800307a: 6078 str r0, [r7, #4] - 800307c: 6039 str r1, [r7, #0] - uint32_t tmpccmrx; - uint32_t tmpccer; - uint32_t tmpcr2; - - /* Disable the Channel 4: Reset the CC4E Bit */ - TIMx->CCER &= ~TIM_CCER_CC4E; - 800307e: 687b ldr r3, [r7, #4] - 8003080: 6a1b ldr r3, [r3, #32] - 8003082: f423 5280 bic.w r2, r3, #4096 ; 0x1000 - 8003086: 687b ldr r3, [r7, #4] - 8003088: 621a str r2, [r3, #32] - - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; - 800308a: 687b ldr r3, [r7, #4] - 800308c: 6a1b ldr r3, [r3, #32] - 800308e: 613b str r3, [r7, #16] - /* Get the TIMx CR2 register value */ - tmpcr2 = TIMx->CR2; - 8003090: 687b ldr r3, [r7, #4] - 8003092: 685b ldr r3, [r3, #4] - 8003094: 617b str r3, [r7, #20] - - /* Get the TIMx CCMR2 register value */ - tmpccmrx = TIMx->CCMR2; - 8003096: 687b ldr r3, [r7, #4] - 8003098: 69db ldr r3, [r3, #28] - 800309a: 60fb str r3, [r7, #12] - - /* Reset the Output Compare mode and Capture/Compare selection Bits */ - tmpccmrx &= ~TIM_CCMR2_OC4M; - 800309c: 68fa ldr r2, [r7, #12] - 800309e: 4b1e ldr r3, [pc, #120] ; (8003118 ) - 80030a0: 4013 ands r3, r2 - 80030a2: 60fb str r3, [r7, #12] - tmpccmrx &= ~TIM_CCMR2_CC4S; - 80030a4: 68fb ldr r3, [r7, #12] - 80030a6: f423 7340 bic.w r3, r3, #768 ; 0x300 - 80030aa: 60fb str r3, [r7, #12] + 8004dbc: b580 push {r7, lr} + 8004dbe: b086 sub sp, #24 + 8004dc0: af00 add r7, sp, #0 + 8004dc2: 6078 str r0, [r7, #4] + uint32_t tmpisr; + __IO uint32_t count = 0; + 8004dc4: 2300 movs r3, #0 + 8004dc6: 60bb str r3, [r7, #8] + uint32_t timeout = SystemCoreClock / 9600; + 8004dc8: 4b92 ldr r3, [pc, #584] ; (8005014 ) + 8004dca: 681b ldr r3, [r3, #0] + 8004dcc: 4a92 ldr r2, [pc, #584] ; (8005018 ) + 8004dce: fba2 2303 umull r2, r3, r2, r3 + 8004dd2: 0a9b lsrs r3, r3, #10 + 8004dd4: 617b str r3, [r7, #20] - /* Select the Output Compare Mode */ - tmpccmrx |= (OC_Config->OCMode << 8U); - 80030ac: 683b ldr r3, [r7, #0] - 80030ae: 681b ldr r3, [r3, #0] - 80030b0: 021b lsls r3, r3, #8 - 80030b2: 68fa ldr r2, [r7, #12] - 80030b4: 4313 orrs r3, r2 - 80030b6: 60fb str r3, [r7, #12] + /* calculate DMA base and stream number */ + DMA_Base_Registers *regs = (DMA_Base_Registers *)hdma->StreamBaseAddress; + 8004dd6: 687b ldr r3, [r7, #4] + 8004dd8: 6d9b ldr r3, [r3, #88] ; 0x58 + 8004dda: 613b str r3, [r7, #16] - /* Reset the Output Polarity level */ - tmpccer &= ~TIM_CCER_CC4P; - 80030b8: 693b ldr r3, [r7, #16] - 80030ba: f423 5300 bic.w r3, r3, #8192 ; 0x2000 - 80030be: 613b str r3, [r7, #16] - /* Set the Output Compare Polarity */ - tmpccer |= (OC_Config->OCPolarity << 12U); - 80030c0: 683b ldr r3, [r7, #0] - 80030c2: 689b ldr r3, [r3, #8] - 80030c4: 031b lsls r3, r3, #12 - 80030c6: 693a ldr r2, [r7, #16] - 80030c8: 4313 orrs r3, r2 - 80030ca: 613b str r3, [r7, #16] + tmpisr = regs->ISR; + 8004ddc: 693b ldr r3, [r7, #16] + 8004dde: 681b ldr r3, [r3, #0] + 8004de0: 60fb str r3, [r7, #12] - if (IS_TIM_BREAK_INSTANCE(TIMx)) - 80030cc: 687b ldr r3, [r7, #4] - 80030ce: 4a13 ldr r2, [pc, #76] ; (800311c ) - 80030d0: 4293 cmp r3, r2 - 80030d2: d003 beq.n 80030dc - 80030d4: 687b ldr r3, [r7, #4] - 80030d6: 4a12 ldr r2, [pc, #72] ; (8003120 ) - 80030d8: 4293 cmp r3, r2 - 80030da: d109 bne.n 80030f0 + /* Transfer Error Interrupt management ***************************************/ + if ((tmpisr & (DMA_FLAG_TEIF0_4 << hdma->StreamIndex)) != RESET) + 8004de2: 687b ldr r3, [r7, #4] + 8004de4: 6ddb ldr r3, [r3, #92] ; 0x5c + 8004de6: 2208 movs r2, #8 + 8004de8: 409a lsls r2, r3 + 8004dea: 68fb ldr r3, [r7, #12] + 8004dec: 4013 ands r3, r2 + 8004dee: 2b00 cmp r3, #0 + 8004df0: d01a beq.n 8004e28 { - /* Check parameters */ - assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); - - /* Reset the Output Compare IDLE State */ - tmpcr2 &= ~TIM_CR2_OIS4; - 80030dc: 697b ldr r3, [r7, #20] - 80030de: f423 4380 bic.w r3, r3, #16384 ; 0x4000 - 80030e2: 617b str r3, [r7, #20] - - /* Set the Output Idle state */ - tmpcr2 |= (OC_Config->OCIdleState << 6U); - 80030e4: 683b ldr r3, [r7, #0] - 80030e6: 695b ldr r3, [r3, #20] - 80030e8: 019b lsls r3, r3, #6 - 80030ea: 697a ldr r2, [r7, #20] - 80030ec: 4313 orrs r3, r2 - 80030ee: 617b str r3, [r7, #20] + if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TE) != RESET) + 8004df2: 687b ldr r3, [r7, #4] + 8004df4: 681b ldr r3, [r3, #0] + 8004df6: 681b ldr r3, [r3, #0] + 8004df8: f003 0304 and.w r3, r3, #4 + 8004dfc: 2b00 cmp r3, #0 + 8004dfe: d013 beq.n 8004e28 + { + /* Disable the transfer error interrupt */ + hdma->Instance->CR &= ~(DMA_IT_TE); + 8004e00: 687b ldr r3, [r7, #4] + 8004e02: 681b ldr r3, [r3, #0] + 8004e04: 681a ldr r2, [r3, #0] + 8004e06: 687b ldr r3, [r7, #4] + 8004e08: 681b ldr r3, [r3, #0] + 8004e0a: f022 0204 bic.w r2, r2, #4 + 8004e0e: 601a str r2, [r3, #0] + + /* Clear the transfer error flag */ + regs->IFCR = DMA_FLAG_TEIF0_4 << hdma->StreamIndex; + 8004e10: 687b ldr r3, [r7, #4] + 8004e12: 6ddb ldr r3, [r3, #92] ; 0x5c + 8004e14: 2208 movs r2, #8 + 8004e16: 409a lsls r2, r3 + 8004e18: 693b ldr r3, [r7, #16] + 8004e1a: 609a str r2, [r3, #8] + + /* Update error code */ + hdma->ErrorCode |= HAL_DMA_ERROR_TE; + 8004e1c: 687b ldr r3, [r7, #4] + 8004e1e: 6d5b ldr r3, [r3, #84] ; 0x54 + 8004e20: f043 0201 orr.w r2, r3, #1 + 8004e24: 687b ldr r3, [r7, #4] + 8004e26: 655a str r2, [r3, #84] ; 0x54 + } } + /* FIFO Error Interrupt management ******************************************/ + if ((tmpisr & (DMA_FLAG_FEIF0_4 << hdma->StreamIndex)) != RESET) + 8004e28: 687b ldr r3, [r7, #4] + 8004e2a: 6ddb ldr r3, [r3, #92] ; 0x5c + 8004e2c: 2201 movs r2, #1 + 8004e2e: 409a lsls r2, r3 + 8004e30: 68fb ldr r3, [r7, #12] + 8004e32: 4013 ands r3, r2 + 8004e34: 2b00 cmp r3, #0 + 8004e36: d012 beq.n 8004e5e + { + if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_FE) != RESET) + 8004e38: 687b ldr r3, [r7, #4] + 8004e3a: 681b ldr r3, [r3, #0] + 8004e3c: 695b ldr r3, [r3, #20] + 8004e3e: f003 0380 and.w r3, r3, #128 ; 0x80 + 8004e42: 2b00 cmp r3, #0 + 8004e44: d00b beq.n 8004e5e + { + /* Clear the FIFO error flag */ + regs->IFCR = DMA_FLAG_FEIF0_4 << hdma->StreamIndex; + 8004e46: 687b ldr r3, [r7, #4] + 8004e48: 6ddb ldr r3, [r3, #92] ; 0x5c + 8004e4a: 2201 movs r2, #1 + 8004e4c: 409a lsls r2, r3 + 8004e4e: 693b ldr r3, [r7, #16] + 8004e50: 609a str r2, [r3, #8] - /* Write to TIMx CR2 */ - TIMx->CR2 = tmpcr2; - 80030f0: 687b ldr r3, [r7, #4] - 80030f2: 697a ldr r2, [r7, #20] - 80030f4: 605a str r2, [r3, #4] - - /* Write to TIMx CCMR2 */ - TIMx->CCMR2 = tmpccmrx; - 80030f6: 687b ldr r3, [r7, #4] - 80030f8: 68fa ldr r2, [r7, #12] - 80030fa: 61da str r2, [r3, #28] - - /* Set the Capture Compare Register value */ - TIMx->CCR4 = OC_Config->Pulse; - 80030fc: 683b ldr r3, [r7, #0] - 80030fe: 685a ldr r2, [r3, #4] - 8003100: 687b ldr r3, [r7, #4] - 8003102: 641a str r2, [r3, #64] ; 0x40 + /* Update error code */ + hdma->ErrorCode |= HAL_DMA_ERROR_FE; + 8004e52: 687b ldr r3, [r7, #4] + 8004e54: 6d5b ldr r3, [r3, #84] ; 0x54 + 8004e56: f043 0202 orr.w r2, r3, #2 + 8004e5a: 687b ldr r3, [r7, #4] + 8004e5c: 655a str r2, [r3, #84] ; 0x54 + } + } + /* Direct Mode Error Interrupt management ***********************************/ + if ((tmpisr & (DMA_FLAG_DMEIF0_4 << hdma->StreamIndex)) != RESET) + 8004e5e: 687b ldr r3, [r7, #4] + 8004e60: 6ddb ldr r3, [r3, #92] ; 0x5c + 8004e62: 2204 movs r2, #4 + 8004e64: 409a lsls r2, r3 + 8004e66: 68fb ldr r3, [r7, #12] + 8004e68: 4013 ands r3, r2 + 8004e6a: 2b00 cmp r3, #0 + 8004e6c: d012 beq.n 8004e94 + { + if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_DME) != RESET) + 8004e6e: 687b ldr r3, [r7, #4] + 8004e70: 681b ldr r3, [r3, #0] + 8004e72: 681b ldr r3, [r3, #0] + 8004e74: f003 0302 and.w r3, r3, #2 + 8004e78: 2b00 cmp r3, #0 + 8004e7a: d00b beq.n 8004e94 + { + /* Clear the direct mode error flag */ + regs->IFCR = DMA_FLAG_DMEIF0_4 << hdma->StreamIndex; + 8004e7c: 687b ldr r3, [r7, #4] + 8004e7e: 6ddb ldr r3, [r3, #92] ; 0x5c + 8004e80: 2204 movs r2, #4 + 8004e82: 409a lsls r2, r3 + 8004e84: 693b ldr r3, [r7, #16] + 8004e86: 609a str r2, [r3, #8] - /* Write to TIMx CCER */ - TIMx->CCER = tmpccer; - 8003104: 687b ldr r3, [r7, #4] - 8003106: 693a ldr r2, [r7, #16] - 8003108: 621a str r2, [r3, #32] -} - 800310a: bf00 nop - 800310c: 371c adds r7, #28 - 800310e: 46bd mov sp, r7 - 8003110: f85d 7b04 ldr.w r7, [sp], #4 - 8003114: 4770 bx lr - 8003116: bf00 nop - 8003118: feff8fff .word 0xfeff8fff - 800311c: 40010000 .word 0x40010000 - 8003120: 40010400 .word 0x40010400 - -08003124 : - * @param OC_Config The ouput configuration structure - * @retval None - */ -static void TIM_OC5_SetConfig(TIM_TypeDef *TIMx, - TIM_OC_InitTypeDef *OC_Config) -{ - 8003124: b480 push {r7} - 8003126: b087 sub sp, #28 - 8003128: af00 add r7, sp, #0 - 800312a: 6078 str r0, [r7, #4] - 800312c: 6039 str r1, [r7, #0] - uint32_t tmpccmrx; - uint32_t tmpccer; - uint32_t tmpcr2; + /* Update error code */ + hdma->ErrorCode |= HAL_DMA_ERROR_DME; + 8004e88: 687b ldr r3, [r7, #4] + 8004e8a: 6d5b ldr r3, [r3, #84] ; 0x54 + 8004e8c: f043 0204 orr.w r2, r3, #4 + 8004e90: 687b ldr r3, [r7, #4] + 8004e92: 655a str r2, [r3, #84] ; 0x54 + } + } + /* Half Transfer Complete Interrupt management ******************************/ + if ((tmpisr & (DMA_FLAG_HTIF0_4 << hdma->StreamIndex)) != RESET) + 8004e94: 687b ldr r3, [r7, #4] + 8004e96: 6ddb ldr r3, [r3, #92] ; 0x5c + 8004e98: 2210 movs r2, #16 + 8004e9a: 409a lsls r2, r3 + 8004e9c: 68fb ldr r3, [r7, #12] + 8004e9e: 4013 ands r3, r2 + 8004ea0: 2b00 cmp r3, #0 + 8004ea2: d043 beq.n 8004f2c + { + if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_HT) != RESET) + 8004ea4: 687b ldr r3, [r7, #4] + 8004ea6: 681b ldr r3, [r3, #0] + 8004ea8: 681b ldr r3, [r3, #0] + 8004eaa: f003 0308 and.w r3, r3, #8 + 8004eae: 2b00 cmp r3, #0 + 8004eb0: d03c beq.n 8004f2c + { + /* Clear the half transfer complete flag */ + regs->IFCR = DMA_FLAG_HTIF0_4 << hdma->StreamIndex; + 8004eb2: 687b ldr r3, [r7, #4] + 8004eb4: 6ddb ldr r3, [r3, #92] ; 0x5c + 8004eb6: 2210 movs r2, #16 + 8004eb8: 409a lsls r2, r3 + 8004eba: 693b ldr r3, [r7, #16] + 8004ebc: 609a str r2, [r3, #8] + + /* Multi_Buffering mode enabled */ + if(((hdma->Instance->CR) & (uint32_t)(DMA_SxCR_DBM)) != RESET) + 8004ebe: 687b ldr r3, [r7, #4] + 8004ec0: 681b ldr r3, [r3, #0] + 8004ec2: 681b ldr r3, [r3, #0] + 8004ec4: f403 2380 and.w r3, r3, #262144 ; 0x40000 + 8004ec8: 2b00 cmp r3, #0 + 8004eca: d018 beq.n 8004efe + { + /* Current memory buffer used is Memory 0 */ + if((hdma->Instance->CR & DMA_SxCR_CT) == RESET) + 8004ecc: 687b ldr r3, [r7, #4] + 8004ece: 681b ldr r3, [r3, #0] + 8004ed0: 681b ldr r3, [r3, #0] + 8004ed2: f403 2300 and.w r3, r3, #524288 ; 0x80000 + 8004ed6: 2b00 cmp r3, #0 + 8004ed8: d108 bne.n 8004eec + { + if(hdma->XferHalfCpltCallback != NULL) + 8004eda: 687b ldr r3, [r7, #4] + 8004edc: 6c1b ldr r3, [r3, #64] ; 0x40 + 8004ede: 2b00 cmp r3, #0 + 8004ee0: d024 beq.n 8004f2c + { + /* Half transfer callback */ + hdma->XferHalfCpltCallback(hdma); + 8004ee2: 687b ldr r3, [r7, #4] + 8004ee4: 6c1b ldr r3, [r3, #64] ; 0x40 + 8004ee6: 6878 ldr r0, [r7, #4] + 8004ee8: 4798 blx r3 + 8004eea: e01f b.n 8004f2c + } + } + /* Current memory buffer used is Memory 1 */ + else + { + if(hdma->XferM1HalfCpltCallback != NULL) + 8004eec: 687b ldr r3, [r7, #4] + 8004eee: 6c9b ldr r3, [r3, #72] ; 0x48 + 8004ef0: 2b00 cmp r3, #0 + 8004ef2: d01b beq.n 8004f2c + { + /* Half transfer callback */ + hdma->XferM1HalfCpltCallback(hdma); + 8004ef4: 687b ldr r3, [r7, #4] + 8004ef6: 6c9b ldr r3, [r3, #72] ; 0x48 + 8004ef8: 6878 ldr r0, [r7, #4] + 8004efa: 4798 blx r3 + 8004efc: e016 b.n 8004f2c + } + } + else + { + /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */ + if((hdma->Instance->CR & DMA_SxCR_CIRC) == RESET) + 8004efe: 687b ldr r3, [r7, #4] + 8004f00: 681b ldr r3, [r3, #0] + 8004f02: 681b ldr r3, [r3, #0] + 8004f04: f403 7380 and.w r3, r3, #256 ; 0x100 + 8004f08: 2b00 cmp r3, #0 + 8004f0a: d107 bne.n 8004f1c + { + /* Disable the half transfer interrupt */ + hdma->Instance->CR &= ~(DMA_IT_HT); + 8004f0c: 687b ldr r3, [r7, #4] + 8004f0e: 681b ldr r3, [r3, #0] + 8004f10: 681a ldr r2, [r3, #0] + 8004f12: 687b ldr r3, [r7, #4] + 8004f14: 681b ldr r3, [r3, #0] + 8004f16: f022 0208 bic.w r2, r2, #8 + 8004f1a: 601a str r2, [r3, #0] + } + + if(hdma->XferHalfCpltCallback != NULL) + 8004f1c: 687b ldr r3, [r7, #4] + 8004f1e: 6c1b ldr r3, [r3, #64] ; 0x40 + 8004f20: 2b00 cmp r3, #0 + 8004f22: d003 beq.n 8004f2c + { + /* Half transfer callback */ + hdma->XferHalfCpltCallback(hdma); + 8004f24: 687b ldr r3, [r7, #4] + 8004f26: 6c1b ldr r3, [r3, #64] ; 0x40 + 8004f28: 6878 ldr r0, [r7, #4] + 8004f2a: 4798 blx r3 + } + } + } + } + /* Transfer Complete Interrupt management ***********************************/ + if ((tmpisr & (DMA_FLAG_TCIF0_4 << hdma->StreamIndex)) != RESET) + 8004f2c: 687b ldr r3, [r7, #4] + 8004f2e: 6ddb ldr r3, [r3, #92] ; 0x5c + 8004f30: 2220 movs r2, #32 + 8004f32: 409a lsls r2, r3 + 8004f34: 68fb ldr r3, [r7, #12] + 8004f36: 4013 ands r3, r2 + 8004f38: 2b00 cmp r3, #0 + 8004f3a: f000 808e beq.w 800505a + { + if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TC) != RESET) + 8004f3e: 687b ldr r3, [r7, #4] + 8004f40: 681b ldr r3, [r3, #0] + 8004f42: 681b ldr r3, [r3, #0] + 8004f44: f003 0310 and.w r3, r3, #16 + 8004f48: 2b00 cmp r3, #0 + 8004f4a: f000 8086 beq.w 800505a + { + /* Clear the transfer complete flag */ + regs->IFCR = DMA_FLAG_TCIF0_4 << hdma->StreamIndex; + 8004f4e: 687b ldr r3, [r7, #4] + 8004f50: 6ddb ldr r3, [r3, #92] ; 0x5c + 8004f52: 2220 movs r2, #32 + 8004f54: 409a lsls r2, r3 + 8004f56: 693b ldr r3, [r7, #16] + 8004f58: 609a str r2, [r3, #8] + + if(HAL_DMA_STATE_ABORT == hdma->State) + 8004f5a: 687b ldr r3, [r7, #4] + 8004f5c: f893 3035 ldrb.w r3, [r3, #53] ; 0x35 + 8004f60: b2db uxtb r3, r3 + 8004f62: 2b05 cmp r3, #5 + 8004f64: d136 bne.n 8004fd4 + { + /* Disable all the transfer interrupts */ + hdma->Instance->CR &= ~(DMA_IT_TC | DMA_IT_TE | DMA_IT_DME); + 8004f66: 687b ldr r3, [r7, #4] + 8004f68: 681b ldr r3, [r3, #0] + 8004f6a: 681a ldr r2, [r3, #0] + 8004f6c: 687b ldr r3, [r7, #4] + 8004f6e: 681b ldr r3, [r3, #0] + 8004f70: f022 0216 bic.w r2, r2, #22 + 8004f74: 601a str r2, [r3, #0] + hdma->Instance->FCR &= ~(DMA_IT_FE); + 8004f76: 687b ldr r3, [r7, #4] + 8004f78: 681b ldr r3, [r3, #0] + 8004f7a: 695a ldr r2, [r3, #20] + 8004f7c: 687b ldr r3, [r7, #4] + 8004f7e: 681b ldr r3, [r3, #0] + 8004f80: f022 0280 bic.w r2, r2, #128 ; 0x80 + 8004f84: 615a str r2, [r3, #20] + + if((hdma->XferHalfCpltCallback != NULL) || (hdma->XferM1HalfCpltCallback != NULL)) + 8004f86: 687b ldr r3, [r7, #4] + 8004f88: 6c1b ldr r3, [r3, #64] ; 0x40 + 8004f8a: 2b00 cmp r3, #0 + 8004f8c: d103 bne.n 8004f96 + 8004f8e: 687b ldr r3, [r7, #4] + 8004f90: 6c9b ldr r3, [r3, #72] ; 0x48 + 8004f92: 2b00 cmp r3, #0 + 8004f94: d007 beq.n 8004fa6 + { + hdma->Instance->CR &= ~(DMA_IT_HT); + 8004f96: 687b ldr r3, [r7, #4] + 8004f98: 681b ldr r3, [r3, #0] + 8004f9a: 681a ldr r2, [r3, #0] + 8004f9c: 687b ldr r3, [r7, #4] + 8004f9e: 681b ldr r3, [r3, #0] + 8004fa0: f022 0208 bic.w r2, r2, #8 + 8004fa4: 601a str r2, [r3, #0] + } - /* Disable the output: Reset the CCxE Bit */ - TIMx->CCER &= ~TIM_CCER_CC5E; - 800312e: 687b ldr r3, [r7, #4] - 8003130: 6a1b ldr r3, [r3, #32] - 8003132: f423 3280 bic.w r2, r3, #65536 ; 0x10000 - 8003136: 687b ldr r3, [r7, #4] - 8003138: 621a str r2, [r3, #32] + /* Clear all interrupt flags at correct offset within the register */ + regs->IFCR = 0x3FU << hdma->StreamIndex; + 8004fa6: 687b ldr r3, [r7, #4] + 8004fa8: 6ddb ldr r3, [r3, #92] ; 0x5c + 8004faa: 223f movs r2, #63 ; 0x3f + 8004fac: 409a lsls r2, r3 + 8004fae: 693b ldr r3, [r7, #16] + 8004fb0: 609a str r2, [r3, #8] - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; - 800313a: 687b ldr r3, [r7, #4] - 800313c: 6a1b ldr r3, [r3, #32] - 800313e: 613b str r3, [r7, #16] - /* Get the TIMx CR2 register value */ - tmpcr2 = TIMx->CR2; - 8003140: 687b ldr r3, [r7, #4] - 8003142: 685b ldr r3, [r3, #4] - 8003144: 617b str r3, [r7, #20] - /* Get the TIMx CCMR1 register value */ - tmpccmrx = TIMx->CCMR3; - 8003146: 687b ldr r3, [r7, #4] - 8003148: 6d5b ldr r3, [r3, #84] ; 0x54 - 800314a: 60fb str r3, [r7, #12] + /* Process Unlocked */ + __HAL_UNLOCK(hdma); + 8004fb2: 687b ldr r3, [r7, #4] + 8004fb4: 2200 movs r2, #0 + 8004fb6: f883 2034 strb.w r2, [r3, #52] ; 0x34 - /* Reset the Output Compare Mode Bits */ - tmpccmrx &= ~(TIM_CCMR3_OC5M); - 800314c: 68fa ldr r2, [r7, #12] - 800314e: 4b1b ldr r3, [pc, #108] ; (80031bc ) - 8003150: 4013 ands r3, r2 - 8003152: 60fb str r3, [r7, #12] - /* Select the Output Compare Mode */ - tmpccmrx |= OC_Config->OCMode; - 8003154: 683b ldr r3, [r7, #0] - 8003156: 681b ldr r3, [r3, #0] - 8003158: 68fa ldr r2, [r7, #12] - 800315a: 4313 orrs r3, r2 - 800315c: 60fb str r3, [r7, #12] + /* Change the DMA state */ + hdma->State = HAL_DMA_STATE_READY; + 8004fba: 687b ldr r3, [r7, #4] + 8004fbc: 2201 movs r2, #1 + 8004fbe: f883 2035 strb.w r2, [r3, #53] ; 0x35 - /* Reset the Output Polarity level */ - tmpccer &= ~TIM_CCER_CC5P; - 800315e: 693b ldr r3, [r7, #16] - 8003160: f423 3300 bic.w r3, r3, #131072 ; 0x20000 - 8003164: 613b str r3, [r7, #16] - /* Set the Output Compare Polarity */ - tmpccer |= (OC_Config->OCPolarity << 16U); - 8003166: 683b ldr r3, [r7, #0] - 8003168: 689b ldr r3, [r3, #8] - 800316a: 041b lsls r3, r3, #16 - 800316c: 693a ldr r2, [r7, #16] - 800316e: 4313 orrs r3, r2 - 8003170: 613b str r3, [r7, #16] + if(hdma->XferAbortCallback != NULL) + 8004fc2: 687b ldr r3, [r7, #4] + 8004fc4: 6d1b ldr r3, [r3, #80] ; 0x50 + 8004fc6: 2b00 cmp r3, #0 + 8004fc8: d07d beq.n 80050c6 + { + hdma->XferAbortCallback(hdma); + 8004fca: 687b ldr r3, [r7, #4] + 8004fcc: 6d1b ldr r3, [r3, #80] ; 0x50 + 8004fce: 6878 ldr r0, [r7, #4] + 8004fd0: 4798 blx r3 + } + return; + 8004fd2: e078 b.n 80050c6 + } - if (IS_TIM_BREAK_INSTANCE(TIMx)) - 8003172: 687b ldr r3, [r7, #4] - 8003174: 4a12 ldr r2, [pc, #72] ; (80031c0 ) - 8003176: 4293 cmp r3, r2 - 8003178: d003 beq.n 8003182 - 800317a: 687b ldr r3, [r7, #4] - 800317c: 4a11 ldr r2, [pc, #68] ; (80031c4 ) - 800317e: 4293 cmp r3, r2 - 8003180: d109 bne.n 8003196 - { - /* Reset the Output Compare IDLE State */ - tmpcr2 &= ~TIM_CR2_OIS5; - 8003182: 697b ldr r3, [r7, #20] - 8003184: f423 3380 bic.w r3, r3, #65536 ; 0x10000 - 8003188: 617b str r3, [r7, #20] - /* Set the Output Idle state */ - tmpcr2 |= (OC_Config->OCIdleState << 8U); - 800318a: 683b ldr r3, [r7, #0] - 800318c: 695b ldr r3, [r3, #20] - 800318e: 021b lsls r3, r3, #8 - 8003190: 697a ldr r2, [r7, #20] - 8003192: 4313 orrs r3, r2 - 8003194: 617b str r3, [r7, #20] - } - /* Write to TIMx CR2 */ - TIMx->CR2 = tmpcr2; - 8003196: 687b ldr r3, [r7, #4] - 8003198: 697a ldr r2, [r7, #20] - 800319a: 605a str r2, [r3, #4] + if(((hdma->Instance->CR) & (uint32_t)(DMA_SxCR_DBM)) != RESET) + 8004fd4: 687b ldr r3, [r7, #4] + 8004fd6: 681b ldr r3, [r3, #0] + 8004fd8: 681b ldr r3, [r3, #0] + 8004fda: f403 2380 and.w r3, r3, #262144 ; 0x40000 + 8004fde: 2b00 cmp r3, #0 + 8004fe0: d01c beq.n 800501c + { + /* Current memory buffer used is Memory 0 */ + if((hdma->Instance->CR & DMA_SxCR_CT) == RESET) + 8004fe2: 687b ldr r3, [r7, #4] + 8004fe4: 681b ldr r3, [r3, #0] + 8004fe6: 681b ldr r3, [r3, #0] + 8004fe8: f403 2300 and.w r3, r3, #524288 ; 0x80000 + 8004fec: 2b00 cmp r3, #0 + 8004fee: d108 bne.n 8005002 + { + if(hdma->XferM1CpltCallback != NULL) + 8004ff0: 687b ldr r3, [r7, #4] + 8004ff2: 6c5b ldr r3, [r3, #68] ; 0x44 + 8004ff4: 2b00 cmp r3, #0 + 8004ff6: d030 beq.n 800505a + { + /* Transfer complete Callback for memory1 */ + hdma->XferM1CpltCallback(hdma); + 8004ff8: 687b ldr r3, [r7, #4] + 8004ffa: 6c5b ldr r3, [r3, #68] ; 0x44 + 8004ffc: 6878 ldr r0, [r7, #4] + 8004ffe: 4798 blx r3 + 8005000: e02b b.n 800505a + } + } + /* Current memory buffer used is Memory 1 */ + else + { + if(hdma->XferCpltCallback != NULL) + 8005002: 687b ldr r3, [r7, #4] + 8005004: 6bdb ldr r3, [r3, #60] ; 0x3c + 8005006: 2b00 cmp r3, #0 + 8005008: d027 beq.n 800505a + { + /* Transfer complete Callback for memory0 */ + hdma->XferCpltCallback(hdma); + 800500a: 687b ldr r3, [r7, #4] + 800500c: 6bdb ldr r3, [r3, #60] ; 0x3c + 800500e: 6878 ldr r0, [r7, #4] + 8005010: 4798 blx r3 + 8005012: e022 b.n 800505a + 8005014: 20000010 .word 0x20000010 + 8005018: 1b4e81b5 .word 0x1b4e81b5 + } + } + /* Disable the transfer complete interrupt if the DMA mode is not CIRCULAR */ + else + { + if((hdma->Instance->CR & DMA_SxCR_CIRC) == RESET) + 800501c: 687b ldr r3, [r7, #4] + 800501e: 681b ldr r3, [r3, #0] + 8005020: 681b ldr r3, [r3, #0] + 8005022: f403 7380 and.w r3, r3, #256 ; 0x100 + 8005026: 2b00 cmp r3, #0 + 8005028: d10f bne.n 800504a + { + /* Disable the transfer complete interrupt */ + hdma->Instance->CR &= ~(DMA_IT_TC); + 800502a: 687b ldr r3, [r7, #4] + 800502c: 681b ldr r3, [r3, #0] + 800502e: 681a ldr r2, [r3, #0] + 8005030: 687b ldr r3, [r7, #4] + 8005032: 681b ldr r3, [r3, #0] + 8005034: f022 0210 bic.w r2, r2, #16 + 8005038: 601a str r2, [r3, #0] - /* Write to TIMx CCMR3 */ - TIMx->CCMR3 = tmpccmrx; - 800319c: 687b ldr r3, [r7, #4] - 800319e: 68fa ldr r2, [r7, #12] - 80031a0: 655a str r2, [r3, #84] ; 0x54 + /* Process Unlocked */ + __HAL_UNLOCK(hdma); + 800503a: 687b ldr r3, [r7, #4] + 800503c: 2200 movs r2, #0 + 800503e: f883 2034 strb.w r2, [r3, #52] ; 0x34 - /* Set the Capture Compare Register value */ - TIMx->CCR5 = OC_Config->Pulse; - 80031a2: 683b ldr r3, [r7, #0] - 80031a4: 685a ldr r2, [r3, #4] - 80031a6: 687b ldr r3, [r7, #4] - 80031a8: 659a str r2, [r3, #88] ; 0x58 + /* Change the DMA state */ + hdma->State = HAL_DMA_STATE_READY; + 8005042: 687b ldr r3, [r7, #4] + 8005044: 2201 movs r2, #1 + 8005046: f883 2035 strb.w r2, [r3, #53] ; 0x35 + } - /* Write to TIMx CCER */ - TIMx->CCER = tmpccer; - 80031aa: 687b ldr r3, [r7, #4] - 80031ac: 693a ldr r2, [r7, #16] - 80031ae: 621a str r2, [r3, #32] -} - 80031b0: bf00 nop - 80031b2: 371c adds r7, #28 - 80031b4: 46bd mov sp, r7 - 80031b6: f85d 7b04 ldr.w r7, [sp], #4 - 80031ba: 4770 bx lr - 80031bc: fffeff8f .word 0xfffeff8f - 80031c0: 40010000 .word 0x40010000 - 80031c4: 40010400 .word 0x40010400 - -080031c8 : - * @param OC_Config The ouput configuration structure - * @retval None - */ -static void TIM_OC6_SetConfig(TIM_TypeDef *TIMx, - TIM_OC_InitTypeDef *OC_Config) -{ - 80031c8: b480 push {r7} - 80031ca: b087 sub sp, #28 - 80031cc: af00 add r7, sp, #0 - 80031ce: 6078 str r0, [r7, #4] - 80031d0: 6039 str r1, [r7, #0] - uint32_t tmpccmrx; - uint32_t tmpccer; - uint32_t tmpcr2; + if(hdma->XferCpltCallback != NULL) + 800504a: 687b ldr r3, [r7, #4] + 800504c: 6bdb ldr r3, [r3, #60] ; 0x3c + 800504e: 2b00 cmp r3, #0 + 8005050: d003 beq.n 800505a + { + /* Transfer complete callback */ + hdma->XferCpltCallback(hdma); + 8005052: 687b ldr r3, [r7, #4] + 8005054: 6bdb ldr r3, [r3, #60] ; 0x3c + 8005056: 6878 ldr r0, [r7, #4] + 8005058: 4798 blx r3 + } + } + } + + /* manage error case */ + if(hdma->ErrorCode != HAL_DMA_ERROR_NONE) + 800505a: 687b ldr r3, [r7, #4] + 800505c: 6d5b ldr r3, [r3, #84] ; 0x54 + 800505e: 2b00 cmp r3, #0 + 8005060: d032 beq.n 80050c8 + { + if((hdma->ErrorCode & HAL_DMA_ERROR_TE) != RESET) + 8005062: 687b ldr r3, [r7, #4] + 8005064: 6d5b ldr r3, [r3, #84] ; 0x54 + 8005066: f003 0301 and.w r3, r3, #1 + 800506a: 2b00 cmp r3, #0 + 800506c: d022 beq.n 80050b4 + { + hdma->State = HAL_DMA_STATE_ABORT; + 800506e: 687b ldr r3, [r7, #4] + 8005070: 2205 movs r2, #5 + 8005072: f883 2035 strb.w r2, [r3, #53] ; 0x35 - /* Disable the output: Reset the CCxE Bit */ - TIMx->CCER &= ~TIM_CCER_CC6E; - 80031d2: 687b ldr r3, [r7, #4] - 80031d4: 6a1b ldr r3, [r3, #32] - 80031d6: f423 1280 bic.w r2, r3, #1048576 ; 0x100000 - 80031da: 687b ldr r3, [r7, #4] - 80031dc: 621a str r2, [r3, #32] + /* Disable the stream */ + __HAL_DMA_DISABLE(hdma); + 8005076: 687b ldr r3, [r7, #4] + 8005078: 681b ldr r3, [r3, #0] + 800507a: 681a ldr r2, [r3, #0] + 800507c: 687b ldr r3, [r7, #4] + 800507e: 681b ldr r3, [r3, #0] + 8005080: f022 0201 bic.w r2, r2, #1 + 8005084: 601a str r2, [r3, #0] - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; - 80031de: 687b ldr r3, [r7, #4] - 80031e0: 6a1b ldr r3, [r3, #32] - 80031e2: 613b str r3, [r7, #16] - /* Get the TIMx CR2 register value */ - tmpcr2 = TIMx->CR2; - 80031e4: 687b ldr r3, [r7, #4] - 80031e6: 685b ldr r3, [r3, #4] - 80031e8: 617b str r3, [r7, #20] - /* Get the TIMx CCMR1 register value */ - tmpccmrx = TIMx->CCMR3; - 80031ea: 687b ldr r3, [r7, #4] - 80031ec: 6d5b ldr r3, [r3, #84] ; 0x54 - 80031ee: 60fb str r3, [r7, #12] + do + { + if (++count > timeout) + 8005086: 68bb ldr r3, [r7, #8] + 8005088: 3301 adds r3, #1 + 800508a: 60bb str r3, [r7, #8] + 800508c: 697a ldr r2, [r7, #20] + 800508e: 429a cmp r2, r3 + 8005090: d307 bcc.n 80050a2 + { + break; + } + } + while((hdma->Instance->CR & DMA_SxCR_EN) != RESET); + 8005092: 687b ldr r3, [r7, #4] + 8005094: 681b ldr r3, [r3, #0] + 8005096: 681b ldr r3, [r3, #0] + 8005098: f003 0301 and.w r3, r3, #1 + 800509c: 2b00 cmp r3, #0 + 800509e: d1f2 bne.n 8005086 + 80050a0: e000 b.n 80050a4 + break; + 80050a2: bf00 nop - /* Reset the Output Compare Mode Bits */ - tmpccmrx &= ~(TIM_CCMR3_OC6M); - 80031f0: 68fa ldr r2, [r7, #12] - 80031f2: 4b1c ldr r3, [pc, #112] ; (8003264 ) - 80031f4: 4013 ands r3, r2 - 80031f6: 60fb str r3, [r7, #12] - /* Select the Output Compare Mode */ - tmpccmrx |= (OC_Config->OCMode << 8U); - 80031f8: 683b ldr r3, [r7, #0] - 80031fa: 681b ldr r3, [r3, #0] - 80031fc: 021b lsls r3, r3, #8 - 80031fe: 68fa ldr r2, [r7, #12] - 8003200: 4313 orrs r3, r2 - 8003202: 60fb str r3, [r7, #12] + /* Process Unlocked */ + __HAL_UNLOCK(hdma); + 80050a4: 687b ldr r3, [r7, #4] + 80050a6: 2200 movs r2, #0 + 80050a8: f883 2034 strb.w r2, [r3, #52] ; 0x34 - /* Reset the Output Polarity level */ - tmpccer &= (uint32_t)~TIM_CCER_CC6P; - 8003204: 693b ldr r3, [r7, #16] - 8003206: f423 1300 bic.w r3, r3, #2097152 ; 0x200000 - 800320a: 613b str r3, [r7, #16] - /* Set the Output Compare Polarity */ - tmpccer |= (OC_Config->OCPolarity << 20U); - 800320c: 683b ldr r3, [r7, #0] - 800320e: 689b ldr r3, [r3, #8] - 8003210: 051b lsls r3, r3, #20 - 8003212: 693a ldr r2, [r7, #16] - 8003214: 4313 orrs r3, r2 - 8003216: 613b str r3, [r7, #16] + /* Change the DMA state */ + hdma->State = HAL_DMA_STATE_READY; + 80050ac: 687b ldr r3, [r7, #4] + 80050ae: 2201 movs r2, #1 + 80050b0: f883 2035 strb.w r2, [r3, #53] ; 0x35 + } - if (IS_TIM_BREAK_INSTANCE(TIMx)) - 8003218: 687b ldr r3, [r7, #4] - 800321a: 4a13 ldr r2, [pc, #76] ; (8003268 ) - 800321c: 4293 cmp r3, r2 - 800321e: d003 beq.n 8003228 - 8003220: 687b ldr r3, [r7, #4] - 8003222: 4a12 ldr r2, [pc, #72] ; (800326c ) - 8003224: 4293 cmp r3, r2 - 8003226: d109 bne.n 800323c - { - /* Reset the Output Compare IDLE State */ - tmpcr2 &= ~TIM_CR2_OIS6; - 8003228: 697b ldr r3, [r7, #20] - 800322a: f423 2380 bic.w r3, r3, #262144 ; 0x40000 - 800322e: 617b str r3, [r7, #20] - /* Set the Output Idle state */ - tmpcr2 |= (OC_Config->OCIdleState << 10U); - 8003230: 683b ldr r3, [r7, #0] - 8003232: 695b ldr r3, [r3, #20] - 8003234: 029b lsls r3, r3, #10 - 8003236: 697a ldr r2, [r7, #20] - 8003238: 4313 orrs r3, r2 - 800323a: 617b str r3, [r7, #20] + if(hdma->XferErrorCallback != NULL) + 80050b4: 687b ldr r3, [r7, #4] + 80050b6: 6cdb ldr r3, [r3, #76] ; 0x4c + 80050b8: 2b00 cmp r3, #0 + 80050ba: d005 beq.n 80050c8 + { + /* Transfer error callback */ + hdma->XferErrorCallback(hdma); + 80050bc: 687b ldr r3, [r7, #4] + 80050be: 6cdb ldr r3, [r3, #76] ; 0x4c + 80050c0: 6878 ldr r0, [r7, #4] + 80050c2: 4798 blx r3 + 80050c4: e000 b.n 80050c8 + return; + 80050c6: bf00 nop + } } - - /* Write to TIMx CR2 */ - TIMx->CR2 = tmpcr2; - 800323c: 687b ldr r3, [r7, #4] - 800323e: 697a ldr r2, [r7, #20] - 8003240: 605a str r2, [r3, #4] - - /* Write to TIMx CCMR3 */ - TIMx->CCMR3 = tmpccmrx; - 8003242: 687b ldr r3, [r7, #4] - 8003244: 68fa ldr r2, [r7, #12] - 8003246: 655a str r2, [r3, #84] ; 0x54 - - /* Set the Capture Compare Register value */ - TIMx->CCR6 = OC_Config->Pulse; - 8003248: 683b ldr r3, [r7, #0] - 800324a: 685a ldr r2, [r3, #4] - 800324c: 687b ldr r3, [r7, #4] - 800324e: 65da str r2, [r3, #92] ; 0x5c - - /* Write to TIMx CCER */ - TIMx->CCER = tmpccer; - 8003250: 687b ldr r3, [r7, #4] - 8003252: 693a ldr r2, [r7, #16] - 8003254: 621a str r2, [r3, #32] } - 8003256: bf00 nop - 8003258: 371c adds r7, #28 - 800325a: 46bd mov sp, r7 - 800325c: f85d 7b04 ldr.w r7, [sp], #4 - 8003260: 4770 bx lr - 8003262: bf00 nop - 8003264: feff8fff .word 0xfeff8fff - 8003268: 40010000 .word 0x40010000 - 800326c: 40010400 .word 0x40010400 - -08003270 : - * @param TIM_ICFilter Specifies the Input Capture Filter. - * This parameter must be a value between 0x00 and 0x0F. - * @retval None + 80050c8: 3718 adds r7, #24 + 80050ca: 46bd mov sp, r7 + 80050cc: bd80 pop {r7, pc} + 80050ce: bf00 nop + +080050d0 : + * @param DstAddress The destination memory Buffer address + * @param DataLength The length of data to be transferred from source to destination + * @retval HAL status */ -static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) +static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) { - 8003270: b480 push {r7} - 8003272: b087 sub sp, #28 - 8003274: af00 add r7, sp, #0 - 8003276: 60f8 str r0, [r7, #12] - 8003278: 60b9 str r1, [r7, #8] - 800327a: 607a str r2, [r7, #4] - uint32_t tmpccmr1; - uint32_t tmpccer; + 80050d0: b480 push {r7} + 80050d2: b085 sub sp, #20 + 80050d4: af00 add r7, sp, #0 + 80050d6: 60f8 str r0, [r7, #12] + 80050d8: 60b9 str r1, [r7, #8] + 80050da: 607a str r2, [r7, #4] + 80050dc: 603b str r3, [r7, #0] + /* Clear DBM bit */ + hdma->Instance->CR &= (uint32_t)(~DMA_SxCR_DBM); + 80050de: 68fb ldr r3, [r7, #12] + 80050e0: 681b ldr r3, [r3, #0] + 80050e2: 681a ldr r2, [r3, #0] + 80050e4: 68fb ldr r3, [r7, #12] + 80050e6: 681b ldr r3, [r3, #0] + 80050e8: f422 2280 bic.w r2, r2, #262144 ; 0x40000 + 80050ec: 601a str r2, [r3, #0] - /* Disable the Channel 1: Reset the CC1E Bit */ - tmpccer = TIMx->CCER; - 800327c: 68fb ldr r3, [r7, #12] - 800327e: 6a1b ldr r3, [r3, #32] - 8003280: 617b str r3, [r7, #20] - TIMx->CCER &= ~TIM_CCER_CC1E; - 8003282: 68fb ldr r3, [r7, #12] - 8003284: 6a1b ldr r3, [r3, #32] - 8003286: f023 0201 bic.w r2, r3, #1 - 800328a: 68fb ldr r3, [r7, #12] - 800328c: 621a str r2, [r3, #32] - tmpccmr1 = TIMx->CCMR1; - 800328e: 68fb ldr r3, [r7, #12] - 8003290: 699b ldr r3, [r3, #24] - 8003292: 613b str r3, [r7, #16] + /* Configure DMA Stream data length */ + hdma->Instance->NDTR = DataLength; + 80050ee: 68fb ldr r3, [r7, #12] + 80050f0: 681b ldr r3, [r3, #0] + 80050f2: 683a ldr r2, [r7, #0] + 80050f4: 605a str r2, [r3, #4] - /* Set the filter */ - tmpccmr1 &= ~TIM_CCMR1_IC1F; - 8003294: 693b ldr r3, [r7, #16] - 8003296: f023 03f0 bic.w r3, r3, #240 ; 0xf0 - 800329a: 613b str r3, [r7, #16] - tmpccmr1 |= (TIM_ICFilter << 4U); - 800329c: 687b ldr r3, [r7, #4] - 800329e: 011b lsls r3, r3, #4 - 80032a0: 693a ldr r2, [r7, #16] - 80032a2: 4313 orrs r3, r2 - 80032a4: 613b str r3, [r7, #16] + /* Memory to Peripheral */ + if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH) + 80050f6: 68fb ldr r3, [r7, #12] + 80050f8: 689b ldr r3, [r3, #8] + 80050fa: 2b40 cmp r3, #64 ; 0x40 + 80050fc: d108 bne.n 8005110 + { + /* Configure DMA Stream destination address */ + hdma->Instance->PAR = DstAddress; + 80050fe: 68fb ldr r3, [r7, #12] + 8005100: 681b ldr r3, [r3, #0] + 8005102: 687a ldr r2, [r7, #4] + 8005104: 609a str r2, [r3, #8] - /* Select the Polarity and set the CC1E Bit */ - tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP); - 80032a6: 697b ldr r3, [r7, #20] - 80032a8: f023 030a bic.w r3, r3, #10 - 80032ac: 617b str r3, [r7, #20] - tmpccer |= TIM_ICPolarity; - 80032ae: 697a ldr r2, [r7, #20] - 80032b0: 68bb ldr r3, [r7, #8] - 80032b2: 4313 orrs r3, r2 - 80032b4: 617b str r3, [r7, #20] + /* Configure DMA Stream source address */ + hdma->Instance->M0AR = SrcAddress; + 8005106: 68fb ldr r3, [r7, #12] + 8005108: 681b ldr r3, [r3, #0] + 800510a: 68ba ldr r2, [r7, #8] + 800510c: 60da str r2, [r3, #12] + hdma->Instance->PAR = SrcAddress; - /* Write to TIMx CCMR1 and CCER registers */ - TIMx->CCMR1 = tmpccmr1; - 80032b6: 68fb ldr r3, [r7, #12] - 80032b8: 693a ldr r2, [r7, #16] - 80032ba: 619a str r2, [r3, #24] - TIMx->CCER = tmpccer; - 80032bc: 68fb ldr r3, [r7, #12] - 80032be: 697a ldr r2, [r7, #20] - 80032c0: 621a str r2, [r3, #32] + /* Configure DMA Stream destination address */ + hdma->Instance->M0AR = DstAddress; + } +} + 800510e: e007 b.n 8005120 + hdma->Instance->PAR = SrcAddress; + 8005110: 68fb ldr r3, [r7, #12] + 8005112: 681b ldr r3, [r3, #0] + 8005114: 68ba ldr r2, [r7, #8] + 8005116: 609a str r2, [r3, #8] + hdma->Instance->M0AR = DstAddress; + 8005118: 68fb ldr r3, [r7, #12] + 800511a: 681b ldr r3, [r3, #0] + 800511c: 687a ldr r2, [r7, #4] + 800511e: 60da str r2, [r3, #12] } - 80032c2: bf00 nop - 80032c4: 371c adds r7, #28 - 80032c6: 46bd mov sp, r7 - 80032c8: f85d 7b04 ldr.w r7, [sp], #4 - 80032cc: 4770 bx lr + 8005120: bf00 nop + 8005122: 3714 adds r7, #20 + 8005124: 46bd mov sp, r7 + 8005126: f85d 7b04 ldr.w r7, [sp], #4 + 800512a: 4770 bx lr -080032ce : - * @param TIM_ICFilter Specifies the Input Capture Filter. - * This parameter must be a value between 0x00 and 0x0F. - * @retval None +0800512c : + * @param hdma pointer to a DMA_HandleTypeDef structure that contains + * the configuration information for the specified DMA Stream. + * @retval Stream base address */ -static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) +static uint32_t DMA_CalcBaseAndBitshift(DMA_HandleTypeDef *hdma) { - 80032ce: b480 push {r7} - 80032d0: b087 sub sp, #28 - 80032d2: af00 add r7, sp, #0 - 80032d4: 60f8 str r0, [r7, #12] - 80032d6: 60b9 str r1, [r7, #8] - 80032d8: 607a str r2, [r7, #4] - uint32_t tmpccmr1; - uint32_t tmpccer; - - /* Disable the Channel 2: Reset the CC2E Bit */ - TIMx->CCER &= ~TIM_CCER_CC2E; - 80032da: 68fb ldr r3, [r7, #12] - 80032dc: 6a1b ldr r3, [r3, #32] - 80032de: f023 0210 bic.w r2, r3, #16 - 80032e2: 68fb ldr r3, [r7, #12] - 80032e4: 621a str r2, [r3, #32] - tmpccmr1 = TIMx->CCMR1; - 80032e6: 68fb ldr r3, [r7, #12] - 80032e8: 699b ldr r3, [r3, #24] - 80032ea: 617b str r3, [r7, #20] - tmpccer = TIMx->CCER; - 80032ec: 68fb ldr r3, [r7, #12] - 80032ee: 6a1b ldr r3, [r3, #32] - 80032f0: 613b str r3, [r7, #16] - - /* Set the filter */ - tmpccmr1 &= ~TIM_CCMR1_IC2F; - 80032f2: 697b ldr r3, [r7, #20] - 80032f4: f423 4370 bic.w r3, r3, #61440 ; 0xf000 - 80032f8: 617b str r3, [r7, #20] - tmpccmr1 |= (TIM_ICFilter << 12U); - 80032fa: 687b ldr r3, [r7, #4] - 80032fc: 031b lsls r3, r3, #12 - 80032fe: 697a ldr r2, [r7, #20] - 8003300: 4313 orrs r3, r2 - 8003302: 617b str r3, [r7, #20] - - /* Select the Polarity and set the CC2E Bit */ - tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP); - 8003304: 693b ldr r3, [r7, #16] - 8003306: f023 03a0 bic.w r3, r3, #160 ; 0xa0 - 800330a: 613b str r3, [r7, #16] - tmpccer |= (TIM_ICPolarity << 4U); - 800330c: 68bb ldr r3, [r7, #8] - 800330e: 011b lsls r3, r3, #4 - 8003310: 693a ldr r2, [r7, #16] - 8003312: 4313 orrs r3, r2 - 8003314: 613b str r3, [r7, #16] - - /* Write to TIMx CCMR1 and CCER registers */ - TIMx->CCMR1 = tmpccmr1 ; - 8003316: 68fb ldr r3, [r7, #12] - 8003318: 697a ldr r2, [r7, #20] - 800331a: 619a str r2, [r3, #24] - TIMx->CCER = tmpccer; - 800331c: 68fb ldr r3, [r7, #12] - 800331e: 693a ldr r2, [r7, #16] - 8003320: 621a str r2, [r3, #32] + 800512c: b480 push {r7} + 800512e: b085 sub sp, #20 + 8005130: af00 add r7, sp, #0 + 8005132: 6078 str r0, [r7, #4] + uint32_t stream_number = (((uint32_t)hdma->Instance & 0xFFU) - 16U) / 24U; + 8005134: 687b ldr r3, [r7, #4] + 8005136: 681b ldr r3, [r3, #0] + 8005138: b2db uxtb r3, r3 + 800513a: 3b10 subs r3, #16 + 800513c: 4a13 ldr r2, [pc, #76] ; (800518c ) + 800513e: fba2 2303 umull r2, r3, r2, r3 + 8005142: 091b lsrs r3, r3, #4 + 8005144: 60fb str r3, [r7, #12] + + /* lookup table for necessary bitshift of flags within status registers */ + static const uint8_t flagBitshiftOffset[8U] = {0U, 6U, 16U, 22U, 0U, 6U, 16U, 22U}; + hdma->StreamIndex = flagBitshiftOffset[stream_number]; + 8005146: 4a12 ldr r2, [pc, #72] ; (8005190 ) + 8005148: 68fb ldr r3, [r7, #12] + 800514a: 4413 add r3, r2 + 800514c: 781b ldrb r3, [r3, #0] + 800514e: 461a mov r2, r3 + 8005150: 687b ldr r3, [r7, #4] + 8005152: 65da str r2, [r3, #92] ; 0x5c + + if (stream_number > 3U) + 8005154: 68fb ldr r3, [r7, #12] + 8005156: 2b03 cmp r3, #3 + 8005158: d908 bls.n 800516c + { + /* return pointer to HISR and HIFCR */ + hdma->StreamBaseAddress = (((uint32_t)hdma->Instance & (uint32_t)(~0x3FFU)) + 4U); + 800515a: 687b ldr r3, [r7, #4] + 800515c: 681b ldr r3, [r3, #0] + 800515e: 461a mov r2, r3 + 8005160: 4b0c ldr r3, [pc, #48] ; (8005194 ) + 8005162: 4013 ands r3, r2 + 8005164: 1d1a adds r2, r3, #4 + 8005166: 687b ldr r3, [r7, #4] + 8005168: 659a str r2, [r3, #88] ; 0x58 + 800516a: e006 b.n 800517a + } + else + { + /* return pointer to LISR and LIFCR */ + hdma->StreamBaseAddress = ((uint32_t)hdma->Instance & (uint32_t)(~0x3FFU)); + 800516c: 687b ldr r3, [r7, #4] + 800516e: 681b ldr r3, [r3, #0] + 8005170: 461a mov r2, r3 + 8005172: 4b08 ldr r3, [pc, #32] ; (8005194 ) + 8005174: 4013 ands r3, r2 + 8005176: 687a ldr r2, [r7, #4] + 8005178: 6593 str r3, [r2, #88] ; 0x58 + } + + return hdma->StreamBaseAddress; + 800517a: 687b ldr r3, [r7, #4] + 800517c: 6d9b ldr r3, [r3, #88] ; 0x58 +} + 800517e: 4618 mov r0, r3 + 8005180: 3714 adds r7, #20 + 8005182: 46bd mov sp, r7 + 8005184: f85d 7b04 ldr.w r7, [sp], #4 + 8005188: 4770 bx lr + 800518a: bf00 nop + 800518c: aaaaaaab .word 0xaaaaaaab + 8005190: 0800a640 .word 0x0800a640 + 8005194: fffffc00 .word 0xfffffc00 + +08005198 : + * @param hdma pointer to a DMA_HandleTypeDef structure that contains + * the configuration information for the specified DMA Stream. + * @retval HAL status + */ +static HAL_StatusTypeDef DMA_CheckFifoParam(DMA_HandleTypeDef *hdma) +{ + 8005198: b480 push {r7} + 800519a: b085 sub sp, #20 + 800519c: af00 add r7, sp, #0 + 800519e: 6078 str r0, [r7, #4] + HAL_StatusTypeDef status = HAL_OK; + 80051a0: 2300 movs r3, #0 + 80051a2: 73fb strb r3, [r7, #15] + uint32_t tmp = hdma->Init.FIFOThreshold; + 80051a4: 687b ldr r3, [r7, #4] + 80051a6: 6a9b ldr r3, [r3, #40] ; 0x28 + 80051a8: 60bb str r3, [r7, #8] + + /* Memory Data size equal to Byte */ + if(hdma->Init.MemDataAlignment == DMA_MDATAALIGN_BYTE) + 80051aa: 687b ldr r3, [r7, #4] + 80051ac: 699b ldr r3, [r3, #24] + 80051ae: 2b00 cmp r3, #0 + 80051b0: d11f bne.n 80051f2 + { + switch (tmp) + 80051b2: 68bb ldr r3, [r7, #8] + 80051b4: 2b03 cmp r3, #3 + 80051b6: d855 bhi.n 8005264 + 80051b8: a201 add r2, pc, #4 ; (adr r2, 80051c0 ) + 80051ba: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 80051be: bf00 nop + 80051c0: 080051d1 .word 0x080051d1 + 80051c4: 080051e3 .word 0x080051e3 + 80051c8: 080051d1 .word 0x080051d1 + 80051cc: 08005265 .word 0x08005265 + { + case DMA_FIFO_THRESHOLD_1QUARTERFULL: + case DMA_FIFO_THRESHOLD_3QUARTERSFULL: + if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1) + 80051d0: 687b ldr r3, [r7, #4] + 80051d2: 6adb ldr r3, [r3, #44] ; 0x2c + 80051d4: f003 7380 and.w r3, r3, #16777216 ; 0x1000000 + 80051d8: 2b00 cmp r3, #0 + 80051da: d045 beq.n 8005268 + { + status = HAL_ERROR; + 80051dc: 2301 movs r3, #1 + 80051de: 73fb strb r3, [r7, #15] + } + break; + 80051e0: e042 b.n 8005268 + case DMA_FIFO_THRESHOLD_HALFFULL: + if (hdma->Init.MemBurst == DMA_MBURST_INC16) + 80051e2: 687b ldr r3, [r7, #4] + 80051e4: 6adb ldr r3, [r3, #44] ; 0x2c + 80051e6: f1b3 7fc0 cmp.w r3, #25165824 ; 0x1800000 + 80051ea: d13f bne.n 800526c + { + status = HAL_ERROR; + 80051ec: 2301 movs r3, #1 + 80051ee: 73fb strb r3, [r7, #15] + } + break; + 80051f0: e03c b.n 800526c + break; + } + } + + /* Memory Data size equal to Half-Word */ + else if (hdma->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD) + 80051f2: 687b ldr r3, [r7, #4] + 80051f4: 699b ldr r3, [r3, #24] + 80051f6: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 + 80051fa: d121 bne.n 8005240 + { + switch (tmp) + 80051fc: 68bb ldr r3, [r7, #8] + 80051fe: 2b03 cmp r3, #3 + 8005200: d836 bhi.n 8005270 + 8005202: a201 add r2, pc, #4 ; (adr r2, 8005208 ) + 8005204: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 8005208: 08005219 .word 0x08005219 + 800520c: 0800521f .word 0x0800521f + 8005210: 08005219 .word 0x08005219 + 8005214: 08005231 .word 0x08005231 + { + case DMA_FIFO_THRESHOLD_1QUARTERFULL: + case DMA_FIFO_THRESHOLD_3QUARTERSFULL: + status = HAL_ERROR; + 8005218: 2301 movs r3, #1 + 800521a: 73fb strb r3, [r7, #15] + break; + 800521c: e02f b.n 800527e + case DMA_FIFO_THRESHOLD_HALFFULL: + if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1) + 800521e: 687b ldr r3, [r7, #4] + 8005220: 6adb ldr r3, [r3, #44] ; 0x2c + 8005222: f003 7380 and.w r3, r3, #16777216 ; 0x1000000 + 8005226: 2b00 cmp r3, #0 + 8005228: d024 beq.n 8005274 + { + status = HAL_ERROR; + 800522a: 2301 movs r3, #1 + 800522c: 73fb strb r3, [r7, #15] + } + break; + 800522e: e021 b.n 8005274 + case DMA_FIFO_THRESHOLD_FULL: + if (hdma->Init.MemBurst == DMA_MBURST_INC16) + 8005230: 687b ldr r3, [r7, #4] + 8005232: 6adb ldr r3, [r3, #44] ; 0x2c + 8005234: f1b3 7fc0 cmp.w r3, #25165824 ; 0x1800000 + 8005238: d11e bne.n 8005278 + { + status = HAL_ERROR; + 800523a: 2301 movs r3, #1 + 800523c: 73fb strb r3, [r7, #15] + } + break; + 800523e: e01b b.n 8005278 + } + + /* Memory Data size equal to Word */ + else + { + switch (tmp) + 8005240: 68bb ldr r3, [r7, #8] + 8005242: 2b02 cmp r3, #2 + 8005244: d902 bls.n 800524c + 8005246: 2b03 cmp r3, #3 + 8005248: d003 beq.n 8005252 + { + status = HAL_ERROR; + } + break; + default: + break; + 800524a: e018 b.n 800527e + status = HAL_ERROR; + 800524c: 2301 movs r3, #1 + 800524e: 73fb strb r3, [r7, #15] + break; + 8005250: e015 b.n 800527e + if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1) + 8005252: 687b ldr r3, [r7, #4] + 8005254: 6adb ldr r3, [r3, #44] ; 0x2c + 8005256: f003 7380 and.w r3, r3, #16777216 ; 0x1000000 + 800525a: 2b00 cmp r3, #0 + 800525c: d00e beq.n 800527c + status = HAL_ERROR; + 800525e: 2301 movs r3, #1 + 8005260: 73fb strb r3, [r7, #15] + break; + 8005262: e00b b.n 800527c + break; + 8005264: bf00 nop + 8005266: e00a b.n 800527e + break; + 8005268: bf00 nop + 800526a: e008 b.n 800527e + break; + 800526c: bf00 nop + 800526e: e006 b.n 800527e + break; + 8005270: bf00 nop + 8005272: e004 b.n 800527e + break; + 8005274: bf00 nop + 8005276: e002 b.n 800527e + break; + 8005278: bf00 nop + 800527a: e000 b.n 800527e + break; + 800527c: bf00 nop + } + } + + return status; + 800527e: 7bfb ldrb r3, [r7, #15] } - 8003322: bf00 nop - 8003324: 371c adds r7, #28 - 8003326: 46bd mov sp, r7 - 8003328: f85d 7b04 ldr.w r7, [sp], #4 - 800332c: 4770 bx lr + 8005280: 4618 mov r0, r3 + 8005282: 3714 adds r7, #20 + 8005284: 46bd mov sp, r7 + 8005286: f85d 7b04 ldr.w r7, [sp], #4 + 800528a: 4770 bx lr -0800332e : - * @arg TIM_TS_TI2FP2: Filtered Timer Input 2 - * @arg TIM_TS_ETRF: External Trigger input +0800528c : + * @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains + * the configuration information for the specified GPIO peripheral. * @retval None */ -static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource) +void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { - 800332e: b480 push {r7} - 8003330: b085 sub sp, #20 - 8003332: af00 add r7, sp, #0 - 8003334: 6078 str r0, [r7, #4] - 8003336: 6039 str r1, [r7, #0] - uint32_t tmpsmcr; + 800528c: b480 push {r7} + 800528e: b089 sub sp, #36 ; 0x24 + 8005290: af00 add r7, sp, #0 + 8005292: 6078 str r0, [r7, #4] + 8005294: 6039 str r1, [r7, #0] + uint32_t position = 0x00; + 8005296: 2300 movs r3, #0 + 8005298: 61fb str r3, [r7, #28] + uint32_t ioposition = 0x00; + 800529a: 2300 movs r3, #0 + 800529c: 617b str r3, [r7, #20] + uint32_t iocurrent = 0x00; + 800529e: 2300 movs r3, #0 + 80052a0: 613b str r3, [r7, #16] + uint32_t temp = 0x00; + 80052a2: 2300 movs r3, #0 + 80052a4: 61bb str r3, [r7, #24] + assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); + assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); + assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); - /* Get the TIMx SMCR register value */ - tmpsmcr = TIMx->SMCR; - 8003338: 687b ldr r3, [r7, #4] - 800333a: 689b ldr r3, [r3, #8] - 800333c: 60fb str r3, [r7, #12] - /* Reset the TS Bits */ - tmpsmcr &= ~TIM_SMCR_TS; - 800333e: 68fb ldr r3, [r7, #12] - 8003340: f023 0370 bic.w r3, r3, #112 ; 0x70 - 8003344: 60fb str r3, [r7, #12] - /* Set the Input Trigger source and the slave mode*/ - tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1); - 8003346: 683a ldr r2, [r7, #0] - 8003348: 68fb ldr r3, [r7, #12] - 800334a: 4313 orrs r3, r2 - 800334c: f043 0307 orr.w r3, r3, #7 - 8003350: 60fb str r3, [r7, #12] - /* Write to TIMx SMCR */ - TIMx->SMCR = tmpsmcr; - 8003352: 687b ldr r3, [r7, #4] - 8003354: 68fa ldr r2, [r7, #12] - 8003356: 609a str r2, [r3, #8] -} - 8003358: bf00 nop - 800335a: 3714 adds r7, #20 - 800335c: 46bd mov sp, r7 - 800335e: f85d 7b04 ldr.w r7, [sp], #4 - 8003362: 4770 bx lr + /* Configure the port pins */ + for(position = 0; position < GPIO_NUMBER; position++) + 80052a6: 2300 movs r3, #0 + 80052a8: 61fb str r3, [r7, #28] + 80052aa: e175 b.n 8005598 + { + /* Get the IO position */ + ioposition = ((uint32_t)0x01) << position; + 80052ac: 2201 movs r2, #1 + 80052ae: 69fb ldr r3, [r7, #28] + 80052b0: fa02 f303 lsl.w r3, r2, r3 + 80052b4: 617b str r3, [r7, #20] + /* Get the current IO position */ + iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; + 80052b6: 683b ldr r3, [r7, #0] + 80052b8: 681b ldr r3, [r3, #0] + 80052ba: 697a ldr r2, [r7, #20] + 80052bc: 4013 ands r3, r2 + 80052be: 613b str r3, [r7, #16] -08003364 : - * This parameter must be a value between 0x00 and 0x0F - * @retval None - */ -void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler, - uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter) -{ - 8003364: b480 push {r7} - 8003366: b087 sub sp, #28 - 8003368: af00 add r7, sp, #0 - 800336a: 60f8 str r0, [r7, #12] - 800336c: 60b9 str r1, [r7, #8] - 800336e: 607a str r2, [r7, #4] - 8003370: 603b str r3, [r7, #0] - uint32_t tmpsmcr; + if(iocurrent == ioposition) + 80052c0: 693a ldr r2, [r7, #16] + 80052c2: 697b ldr r3, [r7, #20] + 80052c4: 429a cmp r2, r3 + 80052c6: f040 8164 bne.w 8005592 + { + /*--------------------- GPIO Mode Configuration ------------------------*/ + /* In case of Alternate function mode selection */ + if((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) + 80052ca: 683b ldr r3, [r7, #0] + 80052cc: 685b ldr r3, [r3, #4] + 80052ce: 2b02 cmp r3, #2 + 80052d0: d003 beq.n 80052da + 80052d2: 683b ldr r3, [r7, #0] + 80052d4: 685b ldr r3, [r3, #4] + 80052d6: 2b12 cmp r3, #18 + 80052d8: d123 bne.n 8005322 + { + /* Check the Alternate function parameter */ + assert_param(IS_GPIO_AF(GPIO_Init->Alternate)); + + /* Configure Alternate function mapped with the current IO */ + temp = GPIOx->AFR[position >> 3]; + 80052da: 69fb ldr r3, [r7, #28] + 80052dc: 08da lsrs r2, r3, #3 + 80052de: 687b ldr r3, [r7, #4] + 80052e0: 3208 adds r2, #8 + 80052e2: f853 3022 ldr.w r3, [r3, r2, lsl #2] + 80052e6: 61bb str r3, [r7, #24] + temp &= ~((uint32_t)0xF << ((uint32_t)(position & (uint32_t)0x07) * 4)) ; + 80052e8: 69fb ldr r3, [r7, #28] + 80052ea: f003 0307 and.w r3, r3, #7 + 80052ee: 009b lsls r3, r3, #2 + 80052f0: 220f movs r2, #15 + 80052f2: fa02 f303 lsl.w r3, r2, r3 + 80052f6: 43db mvns r3, r3 + 80052f8: 69ba ldr r2, [r7, #24] + 80052fa: 4013 ands r3, r2 + 80052fc: 61bb str r3, [r7, #24] + temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & (uint32_t)0x07) * 4)); + 80052fe: 683b ldr r3, [r7, #0] + 8005300: 691a ldr r2, [r3, #16] + 8005302: 69fb ldr r3, [r7, #28] + 8005304: f003 0307 and.w r3, r3, #7 + 8005308: 009b lsls r3, r3, #2 + 800530a: fa02 f303 lsl.w r3, r2, r3 + 800530e: 69ba ldr r2, [r7, #24] + 8005310: 4313 orrs r3, r2 + 8005312: 61bb str r3, [r7, #24] + GPIOx->AFR[position >> 3] = temp; + 8005314: 69fb ldr r3, [r7, #28] + 8005316: 08da lsrs r2, r3, #3 + 8005318: 687b ldr r3, [r7, #4] + 800531a: 3208 adds r2, #8 + 800531c: 69b9 ldr r1, [r7, #24] + 800531e: f843 1022 str.w r1, [r3, r2, lsl #2] + } - tmpsmcr = TIMx->SMCR; - 8003372: 68fb ldr r3, [r7, #12] - 8003374: 689b ldr r3, [r3, #8] - 8003376: 617b str r3, [r7, #20] + /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ + temp = GPIOx->MODER; + 8005322: 687b ldr r3, [r7, #4] + 8005324: 681b ldr r3, [r3, #0] + 8005326: 61bb str r3, [r7, #24] + temp &= ~(GPIO_MODER_MODER0 << (position * 2)); + 8005328: 69fb ldr r3, [r7, #28] + 800532a: 005b lsls r3, r3, #1 + 800532c: 2203 movs r2, #3 + 800532e: fa02 f303 lsl.w r3, r2, r3 + 8005332: 43db mvns r3, r3 + 8005334: 69ba ldr r2, [r7, #24] + 8005336: 4013 ands r3, r2 + 8005338: 61bb str r3, [r7, #24] + temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2)); + 800533a: 683b ldr r3, [r7, #0] + 800533c: 685b ldr r3, [r3, #4] + 800533e: f003 0203 and.w r2, r3, #3 + 8005342: 69fb ldr r3, [r7, #28] + 8005344: 005b lsls r3, r3, #1 + 8005346: fa02 f303 lsl.w r3, r2, r3 + 800534a: 69ba ldr r2, [r7, #24] + 800534c: 4313 orrs r3, r2 + 800534e: 61bb str r3, [r7, #24] + GPIOx->MODER = temp; + 8005350: 687b ldr r3, [r7, #4] + 8005352: 69ba ldr r2, [r7, #24] + 8005354: 601a str r2, [r3, #0] - /* Reset the ETR Bits */ - tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); - 8003378: 697b ldr r3, [r7, #20] - 800337a: f423 437f bic.w r3, r3, #65280 ; 0xff00 - 800337e: 617b str r3, [r7, #20] + /* In case of Output or Alternate function mode selection */ + if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) || + 8005356: 683b ldr r3, [r7, #0] + 8005358: 685b ldr r3, [r3, #4] + 800535a: 2b01 cmp r3, #1 + 800535c: d00b beq.n 8005376 + 800535e: 683b ldr r3, [r7, #0] + 8005360: 685b ldr r3, [r3, #4] + 8005362: 2b02 cmp r3, #2 + 8005364: d007 beq.n 8005376 + (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) + 8005366: 683b ldr r3, [r7, #0] + 8005368: 685b ldr r3, [r3, #4] + if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) || + 800536a: 2b11 cmp r3, #17 + 800536c: d003 beq.n 8005376 + (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) + 800536e: 683b ldr r3, [r7, #0] + 8005370: 685b ldr r3, [r3, #4] + 8005372: 2b12 cmp r3, #18 + 8005374: d130 bne.n 80053d8 + { + /* Check the Speed parameter */ + assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); + /* Configure the IO Speed */ + temp = GPIOx->OSPEEDR; + 8005376: 687b ldr r3, [r7, #4] + 8005378: 689b ldr r3, [r3, #8] + 800537a: 61bb str r3, [r7, #24] + temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2)); + 800537c: 69fb ldr r3, [r7, #28] + 800537e: 005b lsls r3, r3, #1 + 8005380: 2203 movs r2, #3 + 8005382: fa02 f303 lsl.w r3, r2, r3 + 8005386: 43db mvns r3, r3 + 8005388: 69ba ldr r2, [r7, #24] + 800538a: 4013 ands r3, r2 + 800538c: 61bb str r3, [r7, #24] + temp |= (GPIO_Init->Speed << (position * 2)); + 800538e: 683b ldr r3, [r7, #0] + 8005390: 68da ldr r2, [r3, #12] + 8005392: 69fb ldr r3, [r7, #28] + 8005394: 005b lsls r3, r3, #1 + 8005396: fa02 f303 lsl.w r3, r2, r3 + 800539a: 69ba ldr r2, [r7, #24] + 800539c: 4313 orrs r3, r2 + 800539e: 61bb str r3, [r7, #24] + GPIOx->OSPEEDR = temp; + 80053a0: 687b ldr r3, [r7, #4] + 80053a2: 69ba ldr r2, [r7, #24] + 80053a4: 609a str r2, [r3, #8] - /* Set the Prescaler, the Filter value and the Polarity */ - tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U))); - 8003380: 683b ldr r3, [r7, #0] - 8003382: 021a lsls r2, r3, #8 - 8003384: 687b ldr r3, [r7, #4] - 8003386: 431a orrs r2, r3 - 8003388: 68bb ldr r3, [r7, #8] - 800338a: 4313 orrs r3, r2 - 800338c: 697a ldr r2, [r7, #20] - 800338e: 4313 orrs r3, r2 - 8003390: 617b str r3, [r7, #20] + /* Configure the IO Output Type */ + temp = GPIOx->OTYPER; + 80053a6: 687b ldr r3, [r7, #4] + 80053a8: 685b ldr r3, [r3, #4] + 80053aa: 61bb str r3, [r7, #24] + temp &= ~(GPIO_OTYPER_OT_0 << position) ; + 80053ac: 2201 movs r2, #1 + 80053ae: 69fb ldr r3, [r7, #28] + 80053b0: fa02 f303 lsl.w r3, r2, r3 + 80053b4: 43db mvns r3, r3 + 80053b6: 69ba ldr r2, [r7, #24] + 80053b8: 4013 ands r3, r2 + 80053ba: 61bb str r3, [r7, #24] + temp |= (((GPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4) << position); + 80053bc: 683b ldr r3, [r7, #0] + 80053be: 685b ldr r3, [r3, #4] + 80053c0: 091b lsrs r3, r3, #4 + 80053c2: f003 0201 and.w r2, r3, #1 + 80053c6: 69fb ldr r3, [r7, #28] + 80053c8: fa02 f303 lsl.w r3, r2, r3 + 80053cc: 69ba ldr r2, [r7, #24] + 80053ce: 4313 orrs r3, r2 + 80053d0: 61bb str r3, [r7, #24] + GPIOx->OTYPER = temp; + 80053d2: 687b ldr r3, [r7, #4] + 80053d4: 69ba ldr r2, [r7, #24] + 80053d6: 605a str r2, [r3, #4] + } - /* Write to TIMx SMCR */ - TIMx->SMCR = tmpsmcr; - 8003392: 68fb ldr r3, [r7, #12] - 8003394: 697a ldr r2, [r7, #20] - 8003396: 609a str r2, [r3, #8] -} - 8003398: bf00 nop - 800339a: 371c adds r7, #28 - 800339c: 46bd mov sp, r7 - 800339e: f85d 7b04 ldr.w r7, [sp], #4 - 80033a2: 4770 bx lr + /* Activate the Pull-up or Pull down resistor for the current IO */ + temp = GPIOx->PUPDR; + 80053d8: 687b ldr r3, [r7, #4] + 80053da: 68db ldr r3, [r3, #12] + 80053dc: 61bb str r3, [r7, #24] + temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2)); + 80053de: 69fb ldr r3, [r7, #28] + 80053e0: 005b lsls r3, r3, #1 + 80053e2: 2203 movs r2, #3 + 80053e4: fa02 f303 lsl.w r3, r2, r3 + 80053e8: 43db mvns r3, r3 + 80053ea: 69ba ldr r2, [r7, #24] + 80053ec: 4013 ands r3, r2 + 80053ee: 61bb str r3, [r7, #24] + temp |= ((GPIO_Init->Pull) << (position * 2)); + 80053f0: 683b ldr r3, [r7, #0] + 80053f2: 689a ldr r2, [r3, #8] + 80053f4: 69fb ldr r3, [r7, #28] + 80053f6: 005b lsls r3, r3, #1 + 80053f8: fa02 f303 lsl.w r3, r2, r3 + 80053fc: 69ba ldr r2, [r7, #24] + 80053fe: 4313 orrs r3, r2 + 8005400: 61bb str r3, [r7, #24] + GPIOx->PUPDR = temp; + 8005402: 687b ldr r3, [r7, #4] + 8005404: 69ba ldr r2, [r7, #24] + 8005406: 60da str r2, [r3, #12] -080033a4 : - * @param ChannelState specifies the TIM Channel CCxE bit new state. - * This parameter can be: TIM_CCx_ENABLE or TIM_CCx_DISABLE. + /*--------------------- EXTI Mode Configuration ------------------------*/ + /* Configure the External Interrupt or event for the current IO */ + if((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) + 8005408: 683b ldr r3, [r7, #0] + 800540a: 685b ldr r3, [r3, #4] + 800540c: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 + 8005410: 2b00 cmp r3, #0 + 8005412: f000 80be beq.w 8005592 + { + /* Enable SYSCFG Clock */ + __HAL_RCC_SYSCFG_CLK_ENABLE(); + 8005416: 4b65 ldr r3, [pc, #404] ; (80055ac ) + 8005418: 6c5b ldr r3, [r3, #68] ; 0x44 + 800541a: 4a64 ldr r2, [pc, #400] ; (80055ac ) + 800541c: f443 4380 orr.w r3, r3, #16384 ; 0x4000 + 8005420: 6453 str r3, [r2, #68] ; 0x44 + 8005422: 4b62 ldr r3, [pc, #392] ; (80055ac ) + 8005424: 6c5b ldr r3, [r3, #68] ; 0x44 + 8005426: f403 4380 and.w r3, r3, #16384 ; 0x4000 + 800542a: 60fb str r3, [r7, #12] + 800542c: 68fb ldr r3, [r7, #12] + + temp = SYSCFG->EXTICR[position >> 2]; + 800542e: 4a60 ldr r2, [pc, #384] ; (80055b0 ) + 8005430: 69fb ldr r3, [r7, #28] + 8005432: 089b lsrs r3, r3, #2 + 8005434: 3302 adds r3, #2 + 8005436: f852 3023 ldr.w r3, [r2, r3, lsl #2] + 800543a: 61bb str r3, [r7, #24] + temp &= ~(((uint32_t)0x0F) << (4 * (position & 0x03))); + 800543c: 69fb ldr r3, [r7, #28] + 800543e: f003 0303 and.w r3, r3, #3 + 8005442: 009b lsls r3, r3, #2 + 8005444: 220f movs r2, #15 + 8005446: fa02 f303 lsl.w r3, r2, r3 + 800544a: 43db mvns r3, r3 + 800544c: 69ba ldr r2, [r7, #24] + 800544e: 4013 ands r3, r2 + 8005450: 61bb str r3, [r7, #24] + temp |= ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4 * (position & 0x03))); + 8005452: 687b ldr r3, [r7, #4] + 8005454: 4a57 ldr r2, [pc, #348] ; (80055b4 ) + 8005456: 4293 cmp r3, r2 + 8005458: d037 beq.n 80054ca + 800545a: 687b ldr r3, [r7, #4] + 800545c: 4a56 ldr r2, [pc, #344] ; (80055b8 ) + 800545e: 4293 cmp r3, r2 + 8005460: d031 beq.n 80054c6 + 8005462: 687b ldr r3, [r7, #4] + 8005464: 4a55 ldr r2, [pc, #340] ; (80055bc ) + 8005466: 4293 cmp r3, r2 + 8005468: d02b beq.n 80054c2 + 800546a: 687b ldr r3, [r7, #4] + 800546c: 4a54 ldr r2, [pc, #336] ; (80055c0 ) + 800546e: 4293 cmp r3, r2 + 8005470: d025 beq.n 80054be + 8005472: 687b ldr r3, [r7, #4] + 8005474: 4a53 ldr r2, [pc, #332] ; (80055c4 ) + 8005476: 4293 cmp r3, r2 + 8005478: d01f beq.n 80054ba + 800547a: 687b ldr r3, [r7, #4] + 800547c: 4a52 ldr r2, [pc, #328] ; (80055c8 ) + 800547e: 4293 cmp r3, r2 + 8005480: d019 beq.n 80054b6 + 8005482: 687b ldr r3, [r7, #4] + 8005484: 4a51 ldr r2, [pc, #324] ; (80055cc ) + 8005486: 4293 cmp r3, r2 + 8005488: d013 beq.n 80054b2 + 800548a: 687b ldr r3, [r7, #4] + 800548c: 4a50 ldr r2, [pc, #320] ; (80055d0 ) + 800548e: 4293 cmp r3, r2 + 8005490: d00d beq.n 80054ae + 8005492: 687b ldr r3, [r7, #4] + 8005494: 4a4f ldr r2, [pc, #316] ; (80055d4 ) + 8005496: 4293 cmp r3, r2 + 8005498: d007 beq.n 80054aa + 800549a: 687b ldr r3, [r7, #4] + 800549c: 4a4e ldr r2, [pc, #312] ; (80055d8 ) + 800549e: 4293 cmp r3, r2 + 80054a0: d101 bne.n 80054a6 + 80054a2: 2309 movs r3, #9 + 80054a4: e012 b.n 80054cc + 80054a6: 230a movs r3, #10 + 80054a8: e010 b.n 80054cc + 80054aa: 2308 movs r3, #8 + 80054ac: e00e b.n 80054cc + 80054ae: 2307 movs r3, #7 + 80054b0: e00c b.n 80054cc + 80054b2: 2306 movs r3, #6 + 80054b4: e00a b.n 80054cc + 80054b6: 2305 movs r3, #5 + 80054b8: e008 b.n 80054cc + 80054ba: 2304 movs r3, #4 + 80054bc: e006 b.n 80054cc + 80054be: 2303 movs r3, #3 + 80054c0: e004 b.n 80054cc + 80054c2: 2302 movs r3, #2 + 80054c4: e002 b.n 80054cc + 80054c6: 2301 movs r3, #1 + 80054c8: e000 b.n 80054cc + 80054ca: 2300 movs r3, #0 + 80054cc: 69fa ldr r2, [r7, #28] + 80054ce: f002 0203 and.w r2, r2, #3 + 80054d2: 0092 lsls r2, r2, #2 + 80054d4: 4093 lsls r3, r2 + 80054d6: 69ba ldr r2, [r7, #24] + 80054d8: 4313 orrs r3, r2 + 80054da: 61bb str r3, [r7, #24] + SYSCFG->EXTICR[position >> 2] = temp; + 80054dc: 4934 ldr r1, [pc, #208] ; (80055b0 ) + 80054de: 69fb ldr r3, [r7, #28] + 80054e0: 089b lsrs r3, r3, #2 + 80054e2: 3302 adds r3, #2 + 80054e4: 69ba ldr r2, [r7, #24] + 80054e6: f841 2023 str.w r2, [r1, r3, lsl #2] + + /* Clear EXTI line configuration */ + temp = EXTI->IMR; + 80054ea: 4b3c ldr r3, [pc, #240] ; (80055dc ) + 80054ec: 681b ldr r3, [r3, #0] + 80054ee: 61bb str r3, [r7, #24] + temp &= ~((uint32_t)iocurrent); + 80054f0: 693b ldr r3, [r7, #16] + 80054f2: 43db mvns r3, r3 + 80054f4: 69ba ldr r2, [r7, #24] + 80054f6: 4013 ands r3, r2 + 80054f8: 61bb str r3, [r7, #24] + if((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) + 80054fa: 683b ldr r3, [r7, #0] + 80054fc: 685b ldr r3, [r3, #4] + 80054fe: f403 3380 and.w r3, r3, #65536 ; 0x10000 + 8005502: 2b00 cmp r3, #0 + 8005504: d003 beq.n 800550e + { + temp |= iocurrent; + 8005506: 69ba ldr r2, [r7, #24] + 8005508: 693b ldr r3, [r7, #16] + 800550a: 4313 orrs r3, r2 + 800550c: 61bb str r3, [r7, #24] + } + EXTI->IMR = temp; + 800550e: 4a33 ldr r2, [pc, #204] ; (80055dc ) + 8005510: 69bb ldr r3, [r7, #24] + 8005512: 6013 str r3, [r2, #0] + + temp = EXTI->EMR; + 8005514: 4b31 ldr r3, [pc, #196] ; (80055dc ) + 8005516: 685b ldr r3, [r3, #4] + 8005518: 61bb str r3, [r7, #24] + temp &= ~((uint32_t)iocurrent); + 800551a: 693b ldr r3, [r7, #16] + 800551c: 43db mvns r3, r3 + 800551e: 69ba ldr r2, [r7, #24] + 8005520: 4013 ands r3, r2 + 8005522: 61bb str r3, [r7, #24] + if((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) + 8005524: 683b ldr r3, [r7, #0] + 8005526: 685b ldr r3, [r3, #4] + 8005528: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 800552c: 2b00 cmp r3, #0 + 800552e: d003 beq.n 8005538 + { + temp |= iocurrent; + 8005530: 69ba ldr r2, [r7, #24] + 8005532: 693b ldr r3, [r7, #16] + 8005534: 4313 orrs r3, r2 + 8005536: 61bb str r3, [r7, #24] + } + EXTI->EMR = temp; + 8005538: 4a28 ldr r2, [pc, #160] ; (80055dc ) + 800553a: 69bb ldr r3, [r7, #24] + 800553c: 6053 str r3, [r2, #4] + + /* Clear Rising Falling edge configuration */ + temp = EXTI->RTSR; + 800553e: 4b27 ldr r3, [pc, #156] ; (80055dc ) + 8005540: 689b ldr r3, [r3, #8] + 8005542: 61bb str r3, [r7, #24] + temp &= ~((uint32_t)iocurrent); + 8005544: 693b ldr r3, [r7, #16] + 8005546: 43db mvns r3, r3 + 8005548: 69ba ldr r2, [r7, #24] + 800554a: 4013 ands r3, r2 + 800554c: 61bb str r3, [r7, #24] + if((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) + 800554e: 683b ldr r3, [r7, #0] + 8005550: 685b ldr r3, [r3, #4] + 8005552: f403 1380 and.w r3, r3, #1048576 ; 0x100000 + 8005556: 2b00 cmp r3, #0 + 8005558: d003 beq.n 8005562 + { + temp |= iocurrent; + 800555a: 69ba ldr r2, [r7, #24] + 800555c: 693b ldr r3, [r7, #16] + 800555e: 4313 orrs r3, r2 + 8005560: 61bb str r3, [r7, #24] + } + EXTI->RTSR = temp; + 8005562: 4a1e ldr r2, [pc, #120] ; (80055dc ) + 8005564: 69bb ldr r3, [r7, #24] + 8005566: 6093 str r3, [r2, #8] + + temp = EXTI->FTSR; + 8005568: 4b1c ldr r3, [pc, #112] ; (80055dc ) + 800556a: 68db ldr r3, [r3, #12] + 800556c: 61bb str r3, [r7, #24] + temp &= ~((uint32_t)iocurrent); + 800556e: 693b ldr r3, [r7, #16] + 8005570: 43db mvns r3, r3 + 8005572: 69ba ldr r2, [r7, #24] + 8005574: 4013 ands r3, r2 + 8005576: 61bb str r3, [r7, #24] + if((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) + 8005578: 683b ldr r3, [r7, #0] + 800557a: 685b ldr r3, [r3, #4] + 800557c: f403 1300 and.w r3, r3, #2097152 ; 0x200000 + 8005580: 2b00 cmp r3, #0 + 8005582: d003 beq.n 800558c + { + temp |= iocurrent; + 8005584: 69ba ldr r2, [r7, #24] + 8005586: 693b ldr r3, [r7, #16] + 8005588: 4313 orrs r3, r2 + 800558a: 61bb str r3, [r7, #24] + } + EXTI->FTSR = temp; + 800558c: 4a13 ldr r2, [pc, #76] ; (80055dc ) + 800558e: 69bb ldr r3, [r7, #24] + 8005590: 60d3 str r3, [r2, #12] + for(position = 0; position < GPIO_NUMBER; position++) + 8005592: 69fb ldr r3, [r7, #28] + 8005594: 3301 adds r3, #1 + 8005596: 61fb str r3, [r7, #28] + 8005598: 69fb ldr r3, [r7, #28] + 800559a: 2b0f cmp r3, #15 + 800559c: f67f ae86 bls.w 80052ac + } + } + } +} + 80055a0: bf00 nop + 80055a2: 3724 adds r7, #36 ; 0x24 + 80055a4: 46bd mov sp, r7 + 80055a6: f85d 7b04 ldr.w r7, [sp], #4 + 80055aa: 4770 bx lr + 80055ac: 40023800 .word 0x40023800 + 80055b0: 40013800 .word 0x40013800 + 80055b4: 40020000 .word 0x40020000 + 80055b8: 40020400 .word 0x40020400 + 80055bc: 40020800 .word 0x40020800 + 80055c0: 40020c00 .word 0x40020c00 + 80055c4: 40021000 .word 0x40021000 + 80055c8: 40021400 .word 0x40021400 + 80055cc: 40021800 .word 0x40021800 + 80055d0: 40021c00 .word 0x40021c00 + 80055d4: 40022000 .word 0x40022000 + 80055d8: 40022400 .word 0x40022400 + 80055dc: 40013c00 .word 0x40013c00 + +080055e0 : + * @arg GPIO_PIN_RESET: to clear the port pin + * @arg GPIO_PIN_SET: to set the port pin * @retval None */ -void TIM_CCxChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelState) +void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) { - 80033a4: b480 push {r7} - 80033a6: b087 sub sp, #28 - 80033a8: af00 add r7, sp, #0 - 80033aa: 60f8 str r0, [r7, #12] - 80033ac: 60b9 str r1, [r7, #8] - 80033ae: 607a str r2, [r7, #4] - + 80055e0: b480 push {r7} + 80055e2: b083 sub sp, #12 + 80055e4: af00 add r7, sp, #0 + 80055e6: 6078 str r0, [r7, #4] + 80055e8: 460b mov r3, r1 + 80055ea: 807b strh r3, [r7, #2] + 80055ec: 4613 mov r3, r2 + 80055ee: 707b strb r3, [r7, #1] /* Check the parameters */ - assert_param(IS_TIM_CC1_INSTANCE(TIMx)); - assert_param(IS_TIM_CHANNELS(Channel)); - - tmp = TIM_CCER_CC1E << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */ - 80033b0: 68bb ldr r3, [r7, #8] - 80033b2: f003 031f and.w r3, r3, #31 - 80033b6: 2201 movs r2, #1 - 80033b8: fa02 f303 lsl.w r3, r2, r3 - 80033bc: 617b str r3, [r7, #20] - - /* Reset the CCxE Bit */ - TIMx->CCER &= ~tmp; - 80033be: 68fb ldr r3, [r7, #12] - 80033c0: 6a1a ldr r2, [r3, #32] - 80033c2: 697b ldr r3, [r7, #20] - 80033c4: 43db mvns r3, r3 - 80033c6: 401a ands r2, r3 - 80033c8: 68fb ldr r3, [r7, #12] - 80033ca: 621a str r2, [r3, #32] + assert_param(IS_GPIO_PIN(GPIO_Pin)); + assert_param(IS_GPIO_PIN_ACTION(PinState)); - /* Set or reset the CCxE Bit */ - TIMx->CCER |= (uint32_t)(ChannelState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */ - 80033cc: 68fb ldr r3, [r7, #12] - 80033ce: 6a1a ldr r2, [r3, #32] - 80033d0: 68bb ldr r3, [r7, #8] - 80033d2: f003 031f and.w r3, r3, #31 - 80033d6: 6879 ldr r1, [r7, #4] - 80033d8: fa01 f303 lsl.w r3, r1, r3 - 80033dc: 431a orrs r2, r3 - 80033de: 68fb ldr r3, [r7, #12] - 80033e0: 621a str r2, [r3, #32] + if(PinState != GPIO_PIN_RESET) + 80055f0: 787b ldrb r3, [r7, #1] + 80055f2: 2b00 cmp r3, #0 + 80055f4: d003 beq.n 80055fe + { + GPIOx->BSRR = GPIO_Pin; + 80055f6: 887a ldrh r2, [r7, #2] + 80055f8: 687b ldr r3, [r7, #4] + 80055fa: 619a str r2, [r3, #24] + } + else + { + GPIOx->BSRR = (uint32_t)GPIO_Pin << 16; + } +} + 80055fc: e003 b.n 8005606 + GPIOx->BSRR = (uint32_t)GPIO_Pin << 16; + 80055fe: 887b ldrh r3, [r7, #2] + 8005600: 041a lsls r2, r3, #16 + 8005602: 687b ldr r3, [r7, #4] + 8005604: 619a str r2, [r3, #24] } - 80033e2: bf00 nop - 80033e4: 371c adds r7, #28 - 80033e6: 46bd mov sp, r7 - 80033e8: f85d 7b04 ldr.w r7, [sp], #4 - 80033ec: 4770 bx lr + 8005606: bf00 nop + 8005608: 370c adds r7, #12 + 800560a: 46bd mov sp, r7 + 800560c: f85d 7b04 ldr.w r7, [sp], #4 + 8005610: 4770 bx lr ... -080033f0 : - * mode. +08005614 : + * supported by this function. User should request a transition to HSE Off + * first and then HSE On or HSE Bypass. * @retval HAL status */ -HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, - TIM_MasterConfigTypeDef *sMasterConfig) +HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) { - 80033f0: b480 push {r7} - 80033f2: b085 sub sp, #20 - 80033f4: af00 add r7, sp, #0 - 80033f6: 6078 str r0, [r7, #4] - 80033f8: 6039 str r1, [r7, #0] - assert_param(IS_TIM_SYNCHRO_INSTANCE(htim->Instance)); - assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); - assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); - - /* Check input state */ - __HAL_LOCK(htim); - 80033fa: 687b ldr r3, [r7, #4] - 80033fc: f893 303c ldrb.w r3, [r3, #60] ; 0x3c - 8003400: 2b01 cmp r3, #1 - 8003402: d101 bne.n 8003408 - 8003404: 2302 movs r3, #2 - 8003406: e045 b.n 8003494 - 8003408: 687b ldr r3, [r7, #4] - 800340a: 2201 movs r2, #1 - 800340c: f883 203c strb.w r2, [r3, #60] ; 0x3c - - /* Change the handler state */ - htim->State = HAL_TIM_STATE_BUSY; - 8003410: 687b ldr r3, [r7, #4] - 8003412: 2202 movs r2, #2 - 8003414: f883 203d strb.w r2, [r3, #61] ; 0x3d + 8005614: b580 push {r7, lr} + 8005616: b086 sub sp, #24 + 8005618: af00 add r7, sp, #0 + 800561a: 6078 str r0, [r7, #4] + uint32_t tickstart; + FlagStatus pwrclkchanged = RESET; + 800561c: 2300 movs r3, #0 + 800561e: 75fb strb r3, [r7, #23] - /* Get the TIMx CR2 register value */ - tmpcr2 = htim->Instance->CR2; - 8003418: 687b ldr r3, [r7, #4] - 800341a: 681b ldr r3, [r3, #0] - 800341c: 685b ldr r3, [r3, #4] - 800341e: 60fb str r3, [r7, #12] + /* Check Null pointer */ + if(RCC_OscInitStruct == NULL) + 8005620: 687b ldr r3, [r7, #4] + 8005622: 2b00 cmp r3, #0 + 8005624: d101 bne.n 800562a + { + return HAL_ERROR; + 8005626: 2301 movs r3, #1 + 8005628: e25e b.n 8005ae8 - /* Get the TIMx SMCR register value */ - tmpsmcr = htim->Instance->SMCR; - 8003420: 687b ldr r3, [r7, #4] - 8003422: 681b ldr r3, [r3, #0] - 8003424: 689b ldr r3, [r3, #8] - 8003426: 60bb str r3, [r7, #8] + /* Check the parameters */ + assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); - /* If the timer supports ADC synchronization through TRGO2, set the master mode selection 2 */ - if (IS_TIM_TRGO2_INSTANCE(htim->Instance)) - 8003428: 687b ldr r3, [r7, #4] - 800342a: 681b ldr r3, [r3, #0] - 800342c: 4a1c ldr r2, [pc, #112] ; (80034a0 ) - 800342e: 4293 cmp r3, r2 - 8003430: d004 beq.n 800343c - 8003432: 687b ldr r3, [r7, #4] - 8003434: 681b ldr r3, [r3, #0] - 8003436: 4a1b ldr r2, [pc, #108] ; (80034a4 ) - 8003438: 4293 cmp r3, r2 - 800343a: d108 bne.n 800344e + /*------------------------------- HSE Configuration ------------------------*/ + if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) + 800562a: 687b ldr r3, [r7, #4] + 800562c: 681b ldr r3, [r3, #0] + 800562e: f003 0301 and.w r3, r3, #1 + 8005632: 2b00 cmp r3, #0 + 8005634: f000 8087 beq.w 8005746 { /* Check the parameters */ - assert_param(IS_TIM_TRGO2_SOURCE(sMasterConfig->MasterOutputTrigger2)); - - /* Clear the MMS2 bits */ - tmpcr2 &= ~TIM_CR2_MMS2; - 800343c: 68fb ldr r3, [r7, #12] - 800343e: f423 0370 bic.w r3, r3, #15728640 ; 0xf00000 - 8003442: 60fb str r3, [r7, #12] - /* Select the TRGO2 source*/ - tmpcr2 |= sMasterConfig->MasterOutputTrigger2; - 8003444: 683b ldr r3, [r7, #0] - 8003446: 685b ldr r3, [r3, #4] - 8003448: 68fa ldr r2, [r7, #12] - 800344a: 4313 orrs r3, r2 - 800344c: 60fb str r3, [r7, #12] - } - - /* Reset the MMS Bits */ - tmpcr2 &= ~TIM_CR2_MMS; - 800344e: 68fb ldr r3, [r7, #12] - 8003450: f023 0370 bic.w r3, r3, #112 ; 0x70 - 8003454: 60fb str r3, [r7, #12] - /* Select the TRGO source */ - tmpcr2 |= sMasterConfig->MasterOutputTrigger; - 8003456: 683b ldr r3, [r7, #0] - 8003458: 681b ldr r3, [r3, #0] - 800345a: 68fa ldr r2, [r7, #12] - 800345c: 4313 orrs r3, r2 - 800345e: 60fb str r3, [r7, #12] + assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); + /* When the HSE is used as system clock or clock source for PLL, It can not be disabled */ + if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) + 8005638: 4b96 ldr r3, [pc, #600] ; (8005894 ) + 800563a: 689b ldr r3, [r3, #8] + 800563c: f003 030c and.w r3, r3, #12 + 8005640: 2b04 cmp r3, #4 + 8005642: d00c beq.n 800565e + || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE))) + 8005644: 4b93 ldr r3, [pc, #588] ; (8005894 ) + 8005646: 689b ldr r3, [r3, #8] + 8005648: f003 030c and.w r3, r3, #12 + 800564c: 2b08 cmp r3, #8 + 800564e: d112 bne.n 8005676 + 8005650: 4b90 ldr r3, [pc, #576] ; (8005894 ) + 8005652: 685b ldr r3, [r3, #4] + 8005654: f403 0380 and.w r3, r3, #4194304 ; 0x400000 + 8005658: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000 + 800565c: d10b bne.n 8005676 + { + if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) + 800565e: 4b8d ldr r3, [pc, #564] ; (8005894 ) + 8005660: 681b ldr r3, [r3, #0] + 8005662: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 8005666: 2b00 cmp r3, #0 + 8005668: d06c beq.n 8005744 + 800566a: 687b ldr r3, [r7, #4] + 800566c: 685b ldr r3, [r3, #4] + 800566e: 2b00 cmp r3, #0 + 8005670: d168 bne.n 8005744 + { + return HAL_ERROR; + 8005672: 2301 movs r3, #1 + 8005674: e238 b.n 8005ae8 + } + } + else + { + /* Set the new HSE configuration ---------------------------------------*/ + __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); + 8005676: 687b ldr r3, [r7, #4] + 8005678: 685b ldr r3, [r3, #4] + 800567a: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 + 800567e: d106 bne.n 800568e + 8005680: 4b84 ldr r3, [pc, #528] ; (8005894 ) + 8005682: 681b ldr r3, [r3, #0] + 8005684: 4a83 ldr r2, [pc, #524] ; (8005894 ) + 8005686: f443 3380 orr.w r3, r3, #65536 ; 0x10000 + 800568a: 6013 str r3, [r2, #0] + 800568c: e02e b.n 80056ec + 800568e: 687b ldr r3, [r7, #4] + 8005690: 685b ldr r3, [r3, #4] + 8005692: 2b00 cmp r3, #0 + 8005694: d10c bne.n 80056b0 + 8005696: 4b7f ldr r3, [pc, #508] ; (8005894 ) + 8005698: 681b ldr r3, [r3, #0] + 800569a: 4a7e ldr r2, [pc, #504] ; (8005894 ) + 800569c: f423 3380 bic.w r3, r3, #65536 ; 0x10000 + 80056a0: 6013 str r3, [r2, #0] + 80056a2: 4b7c ldr r3, [pc, #496] ; (8005894 ) + 80056a4: 681b ldr r3, [r3, #0] + 80056a6: 4a7b ldr r2, [pc, #492] ; (8005894 ) + 80056a8: f423 2380 bic.w r3, r3, #262144 ; 0x40000 + 80056ac: 6013 str r3, [r2, #0] + 80056ae: e01d b.n 80056ec + 80056b0: 687b ldr r3, [r7, #4] + 80056b2: 685b ldr r3, [r3, #4] + 80056b4: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000 + 80056b8: d10c bne.n 80056d4 + 80056ba: 4b76 ldr r3, [pc, #472] ; (8005894 ) + 80056bc: 681b ldr r3, [r3, #0] + 80056be: 4a75 ldr r2, [pc, #468] ; (8005894 ) + 80056c0: f443 2380 orr.w r3, r3, #262144 ; 0x40000 + 80056c4: 6013 str r3, [r2, #0] + 80056c6: 4b73 ldr r3, [pc, #460] ; (8005894 ) + 80056c8: 681b ldr r3, [r3, #0] + 80056ca: 4a72 ldr r2, [pc, #456] ; (8005894 ) + 80056cc: f443 3380 orr.w r3, r3, #65536 ; 0x10000 + 80056d0: 6013 str r3, [r2, #0] + 80056d2: e00b b.n 80056ec + 80056d4: 4b6f ldr r3, [pc, #444] ; (8005894 ) + 80056d6: 681b ldr r3, [r3, #0] + 80056d8: 4a6e ldr r2, [pc, #440] ; (8005894 ) + 80056da: f423 3380 bic.w r3, r3, #65536 ; 0x10000 + 80056de: 6013 str r3, [r2, #0] + 80056e0: 4b6c ldr r3, [pc, #432] ; (8005894 ) + 80056e2: 681b ldr r3, [r3, #0] + 80056e4: 4a6b ldr r2, [pc, #428] ; (8005894 ) + 80056e6: f423 2380 bic.w r3, r3, #262144 ; 0x40000 + 80056ea: 6013 str r3, [r2, #0] - /* Reset the MSM Bit */ - tmpsmcr &= ~TIM_SMCR_MSM; - 8003460: 68bb ldr r3, [r7, #8] - 8003462: f023 0380 bic.w r3, r3, #128 ; 0x80 - 8003466: 60bb str r3, [r7, #8] - /* Set master mode */ - tmpsmcr |= sMasterConfig->MasterSlaveMode; - 8003468: 683b ldr r3, [r7, #0] - 800346a: 689b ldr r3, [r3, #8] - 800346c: 68ba ldr r2, [r7, #8] - 800346e: 4313 orrs r3, r2 - 8003470: 60bb str r3, [r7, #8] + /* Check the HSE State */ + if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF) + 80056ec: 687b ldr r3, [r7, #4] + 80056ee: 685b ldr r3, [r3, #4] + 80056f0: 2b00 cmp r3, #0 + 80056f2: d013 beq.n 800571c + { + /* Get Start Tick*/ + tickstart = HAL_GetTick(); + 80056f4: f7ff f914 bl 8004920 + 80056f8: 6138 str r0, [r7, #16] - /* Update TIMx CR2 */ - htim->Instance->CR2 = tmpcr2; - 8003472: 687b ldr r3, [r7, #4] - 8003474: 681b ldr r3, [r3, #0] - 8003476: 68fa ldr r2, [r7, #12] - 8003478: 605a str r2, [r3, #4] + /* Wait till HSE is ready */ + while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) + 80056fa: e008 b.n 800570e + { + if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) + 80056fc: f7ff f910 bl 8004920 + 8005700: 4602 mov r2, r0 + 8005702: 693b ldr r3, [r7, #16] + 8005704: 1ad3 subs r3, r2, r3 + 8005706: 2b64 cmp r3, #100 ; 0x64 + 8005708: d901 bls.n 800570e + { + return HAL_TIMEOUT; + 800570a: 2303 movs r3, #3 + 800570c: e1ec b.n 8005ae8 + while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) + 800570e: 4b61 ldr r3, [pc, #388] ; (8005894 ) + 8005710: 681b ldr r3, [r3, #0] + 8005712: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 8005716: 2b00 cmp r3, #0 + 8005718: d0f0 beq.n 80056fc + 800571a: e014 b.n 8005746 + } + } + else + { + /* Get Start Tick*/ + tickstart = HAL_GetTick(); + 800571c: f7ff f900 bl 8004920 + 8005720: 6138 str r0, [r7, #16] - /* Update TIMx SMCR */ - htim->Instance->SMCR = tmpsmcr; - 800347a: 687b ldr r3, [r7, #4] - 800347c: 681b ldr r3, [r3, #0] - 800347e: 68ba ldr r2, [r7, #8] - 8003480: 609a str r2, [r3, #8] + /* Wait till HSE is bypassed or disabled */ + while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) + 8005722: e008 b.n 8005736 + { + if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) + 8005724: f7ff f8fc bl 8004920 + 8005728: 4602 mov r2, r0 + 800572a: 693b ldr r3, [r7, #16] + 800572c: 1ad3 subs r3, r2, r3 + 800572e: 2b64 cmp r3, #100 ; 0x64 + 8005730: d901 bls.n 8005736 + { + return HAL_TIMEOUT; + 8005732: 2303 movs r3, #3 + 8005734: e1d8 b.n 8005ae8 + while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) + 8005736: 4b57 ldr r3, [pc, #348] ; (8005894 ) + 8005738: 681b ldr r3, [r3, #0] + 800573a: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 800573e: 2b00 cmp r3, #0 + 8005740: d1f0 bne.n 8005724 + 8005742: e000 b.n 8005746 + if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) + 8005744: bf00 nop + } + } + } + } + /*----------------------------- HSI Configuration --------------------------*/ + if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) + 8005746: 687b ldr r3, [r7, #4] + 8005748: 681b ldr r3, [r3, #0] + 800574a: f003 0302 and.w r3, r3, #2 + 800574e: 2b00 cmp r3, #0 + 8005750: d069 beq.n 8005826 + /* Check the parameters */ + assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); + assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); - /* Change the htim state */ - htim->State = HAL_TIM_STATE_READY; - 8003482: 687b ldr r3, [r7, #4] - 8003484: 2201 movs r2, #1 - 8003486: f883 203d strb.w r2, [r3, #61] ; 0x3d + /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */ + if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) + 8005752: 4b50 ldr r3, [pc, #320] ; (8005894 ) + 8005754: 689b ldr r3, [r3, #8] + 8005756: f003 030c and.w r3, r3, #12 + 800575a: 2b00 cmp r3, #0 + 800575c: d00b beq.n 8005776 + || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI))) + 800575e: 4b4d ldr r3, [pc, #308] ; (8005894 ) + 8005760: 689b ldr r3, [r3, #8] + 8005762: f003 030c and.w r3, r3, #12 + 8005766: 2b08 cmp r3, #8 + 8005768: d11c bne.n 80057a4 + 800576a: 4b4a ldr r3, [pc, #296] ; (8005894 ) + 800576c: 685b ldr r3, [r3, #4] + 800576e: f403 0380 and.w r3, r3, #4194304 ; 0x400000 + 8005772: 2b00 cmp r3, #0 + 8005774: d116 bne.n 80057a4 + { + /* When HSI is used as system clock it will not disabled */ + if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) + 8005776: 4b47 ldr r3, [pc, #284] ; (8005894 ) + 8005778: 681b ldr r3, [r3, #0] + 800577a: f003 0302 and.w r3, r3, #2 + 800577e: 2b00 cmp r3, #0 + 8005780: d005 beq.n 800578e + 8005782: 687b ldr r3, [r7, #4] + 8005784: 68db ldr r3, [r3, #12] + 8005786: 2b01 cmp r3, #1 + 8005788: d001 beq.n 800578e + { + return HAL_ERROR; + 800578a: 2301 movs r3, #1 + 800578c: e1ac b.n 8005ae8 + } + /* Otherwise, just the calibration is allowed */ + else + { + /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ + __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); + 800578e: 4b41 ldr r3, [pc, #260] ; (8005894 ) + 8005790: 681b ldr r3, [r3, #0] + 8005792: f023 02f8 bic.w r2, r3, #248 ; 0xf8 + 8005796: 687b ldr r3, [r7, #4] + 8005798: 691b ldr r3, [r3, #16] + 800579a: 00db lsls r3, r3, #3 + 800579c: 493d ldr r1, [pc, #244] ; (8005894 ) + 800579e: 4313 orrs r3, r2 + 80057a0: 600b str r3, [r1, #0] + if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) + 80057a2: e040 b.n 8005826 + } + } + else + { + /* Check the HSI State */ + if((RCC_OscInitStruct->HSIState)!= RCC_HSI_OFF) + 80057a4: 687b ldr r3, [r7, #4] + 80057a6: 68db ldr r3, [r3, #12] + 80057a8: 2b00 cmp r3, #0 + 80057aa: d023 beq.n 80057f4 + { + /* Enable the Internal High Speed oscillator (HSI). */ + __HAL_RCC_HSI_ENABLE(); + 80057ac: 4b39 ldr r3, [pc, #228] ; (8005894 ) + 80057ae: 681b ldr r3, [r3, #0] + 80057b0: 4a38 ldr r2, [pc, #224] ; (8005894 ) + 80057b2: f043 0301 orr.w r3, r3, #1 + 80057b6: 6013 str r3, [r2, #0] - __HAL_UNLOCK(htim); - 800348a: 687b ldr r3, [r7, #4] - 800348c: 2200 movs r2, #0 - 800348e: f883 203c strb.w r2, [r3, #60] ; 0x3c + /* Get Start Tick*/ + tickstart = HAL_GetTick(); + 80057b8: f7ff f8b2 bl 8004920 + 80057bc: 6138 str r0, [r7, #16] - return HAL_OK; - 8003492: 2300 movs r3, #0 -} - 8003494: 4618 mov r0, r3 - 8003496: 3714 adds r7, #20 - 8003498: 46bd mov sp, r7 - 800349a: f85d 7b04 ldr.w r7, [sp], #4 - 800349e: 4770 bx lr - 80034a0: 40010000 .word 0x40010000 - 80034a4: 40010400 .word 0x40010400 - -080034a8 : - * @brief Hall commutation changed callback in non-blocking mode - * @param htim TIM handle - * @retval None - */ -__weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim) -{ - 80034a8: b480 push {r7} - 80034aa: b083 sub sp, #12 - 80034ac: af00 add r7, sp, #0 - 80034ae: 6078 str r0, [r7, #4] - UNUSED(htim); + /* Wait till HSI is ready */ + while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) + 80057be: e008 b.n 80057d2 + { + if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) + 80057c0: f7ff f8ae bl 8004920 + 80057c4: 4602 mov r2, r0 + 80057c6: 693b ldr r3, [r7, #16] + 80057c8: 1ad3 subs r3, r2, r3 + 80057ca: 2b02 cmp r3, #2 + 80057cc: d901 bls.n 80057d2 + { + return HAL_TIMEOUT; + 80057ce: 2303 movs r3, #3 + 80057d0: e18a b.n 8005ae8 + while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) + 80057d2: 4b30 ldr r3, [pc, #192] ; (8005894 ) + 80057d4: 681b ldr r3, [r3, #0] + 80057d6: f003 0302 and.w r3, r3, #2 + 80057da: 2b00 cmp r3, #0 + 80057dc: d0f0 beq.n 80057c0 + } + } - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIMEx_CommutCallback could be implemented in the user file - */ -} - 80034b0: bf00 nop - 80034b2: 370c adds r7, #12 - 80034b4: 46bd mov sp, r7 - 80034b6: f85d 7b04 ldr.w r7, [sp], #4 - 80034ba: 4770 bx lr + /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ + __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); + 80057de: 4b2d ldr r3, [pc, #180] ; (8005894 ) + 80057e0: 681b ldr r3, [r3, #0] + 80057e2: f023 02f8 bic.w r2, r3, #248 ; 0xf8 + 80057e6: 687b ldr r3, [r7, #4] + 80057e8: 691b ldr r3, [r3, #16] + 80057ea: 00db lsls r3, r3, #3 + 80057ec: 4929 ldr r1, [pc, #164] ; (8005894 ) + 80057ee: 4313 orrs r3, r2 + 80057f0: 600b str r3, [r1, #0] + 80057f2: e018 b.n 8005826 + } + else + { + /* Disable the Internal High Speed oscillator (HSI). */ + __HAL_RCC_HSI_DISABLE(); + 80057f4: 4b27 ldr r3, [pc, #156] ; (8005894 ) + 80057f6: 681b ldr r3, [r3, #0] + 80057f8: 4a26 ldr r2, [pc, #152] ; (8005894 ) + 80057fa: f023 0301 bic.w r3, r3, #1 + 80057fe: 6013 str r3, [r2, #0] -080034bc : - * @brief Hall Break detection callback in non-blocking mode - * @param htim TIM handle - * @retval None - */ -__weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) -{ - 80034bc: b480 push {r7} - 80034be: b083 sub sp, #12 - 80034c0: af00 add r7, sp, #0 - 80034c2: 6078 str r0, [r7, #4] - UNUSED(htim); + /* Get Start Tick*/ + tickstart = HAL_GetTick(); + 8005800: f7ff f88e bl 8004920 + 8005804: 6138 str r0, [r7, #16] - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIMEx_BreakCallback could be implemented in the user file - */ -} - 80034c4: bf00 nop - 80034c6: 370c adds r7, #12 - 80034c8: 46bd mov sp, r7 - 80034ca: f85d 7b04 ldr.w r7, [sp], #4 - 80034ce: 4770 bx lr + /* Wait till HSI is ready */ + while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) + 8005806: e008 b.n 800581a + { + if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) + 8005808: f7ff f88a bl 8004920 + 800580c: 4602 mov r2, r0 + 800580e: 693b ldr r3, [r7, #16] + 8005810: 1ad3 subs r3, r2, r3 + 8005812: 2b02 cmp r3, #2 + 8005814: d901 bls.n 800581a + { + return HAL_TIMEOUT; + 8005816: 2303 movs r3, #3 + 8005818: e166 b.n 8005ae8 + while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) + 800581a: 4b1e ldr r3, [pc, #120] ; (8005894 ) + 800581c: 681b ldr r3, [r3, #0] + 800581e: f003 0302 and.w r3, r3, #2 + 8005822: 2b00 cmp r3, #0 + 8005824: d1f0 bne.n 8005808 + } + } + } + } + /*------------------------------ LSI Configuration -------------------------*/ + if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) + 8005826: 687b ldr r3, [r7, #4] + 8005828: 681b ldr r3, [r3, #0] + 800582a: f003 0308 and.w r3, r3, #8 + 800582e: 2b00 cmp r3, #0 + 8005830: d038 beq.n 80058a4 + { + /* Check the parameters */ + assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); -080034d0 : - * @brief Hall Break2 detection callback in non blocking mode - * @param htim: TIM handle - * @retval None - */ -__weak void HAL_TIMEx_Break2Callback(TIM_HandleTypeDef *htim) -{ - 80034d0: b480 push {r7} - 80034d2: b083 sub sp, #12 - 80034d4: af00 add r7, sp, #0 - 80034d6: 6078 str r0, [r7, #4] - UNUSED(htim); + /* Check the LSI State */ + if((RCC_OscInitStruct->LSIState)!= RCC_LSI_OFF) + 8005832: 687b ldr r3, [r7, #4] + 8005834: 695b ldr r3, [r3, #20] + 8005836: 2b00 cmp r3, #0 + 8005838: d019 beq.n 800586e + { + /* Enable the Internal Low Speed oscillator (LSI). */ + __HAL_RCC_LSI_ENABLE(); + 800583a: 4b16 ldr r3, [pc, #88] ; (8005894 ) + 800583c: 6f5b ldr r3, [r3, #116] ; 0x74 + 800583e: 4a15 ldr r2, [pc, #84] ; (8005894 ) + 8005840: f043 0301 orr.w r3, r3, #1 + 8005844: 6753 str r3, [r2, #116] ; 0x74 - /* NOTE : This function Should not be modified, when the callback is needed, - the HAL_TIMEx_Break2Callback could be implemented in the user file - */ -} - 80034d8: bf00 nop - 80034da: 370c adds r7, #12 - 80034dc: 46bd mov sp, r7 - 80034de: f85d 7b04 ldr.w r7, [sp], #4 - 80034e2: 4770 bx lr + /* Get Start Tick*/ + tickstart = HAL_GetTick(); + 8005846: f7ff f86b bl 8004920 + 800584a: 6138 str r0, [r7, #16] -080034e4 : - * parameters in the UART_InitTypeDef and initialize the associated handle. - * @param huart UART handle. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart) -{ - 80034e4: b580 push {r7, lr} - 80034e6: b082 sub sp, #8 - 80034e8: af00 add r7, sp, #0 - 80034ea: 6078 str r0, [r7, #4] - /* Check the UART handle allocation */ - if (huart == NULL) - 80034ec: 687b ldr r3, [r7, #4] - 80034ee: 2b00 cmp r3, #0 - 80034f0: d101 bne.n 80034f6 - { - return HAL_ERROR; - 80034f2: 2301 movs r3, #1 - 80034f4: e040 b.n 8003578 - { - /* Check the parameters */ - assert_param(IS_UART_INSTANCE(huart->Instance)); - } + /* Wait till LSI is ready */ + while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) + 800584c: e008 b.n 8005860 + { + if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) + 800584e: f7ff f867 bl 8004920 + 8005852: 4602 mov r2, r0 + 8005854: 693b ldr r3, [r7, #16] + 8005856: 1ad3 subs r3, r2, r3 + 8005858: 2b02 cmp r3, #2 + 800585a: d901 bls.n 8005860 + { + return HAL_TIMEOUT; + 800585c: 2303 movs r3, #3 + 800585e: e143 b.n 8005ae8 + while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) + 8005860: 4b0c ldr r3, [pc, #48] ; (8005894 ) + 8005862: 6f5b ldr r3, [r3, #116] ; 0x74 + 8005864: f003 0302 and.w r3, r3, #2 + 8005868: 2b00 cmp r3, #0 + 800586a: d0f0 beq.n 800584e + 800586c: e01a b.n 80058a4 + } + } + else + { + /* Disable the Internal Low Speed oscillator (LSI). */ + __HAL_RCC_LSI_DISABLE(); + 800586e: 4b09 ldr r3, [pc, #36] ; (8005894 ) + 8005870: 6f5b ldr r3, [r3, #116] ; 0x74 + 8005872: 4a08 ldr r2, [pc, #32] ; (8005894 ) + 8005874: f023 0301 bic.w r3, r3, #1 + 8005878: 6753 str r3, [r2, #116] ; 0x74 - if (huart->gState == HAL_UART_STATE_RESET) - 80034f6: 687b ldr r3, [r7, #4] - 80034f8: 6f5b ldr r3, [r3, #116] ; 0x74 - 80034fa: 2b00 cmp r3, #0 - 80034fc: d106 bne.n 800350c - { - /* Allocate lock resource and initialize it */ - huart->Lock = HAL_UNLOCKED; - 80034fe: 687b ldr r3, [r7, #4] - 8003500: 2200 movs r2, #0 - 8003502: f883 2070 strb.w r2, [r3, #112] ; 0x70 + /* Get Start Tick*/ + tickstart = HAL_GetTick(); + 800587a: f7ff f851 bl 8004920 + 800587e: 6138 str r0, [r7, #16] - /* Init the low level hardware */ - huart->MspInitCallback(huart); -#else - /* Init the low level hardware : GPIO, CLOCK */ - HAL_UART_MspInit(huart); - 8003506: 6878 ldr r0, [r7, #4] - 8003508: f004 fdfc bl 8008104 -#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ + /* Wait till LSI is ready */ + while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) + 8005880: e00a b.n 8005898 + { + if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) + 8005882: f7ff f84d bl 8004920 + 8005886: 4602 mov r2, r0 + 8005888: 693b ldr r3, [r7, #16] + 800588a: 1ad3 subs r3, r2, r3 + 800588c: 2b02 cmp r3, #2 + 800588e: d903 bls.n 8005898 + { + return HAL_TIMEOUT; + 8005890: 2303 movs r3, #3 + 8005892: e129 b.n 8005ae8 + 8005894: 40023800 .word 0x40023800 + while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) + 8005898: 4b95 ldr r3, [pc, #596] ; (8005af0 ) + 800589a: 6f5b ldr r3, [r3, #116] ; 0x74 + 800589c: f003 0302 and.w r3, r3, #2 + 80058a0: 2b00 cmp r3, #0 + 80058a2: d1ee bne.n 8005882 + } + } + } } + /*------------------------------ LSE Configuration -------------------------*/ + if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) + 80058a4: 687b ldr r3, [r7, #4] + 80058a6: 681b ldr r3, [r3, #0] + 80058a8: f003 0304 and.w r3, r3, #4 + 80058ac: 2b00 cmp r3, #0 + 80058ae: f000 80a4 beq.w 80059fa + /* Check the parameters */ + assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); - huart->gState = HAL_UART_STATE_BUSY; - 800350c: 687b ldr r3, [r7, #4] - 800350e: 2224 movs r2, #36 ; 0x24 - 8003510: 675a str r2, [r3, #116] ; 0x74 + /* Update LSE configuration in Backup Domain control register */ + /* Requires to enable write access to Backup Domain of necessary */ + if(__HAL_RCC_PWR_IS_CLK_DISABLED()) + 80058b2: 4b8f ldr r3, [pc, #572] ; (8005af0 ) + 80058b4: 6c1b ldr r3, [r3, #64] ; 0x40 + 80058b6: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 + 80058ba: 2b00 cmp r3, #0 + 80058bc: d10d bne.n 80058da + { + /* Enable Power Clock*/ + __HAL_RCC_PWR_CLK_ENABLE(); + 80058be: 4b8c ldr r3, [pc, #560] ; (8005af0 ) + 80058c0: 6c1b ldr r3, [r3, #64] ; 0x40 + 80058c2: 4a8b ldr r2, [pc, #556] ; (8005af0 ) + 80058c4: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 + 80058c8: 6413 str r3, [r2, #64] ; 0x40 + 80058ca: 4b89 ldr r3, [pc, #548] ; (8005af0 ) + 80058cc: 6c1b ldr r3, [r3, #64] ; 0x40 + 80058ce: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 + 80058d2: 60fb str r3, [r7, #12] + 80058d4: 68fb ldr r3, [r7, #12] + pwrclkchanged = SET; + 80058d6: 2301 movs r3, #1 + 80058d8: 75fb strb r3, [r7, #23] + } - /* Disable the Peripheral */ - __HAL_UART_DISABLE(huart); - 8003512: 687b ldr r3, [r7, #4] - 8003514: 681b ldr r3, [r3, #0] - 8003516: 681a ldr r2, [r3, #0] - 8003518: 687b ldr r3, [r7, #4] - 800351a: 681b ldr r3, [r3, #0] - 800351c: f022 0201 bic.w r2, r2, #1 - 8003520: 601a str r2, [r3, #0] + if(HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP)) + 80058da: 4b86 ldr r3, [pc, #536] ; (8005af4 ) + 80058dc: 681b ldr r3, [r3, #0] + 80058de: f403 7380 and.w r3, r3, #256 ; 0x100 + 80058e2: 2b00 cmp r3, #0 + 80058e4: d118 bne.n 8005918 + { + /* Enable write access to Backup domain */ + PWR->CR1 |= PWR_CR1_DBP; + 80058e6: 4b83 ldr r3, [pc, #524] ; (8005af4 ) + 80058e8: 681b ldr r3, [r3, #0] + 80058ea: 4a82 ldr r2, [pc, #520] ; (8005af4 ) + 80058ec: f443 7380 orr.w r3, r3, #256 ; 0x100 + 80058f0: 6013 str r3, [r2, #0] - /* Set the UART Communication parameters */ - if (UART_SetConfig(huart) == HAL_ERROR) - 8003522: 6878 ldr r0, [r7, #4] - 8003524: f000 fa66 bl 80039f4 - 8003528: 4603 mov r3, r0 - 800352a: 2b01 cmp r3, #1 - 800352c: d101 bne.n 8003532 - { - return HAL_ERROR; - 800352e: 2301 movs r3, #1 - 8003530: e022 b.n 8003578 - } + /* Wait for Backup domain Write protection disable */ + tickstart = HAL_GetTick(); + 80058f2: f7ff f815 bl 8004920 + 80058f6: 6138 str r0, [r7, #16] - if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) - 8003532: 687b ldr r3, [r7, #4] - 8003534: 6a5b ldr r3, [r3, #36] ; 0x24 - 8003536: 2b00 cmp r3, #0 - 8003538: d002 beq.n 8003540 - { - UART_AdvFeatureConfig(huart); - 800353a: 6878 ldr r0, [r7, #4] - 800353c: f000 fcfe bl 8003f3c - } + while(HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP)) + 80058f8: e008 b.n 800590c + { + if((HAL_GetTick() - tickstart ) > RCC_DBP_TIMEOUT_VALUE) + 80058fa: f7ff f811 bl 8004920 + 80058fe: 4602 mov r2, r0 + 8005900: 693b ldr r3, [r7, #16] + 8005902: 1ad3 subs r3, r2, r3 + 8005904: 2b64 cmp r3, #100 ; 0x64 + 8005906: d901 bls.n 800590c + { + return HAL_TIMEOUT; + 8005908: 2303 movs r3, #3 + 800590a: e0ed b.n 8005ae8 + while(HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP)) + 800590c: 4b79 ldr r3, [pc, #484] ; (8005af4 ) + 800590e: 681b ldr r3, [r3, #0] + 8005910: f403 7380 and.w r3, r3, #256 ; 0x100 + 8005914: 2b00 cmp r3, #0 + 8005916: d0f0 beq.n 80058fa + } + } + } - /* In asynchronous mode, the following bits must be kept cleared: - - LINEN and CLKEN bits in the USART_CR2 register, - - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/ - CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); - 8003540: 687b ldr r3, [r7, #4] - 8003542: 681b ldr r3, [r3, #0] - 8003544: 685a ldr r2, [r3, #4] - 8003546: 687b ldr r3, [r7, #4] - 8003548: 681b ldr r3, [r3, #0] - 800354a: f422 4290 bic.w r2, r2, #18432 ; 0x4800 - 800354e: 605a str r2, [r3, #4] - CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); - 8003550: 687b ldr r3, [r7, #4] - 8003552: 681b ldr r3, [r3, #0] - 8003554: 689a ldr r2, [r3, #8] - 8003556: 687b ldr r3, [r7, #4] - 8003558: 681b ldr r3, [r3, #0] - 800355a: f022 022a bic.w r2, r2, #42 ; 0x2a - 800355e: 609a str r2, [r3, #8] + /* Set the new LSE configuration -----------------------------------------*/ + __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); + 8005918: 687b ldr r3, [r7, #4] + 800591a: 689b ldr r3, [r3, #8] + 800591c: 2b01 cmp r3, #1 + 800591e: d106 bne.n 800592e + 8005920: 4b73 ldr r3, [pc, #460] ; (8005af0 ) + 8005922: 6f1b ldr r3, [r3, #112] ; 0x70 + 8005924: 4a72 ldr r2, [pc, #456] ; (8005af0 ) + 8005926: f043 0301 orr.w r3, r3, #1 + 800592a: 6713 str r3, [r2, #112] ; 0x70 + 800592c: e02d b.n 800598a + 800592e: 687b ldr r3, [r7, #4] + 8005930: 689b ldr r3, [r3, #8] + 8005932: 2b00 cmp r3, #0 + 8005934: d10c bne.n 8005950 + 8005936: 4b6e ldr r3, [pc, #440] ; (8005af0 ) + 8005938: 6f1b ldr r3, [r3, #112] ; 0x70 + 800593a: 4a6d ldr r2, [pc, #436] ; (8005af0 ) + 800593c: f023 0301 bic.w r3, r3, #1 + 8005940: 6713 str r3, [r2, #112] ; 0x70 + 8005942: 4b6b ldr r3, [pc, #428] ; (8005af0 ) + 8005944: 6f1b ldr r3, [r3, #112] ; 0x70 + 8005946: 4a6a ldr r2, [pc, #424] ; (8005af0 ) + 8005948: f023 0304 bic.w r3, r3, #4 + 800594c: 6713 str r3, [r2, #112] ; 0x70 + 800594e: e01c b.n 800598a + 8005950: 687b ldr r3, [r7, #4] + 8005952: 689b ldr r3, [r3, #8] + 8005954: 2b05 cmp r3, #5 + 8005956: d10c bne.n 8005972 + 8005958: 4b65 ldr r3, [pc, #404] ; (8005af0 ) + 800595a: 6f1b ldr r3, [r3, #112] ; 0x70 + 800595c: 4a64 ldr r2, [pc, #400] ; (8005af0 ) + 800595e: f043 0304 orr.w r3, r3, #4 + 8005962: 6713 str r3, [r2, #112] ; 0x70 + 8005964: 4b62 ldr r3, [pc, #392] ; (8005af0 ) + 8005966: 6f1b ldr r3, [r3, #112] ; 0x70 + 8005968: 4a61 ldr r2, [pc, #388] ; (8005af0 ) + 800596a: f043 0301 orr.w r3, r3, #1 + 800596e: 6713 str r3, [r2, #112] ; 0x70 + 8005970: e00b b.n 800598a + 8005972: 4b5f ldr r3, [pc, #380] ; (8005af0 ) + 8005974: 6f1b ldr r3, [r3, #112] ; 0x70 + 8005976: 4a5e ldr r2, [pc, #376] ; (8005af0 ) + 8005978: f023 0301 bic.w r3, r3, #1 + 800597c: 6713 str r3, [r2, #112] ; 0x70 + 800597e: 4b5c ldr r3, [pc, #368] ; (8005af0 ) + 8005980: 6f1b ldr r3, [r3, #112] ; 0x70 + 8005982: 4a5b ldr r2, [pc, #364] ; (8005af0 ) + 8005984: f023 0304 bic.w r3, r3, #4 + 8005988: 6713 str r3, [r2, #112] ; 0x70 + /* Check the LSE State */ + if((RCC_OscInitStruct->LSEState) != RCC_LSE_OFF) + 800598a: 687b ldr r3, [r7, #4] + 800598c: 689b ldr r3, [r3, #8] + 800598e: 2b00 cmp r3, #0 + 8005990: d015 beq.n 80059be + { + /* Get Start Tick*/ + tickstart = HAL_GetTick(); + 8005992: f7fe ffc5 bl 8004920 + 8005996: 6138 str r0, [r7, #16] - /* Enable the Peripheral */ - __HAL_UART_ENABLE(huart); - 8003560: 687b ldr r3, [r7, #4] - 8003562: 681b ldr r3, [r3, #0] - 8003564: 681a ldr r2, [r3, #0] - 8003566: 687b ldr r3, [r7, #4] - 8003568: 681b ldr r3, [r3, #0] - 800356a: f042 0201 orr.w r2, r2, #1 - 800356e: 601a str r2, [r3, #0] + /* Wait till LSE is ready */ + while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) + 8005998: e00a b.n 80059b0 + { + if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) + 800599a: f7fe ffc1 bl 8004920 + 800599e: 4602 mov r2, r0 + 80059a0: 693b ldr r3, [r7, #16] + 80059a2: 1ad3 subs r3, r2, r3 + 80059a4: f241 3288 movw r2, #5000 ; 0x1388 + 80059a8: 4293 cmp r3, r2 + 80059aa: d901 bls.n 80059b0 + { + return HAL_TIMEOUT; + 80059ac: 2303 movs r3, #3 + 80059ae: e09b b.n 8005ae8 + while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) + 80059b0: 4b4f ldr r3, [pc, #316] ; (8005af0 ) + 80059b2: 6f1b ldr r3, [r3, #112] ; 0x70 + 80059b4: f003 0302 and.w r3, r3, #2 + 80059b8: 2b00 cmp r3, #0 + 80059ba: d0ee beq.n 800599a + 80059bc: e014 b.n 80059e8 + } + } + else + { + /* Get Start Tick*/ + tickstart = HAL_GetTick(); + 80059be: f7fe ffaf bl 8004920 + 80059c2: 6138 str r0, [r7, #16] - /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */ - return (UART_CheckIdleState(huart)); - 8003570: 6878 ldr r0, [r7, #4] - 8003572: f000 fd85 bl 8004080 - 8003576: 4603 mov r3, r0 -} - 8003578: 4618 mov r0, r3 - 800357a: 3708 adds r7, #8 - 800357c: 46bd mov sp, r7 - 800357e: bd80 pop {r7, pc} + /* Wait till LSE is ready */ + while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) + 80059c4: e00a b.n 80059dc + { + if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) + 80059c6: f7fe ffab bl 8004920 + 80059ca: 4602 mov r2, r0 + 80059cc: 693b ldr r3, [r7, #16] + 80059ce: 1ad3 subs r3, r2, r3 + 80059d0: f241 3288 movw r2, #5000 ; 0x1388 + 80059d4: 4293 cmp r3, r2 + 80059d6: d901 bls.n 80059dc + { + return HAL_TIMEOUT; + 80059d8: 2303 movs r3, #3 + 80059da: e085 b.n 8005ae8 + while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) + 80059dc: 4b44 ldr r3, [pc, #272] ; (8005af0 ) + 80059de: 6f1b ldr r3, [r3, #112] ; 0x70 + 80059e0: f003 0302 and.w r3, r3, #2 + 80059e4: 2b00 cmp r3, #0 + 80059e6: d1ee bne.n 80059c6 + } + } + } -08003580 : - * @param pData Pointer to data buffer. - * @param Size Amount of data to be sent. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) -{ - 8003580: b580 push {r7, lr} - 8003582: b084 sub sp, #16 - 8003584: af00 add r7, sp, #0 - 8003586: 60f8 str r0, [r7, #12] - 8003588: 60b9 str r1, [r7, #8] - 800358a: 4613 mov r3, r2 - 800358c: 80fb strh r3, [r7, #6] - /* Check that a Tx process is not already ongoing */ - if (huart->gState == HAL_UART_STATE_READY) - 800358e: 68fb ldr r3, [r7, #12] - 8003590: 6f5b ldr r3, [r3, #116] ; 0x74 - 8003592: 2b20 cmp r3, #32 - 8003594: d164 bne.n 8003660 - { - if ((pData == NULL) || (Size == 0U)) - 8003596: 68bb ldr r3, [r7, #8] - 8003598: 2b00 cmp r3, #0 - 800359a: d002 beq.n 80035a2 - 800359c: 88fb ldrh r3, [r7, #6] - 800359e: 2b00 cmp r3, #0 - 80035a0: d101 bne.n 80035a6 + /* Restore clock configuration if changed */ + if(pwrclkchanged == SET) + 80059e8: 7dfb ldrb r3, [r7, #23] + 80059ea: 2b01 cmp r3, #1 + 80059ec: d105 bne.n 80059fa { - return HAL_ERROR; - 80035a2: 2301 movs r3, #1 - 80035a4: e05d b.n 8003662 + __HAL_RCC_PWR_CLK_DISABLE(); + 80059ee: 4b40 ldr r3, [pc, #256] ; (8005af0 ) + 80059f0: 6c1b ldr r3, [r3, #64] ; 0x40 + 80059f2: 4a3f ldr r2, [pc, #252] ; (8005af0 ) + 80059f4: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000 + 80059f8: 6413 str r3, [r2, #64] ; 0x40 } + } + /*-------------------------------- PLL Configuration -----------------------*/ + /* Check the parameters */ + assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); + if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) + 80059fa: 687b ldr r3, [r7, #4] + 80059fc: 699b ldr r3, [r3, #24] + 80059fe: 2b00 cmp r3, #0 + 8005a00: d071 beq.n 8005ae6 + { + /* Check if the PLL is used as system clock or not */ + if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) + 8005a02: 4b3b ldr r3, [pc, #236] ; (8005af0 ) + 8005a04: 689b ldr r3, [r3, #8] + 8005a06: f003 030c and.w r3, r3, #12 + 8005a0a: 2b08 cmp r3, #8 + 8005a0c: d069 beq.n 8005ae2 + { + if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) + 8005a0e: 687b ldr r3, [r7, #4] + 8005a10: 699b ldr r3, [r3, #24] + 8005a12: 2b02 cmp r3, #2 + 8005a14: d14b bne.n 8005aae +#if defined (RCC_PLLCFGR_PLLR) + assert_param(IS_RCC_PLLR_VALUE(RCC_OscInitStruct->PLL.PLLR)); +#endif - /* Process Locked */ - __HAL_LOCK(huart); - 80035a6: 68fb ldr r3, [r7, #12] - 80035a8: f893 3070 ldrb.w r3, [r3, #112] ; 0x70 - 80035ac: 2b01 cmp r3, #1 - 80035ae: d101 bne.n 80035b4 - 80035b0: 2302 movs r3, #2 - 80035b2: e056 b.n 8003662 - 80035b4: 68fb ldr r3, [r7, #12] - 80035b6: 2201 movs r2, #1 - 80035b8: f883 2070 strb.w r2, [r3, #112] ; 0x70 - - huart->pTxBuffPtr = pData; - 80035bc: 68fb ldr r3, [r7, #12] - 80035be: 68ba ldr r2, [r7, #8] - 80035c0: 64da str r2, [r3, #76] ; 0x4c - huart->TxXferSize = Size; - 80035c2: 68fb ldr r3, [r7, #12] - 80035c4: 88fa ldrh r2, [r7, #6] - 80035c6: f8a3 2050 strh.w r2, [r3, #80] ; 0x50 - huart->TxXferCount = Size; - 80035ca: 68fb ldr r3, [r7, #12] - 80035cc: 88fa ldrh r2, [r7, #6] - 80035ce: f8a3 2052 strh.w r2, [r3, #82] ; 0x52 + /* Disable the main PLL. */ + __HAL_RCC_PLL_DISABLE(); + 8005a16: 4b36 ldr r3, [pc, #216] ; (8005af0 ) + 8005a18: 681b ldr r3, [r3, #0] + 8005a1a: 4a35 ldr r2, [pc, #212] ; (8005af0 ) + 8005a1c: f023 7380 bic.w r3, r3, #16777216 ; 0x1000000 + 8005a20: 6013 str r3, [r2, #0] - huart->ErrorCode = HAL_UART_ERROR_NONE; - 80035d2: 68fb ldr r3, [r7, #12] - 80035d4: 2200 movs r2, #0 - 80035d6: 67da str r2, [r3, #124] ; 0x7c - huart->gState = HAL_UART_STATE_BUSY_TX; - 80035d8: 68fb ldr r3, [r7, #12] - 80035da: 2221 movs r2, #33 ; 0x21 - 80035dc: 675a str r2, [r3, #116] ; 0x74 + /* Get Start Tick*/ + tickstart = HAL_GetTick(); + 8005a22: f7fe ff7d bl 8004920 + 8005a26: 6138 str r0, [r7, #16] - if (huart->hdmatx != NULL) - 80035de: 68fb ldr r3, [r7, #12] - 80035e0: 6e9b ldr r3, [r3, #104] ; 0x68 - 80035e2: 2b00 cmp r3, #0 - 80035e4: d02a beq.n 800363c - { - /* Set the UART DMA transfer complete callback */ - huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt; - 80035e6: 68fb ldr r3, [r7, #12] - 80035e8: 6e9b ldr r3, [r3, #104] ; 0x68 - 80035ea: 4a20 ldr r2, [pc, #128] ; (800366c ) - 80035ec: 63da str r2, [r3, #60] ; 0x3c + /* Wait till PLL is ready */ + while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) + 8005a28: e008 b.n 8005a3c + { + if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) + 8005a2a: f7fe ff79 bl 8004920 + 8005a2e: 4602 mov r2, r0 + 8005a30: 693b ldr r3, [r7, #16] + 8005a32: 1ad3 subs r3, r2, r3 + 8005a34: 2b02 cmp r3, #2 + 8005a36: d901 bls.n 8005a3c + { + return HAL_TIMEOUT; + 8005a38: 2303 movs r3, #3 + 8005a3a: e055 b.n 8005ae8 + while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) + 8005a3c: 4b2c ldr r3, [pc, #176] ; (8005af0 ) + 8005a3e: 681b ldr r3, [r3, #0] + 8005a40: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 8005a44: 2b00 cmp r3, #0 + 8005a46: d1f0 bne.n 8005a2a + } + } - /* Set the UART DMA Half transfer complete callback */ - huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt; - 80035ee: 68fb ldr r3, [r7, #12] - 80035f0: 6e9b ldr r3, [r3, #104] ; 0x68 - 80035f2: 4a1f ldr r2, [pc, #124] ; (8003670 ) - 80035f4: 641a str r2, [r3, #64] ; 0x40 + /* Configure the main PLL clock source, multiplication and division factors. */ +#if defined (RCC_PLLCFGR_PLLR) + __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, + 8005a48: 687b ldr r3, [r7, #4] + 8005a4a: 69da ldr r2, [r3, #28] + 8005a4c: 687b ldr r3, [r7, #4] + 8005a4e: 6a1b ldr r3, [r3, #32] + 8005a50: 431a orrs r2, r3 + 8005a52: 687b ldr r3, [r7, #4] + 8005a54: 6a5b ldr r3, [r3, #36] ; 0x24 + 8005a56: 019b lsls r3, r3, #6 + 8005a58: 431a orrs r2, r3 + 8005a5a: 687b ldr r3, [r7, #4] + 8005a5c: 6a9b ldr r3, [r3, #40] ; 0x28 + 8005a5e: 085b lsrs r3, r3, #1 + 8005a60: 3b01 subs r3, #1 + 8005a62: 041b lsls r3, r3, #16 + 8005a64: 431a orrs r2, r3 + 8005a66: 687b ldr r3, [r7, #4] + 8005a68: 6adb ldr r3, [r3, #44] ; 0x2c + 8005a6a: 061b lsls r3, r3, #24 + 8005a6c: 431a orrs r2, r3 + 8005a6e: 687b ldr r3, [r7, #4] + 8005a70: 6b1b ldr r3, [r3, #48] ; 0x30 + 8005a72: 071b lsls r3, r3, #28 + 8005a74: 491e ldr r1, [pc, #120] ; (8005af0 ) + 8005a76: 4313 orrs r3, r2 + 8005a78: 604b str r3, [r1, #4] + RCC_OscInitStruct->PLL.PLLP, + RCC_OscInitStruct->PLL.PLLQ); +#endif - /* Set the DMA error callback */ - huart->hdmatx->XferErrorCallback = UART_DMAError; - 80035f6: 68fb ldr r3, [r7, #12] - 80035f8: 6e9b ldr r3, [r3, #104] ; 0x68 - 80035fa: 4a1e ldr r2, [pc, #120] ; (8003674 ) - 80035fc: 64da str r2, [r3, #76] ; 0x4c + /* Enable the main PLL. */ + __HAL_RCC_PLL_ENABLE(); + 8005a7a: 4b1d ldr r3, [pc, #116] ; (8005af0 ) + 8005a7c: 681b ldr r3, [r3, #0] + 8005a7e: 4a1c ldr r2, [pc, #112] ; (8005af0 ) + 8005a80: f043 7380 orr.w r3, r3, #16777216 ; 0x1000000 + 8005a84: 6013 str r3, [r2, #0] - /* Set the DMA abort callback */ - huart->hdmatx->XferAbortCallback = NULL; - 80035fe: 68fb ldr r3, [r7, #12] - 8003600: 6e9b ldr r3, [r3, #104] ; 0x68 - 8003602: 2200 movs r2, #0 - 8003604: 651a str r2, [r3, #80] ; 0x50 + /* Get Start Tick*/ + tickstart = HAL_GetTick(); + 8005a86: f7fe ff4b bl 8004920 + 8005a8a: 6138 str r0, [r7, #16] - /* Enable the UART transmit DMA channel */ - if (HAL_DMA_Start_IT(huart->hdmatx, (uint32_t)huart->pTxBuffPtr, (uint32_t)&huart->Instance->TDR, Size) != HAL_OK) - 8003606: 68fb ldr r3, [r7, #12] - 8003608: 6e98 ldr r0, [r3, #104] ; 0x68 - 800360a: 68fb ldr r3, [r7, #12] - 800360c: 6cdb ldr r3, [r3, #76] ; 0x4c - 800360e: 4619 mov r1, r3 - 8003610: 68fb ldr r3, [r7, #12] - 8003612: 681b ldr r3, [r3, #0] - 8003614: 3328 adds r3, #40 ; 0x28 - 8003616: 461a mov r2, r3 - 8003618: 88fb ldrh r3, [r7, #6] - 800361a: f7fd f9b3 bl 8000984 - 800361e: 4603 mov r3, r0 - 8003620: 2b00 cmp r3, #0 - 8003622: d00b beq.n 800363c + /* Wait till PLL is ready */ + while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) + 8005a8c: e008 b.n 8005aa0 + { + if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) + 8005a8e: f7fe ff47 bl 8004920 + 8005a92: 4602 mov r2, r0 + 8005a94: 693b ldr r3, [r7, #16] + 8005a96: 1ad3 subs r3, r2, r3 + 8005a98: 2b02 cmp r3, #2 + 8005a9a: d901 bls.n 8005aa0 + { + return HAL_TIMEOUT; + 8005a9c: 2303 movs r3, #3 + 8005a9e: e023 b.n 8005ae8 + while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) + 8005aa0: 4b13 ldr r3, [pc, #76] ; (8005af0 ) + 8005aa2: 681b ldr r3, [r3, #0] + 8005aa4: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 8005aa8: 2b00 cmp r3, #0 + 8005aaa: d0f0 beq.n 8005a8e + 8005aac: e01b b.n 8005ae6 + } + } + else { - /* Set error code to DMA */ - huart->ErrorCode = HAL_UART_ERROR_DMA; - 8003624: 68fb ldr r3, [r7, #12] - 8003626: 2210 movs r2, #16 - 8003628: 67da str r2, [r3, #124] ; 0x7c - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - 800362a: 68fb ldr r3, [r7, #12] - 800362c: 2200 movs r2, #0 - 800362e: f883 2070 strb.w r2, [r3, #112] ; 0x70 + /* Disable the main PLL. */ + __HAL_RCC_PLL_DISABLE(); + 8005aae: 4b10 ldr r3, [pc, #64] ; (8005af0 ) + 8005ab0: 681b ldr r3, [r3, #0] + 8005ab2: 4a0f ldr r2, [pc, #60] ; (8005af0 ) + 8005ab4: f023 7380 bic.w r3, r3, #16777216 ; 0x1000000 + 8005ab8: 6013 str r3, [r2, #0] - /* Restore huart->gState to ready */ - huart->gState = HAL_UART_STATE_READY; - 8003632: 68fb ldr r3, [r7, #12] - 8003634: 2220 movs r2, #32 - 8003636: 675a str r2, [r3, #116] ; 0x74 + /* Get Start Tick*/ + tickstart = HAL_GetTick(); + 8005aba: f7fe ff31 bl 8004920 + 8005abe: 6138 str r0, [r7, #16] - return HAL_ERROR; - 8003638: 2301 movs r3, #1 - 800363a: e012 b.n 8003662 + /* Wait till PLL is ready */ + while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) + 8005ac0: e008 b.n 8005ad4 + { + if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) + 8005ac2: f7fe ff2d bl 8004920 + 8005ac6: 4602 mov r2, r0 + 8005ac8: 693b ldr r3, [r7, #16] + 8005aca: 1ad3 subs r3, r2, r3 + 8005acc: 2b02 cmp r3, #2 + 8005ace: d901 bls.n 8005ad4 + { + return HAL_TIMEOUT; + 8005ad0: 2303 movs r3, #3 + 8005ad2: e009 b.n 8005ae8 + while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) + 8005ad4: 4b06 ldr r3, [pc, #24] ; (8005af0 ) + 8005ad6: 681b ldr r3, [r3, #0] + 8005ad8: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 8005adc: 2b00 cmp r3, #0 + 8005ade: d1f0 bne.n 8005ac2 + 8005ae0: e001 b.n 8005ae6 + } } } - /* Clear the TC flag in the ICR register */ - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_TCF); - 800363c: 68fb ldr r3, [r7, #12] - 800363e: 681b ldr r3, [r3, #0] - 8003640: 2240 movs r2, #64 ; 0x40 - 8003642: 621a str r2, [r3, #32] - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - 8003644: 68fb ldr r3, [r7, #12] - 8003646: 2200 movs r2, #0 - 8003648: f883 2070 strb.w r2, [r3, #112] ; 0x70 - - /* Enable the DMA transfer for transmit request by setting the DMAT bit - in the UART CR3 register */ - SET_BIT(huart->Instance->CR3, USART_CR3_DMAT); - 800364c: 68fb ldr r3, [r7, #12] - 800364e: 681b ldr r3, [r3, #0] - 8003650: 689a ldr r2, [r3, #8] - 8003652: 68fb ldr r3, [r7, #12] - 8003654: 681b ldr r3, [r3, #0] - 8003656: f042 0280 orr.w r2, r2, #128 ; 0x80 - 800365a: 609a str r2, [r3, #8] - - return HAL_OK; - 800365c: 2300 movs r3, #0 - 800365e: e000 b.n 8003662 - } - else - { - return HAL_BUSY; - 8003660: 2302 movs r3, #2 + else + { + return HAL_ERROR; + 8005ae2: 2301 movs r3, #1 + 8005ae4: e000 b.n 8005ae8 + } } + return HAL_OK; + 8005ae6: 2300 movs r3, #0 } - 8003662: 4618 mov r0, r3 - 8003664: 3710 adds r7, #16 - 8003666: 46bd mov sp, r7 - 8003668: bd80 pop {r7, pc} - 800366a: bf00 nop - 800366c: 080041d9 .word 0x080041d9 - 8003670: 08004229 .word 0x08004229 - 8003674: 080042c5 .word 0x080042c5 - -08003678 : - * @param pData Pointer to data buffer. - * @param Size Amount of data to be received. - * @retval HAL status + 8005ae8: 4618 mov r0, r3 + 8005aea: 3718 adds r7, #24 + 8005aec: 46bd mov sp, r7 + 8005aee: bd80 pop {r7, pc} + 8005af0: 40023800 .word 0x40023800 + 8005af4: 40007000 .word 0x40007000 + +08005af8 : + * HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency + * (for more details refer to section above "Initialization/de-initialization functions") + * @retval None */ -HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) +HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) { - 8003678: b580 push {r7, lr} - 800367a: b084 sub sp, #16 - 800367c: af00 add r7, sp, #0 - 800367e: 60f8 str r0, [r7, #12] - 8003680: 60b9 str r1, [r7, #8] - 8003682: 4613 mov r3, r2 - 8003684: 80fb strh r3, [r7, #6] - /* Check that a Rx process is not already ongoing */ - if (huart->RxState == HAL_UART_STATE_READY) - 8003686: 68fb ldr r3, [r7, #12] - 8003688: 6f9b ldr r3, [r3, #120] ; 0x78 - 800368a: 2b20 cmp r3, #32 - 800368c: d16c bne.n 8003768 + 8005af8: b580 push {r7, lr} + 8005afa: b084 sub sp, #16 + 8005afc: af00 add r7, sp, #0 + 8005afe: 6078 str r0, [r7, #4] + 8005b00: 6039 str r1, [r7, #0] + uint32_t tickstart = 0; + 8005b02: 2300 movs r3, #0 + 8005b04: 60fb str r3, [r7, #12] + + /* Check Null pointer */ + if(RCC_ClkInitStruct == NULL) + 8005b06: 687b ldr r3, [r7, #4] + 8005b08: 2b00 cmp r3, #0 + 8005b0a: d101 bne.n 8005b10 { - if ((pData == NULL) || (Size == 0U)) - 800368e: 68bb ldr r3, [r7, #8] - 8003690: 2b00 cmp r3, #0 - 8003692: d002 beq.n 800369a - 8003694: 88fb ldrh r3, [r7, #6] - 8003696: 2b00 cmp r3, #0 - 8003698: d101 bne.n 800369e + return HAL_ERROR; + 8005b0c: 2301 movs r3, #1 + 8005b0e: e0ce b.n 8005cae + /* To correctly read data from FLASH memory, the number of wait states (LATENCY) + must be correctly programmed according to the frequency of the CPU clock + (HCLK) and the supply voltage of the device. */ + + /* Increasing the CPU frequency */ + if(FLatency > __HAL_FLASH_GET_LATENCY()) + 8005b10: 4b69 ldr r3, [pc, #420] ; (8005cb8 ) + 8005b12: 681b ldr r3, [r3, #0] + 8005b14: f003 030f and.w r3, r3, #15 + 8005b18: 683a ldr r2, [r7, #0] + 8005b1a: 429a cmp r2, r3 + 8005b1c: d910 bls.n 8005b40 + { + /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ + __HAL_FLASH_SET_LATENCY(FLatency); + 8005b1e: 4b66 ldr r3, [pc, #408] ; (8005cb8 ) + 8005b20: 681b ldr r3, [r3, #0] + 8005b22: f023 020f bic.w r2, r3, #15 + 8005b26: 4964 ldr r1, [pc, #400] ; (8005cb8 ) + 8005b28: 683b ldr r3, [r7, #0] + 8005b2a: 4313 orrs r3, r2 + 8005b2c: 600b str r3, [r1, #0] + + /* Check that the new number of wait states is taken into account to access the Flash + memory by reading the FLASH_ACR register */ + if(__HAL_FLASH_GET_LATENCY() != FLatency) + 8005b2e: 4b62 ldr r3, [pc, #392] ; (8005cb8 ) + 8005b30: 681b ldr r3, [r3, #0] + 8005b32: f003 030f and.w r3, r3, #15 + 8005b36: 683a ldr r2, [r7, #0] + 8005b38: 429a cmp r2, r3 + 8005b3a: d001 beq.n 8005b40 { return HAL_ERROR; - 800369a: 2301 movs r3, #1 - 800369c: e065 b.n 800376a + 8005b3c: 2301 movs r3, #1 + 8005b3e: e0b6 b.n 8005cae } + } - /* Process Locked */ - __HAL_LOCK(huart); - 800369e: 68fb ldr r3, [r7, #12] - 80036a0: f893 3070 ldrb.w r3, [r3, #112] ; 0x70 - 80036a4: 2b01 cmp r3, #1 - 80036a6: d101 bne.n 80036ac - 80036a8: 2302 movs r3, #2 - 80036aa: e05e b.n 800376a - 80036ac: 68fb ldr r3, [r7, #12] - 80036ae: 2201 movs r2, #1 - 80036b0: f883 2070 strb.w r2, [r3, #112] ; 0x70 - - huart->pRxBuffPtr = pData; - 80036b4: 68fb ldr r3, [r7, #12] - 80036b6: 68ba ldr r2, [r7, #8] - 80036b8: 655a str r2, [r3, #84] ; 0x54 - huart->RxXferSize = Size; - 80036ba: 68fb ldr r3, [r7, #12] - 80036bc: 88fa ldrh r2, [r7, #6] - 80036be: f8a3 2058 strh.w r2, [r3, #88] ; 0x58 - - huart->ErrorCode = HAL_UART_ERROR_NONE; - 80036c2: 68fb ldr r3, [r7, #12] - 80036c4: 2200 movs r2, #0 - 80036c6: 67da str r2, [r3, #124] ; 0x7c - huart->RxState = HAL_UART_STATE_BUSY_RX; - 80036c8: 68fb ldr r3, [r7, #12] - 80036ca: 2222 movs r2, #34 ; 0x22 - 80036cc: 679a str r2, [r3, #120] ; 0x78 - - if (huart->hdmarx != NULL) - 80036ce: 68fb ldr r3, [r7, #12] - 80036d0: 6edb ldr r3, [r3, #108] ; 0x6c - 80036d2: 2b00 cmp r3, #0 - 80036d4: d02a beq.n 800372c + /*-------------------------- HCLK Configuration --------------------------*/ + if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) + 8005b40: 687b ldr r3, [r7, #4] + 8005b42: 681b ldr r3, [r3, #0] + 8005b44: f003 0302 and.w r3, r3, #2 + 8005b48: 2b00 cmp r3, #0 + 8005b4a: d020 beq.n 8005b8e + { + /* Set the highest APBx dividers in order to ensure that we do not go through + a non-spec phase whatever we decrease or increase HCLK. */ + if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) + 8005b4c: 687b ldr r3, [r7, #4] + 8005b4e: 681b ldr r3, [r3, #0] + 8005b50: f003 0304 and.w r3, r3, #4 + 8005b54: 2b00 cmp r3, #0 + 8005b56: d005 beq.n 8005b64 { - /* Set the UART DMA transfer complete callback */ - huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt; - 80036d6: 68fb ldr r3, [r7, #12] - 80036d8: 6edb ldr r3, [r3, #108] ; 0x6c - 80036da: 4a26 ldr r2, [pc, #152] ; (8003774 ) - 80036dc: 63da str r2, [r3, #60] ; 0x3c + MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16); + 8005b58: 4b58 ldr r3, [pc, #352] ; (8005cbc ) + 8005b5a: 689b ldr r3, [r3, #8] + 8005b5c: 4a57 ldr r2, [pc, #348] ; (8005cbc ) + 8005b5e: f443 53e0 orr.w r3, r3, #7168 ; 0x1c00 + 8005b62: 6093 str r3, [r2, #8] + } - /* Set the UART DMA Half transfer complete callback */ - huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt; - 80036de: 68fb ldr r3, [r7, #12] - 80036e0: 6edb ldr r3, [r3, #108] ; 0x6c - 80036e2: 4a25 ldr r2, [pc, #148] ; (8003778 ) - 80036e4: 641a str r2, [r3, #64] ; 0x40 + if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) + 8005b64: 687b ldr r3, [r7, #4] + 8005b66: 681b ldr r3, [r3, #0] + 8005b68: f003 0308 and.w r3, r3, #8 + 8005b6c: 2b00 cmp r3, #0 + 8005b6e: d005 beq.n 8005b7c + { + MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3)); + 8005b70: 4b52 ldr r3, [pc, #328] ; (8005cbc ) + 8005b72: 689b ldr r3, [r3, #8] + 8005b74: 4a51 ldr r2, [pc, #324] ; (8005cbc ) + 8005b76: f443 4360 orr.w r3, r3, #57344 ; 0xe000 + 8005b7a: 6093 str r3, [r2, #8] + } - /* Set the DMA error callback */ - huart->hdmarx->XferErrorCallback = UART_DMAError; - 80036e6: 68fb ldr r3, [r7, #12] - 80036e8: 6edb ldr r3, [r3, #108] ; 0x6c - 80036ea: 4a24 ldr r2, [pc, #144] ; (800377c ) - 80036ec: 64da str r2, [r3, #76] ; 0x4c + /* Set the new HCLK clock divider */ + assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); + MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); + 8005b7c: 4b4f ldr r3, [pc, #316] ; (8005cbc ) + 8005b7e: 689b ldr r3, [r3, #8] + 8005b80: f023 02f0 bic.w r2, r3, #240 ; 0xf0 + 8005b84: 687b ldr r3, [r7, #4] + 8005b86: 689b ldr r3, [r3, #8] + 8005b88: 494c ldr r1, [pc, #304] ; (8005cbc ) + 8005b8a: 4313 orrs r3, r2 + 8005b8c: 608b str r3, [r1, #8] + } - /* Set the DMA abort callback */ - huart->hdmarx->XferAbortCallback = NULL; - 80036ee: 68fb ldr r3, [r7, #12] - 80036f0: 6edb ldr r3, [r3, #108] ; 0x6c - 80036f2: 2200 movs r2, #0 - 80036f4: 651a str r2, [r3, #80] ; 0x50 + /*------------------------- SYSCLK Configuration ---------------------------*/ + if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) + 8005b8e: 687b ldr r3, [r7, #4] + 8005b90: 681b ldr r3, [r3, #0] + 8005b92: f003 0301 and.w r3, r3, #1 + 8005b96: 2b00 cmp r3, #0 + 8005b98: d040 beq.n 8005c1c + { + assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); - /* Enable the DMA channel */ - if (HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->RDR, (uint32_t)huart->pRxBuffPtr, Size) != HAL_OK) - 80036f6: 68fb ldr r3, [r7, #12] - 80036f8: 6ed8 ldr r0, [r3, #108] ; 0x6c - 80036fa: 68fb ldr r3, [r7, #12] - 80036fc: 681b ldr r3, [r3, #0] - 80036fe: 3324 adds r3, #36 ; 0x24 - 8003700: 4619 mov r1, r3 - 8003702: 68fb ldr r3, [r7, #12] - 8003704: 6d5b ldr r3, [r3, #84] ; 0x54 - 8003706: 461a mov r2, r3 - 8003708: 88fb ldrh r3, [r7, #6] - 800370a: f7fd f93b bl 8000984 - 800370e: 4603 mov r3, r0 - 8003710: 2b00 cmp r3, #0 - 8003712: d00b beq.n 800372c + /* HSE is selected as System Clock Source */ + if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) + 8005b9a: 687b ldr r3, [r7, #4] + 8005b9c: 685b ldr r3, [r3, #4] + 8005b9e: 2b01 cmp r3, #1 + 8005ba0: d107 bne.n 8005bb2 + { + /* Check the HSE ready flag */ + if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) + 8005ba2: 4b46 ldr r3, [pc, #280] ; (8005cbc ) + 8005ba4: 681b ldr r3, [r3, #0] + 8005ba6: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 8005baa: 2b00 cmp r3, #0 + 8005bac: d115 bne.n 8005bda { - /* Set error code to DMA */ - huart->ErrorCode = HAL_UART_ERROR_DMA; - 8003714: 68fb ldr r3, [r7, #12] - 8003716: 2210 movs r2, #16 - 8003718: 67da str r2, [r3, #124] ; 0x7c - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - 800371a: 68fb ldr r3, [r7, #12] - 800371c: 2200 movs r2, #0 - 800371e: f883 2070 strb.w r2, [r3, #112] ; 0x70 - - /* Restore huart->gState to ready */ - huart->gState = HAL_UART_STATE_READY; - 8003722: 68fb ldr r3, [r7, #12] - 8003724: 2220 movs r2, #32 - 8003726: 675a str r2, [r3, #116] ; 0x74 - return HAL_ERROR; - 8003728: 2301 movs r3, #1 - 800372a: e01e b.n 800376a + 8005bae: 2301 movs r3, #1 + 8005bb0: e07d b.n 8005cae + } + } + /* PLL is selected as System Clock Source */ + else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) + 8005bb2: 687b ldr r3, [r7, #4] + 8005bb4: 685b ldr r3, [r3, #4] + 8005bb6: 2b02 cmp r3, #2 + 8005bb8: d107 bne.n 8005bca + { + /* Check the PLL ready flag */ + if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) + 8005bba: 4b40 ldr r3, [pc, #256] ; (8005cbc ) + 8005bbc: 681b ldr r3, [r3, #0] + 8005bbe: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 8005bc2: 2b00 cmp r3, #0 + 8005bc4: d109 bne.n 8005bda + { + return HAL_ERROR; + 8005bc6: 2301 movs r3, #1 + 8005bc8: e071 b.n 8005cae + } + /* HSI is selected as System Clock Source */ + else + { + /* Check the HSI ready flag */ + if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) + 8005bca: 4b3c ldr r3, [pc, #240] ; (8005cbc ) + 8005bcc: 681b ldr r3, [r3, #0] + 8005bce: f003 0302 and.w r3, r3, #2 + 8005bd2: 2b00 cmp r3, #0 + 8005bd4: d101 bne.n 8005bda + { + return HAL_ERROR; + 8005bd6: 2301 movs r3, #1 + 8005bd8: e069 b.n 8005cae } } - /* Process Unlocked */ - __HAL_UNLOCK(huart); - 800372c: 68fb ldr r3, [r7, #12] - 800372e: 2200 movs r2, #0 - 8003730: f883 2070 strb.w r2, [r3, #112] ; 0x70 - - /* Enable the UART Parity Error Interrupt */ - SET_BIT(huart->Instance->CR1, USART_CR1_PEIE); - 8003734: 68fb ldr r3, [r7, #12] - 8003736: 681b ldr r3, [r3, #0] - 8003738: 681a ldr r2, [r3, #0] - 800373a: 68fb ldr r3, [r7, #12] - 800373c: 681b ldr r3, [r3, #0] - 800373e: f442 7280 orr.w r2, r2, #256 ; 0x100 - 8003742: 601a str r2, [r3, #0] - - /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */ - SET_BIT(huart->Instance->CR3, USART_CR3_EIE); - 8003744: 68fb ldr r3, [r7, #12] - 8003746: 681b ldr r3, [r3, #0] - 8003748: 689a ldr r2, [r3, #8] - 800374a: 68fb ldr r3, [r7, #12] - 800374c: 681b ldr r3, [r3, #0] - 800374e: f042 0201 orr.w r2, r2, #1 - 8003752: 609a str r2, [r3, #8] - - /* Enable the DMA transfer for the receiver request by setting the DMAR bit - in the UART CR3 register */ - SET_BIT(huart->Instance->CR3, USART_CR3_DMAR); - 8003754: 68fb ldr r3, [r7, #12] - 8003756: 681b ldr r3, [r3, #0] - 8003758: 689a ldr r2, [r3, #8] - 800375a: 68fb ldr r3, [r7, #12] - 800375c: 681b ldr r3, [r3, #0] - 800375e: f042 0240 orr.w r2, r2, #64 ; 0x40 - 8003762: 609a str r2, [r3, #8] - - return HAL_OK; - 8003764: 2300 movs r3, #0 - 8003766: e000 b.n 800376a - } - else - { - return HAL_BUSY; - 8003768: 2302 movs r3, #2 - } -} - 800376a: 4618 mov r0, r3 - 800376c: 3710 adds r7, #16 - 800376e: 46bd mov sp, r7 - 8003770: bd80 pop {r7, pc} - 8003772: bf00 nop - 8003774: 08004245 .word 0x08004245 - 8003778: 080042a9 .word 0x080042a9 - 800377c: 080042c5 .word 0x080042c5 - -08003780 : - * @brief Handle UART interrupt request. - * @param huart UART handle. - * @retval None - */ -void HAL_UART_IRQHandler(UART_HandleTypeDef *huart) -{ - 8003780: b580 push {r7, lr} - 8003782: b088 sub sp, #32 - 8003784: af00 add r7, sp, #0 - 8003786: 6078 str r0, [r7, #4] - uint32_t isrflags = READ_REG(huart->Instance->ISR); - 8003788: 687b ldr r3, [r7, #4] - 800378a: 681b ldr r3, [r3, #0] - 800378c: 69db ldr r3, [r3, #28] - 800378e: 61fb str r3, [r7, #28] - uint32_t cr1its = READ_REG(huart->Instance->CR1); - 8003790: 687b ldr r3, [r7, #4] - 8003792: 681b ldr r3, [r3, #0] - 8003794: 681b ldr r3, [r3, #0] - 8003796: 61bb str r3, [r7, #24] - uint32_t cr3its = READ_REG(huart->Instance->CR3); - 8003798: 687b ldr r3, [r7, #4] - 800379a: 681b ldr r3, [r3, #0] - 800379c: 689b ldr r3, [r3, #8] - 800379e: 617b str r3, [r7, #20] - uint32_t errorflags; - uint32_t errorcode; + __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); + 8005bda: 4b38 ldr r3, [pc, #224] ; (8005cbc ) + 8005bdc: 689b ldr r3, [r3, #8] + 8005bde: f023 0203 bic.w r2, r3, #3 + 8005be2: 687b ldr r3, [r7, #4] + 8005be4: 685b ldr r3, [r3, #4] + 8005be6: 4935 ldr r1, [pc, #212] ; (8005cbc ) + 8005be8: 4313 orrs r3, r2 + 8005bea: 608b str r3, [r1, #8] - /* If no error occurs */ - errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE)); - 80037a0: 69fb ldr r3, [r7, #28] - 80037a2: f003 030f and.w r3, r3, #15 - 80037a6: 613b str r3, [r7, #16] - if (errorflags == 0U) - 80037a8: 693b ldr r3, [r7, #16] - 80037aa: 2b00 cmp r3, #0 - 80037ac: d113 bne.n 80037d6 - { - /* UART in mode Receiver ---------------------------------------------------*/ - if (((isrflags & USART_ISR_RXNE) != 0U) - 80037ae: 69fb ldr r3, [r7, #28] - 80037b0: f003 0320 and.w r3, r3, #32 - 80037b4: 2b00 cmp r3, #0 - 80037b6: d00e beq.n 80037d6 - && ((cr1its & USART_CR1_RXNEIE) != 0U)) - 80037b8: 69bb ldr r3, [r7, #24] - 80037ba: f003 0320 and.w r3, r3, #32 - 80037be: 2b00 cmp r3, #0 - 80037c0: d009 beq.n 80037d6 + /* Get Start Tick*/ + tickstart = HAL_GetTick(); + 8005bec: f7fe fe98 bl 8004920 + 8005bf0: 60f8 str r0, [r7, #12] + + while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) + 8005bf2: e00a b.n 8005c0a { - if (huart->RxISR != NULL) - 80037c2: 687b ldr r3, [r7, #4] - 80037c4: 6e1b ldr r3, [r3, #96] ; 0x60 - 80037c6: 2b00 cmp r3, #0 - 80037c8: f000 80eb beq.w 80039a2 + if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) + 8005bf4: f7fe fe94 bl 8004920 + 8005bf8: 4602 mov r2, r0 + 8005bfa: 68fb ldr r3, [r7, #12] + 8005bfc: 1ad3 subs r3, r2, r3 + 8005bfe: f241 3288 movw r2, #5000 ; 0x1388 + 8005c02: 4293 cmp r3, r2 + 8005c04: d901 bls.n 8005c0a { - huart->RxISR(huart); - 80037cc: 687b ldr r3, [r7, #4] - 80037ce: 6e1b ldr r3, [r3, #96] ; 0x60 - 80037d0: 6878 ldr r0, [r7, #4] - 80037d2: 4798 blx r3 + return HAL_TIMEOUT; + 8005c06: 2303 movs r3, #3 + 8005c08: e051 b.n 8005cae + while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) + 8005c0a: 4b2c ldr r3, [pc, #176] ; (8005cbc ) + 8005c0c: 689b ldr r3, [r3, #8] + 8005c0e: f003 020c and.w r2, r3, #12 + 8005c12: 687b ldr r3, [r7, #4] + 8005c14: 685b ldr r3, [r3, #4] + 8005c16: 009b lsls r3, r3, #2 + 8005c18: 429a cmp r2, r3 + 8005c1a: d1eb bne.n 8005bf4 } - return; - 80037d4: e0e5 b.n 80039a2 } } - /* If some errors occur */ - if ((errorflags != 0U) - 80037d6: 693b ldr r3, [r7, #16] - 80037d8: 2b00 cmp r3, #0 - 80037da: f000 80c0 beq.w 800395e - && (((cr3its & USART_CR3_EIE) != 0U) - 80037de: 697b ldr r3, [r7, #20] - 80037e0: f003 0301 and.w r3, r3, #1 - 80037e4: 2b00 cmp r3, #0 - 80037e6: d105 bne.n 80037f4 - || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != 0U))) - 80037e8: 69bb ldr r3, [r7, #24] - 80037ea: f403 7390 and.w r3, r3, #288 ; 0x120 - 80037ee: 2b00 cmp r3, #0 - 80037f0: f000 80b5 beq.w 800395e + /* Decreasing the number of wait states because of lower CPU frequency */ + if(FLatency < __HAL_FLASH_GET_LATENCY()) + 8005c1c: 4b26 ldr r3, [pc, #152] ; (8005cb8 ) + 8005c1e: 681b ldr r3, [r3, #0] + 8005c20: f003 030f and.w r3, r3, #15 + 8005c24: 683a ldr r2, [r7, #0] + 8005c26: 429a cmp r2, r3 + 8005c28: d210 bcs.n 8005c4c { - /* UART parity error interrupt occurred -------------------------------------*/ - if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U)) - 80037f4: 69fb ldr r3, [r7, #28] - 80037f6: f003 0301 and.w r3, r3, #1 - 80037fa: 2b00 cmp r3, #0 - 80037fc: d00e beq.n 800381c - 80037fe: 69bb ldr r3, [r7, #24] - 8003800: f403 7380 and.w r3, r3, #256 ; 0x100 - 8003804: 2b00 cmp r3, #0 - 8003806: d009 beq.n 800381c - { - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF); - 8003808: 687b ldr r3, [r7, #4] - 800380a: 681b ldr r3, [r3, #0] - 800380c: 2201 movs r2, #1 - 800380e: 621a str r2, [r3, #32] + /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ + __HAL_FLASH_SET_LATENCY(FLatency); + 8005c2a: 4b23 ldr r3, [pc, #140] ; (8005cb8 ) + 8005c2c: 681b ldr r3, [r3, #0] + 8005c2e: f023 020f bic.w r2, r3, #15 + 8005c32: 4921 ldr r1, [pc, #132] ; (8005cb8 ) + 8005c34: 683b ldr r3, [r7, #0] + 8005c36: 4313 orrs r3, r2 + 8005c38: 600b str r3, [r1, #0] - huart->ErrorCode |= HAL_UART_ERROR_PE; - 8003810: 687b ldr r3, [r7, #4] - 8003812: 6fdb ldr r3, [r3, #124] ; 0x7c - 8003814: f043 0201 orr.w r2, r3, #1 - 8003818: 687b ldr r3, [r7, #4] - 800381a: 67da str r2, [r3, #124] ; 0x7c + /* Check that the new number of wait states is taken into account to access the Flash + memory by reading the FLASH_ACR register */ + if(__HAL_FLASH_GET_LATENCY() != FLatency) + 8005c3a: 4b1f ldr r3, [pc, #124] ; (8005cb8 ) + 8005c3c: 681b ldr r3, [r3, #0] + 8005c3e: f003 030f and.w r3, r3, #15 + 8005c42: 683a ldr r2, [r7, #0] + 8005c44: 429a cmp r2, r3 + 8005c46: d001 beq.n 8005c4c + { + return HAL_ERROR; + 8005c48: 2301 movs r3, #1 + 8005c4a: e030 b.n 8005cae } + } - /* UART frame error interrupt occurred --------------------------------------*/ - if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U)) - 800381c: 69fb ldr r3, [r7, #28] - 800381e: f003 0302 and.w r3, r3, #2 - 8003822: 2b00 cmp r3, #0 - 8003824: d00e beq.n 8003844 - 8003826: 697b ldr r3, [r7, #20] - 8003828: f003 0301 and.w r3, r3, #1 - 800382c: 2b00 cmp r3, #0 - 800382e: d009 beq.n 8003844 - { - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF); - 8003830: 687b ldr r3, [r7, #4] - 8003832: 681b ldr r3, [r3, #0] - 8003834: 2202 movs r2, #2 - 8003836: 621a str r2, [r3, #32] + /*-------------------------- PCLK1 Configuration ---------------------------*/ + if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) + 8005c4c: 687b ldr r3, [r7, #4] + 8005c4e: 681b ldr r3, [r3, #0] + 8005c50: f003 0304 and.w r3, r3, #4 + 8005c54: 2b00 cmp r3, #0 + 8005c56: d008 beq.n 8005c6a + { + assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); + MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); + 8005c58: 4b18 ldr r3, [pc, #96] ; (8005cbc ) + 8005c5a: 689b ldr r3, [r3, #8] + 8005c5c: f423 52e0 bic.w r2, r3, #7168 ; 0x1c00 + 8005c60: 687b ldr r3, [r7, #4] + 8005c62: 68db ldr r3, [r3, #12] + 8005c64: 4915 ldr r1, [pc, #84] ; (8005cbc ) + 8005c66: 4313 orrs r3, r2 + 8005c68: 608b str r3, [r1, #8] + } - huart->ErrorCode |= HAL_UART_ERROR_FE; - 8003838: 687b ldr r3, [r7, #4] - 800383a: 6fdb ldr r3, [r3, #124] ; 0x7c - 800383c: f043 0204 orr.w r2, r3, #4 - 8003840: 687b ldr r3, [r7, #4] - 8003842: 67da str r2, [r3, #124] ; 0x7c - } + /*-------------------------- PCLK2 Configuration ---------------------------*/ + if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) + 8005c6a: 687b ldr r3, [r7, #4] + 8005c6c: 681b ldr r3, [r3, #0] + 8005c6e: f003 0308 and.w r3, r3, #8 + 8005c72: 2b00 cmp r3, #0 + 8005c74: d009 beq.n 8005c8a + { + assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); + MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3)); + 8005c76: 4b11 ldr r3, [pc, #68] ; (8005cbc ) + 8005c78: 689b ldr r3, [r3, #8] + 8005c7a: f423 4260 bic.w r2, r3, #57344 ; 0xe000 + 8005c7e: 687b ldr r3, [r7, #4] + 8005c80: 691b ldr r3, [r3, #16] + 8005c82: 00db lsls r3, r3, #3 + 8005c84: 490d ldr r1, [pc, #52] ; (8005cbc ) + 8005c86: 4313 orrs r3, r2 + 8005c88: 608b str r3, [r1, #8] + } - /* UART noise error interrupt occurred --------------------------------------*/ - if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U)) - 8003844: 69fb ldr r3, [r7, #28] - 8003846: f003 0304 and.w r3, r3, #4 - 800384a: 2b00 cmp r3, #0 - 800384c: d00e beq.n 800386c - 800384e: 697b ldr r3, [r7, #20] - 8003850: f003 0301 and.w r3, r3, #1 - 8003854: 2b00 cmp r3, #0 - 8003856: d009 beq.n 800386c - { - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF); - 8003858: 687b ldr r3, [r7, #4] - 800385a: 681b ldr r3, [r3, #0] - 800385c: 2204 movs r2, #4 - 800385e: 621a str r2, [r3, #32] + /* Update the SystemCoreClock global variable */ + SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos]; + 8005c8a: f000 f81d bl 8005cc8 + 8005c8e: 4601 mov r1, r0 + 8005c90: 4b0a ldr r3, [pc, #40] ; (8005cbc ) + 8005c92: 689b ldr r3, [r3, #8] + 8005c94: 091b lsrs r3, r3, #4 + 8005c96: f003 030f and.w r3, r3, #15 + 8005c9a: 4a09 ldr r2, [pc, #36] ; (8005cc0 ) + 8005c9c: 5cd3 ldrb r3, [r2, r3] + 8005c9e: fa21 f303 lsr.w r3, r1, r3 + 8005ca2: 4a08 ldr r2, [pc, #32] ; (8005cc4 ) + 8005ca4: 6013 str r3, [r2, #0] - huart->ErrorCode |= HAL_UART_ERROR_NE; - 8003860: 687b ldr r3, [r7, #4] - 8003862: 6fdb ldr r3, [r3, #124] ; 0x7c - 8003864: f043 0202 orr.w r2, r3, #2 - 8003868: 687b ldr r3, [r7, #4] - 800386a: 67da str r2, [r3, #124] ; 0x7c - } + /* Configure the source of time base considering new system clocks settings*/ + HAL_InitTick (TICK_INT_PRIORITY); + 8005ca6: 2000 movs r0, #0 + 8005ca8: f7fe fdf6 bl 8004898 - /* UART Over-Run interrupt occurred -----------------------------------------*/ - if (((isrflags & USART_ISR_ORE) != 0U) - 800386c: 69fb ldr r3, [r7, #28] - 800386e: f003 0308 and.w r3, r3, #8 - 8003872: 2b00 cmp r3, #0 - 8003874: d013 beq.n 800389e - && (((cr1its & USART_CR1_RXNEIE) != 0U) || - 8003876: 69bb ldr r3, [r7, #24] - 8003878: f003 0320 and.w r3, r3, #32 - 800387c: 2b00 cmp r3, #0 - 800387e: d104 bne.n 800388a - ((cr3its & USART_CR3_EIE) != 0U))) - 8003880: 697b ldr r3, [r7, #20] - 8003882: f003 0301 and.w r3, r3, #1 - && (((cr1its & USART_CR1_RXNEIE) != 0U) || - 8003886: 2b00 cmp r3, #0 - 8003888: d009 beq.n 800389e - { - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF); - 800388a: 687b ldr r3, [r7, #4] - 800388c: 681b ldr r3, [r3, #0] - 800388e: 2208 movs r2, #8 - 8003890: 621a str r2, [r3, #32] + return HAL_OK; + 8005cac: 2300 movs r3, #0 +} + 8005cae: 4618 mov r0, r3 + 8005cb0: 3710 adds r7, #16 + 8005cb2: 46bd mov sp, r7 + 8005cb4: bd80 pop {r7, pc} + 8005cb6: bf00 nop + 8005cb8: 40023c00 .word 0x40023c00 + 8005cbc: 40023800 .word 0x40023800 + 8005cc0: 0800a628 .word 0x0800a628 + 8005cc4: 20000010 .word 0x20000010 + +08005cc8 : + * + * + * @retval SYSCLK frequency + */ +uint32_t HAL_RCC_GetSysClockFreq(void) +{ + 8005cc8: b5f0 push {r4, r5, r6, r7, lr} + 8005cca: b085 sub sp, #20 + 8005ccc: af00 add r7, sp, #0 + uint32_t pllm = 0, pllvco = 0, pllp = 0; + 8005cce: 2300 movs r3, #0 + 8005cd0: 607b str r3, [r7, #4] + 8005cd2: 2300 movs r3, #0 + 8005cd4: 60fb str r3, [r7, #12] + 8005cd6: 2300 movs r3, #0 + 8005cd8: 603b str r3, [r7, #0] + uint32_t sysclockfreq = 0; + 8005cda: 2300 movs r3, #0 + 8005cdc: 60bb str r3, [r7, #8] - huart->ErrorCode |= HAL_UART_ERROR_ORE; - 8003892: 687b ldr r3, [r7, #4] - 8003894: 6fdb ldr r3, [r3, #124] ; 0x7c - 8003896: f043 0208 orr.w r2, r3, #8 - 800389a: 687b ldr r3, [r7, #4] - 800389c: 67da str r2, [r3, #124] ; 0x7c + /* Get SYSCLK source -------------------------------------------------------*/ + switch (RCC->CFGR & RCC_CFGR_SWS) + 8005cde: 4b50 ldr r3, [pc, #320] ; (8005e20 ) + 8005ce0: 689b ldr r3, [r3, #8] + 8005ce2: f003 030c and.w r3, r3, #12 + 8005ce6: 2b04 cmp r3, #4 + 8005ce8: d007 beq.n 8005cfa + 8005cea: 2b08 cmp r3, #8 + 8005cec: d008 beq.n 8005d00 + 8005cee: 2b00 cmp r3, #0 + 8005cf0: f040 808d bne.w 8005e0e + { + case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */ + { + sysclockfreq = HSI_VALUE; + 8005cf4: 4b4b ldr r3, [pc, #300] ; (8005e24 ) + 8005cf6: 60bb str r3, [r7, #8] + break; + 8005cf8: e08c b.n 8005e14 } - - /* Call UART Error Call back function if need be --------------------------*/ - if (huart->ErrorCode != HAL_UART_ERROR_NONE) - 800389e: 687b ldr r3, [r7, #4] - 80038a0: 6fdb ldr r3, [r3, #124] ; 0x7c - 80038a2: 2b00 cmp r3, #0 - 80038a4: d07f beq.n 80039a6 + case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock source */ { - /* UART in mode Receiver ---------------------------------------------------*/ - if (((isrflags & USART_ISR_RXNE) != 0U) - 80038a6: 69fb ldr r3, [r7, #28] - 80038a8: f003 0320 and.w r3, r3, #32 - 80038ac: 2b00 cmp r3, #0 - 80038ae: d00c beq.n 80038ca - && ((cr1its & USART_CR1_RXNEIE) != 0U)) - 80038b0: 69bb ldr r3, [r7, #24] - 80038b2: f003 0320 and.w r3, r3, #32 - 80038b6: 2b00 cmp r3, #0 - 80038b8: d007 beq.n 80038ca + sysclockfreq = HSE_VALUE; + 8005cfa: 4b4b ldr r3, [pc, #300] ; (8005e28 ) + 8005cfc: 60bb str r3, [r7, #8] + break; + 8005cfe: e089 b.n 8005e14 + } + case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock source */ + { + /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN + SYSCLK = PLL_VCO / PLLP */ + pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM; + 8005d00: 4b47 ldr r3, [pc, #284] ; (8005e20 ) + 8005d02: 685b ldr r3, [r3, #4] + 8005d04: f003 033f and.w r3, r3, #63 ; 0x3f + 8005d08: 607b str r3, [r7, #4] + if (__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLCFGR_PLLSRC_HSI) + 8005d0a: 4b45 ldr r3, [pc, #276] ; (8005e20 ) + 8005d0c: 685b ldr r3, [r3, #4] + 8005d0e: f403 0380 and.w r3, r3, #4194304 ; 0x400000 + 8005d12: 2b00 cmp r3, #0 + 8005d14: d023 beq.n 8005d5e { - if (huart->RxISR != NULL) - 80038ba: 687b ldr r3, [r7, #4] - 80038bc: 6e1b ldr r3, [r3, #96] ; 0x60 - 80038be: 2b00 cmp r3, #0 - 80038c0: d003 beq.n 80038ca - { - huart->RxISR(huart); - 80038c2: 687b ldr r3, [r7, #4] - 80038c4: 6e1b ldr r3, [r3, #96] ; 0x60 - 80038c6: 6878 ldr r0, [r7, #4] - 80038c8: 4798 blx r3 - } + /* HSE used as PLL clock source */ + pllvco = (uint32_t) ((((uint64_t) HSE_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm); + 8005d16: 4b42 ldr r3, [pc, #264] ; (8005e20 ) + 8005d18: 685b ldr r3, [r3, #4] + 8005d1a: 099b lsrs r3, r3, #6 + 8005d1c: f04f 0400 mov.w r4, #0 + 8005d20: f240 11ff movw r1, #511 ; 0x1ff + 8005d24: f04f 0200 mov.w r2, #0 + 8005d28: ea03 0501 and.w r5, r3, r1 + 8005d2c: ea04 0602 and.w r6, r4, r2 + 8005d30: 4a3d ldr r2, [pc, #244] ; (8005e28 ) + 8005d32: fb02 f106 mul.w r1, r2, r6 + 8005d36: 2200 movs r2, #0 + 8005d38: fb02 f205 mul.w r2, r2, r5 + 8005d3c: 440a add r2, r1 + 8005d3e: 493a ldr r1, [pc, #232] ; (8005e28 ) + 8005d40: fba5 0101 umull r0, r1, r5, r1 + 8005d44: 1853 adds r3, r2, r1 + 8005d46: 4619 mov r1, r3 + 8005d48: 687b ldr r3, [r7, #4] + 8005d4a: f04f 0400 mov.w r4, #0 + 8005d4e: 461a mov r2, r3 + 8005d50: 4623 mov r3, r4 + 8005d52: f7fa fa79 bl 8000248 <__aeabi_uldivmod> + 8005d56: 4603 mov r3, r0 + 8005d58: 460c mov r4, r1 + 8005d5a: 60fb str r3, [r7, #12] + 8005d5c: e049 b.n 8005df2 } - - /* If Overrun error occurs, or if any error occurs in DMA mode reception, - consider error as blocking */ - errorcode = huart->ErrorCode; - 80038ca: 687b ldr r3, [r7, #4] - 80038cc: 6fdb ldr r3, [r3, #124] ; 0x7c - 80038ce: 60fb str r3, [r7, #12] - if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) || - 80038d0: 687b ldr r3, [r7, #4] - 80038d2: 681b ldr r3, [r3, #0] - 80038d4: 689b ldr r3, [r3, #8] - 80038d6: f003 0340 and.w r3, r3, #64 ; 0x40 - 80038da: 2b40 cmp r3, #64 ; 0x40 - 80038dc: d004 beq.n 80038e8 - ((errorcode & HAL_UART_ERROR_ORE) != 0U)) - 80038de: 68fb ldr r3, [r7, #12] - 80038e0: f003 0308 and.w r3, r3, #8 - if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) || - 80038e4: 2b00 cmp r3, #0 - 80038e6: d031 beq.n 800394c + else { - /* Blocking error : transfer is aborted - Set the UART state ready to be able to start again the process, - Disable Rx Interrupts, and disable Rx DMA request, if ongoing */ - UART_EndRxTransfer(huart); - 80038e8: 6878 ldr r0, [r7, #4] - 80038ea: f000 fc55 bl 8004198 - - /* Disable the UART DMA Rx request if enabled */ - if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 80038ee: 687b ldr r3, [r7, #4] - 80038f0: 681b ldr r3, [r3, #0] - 80038f2: 689b ldr r3, [r3, #8] - 80038f4: f003 0340 and.w r3, r3, #64 ; 0x40 - 80038f8: 2b40 cmp r3, #64 ; 0x40 - 80038fa: d123 bne.n 8003944 - { - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - 80038fc: 687b ldr r3, [r7, #4] - 80038fe: 681b ldr r3, [r3, #0] - 8003900: 689a ldr r2, [r3, #8] - 8003902: 687b ldr r3, [r7, #4] - 8003904: 681b ldr r3, [r3, #0] - 8003906: f022 0240 bic.w r2, r2, #64 ; 0x40 - 800390a: 609a str r2, [r3, #8] - - /* Abort the UART DMA Rx channel */ - if (huart->hdmarx != NULL) - 800390c: 687b ldr r3, [r7, #4] - 800390e: 6edb ldr r3, [r3, #108] ; 0x6c - 8003910: 2b00 cmp r3, #0 - 8003912: d013 beq.n 800393c - { - /* Set the UART DMA Abort callback : - will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */ - huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError; - 8003914: 687b ldr r3, [r7, #4] - 8003916: 6edb ldr r3, [r3, #108] ; 0x6c - 8003918: 4a26 ldr r2, [pc, #152] ; (80039b4 ) - 800391a: 651a str r2, [r3, #80] ; 0x50 - - /* Abort DMA RX */ - if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) - 800391c: 687b ldr r3, [r7, #4] - 800391e: 6edb ldr r3, [r3, #108] ; 0x6c - 8003920: 4618 mov r0, r3 - 8003922: f7fd f88f bl 8000a44 - 8003926: 4603 mov r3, r0 - 8003928: 2b00 cmp r3, #0 - 800392a: d016 beq.n 800395a - { - /* Call Directly huart->hdmarx->XferAbortCallback function in case of error */ - huart->hdmarx->XferAbortCallback(huart->hdmarx); - 800392c: 687b ldr r3, [r7, #4] - 800392e: 6edb ldr r3, [r3, #108] ; 0x6c - 8003930: 6d1b ldr r3, [r3, #80] ; 0x50 - 8003932: 687a ldr r2, [r7, #4] - 8003934: 6ed2 ldr r2, [r2, #108] ; 0x6c - 8003936: 4610 mov r0, r2 - 8003938: 4798 blx r3 - if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 800393a: e00e b.n 800395a -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /*Call registered error callback*/ - huart->ErrorCallback(huart); -#else - /*Call legacy weak error callback*/ - HAL_UART_ErrorCallback(huart); - 800393c: 6878 ldr r0, [r7, #4] - 800393e: f000 f84f bl 80039e0 - if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 8003942: e00a b.n 800395a -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /*Call registered error callback*/ - huart->ErrorCallback(huart); -#else - /*Call legacy weak error callback*/ - HAL_UART_ErrorCallback(huart); - 8003944: 6878 ldr r0, [r7, #4] - 8003946: f000 f84b bl 80039e0 - if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 800394a: e006 b.n 800395a -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /*Call registered error callback*/ - huart->ErrorCallback(huart); -#else - /*Call legacy weak error callback*/ - HAL_UART_ErrorCallback(huart); - 800394c: 6878 ldr r0, [r7, #4] - 800394e: f000 f847 bl 80039e0 -#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ - huart->ErrorCode = HAL_UART_ERROR_NONE; - 8003952: 687b ldr r3, [r7, #4] - 8003954: 2200 movs r2, #0 - 8003956: 67da str r2, [r3, #124] ; 0x7c + /* HSI used as PLL clock source */ + pllvco = (uint32_t) ((((uint64_t) HSI_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm); + 8005d5e: 4b30 ldr r3, [pc, #192] ; (8005e20 ) + 8005d60: 685b ldr r3, [r3, #4] + 8005d62: 099b lsrs r3, r3, #6 + 8005d64: f04f 0400 mov.w r4, #0 + 8005d68: f240 11ff movw r1, #511 ; 0x1ff + 8005d6c: f04f 0200 mov.w r2, #0 + 8005d70: ea03 0501 and.w r5, r3, r1 + 8005d74: ea04 0602 and.w r6, r4, r2 + 8005d78: 4629 mov r1, r5 + 8005d7a: 4632 mov r2, r6 + 8005d7c: f04f 0300 mov.w r3, #0 + 8005d80: f04f 0400 mov.w r4, #0 + 8005d84: 0154 lsls r4, r2, #5 + 8005d86: ea44 64d1 orr.w r4, r4, r1, lsr #27 + 8005d8a: 014b lsls r3, r1, #5 + 8005d8c: 4619 mov r1, r3 + 8005d8e: 4622 mov r2, r4 + 8005d90: 1b49 subs r1, r1, r5 + 8005d92: eb62 0206 sbc.w r2, r2, r6 + 8005d96: f04f 0300 mov.w r3, #0 + 8005d9a: f04f 0400 mov.w r4, #0 + 8005d9e: 0194 lsls r4, r2, #6 + 8005da0: ea44 6491 orr.w r4, r4, r1, lsr #26 + 8005da4: 018b lsls r3, r1, #6 + 8005da6: 1a5b subs r3, r3, r1 + 8005da8: eb64 0402 sbc.w r4, r4, r2 + 8005dac: f04f 0100 mov.w r1, #0 + 8005db0: f04f 0200 mov.w r2, #0 + 8005db4: 00e2 lsls r2, r4, #3 + 8005db6: ea42 7253 orr.w r2, r2, r3, lsr #29 + 8005dba: 00d9 lsls r1, r3, #3 + 8005dbc: 460b mov r3, r1 + 8005dbe: 4614 mov r4, r2 + 8005dc0: 195b adds r3, r3, r5 + 8005dc2: eb44 0406 adc.w r4, r4, r6 + 8005dc6: f04f 0100 mov.w r1, #0 + 8005dca: f04f 0200 mov.w r2, #0 + 8005dce: 02a2 lsls r2, r4, #10 + 8005dd0: ea42 5293 orr.w r2, r2, r3, lsr #22 + 8005dd4: 0299 lsls r1, r3, #10 + 8005dd6: 460b mov r3, r1 + 8005dd8: 4614 mov r4, r2 + 8005dda: 4618 mov r0, r3 + 8005ddc: 4621 mov r1, r4 + 8005dde: 687b ldr r3, [r7, #4] + 8005de0: f04f 0400 mov.w r4, #0 + 8005de4: 461a mov r2, r3 + 8005de6: 4623 mov r3, r4 + 8005de8: f7fa fa2e bl 8000248 <__aeabi_uldivmod> + 8005dec: 4603 mov r3, r0 + 8005dee: 460c mov r4, r1 + 8005df0: 60fb str r3, [r7, #12] } - } - return; - 8003958: e025 b.n 80039a6 - if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 800395a: bf00 nop - return; - 800395c: e023 b.n 80039a6 - - } /* End if some error occurs */ + pllp = ((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >> RCC_PLLCFGR_PLLP_Pos) + 1 ) *2); + 8005df2: 4b0b ldr r3, [pc, #44] ; (8005e20 ) + 8005df4: 685b ldr r3, [r3, #4] + 8005df6: 0c1b lsrs r3, r3, #16 + 8005df8: f003 0303 and.w r3, r3, #3 + 8005dfc: 3301 adds r3, #1 + 8005dfe: 005b lsls r3, r3, #1 + 8005e00: 603b str r3, [r7, #0] - /* UART in mode Transmitter ------------------------------------------------*/ - if (((isrflags & USART_ISR_TXE) != 0U) - 800395e: 69fb ldr r3, [r7, #28] - 8003960: f003 0380 and.w r3, r3, #128 ; 0x80 - 8003964: 2b00 cmp r3, #0 - 8003966: d00d beq.n 8003984 - && ((cr1its & USART_CR1_TXEIE) != 0U)) - 8003968: 69bb ldr r3, [r7, #24] - 800396a: f003 0380 and.w r3, r3, #128 ; 0x80 - 800396e: 2b00 cmp r3, #0 - 8003970: d008 beq.n 8003984 - { - if (huart->TxISR != NULL) - 8003972: 687b ldr r3, [r7, #4] - 8003974: 6e5b ldr r3, [r3, #100] ; 0x64 - 8003976: 2b00 cmp r3, #0 - 8003978: d017 beq.n 80039aa + sysclockfreq = pllvco/pllp; + 8005e02: 68fa ldr r2, [r7, #12] + 8005e04: 683b ldr r3, [r7, #0] + 8005e06: fbb2 f3f3 udiv r3, r2, r3 + 8005e0a: 60bb str r3, [r7, #8] + break; + 8005e0c: e002 b.n 8005e14 + } + default: { - huart->TxISR(huart); - 800397a: 687b ldr r3, [r7, #4] - 800397c: 6e5b ldr r3, [r3, #100] ; 0x64 - 800397e: 6878 ldr r0, [r7, #4] - 8003980: 4798 blx r3 + sysclockfreq = HSI_VALUE; + 8005e0e: 4b05 ldr r3, [pc, #20] ; (8005e24 ) + 8005e10: 60bb str r3, [r7, #8] + break; + 8005e12: bf00 nop } - return; - 8003982: e012 b.n 80039aa - } - - /* UART in mode Transmitter (transmission end) -----------------------------*/ - if (((isrflags & USART_ISR_TC) != 0U) && ((cr1its & USART_CR1_TCIE) != 0U)) - 8003984: 69fb ldr r3, [r7, #28] - 8003986: f003 0340 and.w r3, r3, #64 ; 0x40 - 800398a: 2b00 cmp r3, #0 - 800398c: d00e beq.n 80039ac - 800398e: 69bb ldr r3, [r7, #24] - 8003990: f003 0340 and.w r3, r3, #64 ; 0x40 - 8003994: 2b00 cmp r3, #0 - 8003996: d009 beq.n 80039ac - { - UART_EndTransmit_IT(huart); - 8003998: 6878 ldr r0, [r7, #4] - 800399a: f000 fce5 bl 8004368 - return; - 800399e: bf00 nop - 80039a0: e004 b.n 80039ac - return; - 80039a2: bf00 nop - 80039a4: e002 b.n 80039ac - return; - 80039a6: bf00 nop - 80039a8: e000 b.n 80039ac - return; - 80039aa: bf00 nop } - + return sysclockfreq; + 8005e14: 68bb ldr r3, [r7, #8] } - 80039ac: 3720 adds r7, #32 - 80039ae: 46bd mov sp, r7 - 80039b0: bd80 pop {r7, pc} - 80039b2: bf00 nop - 80039b4: 0800433d .word 0x0800433d - -080039b8 : - * @brief Tx Half Transfer completed callback. - * @param huart UART handle. - * @retval None + 8005e16: 4618 mov r0, r3 + 8005e18: 3714 adds r7, #20 + 8005e1a: 46bd mov sp, r7 + 8005e1c: bdf0 pop {r4, r5, r6, r7, pc} + 8005e1e: bf00 nop + 8005e20: 40023800 .word 0x40023800 + 8005e24: 00f42400 .word 0x00f42400 + 8005e28: 017d7840 .word 0x017d7840 + +08005e2c : + * right HCLK value. Otherwise, any configuration based on this function will be incorrect. + * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency. + * @retval HCLK frequency */ -__weak void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart) +uint32_t HAL_RCC_GetHCLKFreq(void) { - 80039b8: b480 push {r7} - 80039ba: b083 sub sp, #12 - 80039bc: af00 add r7, sp, #0 - 80039be: 6078 str r0, [r7, #4] - UNUSED(huart); - - /* NOTE: This function should not be modified, when the callback is needed, - the HAL_UART_TxHalfCpltCallback can be implemented in the user file. - */ + 8005e2c: b480 push {r7} + 8005e2e: af00 add r7, sp, #0 + return SystemCoreClock; + 8005e30: 4b03 ldr r3, [pc, #12] ; (8005e40 ) + 8005e32: 681b ldr r3, [r3, #0] } - 80039c0: bf00 nop - 80039c2: 370c adds r7, #12 - 80039c4: 46bd mov sp, r7 - 80039c6: f85d 7b04 ldr.w r7, [sp], #4 - 80039ca: 4770 bx lr - -080039cc : - * @brief Rx Half Transfer completed callback. - * @param huart UART handle. - * @retval None + 8005e34: 4618 mov r0, r3 + 8005e36: 46bd mov sp, r7 + 8005e38: f85d 7b04 ldr.w r7, [sp], #4 + 8005e3c: 4770 bx lr + 8005e3e: bf00 nop + 8005e40: 20000010 .word 0x20000010 + +08005e44 : + * @note Each time PCLK1 changes, this function must be called to update the + * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect. + * @retval PCLK1 frequency */ -__weak void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart) +uint32_t HAL_RCC_GetPCLK1Freq(void) { - 80039cc: b480 push {r7} - 80039ce: b083 sub sp, #12 - 80039d0: af00 add r7, sp, #0 - 80039d2: 6078 str r0, [r7, #4] - UNUSED(huart); - - /* NOTE: This function should not be modified, when the callback is needed, - the HAL_UART_RxHalfCpltCallback can be implemented in the user file. - */ + 8005e44: b580 push {r7, lr} + 8005e46: af00 add r7, sp, #0 + /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ + return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1)>> RCC_CFGR_PPRE1_Pos]); + 8005e48: f7ff fff0 bl 8005e2c + 8005e4c: 4601 mov r1, r0 + 8005e4e: 4b05 ldr r3, [pc, #20] ; (8005e64 ) + 8005e50: 689b ldr r3, [r3, #8] + 8005e52: 0a9b lsrs r3, r3, #10 + 8005e54: f003 0307 and.w r3, r3, #7 + 8005e58: 4a03 ldr r2, [pc, #12] ; (8005e68 ) + 8005e5a: 5cd3 ldrb r3, [r2, r3] + 8005e5c: fa21 f303 lsr.w r3, r1, r3 } - 80039d4: bf00 nop - 80039d6: 370c adds r7, #12 - 80039d8: 46bd mov sp, r7 - 80039da: f85d 7b04 ldr.w r7, [sp], #4 - 80039de: 4770 bx lr + 8005e60: 4618 mov r0, r3 + 8005e62: bd80 pop {r7, pc} + 8005e64: 40023800 .word 0x40023800 + 8005e68: 0800a638 .word 0x0800a638 -080039e0 : - * @brief UART error callback. - * @param huart UART handle. - * @retval None +08005e6c : + * @note Each time PCLK2 changes, this function must be called to update the + * right PCLK2 value. Otherwise, any configuration based on this function will be incorrect. + * @retval PCLK2 frequency */ -__weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart) +uint32_t HAL_RCC_GetPCLK2Freq(void) { - 80039e0: b480 push {r7} - 80039e2: b083 sub sp, #12 - 80039e4: af00 add r7, sp, #0 - 80039e6: 6078 str r0, [r7, #4] - UNUSED(huart); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_UART_ErrorCallback can be implemented in the user file. - */ + 8005e6c: b580 push {r7, lr} + 8005e6e: af00 add r7, sp, #0 + /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/ + return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2)>> RCC_CFGR_PPRE2_Pos]); + 8005e70: f7ff ffdc bl 8005e2c + 8005e74: 4601 mov r1, r0 + 8005e76: 4b05 ldr r3, [pc, #20] ; (8005e8c ) + 8005e78: 689b ldr r3, [r3, #8] + 8005e7a: 0b5b lsrs r3, r3, #13 + 8005e7c: f003 0307 and.w r3, r3, #7 + 8005e80: 4a03 ldr r2, [pc, #12] ; (8005e90 ) + 8005e82: 5cd3 ldrb r3, [r2, r3] + 8005e84: fa21 f303 lsr.w r3, r1, r3 } - 80039e8: bf00 nop - 80039ea: 370c adds r7, #12 - 80039ec: 46bd mov sp, r7 - 80039ee: f85d 7b04 ldr.w r7, [sp], #4 - 80039f2: 4770 bx lr + 8005e88: 4618 mov r0, r3 + 8005e8a: bd80 pop {r7, pc} + 8005e8c: 40023800 .word 0x40023800 + 8005e90: 0800a638 .word 0x0800a638 -080039f4 : - * @brief Configure the UART peripheral. - * @param huart UART handle. +08005e94 : + * the backup registers) are set to their reset values. + * * @retval HAL status */ -HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart) +HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) { - 80039f4: b580 push {r7, lr} - 80039f6: b088 sub sp, #32 - 80039f8: af00 add r7, sp, #0 - 80039fa: 6078 str r0, [r7, #4] - uint32_t tmpreg; - uint16_t brrtemp; - UART_ClockSourceTypeDef clocksource; - uint32_t usartdiv = 0x00000000U; - 80039fc: 2300 movs r3, #0 - 80039fe: 61bb str r3, [r7, #24] - HAL_StatusTypeDef ret = HAL_OK; - 8003a00: 2300 movs r3, #0 - 8003a02: 75fb strb r3, [r7, #23] - * the UART Word Length, Parity, Mode and oversampling: - * set the M bits according to huart->Init.WordLength value - * set PCE and PS bits according to huart->Init.Parity value - * set TE and RE bits according to huart->Init.Mode value - * set OVER8 bit according to huart->Init.OverSampling value */ - tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling ; - 8003a04: 687b ldr r3, [r7, #4] - 8003a06: 689a ldr r2, [r3, #8] - 8003a08: 687b ldr r3, [r7, #4] - 8003a0a: 691b ldr r3, [r3, #16] - 8003a0c: 431a orrs r2, r3 - 8003a0e: 687b ldr r3, [r7, #4] - 8003a10: 695b ldr r3, [r3, #20] - 8003a12: 431a orrs r2, r3 - 8003a14: 687b ldr r3, [r7, #4] - 8003a16: 69db ldr r3, [r3, #28] - 8003a18: 4313 orrs r3, r2 - 8003a1a: 613b str r3, [r7, #16] - MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg); - 8003a1c: 687b ldr r3, [r7, #4] - 8003a1e: 681b ldr r3, [r3, #0] - 8003a20: 681a ldr r2, [r3, #0] - 8003a22: 4bb1 ldr r3, [pc, #708] ; (8003ce8 ) - 8003a24: 4013 ands r3, r2 - 8003a26: 687a ldr r2, [r7, #4] - 8003a28: 6812 ldr r2, [r2, #0] - 8003a2a: 6939 ldr r1, [r7, #16] - 8003a2c: 430b orrs r3, r1 - 8003a2e: 6013 str r3, [r2, #0] - - /*-------------------------- USART CR2 Configuration -----------------------*/ - /* Configure the UART Stop Bits: Set STOP[13:12] bits according - * to huart->Init.StopBits value */ - MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); - 8003a30: 687b ldr r3, [r7, #4] - 8003a32: 681b ldr r3, [r3, #0] - 8003a34: 685b ldr r3, [r3, #4] - 8003a36: f423 5140 bic.w r1, r3, #12288 ; 0x3000 - 8003a3a: 687b ldr r3, [r7, #4] - 8003a3c: 68da ldr r2, [r3, #12] - 8003a3e: 687b ldr r3, [r7, #4] - 8003a40: 681b ldr r3, [r3, #0] - 8003a42: 430a orrs r2, r1 - 8003a44: 605a str r2, [r3, #4] - /* Configure - * - UART HardWare Flow Control: set CTSE and RTSE bits according - * to huart->Init.HwFlowCtl value - * - one-bit sampling method versus three samples' majority rule according - * to huart->Init.OneBitSampling (not applicable to LPUART) */ - tmpreg = (uint32_t)huart->Init.HwFlowCtl; - 8003a46: 687b ldr r3, [r7, #4] - 8003a48: 699b ldr r3, [r3, #24] - 8003a4a: 613b str r3, [r7, #16] + 8005e94: b580 push {r7, lr} + 8005e96: b088 sub sp, #32 + 8005e98: af00 add r7, sp, #0 + 8005e9a: 6078 str r0, [r7, #4] + uint32_t tickstart = 0; + 8005e9c: 2300 movs r3, #0 + 8005e9e: 617b str r3, [r7, #20] + uint32_t tmpreg0 = 0; + 8005ea0: 2300 movs r3, #0 + 8005ea2: 613b str r3, [r7, #16] + uint32_t tmpreg1 = 0; + 8005ea4: 2300 movs r3, #0 + 8005ea6: 60fb str r3, [r7, #12] + uint32_t plli2sused = 0; + 8005ea8: 2300 movs r3, #0 + 8005eaa: 61fb str r3, [r7, #28] + uint32_t pllsaiused = 0; + 8005eac: 2300 movs r3, #0 + 8005eae: 61bb str r3, [r7, #24] - tmpreg |= huart->Init.OneBitSampling; - 8003a4c: 687b ldr r3, [r7, #4] - 8003a4e: 6a1b ldr r3, [r3, #32] - 8003a50: 693a ldr r2, [r7, #16] - 8003a52: 4313 orrs r3, r2 - 8003a54: 613b str r3, [r7, #16] - MODIFY_REG(huart->Instance->CR3, USART_CR3_FIELDS, tmpreg); - 8003a56: 687b ldr r3, [r7, #4] - 8003a58: 681b ldr r3, [r3, #0] - 8003a5a: 689b ldr r3, [r3, #8] - 8003a5c: f423 6130 bic.w r1, r3, #2816 ; 0xb00 - 8003a60: 687b ldr r3, [r7, #4] - 8003a62: 681b ldr r3, [r3, #0] - 8003a64: 693a ldr r2, [r7, #16] - 8003a66: 430a orrs r2, r1 - 8003a68: 609a str r2, [r3, #8] + /* Check the parameters */ + assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection)); + /*----------------------------------- I2S configuration ----------------------------------*/ + if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S) == (RCC_PERIPHCLK_I2S)) + 8005eb0: 687b ldr r3, [r7, #4] + 8005eb2: 681b ldr r3, [r3, #0] + 8005eb4: f003 0301 and.w r3, r3, #1 + 8005eb8: 2b00 cmp r3, #0 + 8005eba: d012 beq.n 8005ee2 + { + /* Check the parameters */ + assert_param(IS_RCC_I2SCLKSOURCE(PeriphClkInit->I2sClockSelection)); - /*-------------------------- USART BRR Configuration -----------------------*/ - UART_GETCLOCKSOURCE(huart, clocksource); - 8003a6a: 687b ldr r3, [r7, #4] - 8003a6c: 681b ldr r3, [r3, #0] - 8003a6e: 4a9f ldr r2, [pc, #636] ; (8003cec ) - 8003a70: 4293 cmp r3, r2 - 8003a72: d121 bne.n 8003ab8 - 8003a74: 4b9e ldr r3, [pc, #632] ; (8003cf0 ) - 8003a76: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 8003a7a: f003 0303 and.w r3, r3, #3 - 8003a7e: 2b03 cmp r3, #3 - 8003a80: d816 bhi.n 8003ab0 - 8003a82: a201 add r2, pc, #4 ; (adr r2, 8003a88 ) - 8003a84: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8003a88: 08003a99 .word 0x08003a99 - 8003a8c: 08003aa5 .word 0x08003aa5 - 8003a90: 08003a9f .word 0x08003a9f - 8003a94: 08003aab .word 0x08003aab - 8003a98: 2301 movs r3, #1 - 8003a9a: 77fb strb r3, [r7, #31] - 8003a9c: e151 b.n 8003d42 - 8003a9e: 2302 movs r3, #2 - 8003aa0: 77fb strb r3, [r7, #31] - 8003aa2: e14e b.n 8003d42 - 8003aa4: 2304 movs r3, #4 - 8003aa6: 77fb strb r3, [r7, #31] - 8003aa8: e14b b.n 8003d42 - 8003aaa: 2308 movs r3, #8 - 8003aac: 77fb strb r3, [r7, #31] - 8003aae: e148 b.n 8003d42 - 8003ab0: 2310 movs r3, #16 - 8003ab2: 77fb strb r3, [r7, #31] - 8003ab4: bf00 nop - 8003ab6: e144 b.n 8003d42 - 8003ab8: 687b ldr r3, [r7, #4] - 8003aba: 681b ldr r3, [r3, #0] - 8003abc: 4a8d ldr r2, [pc, #564] ; (8003cf4 ) - 8003abe: 4293 cmp r3, r2 - 8003ac0: d134 bne.n 8003b2c - 8003ac2: 4b8b ldr r3, [pc, #556] ; (8003cf0 ) - 8003ac4: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 8003ac8: f003 030c and.w r3, r3, #12 - 8003acc: 2b0c cmp r3, #12 - 8003ace: d829 bhi.n 8003b24 - 8003ad0: a201 add r2, pc, #4 ; (adr r2, 8003ad8 ) - 8003ad2: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8003ad6: bf00 nop - 8003ad8: 08003b0d .word 0x08003b0d - 8003adc: 08003b25 .word 0x08003b25 - 8003ae0: 08003b25 .word 0x08003b25 - 8003ae4: 08003b25 .word 0x08003b25 - 8003ae8: 08003b19 .word 0x08003b19 - 8003aec: 08003b25 .word 0x08003b25 - 8003af0: 08003b25 .word 0x08003b25 - 8003af4: 08003b25 .word 0x08003b25 - 8003af8: 08003b13 .word 0x08003b13 - 8003afc: 08003b25 .word 0x08003b25 - 8003b00: 08003b25 .word 0x08003b25 - 8003b04: 08003b25 .word 0x08003b25 - 8003b08: 08003b1f .word 0x08003b1f - 8003b0c: 2300 movs r3, #0 - 8003b0e: 77fb strb r3, [r7, #31] - 8003b10: e117 b.n 8003d42 - 8003b12: 2302 movs r3, #2 - 8003b14: 77fb strb r3, [r7, #31] - 8003b16: e114 b.n 8003d42 - 8003b18: 2304 movs r3, #4 - 8003b1a: 77fb strb r3, [r7, #31] - 8003b1c: e111 b.n 8003d42 - 8003b1e: 2308 movs r3, #8 - 8003b20: 77fb strb r3, [r7, #31] - 8003b22: e10e b.n 8003d42 - 8003b24: 2310 movs r3, #16 - 8003b26: 77fb strb r3, [r7, #31] - 8003b28: bf00 nop - 8003b2a: e10a b.n 8003d42 - 8003b2c: 687b ldr r3, [r7, #4] - 8003b2e: 681b ldr r3, [r3, #0] - 8003b30: 4a71 ldr r2, [pc, #452] ; (8003cf8 ) - 8003b32: 4293 cmp r3, r2 - 8003b34: d120 bne.n 8003b78 - 8003b36: 4b6e ldr r3, [pc, #440] ; (8003cf0 ) - 8003b38: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 8003b3c: f003 0330 and.w r3, r3, #48 ; 0x30 - 8003b40: 2b10 cmp r3, #16 - 8003b42: d00f beq.n 8003b64 - 8003b44: 2b10 cmp r3, #16 - 8003b46: d802 bhi.n 8003b4e - 8003b48: 2b00 cmp r3, #0 - 8003b4a: d005 beq.n 8003b58 - 8003b4c: e010 b.n 8003b70 - 8003b4e: 2b20 cmp r3, #32 - 8003b50: d005 beq.n 8003b5e - 8003b52: 2b30 cmp r3, #48 ; 0x30 - 8003b54: d009 beq.n 8003b6a - 8003b56: e00b b.n 8003b70 - 8003b58: 2300 movs r3, #0 - 8003b5a: 77fb strb r3, [r7, #31] - 8003b5c: e0f1 b.n 8003d42 - 8003b5e: 2302 movs r3, #2 - 8003b60: 77fb strb r3, [r7, #31] - 8003b62: e0ee b.n 8003d42 - 8003b64: 2304 movs r3, #4 - 8003b66: 77fb strb r3, [r7, #31] - 8003b68: e0eb b.n 8003d42 - 8003b6a: 2308 movs r3, #8 - 8003b6c: 77fb strb r3, [r7, #31] - 8003b6e: e0e8 b.n 8003d42 - 8003b70: 2310 movs r3, #16 - 8003b72: 77fb strb r3, [r7, #31] - 8003b74: bf00 nop - 8003b76: e0e4 b.n 8003d42 - 8003b78: 687b ldr r3, [r7, #4] - 8003b7a: 681b ldr r3, [r3, #0] - 8003b7c: 4a5f ldr r2, [pc, #380] ; (8003cfc ) - 8003b7e: 4293 cmp r3, r2 - 8003b80: d120 bne.n 8003bc4 - 8003b82: 4b5b ldr r3, [pc, #364] ; (8003cf0 ) - 8003b84: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 8003b88: f003 03c0 and.w r3, r3, #192 ; 0xc0 - 8003b8c: 2b40 cmp r3, #64 ; 0x40 - 8003b8e: d00f beq.n 8003bb0 - 8003b90: 2b40 cmp r3, #64 ; 0x40 - 8003b92: d802 bhi.n 8003b9a - 8003b94: 2b00 cmp r3, #0 - 8003b96: d005 beq.n 8003ba4 - 8003b98: e010 b.n 8003bbc - 8003b9a: 2b80 cmp r3, #128 ; 0x80 - 8003b9c: d005 beq.n 8003baa - 8003b9e: 2bc0 cmp r3, #192 ; 0xc0 - 8003ba0: d009 beq.n 8003bb6 - 8003ba2: e00b b.n 8003bbc - 8003ba4: 2300 movs r3, #0 - 8003ba6: 77fb strb r3, [r7, #31] - 8003ba8: e0cb b.n 8003d42 - 8003baa: 2302 movs r3, #2 - 8003bac: 77fb strb r3, [r7, #31] - 8003bae: e0c8 b.n 8003d42 - 8003bb0: 2304 movs r3, #4 - 8003bb2: 77fb strb r3, [r7, #31] - 8003bb4: e0c5 b.n 8003d42 - 8003bb6: 2308 movs r3, #8 - 8003bb8: 77fb strb r3, [r7, #31] - 8003bba: e0c2 b.n 8003d42 - 8003bbc: 2310 movs r3, #16 - 8003bbe: 77fb strb r3, [r7, #31] - 8003bc0: bf00 nop - 8003bc2: e0be b.n 8003d42 - 8003bc4: 687b ldr r3, [r7, #4] - 8003bc6: 681b ldr r3, [r3, #0] - 8003bc8: 4a4d ldr r2, [pc, #308] ; (8003d00 ) - 8003bca: 4293 cmp r3, r2 - 8003bcc: d124 bne.n 8003c18 - 8003bce: 4b48 ldr r3, [pc, #288] ; (8003cf0 ) - 8003bd0: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 8003bd4: f403 7340 and.w r3, r3, #768 ; 0x300 - 8003bd8: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 8003bdc: d012 beq.n 8003c04 - 8003bde: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 8003be2: d802 bhi.n 8003bea - 8003be4: 2b00 cmp r3, #0 - 8003be6: d007 beq.n 8003bf8 - 8003be8: e012 b.n 8003c10 - 8003bea: f5b3 7f00 cmp.w r3, #512 ; 0x200 - 8003bee: d006 beq.n 8003bfe - 8003bf0: f5b3 7f40 cmp.w r3, #768 ; 0x300 - 8003bf4: d009 beq.n 8003c0a - 8003bf6: e00b b.n 8003c10 - 8003bf8: 2300 movs r3, #0 - 8003bfa: 77fb strb r3, [r7, #31] - 8003bfc: e0a1 b.n 8003d42 - 8003bfe: 2302 movs r3, #2 - 8003c00: 77fb strb r3, [r7, #31] - 8003c02: e09e b.n 8003d42 - 8003c04: 2304 movs r3, #4 - 8003c06: 77fb strb r3, [r7, #31] - 8003c08: e09b b.n 8003d42 - 8003c0a: 2308 movs r3, #8 - 8003c0c: 77fb strb r3, [r7, #31] - 8003c0e: e098 b.n 8003d42 - 8003c10: 2310 movs r3, #16 - 8003c12: 77fb strb r3, [r7, #31] - 8003c14: bf00 nop - 8003c16: e094 b.n 8003d42 - 8003c18: 687b ldr r3, [r7, #4] - 8003c1a: 681b ldr r3, [r3, #0] - 8003c1c: 4a39 ldr r2, [pc, #228] ; (8003d04 ) - 8003c1e: 4293 cmp r3, r2 - 8003c20: d124 bne.n 8003c6c - 8003c22: 4b33 ldr r3, [pc, #204] ; (8003cf0 ) - 8003c24: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 8003c28: f403 6340 and.w r3, r3, #3072 ; 0xc00 - 8003c2c: f5b3 6f80 cmp.w r3, #1024 ; 0x400 - 8003c30: d012 beq.n 8003c58 - 8003c32: f5b3 6f80 cmp.w r3, #1024 ; 0x400 - 8003c36: d802 bhi.n 8003c3e - 8003c38: 2b00 cmp r3, #0 - 8003c3a: d007 beq.n 8003c4c - 8003c3c: e012 b.n 8003c64 - 8003c3e: f5b3 6f00 cmp.w r3, #2048 ; 0x800 - 8003c42: d006 beq.n 8003c52 - 8003c44: f5b3 6f40 cmp.w r3, #3072 ; 0xc00 - 8003c48: d009 beq.n 8003c5e - 8003c4a: e00b b.n 8003c64 - 8003c4c: 2301 movs r3, #1 - 8003c4e: 77fb strb r3, [r7, #31] - 8003c50: e077 b.n 8003d42 - 8003c52: 2302 movs r3, #2 - 8003c54: 77fb strb r3, [r7, #31] - 8003c56: e074 b.n 8003d42 - 8003c58: 2304 movs r3, #4 - 8003c5a: 77fb strb r3, [r7, #31] - 8003c5c: e071 b.n 8003d42 - 8003c5e: 2308 movs r3, #8 - 8003c60: 77fb strb r3, [r7, #31] - 8003c62: e06e b.n 8003d42 - 8003c64: 2310 movs r3, #16 - 8003c66: 77fb strb r3, [r7, #31] - 8003c68: bf00 nop - 8003c6a: e06a b.n 8003d42 - 8003c6c: 687b ldr r3, [r7, #4] - 8003c6e: 681b ldr r3, [r3, #0] - 8003c70: 4a25 ldr r2, [pc, #148] ; (8003d08 ) - 8003c72: 4293 cmp r3, r2 - 8003c74: d124 bne.n 8003cc0 - 8003c76: 4b1e ldr r3, [pc, #120] ; (8003cf0 ) - 8003c78: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 8003c7c: f403 5340 and.w r3, r3, #12288 ; 0x3000 - 8003c80: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 8003c84: d012 beq.n 8003cac - 8003c86: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 8003c8a: d802 bhi.n 8003c92 - 8003c8c: 2b00 cmp r3, #0 - 8003c8e: d007 beq.n 8003ca0 - 8003c90: e012 b.n 8003cb8 - 8003c92: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 - 8003c96: d006 beq.n 8003ca6 - 8003c98: f5b3 5f40 cmp.w r3, #12288 ; 0x3000 - 8003c9c: d009 beq.n 8003cb2 - 8003c9e: e00b b.n 8003cb8 - 8003ca0: 2300 movs r3, #0 - 8003ca2: 77fb strb r3, [r7, #31] - 8003ca4: e04d b.n 8003d42 - 8003ca6: 2302 movs r3, #2 - 8003ca8: 77fb strb r3, [r7, #31] - 8003caa: e04a b.n 8003d42 - 8003cac: 2304 movs r3, #4 - 8003cae: 77fb strb r3, [r7, #31] - 8003cb0: e047 b.n 8003d42 - 8003cb2: 2308 movs r3, #8 - 8003cb4: 77fb strb r3, [r7, #31] - 8003cb6: e044 b.n 8003d42 - 8003cb8: 2310 movs r3, #16 - 8003cba: 77fb strb r3, [r7, #31] - 8003cbc: bf00 nop - 8003cbe: e040 b.n 8003d42 - 8003cc0: 687b ldr r3, [r7, #4] - 8003cc2: 681b ldr r3, [r3, #0] - 8003cc4: 4a11 ldr r2, [pc, #68] ; (8003d0c ) - 8003cc6: 4293 cmp r3, r2 - 8003cc8: d139 bne.n 8003d3e - 8003cca: 4b09 ldr r3, [pc, #36] ; (8003cf0 ) - 8003ccc: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 8003cd0: f403 4340 and.w r3, r3, #49152 ; 0xc000 - 8003cd4: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 - 8003cd8: d027 beq.n 8003d2a - 8003cda: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 - 8003cde: d817 bhi.n 8003d10 - 8003ce0: 2b00 cmp r3, #0 - 8003ce2: d01c beq.n 8003d1e - 8003ce4: e027 b.n 8003d36 - 8003ce6: bf00 nop - 8003ce8: efff69f3 .word 0xefff69f3 - 8003cec: 40011000 .word 0x40011000 - 8003cf0: 40023800 .word 0x40023800 - 8003cf4: 40004400 .word 0x40004400 - 8003cf8: 40004800 .word 0x40004800 - 8003cfc: 40004c00 .word 0x40004c00 - 8003d00: 40005000 .word 0x40005000 - 8003d04: 40011400 .word 0x40011400 - 8003d08: 40007800 .word 0x40007800 - 8003d0c: 40007c00 .word 0x40007c00 - 8003d10: f5b3 4f00 cmp.w r3, #32768 ; 0x8000 - 8003d14: d006 beq.n 8003d24 - 8003d16: f5b3 4f40 cmp.w r3, #49152 ; 0xc000 - 8003d1a: d009 beq.n 8003d30 - 8003d1c: e00b b.n 8003d36 - 8003d1e: 2300 movs r3, #0 - 8003d20: 77fb strb r3, [r7, #31] - 8003d22: e00e b.n 8003d42 - 8003d24: 2302 movs r3, #2 - 8003d26: 77fb strb r3, [r7, #31] - 8003d28: e00b b.n 8003d42 - 8003d2a: 2304 movs r3, #4 - 8003d2c: 77fb strb r3, [r7, #31] - 8003d2e: e008 b.n 8003d42 - 8003d30: 2308 movs r3, #8 - 8003d32: 77fb strb r3, [r7, #31] - 8003d34: e005 b.n 8003d42 - 8003d36: 2310 movs r3, #16 - 8003d38: 77fb strb r3, [r7, #31] - 8003d3a: bf00 nop - 8003d3c: e001 b.n 8003d42 - 8003d3e: 2310 movs r3, #16 - 8003d40: 77fb strb r3, [r7, #31] + /* Configure I2S Clock source */ + __HAL_RCC_I2S_CONFIG(PeriphClkInit->I2sClockSelection); + 8005ebc: 4b69 ldr r3, [pc, #420] ; (8006064 ) + 8005ebe: 689b ldr r3, [r3, #8] + 8005ec0: 4a68 ldr r2, [pc, #416] ; (8006064 ) + 8005ec2: f423 0300 bic.w r3, r3, #8388608 ; 0x800000 + 8005ec6: 6093 str r3, [r2, #8] + 8005ec8: 4b66 ldr r3, [pc, #408] ; (8006064 ) + 8005eca: 689a ldr r2, [r3, #8] + 8005ecc: 687b ldr r3, [r7, #4] + 8005ece: 6b5b ldr r3, [r3, #52] ; 0x34 + 8005ed0: 4964 ldr r1, [pc, #400] ; (8006064 ) + 8005ed2: 4313 orrs r3, r2 + 8005ed4: 608b str r3, [r1, #8] - if (huart->Init.OverSampling == UART_OVERSAMPLING_8) - 8003d42: 687b ldr r3, [r7, #4] - 8003d44: 69db ldr r3, [r3, #28] - 8003d46: f5b3 4f00 cmp.w r3, #32768 ; 0x8000 - 8003d4a: d17c bne.n 8003e46 - { - switch (clocksource) - 8003d4c: 7ffb ldrb r3, [r7, #31] - 8003d4e: 2b08 cmp r3, #8 - 8003d50: d859 bhi.n 8003e06 - 8003d52: a201 add r2, pc, #4 ; (adr r2, 8003d58 ) - 8003d54: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8003d58: 08003d7d .word 0x08003d7d - 8003d5c: 08003d9b .word 0x08003d9b - 8003d60: 08003db9 .word 0x08003db9 - 8003d64: 08003e07 .word 0x08003e07 - 8003d68: 08003dd1 .word 0x08003dd1 - 8003d6c: 08003e07 .word 0x08003e07 - 8003d70: 08003e07 .word 0x08003e07 - 8003d74: 08003e07 .word 0x08003e07 - 8003d78: 08003def .word 0x08003def + /* Enable the PLLI2S when it's used as clock source for I2S */ + if(PeriphClkInit->I2sClockSelection == RCC_I2SCLKSOURCE_PLLI2S) + 8005ed6: 687b ldr r3, [r7, #4] + 8005ed8: 6b5b ldr r3, [r3, #52] ; 0x34 + 8005eda: 2b00 cmp r3, #0 + 8005edc: d101 bne.n 8005ee2 { - case UART_CLOCKSOURCE_PCLK1: - usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate)); - 8003d7c: f7fd fec8 bl 8001b10 - 8003d80: 4603 mov r3, r0 - 8003d82: 005a lsls r2, r3, #1 - 8003d84: 687b ldr r3, [r7, #4] - 8003d86: 685b ldr r3, [r3, #4] - 8003d88: 085b lsrs r3, r3, #1 - 8003d8a: 441a add r2, r3 - 8003d8c: 687b ldr r3, [r7, #4] - 8003d8e: 685b ldr r3, [r3, #4] - 8003d90: fbb2 f3f3 udiv r3, r2, r3 - 8003d94: b29b uxth r3, r3 - 8003d96: 61bb str r3, [r7, #24] - break; - 8003d98: e038 b.n 8003e0c - case UART_CLOCKSOURCE_PCLK2: - usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate)); - 8003d9a: f7fd fecd bl 8001b38 - 8003d9e: 4603 mov r3, r0 - 8003da0: 005a lsls r2, r3, #1 - 8003da2: 687b ldr r3, [r7, #4] - 8003da4: 685b ldr r3, [r3, #4] - 8003da6: 085b lsrs r3, r3, #1 - 8003da8: 441a add r2, r3 - 8003daa: 687b ldr r3, [r7, #4] - 8003dac: 685b ldr r3, [r3, #4] - 8003dae: fbb2 f3f3 udiv r3, r2, r3 - 8003db2: b29b uxth r3, r3 - 8003db4: 61bb str r3, [r7, #24] - break; - 8003db6: e029 b.n 8003e0c - case UART_CLOCKSOURCE_HSI: - usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HSI_VALUE, huart->Init.BaudRate)); - 8003db8: 687b ldr r3, [r7, #4] - 8003dba: 685b ldr r3, [r3, #4] - 8003dbc: 085a lsrs r2, r3, #1 - 8003dbe: 4b5d ldr r3, [pc, #372] ; (8003f34 ) - 8003dc0: 4413 add r3, r2 - 8003dc2: 687a ldr r2, [r7, #4] - 8003dc4: 6852 ldr r2, [r2, #4] - 8003dc6: fbb3 f3f2 udiv r3, r3, r2 - 8003dca: b29b uxth r3, r3 - 8003dcc: 61bb str r3, [r7, #24] - break; - 8003dce: e01d b.n 8003e0c - case UART_CLOCKSOURCE_SYSCLK: - usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HAL_RCC_GetSysClockFreq(), huart->Init.BaudRate)); - 8003dd0: f7fd fde0 bl 8001994 - 8003dd4: 4603 mov r3, r0 - 8003dd6: 005a lsls r2, r3, #1 - 8003dd8: 687b ldr r3, [r7, #4] - 8003dda: 685b ldr r3, [r3, #4] - 8003ddc: 085b lsrs r3, r3, #1 - 8003dde: 441a add r2, r3 - 8003de0: 687b ldr r3, [r7, #4] - 8003de2: 685b ldr r3, [r3, #4] - 8003de4: fbb2 f3f3 udiv r3, r2, r3 - 8003de8: b29b uxth r3, r3 - 8003dea: 61bb str r3, [r7, #24] - break; - 8003dec: e00e b.n 8003e0c - case UART_CLOCKSOURCE_LSE: - usartdiv = (uint16_t)(UART_DIV_SAMPLING8(LSE_VALUE, huart->Init.BaudRate)); - 8003dee: 687b ldr r3, [r7, #4] - 8003df0: 685b ldr r3, [r3, #4] - 8003df2: 085b lsrs r3, r3, #1 - 8003df4: f503 3280 add.w r2, r3, #65536 ; 0x10000 - 8003df8: 687b ldr r3, [r7, #4] - 8003dfa: 685b ldr r3, [r3, #4] - 8003dfc: fbb2 f3f3 udiv r3, r2, r3 - 8003e00: b29b uxth r3, r3 - 8003e02: 61bb str r3, [r7, #24] - break; - 8003e04: e002 b.n 8003e0c - case UART_CLOCKSOURCE_UNDEFINED: - default: - ret = HAL_ERROR; - 8003e06: 2301 movs r3, #1 - 8003e08: 75fb strb r3, [r7, #23] - break; - 8003e0a: bf00 nop + plli2sused = 1; + 8005ede: 2301 movs r3, #1 + 8005ee0: 61fb str r3, [r7, #28] } + } - /* USARTDIV must be greater than or equal to 0d16 */ - if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX)) - 8003e0c: 69bb ldr r3, [r7, #24] - 8003e0e: 2b0f cmp r3, #15 - 8003e10: d916 bls.n 8003e40 - 8003e12: 69bb ldr r3, [r7, #24] - 8003e14: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 8003e18: d212 bcs.n 8003e40 + /*------------------------------------ SAI1 configuration --------------------------------------*/ + if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == (RCC_PERIPHCLK_SAI1)) + 8005ee2: 687b ldr r3, [r7, #4] + 8005ee4: 681b ldr r3, [r3, #0] + 8005ee6: f403 2300 and.w r3, r3, #524288 ; 0x80000 + 8005eea: 2b00 cmp r3, #0 + 8005eec: d017 beq.n 8005f1e + { + /* Check the parameters */ + assert_param(IS_RCC_SAI1CLKSOURCE(PeriphClkInit->Sai1ClockSelection)); + + /* Configure SAI1 Clock source */ + __HAL_RCC_SAI1_CONFIG(PeriphClkInit->Sai1ClockSelection); + 8005eee: 4b5d ldr r3, [pc, #372] ; (8006064 ) + 8005ef0: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c + 8005ef4: f423 1240 bic.w r2, r3, #3145728 ; 0x300000 + 8005ef8: 687b ldr r3, [r7, #4] + 8005efa: 6bdb ldr r3, [r3, #60] ; 0x3c + 8005efc: 4959 ldr r1, [pc, #356] ; (8006064 ) + 8005efe: 4313 orrs r3, r2 + 8005f00: f8c1 308c str.w r3, [r1, #140] ; 0x8c + /* Enable the PLLI2S when it's used as clock source for SAI */ + if(PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLI2S) + 8005f04: 687b ldr r3, [r7, #4] + 8005f06: 6bdb ldr r3, [r3, #60] ; 0x3c + 8005f08: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000 + 8005f0c: d101 bne.n 8005f12 { - brrtemp = (uint16_t)(usartdiv & 0xFFF0U); - 8003e1a: 69bb ldr r3, [r7, #24] - 8003e1c: b29b uxth r3, r3 - 8003e1e: f023 030f bic.w r3, r3, #15 - 8003e22: 81fb strh r3, [r7, #14] - brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U); - 8003e24: 69bb ldr r3, [r7, #24] - 8003e26: 085b lsrs r3, r3, #1 - 8003e28: b29b uxth r3, r3 - 8003e2a: f003 0307 and.w r3, r3, #7 - 8003e2e: b29a uxth r2, r3 - 8003e30: 89fb ldrh r3, [r7, #14] - 8003e32: 4313 orrs r3, r2 - 8003e34: 81fb strh r3, [r7, #14] - huart->Instance->BRR = brrtemp; - 8003e36: 687b ldr r3, [r7, #4] - 8003e38: 681b ldr r3, [r3, #0] - 8003e3a: 89fa ldrh r2, [r7, #14] - 8003e3c: 60da str r2, [r3, #12] - 8003e3e: e06e b.n 8003f1e + plli2sused = 1; + 8005f0e: 2301 movs r3, #1 + 8005f10: 61fb str r3, [r7, #28] } - else + /* Enable the PLLSAI when it's used as clock source for SAI */ + if(PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLSAI) + 8005f12: 687b ldr r3, [r7, #4] + 8005f14: 6bdb ldr r3, [r3, #60] ; 0x3c + 8005f16: 2b00 cmp r3, #0 + 8005f18: d101 bne.n 8005f1e { - ret = HAL_ERROR; - 8003e40: 2301 movs r3, #1 - 8003e42: 75fb strb r3, [r7, #23] - 8003e44: e06b b.n 8003f1e + pllsaiused = 1; + 8005f1a: 2301 movs r3, #1 + 8005f1c: 61bb str r3, [r7, #24] } } - else + + /*------------------------------------ SAI2 configuration --------------------------------------*/ + if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == (RCC_PERIPHCLK_SAI2)) + 8005f1e: 687b ldr r3, [r7, #4] + 8005f20: 681b ldr r3, [r3, #0] + 8005f22: f403 1380 and.w r3, r3, #1048576 ; 0x100000 + 8005f26: 2b00 cmp r3, #0 + 8005f28: d017 beq.n 8005f5a { - switch (clocksource) - 8003e46: 7ffb ldrb r3, [r7, #31] - 8003e48: 2b08 cmp r3, #8 - 8003e4a: d857 bhi.n 8003efc - 8003e4c: a201 add r2, pc, #4 ; (adr r2, 8003e54 ) - 8003e4e: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8003e52: bf00 nop - 8003e54: 08003e79 .word 0x08003e79 - 8003e58: 08003e95 .word 0x08003e95 - 8003e5c: 08003eb1 .word 0x08003eb1 - 8003e60: 08003efd .word 0x08003efd - 8003e64: 08003ec9 .word 0x08003ec9 - 8003e68: 08003efd .word 0x08003efd - 8003e6c: 08003efd .word 0x08003efd - 8003e70: 08003efd .word 0x08003efd - 8003e74: 08003ee5 .word 0x08003ee5 + /* Check the parameters */ + assert_param(IS_RCC_SAI2CLKSOURCE(PeriphClkInit->Sai2ClockSelection)); + + /* Configure SAI2 Clock source */ + __HAL_RCC_SAI2_CONFIG(PeriphClkInit->Sai2ClockSelection); + 8005f2a: 4b4e ldr r3, [pc, #312] ; (8006064 ) + 8005f2c: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c + 8005f30: f423 0240 bic.w r2, r3, #12582912 ; 0xc00000 + 8005f34: 687b ldr r3, [r7, #4] + 8005f36: 6c1b ldr r3, [r3, #64] ; 0x40 + 8005f38: 494a ldr r1, [pc, #296] ; (8006064 ) + 8005f3a: 4313 orrs r3, r2 + 8005f3c: f8c1 308c str.w r3, [r1, #140] ; 0x8c + + /* Enable the PLLI2S when it's used as clock source for SAI */ + if(PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLI2S) + 8005f40: 687b ldr r3, [r7, #4] + 8005f42: 6c1b ldr r3, [r3, #64] ; 0x40 + 8005f44: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000 + 8005f48: d101 bne.n 8005f4e { - case UART_CLOCKSOURCE_PCLK1: - usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate)); - 8003e78: f7fd fe4a bl 8001b10 - 8003e7c: 4602 mov r2, r0 - 8003e7e: 687b ldr r3, [r7, #4] - 8003e80: 685b ldr r3, [r3, #4] - 8003e82: 085b lsrs r3, r3, #1 - 8003e84: 441a add r2, r3 - 8003e86: 687b ldr r3, [r7, #4] - 8003e88: 685b ldr r3, [r3, #4] - 8003e8a: fbb2 f3f3 udiv r3, r2, r3 - 8003e8e: b29b uxth r3, r3 - 8003e90: 61bb str r3, [r7, #24] - break; - 8003e92: e036 b.n 8003f02 - case UART_CLOCKSOURCE_PCLK2: - usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate)); - 8003e94: f7fd fe50 bl 8001b38 - 8003e98: 4602 mov r2, r0 - 8003e9a: 687b ldr r3, [r7, #4] - 8003e9c: 685b ldr r3, [r3, #4] - 8003e9e: 085b lsrs r3, r3, #1 - 8003ea0: 441a add r2, r3 - 8003ea2: 687b ldr r3, [r7, #4] - 8003ea4: 685b ldr r3, [r3, #4] - 8003ea6: fbb2 f3f3 udiv r3, r2, r3 - 8003eaa: b29b uxth r3, r3 - 8003eac: 61bb str r3, [r7, #24] - break; - 8003eae: e028 b.n 8003f02 - case UART_CLOCKSOURCE_HSI: - usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HSI_VALUE, huart->Init.BaudRate)); - 8003eb0: 687b ldr r3, [r7, #4] - 8003eb2: 685b ldr r3, [r3, #4] - 8003eb4: 085a lsrs r2, r3, #1 - 8003eb6: 4b20 ldr r3, [pc, #128] ; (8003f38 ) - 8003eb8: 4413 add r3, r2 - 8003eba: 687a ldr r2, [r7, #4] - 8003ebc: 6852 ldr r2, [r2, #4] - 8003ebe: fbb3 f3f2 udiv r3, r3, r2 - 8003ec2: b29b uxth r3, r3 - 8003ec4: 61bb str r3, [r7, #24] - break; - 8003ec6: e01c b.n 8003f02 - case UART_CLOCKSOURCE_SYSCLK: - usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetSysClockFreq(), huart->Init.BaudRate)); - 8003ec8: f7fd fd64 bl 8001994 - 8003ecc: 4602 mov r2, r0 - 8003ece: 687b ldr r3, [r7, #4] - 8003ed0: 685b ldr r3, [r3, #4] - 8003ed2: 085b lsrs r3, r3, #1 - 8003ed4: 441a add r2, r3 - 8003ed6: 687b ldr r3, [r7, #4] - 8003ed8: 685b ldr r3, [r3, #4] - 8003eda: fbb2 f3f3 udiv r3, r2, r3 - 8003ede: b29b uxth r3, r3 - 8003ee0: 61bb str r3, [r7, #24] - break; - 8003ee2: e00e b.n 8003f02 - case UART_CLOCKSOURCE_LSE: - usartdiv = (uint16_t)(UART_DIV_SAMPLING16(LSE_VALUE, huart->Init.BaudRate)); - 8003ee4: 687b ldr r3, [r7, #4] - 8003ee6: 685b ldr r3, [r3, #4] - 8003ee8: 085b lsrs r3, r3, #1 - 8003eea: f503 4200 add.w r2, r3, #32768 ; 0x8000 - 8003eee: 687b ldr r3, [r7, #4] - 8003ef0: 685b ldr r3, [r3, #4] - 8003ef2: fbb2 f3f3 udiv r3, r2, r3 - 8003ef6: b29b uxth r3, r3 - 8003ef8: 61bb str r3, [r7, #24] - break; - 8003efa: e002 b.n 8003f02 - case UART_CLOCKSOURCE_UNDEFINED: - default: - ret = HAL_ERROR; - 8003efc: 2301 movs r3, #1 - 8003efe: 75fb strb r3, [r7, #23] - break; - 8003f00: bf00 nop + plli2sused = 1; + 8005f4a: 2301 movs r3, #1 + 8005f4c: 61fb str r3, [r7, #28] + } + /* Enable the PLLSAI when it's used as clock source for SAI */ + if(PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLSAI) + 8005f4e: 687b ldr r3, [r7, #4] + 8005f50: 6c1b ldr r3, [r3, #64] ; 0x40 + 8005f52: 2b00 cmp r3, #0 + 8005f54: d101 bne.n 8005f5a + { + pllsaiused = 1; + 8005f56: 2301 movs r3, #1 + 8005f58: 61bb str r3, [r7, #24] } + } - /* USARTDIV must be greater than or equal to 0d16 */ - if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX)) - 8003f02: 69bb ldr r3, [r7, #24] - 8003f04: 2b0f cmp r3, #15 - 8003f06: d908 bls.n 8003f1a - 8003f08: 69bb ldr r3, [r7, #24] - 8003f0a: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 8003f0e: d204 bcs.n 8003f1a + /*-------------------------------------- SPDIF-RX Configuration -----------------------------------*/ + if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPDIFRX) == RCC_PERIPHCLK_SPDIFRX) + 8005f5a: 687b ldr r3, [r7, #4] + 8005f5c: 681b ldr r3, [r3, #0] + 8005f5e: f003 7380 and.w r3, r3, #16777216 ; 0x1000000 + 8005f62: 2b00 cmp r3, #0 + 8005f64: d001 beq.n 8005f6a + { + plli2sused = 1; + 8005f66: 2301 movs r3, #1 + 8005f68: 61fb str r3, [r7, #28] + } + + /*------------------------------------ RTC configuration --------------------------------------*/ + if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == (RCC_PERIPHCLK_RTC)) + 8005f6a: 687b ldr r3, [r7, #4] + 8005f6c: 681b ldr r3, [r3, #0] + 8005f6e: f003 0320 and.w r3, r3, #32 + 8005f72: 2b00 cmp r3, #0 + 8005f74: f000 808b beq.w 800608e + { + /* Check for RTC Parameters used to output RTCCLK */ + assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection)); + + /* Enable Power Clock*/ + __HAL_RCC_PWR_CLK_ENABLE(); + 8005f78: 4b3a ldr r3, [pc, #232] ; (8006064 ) + 8005f7a: 6c1b ldr r3, [r3, #64] ; 0x40 + 8005f7c: 4a39 ldr r2, [pc, #228] ; (8006064 ) + 8005f7e: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 + 8005f82: 6413 str r3, [r2, #64] ; 0x40 + 8005f84: 4b37 ldr r3, [pc, #220] ; (8006064 ) + 8005f86: 6c1b ldr r3, [r3, #64] ; 0x40 + 8005f88: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 + 8005f8c: 60bb str r3, [r7, #8] + 8005f8e: 68bb ldr r3, [r7, #8] + + /* Enable write access to Backup domain */ + PWR->CR1 |= PWR_CR1_DBP; + 8005f90: 4b35 ldr r3, [pc, #212] ; (8006068 ) + 8005f92: 681b ldr r3, [r3, #0] + 8005f94: 4a34 ldr r2, [pc, #208] ; (8006068 ) + 8005f96: f443 7380 orr.w r3, r3, #256 ; 0x100 + 8005f9a: 6013 str r3, [r2, #0] + + /* Get Start Tick*/ + tickstart = HAL_GetTick(); + 8005f9c: f7fe fcc0 bl 8004920 + 8005fa0: 6178 str r0, [r7, #20] + + /* Wait for Backup domain Write protection disable */ + while((PWR->CR1 & PWR_CR1_DBP) == RESET) + 8005fa2: e008 b.n 8005fb6 { - huart->Instance->BRR = usartdiv; - 8003f10: 687b ldr r3, [r7, #4] - 8003f12: 681b ldr r3, [r3, #0] - 8003f14: 69ba ldr r2, [r7, #24] - 8003f16: 60da str r2, [r3, #12] - 8003f18: e001 b.n 8003f1e + if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) + 8005fa4: f7fe fcbc bl 8004920 + 8005fa8: 4602 mov r2, r0 + 8005faa: 697b ldr r3, [r7, #20] + 8005fac: 1ad3 subs r3, r2, r3 + 8005fae: 2b64 cmp r3, #100 ; 0x64 + 8005fb0: d901 bls.n 8005fb6 + { + return HAL_TIMEOUT; + 8005fb2: 2303 movs r3, #3 + 8005fb4: e38d b.n 80066d2 + while((PWR->CR1 & PWR_CR1_DBP) == RESET) + 8005fb6: 4b2c ldr r3, [pc, #176] ; (8006068 ) + 8005fb8: 681b ldr r3, [r3, #0] + 8005fba: f403 7380 and.w r3, r3, #256 ; 0x100 + 8005fbe: 2b00 cmp r3, #0 + 8005fc0: d0f0 beq.n 8005fa4 + } } - else + + /* Reset the Backup domain only if the RTC Clock source selection is modified */ + tmpreg0 = (RCC->BDCR & RCC_BDCR_RTCSEL); + 8005fc2: 4b28 ldr r3, [pc, #160] ; (8006064 ) + 8005fc4: 6f1b ldr r3, [r3, #112] ; 0x70 + 8005fc6: f403 7340 and.w r3, r3, #768 ; 0x300 + 8005fca: 613b str r3, [r7, #16] + + if((tmpreg0 != 0x00000000U) && (tmpreg0 != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL))) + 8005fcc: 693b ldr r3, [r7, #16] + 8005fce: 2b00 cmp r3, #0 + 8005fd0: d035 beq.n 800603e + 8005fd2: 687b ldr r3, [r7, #4] + 8005fd4: 6b1b ldr r3, [r3, #48] ; 0x30 + 8005fd6: f403 7340 and.w r3, r3, #768 ; 0x300 + 8005fda: 693a ldr r2, [r7, #16] + 8005fdc: 429a cmp r2, r3 + 8005fde: d02e beq.n 800603e { - ret = HAL_ERROR; - 8003f1a: 2301 movs r3, #1 - 8003f1c: 75fb strb r3, [r7, #23] + /* Store the content of BDCR register before the reset of Backup Domain */ + tmpreg0 = (RCC->BDCR & ~(RCC_BDCR_RTCSEL)); + 8005fe0: 4b20 ldr r3, [pc, #128] ; (8006064 ) + 8005fe2: 6f1b ldr r3, [r3, #112] ; 0x70 + 8005fe4: f423 7340 bic.w r3, r3, #768 ; 0x300 + 8005fe8: 613b str r3, [r7, #16] + + /* RTC Clock selection can be changed only if the Backup Domain is reset */ + __HAL_RCC_BACKUPRESET_FORCE(); + 8005fea: 4b1e ldr r3, [pc, #120] ; (8006064 ) + 8005fec: 6f1b ldr r3, [r3, #112] ; 0x70 + 8005fee: 4a1d ldr r2, [pc, #116] ; (8006064 ) + 8005ff0: f443 3380 orr.w r3, r3, #65536 ; 0x10000 + 8005ff4: 6713 str r3, [r2, #112] ; 0x70 + __HAL_RCC_BACKUPRESET_RELEASE(); + 8005ff6: 4b1b ldr r3, [pc, #108] ; (8006064 ) + 8005ff8: 6f1b ldr r3, [r3, #112] ; 0x70 + 8005ffa: 4a1a ldr r2, [pc, #104] ; (8006064 ) + 8005ffc: f423 3380 bic.w r3, r3, #65536 ; 0x10000 + 8006000: 6713 str r3, [r2, #112] ; 0x70 + + /* Restore the Content of BDCR register */ + RCC->BDCR = tmpreg0; + 8006002: 4a18 ldr r2, [pc, #96] ; (8006064 ) + 8006004: 693b ldr r3, [r7, #16] + 8006006: 6713 str r3, [r2, #112] ; 0x70 + + /* Wait for LSE reactivation if LSE was enable prior to Backup Domain reset */ + if (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSEON)) + 8006008: 4b16 ldr r3, [pc, #88] ; (8006064 ) + 800600a: 6f1b ldr r3, [r3, #112] ; 0x70 + 800600c: f003 0301 and.w r3, r3, #1 + 8006010: 2b01 cmp r3, #1 + 8006012: d114 bne.n 800603e + { + /* Get Start Tick*/ + tickstart = HAL_GetTick(); + 8006014: f7fe fc84 bl 8004920 + 8006018: 6178 str r0, [r7, #20] + + /* Wait till LSE is ready */ + while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) + 800601a: e00a b.n 8006032 + { + if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) + 800601c: f7fe fc80 bl 8004920 + 8006020: 4602 mov r2, r0 + 8006022: 697b ldr r3, [r7, #20] + 8006024: 1ad3 subs r3, r2, r3 + 8006026: f241 3288 movw r2, #5000 ; 0x1388 + 800602a: 4293 cmp r3, r2 + 800602c: d901 bls.n 8006032 + { + return HAL_TIMEOUT; + 800602e: 2303 movs r3, #3 + 8006030: e34f b.n 80066d2 + while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) + 8006032: 4b0c ldr r3, [pc, #48] ; (8006064 ) + 8006034: 6f1b ldr r3, [r3, #112] ; 0x70 + 8006036: f003 0302 and.w r3, r3, #2 + 800603a: 2b00 cmp r3, #0 + 800603c: d0ee beq.n 800601c + } + } + } } + __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); + 800603e: 687b ldr r3, [r7, #4] + 8006040: 6b1b ldr r3, [r3, #48] ; 0x30 + 8006042: f403 7340 and.w r3, r3, #768 ; 0x300 + 8006046: f5b3 7f40 cmp.w r3, #768 ; 0x300 + 800604a: d111 bne.n 8006070 + 800604c: 4b05 ldr r3, [pc, #20] ; (8006064 ) + 800604e: 689b ldr r3, [r3, #8] + 8006050: f423 12f8 bic.w r2, r3, #2031616 ; 0x1f0000 + 8006054: 687b ldr r3, [r7, #4] + 8006056: 6b19 ldr r1, [r3, #48] ; 0x30 + 8006058: 4b04 ldr r3, [pc, #16] ; (800606c ) + 800605a: 400b ands r3, r1 + 800605c: 4901 ldr r1, [pc, #4] ; (8006064 ) + 800605e: 4313 orrs r3, r2 + 8006060: 608b str r3, [r1, #8] + 8006062: e00b b.n 800607c + 8006064: 40023800 .word 0x40023800 + 8006068: 40007000 .word 0x40007000 + 800606c: 0ffffcff .word 0x0ffffcff + 8006070: 4bb3 ldr r3, [pc, #716] ; (8006340 ) + 8006072: 689b ldr r3, [r3, #8] + 8006074: 4ab2 ldr r2, [pc, #712] ; (8006340 ) + 8006076: f423 13f8 bic.w r3, r3, #2031616 ; 0x1f0000 + 800607a: 6093 str r3, [r2, #8] + 800607c: 4bb0 ldr r3, [pc, #704] ; (8006340 ) + 800607e: 6f1a ldr r2, [r3, #112] ; 0x70 + 8006080: 687b ldr r3, [r7, #4] + 8006082: 6b1b ldr r3, [r3, #48] ; 0x30 + 8006084: f3c3 030b ubfx r3, r3, #0, #12 + 8006088: 49ad ldr r1, [pc, #692] ; (8006340 ) + 800608a: 4313 orrs r3, r2 + 800608c: 670b str r3, [r1, #112] ; 0x70 + } + + /*------------------------------------ TIM configuration --------------------------------------*/ + if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM) == (RCC_PERIPHCLK_TIM)) + 800608e: 687b ldr r3, [r7, #4] + 8006090: 681b ldr r3, [r3, #0] + 8006092: f003 0310 and.w r3, r3, #16 + 8006096: 2b00 cmp r3, #0 + 8006098: d010 beq.n 80060bc + { + /* Check the parameters */ + assert_param(IS_RCC_TIMPRES(PeriphClkInit->TIMPresSelection)); + + /* Configure Timer Prescaler */ + __HAL_RCC_TIMCLKPRESCALER(PeriphClkInit->TIMPresSelection); + 800609a: 4ba9 ldr r3, [pc, #676] ; (8006340 ) + 800609c: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c + 80060a0: 4aa7 ldr r2, [pc, #668] ; (8006340 ) + 80060a2: f023 7380 bic.w r3, r3, #16777216 ; 0x1000000 + 80060a6: f8c2 308c str.w r3, [r2, #140] ; 0x8c + 80060aa: 4ba5 ldr r3, [pc, #660] ; (8006340 ) + 80060ac: f8d3 208c ldr.w r2, [r3, #140] ; 0x8c + 80060b0: 687b ldr r3, [r7, #4] + 80060b2: 6b9b ldr r3, [r3, #56] ; 0x38 + 80060b4: 49a2 ldr r1, [pc, #648] ; (8006340 ) + 80060b6: 4313 orrs r3, r2 + 80060b8: f8c1 308c str.w r3, [r1, #140] ; 0x8c + } + + /*-------------------------------------- I2C1 Configuration -----------------------------------*/ + if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1) + 80060bc: 687b ldr r3, [r7, #4] + 80060be: 681b ldr r3, [r3, #0] + 80060c0: f403 4380 and.w r3, r3, #16384 ; 0x4000 + 80060c4: 2b00 cmp r3, #0 + 80060c6: d00a beq.n 80060de + { + /* Check the parameters */ + assert_param(IS_RCC_I2C1CLKSOURCE(PeriphClkInit->I2c1ClockSelection)); + + /* Configure the I2C1 clock source */ + __HAL_RCC_I2C1_CONFIG(PeriphClkInit->I2c1ClockSelection); + 80060c8: 4b9d ldr r3, [pc, #628] ; (8006340 ) + 80060ca: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 80060ce: f423 3240 bic.w r2, r3, #196608 ; 0x30000 + 80060d2: 687b ldr r3, [r7, #4] + 80060d4: 6e5b ldr r3, [r3, #100] ; 0x64 + 80060d6: 499a ldr r1, [pc, #616] ; (8006340 ) + 80060d8: 4313 orrs r3, r2 + 80060da: f8c1 3090 str.w r3, [r1, #144] ; 0x90 + } + + /*-------------------------------------- I2C2 Configuration -----------------------------------*/ + if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C2) == RCC_PERIPHCLK_I2C2) + 80060de: 687b ldr r3, [r7, #4] + 80060e0: 681b ldr r3, [r3, #0] + 80060e2: f403 4300 and.w r3, r3, #32768 ; 0x8000 + 80060e6: 2b00 cmp r3, #0 + 80060e8: d00a beq.n 8006100 + { + /* Check the parameters */ + assert_param(IS_RCC_I2C2CLKSOURCE(PeriphClkInit->I2c2ClockSelection)); + + /* Configure the I2C2 clock source */ + __HAL_RCC_I2C2_CONFIG(PeriphClkInit->I2c2ClockSelection); + 80060ea: 4b95 ldr r3, [pc, #596] ; (8006340 ) + 80060ec: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 80060f0: f423 2240 bic.w r2, r3, #786432 ; 0xc0000 + 80060f4: 687b ldr r3, [r7, #4] + 80060f6: 6e9b ldr r3, [r3, #104] ; 0x68 + 80060f8: 4991 ldr r1, [pc, #580] ; (8006340 ) + 80060fa: 4313 orrs r3, r2 + 80060fc: f8c1 3090 str.w r3, [r1, #144] ; 0x90 + } + + /*-------------------------------------- I2C3 Configuration -----------------------------------*/ + if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C3) == RCC_PERIPHCLK_I2C3) + 8006100: 687b ldr r3, [r7, #4] + 8006102: 681b ldr r3, [r3, #0] + 8006104: f403 3380 and.w r3, r3, #65536 ; 0x10000 + 8006108: 2b00 cmp r3, #0 + 800610a: d00a beq.n 8006122 + { + /* Check the parameters */ + assert_param(IS_RCC_I2C3CLKSOURCE(PeriphClkInit->I2c3ClockSelection)); + + /* Configure the I2C3 clock source */ + __HAL_RCC_I2C3_CONFIG(PeriphClkInit->I2c3ClockSelection); + 800610c: 4b8c ldr r3, [pc, #560] ; (8006340 ) + 800610e: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 8006112: f423 1240 bic.w r2, r3, #3145728 ; 0x300000 + 8006116: 687b ldr r3, [r7, #4] + 8006118: 6edb ldr r3, [r3, #108] ; 0x6c + 800611a: 4989 ldr r1, [pc, #548] ; (8006340 ) + 800611c: 4313 orrs r3, r2 + 800611e: f8c1 3090 str.w r3, [r1, #144] ; 0x90 + } + + /*-------------------------------------- I2C4 Configuration -----------------------------------*/ + if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C4) == RCC_PERIPHCLK_I2C4) + 8006122: 687b ldr r3, [r7, #4] + 8006124: 681b ldr r3, [r3, #0] + 8006126: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 800612a: 2b00 cmp r3, #0 + 800612c: d00a beq.n 8006144 + { + /* Check the parameters */ + assert_param(IS_RCC_I2C4CLKSOURCE(PeriphClkInit->I2c4ClockSelection)); + + /* Configure the I2C4 clock source */ + __HAL_RCC_I2C4_CONFIG(PeriphClkInit->I2c4ClockSelection); + 800612e: 4b84 ldr r3, [pc, #528] ; (8006340 ) + 8006130: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 8006134: f423 0240 bic.w r2, r3, #12582912 ; 0xc00000 + 8006138: 687b ldr r3, [r7, #4] + 800613a: 6f1b ldr r3, [r3, #112] ; 0x70 + 800613c: 4980 ldr r1, [pc, #512] ; (8006340 ) + 800613e: 4313 orrs r3, r2 + 8006140: f8c1 3090 str.w r3, [r1, #144] ; 0x90 + } + + /*-------------------------------------- USART1 Configuration -----------------------------------*/ + if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1) + 8006144: 687b ldr r3, [r7, #4] + 8006146: 681b ldr r3, [r3, #0] + 8006148: f003 0340 and.w r3, r3, #64 ; 0x40 + 800614c: 2b00 cmp r3, #0 + 800614e: d00a beq.n 8006166 + { + /* Check the parameters */ + assert_param(IS_RCC_USART1CLKSOURCE(PeriphClkInit->Usart1ClockSelection)); + + /* Configure the USART1 clock source */ + __HAL_RCC_USART1_CONFIG(PeriphClkInit->Usart1ClockSelection); + 8006150: 4b7b ldr r3, [pc, #492] ; (8006340 ) + 8006152: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 8006156: f023 0203 bic.w r2, r3, #3 + 800615a: 687b ldr r3, [r7, #4] + 800615c: 6c5b ldr r3, [r3, #68] ; 0x44 + 800615e: 4978 ldr r1, [pc, #480] ; (8006340 ) + 8006160: 4313 orrs r3, r2 + 8006162: f8c1 3090 str.w r3, [r1, #144] ; 0x90 } + /*-------------------------------------- USART2 Configuration -----------------------------------*/ + if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2) + 8006166: 687b ldr r3, [r7, #4] + 8006168: 681b ldr r3, [r3, #0] + 800616a: f003 0380 and.w r3, r3, #128 ; 0x80 + 800616e: 2b00 cmp r3, #0 + 8006170: d00a beq.n 8006188 + { + /* Check the parameters */ + assert_param(IS_RCC_USART2CLKSOURCE(PeriphClkInit->Usart2ClockSelection)); - /* Clear ISR function pointers */ - huart->RxISR = NULL; - 8003f1e: 687b ldr r3, [r7, #4] - 8003f20: 2200 movs r2, #0 - 8003f22: 661a str r2, [r3, #96] ; 0x60 - huart->TxISR = NULL; - 8003f24: 687b ldr r3, [r7, #4] - 8003f26: 2200 movs r2, #0 - 8003f28: 665a str r2, [r3, #100] ; 0x64 + /* Configure the USART2 clock source */ + __HAL_RCC_USART2_CONFIG(PeriphClkInit->Usart2ClockSelection); + 8006172: 4b73 ldr r3, [pc, #460] ; (8006340 ) + 8006174: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 8006178: f023 020c bic.w r2, r3, #12 + 800617c: 687b ldr r3, [r7, #4] + 800617e: 6c9b ldr r3, [r3, #72] ; 0x48 + 8006180: 496f ldr r1, [pc, #444] ; (8006340 ) + 8006182: 4313 orrs r3, r2 + 8006184: f8c1 3090 str.w r3, [r1, #144] ; 0x90 + } - return ret; - 8003f2a: 7dfb ldrb r3, [r7, #23] -} - 8003f2c: 4618 mov r0, r3 - 8003f2e: 3720 adds r7, #32 - 8003f30: 46bd mov sp, r7 - 8003f32: bd80 pop {r7, pc} - 8003f34: 01e84800 .word 0x01e84800 - 8003f38: 00f42400 .word 0x00f42400 - -08003f3c : - * @brief Configure the UART peripheral advanced features. - * @param huart UART handle. - * @retval None - */ -void UART_AdvFeatureConfig(UART_HandleTypeDef *huart) -{ - 8003f3c: b480 push {r7} - 8003f3e: b083 sub sp, #12 - 8003f40: af00 add r7, sp, #0 - 8003f42: 6078 str r0, [r7, #4] - /* Check whether the set of advanced features to configure is properly set */ - assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit)); + /*-------------------------------------- USART3 Configuration -----------------------------------*/ + if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART3) == RCC_PERIPHCLK_USART3) + 8006188: 687b ldr r3, [r7, #4] + 800618a: 681b ldr r3, [r3, #0] + 800618c: f403 7380 and.w r3, r3, #256 ; 0x100 + 8006190: 2b00 cmp r3, #0 + 8006192: d00a beq.n 80061aa + { + /* Check the parameters */ + assert_param(IS_RCC_USART3CLKSOURCE(PeriphClkInit->Usart3ClockSelection)); - /* if required, configure TX pin active level inversion */ - if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT)) - 8003f44: 687b ldr r3, [r7, #4] - 8003f46: 6a5b ldr r3, [r3, #36] ; 0x24 - 8003f48: f003 0301 and.w r3, r3, #1 - 8003f4c: 2b00 cmp r3, #0 - 8003f4e: d00a beq.n 8003f66 + /* Configure the USART3 clock source */ + __HAL_RCC_USART3_CONFIG(PeriphClkInit->Usart3ClockSelection); + 8006194: 4b6a ldr r3, [pc, #424] ; (8006340 ) + 8006196: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 800619a: f023 0230 bic.w r2, r3, #48 ; 0x30 + 800619e: 687b ldr r3, [r7, #4] + 80061a0: 6cdb ldr r3, [r3, #76] ; 0x4c + 80061a2: 4967 ldr r1, [pc, #412] ; (8006340 ) + 80061a4: 4313 orrs r3, r2 + 80061a6: f8c1 3090 str.w r3, [r1, #144] ; 0x90 + } + + /*-------------------------------------- UART4 Configuration -----------------------------------*/ + if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART4) == RCC_PERIPHCLK_UART4) + 80061aa: 687b ldr r3, [r7, #4] + 80061ac: 681b ldr r3, [r3, #0] + 80061ae: f403 7300 and.w r3, r3, #512 ; 0x200 + 80061b2: 2b00 cmp r3, #0 + 80061b4: d00a beq.n 80061cc { - assert_param(IS_UART_ADVFEATURE_TXINV(huart->AdvancedInit.TxPinLevelInvert)); - MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert); - 8003f50: 687b ldr r3, [r7, #4] - 8003f52: 681b ldr r3, [r3, #0] - 8003f54: 685b ldr r3, [r3, #4] - 8003f56: f423 3100 bic.w r1, r3, #131072 ; 0x20000 - 8003f5a: 687b ldr r3, [r7, #4] - 8003f5c: 6a9a ldr r2, [r3, #40] ; 0x28 - 8003f5e: 687b ldr r3, [r7, #4] - 8003f60: 681b ldr r3, [r3, #0] - 8003f62: 430a orrs r2, r1 - 8003f64: 605a str r2, [r3, #4] + /* Check the parameters */ + assert_param(IS_RCC_UART4CLKSOURCE(PeriphClkInit->Uart4ClockSelection)); + + /* Configure the UART4 clock source */ + __HAL_RCC_UART4_CONFIG(PeriphClkInit->Uart4ClockSelection); + 80061b6: 4b62 ldr r3, [pc, #392] ; (8006340 ) + 80061b8: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 80061bc: f023 02c0 bic.w r2, r3, #192 ; 0xc0 + 80061c0: 687b ldr r3, [r7, #4] + 80061c2: 6d1b ldr r3, [r3, #80] ; 0x50 + 80061c4: 495e ldr r1, [pc, #376] ; (8006340 ) + 80061c6: 4313 orrs r3, r2 + 80061c8: f8c1 3090 str.w r3, [r1, #144] ; 0x90 } - /* if required, configure RX pin active level inversion */ - if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXINVERT_INIT)) - 8003f66: 687b ldr r3, [r7, #4] - 8003f68: 6a5b ldr r3, [r3, #36] ; 0x24 - 8003f6a: f003 0302 and.w r3, r3, #2 - 8003f6e: 2b00 cmp r3, #0 - 8003f70: d00a beq.n 8003f88 + /*-------------------------------------- UART5 Configuration -----------------------------------*/ + if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART5) == RCC_PERIPHCLK_UART5) + 80061cc: 687b ldr r3, [r7, #4] + 80061ce: 681b ldr r3, [r3, #0] + 80061d0: f403 6380 and.w r3, r3, #1024 ; 0x400 + 80061d4: 2b00 cmp r3, #0 + 80061d6: d00a beq.n 80061ee { - assert_param(IS_UART_ADVFEATURE_RXINV(huart->AdvancedInit.RxPinLevelInvert)); - MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert); - 8003f72: 687b ldr r3, [r7, #4] - 8003f74: 681b ldr r3, [r3, #0] - 8003f76: 685b ldr r3, [r3, #4] - 8003f78: f423 3180 bic.w r1, r3, #65536 ; 0x10000 - 8003f7c: 687b ldr r3, [r7, #4] - 8003f7e: 6ada ldr r2, [r3, #44] ; 0x2c - 8003f80: 687b ldr r3, [r7, #4] - 8003f82: 681b ldr r3, [r3, #0] - 8003f84: 430a orrs r2, r1 - 8003f86: 605a str r2, [r3, #4] + /* Check the parameters */ + assert_param(IS_RCC_UART5CLKSOURCE(PeriphClkInit->Uart5ClockSelection)); + + /* Configure the UART5 clock source */ + __HAL_RCC_UART5_CONFIG(PeriphClkInit->Uart5ClockSelection); + 80061d8: 4b59 ldr r3, [pc, #356] ; (8006340 ) + 80061da: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 80061de: f423 7240 bic.w r2, r3, #768 ; 0x300 + 80061e2: 687b ldr r3, [r7, #4] + 80061e4: 6d5b ldr r3, [r3, #84] ; 0x54 + 80061e6: 4956 ldr r1, [pc, #344] ; (8006340 ) + 80061e8: 4313 orrs r3, r2 + 80061ea: f8c1 3090 str.w r3, [r1, #144] ; 0x90 } - /* if required, configure data inversion */ - if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DATAINVERT_INIT)) - 8003f88: 687b ldr r3, [r7, #4] - 8003f8a: 6a5b ldr r3, [r3, #36] ; 0x24 - 8003f8c: f003 0304 and.w r3, r3, #4 - 8003f90: 2b00 cmp r3, #0 - 8003f92: d00a beq.n 8003faa + /*-------------------------------------- USART6 Configuration -----------------------------------*/ + if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART6) == RCC_PERIPHCLK_USART6) + 80061ee: 687b ldr r3, [r7, #4] + 80061f0: 681b ldr r3, [r3, #0] + 80061f2: f403 6300 and.w r3, r3, #2048 ; 0x800 + 80061f6: 2b00 cmp r3, #0 + 80061f8: d00a beq.n 8006210 { - assert_param(IS_UART_ADVFEATURE_DATAINV(huart->AdvancedInit.DataInvert)); - MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert); - 8003f94: 687b ldr r3, [r7, #4] - 8003f96: 681b ldr r3, [r3, #0] - 8003f98: 685b ldr r3, [r3, #4] - 8003f9a: f423 2180 bic.w r1, r3, #262144 ; 0x40000 - 8003f9e: 687b ldr r3, [r7, #4] - 8003fa0: 6b1a ldr r2, [r3, #48] ; 0x30 - 8003fa2: 687b ldr r3, [r7, #4] - 8003fa4: 681b ldr r3, [r3, #0] - 8003fa6: 430a orrs r2, r1 - 8003fa8: 605a str r2, [r3, #4] + /* Check the parameters */ + assert_param(IS_RCC_USART6CLKSOURCE(PeriphClkInit->Usart6ClockSelection)); + + /* Configure the USART6 clock source */ + __HAL_RCC_USART6_CONFIG(PeriphClkInit->Usart6ClockSelection); + 80061fa: 4b51 ldr r3, [pc, #324] ; (8006340 ) + 80061fc: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 8006200: f423 6240 bic.w r2, r3, #3072 ; 0xc00 + 8006204: 687b ldr r3, [r7, #4] + 8006206: 6d9b ldr r3, [r3, #88] ; 0x58 + 8006208: 494d ldr r1, [pc, #308] ; (8006340 ) + 800620a: 4313 orrs r3, r2 + 800620c: f8c1 3090 str.w r3, [r1, #144] ; 0x90 } - /* if required, configure RX/TX pins swap */ - if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT)) - 8003faa: 687b ldr r3, [r7, #4] - 8003fac: 6a5b ldr r3, [r3, #36] ; 0x24 - 8003fae: f003 0308 and.w r3, r3, #8 - 8003fb2: 2b00 cmp r3, #0 - 8003fb4: d00a beq.n 8003fcc + /*-------------------------------------- UART7 Configuration -----------------------------------*/ + if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART7) == RCC_PERIPHCLK_UART7) + 8006210: 687b ldr r3, [r7, #4] + 8006212: 681b ldr r3, [r3, #0] + 8006214: f403 5380 and.w r3, r3, #4096 ; 0x1000 + 8006218: 2b00 cmp r3, #0 + 800621a: d00a beq.n 8006232 { - assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap)); - MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap); - 8003fb6: 687b ldr r3, [r7, #4] - 8003fb8: 681b ldr r3, [r3, #0] - 8003fba: 685b ldr r3, [r3, #4] - 8003fbc: f423 4100 bic.w r1, r3, #32768 ; 0x8000 - 8003fc0: 687b ldr r3, [r7, #4] - 8003fc2: 6b5a ldr r2, [r3, #52] ; 0x34 - 8003fc4: 687b ldr r3, [r7, #4] - 8003fc6: 681b ldr r3, [r3, #0] - 8003fc8: 430a orrs r2, r1 - 8003fca: 605a str r2, [r3, #4] + /* Check the parameters */ + assert_param(IS_RCC_UART7CLKSOURCE(PeriphClkInit->Uart7ClockSelection)); + + /* Configure the UART7 clock source */ + __HAL_RCC_UART7_CONFIG(PeriphClkInit->Uart7ClockSelection); + 800621c: 4b48 ldr r3, [pc, #288] ; (8006340 ) + 800621e: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 8006222: f423 5240 bic.w r2, r3, #12288 ; 0x3000 + 8006226: 687b ldr r3, [r7, #4] + 8006228: 6ddb ldr r3, [r3, #92] ; 0x5c + 800622a: 4945 ldr r1, [pc, #276] ; (8006340 ) + 800622c: 4313 orrs r3, r2 + 800622e: f8c1 3090 str.w r3, [r1, #144] ; 0x90 } - /* if required, configure RX overrun detection disabling */ - if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT)) - 8003fcc: 687b ldr r3, [r7, #4] - 8003fce: 6a5b ldr r3, [r3, #36] ; 0x24 - 8003fd0: f003 0310 and.w r3, r3, #16 - 8003fd4: 2b00 cmp r3, #0 - 8003fd6: d00a beq.n 8003fee + /*-------------------------------------- UART8 Configuration -----------------------------------*/ + if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART8) == RCC_PERIPHCLK_UART8) + 8006232: 687b ldr r3, [r7, #4] + 8006234: 681b ldr r3, [r3, #0] + 8006236: f403 5300 and.w r3, r3, #8192 ; 0x2000 + 800623a: 2b00 cmp r3, #0 + 800623c: d00a beq.n 8006254 { - assert_param(IS_UART_OVERRUN(huart->AdvancedInit.OverrunDisable)); - MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable); - 8003fd8: 687b ldr r3, [r7, #4] - 8003fda: 681b ldr r3, [r3, #0] - 8003fdc: 689b ldr r3, [r3, #8] - 8003fde: f423 5180 bic.w r1, r3, #4096 ; 0x1000 - 8003fe2: 687b ldr r3, [r7, #4] - 8003fe4: 6b9a ldr r2, [r3, #56] ; 0x38 - 8003fe6: 687b ldr r3, [r7, #4] - 8003fe8: 681b ldr r3, [r3, #0] - 8003fea: 430a orrs r2, r1 - 8003fec: 609a str r2, [r3, #8] + /* Check the parameters */ + assert_param(IS_RCC_UART8CLKSOURCE(PeriphClkInit->Uart8ClockSelection)); + + /* Configure the UART8 clock source */ + __HAL_RCC_UART8_CONFIG(PeriphClkInit->Uart8ClockSelection); + 800623e: 4b40 ldr r3, [pc, #256] ; (8006340 ) + 8006240: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 8006244: f423 4240 bic.w r2, r3, #49152 ; 0xc000 + 8006248: 687b ldr r3, [r7, #4] + 800624a: 6e1b ldr r3, [r3, #96] ; 0x60 + 800624c: 493c ldr r1, [pc, #240] ; (8006340 ) + 800624e: 4313 orrs r3, r2 + 8006250: f8c1 3090 str.w r3, [r1, #144] ; 0x90 } - /* if required, configure DMA disabling on reception error */ - if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DMADISABLEONERROR_INIT)) - 8003fee: 687b ldr r3, [r7, #4] - 8003ff0: 6a5b ldr r3, [r3, #36] ; 0x24 - 8003ff2: f003 0320 and.w r3, r3, #32 - 8003ff6: 2b00 cmp r3, #0 - 8003ff8: d00a beq.n 8004010 + /*--------------------------------------- CEC Configuration -----------------------------------*/ + if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CEC) == RCC_PERIPHCLK_CEC) + 8006254: 687b ldr r3, [r7, #4] + 8006256: 681b ldr r3, [r3, #0] + 8006258: f403 0380 and.w r3, r3, #4194304 ; 0x400000 + 800625c: 2b00 cmp r3, #0 + 800625e: d00a beq.n 8006276 { - assert_param(IS_UART_ADVFEATURE_DMAONRXERROR(huart->AdvancedInit.DMADisableonRxError)); - MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError); - 8003ffa: 687b ldr r3, [r7, #4] - 8003ffc: 681b ldr r3, [r3, #0] - 8003ffe: 689b ldr r3, [r3, #8] - 8004000: f423 5100 bic.w r1, r3, #8192 ; 0x2000 - 8004004: 687b ldr r3, [r7, #4] - 8004006: 6bda ldr r2, [r3, #60] ; 0x3c - 8004008: 687b ldr r3, [r7, #4] - 800400a: 681b ldr r3, [r3, #0] - 800400c: 430a orrs r2, r1 - 800400e: 609a str r2, [r3, #8] + /* Check the parameters */ + assert_param(IS_RCC_CECCLKSOURCE(PeriphClkInit->CecClockSelection)); + + /* Configure the CEC clock source */ + __HAL_RCC_CEC_CONFIG(PeriphClkInit->CecClockSelection); + 8006260: 4b37 ldr r3, [pc, #220] ; (8006340 ) + 8006262: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 8006266: f023 6280 bic.w r2, r3, #67108864 ; 0x4000000 + 800626a: 687b ldr r3, [r7, #4] + 800626c: 6f9b ldr r3, [r3, #120] ; 0x78 + 800626e: 4934 ldr r1, [pc, #208] ; (8006340 ) + 8006270: 4313 orrs r3, r2 + 8006272: f8c1 3090 str.w r3, [r1, #144] ; 0x90 } - /* if required, configure auto Baud rate detection scheme */ - if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_AUTOBAUDRATE_INIT)) - 8004010: 687b ldr r3, [r7, #4] - 8004012: 6a5b ldr r3, [r3, #36] ; 0x24 - 8004014: f003 0340 and.w r3, r3, #64 ; 0x40 - 8004018: 2b00 cmp r3, #0 - 800401a: d01a beq.n 8004052 + /*-------------------------------------- CK48 Configuration -----------------------------------*/ + if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CLK48) == RCC_PERIPHCLK_CLK48) + 8006276: 687b ldr r3, [r7, #4] + 8006278: 681b ldr r3, [r3, #0] + 800627a: f403 1300 and.w r3, r3, #2097152 ; 0x200000 + 800627e: 2b00 cmp r3, #0 + 8006280: d011 beq.n 80062a6 { - assert_param(IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(huart->Instance)); - assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATE(huart->AdvancedInit.AutoBaudRateEnable)); - MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable); - 800401c: 687b ldr r3, [r7, #4] - 800401e: 681b ldr r3, [r3, #0] - 8004020: 685b ldr r3, [r3, #4] - 8004022: f423 1180 bic.w r1, r3, #1048576 ; 0x100000 - 8004026: 687b ldr r3, [r7, #4] - 8004028: 6c1a ldr r2, [r3, #64] ; 0x40 - 800402a: 687b ldr r3, [r7, #4] - 800402c: 681b ldr r3, [r3, #0] - 800402e: 430a orrs r2, r1 - 8004030: 605a str r2, [r3, #4] - /* set auto Baudrate detection parameters if detection is enabled */ - if (huart->AdvancedInit.AutoBaudRateEnable == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE) - 8004032: 687b ldr r3, [r7, #4] - 8004034: 6c1b ldr r3, [r3, #64] ; 0x40 - 8004036: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000 - 800403a: d10a bne.n 8004052 + /* Check the parameters */ + assert_param(IS_RCC_CLK48SOURCE(PeriphClkInit->Clk48ClockSelection)); + + /* Configure the CLK48 source */ + __HAL_RCC_CLK48_CONFIG(PeriphClkInit->Clk48ClockSelection); + 8006282: 4b2f ldr r3, [pc, #188] ; (8006340 ) + 8006284: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 8006288: f023 6200 bic.w r2, r3, #134217728 ; 0x8000000 + 800628c: 687b ldr r3, [r7, #4] + 800628e: 6fdb ldr r3, [r3, #124] ; 0x7c + 8006290: 492b ldr r1, [pc, #172] ; (8006340 ) + 8006292: 4313 orrs r3, r2 + 8006294: f8c1 3090 str.w r3, [r1, #144] ; 0x90 + + /* Enable the PLLSAI when it's used as clock source for CK48 */ + if(PeriphClkInit->Clk48ClockSelection == RCC_CLK48SOURCE_PLLSAIP) + 8006298: 687b ldr r3, [r7, #4] + 800629a: 6fdb ldr r3, [r3, #124] ; 0x7c + 800629c: f1b3 6f00 cmp.w r3, #134217728 ; 0x8000000 + 80062a0: d101 bne.n 80062a6 { - assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(huart->AdvancedInit.AutoBaudRateMode)); - MODIFY_REG(huart->Instance->CR2, USART_CR2_ABRMODE, huart->AdvancedInit.AutoBaudRateMode); - 800403c: 687b ldr r3, [r7, #4] - 800403e: 681b ldr r3, [r3, #0] - 8004040: 685b ldr r3, [r3, #4] - 8004042: f423 01c0 bic.w r1, r3, #6291456 ; 0x600000 - 8004046: 687b ldr r3, [r7, #4] - 8004048: 6c5a ldr r2, [r3, #68] ; 0x44 - 800404a: 687b ldr r3, [r7, #4] - 800404c: 681b ldr r3, [r3, #0] - 800404e: 430a orrs r2, r1 - 8004050: 605a str r2, [r3, #4] + pllsaiused = 1; + 80062a2: 2301 movs r3, #1 + 80062a4: 61bb str r3, [r7, #24] } } - /* if required, configure MSB first on communication line */ - if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_MSBFIRST_INIT)) - 8004052: 687b ldr r3, [r7, #4] - 8004054: 6a5b ldr r3, [r3, #36] ; 0x24 - 8004056: f003 0380 and.w r3, r3, #128 ; 0x80 - 800405a: 2b00 cmp r3, #0 - 800405c: d00a beq.n 8004074 + /*-------------------------------------- LTDC Configuration -----------------------------------*/ +#if defined(STM32F746xx) || defined(STM32F756xx) || defined (STM32F767xx) || defined (STM32F769xx) || defined (STM32F777xx) || defined (STM32F779xx) || defined (STM32F750xx) + if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LTDC) == RCC_PERIPHCLK_LTDC) + 80062a6: 687b ldr r3, [r7, #4] + 80062a8: 681b ldr r3, [r3, #0] + 80062aa: f003 0308 and.w r3, r3, #8 + 80062ae: 2b00 cmp r3, #0 + 80062b0: d001 beq.n 80062b6 { - assert_param(IS_UART_ADVFEATURE_MSBFIRST(huart->AdvancedInit.MSBFirst)); - MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst); - 800405e: 687b ldr r3, [r7, #4] - 8004060: 681b ldr r3, [r3, #0] - 8004062: 685b ldr r3, [r3, #4] - 8004064: f423 2100 bic.w r1, r3, #524288 ; 0x80000 - 8004068: 687b ldr r3, [r7, #4] - 800406a: 6c9a ldr r2, [r3, #72] ; 0x48 - 800406c: 687b ldr r3, [r7, #4] - 800406e: 681b ldr r3, [r3, #0] - 8004070: 430a orrs r2, r1 - 8004072: 605a str r2, [r3, #4] + pllsaiused = 1; + 80062b2: 2301 movs r3, #1 + 80062b4: 61bb str r3, [r7, #24] } -} - 8004074: bf00 nop - 8004076: 370c adds r7, #12 - 8004078: 46bd mov sp, r7 - 800407a: f85d 7b04 ldr.w r7, [sp], #4 - 800407e: 4770 bx lr +#endif /* STM32F746xx || STM32F756xx || STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx || STM32F750xx */ -08004080 : - * @brief Check the UART Idle State. - * @param huart UART handle. - * @retval HAL status - */ -HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart) -{ - 8004080: b580 push {r7, lr} - 8004082: b086 sub sp, #24 - 8004084: af02 add r7, sp, #8 - 8004086: 6078 str r0, [r7, #4] - uint32_t tickstart; + /*-------------------------------------- LPTIM1 Configuration -----------------------------------*/ + if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM1) == RCC_PERIPHCLK_LPTIM1) + 80062b6: 687b ldr r3, [r7, #4] + 80062b8: 681b ldr r3, [r3, #0] + 80062ba: f403 2380 and.w r3, r3, #262144 ; 0x40000 + 80062be: 2b00 cmp r3, #0 + 80062c0: d00a beq.n 80062d8 + { + /* Check the parameters */ + assert_param(IS_RCC_LPTIM1CLK(PeriphClkInit->Lptim1ClockSelection)); - /* Initialize the UART ErrorCode */ - huart->ErrorCode = HAL_UART_ERROR_NONE; - 8004088: 687b ldr r3, [r7, #4] - 800408a: 2200 movs r2, #0 - 800408c: 67da str r2, [r3, #124] ; 0x7c + /* Configure the LTPIM1 clock source */ + __HAL_RCC_LPTIM1_CONFIG(PeriphClkInit->Lptim1ClockSelection); + 80062c2: 4b1f ldr r3, [pc, #124] ; (8006340 ) + 80062c4: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 80062c8: f023 7240 bic.w r2, r3, #50331648 ; 0x3000000 + 80062cc: 687b ldr r3, [r7, #4] + 80062ce: 6f5b ldr r3, [r3, #116] ; 0x74 + 80062d0: 491b ldr r1, [pc, #108] ; (8006340 ) + 80062d2: 4313 orrs r3, r2 + 80062d4: f8c1 3090 str.w r3, [r1, #144] ; 0x90 + } - /* Init tickstart for timeout managment*/ - tickstart = HAL_GetTick(); - 800408e: f7fc faad bl 80005ec - 8004092: 60f8 str r0, [r7, #12] + /*------------------------------------- SDMMC1 Configuration ------------------------------------*/ + if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SDMMC1) == RCC_PERIPHCLK_SDMMC1) + 80062d8: 687b ldr r3, [r7, #4] + 80062da: 681b ldr r3, [r3, #0] + 80062dc: f403 0300 and.w r3, r3, #8388608 ; 0x800000 + 80062e0: 2b00 cmp r3, #0 + 80062e2: d00b beq.n 80062fc + { + /* Check the parameters */ + assert_param(IS_RCC_SDMMC1CLKSOURCE(PeriphClkInit->Sdmmc1ClockSelection)); - /* Check if the Transmitter is enabled */ - if ((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE) - 8004094: 687b ldr r3, [r7, #4] - 8004096: 681b ldr r3, [r3, #0] - 8004098: 681b ldr r3, [r3, #0] - 800409a: f003 0308 and.w r3, r3, #8 - 800409e: 2b08 cmp r3, #8 - 80040a0: d10e bne.n 80040c0 + /* Configure the SDMMC1 clock source */ + __HAL_RCC_SDMMC1_CONFIG(PeriphClkInit->Sdmmc1ClockSelection); + 80062e4: 4b16 ldr r3, [pc, #88] ; (8006340 ) + 80062e6: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 80062ea: f023 5280 bic.w r2, r3, #268435456 ; 0x10000000 + 80062ee: 687b ldr r3, [r7, #4] + 80062f0: f8d3 3080 ldr.w r3, [r3, #128] ; 0x80 + 80062f4: 4912 ldr r1, [pc, #72] ; (8006340 ) + 80062f6: 4313 orrs r3, r2 + 80062f8: f8c1 3090 str.w r3, [r1, #144] ; 0x90 + } + +#if defined (STM32F765xx) || defined (STM32F767xx) || defined (STM32F769xx) || defined (STM32F777xx) || defined (STM32F779xx) + /*------------------------------------- SDMMC2 Configuration ------------------------------------*/ + if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SDMMC2) == RCC_PERIPHCLK_SDMMC2) + 80062fc: 687b ldr r3, [r7, #4] + 80062fe: 681b ldr r3, [r3, #0] + 8006300: f003 6380 and.w r3, r3, #67108864 ; 0x4000000 + 8006304: 2b00 cmp r3, #0 + 8006306: d00b beq.n 8006320 { - /* Wait until TEACK flag is set */ - if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK) - 80040a2: f06f 437e mvn.w r3, #4261412864 ; 0xfe000000 - 80040a6: 9300 str r3, [sp, #0] - 80040a8: 68fb ldr r3, [r7, #12] - 80040aa: 2200 movs r2, #0 - 80040ac: f44f 1100 mov.w r1, #2097152 ; 0x200000 - 80040b0: 6878 ldr r0, [r7, #4] - 80040b2: f000 f814 bl 80040de - 80040b6: 4603 mov r3, r0 - 80040b8: 2b00 cmp r3, #0 - 80040ba: d001 beq.n 80040c0 + /* Check the parameters */ + assert_param(IS_RCC_SDMMC2CLKSOURCE(PeriphClkInit->Sdmmc2ClockSelection)); + + /* Configure the SDMMC2 clock source */ + __HAL_RCC_SDMMC2_CONFIG(PeriphClkInit->Sdmmc2ClockSelection); + 8006308: 4b0d ldr r3, [pc, #52] ; (8006340 ) + 800630a: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 800630e: f023 5200 bic.w r2, r3, #536870912 ; 0x20000000 + 8006312: 687b ldr r3, [r7, #4] + 8006314: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 + 8006318: 4909 ldr r1, [pc, #36] ; (8006340 ) + 800631a: 4313 orrs r3, r2 + 800631c: f8c1 3090 str.w r3, [r1, #144] ; 0x90 + } + + /*------------------------------------- DFSDM1 Configuration -------------------------------------*/ + if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_DFSDM1) == RCC_PERIPHCLK_DFSDM1) + 8006320: 687b ldr r3, [r7, #4] + 8006322: 681b ldr r3, [r3, #0] + 8006324: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 + 8006328: 2b00 cmp r3, #0 + 800632a: d00f beq.n 800634c + { + /* Check the parameters */ + assert_param(IS_RCC_DFSDM1CLKSOURCE(PeriphClkInit->Dfsdm1ClockSelection)); + + /* Configure the DFSDM1 interface clock source */ + __HAL_RCC_DFSDM1_CONFIG(PeriphClkInit->Dfsdm1ClockSelection); + 800632c: 4b04 ldr r3, [pc, #16] ; (8006340 ) + 800632e: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c + 8006332: f023 7200 bic.w r2, r3, #33554432 ; 0x2000000 + 8006336: 687b ldr r3, [r7, #4] + 8006338: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 + 800633c: e002 b.n 8006344 + 800633e: bf00 nop + 8006340: 40023800 .word 0x40023800 + 8006344: 4985 ldr r1, [pc, #532] ; (800655c ) + 8006346: 4313 orrs r3, r2 + 8006348: f8c1 308c str.w r3, [r1, #140] ; 0x8c + } + + /*------------------------------------- DFSDM AUDIO Configuration -------------------------------------*/ + if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_DFSDM1_AUDIO) == RCC_PERIPHCLK_DFSDM1_AUDIO) + 800634c: 687b ldr r3, [r7, #4] + 800634e: 681b ldr r3, [r3, #0] + 8006350: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 + 8006354: 2b00 cmp r3, #0 + 8006356: d00b beq.n 8006370 + { + /* Check the parameters */ + assert_param(IS_RCC_DFSDM1AUDIOCLKSOURCE(PeriphClkInit->Dfsdm1AudioClockSelection)); + + /* Configure the DFSDM interface clock source */ + __HAL_RCC_DFSDM1AUDIO_CONFIG(PeriphClkInit->Dfsdm1AudioClockSelection); + 8006358: 4b80 ldr r3, [pc, #512] ; (800655c ) + 800635a: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c + 800635e: f023 6280 bic.w r2, r3, #67108864 ; 0x4000000 + 8006362: 687b ldr r3, [r7, #4] + 8006364: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c + 8006368: 497c ldr r1, [pc, #496] ; (800655c ) + 800636a: 4313 orrs r3, r2 + 800636c: f8c1 308c str.w r3, [r1, #140] ; 0x8c + } +#endif /* STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */ + + /*-------------------------------------- PLLI2S Configuration ---------------------------------*/ + /* PLLI2S is configured when a peripheral will use it as source clock : SAI1, SAI2, I2S or SPDIF-RX */ + if((plli2sused == 1) || (PeriphClkInit->PeriphClockSelection == RCC_PERIPHCLK_PLLI2S)) + 8006370: 69fb ldr r3, [r7, #28] + 8006372: 2b01 cmp r3, #1 + 8006374: d005 beq.n 8006382 + 8006376: 687b ldr r3, [r7, #4] + 8006378: 681b ldr r3, [r3, #0] + 800637a: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 + 800637e: f040 80d6 bne.w 800652e + { + /* Disable the PLLI2S */ + __HAL_RCC_PLLI2S_DISABLE(); + 8006382: 4b76 ldr r3, [pc, #472] ; (800655c ) + 8006384: 681b ldr r3, [r3, #0] + 8006386: 4a75 ldr r2, [pc, #468] ; (800655c ) + 8006388: f023 6380 bic.w r3, r3, #67108864 ; 0x4000000 + 800638c: 6013 str r3, [r2, #0] + + /* Get Start Tick*/ + tickstart = HAL_GetTick(); + 800638e: f7fe fac7 bl 8004920 + 8006392: 6178 str r0, [r7, #20] + + /* Wait till PLLI2S is disabled */ + while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) != RESET) + 8006394: e008 b.n 80063a8 { - /* Timeout occurred */ - return HAL_TIMEOUT; - 80040bc: 2303 movs r3, #3 - 80040be: e00a b.n 80040d6 + if((HAL_GetTick() - tickstart) > PLLI2S_TIMEOUT_VALUE) + 8006396: f7fe fac3 bl 8004920 + 800639a: 4602 mov r2, r0 + 800639c: 697b ldr r3, [r7, #20] + 800639e: 1ad3 subs r3, r2, r3 + 80063a0: 2b64 cmp r3, #100 ; 0x64 + 80063a2: d901 bls.n 80063a8 + { + /* return in case of Timeout detected */ + return HAL_TIMEOUT; + 80063a4: 2303 movs r3, #3 + 80063a6: e194 b.n 80066d2 + while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) != RESET) + 80063a8: 4b6c ldr r3, [pc, #432] ; (800655c ) + 80063aa: 681b ldr r3, [r3, #0] + 80063ac: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 + 80063b0: 2b00 cmp r3, #0 + 80063b2: d1f0 bne.n 8006396 + + /* check for common PLLI2S Parameters */ + assert_param(IS_RCC_PLLI2SN_VALUE(PeriphClkInit->PLLI2S.PLLI2SN)); + + /*----------------- In Case of PLLI2S is selected as source clock for I2S -------------------*/ + if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S) == RCC_PERIPHCLK_I2S) && (PeriphClkInit->I2sClockSelection == RCC_I2SCLKSOURCE_PLLI2S))) + 80063b4: 687b ldr r3, [r7, #4] + 80063b6: 681b ldr r3, [r3, #0] + 80063b8: f003 0301 and.w r3, r3, #1 + 80063bc: 2b00 cmp r3, #0 + 80063be: d021 beq.n 8006404 + 80063c0: 687b ldr r3, [r7, #4] + 80063c2: 6b5b ldr r3, [r3, #52] ; 0x34 + 80063c4: 2b00 cmp r3, #0 + 80063c6: d11d bne.n 8006404 + { + /* check for Parameters */ + assert_param(IS_RCC_PLLI2SR_VALUE(PeriphClkInit->PLLI2S.PLLI2SR)); + + /* Read PLLI2SP and PLLI2SQ value from PLLI2SCFGR register (this value is not needed for I2S configuration) */ + tmpreg0 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SP) >> RCC_PLLI2SCFGR_PLLI2SP_Pos); + 80063c8: 4b64 ldr r3, [pc, #400] ; (800655c ) + 80063ca: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 + 80063ce: 0c1b lsrs r3, r3, #16 + 80063d0: f003 0303 and.w r3, r3, #3 + 80063d4: 613b str r3, [r7, #16] + tmpreg1 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SQ) >> RCC_PLLI2SCFGR_PLLI2SQ_Pos); + 80063d6: 4b61 ldr r3, [pc, #388] ; (800655c ) + 80063d8: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 + 80063dc: 0e1b lsrs r3, r3, #24 + 80063de: f003 030f and.w r3, r3, #15 + 80063e2: 60fb str r3, [r7, #12] + /* Configure the PLLI2S division factors */ + /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) x (PLLI2SN/PLLM) */ + /* I2SCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SR */ + __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN , tmpreg0, tmpreg1, PeriphClkInit->PLLI2S.PLLI2SR); + 80063e4: 687b ldr r3, [r7, #4] + 80063e6: 685b ldr r3, [r3, #4] + 80063e8: 019a lsls r2, r3, #6 + 80063ea: 693b ldr r3, [r7, #16] + 80063ec: 041b lsls r3, r3, #16 + 80063ee: 431a orrs r2, r3 + 80063f0: 68fb ldr r3, [r7, #12] + 80063f2: 061b lsls r3, r3, #24 + 80063f4: 431a orrs r2, r3 + 80063f6: 687b ldr r3, [r7, #4] + 80063f8: 689b ldr r3, [r3, #8] + 80063fa: 071b lsls r3, r3, #28 + 80063fc: 4957 ldr r1, [pc, #348] ; (800655c ) + 80063fe: 4313 orrs r3, r2 + 8006400: f8c1 3084 str.w r3, [r1, #132] ; 0x84 + } + + /*----------------- In Case of PLLI2S is selected as source clock for SAI -------------------*/ + if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) && (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLI2S)) || + 8006404: 687b ldr r3, [r7, #4] + 8006406: 681b ldr r3, [r3, #0] + 8006408: f403 2300 and.w r3, r3, #524288 ; 0x80000 + 800640c: 2b00 cmp r3, #0 + 800640e: d004 beq.n 800641a + 8006410: 687b ldr r3, [r7, #4] + 8006412: 6bdb ldr r3, [r3, #60] ; 0x3c + 8006414: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000 + 8006418: d00a beq.n 8006430 + ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLI2S))) + 800641a: 687b ldr r3, [r7, #4] + 800641c: 681b ldr r3, [r3, #0] + 800641e: f403 1380 and.w r3, r3, #1048576 ; 0x100000 + if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) && (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLI2S)) || + 8006422: 2b00 cmp r3, #0 + 8006424: d02e beq.n 8006484 + ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLI2S))) + 8006426: 687b ldr r3, [r7, #4] + 8006428: 6c1b ldr r3, [r3, #64] ; 0x40 + 800642a: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000 + 800642e: d129 bne.n 8006484 + assert_param(IS_RCC_PLLI2SQ_VALUE(PeriphClkInit->PLLI2S.PLLI2SQ)); + /* Check for PLLI2S/DIVQ parameters */ + assert_param(IS_RCC_PLLI2S_DIVQ_VALUE(PeriphClkInit->PLLI2SDivQ)); + + /* Read PLLI2SP and PLLI2SR values from PLLI2SCFGR register (this value is not needed for SAI configuration) */ + tmpreg0 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SP) >> RCC_PLLI2SCFGR_PLLI2SP_Pos); + 8006430: 4b4a ldr r3, [pc, #296] ; (800655c ) + 8006432: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 + 8006436: 0c1b lsrs r3, r3, #16 + 8006438: f003 0303 and.w r3, r3, #3 + 800643c: 613b str r3, [r7, #16] + tmpreg1 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos); + 800643e: 4b47 ldr r3, [pc, #284] ; (800655c ) + 8006440: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 + 8006444: 0f1b lsrs r3, r3, #28 + 8006446: f003 0307 and.w r3, r3, #7 + 800644a: 60fb str r3, [r7, #12] + /* Configure the PLLI2S division factors */ + /* PLLI2S_VCO Input = PLL_SOURCE/PLLM */ + /* PLLI2S_VCO Output = PLLI2S_VCO Input * PLLI2SN */ + /* SAI_CLK(first level) = PLLI2S_VCO Output/PLLI2SQ */ + __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN, tmpreg0, PeriphClkInit->PLLI2S.PLLI2SQ, tmpreg1); + 800644c: 687b ldr r3, [r7, #4] + 800644e: 685b ldr r3, [r3, #4] + 8006450: 019a lsls r2, r3, #6 + 8006452: 693b ldr r3, [r7, #16] + 8006454: 041b lsls r3, r3, #16 + 8006456: 431a orrs r2, r3 + 8006458: 687b ldr r3, [r7, #4] + 800645a: 68db ldr r3, [r3, #12] + 800645c: 061b lsls r3, r3, #24 + 800645e: 431a orrs r2, r3 + 8006460: 68fb ldr r3, [r7, #12] + 8006462: 071b lsls r3, r3, #28 + 8006464: 493d ldr r1, [pc, #244] ; (800655c ) + 8006466: 4313 orrs r3, r2 + 8006468: f8c1 3084 str.w r3, [r1, #132] ; 0x84 + + /* SAI_CLK_x = SAI_CLK(first level)/PLLI2SDIVQ */ + __HAL_RCC_PLLI2S_PLLSAICLKDIVQ_CONFIG(PeriphClkInit->PLLI2SDivQ); + 800646c: 4b3b ldr r3, [pc, #236] ; (800655c ) + 800646e: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c + 8006472: f023 021f bic.w r2, r3, #31 + 8006476: 687b ldr r3, [r7, #4] + 8006478: 6a5b ldr r3, [r3, #36] ; 0x24 + 800647a: 3b01 subs r3, #1 + 800647c: 4937 ldr r1, [pc, #220] ; (800655c ) + 800647e: 4313 orrs r3, r2 + 8006480: f8c1 308c str.w r3, [r1, #140] ; 0x8c } - } - /* Initialize the UART State */ - huart->gState = HAL_UART_STATE_READY; - 80040c0: 687b ldr r3, [r7, #4] - 80040c2: 2220 movs r2, #32 - 80040c4: 675a str r2, [r3, #116] ; 0x74 - huart->RxState = HAL_UART_STATE_READY; - 80040c6: 687b ldr r3, [r7, #4] - 80040c8: 2220 movs r2, #32 - 80040ca: 679a str r2, [r3, #120] ; 0x78 + /*----------------- In Case of PLLI2S is selected as source clock for SPDIF-RX -------------------*/ + if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPDIFRX) == RCC_PERIPHCLK_SPDIFRX) + 8006484: 687b ldr r3, [r7, #4] + 8006486: 681b ldr r3, [r3, #0] + 8006488: f003 7380 and.w r3, r3, #16777216 ; 0x1000000 + 800648c: 2b00 cmp r3, #0 + 800648e: d01d beq.n 80064cc + { + /* check for Parameters */ + assert_param(IS_RCC_PLLI2SP_VALUE(PeriphClkInit->PLLI2S.PLLI2SP)); - /* Process Unlocked */ - __HAL_UNLOCK(huart); - 80040cc: 687b ldr r3, [r7, #4] - 80040ce: 2200 movs r2, #0 - 80040d0: f883 2070 strb.w r2, [r3, #112] ; 0x70 + /* Read PLLI2SR value from PLLI2SCFGR register (this value is not needed for SPDIF-RX configuration) */ + tmpreg0 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SQ) >> RCC_PLLI2SCFGR_PLLI2SQ_Pos); + 8006490: 4b32 ldr r3, [pc, #200] ; (800655c ) + 8006492: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 + 8006496: 0e1b lsrs r3, r3, #24 + 8006498: f003 030f and.w r3, r3, #15 + 800649c: 613b str r3, [r7, #16] + tmpreg1 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos); + 800649e: 4b2f ldr r3, [pc, #188] ; (800655c ) + 80064a0: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 + 80064a4: 0f1b lsrs r3, r3, #28 + 80064a6: f003 0307 and.w r3, r3, #7 + 80064aa: 60fb str r3, [r7, #12] + /* Configure the PLLI2S division factors */ + /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) x (PLLI2SN/PLLM) */ + /* SPDIFCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SP */ + __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN , PeriphClkInit->PLLI2S.PLLI2SP, tmpreg0, tmpreg1); + 80064ac: 687b ldr r3, [r7, #4] + 80064ae: 685b ldr r3, [r3, #4] + 80064b0: 019a lsls r2, r3, #6 + 80064b2: 687b ldr r3, [r7, #4] + 80064b4: 691b ldr r3, [r3, #16] + 80064b6: 041b lsls r3, r3, #16 + 80064b8: 431a orrs r2, r3 + 80064ba: 693b ldr r3, [r7, #16] + 80064bc: 061b lsls r3, r3, #24 + 80064be: 431a orrs r2, r3 + 80064c0: 68fb ldr r3, [r7, #12] + 80064c2: 071b lsls r3, r3, #28 + 80064c4: 4925 ldr r1, [pc, #148] ; (800655c ) + 80064c6: 4313 orrs r3, r2 + 80064c8: f8c1 3084 str.w r3, [r1, #132] ; 0x84 + } - return HAL_OK; - 80040d4: 2300 movs r3, #0 -} - 80040d6: 4618 mov r0, r3 - 80040d8: 3710 adds r7, #16 - 80040da: 46bd mov sp, r7 - 80040dc: bd80 pop {r7, pc} + /*----------------- In Case of PLLI2S is just selected -----------------*/ + if((PeriphClkInit->PeriphClockSelection & RCC_PERIPHCLK_PLLI2S) == RCC_PERIPHCLK_PLLI2S) + 80064cc: 687b ldr r3, [r7, #4] + 80064ce: 681b ldr r3, [r3, #0] + 80064d0: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 80064d4: 2b00 cmp r3, #0 + 80064d6: d011 beq.n 80064fc + assert_param(IS_RCC_PLLI2SQ_VALUE(PeriphClkInit->PLLI2S.PLLI2SQ)); -080040de : - * @param Tickstart Tick start value - * @param Timeout Timeout duration - * @retval HAL status - */ -HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout) -{ - 80040de: b580 push {r7, lr} - 80040e0: b084 sub sp, #16 - 80040e2: af00 add r7, sp, #0 - 80040e4: 60f8 str r0, [r7, #12] - 80040e6: 60b9 str r1, [r7, #8] - 80040e8: 603b str r3, [r7, #0] - 80040ea: 4613 mov r3, r2 - 80040ec: 71fb strb r3, [r7, #7] - /* Wait until flag is set */ - while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) - 80040ee: e02a b.n 8004146 - { - /* Check for the Timeout */ - if (Timeout != HAL_MAX_DELAY) - 80040f0: 69bb ldr r3, [r7, #24] - 80040f2: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff - 80040f6: d026 beq.n 8004146 - { - if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) - 80040f8: f7fc fa78 bl 80005ec - 80040fc: 4602 mov r2, r0 - 80040fe: 683b ldr r3, [r7, #0] - 8004100: 1ad3 subs r3, r2, r3 - 8004102: 69ba ldr r2, [r7, #24] - 8004104: 429a cmp r2, r3 - 8004106: d302 bcc.n 800410e - 8004108: 69bb ldr r3, [r7, #24] - 800410a: 2b00 cmp r3, #0 - 800410c: d11b bne.n 8004146 - { - /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */ - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE)); - 800410e: 68fb ldr r3, [r7, #12] - 8004110: 681b ldr r3, [r3, #0] - 8004112: 681a ldr r2, [r3, #0] - 8004114: 68fb ldr r3, [r7, #12] - 8004116: 681b ldr r3, [r3, #0] - 8004118: f422 72d0 bic.w r2, r2, #416 ; 0x1a0 - 800411c: 601a str r2, [r3, #0] - CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 800411e: 68fb ldr r3, [r7, #12] - 8004120: 681b ldr r3, [r3, #0] - 8004122: 689a ldr r2, [r3, #8] - 8004124: 68fb ldr r3, [r7, #12] - 8004126: 681b ldr r3, [r3, #0] - 8004128: f022 0201 bic.w r2, r2, #1 - 800412c: 609a str r2, [r3, #8] + /* Configure the PLLI2S division factors */ + /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) x (PLLI2SN/PLLI2SM) */ + /* SPDIFRXCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SP */ + __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN , PeriphClkInit->PLLI2S.PLLI2SP, PeriphClkInit->PLLI2S.PLLI2SQ, PeriphClkInit->PLLI2S.PLLI2SR); + 80064d8: 687b ldr r3, [r7, #4] + 80064da: 685b ldr r3, [r3, #4] + 80064dc: 019a lsls r2, r3, #6 + 80064de: 687b ldr r3, [r7, #4] + 80064e0: 691b ldr r3, [r3, #16] + 80064e2: 041b lsls r3, r3, #16 + 80064e4: 431a orrs r2, r3 + 80064e6: 687b ldr r3, [r7, #4] + 80064e8: 68db ldr r3, [r3, #12] + 80064ea: 061b lsls r3, r3, #24 + 80064ec: 431a orrs r2, r3 + 80064ee: 687b ldr r3, [r7, #4] + 80064f0: 689b ldr r3, [r3, #8] + 80064f2: 071b lsls r3, r3, #28 + 80064f4: 4919 ldr r1, [pc, #100] ; (800655c ) + 80064f6: 4313 orrs r3, r2 + 80064f8: f8c1 3084 str.w r3, [r1, #132] ; 0x84 + } - huart->gState = HAL_UART_STATE_READY; - 800412e: 68fb ldr r3, [r7, #12] - 8004130: 2220 movs r2, #32 - 8004132: 675a str r2, [r3, #116] ; 0x74 - huart->RxState = HAL_UART_STATE_READY; - 8004134: 68fb ldr r3, [r7, #12] - 8004136: 2220 movs r2, #32 - 8004138: 679a str r2, [r3, #120] ; 0x78 + /* Enable the PLLI2S */ + __HAL_RCC_PLLI2S_ENABLE(); + 80064fc: 4b17 ldr r3, [pc, #92] ; (800655c ) + 80064fe: 681b ldr r3, [r3, #0] + 8006500: 4a16 ldr r2, [pc, #88] ; (800655c ) + 8006502: f043 6380 orr.w r3, r3, #67108864 ; 0x4000000 + 8006506: 6013 str r3, [r2, #0] - /* Process Unlocked */ - __HAL_UNLOCK(huart); - 800413a: 68fb ldr r3, [r7, #12] - 800413c: 2200 movs r2, #0 - 800413e: f883 2070 strb.w r2, [r3, #112] ; 0x70 + /* Get Start Tick*/ + tickstart = HAL_GetTick(); + 8006508: f7fe fa0a bl 8004920 + 800650c: 6178 str r0, [r7, #20] + /* Wait till PLLI2S is ready */ + while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) == RESET) + 800650e: e008 b.n 8006522 + { + if((HAL_GetTick() - tickstart) > PLLI2S_TIMEOUT_VALUE) + 8006510: f7fe fa06 bl 8004920 + 8006514: 4602 mov r2, r0 + 8006516: 697b ldr r3, [r7, #20] + 8006518: 1ad3 subs r3, r2, r3 + 800651a: 2b64 cmp r3, #100 ; 0x64 + 800651c: d901 bls.n 8006522 + { + /* return in case of Timeout detected */ return HAL_TIMEOUT; - 8004142: 2303 movs r3, #3 - 8004144: e00f b.n 8004166 - while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) - 8004146: 68fb ldr r3, [r7, #12] - 8004148: 681b ldr r3, [r3, #0] - 800414a: 69da ldr r2, [r3, #28] - 800414c: 68bb ldr r3, [r7, #8] - 800414e: 4013 ands r3, r2 - 8004150: 68ba ldr r2, [r7, #8] - 8004152: 429a cmp r2, r3 - 8004154: bf0c ite eq - 8004156: 2301 moveq r3, #1 - 8004158: 2300 movne r3, #0 - 800415a: b2db uxtb r3, r3 - 800415c: 461a mov r2, r3 - 800415e: 79fb ldrb r3, [r7, #7] - 8004160: 429a cmp r2, r3 - 8004162: d0c5 beq.n 80040f0 - } + 800651e: 2303 movs r3, #3 + 8006520: e0d7 b.n 80066d2 + while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) == RESET) + 8006522: 4b0e ldr r3, [pc, #56] ; (800655c ) + 8006524: 681b ldr r3, [r3, #0] + 8006526: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 + 800652a: 2b00 cmp r3, #0 + 800652c: d0f0 beq.n 8006510 } } - return HAL_OK; - 8004164: 2300 movs r3, #0 -} - 8004166: 4618 mov r0, r3 - 8004168: 3710 adds r7, #16 - 800416a: 46bd mov sp, r7 - 800416c: bd80 pop {r7, pc} -0800416e : - * @brief End ongoing Tx transfer on UART peripheral (following error detection or Transmit completion). - * @param huart UART handle. - * @retval None - */ -static void UART_EndTxTransfer(UART_HandleTypeDef *huart) -{ - 800416e: b480 push {r7} - 8004170: b083 sub sp, #12 - 8004172: af00 add r7, sp, #0 - 8004174: 6078 str r0, [r7, #4] - /* Disable TXEIE and TCIE interrupts */ - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE)); - 8004176: 687b ldr r3, [r7, #4] - 8004178: 681b ldr r3, [r3, #0] - 800417a: 681a ldr r2, [r3, #0] - 800417c: 687b ldr r3, [r7, #4] - 800417e: 681b ldr r3, [r3, #0] - 8004180: f022 02c0 bic.w r2, r2, #192 ; 0xc0 - 8004184: 601a str r2, [r3, #0] + /*-------------------------------------- PLLSAI Configuration ---------------------------------*/ + /* PLLSAI is configured when a peripheral will use it as source clock : SAI1, SAI2, LTDC or CK48 */ + if(pllsaiused == 1) + 800652e: 69bb ldr r3, [r7, #24] + 8006530: 2b01 cmp r3, #1 + 8006532: f040 80cd bne.w 80066d0 + { + /* Disable PLLSAI Clock */ + __HAL_RCC_PLLSAI_DISABLE(); + 8006536: 4b09 ldr r3, [pc, #36] ; (800655c ) + 8006538: 681b ldr r3, [r3, #0] + 800653a: 4a08 ldr r2, [pc, #32] ; (800655c ) + 800653c: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000 + 8006540: 6013 str r3, [r2, #0] - /* At end of Tx process, restore huart->gState to Ready */ - huart->gState = HAL_UART_STATE_READY; - 8004186: 687b ldr r3, [r7, #4] - 8004188: 2220 movs r2, #32 - 800418a: 675a str r2, [r3, #116] ; 0x74 -} - 800418c: bf00 nop - 800418e: 370c adds r7, #12 - 8004190: 46bd mov sp, r7 - 8004192: f85d 7b04 ldr.w r7, [sp], #4 - 8004196: 4770 bx lr + /* Get Start Tick*/ + tickstart = HAL_GetTick(); + 8006542: f7fe f9ed bl 8004920 + 8006546: 6178 str r0, [r7, #20] -08004198 : - * @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion). - * @param huart UART handle. - * @retval None - */ -static void UART_EndRxTransfer(UART_HandleTypeDef *huart) -{ - 8004198: b480 push {r7} - 800419a: b083 sub sp, #12 - 800419c: af00 add r7, sp, #0 - 800419e: 6078 str r0, [r7, #4] - /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); - 80041a0: 687b ldr r3, [r7, #4] - 80041a2: 681b ldr r3, [r3, #0] - 80041a4: 681a ldr r2, [r3, #0] - 80041a6: 687b ldr r3, [r7, #4] - 80041a8: 681b ldr r3, [r3, #0] - 80041aa: f422 7290 bic.w r2, r2, #288 ; 0x120 - 80041ae: 601a str r2, [r3, #0] - CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 80041b0: 687b ldr r3, [r7, #4] - 80041b2: 681b ldr r3, [r3, #0] - 80041b4: 689a ldr r2, [r3, #8] - 80041b6: 687b ldr r3, [r7, #4] - 80041b8: 681b ldr r3, [r3, #0] - 80041ba: f022 0201 bic.w r2, r2, #1 - 80041be: 609a str r2, [r3, #8] + /* Wait till PLLSAI is disabled */ + while(__HAL_RCC_PLLSAI_GET_FLAG() != RESET) + 8006548: e00a b.n 8006560 + { + if((HAL_GetTick() - tickstart) > PLLSAI_TIMEOUT_VALUE) + 800654a: f7fe f9e9 bl 8004920 + 800654e: 4602 mov r2, r0 + 8006550: 697b ldr r3, [r7, #20] + 8006552: 1ad3 subs r3, r2, r3 + 8006554: 2b64 cmp r3, #100 ; 0x64 + 8006556: d903 bls.n 8006560 + { + /* return in case of Timeout detected */ + return HAL_TIMEOUT; + 8006558: 2303 movs r3, #3 + 800655a: e0ba b.n 80066d2 + 800655c: 40023800 .word 0x40023800 + while(__HAL_RCC_PLLSAI_GET_FLAG() != RESET) + 8006560: 4b5e ldr r3, [pc, #376] ; (80066dc ) + 8006562: 681b ldr r3, [r3, #0] + 8006564: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 + 8006568: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 800656c: d0ed beq.n 800654a - /* At end of Rx process, restore huart->RxState to Ready */ - huart->RxState = HAL_UART_STATE_READY; - 80041c0: 687b ldr r3, [r7, #4] - 80041c2: 2220 movs r2, #32 - 80041c4: 679a str r2, [r3, #120] ; 0x78 + /* Check the PLLSAI division factors */ + assert_param(IS_RCC_PLLSAIN_VALUE(PeriphClkInit->PLLSAI.PLLSAIN)); - /* Reset RxIsr function pointer */ - huart->RxISR = NULL; - 80041c6: 687b ldr r3, [r7, #4] - 80041c8: 2200 movs r2, #0 - 80041ca: 661a str r2, [r3, #96] ; 0x60 -} - 80041cc: bf00 nop - 80041ce: 370c adds r7, #12 - 80041d0: 46bd mov sp, r7 - 80041d2: f85d 7b04 ldr.w r7, [sp], #4 - 80041d6: 4770 bx lr + /*----------------- In Case of PLLSAI is selected as source clock for SAI -------------------*/ + if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) && (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLSAI)) ||\ + 800656e: 687b ldr r3, [r7, #4] + 8006570: 681b ldr r3, [r3, #0] + 8006572: f403 2300 and.w r3, r3, #524288 ; 0x80000 + 8006576: 2b00 cmp r3, #0 + 8006578: d003 beq.n 8006582 + 800657a: 687b ldr r3, [r7, #4] + 800657c: 6bdb ldr r3, [r3, #60] ; 0x3c + 800657e: 2b00 cmp r3, #0 + 8006580: d009 beq.n 8006596 + ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLSAI))) + 8006582: 687b ldr r3, [r7, #4] + 8006584: 681b ldr r3, [r3, #0] + 8006586: f403 1380 and.w r3, r3, #1048576 ; 0x100000 + if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) && (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLSAI)) ||\ + 800658a: 2b00 cmp r3, #0 + 800658c: d02e beq.n 80065ec + ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLSAI))) + 800658e: 687b ldr r3, [r7, #4] + 8006590: 6c1b ldr r3, [r3, #64] ; 0x40 + 8006592: 2b00 cmp r3, #0 + 8006594: d12a bne.n 80065ec + assert_param(IS_RCC_PLLSAIQ_VALUE(PeriphClkInit->PLLSAI.PLLSAIQ)); + /* check for PLLSAI/DIVQ Parameter */ + assert_param(IS_RCC_PLLSAI_DIVQ_VALUE(PeriphClkInit->PLLSAIDivQ)); -080041d8 : - * @brief DMA UART transmit process complete callback. - * @param hdma DMA handle. - * @retval None - */ -static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma) -{ - 80041d8: b580 push {r7, lr} - 80041da: b084 sub sp, #16 - 80041dc: af00 add r7, sp, #0 - 80041de: 6078 str r0, [r7, #4] - UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); - 80041e0: 687b ldr r3, [r7, #4] - 80041e2: 6b9b ldr r3, [r3, #56] ; 0x38 - 80041e4: 60fb str r3, [r7, #12] + /* Read PLLSAIP value from PLLSAICFGR register (this value is not needed for SAI configuration) */ + tmpreg0 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIP) >> RCC_PLLSAICFGR_PLLSAIP_Pos); + 8006596: 4b51 ldr r3, [pc, #324] ; (80066dc ) + 8006598: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 + 800659c: 0c1b lsrs r3, r3, #16 + 800659e: f003 0303 and.w r3, r3, #3 + 80065a2: 613b str r3, [r7, #16] + tmpreg1 = ((RCC->PLLSAICFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLSAICFGR_PLLSAIR_Pos); + 80065a4: 4b4d ldr r3, [pc, #308] ; (80066dc ) + 80065a6: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 + 80065aa: 0f1b lsrs r3, r3, #28 + 80065ac: f003 0307 and.w r3, r3, #7 + 80065b0: 60fb str r3, [r7, #12] + /* PLLSAI_VCO Input = PLL_SOURCE/PLLM */ + /* PLLSAI_VCO Output = PLLSAI_VCO Input * PLLSAIN */ + /* SAI_CLK(first level) = PLLSAI_VCO Output/PLLSAIQ */ + __HAL_RCC_PLLSAI_CONFIG(PeriphClkInit->PLLSAI.PLLSAIN , tmpreg0, PeriphClkInit->PLLSAI.PLLSAIQ, tmpreg1); + 80065b2: 687b ldr r3, [r7, #4] + 80065b4: 695b ldr r3, [r3, #20] + 80065b6: 019a lsls r2, r3, #6 + 80065b8: 693b ldr r3, [r7, #16] + 80065ba: 041b lsls r3, r3, #16 + 80065bc: 431a orrs r2, r3 + 80065be: 687b ldr r3, [r7, #4] + 80065c0: 699b ldr r3, [r3, #24] + 80065c2: 061b lsls r3, r3, #24 + 80065c4: 431a orrs r2, r3 + 80065c6: 68fb ldr r3, [r7, #12] + 80065c8: 071b lsls r3, r3, #28 + 80065ca: 4944 ldr r1, [pc, #272] ; (80066dc ) + 80065cc: 4313 orrs r3, r2 + 80065ce: f8c1 3088 str.w r3, [r1, #136] ; 0x88 - /* DMA Normal mode */ - if (hdma->Init.Mode != DMA_CIRCULAR) - 80041e6: 687b ldr r3, [r7, #4] - 80041e8: 69db ldr r3, [r3, #28] - 80041ea: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 80041ee: d014 beq.n 800421a - { - huart->TxXferCount = 0U; - 80041f0: 68fb ldr r3, [r7, #12] - 80041f2: 2200 movs r2, #0 - 80041f4: f8a3 2052 strh.w r2, [r3, #82] ; 0x52 + /* SAI_CLK_x = SAI_CLK(first level)/PLLSAIDIVQ */ + __HAL_RCC_PLLSAI_PLLSAICLKDIVQ_CONFIG(PeriphClkInit->PLLSAIDivQ); + 80065d2: 4b42 ldr r3, [pc, #264] ; (80066dc ) + 80065d4: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c + 80065d8: f423 52f8 bic.w r2, r3, #7936 ; 0x1f00 + 80065dc: 687b ldr r3, [r7, #4] + 80065de: 6a9b ldr r3, [r3, #40] ; 0x28 + 80065e0: 3b01 subs r3, #1 + 80065e2: 021b lsls r3, r3, #8 + 80065e4: 493d ldr r1, [pc, #244] ; (80066dc ) + 80065e6: 4313 orrs r3, r2 + 80065e8: f8c1 308c str.w r3, [r1, #140] ; 0x8c + } - /* Disable the DMA transfer for transmit request by resetting the DMAT bit - in the UART CR3 register */ - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); - 80041f8: 68fb ldr r3, [r7, #12] - 80041fa: 681b ldr r3, [r3, #0] - 80041fc: 689a ldr r2, [r3, #8] - 80041fe: 68fb ldr r3, [r7, #12] - 8004200: 681b ldr r3, [r3, #0] - 8004202: f022 0280 bic.w r2, r2, #128 ; 0x80 - 8004206: 609a str r2, [r3, #8] + /*----------------- In Case of PLLSAI is selected as source clock for CLK48 -------------------*/ + /* In Case of PLLI2S is selected as source clock for CK48 */ + if((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CLK48) == RCC_PERIPHCLK_CLK48) && (PeriphClkInit->Clk48ClockSelection == RCC_CLK48SOURCE_PLLSAIP)) + 80065ec: 687b ldr r3, [r7, #4] + 80065ee: 681b ldr r3, [r3, #0] + 80065f0: f403 1300 and.w r3, r3, #2097152 ; 0x200000 + 80065f4: 2b00 cmp r3, #0 + 80065f6: d022 beq.n 800663e + 80065f8: 687b ldr r3, [r7, #4] + 80065fa: 6fdb ldr r3, [r3, #124] ; 0x7c + 80065fc: f1b3 6f00 cmp.w r3, #134217728 ; 0x8000000 + 8006600: d11d bne.n 800663e + { + /* check for Parameters */ + assert_param(IS_RCC_PLLSAIP_VALUE(PeriphClkInit->PLLSAI.PLLSAIP)); + /* Read PLLSAIQ and PLLSAIR value from PLLSAICFGR register (this value is not needed for CK48 configuration) */ + tmpreg0 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIQ) >> RCC_PLLSAICFGR_PLLSAIQ_Pos); + 8006602: 4b36 ldr r3, [pc, #216] ; (80066dc ) + 8006604: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 + 8006608: 0e1b lsrs r3, r3, #24 + 800660a: f003 030f and.w r3, r3, #15 + 800660e: 613b str r3, [r7, #16] + tmpreg1 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIR) >> RCC_PLLSAICFGR_PLLSAIR_Pos); + 8006610: 4b32 ldr r3, [pc, #200] ; (80066dc ) + 8006612: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 + 8006616: 0f1b lsrs r3, r3, #28 + 8006618: f003 0307 and.w r3, r3, #7 + 800661c: 60fb str r3, [r7, #12] - /* Enable the UART Transmit Complete Interrupt */ - SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); - 8004208: 68fb ldr r3, [r7, #12] - 800420a: 681b ldr r3, [r3, #0] - 800420c: 681a ldr r2, [r3, #0] - 800420e: 68fb ldr r3, [r7, #12] - 8004210: 681b ldr r3, [r3, #0] - 8004212: f042 0240 orr.w r2, r2, #64 ; 0x40 - 8004216: 601a str r2, [r3, #0] -#else - /*Call legacy weak Tx complete callback*/ - HAL_UART_TxCpltCallback(huart); -#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ - } -} - 8004218: e002 b.n 8004220 - HAL_UART_TxCpltCallback(huart); - 800421a: 68f8 ldr r0, [r7, #12] - 800421c: f002 feec bl 8006ff8 -} - 8004220: bf00 nop - 8004222: 3710 adds r7, #16 - 8004224: 46bd mov sp, r7 - 8004226: bd80 pop {r7, pc} + /* Configure the PLLSAI division factors */ + /* PLLSAI_VCO = f(VCO clock) = f(PLLSAI clock input) x (PLLI2SN/PLLM) */ + /* 48CLK = f(PLLSAI clock output) = f(VCO clock) / PLLSAIP */ + __HAL_RCC_PLLSAI_CONFIG(PeriphClkInit->PLLSAI.PLLSAIN , PeriphClkInit->PLLSAI.PLLSAIP, tmpreg0, tmpreg1); + 800661e: 687b ldr r3, [r7, #4] + 8006620: 695b ldr r3, [r3, #20] + 8006622: 019a lsls r2, r3, #6 + 8006624: 687b ldr r3, [r7, #4] + 8006626: 6a1b ldr r3, [r3, #32] + 8006628: 041b lsls r3, r3, #16 + 800662a: 431a orrs r2, r3 + 800662c: 693b ldr r3, [r7, #16] + 800662e: 061b lsls r3, r3, #24 + 8006630: 431a orrs r2, r3 + 8006632: 68fb ldr r3, [r7, #12] + 8006634: 071b lsls r3, r3, #28 + 8006636: 4929 ldr r1, [pc, #164] ; (80066dc ) + 8006638: 4313 orrs r3, r2 + 800663a: f8c1 3088 str.w r3, [r1, #136] ; 0x88 + } -08004228 : - * @brief DMA UART transmit process half complete callback. - * @param hdma DMA handle. - * @retval None - */ -static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma) -{ - 8004228: b580 push {r7, lr} - 800422a: b084 sub sp, #16 - 800422c: af00 add r7, sp, #0 - 800422e: 6078 str r0, [r7, #4] - UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); - 8004230: 687b ldr r3, [r7, #4] - 8004232: 6b9b ldr r3, [r3, #56] ; 0x38 - 8004234: 60fb str r3, [r7, #12] -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /*Call registered Tx Half complete callback*/ - huart->TxHalfCpltCallback(huart); -#else - /*Call legacy weak Tx Half complete callback*/ - HAL_UART_TxHalfCpltCallback(huart); - 8004236: 68f8 ldr r0, [r7, #12] - 8004238: f7ff fbbe bl 80039b8 -#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ -} - 800423c: bf00 nop - 800423e: 3710 adds r7, #16 - 8004240: 46bd mov sp, r7 - 8004242: bd80 pop {r7, pc} +#if defined(STM32F746xx) || defined(STM32F756xx) || defined (STM32F767xx) || defined (STM32F769xx) || defined (STM32F777xx) || defined (STM32F779xx) || defined (STM32F750xx) + /*---------------------------- LTDC configuration -------------------------------*/ + if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LTDC) == (RCC_PERIPHCLK_LTDC)) + 800663e: 687b ldr r3, [r7, #4] + 8006640: 681b ldr r3, [r3, #0] + 8006642: f003 0308 and.w r3, r3, #8 + 8006646: 2b00 cmp r3, #0 + 8006648: d028 beq.n 800669c + { + assert_param(IS_RCC_PLLSAIR_VALUE(PeriphClkInit->PLLSAI.PLLSAIR)); + assert_param(IS_RCC_PLLSAI_DIVR_VALUE(PeriphClkInit->PLLSAIDivR)); -08004244 : - * @brief DMA UART receive process complete callback. - * @param hdma DMA handle. - * @retval None - */ -static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma) -{ - 8004244: b580 push {r7, lr} - 8004246: b084 sub sp, #16 - 8004248: af00 add r7, sp, #0 - 800424a: 6078 str r0, [r7, #4] - UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); - 800424c: 687b ldr r3, [r7, #4] - 800424e: 6b9b ldr r3, [r3, #56] ; 0x38 - 8004250: 60fb str r3, [r7, #12] + /* Read PLLSAIP and PLLSAIQ value from PLLSAICFGR register (these value are not needed for LTDC configuration) */ + tmpreg0 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIQ) >> RCC_PLLSAICFGR_PLLSAIQ_Pos); + 800664a: 4b24 ldr r3, [pc, #144] ; (80066dc ) + 800664c: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 + 8006650: 0e1b lsrs r3, r3, #24 + 8006652: f003 030f and.w r3, r3, #15 + 8006656: 613b str r3, [r7, #16] + tmpreg1 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIP) >> RCC_PLLSAICFGR_PLLSAIP_Pos); + 8006658: 4b20 ldr r3, [pc, #128] ; (80066dc ) + 800665a: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 + 800665e: 0c1b lsrs r3, r3, #16 + 8006660: f003 0303 and.w r3, r3, #3 + 8006664: 60fb str r3, [r7, #12] - /* DMA Normal mode */ - if (hdma->Init.Mode != DMA_CIRCULAR) - 8004252: 687b ldr r3, [r7, #4] - 8004254: 69db ldr r3, [r3, #28] - 8004256: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 800425a: d01e beq.n 800429a - { - huart->RxXferCount = 0U; - 800425c: 68fb ldr r3, [r7, #12] - 800425e: 2200 movs r2, #0 - 8004260: f8a3 205a strh.w r2, [r3, #90] ; 0x5a + /* PLLSAI_VCO Input = PLL_SOURCE/PLLM */ + /* PLLSAI_VCO Output = PLLSAI_VCO Input * PLLSAIN */ + /* LTDC_CLK(first level) = PLLSAI_VCO Output/PLLSAIR */ + __HAL_RCC_PLLSAI_CONFIG(PeriphClkInit->PLLSAI.PLLSAIN , tmpreg1, tmpreg0, PeriphClkInit->PLLSAI.PLLSAIR); + 8006666: 687b ldr r3, [r7, #4] + 8006668: 695b ldr r3, [r3, #20] + 800666a: 019a lsls r2, r3, #6 + 800666c: 68fb ldr r3, [r7, #12] + 800666e: 041b lsls r3, r3, #16 + 8006670: 431a orrs r2, r3 + 8006672: 693b ldr r3, [r7, #16] + 8006674: 061b lsls r3, r3, #24 + 8006676: 431a orrs r2, r3 + 8006678: 687b ldr r3, [r7, #4] + 800667a: 69db ldr r3, [r3, #28] + 800667c: 071b lsls r3, r3, #28 + 800667e: 4917 ldr r1, [pc, #92] ; (80066dc ) + 8006680: 4313 orrs r3, r2 + 8006682: f8c1 3088 str.w r3, [r1, #136] ; 0x88 - /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */ - CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); - 8004264: 68fb ldr r3, [r7, #12] - 8004266: 681b ldr r3, [r3, #0] - 8004268: 681a ldr r2, [r3, #0] - 800426a: 68fb ldr r3, [r7, #12] - 800426c: 681b ldr r3, [r3, #0] - 800426e: f422 7280 bic.w r2, r2, #256 ; 0x100 - 8004272: 601a str r2, [r3, #0] - CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 8004274: 68fb ldr r3, [r7, #12] - 8004276: 681b ldr r3, [r3, #0] - 8004278: 689a ldr r2, [r3, #8] - 800427a: 68fb ldr r3, [r7, #12] - 800427c: 681b ldr r3, [r3, #0] - 800427e: f022 0201 bic.w r2, r2, #1 - 8004282: 609a str r2, [r3, #8] + /* LTDC_CLK = LTDC_CLK(first level)/PLLSAIDIVR */ + __HAL_RCC_PLLSAI_PLLSAICLKDIVR_CONFIG(PeriphClkInit->PLLSAIDivR); + 8006686: 4b15 ldr r3, [pc, #84] ; (80066dc ) + 8006688: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c + 800668c: f423 3240 bic.w r2, r3, #196608 ; 0x30000 + 8006690: 687b ldr r3, [r7, #4] + 8006692: 6adb ldr r3, [r3, #44] ; 0x2c + 8006694: 4911 ldr r1, [pc, #68] ; (80066dc ) + 8006696: 4313 orrs r3, r2 + 8006698: f8c1 308c str.w r3, [r1, #140] ; 0x8c + } +#endif /* STM32F746xx || STM32F756xx || STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx || STM32F750xx */ - /* Disable the DMA transfer for the receiver request by resetting the DMAR bit - in the UART CR3 register */ - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - 8004284: 68fb ldr r3, [r7, #12] - 8004286: 681b ldr r3, [r3, #0] - 8004288: 689a ldr r2, [r3, #8] - 800428a: 68fb ldr r3, [r7, #12] - 800428c: 681b ldr r3, [r3, #0] - 800428e: f022 0240 bic.w r2, r2, #64 ; 0x40 - 8004292: 609a str r2, [r3, #8] + /* Enable PLLSAI Clock */ + __HAL_RCC_PLLSAI_ENABLE(); + 800669c: 4b0f ldr r3, [pc, #60] ; (80066dc ) + 800669e: 681b ldr r3, [r3, #0] + 80066a0: 4a0e ldr r2, [pc, #56] ; (80066dc ) + 80066a2: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 + 80066a6: 6013 str r3, [r2, #0] - /* At end of Rx process, restore huart->RxState to Ready */ - huart->RxState = HAL_UART_STATE_READY; - 8004294: 68fb ldr r3, [r7, #12] - 8004296: 2220 movs r2, #32 - 8004298: 679a str r2, [r3, #120] ; 0x78 -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /*Call registered Rx complete callback*/ - huart->RxCpltCallback(huart); -#else - /*Call legacy weak Rx complete callback*/ - HAL_UART_RxCpltCallback(huart); - 800429a: 68f8 ldr r0, [r7, #12] - 800429c: f002 febe bl 800701c -#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ -} - 80042a0: bf00 nop - 80042a2: 3710 adds r7, #16 - 80042a4: 46bd mov sp, r7 - 80042a6: bd80 pop {r7, pc} + /* Get Start Tick*/ + tickstart = HAL_GetTick(); + 80066a8: f7fe f93a bl 8004920 + 80066ac: 6178 str r0, [r7, #20] -080042a8 : - * @brief DMA UART receive process half complete callback. - * @param hdma DMA handle. - * @retval None - */ -static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma) -{ - 80042a8: b580 push {r7, lr} - 80042aa: b084 sub sp, #16 - 80042ac: af00 add r7, sp, #0 - 80042ae: 6078 str r0, [r7, #4] - UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); - 80042b0: 687b ldr r3, [r7, #4] - 80042b2: 6b9b ldr r3, [r3, #56] ; 0x38 - 80042b4: 60fb str r3, [r7, #12] -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /*Call registered Rx Half complete callback*/ - huart->RxHalfCpltCallback(huart); -#else - /*Call legacy weak Rx Half complete callback*/ - HAL_UART_RxHalfCpltCallback(huart); - 80042b6: 68f8 ldr r0, [r7, #12] - 80042b8: f7ff fb88 bl 80039cc -#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + /* Wait till PLLSAI is ready */ + while(__HAL_RCC_PLLSAI_GET_FLAG() == RESET) + 80066ae: e008 b.n 80066c2 + { + if((HAL_GetTick() - tickstart) > PLLSAI_TIMEOUT_VALUE) + 80066b0: f7fe f936 bl 8004920 + 80066b4: 4602 mov r2, r0 + 80066b6: 697b ldr r3, [r7, #20] + 80066b8: 1ad3 subs r3, r2, r3 + 80066ba: 2b64 cmp r3, #100 ; 0x64 + 80066bc: d901 bls.n 80066c2 + { + /* return in case of Timeout detected */ + return HAL_TIMEOUT; + 80066be: 2303 movs r3, #3 + 80066c0: e007 b.n 80066d2 + while(__HAL_RCC_PLLSAI_GET_FLAG() == RESET) + 80066c2: 4b06 ldr r3, [pc, #24] ; (80066dc ) + 80066c4: 681b ldr r3, [r3, #0] + 80066c6: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 + 80066ca: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 80066ce: d1ef bne.n 80066b0 + } + } + } + return HAL_OK; + 80066d0: 2300 movs r3, #0 } - 80042bc: bf00 nop - 80042be: 3710 adds r7, #16 - 80042c0: 46bd mov sp, r7 - 80042c2: bd80 pop {r7, pc} - -080042c4 : - * @brief DMA UART communication error callback. - * @param hdma DMA handle. - * @retval None + 80066d2: 4618 mov r0, r3 + 80066d4: 3720 adds r7, #32 + 80066d6: 46bd mov sp, r7 + 80066d8: bd80 pop {r7, pc} + 80066da: bf00 nop + 80066dc: 40023800 .word 0x40023800 + +080066e0 : + * Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init() + * @param htim TIM Base handle + * @retval HAL status */ -static void UART_DMAError(DMA_HandleTypeDef *hdma) +HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim) { - 80042c4: b580 push {r7, lr} - 80042c6: b086 sub sp, #24 - 80042c8: af00 add r7, sp, #0 - 80042ca: 6078 str r0, [r7, #4] - UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); - 80042cc: 687b ldr r3, [r7, #4] - 80042ce: 6b9b ldr r3, [r3, #56] ; 0x38 - 80042d0: 617b str r3, [r7, #20] - - const HAL_UART_StateTypeDef gstate = huart->gState; - 80042d2: 697b ldr r3, [r7, #20] - 80042d4: 6f5b ldr r3, [r3, #116] ; 0x74 - 80042d6: 613b str r3, [r7, #16] - const HAL_UART_StateTypeDef rxstate = huart->RxState; - 80042d8: 697b ldr r3, [r7, #20] - 80042da: 6f9b ldr r3, [r3, #120] ; 0x78 - 80042dc: 60fb str r3, [r7, #12] - - /* Stop UART DMA Tx request if ongoing */ - if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) && - 80042de: 697b ldr r3, [r7, #20] - 80042e0: 681b ldr r3, [r3, #0] - 80042e2: 689b ldr r3, [r3, #8] - 80042e4: f003 0380 and.w r3, r3, #128 ; 0x80 - 80042e8: 2b80 cmp r3, #128 ; 0x80 - 80042ea: d109 bne.n 8004300 - 80042ec: 693b ldr r3, [r7, #16] - 80042ee: 2b21 cmp r3, #33 ; 0x21 - 80042f0: d106 bne.n 8004300 - (gstate == HAL_UART_STATE_BUSY_TX)) + 80066e0: b580 push {r7, lr} + 80066e2: b082 sub sp, #8 + 80066e4: af00 add r7, sp, #0 + 80066e6: 6078 str r0, [r7, #4] + /* Check the TIM handle allocation */ + if (htim == NULL) + 80066e8: 687b ldr r3, [r7, #4] + 80066ea: 2b00 cmp r3, #0 + 80066ec: d101 bne.n 80066f2 { - huart->TxXferCount = 0U; - 80042f2: 697b ldr r3, [r7, #20] - 80042f4: 2200 movs r2, #0 - 80042f6: f8a3 2052 strh.w r2, [r3, #82] ; 0x52 - UART_EndTxTransfer(huart); - 80042fa: 6978 ldr r0, [r7, #20] - 80042fc: f7ff ff37 bl 800416e - } + return HAL_ERROR; + 80066ee: 2301 movs r3, #1 + 80066f0: e01d b.n 800672e + assert_param(IS_TIM_INSTANCE(htim->Instance)); + assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); + assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); + assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); - /* Stop UART DMA Rx request if ongoing */ - if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) && - 8004300: 697b ldr r3, [r7, #20] - 8004302: 681b ldr r3, [r3, #0] - 8004304: 689b ldr r3, [r3, #8] - 8004306: f003 0340 and.w r3, r3, #64 ; 0x40 - 800430a: 2b40 cmp r3, #64 ; 0x40 - 800430c: d109 bne.n 8004322 - 800430e: 68fb ldr r3, [r7, #12] - 8004310: 2b22 cmp r3, #34 ; 0x22 - 8004312: d106 bne.n 8004322 - (rxstate == HAL_UART_STATE_BUSY_RX)) + if (htim->State == HAL_TIM_STATE_RESET) + 80066f2: 687b ldr r3, [r7, #4] + 80066f4: f893 303d ldrb.w r3, [r3, #61] ; 0x3d + 80066f8: b2db uxtb r3, r3 + 80066fa: 2b00 cmp r3, #0 + 80066fc: d106 bne.n 800670c { - huart->RxXferCount = 0U; - 8004314: 697b ldr r3, [r7, #20] - 8004316: 2200 movs r2, #0 - 8004318: f8a3 205a strh.w r2, [r3, #90] ; 0x5a - UART_EndRxTransfer(huart); - 800431c: 6978 ldr r0, [r7, #20] - 800431e: f7ff ff3b bl 8004198 + /* Allocate lock resource and initialize it */ + htim->Lock = HAL_UNLOCKED; + 80066fe: 687b ldr r3, [r7, #4] + 8006700: 2200 movs r2, #0 + 8006702: f883 203c strb.w r2, [r3, #60] ; 0x3c + } + /* Init the low level hardware : GPIO, CLOCK, NVIC */ + htim->Base_MspInitCallback(htim); +#else + /* Init the low level hardware : GPIO, CLOCK, NVIC */ + HAL_TIM_Base_MspInit(htim); + 8006706: 6878 ldr r0, [r7, #4] + 8006708: f7fd fdaa bl 8004260 +#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } - huart->ErrorCode |= HAL_UART_ERROR_DMA; - 8004322: 697b ldr r3, [r7, #20] - 8004324: 6fdb ldr r3, [r3, #124] ; 0x7c - 8004326: f043 0210 orr.w r2, r3, #16 - 800432a: 697b ldr r3, [r7, #20] - 800432c: 67da str r2, [r3, #124] ; 0x7c -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /*Call registered error callback*/ - huart->ErrorCallback(huart); -#else - /*Call legacy weak error callback*/ - HAL_UART_ErrorCallback(huart); - 800432e: 6978 ldr r0, [r7, #20] - 8004330: f7ff fb56 bl 80039e0 -#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ -} - 8004334: bf00 nop - 8004336: 3718 adds r7, #24 - 8004338: 46bd mov sp, r7 - 800433a: bd80 pop {r7, pc} + /* Set the TIM state */ + htim->State = HAL_TIM_STATE_BUSY; + 800670c: 687b ldr r3, [r7, #4] + 800670e: 2202 movs r2, #2 + 8006710: f883 203d strb.w r2, [r3, #61] ; 0x3d -0800433c : - * (To be called at end of DMA Abort procedure following error occurrence). - * @param hdma DMA handle. - * @retval None - */ -static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma) -{ - 800433c: b580 push {r7, lr} - 800433e: b084 sub sp, #16 - 8004340: af00 add r7, sp, #0 - 8004342: 6078 str r0, [r7, #4] - UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); - 8004344: 687b ldr r3, [r7, #4] - 8004346: 6b9b ldr r3, [r3, #56] ; 0x38 - 8004348: 60fb str r3, [r7, #12] - huart->RxXferCount = 0U; - 800434a: 68fb ldr r3, [r7, #12] - 800434c: 2200 movs r2, #0 - 800434e: f8a3 205a strh.w r2, [r3, #90] ; 0x5a - huart->TxXferCount = 0U; - 8004352: 68fb ldr r3, [r7, #12] - 8004354: 2200 movs r2, #0 - 8004356: f8a3 2052 strh.w r2, [r3, #82] ; 0x52 -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /*Call registered error callback*/ - huart->ErrorCallback(huart); -#else - /*Call legacy weak error callback*/ - HAL_UART_ErrorCallback(huart); - 800435a: 68f8 ldr r0, [r7, #12] - 800435c: f7ff fb40 bl 80039e0 -#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + /* Set the Time Base configuration */ + TIM_Base_SetConfig(htim->Instance, &htim->Init); + 8006714: 687b ldr r3, [r7, #4] + 8006716: 681a ldr r2, [r3, #0] + 8006718: 687b ldr r3, [r7, #4] + 800671a: 3304 adds r3, #4 + 800671c: 4619 mov r1, r3 + 800671e: 4610 mov r0, r2 + 8006720: f000 fc20 bl 8006f64 + + /* Initialize the TIM state*/ + htim->State = HAL_TIM_STATE_READY; + 8006724: 687b ldr r3, [r7, #4] + 8006726: 2201 movs r2, #1 + 8006728: f883 203d strb.w r2, [r3, #61] ; 0x3d + + return HAL_OK; + 800672c: 2300 movs r3, #0 } - 8004360: bf00 nop - 8004362: 3710 adds r7, #16 - 8004364: 46bd mov sp, r7 - 8004366: bd80 pop {r7, pc} + 800672e: 4618 mov r0, r3 + 8006730: 3708 adds r7, #8 + 8006732: 46bd mov sp, r7 + 8006734: bd80 pop {r7, pc} -08004368 : - * @param huart pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @retval None +08006736 : + * Ex: call @ref HAL_TIM_PWM_DeInit() before HAL_TIM_PWM_Init() + * @param htim TIM PWM handle + * @retval HAL status */ -static void UART_EndTransmit_IT(UART_HandleTypeDef *huart) +HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim) { - 8004368: b580 push {r7, lr} - 800436a: b082 sub sp, #8 - 800436c: af00 add r7, sp, #0 - 800436e: 6078 str r0, [r7, #4] - /* Disable the UART Transmit Complete Interrupt */ - CLEAR_BIT(huart->Instance->CR1, USART_CR1_TCIE); - 8004370: 687b ldr r3, [r7, #4] - 8004372: 681b ldr r3, [r3, #0] - 8004374: 681a ldr r2, [r3, #0] - 8004376: 687b ldr r3, [r7, #4] - 8004378: 681b ldr r3, [r3, #0] - 800437a: f022 0240 bic.w r2, r2, #64 ; 0x40 - 800437e: 601a str r2, [r3, #0] - - /* Tx process is ended, restore huart->gState to Ready */ - huart->gState = HAL_UART_STATE_READY; - 8004380: 687b ldr r3, [r7, #4] - 8004382: 2220 movs r2, #32 - 8004384: 675a str r2, [r3, #116] ; 0x74 + 8006736: b580 push {r7, lr} + 8006738: b082 sub sp, #8 + 800673a: af00 add r7, sp, #0 + 800673c: 6078 str r0, [r7, #4] + /* Check the TIM handle allocation */ + if (htim == NULL) + 800673e: 687b ldr r3, [r7, #4] + 8006740: 2b00 cmp r3, #0 + 8006742: d101 bne.n 8006748 + { + return HAL_ERROR; + 8006744: 2301 movs r3, #1 + 8006746: e01d b.n 8006784 + assert_param(IS_TIM_INSTANCE(htim->Instance)); + assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); + assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); + assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); - /* Cleat TxISR function pointer */ - huart->TxISR = NULL; - 8004386: 687b ldr r3, [r7, #4] - 8004388: 2200 movs r2, #0 - 800438a: 665a str r2, [r3, #100] ; 0x64 -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /*Call registered Tx complete callback*/ - huart->TxCpltCallback(huart); + if (htim->State == HAL_TIM_STATE_RESET) + 8006748: 687b ldr r3, [r7, #4] + 800674a: f893 303d ldrb.w r3, [r3, #61] ; 0x3d + 800674e: b2db uxtb r3, r3 + 8006750: 2b00 cmp r3, #0 + 8006752: d106 bne.n 8006762 + { + /* Allocate lock resource and initialize it */ + htim->Lock = HAL_UNLOCKED; + 8006754: 687b ldr r3, [r7, #4] + 8006756: 2200 movs r2, #0 + 8006758: f883 203c strb.w r2, [r3, #60] ; 0x3c + } + /* Init the low level hardware : GPIO, CLOCK, NVIC */ + htim->PWM_MspInitCallback(htim); #else - /*Call legacy weak Tx complete callback*/ - HAL_UART_TxCpltCallback(huart); - 800438c: 6878 ldr r0, [r7, #4] - 800438e: f002 fe33 bl 8006ff8 -#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ -} - 8004392: bf00 nop - 8004394: 3708 adds r7, #8 - 8004396: 46bd mov sp, r7 - 8004398: bd80 pop {r7, pc} - -0800439a <_ZN7Encoder8GetCountEv>: - - Encoder(TIM_HandleTypeDef* timer); - - void Setup(); - - int GetCount() { - 800439a: b480 push {r7} - 800439c: b085 sub sp, #20 - 800439e: af00 add r7, sp, #0 - 80043a0: 6078 str r0, [r7, #4] - int count = ((int)__HAL_TIM_GET_COUNTER(timer_) - ((timer_->Init.Period)/2)); - 80043a2: 687b ldr r3, [r7, #4] - 80043a4: 681b ldr r3, [r3, #0] - 80043a6: 681b ldr r3, [r3, #0] - 80043a8: 6a5a ldr r2, [r3, #36] ; 0x24 - 80043aa: 687b ldr r3, [r7, #4] - 80043ac: 681b ldr r3, [r3, #0] - 80043ae: 68db ldr r3, [r3, #12] - 80043b0: 085b lsrs r3, r3, #1 - 80043b2: 1ad3 subs r3, r2, r3 - 80043b4: 60fb str r3, [r7, #12] - return count; - 80043b6: 68fb ldr r3, [r7, #12] + /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ + HAL_TIM_PWM_MspInit(htim); + 800675c: 6878 ldr r0, [r7, #4] + 800675e: f000 f815 bl 800678c +#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } - 80043b8: 4618 mov r0, r3 - 80043ba: 3714 adds r7, #20 - 80043bc: 46bd mov sp, r7 - 80043be: f85d 7b04 ldr.w r7, [sp], #4 - 80043c2: 4770 bx lr -080043c4 <_ZN7Encoder10ResetCountEv>: + /* Set the TIM state */ + htim->State = HAL_TIM_STATE_BUSY; + 8006762: 687b ldr r3, [r7, #4] + 8006764: 2202 movs r2, #2 + 8006766: f883 203d strb.w r2, [r3, #61] ; 0x3d - void ResetCount() { - 80043c4: b480 push {r7} - 80043c6: b083 sub sp, #12 - 80043c8: af00 add r7, sp, #0 - 80043ca: 6078 str r0, [r7, #4] - //set counter to half its maximum value - __HAL_TIM_SET_COUNTER(timer_, (timer_->Init.Period)/2); - 80043cc: 687b ldr r3, [r7, #4] - 80043ce: 681b ldr r3, [r3, #0] - 80043d0: 68da ldr r2, [r3, #12] - 80043d2: 687b ldr r3, [r7, #4] - 80043d4: 681b ldr r3, [r3, #0] - 80043d6: 681b ldr r3, [r3, #0] - 80043d8: 0852 lsrs r2, r2, #1 - 80043da: 625a str r2, [r3, #36] ; 0x24 - } - 80043dc: bf00 nop - 80043de: 370c adds r7, #12 - 80043e0: 46bd mov sp, r7 - 80043e2: f85d 7b04 ldr.w r7, [sp], #4 - 80043e6: 4770 bx lr + /* Init the base time for the PWM */ + TIM_Base_SetConfig(htim->Instance, &htim->Init); + 800676a: 687b ldr r3, [r7, #4] + 800676c: 681a ldr r2, [r3, #0] + 800676e: 687b ldr r3, [r7, #4] + 8006770: 3304 adds r3, #4 + 8006772: 4619 mov r1, r3 + 8006774: 4610 mov r0, r2 + 8006776: f000 fbf5 bl 8006f64 -080043e8 <_ZN7EncoderC1EP17TIM_HandleTypeDef>: -#include "encoder.h" + /* Initialize the TIM state*/ + htim->State = HAL_TIM_STATE_READY; + 800677a: 687b ldr r3, [r7, #4] + 800677c: 2201 movs r2, #1 + 800677e: f883 203d strb.w r2, [r3, #61] ; 0x3d -Encoder::Encoder(TIM_HandleTypeDef* timer) { - 80043e8: b480 push {r7} - 80043ea: b083 sub sp, #12 - 80043ec: af00 add r7, sp, #0 - 80043ee: 6078 str r0, [r7, #4] - 80043f0: 6039 str r1, [r7, #0] - 80043f2: 687b ldr r3, [r7, #4] - 80043f4: 4a08 ldr r2, [pc, #32] ; (8004418 <_ZN7EncoderC1EP17TIM_HandleTypeDef+0x30>) - 80043f6: 611a str r2, [r3, #16] - 80043f8: 687b ldr r3, [r7, #4] - 80043fa: 4a08 ldr r2, [pc, #32] ; (800441c <_ZN7EncoderC1EP17TIM_HandleTypeDef+0x34>) - 80043fc: 615a str r2, [r3, #20] - 80043fe: 687b ldr r3, [r7, #4] - 8004400: 4a07 ldr r2, [pc, #28] ; (8004420 <_ZN7EncoderC1EP17TIM_HandleTypeDef+0x38>) - 8004402: 619a str r2, [r3, #24] - timer_ = timer; - 8004404: 687b ldr r3, [r7, #4] - 8004406: 683a ldr r2, [r7, #0] - 8004408: 601a str r2, [r3, #0] + return HAL_OK; + 8006782: 2300 movs r3, #0 } - 800440a: 687b ldr r3, [r7, #4] - 800440c: 4618 mov r0, r3 - 800440e: 370c adds r7, #12 - 8004410: 46bd mov sp, r7 - 8004412: f85d 7b04 ldr.w r7, [sp], #4 - 8004416: 4770 bx lr - 8004418: 00012110 .word 0x00012110 - 800441c: 40490fd0 .word 0x40490fd0 - 8004420: 3f40ff97 .word 0x3f40ff97 + 8006784: 4618 mov r0, r3 + 8006786: 3708 adds r7, #8 + 8006788: 46bd mov sp, r7 + 800678a: bd80 pop {r7, pc} -08004424 <_ZN7Encoder5SetupEv>: +0800678c : + * @brief Initializes the TIM PWM MSP. + * @param htim TIM PWM handle + * @retval None + */ +__weak void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim) +{ + 800678c: b480 push {r7} + 800678e: b083 sub sp, #12 + 8006790: af00 add r7, sp, #0 + 8006792: 6078 str r0, [r7, #4] + UNUSED(htim); -void Encoder::Setup() { - 8004424: b580 push {r7, lr} - 8004426: b082 sub sp, #8 - 8004428: af00 add r7, sp, #0 - 800442a: 6078 str r0, [r7, #4] - HAL_TIM_Encoder_Start(timer_, TIM_CHANNEL_ALL); - 800442c: 687b ldr r3, [r7, #4] - 800442e: 681b ldr r3, [r3, #0] - 8004430: 213c movs r1, #60 ; 0x3c - 8004432: 4618 mov r0, r3 - 8004434: f7fe f8ce bl 80025d4 - this->ResetCount(); - 8004438: 6878 ldr r0, [r7, #4] - 800443a: f7ff ffc3 bl 80043c4 <_ZN7Encoder10ResetCountEv> - this->previous_millis_ = 0; - 800443e: 687b ldr r3, [r7, #4] - 8004440: 2200 movs r2, #0 - 8004442: 605a str r2, [r3, #4] - this->current_millis_ = HAL_GetTick(); - 8004444: f7fc f8d2 bl 80005ec - 8004448: 4602 mov r2, r0 - 800444a: 687b ldr r3, [r7, #4] - 800444c: 609a str r2, [r3, #8] + /* NOTE : This function should not be modified, when the callback is needed, + the HAL_TIM_PWM_MspInit could be implemented in the user file + */ } - 800444e: bf00 nop - 8004450: 3708 adds r7, #8 - 8004452: 46bd mov sp, r7 - 8004454: bd80 pop {r7, pc} + 8006794: bf00 nop + 8006796: 370c adds r7, #12 + 8006798: 46bd mov sp, r7 + 800679a: f85d 7b04 ldr.w r7, [sp], #4 + 800679e: 4770 bx lr -08004456 <_ZN7Encoder12UpdateValuesEv>: - -void Encoder::UpdateValues() { - 8004456: b580 push {r7, lr} - 8004458: b082 sub sp, #8 - 800445a: af00 add r7, sp, #0 - 800445c: 6078 str r0, [r7, #4] - this->previous_millis_ = this->current_millis_; - 800445e: 687b ldr r3, [r7, #4] - 8004460: 689a ldr r2, [r3, #8] - 8004462: 687b ldr r3, [r7, #4] - 8004464: 605a str r2, [r3, #4] - this->current_millis_ = HAL_GetTick(); - 8004466: f7fc f8c1 bl 80005ec - 800446a: 4602 mov r2, r0 - 800446c: 687b ldr r3, [r7, #4] - 800446e: 609a str r2, [r3, #8] - this->ticks_ = this->GetCount(); - 8004470: 6878 ldr r0, [r7, #4] - 8004472: f7ff ff92 bl 800439a <_ZN7Encoder8GetCountEv> - 8004476: 4602 mov r2, r0 - 8004478: 687b ldr r3, [r7, #4] - 800447a: 60da str r2, [r3, #12] - this->ResetCount(); - 800447c: 6878 ldr r0, [r7, #4] - 800447e: f7ff ffa1 bl 80043c4 <_ZN7Encoder10ResetCountEv> -} - 8004482: bf00 nop - 8004484: 3708 adds r7, #8 - 8004486: 46bd mov sp, r7 - 8004488: bd80 pop {r7, pc} - ... +080067a0 : + * @param htim TIM Encoder Interface handle + * @param sConfig TIM Encoder Interface configuration structure + * @retval HAL status + */ +HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *htim, TIM_Encoder_InitTypeDef *sConfig) +{ + 80067a0: b580 push {r7, lr} + 80067a2: b086 sub sp, #24 + 80067a4: af00 add r7, sp, #0 + 80067a6: 6078 str r0, [r7, #4] + 80067a8: 6039 str r1, [r7, #0] + uint32_t tmpsmcr; + uint32_t tmpccmr1; + uint32_t tmpccer; -0800448c <_ZN7Encoder17GetLinearVelocityEv>: - float meters = ((float) this->ticks_ * kWheelCircumference) - / kTicksPerRevolution; - return meters; -} + /* Check the TIM handle allocation */ + if (htim == NULL) + 80067aa: 687b ldr r3, [r7, #4] + 80067ac: 2b00 cmp r3, #0 + 80067ae: d101 bne.n 80067b4 + { + return HAL_ERROR; + 80067b0: 2301 movs r3, #1 + 80067b2: e07b b.n 80068ac + assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler)); + assert_param(IS_TIM_IC_PRESCALER(sConfig->IC2Prescaler)); + assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter)); + assert_param(IS_TIM_IC_FILTER(sConfig->IC2Filter)); -float Encoder::GetLinearVelocity() { - 800448c: b580 push {r7, lr} - 800448e: b086 sub sp, #24 - 8004490: af00 add r7, sp, #0 - 8004492: 6078 str r0, [r7, #4] - this->UpdateValues(); - 8004494: 6878 ldr r0, [r7, #4] - 8004496: f7ff ffde bl 8004456 <_ZN7Encoder12UpdateValuesEv> - float meters = ((float) this->ticks_ * kWheelCircumference) - 800449a: 687b ldr r3, [r7, #4] - 800449c: 68db ldr r3, [r3, #12] - 800449e: ee07 3a90 vmov s15, r3 - 80044a2: eeb8 7ae7 vcvt.f32.s32 s14, s15 - 80044a6: 687b ldr r3, [r7, #4] - 80044a8: edd3 7a06 vldr s15, [r3, #24] - 80044ac: ee67 6a27 vmul.f32 s13, s14, s15 - / kTicksPerRevolution; - 80044b0: 687b ldr r3, [r7, #4] - 80044b2: 691b ldr r3, [r3, #16] - 80044b4: ee07 3a90 vmov s15, r3 - 80044b8: eeb8 7a67 vcvt.f32.u32 s14, s15 - float meters = ((float) this->ticks_ * kWheelCircumference) - 80044bc: eec6 7a87 vdiv.f32 s15, s13, s14 - 80044c0: edc7 7a05 vstr s15, [r7, #20] - float deltaTime = this->current_millis_ - this->previous_millis_; - 80044c4: 687b ldr r3, [r7, #4] - 80044c6: 689a ldr r2, [r3, #8] - 80044c8: 687b ldr r3, [r7, #4] - 80044ca: 685b ldr r3, [r3, #4] - 80044cc: 1ad3 subs r3, r2, r3 - 80044ce: ee07 3a90 vmov s15, r3 - 80044d2: eef8 7a67 vcvt.f32.u32 s15, s15 - 80044d6: edc7 7a04 vstr s15, [r7, #16] - float linear_velocity = (meters / (deltaTime / 1000)); - 80044da: edd7 7a04 vldr s15, [r7, #16] - 80044de: eddf 6a09 vldr s13, [pc, #36] ; 8004504 <_ZN7Encoder17GetLinearVelocityEv+0x78> - 80044e2: ee87 7aa6 vdiv.f32 s14, s15, s13 - 80044e6: edd7 6a05 vldr s13, [r7, #20] - 80044ea: eec6 7a87 vdiv.f32 s15, s13, s14 - 80044ee: edc7 7a03 vstr s15, [r7, #12] - return linear_velocity; - 80044f2: 68fb ldr r3, [r7, #12] - 80044f4: ee07 3a90 vmov s15, r3 -} - 80044f8: eeb0 0a67 vmov.f32 s0, s15 - 80044fc: 3718 adds r7, #24 - 80044fe: 46bd mov sp, r7 - 8004500: bd80 pop {r7, pc} - 8004502: bf00 nop - 8004504: 447a0000 .word 0x447a0000 - -08004508 <_ZN7EncoderC1Ev>: - Encoder(){ - 8004508: b480 push {r7} - 800450a: b083 sub sp, #12 - 800450c: af00 add r7, sp, #0 - 800450e: 6078 str r0, [r7, #4] - 8004510: 687b ldr r3, [r7, #4] - 8004512: 4a09 ldr r2, [pc, #36] ; (8004538 <_ZN7EncoderC1Ev+0x30>) - 8004514: 611a str r2, [r3, #16] - 8004516: 687b ldr r3, [r7, #4] - 8004518: 4a08 ldr r2, [pc, #32] ; (800453c <_ZN7EncoderC1Ev+0x34>) - 800451a: 615a str r2, [r3, #20] - 800451c: 687b ldr r3, [r7, #4] - 800451e: 4a08 ldr r2, [pc, #32] ; (8004540 <_ZN7EncoderC1Ev+0x38>) - 8004520: 619a str r2, [r3, #24] - timer_ = NULL; - 8004522: 687b ldr r3, [r7, #4] - 8004524: 2200 movs r2, #0 - 8004526: 601a str r2, [r3, #0] - } - 8004528: 687b ldr r3, [r7, #4] - 800452a: 4618 mov r0, r3 - 800452c: 370c adds r7, #12 - 800452e: 46bd mov sp, r7 - 8004530: f85d 7b04 ldr.w r7, [sp], #4 - 8004534: 4770 bx lr - 8004536: bf00 nop - 8004538: 00012110 .word 0x00012110 - 800453c: 40490fd0 .word 0x40490fd0 - 8004540: 3f40ff97 .word 0x3f40ff97 - -08004544 <_ZN3ros3Msg19serializeAvrFloat64EPhf>: - * @param[in] f value to serialize. - * - * @return number of bytes to advance the buffer pointer. - * - */ - static int serializeAvrFloat64(unsigned char* outbuffer, const float f) - 8004544: b480 push {r7} - 8004546: b087 sub sp, #28 - 8004548: af00 add r7, sp, #0 - 800454a: 6078 str r0, [r7, #4] - 800454c: ed87 0a00 vstr s0, [r7] + if (htim->State == HAL_TIM_STATE_RESET) + 80067b4: 687b ldr r3, [r7, #4] + 80067b6: f893 303d ldrb.w r3, [r3, #61] ; 0x3d + 80067ba: b2db uxtb r3, r3 + 80067bc: 2b00 cmp r3, #0 + 80067be: d106 bne.n 80067ce { - const int32_t* val = (int32_t*) &f; - 8004550: 463b mov r3, r7 - 8004552: 613b str r3, [r7, #16] - int32_t exp = ((*val >> 23) & 255); - 8004554: 693b ldr r3, [r7, #16] - 8004556: 681b ldr r3, [r3, #0] - 8004558: 15db asrs r3, r3, #23 - 800455a: b2db uxtb r3, r3 - 800455c: 617b str r3, [r7, #20] - if (exp != 0) - 800455e: 697b ldr r3, [r7, #20] - 8004560: 2b00 cmp r3, #0 - 8004562: d003 beq.n 800456c <_ZN3ros3Msg19serializeAvrFloat64EPhf+0x28> - { - exp += 1023 - 127; - 8004564: 697b ldr r3, [r7, #20] - 8004566: f503 7360 add.w r3, r3, #896 ; 0x380 - 800456a: 617b str r3, [r7, #20] + /* Allocate lock resource and initialize it */ + htim->Lock = HAL_UNLOCKED; + 80067c0: 687b ldr r3, [r7, #4] + 80067c2: 2200 movs r2, #0 + 80067c4: f883 203c strb.w r2, [r3, #60] ; 0x3c } + /* Init the low level hardware : GPIO, CLOCK, NVIC */ + htim->Encoder_MspInitCallback(htim); +#else + /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ + HAL_TIM_Encoder_MspInit(htim); + 80067c8: 6878 ldr r0, [r7, #4] + 80067ca: f7fd fcb9 bl 8004140 +#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + } - int32_t sig = *val; - 800456c: 693b ldr r3, [r7, #16] - 800456e: 681b ldr r3, [r3, #0] - 8004570: 60fb str r3, [r7, #12] - *(outbuffer++) = 0; - 8004572: 687b ldr r3, [r7, #4] - 8004574: 1c5a adds r2, r3, #1 - 8004576: 607a str r2, [r7, #4] - 8004578: 2200 movs r2, #0 - 800457a: 701a strb r2, [r3, #0] - *(outbuffer++) = 0; - 800457c: 687b ldr r3, [r7, #4] - 800457e: 1c5a adds r2, r3, #1 - 8004580: 607a str r2, [r7, #4] - 8004582: 2200 movs r2, #0 - 8004584: 701a strb r2, [r3, #0] - *(outbuffer++) = 0; - 8004586: 687b ldr r3, [r7, #4] - 8004588: 1c5a adds r2, r3, #1 - 800458a: 607a str r2, [r7, #4] - 800458c: 2200 movs r2, #0 - 800458e: 701a strb r2, [r3, #0] - *(outbuffer++) = (sig << 5) & 0xff; - 8004590: 68fb ldr r3, [r7, #12] - 8004592: 0159 lsls r1, r3, #5 - 8004594: 687b ldr r3, [r7, #4] - 8004596: 1c5a adds r2, r3, #1 - 8004598: 607a str r2, [r7, #4] - 800459a: b2ca uxtb r2, r1 - 800459c: 701a strb r2, [r3, #0] - *(outbuffer++) = (sig >> 3) & 0xff; - 800459e: 68fb ldr r3, [r7, #12] - 80045a0: 10d9 asrs r1, r3, #3 - 80045a2: 687b ldr r3, [r7, #4] - 80045a4: 1c5a adds r2, r3, #1 - 80045a6: 607a str r2, [r7, #4] - 80045a8: b2ca uxtb r2, r1 - 80045aa: 701a strb r2, [r3, #0] - *(outbuffer++) = (sig >> 11) & 0xff; - 80045ac: 68fb ldr r3, [r7, #12] - 80045ae: 12d9 asrs r1, r3, #11 - 80045b0: 687b ldr r3, [r7, #4] - 80045b2: 1c5a adds r2, r3, #1 - 80045b4: 607a str r2, [r7, #4] - 80045b6: b2ca uxtb r2, r1 - 80045b8: 701a strb r2, [r3, #0] - *(outbuffer++) = ((exp << 4) & 0xF0) | ((sig >> 19) & 0x0F); - 80045ba: 697b ldr r3, [r7, #20] - 80045bc: 011b lsls r3, r3, #4 - 80045be: b25a sxtb r2, r3 - 80045c0: 68fb ldr r3, [r7, #12] - 80045c2: 14db asrs r3, r3, #19 - 80045c4: b25b sxtb r3, r3 - 80045c6: f003 030f and.w r3, r3, #15 - 80045ca: b25b sxtb r3, r3 - 80045cc: 4313 orrs r3, r2 - 80045ce: b259 sxtb r1, r3 - 80045d0: 687b ldr r3, [r7, #4] - 80045d2: 1c5a adds r2, r3, #1 - 80045d4: 607a str r2, [r7, #4] - 80045d6: b2ca uxtb r2, r1 - 80045d8: 701a strb r2, [r3, #0] - *(outbuffer++) = (exp >> 4) & 0x7F; - 80045da: 697b ldr r3, [r7, #20] - 80045dc: 111b asrs r3, r3, #4 - 80045de: b2da uxtb r2, r3 - 80045e0: 687b ldr r3, [r7, #4] - 80045e2: 1c59 adds r1, r3, #1 - 80045e4: 6079 str r1, [r7, #4] - 80045e6: f002 027f and.w r2, r2, #127 ; 0x7f - 80045ea: b2d2 uxtb r2, r2 - 80045ec: 701a strb r2, [r3, #0] + /* Set the TIM state */ + htim->State = HAL_TIM_STATE_BUSY; + 80067ce: 687b ldr r3, [r7, #4] + 80067d0: 2202 movs r2, #2 + 80067d2: f883 203d strb.w r2, [r3, #61] ; 0x3d - // Mark negative bit as necessary. - if (f < 0) - 80045ee: edd7 7a00 vldr s15, [r7] - 80045f2: eef5 7ac0 vcmpe.f32 s15, #0.0 - 80045f6: eef1 fa10 vmrs APSR_nzcv, fpscr - 80045fa: d508 bpl.n 800460e <_ZN3ros3Msg19serializeAvrFloat64EPhf+0xca> - { - *(outbuffer - 1) |= 0x80; - 80045fc: 687b ldr r3, [r7, #4] - 80045fe: 3b01 subs r3, #1 - 8004600: 781a ldrb r2, [r3, #0] - 8004602: 687b ldr r3, [r7, #4] - 8004604: 3b01 subs r3, #1 - 8004606: f062 027f orn r2, r2, #127 ; 0x7f - 800460a: b2d2 uxtb r2, r2 - 800460c: 701a strb r2, [r3, #0] - } + /* Reset the SMS and ECE bits */ + htim->Instance->SMCR &= ~(TIM_SMCR_SMS | TIM_SMCR_ECE); + 80067d6: 687b ldr r3, [r7, #4] + 80067d8: 681b ldr r3, [r3, #0] + 80067da: 6899 ldr r1, [r3, #8] + 80067dc: 687b ldr r3, [r7, #4] + 80067de: 681a ldr r2, [r3, #0] + 80067e0: 4b34 ldr r3, [pc, #208] ; (80068b4 ) + 80067e2: 400b ands r3, r1 + 80067e4: 6093 str r3, [r2, #8] - return 8; - 800460e: 2308 movs r3, #8 - } - 8004610: 4618 mov r0, r3 - 8004612: 371c adds r7, #28 - 8004614: 46bd mov sp, r7 - 8004616: f85d 7b04 ldr.w r7, [sp], #4 - 800461a: 4770 bx lr + /* Configure the Time base in the Encoder Mode */ + TIM_Base_SetConfig(htim->Instance, &htim->Init); + 80067e6: 687b ldr r3, [r7, #4] + 80067e8: 681a ldr r2, [r3, #0] + 80067ea: 687b ldr r3, [r7, #4] + 80067ec: 3304 adds r3, #4 + 80067ee: 4619 mov r1, r3 + 80067f0: 4610 mov r0, r2 + 80067f2: f000 fbb7 bl 8006f64 -0800461c <_ZN3ros3Msg21deserializeAvrFloat64EPKhPf>: - * @param[in] inbuffer pointer for buffer to deserialize from. - * @param[out] f pointer to place the deserialized value in. - * - * @return number of bytes to advance the buffer pointer. - */ - static int deserializeAvrFloat64(const unsigned char* inbuffer, float* f) - 800461c: b480 push {r7} - 800461e: b085 sub sp, #20 - 8004620: af00 add r7, sp, #0 - 8004622: 6078 str r0, [r7, #4] - 8004624: 6039 str r1, [r7, #0] - { - uint32_t* val = (uint32_t*)f; - 8004626: 683b ldr r3, [r7, #0] - 8004628: 60fb str r3, [r7, #12] - inbuffer += 3; - 800462a: 687b ldr r3, [r7, #4] - 800462c: 3303 adds r3, #3 - 800462e: 607b str r3, [r7, #4] + /* Get the TIMx SMCR register value */ + tmpsmcr = htim->Instance->SMCR; + 80067f6: 687b ldr r3, [r7, #4] + 80067f8: 681b ldr r3, [r3, #0] + 80067fa: 689b ldr r3, [r3, #8] + 80067fc: 617b str r3, [r7, #20] + + /* Get the TIMx CCMR1 register value */ + tmpccmr1 = htim->Instance->CCMR1; + 80067fe: 687b ldr r3, [r7, #4] + 8006800: 681b ldr r3, [r3, #0] + 8006802: 699b ldr r3, [r3, #24] + 8006804: 613b str r3, [r7, #16] + + /* Get the TIMx CCER register value */ + tmpccer = htim->Instance->CCER; + 8006806: 687b ldr r3, [r7, #4] + 8006808: 681b ldr r3, [r3, #0] + 800680a: 6a1b ldr r3, [r3, #32] + 800680c: 60fb str r3, [r7, #12] + + /* Set the encoder Mode */ + tmpsmcr |= sConfig->EncoderMode; + 800680e: 683b ldr r3, [r7, #0] + 8006810: 681b ldr r3, [r3, #0] + 8006812: 697a ldr r2, [r7, #20] + 8006814: 4313 orrs r3, r2 + 8006816: 617b str r3, [r7, #20] - // Copy truncated mantissa. - *val = ((uint32_t)(*(inbuffer++)) >> 5 & 0x07); - 8004630: 687b ldr r3, [r7, #4] - 8004632: 1c5a adds r2, r3, #1 - 8004634: 607a str r2, [r7, #4] - 8004636: 781b ldrb r3, [r3, #0] - 8004638: 095b lsrs r3, r3, #5 - 800463a: f003 0207 and.w r2, r3, #7 - 800463e: 68fb ldr r3, [r7, #12] - 8004640: 601a str r2, [r3, #0] - *val |= ((uint32_t)(*(inbuffer++)) & 0xff) << 3; - 8004642: 687b ldr r3, [r7, #4] - 8004644: 1c5a adds r2, r3, #1 - 8004646: 607a str r2, [r7, #4] - 8004648: 781b ldrb r3, [r3, #0] - 800464a: 00da lsls r2, r3, #3 - 800464c: 68fb ldr r3, [r7, #12] - 800464e: 681b ldr r3, [r3, #0] - 8004650: 431a orrs r2, r3 - 8004652: 68fb ldr r3, [r7, #12] - 8004654: 601a str r2, [r3, #0] - *val |= ((uint32_t)(*(inbuffer++)) & 0xff) << 11; - 8004656: 687b ldr r3, [r7, #4] - 8004658: 1c5a adds r2, r3, #1 - 800465a: 607a str r2, [r7, #4] - 800465c: 781b ldrb r3, [r3, #0] - 800465e: 02da lsls r2, r3, #11 - 8004660: 68fb ldr r3, [r7, #12] - 8004662: 681b ldr r3, [r3, #0] - 8004664: 431a orrs r2, r3 - 8004666: 68fb ldr r3, [r7, #12] - 8004668: 601a str r2, [r3, #0] - *val |= ((uint32_t)(*inbuffer) & 0x0f) << 19; - 800466a: 68fb ldr r3, [r7, #12] - 800466c: 681a ldr r2, [r3, #0] - 800466e: 687b ldr r3, [r7, #4] - 8004670: 781b ldrb r3, [r3, #0] - 8004672: 04db lsls r3, r3, #19 - 8004674: f403 03f0 and.w r3, r3, #7864320 ; 0x780000 - 8004678: 431a orrs r2, r3 - 800467a: 68fb ldr r3, [r7, #12] - 800467c: 601a str r2, [r3, #0] + /* Select the Capture Compare 1 and the Capture Compare 2 as input */ + tmpccmr1 &= ~(TIM_CCMR1_CC1S | TIM_CCMR1_CC2S); + 8006818: 693a ldr r2, [r7, #16] + 800681a: 4b27 ldr r3, [pc, #156] ; (80068b8 ) + 800681c: 4013 ands r3, r2 + 800681e: 613b str r3, [r7, #16] + tmpccmr1 |= (sConfig->IC1Selection | (sConfig->IC2Selection << 8U)); + 8006820: 683b ldr r3, [r7, #0] + 8006822: 689a ldr r2, [r3, #8] + 8006824: 683b ldr r3, [r7, #0] + 8006826: 699b ldr r3, [r3, #24] + 8006828: 021b lsls r3, r3, #8 + 800682a: 4313 orrs r3, r2 + 800682c: 693a ldr r2, [r7, #16] + 800682e: 4313 orrs r3, r2 + 8006830: 613b str r3, [r7, #16] - // Copy truncated exponent. - uint32_t exp = ((uint32_t)(*(inbuffer++)) & 0xf0) >> 4; - 800467e: 687b ldr r3, [r7, #4] - 8004680: 1c5a adds r2, r3, #1 - 8004682: 607a str r2, [r7, #4] - 8004684: 781b ldrb r3, [r3, #0] - 8004686: 091b lsrs r3, r3, #4 - 8004688: f003 030f and.w r3, r3, #15 - 800468c: 60bb str r3, [r7, #8] - exp |= ((uint32_t)(*inbuffer) & 0x7f) << 4; - 800468e: 687b ldr r3, [r7, #4] - 8004690: 781b ldrb r3, [r3, #0] - 8004692: 011b lsls r3, r3, #4 - 8004694: f403 62fe and.w r2, r3, #2032 ; 0x7f0 - 8004698: 68bb ldr r3, [r7, #8] - 800469a: 4313 orrs r3, r2 - 800469c: 60bb str r3, [r7, #8] - if (exp != 0) - 800469e: 68bb ldr r3, [r7, #8] - 80046a0: 2b00 cmp r3, #0 - 80046a2: d008 beq.n 80046b6 <_ZN3ros3Msg21deserializeAvrFloat64EPKhPf+0x9a> - { - *val |= ((exp) - 1023 + 127) << 23; - 80046a4: 68fb ldr r3, [r7, #12] - 80046a6: 681a ldr r2, [r3, #0] - 80046a8: 68bb ldr r3, [r7, #8] - 80046aa: f5a3 7360 sub.w r3, r3, #896 ; 0x380 - 80046ae: 05db lsls r3, r3, #23 - 80046b0: 431a orrs r2, r3 - 80046b2: 68fb ldr r3, [r7, #12] - 80046b4: 601a str r2, [r3, #0] - } + /* Set the Capture Compare 1 and the Capture Compare 2 prescalers and filters */ + tmpccmr1 &= ~(TIM_CCMR1_IC1PSC | TIM_CCMR1_IC2PSC); + 8006832: 693a ldr r2, [r7, #16] + 8006834: 4b21 ldr r3, [pc, #132] ; (80068bc ) + 8006836: 4013 ands r3, r2 + 8006838: 613b str r3, [r7, #16] + tmpccmr1 &= ~(TIM_CCMR1_IC1F | TIM_CCMR1_IC2F); + 800683a: 693a ldr r2, [r7, #16] + 800683c: 4b20 ldr r3, [pc, #128] ; (80068c0 ) + 800683e: 4013 ands r3, r2 + 8006840: 613b str r3, [r7, #16] + tmpccmr1 |= sConfig->IC1Prescaler | (sConfig->IC2Prescaler << 8U); + 8006842: 683b ldr r3, [r7, #0] + 8006844: 68da ldr r2, [r3, #12] + 8006846: 683b ldr r3, [r7, #0] + 8006848: 69db ldr r3, [r3, #28] + 800684a: 021b lsls r3, r3, #8 + 800684c: 4313 orrs r3, r2 + 800684e: 693a ldr r2, [r7, #16] + 8006850: 4313 orrs r3, r2 + 8006852: 613b str r3, [r7, #16] + tmpccmr1 |= (sConfig->IC1Filter << 4U) | (sConfig->IC2Filter << 12U); + 8006854: 683b ldr r3, [r7, #0] + 8006856: 691b ldr r3, [r3, #16] + 8006858: 011a lsls r2, r3, #4 + 800685a: 683b ldr r3, [r7, #0] + 800685c: 6a1b ldr r3, [r3, #32] + 800685e: 031b lsls r3, r3, #12 + 8006860: 4313 orrs r3, r2 + 8006862: 693a ldr r2, [r7, #16] + 8006864: 4313 orrs r3, r2 + 8006866: 613b str r3, [r7, #16] - // Copy negative sign. - *val |= ((uint32_t)(*(inbuffer++)) & 0x80) << 24; - 80046b6: 687b ldr r3, [r7, #4] - 80046b8: 1c5a adds r2, r3, #1 - 80046ba: 607a str r2, [r7, #4] - 80046bc: 781b ldrb r3, [r3, #0] - 80046be: 061b lsls r3, r3, #24 - 80046c0: f003 4200 and.w r2, r3, #2147483648 ; 0x80000000 - 80046c4: 68fb ldr r3, [r7, #12] - 80046c6: 681b ldr r3, [r3, #0] - 80046c8: 431a orrs r2, r3 - 80046ca: 68fb ldr r3, [r7, #12] - 80046cc: 601a str r2, [r3, #0] + /* Set the TI1 and the TI2 Polarities */ + tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC2P); + 8006868: 68fb ldr r3, [r7, #12] + 800686a: f023 0322 bic.w r3, r3, #34 ; 0x22 + 800686e: 60fb str r3, [r7, #12] + tmpccer &= ~(TIM_CCER_CC1NP | TIM_CCER_CC2NP); + 8006870: 68fb ldr r3, [r7, #12] + 8006872: f023 0388 bic.w r3, r3, #136 ; 0x88 + 8006876: 60fb str r3, [r7, #12] + tmpccer |= sConfig->IC1Polarity | (sConfig->IC2Polarity << 4U); + 8006878: 683b ldr r3, [r7, #0] + 800687a: 685a ldr r2, [r3, #4] + 800687c: 683b ldr r3, [r7, #0] + 800687e: 695b ldr r3, [r3, #20] + 8006880: 011b lsls r3, r3, #4 + 8006882: 4313 orrs r3, r2 + 8006884: 68fa ldr r2, [r7, #12] + 8006886: 4313 orrs r3, r2 + 8006888: 60fb str r3, [r7, #12] - return 8; - 80046ce: 2308 movs r3, #8 - } - 80046d0: 4618 mov r0, r3 - 80046d2: 3714 adds r7, #20 - 80046d4: 46bd mov sp, r7 - 80046d6: f85d 7b04 ldr.w r7, [sp], #4 - 80046da: 4770 bx lr + /* Write to TIMx SMCR */ + htim->Instance->SMCR = tmpsmcr; + 800688a: 687b ldr r3, [r7, #4] + 800688c: 681b ldr r3, [r3, #0] + 800688e: 697a ldr r2, [r7, #20] + 8006890: 609a str r2, [r3, #8] -080046dc <_ZN3ros4TimeC1Ev>: -class Time -{ -public: - uint32_t sec, nsec; + /* Write to TIMx CCMR1 */ + htim->Instance->CCMR1 = tmpccmr1; + 8006892: 687b ldr r3, [r7, #4] + 8006894: 681b ldr r3, [r3, #0] + 8006896: 693a ldr r2, [r7, #16] + 8006898: 619a str r2, [r3, #24] - Time() : sec(0), nsec(0) {} - 80046dc: b480 push {r7} - 80046de: b083 sub sp, #12 - 80046e0: af00 add r7, sp, #0 - 80046e2: 6078 str r0, [r7, #4] - 80046e4: 687b ldr r3, [r7, #4] - 80046e6: 2200 movs r2, #0 - 80046e8: 601a str r2, [r3, #0] - 80046ea: 687b ldr r3, [r7, #4] - 80046ec: 2200 movs r2, #0 - 80046ee: 605a str r2, [r3, #4] - 80046f0: 687b ldr r3, [r7, #4] - 80046f2: 4618 mov r0, r3 - 80046f4: 370c adds r7, #12 - 80046f6: 46bd mov sp, r7 - 80046f8: f85d 7b04 ldr.w r7, [sp], #4 - 80046fc: 4770 bx lr - ... + /* Write to TIMx CCER */ + htim->Instance->CCER = tmpccer; + 800689a: 687b ldr r3, [r7, #4] + 800689c: 681b ldr r3, [r3, #0] + 800689e: 68fa ldr r2, [r7, #12] + 80068a0: 621a str r2, [r3, #32] -08004700 <_ZN3ros3MsgC1Ev>: -class Msg - 8004700: b480 push {r7} - 8004702: b083 sub sp, #12 - 8004704: af00 add r7, sp, #0 - 8004706: 6078 str r0, [r7, #4] - 8004708: 4a04 ldr r2, [pc, #16] ; (800471c <_ZN3ros3MsgC1Ev+0x1c>) - 800470a: 687b ldr r3, [r7, #4] - 800470c: 601a str r2, [r3, #0] - 800470e: 687b ldr r3, [r7, #4] - 8004710: 4618 mov r0, r3 - 8004712: 370c adds r7, #12 - 8004714: 46bd mov sp, r7 - 8004716: f85d 7b04 ldr.w r7, [sp], #4 - 800471a: 4770 bx lr - 800471c: 0800a5b8 .word 0x0800a5b8 - -08004720 <_ZN8std_msgs6HeaderC1Ev>: - typedef ros::Time _stamp_type; - _stamp_type stamp; - typedef const char* _frame_id_type; - _frame_id_type frame_id; + /* Initialize the TIM state*/ + htim->State = HAL_TIM_STATE_READY; + 80068a2: 687b ldr r3, [r7, #4] + 80068a4: 2201 movs r2, #1 + 80068a6: f883 203d strb.w r2, [r3, #61] ; 0x3d - Header(): - 8004720: b580 push {r7, lr} - 8004722: b082 sub sp, #8 - 8004724: af00 add r7, sp, #0 - 8004726: 6078 str r0, [r7, #4] - seq(0), - stamp(), - frame_id("") - 8004728: 687b ldr r3, [r7, #4] - 800472a: 4618 mov r0, r3 - 800472c: f7ff ffe8 bl 8004700 <_ZN3ros3MsgC1Ev> - 8004730: 4a09 ldr r2, [pc, #36] ; (8004758 <_ZN8std_msgs6HeaderC1Ev+0x38>) - 8004732: 687b ldr r3, [r7, #4] - 8004734: 601a str r2, [r3, #0] - 8004736: 687b ldr r3, [r7, #4] - 8004738: 2200 movs r2, #0 - 800473a: 605a str r2, [r3, #4] - 800473c: 687b ldr r3, [r7, #4] - 800473e: 3308 adds r3, #8 - 8004740: 4618 mov r0, r3 - 8004742: f7ff ffcb bl 80046dc <_ZN3ros4TimeC1Ev> - 8004746: 687b ldr r3, [r7, #4] - 8004748: 4a04 ldr r2, [pc, #16] ; (800475c <_ZN8std_msgs6HeaderC1Ev+0x3c>) - 800474a: 611a str r2, [r3, #16] + return HAL_OK; + 80068aa: 2300 movs r3, #0 +} + 80068ac: 4618 mov r0, r3 + 80068ae: 3718 adds r7, #24 + 80068b0: 46bd mov sp, r7 + 80068b2: bd80 pop {r7, pc} + 80068b4: fffebff8 .word 0xfffebff8 + 80068b8: fffffcfc .word 0xfffffcfc + 80068bc: fffff3f3 .word 0xfffff3f3 + 80068c0: ffff0f0f .word 0xffff0f0f + +080068c4 : + * @arg TIM_CHANNEL_2: TIM Channel 2 selected + * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected + * @retval HAL status + */ +HAL_StatusTypeDef HAL_TIM_Encoder_Start(TIM_HandleTypeDef *htim, uint32_t Channel) +{ + 80068c4: b580 push {r7, lr} + 80068c6: b082 sub sp, #8 + 80068c8: af00 add r7, sp, #0 + 80068ca: 6078 str r0, [r7, #4] + 80068cc: 6039 str r1, [r7, #0] + /* Check the parameters */ + assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); + + /* Enable the encoder interface channels */ + switch (Channel) + 80068ce: 683b ldr r3, [r7, #0] + 80068d0: 2b00 cmp r3, #0 + 80068d2: d002 beq.n 80068da + 80068d4: 2b04 cmp r3, #4 + 80068d6: d008 beq.n 80068ea + 80068d8: e00f b.n 80068fa + { + case TIM_CHANNEL_1: { + TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); + 80068da: 687b ldr r3, [r7, #4] + 80068dc: 681b ldr r3, [r3, #0] + 80068de: 2201 movs r2, #1 + 80068e0: 2100 movs r1, #0 + 80068e2: 4618 mov r0, r3 + 80068e4: f000 fed6 bl 8007694 + break; + 80068e8: e016 b.n 8006918 } - 800474c: 687b ldr r3, [r7, #4] - 800474e: 4618 mov r0, r3 - 8004750: 3708 adds r7, #8 - 8004752: 46bd mov sp, r7 - 8004754: bd80 pop {r7, pc} - 8004756: bf00 nop - 8004758: 0800a5a0 .word 0x0800a5a0 - 800475c: 0800a0c0 .word 0x0800a0c0 - -08004760 <_ZNK8std_msgs6Header9serializeEPh>: - virtual int serialize(unsigned char *outbuffer) const - 8004760: b580 push {r7, lr} - 8004762: b084 sub sp, #16 - 8004764: af00 add r7, sp, #0 - 8004766: 6078 str r0, [r7, #4] - 8004768: 6039 str r1, [r7, #0] + case TIM_CHANNEL_2: { - int offset = 0; - 800476a: 2300 movs r3, #0 - 800476c: 60fb str r3, [r7, #12] - *(outbuffer + offset + 0) = (this->seq >> (8 * 0)) & 0xFF; - 800476e: 687b ldr r3, [r7, #4] - 8004770: 6859 ldr r1, [r3, #4] - 8004772: 68fb ldr r3, [r7, #12] - 8004774: 683a ldr r2, [r7, #0] - 8004776: 4413 add r3, r2 - 8004778: b2ca uxtb r2, r1 - 800477a: 701a strb r2, [r3, #0] - *(outbuffer + offset + 1) = (this->seq >> (8 * 1)) & 0xFF; - 800477c: 687b ldr r3, [r7, #4] - 800477e: 685b ldr r3, [r3, #4] - 8004780: 0a19 lsrs r1, r3, #8 - 8004782: 68fb ldr r3, [r7, #12] - 8004784: 3301 adds r3, #1 - 8004786: 683a ldr r2, [r7, #0] - 8004788: 4413 add r3, r2 - 800478a: b2ca uxtb r2, r1 - 800478c: 701a strb r2, [r3, #0] - *(outbuffer + offset + 2) = (this->seq >> (8 * 2)) & 0xFF; - 800478e: 687b ldr r3, [r7, #4] - 8004790: 685b ldr r3, [r3, #4] - 8004792: 0c19 lsrs r1, r3, #16 - 8004794: 68fb ldr r3, [r7, #12] - 8004796: 3302 adds r3, #2 - 8004798: 683a ldr r2, [r7, #0] - 800479a: 4413 add r3, r2 - 800479c: b2ca uxtb r2, r1 - 800479e: 701a strb r2, [r3, #0] - *(outbuffer + offset + 3) = (this->seq >> (8 * 3)) & 0xFF; - 80047a0: 687b ldr r3, [r7, #4] - 80047a2: 685b ldr r3, [r3, #4] - 80047a4: 0e19 lsrs r1, r3, #24 - 80047a6: 68fb ldr r3, [r7, #12] - 80047a8: 3303 adds r3, #3 - 80047aa: 683a ldr r2, [r7, #0] - 80047ac: 4413 add r3, r2 - 80047ae: b2ca uxtb r2, r1 - 80047b0: 701a strb r2, [r3, #0] - offset += sizeof(this->seq); - 80047b2: 68fb ldr r3, [r7, #12] - 80047b4: 3304 adds r3, #4 - 80047b6: 60fb str r3, [r7, #12] - *(outbuffer + offset + 0) = (this->stamp.sec >> (8 * 0)) & 0xFF; - 80047b8: 687b ldr r3, [r7, #4] - 80047ba: 6899 ldr r1, [r3, #8] - 80047bc: 68fb ldr r3, [r7, #12] - 80047be: 683a ldr r2, [r7, #0] - 80047c0: 4413 add r3, r2 - 80047c2: b2ca uxtb r2, r1 - 80047c4: 701a strb r2, [r3, #0] - *(outbuffer + offset + 1) = (this->stamp.sec >> (8 * 1)) & 0xFF; - 80047c6: 687b ldr r3, [r7, #4] - 80047c8: 689b ldr r3, [r3, #8] - 80047ca: 0a19 lsrs r1, r3, #8 - 80047cc: 68fb ldr r3, [r7, #12] - 80047ce: 3301 adds r3, #1 - 80047d0: 683a ldr r2, [r7, #0] - 80047d2: 4413 add r3, r2 - 80047d4: b2ca uxtb r2, r1 - 80047d6: 701a strb r2, [r3, #0] - *(outbuffer + offset + 2) = (this->stamp.sec >> (8 * 2)) & 0xFF; - 80047d8: 687b ldr r3, [r7, #4] - 80047da: 689b ldr r3, [r3, #8] - 80047dc: 0c19 lsrs r1, r3, #16 - 80047de: 68fb ldr r3, [r7, #12] - 80047e0: 3302 adds r3, #2 - 80047e2: 683a ldr r2, [r7, #0] - 80047e4: 4413 add r3, r2 - 80047e6: b2ca uxtb r2, r1 - 80047e8: 701a strb r2, [r3, #0] - *(outbuffer + offset + 3) = (this->stamp.sec >> (8 * 3)) & 0xFF; - 80047ea: 687b ldr r3, [r7, #4] - 80047ec: 689b ldr r3, [r3, #8] - 80047ee: 0e19 lsrs r1, r3, #24 - 80047f0: 68fb ldr r3, [r7, #12] - 80047f2: 3303 adds r3, #3 - 80047f4: 683a ldr r2, [r7, #0] - 80047f6: 4413 add r3, r2 - 80047f8: b2ca uxtb r2, r1 - 80047fa: 701a strb r2, [r3, #0] - offset += sizeof(this->stamp.sec); - 80047fc: 68fb ldr r3, [r7, #12] - 80047fe: 3304 adds r3, #4 - 8004800: 60fb str r3, [r7, #12] - *(outbuffer + offset + 0) = (this->stamp.nsec >> (8 * 0)) & 0xFF; - 8004802: 687b ldr r3, [r7, #4] - 8004804: 68d9 ldr r1, [r3, #12] - 8004806: 68fb ldr r3, [r7, #12] - 8004808: 683a ldr r2, [r7, #0] - 800480a: 4413 add r3, r2 - 800480c: b2ca uxtb r2, r1 - 800480e: 701a strb r2, [r3, #0] - *(outbuffer + offset + 1) = (this->stamp.nsec >> (8 * 1)) & 0xFF; - 8004810: 687b ldr r3, [r7, #4] - 8004812: 68db ldr r3, [r3, #12] - 8004814: 0a19 lsrs r1, r3, #8 - 8004816: 68fb ldr r3, [r7, #12] - 8004818: 3301 adds r3, #1 - 800481a: 683a ldr r2, [r7, #0] - 800481c: 4413 add r3, r2 - 800481e: b2ca uxtb r2, r1 - 8004820: 701a strb r2, [r3, #0] - *(outbuffer + offset + 2) = (this->stamp.nsec >> (8 * 2)) & 0xFF; - 8004822: 687b ldr r3, [r7, #4] - 8004824: 68db ldr r3, [r3, #12] - 8004826: 0c19 lsrs r1, r3, #16 - 8004828: 68fb ldr r3, [r7, #12] - 800482a: 3302 adds r3, #2 - 800482c: 683a ldr r2, [r7, #0] - 800482e: 4413 add r3, r2 - 8004830: b2ca uxtb r2, r1 - 8004832: 701a strb r2, [r3, #0] - *(outbuffer + offset + 3) = (this->stamp.nsec >> (8 * 3)) & 0xFF; - 8004834: 687b ldr r3, [r7, #4] - 8004836: 68db ldr r3, [r3, #12] - 8004838: 0e19 lsrs r1, r3, #24 - 800483a: 68fb ldr r3, [r7, #12] - 800483c: 3303 adds r3, #3 - 800483e: 683a ldr r2, [r7, #0] - 8004840: 4413 add r3, r2 - 8004842: b2ca uxtb r2, r1 - 8004844: 701a strb r2, [r3, #0] - offset += sizeof(this->stamp.nsec); - 8004846: 68fb ldr r3, [r7, #12] - 8004848: 3304 adds r3, #4 - 800484a: 60fb str r3, [r7, #12] - uint32_t length_frame_id = strlen(this->frame_id); - 800484c: 687b ldr r3, [r7, #4] - 800484e: 691b ldr r3, [r3, #16] - 8004850: 4618 mov r0, r3 - 8004852: f7fb fcf1 bl 8000238 - 8004856: 60b8 str r0, [r7, #8] - varToArr(outbuffer + offset, length_frame_id); - 8004858: 68fb ldr r3, [r7, #12] - 800485a: 683a ldr r2, [r7, #0] - 800485c: 4413 add r3, r2 - 800485e: 68b9 ldr r1, [r7, #8] - 8004860: 4618 mov r0, r3 - 8004862: f002 fbf4 bl 800704e <_ZN3ros3Msg8varToArrIPhmEEvT_T0_> - offset += 4; - 8004866: 68fb ldr r3, [r7, #12] - 8004868: 3304 adds r3, #4 - 800486a: 60fb str r3, [r7, #12] - memcpy(outbuffer + offset, this->frame_id, length_frame_id); - 800486c: 68fb ldr r3, [r7, #12] - 800486e: 683a ldr r2, [r7, #0] - 8004870: 18d0 adds r0, r2, r3 - 8004872: 687b ldr r3, [r7, #4] - 8004874: 691b ldr r3, [r3, #16] - 8004876: 68ba ldr r2, [r7, #8] - 8004878: 4619 mov r1, r3 - 800487a: f005 facd bl 8009e18 - offset += length_frame_id; - 800487e: 68fa ldr r2, [r7, #12] - 8004880: 68bb ldr r3, [r7, #8] - 8004882: 4413 add r3, r2 - 8004884: 60fb str r3, [r7, #12] - return offset; - 8004886: 68fb ldr r3, [r7, #12] + TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); + 80068ea: 687b ldr r3, [r7, #4] + 80068ec: 681b ldr r3, [r3, #0] + 80068ee: 2201 movs r2, #1 + 80068f0: 2104 movs r1, #4 + 80068f2: 4618 mov r0, r3 + 80068f4: f000 fece bl 8007694 + break; + 80068f8: e00e b.n 8006918 } - 8004888: 4618 mov r0, r3 - 800488a: 3710 adds r7, #16 - 800488c: 46bd mov sp, r7 - 800488e: bd80 pop {r7, pc} -08004890 <_ZN8std_msgs6Header11deserializeEPh>: - - virtual int deserialize(unsigned char *inbuffer) - 8004890: b580 push {r7, lr} - 8004892: b086 sub sp, #24 - 8004894: af00 add r7, sp, #0 - 8004896: 6078 str r0, [r7, #4] - 8004898: 6039 str r1, [r7, #0] + default : { - int offset = 0; - 800489a: 2300 movs r3, #0 - 800489c: 613b str r3, [r7, #16] - this->seq = ((uint32_t) (*(inbuffer + offset))); - 800489e: 693b ldr r3, [r7, #16] - 80048a0: 683a ldr r2, [r7, #0] - 80048a2: 4413 add r3, r2 - 80048a4: 781b ldrb r3, [r3, #0] - 80048a6: 461a mov r2, r3 - 80048a8: 687b ldr r3, [r7, #4] - 80048aa: 605a str r2, [r3, #4] - this->seq |= ((uint32_t) (*(inbuffer + offset + 1))) << (8 * 1); - 80048ac: 687b ldr r3, [r7, #4] - 80048ae: 685a ldr r2, [r3, #4] - 80048b0: 693b ldr r3, [r7, #16] - 80048b2: 3301 adds r3, #1 - 80048b4: 6839 ldr r1, [r7, #0] - 80048b6: 440b add r3, r1 - 80048b8: 781b ldrb r3, [r3, #0] - 80048ba: 021b lsls r3, r3, #8 - 80048bc: 431a orrs r2, r3 - 80048be: 687b ldr r3, [r7, #4] - 80048c0: 605a str r2, [r3, #4] - this->seq |= ((uint32_t) (*(inbuffer + offset + 2))) << (8 * 2); - 80048c2: 687b ldr r3, [r7, #4] - 80048c4: 685a ldr r2, [r3, #4] - 80048c6: 693b ldr r3, [r7, #16] - 80048c8: 3302 adds r3, #2 - 80048ca: 6839 ldr r1, [r7, #0] - 80048cc: 440b add r3, r1 - 80048ce: 781b ldrb r3, [r3, #0] - 80048d0: 041b lsls r3, r3, #16 - 80048d2: 431a orrs r2, r3 - 80048d4: 687b ldr r3, [r7, #4] - 80048d6: 605a str r2, [r3, #4] - this->seq |= ((uint32_t) (*(inbuffer + offset + 3))) << (8 * 3); - 80048d8: 687b ldr r3, [r7, #4] - 80048da: 685a ldr r2, [r3, #4] - 80048dc: 693b ldr r3, [r7, #16] - 80048de: 3303 adds r3, #3 - 80048e0: 6839 ldr r1, [r7, #0] - 80048e2: 440b add r3, r1 - 80048e4: 781b ldrb r3, [r3, #0] - 80048e6: 061b lsls r3, r3, #24 - 80048e8: 431a orrs r2, r3 - 80048ea: 687b ldr r3, [r7, #4] - 80048ec: 605a str r2, [r3, #4] - offset += sizeof(this->seq); - 80048ee: 693b ldr r3, [r7, #16] - 80048f0: 3304 adds r3, #4 - 80048f2: 613b str r3, [r7, #16] - this->stamp.sec = ((uint32_t) (*(inbuffer + offset))); - 80048f4: 693b ldr r3, [r7, #16] - 80048f6: 683a ldr r2, [r7, #0] - 80048f8: 4413 add r3, r2 - 80048fa: 781b ldrb r3, [r3, #0] - 80048fc: 461a mov r2, r3 - 80048fe: 687b ldr r3, [r7, #4] - 8004900: 609a str r2, [r3, #8] - this->stamp.sec |= ((uint32_t) (*(inbuffer + offset + 1))) << (8 * 1); - 8004902: 687b ldr r3, [r7, #4] - 8004904: 689a ldr r2, [r3, #8] - 8004906: 693b ldr r3, [r7, #16] - 8004908: 3301 adds r3, #1 - 800490a: 6839 ldr r1, [r7, #0] - 800490c: 440b add r3, r1 - 800490e: 781b ldrb r3, [r3, #0] - 8004910: 021b lsls r3, r3, #8 - 8004912: 431a orrs r2, r3 - 8004914: 687b ldr r3, [r7, #4] - 8004916: 609a str r2, [r3, #8] - this->stamp.sec |= ((uint32_t) (*(inbuffer + offset + 2))) << (8 * 2); - 8004918: 687b ldr r3, [r7, #4] - 800491a: 689a ldr r2, [r3, #8] - 800491c: 693b ldr r3, [r7, #16] - 800491e: 3302 adds r3, #2 - 8004920: 6839 ldr r1, [r7, #0] - 8004922: 440b add r3, r1 - 8004924: 781b ldrb r3, [r3, #0] - 8004926: 041b lsls r3, r3, #16 - 8004928: 431a orrs r2, r3 - 800492a: 687b ldr r3, [r7, #4] - 800492c: 609a str r2, [r3, #8] - this->stamp.sec |= ((uint32_t) (*(inbuffer + offset + 3))) << (8 * 3); - 800492e: 687b ldr r3, [r7, #4] - 8004930: 689a ldr r2, [r3, #8] - 8004932: 693b ldr r3, [r7, #16] - 8004934: 3303 adds r3, #3 - 8004936: 6839 ldr r1, [r7, #0] - 8004938: 440b add r3, r1 - 800493a: 781b ldrb r3, [r3, #0] - 800493c: 061b lsls r3, r3, #24 - 800493e: 431a orrs r2, r3 - 8004940: 687b ldr r3, [r7, #4] - 8004942: 609a str r2, [r3, #8] - offset += sizeof(this->stamp.sec); - 8004944: 693b ldr r3, [r7, #16] - 8004946: 3304 adds r3, #4 - 8004948: 613b str r3, [r7, #16] - this->stamp.nsec = ((uint32_t) (*(inbuffer + offset))); - 800494a: 693b ldr r3, [r7, #16] - 800494c: 683a ldr r2, [r7, #0] - 800494e: 4413 add r3, r2 - 8004950: 781b ldrb r3, [r3, #0] - 8004952: 461a mov r2, r3 - 8004954: 687b ldr r3, [r7, #4] - 8004956: 60da str r2, [r3, #12] - this->stamp.nsec |= ((uint32_t) (*(inbuffer + offset + 1))) << (8 * 1); - 8004958: 687b ldr r3, [r7, #4] - 800495a: 68da ldr r2, [r3, #12] - 800495c: 693b ldr r3, [r7, #16] - 800495e: 3301 adds r3, #1 - 8004960: 6839 ldr r1, [r7, #0] - 8004962: 440b add r3, r1 - 8004964: 781b ldrb r3, [r3, #0] - 8004966: 021b lsls r3, r3, #8 - 8004968: 431a orrs r2, r3 - 800496a: 687b ldr r3, [r7, #4] - 800496c: 60da str r2, [r3, #12] - this->stamp.nsec |= ((uint32_t) (*(inbuffer + offset + 2))) << (8 * 2); - 800496e: 687b ldr r3, [r7, #4] - 8004970: 68da ldr r2, [r3, #12] - 8004972: 693b ldr r3, [r7, #16] - 8004974: 3302 adds r3, #2 - 8004976: 6839 ldr r1, [r7, #0] - 8004978: 440b add r3, r1 - 800497a: 781b ldrb r3, [r3, #0] - 800497c: 041b lsls r3, r3, #16 - 800497e: 431a orrs r2, r3 - 8004980: 687b ldr r3, [r7, #4] - 8004982: 60da str r2, [r3, #12] - this->stamp.nsec |= ((uint32_t) (*(inbuffer + offset + 3))) << (8 * 3); - 8004984: 687b ldr r3, [r7, #4] - 8004986: 68da ldr r2, [r3, #12] - 8004988: 693b ldr r3, [r7, #16] - 800498a: 3303 adds r3, #3 - 800498c: 6839 ldr r1, [r7, #0] - 800498e: 440b add r3, r1 - 8004990: 781b ldrb r3, [r3, #0] - 8004992: 061b lsls r3, r3, #24 - 8004994: 431a orrs r2, r3 - 8004996: 687b ldr r3, [r7, #4] - 8004998: 60da str r2, [r3, #12] - offset += sizeof(this->stamp.nsec); - 800499a: 693b ldr r3, [r7, #16] - 800499c: 3304 adds r3, #4 - 800499e: 613b str r3, [r7, #16] - uint32_t length_frame_id; - arrToVar(length_frame_id, (inbuffer + offset)); - 80049a0: 693b ldr r3, [r7, #16] - 80049a2: 683a ldr r2, [r7, #0] - 80049a4: 441a add r2, r3 - 80049a6: f107 030c add.w r3, r7, #12 - 80049aa: 4611 mov r1, r2 - 80049ac: 4618 mov r0, r3 - 80049ae: f002 fb6c bl 800708a <_ZN3ros3Msg8arrToVarImPhEEvRT_T0_> - offset += 4; - 80049b2: 693b ldr r3, [r7, #16] - 80049b4: 3304 adds r3, #4 - 80049b6: 613b str r3, [r7, #16] - for(unsigned int k= offset; k< offset+length_frame_id; ++k){ - 80049b8: 693b ldr r3, [r7, #16] - 80049ba: 617b str r3, [r7, #20] - 80049bc: 693a ldr r2, [r7, #16] - 80049be: 68fb ldr r3, [r7, #12] - 80049c0: 4413 add r3, r2 - 80049c2: 697a ldr r2, [r7, #20] - 80049c4: 429a cmp r2, r3 - 80049c6: d20c bcs.n 80049e2 <_ZN8std_msgs6Header11deserializeEPh+0x152> - inbuffer[k-1]=inbuffer[k]; - 80049c8: 683a ldr r2, [r7, #0] - 80049ca: 697b ldr r3, [r7, #20] - 80049cc: 441a add r2, r3 - 80049ce: 697b ldr r3, [r7, #20] - 80049d0: 3b01 subs r3, #1 - 80049d2: 6839 ldr r1, [r7, #0] - 80049d4: 440b add r3, r1 - 80049d6: 7812 ldrb r2, [r2, #0] - 80049d8: 701a strb r2, [r3, #0] - for(unsigned int k= offset; k< offset+length_frame_id; ++k){ - 80049da: 697b ldr r3, [r7, #20] - 80049dc: 3301 adds r3, #1 - 80049de: 617b str r3, [r7, #20] - 80049e0: e7ec b.n 80049bc <_ZN8std_msgs6Header11deserializeEPh+0x12c> - } - inbuffer[offset+length_frame_id-1]=0; - 80049e2: 693a ldr r2, [r7, #16] - 80049e4: 68fb ldr r3, [r7, #12] - 80049e6: 4413 add r3, r2 - 80049e8: 3b01 subs r3, #1 - 80049ea: 683a ldr r2, [r7, #0] - 80049ec: 4413 add r3, r2 - 80049ee: 2200 movs r2, #0 - 80049f0: 701a strb r2, [r3, #0] - this->frame_id = (char *)(inbuffer + offset-1); - 80049f2: 693b ldr r3, [r7, #16] - 80049f4: 3b01 subs r3, #1 - 80049f6: 683a ldr r2, [r7, #0] - 80049f8: 441a add r2, r3 - 80049fa: 687b ldr r3, [r7, #4] - 80049fc: 611a str r2, [r3, #16] - offset += length_frame_id; - 80049fe: 693a ldr r2, [r7, #16] - 8004a00: 68fb ldr r3, [r7, #12] - 8004a02: 4413 add r3, r2 - 8004a04: 613b str r3, [r7, #16] - return offset; - 8004a06: 693b ldr r3, [r7, #16] + TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); + 80068fa: 687b ldr r3, [r7, #4] + 80068fc: 681b ldr r3, [r3, #0] + 80068fe: 2201 movs r2, #1 + 8006900: 2100 movs r1, #0 + 8006902: 4618 mov r0, r3 + 8006904: f000 fec6 bl 8007694 + TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); + 8006908: 687b ldr r3, [r7, #4] + 800690a: 681b ldr r3, [r3, #0] + 800690c: 2201 movs r2, #1 + 800690e: 2104 movs r1, #4 + 8006910: 4618 mov r0, r3 + 8006912: f000 febf bl 8007694 + break; + 8006916: bf00 nop } - 8004a08: 4618 mov r0, r3 - 8004a0a: 3718 adds r7, #24 - 8004a0c: 46bd mov sp, r7 - 8004a0e: bd80 pop {r7, pc} + } + /* Enable the Peripheral */ + __HAL_TIM_ENABLE(htim); + 8006918: 687b ldr r3, [r7, #4] + 800691a: 681b ldr r3, [r3, #0] + 800691c: 681a ldr r2, [r3, #0] + 800691e: 687b ldr r3, [r7, #4] + 8006920: 681b ldr r3, [r3, #0] + 8006922: f042 0201 orr.w r2, r2, #1 + 8006926: 601a str r2, [r3, #0] -08004a10 <_ZN8std_msgs6Header7getTypeEv>: + /* Return function status */ + return HAL_OK; + 8006928: 2300 movs r3, #0 +} + 800692a: 4618 mov r0, r3 + 800692c: 3708 adds r7, #8 + 800692e: 46bd mov sp, r7 + 8006930: bd80 pop {r7, pc} - const char * getType(){ return "std_msgs/Header"; }; - 8004a10: b480 push {r7} - 8004a12: b083 sub sp, #12 - 8004a14: af00 add r7, sp, #0 - 8004a16: 6078 str r0, [r7, #4] - 8004a18: 4b03 ldr r3, [pc, #12] ; (8004a28 <_ZN8std_msgs6Header7getTypeEv+0x18>) - 8004a1a: 4618 mov r0, r3 - 8004a1c: 370c adds r7, #12 - 8004a1e: 46bd mov sp, r7 - 8004a20: f85d 7b04 ldr.w r7, [sp], #4 - 8004a24: 4770 bx lr - 8004a26: bf00 nop - 8004a28: 0800a0c4 .word 0x0800a0c4 - -08004a2c <_ZN8std_msgs6Header6getMD5Ev>: - const char * getMD5(){ return "2176decaecbce78abc3b96ef049fabed"; }; - 8004a2c: b480 push {r7} - 8004a2e: b083 sub sp, #12 - 8004a30: af00 add r7, sp, #0 - 8004a32: 6078 str r0, [r7, #4] - 8004a34: 4b03 ldr r3, [pc, #12] ; (8004a44 <_ZN8std_msgs6Header6getMD5Ev+0x18>) - 8004a36: 4618 mov r0, r3 - 8004a38: 370c adds r7, #12 - 8004a3a: 46bd mov sp, r7 - 8004a3c: f85d 7b04 ldr.w r7, [sp], #4 - 8004a40: 4770 bx lr - 8004a42: bf00 nop - 8004a44: 0800a0d4 .word 0x0800a0d4 - -08004a48 <_ZN13geometry_msgs5PointC1Ev>: - typedef float _y_type; - _y_type y; - typedef float _z_type; - _z_type z; +08006932 : + * @brief This function handles TIM interrupts requests. + * @param htim TIM handle + * @retval None + */ +void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) +{ + 8006932: b580 push {r7, lr} + 8006934: b082 sub sp, #8 + 8006936: af00 add r7, sp, #0 + 8006938: 6078 str r0, [r7, #4] + /* Capture compare 1 event */ + if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) + 800693a: 687b ldr r3, [r7, #4] + 800693c: 681b ldr r3, [r3, #0] + 800693e: 691b ldr r3, [r3, #16] + 8006940: f003 0302 and.w r3, r3, #2 + 8006944: 2b02 cmp r3, #2 + 8006946: d122 bne.n 800698e + { + if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) != RESET) + 8006948: 687b ldr r3, [r7, #4] + 800694a: 681b ldr r3, [r3, #0] + 800694c: 68db ldr r3, [r3, #12] + 800694e: f003 0302 and.w r3, r3, #2 + 8006952: 2b02 cmp r3, #2 + 8006954: d11b bne.n 800698e + { + { + __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1); + 8006956: 687b ldr r3, [r7, #4] + 8006958: 681b ldr r3, [r3, #0] + 800695a: f06f 0202 mvn.w r2, #2 + 800695e: 611a str r2, [r3, #16] + htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; + 8006960: 687b ldr r3, [r7, #4] + 8006962: 2201 movs r2, #1 + 8006964: 771a strb r2, [r3, #28] - Point(): - 8004a48: b580 push {r7, lr} - 8004a4a: b082 sub sp, #8 - 8004a4c: af00 add r7, sp, #0 - 8004a4e: 6078 str r0, [r7, #4] - x(0), - y(0), - z(0) - 8004a50: 687b ldr r3, [r7, #4] - 8004a52: 4618 mov r0, r3 - 8004a54: f7ff fe54 bl 8004700 <_ZN3ros3MsgC1Ev> - 8004a58: 4a09 ldr r2, [pc, #36] ; (8004a80 <_ZN13geometry_msgs5PointC1Ev+0x38>) - 8004a5a: 687b ldr r3, [r7, #4] - 8004a5c: 601a str r2, [r3, #0] - 8004a5e: 687b ldr r3, [r7, #4] - 8004a60: f04f 0200 mov.w r2, #0 - 8004a64: 605a str r2, [r3, #4] - 8004a66: 687b ldr r3, [r7, #4] - 8004a68: f04f 0200 mov.w r2, #0 - 8004a6c: 609a str r2, [r3, #8] - 8004a6e: 687b ldr r3, [r7, #4] - 8004a70: f04f 0200 mov.w r2, #0 - 8004a74: 60da str r2, [r3, #12] + /* Input capture event */ + if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) + 8006966: 687b ldr r3, [r7, #4] + 8006968: 681b ldr r3, [r3, #0] + 800696a: 699b ldr r3, [r3, #24] + 800696c: f003 0303 and.w r3, r3, #3 + 8006970: 2b00 cmp r3, #0 + 8006972: d003 beq.n 800697c + { +#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + htim->IC_CaptureCallback(htim); +#else + HAL_TIM_IC_CaptureCallback(htim); + 8006974: 6878 ldr r0, [r7, #4] + 8006976: f000 fad7 bl 8006f28 + 800697a: e005 b.n 8006988 + { +#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + htim->OC_DelayElapsedCallback(htim); + htim->PWM_PulseFinishedCallback(htim); +#else + HAL_TIM_OC_DelayElapsedCallback(htim); + 800697c: 6878 ldr r0, [r7, #4] + 800697e: f000 fac9 bl 8006f14 + HAL_TIM_PWM_PulseFinishedCallback(htim); + 8006982: 6878 ldr r0, [r7, #4] + 8006984: f000 fada bl 8006f3c +#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + } + htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; + 8006988: 687b ldr r3, [r7, #4] + 800698a: 2200 movs r2, #0 + 800698c: 771a strb r2, [r3, #28] + } + } + } + /* Capture compare 2 event */ + if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET) + 800698e: 687b ldr r3, [r7, #4] + 8006990: 681b ldr r3, [r3, #0] + 8006992: 691b ldr r3, [r3, #16] + 8006994: f003 0304 and.w r3, r3, #4 + 8006998: 2b04 cmp r3, #4 + 800699a: d122 bne.n 80069e2 + { + if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) != RESET) + 800699c: 687b ldr r3, [r7, #4] + 800699e: 681b ldr r3, [r3, #0] + 80069a0: 68db ldr r3, [r3, #12] + 80069a2: f003 0304 and.w r3, r3, #4 + 80069a6: 2b04 cmp r3, #4 + 80069a8: d11b bne.n 80069e2 { + __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2); + 80069aa: 687b ldr r3, [r7, #4] + 80069ac: 681b ldr r3, [r3, #0] + 80069ae: f06f 0204 mvn.w r2, #4 + 80069b2: 611a str r2, [r3, #16] + htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; + 80069b4: 687b ldr r3, [r7, #4] + 80069b6: 2202 movs r2, #2 + 80069b8: 771a strb r2, [r3, #28] + /* Input capture event */ + if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) + 80069ba: 687b ldr r3, [r7, #4] + 80069bc: 681b ldr r3, [r3, #0] + 80069be: 699b ldr r3, [r3, #24] + 80069c0: f403 7340 and.w r3, r3, #768 ; 0x300 + 80069c4: 2b00 cmp r3, #0 + 80069c6: d003 beq.n 80069d0 + { +#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + htim->IC_CaptureCallback(htim); +#else + HAL_TIM_IC_CaptureCallback(htim); + 80069c8: 6878 ldr r0, [r7, #4] + 80069ca: f000 faad bl 8006f28 + 80069ce: e005 b.n 80069dc + { +#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + htim->OC_DelayElapsedCallback(htim); + htim->PWM_PulseFinishedCallback(htim); +#else + HAL_TIM_OC_DelayElapsedCallback(htim); + 80069d0: 6878 ldr r0, [r7, #4] + 80069d2: f000 fa9f bl 8006f14 + HAL_TIM_PWM_PulseFinishedCallback(htim); + 80069d6: 6878 ldr r0, [r7, #4] + 80069d8: f000 fab0 bl 8006f3c +#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + } + htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; + 80069dc: 687b ldr r3, [r7, #4] + 80069de: 2200 movs r2, #0 + 80069e0: 771a strb r2, [r3, #28] + } + } + /* Capture compare 3 event */ + if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET) + 80069e2: 687b ldr r3, [r7, #4] + 80069e4: 681b ldr r3, [r3, #0] + 80069e6: 691b ldr r3, [r3, #16] + 80069e8: f003 0308 and.w r3, r3, #8 + 80069ec: 2b08 cmp r3, #8 + 80069ee: d122 bne.n 8006a36 + { + if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) != RESET) + 80069f0: 687b ldr r3, [r7, #4] + 80069f2: 681b ldr r3, [r3, #0] + 80069f4: 68db ldr r3, [r3, #12] + 80069f6: f003 0308 and.w r3, r3, #8 + 80069fa: 2b08 cmp r3, #8 + 80069fc: d11b bne.n 8006a36 + { + __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3); + 80069fe: 687b ldr r3, [r7, #4] + 8006a00: 681b ldr r3, [r3, #0] + 8006a02: f06f 0208 mvn.w r2, #8 + 8006a06: 611a str r2, [r3, #16] + htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; + 8006a08: 687b ldr r3, [r7, #4] + 8006a0a: 2204 movs r2, #4 + 8006a0c: 771a strb r2, [r3, #28] + /* Input capture event */ + if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) + 8006a0e: 687b ldr r3, [r7, #4] + 8006a10: 681b ldr r3, [r3, #0] + 8006a12: 69db ldr r3, [r3, #28] + 8006a14: f003 0303 and.w r3, r3, #3 + 8006a18: 2b00 cmp r3, #0 + 8006a1a: d003 beq.n 8006a24 + { +#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + htim->IC_CaptureCallback(htim); +#else + HAL_TIM_IC_CaptureCallback(htim); + 8006a1c: 6878 ldr r0, [r7, #4] + 8006a1e: f000 fa83 bl 8006f28 + 8006a22: e005 b.n 8006a30 + { +#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + htim->OC_DelayElapsedCallback(htim); + htim->PWM_PulseFinishedCallback(htim); +#else + HAL_TIM_OC_DelayElapsedCallback(htim); + 8006a24: 6878 ldr r0, [r7, #4] + 8006a26: f000 fa75 bl 8006f14 + HAL_TIM_PWM_PulseFinishedCallback(htim); + 8006a2a: 6878 ldr r0, [r7, #4] + 8006a2c: f000 fa86 bl 8006f3c +#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + } + htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; + 8006a30: 687b ldr r3, [r7, #4] + 8006a32: 2200 movs r2, #0 + 8006a34: 771a strb r2, [r3, #28] + } + } + /* Capture compare 4 event */ + if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET) + 8006a36: 687b ldr r3, [r7, #4] + 8006a38: 681b ldr r3, [r3, #0] + 8006a3a: 691b ldr r3, [r3, #16] + 8006a3c: f003 0310 and.w r3, r3, #16 + 8006a40: 2b10 cmp r3, #16 + 8006a42: d122 bne.n 8006a8a + { + if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) != RESET) + 8006a44: 687b ldr r3, [r7, #4] + 8006a46: 681b ldr r3, [r3, #0] + 8006a48: 68db ldr r3, [r3, #12] + 8006a4a: f003 0310 and.w r3, r3, #16 + 8006a4e: 2b10 cmp r3, #16 + 8006a50: d11b bne.n 8006a8a + { + __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4); + 8006a52: 687b ldr r3, [r7, #4] + 8006a54: 681b ldr r3, [r3, #0] + 8006a56: f06f 0210 mvn.w r2, #16 + 8006a5a: 611a str r2, [r3, #16] + htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; + 8006a5c: 687b ldr r3, [r7, #4] + 8006a5e: 2208 movs r2, #8 + 8006a60: 771a strb r2, [r3, #28] + /* Input capture event */ + if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) + 8006a62: 687b ldr r3, [r7, #4] + 8006a64: 681b ldr r3, [r3, #0] + 8006a66: 69db ldr r3, [r3, #28] + 8006a68: f403 7340 and.w r3, r3, #768 ; 0x300 + 8006a6c: 2b00 cmp r3, #0 + 8006a6e: d003 beq.n 8006a78 + { +#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + htim->IC_CaptureCallback(htim); +#else + HAL_TIM_IC_CaptureCallback(htim); + 8006a70: 6878 ldr r0, [r7, #4] + 8006a72: f000 fa59 bl 8006f28 + 8006a76: e005 b.n 8006a84 + { +#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + htim->OC_DelayElapsedCallback(htim); + htim->PWM_PulseFinishedCallback(htim); +#else + HAL_TIM_OC_DelayElapsedCallback(htim); + 8006a78: 6878 ldr r0, [r7, #4] + 8006a7a: f000 fa4b bl 8006f14 + HAL_TIM_PWM_PulseFinishedCallback(htim); + 8006a7e: 6878 ldr r0, [r7, #4] + 8006a80: f000 fa5c bl 8006f3c +#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + } + htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; + 8006a84: 687b ldr r3, [r7, #4] + 8006a86: 2200 movs r2, #0 + 8006a88: 771a strb r2, [r3, #28] } - 8004a76: 687b ldr r3, [r7, #4] - 8004a78: 4618 mov r0, r3 - 8004a7a: 3708 adds r7, #8 - 8004a7c: 46bd mov sp, r7 - 8004a7e: bd80 pop {r7, pc} - 8004a80: 0800a588 .word 0x0800a588 - -08004a84 <_ZNK13geometry_msgs5Point9serializeEPh>: - - virtual int serialize(unsigned char *outbuffer) const - 8004a84: b580 push {r7, lr} - 8004a86: b084 sub sp, #16 - 8004a88: af00 add r7, sp, #0 - 8004a8a: 6078 str r0, [r7, #4] - 8004a8c: 6039 str r1, [r7, #0] + } + /* TIM Update event */ + if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET) + 8006a8a: 687b ldr r3, [r7, #4] + 8006a8c: 681b ldr r3, [r3, #0] + 8006a8e: 691b ldr r3, [r3, #16] + 8006a90: f003 0301 and.w r3, r3, #1 + 8006a94: 2b01 cmp r3, #1 + 8006a96: d10e bne.n 8006ab6 + { + if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) != RESET) + 8006a98: 687b ldr r3, [r7, #4] + 8006a9a: 681b ldr r3, [r3, #0] + 8006a9c: 68db ldr r3, [r3, #12] + 8006a9e: f003 0301 and.w r3, r3, #1 + 8006aa2: 2b01 cmp r3, #1 + 8006aa4: d107 bne.n 8006ab6 { - int offset = 0; - 8004a8e: 2300 movs r3, #0 - 8004a90: 60fb str r3, [r7, #12] - offset += serializeAvrFloat64(outbuffer + offset, this->x); - 8004a92: 68fb ldr r3, [r7, #12] - 8004a94: 683a ldr r2, [r7, #0] - 8004a96: 441a add r2, r3 - 8004a98: 687b ldr r3, [r7, #4] - 8004a9a: edd3 7a01 vldr s15, [r3, #4] - 8004a9e: eeb0 0a67 vmov.f32 s0, s15 - 8004aa2: 4610 mov r0, r2 - 8004aa4: f7ff fd4e bl 8004544 <_ZN3ros3Msg19serializeAvrFloat64EPhf> - 8004aa8: 4602 mov r2, r0 - 8004aaa: 68fb ldr r3, [r7, #12] - 8004aac: 4413 add r3, r2 - 8004aae: 60fb str r3, [r7, #12] - offset += serializeAvrFloat64(outbuffer + offset, this->y); - 8004ab0: 68fb ldr r3, [r7, #12] - 8004ab2: 683a ldr r2, [r7, #0] - 8004ab4: 441a add r2, r3 - 8004ab6: 687b ldr r3, [r7, #4] - 8004ab8: edd3 7a02 vldr s15, [r3, #8] - 8004abc: eeb0 0a67 vmov.f32 s0, s15 - 8004ac0: 4610 mov r0, r2 - 8004ac2: f7ff fd3f bl 8004544 <_ZN3ros3Msg19serializeAvrFloat64EPhf> - 8004ac6: 4602 mov r2, r0 - 8004ac8: 68fb ldr r3, [r7, #12] - 8004aca: 4413 add r3, r2 - 8004acc: 60fb str r3, [r7, #12] - offset += serializeAvrFloat64(outbuffer + offset, this->z); - 8004ace: 68fb ldr r3, [r7, #12] - 8004ad0: 683a ldr r2, [r7, #0] - 8004ad2: 441a add r2, r3 - 8004ad4: 687b ldr r3, [r7, #4] - 8004ad6: edd3 7a03 vldr s15, [r3, #12] - 8004ada: eeb0 0a67 vmov.f32 s0, s15 - 8004ade: 4610 mov r0, r2 - 8004ae0: f7ff fd30 bl 8004544 <_ZN3ros3Msg19serializeAvrFloat64EPhf> - 8004ae4: 4602 mov r2, r0 - 8004ae6: 68fb ldr r3, [r7, #12] - 8004ae8: 4413 add r3, r2 - 8004aea: 60fb str r3, [r7, #12] - return offset; - 8004aec: 68fb ldr r3, [r7, #12] + __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); + 8006aa6: 687b ldr r3, [r7, #4] + 8006aa8: 681b ldr r3, [r3, #0] + 8006aaa: f06f 0201 mvn.w r2, #1 + 8006aae: 611a str r2, [r3, #16] +#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + htim->PeriodElapsedCallback(htim); +#else + HAL_TIM_PeriodElapsedCallback(htim); + 8006ab0: 6878 ldr r0, [r7, #4] + 8006ab2: f7fc fb99 bl 80031e8 +#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } - 8004aee: 4618 mov r0, r3 - 8004af0: 3710 adds r7, #16 - 8004af2: 46bd mov sp, r7 - 8004af4: bd80 pop {r7, pc} - -08004af6 <_ZN13geometry_msgs5Point11deserializeEPh>: - - virtual int deserialize(unsigned char *inbuffer) - 8004af6: b580 push {r7, lr} - 8004af8: b084 sub sp, #16 - 8004afa: af00 add r7, sp, #0 - 8004afc: 6078 str r0, [r7, #4] - 8004afe: 6039 str r1, [r7, #0] + } + /* TIM Break input event */ + if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET) + 8006ab6: 687b ldr r3, [r7, #4] + 8006ab8: 681b ldr r3, [r3, #0] + 8006aba: 691b ldr r3, [r3, #16] + 8006abc: f003 0380 and.w r3, r3, #128 ; 0x80 + 8006ac0: 2b80 cmp r3, #128 ; 0x80 + 8006ac2: d10e bne.n 8006ae2 + { + if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) != RESET) + 8006ac4: 687b ldr r3, [r7, #4] + 8006ac6: 681b ldr r3, [r3, #0] + 8006ac8: 68db ldr r3, [r3, #12] + 8006aca: f003 0380 and.w r3, r3, #128 ; 0x80 + 8006ace: 2b80 cmp r3, #128 ; 0x80 + 8006ad0: d107 bne.n 8006ae2 { - int offset = 0; - 8004b00: 2300 movs r3, #0 - 8004b02: 60fb str r3, [r7, #12] - offset += deserializeAvrFloat64(inbuffer + offset, &(this->x)); - 8004b04: 68fb ldr r3, [r7, #12] - 8004b06: 683a ldr r2, [r7, #0] - 8004b08: 441a add r2, r3 - 8004b0a: 687b ldr r3, [r7, #4] - 8004b0c: 3304 adds r3, #4 - 8004b0e: 4619 mov r1, r3 - 8004b10: 4610 mov r0, r2 - 8004b12: f7ff fd83 bl 800461c <_ZN3ros3Msg21deserializeAvrFloat64EPKhPf> - 8004b16: 4602 mov r2, r0 - 8004b18: 68fb ldr r3, [r7, #12] - 8004b1a: 4413 add r3, r2 - 8004b1c: 60fb str r3, [r7, #12] - offset += deserializeAvrFloat64(inbuffer + offset, &(this->y)); - 8004b1e: 68fb ldr r3, [r7, #12] - 8004b20: 683a ldr r2, [r7, #0] - 8004b22: 441a add r2, r3 - 8004b24: 687b ldr r3, [r7, #4] - 8004b26: 3308 adds r3, #8 - 8004b28: 4619 mov r1, r3 - 8004b2a: 4610 mov r0, r2 - 8004b2c: f7ff fd76 bl 800461c <_ZN3ros3Msg21deserializeAvrFloat64EPKhPf> - 8004b30: 4602 mov r2, r0 - 8004b32: 68fb ldr r3, [r7, #12] - 8004b34: 4413 add r3, r2 - 8004b36: 60fb str r3, [r7, #12] - offset += deserializeAvrFloat64(inbuffer + offset, &(this->z)); - 8004b38: 68fb ldr r3, [r7, #12] - 8004b3a: 683a ldr r2, [r7, #0] - 8004b3c: 441a add r2, r3 - 8004b3e: 687b ldr r3, [r7, #4] - 8004b40: 330c adds r3, #12 - 8004b42: 4619 mov r1, r3 - 8004b44: 4610 mov r0, r2 - 8004b46: f7ff fd69 bl 800461c <_ZN3ros3Msg21deserializeAvrFloat64EPKhPf> - 8004b4a: 4602 mov r2, r0 - 8004b4c: 68fb ldr r3, [r7, #12] - 8004b4e: 4413 add r3, r2 - 8004b50: 60fb str r3, [r7, #12] - return offset; - 8004b52: 68fb ldr r3, [r7, #12] + __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK); + 8006ad2: 687b ldr r3, [r7, #4] + 8006ad4: 681b ldr r3, [r3, #0] + 8006ad6: f06f 0280 mvn.w r2, #128 ; 0x80 + 8006ada: 611a str r2, [r3, #16] +#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + htim->BreakCallback(htim); +#else + HAL_TIMEx_BreakCallback(htim); + 8006adc: 6878 ldr r0, [r7, #4] + 8006ade: f000 fe65 bl 80077ac +#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } - 8004b54: 4618 mov r0, r3 - 8004b56: 3710 adds r7, #16 - 8004b58: 46bd mov sp, r7 - 8004b5a: bd80 pop {r7, pc} - -08004b5c <_ZN13geometry_msgs5Point7getTypeEv>: - - const char * getType(){ return "geometry_msgs/Point"; }; - 8004b5c: b480 push {r7} - 8004b5e: b083 sub sp, #12 - 8004b60: af00 add r7, sp, #0 - 8004b62: 6078 str r0, [r7, #4] - 8004b64: 4b03 ldr r3, [pc, #12] ; (8004b74 <_ZN13geometry_msgs5Point7getTypeEv+0x18>) - 8004b66: 4618 mov r0, r3 - 8004b68: 370c adds r7, #12 - 8004b6a: 46bd mov sp, r7 - 8004b6c: f85d 7b04 ldr.w r7, [sp], #4 - 8004b70: 4770 bx lr - 8004b72: bf00 nop - 8004b74: 0800a0f8 .word 0x0800a0f8 - -08004b78 <_ZN13geometry_msgs5Point6getMD5Ev>: - const char * getMD5(){ return "4a842b65f413084dc2b10fb484ea7f17"; }; - 8004b78: b480 push {r7} - 8004b7a: b083 sub sp, #12 - 8004b7c: af00 add r7, sp, #0 - 8004b7e: 6078 str r0, [r7, #4] - 8004b80: 4b03 ldr r3, [pc, #12] ; (8004b90 <_ZN13geometry_msgs5Point6getMD5Ev+0x18>) - 8004b82: 4618 mov r0, r3 - 8004b84: 370c adds r7, #12 - 8004b86: 46bd mov sp, r7 - 8004b88: f85d 7b04 ldr.w r7, [sp], #4 - 8004b8c: 4770 bx lr - 8004b8e: bf00 nop - 8004b90: 0800a10c .word 0x0800a10c - -08004b94 <_ZN13geometry_msgs10QuaternionC1Ev>: - typedef float _z_type; - _z_type z; - typedef float _w_type; - _w_type w; - - Quaternion(): - 8004b94: b580 push {r7, lr} - 8004b96: b082 sub sp, #8 - 8004b98: af00 add r7, sp, #0 - 8004b9a: 6078 str r0, [r7, #4] - x(0), - y(0), - z(0), - w(0) - 8004b9c: 687b ldr r3, [r7, #4] - 8004b9e: 4618 mov r0, r3 - 8004ba0: f7ff fdae bl 8004700 <_ZN3ros3MsgC1Ev> - 8004ba4: 4a0b ldr r2, [pc, #44] ; (8004bd4 <_ZN13geometry_msgs10QuaternionC1Ev+0x40>) - 8004ba6: 687b ldr r3, [r7, #4] - 8004ba8: 601a str r2, [r3, #0] - 8004baa: 687b ldr r3, [r7, #4] - 8004bac: f04f 0200 mov.w r2, #0 - 8004bb0: 605a str r2, [r3, #4] - 8004bb2: 687b ldr r3, [r7, #4] - 8004bb4: f04f 0200 mov.w r2, #0 - 8004bb8: 609a str r2, [r3, #8] - 8004bba: 687b ldr r3, [r7, #4] - 8004bbc: f04f 0200 mov.w r2, #0 - 8004bc0: 60da str r2, [r3, #12] - 8004bc2: 687b ldr r3, [r7, #4] - 8004bc4: f04f 0200 mov.w r2, #0 - 8004bc8: 611a str r2, [r3, #16] + } + /* TIM Break2 input event */ + if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK2) != RESET) + 8006ae2: 687b ldr r3, [r7, #4] + 8006ae4: 681b ldr r3, [r3, #0] + 8006ae6: 691b ldr r3, [r3, #16] + 8006ae8: f403 7380 and.w r3, r3, #256 ; 0x100 + 8006aec: f5b3 7f80 cmp.w r3, #256 ; 0x100 + 8006af0: d10e bne.n 8006b10 + { + if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) != RESET) + 8006af2: 687b ldr r3, [r7, #4] + 8006af4: 681b ldr r3, [r3, #0] + 8006af6: 68db ldr r3, [r3, #12] + 8006af8: f003 0380 and.w r3, r3, #128 ; 0x80 + 8006afc: 2b80 cmp r3, #128 ; 0x80 + 8006afe: d107 bne.n 8006b10 { + __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_BREAK2); + 8006b00: 687b ldr r3, [r7, #4] + 8006b02: 681b ldr r3, [r3, #0] + 8006b04: f46f 7280 mvn.w r2, #256 ; 0x100 + 8006b08: 611a str r2, [r3, #16] +#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + htim->Break2Callback(htim); +#else + HAL_TIMEx_Break2Callback(htim); + 8006b0a: 6878 ldr r0, [r7, #4] + 8006b0c: f000 fe58 bl 80077c0 +#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } - 8004bca: 687b ldr r3, [r7, #4] - 8004bcc: 4618 mov r0, r3 - 8004bce: 3708 adds r7, #8 - 8004bd0: 46bd mov sp, r7 - 8004bd2: bd80 pop {r7, pc} - 8004bd4: 0800a570 .word 0x0800a570 - -08004bd8 <_ZNK13geometry_msgs10Quaternion9serializeEPh>: - - virtual int serialize(unsigned char *outbuffer) const - 8004bd8: b580 push {r7, lr} - 8004bda: b084 sub sp, #16 - 8004bdc: af00 add r7, sp, #0 - 8004bde: 6078 str r0, [r7, #4] - 8004be0: 6039 str r1, [r7, #0] + } + /* TIM Trigger detection event */ + if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET) + 8006b10: 687b ldr r3, [r7, #4] + 8006b12: 681b ldr r3, [r3, #0] + 8006b14: 691b ldr r3, [r3, #16] + 8006b16: f003 0340 and.w r3, r3, #64 ; 0x40 + 8006b1a: 2b40 cmp r3, #64 ; 0x40 + 8006b1c: d10e bne.n 8006b3c + { + if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) != RESET) + 8006b1e: 687b ldr r3, [r7, #4] + 8006b20: 681b ldr r3, [r3, #0] + 8006b22: 68db ldr r3, [r3, #12] + 8006b24: f003 0340 and.w r3, r3, #64 ; 0x40 + 8006b28: 2b40 cmp r3, #64 ; 0x40 + 8006b2a: d107 bne.n 8006b3c { - int offset = 0; - 8004be2: 2300 movs r3, #0 - 8004be4: 60fb str r3, [r7, #12] - offset += serializeAvrFloat64(outbuffer + offset, this->x); - 8004be6: 68fb ldr r3, [r7, #12] - 8004be8: 683a ldr r2, [r7, #0] - 8004bea: 441a add r2, r3 - 8004bec: 687b ldr r3, [r7, #4] - 8004bee: edd3 7a01 vldr s15, [r3, #4] - 8004bf2: eeb0 0a67 vmov.f32 s0, s15 - 8004bf6: 4610 mov r0, r2 - 8004bf8: f7ff fca4 bl 8004544 <_ZN3ros3Msg19serializeAvrFloat64EPhf> - 8004bfc: 4602 mov r2, r0 - 8004bfe: 68fb ldr r3, [r7, #12] - 8004c00: 4413 add r3, r2 - 8004c02: 60fb str r3, [r7, #12] - offset += serializeAvrFloat64(outbuffer + offset, this->y); - 8004c04: 68fb ldr r3, [r7, #12] - 8004c06: 683a ldr r2, [r7, #0] - 8004c08: 441a add r2, r3 - 8004c0a: 687b ldr r3, [r7, #4] - 8004c0c: edd3 7a02 vldr s15, [r3, #8] - 8004c10: eeb0 0a67 vmov.f32 s0, s15 - 8004c14: 4610 mov r0, r2 - 8004c16: f7ff fc95 bl 8004544 <_ZN3ros3Msg19serializeAvrFloat64EPhf> - 8004c1a: 4602 mov r2, r0 - 8004c1c: 68fb ldr r3, [r7, #12] - 8004c1e: 4413 add r3, r2 - 8004c20: 60fb str r3, [r7, #12] - offset += serializeAvrFloat64(outbuffer + offset, this->z); - 8004c22: 68fb ldr r3, [r7, #12] - 8004c24: 683a ldr r2, [r7, #0] - 8004c26: 441a add r2, r3 - 8004c28: 687b ldr r3, [r7, #4] - 8004c2a: edd3 7a03 vldr s15, [r3, #12] - 8004c2e: eeb0 0a67 vmov.f32 s0, s15 - 8004c32: 4610 mov r0, r2 - 8004c34: f7ff fc86 bl 8004544 <_ZN3ros3Msg19serializeAvrFloat64EPhf> - 8004c38: 4602 mov r2, r0 - 8004c3a: 68fb ldr r3, [r7, #12] - 8004c3c: 4413 add r3, r2 - 8004c3e: 60fb str r3, [r7, #12] - offset += serializeAvrFloat64(outbuffer + offset, this->w); - 8004c40: 68fb ldr r3, [r7, #12] - 8004c42: 683a ldr r2, [r7, #0] - 8004c44: 441a add r2, r3 - 8004c46: 687b ldr r3, [r7, #4] - 8004c48: edd3 7a04 vldr s15, [r3, #16] - 8004c4c: eeb0 0a67 vmov.f32 s0, s15 - 8004c50: 4610 mov r0, r2 - 8004c52: f7ff fc77 bl 8004544 <_ZN3ros3Msg19serializeAvrFloat64EPhf> - 8004c56: 4602 mov r2, r0 - 8004c58: 68fb ldr r3, [r7, #12] - 8004c5a: 4413 add r3, r2 - 8004c5c: 60fb str r3, [r7, #12] - return offset; - 8004c5e: 68fb ldr r3, [r7, #12] + __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); + 8006b2c: 687b ldr r3, [r7, #4] + 8006b2e: 681b ldr r3, [r3, #0] + 8006b30: f06f 0240 mvn.w r2, #64 ; 0x40 + 8006b34: 611a str r2, [r3, #16] +#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + htim->TriggerCallback(htim); +#else + HAL_TIM_TriggerCallback(htim); + 8006b36: 6878 ldr r0, [r7, #4] + 8006b38: f000 fa0a bl 8006f50 +#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } - 8004c60: 4618 mov r0, r3 - 8004c62: 3710 adds r7, #16 - 8004c64: 46bd mov sp, r7 - 8004c66: bd80 pop {r7, pc} - -08004c68 <_ZN13geometry_msgs10Quaternion11deserializeEPh>: - - virtual int deserialize(unsigned char *inbuffer) - 8004c68: b580 push {r7, lr} - 8004c6a: b084 sub sp, #16 - 8004c6c: af00 add r7, sp, #0 - 8004c6e: 6078 str r0, [r7, #4] - 8004c70: 6039 str r1, [r7, #0] + } + /* TIM commutation event */ + if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET) + 8006b3c: 687b ldr r3, [r7, #4] + 8006b3e: 681b ldr r3, [r3, #0] + 8006b40: 691b ldr r3, [r3, #16] + 8006b42: f003 0320 and.w r3, r3, #32 + 8006b46: 2b20 cmp r3, #32 + 8006b48: d10e bne.n 8006b68 + { + if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) != RESET) + 8006b4a: 687b ldr r3, [r7, #4] + 8006b4c: 681b ldr r3, [r3, #0] + 8006b4e: 68db ldr r3, [r3, #12] + 8006b50: f003 0320 and.w r3, r3, #32 + 8006b54: 2b20 cmp r3, #32 + 8006b56: d107 bne.n 8006b68 { - int offset = 0; - 8004c72: 2300 movs r3, #0 - 8004c74: 60fb str r3, [r7, #12] - offset += deserializeAvrFloat64(inbuffer + offset, &(this->x)); - 8004c76: 68fb ldr r3, [r7, #12] - 8004c78: 683a ldr r2, [r7, #0] - 8004c7a: 441a add r2, r3 - 8004c7c: 687b ldr r3, [r7, #4] - 8004c7e: 3304 adds r3, #4 - 8004c80: 4619 mov r1, r3 - 8004c82: 4610 mov r0, r2 - 8004c84: f7ff fcca bl 800461c <_ZN3ros3Msg21deserializeAvrFloat64EPKhPf> - 8004c88: 4602 mov r2, r0 - 8004c8a: 68fb ldr r3, [r7, #12] - 8004c8c: 4413 add r3, r2 - 8004c8e: 60fb str r3, [r7, #12] - offset += deserializeAvrFloat64(inbuffer + offset, &(this->y)); - 8004c90: 68fb ldr r3, [r7, #12] - 8004c92: 683a ldr r2, [r7, #0] - 8004c94: 441a add r2, r3 - 8004c96: 687b ldr r3, [r7, #4] - 8004c98: 3308 adds r3, #8 - 8004c9a: 4619 mov r1, r3 - 8004c9c: 4610 mov r0, r2 - 8004c9e: f7ff fcbd bl 800461c <_ZN3ros3Msg21deserializeAvrFloat64EPKhPf> - 8004ca2: 4602 mov r2, r0 - 8004ca4: 68fb ldr r3, [r7, #12] - 8004ca6: 4413 add r3, r2 - 8004ca8: 60fb str r3, [r7, #12] - offset += deserializeAvrFloat64(inbuffer + offset, &(this->z)); - 8004caa: 68fb ldr r3, [r7, #12] - 8004cac: 683a ldr r2, [r7, #0] - 8004cae: 441a add r2, r3 - 8004cb0: 687b ldr r3, [r7, #4] - 8004cb2: 330c adds r3, #12 - 8004cb4: 4619 mov r1, r3 - 8004cb6: 4610 mov r0, r2 - 8004cb8: f7ff fcb0 bl 800461c <_ZN3ros3Msg21deserializeAvrFloat64EPKhPf> - 8004cbc: 4602 mov r2, r0 - 8004cbe: 68fb ldr r3, [r7, #12] - 8004cc0: 4413 add r3, r2 - 8004cc2: 60fb str r3, [r7, #12] - offset += deserializeAvrFloat64(inbuffer + offset, &(this->w)); - 8004cc4: 68fb ldr r3, [r7, #12] - 8004cc6: 683a ldr r2, [r7, #0] - 8004cc8: 441a add r2, r3 - 8004cca: 687b ldr r3, [r7, #4] - 8004ccc: 3310 adds r3, #16 - 8004cce: 4619 mov r1, r3 - 8004cd0: 4610 mov r0, r2 - 8004cd2: f7ff fca3 bl 800461c <_ZN3ros3Msg21deserializeAvrFloat64EPKhPf> - 8004cd6: 4602 mov r2, r0 - 8004cd8: 68fb ldr r3, [r7, #12] - 8004cda: 4413 add r3, r2 - 8004cdc: 60fb str r3, [r7, #12] - return offset; - 8004cde: 68fb ldr r3, [r7, #12] + __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM); + 8006b58: 687b ldr r3, [r7, #4] + 8006b5a: 681b ldr r3, [r3, #0] + 8006b5c: f06f 0220 mvn.w r2, #32 + 8006b60: 611a str r2, [r3, #16] +#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + htim->CommutationCallback(htim); +#else + HAL_TIMEx_CommutCallback(htim); + 8006b62: 6878 ldr r0, [r7, #4] + 8006b64: f000 fe18 bl 8007798 +#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } - 8004ce0: 4618 mov r0, r3 - 8004ce2: 3710 adds r7, #16 - 8004ce4: 46bd mov sp, r7 - 8004ce6: bd80 pop {r7, pc} - -08004ce8 <_ZN13geometry_msgs10Quaternion7getTypeEv>: + } +} + 8006b68: bf00 nop + 8006b6a: 3708 adds r7, #8 + 8006b6c: 46bd mov sp, r7 + 8006b6e: bd80 pop {r7, pc} - const char * getType(){ return "geometry_msgs/Quaternion"; }; - 8004ce8: b480 push {r7} - 8004cea: b083 sub sp, #12 - 8004cec: af00 add r7, sp, #0 - 8004cee: 6078 str r0, [r7, #4] - 8004cf0: 4b03 ldr r3, [pc, #12] ; (8004d00 <_ZN13geometry_msgs10Quaternion7getTypeEv+0x18>) - 8004cf2: 4618 mov r0, r3 - 8004cf4: 370c adds r7, #12 - 8004cf6: 46bd mov sp, r7 - 8004cf8: f85d 7b04 ldr.w r7, [sp], #4 - 8004cfc: 4770 bx lr - 8004cfe: bf00 nop - 8004d00: 0800a130 .word 0x0800a130 - -08004d04 <_ZN13geometry_msgs10Quaternion6getMD5Ev>: - const char * getMD5(){ return "a779879fadf0160734f906b8c19c7004"; }; - 8004d04: b480 push {r7} - 8004d06: b083 sub sp, #12 - 8004d08: af00 add r7, sp, #0 - 8004d0a: 6078 str r0, [r7, #4] - 8004d0c: 4b03 ldr r3, [pc, #12] ; (8004d1c <_ZN13geometry_msgs10Quaternion6getMD5Ev+0x18>) - 8004d0e: 4618 mov r0, r3 - 8004d10: 370c adds r7, #12 - 8004d12: 46bd mov sp, r7 - 8004d14: f85d 7b04 ldr.w r7, [sp], #4 - 8004d18: 4770 bx lr - 8004d1a: bf00 nop - 8004d1c: 0800a14c .word 0x0800a14c - -08004d20 <_ZN13geometry_msgs4PoseC1Ev>: - typedef geometry_msgs::Point _position_type; - _position_type position; - typedef geometry_msgs::Quaternion _orientation_type; - _orientation_type orientation; +08006b70 : + * @retval HAL status + */ +HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim, + TIM_OC_InitTypeDef *sConfig, + uint32_t Channel) +{ + 8006b70: b580 push {r7, lr} + 8006b72: b084 sub sp, #16 + 8006b74: af00 add r7, sp, #0 + 8006b76: 60f8 str r0, [r7, #12] + 8006b78: 60b9 str r1, [r7, #8] + 8006b7a: 607a str r2, [r7, #4] + assert_param(IS_TIM_PWM_MODE(sConfig->OCMode)); + assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity)); + assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode)); - Pose(): - 8004d20: b580 push {r7, lr} - 8004d22: b082 sub sp, #8 - 8004d24: af00 add r7, sp, #0 - 8004d26: 6078 str r0, [r7, #4] - position(), - orientation() - 8004d28: 687b ldr r3, [r7, #4] - 8004d2a: 4618 mov r0, r3 - 8004d2c: f7ff fce8 bl 8004700 <_ZN3ros3MsgC1Ev> - 8004d30: 4a08 ldr r2, [pc, #32] ; (8004d54 <_ZN13geometry_msgs4PoseC1Ev+0x34>) - 8004d32: 687b ldr r3, [r7, #4] - 8004d34: 601a str r2, [r3, #0] - 8004d36: 687b ldr r3, [r7, #4] - 8004d38: 3304 adds r3, #4 - 8004d3a: 4618 mov r0, r3 - 8004d3c: f7ff fe84 bl 8004a48 <_ZN13geometry_msgs5PointC1Ev> - 8004d40: 687b ldr r3, [r7, #4] - 8004d42: 3314 adds r3, #20 - 8004d44: 4618 mov r0, r3 - 8004d46: f7ff ff25 bl 8004b94 <_ZN13geometry_msgs10QuaternionC1Ev> - { - } - 8004d4a: 687b ldr r3, [r7, #4] - 8004d4c: 4618 mov r0, r3 - 8004d4e: 3708 adds r7, #8 - 8004d50: 46bd mov sp, r7 - 8004d52: bd80 pop {r7, pc} - 8004d54: 0800a558 .word 0x0800a558 + /* Process Locked */ + __HAL_LOCK(htim); + 8006b7c: 68fb ldr r3, [r7, #12] + 8006b7e: f893 303c ldrb.w r3, [r3, #60] ; 0x3c + 8006b82: 2b01 cmp r3, #1 + 8006b84: d101 bne.n 8006b8a + 8006b86: 2302 movs r3, #2 + 8006b88: e105 b.n 8006d96 + 8006b8a: 68fb ldr r3, [r7, #12] + 8006b8c: 2201 movs r2, #1 + 8006b8e: f883 203c strb.w r2, [r3, #60] ; 0x3c -08004d58 <_ZNK13geometry_msgs4Pose9serializeEPh>: + htim->State = HAL_TIM_STATE_BUSY; + 8006b92: 68fb ldr r3, [r7, #12] + 8006b94: 2202 movs r2, #2 + 8006b96: f883 203d strb.w r2, [r3, #61] ; 0x3d - virtual int serialize(unsigned char *outbuffer) const - 8004d58: b580 push {r7, lr} - 8004d5a: b084 sub sp, #16 - 8004d5c: af00 add r7, sp, #0 - 8004d5e: 6078 str r0, [r7, #4] - 8004d60: 6039 str r1, [r7, #0] + switch (Channel) + 8006b9a: 687b ldr r3, [r7, #4] + 8006b9c: 2b14 cmp r3, #20 + 8006b9e: f200 80f0 bhi.w 8006d82 + 8006ba2: a201 add r2, pc, #4 ; (adr r2, 8006ba8 ) + 8006ba4: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 8006ba8: 08006bfd .word 0x08006bfd + 8006bac: 08006d83 .word 0x08006d83 + 8006bb0: 08006d83 .word 0x08006d83 + 8006bb4: 08006d83 .word 0x08006d83 + 8006bb8: 08006c3d .word 0x08006c3d + 8006bbc: 08006d83 .word 0x08006d83 + 8006bc0: 08006d83 .word 0x08006d83 + 8006bc4: 08006d83 .word 0x08006d83 + 8006bc8: 08006c7f .word 0x08006c7f + 8006bcc: 08006d83 .word 0x08006d83 + 8006bd0: 08006d83 .word 0x08006d83 + 8006bd4: 08006d83 .word 0x08006d83 + 8006bd8: 08006cbf .word 0x08006cbf + 8006bdc: 08006d83 .word 0x08006d83 + 8006be0: 08006d83 .word 0x08006d83 + 8006be4: 08006d83 .word 0x08006d83 + 8006be8: 08006d01 .word 0x08006d01 + 8006bec: 08006d83 .word 0x08006d83 + 8006bf0: 08006d83 .word 0x08006d83 + 8006bf4: 08006d83 .word 0x08006d83 + 8006bf8: 08006d41 .word 0x08006d41 { - int offset = 0; - 8004d62: 2300 movs r3, #0 - 8004d64: 60fb str r3, [r7, #12] - offset += this->position.serialize(outbuffer + offset); - 8004d66: 687b ldr r3, [r7, #4] - 8004d68: 1d18 adds r0, r3, #4 - 8004d6a: 68fb ldr r3, [r7, #12] - 8004d6c: 683a ldr r2, [r7, #0] - 8004d6e: 4413 add r3, r2 - 8004d70: 4619 mov r1, r3 - 8004d72: f7ff fe87 bl 8004a84 <_ZNK13geometry_msgs5Point9serializeEPh> - 8004d76: 4602 mov r2, r0 - 8004d78: 68fb ldr r3, [r7, #12] - 8004d7a: 4413 add r3, r2 - 8004d7c: 60fb str r3, [r7, #12] - offset += this->orientation.serialize(outbuffer + offset); - 8004d7e: 687b ldr r3, [r7, #4] - 8004d80: f103 0014 add.w r0, r3, #20 - 8004d84: 68fb ldr r3, [r7, #12] - 8004d86: 683a ldr r2, [r7, #0] - 8004d88: 4413 add r3, r2 - 8004d8a: 4619 mov r1, r3 - 8004d8c: f7ff ff24 bl 8004bd8 <_ZNK13geometry_msgs10Quaternion9serializeEPh> - 8004d90: 4602 mov r2, r0 - 8004d92: 68fb ldr r3, [r7, #12] - 8004d94: 4413 add r3, r2 - 8004d96: 60fb str r3, [r7, #12] - return offset; - 8004d98: 68fb ldr r3, [r7, #12] - } - 8004d9a: 4618 mov r0, r3 - 8004d9c: 3710 adds r7, #16 - 8004d9e: 46bd mov sp, r7 - 8004da0: bd80 pop {r7, pc} + /* Check the parameters */ + assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); -08004da2 <_ZN13geometry_msgs4Pose11deserializeEPh>: + /* Configure the Channel 1 in PWM mode */ + TIM_OC1_SetConfig(htim->Instance, sConfig); + 8006bfc: 68fb ldr r3, [r7, #12] + 8006bfe: 681b ldr r3, [r3, #0] + 8006c00: 68b9 ldr r1, [r7, #8] + 8006c02: 4618 mov r0, r3 + 8006c04: f000 fa4e bl 80070a4 - virtual int deserialize(unsigned char *inbuffer) - 8004da2: b580 push {r7, lr} - 8004da4: b084 sub sp, #16 - 8004da6: af00 add r7, sp, #0 - 8004da8: 6078 str r0, [r7, #4] - 8004daa: 6039 str r1, [r7, #0] + /* Set the Preload enable bit for channel1 */ + htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE; + 8006c08: 68fb ldr r3, [r7, #12] + 8006c0a: 681b ldr r3, [r3, #0] + 8006c0c: 699a ldr r2, [r3, #24] + 8006c0e: 68fb ldr r3, [r7, #12] + 8006c10: 681b ldr r3, [r3, #0] + 8006c12: f042 0208 orr.w r2, r2, #8 + 8006c16: 619a str r2, [r3, #24] + + /* Configure the Output Fast mode */ + htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE; + 8006c18: 68fb ldr r3, [r7, #12] + 8006c1a: 681b ldr r3, [r3, #0] + 8006c1c: 699a ldr r2, [r3, #24] + 8006c1e: 68fb ldr r3, [r7, #12] + 8006c20: 681b ldr r3, [r3, #0] + 8006c22: f022 0204 bic.w r2, r2, #4 + 8006c26: 619a str r2, [r3, #24] + htim->Instance->CCMR1 |= sConfig->OCFastMode; + 8006c28: 68fb ldr r3, [r7, #12] + 8006c2a: 681b ldr r3, [r3, #0] + 8006c2c: 6999 ldr r1, [r3, #24] + 8006c2e: 68bb ldr r3, [r7, #8] + 8006c30: 691a ldr r2, [r3, #16] + 8006c32: 68fb ldr r3, [r7, #12] + 8006c34: 681b ldr r3, [r3, #0] + 8006c36: 430a orrs r2, r1 + 8006c38: 619a str r2, [r3, #24] + break; + 8006c3a: e0a3 b.n 8006d84 { - int offset = 0; - 8004dac: 2300 movs r3, #0 - 8004dae: 60fb str r3, [r7, #12] - offset += this->position.deserialize(inbuffer + offset); - 8004db0: 687b ldr r3, [r7, #4] - 8004db2: 1d18 adds r0, r3, #4 - 8004db4: 68fb ldr r3, [r7, #12] - 8004db6: 683a ldr r2, [r7, #0] - 8004db8: 4413 add r3, r2 - 8004dba: 4619 mov r1, r3 - 8004dbc: f7ff fe9b bl 8004af6 <_ZN13geometry_msgs5Point11deserializeEPh> - 8004dc0: 4602 mov r2, r0 - 8004dc2: 68fb ldr r3, [r7, #12] - 8004dc4: 4413 add r3, r2 - 8004dc6: 60fb str r3, [r7, #12] - offset += this->orientation.deserialize(inbuffer + offset); - 8004dc8: 687b ldr r3, [r7, #4] - 8004dca: f103 0014 add.w r0, r3, #20 - 8004dce: 68fb ldr r3, [r7, #12] - 8004dd0: 683a ldr r2, [r7, #0] - 8004dd2: 4413 add r3, r2 - 8004dd4: 4619 mov r1, r3 - 8004dd6: f7ff ff47 bl 8004c68 <_ZN13geometry_msgs10Quaternion11deserializeEPh> - 8004dda: 4602 mov r2, r0 - 8004ddc: 68fb ldr r3, [r7, #12] - 8004dde: 4413 add r3, r2 - 8004de0: 60fb str r3, [r7, #12] - return offset; - 8004de2: 68fb ldr r3, [r7, #12] - } - 8004de4: 4618 mov r0, r3 - 8004de6: 3710 adds r7, #16 - 8004de8: 46bd mov sp, r7 - 8004dea: bd80 pop {r7, pc} + /* Check the parameters */ + assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); -08004dec <_ZN13geometry_msgs4Pose7getTypeEv>: + /* Configure the Channel 2 in PWM mode */ + TIM_OC2_SetConfig(htim->Instance, sConfig); + 8006c3c: 68fb ldr r3, [r7, #12] + 8006c3e: 681b ldr r3, [r3, #0] + 8006c40: 68b9 ldr r1, [r7, #8] + 8006c42: 4618 mov r0, r3 + 8006c44: f000 faa0 bl 8007188 - const char * getType(){ return "geometry_msgs/Pose"; }; - 8004dec: b480 push {r7} - 8004dee: b083 sub sp, #12 - 8004df0: af00 add r7, sp, #0 - 8004df2: 6078 str r0, [r7, #4] - 8004df4: 4b03 ldr r3, [pc, #12] ; (8004e04 <_ZN13geometry_msgs4Pose7getTypeEv+0x18>) - 8004df6: 4618 mov r0, r3 - 8004df8: 370c adds r7, #12 - 8004dfa: 46bd mov sp, r7 - 8004dfc: f85d 7b04 ldr.w r7, [sp], #4 - 8004e00: 4770 bx lr - 8004e02: bf00 nop - 8004e04: 0800a170 .word 0x0800a170 - -08004e08 <_ZN13geometry_msgs4Pose6getMD5Ev>: - const char * getMD5(){ return "e45d45a5a1ce597b249e23fb30fc871f"; }; - 8004e08: b480 push {r7} - 8004e0a: b083 sub sp, #12 - 8004e0c: af00 add r7, sp, #0 - 8004e0e: 6078 str r0, [r7, #4] - 8004e10: 4b03 ldr r3, [pc, #12] ; (8004e20 <_ZN13geometry_msgs4Pose6getMD5Ev+0x18>) - 8004e12: 4618 mov r0, r3 - 8004e14: 370c adds r7, #12 - 8004e16: 46bd mov sp, r7 - 8004e18: f85d 7b04 ldr.w r7, [sp], #4 - 8004e1c: 4770 bx lr - 8004e1e: bf00 nop - 8004e20: 0800a184 .word 0x0800a184 - -08004e24 <_ZN13geometry_msgs18PoseWithCovarianceC1Ev>: - public: - typedef geometry_msgs::Pose _pose_type; - _pose_type pose; - float covariance[36]; + /* Set the Preload enable bit for channel2 */ + htim->Instance->CCMR1 |= TIM_CCMR1_OC2PE; + 8006c48: 68fb ldr r3, [r7, #12] + 8006c4a: 681b ldr r3, [r3, #0] + 8006c4c: 699a ldr r2, [r3, #24] + 8006c4e: 68fb ldr r3, [r7, #12] + 8006c50: 681b ldr r3, [r3, #0] + 8006c52: f442 6200 orr.w r2, r2, #2048 ; 0x800 + 8006c56: 619a str r2, [r3, #24] - PoseWithCovariance(): - 8004e24: b580 push {r7, lr} - 8004e26: b082 sub sp, #8 - 8004e28: af00 add r7, sp, #0 - 8004e2a: 6078 str r0, [r7, #4] - pose(), - covariance() - 8004e2c: 687b ldr r3, [r7, #4] - 8004e2e: 4618 mov r0, r3 - 8004e30: f7ff fc66 bl 8004700 <_ZN3ros3MsgC1Ev> - 8004e34: 4a0c ldr r2, [pc, #48] ; (8004e68 <_ZN13geometry_msgs18PoseWithCovarianceC1Ev+0x44>) - 8004e36: 687b ldr r3, [r7, #4] - 8004e38: 601a str r2, [r3, #0] - 8004e3a: 687b ldr r3, [r7, #4] - 8004e3c: 3304 adds r3, #4 - 8004e3e: 4618 mov r0, r3 - 8004e40: f7ff ff6e bl 8004d20 <_ZN13geometry_msgs4PoseC1Ev> - 8004e44: 687b ldr r3, [r7, #4] - 8004e46: f103 022c add.w r2, r3, #44 ; 0x2c - 8004e4a: 2323 movs r3, #35 ; 0x23 - 8004e4c: 2b00 cmp r3, #0 - 8004e4e: db05 blt.n 8004e5c <_ZN13geometry_msgs18PoseWithCovarianceC1Ev+0x38> - 8004e50: f04f 0100 mov.w r1, #0 - 8004e54: 6011 str r1, [r2, #0] - 8004e56: 3204 adds r2, #4 - 8004e58: 3b01 subs r3, #1 - 8004e5a: e7f7 b.n 8004e4c <_ZN13geometry_msgs18PoseWithCovarianceC1Ev+0x28> + /* Configure the Output Fast mode */ + htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE; + 8006c58: 68fb ldr r3, [r7, #12] + 8006c5a: 681b ldr r3, [r3, #0] + 8006c5c: 699a ldr r2, [r3, #24] + 8006c5e: 68fb ldr r3, [r7, #12] + 8006c60: 681b ldr r3, [r3, #0] + 8006c62: f422 6280 bic.w r2, r2, #1024 ; 0x400 + 8006c66: 619a str r2, [r3, #24] + htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U; + 8006c68: 68fb ldr r3, [r7, #12] + 8006c6a: 681b ldr r3, [r3, #0] + 8006c6c: 6999 ldr r1, [r3, #24] + 8006c6e: 68bb ldr r3, [r7, #8] + 8006c70: 691b ldr r3, [r3, #16] + 8006c72: 021a lsls r2, r3, #8 + 8006c74: 68fb ldr r3, [r7, #12] + 8006c76: 681b ldr r3, [r3, #0] + 8006c78: 430a orrs r2, r1 + 8006c7a: 619a str r2, [r3, #24] + break; + 8006c7c: e082 b.n 8006d84 { - } - 8004e5c: 687b ldr r3, [r7, #4] - 8004e5e: 4618 mov r0, r3 - 8004e60: 3708 adds r7, #8 - 8004e62: 46bd mov sp, r7 - 8004e64: bd80 pop {r7, pc} - 8004e66: bf00 nop - 8004e68: 0800a540 .word 0x0800a540 - -08004e6c <_ZNK13geometry_msgs18PoseWithCovariance9serializeEPh>: + /* Check the parameters */ + assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); - virtual int serialize(unsigned char *outbuffer) const - 8004e6c: b580 push {r7, lr} - 8004e6e: b084 sub sp, #16 - 8004e70: af00 add r7, sp, #0 - 8004e72: 6078 str r0, [r7, #4] - 8004e74: 6039 str r1, [r7, #0] - { - int offset = 0; - 8004e76: 2300 movs r3, #0 - 8004e78: 60fb str r3, [r7, #12] - offset += this->pose.serialize(outbuffer + offset); - 8004e7a: 687b ldr r3, [r7, #4] - 8004e7c: 1d18 adds r0, r3, #4 - 8004e7e: 68fb ldr r3, [r7, #12] - 8004e80: 683a ldr r2, [r7, #0] - 8004e82: 4413 add r3, r2 - 8004e84: 4619 mov r1, r3 - 8004e86: f7ff ff67 bl 8004d58 <_ZNK13geometry_msgs4Pose9serializeEPh> - 8004e8a: 4602 mov r2, r0 - 8004e8c: 68fb ldr r3, [r7, #12] - 8004e8e: 4413 add r3, r2 - 8004e90: 60fb str r3, [r7, #12] - for( uint32_t i = 0; i < 36; i++){ - 8004e92: 2300 movs r3, #0 - 8004e94: 60bb str r3, [r7, #8] - 8004e96: 68bb ldr r3, [r7, #8] - 8004e98: 2b23 cmp r3, #35 ; 0x23 - 8004e9a: d817 bhi.n 8004ecc <_ZNK13geometry_msgs18PoseWithCovariance9serializeEPh+0x60> - offset += serializeAvrFloat64(outbuffer + offset, this->covariance[i]); - 8004e9c: 68fb ldr r3, [r7, #12] - 8004e9e: 683a ldr r2, [r7, #0] - 8004ea0: 18d1 adds r1, r2, r3 - 8004ea2: 687a ldr r2, [r7, #4] - 8004ea4: 68bb ldr r3, [r7, #8] - 8004ea6: 330a adds r3, #10 - 8004ea8: 009b lsls r3, r3, #2 - 8004eaa: 4413 add r3, r2 - 8004eac: 3304 adds r3, #4 - 8004eae: edd3 7a00 vldr s15, [r3] - 8004eb2: eeb0 0a67 vmov.f32 s0, s15 - 8004eb6: 4608 mov r0, r1 - 8004eb8: f7ff fb44 bl 8004544 <_ZN3ros3Msg19serializeAvrFloat64EPhf> - 8004ebc: 4602 mov r2, r0 - 8004ebe: 68fb ldr r3, [r7, #12] - 8004ec0: 4413 add r3, r2 - 8004ec2: 60fb str r3, [r7, #12] - for( uint32_t i = 0; i < 36; i++){ - 8004ec4: 68bb ldr r3, [r7, #8] - 8004ec6: 3301 adds r3, #1 - 8004ec8: 60bb str r3, [r7, #8] - 8004eca: e7e4 b.n 8004e96 <_ZNK13geometry_msgs18PoseWithCovariance9serializeEPh+0x2a> - } - return offset; - 8004ecc: 68fb ldr r3, [r7, #12] - } - 8004ece: 4618 mov r0, r3 - 8004ed0: 3710 adds r7, #16 - 8004ed2: 46bd mov sp, r7 - 8004ed4: bd80 pop {r7, pc} + /* Configure the Channel 3 in PWM mode */ + TIM_OC3_SetConfig(htim->Instance, sConfig); + 8006c7e: 68fb ldr r3, [r7, #12] + 8006c80: 681b ldr r3, [r3, #0] + 8006c82: 68b9 ldr r1, [r7, #8] + 8006c84: 4618 mov r0, r3 + 8006c86: f000 faf7 bl 8007278 -08004ed6 <_ZN13geometry_msgs18PoseWithCovariance11deserializeEPh>: + /* Set the Preload enable bit for channel3 */ + htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE; + 8006c8a: 68fb ldr r3, [r7, #12] + 8006c8c: 681b ldr r3, [r3, #0] + 8006c8e: 69da ldr r2, [r3, #28] + 8006c90: 68fb ldr r3, [r7, #12] + 8006c92: 681b ldr r3, [r3, #0] + 8006c94: f042 0208 orr.w r2, r2, #8 + 8006c98: 61da str r2, [r3, #28] - virtual int deserialize(unsigned char *inbuffer) - 8004ed6: b580 push {r7, lr} - 8004ed8: b084 sub sp, #16 - 8004eda: af00 add r7, sp, #0 - 8004edc: 6078 str r0, [r7, #4] - 8004ede: 6039 str r1, [r7, #0] + /* Configure the Output Fast mode */ + htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE; + 8006c9a: 68fb ldr r3, [r7, #12] + 8006c9c: 681b ldr r3, [r3, #0] + 8006c9e: 69da ldr r2, [r3, #28] + 8006ca0: 68fb ldr r3, [r7, #12] + 8006ca2: 681b ldr r3, [r3, #0] + 8006ca4: f022 0204 bic.w r2, r2, #4 + 8006ca8: 61da str r2, [r3, #28] + htim->Instance->CCMR2 |= sConfig->OCFastMode; + 8006caa: 68fb ldr r3, [r7, #12] + 8006cac: 681b ldr r3, [r3, #0] + 8006cae: 69d9 ldr r1, [r3, #28] + 8006cb0: 68bb ldr r3, [r7, #8] + 8006cb2: 691a ldr r2, [r3, #16] + 8006cb4: 68fb ldr r3, [r7, #12] + 8006cb6: 681b ldr r3, [r3, #0] + 8006cb8: 430a orrs r2, r1 + 8006cba: 61da str r2, [r3, #28] + break; + 8006cbc: e062 b.n 8006d84 { - int offset = 0; - 8004ee0: 2300 movs r3, #0 - 8004ee2: 60fb str r3, [r7, #12] - offset += this->pose.deserialize(inbuffer + offset); - 8004ee4: 687b ldr r3, [r7, #4] - 8004ee6: 1d18 adds r0, r3, #4 - 8004ee8: 68fb ldr r3, [r7, #12] - 8004eea: 683a ldr r2, [r7, #0] - 8004eec: 4413 add r3, r2 - 8004eee: 4619 mov r1, r3 - 8004ef0: f7ff ff57 bl 8004da2 <_ZN13geometry_msgs4Pose11deserializeEPh> - 8004ef4: 4602 mov r2, r0 - 8004ef6: 68fb ldr r3, [r7, #12] - 8004ef8: 4413 add r3, r2 - 8004efa: 60fb str r3, [r7, #12] - for( uint32_t i = 0; i < 36; i++){ - 8004efc: 2300 movs r3, #0 - 8004efe: 60bb str r3, [r7, #8] - 8004f00: 68bb ldr r3, [r7, #8] - 8004f02: 2b23 cmp r3, #35 ; 0x23 - 8004f04: d813 bhi.n 8004f2e <_ZN13geometry_msgs18PoseWithCovariance11deserializeEPh+0x58> - offset += deserializeAvrFloat64(inbuffer + offset, &(this->covariance[i])); - 8004f06: 68fb ldr r3, [r7, #12] - 8004f08: 683a ldr r2, [r7, #0] - 8004f0a: 18d0 adds r0, r2, r3 - 8004f0c: 68bb ldr r3, [r7, #8] - 8004f0e: 330a adds r3, #10 - 8004f10: 009b lsls r3, r3, #2 - 8004f12: 687a ldr r2, [r7, #4] - 8004f14: 4413 add r3, r2 - 8004f16: 3304 adds r3, #4 - 8004f18: 4619 mov r1, r3 - 8004f1a: f7ff fb7f bl 800461c <_ZN3ros3Msg21deserializeAvrFloat64EPKhPf> - 8004f1e: 4602 mov r2, r0 - 8004f20: 68fb ldr r3, [r7, #12] - 8004f22: 4413 add r3, r2 - 8004f24: 60fb str r3, [r7, #12] - for( uint32_t i = 0; i < 36; i++){ - 8004f26: 68bb ldr r3, [r7, #8] - 8004f28: 3301 adds r3, #1 - 8004f2a: 60bb str r3, [r7, #8] - 8004f2c: e7e8 b.n 8004f00 <_ZN13geometry_msgs18PoseWithCovariance11deserializeEPh+0x2a> - } - return offset; - 8004f2e: 68fb ldr r3, [r7, #12] - } - 8004f30: 4618 mov r0, r3 - 8004f32: 3710 adds r7, #16 - 8004f34: 46bd mov sp, r7 - 8004f36: bd80 pop {r7, pc} + /* Check the parameters */ + assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); -08004f38 <_ZN13geometry_msgs18PoseWithCovariance7getTypeEv>: + /* Configure the Channel 4 in PWM mode */ + TIM_OC4_SetConfig(htim->Instance, sConfig); + 8006cbe: 68fb ldr r3, [r7, #12] + 8006cc0: 681b ldr r3, [r3, #0] + 8006cc2: 68b9 ldr r1, [r7, #8] + 8006cc4: 4618 mov r0, r3 + 8006cc6: f000 fb4d bl 8007364 - const char * getType(){ return "geometry_msgs/PoseWithCovariance"; }; - 8004f38: b480 push {r7} - 8004f3a: b083 sub sp, #12 - 8004f3c: af00 add r7, sp, #0 - 8004f3e: 6078 str r0, [r7, #4] - 8004f40: 4b03 ldr r3, [pc, #12] ; (8004f50 <_ZN13geometry_msgs18PoseWithCovariance7getTypeEv+0x18>) - 8004f42: 4618 mov r0, r3 - 8004f44: 370c adds r7, #12 - 8004f46: 46bd mov sp, r7 - 8004f48: f85d 7b04 ldr.w r7, [sp], #4 - 8004f4c: 4770 bx lr - 8004f4e: bf00 nop - 8004f50: 0800a1a8 .word 0x0800a1a8 - -08004f54 <_ZN13geometry_msgs18PoseWithCovariance6getMD5Ev>: - const char * getMD5(){ return "c23e848cf1b7533a8d7c259073a97e6f"; }; - 8004f54: b480 push {r7} - 8004f56: b083 sub sp, #12 - 8004f58: af00 add r7, sp, #0 - 8004f5a: 6078 str r0, [r7, #4] - 8004f5c: 4b03 ldr r3, [pc, #12] ; (8004f6c <_ZN13geometry_msgs18PoseWithCovariance6getMD5Ev+0x18>) - 8004f5e: 4618 mov r0, r3 - 8004f60: 370c adds r7, #12 - 8004f62: 46bd mov sp, r7 - 8004f64: f85d 7b04 ldr.w r7, [sp], #4 - 8004f68: 4770 bx lr - 8004f6a: bf00 nop - 8004f6c: 0800a1cc .word 0x0800a1cc - -08004f70 <_ZN13geometry_msgs7Vector3C1Ev>: - typedef float _y_type; - _y_type y; - typedef float _z_type; - _z_type z; + /* Set the Preload enable bit for channel4 */ + htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE; + 8006cca: 68fb ldr r3, [r7, #12] + 8006ccc: 681b ldr r3, [r3, #0] + 8006cce: 69da ldr r2, [r3, #28] + 8006cd0: 68fb ldr r3, [r7, #12] + 8006cd2: 681b ldr r3, [r3, #0] + 8006cd4: f442 6200 orr.w r2, r2, #2048 ; 0x800 + 8006cd8: 61da str r2, [r3, #28] - Vector3(): - 8004f70: b580 push {r7, lr} - 8004f72: b082 sub sp, #8 - 8004f74: af00 add r7, sp, #0 - 8004f76: 6078 str r0, [r7, #4] - x(0), - y(0), - z(0) - 8004f78: 687b ldr r3, [r7, #4] - 8004f7a: 4618 mov r0, r3 - 8004f7c: f7ff fbc0 bl 8004700 <_ZN3ros3MsgC1Ev> - 8004f80: 4a09 ldr r2, [pc, #36] ; (8004fa8 <_ZN13geometry_msgs7Vector3C1Ev+0x38>) - 8004f82: 687b ldr r3, [r7, #4] - 8004f84: 601a str r2, [r3, #0] - 8004f86: 687b ldr r3, [r7, #4] - 8004f88: f04f 0200 mov.w r2, #0 - 8004f8c: 605a str r2, [r3, #4] - 8004f8e: 687b ldr r3, [r7, #4] - 8004f90: f04f 0200 mov.w r2, #0 - 8004f94: 609a str r2, [r3, #8] - 8004f96: 687b ldr r3, [r7, #4] - 8004f98: f04f 0200 mov.w r2, #0 - 8004f9c: 60da str r2, [r3, #12] + /* Configure the Output Fast mode */ + htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE; + 8006cda: 68fb ldr r3, [r7, #12] + 8006cdc: 681b ldr r3, [r3, #0] + 8006cde: 69da ldr r2, [r3, #28] + 8006ce0: 68fb ldr r3, [r7, #12] + 8006ce2: 681b ldr r3, [r3, #0] + 8006ce4: f422 6280 bic.w r2, r2, #1024 ; 0x400 + 8006ce8: 61da str r2, [r3, #28] + htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U; + 8006cea: 68fb ldr r3, [r7, #12] + 8006cec: 681b ldr r3, [r3, #0] + 8006cee: 69d9 ldr r1, [r3, #28] + 8006cf0: 68bb ldr r3, [r7, #8] + 8006cf2: 691b ldr r3, [r3, #16] + 8006cf4: 021a lsls r2, r3, #8 + 8006cf6: 68fb ldr r3, [r7, #12] + 8006cf8: 681b ldr r3, [r3, #0] + 8006cfa: 430a orrs r2, r1 + 8006cfc: 61da str r2, [r3, #28] + break; + 8006cfe: e041 b.n 8006d84 { - } - 8004f9e: 687b ldr r3, [r7, #4] - 8004fa0: 4618 mov r0, r3 - 8004fa2: 3708 adds r7, #8 - 8004fa4: 46bd mov sp, r7 - 8004fa6: bd80 pop {r7, pc} - 8004fa8: 0800a528 .word 0x0800a528 - -08004fac <_ZNK13geometry_msgs7Vector39serializeEPh>: + /* Check the parameters */ + assert_param(IS_TIM_CC5_INSTANCE(htim->Instance)); - virtual int serialize(unsigned char *outbuffer) const - 8004fac: b580 push {r7, lr} - 8004fae: b084 sub sp, #16 - 8004fb0: af00 add r7, sp, #0 - 8004fb2: 6078 str r0, [r7, #4] - 8004fb4: 6039 str r1, [r7, #0] - { - int offset = 0; - 8004fb6: 2300 movs r3, #0 - 8004fb8: 60fb str r3, [r7, #12] - offset += serializeAvrFloat64(outbuffer + offset, this->x); - 8004fba: 68fb ldr r3, [r7, #12] - 8004fbc: 683a ldr r2, [r7, #0] - 8004fbe: 441a add r2, r3 - 8004fc0: 687b ldr r3, [r7, #4] - 8004fc2: edd3 7a01 vldr s15, [r3, #4] - 8004fc6: eeb0 0a67 vmov.f32 s0, s15 - 8004fca: 4610 mov r0, r2 - 8004fcc: f7ff faba bl 8004544 <_ZN3ros3Msg19serializeAvrFloat64EPhf> - 8004fd0: 4602 mov r2, r0 - 8004fd2: 68fb ldr r3, [r7, #12] - 8004fd4: 4413 add r3, r2 - 8004fd6: 60fb str r3, [r7, #12] - offset += serializeAvrFloat64(outbuffer + offset, this->y); - 8004fd8: 68fb ldr r3, [r7, #12] - 8004fda: 683a ldr r2, [r7, #0] - 8004fdc: 441a add r2, r3 - 8004fde: 687b ldr r3, [r7, #4] - 8004fe0: edd3 7a02 vldr s15, [r3, #8] - 8004fe4: eeb0 0a67 vmov.f32 s0, s15 - 8004fe8: 4610 mov r0, r2 - 8004fea: f7ff faab bl 8004544 <_ZN3ros3Msg19serializeAvrFloat64EPhf> - 8004fee: 4602 mov r2, r0 - 8004ff0: 68fb ldr r3, [r7, #12] - 8004ff2: 4413 add r3, r2 - 8004ff4: 60fb str r3, [r7, #12] - offset += serializeAvrFloat64(outbuffer + offset, this->z); - 8004ff6: 68fb ldr r3, [r7, #12] - 8004ff8: 683a ldr r2, [r7, #0] - 8004ffa: 441a add r2, r3 - 8004ffc: 687b ldr r3, [r7, #4] - 8004ffe: edd3 7a03 vldr s15, [r3, #12] - 8005002: eeb0 0a67 vmov.f32 s0, s15 - 8005006: 4610 mov r0, r2 - 8005008: f7ff fa9c bl 8004544 <_ZN3ros3Msg19serializeAvrFloat64EPhf> - 800500c: 4602 mov r2, r0 - 800500e: 68fb ldr r3, [r7, #12] - 8005010: 4413 add r3, r2 - 8005012: 60fb str r3, [r7, #12] - return offset; - 8005014: 68fb ldr r3, [r7, #12] - } - 8005016: 4618 mov r0, r3 - 8005018: 3710 adds r7, #16 - 800501a: 46bd mov sp, r7 - 800501c: bd80 pop {r7, pc} + /* Configure the Channel 5 in PWM mode */ + TIM_OC5_SetConfig(htim->Instance, sConfig); + 8006d00: 68fb ldr r3, [r7, #12] + 8006d02: 681b ldr r3, [r3, #0] + 8006d04: 68b9 ldr r1, [r7, #8] + 8006d06: 4618 mov r0, r3 + 8006d08: f000 fb84 bl 8007414 -0800501e <_ZN13geometry_msgs7Vector311deserializeEPh>: + /* Set the Preload enable bit for channel5*/ + htim->Instance->CCMR3 |= TIM_CCMR3_OC5PE; + 8006d0c: 68fb ldr r3, [r7, #12] + 8006d0e: 681b ldr r3, [r3, #0] + 8006d10: 6d5a ldr r2, [r3, #84] ; 0x54 + 8006d12: 68fb ldr r3, [r7, #12] + 8006d14: 681b ldr r3, [r3, #0] + 8006d16: f042 0208 orr.w r2, r2, #8 + 8006d1a: 655a str r2, [r3, #84] ; 0x54 - virtual int deserialize(unsigned char *inbuffer) - 800501e: b580 push {r7, lr} - 8005020: b084 sub sp, #16 - 8005022: af00 add r7, sp, #0 - 8005024: 6078 str r0, [r7, #4] - 8005026: 6039 str r1, [r7, #0] + /* Configure the Output Fast mode */ + htim->Instance->CCMR3 &= ~TIM_CCMR3_OC5FE; + 8006d1c: 68fb ldr r3, [r7, #12] + 8006d1e: 681b ldr r3, [r3, #0] + 8006d20: 6d5a ldr r2, [r3, #84] ; 0x54 + 8006d22: 68fb ldr r3, [r7, #12] + 8006d24: 681b ldr r3, [r3, #0] + 8006d26: f022 0204 bic.w r2, r2, #4 + 8006d2a: 655a str r2, [r3, #84] ; 0x54 + htim->Instance->CCMR3 |= sConfig->OCFastMode; + 8006d2c: 68fb ldr r3, [r7, #12] + 8006d2e: 681b ldr r3, [r3, #0] + 8006d30: 6d59 ldr r1, [r3, #84] ; 0x54 + 8006d32: 68bb ldr r3, [r7, #8] + 8006d34: 691a ldr r2, [r3, #16] + 8006d36: 68fb ldr r3, [r7, #12] + 8006d38: 681b ldr r3, [r3, #0] + 8006d3a: 430a orrs r2, r1 + 8006d3c: 655a str r2, [r3, #84] ; 0x54 + break; + 8006d3e: e021 b.n 8006d84 { - int offset = 0; - 8005028: 2300 movs r3, #0 - 800502a: 60fb str r3, [r7, #12] - offset += deserializeAvrFloat64(inbuffer + offset, &(this->x)); - 800502c: 68fb ldr r3, [r7, #12] - 800502e: 683a ldr r2, [r7, #0] - 8005030: 441a add r2, r3 - 8005032: 687b ldr r3, [r7, #4] - 8005034: 3304 adds r3, #4 - 8005036: 4619 mov r1, r3 - 8005038: 4610 mov r0, r2 - 800503a: f7ff faef bl 800461c <_ZN3ros3Msg21deserializeAvrFloat64EPKhPf> - 800503e: 4602 mov r2, r0 - 8005040: 68fb ldr r3, [r7, #12] - 8005042: 4413 add r3, r2 - 8005044: 60fb str r3, [r7, #12] - offset += deserializeAvrFloat64(inbuffer + offset, &(this->y)); - 8005046: 68fb ldr r3, [r7, #12] - 8005048: 683a ldr r2, [r7, #0] - 800504a: 441a add r2, r3 - 800504c: 687b ldr r3, [r7, #4] - 800504e: 3308 adds r3, #8 - 8005050: 4619 mov r1, r3 - 8005052: 4610 mov r0, r2 - 8005054: f7ff fae2 bl 800461c <_ZN3ros3Msg21deserializeAvrFloat64EPKhPf> - 8005058: 4602 mov r2, r0 - 800505a: 68fb ldr r3, [r7, #12] - 800505c: 4413 add r3, r2 - 800505e: 60fb str r3, [r7, #12] - offset += deserializeAvrFloat64(inbuffer + offset, &(this->z)); - 8005060: 68fb ldr r3, [r7, #12] - 8005062: 683a ldr r2, [r7, #0] - 8005064: 441a add r2, r3 - 8005066: 687b ldr r3, [r7, #4] - 8005068: 330c adds r3, #12 - 800506a: 4619 mov r1, r3 - 800506c: 4610 mov r0, r2 - 800506e: f7ff fad5 bl 800461c <_ZN3ros3Msg21deserializeAvrFloat64EPKhPf> - 8005072: 4602 mov r2, r0 - 8005074: 68fb ldr r3, [r7, #12] - 8005076: 4413 add r3, r2 - 8005078: 60fb str r3, [r7, #12] - return offset; - 800507a: 68fb ldr r3, [r7, #12] - } - 800507c: 4618 mov r0, r3 - 800507e: 3710 adds r7, #16 - 8005080: 46bd mov sp, r7 - 8005082: bd80 pop {r7, pc} + /* Check the parameters */ + assert_param(IS_TIM_CC6_INSTANCE(htim->Instance)); -08005084 <_ZN13geometry_msgs7Vector37getTypeEv>: + /* Configure the Channel 6 in PWM mode */ + TIM_OC6_SetConfig(htim->Instance, sConfig); + 8006d40: 68fb ldr r3, [r7, #12] + 8006d42: 681b ldr r3, [r3, #0] + 8006d44: 68b9 ldr r1, [r7, #8] + 8006d46: 4618 mov r0, r3 + 8006d48: f000 fbb6 bl 80074b8 - const char * getType(){ return "geometry_msgs/Vector3"; }; - 8005084: b480 push {r7} - 8005086: b083 sub sp, #12 - 8005088: af00 add r7, sp, #0 - 800508a: 6078 str r0, [r7, #4] - 800508c: 4b03 ldr r3, [pc, #12] ; (800509c <_ZN13geometry_msgs7Vector37getTypeEv+0x18>) - 800508e: 4618 mov r0, r3 - 8005090: 370c adds r7, #12 - 8005092: 46bd mov sp, r7 - 8005094: f85d 7b04 ldr.w r7, [sp], #4 - 8005098: 4770 bx lr - 800509a: bf00 nop - 800509c: 0800a1f0 .word 0x0800a1f0 - -080050a0 <_ZN13geometry_msgs7Vector36getMD5Ev>: - const char * getMD5(){ return "4a842b65f413084dc2b10fb484ea7f17"; }; - 80050a0: b480 push {r7} - 80050a2: b083 sub sp, #12 - 80050a4: af00 add r7, sp, #0 - 80050a6: 6078 str r0, [r7, #4] - 80050a8: 4b03 ldr r3, [pc, #12] ; (80050b8 <_ZN13geometry_msgs7Vector36getMD5Ev+0x18>) - 80050aa: 4618 mov r0, r3 - 80050ac: 370c adds r7, #12 - 80050ae: 46bd mov sp, r7 - 80050b0: f85d 7b04 ldr.w r7, [sp], #4 - 80050b4: 4770 bx lr - 80050b6: bf00 nop - 80050b8: 0800a10c .word 0x0800a10c - -080050bc <_ZN13geometry_msgs5TwistC1Ev>: - typedef geometry_msgs::Vector3 _linear_type; - _linear_type linear; - typedef geometry_msgs::Vector3 _angular_type; - _angular_type angular; + /* Set the Preload enable bit for channel6 */ + htim->Instance->CCMR3 |= TIM_CCMR3_OC6PE; + 8006d4c: 68fb ldr r3, [r7, #12] + 8006d4e: 681b ldr r3, [r3, #0] + 8006d50: 6d5a ldr r2, [r3, #84] ; 0x54 + 8006d52: 68fb ldr r3, [r7, #12] + 8006d54: 681b ldr r3, [r3, #0] + 8006d56: f442 6200 orr.w r2, r2, #2048 ; 0x800 + 8006d5a: 655a str r2, [r3, #84] ; 0x54 - Twist(): - 80050bc: b580 push {r7, lr} - 80050be: b082 sub sp, #8 - 80050c0: af00 add r7, sp, #0 - 80050c2: 6078 str r0, [r7, #4] - linear(), - angular() - 80050c4: 687b ldr r3, [r7, #4] - 80050c6: 4618 mov r0, r3 - 80050c8: f7ff fb1a bl 8004700 <_ZN3ros3MsgC1Ev> - 80050cc: 4a08 ldr r2, [pc, #32] ; (80050f0 <_ZN13geometry_msgs5TwistC1Ev+0x34>) - 80050ce: 687b ldr r3, [r7, #4] - 80050d0: 601a str r2, [r3, #0] - 80050d2: 687b ldr r3, [r7, #4] - 80050d4: 3304 adds r3, #4 - 80050d6: 4618 mov r0, r3 - 80050d8: f7ff ff4a bl 8004f70 <_ZN13geometry_msgs7Vector3C1Ev> - 80050dc: 687b ldr r3, [r7, #4] - 80050de: 3314 adds r3, #20 - 80050e0: 4618 mov r0, r3 - 80050e2: f7ff ff45 bl 8004f70 <_ZN13geometry_msgs7Vector3C1Ev> - { + /* Configure the Output Fast mode */ + htim->Instance->CCMR3 &= ~TIM_CCMR3_OC6FE; + 8006d5c: 68fb ldr r3, [r7, #12] + 8006d5e: 681b ldr r3, [r3, #0] + 8006d60: 6d5a ldr r2, [r3, #84] ; 0x54 + 8006d62: 68fb ldr r3, [r7, #12] + 8006d64: 681b ldr r3, [r3, #0] + 8006d66: f422 6280 bic.w r2, r2, #1024 ; 0x400 + 8006d6a: 655a str r2, [r3, #84] ; 0x54 + htim->Instance->CCMR3 |= sConfig->OCFastMode << 8U; + 8006d6c: 68fb ldr r3, [r7, #12] + 8006d6e: 681b ldr r3, [r3, #0] + 8006d70: 6d59 ldr r1, [r3, #84] ; 0x54 + 8006d72: 68bb ldr r3, [r7, #8] + 8006d74: 691b ldr r3, [r3, #16] + 8006d76: 021a lsls r2, r3, #8 + 8006d78: 68fb ldr r3, [r7, #12] + 8006d7a: 681b ldr r3, [r3, #0] + 8006d7c: 430a orrs r2, r1 + 8006d7e: 655a str r2, [r3, #84] ; 0x54 + break; + 8006d80: e000 b.n 8006d84 } - 80050e6: 687b ldr r3, [r7, #4] - 80050e8: 4618 mov r0, r3 - 80050ea: 3708 adds r7, #8 - 80050ec: 46bd mov sp, r7 - 80050ee: bd80 pop {r7, pc} - 80050f0: 0800a510 .word 0x0800a510 -080050f4 <_ZNK13geometry_msgs5Twist9serializeEPh>: + default: + break; + 8006d82: bf00 nop + } - virtual int serialize(unsigned char *outbuffer) const - 80050f4: b580 push {r7, lr} - 80050f6: b084 sub sp, #16 - 80050f8: af00 add r7, sp, #0 - 80050fa: 6078 str r0, [r7, #4] - 80050fc: 6039 str r1, [r7, #0] - { - int offset = 0; - 80050fe: 2300 movs r3, #0 - 8005100: 60fb str r3, [r7, #12] - offset += this->linear.serialize(outbuffer + offset); - 8005102: 687b ldr r3, [r7, #4] - 8005104: 1d18 adds r0, r3, #4 - 8005106: 68fb ldr r3, [r7, #12] - 8005108: 683a ldr r2, [r7, #0] - 800510a: 4413 add r3, r2 - 800510c: 4619 mov r1, r3 - 800510e: f7ff ff4d bl 8004fac <_ZNK13geometry_msgs7Vector39serializeEPh> - 8005112: 4602 mov r2, r0 - 8005114: 68fb ldr r3, [r7, #12] - 8005116: 4413 add r3, r2 - 8005118: 60fb str r3, [r7, #12] - offset += this->angular.serialize(outbuffer + offset); - 800511a: 687b ldr r3, [r7, #4] - 800511c: f103 0014 add.w r0, r3, #20 - 8005120: 68fb ldr r3, [r7, #12] - 8005122: 683a ldr r2, [r7, #0] - 8005124: 4413 add r3, r2 - 8005126: 4619 mov r1, r3 - 8005128: f7ff ff40 bl 8004fac <_ZNK13geometry_msgs7Vector39serializeEPh> - 800512c: 4602 mov r2, r0 - 800512e: 68fb ldr r3, [r7, #12] - 8005130: 4413 add r3, r2 - 8005132: 60fb str r3, [r7, #12] - return offset; - 8005134: 68fb ldr r3, [r7, #12] - } - 8005136: 4618 mov r0, r3 - 8005138: 3710 adds r7, #16 - 800513a: 46bd mov sp, r7 - 800513c: bd80 pop {r7, pc} + htim->State = HAL_TIM_STATE_READY; + 8006d84: 68fb ldr r3, [r7, #12] + 8006d86: 2201 movs r2, #1 + 8006d88: f883 203d strb.w r2, [r3, #61] ; 0x3d -0800513e <_ZN13geometry_msgs5Twist11deserializeEPh>: + __HAL_UNLOCK(htim); + 8006d8c: 68fb ldr r3, [r7, #12] + 8006d8e: 2200 movs r2, #0 + 8006d90: f883 203c strb.w r2, [r3, #60] ; 0x3c - virtual int deserialize(unsigned char *inbuffer) - 800513e: b580 push {r7, lr} - 8005140: b084 sub sp, #16 - 8005142: af00 add r7, sp, #0 - 8005144: 6078 str r0, [r7, #4] - 8005146: 6039 str r1, [r7, #0] - { - int offset = 0; - 8005148: 2300 movs r3, #0 - 800514a: 60fb str r3, [r7, #12] - offset += this->linear.deserialize(inbuffer + offset); - 800514c: 687b ldr r3, [r7, #4] - 800514e: 1d18 adds r0, r3, #4 - 8005150: 68fb ldr r3, [r7, #12] - 8005152: 683a ldr r2, [r7, #0] - 8005154: 4413 add r3, r2 - 8005156: 4619 mov r1, r3 - 8005158: f7ff ff61 bl 800501e <_ZN13geometry_msgs7Vector311deserializeEPh> - 800515c: 4602 mov r2, r0 - 800515e: 68fb ldr r3, [r7, #12] - 8005160: 4413 add r3, r2 - 8005162: 60fb str r3, [r7, #12] - offset += this->angular.deserialize(inbuffer + offset); - 8005164: 687b ldr r3, [r7, #4] - 8005166: f103 0014 add.w r0, r3, #20 - 800516a: 68fb ldr r3, [r7, #12] - 800516c: 683a ldr r2, [r7, #0] - 800516e: 4413 add r3, r2 - 8005170: 4619 mov r1, r3 - 8005172: f7ff ff54 bl 800501e <_ZN13geometry_msgs7Vector311deserializeEPh> - 8005176: 4602 mov r2, r0 - 8005178: 68fb ldr r3, [r7, #12] - 800517a: 4413 add r3, r2 - 800517c: 60fb str r3, [r7, #12] - return offset; - 800517e: 68fb ldr r3, [r7, #12] - } - 8005180: 4618 mov r0, r3 - 8005182: 3710 adds r7, #16 - 8005184: 46bd mov sp, r7 - 8005186: bd80 pop {r7, pc} + return HAL_OK; + 8006d94: 2300 movs r3, #0 +} + 8006d96: 4618 mov r0, r3 + 8006d98: 3710 adds r7, #16 + 8006d9a: 46bd mov sp, r7 + 8006d9c: bd80 pop {r7, pc} + 8006d9e: bf00 nop -08005188 <_ZN13geometry_msgs5Twist7getTypeEv>: +08006da0 : + * @param sClockSourceConfig pointer to a TIM_ClockConfigTypeDef structure that + * contains the clock source information for the TIM peripheral. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, TIM_ClockConfigTypeDef *sClockSourceConfig) +{ + 8006da0: b580 push {r7, lr} + 8006da2: b084 sub sp, #16 + 8006da4: af00 add r7, sp, #0 + 8006da6: 6078 str r0, [r7, #4] + 8006da8: 6039 str r1, [r7, #0] + uint32_t tmpsmcr; - const char * getType(){ return "geometry_msgs/Twist"; }; - 8005188: b480 push {r7} - 800518a: b083 sub sp, #12 - 800518c: af00 add r7, sp, #0 - 800518e: 6078 str r0, [r7, #4] - 8005190: 4b03 ldr r3, [pc, #12] ; (80051a0 <_ZN13geometry_msgs5Twist7getTypeEv+0x18>) - 8005192: 4618 mov r0, r3 - 8005194: 370c adds r7, #12 - 8005196: 46bd mov sp, r7 - 8005198: f85d 7b04 ldr.w r7, [sp], #4 - 800519c: 4770 bx lr - 800519e: bf00 nop - 80051a0: 0800a208 .word 0x0800a208 - -080051a4 <_ZN13geometry_msgs5Twist6getMD5Ev>: - const char * getMD5(){ return "9f195f881246fdfa2798d1d3eebca84a"; }; - 80051a4: b480 push {r7} - 80051a6: b083 sub sp, #12 - 80051a8: af00 add r7, sp, #0 - 80051aa: 6078 str r0, [r7, #4] - 80051ac: 4b03 ldr r3, [pc, #12] ; (80051bc <_ZN13geometry_msgs5Twist6getMD5Ev+0x18>) - 80051ae: 4618 mov r0, r3 - 80051b0: 370c adds r7, #12 - 80051b2: 46bd mov sp, r7 - 80051b4: f85d 7b04 ldr.w r7, [sp], #4 - 80051b8: 4770 bx lr - 80051ba: bf00 nop - 80051bc: 0800a21c .word 0x0800a21c - -080051c0 <_ZN13geometry_msgs19TwistWithCovarianceC1Ev>: - public: - typedef geometry_msgs::Twist _twist_type; - _twist_type twist; - float covariance[36]; + /* Process Locked */ + __HAL_LOCK(htim); + 8006daa: 687b ldr r3, [r7, #4] + 8006dac: f893 303c ldrb.w r3, [r3, #60] ; 0x3c + 8006db0: 2b01 cmp r3, #1 + 8006db2: d101 bne.n 8006db8 + 8006db4: 2302 movs r3, #2 + 8006db6: e0a6 b.n 8006f06 + 8006db8: 687b ldr r3, [r7, #4] + 8006dba: 2201 movs r2, #1 + 8006dbc: f883 203c strb.w r2, [r3, #60] ; 0x3c - TwistWithCovariance(): - 80051c0: b580 push {r7, lr} - 80051c2: b082 sub sp, #8 - 80051c4: af00 add r7, sp, #0 - 80051c6: 6078 str r0, [r7, #4] - twist(), - covariance() - 80051c8: 687b ldr r3, [r7, #4] - 80051ca: 4618 mov r0, r3 - 80051cc: f7ff fa98 bl 8004700 <_ZN3ros3MsgC1Ev> - 80051d0: 4a0c ldr r2, [pc, #48] ; (8005204 <_ZN13geometry_msgs19TwistWithCovarianceC1Ev+0x44>) - 80051d2: 687b ldr r3, [r7, #4] - 80051d4: 601a str r2, [r3, #0] - 80051d6: 687b ldr r3, [r7, #4] - 80051d8: 3304 adds r3, #4 - 80051da: 4618 mov r0, r3 - 80051dc: f7ff ff6e bl 80050bc <_ZN13geometry_msgs5TwistC1Ev> - 80051e0: 687b ldr r3, [r7, #4] - 80051e2: f103 0228 add.w r2, r3, #40 ; 0x28 - 80051e6: 2323 movs r3, #35 ; 0x23 - 80051e8: 2b00 cmp r3, #0 - 80051ea: db05 blt.n 80051f8 <_ZN13geometry_msgs19TwistWithCovarianceC1Ev+0x38> - 80051ec: f04f 0100 mov.w r1, #0 - 80051f0: 6011 str r1, [r2, #0] - 80051f2: 3204 adds r2, #4 - 80051f4: 3b01 subs r3, #1 - 80051f6: e7f7 b.n 80051e8 <_ZN13geometry_msgs19TwistWithCovarianceC1Ev+0x28> - { - } - 80051f8: 687b ldr r3, [r7, #4] - 80051fa: 4618 mov r0, r3 - 80051fc: 3708 adds r7, #8 - 80051fe: 46bd mov sp, r7 - 8005200: bd80 pop {r7, pc} - 8005202: bf00 nop - 8005204: 0800a4f8 .word 0x0800a4f8 + htim->State = HAL_TIM_STATE_BUSY; + 8006dc0: 687b ldr r3, [r7, #4] + 8006dc2: 2202 movs r2, #2 + 8006dc4: f883 203d strb.w r2, [r3, #61] ; 0x3d -08005208 <_ZNK13geometry_msgs19TwistWithCovariance9serializeEPh>: + /* Check the parameters */ + assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource)); - virtual int serialize(unsigned char *outbuffer) const - 8005208: b580 push {r7, lr} - 800520a: b084 sub sp, #16 - 800520c: af00 add r7, sp, #0 - 800520e: 6078 str r0, [r7, #4] - 8005210: 6039 str r1, [r7, #0] - { - int offset = 0; - 8005212: 2300 movs r3, #0 - 8005214: 60fb str r3, [r7, #12] - offset += this->twist.serialize(outbuffer + offset); - 8005216: 687b ldr r3, [r7, #4] - 8005218: 1d18 adds r0, r3, #4 - 800521a: 68fb ldr r3, [r7, #12] - 800521c: 683a ldr r2, [r7, #0] - 800521e: 4413 add r3, r2 - 8005220: 4619 mov r1, r3 - 8005222: f7ff ff67 bl 80050f4 <_ZNK13geometry_msgs5Twist9serializeEPh> - 8005226: 4602 mov r2, r0 - 8005228: 68fb ldr r3, [r7, #12] - 800522a: 4413 add r3, r2 - 800522c: 60fb str r3, [r7, #12] - for( uint32_t i = 0; i < 36; i++){ - 800522e: 2300 movs r3, #0 - 8005230: 60bb str r3, [r7, #8] - 8005232: 68bb ldr r3, [r7, #8] - 8005234: 2b23 cmp r3, #35 ; 0x23 - 8005236: d816 bhi.n 8005266 <_ZNK13geometry_msgs19TwistWithCovariance9serializeEPh+0x5e> - offset += serializeAvrFloat64(outbuffer + offset, this->covariance[i]); - 8005238: 68fb ldr r3, [r7, #12] - 800523a: 683a ldr r2, [r7, #0] - 800523c: 18d1 adds r1, r2, r3 - 800523e: 687a ldr r2, [r7, #4] - 8005240: 68bb ldr r3, [r7, #8] - 8005242: 330a adds r3, #10 - 8005244: 009b lsls r3, r3, #2 - 8005246: 4413 add r3, r2 - 8005248: edd3 7a00 vldr s15, [r3] - 800524c: eeb0 0a67 vmov.f32 s0, s15 - 8005250: 4608 mov r0, r1 - 8005252: f7ff f977 bl 8004544 <_ZN3ros3Msg19serializeAvrFloat64EPhf> - 8005256: 4602 mov r2, r0 - 8005258: 68fb ldr r3, [r7, #12] - 800525a: 4413 add r3, r2 - 800525c: 60fb str r3, [r7, #12] - for( uint32_t i = 0; i < 36; i++){ - 800525e: 68bb ldr r3, [r7, #8] - 8005260: 3301 adds r3, #1 - 8005262: 60bb str r3, [r7, #8] - 8005264: e7e5 b.n 8005232 <_ZNK13geometry_msgs19TwistWithCovariance9serializeEPh+0x2a> - } - return offset; - 8005266: 68fb ldr r3, [r7, #12] + /* Reset the SMS, TS, ECE, ETPS and ETRF bits */ + tmpsmcr = htim->Instance->SMCR; + 8006dc8: 687b ldr r3, [r7, #4] + 8006dca: 681b ldr r3, [r3, #0] + 8006dcc: 689b ldr r3, [r3, #8] + 8006dce: 60fb str r3, [r7, #12] + tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS); + 8006dd0: 68fa ldr r2, [r7, #12] + 8006dd2: 4b4f ldr r3, [pc, #316] ; (8006f10 ) + 8006dd4: 4013 ands r3, r2 + 8006dd6: 60fb str r3, [r7, #12] + tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); + 8006dd8: 68fb ldr r3, [r7, #12] + 8006dda: f423 437f bic.w r3, r3, #65280 ; 0xff00 + 8006dde: 60fb str r3, [r7, #12] + htim->Instance->SMCR = tmpsmcr; + 8006de0: 687b ldr r3, [r7, #4] + 8006de2: 681b ldr r3, [r3, #0] + 8006de4: 68fa ldr r2, [r7, #12] + 8006de6: 609a str r2, [r3, #8] + + switch (sClockSourceConfig->ClockSource) + 8006de8: 683b ldr r3, [r7, #0] + 8006dea: 681b ldr r3, [r3, #0] + 8006dec: 2b40 cmp r3, #64 ; 0x40 + 8006dee: d067 beq.n 8006ec0 + 8006df0: 2b40 cmp r3, #64 ; 0x40 + 8006df2: d80b bhi.n 8006e0c + 8006df4: 2b10 cmp r3, #16 + 8006df6: d073 beq.n 8006ee0 + 8006df8: 2b10 cmp r3, #16 + 8006dfa: d802 bhi.n 8006e02 + 8006dfc: 2b00 cmp r3, #0 + 8006dfe: d06f beq.n 8006ee0 + TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource); + break; } - 8005268: 4618 mov r0, r3 - 800526a: 3710 adds r7, #16 - 800526c: 46bd mov sp, r7 - 800526e: bd80 pop {r7, pc} -08005270 <_ZN13geometry_msgs19TwistWithCovariance11deserializeEPh>: + default: + break; + 8006e00: e078 b.n 8006ef4 + switch (sClockSourceConfig->ClockSource) + 8006e02: 2b20 cmp r3, #32 + 8006e04: d06c beq.n 8006ee0 + 8006e06: 2b30 cmp r3, #48 ; 0x30 + 8006e08: d06a beq.n 8006ee0 + break; + 8006e0a: e073 b.n 8006ef4 + switch (sClockSourceConfig->ClockSource) + 8006e0c: 2b70 cmp r3, #112 ; 0x70 + 8006e0e: d00d beq.n 8006e2c + 8006e10: 2b70 cmp r3, #112 ; 0x70 + 8006e12: d804 bhi.n 8006e1e + 8006e14: 2b50 cmp r3, #80 ; 0x50 + 8006e16: d033 beq.n 8006e80 + 8006e18: 2b60 cmp r3, #96 ; 0x60 + 8006e1a: d041 beq.n 8006ea0 + break; + 8006e1c: e06a b.n 8006ef4 + switch (sClockSourceConfig->ClockSource) + 8006e1e: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 + 8006e22: d066 beq.n 8006ef2 + 8006e24: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 + 8006e28: d017 beq.n 8006e5a + break; + 8006e2a: e063 b.n 8006ef4 + TIM_ETR_SetConfig(htim->Instance, + 8006e2c: 687b ldr r3, [r7, #4] + 8006e2e: 6818 ldr r0, [r3, #0] + 8006e30: 683b ldr r3, [r7, #0] + 8006e32: 6899 ldr r1, [r3, #8] + 8006e34: 683b ldr r3, [r7, #0] + 8006e36: 685a ldr r2, [r3, #4] + 8006e38: 683b ldr r3, [r7, #0] + 8006e3a: 68db ldr r3, [r3, #12] + 8006e3c: f000 fc0a bl 8007654 + tmpsmcr = htim->Instance->SMCR; + 8006e40: 687b ldr r3, [r7, #4] + 8006e42: 681b ldr r3, [r3, #0] + 8006e44: 689b ldr r3, [r3, #8] + 8006e46: 60fb str r3, [r7, #12] + tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1); + 8006e48: 68fb ldr r3, [r7, #12] + 8006e4a: f043 0377 orr.w r3, r3, #119 ; 0x77 + 8006e4e: 60fb str r3, [r7, #12] + htim->Instance->SMCR = tmpsmcr; + 8006e50: 687b ldr r3, [r7, #4] + 8006e52: 681b ldr r3, [r3, #0] + 8006e54: 68fa ldr r2, [r7, #12] + 8006e56: 609a str r2, [r3, #8] + break; + 8006e58: e04c b.n 8006ef4 + TIM_ETR_SetConfig(htim->Instance, + 8006e5a: 687b ldr r3, [r7, #4] + 8006e5c: 6818 ldr r0, [r3, #0] + 8006e5e: 683b ldr r3, [r7, #0] + 8006e60: 6899 ldr r1, [r3, #8] + 8006e62: 683b ldr r3, [r7, #0] + 8006e64: 685a ldr r2, [r3, #4] + 8006e66: 683b ldr r3, [r7, #0] + 8006e68: 68db ldr r3, [r3, #12] + 8006e6a: f000 fbf3 bl 8007654 + htim->Instance->SMCR |= TIM_SMCR_ECE; + 8006e6e: 687b ldr r3, [r7, #4] + 8006e70: 681b ldr r3, [r3, #0] + 8006e72: 689a ldr r2, [r3, #8] + 8006e74: 687b ldr r3, [r7, #4] + 8006e76: 681b ldr r3, [r3, #0] + 8006e78: f442 4280 orr.w r2, r2, #16384 ; 0x4000 + 8006e7c: 609a str r2, [r3, #8] + break; + 8006e7e: e039 b.n 8006ef4 + TIM_TI1_ConfigInputStage(htim->Instance, + 8006e80: 687b ldr r3, [r7, #4] + 8006e82: 6818 ldr r0, [r3, #0] + 8006e84: 683b ldr r3, [r7, #0] + 8006e86: 6859 ldr r1, [r3, #4] + 8006e88: 683b ldr r3, [r7, #0] + 8006e8a: 68db ldr r3, [r3, #12] + 8006e8c: 461a mov r2, r3 + 8006e8e: f000 fb67 bl 8007560 + TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1); + 8006e92: 687b ldr r3, [r7, #4] + 8006e94: 681b ldr r3, [r3, #0] + 8006e96: 2150 movs r1, #80 ; 0x50 + 8006e98: 4618 mov r0, r3 + 8006e9a: f000 fbc0 bl 800761e + break; + 8006e9e: e029 b.n 8006ef4 + TIM_TI2_ConfigInputStage(htim->Instance, + 8006ea0: 687b ldr r3, [r7, #4] + 8006ea2: 6818 ldr r0, [r3, #0] + 8006ea4: 683b ldr r3, [r7, #0] + 8006ea6: 6859 ldr r1, [r3, #4] + 8006ea8: 683b ldr r3, [r7, #0] + 8006eaa: 68db ldr r3, [r3, #12] + 8006eac: 461a mov r2, r3 + 8006eae: f000 fb86 bl 80075be + TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2); + 8006eb2: 687b ldr r3, [r7, #4] + 8006eb4: 681b ldr r3, [r3, #0] + 8006eb6: 2160 movs r1, #96 ; 0x60 + 8006eb8: 4618 mov r0, r3 + 8006eba: f000 fbb0 bl 800761e + break; + 8006ebe: e019 b.n 8006ef4 + TIM_TI1_ConfigInputStage(htim->Instance, + 8006ec0: 687b ldr r3, [r7, #4] + 8006ec2: 6818 ldr r0, [r3, #0] + 8006ec4: 683b ldr r3, [r7, #0] + 8006ec6: 6859 ldr r1, [r3, #4] + 8006ec8: 683b ldr r3, [r7, #0] + 8006eca: 68db ldr r3, [r3, #12] + 8006ecc: 461a mov r2, r3 + 8006ece: f000 fb47 bl 8007560 + TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED); + 8006ed2: 687b ldr r3, [r7, #4] + 8006ed4: 681b ldr r3, [r3, #0] + 8006ed6: 2140 movs r1, #64 ; 0x40 + 8006ed8: 4618 mov r0, r3 + 8006eda: f000 fba0 bl 800761e + break; + 8006ede: e009 b.n 8006ef4 + TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource); + 8006ee0: 687b ldr r3, [r7, #4] + 8006ee2: 681a ldr r2, [r3, #0] + 8006ee4: 683b ldr r3, [r7, #0] + 8006ee6: 681b ldr r3, [r3, #0] + 8006ee8: 4619 mov r1, r3 + 8006eea: 4610 mov r0, r2 + 8006eec: f000 fb97 bl 800761e + break; + 8006ef0: e000 b.n 8006ef4 + break; + 8006ef2: bf00 nop + } + htim->State = HAL_TIM_STATE_READY; + 8006ef4: 687b ldr r3, [r7, #4] + 8006ef6: 2201 movs r2, #1 + 8006ef8: f883 203d strb.w r2, [r3, #61] ; 0x3d + + __HAL_UNLOCK(htim); + 8006efc: 687b ldr r3, [r7, #4] + 8006efe: 2200 movs r2, #0 + 8006f00: f883 203c strb.w r2, [r3, #60] ; 0x3c - virtual int deserialize(unsigned char *inbuffer) - 8005270: b580 push {r7, lr} - 8005272: b084 sub sp, #16 - 8005274: af00 add r7, sp, #0 - 8005276: 6078 str r0, [r7, #4] - 8005278: 6039 str r1, [r7, #0] - { - int offset = 0; - 800527a: 2300 movs r3, #0 - 800527c: 60fb str r3, [r7, #12] - offset += this->twist.deserialize(inbuffer + offset); - 800527e: 687b ldr r3, [r7, #4] - 8005280: 1d18 adds r0, r3, #4 - 8005282: 68fb ldr r3, [r7, #12] - 8005284: 683a ldr r2, [r7, #0] - 8005286: 4413 add r3, r2 - 8005288: 4619 mov r1, r3 - 800528a: f7ff ff58 bl 800513e <_ZN13geometry_msgs5Twist11deserializeEPh> - 800528e: 4602 mov r2, r0 - 8005290: 68fb ldr r3, [r7, #12] - 8005292: 4413 add r3, r2 - 8005294: 60fb str r3, [r7, #12] - for( uint32_t i = 0; i < 36; i++){ - 8005296: 2300 movs r3, #0 - 8005298: 60bb str r3, [r7, #8] - 800529a: 68bb ldr r3, [r7, #8] - 800529c: 2b23 cmp r3, #35 ; 0x23 - 800529e: d812 bhi.n 80052c6 <_ZN13geometry_msgs19TwistWithCovariance11deserializeEPh+0x56> - offset += deserializeAvrFloat64(inbuffer + offset, &(this->covariance[i])); - 80052a0: 68fb ldr r3, [r7, #12] - 80052a2: 683a ldr r2, [r7, #0] - 80052a4: 18d0 adds r0, r2, r3 - 80052a6: 68bb ldr r3, [r7, #8] - 80052a8: 330a adds r3, #10 - 80052aa: 009b lsls r3, r3, #2 - 80052ac: 687a ldr r2, [r7, #4] - 80052ae: 4413 add r3, r2 - 80052b0: 4619 mov r1, r3 - 80052b2: f7ff f9b3 bl 800461c <_ZN3ros3Msg21deserializeAvrFloat64EPKhPf> - 80052b6: 4602 mov r2, r0 - 80052b8: 68fb ldr r3, [r7, #12] - 80052ba: 4413 add r3, r2 - 80052bc: 60fb str r3, [r7, #12] - for( uint32_t i = 0; i < 36; i++){ - 80052be: 68bb ldr r3, [r7, #8] - 80052c0: 3301 adds r3, #1 - 80052c2: 60bb str r3, [r7, #8] - 80052c4: e7e9 b.n 800529a <_ZN13geometry_msgs19TwistWithCovariance11deserializeEPh+0x2a> - } - return offset; - 80052c6: 68fb ldr r3, [r7, #12] - } - 80052c8: 4618 mov r0, r3 - 80052ca: 3710 adds r7, #16 - 80052cc: 46bd mov sp, r7 - 80052ce: bd80 pop {r7, pc} + return HAL_OK; + 8006f04: 2300 movs r3, #0 +} + 8006f06: 4618 mov r0, r3 + 8006f08: 3710 adds r7, #16 + 8006f0a: 46bd mov sp, r7 + 8006f0c: bd80 pop {r7, pc} + 8006f0e: bf00 nop + 8006f10: fffeff88 .word 0xfffeff88 + +08006f14 : + * @brief Output Compare callback in non-blocking mode + * @param htim TIM OC handle + * @retval None + */ +__weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim) +{ + 8006f14: b480 push {r7} + 8006f16: b083 sub sp, #12 + 8006f18: af00 add r7, sp, #0 + 8006f1a: 6078 str r0, [r7, #4] + UNUSED(htim); -080052d0 <_ZN13geometry_msgs19TwistWithCovariance7getTypeEv>: + /* NOTE : This function should not be modified, when the callback is needed, + the HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file + */ +} + 8006f1c: bf00 nop + 8006f1e: 370c adds r7, #12 + 8006f20: 46bd mov sp, r7 + 8006f22: f85d 7b04 ldr.w r7, [sp], #4 + 8006f26: 4770 bx lr - const char * getType(){ return "geometry_msgs/TwistWithCovariance"; }; - 80052d0: b480 push {r7} - 80052d2: b083 sub sp, #12 - 80052d4: af00 add r7, sp, #0 - 80052d6: 6078 str r0, [r7, #4] - 80052d8: 4b03 ldr r3, [pc, #12] ; (80052e8 <_ZN13geometry_msgs19TwistWithCovariance7getTypeEv+0x18>) - 80052da: 4618 mov r0, r3 - 80052dc: 370c adds r7, #12 - 80052de: 46bd mov sp, r7 - 80052e0: f85d 7b04 ldr.w r7, [sp], #4 - 80052e4: 4770 bx lr - 80052e6: bf00 nop - 80052e8: 0800a240 .word 0x0800a240 - -080052ec <_ZN13geometry_msgs19TwistWithCovariance6getMD5Ev>: - const char * getMD5(){ return "1fe8a28e6890a4cc3ae4c3ca5c7d82e6"; }; - 80052ec: b480 push {r7} - 80052ee: b083 sub sp, #12 - 80052f0: af00 add r7, sp, #0 - 80052f2: 6078 str r0, [r7, #4] - 80052f4: 4b03 ldr r3, [pc, #12] ; (8005304 <_ZN13geometry_msgs19TwistWithCovariance6getMD5Ev+0x18>) - 80052f6: 4618 mov r0, r3 - 80052f8: 370c adds r7, #12 - 80052fa: 46bd mov sp, r7 - 80052fc: f85d 7b04 ldr.w r7, [sp], #4 - 8005300: 4770 bx lr - 8005302: bf00 nop - 8005304: 0800a264 .word 0x0800a264 - -08005308 <_ZN8nav_msgs8OdometryC1Ev>: - typedef geometry_msgs::PoseWithCovariance _pose_type; - _pose_type pose; - typedef geometry_msgs::TwistWithCovariance _twist_type; - _twist_type twist; +08006f28 : + * @brief Input Capture callback in non-blocking mode + * @param htim TIM IC handle + * @retval None + */ +__weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim) +{ + 8006f28: b480 push {r7} + 8006f2a: b083 sub sp, #12 + 8006f2c: af00 add r7, sp, #0 + 8006f2e: 6078 str r0, [r7, #4] + UNUSED(htim); - Odometry(): - 8005308: b580 push {r7, lr} - 800530a: b082 sub sp, #8 - 800530c: af00 add r7, sp, #0 - 800530e: 6078 str r0, [r7, #4] - header(), - child_frame_id(""), - pose(), - twist() - 8005310: 687b ldr r3, [r7, #4] - 8005312: 4618 mov r0, r3 - 8005314: f7ff f9f4 bl 8004700 <_ZN3ros3MsgC1Ev> - 8005318: 4a0c ldr r2, [pc, #48] ; (800534c <_ZN8nav_msgs8OdometryC1Ev+0x44>) - 800531a: 687b ldr r3, [r7, #4] - 800531c: 601a str r2, [r3, #0] - 800531e: 687b ldr r3, [r7, #4] - 8005320: 3304 adds r3, #4 - 8005322: 4618 mov r0, r3 - 8005324: f7ff f9fc bl 8004720 <_ZN8std_msgs6HeaderC1Ev> - 8005328: 687b ldr r3, [r7, #4] - 800532a: 4a09 ldr r2, [pc, #36] ; (8005350 <_ZN8nav_msgs8OdometryC1Ev+0x48>) - 800532c: 619a str r2, [r3, #24] - 800532e: 687b ldr r3, [r7, #4] - 8005330: 331c adds r3, #28 - 8005332: 4618 mov r0, r3 - 8005334: f7ff fd76 bl 8004e24 <_ZN13geometry_msgs18PoseWithCovarianceC1Ev> - 8005338: 687b ldr r3, [r7, #4] - 800533a: 33d8 adds r3, #216 ; 0xd8 - 800533c: 4618 mov r0, r3 - 800533e: f7ff ff3f bl 80051c0 <_ZN13geometry_msgs19TwistWithCovarianceC1Ev> - { - } - 8005342: 687b ldr r3, [r7, #4] - 8005344: 4618 mov r0, r3 - 8005346: 3708 adds r7, #8 - 8005348: 46bd mov sp, r7 - 800534a: bd80 pop {r7, pc} - 800534c: 0800a4e0 .word 0x0800a4e0 - 8005350: 0800a0c0 .word 0x0800a0c0 + /* NOTE : This function should not be modified, when the callback is needed, + the HAL_TIM_IC_CaptureCallback could be implemented in the user file + */ +} + 8006f30: bf00 nop + 8006f32: 370c adds r7, #12 + 8006f34: 46bd mov sp, r7 + 8006f36: f85d 7b04 ldr.w r7, [sp], #4 + 8006f3a: 4770 bx lr -08005354 <_ZNK8nav_msgs8Odometry9serializeEPh>: +08006f3c : + * @brief PWM Pulse finished callback in non-blocking mode + * @param htim TIM handle + * @retval None + */ +__weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim) +{ + 8006f3c: b480 push {r7} + 8006f3e: b083 sub sp, #12 + 8006f40: af00 add r7, sp, #0 + 8006f42: 6078 str r0, [r7, #4] + UNUSED(htim); - virtual int serialize(unsigned char *outbuffer) const - 8005354: b580 push {r7, lr} - 8005356: b084 sub sp, #16 - 8005358: af00 add r7, sp, #0 - 800535a: 6078 str r0, [r7, #4] - 800535c: 6039 str r1, [r7, #0] - { - int offset = 0; - 800535e: 2300 movs r3, #0 - 8005360: 60fb str r3, [r7, #12] - offset += this->header.serialize(outbuffer + offset); - 8005362: 687b ldr r3, [r7, #4] - 8005364: 1d18 adds r0, r3, #4 - 8005366: 68fb ldr r3, [r7, #12] - 8005368: 683a ldr r2, [r7, #0] - 800536a: 4413 add r3, r2 - 800536c: 4619 mov r1, r3 - 800536e: f7ff f9f7 bl 8004760 <_ZNK8std_msgs6Header9serializeEPh> - 8005372: 4602 mov r2, r0 - 8005374: 68fb ldr r3, [r7, #12] - 8005376: 4413 add r3, r2 - 8005378: 60fb str r3, [r7, #12] - uint32_t length_child_frame_id = strlen(this->child_frame_id); - 800537a: 687b ldr r3, [r7, #4] - 800537c: 699b ldr r3, [r3, #24] - 800537e: 4618 mov r0, r3 - 8005380: f7fa ff5a bl 8000238 - 8005384: 60b8 str r0, [r7, #8] - varToArr(outbuffer + offset, length_child_frame_id); - 8005386: 68fb ldr r3, [r7, #12] - 8005388: 683a ldr r2, [r7, #0] - 800538a: 4413 add r3, r2 - 800538c: 68b9 ldr r1, [r7, #8] - 800538e: 4618 mov r0, r3 - 8005390: f001 fe5d bl 800704e <_ZN3ros3Msg8varToArrIPhmEEvT_T0_> - offset += 4; - 8005394: 68fb ldr r3, [r7, #12] - 8005396: 3304 adds r3, #4 - 8005398: 60fb str r3, [r7, #12] - memcpy(outbuffer + offset, this->child_frame_id, length_child_frame_id); - 800539a: 68fb ldr r3, [r7, #12] - 800539c: 683a ldr r2, [r7, #0] - 800539e: 18d0 adds r0, r2, r3 - 80053a0: 687b ldr r3, [r7, #4] - 80053a2: 699b ldr r3, [r3, #24] - 80053a4: 68ba ldr r2, [r7, #8] - 80053a6: 4619 mov r1, r3 - 80053a8: f004 fd36 bl 8009e18 - offset += length_child_frame_id; - 80053ac: 68fa ldr r2, [r7, #12] - 80053ae: 68bb ldr r3, [r7, #8] - 80053b0: 4413 add r3, r2 - 80053b2: 60fb str r3, [r7, #12] - offset += this->pose.serialize(outbuffer + offset); - 80053b4: 687b ldr r3, [r7, #4] - 80053b6: f103 001c add.w r0, r3, #28 - 80053ba: 68fb ldr r3, [r7, #12] - 80053bc: 683a ldr r2, [r7, #0] - 80053be: 4413 add r3, r2 - 80053c0: 4619 mov r1, r3 - 80053c2: f7ff fd53 bl 8004e6c <_ZNK13geometry_msgs18PoseWithCovariance9serializeEPh> - 80053c6: 4602 mov r2, r0 - 80053c8: 68fb ldr r3, [r7, #12] - 80053ca: 4413 add r3, r2 - 80053cc: 60fb str r3, [r7, #12] - offset += this->twist.serialize(outbuffer + offset); - 80053ce: 687b ldr r3, [r7, #4] - 80053d0: f103 00d8 add.w r0, r3, #216 ; 0xd8 - 80053d4: 68fb ldr r3, [r7, #12] - 80053d6: 683a ldr r2, [r7, #0] - 80053d8: 4413 add r3, r2 - 80053da: 4619 mov r1, r3 - 80053dc: f7ff ff14 bl 8005208 <_ZNK13geometry_msgs19TwistWithCovariance9serializeEPh> - 80053e0: 4602 mov r2, r0 - 80053e2: 68fb ldr r3, [r7, #12] - 80053e4: 4413 add r3, r2 - 80053e6: 60fb str r3, [r7, #12] - return offset; - 80053e8: 68fb ldr r3, [r7, #12] - } - 80053ea: 4618 mov r0, r3 - 80053ec: 3710 adds r7, #16 - 80053ee: 46bd mov sp, r7 - 80053f0: bd80 pop {r7, pc} + /* NOTE : This function should not be modified, when the callback is needed, + the HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file + */ +} + 8006f44: bf00 nop + 8006f46: 370c adds r7, #12 + 8006f48: 46bd mov sp, r7 + 8006f4a: f85d 7b04 ldr.w r7, [sp], #4 + 8006f4e: 4770 bx lr -080053f2 <_ZN8nav_msgs8Odometry11deserializeEPh>: +08006f50 : + * @brief Hall Trigger detection callback in non-blocking mode + * @param htim TIM handle + * @retval None + */ +__weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim) +{ + 8006f50: b480 push {r7} + 8006f52: b083 sub sp, #12 + 8006f54: af00 add r7, sp, #0 + 8006f56: 6078 str r0, [r7, #4] + UNUSED(htim); - virtual int deserialize(unsigned char *inbuffer) - 80053f2: b580 push {r7, lr} - 80053f4: b086 sub sp, #24 - 80053f6: af00 add r7, sp, #0 - 80053f8: 6078 str r0, [r7, #4] - 80053fa: 6039 str r1, [r7, #0] - { - int offset = 0; - 80053fc: 2300 movs r3, #0 - 80053fe: 613b str r3, [r7, #16] - offset += this->header.deserialize(inbuffer + offset); - 8005400: 687b ldr r3, [r7, #4] - 8005402: 1d18 adds r0, r3, #4 - 8005404: 693b ldr r3, [r7, #16] - 8005406: 683a ldr r2, [r7, #0] - 8005408: 4413 add r3, r2 - 800540a: 4619 mov r1, r3 - 800540c: f7ff fa40 bl 8004890 <_ZN8std_msgs6Header11deserializeEPh> - 8005410: 4602 mov r2, r0 - 8005412: 693b ldr r3, [r7, #16] - 8005414: 4413 add r3, r2 - 8005416: 613b str r3, [r7, #16] - uint32_t length_child_frame_id; - arrToVar(length_child_frame_id, (inbuffer + offset)); - 8005418: 693b ldr r3, [r7, #16] - 800541a: 683a ldr r2, [r7, #0] - 800541c: 441a add r2, r3 - 800541e: f107 030c add.w r3, r7, #12 - 8005422: 4611 mov r1, r2 - 8005424: 4618 mov r0, r3 - 8005426: f001 fe30 bl 800708a <_ZN3ros3Msg8arrToVarImPhEEvRT_T0_> - offset += 4; - 800542a: 693b ldr r3, [r7, #16] - 800542c: 3304 adds r3, #4 - 800542e: 613b str r3, [r7, #16] - for(unsigned int k= offset; k< offset+length_child_frame_id; ++k){ - 8005430: 693b ldr r3, [r7, #16] - 8005432: 617b str r3, [r7, #20] - 8005434: 693a ldr r2, [r7, #16] - 8005436: 68fb ldr r3, [r7, #12] - 8005438: 4413 add r3, r2 - 800543a: 697a ldr r2, [r7, #20] - 800543c: 429a cmp r2, r3 - 800543e: d20c bcs.n 800545a <_ZN8nav_msgs8Odometry11deserializeEPh+0x68> - inbuffer[k-1]=inbuffer[k]; - 8005440: 683a ldr r2, [r7, #0] - 8005442: 697b ldr r3, [r7, #20] - 8005444: 441a add r2, r3 - 8005446: 697b ldr r3, [r7, #20] - 8005448: 3b01 subs r3, #1 - 800544a: 6839 ldr r1, [r7, #0] - 800544c: 440b add r3, r1 - 800544e: 7812 ldrb r2, [r2, #0] - 8005450: 701a strb r2, [r3, #0] - for(unsigned int k= offset; k< offset+length_child_frame_id; ++k){ - 8005452: 697b ldr r3, [r7, #20] - 8005454: 3301 adds r3, #1 - 8005456: 617b str r3, [r7, #20] - 8005458: e7ec b.n 8005434 <_ZN8nav_msgs8Odometry11deserializeEPh+0x42> - } - inbuffer[offset+length_child_frame_id-1]=0; - 800545a: 693a ldr r2, [r7, #16] - 800545c: 68fb ldr r3, [r7, #12] - 800545e: 4413 add r3, r2 - 8005460: 3b01 subs r3, #1 - 8005462: 683a ldr r2, [r7, #0] - 8005464: 4413 add r3, r2 - 8005466: 2200 movs r2, #0 - 8005468: 701a strb r2, [r3, #0] - this->child_frame_id = (char *)(inbuffer + offset-1); - 800546a: 693b ldr r3, [r7, #16] - 800546c: 3b01 subs r3, #1 - 800546e: 683a ldr r2, [r7, #0] - 8005470: 441a add r2, r3 - 8005472: 687b ldr r3, [r7, #4] - 8005474: 619a str r2, [r3, #24] - offset += length_child_frame_id; - 8005476: 693a ldr r2, [r7, #16] - 8005478: 68fb ldr r3, [r7, #12] - 800547a: 4413 add r3, r2 - 800547c: 613b str r3, [r7, #16] - offset += this->pose.deserialize(inbuffer + offset); - 800547e: 687b ldr r3, [r7, #4] - 8005480: f103 001c add.w r0, r3, #28 - 8005484: 693b ldr r3, [r7, #16] - 8005486: 683a ldr r2, [r7, #0] - 8005488: 4413 add r3, r2 - 800548a: 4619 mov r1, r3 - 800548c: f7ff fd23 bl 8004ed6 <_ZN13geometry_msgs18PoseWithCovariance11deserializeEPh> - 8005490: 4602 mov r2, r0 - 8005492: 693b ldr r3, [r7, #16] - 8005494: 4413 add r3, r2 - 8005496: 613b str r3, [r7, #16] - offset += this->twist.deserialize(inbuffer + offset); - 8005498: 687b ldr r3, [r7, #4] - 800549a: f103 00d8 add.w r0, r3, #216 ; 0xd8 - 800549e: 693b ldr r3, [r7, #16] - 80054a0: 683a ldr r2, [r7, #0] - 80054a2: 4413 add r3, r2 - 80054a4: 4619 mov r1, r3 - 80054a6: f7ff fee3 bl 8005270 <_ZN13geometry_msgs19TwistWithCovariance11deserializeEPh> - 80054aa: 4602 mov r2, r0 - 80054ac: 693b ldr r3, [r7, #16] - 80054ae: 4413 add r3, r2 - 80054b0: 613b str r3, [r7, #16] - return offset; - 80054b2: 693b ldr r3, [r7, #16] - } - 80054b4: 4618 mov r0, r3 - 80054b6: 3718 adds r7, #24 - 80054b8: 46bd mov sp, r7 - 80054ba: bd80 pop {r7, pc} + /* NOTE : This function should not be modified, when the callback is needed, + the HAL_TIM_TriggerCallback could be implemented in the user file + */ +} + 8006f58: bf00 nop + 8006f5a: 370c adds r7, #12 + 8006f5c: 46bd mov sp, r7 + 8006f5e: f85d 7b04 ldr.w r7, [sp], #4 + 8006f62: 4770 bx lr + +08006f64 : + * @param TIMx TIM peripheral + * @param Structure TIM Base configuration structure + * @retval None + */ +void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure) +{ + 8006f64: b480 push {r7} + 8006f66: b085 sub sp, #20 + 8006f68: af00 add r7, sp, #0 + 8006f6a: 6078 str r0, [r7, #4] + 8006f6c: 6039 str r1, [r7, #0] + uint32_t tmpcr1; + tmpcr1 = TIMx->CR1; + 8006f6e: 687b ldr r3, [r7, #4] + 8006f70: 681b ldr r3, [r3, #0] + 8006f72: 60fb str r3, [r7, #12] + + /* Set TIM Time Base Unit parameters ---------------------------------------*/ + if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) + 8006f74: 687b ldr r3, [r7, #4] + 8006f76: 4a40 ldr r2, [pc, #256] ; (8007078 ) + 8006f78: 4293 cmp r3, r2 + 8006f7a: d013 beq.n 8006fa4 + 8006f7c: 687b ldr r3, [r7, #4] + 8006f7e: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 + 8006f82: d00f beq.n 8006fa4 + 8006f84: 687b ldr r3, [r7, #4] + 8006f86: 4a3d ldr r2, [pc, #244] ; (800707c ) + 8006f88: 4293 cmp r3, r2 + 8006f8a: d00b beq.n 8006fa4 + 8006f8c: 687b ldr r3, [r7, #4] + 8006f8e: 4a3c ldr r2, [pc, #240] ; (8007080 ) + 8006f90: 4293 cmp r3, r2 + 8006f92: d007 beq.n 8006fa4 + 8006f94: 687b ldr r3, [r7, #4] + 8006f96: 4a3b ldr r2, [pc, #236] ; (8007084 ) + 8006f98: 4293 cmp r3, r2 + 8006f9a: d003 beq.n 8006fa4 + 8006f9c: 687b ldr r3, [r7, #4] + 8006f9e: 4a3a ldr r2, [pc, #232] ; (8007088 ) + 8006fa0: 4293 cmp r3, r2 + 8006fa2: d108 bne.n 8006fb6 + { + /* Select the Counter Mode */ + tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); + 8006fa4: 68fb ldr r3, [r7, #12] + 8006fa6: f023 0370 bic.w r3, r3, #112 ; 0x70 + 8006faa: 60fb str r3, [r7, #12] + tmpcr1 |= Structure->CounterMode; + 8006fac: 683b ldr r3, [r7, #0] + 8006fae: 685b ldr r3, [r3, #4] + 8006fb0: 68fa ldr r2, [r7, #12] + 8006fb2: 4313 orrs r3, r2 + 8006fb4: 60fb str r3, [r7, #12] + } -080054bc <_ZN8nav_msgs8Odometry7getTypeEv>: + if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) + 8006fb6: 687b ldr r3, [r7, #4] + 8006fb8: 4a2f ldr r2, [pc, #188] ; (8007078 ) + 8006fba: 4293 cmp r3, r2 + 8006fbc: d02b beq.n 8007016 + 8006fbe: 687b ldr r3, [r7, #4] + 8006fc0: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 + 8006fc4: d027 beq.n 8007016 + 8006fc6: 687b ldr r3, [r7, #4] + 8006fc8: 4a2c ldr r2, [pc, #176] ; (800707c ) + 8006fca: 4293 cmp r3, r2 + 8006fcc: d023 beq.n 8007016 + 8006fce: 687b ldr r3, [r7, #4] + 8006fd0: 4a2b ldr r2, [pc, #172] ; (8007080 ) + 8006fd2: 4293 cmp r3, r2 + 8006fd4: d01f beq.n 8007016 + 8006fd6: 687b ldr r3, [r7, #4] + 8006fd8: 4a2a ldr r2, [pc, #168] ; (8007084 ) + 8006fda: 4293 cmp r3, r2 + 8006fdc: d01b beq.n 8007016 + 8006fde: 687b ldr r3, [r7, #4] + 8006fe0: 4a29 ldr r2, [pc, #164] ; (8007088 ) + 8006fe2: 4293 cmp r3, r2 + 8006fe4: d017 beq.n 8007016 + 8006fe6: 687b ldr r3, [r7, #4] + 8006fe8: 4a28 ldr r2, [pc, #160] ; (800708c ) + 8006fea: 4293 cmp r3, r2 + 8006fec: d013 beq.n 8007016 + 8006fee: 687b ldr r3, [r7, #4] + 8006ff0: 4a27 ldr r2, [pc, #156] ; (8007090 ) + 8006ff2: 4293 cmp r3, r2 + 8006ff4: d00f beq.n 8007016 + 8006ff6: 687b ldr r3, [r7, #4] + 8006ff8: 4a26 ldr r2, [pc, #152] ; (8007094 ) + 8006ffa: 4293 cmp r3, r2 + 8006ffc: d00b beq.n 8007016 + 8006ffe: 687b ldr r3, [r7, #4] + 8007000: 4a25 ldr r2, [pc, #148] ; (8007098 ) + 8007002: 4293 cmp r3, r2 + 8007004: d007 beq.n 8007016 + 8007006: 687b ldr r3, [r7, #4] + 8007008: 4a24 ldr r2, [pc, #144] ; (800709c ) + 800700a: 4293 cmp r3, r2 + 800700c: d003 beq.n 8007016 + 800700e: 687b ldr r3, [r7, #4] + 8007010: 4a23 ldr r2, [pc, #140] ; (80070a0 ) + 8007012: 4293 cmp r3, r2 + 8007014: d108 bne.n 8007028 + { + /* Set the clock division */ + tmpcr1 &= ~TIM_CR1_CKD; + 8007016: 68fb ldr r3, [r7, #12] + 8007018: f423 7340 bic.w r3, r3, #768 ; 0x300 + 800701c: 60fb str r3, [r7, #12] + tmpcr1 |= (uint32_t)Structure->ClockDivision; + 800701e: 683b ldr r3, [r7, #0] + 8007020: 68db ldr r3, [r3, #12] + 8007022: 68fa ldr r2, [r7, #12] + 8007024: 4313 orrs r3, r2 + 8007026: 60fb str r3, [r7, #12] + } - const char * getType(){ return "nav_msgs/Odometry"; }; - 80054bc: b480 push {r7} - 80054be: b083 sub sp, #12 - 80054c0: af00 add r7, sp, #0 - 80054c2: 6078 str r0, [r7, #4] - 80054c4: 4b03 ldr r3, [pc, #12] ; (80054d4 <_ZN8nav_msgs8Odometry7getTypeEv+0x18>) - 80054c6: 4618 mov r0, r3 - 80054c8: 370c adds r7, #12 - 80054ca: 46bd mov sp, r7 - 80054cc: f85d 7b04 ldr.w r7, [sp], #4 - 80054d0: 4770 bx lr - 80054d2: bf00 nop - 80054d4: 0800a288 .word 0x0800a288 - -080054d8 <_ZN8nav_msgs8Odometry6getMD5Ev>: - const char * getMD5(){ return "cd5e73d190d741a2f92e81eda573aca7"; }; - 80054d8: b480 push {r7} - 80054da: b083 sub sp, #12 - 80054dc: af00 add r7, sp, #0 - 80054de: 6078 str r0, [r7, #4] - 80054e0: 4b03 ldr r3, [pc, #12] ; (80054f0 <_ZN8nav_msgs8Odometry6getMD5Ev+0x18>) - 80054e2: 4618 mov r0, r3 - 80054e4: 370c adds r7, #12 - 80054e6: 46bd mov sp, r7 - 80054e8: f85d 7b04 ldr.w r7, [sp], #4 - 80054ec: 4770 bx lr - 80054ee: bf00 nop - 80054f0: 0800a29c .word 0x0800a29c - -080054f4 <_ZN12OdometryCalcC1E7EncoderS0_>: - odometry_.twist.twist.linear.x = 0; + /* Set the auto-reload preload */ + MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); + 8007028: 68fb ldr r3, [r7, #12] + 800702a: f023 0280 bic.w r2, r3, #128 ; 0x80 + 800702e: 683b ldr r3, [r7, #0] + 8007030: 695b ldr r3, [r3, #20] + 8007032: 4313 orrs r3, r2 + 8007034: 60fb str r3, [r7, #12] - kBaseline = 0.35; //in meters - } + TIMx->CR1 = tmpcr1; + 8007036: 687b ldr r3, [r7, #4] + 8007038: 68fa ldr r2, [r7, #12] + 800703a: 601a str r2, [r3, #0] - OdometryCalc(Encoder left, Encoder right){ - 80054f4: b084 sub sp, #16 - 80054f6: b5b0 push {r4, r5, r7, lr} - 80054f8: b090 sub sp, #64 ; 0x40 - 80054fa: af00 add r7, sp, #0 - 80054fc: 6078 str r0, [r7, #4] - 80054fe: f107 0054 add.w r0, r7, #84 ; 0x54 - 8005502: e880 000e stmia.w r0, {r1, r2, r3} - 8005506: 687b ldr r3, [r7, #4] - 8005508: 4618 mov r0, r3 - 800550a: f7fe fffd bl 8004508 <_ZN7EncoderC1Ev> - 800550e: 687b ldr r3, [r7, #4] - 8005510: 331c adds r3, #28 - 8005512: 4618 mov r0, r3 - 8005514: f7fe fff8 bl 8004508 <_ZN7EncoderC1Ev> - 8005518: 687b ldr r3, [r7, #4] - 800551a: 333c adds r3, #60 ; 0x3c - 800551c: 4618 mov r0, r3 - 800551e: f7ff fef3 bl 8005308 <_ZN8nav_msgs8OdometryC1Ev> - Encoder left_encoder_ = left; - 8005522: f107 0424 add.w r4, r7, #36 ; 0x24 - 8005526: f107 0554 add.w r5, r7, #84 ; 0x54 - 800552a: cd0f ldmia r5!, {r0, r1, r2, r3} - 800552c: c40f stmia r4!, {r0, r1, r2, r3} - 800552e: e895 0007 ldmia.w r5, {r0, r1, r2} - 8005532: e884 0007 stmia.w r4, {r0, r1, r2} - Encoder right_encoder_ = right; - 8005536: f107 0408 add.w r4, r7, #8 - 800553a: f107 0570 add.w r5, r7, #112 ; 0x70 - 800553e: cd0f ldmia r5!, {r0, r1, r2, r3} - 8005540: c40f stmia r4!, {r0, r1, r2, r3} - 8005542: e895 0007 ldmia.w r5, {r0, r1, r2} - 8005546: e884 0007 stmia.w r4, {r0, r1, r2} - } - 800554a: 687b ldr r3, [r7, #4] - 800554c: 4618 mov r0, r3 - 800554e: 3740 adds r7, #64 ; 0x40 - 8005550: 46bd mov sp, r7 - 8005552: e8bd 40b0 ldmia.w sp!, {r4, r5, r7, lr} - 8005556: b004 add sp, #16 - 8005558: 4770 bx lr - ... + /* Set the Autoreload value */ + TIMx->ARR = (uint32_t)Structure->Period ; + 800703c: 683b ldr r3, [r7, #0] + 800703e: 689a ldr r2, [r3, #8] + 8007040: 687b ldr r3, [r7, #4] + 8007042: 62da str r2, [r3, #44] ; 0x2c + + /* Set the Prescaler value */ + TIMx->PSC = Structure->Prescaler; + 8007044: 683b ldr r3, [r7, #0] + 8007046: 681a ldr r2, [r3, #0] + 8007048: 687b ldr r3, [r7, #4] + 800704a: 629a str r2, [r3, #40] ; 0x28 -0800555c <_ZN8std_msgs4TimeC1Ev>: + if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) + 800704c: 687b ldr r3, [r7, #4] + 800704e: 4a0a ldr r2, [pc, #40] ; (8007078 ) + 8007050: 4293 cmp r3, r2 + 8007052: d003 beq.n 800705c + 8007054: 687b ldr r3, [r7, #4] + 8007056: 4a0c ldr r2, [pc, #48] ; (8007088 ) + 8007058: 4293 cmp r3, r2 + 800705a: d103 bne.n 8007064 { - public: - typedef ros::Time _data_type; - _data_type data; + /* Set the Repetition Counter value */ + TIMx->RCR = Structure->RepetitionCounter; + 800705c: 683b ldr r3, [r7, #0] + 800705e: 691a ldr r2, [r3, #16] + 8007060: 687b ldr r3, [r7, #4] + 8007062: 631a str r2, [r3, #48] ; 0x30 + } - Time(): - 800555c: b580 push {r7, lr} - 800555e: b082 sub sp, #8 - 8005560: af00 add r7, sp, #0 - 8005562: 6078 str r0, [r7, #4] - data() - 8005564: 687b ldr r3, [r7, #4] - 8005566: 4618 mov r0, r3 - 8005568: f7ff f8ca bl 8004700 <_ZN3ros3MsgC1Ev> - 800556c: 4a06 ldr r2, [pc, #24] ; (8005588 <_ZN8std_msgs4TimeC1Ev+0x2c>) - 800556e: 687b ldr r3, [r7, #4] - 8005570: 601a str r2, [r3, #0] - 8005572: 687b ldr r3, [r7, #4] - 8005574: 3304 adds r3, #4 - 8005576: 4618 mov r0, r3 - 8005578: f7ff f8b0 bl 80046dc <_ZN3ros4TimeC1Ev> - { - } - 800557c: 687b ldr r3, [r7, #4] - 800557e: 4618 mov r0, r3 - 8005580: 3708 adds r7, #8 - 8005582: 46bd mov sp, r7 - 8005584: bd80 pop {r7, pc} - 8005586: bf00 nop - 8005588: 0800a4c8 .word 0x0800a4c8 + /* Generate an update event to reload the Prescaler + and the repetition counter (only for advanced timer) value immediately */ + TIMx->EGR = TIM_EGR_UG; + 8007064: 687b ldr r3, [r7, #4] + 8007066: 2201 movs r2, #1 + 8007068: 615a str r2, [r3, #20] +} + 800706a: bf00 nop + 800706c: 3714 adds r7, #20 + 800706e: 46bd mov sp, r7 + 8007070: f85d 7b04 ldr.w r7, [sp], #4 + 8007074: 4770 bx lr + 8007076: bf00 nop + 8007078: 40010000 .word 0x40010000 + 800707c: 40000400 .word 0x40000400 + 8007080: 40000800 .word 0x40000800 + 8007084: 40000c00 .word 0x40000c00 + 8007088: 40010400 .word 0x40010400 + 800708c: 40014000 .word 0x40014000 + 8007090: 40014400 .word 0x40014400 + 8007094: 40014800 .word 0x40014800 + 8007098: 40001800 .word 0x40001800 + 800709c: 40001c00 .word 0x40001c00 + 80070a0: 40002000 .word 0x40002000 + +080070a4 : + * @param TIMx to select the TIM peripheral + * @param OC_Config The ouput configuration structure + * @retval None + */ +static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config) +{ + 80070a4: b480 push {r7} + 80070a6: b087 sub sp, #28 + 80070a8: af00 add r7, sp, #0 + 80070aa: 6078 str r0, [r7, #4] + 80070ac: 6039 str r1, [r7, #0] + uint32_t tmpccmrx; + uint32_t tmpccer; + uint32_t tmpcr2; -0800558c <_ZNK8std_msgs4Time9serializeEPh>: + /* Disable the Channel 1: Reset the CC1E Bit */ + TIMx->CCER &= ~TIM_CCER_CC1E; + 80070ae: 687b ldr r3, [r7, #4] + 80070b0: 6a1b ldr r3, [r3, #32] + 80070b2: f023 0201 bic.w r2, r3, #1 + 80070b6: 687b ldr r3, [r7, #4] + 80070b8: 621a str r2, [r3, #32] - virtual int serialize(unsigned char *outbuffer) const - 800558c: b480 push {r7} - 800558e: b085 sub sp, #20 - 8005590: af00 add r7, sp, #0 - 8005592: 6078 str r0, [r7, #4] - 8005594: 6039 str r1, [r7, #0] - { - int offset = 0; - 8005596: 2300 movs r3, #0 - 8005598: 60fb str r3, [r7, #12] - *(outbuffer + offset + 0) = (this->data.sec >> (8 * 0)) & 0xFF; - 800559a: 687b ldr r3, [r7, #4] - 800559c: 6859 ldr r1, [r3, #4] - 800559e: 68fb ldr r3, [r7, #12] - 80055a0: 683a ldr r2, [r7, #0] - 80055a2: 4413 add r3, r2 - 80055a4: b2ca uxtb r2, r1 - 80055a6: 701a strb r2, [r3, #0] - *(outbuffer + offset + 1) = (this->data.sec >> (8 * 1)) & 0xFF; - 80055a8: 687b ldr r3, [r7, #4] - 80055aa: 685b ldr r3, [r3, #4] - 80055ac: 0a19 lsrs r1, r3, #8 - 80055ae: 68fb ldr r3, [r7, #12] - 80055b0: 3301 adds r3, #1 - 80055b2: 683a ldr r2, [r7, #0] - 80055b4: 4413 add r3, r2 - 80055b6: b2ca uxtb r2, r1 - 80055b8: 701a strb r2, [r3, #0] - *(outbuffer + offset + 2) = (this->data.sec >> (8 * 2)) & 0xFF; - 80055ba: 687b ldr r3, [r7, #4] - 80055bc: 685b ldr r3, [r3, #4] - 80055be: 0c19 lsrs r1, r3, #16 - 80055c0: 68fb ldr r3, [r7, #12] - 80055c2: 3302 adds r3, #2 - 80055c4: 683a ldr r2, [r7, #0] - 80055c6: 4413 add r3, r2 - 80055c8: b2ca uxtb r2, r1 - 80055ca: 701a strb r2, [r3, #0] - *(outbuffer + offset + 3) = (this->data.sec >> (8 * 3)) & 0xFF; - 80055cc: 687b ldr r3, [r7, #4] - 80055ce: 685b ldr r3, [r3, #4] - 80055d0: 0e19 lsrs r1, r3, #24 - 80055d2: 68fb ldr r3, [r7, #12] - 80055d4: 3303 adds r3, #3 - 80055d6: 683a ldr r2, [r7, #0] - 80055d8: 4413 add r3, r2 - 80055da: b2ca uxtb r2, r1 - 80055dc: 701a strb r2, [r3, #0] - offset += sizeof(this->data.sec); - 80055de: 68fb ldr r3, [r7, #12] - 80055e0: 3304 adds r3, #4 - 80055e2: 60fb str r3, [r7, #12] - *(outbuffer + offset + 0) = (this->data.nsec >> (8 * 0)) & 0xFF; - 80055e4: 687b ldr r3, [r7, #4] - 80055e6: 6899 ldr r1, [r3, #8] - 80055e8: 68fb ldr r3, [r7, #12] - 80055ea: 683a ldr r2, [r7, #0] - 80055ec: 4413 add r3, r2 - 80055ee: b2ca uxtb r2, r1 - 80055f0: 701a strb r2, [r3, #0] - *(outbuffer + offset + 1) = (this->data.nsec >> (8 * 1)) & 0xFF; - 80055f2: 687b ldr r3, [r7, #4] - 80055f4: 689b ldr r3, [r3, #8] - 80055f6: 0a19 lsrs r1, r3, #8 - 80055f8: 68fb ldr r3, [r7, #12] - 80055fa: 3301 adds r3, #1 - 80055fc: 683a ldr r2, [r7, #0] - 80055fe: 4413 add r3, r2 - 8005600: b2ca uxtb r2, r1 - 8005602: 701a strb r2, [r3, #0] - *(outbuffer + offset + 2) = (this->data.nsec >> (8 * 2)) & 0xFF; - 8005604: 687b ldr r3, [r7, #4] - 8005606: 689b ldr r3, [r3, #8] - 8005608: 0c19 lsrs r1, r3, #16 - 800560a: 68fb ldr r3, [r7, #12] - 800560c: 3302 adds r3, #2 - 800560e: 683a ldr r2, [r7, #0] - 8005610: 4413 add r3, r2 - 8005612: b2ca uxtb r2, r1 - 8005614: 701a strb r2, [r3, #0] - *(outbuffer + offset + 3) = (this->data.nsec >> (8 * 3)) & 0xFF; - 8005616: 687b ldr r3, [r7, #4] - 8005618: 689b ldr r3, [r3, #8] - 800561a: 0e19 lsrs r1, r3, #24 - 800561c: 68fb ldr r3, [r7, #12] - 800561e: 3303 adds r3, #3 - 8005620: 683a ldr r2, [r7, #0] - 8005622: 4413 add r3, r2 - 8005624: b2ca uxtb r2, r1 - 8005626: 701a strb r2, [r3, #0] - offset += sizeof(this->data.nsec); - 8005628: 68fb ldr r3, [r7, #12] - 800562a: 3304 adds r3, #4 - 800562c: 60fb str r3, [r7, #12] - return offset; - 800562e: 68fb ldr r3, [r7, #12] - } - 8005630: 4618 mov r0, r3 - 8005632: 3714 adds r7, #20 - 8005634: 46bd mov sp, r7 - 8005636: f85d 7b04 ldr.w r7, [sp], #4 - 800563a: 4770 bx lr + /* Get the TIMx CCER register value */ + tmpccer = TIMx->CCER; + 80070ba: 687b ldr r3, [r7, #4] + 80070bc: 6a1b ldr r3, [r3, #32] + 80070be: 617b str r3, [r7, #20] + /* Get the TIMx CR2 register value */ + tmpcr2 = TIMx->CR2; + 80070c0: 687b ldr r3, [r7, #4] + 80070c2: 685b ldr r3, [r3, #4] + 80070c4: 613b str r3, [r7, #16] -0800563c <_ZN8std_msgs4Time11deserializeEPh>: + /* Get the TIMx CCMR1 register value */ + tmpccmrx = TIMx->CCMR1; + 80070c6: 687b ldr r3, [r7, #4] + 80070c8: 699b ldr r3, [r3, #24] + 80070ca: 60fb str r3, [r7, #12] - virtual int deserialize(unsigned char *inbuffer) - 800563c: b480 push {r7} - 800563e: b085 sub sp, #20 - 8005640: af00 add r7, sp, #0 - 8005642: 6078 str r0, [r7, #4] - 8005644: 6039 str r1, [r7, #0] - { - int offset = 0; - 8005646: 2300 movs r3, #0 - 8005648: 60fb str r3, [r7, #12] - this->data.sec = ((uint32_t) (*(inbuffer + offset))); - 800564a: 68fb ldr r3, [r7, #12] - 800564c: 683a ldr r2, [r7, #0] - 800564e: 4413 add r3, r2 - 8005650: 781b ldrb r3, [r3, #0] - 8005652: 461a mov r2, r3 - 8005654: 687b ldr r3, [r7, #4] - 8005656: 605a str r2, [r3, #4] - this->data.sec |= ((uint32_t) (*(inbuffer + offset + 1))) << (8 * 1); - 8005658: 687b ldr r3, [r7, #4] - 800565a: 685a ldr r2, [r3, #4] - 800565c: 68fb ldr r3, [r7, #12] - 800565e: 3301 adds r3, #1 - 8005660: 6839 ldr r1, [r7, #0] - 8005662: 440b add r3, r1 - 8005664: 781b ldrb r3, [r3, #0] - 8005666: 021b lsls r3, r3, #8 - 8005668: 431a orrs r2, r3 - 800566a: 687b ldr r3, [r7, #4] - 800566c: 605a str r2, [r3, #4] - this->data.sec |= ((uint32_t) (*(inbuffer + offset + 2))) << (8 * 2); - 800566e: 687b ldr r3, [r7, #4] - 8005670: 685a ldr r2, [r3, #4] - 8005672: 68fb ldr r3, [r7, #12] - 8005674: 3302 adds r3, #2 - 8005676: 6839 ldr r1, [r7, #0] - 8005678: 440b add r3, r1 - 800567a: 781b ldrb r3, [r3, #0] - 800567c: 041b lsls r3, r3, #16 - 800567e: 431a orrs r2, r3 - 8005680: 687b ldr r3, [r7, #4] - 8005682: 605a str r2, [r3, #4] - this->data.sec |= ((uint32_t) (*(inbuffer + offset + 3))) << (8 * 3); - 8005684: 687b ldr r3, [r7, #4] - 8005686: 685a ldr r2, [r3, #4] - 8005688: 68fb ldr r3, [r7, #12] - 800568a: 3303 adds r3, #3 - 800568c: 6839 ldr r1, [r7, #0] - 800568e: 440b add r3, r1 - 8005690: 781b ldrb r3, [r3, #0] - 8005692: 061b lsls r3, r3, #24 - 8005694: 431a orrs r2, r3 - 8005696: 687b ldr r3, [r7, #4] - 8005698: 605a str r2, [r3, #4] - offset += sizeof(this->data.sec); - 800569a: 68fb ldr r3, [r7, #12] - 800569c: 3304 adds r3, #4 - 800569e: 60fb str r3, [r7, #12] - this->data.nsec = ((uint32_t) (*(inbuffer + offset))); - 80056a0: 68fb ldr r3, [r7, #12] - 80056a2: 683a ldr r2, [r7, #0] - 80056a4: 4413 add r3, r2 - 80056a6: 781b ldrb r3, [r3, #0] - 80056a8: 461a mov r2, r3 - 80056aa: 687b ldr r3, [r7, #4] - 80056ac: 609a str r2, [r3, #8] - this->data.nsec |= ((uint32_t) (*(inbuffer + offset + 1))) << (8 * 1); - 80056ae: 687b ldr r3, [r7, #4] - 80056b0: 689a ldr r2, [r3, #8] - 80056b2: 68fb ldr r3, [r7, #12] - 80056b4: 3301 adds r3, #1 - 80056b6: 6839 ldr r1, [r7, #0] - 80056b8: 440b add r3, r1 - 80056ba: 781b ldrb r3, [r3, #0] - 80056bc: 021b lsls r3, r3, #8 - 80056be: 431a orrs r2, r3 - 80056c0: 687b ldr r3, [r7, #4] - 80056c2: 609a str r2, [r3, #8] - this->data.nsec |= ((uint32_t) (*(inbuffer + offset + 2))) << (8 * 2); - 80056c4: 687b ldr r3, [r7, #4] - 80056c6: 689a ldr r2, [r3, #8] - 80056c8: 68fb ldr r3, [r7, #12] - 80056ca: 3302 adds r3, #2 - 80056cc: 6839 ldr r1, [r7, #0] - 80056ce: 440b add r3, r1 - 80056d0: 781b ldrb r3, [r3, #0] - 80056d2: 041b lsls r3, r3, #16 - 80056d4: 431a orrs r2, r3 - 80056d6: 687b ldr r3, [r7, #4] - 80056d8: 609a str r2, [r3, #8] - this->data.nsec |= ((uint32_t) (*(inbuffer + offset + 3))) << (8 * 3); - 80056da: 687b ldr r3, [r7, #4] - 80056dc: 689a ldr r2, [r3, #8] - 80056de: 68fb ldr r3, [r7, #12] - 80056e0: 3303 adds r3, #3 - 80056e2: 6839 ldr r1, [r7, #0] - 80056e4: 440b add r3, r1 - 80056e6: 781b ldrb r3, [r3, #0] - 80056e8: 061b lsls r3, r3, #24 - 80056ea: 431a orrs r2, r3 - 80056ec: 687b ldr r3, [r7, #4] - 80056ee: 609a str r2, [r3, #8] - offset += sizeof(this->data.nsec); - 80056f0: 68fb ldr r3, [r7, #12] - 80056f2: 3304 adds r3, #4 - 80056f4: 60fb str r3, [r7, #12] - return offset; - 80056f6: 68fb ldr r3, [r7, #12] - } - 80056f8: 4618 mov r0, r3 - 80056fa: 3714 adds r7, #20 - 80056fc: 46bd mov sp, r7 - 80056fe: f85d 7b04 ldr.w r7, [sp], #4 - 8005702: 4770 bx lr + /* Reset the Output Compare Mode Bits */ + tmpccmrx &= ~TIM_CCMR1_OC1M; + 80070cc: 68fa ldr r2, [r7, #12] + 80070ce: 4b2b ldr r3, [pc, #172] ; (800717c ) + 80070d0: 4013 ands r3, r2 + 80070d2: 60fb str r3, [r7, #12] + tmpccmrx &= ~TIM_CCMR1_CC1S; + 80070d4: 68fb ldr r3, [r7, #12] + 80070d6: f023 0303 bic.w r3, r3, #3 + 80070da: 60fb str r3, [r7, #12] + /* Select the Output Compare Mode */ + tmpccmrx |= OC_Config->OCMode; + 80070dc: 683b ldr r3, [r7, #0] + 80070de: 681b ldr r3, [r3, #0] + 80070e0: 68fa ldr r2, [r7, #12] + 80070e2: 4313 orrs r3, r2 + 80070e4: 60fb str r3, [r7, #12] -08005704 <_ZN8std_msgs4Time7getTypeEv>: + /* Reset the Output Polarity level */ + tmpccer &= ~TIM_CCER_CC1P; + 80070e6: 697b ldr r3, [r7, #20] + 80070e8: f023 0302 bic.w r3, r3, #2 + 80070ec: 617b str r3, [r7, #20] + /* Set the Output Compare Polarity */ + tmpccer |= OC_Config->OCPolarity; + 80070ee: 683b ldr r3, [r7, #0] + 80070f0: 689b ldr r3, [r3, #8] + 80070f2: 697a ldr r2, [r7, #20] + 80070f4: 4313 orrs r3, r2 + 80070f6: 617b str r3, [r7, #20] - const char * getType(){ return "std_msgs/Time"; }; - 8005704: b480 push {r7} - 8005706: b083 sub sp, #12 - 8005708: af00 add r7, sp, #0 - 800570a: 6078 str r0, [r7, #4] - 800570c: 4b03 ldr r3, [pc, #12] ; (800571c <_ZN8std_msgs4Time7getTypeEv+0x18>) - 800570e: 4618 mov r0, r3 - 8005710: 370c adds r7, #12 - 8005712: 46bd mov sp, r7 - 8005714: f85d 7b04 ldr.w r7, [sp], #4 - 8005718: 4770 bx lr - 800571a: bf00 nop - 800571c: 0800a2c0 .word 0x0800a2c0 - -08005720 <_ZN8std_msgs4Time6getMD5Ev>: - const char * getMD5(){ return "cd7166c74c552c311fbcc2fe5a7bc289"; }; - 8005720: b480 push {r7} - 8005722: b083 sub sp, #12 - 8005724: af00 add r7, sp, #0 - 8005726: 6078 str r0, [r7, #4] - 8005728: 4b03 ldr r3, [pc, #12] ; (8005738 <_ZN8std_msgs4Time6getMD5Ev+0x18>) - 800572a: 4618 mov r0, r3 - 800572c: 370c adds r7, #12 - 800572e: 46bd mov sp, r7 - 8005730: f85d 7b04 ldr.w r7, [sp], #4 - 8005734: 4770 bx lr - 8005736: bf00 nop - 8005738: 0800a2d0 .word 0x0800a2d0 - -0800573c <_ZN14rosserial_msgs9TopicInfoC1Ev>: - enum { ID_PARAMETER_REQUEST = 6 }; - enum { ID_LOG = 7 }; - enum { ID_TIME = 10 }; - enum { ID_TX_STOP = 11 }; + if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_1)) + 80070f8: 687b ldr r3, [r7, #4] + 80070fa: 4a21 ldr r2, [pc, #132] ; (8007180 ) + 80070fc: 4293 cmp r3, r2 + 80070fe: d003 beq.n 8007108 + 8007100: 687b ldr r3, [r7, #4] + 8007102: 4a20 ldr r2, [pc, #128] ; (8007184 ) + 8007104: 4293 cmp r3, r2 + 8007106: d10c bne.n 8007122 + { + /* Check parameters */ + assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); - TopicInfo(): - 800573c: b580 push {r7, lr} - 800573e: b082 sub sp, #8 - 8005740: af00 add r7, sp, #0 - 8005742: 6078 str r0, [r7, #4] - topic_id(0), - topic_name(""), - message_type(""), - md5sum(""), - buffer_size(0) - 8005744: 687b ldr r3, [r7, #4] - 8005746: 4618 mov r0, r3 - 8005748: f7fe ffda bl 8004700 <_ZN3ros3MsgC1Ev> - 800574c: 4a0b ldr r2, [pc, #44] ; (800577c <_ZN14rosserial_msgs9TopicInfoC1Ev+0x40>) - 800574e: 687b ldr r3, [r7, #4] - 8005750: 601a str r2, [r3, #0] - 8005752: 687b ldr r3, [r7, #4] - 8005754: 2200 movs r2, #0 - 8005756: 809a strh r2, [r3, #4] - 8005758: 687b ldr r3, [r7, #4] - 800575a: 4a09 ldr r2, [pc, #36] ; (8005780 <_ZN14rosserial_msgs9TopicInfoC1Ev+0x44>) - 800575c: 609a str r2, [r3, #8] - 800575e: 687b ldr r3, [r7, #4] - 8005760: 4a07 ldr r2, [pc, #28] ; (8005780 <_ZN14rosserial_msgs9TopicInfoC1Ev+0x44>) - 8005762: 60da str r2, [r3, #12] - 8005764: 687b ldr r3, [r7, #4] - 8005766: 4a06 ldr r2, [pc, #24] ; (8005780 <_ZN14rosserial_msgs9TopicInfoC1Ev+0x44>) - 8005768: 611a str r2, [r3, #16] - 800576a: 687b ldr r3, [r7, #4] - 800576c: 2200 movs r2, #0 - 800576e: 615a str r2, [r3, #20] - { - } - 8005770: 687b ldr r3, [r7, #4] - 8005772: 4618 mov r0, r3 - 8005774: 3708 adds r7, #8 - 8005776: 46bd mov sp, r7 - 8005778: bd80 pop {r7, pc} - 800577a: bf00 nop - 800577c: 0800a4b0 .word 0x0800a4b0 - 8005780: 0800a0c0 .word 0x0800a0c0 + /* Reset the Output N Polarity level */ + tmpccer &= ~TIM_CCER_CC1NP; + 8007108: 697b ldr r3, [r7, #20] + 800710a: f023 0308 bic.w r3, r3, #8 + 800710e: 617b str r3, [r7, #20] + /* Set the Output N Polarity */ + tmpccer |= OC_Config->OCNPolarity; + 8007110: 683b ldr r3, [r7, #0] + 8007112: 68db ldr r3, [r3, #12] + 8007114: 697a ldr r2, [r7, #20] + 8007116: 4313 orrs r3, r2 + 8007118: 617b str r3, [r7, #20] + /* Reset the Output N State */ + tmpccer &= ~TIM_CCER_CC1NE; + 800711a: 697b ldr r3, [r7, #20] + 800711c: f023 0304 bic.w r3, r3, #4 + 8007120: 617b str r3, [r7, #20] + } -08005784 <_ZNK14rosserial_msgs9TopicInfo9serializeEPh>: + if (IS_TIM_BREAK_INSTANCE(TIMx)) + 8007122: 687b ldr r3, [r7, #4] + 8007124: 4a16 ldr r2, [pc, #88] ; (8007180 ) + 8007126: 4293 cmp r3, r2 + 8007128: d003 beq.n 8007132 + 800712a: 687b ldr r3, [r7, #4] + 800712c: 4a15 ldr r2, [pc, #84] ; (8007184 ) + 800712e: 4293 cmp r3, r2 + 8007130: d111 bne.n 8007156 + /* Check parameters */ + assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); + assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); - virtual int serialize(unsigned char *outbuffer) const - 8005784: b580 push {r7, lr} - 8005786: b088 sub sp, #32 - 8005788: af00 add r7, sp, #0 - 800578a: 6078 str r0, [r7, #4] - 800578c: 6039 str r1, [r7, #0] - { - int offset = 0; - 800578e: 2300 movs r3, #0 - 8005790: 61fb str r3, [r7, #28] - *(outbuffer + offset + 0) = (this->topic_id >> (8 * 0)) & 0xFF; - 8005792: 687b ldr r3, [r7, #4] - 8005794: 8899 ldrh r1, [r3, #4] - 8005796: 69fb ldr r3, [r7, #28] - 8005798: 683a ldr r2, [r7, #0] - 800579a: 4413 add r3, r2 - 800579c: b2ca uxtb r2, r1 - 800579e: 701a strb r2, [r3, #0] - *(outbuffer + offset + 1) = (this->topic_id >> (8 * 1)) & 0xFF; - 80057a0: 687b ldr r3, [r7, #4] - 80057a2: 889b ldrh r3, [r3, #4] - 80057a4: 0a1b lsrs r3, r3, #8 - 80057a6: b299 uxth r1, r3 - 80057a8: 69fb ldr r3, [r7, #28] - 80057aa: 3301 adds r3, #1 - 80057ac: 683a ldr r2, [r7, #0] - 80057ae: 4413 add r3, r2 - 80057b0: b2ca uxtb r2, r1 - 80057b2: 701a strb r2, [r3, #0] - offset += sizeof(this->topic_id); - 80057b4: 69fb ldr r3, [r7, #28] - 80057b6: 3302 adds r3, #2 - 80057b8: 61fb str r3, [r7, #28] - uint32_t length_topic_name = strlen(this->topic_name); - 80057ba: 687b ldr r3, [r7, #4] - 80057bc: 689b ldr r3, [r3, #8] - 80057be: 4618 mov r0, r3 - 80057c0: f7fa fd3a bl 8000238 - 80057c4: 61b8 str r0, [r7, #24] - varToArr(outbuffer + offset, length_topic_name); - 80057c6: 69fb ldr r3, [r7, #28] - 80057c8: 683a ldr r2, [r7, #0] - 80057ca: 4413 add r3, r2 - 80057cc: 69b9 ldr r1, [r7, #24] - 80057ce: 4618 mov r0, r3 - 80057d0: f001 fc3d bl 800704e <_ZN3ros3Msg8varToArrIPhmEEvT_T0_> - offset += 4; - 80057d4: 69fb ldr r3, [r7, #28] - 80057d6: 3304 adds r3, #4 - 80057d8: 61fb str r3, [r7, #28] - memcpy(outbuffer + offset, this->topic_name, length_topic_name); - 80057da: 69fb ldr r3, [r7, #28] - 80057dc: 683a ldr r2, [r7, #0] - 80057de: 18d0 adds r0, r2, r3 - 80057e0: 687b ldr r3, [r7, #4] - 80057e2: 689b ldr r3, [r3, #8] - 80057e4: 69ba ldr r2, [r7, #24] - 80057e6: 4619 mov r1, r3 - 80057e8: f004 fb16 bl 8009e18 - offset += length_topic_name; - 80057ec: 69fa ldr r2, [r7, #28] - 80057ee: 69bb ldr r3, [r7, #24] - 80057f0: 4413 add r3, r2 - 80057f2: 61fb str r3, [r7, #28] - uint32_t length_message_type = strlen(this->message_type); - 80057f4: 687b ldr r3, [r7, #4] - 80057f6: 68db ldr r3, [r3, #12] - 80057f8: 4618 mov r0, r3 - 80057fa: f7fa fd1d bl 8000238 - 80057fe: 6178 str r0, [r7, #20] - varToArr(outbuffer + offset, length_message_type); - 8005800: 69fb ldr r3, [r7, #28] - 8005802: 683a ldr r2, [r7, #0] - 8005804: 4413 add r3, r2 - 8005806: 6979 ldr r1, [r7, #20] - 8005808: 4618 mov r0, r3 - 800580a: f001 fc20 bl 800704e <_ZN3ros3Msg8varToArrIPhmEEvT_T0_> - offset += 4; - 800580e: 69fb ldr r3, [r7, #28] - 8005810: 3304 adds r3, #4 - 8005812: 61fb str r3, [r7, #28] - memcpy(outbuffer + offset, this->message_type, length_message_type); - 8005814: 69fb ldr r3, [r7, #28] - 8005816: 683a ldr r2, [r7, #0] - 8005818: 18d0 adds r0, r2, r3 - 800581a: 687b ldr r3, [r7, #4] - 800581c: 68db ldr r3, [r3, #12] - 800581e: 697a ldr r2, [r7, #20] - 8005820: 4619 mov r1, r3 - 8005822: f004 faf9 bl 8009e18 - offset += length_message_type; - 8005826: 69fa ldr r2, [r7, #28] - 8005828: 697b ldr r3, [r7, #20] - 800582a: 4413 add r3, r2 - 800582c: 61fb str r3, [r7, #28] - uint32_t length_md5sum = strlen(this->md5sum); - 800582e: 687b ldr r3, [r7, #4] - 8005830: 691b ldr r3, [r3, #16] - 8005832: 4618 mov r0, r3 - 8005834: f7fa fd00 bl 8000238 - 8005838: 6138 str r0, [r7, #16] - varToArr(outbuffer + offset, length_md5sum); - 800583a: 69fb ldr r3, [r7, #28] - 800583c: 683a ldr r2, [r7, #0] - 800583e: 4413 add r3, r2 - 8005840: 6939 ldr r1, [r7, #16] - 8005842: 4618 mov r0, r3 - 8005844: f001 fc03 bl 800704e <_ZN3ros3Msg8varToArrIPhmEEvT_T0_> - offset += 4; - 8005848: 69fb ldr r3, [r7, #28] - 800584a: 3304 adds r3, #4 - 800584c: 61fb str r3, [r7, #28] - memcpy(outbuffer + offset, this->md5sum, length_md5sum); - 800584e: 69fb ldr r3, [r7, #28] - 8005850: 683a ldr r2, [r7, #0] - 8005852: 18d0 adds r0, r2, r3 - 8005854: 687b ldr r3, [r7, #4] - 8005856: 691b ldr r3, [r3, #16] - 8005858: 693a ldr r2, [r7, #16] - 800585a: 4619 mov r1, r3 - 800585c: f004 fadc bl 8009e18 - offset += length_md5sum; - 8005860: 69fa ldr r2, [r7, #28] - 8005862: 693b ldr r3, [r7, #16] - 8005864: 4413 add r3, r2 - 8005866: 61fb str r3, [r7, #28] - union { - int32_t real; - uint32_t base; - } u_buffer_size; - u_buffer_size.real = this->buffer_size; - 8005868: 687b ldr r3, [r7, #4] - 800586a: 695b ldr r3, [r3, #20] - 800586c: 60fb str r3, [r7, #12] - *(outbuffer + offset + 0) = (u_buffer_size.base >> (8 * 0)) & 0xFF; - 800586e: 68f9 ldr r1, [r7, #12] - 8005870: 69fb ldr r3, [r7, #28] - 8005872: 683a ldr r2, [r7, #0] - 8005874: 4413 add r3, r2 - 8005876: b2ca uxtb r2, r1 - 8005878: 701a strb r2, [r3, #0] - *(outbuffer + offset + 1) = (u_buffer_size.base >> (8 * 1)) & 0xFF; - 800587a: 68fb ldr r3, [r7, #12] - 800587c: 0a19 lsrs r1, r3, #8 - 800587e: 69fb ldr r3, [r7, #28] - 8005880: 3301 adds r3, #1 - 8005882: 683a ldr r2, [r7, #0] - 8005884: 4413 add r3, r2 - 8005886: b2ca uxtb r2, r1 - 8005888: 701a strb r2, [r3, #0] - *(outbuffer + offset + 2) = (u_buffer_size.base >> (8 * 2)) & 0xFF; - 800588a: 68fb ldr r3, [r7, #12] - 800588c: 0c19 lsrs r1, r3, #16 - 800588e: 69fb ldr r3, [r7, #28] - 8005890: 3302 adds r3, #2 - 8005892: 683a ldr r2, [r7, #0] - 8005894: 4413 add r3, r2 - 8005896: b2ca uxtb r2, r1 - 8005898: 701a strb r2, [r3, #0] - *(outbuffer + offset + 3) = (u_buffer_size.base >> (8 * 3)) & 0xFF; - 800589a: 68fb ldr r3, [r7, #12] - 800589c: 0e19 lsrs r1, r3, #24 - 800589e: 69fb ldr r3, [r7, #28] - 80058a0: 3303 adds r3, #3 - 80058a2: 683a ldr r2, [r7, #0] - 80058a4: 4413 add r3, r2 - 80058a6: b2ca uxtb r2, r1 - 80058a8: 701a strb r2, [r3, #0] - offset += sizeof(this->buffer_size); - 80058aa: 69fb ldr r3, [r7, #28] - 80058ac: 3304 adds r3, #4 - 80058ae: 61fb str r3, [r7, #28] - return offset; - 80058b0: 69fb ldr r3, [r7, #28] - } - 80058b2: 4618 mov r0, r3 - 80058b4: 3720 adds r7, #32 - 80058b6: 46bd mov sp, r7 - 80058b8: bd80 pop {r7, pc} + /* Reset the Output Compare and Output Compare N IDLE State */ + tmpcr2 &= ~TIM_CR2_OIS1; + 8007132: 693b ldr r3, [r7, #16] + 8007134: f423 7380 bic.w r3, r3, #256 ; 0x100 + 8007138: 613b str r3, [r7, #16] + tmpcr2 &= ~TIM_CR2_OIS1N; + 800713a: 693b ldr r3, [r7, #16] + 800713c: f423 7300 bic.w r3, r3, #512 ; 0x200 + 8007140: 613b str r3, [r7, #16] + /* Set the Output Idle state */ + tmpcr2 |= OC_Config->OCIdleState; + 8007142: 683b ldr r3, [r7, #0] + 8007144: 695b ldr r3, [r3, #20] + 8007146: 693a ldr r2, [r7, #16] + 8007148: 4313 orrs r3, r2 + 800714a: 613b str r3, [r7, #16] + /* Set the Output N Idle state */ + tmpcr2 |= OC_Config->OCNIdleState; + 800714c: 683b ldr r3, [r7, #0] + 800714e: 699b ldr r3, [r3, #24] + 8007150: 693a ldr r2, [r7, #16] + 8007152: 4313 orrs r3, r2 + 8007154: 613b str r3, [r7, #16] + } -080058ba <_ZN14rosserial_msgs9TopicInfo11deserializeEPh>: + /* Write to TIMx CR2 */ + TIMx->CR2 = tmpcr2; + 8007156: 687b ldr r3, [r7, #4] + 8007158: 693a ldr r2, [r7, #16] + 800715a: 605a str r2, [r3, #4] - virtual int deserialize(unsigned char *inbuffer) - 80058ba: b580 push {r7, lr} - 80058bc: b08a sub sp, #40 ; 0x28 - 80058be: af00 add r7, sp, #0 - 80058c0: 6078 str r0, [r7, #4] - 80058c2: 6039 str r1, [r7, #0] - { - int offset = 0; - 80058c4: 2300 movs r3, #0 - 80058c6: 61bb str r3, [r7, #24] - this->topic_id = ((uint16_t) (*(inbuffer + offset))); - 80058c8: 69bb ldr r3, [r7, #24] - 80058ca: 683a ldr r2, [r7, #0] - 80058cc: 4413 add r3, r2 - 80058ce: 781b ldrb r3, [r3, #0] - 80058d0: b29a uxth r2, r3 - 80058d2: 687b ldr r3, [r7, #4] - 80058d4: 809a strh r2, [r3, #4] - this->topic_id |= ((uint16_t) (*(inbuffer + offset + 1))) << (8 * 1); - 80058d6: 687b ldr r3, [r7, #4] - 80058d8: 889b ldrh r3, [r3, #4] - 80058da: b21a sxth r2, r3 - 80058dc: 69bb ldr r3, [r7, #24] - 80058de: 3301 adds r3, #1 - 80058e0: 6839 ldr r1, [r7, #0] - 80058e2: 440b add r3, r1 - 80058e4: 781b ldrb r3, [r3, #0] - 80058e6: 021b lsls r3, r3, #8 - 80058e8: b21b sxth r3, r3 - 80058ea: 4313 orrs r3, r2 - 80058ec: b21b sxth r3, r3 - 80058ee: b29a uxth r2, r3 - 80058f0: 687b ldr r3, [r7, #4] - 80058f2: 809a strh r2, [r3, #4] - offset += sizeof(this->topic_id); - 80058f4: 69bb ldr r3, [r7, #24] - 80058f6: 3302 adds r3, #2 - 80058f8: 61bb str r3, [r7, #24] - uint32_t length_topic_name; - arrToVar(length_topic_name, (inbuffer + offset)); - 80058fa: 69bb ldr r3, [r7, #24] - 80058fc: 683a ldr r2, [r7, #0] - 80058fe: 441a add r2, r3 - 8005900: f107 0314 add.w r3, r7, #20 - 8005904: 4611 mov r1, r2 - 8005906: 4618 mov r0, r3 - 8005908: f001 fbbf bl 800708a <_ZN3ros3Msg8arrToVarImPhEEvRT_T0_> - offset += 4; - 800590c: 69bb ldr r3, [r7, #24] - 800590e: 3304 adds r3, #4 - 8005910: 61bb str r3, [r7, #24] - for(unsigned int k= offset; k< offset+length_topic_name; ++k){ - 8005912: 69bb ldr r3, [r7, #24] - 8005914: 627b str r3, [r7, #36] ; 0x24 - 8005916: 69ba ldr r2, [r7, #24] - 8005918: 697b ldr r3, [r7, #20] - 800591a: 4413 add r3, r2 - 800591c: 6a7a ldr r2, [r7, #36] ; 0x24 - 800591e: 429a cmp r2, r3 - 8005920: d20c bcs.n 800593c <_ZN14rosserial_msgs9TopicInfo11deserializeEPh+0x82> - inbuffer[k-1]=inbuffer[k]; - 8005922: 683a ldr r2, [r7, #0] - 8005924: 6a7b ldr r3, [r7, #36] ; 0x24 - 8005926: 441a add r2, r3 - 8005928: 6a7b ldr r3, [r7, #36] ; 0x24 - 800592a: 3b01 subs r3, #1 - 800592c: 6839 ldr r1, [r7, #0] - 800592e: 440b add r3, r1 - 8005930: 7812 ldrb r2, [r2, #0] - 8005932: 701a strb r2, [r3, #0] - for(unsigned int k= offset; k< offset+length_topic_name; ++k){ - 8005934: 6a7b ldr r3, [r7, #36] ; 0x24 - 8005936: 3301 adds r3, #1 - 8005938: 627b str r3, [r7, #36] ; 0x24 - 800593a: e7ec b.n 8005916 <_ZN14rosserial_msgs9TopicInfo11deserializeEPh+0x5c> - } - inbuffer[offset+length_topic_name-1]=0; - 800593c: 69ba ldr r2, [r7, #24] - 800593e: 697b ldr r3, [r7, #20] - 8005940: 4413 add r3, r2 - 8005942: 3b01 subs r3, #1 - 8005944: 683a ldr r2, [r7, #0] - 8005946: 4413 add r3, r2 - 8005948: 2200 movs r2, #0 - 800594a: 701a strb r2, [r3, #0] - this->topic_name = (char *)(inbuffer + offset-1); - 800594c: 69bb ldr r3, [r7, #24] - 800594e: 3b01 subs r3, #1 - 8005950: 683a ldr r2, [r7, #0] - 8005952: 441a add r2, r3 - 8005954: 687b ldr r3, [r7, #4] - 8005956: 609a str r2, [r3, #8] - offset += length_topic_name; - 8005958: 69ba ldr r2, [r7, #24] - 800595a: 697b ldr r3, [r7, #20] - 800595c: 4413 add r3, r2 - 800595e: 61bb str r3, [r7, #24] - uint32_t length_message_type; - arrToVar(length_message_type, (inbuffer + offset)); - 8005960: 69bb ldr r3, [r7, #24] - 8005962: 683a ldr r2, [r7, #0] - 8005964: 441a add r2, r3 - 8005966: f107 0310 add.w r3, r7, #16 - 800596a: 4611 mov r1, r2 - 800596c: 4618 mov r0, r3 - 800596e: f001 fb8c bl 800708a <_ZN3ros3Msg8arrToVarImPhEEvRT_T0_> - offset += 4; - 8005972: 69bb ldr r3, [r7, #24] - 8005974: 3304 adds r3, #4 - 8005976: 61bb str r3, [r7, #24] - for(unsigned int k= offset; k< offset+length_message_type; ++k){ - 8005978: 69bb ldr r3, [r7, #24] - 800597a: 623b str r3, [r7, #32] - 800597c: 69ba ldr r2, [r7, #24] - 800597e: 693b ldr r3, [r7, #16] - 8005980: 4413 add r3, r2 - 8005982: 6a3a ldr r2, [r7, #32] - 8005984: 429a cmp r2, r3 - 8005986: d20c bcs.n 80059a2 <_ZN14rosserial_msgs9TopicInfo11deserializeEPh+0xe8> - inbuffer[k-1]=inbuffer[k]; - 8005988: 683a ldr r2, [r7, #0] - 800598a: 6a3b ldr r3, [r7, #32] - 800598c: 441a add r2, r3 - 800598e: 6a3b ldr r3, [r7, #32] - 8005990: 3b01 subs r3, #1 - 8005992: 6839 ldr r1, [r7, #0] - 8005994: 440b add r3, r1 - 8005996: 7812 ldrb r2, [r2, #0] - 8005998: 701a strb r2, [r3, #0] - for(unsigned int k= offset; k< offset+length_message_type; ++k){ - 800599a: 6a3b ldr r3, [r7, #32] - 800599c: 3301 adds r3, #1 - 800599e: 623b str r3, [r7, #32] - 80059a0: e7ec b.n 800597c <_ZN14rosserial_msgs9TopicInfo11deserializeEPh+0xc2> - } - inbuffer[offset+length_message_type-1]=0; - 80059a2: 69ba ldr r2, [r7, #24] - 80059a4: 693b ldr r3, [r7, #16] - 80059a6: 4413 add r3, r2 - 80059a8: 3b01 subs r3, #1 - 80059aa: 683a ldr r2, [r7, #0] - 80059ac: 4413 add r3, r2 - 80059ae: 2200 movs r2, #0 - 80059b0: 701a strb r2, [r3, #0] - this->message_type = (char *)(inbuffer + offset-1); - 80059b2: 69bb ldr r3, [r7, #24] - 80059b4: 3b01 subs r3, #1 - 80059b6: 683a ldr r2, [r7, #0] - 80059b8: 441a add r2, r3 - 80059ba: 687b ldr r3, [r7, #4] - 80059bc: 60da str r2, [r3, #12] - offset += length_message_type; - 80059be: 69ba ldr r2, [r7, #24] - 80059c0: 693b ldr r3, [r7, #16] - 80059c2: 4413 add r3, r2 - 80059c4: 61bb str r3, [r7, #24] - uint32_t length_md5sum; - arrToVar(length_md5sum, (inbuffer + offset)); - 80059c6: 69bb ldr r3, [r7, #24] - 80059c8: 683a ldr r2, [r7, #0] - 80059ca: 441a add r2, r3 - 80059cc: f107 030c add.w r3, r7, #12 - 80059d0: 4611 mov r1, r2 - 80059d2: 4618 mov r0, r3 - 80059d4: f001 fb59 bl 800708a <_ZN3ros3Msg8arrToVarImPhEEvRT_T0_> - offset += 4; - 80059d8: 69bb ldr r3, [r7, #24] - 80059da: 3304 adds r3, #4 - 80059dc: 61bb str r3, [r7, #24] - for(unsigned int k= offset; k< offset+length_md5sum; ++k){ - 80059de: 69bb ldr r3, [r7, #24] - 80059e0: 61fb str r3, [r7, #28] - 80059e2: 69ba ldr r2, [r7, #24] - 80059e4: 68fb ldr r3, [r7, #12] - 80059e6: 4413 add r3, r2 - 80059e8: 69fa ldr r2, [r7, #28] - 80059ea: 429a cmp r2, r3 - 80059ec: d20c bcs.n 8005a08 <_ZN14rosserial_msgs9TopicInfo11deserializeEPh+0x14e> - inbuffer[k-1]=inbuffer[k]; - 80059ee: 683a ldr r2, [r7, #0] - 80059f0: 69fb ldr r3, [r7, #28] - 80059f2: 441a add r2, r3 - 80059f4: 69fb ldr r3, [r7, #28] - 80059f6: 3b01 subs r3, #1 - 80059f8: 6839 ldr r1, [r7, #0] - 80059fa: 440b add r3, r1 - 80059fc: 7812 ldrb r2, [r2, #0] - 80059fe: 701a strb r2, [r3, #0] - for(unsigned int k= offset; k< offset+length_md5sum; ++k){ - 8005a00: 69fb ldr r3, [r7, #28] - 8005a02: 3301 adds r3, #1 - 8005a04: 61fb str r3, [r7, #28] - 8005a06: e7ec b.n 80059e2 <_ZN14rosserial_msgs9TopicInfo11deserializeEPh+0x128> - } - inbuffer[offset+length_md5sum-1]=0; - 8005a08: 69ba ldr r2, [r7, #24] - 8005a0a: 68fb ldr r3, [r7, #12] - 8005a0c: 4413 add r3, r2 - 8005a0e: 3b01 subs r3, #1 - 8005a10: 683a ldr r2, [r7, #0] - 8005a12: 4413 add r3, r2 - 8005a14: 2200 movs r2, #0 - 8005a16: 701a strb r2, [r3, #0] - this->md5sum = (char *)(inbuffer + offset-1); - 8005a18: 69bb ldr r3, [r7, #24] - 8005a1a: 3b01 subs r3, #1 - 8005a1c: 683a ldr r2, [r7, #0] - 8005a1e: 441a add r2, r3 - 8005a20: 687b ldr r3, [r7, #4] - 8005a22: 611a str r2, [r3, #16] - offset += length_md5sum; - 8005a24: 69ba ldr r2, [r7, #24] - 8005a26: 68fb ldr r3, [r7, #12] - 8005a28: 4413 add r3, r2 - 8005a2a: 61bb str r3, [r7, #24] - union { - int32_t real; - uint32_t base; - } u_buffer_size; - u_buffer_size.base = 0; - 8005a2c: 2300 movs r3, #0 - 8005a2e: 60bb str r3, [r7, #8] - u_buffer_size.base |= ((uint32_t) (*(inbuffer + offset + 0))) << (8 * 0); - 8005a30: 68bb ldr r3, [r7, #8] - 8005a32: 69ba ldr r2, [r7, #24] - 8005a34: 6839 ldr r1, [r7, #0] - 8005a36: 440a add r2, r1 - 8005a38: 7812 ldrb r2, [r2, #0] - 8005a3a: 4313 orrs r3, r2 - 8005a3c: 60bb str r3, [r7, #8] - u_buffer_size.base |= ((uint32_t) (*(inbuffer + offset + 1))) << (8 * 1); - 8005a3e: 68ba ldr r2, [r7, #8] - 8005a40: 69bb ldr r3, [r7, #24] - 8005a42: 3301 adds r3, #1 - 8005a44: 6839 ldr r1, [r7, #0] - 8005a46: 440b add r3, r1 - 8005a48: 781b ldrb r3, [r3, #0] - 8005a4a: 021b lsls r3, r3, #8 - 8005a4c: 4313 orrs r3, r2 - 8005a4e: 60bb str r3, [r7, #8] - u_buffer_size.base |= ((uint32_t) (*(inbuffer + offset + 2))) << (8 * 2); - 8005a50: 68ba ldr r2, [r7, #8] - 8005a52: 69bb ldr r3, [r7, #24] - 8005a54: 3302 adds r3, #2 - 8005a56: 6839 ldr r1, [r7, #0] - 8005a58: 440b add r3, r1 - 8005a5a: 781b ldrb r3, [r3, #0] - 8005a5c: 041b lsls r3, r3, #16 - 8005a5e: 4313 orrs r3, r2 - 8005a60: 60bb str r3, [r7, #8] - u_buffer_size.base |= ((uint32_t) (*(inbuffer + offset + 3))) << (8 * 3); - 8005a62: 68ba ldr r2, [r7, #8] - 8005a64: 69bb ldr r3, [r7, #24] - 8005a66: 3303 adds r3, #3 - 8005a68: 6839 ldr r1, [r7, #0] - 8005a6a: 440b add r3, r1 - 8005a6c: 781b ldrb r3, [r3, #0] - 8005a6e: 061b lsls r3, r3, #24 - 8005a70: 4313 orrs r3, r2 - 8005a72: 60bb str r3, [r7, #8] - this->buffer_size = u_buffer_size.real; - 8005a74: 68ba ldr r2, [r7, #8] - 8005a76: 687b ldr r3, [r7, #4] - 8005a78: 615a str r2, [r3, #20] - offset += sizeof(this->buffer_size); - 8005a7a: 69bb ldr r3, [r7, #24] - 8005a7c: 3304 adds r3, #4 - 8005a7e: 61bb str r3, [r7, #24] - return offset; - 8005a80: 69bb ldr r3, [r7, #24] - } - 8005a82: 4618 mov r0, r3 - 8005a84: 3728 adds r7, #40 ; 0x28 - 8005a86: 46bd mov sp, r7 - 8005a88: bd80 pop {r7, pc} - ... + /* Write to TIMx CCMR1 */ + TIMx->CCMR1 = tmpccmrx; + 800715c: 687b ldr r3, [r7, #4] + 800715e: 68fa ldr r2, [r7, #12] + 8007160: 619a str r2, [r3, #24] + + /* Set the Capture Compare Register value */ + TIMx->CCR1 = OC_Config->Pulse; + 8007162: 683b ldr r3, [r7, #0] + 8007164: 685a ldr r2, [r3, #4] + 8007166: 687b ldr r3, [r7, #4] + 8007168: 635a str r2, [r3, #52] ; 0x34 -08005a8c <_ZN14rosserial_msgs9TopicInfo7getTypeEv>: + /* Write to TIMx CCER */ + TIMx->CCER = tmpccer; + 800716a: 687b ldr r3, [r7, #4] + 800716c: 697a ldr r2, [r7, #20] + 800716e: 621a str r2, [r3, #32] +} + 8007170: bf00 nop + 8007172: 371c adds r7, #28 + 8007174: 46bd mov sp, r7 + 8007176: f85d 7b04 ldr.w r7, [sp], #4 + 800717a: 4770 bx lr + 800717c: fffeff8f .word 0xfffeff8f + 8007180: 40010000 .word 0x40010000 + 8007184: 40010400 .word 0x40010400 + +08007188 : + * @param TIMx to select the TIM peripheral + * @param OC_Config The ouput configuration structure + * @retval None + */ +void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config) +{ + 8007188: b480 push {r7} + 800718a: b087 sub sp, #28 + 800718c: af00 add r7, sp, #0 + 800718e: 6078 str r0, [r7, #4] + 8007190: 6039 str r1, [r7, #0] + uint32_t tmpccmrx; + uint32_t tmpccer; + uint32_t tmpcr2; - const char * getType(){ return "rosserial_msgs/TopicInfo"; }; - 8005a8c: b480 push {r7} - 8005a8e: b083 sub sp, #12 - 8005a90: af00 add r7, sp, #0 - 8005a92: 6078 str r0, [r7, #4] - 8005a94: 4b03 ldr r3, [pc, #12] ; (8005aa4 <_ZN14rosserial_msgs9TopicInfo7getTypeEv+0x18>) - 8005a96: 4618 mov r0, r3 - 8005a98: 370c adds r7, #12 - 8005a9a: 46bd mov sp, r7 - 8005a9c: f85d 7b04 ldr.w r7, [sp], #4 - 8005aa0: 4770 bx lr - 8005aa2: bf00 nop - 8005aa4: 0800a2f4 .word 0x0800a2f4 - -08005aa8 <_ZN14rosserial_msgs9TopicInfo6getMD5Ev>: - const char * getMD5(){ return "0ad51f88fc44892f8c10684077646005"; }; - 8005aa8: b480 push {r7} - 8005aaa: b083 sub sp, #12 - 8005aac: af00 add r7, sp, #0 - 8005aae: 6078 str r0, [r7, #4] - 8005ab0: 4b03 ldr r3, [pc, #12] ; (8005ac0 <_ZN14rosserial_msgs9TopicInfo6getMD5Ev+0x18>) - 8005ab2: 4618 mov r0, r3 - 8005ab4: 370c adds r7, #12 - 8005ab6: 46bd mov sp, r7 - 8005ab8: f85d 7b04 ldr.w r7, [sp], #4 - 8005abc: 4770 bx lr - 8005abe: bf00 nop - 8005ac0: 0800a310 .word 0x0800a310 - -08005ac4 <_ZN14rosserial_msgs3LogC1Ev>: - enum { INFO = 1 }; - enum { WARN = 2 }; - enum { ERROR = 3 }; - enum { FATAL = 4 }; + /* Disable the Channel 2: Reset the CC2E Bit */ + TIMx->CCER &= ~TIM_CCER_CC2E; + 8007192: 687b ldr r3, [r7, #4] + 8007194: 6a1b ldr r3, [r3, #32] + 8007196: f023 0210 bic.w r2, r3, #16 + 800719a: 687b ldr r3, [r7, #4] + 800719c: 621a str r2, [r3, #32] + + /* Get the TIMx CCER register value */ + tmpccer = TIMx->CCER; + 800719e: 687b ldr r3, [r7, #4] + 80071a0: 6a1b ldr r3, [r3, #32] + 80071a2: 617b str r3, [r7, #20] + /* Get the TIMx CR2 register value */ + tmpcr2 = TIMx->CR2; + 80071a4: 687b ldr r3, [r7, #4] + 80071a6: 685b ldr r3, [r3, #4] + 80071a8: 613b str r3, [r7, #16] + + /* Get the TIMx CCMR1 register value */ + tmpccmrx = TIMx->CCMR1; + 80071aa: 687b ldr r3, [r7, #4] + 80071ac: 699b ldr r3, [r3, #24] + 80071ae: 60fb str r3, [r7, #12] + + /* Reset the Output Compare mode and Capture/Compare selection Bits */ + tmpccmrx &= ~TIM_CCMR1_OC2M; + 80071b0: 68fa ldr r2, [r7, #12] + 80071b2: 4b2e ldr r3, [pc, #184] ; (800726c ) + 80071b4: 4013 ands r3, r2 + 80071b6: 60fb str r3, [r7, #12] + tmpccmrx &= ~TIM_CCMR1_CC2S; + 80071b8: 68fb ldr r3, [r7, #12] + 80071ba: f423 7340 bic.w r3, r3, #768 ; 0x300 + 80071be: 60fb str r3, [r7, #12] - Log(): - 8005ac4: b580 push {r7, lr} - 8005ac6: b082 sub sp, #8 - 8005ac8: af00 add r7, sp, #0 - 8005aca: 6078 str r0, [r7, #4] - level(0), - msg("") - 8005acc: 687b ldr r3, [r7, #4] - 8005ace: 4618 mov r0, r3 - 8005ad0: f7fe fe16 bl 8004700 <_ZN3ros3MsgC1Ev> - 8005ad4: 4a06 ldr r2, [pc, #24] ; (8005af0 <_ZN14rosserial_msgs3LogC1Ev+0x2c>) - 8005ad6: 687b ldr r3, [r7, #4] - 8005ad8: 601a str r2, [r3, #0] - 8005ada: 687b ldr r3, [r7, #4] - 8005adc: 2200 movs r2, #0 - 8005ade: 711a strb r2, [r3, #4] - 8005ae0: 687b ldr r3, [r7, #4] - 8005ae2: 4a04 ldr r2, [pc, #16] ; (8005af4 <_ZN14rosserial_msgs3LogC1Ev+0x30>) - 8005ae4: 609a str r2, [r3, #8] - { - } - 8005ae6: 687b ldr r3, [r7, #4] - 8005ae8: 4618 mov r0, r3 - 8005aea: 3708 adds r7, #8 - 8005aec: 46bd mov sp, r7 - 8005aee: bd80 pop {r7, pc} - 8005af0: 0800a498 .word 0x0800a498 - 8005af4: 0800a0c0 .word 0x0800a0c0 + /* Select the Output Compare Mode */ + tmpccmrx |= (OC_Config->OCMode << 8U); + 80071c0: 683b ldr r3, [r7, #0] + 80071c2: 681b ldr r3, [r3, #0] + 80071c4: 021b lsls r3, r3, #8 + 80071c6: 68fa ldr r2, [r7, #12] + 80071c8: 4313 orrs r3, r2 + 80071ca: 60fb str r3, [r7, #12] -08005af8 <_ZNK14rosserial_msgs3Log9serializeEPh>: + /* Reset the Output Polarity level */ + tmpccer &= ~TIM_CCER_CC2P; + 80071cc: 697b ldr r3, [r7, #20] + 80071ce: f023 0320 bic.w r3, r3, #32 + 80071d2: 617b str r3, [r7, #20] + /* Set the Output Compare Polarity */ + tmpccer |= (OC_Config->OCPolarity << 4U); + 80071d4: 683b ldr r3, [r7, #0] + 80071d6: 689b ldr r3, [r3, #8] + 80071d8: 011b lsls r3, r3, #4 + 80071da: 697a ldr r2, [r7, #20] + 80071dc: 4313 orrs r3, r2 + 80071de: 617b str r3, [r7, #20] - virtual int serialize(unsigned char *outbuffer) const - 8005af8: b580 push {r7, lr} - 8005afa: b084 sub sp, #16 - 8005afc: af00 add r7, sp, #0 - 8005afe: 6078 str r0, [r7, #4] - 8005b00: 6039 str r1, [r7, #0] - { - int offset = 0; - 8005b02: 2300 movs r3, #0 - 8005b04: 60fb str r3, [r7, #12] - *(outbuffer + offset + 0) = (this->level >> (8 * 0)) & 0xFF; - 8005b06: 68fb ldr r3, [r7, #12] - 8005b08: 683a ldr r2, [r7, #0] - 8005b0a: 4413 add r3, r2 - 8005b0c: 687a ldr r2, [r7, #4] - 8005b0e: 7912 ldrb r2, [r2, #4] - 8005b10: 701a strb r2, [r3, #0] - offset += sizeof(this->level); - 8005b12: 68fb ldr r3, [r7, #12] - 8005b14: 3301 adds r3, #1 - 8005b16: 60fb str r3, [r7, #12] - uint32_t length_msg = strlen(this->msg); - 8005b18: 687b ldr r3, [r7, #4] - 8005b1a: 689b ldr r3, [r3, #8] - 8005b1c: 4618 mov r0, r3 - 8005b1e: f7fa fb8b bl 8000238 - 8005b22: 60b8 str r0, [r7, #8] - varToArr(outbuffer + offset, length_msg); - 8005b24: 68fb ldr r3, [r7, #12] - 8005b26: 683a ldr r2, [r7, #0] - 8005b28: 4413 add r3, r2 - 8005b2a: 68b9 ldr r1, [r7, #8] - 8005b2c: 4618 mov r0, r3 - 8005b2e: f001 fa8e bl 800704e <_ZN3ros3Msg8varToArrIPhmEEvT_T0_> - offset += 4; - 8005b32: 68fb ldr r3, [r7, #12] - 8005b34: 3304 adds r3, #4 - 8005b36: 60fb str r3, [r7, #12] - memcpy(outbuffer + offset, this->msg, length_msg); - 8005b38: 68fb ldr r3, [r7, #12] - 8005b3a: 683a ldr r2, [r7, #0] - 8005b3c: 18d0 adds r0, r2, r3 - 8005b3e: 687b ldr r3, [r7, #4] - 8005b40: 689b ldr r3, [r3, #8] - 8005b42: 68ba ldr r2, [r7, #8] - 8005b44: 4619 mov r1, r3 - 8005b46: f004 f967 bl 8009e18 - offset += length_msg; - 8005b4a: 68fa ldr r2, [r7, #12] - 8005b4c: 68bb ldr r3, [r7, #8] - 8005b4e: 4413 add r3, r2 - 8005b50: 60fb str r3, [r7, #12] - return offset; - 8005b52: 68fb ldr r3, [r7, #12] - } - 8005b54: 4618 mov r0, r3 - 8005b56: 3710 adds r7, #16 - 8005b58: 46bd mov sp, r7 - 8005b5a: bd80 pop {r7, pc} + if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_2)) + 80071e0: 687b ldr r3, [r7, #4] + 80071e2: 4a23 ldr r2, [pc, #140] ; (8007270 ) + 80071e4: 4293 cmp r3, r2 + 80071e6: d003 beq.n 80071f0 + 80071e8: 687b ldr r3, [r7, #4] + 80071ea: 4a22 ldr r2, [pc, #136] ; (8007274 ) + 80071ec: 4293 cmp r3, r2 + 80071ee: d10d bne.n 800720c + { + assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); -08005b5c <_ZN14rosserial_msgs3Log11deserializeEPh>: + /* Reset the Output N Polarity level */ + tmpccer &= ~TIM_CCER_CC2NP; + 80071f0: 697b ldr r3, [r7, #20] + 80071f2: f023 0380 bic.w r3, r3, #128 ; 0x80 + 80071f6: 617b str r3, [r7, #20] + /* Set the Output N Polarity */ + tmpccer |= (OC_Config->OCNPolarity << 4U); + 80071f8: 683b ldr r3, [r7, #0] + 80071fa: 68db ldr r3, [r3, #12] + 80071fc: 011b lsls r3, r3, #4 + 80071fe: 697a ldr r2, [r7, #20] + 8007200: 4313 orrs r3, r2 + 8007202: 617b str r3, [r7, #20] + /* Reset the Output N State */ + tmpccer &= ~TIM_CCER_CC2NE; + 8007204: 697b ldr r3, [r7, #20] + 8007206: f023 0340 bic.w r3, r3, #64 ; 0x40 + 800720a: 617b str r3, [r7, #20] - virtual int deserialize(unsigned char *inbuffer) - 8005b5c: b580 push {r7, lr} - 8005b5e: b086 sub sp, #24 - 8005b60: af00 add r7, sp, #0 - 8005b62: 6078 str r0, [r7, #4] - 8005b64: 6039 str r1, [r7, #0] - { - int offset = 0; - 8005b66: 2300 movs r3, #0 - 8005b68: 613b str r3, [r7, #16] - this->level = ((uint8_t) (*(inbuffer + offset))); - 8005b6a: 693b ldr r3, [r7, #16] - 8005b6c: 683a ldr r2, [r7, #0] - 8005b6e: 4413 add r3, r2 - 8005b70: 781a ldrb r2, [r3, #0] - 8005b72: 687b ldr r3, [r7, #4] - 8005b74: 711a strb r2, [r3, #4] - offset += sizeof(this->level); - 8005b76: 693b ldr r3, [r7, #16] - 8005b78: 3301 adds r3, #1 - 8005b7a: 613b str r3, [r7, #16] - uint32_t length_msg; - arrToVar(length_msg, (inbuffer + offset)); - 8005b7c: 693b ldr r3, [r7, #16] - 8005b7e: 683a ldr r2, [r7, #0] - 8005b80: 441a add r2, r3 - 8005b82: f107 030c add.w r3, r7, #12 - 8005b86: 4611 mov r1, r2 - 8005b88: 4618 mov r0, r3 - 8005b8a: f001 fa7e bl 800708a <_ZN3ros3Msg8arrToVarImPhEEvRT_T0_> - offset += 4; - 8005b8e: 693b ldr r3, [r7, #16] - 8005b90: 3304 adds r3, #4 - 8005b92: 613b str r3, [r7, #16] - for(unsigned int k= offset; k< offset+length_msg; ++k){ - 8005b94: 693b ldr r3, [r7, #16] - 8005b96: 617b str r3, [r7, #20] - 8005b98: 693a ldr r2, [r7, #16] - 8005b9a: 68fb ldr r3, [r7, #12] - 8005b9c: 4413 add r3, r2 - 8005b9e: 697a ldr r2, [r7, #20] - 8005ba0: 429a cmp r2, r3 - 8005ba2: d20c bcs.n 8005bbe <_ZN14rosserial_msgs3Log11deserializeEPh+0x62> - inbuffer[k-1]=inbuffer[k]; - 8005ba4: 683a ldr r2, [r7, #0] - 8005ba6: 697b ldr r3, [r7, #20] - 8005ba8: 441a add r2, r3 - 8005baa: 697b ldr r3, [r7, #20] - 8005bac: 3b01 subs r3, #1 - 8005bae: 6839 ldr r1, [r7, #0] - 8005bb0: 440b add r3, r1 - 8005bb2: 7812 ldrb r2, [r2, #0] - 8005bb4: 701a strb r2, [r3, #0] - for(unsigned int k= offset; k< offset+length_msg; ++k){ - 8005bb6: 697b ldr r3, [r7, #20] - 8005bb8: 3301 adds r3, #1 - 8005bba: 617b str r3, [r7, #20] - 8005bbc: e7ec b.n 8005b98 <_ZN14rosserial_msgs3Log11deserializeEPh+0x3c> - } - inbuffer[offset+length_msg-1]=0; - 8005bbe: 693a ldr r2, [r7, #16] - 8005bc0: 68fb ldr r3, [r7, #12] - 8005bc2: 4413 add r3, r2 - 8005bc4: 3b01 subs r3, #1 - 8005bc6: 683a ldr r2, [r7, #0] - 8005bc8: 4413 add r3, r2 - 8005bca: 2200 movs r2, #0 - 8005bcc: 701a strb r2, [r3, #0] - this->msg = (char *)(inbuffer + offset-1); - 8005bce: 693b ldr r3, [r7, #16] - 8005bd0: 3b01 subs r3, #1 - 8005bd2: 683a ldr r2, [r7, #0] - 8005bd4: 441a add r2, r3 - 8005bd6: 687b ldr r3, [r7, #4] - 8005bd8: 609a str r2, [r3, #8] - offset += length_msg; - 8005bda: 693a ldr r2, [r7, #16] - 8005bdc: 68fb ldr r3, [r7, #12] - 8005bde: 4413 add r3, r2 - 8005be0: 613b str r3, [r7, #16] - return offset; - 8005be2: 693b ldr r3, [r7, #16] - } - 8005be4: 4618 mov r0, r3 - 8005be6: 3718 adds r7, #24 - 8005be8: 46bd mov sp, r7 - 8005bea: bd80 pop {r7, pc} + } -08005bec <_ZN14rosserial_msgs3Log7getTypeEv>: + if (IS_TIM_BREAK_INSTANCE(TIMx)) + 800720c: 687b ldr r3, [r7, #4] + 800720e: 4a18 ldr r2, [pc, #96] ; (8007270 ) + 8007210: 4293 cmp r3, r2 + 8007212: d003 beq.n 800721c + 8007214: 687b ldr r3, [r7, #4] + 8007216: 4a17 ldr r2, [pc, #92] ; (8007274 ) + 8007218: 4293 cmp r3, r2 + 800721a: d113 bne.n 8007244 + /* Check parameters */ + assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); + assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); - const char * getType(){ return "rosserial_msgs/Log"; }; - 8005bec: b480 push {r7} - 8005bee: b083 sub sp, #12 - 8005bf0: af00 add r7, sp, #0 - 8005bf2: 6078 str r0, [r7, #4] - 8005bf4: 4b03 ldr r3, [pc, #12] ; (8005c04 <_ZN14rosserial_msgs3Log7getTypeEv+0x18>) - 8005bf6: 4618 mov r0, r3 - 8005bf8: 370c adds r7, #12 - 8005bfa: 46bd mov sp, r7 - 8005bfc: f85d 7b04 ldr.w r7, [sp], #4 - 8005c00: 4770 bx lr - 8005c02: bf00 nop - 8005c04: 0800a334 .word 0x0800a334 - -08005c08 <_ZN14rosserial_msgs3Log6getMD5Ev>: - const char * getMD5(){ return "11abd731c25933261cd6183bd12d6295"; }; - 8005c08: b480 push {r7} - 8005c0a: b083 sub sp, #12 - 8005c0c: af00 add r7, sp, #0 - 8005c0e: 6078 str r0, [r7, #4] - 8005c10: 4b03 ldr r3, [pc, #12] ; (8005c20 <_ZN14rosserial_msgs3Log6getMD5Ev+0x18>) - 8005c12: 4618 mov r0, r3 - 8005c14: 370c adds r7, #12 - 8005c16: 46bd mov sp, r7 - 8005c18: f85d 7b04 ldr.w r7, [sp], #4 - 8005c1c: 4770 bx lr - 8005c1e: bf00 nop - 8005c20: 0800a348 .word 0x0800a348 - -08005c24 <_ZN14rosserial_msgs20RequestParamResponseC1Ev>: - uint32_t strings_length; - typedef char* _strings_type; - _strings_type st_strings; - _strings_type * strings; + /* Reset the Output Compare and Output Compare N IDLE State */ + tmpcr2 &= ~TIM_CR2_OIS2; + 800721c: 693b ldr r3, [r7, #16] + 800721e: f423 6380 bic.w r3, r3, #1024 ; 0x400 + 8007222: 613b str r3, [r7, #16] + tmpcr2 &= ~TIM_CR2_OIS2N; + 8007224: 693b ldr r3, [r7, #16] + 8007226: f423 6300 bic.w r3, r3, #2048 ; 0x800 + 800722a: 613b str r3, [r7, #16] + /* Set the Output Idle state */ + tmpcr2 |= (OC_Config->OCIdleState << 2U); + 800722c: 683b ldr r3, [r7, #0] + 800722e: 695b ldr r3, [r3, #20] + 8007230: 009b lsls r3, r3, #2 + 8007232: 693a ldr r2, [r7, #16] + 8007234: 4313 orrs r3, r2 + 8007236: 613b str r3, [r7, #16] + /* Set the Output N Idle state */ + tmpcr2 |= (OC_Config->OCNIdleState << 2U); + 8007238: 683b ldr r3, [r7, #0] + 800723a: 699b ldr r3, [r3, #24] + 800723c: 009b lsls r3, r3, #2 + 800723e: 693a ldr r2, [r7, #16] + 8007240: 4313 orrs r3, r2 + 8007242: 613b str r3, [r7, #16] + } - RequestParamResponse(): - 8005c24: b580 push {r7, lr} - 8005c26: b082 sub sp, #8 - 8005c28: af00 add r7, sp, #0 - 8005c2a: 6078 str r0, [r7, #4] - ints_length(0), ints(NULL), - floats_length(0), floats(NULL), - strings_length(0), strings(NULL) - 8005c2c: 687b ldr r3, [r7, #4] - 8005c2e: 4618 mov r0, r3 - 8005c30: f7fe fd66 bl 8004700 <_ZN3ros3MsgC1Ev> - 8005c34: 4a0c ldr r2, [pc, #48] ; (8005c68 <_ZN14rosserial_msgs20RequestParamResponseC1Ev+0x44>) - 8005c36: 687b ldr r3, [r7, #4] - 8005c38: 601a str r2, [r3, #0] - 8005c3a: 687b ldr r3, [r7, #4] - 8005c3c: 2200 movs r2, #0 - 8005c3e: 605a str r2, [r3, #4] - 8005c40: 687b ldr r3, [r7, #4] - 8005c42: 2200 movs r2, #0 - 8005c44: 60da str r2, [r3, #12] - 8005c46: 687b ldr r3, [r7, #4] - 8005c48: 2200 movs r2, #0 - 8005c4a: 611a str r2, [r3, #16] - 8005c4c: 687b ldr r3, [r7, #4] - 8005c4e: 2200 movs r2, #0 - 8005c50: 619a str r2, [r3, #24] - 8005c52: 687b ldr r3, [r7, #4] - 8005c54: 2200 movs r2, #0 - 8005c56: 61da str r2, [r3, #28] - 8005c58: 687b ldr r3, [r7, #4] - 8005c5a: 2200 movs r2, #0 - 8005c5c: 625a str r2, [r3, #36] ; 0x24 - { - } - 8005c5e: 687b ldr r3, [r7, #4] - 8005c60: 4618 mov r0, r3 - 8005c62: 3708 adds r7, #8 - 8005c64: 46bd mov sp, r7 - 8005c66: bd80 pop {r7, pc} - 8005c68: 0800a480 .word 0x0800a480 + /* Write to TIMx CR2 */ + TIMx->CR2 = tmpcr2; + 8007244: 687b ldr r3, [r7, #4] + 8007246: 693a ldr r2, [r7, #16] + 8007248: 605a str r2, [r3, #4] -08005c6c <_ZNK14rosserial_msgs20RequestParamResponse9serializeEPh>: + /* Write to TIMx CCMR1 */ + TIMx->CCMR1 = tmpccmrx; + 800724a: 687b ldr r3, [r7, #4] + 800724c: 68fa ldr r2, [r7, #12] + 800724e: 619a str r2, [r3, #24] - virtual int serialize(unsigned char *outbuffer) const - 8005c6c: b580 push {r7, lr} - 8005c6e: b08a sub sp, #40 ; 0x28 - 8005c70: af00 add r7, sp, #0 - 8005c72: 6078 str r0, [r7, #4] - 8005c74: 6039 str r1, [r7, #0] - { - int offset = 0; - 8005c76: 2300 movs r3, #0 - 8005c78: 627b str r3, [r7, #36] ; 0x24 - *(outbuffer + offset + 0) = (this->ints_length >> (8 * 0)) & 0xFF; - 8005c7a: 687b ldr r3, [r7, #4] - 8005c7c: 6859 ldr r1, [r3, #4] - 8005c7e: 6a7b ldr r3, [r7, #36] ; 0x24 - 8005c80: 683a ldr r2, [r7, #0] - 8005c82: 4413 add r3, r2 - 8005c84: b2ca uxtb r2, r1 - 8005c86: 701a strb r2, [r3, #0] - *(outbuffer + offset + 1) = (this->ints_length >> (8 * 1)) & 0xFF; - 8005c88: 687b ldr r3, [r7, #4] - 8005c8a: 685b ldr r3, [r3, #4] - 8005c8c: 0a19 lsrs r1, r3, #8 - 8005c8e: 6a7b ldr r3, [r7, #36] ; 0x24 - 8005c90: 3301 adds r3, #1 - 8005c92: 683a ldr r2, [r7, #0] - 8005c94: 4413 add r3, r2 - 8005c96: b2ca uxtb r2, r1 - 8005c98: 701a strb r2, [r3, #0] - *(outbuffer + offset + 2) = (this->ints_length >> (8 * 2)) & 0xFF; - 8005c9a: 687b ldr r3, [r7, #4] - 8005c9c: 685b ldr r3, [r3, #4] - 8005c9e: 0c19 lsrs r1, r3, #16 - 8005ca0: 6a7b ldr r3, [r7, #36] ; 0x24 - 8005ca2: 3302 adds r3, #2 - 8005ca4: 683a ldr r2, [r7, #0] - 8005ca6: 4413 add r3, r2 - 8005ca8: b2ca uxtb r2, r1 - 8005caa: 701a strb r2, [r3, #0] - *(outbuffer + offset + 3) = (this->ints_length >> (8 * 3)) & 0xFF; - 8005cac: 687b ldr r3, [r7, #4] - 8005cae: 685b ldr r3, [r3, #4] - 8005cb0: 0e19 lsrs r1, r3, #24 - 8005cb2: 6a7b ldr r3, [r7, #36] ; 0x24 - 8005cb4: 3303 adds r3, #3 - 8005cb6: 683a ldr r2, [r7, #0] - 8005cb8: 4413 add r3, r2 - 8005cba: b2ca uxtb r2, r1 - 8005cbc: 701a strb r2, [r3, #0] - offset += sizeof(this->ints_length); - 8005cbe: 6a7b ldr r3, [r7, #36] ; 0x24 - 8005cc0: 3304 adds r3, #4 - 8005cc2: 627b str r3, [r7, #36] ; 0x24 - for( uint32_t i = 0; i < ints_length; i++){ - 8005cc4: 2300 movs r3, #0 - 8005cc6: 623b str r3, [r7, #32] - 8005cc8: 687b ldr r3, [r7, #4] - 8005cca: 685b ldr r3, [r3, #4] - 8005ccc: 6a3a ldr r2, [r7, #32] - 8005cce: 429a cmp r2, r3 - 8005cd0: d22b bcs.n 8005d2a <_ZNK14rosserial_msgs20RequestParamResponse9serializeEPh+0xbe> - union { - int32_t real; - uint32_t base; - } u_intsi; - u_intsi.real = this->ints[i]; - 8005cd2: 687b ldr r3, [r7, #4] - 8005cd4: 68da ldr r2, [r3, #12] - 8005cd6: 6a3b ldr r3, [r7, #32] - 8005cd8: 009b lsls r3, r3, #2 - 8005cda: 4413 add r3, r2 - 8005cdc: 681b ldr r3, [r3, #0] - 8005cde: 613b str r3, [r7, #16] - *(outbuffer + offset + 0) = (u_intsi.base >> (8 * 0)) & 0xFF; - 8005ce0: 6939 ldr r1, [r7, #16] - 8005ce2: 6a7b ldr r3, [r7, #36] ; 0x24 - 8005ce4: 683a ldr r2, [r7, #0] - 8005ce6: 4413 add r3, r2 - 8005ce8: b2ca uxtb r2, r1 - 8005cea: 701a strb r2, [r3, #0] - *(outbuffer + offset + 1) = (u_intsi.base >> (8 * 1)) & 0xFF; - 8005cec: 693b ldr r3, [r7, #16] - 8005cee: 0a19 lsrs r1, r3, #8 - 8005cf0: 6a7b ldr r3, [r7, #36] ; 0x24 - 8005cf2: 3301 adds r3, #1 - 8005cf4: 683a ldr r2, [r7, #0] - 8005cf6: 4413 add r3, r2 - 8005cf8: b2ca uxtb r2, r1 - 8005cfa: 701a strb r2, [r3, #0] - *(outbuffer + offset + 2) = (u_intsi.base >> (8 * 2)) & 0xFF; - 8005cfc: 693b ldr r3, [r7, #16] - 8005cfe: 0c19 lsrs r1, r3, #16 - 8005d00: 6a7b ldr r3, [r7, #36] ; 0x24 - 8005d02: 3302 adds r3, #2 - 8005d04: 683a ldr r2, [r7, #0] - 8005d06: 4413 add r3, r2 - 8005d08: b2ca uxtb r2, r1 - 8005d0a: 701a strb r2, [r3, #0] - *(outbuffer + offset + 3) = (u_intsi.base >> (8 * 3)) & 0xFF; - 8005d0c: 693b ldr r3, [r7, #16] - 8005d0e: 0e19 lsrs r1, r3, #24 - 8005d10: 6a7b ldr r3, [r7, #36] ; 0x24 - 8005d12: 3303 adds r3, #3 - 8005d14: 683a ldr r2, [r7, #0] - 8005d16: 4413 add r3, r2 - 8005d18: b2ca uxtb r2, r1 - 8005d1a: 701a strb r2, [r3, #0] - offset += sizeof(this->ints[i]); - 8005d1c: 6a7b ldr r3, [r7, #36] ; 0x24 - 8005d1e: 3304 adds r3, #4 - 8005d20: 627b str r3, [r7, #36] ; 0x24 - for( uint32_t i = 0; i < ints_length; i++){ - 8005d22: 6a3b ldr r3, [r7, #32] - 8005d24: 3301 adds r3, #1 - 8005d26: 623b str r3, [r7, #32] - 8005d28: e7ce b.n 8005cc8 <_ZNK14rosserial_msgs20RequestParamResponse9serializeEPh+0x5c> - } - *(outbuffer + offset + 0) = (this->floats_length >> (8 * 0)) & 0xFF; - 8005d2a: 687b ldr r3, [r7, #4] - 8005d2c: 6919 ldr r1, [r3, #16] - 8005d2e: 6a7b ldr r3, [r7, #36] ; 0x24 - 8005d30: 683a ldr r2, [r7, #0] - 8005d32: 4413 add r3, r2 - 8005d34: b2ca uxtb r2, r1 - 8005d36: 701a strb r2, [r3, #0] - *(outbuffer + offset + 1) = (this->floats_length >> (8 * 1)) & 0xFF; - 8005d38: 687b ldr r3, [r7, #4] - 8005d3a: 691b ldr r3, [r3, #16] - 8005d3c: 0a19 lsrs r1, r3, #8 - 8005d3e: 6a7b ldr r3, [r7, #36] ; 0x24 - 8005d40: 3301 adds r3, #1 - 8005d42: 683a ldr r2, [r7, #0] - 8005d44: 4413 add r3, r2 - 8005d46: b2ca uxtb r2, r1 - 8005d48: 701a strb r2, [r3, #0] - *(outbuffer + offset + 2) = (this->floats_length >> (8 * 2)) & 0xFF; - 8005d4a: 687b ldr r3, [r7, #4] - 8005d4c: 691b ldr r3, [r3, #16] - 8005d4e: 0c19 lsrs r1, r3, #16 - 8005d50: 6a7b ldr r3, [r7, #36] ; 0x24 - 8005d52: 3302 adds r3, #2 - 8005d54: 683a ldr r2, [r7, #0] - 8005d56: 4413 add r3, r2 - 8005d58: b2ca uxtb r2, r1 - 8005d5a: 701a strb r2, [r3, #0] - *(outbuffer + offset + 3) = (this->floats_length >> (8 * 3)) & 0xFF; - 8005d5c: 687b ldr r3, [r7, #4] - 8005d5e: 691b ldr r3, [r3, #16] - 8005d60: 0e19 lsrs r1, r3, #24 - 8005d62: 6a7b ldr r3, [r7, #36] ; 0x24 - 8005d64: 3303 adds r3, #3 - 8005d66: 683a ldr r2, [r7, #0] - 8005d68: 4413 add r3, r2 - 8005d6a: b2ca uxtb r2, r1 - 8005d6c: 701a strb r2, [r3, #0] - offset += sizeof(this->floats_length); - 8005d6e: 6a7b ldr r3, [r7, #36] ; 0x24 - 8005d70: 3304 adds r3, #4 - 8005d72: 627b str r3, [r7, #36] ; 0x24 - for( uint32_t i = 0; i < floats_length; i++){ - 8005d74: 2300 movs r3, #0 - 8005d76: 61fb str r3, [r7, #28] - 8005d78: 687b ldr r3, [r7, #4] - 8005d7a: 691b ldr r3, [r3, #16] - 8005d7c: 69fa ldr r2, [r7, #28] - 8005d7e: 429a cmp r2, r3 - 8005d80: d22b bcs.n 8005dda <_ZNK14rosserial_msgs20RequestParamResponse9serializeEPh+0x16e> - union { - float real; - uint32_t base; - } u_floatsi; - u_floatsi.real = this->floats[i]; - 8005d82: 687b ldr r3, [r7, #4] - 8005d84: 699a ldr r2, [r3, #24] - 8005d86: 69fb ldr r3, [r7, #28] - 8005d88: 009b lsls r3, r3, #2 - 8005d8a: 4413 add r3, r2 - 8005d8c: 681b ldr r3, [r3, #0] - 8005d8e: 60fb str r3, [r7, #12] - *(outbuffer + offset + 0) = (u_floatsi.base >> (8 * 0)) & 0xFF; - 8005d90: 68f9 ldr r1, [r7, #12] - 8005d92: 6a7b ldr r3, [r7, #36] ; 0x24 - 8005d94: 683a ldr r2, [r7, #0] - 8005d96: 4413 add r3, r2 - 8005d98: b2ca uxtb r2, r1 - 8005d9a: 701a strb r2, [r3, #0] - *(outbuffer + offset + 1) = (u_floatsi.base >> (8 * 1)) & 0xFF; - 8005d9c: 68fb ldr r3, [r7, #12] - 8005d9e: 0a19 lsrs r1, r3, #8 - 8005da0: 6a7b ldr r3, [r7, #36] ; 0x24 - 8005da2: 3301 adds r3, #1 - 8005da4: 683a ldr r2, [r7, #0] - 8005da6: 4413 add r3, r2 - 8005da8: b2ca uxtb r2, r1 - 8005daa: 701a strb r2, [r3, #0] - *(outbuffer + offset + 2) = (u_floatsi.base >> (8 * 2)) & 0xFF; - 8005dac: 68fb ldr r3, [r7, #12] - 8005dae: 0c19 lsrs r1, r3, #16 - 8005db0: 6a7b ldr r3, [r7, #36] ; 0x24 - 8005db2: 3302 adds r3, #2 - 8005db4: 683a ldr r2, [r7, #0] - 8005db6: 4413 add r3, r2 - 8005db8: b2ca uxtb r2, r1 - 8005dba: 701a strb r2, [r3, #0] - *(outbuffer + offset + 3) = (u_floatsi.base >> (8 * 3)) & 0xFF; - 8005dbc: 68fb ldr r3, [r7, #12] - 8005dbe: 0e19 lsrs r1, r3, #24 - 8005dc0: 6a7b ldr r3, [r7, #36] ; 0x24 - 8005dc2: 3303 adds r3, #3 - 8005dc4: 683a ldr r2, [r7, #0] - 8005dc6: 4413 add r3, r2 - 8005dc8: b2ca uxtb r2, r1 - 8005dca: 701a strb r2, [r3, #0] - offset += sizeof(this->floats[i]); - 8005dcc: 6a7b ldr r3, [r7, #36] ; 0x24 - 8005dce: 3304 adds r3, #4 - 8005dd0: 627b str r3, [r7, #36] ; 0x24 - for( uint32_t i = 0; i < floats_length; i++){ - 8005dd2: 69fb ldr r3, [r7, #28] - 8005dd4: 3301 adds r3, #1 - 8005dd6: 61fb str r3, [r7, #28] - 8005dd8: e7ce b.n 8005d78 <_ZNK14rosserial_msgs20RequestParamResponse9serializeEPh+0x10c> - } - *(outbuffer + offset + 0) = (this->strings_length >> (8 * 0)) & 0xFF; - 8005dda: 687b ldr r3, [r7, #4] - 8005ddc: 69d9 ldr r1, [r3, #28] - 8005dde: 6a7b ldr r3, [r7, #36] ; 0x24 - 8005de0: 683a ldr r2, [r7, #0] - 8005de2: 4413 add r3, r2 - 8005de4: b2ca uxtb r2, r1 - 8005de6: 701a strb r2, [r3, #0] - *(outbuffer + offset + 1) = (this->strings_length >> (8 * 1)) & 0xFF; - 8005de8: 687b ldr r3, [r7, #4] - 8005dea: 69db ldr r3, [r3, #28] - 8005dec: 0a19 lsrs r1, r3, #8 - 8005dee: 6a7b ldr r3, [r7, #36] ; 0x24 - 8005df0: 3301 adds r3, #1 - 8005df2: 683a ldr r2, [r7, #0] - 8005df4: 4413 add r3, r2 - 8005df6: b2ca uxtb r2, r1 - 8005df8: 701a strb r2, [r3, #0] - *(outbuffer + offset + 2) = (this->strings_length >> (8 * 2)) & 0xFF; - 8005dfa: 687b ldr r3, [r7, #4] - 8005dfc: 69db ldr r3, [r3, #28] - 8005dfe: 0c19 lsrs r1, r3, #16 - 8005e00: 6a7b ldr r3, [r7, #36] ; 0x24 - 8005e02: 3302 adds r3, #2 - 8005e04: 683a ldr r2, [r7, #0] - 8005e06: 4413 add r3, r2 - 8005e08: b2ca uxtb r2, r1 - 8005e0a: 701a strb r2, [r3, #0] - *(outbuffer + offset + 3) = (this->strings_length >> (8 * 3)) & 0xFF; - 8005e0c: 687b ldr r3, [r7, #4] - 8005e0e: 69db ldr r3, [r3, #28] - 8005e10: 0e19 lsrs r1, r3, #24 - 8005e12: 6a7b ldr r3, [r7, #36] ; 0x24 - 8005e14: 3303 adds r3, #3 - 8005e16: 683a ldr r2, [r7, #0] - 8005e18: 4413 add r3, r2 - 8005e1a: b2ca uxtb r2, r1 - 8005e1c: 701a strb r2, [r3, #0] - offset += sizeof(this->strings_length); - 8005e1e: 6a7b ldr r3, [r7, #36] ; 0x24 - 8005e20: 3304 adds r3, #4 - 8005e22: 627b str r3, [r7, #36] ; 0x24 - for( uint32_t i = 0; i < strings_length; i++){ - 8005e24: 2300 movs r3, #0 - 8005e26: 61bb str r3, [r7, #24] - 8005e28: 687b ldr r3, [r7, #4] - 8005e2a: 69db ldr r3, [r3, #28] - 8005e2c: 69ba ldr r2, [r7, #24] - 8005e2e: 429a cmp r2, r3 - 8005e30: d228 bcs.n 8005e84 <_ZNK14rosserial_msgs20RequestParamResponse9serializeEPh+0x218> - uint32_t length_stringsi = strlen(this->strings[i]); - 8005e32: 687b ldr r3, [r7, #4] - 8005e34: 6a5a ldr r2, [r3, #36] ; 0x24 - 8005e36: 69bb ldr r3, [r7, #24] - 8005e38: 009b lsls r3, r3, #2 - 8005e3a: 4413 add r3, r2 - 8005e3c: 681b ldr r3, [r3, #0] - 8005e3e: 4618 mov r0, r3 - 8005e40: f7fa f9fa bl 8000238 - 8005e44: 6178 str r0, [r7, #20] - varToArr(outbuffer + offset, length_stringsi); - 8005e46: 6a7b ldr r3, [r7, #36] ; 0x24 - 8005e48: 683a ldr r2, [r7, #0] - 8005e4a: 4413 add r3, r2 - 8005e4c: 6979 ldr r1, [r7, #20] - 8005e4e: 4618 mov r0, r3 - 8005e50: f001 f8fd bl 800704e <_ZN3ros3Msg8varToArrIPhmEEvT_T0_> - offset += 4; - 8005e54: 6a7b ldr r3, [r7, #36] ; 0x24 - 8005e56: 3304 adds r3, #4 - 8005e58: 627b str r3, [r7, #36] ; 0x24 - memcpy(outbuffer + offset, this->strings[i], length_stringsi); - 8005e5a: 6a7b ldr r3, [r7, #36] ; 0x24 - 8005e5c: 683a ldr r2, [r7, #0] - 8005e5e: 18d0 adds r0, r2, r3 - 8005e60: 687b ldr r3, [r7, #4] - 8005e62: 6a5a ldr r2, [r3, #36] ; 0x24 - 8005e64: 69bb ldr r3, [r7, #24] - 8005e66: 009b lsls r3, r3, #2 - 8005e68: 4413 add r3, r2 - 8005e6a: 681b ldr r3, [r3, #0] - 8005e6c: 697a ldr r2, [r7, #20] - 8005e6e: 4619 mov r1, r3 - 8005e70: f003 ffd2 bl 8009e18 - offset += length_stringsi; - 8005e74: 6a7a ldr r2, [r7, #36] ; 0x24 - 8005e76: 697b ldr r3, [r7, #20] - 8005e78: 4413 add r3, r2 - 8005e7a: 627b str r3, [r7, #36] ; 0x24 - for( uint32_t i = 0; i < strings_length; i++){ - 8005e7c: 69bb ldr r3, [r7, #24] - 8005e7e: 3301 adds r3, #1 - 8005e80: 61bb str r3, [r7, #24] - 8005e82: e7d1 b.n 8005e28 <_ZNK14rosserial_msgs20RequestParamResponse9serializeEPh+0x1bc> - } - return offset; - 8005e84: 6a7b ldr r3, [r7, #36] ; 0x24 - } - 8005e86: 4618 mov r0, r3 - 8005e88: 3728 adds r7, #40 ; 0x28 - 8005e8a: 46bd mov sp, r7 - 8005e8c: bd80 pop {r7, pc} + /* Set the Capture Compare Register value */ + TIMx->CCR2 = OC_Config->Pulse; + 8007250: 683b ldr r3, [r7, #0] + 8007252: 685a ldr r2, [r3, #4] + 8007254: 687b ldr r3, [r7, #4] + 8007256: 639a str r2, [r3, #56] ; 0x38 -08005e8e <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh>: + /* Write to TIMx CCER */ + TIMx->CCER = tmpccer; + 8007258: 687b ldr r3, [r7, #4] + 800725a: 697a ldr r2, [r7, #20] + 800725c: 621a str r2, [r3, #32] +} + 800725e: bf00 nop + 8007260: 371c adds r7, #28 + 8007262: 46bd mov sp, r7 + 8007264: f85d 7b04 ldr.w r7, [sp], #4 + 8007268: 4770 bx lr + 800726a: bf00 nop + 800726c: feff8fff .word 0xfeff8fff + 8007270: 40010000 .word 0x40010000 + 8007274: 40010400 .word 0x40010400 + +08007278 : + * @param TIMx to select the TIM peripheral + * @param OC_Config The ouput configuration structure + * @retval None + */ +static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config) +{ + 8007278: b480 push {r7} + 800727a: b087 sub sp, #28 + 800727c: af00 add r7, sp, #0 + 800727e: 6078 str r0, [r7, #4] + 8007280: 6039 str r1, [r7, #0] + uint32_t tmpccmrx; + uint32_t tmpccer; + uint32_t tmpcr2; - virtual int deserialize(unsigned char *inbuffer) - 8005e8e: b580 push {r7, lr} - 8005e90: b08e sub sp, #56 ; 0x38 - 8005e92: af00 add r7, sp, #0 - 8005e94: 6078 str r0, [r7, #4] - 8005e96: 6039 str r1, [r7, #0] - { - int offset = 0; - 8005e98: 2300 movs r3, #0 - 8005e9a: 637b str r3, [r7, #52] ; 0x34 - uint32_t ints_lengthT = ((uint32_t) (*(inbuffer + offset))); - 8005e9c: 6b7b ldr r3, [r7, #52] ; 0x34 - 8005e9e: 683a ldr r2, [r7, #0] - 8005ea0: 4413 add r3, r2 - 8005ea2: 781b ldrb r3, [r3, #0] - 8005ea4: 623b str r3, [r7, #32] - ints_lengthT |= ((uint32_t) (*(inbuffer + offset + 1))) << (8 * 1); - 8005ea6: 6b7b ldr r3, [r7, #52] ; 0x34 - 8005ea8: 3301 adds r3, #1 - 8005eaa: 683a ldr r2, [r7, #0] - 8005eac: 4413 add r3, r2 - 8005eae: 781b ldrb r3, [r3, #0] - 8005eb0: 021b lsls r3, r3, #8 - 8005eb2: 6a3a ldr r2, [r7, #32] - 8005eb4: 4313 orrs r3, r2 - 8005eb6: 623b str r3, [r7, #32] - ints_lengthT |= ((uint32_t) (*(inbuffer + offset + 2))) << (8 * 2); - 8005eb8: 6b7b ldr r3, [r7, #52] ; 0x34 - 8005eba: 3302 adds r3, #2 - 8005ebc: 683a ldr r2, [r7, #0] - 8005ebe: 4413 add r3, r2 - 8005ec0: 781b ldrb r3, [r3, #0] - 8005ec2: 041b lsls r3, r3, #16 - 8005ec4: 6a3a ldr r2, [r7, #32] - 8005ec6: 4313 orrs r3, r2 - 8005ec8: 623b str r3, [r7, #32] - ints_lengthT |= ((uint32_t) (*(inbuffer + offset + 3))) << (8 * 3); - 8005eca: 6b7b ldr r3, [r7, #52] ; 0x34 - 8005ecc: 3303 adds r3, #3 - 8005ece: 683a ldr r2, [r7, #0] - 8005ed0: 4413 add r3, r2 - 8005ed2: 781b ldrb r3, [r3, #0] - 8005ed4: 061b lsls r3, r3, #24 - 8005ed6: 6a3a ldr r2, [r7, #32] - 8005ed8: 4313 orrs r3, r2 - 8005eda: 623b str r3, [r7, #32] - offset += sizeof(this->ints_length); - 8005edc: 6b7b ldr r3, [r7, #52] ; 0x34 - 8005ede: 3304 adds r3, #4 - 8005ee0: 637b str r3, [r7, #52] ; 0x34 - if(ints_lengthT > ints_length) - 8005ee2: 687b ldr r3, [r7, #4] - 8005ee4: 685b ldr r3, [r3, #4] - 8005ee6: 6a3a ldr r2, [r7, #32] - 8005ee8: 429a cmp r2, r3 - 8005eea: d90a bls.n 8005f02 <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x74> - this->ints = (int32_t*)realloc(this->ints, ints_lengthT * sizeof(int32_t)); - 8005eec: 687b ldr r3, [r7, #4] - 8005eee: 68da ldr r2, [r3, #12] - 8005ef0: 6a3b ldr r3, [r7, #32] - 8005ef2: 009b lsls r3, r3, #2 - 8005ef4: 4619 mov r1, r3 - 8005ef6: 4610 mov r0, r2 - 8005ef8: f003 ffa2 bl 8009e40 - 8005efc: 4602 mov r2, r0 - 8005efe: 687b ldr r3, [r7, #4] - 8005f00: 60da str r2, [r3, #12] - ints_length = ints_lengthT; - 8005f02: 687b ldr r3, [r7, #4] - 8005f04: 6a3a ldr r2, [r7, #32] - 8005f06: 605a str r2, [r3, #4] - for( uint32_t i = 0; i < ints_length; i++){ - 8005f08: 2300 movs r3, #0 - 8005f0a: 633b str r3, [r7, #48] ; 0x30 - 8005f0c: 687b ldr r3, [r7, #4] - 8005f0e: 685b ldr r3, [r3, #4] - 8005f10: 6b3a ldr r2, [r7, #48] ; 0x30 - 8005f12: 429a cmp r2, r3 - 8005f14: d236 bcs.n 8005f84 <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0xf6> - union { - int32_t real; - uint32_t base; - } u_st_ints; - u_st_ints.base = 0; - 8005f16: 2300 movs r3, #0 - 8005f18: 617b str r3, [r7, #20] - u_st_ints.base |= ((uint32_t) (*(inbuffer + offset + 0))) << (8 * 0); - 8005f1a: 697b ldr r3, [r7, #20] - 8005f1c: 6b7a ldr r2, [r7, #52] ; 0x34 - 8005f1e: 6839 ldr r1, [r7, #0] - 8005f20: 440a add r2, r1 - 8005f22: 7812 ldrb r2, [r2, #0] - 8005f24: 4313 orrs r3, r2 - 8005f26: 617b str r3, [r7, #20] - u_st_ints.base |= ((uint32_t) (*(inbuffer + offset + 1))) << (8 * 1); - 8005f28: 697a ldr r2, [r7, #20] - 8005f2a: 6b7b ldr r3, [r7, #52] ; 0x34 - 8005f2c: 3301 adds r3, #1 - 8005f2e: 6839 ldr r1, [r7, #0] - 8005f30: 440b add r3, r1 - 8005f32: 781b ldrb r3, [r3, #0] - 8005f34: 021b lsls r3, r3, #8 - 8005f36: 4313 orrs r3, r2 - 8005f38: 617b str r3, [r7, #20] - u_st_ints.base |= ((uint32_t) (*(inbuffer + offset + 2))) << (8 * 2); - 8005f3a: 697a ldr r2, [r7, #20] - 8005f3c: 6b7b ldr r3, [r7, #52] ; 0x34 - 8005f3e: 3302 adds r3, #2 - 8005f40: 6839 ldr r1, [r7, #0] - 8005f42: 440b add r3, r1 - 8005f44: 781b ldrb r3, [r3, #0] - 8005f46: 041b lsls r3, r3, #16 - 8005f48: 4313 orrs r3, r2 - 8005f4a: 617b str r3, [r7, #20] - u_st_ints.base |= ((uint32_t) (*(inbuffer + offset + 3))) << (8 * 3); - 8005f4c: 697a ldr r2, [r7, #20] - 8005f4e: 6b7b ldr r3, [r7, #52] ; 0x34 - 8005f50: 3303 adds r3, #3 - 8005f52: 6839 ldr r1, [r7, #0] - 8005f54: 440b add r3, r1 - 8005f56: 781b ldrb r3, [r3, #0] - 8005f58: 061b lsls r3, r3, #24 - 8005f5a: 4313 orrs r3, r2 - 8005f5c: 617b str r3, [r7, #20] - this->st_ints = u_st_ints.real; - 8005f5e: 697a ldr r2, [r7, #20] - 8005f60: 687b ldr r3, [r7, #4] - 8005f62: 609a str r2, [r3, #8] - offset += sizeof(this->st_ints); - 8005f64: 6b7b ldr r3, [r7, #52] ; 0x34 - 8005f66: 3304 adds r3, #4 - 8005f68: 637b str r3, [r7, #52] ; 0x34 - memcpy( &(this->ints[i]), &(this->st_ints), sizeof(int32_t)); - 8005f6a: 687b ldr r3, [r7, #4] - 8005f6c: 68da ldr r2, [r3, #12] - 8005f6e: 6b3b ldr r3, [r7, #48] ; 0x30 - 8005f70: 009b lsls r3, r3, #2 - 8005f72: 4413 add r3, r2 - 8005f74: 687a ldr r2, [r7, #4] - 8005f76: 3208 adds r2, #8 - 8005f78: 6812 ldr r2, [r2, #0] - 8005f7a: 601a str r2, [r3, #0] - for( uint32_t i = 0; i < ints_length; i++){ - 8005f7c: 6b3b ldr r3, [r7, #48] ; 0x30 - 8005f7e: 3301 adds r3, #1 - 8005f80: 633b str r3, [r7, #48] ; 0x30 - 8005f82: e7c3 b.n 8005f0c <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x7e> - } - uint32_t floats_lengthT = ((uint32_t) (*(inbuffer + offset))); - 8005f84: 6b7b ldr r3, [r7, #52] ; 0x34 - 8005f86: 683a ldr r2, [r7, #0] - 8005f88: 4413 add r3, r2 - 8005f8a: 781b ldrb r3, [r3, #0] - 8005f8c: 61fb str r3, [r7, #28] - floats_lengthT |= ((uint32_t) (*(inbuffer + offset + 1))) << (8 * 1); - 8005f8e: 6b7b ldr r3, [r7, #52] ; 0x34 - 8005f90: 3301 adds r3, #1 - 8005f92: 683a ldr r2, [r7, #0] - 8005f94: 4413 add r3, r2 - 8005f96: 781b ldrb r3, [r3, #0] - 8005f98: 021b lsls r3, r3, #8 - 8005f9a: 69fa ldr r2, [r7, #28] - 8005f9c: 4313 orrs r3, r2 - 8005f9e: 61fb str r3, [r7, #28] - floats_lengthT |= ((uint32_t) (*(inbuffer + offset + 2))) << (8 * 2); - 8005fa0: 6b7b ldr r3, [r7, #52] ; 0x34 - 8005fa2: 3302 adds r3, #2 - 8005fa4: 683a ldr r2, [r7, #0] - 8005fa6: 4413 add r3, r2 - 8005fa8: 781b ldrb r3, [r3, #0] - 8005faa: 041b lsls r3, r3, #16 - 8005fac: 69fa ldr r2, [r7, #28] - 8005fae: 4313 orrs r3, r2 - 8005fb0: 61fb str r3, [r7, #28] - floats_lengthT |= ((uint32_t) (*(inbuffer + offset + 3))) << (8 * 3); - 8005fb2: 6b7b ldr r3, [r7, #52] ; 0x34 - 8005fb4: 3303 adds r3, #3 - 8005fb6: 683a ldr r2, [r7, #0] - 8005fb8: 4413 add r3, r2 - 8005fba: 781b ldrb r3, [r3, #0] - 8005fbc: 061b lsls r3, r3, #24 - 8005fbe: 69fa ldr r2, [r7, #28] - 8005fc0: 4313 orrs r3, r2 - 8005fc2: 61fb str r3, [r7, #28] - offset += sizeof(this->floats_length); - 8005fc4: 6b7b ldr r3, [r7, #52] ; 0x34 - 8005fc6: 3304 adds r3, #4 - 8005fc8: 637b str r3, [r7, #52] ; 0x34 - if(floats_lengthT > floats_length) - 8005fca: 687b ldr r3, [r7, #4] - 8005fcc: 691b ldr r3, [r3, #16] - 8005fce: 69fa ldr r2, [r7, #28] - 8005fd0: 429a cmp r2, r3 - 8005fd2: d90a bls.n 8005fea <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x15c> - this->floats = (float*)realloc(this->floats, floats_lengthT * sizeof(float)); - 8005fd4: 687b ldr r3, [r7, #4] - 8005fd6: 699a ldr r2, [r3, #24] - 8005fd8: 69fb ldr r3, [r7, #28] - 8005fda: 009b lsls r3, r3, #2 - 8005fdc: 4619 mov r1, r3 - 8005fde: 4610 mov r0, r2 - 8005fe0: f003 ff2e bl 8009e40 - 8005fe4: 4602 mov r2, r0 - 8005fe6: 687b ldr r3, [r7, #4] - 8005fe8: 619a str r2, [r3, #24] - floats_length = floats_lengthT; - 8005fea: 687b ldr r3, [r7, #4] - 8005fec: 69fa ldr r2, [r7, #28] - 8005fee: 611a str r2, [r3, #16] - for( uint32_t i = 0; i < floats_length; i++){ - 8005ff0: 2300 movs r3, #0 - 8005ff2: 62fb str r3, [r7, #44] ; 0x2c - 8005ff4: 687b ldr r3, [r7, #4] - 8005ff6: 691b ldr r3, [r3, #16] - 8005ff8: 6afa ldr r2, [r7, #44] ; 0x2c - 8005ffa: 429a cmp r2, r3 - 8005ffc: d236 bcs.n 800606c <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x1de> - union { - float real; - uint32_t base; - } u_st_floats; - u_st_floats.base = 0; - 8005ffe: 2300 movs r3, #0 - 8006000: 613b str r3, [r7, #16] - u_st_floats.base |= ((uint32_t) (*(inbuffer + offset + 0))) << (8 * 0); - 8006002: 693b ldr r3, [r7, #16] - 8006004: 6b7a ldr r2, [r7, #52] ; 0x34 - 8006006: 6839 ldr r1, [r7, #0] - 8006008: 440a add r2, r1 - 800600a: 7812 ldrb r2, [r2, #0] - 800600c: 4313 orrs r3, r2 - 800600e: 613b str r3, [r7, #16] - u_st_floats.base |= ((uint32_t) (*(inbuffer + offset + 1))) << (8 * 1); - 8006010: 693a ldr r2, [r7, #16] - 8006012: 6b7b ldr r3, [r7, #52] ; 0x34 - 8006014: 3301 adds r3, #1 - 8006016: 6839 ldr r1, [r7, #0] - 8006018: 440b add r3, r1 - 800601a: 781b ldrb r3, [r3, #0] - 800601c: 021b lsls r3, r3, #8 - 800601e: 4313 orrs r3, r2 - 8006020: 613b str r3, [r7, #16] - u_st_floats.base |= ((uint32_t) (*(inbuffer + offset + 2))) << (8 * 2); - 8006022: 693a ldr r2, [r7, #16] - 8006024: 6b7b ldr r3, [r7, #52] ; 0x34 - 8006026: 3302 adds r3, #2 - 8006028: 6839 ldr r1, [r7, #0] - 800602a: 440b add r3, r1 - 800602c: 781b ldrb r3, [r3, #0] - 800602e: 041b lsls r3, r3, #16 - 8006030: 4313 orrs r3, r2 - 8006032: 613b str r3, [r7, #16] - u_st_floats.base |= ((uint32_t) (*(inbuffer + offset + 3))) << (8 * 3); - 8006034: 693a ldr r2, [r7, #16] - 8006036: 6b7b ldr r3, [r7, #52] ; 0x34 - 8006038: 3303 adds r3, #3 - 800603a: 6839 ldr r1, [r7, #0] - 800603c: 440b add r3, r1 - 800603e: 781b ldrb r3, [r3, #0] - 8006040: 061b lsls r3, r3, #24 - 8006042: 4313 orrs r3, r2 - 8006044: 613b str r3, [r7, #16] - this->st_floats = u_st_floats.real; - 8006046: 693a ldr r2, [r7, #16] - 8006048: 687b ldr r3, [r7, #4] - 800604a: 615a str r2, [r3, #20] - offset += sizeof(this->st_floats); - 800604c: 6b7b ldr r3, [r7, #52] ; 0x34 - 800604e: 3304 adds r3, #4 - 8006050: 637b str r3, [r7, #52] ; 0x34 - memcpy( &(this->floats[i]), &(this->st_floats), sizeof(float)); - 8006052: 687b ldr r3, [r7, #4] - 8006054: 699a ldr r2, [r3, #24] - 8006056: 6afb ldr r3, [r7, #44] ; 0x2c - 8006058: 009b lsls r3, r3, #2 - 800605a: 4413 add r3, r2 - 800605c: 687a ldr r2, [r7, #4] - 800605e: 3214 adds r2, #20 - 8006060: 6812 ldr r2, [r2, #0] - 8006062: 601a str r2, [r3, #0] - for( uint32_t i = 0; i < floats_length; i++){ - 8006064: 6afb ldr r3, [r7, #44] ; 0x2c - 8006066: 3301 adds r3, #1 - 8006068: 62fb str r3, [r7, #44] ; 0x2c - 800606a: e7c3 b.n 8005ff4 <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x166> - } - uint32_t strings_lengthT = ((uint32_t) (*(inbuffer + offset))); - 800606c: 6b7b ldr r3, [r7, #52] ; 0x34 - 800606e: 683a ldr r2, [r7, #0] - 8006070: 4413 add r3, r2 - 8006072: 781b ldrb r3, [r3, #0] - 8006074: 61bb str r3, [r7, #24] - strings_lengthT |= ((uint32_t) (*(inbuffer + offset + 1))) << (8 * 1); - 8006076: 6b7b ldr r3, [r7, #52] ; 0x34 - 8006078: 3301 adds r3, #1 - 800607a: 683a ldr r2, [r7, #0] - 800607c: 4413 add r3, r2 - 800607e: 781b ldrb r3, [r3, #0] - 8006080: 021b lsls r3, r3, #8 - 8006082: 69ba ldr r2, [r7, #24] - 8006084: 4313 orrs r3, r2 - 8006086: 61bb str r3, [r7, #24] - strings_lengthT |= ((uint32_t) (*(inbuffer + offset + 2))) << (8 * 2); - 8006088: 6b7b ldr r3, [r7, #52] ; 0x34 - 800608a: 3302 adds r3, #2 - 800608c: 683a ldr r2, [r7, #0] - 800608e: 4413 add r3, r2 - 8006090: 781b ldrb r3, [r3, #0] - 8006092: 041b lsls r3, r3, #16 - 8006094: 69ba ldr r2, [r7, #24] - 8006096: 4313 orrs r3, r2 - 8006098: 61bb str r3, [r7, #24] - strings_lengthT |= ((uint32_t) (*(inbuffer + offset + 3))) << (8 * 3); - 800609a: 6b7b ldr r3, [r7, #52] ; 0x34 - 800609c: 3303 adds r3, #3 - 800609e: 683a ldr r2, [r7, #0] - 80060a0: 4413 add r3, r2 - 80060a2: 781b ldrb r3, [r3, #0] - 80060a4: 061b lsls r3, r3, #24 - 80060a6: 69ba ldr r2, [r7, #24] - 80060a8: 4313 orrs r3, r2 - 80060aa: 61bb str r3, [r7, #24] - offset += sizeof(this->strings_length); - 80060ac: 6b7b ldr r3, [r7, #52] ; 0x34 - 80060ae: 3304 adds r3, #4 - 80060b0: 637b str r3, [r7, #52] ; 0x34 - if(strings_lengthT > strings_length) - 80060b2: 687b ldr r3, [r7, #4] - 80060b4: 69db ldr r3, [r3, #28] - 80060b6: 69ba ldr r2, [r7, #24] - 80060b8: 429a cmp r2, r3 - 80060ba: d90a bls.n 80060d2 <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x244> - this->strings = (char**)realloc(this->strings, strings_lengthT * sizeof(char*)); - 80060bc: 687b ldr r3, [r7, #4] - 80060be: 6a5a ldr r2, [r3, #36] ; 0x24 - 80060c0: 69bb ldr r3, [r7, #24] - 80060c2: 009b lsls r3, r3, #2 - 80060c4: 4619 mov r1, r3 - 80060c6: 4610 mov r0, r2 - 80060c8: f003 feba bl 8009e40 - 80060cc: 4602 mov r2, r0 - 80060ce: 687b ldr r3, [r7, #4] - 80060d0: 625a str r2, [r3, #36] ; 0x24 - strings_length = strings_lengthT; - 80060d2: 687b ldr r3, [r7, #4] - 80060d4: 69ba ldr r2, [r7, #24] - 80060d6: 61da str r2, [r3, #28] - for( uint32_t i = 0; i < strings_length; i++){ - 80060d8: 2300 movs r3, #0 - 80060da: 62bb str r3, [r7, #40] ; 0x28 - 80060dc: 687b ldr r3, [r7, #4] - 80060de: 69db ldr r3, [r3, #28] - 80060e0: 6aba ldr r2, [r7, #40] ; 0x28 - 80060e2: 429a cmp r2, r3 - 80060e4: d23f bcs.n 8006166 <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x2d8> - uint32_t length_st_strings; - arrToVar(length_st_strings, (inbuffer + offset)); - 80060e6: 6b7b ldr r3, [r7, #52] ; 0x34 - 80060e8: 683a ldr r2, [r7, #0] - 80060ea: 441a add r2, r3 - 80060ec: f107 030c add.w r3, r7, #12 - 80060f0: 4611 mov r1, r2 - 80060f2: 4618 mov r0, r3 - 80060f4: f000 ffc9 bl 800708a <_ZN3ros3Msg8arrToVarImPhEEvRT_T0_> - offset += 4; - 80060f8: 6b7b ldr r3, [r7, #52] ; 0x34 - 80060fa: 3304 adds r3, #4 - 80060fc: 637b str r3, [r7, #52] ; 0x34 - for(unsigned int k= offset; k< offset+length_st_strings; ++k){ - 80060fe: 6b7b ldr r3, [r7, #52] ; 0x34 - 8006100: 627b str r3, [r7, #36] ; 0x24 - 8006102: 6b7a ldr r2, [r7, #52] ; 0x34 - 8006104: 68fb ldr r3, [r7, #12] - 8006106: 4413 add r3, r2 - 8006108: 6a7a ldr r2, [r7, #36] ; 0x24 - 800610a: 429a cmp r2, r3 - 800610c: d20c bcs.n 8006128 <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x29a> - inbuffer[k-1]=inbuffer[k]; - 800610e: 683a ldr r2, [r7, #0] - 8006110: 6a7b ldr r3, [r7, #36] ; 0x24 - 8006112: 441a add r2, r3 - 8006114: 6a7b ldr r3, [r7, #36] ; 0x24 - 8006116: 3b01 subs r3, #1 - 8006118: 6839 ldr r1, [r7, #0] - 800611a: 440b add r3, r1 - 800611c: 7812 ldrb r2, [r2, #0] - 800611e: 701a strb r2, [r3, #0] - for(unsigned int k= offset; k< offset+length_st_strings; ++k){ - 8006120: 6a7b ldr r3, [r7, #36] ; 0x24 - 8006122: 3301 adds r3, #1 - 8006124: 627b str r3, [r7, #36] ; 0x24 - 8006126: e7ec b.n 8006102 <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x274> - } - inbuffer[offset+length_st_strings-1]=0; - 8006128: 6b7a ldr r2, [r7, #52] ; 0x34 - 800612a: 68fb ldr r3, [r7, #12] - 800612c: 4413 add r3, r2 - 800612e: 3b01 subs r3, #1 - 8006130: 683a ldr r2, [r7, #0] - 8006132: 4413 add r3, r2 - 8006134: 2200 movs r2, #0 - 8006136: 701a strb r2, [r3, #0] - this->st_strings = (char *)(inbuffer + offset-1); - 8006138: 6b7b ldr r3, [r7, #52] ; 0x34 - 800613a: 3b01 subs r3, #1 - 800613c: 683a ldr r2, [r7, #0] - 800613e: 441a add r2, r3 - 8006140: 687b ldr r3, [r7, #4] - 8006142: 621a str r2, [r3, #32] - offset += length_st_strings; - 8006144: 6b7a ldr r2, [r7, #52] ; 0x34 - 8006146: 68fb ldr r3, [r7, #12] - 8006148: 4413 add r3, r2 - 800614a: 637b str r3, [r7, #52] ; 0x34 - memcpy( &(this->strings[i]), &(this->st_strings), sizeof(char*)); - 800614c: 687b ldr r3, [r7, #4] - 800614e: 6a5a ldr r2, [r3, #36] ; 0x24 - 8006150: 6abb ldr r3, [r7, #40] ; 0x28 - 8006152: 009b lsls r3, r3, #2 - 8006154: 4413 add r3, r2 - 8006156: 687a ldr r2, [r7, #4] - 8006158: 3220 adds r2, #32 - 800615a: 6812 ldr r2, [r2, #0] - 800615c: 601a str r2, [r3, #0] - for( uint32_t i = 0; i < strings_length; i++){ - 800615e: 6abb ldr r3, [r7, #40] ; 0x28 - 8006160: 3301 adds r3, #1 - 8006162: 62bb str r3, [r7, #40] ; 0x28 - 8006164: e7ba b.n 80060dc <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x24e> - } - return offset; - 8006166: 6b7b ldr r3, [r7, #52] ; 0x34 - } - 8006168: 4618 mov r0, r3 - 800616a: 3738 adds r7, #56 ; 0x38 - 800616c: 46bd mov sp, r7 - 800616e: bd80 pop {r7, pc} + /* Disable the Channel 3: Reset the CC2E Bit */ + TIMx->CCER &= ~TIM_CCER_CC3E; + 8007282: 687b ldr r3, [r7, #4] + 8007284: 6a1b ldr r3, [r3, #32] + 8007286: f423 7280 bic.w r2, r3, #256 ; 0x100 + 800728a: 687b ldr r3, [r7, #4] + 800728c: 621a str r2, [r3, #32] -08006170 <_ZN14rosserial_msgs20RequestParamResponse7getTypeEv>: + /* Get the TIMx CCER register value */ + tmpccer = TIMx->CCER; + 800728e: 687b ldr r3, [r7, #4] + 8007290: 6a1b ldr r3, [r3, #32] + 8007292: 617b str r3, [r7, #20] + /* Get the TIMx CR2 register value */ + tmpcr2 = TIMx->CR2; + 8007294: 687b ldr r3, [r7, #4] + 8007296: 685b ldr r3, [r3, #4] + 8007298: 613b str r3, [r7, #16] - const char * getType(){ return REQUESTPARAM; }; - 8006170: b480 push {r7} - 8006172: b083 sub sp, #12 - 8006174: af00 add r7, sp, #0 - 8006176: 6078 str r0, [r7, #4] - 8006178: 4b03 ldr r3, [pc, #12] ; (8006188 <_ZN14rosserial_msgs20RequestParamResponse7getTypeEv+0x18>) - 800617a: 4618 mov r0, r3 - 800617c: 370c adds r7, #12 - 800617e: 46bd mov sp, r7 - 8006180: f85d 7b04 ldr.w r7, [sp], #4 - 8006184: 4770 bx lr - 8006186: bf00 nop - 8006188: 0800a41c .word 0x0800a41c - -0800618c <_ZN14rosserial_msgs20RequestParamResponse6getMD5Ev>: - const char * getMD5(){ return "9f0e98bda65981986ddf53afa7a40e49"; }; - 800618c: b480 push {r7} - 800618e: b083 sub sp, #12 - 8006190: af00 add r7, sp, #0 - 8006192: 6078 str r0, [r7, #4] - 8006194: 4b03 ldr r3, [pc, #12] ; (80061a4 <_ZN14rosserial_msgs20RequestParamResponse6getMD5Ev+0x18>) - 8006196: 4618 mov r0, r3 - 8006198: 370c adds r7, #12 - 800619a: 46bd mov sp, r7 - 800619c: f85d 7b04 ldr.w r7, [sp], #4 - 80061a0: 4770 bx lr - 80061a2: bf00 nop - 80061a4: 0800a36c .word 0x0800a36c - -080061a8 <_ZN3ros9PublisherC1EPKcPNS_3MsgEi>: + /* Get the TIMx CCMR2 register value */ + tmpccmrx = TIMx->CCMR2; + 800729a: 687b ldr r3, [r7, #4] + 800729c: 69db ldr r3, [r3, #28] + 800729e: 60fb str r3, [r7, #12] -/* Generic Publisher */ -class Publisher -{ -public: - Publisher(const char * topic_name, Msg * msg, int endpoint = rosserial_msgs::TopicInfo::ID_PUBLISHER) : - 80061a8: b480 push {r7} - 80061aa: b085 sub sp, #20 - 80061ac: af00 add r7, sp, #0 - 80061ae: 60f8 str r0, [r7, #12] - 80061b0: 60b9 str r1, [r7, #8] - 80061b2: 607a str r2, [r7, #4] - 80061b4: 603b str r3, [r7, #0] - topic_(topic_name), - msg_(msg), - endpoint_(endpoint) {}; - 80061b6: 68fb ldr r3, [r7, #12] - 80061b8: 68ba ldr r2, [r7, #8] - 80061ba: 601a str r2, [r3, #0] - 80061bc: 68fb ldr r3, [r7, #12] - 80061be: 687a ldr r2, [r7, #4] - 80061c0: 605a str r2, [r3, #4] - 80061c2: 68fb ldr r3, [r7, #12] - 80061c4: 683a ldr r2, [r7, #0] - 80061c6: 611a str r2, [r3, #16] - 80061c8: 68fb ldr r3, [r7, #12] - 80061ca: 4618 mov r0, r3 - 80061cc: 3714 adds r7, #20 - 80061ce: 46bd mov sp, r7 - 80061d0: f85d 7b04 ldr.w r7, [sp], #4 - 80061d4: 4770 bx lr - -080061d6 <_ZN3ros9Publisher7publishEPKNS_3MsgE>: + /* Reset the Output Compare mode and Capture/Compare selection Bits */ + tmpccmrx &= ~TIM_CCMR2_OC3M; + 80072a0: 68fa ldr r2, [r7, #12] + 80072a2: 4b2d ldr r3, [pc, #180] ; (8007358 ) + 80072a4: 4013 ands r3, r2 + 80072a6: 60fb str r3, [r7, #12] + tmpccmrx &= ~TIM_CCMR2_CC3S; + 80072a8: 68fb ldr r3, [r7, #12] + 80072aa: f023 0303 bic.w r3, r3, #3 + 80072ae: 60fb str r3, [r7, #12] + /* Select the Output Compare Mode */ + tmpccmrx |= OC_Config->OCMode; + 80072b0: 683b ldr r3, [r7, #0] + 80072b2: 681b ldr r3, [r3, #0] + 80072b4: 68fa ldr r2, [r7, #12] + 80072b6: 4313 orrs r3, r2 + 80072b8: 60fb str r3, [r7, #12] - int publish(const Msg * msg) - 80061d6: b580 push {r7, lr} - 80061d8: b082 sub sp, #8 - 80061da: af00 add r7, sp, #0 - 80061dc: 6078 str r0, [r7, #4] - 80061de: 6039 str r1, [r7, #0] - { - return nh_->publish(id_, msg); - 80061e0: 687b ldr r3, [r7, #4] - 80061e2: 68d8 ldr r0, [r3, #12] - 80061e4: 687b ldr r3, [r7, #4] - 80061e6: 68db ldr r3, [r3, #12] - 80061e8: 681b ldr r3, [r3, #0] - 80061ea: 681b ldr r3, [r3, #0] - 80061ec: 687a ldr r2, [r7, #4] - 80061ee: 6891 ldr r1, [r2, #8] - 80061f0: 683a ldr r2, [r7, #0] - 80061f2: 4798 blx r3 - 80061f4: 4603 mov r3, r0 - }; - 80061f6: 4618 mov r0, r3 - 80061f8: 3708 adds r7, #8 - 80061fa: 46bd mov sp, r7 - 80061fc: bd80 pop {r7, pc} + /* Reset the Output Polarity level */ + tmpccer &= ~TIM_CCER_CC3P; + 80072ba: 697b ldr r3, [r7, #20] + 80072bc: f423 7300 bic.w r3, r3, #512 ; 0x200 + 80072c0: 617b str r3, [r7, #20] + /* Set the Output Compare Polarity */ + tmpccer |= (OC_Config->OCPolarity << 8U); + 80072c2: 683b ldr r3, [r7, #0] + 80072c4: 689b ldr r3, [r3, #8] + 80072c6: 021b lsls r3, r3, #8 + 80072c8: 697a ldr r2, [r7, #20] + 80072ca: 4313 orrs r3, r2 + 80072cc: 617b str r3, [r7, #20] -080061fe <_ZN3ros9Publisher15getEndpointTypeEv>: - int getEndpointType() - 80061fe: b480 push {r7} - 8006200: b083 sub sp, #12 - 8006202: af00 add r7, sp, #0 - 8006204: 6078 str r0, [r7, #4] + if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_3)) + 80072ce: 687b ldr r3, [r7, #4] + 80072d0: 4a22 ldr r2, [pc, #136] ; (800735c ) + 80072d2: 4293 cmp r3, r2 + 80072d4: d003 beq.n 80072de + 80072d6: 687b ldr r3, [r7, #4] + 80072d8: 4a21 ldr r2, [pc, #132] ; (8007360 ) + 80072da: 4293 cmp r3, r2 + 80072dc: d10d bne.n 80072fa { - return endpoint_; - 8006206: 687b ldr r3, [r7, #4] - 8006208: 691b ldr r3, [r3, #16] + assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); + + /* Reset the Output N Polarity level */ + tmpccer &= ~TIM_CCER_CC3NP; + 80072de: 697b ldr r3, [r7, #20] + 80072e0: f423 6300 bic.w r3, r3, #2048 ; 0x800 + 80072e4: 617b str r3, [r7, #20] + /* Set the Output N Polarity */ + tmpccer |= (OC_Config->OCNPolarity << 8U); + 80072e6: 683b ldr r3, [r7, #0] + 80072e8: 68db ldr r3, [r3, #12] + 80072ea: 021b lsls r3, r3, #8 + 80072ec: 697a ldr r2, [r7, #20] + 80072ee: 4313 orrs r3, r2 + 80072f0: 617b str r3, [r7, #20] + /* Reset the Output N State */ + tmpccer &= ~TIM_CCER_CC3NE; + 80072f2: 697b ldr r3, [r7, #20] + 80072f4: f423 6380 bic.w r3, r3, #1024 ; 0x400 + 80072f8: 617b str r3, [r7, #20] } - 800620a: 4618 mov r0, r3 - 800620c: 370c adds r7, #12 - 800620e: 46bd mov sp, r7 - 8006210: f85d 7b04 ldr.w r7, [sp], #4 - 8006214: 4770 bx lr -08006216 <_ZN13STM32Hardware10getRdmaIndEv>: - UART_HandleTypeDef *huart; + if (IS_TIM_BREAK_INSTANCE(TIMx)) + 80072fa: 687b ldr r3, [r7, #4] + 80072fc: 4a17 ldr r2, [pc, #92] ; (800735c ) + 80072fe: 4293 cmp r3, r2 + 8007300: d003 beq.n 800730a + 8007302: 687b ldr r3, [r7, #4] + 8007304: 4a16 ldr r2, [pc, #88] ; (8007360 ) + 8007306: 4293 cmp r3, r2 + 8007308: d113 bne.n 8007332 + /* Check parameters */ + assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); + assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); - const static uint16_t rbuflen = 128; - uint8_t rbuf[rbuflen]; - uint32_t rind; - inline uint32_t getRdmaInd(void){ return (rbuflen - huart->hdmarx->Instance->NDTR) & (rbuflen - 1); } - 8006216: b480 push {r7} - 8006218: b083 sub sp, #12 - 800621a: af00 add r7, sp, #0 - 800621c: 6078 str r0, [r7, #4] - 800621e: 687b ldr r3, [r7, #4] - 8006220: 681b ldr r3, [r3, #0] - 8006222: 6edb ldr r3, [r3, #108] ; 0x6c - 8006224: 681b ldr r3, [r3, #0] - 8006226: 685b ldr r3, [r3, #4] - 8006228: 425b negs r3, r3 - 800622a: f003 037f and.w r3, r3, #127 ; 0x7f - 800622e: 4618 mov r0, r3 - 8006230: 370c adds r7, #12 - 8006232: 46bd mov sp, r7 - 8006234: f85d 7b04 ldr.w r7, [sp], #4 - 8006238: 4770 bx lr - ... + /* Reset the Output Compare and Output Compare N IDLE State */ + tmpcr2 &= ~TIM_CR2_OIS3; + 800730a: 693b ldr r3, [r7, #16] + 800730c: f423 5380 bic.w r3, r3, #4096 ; 0x1000 + 8007310: 613b str r3, [r7, #16] + tmpcr2 &= ~TIM_CR2_OIS3N; + 8007312: 693b ldr r3, [r7, #16] + 8007314: f423 5300 bic.w r3, r3, #8192 ; 0x2000 + 8007318: 613b str r3, [r7, #16] + /* Set the Output Idle state */ + tmpcr2 |= (OC_Config->OCIdleState << 4U); + 800731a: 683b ldr r3, [r7, #0] + 800731c: 695b ldr r3, [r3, #20] + 800731e: 011b lsls r3, r3, #4 + 8007320: 693a ldr r2, [r7, #16] + 8007322: 4313 orrs r3, r2 + 8007324: 613b str r3, [r7, #16] + /* Set the Output N Idle state */ + tmpcr2 |= (OC_Config->OCNIdleState << 4U); + 8007326: 683b ldr r3, [r7, #0] + 8007328: 699b ldr r3, [r3, #24] + 800732a: 011b lsls r3, r3, #4 + 800732c: 693a ldr r2, [r7, #16] + 800732e: 4313 orrs r3, r2 + 8007330: 613b str r3, [r7, #16] + } -0800623c <_ZN13STM32HardwareC1Ev>: - const static uint16_t tbuflen = 256; - uint8_t tbuf[tbuflen]; - uint32_t twind, tfind; + /* Write to TIMx CR2 */ + TIMx->CR2 = tmpcr2; + 8007332: 687b ldr r3, [r7, #4] + 8007334: 693a ldr r2, [r7, #16] + 8007336: 605a str r2, [r3, #4] - public: - STM32Hardware(): - 800623c: b480 push {r7} - 800623e: b083 sub sp, #12 - 8006240: af00 add r7, sp, #0 - 8006242: 6078 str r0, [r7, #4] - huart(&huart3), rind(0), twind(0), tfind(0){ - 8006244: 687b ldr r3, [r7, #4] - 8006246: 4a0a ldr r2, [pc, #40] ; (8006270 <_ZN13STM32HardwareC1Ev+0x34>) - 8006248: 601a str r2, [r3, #0] - 800624a: 687b ldr r3, [r7, #4] - 800624c: 2200 movs r2, #0 - 800624e: f8c3 2084 str.w r2, [r3, #132] ; 0x84 - 8006252: 687b ldr r3, [r7, #4] - 8006254: 2200 movs r2, #0 - 8006256: f8c3 2188 str.w r2, [r3, #392] ; 0x188 - 800625a: 687b ldr r3, [r7, #4] - 800625c: 2200 movs r2, #0 - 800625e: f8c3 218c str.w r2, [r3, #396] ; 0x18c - } - 8006262: 687b ldr r3, [r7, #4] - 8006264: 4618 mov r0, r3 - 8006266: 370c adds r7, #12 - 8006268: 46bd mov sp, r7 - 800626a: f85d 7b04 ldr.w r7, [sp], #4 - 800626e: 4770 bx lr - 8006270: 200001a4 .word 0x200001a4 + /* Write to TIMx CCMR2 */ + TIMx->CCMR2 = tmpccmrx; + 8007338: 687b ldr r3, [r7, #4] + 800733a: 68fa ldr r2, [r7, #12] + 800733c: 61da str r2, [r3, #28] -08006274 <_ZN13STM32Hardware4initEv>: + /* Set the Capture Compare Register value */ + TIMx->CCR3 = OC_Config->Pulse; + 800733e: 683b ldr r3, [r7, #0] + 8007340: 685a ldr r2, [r3, #4] + 8007342: 687b ldr r3, [r7, #4] + 8007344: 63da str r2, [r3, #60] ; 0x3c - STM32Hardware(UART_HandleTypeDef *huart_): - huart(huart_), rind(0), twind(0), tfind(0){ - } - - void init(){ - 8006274: b580 push {r7, lr} - 8006276: b082 sub sp, #8 - 8006278: af00 add r7, sp, #0 - 800627a: 6078 str r0, [r7, #4] - reset_rbuf(); - 800627c: 6878 ldr r0, [r7, #4] - 800627e: f000 f804 bl 800628a <_ZN13STM32Hardware10reset_rbufEv> - } - 8006282: bf00 nop - 8006284: 3708 adds r7, #8 - 8006286: 46bd mov sp, r7 - 8006288: bd80 pop {r7, pc} + /* Write to TIMx CCER */ + TIMx->CCER = tmpccer; + 8007346: 687b ldr r3, [r7, #4] + 8007348: 697a ldr r2, [r7, #20] + 800734a: 621a str r2, [r3, #32] +} + 800734c: bf00 nop + 800734e: 371c adds r7, #28 + 8007350: 46bd mov sp, r7 + 8007352: f85d 7b04 ldr.w r7, [sp], #4 + 8007356: 4770 bx lr + 8007358: fffeff8f .word 0xfffeff8f + 800735c: 40010000 .word 0x40010000 + 8007360: 40010400 .word 0x40010400 + +08007364 : + * @param TIMx to select the TIM peripheral + * @param OC_Config The ouput configuration structure + * @retval None + */ +static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config) +{ + 8007364: b480 push {r7} + 8007366: b087 sub sp, #28 + 8007368: af00 add r7, sp, #0 + 800736a: 6078 str r0, [r7, #4] + 800736c: 6039 str r1, [r7, #0] + uint32_t tmpccmrx; + uint32_t tmpccer; + uint32_t tmpcr2; -0800628a <_ZN13STM32Hardware10reset_rbufEv>: + /* Disable the Channel 4: Reset the CC4E Bit */ + TIMx->CCER &= ~TIM_CCER_CC4E; + 800736e: 687b ldr r3, [r7, #4] + 8007370: 6a1b ldr r3, [r3, #32] + 8007372: f423 5280 bic.w r2, r3, #4096 ; 0x1000 + 8007376: 687b ldr r3, [r7, #4] + 8007378: 621a str r2, [r3, #32] - void reset_rbuf(void){ - 800628a: b580 push {r7, lr} - 800628c: b082 sub sp, #8 - 800628e: af00 add r7, sp, #0 - 8006290: 6078 str r0, [r7, #4] - HAL_UART_Receive_DMA(huart, rbuf, rbuflen); - 8006292: 687b ldr r3, [r7, #4] - 8006294: 6818 ldr r0, [r3, #0] - 8006296: 687b ldr r3, [r7, #4] - 8006298: 3304 adds r3, #4 - 800629a: 2280 movs r2, #128 ; 0x80 - 800629c: 4619 mov r1, r3 - 800629e: f7fd f9eb bl 8003678 - } - 80062a2: bf00 nop - 80062a4: 3708 adds r7, #8 - 80062a6: 46bd mov sp, r7 - 80062a8: bd80 pop {r7, pc} + /* Get the TIMx CCER register value */ + tmpccer = TIMx->CCER; + 800737a: 687b ldr r3, [r7, #4] + 800737c: 6a1b ldr r3, [r3, #32] + 800737e: 613b str r3, [r7, #16] + /* Get the TIMx CR2 register value */ + tmpcr2 = TIMx->CR2; + 8007380: 687b ldr r3, [r7, #4] + 8007382: 685b ldr r3, [r3, #4] + 8007384: 617b str r3, [r7, #20] -080062aa <_ZN13STM32Hardware4readEv>: + /* Get the TIMx CCMR2 register value */ + tmpccmrx = TIMx->CCMR2; + 8007386: 687b ldr r3, [r7, #4] + 8007388: 69db ldr r3, [r3, #28] + 800738a: 60fb str r3, [r7, #12] - int read(){ - 80062aa: b590 push {r4, r7, lr} - 80062ac: b085 sub sp, #20 - 80062ae: af00 add r7, sp, #0 - 80062b0: 6078 str r0, [r7, #4] - int c = -1; - 80062b2: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff - 80062b6: 60fb str r3, [r7, #12] - if(rind != getRdmaInd()){ - 80062b8: 687b ldr r3, [r7, #4] - 80062ba: f8d3 4084 ldr.w r4, [r3, #132] ; 0x84 - 80062be: 6878 ldr r0, [r7, #4] - 80062c0: f7ff ffa9 bl 8006216 <_ZN13STM32Hardware10getRdmaIndEv> - 80062c4: 4603 mov r3, r0 - 80062c6: 429c cmp r4, r3 - 80062c8: bf14 ite ne - 80062ca: 2301 movne r3, #1 - 80062cc: 2300 moveq r3, #0 - 80062ce: b2db uxtb r3, r3 - 80062d0: 2b00 cmp r3, #0 - 80062d2: d012 beq.n 80062fa <_ZN13STM32Hardware4readEv+0x50> - c = rbuf[rind++]; - 80062d4: 687b ldr r3, [r7, #4] - 80062d6: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 - 80062da: 1c59 adds r1, r3, #1 - 80062dc: 687a ldr r2, [r7, #4] - 80062de: f8c2 1084 str.w r1, [r2, #132] ; 0x84 - 80062e2: 687a ldr r2, [r7, #4] - 80062e4: 4413 add r3, r2 - 80062e6: 791b ldrb r3, [r3, #4] - 80062e8: 60fb str r3, [r7, #12] - rind &= rbuflen - 1; - 80062ea: 687b ldr r3, [r7, #4] - 80062ec: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 - 80062f0: f003 027f and.w r2, r3, #127 ; 0x7f - 80062f4: 687b ldr r3, [r7, #4] - 80062f6: f8c3 2084 str.w r2, [r3, #132] ; 0x84 - } - return c; - 80062fa: 68fb ldr r3, [r7, #12] - } - 80062fc: 4618 mov r0, r3 - 80062fe: 3714 adds r7, #20 - 8006300: 46bd mov sp, r7 - 8006302: bd90 pop {r4, r7, pc} + /* Reset the Output Compare mode and Capture/Compare selection Bits */ + tmpccmrx &= ~TIM_CCMR2_OC4M; + 800738c: 68fa ldr r2, [r7, #12] + 800738e: 4b1e ldr r3, [pc, #120] ; (8007408 ) + 8007390: 4013 ands r3, r2 + 8007392: 60fb str r3, [r7, #12] + tmpccmrx &= ~TIM_CCMR2_CC4S; + 8007394: 68fb ldr r3, [r7, #12] + 8007396: f423 7340 bic.w r3, r3, #768 ; 0x300 + 800739a: 60fb str r3, [r7, #12] -08006304 <_ZN13STM32Hardware5flushEv>: + /* Select the Output Compare Mode */ + tmpccmrx |= (OC_Config->OCMode << 8U); + 800739c: 683b ldr r3, [r7, #0] + 800739e: 681b ldr r3, [r3, #0] + 80073a0: 021b lsls r3, r3, #8 + 80073a2: 68fa ldr r2, [r7, #12] + 80073a4: 4313 orrs r3, r2 + 80073a6: 60fb str r3, [r7, #12] - void flush(void){ - 8006304: b580 push {r7, lr} - 8006306: b084 sub sp, #16 - 8006308: af00 add r7, sp, #0 - 800630a: 6078 str r0, [r7, #4] - static bool mutex = false; + /* Reset the Output Polarity level */ + tmpccer &= ~TIM_CCER_CC4P; + 80073a8: 693b ldr r3, [r7, #16] + 80073aa: f423 5300 bic.w r3, r3, #8192 ; 0x2000 + 80073ae: 613b str r3, [r7, #16] + /* Set the Output Compare Polarity */ + tmpccer |= (OC_Config->OCPolarity << 12U); + 80073b0: 683b ldr r3, [r7, #0] + 80073b2: 689b ldr r3, [r3, #8] + 80073b4: 031b lsls r3, r3, #12 + 80073b6: 693a ldr r2, [r7, #16] + 80073b8: 4313 orrs r3, r2 + 80073ba: 613b str r3, [r7, #16] - if((huart->gState == HAL_UART_STATE_READY) && !mutex){ - 800630c: 687b ldr r3, [r7, #4] - 800630e: 681b ldr r3, [r3, #0] - 8006310: 6f5b ldr r3, [r3, #116] ; 0x74 - 8006312: 2b20 cmp r3, #32 - 8006314: d108 bne.n 8006328 <_ZN13STM32Hardware5flushEv+0x24> - 8006316: 4b27 ldr r3, [pc, #156] ; (80063b4 <_ZN13STM32Hardware5flushEv+0xb0>) - 8006318: 781b ldrb r3, [r3, #0] - 800631a: f083 0301 eor.w r3, r3, #1 - 800631e: b2db uxtb r3, r3 - 8006320: 2b00 cmp r3, #0 - 8006322: d001 beq.n 8006328 <_ZN13STM32Hardware5flushEv+0x24> - 8006324: 2301 movs r3, #1 - 8006326: e000 b.n 800632a <_ZN13STM32Hardware5flushEv+0x26> - 8006328: 2300 movs r3, #0 - 800632a: 2b00 cmp r3, #0 - 800632c: d03d beq.n 80063aa <_ZN13STM32Hardware5flushEv+0xa6> - mutex = true; - 800632e: 4b21 ldr r3, [pc, #132] ; (80063b4 <_ZN13STM32Hardware5flushEv+0xb0>) - 8006330: 2201 movs r2, #1 - 8006332: 701a strb r2, [r3, #0] + if (IS_TIM_BREAK_INSTANCE(TIMx)) + 80073bc: 687b ldr r3, [r7, #4] + 80073be: 4a13 ldr r2, [pc, #76] ; (800740c ) + 80073c0: 4293 cmp r3, r2 + 80073c2: d003 beq.n 80073cc + 80073c4: 687b ldr r3, [r7, #4] + 80073c6: 4a12 ldr r2, [pc, #72] ; (8007410 ) + 80073c8: 4293 cmp r3, r2 + 80073ca: d109 bne.n 80073e0 + { + /* Check parameters */ + assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); - if(twind != tfind){ - 8006334: 687b ldr r3, [r7, #4] - 8006336: f8d3 2188 ldr.w r2, [r3, #392] ; 0x188 - 800633a: 687b ldr r3, [r7, #4] - 800633c: f8d3 318c ldr.w r3, [r3, #396] ; 0x18c - 8006340: 429a cmp r2, r3 - 8006342: d02f beq.n 80063a4 <_ZN13STM32Hardware5flushEv+0xa0> - uint16_t len = tfind < twind ? twind - tfind : tbuflen - tfind; - 8006344: 687b ldr r3, [r7, #4] - 8006346: f8d3 218c ldr.w r2, [r3, #396] ; 0x18c - 800634a: 687b ldr r3, [r7, #4] - 800634c: f8d3 3188 ldr.w r3, [r3, #392] ; 0x188 - 8006350: 429a cmp r2, r3 - 8006352: d20a bcs.n 800636a <_ZN13STM32Hardware5flushEv+0x66> - 8006354: 687b ldr r3, [r7, #4] - 8006356: f8d3 3188 ldr.w r3, [r3, #392] ; 0x188 - 800635a: b29a uxth r2, r3 - 800635c: 687b ldr r3, [r7, #4] - 800635e: f8d3 318c ldr.w r3, [r3, #396] ; 0x18c - 8006362: b29b uxth r3, r3 - 8006364: 1ad3 subs r3, r2, r3 - 8006366: b29b uxth r3, r3 - 8006368: e006 b.n 8006378 <_ZN13STM32Hardware5flushEv+0x74> - 800636a: 687b ldr r3, [r7, #4] - 800636c: f8d3 318c ldr.w r3, [r3, #396] ; 0x18c - 8006370: b29b uxth r3, r3 - 8006372: f5c3 7380 rsb r3, r3, #256 ; 0x100 - 8006376: b29b uxth r3, r3 - 8006378: 81fb strh r3, [r7, #14] - HAL_UART_Transmit_DMA(huart, &(tbuf[tfind]), len); - 800637a: 687b ldr r3, [r7, #4] - 800637c: 6818 ldr r0, [r3, #0] - 800637e: 687b ldr r3, [r7, #4] - 8006380: f8d3 318c ldr.w r3, [r3, #396] ; 0x18c - 8006384: 3388 adds r3, #136 ; 0x88 - 8006386: 687a ldr r2, [r7, #4] - 8006388: 4413 add r3, r2 - 800638a: 89fa ldrh r2, [r7, #14] - 800638c: 4619 mov r1, r3 - 800638e: f7fd f8f7 bl 8003580 - tfind = (tfind + len) & (tbuflen - 1); - 8006392: 687b ldr r3, [r7, #4] - 8006394: f8d3 218c ldr.w r2, [r3, #396] ; 0x18c - 8006398: 89fb ldrh r3, [r7, #14] - 800639a: 4413 add r3, r2 - 800639c: b2da uxtb r2, r3 - 800639e: 687b ldr r3, [r7, #4] - 80063a0: f8c3 218c str.w r2, [r3, #396] ; 0x18c - } - mutex = false; - 80063a4: 4b03 ldr r3, [pc, #12] ; (80063b4 <_ZN13STM32Hardware5flushEv+0xb0>) - 80063a6: 2200 movs r2, #0 - 80063a8: 701a strb r2, [r3, #0] - } - } - 80063aa: bf00 nop - 80063ac: 3710 adds r7, #16 - 80063ae: 46bd mov sp, r7 - 80063b0: bd80 pop {r7, pc} - 80063b2: bf00 nop - 80063b4: 200000a0 .word 0x200000a0 + /* Reset the Output Compare IDLE State */ + tmpcr2 &= ~TIM_CR2_OIS4; + 80073cc: 697b ldr r3, [r7, #20] + 80073ce: f423 4380 bic.w r3, r3, #16384 ; 0x4000 + 80073d2: 617b str r3, [r7, #20] -080063b8 <_ZN13STM32Hardware5writeEPhi>: + /* Set the Output Idle state */ + tmpcr2 |= (OC_Config->OCIdleState << 6U); + 80073d4: 683b ldr r3, [r7, #0] + 80073d6: 695b ldr r3, [r3, #20] + 80073d8: 019b lsls r3, r3, #6 + 80073da: 697a ldr r2, [r7, #20] + 80073dc: 4313 orrs r3, r2 + 80073de: 617b str r3, [r7, #20] + } - void write(uint8_t* data, int length){ - 80063b8: b580 push {r7, lr} - 80063ba: b086 sub sp, #24 - 80063bc: af00 add r7, sp, #0 - 80063be: 60f8 str r0, [r7, #12] - 80063c0: 60b9 str r1, [r7, #8] - 80063c2: 607a str r2, [r7, #4] + /* Write to TIMx CR2 */ + TIMx->CR2 = tmpcr2; + 80073e0: 687b ldr r3, [r7, #4] + 80073e2: 697a ldr r2, [r7, #20] + 80073e4: 605a str r2, [r3, #4] + /* Write to TIMx CCMR2 */ + TIMx->CCMR2 = tmpccmrx; + 80073e6: 687b ldr r3, [r7, #4] + 80073e8: 68fa ldr r2, [r7, #12] + 80073ea: 61da str r2, [r3, #28] - int n = length; - 80063c4: 687b ldr r3, [r7, #4] - 80063c6: 617b str r3, [r7, #20] - n = n <= tbuflen ? n : tbuflen; - 80063c8: 697b ldr r3, [r7, #20] - 80063ca: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 80063ce: bfa8 it ge - 80063d0: f44f 7380 movge.w r3, #256 ; 0x100 - 80063d4: 617b str r3, [r7, #20] + /* Set the Capture Compare Register value */ + TIMx->CCR4 = OC_Config->Pulse; + 80073ec: 683b ldr r3, [r7, #0] + 80073ee: 685a ldr r2, [r3, #4] + 80073f0: 687b ldr r3, [r7, #4] + 80073f2: 641a str r2, [r3, #64] ; 0x40 - int n_tail = n <= tbuflen - twind ? n : tbuflen - twind; - 80063d6: 68fb ldr r3, [r7, #12] - 80063d8: f8d3 3188 ldr.w r3, [r3, #392] ; 0x188 - 80063dc: f5c3 7280 rsb r2, r3, #256 ; 0x100 - 80063e0: 697b ldr r3, [r7, #20] - 80063e2: 4293 cmp r3, r2 - 80063e4: bf28 it cs - 80063e6: 4613 movcs r3, r2 - 80063e8: 613b str r3, [r7, #16] - memcpy(&(tbuf[twind]), data, n_tail); - 80063ea: 68fb ldr r3, [r7, #12] - 80063ec: f8d3 3188 ldr.w r3, [r3, #392] ; 0x188 - 80063f0: 3388 adds r3, #136 ; 0x88 - 80063f2: 68fa ldr r2, [r7, #12] - 80063f4: 4413 add r3, r2 - 80063f6: 693a ldr r2, [r7, #16] - 80063f8: 68b9 ldr r1, [r7, #8] - 80063fa: 4618 mov r0, r3 - 80063fc: f003 fd0c bl 8009e18 - twind = (twind + n) & (tbuflen - 1); - 8006400: 68fb ldr r3, [r7, #12] - 8006402: f8d3 2188 ldr.w r2, [r3, #392] ; 0x188 - 8006406: 697b ldr r3, [r7, #20] - 8006408: 4413 add r3, r2 - 800640a: b2da uxtb r2, r3 - 800640c: 68fb ldr r3, [r7, #12] - 800640e: f8c3 2188 str.w r2, [r3, #392] ; 0x188 + /* Write to TIMx CCER */ + TIMx->CCER = tmpccer; + 80073f4: 687b ldr r3, [r7, #4] + 80073f6: 693a ldr r2, [r7, #16] + 80073f8: 621a str r2, [r3, #32] +} + 80073fa: bf00 nop + 80073fc: 371c adds r7, #28 + 80073fe: 46bd mov sp, r7 + 8007400: f85d 7b04 ldr.w r7, [sp], #4 + 8007404: 4770 bx lr + 8007406: bf00 nop + 8007408: feff8fff .word 0xfeff8fff + 800740c: 40010000 .word 0x40010000 + 8007410: 40010400 .word 0x40010400 + +08007414 : + * @param OC_Config The ouput configuration structure + * @retval None + */ +static void TIM_OC5_SetConfig(TIM_TypeDef *TIMx, + TIM_OC_InitTypeDef *OC_Config) +{ + 8007414: b480 push {r7} + 8007416: b087 sub sp, #28 + 8007418: af00 add r7, sp, #0 + 800741a: 6078 str r0, [r7, #4] + 800741c: 6039 str r1, [r7, #0] + uint32_t tmpccmrx; + uint32_t tmpccer; + uint32_t tmpcr2; - if(n != n_tail){ - 8006412: 697a ldr r2, [r7, #20] - 8006414: 693b ldr r3, [r7, #16] - 8006416: 429a cmp r2, r3 - 8006418: d00b beq.n 8006432 <_ZN13STM32Hardware5writeEPhi+0x7a> - memcpy(tbuf, &(data[n_tail]), n - n_tail); - 800641a: 68fb ldr r3, [r7, #12] - 800641c: f103 0088 add.w r0, r3, #136 ; 0x88 - 8006420: 693b ldr r3, [r7, #16] - 8006422: 68ba ldr r2, [r7, #8] - 8006424: 18d1 adds r1, r2, r3 - 8006426: 697a ldr r2, [r7, #20] - 8006428: 693b ldr r3, [r7, #16] - 800642a: 1ad3 subs r3, r2, r3 - 800642c: 461a mov r2, r3 - 800642e: f003 fcf3 bl 8009e18 - } + /* Disable the output: Reset the CCxE Bit */ + TIMx->CCER &= ~TIM_CCER_CC5E; + 800741e: 687b ldr r3, [r7, #4] + 8007420: 6a1b ldr r3, [r3, #32] + 8007422: f423 3280 bic.w r2, r3, #65536 ; 0x10000 + 8007426: 687b ldr r3, [r7, #4] + 8007428: 621a str r2, [r3, #32] - flush(); - 8006432: 68f8 ldr r0, [r7, #12] - 8006434: f7ff ff66 bl 8006304 <_ZN13STM32Hardware5flushEv> - } - 8006438: bf00 nop - 800643a: 3718 adds r7, #24 - 800643c: 46bd mov sp, r7 - 800643e: bd80 pop {r7, pc} + /* Get the TIMx CCER register value */ + tmpccer = TIMx->CCER; + 800742a: 687b ldr r3, [r7, #4] + 800742c: 6a1b ldr r3, [r3, #32] + 800742e: 613b str r3, [r7, #16] + /* Get the TIMx CR2 register value */ + tmpcr2 = TIMx->CR2; + 8007430: 687b ldr r3, [r7, #4] + 8007432: 685b ldr r3, [r3, #4] + 8007434: 617b str r3, [r7, #20] + /* Get the TIMx CCMR1 register value */ + tmpccmrx = TIMx->CCMR3; + 8007436: 687b ldr r3, [r7, #4] + 8007438: 6d5b ldr r3, [r3, #84] ; 0x54 + 800743a: 60fb str r3, [r7, #12] -08006440 <_ZN13STM32Hardware4timeEv>: + /* Reset the Output Compare Mode Bits */ + tmpccmrx &= ~(TIM_CCMR3_OC5M); + 800743c: 68fa ldr r2, [r7, #12] + 800743e: 4b1b ldr r3, [pc, #108] ; (80074ac ) + 8007440: 4013 ands r3, r2 + 8007442: 60fb str r3, [r7, #12] + /* Select the Output Compare Mode */ + tmpccmrx |= OC_Config->OCMode; + 8007444: 683b ldr r3, [r7, #0] + 8007446: 681b ldr r3, [r3, #0] + 8007448: 68fa ldr r2, [r7, #12] + 800744a: 4313 orrs r3, r2 + 800744c: 60fb str r3, [r7, #12] - unsigned long time(){ return HAL_GetTick(); } - 8006440: b580 push {r7, lr} - 8006442: b082 sub sp, #8 - 8006444: af00 add r7, sp, #0 - 8006446: 6078 str r0, [r7, #4] - 8006448: f7fa f8d0 bl 80005ec - 800644c: 4603 mov r3, r0 - 800644e: 4618 mov r0, r3 - 8006450: 3708 adds r7, #8 - 8006452: 46bd mov sp, r7 - 8006454: bd80 pop {r7, pc} - ... + /* Reset the Output Polarity level */ + tmpccer &= ~TIM_CCER_CC5P; + 800744e: 693b ldr r3, [r7, #16] + 8007450: f423 3300 bic.w r3, r3, #131072 ; 0x20000 + 8007454: 613b str r3, [r7, #16] + /* Set the Output Compare Polarity */ + tmpccer |= (OC_Config->OCPolarity << 16U); + 8007456: 683b ldr r3, [r7, #0] + 8007458: 689b ldr r3, [r3, #8] + 800745a: 041b lsls r3, r3, #16 + 800745c: 693a ldr r2, [r7, #16] + 800745e: 4313 orrs r3, r2 + 8007460: 613b str r3, [r7, #16] -08006458 <_ZN8std_msgs6StringC1Ev>: + if (IS_TIM_BREAK_INSTANCE(TIMx)) + 8007462: 687b ldr r3, [r7, #4] + 8007464: 4a12 ldr r2, [pc, #72] ; (80074b0 ) + 8007466: 4293 cmp r3, r2 + 8007468: d003 beq.n 8007472 + 800746a: 687b ldr r3, [r7, #4] + 800746c: 4a11 ldr r2, [pc, #68] ; (80074b4 ) + 800746e: 4293 cmp r3, r2 + 8007470: d109 bne.n 8007486 { - public: - typedef const char* _data_type; - _data_type data; + /* Reset the Output Compare IDLE State */ + tmpcr2 &= ~TIM_CR2_OIS5; + 8007472: 697b ldr r3, [r7, #20] + 8007474: f423 3380 bic.w r3, r3, #65536 ; 0x10000 + 8007478: 617b str r3, [r7, #20] + /* Set the Output Idle state */ + tmpcr2 |= (OC_Config->OCIdleState << 8U); + 800747a: 683b ldr r3, [r7, #0] + 800747c: 695b ldr r3, [r3, #20] + 800747e: 021b lsls r3, r3, #8 + 8007480: 697a ldr r2, [r7, #20] + 8007482: 4313 orrs r3, r2 + 8007484: 617b str r3, [r7, #20] + } + /* Write to TIMx CR2 */ + TIMx->CR2 = tmpcr2; + 8007486: 687b ldr r3, [r7, #4] + 8007488: 697a ldr r2, [r7, #20] + 800748a: 605a str r2, [r3, #4] - String(): - 8006458: b580 push {r7, lr} - 800645a: b082 sub sp, #8 - 800645c: af00 add r7, sp, #0 - 800645e: 6078 str r0, [r7, #4] - data("") - 8006460: 687b ldr r3, [r7, #4] - 8006462: 4618 mov r0, r3 - 8006464: f7fe f94c bl 8004700 <_ZN3ros3MsgC1Ev> - 8006468: 4a05 ldr r2, [pc, #20] ; (8006480 <_ZN8std_msgs6StringC1Ev+0x28>) - 800646a: 687b ldr r3, [r7, #4] - 800646c: 601a str r2, [r3, #0] - 800646e: 687b ldr r3, [r7, #4] - 8006470: 4a04 ldr r2, [pc, #16] ; (8006484 <_ZN8std_msgs6StringC1Ev+0x2c>) - 8006472: 605a str r2, [r3, #4] - { - } - 8006474: 687b ldr r3, [r7, #4] - 8006476: 4618 mov r0, r3 - 8006478: 3708 adds r7, #8 - 800647a: 46bd mov sp, r7 - 800647c: bd80 pop {r7, pc} - 800647e: bf00 nop - 8006480: 0800a454 .word 0x0800a454 - 8006484: 0800a0c0 .word 0x0800a0c0 + /* Write to TIMx CCMR3 */ + TIMx->CCMR3 = tmpccmrx; + 800748c: 687b ldr r3, [r7, #4] + 800748e: 68fa ldr r2, [r7, #12] + 8007490: 655a str r2, [r3, #84] ; 0x54 -08006488 <_ZNK8std_msgs6String9serializeEPh>: + /* Set the Capture Compare Register value */ + TIMx->CCR5 = OC_Config->Pulse; + 8007492: 683b ldr r3, [r7, #0] + 8007494: 685a ldr r2, [r3, #4] + 8007496: 687b ldr r3, [r7, #4] + 8007498: 659a str r2, [r3, #88] ; 0x58 - virtual int serialize(unsigned char *outbuffer) const - 8006488: b580 push {r7, lr} - 800648a: b084 sub sp, #16 - 800648c: af00 add r7, sp, #0 - 800648e: 6078 str r0, [r7, #4] - 8006490: 6039 str r1, [r7, #0] - { - int offset = 0; - 8006492: 2300 movs r3, #0 - 8006494: 60fb str r3, [r7, #12] - uint32_t length_data = strlen(this->data); - 8006496: 687b ldr r3, [r7, #4] - 8006498: 685b ldr r3, [r3, #4] - 800649a: 4618 mov r0, r3 - 800649c: f7f9 fecc bl 8000238 - 80064a0: 60b8 str r0, [r7, #8] - varToArr(outbuffer + offset, length_data); - 80064a2: 68fb ldr r3, [r7, #12] - 80064a4: 683a ldr r2, [r7, #0] - 80064a6: 4413 add r3, r2 - 80064a8: 68b9 ldr r1, [r7, #8] - 80064aa: 4618 mov r0, r3 - 80064ac: f000 fdcf bl 800704e <_ZN3ros3Msg8varToArrIPhmEEvT_T0_> - offset += 4; - 80064b0: 68fb ldr r3, [r7, #12] - 80064b2: 3304 adds r3, #4 - 80064b4: 60fb str r3, [r7, #12] - memcpy(outbuffer + offset, this->data, length_data); - 80064b6: 68fb ldr r3, [r7, #12] - 80064b8: 683a ldr r2, [r7, #0] - 80064ba: 18d0 adds r0, r2, r3 - 80064bc: 687b ldr r3, [r7, #4] - 80064be: 685b ldr r3, [r3, #4] - 80064c0: 68ba ldr r2, [r7, #8] - 80064c2: 4619 mov r1, r3 - 80064c4: f003 fca8 bl 8009e18 - offset += length_data; - 80064c8: 68fa ldr r2, [r7, #12] - 80064ca: 68bb ldr r3, [r7, #8] - 80064cc: 4413 add r3, r2 - 80064ce: 60fb str r3, [r7, #12] - return offset; - 80064d0: 68fb ldr r3, [r7, #12] - } - 80064d2: 4618 mov r0, r3 - 80064d4: 3710 adds r7, #16 - 80064d6: 46bd mov sp, r7 - 80064d8: bd80 pop {r7, pc} + /* Write to TIMx CCER */ + TIMx->CCER = tmpccer; + 800749a: 687b ldr r3, [r7, #4] + 800749c: 693a ldr r2, [r7, #16] + 800749e: 621a str r2, [r3, #32] +} + 80074a0: bf00 nop + 80074a2: 371c adds r7, #28 + 80074a4: 46bd mov sp, r7 + 80074a6: f85d 7b04 ldr.w r7, [sp], #4 + 80074aa: 4770 bx lr + 80074ac: fffeff8f .word 0xfffeff8f + 80074b0: 40010000 .word 0x40010000 + 80074b4: 40010400 .word 0x40010400 + +080074b8 : + * @param OC_Config The ouput configuration structure + * @retval None + */ +static void TIM_OC6_SetConfig(TIM_TypeDef *TIMx, + TIM_OC_InitTypeDef *OC_Config) +{ + 80074b8: b480 push {r7} + 80074ba: b087 sub sp, #28 + 80074bc: af00 add r7, sp, #0 + 80074be: 6078 str r0, [r7, #4] + 80074c0: 6039 str r1, [r7, #0] + uint32_t tmpccmrx; + uint32_t tmpccer; + uint32_t tmpcr2; -080064da <_ZN8std_msgs6String11deserializeEPh>: + /* Disable the output: Reset the CCxE Bit */ + TIMx->CCER &= ~TIM_CCER_CC6E; + 80074c2: 687b ldr r3, [r7, #4] + 80074c4: 6a1b ldr r3, [r3, #32] + 80074c6: f423 1280 bic.w r2, r3, #1048576 ; 0x100000 + 80074ca: 687b ldr r3, [r7, #4] + 80074cc: 621a str r2, [r3, #32] - virtual int deserialize(unsigned char *inbuffer) - 80064da: b580 push {r7, lr} - 80064dc: b086 sub sp, #24 - 80064de: af00 add r7, sp, #0 - 80064e0: 6078 str r0, [r7, #4] - 80064e2: 6039 str r1, [r7, #0] - { - int offset = 0; - 80064e4: 2300 movs r3, #0 - 80064e6: 613b str r3, [r7, #16] - uint32_t length_data; - arrToVar(length_data, (inbuffer + offset)); - 80064e8: 693b ldr r3, [r7, #16] - 80064ea: 683a ldr r2, [r7, #0] - 80064ec: 441a add r2, r3 - 80064ee: f107 030c add.w r3, r7, #12 - 80064f2: 4611 mov r1, r2 - 80064f4: 4618 mov r0, r3 - 80064f6: f000 fdc8 bl 800708a <_ZN3ros3Msg8arrToVarImPhEEvRT_T0_> - offset += 4; - 80064fa: 693b ldr r3, [r7, #16] - 80064fc: 3304 adds r3, #4 - 80064fe: 613b str r3, [r7, #16] - for(unsigned int k= offset; k< offset+length_data; ++k){ - 8006500: 693b ldr r3, [r7, #16] - 8006502: 617b str r3, [r7, #20] - 8006504: 693a ldr r2, [r7, #16] - 8006506: 68fb ldr r3, [r7, #12] - 8006508: 4413 add r3, r2 - 800650a: 697a ldr r2, [r7, #20] - 800650c: 429a cmp r2, r3 - 800650e: d20c bcs.n 800652a <_ZN8std_msgs6String11deserializeEPh+0x50> - inbuffer[k-1]=inbuffer[k]; - 8006510: 683a ldr r2, [r7, #0] - 8006512: 697b ldr r3, [r7, #20] - 8006514: 441a add r2, r3 - 8006516: 697b ldr r3, [r7, #20] - 8006518: 3b01 subs r3, #1 - 800651a: 6839 ldr r1, [r7, #0] - 800651c: 440b add r3, r1 - 800651e: 7812 ldrb r2, [r2, #0] - 8006520: 701a strb r2, [r3, #0] - for(unsigned int k= offset; k< offset+length_data; ++k){ - 8006522: 697b ldr r3, [r7, #20] - 8006524: 3301 adds r3, #1 - 8006526: 617b str r3, [r7, #20] - 8006528: e7ec b.n 8006504 <_ZN8std_msgs6String11deserializeEPh+0x2a> - } - inbuffer[offset+length_data-1]=0; - 800652a: 693a ldr r2, [r7, #16] - 800652c: 68fb ldr r3, [r7, #12] - 800652e: 4413 add r3, r2 - 8006530: 3b01 subs r3, #1 - 8006532: 683a ldr r2, [r7, #0] - 8006534: 4413 add r3, r2 - 8006536: 2200 movs r2, #0 - 8006538: 701a strb r2, [r3, #0] - this->data = (char *)(inbuffer + offset-1); - 800653a: 693b ldr r3, [r7, #16] - 800653c: 3b01 subs r3, #1 - 800653e: 683a ldr r2, [r7, #0] - 8006540: 441a add r2, r3 - 8006542: 687b ldr r3, [r7, #4] - 8006544: 605a str r2, [r3, #4] - offset += length_data; - 8006546: 693a ldr r2, [r7, #16] - 8006548: 68fb ldr r3, [r7, #12] - 800654a: 4413 add r3, r2 - 800654c: 613b str r3, [r7, #16] - return offset; - 800654e: 693b ldr r3, [r7, #16] - } - 8006550: 4618 mov r0, r3 - 8006552: 3718 adds r7, #24 - 8006554: 46bd mov sp, r7 - 8006556: bd80 pop {r7, pc} + /* Get the TIMx CCER register value */ + tmpccer = TIMx->CCER; + 80074ce: 687b ldr r3, [r7, #4] + 80074d0: 6a1b ldr r3, [r3, #32] + 80074d2: 613b str r3, [r7, #16] + /* Get the TIMx CR2 register value */ + tmpcr2 = TIMx->CR2; + 80074d4: 687b ldr r3, [r7, #4] + 80074d6: 685b ldr r3, [r3, #4] + 80074d8: 617b str r3, [r7, #20] + /* Get the TIMx CCMR1 register value */ + tmpccmrx = TIMx->CCMR3; + 80074da: 687b ldr r3, [r7, #4] + 80074dc: 6d5b ldr r3, [r3, #84] ; 0x54 + 80074de: 60fb str r3, [r7, #12] + + /* Reset the Output Compare Mode Bits */ + tmpccmrx &= ~(TIM_CCMR3_OC6M); + 80074e0: 68fa ldr r2, [r7, #12] + 80074e2: 4b1c ldr r3, [pc, #112] ; (8007554 ) + 80074e4: 4013 ands r3, r2 + 80074e6: 60fb str r3, [r7, #12] + /* Select the Output Compare Mode */ + tmpccmrx |= (OC_Config->OCMode << 8U); + 80074e8: 683b ldr r3, [r7, #0] + 80074ea: 681b ldr r3, [r3, #0] + 80074ec: 021b lsls r3, r3, #8 + 80074ee: 68fa ldr r2, [r7, #12] + 80074f0: 4313 orrs r3, r2 + 80074f2: 60fb str r3, [r7, #12] + + /* Reset the Output Polarity level */ + tmpccer &= (uint32_t)~TIM_CCER_CC6P; + 80074f4: 693b ldr r3, [r7, #16] + 80074f6: f423 1300 bic.w r3, r3, #2097152 ; 0x200000 + 80074fa: 613b str r3, [r7, #16] + /* Set the Output Compare Polarity */ + tmpccer |= (OC_Config->OCPolarity << 20U); + 80074fc: 683b ldr r3, [r7, #0] + 80074fe: 689b ldr r3, [r3, #8] + 8007500: 051b lsls r3, r3, #20 + 8007502: 693a ldr r2, [r7, #16] + 8007504: 4313 orrs r3, r2 + 8007506: 613b str r3, [r7, #16] + + if (IS_TIM_BREAK_INSTANCE(TIMx)) + 8007508: 687b ldr r3, [r7, #4] + 800750a: 4a13 ldr r2, [pc, #76] ; (8007558 ) + 800750c: 4293 cmp r3, r2 + 800750e: d003 beq.n 8007518 + 8007510: 687b ldr r3, [r7, #4] + 8007512: 4a12 ldr r2, [pc, #72] ; (800755c ) + 8007514: 4293 cmp r3, r2 + 8007516: d109 bne.n 800752c + { + /* Reset the Output Compare IDLE State */ + tmpcr2 &= ~TIM_CR2_OIS6; + 8007518: 697b ldr r3, [r7, #20] + 800751a: f423 2380 bic.w r3, r3, #262144 ; 0x40000 + 800751e: 617b str r3, [r7, #20] + /* Set the Output Idle state */ + tmpcr2 |= (OC_Config->OCIdleState << 10U); + 8007520: 683b ldr r3, [r7, #0] + 8007522: 695b ldr r3, [r3, #20] + 8007524: 029b lsls r3, r3, #10 + 8007526: 697a ldr r2, [r7, #20] + 8007528: 4313 orrs r3, r2 + 800752a: 617b str r3, [r7, #20] + } -08006558 <_ZN8std_msgs6String7getTypeEv>: + /* Write to TIMx CR2 */ + TIMx->CR2 = tmpcr2; + 800752c: 687b ldr r3, [r7, #4] + 800752e: 697a ldr r2, [r7, #20] + 8007530: 605a str r2, [r3, #4] - const char * getType(){ return "std_msgs/String"; }; - 8006558: b480 push {r7} - 800655a: b083 sub sp, #12 - 800655c: af00 add r7, sp, #0 - 800655e: 6078 str r0, [r7, #4] - 8006560: 4b03 ldr r3, [pc, #12] ; (8006570 <_ZN8std_msgs6String7getTypeEv+0x18>) - 8006562: 4618 mov r0, r3 - 8006564: 370c adds r7, #12 - 8006566: 46bd mov sp, r7 - 8006568: f85d 7b04 ldr.w r7, [sp], #4 - 800656c: 4770 bx lr - 800656e: bf00 nop - 8006570: 0800a390 .word 0x0800a390 - -08006574 <_ZN8std_msgs6String6getMD5Ev>: - const char * getMD5(){ return "992ce8a1687cec8c8bd883ec73ca41d1"; }; - 8006574: b480 push {r7} - 8006576: b083 sub sp, #12 - 8006578: af00 add r7, sp, #0 - 800657a: 6078 str r0, [r7, #4] - 800657c: 4b03 ldr r3, [pc, #12] ; (800658c <_ZN8std_msgs6String6getMD5Ev+0x18>) - 800657e: 4618 mov r0, r3 - 8006580: 370c adds r7, #12 - 8006582: 46bd mov sp, r7 - 8006584: f85d 7b04 ldr.w r7, [sp], #4 - 8006588: 4770 bx lr - 800658a: bf00 nop - 800658c: 0800a3a0 .word 0x0800a3a0 - -08006590
: + /* Write to TIMx CCMR3 */ + TIMx->CCMR3 = tmpccmrx; + 8007532: 687b ldr r3, [r7, #4] + 8007534: 68fa ldr r2, [r7, #12] + 8007536: 655a str r2, [r3, #84] ; 0x54 -/** - * @brief The application entry point. - * @retval int - */ -int main(void) { - 8006590: b580 push {r7, lr} - 8006592: af00 add r7, sp, #0 - /* USER CODE END 1 */ - - /* MCU Configuration--------------------------------------------------------*/ - - /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ - HAL_Init(); - 8006594: f7f9 ffd8 bl 8000548 - - /* USER CODE BEGIN Init */ - /* USER CODE END Init */ - - /* Configure the system clock */ - SystemClock_Config(); - 8006598: f000 f838 bl 800660c <_Z18SystemClock_Configv> - /* USER CODE BEGIN SysInit */ - - /* USER CODE END SysInit */ - - /* Initialize all configured peripherals */ - MX_GPIO_Init(); - 800659c: f000 fafe bl 8006b9c <_ZL12MX_GPIO_Initv> - MX_DMA_Init(); - 80065a0: f000 faba bl 8006b18 <_ZL11MX_DMA_Initv> - MX_TIM2_Init(); - 80065a4: f000 f8be bl 8006724 <_ZL12MX_TIM2_Initv> - MX_TIM3_Init(); - 80065a8: f000 f91a bl 80067e0 <_ZL12MX_TIM3_Initv> - MX_TIM4_Init(); - 80065ac: f000 f976 bl 800689c <_ZL12MX_TIM4_Initv> - MX_TIM5_Init(); - 80065b0: f000 f9ec bl 800698c <_ZL12MX_TIM5_Initv> - MX_USART3_UART_Init(); - 80065b4: f000 fa48 bl 8006a48 <_ZL19MX_USART3_UART_Initv> - MX_USART6_UART_Init(); - 80065b8: f000 fa7a bl 8006ab0 <_ZL19MX_USART6_UART_Initv> - /* USER CODE BEGIN 2 */ - - nh.initNode(); - 80065bc: 480b ldr r0, [pc, #44] ; (80065ec ) - 80065be: f000 fe19 bl 80071f4 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8initNodeEv> - nh.advertise(chatter); - 80065c2: 490b ldr r1, [pc, #44] ; (80065f0 ) - 80065c4: 4809 ldr r0, [pc, #36] ; (80065ec ) - 80065c6: f000 fe32 bl 800722e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE9advertiseERNS_9PublisherE> - nh.advertise(odom_pub); - 80065ca: 490a ldr r1, [pc, #40] ; (80065f4 ) - 80065cc: 4807 ldr r0, [pc, #28] ; (80065ec ) - 80065ce: f000 fe2e bl 800722e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE9advertiseERNS_9PublisherE> - str_msg.data = hello; - 80065d2: 4b09 ldr r3, [pc, #36] ; (80065f8 ) - 80065d4: 4a09 ldr r2, [pc, #36] ; (80065fc ) - 80065d6: 605a str r2, [r3, #4] - - left_encoder.Setup(); - 80065d8: 4809 ldr r0, [pc, #36] ; (8006600 ) - 80065da: f7fd ff23 bl 8004424 <_ZN7Encoder5SetupEv> - right_encoder.Setup(); - 80065de: 4809 ldr r0, [pc, #36] ; (8006604 ) - 80065e0: f7fd ff20 bl 8004424 <_ZN7Encoder5SetupEv> - - HAL_TIM_Base_Start_IT(&htim3); - 80065e4: 4808 ldr r0, [pc, #32] ; (8006608 ) - 80065e6: f7fb ff0d bl 8002404 - - /* USER CODE END 2 */ - - /* Infinite loop */ - /* USER CODE BEGIN WHILE */ - while (1) { - 80065ea: e7fe b.n 80065ea - 80065ec: 2000062c .word 0x2000062c - 80065f0: 20000e80 .word 0x20000e80 - 80065f4: 20000e94 .word 0x20000e94 - 80065f8: 20000ce8 .word 0x20000ce8 - 80065fc: 20000008 .word 0x20000008 - 8006600: 20000424 .word 0x20000424 - 8006604: 20000440 .word 0x20000440 - 8006608: 200000e4 .word 0x200000e4 - -0800660c <_Z18SystemClock_Configv>: + /* Set the Capture Compare Register value */ + TIMx->CCR6 = OC_Config->Pulse; + 8007538: 683b ldr r3, [r7, #0] + 800753a: 685a ldr r2, [r3, #4] + 800753c: 687b ldr r3, [r7, #4] + 800753e: 65da str r2, [r3, #92] ; 0x5c -/** - * @brief System Clock Configuration - * @retval None - */ -void SystemClock_Config(void) { - 800660c: b580 push {r7, lr} - 800660e: b0b8 sub sp, #224 ; 0xe0 - 8006610: af00 add r7, sp, #0 - RCC_OscInitTypeDef RCC_OscInitStruct = { 0 }; - 8006612: f107 03ac add.w r3, r7, #172 ; 0xac - 8006616: 2234 movs r2, #52 ; 0x34 - 8006618: 2100 movs r1, #0 - 800661a: 4618 mov r0, r3 - 800661c: f003 fc07 bl 8009e2e - RCC_ClkInitTypeDef RCC_ClkInitStruct = { 0 }; - 8006620: f107 0398 add.w r3, r7, #152 ; 0x98 - 8006624: 2200 movs r2, #0 - 8006626: 601a str r2, [r3, #0] - 8006628: 605a str r2, [r3, #4] - 800662a: 609a str r2, [r3, #8] - 800662c: 60da str r2, [r3, #12] - 800662e: 611a str r2, [r3, #16] - RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = { 0 }; - 8006630: f107 0308 add.w r3, r7, #8 - 8006634: 2290 movs r2, #144 ; 0x90 - 8006636: 2100 movs r1, #0 - 8006638: 4618 mov r0, r3 - 800663a: f003 fbf8 bl 8009e2e - - /** Configure the main internal regulator output voltage - */ - __HAL_RCC_PWR_CLK_ENABLE(); - 800663e: 4b37 ldr r3, [pc, #220] ; (800671c <_Z18SystemClock_Configv+0x110>) - 8006640: 6c1b ldr r3, [r3, #64] ; 0x40 - 8006642: 4a36 ldr r2, [pc, #216] ; (800671c <_Z18SystemClock_Configv+0x110>) - 8006644: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 - 8006648: 6413 str r3, [r2, #64] ; 0x40 - 800664a: 4b34 ldr r3, [pc, #208] ; (800671c <_Z18SystemClock_Configv+0x110>) - 800664c: 6c1b ldr r3, [r3, #64] ; 0x40 - 800664e: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 - 8006652: 607b str r3, [r7, #4] - 8006654: 687b ldr r3, [r7, #4] - __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE3); - 8006656: 4b32 ldr r3, [pc, #200] ; (8006720 <_Z18SystemClock_Configv+0x114>) - 8006658: 681b ldr r3, [r3, #0] - 800665a: f423 4340 bic.w r3, r3, #49152 ; 0xc000 - 800665e: 4a30 ldr r2, [pc, #192] ; (8006720 <_Z18SystemClock_Configv+0x114>) - 8006660: f443 4380 orr.w r3, r3, #16384 ; 0x4000 - 8006664: 6013 str r3, [r2, #0] - 8006666: 4b2e ldr r3, [pc, #184] ; (8006720 <_Z18SystemClock_Configv+0x114>) - 8006668: 681b ldr r3, [r3, #0] - 800666a: f403 4340 and.w r3, r3, #49152 ; 0xc000 - 800666e: 603b str r3, [r7, #0] - 8006670: 683b ldr r3, [r7, #0] - /** Initializes the CPU, AHB and APB busses clocks - */ - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; - 8006672: 2302 movs r3, #2 - 8006674: f8c7 30ac str.w r3, [r7, #172] ; 0xac - RCC_OscInitStruct.HSIState = RCC_HSI_ON; - 8006678: 2301 movs r3, #1 - 800667a: f8c7 30b8 str.w r3, [r7, #184] ; 0xb8 - RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; - 800667e: 2310 movs r3, #16 - 8006680: f8c7 30bc str.w r3, [r7, #188] ; 0xbc - RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; - 8006684: 2300 movs r3, #0 - 8006686: f8c7 30c4 str.w r3, [r7, #196] ; 0xc4 - if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { - 800668a: f107 03ac add.w r3, r7, #172 ; 0xac - 800668e: 4618 mov r0, r3 - 8006690: f7fa fe26 bl 80012e0 - 8006694: 4603 mov r3, r0 - 8006696: 2b00 cmp r3, #0 - 8006698: bf14 ite ne - 800669a: 2301 movne r3, #1 - 800669c: 2300 moveq r3, #0 - 800669e: b2db uxtb r3, r3 - 80066a0: 2b00 cmp r3, #0 - 80066a2: d001 beq.n 80066a8 <_Z18SystemClock_Configv+0x9c> - Error_Handler(); - 80066a4: f000 fccc bl 8007040 - } - /** Initializes the CPU, AHB and APB busses clocks - */ - RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK - 80066a8: 230f movs r3, #15 - 80066aa: f8c7 3098 str.w r3, [r7, #152] ; 0x98 - | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; - RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI; - 80066ae: 2300 movs r3, #0 - 80066b0: f8c7 309c str.w r3, [r7, #156] ; 0x9c - RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - 80066b4: 2300 movs r3, #0 - 80066b6: f8c7 30a0 str.w r3, [r7, #160] ; 0xa0 - RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV8; - 80066ba: f44f 53c0 mov.w r3, #6144 ; 0x1800 - 80066be: f8c7 30a4 str.w r3, [r7, #164] ; 0xa4 - RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; - 80066c2: 2300 movs r3, #0 - 80066c4: f8c7 30a8 str.w r3, [r7, #168] ; 0xa8 - - if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) { - 80066c8: f107 0398 add.w r3, r7, #152 ; 0x98 - 80066cc: 2100 movs r1, #0 - 80066ce: 4618 mov r0, r3 - 80066d0: f7fb f878 bl 80017c4 - 80066d4: 4603 mov r3, r0 - 80066d6: 2b00 cmp r3, #0 - 80066d8: bf14 ite ne - 80066da: 2301 movne r3, #1 - 80066dc: 2300 moveq r3, #0 - 80066de: b2db uxtb r3, r3 - 80066e0: 2b00 cmp r3, #0 - 80066e2: d001 beq.n 80066e8 <_Z18SystemClock_Configv+0xdc> - Error_Handler(); - 80066e4: f000 fcac bl 8007040 - } - PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART3 - 80066e8: f44f 6310 mov.w r3, #2304 ; 0x900 - 80066ec: 60bb str r3, [r7, #8] - | RCC_PERIPHCLK_USART6; - PeriphClkInitStruct.Usart3ClockSelection = RCC_USART3CLKSOURCE_PCLK1; - 80066ee: 2300 movs r3, #0 - 80066f0: 657b str r3, [r7, #84] ; 0x54 - PeriphClkInitStruct.Usart6ClockSelection = RCC_USART6CLKSOURCE_PCLK2; - 80066f2: 2300 movs r3, #0 - 80066f4: 663b str r3, [r7, #96] ; 0x60 - if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) { - 80066f6: f107 0308 add.w r3, r7, #8 - 80066fa: 4618 mov r0, r3 - 80066fc: f7fb fa30 bl 8001b60 - 8006700: 4603 mov r3, r0 - 8006702: 2b00 cmp r3, #0 - 8006704: bf14 ite ne - 8006706: 2301 movne r3, #1 - 8006708: 2300 moveq r3, #0 - 800670a: b2db uxtb r3, r3 - 800670c: 2b00 cmp r3, #0 - 800670e: d001 beq.n 8006714 <_Z18SystemClock_Configv+0x108> - Error_Handler(); - 8006710: f000 fc96 bl 8007040 - } + /* Write to TIMx CCER */ + TIMx->CCER = tmpccer; + 8007540: 687b ldr r3, [r7, #4] + 8007542: 693a ldr r2, [r7, #16] + 8007544: 621a str r2, [r3, #32] } - 8006714: bf00 nop - 8006716: 37e0 adds r7, #224 ; 0xe0 - 8006718: 46bd mov sp, r7 - 800671a: bd80 pop {r7, pc} - 800671c: 40023800 .word 0x40023800 - 8006720: 40007000 .word 0x40007000 - -08006724 <_ZL12MX_TIM2_Initv>: -/** - * @brief TIM2 Initialization Function - * @param None - * @retval None - */ -static void MX_TIM2_Init(void) { - 8006724: b580 push {r7, lr} - 8006726: b08c sub sp, #48 ; 0x30 - 8006728: af00 add r7, sp, #0 - - /* USER CODE BEGIN TIM2_Init 0 */ - - /* USER CODE END TIM2_Init 0 */ - - TIM_Encoder_InitTypeDef sConfig = { 0 }; - 800672a: f107 030c add.w r3, r7, #12 - 800672e: 2224 movs r2, #36 ; 0x24 - 8006730: 2100 movs r1, #0 - 8006732: 4618 mov r0, r3 - 8006734: f003 fb7b bl 8009e2e - TIM_MasterConfigTypeDef sMasterConfig = { 0 }; - 8006738: 463b mov r3, r7 - 800673a: 2200 movs r2, #0 - 800673c: 601a str r2, [r3, #0] - 800673e: 605a str r2, [r3, #4] - 8006740: 609a str r2, [r3, #8] - - /* USER CODE BEGIN TIM2_Init 1 */ - - /* USER CODE END TIM2_Init 1 */ - htim2.Instance = TIM2; - 8006742: 4b26 ldr r3, [pc, #152] ; (80067dc <_ZL12MX_TIM2_Initv+0xb8>) - 8006744: f04f 4280 mov.w r2, #1073741824 ; 0x40000000 - 8006748: 601a str r2, [r3, #0] - htim2.Init.Prescaler = 0; - 800674a: 4b24 ldr r3, [pc, #144] ; (80067dc <_ZL12MX_TIM2_Initv+0xb8>) - 800674c: 2200 movs r2, #0 - 800674e: 605a str r2, [r3, #4] - htim2.Init.CounterMode = TIM_COUNTERMODE_UP; - 8006750: 4b22 ldr r3, [pc, #136] ; (80067dc <_ZL12MX_TIM2_Initv+0xb8>) - 8006752: 2200 movs r2, #0 - 8006754: 609a str r2, [r3, #8] - htim2.Init.Period = 4294967295; - 8006756: 4b21 ldr r3, [pc, #132] ; (80067dc <_ZL12MX_TIM2_Initv+0xb8>) - 8006758: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff - 800675c: 60da str r2, [r3, #12] - htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 800675e: 4b1f ldr r3, [pc, #124] ; (80067dc <_ZL12MX_TIM2_Initv+0xb8>) - 8006760: 2200 movs r2, #0 - 8006762: 611a str r2, [r3, #16] - htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 8006764: 4b1d ldr r3, [pc, #116] ; (80067dc <_ZL12MX_TIM2_Initv+0xb8>) - 8006766: 2200 movs r2, #0 - 8006768: 619a str r2, [r3, #24] - sConfig.EncoderMode = TIM_ENCODERMODE_TI12; - 800676a: 2303 movs r3, #3 - 800676c: 60fb str r3, [r7, #12] - sConfig.IC1Polarity = TIM_ICPOLARITY_RISING; - 800676e: 2300 movs r3, #0 - 8006770: 613b str r3, [r7, #16] - sConfig.IC1Selection = TIM_ICSELECTION_DIRECTTI; - 8006772: 2301 movs r3, #1 - 8006774: 617b str r3, [r7, #20] - sConfig.IC1Prescaler = TIM_ICPSC_DIV1; - 8006776: 2300 movs r3, #0 - 8006778: 61bb str r3, [r7, #24] - sConfig.IC1Filter = 0; - 800677a: 2300 movs r3, #0 - 800677c: 61fb str r3, [r7, #28] - sConfig.IC2Polarity = TIM_ICPOLARITY_RISING; - 800677e: 2300 movs r3, #0 - 8006780: 623b str r3, [r7, #32] - sConfig.IC2Selection = TIM_ICSELECTION_DIRECTTI; - 8006782: 2301 movs r3, #1 - 8006784: 627b str r3, [r7, #36] ; 0x24 - sConfig.IC2Prescaler = TIM_ICPSC_DIV1; - 8006786: 2300 movs r3, #0 - 8006788: 62bb str r3, [r7, #40] ; 0x28 - sConfig.IC2Filter = 0; - 800678a: 2300 movs r3, #0 - 800678c: 62fb str r3, [r7, #44] ; 0x2c - if (HAL_TIM_Encoder_Init(&htim2, &sConfig) != HAL_OK) { - 800678e: f107 030c add.w r3, r7, #12 - 8006792: 4619 mov r1, r3 - 8006794: 4811 ldr r0, [pc, #68] ; (80067dc <_ZL12MX_TIM2_Initv+0xb8>) - 8006796: f7fb fe8b bl 80024b0 - 800679a: 4603 mov r3, r0 - 800679c: 2b00 cmp r3, #0 - 800679e: bf14 ite ne - 80067a0: 2301 movne r3, #1 - 80067a2: 2300 moveq r3, #0 - 80067a4: b2db uxtb r3, r3 - 80067a6: 2b00 cmp r3, #0 - 80067a8: d001 beq.n 80067ae <_ZL12MX_TIM2_Initv+0x8a> - Error_Handler(); - 80067aa: f000 fc49 bl 8007040 - } - sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; - 80067ae: 2300 movs r3, #0 - 80067b0: 603b str r3, [r7, #0] - sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - 80067b2: 2300 movs r3, #0 - 80067b4: 60bb str r3, [r7, #8] - if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK) { - 80067b6: 463b mov r3, r7 - 80067b8: 4619 mov r1, r3 - 80067ba: 4808 ldr r0, [pc, #32] ; (80067dc <_ZL12MX_TIM2_Initv+0xb8>) - 80067bc: f7fc fe18 bl 80033f0 - 80067c0: 4603 mov r3, r0 - 80067c2: 2b00 cmp r3, #0 - 80067c4: bf14 ite ne - 80067c6: 2301 movne r3, #1 - 80067c8: 2300 moveq r3, #0 - 80067ca: b2db uxtb r3, r3 - 80067cc: 2b00 cmp r3, #0 - 80067ce: d001 beq.n 80067d4 <_ZL12MX_TIM2_Initv+0xb0> - Error_Handler(); - 80067d0: f000 fc36 bl 8007040 - } - /* USER CODE BEGIN TIM2_Init 2 */ + 8007546: bf00 nop + 8007548: 371c adds r7, #28 + 800754a: 46bd mov sp, r7 + 800754c: f85d 7b04 ldr.w r7, [sp], #4 + 8007550: 4770 bx lr + 8007552: bf00 nop + 8007554: feff8fff .word 0xfeff8fff + 8007558: 40010000 .word 0x40010000 + 800755c: 40010400 .word 0x40010400 + +08007560 : + * @param TIM_ICFilter Specifies the Input Capture Filter. + * This parameter must be a value between 0x00 and 0x0F. + * @retval None + */ +static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) +{ + 8007560: b480 push {r7} + 8007562: b087 sub sp, #28 + 8007564: af00 add r7, sp, #0 + 8007566: 60f8 str r0, [r7, #12] + 8007568: 60b9 str r1, [r7, #8] + 800756a: 607a str r2, [r7, #4] + uint32_t tmpccmr1; + uint32_t tmpccer; + + /* Disable the Channel 1: Reset the CC1E Bit */ + tmpccer = TIMx->CCER; + 800756c: 68fb ldr r3, [r7, #12] + 800756e: 6a1b ldr r3, [r3, #32] + 8007570: 617b str r3, [r7, #20] + TIMx->CCER &= ~TIM_CCER_CC1E; + 8007572: 68fb ldr r3, [r7, #12] + 8007574: 6a1b ldr r3, [r3, #32] + 8007576: f023 0201 bic.w r2, r3, #1 + 800757a: 68fb ldr r3, [r7, #12] + 800757c: 621a str r2, [r3, #32] + tmpccmr1 = TIMx->CCMR1; + 800757e: 68fb ldr r3, [r7, #12] + 8007580: 699b ldr r3, [r3, #24] + 8007582: 613b str r3, [r7, #16] - /* USER CODE END TIM2_Init 2 */ + /* Set the filter */ + tmpccmr1 &= ~TIM_CCMR1_IC1F; + 8007584: 693b ldr r3, [r7, #16] + 8007586: f023 03f0 bic.w r3, r3, #240 ; 0xf0 + 800758a: 613b str r3, [r7, #16] + tmpccmr1 |= (TIM_ICFilter << 4U); + 800758c: 687b ldr r3, [r7, #4] + 800758e: 011b lsls r3, r3, #4 + 8007590: 693a ldr r2, [r7, #16] + 8007592: 4313 orrs r3, r2 + 8007594: 613b str r3, [r7, #16] + + /* Select the Polarity and set the CC1E Bit */ + tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP); + 8007596: 697b ldr r3, [r7, #20] + 8007598: f023 030a bic.w r3, r3, #10 + 800759c: 617b str r3, [r7, #20] + tmpccer |= TIM_ICPolarity; + 800759e: 697a ldr r2, [r7, #20] + 80075a0: 68bb ldr r3, [r7, #8] + 80075a2: 4313 orrs r3, r2 + 80075a4: 617b str r3, [r7, #20] + /* Write to TIMx CCMR1 and CCER registers */ + TIMx->CCMR1 = tmpccmr1; + 80075a6: 68fb ldr r3, [r7, #12] + 80075a8: 693a ldr r2, [r7, #16] + 80075aa: 619a str r2, [r3, #24] + TIMx->CCER = tmpccer; + 80075ac: 68fb ldr r3, [r7, #12] + 80075ae: 697a ldr r2, [r7, #20] + 80075b0: 621a str r2, [r3, #32] } - 80067d4: bf00 nop - 80067d6: 3730 adds r7, #48 ; 0x30 - 80067d8: 46bd mov sp, r7 - 80067da: bd80 pop {r7, pc} - 80067dc: 200000a4 .word 0x200000a4 + 80075b2: bf00 nop + 80075b4: 371c adds r7, #28 + 80075b6: 46bd mov sp, r7 + 80075b8: f85d 7b04 ldr.w r7, [sp], #4 + 80075bc: 4770 bx lr -080067e0 <_ZL12MX_TIM3_Initv>: -/** - * @brief TIM3 Initialization Function - * @param None - * @retval None - */ -static void MX_TIM3_Init(void) { - 80067e0: b580 push {r7, lr} - 80067e2: b088 sub sp, #32 - 80067e4: af00 add r7, sp, #0 - - /* USER CODE BEGIN TIM3_Init 0 */ - - /* USER CODE END TIM3_Init 0 */ - - TIM_ClockConfigTypeDef sClockSourceConfig = { 0 }; - 80067e6: f107 0310 add.w r3, r7, #16 - 80067ea: 2200 movs r2, #0 - 80067ec: 601a str r2, [r3, #0] - 80067ee: 605a str r2, [r3, #4] - 80067f0: 609a str r2, [r3, #8] - 80067f2: 60da str r2, [r3, #12] - TIM_MasterConfigTypeDef sMasterConfig = { 0 }; - 80067f4: 1d3b adds r3, r7, #4 - 80067f6: 2200 movs r2, #0 - 80067f8: 601a str r2, [r3, #0] - 80067fa: 605a str r2, [r3, #4] - 80067fc: 609a str r2, [r3, #8] - - /* USER CODE BEGIN TIM3_Init 1 */ - - /* USER CODE END TIM3_Init 1 */ - htim3.Instance = TIM3; - 80067fe: 4b25 ldr r3, [pc, #148] ; (8006894 <_ZL12MX_TIM3_Initv+0xb4>) - 8006800: 4a25 ldr r2, [pc, #148] ; (8006898 <_ZL12MX_TIM3_Initv+0xb8>) - 8006802: 601a str r2, [r3, #0] - htim3.Init.Prescaler = 39999; - 8006804: 4b23 ldr r3, [pc, #140] ; (8006894 <_ZL12MX_TIM3_Initv+0xb4>) - 8006806: f649 423f movw r2, #39999 ; 0x9c3f - 800680a: 605a str r2, [r3, #4] - htim3.Init.CounterMode = TIM_COUNTERMODE_UP; - 800680c: 4b21 ldr r3, [pc, #132] ; (8006894 <_ZL12MX_TIM3_Initv+0xb4>) - 800680e: 2200 movs r2, #0 - 8006810: 609a str r2, [r3, #8] - htim3.Init.Period = 9; - 8006812: 4b20 ldr r3, [pc, #128] ; (8006894 <_ZL12MX_TIM3_Initv+0xb4>) - 8006814: 2209 movs r2, #9 - 8006816: 60da str r2, [r3, #12] - htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 8006818: 4b1e ldr r3, [pc, #120] ; (8006894 <_ZL12MX_TIM3_Initv+0xb4>) - 800681a: 2200 movs r2, #0 - 800681c: 611a str r2, [r3, #16] - htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 800681e: 4b1d ldr r3, [pc, #116] ; (8006894 <_ZL12MX_TIM3_Initv+0xb4>) - 8006820: 2200 movs r2, #0 - 8006822: 619a str r2, [r3, #24] - if (HAL_TIM_Base_Init(&htim3) != HAL_OK) { - 8006824: 481b ldr r0, [pc, #108] ; (8006894 <_ZL12MX_TIM3_Initv+0xb4>) - 8006826: f7fb fdc1 bl 80023ac - 800682a: 4603 mov r3, r0 - 800682c: 2b00 cmp r3, #0 - 800682e: bf14 ite ne - 8006830: 2301 movne r3, #1 - 8006832: 2300 moveq r3, #0 - 8006834: b2db uxtb r3, r3 - 8006836: 2b00 cmp r3, #0 - 8006838: d001 beq.n 800683e <_ZL12MX_TIM3_Initv+0x5e> - Error_Handler(); - 800683a: f000 fc01 bl 8007040 - } - sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; - 800683e: f44f 5380 mov.w r3, #4096 ; 0x1000 - 8006842: 613b str r3, [r7, #16] - if (HAL_TIM_ConfigClockSource(&htim3, &sClockSourceConfig) != HAL_OK) { - 8006844: f107 0310 add.w r3, r7, #16 - 8006848: 4619 mov r1, r3 - 800684a: 4812 ldr r0, [pc, #72] ; (8006894 <_ZL12MX_TIM3_Initv+0xb4>) - 800684c: f7fc f930 bl 8002ab0 - 8006850: 4603 mov r3, r0 - 8006852: 2b00 cmp r3, #0 - 8006854: bf14 ite ne - 8006856: 2301 movne r3, #1 - 8006858: 2300 moveq r3, #0 - 800685a: b2db uxtb r3, r3 - 800685c: 2b00 cmp r3, #0 - 800685e: d001 beq.n 8006864 <_ZL12MX_TIM3_Initv+0x84> - Error_Handler(); - 8006860: f000 fbee bl 8007040 - } - sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; - 8006864: 2300 movs r3, #0 - 8006866: 607b str r3, [r7, #4] - sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - 8006868: 2300 movs r3, #0 - 800686a: 60fb str r3, [r7, #12] - if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK) { - 800686c: 1d3b adds r3, r7, #4 - 800686e: 4619 mov r1, r3 - 8006870: 4808 ldr r0, [pc, #32] ; (8006894 <_ZL12MX_TIM3_Initv+0xb4>) - 8006872: f7fc fdbd bl 80033f0 - 8006876: 4603 mov r3, r0 - 8006878: 2b00 cmp r3, #0 - 800687a: bf14 ite ne - 800687c: 2301 movne r3, #1 - 800687e: 2300 moveq r3, #0 - 8006880: b2db uxtb r3, r3 - 8006882: 2b00 cmp r3, #0 - 8006884: d001 beq.n 800688a <_ZL12MX_TIM3_Initv+0xaa> - Error_Handler(); - 8006886: f000 fbdb bl 8007040 - } - /* USER CODE BEGIN TIM3_Init 2 */ +080075be : + * @param TIM_ICFilter Specifies the Input Capture Filter. + * This parameter must be a value between 0x00 and 0x0F. + * @retval None + */ +static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) +{ + 80075be: b480 push {r7} + 80075c0: b087 sub sp, #28 + 80075c2: af00 add r7, sp, #0 + 80075c4: 60f8 str r0, [r7, #12] + 80075c6: 60b9 str r1, [r7, #8] + 80075c8: 607a str r2, [r7, #4] + uint32_t tmpccmr1; + uint32_t tmpccer; - /* USER CODE END TIM3_Init 2 */ + /* Disable the Channel 2: Reset the CC2E Bit */ + TIMx->CCER &= ~TIM_CCER_CC2E; + 80075ca: 68fb ldr r3, [r7, #12] + 80075cc: 6a1b ldr r3, [r3, #32] + 80075ce: f023 0210 bic.w r2, r3, #16 + 80075d2: 68fb ldr r3, [r7, #12] + 80075d4: 621a str r2, [r3, #32] + tmpccmr1 = TIMx->CCMR1; + 80075d6: 68fb ldr r3, [r7, #12] + 80075d8: 699b ldr r3, [r3, #24] + 80075da: 617b str r3, [r7, #20] + tmpccer = TIMx->CCER; + 80075dc: 68fb ldr r3, [r7, #12] + 80075de: 6a1b ldr r3, [r3, #32] + 80075e0: 613b str r3, [r7, #16] -} - 800688a: bf00 nop - 800688c: 3720 adds r7, #32 - 800688e: 46bd mov sp, r7 - 8006890: bd80 pop {r7, pc} - 8006892: bf00 nop - 8006894: 200000e4 .word 0x200000e4 - 8006898: 40000400 .word 0x40000400 - -0800689c <_ZL12MX_TIM4_Initv>: -/** - * @brief TIM4 Initialization Function - * @param None - * @retval None - */ -static void MX_TIM4_Init(void) { - 800689c: b580 push {r7, lr} - 800689e: b08a sub sp, #40 ; 0x28 - 80068a0: af00 add r7, sp, #0 - - /* USER CODE BEGIN TIM4_Init 0 */ - - /* USER CODE END TIM4_Init 0 */ - - TIM_MasterConfigTypeDef sMasterConfig = { 0 }; - 80068a2: f107 031c add.w r3, r7, #28 - 80068a6: 2200 movs r2, #0 - 80068a8: 601a str r2, [r3, #0] - 80068aa: 605a str r2, [r3, #4] - 80068ac: 609a str r2, [r3, #8] - TIM_OC_InitTypeDef sConfigOC = { 0 }; - 80068ae: 463b mov r3, r7 - 80068b0: 2200 movs r2, #0 - 80068b2: 601a str r2, [r3, #0] - 80068b4: 605a str r2, [r3, #4] - 80068b6: 609a str r2, [r3, #8] - 80068b8: 60da str r2, [r3, #12] - 80068ba: 611a str r2, [r3, #16] - 80068bc: 615a str r2, [r3, #20] - 80068be: 619a str r2, [r3, #24] - - /* USER CODE BEGIN TIM4_Init 1 */ - - /* USER CODE END TIM4_Init 1 */ - htim4.Instance = TIM4; - 80068c0: 4b30 ldr r3, [pc, #192] ; (8006984 <_ZL12MX_TIM4_Initv+0xe8>) - 80068c2: 4a31 ldr r2, [pc, #196] ; (8006988 <_ZL12MX_TIM4_Initv+0xec>) - 80068c4: 601a str r2, [r3, #0] - htim4.Init.Prescaler = 0; - 80068c6: 4b2f ldr r3, [pc, #188] ; (8006984 <_ZL12MX_TIM4_Initv+0xe8>) - 80068c8: 2200 movs r2, #0 - 80068ca: 605a str r2, [r3, #4] - htim4.Init.CounterMode = TIM_COUNTERMODE_UP; - 80068cc: 4b2d ldr r3, [pc, #180] ; (8006984 <_ZL12MX_TIM4_Initv+0xe8>) - 80068ce: 2200 movs r2, #0 - 80068d0: 609a str r2, [r3, #8] - htim4.Init.Period = 0; - 80068d2: 4b2c ldr r3, [pc, #176] ; (8006984 <_ZL12MX_TIM4_Initv+0xe8>) - 80068d4: 2200 movs r2, #0 - 80068d6: 60da str r2, [r3, #12] - htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 80068d8: 4b2a ldr r3, [pc, #168] ; (8006984 <_ZL12MX_TIM4_Initv+0xe8>) - 80068da: 2200 movs r2, #0 - 80068dc: 611a str r2, [r3, #16] - htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 80068de: 4b29 ldr r3, [pc, #164] ; (8006984 <_ZL12MX_TIM4_Initv+0xe8>) - 80068e0: 2200 movs r2, #0 - 80068e2: 619a str r2, [r3, #24] - if (HAL_TIM_PWM_Init(&htim4) != HAL_OK) { - 80068e4: 4827 ldr r0, [pc, #156] ; (8006984 <_ZL12MX_TIM4_Initv+0xe8>) - 80068e6: f7fb fdb7 bl 8002458 - 80068ea: 4603 mov r3, r0 - 80068ec: 2b00 cmp r3, #0 - 80068ee: bf14 ite ne - 80068f0: 2301 movne r3, #1 - 80068f2: 2300 moveq r3, #0 - 80068f4: b2db uxtb r3, r3 - 80068f6: 2b00 cmp r3, #0 - 80068f8: d001 beq.n 80068fe <_ZL12MX_TIM4_Initv+0x62> - Error_Handler(); - 80068fa: f000 fba1 bl 8007040 - } - sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; - 80068fe: 2300 movs r3, #0 - 8006900: 61fb str r3, [r7, #28] - sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - 8006902: 2300 movs r3, #0 - 8006904: 627b str r3, [r7, #36] ; 0x24 - if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) { - 8006906: f107 031c add.w r3, r7, #28 - 800690a: 4619 mov r1, r3 - 800690c: 481d ldr r0, [pc, #116] ; (8006984 <_ZL12MX_TIM4_Initv+0xe8>) - 800690e: f7fc fd6f bl 80033f0 - 8006912: 4603 mov r3, r0 - 8006914: 2b00 cmp r3, #0 - 8006916: bf14 ite ne - 8006918: 2301 movne r3, #1 - 800691a: 2300 moveq r3, #0 - 800691c: b2db uxtb r3, r3 - 800691e: 2b00 cmp r3, #0 - 8006920: d001 beq.n 8006926 <_ZL12MX_TIM4_Initv+0x8a> - Error_Handler(); - 8006922: f000 fb8d bl 8007040 - } - sConfigOC.OCMode = TIM_OCMODE_PWM1; - 8006926: 2360 movs r3, #96 ; 0x60 - 8006928: 603b str r3, [r7, #0] - sConfigOC.Pulse = 0; - 800692a: 2300 movs r3, #0 - 800692c: 607b str r3, [r7, #4] - sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; - 800692e: 2300 movs r3, #0 - 8006930: 60bb str r3, [r7, #8] - sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; - 8006932: 2300 movs r3, #0 - 8006934: 613b str r3, [r7, #16] - if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) { - 8006936: 463b mov r3, r7 - 8006938: 2208 movs r2, #8 - 800693a: 4619 mov r1, r3 - 800693c: 4811 ldr r0, [pc, #68] ; (8006984 <_ZL12MX_TIM4_Initv+0xe8>) - 800693e: f7fb ff9f bl 8002880 - 8006942: 4603 mov r3, r0 - 8006944: 2b00 cmp r3, #0 - 8006946: bf14 ite ne - 8006948: 2301 movne r3, #1 - 800694a: 2300 moveq r3, #0 - 800694c: b2db uxtb r3, r3 - 800694e: 2b00 cmp r3, #0 - 8006950: d001 beq.n 8006956 <_ZL12MX_TIM4_Initv+0xba> - Error_Handler(); - 8006952: f000 fb75 bl 8007040 - } - if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_4) != HAL_OK) { - 8006956: 463b mov r3, r7 - 8006958: 220c movs r2, #12 - 800695a: 4619 mov r1, r3 - 800695c: 4809 ldr r0, [pc, #36] ; (8006984 <_ZL12MX_TIM4_Initv+0xe8>) - 800695e: f7fb ff8f bl 8002880 - 8006962: 4603 mov r3, r0 - 8006964: 2b00 cmp r3, #0 - 8006966: bf14 ite ne - 8006968: 2301 movne r3, #1 - 800696a: 2300 moveq r3, #0 - 800696c: b2db uxtb r3, r3 - 800696e: 2b00 cmp r3, #0 - 8006970: d001 beq.n 8006976 <_ZL12MX_TIM4_Initv+0xda> - Error_Handler(); - 8006972: f000 fb65 bl 8007040 - } - /* USER CODE BEGIN TIM4_Init 2 */ + /* Set the filter */ + tmpccmr1 &= ~TIM_CCMR1_IC2F; + 80075e2: 697b ldr r3, [r7, #20] + 80075e4: f423 4370 bic.w r3, r3, #61440 ; 0xf000 + 80075e8: 617b str r3, [r7, #20] + tmpccmr1 |= (TIM_ICFilter << 12U); + 80075ea: 687b ldr r3, [r7, #4] + 80075ec: 031b lsls r3, r3, #12 + 80075ee: 697a ldr r2, [r7, #20] + 80075f0: 4313 orrs r3, r2 + 80075f2: 617b str r3, [r7, #20] - /* USER CODE END TIM4_Init 2 */ - HAL_TIM_MspPostInit(&htim4); - 8006976: 4803 ldr r0, [pc, #12] ; (8006984 <_ZL12MX_TIM4_Initv+0xe8>) - 8006978: f001 fb8c bl 8008094 + /* Select the Polarity and set the CC2E Bit */ + tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP); + 80075f4: 693b ldr r3, [r7, #16] + 80075f6: f023 03a0 bic.w r3, r3, #160 ; 0xa0 + 80075fa: 613b str r3, [r7, #16] + tmpccer |= (TIM_ICPolarity << 4U); + 80075fc: 68bb ldr r3, [r7, #8] + 80075fe: 011b lsls r3, r3, #4 + 8007600: 693a ldr r2, [r7, #16] + 8007602: 4313 orrs r3, r2 + 8007604: 613b str r3, [r7, #16] + /* Write to TIMx CCMR1 and CCER registers */ + TIMx->CCMR1 = tmpccmr1 ; + 8007606: 68fb ldr r3, [r7, #12] + 8007608: 697a ldr r2, [r7, #20] + 800760a: 619a str r2, [r3, #24] + TIMx->CCER = tmpccer; + 800760c: 68fb ldr r3, [r7, #12] + 800760e: 693a ldr r2, [r7, #16] + 8007610: 621a str r2, [r3, #32] } - 800697c: bf00 nop - 800697e: 3728 adds r7, #40 ; 0x28 - 8006980: 46bd mov sp, r7 - 8006982: bd80 pop {r7, pc} - 8006984: 20000124 .word 0x20000124 - 8006988: 40000800 .word 0x40000800 - -0800698c <_ZL12MX_TIM5_Initv>: -/** - * @brief TIM5 Initialization Function - * @param None - * @retval None - */ -static void MX_TIM5_Init(void) { - 800698c: b580 push {r7, lr} - 800698e: b08c sub sp, #48 ; 0x30 - 8006990: af00 add r7, sp, #0 - - /* USER CODE BEGIN TIM5_Init 0 */ - - /* USER CODE END TIM5_Init 0 */ - - TIM_Encoder_InitTypeDef sConfig = { 0 }; - 8006992: f107 030c add.w r3, r7, #12 - 8006996: 2224 movs r2, #36 ; 0x24 - 8006998: 2100 movs r1, #0 - 800699a: 4618 mov r0, r3 - 800699c: f003 fa47 bl 8009e2e - TIM_MasterConfigTypeDef sMasterConfig = { 0 }; - 80069a0: 463b mov r3, r7 - 80069a2: 2200 movs r2, #0 - 80069a4: 601a str r2, [r3, #0] - 80069a6: 605a str r2, [r3, #4] - 80069a8: 609a str r2, [r3, #8] - - /* USER CODE BEGIN TIM5_Init 1 */ - - /* USER CODE END TIM5_Init 1 */ - htim5.Instance = TIM5; - 80069aa: 4b25 ldr r3, [pc, #148] ; (8006a40 <_ZL12MX_TIM5_Initv+0xb4>) - 80069ac: 4a25 ldr r2, [pc, #148] ; (8006a44 <_ZL12MX_TIM5_Initv+0xb8>) - 80069ae: 601a str r2, [r3, #0] - htim5.Init.Prescaler = 0; - 80069b0: 4b23 ldr r3, [pc, #140] ; (8006a40 <_ZL12MX_TIM5_Initv+0xb4>) - 80069b2: 2200 movs r2, #0 - 80069b4: 605a str r2, [r3, #4] - htim5.Init.CounterMode = TIM_COUNTERMODE_UP; - 80069b6: 4b22 ldr r3, [pc, #136] ; (8006a40 <_ZL12MX_TIM5_Initv+0xb4>) - 80069b8: 2200 movs r2, #0 - 80069ba: 609a str r2, [r3, #8] - htim5.Init.Period = 0; - 80069bc: 4b20 ldr r3, [pc, #128] ; (8006a40 <_ZL12MX_TIM5_Initv+0xb4>) - 80069be: 2200 movs r2, #0 - 80069c0: 60da str r2, [r3, #12] - htim5.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 80069c2: 4b1f ldr r3, [pc, #124] ; (8006a40 <_ZL12MX_TIM5_Initv+0xb4>) - 80069c4: 2200 movs r2, #0 - 80069c6: 611a str r2, [r3, #16] - htim5.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 80069c8: 4b1d ldr r3, [pc, #116] ; (8006a40 <_ZL12MX_TIM5_Initv+0xb4>) - 80069ca: 2200 movs r2, #0 - 80069cc: 619a str r2, [r3, #24] - sConfig.EncoderMode = TIM_ENCODERMODE_TI12; - 80069ce: 2303 movs r3, #3 - 80069d0: 60fb str r3, [r7, #12] - sConfig.IC1Polarity = TIM_ICPOLARITY_RISING; - 80069d2: 2300 movs r3, #0 - 80069d4: 613b str r3, [r7, #16] - sConfig.IC1Selection = TIM_ICSELECTION_DIRECTTI; - 80069d6: 2301 movs r3, #1 - 80069d8: 617b str r3, [r7, #20] - sConfig.IC1Prescaler = TIM_ICPSC_DIV1; - 80069da: 2300 movs r3, #0 - 80069dc: 61bb str r3, [r7, #24] - sConfig.IC1Filter = 0; - 80069de: 2300 movs r3, #0 - 80069e0: 61fb str r3, [r7, #28] - sConfig.IC2Polarity = TIM_ICPOLARITY_RISING; - 80069e2: 2300 movs r3, #0 - 80069e4: 623b str r3, [r7, #32] - sConfig.IC2Selection = TIM_ICSELECTION_DIRECTTI; - 80069e6: 2301 movs r3, #1 - 80069e8: 627b str r3, [r7, #36] ; 0x24 - sConfig.IC2Prescaler = TIM_ICPSC_DIV1; - 80069ea: 2300 movs r3, #0 - 80069ec: 62bb str r3, [r7, #40] ; 0x28 - sConfig.IC2Filter = 0; - 80069ee: 2300 movs r3, #0 - 80069f0: 62fb str r3, [r7, #44] ; 0x2c - if (HAL_TIM_Encoder_Init(&htim5, &sConfig) != HAL_OK) { - 80069f2: f107 030c add.w r3, r7, #12 - 80069f6: 4619 mov r1, r3 - 80069f8: 4811 ldr r0, [pc, #68] ; (8006a40 <_ZL12MX_TIM5_Initv+0xb4>) - 80069fa: f7fb fd59 bl 80024b0 - 80069fe: 4603 mov r3, r0 - 8006a00: 2b00 cmp r3, #0 - 8006a02: bf14 ite ne - 8006a04: 2301 movne r3, #1 - 8006a06: 2300 moveq r3, #0 - 8006a08: b2db uxtb r3, r3 - 8006a0a: 2b00 cmp r3, #0 - 8006a0c: d001 beq.n 8006a12 <_ZL12MX_TIM5_Initv+0x86> - Error_Handler(); - 8006a0e: f000 fb17 bl 8007040 - } - sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; - 8006a12: 2300 movs r3, #0 - 8006a14: 603b str r3, [r7, #0] - sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - 8006a16: 2300 movs r3, #0 - 8006a18: 60bb str r3, [r7, #8] - if (HAL_TIMEx_MasterConfigSynchronization(&htim5, &sMasterConfig) != HAL_OK) { - 8006a1a: 463b mov r3, r7 - 8006a1c: 4619 mov r1, r3 - 8006a1e: 4808 ldr r0, [pc, #32] ; (8006a40 <_ZL12MX_TIM5_Initv+0xb4>) - 8006a20: f7fc fce6 bl 80033f0 - 8006a24: 4603 mov r3, r0 - 8006a26: 2b00 cmp r3, #0 - 8006a28: bf14 ite ne - 8006a2a: 2301 movne r3, #1 - 8006a2c: 2300 moveq r3, #0 - 8006a2e: b2db uxtb r3, r3 - 8006a30: 2b00 cmp r3, #0 - 8006a32: d001 beq.n 8006a38 <_ZL12MX_TIM5_Initv+0xac> - Error_Handler(); - 8006a34: f000 fb04 bl 8007040 - } - /* USER CODE BEGIN TIM5_Init 2 */ + 8007612: bf00 nop + 8007614: 371c adds r7, #28 + 8007616: 46bd mov sp, r7 + 8007618: f85d 7b04 ldr.w r7, [sp], #4 + 800761c: 4770 bx lr - /* USER CODE END TIM5_Init 2 */ +0800761e : + * @arg TIM_TS_TI2FP2: Filtered Timer Input 2 + * @arg TIM_TS_ETRF: External Trigger input + * @retval None + */ +static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource) +{ + 800761e: b480 push {r7} + 8007620: b085 sub sp, #20 + 8007622: af00 add r7, sp, #0 + 8007624: 6078 str r0, [r7, #4] + 8007626: 6039 str r1, [r7, #0] + uint32_t tmpsmcr; + /* Get the TIMx SMCR register value */ + tmpsmcr = TIMx->SMCR; + 8007628: 687b ldr r3, [r7, #4] + 800762a: 689b ldr r3, [r3, #8] + 800762c: 60fb str r3, [r7, #12] + /* Reset the TS Bits */ + tmpsmcr &= ~TIM_SMCR_TS; + 800762e: 68fb ldr r3, [r7, #12] + 8007630: f023 0370 bic.w r3, r3, #112 ; 0x70 + 8007634: 60fb str r3, [r7, #12] + /* Set the Input Trigger source and the slave mode*/ + tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1); + 8007636: 683a ldr r2, [r7, #0] + 8007638: 68fb ldr r3, [r7, #12] + 800763a: 4313 orrs r3, r2 + 800763c: f043 0307 orr.w r3, r3, #7 + 8007640: 60fb str r3, [r7, #12] + /* Write to TIMx SMCR */ + TIMx->SMCR = tmpsmcr; + 8007642: 687b ldr r3, [r7, #4] + 8007644: 68fa ldr r2, [r7, #12] + 8007646: 609a str r2, [r3, #8] } - 8006a38: bf00 nop - 8006a3a: 3730 adds r7, #48 ; 0x30 - 8006a3c: 46bd mov sp, r7 - 8006a3e: bd80 pop {r7, pc} - 8006a40: 20000164 .word 0x20000164 - 8006a44: 40000c00 .word 0x40000c00 - -08006a48 <_ZL19MX_USART3_UART_Initv>: -/** - * @brief USART3 Initialization Function - * @param None - * @retval None - */ -static void MX_USART3_UART_Init(void) { - 8006a48: b580 push {r7, lr} - 8006a4a: af00 add r7, sp, #0 - /* USER CODE END USART3_Init 0 */ - - /* USER CODE BEGIN USART3_Init 1 */ - - /* USER CODE END USART3_Init 1 */ - huart3.Instance = USART3; - 8006a4c: 4b16 ldr r3, [pc, #88] ; (8006aa8 <_ZL19MX_USART3_UART_Initv+0x60>) - 8006a4e: 4a17 ldr r2, [pc, #92] ; (8006aac <_ZL19MX_USART3_UART_Initv+0x64>) - 8006a50: 601a str r2, [r3, #0] - huart3.Init.BaudRate = 115200; - 8006a52: 4b15 ldr r3, [pc, #84] ; (8006aa8 <_ZL19MX_USART3_UART_Initv+0x60>) - 8006a54: f44f 32e1 mov.w r2, #115200 ; 0x1c200 - 8006a58: 605a str r2, [r3, #4] - huart3.Init.WordLength = UART_WORDLENGTH_8B; - 8006a5a: 4b13 ldr r3, [pc, #76] ; (8006aa8 <_ZL19MX_USART3_UART_Initv+0x60>) - 8006a5c: 2200 movs r2, #0 - 8006a5e: 609a str r2, [r3, #8] - huart3.Init.StopBits = UART_STOPBITS_1; - 8006a60: 4b11 ldr r3, [pc, #68] ; (8006aa8 <_ZL19MX_USART3_UART_Initv+0x60>) - 8006a62: 2200 movs r2, #0 - 8006a64: 60da str r2, [r3, #12] - huart3.Init.Parity = UART_PARITY_NONE; - 8006a66: 4b10 ldr r3, [pc, #64] ; (8006aa8 <_ZL19MX_USART3_UART_Initv+0x60>) - 8006a68: 2200 movs r2, #0 - 8006a6a: 611a str r2, [r3, #16] - huart3.Init.Mode = UART_MODE_TX_RX; - 8006a6c: 4b0e ldr r3, [pc, #56] ; (8006aa8 <_ZL19MX_USART3_UART_Initv+0x60>) - 8006a6e: 220c movs r2, #12 - 8006a70: 615a str r2, [r3, #20] - huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE; - 8006a72: 4b0d ldr r3, [pc, #52] ; (8006aa8 <_ZL19MX_USART3_UART_Initv+0x60>) - 8006a74: 2200 movs r2, #0 - 8006a76: 619a str r2, [r3, #24] - huart3.Init.OverSampling = UART_OVERSAMPLING_16; - 8006a78: 4b0b ldr r3, [pc, #44] ; (8006aa8 <_ZL19MX_USART3_UART_Initv+0x60>) - 8006a7a: 2200 movs r2, #0 - 8006a7c: 61da str r2, [r3, #28] - huart3.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; - 8006a7e: 4b0a ldr r3, [pc, #40] ; (8006aa8 <_ZL19MX_USART3_UART_Initv+0x60>) - 8006a80: 2200 movs r2, #0 - 8006a82: 621a str r2, [r3, #32] - huart3.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; - 8006a84: 4b08 ldr r3, [pc, #32] ; (8006aa8 <_ZL19MX_USART3_UART_Initv+0x60>) - 8006a86: 2200 movs r2, #0 - 8006a88: 625a str r2, [r3, #36] ; 0x24 - if (HAL_UART_Init(&huart3) != HAL_OK) { - 8006a8a: 4807 ldr r0, [pc, #28] ; (8006aa8 <_ZL19MX_USART3_UART_Initv+0x60>) - 8006a8c: f7fc fd2a bl 80034e4 - 8006a90: 4603 mov r3, r0 - 8006a92: 2b00 cmp r3, #0 - 8006a94: bf14 ite ne - 8006a96: 2301 movne r3, #1 - 8006a98: 2300 moveq r3, #0 - 8006a9a: b2db uxtb r3, r3 - 8006a9c: 2b00 cmp r3, #0 - 8006a9e: d001 beq.n 8006aa4 <_ZL19MX_USART3_UART_Initv+0x5c> - Error_Handler(); - 8006aa0: f000 face bl 8007040 - } - /* USER CODE BEGIN USART3_Init 2 */ + 8007648: bf00 nop + 800764a: 3714 adds r7, #20 + 800764c: 46bd mov sp, r7 + 800764e: f85d 7b04 ldr.w r7, [sp], #4 + 8007652: 4770 bx lr - /* USER CODE END USART3_Init 2 */ +08007654 : + * This parameter must be a value between 0x00 and 0x0F + * @retval None + */ +void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler, + uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter) +{ + 8007654: b480 push {r7} + 8007656: b087 sub sp, #28 + 8007658: af00 add r7, sp, #0 + 800765a: 60f8 str r0, [r7, #12] + 800765c: 60b9 str r1, [r7, #8] + 800765e: 607a str r2, [r7, #4] + 8007660: 603b str r3, [r7, #0] + uint32_t tmpsmcr; -} - 8006aa4: bf00 nop - 8006aa6: bd80 pop {r7, pc} - 8006aa8: 200001a4 .word 0x200001a4 - 8006aac: 40004800 .word 0x40004800 + tmpsmcr = TIMx->SMCR; + 8007662: 68fb ldr r3, [r7, #12] + 8007664: 689b ldr r3, [r3, #8] + 8007666: 617b str r3, [r7, #20] -08006ab0 <_ZL19MX_USART6_UART_Initv>: -/** - * @brief USART6 Initialization Function - * @param None - * @retval None - */ -static void MX_USART6_UART_Init(void) { - 8006ab0: b580 push {r7, lr} - 8006ab2: af00 add r7, sp, #0 - /* USER CODE END USART6_Init 0 */ - - /* USER CODE BEGIN USART6_Init 1 */ - - /* USER CODE END USART6_Init 1 */ - huart6.Instance = USART6; - 8006ab4: 4b16 ldr r3, [pc, #88] ; (8006b10 <_ZL19MX_USART6_UART_Initv+0x60>) - 8006ab6: 4a17 ldr r2, [pc, #92] ; (8006b14 <_ZL19MX_USART6_UART_Initv+0x64>) - 8006ab8: 601a str r2, [r3, #0] - huart6.Init.BaudRate = 115200; - 8006aba: 4b15 ldr r3, [pc, #84] ; (8006b10 <_ZL19MX_USART6_UART_Initv+0x60>) - 8006abc: f44f 32e1 mov.w r2, #115200 ; 0x1c200 - 8006ac0: 605a str r2, [r3, #4] - huart6.Init.WordLength = UART_WORDLENGTH_8B; - 8006ac2: 4b13 ldr r3, [pc, #76] ; (8006b10 <_ZL19MX_USART6_UART_Initv+0x60>) - 8006ac4: 2200 movs r2, #0 - 8006ac6: 609a str r2, [r3, #8] - huart6.Init.StopBits = UART_STOPBITS_1; - 8006ac8: 4b11 ldr r3, [pc, #68] ; (8006b10 <_ZL19MX_USART6_UART_Initv+0x60>) - 8006aca: 2200 movs r2, #0 - 8006acc: 60da str r2, [r3, #12] - huart6.Init.Parity = UART_PARITY_NONE; - 8006ace: 4b10 ldr r3, [pc, #64] ; (8006b10 <_ZL19MX_USART6_UART_Initv+0x60>) - 8006ad0: 2200 movs r2, #0 - 8006ad2: 611a str r2, [r3, #16] - huart6.Init.Mode = UART_MODE_TX_RX; - 8006ad4: 4b0e ldr r3, [pc, #56] ; (8006b10 <_ZL19MX_USART6_UART_Initv+0x60>) - 8006ad6: 220c movs r2, #12 - 8006ad8: 615a str r2, [r3, #20] - huart6.Init.HwFlowCtl = UART_HWCONTROL_NONE; - 8006ada: 4b0d ldr r3, [pc, #52] ; (8006b10 <_ZL19MX_USART6_UART_Initv+0x60>) - 8006adc: 2200 movs r2, #0 - 8006ade: 619a str r2, [r3, #24] - huart6.Init.OverSampling = UART_OVERSAMPLING_16; - 8006ae0: 4b0b ldr r3, [pc, #44] ; (8006b10 <_ZL19MX_USART6_UART_Initv+0x60>) - 8006ae2: 2200 movs r2, #0 - 8006ae4: 61da str r2, [r3, #28] - huart6.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; - 8006ae6: 4b0a ldr r3, [pc, #40] ; (8006b10 <_ZL19MX_USART6_UART_Initv+0x60>) - 8006ae8: 2200 movs r2, #0 - 8006aea: 621a str r2, [r3, #32] - huart6.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; - 8006aec: 4b08 ldr r3, [pc, #32] ; (8006b10 <_ZL19MX_USART6_UART_Initv+0x60>) - 8006aee: 2200 movs r2, #0 - 8006af0: 625a str r2, [r3, #36] ; 0x24 - if (HAL_UART_Init(&huart6) != HAL_OK) { - 8006af2: 4807 ldr r0, [pc, #28] ; (8006b10 <_ZL19MX_USART6_UART_Initv+0x60>) - 8006af4: f7fc fcf6 bl 80034e4 - 8006af8: 4603 mov r3, r0 - 8006afa: 2b00 cmp r3, #0 - 8006afc: bf14 ite ne - 8006afe: 2301 movne r3, #1 - 8006b00: 2300 moveq r3, #0 - 8006b02: b2db uxtb r3, r3 - 8006b04: 2b00 cmp r3, #0 - 8006b06: d001 beq.n 8006b0c <_ZL19MX_USART6_UART_Initv+0x5c> - Error_Handler(); - 8006b08: f000 fa9a bl 8007040 - } - /* USER CODE BEGIN USART6_Init 2 */ + /* Reset the ETR Bits */ + tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); + 8007668: 697b ldr r3, [r7, #20] + 800766a: f423 437f bic.w r3, r3, #65280 ; 0xff00 + 800766e: 617b str r3, [r7, #20] - /* USER CODE END USART6_Init 2 */ + /* Set the Prescaler, the Filter value and the Polarity */ + tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U))); + 8007670: 683b ldr r3, [r7, #0] + 8007672: 021a lsls r2, r3, #8 + 8007674: 687b ldr r3, [r7, #4] + 8007676: 431a orrs r2, r3 + 8007678: 68bb ldr r3, [r7, #8] + 800767a: 4313 orrs r3, r2 + 800767c: 697a ldr r2, [r7, #20] + 800767e: 4313 orrs r3, r2 + 8007680: 617b str r3, [r7, #20] + /* Write to TIMx SMCR */ + TIMx->SMCR = tmpsmcr; + 8007682: 68fb ldr r3, [r7, #12] + 8007684: 697a ldr r2, [r7, #20] + 8007686: 609a str r2, [r3, #8] } - 8006b0c: bf00 nop - 8006b0e: bd80 pop {r7, pc} - 8006b10: 20000224 .word 0x20000224 - 8006b14: 40011400 .word 0x40011400 + 8007688: bf00 nop + 800768a: 371c adds r7, #28 + 800768c: 46bd mov sp, r7 + 800768e: f85d 7b04 ldr.w r7, [sp], #4 + 8007692: 4770 bx lr -08006b18 <_ZL11MX_DMA_Initv>: +08007694 : + * @param ChannelState specifies the TIM Channel CCxE bit new state. + * This parameter can be: TIM_CCx_ENABLE or TIM_CCx_DISABLE. + * @retval None + */ +void TIM_CCxChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelState) +{ + 8007694: b480 push {r7} + 8007696: b087 sub sp, #28 + 8007698: af00 add r7, sp, #0 + 800769a: 60f8 str r0, [r7, #12] + 800769c: 60b9 str r1, [r7, #8] + 800769e: 607a str r2, [r7, #4] -/** - * Enable DMA controller clock - */ -static void MX_DMA_Init(void) { - 8006b18: b580 push {r7, lr} - 8006b1a: b082 sub sp, #8 - 8006b1c: af00 add r7, sp, #0 - - /* DMA controller clock enable */ - __HAL_RCC_DMA1_CLK_ENABLE(); - 8006b1e: 4b1e ldr r3, [pc, #120] ; (8006b98 <_ZL11MX_DMA_Initv+0x80>) - 8006b20: 6b1b ldr r3, [r3, #48] ; 0x30 - 8006b22: 4a1d ldr r2, [pc, #116] ; (8006b98 <_ZL11MX_DMA_Initv+0x80>) - 8006b24: f443 1300 orr.w r3, r3, #2097152 ; 0x200000 - 8006b28: 6313 str r3, [r2, #48] ; 0x30 - 8006b2a: 4b1b ldr r3, [pc, #108] ; (8006b98 <_ZL11MX_DMA_Initv+0x80>) - 8006b2c: 6b1b ldr r3, [r3, #48] ; 0x30 - 8006b2e: f403 1300 and.w r3, r3, #2097152 ; 0x200000 - 8006b32: 607b str r3, [r7, #4] - 8006b34: 687b ldr r3, [r7, #4] - __HAL_RCC_DMA2_CLK_ENABLE(); - 8006b36: 4b18 ldr r3, [pc, #96] ; (8006b98 <_ZL11MX_DMA_Initv+0x80>) - 8006b38: 6b1b ldr r3, [r3, #48] ; 0x30 - 8006b3a: 4a17 ldr r2, [pc, #92] ; (8006b98 <_ZL11MX_DMA_Initv+0x80>) - 8006b3c: f443 0380 orr.w r3, r3, #4194304 ; 0x400000 - 8006b40: 6313 str r3, [r2, #48] ; 0x30 - 8006b42: 4b15 ldr r3, [pc, #84] ; (8006b98 <_ZL11MX_DMA_Initv+0x80>) - 8006b44: 6b1b ldr r3, [r3, #48] ; 0x30 - 8006b46: f403 0380 and.w r3, r3, #4194304 ; 0x400000 - 8006b4a: 603b str r3, [r7, #0] - 8006b4c: 683b ldr r3, [r7, #0] - - /* DMA interrupt init */ - /* DMA1_Stream1_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(DMA1_Stream1_IRQn, 0, 0); - 8006b4e: 2200 movs r2, #0 - 8006b50: 2100 movs r1, #0 - 8006b52: 200c movs r0, #12 - 8006b54: f7f9 fe31 bl 80007ba - HAL_NVIC_EnableIRQ(DMA1_Stream1_IRQn); - 8006b58: 200c movs r0, #12 - 8006b5a: f7f9 fe4a bl 80007f2 - /* DMA1_Stream3_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(DMA1_Stream3_IRQn, 0, 0); - 8006b5e: 2200 movs r2, #0 - 8006b60: 2100 movs r1, #0 - 8006b62: 200e movs r0, #14 - 8006b64: f7f9 fe29 bl 80007ba - HAL_NVIC_EnableIRQ(DMA1_Stream3_IRQn); - 8006b68: 200e movs r0, #14 - 8006b6a: f7f9 fe42 bl 80007f2 - /* DMA2_Stream1_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(DMA2_Stream1_IRQn, 0, 0); - 8006b6e: 2200 movs r2, #0 - 8006b70: 2100 movs r1, #0 - 8006b72: 2039 movs r0, #57 ; 0x39 - 8006b74: f7f9 fe21 bl 80007ba - HAL_NVIC_EnableIRQ(DMA2_Stream1_IRQn); - 8006b78: 2039 movs r0, #57 ; 0x39 - 8006b7a: f7f9 fe3a bl 80007f2 - /* DMA2_Stream6_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(DMA2_Stream6_IRQn, 0, 0); - 8006b7e: 2200 movs r2, #0 - 8006b80: 2100 movs r1, #0 - 8006b82: 2045 movs r0, #69 ; 0x45 - 8006b84: f7f9 fe19 bl 80007ba - HAL_NVIC_EnableIRQ(DMA2_Stream6_IRQn); - 8006b88: 2045 movs r0, #69 ; 0x45 - 8006b8a: f7f9 fe32 bl 80007f2 + /* Check the parameters */ + assert_param(IS_TIM_CC1_INSTANCE(TIMx)); + assert_param(IS_TIM_CHANNELS(Channel)); -} - 8006b8e: bf00 nop - 8006b90: 3708 adds r7, #8 - 8006b92: 46bd mov sp, r7 - 8006b94: bd80 pop {r7, pc} - 8006b96: bf00 nop - 8006b98: 40023800 .word 0x40023800 - -08006b9c <_ZL12MX_GPIO_Initv>: -/** - * @brief GPIO Initialization Function - * @param None - * @retval None - */ -static void MX_GPIO_Init(void) { - 8006b9c: b580 push {r7, lr} - 8006b9e: b08c sub sp, #48 ; 0x30 - 8006ba0: af00 add r7, sp, #0 - GPIO_InitTypeDef GPIO_InitStruct = { 0 }; - 8006ba2: f107 031c add.w r3, r7, #28 - 8006ba6: 2200 movs r2, #0 - 8006ba8: 601a str r2, [r3, #0] - 8006baa: 605a str r2, [r3, #4] - 8006bac: 609a str r2, [r3, #8] - 8006bae: 60da str r2, [r3, #12] - 8006bb0: 611a str r2, [r3, #16] - - /* GPIO Ports Clock Enable */ - __HAL_RCC_GPIOC_CLK_ENABLE(); - 8006bb2: 4b53 ldr r3, [pc, #332] ; (8006d00 <_ZL12MX_GPIO_Initv+0x164>) - 8006bb4: 6b1b ldr r3, [r3, #48] ; 0x30 - 8006bb6: 4a52 ldr r2, [pc, #328] ; (8006d00 <_ZL12MX_GPIO_Initv+0x164>) - 8006bb8: f043 0304 orr.w r3, r3, #4 - 8006bbc: 6313 str r3, [r2, #48] ; 0x30 - 8006bbe: 4b50 ldr r3, [pc, #320] ; (8006d00 <_ZL12MX_GPIO_Initv+0x164>) - 8006bc0: 6b1b ldr r3, [r3, #48] ; 0x30 - 8006bc2: f003 0304 and.w r3, r3, #4 - 8006bc6: 61bb str r3, [r7, #24] - 8006bc8: 69bb ldr r3, [r7, #24] - __HAL_RCC_GPIOA_CLK_ENABLE(); - 8006bca: 4b4d ldr r3, [pc, #308] ; (8006d00 <_ZL12MX_GPIO_Initv+0x164>) - 8006bcc: 6b1b ldr r3, [r3, #48] ; 0x30 - 8006bce: 4a4c ldr r2, [pc, #304] ; (8006d00 <_ZL12MX_GPIO_Initv+0x164>) - 8006bd0: f043 0301 orr.w r3, r3, #1 - 8006bd4: 6313 str r3, [r2, #48] ; 0x30 - 8006bd6: 4b4a ldr r3, [pc, #296] ; (8006d00 <_ZL12MX_GPIO_Initv+0x164>) - 8006bd8: 6b1b ldr r3, [r3, #48] ; 0x30 - 8006bda: f003 0301 and.w r3, r3, #1 - 8006bde: 617b str r3, [r7, #20] - 8006be0: 697b ldr r3, [r7, #20] - __HAL_RCC_GPIOF_CLK_ENABLE(); - 8006be2: 4b47 ldr r3, [pc, #284] ; (8006d00 <_ZL12MX_GPIO_Initv+0x164>) - 8006be4: 6b1b ldr r3, [r3, #48] ; 0x30 - 8006be6: 4a46 ldr r2, [pc, #280] ; (8006d00 <_ZL12MX_GPIO_Initv+0x164>) - 8006be8: f043 0320 orr.w r3, r3, #32 - 8006bec: 6313 str r3, [r2, #48] ; 0x30 - 8006bee: 4b44 ldr r3, [pc, #272] ; (8006d00 <_ZL12MX_GPIO_Initv+0x164>) - 8006bf0: 6b1b ldr r3, [r3, #48] ; 0x30 - 8006bf2: f003 0320 and.w r3, r3, #32 - 8006bf6: 613b str r3, [r7, #16] - 8006bf8: 693b ldr r3, [r7, #16] - __HAL_RCC_GPIOE_CLK_ENABLE(); - 8006bfa: 4b41 ldr r3, [pc, #260] ; (8006d00 <_ZL12MX_GPIO_Initv+0x164>) - 8006bfc: 6b1b ldr r3, [r3, #48] ; 0x30 - 8006bfe: 4a40 ldr r2, [pc, #256] ; (8006d00 <_ZL12MX_GPIO_Initv+0x164>) - 8006c00: f043 0310 orr.w r3, r3, #16 - 8006c04: 6313 str r3, [r2, #48] ; 0x30 - 8006c06: 4b3e ldr r3, [pc, #248] ; (8006d00 <_ZL12MX_GPIO_Initv+0x164>) - 8006c08: 6b1b ldr r3, [r3, #48] ; 0x30 - 8006c0a: f003 0310 and.w r3, r3, #16 - 8006c0e: 60fb str r3, [r7, #12] - 8006c10: 68fb ldr r3, [r7, #12] - __HAL_RCC_GPIOD_CLK_ENABLE(); - 8006c12: 4b3b ldr r3, [pc, #236] ; (8006d00 <_ZL12MX_GPIO_Initv+0x164>) - 8006c14: 6b1b ldr r3, [r3, #48] ; 0x30 - 8006c16: 4a3a ldr r2, [pc, #232] ; (8006d00 <_ZL12MX_GPIO_Initv+0x164>) - 8006c18: f043 0308 orr.w r3, r3, #8 - 8006c1c: 6313 str r3, [r2, #48] ; 0x30 - 8006c1e: 4b38 ldr r3, [pc, #224] ; (8006d00 <_ZL12MX_GPIO_Initv+0x164>) - 8006c20: 6b1b ldr r3, [r3, #48] ; 0x30 - 8006c22: f003 0308 and.w r3, r3, #8 - 8006c26: 60bb str r3, [r7, #8] - 8006c28: 68bb ldr r3, [r7, #8] - __HAL_RCC_GPIOB_CLK_ENABLE(); - 8006c2a: 4b35 ldr r3, [pc, #212] ; (8006d00 <_ZL12MX_GPIO_Initv+0x164>) - 8006c2c: 6b1b ldr r3, [r3, #48] ; 0x30 - 8006c2e: 4a34 ldr r2, [pc, #208] ; (8006d00 <_ZL12MX_GPIO_Initv+0x164>) - 8006c30: f043 0302 orr.w r3, r3, #2 - 8006c34: 6313 str r3, [r2, #48] ; 0x30 - 8006c36: 4b32 ldr r3, [pc, #200] ; (8006d00 <_ZL12MX_GPIO_Initv+0x164>) - 8006c38: 6b1b ldr r3, [r3, #48] ; 0x30 - 8006c3a: f003 0302 and.w r3, r3, #2 - 8006c3e: 607b str r3, [r7, #4] - 8006c40: 687b ldr r3, [r7, #4] - - /*Configure GPIO pin Output Level */ - HAL_GPIO_WritePin(GPIOF, GPIO_PIN_12 | dir_1_Pin | sleep_2_Pin | sleep_1_Pin, - 8006c42: 2200 movs r2, #0 - 8006c44: f44f 4170 mov.w r1, #61440 ; 0xf000 - 8006c48: 482e ldr r0, [pc, #184] ; (8006d04 <_ZL12MX_GPIO_Initv+0x168>) - 8006c4a: f7fa fb2f bl 80012ac - GPIO_PIN_RESET); - - /*Configure GPIO pin Output Level */ - HAL_GPIO_WritePin(GPIOB, GPIO_PIN_8, GPIO_PIN_RESET); - 8006c4e: 2200 movs r2, #0 - 8006c50: f44f 7180 mov.w r1, #256 ; 0x100 - 8006c54: 482c ldr r0, [pc, #176] ; (8006d08 <_ZL12MX_GPIO_Initv+0x16c>) - 8006c56: f7fa fb29 bl 80012ac - - /*Configure GPIO pin : PC0 */ - GPIO_InitStruct.Pin = GPIO_PIN_0; - 8006c5a: 2301 movs r3, #1 - 8006c5c: 61fb str r3, [r7, #28] - GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; - 8006c5e: 2303 movs r3, #3 - 8006c60: 623b str r3, [r7, #32] - GPIO_InitStruct.Pull = GPIO_NOPULL; - 8006c62: 2300 movs r3, #0 - 8006c64: 627b str r3, [r7, #36] ; 0x24 - HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); - 8006c66: f107 031c add.w r3, r7, #28 - 8006c6a: 4619 mov r1, r3 - 8006c6c: 4827 ldr r0, [pc, #156] ; (8006d0c <_ZL12MX_GPIO_Initv+0x170>) - 8006c6e: f7fa f973 bl 8000f58 - - /*Configure GPIO pin : current_1_Pin */ - GPIO_InitStruct.Pin = current_1_Pin; - 8006c72: 2308 movs r3, #8 - 8006c74: 61fb str r3, [r7, #28] - GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; - 8006c76: 2303 movs r3, #3 - 8006c78: 623b str r3, [r7, #32] - GPIO_InitStruct.Pull = GPIO_NOPULL; - 8006c7a: 2300 movs r3, #0 - 8006c7c: 627b str r3, [r7, #36] ; 0x24 - HAL_GPIO_Init(current_1_GPIO_Port, &GPIO_InitStruct); - 8006c7e: f107 031c add.w r3, r7, #28 - 8006c82: 4619 mov r1, r3 - 8006c84: 4822 ldr r0, [pc, #136] ; (8006d10 <_ZL12MX_GPIO_Initv+0x174>) - 8006c86: f7fa f967 bl 8000f58 - - /*Configure GPIO pin : fault_2_Pin */ - GPIO_InitStruct.Pin = fault_2_Pin; - 8006c8a: 2340 movs r3, #64 ; 0x40 - 8006c8c: 61fb str r3, [r7, #28] - GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - 8006c8e: 2300 movs r3, #0 - 8006c90: 623b str r3, [r7, #32] - GPIO_InitStruct.Pull = GPIO_NOPULL; - 8006c92: 2300 movs r3, #0 - 8006c94: 627b str r3, [r7, #36] ; 0x24 - HAL_GPIO_Init(fault_2_GPIO_Port, &GPIO_InitStruct); - 8006c96: f107 031c add.w r3, r7, #28 - 8006c9a: 4619 mov r1, r3 - 8006c9c: 481c ldr r0, [pc, #112] ; (8006d10 <_ZL12MX_GPIO_Initv+0x174>) - 8006c9e: f7fa f95b bl 8000f58 - - /*Configure GPIO pins : PF12 dir_1_Pin sleep_2_Pin sleep_1_Pin */ - GPIO_InitStruct.Pin = GPIO_PIN_12 | dir_1_Pin | sleep_2_Pin | sleep_1_Pin; - 8006ca2: f44f 4370 mov.w r3, #61440 ; 0xf000 - 8006ca6: 61fb str r3, [r7, #28] - GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - 8006ca8: 2301 movs r3, #1 - 8006caa: 623b str r3, [r7, #32] - GPIO_InitStruct.Pull = GPIO_NOPULL; - 8006cac: 2300 movs r3, #0 - 8006cae: 627b str r3, [r7, #36] ; 0x24 - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8006cb0: 2300 movs r3, #0 - 8006cb2: 62bb str r3, [r7, #40] ; 0x28 - HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); - 8006cb4: f107 031c add.w r3, r7, #28 - 8006cb8: 4619 mov r1, r3 - 8006cba: 4812 ldr r0, [pc, #72] ; (8006d04 <_ZL12MX_GPIO_Initv+0x168>) - 8006cbc: f7fa f94c bl 8000f58 - - /*Configure GPIO pin : fault_1_Pin */ - GPIO_InitStruct.Pin = fault_1_Pin; - 8006cc0: f44f 7300 mov.w r3, #512 ; 0x200 - 8006cc4: 61fb str r3, [r7, #28] - GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - 8006cc6: 2300 movs r3, #0 - 8006cc8: 623b str r3, [r7, #32] - GPIO_InitStruct.Pull = GPIO_NOPULL; - 8006cca: 2300 movs r3, #0 - 8006ccc: 627b str r3, [r7, #36] ; 0x24 - HAL_GPIO_Init(fault_1_GPIO_Port, &GPIO_InitStruct); - 8006cce: f107 031c add.w r3, r7, #28 - 8006cd2: 4619 mov r1, r3 - 8006cd4: 480f ldr r0, [pc, #60] ; (8006d14 <_ZL12MX_GPIO_Initv+0x178>) - 8006cd6: f7fa f93f bl 8000f58 - - /*Configure GPIO pin : PB8 */ - GPIO_InitStruct.Pin = GPIO_PIN_8; - 8006cda: f44f 7380 mov.w r3, #256 ; 0x100 - 8006cde: 61fb str r3, [r7, #28] - GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - 8006ce0: 2301 movs r3, #1 - 8006ce2: 623b str r3, [r7, #32] - GPIO_InitStruct.Pull = GPIO_NOPULL; - 8006ce4: 2300 movs r3, #0 - 8006ce6: 627b str r3, [r7, #36] ; 0x24 - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8006ce8: 2300 movs r3, #0 - 8006cea: 62bb str r3, [r7, #40] ; 0x28 - HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 8006cec: f107 031c add.w r3, r7, #28 - 8006cf0: 4619 mov r1, r3 - 8006cf2: 4805 ldr r0, [pc, #20] ; (8006d08 <_ZL12MX_GPIO_Initv+0x16c>) - 8006cf4: f7fa f930 bl 8000f58 + tmp = TIM_CCER_CC1E << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */ + 80076a0: 68bb ldr r3, [r7, #8] + 80076a2: f003 031f and.w r3, r3, #31 + 80076a6: 2201 movs r2, #1 + 80076a8: fa02 f303 lsl.w r3, r2, r3 + 80076ac: 617b str r3, [r7, #20] + + /* Reset the CCxE Bit */ + TIMx->CCER &= ~tmp; + 80076ae: 68fb ldr r3, [r7, #12] + 80076b0: 6a1a ldr r2, [r3, #32] + 80076b2: 697b ldr r3, [r7, #20] + 80076b4: 43db mvns r3, r3 + 80076b6: 401a ands r2, r3 + 80076b8: 68fb ldr r3, [r7, #12] + 80076ba: 621a str r2, [r3, #32] + /* Set or reset the CCxE Bit */ + TIMx->CCER |= (uint32_t)(ChannelState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */ + 80076bc: 68fb ldr r3, [r7, #12] + 80076be: 6a1a ldr r2, [r3, #32] + 80076c0: 68bb ldr r3, [r7, #8] + 80076c2: f003 031f and.w r3, r3, #31 + 80076c6: 6879 ldr r1, [r7, #4] + 80076c8: fa01 f303 lsl.w r3, r1, r3 + 80076cc: 431a orrs r2, r3 + 80076ce: 68fb ldr r3, [r7, #12] + 80076d0: 621a str r2, [r3, #32] } - 8006cf8: bf00 nop - 8006cfa: 3730 adds r7, #48 ; 0x30 - 8006cfc: 46bd mov sp, r7 - 8006cfe: bd80 pop {r7, pc} - 8006d00: 40023800 .word 0x40023800 - 8006d04: 40021400 .word 0x40021400 - 8006d08: 40020400 .word 0x40020400 - 8006d0c: 40020800 .word 0x40020800 - 8006d10: 40020000 .word 0x40020000 - 8006d14: 40021000 .word 0x40021000 - -08006d18 <_ZN3ros3MsgaSERKS0_>: - 8006d18: b480 push {r7} - 8006d1a: b083 sub sp, #12 - 8006d1c: af00 add r7, sp, #0 - 8006d1e: 6078 str r0, [r7, #4] - 8006d20: 6039 str r1, [r7, #0] - 8006d22: 687b ldr r3, [r7, #4] - 8006d24: 4618 mov r0, r3 - 8006d26: 370c adds r7, #12 - 8006d28: 46bd mov sp, r7 - 8006d2a: f85d 7b04 ldr.w r7, [sp], #4 - 8006d2e: 4770 bx lr - -08006d30 <_ZN8std_msgs6HeaderaSERKS0_>: - class Header : public ros::Msg - 8006d30: b580 push {r7, lr} - 8006d32: b082 sub sp, #8 - 8006d34: af00 add r7, sp, #0 - 8006d36: 6078 str r0, [r7, #4] - 8006d38: 6039 str r1, [r7, #0] - 8006d3a: 687b ldr r3, [r7, #4] - 8006d3c: 683a ldr r2, [r7, #0] - 8006d3e: 4611 mov r1, r2 - 8006d40: 4618 mov r0, r3 - 8006d42: f7ff ffe9 bl 8006d18 <_ZN3ros3MsgaSERKS0_> - 8006d46: 683b ldr r3, [r7, #0] - 8006d48: 685a ldr r2, [r3, #4] - 8006d4a: 687b ldr r3, [r7, #4] - 8006d4c: 605a str r2, [r3, #4] - 8006d4e: 687b ldr r3, [r7, #4] - 8006d50: 683a ldr r2, [r7, #0] - 8006d52: 3308 adds r3, #8 - 8006d54: 3208 adds r2, #8 - 8006d56: e892 0003 ldmia.w r2, {r0, r1} - 8006d5a: e883 0003 stmia.w r3, {r0, r1} - 8006d5e: 683b ldr r3, [r7, #0] - 8006d60: 691a ldr r2, [r3, #16] - 8006d62: 687b ldr r3, [r7, #4] - 8006d64: 611a str r2, [r3, #16] - 8006d66: 687b ldr r3, [r7, #4] - 8006d68: 4618 mov r0, r3 - 8006d6a: 3708 adds r7, #8 - 8006d6c: 46bd mov sp, r7 - 8006d6e: bd80 pop {r7, pc} - -08006d70 <_ZN13geometry_msgs5PointaSERKS0_>: - class Point : public ros::Msg - 8006d70: b580 push {r7, lr} - 8006d72: b082 sub sp, #8 - 8006d74: af00 add r7, sp, #0 - 8006d76: 6078 str r0, [r7, #4] - 8006d78: 6039 str r1, [r7, #0] - 8006d7a: 687b ldr r3, [r7, #4] - 8006d7c: 683a ldr r2, [r7, #0] - 8006d7e: 4611 mov r1, r2 - 8006d80: 4618 mov r0, r3 - 8006d82: f7ff ffc9 bl 8006d18 <_ZN3ros3MsgaSERKS0_> - 8006d86: 683b ldr r3, [r7, #0] - 8006d88: 685a ldr r2, [r3, #4] - 8006d8a: 687b ldr r3, [r7, #4] - 8006d8c: 605a str r2, [r3, #4] - 8006d8e: 683b ldr r3, [r7, #0] - 8006d90: 689a ldr r2, [r3, #8] - 8006d92: 687b ldr r3, [r7, #4] - 8006d94: 609a str r2, [r3, #8] - 8006d96: 683b ldr r3, [r7, #0] - 8006d98: 68da ldr r2, [r3, #12] - 8006d9a: 687b ldr r3, [r7, #4] - 8006d9c: 60da str r2, [r3, #12] - 8006d9e: 687b ldr r3, [r7, #4] - 8006da0: 4618 mov r0, r3 - 8006da2: 3708 adds r7, #8 - 8006da4: 46bd mov sp, r7 - 8006da6: bd80 pop {r7, pc} - -08006da8 <_ZN13geometry_msgs10QuaternionaSERKS0_>: - class Quaternion : public ros::Msg - 8006da8: b580 push {r7, lr} - 8006daa: b082 sub sp, #8 - 8006dac: af00 add r7, sp, #0 - 8006dae: 6078 str r0, [r7, #4] - 8006db0: 6039 str r1, [r7, #0] - 8006db2: 687b ldr r3, [r7, #4] - 8006db4: 683a ldr r2, [r7, #0] - 8006db6: 4611 mov r1, r2 - 8006db8: 4618 mov r0, r3 - 8006dba: f7ff ffad bl 8006d18 <_ZN3ros3MsgaSERKS0_> - 8006dbe: 683b ldr r3, [r7, #0] - 8006dc0: 685a ldr r2, [r3, #4] - 8006dc2: 687b ldr r3, [r7, #4] - 8006dc4: 605a str r2, [r3, #4] - 8006dc6: 683b ldr r3, [r7, #0] - 8006dc8: 689a ldr r2, [r3, #8] - 8006dca: 687b ldr r3, [r7, #4] - 8006dcc: 609a str r2, [r3, #8] - 8006dce: 683b ldr r3, [r7, #0] - 8006dd0: 68da ldr r2, [r3, #12] - 8006dd2: 687b ldr r3, [r7, #4] - 8006dd4: 60da str r2, [r3, #12] - 8006dd6: 683b ldr r3, [r7, #0] - 8006dd8: 691a ldr r2, [r3, #16] - 8006dda: 687b ldr r3, [r7, #4] - 8006ddc: 611a str r2, [r3, #16] - 8006dde: 687b ldr r3, [r7, #4] - 8006de0: 4618 mov r0, r3 - 8006de2: 3708 adds r7, #8 - 8006de4: 46bd mov sp, r7 - 8006de6: bd80 pop {r7, pc} - -08006de8 <_ZN13geometry_msgs4PoseaSERKS0_>: - class Pose : public ros::Msg - 8006de8: b580 push {r7, lr} - 8006dea: b082 sub sp, #8 - 8006dec: af00 add r7, sp, #0 - 8006dee: 6078 str r0, [r7, #4] - 8006df0: 6039 str r1, [r7, #0] - 8006df2: 687b ldr r3, [r7, #4] - 8006df4: 683a ldr r2, [r7, #0] - 8006df6: 4611 mov r1, r2 - 8006df8: 4618 mov r0, r3 - 8006dfa: f7ff ff8d bl 8006d18 <_ZN3ros3MsgaSERKS0_> - 8006dfe: 687b ldr r3, [r7, #4] - 8006e00: 1d1a adds r2, r3, #4 - 8006e02: 683b ldr r3, [r7, #0] - 8006e04: 3304 adds r3, #4 - 8006e06: 4619 mov r1, r3 - 8006e08: 4610 mov r0, r2 - 8006e0a: f7ff ffb1 bl 8006d70 <_ZN13geometry_msgs5PointaSERKS0_> - 8006e0e: 687b ldr r3, [r7, #4] - 8006e10: f103 0214 add.w r2, r3, #20 - 8006e14: 683b ldr r3, [r7, #0] - 8006e16: 3314 adds r3, #20 - 8006e18: 4619 mov r1, r3 - 8006e1a: 4610 mov r0, r2 - 8006e1c: f7ff ffc4 bl 8006da8 <_ZN13geometry_msgs10QuaternionaSERKS0_> - 8006e20: 687b ldr r3, [r7, #4] - 8006e22: 4618 mov r0, r3 - 8006e24: 3708 adds r7, #8 - 8006e26: 46bd mov sp, r7 - 8006e28: bd80 pop {r7, pc} - -08006e2a <_ZN13geometry_msgs18PoseWithCovarianceaSERKS0_>: - class PoseWithCovariance : public ros::Msg - 8006e2a: b580 push {r7, lr} - 8006e2c: b082 sub sp, #8 - 8006e2e: af00 add r7, sp, #0 - 8006e30: 6078 str r0, [r7, #4] - 8006e32: 6039 str r1, [r7, #0] - 8006e34: 687b ldr r3, [r7, #4] - 8006e36: 683a ldr r2, [r7, #0] - 8006e38: 4611 mov r1, r2 - 8006e3a: 4618 mov r0, r3 - 8006e3c: f7ff ff6c bl 8006d18 <_ZN3ros3MsgaSERKS0_> - 8006e40: 687b ldr r3, [r7, #4] - 8006e42: 1d1a adds r2, r3, #4 - 8006e44: 683b ldr r3, [r7, #0] - 8006e46: 3304 adds r3, #4 - 8006e48: 4619 mov r1, r3 - 8006e4a: 4610 mov r0, r2 - 8006e4c: f7ff ffcc bl 8006de8 <_ZN13geometry_msgs4PoseaSERKS0_> - 8006e50: 687b ldr r3, [r7, #4] - 8006e52: f103 012c add.w r1, r3, #44 ; 0x2c - 8006e56: 2223 movs r2, #35 ; 0x23 - 8006e58: 683b ldr r3, [r7, #0] - 8006e5a: 332c adds r3, #44 ; 0x2c - 8006e5c: 2a00 cmp r2, #0 - 8006e5e: db05 blt.n 8006e6c <_ZN13geometry_msgs18PoseWithCovarianceaSERKS0_+0x42> - 8006e60: 6818 ldr r0, [r3, #0] - 8006e62: 6008 str r0, [r1, #0] - 8006e64: 3104 adds r1, #4 - 8006e66: 3304 adds r3, #4 - 8006e68: 3a01 subs r2, #1 - 8006e6a: e7f7 b.n 8006e5c <_ZN13geometry_msgs18PoseWithCovarianceaSERKS0_+0x32> - 8006e6c: 687b ldr r3, [r7, #4] - 8006e6e: 4618 mov r0, r3 - 8006e70: 3708 adds r7, #8 - 8006e72: 46bd mov sp, r7 - 8006e74: bd80 pop {r7, pc} - -08006e76 <_ZN13geometry_msgs7Vector3aSERKS0_>: - class Vector3 : public ros::Msg - 8006e76: b580 push {r7, lr} - 8006e78: b082 sub sp, #8 - 8006e7a: af00 add r7, sp, #0 - 8006e7c: 6078 str r0, [r7, #4] - 8006e7e: 6039 str r1, [r7, #0] - 8006e80: 687b ldr r3, [r7, #4] - 8006e82: 683a ldr r2, [r7, #0] - 8006e84: 4611 mov r1, r2 - 8006e86: 4618 mov r0, r3 - 8006e88: f7ff ff46 bl 8006d18 <_ZN3ros3MsgaSERKS0_> - 8006e8c: 683b ldr r3, [r7, #0] - 8006e8e: 685a ldr r2, [r3, #4] - 8006e90: 687b ldr r3, [r7, #4] - 8006e92: 605a str r2, [r3, #4] - 8006e94: 683b ldr r3, [r7, #0] - 8006e96: 689a ldr r2, [r3, #8] - 8006e98: 687b ldr r3, [r7, #4] - 8006e9a: 609a str r2, [r3, #8] - 8006e9c: 683b ldr r3, [r7, #0] - 8006e9e: 68da ldr r2, [r3, #12] - 8006ea0: 687b ldr r3, [r7, #4] - 8006ea2: 60da str r2, [r3, #12] - 8006ea4: 687b ldr r3, [r7, #4] - 8006ea6: 4618 mov r0, r3 - 8006ea8: 3708 adds r7, #8 - 8006eaa: 46bd mov sp, r7 - 8006eac: bd80 pop {r7, pc} - -08006eae <_ZN13geometry_msgs5TwistaSERKS0_>: - class Twist : public ros::Msg - 8006eae: b580 push {r7, lr} - 8006eb0: b082 sub sp, #8 - 8006eb2: af00 add r7, sp, #0 - 8006eb4: 6078 str r0, [r7, #4] - 8006eb6: 6039 str r1, [r7, #0] - 8006eb8: 687b ldr r3, [r7, #4] - 8006eba: 683a ldr r2, [r7, #0] - 8006ebc: 4611 mov r1, r2 - 8006ebe: 4618 mov r0, r3 - 8006ec0: f7ff ff2a bl 8006d18 <_ZN3ros3MsgaSERKS0_> - 8006ec4: 687b ldr r3, [r7, #4] - 8006ec6: 1d1a adds r2, r3, #4 - 8006ec8: 683b ldr r3, [r7, #0] - 8006eca: 3304 adds r3, #4 - 8006ecc: 4619 mov r1, r3 - 8006ece: 4610 mov r0, r2 - 8006ed0: f7ff ffd1 bl 8006e76 <_ZN13geometry_msgs7Vector3aSERKS0_> - 8006ed4: 687b ldr r3, [r7, #4] - 8006ed6: f103 0214 add.w r2, r3, #20 - 8006eda: 683b ldr r3, [r7, #0] - 8006edc: 3314 adds r3, #20 - 8006ede: 4619 mov r1, r3 - 8006ee0: 4610 mov r0, r2 - 8006ee2: f7ff ffc8 bl 8006e76 <_ZN13geometry_msgs7Vector3aSERKS0_> - 8006ee6: 687b ldr r3, [r7, #4] - 8006ee8: 4618 mov r0, r3 - 8006eea: 3708 adds r7, #8 - 8006eec: 46bd mov sp, r7 - 8006eee: bd80 pop {r7, pc} - -08006ef0 <_ZN13geometry_msgs19TwistWithCovarianceaSERKS0_>: - class TwistWithCovariance : public ros::Msg - 8006ef0: b580 push {r7, lr} - 8006ef2: b082 sub sp, #8 - 8006ef4: af00 add r7, sp, #0 - 8006ef6: 6078 str r0, [r7, #4] - 8006ef8: 6039 str r1, [r7, #0] - 8006efa: 687b ldr r3, [r7, #4] - 8006efc: 683a ldr r2, [r7, #0] - 8006efe: 4611 mov r1, r2 - 8006f00: 4618 mov r0, r3 - 8006f02: f7ff ff09 bl 8006d18 <_ZN3ros3MsgaSERKS0_> - 8006f06: 687b ldr r3, [r7, #4] - 8006f08: 1d1a adds r2, r3, #4 - 8006f0a: 683b ldr r3, [r7, #0] - 8006f0c: 3304 adds r3, #4 - 8006f0e: 4619 mov r1, r3 - 8006f10: 4610 mov r0, r2 - 8006f12: f7ff ffcc bl 8006eae <_ZN13geometry_msgs5TwistaSERKS0_> - 8006f16: 687b ldr r3, [r7, #4] - 8006f18: f103 0128 add.w r1, r3, #40 ; 0x28 - 8006f1c: 2223 movs r2, #35 ; 0x23 - 8006f1e: 683b ldr r3, [r7, #0] - 8006f20: 3328 adds r3, #40 ; 0x28 - 8006f22: 2a00 cmp r2, #0 - 8006f24: db05 blt.n 8006f32 <_ZN13geometry_msgs19TwistWithCovarianceaSERKS0_+0x42> - 8006f26: 6818 ldr r0, [r3, #0] - 8006f28: 6008 str r0, [r1, #0] - 8006f2a: 3104 adds r1, #4 - 8006f2c: 3304 adds r3, #4 - 8006f2e: 3a01 subs r2, #1 - 8006f30: e7f7 b.n 8006f22 <_ZN13geometry_msgs19TwistWithCovarianceaSERKS0_+0x32> - 8006f32: 687b ldr r3, [r7, #4] - 8006f34: 4618 mov r0, r3 - 8006f36: 3708 adds r7, #8 - 8006f38: 46bd mov sp, r7 - 8006f3a: bd80 pop {r7, pc} - -08006f3c <_ZN8nav_msgs8OdometryaSERKS0_>: - class Odometry : public ros::Msg - 8006f3c: b580 push {r7, lr} - 8006f3e: b082 sub sp, #8 - 8006f40: af00 add r7, sp, #0 - 8006f42: 6078 str r0, [r7, #4] - 8006f44: 6039 str r1, [r7, #0] - 8006f46: 687b ldr r3, [r7, #4] - 8006f48: 683a ldr r2, [r7, #0] - 8006f4a: 4611 mov r1, r2 - 8006f4c: 4618 mov r0, r3 - 8006f4e: f7ff fee3 bl 8006d18 <_ZN3ros3MsgaSERKS0_> - 8006f52: 687b ldr r3, [r7, #4] - 8006f54: 1d1a adds r2, r3, #4 - 8006f56: 683b ldr r3, [r7, #0] - 8006f58: 3304 adds r3, #4 - 8006f5a: 4619 mov r1, r3 - 8006f5c: 4610 mov r0, r2 - 8006f5e: f7ff fee7 bl 8006d30 <_ZN8std_msgs6HeaderaSERKS0_> - 8006f62: 683b ldr r3, [r7, #0] - 8006f64: 699a ldr r2, [r3, #24] - 8006f66: 687b ldr r3, [r7, #4] - 8006f68: 619a str r2, [r3, #24] - 8006f6a: 687b ldr r3, [r7, #4] - 8006f6c: f103 021c add.w r2, r3, #28 - 8006f70: 683b ldr r3, [r7, #0] - 8006f72: 331c adds r3, #28 - 8006f74: 4619 mov r1, r3 - 8006f76: 4610 mov r0, r2 - 8006f78: f7ff ff57 bl 8006e2a <_ZN13geometry_msgs18PoseWithCovarianceaSERKS0_> - 8006f7c: 687b ldr r3, [r7, #4] - 8006f7e: f103 02d8 add.w r2, r3, #216 ; 0xd8 - 8006f82: 683b ldr r3, [r7, #0] - 8006f84: 33d8 adds r3, #216 ; 0xd8 - 8006f86: 4619 mov r1, r3 - 8006f88: 4610 mov r0, r2 - 8006f8a: f7ff ffb1 bl 8006ef0 <_ZN13geometry_msgs19TwistWithCovarianceaSERKS0_> - 8006f8e: 687b ldr r3, [r7, #4] - 8006f90: 4618 mov r0, r3 - 8006f92: 3708 adds r7, #8 - 8006f94: 46bd mov sp, r7 - 8006f96: bd80 pop {r7, pc} - -08006f98 : + 80076d2: bf00 nop + 80076d4: 371c adds r7, #28 + 80076d6: 46bd mov sp, r7 + 80076d8: f85d 7b04 ldr.w r7, [sp], #4 + 80076dc: 4770 bx lr + ... -/* USER CODE BEGIN 4 */ -void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) { - 8006f98: b580 push {r7, lr} - 8006f9a: b082 sub sp, #8 - 8006f9c: af00 add r7, sp, #0 - 8006f9e: 6078 str r0, [r7, #4] - if (htim->Instance == TIM3) { - 8006fa0: 687b ldr r3, [r7, #4] - 8006fa2: 681b ldr r3, [r3, #0] - 8006fa4: 4a0c ldr r2, [pc, #48] ; (8006fd8 ) - 8006fa6: 4293 cmp r3, r2 - 8006fa8: d111 bne.n 8006fce -// velocity_l = left_encoder.GetLinearVelocity(); -// velocity_r = right_encoder.GetLinearVelocity(); -// delta_r = right_encoder.current_millis_ - right_encoder.previous_millis_; -// delta_l = left_encoder.current_millis_ - left_encoder.previous_millis_; - - odom.OdometryUpdateMessage(); - 8006faa: 480c ldr r0, [pc, #48] ; (8006fdc ) - 8006fac: f000 fe65 bl 8007c7a <_ZN12OdometryCalc21OdometryUpdateMessageEv> - odometry = odom.odometry_; - 8006fb0: 490b ldr r1, [pc, #44] ; (8006fe0 ) - 8006fb2: 480c ldr r0, [pc, #48] ; (8006fe4 ) - 8006fb4: f7ff ffc2 bl 8006f3c <_ZN8nav_msgs8OdometryaSERKS0_> - odom_pub.publish(&odometry); - 8006fb8: 490a ldr r1, [pc, #40] ; (8006fe4 ) - 8006fba: 480b ldr r0, [pc, #44] ; (8006fe8 ) - 8006fbc: f7ff f90b bl 80061d6 <_ZN3ros9Publisher7publishEPKNS_3MsgE> - - chatter.publish(&str_msg); - 8006fc0: 490a ldr r1, [pc, #40] ; (8006fec ) - 8006fc2: 480b ldr r0, [pc, #44] ; (8006ff0 ) - 8006fc4: f7ff f907 bl 80061d6 <_ZN3ros9Publisher7publishEPKNS_3MsgE> - nh.spinOnce(); - 8006fc8: 480a ldr r0, [pc, #40] ; (8006ff4 ) - 8006fca: f000 f960 bl 800728e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv> - - //HAL_UART_Transmit(&huart3, (uint8_t*)hello, strlen(hello), 100); +080076e0 : + * mode. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, + TIM_MasterConfigTypeDef *sMasterConfig) +{ + 80076e0: b480 push {r7} + 80076e2: b085 sub sp, #20 + 80076e4: af00 add r7, sp, #0 + 80076e6: 6078 str r0, [r7, #4] + 80076e8: 6039 str r1, [r7, #0] + assert_param(IS_TIM_SYNCHRO_INSTANCE(htim->Instance)); + assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); + assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); - } -} - 8006fce: bf00 nop - 8006fd0: 3708 adds r7, #8 - 8006fd2: 46bd mov sp, r7 - 8006fd4: bd80 pop {r7, pc} - 8006fd6: bf00 nop - 8006fd8: 40000400 .word 0x40000400 - 8006fdc: 2000045c .word 0x2000045c - 8006fe0: 20000498 .word 0x20000498 - 8006fe4: 20000cf0 .word 0x20000cf0 - 8006fe8: 20000e94 .word 0x20000e94 - 8006fec: 20000ce8 .word 0x20000ce8 - 8006ff0: 20000e80 .word 0x20000e80 - 8006ff4: 2000062c .word 0x2000062c - -08006ff8 : + /* Check input state */ + __HAL_LOCK(htim); + 80076ea: 687b ldr r3, [r7, #4] + 80076ec: f893 303c ldrb.w r3, [r3, #60] ; 0x3c + 80076f0: 2b01 cmp r3, #1 + 80076f2: d101 bne.n 80076f8 + 80076f4: 2302 movs r3, #2 + 80076f6: e045 b.n 8007784 + 80076f8: 687b ldr r3, [r7, #4] + 80076fa: 2201 movs r2, #1 + 80076fc: f883 203c strb.w r2, [r3, #60] ; 0x3c -void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) { - 8006ff8: b580 push {r7, lr} - 8006ffa: b082 sub sp, #8 - 8006ffc: af00 add r7, sp, #0 - 8006ffe: 6078 str r0, [r7, #4] - nh.getHardware()->flush(); - 8007000: 4805 ldr r0, [pc, #20] ; (8007018 ) - 8007002: f000 fb20 bl 8007646 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE11getHardwareEv> - 8007006: 4603 mov r3, r0 - 8007008: 4618 mov r0, r3 - 800700a: f7ff f97b bl 8006304 <_ZN13STM32Hardware5flushEv> -} - 800700e: bf00 nop - 8007010: 3708 adds r7, #8 - 8007012: 46bd mov sp, r7 - 8007014: bd80 pop {r7, pc} - 8007016: bf00 nop - 8007018: 2000062c .word 0x2000062c + /* Change the handler state */ + htim->State = HAL_TIM_STATE_BUSY; + 8007700: 687b ldr r3, [r7, #4] + 8007702: 2202 movs r2, #2 + 8007704: f883 203d strb.w r2, [r3, #61] ; 0x3d -0800701c : + /* Get the TIMx CR2 register value */ + tmpcr2 = htim->Instance->CR2; + 8007708: 687b ldr r3, [r7, #4] + 800770a: 681b ldr r3, [r3, #0] + 800770c: 685b ldr r3, [r3, #4] + 800770e: 60fb str r3, [r7, #12] -void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) { - 800701c: b580 push {r7, lr} - 800701e: b082 sub sp, #8 - 8007020: af00 add r7, sp, #0 - 8007022: 6078 str r0, [r7, #4] - nh.getHardware()->reset_rbuf(); - 8007024: 4805 ldr r0, [pc, #20] ; (800703c ) - 8007026: f000 fb0e bl 8007646 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE11getHardwareEv> - 800702a: 4603 mov r3, r0 - 800702c: 4618 mov r0, r3 - 800702e: f7ff f92c bl 800628a <_ZN13STM32Hardware10reset_rbufEv> -} - 8007032: bf00 nop - 8007034: 3708 adds r7, #8 - 8007036: 46bd mov sp, r7 - 8007038: bd80 pop {r7, pc} - 800703a: bf00 nop - 800703c: 2000062c .word 0x2000062c + /* Get the TIMx SMCR register value */ + tmpsmcr = htim->Instance->SMCR; + 8007710: 687b ldr r3, [r7, #4] + 8007712: 681b ldr r3, [r3, #0] + 8007714: 689b ldr r3, [r3, #8] + 8007716: 60bb str r3, [r7, #8] -08007040 : + /* If the timer supports ADC synchronization through TRGO2, set the master mode selection 2 */ + if (IS_TIM_TRGO2_INSTANCE(htim->Instance)) + 8007718: 687b ldr r3, [r7, #4] + 800771a: 681b ldr r3, [r3, #0] + 800771c: 4a1c ldr r2, [pc, #112] ; (8007790 ) + 800771e: 4293 cmp r3, r2 + 8007720: d004 beq.n 800772c + 8007722: 687b ldr r3, [r7, #4] + 8007724: 681b ldr r3, [r3, #0] + 8007726: 4a1b ldr r2, [pc, #108] ; (8007794 ) + 8007728: 4293 cmp r3, r2 + 800772a: d108 bne.n 800773e + { + /* Check the parameters */ + assert_param(IS_TIM_TRGO2_SOURCE(sMasterConfig->MasterOutputTrigger2)); -/** - * @brief This function is executed in case of error occurrence. - * @retval None - */ -void Error_Handler(void) { - 8007040: b480 push {r7} - 8007042: af00 add r7, sp, #0 - /* USER CODE BEGIN Error_Handler_Debug */ - /* User can add his own implementation to report the HAL error return state */ + /* Clear the MMS2 bits */ + tmpcr2 &= ~TIM_CR2_MMS2; + 800772c: 68fb ldr r3, [r7, #12] + 800772e: f423 0370 bic.w r3, r3, #15728640 ; 0xf00000 + 8007732: 60fb str r3, [r7, #12] + /* Select the TRGO2 source*/ + tmpcr2 |= sMasterConfig->MasterOutputTrigger2; + 8007734: 683b ldr r3, [r7, #0] + 8007736: 685b ldr r3, [r3, #4] + 8007738: 68fa ldr r2, [r7, #12] + 800773a: 4313 orrs r3, r2 + 800773c: 60fb str r3, [r7, #12] + } - /* USER CODE END Error_Handler_Debug */ -} - 8007044: bf00 nop - 8007046: 46bd mov sp, r7 - 8007048: f85d 7b04 ldr.w r7, [sp], #4 - 800704c: 4770 bx lr + /* Reset the MMS Bits */ + tmpcr2 &= ~TIM_CR2_MMS; + 800773e: 68fb ldr r3, [r7, #12] + 8007740: f023 0370 bic.w r3, r3, #112 ; 0x70 + 8007744: 60fb str r3, [r7, #12] + /* Select the TRGO source */ + tmpcr2 |= sMasterConfig->MasterOutputTrigger; + 8007746: 683b ldr r3, [r7, #0] + 8007748: 681b ldr r3, [r3, #0] + 800774a: 68fa ldr r2, [r7, #12] + 800774c: 4313 orrs r3, r2 + 800774e: 60fb str r3, [r7, #12] -0800704e <_ZN3ros3Msg8varToArrIPhmEEvT_T0_>: + /* Reset the MSM Bit */ + tmpsmcr &= ~TIM_SMCR_MSM; + 8007750: 68bb ldr r3, [r7, #8] + 8007752: f023 0380 bic.w r3, r3, #128 ; 0x80 + 8007756: 60bb str r3, [r7, #8] + /* Set master mode */ + tmpsmcr |= sMasterConfig->MasterSlaveMode; + 8007758: 683b ldr r3, [r7, #0] + 800775a: 689b ldr r3, [r3, #8] + 800775c: 68ba ldr r2, [r7, #8] + 800775e: 4313 orrs r3, r2 + 8007760: 60bb str r3, [r7, #8] - // Copy data from variable into a byte array - template - static void varToArr(A arr, const V var) - 800704e: b480 push {r7} - 8007050: b085 sub sp, #20 - 8007052: af00 add r7, sp, #0 - 8007054: 6078 str r0, [r7, #4] - 8007056: 6039 str r1, [r7, #0] - { - for (size_t i = 0; i < sizeof(V); i++) - 8007058: 2300 movs r3, #0 - 800705a: 60fb str r3, [r7, #12] - 800705c: 68fb ldr r3, [r7, #12] - 800705e: 2b03 cmp r3, #3 - 8007060: d80d bhi.n 800707e <_ZN3ros3Msg8varToArrIPhmEEvT_T0_+0x30> - arr[i] = (var >> (8 * i)); - 8007062: 68fb ldr r3, [r7, #12] - 8007064: 00db lsls r3, r3, #3 - 8007066: 683a ldr r2, [r7, #0] - 8007068: fa22 f103 lsr.w r1, r2, r3 - 800706c: 687a ldr r2, [r7, #4] - 800706e: 68fb ldr r3, [r7, #12] - 8007070: 4413 add r3, r2 - 8007072: b2ca uxtb r2, r1 - 8007074: 701a strb r2, [r3, #0] - for (size_t i = 0; i < sizeof(V); i++) - 8007076: 68fb ldr r3, [r7, #12] - 8007078: 3301 adds r3, #1 - 800707a: 60fb str r3, [r7, #12] - 800707c: e7ee b.n 800705c <_ZN3ros3Msg8varToArrIPhmEEvT_T0_+0xe> - } - 800707e: bf00 nop - 8007080: 3714 adds r7, #20 - 8007082: 46bd mov sp, r7 - 8007084: f85d 7b04 ldr.w r7, [sp], #4 - 8007088: 4770 bx lr + /* Update TIMx CR2 */ + htim->Instance->CR2 = tmpcr2; + 8007762: 687b ldr r3, [r7, #4] + 8007764: 681b ldr r3, [r3, #0] + 8007766: 68fa ldr r2, [r7, #12] + 8007768: 605a str r2, [r3, #4] -0800708a <_ZN3ros3Msg8arrToVarImPhEEvRT_T0_>: + /* Update TIMx SMCR */ + htim->Instance->SMCR = tmpsmcr; + 800776a: 687b ldr r3, [r7, #4] + 800776c: 681b ldr r3, [r3, #0] + 800776e: 68ba ldr r2, [r7, #8] + 8007770: 609a str r2, [r3, #8] - // Copy data from a byte array into variable - template - static void arrToVar(V& var, const A arr) - 800708a: b480 push {r7} - 800708c: b085 sub sp, #20 - 800708e: af00 add r7, sp, #0 - 8007090: 6078 str r0, [r7, #4] - 8007092: 6039 str r1, [r7, #0] - { - var = 0; - 8007094: 687b ldr r3, [r7, #4] - 8007096: 2200 movs r2, #0 - 8007098: 601a str r2, [r3, #0] - for (size_t i = 0; i < sizeof(V); i++) - 800709a: 2300 movs r3, #0 - 800709c: 60fb str r3, [r7, #12] - 800709e: 68fb ldr r3, [r7, #12] - 80070a0: 2b03 cmp r3, #3 - 80070a2: d811 bhi.n 80070c8 <_ZN3ros3Msg8arrToVarImPhEEvRT_T0_+0x3e> - var |= (arr[i] << (8 * i)); - 80070a4: 687b ldr r3, [r7, #4] - 80070a6: 681b ldr r3, [r3, #0] - 80070a8: 6839 ldr r1, [r7, #0] - 80070aa: 68fa ldr r2, [r7, #12] - 80070ac: 440a add r2, r1 - 80070ae: 7812 ldrb r2, [r2, #0] - 80070b0: 4611 mov r1, r2 - 80070b2: 68fa ldr r2, [r7, #12] - 80070b4: 00d2 lsls r2, r2, #3 - 80070b6: fa01 f202 lsl.w r2, r1, r2 - 80070ba: 431a orrs r2, r3 - 80070bc: 687b ldr r3, [r7, #4] - 80070be: 601a str r2, [r3, #0] - for (size_t i = 0; i < sizeof(V); i++) - 80070c0: 68fb ldr r3, [r7, #12] - 80070c2: 3301 adds r3, #1 - 80070c4: 60fb str r3, [r7, #12] - 80070c6: e7ea b.n 800709e <_ZN3ros3Msg8arrToVarImPhEEvRT_T0_+0x14> - } - 80070c8: bf00 nop - 80070ca: 3714 adds r7, #20 - 80070cc: 46bd mov sp, r7 - 80070ce: f85d 7b04 ldr.w r7, [sp], #4 - 80070d2: 4770 bx lr + /* Change the htim state */ + htim->State = HAL_TIM_STATE_READY; + 8007772: 687b ldr r3, [r7, #4] + 8007774: 2201 movs r2, #1 + 8007776: f883 203d strb.w r2, [r3, #61] ; 0x3d -080070d4 <_ZN3ros15NodeHandleBase_C1Ev>: -#include "ros/msg.h" + __HAL_UNLOCK(htim); + 800777a: 687b ldr r3, [r7, #4] + 800777c: 2200 movs r2, #0 + 800777e: f883 203c strb.w r2, [r3, #60] ; 0x3c -namespace ros + return HAL_OK; + 8007782: 2300 movs r3, #0 +} + 8007784: 4618 mov r0, r3 + 8007786: 3714 adds r7, #20 + 8007788: 46bd mov sp, r7 + 800778a: f85d 7b04 ldr.w r7, [sp], #4 + 800778e: 4770 bx lr + 8007790: 40010000 .word 0x40010000 + 8007794: 40010400 .word 0x40010400 + +08007798 : + * @brief Hall commutation changed callback in non-blocking mode + * @param htim TIM handle + * @retval None + */ +__weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim) { + 8007798: b480 push {r7} + 800779a: b083 sub sp, #12 + 800779c: af00 add r7, sp, #0 + 800779e: 6078 str r0, [r7, #4] + UNUSED(htim); -class NodeHandleBase_ - 80070d4: b480 push {r7} - 80070d6: b083 sub sp, #12 - 80070d8: af00 add r7, sp, #0 - 80070da: 6078 str r0, [r7, #4] - 80070dc: 4a04 ldr r2, [pc, #16] ; (80070f0 <_ZN3ros15NodeHandleBase_C1Ev+0x1c>) - 80070de: 687b ldr r3, [r7, #4] - 80070e0: 601a str r2, [r3, #0] - 80070e2: 687b ldr r3, [r7, #4] - 80070e4: 4618 mov r0, r3 - 80070e6: 370c adds r7, #12 - 80070e8: 46bd mov sp, r7 - 80070ea: f85d 7b04 ldr.w r7, [sp], #4 - 80070ee: 4770 bx lr - 80070f0: 0800a46c .word 0x0800a46c - -080070f4 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev>: - - /* - * Setup Functions + /* NOTE : This function should not be modified, when the callback is needed, + the HAL_TIMEx_CommutCallback could be implemented in the user file */ -public: - NodeHandle_() : configured_(false) - 80070f4: b580 push {r7, lr} - 80070f6: b086 sub sp, #24 - 80070f8: af00 add r7, sp, #0 - 80070fa: 6078 str r0, [r7, #4] - 80070fc: 687b ldr r3, [r7, #4] - 80070fe: 4618 mov r0, r3 - 8007100: f7ff ffe8 bl 80070d4 <_ZN3ros15NodeHandleBase_C1Ev> - 8007104: 4a3a ldr r2, [pc, #232] ; (80071f0 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev+0xfc>) - 8007106: 687b ldr r3, [r7, #4] - 8007108: 601a str r2, [r3, #0] - 800710a: 687b ldr r3, [r7, #4] - 800710c: 3304 adds r3, #4 - 800710e: 4618 mov r0, r3 - 8007110: f7ff f894 bl 800623c <_ZN13STM32HardwareC1Ev> - 8007114: 687b ldr r3, [r7, #4] - 8007116: 2200 movs r2, #0 - 8007118: f883 2680 strb.w r2, [r3, #1664] ; 0x680 - 800711c: 687b ldr r3, [r7, #4] - 800711e: f203 6394 addw r3, r3, #1684 ; 0x694 - 8007122: 4618 mov r0, r3 - 8007124: f7fe fd7e bl 8005c24 <_ZN14rosserial_msgs20RequestParamResponseC1Ev> - { - - for (unsigned int i = 0; i < MAX_PUBLISHERS; i++) - 8007128: 2300 movs r3, #0 - 800712a: 617b str r3, [r7, #20] - 800712c: 697b ldr r3, [r7, #20] - 800712e: 2b18 cmp r3, #24 - 8007130: d80b bhi.n 800714a <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev+0x56> - publishers[i] = 0; - 8007132: 687a ldr r2, [r7, #4] - 8007134: 697b ldr r3, [r7, #20] - 8007136: f503 73b4 add.w r3, r3, #360 ; 0x168 - 800713a: 009b lsls r3, r3, #2 - 800713c: 4413 add r3, r2 - 800713e: 2200 movs r2, #0 - 8007140: 605a str r2, [r3, #4] - for (unsigned int i = 0; i < MAX_PUBLISHERS; i++) - 8007142: 697b ldr r3, [r7, #20] - 8007144: 3301 adds r3, #1 - 8007146: 617b str r3, [r7, #20] - 8007148: e7f0 b.n 800712c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev+0x38> +} + 80077a0: bf00 nop + 80077a2: 370c adds r7, #12 + 80077a4: 46bd mov sp, r7 + 80077a6: f85d 7b04 ldr.w r7, [sp], #4 + 80077aa: 4770 bx lr - for (unsigned int i = 0; i < MAX_SUBSCRIBERS; i++) - 800714a: 2300 movs r3, #0 - 800714c: 613b str r3, [r7, #16] - 800714e: 693b ldr r3, [r7, #16] - 8007150: 2b18 cmp r3, #24 - 8007152: d80a bhi.n 800716a <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev+0x76> - subscribers[i] = 0; - 8007154: 687b ldr r3, [r7, #4] - 8007156: 693a ldr r2, [r7, #16] - 8007158: f502 72c1 add.w r2, r2, #386 ; 0x182 - 800715c: 2100 movs r1, #0 - 800715e: f843 1022 str.w r1, [r3, r2, lsl #2] - for (unsigned int i = 0; i < MAX_SUBSCRIBERS; i++) - 8007162: 693b ldr r3, [r7, #16] - 8007164: 3301 adds r3, #1 - 8007166: 613b str r3, [r7, #16] - 8007168: e7f1 b.n 800714e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev+0x5a> +080077ac : + * @brief Hall Break detection callback in non-blocking mode + * @param htim TIM handle + * @retval None + */ +__weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) +{ + 80077ac: b480 push {r7} + 80077ae: b083 sub sp, #12 + 80077b0: af00 add r7, sp, #0 + 80077b2: 6078 str r0, [r7, #4] + UNUSED(htim); - for (unsigned int i = 0; i < INPUT_SIZE; i++) - 800716a: 2300 movs r3, #0 - 800716c: 60fb str r3, [r7, #12] - 800716e: 68fb ldr r3, [r7, #12] - 8007170: f5b3 7f00 cmp.w r3, #512 ; 0x200 - 8007174: d20a bcs.n 800718c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev+0x98> - message_in[i] = 0; - 8007176: 687a ldr r2, [r7, #4] - 8007178: 68fb ldr r3, [r7, #12] - 800717a: 4413 add r3, r2 - 800717c: f503 73d2 add.w r3, r3, #420 ; 0x1a4 - 8007180: 2200 movs r2, #0 - 8007182: 701a strb r2, [r3, #0] - for (unsigned int i = 0; i < INPUT_SIZE; i++) - 8007184: 68fb ldr r3, [r7, #12] - 8007186: 3301 adds r3, #1 - 8007188: 60fb str r3, [r7, #12] - 800718a: e7f0 b.n 800716e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev+0x7a> + /* NOTE : This function should not be modified, when the callback is needed, + the HAL_TIMEx_BreakCallback could be implemented in the user file + */ +} + 80077b4: bf00 nop + 80077b6: 370c adds r7, #12 + 80077b8: 46bd mov sp, r7 + 80077ba: f85d 7b04 ldr.w r7, [sp], #4 + 80077be: 4770 bx lr - for (unsigned int i = 0; i < OUTPUT_SIZE; i++) - 800718c: 2300 movs r3, #0 - 800718e: 60bb str r3, [r7, #8] - 8007190: 68bb ldr r3, [r7, #8] - 8007192: f5b3 7f00 cmp.w r3, #512 ; 0x200 - 8007196: d20a bcs.n 80071ae <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev+0xba> - message_out[i] = 0; - 8007198: 687a ldr r2, [r7, #4] - 800719a: 68bb ldr r3, [r7, #8] - 800719c: 4413 add r3, r2 - 800719e: f503 7369 add.w r3, r3, #932 ; 0x3a4 - 80071a2: 2200 movs r2, #0 - 80071a4: 701a strb r2, [r3, #0] - for (unsigned int i = 0; i < OUTPUT_SIZE; i++) - 80071a6: 68bb ldr r3, [r7, #8] - 80071a8: 3301 adds r3, #1 - 80071aa: 60bb str r3, [r7, #8] - 80071ac: e7f0 b.n 8007190 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev+0x9c> +080077c0 : + * @brief Hall Break2 detection callback in non blocking mode + * @param htim: TIM handle + * @retval None + */ +__weak void HAL_TIMEx_Break2Callback(TIM_HandleTypeDef *htim) +{ + 80077c0: b480 push {r7} + 80077c2: b083 sub sp, #12 + 80077c4: af00 add r7, sp, #0 + 80077c6: 6078 str r0, [r7, #4] + UNUSED(htim); - req_param_resp.ints_length = 0; - 80071ae: 687b ldr r3, [r7, #4] - 80071b0: 2200 movs r2, #0 - 80071b2: f8c3 2698 str.w r2, [r3, #1688] ; 0x698 - req_param_resp.ints = NULL; - 80071b6: 687b ldr r3, [r7, #4] - 80071b8: 2200 movs r2, #0 - 80071ba: f8c3 26a0 str.w r2, [r3, #1696] ; 0x6a0 - req_param_resp.floats_length = 0; - 80071be: 687b ldr r3, [r7, #4] - 80071c0: 2200 movs r2, #0 - 80071c2: f8c3 26a4 str.w r2, [r3, #1700] ; 0x6a4 - req_param_resp.floats = NULL; - 80071c6: 687b ldr r3, [r7, #4] - 80071c8: 2200 movs r2, #0 - 80071ca: f8c3 26ac str.w r2, [r3, #1708] ; 0x6ac - req_param_resp.ints_length = 0; - 80071ce: 687b ldr r3, [r7, #4] - 80071d0: 2200 movs r2, #0 - 80071d2: f8c3 2698 str.w r2, [r3, #1688] ; 0x698 - req_param_resp.ints = NULL; - 80071d6: 687b ldr r3, [r7, #4] - 80071d8: 2200 movs r2, #0 - 80071da: f8c3 26a0 str.w r2, [r3, #1696] ; 0x6a0 + /* NOTE : This function Should not be modified, when the callback is needed, + the HAL_TIMEx_Break2Callback could be implemented in the user file + */ +} + 80077c8: bf00 nop + 80077ca: 370c adds r7, #12 + 80077cc: 46bd mov sp, r7 + 80077ce: f85d 7b04 ldr.w r7, [sp], #4 + 80077d2: 4770 bx lr - spin_timeout_ = 0; - 80071de: 687b ldr r3, [r7, #4] - 80071e0: 2200 movs r2, #0 - 80071e2: f8c3 21a0 str.w r2, [r3, #416] ; 0x1a0 - } - 80071e6: 687b ldr r3, [r7, #4] - 80071e8: 4618 mov r0, r3 - 80071ea: 3718 adds r7, #24 - 80071ec: 46bd mov sp, r7 - 80071ee: bd80 pop {r7, pc} - 80071f0: 0800a440 .word 0x0800a440 - -080071f4 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8initNodeEv>: +080077d4 : + * parameters in the UART_InitTypeDef and initialize the associated handle. + * @param huart UART handle. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart) +{ + 80077d4: b580 push {r7, lr} + 80077d6: b082 sub sp, #8 + 80077d8: af00 add r7, sp, #0 + 80077da: 6078 str r0, [r7, #4] + /* Check the UART handle allocation */ + if (huart == NULL) + 80077dc: 687b ldr r3, [r7, #4] + 80077de: 2b00 cmp r3, #0 + 80077e0: d101 bne.n 80077e6 { - return &hardware_; + return HAL_ERROR; + 80077e2: 2301 movs r3, #1 + 80077e4: e040 b.n 8007868 + { + /* Check the parameters */ + assert_param(IS_UART_INSTANCE(huart->Instance)); } - /* Start serial, initialize buffers */ - void initNode() - 80071f4: b580 push {r7, lr} - 80071f6: b082 sub sp, #8 - 80071f8: af00 add r7, sp, #0 - 80071fa: 6078 str r0, [r7, #4] + if (huart->gState == HAL_UART_STATE_RESET) + 80077e6: 687b ldr r3, [r7, #4] + 80077e8: 6f5b ldr r3, [r3, #116] ; 0x74 + 80077ea: 2b00 cmp r3, #0 + 80077ec: d106 bne.n 80077fc { - hardware_.init(); - 80071fc: 687b ldr r3, [r7, #4] - 80071fe: 3304 adds r3, #4 - 8007200: 4618 mov r0, r3 - 8007202: f7ff f837 bl 8006274 <_ZN13STM32Hardware4initEv> - mode_ = 0; - 8007206: 687b ldr r3, [r7, #4] - 8007208: 2200 movs r2, #0 - 800720a: f8c3 266c str.w r2, [r3, #1644] ; 0x66c - bytes_ = 0; - 800720e: 687b ldr r3, [r7, #4] - 8007210: 2200 movs r2, #0 - 8007212: f8c3 2670 str.w r2, [r3, #1648] ; 0x670 - index_ = 0; - 8007216: 687b ldr r3, [r7, #4] - 8007218: 2200 movs r2, #0 - 800721a: f8c3 2678 str.w r2, [r3, #1656] ; 0x678 - topic_ = 0; - 800721e: 687b ldr r3, [r7, #4] - 8007220: 2200 movs r2, #0 - 8007222: f8c3 2674 str.w r2, [r3, #1652] ; 0x674 - }; - 8007226: bf00 nop - 8007228: 3708 adds r7, #8 - 800722a: 46bd mov sp, r7 - 800722c: bd80 pop {r7, pc} + /* Allocate lock resource and initialize it */ + huart->Lock = HAL_UNLOCKED; + 80077ee: 687b ldr r3, [r7, #4] + 80077f0: 2200 movs r2, #0 + 80077f2: f883 2070 strb.w r2, [r3, #112] ; 0x70 -0800722e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE9advertiseERNS_9PublisherE>: - /******************************************************************** - * Topic Management - */ + /* Init the low level hardware */ + huart->MspInitCallback(huart); +#else + /* Init the low level hardware : GPIO, CLOCK */ + HAL_UART_MspInit(huart); + 80077f6: 6878 ldr r0, [r7, #4] + 80077f8: f7fc fda4 bl 8004344 +#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ + } - /* Register a new publisher */ - bool advertise(Publisher & p) - 800722e: b480 push {r7} - 8007230: b085 sub sp, #20 - 8007232: af00 add r7, sp, #0 - 8007234: 6078 str r0, [r7, #4] - 8007236: 6039 str r1, [r7, #0] + huart->gState = HAL_UART_STATE_BUSY; + 80077fc: 687b ldr r3, [r7, #4] + 80077fe: 2224 movs r2, #36 ; 0x24 + 8007800: 675a str r2, [r3, #116] ; 0x74 + + /* Disable the Peripheral */ + __HAL_UART_DISABLE(huart); + 8007802: 687b ldr r3, [r7, #4] + 8007804: 681b ldr r3, [r3, #0] + 8007806: 681a ldr r2, [r3, #0] + 8007808: 687b ldr r3, [r7, #4] + 800780a: 681b ldr r3, [r3, #0] + 800780c: f022 0201 bic.w r2, r2, #1 + 8007810: 601a str r2, [r3, #0] + + /* Set the UART Communication parameters */ + if (UART_SetConfig(huart) == HAL_ERROR) + 8007812: 6878 ldr r0, [r7, #4] + 8007814: f000 fa66 bl 8007ce4 + 8007818: 4603 mov r3, r0 + 800781a: 2b01 cmp r3, #1 + 800781c: d101 bne.n 8007822 { - for (int i = 0; i < MAX_PUBLISHERS; i++) - 8007238: 2300 movs r3, #0 - 800723a: 60fb str r3, [r7, #12] - 800723c: 68fb ldr r3, [r7, #12] - 800723e: 2b18 cmp r3, #24 - 8007240: dc1e bgt.n 8007280 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE9advertiseERNS_9PublisherE+0x52> - { - if (publishers[i] == 0) // empty slot - 8007242: 687a ldr r2, [r7, #4] - 8007244: 68fb ldr r3, [r7, #12] - 8007246: f503 73b4 add.w r3, r3, #360 ; 0x168 - 800724a: 009b lsls r3, r3, #2 - 800724c: 4413 add r3, r2 - 800724e: 685b ldr r3, [r3, #4] - 8007250: 2b00 cmp r3, #0 - 8007252: d111 bne.n 8007278 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE9advertiseERNS_9PublisherE+0x4a> - { - publishers[i] = &p; - 8007254: 687a ldr r2, [r7, #4] - 8007256: 68fb ldr r3, [r7, #12] - 8007258: f503 73b4 add.w r3, r3, #360 ; 0x168 - 800725c: 009b lsls r3, r3, #2 - 800725e: 4413 add r3, r2 - 8007260: 683a ldr r2, [r7, #0] - 8007262: 605a str r2, [r3, #4] - p.id_ = i + 100 + MAX_SUBSCRIBERS; - 8007264: 68fb ldr r3, [r7, #12] - 8007266: f103 027d add.w r2, r3, #125 ; 0x7d - 800726a: 683b ldr r3, [r7, #0] - 800726c: 609a str r2, [r3, #8] - p.nh_ = this; - 800726e: 687a ldr r2, [r7, #4] - 8007270: 683b ldr r3, [r7, #0] - 8007272: 60da str r2, [r3, #12] - return true; - 8007274: 2301 movs r3, #1 - 8007276: e004 b.n 8007282 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE9advertiseERNS_9PublisherE+0x54> - for (int i = 0; i < MAX_PUBLISHERS; i++) - 8007278: 68fb ldr r3, [r7, #12] - 800727a: 3301 adds r3, #1 - 800727c: 60fb str r3, [r7, #12] - 800727e: e7dd b.n 800723c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE9advertiseERNS_9PublisherE+0xe> - } - } - return false; - 8007280: 2300 movs r3, #0 + return HAL_ERROR; + 800781e: 2301 movs r3, #1 + 8007820: e022 b.n 8007868 } - 8007282: 4618 mov r0, r3 - 8007284: 3714 adds r7, #20 - 8007286: 46bd mov sp, r7 - 8007288: f85d 7b04 ldr.w r7, [sp], #4 - 800728c: 4770 bx lr -0800728e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv>: - virtual int spinOnce() - 800728e: b580 push {r7, lr} - 8007290: b084 sub sp, #16 - 8007292: af00 add r7, sp, #0 - 8007294: 6078 str r0, [r7, #4] - uint32_t c_time = hardware_.time(); - 8007296: 687b ldr r3, [r7, #4] - 8007298: 3304 adds r3, #4 - 800729a: 4618 mov r0, r3 - 800729c: f7ff f8d0 bl 8006440 <_ZN13STM32Hardware4timeEv> - 80072a0: 60f8 str r0, [r7, #12] - if ((c_time - last_sync_receive_time) > (SYNC_SECONDS * 2200)) - 80072a2: 687b ldr r3, [r7, #4] - 80072a4: f8d3 3688 ldr.w r3, [r3, #1672] ; 0x688 - 80072a8: 68fa ldr r2, [r7, #12] - 80072aa: 1ad3 subs r3, r2, r3 - 80072ac: f642 22f8 movw r2, #11000 ; 0x2af8 - 80072b0: 4293 cmp r3, r2 - 80072b2: d903 bls.n 80072bc <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x2e> - configured_ = false; - 80072b4: 687b ldr r3, [r7, #4] - 80072b6: 2200 movs r2, #0 - 80072b8: f883 2680 strb.w r2, [r3, #1664] ; 0x680 - if (mode_ != MODE_FIRST_FF) - 80072bc: 687b ldr r3, [r7, #4] - 80072be: f8d3 366c ldr.w r3, [r3, #1644] ; 0x66c - 80072c2: 2b00 cmp r3, #0 - 80072c4: d009 beq.n 80072da <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c> - if (c_time > last_msg_timeout_time) - 80072c6: 687b ldr r3, [r7, #4] - 80072c8: f8d3 368c ldr.w r3, [r3, #1676] ; 0x68c - 80072cc: 68fa ldr r2, [r7, #12] - 80072ce: 429a cmp r2, r3 - 80072d0: d903 bls.n 80072da <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c> - mode_ = MODE_FIRST_FF; - 80072d2: 687b ldr r3, [r7, #4] - 80072d4: 2200 movs r2, #0 - 80072d6: f8c3 266c str.w r2, [r3, #1644] ; 0x66c - if (spin_timeout_ > 0) - 80072da: 687b ldr r3, [r7, #4] - 80072dc: f8d3 31a0 ldr.w r3, [r3, #416] ; 0x1a0 - 80072e0: 2b00 cmp r3, #0 - 80072e2: d014 beq.n 800730e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x80> - if ((hardware_.time() - c_time) > spin_timeout_) - 80072e4: 687b ldr r3, [r7, #4] - 80072e6: 3304 adds r3, #4 - 80072e8: 4618 mov r0, r3 - 80072ea: f7ff f8a9 bl 8006440 <_ZN13STM32Hardware4timeEv> - 80072ee: 4602 mov r2, r0 - 80072f0: 68fb ldr r3, [r7, #12] - 80072f2: 1ad2 subs r2, r2, r3 - 80072f4: 687b ldr r3, [r7, #4] - 80072f6: f8d3 31a0 ldr.w r3, [r3, #416] ; 0x1a0 - 80072fa: 429a cmp r2, r3 - 80072fc: bf8c ite hi - 80072fe: 2301 movhi r3, #1 - 8007300: 2300 movls r3, #0 - 8007302: b2db uxtb r3, r3 - 8007304: 2b00 cmp r3, #0 - 8007306: d002 beq.n 800730e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x80> - return SPIN_TIMEOUT; - 8007308: f06f 0301 mvn.w r3, #1 - 800730c: e197 b.n 800763e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x3b0> - int data = hardware_.read(); - 800730e: 687b ldr r3, [r7, #4] - 8007310: 3304 adds r3, #4 - 8007312: 4618 mov r0, r3 - 8007314: f7fe ffc9 bl 80062aa <_ZN13STM32Hardware4readEv> - 8007318: 60b8 str r0, [r7, #8] - if (data < 0) - 800731a: 68bb ldr r3, [r7, #8] - 800731c: 2b00 cmp r3, #0 - 800731e: f2c0 8177 blt.w 8007610 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x382> - checksum_ += data; - 8007322: 687b ldr r3, [r7, #4] - 8007324: f8d3 267c ldr.w r2, [r3, #1660] ; 0x67c - 8007328: 68bb ldr r3, [r7, #8] - 800732a: 441a add r2, r3 - 800732c: 687b ldr r3, [r7, #4] - 800732e: f8c3 267c str.w r2, [r3, #1660] ; 0x67c - if (mode_ == MODE_MESSAGE) /* message data being recieved */ - 8007332: 687b ldr r3, [r7, #4] - 8007334: f8d3 366c ldr.w r3, [r3, #1644] ; 0x66c - 8007338: 2b07 cmp r3, #7 - 800733a: d11e bne.n 800737a <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0xec> - message_in[index_++] = data; - 800733c: 687b ldr r3, [r7, #4] - 800733e: f8d3 3678 ldr.w r3, [r3, #1656] ; 0x678 - 8007342: 1c59 adds r1, r3, #1 - 8007344: 687a ldr r2, [r7, #4] - 8007346: f8c2 1678 str.w r1, [r2, #1656] ; 0x678 - 800734a: 68ba ldr r2, [r7, #8] - 800734c: b2d1 uxtb r1, r2 - 800734e: 687a ldr r2, [r7, #4] - 8007350: 4413 add r3, r2 - 8007352: 460a mov r2, r1 - 8007354: f883 21a4 strb.w r2, [r3, #420] ; 0x1a4 - bytes_--; - 8007358: 687b ldr r3, [r7, #4] - 800735a: f8d3 3670 ldr.w r3, [r3, #1648] ; 0x670 - 800735e: 1e5a subs r2, r3, #1 - 8007360: 687b ldr r3, [r7, #4] - 8007362: f8c3 2670 str.w r2, [r3, #1648] ; 0x670 - if (bytes_ == 0) /* is message complete? if so, checksum */ - 8007366: 687b ldr r3, [r7, #4] - 8007368: f8d3 3670 ldr.w r3, [r3, #1648] ; 0x670 - 800736c: 2b00 cmp r3, #0 - 800736e: d1b4 bne.n 80072da <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c> - mode_ = MODE_MSG_CHECKSUM; - 8007370: 687b ldr r3, [r7, #4] - 8007372: 2208 movs r2, #8 - 8007374: f8c3 266c str.w r2, [r3, #1644] ; 0x66c - 8007378: e7af b.n 80072da <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c> - else if (mode_ == MODE_FIRST_FF) - 800737a: 687b ldr r3, [r7, #4] - 800737c: f8d3 366c ldr.w r3, [r3, #1644] ; 0x66c - 8007380: 2b00 cmp r3, #0 - 8007382: d128 bne.n 80073d6 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x148> - if (data == 0xff) - 8007384: 68bb ldr r3, [r7, #8] - 8007386: 2bff cmp r3, #255 ; 0xff - 8007388: d10d bne.n 80073a6 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x118> - mode_++; - 800738a: 687b ldr r3, [r7, #4] - 800738c: f8d3 366c ldr.w r3, [r3, #1644] ; 0x66c - 8007390: 1c5a adds r2, r3, #1 - 8007392: 687b ldr r3, [r7, #4] - 8007394: f8c3 266c str.w r2, [r3, #1644] ; 0x66c - last_msg_timeout_time = c_time + SERIAL_MSG_TIMEOUT; - 8007398: 68fb ldr r3, [r7, #12] - 800739a: f103 0214 add.w r2, r3, #20 - 800739e: 687b ldr r3, [r7, #4] - 80073a0: f8c3 268c str.w r2, [r3, #1676] ; 0x68c - 80073a4: e799 b.n 80072da <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c> - else if (hardware_.time() - c_time > (SYNC_SECONDS * 1000)) - 80073a6: 687b ldr r3, [r7, #4] - 80073a8: 3304 adds r3, #4 - 80073aa: 4618 mov r0, r3 - 80073ac: f7ff f848 bl 8006440 <_ZN13STM32Hardware4timeEv> - 80073b0: 4602 mov r2, r0 - 80073b2: 68fb ldr r3, [r7, #12] - 80073b4: 1ad3 subs r3, r2, r3 - 80073b6: f241 3288 movw r2, #5000 ; 0x1388 - 80073ba: 4293 cmp r3, r2 - 80073bc: bf8c ite hi - 80073be: 2301 movhi r3, #1 - 80073c0: 2300 movls r3, #0 - 80073c2: b2db uxtb r3, r3 - 80073c4: 2b00 cmp r3, #0 - 80073c6: d088 beq.n 80072da <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c> - configured_ = false; - 80073c8: 687b ldr r3, [r7, #4] - 80073ca: 2200 movs r2, #0 - 80073cc: f883 2680 strb.w r2, [r3, #1664] ; 0x680 - return SPIN_TIMEOUT; - 80073d0: f06f 0301 mvn.w r3, #1 - 80073d4: e133 b.n 800763e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x3b0> - else if (mode_ == MODE_PROTOCOL_VER) - 80073d6: 687b ldr r3, [r7, #4] - 80073d8: f8d3 366c ldr.w r3, [r3, #1644] ; 0x66c - 80073dc: 2b01 cmp r3, #1 - 80073de: d11b bne.n 8007418 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x18a> - if (data == PROTOCOL_VER) - 80073e0: 68bb ldr r3, [r7, #8] - 80073e2: 2bfe cmp r3, #254 ; 0xfe - 80073e4: d107 bne.n 80073f6 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x168> - mode_++; - 80073e6: 687b ldr r3, [r7, #4] - 80073e8: f8d3 366c ldr.w r3, [r3, #1644] ; 0x66c - 80073ec: 1c5a adds r2, r3, #1 - 80073ee: 687b ldr r3, [r7, #4] - 80073f0: f8c3 266c str.w r2, [r3, #1644] ; 0x66c - 80073f4: e771 b.n 80072da <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c> - mode_ = MODE_FIRST_FF; - 80073f6: 687b ldr r3, [r7, #4] - 80073f8: 2200 movs r2, #0 - 80073fa: f8c3 266c str.w r2, [r3, #1644] ; 0x66c - if (configured_ == false) - 80073fe: 687b ldr r3, [r7, #4] - 8007400: f893 3680 ldrb.w r3, [r3, #1664] ; 0x680 - 8007404: f083 0301 eor.w r3, r3, #1 - 8007408: b2db uxtb r3, r3 - 800740a: 2b00 cmp r3, #0 - 800740c: f43f af65 beq.w 80072da <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c> - requestSyncTime(); /* send a msg back showing our protocol version */ - 8007410: 6878 ldr r0, [r7, #4] - 8007412: f000 f924 bl 800765e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15requestSyncTimeEv> - 8007416: e760 b.n 80072da <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c> - else if (mode_ == MODE_SIZE_L) /* bottom half of message size */ - 8007418: 687b ldr r3, [r7, #4] - 800741a: f8d3 366c ldr.w r3, [r3, #1644] ; 0x66c - 800741e: 2b02 cmp r3, #2 - 8007420: d113 bne.n 800744a <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x1bc> - bytes_ = data; - 8007422: 687b ldr r3, [r7, #4] - 8007424: 68ba ldr r2, [r7, #8] - 8007426: f8c3 2670 str.w r2, [r3, #1648] ; 0x670 - index_ = 0; - 800742a: 687b ldr r3, [r7, #4] - 800742c: 2200 movs r2, #0 - 800742e: f8c3 2678 str.w r2, [r3, #1656] ; 0x678 - mode_++; - 8007432: 687b ldr r3, [r7, #4] - 8007434: f8d3 366c ldr.w r3, [r3, #1644] ; 0x66c - 8007438: 1c5a adds r2, r3, #1 - 800743a: 687b ldr r3, [r7, #4] - 800743c: f8c3 266c str.w r2, [r3, #1644] ; 0x66c - checksum_ = data; /* first byte for calculating size checksum */ - 8007440: 687b ldr r3, [r7, #4] - 8007442: 68ba ldr r2, [r7, #8] - 8007444: f8c3 267c str.w r2, [r3, #1660] ; 0x67c - 8007448: e747 b.n 80072da <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c> - else if (mode_ == MODE_SIZE_H) /* top half of message size */ - 800744a: 687b ldr r3, [r7, #4] - 800744c: f8d3 366c ldr.w r3, [r3, #1644] ; 0x66c - 8007450: 2b03 cmp r3, #3 - 8007452: d110 bne.n 8007476 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x1e8> - bytes_ += data << 8; - 8007454: 687b ldr r3, [r7, #4] - 8007456: f8d3 2670 ldr.w r2, [r3, #1648] ; 0x670 - 800745a: 68bb ldr r3, [r7, #8] - 800745c: 021b lsls r3, r3, #8 - 800745e: 441a add r2, r3 - 8007460: 687b ldr r3, [r7, #4] - 8007462: f8c3 2670 str.w r2, [r3, #1648] ; 0x670 - mode_++; - 8007466: 687b ldr r3, [r7, #4] - 8007468: f8d3 366c ldr.w r3, [r3, #1644] ; 0x66c - 800746c: 1c5a adds r2, r3, #1 - 800746e: 687b ldr r3, [r7, #4] - 8007470: f8c3 266c str.w r2, [r3, #1644] ; 0x66c - 8007474: e731 b.n 80072da <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c> - else if (mode_ == MODE_SIZE_CHECKSUM) - 8007476: 687b ldr r3, [r7, #4] - 8007478: f8d3 366c ldr.w r3, [r3, #1644] ; 0x66c - 800747c: 2b04 cmp r3, #4 - 800747e: d116 bne.n 80074ae <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x220> - if ((checksum_ % 256) == 255) - 8007480: 687b ldr r3, [r7, #4] - 8007482: f8d3 367c ldr.w r3, [r3, #1660] ; 0x67c - 8007486: 425a negs r2, r3 - 8007488: b2db uxtb r3, r3 - 800748a: b2d2 uxtb r2, r2 - 800748c: bf58 it pl - 800748e: 4253 negpl r3, r2 - 8007490: 2bff cmp r3, #255 ; 0xff - 8007492: d107 bne.n 80074a4 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x216> - mode_++; - 8007494: 687b ldr r3, [r7, #4] - 8007496: f8d3 366c ldr.w r3, [r3, #1644] ; 0x66c - 800749a: 1c5a adds r2, r3, #1 - 800749c: 687b ldr r3, [r7, #4] - 800749e: f8c3 266c str.w r2, [r3, #1644] ; 0x66c - 80074a2: e71a b.n 80072da <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c> - mode_ = MODE_FIRST_FF; /* Abandon the frame if the msg len is wrong */ - 80074a4: 687b ldr r3, [r7, #4] - 80074a6: 2200 movs r2, #0 - 80074a8: f8c3 266c str.w r2, [r3, #1644] ; 0x66c - 80074ac: e715 b.n 80072da <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c> - else if (mode_ == MODE_TOPIC_L) /* bottom half of topic id */ - 80074ae: 687b ldr r3, [r7, #4] - 80074b0: f8d3 366c ldr.w r3, [r3, #1644] ; 0x66c - 80074b4: 2b05 cmp r3, #5 - 80074b6: d10f bne.n 80074d8 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x24a> - topic_ = data; - 80074b8: 687b ldr r3, [r7, #4] - 80074ba: 68ba ldr r2, [r7, #8] - 80074bc: f8c3 2674 str.w r2, [r3, #1652] ; 0x674 - mode_++; - 80074c0: 687b ldr r3, [r7, #4] - 80074c2: f8d3 366c ldr.w r3, [r3, #1644] ; 0x66c - 80074c6: 1c5a adds r2, r3, #1 - 80074c8: 687b ldr r3, [r7, #4] - 80074ca: f8c3 266c str.w r2, [r3, #1644] ; 0x66c - checksum_ = data; /* first byte included in checksum */ - 80074ce: 687b ldr r3, [r7, #4] - 80074d0: 68ba ldr r2, [r7, #8] - 80074d2: f8c3 267c str.w r2, [r3, #1660] ; 0x67c - 80074d6: e700 b.n 80072da <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c> - else if (mode_ == MODE_TOPIC_H) /* top half of topic id */ - 80074d8: 687b ldr r3, [r7, #4] - 80074da: f8d3 366c ldr.w r3, [r3, #1644] ; 0x66c - 80074de: 2b06 cmp r3, #6 - 80074e0: d117 bne.n 8007512 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x284> - topic_ += data << 8; - 80074e2: 687b ldr r3, [r7, #4] - 80074e4: f8d3 2674 ldr.w r2, [r3, #1652] ; 0x674 - 80074e8: 68bb ldr r3, [r7, #8] - 80074ea: 021b lsls r3, r3, #8 - 80074ec: 441a add r2, r3 - 80074ee: 687b ldr r3, [r7, #4] - 80074f0: f8c3 2674 str.w r2, [r3, #1652] ; 0x674 - mode_ = MODE_MESSAGE; - 80074f4: 687b ldr r3, [r7, #4] - 80074f6: 2207 movs r2, #7 - 80074f8: f8c3 266c str.w r2, [r3, #1644] ; 0x66c - if (bytes_ == 0) - 80074fc: 687b ldr r3, [r7, #4] - 80074fe: f8d3 3670 ldr.w r3, [r3, #1648] ; 0x670 - 8007502: 2b00 cmp r3, #0 - 8007504: f47f aee9 bne.w 80072da <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c> - mode_ = MODE_MSG_CHECKSUM; - 8007508: 687b ldr r3, [r7, #4] - 800750a: 2208 movs r2, #8 - 800750c: f8c3 266c str.w r2, [r3, #1644] ; 0x66c - 8007510: e6e3 b.n 80072da <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c> - else if (mode_ == MODE_MSG_CHECKSUM) /* do checksum */ - 8007512: 687b ldr r3, [r7, #4] - 8007514: f8d3 366c ldr.w r3, [r3, #1644] ; 0x66c - 8007518: 2b08 cmp r3, #8 - 800751a: f47f aede bne.w 80072da <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c> - mode_ = MODE_FIRST_FF; - 800751e: 687b ldr r3, [r7, #4] - 8007520: 2200 movs r2, #0 - 8007522: f8c3 266c str.w r2, [r3, #1644] ; 0x66c - if ((checksum_ % 256) == 255) - 8007526: 687b ldr r3, [r7, #4] - 8007528: f8d3 367c ldr.w r3, [r3, #1660] ; 0x67c - 800752c: 425a negs r2, r3 - 800752e: b2db uxtb r3, r3 - 8007530: b2d2 uxtb r2, r2 - 8007532: bf58 it pl - 8007534: 4253 negpl r3, r2 - 8007536: 2bff cmp r3, #255 ; 0xff - 8007538: f47f aecf bne.w 80072da <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c> - if (topic_ == TopicInfo::ID_PUBLISHER) - 800753c: 687b ldr r3, [r7, #4] - 800753e: f8d3 3674 ldr.w r3, [r3, #1652] ; 0x674 - 8007542: 2b00 cmp r3, #0 - 8007544: d110 bne.n 8007568 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x2da> - requestSyncTime(); - 8007546: 6878 ldr r0, [r7, #4] - 8007548: f000 f889 bl 800765e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15requestSyncTimeEv> - negotiateTopics(); - 800754c: 6878 ldr r0, [r7, #4] - 800754e: f000 f8a4 bl 800769a <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv> - last_sync_time = c_time; - 8007552: 687b ldr r3, [r7, #4] - 8007554: 68fa ldr r2, [r7, #12] - 8007556: f8c3 2684 str.w r2, [r3, #1668] ; 0x684 - last_sync_receive_time = c_time; - 800755a: 687b ldr r3, [r7, #4] - 800755c: 68fa ldr r2, [r7, #12] - 800755e: f8c3 2688 str.w r2, [r3, #1672] ; 0x688 - return SPIN_ERR; - 8007562: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff - 8007566: e06a b.n 800763e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x3b0> - else if (topic_ == TopicInfo::ID_TIME) - 8007568: 687b ldr r3, [r7, #4] - 800756a: f8d3 3674 ldr.w r3, [r3, #1652] ; 0x674 - 800756e: 2b0a cmp r3, #10 - 8007570: d107 bne.n 8007582 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x2f4> - syncTime(message_in); - 8007572: 687b ldr r3, [r7, #4] - 8007574: f503 73d2 add.w r3, r3, #420 ; 0x1a4 - 8007578: 4619 mov r1, r3 - 800757a: 6878 ldr r0, [r7, #4] - 800757c: f000 f96c bl 8007858 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8syncTimeEPh> - 8007580: e6ab b.n 80072da <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c> - else if (topic_ == TopicInfo::ID_PARAMETER_REQUEST) - 8007582: 687b ldr r3, [r7, #4] - 8007584: f8d3 3674 ldr.w r3, [r3, #1652] ; 0x674 - 8007588: 2b06 cmp r3, #6 - 800758a: d10e bne.n 80075aa <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x31c> - req_param_resp.deserialize(message_in); - 800758c: 687b ldr r3, [r7, #4] - 800758e: f203 6294 addw r2, r3, #1684 ; 0x694 - 8007592: 687b ldr r3, [r7, #4] - 8007594: f503 73d2 add.w r3, r3, #420 ; 0x1a4 - 8007598: 4619 mov r1, r3 - 800759a: 4610 mov r0, r2 - 800759c: f7fe fc77 bl 8005e8e <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh> - param_recieved = true; - 80075a0: 687b ldr r3, [r7, #4] - 80075a2: 2201 movs r2, #1 - 80075a4: f883 2690 strb.w r2, [r3, #1680] ; 0x690 - 80075a8: e697 b.n 80072da <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c> - else if (topic_ == TopicInfo::ID_TX_STOP) - 80075aa: 687b ldr r3, [r7, #4] - 80075ac: f8d3 3674 ldr.w r3, [r3, #1652] ; 0x674 - 80075b0: 2b0b cmp r3, #11 - 80075b2: d104 bne.n 80075be <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x330> - configured_ = false; - 80075b4: 687b ldr r3, [r7, #4] - 80075b6: 2200 movs r2, #0 - 80075b8: f883 2680 strb.w r2, [r3, #1664] ; 0x680 - 80075bc: e68d b.n 80072da <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c> - if (subscribers[topic_ - 100]) - 80075be: 687b ldr r3, [r7, #4] - 80075c0: f8d3 3674 ldr.w r3, [r3, #1652] ; 0x674 - 80075c4: f1a3 0264 sub.w r2, r3, #100 ; 0x64 - 80075c8: 687b ldr r3, [r7, #4] - 80075ca: f502 72c1 add.w r2, r2, #386 ; 0x182 - 80075ce: f853 3022 ldr.w r3, [r3, r2, lsl #2] - 80075d2: 2b00 cmp r3, #0 - 80075d4: f43f ae81 beq.w 80072da <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c> - subscribers[topic_ - 100]->callback(message_in); - 80075d8: 687b ldr r3, [r7, #4] - 80075da: f8d3 3674 ldr.w r3, [r3, #1652] ; 0x674 - 80075de: f1a3 0264 sub.w r2, r3, #100 ; 0x64 - 80075e2: 687b ldr r3, [r7, #4] - 80075e4: f502 72c1 add.w r2, r2, #386 ; 0x182 - 80075e8: f853 0022 ldr.w r0, [r3, r2, lsl #2] - 80075ec: 687b ldr r3, [r7, #4] - 80075ee: f8d3 3674 ldr.w r3, [r3, #1652] ; 0x674 - 80075f2: f1a3 0264 sub.w r2, r3, #100 ; 0x64 - 80075f6: 687b ldr r3, [r7, #4] - 80075f8: f502 72c1 add.w r2, r2, #386 ; 0x182 - 80075fc: f853 3022 ldr.w r3, [r3, r2, lsl #2] - 8007600: 681b ldr r3, [r3, #0] - 8007602: 681b ldr r3, [r3, #0] - 8007604: 687a ldr r2, [r7, #4] - 8007606: f502 72d2 add.w r2, r2, #420 ; 0x1a4 - 800760a: 4611 mov r1, r2 - 800760c: 4798 blx r3 - while (true) - 800760e: e664 b.n 80072da <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c> - break; - 8007610: bf00 nop - if (configured_ && ((c_time - last_sync_time) > (SYNC_SECONDS * 500))) - 8007612: 687b ldr r3, [r7, #4] - 8007614: f893 3680 ldrb.w r3, [r3, #1664] ; 0x680 - 8007618: 2b00 cmp r3, #0 - 800761a: d00f beq.n 800763c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x3ae> - 800761c: 687b ldr r3, [r7, #4] - 800761e: f8d3 3684 ldr.w r3, [r3, #1668] ; 0x684 - 8007622: 68fa ldr r2, [r7, #12] - 8007624: 1ad3 subs r3, r2, r3 - 8007626: f640 12c4 movw r2, #2500 ; 0x9c4 - 800762a: 4293 cmp r3, r2 - 800762c: d906 bls.n 800763c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x3ae> - requestSyncTime(); - 800762e: 6878 ldr r0, [r7, #4] - 8007630: f000 f815 bl 800765e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15requestSyncTimeEv> - last_sync_time = c_time; - 8007634: 687b ldr r3, [r7, #4] - 8007636: 68fa ldr r2, [r7, #12] - 8007638: f8c3 2684 str.w r2, [r3, #1668] ; 0x684 - return SPIN_OK; - 800763c: 2300 movs r3, #0 + if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) + 8007822: 687b ldr r3, [r7, #4] + 8007824: 6a5b ldr r3, [r3, #36] ; 0x24 + 8007826: 2b00 cmp r3, #0 + 8007828: d002 beq.n 8007830 + { + UART_AdvFeatureConfig(huart); + 800782a: 6878 ldr r0, [r7, #4] + 800782c: f000 fcfe bl 800822c } - 800763e: 4618 mov r0, r3 - 8007640: 3710 adds r7, #16 - 8007642: 46bd mov sp, r7 - 8007644: bd80 pop {r7, pc} -08007646 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE11getHardwareEv>: - Hardware* getHardware() - 8007646: b480 push {r7} - 8007648: b083 sub sp, #12 - 800764a: af00 add r7, sp, #0 - 800764c: 6078 str r0, [r7, #4] - return &hardware_; - 800764e: 687b ldr r3, [r7, #4] - 8007650: 3304 adds r3, #4 - } - 8007652: 4618 mov r0, r3 - 8007654: 370c adds r7, #12 - 8007656: 46bd mov sp, r7 - 8007658: f85d 7b04 ldr.w r7, [sp], #4 - 800765c: 4770 bx lr + /* In asynchronous mode, the following bits must be kept cleared: + - LINEN and CLKEN bits in the USART_CR2 register, + - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/ + CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); + 8007830: 687b ldr r3, [r7, #4] + 8007832: 681b ldr r3, [r3, #0] + 8007834: 685a ldr r2, [r3, #4] + 8007836: 687b ldr r3, [r7, #4] + 8007838: 681b ldr r3, [r3, #0] + 800783a: f422 4290 bic.w r2, r2, #18432 ; 0x4800 + 800783e: 605a str r2, [r3, #4] + CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); + 8007840: 687b ldr r3, [r7, #4] + 8007842: 681b ldr r3, [r3, #0] + 8007844: 689a ldr r2, [r3, #8] + 8007846: 687b ldr r3, [r7, #4] + 8007848: 681b ldr r3, [r3, #0] + 800784a: f022 022a bic.w r2, r2, #42 ; 0x2a + 800784e: 609a str r2, [r3, #8] -0800765e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15requestSyncTimeEv>: - void requestSyncTime() - 800765e: b580 push {r7, lr} - 8007660: b086 sub sp, #24 - 8007662: af00 add r7, sp, #0 - 8007664: 6078 str r0, [r7, #4] - std_msgs::Time t; - 8007666: f107 030c add.w r3, r7, #12 - 800766a: 4618 mov r0, r3 - 800766c: f7fd ff76 bl 800555c <_ZN8std_msgs4TimeC1Ev> - publish(TopicInfo::ID_TIME, &t); - 8007670: 687b ldr r3, [r7, #4] - 8007672: 681b ldr r3, [r3, #0] - 8007674: 681b ldr r3, [r3, #0] - 8007676: f107 020c add.w r2, r7, #12 - 800767a: 210a movs r1, #10 - 800767c: 6878 ldr r0, [r7, #4] - 800767e: 4798 blx r3 - rt_time = hardware_.time(); - 8007680: 687b ldr r3, [r7, #4] - 8007682: 3304 adds r3, #4 - 8007684: 4618 mov r0, r3 - 8007686: f7fe fedb bl 8006440 <_ZN13STM32Hardware4timeEv> - 800768a: 4602 mov r2, r0 - 800768c: 687b ldr r3, [r7, #4] - 800768e: f8c3 2194 str.w r2, [r3, #404] ; 0x194 - } - 8007692: bf00 nop - 8007694: 3718 adds r7, #24 - 8007696: 46bd mov sp, r7 - 8007698: bd80 pop {r7, pc} + /* Enable the Peripheral */ + __HAL_UART_ENABLE(huart); + 8007850: 687b ldr r3, [r7, #4] + 8007852: 681b ldr r3, [r3, #0] + 8007854: 681a ldr r2, [r3, #0] + 8007856: 687b ldr r3, [r7, #4] + 8007858: 681b ldr r3, [r3, #0] + 800785a: f042 0201 orr.w r2, r2, #1 + 800785e: 601a str r2, [r3, #0] -0800769a <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv>: - } - } - return false; - } + /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */ + return (UART_CheckIdleState(huart)); + 8007860: 6878 ldr r0, [r7, #4] + 8007862: f000 fd85 bl 8008370 + 8007866: 4603 mov r3, r0 +} + 8007868: 4618 mov r0, r3 + 800786a: 3708 adds r7, #8 + 800786c: 46bd mov sp, r7 + 800786e: bd80 pop {r7, pc} - void negotiateTopics() - 800769a: b590 push {r4, r7, lr} - 800769c: b08b sub sp, #44 ; 0x2c - 800769e: af00 add r7, sp, #0 - 80076a0: 6078 str r0, [r7, #4] +08007870 : + * @param pData Pointer to data buffer. + * @param Size Amount of data to be sent. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) +{ + 8007870: b580 push {r7, lr} + 8007872: b084 sub sp, #16 + 8007874: af00 add r7, sp, #0 + 8007876: 60f8 str r0, [r7, #12] + 8007878: 60b9 str r1, [r7, #8] + 800787a: 4613 mov r3, r2 + 800787c: 80fb strh r3, [r7, #6] + /* Check that a Tx process is not already ongoing */ + if (huart->gState == HAL_UART_STATE_READY) + 800787e: 68fb ldr r3, [r7, #12] + 8007880: 6f5b ldr r3, [r3, #116] ; 0x74 + 8007882: 2b20 cmp r3, #32 + 8007884: d164 bne.n 8007950 { - rosserial_msgs::TopicInfo ti; - 80076a2: f107 030c add.w r3, r7, #12 - 80076a6: 4618 mov r0, r3 - 80076a8: f7fe f848 bl 800573c <_ZN14rosserial_msgs9TopicInfoC1Ev> - int i; - for (i = 0; i < MAX_PUBLISHERS; i++) - 80076ac: 2300 movs r3, #0 - 80076ae: 627b str r3, [r7, #36] ; 0x24 - 80076b0: 6a7b ldr r3, [r7, #36] ; 0x24 - 80076b2: 2b18 cmp r3, #24 - 80076b4: dc63 bgt.n 800777e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0xe4> + if ((pData == NULL) || (Size == 0U)) + 8007886: 68bb ldr r3, [r7, #8] + 8007888: 2b00 cmp r3, #0 + 800788a: d002 beq.n 8007892 + 800788c: 88fb ldrh r3, [r7, #6] + 800788e: 2b00 cmp r3, #0 + 8007890: d101 bne.n 8007896 { - if (publishers[i] != 0) // non-empty slot - 80076b6: 687a ldr r2, [r7, #4] - 80076b8: 6a7b ldr r3, [r7, #36] ; 0x24 - 80076ba: f503 73b4 add.w r3, r3, #360 ; 0x168 - 80076be: 009b lsls r3, r3, #2 - 80076c0: 4413 add r3, r2 - 80076c2: 685b ldr r3, [r3, #4] - 80076c4: 2b00 cmp r3, #0 - 80076c6: d056 beq.n 8007776 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0xdc> - { - ti.topic_id = publishers[i]->id_; - 80076c8: 687a ldr r2, [r7, #4] - 80076ca: 6a7b ldr r3, [r7, #36] ; 0x24 - 80076cc: f503 73b4 add.w r3, r3, #360 ; 0x168 - 80076d0: 009b lsls r3, r3, #2 - 80076d2: 4413 add r3, r2 - 80076d4: 685b ldr r3, [r3, #4] - 80076d6: 689b ldr r3, [r3, #8] - 80076d8: b29b uxth r3, r3 - 80076da: 823b strh r3, [r7, #16] - ti.topic_name = (char *) publishers[i]->topic_; - 80076dc: 687a ldr r2, [r7, #4] - 80076de: 6a7b ldr r3, [r7, #36] ; 0x24 - 80076e0: f503 73b4 add.w r3, r3, #360 ; 0x168 - 80076e4: 009b lsls r3, r3, #2 - 80076e6: 4413 add r3, r2 - 80076e8: 685b ldr r3, [r3, #4] - 80076ea: 681b ldr r3, [r3, #0] - 80076ec: 617b str r3, [r7, #20] - ti.message_type = (char *) publishers[i]->msg_->getType(); - 80076ee: 687a ldr r2, [r7, #4] - 80076f0: 6a7b ldr r3, [r7, #36] ; 0x24 - 80076f2: f503 73b4 add.w r3, r3, #360 ; 0x168 - 80076f6: 009b lsls r3, r3, #2 - 80076f8: 4413 add r3, r2 - 80076fa: 685b ldr r3, [r3, #4] - 80076fc: 6859 ldr r1, [r3, #4] - 80076fe: 687a ldr r2, [r7, #4] - 8007700: 6a7b ldr r3, [r7, #36] ; 0x24 - 8007702: f503 73b4 add.w r3, r3, #360 ; 0x168 - 8007706: 009b lsls r3, r3, #2 - 8007708: 4413 add r3, r2 - 800770a: 685b ldr r3, [r3, #4] - 800770c: 685b ldr r3, [r3, #4] - 800770e: 681b ldr r3, [r3, #0] - 8007710: 3308 adds r3, #8 - 8007712: 681b ldr r3, [r3, #0] - 8007714: 4608 mov r0, r1 - 8007716: 4798 blx r3 - 8007718: 4603 mov r3, r0 - 800771a: 61bb str r3, [r7, #24] - ti.md5sum = (char *) publishers[i]->msg_->getMD5(); - 800771c: 687a ldr r2, [r7, #4] - 800771e: 6a7b ldr r3, [r7, #36] ; 0x24 - 8007720: f503 73b4 add.w r3, r3, #360 ; 0x168 - 8007724: 009b lsls r3, r3, #2 - 8007726: 4413 add r3, r2 - 8007728: 685b ldr r3, [r3, #4] - 800772a: 6859 ldr r1, [r3, #4] - 800772c: 687a ldr r2, [r7, #4] - 800772e: 6a7b ldr r3, [r7, #36] ; 0x24 - 8007730: f503 73b4 add.w r3, r3, #360 ; 0x168 - 8007734: 009b lsls r3, r3, #2 - 8007736: 4413 add r3, r2 - 8007738: 685b ldr r3, [r3, #4] - 800773a: 685b ldr r3, [r3, #4] - 800773c: 681b ldr r3, [r3, #0] - 800773e: 330c adds r3, #12 - 8007740: 681b ldr r3, [r3, #0] - 8007742: 4608 mov r0, r1 - 8007744: 4798 blx r3 - 8007746: 4603 mov r3, r0 - 8007748: 61fb str r3, [r7, #28] - ti.buffer_size = OUTPUT_SIZE; - 800774a: f44f 7300 mov.w r3, #512 ; 0x200 - 800774e: 623b str r3, [r7, #32] - publish(publishers[i]->getEndpointType(), &ti); - 8007750: 687b ldr r3, [r7, #4] - 8007752: 681b ldr r3, [r3, #0] - 8007754: 681c ldr r4, [r3, #0] - 8007756: 687a ldr r2, [r7, #4] - 8007758: 6a7b ldr r3, [r7, #36] ; 0x24 - 800775a: f503 73b4 add.w r3, r3, #360 ; 0x168 - 800775e: 009b lsls r3, r3, #2 - 8007760: 4413 add r3, r2 - 8007762: 685b ldr r3, [r3, #4] - 8007764: 4618 mov r0, r3 - 8007766: f7fe fd4a bl 80061fe <_ZN3ros9Publisher15getEndpointTypeEv> - 800776a: 4601 mov r1, r0 - 800776c: f107 030c add.w r3, r7, #12 - 8007770: 461a mov r2, r3 - 8007772: 6878 ldr r0, [r7, #4] - 8007774: 47a0 blx r4 - for (i = 0; i < MAX_PUBLISHERS; i++) - 8007776: 6a7b ldr r3, [r7, #36] ; 0x24 - 8007778: 3301 adds r3, #1 - 800777a: 627b str r3, [r7, #36] ; 0x24 - 800777c: e798 b.n 80076b0 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x16> - } + return HAL_ERROR; + 8007892: 2301 movs r3, #1 + 8007894: e05d b.n 8007952 } - for (i = 0; i < MAX_SUBSCRIBERS; i++) - 800777e: 2300 movs r3, #0 - 8007780: 627b str r3, [r7, #36] ; 0x24 - 8007782: 6a7b ldr r3, [r7, #36] ; 0x24 - 8007784: 2b18 cmp r3, #24 - 8007786: dc5f bgt.n 8007848 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x1ae> + + /* Process Locked */ + __HAL_LOCK(huart); + 8007896: 68fb ldr r3, [r7, #12] + 8007898: f893 3070 ldrb.w r3, [r3, #112] ; 0x70 + 800789c: 2b01 cmp r3, #1 + 800789e: d101 bne.n 80078a4 + 80078a0: 2302 movs r3, #2 + 80078a2: e056 b.n 8007952 + 80078a4: 68fb ldr r3, [r7, #12] + 80078a6: 2201 movs r2, #1 + 80078a8: f883 2070 strb.w r2, [r3, #112] ; 0x70 + + huart->pTxBuffPtr = pData; + 80078ac: 68fb ldr r3, [r7, #12] + 80078ae: 68ba ldr r2, [r7, #8] + 80078b0: 64da str r2, [r3, #76] ; 0x4c + huart->TxXferSize = Size; + 80078b2: 68fb ldr r3, [r7, #12] + 80078b4: 88fa ldrh r2, [r7, #6] + 80078b6: f8a3 2050 strh.w r2, [r3, #80] ; 0x50 + huart->TxXferCount = Size; + 80078ba: 68fb ldr r3, [r7, #12] + 80078bc: 88fa ldrh r2, [r7, #6] + 80078be: f8a3 2052 strh.w r2, [r3, #82] ; 0x52 + + huart->ErrorCode = HAL_UART_ERROR_NONE; + 80078c2: 68fb ldr r3, [r7, #12] + 80078c4: 2200 movs r2, #0 + 80078c6: 67da str r2, [r3, #124] ; 0x7c + huart->gState = HAL_UART_STATE_BUSY_TX; + 80078c8: 68fb ldr r3, [r7, #12] + 80078ca: 2221 movs r2, #33 ; 0x21 + 80078cc: 675a str r2, [r3, #116] ; 0x74 + + if (huart->hdmatx != NULL) + 80078ce: 68fb ldr r3, [r7, #12] + 80078d0: 6e9b ldr r3, [r3, #104] ; 0x68 + 80078d2: 2b00 cmp r3, #0 + 80078d4: d02a beq.n 800792c { - if (subscribers[i] != 0) // non-empty slot - 8007788: 687b ldr r3, [r7, #4] - 800778a: 6a7a ldr r2, [r7, #36] ; 0x24 - 800778c: f502 72c1 add.w r2, r2, #386 ; 0x182 - 8007790: f853 3022 ldr.w r3, [r3, r2, lsl #2] - 8007794: 2b00 cmp r3, #0 - 8007796: d053 beq.n 8007840 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x1a6> - { - ti.topic_id = subscribers[i]->id_; - 8007798: 687b ldr r3, [r7, #4] - 800779a: 6a7a ldr r2, [r7, #36] ; 0x24 - 800779c: f502 72c1 add.w r2, r2, #386 ; 0x182 - 80077a0: f853 3022 ldr.w r3, [r3, r2, lsl #2] - 80077a4: 685b ldr r3, [r3, #4] - 80077a6: b29b uxth r3, r3 - 80077a8: 823b strh r3, [r7, #16] - ti.topic_name = (char *) subscribers[i]->topic_; - 80077aa: 687b ldr r3, [r7, #4] - 80077ac: 6a7a ldr r2, [r7, #36] ; 0x24 - 80077ae: f502 72c1 add.w r2, r2, #386 ; 0x182 - 80077b2: f853 3022 ldr.w r3, [r3, r2, lsl #2] - 80077b6: 689b ldr r3, [r3, #8] - 80077b8: 617b str r3, [r7, #20] - ti.message_type = (char *) subscribers[i]->getMsgType(); - 80077ba: 687b ldr r3, [r7, #4] - 80077bc: 6a7a ldr r2, [r7, #36] ; 0x24 - 80077be: f502 72c1 add.w r2, r2, #386 ; 0x182 - 80077c2: f853 1022 ldr.w r1, [r3, r2, lsl #2] - 80077c6: 687b ldr r3, [r7, #4] - 80077c8: 6a7a ldr r2, [r7, #36] ; 0x24 - 80077ca: f502 72c1 add.w r2, r2, #386 ; 0x182 - 80077ce: f853 3022 ldr.w r3, [r3, r2, lsl #2] - 80077d2: 681b ldr r3, [r3, #0] - 80077d4: 3308 adds r3, #8 - 80077d6: 681b ldr r3, [r3, #0] - 80077d8: 4608 mov r0, r1 - 80077da: 4798 blx r3 - 80077dc: 4603 mov r3, r0 - 80077de: 61bb str r3, [r7, #24] - ti.md5sum = (char *) subscribers[i]->getMsgMD5(); - 80077e0: 687b ldr r3, [r7, #4] - 80077e2: 6a7a ldr r2, [r7, #36] ; 0x24 - 80077e4: f502 72c1 add.w r2, r2, #386 ; 0x182 - 80077e8: f853 1022 ldr.w r1, [r3, r2, lsl #2] - 80077ec: 687b ldr r3, [r7, #4] - 80077ee: 6a7a ldr r2, [r7, #36] ; 0x24 - 80077f0: f502 72c1 add.w r2, r2, #386 ; 0x182 - 80077f4: f853 3022 ldr.w r3, [r3, r2, lsl #2] - 80077f8: 681b ldr r3, [r3, #0] - 80077fa: 330c adds r3, #12 - 80077fc: 681b ldr r3, [r3, #0] - 80077fe: 4608 mov r0, r1 - 8007800: 4798 blx r3 - 8007802: 4603 mov r3, r0 - 8007804: 61fb str r3, [r7, #28] - ti.buffer_size = INPUT_SIZE; - 8007806: f44f 7300 mov.w r3, #512 ; 0x200 - 800780a: 623b str r3, [r7, #32] - publish(subscribers[i]->getEndpointType(), &ti); - 800780c: 687b ldr r3, [r7, #4] - 800780e: 681b ldr r3, [r3, #0] - 8007810: 681c ldr r4, [r3, #0] - 8007812: 687b ldr r3, [r7, #4] - 8007814: 6a7a ldr r2, [r7, #36] ; 0x24 - 8007816: f502 72c1 add.w r2, r2, #386 ; 0x182 - 800781a: f853 1022 ldr.w r1, [r3, r2, lsl #2] - 800781e: 687b ldr r3, [r7, #4] - 8007820: 6a7a ldr r2, [r7, #36] ; 0x24 - 8007822: f502 72c1 add.w r2, r2, #386 ; 0x182 - 8007826: f853 3022 ldr.w r3, [r3, r2, lsl #2] - 800782a: 681b ldr r3, [r3, #0] - 800782c: 3304 adds r3, #4 - 800782e: 681b ldr r3, [r3, #0] - 8007830: 4608 mov r0, r1 - 8007832: 4798 blx r3 - 8007834: 4601 mov r1, r0 - 8007836: f107 030c add.w r3, r7, #12 - 800783a: 461a mov r2, r3 - 800783c: 6878 ldr r0, [r7, #4] - 800783e: 47a0 blx r4 - for (i = 0; i < MAX_SUBSCRIBERS; i++) - 8007840: 6a7b ldr r3, [r7, #36] ; 0x24 - 8007842: 3301 adds r3, #1 - 8007844: 627b str r3, [r7, #36] ; 0x24 - 8007846: e79c b.n 8007782 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0xe8> - } - } - configured_ = true; - 8007848: 687b ldr r3, [r7, #4] - 800784a: 2201 movs r2, #1 - 800784c: f883 2680 strb.w r2, [r3, #1664] ; 0x680 - } - 8007850: bf00 nop - 8007852: 372c adds r7, #44 ; 0x2c - 8007854: 46bd mov sp, r7 - 8007856: bd90 pop {r4, r7, pc} + /* Set the UART DMA transfer complete callback */ + huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt; + 80078d6: 68fb ldr r3, [r7, #12] + 80078d8: 6e9b ldr r3, [r3, #104] ; 0x68 + 80078da: 4a20 ldr r2, [pc, #128] ; (800795c ) + 80078dc: 63da str r2, [r3, #60] ; 0x3c -08007858 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8syncTimeEPh>: - void syncTime(uint8_t * data) - 8007858: b580 push {r7, lr} - 800785a: b086 sub sp, #24 - 800785c: af00 add r7, sp, #0 - 800785e: 6078 str r0, [r7, #4] - 8007860: 6039 str r1, [r7, #0] - std_msgs::Time t; - 8007862: f107 0308 add.w r3, r7, #8 - 8007866: 4618 mov r0, r3 - 8007868: f7fd fe78 bl 800555c <_ZN8std_msgs4TimeC1Ev> - uint32_t offset = hardware_.time() - rt_time; - 800786c: 687b ldr r3, [r7, #4] - 800786e: 3304 adds r3, #4 - 8007870: 4618 mov r0, r3 - 8007872: f7fe fde5 bl 8006440 <_ZN13STM32Hardware4timeEv> - 8007876: 4602 mov r2, r0 - 8007878: 687b ldr r3, [r7, #4] - 800787a: f8d3 3194 ldr.w r3, [r3, #404] ; 0x194 - 800787e: 1ad3 subs r3, r2, r3 - 8007880: 617b str r3, [r7, #20] - t.deserialize(data); - 8007882: f107 0308 add.w r3, r7, #8 - 8007886: 6839 ldr r1, [r7, #0] - 8007888: 4618 mov r0, r3 - 800788a: f7fd fed7 bl 800563c <_ZN8std_msgs4Time11deserializeEPh> - t.data.sec += offset / 1000; - 800788e: 68fa ldr r2, [r7, #12] - 8007890: 697b ldr r3, [r7, #20] - 8007892: 4915 ldr r1, [pc, #84] ; (80078e8 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8syncTimeEPh+0x90>) - 8007894: fba1 1303 umull r1, r3, r1, r3 - 8007898: 099b lsrs r3, r3, #6 - 800789a: 4413 add r3, r2 - 800789c: 60fb str r3, [r7, #12] - t.data.nsec += (offset % 1000) * 1000000UL; - 800789e: 6939 ldr r1, [r7, #16] - 80078a0: 697a ldr r2, [r7, #20] - 80078a2: 4b11 ldr r3, [pc, #68] ; (80078e8 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8syncTimeEPh+0x90>) - 80078a4: fba3 0302 umull r0, r3, r3, r2 - 80078a8: 099b lsrs r3, r3, #6 - 80078aa: f44f 707a mov.w r0, #1000 ; 0x3e8 - 80078ae: fb00 f303 mul.w r3, r0, r3 - 80078b2: 1ad3 subs r3, r2, r3 - 80078b4: 4a0d ldr r2, [pc, #52] ; (80078ec <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8syncTimeEPh+0x94>) - 80078b6: fb02 f303 mul.w r3, r2, r3 - 80078ba: 440b add r3, r1 - 80078bc: 613b str r3, [r7, #16] - this->setNow(t.data); - 80078be: f107 0308 add.w r3, r7, #8 - 80078c2: 3304 adds r3, #4 - 80078c4: 4619 mov r1, r3 - 80078c6: 6878 ldr r0, [r7, #4] - 80078c8: f000 f8a4 bl 8007a14 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE6setNowERNS_4TimeE> - last_sync_receive_time = hardware_.time(); - 80078cc: 687b ldr r3, [r7, #4] - 80078ce: 3304 adds r3, #4 - 80078d0: 4618 mov r0, r3 - 80078d2: f7fe fdb5 bl 8006440 <_ZN13STM32Hardware4timeEv> - 80078d6: 4602 mov r2, r0 - 80078d8: 687b ldr r3, [r7, #4] - 80078da: f8c3 2688 str.w r2, [r3, #1672] ; 0x688 - } - 80078de: bf00 nop - 80078e0: 3718 adds r7, #24 - 80078e2: 46bd mov sp, r7 - 80078e4: bd80 pop {r7, pc} - 80078e6: bf00 nop - 80078e8: 10624dd3 .word 0x10624dd3 - 80078ec: 000f4240 .word 0x000f4240 + /* Set the UART DMA Half transfer complete callback */ + huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt; + 80078de: 68fb ldr r3, [r7, #12] + 80078e0: 6e9b ldr r3, [r3, #104] ; 0x68 + 80078e2: 4a1f ldr r2, [pc, #124] ; (8007960 ) + 80078e4: 641a str r2, [r3, #64] ; 0x40 -080078f0 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE>: + /* Set the DMA error callback */ + huart->hdmatx->XferErrorCallback = UART_DMAError; + 80078e6: 68fb ldr r3, [r7, #12] + 80078e8: 6e9b ldr r3, [r3, #104] ; 0x68 + 80078ea: 4a1e ldr r2, [pc, #120] ; (8007964 ) + 80078ec: 64da str r2, [r3, #76] ; 0x4c - virtual int publish(int id, const Msg * msg) - 80078f0: b580 push {r7, lr} - 80078f2: b088 sub sp, #32 - 80078f4: af00 add r7, sp, #0 - 80078f6: 60f8 str r0, [r7, #12] - 80078f8: 60b9 str r1, [r7, #8] - 80078fa: 607a str r2, [r7, #4] - { - if (id >= 100 && !configured_) - 80078fc: 68bb ldr r3, [r7, #8] - 80078fe: 2b63 cmp r3, #99 ; 0x63 - 8007900: dd09 ble.n 8007916 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x26> - 8007902: 68fb ldr r3, [r7, #12] - 8007904: f893 3680 ldrb.w r3, [r3, #1664] ; 0x680 - 8007908: f083 0301 eor.w r3, r3, #1 - 800790c: b2db uxtb r3, r3 - 800790e: 2b00 cmp r3, #0 - 8007910: d001 beq.n 8007916 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x26> - return 0; - 8007912: 2300 movs r3, #0 - 8007914: e077 b.n 8007a06 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x116> + /* Set the DMA abort callback */ + huart->hdmatx->XferAbortCallback = NULL; + 80078ee: 68fb ldr r3, [r7, #12] + 80078f0: 6e9b ldr r3, [r3, #104] ; 0x68 + 80078f2: 2200 movs r2, #0 + 80078f4: 651a str r2, [r3, #80] ; 0x50 - /* serialize message */ - int l = msg->serialize(message_out + 7); - 8007916: 687b ldr r3, [r7, #4] - 8007918: 681b ldr r3, [r3, #0] - 800791a: 681b ldr r3, [r3, #0] - 800791c: 68fa ldr r2, [r7, #12] - 800791e: f502 7269 add.w r2, r2, #932 ; 0x3a4 - 8007922: 3207 adds r2, #7 - 8007924: 4611 mov r1, r2 - 8007926: 6878 ldr r0, [r7, #4] - 8007928: 4798 blx r3 - 800792a: 6178 str r0, [r7, #20] + /* Enable the UART transmit DMA channel */ + if (HAL_DMA_Start_IT(huart->hdmatx, (uint32_t)huart->pTxBuffPtr, (uint32_t)&huart->Instance->TDR, Size) != HAL_OK) + 80078f6: 68fb ldr r3, [r7, #12] + 80078f8: 6e98 ldr r0, [r3, #104] ; 0x68 + 80078fa: 68fb ldr r3, [r7, #12] + 80078fc: 6cdb ldr r3, [r3, #76] ; 0x4c + 80078fe: 4619 mov r1, r3 + 8007900: 68fb ldr r3, [r7, #12] + 8007902: 681b ldr r3, [r3, #0] + 8007904: 3328 adds r3, #40 ; 0x28 + 8007906: 461a mov r2, r3 + 8007908: 88fb ldrh r3, [r7, #6] + 800790a: f7fd f9d5 bl 8004cb8 + 800790e: 4603 mov r3, r0 + 8007910: 2b00 cmp r3, #0 + 8007912: d00b beq.n 800792c + { + /* Set error code to DMA */ + huart->ErrorCode = HAL_UART_ERROR_DMA; + 8007914: 68fb ldr r3, [r7, #12] + 8007916: 2210 movs r2, #16 + 8007918: 67da str r2, [r3, #124] ; 0x7c - /* setup the header */ - message_out[0] = 0xff; + /* Process Unlocked */ + __HAL_UNLOCK(huart); + 800791a: 68fb ldr r3, [r7, #12] + 800791c: 2200 movs r2, #0 + 800791e: f883 2070 strb.w r2, [r3, #112] ; 0x70 + + /* Restore huart->gState to ready */ + huart->gState = HAL_UART_STATE_READY; + 8007922: 68fb ldr r3, [r7, #12] + 8007924: 2220 movs r2, #32 + 8007926: 675a str r2, [r3, #116] ; 0x74 + + return HAL_ERROR; + 8007928: 2301 movs r3, #1 + 800792a: e012 b.n 8007952 + } + } + /* Clear the TC flag in the ICR register */ + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_TCF); 800792c: 68fb ldr r3, [r7, #12] - 800792e: 22ff movs r2, #255 ; 0xff - 8007930: f883 23a4 strb.w r2, [r3, #932] ; 0x3a4 - message_out[1] = PROTOCOL_VER; + 800792e: 681b ldr r3, [r3, #0] + 8007930: 2240 movs r2, #64 ; 0x40 + 8007932: 621a str r2, [r3, #32] + + /* Process Unlocked */ + __HAL_UNLOCK(huart); 8007934: 68fb ldr r3, [r7, #12] - 8007936: 22fe movs r2, #254 ; 0xfe - 8007938: f883 23a5 strb.w r2, [r3, #933] ; 0x3a5 - message_out[2] = (uint8_t)((uint16_t)l & 255); - 800793c: 697b ldr r3, [r7, #20] - 800793e: b2da uxtb r2, r3 - 8007940: 68fb ldr r3, [r7, #12] - 8007942: f883 23a6 strb.w r2, [r3, #934] ; 0x3a6 - message_out[3] = (uint8_t)((uint16_t)l >> 8); - 8007946: 697b ldr r3, [r7, #20] - 8007948: b29b uxth r3, r3 - 800794a: 121b asrs r3, r3, #8 - 800794c: b2da uxtb r2, r3 - 800794e: 68fb ldr r3, [r7, #12] - 8007950: f883 23a7 strb.w r2, [r3, #935] ; 0x3a7 - message_out[4] = 255 - ((message_out[2] + message_out[3]) % 256); - 8007954: 68fb ldr r3, [r7, #12] - 8007956: f893 23a6 ldrb.w r2, [r3, #934] ; 0x3a6 - 800795a: 68fb ldr r3, [r7, #12] - 800795c: f893 33a7 ldrb.w r3, [r3, #935] ; 0x3a7 - 8007960: 4413 add r3, r2 - 8007962: b2db uxtb r3, r3 - 8007964: 43db mvns r3, r3 - 8007966: b2da uxtb r2, r3 - 8007968: 68fb ldr r3, [r7, #12] - 800796a: f883 23a8 strb.w r2, [r3, #936] ; 0x3a8 - message_out[5] = (uint8_t)((int16_t)id & 255); - 800796e: 68bb ldr r3, [r7, #8] - 8007970: b2da uxtb r2, r3 - 8007972: 68fb ldr r3, [r7, #12] - 8007974: f883 23a9 strb.w r2, [r3, #937] ; 0x3a9 - message_out[6] = (uint8_t)((int16_t)id >> 8); - 8007978: 68bb ldr r3, [r7, #8] - 800797a: b21b sxth r3, r3 - 800797c: 121b asrs r3, r3, #8 - 800797e: b2da uxtb r2, r3 - 8007980: 68fb ldr r3, [r7, #12] - 8007982: f883 23aa strb.w r2, [r3, #938] ; 0x3aa + 8007936: 2200 movs r2, #0 + 8007938: f883 2070 strb.w r2, [r3, #112] ; 0x70 - /* calculate checksum */ - int chk = 0; - 8007986: 2300 movs r3, #0 - 8007988: 61fb str r3, [r7, #28] - for (int i = 5; i < l + 7; i++) - 800798a: 2305 movs r3, #5 - 800798c: 61bb str r3, [r7, #24] - 800798e: 697b ldr r3, [r7, #20] - 8007990: 3307 adds r3, #7 - 8007992: 69ba ldr r2, [r7, #24] - 8007994: 429a cmp r2, r3 - 8007996: da0d bge.n 80079b4 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0xc4> - chk += message_out[i]; - 8007998: 68fa ldr r2, [r7, #12] - 800799a: 69bb ldr r3, [r7, #24] - 800799c: 4413 add r3, r2 - 800799e: f503 7369 add.w r3, r3, #932 ; 0x3a4 - 80079a2: 781b ldrb r3, [r3, #0] - 80079a4: 461a mov r2, r3 - 80079a6: 69fb ldr r3, [r7, #28] - 80079a8: 4413 add r3, r2 - 80079aa: 61fb str r3, [r7, #28] - for (int i = 5; i < l + 7; i++) - 80079ac: 69bb ldr r3, [r7, #24] - 80079ae: 3301 adds r3, #1 - 80079b0: 61bb str r3, [r7, #24] - 80079b2: e7ec b.n 800798e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x9e> - l += 7; - 80079b4: 697b ldr r3, [r7, #20] - 80079b6: 3307 adds r3, #7 - 80079b8: 617b str r3, [r7, #20] - message_out[l++] = 255 - (chk % 256); - 80079ba: 69fb ldr r3, [r7, #28] - 80079bc: 425a negs r2, r3 - 80079be: b2db uxtb r3, r3 - 80079c0: b2d2 uxtb r2, r2 - 80079c2: bf58 it pl - 80079c4: 4253 negpl r3, r2 - 80079c6: b2da uxtb r2, r3 - 80079c8: 697b ldr r3, [r7, #20] - 80079ca: 1c59 adds r1, r3, #1 - 80079cc: 6179 str r1, [r7, #20] - 80079ce: 43d2 mvns r2, r2 - 80079d0: b2d1 uxtb r1, r2 - 80079d2: 68fa ldr r2, [r7, #12] - 80079d4: 4413 add r3, r2 - 80079d6: 460a mov r2, r1 - 80079d8: f883 23a4 strb.w r2, [r3, #932] ; 0x3a4 + /* Enable the DMA transfer for transmit request by setting the DMAT bit + in the UART CR3 register */ + SET_BIT(huart->Instance->CR3, USART_CR3_DMAT); + 800793c: 68fb ldr r3, [r7, #12] + 800793e: 681b ldr r3, [r3, #0] + 8007940: 689a ldr r2, [r3, #8] + 8007942: 68fb ldr r3, [r7, #12] + 8007944: 681b ldr r3, [r3, #0] + 8007946: f042 0280 orr.w r2, r2, #128 ; 0x80 + 800794a: 609a str r2, [r3, #8] - if (l <= OUTPUT_SIZE) - 80079dc: 697b ldr r3, [r7, #20] - 80079de: f5b3 7f00 cmp.w r3, #512 ; 0x200 - 80079e2: dc0a bgt.n 80079fa <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x10a> - { - hardware_.write(message_out, l); - 80079e4: 68fb ldr r3, [r7, #12] - 80079e6: 1d18 adds r0, r3, #4 - 80079e8: 68fb ldr r3, [r7, #12] - 80079ea: f503 7369 add.w r3, r3, #932 ; 0x3a4 - 80079ee: 697a ldr r2, [r7, #20] - 80079f0: 4619 mov r1, r3 - 80079f2: f7fe fce1 bl 80063b8 <_ZN13STM32Hardware5writeEPhi> - return l; - 80079f6: 697b ldr r3, [r7, #20] - 80079f8: e005 b.n 8007a06 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x116> - } - else - { - logerror("Message from device dropped: message larger than buffer."); - 80079fa: 4905 ldr r1, [pc, #20] ; (8007a10 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x120>) - 80079fc: 68f8 ldr r0, [r7, #12] - 80079fe: f000 f849 bl 8007a94 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8logerrorEPKc> - return -1; - 8007a02: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff - } - } - 8007a06: 4618 mov r0, r3 - 8007a08: 3720 adds r7, #32 - 8007a0a: 46bd mov sp, r7 - 8007a0c: bd80 pop {r7, pc} - 8007a0e: bf00 nop - 8007a10: 0800a3c4 .word 0x0800a3c4 - -08007a14 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE6setNowERNS_4TimeE>: - void setNow(Time & new_now) - 8007a14: b580 push {r7, lr} - 8007a16: b084 sub sp, #16 - 8007a18: af00 add r7, sp, #0 - 8007a1a: 6078 str r0, [r7, #4] - 8007a1c: 6039 str r1, [r7, #0] - uint32_t ms = hardware_.time(); - 8007a1e: 687b ldr r3, [r7, #4] - 8007a20: 3304 adds r3, #4 - 8007a22: 4618 mov r0, r3 - 8007a24: f7fe fd0c bl 8006440 <_ZN13STM32Hardware4timeEv> - 8007a28: 60f8 str r0, [r7, #12] - sec_offset = new_now.sec - ms / 1000 - 1; - 8007a2a: 683b ldr r3, [r7, #0] - 8007a2c: 681a ldr r2, [r3, #0] - 8007a2e: 68fb ldr r3, [r7, #12] - 8007a30: 4915 ldr r1, [pc, #84] ; (8007a88 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE6setNowERNS_4TimeE+0x74>) - 8007a32: fba1 1303 umull r1, r3, r1, r3 - 8007a36: 099b lsrs r3, r3, #6 - 8007a38: 1ad3 subs r3, r2, r3 - 8007a3a: 1e5a subs r2, r3, #1 - 8007a3c: 687b ldr r3, [r7, #4] - 8007a3e: f8c3 2198 str.w r2, [r3, #408] ; 0x198 - nsec_offset = new_now.nsec - (ms % 1000) * 1000000UL + 1000000000UL; - 8007a42: 683b ldr r3, [r7, #0] - 8007a44: 6859 ldr r1, [r3, #4] - 8007a46: 68fa ldr r2, [r7, #12] - 8007a48: 4b0f ldr r3, [pc, #60] ; (8007a88 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE6setNowERNS_4TimeE+0x74>) - 8007a4a: fba3 0302 umull r0, r3, r3, r2 - 8007a4e: 099b lsrs r3, r3, #6 - 8007a50: f44f 707a mov.w r0, #1000 ; 0x3e8 - 8007a54: fb00 f303 mul.w r3, r0, r3 - 8007a58: 1ad3 subs r3, r2, r3 - 8007a5a: 4a0c ldr r2, [pc, #48] ; (8007a8c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE6setNowERNS_4TimeE+0x78>) - 8007a5c: fb02 f303 mul.w r3, r2, r3 - 8007a60: 1aca subs r2, r1, r3 - 8007a62: 4b0b ldr r3, [pc, #44] ; (8007a90 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE6setNowERNS_4TimeE+0x7c>) - 8007a64: 4413 add r3, r2 - 8007a66: 687a ldr r2, [r7, #4] - 8007a68: f8c2 319c str.w r3, [r2, #412] ; 0x19c - normalizeSecNSec(sec_offset, nsec_offset); - 8007a6c: 687b ldr r3, [r7, #4] - 8007a6e: f503 72cc add.w r2, r3, #408 ; 0x198 - 8007a72: 687b ldr r3, [r7, #4] - 8007a74: f503 73ce add.w r3, r3, #412 ; 0x19c - 8007a78: 4619 mov r1, r3 - 8007a7a: 4610 mov r0, r2 - 8007a7c: f000 fd7c bl 8008578 <_ZN3ros16normalizeSecNSecERmS0_> - } - 8007a80: bf00 nop - 8007a82: 3710 adds r7, #16 - 8007a84: 46bd mov sp, r7 - 8007a86: bd80 pop {r7, pc} - 8007a88: 10624dd3 .word 0x10624dd3 - 8007a8c: 000f4240 .word 0x000f4240 - 8007a90: 3b9aca00 .word 0x3b9aca00 - -08007a94 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8logerrorEPKc>: - } - void logwarn(const char *msg) - { - log(rosserial_msgs::Log::WARN, msg); + return HAL_OK; + 800794c: 2300 movs r3, #0 + 800794e: e000 b.n 8007952 } - void logerror(const char*msg) - 8007a94: b580 push {r7, lr} - 8007a96: b082 sub sp, #8 - 8007a98: af00 add r7, sp, #0 - 8007a9a: 6078 str r0, [r7, #4] - 8007a9c: 6039 str r1, [r7, #0] + else { - log(rosserial_msgs::Log::ERROR, msg); - 8007a9e: 683a ldr r2, [r7, #0] - 8007aa0: 2103 movs r1, #3 - 8007aa2: 6878 ldr r0, [r7, #4] - 8007aa4: f000 f804 bl 8007ab0 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE3logEcPKc> - } - 8007aa8: bf00 nop - 8007aaa: 3708 adds r7, #8 - 8007aac: 46bd mov sp, r7 - 8007aae: bd80 pop {r7, pc} - -08007ab0 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE3logEcPKc>: - void log(char byte, const char * msg) - 8007ab0: b580 push {r7, lr} - 8007ab2: b088 sub sp, #32 - 8007ab4: af00 add r7, sp, #0 - 8007ab6: 60f8 str r0, [r7, #12] - 8007ab8: 460b mov r3, r1 - 8007aba: 607a str r2, [r7, #4] - 8007abc: 72fb strb r3, [r7, #11] - rosserial_msgs::Log l; - 8007abe: f107 0314 add.w r3, r7, #20 - 8007ac2: 4618 mov r0, r3 - 8007ac4: f7fd fffe bl 8005ac4 <_ZN14rosserial_msgs3LogC1Ev> - l.level = byte; - 8007ac8: 7afb ldrb r3, [r7, #11] - 8007aca: 763b strb r3, [r7, #24] - l.msg = (char*)msg; - 8007acc: 687b ldr r3, [r7, #4] - 8007ace: 61fb str r3, [r7, #28] - publish(rosserial_msgs::TopicInfo::ID_LOG, &l); - 8007ad0: 68fb ldr r3, [r7, #12] - 8007ad2: 681b ldr r3, [r3, #0] - 8007ad4: 681b ldr r3, [r3, #0] - 8007ad6: f107 0214 add.w r2, r7, #20 - 8007ada: 2107 movs r1, #7 - 8007adc: 68f8 ldr r0, [r7, #12] - 8007ade: 4798 blx r3 + return HAL_BUSY; + 8007950: 2302 movs r3, #2 } - 8007ae0: bf00 nop - 8007ae2: 3720 adds r7, #32 - 8007ae4: 46bd mov sp, r7 - 8007ae6: bd80 pop {r7, pc} - -08007ae8 <_Z41__static_initialization_and_destruction_0ii>: - 8007ae8: b5f0 push {r4, r5, r6, r7, lr} - 8007aea: b08f sub sp, #60 ; 0x3c - 8007aec: af0c add r7, sp, #48 ; 0x30 - 8007aee: 6078 str r0, [r7, #4] - 8007af0: 6039 str r1, [r7, #0] - 8007af2: 687b ldr r3, [r7, #4] - 8007af4: 2b01 cmp r3, #1 - 8007af6: d136 bne.n 8007b66 <_Z41__static_initialization_and_destruction_0ii+0x7e> - 8007af8: 683b ldr r3, [r7, #0] - 8007afa: f64f 72ff movw r2, #65535 ; 0xffff - 8007afe: 4293 cmp r3, r2 - 8007b00: d131 bne.n 8007b66 <_Z41__static_initialization_and_destruction_0ii+0x7e> -Encoder left_encoder = Encoder(&htim2); - 8007b02: 491b ldr r1, [pc, #108] ; (8007b70 <_Z41__static_initialization_and_destruction_0ii+0x88>) - 8007b04: 481b ldr r0, [pc, #108] ; (8007b74 <_Z41__static_initialization_and_destruction_0ii+0x8c>) - 8007b06: f7fc fc6f bl 80043e8 <_ZN7EncoderC1EP17TIM_HandleTypeDef> -Encoder right_encoder = Encoder(&htim5); - 8007b0a: 491b ldr r1, [pc, #108] ; (8007b78 <_Z41__static_initialization_and_destruction_0ii+0x90>) - 8007b0c: 481b ldr r0, [pc, #108] ; (8007b7c <_Z41__static_initialization_and_destruction_0ii+0x94>) - 8007b0e: f7fc fc6b bl 80043e8 <_ZN7EncoderC1EP17TIM_HandleTypeDef> -OdometryCalc odom = OdometryCalc(left_encoder, right_encoder); - 8007b12: 4e18 ldr r6, [pc, #96] ; (8007b74 <_Z41__static_initialization_and_destruction_0ii+0x8c>) - 8007b14: 4b19 ldr r3, [pc, #100] ; (8007b7c <_Z41__static_initialization_and_destruction_0ii+0x94>) - 8007b16: ac04 add r4, sp, #16 - 8007b18: 461d mov r5, r3 - 8007b1a: cd0f ldmia r5!, {r0, r1, r2, r3} - 8007b1c: c40f stmia r4!, {r0, r1, r2, r3} - 8007b1e: e895 0007 ldmia.w r5, {r0, r1, r2} - 8007b22: e884 0007 stmia.w r4, {r0, r1, r2} - 8007b26: 466c mov r4, sp - 8007b28: f106 030c add.w r3, r6, #12 - 8007b2c: cb0f ldmia r3, {r0, r1, r2, r3} - 8007b2e: e884 000f stmia.w r4, {r0, r1, r2, r3} - 8007b32: e896 000e ldmia.w r6, {r1, r2, r3} - 8007b36: 4812 ldr r0, [pc, #72] ; (8007b80 <_Z41__static_initialization_and_destruction_0ii+0x98>) - 8007b38: f7fd fcdc bl 80054f4 <_ZN12OdometryCalcC1E7EncoderS0_> -ros::NodeHandle nh; - 8007b3c: 4811 ldr r0, [pc, #68] ; (8007b84 <_Z41__static_initialization_and_destruction_0ii+0x9c>) - 8007b3e: f7ff fad9 bl 80070f4 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev> -std_msgs::String str_msg; - 8007b42: 4811 ldr r0, [pc, #68] ; (8007b88 <_Z41__static_initialization_and_destruction_0ii+0xa0>) - 8007b44: f7fe fc88 bl 8006458 <_ZN8std_msgs6StringC1Ev> -nav_msgs::Odometry odometry; - 8007b48: 4810 ldr r0, [pc, #64] ; (8007b8c <_Z41__static_initialization_and_destruction_0ii+0xa4>) - 8007b4a: f7fd fbdd bl 8005308 <_ZN8nav_msgs8OdometryC1Ev> -ros::Publisher chatter("chatter", &str_msg); - 8007b4e: 2300 movs r3, #0 - 8007b50: 4a0d ldr r2, [pc, #52] ; (8007b88 <_Z41__static_initialization_and_destruction_0ii+0xa0>) - 8007b52: 490f ldr r1, [pc, #60] ; (8007b90 <_Z41__static_initialization_and_destruction_0ii+0xa8>) - 8007b54: 480f ldr r0, [pc, #60] ; (8007b94 <_Z41__static_initialization_and_destruction_0ii+0xac>) - 8007b56: f7fe fb27 bl 80061a8 <_ZN3ros9PublisherC1EPKcPNS_3MsgEi> -ros::Publisher odom_pub("odom_pub", &odometry); - 8007b5a: 2300 movs r3, #0 - 8007b5c: 4a0b ldr r2, [pc, #44] ; (8007b8c <_Z41__static_initialization_and_destruction_0ii+0xa4>) - 8007b5e: 490e ldr r1, [pc, #56] ; (8007b98 <_Z41__static_initialization_and_destruction_0ii+0xb0>) - 8007b60: 480e ldr r0, [pc, #56] ; (8007b9c <_Z41__static_initialization_and_destruction_0ii+0xb4>) - 8007b62: f7fe fb21 bl 80061a8 <_ZN3ros9PublisherC1EPKcPNS_3MsgEi> } - 8007b66: bf00 nop - 8007b68: 370c adds r7, #12 - 8007b6a: 46bd mov sp, r7 - 8007b6c: bdf0 pop {r4, r5, r6, r7, pc} - 8007b6e: bf00 nop - 8007b70: 200000a4 .word 0x200000a4 - 8007b74: 20000424 .word 0x20000424 - 8007b78: 20000164 .word 0x20000164 - 8007b7c: 20000440 .word 0x20000440 - 8007b80: 2000045c .word 0x2000045c - 8007b84: 2000062c .word 0x2000062c - 8007b88: 20000ce8 .word 0x20000ce8 - 8007b8c: 20000cf0 .word 0x20000cf0 - 8007b90: 0800a400 .word 0x0800a400 - 8007b94: 20000e80 .word 0x20000e80 - 8007b98: 0800a408 .word 0x0800a408 - 8007b9c: 20000e94 .word 0x20000e94 - -08007ba0 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE9connectedEv>: - virtual bool connected() - 8007ba0: b480 push {r7} - 8007ba2: b083 sub sp, #12 - 8007ba4: af00 add r7, sp, #0 - 8007ba6: 6078 str r0, [r7, #4] - return configured_; - 8007ba8: 687b ldr r3, [r7, #4] - 8007baa: f893 3680 ldrb.w r3, [r3, #1664] ; 0x680 - }; - 8007bae: 4618 mov r0, r3 - 8007bb0: 370c adds r7, #12 - 8007bb2: 46bd mov sp, r7 - 8007bb4: f85d 7b04 ldr.w r7, [sp], #4 - 8007bb8: 4770 bx lr - -08007bba <_GLOBAL__sub_I_htim2>: - 8007bba: b580 push {r7, lr} - 8007bbc: af00 add r7, sp, #0 - 8007bbe: f64f 71ff movw r1, #65535 ; 0xffff - 8007bc2: 2001 movs r0, #1 - 8007bc4: f7ff ff90 bl 8007ae8 <_Z41__static_initialization_and_destruction_0ii> - 8007bc8: bd80 pop {r7, pc} - -08007bca <_ZSt3cosf>: - using ::cos; - -#ifndef __CORRECT_ISO_CPP_MATH_H_PROTO - inline _GLIBCXX_CONSTEXPR float - cos(float __x) - { return __builtin_cosf(__x); } - 8007bca: b580 push {r7, lr} - 8007bcc: b082 sub sp, #8 - 8007bce: af00 add r7, sp, #0 - 8007bd0: ed87 0a01 vstr s0, [r7, #4] - 8007bd4: ed97 0a01 vldr s0, [r7, #4] - 8007bd8: f000 fdb2 bl 8008740 - 8007bdc: eef0 7a40 vmov.f32 s15, s0 - 8007be0: eeb0 0a67 vmov.f32 s0, s15 - 8007be4: 3708 adds r7, #8 - 8007be6: 46bd mov sp, r7 - 8007be8: bd80 pop {r7, pc} - -08007bea <_ZSt3sinf>: - using ::sin; - -#ifndef __CORRECT_ISO_CPP_MATH_H_PROTO - inline _GLIBCXX_CONSTEXPR float - sin(float __x) - { return __builtin_sinf(__x); } - 8007bea: b580 push {r7, lr} - 8007bec: b082 sub sp, #8 - 8007bee: af00 add r7, sp, #0 - 8007bf0: ed87 0a01 vstr s0, [r7, #4] - 8007bf4: ed97 0a01 vldr s0, [r7, #4] - 8007bf8: f000 fde2 bl 80087c0 - 8007bfc: eef0 7a40 vmov.f32 s15, s0 - 8007c00: eeb0 0a67 vmov.f32 s0, s15 - 8007c04: 3708 adds r7, #8 - 8007c06: 46bd mov sp, r7 - 8007c08: bd80 pop {r7, pc} - -08007c0a <_ZN2tfL23createQuaternionFromYawEd>: - -namespace tf -{ - -static inline geometry_msgs::Quaternion createQuaternionFromYaw(double yaw) + 8007952: 4618 mov r0, r3 + 8007954: 3710 adds r7, #16 + 8007956: 46bd mov sp, r7 + 8007958: bd80 pop {r7, pc} + 800795a: bf00 nop + 800795c: 080084c9 .word 0x080084c9 + 8007960: 08008519 .word 0x08008519 + 8007964: 080085b5 .word 0x080085b5 + +08007968 : + * @param pData Pointer to data buffer. + * @param Size Amount of data to be received. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) { - 8007c0a: b580 push {r7, lr} - 8007c0c: b084 sub sp, #16 - 8007c0e: af00 add r7, sp, #0 - 8007c10: 60f8 str r0, [r7, #12] - 8007c12: ed87 0b00 vstr d0, [r7] - geometry_msgs::Quaternion q; - 8007c16: 68f8 ldr r0, [r7, #12] - 8007c18: f7fc ffbc bl 8004b94 <_ZN13geometry_msgs10QuaternionC1Ev> - q.x = 0; - 8007c1c: 68fb ldr r3, [r7, #12] - 8007c1e: f04f 0200 mov.w r2, #0 - 8007c22: 605a str r2, [r3, #4] - q.y = 0; - 8007c24: 68fb ldr r3, [r7, #12] - 8007c26: f04f 0200 mov.w r2, #0 - 8007c2a: 609a str r2, [r3, #8] - q.z = sin(yaw * 0.5); - 8007c2c: ed97 7b00 vldr d7, [r7] - 8007c30: eeb6 6b00 vmov.f64 d6, #96 ; 0x3f000000 0.5 - 8007c34: ee27 7b06 vmul.f64 d7, d7, d6 - 8007c38: eeb0 0b47 vmov.f64 d0, d7 - 8007c3c: f000 fd44 bl 80086c8 - 8007c40: eeb0 7b40 vmov.f64 d7, d0 - 8007c44: eef7 7bc7 vcvt.f32.f64 s15, d7 - 8007c48: 68fb ldr r3, [r7, #12] - 8007c4a: edc3 7a03 vstr s15, [r3, #12] - q.w = cos(yaw * 0.5); - 8007c4e: ed97 7b00 vldr d7, [r7] - 8007c52: eeb6 6b00 vmov.f64 d6, #96 ; 0x3f000000 0.5 - 8007c56: ee27 7b06 vmul.f64 d7, d7, d6 - 8007c5a: eeb0 0b47 vmov.f64 d0, d7 - 8007c5e: f000 fcf7 bl 8008650 - 8007c62: eeb0 7b40 vmov.f64 d7, d0 - 8007c66: eef7 7bc7 vcvt.f32.f64 s15, d7 - 8007c6a: 68fb ldr r3, [r7, #12] - 8007c6c: edc3 7a04 vstr s15, [r3, #16] - return q; - 8007c70: bf00 nop -} - 8007c72: 68f8 ldr r0, [r7, #12] - 8007c74: 3710 adds r7, #16 - 8007c76: 46bd mov sp, r7 - 8007c78: bd80 pop {r7, pc} + 8007968: b580 push {r7, lr} + 800796a: b084 sub sp, #16 + 800796c: af00 add r7, sp, #0 + 800796e: 60f8 str r0, [r7, #12] + 8007970: 60b9 str r1, [r7, #8] + 8007972: 4613 mov r3, r2 + 8007974: 80fb strh r3, [r7, #6] + /* Check that a Rx process is not already ongoing */ + if (huart->RxState == HAL_UART_STATE_READY) + 8007976: 68fb ldr r3, [r7, #12] + 8007978: 6f9b ldr r3, [r3, #120] ; 0x78 + 800797a: 2b20 cmp r3, #32 + 800797c: d16c bne.n 8007a58 + { + if ((pData == NULL) || (Size == 0U)) + 800797e: 68bb ldr r3, [r7, #8] + 8007980: 2b00 cmp r3, #0 + 8007982: d002 beq.n 800798a + 8007984: 88fb ldrh r3, [r7, #6] + 8007986: 2b00 cmp r3, #0 + 8007988: d101 bne.n 800798e + { + return HAL_ERROR; + 800798a: 2301 movs r3, #1 + 800798c: e065 b.n 8007a5a + } -08007c7a <_ZN12OdometryCalc21OdometryUpdateMessageEv>: -#include "odometry_calc.h" -#include -#include -#include + /* Process Locked */ + __HAL_LOCK(huart); + 800798e: 68fb ldr r3, [r7, #12] + 8007990: f893 3070 ldrb.w r3, [r3, #112] ; 0x70 + 8007994: 2b01 cmp r3, #1 + 8007996: d101 bne.n 800799c + 8007998: 2302 movs r3, #2 + 800799a: e05e b.n 8007a5a + 800799c: 68fb ldr r3, [r7, #12] + 800799e: 2201 movs r2, #1 + 80079a0: f883 2070 strb.w r2, [r3, #112] ; 0x70 -void OdometryCalc::OdometryUpdateMessage(){ - 8007c7a: b580 push {r7, lr} - 8007c7c: ed2d 8b02 vpush {d8} - 8007c80: b094 sub sp, #80 ; 0x50 - 8007c82: af00 add r7, sp, #0 - 8007c84: 6078 str r0, [r7, #4] - float left_velocity = left_encoder_.GetLinearVelocity(); - 8007c86: 687b ldr r3, [r7, #4] - 8007c88: 4618 mov r0, r3 - 8007c8a: f7fc fbff bl 800448c <_ZN7Encoder17GetLinearVelocityEv> - 8007c8e: ed87 0a12 vstr s0, [r7, #72] ; 0x48 - float right_velocity = right_encoder_.GetLinearVelocity(); - 8007c92: 687b ldr r3, [r7, #4] - 8007c94: 331c adds r3, #28 - 8007c96: 4618 mov r0, r3 - 8007c98: f7fc fbf8 bl 800448c <_ZN7Encoder17GetLinearVelocityEv> - 8007c9c: ed87 0a11 vstr s0, [r7, #68] ; 0x44 + huart->pRxBuffPtr = pData; + 80079a4: 68fb ldr r3, [r7, #12] + 80079a6: 68ba ldr r2, [r7, #8] + 80079a8: 655a str r2, [r3, #84] ; 0x54 + huart->RxXferSize = Size; + 80079aa: 68fb ldr r3, [r7, #12] + 80079ac: 88fa ldrh r2, [r7, #6] + 80079ae: f8a3 2058 strh.w r2, [r3, #88] ; 0x58 - float x = odometry_.pose.pose.position.x; - 8007ca0: 687b ldr r3, [r7, #4] - 8007ca2: 6e5b ldr r3, [r3, #100] ; 0x64 - 8007ca4: 643b str r3, [r7, #64] ; 0x40 - float y = odometry_.pose.pose.position.y; - 8007ca6: 687b ldr r3, [r7, #4] - 8007ca8: 6e9b ldr r3, [r3, #104] ; 0x68 - 8007caa: 63fb str r3, [r7, #60] ; 0x3c + huart->ErrorCode = HAL_UART_ERROR_NONE; + 80079b2: 68fb ldr r3, [r7, #12] + 80079b4: 2200 movs r2, #0 + 80079b6: 67da str r2, [r3, #124] ; 0x7c + huart->RxState = HAL_UART_STATE_BUSY_RX; + 80079b8: 68fb ldr r3, [r7, #12] + 80079ba: 2222 movs r2, #34 ; 0x22 + 80079bc: 679a str r2, [r3, #120] ; 0x78 - //verificato che delta_r == delta_l - float delta_time = left_encoder_.current_millis_ - - 8007cac: 687b ldr r3, [r7, #4] - 8007cae: 689a ldr r2, [r3, #8] - left_encoder_.previous_millis_; - 8007cb0: 687b ldr r3, [r7, #4] - 8007cb2: 685b ldr r3, [r3, #4] - float delta_time = left_encoder_.current_millis_ - - 8007cb4: 1ad3 subs r3, r2, r3 - 8007cb6: ee07 3a90 vmov s15, r3 - 8007cba: eef8 7a67 vcvt.f32.u32 s15, s15 - 8007cbe: edc7 7a0e vstr s15, [r7, #56] ; 0x38 + if (huart->hdmarx != NULL) + 80079be: 68fb ldr r3, [r7, #12] + 80079c0: 6edb ldr r3, [r3, #108] ; 0x6c + 80079c2: 2b00 cmp r3, #0 + 80079c4: d02a beq.n 8007a1c + { + /* Set the UART DMA transfer complete callback */ + huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt; + 80079c6: 68fb ldr r3, [r7, #12] + 80079c8: 6edb ldr r3, [r3, #108] ; 0x6c + 80079ca: 4a26 ldr r2, [pc, #152] ; (8007a64 ) + 80079cc: 63da str r2, [r3, #60] ; 0x3c - // calcoli vari - float linear_velocity = (left_velocity + right_velocity) / 2; - 8007cc2: ed97 7a12 vldr s14, [r7, #72] ; 0x48 - 8007cc6: edd7 7a11 vldr s15, [r7, #68] ; 0x44 - 8007cca: ee37 7a27 vadd.f32 s14, s14, s15 - 8007cce: eef0 6a00 vmov.f32 s13, #0 ; 0x40000000 2.0 - 8007cd2: eec7 7a26 vdiv.f32 s15, s14, s13 - 8007cd6: edc7 7a0d vstr s15, [r7, #52] ; 0x34 - float angular_velocity; - if (right_velocity - left_velocity == 0) - 8007cda: ed97 7a11 vldr s14, [r7, #68] ; 0x44 - 8007cde: edd7 7a12 vldr s15, [r7, #72] ; 0x48 - 8007ce2: ee77 7a67 vsub.f32 s15, s14, s15 - 8007ce6: eef5 7a40 vcmp.f32 s15, #0.0 - 8007cea: eef1 fa10 vmrs APSR_nzcv, fpscr - 8007cee: d103 bne.n 8007cf8 <_ZN12OdometryCalc21OdometryUpdateMessageEv+0x7e> - angular_velocity = 0; - 8007cf0: f04f 0300 mov.w r3, #0 - 8007cf4: 64fb str r3, [r7, #76] ; 0x4c - 8007cf6: e00c b.n 8007d12 <_ZN12OdometryCalc21OdometryUpdateMessageEv+0x98> - else - angular_velocity = (right_velocity - left_velocity) / kBaseline; - 8007cf8: ed97 7a11 vldr s14, [r7, #68] ; 0x44 - 8007cfc: edd7 7a12 vldr s15, [r7, #72] ; 0x48 - 8007d00: ee77 6a67 vsub.f32 s13, s14, s15 - 8007d04: 687b ldr r3, [r7, #4] - 8007d06: ed93 7a73 vldr s14, [r3, #460] ; 0x1cc - 8007d0a: eec6 7a87 vdiv.f32 s15, s13, s14 - 8007d0e: edc7 7a13 vstr s15, [r7, #76] ; 0x4c - float diff = angular_velocity / delta_time; - 8007d12: edd7 6a13 vldr s13, [r7, #76] ; 0x4c - 8007d16: ed97 7a0e vldr s14, [r7, #56] ; 0x38 - 8007d1a: eec6 7a87 vdiv.f32 s15, s13, s14 - 8007d1e: edc7 7a0c vstr s15, [r7, #48] ; 0x30 - float r = (kBaseline / 2) * ((right_velocity + left_velocity) / - 8007d22: 687b ldr r3, [r7, #4] - 8007d24: edd3 7a73 vldr s15, [r3, #460] ; 0x1cc - 8007d28: eef0 6a00 vmov.f32 s13, #0 ; 0x40000000 2.0 - 8007d2c: ee87 7aa6 vdiv.f32 s14, s15, s13 - 8007d30: edd7 6a11 vldr s13, [r7, #68] ; 0x44 - 8007d34: edd7 7a12 vldr s15, [r7, #72] ; 0x48 - 8007d38: ee36 6aa7 vadd.f32 s12, s13, s15 - (right_velocity - left_velocity)); - 8007d3c: edd7 6a11 vldr s13, [r7, #68] ; 0x44 - 8007d40: edd7 7a12 vldr s15, [r7, #72] ; 0x48 - 8007d44: ee76 6ae7 vsub.f32 s13, s13, s15 - float r = (kBaseline / 2) * ((right_velocity + left_velocity) / - 8007d48: eec6 7a26 vdiv.f32 s15, s12, s13 - 8007d4c: ee67 7a27 vmul.f32 s15, s14, s15 - 8007d50: edc7 7a0b vstr s15, [r7, #44] ; 0x2c - float icc_x = x - r * std::sin(theta_); - 8007d54: 687b ldr r3, [r7, #4] - 8007d56: edd3 7a0e vldr s15, [r3, #56] ; 0x38 - 8007d5a: eeb0 0a67 vmov.f32 s0, s15 - 8007d5e: f7ff ff44 bl 8007bea <_ZSt3sinf> - 8007d62: eeb0 7a40 vmov.f32 s14, s0 - 8007d66: edd7 7a0b vldr s15, [r7, #44] ; 0x2c - 8007d6a: ee67 7a27 vmul.f32 s15, s14, s15 - 8007d6e: ed97 7a10 vldr s14, [r7, #64] ; 0x40 - 8007d72: ee77 7a67 vsub.f32 s15, s14, s15 - 8007d76: edc7 7a0a vstr s15, [r7, #40] ; 0x28 - float icc_y = y + r * std::cos(theta_); - 8007d7a: 687b ldr r3, [r7, #4] - 8007d7c: edd3 7a0e vldr s15, [r3, #56] ; 0x38 - 8007d80: eeb0 0a67 vmov.f32 s0, s15 - 8007d84: f7ff ff21 bl 8007bca <_ZSt3cosf> - 8007d88: eeb0 7a40 vmov.f32 s14, s0 - 8007d8c: edd7 7a0b vldr s15, [r7, #44] ; 0x2c - 8007d90: ee67 7a27 vmul.f32 s15, s14, s15 - 8007d94: ed97 7a0f vldr s14, [r7, #60] ; 0x3c - 8007d98: ee77 7a27 vadd.f32 s15, s14, s15 - 8007d9c: edc7 7a09 vstr s15, [r7, #36] ; 0x24 - float new_x = std::cos(diff) * (x - icc_x) - - 8007da0: ed97 0a0c vldr s0, [r7, #48] ; 0x30 - 8007da4: f7ff ff11 bl 8007bca <_ZSt3cosf> - 8007da8: eef0 6a40 vmov.f32 s13, s0 - 8007dac: ed97 7a10 vldr s14, [r7, #64] ; 0x40 - 8007db0: edd7 7a0a vldr s15, [r7, #40] ; 0x28 - 8007db4: ee77 7a67 vsub.f32 s15, s14, s15 - 8007db8: ee26 8aa7 vmul.f32 s16, s13, s15 - std::sin(diff) * (y - icc_y) + icc_x; - 8007dbc: ed97 0a0c vldr s0, [r7, #48] ; 0x30 - 8007dc0: f7ff ff13 bl 8007bea <_ZSt3sinf> - 8007dc4: eef0 6a40 vmov.f32 s13, s0 - 8007dc8: ed97 7a0f vldr s14, [r7, #60] ; 0x3c - 8007dcc: edd7 7a09 vldr s15, [r7, #36] ; 0x24 - 8007dd0: ee77 7a67 vsub.f32 s15, s14, s15 - 8007dd4: ee66 7aa7 vmul.f32 s15, s13, s15 - float new_x = std::cos(diff) * (x - icc_x) - - 8007dd8: ee78 7a67 vsub.f32 s15, s16, s15 - std::sin(diff) * (y - icc_y) + icc_x; - 8007ddc: ed97 7a0a vldr s14, [r7, #40] ; 0x28 - 8007de0: ee77 7a27 vadd.f32 s15, s14, s15 - 8007de4: edc7 7a08 vstr s15, [r7, #32] - float new_y = std::sin(diff) * (y - icc_y) + - 8007de8: ed97 0a0c vldr s0, [r7, #48] ; 0x30 - 8007dec: f7ff fefd bl 8007bea <_ZSt3sinf> - 8007df0: eef0 6a40 vmov.f32 s13, s0 - 8007df4: ed97 7a0f vldr s14, [r7, #60] ; 0x3c - 8007df8: edd7 7a09 vldr s15, [r7, #36] ; 0x24 - 8007dfc: ee77 7a67 vsub.f32 s15, s14, s15 - 8007e00: ee26 8aa7 vmul.f32 s16, s13, s15 - std::cos(diff) * (y - icc_y) + icc_y; - 8007e04: ed97 0a0c vldr s0, [r7, #48] ; 0x30 - 8007e08: f7ff fedf bl 8007bca <_ZSt3cosf> - 8007e0c: eef0 6a40 vmov.f32 s13, s0 - 8007e10: ed97 7a0f vldr s14, [r7, #60] ; 0x3c - 8007e14: edd7 7a09 vldr s15, [r7, #36] ; 0x24 - 8007e18: ee77 7a67 vsub.f32 s15, s14, s15 - 8007e1c: ee66 7aa7 vmul.f32 s15, s13, s15 - float new_y = std::sin(diff) * (y - icc_y) + - 8007e20: ee78 7a27 vadd.f32 s15, s16, s15 - std::cos(diff) * (y - icc_y) + icc_y; - 8007e24: ed97 7a09 vldr s14, [r7, #36] ; 0x24 - 8007e28: ee77 7a27 vadd.f32 s15, s14, s15 - 8007e2c: edc7 7a07 vstr s15, [r7, #28] - theta_ = theta_ + diff; - 8007e30: 687b ldr r3, [r7, #4] - 8007e32: ed93 7a0e vldr s14, [r3, #56] ; 0x38 - 8007e36: edd7 7a0c vldr s15, [r7, #48] ; 0x30 - 8007e3a: ee77 7a27 vadd.f32 s15, s14, s15 - 8007e3e: 687b ldr r3, [r7, #4] - 8007e40: edc3 7a0e vstr s15, [r3, #56] ; 0x38 - geometry_msgs::Quaternion q = tf::createQuaternionFromYaw(theta_); - 8007e44: 687b ldr r3, [r7, #4] - 8007e46: edd3 7a0e vldr s15, [r3, #56] ; 0x38 - 8007e4a: eeb7 7ae7 vcvt.f64.f32 d7, s15 - 8007e4e: f107 0308 add.w r3, r7, #8 - 8007e52: eeb0 0b47 vmov.f64 d0, d7 - 8007e56: 4618 mov r0, r3 - 8007e58: f7ff fed7 bl 8007c0a <_ZN2tfL23createQuaternionFromYawEd> + /* Set the UART DMA Half transfer complete callback */ + huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt; + 80079ce: 68fb ldr r3, [r7, #12] + 80079d0: 6edb ldr r3, [r3, #108] ; 0x6c + 80079d2: 4a25 ldr r2, [pc, #148] ; (8007a68 ) + 80079d4: 641a str r2, [r3, #64] ; 0x40 - //update msg - odometry_.pose.pose.position.x = new_x; - 8007e5c: 687b ldr r3, [r7, #4] - 8007e5e: 6a3a ldr r2, [r7, #32] - 8007e60: 665a str r2, [r3, #100] ; 0x64 - odometry_.pose.pose.position.y = new_y; - 8007e62: 687b ldr r3, [r7, #4] - 8007e64: 69fa ldr r2, [r7, #28] - 8007e66: 669a str r2, [r3, #104] ; 0x68 - odometry_.pose.pose.orientation.x = q.x; - 8007e68: 68fa ldr r2, [r7, #12] - 8007e6a: 687b ldr r3, [r7, #4] - 8007e6c: 675a str r2, [r3, #116] ; 0x74 - odometry_.pose.pose.orientation.y = q.y; - 8007e6e: 693a ldr r2, [r7, #16] - 8007e70: 687b ldr r3, [r7, #4] - 8007e72: 679a str r2, [r3, #120] ; 0x78 - odometry_.pose.pose.orientation.z = q.z; - 8007e74: 697a ldr r2, [r7, #20] - 8007e76: 687b ldr r3, [r7, #4] - 8007e78: 67da str r2, [r3, #124] ; 0x7c - odometry_.pose.pose.orientation.w = q.w; - 8007e7a: 69ba ldr r2, [r7, #24] - 8007e7c: 687b ldr r3, [r7, #4] - 8007e7e: f8c3 2080 str.w r2, [r3, #128] ; 0x80 - odometry_.twist.twist.linear.x = linear_velocity; - 8007e82: 687b ldr r3, [r7, #4] - 8007e84: 6b7a ldr r2, [r7, #52] ; 0x34 - 8007e86: f8c3 2120 str.w r2, [r3, #288] ; 0x120 - odometry_.twist.twist.angular.z = angular_velocity; - 8007e8a: 687b ldr r3, [r7, #4] - 8007e8c: 6cfa ldr r2, [r7, #76] ; 0x4c - 8007e8e: f8c3 2138 str.w r2, [r3, #312] ; 0x138 + /* Set the DMA error callback */ + huart->hdmarx->XferErrorCallback = UART_DMAError; + 80079d6: 68fb ldr r3, [r7, #12] + 80079d8: 6edb ldr r3, [r3, #108] ; 0x6c + 80079da: 4a24 ldr r2, [pc, #144] ; (8007a6c ) + 80079dc: 64da str r2, [r3, #76] ; 0x4c - return; - 8007e92: bf00 nop -} - 8007e94: 3750 adds r7, #80 ; 0x50 - 8007e96: 46bd mov sp, r7 - 8007e98: ecbd 8b02 vpop {d8} - 8007e9c: bd80 pop {r7, pc} - ... + /* Set the DMA abort callback */ + huart->hdmarx->XferAbortCallback = NULL; + 80079de: 68fb ldr r3, [r7, #12] + 80079e0: 6edb ldr r3, [r3, #108] ; 0x6c + 80079e2: 2200 movs r2, #0 + 80079e4: 651a str r2, [r3, #80] ; 0x50 -08007ea0 : -void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim); - /** - * Initializes the Global MSP. - */ -void HAL_MspInit(void) -{ - 8007ea0: b480 push {r7} - 8007ea2: b083 sub sp, #12 - 8007ea4: af00 add r7, sp, #0 - /* USER CODE BEGIN MspInit 0 */ + /* Enable the DMA channel */ + if (HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->RDR, (uint32_t)huart->pRxBuffPtr, Size) != HAL_OK) + 80079e6: 68fb ldr r3, [r7, #12] + 80079e8: 6ed8 ldr r0, [r3, #108] ; 0x6c + 80079ea: 68fb ldr r3, [r7, #12] + 80079ec: 681b ldr r3, [r3, #0] + 80079ee: 3324 adds r3, #36 ; 0x24 + 80079f0: 4619 mov r1, r3 + 80079f2: 68fb ldr r3, [r7, #12] + 80079f4: 6d5b ldr r3, [r3, #84] ; 0x54 + 80079f6: 461a mov r2, r3 + 80079f8: 88fb ldrh r3, [r7, #6] + 80079fa: f7fd f95d bl 8004cb8 + 80079fe: 4603 mov r3, r0 + 8007a00: 2b00 cmp r3, #0 + 8007a02: d00b beq.n 8007a1c + { + /* Set error code to DMA */ + huart->ErrorCode = HAL_UART_ERROR_DMA; + 8007a04: 68fb ldr r3, [r7, #12] + 8007a06: 2210 movs r2, #16 + 8007a08: 67da str r2, [r3, #124] ; 0x7c - /* USER CODE END MspInit 0 */ + /* Process Unlocked */ + __HAL_UNLOCK(huart); + 8007a0a: 68fb ldr r3, [r7, #12] + 8007a0c: 2200 movs r2, #0 + 8007a0e: f883 2070 strb.w r2, [r3, #112] ; 0x70 - __HAL_RCC_PWR_CLK_ENABLE(); - 8007ea6: 4b0f ldr r3, [pc, #60] ; (8007ee4 ) - 8007ea8: 6c1b ldr r3, [r3, #64] ; 0x40 - 8007eaa: 4a0e ldr r2, [pc, #56] ; (8007ee4 ) - 8007eac: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 - 8007eb0: 6413 str r3, [r2, #64] ; 0x40 - 8007eb2: 4b0c ldr r3, [pc, #48] ; (8007ee4 ) - 8007eb4: 6c1b ldr r3, [r3, #64] ; 0x40 - 8007eb6: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 - 8007eba: 607b str r3, [r7, #4] - 8007ebc: 687b ldr r3, [r7, #4] - __HAL_RCC_SYSCFG_CLK_ENABLE(); - 8007ebe: 4b09 ldr r3, [pc, #36] ; (8007ee4 ) - 8007ec0: 6c5b ldr r3, [r3, #68] ; 0x44 - 8007ec2: 4a08 ldr r2, [pc, #32] ; (8007ee4 ) - 8007ec4: f443 4380 orr.w r3, r3, #16384 ; 0x4000 - 8007ec8: 6453 str r3, [r2, #68] ; 0x44 - 8007eca: 4b06 ldr r3, [pc, #24] ; (8007ee4 ) - 8007ecc: 6c5b ldr r3, [r3, #68] ; 0x44 - 8007ece: f403 4380 and.w r3, r3, #16384 ; 0x4000 - 8007ed2: 603b str r3, [r7, #0] - 8007ed4: 683b ldr r3, [r7, #0] - /* System interrupt init*/ + /* Restore huart->gState to ready */ + huart->gState = HAL_UART_STATE_READY; + 8007a12: 68fb ldr r3, [r7, #12] + 8007a14: 2220 movs r2, #32 + 8007a16: 675a str r2, [r3, #116] ; 0x74 - /* USER CODE BEGIN MspInit 1 */ + return HAL_ERROR; + 8007a18: 2301 movs r3, #1 + 8007a1a: e01e b.n 8007a5a + } + } + /* Process Unlocked */ + __HAL_UNLOCK(huart); + 8007a1c: 68fb ldr r3, [r7, #12] + 8007a1e: 2200 movs r2, #0 + 8007a20: f883 2070 strb.w r2, [r3, #112] ; 0x70 - /* USER CODE END MspInit 1 */ -} - 8007ed6: bf00 nop - 8007ed8: 370c adds r7, #12 - 8007eda: 46bd mov sp, r7 - 8007edc: f85d 7b04 ldr.w r7, [sp], #4 - 8007ee0: 4770 bx lr - 8007ee2: bf00 nop - 8007ee4: 40023800 .word 0x40023800 - -08007ee8 : -* This function configures the hardware resources used in this example -* @param htim_encoder: TIM_Encoder handle pointer -* @retval None -*/ -void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef* htim_encoder) -{ - 8007ee8: b580 push {r7, lr} - 8007eea: b08c sub sp, #48 ; 0x30 - 8007eec: af00 add r7, sp, #0 - 8007eee: 6078 str r0, [r7, #4] - GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8007ef0: f107 031c add.w r3, r7, #28 - 8007ef4: 2200 movs r2, #0 - 8007ef6: 601a str r2, [r3, #0] - 8007ef8: 605a str r2, [r3, #4] - 8007efa: 609a str r2, [r3, #8] - 8007efc: 60da str r2, [r3, #12] - 8007efe: 611a str r2, [r3, #16] - if(htim_encoder->Instance==TIM2) - 8007f00: 687b ldr r3, [r7, #4] - 8007f02: 681b ldr r3, [r3, #0] - 8007f04: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 - 8007f08: d144 bne.n 8007f94 - { - /* USER CODE BEGIN TIM2_MspInit 0 */ + /* Enable the UART Parity Error Interrupt */ + SET_BIT(huart->Instance->CR1, USART_CR1_PEIE); + 8007a24: 68fb ldr r3, [r7, #12] + 8007a26: 681b ldr r3, [r3, #0] + 8007a28: 681a ldr r2, [r3, #0] + 8007a2a: 68fb ldr r3, [r7, #12] + 8007a2c: 681b ldr r3, [r3, #0] + 8007a2e: f442 7280 orr.w r2, r2, #256 ; 0x100 + 8007a32: 601a str r2, [r3, #0] - /* USER CODE END TIM2_MspInit 0 */ - /* Peripheral clock enable */ - __HAL_RCC_TIM2_CLK_ENABLE(); - 8007f0a: 4b3b ldr r3, [pc, #236] ; (8007ff8 ) - 8007f0c: 6c1b ldr r3, [r3, #64] ; 0x40 - 8007f0e: 4a3a ldr r2, [pc, #232] ; (8007ff8 ) - 8007f10: f043 0301 orr.w r3, r3, #1 - 8007f14: 6413 str r3, [r2, #64] ; 0x40 - 8007f16: 4b38 ldr r3, [pc, #224] ; (8007ff8 ) - 8007f18: 6c1b ldr r3, [r3, #64] ; 0x40 - 8007f1a: f003 0301 and.w r3, r3, #1 - 8007f1e: 61bb str r3, [r7, #24] - 8007f20: 69bb ldr r3, [r7, #24] - - __HAL_RCC_GPIOA_CLK_ENABLE(); - 8007f22: 4b35 ldr r3, [pc, #212] ; (8007ff8 ) - 8007f24: 6b1b ldr r3, [r3, #48] ; 0x30 - 8007f26: 4a34 ldr r2, [pc, #208] ; (8007ff8 ) - 8007f28: f043 0301 orr.w r3, r3, #1 - 8007f2c: 6313 str r3, [r2, #48] ; 0x30 - 8007f2e: 4b32 ldr r3, [pc, #200] ; (8007ff8 ) - 8007f30: 6b1b ldr r3, [r3, #48] ; 0x30 - 8007f32: f003 0301 and.w r3, r3, #1 - 8007f36: 617b str r3, [r7, #20] - 8007f38: 697b ldr r3, [r7, #20] - __HAL_RCC_GPIOB_CLK_ENABLE(); - 8007f3a: 4b2f ldr r3, [pc, #188] ; (8007ff8 ) - 8007f3c: 6b1b ldr r3, [r3, #48] ; 0x30 - 8007f3e: 4a2e ldr r2, [pc, #184] ; (8007ff8 ) - 8007f40: f043 0302 orr.w r3, r3, #2 - 8007f44: 6313 str r3, [r2, #48] ; 0x30 - 8007f46: 4b2c ldr r3, [pc, #176] ; (8007ff8 ) - 8007f48: 6b1b ldr r3, [r3, #48] ; 0x30 - 8007f4a: f003 0302 and.w r3, r3, #2 - 8007f4e: 613b str r3, [r7, #16] - 8007f50: 693b ldr r3, [r7, #16] - /**TIM2 GPIO Configuration - PA5 ------> TIM2_CH1 - PB3 ------> TIM2_CH2 - */ - GPIO_InitStruct.Pin = GPIO_PIN_5; - 8007f52: 2320 movs r3, #32 - 8007f54: 61fb str r3, [r7, #28] - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8007f56: 2302 movs r3, #2 - 8007f58: 623b str r3, [r7, #32] - GPIO_InitStruct.Pull = GPIO_NOPULL; - 8007f5a: 2300 movs r3, #0 - 8007f5c: 627b str r3, [r7, #36] ; 0x24 - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8007f5e: 2300 movs r3, #0 - 8007f60: 62bb str r3, [r7, #40] ; 0x28 - GPIO_InitStruct.Alternate = GPIO_AF1_TIM2; - 8007f62: 2301 movs r3, #1 - 8007f64: 62fb str r3, [r7, #44] ; 0x2c - HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 8007f66: f107 031c add.w r3, r7, #28 - 8007f6a: 4619 mov r1, r3 - 8007f6c: 4823 ldr r0, [pc, #140] ; (8007ffc ) - 8007f6e: f7f8 fff3 bl 8000f58 + /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */ + SET_BIT(huart->Instance->CR3, USART_CR3_EIE); + 8007a34: 68fb ldr r3, [r7, #12] + 8007a36: 681b ldr r3, [r3, #0] + 8007a38: 689a ldr r2, [r3, #8] + 8007a3a: 68fb ldr r3, [r7, #12] + 8007a3c: 681b ldr r3, [r3, #0] + 8007a3e: f042 0201 orr.w r2, r2, #1 + 8007a42: 609a str r2, [r3, #8] - GPIO_InitStruct.Pin = GPIO_PIN_3; - 8007f72: 2308 movs r3, #8 - 8007f74: 61fb str r3, [r7, #28] - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8007f76: 2302 movs r3, #2 - 8007f78: 623b str r3, [r7, #32] - GPIO_InitStruct.Pull = GPIO_NOPULL; - 8007f7a: 2300 movs r3, #0 - 8007f7c: 627b str r3, [r7, #36] ; 0x24 - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8007f7e: 2300 movs r3, #0 - 8007f80: 62bb str r3, [r7, #40] ; 0x28 - GPIO_InitStruct.Alternate = GPIO_AF1_TIM2; - 8007f82: 2301 movs r3, #1 - 8007f84: 62fb str r3, [r7, #44] ; 0x2c - HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 8007f86: f107 031c add.w r3, r7, #28 - 8007f8a: 4619 mov r1, r3 - 8007f8c: 481c ldr r0, [pc, #112] ; (8008000 ) - 8007f8e: f7f8 ffe3 bl 8000f58 - /* USER CODE BEGIN TIM5_MspInit 1 */ + /* Enable the DMA transfer for the receiver request by setting the DMAR bit + in the UART CR3 register */ + SET_BIT(huart->Instance->CR3, USART_CR3_DMAR); + 8007a44: 68fb ldr r3, [r7, #12] + 8007a46: 681b ldr r3, [r3, #0] + 8007a48: 689a ldr r2, [r3, #8] + 8007a4a: 68fb ldr r3, [r7, #12] + 8007a4c: 681b ldr r3, [r3, #0] + 8007a4e: f042 0240 orr.w r2, r2, #64 ; 0x40 + 8007a52: 609a str r2, [r3, #8] - /* USER CODE END TIM5_MspInit 1 */ + return HAL_OK; + 8007a54: 2300 movs r3, #0 + 8007a56: e000 b.n 8007a5a + } + else + { + return HAL_BUSY; + 8007a58: 2302 movs r3, #2 } - -} - 8007f92: e02c b.n 8007fee - else if(htim_encoder->Instance==TIM5) - 8007f94: 687b ldr r3, [r7, #4] - 8007f96: 681b ldr r3, [r3, #0] - 8007f98: 4a1a ldr r2, [pc, #104] ; (8008004 ) - 8007f9a: 4293 cmp r3, r2 - 8007f9c: d127 bne.n 8007fee - __HAL_RCC_TIM5_CLK_ENABLE(); - 8007f9e: 4b16 ldr r3, [pc, #88] ; (8007ff8 ) - 8007fa0: 6c1b ldr r3, [r3, #64] ; 0x40 - 8007fa2: 4a15 ldr r2, [pc, #84] ; (8007ff8 ) - 8007fa4: f043 0308 orr.w r3, r3, #8 - 8007fa8: 6413 str r3, [r2, #64] ; 0x40 - 8007faa: 4b13 ldr r3, [pc, #76] ; (8007ff8 ) - 8007fac: 6c1b ldr r3, [r3, #64] ; 0x40 - 8007fae: f003 0308 and.w r3, r3, #8 - 8007fb2: 60fb str r3, [r7, #12] - 8007fb4: 68fb ldr r3, [r7, #12] - __HAL_RCC_GPIOA_CLK_ENABLE(); - 8007fb6: 4b10 ldr r3, [pc, #64] ; (8007ff8 ) - 8007fb8: 6b1b ldr r3, [r3, #48] ; 0x30 - 8007fba: 4a0f ldr r2, [pc, #60] ; (8007ff8 ) - 8007fbc: f043 0301 orr.w r3, r3, #1 - 8007fc0: 6313 str r3, [r2, #48] ; 0x30 - 8007fc2: 4b0d ldr r3, [pc, #52] ; (8007ff8 ) - 8007fc4: 6b1b ldr r3, [r3, #48] ; 0x30 - 8007fc6: f003 0301 and.w r3, r3, #1 - 8007fca: 60bb str r3, [r7, #8] - 8007fcc: 68bb ldr r3, [r7, #8] - GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1; - 8007fce: 2303 movs r3, #3 - 8007fd0: 61fb str r3, [r7, #28] - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8007fd2: 2302 movs r3, #2 - 8007fd4: 623b str r3, [r7, #32] - GPIO_InitStruct.Pull = GPIO_NOPULL; - 8007fd6: 2300 movs r3, #0 - 8007fd8: 627b str r3, [r7, #36] ; 0x24 - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8007fda: 2300 movs r3, #0 - 8007fdc: 62bb str r3, [r7, #40] ; 0x28 - GPIO_InitStruct.Alternate = GPIO_AF2_TIM5; - 8007fde: 2302 movs r3, #2 - 8007fe0: 62fb str r3, [r7, #44] ; 0x2c - HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 8007fe2: f107 031c add.w r3, r7, #28 - 8007fe6: 4619 mov r1, r3 - 8007fe8: 4804 ldr r0, [pc, #16] ; (8007ffc ) - 8007fea: f7f8 ffb5 bl 8000f58 } - 8007fee: bf00 nop - 8007ff0: 3730 adds r7, #48 ; 0x30 - 8007ff2: 46bd mov sp, r7 - 8007ff4: bd80 pop {r7, pc} - 8007ff6: bf00 nop - 8007ff8: 40023800 .word 0x40023800 - 8007ffc: 40020000 .word 0x40020000 - 8008000: 40020400 .word 0x40020400 - 8008004: 40000c00 .word 0x40000c00 - -08008008 : -* This function configures the hardware resources used in this example -* @param htim_base: TIM_Base handle pointer -* @retval None -*/ -void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) + 8007a5a: 4618 mov r0, r3 + 8007a5c: 3710 adds r7, #16 + 8007a5e: 46bd mov sp, r7 + 8007a60: bd80 pop {r7, pc} + 8007a62: bf00 nop + 8007a64: 08008535 .word 0x08008535 + 8007a68: 08008599 .word 0x08008599 + 8007a6c: 080085b5 .word 0x080085b5 + +08007a70 : + * @brief Handle UART interrupt request. + * @param huart UART handle. + * @retval None + */ +void HAL_UART_IRQHandler(UART_HandleTypeDef *huart) { - 8008008: b580 push {r7, lr} - 800800a: b084 sub sp, #16 - 800800c: af00 add r7, sp, #0 - 800800e: 6078 str r0, [r7, #4] - if(htim_base->Instance==TIM3) - 8008010: 687b ldr r3, [r7, #4] - 8008012: 681b ldr r3, [r3, #0] - 8008014: 4a0d ldr r2, [pc, #52] ; (800804c ) - 8008016: 4293 cmp r3, r2 - 8008018: d113 bne.n 8008042 - { - /* USER CODE BEGIN TIM3_MspInit 0 */ + 8007a70: b580 push {r7, lr} + 8007a72: b088 sub sp, #32 + 8007a74: af00 add r7, sp, #0 + 8007a76: 6078 str r0, [r7, #4] + uint32_t isrflags = READ_REG(huart->Instance->ISR); + 8007a78: 687b ldr r3, [r7, #4] + 8007a7a: 681b ldr r3, [r3, #0] + 8007a7c: 69db ldr r3, [r3, #28] + 8007a7e: 61fb str r3, [r7, #28] + uint32_t cr1its = READ_REG(huart->Instance->CR1); + 8007a80: 687b ldr r3, [r7, #4] + 8007a82: 681b ldr r3, [r3, #0] + 8007a84: 681b ldr r3, [r3, #0] + 8007a86: 61bb str r3, [r7, #24] + uint32_t cr3its = READ_REG(huart->Instance->CR3); + 8007a88: 687b ldr r3, [r7, #4] + 8007a8a: 681b ldr r3, [r3, #0] + 8007a8c: 689b ldr r3, [r3, #8] + 8007a8e: 617b str r3, [r7, #20] - /* USER CODE END TIM3_MspInit 0 */ - /* Peripheral clock enable */ - __HAL_RCC_TIM3_CLK_ENABLE(); - 800801a: 4b0d ldr r3, [pc, #52] ; (8008050 ) - 800801c: 6c1b ldr r3, [r3, #64] ; 0x40 - 800801e: 4a0c ldr r2, [pc, #48] ; (8008050 ) - 8008020: f043 0302 orr.w r3, r3, #2 - 8008024: 6413 str r3, [r2, #64] ; 0x40 - 8008026: 4b0a ldr r3, [pc, #40] ; (8008050 ) - 8008028: 6c1b ldr r3, [r3, #64] ; 0x40 - 800802a: f003 0302 and.w r3, r3, #2 - 800802e: 60fb str r3, [r7, #12] - 8008030: 68fb ldr r3, [r7, #12] - /* TIM3 interrupt Init */ - HAL_NVIC_SetPriority(TIM3_IRQn, 0, 0); - 8008032: 2200 movs r2, #0 - 8008034: 2100 movs r1, #0 - 8008036: 201d movs r0, #29 - 8008038: f7f8 fbbf bl 80007ba - HAL_NVIC_EnableIRQ(TIM3_IRQn); - 800803c: 201d movs r0, #29 - 800803e: f7f8 fbd8 bl 80007f2 - /* USER CODE BEGIN TIM3_MspInit 1 */ + uint32_t errorflags; + uint32_t errorcode; - /* USER CODE END TIM3_MspInit 1 */ + /* If no error occurs */ + errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE)); + 8007a90: 69fb ldr r3, [r7, #28] + 8007a92: f003 030f and.w r3, r3, #15 + 8007a96: 613b str r3, [r7, #16] + if (errorflags == 0U) + 8007a98: 693b ldr r3, [r7, #16] + 8007a9a: 2b00 cmp r3, #0 + 8007a9c: d113 bne.n 8007ac6 + { + /* UART in mode Receiver ---------------------------------------------------*/ + if (((isrflags & USART_ISR_RXNE) != 0U) + 8007a9e: 69fb ldr r3, [r7, #28] + 8007aa0: f003 0320 and.w r3, r3, #32 + 8007aa4: 2b00 cmp r3, #0 + 8007aa6: d00e beq.n 8007ac6 + && ((cr1its & USART_CR1_RXNEIE) != 0U)) + 8007aa8: 69bb ldr r3, [r7, #24] + 8007aaa: f003 0320 and.w r3, r3, #32 + 8007aae: 2b00 cmp r3, #0 + 8007ab0: d009 beq.n 8007ac6 + { + if (huart->RxISR != NULL) + 8007ab2: 687b ldr r3, [r7, #4] + 8007ab4: 6e1b ldr r3, [r3, #96] ; 0x60 + 8007ab6: 2b00 cmp r3, #0 + 8007ab8: f000 80eb beq.w 8007c92 + { + huart->RxISR(huart); + 8007abc: 687b ldr r3, [r7, #4] + 8007abe: 6e1b ldr r3, [r3, #96] ; 0x60 + 8007ac0: 6878 ldr r0, [r7, #4] + 8007ac2: 4798 blx r3 + } + return; + 8007ac4: e0e5 b.n 8007c92 + } } -} - 8008042: bf00 nop - 8008044: 3710 adds r7, #16 - 8008046: 46bd mov sp, r7 - 8008048: bd80 pop {r7, pc} - 800804a: bf00 nop - 800804c: 40000400 .word 0x40000400 - 8008050: 40023800 .word 0x40023800 - -08008054 : -* This function configures the hardware resources used in this example -* @param htim_pwm: TIM_PWM handle pointer -* @retval None -*/ -void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef* htim_pwm) -{ - 8008054: b480 push {r7} - 8008056: b085 sub sp, #20 - 8008058: af00 add r7, sp, #0 - 800805a: 6078 str r0, [r7, #4] - if(htim_pwm->Instance==TIM4) - 800805c: 687b ldr r3, [r7, #4] - 800805e: 681b ldr r3, [r3, #0] - 8008060: 4a0a ldr r2, [pc, #40] ; (800808c ) - 8008062: 4293 cmp r3, r2 - 8008064: d10b bne.n 800807e + /* If some errors occur */ + if ((errorflags != 0U) + 8007ac6: 693b ldr r3, [r7, #16] + 8007ac8: 2b00 cmp r3, #0 + 8007aca: f000 80c0 beq.w 8007c4e + && (((cr3its & USART_CR3_EIE) != 0U) + 8007ace: 697b ldr r3, [r7, #20] + 8007ad0: f003 0301 and.w r3, r3, #1 + 8007ad4: 2b00 cmp r3, #0 + 8007ad6: d105 bne.n 8007ae4 + || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != 0U))) + 8007ad8: 69bb ldr r3, [r7, #24] + 8007ada: f403 7390 and.w r3, r3, #288 ; 0x120 + 8007ade: 2b00 cmp r3, #0 + 8007ae0: f000 80b5 beq.w 8007c4e { - /* USER CODE BEGIN TIM4_MspInit 0 */ + /* UART parity error interrupt occurred -------------------------------------*/ + if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U)) + 8007ae4: 69fb ldr r3, [r7, #28] + 8007ae6: f003 0301 and.w r3, r3, #1 + 8007aea: 2b00 cmp r3, #0 + 8007aec: d00e beq.n 8007b0c + 8007aee: 69bb ldr r3, [r7, #24] + 8007af0: f403 7380 and.w r3, r3, #256 ; 0x100 + 8007af4: 2b00 cmp r3, #0 + 8007af6: d009 beq.n 8007b0c + { + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF); + 8007af8: 687b ldr r3, [r7, #4] + 8007afa: 681b ldr r3, [r3, #0] + 8007afc: 2201 movs r2, #1 + 8007afe: 621a str r2, [r3, #32] - /* USER CODE END TIM4_MspInit 0 */ - /* Peripheral clock enable */ - __HAL_RCC_TIM4_CLK_ENABLE(); - 8008066: 4b0a ldr r3, [pc, #40] ; (8008090 ) - 8008068: 6c1b ldr r3, [r3, #64] ; 0x40 - 800806a: 4a09 ldr r2, [pc, #36] ; (8008090 ) - 800806c: f043 0304 orr.w r3, r3, #4 - 8008070: 6413 str r3, [r2, #64] ; 0x40 - 8008072: 4b07 ldr r3, [pc, #28] ; (8008090 ) - 8008074: 6c1b ldr r3, [r3, #64] ; 0x40 - 8008076: f003 0304 and.w r3, r3, #4 - 800807a: 60fb str r3, [r7, #12] - 800807c: 68fb ldr r3, [r7, #12] - /* USER CODE BEGIN TIM4_MspInit 1 */ + huart->ErrorCode |= HAL_UART_ERROR_PE; + 8007b00: 687b ldr r3, [r7, #4] + 8007b02: 6fdb ldr r3, [r3, #124] ; 0x7c + 8007b04: f043 0201 orr.w r2, r3, #1 + 8007b08: 687b ldr r3, [r7, #4] + 8007b0a: 67da str r2, [r3, #124] ; 0x7c + } - /* USER CODE END TIM4_MspInit 1 */ - } + /* UART frame error interrupt occurred --------------------------------------*/ + if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U)) + 8007b0c: 69fb ldr r3, [r7, #28] + 8007b0e: f003 0302 and.w r3, r3, #2 + 8007b12: 2b00 cmp r3, #0 + 8007b14: d00e beq.n 8007b34 + 8007b16: 697b ldr r3, [r7, #20] + 8007b18: f003 0301 and.w r3, r3, #1 + 8007b1c: 2b00 cmp r3, #0 + 8007b1e: d009 beq.n 8007b34 + { + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF); + 8007b20: 687b ldr r3, [r7, #4] + 8007b22: 681b ldr r3, [r3, #0] + 8007b24: 2202 movs r2, #2 + 8007b26: 621a str r2, [r3, #32] -} - 800807e: bf00 nop - 8008080: 3714 adds r7, #20 - 8008082: 46bd mov sp, r7 - 8008084: f85d 7b04 ldr.w r7, [sp], #4 - 8008088: 4770 bx lr - 800808a: bf00 nop - 800808c: 40000800 .word 0x40000800 - 8008090: 40023800 .word 0x40023800 + huart->ErrorCode |= HAL_UART_ERROR_FE; + 8007b28: 687b ldr r3, [r7, #4] + 8007b2a: 6fdb ldr r3, [r3, #124] ; 0x7c + 8007b2c: f043 0204 orr.w r2, r3, #4 + 8007b30: 687b ldr r3, [r7, #4] + 8007b32: 67da str r2, [r3, #124] ; 0x7c + } -08008094 : + /* UART noise error interrupt occurred --------------------------------------*/ + if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U)) + 8007b34: 69fb ldr r3, [r7, #28] + 8007b36: f003 0304 and.w r3, r3, #4 + 8007b3a: 2b00 cmp r3, #0 + 8007b3c: d00e beq.n 8007b5c + 8007b3e: 697b ldr r3, [r7, #20] + 8007b40: f003 0301 and.w r3, r3, #1 + 8007b44: 2b00 cmp r3, #0 + 8007b46: d009 beq.n 8007b5c + { + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF); + 8007b48: 687b ldr r3, [r7, #4] + 8007b4a: 681b ldr r3, [r3, #0] + 8007b4c: 2204 movs r2, #4 + 8007b4e: 621a str r2, [r3, #32] -void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim) -{ - 8008094: b580 push {r7, lr} - 8008096: b088 sub sp, #32 - 8008098: af00 add r7, sp, #0 - 800809a: 6078 str r0, [r7, #4] - GPIO_InitTypeDef GPIO_InitStruct = {0}; - 800809c: f107 030c add.w r3, r7, #12 - 80080a0: 2200 movs r2, #0 - 80080a2: 601a str r2, [r3, #0] - 80080a4: 605a str r2, [r3, #4] - 80080a6: 609a str r2, [r3, #8] - 80080a8: 60da str r2, [r3, #12] - 80080aa: 611a str r2, [r3, #16] - if(htim->Instance==TIM4) - 80080ac: 687b ldr r3, [r7, #4] - 80080ae: 681b ldr r3, [r3, #0] - 80080b0: 4a11 ldr r2, [pc, #68] ; (80080f8 ) - 80080b2: 4293 cmp r3, r2 - 80080b4: d11c bne.n 80080f0 - { - /* USER CODE BEGIN TIM4_MspPostInit 0 */ + huart->ErrorCode |= HAL_UART_ERROR_NE; + 8007b50: 687b ldr r3, [r7, #4] + 8007b52: 6fdb ldr r3, [r3, #124] ; 0x7c + 8007b54: f043 0202 orr.w r2, r3, #2 + 8007b58: 687b ldr r3, [r7, #4] + 8007b5a: 67da str r2, [r3, #124] ; 0x7c + } - /* USER CODE END TIM4_MspPostInit 0 */ - - __HAL_RCC_GPIOD_CLK_ENABLE(); - 80080b6: 4b11 ldr r3, [pc, #68] ; (80080fc ) - 80080b8: 6b1b ldr r3, [r3, #48] ; 0x30 - 80080ba: 4a10 ldr r2, [pc, #64] ; (80080fc ) - 80080bc: f043 0308 orr.w r3, r3, #8 - 80080c0: 6313 str r3, [r2, #48] ; 0x30 - 80080c2: 4b0e ldr r3, [pc, #56] ; (80080fc ) - 80080c4: 6b1b ldr r3, [r3, #48] ; 0x30 - 80080c6: f003 0308 and.w r3, r3, #8 - 80080ca: 60bb str r3, [r7, #8] - 80080cc: 68bb ldr r3, [r7, #8] - /**TIM4 GPIO Configuration - PD14 ------> TIM4_CH3 - PD15 ------> TIM4_CH4 - */ - GPIO_InitStruct.Pin = pwm_2_Pin|pwm_1_Pin; - 80080ce: f44f 4340 mov.w r3, #49152 ; 0xc000 - 80080d2: 60fb str r3, [r7, #12] - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 80080d4: 2302 movs r3, #2 - 80080d6: 613b str r3, [r7, #16] - GPIO_InitStruct.Pull = GPIO_NOPULL; - 80080d8: 2300 movs r3, #0 - 80080da: 617b str r3, [r7, #20] - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 80080dc: 2300 movs r3, #0 - 80080de: 61bb str r3, [r7, #24] - GPIO_InitStruct.Alternate = GPIO_AF2_TIM4; - 80080e0: 2302 movs r3, #2 - 80080e2: 61fb str r3, [r7, #28] - HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); - 80080e4: f107 030c add.w r3, r7, #12 - 80080e8: 4619 mov r1, r3 - 80080ea: 4805 ldr r0, [pc, #20] ; (8008100 ) - 80080ec: f7f8 ff34 bl 8000f58 - /* USER CODE BEGIN TIM4_MspPostInit 1 */ + /* UART Over-Run interrupt occurred -----------------------------------------*/ + if (((isrflags & USART_ISR_ORE) != 0U) + 8007b5c: 69fb ldr r3, [r7, #28] + 8007b5e: f003 0308 and.w r3, r3, #8 + 8007b62: 2b00 cmp r3, #0 + 8007b64: d013 beq.n 8007b8e + && (((cr1its & USART_CR1_RXNEIE) != 0U) || + 8007b66: 69bb ldr r3, [r7, #24] + 8007b68: f003 0320 and.w r3, r3, #32 + 8007b6c: 2b00 cmp r3, #0 + 8007b6e: d104 bne.n 8007b7a + ((cr3its & USART_CR3_EIE) != 0U))) + 8007b70: 697b ldr r3, [r7, #20] + 8007b72: f003 0301 and.w r3, r3, #1 + && (((cr1its & USART_CR1_RXNEIE) != 0U) || + 8007b76: 2b00 cmp r3, #0 + 8007b78: d009 beq.n 8007b8e + { + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF); + 8007b7a: 687b ldr r3, [r7, #4] + 8007b7c: 681b ldr r3, [r3, #0] + 8007b7e: 2208 movs r2, #8 + 8007b80: 621a str r2, [r3, #32] - /* USER CODE END TIM4_MspPostInit 1 */ - } + huart->ErrorCode |= HAL_UART_ERROR_ORE; + 8007b82: 687b ldr r3, [r7, #4] + 8007b84: 6fdb ldr r3, [r3, #124] ; 0x7c + 8007b86: f043 0208 orr.w r2, r3, #8 + 8007b8a: 687b ldr r3, [r7, #4] + 8007b8c: 67da str r2, [r3, #124] ; 0x7c + } -} - 80080f0: bf00 nop - 80080f2: 3720 adds r7, #32 - 80080f4: 46bd mov sp, r7 - 80080f6: bd80 pop {r7, pc} - 80080f8: 40000800 .word 0x40000800 - 80080fc: 40023800 .word 0x40023800 - 8008100: 40020c00 .word 0x40020c00 - -08008104 : -* This function configures the hardware resources used in this example -* @param huart: UART handle pointer -* @retval None -*/ -void HAL_UART_MspInit(UART_HandleTypeDef* huart) -{ - 8008104: b580 push {r7, lr} - 8008106: b08c sub sp, #48 ; 0x30 - 8008108: af00 add r7, sp, #0 - 800810a: 6078 str r0, [r7, #4] - GPIO_InitTypeDef GPIO_InitStruct = {0}; - 800810c: f107 031c add.w r3, r7, #28 - 8008110: 2200 movs r2, #0 - 8008112: 601a str r2, [r3, #0] - 8008114: 605a str r2, [r3, #4] - 8008116: 609a str r2, [r3, #8] - 8008118: 60da str r2, [r3, #12] - 800811a: 611a str r2, [r3, #16] - if(huart->Instance==USART3) - 800811c: 687b ldr r3, [r7, #4] - 800811e: 681b ldr r3, [r3, #0] - 8008120: 4a91 ldr r2, [pc, #580] ; (8008368 ) - 8008122: 4293 cmp r3, r2 - 8008124: f040 8090 bne.w 8008248 - { - /* USER CODE BEGIN USART3_MspInit 0 */ + /* Call UART Error Call back function if need be --------------------------*/ + if (huart->ErrorCode != HAL_UART_ERROR_NONE) + 8007b8e: 687b ldr r3, [r7, #4] + 8007b90: 6fdb ldr r3, [r3, #124] ; 0x7c + 8007b92: 2b00 cmp r3, #0 + 8007b94: d07f beq.n 8007c96 + { + /* UART in mode Receiver ---------------------------------------------------*/ + if (((isrflags & USART_ISR_RXNE) != 0U) + 8007b96: 69fb ldr r3, [r7, #28] + 8007b98: f003 0320 and.w r3, r3, #32 + 8007b9c: 2b00 cmp r3, #0 + 8007b9e: d00c beq.n 8007bba + && ((cr1its & USART_CR1_RXNEIE) != 0U)) + 8007ba0: 69bb ldr r3, [r7, #24] + 8007ba2: f003 0320 and.w r3, r3, #32 + 8007ba6: 2b00 cmp r3, #0 + 8007ba8: d007 beq.n 8007bba + { + if (huart->RxISR != NULL) + 8007baa: 687b ldr r3, [r7, #4] + 8007bac: 6e1b ldr r3, [r3, #96] ; 0x60 + 8007bae: 2b00 cmp r3, #0 + 8007bb0: d003 beq.n 8007bba + { + huart->RxISR(huart); + 8007bb2: 687b ldr r3, [r7, #4] + 8007bb4: 6e1b ldr r3, [r3, #96] ; 0x60 + 8007bb6: 6878 ldr r0, [r7, #4] + 8007bb8: 4798 blx r3 + } + } - /* USER CODE END USART3_MspInit 0 */ - /* Peripheral clock enable */ - __HAL_RCC_USART3_CLK_ENABLE(); - 8008128: 4b90 ldr r3, [pc, #576] ; (800836c ) - 800812a: 6c1b ldr r3, [r3, #64] ; 0x40 - 800812c: 4a8f ldr r2, [pc, #572] ; (800836c ) - 800812e: f443 2380 orr.w r3, r3, #262144 ; 0x40000 - 8008132: 6413 str r3, [r2, #64] ; 0x40 - 8008134: 4b8d ldr r3, [pc, #564] ; (800836c ) - 8008136: 6c1b ldr r3, [r3, #64] ; 0x40 - 8008138: f403 2380 and.w r3, r3, #262144 ; 0x40000 - 800813c: 61bb str r3, [r7, #24] - 800813e: 69bb ldr r3, [r7, #24] - - __HAL_RCC_GPIOD_CLK_ENABLE(); - 8008140: 4b8a ldr r3, [pc, #552] ; (800836c ) - 8008142: 6b1b ldr r3, [r3, #48] ; 0x30 - 8008144: 4a89 ldr r2, [pc, #548] ; (800836c ) - 8008146: f043 0308 orr.w r3, r3, #8 - 800814a: 6313 str r3, [r2, #48] ; 0x30 - 800814c: 4b87 ldr r3, [pc, #540] ; (800836c ) - 800814e: 6b1b ldr r3, [r3, #48] ; 0x30 - 8008150: f003 0308 and.w r3, r3, #8 - 8008154: 617b str r3, [r7, #20] - 8008156: 697b ldr r3, [r7, #20] - /**USART3 GPIO Configuration - PD8 ------> USART3_TX - PD9 ------> USART3_RX - */ - GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9; - 8008158: f44f 7340 mov.w r3, #768 ; 0x300 - 800815c: 61fb str r3, [r7, #28] - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 800815e: 2302 movs r3, #2 - 8008160: 623b str r3, [r7, #32] - GPIO_InitStruct.Pull = GPIO_NOPULL; - 8008162: 2300 movs r3, #0 - 8008164: 627b str r3, [r7, #36] ; 0x24 - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - 8008166: 2303 movs r3, #3 - 8008168: 62bb str r3, [r7, #40] ; 0x28 - GPIO_InitStruct.Alternate = GPIO_AF7_USART3; - 800816a: 2307 movs r3, #7 - 800816c: 62fb str r3, [r7, #44] ; 0x2c - HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); - 800816e: f107 031c add.w r3, r7, #28 - 8008172: 4619 mov r1, r3 - 8008174: 487e ldr r0, [pc, #504] ; (8008370 ) - 8008176: f7f8 feef bl 8000f58 + /* If Overrun error occurs, or if any error occurs in DMA mode reception, + consider error as blocking */ + errorcode = huart->ErrorCode; + 8007bba: 687b ldr r3, [r7, #4] + 8007bbc: 6fdb ldr r3, [r3, #124] ; 0x7c + 8007bbe: 60fb str r3, [r7, #12] + if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) || + 8007bc0: 687b ldr r3, [r7, #4] + 8007bc2: 681b ldr r3, [r3, #0] + 8007bc4: 689b ldr r3, [r3, #8] + 8007bc6: f003 0340 and.w r3, r3, #64 ; 0x40 + 8007bca: 2b40 cmp r3, #64 ; 0x40 + 8007bcc: d004 beq.n 8007bd8 + ((errorcode & HAL_UART_ERROR_ORE) != 0U)) + 8007bce: 68fb ldr r3, [r7, #12] + 8007bd0: f003 0308 and.w r3, r3, #8 + if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) || + 8007bd4: 2b00 cmp r3, #0 + 8007bd6: d031 beq.n 8007c3c + { + /* Blocking error : transfer is aborted + Set the UART state ready to be able to start again the process, + Disable Rx Interrupts, and disable Rx DMA request, if ongoing */ + UART_EndRxTransfer(huart); + 8007bd8: 6878 ldr r0, [r7, #4] + 8007bda: f000 fc55 bl 8008488 - /* USART3 DMA Init */ - /* USART3_RX Init */ - hdma_usart3_rx.Instance = DMA1_Stream1; - 800817a: 4b7e ldr r3, [pc, #504] ; (8008374 ) - 800817c: 4a7e ldr r2, [pc, #504] ; (8008378 ) - 800817e: 601a str r2, [r3, #0] - hdma_usart3_rx.Init.Channel = DMA_CHANNEL_4; - 8008180: 4b7c ldr r3, [pc, #496] ; (8008374 ) - 8008182: f04f 6200 mov.w r2, #134217728 ; 0x8000000 - 8008186: 605a str r2, [r3, #4] - hdma_usart3_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; - 8008188: 4b7a ldr r3, [pc, #488] ; (8008374 ) - 800818a: 2200 movs r2, #0 - 800818c: 609a str r2, [r3, #8] - hdma_usart3_rx.Init.PeriphInc = DMA_PINC_DISABLE; - 800818e: 4b79 ldr r3, [pc, #484] ; (8008374 ) - 8008190: 2200 movs r2, #0 - 8008192: 60da str r2, [r3, #12] - hdma_usart3_rx.Init.MemInc = DMA_MINC_ENABLE; - 8008194: 4b77 ldr r3, [pc, #476] ; (8008374 ) - 8008196: f44f 6280 mov.w r2, #1024 ; 0x400 - 800819a: 611a str r2, [r3, #16] - hdma_usart3_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; - 800819c: 4b75 ldr r3, [pc, #468] ; (8008374 ) - 800819e: 2200 movs r2, #0 - 80081a0: 615a str r2, [r3, #20] - hdma_usart3_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; - 80081a2: 4b74 ldr r3, [pc, #464] ; (8008374 ) - 80081a4: 2200 movs r2, #0 - 80081a6: 619a str r2, [r3, #24] - hdma_usart3_rx.Init.Mode = DMA_NORMAL; - 80081a8: 4b72 ldr r3, [pc, #456] ; (8008374 ) - 80081aa: 2200 movs r2, #0 - 80081ac: 61da str r2, [r3, #28] - hdma_usart3_rx.Init.Priority = DMA_PRIORITY_HIGH; - 80081ae: 4b71 ldr r3, [pc, #452] ; (8008374 ) - 80081b0: f44f 3200 mov.w r2, #131072 ; 0x20000 - 80081b4: 621a str r2, [r3, #32] - hdma_usart3_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; - 80081b6: 4b6f ldr r3, [pc, #444] ; (8008374 ) - 80081b8: 2200 movs r2, #0 - 80081ba: 625a str r2, [r3, #36] ; 0x24 - if (HAL_DMA_Init(&hdma_usart3_rx) != HAL_OK) - 80081bc: 486d ldr r0, [pc, #436] ; (8008374 ) - 80081be: f7f8 fb33 bl 8000828 - 80081c2: 4603 mov r3, r0 - 80081c4: 2b00 cmp r3, #0 - 80081c6: d001 beq.n 80081cc - { - Error_Handler(); - 80081c8: f7fe ff3a bl 8007040 + /* Disable the UART DMA Rx request if enabled */ + if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) + 8007bde: 687b ldr r3, [r7, #4] + 8007be0: 681b ldr r3, [r3, #0] + 8007be2: 689b ldr r3, [r3, #8] + 8007be4: f003 0340 and.w r3, r3, #64 ; 0x40 + 8007be8: 2b40 cmp r3, #64 ; 0x40 + 8007bea: d123 bne.n 8007c34 + { + CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); + 8007bec: 687b ldr r3, [r7, #4] + 8007bee: 681b ldr r3, [r3, #0] + 8007bf0: 689a ldr r2, [r3, #8] + 8007bf2: 687b ldr r3, [r7, #4] + 8007bf4: 681b ldr r3, [r3, #0] + 8007bf6: f022 0240 bic.w r2, r2, #64 ; 0x40 + 8007bfa: 609a str r2, [r3, #8] + + /* Abort the UART DMA Rx channel */ + if (huart->hdmarx != NULL) + 8007bfc: 687b ldr r3, [r7, #4] + 8007bfe: 6edb ldr r3, [r3, #108] ; 0x6c + 8007c00: 2b00 cmp r3, #0 + 8007c02: d013 beq.n 8007c2c + { + /* Set the UART DMA Abort callback : + will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */ + huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError; + 8007c04: 687b ldr r3, [r7, #4] + 8007c06: 6edb ldr r3, [r3, #108] ; 0x6c + 8007c08: 4a26 ldr r2, [pc, #152] ; (8007ca4 ) + 8007c0a: 651a str r2, [r3, #80] ; 0x50 + + /* Abort DMA RX */ + if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) + 8007c0c: 687b ldr r3, [r7, #4] + 8007c0e: 6edb ldr r3, [r3, #108] ; 0x6c + 8007c10: 4618 mov r0, r3 + 8007c12: f7fd f8b1 bl 8004d78 + 8007c16: 4603 mov r3, r0 + 8007c18: 2b00 cmp r3, #0 + 8007c1a: d016 beq.n 8007c4a + { + /* Call Directly huart->hdmarx->XferAbortCallback function in case of error */ + huart->hdmarx->XferAbortCallback(huart->hdmarx); + 8007c1c: 687b ldr r3, [r7, #4] + 8007c1e: 6edb ldr r3, [r3, #108] ; 0x6c + 8007c20: 6d1b ldr r3, [r3, #80] ; 0x50 + 8007c22: 687a ldr r2, [r7, #4] + 8007c24: 6ed2 ldr r2, [r2, #108] ; 0x6c + 8007c26: 4610 mov r0, r2 + 8007c28: 4798 blx r3 + if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) + 8007c2a: e00e b.n 8007c4a +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + /*Call registered error callback*/ + huart->ErrorCallback(huart); +#else + /*Call legacy weak error callback*/ + HAL_UART_ErrorCallback(huart); + 8007c2c: 6878 ldr r0, [r7, #4] + 8007c2e: f000 f84f bl 8007cd0 + if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) + 8007c32: e00a b.n 8007c4a +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + /*Call registered error callback*/ + huart->ErrorCallback(huart); +#else + /*Call legacy weak error callback*/ + HAL_UART_ErrorCallback(huart); + 8007c34: 6878 ldr r0, [r7, #4] + 8007c36: f000 f84b bl 8007cd0 + if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) + 8007c3a: e006 b.n 8007c4a +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + /*Call registered error callback*/ + huart->ErrorCallback(huart); +#else + /*Call legacy weak error callback*/ + HAL_UART_ErrorCallback(huart); + 8007c3c: 6878 ldr r0, [r7, #4] + 8007c3e: f000 f847 bl 8007cd0 +#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + huart->ErrorCode = HAL_UART_ERROR_NONE; + 8007c42: 687b ldr r3, [r7, #4] + 8007c44: 2200 movs r2, #0 + 8007c46: 67da str r2, [r3, #124] ; 0x7c + } } + return; + 8007c48: e025 b.n 8007c96 + if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) + 8007c4a: bf00 nop + return; + 8007c4c: e023 b.n 8007c96 - __HAL_LINKDMA(huart,hdmarx,hdma_usart3_rx); - 80081cc: 687b ldr r3, [r7, #4] - 80081ce: 4a69 ldr r2, [pc, #420] ; (8008374 ) - 80081d0: 66da str r2, [r3, #108] ; 0x6c - 80081d2: 4a68 ldr r2, [pc, #416] ; (8008374 ) - 80081d4: 687b ldr r3, [r7, #4] - 80081d6: 6393 str r3, [r2, #56] ; 0x38 + } /* End if some error occurs */ - /* USART3_TX Init */ - hdma_usart3_tx.Instance = DMA1_Stream3; - 80081d8: 4b68 ldr r3, [pc, #416] ; (800837c ) - 80081da: 4a69 ldr r2, [pc, #420] ; (8008380 ) - 80081dc: 601a str r2, [r3, #0] - hdma_usart3_tx.Init.Channel = DMA_CHANNEL_4; - 80081de: 4b67 ldr r3, [pc, #412] ; (800837c ) - 80081e0: f04f 6200 mov.w r2, #134217728 ; 0x8000000 - 80081e4: 605a str r2, [r3, #4] - hdma_usart3_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; - 80081e6: 4b65 ldr r3, [pc, #404] ; (800837c ) - 80081e8: 2240 movs r2, #64 ; 0x40 - 80081ea: 609a str r2, [r3, #8] - hdma_usart3_tx.Init.PeriphInc = DMA_PINC_DISABLE; - 80081ec: 4b63 ldr r3, [pc, #396] ; (800837c ) - 80081ee: 2200 movs r2, #0 - 80081f0: 60da str r2, [r3, #12] - hdma_usart3_tx.Init.MemInc = DMA_MINC_ENABLE; - 80081f2: 4b62 ldr r3, [pc, #392] ; (800837c ) - 80081f4: f44f 6280 mov.w r2, #1024 ; 0x400 - 80081f8: 611a str r2, [r3, #16] - hdma_usart3_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; - 80081fa: 4b60 ldr r3, [pc, #384] ; (800837c ) - 80081fc: 2200 movs r2, #0 - 80081fe: 615a str r2, [r3, #20] - hdma_usart3_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; - 8008200: 4b5e ldr r3, [pc, #376] ; (800837c ) - 8008202: 2200 movs r2, #0 - 8008204: 619a str r2, [r3, #24] - hdma_usart3_tx.Init.Mode = DMA_NORMAL; - 8008206: 4b5d ldr r3, [pc, #372] ; (800837c ) - 8008208: 2200 movs r2, #0 - 800820a: 61da str r2, [r3, #28] - hdma_usart3_tx.Init.Priority = DMA_PRIORITY_HIGH; - 800820c: 4b5b ldr r3, [pc, #364] ; (800837c ) - 800820e: f44f 3200 mov.w r2, #131072 ; 0x20000 - 8008212: 621a str r2, [r3, #32] - hdma_usart3_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; - 8008214: 4b59 ldr r3, [pc, #356] ; (800837c ) - 8008216: 2200 movs r2, #0 - 8008218: 625a str r2, [r3, #36] ; 0x24 - if (HAL_DMA_Init(&hdma_usart3_tx) != HAL_OK) - 800821a: 4858 ldr r0, [pc, #352] ; (800837c ) - 800821c: f7f8 fb04 bl 8000828 - 8008220: 4603 mov r3, r0 - 8008222: 2b00 cmp r3, #0 - 8008224: d001 beq.n 800822a + /* UART in mode Transmitter ------------------------------------------------*/ + if (((isrflags & USART_ISR_TXE) != 0U) + 8007c4e: 69fb ldr r3, [r7, #28] + 8007c50: f003 0380 and.w r3, r3, #128 ; 0x80 + 8007c54: 2b00 cmp r3, #0 + 8007c56: d00d beq.n 8007c74 + && ((cr1its & USART_CR1_TXEIE) != 0U)) + 8007c58: 69bb ldr r3, [r7, #24] + 8007c5a: f003 0380 and.w r3, r3, #128 ; 0x80 + 8007c5e: 2b00 cmp r3, #0 + 8007c60: d008 beq.n 8007c74 + { + if (huart->TxISR != NULL) + 8007c62: 687b ldr r3, [r7, #4] + 8007c64: 6e5b ldr r3, [r3, #100] ; 0x64 + 8007c66: 2b00 cmp r3, #0 + 8007c68: d017 beq.n 8007c9a { - Error_Handler(); - 8008226: f7fe ff0b bl 8007040 + huart->TxISR(huart); + 8007c6a: 687b ldr r3, [r7, #4] + 8007c6c: 6e5b ldr r3, [r3, #100] ; 0x64 + 8007c6e: 6878 ldr r0, [r7, #4] + 8007c70: 4798 blx r3 } + return; + 8007c72: e012 b.n 8007c9a + } - __HAL_LINKDMA(huart,hdmatx,hdma_usart3_tx); - 800822a: 687b ldr r3, [r7, #4] - 800822c: 4a53 ldr r2, [pc, #332] ; (800837c ) - 800822e: 669a str r2, [r3, #104] ; 0x68 - 8008230: 4a52 ldr r2, [pc, #328] ; (800837c ) - 8008232: 687b ldr r3, [r7, #4] - 8008234: 6393 str r3, [r2, #56] ; 0x38 - - /* USART3 interrupt Init */ - HAL_NVIC_SetPriority(USART3_IRQn, 0, 0); - 8008236: 2200 movs r2, #0 - 8008238: 2100 movs r1, #0 - 800823a: 2027 movs r0, #39 ; 0x27 - 800823c: f7f8 fabd bl 80007ba - HAL_NVIC_EnableIRQ(USART3_IRQn); - 8008240: 2027 movs r0, #39 ; 0x27 - 8008242: f7f8 fad6 bl 80007f2 - /* USER CODE BEGIN USART6_MspInit 1 */ - - /* USER CODE END USART6_MspInit 1 */ + /* UART in mode Transmitter (transmission end) -----------------------------*/ + if (((isrflags & USART_ISR_TC) != 0U) && ((cr1its & USART_CR1_TCIE) != 0U)) + 8007c74: 69fb ldr r3, [r7, #28] + 8007c76: f003 0340 and.w r3, r3, #64 ; 0x40 + 8007c7a: 2b00 cmp r3, #0 + 8007c7c: d00e beq.n 8007c9c + 8007c7e: 69bb ldr r3, [r7, #24] + 8007c80: f003 0340 and.w r3, r3, #64 ; 0x40 + 8007c84: 2b00 cmp r3, #0 + 8007c86: d009 beq.n 8007c9c + { + UART_EndTransmit_IT(huart); + 8007c88: 6878 ldr r0, [r7, #4] + 8007c8a: f000 fce5 bl 8008658 + return; + 8007c8e: bf00 nop + 8007c90: e004 b.n 8007c9c + return; + 8007c92: bf00 nop + 8007c94: e002 b.n 8007c9c + return; + 8007c96: bf00 nop + 8007c98: e000 b.n 8007c9c + return; + 8007c9a: bf00 nop } } - 8008246: e08b b.n 8008360 - else if(huart->Instance==USART6) - 8008248: 687b ldr r3, [r7, #4] - 800824a: 681b ldr r3, [r3, #0] - 800824c: 4a4d ldr r2, [pc, #308] ; (8008384 ) - 800824e: 4293 cmp r3, r2 - 8008250: f040 8086 bne.w 8008360 - __HAL_RCC_USART6_CLK_ENABLE(); - 8008254: 4b45 ldr r3, [pc, #276] ; (800836c ) - 8008256: 6c5b ldr r3, [r3, #68] ; 0x44 - 8008258: 4a44 ldr r2, [pc, #272] ; (800836c ) - 800825a: f043 0320 orr.w r3, r3, #32 - 800825e: 6453 str r3, [r2, #68] ; 0x44 - 8008260: 4b42 ldr r3, [pc, #264] ; (800836c ) - 8008262: 6c5b ldr r3, [r3, #68] ; 0x44 - 8008264: f003 0320 and.w r3, r3, #32 - 8008268: 613b str r3, [r7, #16] - 800826a: 693b ldr r3, [r7, #16] - __HAL_RCC_GPIOC_CLK_ENABLE(); - 800826c: 4b3f ldr r3, [pc, #252] ; (800836c ) - 800826e: 6b1b ldr r3, [r3, #48] ; 0x30 - 8008270: 4a3e ldr r2, [pc, #248] ; (800836c ) - 8008272: f043 0304 orr.w r3, r3, #4 - 8008276: 6313 str r3, [r2, #48] ; 0x30 - 8008278: 4b3c ldr r3, [pc, #240] ; (800836c ) - 800827a: 6b1b ldr r3, [r3, #48] ; 0x30 - 800827c: f003 0304 and.w r3, r3, #4 - 8008280: 60fb str r3, [r7, #12] - 8008282: 68fb ldr r3, [r7, #12] - GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7; - 8008284: 23c0 movs r3, #192 ; 0xc0 - 8008286: 61fb str r3, [r7, #28] - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8008288: 2302 movs r3, #2 - 800828a: 623b str r3, [r7, #32] - GPIO_InitStruct.Pull = GPIO_NOPULL; - 800828c: 2300 movs r3, #0 - 800828e: 627b str r3, [r7, #36] ; 0x24 - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - 8008290: 2303 movs r3, #3 - 8008292: 62bb str r3, [r7, #40] ; 0x28 - GPIO_InitStruct.Alternate = GPIO_AF8_USART6; - 8008294: 2308 movs r3, #8 - 8008296: 62fb str r3, [r7, #44] ; 0x2c - HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); - 8008298: f107 031c add.w r3, r7, #28 - 800829c: 4619 mov r1, r3 - 800829e: 483a ldr r0, [pc, #232] ; (8008388 ) - 80082a0: f7f8 fe5a bl 8000f58 - hdma_usart6_rx.Instance = DMA2_Stream1; - 80082a4: 4b39 ldr r3, [pc, #228] ; (800838c ) - 80082a6: 4a3a ldr r2, [pc, #232] ; (8008390 ) - 80082a8: 601a str r2, [r3, #0] - hdma_usart6_rx.Init.Channel = DMA_CHANNEL_5; - 80082aa: 4b38 ldr r3, [pc, #224] ; (800838c ) - 80082ac: f04f 6220 mov.w r2, #167772160 ; 0xa000000 - 80082b0: 605a str r2, [r3, #4] - hdma_usart6_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; - 80082b2: 4b36 ldr r3, [pc, #216] ; (800838c ) - 80082b4: 2200 movs r2, #0 - 80082b6: 609a str r2, [r3, #8] - hdma_usart6_rx.Init.PeriphInc = DMA_PINC_DISABLE; - 80082b8: 4b34 ldr r3, [pc, #208] ; (800838c ) - 80082ba: 2200 movs r2, #0 - 80082bc: 60da str r2, [r3, #12] - hdma_usart6_rx.Init.MemInc = DMA_MINC_ENABLE; - 80082be: 4b33 ldr r3, [pc, #204] ; (800838c ) - 80082c0: f44f 6280 mov.w r2, #1024 ; 0x400 - 80082c4: 611a str r2, [r3, #16] - hdma_usart6_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; - 80082c6: 4b31 ldr r3, [pc, #196] ; (800838c ) - 80082c8: 2200 movs r2, #0 - 80082ca: 615a str r2, [r3, #20] - hdma_usart6_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; - 80082cc: 4b2f ldr r3, [pc, #188] ; (800838c ) - 80082ce: 2200 movs r2, #0 - 80082d0: 619a str r2, [r3, #24] - hdma_usart6_rx.Init.Mode = DMA_NORMAL; - 80082d2: 4b2e ldr r3, [pc, #184] ; (800838c ) - 80082d4: 2200 movs r2, #0 - 80082d6: 61da str r2, [r3, #28] - hdma_usart6_rx.Init.Priority = DMA_PRIORITY_HIGH; - 80082d8: 4b2c ldr r3, [pc, #176] ; (800838c ) - 80082da: f44f 3200 mov.w r2, #131072 ; 0x20000 - 80082de: 621a str r2, [r3, #32] - hdma_usart6_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; - 80082e0: 4b2a ldr r3, [pc, #168] ; (800838c ) - 80082e2: 2200 movs r2, #0 - 80082e4: 625a str r2, [r3, #36] ; 0x24 - if (HAL_DMA_Init(&hdma_usart6_rx) != HAL_OK) - 80082e6: 4829 ldr r0, [pc, #164] ; (800838c ) - 80082e8: f7f8 fa9e bl 8000828 - 80082ec: 4603 mov r3, r0 - 80082ee: 2b00 cmp r3, #0 - 80082f0: d001 beq.n 80082f6 - Error_Handler(); - 80082f2: f7fe fea5 bl 8007040 - __HAL_LINKDMA(huart,hdmarx,hdma_usart6_rx); - 80082f6: 687b ldr r3, [r7, #4] - 80082f8: 4a24 ldr r2, [pc, #144] ; (800838c ) - 80082fa: 66da str r2, [r3, #108] ; 0x6c - 80082fc: 4a23 ldr r2, [pc, #140] ; (800838c ) - 80082fe: 687b ldr r3, [r7, #4] - 8008300: 6393 str r3, [r2, #56] ; 0x38 - hdma_usart6_tx.Instance = DMA2_Stream6; - 8008302: 4b24 ldr r3, [pc, #144] ; (8008394 ) - 8008304: 4a24 ldr r2, [pc, #144] ; (8008398 ) - 8008306: 601a str r2, [r3, #0] - hdma_usart6_tx.Init.Channel = DMA_CHANNEL_5; - 8008308: 4b22 ldr r3, [pc, #136] ; (8008394 ) - 800830a: f04f 6220 mov.w r2, #167772160 ; 0xa000000 - 800830e: 605a str r2, [r3, #4] - hdma_usart6_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; - 8008310: 4b20 ldr r3, [pc, #128] ; (8008394 ) - 8008312: 2240 movs r2, #64 ; 0x40 - 8008314: 609a str r2, [r3, #8] - hdma_usart6_tx.Init.PeriphInc = DMA_PINC_DISABLE; - 8008316: 4b1f ldr r3, [pc, #124] ; (8008394 ) - 8008318: 2200 movs r2, #0 - 800831a: 60da str r2, [r3, #12] - hdma_usart6_tx.Init.MemInc = DMA_MINC_ENABLE; - 800831c: 4b1d ldr r3, [pc, #116] ; (8008394 ) - 800831e: f44f 6280 mov.w r2, #1024 ; 0x400 - 8008322: 611a str r2, [r3, #16] - hdma_usart6_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; - 8008324: 4b1b ldr r3, [pc, #108] ; (8008394 ) - 8008326: 2200 movs r2, #0 - 8008328: 615a str r2, [r3, #20] - hdma_usart6_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; - 800832a: 4b1a ldr r3, [pc, #104] ; (8008394 ) - 800832c: 2200 movs r2, #0 - 800832e: 619a str r2, [r3, #24] - hdma_usart6_tx.Init.Mode = DMA_NORMAL; - 8008330: 4b18 ldr r3, [pc, #96] ; (8008394 ) - 8008332: 2200 movs r2, #0 - 8008334: 61da str r2, [r3, #28] - hdma_usart6_tx.Init.Priority = DMA_PRIORITY_HIGH; - 8008336: 4b17 ldr r3, [pc, #92] ; (8008394 ) - 8008338: f44f 3200 mov.w r2, #131072 ; 0x20000 - 800833c: 621a str r2, [r3, #32] - hdma_usart6_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; - 800833e: 4b15 ldr r3, [pc, #84] ; (8008394 ) - 8008340: 2200 movs r2, #0 - 8008342: 625a str r2, [r3, #36] ; 0x24 - if (HAL_DMA_Init(&hdma_usart6_tx) != HAL_OK) - 8008344: 4813 ldr r0, [pc, #76] ; (8008394 ) - 8008346: f7f8 fa6f bl 8000828 - 800834a: 4603 mov r3, r0 - 800834c: 2b00 cmp r3, #0 - 800834e: d001 beq.n 8008354 - Error_Handler(); - 8008350: f7fe fe76 bl 8007040 - __HAL_LINKDMA(huart,hdmatx,hdma_usart6_tx); - 8008354: 687b ldr r3, [r7, #4] - 8008356: 4a0f ldr r2, [pc, #60] ; (8008394 ) - 8008358: 669a str r2, [r3, #104] ; 0x68 - 800835a: 4a0e ldr r2, [pc, #56] ; (8008394 ) - 800835c: 687b ldr r3, [r7, #4] - 800835e: 6393 str r3, [r2, #56] ; 0x38 -} - 8008360: bf00 nop - 8008362: 3730 adds r7, #48 ; 0x30 - 8008364: 46bd mov sp, r7 - 8008366: bd80 pop {r7, pc} - 8008368: 40004800 .word 0x40004800 - 800836c: 40023800 .word 0x40023800 - 8008370: 40020c00 .word 0x40020c00 - 8008374: 200002a4 .word 0x200002a4 - 8008378: 40026028 .word 0x40026028 - 800837c: 20000304 .word 0x20000304 - 8008380: 40026058 .word 0x40026058 - 8008384: 40011400 .word 0x40011400 - 8008388: 40020800 .word 0x40020800 - 800838c: 20000364 .word 0x20000364 - 8008390: 40026428 .word 0x40026428 - 8008394: 200003c4 .word 0x200003c4 - 8008398: 400264a0 .word 0x400264a0 - -0800839c : -/******************************************************************************/ -/** - * @brief This function handles Non maskable interrupt. + 8007c9c: 3720 adds r7, #32 + 8007c9e: 46bd mov sp, r7 + 8007ca0: bd80 pop {r7, pc} + 8007ca2: bf00 nop + 8007ca4: 0800862d .word 0x0800862d + +08007ca8 : + * @brief Tx Half Transfer completed callback. + * @param huart UART handle. + * @retval None */ -void NMI_Handler(void) +__weak void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart) { - 800839c: b480 push {r7} - 800839e: af00 add r7, sp, #0 - - /* USER CODE END NonMaskableInt_IRQn 0 */ - /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ + 8007ca8: b480 push {r7} + 8007caa: b083 sub sp, #12 + 8007cac: af00 add r7, sp, #0 + 8007cae: 6078 str r0, [r7, #4] + UNUSED(huart); - /* USER CODE END NonMaskableInt_IRQn 1 */ + /* NOTE: This function should not be modified, when the callback is needed, + the HAL_UART_TxHalfCpltCallback can be implemented in the user file. + */ } - 80083a0: bf00 nop - 80083a2: 46bd mov sp, r7 - 80083a4: f85d 7b04 ldr.w r7, [sp], #4 - 80083a8: 4770 bx lr + 8007cb0: bf00 nop + 8007cb2: 370c adds r7, #12 + 8007cb4: 46bd mov sp, r7 + 8007cb6: f85d 7b04 ldr.w r7, [sp], #4 + 8007cba: 4770 bx lr -080083aa : - -/** - * @brief This function handles Hard fault interrupt. +08007cbc : + * @brief Rx Half Transfer completed callback. + * @param huart UART handle. + * @retval None */ -void HardFault_Handler(void) +__weak void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart) { - 80083aa: b480 push {r7} - 80083ac: af00 add r7, sp, #0 - /* USER CODE BEGIN HardFault_IRQn 0 */ - - /* USER CODE END HardFault_IRQn 0 */ - while (1) - 80083ae: e7fe b.n 80083ae + 8007cbc: b480 push {r7} + 8007cbe: b083 sub sp, #12 + 8007cc0: af00 add r7, sp, #0 + 8007cc2: 6078 str r0, [r7, #4] + UNUSED(huart); -080083b0 : + /* NOTE: This function should not be modified, when the callback is needed, + the HAL_UART_RxHalfCpltCallback can be implemented in the user file. + */ +} + 8007cc4: bf00 nop + 8007cc6: 370c adds r7, #12 + 8007cc8: 46bd mov sp, r7 + 8007cca: f85d 7b04 ldr.w r7, [sp], #4 + 8007cce: 4770 bx lr -/** - * @brief This function handles Memory management fault. +08007cd0 : + * @brief UART error callback. + * @param huart UART handle. + * @retval None */ -void MemManage_Handler(void) +__weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart) { - 80083b0: b480 push {r7} - 80083b2: af00 add r7, sp, #0 - /* USER CODE BEGIN MemoryManagement_IRQn 0 */ - - /* USER CODE END MemoryManagement_IRQn 0 */ - while (1) - 80083b4: e7fe b.n 80083b4 + 8007cd0: b480 push {r7} + 8007cd2: b083 sub sp, #12 + 8007cd4: af00 add r7, sp, #0 + 8007cd6: 6078 str r0, [r7, #4] + UNUSED(huart); -080083b6 : + /* NOTE : This function should not be modified, when the callback is needed, + the HAL_UART_ErrorCallback can be implemented in the user file. + */ +} + 8007cd8: bf00 nop + 8007cda: 370c adds r7, #12 + 8007cdc: 46bd mov sp, r7 + 8007cde: f85d 7b04 ldr.w r7, [sp], #4 + 8007ce2: 4770 bx lr -/** - * @brief This function handles Pre-fetch fault, memory access fault. +08007ce4 : + * @brief Configure the UART peripheral. + * @param huart UART handle. + * @retval HAL status */ -void BusFault_Handler(void) +HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart) { - 80083b6: b480 push {r7} - 80083b8: af00 add r7, sp, #0 - /* USER CODE BEGIN BusFault_IRQn 0 */ + 8007ce4: b580 push {r7, lr} + 8007ce6: b088 sub sp, #32 + 8007ce8: af00 add r7, sp, #0 + 8007cea: 6078 str r0, [r7, #4] + uint32_t tmpreg; + uint16_t brrtemp; + UART_ClockSourceTypeDef clocksource; + uint32_t usartdiv = 0x00000000U; + 8007cec: 2300 movs r3, #0 + 8007cee: 61bb str r3, [r7, #24] + HAL_StatusTypeDef ret = HAL_OK; + 8007cf0: 2300 movs r3, #0 + 8007cf2: 75fb strb r3, [r7, #23] + * the UART Word Length, Parity, Mode and oversampling: + * set the M bits according to huart->Init.WordLength value + * set PCE and PS bits according to huart->Init.Parity value + * set TE and RE bits according to huart->Init.Mode value + * set OVER8 bit according to huart->Init.OverSampling value */ + tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling ; + 8007cf4: 687b ldr r3, [r7, #4] + 8007cf6: 689a ldr r2, [r3, #8] + 8007cf8: 687b ldr r3, [r7, #4] + 8007cfa: 691b ldr r3, [r3, #16] + 8007cfc: 431a orrs r2, r3 + 8007cfe: 687b ldr r3, [r7, #4] + 8007d00: 695b ldr r3, [r3, #20] + 8007d02: 431a orrs r2, r3 + 8007d04: 687b ldr r3, [r7, #4] + 8007d06: 69db ldr r3, [r3, #28] + 8007d08: 4313 orrs r3, r2 + 8007d0a: 613b str r3, [r7, #16] + MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg); + 8007d0c: 687b ldr r3, [r7, #4] + 8007d0e: 681b ldr r3, [r3, #0] + 8007d10: 681a ldr r2, [r3, #0] + 8007d12: 4bb1 ldr r3, [pc, #708] ; (8007fd8 ) + 8007d14: 4013 ands r3, r2 + 8007d16: 687a ldr r2, [r7, #4] + 8007d18: 6812 ldr r2, [r2, #0] + 8007d1a: 6939 ldr r1, [r7, #16] + 8007d1c: 430b orrs r3, r1 + 8007d1e: 6013 str r3, [r2, #0] - /* USER CODE END BusFault_IRQn 0 */ - while (1) - 80083ba: e7fe b.n 80083ba + /*-------------------------- USART CR2 Configuration -----------------------*/ + /* Configure the UART Stop Bits: Set STOP[13:12] bits according + * to huart->Init.StopBits value */ + MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); + 8007d20: 687b ldr r3, [r7, #4] + 8007d22: 681b ldr r3, [r3, #0] + 8007d24: 685b ldr r3, [r3, #4] + 8007d26: f423 5140 bic.w r1, r3, #12288 ; 0x3000 + 8007d2a: 687b ldr r3, [r7, #4] + 8007d2c: 68da ldr r2, [r3, #12] + 8007d2e: 687b ldr r3, [r7, #4] + 8007d30: 681b ldr r3, [r3, #0] + 8007d32: 430a orrs r2, r1 + 8007d34: 605a str r2, [r3, #4] + /* Configure + * - UART HardWare Flow Control: set CTSE and RTSE bits according + * to huart->Init.HwFlowCtl value + * - one-bit sampling method versus three samples' majority rule according + * to huart->Init.OneBitSampling (not applicable to LPUART) */ + tmpreg = (uint32_t)huart->Init.HwFlowCtl; + 8007d36: 687b ldr r3, [r7, #4] + 8007d38: 699b ldr r3, [r3, #24] + 8007d3a: 613b str r3, [r7, #16] -080083bc : + tmpreg |= huart->Init.OneBitSampling; + 8007d3c: 687b ldr r3, [r7, #4] + 8007d3e: 6a1b ldr r3, [r3, #32] + 8007d40: 693a ldr r2, [r7, #16] + 8007d42: 4313 orrs r3, r2 + 8007d44: 613b str r3, [r7, #16] + MODIFY_REG(huart->Instance->CR3, USART_CR3_FIELDS, tmpreg); + 8007d46: 687b ldr r3, [r7, #4] + 8007d48: 681b ldr r3, [r3, #0] + 8007d4a: 689b ldr r3, [r3, #8] + 8007d4c: f423 6130 bic.w r1, r3, #2816 ; 0xb00 + 8007d50: 687b ldr r3, [r7, #4] + 8007d52: 681b ldr r3, [r3, #0] + 8007d54: 693a ldr r2, [r7, #16] + 8007d56: 430a orrs r2, r1 + 8007d58: 609a str r2, [r3, #8] -/** - * @brief This function handles Undefined instruction or illegal state. - */ -void UsageFault_Handler(void) -{ - 80083bc: b480 push {r7} - 80083be: af00 add r7, sp, #0 - /* USER CODE BEGIN UsageFault_IRQn 0 */ - /* USER CODE END UsageFault_IRQn 0 */ - while (1) - 80083c0: e7fe b.n 80083c0 + /*-------------------------- USART BRR Configuration -----------------------*/ + UART_GETCLOCKSOURCE(huart, clocksource); + 8007d5a: 687b ldr r3, [r7, #4] + 8007d5c: 681b ldr r3, [r3, #0] + 8007d5e: 4a9f ldr r2, [pc, #636] ; (8007fdc ) + 8007d60: 4293 cmp r3, r2 + 8007d62: d121 bne.n 8007da8 + 8007d64: 4b9e ldr r3, [pc, #632] ; (8007fe0 ) + 8007d66: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 8007d6a: f003 0303 and.w r3, r3, #3 + 8007d6e: 2b03 cmp r3, #3 + 8007d70: d816 bhi.n 8007da0 + 8007d72: a201 add r2, pc, #4 ; (adr r2, 8007d78 ) + 8007d74: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 8007d78: 08007d89 .word 0x08007d89 + 8007d7c: 08007d95 .word 0x08007d95 + 8007d80: 08007d8f .word 0x08007d8f + 8007d84: 08007d9b .word 0x08007d9b + 8007d88: 2301 movs r3, #1 + 8007d8a: 77fb strb r3, [r7, #31] + 8007d8c: e151 b.n 8008032 + 8007d8e: 2302 movs r3, #2 + 8007d90: 77fb strb r3, [r7, #31] + 8007d92: e14e b.n 8008032 + 8007d94: 2304 movs r3, #4 + 8007d96: 77fb strb r3, [r7, #31] + 8007d98: e14b b.n 8008032 + 8007d9a: 2308 movs r3, #8 + 8007d9c: 77fb strb r3, [r7, #31] + 8007d9e: e148 b.n 8008032 + 8007da0: 2310 movs r3, #16 + 8007da2: 77fb strb r3, [r7, #31] + 8007da4: bf00 nop + 8007da6: e144 b.n 8008032 + 8007da8: 687b ldr r3, [r7, #4] + 8007daa: 681b ldr r3, [r3, #0] + 8007dac: 4a8d ldr r2, [pc, #564] ; (8007fe4 ) + 8007dae: 4293 cmp r3, r2 + 8007db0: d134 bne.n 8007e1c + 8007db2: 4b8b ldr r3, [pc, #556] ; (8007fe0 ) + 8007db4: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 8007db8: f003 030c and.w r3, r3, #12 + 8007dbc: 2b0c cmp r3, #12 + 8007dbe: d829 bhi.n 8007e14 + 8007dc0: a201 add r2, pc, #4 ; (adr r2, 8007dc8 ) + 8007dc2: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 8007dc6: bf00 nop + 8007dc8: 08007dfd .word 0x08007dfd + 8007dcc: 08007e15 .word 0x08007e15 + 8007dd0: 08007e15 .word 0x08007e15 + 8007dd4: 08007e15 .word 0x08007e15 + 8007dd8: 08007e09 .word 0x08007e09 + 8007ddc: 08007e15 .word 0x08007e15 + 8007de0: 08007e15 .word 0x08007e15 + 8007de4: 08007e15 .word 0x08007e15 + 8007de8: 08007e03 .word 0x08007e03 + 8007dec: 08007e15 .word 0x08007e15 + 8007df0: 08007e15 .word 0x08007e15 + 8007df4: 08007e15 .word 0x08007e15 + 8007df8: 08007e0f .word 0x08007e0f + 8007dfc: 2300 movs r3, #0 + 8007dfe: 77fb strb r3, [r7, #31] + 8007e00: e117 b.n 8008032 + 8007e02: 2302 movs r3, #2 + 8007e04: 77fb strb r3, [r7, #31] + 8007e06: e114 b.n 8008032 + 8007e08: 2304 movs r3, #4 + 8007e0a: 77fb strb r3, [r7, #31] + 8007e0c: e111 b.n 8008032 + 8007e0e: 2308 movs r3, #8 + 8007e10: 77fb strb r3, [r7, #31] + 8007e12: e10e b.n 8008032 + 8007e14: 2310 movs r3, #16 + 8007e16: 77fb strb r3, [r7, #31] + 8007e18: bf00 nop + 8007e1a: e10a b.n 8008032 + 8007e1c: 687b ldr r3, [r7, #4] + 8007e1e: 681b ldr r3, [r3, #0] + 8007e20: 4a71 ldr r2, [pc, #452] ; (8007fe8 ) + 8007e22: 4293 cmp r3, r2 + 8007e24: d120 bne.n 8007e68 + 8007e26: 4b6e ldr r3, [pc, #440] ; (8007fe0 ) + 8007e28: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 8007e2c: f003 0330 and.w r3, r3, #48 ; 0x30 + 8007e30: 2b10 cmp r3, #16 + 8007e32: d00f beq.n 8007e54 + 8007e34: 2b10 cmp r3, #16 + 8007e36: d802 bhi.n 8007e3e + 8007e38: 2b00 cmp r3, #0 + 8007e3a: d005 beq.n 8007e48 + 8007e3c: e010 b.n 8007e60 + 8007e3e: 2b20 cmp r3, #32 + 8007e40: d005 beq.n 8007e4e + 8007e42: 2b30 cmp r3, #48 ; 0x30 + 8007e44: d009 beq.n 8007e5a + 8007e46: e00b b.n 8007e60 + 8007e48: 2300 movs r3, #0 + 8007e4a: 77fb strb r3, [r7, #31] + 8007e4c: e0f1 b.n 8008032 + 8007e4e: 2302 movs r3, #2 + 8007e50: 77fb strb r3, [r7, #31] + 8007e52: e0ee b.n 8008032 + 8007e54: 2304 movs r3, #4 + 8007e56: 77fb strb r3, [r7, #31] + 8007e58: e0eb b.n 8008032 + 8007e5a: 2308 movs r3, #8 + 8007e5c: 77fb strb r3, [r7, #31] + 8007e5e: e0e8 b.n 8008032 + 8007e60: 2310 movs r3, #16 + 8007e62: 77fb strb r3, [r7, #31] + 8007e64: bf00 nop + 8007e66: e0e4 b.n 8008032 + 8007e68: 687b ldr r3, [r7, #4] + 8007e6a: 681b ldr r3, [r3, #0] + 8007e6c: 4a5f ldr r2, [pc, #380] ; (8007fec ) + 8007e6e: 4293 cmp r3, r2 + 8007e70: d120 bne.n 8007eb4 + 8007e72: 4b5b ldr r3, [pc, #364] ; (8007fe0 ) + 8007e74: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 8007e78: f003 03c0 and.w r3, r3, #192 ; 0xc0 + 8007e7c: 2b40 cmp r3, #64 ; 0x40 + 8007e7e: d00f beq.n 8007ea0 + 8007e80: 2b40 cmp r3, #64 ; 0x40 + 8007e82: d802 bhi.n 8007e8a + 8007e84: 2b00 cmp r3, #0 + 8007e86: d005 beq.n 8007e94 + 8007e88: e010 b.n 8007eac + 8007e8a: 2b80 cmp r3, #128 ; 0x80 + 8007e8c: d005 beq.n 8007e9a + 8007e8e: 2bc0 cmp r3, #192 ; 0xc0 + 8007e90: d009 beq.n 8007ea6 + 8007e92: e00b b.n 8007eac + 8007e94: 2300 movs r3, #0 + 8007e96: 77fb strb r3, [r7, #31] + 8007e98: e0cb b.n 8008032 + 8007e9a: 2302 movs r3, #2 + 8007e9c: 77fb strb r3, [r7, #31] + 8007e9e: e0c8 b.n 8008032 + 8007ea0: 2304 movs r3, #4 + 8007ea2: 77fb strb r3, [r7, #31] + 8007ea4: e0c5 b.n 8008032 + 8007ea6: 2308 movs r3, #8 + 8007ea8: 77fb strb r3, [r7, #31] + 8007eaa: e0c2 b.n 8008032 + 8007eac: 2310 movs r3, #16 + 8007eae: 77fb strb r3, [r7, #31] + 8007eb0: bf00 nop + 8007eb2: e0be b.n 8008032 + 8007eb4: 687b ldr r3, [r7, #4] + 8007eb6: 681b ldr r3, [r3, #0] + 8007eb8: 4a4d ldr r2, [pc, #308] ; (8007ff0 ) + 8007eba: 4293 cmp r3, r2 + 8007ebc: d124 bne.n 8007f08 + 8007ebe: 4b48 ldr r3, [pc, #288] ; (8007fe0 ) + 8007ec0: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 8007ec4: f403 7340 and.w r3, r3, #768 ; 0x300 + 8007ec8: f5b3 7f80 cmp.w r3, #256 ; 0x100 + 8007ecc: d012 beq.n 8007ef4 + 8007ece: f5b3 7f80 cmp.w r3, #256 ; 0x100 + 8007ed2: d802 bhi.n 8007eda + 8007ed4: 2b00 cmp r3, #0 + 8007ed6: d007 beq.n 8007ee8 + 8007ed8: e012 b.n 8007f00 + 8007eda: f5b3 7f00 cmp.w r3, #512 ; 0x200 + 8007ede: d006 beq.n 8007eee + 8007ee0: f5b3 7f40 cmp.w r3, #768 ; 0x300 + 8007ee4: d009 beq.n 8007efa + 8007ee6: e00b b.n 8007f00 + 8007ee8: 2300 movs r3, #0 + 8007eea: 77fb strb r3, [r7, #31] + 8007eec: e0a1 b.n 8008032 + 8007eee: 2302 movs r3, #2 + 8007ef0: 77fb strb r3, [r7, #31] + 8007ef2: e09e b.n 8008032 + 8007ef4: 2304 movs r3, #4 + 8007ef6: 77fb strb r3, [r7, #31] + 8007ef8: e09b b.n 8008032 + 8007efa: 2308 movs r3, #8 + 8007efc: 77fb strb r3, [r7, #31] + 8007efe: e098 b.n 8008032 + 8007f00: 2310 movs r3, #16 + 8007f02: 77fb strb r3, [r7, #31] + 8007f04: bf00 nop + 8007f06: e094 b.n 8008032 + 8007f08: 687b ldr r3, [r7, #4] + 8007f0a: 681b ldr r3, [r3, #0] + 8007f0c: 4a39 ldr r2, [pc, #228] ; (8007ff4 ) + 8007f0e: 4293 cmp r3, r2 + 8007f10: d124 bne.n 8007f5c + 8007f12: 4b33 ldr r3, [pc, #204] ; (8007fe0 ) + 8007f14: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 8007f18: f403 6340 and.w r3, r3, #3072 ; 0xc00 + 8007f1c: f5b3 6f80 cmp.w r3, #1024 ; 0x400 + 8007f20: d012 beq.n 8007f48 + 8007f22: f5b3 6f80 cmp.w r3, #1024 ; 0x400 + 8007f26: d802 bhi.n 8007f2e + 8007f28: 2b00 cmp r3, #0 + 8007f2a: d007 beq.n 8007f3c + 8007f2c: e012 b.n 8007f54 + 8007f2e: f5b3 6f00 cmp.w r3, #2048 ; 0x800 + 8007f32: d006 beq.n 8007f42 + 8007f34: f5b3 6f40 cmp.w r3, #3072 ; 0xc00 + 8007f38: d009 beq.n 8007f4e + 8007f3a: e00b b.n 8007f54 + 8007f3c: 2301 movs r3, #1 + 8007f3e: 77fb strb r3, [r7, #31] + 8007f40: e077 b.n 8008032 + 8007f42: 2302 movs r3, #2 + 8007f44: 77fb strb r3, [r7, #31] + 8007f46: e074 b.n 8008032 + 8007f48: 2304 movs r3, #4 + 8007f4a: 77fb strb r3, [r7, #31] + 8007f4c: e071 b.n 8008032 + 8007f4e: 2308 movs r3, #8 + 8007f50: 77fb strb r3, [r7, #31] + 8007f52: e06e b.n 8008032 + 8007f54: 2310 movs r3, #16 + 8007f56: 77fb strb r3, [r7, #31] + 8007f58: bf00 nop + 8007f5a: e06a b.n 8008032 + 8007f5c: 687b ldr r3, [r7, #4] + 8007f5e: 681b ldr r3, [r3, #0] + 8007f60: 4a25 ldr r2, [pc, #148] ; (8007ff8 ) + 8007f62: 4293 cmp r3, r2 + 8007f64: d124 bne.n 8007fb0 + 8007f66: 4b1e ldr r3, [pc, #120] ; (8007fe0 ) + 8007f68: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 8007f6c: f403 5340 and.w r3, r3, #12288 ; 0x3000 + 8007f70: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 + 8007f74: d012 beq.n 8007f9c + 8007f76: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 + 8007f7a: d802 bhi.n 8007f82 + 8007f7c: 2b00 cmp r3, #0 + 8007f7e: d007 beq.n 8007f90 + 8007f80: e012 b.n 8007fa8 + 8007f82: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 + 8007f86: d006 beq.n 8007f96 + 8007f88: f5b3 5f40 cmp.w r3, #12288 ; 0x3000 + 8007f8c: d009 beq.n 8007fa2 + 8007f8e: e00b b.n 8007fa8 + 8007f90: 2300 movs r3, #0 + 8007f92: 77fb strb r3, [r7, #31] + 8007f94: e04d b.n 8008032 + 8007f96: 2302 movs r3, #2 + 8007f98: 77fb strb r3, [r7, #31] + 8007f9a: e04a b.n 8008032 + 8007f9c: 2304 movs r3, #4 + 8007f9e: 77fb strb r3, [r7, #31] + 8007fa0: e047 b.n 8008032 + 8007fa2: 2308 movs r3, #8 + 8007fa4: 77fb strb r3, [r7, #31] + 8007fa6: e044 b.n 8008032 + 8007fa8: 2310 movs r3, #16 + 8007faa: 77fb strb r3, [r7, #31] + 8007fac: bf00 nop + 8007fae: e040 b.n 8008032 + 8007fb0: 687b ldr r3, [r7, #4] + 8007fb2: 681b ldr r3, [r3, #0] + 8007fb4: 4a11 ldr r2, [pc, #68] ; (8007ffc ) + 8007fb6: 4293 cmp r3, r2 + 8007fb8: d139 bne.n 800802e + 8007fba: 4b09 ldr r3, [pc, #36] ; (8007fe0 ) + 8007fbc: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 8007fc0: f403 4340 and.w r3, r3, #49152 ; 0xc000 + 8007fc4: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 + 8007fc8: d027 beq.n 800801a + 8007fca: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 + 8007fce: d817 bhi.n 8008000 + 8007fd0: 2b00 cmp r3, #0 + 8007fd2: d01c beq.n 800800e + 8007fd4: e027 b.n 8008026 + 8007fd6: bf00 nop + 8007fd8: efff69f3 .word 0xefff69f3 + 8007fdc: 40011000 .word 0x40011000 + 8007fe0: 40023800 .word 0x40023800 + 8007fe4: 40004400 .word 0x40004400 + 8007fe8: 40004800 .word 0x40004800 + 8007fec: 40004c00 .word 0x40004c00 + 8007ff0: 40005000 .word 0x40005000 + 8007ff4: 40011400 .word 0x40011400 + 8007ff8: 40007800 .word 0x40007800 + 8007ffc: 40007c00 .word 0x40007c00 + 8008000: f5b3 4f00 cmp.w r3, #32768 ; 0x8000 + 8008004: d006 beq.n 8008014 + 8008006: f5b3 4f40 cmp.w r3, #49152 ; 0xc000 + 800800a: d009 beq.n 8008020 + 800800c: e00b b.n 8008026 + 800800e: 2300 movs r3, #0 + 8008010: 77fb strb r3, [r7, #31] + 8008012: e00e b.n 8008032 + 8008014: 2302 movs r3, #2 + 8008016: 77fb strb r3, [r7, #31] + 8008018: e00b b.n 8008032 + 800801a: 2304 movs r3, #4 + 800801c: 77fb strb r3, [r7, #31] + 800801e: e008 b.n 8008032 + 8008020: 2308 movs r3, #8 + 8008022: 77fb strb r3, [r7, #31] + 8008024: e005 b.n 8008032 + 8008026: 2310 movs r3, #16 + 8008028: 77fb strb r3, [r7, #31] + 800802a: bf00 nop + 800802c: e001 b.n 8008032 + 800802e: 2310 movs r3, #16 + 8008030: 77fb strb r3, [r7, #31] + + if (huart->Init.OverSampling == UART_OVERSAMPLING_8) + 8008032: 687b ldr r3, [r7, #4] + 8008034: 69db ldr r3, [r3, #28] + 8008036: f5b3 4f00 cmp.w r3, #32768 ; 0x8000 + 800803a: d17c bne.n 8008136 + { + switch (clocksource) + 800803c: 7ffb ldrb r3, [r7, #31] + 800803e: 2b08 cmp r3, #8 + 8008040: d859 bhi.n 80080f6 + 8008042: a201 add r2, pc, #4 ; (adr r2, 8008048 ) + 8008044: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 8008048: 0800806d .word 0x0800806d + 800804c: 0800808b .word 0x0800808b + 8008050: 080080a9 .word 0x080080a9 + 8008054: 080080f7 .word 0x080080f7 + 8008058: 080080c1 .word 0x080080c1 + 800805c: 080080f7 .word 0x080080f7 + 8008060: 080080f7 .word 0x080080f7 + 8008064: 080080f7 .word 0x080080f7 + 8008068: 080080df .word 0x080080df + { + case UART_CLOCKSOURCE_PCLK1: + usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate)); + 800806c: f7fd feea bl 8005e44 + 8008070: 4603 mov r3, r0 + 8008072: 005a lsls r2, r3, #1 + 8008074: 687b ldr r3, [r7, #4] + 8008076: 685b ldr r3, [r3, #4] + 8008078: 085b lsrs r3, r3, #1 + 800807a: 441a add r2, r3 + 800807c: 687b ldr r3, [r7, #4] + 800807e: 685b ldr r3, [r3, #4] + 8008080: fbb2 f3f3 udiv r3, r2, r3 + 8008084: b29b uxth r3, r3 + 8008086: 61bb str r3, [r7, #24] + break; + 8008088: e038 b.n 80080fc + case UART_CLOCKSOURCE_PCLK2: + usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate)); + 800808a: f7fd feef bl 8005e6c + 800808e: 4603 mov r3, r0 + 8008090: 005a lsls r2, r3, #1 + 8008092: 687b ldr r3, [r7, #4] + 8008094: 685b ldr r3, [r3, #4] + 8008096: 085b lsrs r3, r3, #1 + 8008098: 441a add r2, r3 + 800809a: 687b ldr r3, [r7, #4] + 800809c: 685b ldr r3, [r3, #4] + 800809e: fbb2 f3f3 udiv r3, r2, r3 + 80080a2: b29b uxth r3, r3 + 80080a4: 61bb str r3, [r7, #24] + break; + 80080a6: e029 b.n 80080fc + case UART_CLOCKSOURCE_HSI: + usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HSI_VALUE, huart->Init.BaudRate)); + 80080a8: 687b ldr r3, [r7, #4] + 80080aa: 685b ldr r3, [r3, #4] + 80080ac: 085a lsrs r2, r3, #1 + 80080ae: 4b5d ldr r3, [pc, #372] ; (8008224 ) + 80080b0: 4413 add r3, r2 + 80080b2: 687a ldr r2, [r7, #4] + 80080b4: 6852 ldr r2, [r2, #4] + 80080b6: fbb3 f3f2 udiv r3, r3, r2 + 80080ba: b29b uxth r3, r3 + 80080bc: 61bb str r3, [r7, #24] + break; + 80080be: e01d b.n 80080fc + case UART_CLOCKSOURCE_SYSCLK: + usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HAL_RCC_GetSysClockFreq(), huart->Init.BaudRate)); + 80080c0: f7fd fe02 bl 8005cc8 + 80080c4: 4603 mov r3, r0 + 80080c6: 005a lsls r2, r3, #1 + 80080c8: 687b ldr r3, [r7, #4] + 80080ca: 685b ldr r3, [r3, #4] + 80080cc: 085b lsrs r3, r3, #1 + 80080ce: 441a add r2, r3 + 80080d0: 687b ldr r3, [r7, #4] + 80080d2: 685b ldr r3, [r3, #4] + 80080d4: fbb2 f3f3 udiv r3, r2, r3 + 80080d8: b29b uxth r3, r3 + 80080da: 61bb str r3, [r7, #24] + break; + 80080dc: e00e b.n 80080fc + case UART_CLOCKSOURCE_LSE: + usartdiv = (uint16_t)(UART_DIV_SAMPLING8(LSE_VALUE, huart->Init.BaudRate)); + 80080de: 687b ldr r3, [r7, #4] + 80080e0: 685b ldr r3, [r3, #4] + 80080e2: 085b lsrs r3, r3, #1 + 80080e4: f503 3280 add.w r2, r3, #65536 ; 0x10000 + 80080e8: 687b ldr r3, [r7, #4] + 80080ea: 685b ldr r3, [r3, #4] + 80080ec: fbb2 f3f3 udiv r3, r2, r3 + 80080f0: b29b uxth r3, r3 + 80080f2: 61bb str r3, [r7, #24] + break; + 80080f4: e002 b.n 80080fc + case UART_CLOCKSOURCE_UNDEFINED: + default: + ret = HAL_ERROR; + 80080f6: 2301 movs r3, #1 + 80080f8: 75fb strb r3, [r7, #23] + break; + 80080fa: bf00 nop + } + + /* USARTDIV must be greater than or equal to 0d16 */ + if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX)) + 80080fc: 69bb ldr r3, [r7, #24] + 80080fe: 2b0f cmp r3, #15 + 8008100: d916 bls.n 8008130 + 8008102: 69bb ldr r3, [r7, #24] + 8008104: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 + 8008108: d212 bcs.n 8008130 + { + brrtemp = (uint16_t)(usartdiv & 0xFFF0U); + 800810a: 69bb ldr r3, [r7, #24] + 800810c: b29b uxth r3, r3 + 800810e: f023 030f bic.w r3, r3, #15 + 8008112: 81fb strh r3, [r7, #14] + brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U); + 8008114: 69bb ldr r3, [r7, #24] + 8008116: 085b lsrs r3, r3, #1 + 8008118: b29b uxth r3, r3 + 800811a: f003 0307 and.w r3, r3, #7 + 800811e: b29a uxth r2, r3 + 8008120: 89fb ldrh r3, [r7, #14] + 8008122: 4313 orrs r3, r2 + 8008124: 81fb strh r3, [r7, #14] + huart->Instance->BRR = brrtemp; + 8008126: 687b ldr r3, [r7, #4] + 8008128: 681b ldr r3, [r3, #0] + 800812a: 89fa ldrh r2, [r7, #14] + 800812c: 60da str r2, [r3, #12] + 800812e: e06e b.n 800820e + } + else + { + ret = HAL_ERROR; + 8008130: 2301 movs r3, #1 + 8008132: 75fb strb r3, [r7, #23] + 8008134: e06b b.n 800820e + } + } + else + { + switch (clocksource) + 8008136: 7ffb ldrb r3, [r7, #31] + 8008138: 2b08 cmp r3, #8 + 800813a: d857 bhi.n 80081ec + 800813c: a201 add r2, pc, #4 ; (adr r2, 8008144 ) + 800813e: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 8008142: bf00 nop + 8008144: 08008169 .word 0x08008169 + 8008148: 08008185 .word 0x08008185 + 800814c: 080081a1 .word 0x080081a1 + 8008150: 080081ed .word 0x080081ed + 8008154: 080081b9 .word 0x080081b9 + 8008158: 080081ed .word 0x080081ed + 800815c: 080081ed .word 0x080081ed + 8008160: 080081ed .word 0x080081ed + 8008164: 080081d5 .word 0x080081d5 + { + case UART_CLOCKSOURCE_PCLK1: + usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate)); + 8008168: f7fd fe6c bl 8005e44 + 800816c: 4602 mov r2, r0 + 800816e: 687b ldr r3, [r7, #4] + 8008170: 685b ldr r3, [r3, #4] + 8008172: 085b lsrs r3, r3, #1 + 8008174: 441a add r2, r3 + 8008176: 687b ldr r3, [r7, #4] + 8008178: 685b ldr r3, [r3, #4] + 800817a: fbb2 f3f3 udiv r3, r2, r3 + 800817e: b29b uxth r3, r3 + 8008180: 61bb str r3, [r7, #24] + break; + 8008182: e036 b.n 80081f2 + case UART_CLOCKSOURCE_PCLK2: + usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate)); + 8008184: f7fd fe72 bl 8005e6c + 8008188: 4602 mov r2, r0 + 800818a: 687b ldr r3, [r7, #4] + 800818c: 685b ldr r3, [r3, #4] + 800818e: 085b lsrs r3, r3, #1 + 8008190: 441a add r2, r3 + 8008192: 687b ldr r3, [r7, #4] + 8008194: 685b ldr r3, [r3, #4] + 8008196: fbb2 f3f3 udiv r3, r2, r3 + 800819a: b29b uxth r3, r3 + 800819c: 61bb str r3, [r7, #24] + break; + 800819e: e028 b.n 80081f2 + case UART_CLOCKSOURCE_HSI: + usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HSI_VALUE, huart->Init.BaudRate)); + 80081a0: 687b ldr r3, [r7, #4] + 80081a2: 685b ldr r3, [r3, #4] + 80081a4: 085a lsrs r2, r3, #1 + 80081a6: 4b20 ldr r3, [pc, #128] ; (8008228 ) + 80081a8: 4413 add r3, r2 + 80081aa: 687a ldr r2, [r7, #4] + 80081ac: 6852 ldr r2, [r2, #4] + 80081ae: fbb3 f3f2 udiv r3, r3, r2 + 80081b2: b29b uxth r3, r3 + 80081b4: 61bb str r3, [r7, #24] + break; + 80081b6: e01c b.n 80081f2 + case UART_CLOCKSOURCE_SYSCLK: + usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetSysClockFreq(), huart->Init.BaudRate)); + 80081b8: f7fd fd86 bl 8005cc8 + 80081bc: 4602 mov r2, r0 + 80081be: 687b ldr r3, [r7, #4] + 80081c0: 685b ldr r3, [r3, #4] + 80081c2: 085b lsrs r3, r3, #1 + 80081c4: 441a add r2, r3 + 80081c6: 687b ldr r3, [r7, #4] + 80081c8: 685b ldr r3, [r3, #4] + 80081ca: fbb2 f3f3 udiv r3, r2, r3 + 80081ce: b29b uxth r3, r3 + 80081d0: 61bb str r3, [r7, #24] + break; + 80081d2: e00e b.n 80081f2 + case UART_CLOCKSOURCE_LSE: + usartdiv = (uint16_t)(UART_DIV_SAMPLING16(LSE_VALUE, huart->Init.BaudRate)); + 80081d4: 687b ldr r3, [r7, #4] + 80081d6: 685b ldr r3, [r3, #4] + 80081d8: 085b lsrs r3, r3, #1 + 80081da: f503 4200 add.w r2, r3, #32768 ; 0x8000 + 80081de: 687b ldr r3, [r7, #4] + 80081e0: 685b ldr r3, [r3, #4] + 80081e2: fbb2 f3f3 udiv r3, r2, r3 + 80081e6: b29b uxth r3, r3 + 80081e8: 61bb str r3, [r7, #24] + break; + 80081ea: e002 b.n 80081f2 + case UART_CLOCKSOURCE_UNDEFINED: + default: + ret = HAL_ERROR; + 80081ec: 2301 movs r3, #1 + 80081ee: 75fb strb r3, [r7, #23] + break; + 80081f0: bf00 nop + } -080083c2 : + /* USARTDIV must be greater than or equal to 0d16 */ + if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX)) + 80081f2: 69bb ldr r3, [r7, #24] + 80081f4: 2b0f cmp r3, #15 + 80081f6: d908 bls.n 800820a + 80081f8: 69bb ldr r3, [r7, #24] + 80081fa: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 + 80081fe: d204 bcs.n 800820a + { + huart->Instance->BRR = usartdiv; + 8008200: 687b ldr r3, [r7, #4] + 8008202: 681b ldr r3, [r3, #0] + 8008204: 69ba ldr r2, [r7, #24] + 8008206: 60da str r2, [r3, #12] + 8008208: e001 b.n 800820e + } + else + { + ret = HAL_ERROR; + 800820a: 2301 movs r3, #1 + 800820c: 75fb strb r3, [r7, #23] + } + } -/** - * @brief This function handles System service call via SWI instruction. - */ -void SVC_Handler(void) -{ - 80083c2: b480 push {r7} - 80083c4: af00 add r7, sp, #0 - /* USER CODE END SVCall_IRQn 0 */ - /* USER CODE BEGIN SVCall_IRQn 1 */ + /* Clear ISR function pointers */ + huart->RxISR = NULL; + 800820e: 687b ldr r3, [r7, #4] + 8008210: 2200 movs r2, #0 + 8008212: 661a str r2, [r3, #96] ; 0x60 + huart->TxISR = NULL; + 8008214: 687b ldr r3, [r7, #4] + 8008216: 2200 movs r2, #0 + 8008218: 665a str r2, [r3, #100] ; 0x64 - /* USER CODE END SVCall_IRQn 1 */ + return ret; + 800821a: 7dfb ldrb r3, [r7, #23] } - 80083c6: bf00 nop - 80083c8: 46bd mov sp, r7 - 80083ca: f85d 7b04 ldr.w r7, [sp], #4 - 80083ce: 4770 bx lr - -080083d0 : - -/** - * @brief This function handles Debug monitor. + 800821c: 4618 mov r0, r3 + 800821e: 3720 adds r7, #32 + 8008220: 46bd mov sp, r7 + 8008222: bd80 pop {r7, pc} + 8008224: 01e84800 .word 0x01e84800 + 8008228: 00f42400 .word 0x00f42400 + +0800822c : + * @brief Configure the UART peripheral advanced features. + * @param huart UART handle. + * @retval None */ -void DebugMon_Handler(void) +void UART_AdvFeatureConfig(UART_HandleTypeDef *huart) { - 80083d0: b480 push {r7} - 80083d2: af00 add r7, sp, #0 - - /* USER CODE END DebugMonitor_IRQn 0 */ - /* USER CODE BEGIN DebugMonitor_IRQn 1 */ - - /* USER CODE END DebugMonitor_IRQn 1 */ -} - 80083d4: bf00 nop - 80083d6: 46bd mov sp, r7 - 80083d8: f85d 7b04 ldr.w r7, [sp], #4 - 80083dc: 4770 bx lr + 800822c: b480 push {r7} + 800822e: b083 sub sp, #12 + 8008230: af00 add r7, sp, #0 + 8008232: 6078 str r0, [r7, #4] + /* Check whether the set of advanced features to configure is properly set */ + assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit)); -080083de : + /* if required, configure TX pin active level inversion */ + if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT)) + 8008234: 687b ldr r3, [r7, #4] + 8008236: 6a5b ldr r3, [r3, #36] ; 0x24 + 8008238: f003 0301 and.w r3, r3, #1 + 800823c: 2b00 cmp r3, #0 + 800823e: d00a beq.n 8008256 + { + assert_param(IS_UART_ADVFEATURE_TXINV(huart->AdvancedInit.TxPinLevelInvert)); + MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert); + 8008240: 687b ldr r3, [r7, #4] + 8008242: 681b ldr r3, [r3, #0] + 8008244: 685b ldr r3, [r3, #4] + 8008246: f423 3100 bic.w r1, r3, #131072 ; 0x20000 + 800824a: 687b ldr r3, [r7, #4] + 800824c: 6a9a ldr r2, [r3, #40] ; 0x28 + 800824e: 687b ldr r3, [r7, #4] + 8008250: 681b ldr r3, [r3, #0] + 8008252: 430a orrs r2, r1 + 8008254: 605a str r2, [r3, #4] + } -/** - * @brief This function handles Pendable request for system service. - */ -void PendSV_Handler(void) -{ - 80083de: b480 push {r7} - 80083e0: af00 add r7, sp, #0 + /* if required, configure RX pin active level inversion */ + if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXINVERT_INIT)) + 8008256: 687b ldr r3, [r7, #4] + 8008258: 6a5b ldr r3, [r3, #36] ; 0x24 + 800825a: f003 0302 and.w r3, r3, #2 + 800825e: 2b00 cmp r3, #0 + 8008260: d00a beq.n 8008278 + { + assert_param(IS_UART_ADVFEATURE_RXINV(huart->AdvancedInit.RxPinLevelInvert)); + MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert); + 8008262: 687b ldr r3, [r7, #4] + 8008264: 681b ldr r3, [r3, #0] + 8008266: 685b ldr r3, [r3, #4] + 8008268: f423 3180 bic.w r1, r3, #65536 ; 0x10000 + 800826c: 687b ldr r3, [r7, #4] + 800826e: 6ada ldr r2, [r3, #44] ; 0x2c + 8008270: 687b ldr r3, [r7, #4] + 8008272: 681b ldr r3, [r3, #0] + 8008274: 430a orrs r2, r1 + 8008276: 605a str r2, [r3, #4] + } - /* USER CODE END PendSV_IRQn 0 */ - /* USER CODE BEGIN PendSV_IRQn 1 */ + /* if required, configure data inversion */ + if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DATAINVERT_INIT)) + 8008278: 687b ldr r3, [r7, #4] + 800827a: 6a5b ldr r3, [r3, #36] ; 0x24 + 800827c: f003 0304 and.w r3, r3, #4 + 8008280: 2b00 cmp r3, #0 + 8008282: d00a beq.n 800829a + { + assert_param(IS_UART_ADVFEATURE_DATAINV(huart->AdvancedInit.DataInvert)); + MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert); + 8008284: 687b ldr r3, [r7, #4] + 8008286: 681b ldr r3, [r3, #0] + 8008288: 685b ldr r3, [r3, #4] + 800828a: f423 2180 bic.w r1, r3, #262144 ; 0x40000 + 800828e: 687b ldr r3, [r7, #4] + 8008290: 6b1a ldr r2, [r3, #48] ; 0x30 + 8008292: 687b ldr r3, [r7, #4] + 8008294: 681b ldr r3, [r3, #0] + 8008296: 430a orrs r2, r1 + 8008298: 605a str r2, [r3, #4] + } - /* USER CODE END PendSV_IRQn 1 */ -} - 80083e2: bf00 nop - 80083e4: 46bd mov sp, r7 - 80083e6: f85d 7b04 ldr.w r7, [sp], #4 - 80083ea: 4770 bx lr + /* if required, configure RX/TX pins swap */ + if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT)) + 800829a: 687b ldr r3, [r7, #4] + 800829c: 6a5b ldr r3, [r3, #36] ; 0x24 + 800829e: f003 0308 and.w r3, r3, #8 + 80082a2: 2b00 cmp r3, #0 + 80082a4: d00a beq.n 80082bc + { + assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap)); + MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap); + 80082a6: 687b ldr r3, [r7, #4] + 80082a8: 681b ldr r3, [r3, #0] + 80082aa: 685b ldr r3, [r3, #4] + 80082ac: f423 4100 bic.w r1, r3, #32768 ; 0x8000 + 80082b0: 687b ldr r3, [r7, #4] + 80082b2: 6b5a ldr r2, [r3, #52] ; 0x34 + 80082b4: 687b ldr r3, [r7, #4] + 80082b6: 681b ldr r3, [r3, #0] + 80082b8: 430a orrs r2, r1 + 80082ba: 605a str r2, [r3, #4] + } -080083ec : + /* if required, configure RX overrun detection disabling */ + if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT)) + 80082bc: 687b ldr r3, [r7, #4] + 80082be: 6a5b ldr r3, [r3, #36] ; 0x24 + 80082c0: f003 0310 and.w r3, r3, #16 + 80082c4: 2b00 cmp r3, #0 + 80082c6: d00a beq.n 80082de + { + assert_param(IS_UART_OVERRUN(huart->AdvancedInit.OverrunDisable)); + MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable); + 80082c8: 687b ldr r3, [r7, #4] + 80082ca: 681b ldr r3, [r3, #0] + 80082cc: 689b ldr r3, [r3, #8] + 80082ce: f423 5180 bic.w r1, r3, #4096 ; 0x1000 + 80082d2: 687b ldr r3, [r7, #4] + 80082d4: 6b9a ldr r2, [r3, #56] ; 0x38 + 80082d6: 687b ldr r3, [r7, #4] + 80082d8: 681b ldr r3, [r3, #0] + 80082da: 430a orrs r2, r1 + 80082dc: 609a str r2, [r3, #8] + } -/** - * @brief This function handles System tick timer. - */ -void SysTick_Handler(void) -{ - 80083ec: b580 push {r7, lr} - 80083ee: af00 add r7, sp, #0 - /* USER CODE BEGIN SysTick_IRQn 0 */ + /* if required, configure DMA disabling on reception error */ + if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DMADISABLEONERROR_INIT)) + 80082de: 687b ldr r3, [r7, #4] + 80082e0: 6a5b ldr r3, [r3, #36] ; 0x24 + 80082e2: f003 0320 and.w r3, r3, #32 + 80082e6: 2b00 cmp r3, #0 + 80082e8: d00a beq.n 8008300 + { + assert_param(IS_UART_ADVFEATURE_DMAONRXERROR(huart->AdvancedInit.DMADisableonRxError)); + MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError); + 80082ea: 687b ldr r3, [r7, #4] + 80082ec: 681b ldr r3, [r3, #0] + 80082ee: 689b ldr r3, [r3, #8] + 80082f0: f423 5100 bic.w r1, r3, #8192 ; 0x2000 + 80082f4: 687b ldr r3, [r7, #4] + 80082f6: 6bda ldr r2, [r3, #60] ; 0x3c + 80082f8: 687b ldr r3, [r7, #4] + 80082fa: 681b ldr r3, [r3, #0] + 80082fc: 430a orrs r2, r1 + 80082fe: 609a str r2, [r3, #8] + } - /* USER CODE END SysTick_IRQn 0 */ - HAL_IncTick(); - 80083f0: f7f8 f8e8 bl 80005c4 - /* USER CODE BEGIN SysTick_IRQn 1 */ + /* if required, configure auto Baud rate detection scheme */ + if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_AUTOBAUDRATE_INIT)) + 8008300: 687b ldr r3, [r7, #4] + 8008302: 6a5b ldr r3, [r3, #36] ; 0x24 + 8008304: f003 0340 and.w r3, r3, #64 ; 0x40 + 8008308: 2b00 cmp r3, #0 + 800830a: d01a beq.n 8008342 + { + assert_param(IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(huart->Instance)); + assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATE(huart->AdvancedInit.AutoBaudRateEnable)); + MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable); + 800830c: 687b ldr r3, [r7, #4] + 800830e: 681b ldr r3, [r3, #0] + 8008310: 685b ldr r3, [r3, #4] + 8008312: f423 1180 bic.w r1, r3, #1048576 ; 0x100000 + 8008316: 687b ldr r3, [r7, #4] + 8008318: 6c1a ldr r2, [r3, #64] ; 0x40 + 800831a: 687b ldr r3, [r7, #4] + 800831c: 681b ldr r3, [r3, #0] + 800831e: 430a orrs r2, r1 + 8008320: 605a str r2, [r3, #4] + /* set auto Baudrate detection parameters if detection is enabled */ + if (huart->AdvancedInit.AutoBaudRateEnable == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE) + 8008322: 687b ldr r3, [r7, #4] + 8008324: 6c1b ldr r3, [r3, #64] ; 0x40 + 8008326: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000 + 800832a: d10a bne.n 8008342 + { + assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(huart->AdvancedInit.AutoBaudRateMode)); + MODIFY_REG(huart->Instance->CR2, USART_CR2_ABRMODE, huart->AdvancedInit.AutoBaudRateMode); + 800832c: 687b ldr r3, [r7, #4] + 800832e: 681b ldr r3, [r3, #0] + 8008330: 685b ldr r3, [r3, #4] + 8008332: f423 01c0 bic.w r1, r3, #6291456 ; 0x600000 + 8008336: 687b ldr r3, [r7, #4] + 8008338: 6c5a ldr r2, [r3, #68] ; 0x44 + 800833a: 687b ldr r3, [r7, #4] + 800833c: 681b ldr r3, [r3, #0] + 800833e: 430a orrs r2, r1 + 8008340: 605a str r2, [r3, #4] + } + } - /* USER CODE END SysTick_IRQn 1 */ + /* if required, configure MSB first on communication line */ + if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_MSBFIRST_INIT)) + 8008342: 687b ldr r3, [r7, #4] + 8008344: 6a5b ldr r3, [r3, #36] ; 0x24 + 8008346: f003 0380 and.w r3, r3, #128 ; 0x80 + 800834a: 2b00 cmp r3, #0 + 800834c: d00a beq.n 8008364 + { + assert_param(IS_UART_ADVFEATURE_MSBFIRST(huart->AdvancedInit.MSBFirst)); + MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst); + 800834e: 687b ldr r3, [r7, #4] + 8008350: 681b ldr r3, [r3, #0] + 8008352: 685b ldr r3, [r3, #4] + 8008354: f423 2100 bic.w r1, r3, #524288 ; 0x80000 + 8008358: 687b ldr r3, [r7, #4] + 800835a: 6c9a ldr r2, [r3, #72] ; 0x48 + 800835c: 687b ldr r3, [r7, #4] + 800835e: 681b ldr r3, [r3, #0] + 8008360: 430a orrs r2, r1 + 8008362: 605a str r2, [r3, #4] + } } - 80083f4: bf00 nop - 80083f6: bd80 pop {r7, pc} + 8008364: bf00 nop + 8008366: 370c adds r7, #12 + 8008368: 46bd mov sp, r7 + 800836a: f85d 7b04 ldr.w r7, [sp], #4 + 800836e: 4770 bx lr -080083f8 : - -/** - * @brief This function handles DMA1 stream1 global interrupt. +08008370 : + * @brief Check the UART Idle State. + * @param huart UART handle. + * @retval HAL status */ -void DMA1_Stream1_IRQHandler(void) +HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart) { - 80083f8: b580 push {r7, lr} - 80083fa: af00 add r7, sp, #0 - /* USER CODE BEGIN DMA1_Stream1_IRQn 0 */ + 8008370: b580 push {r7, lr} + 8008372: b086 sub sp, #24 + 8008374: af02 add r7, sp, #8 + 8008376: 6078 str r0, [r7, #4] + uint32_t tickstart; - /* USER CODE END DMA1_Stream1_IRQn 0 */ - HAL_DMA_IRQHandler(&hdma_usart3_rx); - 80083fc: 4802 ldr r0, [pc, #8] ; (8008408 ) - 80083fe: f7f8 fb43 bl 8000a88 - /* USER CODE BEGIN DMA1_Stream1_IRQn 1 */ + /* Initialize the UART ErrorCode */ + huart->ErrorCode = HAL_UART_ERROR_NONE; + 8008378: 687b ldr r3, [r7, #4] + 800837a: 2200 movs r2, #0 + 800837c: 67da str r2, [r3, #124] ; 0x7c - /* USER CODE END DMA1_Stream1_IRQn 1 */ -} - 8008402: bf00 nop - 8008404: bd80 pop {r7, pc} - 8008406: bf00 nop - 8008408: 200002a4 .word 0x200002a4 + /* Init tickstart for timeout managment*/ + tickstart = HAL_GetTick(); + 800837e: f7fc facf bl 8004920 + 8008382: 60f8 str r0, [r7, #12] -0800840c : + /* Check if the Transmitter is enabled */ + if ((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE) + 8008384: 687b ldr r3, [r7, #4] + 8008386: 681b ldr r3, [r3, #0] + 8008388: 681b ldr r3, [r3, #0] + 800838a: f003 0308 and.w r3, r3, #8 + 800838e: 2b08 cmp r3, #8 + 8008390: d10e bne.n 80083b0 + { + /* Wait until TEACK flag is set */ + if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK) + 8008392: f06f 437e mvn.w r3, #4261412864 ; 0xfe000000 + 8008396: 9300 str r3, [sp, #0] + 8008398: 68fb ldr r3, [r7, #12] + 800839a: 2200 movs r2, #0 + 800839c: f44f 1100 mov.w r1, #2097152 ; 0x200000 + 80083a0: 6878 ldr r0, [r7, #4] + 80083a2: f000 f814 bl 80083ce + 80083a6: 4603 mov r3, r0 + 80083a8: 2b00 cmp r3, #0 + 80083aa: d001 beq.n 80083b0 + { + /* Timeout occurred */ + return HAL_TIMEOUT; + 80083ac: 2303 movs r3, #3 + 80083ae: e00a b.n 80083c6 + } + } -/** - * @brief This function handles DMA1 stream3 global interrupt. - */ -void DMA1_Stream3_IRQHandler(void) -{ - 800840c: b580 push {r7, lr} - 800840e: af00 add r7, sp, #0 - /* USER CODE BEGIN DMA1_Stream3_IRQn 0 */ + /* Initialize the UART State */ + huart->gState = HAL_UART_STATE_READY; + 80083b0: 687b ldr r3, [r7, #4] + 80083b2: 2220 movs r2, #32 + 80083b4: 675a str r2, [r3, #116] ; 0x74 + huart->RxState = HAL_UART_STATE_READY; + 80083b6: 687b ldr r3, [r7, #4] + 80083b8: 2220 movs r2, #32 + 80083ba: 679a str r2, [r3, #120] ; 0x78 - /* USER CODE END DMA1_Stream3_IRQn 0 */ - HAL_DMA_IRQHandler(&hdma_usart3_tx); - 8008410: 4802 ldr r0, [pc, #8] ; (800841c ) - 8008412: f7f8 fb39 bl 8000a88 - /* USER CODE BEGIN DMA1_Stream3_IRQn 1 */ + /* Process Unlocked */ + __HAL_UNLOCK(huart); + 80083bc: 687b ldr r3, [r7, #4] + 80083be: 2200 movs r2, #0 + 80083c0: f883 2070 strb.w r2, [r3, #112] ; 0x70 - /* USER CODE END DMA1_Stream3_IRQn 1 */ + return HAL_OK; + 80083c4: 2300 movs r3, #0 } - 8008416: bf00 nop - 8008418: bd80 pop {r7, pc} - 800841a: bf00 nop - 800841c: 20000304 .word 0x20000304 - -08008420 : + 80083c6: 4618 mov r0, r3 + 80083c8: 3710 adds r7, #16 + 80083ca: 46bd mov sp, r7 + 80083cc: bd80 pop {r7, pc} -/** - * @brief This function handles TIM3 global interrupt. +080083ce : + * @param Tickstart Tick start value + * @param Timeout Timeout duration + * @retval HAL status */ -void TIM3_IRQHandler(void) +HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout) { - 8008420: b580 push {r7, lr} - 8008422: af00 add r7, sp, #0 - /* USER CODE BEGIN TIM3_IRQn 0 */ + 80083ce: b580 push {r7, lr} + 80083d0: b084 sub sp, #16 + 80083d2: af00 add r7, sp, #0 + 80083d4: 60f8 str r0, [r7, #12] + 80083d6: 60b9 str r1, [r7, #8] + 80083d8: 603b str r3, [r7, #0] + 80083da: 4613 mov r3, r2 + 80083dc: 71fb strb r3, [r7, #7] + /* Wait until flag is set */ + while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) + 80083de: e02a b.n 8008436 + { + /* Check for the Timeout */ + if (Timeout != HAL_MAX_DELAY) + 80083e0: 69bb ldr r3, [r7, #24] + 80083e2: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff + 80083e6: d026 beq.n 8008436 + { + if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) + 80083e8: f7fc fa9a bl 8004920 + 80083ec: 4602 mov r2, r0 + 80083ee: 683b ldr r3, [r7, #0] + 80083f0: 1ad3 subs r3, r2, r3 + 80083f2: 69ba ldr r2, [r7, #24] + 80083f4: 429a cmp r2, r3 + 80083f6: d302 bcc.n 80083fe + 80083f8: 69bb ldr r3, [r7, #24] + 80083fa: 2b00 cmp r3, #0 + 80083fc: d11b bne.n 8008436 + { + /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */ + CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE)); + 80083fe: 68fb ldr r3, [r7, #12] + 8008400: 681b ldr r3, [r3, #0] + 8008402: 681a ldr r2, [r3, #0] + 8008404: 68fb ldr r3, [r7, #12] + 8008406: 681b ldr r3, [r3, #0] + 8008408: f422 72d0 bic.w r2, r2, #416 ; 0x1a0 + 800840c: 601a str r2, [r3, #0] + CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 800840e: 68fb ldr r3, [r7, #12] + 8008410: 681b ldr r3, [r3, #0] + 8008412: 689a ldr r2, [r3, #8] + 8008414: 68fb ldr r3, [r7, #12] + 8008416: 681b ldr r3, [r3, #0] + 8008418: f022 0201 bic.w r2, r2, #1 + 800841c: 609a str r2, [r3, #8] - /* USER CODE END TIM3_IRQn 0 */ - HAL_TIM_IRQHandler(&htim3); - 8008424: 4802 ldr r0, [pc, #8] ; (8008430 ) - 8008426: f7fa f90c bl 8002642 - /* USER CODE BEGIN TIM3_IRQn 1 */ + huart->gState = HAL_UART_STATE_READY; + 800841e: 68fb ldr r3, [r7, #12] + 8008420: 2220 movs r2, #32 + 8008422: 675a str r2, [r3, #116] ; 0x74 + huart->RxState = HAL_UART_STATE_READY; + 8008424: 68fb ldr r3, [r7, #12] + 8008426: 2220 movs r2, #32 + 8008428: 679a str r2, [r3, #120] ; 0x78 - /* USER CODE END TIM3_IRQn 1 */ -} - 800842a: bf00 nop - 800842c: bd80 pop {r7, pc} - 800842e: bf00 nop - 8008430: 200000e4 .word 0x200000e4 + /* Process Unlocked */ + __HAL_UNLOCK(huart); + 800842a: 68fb ldr r3, [r7, #12] + 800842c: 2200 movs r2, #0 + 800842e: f883 2070 strb.w r2, [r3, #112] ; 0x70 -08008434 : + return HAL_TIMEOUT; + 8008432: 2303 movs r3, #3 + 8008434: e00f b.n 8008456 + while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) + 8008436: 68fb ldr r3, [r7, #12] + 8008438: 681b ldr r3, [r3, #0] + 800843a: 69da ldr r2, [r3, #28] + 800843c: 68bb ldr r3, [r7, #8] + 800843e: 4013 ands r3, r2 + 8008440: 68ba ldr r2, [r7, #8] + 8008442: 429a cmp r2, r3 + 8008444: bf0c ite eq + 8008446: 2301 moveq r3, #1 + 8008448: 2300 movne r3, #0 + 800844a: b2db uxtb r3, r3 + 800844c: 461a mov r2, r3 + 800844e: 79fb ldrb r3, [r7, #7] + 8008450: 429a cmp r2, r3 + 8008452: d0c5 beq.n 80083e0 + } + } + } + return HAL_OK; + 8008454: 2300 movs r3, #0 +} + 8008456: 4618 mov r0, r3 + 8008458: 3710 adds r7, #16 + 800845a: 46bd mov sp, r7 + 800845c: bd80 pop {r7, pc} -/** - * @brief This function handles USART3 global interrupt. +0800845e : + * @brief End ongoing Tx transfer on UART peripheral (following error detection or Transmit completion). + * @param huart UART handle. + * @retval None */ -void USART3_IRQHandler(void) +static void UART_EndTxTransfer(UART_HandleTypeDef *huart) { - 8008434: b580 push {r7, lr} - 8008436: af00 add r7, sp, #0 - /* USER CODE BEGIN USART3_IRQn 0 */ - - /* USER CODE END USART3_IRQn 0 */ - HAL_UART_IRQHandler(&huart3); - 8008438: 4802 ldr r0, [pc, #8] ; (8008444 ) - 800843a: f7fb f9a1 bl 8003780 - /* USER CODE BEGIN USART3_IRQn 1 */ + 800845e: b480 push {r7} + 8008460: b083 sub sp, #12 + 8008462: af00 add r7, sp, #0 + 8008464: 6078 str r0, [r7, #4] + /* Disable TXEIE and TCIE interrupts */ + CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE)); + 8008466: 687b ldr r3, [r7, #4] + 8008468: 681b ldr r3, [r3, #0] + 800846a: 681a ldr r2, [r3, #0] + 800846c: 687b ldr r3, [r7, #4] + 800846e: 681b ldr r3, [r3, #0] + 8008470: f022 02c0 bic.w r2, r2, #192 ; 0xc0 + 8008474: 601a str r2, [r3, #0] - /* USER CODE END USART3_IRQn 1 */ + /* At end of Tx process, restore huart->gState to Ready */ + huart->gState = HAL_UART_STATE_READY; + 8008476: 687b ldr r3, [r7, #4] + 8008478: 2220 movs r2, #32 + 800847a: 675a str r2, [r3, #116] ; 0x74 } - 800843e: bf00 nop - 8008440: bd80 pop {r7, pc} - 8008442: bf00 nop - 8008444: 200001a4 .word 0x200001a4 - -08008448 : + 800847c: bf00 nop + 800847e: 370c adds r7, #12 + 8008480: 46bd mov sp, r7 + 8008482: f85d 7b04 ldr.w r7, [sp], #4 + 8008486: 4770 bx lr -/** - * @brief This function handles DMA2 stream1 global interrupt. +08008488 : + * @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion). + * @param huart UART handle. + * @retval None */ -void DMA2_Stream1_IRQHandler(void) +static void UART_EndRxTransfer(UART_HandleTypeDef *huart) { - 8008448: b580 push {r7, lr} - 800844a: af00 add r7, sp, #0 - /* USER CODE BEGIN DMA2_Stream1_IRQn 0 */ + 8008488: b480 push {r7} + 800848a: b083 sub sp, #12 + 800848c: af00 add r7, sp, #0 + 800848e: 6078 str r0, [r7, #4] + /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ + CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); + 8008490: 687b ldr r3, [r7, #4] + 8008492: 681b ldr r3, [r3, #0] + 8008494: 681a ldr r2, [r3, #0] + 8008496: 687b ldr r3, [r7, #4] + 8008498: 681b ldr r3, [r3, #0] + 800849a: f422 7290 bic.w r2, r2, #288 ; 0x120 + 800849e: 601a str r2, [r3, #0] + CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 80084a0: 687b ldr r3, [r7, #4] + 80084a2: 681b ldr r3, [r3, #0] + 80084a4: 689a ldr r2, [r3, #8] + 80084a6: 687b ldr r3, [r7, #4] + 80084a8: 681b ldr r3, [r3, #0] + 80084aa: f022 0201 bic.w r2, r2, #1 + 80084ae: 609a str r2, [r3, #8] - /* USER CODE END DMA2_Stream1_IRQn 0 */ - HAL_DMA_IRQHandler(&hdma_usart6_rx); - 800844c: 4802 ldr r0, [pc, #8] ; (8008458 ) - 800844e: f7f8 fb1b bl 8000a88 - /* USER CODE BEGIN DMA2_Stream1_IRQn 1 */ + /* At end of Rx process, restore huart->RxState to Ready */ + huart->RxState = HAL_UART_STATE_READY; + 80084b0: 687b ldr r3, [r7, #4] + 80084b2: 2220 movs r2, #32 + 80084b4: 679a str r2, [r3, #120] ; 0x78 - /* USER CODE END DMA2_Stream1_IRQn 1 */ + /* Reset RxIsr function pointer */ + huart->RxISR = NULL; + 80084b6: 687b ldr r3, [r7, #4] + 80084b8: 2200 movs r2, #0 + 80084ba: 661a str r2, [r3, #96] ; 0x60 } - 8008452: bf00 nop - 8008454: bd80 pop {r7, pc} - 8008456: bf00 nop - 8008458: 20000364 .word 0x20000364 - -0800845c : + 80084bc: bf00 nop + 80084be: 370c adds r7, #12 + 80084c0: 46bd mov sp, r7 + 80084c2: f85d 7b04 ldr.w r7, [sp], #4 + 80084c6: 4770 bx lr -/** - * @brief This function handles DMA2 stream6 global interrupt. +080084c8 : + * @brief DMA UART transmit process complete callback. + * @param hdma DMA handle. + * @retval None */ -void DMA2_Stream6_IRQHandler(void) +static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma) { - 800845c: b580 push {r7, lr} - 800845e: af00 add r7, sp, #0 - /* USER CODE BEGIN DMA2_Stream6_IRQn 0 */ + 80084c8: b580 push {r7, lr} + 80084ca: b084 sub sp, #16 + 80084cc: af00 add r7, sp, #0 + 80084ce: 6078 str r0, [r7, #4] + UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); + 80084d0: 687b ldr r3, [r7, #4] + 80084d2: 6b9b ldr r3, [r3, #56] ; 0x38 + 80084d4: 60fb str r3, [r7, #12] - /* USER CODE END DMA2_Stream6_IRQn 0 */ - HAL_DMA_IRQHandler(&hdma_usart6_tx); - 8008460: 4802 ldr r0, [pc, #8] ; (800846c ) - 8008462: f7f8 fb11 bl 8000a88 - /* USER CODE BEGIN DMA2_Stream6_IRQn 1 */ + /* DMA Normal mode */ + if (hdma->Init.Mode != DMA_CIRCULAR) + 80084d6: 687b ldr r3, [r7, #4] + 80084d8: 69db ldr r3, [r3, #28] + 80084da: f5b3 7f80 cmp.w r3, #256 ; 0x100 + 80084de: d014 beq.n 800850a + { + huart->TxXferCount = 0U; + 80084e0: 68fb ldr r3, [r7, #12] + 80084e2: 2200 movs r2, #0 + 80084e4: f8a3 2052 strh.w r2, [r3, #82] ; 0x52 - /* USER CODE END DMA2_Stream6_IRQn 1 */ -} - 8008466: bf00 nop - 8008468: bd80 pop {r7, pc} - 800846a: bf00 nop - 800846c: 200003c4 .word 0x200003c4 + /* Disable the DMA transfer for transmit request by resetting the DMAT bit + in the UART CR3 register */ + CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); + 80084e8: 68fb ldr r3, [r7, #12] + 80084ea: 681b ldr r3, [r3, #0] + 80084ec: 689a ldr r2, [r3, #8] + 80084ee: 68fb ldr r3, [r7, #12] + 80084f0: 681b ldr r3, [r3, #0] + 80084f2: f022 0280 bic.w r2, r2, #128 ; 0x80 + 80084f6: 609a str r2, [r3, #8] -08008470 <_getpid>: -void initialise_monitor_handles() -{ + /* Enable the UART Transmit Complete Interrupt */ + SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); + 80084f8: 68fb ldr r3, [r7, #12] + 80084fa: 681b ldr r3, [r3, #0] + 80084fc: 681a ldr r2, [r3, #0] + 80084fe: 68fb ldr r3, [r7, #12] + 8008500: 681b ldr r3, [r3, #0] + 8008502: f042 0240 orr.w r2, r2, #64 ; 0x40 + 8008506: 601a str r2, [r3, #0] +#else + /*Call legacy weak Tx complete callback*/ + HAL_UART_TxCpltCallback(huart); +#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + } } - -int _getpid(void) -{ - 8008470: b480 push {r7} - 8008472: af00 add r7, sp, #0 - return 1; - 8008474: 2301 movs r3, #1 + 8008508: e002 b.n 8008510 + HAL_UART_TxCpltCallback(huart); + 800850a: 68f8 ldr r0, [r7, #12] + 800850c: f7fa fea0 bl 8003250 } - 8008476: 4618 mov r0, r3 - 8008478: 46bd mov sp, r7 - 800847a: f85d 7b04 ldr.w r7, [sp], #4 - 800847e: 4770 bx lr - -08008480 <_kill>: + 8008510: bf00 nop + 8008512: 3710 adds r7, #16 + 8008514: 46bd mov sp, r7 + 8008516: bd80 pop {r7, pc} -int _kill(int pid, int sig) +08008518 : + * @brief DMA UART transmit process half complete callback. + * @param hdma DMA handle. + * @retval None + */ +static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma) { - 8008480: b580 push {r7, lr} - 8008482: b082 sub sp, #8 - 8008484: af00 add r7, sp, #0 - 8008486: 6078 str r0, [r7, #4] - 8008488: 6039 str r1, [r7, #0] - errno = EINVAL; - 800848a: f001 fc9b bl 8009dc4 <__errno> - 800848e: 4602 mov r2, r0 - 8008490: 2316 movs r3, #22 - 8008492: 6013 str r3, [r2, #0] - return -1; - 8008494: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff + 8008518: b580 push {r7, lr} + 800851a: b084 sub sp, #16 + 800851c: af00 add r7, sp, #0 + 800851e: 6078 str r0, [r7, #4] + UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); + 8008520: 687b ldr r3, [r7, #4] + 8008522: 6b9b ldr r3, [r3, #56] ; 0x38 + 8008524: 60fb str r3, [r7, #12] +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + /*Call registered Tx Half complete callback*/ + huart->TxHalfCpltCallback(huart); +#else + /*Call legacy weak Tx Half complete callback*/ + HAL_UART_TxHalfCpltCallback(huart); + 8008526: 68f8 ldr r0, [r7, #12] + 8008528: f7ff fbbe bl 8007ca8 +#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } - 8008498: 4618 mov r0, r3 - 800849a: 3708 adds r7, #8 - 800849c: 46bd mov sp, r7 - 800849e: bd80 pop {r7, pc} - -080084a0 <_exit>: - -void _exit (int status) -{ - 80084a0: b580 push {r7, lr} - 80084a2: b082 sub sp, #8 - 80084a4: af00 add r7, sp, #0 - 80084a6: 6078 str r0, [r7, #4] - _kill(status, -1); - 80084a8: f04f 31ff mov.w r1, #4294967295 ; 0xffffffff - 80084ac: 6878 ldr r0, [r7, #4] - 80084ae: f7ff ffe7 bl 8008480 <_kill> - while (1) {} /* Make sure we hang here */ - 80084b2: e7fe b.n 80084b2 <_exit+0x12> + 800852c: bf00 nop + 800852e: 3710 adds r7, #16 + 8008530: 46bd mov sp, r7 + 8008532: bd80 pop {r7, pc} -080084b4 <_sbrk>: -/** - _sbrk - Increase program data space. Malloc and related functions depend on this -**/ -caddr_t _sbrk(int incr) +08008534 : + * @brief DMA UART receive process complete callback. + * @param hdma DMA handle. + * @retval None + */ +static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma) { - 80084b4: b580 push {r7, lr} - 80084b6: b084 sub sp, #16 - 80084b8: af00 add r7, sp, #0 - 80084ba: 6078 str r0, [r7, #4] - extern char end asm("end"); - static char *heap_end; - char *prev_heap_end; + 8008534: b580 push {r7, lr} + 8008536: b084 sub sp, #16 + 8008538: af00 add r7, sp, #0 + 800853a: 6078 str r0, [r7, #4] + UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); + 800853c: 687b ldr r3, [r7, #4] + 800853e: 6b9b ldr r3, [r3, #56] ; 0x38 + 8008540: 60fb str r3, [r7, #12] - if (heap_end == 0) - 80084bc: 4b11 ldr r3, [pc, #68] ; (8008504 <_sbrk+0x50>) - 80084be: 681b ldr r3, [r3, #0] - 80084c0: 2b00 cmp r3, #0 - 80084c2: d102 bne.n 80084ca <_sbrk+0x16> - heap_end = &end; - 80084c4: 4b0f ldr r3, [pc, #60] ; (8008504 <_sbrk+0x50>) - 80084c6: 4a10 ldr r2, [pc, #64] ; (8008508 <_sbrk+0x54>) - 80084c8: 601a str r2, [r3, #0] + /* DMA Normal mode */ + if (hdma->Init.Mode != DMA_CIRCULAR) + 8008542: 687b ldr r3, [r7, #4] + 8008544: 69db ldr r3, [r3, #28] + 8008546: f5b3 7f80 cmp.w r3, #256 ; 0x100 + 800854a: d01e beq.n 800858a + { + huart->RxXferCount = 0U; + 800854c: 68fb ldr r3, [r7, #12] + 800854e: 2200 movs r2, #0 + 8008550: f8a3 205a strh.w r2, [r3, #90] ; 0x5a - prev_heap_end = heap_end; - 80084ca: 4b0e ldr r3, [pc, #56] ; (8008504 <_sbrk+0x50>) - 80084cc: 681b ldr r3, [r3, #0] - 80084ce: 60fb str r3, [r7, #12] - if (heap_end + incr > stack_ptr) - 80084d0: 4b0c ldr r3, [pc, #48] ; (8008504 <_sbrk+0x50>) - 80084d2: 681a ldr r2, [r3, #0] - 80084d4: 687b ldr r3, [r7, #4] - 80084d6: 4413 add r3, r2 - 80084d8: 466a mov r2, sp - 80084da: 4293 cmp r3, r2 - 80084dc: d907 bls.n 80084ee <_sbrk+0x3a> - { - errno = ENOMEM; - 80084de: f001 fc71 bl 8009dc4 <__errno> - 80084e2: 4602 mov r2, r0 - 80084e4: 230c movs r3, #12 - 80084e6: 6013 str r3, [r2, #0] - return (caddr_t) -1; - 80084e8: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff - 80084ec: e006 b.n 80084fc <_sbrk+0x48> - } + /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */ + CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); + 8008554: 68fb ldr r3, [r7, #12] + 8008556: 681b ldr r3, [r3, #0] + 8008558: 681a ldr r2, [r3, #0] + 800855a: 68fb ldr r3, [r7, #12] + 800855c: 681b ldr r3, [r3, #0] + 800855e: f422 7280 bic.w r2, r2, #256 ; 0x100 + 8008562: 601a str r2, [r3, #0] + CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 8008564: 68fb ldr r3, [r7, #12] + 8008566: 681b ldr r3, [r3, #0] + 8008568: 689a ldr r2, [r3, #8] + 800856a: 68fb ldr r3, [r7, #12] + 800856c: 681b ldr r3, [r3, #0] + 800856e: f022 0201 bic.w r2, r2, #1 + 8008572: 609a str r2, [r3, #8] - heap_end += incr; - 80084ee: 4b05 ldr r3, [pc, #20] ; (8008504 <_sbrk+0x50>) - 80084f0: 681a ldr r2, [r3, #0] - 80084f2: 687b ldr r3, [r7, #4] - 80084f4: 4413 add r3, r2 - 80084f6: 4a03 ldr r2, [pc, #12] ; (8008504 <_sbrk+0x50>) - 80084f8: 6013 str r3, [r2, #0] + /* Disable the DMA transfer for the receiver request by resetting the DMAR bit + in the UART CR3 register */ + CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); + 8008574: 68fb ldr r3, [r7, #12] + 8008576: 681b ldr r3, [r3, #0] + 8008578: 689a ldr r2, [r3, #8] + 800857a: 68fb ldr r3, [r7, #12] + 800857c: 681b ldr r3, [r3, #0] + 800857e: f022 0240 bic.w r2, r2, #64 ; 0x40 + 8008582: 609a str r2, [r3, #8] - return (caddr_t) prev_heap_end; - 80084fa: 68fb ldr r3, [r7, #12] + /* At end of Rx process, restore huart->RxState to Ready */ + huart->RxState = HAL_UART_STATE_READY; + 8008584: 68fb ldr r3, [r7, #12] + 8008586: 2220 movs r2, #32 + 8008588: 679a str r2, [r3, #120] ; 0x78 +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + /*Call registered Rx complete callback*/ + huart->RxCpltCallback(huart); +#else + /*Call legacy weak Rx complete callback*/ + HAL_UART_RxCpltCallback(huart); + 800858a: 68f8 ldr r0, [r7, #12] + 800858c: f7fa fe72 bl 8003274 +#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } - 80084fc: 4618 mov r0, r3 - 80084fe: 3710 adds r7, #16 - 8008500: 46bd mov sp, r7 - 8008502: bd80 pop {r7, pc} - 8008504: 20000ea8 .word 0x20000ea8 - 8008508: 20000ec0 .word 0x20000ec0 - -0800850c : - * SystemFrequency variable. - * @param None + 8008590: bf00 nop + 8008592: 3710 adds r7, #16 + 8008594: 46bd mov sp, r7 + 8008596: bd80 pop {r7, pc} + +08008598 : + * @brief DMA UART receive process half complete callback. + * @param hdma DMA handle. * @retval None */ -void SystemInit(void) +static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma) { - 800850c: b480 push {r7} - 800850e: af00 add r7, sp, #0 - /* FPU settings ------------------------------------------------------------*/ - #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) - SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */ - 8008510: 4b15 ldr r3, [pc, #84] ; (8008568 ) - 8008512: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 - 8008516: 4a14 ldr r2, [pc, #80] ; (8008568 ) - 8008518: f443 0370 orr.w r3, r3, #15728640 ; 0xf00000 - 800851c: f8c2 3088 str.w r3, [r2, #136] ; 0x88 - #endif - /* Reset the RCC clock configuration to the default reset state ------------*/ - /* Set HSION bit */ - RCC->CR |= (uint32_t)0x00000001; - 8008520: 4b12 ldr r3, [pc, #72] ; (800856c ) - 8008522: 681b ldr r3, [r3, #0] - 8008524: 4a11 ldr r2, [pc, #68] ; (800856c ) - 8008526: f043 0301 orr.w r3, r3, #1 - 800852a: 6013 str r3, [r2, #0] - - /* Reset CFGR register */ - RCC->CFGR = 0x00000000; - 800852c: 4b0f ldr r3, [pc, #60] ; (800856c ) - 800852e: 2200 movs r2, #0 - 8008530: 609a str r2, [r3, #8] + 8008598: b580 push {r7, lr} + 800859a: b084 sub sp, #16 + 800859c: af00 add r7, sp, #0 + 800859e: 6078 str r0, [r7, #4] + UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); + 80085a0: 687b ldr r3, [r7, #4] + 80085a2: 6b9b ldr r3, [r3, #56] ; 0x38 + 80085a4: 60fb str r3, [r7, #12] +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + /*Call registered Rx Half complete callback*/ + huart->RxHalfCpltCallback(huart); +#else + /*Call legacy weak Rx Half complete callback*/ + HAL_UART_RxHalfCpltCallback(huart); + 80085a6: 68f8 ldr r0, [r7, #12] + 80085a8: f7ff fb88 bl 8007cbc +#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ +} + 80085ac: bf00 nop + 80085ae: 3710 adds r7, #16 + 80085b0: 46bd mov sp, r7 + 80085b2: bd80 pop {r7, pc} - /* Reset HSEON, CSSON and PLLON bits */ - RCC->CR &= (uint32_t)0xFEF6FFFF; - 8008532: 4b0e ldr r3, [pc, #56] ; (800856c ) - 8008534: 681a ldr r2, [r3, #0] - 8008536: 490d ldr r1, [pc, #52] ; (800856c ) - 8008538: 4b0d ldr r3, [pc, #52] ; (8008570 ) - 800853a: 4013 ands r3, r2 - 800853c: 600b str r3, [r1, #0] +080085b4 : + * @brief DMA UART communication error callback. + * @param hdma DMA handle. + * @retval None + */ +static void UART_DMAError(DMA_HandleTypeDef *hdma) +{ + 80085b4: b580 push {r7, lr} + 80085b6: b086 sub sp, #24 + 80085b8: af00 add r7, sp, #0 + 80085ba: 6078 str r0, [r7, #4] + UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); + 80085bc: 687b ldr r3, [r7, #4] + 80085be: 6b9b ldr r3, [r3, #56] ; 0x38 + 80085c0: 617b str r3, [r7, #20] - /* Reset PLLCFGR register */ - RCC->PLLCFGR = 0x24003010; - 800853e: 4b0b ldr r3, [pc, #44] ; (800856c ) - 8008540: 4a0c ldr r2, [pc, #48] ; (8008574 ) - 8008542: 605a str r2, [r3, #4] + const HAL_UART_StateTypeDef gstate = huart->gState; + 80085c2: 697b ldr r3, [r7, #20] + 80085c4: 6f5b ldr r3, [r3, #116] ; 0x74 + 80085c6: 613b str r3, [r7, #16] + const HAL_UART_StateTypeDef rxstate = huart->RxState; + 80085c8: 697b ldr r3, [r7, #20] + 80085ca: 6f9b ldr r3, [r3, #120] ; 0x78 + 80085cc: 60fb str r3, [r7, #12] - /* Reset HSEBYP bit */ - RCC->CR &= (uint32_t)0xFFFBFFFF; - 8008544: 4b09 ldr r3, [pc, #36] ; (800856c ) - 8008546: 681b ldr r3, [r3, #0] - 8008548: 4a08 ldr r2, [pc, #32] ; (800856c ) - 800854a: f423 2380 bic.w r3, r3, #262144 ; 0x40000 - 800854e: 6013 str r3, [r2, #0] + /* Stop UART DMA Tx request if ongoing */ + if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) && + 80085ce: 697b ldr r3, [r7, #20] + 80085d0: 681b ldr r3, [r3, #0] + 80085d2: 689b ldr r3, [r3, #8] + 80085d4: f003 0380 and.w r3, r3, #128 ; 0x80 + 80085d8: 2b80 cmp r3, #128 ; 0x80 + 80085da: d109 bne.n 80085f0 + 80085dc: 693b ldr r3, [r7, #16] + 80085de: 2b21 cmp r3, #33 ; 0x21 + 80085e0: d106 bne.n 80085f0 + (gstate == HAL_UART_STATE_BUSY_TX)) + { + huart->TxXferCount = 0U; + 80085e2: 697b ldr r3, [r7, #20] + 80085e4: 2200 movs r2, #0 + 80085e6: f8a3 2052 strh.w r2, [r3, #82] ; 0x52 + UART_EndTxTransfer(huart); + 80085ea: 6978 ldr r0, [r7, #20] + 80085ec: f7ff ff37 bl 800845e + } - /* Disable all interrupts */ - RCC->CIR = 0x00000000; - 8008550: 4b06 ldr r3, [pc, #24] ; (800856c ) - 8008552: 2200 movs r2, #0 - 8008554: 60da str r2, [r3, #12] + /* Stop UART DMA Rx request if ongoing */ + if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) && + 80085f0: 697b ldr r3, [r7, #20] + 80085f2: 681b ldr r3, [r3, #0] + 80085f4: 689b ldr r3, [r3, #8] + 80085f6: f003 0340 and.w r3, r3, #64 ; 0x40 + 80085fa: 2b40 cmp r3, #64 ; 0x40 + 80085fc: d109 bne.n 8008612 + 80085fe: 68fb ldr r3, [r7, #12] + 8008600: 2b22 cmp r3, #34 ; 0x22 + 8008602: d106 bne.n 8008612 + (rxstate == HAL_UART_STATE_BUSY_RX)) + { + huart->RxXferCount = 0U; + 8008604: 697b ldr r3, [r7, #20] + 8008606: 2200 movs r2, #0 + 8008608: f8a3 205a strh.w r2, [r3, #90] ; 0x5a + UART_EndRxTransfer(huart); + 800860c: 6978 ldr r0, [r7, #20] + 800860e: f7ff ff3b bl 8008488 + } - /* Configure the Vector Table location add offset address ------------------*/ -#ifdef VECT_TAB_SRAM - SCB->VTOR = RAMDTCM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ + huart->ErrorCode |= HAL_UART_ERROR_DMA; + 8008612: 697b ldr r3, [r7, #20] + 8008614: 6fdb ldr r3, [r3, #124] ; 0x7c + 8008616: f043 0210 orr.w r2, r3, #16 + 800861a: 697b ldr r3, [r7, #20] + 800861c: 67da str r2, [r3, #124] ; 0x7c +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + /*Call registered error callback*/ + huart->ErrorCallback(huart); #else - SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ - 8008556: 4b04 ldr r3, [pc, #16] ; (8008568 ) - 8008558: f04f 6200 mov.w r2, #134217728 ; 0x8000000 - 800855c: 609a str r2, [r3, #8] -#endif + /*Call legacy weak error callback*/ + HAL_UART_ErrorCallback(huart); + 800861e: 6978 ldr r0, [r7, #20] + 8008620: f7ff fb56 bl 8007cd0 +#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } - 800855e: bf00 nop - 8008560: 46bd mov sp, r7 - 8008562: f85d 7b04 ldr.w r7, [sp], #4 - 8008566: 4770 bx lr - 8008568: e000ed00 .word 0xe000ed00 - 800856c: 40023800 .word 0x40023800 - 8008570: fef6ffff .word 0xfef6ffff - 8008574: 24003010 .word 0x24003010 - -08008578 <_ZN3ros16normalizeSecNSecERmS0_>: -#include "ros/time.h" + 8008624: bf00 nop + 8008626: 3718 adds r7, #24 + 8008628: 46bd mov sp, r7 + 800862a: bd80 pop {r7, pc} -namespace ros -{ -void normalizeSecNSec(uint32_t& sec, uint32_t& nsec) +0800862c : + * (To be called at end of DMA Abort procedure following error occurrence). + * @param hdma DMA handle. + * @retval None + */ +static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma) { - 8008578: b480 push {r7} - 800857a: b085 sub sp, #20 - 800857c: af00 add r7, sp, #0 - 800857e: 6078 str r0, [r7, #4] - 8008580: 6039 str r1, [r7, #0] - uint32_t nsec_part = nsec % 1000000000UL; - 8008582: 683b ldr r3, [r7, #0] - 8008584: 681b ldr r3, [r3, #0] - 8008586: 0a5a lsrs r2, r3, #9 - 8008588: 490f ldr r1, [pc, #60] ; (80085c8 <_ZN3ros16normalizeSecNSecERmS0_+0x50>) - 800858a: fba1 1202 umull r1, r2, r1, r2 - 800858e: 09d2 lsrs r2, r2, #7 - 8008590: 490e ldr r1, [pc, #56] ; (80085cc <_ZN3ros16normalizeSecNSecERmS0_+0x54>) - 8008592: fb01 f202 mul.w r2, r1, r2 - 8008596: 1a9b subs r3, r3, r2 - 8008598: 60fb str r3, [r7, #12] - uint32_t sec_part = nsec / 1000000000UL; - 800859a: 683b ldr r3, [r7, #0] - 800859c: 681b ldr r3, [r3, #0] - 800859e: 0a5b lsrs r3, r3, #9 - 80085a0: 4a09 ldr r2, [pc, #36] ; (80085c8 <_ZN3ros16normalizeSecNSecERmS0_+0x50>) - 80085a2: fba2 2303 umull r2, r3, r2, r3 - 80085a6: 09db lsrs r3, r3, #7 - 80085a8: 60bb str r3, [r7, #8] - sec += sec_part; - 80085aa: 687b ldr r3, [r7, #4] - 80085ac: 681a ldr r2, [r3, #0] - 80085ae: 68bb ldr r3, [r7, #8] - 80085b0: 441a add r2, r3 - 80085b2: 687b ldr r3, [r7, #4] - 80085b4: 601a str r2, [r3, #0] - nsec = nsec_part; - 80085b6: 683b ldr r3, [r7, #0] - 80085b8: 68fa ldr r2, [r7, #12] - 80085ba: 601a str r2, [r3, #0] + 800862c: b580 push {r7, lr} + 800862e: b084 sub sp, #16 + 8008630: af00 add r7, sp, #0 + 8008632: 6078 str r0, [r7, #4] + UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); + 8008634: 687b ldr r3, [r7, #4] + 8008636: 6b9b ldr r3, [r3, #56] ; 0x38 + 8008638: 60fb str r3, [r7, #12] + huart->RxXferCount = 0U; + 800863a: 68fb ldr r3, [r7, #12] + 800863c: 2200 movs r2, #0 + 800863e: f8a3 205a strh.w r2, [r3, #90] ; 0x5a + huart->TxXferCount = 0U; + 8008642: 68fb ldr r3, [r7, #12] + 8008644: 2200 movs r2, #0 + 8008646: f8a3 2052 strh.w r2, [r3, #82] ; 0x52 +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + /*Call registered error callback*/ + huart->ErrorCallback(huart); +#else + /*Call legacy weak error callback*/ + HAL_UART_ErrorCallback(huart); + 800864a: 68f8 ldr r0, [r7, #12] + 800864c: f7ff fb40 bl 8007cd0 +#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } - 80085bc: bf00 nop - 80085be: 3714 adds r7, #20 - 80085c0: 46bd mov sp, r7 - 80085c2: f85d 7b04 ldr.w r7, [sp], #4 - 80085c6: 4770 bx lr - 80085c8: 00044b83 .word 0x00044b83 - 80085cc: 3b9aca00 .word 0x3b9aca00 - -080085d0 : - - .section .text.Reset_Handler - .weak Reset_Handler - .type Reset_Handler, %function -Reset_Handler: - ldr sp, =_estack /* set stack pointer */ - 80085d0: f8df d034 ldr.w sp, [pc, #52] ; 8008608 - -/* Copy the data segment initializers from flash to SRAM */ - movs r1, #0 - 80085d4: 2100 movs r1, #0 - b LoopCopyDataInit - 80085d6: e003 b.n 80085e0 - -080085d8 : - -CopyDataInit: - ldr r3, =_sidata - 80085d8: 4b0c ldr r3, [pc, #48] ; (800860c ) - ldr r3, [r3, r1] - 80085da: 585b ldr r3, [r3, r1] - str r3, [r0, r1] - 80085dc: 5043 str r3, [r0, r1] - adds r1, r1, #4 - 80085de: 3104 adds r1, #4 - -080085e0 : - -LoopCopyDataInit: - ldr r0, =_sdata - 80085e0: 480b ldr r0, [pc, #44] ; (8008610 ) - ldr r3, =_edata - 80085e2: 4b0c ldr r3, [pc, #48] ; (8008614 ) - adds r2, r0, r1 - 80085e4: 1842 adds r2, r0, r1 - cmp r2, r3 - 80085e6: 429a cmp r2, r3 - bcc CopyDataInit - 80085e8: d3f6 bcc.n 80085d8 - ldr r2, =_sbss - 80085ea: 4a0b ldr r2, [pc, #44] ; (8008618 ) - b LoopFillZerobss - 80085ec: e002 b.n 80085f4 - -080085ee : -/* Zero fill the bss segment. */ -FillZerobss: - movs r3, #0 - 80085ee: 2300 movs r3, #0 - str r3, [r2], #4 - 80085f0: f842 3b04 str.w r3, [r2], #4 + 8008650: bf00 nop + 8008652: 3710 adds r7, #16 + 8008654: 46bd mov sp, r7 + 8008656: bd80 pop {r7, pc} -080085f4 : - -LoopFillZerobss: - ldr r3, = _ebss - 80085f4: 4b09 ldr r3, [pc, #36] ; (800861c ) - cmp r2, r3 - 80085f6: 429a cmp r2, r3 - bcc FillZerobss - 80085f8: d3f9 bcc.n 80085ee +08008658 : + * @param huart pointer to a UART_HandleTypeDef structure that contains + * the configuration information for the specified UART module. + * @retval None + */ +static void UART_EndTransmit_IT(UART_HandleTypeDef *huart) +{ + 8008658: b580 push {r7, lr} + 800865a: b082 sub sp, #8 + 800865c: af00 add r7, sp, #0 + 800865e: 6078 str r0, [r7, #4] + /* Disable the UART Transmit Complete Interrupt */ + CLEAR_BIT(huart->Instance->CR1, USART_CR1_TCIE); + 8008660: 687b ldr r3, [r7, #4] + 8008662: 681b ldr r3, [r3, #0] + 8008664: 681a ldr r2, [r3, #0] + 8008666: 687b ldr r3, [r7, #4] + 8008668: 681b ldr r3, [r3, #0] + 800866a: f022 0240 bic.w r2, r2, #64 ; 0x40 + 800866e: 601a str r2, [r3, #0] -/* Call the clock system initialization function.*/ - bl SystemInit - 80085fa: f7ff ff87 bl 800850c -/* Call static constructors */ - bl __libc_init_array - 80085fe: f001 fbe7 bl 8009dd0 <__libc_init_array> -/* Call the application's entry point.*/ - bl main - 8008602: f7fd ffc5 bl 8006590
- bx lr - 8008606: 4770 bx lr - ldr sp, =_estack /* set stack pointer */ - 8008608: 20080000 .word 0x20080000 - ldr r3, =_sidata - 800860c: 0800ab9c .word 0x0800ab9c - ldr r0, =_sdata - 8008610: 20000000 .word 0x20000000 - ldr r3, =_edata - 8008614: 20000084 .word 0x20000084 - ldr r2, =_sbss - 8008618: 20000084 .word 0x20000084 - ldr r3, = _ebss - 800861c: 20000ebc .word 0x20000ebc + /* Tx process is ended, restore huart->gState to Ready */ + huart->gState = HAL_UART_STATE_READY; + 8008670: 687b ldr r3, [r7, #4] + 8008672: 2220 movs r2, #32 + 8008674: 675a str r2, [r3, #116] ; 0x74 -08008620 : - * @retval None -*/ - .section .text.Default_Handler,"ax",%progbits -Default_Handler: -Infinite_Loop: - b Infinite_Loop - 8008620: e7fe b.n 8008620 - -08008622 <__cxa_pure_virtual>: - 8008622: b508 push {r3, lr} - 8008624: f000 f80c bl 8008640 <_ZSt9terminatev> - -08008628 <_ZN10__cxxabiv111__terminateEPFvvE>: - 8008628: b508 push {r3, lr} - 800862a: 4780 blx r0 - 800862c: f001 fbc3 bl 8009db6 - -08008630 <_ZSt13get_terminatev>: - 8008630: 4b02 ldr r3, [pc, #8] ; (800863c <_ZSt13get_terminatev+0xc>) - 8008632: 6818 ldr r0, [r3, #0] - 8008634: f3bf 8f5b dmb ish - 8008638: 4770 bx lr - 800863a: bf00 nop - 800863c: 2000001c .word 0x2000001c - -08008640 <_ZSt9terminatev>: - 8008640: b508 push {r3, lr} - 8008642: f7ff fff5 bl 8008630 <_ZSt13get_terminatev> - 8008646: f7ff ffef bl 8008628 <_ZN10__cxxabiv111__terminateEPFvvE> - 800864a: 0000 movs r0, r0 - 800864c: 0000 movs r0, r0 + /* Cleat TxISR function pointer */ + huart->TxISR = NULL; + 8008676: 687b ldr r3, [r7, #4] + 8008678: 2200 movs r2, #0 + 800867a: 665a str r2, [r3, #100] ; 0x64 +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + /*Call registered Tx complete callback*/ + huart->TxCpltCallback(huart); +#else + /*Call legacy weak Tx complete callback*/ + HAL_UART_TxCpltCallback(huart); + 800867c: 6878 ldr r0, [r7, #4] + 800867e: f7fa fde7 bl 8003250 +#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ +} + 8008682: bf00 nop + 8008684: 3708 adds r7, #8 + 8008686: 46bd mov sp, r7 + 8008688: bd80 pop {r7, pc} + +0800868a <__cxa_pure_virtual>: + 800868a: b508 push {r3, lr} + 800868c: f000 f80c bl 80086a8 <_ZSt9terminatev> + +08008690 <_ZN10__cxxabiv111__terminateEPFvvE>: + 8008690: b508 push {r3, lr} + 8008692: 4780 blx r0 + 8008694: f001 fbc3 bl 8009e1e + +08008698 <_ZSt13get_terminatev>: + 8008698: 4b02 ldr r3, [pc, #8] ; (80086a4 <_ZSt13get_terminatev+0xc>) + 800869a: 6818 ldr r0, [r3, #0] + 800869c: f3bf 8f5b dmb ish + 80086a0: 4770 bx lr + 80086a2: bf00 nop + 80086a4: 2000001c .word 0x2000001c + +080086a8 <_ZSt9terminatev>: + 80086a8: b508 push {r3, lr} + 80086aa: f7ff fff5 bl 8008698 <_ZSt13get_terminatev> + 80086ae: f7ff ffef bl 8008690 <_ZN10__cxxabiv111__terminateEPFvvE> + 80086b2: 0000 movs r0, r0 + 80086b4: 0000 movs r0, r0 ... -08008650 : - 8008650: b51f push {r0, r1, r2, r3, r4, lr} - 8008652: eeb0 7b40 vmov.f64 d7, d0 - 8008656: ee17 3a90 vmov r3, s15 - 800865a: 4a19 ldr r2, [pc, #100] ; (80086c0 ) - 800865c: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000 - 8008660: 4293 cmp r3, r2 - 8008662: dc04 bgt.n 800866e - 8008664: ed9f 1b14 vldr d1, [pc, #80] ; 80086b8 - 8008668: f000 fb56 bl 8008d18 <__kernel_cos> - 800866c: e004 b.n 8008678 - 800866e: 4a15 ldr r2, [pc, #84] ; (80086c4 ) - 8008670: 4293 cmp r3, r2 - 8008672: dd04 ble.n 800867e - 8008674: ee30 0b40 vsub.f64 d0, d0, d0 - 8008678: b005 add sp, #20 - 800867a: f85d fb04 ldr.w pc, [sp], #4 - 800867e: 4668 mov r0, sp - 8008680: f000 f8e2 bl 8008848 <__ieee754_rem_pio2> - 8008684: f000 0003 and.w r0, r0, #3 - 8008688: 2801 cmp r0, #1 - 800868a: ed9d 1b02 vldr d1, [sp, #8] - 800868e: ed9d 0b00 vldr d0, [sp] - 8008692: d007 beq.n 80086a4 - 8008694: 2802 cmp r0, #2 - 8008696: d00a beq.n 80086ae - 8008698: 2800 cmp r0, #0 - 800869a: d0e5 beq.n 8008668 - 800869c: 2001 movs r0, #1 - 800869e: f000 fe43 bl 8009328 <__kernel_sin> - 80086a2: e7e9 b.n 8008678 - 80086a4: f000 fe40 bl 8009328 <__kernel_sin> - 80086a8: eeb1 0b40 vneg.f64 d0, d0 - 80086ac: e7e4 b.n 8008678 - 80086ae: f000 fb33 bl 8008d18 <__kernel_cos> - 80086b2: e7f9 b.n 80086a8 - 80086b4: f3af 8000 nop.w - ... - 80086c0: 3fe921fb .word 0x3fe921fb - 80086c4: 7fefffff .word 0x7fefffff - -080086c8 : - 80086c8: b51f push {r0, r1, r2, r3, r4, lr} - 80086ca: eeb0 7b40 vmov.f64 d7, d0 - 80086ce: ee17 3a90 vmov r3, s15 - 80086d2: 4a19 ldr r2, [pc, #100] ; (8008738 ) - 80086d4: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000 +080086b8 : + 80086b8: b51f push {r0, r1, r2, r3, r4, lr} + 80086ba: eeb0 7b40 vmov.f64 d7, d0 + 80086be: ee17 3a90 vmov r3, s15 + 80086c2: 4a19 ldr r2, [pc, #100] ; (8008728 ) + 80086c4: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000 + 80086c8: 4293 cmp r3, r2 + 80086ca: dc04 bgt.n 80086d6 + 80086cc: ed9f 1b14 vldr d1, [pc, #80] ; 8008720 + 80086d0: f000 fb56 bl 8008d80 <__kernel_cos> + 80086d4: e004 b.n 80086e0 + 80086d6: 4a15 ldr r2, [pc, #84] ; (800872c ) 80086d8: 4293 cmp r3, r2 - 80086da: dc05 bgt.n 80086e8 - 80086dc: ed9f 1b14 vldr d1, [pc, #80] ; 8008730 - 80086e0: 2000 movs r0, #0 - 80086e2: f000 fe21 bl 8009328 <__kernel_sin> - 80086e6: e004 b.n 80086f2 - 80086e8: 4a14 ldr r2, [pc, #80] ; (800873c ) - 80086ea: 4293 cmp r3, r2 - 80086ec: dd04 ble.n 80086f8 - 80086ee: ee30 0b40 vsub.f64 d0, d0, d0 - 80086f2: b005 add sp, #20 - 80086f4: f85d fb04 ldr.w pc, [sp], #4 - 80086f8: 4668 mov r0, sp - 80086fa: f000 f8a5 bl 8008848 <__ieee754_rem_pio2> - 80086fe: f000 0003 and.w r0, r0, #3 - 8008702: 2801 cmp r0, #1 - 8008704: ed9d 1b02 vldr d1, [sp, #8] - 8008708: ed9d 0b00 vldr d0, [sp] - 800870c: d004 beq.n 8008718 - 800870e: 2802 cmp r0, #2 - 8008710: d005 beq.n 800871e - 8008712: b950 cbnz r0, 800872a - 8008714: 2001 movs r0, #1 - 8008716: e7e4 b.n 80086e2 - 8008718: f000 fafe bl 8008d18 <__kernel_cos> - 800871c: e7e9 b.n 80086f2 - 800871e: 2001 movs r0, #1 - 8008720: f000 fe02 bl 8009328 <__kernel_sin> - 8008724: eeb1 0b40 vneg.f64 d0, d0 - 8008728: e7e3 b.n 80086f2 - 800872a: f000 faf5 bl 8008d18 <__kernel_cos> - 800872e: e7f9 b.n 8008724 + 80086da: dd04 ble.n 80086e6 + 80086dc: ee30 0b40 vsub.f64 d0, d0, d0 + 80086e0: b005 add sp, #20 + 80086e2: f85d fb04 ldr.w pc, [sp], #4 + 80086e6: 4668 mov r0, sp + 80086e8: f000 f8e2 bl 80088b0 <__ieee754_rem_pio2> + 80086ec: f000 0003 and.w r0, r0, #3 + 80086f0: 2801 cmp r0, #1 + 80086f2: ed9d 1b02 vldr d1, [sp, #8] + 80086f6: ed9d 0b00 vldr d0, [sp] + 80086fa: d007 beq.n 800870c + 80086fc: 2802 cmp r0, #2 + 80086fe: d00a beq.n 8008716 + 8008700: 2800 cmp r0, #0 + 8008702: d0e5 beq.n 80086d0 + 8008704: 2001 movs r0, #1 + 8008706: f000 fe43 bl 8009390 <__kernel_sin> + 800870a: e7e9 b.n 80086e0 + 800870c: f000 fe40 bl 8009390 <__kernel_sin> + 8008710: eeb1 0b40 vneg.f64 d0, d0 + 8008714: e7e4 b.n 80086e0 + 8008716: f000 fb33 bl 8008d80 <__kernel_cos> + 800871a: e7f9 b.n 8008710 + 800871c: f3af 8000 nop.w + ... + 8008728: 3fe921fb .word 0x3fe921fb + 800872c: 7fefffff .word 0x7fefffff + +08008730 : + 8008730: b51f push {r0, r1, r2, r3, r4, lr} + 8008732: eeb0 7b40 vmov.f64 d7, d0 + 8008736: ee17 3a90 vmov r3, s15 + 800873a: 4a19 ldr r2, [pc, #100] ; (80087a0 ) + 800873c: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000 + 8008740: 4293 cmp r3, r2 + 8008742: dc05 bgt.n 8008750 + 8008744: ed9f 1b14 vldr d1, [pc, #80] ; 8008798 + 8008748: 2000 movs r0, #0 + 800874a: f000 fe21 bl 8009390 <__kernel_sin> + 800874e: e004 b.n 800875a + 8008750: 4a14 ldr r2, [pc, #80] ; (80087a4 ) + 8008752: 4293 cmp r3, r2 + 8008754: dd04 ble.n 8008760 + 8008756: ee30 0b40 vsub.f64 d0, d0, d0 + 800875a: b005 add sp, #20 + 800875c: f85d fb04 ldr.w pc, [sp], #4 + 8008760: 4668 mov r0, sp + 8008762: f000 f8a5 bl 80088b0 <__ieee754_rem_pio2> + 8008766: f000 0003 and.w r0, r0, #3 + 800876a: 2801 cmp r0, #1 + 800876c: ed9d 1b02 vldr d1, [sp, #8] + 8008770: ed9d 0b00 vldr d0, [sp] + 8008774: d004 beq.n 8008780 + 8008776: 2802 cmp r0, #2 + 8008778: d005 beq.n 8008786 + 800877a: b950 cbnz r0, 8008792 + 800877c: 2001 movs r0, #1 + 800877e: e7e4 b.n 800874a + 8008780: f000 fafe bl 8008d80 <__kernel_cos> + 8008784: e7e9 b.n 800875a + 8008786: 2001 movs r0, #1 + 8008788: f000 fe02 bl 8009390 <__kernel_sin> + 800878c: eeb1 0b40 vneg.f64 d0, d0 + 8008790: e7e3 b.n 800875a + 8008792: f000 faf5 bl 8008d80 <__kernel_cos> + 8008796: e7f9 b.n 800878c ... - 8008738: 3fe921fb .word 0x3fe921fb - 800873c: 7fefffff .word 0x7fefffff - -08008740 : - 8008740: ee10 3a10 vmov r3, s0 - 8008744: b507 push {r0, r1, r2, lr} - 8008746: 4a1c ldr r2, [pc, #112] ; (80087b8 ) - 8008748: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000 - 800874c: 4293 cmp r3, r2 - 800874e: dc04 bgt.n 800875a - 8008750: eddf 0a1a vldr s1, [pc, #104] ; 80087bc - 8008754: f000 fe40 bl 80093d8 <__kernel_cosf> - 8008758: e004 b.n 8008764 - 800875a: f1b3 4fff cmp.w r3, #2139095040 ; 0x7f800000 - 800875e: db04 blt.n 800876a - 8008760: ee30 0a40 vsub.f32 s0, s0, s0 - 8008764: b003 add sp, #12 - 8008766: f85d fb04 ldr.w pc, [sp], #4 - 800876a: 4668 mov r0, sp - 800876c: f000 f9a8 bl 8008ac0 <__ieee754_rem_pio2f> - 8008770: f000 0003 and.w r0, r0, #3 - 8008774: 2801 cmp r0, #1 - 8008776: d007 beq.n 8008788 - 8008778: 2802 cmp r0, #2 - 800877a: d00e beq.n 800879a - 800877c: b9a0 cbnz r0, 80087a8 - 800877e: eddd 0a01 vldr s1, [sp, #4] - 8008782: ed9d 0a00 vldr s0, [sp] - 8008786: e7e5 b.n 8008754 - 8008788: eddd 0a01 vldr s1, [sp, #4] - 800878c: ed9d 0a00 vldr s0, [sp] - 8008790: f001 f902 bl 8009998 <__kernel_sinf> - 8008794: eeb1 0a40 vneg.f32 s0, s0 - 8008798: e7e4 b.n 8008764 - 800879a: eddd 0a01 vldr s1, [sp, #4] - 800879e: ed9d 0a00 vldr s0, [sp] - 80087a2: f000 fe19 bl 80093d8 <__kernel_cosf> - 80087a6: e7f5 b.n 8008794 - 80087a8: 2001 movs r0, #1 - 80087aa: eddd 0a01 vldr s1, [sp, #4] - 80087ae: ed9d 0a00 vldr s0, [sp] - 80087b2: f001 f8f1 bl 8009998 <__kernel_sinf> - 80087b6: e7d5 b.n 8008764 - 80087b8: 3f490fd8 .word 0x3f490fd8 - 80087bc: 00000000 .word 0x00000000 - -080087c0 : - 80087c0: ee10 3a10 vmov r3, s0 - 80087c4: b507 push {r0, r1, r2, lr} - 80087c6: 4a1d ldr r2, [pc, #116] ; (800883c ) - 80087c8: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000 - 80087cc: 4293 cmp r3, r2 - 80087ce: dc05 bgt.n 80087dc - 80087d0: eddf 0a1b vldr s1, [pc, #108] ; 8008840 - 80087d4: 2000 movs r0, #0 - 80087d6: f001 f8df bl 8009998 <__kernel_sinf> - 80087da: e004 b.n 80087e6 - 80087dc: f1b3 4fff cmp.w r3, #2139095040 ; 0x7f800000 - 80087e0: db04 blt.n 80087ec - 80087e2: ee30 0a40 vsub.f32 s0, s0, s0 - 80087e6: b003 add sp, #12 - 80087e8: f85d fb04 ldr.w pc, [sp], #4 - 80087ec: 4668 mov r0, sp - 80087ee: f000 f967 bl 8008ac0 <__ieee754_rem_pio2f> - 80087f2: f000 0003 and.w r0, r0, #3 - 80087f6: 2801 cmp r0, #1 - 80087f8: d008 beq.n 800880c - 80087fa: 2802 cmp r0, #2 - 80087fc: d00d beq.n 800881a - 80087fe: b9b0 cbnz r0, 800882e - 8008800: 2001 movs r0, #1 + 80087a0: 3fe921fb .word 0x3fe921fb + 80087a4: 7fefffff .word 0x7fefffff + +080087a8 : + 80087a8: ee10 3a10 vmov r3, s0 + 80087ac: b507 push {r0, r1, r2, lr} + 80087ae: 4a1c ldr r2, [pc, #112] ; (8008820 ) + 80087b0: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000 + 80087b4: 4293 cmp r3, r2 + 80087b6: dc04 bgt.n 80087c2 + 80087b8: eddf 0a1a vldr s1, [pc, #104] ; 8008824 + 80087bc: f000 fe40 bl 8009440 <__kernel_cosf> + 80087c0: e004 b.n 80087cc + 80087c2: f1b3 4fff cmp.w r3, #2139095040 ; 0x7f800000 + 80087c6: db04 blt.n 80087d2 + 80087c8: ee30 0a40 vsub.f32 s0, s0, s0 + 80087cc: b003 add sp, #12 + 80087ce: f85d fb04 ldr.w pc, [sp], #4 + 80087d2: 4668 mov r0, sp + 80087d4: f000 f9a8 bl 8008b28 <__ieee754_rem_pio2f> + 80087d8: f000 0003 and.w r0, r0, #3 + 80087dc: 2801 cmp r0, #1 + 80087de: d007 beq.n 80087f0 + 80087e0: 2802 cmp r0, #2 + 80087e2: d00e beq.n 8008802 + 80087e4: b9a0 cbnz r0, 8008810 + 80087e6: eddd 0a01 vldr s1, [sp, #4] + 80087ea: ed9d 0a00 vldr s0, [sp] + 80087ee: e7e5 b.n 80087bc + 80087f0: eddd 0a01 vldr s1, [sp, #4] + 80087f4: ed9d 0a00 vldr s0, [sp] + 80087f8: f001 f902 bl 8009a00 <__kernel_sinf> + 80087fc: eeb1 0a40 vneg.f32 s0, s0 + 8008800: e7e4 b.n 80087cc 8008802: eddd 0a01 vldr s1, [sp, #4] 8008806: ed9d 0a00 vldr s0, [sp] - 800880a: e7e4 b.n 80087d6 - 800880c: eddd 0a01 vldr s1, [sp, #4] - 8008810: ed9d 0a00 vldr s0, [sp] - 8008814: f000 fde0 bl 80093d8 <__kernel_cosf> - 8008818: e7e5 b.n 80087e6 - 800881a: 2001 movs r0, #1 - 800881c: eddd 0a01 vldr s1, [sp, #4] - 8008820: ed9d 0a00 vldr s0, [sp] - 8008824: f001 f8b8 bl 8009998 <__kernel_sinf> - 8008828: eeb1 0a40 vneg.f32 s0, s0 - 800882c: e7db b.n 80087e6 - 800882e: eddd 0a01 vldr s1, [sp, #4] - 8008832: ed9d 0a00 vldr s0, [sp] - 8008836: f000 fdcf bl 80093d8 <__kernel_cosf> - 800883a: e7f5 b.n 8008828 - 800883c: 3f490fd8 .word 0x3f490fd8 + 800880a: f000 fe19 bl 8009440 <__kernel_cosf> + 800880e: e7f5 b.n 80087fc + 8008810: 2001 movs r0, #1 + 8008812: eddd 0a01 vldr s1, [sp, #4] + 8008816: ed9d 0a00 vldr s0, [sp] + 800881a: f001 f8f1 bl 8009a00 <__kernel_sinf> + 800881e: e7d5 b.n 80087cc + 8008820: 3f490fd8 .word 0x3f490fd8 + 8008824: 00000000 .word 0x00000000 + +08008828 : + 8008828: ee10 3a10 vmov r3, s0 + 800882c: b507 push {r0, r1, r2, lr} + 800882e: 4a1d ldr r2, [pc, #116] ; (80088a4 ) + 8008830: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000 + 8008834: 4293 cmp r3, r2 + 8008836: dc05 bgt.n 8008844 + 8008838: eddf 0a1b vldr s1, [pc, #108] ; 80088a8 + 800883c: 2000 movs r0, #0 + 800883e: f001 f8df bl 8009a00 <__kernel_sinf> + 8008842: e004 b.n 800884e + 8008844: f1b3 4fff cmp.w r3, #2139095040 ; 0x7f800000 + 8008848: db04 blt.n 8008854 + 800884a: ee30 0a40 vsub.f32 s0, s0, s0 + 800884e: b003 add sp, #12 + 8008850: f85d fb04 ldr.w pc, [sp], #4 + 8008854: 4668 mov r0, sp + 8008856: f000 f967 bl 8008b28 <__ieee754_rem_pio2f> + 800885a: f000 0003 and.w r0, r0, #3 + 800885e: 2801 cmp r0, #1 + 8008860: d008 beq.n 8008874 + 8008862: 2802 cmp r0, #2 + 8008864: d00d beq.n 8008882 + 8008866: b9b0 cbnz r0, 8008896 + 8008868: 2001 movs r0, #1 + 800886a: eddd 0a01 vldr s1, [sp, #4] + 800886e: ed9d 0a00 vldr s0, [sp] + 8008872: e7e4 b.n 800883e + 8008874: eddd 0a01 vldr s1, [sp, #4] + 8008878: ed9d 0a00 vldr s0, [sp] + 800887c: f000 fde0 bl 8009440 <__kernel_cosf> + 8008880: e7e5 b.n 800884e + 8008882: 2001 movs r0, #1 + 8008884: eddd 0a01 vldr s1, [sp, #4] + 8008888: ed9d 0a00 vldr s0, [sp] + 800888c: f001 f8b8 bl 8009a00 <__kernel_sinf> + 8008890: eeb1 0a40 vneg.f32 s0, s0 + 8008894: e7db b.n 800884e + 8008896: eddd 0a01 vldr s1, [sp, #4] + 800889a: ed9d 0a00 vldr s0, [sp] + 800889e: f000 fdcf bl 8009440 <__kernel_cosf> + 80088a2: e7f5 b.n 8008890 + 80088a4: 3f490fd8 .word 0x3f490fd8 ... -08008848 <__ieee754_rem_pio2>: - 8008848: b570 push {r4, r5, r6, lr} - 800884a: eeb0 7b40 vmov.f64 d7, d0 - 800884e: ee17 5a90 vmov r5, s15 - 8008852: 4b95 ldr r3, [pc, #596] ; (8008aa8 <__ieee754_rem_pio2+0x260>) - 8008854: f025 4600 bic.w r6, r5, #2147483648 ; 0x80000000 - 8008858: 429e cmp r6, r3 - 800885a: b088 sub sp, #32 - 800885c: 4604 mov r4, r0 - 800885e: dc07 bgt.n 8008870 <__ieee754_rem_pio2+0x28> - 8008860: 2200 movs r2, #0 - 8008862: 2300 movs r3, #0 - 8008864: ed84 0b00 vstr d0, [r4] - 8008868: e9c0 2302 strd r2, r3, [r0, #8] - 800886c: 2000 movs r0, #0 - 800886e: e01b b.n 80088a8 <__ieee754_rem_pio2+0x60> - 8008870: 4b8e ldr r3, [pc, #568] ; (8008aac <__ieee754_rem_pio2+0x264>) - 8008872: 429e cmp r6, r3 - 8008874: dc3b bgt.n 80088ee <__ieee754_rem_pio2+0xa6> - 8008876: f5a3 231b sub.w r3, r3, #634880 ; 0x9b000 - 800887a: 2d00 cmp r5, #0 - 800887c: ed9f 6b7a vldr d6, [pc, #488] ; 8008a68 <__ieee754_rem_pio2+0x220> - 8008880: f5a3 63f0 sub.w r3, r3, #1920 ; 0x780 - 8008884: dd19 ble.n 80088ba <__ieee754_rem_pio2+0x72> - 8008886: ee30 7b46 vsub.f64 d7, d0, d6 - 800888a: 429e cmp r6, r3 - 800888c: d00e beq.n 80088ac <__ieee754_rem_pio2+0x64> - 800888e: ed9f 6b78 vldr d6, [pc, #480] ; 8008a70 <__ieee754_rem_pio2+0x228> - 8008892: ee37 5b46 vsub.f64 d5, d7, d6 - 8008896: ee37 7b45 vsub.f64 d7, d7, d5 - 800889a: ed84 5b00 vstr d5, [r4] - 800889e: ee37 7b46 vsub.f64 d7, d7, d6 - 80088a2: ed84 7b02 vstr d7, [r4, #8] - 80088a6: 2001 movs r0, #1 - 80088a8: b008 add sp, #32 - 80088aa: bd70 pop {r4, r5, r6, pc} - 80088ac: ed9f 6b72 vldr d6, [pc, #456] ; 8008a78 <__ieee754_rem_pio2+0x230> - 80088b0: ee37 7b46 vsub.f64 d7, d7, d6 - 80088b4: ed9f 6b72 vldr d6, [pc, #456] ; 8008a80 <__ieee754_rem_pio2+0x238> - 80088b8: e7eb b.n 8008892 <__ieee754_rem_pio2+0x4a> - 80088ba: 429e cmp r6, r3 - 80088bc: ee30 7b06 vadd.f64 d7, d0, d6 - 80088c0: d00e beq.n 80088e0 <__ieee754_rem_pio2+0x98> - 80088c2: ed9f 6b6b vldr d6, [pc, #428] ; 8008a70 <__ieee754_rem_pio2+0x228> - 80088c6: ee37 5b06 vadd.f64 d5, d7, d6 - 80088ca: ee37 7b45 vsub.f64 d7, d7, d5 - 80088ce: ed84 5b00 vstr d5, [r4] - 80088d2: ee37 7b06 vadd.f64 d7, d7, d6 - 80088d6: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff - 80088da: ed84 7b02 vstr d7, [r4, #8] - 80088de: e7e3 b.n 80088a8 <__ieee754_rem_pio2+0x60> - 80088e0: ed9f 6b65 vldr d6, [pc, #404] ; 8008a78 <__ieee754_rem_pio2+0x230> - 80088e4: ee37 7b06 vadd.f64 d7, d7, d6 - 80088e8: ed9f 6b65 vldr d6, [pc, #404] ; 8008a80 <__ieee754_rem_pio2+0x238> - 80088ec: e7eb b.n 80088c6 <__ieee754_rem_pio2+0x7e> - 80088ee: 4b70 ldr r3, [pc, #448] ; (8008ab0 <__ieee754_rem_pio2+0x268>) - 80088f0: 429e cmp r6, r3 - 80088f2: dc6c bgt.n 80089ce <__ieee754_rem_pio2+0x186> - 80088f4: f001 f898 bl 8009a28 - 80088f8: eeb6 7b00 vmov.f64 d7, #96 ; 0x3f000000 0.5 - 80088fc: ed9f 6b62 vldr d6, [pc, #392] ; 8008a88 <__ieee754_rem_pio2+0x240> - 8008900: eea0 7b06 vfma.f64 d7, d0, d6 - 8008904: eefd 7bc7 vcvt.s32.f64 s15, d7 - 8008908: eeb8 4be7 vcvt.f64.s32 d4, s15 - 800890c: ee17 0a90 vmov r0, s15 - 8008910: eeb1 5b44 vneg.f64 d5, d4 - 8008914: ed9f 7b54 vldr d7, [pc, #336] ; 8008a68 <__ieee754_rem_pio2+0x220> - 8008918: eea5 0b07 vfma.f64 d0, d5, d7 - 800891c: ed9f 7b54 vldr d7, [pc, #336] ; 8008a70 <__ieee754_rem_pio2+0x228> - 8008920: 281f cmp r0, #31 - 8008922: ee24 7b07 vmul.f64 d7, d4, d7 - 8008926: ee30 6b47 vsub.f64 d6, d0, d7 - 800892a: dc08 bgt.n 800893e <__ieee754_rem_pio2+0xf6> - 800892c: 1e42 subs r2, r0, #1 - 800892e: 4b61 ldr r3, [pc, #388] ; (8008ab4 <__ieee754_rem_pio2+0x26c>) - 8008930: f853 3022 ldr.w r3, [r3, r2, lsl #2] - 8008934: 42b3 cmp r3, r6 - 8008936: d002 beq.n 800893e <__ieee754_rem_pio2+0xf6> - 8008938: ed84 6b00 vstr d6, [r4] - 800893c: e022 b.n 8008984 <__ieee754_rem_pio2+0x13c> - 800893e: ee16 3a90 vmov r3, s13 - 8008942: 1536 asrs r6, r6, #20 - 8008944: f3c3 530a ubfx r3, r3, #20, #11 - 8008948: 1af3 subs r3, r6, r3 - 800894a: 2b10 cmp r3, #16 - 800894c: ddf4 ble.n 8008938 <__ieee754_rem_pio2+0xf0> - 800894e: eeb0 6b40 vmov.f64 d6, d0 - 8008952: ed9f 3b49 vldr d3, [pc, #292] ; 8008a78 <__ieee754_rem_pio2+0x230> - 8008956: eea5 6b03 vfma.f64 d6, d5, d3 - 800895a: ee30 7b46 vsub.f64 d7, d0, d6 - 800895e: eea5 7b03 vfma.f64 d7, d5, d3 - 8008962: ed9f 3b47 vldr d3, [pc, #284] ; 8008a80 <__ieee754_rem_pio2+0x238> - 8008966: ee94 7b03 vfnms.f64 d7, d4, d3 - 800896a: ee36 3b47 vsub.f64 d3, d6, d7 - 800896e: ee13 3a90 vmov r3, s7 - 8008972: f3c3 530a ubfx r3, r3, #20, #11 - 8008976: 1af6 subs r6, r6, r3 - 8008978: 2e31 cmp r6, #49 ; 0x31 - 800897a: dc17 bgt.n 80089ac <__ieee754_rem_pio2+0x164> - 800897c: eeb0 0b46 vmov.f64 d0, d6 - 8008980: ed84 3b00 vstr d3, [r4] - 8008984: ed94 6b00 vldr d6, [r4] - 8008988: 2d00 cmp r5, #0 - 800898a: ee30 0b46 vsub.f64 d0, d0, d6 - 800898e: ee30 7b47 vsub.f64 d7, d0, d7 - 8008992: ed84 7b02 vstr d7, [r4, #8] - 8008996: da87 bge.n 80088a8 <__ieee754_rem_pio2+0x60> - 8008998: eeb1 6b46 vneg.f64 d6, d6 - 800899c: ed84 6b00 vstr d6, [r4] - 80089a0: eeb1 7b47 vneg.f64 d7, d7 - 80089a4: 4240 negs r0, r0 - 80089a6: ed84 7b02 vstr d7, [r4, #8] - 80089aa: e77d b.n 80088a8 <__ieee754_rem_pio2+0x60> - 80089ac: ed9f 3b38 vldr d3, [pc, #224] ; 8008a90 <__ieee754_rem_pio2+0x248> - 80089b0: eeb0 0b46 vmov.f64 d0, d6 - 80089b4: eea5 0b03 vfma.f64 d0, d5, d3 - 80089b8: ee36 7b40 vsub.f64 d7, d6, d0 - 80089bc: ed9f 6b36 vldr d6, [pc, #216] ; 8008a98 <__ieee754_rem_pio2+0x250> - 80089c0: eea5 7b03 vfma.f64 d7, d5, d3 - 80089c4: ee94 7b06 vfnms.f64 d7, d4, d6 - 80089c8: ee30 6b47 vsub.f64 d6, d0, d7 - 80089cc: e7b4 b.n 8008938 <__ieee754_rem_pio2+0xf0> - 80089ce: 4b3a ldr r3, [pc, #232] ; (8008ab8 <__ieee754_rem_pio2+0x270>) - 80089d0: 429e cmp r6, r3 - 80089d2: dd06 ble.n 80089e2 <__ieee754_rem_pio2+0x19a> - 80089d4: ee30 7b40 vsub.f64 d7, d0, d0 - 80089d8: ed80 7b02 vstr d7, [r0, #8] - 80089dc: ed80 7b00 vstr d7, [r0] - 80089e0: e744 b.n 800886c <__ieee754_rem_pio2+0x24> - 80089e2: 1532 asrs r2, r6, #20 - 80089e4: f2a2 4216 subw r2, r2, #1046 ; 0x416 - 80089e8: ee10 0a10 vmov r0, s0 - 80089ec: eba6 5102 sub.w r1, r6, r2, lsl #20 - 80089f0: ec41 0b17 vmov d7, r0, r1 - 80089f4: eebd 6bc7 vcvt.s32.f64 s12, d7 - 80089f8: ed9f 5b29 vldr d5, [pc, #164] ; 8008aa0 <__ieee754_rem_pio2+0x258> - 80089fc: eeb8 6bc6 vcvt.f64.s32 d6, s12 - 8008a00: ee37 7b46 vsub.f64 d7, d7, d6 - 8008a04: ed8d 6b02 vstr d6, [sp, #8] - 8008a08: ee27 7b05 vmul.f64 d7, d7, d5 - 8008a0c: eebd 6bc7 vcvt.s32.f64 s12, d7 - 8008a10: a908 add r1, sp, #32 - 8008a12: eeb8 6bc6 vcvt.f64.s32 d6, s12 - 8008a16: ee37 7b46 vsub.f64 d7, d7, d6 - 8008a1a: ed8d 6b04 vstr d6, [sp, #16] - 8008a1e: ee27 7b05 vmul.f64 d7, d7, d5 - 8008a22: ed8d 7b06 vstr d7, [sp, #24] - 8008a26: 2303 movs r3, #3 - 8008a28: ed31 7b02 vldmdb r1!, {d7} - 8008a2c: eeb5 7b40 vcmp.f64 d7, #0.0 - 8008a30: eef1 fa10 vmrs APSR_nzcv, fpscr - 8008a34: f103 30ff add.w r0, r3, #4294967295 ; 0xffffffff - 8008a38: d013 beq.n 8008a62 <__ieee754_rem_pio2+0x21a> - 8008a3a: 4920 ldr r1, [pc, #128] ; (8008abc <__ieee754_rem_pio2+0x274>) - 8008a3c: 9101 str r1, [sp, #4] - 8008a3e: 2102 movs r1, #2 - 8008a40: 9100 str r1, [sp, #0] - 8008a42: a802 add r0, sp, #8 - 8008a44: 4621 mov r1, r4 - 8008a46: f000 f9d3 bl 8008df0 <__kernel_rem_pio2> - 8008a4a: 2d00 cmp r5, #0 - 8008a4c: f6bf af2c bge.w 80088a8 <__ieee754_rem_pio2+0x60> - 8008a50: ed94 7b00 vldr d7, [r4] - 8008a54: eeb1 7b47 vneg.f64 d7, d7 - 8008a58: ed84 7b00 vstr d7, [r4] - 8008a5c: ed94 7b02 vldr d7, [r4, #8] - 8008a60: e79e b.n 80089a0 <__ieee754_rem_pio2+0x158> - 8008a62: 4603 mov r3, r0 - 8008a64: e7e0 b.n 8008a28 <__ieee754_rem_pio2+0x1e0> - 8008a66: bf00 nop - 8008a68: 54400000 .word 0x54400000 - 8008a6c: 3ff921fb .word 0x3ff921fb - 8008a70: 1a626331 .word 0x1a626331 - 8008a74: 3dd0b461 .word 0x3dd0b461 - 8008a78: 1a600000 .word 0x1a600000 - 8008a7c: 3dd0b461 .word 0x3dd0b461 - 8008a80: 2e037073 .word 0x2e037073 - 8008a84: 3ba3198a .word 0x3ba3198a - 8008a88: 6dc9c883 .word 0x6dc9c883 - 8008a8c: 3fe45f30 .word 0x3fe45f30 - 8008a90: 2e000000 .word 0x2e000000 - 8008a94: 3ba3198a .word 0x3ba3198a - 8008a98: 252049c1 .word 0x252049c1 - 8008a9c: 397b839a .word 0x397b839a - 8008aa0: 00000000 .word 0x00000000 - 8008aa4: 41700000 .word 0x41700000 - 8008aa8: 3fe921fb .word 0x3fe921fb - 8008aac: 4002d97b .word 0x4002d97b - 8008ab0: 413921fb .word 0x413921fb - 8008ab4: 0800a5e0 .word 0x0800a5e0 - 8008ab8: 7fefffff .word 0x7fefffff - 8008abc: 0800a660 .word 0x0800a660 - -08008ac0 <__ieee754_rem_pio2f>: - 8008ac0: b5f0 push {r4, r5, r6, r7, lr} - 8008ac2: ee10 6a10 vmov r6, s0 - 8008ac6: 4b86 ldr r3, [pc, #536] ; (8008ce0 <__ieee754_rem_pio2f+0x220>) - 8008ac8: f026 4400 bic.w r4, r6, #2147483648 ; 0x80000000 - 8008acc: 429c cmp r4, r3 - 8008ace: b087 sub sp, #28 - 8008ad0: 4605 mov r5, r0 - 8008ad2: dc05 bgt.n 8008ae0 <__ieee754_rem_pio2f+0x20> - 8008ad4: 2300 movs r3, #0 - 8008ad6: ed85 0a00 vstr s0, [r5] - 8008ada: 6043 str r3, [r0, #4] - 8008adc: 2000 movs r0, #0 - 8008ade: e020 b.n 8008b22 <__ieee754_rem_pio2f+0x62> - 8008ae0: 4b80 ldr r3, [pc, #512] ; (8008ce4 <__ieee754_rem_pio2f+0x224>) - 8008ae2: 429c cmp r4, r3 - 8008ae4: dc38 bgt.n 8008b58 <__ieee754_rem_pio2f+0x98> - 8008ae6: 2e00 cmp r6, #0 - 8008ae8: f024 040f bic.w r4, r4, #15 - 8008aec: ed9f 7a7e vldr s14, [pc, #504] ; 8008ce8 <__ieee754_rem_pio2f+0x228> - 8008af0: 4b7e ldr r3, [pc, #504] ; (8008cec <__ieee754_rem_pio2f+0x22c>) - 8008af2: dd18 ble.n 8008b26 <__ieee754_rem_pio2f+0x66> - 8008af4: 429c cmp r4, r3 - 8008af6: ee70 7a47 vsub.f32 s15, s0, s14 - 8008afa: bf09 itett eq - 8008afc: ed9f 7a7c vldreq s14, [pc, #496] ; 8008cf0 <__ieee754_rem_pio2f+0x230> - 8008b00: ed9f 7a7c vldrne s14, [pc, #496] ; 8008cf4 <__ieee754_rem_pio2f+0x234> - 8008b04: ee77 7ac7 vsubeq.f32 s15, s15, s14 - 8008b08: ed9f 7a7b vldreq s14, [pc, #492] ; 8008cf8 <__ieee754_rem_pio2f+0x238> - 8008b0c: ee77 6ac7 vsub.f32 s13, s15, s14 - 8008b10: ee77 7ae6 vsub.f32 s15, s15, s13 - 8008b14: edc0 6a00 vstr s13, [r0] - 8008b18: ee77 7ac7 vsub.f32 s15, s15, s14 - 8008b1c: edc0 7a01 vstr s15, [r0, #4] - 8008b20: 2001 movs r0, #1 - 8008b22: b007 add sp, #28 - 8008b24: bdf0 pop {r4, r5, r6, r7, pc} - 8008b26: 429c cmp r4, r3 - 8008b28: ee70 7a07 vadd.f32 s15, s0, s14 - 8008b2c: bf09 itett eq - 8008b2e: ed9f 7a70 vldreq s14, [pc, #448] ; 8008cf0 <__ieee754_rem_pio2f+0x230> - 8008b32: ed9f 7a70 vldrne s14, [pc, #448] ; 8008cf4 <__ieee754_rem_pio2f+0x234> - 8008b36: ee77 7a87 vaddeq.f32 s15, s15, s14 - 8008b3a: ed9f 7a6f vldreq s14, [pc, #444] ; 8008cf8 <__ieee754_rem_pio2f+0x238> - 8008b3e: ee77 6a87 vadd.f32 s13, s15, s14 - 8008b42: ee77 7ae6 vsub.f32 s15, s15, s13 - 8008b46: edc0 6a00 vstr s13, [r0] - 8008b4a: ee77 7a87 vadd.f32 s15, s15, s14 - 8008b4e: edc0 7a01 vstr s15, [r0, #4] - 8008b52: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff - 8008b56: e7e4 b.n 8008b22 <__ieee754_rem_pio2f+0x62> - 8008b58: 4b68 ldr r3, [pc, #416] ; (8008cfc <__ieee754_rem_pio2f+0x23c>) - 8008b5a: 429c cmp r4, r3 - 8008b5c: dc71 bgt.n 8008c42 <__ieee754_rem_pio2f+0x182> - 8008b5e: f001 f865 bl 8009c2c - 8008b62: ed9f 7a67 vldr s14, [pc, #412] ; 8008d00 <__ieee754_rem_pio2f+0x240> - 8008b66: eef6 7a00 vmov.f32 s15, #96 ; 0x3f000000 0.5 - 8008b6a: eee0 7a07 vfma.f32 s15, s0, s14 - 8008b6e: eefd 7ae7 vcvt.s32.f32 s15, s15 - 8008b72: eeb8 6ae7 vcvt.f32.s32 s12, s15 - 8008b76: ee17 0a90 vmov r0, s15 - 8008b7a: eddf 7a5b vldr s15, [pc, #364] ; 8008ce8 <__ieee754_rem_pio2f+0x228> - 8008b7e: eeb1 7a46 vneg.f32 s14, s12 - 8008b82: eea7 0a27 vfma.f32 s0, s14, s15 - 8008b86: 281f cmp r0, #31 - 8008b88: eddf 7a5a vldr s15, [pc, #360] ; 8008cf4 <__ieee754_rem_pio2f+0x234> - 8008b8c: ee66 7a27 vmul.f32 s15, s12, s15 - 8008b90: ee70 6a67 vsub.f32 s13, s0, s15 - 8008b94: ee16 3a90 vmov r3, s13 - 8008b98: dc1c bgt.n 8008bd4 <__ieee754_rem_pio2f+0x114> - 8008b9a: 1e47 subs r7, r0, #1 - 8008b9c: 4959 ldr r1, [pc, #356] ; (8008d04 <__ieee754_rem_pio2f+0x244>) - 8008b9e: f851 1027 ldr.w r1, [r1, r7, lsl #2] - 8008ba2: f024 02ff bic.w r2, r4, #255 ; 0xff - 8008ba6: 428a cmp r2, r1 - 8008ba8: d014 beq.n 8008bd4 <__ieee754_rem_pio2f+0x114> - 8008baa: 602b str r3, [r5, #0] - 8008bac: ed95 7a00 vldr s14, [r5] - 8008bb0: ee30 0a47 vsub.f32 s0, s0, s14 - 8008bb4: 2e00 cmp r6, #0 - 8008bb6: ee30 0a67 vsub.f32 s0, s0, s15 - 8008bba: ed85 0a01 vstr s0, [r5, #4] - 8008bbe: dab0 bge.n 8008b22 <__ieee754_rem_pio2f+0x62> - 8008bc0: eeb1 7a47 vneg.f32 s14, s14 - 8008bc4: eeb1 0a40 vneg.f32 s0, s0 - 8008bc8: ed85 7a00 vstr s14, [r5] - 8008bcc: ed85 0a01 vstr s0, [r5, #4] - 8008bd0: 4240 negs r0, r0 - 8008bd2: e7a6 b.n 8008b22 <__ieee754_rem_pio2f+0x62> - 8008bd4: 15e4 asrs r4, r4, #23 - 8008bd6: f3c3 52c7 ubfx r2, r3, #23, #8 - 8008bda: 1aa2 subs r2, r4, r2 - 8008bdc: 2a08 cmp r2, #8 - 8008bde: dde4 ble.n 8008baa <__ieee754_rem_pio2f+0xea> - 8008be0: eddf 7a43 vldr s15, [pc, #268] ; 8008cf0 <__ieee754_rem_pio2f+0x230> - 8008be4: eef0 6a40 vmov.f32 s13, s0 - 8008be8: eee7 6a27 vfma.f32 s13, s14, s15 - 8008bec: ee30 0a66 vsub.f32 s0, s0, s13 - 8008bf0: eea7 0a27 vfma.f32 s0, s14, s15 - 8008bf4: eddf 7a40 vldr s15, [pc, #256] ; 8008cf8 <__ieee754_rem_pio2f+0x238> - 8008bf8: ee96 0a27 vfnms.f32 s0, s12, s15 - 8008bfc: ee76 5ac0 vsub.f32 s11, s13, s0 - 8008c00: eef0 7a40 vmov.f32 s15, s0 - 8008c04: ee15 3a90 vmov r3, s11 - 8008c08: f3c3 52c7 ubfx r2, r3, #23, #8 - 8008c0c: 1aa4 subs r4, r4, r2 - 8008c0e: 2c19 cmp r4, #25 - 8008c10: dc04 bgt.n 8008c1c <__ieee754_rem_pio2f+0x15c> - 8008c12: edc5 5a00 vstr s11, [r5] - 8008c16: eeb0 0a66 vmov.f32 s0, s13 - 8008c1a: e7c7 b.n 8008bac <__ieee754_rem_pio2f+0xec> - 8008c1c: eddf 5a3a vldr s11, [pc, #232] ; 8008d08 <__ieee754_rem_pio2f+0x248> - 8008c20: eeb0 0a66 vmov.f32 s0, s13 - 8008c24: eea7 0a25 vfma.f32 s0, s14, s11 - 8008c28: ee76 7ac0 vsub.f32 s15, s13, s0 - 8008c2c: eee7 7a25 vfma.f32 s15, s14, s11 - 8008c30: ed9f 7a36 vldr s14, [pc, #216] ; 8008d0c <__ieee754_rem_pio2f+0x24c> - 8008c34: eed6 7a07 vfnms.f32 s15, s12, s14 - 8008c38: ee30 7a67 vsub.f32 s14, s0, s15 - 8008c3c: ed85 7a00 vstr s14, [r5] - 8008c40: e7b4 b.n 8008bac <__ieee754_rem_pio2f+0xec> - 8008c42: f1b4 4fff cmp.w r4, #2139095040 ; 0x7f800000 - 8008c46: db06 blt.n 8008c56 <__ieee754_rem_pio2f+0x196> - 8008c48: ee70 7a40 vsub.f32 s15, s0, s0 - 8008c4c: edc0 7a01 vstr s15, [r0, #4] - 8008c50: edc0 7a00 vstr s15, [r0] - 8008c54: e742 b.n 8008adc <__ieee754_rem_pio2f+0x1c> - 8008c56: 15e2 asrs r2, r4, #23 - 8008c58: 3a86 subs r2, #134 ; 0x86 - 8008c5a: eba4 53c2 sub.w r3, r4, r2, lsl #23 - 8008c5e: ee07 3a90 vmov s15, r3 - 8008c62: eebd 7ae7 vcvt.s32.f32 s14, s15 - 8008c66: eddf 6a2a vldr s13, [pc, #168] ; 8008d10 <__ieee754_rem_pio2f+0x250> - 8008c6a: eeb8 7ac7 vcvt.f32.s32 s14, s14 - 8008c6e: ee77 7ac7 vsub.f32 s15, s15, s14 - 8008c72: ed8d 7a03 vstr s14, [sp, #12] - 8008c76: ee67 7aa6 vmul.f32 s15, s15, s13 - 8008c7a: eebd 7ae7 vcvt.s32.f32 s14, s15 - 8008c7e: eeb8 7ac7 vcvt.f32.s32 s14, s14 - 8008c82: ee77 7ac7 vsub.f32 s15, s15, s14 - 8008c86: ed8d 7a04 vstr s14, [sp, #16] - 8008c8a: ee67 7aa6 vmul.f32 s15, s15, s13 - 8008c8e: eef5 7a40 vcmp.f32 s15, #0.0 - 8008c92: eef1 fa10 vmrs APSR_nzcv, fpscr - 8008c96: edcd 7a05 vstr s15, [sp, #20] - 8008c9a: d11e bne.n 8008cda <__ieee754_rem_pio2f+0x21a> - 8008c9c: eeb5 7a40 vcmp.f32 s14, #0.0 - 8008ca0: eef1 fa10 vmrs APSR_nzcv, fpscr - 8008ca4: bf0c ite eq - 8008ca6: 2301 moveq r3, #1 - 8008ca8: 2302 movne r3, #2 - 8008caa: 491a ldr r1, [pc, #104] ; (8008d14 <__ieee754_rem_pio2f+0x254>) - 8008cac: 9101 str r1, [sp, #4] - 8008cae: 2102 movs r1, #2 - 8008cb0: 9100 str r1, [sp, #0] - 8008cb2: a803 add r0, sp, #12 - 8008cb4: 4629 mov r1, r5 - 8008cb6: f000 fbed bl 8009494 <__kernel_rem_pio2f> - 8008cba: 2e00 cmp r6, #0 - 8008cbc: f6bf af31 bge.w 8008b22 <__ieee754_rem_pio2f+0x62> - 8008cc0: edd5 7a00 vldr s15, [r5] - 8008cc4: eef1 7a67 vneg.f32 s15, s15 - 8008cc8: edc5 7a00 vstr s15, [r5] - 8008ccc: edd5 7a01 vldr s15, [r5, #4] - 8008cd0: eef1 7a67 vneg.f32 s15, s15 - 8008cd4: edc5 7a01 vstr s15, [r5, #4] - 8008cd8: e77a b.n 8008bd0 <__ieee754_rem_pio2f+0x110> - 8008cda: 2303 movs r3, #3 - 8008cdc: e7e5 b.n 8008caa <__ieee754_rem_pio2f+0x1ea> - 8008cde: bf00 nop - 8008ce0: 3f490fd8 .word 0x3f490fd8 - 8008ce4: 4016cbe3 .word 0x4016cbe3 - 8008ce8: 3fc90f80 .word 0x3fc90f80 - 8008cec: 3fc90fd0 .word 0x3fc90fd0 - 8008cf0: 37354400 .word 0x37354400 - 8008cf4: 37354443 .word 0x37354443 - 8008cf8: 2e85a308 .word 0x2e85a308 - 8008cfc: 43490f80 .word 0x43490f80 - 8008d00: 3f22f984 .word 0x3f22f984 - 8008d04: 0800a768 .word 0x0800a768 - 8008d08: 2e85a300 .word 0x2e85a300 - 8008d0c: 248d3132 .word 0x248d3132 - 8008d10: 43800000 .word 0x43800000 - 8008d14: 0800a7e8 .word 0x0800a7e8 - -08008d18 <__kernel_cos>: - 8008d18: ee10 1a90 vmov r1, s1 - 8008d1c: eeb7 7b00 vmov.f64 d7, #112 ; 0x3f800000 1.0 - 8008d20: f021 4100 bic.w r1, r1, #2147483648 ; 0x80000000 - 8008d24: f1b1 5f79 cmp.w r1, #1044381696 ; 0x3e400000 - 8008d28: da05 bge.n 8008d36 <__kernel_cos+0x1e> - 8008d2a: eefd 6bc0 vcvt.s32.f64 s13, d0 - 8008d2e: ee16 3a90 vmov r3, s13 - 8008d32: 2b00 cmp r3, #0 - 8008d34: d03d beq.n 8008db2 <__kernel_cos+0x9a> - 8008d36: ee20 4b00 vmul.f64 d4, d0, d0 - 8008d3a: eeb6 6b00 vmov.f64 d6, #96 ; 0x3f000000 0.5 - 8008d3e: ed9f 3b1e vldr d3, [pc, #120] ; 8008db8 <__kernel_cos+0xa0> - 8008d42: ee21 1b40 vnmul.f64 d1, d1, d0 - 8008d46: ee24 6b06 vmul.f64 d6, d4, d6 - 8008d4a: ed9f 5b1d vldr d5, [pc, #116] ; 8008dc0 <__kernel_cos+0xa8> - 8008d4e: eea4 5b03 vfma.f64 d5, d4, d3 - 8008d52: ed9f 3b1d vldr d3, [pc, #116] ; 8008dc8 <__kernel_cos+0xb0> - 8008d56: eea5 3b04 vfma.f64 d3, d5, d4 - 8008d5a: ed9f 5b1d vldr d5, [pc, #116] ; 8008dd0 <__kernel_cos+0xb8> - 8008d5e: eea3 5b04 vfma.f64 d5, d3, d4 - 8008d62: ed9f 3b1d vldr d3, [pc, #116] ; 8008dd8 <__kernel_cos+0xc0> - 8008d66: 4b20 ldr r3, [pc, #128] ; (8008de8 <__kernel_cos+0xd0>) - 8008d68: eea5 3b04 vfma.f64 d3, d5, d4 - 8008d6c: ed9f 5b1c vldr d5, [pc, #112] ; 8008de0 <__kernel_cos+0xc8> - 8008d70: 4299 cmp r1, r3 - 8008d72: eea3 5b04 vfma.f64 d5, d3, d4 - 8008d76: ee25 5b04 vmul.f64 d5, d5, d4 - 8008d7a: eea4 1b05 vfma.f64 d1, d4, d5 - 8008d7e: dc04 bgt.n 8008d8a <__kernel_cos+0x72> - 8008d80: ee36 6b41 vsub.f64 d6, d6, d1 - 8008d84: ee37 0b46 vsub.f64 d0, d7, d6 - 8008d88: 4770 bx lr - 8008d8a: 4b18 ldr r3, [pc, #96] ; (8008dec <__kernel_cos+0xd4>) - 8008d8c: 4299 cmp r1, r3 - 8008d8e: dc0d bgt.n 8008dac <__kernel_cos+0x94> - 8008d90: 2200 movs r2, #0 - 8008d92: f5a1 1300 sub.w r3, r1, #2097152 ; 0x200000 - 8008d96: ec43 2b15 vmov d5, r2, r3 - 8008d9a: ee37 0b45 vsub.f64 d0, d7, d5 - 8008d9e: ee36 6b45 vsub.f64 d6, d6, d5 - 8008da2: ee36 6b41 vsub.f64 d6, d6, d1 - 8008da6: ee30 0b46 vsub.f64 d0, d0, d6 - 8008daa: 4770 bx lr - 8008dac: eeb5 5b02 vmov.f64 d5, #82 ; 0x3e900000 0.2812500 - 8008db0: e7f3 b.n 8008d9a <__kernel_cos+0x82> - 8008db2: eeb0 0b47 vmov.f64 d0, d7 - 8008db6: 4770 bx lr - 8008db8: be8838d4 .word 0xbe8838d4 - 8008dbc: bda8fae9 .word 0xbda8fae9 - 8008dc0: bdb4b1c4 .word 0xbdb4b1c4 - 8008dc4: 3e21ee9e .word 0x3e21ee9e - 8008dc8: 809c52ad .word 0x809c52ad - 8008dcc: be927e4f .word 0xbe927e4f - 8008dd0: 19cb1590 .word 0x19cb1590 - 8008dd4: 3efa01a0 .word 0x3efa01a0 - 8008dd8: 16c15177 .word 0x16c15177 - 8008ddc: bf56c16c .word 0xbf56c16c - 8008de0: 5555554c .word 0x5555554c - 8008de4: 3fa55555 .word 0x3fa55555 - 8008de8: 3fd33332 .word 0x3fd33332 - 8008dec: 3fe90000 .word 0x3fe90000 - -08008df0 <__kernel_rem_pio2>: - 8008df0: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} - 8008df4: ed2d 8b06 vpush {d8-d10} - 8008df8: f5ad 7d13 sub.w sp, sp, #588 ; 0x24c - 8008dfc: 469b mov fp, r3 - 8008dfe: 460e mov r6, r1 - 8008e00: 4bc7 ldr r3, [pc, #796] ; (8009120 <__kernel_rem_pio2+0x330>) - 8008e02: 99a2 ldr r1, [sp, #648] ; 0x288 - 8008e04: 9002 str r0, [sp, #8] - 8008e06: f853 9021 ldr.w r9, [r3, r1, lsl #2] - 8008e0a: 98a3 ldr r0, [sp, #652] ; 0x28c - 8008e0c: 1ed1 subs r1, r2, #3 - 8008e0e: 2318 movs r3, #24 - 8008e10: f06f 0417 mvn.w r4, #23 - 8008e14: fb91 f1f3 sdiv r1, r1, r3 - 8008e18: ea21 71e1 bic.w r1, r1, r1, asr #31 - 8008e1c: f10b 3aff add.w sl, fp, #4294967295 ; 0xffffffff - 8008e20: fb01 4404 mla r4, r1, r4, r4 - 8008e24: ed9f 6bb8 vldr d6, [pc, #736] ; 8009108 <__kernel_rem_pio2+0x318> - 8008e28: 4414 add r4, r2 - 8008e2a: eba1 050a sub.w r5, r1, sl - 8008e2e: aa1a add r2, sp, #104 ; 0x68 - 8008e30: eb09 070a add.w r7, r9, sl - 8008e34: eb00 0c85 add.w ip, r0, r5, lsl #2 - 8008e38: 4696 mov lr, r2 - 8008e3a: 2300 movs r3, #0 - 8008e3c: 42bb cmp r3, r7 - 8008e3e: dd0f ble.n 8008e60 <__kernel_rem_pio2+0x70> - 8008e40: af6a add r7, sp, #424 ; 0x1a8 - 8008e42: 2200 movs r2, #0 - 8008e44: 454a cmp r2, r9 - 8008e46: dc28 bgt.n 8008e9a <__kernel_rem_pio2+0xaa> - 8008e48: f10d 0c68 add.w ip, sp, #104 ; 0x68 - 8008e4c: eb0b 0302 add.w r3, fp, r2 - 8008e50: eb0c 03c3 add.w r3, ip, r3, lsl #3 - 8008e54: 9d02 ldr r5, [sp, #8] - 8008e56: ed9f 7bac vldr d7, [pc, #688] ; 8009108 <__kernel_rem_pio2+0x318> - 8008e5a: f04f 0c00 mov.w ip, #0 - 8008e5e: e016 b.n 8008e8e <__kernel_rem_pio2+0x9e> - 8008e60: 42dd cmn r5, r3 - 8008e62: d409 bmi.n 8008e78 <__kernel_rem_pio2+0x88> - 8008e64: f85c 2023 ldr.w r2, [ip, r3, lsl #2] - 8008e68: ee07 2a90 vmov s15, r2 - 8008e6c: eeb8 7be7 vcvt.f64.s32 d7, s15 - 8008e70: ecae 7b02 vstmia lr!, {d7} - 8008e74: 3301 adds r3, #1 - 8008e76: e7e1 b.n 8008e3c <__kernel_rem_pio2+0x4c> - 8008e78: eeb0 7b46 vmov.f64 d7, d6 - 8008e7c: e7f8 b.n 8008e70 <__kernel_rem_pio2+0x80> - 8008e7e: ecb5 5b02 vldmia r5!, {d5} - 8008e82: ed33 6b02 vldmdb r3!, {d6} - 8008e86: f10c 0c01 add.w ip, ip, #1 - 8008e8a: eea5 7b06 vfma.f64 d7, d5, d6 - 8008e8e: 45d4 cmp ip, sl - 8008e90: ddf5 ble.n 8008e7e <__kernel_rem_pio2+0x8e> - 8008e92: eca7 7b02 vstmia r7!, {d7} - 8008e96: 3201 adds r2, #1 - 8008e98: e7d4 b.n 8008e44 <__kernel_rem_pio2+0x54> - 8008e9a: ab06 add r3, sp, #24 - 8008e9c: eb03 0389 add.w r3, r3, r9, lsl #2 - 8008ea0: ed9f 9b9b vldr d9, [pc, #620] ; 8009110 <__kernel_rem_pio2+0x320> - 8008ea4: ed9f ab9c vldr d10, [pc, #624] ; 8009118 <__kernel_rem_pio2+0x328> - 8008ea8: 9304 str r3, [sp, #16] - 8008eaa: eb00 0381 add.w r3, r0, r1, lsl #2 - 8008eae: 9303 str r3, [sp, #12] - 8008eb0: 464d mov r5, r9 - 8008eb2: ab92 add r3, sp, #584 ; 0x248 - 8008eb4: f105 5700 add.w r7, r5, #536870912 ; 0x20000000 - 8008eb8: eb03 03c5 add.w r3, r3, r5, lsl #3 - 8008ebc: 3f01 subs r7, #1 - 8008ebe: ed13 0b28 vldr d0, [r3, #-160] ; 0xffffff60 - 8008ec2: 00ff lsls r7, r7, #3 - 8008ec4: ab92 add r3, sp, #584 ; 0x248 - 8008ec6: 19da adds r2, r3, r7 - 8008ec8: 3a98 subs r2, #152 ; 0x98 - 8008eca: 2300 movs r3, #0 - 8008ecc: 1ae9 subs r1, r5, r3 - 8008ece: 2900 cmp r1, #0 - 8008ed0: dc4e bgt.n 8008f70 <__kernel_rem_pio2+0x180> - 8008ed2: 4620 mov r0, r4 - 8008ed4: f000 fe2c bl 8009b30 - 8008ed8: eeb0 8b40 vmov.f64 d8, d0 - 8008edc: eeb4 0b00 vmov.f64 d0, #64 ; 0x3e000000 0.125 - 8008ee0: ee28 0b00 vmul.f64 d0, d8, d0 - 8008ee4: f000 fdac bl 8009a40 - 8008ee8: eeb2 7b00 vmov.f64 d7, #32 ; 0x41000000 8.0 - 8008eec: eea0 8b47 vfms.f64 d8, d0, d7 - 8008ef0: eefd 7bc8 vcvt.s32.f64 s15, d8 - 8008ef4: 2c00 cmp r4, #0 - 8008ef6: edcd 7a01 vstr s15, [sp, #4] - 8008efa: eeb8 7be7 vcvt.f64.s32 d7, s15 - 8008efe: ee38 8b47 vsub.f64 d8, d8, d7 - 8008f02: dd4a ble.n 8008f9a <__kernel_rem_pio2+0x1aa> - 8008f04: 1e69 subs r1, r5, #1 - 8008f06: ab06 add r3, sp, #24 - 8008f08: f1c4 0018 rsb r0, r4, #24 - 8008f0c: f853 c021 ldr.w ip, [r3, r1, lsl #2] - 8008f10: 9a01 ldr r2, [sp, #4] - 8008f12: fa4c f300 asr.w r3, ip, r0 - 8008f16: 441a add r2, r3 - 8008f18: 4083 lsls r3, r0 - 8008f1a: 9201 str r2, [sp, #4] - 8008f1c: ebac 0203 sub.w r2, ip, r3 - 8008f20: ab06 add r3, sp, #24 - 8008f22: f843 2021 str.w r2, [r3, r1, lsl #2] - 8008f26: f1c4 0317 rsb r3, r4, #23 - 8008f2a: fa42 f803 asr.w r8, r2, r3 - 8008f2e: f1b8 0f00 cmp.w r8, #0 - 8008f32: dd43 ble.n 8008fbc <__kernel_rem_pio2+0x1cc> - 8008f34: 9b01 ldr r3, [sp, #4] - 8008f36: 2000 movs r0, #0 - 8008f38: 3301 adds r3, #1 - 8008f3a: 9301 str r3, [sp, #4] - 8008f3c: 4601 mov r1, r0 - 8008f3e: f06f 4c7f mvn.w ip, #4278190080 ; 0xff000000 - 8008f42: 4285 cmp r5, r0 - 8008f44: dc6e bgt.n 8009024 <__kernel_rem_pio2+0x234> - 8008f46: 2c00 cmp r4, #0 - 8008f48: dd04 ble.n 8008f54 <__kernel_rem_pio2+0x164> - 8008f4a: 2c01 cmp r4, #1 - 8008f4c: d07f beq.n 800904e <__kernel_rem_pio2+0x25e> - 8008f4e: 2c02 cmp r4, #2 - 8008f50: f000 8087 beq.w 8009062 <__kernel_rem_pio2+0x272> - 8008f54: f1b8 0f02 cmp.w r8, #2 - 8008f58: d130 bne.n 8008fbc <__kernel_rem_pio2+0x1cc> - 8008f5a: eeb7 0b00 vmov.f64 d0, #112 ; 0x3f800000 1.0 - 8008f5e: ee30 8b48 vsub.f64 d8, d0, d8 - 8008f62: b359 cbz r1, 8008fbc <__kernel_rem_pio2+0x1cc> - 8008f64: 4620 mov r0, r4 - 8008f66: f000 fde3 bl 8009b30 - 8008f6a: ee38 8b40 vsub.f64 d8, d8, d0 - 8008f6e: e025 b.n 8008fbc <__kernel_rem_pio2+0x1cc> - 8008f70: ee20 7b09 vmul.f64 d7, d0, d9 - 8008f74: eebd 7bc7 vcvt.s32.f64 s14, d7 - 8008f78: a806 add r0, sp, #24 - 8008f7a: eeb8 7bc7 vcvt.f64.s32 d7, s14 - 8008f7e: eea7 0b4a vfms.f64 d0, d7, d10 - 8008f82: eebd 0bc0 vcvt.s32.f64 s0, d0 - 8008f86: ee10 1a10 vmov r1, s0 - 8008f8a: ed32 0b02 vldmdb r2!, {d0} - 8008f8e: f840 1023 str.w r1, [r0, r3, lsl #2] - 8008f92: ee37 0b00 vadd.f64 d0, d7, d0 - 8008f96: 3301 adds r3, #1 - 8008f98: e798 b.n 8008ecc <__kernel_rem_pio2+0xdc> - 8008f9a: d106 bne.n 8008faa <__kernel_rem_pio2+0x1ba> - 8008f9c: 1e6b subs r3, r5, #1 - 8008f9e: aa06 add r2, sp, #24 - 8008fa0: f852 2023 ldr.w r2, [r2, r3, lsl #2] - 8008fa4: ea4f 58e2 mov.w r8, r2, asr #23 - 8008fa8: e7c1 b.n 8008f2e <__kernel_rem_pio2+0x13e> - 8008faa: eeb6 7b00 vmov.f64 d7, #96 ; 0x3f000000 0.5 - 8008fae: eeb4 8bc7 vcmpe.f64 d8, d7 - 8008fb2: eef1 fa10 vmrs APSR_nzcv, fpscr - 8008fb6: da32 bge.n 800901e <__kernel_rem_pio2+0x22e> - 8008fb8: f04f 0800 mov.w r8, #0 - 8008fbc: eeb5 8b40 vcmp.f64 d8, #0.0 - 8008fc0: eef1 fa10 vmrs APSR_nzcv, fpscr - 8008fc4: f040 80b0 bne.w 8009128 <__kernel_rem_pio2+0x338> - 8008fc8: 1e6b subs r3, r5, #1 - 8008fca: 4618 mov r0, r3 - 8008fcc: 2200 movs r2, #0 - 8008fce: 4548 cmp r0, r9 - 8008fd0: da4e bge.n 8009070 <__kernel_rem_pio2+0x280> - 8008fd2: 2a00 cmp r2, #0 - 8008fd4: f000 8088 beq.w 80090e8 <__kernel_rem_pio2+0x2f8> - 8008fd8: aa06 add r2, sp, #24 - 8008fda: 3c18 subs r4, #24 - 8008fdc: f852 1023 ldr.w r1, [r2, r3, lsl #2] - 8008fe0: 2900 cmp r1, #0 - 8008fe2: f000 808e beq.w 8009102 <__kernel_rem_pio2+0x312> - 8008fe6: eeb7 0b00 vmov.f64 d0, #112 ; 0x3f800000 1.0 - 8008fea: 4620 mov r0, r4 - 8008fec: 9302 str r3, [sp, #8] - 8008fee: f000 fd9f bl 8009b30 - 8008ff2: 9b02 ldr r3, [sp, #8] - 8008ff4: aa6a add r2, sp, #424 ; 0x1a8 - 8008ff6: 00d9 lsls r1, r3, #3 - 8008ff8: ed9f 6b45 vldr d6, [pc, #276] ; 8009110 <__kernel_rem_pio2+0x320> - 8008ffc: 1850 adds r0, r2, r1 - 8008ffe: f100 0508 add.w r5, r0, #8 - 8009002: 461c mov r4, r3 - 8009004: 2c00 cmp r4, #0 - 8009006: f280 80bd bge.w 8009184 <__kernel_rem_pio2+0x394> - 800900a: 2500 movs r5, #0 - 800900c: 1b5c subs r4, r3, r5 - 800900e: 2c00 cmp r4, #0 - 8009010: f2c0 80dd blt.w 80091ce <__kernel_rem_pio2+0x3de> - 8009014: 4f43 ldr r7, [pc, #268] ; (8009124 <__kernel_rem_pio2+0x334>) - 8009016: ed9f 7b3c vldr d7, [pc, #240] ; 8009108 <__kernel_rem_pio2+0x318> - 800901a: 2400 movs r4, #0 - 800901c: e0cb b.n 80091b6 <__kernel_rem_pio2+0x3c6> - 800901e: f04f 0802 mov.w r8, #2 - 8009022: e787 b.n 8008f34 <__kernel_rem_pio2+0x144> - 8009024: ab06 add r3, sp, #24 - 8009026: f853 3020 ldr.w r3, [r3, r0, lsl #2] - 800902a: b949 cbnz r1, 8009040 <__kernel_rem_pio2+0x250> - 800902c: b12b cbz r3, 800903a <__kernel_rem_pio2+0x24a> - 800902e: aa06 add r2, sp, #24 - 8009030: f1c3 7380 rsb r3, r3, #16777216 ; 0x1000000 - 8009034: f842 3020 str.w r3, [r2, r0, lsl #2] - 8009038: 2301 movs r3, #1 - 800903a: 3001 adds r0, #1 - 800903c: 4619 mov r1, r3 - 800903e: e780 b.n 8008f42 <__kernel_rem_pio2+0x152> +080088b0 <__ieee754_rem_pio2>: + 80088b0: b570 push {r4, r5, r6, lr} + 80088b2: eeb0 7b40 vmov.f64 d7, d0 + 80088b6: ee17 5a90 vmov r5, s15 + 80088ba: 4b95 ldr r3, [pc, #596] ; (8008b10 <__ieee754_rem_pio2+0x260>) + 80088bc: f025 4600 bic.w r6, r5, #2147483648 ; 0x80000000 + 80088c0: 429e cmp r6, r3 + 80088c2: b088 sub sp, #32 + 80088c4: 4604 mov r4, r0 + 80088c6: dc07 bgt.n 80088d8 <__ieee754_rem_pio2+0x28> + 80088c8: 2200 movs r2, #0 + 80088ca: 2300 movs r3, #0 + 80088cc: ed84 0b00 vstr d0, [r4] + 80088d0: e9c0 2302 strd r2, r3, [r0, #8] + 80088d4: 2000 movs r0, #0 + 80088d6: e01b b.n 8008910 <__ieee754_rem_pio2+0x60> + 80088d8: 4b8e ldr r3, [pc, #568] ; (8008b14 <__ieee754_rem_pio2+0x264>) + 80088da: 429e cmp r6, r3 + 80088dc: dc3b bgt.n 8008956 <__ieee754_rem_pio2+0xa6> + 80088de: f5a3 231b sub.w r3, r3, #634880 ; 0x9b000 + 80088e2: 2d00 cmp r5, #0 + 80088e4: ed9f 6b7a vldr d6, [pc, #488] ; 8008ad0 <__ieee754_rem_pio2+0x220> + 80088e8: f5a3 63f0 sub.w r3, r3, #1920 ; 0x780 + 80088ec: dd19 ble.n 8008922 <__ieee754_rem_pio2+0x72> + 80088ee: ee30 7b46 vsub.f64 d7, d0, d6 + 80088f2: 429e cmp r6, r3 + 80088f4: d00e beq.n 8008914 <__ieee754_rem_pio2+0x64> + 80088f6: ed9f 6b78 vldr d6, [pc, #480] ; 8008ad8 <__ieee754_rem_pio2+0x228> + 80088fa: ee37 5b46 vsub.f64 d5, d7, d6 + 80088fe: ee37 7b45 vsub.f64 d7, d7, d5 + 8008902: ed84 5b00 vstr d5, [r4] + 8008906: ee37 7b46 vsub.f64 d7, d7, d6 + 800890a: ed84 7b02 vstr d7, [r4, #8] + 800890e: 2001 movs r0, #1 + 8008910: b008 add sp, #32 + 8008912: bd70 pop {r4, r5, r6, pc} + 8008914: ed9f 6b72 vldr d6, [pc, #456] ; 8008ae0 <__ieee754_rem_pio2+0x230> + 8008918: ee37 7b46 vsub.f64 d7, d7, d6 + 800891c: ed9f 6b72 vldr d6, [pc, #456] ; 8008ae8 <__ieee754_rem_pio2+0x238> + 8008920: e7eb b.n 80088fa <__ieee754_rem_pio2+0x4a> + 8008922: 429e cmp r6, r3 + 8008924: ee30 7b06 vadd.f64 d7, d0, d6 + 8008928: d00e beq.n 8008948 <__ieee754_rem_pio2+0x98> + 800892a: ed9f 6b6b vldr d6, [pc, #428] ; 8008ad8 <__ieee754_rem_pio2+0x228> + 800892e: ee37 5b06 vadd.f64 d5, d7, d6 + 8008932: ee37 7b45 vsub.f64 d7, d7, d5 + 8008936: ed84 5b00 vstr d5, [r4] + 800893a: ee37 7b06 vadd.f64 d7, d7, d6 + 800893e: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff + 8008942: ed84 7b02 vstr d7, [r4, #8] + 8008946: e7e3 b.n 8008910 <__ieee754_rem_pio2+0x60> + 8008948: ed9f 6b65 vldr d6, [pc, #404] ; 8008ae0 <__ieee754_rem_pio2+0x230> + 800894c: ee37 7b06 vadd.f64 d7, d7, d6 + 8008950: ed9f 6b65 vldr d6, [pc, #404] ; 8008ae8 <__ieee754_rem_pio2+0x238> + 8008954: e7eb b.n 800892e <__ieee754_rem_pio2+0x7e> + 8008956: 4b70 ldr r3, [pc, #448] ; (8008b18 <__ieee754_rem_pio2+0x268>) + 8008958: 429e cmp r6, r3 + 800895a: dc6c bgt.n 8008a36 <__ieee754_rem_pio2+0x186> + 800895c: f001 f898 bl 8009a90 + 8008960: eeb6 7b00 vmov.f64 d7, #96 ; 0x3f000000 0.5 + 8008964: ed9f 6b62 vldr d6, [pc, #392] ; 8008af0 <__ieee754_rem_pio2+0x240> + 8008968: eea0 7b06 vfma.f64 d7, d0, d6 + 800896c: eefd 7bc7 vcvt.s32.f64 s15, d7 + 8008970: eeb8 4be7 vcvt.f64.s32 d4, s15 + 8008974: ee17 0a90 vmov r0, s15 + 8008978: eeb1 5b44 vneg.f64 d5, d4 + 800897c: ed9f 7b54 vldr d7, [pc, #336] ; 8008ad0 <__ieee754_rem_pio2+0x220> + 8008980: eea5 0b07 vfma.f64 d0, d5, d7 + 8008984: ed9f 7b54 vldr d7, [pc, #336] ; 8008ad8 <__ieee754_rem_pio2+0x228> + 8008988: 281f cmp r0, #31 + 800898a: ee24 7b07 vmul.f64 d7, d4, d7 + 800898e: ee30 6b47 vsub.f64 d6, d0, d7 + 8008992: dc08 bgt.n 80089a6 <__ieee754_rem_pio2+0xf6> + 8008994: 1e42 subs r2, r0, #1 + 8008996: 4b61 ldr r3, [pc, #388] ; (8008b1c <__ieee754_rem_pio2+0x26c>) + 8008998: f853 3022 ldr.w r3, [r3, r2, lsl #2] + 800899c: 42b3 cmp r3, r6 + 800899e: d002 beq.n 80089a6 <__ieee754_rem_pio2+0xf6> + 80089a0: ed84 6b00 vstr d6, [r4] + 80089a4: e022 b.n 80089ec <__ieee754_rem_pio2+0x13c> + 80089a6: ee16 3a90 vmov r3, s13 + 80089aa: 1536 asrs r6, r6, #20 + 80089ac: f3c3 530a ubfx r3, r3, #20, #11 + 80089b0: 1af3 subs r3, r6, r3 + 80089b2: 2b10 cmp r3, #16 + 80089b4: ddf4 ble.n 80089a0 <__ieee754_rem_pio2+0xf0> + 80089b6: eeb0 6b40 vmov.f64 d6, d0 + 80089ba: ed9f 3b49 vldr d3, [pc, #292] ; 8008ae0 <__ieee754_rem_pio2+0x230> + 80089be: eea5 6b03 vfma.f64 d6, d5, d3 + 80089c2: ee30 7b46 vsub.f64 d7, d0, d6 + 80089c6: eea5 7b03 vfma.f64 d7, d5, d3 + 80089ca: ed9f 3b47 vldr d3, [pc, #284] ; 8008ae8 <__ieee754_rem_pio2+0x238> + 80089ce: ee94 7b03 vfnms.f64 d7, d4, d3 + 80089d2: ee36 3b47 vsub.f64 d3, d6, d7 + 80089d6: ee13 3a90 vmov r3, s7 + 80089da: f3c3 530a ubfx r3, r3, #20, #11 + 80089de: 1af6 subs r6, r6, r3 + 80089e0: 2e31 cmp r6, #49 ; 0x31 + 80089e2: dc17 bgt.n 8008a14 <__ieee754_rem_pio2+0x164> + 80089e4: eeb0 0b46 vmov.f64 d0, d6 + 80089e8: ed84 3b00 vstr d3, [r4] + 80089ec: ed94 6b00 vldr d6, [r4] + 80089f0: 2d00 cmp r5, #0 + 80089f2: ee30 0b46 vsub.f64 d0, d0, d6 + 80089f6: ee30 7b47 vsub.f64 d7, d0, d7 + 80089fa: ed84 7b02 vstr d7, [r4, #8] + 80089fe: da87 bge.n 8008910 <__ieee754_rem_pio2+0x60> + 8008a00: eeb1 6b46 vneg.f64 d6, d6 + 8008a04: ed84 6b00 vstr d6, [r4] + 8008a08: eeb1 7b47 vneg.f64 d7, d7 + 8008a0c: 4240 negs r0, r0 + 8008a0e: ed84 7b02 vstr d7, [r4, #8] + 8008a12: e77d b.n 8008910 <__ieee754_rem_pio2+0x60> + 8008a14: ed9f 3b38 vldr d3, [pc, #224] ; 8008af8 <__ieee754_rem_pio2+0x248> + 8008a18: eeb0 0b46 vmov.f64 d0, d6 + 8008a1c: eea5 0b03 vfma.f64 d0, d5, d3 + 8008a20: ee36 7b40 vsub.f64 d7, d6, d0 + 8008a24: ed9f 6b36 vldr d6, [pc, #216] ; 8008b00 <__ieee754_rem_pio2+0x250> + 8008a28: eea5 7b03 vfma.f64 d7, d5, d3 + 8008a2c: ee94 7b06 vfnms.f64 d7, d4, d6 + 8008a30: ee30 6b47 vsub.f64 d6, d0, d7 + 8008a34: e7b4 b.n 80089a0 <__ieee754_rem_pio2+0xf0> + 8008a36: 4b3a ldr r3, [pc, #232] ; (8008b20 <__ieee754_rem_pio2+0x270>) + 8008a38: 429e cmp r6, r3 + 8008a3a: dd06 ble.n 8008a4a <__ieee754_rem_pio2+0x19a> + 8008a3c: ee30 7b40 vsub.f64 d7, d0, d0 + 8008a40: ed80 7b02 vstr d7, [r0, #8] + 8008a44: ed80 7b00 vstr d7, [r0] + 8008a48: e744 b.n 80088d4 <__ieee754_rem_pio2+0x24> + 8008a4a: 1532 asrs r2, r6, #20 + 8008a4c: f2a2 4216 subw r2, r2, #1046 ; 0x416 + 8008a50: ee10 0a10 vmov r0, s0 + 8008a54: eba6 5102 sub.w r1, r6, r2, lsl #20 + 8008a58: ec41 0b17 vmov d7, r0, r1 + 8008a5c: eebd 6bc7 vcvt.s32.f64 s12, d7 + 8008a60: ed9f 5b29 vldr d5, [pc, #164] ; 8008b08 <__ieee754_rem_pio2+0x258> + 8008a64: eeb8 6bc6 vcvt.f64.s32 d6, s12 + 8008a68: ee37 7b46 vsub.f64 d7, d7, d6 + 8008a6c: ed8d 6b02 vstr d6, [sp, #8] + 8008a70: ee27 7b05 vmul.f64 d7, d7, d5 + 8008a74: eebd 6bc7 vcvt.s32.f64 s12, d7 + 8008a78: a908 add r1, sp, #32 + 8008a7a: eeb8 6bc6 vcvt.f64.s32 d6, s12 + 8008a7e: ee37 7b46 vsub.f64 d7, d7, d6 + 8008a82: ed8d 6b04 vstr d6, [sp, #16] + 8008a86: ee27 7b05 vmul.f64 d7, d7, d5 + 8008a8a: ed8d 7b06 vstr d7, [sp, #24] + 8008a8e: 2303 movs r3, #3 + 8008a90: ed31 7b02 vldmdb r1!, {d7} + 8008a94: eeb5 7b40 vcmp.f64 d7, #0.0 + 8008a98: eef1 fa10 vmrs APSR_nzcv, fpscr + 8008a9c: f103 30ff add.w r0, r3, #4294967295 ; 0xffffffff + 8008aa0: d013 beq.n 8008aca <__ieee754_rem_pio2+0x21a> + 8008aa2: 4920 ldr r1, [pc, #128] ; (8008b24 <__ieee754_rem_pio2+0x274>) + 8008aa4: 9101 str r1, [sp, #4] + 8008aa6: 2102 movs r1, #2 + 8008aa8: 9100 str r1, [sp, #0] + 8008aaa: a802 add r0, sp, #8 + 8008aac: 4621 mov r1, r4 + 8008aae: f000 f9d3 bl 8008e58 <__kernel_rem_pio2> + 8008ab2: 2d00 cmp r5, #0 + 8008ab4: f6bf af2c bge.w 8008910 <__ieee754_rem_pio2+0x60> + 8008ab8: ed94 7b00 vldr d7, [r4] + 8008abc: eeb1 7b47 vneg.f64 d7, d7 + 8008ac0: ed84 7b00 vstr d7, [r4] + 8008ac4: ed94 7b02 vldr d7, [r4, #8] + 8008ac8: e79e b.n 8008a08 <__ieee754_rem_pio2+0x158> + 8008aca: 4603 mov r3, r0 + 8008acc: e7e0 b.n 8008a90 <__ieee754_rem_pio2+0x1e0> + 8008ace: bf00 nop + 8008ad0: 54400000 .word 0x54400000 + 8008ad4: 3ff921fb .word 0x3ff921fb + 8008ad8: 1a626331 .word 0x1a626331 + 8008adc: 3dd0b461 .word 0x3dd0b461 + 8008ae0: 1a600000 .word 0x1a600000 + 8008ae4: 3dd0b461 .word 0x3dd0b461 + 8008ae8: 2e037073 .word 0x2e037073 + 8008aec: 3ba3198a .word 0x3ba3198a + 8008af0: 6dc9c883 .word 0x6dc9c883 + 8008af4: 3fe45f30 .word 0x3fe45f30 + 8008af8: 2e000000 .word 0x2e000000 + 8008afc: 3ba3198a .word 0x3ba3198a + 8008b00: 252049c1 .word 0x252049c1 + 8008b04: 397b839a .word 0x397b839a + 8008b08: 00000000 .word 0x00000000 + 8008b0c: 41700000 .word 0x41700000 + 8008b10: 3fe921fb .word 0x3fe921fb + 8008b14: 4002d97b .word 0x4002d97b + 8008b18: 413921fb .word 0x413921fb + 8008b1c: 0800a648 .word 0x0800a648 + 8008b20: 7fefffff .word 0x7fefffff + 8008b24: 0800a6c8 .word 0x0800a6c8 + +08008b28 <__ieee754_rem_pio2f>: + 8008b28: b5f0 push {r4, r5, r6, r7, lr} + 8008b2a: ee10 6a10 vmov r6, s0 + 8008b2e: 4b86 ldr r3, [pc, #536] ; (8008d48 <__ieee754_rem_pio2f+0x220>) + 8008b30: f026 4400 bic.w r4, r6, #2147483648 ; 0x80000000 + 8008b34: 429c cmp r4, r3 + 8008b36: b087 sub sp, #28 + 8008b38: 4605 mov r5, r0 + 8008b3a: dc05 bgt.n 8008b48 <__ieee754_rem_pio2f+0x20> + 8008b3c: 2300 movs r3, #0 + 8008b3e: ed85 0a00 vstr s0, [r5] + 8008b42: 6043 str r3, [r0, #4] + 8008b44: 2000 movs r0, #0 + 8008b46: e020 b.n 8008b8a <__ieee754_rem_pio2f+0x62> + 8008b48: 4b80 ldr r3, [pc, #512] ; (8008d4c <__ieee754_rem_pio2f+0x224>) + 8008b4a: 429c cmp r4, r3 + 8008b4c: dc38 bgt.n 8008bc0 <__ieee754_rem_pio2f+0x98> + 8008b4e: 2e00 cmp r6, #0 + 8008b50: f024 040f bic.w r4, r4, #15 + 8008b54: ed9f 7a7e vldr s14, [pc, #504] ; 8008d50 <__ieee754_rem_pio2f+0x228> + 8008b58: 4b7e ldr r3, [pc, #504] ; (8008d54 <__ieee754_rem_pio2f+0x22c>) + 8008b5a: dd18 ble.n 8008b8e <__ieee754_rem_pio2f+0x66> + 8008b5c: 429c cmp r4, r3 + 8008b5e: ee70 7a47 vsub.f32 s15, s0, s14 + 8008b62: bf09 itett eq + 8008b64: ed9f 7a7c vldreq s14, [pc, #496] ; 8008d58 <__ieee754_rem_pio2f+0x230> + 8008b68: ed9f 7a7c vldrne s14, [pc, #496] ; 8008d5c <__ieee754_rem_pio2f+0x234> + 8008b6c: ee77 7ac7 vsubeq.f32 s15, s15, s14 + 8008b70: ed9f 7a7b vldreq s14, [pc, #492] ; 8008d60 <__ieee754_rem_pio2f+0x238> + 8008b74: ee77 6ac7 vsub.f32 s13, s15, s14 + 8008b78: ee77 7ae6 vsub.f32 s15, s15, s13 + 8008b7c: edc0 6a00 vstr s13, [r0] + 8008b80: ee77 7ac7 vsub.f32 s15, s15, s14 + 8008b84: edc0 7a01 vstr s15, [r0, #4] + 8008b88: 2001 movs r0, #1 + 8008b8a: b007 add sp, #28 + 8008b8c: bdf0 pop {r4, r5, r6, r7, pc} + 8008b8e: 429c cmp r4, r3 + 8008b90: ee70 7a07 vadd.f32 s15, s0, s14 + 8008b94: bf09 itett eq + 8008b96: ed9f 7a70 vldreq s14, [pc, #448] ; 8008d58 <__ieee754_rem_pio2f+0x230> + 8008b9a: ed9f 7a70 vldrne s14, [pc, #448] ; 8008d5c <__ieee754_rem_pio2f+0x234> + 8008b9e: ee77 7a87 vaddeq.f32 s15, s15, s14 + 8008ba2: ed9f 7a6f vldreq s14, [pc, #444] ; 8008d60 <__ieee754_rem_pio2f+0x238> + 8008ba6: ee77 6a87 vadd.f32 s13, s15, s14 + 8008baa: ee77 7ae6 vsub.f32 s15, s15, s13 + 8008bae: edc0 6a00 vstr s13, [r0] + 8008bb2: ee77 7a87 vadd.f32 s15, s15, s14 + 8008bb6: edc0 7a01 vstr s15, [r0, #4] + 8008bba: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff + 8008bbe: e7e4 b.n 8008b8a <__ieee754_rem_pio2f+0x62> + 8008bc0: 4b68 ldr r3, [pc, #416] ; (8008d64 <__ieee754_rem_pio2f+0x23c>) + 8008bc2: 429c cmp r4, r3 + 8008bc4: dc71 bgt.n 8008caa <__ieee754_rem_pio2f+0x182> + 8008bc6: f001 f865 bl 8009c94 + 8008bca: ed9f 7a67 vldr s14, [pc, #412] ; 8008d68 <__ieee754_rem_pio2f+0x240> + 8008bce: eef6 7a00 vmov.f32 s15, #96 ; 0x3f000000 0.5 + 8008bd2: eee0 7a07 vfma.f32 s15, s0, s14 + 8008bd6: eefd 7ae7 vcvt.s32.f32 s15, s15 + 8008bda: eeb8 6ae7 vcvt.f32.s32 s12, s15 + 8008bde: ee17 0a90 vmov r0, s15 + 8008be2: eddf 7a5b vldr s15, [pc, #364] ; 8008d50 <__ieee754_rem_pio2f+0x228> + 8008be6: eeb1 7a46 vneg.f32 s14, s12 + 8008bea: eea7 0a27 vfma.f32 s0, s14, s15 + 8008bee: 281f cmp r0, #31 + 8008bf0: eddf 7a5a vldr s15, [pc, #360] ; 8008d5c <__ieee754_rem_pio2f+0x234> + 8008bf4: ee66 7a27 vmul.f32 s15, s12, s15 + 8008bf8: ee70 6a67 vsub.f32 s13, s0, s15 + 8008bfc: ee16 3a90 vmov r3, s13 + 8008c00: dc1c bgt.n 8008c3c <__ieee754_rem_pio2f+0x114> + 8008c02: 1e47 subs r7, r0, #1 + 8008c04: 4959 ldr r1, [pc, #356] ; (8008d6c <__ieee754_rem_pio2f+0x244>) + 8008c06: f851 1027 ldr.w r1, [r1, r7, lsl #2] + 8008c0a: f024 02ff bic.w r2, r4, #255 ; 0xff + 8008c0e: 428a cmp r2, r1 + 8008c10: d014 beq.n 8008c3c <__ieee754_rem_pio2f+0x114> + 8008c12: 602b str r3, [r5, #0] + 8008c14: ed95 7a00 vldr s14, [r5] + 8008c18: ee30 0a47 vsub.f32 s0, s0, s14 + 8008c1c: 2e00 cmp r6, #0 + 8008c1e: ee30 0a67 vsub.f32 s0, s0, s15 + 8008c22: ed85 0a01 vstr s0, [r5, #4] + 8008c26: dab0 bge.n 8008b8a <__ieee754_rem_pio2f+0x62> + 8008c28: eeb1 7a47 vneg.f32 s14, s14 + 8008c2c: eeb1 0a40 vneg.f32 s0, s0 + 8008c30: ed85 7a00 vstr s14, [r5] + 8008c34: ed85 0a01 vstr s0, [r5, #4] + 8008c38: 4240 negs r0, r0 + 8008c3a: e7a6 b.n 8008b8a <__ieee754_rem_pio2f+0x62> + 8008c3c: 15e4 asrs r4, r4, #23 + 8008c3e: f3c3 52c7 ubfx r2, r3, #23, #8 + 8008c42: 1aa2 subs r2, r4, r2 + 8008c44: 2a08 cmp r2, #8 + 8008c46: dde4 ble.n 8008c12 <__ieee754_rem_pio2f+0xea> + 8008c48: eddf 7a43 vldr s15, [pc, #268] ; 8008d58 <__ieee754_rem_pio2f+0x230> + 8008c4c: eef0 6a40 vmov.f32 s13, s0 + 8008c50: eee7 6a27 vfma.f32 s13, s14, s15 + 8008c54: ee30 0a66 vsub.f32 s0, s0, s13 + 8008c58: eea7 0a27 vfma.f32 s0, s14, s15 + 8008c5c: eddf 7a40 vldr s15, [pc, #256] ; 8008d60 <__ieee754_rem_pio2f+0x238> + 8008c60: ee96 0a27 vfnms.f32 s0, s12, s15 + 8008c64: ee76 5ac0 vsub.f32 s11, s13, s0 + 8008c68: eef0 7a40 vmov.f32 s15, s0 + 8008c6c: ee15 3a90 vmov r3, s11 + 8008c70: f3c3 52c7 ubfx r2, r3, #23, #8 + 8008c74: 1aa4 subs r4, r4, r2 + 8008c76: 2c19 cmp r4, #25 + 8008c78: dc04 bgt.n 8008c84 <__ieee754_rem_pio2f+0x15c> + 8008c7a: edc5 5a00 vstr s11, [r5] + 8008c7e: eeb0 0a66 vmov.f32 s0, s13 + 8008c82: e7c7 b.n 8008c14 <__ieee754_rem_pio2f+0xec> + 8008c84: eddf 5a3a vldr s11, [pc, #232] ; 8008d70 <__ieee754_rem_pio2f+0x248> + 8008c88: eeb0 0a66 vmov.f32 s0, s13 + 8008c8c: eea7 0a25 vfma.f32 s0, s14, s11 + 8008c90: ee76 7ac0 vsub.f32 s15, s13, s0 + 8008c94: eee7 7a25 vfma.f32 s15, s14, s11 + 8008c98: ed9f 7a36 vldr s14, [pc, #216] ; 8008d74 <__ieee754_rem_pio2f+0x24c> + 8008c9c: eed6 7a07 vfnms.f32 s15, s12, s14 + 8008ca0: ee30 7a67 vsub.f32 s14, s0, s15 + 8008ca4: ed85 7a00 vstr s14, [r5] + 8008ca8: e7b4 b.n 8008c14 <__ieee754_rem_pio2f+0xec> + 8008caa: f1b4 4fff cmp.w r4, #2139095040 ; 0x7f800000 + 8008cae: db06 blt.n 8008cbe <__ieee754_rem_pio2f+0x196> + 8008cb0: ee70 7a40 vsub.f32 s15, s0, s0 + 8008cb4: edc0 7a01 vstr s15, [r0, #4] + 8008cb8: edc0 7a00 vstr s15, [r0] + 8008cbc: e742 b.n 8008b44 <__ieee754_rem_pio2f+0x1c> + 8008cbe: 15e2 asrs r2, r4, #23 + 8008cc0: 3a86 subs r2, #134 ; 0x86 + 8008cc2: eba4 53c2 sub.w r3, r4, r2, lsl #23 + 8008cc6: ee07 3a90 vmov s15, r3 + 8008cca: eebd 7ae7 vcvt.s32.f32 s14, s15 + 8008cce: eddf 6a2a vldr s13, [pc, #168] ; 8008d78 <__ieee754_rem_pio2f+0x250> + 8008cd2: eeb8 7ac7 vcvt.f32.s32 s14, s14 + 8008cd6: ee77 7ac7 vsub.f32 s15, s15, s14 + 8008cda: ed8d 7a03 vstr s14, [sp, #12] + 8008cde: ee67 7aa6 vmul.f32 s15, s15, s13 + 8008ce2: eebd 7ae7 vcvt.s32.f32 s14, s15 + 8008ce6: eeb8 7ac7 vcvt.f32.s32 s14, s14 + 8008cea: ee77 7ac7 vsub.f32 s15, s15, s14 + 8008cee: ed8d 7a04 vstr s14, [sp, #16] + 8008cf2: ee67 7aa6 vmul.f32 s15, s15, s13 + 8008cf6: eef5 7a40 vcmp.f32 s15, #0.0 + 8008cfa: eef1 fa10 vmrs APSR_nzcv, fpscr + 8008cfe: edcd 7a05 vstr s15, [sp, #20] + 8008d02: d11e bne.n 8008d42 <__ieee754_rem_pio2f+0x21a> + 8008d04: eeb5 7a40 vcmp.f32 s14, #0.0 + 8008d08: eef1 fa10 vmrs APSR_nzcv, fpscr + 8008d0c: bf0c ite eq + 8008d0e: 2301 moveq r3, #1 + 8008d10: 2302 movne r3, #2 + 8008d12: 491a ldr r1, [pc, #104] ; (8008d7c <__ieee754_rem_pio2f+0x254>) + 8008d14: 9101 str r1, [sp, #4] + 8008d16: 2102 movs r1, #2 + 8008d18: 9100 str r1, [sp, #0] + 8008d1a: a803 add r0, sp, #12 + 8008d1c: 4629 mov r1, r5 + 8008d1e: f000 fbed bl 80094fc <__kernel_rem_pio2f> + 8008d22: 2e00 cmp r6, #0 + 8008d24: f6bf af31 bge.w 8008b8a <__ieee754_rem_pio2f+0x62> + 8008d28: edd5 7a00 vldr s15, [r5] + 8008d2c: eef1 7a67 vneg.f32 s15, s15 + 8008d30: edc5 7a00 vstr s15, [r5] + 8008d34: edd5 7a01 vldr s15, [r5, #4] + 8008d38: eef1 7a67 vneg.f32 s15, s15 + 8008d3c: edc5 7a01 vstr s15, [r5, #4] + 8008d40: e77a b.n 8008c38 <__ieee754_rem_pio2f+0x110> + 8008d42: 2303 movs r3, #3 + 8008d44: e7e5 b.n 8008d12 <__ieee754_rem_pio2f+0x1ea> + 8008d46: bf00 nop + 8008d48: 3f490fd8 .word 0x3f490fd8 + 8008d4c: 4016cbe3 .word 0x4016cbe3 + 8008d50: 3fc90f80 .word 0x3fc90f80 + 8008d54: 3fc90fd0 .word 0x3fc90fd0 + 8008d58: 37354400 .word 0x37354400 + 8008d5c: 37354443 .word 0x37354443 + 8008d60: 2e85a308 .word 0x2e85a308 + 8008d64: 43490f80 .word 0x43490f80 + 8008d68: 3f22f984 .word 0x3f22f984 + 8008d6c: 0800a7d0 .word 0x0800a7d0 + 8008d70: 2e85a300 .word 0x2e85a300 + 8008d74: 248d3132 .word 0x248d3132 + 8008d78: 43800000 .word 0x43800000 + 8008d7c: 0800a850 .word 0x0800a850 + +08008d80 <__kernel_cos>: + 8008d80: ee10 1a90 vmov r1, s1 + 8008d84: eeb7 7b00 vmov.f64 d7, #112 ; 0x3f800000 1.0 + 8008d88: f021 4100 bic.w r1, r1, #2147483648 ; 0x80000000 + 8008d8c: f1b1 5f79 cmp.w r1, #1044381696 ; 0x3e400000 + 8008d90: da05 bge.n 8008d9e <__kernel_cos+0x1e> + 8008d92: eefd 6bc0 vcvt.s32.f64 s13, d0 + 8008d96: ee16 3a90 vmov r3, s13 + 8008d9a: 2b00 cmp r3, #0 + 8008d9c: d03d beq.n 8008e1a <__kernel_cos+0x9a> + 8008d9e: ee20 4b00 vmul.f64 d4, d0, d0 + 8008da2: eeb6 6b00 vmov.f64 d6, #96 ; 0x3f000000 0.5 + 8008da6: ed9f 3b1e vldr d3, [pc, #120] ; 8008e20 <__kernel_cos+0xa0> + 8008daa: ee21 1b40 vnmul.f64 d1, d1, d0 + 8008dae: ee24 6b06 vmul.f64 d6, d4, d6 + 8008db2: ed9f 5b1d vldr d5, [pc, #116] ; 8008e28 <__kernel_cos+0xa8> + 8008db6: eea4 5b03 vfma.f64 d5, d4, d3 + 8008dba: ed9f 3b1d vldr d3, [pc, #116] ; 8008e30 <__kernel_cos+0xb0> + 8008dbe: eea5 3b04 vfma.f64 d3, d5, d4 + 8008dc2: ed9f 5b1d vldr d5, [pc, #116] ; 8008e38 <__kernel_cos+0xb8> + 8008dc6: eea3 5b04 vfma.f64 d5, d3, d4 + 8008dca: ed9f 3b1d vldr d3, [pc, #116] ; 8008e40 <__kernel_cos+0xc0> + 8008dce: 4b20 ldr r3, [pc, #128] ; (8008e50 <__kernel_cos+0xd0>) + 8008dd0: eea5 3b04 vfma.f64 d3, d5, d4 + 8008dd4: ed9f 5b1c vldr d5, [pc, #112] ; 8008e48 <__kernel_cos+0xc8> + 8008dd8: 4299 cmp r1, r3 + 8008dda: eea3 5b04 vfma.f64 d5, d3, d4 + 8008dde: ee25 5b04 vmul.f64 d5, d5, d4 + 8008de2: eea4 1b05 vfma.f64 d1, d4, d5 + 8008de6: dc04 bgt.n 8008df2 <__kernel_cos+0x72> + 8008de8: ee36 6b41 vsub.f64 d6, d6, d1 + 8008dec: ee37 0b46 vsub.f64 d0, d7, d6 + 8008df0: 4770 bx lr + 8008df2: 4b18 ldr r3, [pc, #96] ; (8008e54 <__kernel_cos+0xd4>) + 8008df4: 4299 cmp r1, r3 + 8008df6: dc0d bgt.n 8008e14 <__kernel_cos+0x94> + 8008df8: 2200 movs r2, #0 + 8008dfa: f5a1 1300 sub.w r3, r1, #2097152 ; 0x200000 + 8008dfe: ec43 2b15 vmov d5, r2, r3 + 8008e02: ee37 0b45 vsub.f64 d0, d7, d5 + 8008e06: ee36 6b45 vsub.f64 d6, d6, d5 + 8008e0a: ee36 6b41 vsub.f64 d6, d6, d1 + 8008e0e: ee30 0b46 vsub.f64 d0, d0, d6 + 8008e12: 4770 bx lr + 8008e14: eeb5 5b02 vmov.f64 d5, #82 ; 0x3e900000 0.2812500 + 8008e18: e7f3 b.n 8008e02 <__kernel_cos+0x82> + 8008e1a: eeb0 0b47 vmov.f64 d0, d7 + 8008e1e: 4770 bx lr + 8008e20: be8838d4 .word 0xbe8838d4 + 8008e24: bda8fae9 .word 0xbda8fae9 + 8008e28: bdb4b1c4 .word 0xbdb4b1c4 + 8008e2c: 3e21ee9e .word 0x3e21ee9e + 8008e30: 809c52ad .word 0x809c52ad + 8008e34: be927e4f .word 0xbe927e4f + 8008e38: 19cb1590 .word 0x19cb1590 + 8008e3c: 3efa01a0 .word 0x3efa01a0 + 8008e40: 16c15177 .word 0x16c15177 + 8008e44: bf56c16c .word 0xbf56c16c + 8008e48: 5555554c .word 0x5555554c + 8008e4c: 3fa55555 .word 0x3fa55555 + 8008e50: 3fd33332 .word 0x3fd33332 + 8008e54: 3fe90000 .word 0x3fe90000 + +08008e58 <__kernel_rem_pio2>: + 8008e58: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} + 8008e5c: ed2d 8b06 vpush {d8-d10} + 8008e60: f5ad 7d13 sub.w sp, sp, #588 ; 0x24c + 8008e64: 469b mov fp, r3 + 8008e66: 460e mov r6, r1 + 8008e68: 4bc7 ldr r3, [pc, #796] ; (8009188 <__kernel_rem_pio2+0x330>) + 8008e6a: 99a2 ldr r1, [sp, #648] ; 0x288 + 8008e6c: 9002 str r0, [sp, #8] + 8008e6e: f853 9021 ldr.w r9, [r3, r1, lsl #2] + 8008e72: 98a3 ldr r0, [sp, #652] ; 0x28c + 8008e74: 1ed1 subs r1, r2, #3 + 8008e76: 2318 movs r3, #24 + 8008e78: f06f 0417 mvn.w r4, #23 + 8008e7c: fb91 f1f3 sdiv r1, r1, r3 + 8008e80: ea21 71e1 bic.w r1, r1, r1, asr #31 + 8008e84: f10b 3aff add.w sl, fp, #4294967295 ; 0xffffffff + 8008e88: fb01 4404 mla r4, r1, r4, r4 + 8008e8c: ed9f 6bb8 vldr d6, [pc, #736] ; 8009170 <__kernel_rem_pio2+0x318> + 8008e90: 4414 add r4, r2 + 8008e92: eba1 050a sub.w r5, r1, sl + 8008e96: aa1a add r2, sp, #104 ; 0x68 + 8008e98: eb09 070a add.w r7, r9, sl + 8008e9c: eb00 0c85 add.w ip, r0, r5, lsl #2 + 8008ea0: 4696 mov lr, r2 + 8008ea2: 2300 movs r3, #0 + 8008ea4: 42bb cmp r3, r7 + 8008ea6: dd0f ble.n 8008ec8 <__kernel_rem_pio2+0x70> + 8008ea8: af6a add r7, sp, #424 ; 0x1a8 + 8008eaa: 2200 movs r2, #0 + 8008eac: 454a cmp r2, r9 + 8008eae: dc28 bgt.n 8008f02 <__kernel_rem_pio2+0xaa> + 8008eb0: f10d 0c68 add.w ip, sp, #104 ; 0x68 + 8008eb4: eb0b 0302 add.w r3, fp, r2 + 8008eb8: eb0c 03c3 add.w r3, ip, r3, lsl #3 + 8008ebc: 9d02 ldr r5, [sp, #8] + 8008ebe: ed9f 7bac vldr d7, [pc, #688] ; 8009170 <__kernel_rem_pio2+0x318> + 8008ec2: f04f 0c00 mov.w ip, #0 + 8008ec6: e016 b.n 8008ef6 <__kernel_rem_pio2+0x9e> + 8008ec8: 42dd cmn r5, r3 + 8008eca: d409 bmi.n 8008ee0 <__kernel_rem_pio2+0x88> + 8008ecc: f85c 2023 ldr.w r2, [ip, r3, lsl #2] + 8008ed0: ee07 2a90 vmov s15, r2 + 8008ed4: eeb8 7be7 vcvt.f64.s32 d7, s15 + 8008ed8: ecae 7b02 vstmia lr!, {d7} + 8008edc: 3301 adds r3, #1 + 8008ede: e7e1 b.n 8008ea4 <__kernel_rem_pio2+0x4c> + 8008ee0: eeb0 7b46 vmov.f64 d7, d6 + 8008ee4: e7f8 b.n 8008ed8 <__kernel_rem_pio2+0x80> + 8008ee6: ecb5 5b02 vldmia r5!, {d5} + 8008eea: ed33 6b02 vldmdb r3!, {d6} + 8008eee: f10c 0c01 add.w ip, ip, #1 + 8008ef2: eea5 7b06 vfma.f64 d7, d5, d6 + 8008ef6: 45d4 cmp ip, sl + 8008ef8: ddf5 ble.n 8008ee6 <__kernel_rem_pio2+0x8e> + 8008efa: eca7 7b02 vstmia r7!, {d7} + 8008efe: 3201 adds r2, #1 + 8008f00: e7d4 b.n 8008eac <__kernel_rem_pio2+0x54> + 8008f02: ab06 add r3, sp, #24 + 8008f04: eb03 0389 add.w r3, r3, r9, lsl #2 + 8008f08: ed9f 9b9b vldr d9, [pc, #620] ; 8009178 <__kernel_rem_pio2+0x320> + 8008f0c: ed9f ab9c vldr d10, [pc, #624] ; 8009180 <__kernel_rem_pio2+0x328> + 8008f10: 9304 str r3, [sp, #16] + 8008f12: eb00 0381 add.w r3, r0, r1, lsl #2 + 8008f16: 9303 str r3, [sp, #12] + 8008f18: 464d mov r5, r9 + 8008f1a: ab92 add r3, sp, #584 ; 0x248 + 8008f1c: f105 5700 add.w r7, r5, #536870912 ; 0x20000000 + 8008f20: eb03 03c5 add.w r3, r3, r5, lsl #3 + 8008f24: 3f01 subs r7, #1 + 8008f26: ed13 0b28 vldr d0, [r3, #-160] ; 0xffffff60 + 8008f2a: 00ff lsls r7, r7, #3 + 8008f2c: ab92 add r3, sp, #584 ; 0x248 + 8008f2e: 19da adds r2, r3, r7 + 8008f30: 3a98 subs r2, #152 ; 0x98 + 8008f32: 2300 movs r3, #0 + 8008f34: 1ae9 subs r1, r5, r3 + 8008f36: 2900 cmp r1, #0 + 8008f38: dc4e bgt.n 8008fd8 <__kernel_rem_pio2+0x180> + 8008f3a: 4620 mov r0, r4 + 8008f3c: f000 fe2c bl 8009b98 + 8008f40: eeb0 8b40 vmov.f64 d8, d0 + 8008f44: eeb4 0b00 vmov.f64 d0, #64 ; 0x3e000000 0.125 + 8008f48: ee28 0b00 vmul.f64 d0, d8, d0 + 8008f4c: f000 fdac bl 8009aa8 + 8008f50: eeb2 7b00 vmov.f64 d7, #32 ; 0x41000000 8.0 + 8008f54: eea0 8b47 vfms.f64 d8, d0, d7 + 8008f58: eefd 7bc8 vcvt.s32.f64 s15, d8 + 8008f5c: 2c00 cmp r4, #0 + 8008f5e: edcd 7a01 vstr s15, [sp, #4] + 8008f62: eeb8 7be7 vcvt.f64.s32 d7, s15 + 8008f66: ee38 8b47 vsub.f64 d8, d8, d7 + 8008f6a: dd4a ble.n 8009002 <__kernel_rem_pio2+0x1aa> + 8008f6c: 1e69 subs r1, r5, #1 + 8008f6e: ab06 add r3, sp, #24 + 8008f70: f1c4 0018 rsb r0, r4, #24 + 8008f74: f853 c021 ldr.w ip, [r3, r1, lsl #2] + 8008f78: 9a01 ldr r2, [sp, #4] + 8008f7a: fa4c f300 asr.w r3, ip, r0 + 8008f7e: 441a add r2, r3 + 8008f80: 4083 lsls r3, r0 + 8008f82: 9201 str r2, [sp, #4] + 8008f84: ebac 0203 sub.w r2, ip, r3 + 8008f88: ab06 add r3, sp, #24 + 8008f8a: f843 2021 str.w r2, [r3, r1, lsl #2] + 8008f8e: f1c4 0317 rsb r3, r4, #23 + 8008f92: fa42 f803 asr.w r8, r2, r3 + 8008f96: f1b8 0f00 cmp.w r8, #0 + 8008f9a: dd43 ble.n 8009024 <__kernel_rem_pio2+0x1cc> + 8008f9c: 9b01 ldr r3, [sp, #4] + 8008f9e: 2000 movs r0, #0 + 8008fa0: 3301 adds r3, #1 + 8008fa2: 9301 str r3, [sp, #4] + 8008fa4: 4601 mov r1, r0 + 8008fa6: f06f 4c7f mvn.w ip, #4278190080 ; 0xff000000 + 8008faa: 4285 cmp r5, r0 + 8008fac: dc6e bgt.n 800908c <__kernel_rem_pio2+0x234> + 8008fae: 2c00 cmp r4, #0 + 8008fb0: dd04 ble.n 8008fbc <__kernel_rem_pio2+0x164> + 8008fb2: 2c01 cmp r4, #1 + 8008fb4: d07f beq.n 80090b6 <__kernel_rem_pio2+0x25e> + 8008fb6: 2c02 cmp r4, #2 + 8008fb8: f000 8087 beq.w 80090ca <__kernel_rem_pio2+0x272> + 8008fbc: f1b8 0f02 cmp.w r8, #2 + 8008fc0: d130 bne.n 8009024 <__kernel_rem_pio2+0x1cc> + 8008fc2: eeb7 0b00 vmov.f64 d0, #112 ; 0x3f800000 1.0 + 8008fc6: ee30 8b48 vsub.f64 d8, d0, d8 + 8008fca: b359 cbz r1, 8009024 <__kernel_rem_pio2+0x1cc> + 8008fcc: 4620 mov r0, r4 + 8008fce: f000 fde3 bl 8009b98 + 8008fd2: ee38 8b40 vsub.f64 d8, d8, d0 + 8008fd6: e025 b.n 8009024 <__kernel_rem_pio2+0x1cc> + 8008fd8: ee20 7b09 vmul.f64 d7, d0, d9 + 8008fdc: eebd 7bc7 vcvt.s32.f64 s14, d7 + 8008fe0: a806 add r0, sp, #24 + 8008fe2: eeb8 7bc7 vcvt.f64.s32 d7, s14 + 8008fe6: eea7 0b4a vfms.f64 d0, d7, d10 + 8008fea: eebd 0bc0 vcvt.s32.f64 s0, d0 + 8008fee: ee10 1a10 vmov r1, s0 + 8008ff2: ed32 0b02 vldmdb r2!, {d0} + 8008ff6: f840 1023 str.w r1, [r0, r3, lsl #2] + 8008ffa: ee37 0b00 vadd.f64 d0, d7, d0 + 8008ffe: 3301 adds r3, #1 + 8009000: e798 b.n 8008f34 <__kernel_rem_pio2+0xdc> + 8009002: d106 bne.n 8009012 <__kernel_rem_pio2+0x1ba> + 8009004: 1e6b subs r3, r5, #1 + 8009006: aa06 add r2, sp, #24 + 8009008: f852 2023 ldr.w r2, [r2, r3, lsl #2] + 800900c: ea4f 58e2 mov.w r8, r2, asr #23 + 8009010: e7c1 b.n 8008f96 <__kernel_rem_pio2+0x13e> + 8009012: eeb6 7b00 vmov.f64 d7, #96 ; 0x3f000000 0.5 + 8009016: eeb4 8bc7 vcmpe.f64 d8, d7 + 800901a: eef1 fa10 vmrs APSR_nzcv, fpscr + 800901e: da32 bge.n 8009086 <__kernel_rem_pio2+0x22e> + 8009020: f04f 0800 mov.w r8, #0 + 8009024: eeb5 8b40 vcmp.f64 d8, #0.0 + 8009028: eef1 fa10 vmrs APSR_nzcv, fpscr + 800902c: f040 80b0 bne.w 8009190 <__kernel_rem_pio2+0x338> + 8009030: 1e6b subs r3, r5, #1 + 8009032: 4618 mov r0, r3 + 8009034: 2200 movs r2, #0 + 8009036: 4548 cmp r0, r9 + 8009038: da4e bge.n 80090d8 <__kernel_rem_pio2+0x280> + 800903a: 2a00 cmp r2, #0 + 800903c: f000 8088 beq.w 8009150 <__kernel_rem_pio2+0x2f8> 8009040: aa06 add r2, sp, #24 - 8009042: ebac 0303 sub.w r3, ip, r3 - 8009046: f842 3020 str.w r3, [r2, r0, lsl #2] - 800904a: 460b mov r3, r1 - 800904c: e7f5 b.n 800903a <__kernel_rem_pio2+0x24a> - 800904e: 1e68 subs r0, r5, #1 - 8009050: ab06 add r3, sp, #24 - 8009052: f853 3020 ldr.w r3, [r3, r0, lsl #2] - 8009056: f3c3 0316 ubfx r3, r3, #0, #23 - 800905a: aa06 add r2, sp, #24 - 800905c: f842 3020 str.w r3, [r2, r0, lsl #2] - 8009060: e778 b.n 8008f54 <__kernel_rem_pio2+0x164> - 8009062: 1e68 subs r0, r5, #1 - 8009064: ab06 add r3, sp, #24 - 8009066: f853 3020 ldr.w r3, [r3, r0, lsl #2] - 800906a: f3c3 0315 ubfx r3, r3, #0, #22 - 800906e: e7f4 b.n 800905a <__kernel_rem_pio2+0x26a> - 8009070: a906 add r1, sp, #24 - 8009072: f851 1020 ldr.w r1, [r1, r0, lsl #2] - 8009076: 3801 subs r0, #1 - 8009078: 430a orrs r2, r1 - 800907a: e7a8 b.n 8008fce <__kernel_rem_pio2+0x1de> - 800907c: f10c 0c01 add.w ip, ip, #1 - 8009080: f853 2d04 ldr.w r2, [r3, #-4]! - 8009084: 2a00 cmp r2, #0 - 8009086: d0f9 beq.n 800907c <__kernel_rem_pio2+0x28c> - 8009088: eb0b 0305 add.w r3, fp, r5 - 800908c: aa1a add r2, sp, #104 ; 0x68 - 800908e: 00db lsls r3, r3, #3 - 8009090: 1898 adds r0, r3, r2 - 8009092: 3008 adds r0, #8 - 8009094: 1c69 adds r1, r5, #1 - 8009096: 3708 adds r7, #8 - 8009098: 2200 movs r2, #0 - 800909a: 4465 add r5, ip - 800909c: 9005 str r0, [sp, #20] - 800909e: 428d cmp r5, r1 - 80090a0: f6ff af07 blt.w 8008eb2 <__kernel_rem_pio2+0xc2> - 80090a4: a81a add r0, sp, #104 ; 0x68 - 80090a6: eb02 0c03 add.w ip, r2, r3 - 80090aa: 4484 add ip, r0 - 80090ac: 9803 ldr r0, [sp, #12] - 80090ae: f8dd e008 ldr.w lr, [sp, #8] - 80090b2: f850 0021 ldr.w r0, [r0, r1, lsl #2] - 80090b6: 9001 str r0, [sp, #4] - 80090b8: ee07 0a90 vmov s15, r0 - 80090bc: eeb8 7be7 vcvt.f64.s32 d7, s15 - 80090c0: 9805 ldr r0, [sp, #20] - 80090c2: ed8c 7b00 vstr d7, [ip] - 80090c6: ed9f 7b10 vldr d7, [pc, #64] ; 8009108 <__kernel_rem_pio2+0x318> - 80090ca: eb00 0802 add.w r8, r0, r2 - 80090ce: f04f 0c00 mov.w ip, #0 - 80090d2: 45d4 cmp ip, sl - 80090d4: dd0c ble.n 80090f0 <__kernel_rem_pio2+0x300> - 80090d6: eb02 0c07 add.w ip, r2, r7 - 80090da: a86a add r0, sp, #424 ; 0x1a8 - 80090dc: 4484 add ip, r0 - 80090de: ed8c 7b02 vstr d7, [ip, #8] - 80090e2: 3101 adds r1, #1 - 80090e4: 3208 adds r2, #8 - 80090e6: e7da b.n 800909e <__kernel_rem_pio2+0x2ae> - 80090e8: 9b04 ldr r3, [sp, #16] - 80090ea: f04f 0c01 mov.w ip, #1 - 80090ee: e7c7 b.n 8009080 <__kernel_rem_pio2+0x290> - 80090f0: ecbe 5b02 vldmia lr!, {d5} - 80090f4: ed38 6b02 vldmdb r8!, {d6} - 80090f8: f10c 0c01 add.w ip, ip, #1 - 80090fc: eea5 7b06 vfma.f64 d7, d5, d6 - 8009100: e7e7 b.n 80090d2 <__kernel_rem_pio2+0x2e2> - 8009102: 3b01 subs r3, #1 - 8009104: e768 b.n 8008fd8 <__kernel_rem_pio2+0x1e8> - 8009106: bf00 nop + 8009042: 3c18 subs r4, #24 + 8009044: f852 1023 ldr.w r1, [r2, r3, lsl #2] + 8009048: 2900 cmp r1, #0 + 800904a: f000 808e beq.w 800916a <__kernel_rem_pio2+0x312> + 800904e: eeb7 0b00 vmov.f64 d0, #112 ; 0x3f800000 1.0 + 8009052: 4620 mov r0, r4 + 8009054: 9302 str r3, [sp, #8] + 8009056: f000 fd9f bl 8009b98 + 800905a: 9b02 ldr r3, [sp, #8] + 800905c: aa6a add r2, sp, #424 ; 0x1a8 + 800905e: 00d9 lsls r1, r3, #3 + 8009060: ed9f 6b45 vldr d6, [pc, #276] ; 8009178 <__kernel_rem_pio2+0x320> + 8009064: 1850 adds r0, r2, r1 + 8009066: f100 0508 add.w r5, r0, #8 + 800906a: 461c mov r4, r3 + 800906c: 2c00 cmp r4, #0 + 800906e: f280 80bd bge.w 80091ec <__kernel_rem_pio2+0x394> + 8009072: 2500 movs r5, #0 + 8009074: 1b5c subs r4, r3, r5 + 8009076: 2c00 cmp r4, #0 + 8009078: f2c0 80dd blt.w 8009236 <__kernel_rem_pio2+0x3de> + 800907c: 4f43 ldr r7, [pc, #268] ; (800918c <__kernel_rem_pio2+0x334>) + 800907e: ed9f 7b3c vldr d7, [pc, #240] ; 8009170 <__kernel_rem_pio2+0x318> + 8009082: 2400 movs r4, #0 + 8009084: e0cb b.n 800921e <__kernel_rem_pio2+0x3c6> + 8009086: f04f 0802 mov.w r8, #2 + 800908a: e787 b.n 8008f9c <__kernel_rem_pio2+0x144> + 800908c: ab06 add r3, sp, #24 + 800908e: f853 3020 ldr.w r3, [r3, r0, lsl #2] + 8009092: b949 cbnz r1, 80090a8 <__kernel_rem_pio2+0x250> + 8009094: b12b cbz r3, 80090a2 <__kernel_rem_pio2+0x24a> + 8009096: aa06 add r2, sp, #24 + 8009098: f1c3 7380 rsb r3, r3, #16777216 ; 0x1000000 + 800909c: f842 3020 str.w r3, [r2, r0, lsl #2] + 80090a0: 2301 movs r3, #1 + 80090a2: 3001 adds r0, #1 + 80090a4: 4619 mov r1, r3 + 80090a6: e780 b.n 8008faa <__kernel_rem_pio2+0x152> + 80090a8: aa06 add r2, sp, #24 + 80090aa: ebac 0303 sub.w r3, ip, r3 + 80090ae: f842 3020 str.w r3, [r2, r0, lsl #2] + 80090b2: 460b mov r3, r1 + 80090b4: e7f5 b.n 80090a2 <__kernel_rem_pio2+0x24a> + 80090b6: 1e68 subs r0, r5, #1 + 80090b8: ab06 add r3, sp, #24 + 80090ba: f853 3020 ldr.w r3, [r3, r0, lsl #2] + 80090be: f3c3 0316 ubfx r3, r3, #0, #23 + 80090c2: aa06 add r2, sp, #24 + 80090c4: f842 3020 str.w r3, [r2, r0, lsl #2] + 80090c8: e778 b.n 8008fbc <__kernel_rem_pio2+0x164> + 80090ca: 1e68 subs r0, r5, #1 + 80090cc: ab06 add r3, sp, #24 + 80090ce: f853 3020 ldr.w r3, [r3, r0, lsl #2] + 80090d2: f3c3 0315 ubfx r3, r3, #0, #22 + 80090d6: e7f4 b.n 80090c2 <__kernel_rem_pio2+0x26a> + 80090d8: a906 add r1, sp, #24 + 80090da: f851 1020 ldr.w r1, [r1, r0, lsl #2] + 80090de: 3801 subs r0, #1 + 80090e0: 430a orrs r2, r1 + 80090e2: e7a8 b.n 8009036 <__kernel_rem_pio2+0x1de> + 80090e4: f10c 0c01 add.w ip, ip, #1 + 80090e8: f853 2d04 ldr.w r2, [r3, #-4]! + 80090ec: 2a00 cmp r2, #0 + 80090ee: d0f9 beq.n 80090e4 <__kernel_rem_pio2+0x28c> + 80090f0: eb0b 0305 add.w r3, fp, r5 + 80090f4: aa1a add r2, sp, #104 ; 0x68 + 80090f6: 00db lsls r3, r3, #3 + 80090f8: 1898 adds r0, r3, r2 + 80090fa: 3008 adds r0, #8 + 80090fc: 1c69 adds r1, r5, #1 + 80090fe: 3708 adds r7, #8 + 8009100: 2200 movs r2, #0 + 8009102: 4465 add r5, ip + 8009104: 9005 str r0, [sp, #20] + 8009106: 428d cmp r5, r1 + 8009108: f6ff af07 blt.w 8008f1a <__kernel_rem_pio2+0xc2> + 800910c: a81a add r0, sp, #104 ; 0x68 + 800910e: eb02 0c03 add.w ip, r2, r3 + 8009112: 4484 add ip, r0 + 8009114: 9803 ldr r0, [sp, #12] + 8009116: f8dd e008 ldr.w lr, [sp, #8] + 800911a: f850 0021 ldr.w r0, [r0, r1, lsl #2] + 800911e: 9001 str r0, [sp, #4] + 8009120: ee07 0a90 vmov s15, r0 + 8009124: eeb8 7be7 vcvt.f64.s32 d7, s15 + 8009128: 9805 ldr r0, [sp, #20] + 800912a: ed8c 7b00 vstr d7, [ip] + 800912e: ed9f 7b10 vldr d7, [pc, #64] ; 8009170 <__kernel_rem_pio2+0x318> + 8009132: eb00 0802 add.w r8, r0, r2 + 8009136: f04f 0c00 mov.w ip, #0 + 800913a: 45d4 cmp ip, sl + 800913c: dd0c ble.n 8009158 <__kernel_rem_pio2+0x300> + 800913e: eb02 0c07 add.w ip, r2, r7 + 8009142: a86a add r0, sp, #424 ; 0x1a8 + 8009144: 4484 add ip, r0 + 8009146: ed8c 7b02 vstr d7, [ip, #8] + 800914a: 3101 adds r1, #1 + 800914c: 3208 adds r2, #8 + 800914e: e7da b.n 8009106 <__kernel_rem_pio2+0x2ae> + 8009150: 9b04 ldr r3, [sp, #16] + 8009152: f04f 0c01 mov.w ip, #1 + 8009156: e7c7 b.n 80090e8 <__kernel_rem_pio2+0x290> + 8009158: ecbe 5b02 vldmia lr!, {d5} + 800915c: ed38 6b02 vldmdb r8!, {d6} + 8009160: f10c 0c01 add.w ip, ip, #1 + 8009164: eea5 7b06 vfma.f64 d7, d5, d6 + 8009168: e7e7 b.n 800913a <__kernel_rem_pio2+0x2e2> + 800916a: 3b01 subs r3, #1 + 800916c: e768 b.n 8009040 <__kernel_rem_pio2+0x1e8> + 800916e: bf00 nop ... - 8009114: 3e700000 .word 0x3e700000 - 8009118: 00000000 .word 0x00000000 - 800911c: 41700000 .word 0x41700000 - 8009120: 0800ab40 .word 0x0800ab40 - 8009124: 0800ab00 .word 0x0800ab00 - 8009128: 4260 negs r0, r4 - 800912a: eeb0 0b48 vmov.f64 d0, d8 - 800912e: f000 fcff bl 8009b30 - 8009132: ed9f 6b77 vldr d6, [pc, #476] ; 8009310 <__kernel_rem_pio2+0x520> - 8009136: eeb4 0bc6 vcmpe.f64 d0, d6 - 800913a: eef1 fa10 vmrs APSR_nzcv, fpscr - 800913e: db18 blt.n 8009172 <__kernel_rem_pio2+0x382> - 8009140: ed9f 7b75 vldr d7, [pc, #468] ; 8009318 <__kernel_rem_pio2+0x528> - 8009144: ee20 7b07 vmul.f64 d7, d0, d7 - 8009148: eebd 7bc7 vcvt.s32.f64 s14, d7 - 800914c: aa06 add r2, sp, #24 - 800914e: eeb8 5bc7 vcvt.f64.s32 d5, s14 - 8009152: eea5 0b46 vfms.f64 d0, d5, d6 - 8009156: eebd 0bc0 vcvt.s32.f64 s0, d0 - 800915a: a906 add r1, sp, #24 - 800915c: ee10 3a10 vmov r3, s0 - 8009160: f842 3025 str.w r3, [r2, r5, lsl #2] - 8009164: 1c6b adds r3, r5, #1 - 8009166: ee17 2a10 vmov r2, s14 - 800916a: 3418 adds r4, #24 - 800916c: f841 2023 str.w r2, [r1, r3, lsl #2] - 8009170: e739 b.n 8008fe6 <__kernel_rem_pio2+0x1f6> - 8009172: eebd 0bc0 vcvt.s32.f64 s0, d0 - 8009176: aa06 add r2, sp, #24 - 8009178: ee10 3a10 vmov r3, s0 - 800917c: f842 3025 str.w r3, [r2, r5, lsl #2] - 8009180: 462b mov r3, r5 - 8009182: e730 b.n 8008fe6 <__kernel_rem_pio2+0x1f6> - 8009184: aa06 add r2, sp, #24 - 8009186: f852 2024 ldr.w r2, [r2, r4, lsl #2] - 800918a: 9202 str r2, [sp, #8] - 800918c: ee07 2a90 vmov s15, r2 - 8009190: 3c01 subs r4, #1 - 8009192: eeb8 7be7 vcvt.f64.s32 d7, s15 - 8009196: ee27 7b00 vmul.f64 d7, d7, d0 - 800919a: ee20 0b06 vmul.f64 d0, d0, d6 - 800919e: ed25 7b02 vstmdb r5!, {d7} - 80091a2: e72f b.n 8009004 <__kernel_rem_pio2+0x214> - 80091a4: eb00 0cc4 add.w ip, r0, r4, lsl #3 - 80091a8: ecb7 5b02 vldmia r7!, {d5} - 80091ac: ed9c 6b00 vldr d6, [ip] - 80091b0: 3401 adds r4, #1 - 80091b2: eea5 7b06 vfma.f64 d7, d5, d6 - 80091b6: 454c cmp r4, r9 - 80091b8: dc01 bgt.n 80091be <__kernel_rem_pio2+0x3ce> - 80091ba: 42a5 cmp r5, r4 - 80091bc: daf2 bge.n 80091a4 <__kernel_rem_pio2+0x3b4> - 80091be: aa42 add r2, sp, #264 ; 0x108 - 80091c0: eb02 04c5 add.w r4, r2, r5, lsl #3 - 80091c4: ed84 7b00 vstr d7, [r4] - 80091c8: 3501 adds r5, #1 - 80091ca: 3808 subs r0, #8 - 80091cc: e71e b.n 800900c <__kernel_rem_pio2+0x21c> - 80091ce: 9aa2 ldr r2, [sp, #648] ; 0x288 - 80091d0: 2a03 cmp r2, #3 - 80091d2: d84e bhi.n 8009272 <__kernel_rem_pio2+0x482> - 80091d4: e8df f002 tbb [pc, r2] - 80091d8: 021f1f3e .word 0x021f1f3e - 80091dc: 3108 adds r1, #8 - 80091de: aa42 add r2, sp, #264 ; 0x108 - 80091e0: 4411 add r1, r2 - 80091e2: 4608 mov r0, r1 - 80091e4: 461c mov r4, r3 - 80091e6: 2c00 cmp r4, #0 - 80091e8: dc61 bgt.n 80092ae <__kernel_rem_pio2+0x4be> - 80091ea: 4608 mov r0, r1 - 80091ec: 461c mov r4, r3 - 80091ee: 2c01 cmp r4, #1 - 80091f0: dc6d bgt.n 80092ce <__kernel_rem_pio2+0x4de> - 80091f2: ed9f 7b4b vldr d7, [pc, #300] ; 8009320 <__kernel_rem_pio2+0x530> - 80091f6: 2b01 cmp r3, #1 - 80091f8: dc79 bgt.n 80092ee <__kernel_rem_pio2+0x4fe> - 80091fa: ed9d 5b42 vldr d5, [sp, #264] ; 0x108 - 80091fe: ed9d 6b44 vldr d6, [sp, #272] ; 0x110 - 8009202: f1b8 0f00 cmp.w r8, #0 - 8009206: d178 bne.n 80092fa <__kernel_rem_pio2+0x50a> - 8009208: ed86 5b00 vstr d5, [r6] - 800920c: ed86 6b02 vstr d6, [r6, #8] - 8009210: ed86 7b04 vstr d7, [r6, #16] - 8009214: e02d b.n 8009272 <__kernel_rem_pio2+0x482> - 8009216: ed9f 6b42 vldr d6, [pc, #264] ; 8009320 <__kernel_rem_pio2+0x530> - 800921a: 3108 adds r1, #8 - 800921c: aa42 add r2, sp, #264 ; 0x108 - 800921e: 4411 add r1, r2 - 8009220: 4618 mov r0, r3 - 8009222: 2800 cmp r0, #0 - 8009224: da34 bge.n 8009290 <__kernel_rem_pio2+0x4a0> - 8009226: f1b8 0f00 cmp.w r8, #0 - 800922a: d037 beq.n 800929c <__kernel_rem_pio2+0x4ac> - 800922c: eeb1 7b46 vneg.f64 d7, d6 - 8009230: ed86 7b00 vstr d7, [r6] - 8009234: ed9d 7b42 vldr d7, [sp, #264] ; 0x108 - 8009238: a844 add r0, sp, #272 ; 0x110 - 800923a: 2101 movs r1, #1 - 800923c: ee37 7b46 vsub.f64 d7, d7, d6 - 8009240: 428b cmp r3, r1 - 8009242: da2e bge.n 80092a2 <__kernel_rem_pio2+0x4b2> - 8009244: f1b8 0f00 cmp.w r8, #0 - 8009248: d001 beq.n 800924e <__kernel_rem_pio2+0x45e> - 800924a: eeb1 7b47 vneg.f64 d7, d7 - 800924e: ed86 7b02 vstr d7, [r6, #8] - 8009252: e00e b.n 8009272 <__kernel_rem_pio2+0x482> - 8009254: aa92 add r2, sp, #584 ; 0x248 - 8009256: ed9f 7b32 vldr d7, [pc, #200] ; 8009320 <__kernel_rem_pio2+0x530> - 800925a: 4411 add r1, r2 - 800925c: f5a1 719c sub.w r1, r1, #312 ; 0x138 - 8009260: 2b00 cmp r3, #0 - 8009262: da0f bge.n 8009284 <__kernel_rem_pio2+0x494> - 8009264: f1b8 0f00 cmp.w r8, #0 - 8009268: d001 beq.n 800926e <__kernel_rem_pio2+0x47e> - 800926a: eeb1 7b47 vneg.f64 d7, d7 - 800926e: ed86 7b00 vstr d7, [r6] - 8009272: 9b01 ldr r3, [sp, #4] - 8009274: f003 0007 and.w r0, r3, #7 - 8009278: f50d 7d13 add.w sp, sp, #588 ; 0x24c - 800927c: ecbd 8b06 vpop {d8-d10} - 8009280: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} - 8009284: ed31 6b02 vldmdb r1!, {d6} - 8009288: 3b01 subs r3, #1 - 800928a: ee37 7b06 vadd.f64 d7, d7, d6 - 800928e: e7e7 b.n 8009260 <__kernel_rem_pio2+0x470> - 8009290: ed31 7b02 vldmdb r1!, {d7} - 8009294: 3801 subs r0, #1 - 8009296: ee36 6b07 vadd.f64 d6, d6, d7 - 800929a: e7c2 b.n 8009222 <__kernel_rem_pio2+0x432> - 800929c: eeb0 7b46 vmov.f64 d7, d6 - 80092a0: e7c6 b.n 8009230 <__kernel_rem_pio2+0x440> - 80092a2: ecb0 6b02 vldmia r0!, {d6} - 80092a6: 3101 adds r1, #1 - 80092a8: ee37 7b06 vadd.f64 d7, d7, d6 - 80092ac: e7c8 b.n 8009240 <__kernel_rem_pio2+0x450> - 80092ae: ed10 7b04 vldr d7, [r0, #-16] - 80092b2: ed30 5b02 vldmdb r0!, {d5} - 80092b6: 3c01 subs r4, #1 - 80092b8: ee37 6b05 vadd.f64 d6, d7, d5 - 80092bc: ee37 7b46 vsub.f64 d7, d7, d6 - 80092c0: ed00 6b02 vstr d6, [r0, #-8] - 80092c4: ee37 7b05 vadd.f64 d7, d7, d5 - 80092c8: ed80 7b00 vstr d7, [r0] - 80092cc: e78b b.n 80091e6 <__kernel_rem_pio2+0x3f6> - 80092ce: ed10 7b04 vldr d7, [r0, #-16] - 80092d2: ed30 5b02 vldmdb r0!, {d5} - 80092d6: 3c01 subs r4, #1 - 80092d8: ee37 6b05 vadd.f64 d6, d7, d5 - 80092dc: ee37 7b46 vsub.f64 d7, d7, d6 - 80092e0: ed00 6b02 vstr d6, [r0, #-8] - 80092e4: ee37 7b05 vadd.f64 d7, d7, d5 - 80092e8: ed80 7b00 vstr d7, [r0] - 80092ec: e77f b.n 80091ee <__kernel_rem_pio2+0x3fe> - 80092ee: ed31 6b02 vldmdb r1!, {d6} - 80092f2: 3b01 subs r3, #1 - 80092f4: ee37 7b06 vadd.f64 d7, d7, d6 - 80092f8: e77d b.n 80091f6 <__kernel_rem_pio2+0x406> - 80092fa: eeb1 5b45 vneg.f64 d5, d5 - 80092fe: eeb1 6b46 vneg.f64 d6, d6 - 8009302: ed86 5b00 vstr d5, [r6] - 8009306: eeb1 7b47 vneg.f64 d7, d7 - 800930a: ed86 6b02 vstr d6, [r6, #8] - 800930e: e77f b.n 8009210 <__kernel_rem_pio2+0x420> - 8009310: 00000000 .word 0x00000000 - 8009314: 41700000 .word 0x41700000 - 8009318: 00000000 .word 0x00000000 - 800931c: 3e700000 .word 0x3e700000 + 800917c: 3e700000 .word 0x3e700000 + 8009180: 00000000 .word 0x00000000 + 8009184: 41700000 .word 0x41700000 + 8009188: 0800aba8 .word 0x0800aba8 + 800918c: 0800ab68 .word 0x0800ab68 + 8009190: 4260 negs r0, r4 + 8009192: eeb0 0b48 vmov.f64 d0, d8 + 8009196: f000 fcff bl 8009b98 + 800919a: ed9f 6b77 vldr d6, [pc, #476] ; 8009378 <__kernel_rem_pio2+0x520> + 800919e: eeb4 0bc6 vcmpe.f64 d0, d6 + 80091a2: eef1 fa10 vmrs APSR_nzcv, fpscr + 80091a6: db18 blt.n 80091da <__kernel_rem_pio2+0x382> + 80091a8: ed9f 7b75 vldr d7, [pc, #468] ; 8009380 <__kernel_rem_pio2+0x528> + 80091ac: ee20 7b07 vmul.f64 d7, d0, d7 + 80091b0: eebd 7bc7 vcvt.s32.f64 s14, d7 + 80091b4: aa06 add r2, sp, #24 + 80091b6: eeb8 5bc7 vcvt.f64.s32 d5, s14 + 80091ba: eea5 0b46 vfms.f64 d0, d5, d6 + 80091be: eebd 0bc0 vcvt.s32.f64 s0, d0 + 80091c2: a906 add r1, sp, #24 + 80091c4: ee10 3a10 vmov r3, s0 + 80091c8: f842 3025 str.w r3, [r2, r5, lsl #2] + 80091cc: 1c6b adds r3, r5, #1 + 80091ce: ee17 2a10 vmov r2, s14 + 80091d2: 3418 adds r4, #24 + 80091d4: f841 2023 str.w r2, [r1, r3, lsl #2] + 80091d8: e739 b.n 800904e <__kernel_rem_pio2+0x1f6> + 80091da: eebd 0bc0 vcvt.s32.f64 s0, d0 + 80091de: aa06 add r2, sp, #24 + 80091e0: ee10 3a10 vmov r3, s0 + 80091e4: f842 3025 str.w r3, [r2, r5, lsl #2] + 80091e8: 462b mov r3, r5 + 80091ea: e730 b.n 800904e <__kernel_rem_pio2+0x1f6> + 80091ec: aa06 add r2, sp, #24 + 80091ee: f852 2024 ldr.w r2, [r2, r4, lsl #2] + 80091f2: 9202 str r2, [sp, #8] + 80091f4: ee07 2a90 vmov s15, r2 + 80091f8: 3c01 subs r4, #1 + 80091fa: eeb8 7be7 vcvt.f64.s32 d7, s15 + 80091fe: ee27 7b00 vmul.f64 d7, d7, d0 + 8009202: ee20 0b06 vmul.f64 d0, d0, d6 + 8009206: ed25 7b02 vstmdb r5!, {d7} + 800920a: e72f b.n 800906c <__kernel_rem_pio2+0x214> + 800920c: eb00 0cc4 add.w ip, r0, r4, lsl #3 + 8009210: ecb7 5b02 vldmia r7!, {d5} + 8009214: ed9c 6b00 vldr d6, [ip] + 8009218: 3401 adds r4, #1 + 800921a: eea5 7b06 vfma.f64 d7, d5, d6 + 800921e: 454c cmp r4, r9 + 8009220: dc01 bgt.n 8009226 <__kernel_rem_pio2+0x3ce> + 8009222: 42a5 cmp r5, r4 + 8009224: daf2 bge.n 800920c <__kernel_rem_pio2+0x3b4> + 8009226: aa42 add r2, sp, #264 ; 0x108 + 8009228: eb02 04c5 add.w r4, r2, r5, lsl #3 + 800922c: ed84 7b00 vstr d7, [r4] + 8009230: 3501 adds r5, #1 + 8009232: 3808 subs r0, #8 + 8009234: e71e b.n 8009074 <__kernel_rem_pio2+0x21c> + 8009236: 9aa2 ldr r2, [sp, #648] ; 0x288 + 8009238: 2a03 cmp r2, #3 + 800923a: d84e bhi.n 80092da <__kernel_rem_pio2+0x482> + 800923c: e8df f002 tbb [pc, r2] + 8009240: 021f1f3e .word 0x021f1f3e + 8009244: 3108 adds r1, #8 + 8009246: aa42 add r2, sp, #264 ; 0x108 + 8009248: 4411 add r1, r2 + 800924a: 4608 mov r0, r1 + 800924c: 461c mov r4, r3 + 800924e: 2c00 cmp r4, #0 + 8009250: dc61 bgt.n 8009316 <__kernel_rem_pio2+0x4be> + 8009252: 4608 mov r0, r1 + 8009254: 461c mov r4, r3 + 8009256: 2c01 cmp r4, #1 + 8009258: dc6d bgt.n 8009336 <__kernel_rem_pio2+0x4de> + 800925a: ed9f 7b4b vldr d7, [pc, #300] ; 8009388 <__kernel_rem_pio2+0x530> + 800925e: 2b01 cmp r3, #1 + 8009260: dc79 bgt.n 8009356 <__kernel_rem_pio2+0x4fe> + 8009262: ed9d 5b42 vldr d5, [sp, #264] ; 0x108 + 8009266: ed9d 6b44 vldr d6, [sp, #272] ; 0x110 + 800926a: f1b8 0f00 cmp.w r8, #0 + 800926e: d178 bne.n 8009362 <__kernel_rem_pio2+0x50a> + 8009270: ed86 5b00 vstr d5, [r6] + 8009274: ed86 6b02 vstr d6, [r6, #8] + 8009278: ed86 7b04 vstr d7, [r6, #16] + 800927c: e02d b.n 80092da <__kernel_rem_pio2+0x482> + 800927e: ed9f 6b42 vldr d6, [pc, #264] ; 8009388 <__kernel_rem_pio2+0x530> + 8009282: 3108 adds r1, #8 + 8009284: aa42 add r2, sp, #264 ; 0x108 + 8009286: 4411 add r1, r2 + 8009288: 4618 mov r0, r3 + 800928a: 2800 cmp r0, #0 + 800928c: da34 bge.n 80092f8 <__kernel_rem_pio2+0x4a0> + 800928e: f1b8 0f00 cmp.w r8, #0 + 8009292: d037 beq.n 8009304 <__kernel_rem_pio2+0x4ac> + 8009294: eeb1 7b46 vneg.f64 d7, d6 + 8009298: ed86 7b00 vstr d7, [r6] + 800929c: ed9d 7b42 vldr d7, [sp, #264] ; 0x108 + 80092a0: a844 add r0, sp, #272 ; 0x110 + 80092a2: 2101 movs r1, #1 + 80092a4: ee37 7b46 vsub.f64 d7, d7, d6 + 80092a8: 428b cmp r3, r1 + 80092aa: da2e bge.n 800930a <__kernel_rem_pio2+0x4b2> + 80092ac: f1b8 0f00 cmp.w r8, #0 + 80092b0: d001 beq.n 80092b6 <__kernel_rem_pio2+0x45e> + 80092b2: eeb1 7b47 vneg.f64 d7, d7 + 80092b6: ed86 7b02 vstr d7, [r6, #8] + 80092ba: e00e b.n 80092da <__kernel_rem_pio2+0x482> + 80092bc: aa92 add r2, sp, #584 ; 0x248 + 80092be: ed9f 7b32 vldr d7, [pc, #200] ; 8009388 <__kernel_rem_pio2+0x530> + 80092c2: 4411 add r1, r2 + 80092c4: f5a1 719c sub.w r1, r1, #312 ; 0x138 + 80092c8: 2b00 cmp r3, #0 + 80092ca: da0f bge.n 80092ec <__kernel_rem_pio2+0x494> + 80092cc: f1b8 0f00 cmp.w r8, #0 + 80092d0: d001 beq.n 80092d6 <__kernel_rem_pio2+0x47e> + 80092d2: eeb1 7b47 vneg.f64 d7, d7 + 80092d6: ed86 7b00 vstr d7, [r6] + 80092da: 9b01 ldr r3, [sp, #4] + 80092dc: f003 0007 and.w r0, r3, #7 + 80092e0: f50d 7d13 add.w sp, sp, #588 ; 0x24c + 80092e4: ecbd 8b06 vpop {d8-d10} + 80092e8: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} + 80092ec: ed31 6b02 vldmdb r1!, {d6} + 80092f0: 3b01 subs r3, #1 + 80092f2: ee37 7b06 vadd.f64 d7, d7, d6 + 80092f6: e7e7 b.n 80092c8 <__kernel_rem_pio2+0x470> + 80092f8: ed31 7b02 vldmdb r1!, {d7} + 80092fc: 3801 subs r0, #1 + 80092fe: ee36 6b07 vadd.f64 d6, d6, d7 + 8009302: e7c2 b.n 800928a <__kernel_rem_pio2+0x432> + 8009304: eeb0 7b46 vmov.f64 d7, d6 + 8009308: e7c6 b.n 8009298 <__kernel_rem_pio2+0x440> + 800930a: ecb0 6b02 vldmia r0!, {d6} + 800930e: 3101 adds r1, #1 + 8009310: ee37 7b06 vadd.f64 d7, d7, d6 + 8009314: e7c8 b.n 80092a8 <__kernel_rem_pio2+0x450> + 8009316: ed10 7b04 vldr d7, [r0, #-16] + 800931a: ed30 5b02 vldmdb r0!, {d5} + 800931e: 3c01 subs r4, #1 + 8009320: ee37 6b05 vadd.f64 d6, d7, d5 + 8009324: ee37 7b46 vsub.f64 d7, d7, d6 + 8009328: ed00 6b02 vstr d6, [r0, #-8] + 800932c: ee37 7b05 vadd.f64 d7, d7, d5 + 8009330: ed80 7b00 vstr d7, [r0] + 8009334: e78b b.n 800924e <__kernel_rem_pio2+0x3f6> + 8009336: ed10 7b04 vldr d7, [r0, #-16] + 800933a: ed30 5b02 vldmdb r0!, {d5} + 800933e: 3c01 subs r4, #1 + 8009340: ee37 6b05 vadd.f64 d6, d7, d5 + 8009344: ee37 7b46 vsub.f64 d7, d7, d6 + 8009348: ed00 6b02 vstr d6, [r0, #-8] + 800934c: ee37 7b05 vadd.f64 d7, d7, d5 + 8009350: ed80 7b00 vstr d7, [r0] + 8009354: e77f b.n 8009256 <__kernel_rem_pio2+0x3fe> + 8009356: ed31 6b02 vldmdb r1!, {d6} + 800935a: 3b01 subs r3, #1 + 800935c: ee37 7b06 vadd.f64 d7, d7, d6 + 8009360: e77d b.n 800925e <__kernel_rem_pio2+0x406> + 8009362: eeb1 5b45 vneg.f64 d5, d5 + 8009366: eeb1 6b46 vneg.f64 d6, d6 + 800936a: ed86 5b00 vstr d5, [r6] + 800936e: eeb1 7b47 vneg.f64 d7, d7 + 8009372: ed86 6b02 vstr d6, [r6, #8] + 8009376: e77f b.n 8009278 <__kernel_rem_pio2+0x420> + 8009378: 00000000 .word 0x00000000 + 800937c: 41700000 .word 0x41700000 + 8009380: 00000000 .word 0x00000000 + 8009384: 3e700000 .word 0x3e700000 ... -08009328 <__kernel_sin>: - 8009328: ee10 3a90 vmov r3, s1 - 800932c: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000 - 8009330: f1b3 5f79 cmp.w r3, #1044381696 ; 0x3e400000 - 8009334: da04 bge.n 8009340 <__kernel_sin+0x18> - 8009336: eefd 7bc0 vcvt.s32.f64 s15, d0 - 800933a: ee17 3a90 vmov r3, s15 - 800933e: b35b cbz r3, 8009398 <__kernel_sin+0x70> - 8009340: ee20 6b00 vmul.f64 d6, d0, d0 - 8009344: ee20 5b06 vmul.f64 d5, d0, d6 - 8009348: ed9f 7b15 vldr d7, [pc, #84] ; 80093a0 <__kernel_sin+0x78> - 800934c: ed9f 4b16 vldr d4, [pc, #88] ; 80093a8 <__kernel_sin+0x80> - 8009350: eea6 4b07 vfma.f64 d4, d6, d7 - 8009354: ed9f 7b16 vldr d7, [pc, #88] ; 80093b0 <__kernel_sin+0x88> - 8009358: eea4 7b06 vfma.f64 d7, d4, d6 - 800935c: ed9f 4b16 vldr d4, [pc, #88] ; 80093b8 <__kernel_sin+0x90> - 8009360: eea7 4b06 vfma.f64 d4, d7, d6 - 8009364: ed9f 7b16 vldr d7, [pc, #88] ; 80093c0 <__kernel_sin+0x98> - 8009368: eea4 7b06 vfma.f64 d7, d4, d6 - 800936c: b930 cbnz r0, 800937c <__kernel_sin+0x54> - 800936e: ed9f 4b16 vldr d4, [pc, #88] ; 80093c8 <__kernel_sin+0xa0> - 8009372: eea6 4b07 vfma.f64 d4, d6, d7 - 8009376: eea4 0b05 vfma.f64 d0, d4, d5 - 800937a: 4770 bx lr - 800937c: ee27 7b45 vnmul.f64 d7, d7, d5 - 8009380: eeb6 4b00 vmov.f64 d4, #96 ; 0x3f000000 0.5 - 8009384: eea1 7b04 vfma.f64 d7, d1, d4 - 8009388: ee97 1b06 vfnms.f64 d1, d7, d6 - 800938c: ed9f 7b10 vldr d7, [pc, #64] ; 80093d0 <__kernel_sin+0xa8> - 8009390: eea5 1b07 vfma.f64 d1, d5, d7 - 8009394: ee30 0b41 vsub.f64 d0, d0, d1 - 8009398: 4770 bx lr - 800939a: bf00 nop - 800939c: f3af 8000 nop.w - 80093a0: 5acfd57c .word 0x5acfd57c - 80093a4: 3de5d93a .word 0x3de5d93a - 80093a8: 8a2b9ceb .word 0x8a2b9ceb - 80093ac: be5ae5e6 .word 0xbe5ae5e6 - 80093b0: 57b1fe7d .word 0x57b1fe7d - 80093b4: 3ec71de3 .word 0x3ec71de3 - 80093b8: 19c161d5 .word 0x19c161d5 - 80093bc: bf2a01a0 .word 0xbf2a01a0 - 80093c0: 1110f8a6 .word 0x1110f8a6 - 80093c4: 3f811111 .word 0x3f811111 - 80093c8: 55555549 .word 0x55555549 - 80093cc: bfc55555 .word 0xbfc55555 - 80093d0: 55555549 .word 0x55555549 - 80093d4: 3fc55555 .word 0x3fc55555 - -080093d8 <__kernel_cosf>: - 80093d8: ee10 3a10 vmov r3, s0 - 80093dc: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000 - 80093e0: f1b3 5f48 cmp.w r3, #838860800 ; 0x32000000 - 80093e4: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 - 80093e8: da05 bge.n 80093f6 <__kernel_cosf+0x1e> - 80093ea: eefd 7ac0 vcvt.s32.f32 s15, s0 - 80093ee: ee17 2a90 vmov r2, s15 - 80093f2: 2a00 cmp r2, #0 - 80093f4: d03b beq.n 800946e <__kernel_cosf+0x96> - 80093f6: ee20 6a00 vmul.f32 s12, s0, s0 - 80093fa: eeb6 7a00 vmov.f32 s14, #96 ; 0x3f000000 0.5 - 80093fe: eddf 5a1d vldr s11, [pc, #116] ; 8009474 <__kernel_cosf+0x9c> - 8009402: 4a1d ldr r2, [pc, #116] ; (8009478 <__kernel_cosf+0xa0>) - 8009404: ee66 7a07 vmul.f32 s15, s12, s14 - 8009408: ed9f 7a1c vldr s14, [pc, #112] ; 800947c <__kernel_cosf+0xa4> - 800940c: eea6 7a25 vfma.f32 s14, s12, s11 - 8009410: 4293 cmp r3, r2 - 8009412: eddf 5a1b vldr s11, [pc, #108] ; 8009480 <__kernel_cosf+0xa8> - 8009416: eee7 5a06 vfma.f32 s11, s14, s12 - 800941a: ed9f 7a1a vldr s14, [pc, #104] ; 8009484 <__kernel_cosf+0xac> - 800941e: eea5 7a86 vfma.f32 s14, s11, s12 - 8009422: eddf 5a19 vldr s11, [pc, #100] ; 8009488 <__kernel_cosf+0xb0> - 8009426: eee7 5a06 vfma.f32 s11, s14, s12 - 800942a: ed9f 7a18 vldr s14, [pc, #96] ; 800948c <__kernel_cosf+0xb4> - 800942e: eea5 7a86 vfma.f32 s14, s11, s12 - 8009432: ee60 0ac0 vnmul.f32 s1, s1, s0 - 8009436: ee27 7a06 vmul.f32 s14, s14, s12 - 800943a: eee6 0a07 vfma.f32 s1, s12, s14 - 800943e: dc04 bgt.n 800944a <__kernel_cosf+0x72> - 8009440: ee77 0ae0 vsub.f32 s1, s15, s1 - 8009444: ee36 0ae0 vsub.f32 s0, s13, s1 - 8009448: 4770 bx lr - 800944a: 4a11 ldr r2, [pc, #68] ; (8009490 <__kernel_cosf+0xb8>) - 800944c: 4293 cmp r3, r2 - 800944e: bfda itte le - 8009450: f103 437f addle.w r3, r3, #4278190080 ; 0xff000000 - 8009454: ee07 3a10 vmovle s14, r3 - 8009458: eeb5 7a02 vmovgt.f32 s14, #82 ; 0x3e900000 0.2812500 - 800945c: ee77 7ac7 vsub.f32 s15, s15, s14 - 8009460: ee36 0ac7 vsub.f32 s0, s13, s14 - 8009464: ee77 7ae0 vsub.f32 s15, s15, s1 - 8009468: ee30 0a67 vsub.f32 s0, s0, s15 - 800946c: 4770 bx lr - 800946e: eeb0 0a66 vmov.f32 s0, s13 - 8009472: 4770 bx lr - 8009474: ad47d74e .word 0xad47d74e - 8009478: 3e999999 .word 0x3e999999 - 800947c: 310f74f6 .word 0x310f74f6 - 8009480: b493f27c .word 0xb493f27c - 8009484: 37d00d01 .word 0x37d00d01 - 8009488: bab60b61 .word 0xbab60b61 - 800948c: 3d2aaaab .word 0x3d2aaaab - 8009490: 3f480000 .word 0x3f480000 - -08009494 <__kernel_rem_pio2f>: - 8009494: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} - 8009498: ed2d 8b04 vpush {d8-d9} - 800949c: b0d7 sub sp, #348 ; 0x15c - 800949e: 469b mov fp, r3 - 80094a0: 460e mov r6, r1 - 80094a2: 4bbe ldr r3, [pc, #760] ; (800979c <__kernel_rem_pio2f+0x308>) - 80094a4: 9964 ldr r1, [sp, #400] ; 0x190 - 80094a6: 9002 str r0, [sp, #8] - 80094a8: f853 9021 ldr.w r9, [r3, r1, lsl #2] - 80094ac: 9865 ldr r0, [sp, #404] ; 0x194 - 80094ae: ed9f 7abf vldr s14, [pc, #764] ; 80097ac <__kernel_rem_pio2f+0x318> - 80094b2: 1ed1 subs r1, r2, #3 - 80094b4: 2308 movs r3, #8 - 80094b6: fb91 f1f3 sdiv r1, r1, r3 - 80094ba: ea21 71e1 bic.w r1, r1, r1, asr #31 - 80094be: f10b 3aff add.w sl, fp, #4294967295 ; 0xffffffff - 80094c2: 1c4c adds r4, r1, #1 - 80094c4: eba2 04c4 sub.w r4, r2, r4, lsl #3 - 80094c8: eba1 050a sub.w r5, r1, sl - 80094cc: aa1a add r2, sp, #104 ; 0x68 - 80094ce: eb09 070a add.w r7, r9, sl - 80094d2: eb00 0c85 add.w ip, r0, r5, lsl #2 - 80094d6: 4696 mov lr, r2 - 80094d8: 2300 movs r3, #0 - 80094da: 42bb cmp r3, r7 - 80094dc: dd0f ble.n 80094fe <__kernel_rem_pio2f+0x6a> - 80094de: af42 add r7, sp, #264 ; 0x108 - 80094e0: 2200 movs r2, #0 - 80094e2: 454a cmp r2, r9 - 80094e4: dc27 bgt.n 8009536 <__kernel_rem_pio2f+0xa2> - 80094e6: f10d 0c68 add.w ip, sp, #104 ; 0x68 - 80094ea: eb0b 0302 add.w r3, fp, r2 - 80094ee: eb0c 0383 add.w r3, ip, r3, lsl #2 - 80094f2: 9d02 ldr r5, [sp, #8] - 80094f4: eddf 7aad vldr s15, [pc, #692] ; 80097ac <__kernel_rem_pio2f+0x318> - 80094f8: f04f 0c00 mov.w ip, #0 - 80094fc: e015 b.n 800952a <__kernel_rem_pio2f+0x96> - 80094fe: 42dd cmn r5, r3 - 8009500: bf5d ittte pl - 8009502: f85c 2023 ldrpl.w r2, [ip, r3, lsl #2] - 8009506: ee07 2a90 vmovpl s15, r2 - 800950a: eef8 7ae7 vcvtpl.f32.s32 s15, s15 - 800950e: eef0 7a47 vmovmi.f32 s15, s14 - 8009512: ecee 7a01 vstmia lr!, {s15} - 8009516: 3301 adds r3, #1 - 8009518: e7df b.n 80094da <__kernel_rem_pio2f+0x46> - 800951a: ecf5 6a01 vldmia r5!, {s13} - 800951e: ed33 7a01 vldmdb r3!, {s14} - 8009522: eee6 7a87 vfma.f32 s15, s13, s14 - 8009526: f10c 0c01 add.w ip, ip, #1 - 800952a: 45d4 cmp ip, sl - 800952c: ddf5 ble.n 800951a <__kernel_rem_pio2f+0x86> - 800952e: ece7 7a01 vstmia r7!, {s15} - 8009532: 3201 adds r2, #1 - 8009534: e7d5 b.n 80094e2 <__kernel_rem_pio2f+0x4e> - 8009536: ab06 add r3, sp, #24 - 8009538: eb03 0389 add.w r3, r3, r9, lsl #2 - 800953c: 9304 str r3, [sp, #16] - 800953e: eddf 8a9a vldr s17, [pc, #616] ; 80097a8 <__kernel_rem_pio2f+0x314> - 8009542: ed9f 9a98 vldr s18, [pc, #608] ; 80097a4 <__kernel_rem_pio2f+0x310> - 8009546: eb00 0381 add.w r3, r0, r1, lsl #2 - 800954a: 9303 str r3, [sp, #12] - 800954c: 464d mov r5, r9 - 800954e: ab56 add r3, sp, #344 ; 0x158 - 8009550: f105 4780 add.w r7, r5, #1073741824 ; 0x40000000 - 8009554: eb03 0385 add.w r3, r3, r5, lsl #2 - 8009558: 3f01 subs r7, #1 - 800955a: ed13 0a14 vldr s0, [r3, #-80] ; 0xffffffb0 - 800955e: 00bf lsls r7, r7, #2 - 8009560: ab56 add r3, sp, #344 ; 0x158 - 8009562: 19da adds r2, r3, r7 - 8009564: 3a4c subs r2, #76 ; 0x4c - 8009566: 2300 movs r3, #0 - 8009568: 1ae9 subs r1, r5, r3 - 800956a: 2900 cmp r1, #0 - 800956c: dc4c bgt.n 8009608 <__kernel_rem_pio2f+0x174> - 800956e: 4620 mov r0, r4 - 8009570: f000 fba6 bl 8009cc0 - 8009574: eeb0 8a40 vmov.f32 s16, s0 - 8009578: eeb4 0a00 vmov.f32 s0, #64 ; 0x3e000000 0.125 - 800957c: ee28 0a00 vmul.f32 s0, s16, s0 - 8009580: f000 fb5c bl 8009c3c - 8009584: eef2 7a00 vmov.f32 s15, #32 ; 0x41000000 8.0 - 8009588: eea0 8a67 vfms.f32 s16, s0, s15 - 800958c: 2c00 cmp r4, #0 - 800958e: eefd 7ac8 vcvt.s32.f32 s15, s16 - 8009592: edcd 7a01 vstr s15, [sp, #4] - 8009596: eef8 7ae7 vcvt.f32.s32 s15, s15 - 800959a: ee38 8a67 vsub.f32 s16, s16, s15 - 800959e: dd48 ble.n 8009632 <__kernel_rem_pio2f+0x19e> - 80095a0: 1e69 subs r1, r5, #1 - 80095a2: ab06 add r3, sp, #24 - 80095a4: f1c4 0008 rsb r0, r4, #8 - 80095a8: f853 c021 ldr.w ip, [r3, r1, lsl #2] - 80095ac: 9a01 ldr r2, [sp, #4] - 80095ae: fa4c f300 asr.w r3, ip, r0 - 80095b2: 441a add r2, r3 - 80095b4: 4083 lsls r3, r0 - 80095b6: 9201 str r2, [sp, #4] - 80095b8: ebac 0203 sub.w r2, ip, r3 - 80095bc: ab06 add r3, sp, #24 - 80095be: f843 2021 str.w r2, [r3, r1, lsl #2] - 80095c2: f1c4 0307 rsb r3, r4, #7 - 80095c6: fa42 f803 asr.w r8, r2, r3 - 80095ca: f1b8 0f00 cmp.w r8, #0 - 80095ce: dd41 ble.n 8009654 <__kernel_rem_pio2f+0x1c0> - 80095d0: 9b01 ldr r3, [sp, #4] - 80095d2: 2000 movs r0, #0 - 80095d4: 3301 adds r3, #1 - 80095d6: 9301 str r3, [sp, #4] - 80095d8: 4601 mov r1, r0 - 80095da: 4285 cmp r5, r0 - 80095dc: dc6d bgt.n 80096ba <__kernel_rem_pio2f+0x226> - 80095de: 2c00 cmp r4, #0 - 80095e0: dd04 ble.n 80095ec <__kernel_rem_pio2f+0x158> - 80095e2: 2c01 cmp r4, #1 - 80095e4: d07e beq.n 80096e4 <__kernel_rem_pio2f+0x250> - 80095e6: 2c02 cmp r4, #2 - 80095e8: f000 8086 beq.w 80096f8 <__kernel_rem_pio2f+0x264> - 80095ec: f1b8 0f02 cmp.w r8, #2 - 80095f0: d130 bne.n 8009654 <__kernel_rem_pio2f+0x1c0> - 80095f2: eeb7 0a00 vmov.f32 s0, #112 ; 0x3f800000 1.0 - 80095f6: ee30 8a48 vsub.f32 s16, s0, s16 - 80095fa: b359 cbz r1, 8009654 <__kernel_rem_pio2f+0x1c0> - 80095fc: 4620 mov r0, r4 - 80095fe: f000 fb5f bl 8009cc0 - 8009602: ee38 8a40 vsub.f32 s16, s16, s0 - 8009606: e025 b.n 8009654 <__kernel_rem_pio2f+0x1c0> - 8009608: ee60 7a28 vmul.f32 s15, s0, s17 - 800960c: a806 add r0, sp, #24 - 800960e: eefd 7ae7 vcvt.s32.f32 s15, s15 - 8009612: eef8 7ae7 vcvt.f32.s32 s15, s15 - 8009616: eea7 0ac9 vfms.f32 s0, s15, s18 - 800961a: eebd 0ac0 vcvt.s32.f32 s0, s0 - 800961e: ee10 1a10 vmov r1, s0 - 8009622: ed32 0a01 vldmdb r2!, {s0} - 8009626: f840 1023 str.w r1, [r0, r3, lsl #2] - 800962a: ee37 0a80 vadd.f32 s0, s15, s0 - 800962e: 3301 adds r3, #1 - 8009630: e79a b.n 8009568 <__kernel_rem_pio2f+0xd4> - 8009632: d106 bne.n 8009642 <__kernel_rem_pio2f+0x1ae> - 8009634: 1e6b subs r3, r5, #1 - 8009636: aa06 add r2, sp, #24 - 8009638: f852 2023 ldr.w r2, [r2, r3, lsl #2] - 800963c: ea4f 2822 mov.w r8, r2, asr #8 - 8009640: e7c3 b.n 80095ca <__kernel_rem_pio2f+0x136> - 8009642: eef6 7a00 vmov.f32 s15, #96 ; 0x3f000000 0.5 - 8009646: eeb4 8ae7 vcmpe.f32 s16, s15 - 800964a: eef1 fa10 vmrs APSR_nzcv, fpscr - 800964e: da31 bge.n 80096b4 <__kernel_rem_pio2f+0x220> - 8009650: f04f 0800 mov.w r8, #0 - 8009654: eeb5 8a40 vcmp.f32 s16, #0.0 - 8009658: eef1 fa10 vmrs APSR_nzcv, fpscr - 800965c: f040 80a8 bne.w 80097b0 <__kernel_rem_pio2f+0x31c> - 8009660: 1e6b subs r3, r5, #1 - 8009662: 4618 mov r0, r3 - 8009664: 2200 movs r2, #0 - 8009666: 4548 cmp r0, r9 - 8009668: da4d bge.n 8009706 <__kernel_rem_pio2f+0x272> - 800966a: 2a00 cmp r2, #0 - 800966c: f000 8087 beq.w 800977e <__kernel_rem_pio2f+0x2ea> - 8009670: aa06 add r2, sp, #24 - 8009672: 3c08 subs r4, #8 - 8009674: f852 1023 ldr.w r1, [r2, r3, lsl #2] - 8009678: 2900 cmp r1, #0 - 800967a: f000 808d beq.w 8009798 <__kernel_rem_pio2f+0x304> - 800967e: 4620 mov r0, r4 - 8009680: eeb7 0a00 vmov.f32 s0, #112 ; 0x3f800000 1.0 - 8009684: 9302 str r3, [sp, #8] - 8009686: f000 fb1b bl 8009cc0 - 800968a: 9b02 ldr r3, [sp, #8] - 800968c: ed9f 7a46 vldr s14, [pc, #280] ; 80097a8 <__kernel_rem_pio2f+0x314> - 8009690: 0099 lsls r1, r3, #2 - 8009692: aa42 add r2, sp, #264 ; 0x108 - 8009694: 1850 adds r0, r2, r1 - 8009696: 1d05 adds r5, r0, #4 - 8009698: 461c mov r4, r3 - 800969a: 2c00 cmp r4, #0 - 800969c: f280 80b8 bge.w 8009810 <__kernel_rem_pio2f+0x37c> - 80096a0: 2500 movs r5, #0 - 80096a2: 1b5c subs r4, r3, r5 - 80096a4: 2c00 cmp r4, #0 - 80096a6: f2c0 80d8 blt.w 800985a <__kernel_rem_pio2f+0x3c6> - 80096aa: 4f3d ldr r7, [pc, #244] ; (80097a0 <__kernel_rem_pio2f+0x30c>) - 80096ac: eddf 7a3f vldr s15, [pc, #252] ; 80097ac <__kernel_rem_pio2f+0x318> - 80096b0: 2400 movs r4, #0 - 80096b2: e0c6 b.n 8009842 <__kernel_rem_pio2f+0x3ae> - 80096b4: f04f 0802 mov.w r8, #2 - 80096b8: e78a b.n 80095d0 <__kernel_rem_pio2f+0x13c> - 80096ba: ab06 add r3, sp, #24 - 80096bc: f853 3020 ldr.w r3, [r3, r0, lsl #2] - 80096c0: b949 cbnz r1, 80096d6 <__kernel_rem_pio2f+0x242> - 80096c2: b12b cbz r3, 80096d0 <__kernel_rem_pio2f+0x23c> - 80096c4: aa06 add r2, sp, #24 - 80096c6: f5c3 7380 rsb r3, r3, #256 ; 0x100 - 80096ca: f842 3020 str.w r3, [r2, r0, lsl #2] - 80096ce: 2301 movs r3, #1 - 80096d0: 3001 adds r0, #1 - 80096d2: 4619 mov r1, r3 - 80096d4: e781 b.n 80095da <__kernel_rem_pio2f+0x146> - 80096d6: aa06 add r2, sp, #24 - 80096d8: f1c3 03ff rsb r3, r3, #255 ; 0xff - 80096dc: f842 3020 str.w r3, [r2, r0, lsl #2] - 80096e0: 460b mov r3, r1 - 80096e2: e7f5 b.n 80096d0 <__kernel_rem_pio2f+0x23c> - 80096e4: 1e68 subs r0, r5, #1 - 80096e6: ab06 add r3, sp, #24 - 80096e8: f853 3020 ldr.w r3, [r3, r0, lsl #2] - 80096ec: f003 037f and.w r3, r3, #127 ; 0x7f - 80096f0: aa06 add r2, sp, #24 - 80096f2: f842 3020 str.w r3, [r2, r0, lsl #2] - 80096f6: e779 b.n 80095ec <__kernel_rem_pio2f+0x158> - 80096f8: 1e68 subs r0, r5, #1 - 80096fa: ab06 add r3, sp, #24 - 80096fc: f853 3020 ldr.w r3, [r3, r0, lsl #2] - 8009700: f003 033f and.w r3, r3, #63 ; 0x3f - 8009704: e7f4 b.n 80096f0 <__kernel_rem_pio2f+0x25c> - 8009706: a906 add r1, sp, #24 - 8009708: f851 1020 ldr.w r1, [r1, r0, lsl #2] - 800970c: 3801 subs r0, #1 - 800970e: 430a orrs r2, r1 - 8009710: e7a9 b.n 8009666 <__kernel_rem_pio2f+0x1d2> - 8009712: f10c 0c01 add.w ip, ip, #1 - 8009716: f853 2d04 ldr.w r2, [r3, #-4]! - 800971a: 2a00 cmp r2, #0 - 800971c: d0f9 beq.n 8009712 <__kernel_rem_pio2f+0x27e> - 800971e: eb0b 0305 add.w r3, fp, r5 - 8009722: aa1a add r2, sp, #104 ; 0x68 - 8009724: 009b lsls r3, r3, #2 - 8009726: 1898 adds r0, r3, r2 - 8009728: 3004 adds r0, #4 - 800972a: 1c69 adds r1, r5, #1 - 800972c: 3704 adds r7, #4 - 800972e: 2200 movs r2, #0 - 8009730: 4465 add r5, ip - 8009732: 9005 str r0, [sp, #20] - 8009734: 428d cmp r5, r1 - 8009736: f6ff af0a blt.w 800954e <__kernel_rem_pio2f+0xba> - 800973a: a81a add r0, sp, #104 ; 0x68 - 800973c: eb02 0c03 add.w ip, r2, r3 - 8009740: 4484 add ip, r0 - 8009742: 9803 ldr r0, [sp, #12] - 8009744: f8dd e008 ldr.w lr, [sp, #8] - 8009748: f850 0021 ldr.w r0, [r0, r1, lsl #2] - 800974c: 9001 str r0, [sp, #4] - 800974e: ee07 0a90 vmov s15, r0 - 8009752: eef8 7ae7 vcvt.f32.s32 s15, s15 - 8009756: 9805 ldr r0, [sp, #20] - 8009758: edcc 7a00 vstr s15, [ip] - 800975c: eddf 7a13 vldr s15, [pc, #76] ; 80097ac <__kernel_rem_pio2f+0x318> - 8009760: eb00 0802 add.w r8, r0, r2 - 8009764: f04f 0c00 mov.w ip, #0 - 8009768: 45d4 cmp ip, sl - 800976a: dd0c ble.n 8009786 <__kernel_rem_pio2f+0x2f2> - 800976c: eb02 0c07 add.w ip, r2, r7 - 8009770: a842 add r0, sp, #264 ; 0x108 - 8009772: 4484 add ip, r0 - 8009774: edcc 7a01 vstr s15, [ip, #4] - 8009778: 3101 adds r1, #1 - 800977a: 3204 adds r2, #4 - 800977c: e7da b.n 8009734 <__kernel_rem_pio2f+0x2a0> - 800977e: 9b04 ldr r3, [sp, #16] - 8009780: f04f 0c01 mov.w ip, #1 - 8009784: e7c7 b.n 8009716 <__kernel_rem_pio2f+0x282> - 8009786: ecfe 6a01 vldmia lr!, {s13} - 800978a: ed38 7a01 vldmdb r8!, {s14} - 800978e: f10c 0c01 add.w ip, ip, #1 - 8009792: eee6 7a87 vfma.f32 s15, s13, s14 - 8009796: e7e7 b.n 8009768 <__kernel_rem_pio2f+0x2d4> - 8009798: 3b01 subs r3, #1 - 800979a: e769 b.n 8009670 <__kernel_rem_pio2f+0x1dc> - 800979c: 0800ab7c .word 0x0800ab7c - 80097a0: 0800ab50 .word 0x0800ab50 - 80097a4: 43800000 .word 0x43800000 - 80097a8: 3b800000 .word 0x3b800000 - 80097ac: 00000000 .word 0x00000000 - 80097b0: 4260 negs r0, r4 - 80097b2: eeb0 0a48 vmov.f32 s0, s16 - 80097b6: f000 fa83 bl 8009cc0 - 80097ba: ed1f 7a06 vldr s14, [pc, #-24] ; 80097a4 <__kernel_rem_pio2f+0x310> - 80097be: eeb4 0ac7 vcmpe.f32 s0, s14 - 80097c2: eef1 fa10 vmrs APSR_nzcv, fpscr - 80097c6: db1a blt.n 80097fe <__kernel_rem_pio2f+0x36a> - 80097c8: ed5f 7a09 vldr s15, [pc, #-36] ; 80097a8 <__kernel_rem_pio2f+0x314> - 80097cc: ee60 7a27 vmul.f32 s15, s0, s15 - 80097d0: aa06 add r2, sp, #24 - 80097d2: eefd 7ae7 vcvt.s32.f32 s15, s15 - 80097d6: a906 add r1, sp, #24 - 80097d8: eef8 7ae7 vcvt.f32.s32 s15, s15 - 80097dc: 3408 adds r4, #8 - 80097de: eea7 0ac7 vfms.f32 s0, s15, s14 - 80097e2: eefd 7ae7 vcvt.s32.f32 s15, s15 - 80097e6: eebd 0ac0 vcvt.s32.f32 s0, s0 - 80097ea: ee10 3a10 vmov r3, s0 - 80097ee: f842 3025 str.w r3, [r2, r5, lsl #2] - 80097f2: 1c6b adds r3, r5, #1 - 80097f4: ee17 2a90 vmov r2, s15 - 80097f8: f841 2023 str.w r2, [r1, r3, lsl #2] - 80097fc: e73f b.n 800967e <__kernel_rem_pio2f+0x1ea> - 80097fe: eebd 0ac0 vcvt.s32.f32 s0, s0 - 8009802: aa06 add r2, sp, #24 - 8009804: ee10 3a10 vmov r3, s0 - 8009808: f842 3025 str.w r3, [r2, r5, lsl #2] - 800980c: 462b mov r3, r5 - 800980e: e736 b.n 800967e <__kernel_rem_pio2f+0x1ea> - 8009810: aa06 add r2, sp, #24 - 8009812: f852 2024 ldr.w r2, [r2, r4, lsl #2] - 8009816: 9202 str r2, [sp, #8] - 8009818: ee07 2a90 vmov s15, r2 - 800981c: eef8 7ae7 vcvt.f32.s32 s15, s15 - 8009820: 3c01 subs r4, #1 - 8009822: ee67 7a80 vmul.f32 s15, s15, s0 - 8009826: ee20 0a07 vmul.f32 s0, s0, s14 - 800982a: ed65 7a01 vstmdb r5!, {s15} - 800982e: e734 b.n 800969a <__kernel_rem_pio2f+0x206> - 8009830: eb00 0c84 add.w ip, r0, r4, lsl #2 - 8009834: ecf7 6a01 vldmia r7!, {s13} - 8009838: ed9c 7a00 vldr s14, [ip] - 800983c: eee6 7a87 vfma.f32 s15, s13, s14 - 8009840: 3401 adds r4, #1 - 8009842: 454c cmp r4, r9 - 8009844: dc01 bgt.n 800984a <__kernel_rem_pio2f+0x3b6> - 8009846: 42a5 cmp r5, r4 - 8009848: daf2 bge.n 8009830 <__kernel_rem_pio2f+0x39c> - 800984a: aa56 add r2, sp, #344 ; 0x158 - 800984c: eb02 0485 add.w r4, r2, r5, lsl #2 - 8009850: ed44 7a28 vstr s15, [r4, #-160] ; 0xffffff60 - 8009854: 3501 adds r5, #1 - 8009856: 3804 subs r0, #4 - 8009858: e723 b.n 80096a2 <__kernel_rem_pio2f+0x20e> - 800985a: 9a64 ldr r2, [sp, #400] ; 0x190 - 800985c: 2a03 cmp r2, #3 - 800985e: d84d bhi.n 80098fc <__kernel_rem_pio2f+0x468> - 8009860: e8df f002 tbb [pc, r2] - 8009864: 021f1f3e .word 0x021f1f3e - 8009868: aa56 add r2, sp, #344 ; 0x158 - 800986a: 4411 add r1, r2 - 800986c: 399c subs r1, #156 ; 0x9c - 800986e: 4608 mov r0, r1 - 8009870: 461c mov r4, r3 - 8009872: 2c00 cmp r4, #0 - 8009874: dc5f bgt.n 8009936 <__kernel_rem_pio2f+0x4a2> - 8009876: 4608 mov r0, r1 - 8009878: 461c mov r4, r3 - 800987a: 2c01 cmp r4, #1 - 800987c: dc6b bgt.n 8009956 <__kernel_rem_pio2f+0x4c2> - 800987e: ed5f 7a35 vldr s15, [pc, #-212] ; 80097ac <__kernel_rem_pio2f+0x318> - 8009882: 2b01 cmp r3, #1 - 8009884: dc77 bgt.n 8009976 <__kernel_rem_pio2f+0x4e2> - 8009886: eddd 6a2e vldr s13, [sp, #184] ; 0xb8 - 800988a: ed9d 7a2f vldr s14, [sp, #188] ; 0xbc - 800988e: f1b8 0f00 cmp.w r8, #0 - 8009892: d176 bne.n 8009982 <__kernel_rem_pio2f+0x4ee> - 8009894: edc6 6a00 vstr s13, [r6] - 8009898: ed86 7a01 vstr s14, [r6, #4] - 800989c: edc6 7a02 vstr s15, [r6, #8] - 80098a0: e02c b.n 80098fc <__kernel_rem_pio2f+0x468> - 80098a2: aa56 add r2, sp, #344 ; 0x158 - 80098a4: 4411 add r1, r2 - 80098a6: ed1f 7a3f vldr s14, [pc, #-252] ; 80097ac <__kernel_rem_pio2f+0x318> - 80098aa: 399c subs r1, #156 ; 0x9c - 80098ac: 4618 mov r0, r3 - 80098ae: 2800 cmp r0, #0 - 80098b0: da32 bge.n 8009918 <__kernel_rem_pio2f+0x484> - 80098b2: f1b8 0f00 cmp.w r8, #0 - 80098b6: d035 beq.n 8009924 <__kernel_rem_pio2f+0x490> - 80098b8: eef1 7a47 vneg.f32 s15, s14 - 80098bc: edc6 7a00 vstr s15, [r6] - 80098c0: eddd 7a2e vldr s15, [sp, #184] ; 0xb8 - 80098c4: ee77 7ac7 vsub.f32 s15, s15, s14 - 80098c8: a82f add r0, sp, #188 ; 0xbc - 80098ca: 2101 movs r1, #1 - 80098cc: 428b cmp r3, r1 - 80098ce: da2c bge.n 800992a <__kernel_rem_pio2f+0x496> - 80098d0: f1b8 0f00 cmp.w r8, #0 - 80098d4: d001 beq.n 80098da <__kernel_rem_pio2f+0x446> - 80098d6: eef1 7a67 vneg.f32 s15, s15 - 80098da: edc6 7a01 vstr s15, [r6, #4] - 80098de: e00d b.n 80098fc <__kernel_rem_pio2f+0x468> - 80098e0: aa56 add r2, sp, #344 ; 0x158 - 80098e2: 4411 add r1, r2 - 80098e4: ed5f 7a4f vldr s15, [pc, #-316] ; 80097ac <__kernel_rem_pio2f+0x318> - 80098e8: 399c subs r1, #156 ; 0x9c - 80098ea: 2b00 cmp r3, #0 - 80098ec: da0e bge.n 800990c <__kernel_rem_pio2f+0x478> - 80098ee: f1b8 0f00 cmp.w r8, #0 - 80098f2: d001 beq.n 80098f8 <__kernel_rem_pio2f+0x464> - 80098f4: eef1 7a67 vneg.f32 s15, s15 - 80098f8: edc6 7a00 vstr s15, [r6] - 80098fc: 9b01 ldr r3, [sp, #4] - 80098fe: f003 0007 and.w r0, r3, #7 - 8009902: b057 add sp, #348 ; 0x15c - 8009904: ecbd 8b04 vpop {d8-d9} - 8009908: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} - 800990c: ed31 7a01 vldmdb r1!, {s14} - 8009910: 3b01 subs r3, #1 - 8009912: ee77 7a87 vadd.f32 s15, s15, s14 - 8009916: e7e8 b.n 80098ea <__kernel_rem_pio2f+0x456> - 8009918: ed71 7a01 vldmdb r1!, {s15} - 800991c: 3801 subs r0, #1 - 800991e: ee37 7a27 vadd.f32 s14, s14, s15 - 8009922: e7c4 b.n 80098ae <__kernel_rem_pio2f+0x41a> - 8009924: eef0 7a47 vmov.f32 s15, s14 - 8009928: e7c8 b.n 80098bc <__kernel_rem_pio2f+0x428> - 800992a: ecb0 7a01 vldmia r0!, {s14} - 800992e: 3101 adds r1, #1 - 8009930: ee77 7a87 vadd.f32 s15, s15, s14 - 8009934: e7ca b.n 80098cc <__kernel_rem_pio2f+0x438> - 8009936: ed50 7a02 vldr s15, [r0, #-8] - 800993a: ed70 6a01 vldmdb r0!, {s13} - 800993e: ee37 7aa6 vadd.f32 s14, s15, s13 - 8009942: 3c01 subs r4, #1 - 8009944: ee77 7ac7 vsub.f32 s15, s15, s14 - 8009948: ed00 7a01 vstr s14, [r0, #-4] - 800994c: ee77 7aa6 vadd.f32 s15, s15, s13 - 8009950: edc0 7a00 vstr s15, [r0] - 8009954: e78d b.n 8009872 <__kernel_rem_pio2f+0x3de> - 8009956: ed50 7a02 vldr s15, [r0, #-8] - 800995a: ed70 6a01 vldmdb r0!, {s13} - 800995e: ee37 7aa6 vadd.f32 s14, s15, s13 - 8009962: 3c01 subs r4, #1 - 8009964: ee77 7ac7 vsub.f32 s15, s15, s14 - 8009968: ed00 7a01 vstr s14, [r0, #-4] - 800996c: ee77 7aa6 vadd.f32 s15, s15, s13 - 8009970: edc0 7a00 vstr s15, [r0] - 8009974: e781 b.n 800987a <__kernel_rem_pio2f+0x3e6> - 8009976: ed31 7a01 vldmdb r1!, {s14} - 800997a: 3b01 subs r3, #1 - 800997c: ee77 7a87 vadd.f32 s15, s15, s14 - 8009980: e77f b.n 8009882 <__kernel_rem_pio2f+0x3ee> - 8009982: eef1 6a66 vneg.f32 s13, s13 - 8009986: eeb1 7a47 vneg.f32 s14, s14 - 800998a: edc6 6a00 vstr s13, [r6] - 800998e: ed86 7a01 vstr s14, [r6, #4] - 8009992: eef1 7a67 vneg.f32 s15, s15 - 8009996: e781 b.n 800989c <__kernel_rem_pio2f+0x408> - -08009998 <__kernel_sinf>: - 8009998: ee10 3a10 vmov r3, s0 - 800999c: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000 - 80099a0: f1b3 5f48 cmp.w r3, #838860800 ; 0x32000000 - 80099a4: da04 bge.n 80099b0 <__kernel_sinf+0x18> - 80099a6: eefd 7ac0 vcvt.s32.f32 s15, s0 - 80099aa: ee17 3a90 vmov r3, s15 - 80099ae: b35b cbz r3, 8009a08 <__kernel_sinf+0x70> - 80099b0: ee20 7a00 vmul.f32 s14, s0, s0 - 80099b4: eddf 7a15 vldr s15, [pc, #84] ; 8009a0c <__kernel_sinf+0x74> - 80099b8: ed9f 6a15 vldr s12, [pc, #84] ; 8009a10 <__kernel_sinf+0x78> - 80099bc: eea7 6a27 vfma.f32 s12, s14, s15 - 80099c0: eddf 7a14 vldr s15, [pc, #80] ; 8009a14 <__kernel_sinf+0x7c> - 80099c4: eee6 7a07 vfma.f32 s15, s12, s14 - 80099c8: ed9f 6a13 vldr s12, [pc, #76] ; 8009a18 <__kernel_sinf+0x80> - 80099cc: eea7 6a87 vfma.f32 s12, s15, s14 - 80099d0: eddf 7a12 vldr s15, [pc, #72] ; 8009a1c <__kernel_sinf+0x84> - 80099d4: ee60 6a07 vmul.f32 s13, s0, s14 - 80099d8: eee6 7a07 vfma.f32 s15, s12, s14 - 80099dc: b930 cbnz r0, 80099ec <__kernel_sinf+0x54> - 80099de: ed9f 6a10 vldr s12, [pc, #64] ; 8009a20 <__kernel_sinf+0x88> - 80099e2: eea7 6a27 vfma.f32 s12, s14, s15 - 80099e6: eea6 0a26 vfma.f32 s0, s12, s13 - 80099ea: 4770 bx lr - 80099ec: ee67 7ae6 vnmul.f32 s15, s15, s13 - 80099f0: eeb6 6a00 vmov.f32 s12, #96 ; 0x3f000000 0.5 - 80099f4: eee0 7a86 vfma.f32 s15, s1, s12 - 80099f8: eed7 0a87 vfnms.f32 s1, s15, s14 - 80099fc: eddf 7a09 vldr s15, [pc, #36] ; 8009a24 <__kernel_sinf+0x8c> - 8009a00: eee6 0aa7 vfma.f32 s1, s13, s15 - 8009a04: ee30 0a60 vsub.f32 s0, s0, s1 - 8009a08: 4770 bx lr - 8009a0a: bf00 nop - 8009a0c: 2f2ec9d3 .word 0x2f2ec9d3 - 8009a10: b2d72f34 .word 0xb2d72f34 - 8009a14: 3638ef1b .word 0x3638ef1b - 8009a18: b9500d01 .word 0xb9500d01 - 8009a1c: 3c088889 .word 0x3c088889 - 8009a20: be2aaaab .word 0xbe2aaaab - 8009a24: 3e2aaaab .word 0x3e2aaaab - -08009a28 : - 8009a28: ec51 0b10 vmov r0, r1, d0 - 8009a2c: ee10 2a10 vmov r2, s0 - 8009a30: f021 4300 bic.w r3, r1, #2147483648 ; 0x80000000 - 8009a34: ec43 2b10 vmov d0, r2, r3 - 8009a38: 4770 bx lr - 8009a3a: 0000 movs r0, r0 - 8009a3c: 0000 movs r0, r0 +08009390 <__kernel_sin>: + 8009390: ee10 3a90 vmov r3, s1 + 8009394: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000 + 8009398: f1b3 5f79 cmp.w r3, #1044381696 ; 0x3e400000 + 800939c: da04 bge.n 80093a8 <__kernel_sin+0x18> + 800939e: eefd 7bc0 vcvt.s32.f64 s15, d0 + 80093a2: ee17 3a90 vmov r3, s15 + 80093a6: b35b cbz r3, 8009400 <__kernel_sin+0x70> + 80093a8: ee20 6b00 vmul.f64 d6, d0, d0 + 80093ac: ee20 5b06 vmul.f64 d5, d0, d6 + 80093b0: ed9f 7b15 vldr d7, [pc, #84] ; 8009408 <__kernel_sin+0x78> + 80093b4: ed9f 4b16 vldr d4, [pc, #88] ; 8009410 <__kernel_sin+0x80> + 80093b8: eea6 4b07 vfma.f64 d4, d6, d7 + 80093bc: ed9f 7b16 vldr d7, [pc, #88] ; 8009418 <__kernel_sin+0x88> + 80093c0: eea4 7b06 vfma.f64 d7, d4, d6 + 80093c4: ed9f 4b16 vldr d4, [pc, #88] ; 8009420 <__kernel_sin+0x90> + 80093c8: eea7 4b06 vfma.f64 d4, d7, d6 + 80093cc: ed9f 7b16 vldr d7, [pc, #88] ; 8009428 <__kernel_sin+0x98> + 80093d0: eea4 7b06 vfma.f64 d7, d4, d6 + 80093d4: b930 cbnz r0, 80093e4 <__kernel_sin+0x54> + 80093d6: ed9f 4b16 vldr d4, [pc, #88] ; 8009430 <__kernel_sin+0xa0> + 80093da: eea6 4b07 vfma.f64 d4, d6, d7 + 80093de: eea4 0b05 vfma.f64 d0, d4, d5 + 80093e2: 4770 bx lr + 80093e4: ee27 7b45 vnmul.f64 d7, d7, d5 + 80093e8: eeb6 4b00 vmov.f64 d4, #96 ; 0x3f000000 0.5 + 80093ec: eea1 7b04 vfma.f64 d7, d1, d4 + 80093f0: ee97 1b06 vfnms.f64 d1, d7, d6 + 80093f4: ed9f 7b10 vldr d7, [pc, #64] ; 8009438 <__kernel_sin+0xa8> + 80093f8: eea5 1b07 vfma.f64 d1, d5, d7 + 80093fc: ee30 0b41 vsub.f64 d0, d0, d1 + 8009400: 4770 bx lr + 8009402: bf00 nop + 8009404: f3af 8000 nop.w + 8009408: 5acfd57c .word 0x5acfd57c + 800940c: 3de5d93a .word 0x3de5d93a + 8009410: 8a2b9ceb .word 0x8a2b9ceb + 8009414: be5ae5e6 .word 0xbe5ae5e6 + 8009418: 57b1fe7d .word 0x57b1fe7d + 800941c: 3ec71de3 .word 0x3ec71de3 + 8009420: 19c161d5 .word 0x19c161d5 + 8009424: bf2a01a0 .word 0xbf2a01a0 + 8009428: 1110f8a6 .word 0x1110f8a6 + 800942c: 3f811111 .word 0x3f811111 + 8009430: 55555549 .word 0x55555549 + 8009434: bfc55555 .word 0xbfc55555 + 8009438: 55555549 .word 0x55555549 + 800943c: 3fc55555 .word 0x3fc55555 + +08009440 <__kernel_cosf>: + 8009440: ee10 3a10 vmov r3, s0 + 8009444: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000 + 8009448: f1b3 5f48 cmp.w r3, #838860800 ; 0x32000000 + 800944c: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 + 8009450: da05 bge.n 800945e <__kernel_cosf+0x1e> + 8009452: eefd 7ac0 vcvt.s32.f32 s15, s0 + 8009456: ee17 2a90 vmov r2, s15 + 800945a: 2a00 cmp r2, #0 + 800945c: d03b beq.n 80094d6 <__kernel_cosf+0x96> + 800945e: ee20 6a00 vmul.f32 s12, s0, s0 + 8009462: eeb6 7a00 vmov.f32 s14, #96 ; 0x3f000000 0.5 + 8009466: eddf 5a1d vldr s11, [pc, #116] ; 80094dc <__kernel_cosf+0x9c> + 800946a: 4a1d ldr r2, [pc, #116] ; (80094e0 <__kernel_cosf+0xa0>) + 800946c: ee66 7a07 vmul.f32 s15, s12, s14 + 8009470: ed9f 7a1c vldr s14, [pc, #112] ; 80094e4 <__kernel_cosf+0xa4> + 8009474: eea6 7a25 vfma.f32 s14, s12, s11 + 8009478: 4293 cmp r3, r2 + 800947a: eddf 5a1b vldr s11, [pc, #108] ; 80094e8 <__kernel_cosf+0xa8> + 800947e: eee7 5a06 vfma.f32 s11, s14, s12 + 8009482: ed9f 7a1a vldr s14, [pc, #104] ; 80094ec <__kernel_cosf+0xac> + 8009486: eea5 7a86 vfma.f32 s14, s11, s12 + 800948a: eddf 5a19 vldr s11, [pc, #100] ; 80094f0 <__kernel_cosf+0xb0> + 800948e: eee7 5a06 vfma.f32 s11, s14, s12 + 8009492: ed9f 7a18 vldr s14, [pc, #96] ; 80094f4 <__kernel_cosf+0xb4> + 8009496: eea5 7a86 vfma.f32 s14, s11, s12 + 800949a: ee60 0ac0 vnmul.f32 s1, s1, s0 + 800949e: ee27 7a06 vmul.f32 s14, s14, s12 + 80094a2: eee6 0a07 vfma.f32 s1, s12, s14 + 80094a6: dc04 bgt.n 80094b2 <__kernel_cosf+0x72> + 80094a8: ee77 0ae0 vsub.f32 s1, s15, s1 + 80094ac: ee36 0ae0 vsub.f32 s0, s13, s1 + 80094b0: 4770 bx lr + 80094b2: 4a11 ldr r2, [pc, #68] ; (80094f8 <__kernel_cosf+0xb8>) + 80094b4: 4293 cmp r3, r2 + 80094b6: bfda itte le + 80094b8: f103 437f addle.w r3, r3, #4278190080 ; 0xff000000 + 80094bc: ee07 3a10 vmovle s14, r3 + 80094c0: eeb5 7a02 vmovgt.f32 s14, #82 ; 0x3e900000 0.2812500 + 80094c4: ee77 7ac7 vsub.f32 s15, s15, s14 + 80094c8: ee36 0ac7 vsub.f32 s0, s13, s14 + 80094cc: ee77 7ae0 vsub.f32 s15, s15, s1 + 80094d0: ee30 0a67 vsub.f32 s0, s0, s15 + 80094d4: 4770 bx lr + 80094d6: eeb0 0a66 vmov.f32 s0, s13 + 80094da: 4770 bx lr + 80094dc: ad47d74e .word 0xad47d74e + 80094e0: 3e999999 .word 0x3e999999 + 80094e4: 310f74f6 .word 0x310f74f6 + 80094e8: b493f27c .word 0xb493f27c + 80094ec: 37d00d01 .word 0x37d00d01 + 80094f0: bab60b61 .word 0xbab60b61 + 80094f4: 3d2aaaab .word 0x3d2aaaab + 80094f8: 3f480000 .word 0x3f480000 + +080094fc <__kernel_rem_pio2f>: + 80094fc: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} + 8009500: ed2d 8b04 vpush {d8-d9} + 8009504: b0d7 sub sp, #348 ; 0x15c + 8009506: 469b mov fp, r3 + 8009508: 460e mov r6, r1 + 800950a: 4bbe ldr r3, [pc, #760] ; (8009804 <__kernel_rem_pio2f+0x308>) + 800950c: 9964 ldr r1, [sp, #400] ; 0x190 + 800950e: 9002 str r0, [sp, #8] + 8009510: f853 9021 ldr.w r9, [r3, r1, lsl #2] + 8009514: 9865 ldr r0, [sp, #404] ; 0x194 + 8009516: ed9f 7abf vldr s14, [pc, #764] ; 8009814 <__kernel_rem_pio2f+0x318> + 800951a: 1ed1 subs r1, r2, #3 + 800951c: 2308 movs r3, #8 + 800951e: fb91 f1f3 sdiv r1, r1, r3 + 8009522: ea21 71e1 bic.w r1, r1, r1, asr #31 + 8009526: f10b 3aff add.w sl, fp, #4294967295 ; 0xffffffff + 800952a: 1c4c adds r4, r1, #1 + 800952c: eba2 04c4 sub.w r4, r2, r4, lsl #3 + 8009530: eba1 050a sub.w r5, r1, sl + 8009534: aa1a add r2, sp, #104 ; 0x68 + 8009536: eb09 070a add.w r7, r9, sl + 800953a: eb00 0c85 add.w ip, r0, r5, lsl #2 + 800953e: 4696 mov lr, r2 + 8009540: 2300 movs r3, #0 + 8009542: 42bb cmp r3, r7 + 8009544: dd0f ble.n 8009566 <__kernel_rem_pio2f+0x6a> + 8009546: af42 add r7, sp, #264 ; 0x108 + 8009548: 2200 movs r2, #0 + 800954a: 454a cmp r2, r9 + 800954c: dc27 bgt.n 800959e <__kernel_rem_pio2f+0xa2> + 800954e: f10d 0c68 add.w ip, sp, #104 ; 0x68 + 8009552: eb0b 0302 add.w r3, fp, r2 + 8009556: eb0c 0383 add.w r3, ip, r3, lsl #2 + 800955a: 9d02 ldr r5, [sp, #8] + 800955c: eddf 7aad vldr s15, [pc, #692] ; 8009814 <__kernel_rem_pio2f+0x318> + 8009560: f04f 0c00 mov.w ip, #0 + 8009564: e015 b.n 8009592 <__kernel_rem_pio2f+0x96> + 8009566: 42dd cmn r5, r3 + 8009568: bf5d ittte pl + 800956a: f85c 2023 ldrpl.w r2, [ip, r3, lsl #2] + 800956e: ee07 2a90 vmovpl s15, r2 + 8009572: eef8 7ae7 vcvtpl.f32.s32 s15, s15 + 8009576: eef0 7a47 vmovmi.f32 s15, s14 + 800957a: ecee 7a01 vstmia lr!, {s15} + 800957e: 3301 adds r3, #1 + 8009580: e7df b.n 8009542 <__kernel_rem_pio2f+0x46> + 8009582: ecf5 6a01 vldmia r5!, {s13} + 8009586: ed33 7a01 vldmdb r3!, {s14} + 800958a: eee6 7a87 vfma.f32 s15, s13, s14 + 800958e: f10c 0c01 add.w ip, ip, #1 + 8009592: 45d4 cmp ip, sl + 8009594: ddf5 ble.n 8009582 <__kernel_rem_pio2f+0x86> + 8009596: ece7 7a01 vstmia r7!, {s15} + 800959a: 3201 adds r2, #1 + 800959c: e7d5 b.n 800954a <__kernel_rem_pio2f+0x4e> + 800959e: ab06 add r3, sp, #24 + 80095a0: eb03 0389 add.w r3, r3, r9, lsl #2 + 80095a4: 9304 str r3, [sp, #16] + 80095a6: eddf 8a9a vldr s17, [pc, #616] ; 8009810 <__kernel_rem_pio2f+0x314> + 80095aa: ed9f 9a98 vldr s18, [pc, #608] ; 800980c <__kernel_rem_pio2f+0x310> + 80095ae: eb00 0381 add.w r3, r0, r1, lsl #2 + 80095b2: 9303 str r3, [sp, #12] + 80095b4: 464d mov r5, r9 + 80095b6: ab56 add r3, sp, #344 ; 0x158 + 80095b8: f105 4780 add.w r7, r5, #1073741824 ; 0x40000000 + 80095bc: eb03 0385 add.w r3, r3, r5, lsl #2 + 80095c0: 3f01 subs r7, #1 + 80095c2: ed13 0a14 vldr s0, [r3, #-80] ; 0xffffffb0 + 80095c6: 00bf lsls r7, r7, #2 + 80095c8: ab56 add r3, sp, #344 ; 0x158 + 80095ca: 19da adds r2, r3, r7 + 80095cc: 3a4c subs r2, #76 ; 0x4c + 80095ce: 2300 movs r3, #0 + 80095d0: 1ae9 subs r1, r5, r3 + 80095d2: 2900 cmp r1, #0 + 80095d4: dc4c bgt.n 8009670 <__kernel_rem_pio2f+0x174> + 80095d6: 4620 mov r0, r4 + 80095d8: f000 fba6 bl 8009d28 + 80095dc: eeb0 8a40 vmov.f32 s16, s0 + 80095e0: eeb4 0a00 vmov.f32 s0, #64 ; 0x3e000000 0.125 + 80095e4: ee28 0a00 vmul.f32 s0, s16, s0 + 80095e8: f000 fb5c bl 8009ca4 + 80095ec: eef2 7a00 vmov.f32 s15, #32 ; 0x41000000 8.0 + 80095f0: eea0 8a67 vfms.f32 s16, s0, s15 + 80095f4: 2c00 cmp r4, #0 + 80095f6: eefd 7ac8 vcvt.s32.f32 s15, s16 + 80095fa: edcd 7a01 vstr s15, [sp, #4] + 80095fe: eef8 7ae7 vcvt.f32.s32 s15, s15 + 8009602: ee38 8a67 vsub.f32 s16, s16, s15 + 8009606: dd48 ble.n 800969a <__kernel_rem_pio2f+0x19e> + 8009608: 1e69 subs r1, r5, #1 + 800960a: ab06 add r3, sp, #24 + 800960c: f1c4 0008 rsb r0, r4, #8 + 8009610: f853 c021 ldr.w ip, [r3, r1, lsl #2] + 8009614: 9a01 ldr r2, [sp, #4] + 8009616: fa4c f300 asr.w r3, ip, r0 + 800961a: 441a add r2, r3 + 800961c: 4083 lsls r3, r0 + 800961e: 9201 str r2, [sp, #4] + 8009620: ebac 0203 sub.w r2, ip, r3 + 8009624: ab06 add r3, sp, #24 + 8009626: f843 2021 str.w r2, [r3, r1, lsl #2] + 800962a: f1c4 0307 rsb r3, r4, #7 + 800962e: fa42 f803 asr.w r8, r2, r3 + 8009632: f1b8 0f00 cmp.w r8, #0 + 8009636: dd41 ble.n 80096bc <__kernel_rem_pio2f+0x1c0> + 8009638: 9b01 ldr r3, [sp, #4] + 800963a: 2000 movs r0, #0 + 800963c: 3301 adds r3, #1 + 800963e: 9301 str r3, [sp, #4] + 8009640: 4601 mov r1, r0 + 8009642: 4285 cmp r5, r0 + 8009644: dc6d bgt.n 8009722 <__kernel_rem_pio2f+0x226> + 8009646: 2c00 cmp r4, #0 + 8009648: dd04 ble.n 8009654 <__kernel_rem_pio2f+0x158> + 800964a: 2c01 cmp r4, #1 + 800964c: d07e beq.n 800974c <__kernel_rem_pio2f+0x250> + 800964e: 2c02 cmp r4, #2 + 8009650: f000 8086 beq.w 8009760 <__kernel_rem_pio2f+0x264> + 8009654: f1b8 0f02 cmp.w r8, #2 + 8009658: d130 bne.n 80096bc <__kernel_rem_pio2f+0x1c0> + 800965a: eeb7 0a00 vmov.f32 s0, #112 ; 0x3f800000 1.0 + 800965e: ee30 8a48 vsub.f32 s16, s0, s16 + 8009662: b359 cbz r1, 80096bc <__kernel_rem_pio2f+0x1c0> + 8009664: 4620 mov r0, r4 + 8009666: f000 fb5f bl 8009d28 + 800966a: ee38 8a40 vsub.f32 s16, s16, s0 + 800966e: e025 b.n 80096bc <__kernel_rem_pio2f+0x1c0> + 8009670: ee60 7a28 vmul.f32 s15, s0, s17 + 8009674: a806 add r0, sp, #24 + 8009676: eefd 7ae7 vcvt.s32.f32 s15, s15 + 800967a: eef8 7ae7 vcvt.f32.s32 s15, s15 + 800967e: eea7 0ac9 vfms.f32 s0, s15, s18 + 8009682: eebd 0ac0 vcvt.s32.f32 s0, s0 + 8009686: ee10 1a10 vmov r1, s0 + 800968a: ed32 0a01 vldmdb r2!, {s0} + 800968e: f840 1023 str.w r1, [r0, r3, lsl #2] + 8009692: ee37 0a80 vadd.f32 s0, s15, s0 + 8009696: 3301 adds r3, #1 + 8009698: e79a b.n 80095d0 <__kernel_rem_pio2f+0xd4> + 800969a: d106 bne.n 80096aa <__kernel_rem_pio2f+0x1ae> + 800969c: 1e6b subs r3, r5, #1 + 800969e: aa06 add r2, sp, #24 + 80096a0: f852 2023 ldr.w r2, [r2, r3, lsl #2] + 80096a4: ea4f 2822 mov.w r8, r2, asr #8 + 80096a8: e7c3 b.n 8009632 <__kernel_rem_pio2f+0x136> + 80096aa: eef6 7a00 vmov.f32 s15, #96 ; 0x3f000000 0.5 + 80096ae: eeb4 8ae7 vcmpe.f32 s16, s15 + 80096b2: eef1 fa10 vmrs APSR_nzcv, fpscr + 80096b6: da31 bge.n 800971c <__kernel_rem_pio2f+0x220> + 80096b8: f04f 0800 mov.w r8, #0 + 80096bc: eeb5 8a40 vcmp.f32 s16, #0.0 + 80096c0: eef1 fa10 vmrs APSR_nzcv, fpscr + 80096c4: f040 80a8 bne.w 8009818 <__kernel_rem_pio2f+0x31c> + 80096c8: 1e6b subs r3, r5, #1 + 80096ca: 4618 mov r0, r3 + 80096cc: 2200 movs r2, #0 + 80096ce: 4548 cmp r0, r9 + 80096d0: da4d bge.n 800976e <__kernel_rem_pio2f+0x272> + 80096d2: 2a00 cmp r2, #0 + 80096d4: f000 8087 beq.w 80097e6 <__kernel_rem_pio2f+0x2ea> + 80096d8: aa06 add r2, sp, #24 + 80096da: 3c08 subs r4, #8 + 80096dc: f852 1023 ldr.w r1, [r2, r3, lsl #2] + 80096e0: 2900 cmp r1, #0 + 80096e2: f000 808d beq.w 8009800 <__kernel_rem_pio2f+0x304> + 80096e6: 4620 mov r0, r4 + 80096e8: eeb7 0a00 vmov.f32 s0, #112 ; 0x3f800000 1.0 + 80096ec: 9302 str r3, [sp, #8] + 80096ee: f000 fb1b bl 8009d28 + 80096f2: 9b02 ldr r3, [sp, #8] + 80096f4: ed9f 7a46 vldr s14, [pc, #280] ; 8009810 <__kernel_rem_pio2f+0x314> + 80096f8: 0099 lsls r1, r3, #2 + 80096fa: aa42 add r2, sp, #264 ; 0x108 + 80096fc: 1850 adds r0, r2, r1 + 80096fe: 1d05 adds r5, r0, #4 + 8009700: 461c mov r4, r3 + 8009702: 2c00 cmp r4, #0 + 8009704: f280 80b8 bge.w 8009878 <__kernel_rem_pio2f+0x37c> + 8009708: 2500 movs r5, #0 + 800970a: 1b5c subs r4, r3, r5 + 800970c: 2c00 cmp r4, #0 + 800970e: f2c0 80d8 blt.w 80098c2 <__kernel_rem_pio2f+0x3c6> + 8009712: 4f3d ldr r7, [pc, #244] ; (8009808 <__kernel_rem_pio2f+0x30c>) + 8009714: eddf 7a3f vldr s15, [pc, #252] ; 8009814 <__kernel_rem_pio2f+0x318> + 8009718: 2400 movs r4, #0 + 800971a: e0c6 b.n 80098aa <__kernel_rem_pio2f+0x3ae> + 800971c: f04f 0802 mov.w r8, #2 + 8009720: e78a b.n 8009638 <__kernel_rem_pio2f+0x13c> + 8009722: ab06 add r3, sp, #24 + 8009724: f853 3020 ldr.w r3, [r3, r0, lsl #2] + 8009728: b949 cbnz r1, 800973e <__kernel_rem_pio2f+0x242> + 800972a: b12b cbz r3, 8009738 <__kernel_rem_pio2f+0x23c> + 800972c: aa06 add r2, sp, #24 + 800972e: f5c3 7380 rsb r3, r3, #256 ; 0x100 + 8009732: f842 3020 str.w r3, [r2, r0, lsl #2] + 8009736: 2301 movs r3, #1 + 8009738: 3001 adds r0, #1 + 800973a: 4619 mov r1, r3 + 800973c: e781 b.n 8009642 <__kernel_rem_pio2f+0x146> + 800973e: aa06 add r2, sp, #24 + 8009740: f1c3 03ff rsb r3, r3, #255 ; 0xff + 8009744: f842 3020 str.w r3, [r2, r0, lsl #2] + 8009748: 460b mov r3, r1 + 800974a: e7f5 b.n 8009738 <__kernel_rem_pio2f+0x23c> + 800974c: 1e68 subs r0, r5, #1 + 800974e: ab06 add r3, sp, #24 + 8009750: f853 3020 ldr.w r3, [r3, r0, lsl #2] + 8009754: f003 037f and.w r3, r3, #127 ; 0x7f + 8009758: aa06 add r2, sp, #24 + 800975a: f842 3020 str.w r3, [r2, r0, lsl #2] + 800975e: e779 b.n 8009654 <__kernel_rem_pio2f+0x158> + 8009760: 1e68 subs r0, r5, #1 + 8009762: ab06 add r3, sp, #24 + 8009764: f853 3020 ldr.w r3, [r3, r0, lsl #2] + 8009768: f003 033f and.w r3, r3, #63 ; 0x3f + 800976c: e7f4 b.n 8009758 <__kernel_rem_pio2f+0x25c> + 800976e: a906 add r1, sp, #24 + 8009770: f851 1020 ldr.w r1, [r1, r0, lsl #2] + 8009774: 3801 subs r0, #1 + 8009776: 430a orrs r2, r1 + 8009778: e7a9 b.n 80096ce <__kernel_rem_pio2f+0x1d2> + 800977a: f10c 0c01 add.w ip, ip, #1 + 800977e: f853 2d04 ldr.w r2, [r3, #-4]! + 8009782: 2a00 cmp r2, #0 + 8009784: d0f9 beq.n 800977a <__kernel_rem_pio2f+0x27e> + 8009786: eb0b 0305 add.w r3, fp, r5 + 800978a: aa1a add r2, sp, #104 ; 0x68 + 800978c: 009b lsls r3, r3, #2 + 800978e: 1898 adds r0, r3, r2 + 8009790: 3004 adds r0, #4 + 8009792: 1c69 adds r1, r5, #1 + 8009794: 3704 adds r7, #4 + 8009796: 2200 movs r2, #0 + 8009798: 4465 add r5, ip + 800979a: 9005 str r0, [sp, #20] + 800979c: 428d cmp r5, r1 + 800979e: f6ff af0a blt.w 80095b6 <__kernel_rem_pio2f+0xba> + 80097a2: a81a add r0, sp, #104 ; 0x68 + 80097a4: eb02 0c03 add.w ip, r2, r3 + 80097a8: 4484 add ip, r0 + 80097aa: 9803 ldr r0, [sp, #12] + 80097ac: f8dd e008 ldr.w lr, [sp, #8] + 80097b0: f850 0021 ldr.w r0, [r0, r1, lsl #2] + 80097b4: 9001 str r0, [sp, #4] + 80097b6: ee07 0a90 vmov s15, r0 + 80097ba: eef8 7ae7 vcvt.f32.s32 s15, s15 + 80097be: 9805 ldr r0, [sp, #20] + 80097c0: edcc 7a00 vstr s15, [ip] + 80097c4: eddf 7a13 vldr s15, [pc, #76] ; 8009814 <__kernel_rem_pio2f+0x318> + 80097c8: eb00 0802 add.w r8, r0, r2 + 80097cc: f04f 0c00 mov.w ip, #0 + 80097d0: 45d4 cmp ip, sl + 80097d2: dd0c ble.n 80097ee <__kernel_rem_pio2f+0x2f2> + 80097d4: eb02 0c07 add.w ip, r2, r7 + 80097d8: a842 add r0, sp, #264 ; 0x108 + 80097da: 4484 add ip, r0 + 80097dc: edcc 7a01 vstr s15, [ip, #4] + 80097e0: 3101 adds r1, #1 + 80097e2: 3204 adds r2, #4 + 80097e4: e7da b.n 800979c <__kernel_rem_pio2f+0x2a0> + 80097e6: 9b04 ldr r3, [sp, #16] + 80097e8: f04f 0c01 mov.w ip, #1 + 80097ec: e7c7 b.n 800977e <__kernel_rem_pio2f+0x282> + 80097ee: ecfe 6a01 vldmia lr!, {s13} + 80097f2: ed38 7a01 vldmdb r8!, {s14} + 80097f6: f10c 0c01 add.w ip, ip, #1 + 80097fa: eee6 7a87 vfma.f32 s15, s13, s14 + 80097fe: e7e7 b.n 80097d0 <__kernel_rem_pio2f+0x2d4> + 8009800: 3b01 subs r3, #1 + 8009802: e769 b.n 80096d8 <__kernel_rem_pio2f+0x1dc> + 8009804: 0800abe4 .word 0x0800abe4 + 8009808: 0800abb8 .word 0x0800abb8 + 800980c: 43800000 .word 0x43800000 + 8009810: 3b800000 .word 0x3b800000 + 8009814: 00000000 .word 0x00000000 + 8009818: 4260 negs r0, r4 + 800981a: eeb0 0a48 vmov.f32 s0, s16 + 800981e: f000 fa83 bl 8009d28 + 8009822: ed1f 7a06 vldr s14, [pc, #-24] ; 800980c <__kernel_rem_pio2f+0x310> + 8009826: eeb4 0ac7 vcmpe.f32 s0, s14 + 800982a: eef1 fa10 vmrs APSR_nzcv, fpscr + 800982e: db1a blt.n 8009866 <__kernel_rem_pio2f+0x36a> + 8009830: ed5f 7a09 vldr s15, [pc, #-36] ; 8009810 <__kernel_rem_pio2f+0x314> + 8009834: ee60 7a27 vmul.f32 s15, s0, s15 + 8009838: aa06 add r2, sp, #24 + 800983a: eefd 7ae7 vcvt.s32.f32 s15, s15 + 800983e: a906 add r1, sp, #24 + 8009840: eef8 7ae7 vcvt.f32.s32 s15, s15 + 8009844: 3408 adds r4, #8 + 8009846: eea7 0ac7 vfms.f32 s0, s15, s14 + 800984a: eefd 7ae7 vcvt.s32.f32 s15, s15 + 800984e: eebd 0ac0 vcvt.s32.f32 s0, s0 + 8009852: ee10 3a10 vmov r3, s0 + 8009856: f842 3025 str.w r3, [r2, r5, lsl #2] + 800985a: 1c6b adds r3, r5, #1 + 800985c: ee17 2a90 vmov r2, s15 + 8009860: f841 2023 str.w r2, [r1, r3, lsl #2] + 8009864: e73f b.n 80096e6 <__kernel_rem_pio2f+0x1ea> + 8009866: eebd 0ac0 vcvt.s32.f32 s0, s0 + 800986a: aa06 add r2, sp, #24 + 800986c: ee10 3a10 vmov r3, s0 + 8009870: f842 3025 str.w r3, [r2, r5, lsl #2] + 8009874: 462b mov r3, r5 + 8009876: e736 b.n 80096e6 <__kernel_rem_pio2f+0x1ea> + 8009878: aa06 add r2, sp, #24 + 800987a: f852 2024 ldr.w r2, [r2, r4, lsl #2] + 800987e: 9202 str r2, [sp, #8] + 8009880: ee07 2a90 vmov s15, r2 + 8009884: eef8 7ae7 vcvt.f32.s32 s15, s15 + 8009888: 3c01 subs r4, #1 + 800988a: ee67 7a80 vmul.f32 s15, s15, s0 + 800988e: ee20 0a07 vmul.f32 s0, s0, s14 + 8009892: ed65 7a01 vstmdb r5!, {s15} + 8009896: e734 b.n 8009702 <__kernel_rem_pio2f+0x206> + 8009898: eb00 0c84 add.w ip, r0, r4, lsl #2 + 800989c: ecf7 6a01 vldmia r7!, {s13} + 80098a0: ed9c 7a00 vldr s14, [ip] + 80098a4: eee6 7a87 vfma.f32 s15, s13, s14 + 80098a8: 3401 adds r4, #1 + 80098aa: 454c cmp r4, r9 + 80098ac: dc01 bgt.n 80098b2 <__kernel_rem_pio2f+0x3b6> + 80098ae: 42a5 cmp r5, r4 + 80098b0: daf2 bge.n 8009898 <__kernel_rem_pio2f+0x39c> + 80098b2: aa56 add r2, sp, #344 ; 0x158 + 80098b4: eb02 0485 add.w r4, r2, r5, lsl #2 + 80098b8: ed44 7a28 vstr s15, [r4, #-160] ; 0xffffff60 + 80098bc: 3501 adds r5, #1 + 80098be: 3804 subs r0, #4 + 80098c0: e723 b.n 800970a <__kernel_rem_pio2f+0x20e> + 80098c2: 9a64 ldr r2, [sp, #400] ; 0x190 + 80098c4: 2a03 cmp r2, #3 + 80098c6: d84d bhi.n 8009964 <__kernel_rem_pio2f+0x468> + 80098c8: e8df f002 tbb [pc, r2] + 80098cc: 021f1f3e .word 0x021f1f3e + 80098d0: aa56 add r2, sp, #344 ; 0x158 + 80098d2: 4411 add r1, r2 + 80098d4: 399c subs r1, #156 ; 0x9c + 80098d6: 4608 mov r0, r1 + 80098d8: 461c mov r4, r3 + 80098da: 2c00 cmp r4, #0 + 80098dc: dc5f bgt.n 800999e <__kernel_rem_pio2f+0x4a2> + 80098de: 4608 mov r0, r1 + 80098e0: 461c mov r4, r3 + 80098e2: 2c01 cmp r4, #1 + 80098e4: dc6b bgt.n 80099be <__kernel_rem_pio2f+0x4c2> + 80098e6: ed5f 7a35 vldr s15, [pc, #-212] ; 8009814 <__kernel_rem_pio2f+0x318> + 80098ea: 2b01 cmp r3, #1 + 80098ec: dc77 bgt.n 80099de <__kernel_rem_pio2f+0x4e2> + 80098ee: eddd 6a2e vldr s13, [sp, #184] ; 0xb8 + 80098f2: ed9d 7a2f vldr s14, [sp, #188] ; 0xbc + 80098f6: f1b8 0f00 cmp.w r8, #0 + 80098fa: d176 bne.n 80099ea <__kernel_rem_pio2f+0x4ee> + 80098fc: edc6 6a00 vstr s13, [r6] + 8009900: ed86 7a01 vstr s14, [r6, #4] + 8009904: edc6 7a02 vstr s15, [r6, #8] + 8009908: e02c b.n 8009964 <__kernel_rem_pio2f+0x468> + 800990a: aa56 add r2, sp, #344 ; 0x158 + 800990c: 4411 add r1, r2 + 800990e: ed1f 7a3f vldr s14, [pc, #-252] ; 8009814 <__kernel_rem_pio2f+0x318> + 8009912: 399c subs r1, #156 ; 0x9c + 8009914: 4618 mov r0, r3 + 8009916: 2800 cmp r0, #0 + 8009918: da32 bge.n 8009980 <__kernel_rem_pio2f+0x484> + 800991a: f1b8 0f00 cmp.w r8, #0 + 800991e: d035 beq.n 800998c <__kernel_rem_pio2f+0x490> + 8009920: eef1 7a47 vneg.f32 s15, s14 + 8009924: edc6 7a00 vstr s15, [r6] + 8009928: eddd 7a2e vldr s15, [sp, #184] ; 0xb8 + 800992c: ee77 7ac7 vsub.f32 s15, s15, s14 + 8009930: a82f add r0, sp, #188 ; 0xbc + 8009932: 2101 movs r1, #1 + 8009934: 428b cmp r3, r1 + 8009936: da2c bge.n 8009992 <__kernel_rem_pio2f+0x496> + 8009938: f1b8 0f00 cmp.w r8, #0 + 800993c: d001 beq.n 8009942 <__kernel_rem_pio2f+0x446> + 800993e: eef1 7a67 vneg.f32 s15, s15 + 8009942: edc6 7a01 vstr s15, [r6, #4] + 8009946: e00d b.n 8009964 <__kernel_rem_pio2f+0x468> + 8009948: aa56 add r2, sp, #344 ; 0x158 + 800994a: 4411 add r1, r2 + 800994c: ed5f 7a4f vldr s15, [pc, #-316] ; 8009814 <__kernel_rem_pio2f+0x318> + 8009950: 399c subs r1, #156 ; 0x9c + 8009952: 2b00 cmp r3, #0 + 8009954: da0e bge.n 8009974 <__kernel_rem_pio2f+0x478> + 8009956: f1b8 0f00 cmp.w r8, #0 + 800995a: d001 beq.n 8009960 <__kernel_rem_pio2f+0x464> + 800995c: eef1 7a67 vneg.f32 s15, s15 + 8009960: edc6 7a00 vstr s15, [r6] + 8009964: 9b01 ldr r3, [sp, #4] + 8009966: f003 0007 and.w r0, r3, #7 + 800996a: b057 add sp, #348 ; 0x15c + 800996c: ecbd 8b04 vpop {d8-d9} + 8009970: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} + 8009974: ed31 7a01 vldmdb r1!, {s14} + 8009978: 3b01 subs r3, #1 + 800997a: ee77 7a87 vadd.f32 s15, s15, s14 + 800997e: e7e8 b.n 8009952 <__kernel_rem_pio2f+0x456> + 8009980: ed71 7a01 vldmdb r1!, {s15} + 8009984: 3801 subs r0, #1 + 8009986: ee37 7a27 vadd.f32 s14, s14, s15 + 800998a: e7c4 b.n 8009916 <__kernel_rem_pio2f+0x41a> + 800998c: eef0 7a47 vmov.f32 s15, s14 + 8009990: e7c8 b.n 8009924 <__kernel_rem_pio2f+0x428> + 8009992: ecb0 7a01 vldmia r0!, {s14} + 8009996: 3101 adds r1, #1 + 8009998: ee77 7a87 vadd.f32 s15, s15, s14 + 800999c: e7ca b.n 8009934 <__kernel_rem_pio2f+0x438> + 800999e: ed50 7a02 vldr s15, [r0, #-8] + 80099a2: ed70 6a01 vldmdb r0!, {s13} + 80099a6: ee37 7aa6 vadd.f32 s14, s15, s13 + 80099aa: 3c01 subs r4, #1 + 80099ac: ee77 7ac7 vsub.f32 s15, s15, s14 + 80099b0: ed00 7a01 vstr s14, [r0, #-4] + 80099b4: ee77 7aa6 vadd.f32 s15, s15, s13 + 80099b8: edc0 7a00 vstr s15, [r0] + 80099bc: e78d b.n 80098da <__kernel_rem_pio2f+0x3de> + 80099be: ed50 7a02 vldr s15, [r0, #-8] + 80099c2: ed70 6a01 vldmdb r0!, {s13} + 80099c6: ee37 7aa6 vadd.f32 s14, s15, s13 + 80099ca: 3c01 subs r4, #1 + 80099cc: ee77 7ac7 vsub.f32 s15, s15, s14 + 80099d0: ed00 7a01 vstr s14, [r0, #-4] + 80099d4: ee77 7aa6 vadd.f32 s15, s15, s13 + 80099d8: edc0 7a00 vstr s15, [r0] + 80099dc: e781 b.n 80098e2 <__kernel_rem_pio2f+0x3e6> + 80099de: ed31 7a01 vldmdb r1!, {s14} + 80099e2: 3b01 subs r3, #1 + 80099e4: ee77 7a87 vadd.f32 s15, s15, s14 + 80099e8: e77f b.n 80098ea <__kernel_rem_pio2f+0x3ee> + 80099ea: eef1 6a66 vneg.f32 s13, s13 + 80099ee: eeb1 7a47 vneg.f32 s14, s14 + 80099f2: edc6 6a00 vstr s13, [r6] + 80099f6: ed86 7a01 vstr s14, [r6, #4] + 80099fa: eef1 7a67 vneg.f32 s15, s15 + 80099fe: e781 b.n 8009904 <__kernel_rem_pio2f+0x408> + +08009a00 <__kernel_sinf>: + 8009a00: ee10 3a10 vmov r3, s0 + 8009a04: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000 + 8009a08: f1b3 5f48 cmp.w r3, #838860800 ; 0x32000000 + 8009a0c: da04 bge.n 8009a18 <__kernel_sinf+0x18> + 8009a0e: eefd 7ac0 vcvt.s32.f32 s15, s0 + 8009a12: ee17 3a90 vmov r3, s15 + 8009a16: b35b cbz r3, 8009a70 <__kernel_sinf+0x70> + 8009a18: ee20 7a00 vmul.f32 s14, s0, s0 + 8009a1c: eddf 7a15 vldr s15, [pc, #84] ; 8009a74 <__kernel_sinf+0x74> + 8009a20: ed9f 6a15 vldr s12, [pc, #84] ; 8009a78 <__kernel_sinf+0x78> + 8009a24: eea7 6a27 vfma.f32 s12, s14, s15 + 8009a28: eddf 7a14 vldr s15, [pc, #80] ; 8009a7c <__kernel_sinf+0x7c> + 8009a2c: eee6 7a07 vfma.f32 s15, s12, s14 + 8009a30: ed9f 6a13 vldr s12, [pc, #76] ; 8009a80 <__kernel_sinf+0x80> + 8009a34: eea7 6a87 vfma.f32 s12, s15, s14 + 8009a38: eddf 7a12 vldr s15, [pc, #72] ; 8009a84 <__kernel_sinf+0x84> + 8009a3c: ee60 6a07 vmul.f32 s13, s0, s14 + 8009a40: eee6 7a07 vfma.f32 s15, s12, s14 + 8009a44: b930 cbnz r0, 8009a54 <__kernel_sinf+0x54> + 8009a46: ed9f 6a10 vldr s12, [pc, #64] ; 8009a88 <__kernel_sinf+0x88> + 8009a4a: eea7 6a27 vfma.f32 s12, s14, s15 + 8009a4e: eea6 0a26 vfma.f32 s0, s12, s13 + 8009a52: 4770 bx lr + 8009a54: ee67 7ae6 vnmul.f32 s15, s15, s13 + 8009a58: eeb6 6a00 vmov.f32 s12, #96 ; 0x3f000000 0.5 + 8009a5c: eee0 7a86 vfma.f32 s15, s1, s12 + 8009a60: eed7 0a87 vfnms.f32 s1, s15, s14 + 8009a64: eddf 7a09 vldr s15, [pc, #36] ; 8009a8c <__kernel_sinf+0x8c> + 8009a68: eee6 0aa7 vfma.f32 s1, s13, s15 + 8009a6c: ee30 0a60 vsub.f32 s0, s0, s1 + 8009a70: 4770 bx lr + 8009a72: bf00 nop + 8009a74: 2f2ec9d3 .word 0x2f2ec9d3 + 8009a78: b2d72f34 .word 0xb2d72f34 + 8009a7c: 3638ef1b .word 0x3638ef1b + 8009a80: b9500d01 .word 0xb9500d01 + 8009a84: 3c088889 .word 0x3c088889 + 8009a88: be2aaaab .word 0xbe2aaaab + 8009a8c: 3e2aaaab .word 0x3e2aaaab + +08009a90 : + 8009a90: ec51 0b10 vmov r0, r1, d0 + 8009a94: ee10 2a10 vmov r2, s0 + 8009a98: f021 4300 bic.w r3, r1, #2147483648 ; 0x80000000 + 8009a9c: ec43 2b10 vmov d0, r2, r3 + 8009aa0: 4770 bx lr + 8009aa2: 0000 movs r0, r0 + 8009aa4: 0000 movs r0, r0 ... -08009a40 : - 8009a40: ee10 1a90 vmov r1, s1 - 8009a44: f3c1 520a ubfx r2, r1, #20, #11 - 8009a48: f2a2 33ff subw r3, r2, #1023 ; 0x3ff - 8009a4c: 2b13 cmp r3, #19 - 8009a4e: b530 push {r4, r5, lr} - 8009a50: ee10 0a10 vmov r0, s0 - 8009a54: ee10 5a10 vmov r5, s0 - 8009a58: dc33 bgt.n 8009ac2 - 8009a5a: 2b00 cmp r3, #0 - 8009a5c: da17 bge.n 8009a8e - 8009a5e: ed9f 7b30 vldr d7, [pc, #192] ; 8009b20 - 8009a62: ee30 0b07 vadd.f64 d0, d0, d7 - 8009a66: eeb5 0bc0 vcmpe.f64 d0, #0.0 - 8009a6a: eef1 fa10 vmrs APSR_nzcv, fpscr - 8009a6e: dd09 ble.n 8009a84 - 8009a70: 2900 cmp r1, #0 - 8009a72: da50 bge.n 8009b16 - 8009a74: f021 4300 bic.w r3, r1, #2147483648 ; 0x80000000 - 8009a78: 4a2b ldr r2, [pc, #172] ; (8009b28 ) - 8009a7a: 4303 orrs r3, r0 - 8009a7c: 2000 movs r0, #0 - 8009a7e: 4283 cmp r3, r0 - 8009a80: bf18 it ne - 8009a82: 4611 movne r1, r2 - 8009a84: 460b mov r3, r1 - 8009a86: 4602 mov r2, r0 - 8009a88: ec43 2b10 vmov d0, r2, r3 - 8009a8c: e020 b.n 8009ad0 - 8009a8e: 4a27 ldr r2, [pc, #156] ; (8009b2c ) - 8009a90: 411a asrs r2, r3 - 8009a92: ea01 0402 and.w r4, r1, r2 - 8009a96: 4304 orrs r4, r0 - 8009a98: d01a beq.n 8009ad0 - 8009a9a: ed9f 7b21 vldr d7, [pc, #132] ; 8009b20 - 8009a9e: ee30 0b07 vadd.f64 d0, d0, d7 - 8009aa2: eeb5 0bc0 vcmpe.f64 d0, #0.0 - 8009aa6: eef1 fa10 vmrs APSR_nzcv, fpscr - 8009aaa: ddeb ble.n 8009a84 - 8009aac: 2900 cmp r1, #0 - 8009aae: bfbe ittt lt - 8009ab0: f44f 1080 movlt.w r0, #1048576 ; 0x100000 - 8009ab4: fa40 f303 asrlt.w r3, r0, r3 - 8009ab8: 18c9 addlt r1, r1, r3 - 8009aba: ea21 0102 bic.w r1, r1, r2 - 8009abe: 2000 movs r0, #0 - 8009ac0: e7e0 b.n 8009a84 - 8009ac2: 2b33 cmp r3, #51 ; 0x33 - 8009ac4: dd05 ble.n 8009ad2 - 8009ac6: f5b3 6f80 cmp.w r3, #1024 ; 0x400 - 8009aca: d101 bne.n 8009ad0 - 8009acc: ee30 0b00 vadd.f64 d0, d0, d0 - 8009ad0: bd30 pop {r4, r5, pc} - 8009ad2: f2a2 4413 subw r4, r2, #1043 ; 0x413 - 8009ad6: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff - 8009ada: 40e2 lsrs r2, r4 - 8009adc: 4202 tst r2, r0 - 8009ade: d0f7 beq.n 8009ad0 - 8009ae0: ed9f 7b0f vldr d7, [pc, #60] ; 8009b20 - 8009ae4: ee30 0b07 vadd.f64 d0, d0, d7 - 8009ae8: eeb5 0bc0 vcmpe.f64 d0, #0.0 - 8009aec: eef1 fa10 vmrs APSR_nzcv, fpscr - 8009af0: ddc8 ble.n 8009a84 - 8009af2: 2900 cmp r1, #0 - 8009af4: da02 bge.n 8009afc - 8009af6: 2b14 cmp r3, #20 - 8009af8: d103 bne.n 8009b02 - 8009afa: 3101 adds r1, #1 - 8009afc: ea20 0002 bic.w r0, r0, r2 - 8009b00: e7c0 b.n 8009a84 - 8009b02: 2401 movs r4, #1 - 8009b04: f1c3 0334 rsb r3, r3, #52 ; 0x34 - 8009b08: fa04 f303 lsl.w r3, r4, r3 - 8009b0c: 4418 add r0, r3 - 8009b0e: 42a8 cmp r0, r5 - 8009b10: bf38 it cc - 8009b12: 1909 addcc r1, r1, r4 - 8009b14: e7f2 b.n 8009afc - 8009b16: 2000 movs r0, #0 - 8009b18: 4601 mov r1, r0 - 8009b1a: e7b3 b.n 8009a84 - 8009b1c: f3af 8000 nop.w - 8009b20: 8800759c .word 0x8800759c - 8009b24: 7e37e43c .word 0x7e37e43c - 8009b28: bff00000 .word 0xbff00000 - 8009b2c: 000fffff .word 0x000fffff - -08009b30 : - 8009b30: b500 push {lr} - 8009b32: ed2d 8b02 vpush {d8} - 8009b36: b083 sub sp, #12 - 8009b38: ed8d 0b00 vstr d0, [sp] - 8009b3c: 9b01 ldr r3, [sp, #4] - 8009b3e: f3c3 520a ubfx r2, r3, #20, #11 - 8009b42: b9a2 cbnz r2, 8009b6e - 8009b44: 9a00 ldr r2, [sp, #0] - 8009b46: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000 - 8009b4a: 4313 orrs r3, r2 - 8009b4c: d03a beq.n 8009bc4 - 8009b4e: ed9f 7b2e vldr d7, [pc, #184] ; 8009c08 - 8009b52: 4b35 ldr r3, [pc, #212] ; (8009c28 ) - 8009b54: ee20 7b07 vmul.f64 d7, d0, d7 - 8009b58: 4298 cmp r0, r3 - 8009b5a: ed8d 7b00 vstr d7, [sp] - 8009b5e: da11 bge.n 8009b84 - 8009b60: ed9f 7b2b vldr d7, [pc, #172] ; 8009c10 - 8009b64: ed9d 6b00 vldr d6, [sp] - 8009b68: ee27 7b06 vmul.f64 d7, d7, d6 - 8009b6c: e007 b.n 8009b7e - 8009b6e: f240 71ff movw r1, #2047 ; 0x7ff - 8009b72: 428a cmp r2, r1 - 8009b74: d10a bne.n 8009b8c - 8009b76: ed9d 7b00 vldr d7, [sp] - 8009b7a: ee37 7b07 vadd.f64 d7, d7, d7 - 8009b7e: ed8d 7b00 vstr d7, [sp] - 8009b82: e01f b.n 8009bc4 - 8009b84: 9b01 ldr r3, [sp, #4] - 8009b86: f3c3 520a ubfx r2, r3, #20, #11 - 8009b8a: 3a36 subs r2, #54 ; 0x36 - 8009b8c: 4402 add r2, r0 - 8009b8e: f240 71fe movw r1, #2046 ; 0x7fe - 8009b92: 428a cmp r2, r1 - 8009b94: dd0a ble.n 8009bac - 8009b96: ed9f 8b20 vldr d8, [pc, #128] ; 8009c18 - 8009b9a: eeb0 0b48 vmov.f64 d0, d8 - 8009b9e: ed9d 1b00 vldr d1, [sp] - 8009ba2: f000 f8ed bl 8009d80 - 8009ba6: ee20 7b08 vmul.f64 d7, d0, d8 - 8009baa: e7e8 b.n 8009b7e - 8009bac: 2a00 cmp r2, #0 - 8009bae: dd10 ble.n 8009bd2 - 8009bb0: e9dd 0100 ldrd r0, r1, [sp] - 8009bb4: f023 43ff bic.w r3, r3, #2139095040 ; 0x7f800000 - 8009bb8: f423 03e0 bic.w r3, r3, #7340032 ; 0x700000 - 8009bbc: ea43 5102 orr.w r1, r3, r2, lsl #20 - 8009bc0: e9cd 0100 strd r0, r1, [sp] - 8009bc4: ed9d 0b00 vldr d0, [sp] - 8009bc8: b003 add sp, #12 - 8009bca: ecbd 8b02 vpop {d8} - 8009bce: f85d fb04 ldr.w pc, [sp], #4 - 8009bd2: f112 0f35 cmn.w r2, #53 ; 0x35 - 8009bd6: da06 bge.n 8009be6 - 8009bd8: f24c 3350 movw r3, #50000 ; 0xc350 - 8009bdc: 4298 cmp r0, r3 - 8009bde: dcda bgt.n 8009b96 - 8009be0: ed9f 8b0b vldr d8, [pc, #44] ; 8009c10 - 8009be4: e7d9 b.n 8009b9a - 8009be6: e9dd 0100 ldrd r0, r1, [sp] - 8009bea: f023 43ff bic.w r3, r3, #2139095040 ; 0x7f800000 - 8009bee: 3236 adds r2, #54 ; 0x36 - 8009bf0: f423 03e0 bic.w r3, r3, #7340032 ; 0x700000 - 8009bf4: ea43 5102 orr.w r1, r3, r2, lsl #20 - 8009bf8: ec41 0b17 vmov d7, r0, r1 - 8009bfc: ed9f 6b08 vldr d6, [pc, #32] ; 8009c20 - 8009c00: e7b2 b.n 8009b68 - 8009c02: bf00 nop - 8009c04: f3af 8000 nop.w - 8009c08: 00000000 .word 0x00000000 - 8009c0c: 43500000 .word 0x43500000 - 8009c10: c2f8f359 .word 0xc2f8f359 - 8009c14: 01a56e1f .word 0x01a56e1f - 8009c18: 8800759c .word 0x8800759c - 8009c1c: 7e37e43c .word 0x7e37e43c - 8009c20: 00000000 .word 0x00000000 - 8009c24: 3c900000 .word 0x3c900000 - 8009c28: ffff3cb0 .word 0xffff3cb0 - -08009c2c : - 8009c2c: ee10 3a10 vmov r3, s0 - 8009c30: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000 - 8009c34: ee00 3a10 vmov s0, r3 - 8009c38: 4770 bx lr +08009aa8 : + 8009aa8: ee10 1a90 vmov r1, s1 + 8009aac: f3c1 520a ubfx r2, r1, #20, #11 + 8009ab0: f2a2 33ff subw r3, r2, #1023 ; 0x3ff + 8009ab4: 2b13 cmp r3, #19 + 8009ab6: b530 push {r4, r5, lr} + 8009ab8: ee10 0a10 vmov r0, s0 + 8009abc: ee10 5a10 vmov r5, s0 + 8009ac0: dc33 bgt.n 8009b2a + 8009ac2: 2b00 cmp r3, #0 + 8009ac4: da17 bge.n 8009af6 + 8009ac6: ed9f 7b30 vldr d7, [pc, #192] ; 8009b88 + 8009aca: ee30 0b07 vadd.f64 d0, d0, d7 + 8009ace: eeb5 0bc0 vcmpe.f64 d0, #0.0 + 8009ad2: eef1 fa10 vmrs APSR_nzcv, fpscr + 8009ad6: dd09 ble.n 8009aec + 8009ad8: 2900 cmp r1, #0 + 8009ada: da50 bge.n 8009b7e + 8009adc: f021 4300 bic.w r3, r1, #2147483648 ; 0x80000000 + 8009ae0: 4a2b ldr r2, [pc, #172] ; (8009b90 ) + 8009ae2: 4303 orrs r3, r0 + 8009ae4: 2000 movs r0, #0 + 8009ae6: 4283 cmp r3, r0 + 8009ae8: bf18 it ne + 8009aea: 4611 movne r1, r2 + 8009aec: 460b mov r3, r1 + 8009aee: 4602 mov r2, r0 + 8009af0: ec43 2b10 vmov d0, r2, r3 + 8009af4: e020 b.n 8009b38 + 8009af6: 4a27 ldr r2, [pc, #156] ; (8009b94 ) + 8009af8: 411a asrs r2, r3 + 8009afa: ea01 0402 and.w r4, r1, r2 + 8009afe: 4304 orrs r4, r0 + 8009b00: d01a beq.n 8009b38 + 8009b02: ed9f 7b21 vldr d7, [pc, #132] ; 8009b88 + 8009b06: ee30 0b07 vadd.f64 d0, d0, d7 + 8009b0a: eeb5 0bc0 vcmpe.f64 d0, #0.0 + 8009b0e: eef1 fa10 vmrs APSR_nzcv, fpscr + 8009b12: ddeb ble.n 8009aec + 8009b14: 2900 cmp r1, #0 + 8009b16: bfbe ittt lt + 8009b18: f44f 1080 movlt.w r0, #1048576 ; 0x100000 + 8009b1c: fa40 f303 asrlt.w r3, r0, r3 + 8009b20: 18c9 addlt r1, r1, r3 + 8009b22: ea21 0102 bic.w r1, r1, r2 + 8009b26: 2000 movs r0, #0 + 8009b28: e7e0 b.n 8009aec + 8009b2a: 2b33 cmp r3, #51 ; 0x33 + 8009b2c: dd05 ble.n 8009b3a + 8009b2e: f5b3 6f80 cmp.w r3, #1024 ; 0x400 + 8009b32: d101 bne.n 8009b38 + 8009b34: ee30 0b00 vadd.f64 d0, d0, d0 + 8009b38: bd30 pop {r4, r5, pc} + 8009b3a: f2a2 4413 subw r4, r2, #1043 ; 0x413 + 8009b3e: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff + 8009b42: 40e2 lsrs r2, r4 + 8009b44: 4202 tst r2, r0 + 8009b46: d0f7 beq.n 8009b38 + 8009b48: ed9f 7b0f vldr d7, [pc, #60] ; 8009b88 + 8009b4c: ee30 0b07 vadd.f64 d0, d0, d7 + 8009b50: eeb5 0bc0 vcmpe.f64 d0, #0.0 + 8009b54: eef1 fa10 vmrs APSR_nzcv, fpscr + 8009b58: ddc8 ble.n 8009aec + 8009b5a: 2900 cmp r1, #0 + 8009b5c: da02 bge.n 8009b64 + 8009b5e: 2b14 cmp r3, #20 + 8009b60: d103 bne.n 8009b6a + 8009b62: 3101 adds r1, #1 + 8009b64: ea20 0002 bic.w r0, r0, r2 + 8009b68: e7c0 b.n 8009aec + 8009b6a: 2401 movs r4, #1 + 8009b6c: f1c3 0334 rsb r3, r3, #52 ; 0x34 + 8009b70: fa04 f303 lsl.w r3, r4, r3 + 8009b74: 4418 add r0, r3 + 8009b76: 42a8 cmp r0, r5 + 8009b78: bf38 it cc + 8009b7a: 1909 addcc r1, r1, r4 + 8009b7c: e7f2 b.n 8009b64 + 8009b7e: 2000 movs r0, #0 + 8009b80: 4601 mov r1, r0 + 8009b82: e7b3 b.n 8009aec + 8009b84: f3af 8000 nop.w + 8009b88: 8800759c .word 0x8800759c + 8009b8c: 7e37e43c .word 0x7e37e43c + 8009b90: bff00000 .word 0xbff00000 + 8009b94: 000fffff .word 0x000fffff + +08009b98 : + 8009b98: b500 push {lr} + 8009b9a: ed2d 8b02 vpush {d8} + 8009b9e: b083 sub sp, #12 + 8009ba0: ed8d 0b00 vstr d0, [sp] + 8009ba4: 9b01 ldr r3, [sp, #4] + 8009ba6: f3c3 520a ubfx r2, r3, #20, #11 + 8009baa: b9a2 cbnz r2, 8009bd6 + 8009bac: 9a00 ldr r2, [sp, #0] + 8009bae: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000 + 8009bb2: 4313 orrs r3, r2 + 8009bb4: d03a beq.n 8009c2c + 8009bb6: ed9f 7b2e vldr d7, [pc, #184] ; 8009c70 + 8009bba: 4b35 ldr r3, [pc, #212] ; (8009c90 ) + 8009bbc: ee20 7b07 vmul.f64 d7, d0, d7 + 8009bc0: 4298 cmp r0, r3 + 8009bc2: ed8d 7b00 vstr d7, [sp] + 8009bc6: da11 bge.n 8009bec + 8009bc8: ed9f 7b2b vldr d7, [pc, #172] ; 8009c78 + 8009bcc: ed9d 6b00 vldr d6, [sp] + 8009bd0: ee27 7b06 vmul.f64 d7, d7, d6 + 8009bd4: e007 b.n 8009be6 + 8009bd6: f240 71ff movw r1, #2047 ; 0x7ff + 8009bda: 428a cmp r2, r1 + 8009bdc: d10a bne.n 8009bf4 + 8009bde: ed9d 7b00 vldr d7, [sp] + 8009be2: ee37 7b07 vadd.f64 d7, d7, d7 + 8009be6: ed8d 7b00 vstr d7, [sp] + 8009bea: e01f b.n 8009c2c + 8009bec: 9b01 ldr r3, [sp, #4] + 8009bee: f3c3 520a ubfx r2, r3, #20, #11 + 8009bf2: 3a36 subs r2, #54 ; 0x36 + 8009bf4: 4402 add r2, r0 + 8009bf6: f240 71fe movw r1, #2046 ; 0x7fe + 8009bfa: 428a cmp r2, r1 + 8009bfc: dd0a ble.n 8009c14 + 8009bfe: ed9f 8b20 vldr d8, [pc, #128] ; 8009c80 + 8009c02: eeb0 0b48 vmov.f64 d0, d8 + 8009c06: ed9d 1b00 vldr d1, [sp] + 8009c0a: f000 f8ed bl 8009de8 + 8009c0e: ee20 7b08 vmul.f64 d7, d0, d8 + 8009c12: e7e8 b.n 8009be6 + 8009c14: 2a00 cmp r2, #0 + 8009c16: dd10 ble.n 8009c3a + 8009c18: e9dd 0100 ldrd r0, r1, [sp] + 8009c1c: f023 43ff bic.w r3, r3, #2139095040 ; 0x7f800000 + 8009c20: f423 03e0 bic.w r3, r3, #7340032 ; 0x700000 + 8009c24: ea43 5102 orr.w r1, r3, r2, lsl #20 + 8009c28: e9cd 0100 strd r0, r1, [sp] + 8009c2c: ed9d 0b00 vldr d0, [sp] + 8009c30: b003 add sp, #12 + 8009c32: ecbd 8b02 vpop {d8} + 8009c36: f85d fb04 ldr.w pc, [sp], #4 + 8009c3a: f112 0f35 cmn.w r2, #53 ; 0x35 + 8009c3e: da06 bge.n 8009c4e + 8009c40: f24c 3350 movw r3, #50000 ; 0xc350 + 8009c44: 4298 cmp r0, r3 + 8009c46: dcda bgt.n 8009bfe + 8009c48: ed9f 8b0b vldr d8, [pc, #44] ; 8009c78 + 8009c4c: e7d9 b.n 8009c02 + 8009c4e: e9dd 0100 ldrd r0, r1, [sp] + 8009c52: f023 43ff bic.w r3, r3, #2139095040 ; 0x7f800000 + 8009c56: 3236 adds r2, #54 ; 0x36 + 8009c58: f423 03e0 bic.w r3, r3, #7340032 ; 0x700000 + 8009c5c: ea43 5102 orr.w r1, r3, r2, lsl #20 + 8009c60: ec41 0b17 vmov d7, r0, r1 + 8009c64: ed9f 6b08 vldr d6, [pc, #32] ; 8009c88 + 8009c68: e7b2 b.n 8009bd0 + 8009c6a: bf00 nop + 8009c6c: f3af 8000 nop.w + 8009c70: 00000000 .word 0x00000000 + 8009c74: 43500000 .word 0x43500000 + 8009c78: c2f8f359 .word 0xc2f8f359 + 8009c7c: 01a56e1f .word 0x01a56e1f + 8009c80: 8800759c .word 0x8800759c + 8009c84: 7e37e43c .word 0x7e37e43c + 8009c88: 00000000 .word 0x00000000 + 8009c8c: 3c900000 .word 0x3c900000 + 8009c90: ffff3cb0 .word 0xffff3cb0 + +08009c94 : + 8009c94: ee10 3a10 vmov r3, s0 + 8009c98: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000 + 8009c9c: ee00 3a10 vmov s0, r3 + 8009ca0: 4770 bx lr ... -08009c3c : - 8009c3c: ee10 3a10 vmov r3, s0 - 8009c40: f023 4100 bic.w r1, r3, #2147483648 ; 0x80000000 - 8009c44: 0dca lsrs r2, r1, #23 - 8009c46: 3a7f subs r2, #127 ; 0x7f - 8009c48: 2a16 cmp r2, #22 - 8009c4a: dc2a bgt.n 8009ca2 - 8009c4c: 2a00 cmp r2, #0 - 8009c4e: da11 bge.n 8009c74 - 8009c50: eddf 7a18 vldr s15, [pc, #96] ; 8009cb4 - 8009c54: ee30 0a27 vadd.f32 s0, s0, s15 - 8009c58: eeb5 0ac0 vcmpe.f32 s0, #0.0 - 8009c5c: eef1 fa10 vmrs APSR_nzcv, fpscr - 8009c60: dd05 ble.n 8009c6e - 8009c62: 2b00 cmp r3, #0 - 8009c64: da23 bge.n 8009cae - 8009c66: 4a14 ldr r2, [pc, #80] ; (8009cb8 ) - 8009c68: 2900 cmp r1, #0 - 8009c6a: bf18 it ne - 8009c6c: 4613 movne r3, r2 - 8009c6e: ee00 3a10 vmov s0, r3 - 8009c72: 4770 bx lr - 8009c74: 4911 ldr r1, [pc, #68] ; (8009cbc ) - 8009c76: 4111 asrs r1, r2 - 8009c78: 420b tst r3, r1 - 8009c7a: d0fa beq.n 8009c72 - 8009c7c: eddf 7a0d vldr s15, [pc, #52] ; 8009cb4 - 8009c80: ee30 0a27 vadd.f32 s0, s0, s15 - 8009c84: eeb5 0ac0 vcmpe.f32 s0, #0.0 - 8009c88: eef1 fa10 vmrs APSR_nzcv, fpscr - 8009c8c: ddef ble.n 8009c6e - 8009c8e: 2b00 cmp r3, #0 - 8009c90: bfbe ittt lt - 8009c92: f44f 0000 movlt.w r0, #8388608 ; 0x800000 - 8009c96: fa40 f202 asrlt.w r2, r0, r2 - 8009c9a: 189b addlt r3, r3, r2 - 8009c9c: ea23 0301 bic.w r3, r3, r1 - 8009ca0: e7e5 b.n 8009c6e - 8009ca2: f1b1 4fff cmp.w r1, #2139095040 ; 0x7f800000 - 8009ca6: d3e4 bcc.n 8009c72 - 8009ca8: ee30 0a00 vadd.f32 s0, s0, s0 - 8009cac: 4770 bx lr - 8009cae: 2300 movs r3, #0 - 8009cb0: e7dd b.n 8009c6e - 8009cb2: bf00 nop - 8009cb4: 7149f2ca .word 0x7149f2ca - 8009cb8: bf800000 .word 0xbf800000 - 8009cbc: 007fffff .word 0x007fffff - -08009cc0 : - 8009cc0: b508 push {r3, lr} - 8009cc2: ee10 2a10 vmov r2, s0 - 8009cc6: f032 4300 bics.w r3, r2, #2147483648 ; 0x80000000 - 8009cca: ed2d 8b02 vpush {d8} - 8009cce: eef0 0a40 vmov.f32 s1, s0 - 8009cd2: d004 beq.n 8009cde - 8009cd4: f1b3 4fff cmp.w r3, #2139095040 ; 0x7f800000 - 8009cd8: d306 bcc.n 8009ce8 - 8009cda: ee70 0a00 vadd.f32 s1, s0, s0 - 8009cde: ecbd 8b02 vpop {d8} - 8009ce2: eeb0 0a60 vmov.f32 s0, s1 - 8009ce6: bd08 pop {r3, pc} - 8009ce8: f5b3 0f00 cmp.w r3, #8388608 ; 0x800000 - 8009cec: d21c bcs.n 8009d28 - 8009cee: 4b1f ldr r3, [pc, #124] ; (8009d6c ) - 8009cf0: eddf 7a1f vldr s15, [pc, #124] ; 8009d70 - 8009cf4: 4298 cmp r0, r3 - 8009cf6: ee60 0a27 vmul.f32 s1, s0, s15 - 8009cfa: db10 blt.n 8009d1e - 8009cfc: ee10 2a90 vmov r2, s1 - 8009d00: f3c2 53c7 ubfx r3, r2, #23, #8 - 8009d04: 3b19 subs r3, #25 - 8009d06: 4403 add r3, r0 - 8009d08: 2bfe cmp r3, #254 ; 0xfe - 8009d0a: dd0f ble.n 8009d2c - 8009d0c: ed9f 8a19 vldr s16, [pc, #100] ; 8009d74 - 8009d10: eeb0 0a48 vmov.f32 s0, s16 - 8009d14: f000 f843 bl 8009d9e - 8009d18: ee60 0a08 vmul.f32 s1, s0, s16 - 8009d1c: e7df b.n 8009cde - 8009d1e: eddf 7a16 vldr s15, [pc, #88] ; 8009d78 - 8009d22: ee60 0aa7 vmul.f32 s1, s1, s15 - 8009d26: e7da b.n 8009cde - 8009d28: 0ddb lsrs r3, r3, #23 - 8009d2a: e7ec b.n 8009d06 - 8009d2c: 2b00 cmp r3, #0 - 8009d2e: dd06 ble.n 8009d3e - 8009d30: f022 42ff bic.w r2, r2, #2139095040 ; 0x7f800000 - 8009d34: ea42 53c3 orr.w r3, r2, r3, lsl #23 - 8009d38: ee00 3a90 vmov s1, r3 - 8009d3c: e7cf b.n 8009cde - 8009d3e: f113 0f16 cmn.w r3, #22 - 8009d42: da06 bge.n 8009d52 - 8009d44: f24c 3350 movw r3, #50000 ; 0xc350 - 8009d48: 4298 cmp r0, r3 - 8009d4a: dcdf bgt.n 8009d0c - 8009d4c: ed9f 8a0a vldr s16, [pc, #40] ; 8009d78 - 8009d50: e7de b.n 8009d10 - 8009d52: 3319 adds r3, #25 - 8009d54: f022 42ff bic.w r2, r2, #2139095040 ; 0x7f800000 - 8009d58: ea42 53c3 orr.w r3, r2, r3, lsl #23 - 8009d5c: eddf 7a07 vldr s15, [pc, #28] ; 8009d7c - 8009d60: ee07 3a10 vmov s14, r3 - 8009d64: ee67 0a27 vmul.f32 s1, s14, s15 - 8009d68: e7b9 b.n 8009cde - 8009d6a: bf00 nop - 8009d6c: ffff3cb0 .word 0xffff3cb0 - 8009d70: 4c000000 .word 0x4c000000 - 8009d74: 7149f2ca .word 0x7149f2ca - 8009d78: 0da24260 .word 0x0da24260 - 8009d7c: 33000000 .word 0x33000000 - -08009d80 : - 8009d80: ec51 0b10 vmov r0, r1, d0 - 8009d84: ee11 0a90 vmov r0, s3 - 8009d88: ee10 2a10 vmov r2, s0 - 8009d8c: f021 4100 bic.w r1, r1, #2147483648 ; 0x80000000 - 8009d90: f000 4000 and.w r0, r0, #2147483648 ; 0x80000000 - 8009d94: ea41 0300 orr.w r3, r1, r0 - 8009d98: ec43 2b10 vmov d0, r2, r3 - 8009d9c: 4770 bx lr - -08009d9e : - 8009d9e: ee10 3a10 vmov r3, s0 - 8009da2: ee10 2a90 vmov r2, s1 - 8009da6: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000 - 8009daa: f002 4200 and.w r2, r2, #2147483648 ; 0x80000000 - 8009dae: 4313 orrs r3, r2 - 8009db0: ee00 3a10 vmov s0, r3 - 8009db4: 4770 bx lr - -08009db6 : - 8009db6: b508 push {r3, lr} - 8009db8: 2006 movs r0, #6 - 8009dba: f000 f871 bl 8009ea0 - 8009dbe: 2001 movs r0, #1 - 8009dc0: f7fe fb6e bl 80084a0 <_exit> - -08009dc4 <__errno>: - 8009dc4: 4b01 ldr r3, [pc, #4] ; (8009dcc <__errno+0x8>) - 8009dc6: 6818 ldr r0, [r3, #0] - 8009dc8: 4770 bx lr - 8009dca: bf00 nop - 8009dcc: 20000020 .word 0x20000020 - -08009dd0 <__libc_init_array>: - 8009dd0: b570 push {r4, r5, r6, lr} - 8009dd2: 4e0d ldr r6, [pc, #52] ; (8009e08 <__libc_init_array+0x38>) - 8009dd4: 4c0d ldr r4, [pc, #52] ; (8009e0c <__libc_init_array+0x3c>) - 8009dd6: 1ba4 subs r4, r4, r6 - 8009dd8: 10a4 asrs r4, r4, #2 - 8009dda: 2500 movs r5, #0 - 8009ddc: 42a5 cmp r5, r4 - 8009dde: d109 bne.n 8009df4 <__libc_init_array+0x24> - 8009de0: 4e0b ldr r6, [pc, #44] ; (8009e10 <__libc_init_array+0x40>) - 8009de2: 4c0c ldr r4, [pc, #48] ; (8009e14 <__libc_init_array+0x44>) - 8009de4: f000 f960 bl 800a0a8 <_init> - 8009de8: 1ba4 subs r4, r4, r6 - 8009dea: 10a4 asrs r4, r4, #2 - 8009dec: 2500 movs r5, #0 - 8009dee: 42a5 cmp r5, r4 - 8009df0: d105 bne.n 8009dfe <__libc_init_array+0x2e> - 8009df2: bd70 pop {r4, r5, r6, pc} - 8009df4: f856 3025 ldr.w r3, [r6, r5, lsl #2] - 8009df8: 4798 blx r3 - 8009dfa: 3501 adds r5, #1 - 8009dfc: e7ee b.n 8009ddc <__libc_init_array+0xc> - 8009dfe: f856 3025 ldr.w r3, [r6, r5, lsl #2] - 8009e02: 4798 blx r3 - 8009e04: 3501 adds r5, #1 - 8009e06: e7f2 b.n 8009dee <__libc_init_array+0x1e> - 8009e08: 0800ab90 .word 0x0800ab90 - 8009e0c: 0800ab90 .word 0x0800ab90 - 8009e10: 0800ab90 .word 0x0800ab90 - 8009e14: 0800ab98 .word 0x0800ab98 - -08009e18 : - 8009e18: b510 push {r4, lr} - 8009e1a: 1e43 subs r3, r0, #1 - 8009e1c: 440a add r2, r1 - 8009e1e: 4291 cmp r1, r2 - 8009e20: d100 bne.n 8009e24 - 8009e22: bd10 pop {r4, pc} - 8009e24: f811 4b01 ldrb.w r4, [r1], #1 - 8009e28: f803 4f01 strb.w r4, [r3, #1]! - 8009e2c: e7f7 b.n 8009e1e - -08009e2e : - 8009e2e: 4402 add r2, r0 - 8009e30: 4603 mov r3, r0 - 8009e32: 4293 cmp r3, r2 - 8009e34: d100 bne.n 8009e38 - 8009e36: 4770 bx lr - 8009e38: f803 1b01 strb.w r1, [r3], #1 - 8009e3c: e7f9 b.n 8009e32 +08009ca4 : + 8009ca4: ee10 3a10 vmov r3, s0 + 8009ca8: f023 4100 bic.w r1, r3, #2147483648 ; 0x80000000 + 8009cac: 0dca lsrs r2, r1, #23 + 8009cae: 3a7f subs r2, #127 ; 0x7f + 8009cb0: 2a16 cmp r2, #22 + 8009cb2: dc2a bgt.n 8009d0a + 8009cb4: 2a00 cmp r2, #0 + 8009cb6: da11 bge.n 8009cdc + 8009cb8: eddf 7a18 vldr s15, [pc, #96] ; 8009d1c + 8009cbc: ee30 0a27 vadd.f32 s0, s0, s15 + 8009cc0: eeb5 0ac0 vcmpe.f32 s0, #0.0 + 8009cc4: eef1 fa10 vmrs APSR_nzcv, fpscr + 8009cc8: dd05 ble.n 8009cd6 + 8009cca: 2b00 cmp r3, #0 + 8009ccc: da23 bge.n 8009d16 + 8009cce: 4a14 ldr r2, [pc, #80] ; (8009d20 ) + 8009cd0: 2900 cmp r1, #0 + 8009cd2: bf18 it ne + 8009cd4: 4613 movne r3, r2 + 8009cd6: ee00 3a10 vmov s0, r3 + 8009cda: 4770 bx lr + 8009cdc: 4911 ldr r1, [pc, #68] ; (8009d24 ) + 8009cde: 4111 asrs r1, r2 + 8009ce0: 420b tst r3, r1 + 8009ce2: d0fa beq.n 8009cda + 8009ce4: eddf 7a0d vldr s15, [pc, #52] ; 8009d1c + 8009ce8: ee30 0a27 vadd.f32 s0, s0, s15 + 8009cec: eeb5 0ac0 vcmpe.f32 s0, #0.0 + 8009cf0: eef1 fa10 vmrs APSR_nzcv, fpscr + 8009cf4: ddef ble.n 8009cd6 + 8009cf6: 2b00 cmp r3, #0 + 8009cf8: bfbe ittt lt + 8009cfa: f44f 0000 movlt.w r0, #8388608 ; 0x800000 + 8009cfe: fa40 f202 asrlt.w r2, r0, r2 + 8009d02: 189b addlt r3, r3, r2 + 8009d04: ea23 0301 bic.w r3, r3, r1 + 8009d08: e7e5 b.n 8009cd6 + 8009d0a: f1b1 4fff cmp.w r1, #2139095040 ; 0x7f800000 + 8009d0e: d3e4 bcc.n 8009cda + 8009d10: ee30 0a00 vadd.f32 s0, s0, s0 + 8009d14: 4770 bx lr + 8009d16: 2300 movs r3, #0 + 8009d18: e7dd b.n 8009cd6 + 8009d1a: bf00 nop + 8009d1c: 7149f2ca .word 0x7149f2ca + 8009d20: bf800000 .word 0xbf800000 + 8009d24: 007fffff .word 0x007fffff + +08009d28 : + 8009d28: b508 push {r3, lr} + 8009d2a: ee10 2a10 vmov r2, s0 + 8009d2e: f032 4300 bics.w r3, r2, #2147483648 ; 0x80000000 + 8009d32: ed2d 8b02 vpush {d8} + 8009d36: eef0 0a40 vmov.f32 s1, s0 + 8009d3a: d004 beq.n 8009d46 + 8009d3c: f1b3 4fff cmp.w r3, #2139095040 ; 0x7f800000 + 8009d40: d306 bcc.n 8009d50 + 8009d42: ee70 0a00 vadd.f32 s1, s0, s0 + 8009d46: ecbd 8b02 vpop {d8} + 8009d4a: eeb0 0a60 vmov.f32 s0, s1 + 8009d4e: bd08 pop {r3, pc} + 8009d50: f5b3 0f00 cmp.w r3, #8388608 ; 0x800000 + 8009d54: d21c bcs.n 8009d90 + 8009d56: 4b1f ldr r3, [pc, #124] ; (8009dd4 ) + 8009d58: eddf 7a1f vldr s15, [pc, #124] ; 8009dd8 + 8009d5c: 4298 cmp r0, r3 + 8009d5e: ee60 0a27 vmul.f32 s1, s0, s15 + 8009d62: db10 blt.n 8009d86 + 8009d64: ee10 2a90 vmov r2, s1 + 8009d68: f3c2 53c7 ubfx r3, r2, #23, #8 + 8009d6c: 3b19 subs r3, #25 + 8009d6e: 4403 add r3, r0 + 8009d70: 2bfe cmp r3, #254 ; 0xfe + 8009d72: dd0f ble.n 8009d94 + 8009d74: ed9f 8a19 vldr s16, [pc, #100] ; 8009ddc + 8009d78: eeb0 0a48 vmov.f32 s0, s16 + 8009d7c: f000 f843 bl 8009e06 + 8009d80: ee60 0a08 vmul.f32 s1, s0, s16 + 8009d84: e7df b.n 8009d46 + 8009d86: eddf 7a16 vldr s15, [pc, #88] ; 8009de0 + 8009d8a: ee60 0aa7 vmul.f32 s1, s1, s15 + 8009d8e: e7da b.n 8009d46 + 8009d90: 0ddb lsrs r3, r3, #23 + 8009d92: e7ec b.n 8009d6e + 8009d94: 2b00 cmp r3, #0 + 8009d96: dd06 ble.n 8009da6 + 8009d98: f022 42ff bic.w r2, r2, #2139095040 ; 0x7f800000 + 8009d9c: ea42 53c3 orr.w r3, r2, r3, lsl #23 + 8009da0: ee00 3a90 vmov s1, r3 + 8009da4: e7cf b.n 8009d46 + 8009da6: f113 0f16 cmn.w r3, #22 + 8009daa: da06 bge.n 8009dba + 8009dac: f24c 3350 movw r3, #50000 ; 0xc350 + 8009db0: 4298 cmp r0, r3 + 8009db2: dcdf bgt.n 8009d74 + 8009db4: ed9f 8a0a vldr s16, [pc, #40] ; 8009de0 + 8009db8: e7de b.n 8009d78 + 8009dba: 3319 adds r3, #25 + 8009dbc: f022 42ff bic.w r2, r2, #2139095040 ; 0x7f800000 + 8009dc0: ea42 53c3 orr.w r3, r2, r3, lsl #23 + 8009dc4: eddf 7a07 vldr s15, [pc, #28] ; 8009de4 + 8009dc8: ee07 3a10 vmov s14, r3 + 8009dcc: ee67 0a27 vmul.f32 s1, s14, s15 + 8009dd0: e7b9 b.n 8009d46 + 8009dd2: bf00 nop + 8009dd4: ffff3cb0 .word 0xffff3cb0 + 8009dd8: 4c000000 .word 0x4c000000 + 8009ddc: 7149f2ca .word 0x7149f2ca + 8009de0: 0da24260 .word 0x0da24260 + 8009de4: 33000000 .word 0x33000000 + +08009de8 : + 8009de8: ec51 0b10 vmov r0, r1, d0 + 8009dec: ee11 0a90 vmov r0, s3 + 8009df0: ee10 2a10 vmov r2, s0 + 8009df4: f021 4100 bic.w r1, r1, #2147483648 ; 0x80000000 + 8009df8: f000 4000 and.w r0, r0, #2147483648 ; 0x80000000 + 8009dfc: ea41 0300 orr.w r3, r1, r0 + 8009e00: ec43 2b10 vmov d0, r2, r3 + 8009e04: 4770 bx lr + +08009e06 : + 8009e06: ee10 3a10 vmov r3, s0 + 8009e0a: ee10 2a90 vmov r2, s1 + 8009e0e: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000 + 8009e12: f002 4200 and.w r2, r2, #2147483648 ; 0x80000000 + 8009e16: 4313 orrs r3, r2 + 8009e18: ee00 3a10 vmov s0, r3 + 8009e1c: 4770 bx lr + +08009e1e : + 8009e1e: b508 push {r3, lr} + 8009e20: 2006 movs r0, #6 + 8009e22: f000 f871 bl 8009f08 + 8009e26: 2001 movs r0, #1 + 8009e28: f7fa fc68 bl 80046fc <_exit> + +08009e2c <__errno>: + 8009e2c: 4b01 ldr r3, [pc, #4] ; (8009e34 <__errno+0x8>) + 8009e2e: 6818 ldr r0, [r3, #0] + 8009e30: 4770 bx lr + 8009e32: bf00 nop + 8009e34: 20000020 .word 0x20000020 + +08009e38 <__libc_init_array>: + 8009e38: b570 push {r4, r5, r6, lr} + 8009e3a: 4e0d ldr r6, [pc, #52] ; (8009e70 <__libc_init_array+0x38>) + 8009e3c: 4c0d ldr r4, [pc, #52] ; (8009e74 <__libc_init_array+0x3c>) + 8009e3e: 1ba4 subs r4, r4, r6 + 8009e40: 10a4 asrs r4, r4, #2 + 8009e42: 2500 movs r5, #0 + 8009e44: 42a5 cmp r5, r4 + 8009e46: d109 bne.n 8009e5c <__libc_init_array+0x24> + 8009e48: 4e0b ldr r6, [pc, #44] ; (8009e78 <__libc_init_array+0x40>) + 8009e4a: 4c0c ldr r4, [pc, #48] ; (8009e7c <__libc_init_array+0x44>) + 8009e4c: f000 f960 bl 800a110 <_init> + 8009e50: 1ba4 subs r4, r4, r6 + 8009e52: 10a4 asrs r4, r4, #2 + 8009e54: 2500 movs r5, #0 + 8009e56: 42a5 cmp r5, r4 + 8009e58: d105 bne.n 8009e66 <__libc_init_array+0x2e> + 8009e5a: bd70 pop {r4, r5, r6, pc} + 8009e5c: f856 3025 ldr.w r3, [r6, r5, lsl #2] + 8009e60: 4798 blx r3 + 8009e62: 3501 adds r5, #1 + 8009e64: e7ee b.n 8009e44 <__libc_init_array+0xc> + 8009e66: f856 3025 ldr.w r3, [r6, r5, lsl #2] + 8009e6a: 4798 blx r3 + 8009e6c: 3501 adds r5, #1 + 8009e6e: e7f2 b.n 8009e56 <__libc_init_array+0x1e> + 8009e70: 0800abf8 .word 0x0800abf8 + 8009e74: 0800abf8 .word 0x0800abf8 + 8009e78: 0800abf8 .word 0x0800abf8 + 8009e7c: 0800ac00 .word 0x0800ac00 + +08009e80 : + 8009e80: b510 push {r4, lr} + 8009e82: 1e43 subs r3, r0, #1 + 8009e84: 440a add r2, r1 + 8009e86: 4291 cmp r1, r2 + 8009e88: d100 bne.n 8009e8c + 8009e8a: bd10 pop {r4, pc} + 8009e8c: f811 4b01 ldrb.w r4, [r1], #1 + 8009e90: f803 4f01 strb.w r4, [r3, #1]! + 8009e94: e7f7 b.n 8009e86 + +08009e96 : + 8009e96: 4402 add r2, r0 + 8009e98: 4603 mov r3, r0 + 8009e9a: 4293 cmp r3, r2 + 8009e9c: d100 bne.n 8009ea0 + 8009e9e: 4770 bx lr + 8009ea0: f803 1b01 strb.w r1, [r3], #1 + 8009ea4: e7f9 b.n 8009e9a ... -08009e40 : - 8009e40: 4b02 ldr r3, [pc, #8] ; (8009e4c ) - 8009e42: 460a mov r2, r1 - 8009e44: 4601 mov r1, r0 - 8009e46: 6818 ldr r0, [r3, #0] - 8009e48: f000 b8a0 b.w 8009f8c <_realloc_r> - 8009e4c: 20000020 .word 0x20000020 - -08009e50 <_raise_r>: - 8009e50: 291f cmp r1, #31 - 8009e52: b538 push {r3, r4, r5, lr} - 8009e54: 4604 mov r4, r0 - 8009e56: 460d mov r5, r1 - 8009e58: d904 bls.n 8009e64 <_raise_r+0x14> - 8009e5a: 2316 movs r3, #22 - 8009e5c: 6003 str r3, [r0, #0] - 8009e5e: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff - 8009e62: bd38 pop {r3, r4, r5, pc} - 8009e64: 6c42 ldr r2, [r0, #68] ; 0x44 - 8009e66: b112 cbz r2, 8009e6e <_raise_r+0x1e> - 8009e68: f852 3021 ldr.w r3, [r2, r1, lsl #2] - 8009e6c: b94b cbnz r3, 8009e82 <_raise_r+0x32> - 8009e6e: 4620 mov r0, r4 - 8009e70: f000 f830 bl 8009ed4 <_getpid_r> - 8009e74: 462a mov r2, r5 - 8009e76: 4601 mov r1, r0 - 8009e78: 4620 mov r0, r4 - 8009e7a: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} - 8009e7e: f000 b817 b.w 8009eb0 <_kill_r> - 8009e82: 2b01 cmp r3, #1 - 8009e84: d00a beq.n 8009e9c <_raise_r+0x4c> - 8009e86: 1c59 adds r1, r3, #1 - 8009e88: d103 bne.n 8009e92 <_raise_r+0x42> - 8009e8a: 2316 movs r3, #22 - 8009e8c: 6003 str r3, [r0, #0] - 8009e8e: 2001 movs r0, #1 - 8009e90: e7e7 b.n 8009e62 <_raise_r+0x12> - 8009e92: 2400 movs r4, #0 - 8009e94: f842 4025 str.w r4, [r2, r5, lsl #2] - 8009e98: 4628 mov r0, r5 - 8009e9a: 4798 blx r3 - 8009e9c: 2000 movs r0, #0 - 8009e9e: e7e0 b.n 8009e62 <_raise_r+0x12> - -08009ea0 : - 8009ea0: 4b02 ldr r3, [pc, #8] ; (8009eac ) - 8009ea2: 4601 mov r1, r0 - 8009ea4: 6818 ldr r0, [r3, #0] - 8009ea6: f7ff bfd3 b.w 8009e50 <_raise_r> - 8009eaa: bf00 nop - 8009eac: 20000020 .word 0x20000020 - -08009eb0 <_kill_r>: - 8009eb0: b538 push {r3, r4, r5, lr} - 8009eb2: 4c07 ldr r4, [pc, #28] ; (8009ed0 <_kill_r+0x20>) - 8009eb4: 2300 movs r3, #0 - 8009eb6: 4605 mov r5, r0 - 8009eb8: 4608 mov r0, r1 - 8009eba: 4611 mov r1, r2 - 8009ebc: 6023 str r3, [r4, #0] - 8009ebe: f7fe fadf bl 8008480 <_kill> - 8009ec2: 1c43 adds r3, r0, #1 - 8009ec4: d102 bne.n 8009ecc <_kill_r+0x1c> - 8009ec6: 6823 ldr r3, [r4, #0] - 8009ec8: b103 cbz r3, 8009ecc <_kill_r+0x1c> - 8009eca: 602b str r3, [r5, #0] - 8009ecc: bd38 pop {r3, r4, r5, pc} - 8009ece: bf00 nop - 8009ed0: 20000eb8 .word 0x20000eb8 - -08009ed4 <_getpid_r>: - 8009ed4: f7fe bacc b.w 8008470 <_getpid> - -08009ed8 <_malloc_r>: - 8009ed8: b570 push {r4, r5, r6, lr} - 8009eda: 1ccd adds r5, r1, #3 - 8009edc: f025 0503 bic.w r5, r5, #3 - 8009ee0: 3508 adds r5, #8 - 8009ee2: 2d0c cmp r5, #12 - 8009ee4: bf38 it cc - 8009ee6: 250c movcc r5, #12 - 8009ee8: 2d00 cmp r5, #0 - 8009eea: 4606 mov r6, r0 - 8009eec: db01 blt.n 8009ef2 <_malloc_r+0x1a> - 8009eee: 42a9 cmp r1, r5 - 8009ef0: d903 bls.n 8009efa <_malloc_r+0x22> - 8009ef2: 230c movs r3, #12 - 8009ef4: 6033 str r3, [r6, #0] - 8009ef6: 2000 movs r0, #0 - 8009ef8: bd70 pop {r4, r5, r6, pc} - 8009efa: f000 f87d bl 8009ff8 <__malloc_lock> - 8009efe: 4a21 ldr r2, [pc, #132] ; (8009f84 <_malloc_r+0xac>) - 8009f00: 6814 ldr r4, [r2, #0] - 8009f02: 4621 mov r1, r4 - 8009f04: b991 cbnz r1, 8009f2c <_malloc_r+0x54> - 8009f06: 4c20 ldr r4, [pc, #128] ; (8009f88 <_malloc_r+0xb0>) - 8009f08: 6823 ldr r3, [r4, #0] - 8009f0a: b91b cbnz r3, 8009f14 <_malloc_r+0x3c> - 8009f0c: 4630 mov r0, r6 - 8009f0e: f000 f863 bl 8009fd8 <_sbrk_r> - 8009f12: 6020 str r0, [r4, #0] - 8009f14: 4629 mov r1, r5 - 8009f16: 4630 mov r0, r6 - 8009f18: f000 f85e bl 8009fd8 <_sbrk_r> - 8009f1c: 1c43 adds r3, r0, #1 - 8009f1e: d124 bne.n 8009f6a <_malloc_r+0x92> - 8009f20: 230c movs r3, #12 - 8009f22: 6033 str r3, [r6, #0] - 8009f24: 4630 mov r0, r6 - 8009f26: f000 f868 bl 8009ffa <__malloc_unlock> - 8009f2a: e7e4 b.n 8009ef6 <_malloc_r+0x1e> - 8009f2c: 680b ldr r3, [r1, #0] - 8009f2e: 1b5b subs r3, r3, r5 - 8009f30: d418 bmi.n 8009f64 <_malloc_r+0x8c> - 8009f32: 2b0b cmp r3, #11 - 8009f34: d90f bls.n 8009f56 <_malloc_r+0x7e> - 8009f36: 600b str r3, [r1, #0] - 8009f38: 50cd str r5, [r1, r3] - 8009f3a: 18cc adds r4, r1, r3 - 8009f3c: 4630 mov r0, r6 - 8009f3e: f000 f85c bl 8009ffa <__malloc_unlock> - 8009f42: f104 000b add.w r0, r4, #11 - 8009f46: 1d23 adds r3, r4, #4 - 8009f48: f020 0007 bic.w r0, r0, #7 - 8009f4c: 1ac3 subs r3, r0, r3 - 8009f4e: d0d3 beq.n 8009ef8 <_malloc_r+0x20> - 8009f50: 425a negs r2, r3 - 8009f52: 50e2 str r2, [r4, r3] - 8009f54: e7d0 b.n 8009ef8 <_malloc_r+0x20> - 8009f56: 428c cmp r4, r1 - 8009f58: 684b ldr r3, [r1, #4] - 8009f5a: bf16 itet ne - 8009f5c: 6063 strne r3, [r4, #4] - 8009f5e: 6013 streq r3, [r2, #0] - 8009f60: 460c movne r4, r1 - 8009f62: e7eb b.n 8009f3c <_malloc_r+0x64> - 8009f64: 460c mov r4, r1 - 8009f66: 6849 ldr r1, [r1, #4] - 8009f68: e7cc b.n 8009f04 <_malloc_r+0x2c> - 8009f6a: 1cc4 adds r4, r0, #3 - 8009f6c: f024 0403 bic.w r4, r4, #3 - 8009f70: 42a0 cmp r0, r4 - 8009f72: d005 beq.n 8009f80 <_malloc_r+0xa8> - 8009f74: 1a21 subs r1, r4, r0 - 8009f76: 4630 mov r0, r6 - 8009f78: f000 f82e bl 8009fd8 <_sbrk_r> - 8009f7c: 3001 adds r0, #1 - 8009f7e: d0cf beq.n 8009f20 <_malloc_r+0x48> - 8009f80: 6025 str r5, [r4, #0] - 8009f82: e7db b.n 8009f3c <_malloc_r+0x64> - 8009f84: 20000eac .word 0x20000eac - 8009f88: 20000eb0 .word 0x20000eb0 - -08009f8c <_realloc_r>: - 8009f8c: b5f8 push {r3, r4, r5, r6, r7, lr} - 8009f8e: 4607 mov r7, r0 - 8009f90: 4614 mov r4, r2 - 8009f92: 460e mov r6, r1 - 8009f94: b921 cbnz r1, 8009fa0 <_realloc_r+0x14> - 8009f96: 4611 mov r1, r2 - 8009f98: e8bd 40f8 ldmia.w sp!, {r3, r4, r5, r6, r7, lr} - 8009f9c: f7ff bf9c b.w 8009ed8 <_malloc_r> - 8009fa0: b922 cbnz r2, 8009fac <_realloc_r+0x20> - 8009fa2: f000 f82b bl 8009ffc <_free_r> - 8009fa6: 4625 mov r5, r4 - 8009fa8: 4628 mov r0, r5 - 8009faa: bdf8 pop {r3, r4, r5, r6, r7, pc} - 8009fac: f000 f874 bl 800a098 <_malloc_usable_size_r> - 8009fb0: 42a0 cmp r0, r4 - 8009fb2: d20f bcs.n 8009fd4 <_realloc_r+0x48> - 8009fb4: 4621 mov r1, r4 - 8009fb6: 4638 mov r0, r7 - 8009fb8: f7ff ff8e bl 8009ed8 <_malloc_r> - 8009fbc: 4605 mov r5, r0 - 8009fbe: 2800 cmp r0, #0 - 8009fc0: d0f2 beq.n 8009fa8 <_realloc_r+0x1c> - 8009fc2: 4631 mov r1, r6 - 8009fc4: 4622 mov r2, r4 - 8009fc6: f7ff ff27 bl 8009e18 - 8009fca: 4631 mov r1, r6 - 8009fcc: 4638 mov r0, r7 - 8009fce: f000 f815 bl 8009ffc <_free_r> - 8009fd2: e7e9 b.n 8009fa8 <_realloc_r+0x1c> - 8009fd4: 4635 mov r5, r6 - 8009fd6: e7e7 b.n 8009fa8 <_realloc_r+0x1c> - -08009fd8 <_sbrk_r>: - 8009fd8: b538 push {r3, r4, r5, lr} - 8009fda: 4c06 ldr r4, [pc, #24] ; (8009ff4 <_sbrk_r+0x1c>) - 8009fdc: 2300 movs r3, #0 - 8009fde: 4605 mov r5, r0 - 8009fe0: 4608 mov r0, r1 - 8009fe2: 6023 str r3, [r4, #0] - 8009fe4: f7fe fa66 bl 80084b4 <_sbrk> - 8009fe8: 1c43 adds r3, r0, #1 - 8009fea: d102 bne.n 8009ff2 <_sbrk_r+0x1a> - 8009fec: 6823 ldr r3, [r4, #0] - 8009fee: b103 cbz r3, 8009ff2 <_sbrk_r+0x1a> - 8009ff0: 602b str r3, [r5, #0] - 8009ff2: bd38 pop {r3, r4, r5, pc} - 8009ff4: 20000eb8 .word 0x20000eb8 - -08009ff8 <__malloc_lock>: - 8009ff8: 4770 bx lr - -08009ffa <__malloc_unlock>: - 8009ffa: 4770 bx lr - -08009ffc <_free_r>: - 8009ffc: b538 push {r3, r4, r5, lr} - 8009ffe: 4605 mov r5, r0 - 800a000: 2900 cmp r1, #0 - 800a002: d045 beq.n 800a090 <_free_r+0x94> - 800a004: f851 3c04 ldr.w r3, [r1, #-4] - 800a008: 1f0c subs r4, r1, #4 - 800a00a: 2b00 cmp r3, #0 - 800a00c: bfb8 it lt - 800a00e: 18e4 addlt r4, r4, r3 - 800a010: f7ff fff2 bl 8009ff8 <__malloc_lock> - 800a014: 4a1f ldr r2, [pc, #124] ; (800a094 <_free_r+0x98>) - 800a016: 6813 ldr r3, [r2, #0] - 800a018: 4610 mov r0, r2 - 800a01a: b933 cbnz r3, 800a02a <_free_r+0x2e> - 800a01c: 6063 str r3, [r4, #4] - 800a01e: 6014 str r4, [r2, #0] - 800a020: 4628 mov r0, r5 - 800a022: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} - 800a026: f7ff bfe8 b.w 8009ffa <__malloc_unlock> - 800a02a: 42a3 cmp r3, r4 - 800a02c: d90c bls.n 800a048 <_free_r+0x4c> - 800a02e: 6821 ldr r1, [r4, #0] - 800a030: 1862 adds r2, r4, r1 - 800a032: 4293 cmp r3, r2 - 800a034: bf04 itt eq - 800a036: 681a ldreq r2, [r3, #0] - 800a038: 685b ldreq r3, [r3, #4] - 800a03a: 6063 str r3, [r4, #4] - 800a03c: bf04 itt eq - 800a03e: 1852 addeq r2, r2, r1 - 800a040: 6022 streq r2, [r4, #0] - 800a042: 6004 str r4, [r0, #0] - 800a044: e7ec b.n 800a020 <_free_r+0x24> - 800a046: 4613 mov r3, r2 - 800a048: 685a ldr r2, [r3, #4] - 800a04a: b10a cbz r2, 800a050 <_free_r+0x54> - 800a04c: 42a2 cmp r2, r4 - 800a04e: d9fa bls.n 800a046 <_free_r+0x4a> - 800a050: 6819 ldr r1, [r3, #0] - 800a052: 1858 adds r0, r3, r1 - 800a054: 42a0 cmp r0, r4 - 800a056: d10b bne.n 800a070 <_free_r+0x74> - 800a058: 6820 ldr r0, [r4, #0] - 800a05a: 4401 add r1, r0 - 800a05c: 1858 adds r0, r3, r1 - 800a05e: 4282 cmp r2, r0 - 800a060: 6019 str r1, [r3, #0] - 800a062: d1dd bne.n 800a020 <_free_r+0x24> - 800a064: 6810 ldr r0, [r2, #0] - 800a066: 6852 ldr r2, [r2, #4] - 800a068: 605a str r2, [r3, #4] - 800a06a: 4401 add r1, r0 - 800a06c: 6019 str r1, [r3, #0] - 800a06e: e7d7 b.n 800a020 <_free_r+0x24> - 800a070: d902 bls.n 800a078 <_free_r+0x7c> - 800a072: 230c movs r3, #12 - 800a074: 602b str r3, [r5, #0] - 800a076: e7d3 b.n 800a020 <_free_r+0x24> - 800a078: 6820 ldr r0, [r4, #0] - 800a07a: 1821 adds r1, r4, r0 - 800a07c: 428a cmp r2, r1 - 800a07e: bf04 itt eq - 800a080: 6811 ldreq r1, [r2, #0] - 800a082: 6852 ldreq r2, [r2, #4] - 800a084: 6062 str r2, [r4, #4] - 800a086: bf04 itt eq - 800a088: 1809 addeq r1, r1, r0 - 800a08a: 6021 streq r1, [r4, #0] - 800a08c: 605c str r4, [r3, #4] - 800a08e: e7c7 b.n 800a020 <_free_r+0x24> - 800a090: bd38 pop {r3, r4, r5, pc} - 800a092: bf00 nop - 800a094: 20000eac .word 0x20000eac - -0800a098 <_malloc_usable_size_r>: - 800a098: f851 3c04 ldr.w r3, [r1, #-4] - 800a09c: 1f18 subs r0, r3, #4 - 800a09e: 2b00 cmp r3, #0 - 800a0a0: bfbc itt lt - 800a0a2: 580b ldrlt r3, [r1, r0] - 800a0a4: 18c0 addlt r0, r0, r3 - 800a0a6: 4770 bx lr - -0800a0a8 <_init>: - 800a0a8: b5f8 push {r3, r4, r5, r6, r7, lr} - 800a0aa: bf00 nop - 800a0ac: bcf8 pop {r3, r4, r5, r6, r7} - 800a0ae: bc08 pop {r3} - 800a0b0: 469e mov lr, r3 - 800a0b2: 4770 bx lr - -0800a0b4 <_fini>: - 800a0b4: b5f8 push {r3, r4, r5, r6, r7, lr} - 800a0b6: bf00 nop - 800a0b8: bcf8 pop {r3, r4, r5, r6, r7} - 800a0ba: bc08 pop {r3} - 800a0bc: 469e mov lr, r3 - 800a0be: 4770 bx lr +08009ea8 : + 8009ea8: 4b02 ldr r3, [pc, #8] ; (8009eb4 ) + 8009eaa: 460a mov r2, r1 + 8009eac: 4601 mov r1, r0 + 8009eae: 6818 ldr r0, [r3, #0] + 8009eb0: f000 b8a0 b.w 8009ff4 <_realloc_r> + 8009eb4: 20000020 .word 0x20000020 + +08009eb8 <_raise_r>: + 8009eb8: 291f cmp r1, #31 + 8009eba: b538 push {r3, r4, r5, lr} + 8009ebc: 4604 mov r4, r0 + 8009ebe: 460d mov r5, r1 + 8009ec0: d904 bls.n 8009ecc <_raise_r+0x14> + 8009ec2: 2316 movs r3, #22 + 8009ec4: 6003 str r3, [r0, #0] + 8009ec6: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff + 8009eca: bd38 pop {r3, r4, r5, pc} + 8009ecc: 6c42 ldr r2, [r0, #68] ; 0x44 + 8009ece: b112 cbz r2, 8009ed6 <_raise_r+0x1e> + 8009ed0: f852 3021 ldr.w r3, [r2, r1, lsl #2] + 8009ed4: b94b cbnz r3, 8009eea <_raise_r+0x32> + 8009ed6: 4620 mov r0, r4 + 8009ed8: f000 f830 bl 8009f3c <_getpid_r> + 8009edc: 462a mov r2, r5 + 8009ede: 4601 mov r1, r0 + 8009ee0: 4620 mov r0, r4 + 8009ee2: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} + 8009ee6: f000 b817 b.w 8009f18 <_kill_r> + 8009eea: 2b01 cmp r3, #1 + 8009eec: d00a beq.n 8009f04 <_raise_r+0x4c> + 8009eee: 1c59 adds r1, r3, #1 + 8009ef0: d103 bne.n 8009efa <_raise_r+0x42> + 8009ef2: 2316 movs r3, #22 + 8009ef4: 6003 str r3, [r0, #0] + 8009ef6: 2001 movs r0, #1 + 8009ef8: e7e7 b.n 8009eca <_raise_r+0x12> + 8009efa: 2400 movs r4, #0 + 8009efc: f842 4025 str.w r4, [r2, r5, lsl #2] + 8009f00: 4628 mov r0, r5 + 8009f02: 4798 blx r3 + 8009f04: 2000 movs r0, #0 + 8009f06: e7e0 b.n 8009eca <_raise_r+0x12> + +08009f08 : + 8009f08: 4b02 ldr r3, [pc, #8] ; (8009f14 ) + 8009f0a: 4601 mov r1, r0 + 8009f0c: 6818 ldr r0, [r3, #0] + 8009f0e: f7ff bfd3 b.w 8009eb8 <_raise_r> + 8009f12: bf00 nop + 8009f14: 20000020 .word 0x20000020 + +08009f18 <_kill_r>: + 8009f18: b538 push {r3, r4, r5, lr} + 8009f1a: 4c07 ldr r4, [pc, #28] ; (8009f38 <_kill_r+0x20>) + 8009f1c: 2300 movs r3, #0 + 8009f1e: 4605 mov r5, r0 + 8009f20: 4608 mov r0, r1 + 8009f22: 4611 mov r1, r2 + 8009f24: 6023 str r3, [r4, #0] + 8009f26: f7fa fbd9 bl 80046dc <_kill> + 8009f2a: 1c43 adds r3, r0, #1 + 8009f2c: d102 bne.n 8009f34 <_kill_r+0x1c> + 8009f2e: 6823 ldr r3, [r4, #0] + 8009f30: b103 cbz r3, 8009f34 <_kill_r+0x1c> + 8009f32: 602b str r3, [r5, #0] + 8009f34: bd38 pop {r3, r4, r5, pc} + 8009f36: bf00 nop + 8009f38: 20000ec0 .word 0x20000ec0 + +08009f3c <_getpid_r>: + 8009f3c: f7fa bbc6 b.w 80046cc <_getpid> + +08009f40 <_malloc_r>: + 8009f40: b570 push {r4, r5, r6, lr} + 8009f42: 1ccd adds r5, r1, #3 + 8009f44: f025 0503 bic.w r5, r5, #3 + 8009f48: 3508 adds r5, #8 + 8009f4a: 2d0c cmp r5, #12 + 8009f4c: bf38 it cc + 8009f4e: 250c movcc r5, #12 + 8009f50: 2d00 cmp r5, #0 + 8009f52: 4606 mov r6, r0 + 8009f54: db01 blt.n 8009f5a <_malloc_r+0x1a> + 8009f56: 42a9 cmp r1, r5 + 8009f58: d903 bls.n 8009f62 <_malloc_r+0x22> + 8009f5a: 230c movs r3, #12 + 8009f5c: 6033 str r3, [r6, #0] + 8009f5e: 2000 movs r0, #0 + 8009f60: bd70 pop {r4, r5, r6, pc} + 8009f62: f000 f87d bl 800a060 <__malloc_lock> + 8009f66: 4a21 ldr r2, [pc, #132] ; (8009fec <_malloc_r+0xac>) + 8009f68: 6814 ldr r4, [r2, #0] + 8009f6a: 4621 mov r1, r4 + 8009f6c: b991 cbnz r1, 8009f94 <_malloc_r+0x54> + 8009f6e: 4c20 ldr r4, [pc, #128] ; (8009ff0 <_malloc_r+0xb0>) + 8009f70: 6823 ldr r3, [r4, #0] + 8009f72: b91b cbnz r3, 8009f7c <_malloc_r+0x3c> + 8009f74: 4630 mov r0, r6 + 8009f76: f000 f863 bl 800a040 <_sbrk_r> + 8009f7a: 6020 str r0, [r4, #0] + 8009f7c: 4629 mov r1, r5 + 8009f7e: 4630 mov r0, r6 + 8009f80: f000 f85e bl 800a040 <_sbrk_r> + 8009f84: 1c43 adds r3, r0, #1 + 8009f86: d124 bne.n 8009fd2 <_malloc_r+0x92> + 8009f88: 230c movs r3, #12 + 8009f8a: 6033 str r3, [r6, #0] + 8009f8c: 4630 mov r0, r6 + 8009f8e: f000 f868 bl 800a062 <__malloc_unlock> + 8009f92: e7e4 b.n 8009f5e <_malloc_r+0x1e> + 8009f94: 680b ldr r3, [r1, #0] + 8009f96: 1b5b subs r3, r3, r5 + 8009f98: d418 bmi.n 8009fcc <_malloc_r+0x8c> + 8009f9a: 2b0b cmp r3, #11 + 8009f9c: d90f bls.n 8009fbe <_malloc_r+0x7e> + 8009f9e: 600b str r3, [r1, #0] + 8009fa0: 50cd str r5, [r1, r3] + 8009fa2: 18cc adds r4, r1, r3 + 8009fa4: 4630 mov r0, r6 + 8009fa6: f000 f85c bl 800a062 <__malloc_unlock> + 8009faa: f104 000b add.w r0, r4, #11 + 8009fae: 1d23 adds r3, r4, #4 + 8009fb0: f020 0007 bic.w r0, r0, #7 + 8009fb4: 1ac3 subs r3, r0, r3 + 8009fb6: d0d3 beq.n 8009f60 <_malloc_r+0x20> + 8009fb8: 425a negs r2, r3 + 8009fba: 50e2 str r2, [r4, r3] + 8009fbc: e7d0 b.n 8009f60 <_malloc_r+0x20> + 8009fbe: 428c cmp r4, r1 + 8009fc0: 684b ldr r3, [r1, #4] + 8009fc2: bf16 itet ne + 8009fc4: 6063 strne r3, [r4, #4] + 8009fc6: 6013 streq r3, [r2, #0] + 8009fc8: 460c movne r4, r1 + 8009fca: e7eb b.n 8009fa4 <_malloc_r+0x64> + 8009fcc: 460c mov r4, r1 + 8009fce: 6849 ldr r1, [r1, #4] + 8009fd0: e7cc b.n 8009f6c <_malloc_r+0x2c> + 8009fd2: 1cc4 adds r4, r0, #3 + 8009fd4: f024 0403 bic.w r4, r4, #3 + 8009fd8: 42a0 cmp r0, r4 + 8009fda: d005 beq.n 8009fe8 <_malloc_r+0xa8> + 8009fdc: 1a21 subs r1, r4, r0 + 8009fde: 4630 mov r0, r6 + 8009fe0: f000 f82e bl 800a040 <_sbrk_r> + 8009fe4: 3001 adds r0, #1 + 8009fe6: d0cf beq.n 8009f88 <_malloc_r+0x48> + 8009fe8: 6025 str r5, [r4, #0] + 8009fea: e7db b.n 8009fa4 <_malloc_r+0x64> + 8009fec: 20000eb4 .word 0x20000eb4 + 8009ff0: 20000eb8 .word 0x20000eb8 + +08009ff4 <_realloc_r>: + 8009ff4: b5f8 push {r3, r4, r5, r6, r7, lr} + 8009ff6: 4607 mov r7, r0 + 8009ff8: 4614 mov r4, r2 + 8009ffa: 460e mov r6, r1 + 8009ffc: b921 cbnz r1, 800a008 <_realloc_r+0x14> + 8009ffe: 4611 mov r1, r2 + 800a000: e8bd 40f8 ldmia.w sp!, {r3, r4, r5, r6, r7, lr} + 800a004: f7ff bf9c b.w 8009f40 <_malloc_r> + 800a008: b922 cbnz r2, 800a014 <_realloc_r+0x20> + 800a00a: f000 f82b bl 800a064 <_free_r> + 800a00e: 4625 mov r5, r4 + 800a010: 4628 mov r0, r5 + 800a012: bdf8 pop {r3, r4, r5, r6, r7, pc} + 800a014: f000 f874 bl 800a100 <_malloc_usable_size_r> + 800a018: 42a0 cmp r0, r4 + 800a01a: d20f bcs.n 800a03c <_realloc_r+0x48> + 800a01c: 4621 mov r1, r4 + 800a01e: 4638 mov r0, r7 + 800a020: f7ff ff8e bl 8009f40 <_malloc_r> + 800a024: 4605 mov r5, r0 + 800a026: 2800 cmp r0, #0 + 800a028: d0f2 beq.n 800a010 <_realloc_r+0x1c> + 800a02a: 4631 mov r1, r6 + 800a02c: 4622 mov r2, r4 + 800a02e: f7ff ff27 bl 8009e80 + 800a032: 4631 mov r1, r6 + 800a034: 4638 mov r0, r7 + 800a036: f000 f815 bl 800a064 <_free_r> + 800a03a: e7e9 b.n 800a010 <_realloc_r+0x1c> + 800a03c: 4635 mov r5, r6 + 800a03e: e7e7 b.n 800a010 <_realloc_r+0x1c> + +0800a040 <_sbrk_r>: + 800a040: b538 push {r3, r4, r5, lr} + 800a042: 4c06 ldr r4, [pc, #24] ; (800a05c <_sbrk_r+0x1c>) + 800a044: 2300 movs r3, #0 + 800a046: 4605 mov r5, r0 + 800a048: 4608 mov r0, r1 + 800a04a: 6023 str r3, [r4, #0] + 800a04c: f7fa fb60 bl 8004710 <_sbrk> + 800a050: 1c43 adds r3, r0, #1 + 800a052: d102 bne.n 800a05a <_sbrk_r+0x1a> + 800a054: 6823 ldr r3, [r4, #0] + 800a056: b103 cbz r3, 800a05a <_sbrk_r+0x1a> + 800a058: 602b str r3, [r5, #0] + 800a05a: bd38 pop {r3, r4, r5, pc} + 800a05c: 20000ec0 .word 0x20000ec0 + +0800a060 <__malloc_lock>: + 800a060: 4770 bx lr + +0800a062 <__malloc_unlock>: + 800a062: 4770 bx lr + +0800a064 <_free_r>: + 800a064: b538 push {r3, r4, r5, lr} + 800a066: 4605 mov r5, r0 + 800a068: 2900 cmp r1, #0 + 800a06a: d045 beq.n 800a0f8 <_free_r+0x94> + 800a06c: f851 3c04 ldr.w r3, [r1, #-4] + 800a070: 1f0c subs r4, r1, #4 + 800a072: 2b00 cmp r3, #0 + 800a074: bfb8 it lt + 800a076: 18e4 addlt r4, r4, r3 + 800a078: f7ff fff2 bl 800a060 <__malloc_lock> + 800a07c: 4a1f ldr r2, [pc, #124] ; (800a0fc <_free_r+0x98>) + 800a07e: 6813 ldr r3, [r2, #0] + 800a080: 4610 mov r0, r2 + 800a082: b933 cbnz r3, 800a092 <_free_r+0x2e> + 800a084: 6063 str r3, [r4, #4] + 800a086: 6014 str r4, [r2, #0] + 800a088: 4628 mov r0, r5 + 800a08a: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} + 800a08e: f7ff bfe8 b.w 800a062 <__malloc_unlock> + 800a092: 42a3 cmp r3, r4 + 800a094: d90c bls.n 800a0b0 <_free_r+0x4c> + 800a096: 6821 ldr r1, [r4, #0] + 800a098: 1862 adds r2, r4, r1 + 800a09a: 4293 cmp r3, r2 + 800a09c: bf04 itt eq + 800a09e: 681a ldreq r2, [r3, #0] + 800a0a0: 685b ldreq r3, [r3, #4] + 800a0a2: 6063 str r3, [r4, #4] + 800a0a4: bf04 itt eq + 800a0a6: 1852 addeq r2, r2, r1 + 800a0a8: 6022 streq r2, [r4, #0] + 800a0aa: 6004 str r4, [r0, #0] + 800a0ac: e7ec b.n 800a088 <_free_r+0x24> + 800a0ae: 4613 mov r3, r2 + 800a0b0: 685a ldr r2, [r3, #4] + 800a0b2: b10a cbz r2, 800a0b8 <_free_r+0x54> + 800a0b4: 42a2 cmp r2, r4 + 800a0b6: d9fa bls.n 800a0ae <_free_r+0x4a> + 800a0b8: 6819 ldr r1, [r3, #0] + 800a0ba: 1858 adds r0, r3, r1 + 800a0bc: 42a0 cmp r0, r4 + 800a0be: d10b bne.n 800a0d8 <_free_r+0x74> + 800a0c0: 6820 ldr r0, [r4, #0] + 800a0c2: 4401 add r1, r0 + 800a0c4: 1858 adds r0, r3, r1 + 800a0c6: 4282 cmp r2, r0 + 800a0c8: 6019 str r1, [r3, #0] + 800a0ca: d1dd bne.n 800a088 <_free_r+0x24> + 800a0cc: 6810 ldr r0, [r2, #0] + 800a0ce: 6852 ldr r2, [r2, #4] + 800a0d0: 605a str r2, [r3, #4] + 800a0d2: 4401 add r1, r0 + 800a0d4: 6019 str r1, [r3, #0] + 800a0d6: e7d7 b.n 800a088 <_free_r+0x24> + 800a0d8: d902 bls.n 800a0e0 <_free_r+0x7c> + 800a0da: 230c movs r3, #12 + 800a0dc: 602b str r3, [r5, #0] + 800a0de: e7d3 b.n 800a088 <_free_r+0x24> + 800a0e0: 6820 ldr r0, [r4, #0] + 800a0e2: 1821 adds r1, r4, r0 + 800a0e4: 428a cmp r2, r1 + 800a0e6: bf04 itt eq + 800a0e8: 6811 ldreq r1, [r2, #0] + 800a0ea: 6852 ldreq r2, [r2, #4] + 800a0ec: 6062 str r2, [r4, #4] + 800a0ee: bf04 itt eq + 800a0f0: 1809 addeq r1, r1, r0 + 800a0f2: 6021 streq r1, [r4, #0] + 800a0f4: 605c str r4, [r3, #4] + 800a0f6: e7c7 b.n 800a088 <_free_r+0x24> + 800a0f8: bd38 pop {r3, r4, r5, pc} + 800a0fa: bf00 nop + 800a0fc: 20000eb4 .word 0x20000eb4 + +0800a100 <_malloc_usable_size_r>: + 800a100: f851 3c04 ldr.w r3, [r1, #-4] + 800a104: 1f18 subs r0, r3, #4 + 800a106: 2b00 cmp r3, #0 + 800a108: bfbc itt lt + 800a10a: 580b ldrlt r3, [r1, r0] + 800a10c: 18c0 addlt r0, r0, r3 + 800a10e: 4770 bx lr + +0800a110 <_init>: + 800a110: b5f8 push {r3, r4, r5, r6, r7, lr} + 800a112: bf00 nop + 800a114: bcf8 pop {r3, r4, r5, r6, r7} + 800a116: bc08 pop {r3} + 800a118: 469e mov lr, r3 + 800a11a: 4770 bx lr + +0800a11c <_fini>: + 800a11c: b5f8 push {r3, r4, r5, r6, r7, lr} + 800a11e: bf00 nop + 800a120: bcf8 pop {r3, r4, r5, r6, r7} + 800a122: bc08 pop {r3} + 800a124: 469e mov lr, r3 + 800a126: 4770 bx lr diff --git a/otto_controller_source/Debug/sources.mk b/otto_controller_source/Debug/sources.mk index d562b64..ab6831f 100644 --- a/otto_controller_source/Debug/sources.mk +++ b/otto_controller_source/Debug/sources.mk @@ -26,7 +26,7 @@ CPP_DEPS := # Every subdirectory with source files must be described here SUBDIRS := \ +Core/Src \ +Core/Startup \ Drivers/STM32F7xx_HAL_Driver/Src \ -Src \ -Startup \ diff --git a/otto_controller_source/Debug/st-link_gdbserver_log.txt b/otto_controller_source/Debug/st-link_gdbserver_log.txt deleted file mode 100644 index 85c5e10..0000000 --- a/otto_controller_source/Debug/st-link_gdbserver_log.txt +++ /dev/null @@ -1,3434 +0,0 @@ -[0.000] initConfigParams(): Configuration flags start -[0.000] initConfigParams(): halt false -[0.000] initConfigParams(): config-file "" -[0.000] initConfigParams(): persistent false -[0.000] initConfigParams(): +log-file "/home/fdila/Projects/otto/otto_controller_source/Debug/st-link_gdbserver_log.txt" -[0.000] initConfigParams(): +log-level 31 -[0.000] initConfigParams(): +port-number 61234 -[0.000] initConfigParams(): +verbose true -[0.000] initConfigParams(): refresh-delay 15 -[0.000] initConfigParams(): +verify true -[0.000] initConfigParams(): +swd true -[0.000] initConfigParams(): +swo-port 61235 -[0.000] initConfigParams(): +cpu-clock 16000000 -[0.000] initConfigParams(): +swo-clock-div 8 -[0.000] initConfigParams(): initialize-reset false -[0.000] initConfigParams(): debuggers false -[0.000] initConfigParams(): serial-number "" -[0.000] initConfigParams(): +apid 0 -[0.000] initConfigParams(): +attach true -[0.000] initConfigParams(): shared false -[0.000] initConfigParams(): erase-all false -[0.000] initConfigParams(): memory-map "" -[0.000] initConfigParams(): ext-memory-loaders false -[0.000] initConfigParams(): extload "" -[0.000] initConfigParams(): +stm32cubeprogrammer-path "/opt/st/stm32cubeide_1.1.0/plugins/com.st.stm32cube.ide.mcu.externaltools.cubeprogrammer.linux64_1.1.0.201910081157/tools/bin" -[0.000] initConfigParams(): temp-path "" -[0.000] initConfigParams(): preserve-temps false -[0.000] initConfigParams(): frequency -1 -[0.000] initConfigParams(): licenses false -[0.000] initConfigParams(): ignore-rest false -[0.000] initConfigParams(): version false -[0.000] initConfigParams(): help false -[0.000] initConfigParams(): Configuration flags end -[0.000] init(): STMicroelectronics ST-LINK GDB server. Version 5.3.2 -Copyright (c) 2019, STMicroelectronics. All rights reserved. -[0.005] Device_Initialise(): Target connection mode: Attach -[0.012] reset_hw_wtchpt_module(): Hardware watchpoint supported by the target -[0.015] Device_Initialise(): COM frequency = 4000 kHz -[0.015] Device_Initialise(): ST-LINK Firmware version : V2J35M26 -[0.015] Device_Initialise(): Device ID: 0x451 -[0.016] Device_Initialise(): PC: 0x10 -[0.016] Device_GetStatus(): ST-LINK device status: RUN_MODE -[0.016] Device_Initialise(): ST-LINK detects target voltage = 3.27 V -[0.017] Device_Initialise(): ST-LINK device status: RUN_MODE -[0.017] initServerContext(): ST-LINK device initialization OK -[0.017] WaitConnection(): Waiting for connection on port 61234... -[0.018] WaitConnection(): Waiting for connection on port 61235... -[2.070] WaitConnection(): Accepted connection on port 61234... -[2.070] handleGDBConnection(): Try halt ... -[2.070] read(): <13> Rx: +$qSupported:multiprocess+;swbreak+;hwbreak+;qRelocInsn+;fork-events+;vfork-events+;exec-events+;vContSupported+;QThreadEvents+;no-resumed+#df -[2.081] Device_GetStatus(): ST-LINK device status: HALT_MODE -[2.081] write(): <13> Tx: + -[2.081] write(): <13> Tx: $PacketSize=c00;qXfer:memory-map:read+;qXfer:features:read+;QStartNoAckMode+;QNonStop+;qXfer:threads:read+;hwbreak+;swbreak+#f2 -[2.081] read(): <13> Rx: +$vMustReplyEmpty#3a -[2.092] write(): <13> Tx: + -[2.092] write(): <13> Tx: $#00 -[2.135] read(): <13> Rx: +$QStartNoAckMode#b0 -[2.146] write(): <13> Tx: + -[2.146] write(): <13> Tx: $OK#9a -[2.186] read(): <13> Rx: +$Hg0#df -[2.197] write(): <13> Tx: $#00 -[2.197] read(): <13> Rx: $qXfer:features:read:target.xml:0,bfb#75 -[2.197] write(): <13> Tx: $l #aa -[2.199] read(): <13> Rx: $QNonStop:1#8d -[2.199] write(): <13> Tx: $OK#9a -[2.199] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[2.199] write(): <13> Tx: $l#8b -[2.199] read(): <13> Rx: $qAttached#8f -[2.199] write(): <13> Tx: $1#31 -[2.200] read(): <13> Rx: $qTStatus#49 -[2.200] write(): <13> Tx: $#00 -[2.200] read(): <13> Rx: $?#3f -[2.200] write(): <13> Tx: $T05thread:1;core:0;#25 -[2.201] read(): <13> Rx: $vStopped#55 -[2.201] write(): <13> Tx: $OK#9a -[2.201] read(): <13> Rx: $Hg1#e0 -[2.201] write(): <13> Tx: $#00 -[2.201] read(): <13> Rx: $g#67 -[2.208] write(): <13> Tx: $20260100c46400082026010045250100000000000000000000000000c0ff07200000000000000000000000000000000000000000c0ff07203106000834060008000000210000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cdcccc3d00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000c0ff072000000000#ad -[2.208] read(): <13> Rx: $qXfer:memory-map:read::0,bfb#14 -[2.209] write(): <13> Tx: $l\x0a\x0a0x8000\x0a\x0a0x8000\x0a#79 -[2.209] read(): <13> Rx: $m8008014,2#30 -[2.209] handlePacket(): Reading 0x2 bytes of memory from addr 0x8008014 -[2.210] write(): <13> Tx: $8400#cc -[2.255] read(): <13> Rx: $m8000634,4#32 -[2.255] handlePacket(): Reading 0x4 bytes of memory from addr 0x8000634 -[2.256] write(): <13> Tx: $d31afa68#5e -[2.256] read(): <13> Rx: $m2007ffc0,40#25 -[2.256] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ffc0 -[2.257] write(): <13> Tx: $00000000e803000045250100e9030000d8ff0720b553000801000000c4640008f0ff0720c35b00080000000000000000dc640008906200080000000023610008#9a -[2.978] read(): <13> Rx: $m80053b4,4#63 -[2.978] handlePacket(): Reading 0x4 bytes of memory from addr 0x80053b4 -[2.978] write(): <13> Tx: $fae700bf#8b -[2.979] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[2.979] write(): <13> Tx: $l#8b -[2.981] read(): <13> Rx: $qRcmd,57726974654450203078322030783030303030304630#f6 -[2.981] write(): <13> Tx: $4f2e4b2e0a#ef -[2.982] read(): <13> Rx: $qRcmd,52656164415020307832#29 -[2.983] write(): <13> Tx: $4f2e4b2e3a307865303066646664300a#95 -[2.984] read(): <13> Rx: $me00fdfd0,20#84 -[2.984] handlePacket(): Reading 0x20 bytes of memory from addr 0xe00fdfd0 -[2.984] write(): <13> Tx: $0000000000000000000000000000000051000000040000001a00000000000000#3c -[2.986] read(): <13> Rx: $qRcmd,7265736574#37 -[2.986] STM32_AppReset(): Enter STM32_AppReset() function -[3.090] STM32_AppReset(): NVIC_DFSR_REG = 0x00000009 -[3.091] STM32_AppReset(): NVIC_CFGFSR_REG = 0x00000000 -[3.091] STM32_AppReset(): XPSR = 0x01000000 -[3.091] write(): <13> Tx: $53544d3332205375636365737366756c6c7920636f6d706c65746564207265736574206f7065726174696f6e0a#59 -[3.093] WaitConnection(): Accepted connection on port 61235... -[3.095] read(): <13> Rx: $vFlashErase:08000000,00010000#c3 -[3.095] handleFlashPacket(): FlashErase skipped (Will be performed at flash done) -[3.095] write(): <13> Tx: $OK#9a -[3.095] read(): <13> Rx: $vFlashWrite:8000000:\x00\x00\x08 \xff\x7f\x00\x08\xff}]\x00\x08\xff}]\x00\x08\xff}]\x00\x08\xff}]\x00\x08\xff}]\x00\x08\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\xff}]\x00\x08\xff}]\x00\x08\x00\x00\x00\x00\xff}]\x00\x08\xff}]\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff}]\x00\x08\xff\x7f\x00\x08\x09~\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\x1d~\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x081~\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\x00\x00\x00\x00\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\x00\x00\x00\x00\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08#4a -[3.095] handleFlashPacket(): Flash write: Address= 0x8000000, Length=504 -[3.095] write(): <13> Tx: $OK#9a -[3.096] read(): <13> Rx: $vFlashWrite:80001f8:\x10\xff\x05L}\x03x3\xff\x04K\x13\xff\x04H\xff\xff\x00\xff\x01}\x03}\x03p\x10\xff\xff\x00\x00 \x00\x00\x00\x00\x10\xff\x00\x08\x08\xff\x03K\x1b\xff\x03I\x03H\xff\xff\x00\xff\x08\xff\x00\x00\x00\x00\xff\x00\x00 \x10\xff\x00\x08\x03F\x13\xff\x01+\x00}\x0a\xff\xff\x18\x1a\x018pGS\xffJ\xff\x00)\x08\xff\x00(\x1c\xffO\xff\xff1O\xff\xff0\x00\xffr\xff\xff\xff\x08\x0cm\xff\x04\xff\x00\xff\x06\xff\xff\xff\x04\xff\xff\xff\x02}\x03\x04\xffpG-\xff\xffG\x08\xff\x04F\xffF\x00+K\xff\xffB\x15Fg\xff\xff\xff\xff\xffJ\xff\xff\xff \x07\x01\xff\x02\xff \xff\x07\xff\xff@G\xff\x03\x08\xff@O\xff\x15N}\x03\x0c\xff\xff\xff\xff\x1f\xff\xff\xff\x0e\xff\x17\xffC\xff\x08C\x07\xff\x0c\xff\xffB\x09\xff\xff\x18\x07\xff\xff0\xff\xff\x1b\xff\xffB@\xff\x18\xff\x02?+D[\x1a\xff\xff\xff\xff\xff\xff\x0e\xff\x103D\xff\x03D\x00\xff\x0c\xff\xffE\x09\xff,\x19\x00\xff\xff3\xff\xff\x07\xff\xffE@\xff\x04\xff\x028,D@\xff\x07@\xff\xff\x0c\x04\x00'\x1e\xff\xff@\x00}\x03\xff\xff\x00C9F\xff\xff\xff\xff\xffB\x09\xff\x00.\x00\xff\xff\xff\x00'\xff\xff\x00\x018F9F\xff\xff\xff\xff\xff\xff\xff\xff\x00/G\xff\xffB\x02\xff\xffB\x00\xff\xff\xff\xff\x1aa\xff\x03\x03\x01 \xffF\x00.\xff\xff\xff\xff\x00H\xff\xff\x02\xff\xff\xff\xff\xff\xff\xff\x00}\x0a@\xff\xff\xffI\x1bO\xff\x15N\x1f\xff\xff\xff\x01'\xff\xff\xff\xff}\x03\x0c\x0e\xff\x1c\x11C\xff\x01C\x08\xff\x0c\xff\xffB\x07\xff\xff\x18\x0c\xff\xff0\x02\xff\xffB\x00\xff\xff\xff\xffFY\x1a\xff\xff\xff\xff\xff\xff\x0e\xff\x10\x14C\xff\x04D\x08\xff\x00\xff\xffE\x07\xff,\x19\x00\xff\xff3\x02\xff\xffE\x00\xff\xff\xff\x18F\xff\xff\x08\x04@\xff\x0c@\xff\xff\xff\xff \x0c\xff@"\xff\x0c\xffN\xff\x03\x0e\x01\xff\x07\xff \xff\x0c\xff!\xff\x0c\xffO\xff\x1eH%C\xff\xff\xff\xff,\x0c\x08\xff\x193\x1f\xff\xff\xffD\xff\x03C\x09\xff\x0a\xff\xffB\x02\xff\x07\xff\x00\xff\x07\xff\x0b\xff\x1e\xff\x03\x03\x09\xff\xff0\xff\xff\xff\xff\xffB@\xff\xff\xff\xff\xff\x02\x09sD\x1b\x1b\xff\xff\xff\xff\xff\xff\x08\xff\x103E\xff\x03D\x00\xff\x0a\xff\xffE\x08\xff\x1e\xff\x04\x04\x00\xff\xff3k\xff\xffEi\xff\x028tD@\xff\x09@\xff\xff\x02\xff\xff\xff\x0a\x04LE\xffFKFT\xffQ\xff\x00.i\xff\xff\xff\x0a\x05d\xff\x03\x04\x04\xff\x0c\xff\xff@\xff@L\xff\x05\x05\xff\xff\x00T\x00'G\xff\xff\xff \x03 \xff\x03\xff\xff@\x01\xff\x02\xff!\xff\x03\xffO\xff\x15N8C\x01\x0c\xff\xff\xff\xff\x1f\xff\xff\xff\x0e\xff\x173A\xff\x03A\x07\xff\x08\xff\xffB\x04\xff\x02\xff\x07\xffi\x18\x07\xff\xff\xffxazh\xffhxi\xff\xff\xff\xff\x02F\xff\xff\x0f0\x11F\x18F\xff\xff]\xff\x00\xff\x187\xffF\xff\xff\xff\xff\xff\xff\x00\xff\x03F\xffq\xff\xff\x070\x18F\xff\xff1\xff\x00\xff\x087\xffF\xff\xff\xff\xff\xff\xff\x00\xffx`xh\xff\xff\xff\xff\x03F\x18F\x087\xffF\xff\xff\x00\x00\xff\xff\xff\xff\x00\xffx`\x00}\x03{a\xff\xff\xff\xff8a{h\x00+\x01\xff\x01}\x03\xff\xff{h\x00"\xff\xff4 {h\x02"\xff\xff5 {h\x1bh\x1ah{h\x1bh"\xff\x01\x02\x1a`\x0f\xff\xff\xff\xff\xff\x02F;i\xff\x1a\x05+\x08\xff{h "Ze{h\x03"\xff\xff5 \x03}\x03x\xff{h\x1bh\x1bh\x03\xff\x01\x03\x00+\xff\xff{h\x1bh\x1bh{azi8K\x13@{a{hZh{h\xffh\x1aC{h\xffh\x1aC{h\x1bi\x1aC{h[i\x1aC{h\xffi\x1aC{h\xffi\x1aC{h\x1bj\x13Czi\x13C{a{h[j\x04+\x07\xff{h\xffj{h\x1bk\x13Czi\x13C{a{h\x1bhzi\x1a`{h\x1bh[i{a{i}\x03\xff\x07\x03{a{h[jzi\x13C{a{h[j\x04+\x17\xff{h\xffjzi\x13C{a{h\xffj\x00+\x0e\xffxh\x00\xff\xff\xff\x03F\x00+\x08\xff{h@"Ze{h\x01"\xff\xff5 \x01}\x03\x16\xff{h\x1bhziZaxh\x00\xffP\xff\x03F\xff`{h\xffm?"\xff@\xffh\xff`{h\x00"Ze{h\x01"\xff\xff5 \x00}\x03\x18F\x187\xffF\xff\xff?\xff\x10\xff\xff\xff\xff\xff\x00\xff\xff`\xff`z`;`\x00}\x03\xffu\xffh\xffm;a\xffh\xff\xff40\x01+\x01\xff\x02}\x03H\xff\xffh\x01"\xff\xff4 \xffh\xff\xff50\xff\xff\x01+7\xff\xffh\x02"\xff\xff5 \xffh\x00"Ze;hzh\xffh\xffh\x00\xff\xff\xff\xffh\xffm?"\xff@;i\xff`\xffh\x1bh\x1ah\xffh\x1bhB\xff\x16\x02\x1a`\xffh\x1bhZi\xffh\x1bhB\xff\xff\x02Za\xffh\x1bl\x00+\x07\xff\xffh\x1bh\x1ah\xffh\x1bhB\xff\x08\x02\x1a`\xffh\x1bh\x1ah\xffh\x1bhB\xff\x01\x02\x1a`\x05\xff\xffh\x00"\xff\xff4 \x02}\x03\xffu\xff}]\x18F\x187\xffF\xff\xff\xff\xff\xff\xff\x00\xffx`{h\xff\xff50\xff\xff\x02+\x04\xff{h\xff"Ze\x01}\x03\x0c\xff{h\x05"\xff\xff5 {h\x1bh\x1ah{h\x1bh"\xff\x01\x02\x1a`\x00}\x03\x18F\x0c7\xffF]\xff\x04{pG\xff\xff\xff\xff\x00\xffx`\x00}\x03\xff`\xffK\x1bh\xffJ\xff\xff\x03}\x03\xff\x0a{a{h\xffm;a;i\x1bh\xff`{h\xffm\x08"\xff@\xffh\x13@\x00+\x1a\xff{h\x1bh\x1bh\x03\xff\x04\x03\x00+\x13\xff{h\x1bh\x1ah{h\x1bh"\xff\x04\x02\x1a`{h\xffm\x08"\xff@;i\xff`{h[mC\xff\x01\x02{hZe{h\xffm\x01"\xff@\xffh\x13@\x00+\x12\xff{h\x1bh[i\x03\xff\xff\x03\x00+\x0b\xff{h\xffm\x01"\xff@;i\xff`{h[mC\xff\x02\x02{hZe{h\xffm\x04"\xff@\xffh\x13@\x00+\x12\xff{h\x1bh\x1bh\x03\xff\x02\x03\x00+\x0b\xff{h\xffm\x04"\xff@;i\xff`{h[mC\xff\x04\x02{hZe{h\xffm\x10"\xff@\xffh\x13@\x00+C\xff{h\x1bh\x1bh\x03\xff\x08\x03\x00+<\xff{h\xffm\x10"\xff@;i\xff`{h\x1bh\x1bh\x03\xff\xff}\x03\x00+\x18\xff{h\x1bh\x1bh\x03\xff\x00}\x03\x00+\x08\xff{h\x1bl\x00+}\x04\xff{h\x1blxh\xffG\x1f\xff{h\xffl\x00+\x1b\xff{h\xfflxh\xffG\x16\xff{h\x1bh\x1bh\x03\xff\xffs\x00+\x07\xff{h\x1bh\x1ah{h\x1bh"\xff\x08\x02\x1a`{h\x1bl\x00+\x03\xff{h\x1blxh\xffG{h\xffm "\xff@\xffh\x13@\x00+\x00\xff\xff\xff{h\x1bh\x1bh\x03\xff\x10\x03\x00+\x00\xff\xff\xff{h\xffm "\xff@;i\xff`{h\xff\xff50\xff\xff\x05+6\xff{h\x1bh\x1ah{h\x1bh"\xff\x16\x02\x1a`{h\x1bhZi{h\x1bh"\xff\xff\x02Za{h\x1bl\x00+\x03\xff{h\xffl\x00+\x07\xff{h\x1bh\x1ah{h\x1bh"\xff\x08\x02\x1a`{h\xffm?"\xff@;i\xff`{h\x00"\xff\xff4 {h\x01"\xff\xff5 {h\x1bm\x00+}]\xff{h\x1bmxh\xffGx\xff{h\x1bh\x1bh\x03\xff\xff}\x03\x00+\x1c\xff{h\x1bh\x1bh\x03\xff\x00}\x03\x00+\x08\xff{h[l\x00+0\xff{h[lxh\xffG+\xff{h\xffk\x00+'\xff{h\xffkxh\xffG"\xff\x18\x00\x00 \xff\xffN\x1b{h\x1bh\x1bh\x03\xff\xffs\x00+\x0f\xff{h\x1bh\x1ah{h\x1bh"\xff\x10\x02\x1a`{h\x00"\xff\xff4 {h\x01"\xff\xff5 {h\xffk\x00+\x03\xff{h\xffkxh\xffG{h[m\x00+2\xff{h[m\x03\xff\x01\x03\x00+"\xff{h\x05"\xff\xff5 {h\x1bh\x1ah{h\x1bh"\xff\x01\x02\x1a`\xffh\x013\xff`zi\xffB\x07\xff{h\x1bh\x1bh\x03\xff\x01\x03\x00+\xff\xff#6c -[3.096] handleFlashPacket(): Flash write: Address= 0x80001f8, Length=3000 -[3.096] write(): <13> Tx: $OK#9a -[3.097] read(): <13> Rx: $vFlashWrite:8000db0:\x00\xff\x00\xff{h\x00"\xff\xff4 {h\x01"\xff\xff5 {h\xffl\x00+\x05\xff{h\xfflxh\xffG\x00\xff\x00\xff\x187\xffF\xff\xff\x00\xff\xff\xff\xff\xff\x00\xff\xff`\xff`z`;`\xffh\x1bh\x1ah\xffh\x1bh"\xff\xff"\x1a`\xffh\x1bh:hZ`\xffh\xffh@+\x08\xff\xffh\x1bhzh\xff`\xffh\x1bh\xffh\xff`\x07\xff\xffh\x1bh\xffh\xff`\xffh\x1bhzh\xff`\x00\xff\x147\xffF]\xff\x04{pG\xff\xff\xff\xff\x00\xffx`{h\x1bh\xff\xff\x10;\x13J\xff\xff\x03}\x03\x1b\x09\xff`\x12J\xffh\x13D\x1bx\x1aF{h\xffe\xffh\x03+\x08\xff{h\x1bh\x1aF\x0cK\x13@\x1a\x1d{h\xffe\x06\xff{h\x1bh\x1aF\x08K\x13@zh\xffe{h\xffm\x18F\x147\xffF]\xff\x04{pG\x00\xff\xff\xff\xff\xffp\xff\x00\x08\x00\xff\xff\xff\xff\xff\xff\xff\x00\xffx`\x00}\x03\xffs{h\xffj\xff`{h\xffi\x00+\x1f\xff\xffh\x03+U\xff\x01\xffR\xff}\x03\xff\x00\xff\xff\x0e\x00\x08\xff\x0e\x00\x08\xff\x0e\x00\x08u\x0f\x00\x08{h\xffj\x03\xff\xffs\x00+E\xff\x01}\x03\xffsB\xff{h\xffj\xff\xff\xff\x7f?\xff\x01}\x03\xffs<\xff{h\xffi\xff\xff\x00_!\xff\xffh\x03+6\xff\x01\xffR\xff}\x03\xff)\x0f\x00\x08/\x0f\x00\x08)\x0f\x00\x08A\x0f\x00\x08\x01}\x03\xffs/\xff{h\xffj\x03\xff\xffs\x00+}\x04\xff\x01}\x03\xffs!\xff{h\xffj\xff\xff\xff\x7f\x1e\xff\x01}\x03\xffs\x1b\xff\xffh\x02+\x02\xff\x03+\x03\xff\x18\xff\x01}\x03\xffs\x15\xff{h\xffj\x03\xff\xffs\x00+\x0e\xff\x01}\x03\xffs\x0b\xff\x00\xff\x0a\xff\x00\xff\x08\xff\x00\xff\x06\xff\x00\xff\x04\xff\x00\xff\x02\xff\x00\xff\x00\xff\x00\xff\xff{\x18F\x147\xffF]\xff\x04{pG\xff\xff\xff\xff\x00\xffx`9`\x00}\x03\xffa\x00}\x03{a\x00}\x03;a\x00}\x03\xffa\x00}\x03\xffau\xff\x01"\xffi\x02\xff\x03\xff{a;h\x1bhzi\x13@;a:i{i\xffB@\xffd\xff;h[h\x02+\x03\xff;h[h\x12+}\x03\xff\xffi\xff\x08{h\x082S\xff"0\xffa\xffi\x03\xff\x07\x03\xff\x00\x0f"\x02\xff\x03\xff\xffC\xffi\x13@\xffa;h\x1ai\xffi\x03\xff\x07\x03\xff\x00\x02\xff\x03\xff\xffi\x13C\xffa\xffi\xff\x08{h\x082\xffiC\xff"\x10{h\x1bh\xffa\xffi[\x00\x03"\x02\xff\x03\xff\xffC\xffi\x13@\xffa;h[h\x03\xff\x03\x02\xffi[\x00\x02\xff\x03\xff\xffi\x13C\xffa{h\xffi\x1a`;h[h\x01+\x0b\xff;h[h\x02+\x07\xff;h[h\x11+\x03\xff;h[h\x12+0\xff{h\xffh\xffa\xffi[\x00\x03"\x02\xff\x03\xff\xffC\xffi\x13@\xffa;h\xffh\xffi[\x00\x02\xff\x03\xff\xffi\x13C\xffa{h\xffi\xff`{h[h\xffa\x01"\xffi\x02\xff\x03\xff\xffC\xffi\x13@\xffa;h[h\x1b\x09\x03\xff\x01\x02\xffi\x02\xff\x03\xff\xffi\x13C\xffa{h\xffiZ`{h\xffh\xffa\xffi[\x00\x03"\x02\xff\x03\xff\xffC\xffi\x13@\xffa;h\xffh\xffi[\x00\x02\xff\x03\xff\xffi\x13C\xffa{h\xffi\xff`;h[h\x03\xff\xffS\x00+\x00\xff\xff\xffeK[ldJC\xff\xffCSdbK[l\x03\xff\xffC\xff`\xffh`J\xffi\xff\x08\x023R\xff}\x030\xffa\xffi\x03\xff\x03\x03\xff\x00\x0f"\x02\xff\x03\xff\xffC\xffi\x13@\xffa{hWJ\xffB7\xff{hVJ\xffB1\xff{hUJ\xffB+\xff{hTJ\xffB%\xff{hSJ\xffB\x1f\xff{hRJ\xffB\x19\xff{hQJ\xffB\x13\xff{hPJ\xffB\x0d\xff{hOJ\xffB\x07\xff{hNJ\xffB\x01\xff\x09}\x03\x12\xff\x0a}\x03\x10\xff\x08}\x03\x0e\xff\x07}\x03\x0c\xff\x06}\x03\x0a\xff\x05}\x03\x08\xff\x04}\x03\x06\xff\x03}\x03\x04\xff\x02}\x03\x02\xff\x01}\x03\x00\xff\x00}\x03\xffi\x02\xff\x03\x02\xff\x00\xff@\xffi\x13C\xffa4I\xffi\xff\x08\x023\xffiA\xff}\x03 Tx: $OK#9a -[3.097] read(): <13> Rx: $vFlashWrite:8001940:\x0f\x02!I;h\x13C\x0b`\x1fK\x1bh\x03\xff\x0f\x03:h\xffB\x01\xff\x01}\x030\xff{h\x1bh\x03\xff\x04\x03\x00+\x08\xff\x18K\xffh}\x03\xff\xffR{h\xffh\x15I\x13C\xff`{h\x1bh\x03\xff\x08\x03\x00+\x09\xff\x11K\xffh}\x03\xff`B{h\x1bi\xff\x00\x0dI\x13C\xff`\x00\xff\x1d\xff\x01F\x0aK\xffh\x1b\x09\x03\xff\x0f\x03\x09J\xff\\!\xff\x03\xff\x08J\x13`\x00 \xff\xff\xff\xff\x00}\x03\x18F\x107\xffF\xff\xff\x00\xff\x00<\x02@\x008\x02@}\x04\xff\x00\x08\x18\x00\x00 \xff\xff\xff\xff\x00\xff\x00}\x03{`\x00}\x03\xff`\x00}\x03;`\x00}\x03\xff`PK\xffh\x03\xff\x0c\x03\x04+\x07\xff\x08+\x08\xff\x00+@\xff\xff\xffKK\xff`\xff\xffKK\xff`\xff\xffGK[h\x03\xff?\x03{`EK[h\x03\xff\xff\x03\x00+}\x03\xffBK[h\xff\x09O\xff\x00\x04@\xff\xff\x11O\xff\x00\x02\x03\xff\x01\x05\x04\xff\x02\x06=J\x02\xff\x06\xff\x00"\x02\xff\x05\xff\x0aD:I\xff\xff\x01\x01S\x18\x19F{hO\xff\x00\x04\x1aF}\x03F\xff\xff\xff\xff\x03F\x0cF\xff`I\xff0K[h\xff\x09O\xff\x00\x04@\xff\xff\x11O\xff\x00\x02\x03\xff\x01\x05\x04\xff\x02\x06)F2FO\xff\x00\x03O\xff\x00\x04T\x01D\xff\xffdK\x01\x19F"FI\x1bb\xff\x06\x02O\xff\x00\x03O\xff\x00\x04\xff\x01D\xff\xffd\xff\x01[\x1ad\xff\x02\x04O\xff\x00\x01O\xff\x00\x02\xff\x00B\xffSr\xff\x00\x0bF\x14F[\x19D\xff\x06\x04O\xff\x00\x01O\xff\x00\x02\xff\x02B\xff\xffR\xff\x02\x0bF\x14F\x18F!F{hO\xff\x00\x04\x1aF}\x03F\xff\xff\xff\xff\x03F\x0cF\xff`\x0bK[h\x1b\x0c\x03\xff\x03\x03\x013[\x00;`\xffh;h\xff\xff\xff\xff\xff`\x02\xff\x05K\xff`\x00\xff\xffh\x18F\x147\xffF\xff\xff\x00\xff\x008\x02@\x00}\x04\xff\x00@x}]\x01\xff\xff\x00\xff\x03K\x1bh\x18F\xffF]\xff\x04{pG\x00\xff\x18\x00\x00 \xff\xff\x00\xff\xff\xff\xff\xff\x01F\x05K\xffh\xff\x0a\x03\xff\x07\x03\x03J\xff\\!\xff\x03\xff\x18F\xff\xff\x008\x02@4\xff\x00\x08\xff\xff\x00\xff\xff\xff\xff\xff\x01F\x05K\xffh[\x0b\x03\xff\x07\x03\x03J\xff\\!\xff\x03\xff\x18F\xff\xff\x008\x02@4\xff\x00\x08\xff\xff\xff\xff\x00\xffx`\x00}\x03{a\x00}\x03;a\x00}\x03\xff`\x00}\x03\xffa\x00}\x03\xffa{h\x1bh\x03\xff\x01\x03\x00+\x12\xffiK\xffhhJ}\x03\xff\x00\x03\xff`fK\xffh{h[kdI\x13C\xff`{h[k\x00+\x01\xff\x01}\x03\xffa{h\x1bh\x03\xff\x00}\x03\x00+\x17\xff]K\xff\xff\xff0}\x03\xff@\x12{h\xffkYI\x13C\xff\xff\xff0{h\xffk\xff\xff\xff\x1f\x01\xff\x01}\x03\xffa{h\xffk\x00+\x01\xff\x01}\x03\xffa{h\x1bh\x03\xff\xff\x13\x00+\x17\xffNK\xff\xff\xff0}\x03\xff@\x02{h\x1blJI\x13C\xff\xff\xff0{h\x1bl\xff\xff\xff\x0f\x01\xff\x01}\x03\xffa{h\x1bl\x00+\x01\xff\x01}\x03\xffa{h\x1bh\x03\xff\xffs\x00+\x01\xff\x01}\x03\xffa{h\x1bh\x03\xff \x03\x00+\x00\xff\xff\xff:K\x1bl9JC\xff\xffS\x13d7K\x1bl\x03\xff\xffS\xff`\xffh5K\x1bh4JC\xff\xffs\x13`\xff\xff\xff\xffxa\x08\xff\xff\xff\xff\xff\x02F{i\xff\x1ad+\x01\xff\x03}\x03\xff\xff,K\x1bh\x03\xff\xffs\x00+\xff\xff(K\x1bo\x03\xff@s;a;i\x00+5\xff{h\x1bk\x03\xff@s:i\xffB.\xff K\x1bo}\x03\xff@s;a\x1eK\x1bo\x1dJC\xff\xff3\x13g\x1bK\x1bo\x1aJ}\x03\xff\xff3\x13g\x18J;i\x13g\x16K\x1bo\x03\xff\x01\x03\x01+\x14\xff\xff\xffb\xffxa\x0a\xff\xff\xff^\xff\x02F{i\xff\x1aA\xff\xff2\xffB\x01\xff\x03}\x03O\xff\x0cK\x1bo\x03\xff\x02\x03\x00+\xff\xff{h\x1bk\x03\xff@s\xff\xff@\x7f\x11\xff\x05K\xffh}\x03\xff\xff\x12{h\x19k\x04K\x0b@\x01I\x13C\xff`\x0b\xff\x008\x02@\x00p\x00@\xff\xff\xff\x0f\xffK\xffh\xffJ}\x03\xff\xff\x13\xff`\xffK\x1ao{h\x1bk\xff\xff\x0b\x03\xffI\x13C\x0bg{h\x1bh\x03\xff\x10\x03\x00+\x10\xff\xffK\xff\xff\xff0\xffJ}\x03\xff\xffs\xff\xff\xff0\xffK\xff\xff\xff {h\xffk\xffI\x13C\xff\xff\xff0{h\x1bh\x03\xff\xffC\x00+\x0a\xff\xffK\xff\xff\xff0}\x03\xff@2{h[n\xffI\x13C\xff\xff\xff0{h\x1bh\x03\xff\x00C\x00+\x0a\xff\xffK\xff\xff\xff0}\x03\xff@"{h\xffn\xffI\x13C\xff\xff\xff0{h\x1bh\x03\xff\xff3\x00+\x0a\xff\xffK\xff\xff\xff0}\x03\xff@\x12{h\xffn\xffI\x13C\xff\xff\xff0{h\x1bh\x03\xff\x003\x00+\x0a\xff\xffK\xff\xff\xff0}\x03\xff@\x02{h\x1bo\xffI\x13C\xff\xff\xff0{h\x1bh\x03\xff@\x03\x00+\x0a\xff{K\xff\xff\xff0}\x03\xff\x03\x02{h[lxI\x13C\xff\xff\xff0{h\x1bh\x03\xff\xff\x03\x00+\x0a\xffsK\xff\xff\xff0}\x03\xff\x0c\x02{h\xffloI\x13C\xff\xff\xff0{h\x1bh\x03\xff\xffs\x00+\x0a\xffjK\xff\xff\xff0}\x03\xff0\x02{h\xfflgI\x13C\xff\xff\xff0{h\x1bh\x03\xff\x00s\x00+\x0a\xffbK\xff\xff\xff0}\x03\xff\xff\x02{h\x1bm^I\x13C\xff\xff\xff0{h\x1bh\x03\xff\xffc\x00+\x0a\xffYK\xff\xff\xff0}\x03\xff@r{h[mVI\x13C\xff\xff\xff0{h\x1bh\x03\xff\x00c\x00+\x0a\xffQK\xff\xff\xff0}\x03\xff@b{h\xffmMI\x13C\xff\xff\xff0{h\x1bh\x03\xff\xffS\x00+\x0a\xffHK\xff\xff\xff0}\x03\xff@R{h\xffmEI\x13C\xff\xff\xff0{h\x1bh\x03\xff\x00S\x00+\x0a\xff@K\xff\xff\xff0}\x03\xff@B{h\x1bn Tx: $OK#9a -[3.098] read(): <13> Rx: $vFlashWrite:80024d0:{h\x1ah{h\x043\x19F\x10F\x00\xff\xff\xff{h\x01"\xff\xff= \x00}\x03\x18F\x087\xffF\xff\xff\x00\x00\xff\xff\xff\xff\x00\xffx`9`{h\x00+\x01\xff\x01}\x03{\xff{h\xff\xff=0\xff\xff\x00+\x06\xff{h\x00"\xff\xff< xh\x05\xffy\xff{h\x02"\xff\xff= {h\x1bh\xffh{h\x1ah4K\x0b@\xff`{h\x1ah{h\x043\x19F\x10F\x00\xff\xff\xff{h\x1bh\xffh{a{h\x1bh\xffi;a{h\x1bh\x1bj\xff`;h\x1bhzi\x13C{a:i'K\x13@;a;h\xffh;h\xffi\x1b\x02\x13C:i\x13C;a:i!K\x13@;a:i K\x13@;a;h\xffh;h\xffi\x1b\x02\x13C:i\x13C;a;h\x1bi\x1a\x01;h\x1bj\x1b\x03\x13C:i\x13C;a\xffh}\x03\xff"\x03\xff`\xffh}\x03\xff\xff\x03\xff`;hZh;h[i\x1b\x01\x13C\xffh\x13C\xff`{h\x1bhzi\xff`{h\x1bh:i\xffa{h\x1bh\xffh\x1ab{h\x01"\xff\xff= \x00}\x03\x18F\x187\xffF\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\x0f\x0f\xff\xff\xff\xff\xff\xff\x00\xffx`9`;h\x00+\x02\xff\x04+\x08\xff\x0f\xff{h\x1bh\x01"\x00!\x18F\x00\xff\xff\xff\x16\xff{h\x1bh\x01"\x04!\x18F\x00\xff\xff\xff\x0e\xff{h\x1bh\x01"\x00!\x18F\x00\xff\xff\xff{h\x1bh\x01"\x04!\x18F\x00\xff\xff\xff\x00\xff{h\x1bh\x1ah{h\x1bhB\xff\x01\x02\x1a`\x00}\x03\x18F\x087\xffF\xff\xff\xff\xff\xff\xff\x00\xffx`{h\x1bh\x1bi\x03\xff\x02\x03\x02+"\xff{h\x1bh\xffh\x03\xff\x02\x03\x02+\x1b\xff{h\x1bho\xff\x02\x02\x1aa{h\x01"\x1aw{h\x1bh\xffi\x03\xff\x03\x03\x00+\x03\xffxh\x00\xff\xff\xff\x05\xffxh\x00\xff\xff\xffxh\x00\xff\xff\xff{h\x00"\x1aw{h\x1bh\x1bi\x03\xff\x04\x03\x04+"\xff{h\x1bh\xffh\x03\xff\x04\x03\x04+\x1b\xff{h\x1bho\xff\x04\x02\x1aa{h\x02"\x1aw{h\x1bh\xffi\x03\xff@s\x00+\x03\xffxh\x00\xff\xff\xff\x05\xffxh\x00\xff\xff\xffxh\x00\xff\xff\xff{h\x00"\x1aw{h\x1bh\x1bi\x03\xff\x08\x03\x08+"\xff{h\x1bh\xffh\x03\xff\x08\x03\x08+\x1b\xff{h\x1bho\xff\x08\x02\x1aa{h\x04"\x1aw{h\x1bh\xffi\x03\xff\x03\x03\x00+\x03\xffxh\x00\xff\xff\xff\x05\xffxh\x00\xffu\xffxh\x00\xff\xff\xff{h\x00"\x1aw{h\x1bh\x1bi\x03\xff\x10\x03\x10+"\xff{h\x1bh\xffh\x03\xff\x10\x03\x10+\x1b\xff{h\x1bho\xff\x10\x02\x1aa{h\x08"\x1aw{h\x1bh\xffi\x03\xff@s\x00+\x03\xffxh\x00\xffY\xff\x05\xffxh\x00\xffK\xffxh\x00\xff\\\xff{h\x00"\x1aw{h\x1bh\x1bi\x03\xff\x01\x03\x01+\x0e\xff{h\x1bh\xffh\x03\xff\x01\x03\x01+\x07\xff{h\x1bho\xff\x01\x02\x1aaxh\x04\xff\x05\xff{h\x1bh\x1bi\x03\xff\xff\x03\xff+\x0e\xff{h\x1bh\xffh\x03\xff\xff\x03\xff+\x07\xff{h\x1bho\xff\xff\x02\x1aaxh\x00\xffe\xff{h\x1bh\x1bi\x03\xff\xffs\xff\xff\xff\x7f\x0e\xff{h\x1bh\xffh\x03\xff\xff\x03\xff+\x07\xff{h\x1bho\xff\xffr\x1aaxh\x00\xffX\xff{h\x1bh\x1bi\x03\xff@\x03@+\x0e\xff{h\x1bh\xffh\x03\xff@\x03@+\x07\xff{h\x1bho\xff@\x02\x1aaxh\x00\xff\x0a\xff{h\x1bh\x1bi\x03\xff \x03 +\x0e\xff{h\x1bh\xffh\x03\xff \x03 +\x07\xff{h\x1bho\xff \x02\x1aaxh\x00\xff\x18\xff\x00\xff\x087\xffF\xff\xff\xff\xff\xff\xff\x00\xff\xff`\xff`z`\xffh\xff\xff<0\x01+\x01\xff\x02}\x03\x05\xff\xffh\x01"\xff\xff< \xffh\x02"\xff\xff= {h\x14+\x00\xff\xff\xff\x01\xffR\xff}\x03\xffQ)\x00\x08\xff}\x0a\x00\x08\xff}\x0a\x00\x08\xff}\x0a\x00\x08\xff)\x00\x08\xff}\x0a\x00\x08\xff}\x0a\x00\x08\xff}\x0a\x00\x08\xff)\x00\x08\xff}\x0a\x00\x08\xff}\x0a\x00\x08\xff}\x0a\x00\x08\x13}\x0a\x00\x08\xff}\x0a\x00\x08\xff}\x0a\x00\x08\xff}\x0a\x00\x08U}\x0a\x00\x08\xff}\x0a\x00\x08\xff}\x0a\x00\x08\xff}\x0a\x00\x08\xff}\x0a\x00\x08\xffh\x1bh\xffh\x18F\x00\xffN\xff\xffh\x1bh\xffi\xffh\x1bhB\xff\x08\x02\xffa\xffh\x1bh\xffi\xffh\x1bh"\xff\x04\x02\xffa\xffh\x1bh\xffi\xffh\x1ai\xffh\x1bh\x0aC\xffa\xff\xff\xffh\x1bh\xffh\x18F\x00\xff\xff\xff\xffh\x1bh\xffi\xffh\x1bhB\xff\x00b\xffa\xffh\x1bh\xffi\xffh\x1bh"\xff\xffb\xffa\xffh\x1bh\xffi\xffh\x1bi\x1a\x02\xffh\x1bh\x0aC\xffa\xff\xff\xffh\x1bh\xffh\x18F\x00\xff\xff\xff\xffh\x1bh\xffi\xffh\x1bhB\xff\x08\x02\xffa\xffh\x1bh\xffi\xffh\x1bh"\xff\x04\x02\xffa\xffh\x1bh\xffi\xffh\x1ai\xffh\x1bh\x0aC\xffab\xff\xffh\x1bh\xffh\x18F\x00\xffM\xff\xffh\x1bh\xffi\xffh\x1bhB\xff\x00b\xffa\xffh\x1bh\xffi\xffh\x1bh"\xff\xffb\xffa\xffh\x1bh\xffi\xffh\x1bi\x1a\x02\xffh\x1bh\x0aC\xffaA\xff\xffh\x1bh\xffh\x18F\x00\xff\xff\xff\xffh\x1bhZm\xffh\x1bhB\xff\x08\x02Ze\xffh\x1bhZm\xffh\x1bh"\xff\x04\x02Ze\xffh\x1bhYm\xffh\x1ai\xffh\x1bh\x0aCZe!\xff\xffh\x1bh\xffh\x18F\x00\xff\xff\xff\xffh\x1bhZm\xffh\x1bhB\xff\x00bZe\xffh\x1bhZm\xffh\x1bh"\xff\xffbZe\xffh\x1bhYm\xffh\x1bi\x1a\x02\xffh\x1bh\x0aCZe\x00\xff\x00\xff\xffh\x01"\xff\xff= \xffh\x00"\xff\xff< \x00}\x03\x18F\x107\xffF\xff\xff\x00\xff\xff\xff\xff\xff\x00\xffx`9`{h\xff\xff<0\x01+\x01\xff\x02}\x03\xff\xff{h\x01"\xff\xff< {h\x02"\xff\xff= {h\x1bh\xffh\xff`\xffhOK\x13@\xff`\xffh}\x03\xff\x7fC\xff`{h\x1bh\xffh\xff`;h\x1bh@+g\xff@+\x0b\xff\x10+s\xff\x10+\x02\xff\x00+o\xffx\xff +l\xff0+j\xffs\xffp+\x0d\xffp+\x04\xffP+3\xff`+A\xffj\xff\xff\xff\xff_f\xff\xff\xff\x00_\x17\xffc\xff{h\x18h;h\xffh;hZh;h\xffh\x00\xff\x0a\xff{h\x1bh\xffh\xff`\xffhC\xffw\x03\xff`{h\x1bh\xffh\xff`L\xff{h\x18h;h\xffh;hZh;h\xffh\x00\xff\xff\xff{h\x1bh\xffh{h\x1bhB\xff\xffB\xff`9\xff{h\x18h;hYh;h\xffh\x1aF\x00\xffg\xff{h\x1bhP!\x18F\x00\xff\xff\xff)\xff{h\x18h;hYh;h\xffh\x1aF\x00\xff\xff\xff{h\x1bh`!\x18F\x00\xff\xff\xff\x19\xff{h\x18h;hYh;h\xffh\x1aF\x00\xffG\xff{h\x1bh@!\x18F\x00\xff\xff\xff\x09\xff{h\x1ah;h\x1bh\x19F\x10F\x00\xff\xff\xff\x00\xff\x00\xff{h\x01"\xff\xff= {h\x00"\xff\xff< \x00}\x03\x18F\x107\xffF\xff\xff\x00\xff\xff\xff\xff\xff\xff\xff\xff\xff\x00\xffx`\x00\xff\x0c7\xffF]\xff\x04{pG\xff\xff\xff\xff\x00\xffx`\x00\xff\x0c7\xffF]\xff\x04{pG\xff\xff\xff\xff\x00\xffx`\x00\xff\x0c7\xffF]\xff\x04{pG\xff\xff\xff\xff\x00\xffx`\x00\xff\x0c7\xffF]\xff\x04{pG\xff\xff\xff\xff\x00\xffx`9`{h\x1bh\xff`{h@J\xffB\x13\xff{h\xff\xff\xffO\x0f\xff{h=J\xffB\x0b\xff{h Tx: $OK#9a -[3.098] read(): <13> Rx: $vFlashWrite:8003070:[i\x1b\x01:i\x13C;a;h\xffi\x1b\x01:i\x13C;a{h:iZ`{h\xffh\xffa;hZh{h\xffc{hzi\x1ab\x00\xff\x1c7\xffF]\xff\x04{pG\xff\xff\xff\xff\x00\x00\x01@\x00\x04\x01@\xff\xff\xff\xff\x00\xffx`9`{h\x1bj}\x03\xff\xffR{h\x1ab{h\x1bj;a{h[h{a{h\xffi\xff`\xffh\x1eK\x13@\xff`\xffh}\x03\xff@s\xff`;h\x1bh\x1b\x02\xffh\x13C\xff`;i}\x03\xff\x00S;a;h\xffh\x1b\x03:i\x13C;a{h\x13J\xffB\x03\xff{h\x12J\xffB\x09\xff{i}\x03\xff\xffC{a;h[i\xff\x01zi\x13C{a{hziZ`{h\xffh\xffa;hZh{h\x1ad{h:i\x1ab\x00\xff\x1c7\xffF]\xff\x04{pG\x00\xff\xff\xff\xff\xff\x00\x00\x01@\x00\x04\x01@\xff\xff\xff\xff\x00\xffx`9`{h\x1bj}\x03\xff\xff2{h\x1ab{h\x1bj;a{h[h{a{h[m\xff`\xffh\x1bK\x13@\xff`;h\x1bh\xffh\x13C\xff`;i}\x03\xff\x003;a;h\xffh\x1b\x04:i\x13C;a{h\x12J\xffB\x03\xff{h\x11J\xffB\x09\xff{i}\x03\xff\xff3{a;h[i\x1b\x02zi\x13C{a{hziZ`{h\xffhZe;hZh{h\xffe{h:i\x1ab\x00\xff\x1c7\xffF]\xff\x04{pG\xff\xff\xff\xff\x00\x00\x01@\x00\x04\x01@\xff\xff\xff\xff\x00\xffx`9`{h\x1bj}\x03\xff\xff\x12{h\x1ab{h\x1bj;a{h[h{a{h[m\xff`\xffh\x1cK\x13@\xff`;h\x1bh\x1b\x02\xffh\x13C\xff`;i}\x03\xff\x00\x13;a;h\xffh\x1b\x05:i\x13C;a{h\x13J\xffB\x03\xff{h\x12J\xffB\x09\xff{i}\x03\xff\xff}\x03{a;h[i\xff\x02zi\x13C{a{hziZ`{h\xffhZe;hZh{h\xffe{h:i\x1ab\x00\xff\x1c7\xffF]\xff\x04{pG\x00\xff\xff\xff\xff\xff\x00\x00\x01@\x00\x04\x01@\xff\xff\xff\xff\x00\xff\xff`\xff`z`\xffh\x1bj{a\xffh\x1bj}\x03\xff\x01\x02\xffh\x1ab\xffh\xffi;a;i}\x03\xff\xff\x03;a{h\x1b\x01:i\x13C;a{i}\x03\xff\x0a\x03{azi\xffh\x13C{a\xffh:i\xffa\xffhzi\x1ab\x00\xff\x1c7\xffF]\xff\x04{pG\xff\xff\xff\xff\x00\xff\xff`\xff`z`\xffh\x1bj}\x03\xff\x10\x02\xffh\x1ab\xffh\xffi{a\xffh\x1bj;a{i}\x03\xffpC{a{h\x1b\x03zi\x13C{a;i}\x03\xff\xff\x03;a\xffh\x1b\x01:i\x13C;a\xffhzi\xffa\xffh:i\x1ab\x00\xff\x1c7\xffF]\xff\x04{pG\xff\xff\xff\xff\x00\xffx`9`{h\xffh\xff`\xffh}\x03\xffp\x03\xff`:h\xffh\x13CC\xff\x07\x03\xff`{h\xffh\xff`\x00\xff\x147\xffF]\xff\x04{pG\xff\xff\xff\xff\x00\xff\xff`\xff`z`;`\xffh\xffh{a{i}\x03\xff\x7fC{a;h\x1a\x02{h\x1aC\xffh\x13Czi\x13C{a\xffhzi\xff`\x00\xff\x1c7\xffF]\xff\x04{pG\xff\xff\xff\xff\x00\xff\xff`\xff`z`\xffh\x03\xff\x1f\x03\x01"\x02\xff\x03\xff{a\xffh\x1aj{i\xffC\x1a@\xffh\x1ab\xffh\x1aj\xffh\x03\xff\x1f\x03yh\x01\xff\x03\xff\x1aC\xffh\x1ab\x00\xff\x1c7\xffF]\xff\x04{pG\x00\x00\xff\xff\xff\xff\x00\xffx`9`{h\xff\xff<0\x01+\x01\xff\x02}\x03E\xff{h\x01"\xff\xff< {h\x02"\xff\xff= {h\x1bh[h\xff`{h\x1bh\xffh\xff`{h\x1bh\x1cJ\xffB\x04\xff{h\x1bh\x1bJ\xffB\x08\xff\xffh}\x03\xffp\x03\xff`;h[h\xffh\x13C\xff`\xffh}\x03\xffp\x03\xff`;h\x1bh\xffh\x13C\xff`\xffh}\x03\xff\xff\x03\xff`;h\xffh\xffh\x13C\xff`{h\x1bh\xffhZ`{h\x1bh\xffh\xff`{h\x01"\xff\xff= {h\x00"\xff\xff< \x00}\x03\x18F\x147\xffF]\xff\x04{pG\x00\x00\x01@\x00\x04\x01@\xff\xff\xff\xff\x00\xffx`\x00\xff\x0c7\xffF]\xff\x04{pG\xff\xff\xff\xff\x00\xffx`\x00\xff\x0c7\xffF]\xff\x04{pG\xff\xff\xff\xff\x00\xffx`\x00\xff\x0c7\xffF]\xff\x04{pG\xff\xff\xff\xff\x00\xffx`{h\x00+\x01\xff\x01}\x03@\xff{h[o\x00+\x06\xff{h\x00"\xff\xffp xh\x04\xffp\xff{h}\x04"Zg{h\x1bh\x1ah{h\x1bh"\xff\x01\x02\x1a`xh\x00\xff\x02\xff\x03F\x01+\x01\xff\x01}\x03"\xff{h[j\x00+\x02\xffxh\x00\xff\xff\xff{h\x1bhZh{h\x1bh"\xff\xffBZ`{h\x1bh\xffh{h\x1bh"\xff}\x0a\x02\xff`{h\x1bh\x1ah{h\x1bhB\xff\x01\x02\x1a`xh\x00\xff!\xff\x03F\x18F\x087\xffF\xff\xff\xff\xff\xff\xff\x02\xff\xff`\xff`;`\x13F\xff\xff\xffh[o +\x7f\xff\xffh\x00+\x02\xff\xff\xff\x00+\x01\xff\x01}\x03x\xff\xffh\xff\xffp0\x01+\x01\xff\x02}\x03q\xff\xffh\x01"\xff\xffp \xffh\x00"\xffg\xffh!"Zg\xff\xff\xff\xffxa\xffh\xff\xff\xff\xffP \xffh\xff\xff\xff\xffR \xffh\xffh\xff\xff\xff_\x08\xff\xffh\x1bi\x00+\x04\xff\x00}\x03\xffa\xffh\xffa\x03\xff\xffh\xffa\x00}\x03\xffa,\xff;h\x00\xff{i\x00"\xff!\xffh\x00\xff\x00\xff\x03F\x00+\x01\xff\x03}\x03<\xff\xffi\x00+\x0b\xff\xffi\x1b\xff\x1aF\xffh\x1bh\xff\xff\x08\x02\xffb\xffi\x023\xffa\x07\xff\xffi\x1ax\xffh\x1bh\xffb\xffi\x013\xffa\xffh\xff\xffR0\xff\xff\x01;\xff\xff\xffh\xff\xffR \xffh\xff\xffR0\xff\xff\x00+\xff\xff;h\x00\xff{i\x00"@!\xffh\x00\xff\xff\xff\x03F\x00+\x01\xff\x03}\x03\x09\xff\xffh "Zg\xffh\x00"\xff\xffp \x00}\x03\x00\xff\x02}\x03\x18F 7\xffF\xff\xff\x00\x00\xff\xff\xff\xff\x00\xff\xff`\xff`\x13F\xff\xff\xffh[o +d\xff\xffh\x00+\x02\xff\xff\xff\x00+\x01\xff\x01}\x03]\xff\xffh\xff\xffp0\x01+\x01\xff\x02}\x03V\xff\xffh\x01"\xff\xffp \xffh\xffh\xffd\xffh\xff\xff\xff\xffP \xffh\xff\xff\xff\xffR \xffh\x00"\xffg\xffh!"Zg\xffh\xffn\x00+}\x0a\xff\xffh\xffn J\xffc\xffh\xffn\x1fJ\x1ad\xffh\xffn\x1eJ\xffd\xffh\xffn\x00"\x1ae\xffh\xffn\xffh\xffl\x19F\xffh\x1bh(3\x1aF\xff\xff\xff\xff!\xff\x03F\x00+\x0b\xff\xffh\x10"\xffg\xffh\x00"\xff\xffp \xffh "Zg\x01}\x03\x12\xff\xffh\x1bh@"\x1ab\xffh\x00"\xff\xffp \xffh\x1bh\xffh\xffh\x1bhB\xff\xff\x02\xff`\x00}\x03\x00\xff\x02}\x03\x18F\x107\xffF\xff\xff\x00\xffUC\x00\x08\xffC\x00\x08AD\x00\x08\xff\xff\xff\xff\x00\xff\xff`\xff`\x13F\xff\xff\xffh\xffo +l\xff\xffh\x00+\x02\xff\xff\xff\x00+\x01\xff\x01}\x03e\xff\xffh\xff\xffp0\x01+\x01\xff\x02}\x03^\xff\xffh\x01"\xff\xffp \xffh\xffhZe\xffh\xff\xff\xff\xffX \xffh\x00"\xffg\xffh""\xffg\xffh\xffn\x00+}\x0a\xff\xffh\xffn&J\xffc\xffh\xffn%J\x1ad\xffh\xffn}\x04J\xffd\xffh\xffn\x00"\x1ae\xffh\xffn\xffh\x1bh}\x043\x19F\xffh[m\x1aF\xff\xff\xff\xff\xff\xff\x03F\x00+\x0b\xff\xffh\x10"\xffg\xffh\x00"\xff\xffp \xffh "Zg\x01}\x03\x1e\xff\xffh\x00"\xff\xffp \xffh\x1bh\x1ah\xffh\x1bhB\xff\xffr\x1a`\xffh\x1bh\xffh\xffh\x1bhB\xff\x01\x02\xff`\xffh\x1bh\xffh\xffh\x1bhB\xff@\x02\xff`\x00}\x03\x00\xff\x02}\x03\x18F\x107\xffF\xff\xff\x00\xff\xffC\x00\x08%D\x00\x08AD\x00\x08\xff\xff\xff\xff\x00\xffx`{h\x1bh\xffi\xffa{h\x1bh\x1bh\xffa{h\x1bh\xffh{a\xffi\x03\xff\x0f\x03;a;i\x00+\x13\xff\xffi\x03\xff \x03\x00+\x0e\xff\xffi\x03\xff \x03\x00+\x09\xff{h\x1bn\x00+\x00\xff\xff\xff{h\x1bnxh\xffG\xff\xff;i\x00+\x00\xff\xff\xff{i\x03\xff\x01\x03\x00+\x05\xff\xffi\x03\xff\xffs\x00+\x00\xff\xff\xff\xffi\x03\xff\x01\x03\x00+\x0e\xff\xffi\x03\xff\xffs\x00+\x09\xff{h\x1bh\x01"\x1ab{h\xffoC\xff\x01\x02{h\xffg\xffi\x03\xff\x02\x03\x00+\x0e\xff{i\x03\xff\x01\x03\x00+\x09\xff{h\x1bh\x02"\x1ab{h\xffoC\xff\x04\x02{h\xffg\xffi\x03\xff\x04\x03\x00+\x0e\xff{i\x03\xff\x01\x03\x00+\x09\xff{h\x1bh\x04"\x1ab{h\xffoC\xff\x02\x02{h\xffg\xffi\x03\xff\x08\x03\x00+\x13\xff\xffi\x03\xff \x03\x00+\x04\xff{i\x03\xff\x01\x03\x00+\x09\xff{h\x1bh\x08"\x1ab{h\xffoC\xff\x08\x02{h\xffg{h\xffo\x00+\x7f\xff\xffi\x03\xff \x03\x00+\x0c\xff\xffi\x03\xff \x03\x00+\x07\xff{h\x1bn\x00+\x03\xff{h\x1bnxh\xffG{h\xffo\xff`{h\x1bh\xffh\x03\xff@\x03@+\x04\xff\xffh\x03\xff\x08\x03\x00+1\xffxh\x00\xff_\xff{h\x1bh\xffh\x03\xff@\x03@+}\x03\xff{h\x1bh\xffh{h\x1bh"\xff@\x02\xff`{h\xffn\x00+\x13\xff{h\xffn&J\x1ae{h\xffn\x18F\xff\xff\xff\xff\x03F\x00+\x16\xff{h\xffn\x1bmzh\xffn\x10F\xffG\x0e\xffxh\x00\xffY\xff\x0a\xffxh\x00\xffU\xff\x06\xffxh\x00\xffQ\xff{h\x00"\xffg%\xff\x00\xff}\x03\xff\xffi\x03\xff\xff\x03\x00+\x0d\xff\xffi\x03\xff\xff\x03\x00+\x08\xff{h[n\x00+\x17\xff{h[nxh\xffG\x12\xff\xffi\x03\xff@\x03\x00+\x0e\xff\xffi\x03\xff@\x03\x00+\x09\xffxh\x00\xff\xff\xff\x00\xff\x04\xff\x00\xff\x02\xff\x00\xff\x00\xff\x00\xff 7\xffF\xff\xff\x00\xff\xffD\x00\x08\xff\xff\xff\xff\x00\xffx`\x00\xff\x0c7\xffF]\xff\x04{pG\xff\xff\xff\xff\x00\xffx`\x00\xff\x0c7\xffF]\xff\x04{pG\xff\xff\xff\xff\x00\xffx`\x00\xff\x0c7\xffF]\xff\x04{pG\xff\xff\xff\xff\x00\xffx`\x00\xff\x0c7\xffF]\xff\x04{pG\xff\xff\xff\xff\x00\xffx`\x00}\x03\xffa\x00}\x03\xffu{h\xffh{h\x1bi\x1aC{h[i\x1aC{h\xffi\x13C;a{h\x1bh\x1ah\xffK\x13@zh\x12h9i\x0bC\x13`{h\x1bh[h}\x03\xff@Q{h\xffh{h\x1bh\x0aCZ`{h\xffi;a{h\x1bj:i\x13C;a{h\x1bh\xffh}\x03\xff0a{h\x1bh:i\x0aC\xff`{h\x1bh\xffJ\xffB!\xff\xffK\xff\xff\xff0\x03\xff\x03\x03\x03+\x16\xff\x01\xffR\xff}\x03\xff\x15<\x00\x08!<\x00\x08\x1b<\x00\x08#ae -[3.098] handleFlashPacket(): Flash write: Address= 0x8003070, Length=2976 -[3.098] write(): <13> Tx: $OK#9a -[3.099] read(): <13> Rx: $vFlashWrite:8003c10:'<\x00\x08\x01}\x03\xffwQ\xff\x02}\x03\xffwN\xff\x04}\x03\xffwK\xff\x08}\x03\xffwH\xff\x10}\x03\xffw\x00\xffD\xff{h\x1bh\xffJ\xffB4\xff\xffK\xff\xff\xff0\x03\xff\x0c\x03\x0c+)\xff\x01\xffR\xff}\x03\xff\x00\xff\xff<\x00\x08\xff<\x00\x08\xff<\x00\x08\xff<\x00\x08\xff<\x00\x08\xff<\x00\x08\xff<\x00\x08\xff<\x00\x08\xff<\x00\x08\xff<\x00\x08\xff<\x00\x08\xff<\x00\x08\xff<\x00\x08\x00}\x03\xffw\x17\xff\x02}\x03\xffw\x14\xff\x04}\x03\xffw\x11\xff\x08}\x03\xffw\x0e\xff\x10}\x03\xffw\x00\xff\x0a\xff{h\x1bhqJ\xffB \xffnK\xff\xff\xff0\x03\xff0\x03\x10+\x0f\xff\x10+\x02\xff\x00+\x05\xff\x10\xff +\x05\xff0+\x09\xff\x0b\xff\x00}\x03\xffw\xff\xff\x02}\x03\xffw\xff\xff\x04}\x03\xffw\xff\xff\x08}\x03\xffw\xff\xff\x10}\x03\xffw\x00\xff\xff\xff{h\x1bh_J\xffB \xff[K\xff\xff\xff0\x03\xff\xff\x03@+\x0f\xff@+\x02\xff\x00+\x05\xff\x10\xff\xff+\x05\xff\xff+\x09\xff\x0b\xff\x00}\x03\xffw\xff\xff\x02}\x03\xffw\xff\xff\x04}\x03\xffw\xff\xff\x08}\x03\xffw\xff\xff\x10}\x03\xffw\x00\xff\xff\xff{h\x1bhMJ\xffB}\x04\xffHK\xff\xff\xff0\x03\xff@s\xff\xff\xff\x7f\x12\xff\xff\xff\xff\x7f\x02\xff\x00+\x07\xff\x12\xff\xff\xff\x00\x7f\x06\xff\xff\xff@\x7f\x09\xff\x0b\xff\x00}\x03\xffw\xff\xff\x02}\x03\xffw\xff\xff\x04}\x03\xffw\xff\xff\x08}\x03\xffw\xff\xff\x10}\x03\xffw\x00\xff\xff\xff{h\x1bh9J\xffB}\x04\xff3K\xff\xff\xff0\x03\xff@c\xff\xff\xffo\x12\xff\xff\xff\xffo\x02\xff\x00+\x07\xff\x12\xff\xff\xff\x00o\x06\xff\xff\xff@o\x09\xff\x0b\xff\x01}\x03\xffww\xff\x02}\x03\xffwt\xff\x04}\x03\xffwq\xff\x08}\x03\xffwn\xff\x10}\x03\xffw\x00\xffj\xff{h\x1bh%J\xffB}\x04\xff\x1eK\xff\xff\xff0\x03\xff@S\xff\xff\xff_\x12\xff\xff\xff\xff_\x02\xff\x00+\x07\xff\x12\xff\xff\xff\x00_\x06\xff\xff\xff@_\x09\xff\x0b\xff\x00}\x03\xffwM\xff\x02}\x03\xffwJ\xff\x04}\x03\xffwG\xff\x08}\x03\xffwD\xff\x10}\x03\xffw\x00\xff@\xff{h\x1bh\x11J\xffB9\xff\x09K\xff\xff\xff0\x03\xff@C\xff\xff\xffO'\xff\xff\xff\xffO\x17\xff\x00+\x1c\xff'\xff\x00\xff\xffi\xff\xff\x00\x10\x01@\x008\x02@\x00D\x00@\x00H\x00@\x00L\x00@\x00P\x00@\x00\x14\x01@\x00x\x00@\x00|\x00@\xff\xff\x00O\x06\xff\xff\xff@O\x09\xff\x0b\xff\x00}\x03\xffw\x0e\xff\x02}\x03\xffw\x0b\xff\x04}\x03\xffw\x08\xff\x08}\x03\xffw\x05\xff\x10}\x03\xffw\x00\xff\x01\xff\x10}\x03\xffw{h\xffi\xff\xff\x00O|\xff\xff\x7f\x08+Y\xff\x01\xffR\xff}\x03\xff\xff>\x00\x08\x17?\x00\x085?\x00\x08\xff?\x00\x08M?\x00\x08\xff?\x00\x08\xff?\x00\x08\xff?\x00\x08k?\x00\x08\xff\xff,\xff\x03FZ\x00{h[h[\x08\x1aD{h[h\xff\xff\xff\xff\xff\xff\xffa8\xff\xff\xff1\xff\x03FZ\x00{h[h[\x08\x1aD{h[h\xff\xff\xff\xff\xff\xff\xffa)\xff{h[hZ\x08]K\x13DzhRh\xff\xff\xff\xff\xff\xff\xffa\x1d\xff\xff\xffD\xff\x03FZ\x00{h[h[\x08\x1aD{h[h\xff\xff\xff\xff\xff\xff\xffa\x0e\xff{h[h[\x08\x03\xff\xff2{h[h\xff\xff\xff\xff\xff\xff\xffa\x02\xff\x01}\x03\xffu\x00\xff\xffi\x0f+\x16\xff\xffi\xff\xff\xff?\x12\xff\xffi\xff\xff}\x03\xff\x0f\x03\xff\xff\xffi[\x08\xff\xff\x03\xff\x07\x03\xff\xff\xff\xff\x13C\xff\xff{h\x1bh\xff\xff\xff`n\xff\x01}\x03\xffuk\xff\xff\x7f\x08+W\xff\x01\xffR\xff}\x03\xff\x00\xff\xff?\x00\x08\x11@\x00\x08-@\x00\x08y@\x00\x08E@\x00\x08y@\x00\x08y@\x00\x08y@\x00\x08a@\x00\x08\xff\xff\xff\xff\x02F{h[h[\x08\x1aD{h[h\xff\xff\xff\xff\xff\xff\xffa6\xff\xff\xff\xff\xff\x02F{h[h[\x08\x1aD{h[h\xff\xff\xff\xff\xff\xff\xffa(\xff{h[hZ\x08 K\x13DzhRh\xff\xff\xff\xff\xff\xff\xffa\x1c\xff\xff\xff\xff\xff\x02F{h[h[\x08\x1aD{h[h\xff\xff\xff\xff\xff\xff\xffa\x0e\xff{h[h[\x08\x03\xff\x00B{h[h\xff\xff\xff\xff\xff\xff\xffa\x02\xff\x01}\x03\xffu\x00\xff\xffi\x0f+\x08\xff\xffi\xff\xff\xff?\x04\xff{h\x1bh\xffi\xff`\x01\xff\x01}\x03\xffu{h\x00"\x1af{h\x00"Zf\xff}]\x18F 7\xffF\xff\xff\x00H\xff\x01\x00}\x04\xff\x00\xff\xff\xff\xff\x00\xffx`{h[j\x03\xff\x01\x03\x00+\x0a\xff{h\x1bh[h}\x03\xff\x001{h\xffj{h\x1bh\x0aCZ`{h[j\x03\xff\x02\x03\x00+\x0a\xff{h\x1bh[h}\x03\xff\xff1{h\xffj{h\x1bh\x0aCZ`{h[j\x03\xff\x04\x03\x00+\x0a\xff{h\x1bh[h}\x03\xff\xff!{h\x1ak{h\x1bh\x0aCZ`{h[j\x03\xff\x08\x03\x00+\x0a\xff{h\x1bh[h}\x03\xff\x00A{hZk{h\x1bh\x0aCZ`{h[j\x03\xff\x10\x03\x00+\x0a\xff{h\x1bh\xffh}\x03\xff\xffQ{h\xffk{h\x1bh\x0aC\xff`{h[j\x03\xff \x03\x00+\x0a\xff{h\x1bh\xffh}\x03\xff\x00Q{h\xffk{h\x1bh\x0aC\xff`{h[j\x03\xff@\x03\x00+\x1a\xff{h\x1bh[h}\x03\xff\xff\x11{h\x1al{h\x1bh\x0aCZ`{h\x1bl\xff\xff\xff\x1f\x0a\xff{h\x1bh[h}\x03\xff\xff\x01{hZl{h\x1bh\x0aCZ`{h[j\x03\xff\xff\x03\x00+\x0a\xff{h\x1bh[h}\x03\xff\x00!{h\xffl{h\x1bh\x0aCZ`\x00\xff\x0c7\xffF]\xff\x04{pG\xff\xff\xff\xff\x02\xffx`{h\x00"\xffg\xff\xff\xff\xff\xff`{h\x1bh\x1bh\x03\xff\x08\x03\x08+\x0e\xffo\xff~C\x00\xff\xffh\x00"O\xff\x00\x11xh\x00\xff\x14\xff\x03F\x00+\x01\xff\x03}\x03\x0a\xff{h "Zg{h "\xffg{h\x00"\xff\xffp \x00}\x03\x18F\x107\xffF\xff\xff\xff\xff\xff\xff\x00\xff\xff`\xff`;`\x13F\xffq}\x0a\xff\xffi\xff\xff\xff?&\xff\xff\xff\xff\xff\x02F;h\xff\x1a\xffi\xffB\x02\xff\xffi\x00+\x1b\xff\xffh\x1bh\x1ah\xffh\x1bh"\xff\xffr\x1a`\xffh\x1bh\xffh\xffh\x1bh"\xff\x01\x02\xff`\xffh "Zg\xffh "\xffg\xffh\x00"\xff\xffp \x03}\x03\x0f\xff\xffh\x1bh\xffi\xffh\x13@\xffh\xffB\x0c\xff\x01}\x03\x00}\x03\xff\xff\x1aF\xffy\xffB\xff\xff\x00}\x03\x18F\x107\xffF\xff\xff\xff\xff\xff\xff\x00\xffx`{h\x1bh\x1ah{h\x1bh"\xff\xff\x02\x1a`{h "Zg\x00\xff\x0c7\xffF]\xff\x04{pG\xff\xff\xff\xff\x00\xffx`{h\x1bh\x1ah{h\x1bh"\xff\xffr\x1a`{h\x1bh\xffh{h\x1bh"\xff\x01\x02\xff`{h "\xffg{h\x00"\x1af\x00\xff\x0c7\xffF]\xff\x04{pG\xff\xff\xff\xff\x00\xffx`{h\xffk\xff`{h\xffi\xff\xff\xff\x7f\x14\xff\xffh\x00"\xff\xffR \xffh\x1bh\xffh\xffh\x1bh"\xff\xff\x02\xff`\xffh\x1bh\x1ah\xffh\x1bhB\xff@\x02\x1a`\x02\xff\xffh\x02\xffr\xff\x00\xff\x107\xffF\xff\xff\xff\xff\xff\xff\x00\xffx`{h\xffk\xff`\xffh\xff\xff\xff\xff\x00\xff\x107\xffF\xff\xff\xff\xff\xff\xff\x00\xffx`{h\xffk\xff`{h\xffi\xff\xff\xff\x7f\x1e\xff\xffh\x00"\xff\xffZ \xffh\x1bh\x1ah\xffh\x1bh"\xff\xffr\x1a`\xffh\x1bh\xffh\xffh\x1bh"\xff\x01\x02\xff`\xffh\x1bh\xffh\xffh\x1bh"\xff@\x02\xff`\xffh "\xffg\xffh\xff\xff\xff\xff\x00\xff\x107\xffF\xff\xff\xff\xff\xff\xff\x00\xffx`{h\xffk\xff`\xffh\xff\xff\xff\xff\x00\xff\x107\xffF\xff\xff\xff\xff\xff\xff\x00\xffx`{h\xffk{a{i[o;a{i\xffo\xff`{i\x1bh\xffh\x03\xff\xff\x03\xff+\x09\xff;i!+\x06\xff{i\x00"\xff\xffR xi\xff\xff7\xff{i\x1bh\xffh\x03\xff@\x03@+\x09\xff\xffh"+\x06\xff{i\x00"\xff\xffZ xi\xff\xff;\xff{i\xffoC\xff\x10\x02{i\xffgxi\xff\xffV\xff\x00\xff\x187\xffF\xff\xff\xff\xff\xff\xff\x00\xffx`{h\xffk\xff`\xffh\x00"\xff\xffZ \xffh\x00"\xff\xffR \xffh\xff\xff@\xff\x00\xff\x107\xffF\xff\xff\xff\xff\xff\xff\x00\xffx`{h\x1bh\x1ah{h\x1bh"\xff@\x02\x1a`{h "Zg{h\x00"Zfxh\x02\xff\xff\xff\x00\xff\x087\xffF\xff\xff\xff\xff\xff\xff\x00\xffx`{h\x1bh\x1bhZj{h\x1bh\xffh[\x08\xff\x1a\xff`\xffh\x18F\x147\xffF]\xff\x04{pG\xff\xff\xff\xff\x00\xffx`{h\x1bh\xffh{h\x1bh\x1bhR\x08Zb\x00\xff\x0c7\xffF]\xff\x04{pG\xff\xff\xff\xff\x00\xffx`9`{h\x08J\x1aa{h\x08JZa{h\x07J\xffa{h:h\x1a`{h\x18F\x0c7\xffF]\xff\x04{pG\x10!\x01\x00\xff\x0fI@\xff\xff@?\xff\xff\xff\xff\x00\xffx`{h\x1bh Tx: $OK#9a -[3.099] read(): <13> Rx: $vFlashWrite:80047b0:z`\x1bx[\x09\x03\xff\x07\x02\xffh\x1a`{hZ\x1cz`\x1bx\xff\x00\xffh\x1bh\x1aC\xffh\x1a`{hZ\x1cz`\x1bx\xff\x02\xffh\x1bh\x1aC\xffh\x1a`\xffh\x1ah{h\x1bx\xff\x04\x03\xff\xff\x03\x1aC\xffh\x1a`{hZ\x1cz`\x1bx\x1b\x09\x03\xff\x0f\x03\xff`{h\x1bx\x1b\x01\x03\xff\xffb\xffh\x13C\xff`\xffh\x00+\x08\xff\xffh\x1ah\xffh\xff\xff`s\xff\x05\x1aC\xffh\x1a`{hZ\x1cz`\x1bx\x1b\x06\x03\xff\x00B\xffh\x1bh\x1aC\xffh\x1a`\x08}\x03\x18F\x147\xffF]\xff\x04{pG\xff\xff\xff\xff\x00\xffx`{h\x00"\x1a`{h\x00"Z`{h\x18F\x0c7\xffF]\xff\x04{pG\x00\x00\xff\xff\xff\xff\x00\xffx`\x04J{h\x1a`{h\x18F\x0c7\xffF]\xff\x04{pG\x14\xff\x00\x08\xff\xff\xff\xff\x00\xffx`{h\x18F\xff\xff\xff\xff\x09J{h\x1a`{h\x00"Z`{h\x083\x18F\xff\xff\xff\xff{h\x04J\x1aa{h\x18F\x087\xffF\xff\xff\x00\xff\xff\xff\x00\x08(\xff\x00\x08\xff\xff\xff\xff\x00\xffx`9`\x00}\x03\xff`{hYh\xffh:h\x13D\xff\xff\x1ap{h[h\x19\x0a\xffh\x013:h\x13D\xff\xff\x1ap{h[h\x19\x0c\xffh\x023:h\x13D\xff\xff\x1ap{h[h\x19\x0e\xffh\x033:h\x13D\xff\xff\x1ap\xffh\x043\xff`{h\xffh\xffh:h\x13D\xff\xff\x1ap{h\xffh\x19\x0a\xffh\x013:h\x13D\xff\xff\x1ap{h\xffh\x19\x0c\xffh\x023:h\x13D\xff\xff\x1ap{h\xffh\x19\x0e\xffh\x033:h\x13D\xff\xff\x1ap\xffh\x043\xff`{h\xffh\xffh:h\x13D\xff\xff\x1ap{h\xffh\x19\x0a\xffh\x013:h\x13D\xff\xff\x1ap{h\xffh\x19\x0c\xffh\x023:h\x13D\xff\xff\x1ap{h\xffh\x19\x0e\xffh\x033:h\x13D\xff\xff\x1ap\xffh\x043\xff`{h\x1bi\x18F\xff\xff3\xff\xff`\xffh:h\x13D\xffh\x18F\x02\xff`\xff\xffh\x043\xff`\xffh:h\xff\x18{h\x1bi\xffh\x19F\x03\xffC\xff\xffh\xffh\x13D\xff`\xffh\x18F\x107\xffF\xff\xff\xff\xff\xff\xff\x00\xffx`9`\x00}\x03;a;i:h\x13D\x1bx\x1aF{hZ`{hZh;i\x0139h\x0bD\x1bx\x1b\x02\x1aC{hZ`{hZh;i\x0239h\x0bD\x1bx\x1b\x04\x1aC{hZ`{hZh;i\x0339h\x0bD\x1bx\x1b\x06\x1aC{hZ`;i\x043;a;i:h\x13D\x1bx\x1aF{h\xff`{h\xffh;i\x0139h\x0bD\x1bx\x1b\x02\x1aC{h\xff`{h\xffh;i\x0239h\x0bD\x1bx\x1b\x04\x1aC{h\xff`{h\xffh;i\x0339h\x0bD\x1bx\x1b\x06\x1aC{h\xff`;i\x043;a;i:h\x13D\x1bx\x1aF{h\xff`{h\xffh;i\x0139h\x0bD\x1bx\x1b\x02\x1aC{h\xff`{h\xffh;i\x0239h\x0bD\x1bx\x1b\x04\x1aC{h\xff`{h\xffh;i\x0339h\x0bD\x1bx\x1b\x06\x1aC{h\xff`;i\x043;a;i:h\x1aD\x07\xff\x0c\x03\x11F\x18F\x02\xff\xff\xff;i\x043;a;i{a:i\xffh\x13Dzi\xffB\x0c\xff:h{i\x1aD{i\x01;9h\x0bD\x12x\x1ap{i\x013{a\xff\xff:i\xffh\x13D\x01;:h\x13D\x00"\x1ap;i\x01;:h\x1aD{h\x1aa:i\xffh\x13D;a;i\x18F\x187\xffF\xff\xff\xff\xff\xff\xff\x00\xffx`\x03K\x18F\x0c7\xffF]\xff\x04{pG\x00\xff,\xff\x00\x08\xff\xff\xff\xff\x00\xffx`\x03K\x18F\x0c7\xffF]\xff\x04{pG\x00\xff<\xff\x00\x08\xff\xff\xff\xff\x00\xffx`{h\x18F\xff\xffT\xff\x09J{h\x1a`{hO\xff\x00\x02Z`{hO\xff\x00\x02\xff`{hO\xff\x00\x02\xff`{h\x18F\x087\xffF\xff\xff\xff\xff\x00\x08\xff\xff\xff\xff\x00\xffx`9`\x00}\x03\xff`\xffh:h\x1aD{h\xff\xff\x01z\xff\xffg\x0a\x10F\xff\xffN\xff\x02F\xffh\x13D\xff`\xffh:h\x1aD{h\xff\xff\x02z\xff\xffg\x0a\x10F\xff\xff?\xff\x02F\xffh\x13D\xff`\xffh:h\x1aD{h\xff\xff\x03z\xff\xffg\x0a\x10F\xff\xff0\xff\x02F\xffh\x13D\xff`\xffh\x18F\x107\xffF\xff\xff\xff\xff\xff\xff\x00\xffx`9`\x00}\x03\xff`\xffh:h\x1aD{h\x043\x19F\x10F\xff\xff\xff\xff\x02F\xffh\x13D\xff`\xffh:h\x1aD{h\x083\x19F\x10F\xff\xffv\xff\x02F\xffh\x13D\xff`\xffh:h\x1aD{h\x0c3\x19F\x10F\xff\xffi\xff\x02F\xffh\x13D\xff`\xffh\x18F\x107\xffF\xff\xff\xff\xff\xff\xff\x00\xffx`\x03K\x18F\x0c7\xffF]\xff\x04{pG\x00\xff`\xff\x00\x08\xff\xff\xff\xff\x00\xffx`\x03K\x18F\x0c7\xffF]\xff\x04{pG\x00\xfft\xff\x00\x08\xff\xff\xff\xff\x00\xffx`{h\x18F\xff\xff\xff\xff\x0bJ{h\x1a`{hO\xff\x00\x02Z`{hO\xff\x00\x02\xff`{hO\xff\x00\x02\xff`{hO\xff\x00\x02\x1aa{h\x18F\x087\xffF\xff\xff\xff\xff\x00\x08\xff\xff\xff\xff\x00\xffx`9`\x00}\x03\xff`\xffh:h\x1aD{h\xff\xff\x01z\xff\xffg\x0a\x10F\xff\xff\xff\xff\x02F\xffh\x13D\xff`\xffh:h\x1aD{h\xff\xff\x02z\xff\xffg\x0a\x10F\xff\xff\xff\xff\x02F\xffh\x13D\xff`\xffh:h\x1aD{h\xff\xff\x03z\xff\xffg\x0a\x10F\xff\xff\xff\xff\x02F\xffh\x13D\xff`\xffh:h\x1aD{h\xff\xff\x04z\xff\xffg\x0a\x10F\xff\xffw\xff\x02F\xffh\x13D\xff`\xffh\x18F\x107\xffF\xff\xff\xff\xff\xff\xff\x00\xffx`9`\x00}\x03\xff`\xffh:h\x1aD{h\x043\x19F\x10F\xff\xff\xff\xff\x02F\xffh\x13D\xff`\xffh:h\x1aD{h\x083\x19F\x10F\xff\xff\xff\xff\x02F\xffh\x13D\xff`\xffh:h\x1aD{h\x0c3\x19F\x10F\xff\xff\xff\xff\x02F\xffh\x13D\xff`\xffh:h\x1aD{h\x103\x19F\x10F\xff\xff\xff\xff\x02F\xffh\x13D\xff`\xffh\x18F\x107\xffF\xff\xff\xff\xff\xff\xff\x00\xffx`\x03K\x18F\x0c7\xffF]\xff\x04{pG\x00\xff\xff\xff\x00\x08\xff\xff\xff\xff\x00\xffx`\x03K\x18F\x0c7\xffF]\xff\x04{pG\x00\xff\xff\xff\x00\x08\xff\xff\xff\xff\x00\xffx`{h\x18F\xff\xff\xff\xff\x08J{h\x1a`{h\x043\x18F\xff\xff\xff\xff{h\x143\x18F\xff\xff%\xff{h\x18F\x087\xffF\xff\xff\xff\xff\x00\x08\xff\xff\xff\xff\x00\xffx`9`\x00}\x03\xff`{h\x18\x1d\xffh:h\x13D\x19F\xff\xff\xff\xff\x02F\xffh\x13D\xff`{h\x03\xff\x14\x00\xffh:h\x13D\x19F\xff\xff}\x04\xff\x02F\xffh\x13D\xff`\xffh\x18F\x107\xffF\xff\xff\xff\xff\xff\xff\x00\xffx`9`\x00}\x03\xff`{h\x18\x1d\xffh:h\x13D\x19F\xff\xff\xff\xff\x02F\xffh\x13D\xff`{h\x03\xff\x14\x00\xffh:h\x13D\x19F\xff\xffG\xff\x02F\xffh\x13D\xff`\xffh\x18F\x107\xffF\xff\xff\xff\xff\xff\xff\x00\xffx`\x03K\x18F\x0c7\xffF]\xff\x04{pG\x00\xff\xff\xff\x00\x08\xff\xff\xff\xff\x00\xffx`\x03K\x18F\x0c7\xffF]\xff\x04{pG\x00\xff\xff\xff\x00\x08\xff\xff\xff\xff\x00\xffx`{h\x18F\xff\xfff\xff\x0cJ{h\x1a`{h\x043\x18F\xff\xffn\xff{h\x03\xff,\x02}\x03}\x03\x00+\x05\xffO\xff\x00\x01\x11`\x042\x01;\xff\xff{h\x18F\x087\xffF\xff\xff\x00\xff\xff\xff\x00\x08\xff\xff\xff\xff\x00\xffx`9`\x00}\x03\xff`{h\x18\x1d\xffh:h\x13D\x19F\xff\xffg\xff\x02F\xffh\x13D\xff`\x00}\x03\xff`\xffh}\x03+\x17\xff\xffh:h\xff\x18zh\xffh\x0a3\xff\x00\x13D\x043\xff\xff\x00z\xff\xffg\x0a\x08F\xff\xffD\xff\x02F\xffh\x13D\xff`\xffh\x013\xff`\xff\xff\xffh\x18F\x107\xffF\xff\xff\xff\xff\xff\xff\x00\xffx`9`\x00}\x03\xff`{h\x18\x1d\xffh:h\x13D\x19F\xff\xffW\xff\x02F\xffh\x13D\xff`\x00}\x03\xff`\xffh}\x03+\x13\xff\xffh:h\xff\x18\xffh\x0a3\xff\x00zh\x13D\x043\x19F\xff\xff\x7f\xff\x02F\xffh\x13D\xff`\xffh\x013\xff`\xff\xff\xffh\x18F\x107\xffF\xff\xff\xff\xff\xff\xff\x00\xffx`\x03K\x18F\x0c7\xffF]\xff\x04{pG\x00\xff\x10\xff\x00\x08\xff\xff\xff\xff\x00\xffx`\x03K\x18F\x0c7\xffF]\xff\x04{pG\x00\xff4\xff\x00\x08\xff\xff\xff\xff\x00\xffx`{h\x18F\xff\xff\xff\xff\x09J{h\x1a`{hO\xff\x00\x02Z`{hO\xff\x00\x02\xff`{hO\xff\x00\x02\xff`{h\x18F\x087\xffF\xff\xff\xff\xff\x00\x08\xff\xff\xff\xff\x00\xffx`9`\x00}\x03\xff`\xffh:h\x1aD{h\xff\xff\x01z\xff\xffg\x0a\x10F\xff\xff\xff\xff\x02F\xffh\x13D\xff`\xffh:h\x1aD{h\xff\xff\x02z\xff\xffg\x0a\x10F\xff\xff\xff\xff\x02F\xffh\x13D\xff`\xffh:h\x1aD{h\xff\xff\x03z\xff\xffg\x0a\x10F\xff\xff\xff\xff\x02F\xffh\x13D\xff`\xffh\x18F\x107\xffF\xff\xff\xff\xff\xff\xff\x00\xffx`9`\x00}\x03\xff`\xffh:h\x1aD{h\x043\x19F\x10F\xff\xff\xff\xff\x02F\xffh\x13D\xff`\xffh:h\x1aD{h\x083\x19F\x10F\xff\xff\xff\xff\x02F\xffh\x13D\xff`\xffh:h\x1aD{h\x0c3\x19F\x10F\xff\xff\xff\xff\x02F\xffh\x13D\xff`\xffh\x18F\x107\xffF\xff\xff\xff\xff\xff\xff\x00\xffx`\x03K\x18F\x0c7\xffF]\xff\x04{pG\x00\xffX\xff\x00\x08\xff\xff\xff\xff\x00\xffx`\x03K\x18F\x0c7\xffF]\xff\x04{pG\x00\xfft\xff\x00\x08\xff\xff\xff\xff\x00\xffx`{h\x18F\xff\xff\x1a\xff\x08J{h\x1a`{h\x043\x18F\xff\xffJ\xff{h\x143\x18F\xff\xffE\xff{h\x18F\x087\xffF\xff\xffl\xff\x00\x08\xff\xff\xff\xff\x00\xffx`9`\x00}\x03\xff`{h\x18\x1d\xffh:h\x13D\x19F\xff\xffM\xff\x02F\xffh\x13D\xff`{h\x03\xff\x14\x00\xffh:h\x13D\x19F\xff\xff@\xff\x02F\xffh\x13D\xff`\xffh\x18F\x107\xffF\xff\xff\xff\xff\xff\xff\x00\xffx`9`\x00}\x03\xff`{h\x18\x1d\xffh:h\x13D\x19F\xff\xffa\xff\x02F\xffh\x13D\xff`{h\x03\xff\x14\x00\xffh:h\x13D\x19F\xff\xffT\xff\x02F\xffh\x13D\xff`\xffh\x18F\x107\xffF\xff\xff\xff\xff\xff\xff\x00\xffx`\x03K\x18F\x0c7\xffF]\xff\x04{pG\x00\xffp\xff\x00\x08\xff\xff\xff\xff\x00\xffx`\x03K\x18F\x0c7\xffF]\xff\x04{pG\x00\xff\xff\xff\x00\x08\xff\xff\xff\xff\x00\xffx`{h\x18F\xff\xff\xff\xff\x0cJ{h\x1a`{h\x043\x18F\xff\xffn\xff{h\x03\xff(\x02}\x03}\x03\x00+\x05\xffO\xff\x00\x01\x11`\x042\x01;\xff\xff{h\x18F\x087\xffF\xff\xff\x00\xff#4b -[3.099] handleFlashPacket(): Flash write: Address= 0x80047b0, Length=3024 -[3.099] write(): <13> Tx: $OK#9a -[3.099] read(): <13> Rx: $vFlashWrite:8005380:T\xff\x00\x08\xff\xff\xff\xff\x00\xffx`9`\x00}\x03\xff`{h\x18\x1d\xffh:h\x13D\x19F\xff\xffg\xff\x02F\xffh\x13D\xff`\x00}\x03\xff`\xffh}\x03+\x16\xff\xffh:h\xff\x18zh\xffh\x0a3\xff\x00\x13D\xff\xff\x00z\xff\xffg\x0a\x08F\xff\xffw\xff\x02F\xffh\x13D\xff`\xffh\x013\xff`\xff\xff\xffh\x18F\x107\xffF\xff\xff\xff\xff\xff\xff\x00\xffx`9`\x00}\x03\xff`{h\x18\x1d\xffh:h\x13D\x19F\xff\xffX\xff\x02F\xffh\x13D\xff`\x00}\x03\xff`\xffh}\x03+\x12\xff\xffh:h\xff\x18\xffh\x0a3\xff\x00zh\x13D\x19F\xff\xff\xff\xff\x02F\xffh\x13D\xff`\xffh\x013\xff`\xff\xff\xffh\x18F\x107\xffF\xff\xff\xff\xff\xff\xff\x00\xffx`\x03K\x18F\x0c7\xffF]\xff\x04{pG\x00\xff\xff\xff\x00\x08\xff\xff\xff\xff\x00\xffx`\x03K\x18F\x0c7\xffF]\xff\x04{pG\x00\xff\xff\xff\x00\x08\xff\xff\xff\xff\x00\xffx`{h\x18F\xff\xff\xff\xff\x0cJ{h\x1a`{h\x043\x18F\xff\xff\xff\xff{h\x09J\xffa{h\x1c3\x18F\xff\xffv\xff{h\xff3\x18F\xff\xff?\xff{h\x18F\x087\xffF\xff\xff<\xff\x00\x08(\xff\x00\x08\xff\xff\xff\xff\x00\xffx`9`\x00}\x03\xff`{h\x18\x1d\xffh:h\x13D\x19F\xff\xff\xff\xff\x02F\xffh\x13D\xff`{h\xffi\x18F\xff\xff\xff\xff\xff`\xffh:h\x13D\xffh\x18F\x01\xff\xff\xff\xffh\x043\xff`\xffh:h\xff\x18{h\xffi\xffh\x19F\x02\xff\xff\xff\xffh\xffh\x13D\xff`{h\x03\xff\x1c\x00\xffh:h\x13D\x19F\xff\xffS\xff\x02F\xffh\x13D\xff`{h\x03\xff\xff\x00\xffh:h\x13D\x19F\xff\xff\x14\xff\x02F\xffh\x13D\xff`\xffh\x18F\x107\xffF\xff\xff\xff\xff\xff\xff\x00\xffx`9`\x00}\x03;a{h\x18\x1d;i:h\x13D\x19F\xff\xff@\xff\x02F;i\x13D;a;i:h\x1aD\x07\xff\x0c\x03\x11F\x18F\x01\xff\xff\xff;i\x043;a;i{a:i\xffh\x13Dzi\xffB\x0c\xff:h{i\x1aD{i\x01;9h\x0bD\x12x\x1ap{i\x013{a\xff\xff:i\xffh\x13D\x01;:h\x13D\x00"\x1ap;i\x01;:h\x1aD{h\xffa:i\xffh\x13D;a{h\x03\xff\x1c\x00;i:h\x13D\x19F\xff\xff}\x03\xff\x02F;i\x13D;a{h\x03\xff\xff\x00;i:h\x13D\x19F\xff\xff\xff\xff\x02F;i\x13D;a;i\x18F\x187\xffF\xff\xff\xff\xff\xff\xff\x00\xffx`\x03K\x18F\x0c7\xffF]\xff\x04{pG\x00\xff\xff\xff\x00\x08\xff\xff\xff\xff\x00\xffx`\x03K\x18F\x0c7\xffF]\xff\x04{pG\x00\xff\x04\xff\x00\x08\xff\xff\xff\xff\xff\xff\x00\xffx`\x07\xffT\x00\xff\xff\x0e\x00{h\x18F\xff\xff\xff\xff{h\x1c3\x18F\xff\xff\xff\xff{h<3\x18F\xff\xff\xff\xff\x07\xff}\x04\x04\x07\xffT\x05\x0f\xff\x0f\xff\xff\xff\x07\x00\xff\xff\x07\x00\x07\xff\x08\x04\x07\xffp\x05\x0f\xff\x0f\xff\xff\xff\x07\x00\xff\xff\x07\x00{h\x18F@7\xffF\xff\xff\xff@\x04\xffpG\x00\x00\xff\xff\xff\xff\x00\xffx`{h\x18F\xff\xff\xff\xff\x06J{h\x1a`{h\x043\x18F\xff\xff\xff\xff{h\x18F\x087\xffF\xff\xff\x00\xff}\x04\xff\x00\x08\xff\xff\xff\xff\x00\xffx`9`\x00}\x03\xff`{hYh\xffh:h\x13D\xff\xff\x1ap{h[h\x19\x0a\xffh\x013:h\x13D\xff\xff\x1ap{h[h\x19\x0c\xffh\x023:h\x13D\xff\xff\x1ap{h[h\x19\x0e\xffh\x033:h\x13D\xff\xff\x1ap\xffh\x043\xff`{h\xffh\xffh:h\x13D\xff\xff\x1ap{h\xffh\x19\x0a\xffh\x013:h\x13D\xff\xff\x1ap{h\xffh\x19\x0c\xffh\x023:h\x13D\xff\xff\x1ap{h\xffh\x19\x0e\xffh\x033:h\x13D\xff\xff\x1ap\xffh\x043\xff`\xffh\x18F\x147\xffF]\xff\x04{pG\xff\xff\xff\xff\x00\xffx`9`\x00}\x03\xff`\xffh:h\x13D\x1bx\x1aF{hZ`{hZh\xffh\x0139h\x0bD\x1bx\x1b\x02\x1aC{hZ`{hZh\xffh\x0239h\x0bD\x1bx\x1b\x04\x1aC{hZ`{hZh\xffh\x0339h\x0bD\x1bx\x1b\x06\x1aC{hZ`\xffh\x043\xff`\xffh:h\x13D\x1bx\x1aF{h\xff`{h\xffh\xffh\x0139h\x0bD\x1bx\x1b\x02\x1aC{h\xff`{h\xffh\xffh\x0239h\x0bD\x1bx\x1b\x04\x1aC{h\xff`{h\xffh\xffh\x0339h\x0bD\x1bx\x1b\x06\x1aC{h\xff`\xffh\x043\xff`\xffh\x18F\x147\xffF]\xff\x04{pG\xff\xff\xff\xff\x00\xffx`\x03K\x18F\x0c7\xffF]\xff\x04{pG\x00\xff(\xff\x00\x08\xff\xff\xff\xff\x00\xffx`\x03K\x18F\x0c7\xffF]\xff\x04{pG\x00\xff8\xff\x00\x08\xff\xff\xff\xff\x00\xffx`{h\x18F\xff\xff\xff\xff\x0bJ{h\x1a`{h\x00"\xff\xff{h\x09J\xff`{h\x07J\xff`{h\x06J\x1aa{h\x00"Za{h\x18F\x087\xffF\xff\xff\x00\xff\x0c\xff\x00\x08(\xff\x00\x08\xff\xff\xff\xff\x00\xffx`9`\x00}\x03\xffa{h\xff\xff\xffi:h\x13D\xff\xff\x1ap{h\xff\xff\x1b\x0a\xff\xff\xffi\x013:h\x13D\xff\xff\x1ap\xffi\x023\xffa{h\xffh\x18F\xff\xff|\xff\xffa\xffi:h\x13D\xffi\x18F\x01\xff\xff\xff\xffi\x043\xffa\xffi:h\xff\x18{h\xffh\xffi\x19F\x02\xff\xff\xff\xffi\xffi\x13D\xffa{h\xffh\x18F\xff\xff_\xffxa\xffi:h\x13Dyi\x18F\x01\xff\xff\xff\xffi\x043\xffa\xffi:h\xff\x18{h\xffhzi\x19F\x02\xffo\xff\xffi{i\x13D\xffa{h\x1bi\x18F\xff\xffB\xff8a\xffi:h\x13D9i\x18F\x01\xffo\xff\xffi\x043\xffa\xffi:h\xff\x18{h\x1bi:i\x19F\x02\xffR\xff\xffi;i\x13D\xffa{h[i\xff`\xffh\xffi:h\x13D\xff\xff\x1ap\xffh\x19\x0a\xffi\x013:h\x13D\xff\xff\x1ap\xffh\x19\x0c\xffi\x023:h\x13D\xff\xff\x1ap\xffh\x19\x0e\xffi\x033:h\x13D\xff\xff\x1ap\xffi\x043\xffa\xffi\x18F 7\xffF\xff\xff\xff\xff\xff\xff\x00\xffx`9`\x00}\x03\xffa\xffi:h\x13D\x1bx\xff\xff{h\xff\xff{h\xff\xff\x1a\xff\xffi\x0139h\x0bD\x1bx\x1b\x02\x1b\xff\x13C\x1b\xff\xff\xff{h\xff\xff\xffi\x023\xffa\xffi:h\x1aD\x07\xff\x14\x03\x11F\x18F\x01\xff+\xff\xffi\x043\xffa\xffi{b\xffi{i\x13Dzj\xffB\x0c\xff:h{j\x1aD{j\x01;9h\x0bD\x12x\x1ap{j\x013{b\xff\xff\xffi{i\x13D\x01;:h\x13D\x00"\x1ap\xffi\x01;:h\x1aD{h\xff`\xffi{i\x13D\xffa\xffi:h\x1aD\x07\xff\x10\x03\x11F\x18F\x01\xff\xff\xff\xffi\x043\xffa\xffi;b\xffi;i\x13D:j\xffB\x0c\xff:h;j\x1aD;j\x01;9h\x0bD\x12x\x1ap;j\x013;b\xff\xff\xffi;i\x13D\x01;:h\x13D\x00"\x1ap\xffi\x01;:h\x1aD{h\xff`\xffi;i\x13D\xffa\xffi:h\x1aD\x07\xff\x0c\x03\x11F\x18F\x01\xff\xff\xff\xffi\x043\xffa\xffi\xffa\xffi\xffh\x13D\xffi\xffB\x0c\xff:h\xffi\x1aD\xffi\x01;9h\x0bD\x12x\x1ap\xffi\x013\xffa\xff\xff\xffi\xffh\x13D\x01;:h\x13D\x00"\x1ap\xffi\x01;:h\x1aD{h\x1aa\xffi\xffh\x13D\xffa\x00}\x03\xff`\xffh\xffi9h\x0aD\x12x\x13C\xff`\xffh\xffi\x0139h\x0bD\x1bx\x1b\x02\x13C\xff`\xffh\xffi\x0239h\x0bD\x1bx\x1b\x04\x13C\xff`\xffh\xffi\x0339h\x0bD\x1bx\x1b\x06\x13C\xff`\xffh{hZa\xffi\x043\xffa\xffi\x18F(7\xffF\xff\xff\x00\x00\xff\xff\xff\xff\x00\xffx`\x03K\x18F\x0c7\xffF]\xff\x04{pG\x00\xff\\\xff\x00\x08\xff\xff\xff\xff\x00\xffx`\x03K\x18F\x0c7\xffF]\xff\x04{pG\x00\xffx\xff\x00\x08\xff\xff\xff\xff\x00\xffx`{h\x18F\xff\xff\x16\xff\x06J{h\x1a`{h\x00"\x1aq{h\x04J\xff`{h\x18F\x087\xffF\xff\xff\xff\xff\x00\x08(\xff\x00\x08\xff\xff\xff\xff\x00\xffx`9`\x00}\x03\xff`\xffh:h\x13Dzh\x12y\x1ap\xffh\x013\xff`{h\xffh\x18F\xff\xff\xff\xff\xff`\xffh:h\x13D\xffh\x18F\x01\xff\xff\xff\xffh\x043\xff`\xffh:h\xff\x18{h\xffh\xffh\x19F\x02\xff\xff\xff\xffh\xffh\x13D\xff`\xffh\x18F\x107\xffF\xff\xff\xff\xff\xff\xff\x00\xffx`9`\x00}\x03;a;i:h\x13D\x1ax{h\x1aq;i\x013;a;i:h\x1aD\x07\xff\x0c\x03\x11F\x18F\x01\xff\xff\xff;i\x043;a;i{a:i\xffh\x13Dzi\xffB\x0c\xff:h{i\x1aD{i\x01;9h\x0bD\x12x\x1ap{i\x013{a\xff\xff:i\xffh\x13D\x01;:h\x13D\x00"\x1ap;i\x01;:h\x1aD{h\xff`:i\xffh\x13D;a;i\x18F\x187\xffF\xff\xff\xff\xff\xff\xff\x00\xffx`\x03K\x18F\x0c7\xffF]\xff\x04{pG\x00\xff\xff\xff\x00\x08\xff\xff\xff\xff\x00\xffx`\x03K\x18F\x0c7\xffF]\xff\x04{pG\x00\xff\xff\xff\x00\x08\xff\xff\xff\xff\x00\xffx`{h\x18F\xff\xfff\xff\x0cJ{h\x1a`{h\x00"Z`{h\x00"\xff`{h\x00"\x1aa{h\x00"\xffa{h\x00"\xffa{h\x00"Zb{h\x18F\x087\xffF\xff\xff\xff\xff\x00\x08\xff\xff\xff\xff\x00\xffx`9`\x00}\x03{b{hYh{j:h\x13D\xff\xff\x1ap{h[h\x19\x0a{j\x013:h\x13D\xff\xff\x1ap{h[h\x19\x0c{j\x023:h\x13D\xff\xff\x1ap{h[h\x19\x0e{j\x033:h\x13D\xff\xff\x1ap{j\x043{b\x00}\x03;b{h[h:j\xffB+\xff{h\xffh;j\xff\x00\x13D\x1bh;a9i{j:h\x13D\xff\xff\x1ap;i\x19\x0a{j\x013:h\x13D\xff\xff\x1ap;i\x19\x0c{j\x023:h\x13D\xff\xff\x1ap;i\x19\x0e{j\x033:h\x13D\xff\xff\x1ap{j\x043{b;j\x013;b\xff\xff{h\x19i{j:h\x13D\xff\xff\x1ap{h\x1bi\x19\x0a{j\x013:h\x13D\xff\xff\x1ap{h\x1bi\x19\x0c{j\x023:h\x13D\xff\xff\x1ap{h\x1bi\x19\x0e{j\x033:h\x13D\xff\xff\x1ap{j\x043{b\x00}\x03\xffa{h\x1bi\xffi\xffB+\xff{h\xffi\xffi\xff\x00\x13D\x1bh\xff`\xffh{j:h\x13D\xff\xff\x1ap\xffh\x19\x0a{j\x013:h\x13D\xff\xff\x1ap\xffh\x19\x0c{j\x023:h\x13D\xff\xff\x1ap\xffh\x19\x0e{j\x033:h\x13D\xff\xff\x1ap{j\x043{b\xffi#a0 -[3.099] handleFlashPacket(): Flash write: Address= 0x8005380, Length=3024 -[3.100] write(): <13> Tx: $OK#9a -[3.100] read(): <13> Rx: $vFlashWrite:8005f50:\x013\xffa\xff\xff{h\xffi{j:h\x13D\xff\xff\x1ap{h\xffi\x19\x0a{j\x013:h\x13D\xff\xff\x1ap{h\xffi\x19\x0c{j\x023:h\x13D\xff\xff\x1ap{h\xffi\x19\x0e{j\x033:h\x13D\xff\xff\x1ap{j\x043{b\x00}\x03\xffa{h\xffi\xffi\xffB(\xff{hZj\xffi\xff\x00\x13D\x1bh\x18F\xff\xff<\xffxa{j:h\x13Dyi\x18F\x00\xffi\xff{j\x043{b{j:h\xff\x18{hZj\xffi\xff\x00\x13D\x1bhzi\x19F\x02\xffH\xffzj{i\x13D{b\xffi\x013\xffa\xff\xff{j\x18F(7\xffF\xff\xff\xff\xff\xff\xff\x00\xffx`9`\x00}\x03{c{k:h\x13D\x1bx;b{k\x013:h\x13D\x1bx\x1b\x02:j\x13C;b{k\x023:h\x13D\x1bx\x1b\x04:j\x13C;b{k\x033:h\x13D\x1bx\x1b\x06:j\x13C;b{k\x043{c{h[h:j\xffB\x0a\xff{h\xffh;j\xff\x00\x19F\x10F\x02\xff\x18\xff\x02F{h\xff`{h:jZ`\x00}\x03;c{h[h:k\xffB6\xff\x00}\x03{a{izk9h\x0aD\x12x\x13C{azi{k\x0139h\x0bD\x1bx\x1b\x02\x13C{azi{k\x0239h\x0bD\x1bx\x1b\x04\x13C{azi{k\x0339h\x0bD\x1bx\x1b\x06\x13C{azi{h\xff`{k\x043{c{h\xffh;k\xff\x00\x13Dzh\x082\x12h\x1a`;k\x013;c\xff\xff{k:h\x13D\x1bx\xffa{k\x013:h\x13D\x1bx\x1b\x02\xffi\x13C\xffa{k\x023:h\x13D\x1bx\x1b\x04\xffi\x13C\xffa{k\x033:h\x13D\x1bx\x1b\x06\xffi\x13C\xffa{k\x043{c{h\x1bi\xffi\xffB\x0a\xff{h\xffi\xffi\xff\x00\x19F\x10F\x01\xff\xff\xff\x02F{h\xffa{h\xffi\x1aa\x00}\x03\xffb{h\x1bi\xffj\xffB6\xff\x00}\x03;a;izk9h\x0aD\x12x\x13C;a:i{k\x0139h\x0bD\x1bx\x1b\x02\x13C;a:i{k\x0239h\x0bD\x1bx\x1b\x04\x13C;a:i{k\x0339h\x0bD\x1bx\x1b\x06\x13C;a:i{hZa{k\x043{c{h\xffi\xffj\xff\x00\x13Dzh\x142\x12h\x1a`\xffj\x013\xffb\xff\xff{k:h\x13D\x1bx\xffa{k\x013:h\x13D\x1bx\x1b\x02\xffi\x13C\xffa{k\x023:h\x13D\x1bx\x1b\x04\xffi\x13C\xffa{k\x033:h\x13D\x1bx\x1b\x06\xffi\x13C\xffa{k\x043{c{h\xffi\xffi\xffB\x0a\xff{hZj\xffi\xff\x00\x19F\x10F\x01\xff0\xff\x02F{hZb{h\xffi\xffa\x00}\x03\xffb{h\xffi\xffj\xffB?\xff{k:h\x1aD\x07\xff\x0c\x03\x11F\x18F\x00\xff5\xff{k\x043{c{k{bzk\xffh\x13Dzj\xffB\x0c\xff:h{j\x1aD{j\x01;9h\x0bD\x12x\x1ap{j\x013{b\xff\xffzk\xffh\x13D\x01;:h\x13D\x00"\x1ap{k\x01;:h\x1aD{h\x1abzk\xffh\x13D{c{hZj\xffj\xff\x00\x13Dzh 2\x12h\x1a`\xffj\x013\xffb\xff\xff{k\x18F87\xffF\xff\xff\xff\xff\xff\xff\x00\xffx`\x03K\x18F\x0c7\xffF]\xff\x04{pG\x00\xffx\xff\x00\x08\xff\xff\xff\xff\x00\xffx`\x03K\x18F\x0c7\xffF]\xff\x04{pG\x00\xff\xff\xff\x00\x08\xff\xff\xff\xff\x00\xff\xff`\xff`z`;`\xffh\xffh\x1a`\xffhzhZ`\xffh:h\x1aa\xffh\x18F\x147\xffF]\xff\x04{pG\xff\xff\xff\xff\x00\xffx`9`{h\xffh{h\xffh\x1bh\x1bhzh\xffh:h\xffG\x03F\x18F\x087\xffF\xff\xff\xff\xff\xff\xff\x00\xffx`{h\x1bi\x18F\x0c7\xffF]\xff\x04{pG\xff\xff\xff\xff\x00\xffx`{h\x1bh\xffn\x1bh[h[B\x03\xff\x7f\x03\x18F\x0c7\xffF]\xff\x04{pG\x00\x00\xff\xff\xff\xff\x00\xffx`{h\x0aJ\x1a`{h\x00"\xff\xff\xff {h\x00"\xff\xff\xff!{h\x00"\xff\xff\xff!{h\x18F\x0c7\xffF]\xff\x04{pG\xff\x01\x00 \xff\xff\xff\xff\x00\xffx`xh\x00\xff\x04\xff\x00\xff\x087\xffF\xff\xff\xff\xff\xff\xff\x00\xffx`{h\x18h{h\x043\xff"\x19F\xff\xff\xff\xff\x00\xff\x087\xffF\xff\xff\xff\xff\xff\xff\x00\xffx`O\xff\xff3\xff`{h\xff\xff\xff@xh\xff\xff\xff\xff\x03F\xffB\x14\xff\x01}\x03\x00}\x03\xff\xff\x00+\x12\xff{h\xff\xff\xff0Y\x1czh\xff\xff\xff\x10zh\x13D\x1by\xff`{h\xff\xff\xff0\x03\xff\x7f\x02{h\xff\xff\xff \xffh\x18F\x147\xffF\xff\xff\xff\xff\xff\xff\x00\xffx`{h\x1bh[o +\x08\xff'K\x1bx\xff\xff\x01\x03\xff\xff\x00+\x01\xff\x01}\x03\x00\xff\x00}\x03\x00+=\xff!K\x01"\x1ap{h\xff\xff\xff!{h\xff\xff\xff1\xffB/\xff{h\xff\xff\xff!{h\xff\xff\xff1\xffB\x0a\xff{h\xff\xff\xff1\xff\xff{h\xff\xff\xff1\xff\xff\xff\x1a\xff\xff\x06\xff{h\xff\xff\xff1\xff\xff\xff\xff\xffs\xff\xff\xff\xff{h\x18h{h\xff\xff\xff1\xff3zh\x13D\xff\xff\x19F\xff\xff\xff\xff{h\xff\xff\xff!\xff\xff\x13D\xff\xff{h\xff\xff\xff!\x03K\x00"\x1ap\x00\xff\x107\xffF\xff\xff\x00\xff\xff\x00\x00 \xff\xff\xff\xff\x00\xff\xff`\xff`z`{h{a{i\xff\xff\xff\x7f\xff\xffO\xff\xffs{a\xffh\xff\xff\xff1\xff\xff\xffr{i\xffB(\xff\x13F;a\xffh\xff\xff\xff1\xff3\xffh\x13D:i\xffh\x18F\x01\xff\xff\xff\xffh\xff\xff\xff!{i\x13D\xff\xff\xffh\xff\xff\xff!zi;i\xffB\x0b\xff\xffh\x03\xff\xff\x00;i\xffh\xff\x18zi;i\xff\x1a\x1aF\x01\xffi\xff\xffh\xff\xfff\xff\x00\xff\x187\xffF\xff\xff\xff\xff\xff\xff\x00\xffx`\xff\xff\x12\xff\x03F\x18F\x087\xffF\xff\xff\x00\x00\xff\xff\xff\xff\x00\xffx`{h\x18F\xff\xffL\xff\x05J{h\x1a`{h\x04JZ`{h\x18F\x087\xffF\xff\xff\x00\xff\xff\xff\x00\x08(\xff\x00\x08\xff\xff\xff\xff\x00\xffx`9`\x00}\x03\xff`{h[h\x18F\xff\xff\x0e\xff\xff`\xffh:h\x13D\xffh\x18F\x00\xff;\xff\xffh\x043\xff`\xffh:h\xff\x18{h[h\xffh\x19F\x01\xff\x1e\xff\xffh\xffh\x13D\xff`\xffh\x18F\x107\xffF\xff\xff\xff\xff\xff\xff\x00\xffx`9`\x00}\x03;a;i:h\x1aD\x07\xff\x0c\x03\x11F\x18F\x00\xff4\xff;i\x043;a;i{a:i\xffh\x13Dzi\xffB\x0c\xff:h{i\x1aD{i\x01;9h\x0bD\x12x\x1ap{i\x013{a\xff\xff:i\xffh\x13D\x01;:h\x13D\x00"\x1ap;i\x01;:h\x1aD{hZ`:i\xffh\x13D;a;i\x18F\x187\xffF\xff\xff\xff\xff\xff\xff\x00\xffx`\x03K\x18F\x0c7\xffF]\xff\x04{pG\x00\xff\xff\xff\x00\x08\xff\xff\xff\xff\x00\xffx`\x03K\x18F\x0c7\xffF]\xff\x04{pG\x00\xff\x08\xff\x00\x08\xff\xff\xff\xff\x00\xff\xff\xff\x19\xff\x00\xffI\xff\x00\xff\xff\xff\x00\xff\xff\xff\x00\xff\xff\xff\x00\xff)\xff\x00\xff\xff\xff\x00\xff\xff\xff\x00\xffW\xff\x17H\xff\xff\xff\xff\x16H\xff\xff/\xff\x16H\xff\xff,\xff\x07\xff\x18\x03\x18F\xff\xffA\xff\x07\xff\x18\x028\x1d\x00}\x03\x11I\xff\xff\xff\xff\x10H\x00\xffq\xff;\x1d\x19F\x0eH\x00\xff\xff\xff\x0dK\xffa\x07\xff\x18\x02;\x1d\x11F\x18F\xff\xff\xff\xff\x08H\x00\xff\xff\xffO\xffzp\xff\xff:\xff\xff\xff\x00\xff\xff\x00\x00 \xff\x02\x00 \x00\x03\x00 ,\xff\x00\x08\xff\x04\x00 \x08\x00\x00 \xff\xff\xff\xff\x00\xff\x07\xff\xff\x034"\x00!\x18F\x01\xffk\xff\x07\xff\xff\x03\x00"\x1a`Z`\xff`\xff`\x1aa\x07\xff\x08\x03\xff"\x00!\x18F\x01\xff\\\xff6K\x1bl5JC\xff\xffS\x13d3K\x1bl\x03\xff\xffS{`{h1K\x1bh}\x03\xff@C/JC\xff\xffC\x13`-K\x1bh\x03\xff@C;`;h\x02}\x03\xff\xff\xff0\x01}\x03\xff\xff\xff0\x10}\x03\xff\xff\xff0\x00}\x03\xff\xff\xff0\x07\xff\xff\x03\x18F\xff\xffx\xff\x03F\x00+\x14\xff\x01}\x03\x00}\x03\xff\xff\x00+\x01\xff\x00\xff&\xff\x0f}\x03\xff\xff\xff0\x00}\x03\xff\xff\xff0\x00}\x03\xff\xff\xff0O\xff\xffS\xff\xff\xff0\x00}\x03\xff\xff\xff0\x07\xff\xff\x03\x00!\x18F\xff\xff\xff\xff\x03F\x00+\x14\xff\x01}\x03\x00}\x03\xff\xff\x00+\x01\xff\x00\xff\x06\xffO\xff\xffs\xff`\x00}\x03{e\x07\xff\x08\x03\x18F\xff\xff\xff\xff\x03F\x00+\x14\xff\x01}\x03\x00}\x03\xff\xff\x00+\x01\xff\x00\xff\xff\xff\x00\xff\xff7\xffF\xff\xff\x008\x02@\x00p\x00@\xff\xff\xff\xff\x00\xff\x07\xff\x0c\x03}\x04"\x00!\x18F\x01\xff\xff\xff;F\x00"\x1a`Z`\xff`&KO\xff\xffB\x1a`}\x04K\x00"Z`"K\x00"\xff`!KO\xff\xff2\xff`\x1fK\x00"\x1aa\x1dK\x00"\xffa\x03}\x03\xff`\x00}\x03;a\x01}\x03{a\x00}\x03\xffa\x00}\x03\xffa\x00}\x03;b\x01}\x03{b\x00}\x03\xffb\x00}\x03\xffb\x07\xff\x0c\x03\x19F\x11H\xff\xff\xff\xff\x03F\x00+\x14\xff\x01}\x03\x00}\x03\xff\xff\x00+\x01\xff\x00\xff\xff\xff\x00}\x03;`\x00}\x03\xff`;F\x19F\x08H\xff\xffl\xff\x03F\x00+\x14\xff\x01}\x03\x00}\x03\xff\xff\x00+\x01\xff\x00\xff\xff\xff\x00\xff07\xffF\xff\xff\xff\x00\x00 \xff\xff\xff\xff\x00\xff\x07\xff\x10\x03\x00"\x1a`Z`\xff`\xff`;\x1d\x00"\x1a`Z`\xff`%K%J\x1a`}\x03KI\xff?BZ`!K\x00"\xff` K\x09"\xff`\x1eK\x00"\x1aa\x1dK\x00"\xffa\x1bH\xff\xff\x15\xff\x03F\x00+\x14\xff\x01}\x03\x00}\x03\xff\xff\x00+\x01\xff\x00\xff]\xffO\xff\xffS;a\x07\xff\x10\x03\x19F\x12H\xff\xff\xff\xff\x03F\x00+\x14\xff\x01}\x03\x00}\x03\xff\xff\x00+\x01\xff\x00\xffJ\xff\x00}\x03{`\x00}\x03\xff`;\x1d\x19F\x08H\xff\xff\x11\xff\x03F\x00+\x14\xff\x01}\x03\x00}\x03\xff\xff\x00+\x01\xff\x00\xff7\xff\x00\xff 7\xffF\xff\xff\x00\xff\xff\x00\x00 \x00\x04\x00@\xff\xff\xff\xff\x00\xff\x07\xff\x1c\x03\x00"\x1a`Z`\xff`;F\x00"\x1a`Z`\xff`\xff`\x1aaZa\xffa0K1J\x1a`/K\x00"Z`-K\x00"\xff`,K\x00"\xff`}\x0aK\x00"\x1aa)K\x00"\xffa'H\xff\xff\x0b\xff\x03F\x00+\x14\xff\x01}\x03\x00}\x03\xff\xff\x00+\x01\xff\x00\xff\xff\xff\x00}\x03\xffa\x00}\x03{b\x07\xff\x1c\x03\x19F\x1dH\xff\xff\xff\xff\x03F\x00+\x14\xff\x01}\x03\x00}\x03\xff\xff\x00+\x01\xff\x00\xff\xff\xff`}\x03;`\x00}\x03{`\x00}\x03\xff`\x00}\x03;a;F\x08"\x19F\x11H\xff\xff\xff\xff\x03F\x00+\x14\xff\x01}\x03\x00}\x03\xff\xff\x00+\x01\xff\x00\xff#8a -[3.100] handleFlashPacket(): Flash write: Address= 0x8005f50, Length=2976 -[3.100] write(): <13> Tx: $OK#9a -[3.101] read(): <13> Rx: $vFlashWrite:8006af0:\xff\xff;F\x0c"\x19F\x09H\xff\xff\xff\xff\x03F\x00+\x14\xff\x01}\x03\x00}\x03\xff\xff\x00+\x01\xff\x00\xff\xff\xff\x03H\x01\xffT\xff\x00\xff(7\xffF\xff\xff}\x04\x01\x00 \x00\x08\x00@\xff\xff\xff\xff\x00\xff\x07\xff\x0c\x03}\x04"\x00!\x18F\x01\xff\xff\xff;F\x00"\x1a`Z`\xff`%K%J\x1a`}\x03K\x00"Z`"K\x00"\xff` K\x00"\xff`\x1fK\x00"\x1aa\x1dK\x00"\xffa\x03}\x03\xff`\x00}\x03;a\x01}\x03{a\x00}\x03\xffa\x00}\x03\xffa\x00}\x03;b\x01}\x03{b\x00}\x03\xffb\x00}\x03\xffb\x07\xff\x0c\x03\x19F\x11H\xff\xff\xff\xff\x03F\x00+\x14\xff\x01}\x03\x00}\x03\xff\xff\x00+\x01\xff\x00\xffs\xff\x00}\x03;`\x00}\x03\xff`;F\x19F\x08H\xff\xff:\xff\x03F\x00+\x14\xff\x01}\x03\x00}\x03\xff\xff\x00+\x01\xff\x00\xff`\xff\x00\xff07\xffF\xff\xffd\x01\x00 \x00\x0c\x00@\xff\xff\x00\xff\x16K\x17J\x1a`\x15KO\xff\xff2Z`\x13K\x00"\xff`\x11K\x00"\xff`\x10K\x00"\x1aa\x0eK\x0c"Za\x0dK\x00"\xffa\x0bK\x00"\xffa\x0aK\x00"\x1ab\x08K\x00"Zb\x07H\xff\xff~\xff\x03F\x00+\x14\xff\x01}\x03\x00}\x03\xff\xff\x00+\x01\xff\x00\xff}\x0a\xff\x00\xff\xff\xff\xff\x01\x00 \x00H\x00@\xff\xff\xff\xff\x00\xff\x10K\x1bk\x0fJC\xff\x00\x13\x13c\x0dK\x1bk\x03\xff\x00\x13{`{h\x00"\x00!\x0c \xff\xff\xff\xff\x0c \xff\xff\xff\xff\x00"\x00!\x0e \xff\xff\xff\xff\x0e \xff\xff\xff\xff\x00\xff\x087\xffF\xff\xff\x00\xff\x008\x02@\xff\xff\xff\xff\x00\xff\x07\xff\x1c\x03\x00"\x1a`Z`\xff`\xff`\x1aaSK\x1bkRJC\xff\x04\x03\x13cPK\x1bk\x03\xff\x04\x03\xffa\xffiMK\x1bkLJC\xff\x01\x03\x13cJK\x1bk\x03\xff\x01\x03{a{iGK\x1bkFJC\xff \x03\x13cDK\x1bk\x03\xff \x03;a;iAK\x1bk@JC\xff\x10\x03\x13c>K\x1bk\x03\xff\x10\x03\xff`\xffh;K\x1bk:JC\xff\x08\x03\x13c8K\x1bk\x03\xff\x08\x03\xff`\xffh5K\x1bk4JC\xff\x02\x03\x13c2K\x1bk\x03\xff\x02\x03{`{h\x00"O\xffpA.H\xff\xff\xff\xff\x00"O\xff\xffq,H\xff\xff\xff\xff\x01}\x03\xffa\x03}\x03;b\x00}\x03{b\x07\xff\x1c\x03\x19F'H\xff\xff\x17\xff\x08}\x03\xffa\x03}\x03;b\x00}\x03{b\x07\xff\x1c\x03\x19F"H\xff\xff\x0b\xff@}\x03\xffa\x00}\x03;b\x00}\x03{b\x07\xff\x1c\x03\x19F\x1cH\xff\xff\xff\xffO\xffpC\xffa\x01}\x03;b\x00}\x03{b\x00}\x03\xffb\x07\xff\x1c\x03\x19F\x12H\xff\xff\xff\xffO\xff\x00s\xffa\x00}\x03;b\x00}\x03{b\x07\xff\x1c\x03\x19F\x0fH\xff\xff\xff\xffO\xff\xffs\xffa\x01}\x03;b\x00}\x03{b\x00}\x03\xffb\x07\xff\x1c\x03\x19F\x05H\xff\xff\xff\xff\x00\xff07\xffF\xff\xff\x008\x02@\x00\x14\x02@\x00\x04\x02@\x00\x08\x02@\x00\x00\x02@\x00\x10\x02@\xff\xff\xff\xff\x00\xffx`{h\x1bh\x10J\xffB\x19\xff\x10H\xff\xff\xff\xff\xff\xff@z\x0eK\xff\xff\x00z\x0eH\xff\xff\xff\xff\xff\xff@z\x0cK\xff\xff\x00z\x0cH\xff\xff\xff\xff\x03F\xff\xffd}\x03\x09I\x09H\xff\xff\xff\xff\x00\xff\x087\xffF\xff\xff\x00\xff\x00\x04\x00@\xff\x02\x00 \xff\x04\x00 \x00\x03\x00 \xff\x04\x00 \x08\x00\x00 \xff\x01\x00 \xff\xff\xff\xff\x00\xffx`\x00\xff\x0c7\xffF]\xff\x04{pG\xff\xff\x00\xff\x00\xff\xffF]\xff\x04{pG\xff\xff\xff\xff\x00\xffx`9`\x00}\x03\xff`\xffh\x03+\x0d\xff\xffh\xff\x00:h"\xff\x03\xffzh\xffh\x13D\xff\xff\x1ap\xffh\x013\xff`\xff\xff\x00\xff\x147\xffF]\xff\x04{pG\xff\xff\xff\xff\x00\xffx`9`{h\x00"\x1a`\x00}\x03\xff`\xffh\x03+\x11\xff{h\x1bh9h\xffh\x0aD\x12x\x11F\xffh\xff\x00\x01\xff\x02\xff\x1aC{h\x1a`\xffh\x013\xff`\xff\xff\x00\xff\x147\xffF]\xff\x04{pG\xff\xff\xff\xff\x00\xffx`\x04J{h\x1a`{h\x18F\x0c7\xffF]\xff\x04{pG\xff\xff\x00\x08\xff\xff\xff\xff\x00\xffx`{h\x18F\xff\xff\xff\xff:J{h\x1a`{h\x043\x18F\xff\xff(\xff{h\x00"\xff\xff\xff&{h\x03\xff\xffc\x18F\xff\xff\x12\xff\x00}\x03{a{i\x18+\x0b\xffzh{i\x03\xff\xffs\xff\x00\x13D\x00"Z`{i\x013{a\xff\xff\x00}\x03;a;i\x18+\x0a\xff{h:i\x02\xff\xffr\x00!C\xff"\x10;i\x013;a\xff\xff\x00}\x03\xff`\xffh\xff\xff\x00\x7f\x0a\xffzh\xffh\x13D\x03\xff\xffs\x00"\x1ap\xffh\x013\xff`\xff\xff\x00}\x03\xff`\xffh\xff\xff\x00\x7f\x0a\xffzh\xffh\x13D\x03\xffis\x00"\x1ap\xffh\x013\xff`\xff\xff{h\x00"\xff\xff\xff&{h\x00"\xff\xff\xff&{h\x00"\xff\xff\xff&{h\x00"\xff\xff\xff&{h\x00"\xff\xff\xff&{h\x00"\xff\xff\xff&{h\x00"\xff\xff\xff!{h\x18F\x187\xffF\xff\xff\xff\xff\x00\x08\xff\xff\xff\xff\x00\xffx`{h\x043\x18F\xff\xff\xff\xff{h\x00"\xff\xffl&{h\x00"\xff\xffp&{h\x00"\xff\xffx&{h\x00"\xff\xfft&\x00\xff\x087\xffF\xff\xff\xff\xff\xff\xff\x00\xffx`9`\x00}\x03\xff`\xffh\x18+\x1e\xffzh\xffh\x03\xff\xffs\xff\x00\x13D[h\x00+\x11\xffzh\xffh\x03\xff\xffs\xff\x00\x13D:hZ`\xffh\x03\xff}]\x02;h\xff`zh;h\xff`\x01}\x03\x04\xff\xffh\x013\xff`\xff\xff\x00}\x03\x18F\x147\xffF]\xff\x04{pG\xff\xff\xff\xff\x00\xffx`{h\x043\x18F\xff\xffd\xff\xff`{h\xff\xff\xff6\xffh\xff\x1aB\xff\xff"\xffB\x03\xff{h\x00"\xff\xff\xff&{h\xff\xffl6\x00+\x09\xff{h\xff\xff\xff6\xffh\xffB\x03\xff{h\x00"\xff\xffl&{h\xff\xff\xff1\x00+\x14\xff{h\x043\x18F\xff\xff=\xff\x02F\xffh\xff\x1a{h\xff\xff\xff1\xffB\xff\xff\x01}\x03\x00}\x03\xff\xff\x00+\x02\xffo\xff\x01\x03\xff\xff{h\x043\x18F\xff\xff]\xff\xff`\xffh\x00+\xff\xffw\xff{h\xff\xff|&\xffh\x1aD{h\xff\xff|&{h\xff\xffl6\x07+\x1e\xff{h\xff\xffx6Y\x1czh\xff\xffx\x16\xffh\xff\xffzh\x13D\x0aF\xff\xff\xff!{h\xff\xffp6Z\x1e{h\xff\xffp&{h\xff\xffp6\x00+\xff\xff{h\x08"\xff\xffl&\xff\xff{h\xff\xffl6\x00+(\xff\xffh\xff+\x0d\xff{h\xff\xffl6Z\x1c{h\xff\xffl&\xffh\x03\xff\x14\x02{h\xff\xff\xff&\xff\xff{h\x043\x18F\xff\xff\xff\xff\x02F\xffh\xff\x1aA\xff\xff2\xffB\xff\xff\x01}\x03\x00}\x03\xff\xff\x00+\xff\xff{h\x00"\xff\xff\xff&o\xff\x01\x033\xff{h\xff\xffl6\x01+\x1b\xff\xffh\xff+\x07\xff{h\xff\xffl6Z\x1c{h\xff\xffl&q\xff{h\x00"\xff\xffl&{h\xff\xff\xff6\xff\xff\x01\x03\xff\xff\x00+?\xffe\xffxh\x00\xff\x18\xff`\xff{h\xff\xffl6\x02+\x13\xff{h\xffh\xff\xffp&{h\x00"\xff\xffx&{h\xff\xffl6Z\x1c{h\xff\xffl&{h\xffh\xff\xff|&G\xff{h\xff\xffl6\x03+\x10\xff{h\xff\xffp&\xffh\x1b\x02\x1aD{h\xff\xffp&{h\xff\xffl6Z\x1c{h\xff\xffl&1\xff{h\xff\xffl6\x04+\x16\xff{h\xff\xff|6ZB\xff\xff\xff\xffX\xffSB\xff+\x07\xff{h\xff\xffl6Z\x1c{h\xff\xffl&\x1a\xff{h\x00"\xff\xffl&\x15\xff{h\xff\xffl6\x05+\x0f\xff{h\xffh\xff\xfft&{h\xff\xffl6Z\x1c{h\xff\xffl&{h\xffh\xff\xff|&\x00\xff{h\xff\xffl6\x06+\x17\xff{h\xff\xfft&\xffh\x1b\x02\x1aD{h\xff\xfft&{h\x07"\xff\xffl&{h\xff\xffp6\x00+\x7f\xff\xff\xff{h\x08"\xff\xffl&\xff\xff{h\xff\xffl6\x08+\x7f\xff\xff\xff{h\x00"\xff\xffl&{h\xff\xff|6ZB\xff\xff\xff\xffX\xffSB\xff+\x7f\xff\xff\xff{h\xff\xfft6\x00+\x10\xffxh\x00\xff}]\xffxh\x00\xff\xff\xff{h\xffh\xff\xff\xff&{h\xffh\xff\xff\xff&O\xff\xff3j\xff{h\xff\xfft6\x0a+\x07\xff{h\x03\xff\xffs\x19Fxh\x00\xff`\xff\xff\xff{h\xff\xfft6\x06+\x0e\xff{h\x03\xff\xffb{h\x03\xff\xffs\x19F\x10F\xff\xff\x0b\xff{h\x01"\xff\xff\xff&\xff\xff{h\xff\xfft6\x0b+\x04\xff{h\x00"\xff\xff\xff&\xff\xff{h\xff\xfft6\xff\xffd\x02{h\x02\xff\xffrS\xff"0\x00+?\xff\xff\xff{h\xff\xfft6\xff\xffd\x02{h\x02\xff\xffrS\xff"\x00{h\xff\xfft6\xff\xffd\x02{h\x02\xff\xffrS\xff"0\x1bh\x1bhzh\x02\xff\xffr\x11F\xffGd\xff\x00\xff{h\xff\xff\xff6\x00+\x0f\xff{h\xff\xff\xff6\xffh\xff\x1a@\xff\xff\x12\xffB\x06\xffxh\x00\xff\x09\xff{h\xffh\xff\xff\xff&\x00}\x03\x18F\x107\xffF\xff\xff\xff\xff\xff\xff\x00\xffx`\x07\xff\x0c\x03\x18F\xff\xff\x16\xff{h\x1bh\x1bh\x07\xff\x0c\x02\x0a!xh\xffG{h\x043\x18F\xff\xff{\xff\x02F{h\xff\xff\xff!\x00\xff\x187\xffF\xff\xff\xff\xff\xff\xff\x00\xffx`\x07\xff\x0c\x03\x18F\xff\xff\xff\xff\x00}\x03{b{j\x18+c\xffzh{j\x03\xff\xffs\xff\x00\x13D[h\x00+V\xffzh{j\x03\xff\xffs\xff\x00\x13D[h\xffh\xff\xff;\xffzh{j\x03\xff\xffs\xff\x00\x13D[h\x1bh{azh{j\x03\xff\xffs\xff\x00\x13D[hYhzh{j\x03\xff\xffs\xff\x00\x13D[h[h\x1bh\x083\x1bh\x08F\xffG\x03F\xffazh{j\x03\xff\xffs\xff\x00\x13D[hYhzh{j\x03\xff\xffs\xff\x00\x13D[h[h\x1bh\x0c3\x1bh\x08F\xffG\x03F\xffaO\xff\x00s;b{h\x1bh\x1chzh{j\x03\xff\xffs\xff\x00\x13D[h\x18F\xff\xff\xff\xff\x01F\x07\xff\x0c\x03\x1aFxh\xffG{j\x013{b\xff\xff\x00}\x03{b{j\x18+_\xff{hzj\x02\xff\xffrS\xff"0\x00+S\xff{hzj\x02\xff\xffrS\xff"0[h\xff\xff;\xff{hzj\x02\xff\xffrS\xff"0\xffh{a{hzj\x02\xff\xffrS\xff"\x10{hzj\x02\xff\xffrS\xff"0\x1bh\x083\x1bh\x08F\xffG\x03F\xffa{hzj\x02\xff\xffrS\xff"\x10{hzj\x02\xff\xffrS\xff"0\x1bh\x0c3\x1bh\x08F\xffG\x03F\xffaO\xff\x00s;b{h\x1bh\x1ch{hzj\x02\xff\xffrS\xff"\x10{hzj\x02\xff\xffrS\xff"0\x1bh\x043\x1bh\x08F\xffG\x01F\x07\xff\x0c\x03\x1aFxh\xffG{j\x013{b\xff\xff{h\x01"\xff\xff\xff&\x00\xff,7#32 -[3.101] handleFlashPacket(): Flash write: Address= 0x8006af0, Length=2976 -[3.101] write(): <13> Tx: $OK#9a -[3.101] read(): <13> Rx: $vFlashWrite:8007690:\xffF\xff\xff\xff\xff\xff\xff\x00\xffx`9`\x07\xff\x08\x03\x18F\xff\xff\x18\xff{h\x043\x18F\xff\xff\xff\xff\x02F{h\xff\xff\xff1\xff\x1a{a\x07\xff\x08\x039h\x18F\xff\xffw\xff\xffh{i\x15I\xff\xff\x03\x13\xff\x09\x13D\xff`9izi\x11K\xff\xff\x02\x03\xff\x09O\xffzp\x00\xff\x03\xff\xff\x1a\x0dJ\x02\xff\x03\xff\x0bD;a\x07\xff\x08\x03\x043\x19Fxh\x00\xff\xff\xff{h\x043\x18F\xff\xffU\xff\x02F{h\xff\xff\xff&\x00\xff\x187\xffF\xff\xff\x00\xff\xffMb\x10@B\x0f\x00\xff\xff\xff\xff\x00\xff\xff`\xff`z`\xffhc+\x09\xff\xffh\xff\xff\xff6\xff\xff\x01\x03\xff\xff\x00+\x01\xff\x00}\x03w\xff{h\x1bh\x1bh\xffh\x02\xffir\x072\x11Fxh\xffGxa\xffh\xff"\xff\xff\xff}\x03\xffh\xff"\xff\xff\xff}\x03{i\xff\xff\xffh\xff\xff\xff}\x03{i\xff\xff\x1b\x12\xff\xff\xffh\xff\xff\xff}\x03\xffh\xff\xff\xff}\x03\xffh\xff\xff\xff3\x13D\xff\xff\xffC\xff\xff\xffh\xff\xff\xff}\x03\xffh\xff\xff\xffh\xff\xff\xff}\x03\xffh\x1b\xff\x1b\x12\xff\xff\xffh\xff\xff\xff}\x03\x00}\x03\xffa\x05}\x03\xffa{i\x073\xffi\xffB\x0d\xff\xffh\xffi\x13D\x03\xffis\x1bx\x1aF\xffi\x13D\xffa\xffi\x013\xffa\xff\xff{i\x073{a\xffiZB\xff\xff\xff\xffX\xffSB\xff\xff{iY\x1cya\xffC\xff\xff\xffh\x13D\x0aF\xff\xff\xff}\x03{i\xff\xff\x00\x7f\x0a\xff\xffh\x18\x1d\xffh\x03\xffiszi\x19F\xff\xff\xff\xff{i\x05\xff\x05I\xffh\x00\xffI\xffO\xff\xff3\x18F 7\xffF\xff\xff\x00\xff4\xff\x00\x08\xff\xff\xff\xff\x00\xffx`9`{h\x043\x18F\xff\xff\xff\xff\xff`;h\x1ah\xffh\x15I\xff\xff\x03\x13\xff\x09\xff\x1aZ\x1e{h\xff\xff\xff!;hYh\xffh\x0fK\xff\xff\x02\x03\xff\x09O\xffzp\x00\xff\x03\xff\xff\x1a\x0cJ\x02\xff\x03\xff\xff\x1a\x0bK\x13Dzh\xff\xff\xff1{h\x03\xff\xffr{h\x03\xff\xffs\x19F\x10F\x00\xffH\xff\x00\xff\x107\xffF\xff\xff\xffMb\x10@B\x0f\x00\x00\xff\xff;\xff\xff\xff\xff\x00\xffx`9`:h\x03!xh\x00\xff\x04\xff\x00\xff\x087\xffF\xff\xff\xff\xff\xff\xff\x00\xff\xff`\x0bFz`\xffr\x07\xff\x14\x03\x18F\xff\xff\xff\xff\xffz;v{h\xffa\xffh\x1bh\x1bh\x07\xff\x14\x02\x07!\xffh\xffG\x00\xff 7\xffF\xff\xff\xff\xff\xff\xff\x0c\xffx`9`{h\x01+}\x04\xff;hO\xff\xffr\xffB\x1f\xff\x12I\x12H\xff\xff\x0f\xff\x12I\x12H\xff\xff\x0b\xff\x0fN\x10K\x04\xff\x1dF\x0f\xff\x0f\xff\xff\xff\x07\x00\xff\xff\x07\x00lF\x06\xff\x0c\x03\x0f\xff\xff\xff\x0f\x00\xff\xff\x0e\x00\x09H\xff\xff|\xff\x08H\xff\xff\xff\xff\x00\xff\x0c7\xffF\xff\xff\x00\xff\xff\x00\x00 \xff\x02\x00 d\x01\x00 \x00\x03\x00 \x1c\x03\x00 \xff\x04\x00 \xff\xff\xff\xff\x00\xffx`{h\xff\xff\xff6\x18F\x0c7\xffF]\xff\x04{pG\xff\xff\x00\xffO\xff\xffq\x01 \xff\xff\xff\xff\xff\xff\x00\x00\xff\xff\xff\xff\x00\xff\x0fK\x1bl\x0eJC\xff\xffS\x13d\x0cK\x1bl\x03\xff\xffS{`{h\x09K[l\x08JC\xff\xffCSd\x06K[l\x03\xff\xffC;`;h\x00\xff\x0c7\xffF]\xff\x04{pG\x00\xff\x008\x02@\xff\xff\xff\xff\x00\xffx`\x07\xff\x1c\x03\x00"\x1a`Z`\xff`\xff`\x1aa{h\x1bh\xff\xff\xffOD\xff;K\x1bl:JC\xff\x01\x03\x13d8K\x1bl\x03\xff\x01\x03\xffa\xffi5K\x1bk4JC\xff\x01\x03\x13c2K\x1bk\x03\xff\x01\x03{a{i/K\x1bk.JC\xff\x02\x03\x13c,K\x1bk\x03\xff\x02\x03;a;i }\x03\xffa\x02}\x03;b\x00}\x03{b\x00}\x03\xffb\x01}\x03\xffb\x07\xff\x1c\x03\x19F}\x03H\xff\xff\x7f\xff\x08}\x03\xffa\x02}\x03;b\x00}\x03{b\x00}\x03\xffb\x01}\x03\xffb\x07\xff\x1c\x03\x19F\x1cH\xff\xffo\xff,\xff{h\x1bh\x1aJ\xffB'\xff\x16K\x1bl\x15JC\xff\x08\x03\x13d\x13K\x1bl\x03\xff\x08\x03\xff`\xffh\x10K\x1bk\x0fJC\xff\x01\x03\x13c\x0dK\x1bk\x03\xff\x01\x03\xff`\xffh\x03}\x03\xffa\x02}\x03;b\x00}\x03{b\x00}\x03\xffb\x02}\x03\xffb\x07\xff\x1c\x03\x19F\x04H\xff\xffA\xff\x00\xff07\xffF\xff\xff\x00\xff\x008\x02@\x00\x00\x02@\x00\x04\x02@\x00\x0c\x00@\xff\xff\xff\xff\x00\xffx`{h\x1bh\x0dJ\xffB\x13\xff\x0dK\x1bl\x0cJC\xff\x02\x03\x13d\x0aK\x1bl\x03\xff\x02\x03\xff`\xffh\x00"\x00!\x1d \xff\xffK\xff\x1d \xff\xffd\xff\x00\xff\x107\xffF\xff\xff\x00\xff\x00\x04\x00@\x008\x02@\xff\xff\xff\xff\x00\xffx`{h\x1bh\x0aJ\xffB\x0b\xff\x0aK\x1bl\x09JC\xff\x04\x03\x13d\x07K\x1bl\x03\xff\x04\x03\xff`\xffh\x00\xff\x147\xffF]\xff\x04{pG\x00\xff\x00\x08\x00@\x008\x02@\xff\xff\xff\xff\x00\xffx`\x07\xff\x0c\x03\x00"\x1a`Z`\xff`\xff`\x1aa{h\x1bh\x11J\xffB\x1c\xff\x11K\x1bk\x10JC\xff\x08\x03\x13c\x0eK\x1bk\x03\xff\x08\x03\xff`\xffhO\xff@C\xff`\x02}\x03;a\x00}\x03{a\x00}\x03\xffa\x02}\x03\xffa\x07\xff\x0c\x03\x19F\x05H\xff\xff\xff\xff\x00\xff 7\xffF\xff\xff\x00\x08\x00@\x008\x02@\x00\x0c\x02@\xff\xff\xff\xff\x00\xffx`\x07\xff\x14\x03\x00"\x1a`Z`\xff`\xff`\x1aa{h\x1bhKJ\xffB@\xff\xff\xffJK\x1blIJC\xff\xff}\x03\x13dGK\x1bl\x03\xff\xff}\x03;a;iDK\x1bkCJC\xff\x08\x03\x13cAK\x1bk\x03\xff\x08\x03\xff`\xffhO\xff@s{a\x02}\x03\xffa\x00}\x03\xffa\x03}\x03;b\x07}\x03{b\x07\xff\x14\x03\x19F8H\xff\xff{\xff8K8J\x1a`6KO\xff\x00bZ`4K\x00"\xff`3K\x00"\xff`1KO\xff\xffb\x1aa/K\x00"Za.K\x00"\xffa,K\x00"\xffa+KO\xff\x002\x1ab)K\x00"Zb'H\xff\xff\xff\xff\x03F\x00+\x01\xff\xff\xff\xff\xff{h}\x03J\xfff"J{h\xffc"K}\x03J\x1a`!KO\xff\x00bZ`\x1fK@"\xff`\x1dK\x00"\xff`\x1cKO\xff\xffb\x1aa\x1aK\x00"Za\x18K\x00"\xffa\x17K\x00"\xffa\x15KO\xff\x002\x1ab\x13K\x00"Zb\x12H\xff\xff\xff\xff\x03F\x00+\x01\xff\xff\xff\xff\xff{h\x0dJ\xfff\x0cJ{h\xffc\x00"\x00!' \xff\xffI\xff' \xff\xffb\xff\x00\xff(7\xffF\xff\xff\x00\xff\x00H\x00@\x008\x02@\x00\x0c\x02@}\x04\x02\x00 (`\x02@\xff\x02\x00 X`\x02@\xff\xff\x00\xff\x00\xff\xffF]\xff\x04{pG\xff\xff\x00\xff\xff\xff\xff\xff\x00\xff\xff\xff\xff\xff\x00\xff\xff\xff\xff\xff\x00\xff\xff\xff\xff\xff\x00\xff\x00\xff\xffF]\xff\x04{pG\xff\xff\x00\xff\x00\xff\xffF]\xff\x04{pG\xff\xff\x00\xff\x00\xff\xffF]\xff\x04{pG\xff\xff\x00\xff\xff\xff\xff\xff\x00\xff\xff\xff\xff\xff\x00\xff\x02H\xff\xffg\xff\x00\xff\xff\xff\x00\xff}\x04\x02\x00 \xff\xff\x00\xff\x02H\xff\xff]\xff\x00\xff\xff\xff\x00\xff\xff\x02\x00 \xff\xff\x00\xff\x02H\xff\xff0\xff\x00\xff\xff\xff\x00\xff\xff\x00\x00 \xff\xff\x00\xff\x02H\xff\xffW\xff\x00\xff\xff\xff\x00\xff\xff\x01\x00 \xff\xff\x00\xff\x01}\x03\x18F\xffF]\xff\x04{pG\xff\xff\xff\xff\x00\xffx`9`\x00\xff\xff\xff\x02F\x16}\x03\x13`O\xff\xff3\x18F\x087\xffF\xff\xff\xff\xff\xff\xff\x00\xffx`O\xff\xff1xh\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\x00\xffx`\x11K\x1bh\x00+\x02\xff\x0fK\x10J\x1a`\x0eK\x1bh\xff`\x0cK\x1ah{h\x13DjF\xffB\x07\xff\x00\xff\xff\xff\x02F\x0c}\x03\x13`O\xff\xff3\x06\xff\x05K\x1ah{h\x13D\x03J\x13`\xffh\x18F\x107\xffF\xff\xff\xff\x0b\x00 \xff\x0b\x00 \xff\xff\x00\xff\x15K\xff\xff\xff0\x14JC\xffp\x03\xff\xff\xff0\x12K\x1bh\x11JC\xff\x01\x03\x13`\x0fK\x00"\xff`\x0eK\x1ah\x0dI\x0dK\x13@\x0b`\x0bK\x0cJZ`\x09K\x1bh\x08J}\x03\xff\xff}\x03\x13`\x06K\x00"\xff`\x04KO\xff\x00b\xff`\x00\xff\xffF]\xff\x04{pG\x00\xff\x00\xff\x008\x02@\xff\xff\xff\xff\x100\x00}\x04\xff\xff\xff\xff\x00\xffx`9`;h\x1bhZ\x0a\x0fI\xff\xff\x02\x12\xff\x09\x0eI\x01\xff\x02\xff\xff\x1a\xff`;h\x1bh[\x0a\x09J\xff\xff\x03}\x03\xff\x09\xff`{h\x1ah\xffh\x1aD{h\x1a`;h\xffh\x1a`\x00\xff\x147\xffF]\xff\x04{pG\xffK\x04\x00\x00\xff\xff;\xff\xff4\xff\x00!\x03\xff\x0cK[XCP\x041\x0bH\x0cKB\x18\xffB\xff\xff\x0bJ\x02\xff\x00}\x03B\xff\x04;\x09K\xffB\xff\xff\xff\xff\xff\xff\x00\xff1\xff\xff\xff\xff\xffpG\x00\x00\x08 P\xff\x00\x08\x00\x00\x00 \xff\x00\x00 \xff\x00\x00 \xff\x0b\x00 \xff\xff\x08\xff\x00\xff\x0c\xff\x08\xff\xffG\x00\xff\x0d\xff\x02K\x18h\xff\xff[\xffpG\x00\xff\x1c\x00\x00 \x08\xff\xff\xff\xff\xff\xff\xff\xff\xff\x08\xff\x06 \x00\xffq\xff\x01 \xff\xff}\x04\xff\x01K\x18hpG\x00\xff \x00\x00 p\xff\x0dN\x0dL\xff\x1b\xff\x10\x00%\xffB\x09\xff\x0bN\x0cL\x00\xff`\xff\xff\x1b\xff\x10\x00%\xffB\x05\xffp\xffV\xff%0\xffG\x015\xff\xffV\xff%0\xffG\x015\xff\xffD\xff\x00\x08D\xff\x00\x08D\xff\x00\x08L\xff\x00\x08\x10\xffC\x1e\x0aD\xffB\x00\xff\x10\xff\x11\xff\x01K\x03\xff\x01O\xff\xff\x02D\x03F\xffB\x00\xffpG\x03\xff\x01\x1b\xff\xff\x00\x00\x02K\x0aF\x01F\x18h\x00\xff\xff\xff \x00\x00 \x1f)8\xff\x04F\x0dF\x04\xff\x16}\x03\x03`O\xff\xff08\xffBl\x12\xffR\xff!0K\xff F\x00\xff0\xff}\x0aF\x01F F\xff\xff8@\x00\xff\x17\xff\x01+\x0a\xffY\x1c\x03\xff\x16}\x03\x03`\x01 \xff\xff\x00}\x04B\xff%@(F\xffG\x00 \xff\xff\x02K\x01F\x18h\xff\xff\xff\xff\x00\xff \x00\x00 8\xff\x07L\x00}\x03\x05F\x08F\x11F}\x03`\xff\xff\xff\xffC\x1c\x02\xff}\x03h\x03\xff+`8\xff\x00\xff\xff\x0b\x00 \xff\xff\xff\xffp\xff\xff\x1c%\xff\x03\x05\x085\x0c-8\xff\x0c%\x00-\x06F\x01\xff\xffB\x03\xff\x0c}\x033`\x00 p\xff\x00\xff}]\xff!J\x14h!F\xff\xff L}\x03h\x1b\xff0F\x00\xffc\xff `)F0F\x00\xff^\xffC\x1c}\x04\xff\x0c}\x033`0F\x00\xffh\xff\xff\xff\x0bh[\x1b\x18\xff\x0b+\x0f\xff\x0b`\xffP\xff\x180F\x00\xff\\\xff\x04\xff\x0b\x00}\x03\x1d \xff\x07\x00\xff\x1a\xff\xffZB\xffP\xff\xff\xffBKh\x16\xffc`\x13`\x0cF\xff\xff\x0cFIh\xff\xff\xff\x1c}\x04\xff\x03\x04\xffB\x05\xff!\x1a0F\x00\xff.\xff\x010\xff\xff%`\xff\xff\xff\x0b\x00 \xff\x0b\x00 \xff\xff\x07F\x14F\x0eF!\xff\x11F\xff\xff\xff@\xff\xff\xff\xff"\xff\x00\xff+\xff%F(F\xff\xff\x00\xfft\xff\xffB\x0f\xff!F8F\xff\xff\xff\xff\x05F\x00(\xff\xff1F"F\xff\xff#dd -[3.101] handleFlashPacket(): Flash write: Address= 0x8007690, Length=2976 -[3.101] write(): <13> Tx: $OK#9a -[3.101] read(): <13> Rx: $vFlashWrite:8008230:'\xff1F8F\x00\xff\x15\xff\xff\xff5F\xff\xff8\xff\x06L\x00}\x03\x05F\x08F}\x03`\xff\xff\x1c\xffC\x1c\x02\xff}\x03h\x03\xff+`8\xff\xff\x0b\x00 pGpG8\xff\x05F\x00)E\xffQ\xff\x04<\x0c\x1f\x00+\xff\xff\xff\x18\xff\xff\xff\xff\x1fJ\x13h\x10F3\xffc`\x14`(F\xff\xff8@\xff\xff\xff\xff\xffB\x0c\xff!hb\x18\xffB\x04\xff\x1ah[hc`\x04\xffR\x18"`\x04`\xff\xff\x13FZh\x0a\xff\xffB\xff\xff\x19hX\x18\xffB\x0b\xff h\x01DX\x18\xffB\x19`\xff\xff\x10hRhZ`\x01D\x19`\xff\xff\x02\xff\x0c}\x03+`\xff\xff h!\x18\xffB\x04\xff\x11hRhb`\x04\xff\x09\x18!`\\`\xff\xff8\xff\x00\xff\xff\x0b\x00 Q\xff\x04<\x18\x1f\x00+\xff\xff\x0bX\xff\x18pG\xff\xff\x00\xff\xff\xff\x08\xff\xffFpG\xff\xff\x00\xff\xff\xff\x08\xff\xffFpG#64 -[3.101] handleFlashPacket(): Flash write: Address= 0x8008230, Length=248 -[3.101] write(): <13> Tx: $OK#9a -[3.102] read(): <13> Rx: $vFlashWrite:8008328:\x00\x00\x00\x00std_msgs/Header\x002176decaecbce78abc3b96ef049fabed\x00\x00\x00\x00geometry_msgs/Point\x004a842b65f413084dc2b10fb484ea7f17\x00\x00\x00\x00geometry_msgs/Quaternion\x00\x00\x00\x00a779879fadf0160734f906b8c19c7004\x00\x00\x00\x00geometry_msgs/Pose\x00\x00e45d45a5a1ce597b249e23fb30fc871f\x00\x00\x00\x00geometry_msgs/PoseWithCovariance\x00\x00\x00\x00c23e848cf1b7533a8d7c259073a97e6f\x00\x00\x00\x00geometry_msgs/Vector3\x00\x00\x00geometry_msgs/Twist\x009f195f881246fdfa2798d1d3eebca84a\x00\x00\x00\x00geometry_msgs/TwistWithCovariance\x00\x00\x001fe8a28e6890a4cc3ae4c3ca5c7d82e6\x00\x00\x00\x00nav_msgs/Odometry\x00\x00\x00cd5e73d190d741a2f92e81eda573aca7\x00\x00\x00\x00std_msgs/Time\x00\x00\x00cd7166c74c552c311fbcc2fe5a7bc289\x00\x00\x00\x00rosserial_msgs/TopicInfo\x00\x00\x00\x000ad51f88fc44892f8c10684077646005\x00\x00\x00\x00rosserial_msgs/Log\x00\x0011abd731c25933261cd6183bd12d6295\x00\x00\x00\x009f0e98bda65981986ddf53afa7a40e49\x00\x00\x00\x00std_msgs/String\x00992ce8a1687cec8c8bd883ec73ca41d1\x00\x00\x00\x00chatter\x00Message from device dropped: message larger than buffer.\x00\x00\x00\x00\x00\x06\x10\x16\x00\x06\x10\x16rosserial_msgs/RequestParam\x00\x00\x00\x00\x00\x00\x00\x00\x00-w\x00\x08\xffp\x00\x08\xffy\x00\x08\x00\x00\x00\x00\x00\x00\x00\x00\x05f\x00\x08Wf\x00\x08\xfff\x00\x08\xfff\x00\x08\x00\x00\x00\x00\x00\x00\x00\x00\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\x00\x00\x00\x00\x00\x00\x00\x00\xff]\x00\x08\x0b`\x00\x08\xffb\x00\x08\x09c\x00\x08\x00\x00\x00\x00\x00\x00\x00\x00u\\\x00\x08\xff\\\x00\x08i]\x00\x08\xff]\x00\x08\x00\x00\x00\x00\x00\x00\x00\x00\x01Y\x00\x087Z\x00\x08\x09\\\x00\x08%\\\x00\x08\x00\x00\x00\x00\x00\x00\x00\x00\x09W\x00\x08\xffW\x00\x08\xffX\x00\x08\xffX\x00\x08\x00\x00\x00\x00\x00\x00\x00\x00\xffT\x00\x08oU\x00\x089V\x00\x08UV\x00\x08\x00\x00\x00\x00\x00\x00\x00\x00\xffS\x00\x08\xffS\x00\x08MT\x00\x08iT\x00\x08\x00\x00\x00\x00\x00\x00\x00\x00qR\x00\x08\xffR\x00\x08\x05S\x00\x08!S\x00\x08\x00\x00\x00\x00\x00\x00\x00\x00)Q\x00\x08\xffQ\x00\x08\x01R\x00\x08\x1dR\x00\x08\x00\x00\x00\x00\x00\x00\x00\x00\xffO\x00\x08SP\x00\x08\xffP\x00\x08\xffP\x00\x08\x00\x00\x00\x00\x00\x00\x00\x00\xffN\x00\x08\x1fO\x00\x08iO\x00\x08\xffO\x00\x08\x00\x00\x00\x00\x00\x00\x00\x00UM\x00\x08\xffM\x00\x08eN\x00\x08\xffN\x00\x08\x00\x00\x00\x00\x00\x00\x00\x00\x01L\x00\x08sL\x00\x08\xffL\x00\x08\xffL\x00\x08\x00\x00\x00\x00\x00\x00\x00\x00\xffH\x00\x08\x0dJ\x00\x08\xffK\x00\x08\xffK\x00\x08\x00\x00\x00\x00\x00\x00\x00\x00\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\xff\x7f\x00\x08\x00\x00\x00\x00\x00\x00\x00\x00\x01\x02\x03\x04\x06\x07\x08\x09\x00\x00\x00\x00\x01\x02\x03\x04#f3 -[3.102] handleFlashPacket(): Flash write: Address= 0x8008328, Length=1300 -[3.102] write(): <13> Tx: $OK#9a -[3.102] read(): <13> Rx: $vFlashWrite:800883c: Tx: $OK#9a -[3.102] read(): <13> Rx: $vFlashWrite:8008844:\x1d\x02\x00\x08\xffy\x00\x08#b6 -[3.102] handleFlashPacket(): Flash write: Address= 0x8008844, Length=8 -[3.102] write(): <13> Tx: $OK#9a -[3.102] read(): <13> Rx: $vFlashWrite:800884c:\xff\x01\x00\x08#84 -[3.102] handleFlashPacket(): Flash write: Address= 0x800884c, Length=4 -[3.102] write(): <13> Tx: $OK#9a -[3.102] read(): <13> Rx: $vFlashWrite:8008850:\x10\x00\x00\x00\x01\x00\x00\x00Hello world!\x00\x00\x00\x00\x00}\x04\xff\x00\x1f\xff\x00\x08}\x04\x00\x00 \x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00#7b -[3.102] handleFlashPacket(): Flash write: Address= 0x8008850, Length=132 -[3.102] write(): <13> Tx: $OK#9a -[3.102] read(): <13> Rx: $vFlashDone#ea -[3.102] handleFlashPacket(): Writing to /tmp/ST-LINK_GDB_server_ubn41Z.srec -[3.107] spawnCubeProgrammer(): ------ Switching to STM32CubeProgrammer ----- -[3.107] file_utils_spawn(): Spawning /opt/st/stm32cubeide_1.1.0/plugins/com.st.stm32cube.ide.mcu.externaltools.cubeprogrammer.linux64_1.1.0.201910081157/tools/bin/STM32_Programmer_CLI --connect port=SWD mode=UR reset=hwRst --download /tmp/ST-LINK_GDB_server_ubn41Z.srec --verify --log /tmp/STM32CubeProgrammer_wxJIQY.log -[4.775] file_utils_spawn(): Return code 0 -[4.776] spawnCubeProgrammer(): 11:52:12:740 ------------------------------------------------------------------- -[4.776] spawnCubeProgrammer(): 11:52:12:740 STM32CubeProgrammer v2.2.0 -[4.776] spawnCubeProgrammer(): 11:52:12:740 ------------------------------------------------------------------- -[4.776] spawnCubeProgrammer(): -[4.776] spawnCubeProgrammer(): 11:52:12:740 -[4.776] spawnCubeProgrammer(): -[4.776] spawnCubeProgrammer(): 11:52:12:740 Log output file: /tmp/STM32CubeProgrammer_wxJIQY.log -[4.776] spawnCubeProgrammer(): 11:52:12:744 STLinkUSBDriver.dll loaded -[4.776] spawnCubeProgrammer(): 11:52:12:745 STLinkUSBDriver.dll loaded -[4.776] spawnCubeProgrammer(): 11:52:12:745 STLinkUSBDriver.dll loaded -[4.776] spawnCubeProgrammer(): 11:52:12:745 ST-LINK SN : 0666FF515254667867215328 -[4.776] spawnCubeProgrammer(): 11:52:12:745 ST-LINK FW : V2J35M26 -[4.776] spawnCubeProgrammer(): 11:52:12:745 Voltage : 3,27V -[4.776] spawnCubeProgrammer(): 11:52:12:751 SWD freq : 4000 KHz -[4.776] spawnCubeProgrammer(): 11:52:12:751 Connect mode: Under Reset -[4.776] spawnCubeProgrammer(): 11:52:12:751 Reset mode : Hardware reset -[4.776] spawnCubeProgrammer(): 11:52:12:814 Device ID : 0x451 -[4.776] spawnCubeProgrammer(): 11:52:12:964 Reading data... -[4.776] spawnCubeProgrammer(): 11:52:12:965 r ap 0 @0x40023C14 0x00000004 bytes -[4.776] spawnCubeProgrammer(): 11:52:12:966 Database: Config 0 is active. -[4.776] spawnCubeProgrammer(): 11:52:12:982 flash loader /opt/st/stm32cubeide_1.1.0/plugins/com.st.stm32cube.ide.mcu.externaltools.cubeprogrammer.linux64_1.1.0.201910081157/tools/bin/FlashLoader/0x451.stldr is loaded -[4.776] spawnCubeProgrammer(): 11:52:12:982 Reading data... -[4.776] spawnCubeProgrammer(): 11:52:12:982 r ap 0 @0x40023C14 0x00000004 bytes -[4.776] spawnCubeProgrammer(): 11:52:12:982 Database: Config 0 is active. -[4.776] spawnCubeProgrammer(): 11:52:12:983 Device name : STM32F76x/STM32F77x -[4.776] spawnCubeProgrammer(): 11:52:12:983 Flash size : 2 MBytes -[4.776] spawnCubeProgrammer(): 11:52:12:983 Device type : MCU -[4.776] spawnCubeProgrammer(): 11:52:12:983 Device CPU : Cortex-M7 -[4.776] spawnCubeProgrammer(): 11:52:12:983 -[4.776] spawnCubeProgrammer(): 11:52:12:983 -[4.776] spawnCubeProgrammer(): -[4.776] spawnCubeProgrammer(): 11:52:12:984 Memory Programming ... -[4.776] spawnCubeProgrammer(): 11:52:12:984 Opening and parsing file: ST-LINK_GDB_server_ubn41Z.srec -[4.776] spawnCubeProgrammer(): 11:52:12:984 File : ST-LINK_GDB_server_ubn41Z.srec -[4.776] spawnCubeProgrammer(): 11:52:12:984 Size : 35028 Bytes -[4.776] spawnCubeProgrammer(): 11:52:12:984 Address : 0x08000000 -[4.776] spawnCubeProgrammer(): 11:52:12:985 -[4.776] spawnCubeProgrammer(): -[4.776] spawnCubeProgrammer(): 11:52:12:985 Erasing Segment <0> Address <0x08000000> Size <35028>Bytes -[4.776] spawnCubeProgrammer(): 11:52:12:985 Erasing memory corresponding to segment 0: -[4.776] spawnCubeProgrammer(): 11:52:13:047 Memory erase... -[4.776] spawnCubeProgrammer(): 11:52:13:119 halt ap 0 -[4.776] spawnCubeProgrammer(): 11:52:13:119 w ap 0 reg 15 PC (0x20000000) -[4.776] spawnCubeProgrammer(): 11:52:13:120 w ap 0 reg 17 MSP (0x20000500) -[4.776] spawnCubeProgrammer(): 11:52:13:120 w ap 0 reg 16 xPSR (0x01000000) -[4.776] spawnCubeProgrammer(): 11:52:13:124 w ap 0 @0x20001100 0x00000200 bytes -[4.776] spawnCubeProgrammer(): 11:52:13:124 w ap 0 @0x20000000 0x00000004 bytes -[4.776] spawnCubeProgrammer(): 11:52:13:146 w ap 0 @0x20000004 0x00000CD4 bytes -[4.776] spawnCubeProgrammer(): 11:52:13:146 Erasing internal memory sectors [0 1] -[4.776] spawnCubeProgrammer(): 11:52:13:146 Init flashloader... -[4.776] spawnCubeProgrammer(): 11:52:13:147 halt ap 0 -[4.776] spawnCubeProgrammer(): 11:52:13:147 w ap 0 reg 0 R0 0x00000001 -[4.776] spawnCubeProgrammer(): 11:52:13:148 w ap 0 reg 1 R1 0x00000000 -[4.776] spawnCubeProgrammer(): 11:52:13:148 w ap 0 reg 2 R2 0x00000000 -[4.776] spawnCubeProgrammer(): 11:52:13:148 w ap 0 reg 3 R3 0x00000000 -[4.776] spawnCubeProgrammer(): 11:52:13:149 w ap 0 reg 4 R4 0x00000000 -[4.776] spawnCubeProgrammer(): 11:52:13:149 w ap 0 reg 5 R5 0x00000000 -[4.776] spawnCubeProgrammer(): 11:52:13:150 w ap 0 reg 6 R6 0x00000000 -[4.776] spawnCubeProgrammer(): 11:52:13:150 w ap 0 reg 7 R7 0x00000000 -[4.776] spawnCubeProgrammer(): 11:52:13:150 w ap 0 reg 8 R8 0x00000000 -[4.776] spawnCubeProgrammer(): 11:52:13:151 w ap 0 reg 9 R9 0x00000000 -[4.776] spawnCubeProgrammer(): 11:52:13:151 w ap 0 reg 10 R10 0x00000000 -[4.776] spawnCubeProgrammer(): 11:52:13:152 w ap 0 reg 11 R11 0x00000000 -[4.776] spawnCubeProgrammer(): 11:52:13:152 w ap 0 reg 12 R12 0x00000000 -[4.776] spawnCubeProgrammer(): 11:52:13:152 w ap 0 reg 13 SP 0x00000000 -[4.776] spawnCubeProgrammer(): 11:52:13:153 w ap 0 reg 14 LR 0x20000001 -[4.776] spawnCubeProgrammer(): 11:52:13:153 w ap 0 reg 15 PC 0x20000005 -[4.776] spawnCubeProgrammer(): 11:52:13:154 w ap 0 reg 16 xPSR 0x01000000 -[4.776] spawnCubeProgrammer(): 11:52:13:154 w ap 0 reg 17 MSP 0x200010D4 -[4.776] spawnCubeProgrammer(): 11:52:13:155 w ap 0 reg 18 PSP 0x00000000 -[4.776] spawnCubeProgrammer(): 11:52:13:155 run ap 0 -[4.776] spawnCubeProgrammer(): 11:52:13:156 halt ap 0 -[4.776] spawnCubeProgrammer(): 11:52:13:156 r ap 0 reg 0 R0 0x00000001 -[4.776] spawnCubeProgrammer(): 11:52:13:156 Loader sector erase... -[4.776] spawnCubeProgrammer(): 11:52:13:157 w ap 0 reg 0 R0 0x08000000 -[4.776] spawnCubeProgrammer(): 11:52:13:157 w ap 0 reg 1 R1 0x08008000 -[4.776] spawnCubeProgrammer(): 11:52:13:157 w ap 0 reg 2 R2 0x00000002 -[4.776] spawnCubeProgrammer(): 11:52:13:158 w ap 0 reg 3 R3 0x00000000 -[4.776] spawnCubeProgrammer(): 11:52:13:158 w ap 0 reg 4 R4 0x00000000 -[4.776] spawnCubeProgrammer(): 11:52:13:158 w ap 0 reg 5 R5 0x00000000 -[4.776] spawnCubeProgrammer(): 11:52:13:159 w ap 0 reg 6 R6 0x00000000 -[4.776] spawnCubeProgrammer(): 11:52:13:159 w ap 0 reg 7 R7 0x00000000 -[4.776] spawnCubeProgrammer(): 11:52:13:159 w ap 0 reg 8 R8 0x00000000 -[4.776] spawnCubeProgrammer(): 11:52:13:159 w ap 0 reg 9 R9 0x00000000 -[4.776] spawnCubeProgrammer(): 11:52:13:160 w ap 0 reg 10 R10 0x00000000 -[4.776] spawnCubeProgrammer(): 11:52:13:160 w ap 0 reg 11 R11 0x00000000 -[4.776] spawnCubeProgrammer(): 11:52:13:161 w ap 0 reg 12 R12 0x00000000 -[4.776] spawnCubeProgrammer(): 11:52:13:161 w ap 0 reg 13 SP 0x00000000 -[4.776] spawnCubeProgrammer(): 11:52:13:161 w ap 0 reg 14 LR 0x20000001 -[4.776] spawnCubeProgrammer(): 11:52:13:162 w ap 0 reg 15 PC 0x20000281 -[4.776] spawnCubeProgrammer(): 11:52:13:162 w ap 0 reg 16 xPSR 0x01000000 -[4.776] spawnCubeProgrammer(): 11:52:13:162 w ap 0 reg 17 MSP 0x200010D4 -[4.776] spawnCubeProgrammer(): 11:52:13:163 w ap 0 reg 18 PSP 0x00000000 -[4.776] spawnCubeProgrammer(): 11:52:13:163 run ap 0 -[4.776] spawnCubeProgrammer(): 11:52:13:547 halt ap 0 -[4.776] spawnCubeProgrammer(): 11:52:13:547 r ap 0 reg 0 R0 0x00000001 -[4.776] spawnCubeProgrammer(): 11:52:13:547 erase: 0562ms -[4.776] spawnCubeProgrammer(): 11:52:13:560 Download in Progress: -[4.776] spawnCubeProgrammer(): 11:52:13:560 Size : 35040 Bytes -[4.776] spawnCubeProgrammer(): 11:52:13:560 Address : 0x08000000 -[4.776] spawnCubeProgrammer(): 11:52:13:560 -[4.776] spawnCubeProgrammer(): -[4.776] spawnCubeProgrammer(): 11:52:13:618 Buffer program... -[4.776] spawnCubeProgrammer(): 11:52:13:688 halt ap 0 -[4.776] spawnCubeProgrammer(): 11:52:13:688 w ap 0 reg 15 PC (0x20000000) -[4.776] spawnCubeProgrammer(): 11:52:13:689 w ap 0 reg 17 MSP (0x20000500) -[4.776] spawnCubeProgrammer(): 11:52:13:689 w ap 0 reg 16 xPSR (0x01000000) -[4.776] spawnCubeProgrammer(): 11:52:13:693 w ap 0 @0x20001100 0x00000200 bytes -[4.776] spawnCubeProgrammer(): 11:52:13:693 w ap 0 @0x20000000 0x00000004 bytes -[4.776] spawnCubeProgrammer(): 11:52:13:716 w ap 0 @0x20000004 0x00000CD4 bytes -[4.776] spawnCubeProgrammer(): 11:52:13:716 Loader write range... -[4.776] spawnCubeProgrammer(): 11:52:13:835 w ap 0 @0x20001100 0x00004480 bytes -[4.776] spawnCubeProgrammer(): 11:52:13:835 W B1 in RAM @0x20001100 size 0x00004480 : 0119ms -[4.776] spawnCubeProgrammer(): 11:52:13:835 Init flashloader... -[4.776] spawnCubeProgrammer(): 11:52:13:836 halt ap 0 -[4.776] spawnCubeProgrammer(): 11:52:13:836 w ap 0 reg 0 R0 0x00000001 -[4.776] spawnCubeProgrammer(): 11:52:13:837 w ap 0 reg 1 R1 0x00000000 -[4.776] spawnCubeProgrammer(): 11:52:13:838 w ap 0 reg 2 R2 0x00000000 -[4.776] spawnCubeProgrammer(): 11:52:13:838 w ap 0 reg 3 R3 0x00000000 -[4.776] spawnCubeProgrammer(): 11:52:13:839 w ap 0 reg 4 R4 0x00000000 -[4.776] spawnCubeProgrammer(): 11:52:13:839 w ap 0 reg 5 R5 0x00000000 -[4.776] spawnCubeProgrammer(): 11:52:13:840 w ap 0 reg 6 R6 0x00000000 -[4.776] spawnCubeProgrammer(): 11:52:13:840 w ap 0 reg 7 R7 0x00000000 -[4.776] spawnCubeProgrammer(): 11:52:13:841 w ap 0 reg 8 R8 0x00000000 -[4.776] spawnCubeProgrammer(): 11:52:13:842 w ap 0 reg 9 R9 0x00000000 -[4.776] spawnCubeProgrammer(): 11:52:13:842 w ap 0 reg 10 R10 0x00000000 -[4.776] spawnCubeProgrammer(): 11:52:13:842 w ap 0 reg 11 R11 0x00000000 -[4.776] spawnCubeProgrammer(): 11:52:13:843 w ap 0 reg 12 R12 0x00000000 -[4.776] spawnCubeProgrammer(): 11:52:13:843 w ap 0 reg 13 SP 0x00000000 -[4.776] spawnCubeProgrammer(): 11:52:13:844 w ap 0 reg 14 LR 0x20000001 -[4.776] spawnCubeProgrammer(): 11:52:13:844 w ap 0 reg 15 PC 0x20000005 -[4.776] spawnCubeProgrammer(): 11:52:13:845 w ap 0 reg 16 xPSR 0x01000000 -[4.776] spawnCubeProgrammer(): 11:52:13:845 w ap 0 reg 17 MSP 0x200010D4 -[4.777] spawnCubeProgrammer(): 11:52:13:846 w ap 0 reg 18 PSP 0x00000000 -[4.777] spawnCubeProgrammer(): 11:52:13:846 run ap 0 -[4.777] spawnCubeProgrammer(): 11:52:13:846 halt ap 0 -[4.777] spawnCubeProgrammer(): 11:52:13:847 r ap 0 reg 0 R0 0x00000001 -[4.777] spawnCubeProgrammer(): 11:52:13:847 w ap 0 reg 0 R0 0x08000000 -[4.777] spawnCubeProgrammer(): 11:52:13:848 w ap 0 reg 1 R1 0x00004480 -[4.777] spawnCubeProgrammer(): 11:52:13:848 w ap 0 reg 2 R2 0x20001100 -[4.777] spawnCubeProgrammer(): 11:52:13:849 w ap 0 reg 3 R3 0x00000002 -[4.777] spawnCubeProgrammer(): 11:52:13:849 w ap 0 reg 4 R4 0x00000000 -[4.777] spawnCubeProgrammer(): 11:52:13:850 w ap 0 reg 5 R5 0x00000000 -[4.777] spawnCubeProgrammer(): 11:52:13:851 w ap 0 reg 6 R6 0x00000000 -[4.777] spawnCubeProgrammer(): 11:52:13:851 w ap 0 reg 7 R7 0x00000000 -[4.777] spawnCubeProgrammer(): 11:52:13:852 w ap 0 reg 8 R8 0x00000000 -[4.777] spawnCubeProgrammer(): 11:52:13:853 w ap 0 reg 9 R9 0x00000000 -[4.777] spawnCubeProgrammer(): 11:52:13:853 w ap 0 reg 10 R10 0x00000000 -[4.777] spawnCubeProgrammer(): 11:52:13:854 w ap 0 reg 11 R11 0x00000000 -[4.777] spawnCubeProgrammer(): 11:52:13:855 w ap 0 reg 12 R12 0x00000000 -[4.777] spawnCubeProgrammer(): 11:52:13:855 w ap 0 reg 13 SP 0x00000000 -[4.777] spawnCubeProgrammer(): 11:52:13:856 w ap 0 reg 14 LR 0x20000001 -[4.777] spawnCubeProgrammer(): 11:52:13:857 w ap 0 reg 15 PC 0x20000051 -[4.777] spawnCubeProgrammer(): 11:52:13:857 w ap 0 reg 16 xPSR 0x01000000 -[4.777] spawnCubeProgrammer(): 11:52:13:858 w ap 0 reg 17 MSP 0x200010D4 -[4.777] spawnCubeProgrammer(): 11:52:13:858 w ap 0 reg 18 PSP 0x00000000 -[4.777] spawnCubeProgrammer(): 11:52:13:858 run ap 0 -[4.777] spawnCubeProgrammer(): 11:52:14:000 w ap 0 @0x20005580 0x00004460 bytes -[4.777] spawnCubeProgrammer(): 11:52:14:000 W B2 in RAM @0x20040700 size 0x00004460: 0165ms -[4.777] spawnCubeProgrammer(): 11:52:14:000 r ap 0 reg 0 R0 0x00000001 -[4.777] spawnCubeProgrammer(): 11:52:14:001 Wait W B1 in Flash @0x08000000 size 0x00004480: 0001ms -[4.777] spawnCubeProgrammer(): 11:52:14:001 w ap 0 reg 0 R0 0x08004480 -[4.777] spawnCubeProgrammer(): 11:52:14:001 w ap 0 reg 1 R1 0x00004460 -[4.777] spawnCubeProgrammer(): 11:52:14:002 w ap 0 reg 2 R2 0x20005580 -[4.777] spawnCubeProgrammer(): 11:52:14:002 w ap 0 reg 3 R3 0x00000002 -[4.777] spawnCubeProgrammer(): 11:52:14:002 w ap 0 reg 4 R4 0x00000000 -[4.777] spawnCubeProgrammer(): 11:52:14:003 w ap 0 reg 5 R5 0x00000000 -[4.777] spawnCubeProgrammer(): 11:52:14:003 w ap 0 reg 6 R6 0x00000000 -[4.777] spawnCubeProgrammer(): 11:52:14:004 w ap 0 reg 7 R7 0x00000000 -[4.777] spawnCubeProgrammer(): 11:52:14:004 w ap 0 reg 8 R8 0x00000000 -[4.777] spawnCubeProgrammer(): 11:52:14:004 w ap 0 reg 9 R9 0x00000000 -[4.777] spawnCubeProgrammer(): 11:52:14:005 w ap 0 reg 10 R10 0x00000000 -[4.777] spawnCubeProgrammer(): 11:52:14:005 w ap 0 reg 11 R11 0x00000000 -[4.777] spawnCubeProgrammer(): 11:52:14:005 w ap 0 reg 12 R12 0x00000000 -[4.777] spawnCubeProgrammer(): 11:52:14:006 w ap 0 reg 13 SP 0x00000000 -[4.777] spawnCubeProgrammer(): 11:52:14:006 w ap 0 reg 14 LR 0x20000001 -[4.777] spawnCubeProgrammer(): 11:52:14:007 w ap 0 reg 15 PC 0x20000051 -[4.777] spawnCubeProgrammer(): 11:52:14:007 w ap 0 reg 16 xPSR 0x01000000 -[4.777] spawnCubeProgrammer(): 11:52:14:007 w ap 0 reg 17 MSP 0x200010D4 -[4.777] spawnCubeProgrammer(): 11:52:14:008 w ap 0 reg 18 PSP 0x00000000 -[4.777] spawnCubeProgrammer(): 11:52:14:008 run ap 0 -[4.777] spawnCubeProgrammer(): 11:52:14:134 r ap 0 reg 0 R0 0x00000001 -[4.777] spawnCubeProgrammer(): 11:52:14:134 Write elapsed time: 0418ms -[4.777] spawnCubeProgrammer(): 11:52:14:134 Segment[0] downloaded successfully -[4.777] spawnCubeProgrammer(): 11:52:14:134 -[4.777] spawnCubeProgrammer(): -[4.777] spawnCubeProgrammer(): 11:52:14:134 File download complete -[4.777] spawnCubeProgrammer(): 11:52:14:134 Time elapsed during download operation: 00:00:01.150 -[4.777] spawnCubeProgrammer(): 11:52:14:134 -[4.777] spawnCubeProgrammer(): -[4.777] spawnCubeProgrammer(): 11:52:14:134 -[4.777] spawnCubeProgrammer(): Verifying ... -[4.777] spawnCubeProgrammer(): 11:52:14:134 -[4.777] spawnCubeProgrammer(): -[4.777] spawnCubeProgrammer(): 11:52:14:134 Read progress: -[4.777] spawnCubeProgrammer(): 11:52:14:134 Reading data... -[4.777] spawnCubeProgrammer(): 11:52:14:153 r ap 0 @0x08000000 0x00000400 bytes -[4.777] spawnCubeProgrammer(): 11:52:14:153 Reading data... -[4.777] spawnCubeProgrammer(): 11:52:14:160 r ap 0 @0x08000400 0x00000400 bytes -[4.777] spawnCubeProgrammer(): 11:52:14:160 Reading data... -[4.777] spawnCubeProgrammer(): 11:52:14:167 r ap 0 @0x08000800 0x00000400 bytes -[4.777] spawnCubeProgrammer(): 11:52:14:167 Reading data... -[4.777] spawnCubeProgrammer(): 11:52:14:174 r ap 0 @0x08000C00 0x00000400 bytes -[4.777] spawnCubeProgrammer(): 11:52:14:174 Reading data... -[4.777] spawnCubeProgrammer(): 11:52:14:181 r ap 0 @0x08001000 0x00000400 bytes -[4.777] spawnCubeProgrammer(): 11:52:14:181 Reading data... -[4.777] spawnCubeProgrammer(): 11:52:14:188 r ap 0 @0x08001400 0x00000400 bytes -[4.777] spawnCubeProgrammer(): 11:52:14:188 Reading data... -[4.777] spawnCubeProgrammer(): 11:52:14:195 r ap 0 @0x08001800 0x00000400 bytes -[4.777] spawnCubeProgrammer(): 11:52:14:195 Reading data... -[4.777] spawnCubeProgrammer(): 11:52:14:202 r ap 0 @0x08001C00 0x00000400 bytes -[4.777] spawnCubeProgrammer(): 11:52:14:202 Reading data... -[4.777] spawnCubeProgrammer(): 11:52:14:209 r ap 0 @0x08002000 0x00000400 bytes -[4.777] spawnCubeProgrammer(): 11:52:14:210 Reading data... -[4.777] spawnCubeProgrammer(): 11:52:14:216 r ap 0 @0x08002400 0x00000400 bytes -[4.777] spawnCubeProgrammer(): 11:52:14:217 Reading data... -[4.777] spawnCubeProgrammer(): 11:52:14:223 r ap 0 @0x08002800 0x00000400 bytes -[4.777] spawnCubeProgrammer(): 11:52:14:223 Reading data... -[4.777] spawnCubeProgrammer(): 11:52:14:230 r ap 0 @0x08002C00 0x00000400 bytes -[4.777] spawnCubeProgrammer(): 11:52:14:230 Reading data... -[4.777] spawnCubeProgrammer(): 11:52:14:237 r ap 0 @0x08003000 0x00000400 bytes -[4.777] spawnCubeProgrammer(): 11:52:14:237 Reading data... -[4.777] spawnCubeProgrammer(): 11:52:14:244 r ap 0 @0x08003400 0x00000400 bytes -[4.777] spawnCubeProgrammer(): 11:52:14:244 Reading data... -[4.777] spawnCubeProgrammer(): 11:52:14:251 r ap 0 @0x08003800 0x00000400 bytes -[4.777] spawnCubeProgrammer(): 11:52:14:251 Reading data... -[4.777] spawnCubeProgrammer(): 11:52:14:259 r ap 0 @0x08003C00 0x00000400 bytes -[4.777] spawnCubeProgrammer(): 11:52:14:259 Reading data... -[4.777] spawnCubeProgrammer(): 11:52:14:266 r ap 0 @0x08004000 0x00000400 bytes -[4.777] spawnCubeProgrammer(): 11:52:14:266 Reading data... -[4.777] spawnCubeProgrammer(): 11:52:14:273 r ap 0 @0x08004400 0x00000400 bytes -[4.777] spawnCubeProgrammer(): 11:52:14:273 Reading data... -[4.777] spawnCubeProgrammer(): 11:52:14:280 r ap 0 @0x08004800 0x00000400 bytes -[4.777] spawnCubeProgrammer(): 11:52:14:280 Reading data... -[4.777] spawnCubeProgrammer(): 11:52:14:287 r ap 0 @0x08004C00 0x00000400 bytes -[4.777] spawnCubeProgrammer(): 11:52:14:287 Reading data... -[4.777] spawnCubeProgrammer(): 11:52:14:294 r ap 0 @0x08005000 0x00000400 bytes -[4.777] spawnCubeProgrammer(): 11:52:14:294 Reading data... -[4.777] spawnCubeProgrammer(): 11:52:14:301 r ap 0 @0x08005400 0x00000400 bytes -[4.777] spawnCubeProgrammer(): 11:52:14:301 Reading data... -[4.777] spawnCubeProgrammer(): 11:52:14:308 r ap 0 @0x08005800 0x00000400 bytes -[4.777] spawnCubeProgrammer(): 11:52:14:308 Reading data... -[4.777] spawnCubeProgrammer(): 11:52:14:315 r ap 0 @0x08005C00 0x00000400 bytes -[4.777] spawnCubeProgrammer(): 11:52:14:316 Reading data... -[4.777] spawnCubeProgrammer(): 11:52:14:322 r ap 0 @0x08006000 0x00000400 bytes -[4.777] spawnCubeProgrammer(): 11:52:14:323 Reading data... -[4.777] spawnCubeProgrammer(): 11:52:14:329 r ap 0 @0x08006400 0x00000400 bytes -[4.777] spawnCubeProgrammer(): 11:52:14:330 Reading data... -[4.777] spawnCubeProgrammer(): 11:52:14:337 r ap 0 @0x08006800 0x00000400 bytes -[4.777] spawnCubeProgrammer(): 11:52:14:337 Reading data... -[4.777] spawnCubeProgrammer(): 11:52:14:344 r ap 0 @0x08006C00 0x00000400 bytes -[4.777] spawnCubeProgrammer(): 11:52:14:344 Reading data... -[4.777] spawnCubeProgrammer(): 11:52:14:351 r ap 0 @0x08007000 0x00000400 bytes -[4.777] spawnCubeProgrammer(): 11:52:14:351 Reading data... -[4.777] spawnCubeProgrammer(): 11:52:14:358 r ap 0 @0x08007400 0x00000400 bytes -[4.777] spawnCubeProgrammer(): 11:52:14:358 Reading data... -[4.777] spawnCubeProgrammer(): 11:52:14:365 r ap 0 @0x08007800 0x00000400 bytes -[4.777] spawnCubeProgrammer(): 11:52:14:365 Reading data... -[4.777] spawnCubeProgrammer(): 11:52:14:372 r ap 0 @0x08007C00 0x00000400 bytes -[4.777] spawnCubeProgrammer(): 11:52:14:372 Reading data... -[4.777] spawnCubeProgrammer(): 11:52:14:379 r ap 0 @0x08008000 0x00000400 bytes -[4.777] spawnCubeProgrammer(): 11:52:14:380 Reading data... -[4.777] spawnCubeProgrammer(): 11:52:14:386 r ap 0 @0x08008400 0x00000400 bytes -[4.777] spawnCubeProgrammer(): 11:52:14:386 Reading data... -[4.777] spawnCubeProgrammer(): 11:52:14:388 r ap 0 @0x08008800 0x000000E0 bytes -[4.777] spawnCubeProgrammer(): 11:52:14:388 -[4.777] spawnCubeProgrammer(): -[4.777] spawnCubeProgrammer(): 11:52:14:388 Download verified successfully -[4.778] spawnCubeProgrammer(): 11:52:14:388 -[4.778] spawnCubeProgrammer(): -[4.778] spawnCubeProgrammer(): ------ Switching context ----- -[4.788] Device_Initialise(): Target connection mode: Default -[4.797] reset_hw_wtchpt_module(): Hardware watchpoint supported by the target -[4.800] Device_Initialise(): COM frequency = 4000 kHz -[4.800] Device_Initialise(): ST-LINK Firmware version : V2J35M26 -[4.800] Device_Initialise(): Device ID: 0x451 -[4.800] Device_Initialise(): PC: 0x8007fa4 -[4.801] Device_Initialise(): ST-LINK detects target voltage = 3.27 V -[4.801] Device_Initialise(): ST-LINK device status: HALT_MODE -[4.801] initServerContext(): ST-LINK device initialization OK -[4.802] write(): <13> Tx: $OK#9a -[4.802] read(): <13> Rx: $Pf=a47f0008#ed -[4.802] write(): <13> Tx: $OK#9a -[4.802] read(): <13> Rx: $m8008014,2#30 -[4.802] handlePacket(): Reading 0x2 bytes of memory from addr 0x8008014 -[4.802] write(): <13> Tx: $08b5#ff -[4.802] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[4.803] write(): <13> Tx: $l#8b -[4.803] read(): <13> Rx: $m8007fa4,4#97 -[4.803] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007fa4 -[4.803] write(): <13> Tx: $dff834d0#63 -[4.803] read(): <13> Rx: $m8007fa4,2#95 -[4.803] handlePacket(): Reading 0x2 bytes of memory from addr 0x8007fa4 -[4.803] write(): <13> Tx: $dff8#68 -[4.803] read(): <13> Rx: $m8007fa6,2#97 -[4.803] handlePacket(): Reading 0x2 bytes of memory from addr 0x8007fa6 -[4.803] write(): <13> Tx: $34d0#fb -[4.804] read(): <13> Rx: $m200004ec,4#bb -[4.804] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004ec -[4.804] write(): <13> Tx: $1c14411a#f0 -[4.804] read(): <13> Rx: $m200004f0,4#89 -[4.804] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[4.804] write(): <13> Tx: $b1f5802f#2e -[4.805] read(): <13> Rx: $T1#85 -[4.805] write(): <13> Tx: $OK#9a -[4.805] read(): <13> Rx: $T1#85 -[4.805] write(): <13> Tx: $OK#9a -[4.813] read(): <13> Rx: $me000ed14,4#f0 -[4.813] handlePacket(): Reading 0x4 bytes of memory from addr 0xe000ed14 -[4.813] write(): <13> Tx: $00020400#86 -[4.813] read(): <13> Rx: $Xe000ed14,0:#11 -[4.813] write(): <13> Tx: $OK#9a -[4.813] read(): <13> Rx: $Xe000ed14,4:\x10\x02\x04\x00#2b -[4.813] write(): <13> Tx: $OK#9a -[4.814] read(): <13> Rx: $g#67 -[4.820] write(): <13> Tx: $0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000820ffffffffa47f000800000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff00000000000000000000000000000000000000000000082000000000#9f -[4.820] read(): <13> Rx: $m8007fa4,4#97 -[4.820] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007fa4 -[4.821] write(): <13> Tx: $dff834d0#63 -[4.821] read(): <13> Rx: $m8007fa4,2#95 -[4.821] handlePacket(): Reading 0x2 bytes of memory from addr 0x8007fa4 -[4.821] write(): <13> Tx: $dff8#68 -[4.821] read(): <13> Rx: $m8007fa6,2#97 -[4.821] handlePacket(): Reading 0x2 bytes of memory from addr 0x8007fa6 -[4.821] write(): <13> Tx: $34d0#fb -[4.821] read(): <13> Rx: $mfffffffe,1#f9 -[4.821] handlePacket(): Reading 0x1 bytes of memory from addr 0xfffffffe -[4.822] write(): <13> Tx: $E31#a9 -[4.822] read(): <13> Rx: $mfffffffe,1#f9 -[4.822] handlePacket(): Reading 0x1 bytes of memory from addr 0xfffffffe -[4.823] write(): <13> Tx: $E31#a9 -[4.823] read(): <13> Rx: $me000edfc,4#54 -[4.823] handlePacket(): Reading 0x4 bytes of memory from addr 0xe000edfc -[4.823] write(): <13> Tx: $00000001#81 -[4.823] read(): <13> Rx: $Xe000edfc,4:\xff\x07\x00\x01#71 -[4.824] write(): <13> Tx: $OK#9a -[4.824] read(): <13> Rx: $g#67 -[4.830] write(): <13> Tx: $0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000820ffffffffa47f000800000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff00000000000000000000000000000000000000000000082000000000#9f -[4.830] read(): <13> Rx: $m8007fa4,4#97 -[4.830] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007fa4 -[4.831] write(): <13> Tx: $dff834d0#63 -[4.831] read(): <13> Rx: $m8007fa4,2#95 -[4.831] handlePacket(): Reading 0x2 bytes of memory from addr 0x8007fa4 -[4.831] write(): <13> Tx: $dff8#68 -[4.831] read(): <13> Rx: $m8007fa6,2#97 -[4.831] handlePacket(): Reading 0x2 bytes of memory from addr 0x8007fa6 -[4.831] write(): <13> Tx: $34d0#fb -[4.832] read(): <13> Rx: $m8006700,40#62 -[4.832] handlePacket(): Reading 0x40 bytes of memory from addr 0x8006700 -[4.832] write(): <13> Tx: $5df8047b704700bf0886000880b588b000aff9f719ff00f049f800f0bdfa00f095fa00f0cdf800f029f900f085f900f0fbf900f057fa1748fbf786fe1648fdf7#a4 -[4.832] read(): <13> Rx: $m8006712,2#33 -[4.832] handlePacket(): Reading 0x2 bytes of memory from addr 0x8006712 -[4.833] write(): <13> Tx: $f9f7#3c -[4.834] read(): <13> Rx: $Z1,8006712,2#7d -[4.834] write(): <13> Tx: $OK#9a -[4.834] read(): <13> Rx: $vCont;c#a8 -[4.835] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[4.840] handle_vCont_c(): handle_vCont_c, continue thread -[4.840] write(): <13> Tx: $OK#9a -[4.850] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[4.850] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[4.856] Device_GetHaltReason(): NVIC_DFSR_REG = 0x0000000B -[4.857] write(): <13> Tx: %Stop:T05hwbreak:;thread:1;core:0;#7e -[4.882] read(): <13> Rx: $vStopped#55 -[4.882] write(): <13> Tx: $OK#9a -[4.882] read(): <13> Rx: $g#67 -[4.889] write(): <13> Tx: $f40400200000000000000000f4040020000000000000000000000000d8ff07200000000000000000000000000000000000000000d8ff0720db7f00081267000800000061000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff0000000000000000000000000000000000000000d8ff072000000000#bd -[4.889] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[4.889] write(): <13> Tx: $l#8b -[4.889] read(): <13> Rx: $z1,8006712,2#9d -[4.889] write(): <13> Tx: $OK#9a -[4.889] read(): <13> Rx: $m8006712,4#35 -[4.889] handlePacket(): Reading 0x4 bytes of memory from addr 0x8006712 -[4.890] write(): <13> Tx: $f9f719ff#72 -[5.420] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[5.420] write(): <13> Tx: $l#8b -[5.420] read(): <13> Rx: $m200004f0,4#89 -[5.420] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[5.420] write(): <13> Tx: $00000000#80 -[5.421] read(): <13> Rx: $m200004f0,4#89 -[5.421] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[5.421] write(): <13> Tx: $00000000#80 -[5.487] read(): <13> Rx: $m2007ffc0,40#25 -[5.487] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ffc0 -[5.488] write(): <13> Tx: $97ff403fe8030000ffff000001000000d8ff0720020000000100000044880008e8ff0720c9790008000000006d800008000000000000000000000000db7f0008#a1 -[5.488] read(): <13> Rx: $m8007fda,4#c7 -[5.488] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007fda -[5.488] write(): <13> Tx: $70470000#92 -[5.488] read(): <13> Rx: $m8007f80,40#9a -[5.488] handlePacket(): Reading 0x40 bytes of memory from addr 0x8007f80 -[5.489] write(): <13> Tx: $1a68bb681a447b681a603b68fa681a6000bf1437bd465df8047b7047834b040000ca9a3bdff834d0002103e00c4b5b58435004310b480c4b42189a42f6d30b4a#cf -[5.489] read(): <13> Rx: $m8007fdc,4#c9 -[5.489] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007fdc -[5.489] write(): <13> Tx: $00000820#8a -[5.546] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[5.546] write(): <13> Tx: $l#8b -[5.586] read(): <13> Rx: $m2007ffc0,40#25 -[5.586] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ffc0 -[5.587] write(): <13> Tx: $97ff403fe8030000ffff000001000000d8ff0720020000000100000044880008e8ff0720c9790008000000006d800008000000000000000000000000db7f0008#a1 -[5.587] read(): <13> Rx: $m2007fff0,4#f8 -[5.587] handlePacket(): Reading 0x4 bytes of memory from addr 0x2007fff0 -[5.587] write(): <13> Tx: $00000000#80 -[5.587] read(): <13> Rx: $m8008844,8#41 -[5.587] handlePacket(): Reading 0x8 bytes of memory from addr 0x8008844 -[5.588] write(): <13> Tx: $1d020008bb790008#bb -[6.743] read(): <13> Rx: $vCont;c#a8 -[6.743] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[6.749] handle_vCont_c(): handle_vCont_c, continue thread -[6.749] write(): <13> Tx: $OK#9a -[6.759] Device_GetStatus(): ST-LINK device status: RUN_MODE -[6.764] read(): <13> Rx: $m200004f0,4#89 -[6.764] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[6.765] write(): <13> Tx: $00000000#80 -[6.785] read(): <13> Rx: $T1#85 -[6.785] write(): <13> Tx: $OK#9a -[6.785] read(): <13> Rx: $T1#85 -[6.785] write(): <13> Tx: $OK#9a -[6.967] read(): <13> Rx: $m200004f0,4#89 -[6.967] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[6.967] write(): <13> Tx: $00000000#80 -[7.169] read(): <13> Rx: $m200004f0,4#89 -[7.169] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[7.170] write(): <13> Tx: $00000000#80 -[7.371] read(): <13> Rx: $m200004f0,4#89 -[7.372] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[7.372] write(): <13> Tx: $00000000#80 -[7.574] read(): <13> Rx: $m200004f0,4#89 -[7.575] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[7.575] write(): <13> Tx: $00000000#80 -[7.777] read(): <13> Rx: $m200004f0,4#89 -[7.777] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[7.778] write(): <13> Tx: $00000000#80 -[7.980] read(): <13> Rx: $m200004f0,4#89 -[7.980] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[7.981] write(): <13> Tx: $00000000#80 -[8.183] read(): <13> Rx: $m200004f0,4#89 -[8.184] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[8.185] write(): <13> Tx: $00000000#80 -[8.387] read(): <13> Rx: $m200004f0,4#89 -[8.387] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[8.388] write(): <13> Tx: $00000000#80 -[8.590] read(): <13> Rx: $m200004f0,4#89 -[8.590] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[8.591] write(): <13> Tx: $00000000#80 -[8.793] read(): <13> Rx: $m200004f0,4#89 -[8.793] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[8.794] write(): <13> Tx: $00000000#80 -[8.875] read(): <13> Rx: $vCont?#49 -[8.875] write(): <13> Tx: $vCont;c;s;t#05 -[8.875] read(): <13> Rx: $vCont;t:1#24 -[8.875] handle_vCont_t(): handle_vCont_t, Halt thread -[8.876] write(): <13> Tx: $OK#9a -[8.887] Device_GetStatus(): ST-LINK device status: HALT_MODE -[8.887] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[8.887] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[8.893] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[8.893] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[8.918] read(): <13> Rx: $vStopped#55 -[8.919] write(): <13> Tx: $OK#9a -[8.919] read(): <13> Rx: $g#67 -[8.926] write(): <13> Tx: $2f0800007d000000e90300005a000000000000000000000000000000c0ff07200000000000000000000000000000000000000000c0ff072031060008ec05000800000021000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000083c0ca3d00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000c0ff072000000000#fe -[8.926] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[8.926] write(): <13> Tx: $l#8b -[8.927] read(): <13> Rx: $m80005ec,4#92 -[8.927] handlePacket(): Reading 0x4 bytes of memory from addr 0x80005ec -[8.928] write(): <13> Tx: $80b400af#25 -[8.943] read(): <13> Rx: $m200004f0,4#89 -[8.943] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[8.943] write(): <13> Tx: $00000000#80 -[8.957] read(): <13> Rx: $m8000630,4#2e -[8.957] handlePacket(): Reading 0x4 bytes of memory from addr 0x8000630 -[8.957] write(): <13> Tx: $0246bb68#fe -[8.957] read(): <13> Rx: $m2007ffc0,40#25 -[8.957] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ffc0 -[8.958] write(): <13> Tx: $c8ff0720e8030000d5070000e9030000d8ff072091670008010000002c860008f0ff07207d000000f404002000000000b08600080800002000000000db7f0008#b0 -[8.958] read(): <13> Rx: $m8006790,4#3b -[8.958] handlePacket(): Reading 0x4 bytes of memory from addr 0x8006790 -[8.958] write(): <13> Tx: $eee700bf#8e -[8.959] read(): <13> Rx: $m8007fda,4#c7 -[8.959] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007fda -[8.959] write(): <13> Tx: $70470000#92 -[8.959] read(): <13> Rx: $m8007f80,40#9a -[8.959] handlePacket(): Reading 0x40 bytes of memory from addr 0x8007f80 -[8.960] write(): <13> Tx: $1a68bb681a447b681a603b68fa681a6000bf1437bd465df8047b7047834b040000ca9a3bdff834d0002103e00c4b5b58435004310b480c4b42189a42f6d30b4a#cf -[8.960] read(): <13> Rx: $m8007fdc,4#c9 -[8.960] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007fdc -[8.960] write(): <13> Tx: $00000820#8a -[9.103] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[9.103] write(): <13> Tx: $l#8b -[9.103] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[9.103] write(): <13> Tx: $l#8b -[10.782] read(): <13> Rx: $vCont;c#a8 -[10.782] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[10.788] handle_vCont_c(): handle_vCont_c, continue thread -[10.788] write(): <13> Tx: $OK#9a -[10.798] Device_GetStatus(): ST-LINK device status: RUN_MODE -[10.825] read(): <13> Rx: $m200004f0,4#89 -[10.826] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[10.826] write(): <13> Tx: $00000000#80 -[10.834] read(): <13> Rx: $T1#85 -[10.835] write(): <13> Tx: $OK#9a -[10.835] read(): <13> Rx: $T1#85 -[10.835] write(): <13> Tx: $OK#9a -[11.028] read(): <13> Rx: $m200004f0,4#89 -[11.028] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[11.028] write(): <13> Tx: $00000000#80 -[11.264] read(): <13> Rx: $m200004f0,4#89 -[11.264] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[11.264] write(): <13> Tx: $00000000#80 -[11.466] read(): <13> Rx: $m200004f0,4#89 -[11.466] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[11.466] write(): <13> Tx: $00000000#80 -[11.668] read(): <13> Rx: $m200004f0,4#89 -[11.668] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[11.669] write(): <13> Tx: $00000000#80 -[11.870] read(): <13> Rx: $m200004f0,4#89 -[11.871] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[11.871] write(): <13> Tx: $00000000#80 -[12.073] read(): <13> Rx: $m200004f0,4#89 -[12.074] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[12.074] write(): <13> Tx: $00000000#80 -[12.074] read(): <13> Rx: $vCont;t:1#24 -[12.075] handle_vCont_t(): handle_vCont_t, Halt thread -[12.075] write(): <13> Tx: $OK#9a -[12.086] Device_GetStatus(): ST-LINK device status: HALT_MODE -[12.086] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[12.086] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[12.092] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[12.093] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[12.122] read(): <13> Rx: $vStopped#55 -[12.122] write(): <13> Tx: $OK#9a -[12.123] read(): <13> Rx: $g#67 -[12.129] write(): <13> Tx: $300d000003000000e9030000bc0b0020000000000000000000000000bcff07200000000000000000000000000000000000000000bcff072031060008f2050008000000210000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cdcccc3d00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000bcff072000000000#17 -[12.130] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[12.130] write(): <13> Tx: $l#8b -[12.131] read(): <13> Rx: $m80005f2,4#62 -[12.131] handlePacket(): Reading 0x4 bytes of memory from addr 0x80005f2 -[12.132] write(): <13> Tx: $1b681846#d4 -[12.146] read(): <13> Rx: $m200004f0,4#89 -[12.146] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[12.147] write(): <13> Tx: $00000000#80 -[12.176] read(): <13> Rx: $m8000630,4#2e -[12.176] handlePacket(): Reading 0x4 bytes of memory from addr 0x8000630 -[12.176] write(): <13> Tx: $0246bb68#fe -[12.176] read(): <13> Rx: $m2007ff80,40#fa -[12.176] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff80 -[12.177] write(): <13> Tx: $88ff07200b28000890ff072090ff0720bcff072098ff0720c0ff0720f9ffffff2f0d0000030000002f0d0000be0b0000000000003106000834060008c0ff0720#93 -[12.177] read(): <13> Rx: $m2007ffc0,40#25 -[12.177] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ffc0 -[12.178] write(): <13> Tx: $c8ff0720e8030000be0b0000e9030000d8ff072091670008010000002c860008f0ff07207d000000f404002000000000b08600080800002000000000db7f0008#09 -[12.178] read(): <13> Rx: $m8006790,4#3b -[12.178] handlePacket(): Reading 0x4 bytes of memory from addr 0x8006790 -[12.179] write(): <13> Tx: $eee700bf#8e -[12.179] read(): <13> Rx: $m8007fda,4#c7 -[12.179] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007fda -[12.179] write(): <13> Tx: $70470000#92 -[12.179] read(): <13> Rx: $m8007f80,40#9a -[12.179] handlePacket(): Reading 0x40 bytes of memory from addr 0x8007f80 -[12.180] write(): <13> Tx: $1a68bb681a447b681a603b68fa681a6000bf1437bd465df8047b7047834b040000ca9a3bdff834d0002103e00c4b5b58435004310b480c4b42189a42f6d30b4a#cf -[12.180] read(): <13> Rx: $m8007fdc,4#c9 -[12.180] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007fdc -[12.180] write(): <13> Tx: $00000820#8a -[12.241] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[12.241] write(): <13> Tx: $l#8b -[12.242] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[12.242] write(): <13> Tx: $l#8b -[12.984] read(): <13> Rx: $vCont;c#a8 -[12.984] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[12.990] handle_vCont_c(): handle_vCont_c, continue thread -[12.990] write(): <13> Tx: $OK#9a -[13.000] Device_GetStatus(): ST-LINK device status: RUN_MODE -[13.002] read(): <13> Rx: $m200004f0,4#89 -[13.003] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[13.003] write(): <13> Tx: $00000000#80 -[13.008] read(): <13> Rx: $T1#85 -[13.008] write(): <13> Tx: $OK#9a -[13.008] read(): <13> Rx: $T1#85 -[13.008] write(): <13> Tx: $OK#9a -[13.204] read(): <13> Rx: $m200004f0,4#89 -[13.204] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[13.205] write(): <13> Tx: $00000000#80 -[13.406] read(): <13> Rx: $m200004f0,4#89 -[13.406] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[13.407] write(): <13> Tx: $00000000#80 -[13.609] read(): <13> Rx: $m200004f0,4#89 -[13.609] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[13.610] write(): <13> Tx: $00000000#80 -[13.812] read(): <13> Rx: $m200004f0,4#89 -[13.812] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[13.813] write(): <13> Tx: $00000000#80 -[14.015] read(): <13> Rx: $m200004f0,4#89 -[14.015] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[14.016] write(): <13> Tx: $00000000#80 -[14.218] read(): <13> Rx: $m200004f0,4#89 -[14.218] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[14.219] write(): <13> Tx: $00000000#80 -[14.422] read(): <13> Rx: $m200004f0,4#89 -[14.422] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[14.422] write(): <13> Tx: $00000000#80 -[14.624] read(): <13> Rx: $m200004f0,4#89 -[14.624] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[14.625] write(): <13> Tx: $00000000#80 -[14.826] read(): <13> Rx: $m200004f0,4#89 -[14.826] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[14.827] write(): <13> Tx: $00000000#80 -[15.029] read(): <13> Rx: $m200004f0,4#89 -[15.029] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[15.030] write(): <13> Tx: $00000000#80 -[15.232] read(): <13> Rx: $m200004f0,4#89 -[15.232] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[15.232] write(): <13> Tx: $00000000#80 -[15.435] read(): <13> Rx: $m200004f0,4#89 -[15.435] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[15.436] write(): <13> Tx: $00000000#80 -[15.638] read(): <13> Rx: $m200004f0,4#89 -[15.638] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[15.639] write(): <13> Tx: $00000000#80 -[15.841] read(): <13> Rx: $m200004f0,4#89 -[15.841] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[15.842] write(): <13> Tx: $00000000#80 -[16.062] read(): <13> Rx: $m200004f0,4#89 -[16.062] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[16.062] write(): <13> Tx: $00000000#80 -[16.263] read(): <13> Rx: $m200004f0,4#89 -[16.263] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[16.263] write(): <13> Tx: $00000000#80 -[16.465] read(): <13> Rx: $m200004f0,4#89 -[16.465] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[16.466] write(): <13> Tx: $00000000#80 -[16.668] read(): <13> Rx: $m200004f0,4#89 -[16.668] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[16.669] write(): <13> Tx: $00000000#80 -[16.872] read(): <13> Rx: $m200004f0,4#89 -[16.872] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[16.872] write(): <13> Tx: $00000000#80 -[17.075] read(): <13> Rx: $m200004f0,4#89 -[17.075] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[17.076] write(): <13> Tx: $00000000#80 -[17.278] read(): <13> Rx: $m200004f0,4#89 -[17.278] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[17.279] write(): <13> Tx: $00000000#80 -[17.481] read(): <13> Rx: $m200004f0,4#89 -[17.481] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[17.482] write(): <13> Tx: $00000000#80 -[17.684] read(): <13> Rx: $m200004f0,4#89 -[17.684] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[17.685] write(): <13> Tx: $00000000#80 -[17.887] read(): <13> Rx: $m200004f0,4#89 -[17.887] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[17.888] write(): <13> Tx: $00000000#80 -[18.090] read(): <13> Rx: $m200004f0,4#89 -[18.090] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[18.091] write(): <13> Tx: $00000000#80 -[18.294] read(): <13> Rx: $m200004f0,4#89 -[18.294] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[18.295] write(): <13> Tx: $00000000#80 -[18.497] read(): <13> Rx: $m200004f0,4#89 -[18.497] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[18.498] write(): <13> Tx: $00000000#80 -[18.700] read(): <13> Rx: $m200004f0,4#89 -[18.700] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[18.700] write(): <13> Tx: $00000000#80 -[18.901] read(): <13> Rx: $m200004f0,4#89 -[18.901] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[18.902] write(): <13> Tx: $00000000#80 -[19.103] read(): <13> Rx: $m200004f0,4#89 -[19.103] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[19.104] write(): <13> Tx: $00000000#80 -[19.306] read(): <13> Rx: $m200004f0,4#89 -[19.306] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[19.307] write(): <13> Tx: $00000000#80 -[19.510] read(): <13> Rx: $m200004f0,4#89 -[19.510] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[19.511] write(): <13> Tx: $00000000#80 -[19.713] read(): <13> Rx: $m200004f0,4#89 -[19.713] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[19.713] write(): <13> Tx: $00000000#80 -[19.915] read(): <13> Rx: $m200004f0,4#89 -[19.915] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[19.915] write(): <13> Tx: $00000000#80 -[20.117] read(): <13> Rx: $m200004f0,4#89 -[20.117] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[20.118] write(): <13> Tx: $00000000#80 -[20.320] read(): <13> Rx: $m200004f0,4#89 -[20.321] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[20.321] write(): <13> Tx: $00000000#80 -[20.523] read(): <13> Rx: $m200004f0,4#89 -[20.523] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[20.524] write(): <13> Tx: $00000000#80 -[20.726] read(): <13> Rx: $m200004f0,4#89 -[20.727] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[20.728] write(): <13> Tx: $00000000#80 -[20.930] read(): <13> Rx: $m200004f0,4#89 -[20.930] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[20.931] write(): <13> Tx: $00000000#80 -[21.133] read(): <13> Rx: $m200004f0,4#89 -[21.133] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[21.134] write(): <13> Tx: $00000000#80 -[21.336] read(): <13> Rx: $m200004f0,4#89 -[21.336] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[21.337] write(): <13> Tx: $00000000#80 -[21.539] read(): <13> Rx: $m200004f0,4#89 -[21.539] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[21.540] write(): <13> Tx: $00000000#80 -[21.742] read(): <13> Rx: $m200004f0,4#89 -[21.742] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[21.743] write(): <13> Tx: $00000000#80 -[21.945] read(): <13> Rx: $m200004f0,4#89 -[21.945] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[21.946] write(): <13> Tx: $00000000#80 -[22.148] read(): <13> Rx: $m200004f0,4#89 -[22.148] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[22.148] write(): <13> Tx: $00000000#80 -[22.351] read(): <13> Rx: $m200004f0,4#89 -[22.351] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[22.352] write(): <13> Tx: $00000000#80 -[22.555] read(): <13> Rx: $m200004f0,4#89 -[22.555] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[22.555] write(): <13> Tx: $00000000#80 -[22.758] read(): <13> Rx: $m200004f0,4#89 -[22.758] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[22.758] write(): <13> Tx: $00000000#80 -[22.961] read(): <13> Rx: $m200004f0,4#89 -[22.961] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[22.962] write(): <13> Tx: $00000000#80 -[23.164] read(): <13> Rx: $m200004f0,4#89 -[23.164] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[23.165] write(): <13> Tx: $00000000#80 -[23.367] read(): <13> Rx: $m200004f0,4#89 -[23.367] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[23.368] write(): <13> Tx: $00000000#80 -[23.571] read(): <13> Rx: $m200004f0,4#89 -[23.571] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[23.572] write(): <13> Tx: $00000000#80 -[23.774] read(): <13> Rx: $m200004f0,4#89 -[23.774] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[23.775] write(): <13> Tx: $00000000#80 -[23.976] read(): <13> Rx: $m200004f0,4#89 -[23.976] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[23.977] write(): <13> Tx: $00000000#80 -[24.179] read(): <13> Rx: $m200004f0,4#89 -[24.179] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[24.180] write(): <13> Tx: $00000000#80 -[24.382] read(): <13> Rx: $m200004f0,4#89 -[24.382] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[24.383] write(): <13> Tx: $00000000#80 -[24.586] read(): <13> Rx: $m200004f0,4#89 -[24.586] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[24.586] write(): <13> Tx: $00000000#80 -[24.789] read(): <13> Rx: $m200004f0,4#89 -[24.789] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[24.790] write(): <13> Tx: $00000000#80 -[24.993] read(): <13> Rx: $m200004f0,4#89 -[24.993] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[24.994] write(): <13> Tx: $00000000#80 -[25.196] read(): <13> Rx: $m200004f0,4#89 -[25.196] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[25.197] write(): <13> Tx: $00000000#80 -[25.400] read(): <13> Rx: $m200004f0,4#89 -[25.400] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[25.401] write(): <13> Tx: $00000000#80 -[25.603] read(): <13> Rx: $m200004f0,4#89 -[25.603] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[25.604] write(): <13> Tx: $00000000#80 -[25.806] read(): <13> Rx: $m200004f0,4#89 -[25.806] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[25.807] write(): <13> Tx: $00000000#80 -[26.009] read(): <13> Rx: $m200004f0,4#89 -[26.009] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[26.010] write(): <13> Tx: $00000000#80 -[26.212] read(): <13> Rx: $m200004f0,4#89 -[26.212] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[26.212] write(): <13> Tx: $00000000#80 -[26.414] read(): <13> Rx: $m200004f0,4#89 -[26.414] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[26.415] write(): <13> Tx: $00000000#80 -[26.617] read(): <13> Rx: $m200004f0,4#89 -[26.617] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[26.617] write(): <13> Tx: $00000000#80 -[26.772] read(): <13> Rx: $vCont;t:1#24 -[26.772] handle_vCont_t(): handle_vCont_t, Halt thread -[26.773] write(): <13> Tx: $OK#9a -[26.783] Device_GetStatus(): ST-LINK device status: HALT_MODE -[26.783] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[26.783] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[26.789] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[26.790] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[26.790] read(): <13> Rx: $vStopped#55 -[26.790] write(): <13> Tx: $OK#9a -[26.790] read(): <13> Rx: $g#67 -[26.797] write(): <13> Tx: $3b4200007d000000e9030000a8030000000000000000000000000000c0ff07200000000000000000000000000000000000000000c0ff072031060008ec05000800000021000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000083c0ca3d00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000c0ff072000000000#ff -[26.797] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[26.797] write(): <13> Tx: $l#8b -[26.798] read(): <13> Rx: $m80005ec,4#92 -[26.798] handlePacket(): Reading 0x4 bytes of memory from addr 0x80005ec -[26.798] write(): <13> Tx: $80b400af#25 -[26.810] read(): <13> Rx: $m200004f0,4#89 -[26.810] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[26.810] write(): <13> Tx: $00000000#80 -[26.814] read(): <13> Rx: $m8000630,4#2e -[26.814] handlePacket(): Reading 0x4 bytes of memory from addr 0x8000630 -[26.814] write(): <13> Tx: $0246bb68#fe -[26.815] read(): <13> Rx: $m2007ffc0,40#25 -[26.815] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ffc0 -[26.815] write(): <13> Tx: $c8ff0720e8030000933e0000e9030000d8ff072091670008010000002c860008f0ff07207d000000f404002000000000b08600080800002000000000db7f0008#b4 -[26.816] read(): <13> Rx: $m8006790,4#3b -[26.816] handlePacket(): Reading 0x4 bytes of memory from addr 0x8006790 -[26.816] write(): <13> Tx: $eee700bf#8e -[26.816] read(): <13> Rx: $m8007fda,4#c7 -[26.817] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007fda -[26.817] write(): <13> Tx: $70470000#92 -[26.818] read(): <13> Rx: $m8007f80,40#9a -[26.818] handlePacket(): Reading 0x40 bytes of memory from addr 0x8007f80 -[26.818] write(): <13> Tx: $1a68bb681a447b681a603b68fa681a6000bf1437bd465df8047b7047834b040000ca9a3bdff834d0002103e00c4b5b58435004310b480c4b42189a42f6d30b4a#cf -[26.819] read(): <13> Rx: $m8007fdc,4#c9 -[26.819] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007fdc -[26.819] write(): <13> Tx: $00000820#8a -[26.942] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[26.942] write(): <13> Tx: $l#8b -[26.942] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[26.942] write(): <13> Tx: $l#8b -[28.784] read(): <13> Rx: $m8000630,2#2c -[28.784] handlePacket(): Reading 0x2 bytes of memory from addr 0x8000630 -[28.784] write(): <13> Tx: $0246#cc -[28.841] read(): <13> Rx: $Z1,8000630,2#76 -[28.842] write(): <13> Tx: $OK#9a -[28.842] read(): <13> Rx: $vCont;c#a8 -[28.842] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[28.848] handle_vCont_c(): handle_vCont_c, continue thread -[28.848] write(): <13> Tx: $OK#9a -[28.859] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[28.859] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[28.865] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000003 -[28.867] write(): <13> Tx: %Stop:T05hwbreak:;thread:1;core:0;#7e -[28.891] read(): <13> Rx: $vStopped#55 -[28.891] write(): <13> Tx: $OK#9a -[28.891] read(): <13> Rx: $g#67 -[28.898] write(): <13> Tx: $3c4200007d000000e90300003c420000000000000000000000000000c0ff07200000000000000000000000000000000000000000c0ff07203106000830060008000000210000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cdcccc3c00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000c0ff072000000000#2c -[28.899] read(): <13> Rx: $m8000630,4#2e -[28.899] handlePacket(): Reading 0x4 bytes of memory from addr 0x8000630 -[28.899] write(): <13> Tx: $0246bb68#fe -[28.900] read(): <13> Rx: $z1,8000630,2#96 -[28.900] write(): <13> Tx: $OK#9a -[28.900] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[28.900] write(): <13> Tx: $l#8b -[28.901] read(): <13> Rx: $m2007ffc0,40#25 -[28.901] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ffc0 -[28.902] write(): <13> Tx: $c8ff0720e8030000933e0000e9030000d8ff072091670008010000002c860008f0ff07207d000000f404002000000000b08600080800002000000000db7f0008#b4 -[28.902] read(): <13> Rx: $m8006790,4#3b -[28.902] handlePacket(): Reading 0x4 bytes of memory from addr 0x8006790 -[28.903] write(): <13> Tx: $eee700bf#8e -[28.911] read(): <13> Rx: $m2007ffc0,40#25 -[28.911] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ffc0 -[28.912] write(): <13> Tx: $c8ff0720e8030000933e0000e9030000d8ff072091670008010000002c860008f0ff07207d000000f404002000000000b08600080800002000000000db7f0008#b4 -[28.912] read(): <13> Rx: $m200004f0,4#89 -[28.912] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[28.913] write(): <13> Tx: $00000000#80 -[28.923] read(): <13> Rx: $m2007ffc0,40#25 -[28.923] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ffc0 -[28.924] write(): <13> Tx: $c8ff0720e8030000933e0000e9030000d8ff072091670008010000002c860008f0ff07207d000000f404002000000000b08600080800002000000000db7f0008#b4 -[28.924] read(): <13> Rx: $m8007fda,4#c7 -[28.924] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007fda -[28.925] write(): <13> Tx: $70470000#92 -[28.926] read(): <13> Rx: $m8007f80,40#9a -[28.926] handlePacket(): Reading 0x40 bytes of memory from addr 0x8007f80 -[28.926] write(): <13> Tx: $1a68bb681a447b681a603b68fa681a6000bf1437bd465df8047b7047834b040000ca9a3bdff834d0002103e00c4b5b58435004310b480c4b42189a42f6d30b4a#cf -[28.927] read(): <13> Rx: $m8007fdc,4#c9 -[28.927] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007fdc -[28.927] write(): <13> Tx: $00000820#8a -[28.978] read(): <13> Rx: $m2007ffc0,40#25 -[28.978] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ffc0 -[28.979] write(): <13> Tx: $c8ff0720e8030000933e0000e9030000d8ff072091670008010000002c860008f0ff07207d000000f404002000000000b08600080800002000000000db7f0008#b4 -[28.979] read(): <13> Rx: $m2007ffc0,40#25 -[28.979] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ffc0 -[28.980] write(): <13> Tx: $c8ff0720e8030000933e0000e9030000d8ff072091670008010000002c860008f0ff07207d000000f404002000000000b08600080800002000000000db7f0008#b4 -[28.980] read(): <13> Rx: $m2007ffc0,40#25 -[28.980] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ffc0 -[28.981] write(): <13> Tx: $c8ff0720e8030000933e0000e9030000d8ff072091670008010000002c860008f0ff07207d000000f404002000000000b08600080800002000000000db7f0008#b4 -[29.005] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[29.006] write(): <13> Tx: $l#8b -[29.006] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[29.006] write(): <13> Tx: $l#8b -[29.006] read(): <13> Rx: $m2007ffc0,40#25 -[29.006] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ffc0 -[29.007] write(): <13> Tx: $c8ff0720e8030000933e0000e9030000d8ff072091670008010000002c860008f0ff07207d000000f404002000000000b08600080800002000000000db7f0008#b4 -[30.239] read(): <13> Rx: $m8006790,2#39 -[30.239] handlePacket(): Reading 0x2 bytes of memory from addr 0x8006790 -[30.240] write(): <13> Tx: $eee7#66 -[30.240] read(): <13> Rx: $Z1,8006790,2#83 -[30.241] write(): <13> Tx: $OK#9a -[30.241] read(): <13> Rx: $vCont;c#a8 -[30.241] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[30.246] handle_vCont_c(): handle_vCont_c, continue thread -[30.247] write(): <13> Tx: $OK#9a -[30.257] Device_GetStatus(): ST-LINK device status: RUN_MODE -[30.320] Device_GetStatus(): ST-LINK device status: HALT_MODE -[30.320] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[30.320] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[30.327] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000003 -[30.329] write(): <13> Tx: %Stop:T05hwbreak:;thread:1;core:0;#7e -[30.329] read(): <13> Rx: $vStopped#55 -[30.329] write(): <13> Tx: $OK#9a -[30.329] read(): <13> Rx: $g#67 -[30.336] write(): <13> Tx: $7c4200007d000000e9030000e9030000000000000000000000000000d8ff07200000000000000000000000000000000000000000d8ff0720310600089067000800000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000096438b3c00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000d8ff072000000000#78 -[30.336] read(): <13> Rx: $m8006790,4#3b -[30.336] handlePacket(): Reading 0x4 bytes of memory from addr 0x8006790 -[30.337] write(): <13> Tx: $eee700bf#8e -[30.337] read(): <13> Rx: $z1,8006790,2#a3 -[30.338] write(): <13> Tx: $OK#9a -[30.338] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[30.338] write(): <13> Tx: $l#8b -[30.349] read(): <13> Rx: $m2007ffc0,40#25 -[30.349] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ffc0 -[30.350] write(): <13> Tx: $c8ff0720e8030000933e0000e9030000d8ff072091670008010000002c860008f0ff07207d000000f404002000000000b08600080800002000000000db7f0008#b4 -[30.350] read(): <13> Rx: $m8007fda,4#c7 -[30.350] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007fda -[30.351] write(): <13> Tx: $70470000#92 -[30.351] read(): <13> Rx: $m8007f80,40#9a -[30.351] handlePacket(): Reading 0x40 bytes of memory from addr 0x8007f80 -[30.352] write(): <13> Tx: $1a68bb681a447b681a603b68fa681a6000bf1437bd465df8047b7047834b040000ca9a3bdff834d0002103e00c4b5b58435004310b480c4b42189a42f6d30b4a#cf -[30.352] read(): <13> Rx: $m8007fdc,4#c9 -[30.352] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007fdc -[30.352] write(): <13> Tx: $00000820#8a -[30.353] read(): <13> Rx: $m2007fff0,4#f8 -[30.353] handlePacket(): Reading 0x4 bytes of memory from addr 0x2007fff0 -[30.353] write(): <13> Tx: $b0860008#c8 -[30.353] read(): <13> Rx: $m80086a8,4#6c -[30.353] handlePacket(): Reading 0x4 bytes of memory from addr 0x80086a8 -[30.354] write(): <13> Tx: $00000000#80 -[30.354] read(): <13> Rx: $m20000008,8#5b -[30.354] handlePacket(): Reading 0x8 bytes of memory from addr 0x20000008 -[30.355] write(): <13> Tx: $48656c6c6f20776f#11 -[30.355] read(): <13> Rx: $m20000010,8#54 -[30.355] handlePacket(): Reading 0x8 bytes of memory from addr 0x20000010 -[30.355] write(): <13> Tx: $726c642100000000#4f -[30.356] read(): <13> Rx: $m800862c,8#6c -[30.356] handlePacket(): Reading 0x8 bytes of memory from addr 0x800862c -[30.356] write(): <13> Tx: $6368617474657200#48 -[30.357] read(): <13> Rx: $m200004f0,4#89 -[30.357] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[30.358] write(): <13> Tx: $00000000#80 -[30.505] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[30.506] write(): <13> Tx: $l#8b -[30.506] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[30.506] write(): <13> Tx: $l#8b -[31.652] read(): <13> Rx: $vCont;s:1;c#c1 -[31.652] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[31.658] handle_vCont_s(): handle_vCont_s, step thread -[31.659] write(): <13> Tx: $OK#9a -[31.669] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[31.669] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[31.675] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[31.675] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[31.675] read(): <13> Rx: $vStopped#55 -[31.676] write(): <13> Tx: $OK#9a -[31.676] read(): <13> Rx: $g#67 -[31.682] write(): <13> Tx: $7c4200007d000000e9030000e9030000000000000000000000000000d8ff07200000000000000000000000000000000000000000d8ff0720310600087067000800000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000096438b3c00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000d8ff072000000000#76 -[31.683] read(): <13> Rx: $m8006770,4#39 -[31.683] handlePacket(): Reading 0x4 bytes of memory from addr 0x8006770 -[31.683] write(): <13> Tx: $0d4bfb61#59 -[31.684] read(): <13> Rx: $vCont;s:1;c#c1 -[31.693] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[31.699] handle_vCont_s(): handle_vCont_s, step thread -[31.700] write(): <13> Tx: $OK#9a -[31.710] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[31.710] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[31.716] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[31.717] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[31.742] read(): <13> Rx: $vStopped#55 -[31.743] write(): <13> Tx: $OK#9a -[31.743] read(): <13> Rx: $g#67 -[31.750] write(): <13> Tx: $7c4200007d000000e903000008000020000000000000000000000000d8ff07200000000000000000000000000000000000000000d8ff0720310600087267000800000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000096438b3c00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000d8ff072000000000#41 -[31.750] read(): <13> Rx: $vCont;s:1;c#c1 -[31.750] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[31.758] handle_vCont_s(): handle_vCont_s, step thread -[31.758] write(): <13> Tx: $OK#9a -[31.768] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[31.768] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[31.775] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[31.775] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[31.802] read(): <13> Rx: $vStopped#55 -[31.802] write(): <13> Tx: $OK#9a -[31.803] read(): <13> Rx: $g#67 -[31.810] write(): <13> Tx: $7c4200007d000000e903000008000020000000000000000000000000d8ff07200000000000000000000000000000000000000000d8ff0720310600087467000800000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000096438b3c00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000d8ff072000000000#43 -[31.810] read(): <13> Rx: $m8006774,4#3d -[31.810] handlePacket(): Reading 0x4 bytes of memory from addr 0x8006774 -[31.811] write(): <13> Tx: $07f11802#c9 -[31.811] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[31.811] write(): <13> Tx: $l#8b -[31.825] read(): <13> Rx: $m200004f0,4#89 -[31.825] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[31.826] write(): <13> Tx: $00000000#80 -[31.827] read(): <13> Rx: $m2007ffc0,40#25 -[31.827] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ffc0 -[31.828] write(): <13> Tx: $c8ff0720e8030000933e0000e9030000d8ff072091670008010000002c860008f0ff07207d000000f404002000000000b08600080800002000000000db7f0008#b4 -[31.829] read(): <13> Rx: $m8007fda,4#c7 -[31.829] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007fda -[31.829] write(): <13> Tx: $70470000#92 -[31.829] read(): <13> Rx: $m8007f80,40#9a -[31.829] handlePacket(): Reading 0x40 bytes of memory from addr 0x8007f80 -[31.830] write(): <13> Tx: $1a68bb681a447b681a603b68fa681a6000bf1437bd465df8047b7047834b040000ca9a3bdff834d0002103e00c4b5b58435004310b480c4b42189a42f6d30b4a#cf -[31.830] read(): <13> Rx: $m8007fdc,4#c9 -[31.830] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007fdc -[31.831] write(): <13> Tx: $00000820#8a -[31.831] read(): <13> Rx: $m2007fff0,4#f8 -[31.831] handlePacket(): Reading 0x4 bytes of memory from addr 0x2007fff0 -[31.831] write(): <13> Tx: $b0860008#c8 -[31.831] read(): <13> Rx: $m80086a8,4#6c -[31.831] handlePacket(): Reading 0x4 bytes of memory from addr 0x80086a8 -[31.831] write(): <13> Tx: $00000000#80 -[31.831] read(): <13> Rx: $m20000008,8#5b -[31.831] handlePacket(): Reading 0x8 bytes of memory from addr 0x20000008 -[31.832] write(): <13> Tx: $48656c6c6f20776f#11 -[31.832] read(): <13> Rx: $m20000010,8#54 -[31.832] handlePacket(): Reading 0x8 bytes of memory from addr 0x20000010 -[31.832] write(): <13> Tx: $726c642100000000#4f -[31.832] read(): <13> Rx: $m800862c,8#6c -[31.832] handlePacket(): Reading 0x8 bytes of memory from addr 0x800862c -[31.833] write(): <13> Tx: $6368617474657200#48 -[31.893] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[31.893] write(): <13> Tx: $l#8b -[31.893] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[31.893] write(): <13> Tx: $l#8b -[32.432] read(): <13> Rx: $vCont;s:1;c#c1 -[32.432] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[32.440] handle_vCont_s(): handle_vCont_s, step thread -[32.440] write(): <13> Tx: $OK#9a -[32.451] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[32.451] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[32.457] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[32.457] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[32.457] read(): <13> Rx: $vStopped#55 -[32.458] write(): <13> Tx: $OK#9a -[32.458] read(): <13> Rx: $g#67 -[32.464] write(): <13> Tx: $7c4200007d000000f0ff072008000020000000000000000000000000d8ff07200000000000000000000000000000000000000000d8ff0720310600087867000800000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000096438b3c00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000d8ff072000000000#b1 -[32.465] read(): <13> Rx: $vCont;s:1;c#c1 -[32.465] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[32.472] handle_vCont_s(): handle_vCont_s, step thread -[32.472] write(): <13> Tx: $OK#9a -[32.483] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[32.483] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[32.488] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[32.489] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[32.515] read(): <13> Rx: $vStopped#55 -[32.515] write(): <13> Tx: $OK#9a -[32.515] read(): <13> Rx: $g#67 -[32.522] write(): <13> Tx: $7c4200007d000000f0ff0720dcff0720000000000000000000000000d8ff07200000000000000000000000000000000000000000d8ff0720310600087a67000800000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000096438b3c00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000d8ff072000000000#ac -[32.522] read(): <13> Rx: $vCont;s:1;c#c1 -[32.523] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[32.530] handle_vCont_s(): handle_vCont_s, step thread -[32.530] write(): <13> Tx: $OK#9a -[32.540] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[32.540] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[32.546] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[32.547] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[32.570] read(): <13> Rx: $vStopped#55 -[32.570] write(): <13> Tx: $OK#9a -[32.571] read(): <13> Rx: $g#67 -[32.578] write(): <13> Tx: $7c420000f0ff0720f0ff0720dcff0720000000000000000000000000d8ff07200000000000000000000000000000000000000000d8ff0720310600087c67000800000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000096438b3c00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000d8ff072000000000#1e -[32.578] read(): <13> Rx: $vCont;s:1;c#c1 -[32.579] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[32.585] handle_vCont_s(): handle_vCont_s, step thread -[32.585] write(): <13> Tx: $OK#9a -[32.596] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[32.596] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[32.602] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[32.602] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[32.627] read(): <13> Rx: $vStopped#55 -[32.627] write(): <13> Tx: $OK#9a -[32.627] read(): <13> Rx: $g#67 -[32.634] write(): <13> Tx: $dcff0720f0ff0720f0ff0720dcff0720000000000000000000000000d8ff07200000000000000000000000000000000000000000d8ff0720310600087e67000800000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000096438b3c00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000d8ff072000000000#bc -[32.635] read(): <13> Rx: $vCont;s:1;c#c1 -[32.635] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[32.642] handle_vCont_s(): handle_vCont_s, step thread -[32.642] write(): <13> Tx: $OK#9a -[32.653] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[32.653] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[32.659] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[32.659] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[32.686] read(): <13> Rx: $vStopped#55 -[32.686] write(): <13> Tx: $OK#9a -[32.687] read(): <13> Rx: $g#67 -[32.694] write(): <13> Tx: $dcff0720f0ff0720f0ff0720dcff0720000000000000000000000000d8ff07200000000000000000000000000000000000000000d8ff0720836700085263000800000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000096438b3c00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000d8ff072000000000#91 -[32.694] read(): <13> Rx: $m8006352,4#35 -[32.694] handlePacket(): Reading 0x4 bytes of memory from addr 0x8006352 -[32.695] write(): <13> Tx: $80b582b0#fb -[32.696] read(): <13> Rx: $m8006782,4#3c -[32.696] handlePacket(): Reading 0x4 bytes of memory from addr 0x8006782 -[32.696] write(): <13> Tx: $084800f0#ca -[32.697] read(): <13> Rx: $m8006782,2#3a -[32.697] handlePacket(): Reading 0x2 bytes of memory from addr 0x8006782 -[32.697] write(): <13> Tx: $0848#d4 -[32.697] read(): <13> Rx: $Z1,8006782,2#84 -[32.698] write(): <13> Tx: $OK#9a -[32.698] read(): <13> Rx: $vCont;c#a8 -[32.698] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[32.704] handle_vCont_c(): handle_vCont_c, continue thread -[32.704] write(): <13> Tx: $OK#9a -[32.715] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[32.715] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[32.721] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000003 -[32.723] write(): <13> Tx: %Stop:T05hwbreak:;thread:1;core:0;#7e -[32.746] read(): <13> Rx: $vStopped#55 -[32.746] write(): <13> Tx: $OK#9a -[32.747] read(): <13> Rx: $g#67 -[32.754] write(): <13> Tx: $000000007d000000f0ff072000000000000000000000000000000000d8ff07200000000000000000000000000000000000000000d8ff072071630008826700080000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001283403d00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000d8ff072000000000#2c -[32.754] read(): <13> Rx: $m8006782,4#3c -[32.754] handlePacket(): Reading 0x4 bytes of memory from addr 0x8006782 -[32.755] write(): <13> Tx: $084800f0#ca -[32.755] read(): <13> Rx: $z1,8006782,2#a4 -[32.756] write(): <13> Tx: $OK#9a -[32.756] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[32.756] write(): <13> Tx: $l#8b -[32.766] read(): <13> Rx: $m2007ffc0,40#25 -[32.767] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ffc0 -[32.767] write(): <13> Tx: $c8ff072071630008f0ff0720dcff0720d8ff072083670008010000002c860008f0ff07207d000000f404002000000000b08600080800002000000000db7f0008#90 -[32.768] read(): <13> Rx: $m8007fda,4#c7 -[32.768] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007fda -[32.769] write(): <13> Tx: $70470000#92 -[32.769] read(): <13> Rx: $m8007f80,40#9a -[32.769] handlePacket(): Reading 0x40 bytes of memory from addr 0x8007f80 -[32.770] write(): <13> Tx: $1a68bb681a447b681a603b68fa681a6000bf1437bd465df8047b7047834b040000ca9a3bdff834d0002103e00c4b5b58435004310b480c4b42189a42f6d30b4a#cf -[32.770] read(): <13> Rx: $m8007fdc,4#c9 -[32.770] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007fdc -[32.770] write(): <13> Tx: $00000820#8a -[32.770] read(): <13> Rx: $m2007fff0,4#f8 -[32.770] handlePacket(): Reading 0x4 bytes of memory from addr 0x2007fff0 -[32.771] write(): <13> Tx: $b0860008#c8 -[32.771] read(): <13> Rx: $m80086a8,4#6c -[32.771] handlePacket(): Reading 0x4 bytes of memory from addr 0x80086a8 -[32.772] write(): <13> Tx: $00000000#80 -[32.772] read(): <13> Rx: $m20000008,8#5b -[32.772] handlePacket(): Reading 0x8 bytes of memory from addr 0x20000008 -[32.772] write(): <13> Tx: $48656c6c6f20776f#11 -[32.773] read(): <13> Rx: $m20000010,8#54 -[32.773] handlePacket(): Reading 0x8 bytes of memory from addr 0x20000010 -[32.773] write(): <13> Tx: $726c642100000000#4f -[32.773] read(): <13> Rx: $m800862c,8#6c -[32.774] handlePacket(): Reading 0x8 bytes of memory from addr 0x800862c -[32.774] write(): <13> Tx: $6368617474657200#48 -[32.781] read(): <13> Rx: $m200004f0,4#89 -[32.781] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[32.782] write(): <13> Tx: $00000000#80 -[32.834] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[32.834] write(): <13> Tx: $l#8b -[32.835] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[32.835] write(): <13> Tx: $l#8b -[33.684] read(): <13> Rx: $vCont;s:1;c#c1 -[33.685] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[33.691] handle_vCont_s(): handle_vCont_s, step thread -[33.691] write(): <13> Tx: $OK#9a -[33.702] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[33.702] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[33.707] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[33.708] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[33.708] read(): <13> Rx: $vStopped#55 -[33.708] write(): <13> Tx: $OK#9a -[33.708] read(): <13> Rx: $g#67 -[33.715] write(): <13> Tx: $f40400207d000000f0ff072000000000000000000000000000000000d8ff07200000000000000000000000000000000000000000d8ff072071630008846700080000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001283403d00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000d8ff072000000000#6e -[33.715] read(): <13> Rx: $vCont;s:1;c#c1 -[33.725] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[33.732] handle_vCont_s(): handle_vCont_s, step thread -[33.732] write(): <13> Tx: $OK#9a -[33.743] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[33.743] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[33.749] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[33.749] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[33.775] read(): <13> Rx: $vStopped#55 -[33.775] write(): <13> Tx: $OK#9a -[33.775] read(): <13> Rx: $g#67 -[33.782] write(): <13> Tx: $f40400207d000000f0ff072000000000000000000000000000000000d8ff07200000000000000000000000000000000000000000d8ff072089670008e27000080000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001283403d00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000d8ff072000000000#a0 -[33.782] read(): <13> Rx: $m80070e2,4#63 -[33.782] handlePacket(): Reading 0x4 bytes of memory from addr 0x80070e2 -[33.784] write(): <13> Tx: $80b584b0#fd -[33.784] read(): <13> Rx: $m8006788,4#42 -[33.784] handlePacket(): Reading 0x4 bytes of memory from addr 0x8006788 -[33.784] write(): <13> Tx: $4ff47a70#33 -[33.785] read(): <13> Rx: $m8006788,2#40 -[33.785] handlePacket(): Reading 0x2 bytes of memory from addr 0x8006788 -[33.785] write(): <13> Tx: $4ff4#34 -[33.785] read(): <13> Rx: $Z1,8006788,2#8a -[33.786] write(): <13> Tx: $OK#9a -[33.786] read(): <13> Rx: $vCont;c#a8 -[33.786] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[33.792] handle_vCont_c(): handle_vCont_c, continue thread -[33.792] write(): <13> Tx: $OK#9a -[33.803] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[33.803] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[33.809] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000003 -[33.810] write(): <13> Tx: %Stop:T05hwbreak:;thread:1;core:0;#7e -[33.834] read(): <13> Rx: $vStopped#55 -[33.834] write(): <13> Tx: $OK#9a -[33.835] read(): <13> Rx: $g#67 -[33.842] write(): <13> Tx: $00000000080000008813000000000000000000000000000000000000d8ff07200000000000000000000000000000000000000000d8ff072041640008886700080000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000d8ff072000000000#9b -[33.843] read(): <13> Rx: $m8006788,4#42 -[33.843] handlePacket(): Reading 0x4 bytes of memory from addr 0x8006788 -[33.843] write(): <13> Tx: $4ff47a70#33 -[33.844] read(): <13> Rx: $z1,8006788,2#aa -[33.844] write(): <13> Tx: $OK#9a -[33.844] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[33.844] write(): <13> Tx: $l#8b -[33.870] read(): <13> Rx: $m2007ffc0,40#25 -[33.870] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ffc0 -[33.871] write(): <13> Tx: $f0ff0720f4040020ffffffff7e420000d8ff072089670008010000002c860008f0ff07207d000000f404002000000000b08600080800002000000000db7f0008#23 -[33.871] read(): <13> Rx: $m8007fda,4#c7 -[33.871] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007fda -[33.872] write(): <13> Tx: $70470000#92 -[33.872] read(): <13> Rx: $m8007f80,40#9a -[33.872] handlePacket(): Reading 0x40 bytes of memory from addr 0x8007f80 -[33.872] write(): <13> Tx: $1a68bb681a447b681a603b68fa681a6000bf1437bd465df8047b7047834b040000ca9a3bdff834d0002103e00c4b5b58435004310b480c4b42189a42f6d30b4a#cf -[33.872] read(): <13> Rx: $m8007fdc,4#c9 -[33.873] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007fdc -[33.873] write(): <13> Tx: $00000820#8a -[33.873] read(): <13> Rx: $m2007fff0,4#f8 -[33.873] handlePacket(): Reading 0x4 bytes of memory from addr 0x2007fff0 -[33.873] write(): <13> Tx: $b0860008#c8 -[33.873] read(): <13> Rx: $m80086a8,4#6c -[33.873] handlePacket(): Reading 0x4 bytes of memory from addr 0x80086a8 -[33.873] write(): <13> Tx: $00000000#80 -[33.874] read(): <13> Rx: $m20000008,8#5b -[33.874] handlePacket(): Reading 0x8 bytes of memory from addr 0x20000008 -[33.874] write(): <13> Tx: $48656c6c6f20776f#11 -[33.874] read(): <13> Rx: $m20000010,8#54 -[33.874] handlePacket(): Reading 0x8 bytes of memory from addr 0x20000010 -[33.874] write(): <13> Tx: $726c642100000000#4f -[33.874] read(): <13> Rx: $m800862c,8#6c -[33.874] handlePacket(): Reading 0x8 bytes of memory from addr 0x800862c -[33.875] write(): <13> Tx: $6368617474657200#48 -[33.875] read(): <13> Rx: $m200004f0,4#89 -[33.875] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[33.875] write(): <13> Tx: $00000000#80 -[33.926] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[33.926] write(): <13> Tx: $l#8b -[33.926] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[33.926] write(): <13> Tx: $l#8b -[34.805] read(): <13> Rx: $vCont;s:1;c#c1 -[34.806] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[34.813] handle_vCont_s(): handle_vCont_s, step thread -[34.813] write(): <13> Tx: $OK#9a -[34.823] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[34.823] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[34.830] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[34.830] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[34.830] read(): <13> Rx: $vStopped#55 -[34.831] write(): <13> Tx: $OK#9a -[34.831] read(): <13> Rx: $g#67 -[34.838] write(): <13> Tx: $e8030000080000008813000000000000000000000000000000000000d8ff07200000000000000000000000000000000000000000d8ff0720416400088c6700080000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000d8ff072000000000#06 -[34.838] read(): <13> Rx: $vCont;s:1;c#c1 -[34.849] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[34.856] handle_vCont_s(): handle_vCont_s, step thread -[34.856] write(): <13> Tx: $OK#9a -[34.867] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[34.867] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[34.872] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[34.873] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[34.899] read(): <13> Rx: $vStopped#55 -[34.899] write(): <13> Tx: $OK#9a -[34.899] read(): <13> Rx: $g#67 -[34.906] write(): <13> Tx: $e8030000080000008813000000000000000000000000000000000000d8ff07200000000000000000000000000000000000000000d8ff072091670008040600080000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000d8ff072000000000#d0 -[34.906] read(): <13> Rx: $m8000604,4#2f -[34.906] handlePacket(): Reading 0x4 bytes of memory from addr 0x8000604 -[34.907] write(): <13> Tx: $80b584b0#fd -[34.907] read(): <13> Rx: $m8006790,4#3b -[34.907] handlePacket(): Reading 0x4 bytes of memory from addr 0x8006790 -[34.908] write(): <13> Tx: $eee700bf#8e -[34.908] read(): <13> Rx: $m8006790,2#39 -[34.908] handlePacket(): Reading 0x2 bytes of memory from addr 0x8006790 -[34.908] write(): <13> Tx: $eee7#66 -[34.909] read(): <13> Rx: $Z1,8006790,2#83 -[34.909] write(): <13> Tx: $OK#9a -[34.909] read(): <13> Rx: $vCont;c#a8 -[34.910] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[34.915] handle_vCont_c(): handle_vCont_c, continue thread -[34.915] write(): <13> Tx: $OK#9a -[34.926] Device_GetStatus(): ST-LINK device status: RUN_MODE -[35.357] read(): <13> Rx: $T1#85 -[35.358] write(): <13> Tx: $OK#9a -[35.358] read(): <13> Rx: $T1#85 -[35.358] write(): <13> Tx: $OK#9a -[35.923] Device_GetStatus(): ST-LINK device status: HALT_MODE -[35.923] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[35.923] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[35.929] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000003 -[35.931] write(): <13> Tx: %Stop:T05hwbreak:;thread:1;core:0;#7e -[35.931] read(): <13> Rx: $vStopped#55 -[35.931] write(): <13> Tx: $OK#9a -[35.932] read(): <13> Rx: $g#67 -[35.939] write(): <13> Tx: $6846000008000000e9030000e9030000000000000000000000000000d8ff07200000000000000000000000000000000000000000d8ff07203106000890670008000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cdcccc3d00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000d8ff072000000000#01 -[35.939] read(): <13> Rx: $m8006790,4#3b -[35.939] handlePacket(): Reading 0x4 bytes of memory from addr 0x8006790 -[35.940] write(): <13> Tx: $eee700bf#8e -[35.940] read(): <13> Rx: $z1,8006790,2#a3 -[35.940] write(): <13> Tx: $OK#9a -[35.941] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[35.941] write(): <13> Tx: $l#8b -[35.950] read(): <13> Rx: $m200004f0,4#89 -[35.950] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[35.951] write(): <13> Tx: $00000000#80 -[35.962] read(): <13> Rx: $m2007ffc0,40#25 -[35.962] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ffc0 -[35.963] write(): <13> Tx: $88130000e80300007f420000e9030000d8ff072091670008010000002c860008f0ff07207d000000f404002000000000b08600080800002000000000db7f0008#17 -[35.963] read(): <13> Rx: $m8007fda,4#c7 -[35.963] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007fda -[35.964] write(): <13> Tx: $70470000#92 -[35.964] read(): <13> Rx: $m8007f80,40#9a -[35.964] handlePacket(): Reading 0x40 bytes of memory from addr 0x8007f80 -[35.964] write(): <13> Tx: $1a68bb681a447b681a603b68fa681a6000bf1437bd465df8047b7047834b040000ca9a3bdff834d0002103e00c4b5b58435004310b480c4b42189a42f6d30b4a#cf -[35.964] read(): <13> Rx: $m8007fdc,4#c9 -[35.964] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007fdc -[35.965] write(): <13> Tx: $00000820#8a -[36.027] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[36.027] write(): <13> Tx: $l#8b -[36.027] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[36.027] write(): <13> Tx: $l#8b -[36.039] read(): <13> Rx: $m2007ffc0,40#25 -[36.039] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ffc0 -[36.040] write(): <13> Tx: $88130000e80300007f420000e9030000d8ff072091670008010000002c860008f0ff07207d000000f404002000000000b08600080800002000000000db7f0008#17 -[36.040] read(): <13> Rx: $m2007fff0,4#f8 -[36.040] handlePacket(): Reading 0x4 bytes of memory from addr 0x2007fff0 -[36.040] write(): <13> Tx: $b0860008#c8 -[36.040] read(): <13> Rx: $m80086a8,4#6c -[36.040] handlePacket(): Reading 0x4 bytes of memory from addr 0x80086a8 -[36.041] write(): <13> Tx: $00000000#80 -[36.041] read(): <13> Rx: $m20000008,8#5b -[36.041] handlePacket(): Reading 0x8 bytes of memory from addr 0x20000008 -[36.041] write(): <13> Tx: $48656c6c6f20776f#11 -[36.041] read(): <13> Rx: $m20000010,8#54 -[36.041] handlePacket(): Reading 0x8 bytes of memory from addr 0x20000010 -[36.041] write(): <13> Tx: $726c642100000000#4f -[36.041] read(): <13> Rx: $m800862c,8#6c -[36.041] handlePacket(): Reading 0x8 bytes of memory from addr 0x800862c -[36.042] write(): <13> Tx: $6368617474657200#48 -[38.153] read(): <13> Rx: $vCont;s:1;c#c1 -[38.153] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[38.161] handle_vCont_s(): handle_vCont_s, step thread -[38.161] write(): <13> Tx: $OK#9a -[38.171] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[38.171] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[38.177] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[38.178] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[38.178] read(): <13> Rx: $vStopped#55 -[38.178] write(): <13> Tx: $OK#9a -[38.178] read(): <13> Rx: $g#67 -[38.185] write(): <13> Tx: $6846000008000000e9030000e9030000000000000000000000000000d8ff07200000000000000000000000000000000000000000d8ff07203106000870670008000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cdcccc3d00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000d8ff072000000000#ff -[38.185] read(): <13> Rx: $m8006770,4#39 -[38.185] handlePacket(): Reading 0x4 bytes of memory from addr 0x8006770 -[38.186] write(): <13> Tx: $0d4bfb61#59 -[38.186] read(): <13> Rx: $vCont;s:1;c#c1 -[38.186] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[38.194] handle_vCont_s(): handle_vCont_s, step thread -[38.194] write(): <13> Tx: $OK#9a -[38.204] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[38.204] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[38.210] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[38.210] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[38.234] read(): <13> Rx: $vStopped#55 -[38.234] write(): <13> Tx: $OK#9a -[38.235] read(): <13> Rx: $g#67 -[38.242] write(): <13> Tx: $6846000008000000e903000008000020000000000000000000000000d8ff07200000000000000000000000000000000000000000d8ff07203106000872670008000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cdcccc3d00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000d8ff072000000000#ca -[38.242] read(): <13> Rx: $vCont;s:1;c#c1 -[38.243] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[38.250] handle_vCont_s(): handle_vCont_s, step thread -[38.250] write(): <13> Tx: $OK#9a -[38.261] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[38.261] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[38.267] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[38.267] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[38.294] read(): <13> Rx: $vStopped#55 -[38.294] write(): <13> Tx: $OK#9a -[38.294] read(): <13> Rx: $g#67 -[38.301] write(): <13> Tx: $6846000008000000e903000008000020000000000000000000000000d8ff07200000000000000000000000000000000000000000d8ff07203106000874670008000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cdcccc3d00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000d8ff072000000000#cc -[38.301] read(): <13> Rx: $m8006774,4#3d -[38.301] handlePacket(): Reading 0x4 bytes of memory from addr 0x8006774 -[38.302] write(): <13> Tx: $07f11802#c9 -[38.302] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[38.302] write(): <13> Tx: $l#8b -[38.307] read(): <13> Rx: $m200004f0,4#89 -[38.307] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[38.307] write(): <13> Tx: $00000000#80 -[38.316] read(): <13> Rx: $m2007ffc0,40#25 -[38.316] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ffc0 -[38.317] write(): <13> Tx: $88130000e80300007f420000e9030000d8ff072091670008010000002c860008f0ff07207d000000f404002000000000b08600080800002000000000db7f0008#17 -[38.317] read(): <13> Rx: $m8007fda,4#c7 -[38.317] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007fda -[38.318] write(): <13> Tx: $70470000#92 -[38.318] read(): <13> Rx: $m8007f80,40#9a -[38.318] handlePacket(): Reading 0x40 bytes of memory from addr 0x8007f80 -[38.319] write(): <13> Tx: $1a68bb681a447b681a603b68fa681a6000bf1437bd465df8047b7047834b040000ca9a3bdff834d0002103e00c4b5b58435004310b480c4b42189a42f6d30b4a#cf -[38.319] read(): <13> Rx: $m8007fdc,4#c9 -[38.319] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007fdc -[38.319] write(): <13> Tx: $00000820#8a -[38.319] read(): <13> Rx: $m2007fff0,4#f8 -[38.320] handlePacket(): Reading 0x4 bytes of memory from addr 0x2007fff0 -[38.320] write(): <13> Tx: $b0860008#c8 -[38.320] read(): <13> Rx: $m80086a8,4#6c -[38.320] handlePacket(): Reading 0x4 bytes of memory from addr 0x80086a8 -[38.320] write(): <13> Tx: $00000000#80 -[38.321] read(): <13> Rx: $m20000008,8#5b -[38.321] handlePacket(): Reading 0x8 bytes of memory from addr 0x20000008 -[38.321] write(): <13> Tx: $48656c6c6f20776f#11 -[38.321] read(): <13> Rx: $m20000010,8#54 -[38.321] handlePacket(): Reading 0x8 bytes of memory from addr 0x20000010 -[38.321] write(): <13> Tx: $726c642100000000#4f -[38.322] read(): <13> Rx: $m800862c,8#6c -[38.322] handlePacket(): Reading 0x8 bytes of memory from addr 0x800862c -[38.322] write(): <13> Tx: $6368617474657200#48 -[38.374] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[38.374] write(): <13> Tx: $l#8b -[38.374] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[38.374] write(): <13> Tx: $l#8b -[38.856] read(): <13> Rx: $vCont;s:1;c#c1 -[38.857] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[38.864] handle_vCont_s(): handle_vCont_s, step thread -[38.864] write(): <13> Tx: $OK#9a -[38.874] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[38.875] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[38.880] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[38.881] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[38.881] read(): <13> Rx: $vStopped#55 -[38.881] write(): <13> Tx: $OK#9a -[38.881] read(): <13> Rx: $g#67 -[38.888] write(): <13> Tx: $6846000008000000f0ff072008000020000000000000000000000000d8ff07200000000000000000000000000000000000000000d8ff07203106000878670008000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cdcccc3d00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000d8ff072000000000#3a -[38.888] read(): <13> Rx: $vCont;s:1;c#c1 -[38.890] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[38.897] handle_vCont_s(): handle_vCont_s, step thread -[38.897] write(): <13> Tx: $OK#9a -[38.907] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[38.907] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[38.913] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[38.913] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[38.939] read(): <13> Rx: $vStopped#55 -[38.939] write(): <13> Tx: $OK#9a -[38.939] read(): <13> Rx: $g#67 -[38.946] write(): <13> Tx: $6846000008000000f0ff0720dcff0720000000000000000000000000d8ff07200000000000000000000000000000000000000000d8ff0720310600087a670008000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cdcccc3d00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000d8ff072000000000#35 -[38.946] read(): <13> Rx: $vCont;s:1;c#c1 -[38.947] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[38.954] handle_vCont_s(): handle_vCont_s, step thread -[38.954] write(): <13> Tx: $OK#9a -[38.964] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[38.964] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[38.970] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[38.971] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[38.994] read(): <13> Rx: $vStopped#55 -[38.994] write(): <13> Tx: $OK#9a -[38.995] read(): <13> Rx: $g#67 -[39.001] write(): <13> Tx: $68460000f0ff0720f0ff0720dcff0720000000000000000000000000d8ff07200000000000000000000000000000000000000000d8ff0720310600087c670008000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cdcccc3d00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000d8ff072000000000#da -[39.002] read(): <13> Rx: $vCont;s:1;c#c1 -[39.002] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[39.009] handle_vCont_s(): handle_vCont_s, step thread -[39.009] write(): <13> Tx: $OK#9a -[39.020] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[39.020] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[39.025] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[39.026] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[39.050] read(): <13> Rx: $vStopped#55 -[39.050] write(): <13> Tx: $OK#9a -[39.051] read(): <13> Rx: $g#67 -[39.058] write(): <13> Tx: $dcff0720f0ff0720f0ff0720dcff0720000000000000000000000000d8ff07200000000000000000000000000000000000000000d8ff0720310600087e670008000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cdcccc3d00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000d8ff072000000000#a0 -[39.058] read(): <13> Rx: $vCont;s:1;c#c1 -[39.058] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[39.065] handle_vCont_s(): handle_vCont_s, step thread -[39.065] write(): <13> Tx: $OK#9a -[39.076] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[39.076] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[39.081] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[39.082] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[39.106] read(): <13> Rx: $vStopped#55 -[39.106] write(): <13> Tx: $OK#9a -[39.106] read(): <13> Rx: $g#67 -[39.113] write(): <13> Tx: $dcff0720f0ff0720f0ff0720dcff0720000000000000000000000000d8ff07200000000000000000000000000000000000000000d8ff07208367000852630008000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cdcccc3d00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000d8ff072000000000#75 -[39.113] read(): <13> Rx: $m8006352,4#35 -[39.113] handlePacket(): Reading 0x4 bytes of memory from addr 0x8006352 -[39.114] write(): <13> Tx: $80b582b0#fb -[39.114] read(): <13> Rx: $m8006782,4#3c -[39.114] handlePacket(): Reading 0x4 bytes of memory from addr 0x8006782 -[39.115] write(): <13> Tx: $084800f0#ca -[39.115] read(): <13> Rx: $m8006340,40#62 -[39.115] handlePacket(): Reading 0x40 bytes of memory from addr 0x8006340 -[39.116] write(): <13> Tx: $3a681a61fb6818461437bd465df8047b704780b582b000af786039607b68d8687b68db681b681b687a6891683a689847034618460837bd4680bd80b483b000af#ce -[39.116] read(): <13> Rx: $m800635c,2#64 -[39.116] handlePacket(): Reading 0x2 bytes of memory from addr 0x800635c -[39.116] write(): <13> Tx: $7b68#07 -[39.116] read(): <13> Rx: $Z1,800635c,2#ae -[39.116] write(): <13> Tx: $OK#9a -[39.116] read(): <13> Rx: $vCont;c#a8 -[39.116] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[39.122] handle_vCont_c(): handle_vCont_c, continue thread -[39.122] write(): <13> Tx: $OK#9a -[39.132] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[39.132] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[39.138] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000003 -[39.139] write(): <13> Tx: %Stop:T05hwbreak:;thread:1;core:0;#7e -[39.162] read(): <13> Rx: $vStopped#55 -[39.162] write(): <13> Tx: $OK#9a -[39.162] read(): <13> Rx: $g#67 -[39.169] write(): <13> Tx: $dcff0720f0ff0720f0ff0720dcff0720000000000000000000000000c8ff07200000000000000000000000000000000000000000c8ff0720836700085c6300080000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008fc2f53c00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000c8ff072000000000#1d -[39.170] read(): <13> Rx: $z1,800635c,2#ce -[39.170] write(): <13> Tx: $OK#9a -[39.170] read(): <13> Rx: $m800635c,4#66 -[39.170] handlePacket(): Reading 0x4 bytes of memory from addr 0x800635c -[39.170] write(): <13> Tx: $7b68d868#11 -[39.170] read(): <13> Rx: $m2007ffc0,40#25 -[39.170] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ffc0 -[39.171] write(): <13> Tx: $f0ff0720dcff0720f0ff0720dcff0720d8ff072083670008010000002c860008f0ff07207d000000f404002000000000b08600080800002000000000db7f0008#4e -[39.171] read(): <13> Rx: $m8006782,4#3c -[39.171] handlePacket(): Reading 0x4 bytes of memory from addr 0x8006782 -[39.172] write(): <13> Tx: $084800f0#ca -[39.172] read(): <13> Rx: $m8006340,40#62 -[39.172] handlePacket(): Reading 0x40 bytes of memory from addr 0x8006340 -[39.173] write(): <13> Tx: $3a681a61fb6818461437bd465df8047b704780b582b000af786039607b68d8687b68db681b681b687a6891683a689847034618460837bd4680bd80b483b000af#ce -[39.173] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[39.173] write(): <13> Tx: $l#8b -[39.177] read(): <13> Rx: $m200004f0,4#89 -[39.177] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[39.177] write(): <13> Tx: $00000000#80 -[39.402] read(): <13> Rx: $m2007ffc0,40#25 -[39.402] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ffc0 -[39.403] write(): <13> Tx: $f0ff0720dcff0720f0ff0720dcff0720d8ff072083670008010000002c860008f0ff07207d000000f404002000000000b08600080800002000000000db7f0008#4e -[39.403] read(): <13> Rx: $m8007fda,4#c7 -[39.403] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007fda -[39.403] write(): <13> Tx: $70470000#92 -[39.404] read(): <13> Rx: $m8007f80,40#9a -[39.404] handlePacket(): Reading 0x40 bytes of memory from addr 0x8007f80 -[39.404] write(): <13> Tx: $1a68bb681a447b681a603b68fa681a6000bf1437bd465df8047b7047834b040000ca9a3bdff834d0002103e00c4b5b58435004310b480c4b42189a42f6d30b4a#cf -[39.404] read(): <13> Rx: $m8007fdc,4#c9 -[39.404] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007fdc -[39.404] write(): <13> Tx: $00000820#8a -[39.405] read(): <13> Rx: $m2007ffc0,40#25 -[39.405] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ffc0 -[39.406] write(): <13> Tx: $f0ff0720dcff0720f0ff0720dcff0720d8ff072083670008010000002c860008f0ff07207d000000f404002000000000b08600080800002000000000db7f0008#4e -[39.406] read(): <13> Rx: $m2007ffc0,40#25 -[39.406] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ffc0 -[39.407] write(): <13> Tx: $f0ff0720dcff0720f0ff0720dcff0720d8ff072083670008010000002c860008f0ff07207d000000f404002000000000b08600080800002000000000db7f0008#4e -[39.407] read(): <13> Rx: $m2007fff0,4#f8 -[39.407] handlePacket(): Reading 0x4 bytes of memory from addr 0x2007fff0 -[39.407] write(): <13> Tx: $b0860008#c8 -[39.407] read(): <13> Rx: $m80086a8,4#6c -[39.407] handlePacket(): Reading 0x4 bytes of memory from addr 0x80086a8 -[39.408] write(): <13> Tx: $00000000#80 -[39.408] read(): <13> Rx: $m2007fff0,4#f8 -[39.408] handlePacket(): Reading 0x4 bytes of memory from addr 0x2007fff0 -[39.408] write(): <13> Tx: $b0860008#c8 -[39.408] read(): <13> Rx: $m80086a8,4#6c -[39.408] handlePacket(): Reading 0x4 bytes of memory from addr 0x80086a8 -[39.408] write(): <13> Tx: $00000000#80 -[39.408] read(): <13> Rx: $m2007fff0,4#f8 -[39.408] handlePacket(): Reading 0x4 bytes of memory from addr 0x2007fff0 -[39.409] write(): <13> Tx: $b0860008#c8 -[39.409] read(): <13> Rx: $m80086a8,4#6c -[39.409] handlePacket(): Reading 0x4 bytes of memory from addr 0x80086a8 -[39.409] write(): <13> Tx: $00000000#80 -[39.409] read(): <13> Rx: $m2007fff0,4#f8 -[39.409] handlePacket(): Reading 0x4 bytes of memory from addr 0x2007fff0 -[39.409] write(): <13> Tx: $b0860008#c8 -[39.409] read(): <13> Rx: $m80086a8,4#6c -[39.409] handlePacket(): Reading 0x4 bytes of memory from addr 0x80086a8 -[39.410] write(): <13> Tx: $00000000#80 -[39.410] read(): <13> Rx: $m2007fff0,4#f8 -[39.410] handlePacket(): Reading 0x4 bytes of memory from addr 0x2007fff0 -[39.410] write(): <13> Tx: $b0860008#c8 -[39.410] read(): <13> Rx: $m80086a8,4#6c -[39.410] handlePacket(): Reading 0x4 bytes of memory from addr 0x80086a8 -[39.410] write(): <13> Tx: $00000000#80 -[39.435] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[39.435] write(): <13> Tx: $l#8b -[39.435] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[39.435] write(): <13> Tx: $l#8b -[39.435] read(): <13> Rx: $m2007ffc0,40#25 -[39.435] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ffc0 -[39.436] write(): <13> Tx: $f0ff0720dcff0720f0ff0720dcff0720d8ff072083670008010000002c860008f0ff07207d000000f404002000000000b08600080800002000000000db7f0008#4e -[40.047] read(): <13> Rx: $vCont;s:1;c#c1 -[40.047] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[40.054] handle_vCont_s(): handle_vCont_s, step thread -[40.054] write(): <13> Tx: $OK#9a -[40.064] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[40.064] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[40.070] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[40.070] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[40.070] read(): <13> Rx: $vStopped#55 -[40.070] write(): <13> Tx: $OK#9a -[40.070] read(): <13> Rx: $g#67 -[40.077] write(): <13> Tx: $dcff0720f0ff0720f0ff0720dcff0720000000000000000000000000c8ff07200000000000000000000000000000000000000000c8ff0720836700085e6300080000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008fc2f53c00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000c8ff072000000000#1f -[40.077] read(): <13> Rx: $vCont;s:1;c#c1 -[40.077] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[40.084] handle_vCont_s(): handle_vCont_s, step thread -[40.084] write(): <13> Tx: $OK#9a -[40.095] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[40.095] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[40.101] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[40.101] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[40.126] read(): <13> Rx: $vStopped#55 -[40.126] write(): <13> Tx: $OK#9a -[40.127] read(): <13> Rx: $g#67 -[40.133] write(): <13> Tx: $f4040020f0ff0720f0ff0720dcff0720000000000000000000000000c8ff07200000000000000000000000000000000000000000c8ff072083670008606300080000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008fc2f53c00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000c8ff072000000000#4f -[40.134] read(): <13> Rx: $vCont;s:1;c#c1 -[40.134] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[40.141] handle_vCont_s(): handle_vCont_s, step thread -[40.141] write(): <13> Tx: $OK#9a -[40.151] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[40.151] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[40.157] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[40.157] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[40.183] read(): <13> Rx: $vStopped#55 -[40.183] write(): <13> Tx: $OK#9a -[40.183] read(): <13> Rx: $g#67 -[40.190] write(): <13> Tx: $f4040020f0ff0720f0ff0720dcff0720000000000000000000000000c8ff07200000000000000000000000000000000000000000c8ff072083670008626300080000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008fc2f53c00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000c8ff072000000000#51 -[40.190] read(): <13> Rx: $vCont;s:1;c#c1 -[40.190] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[40.197] handle_vCont_s(): handle_vCont_s, step thread -[40.197] write(): <13> Tx: $OK#9a -[40.207] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[40.207] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[40.213] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[40.214] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[40.242] read(): <13> Rx: $vStopped#55 -[40.242] write(): <13> Tx: $OK#9a -[40.243] read(): <13> Rx: $g#67 -[40.250] write(): <13> Tx: $f4040020f0ff0720f0ff0720f4040020000000000000000000000000c8ff07200000000000000000000000000000000000000000c8ff072083670008646300080000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008fc2f53c00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000c8ff072000000000#b7 -[40.250] read(): <13> Rx: $vCont;s:1;c#c1 -[40.250] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[40.257] handle_vCont_s(): handle_vCont_s, step thread -[40.257] write(): <13> Tx: $OK#9a -[40.268] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[40.268] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[40.273] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[40.274] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[40.298] read(): <13> Rx: $vStopped#55 -[40.298] write(): <13> Tx: $OK#9a -[40.299] read(): <13> Rx: $g#67 -[40.305] write(): <13> Tx: $f4040020f0ff0720f0ff07209c860008000000000000000000000000c8ff07200000000000000000000000000000000000000000c8ff072083670008666300080000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008fc2f53c00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000c8ff072000000000#cb -[40.306] read(): <13> Rx: $vCont;s:1;c#c1 -[40.306] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[40.313] handle_vCont_s(): handle_vCont_s, step thread -[40.313] write(): <13> Tx: $OK#9a -[40.323] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[40.323] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[40.329] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[40.330] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[40.355] read(): <13> Rx: $vStopped#55 -[40.355] write(): <13> Tx: $OK#9a -[40.355] read(): <13> Rx: $g#67 -[40.362] write(): <13> Tx: $f4040020f0ff0720f0ff07202d770008000000000000000000000000c8ff07200000000000000000000000000000000000000000c8ff072083670008686300080000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008fc2f53c00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000c8ff072000000000#c7 -[40.362] read(): <13> Rx: $vCont;s:1;c#c1 -[40.362] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[40.369] handle_vCont_s(): handle_vCont_s, step thread -[40.369] write(): <13> Tx: $OK#9a -[40.380] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[40.380] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[40.386] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[40.387] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[40.410] read(): <13> Rx: $vStopped#55 -[40.410] write(): <13> Tx: $OK#9a -[40.411] read(): <13> Rx: $g#67 -[40.417] write(): <13> Tx: $f4040020f0ff0720dcff07202d770008000000000000000000000000c8ff07200000000000000000000000000000000000000000c8ff0720836700086a6300080000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008fc2f53c00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000c8ff072000000000#21 -[40.418] read(): <13> Rx: $vCont;s:1;c#c1 -[40.418] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[40.425] handle_vCont_s(): handle_vCont_s, step thread -[40.425] write(): <13> Tx: $OK#9a -[40.436] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[40.436] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[40.442] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[40.442] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[40.466] read(): <13> Rx: $vStopped#55 -[40.466] write(): <13> Tx: $OK#9a -[40.467] read(): <13> Rx: $g#67 -[40.473] write(): <13> Tx: $f40400207d000000dcff07202d770008000000000000000000000000c8ff07200000000000000000000000000000000000000000c8ff0720836700086c6300080000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008fc2f53c00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000c8ff072000000000#b3 -[40.474] read(): <13> Rx: $vCont;s:1;c#c1 -[40.474] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[40.481] handle_vCont_s(): handle_vCont_s, step thread -[40.481] write(): <13> Tx: $OK#9a -[40.492] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[40.492] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[40.498] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[40.498] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[40.526] read(): <13> Rx: $vStopped#55 -[40.526] write(): <13> Tx: $OK#9a -[40.527] read(): <13> Rx: $g#67 -[40.533] write(): <13> Tx: $f40400207d000000f0ff07202d770008000000000000000000000000c8ff07200000000000000000000000000000000000000000c8ff0720836700086e6300080000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008fc2f53c00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000c8ff072000000000#84 -[40.534] read(): <13> Rx: $vCont;s:1;c#c1 -[40.534] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[40.541] handle_vCont_s(): handle_vCont_s, step thread -[40.541] write(): <13> Tx: $OK#9a -[40.552] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[40.552] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[40.558] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[40.558] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[40.586] read(): <13> Rx: $vStopped#55 -[40.586] write(): <13> Tx: $OK#9a -[40.586] read(): <13> Rx: $g#67 -[40.593] write(): <13> Tx: $f40400207d000000f0ff07202d770008000000000000000000000000c8ff07200000000000000000000000000000000000000000c8ff0720716300082c7700080000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008fc2f53c00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000c8ff072000000000#7c -[40.593] read(): <13> Rx: $m800772c,4#68 -[40.593] handlePacket(): Reading 0x4 bytes of memory from addr 0x800772c -[40.594] write(): <13> Tx: $80b588b0#01 -[40.594] read(): <13> Rx: $m8006370,4#35 -[40.594] handlePacket(): Reading 0x4 bytes of memory from addr 0x8006370 -[40.594] write(): <13> Tx: $03461846#a0 -[40.594] read(): <13> Rx: $m8007700,40#63 -[40.594] handlePacket(): Reading 0x40 bytes of memory from addr 0x8007700 -[40.595] write(): <13> Tx: $1946786800f0a4f87b6804331846fef755ff02467b68c3f8882600bf1837bd4680bd00bfd34d621040420f0080b588b000aff860b9607a60bb68632b09ddfb68#f5 -[40.595] read(): <13> Rx: $m8007738,2#3c -[40.595] handlePacket(): Reading 0x2 bytes of memory from addr 0x8007738 -[40.596] write(): <13> Tx: $bb68#32 -[40.596] read(): <13> Rx: $Z1,8007738,2#86 -[40.596] write(): <13> Tx: $OK#9a -[40.596] read(): <13> Rx: $vCont;c#a8 -[40.596] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[40.602] handle_vCont_c(): handle_vCont_c, continue thread -[40.602] write(): <13> Tx: $OK#9a -[40.602] read(): <13> Rx: $T1#85 -[40.602] write(): <13> Tx: $OK#9a -[40.602] read(): <13> Rx: $T1#85 -[40.602] write(): <13> Tx: $OK#9a -[40.613] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[40.613] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[40.618] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000003 -[40.619] write(): <13> Tx: %Stop:T05hwbreak:;thread:1;core:0;#7e -[40.647] read(): <13> Rx: $vStopped#55 -[40.647] write(): <13> Tx: $OK#9a -[40.647] read(): <13> Rx: $g#67 -[40.654] write(): <13> Tx: $f40400207d000000f0ff07202d770008000000000000000000000000a0ff07200000000000000000000000000000000000000000a0ff072071630008387700080000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000a0ff072000000000#ce -[40.654] read(): <13> Rx: $z1,8007738,2#a6 -[40.654] write(): <13> Tx: $OK#9a -[40.654] read(): <13> Rx: $m8007738,4#3e -[40.654] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007738 -[40.655] write(): <13> Tx: $bb68632b#2f -[40.655] read(): <13> Rx: $m2007ffc0,40#25 -[40.655] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ffc0 -[40.656] write(): <13> Tx: $c8ff072071630008f0ff0720dcff0720d8ff072083670008010000002c860008f0ff07207d000000f404002000000000b08600080800002000000000db7f0008#90 -[40.656] read(): <13> Rx: $m8006370,4#35 -[40.656] handlePacket(): Reading 0x4 bytes of memory from addr 0x8006370 -[40.656] write(): <13> Tx: $03461846#a0 -[40.656] read(): <13> Rx: $m8007700,40#63 -[40.656] handlePacket(): Reading 0x40 bytes of memory from addr 0x8007700 -[40.657] write(): <13> Tx: $1946786800f0a4f87b6804331846fef755ff02467b68c3f8882600bf1837bd4680bd00bfd34d621040420f0080b588b000aff860b9607a60bb68632b09ddfb68#f5 -[40.657] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[40.657] write(): <13> Tx: $l#8b -[40.657] read(): <13> Rx: $m2007ff80,40#fa -[40.657] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff80 -[40.658] write(): <13> Tx: $00000000e400002090ff07200b280008bcff0720e4000020a0ff0720a0ff0720c8ff0720f0ff07207d000000f4040020f0ff07202d7700080000000071630008#44 -[40.669] read(): <13> Rx: $m200004f0,4#89 -[40.669] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[40.669] write(): <13> Tx: $00000000#80 -[40.677] read(): <13> Rx: $m2007ffc0,40#25 -[40.677] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ffc0 -[40.677] write(): <13> Tx: $c8ff072071630008f0ff0720dcff0720d8ff072083670008010000002c860008f0ff07207d000000f404002000000000b08600080800002000000000db7f0008#90 -[40.678] read(): <13> Rx: $m8006782,4#3c -[40.678] handlePacket(): Reading 0x4 bytes of memory from addr 0x8006782 -[40.678] write(): <13> Tx: $084800f0#ca -[40.678] read(): <13> Rx: $m8007fda,4#c7 -[40.678] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007fda -[40.679] write(): <13> Tx: $70470000#92 -[40.679] read(): <13> Rx: $m8007f80,40#9a -[40.679] handlePacket(): Reading 0x40 bytes of memory from addr 0x8007f80 -[40.679] write(): <13> Tx: $1a68bb681a447b681a603b68fa681a6000bf1437bd465df8047b7047834b040000ca9a3bdff834d0002103e00c4b5b58435004310b480c4b42189a42f6d30b4a#cf -[40.680] read(): <13> Rx: $m8007fdc,4#c9 -[40.680] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007fdc -[40.680] write(): <13> Tx: $00000820#8a -[40.811] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[40.811] write(): <13> Tx: $l#8b -[40.812] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[40.812] write(): <13> Tx: $l#8b -[40.812] read(): <13> Rx: $m2007ff80,40#fa -[40.812] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff80 -[40.813] write(): <13> Tx: $00000000e400002090ff07200b280008bcff0720e4000020a0ff0720a0ff0720c8ff0720f0ff07207d000000f4040020f0ff07202d7700080000000071630008#44 -[40.815] read(): <13> Rx: $m2007ff80,40#fa -[40.815] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff80 -[40.816] write(): <13> Tx: $00000000e400002090ff07200b280008bcff0720e4000020a0ff0720a0ff0720c8ff0720f0ff07207d000000f4040020f0ff07202d7700080000000071630008#44 -[40.868] read(): <13> Rx: $m2007ff80,40#fa -[40.868] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff80 -[40.869] write(): <13> Tx: $00000000e400002090ff07200b280008bcff0720e4000020a0ff0720a0ff0720c8ff0720f0ff07207d000000f4040020f0ff07202d7700080000000071630008#44 -[40.869] read(): <13> Rx: $m200004f4,4#8d -[40.869] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f4 -[40.869] write(): <13> Tx: $9c860008#d2 -[40.869] read(): <13> Rx: $m8008694,4#40 -[40.869] handlePacket(): Reading 0x4 bytes of memory from addr 0x8008694 -[40.869] write(): <13> Tx: $00000000#80 -[40.869] read(): <13> Rx: $m200004f4,4#8d -[40.869] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f4 -[40.870] write(): <13> Tx: $9c860008#d2 -[40.870] read(): <13> Rx: $m8008694,4#40 -[40.870] handlePacket(): Reading 0x4 bytes of memory from addr 0x8008694 -[40.870] write(): <13> Tx: $00000000#80 -[40.870] read(): <13> Rx: $m200004f4,4#8d -[40.870] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f4 -[40.870] write(): <13> Tx: $9c860008#d2 -[40.870] read(): <13> Rx: $m8008694,4#40 -[40.870] handlePacket(): Reading 0x4 bytes of memory from addr 0x8008694 -[40.871] write(): <13> Tx: $00000000#80 -[40.871] read(): <13> Rx: $m2007ff80,40#fa -[40.871] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff80 -[40.872] write(): <13> Tx: $00000000e400002090ff07200b280008bcff0720e4000020a0ff0720a0ff0720c8ff0720f0ff07207d000000f4040020f0ff07202d7700080000000071630008#44 -[40.873] read(): <13> Rx: $m2007ff80,40#fa -[40.873] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff80 -[40.873] write(): <13> Tx: $00000000e400002090ff07200b280008bcff0720e4000020a0ff0720a0ff0720c8ff0720f0ff07207d000000f4040020f0ff07202d7700080000000071630008#44 -[40.873] read(): <13> Rx: $m2007fff0,4#f8 -[40.873] handlePacket(): Reading 0x4 bytes of memory from addr 0x2007fff0 -[40.874] write(): <13> Tx: $b0860008#c8 -[40.874] read(): <13> Rx: $m80086a8,4#6c -[40.874] handlePacket(): Reading 0x4 bytes of memory from addr 0x80086a8 -[40.874] write(): <13> Tx: $00000000#80 -[40.874] read(): <13> Rx: $m2007fff0,4#f8 -[40.874] handlePacket(): Reading 0x4 bytes of memory from addr 0x2007fff0 -[40.874] write(): <13> Tx: $b0860008#c8 -[40.874] read(): <13> Rx: $m80086a8,4#6c -[40.874] handlePacket(): Reading 0x4 bytes of memory from addr 0x80086a8 -[40.875] write(): <13> Tx: $00000000#80 -[40.875] read(): <13> Rx: $m2007fff0,4#f8 -[40.875] handlePacket(): Reading 0x4 bytes of memory from addr 0x2007fff0 -[40.875] write(): <13> Tx: $b0860008#c8 -[40.875] read(): <13> Rx: $m80086a8,4#6c -[40.875] handlePacket(): Reading 0x4 bytes of memory from addr 0x80086a8 -[40.875] write(): <13> Tx: $00000000#80 -[40.875] read(): <13> Rx: $m2007fff0,4#f8 -[40.875] handlePacket(): Reading 0x4 bytes of memory from addr 0x2007fff0 -[40.876] write(): <13> Tx: $b0860008#c8 -[40.876] read(): <13> Rx: $m80086a8,4#6c -[40.876] handlePacket(): Reading 0x4 bytes of memory from addr 0x80086a8 -[40.876] write(): <13> Tx: $00000000#80 -[40.876] read(): <13> Rx: $m2007fff0,4#f8 -[40.876] handlePacket(): Reading 0x4 bytes of memory from addr 0x2007fff0 -[40.876] write(): <13> Tx: $b0860008#c8 -[40.876] read(): <13> Rx: $m80086a8,4#6c -[40.876] handlePacket(): Reading 0x4 bytes of memory from addr 0x80086a8 -[40.877] write(): <13> Tx: $00000000#80 -[40.877] read(): <13> Rx: $m2007ff80,40#fa -[40.877] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff80 -[40.878] write(): <13> Tx: $00000000e400002090ff07200b280008bcff0720e4000020a0ff0720a0ff0720c8ff0720f0ff07207d000000f4040020f0ff07202d7700080000000071630008#44 -[40.878] read(): <13> Rx: $m2007ff80,40#fa -[40.878] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff80 -[40.879] write(): <13> Tx: $00000000e400002090ff07200b280008bcff0720e4000020a0ff0720a0ff0720c8ff0720f0ff07207d000000f4040020f0ff07202d7700080000000071630008#44 -[41.376] read(): <13> Rx: $vCont;s:1;c#c1 -[41.377] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[41.383] handle_vCont_s(): handle_vCont_s, step thread -[41.384] write(): <13> Tx: $OK#9a -[41.394] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[41.394] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[41.400] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[41.400] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[41.400] read(): <13> Rx: $vStopped#55 -[41.400] write(): <13> Tx: $OK#9a -[41.401] read(): <13> Rx: $g#67 -[41.407] write(): <13> Tx: $f40400207d000000f0ff07207d000000000000000000000000000000a0ff07200000000000000000000000000000000000000000a0ff0720716300083a7700080000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000a0ff072000000000#e6 -[41.408] read(): <13> Rx: $vCont;s:1;c#c1 -[41.408] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[41.414] handle_vCont_s(): handle_vCont_s, step thread -[41.414] write(): <13> Tx: $OK#9a -[41.425] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[41.425] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[41.431] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[41.431] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[41.458] read(): <13> Rx: $vStopped#55 -[41.459] write(): <13> Tx: $OK#9a -[41.459] read(): <13> Rx: $g#67 -[41.465] write(): <13> Tx: $f40400207d000000f0ff07207d000000000000000000000000000000a0ff07200000000000000000000000000000000000000000a0ff0720716300083c7700080000002100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000a0ff072000000000#ea -[41.466] read(): <13> Rx: $vCont;s:1;c#c1 -[41.466] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[41.473] handle_vCont_s(): handle_vCont_s, step thread -[41.473] write(): <13> Tx: $OK#9a -[41.484] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[41.484] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[41.489] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[41.491] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[41.514] read(): <13> Rx: $vStopped#55 -[41.514] write(): <13> Tx: $OK#9a -[41.515] read(): <13> Rx: $g#67 -[41.521] write(): <13> Tx: $f40400207d000000f0ff07207d000000000000000000000000000000a0ff07200000000000000000000000000000000000000000a0ff0720716300083e7700080000002100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000a0ff072000000000#ec -[41.522] read(): <13> Rx: $vCont;s:1;c#c1 -[41.522] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[41.529] handle_vCont_s(): handle_vCont_s, step thread -[41.529] write(): <13> Tx: $OK#9a -[41.540] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[41.540] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[41.545] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[41.546] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[41.570] read(): <13> Rx: $vStopped#55 -[41.570] write(): <13> Tx: $OK#9a -[41.570] read(): <13> Rx: $g#67 -[41.577] write(): <13> Tx: $f40400207d000000f0ff0720f4040020000000000000000000000000a0ff07200000000000000000000000000000000000000000a0ff072071630008407700080000002100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000a0ff072000000000#bd -[41.577] read(): <13> Rx: $vCont;s:1;c#c1 -[41.577] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[41.584] handle_vCont_s(): handle_vCont_s, step thread -[41.584] write(): <13> Tx: $OK#9a -[41.595] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[41.595] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[41.601] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[41.601] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[41.626] read(): <13> Rx: $vStopped#55 -[41.626] write(): <13> Tx: $OK#9a -[41.627] read(): <13> Rx: $g#67 -[41.633] write(): <13> Tx: $f40400207d000000f0ff072000000000000000000000000000000000a0ff07200000000000000000000000000000000000000000a0ff072071630008447700080000002100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000a0ff072000000000#81 -[41.634] read(): <13> Rx: $vCont;s:1;c#c1 -[41.634] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[41.640] handle_vCont_s(): handle_vCont_s, step thread -[41.641] write(): <13> Tx: $OK#9a -[41.651] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[41.651] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[41.656] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[41.657] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[41.682] read(): <13> Rx: $vStopped#55 -[41.682] write(): <13> Tx: $OK#9a -[41.682] read(): <13> Rx: $g#67 -[41.689] write(): <13> Tx: $f40400207d000000f0ff072001000000000000000000000000000000a0ff07200000000000000000000000000000000000000000a0ff072071630008487700080000002100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000a0ff072000000000#86 -[41.689] read(): <13> Rx: $vCont;s:1;c#c1 -[41.689] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[41.695] handle_vCont_s(): handle_vCont_s, step thread -[41.695] write(): <13> Tx: $OK#9a -[41.706] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[41.706] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[41.711] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[41.712] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[41.738] read(): <13> Rx: $vStopped#55 -[41.738] write(): <13> Tx: $OK#9a -[41.738] read(): <13> Rx: $g#67 -[41.745] write(): <13> Tx: $f40400207d000000f0ff072001000000000000000000000000000000a0ff07200000000000000000000000000000000000000000a0ff0720716300084a7700080000002100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000a0ff072000000000#af -[41.745] read(): <13> Rx: $vCont;s:1;c#c1 -[41.745] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[41.751] handle_vCont_s(): handle_vCont_s, step thread -[41.751] write(): <13> Tx: $OK#9a -[41.762] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[41.762] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[41.767] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[41.768] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[41.794] read(): <13> Rx: $vStopped#55 -[41.794] write(): <13> Tx: $OK#9a -[41.794] read(): <13> Rx: $g#67 -[41.801] write(): <13> Tx: $f40400207d000000f0ff072001000000000000000000000000000000a0ff07200000000000000000000000000000000000000000a0ff0720716300084c7700080000002100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000a0ff072000000000#b1 -[41.801] read(): <13> Rx: $vCont;s:1;c#c1 -[41.801] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[41.808] handle_vCont_s(): handle_vCont_s, step thread -[41.808] write(): <13> Tx: $OK#9a -[41.818] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[41.818] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[41.824] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[41.824] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[41.850] read(): <13> Rx: $vStopped#55 -[41.850] write(): <13> Tx: $OK#9a -[41.851] read(): <13> Rx: $g#67 -[41.857] write(): <13> Tx: $f40400207d000000f0ff072001000000000000000000000000000000a0ff07200000000000000000000000000000000000000000a0ff0720716300084e7700080000002100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000a0ff072000000000#b3 -[41.857] read(): <13> Rx: $m800774e,4#6c -[41.857] handlePacket(): Reading 0x4 bytes of memory from addr 0x800774e -[41.858] write(): <13> Tx: $002377e0#c8 -[41.858] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[41.859] write(): <13> Tx: $l#8b -[41.859] read(): <13> Rx: $m2007ffc0,40#25 -[41.859] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ffc0 -[41.860] write(): <13> Tx: $c8ff072071630008f0ff0720dcff0720d8ff072083670008010000002c860008f0ff07207d000000f404002000000000b08600080800002000000000db7f0008#90 -[41.860] read(): <13> Rx: $m8006370,4#35 -[41.860] handlePacket(): Reading 0x4 bytes of memory from addr 0x8006370 -[41.861] write(): <13> Tx: $03461846#a0 -[41.861] read(): <13> Rx: $m2007ff80,40#fa -[41.861] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff80 -[41.862] write(): <13> Tx: $00000000e400002090ff07200b280008bcff0720e4000020a0ff0720a0ff0720c8ff0720f0ff07207d000000f4040020f0ff07202d7700080000000071630008#44 -[41.869] read(): <13> Rx: $m2007ff80,40#fa -[41.869] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff80 -[41.870] write(): <13> Tx: $00000000e400002090ff07200b280008bcff0720e4000020a0ff0720a0ff0720c8ff0720f0ff07207d000000f4040020f0ff07202d7700080000000071630008#44 -[41.870] read(): <13> Rx: $m200004f0,4#89 -[41.870] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[41.871] write(): <13> Tx: $00000000#80 -[41.886] read(): <13> Rx: $m2007ffc0,40#25 -[41.886] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ffc0 -[41.887] write(): <13> Tx: $c8ff072071630008f0ff0720dcff0720d8ff072083670008010000002c860008f0ff07207d000000f404002000000000b08600080800002000000000db7f0008#90 -[41.887] read(): <13> Rx: $m8006782,4#3c -[41.887] handlePacket(): Reading 0x4 bytes of memory from addr 0x8006782 -[41.889] write(): <13> Tx: $084800f0#ca -[41.889] read(): <13> Rx: $m8007fda,4#c7 -[41.889] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007fda -[41.890] write(): <13> Tx: $70470000#92 -[41.890] read(): <13> Rx: $m8007f80,40#9a -[41.890] handlePacket(): Reading 0x40 bytes of memory from addr 0x8007f80 -[41.891] write(): <13> Tx: $1a68bb681a447b681a603b68fa681a6000bf1437bd465df8047b7047834b040000ca9a3bdff834d0002103e00c4b5b58435004310b480c4b42189a42f6d30b4a#cf -[41.891] read(): <13> Rx: $m8007fdc,4#c9 -[41.891] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007fdc -[41.891] write(): <13> Tx: $00000820#8a -[41.962] read(): <13> Rx: $m2007ff80,40#fa -[41.963] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff80 -[41.963] write(): <13> Tx: $00000000e400002090ff07200b280008bcff0720e4000020a0ff0720a0ff0720c8ff0720f0ff07207d000000f4040020f0ff07202d7700080000000071630008#44 -[41.963] read(): <13> Rx: $m200004f4,4#8d -[41.963] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f4 -[41.964] write(): <13> Tx: $9c860008#d2 -[41.964] read(): <13> Rx: $m8008694,4#40 -[41.964] handlePacket(): Reading 0x4 bytes of memory from addr 0x8008694 -[41.964] write(): <13> Tx: $00000000#80 -[41.964] read(): <13> Rx: $m200004f4,4#8d -[41.964] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f4 -[41.964] write(): <13> Tx: $9c860008#d2 -[41.965] read(): <13> Rx: $m8008694,4#40 -[41.965] handlePacket(): Reading 0x4 bytes of memory from addr 0x8008694 -[41.965] write(): <13> Tx: $00000000#80 -[41.965] read(): <13> Rx: $m2007ff80,40#fa -[41.965] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff80 -[41.966] write(): <13> Tx: $00000000e400002090ff07200b280008bcff0720e4000020a0ff0720a0ff0720c8ff0720f0ff07207d000000f4040020f0ff07202d7700080000000071630008#44 -[41.966] read(): <13> Rx: $m2007ff80,40#fa -[41.966] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff80 -[41.966] write(): <13> Tx: $00000000e400002090ff07200b280008bcff0720e4000020a0ff0720a0ff0720c8ff0720f0ff07207d000000f4040020f0ff07202d7700080000000071630008#44 -[41.967] read(): <13> Rx: $m2007fff0,4#f8 -[41.967] handlePacket(): Reading 0x4 bytes of memory from addr 0x2007fff0 -[41.967] write(): <13> Tx: $b0860008#c8 -[41.967] read(): <13> Rx: $m80086a8,4#6c -[41.967] handlePacket(): Reading 0x4 bytes of memory from addr 0x80086a8 -[41.967] write(): <13> Tx: $00000000#80 -[41.967] read(): <13> Rx: $m2007fff0,4#f8 -[41.967] handlePacket(): Reading 0x4 bytes of memory from addr 0x2007fff0 -[41.967] write(): <13> Tx: $b0860008#c8 -[41.967] read(): <13> Rx: $m80086a8,4#6c -[41.967] handlePacket(): Reading 0x4 bytes of memory from addr 0x80086a8 -[41.968] write(): <13> Tx: $00000000#80 -[41.968] read(): <13> Rx: $m2007ff80,40#fa -[41.968] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff80 -[41.969] write(): <13> Tx: $00000000e400002090ff07200b280008bcff0720e4000020a0ff0720a0ff0720c8ff0720f0ff07207d000000f4040020f0ff07202d7700080000000071630008#44 -[41.969] read(): <13> Rx: $m2007ff80,40#fa -[41.969] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff80 -[41.969] write(): <13> Tx: $00000000e400002090ff07200b280008bcff0720e4000020a0ff0720a0ff0720c8ff0720f0ff07207d000000f4040020f0ff07202d7700080000000071630008#44 -[41.970] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[41.970] write(): <13> Tx: $l#8b -[41.970] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[41.970] write(): <13> Tx: $l#8b -[41.970] read(): <13> Rx: $m2007ff80,40#fa -[41.970] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff80 -[41.971] write(): <13> Tx: $00000000e400002090ff07200b280008bcff0720e4000020a0ff0720a0ff0720c8ff0720f0ff07207d000000f4040020f0ff07202d7700080000000071630008#44 -[42.311] read(): <13> Rx: $vCont;s:1;c#c1 -[42.312] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[42.319] handle_vCont_s(): handle_vCont_s, step thread -[42.319] write(): <13> Tx: $OK#9a -[42.329] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[42.330] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[42.335] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[42.336] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[42.336] read(): <13> Rx: $vStopped#55 -[42.336] write(): <13> Tx: $OK#9a -[42.336] read(): <13> Rx: $g#67 -[42.343] write(): <13> Tx: $f40400207d000000f0ff072000000000000000000000000000000000a0ff07200000000000000000000000000000000000000000a0ff072071630008507700080000006100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000a0ff072000000000#82 -[42.343] read(): <13> Rx: $vCont;s:1;c#c1 -[42.346] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[42.352] handle_vCont_s(): handle_vCont_s, step thread -[42.352] write(): <13> Tx: $OK#9a -[42.363] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[42.363] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[42.369] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[42.369] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[42.394] read(): <13> Rx: $vStopped#55 -[42.394] write(): <13> Tx: $OK#9a -[42.395] read(): <13> Rx: $g#67 -[42.401] write(): <13> Tx: $f40400207d000000f0ff072000000000000000000000000000000000a0ff07200000000000000000000000000000000000000000a0ff072071630008427800080000006100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000a0ff072000000000#84 -[42.402] read(): <13> Rx: $m8007842,4#3a -[42.402] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007842 -[42.403] write(): <13> Tx: $18462037#9f -[42.403] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[42.403] write(): <13> Tx: $l#8b -[42.404] read(): <13> Rx: $m2007ffc0,40#25 -[42.404] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ffc0 -[42.405] write(): <13> Tx: $c8ff072071630008f0ff0720dcff0720d8ff072083670008010000002c860008f0ff07207d000000f404002000000000b08600080800002000000000db7f0008#90 -[42.405] read(): <13> Rx: $m8006370,4#35 -[42.405] handlePacket(): Reading 0x4 bytes of memory from addr 0x8006370 -[42.406] write(): <13> Tx: $03461846#a0 -[42.406] read(): <13> Rx: $m2007ff80,40#fa -[42.406] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff80 -[42.407] write(): <13> Tx: $00000000e400002090ff07200b280008bcff0720e4000020a0ff0720a0ff0720c8ff0720f0ff07207d000000f4040020f0ff07202d7700080000000071630008#44 -[42.417] read(): <13> Rx: $m2007ff80,40#fa -[42.417] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff80 -[42.418] write(): <13> Tx: $00000000e400002090ff07200b280008bcff0720e4000020a0ff0720a0ff0720c8ff0720f0ff07207d000000f4040020f0ff07202d7700080000000071630008#44 -[42.439] read(): <13> Rx: $m200004f0,4#89 -[42.439] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[42.439] write(): <13> Tx: $00000000#80 -[42.481] read(): <13> Rx: $m2007ffc0,40#25 -[42.481] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ffc0 -[42.482] write(): <13> Tx: $c8ff072071630008f0ff0720dcff0720d8ff072083670008010000002c860008f0ff07207d000000f404002000000000b08600080800002000000000db7f0008#90 -[42.482] read(): <13> Rx: $m8006782,4#3c -[42.482] handlePacket(): Reading 0x4 bytes of memory from addr 0x8006782 -[42.483] write(): <13> Tx: $084800f0#ca -[42.483] read(): <13> Rx: $m8007fda,4#c7 -[42.483] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007fda -[42.483] write(): <13> Tx: $70470000#92 -[42.483] read(): <13> Rx: $m8007f80,40#9a -[42.483] handlePacket(): Reading 0x40 bytes of memory from addr 0x8007f80 -[42.484] write(): <13> Tx: $1a68bb681a447b681a603b68fa681a6000bf1437bd465df8047b7047834b040000ca9a3bdff834d0002103e00c4b5b58435004310b480c4b42189a42f6d30b4a#cf -[42.484] read(): <13> Rx: $m8007fdc,4#c9 -[42.484] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007fdc -[42.484] write(): <13> Tx: $00000820#8a -[42.507] read(): <13> Rx: $m2007ff80,40#fa -[42.507] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff80 -[42.507] write(): <13> Tx: $00000000e400002090ff07200b280008bcff0720e4000020a0ff0720a0ff0720c8ff0720f0ff07207d000000f4040020f0ff07202d7700080000000071630008#44 -[42.507] read(): <13> Rx: $m200004f4,4#8d -[42.507] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f4 -[42.508] write(): <13> Tx: $9c860008#d2 -[42.508] read(): <13> Rx: $m8008694,4#40 -[42.508] handlePacket(): Reading 0x4 bytes of memory from addr 0x8008694 -[42.508] write(): <13> Tx: $00000000#80 -[42.508] read(): <13> Rx: $m200004f4,4#8d -[42.508] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f4 -[42.509] write(): <13> Tx: $9c860008#d2 -[42.509] read(): <13> Rx: $m8008694,4#40 -[42.509] handlePacket(): Reading 0x4 bytes of memory from addr 0x8008694 -[42.509] write(): <13> Tx: $00000000#80 -[42.509] read(): <13> Rx: $m2007ff80,40#fa -[42.509] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff80 -[42.510] write(): <13> Tx: $00000000e400002090ff07200b280008bcff0720e4000020a0ff0720a0ff0720c8ff0720f0ff07207d000000f4040020f0ff07202d7700080000000071630008#44 -[42.510] read(): <13> Rx: $m2007ff80,40#fa -[42.510] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff80 -[42.511] write(): <13> Tx: $00000000e400002090ff07200b280008bcff0720e4000020a0ff0720a0ff0720c8ff0720f0ff07207d000000f4040020f0ff07202d7700080000000071630008#44 -[42.511] read(): <13> Rx: $m2007fff0,4#f8 -[42.511] handlePacket(): Reading 0x4 bytes of memory from addr 0x2007fff0 -[42.512] write(): <13> Tx: $b0860008#c8 -[42.512] read(): <13> Rx: $m80086a8,4#6c -[42.512] handlePacket(): Reading 0x4 bytes of memory from addr 0x80086a8 -[42.512] write(): <13> Tx: $00000000#80 -[42.512] read(): <13> Rx: $m2007fff0,4#f8 -[42.512] handlePacket(): Reading 0x4 bytes of memory from addr 0x2007fff0 -[42.513] write(): <13> Tx: $b0860008#c8 -[42.513] read(): <13> Rx: $m80086a8,4#6c -[42.513] handlePacket(): Reading 0x4 bytes of memory from addr 0x80086a8 -[42.513] write(): <13> Tx: $00000000#80 -[42.513] read(): <13> Rx: $m2007ff80,40#fa -[42.513] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff80 -[42.514] write(): <13> Tx: $00000000e400002090ff07200b280008bcff0720e4000020a0ff0720a0ff0720c8ff0720f0ff07207d000000f4040020f0ff07202d7700080000000071630008#44 -[42.514] read(): <13> Rx: $m2007ff80,40#fa -[42.514] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff80 -[42.515] write(): <13> Tx: $00000000e400002090ff07200b280008bcff0720e4000020a0ff0720a0ff0720c8ff0720f0ff07207d000000f4040020f0ff07202d7700080000000071630008#44 -[42.515] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[42.515] write(): <13> Tx: $l#8b -[42.515] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[42.515] write(): <13> Tx: $l#8b -[42.515] read(): <13> Rx: $m2007ff80,40#fa -[42.515] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff80 -[42.516] write(): <13> Tx: $00000000e400002090ff07200b280008bcff0720e4000020a0ff0720a0ff0720c8ff0720f0ff07207d000000f4040020f0ff07202d7700080000000071630008#44 -[43.359] read(): <13> Rx: $vCont;s:1;c#c1 -[43.359] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[43.366] handle_vCont_s(): handle_vCont_s, step thread -[43.366] write(): <13> Tx: $OK#9a -[43.377] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[43.377] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[43.383] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[43.384] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[43.384] read(): <13> Rx: $vStopped#55 -[43.384] write(): <13> Tx: $OK#9a -[43.384] read(): <13> Rx: $g#67 -[43.390] write(): <13> Tx: $000000007d000000f0ff072000000000000000000000000000000000a0ff07200000000000000000000000000000000000000000a0ff072071630008447800080000006100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000a0ff072000000000#46 -[43.391] read(): <13> Rx: $vCont;s:1;c#c1 -[43.401] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[43.408] handle_vCont_s(): handle_vCont_s, step thread -[43.408] write(): <13> Tx: $OK#9a -[43.419] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[43.419] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[43.425] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[43.425] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[43.450] read(): <13> Rx: $vStopped#55 -[43.450] write(): <13> Tx: $OK#9a -[43.450] read(): <13> Rx: $g#67 -[43.458] write(): <13> Tx: $000000007d000000f0ff072000000000000000000000000000000000c0ff07200000000000000000000000000000000000000000a0ff072071630008467800080000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000a0ff072000000000#44 -[43.458] read(): <13> Rx: $vCont;s:1;c#c1 -[43.458] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[43.466] handle_vCont_s(): handle_vCont_s, step thread -[43.466] write(): <13> Tx: $OK#9a -[43.477] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[43.477] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[43.483] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[43.484] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[43.510] read(): <13> Rx: $vStopped#55 -[43.510] write(): <13> Tx: $OK#9a -[43.510] read(): <13> Rx: $g#67 -[43.517] write(): <13> Tx: $000000007d000000f0ff072000000000000000000000000000000000c0ff07200000000000000000000000000000000000000000c0ff072071630008487800080000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000c0ff072000000000#4a -[43.517] read(): <13> Rx: $vCont;s:1;c#c1 -[43.518] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[43.524] handle_vCont_s(): handle_vCont_s, step thread -[43.525] write(): <13> Tx: $OK#9a -[43.535] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[43.535] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[43.541] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[43.542] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[43.566] read(): <13> Rx: $vStopped#55 -[43.566] write(): <13> Tx: $OK#9a -[43.567] read(): <13> Rx: $g#67 -[43.574] write(): <13> Tx: $000000007d000000f0ff072000000000000000000000000000000000c8ff07200000000000000000000000000000000000000000c8ff072071630008706300080000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000c8ff072000000000#57 -[43.574] read(): <13> Rx: $m8006370,4#35 -[43.574] handlePacket(): Reading 0x4 bytes of memory from addr 0x8006370 -[43.575] write(): <13> Tx: $03461846#a0 -[43.575] read(): <13> Rx: $m2007ffc0,40#25 -[43.575] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ffc0 -[43.576] write(): <13> Tx: $c8ff072071630008f0ff0720dcff0720d8ff072083670008010000002c860008f0ff07207d000000f404002000000000b08600080800002000000000db7f0008#90 -[43.576] read(): <13> Rx: $m8006782,4#3c -[43.576] handlePacket(): Reading 0x4 bytes of memory from addr 0x8006782 -[43.577] write(): <13> Tx: $084800f0#ca -[43.577] read(): <13> Rx: $vCont;s:1;c#c1 -[43.577] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[43.584] handle_vCont_s(): handle_vCont_s, step thread -[43.584] write(): <13> Tx: $OK#9a -[43.595] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[43.595] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[43.600] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[43.601] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[43.626] read(): <13> Rx: $vStopped#55 -[43.626] write(): <13> Tx: $OK#9a -[43.627] read(): <13> Rx: $g#67 -[43.634] write(): <13> Tx: $000000007d000000f0ff072000000000000000000000000000000000c8ff07200000000000000000000000000000000000000000c8ff072071630008726300080000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000c8ff072000000000#59 -[43.634] read(): <13> Rx: $m8006372,4#37 -[43.634] handlePacket(): Reading 0x4 bytes of memory from addr 0x8006372 -[43.635] write(): <13> Tx: $18460837#a5 -[43.635] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[43.635] write(): <13> Tx: $l#8b -[43.636] read(): <13> Rx: $m2007ffc0,40#25 -[43.636] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ffc0 -[43.637] write(): <13> Tx: $c8ff072071630008f0ff0720dcff0720d8ff072083670008010000002c860008f0ff07207d000000f404002000000000b08600080800002000000000db7f0008#90 -[43.637] read(): <13> Rx: $m8006782,4#3c -[43.637] handlePacket(): Reading 0x4 bytes of memory from addr 0x8006782 -[43.638] write(): <13> Tx: $084800f0#ca -[43.660] read(): <13> Rx: $m200004f0,4#89 -[43.660] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[43.661] write(): <13> Tx: $00000000#80 -[43.663] read(): <13> Rx: $m2007ffc0,40#25 -[43.663] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ffc0 -[43.663] write(): <13> Tx: $c8ff072071630008f0ff0720dcff0720d8ff072083670008010000002c860008f0ff07207d000000f404002000000000b08600080800002000000000db7f0008#90 -[43.663] read(): <13> Rx: $m8007fda,4#c7 -[43.663] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007fda -[43.664] write(): <13> Tx: $70470000#92 -[43.664] read(): <13> Rx: $m8007f80,40#9a -[43.664] handlePacket(): Reading 0x40 bytes of memory from addr 0x8007f80 -[43.665] write(): <13> Tx: $1a68bb681a447b681a603b68fa681a6000bf1437bd465df8047b7047834b040000ca9a3bdff834d0002103e00c4b5b58435004310b480c4b42189a42f6d30b4a#cf -[43.665] read(): <13> Rx: $m8007fdc,4#c9 -[43.665] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007fdc -[43.665] write(): <13> Tx: $00000820#8a -[43.802] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[43.802] write(): <13> Tx: $l#8b -[43.802] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[43.802] write(): <13> Tx: $l#8b -[43.802] read(): <13> Rx: $m2007ffc0,40#25 -[43.802] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ffc0 -[43.803] write(): <13> Tx: $c8ff072071630008f0ff0720dcff0720d8ff072083670008010000002c860008f0ff07207d000000f404002000000000b08600080800002000000000db7f0008#90 -[43.803] read(): <13> Rx: $m2007ffc0,40#25 -[43.803] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ffc0 -[43.804] write(): <13> Tx: $c8ff072071630008f0ff0720dcff0720d8ff072083670008010000002c860008f0ff07207d000000f404002000000000b08600080800002000000000db7f0008#90 -[43.804] read(): <13> Rx: $m2007ffc0,40#25 -[43.804] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ffc0 -[43.805] write(): <13> Tx: $c8ff072071630008f0ff0720dcff0720d8ff072083670008010000002c860008f0ff07207d000000f404002000000000b08600080800002000000000db7f0008#90 -[43.805] read(): <13> Rx: $m2007fff0,4#f8 -[43.805] handlePacket(): Reading 0x4 bytes of memory from addr 0x2007fff0 -[43.805] write(): <13> Tx: $b0860008#c8 -[43.805] read(): <13> Rx: $m80086a8,4#6c -[43.805] handlePacket(): Reading 0x4 bytes of memory from addr 0x80086a8 -[43.806] write(): <13> Tx: $00000000#80 -[43.806] read(): <13> Rx: $m2007fff0,4#f8 -[43.806] handlePacket(): Reading 0x4 bytes of memory from addr 0x2007fff0 -[43.806] write(): <13> Tx: $b0860008#c8 -[43.806] read(): <13> Rx: $m80086a8,4#6c -[43.806] handlePacket(): Reading 0x4 bytes of memory from addr 0x80086a8 -[43.806] write(): <13> Tx: $00000000#80 -[44.343] read(): <13> Rx: $vCont;s:1;c#c1 -[44.343] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[44.349] handle_vCont_s(): handle_vCont_s, step thread -[44.349] write(): <13> Tx: $OK#9a -[44.359] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[44.359] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[44.365] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[44.365] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[44.365] read(): <13> Rx: $vStopped#55 -[44.365] write(): <13> Tx: $OK#9a -[44.365] read(): <13> Rx: $g#67 -[44.372] write(): <13> Tx: $000000007d000000f0ff072000000000000000000000000000000000c8ff07200000000000000000000000000000000000000000c8ff072071630008746300080000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000c8ff072000000000#5b -[44.372] read(): <13> Rx: $vCont;s:1;c#c1 -[44.375] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[44.381] handle_vCont_s(): handle_vCont_s, step thread -[44.382] write(): <13> Tx: $OK#9a -[44.392] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[44.392] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[44.397] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[44.398] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[44.422] read(): <13> Rx: $vStopped#55 -[44.422] write(): <13> Tx: $OK#9a -[44.422] read(): <13> Rx: $g#67 -[44.429] write(): <13> Tx: $000000007d000000f0ff072000000000000000000000000000000000d0ff07200000000000000000000000000000000000000000c8ff072071630008766300080000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000c8ff072000000000#56 -[44.429] read(): <13> Rx: $vCont;s:1;c#c1 -[44.429] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[44.435] handle_vCont_s(): handle_vCont_s, step thread -[44.435] write(): <13> Tx: $OK#9a -[44.446] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[44.446] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[44.452] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[44.452] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[44.478] read(): <13> Rx: $vStopped#55 -[44.479] write(): <13> Tx: $OK#9a -[44.479] read(): <13> Rx: $g#67 -[44.485] write(): <13> Tx: $000000007d000000f0ff072000000000000000000000000000000000d0ff07200000000000000000000000000000000000000000d0ff072071630008786300080000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000d0ff072000000000#4a -[44.486] read(): <13> Rx: $vCont;s:1;c#c1 -[44.486] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[44.493] handle_vCont_s(): handle_vCont_s, step thread -[44.493] write(): <13> Tx: $OK#9a -[44.504] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[44.504] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[44.510] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[44.510] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[44.534] read(): <13> Rx: $vStopped#55 -[44.534] write(): <13> Tx: $OK#9a -[44.535] read(): <13> Rx: $g#67 -[44.541] write(): <13> Tx: $000000007d000000f0ff072000000000000000000000000000000000d8ff07200000000000000000000000000000000000000000d8ff072071630008826700080000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000d8ff072000000000#61 -[44.541] read(): <13> Rx: $m8006782,4#3c -[44.541] handlePacket(): Reading 0x4 bytes of memory from addr 0x8006782 -[44.542] write(): <13> Tx: $084800f0#ca -[44.542] read(): <13> Rx: $m2007ffc0,40#25 -[44.542] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ffc0 -[44.543] write(): <13> Tx: $c8ff072071630008f0ff0720dcff0720d8ff072083670008010000002c860008f0ff07207d000000f404002000000000b08600080800002000000000db7f0008#90 -[44.543] read(): <13> Rx: $m8007fda,4#c7 -[44.543] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007fda -[44.544] write(): <13> Tx: $70470000#92 -[44.544] read(): <13> Rx: $m8007f80,40#9a -[44.544] handlePacket(): Reading 0x40 bytes of memory from addr 0x8007f80 -[44.545] write(): <13> Tx: $1a68bb681a447b681a603b68fa681a6000bf1437bd465df8047b7047834b040000ca9a3bdff834d0002103e00c4b5b58435004310b480c4b42189a42f6d30b4a#cf -[44.545] read(): <13> Rx: $m8007fdc,4#c9 -[44.545] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007fdc -[44.545] write(): <13> Tx: $00000820#8a -[44.545] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[44.545] write(): <13> Tx: $l#8b -[44.550] read(): <13> Rx: $m2007ffc0,40#25 -[44.550] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ffc0 -[44.551] write(): <13> Tx: $c8ff072071630008f0ff0720dcff0720d8ff072083670008010000002c860008f0ff07207d000000f404002000000000b08600080800002000000000db7f0008#90 -[44.551] read(): <13> Rx: $m2007fff0,4#f8 -[44.551] handlePacket(): Reading 0x4 bytes of memory from addr 0x2007fff0 -[44.551] write(): <13> Tx: $b0860008#c8 -[44.552] read(): <13> Rx: $m80086a8,4#6c -[44.552] handlePacket(): Reading 0x4 bytes of memory from addr 0x80086a8 -[44.552] write(): <13> Tx: $00000000#80 -[44.552] read(): <13> Rx: $m20000008,8#5b -[44.552] handlePacket(): Reading 0x8 bytes of memory from addr 0x20000008 -[44.552] write(): <13> Tx: $48656c6c6f20776f#11 -[44.552] read(): <13> Rx: $m20000010,8#54 -[44.552] handlePacket(): Reading 0x8 bytes of memory from addr 0x20000010 -[44.553] write(): <13> Tx: $726c642100000000#4f -[44.553] read(): <13> Rx: $m800862c,8#6c -[44.553] handlePacket(): Reading 0x8 bytes of memory from addr 0x800862c -[44.553] write(): <13> Tx: $6368617474657200#48 -[44.553] read(): <13> Rx: $m200004f0,4#89 -[44.553] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[44.554] write(): <13> Tx: $00000000#80 -[44.682] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[44.682] write(): <13> Tx: $l#8b -[44.683] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[44.683] write(): <13> Tx: $l#8b -[45.208] read(): <13> Rx: $vCont;s:1;c#c1 -[45.208] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[45.214] handle_vCont_s(): handle_vCont_s, step thread -[45.215] write(): <13> Tx: $OK#9a -[45.225] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[45.225] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[45.231] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[45.232] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[45.232] read(): <13> Rx: $vStopped#55 -[45.232] write(): <13> Tx: $OK#9a -[45.232] read(): <13> Rx: $g#67 -[45.239] write(): <13> Tx: $f40400207d000000f0ff072000000000000000000000000000000000d8ff07200000000000000000000000000000000000000000d8ff072071630008846700080000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000d8ff072000000000#a3 -[45.239] read(): <13> Rx: $vCont;s:1;c#c1 -[45.240] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[45.247] handle_vCont_s(): handle_vCont_s, step thread -[45.247] write(): <13> Tx: $OK#9a -[45.258] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[45.258] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[45.263] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[45.264] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[45.290] read(): <13> Rx: $vStopped#55 -[45.290] write(): <13> Tx: $OK#9a -[45.291] read(): <13> Rx: $g#67 -[45.297] write(): <13> Tx: $f40400207d000000f0ff072000000000000000000000000000000000d8ff07200000000000000000000000000000000000000000d8ff072089670008e27000080000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000d8ff072000000000#d5 -[45.298] read(): <13> Rx: $m80070e2,4#63 -[45.298] handlePacket(): Reading 0x4 bytes of memory from addr 0x80070e2 -[45.299] write(): <13> Tx: $80b584b0#fd -[45.300] read(): <13> Rx: $m8006788,4#42 -[45.300] handlePacket(): Reading 0x4 bytes of memory from addr 0x8006788 -[45.300] write(): <13> Tx: $4ff47a70#33 -[45.300] read(): <13> Rx: $m80070c0,40#8f -[45.301] handlePacket(): Reading 0x40 bytes of memory from addr 0x80070c0 -[45.302] write(): <13> Tx: $9a607a683b68da60012304e0fb680133fb60dde7002318461437bd465df8047b704780b584b000af78607b6804331846fff764faf8607b68d3f88836fa68d31a#cd -[45.302] read(): <13> Rx: $m80070ea,2#90 -[45.302] handlePacket(): Reading 0x2 bytes of memory from addr 0x80070ea -[45.302] write(): <13> Tx: $7b68#07 -[45.303] read(): <13> Rx: $Z1,80070ea,2#da -[45.303] write(): <13> Tx: $OK#9a -[45.303] read(): <13> Rx: $vCont;c#a8 -[45.304] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[45.309] handle_vCont_c(): handle_vCont_c, continue thread -[45.309] write(): <13> Tx: $OK#9a -[45.320] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[45.320] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[45.326] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000003 -[45.328] write(): <13> Tx: %Stop:T05hwbreak:;thread:1;core:0;#7e -[45.350] read(): <13> Rx: $vStopped#55 -[45.350] write(): <13> Tx: $OK#9a -[45.351] read(): <13> Rx: $g#67 -[45.357] write(): <13> Tx: $f40400207d000000f0ff072000000000000000000000000000000000c0ff07200000000000000000000000000000000000000000c0ff072089670008ea7000080000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000c0ff072000000000#e9 -[45.358] read(): <13> Rx: $z1,80070ea,2#fa -[45.358] write(): <13> Tx: $OK#9a -[45.358] read(): <13> Rx: $m80070ea,4#92 -[45.358] handlePacket(): Reading 0x4 bytes of memory from addr 0x80070ea -[45.360] write(): <13> Tx: $7b680433#d1 -[45.360] read(): <13> Rx: $m2007ffc0,40#25 -[45.360] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ffc0 -[45.361] write(): <13> Tx: $f0ff0720f40400200000000089670008d8ff072089670008010000002c860008f0ff07207d000000f404002000000000b08600080800002000000000db7f0008#57 -[45.361] read(): <13> Rx: $m8006788,4#42 -[45.361] handlePacket(): Reading 0x4 bytes of memory from addr 0x8006788 -[45.362] write(): <13> Tx: $4ff47a70#33 -[45.362] read(): <13> Rx: $m80070c0,40#8f -[45.362] handlePacket(): Reading 0x40 bytes of memory from addr 0x80070c0 -[45.363] write(): <13> Tx: $9a607a683b68da60012304e0fb680133fb60dde7002318461437bd465df8047b704780b584b000af78607b6804331846fff764faf8607b68d3f88836fa68d31a#cd -[45.364] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[45.364] write(): <13> Tx: $l#8b -[45.372] read(): <13> Rx: $m2007ffc0,40#25 -[45.372] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ffc0 -[45.372] write(): <13> Tx: $f0ff0720f40400200000000089670008d8ff072089670008010000002c860008f0ff07207d000000f404002000000000b08600080800002000000000db7f0008#57 -[45.373] read(): <13> Rx: $m200004f0,4#89 -[45.373] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[45.374] write(): <13> Tx: $00000000#80 -[45.381] read(): <13> Rx: $m2007ffc0,40#25 -[45.381] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ffc0 -[45.382] write(): <13> Tx: $f0ff0720f40400200000000089670008d8ff072089670008010000002c860008f0ff07207d000000f404002000000000b08600080800002000000000db7f0008#57 -[45.382] read(): <13> Rx: $m8007fda,4#c7 -[45.382] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007fda -[45.383] write(): <13> Tx: $70470000#92 -[45.383] read(): <13> Rx: $m8007f80,40#9a -[45.383] handlePacket(): Reading 0x40 bytes of memory from addr 0x8007f80 -[45.383] write(): <13> Tx: $1a68bb681a447b681a603b68fa681a6000bf1437bd465df8047b7047834b040000ca9a3bdff834d0002103e00c4b5b58435004310b480c4b42189a42f6d30b4a#cf -[45.384] read(): <13> Rx: $m8007fdc,4#c9 -[45.384] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007fdc -[45.384] write(): <13> Tx: $00000820#8a -[45.542] read(): <13> Rx: $m2007ffc0,40#25 -[45.542] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ffc0 -[45.543] write(): <13> Tx: $f0ff0720f40400200000000089670008d8ff072089670008010000002c860008f0ff07207d000000f404002000000000b08600080800002000000000db7f0008#57 -[45.544] read(): <13> Rx: $m2007ffc0,40#25 -[45.544] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ffc0 -[45.545] write(): <13> Tx: $f0ff0720f40400200000000089670008d8ff072089670008010000002c860008f0ff07207d000000f404002000000000b08600080800002000000000db7f0008#57 -[45.545] read(): <13> Rx: $m200004f4,4#8d -[45.545] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f4 -[45.545] write(): <13> Tx: $9c860008#d2 -[45.545] read(): <13> Rx: $m8008694,4#40 -[45.545] handlePacket(): Reading 0x4 bytes of memory from addr 0x8008694 -[45.546] write(): <13> Tx: $00000000#80 -[45.546] read(): <13> Rx: $m200004f4,4#8d -[45.546] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f4 -[45.546] write(): <13> Tx: $9c860008#d2 -[45.546] read(): <13> Rx: $m8008694,4#40 -[45.546] handlePacket(): Reading 0x4 bytes of memory from addr 0x8008694 -[45.546] write(): <13> Tx: $00000000#80 -[45.546] read(): <13> Rx: $m200004f4,4#8d -[45.546] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f4 -[45.547] write(): <13> Tx: $9c860008#d2 -[45.547] read(): <13> Rx: $m8008694,4#40 -[45.547] handlePacket(): Reading 0x4 bytes of memory from addr 0x8008694 -[45.547] write(): <13> Tx: $00000000#80 -[45.599] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[45.600] write(): <13> Tx: $l#8b -[45.600] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[45.600] write(): <13> Tx: $l#8b -[45.600] read(): <13> Rx: $m2007ffc0,40#25 -[45.600] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ffc0 -[45.601] write(): <13> Tx: $f0ff0720f40400200000000089670008d8ff072089670008010000002c860008f0ff07207d000000f404002000000000b08600080800002000000000db7f0008#57 -[45.951] read(): <13> Rx: $vCont;s:1;c#c1 -[45.951] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[45.957] handle_vCont_s(): handle_vCont_s, step thread -[45.957] write(): <13> Tx: $OK#9a -[45.968] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[45.968] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[45.973] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[45.974] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[45.974] read(): <13> Rx: $vStopped#55 -[45.974] write(): <13> Tx: $OK#9a -[45.974] read(): <13> Rx: $g#67 -[45.980] write(): <13> Tx: $f40400207d000000f0ff0720f4040020000000000000000000000000c0ff07200000000000000000000000000000000000000000c0ff072089670008ec7000080000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000c0ff072000000000#2b -[45.980] read(): <13> Rx: $vCont;s:1;c#c1 -[45.991] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[45.997] handle_vCont_s(): handle_vCont_s, step thread -[45.997] write(): <13> Tx: $OK#9a -[46.007] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[46.008] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[46.013] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[46.013] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[46.038] read(): <13> Rx: $vStopped#55 -[46.038] write(): <13> Tx: $OK#9a -[46.038] read(): <13> Rx: $g#67 -[46.045] write(): <13> Tx: $f40400207d000000f0ff0720f8040020000000000000000000000000c0ff07200000000000000000000000000000000000000000c0ff072089670008ee7000080000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000c0ff072000000000#31 -[46.045] read(): <13> Rx: $vCont;s:1;c#c1 -[46.045] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[46.052] handle_vCont_s(): handle_vCont_s, step thread -[46.052] write(): <13> Tx: $OK#9a -[46.062] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[46.062] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[46.068] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[46.068] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[46.094] read(): <13> Rx: $vStopped#55 -[46.094] write(): <13> Tx: $OK#9a -[46.095] read(): <13> Rx: $g#67 -[46.102] write(): <13> Tx: $f80400207d000000f0ff0720f8040020000000000000000000000000c0ff07200000000000000000000000000000000000000000c0ff072089670008f07000080000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000c0ff072000000000#01 -[46.102] read(): <13> Rx: $vCont;s:1;c#c1 -[46.103] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[46.109] handle_vCont_s(): handle_vCont_s, step thread -[46.109] write(): <13> Tx: $OK#9a -[46.120] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[46.120] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[46.125] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[46.126] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[46.151] read(): <13> Rx: $vStopped#55 -[46.151] write(): <13> Tx: $OK#9a -[46.151] read(): <13> Rx: $g#67 -[46.158] write(): <13> Tx: $f80400207d000000f0ff0720f8040020000000000000000000000000c0ff07200000000000000000000000000000000000000000c0ff0720f5700008bc6500080000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000c0ff072000000000#58 -[46.158] read(): <13> Rx: $m80065bc,4#95 -[46.158] handlePacket(): Reading 0x4 bytes of memory from addr 0x80065bc -[46.159] write(): <13> Tx: $80b582b0#fb -[46.159] read(): <13> Rx: $m80070f4,4#66 -[46.159] handlePacket(): Reading 0x4 bytes of memory from addr 0x80070f4 -[46.160] write(): <13> Tx: $f8607b68#0b -[46.160] read(): <13> Rx: $m80065c0,40#93 -[46.160] handlePacket(): Reading 0x40 bytes of memory from addr 0x80065c0 -[46.161] write(): <13> Tx: $00af7860faf712f8034618460837bd4680bd000080b582b000af78607b681846fef74cf9054a7b681a607b68044a5a607b6818460837bd4680bd00bfb0860008#4f -[46.161] read(): <13> Rx: $m80065c4,2#65 -[46.161] handlePacket(): Reading 0x2 bytes of memory from addr 0x80065c4 -[46.161] write(): <13> Tx: $faf7#64 -[46.161] read(): <13> Rx: $Z1,80065c4,2#af -[46.162] write(): <13> Tx: $OK#9a -[46.162] read(): <13> Rx: $vCont;c#a8 -[46.162] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[46.168] handle_vCont_c(): handle_vCont_c, continue thread -[46.168] write(): <13> Tx: $OK#9a -[46.178] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[46.178] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[46.184] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000003 -[46.185] write(): <13> Tx: %Stop:T05hwbreak:;thread:1;core:0;#7e -[46.210] read(): <13> Rx: $vStopped#55 -[46.211] write(): <13> Tx: $OK#9a -[46.211] read(): <13> Rx: $g#67 -[46.218] write(): <13> Tx: $f80400207d000000f0ff0720f8040020000000000000000000000000b0ff07200000000000000000000000000000000000000000b0ff0720f5700008c46500080000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000b0ff072000000000#27 -[46.218] read(): <13> Rx: $z1,80065c4,2#cf -[46.219] write(): <13> Tx: $OK#9a -[46.219] read(): <13> Rx: $m80065c4,4#67 -[46.219] handlePacket(): Reading 0x4 bytes of memory from addr 0x80065c4 -[46.219] write(): <13> Tx: $faf712f8#65 -[46.220] read(): <13> Rx: $m2007ff80,40#fa -[46.220] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff80 -[46.221] write(): <13> Tx: $88ff07200b28000890ff0720e400002098ff072098ff0720c0ff0720f9fffffff80400207d000000f0ff0720f804002000000000f8040020c0ff0720f5700008#5d -[46.221] read(): <13> Rx: $m80070f4,4#66 -[46.221] handlePacket(): Reading 0x4 bytes of memory from addr 0x80070f4 -[46.221] write(): <13> Tx: $f8607b68#0b -[46.222] read(): <13> Rx: $m80065c0,40#93 -[46.222] handlePacket(): Reading 0x40 bytes of memory from addr 0x80065c0 -[46.223] write(): <13> Tx: $00af7860faf712f8034618460837bd4680bd000080b582b000af78607b681846fef74cf9054a7b681a607b68044a5a607b6818460837bd4680bd00bfb0860008#4f -[46.223] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[46.223] write(): <13> Tx: $l#8b -[46.252] read(): <13> Rx: $m200004f0,4#89 -[46.252] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[46.252] write(): <13> Tx: $00000000#80 -[46.261] read(): <13> Rx: $m2007ffc0,40#25 -[46.261] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ffc0 -[46.261] write(): <13> Tx: $f0ff0720f40400200000000089670008d8ff072089670008010000002c860008f0ff07207d000000f404002000000000b08600080800002000000000db7f0008#57 -[46.261] read(): <13> Rx: $m2007ff80,40#fa -[46.261] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff80 -[46.262] write(): <13> Tx: $88ff07200b28000890ff0720e400002098ff072098ff0720c0ff0720f9fffffff80400207d000000f0ff0720f804002000000000f8040020c0ff0720f5700008#5d -[46.262] read(): <13> Rx: $m8006788,4#42 -[46.262] handlePacket(): Reading 0x4 bytes of memory from addr 0x8006788 -[46.263] write(): <13> Tx: $4ff47a70#33 -[46.263] read(): <13> Rx: $m8007fda,4#c7 -[46.263] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007fda -[46.263] write(): <13> Tx: $70470000#92 -[46.263] read(): <13> Rx: $m8007f80,40#9a -[46.263] handlePacket(): Reading 0x40 bytes of memory from addr 0x8007f80 -[46.264] write(): <13> Tx: $1a68bb681a447b681a603b68fa681a6000bf1437bd465df8047b7047834b040000ca9a3bdff834d0002103e00c4b5b58435004310b480c4b42189a42f6d30b4a#cf -[46.264] read(): <13> Rx: $m8007fdc,4#c9 -[46.264] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007fdc -[46.264] write(): <13> Tx: $00000820#8a -[46.308] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[46.308] write(): <13> Tx: $l#8b -[46.309] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[46.309] write(): <13> Tx: $l#8b -[46.309] read(): <13> Rx: $m2007ff80,40#fa -[46.309] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff80 -[46.309] write(): <13> Tx: $88ff07200b28000890ff0720e400002098ff072098ff0720c0ff0720f9fffffff80400207d000000f0ff0720f804002000000000f8040020c0ff0720f5700008#5d -[46.310] read(): <13> Rx: $m2007ff80,40#fa -[46.310] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff80 -[46.311] write(): <13> Tx: $88ff07200b28000890ff0720e400002098ff072098ff0720c0ff0720f9fffffff80400207d000000f0ff0720f804002000000000f8040020c0ff0720f5700008#5d -[47.045] read(): <13> Rx: $vCont;s:1;c#c1 -[47.045] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[47.051] handle_vCont_s(): handle_vCont_s, step thread -[47.051] write(): <13> Tx: $OK#9a -[47.062] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[47.062] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[47.067] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[47.068] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[47.068] read(): <13> Rx: $vStopped#55 -[47.068] write(): <13> Tx: $OK#9a -[47.068] read(): <13> Rx: $g#67 -[47.074] write(): <13> Tx: $f80400207d000000f0ff0720f8040020000000000000000000000000b0ff07200000000000000000000000000000000000000000b0ff0720c9650008ec0500080000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff1000000000000000000000000000000000000000b0ff072000000000#57 -[47.074] read(): <13> Rx: $m80005ec,4#92 -[47.074] handlePacket(): Reading 0x4 bytes of memory from addr 0x80005ec -[47.075] write(): <13> Tx: $80b400af#25 -[47.075] read(): <13> Rx: $m80065c8,4#6b -[47.075] handlePacket(): Reading 0x4 bytes of memory from addr 0x80065c8 -[47.075] write(): <13> Tx: $03461846#a0 -[47.075] read(): <13> Rx: $m80005c0,40#8d -[47.075] handlePacket(): Reading 0x40 bytes of memory from addr 0x80005c0 -[47.076] write(): <13> Tx: $0000002080b400af064b1b781a46064b1b681344044a136000bfbd465df8047b704700bf04000020bc0b002080b400af034b1b681846bd465df8047b704700bf#a2 -[47.076] read(): <13> Rx: $m8000600,4#2b -[47.076] handlePacket(): Reading 0x4 bytes of memory from addr 0x8000600 -[47.076] write(): <13> Tx: $bc0b0020#19 -[47.076] read(): <13> Rx: $m80005f0,2#5e -[47.076] handlePacket(): Reading 0x2 bytes of memory from addr 0x80005f0 -[47.077] write(): <13> Tx: $034b#f9 -[47.077] read(): <13> Rx: $Z1,80005f0,2#a8 -[47.077] write(): <13> Tx: $OK#9a -[47.077] read(): <13> Rx: $vCont;c#a8 -[47.085] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[47.090] handle_vCont_c(): handle_vCont_c, continue thread -[47.090] write(): <13> Tx: $OK#9a -[47.101] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[47.101] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[47.107] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000003 -[47.109] write(): <13> Tx: %Stop:T05hwbreak:;thread:1;core:0;#7e -[47.134] read(): <13> Rx: $vStopped#55 -[47.134] write(): <13> Tx: $OK#9a -[47.135] read(): <13> Rx: $g#67 -[47.142] write(): <13> Tx: $e40200207d0000006b460000e402002000000000000000000000000034ff0720000000000000000000000000000000000000000034ff0720e7450008f00500082d00006100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff100000000000000000000000000000000000000034ff072000000000#67 -[47.142] read(): <13> Rx: $z1,80005f0,2#c8 -[47.143] write(): <13> Tx: $OK#9a -[47.143] read(): <13> Rx: $m80005f0,4#60 -[47.143] handlePacket(): Reading 0x4 bytes of memory from addr 0x80005f0 -[47.144] write(): <13> Tx: $034b1b68#fa -[47.283] read(): <13> Rx: $m80045e6,4#69 -[47.283] handlePacket(): Reading 0x4 bytes of memory from addr 0x80045e6 -[47.284] write(): <13> Tx: $02467b68#d3 -[47.284] read(): <13> Rx: $m2007ff00,40#f2 -[47.284] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff00 -[47.285] write(): <13> Tx: $000000000000000000000000000000000000000000000000000000000000000064ff072028ff07204a46000030ff07206b46000038ff072040000000e4020020#b8 -[47.285] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[47.285] write(): <13> Tx: $l#8b -[47.288] read(): <13> Rx: $m200004f0,4#89 -[47.288] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[47.288] write(): <13> Tx: $00000000#80 -[47.355] read(): <13> Rx: $m2007ff40,40#f6 -[47.355] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff40 -[47.356] write(): <13> Tx: $48ff07201746000864000000e40200206400000017460c0008000020a401002068ff07202d6e000800000000e400002078ff07200b28000880ff0720e4000020#2a -[47.356] read(): <13> Rx: $m8004616,4#36 -[47.356] handlePacket(): Reading 0x4 bytes of memory from addr 0x8004616 -[47.357] write(): <13> Tx: $7b68db68#3b -[47.357] read(): <13> Rx: $m8006e2c,4#95 -[47.357] handlePacket(): Reading 0x4 bytes of memory from addr 0x8006e2c -[47.357] write(): <13> Tx: $f0ee407a#5c -[47.378] read(): <13> Rx: $m800280a,4#60 -[47.378] handlePacket(): Reading 0x4 bytes of memory from addr 0x800280a -[47.379] write(): <13> Tx: $7b681b68#08 -[47.379] read(): <13> Rx: $m2007ff80,40#fa -[47.379] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff80 -[47.380] write(): <13> Tx: $88ff0720277e0008b0ff0720f9fffffff80400207d000000f0ff0720f804002000000000c9650008ec0500080000000100000000f8040020c0ff0720f5700008#65 -[47.401] read(): <13> Rx: $m8007e26,4#69 -[47.401] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007e26 -[47.402] write(): <13> Tx: $00bf80bd#56 -[47.402] read(): <13> Rx: $m2007ffac,4#26 -[47.402] handlePacket(): Reading 0x4 bytes of memory from addr 0x2007ffac -[47.402] write(): <13> Tx: $00000001#81 -[47.403] read(): <13> Rx: $m80005ec,4#92 -[47.403] handlePacket(): Reading 0x4 bytes of memory from addr 0x80005ec -[47.403] write(): <13> Tx: $80b400af#25 -[47.403] read(): <13> Rx: $m80065c8,4#6b -[47.403] handlePacket(): Reading 0x4 bytes of memory from addr 0x80065c8 -[47.403] write(): <13> Tx: $03461846#a0 -[47.403] read(): <13> Rx: $m80070f4,4#66 -[47.403] handlePacket(): Reading 0x4 bytes of memory from addr 0x80070f4 -[47.404] write(): <13> Tx: $f8607b68#0b -[47.404] read(): <13> Rx: $m2007ffc0,40#25 -[47.404] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ffc0 -[47.404] write(): <13> Tx: $f0ff0720f40400200000000089670008d8ff072089670008010000002c860008f0ff07207d000000f404002000000000b08600080800002000000000db7f0008#57 -[47.405] read(): <13> Rx: $m8006788,4#42 -[47.405] handlePacket(): Reading 0x4 bytes of memory from addr 0x8006788 -[47.405] write(): <13> Tx: $4ff47a70#33 -[47.405] read(): <13> Rx: $m8007fda,4#c7 -[47.405] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007fda -[47.406] write(): <13> Tx: $70470000#92 -[47.406] read(): <13> Rx: $m8007f80,40#9a -[47.406] handlePacket(): Reading 0x40 bytes of memory from addr 0x8007f80 -[47.406] write(): <13> Tx: $1a68bb681a447b681a603b68fa681a6000bf1437bd465df8047b7047834b040000ca9a3bdff834d0002103e00c4b5b58435004310b480c4b42189a42f6d30b4a#cf -[47.406] read(): <13> Rx: $m8007fdc,4#c9 -[47.406] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007fdc -[47.407] write(): <13> Tx: $00000820#8a -[47.423] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[47.424] write(): <13> Tx: $l#8b -[47.424] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[47.424] write(): <13> Tx: $l#8b -[47.850] read(): <13> Rx: $vCont;s:1;c#c1 -[47.851] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[47.857] handle_vCont_s(): handle_vCont_s, step thread -[47.858] write(): <13> Tx: $OK#9a -[47.868] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[47.868] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[47.874] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[47.874] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[47.875] read(): <13> Rx: $vStopped#55 -[47.875] write(): <13> Tx: $OK#9a -[47.875] read(): <13> Rx: $g#67 -[47.881] write(): <13> Tx: $e40200207d0000006b460000bc0b002000000000000000000000000034ff0720000000000000000000000000000000000000000034ff0720e7450008f20500082d00006100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff100000000000000000000000000000000000000034ff072000000000#c5 -[47.882] read(): <13> Rx: $vCont;s:1;c#c1 -[47.892] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[47.898] handle_vCont_s(): handle_vCont_s, step thread -[47.899] write(): <13> Tx: $OK#9a -[47.909] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[47.909] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[47.915] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[47.915] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[47.942] read(): <13> Rx: $vStopped#55 -[47.942] write(): <13> Tx: $OK#9a -[47.942] read(): <13> Rx: $g#67 -[47.949] write(): <13> Tx: $e40200207d0000006b4600006c46000000000000000000000000000034ff0720000000000000000000000000000000000000000034ff0720e7450008f40500082d00006100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff100000000000000000000000000000000000000034ff072000000000#71 -[47.949] read(): <13> Rx: $m80005f4,4#64 -[47.949] handlePacket(): Reading 0x4 bytes of memory from addr 0x80005f4 -[47.950] write(): <13> Tx: $1846bd46#03 -[47.950] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[47.950] write(): <13> Tx: $l#8b -[47.960] read(): <13> Rx: $m200004f0,4#89 -[47.960] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[47.961] write(): <13> Tx: $00000000#80 -[47.983] read(): <13> Rx: $m80045e6,4#69 -[47.983] handlePacket(): Reading 0x4 bytes of memory from addr 0x80045e6 -[47.983] write(): <13> Tx: $02467b68#d3 -[47.983] read(): <13> Rx: $m2007ff00,40#f2 -[47.983] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff00 -[47.984] write(): <13> Tx: $000000000000000000000000000000000000000000000000000000000000000064ff072028ff07204a46000030ff07206b46000038ff072040000000e4020020#b8 -[47.984] read(): <13> Rx: $m2007ff40,40#f6 -[47.984] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff40 -[47.985] write(): <13> Tx: $48ff07201746000864000000e40200206400000017460c0008000020a401002068ff07202d6e000800000000e400002078ff07200b28000880ff0720e4000020#2a -[47.985] read(): <13> Rx: $m8004616,4#36 -[47.985] handlePacket(): Reading 0x4 bytes of memory from addr 0x8004616 -[47.985] write(): <13> Tx: $7b68db68#3b -[47.986] read(): <13> Rx: $m8006e2c,4#95 -[47.986] handlePacket(): Reading 0x4 bytes of memory from addr 0x8006e2c -[47.986] write(): <13> Tx: $f0ee407a#5c -[47.986] read(): <13> Rx: $m800280a,4#60 -[47.986] handlePacket(): Reading 0x4 bytes of memory from addr 0x800280a -[47.987] write(): <13> Tx: $7b681b68#08 -[47.987] read(): <13> Rx: $m2007ff80,40#fa -[47.987] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff80 -[47.987] write(): <13> Tx: $88ff0720277e0008b0ff0720f9fffffff80400207d000000f0ff0720f804002000000000c9650008ec0500080000000100000000f8040020c0ff0720f5700008#65 -[47.987] read(): <13> Rx: $m8007e26,4#69 -[47.987] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007e26 -[47.988] write(): <13> Tx: $00bf80bd#56 -[47.988] read(): <13> Rx: $m2007ffac,4#26 -[47.988] handlePacket(): Reading 0x4 bytes of memory from addr 0x2007ffac -[47.989] write(): <13> Tx: $00000001#81 -[47.989] read(): <13> Rx: $m80005ec,4#92 -[47.989] handlePacket(): Reading 0x4 bytes of memory from addr 0x80005ec -[47.989] write(): <13> Tx: $80b400af#25 -[47.989] read(): <13> Rx: $m80065c8,4#6b -[47.989] handlePacket(): Reading 0x4 bytes of memory from addr 0x80065c8 -[47.989] write(): <13> Tx: $03461846#a0 -[47.989] read(): <13> Rx: $m80070f4,4#66 -[47.989] handlePacket(): Reading 0x4 bytes of memory from addr 0x80070f4 -[47.990] write(): <13> Tx: $f8607b68#0b -[47.990] read(): <13> Rx: $m2007ffc0,40#25 -[47.990] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ffc0 -[47.990] write(): <13> Tx: $f0ff0720f40400200000000089670008d8ff072089670008010000002c860008f0ff07207d000000f404002000000000b08600080800002000000000db7f0008#57 -[47.990] read(): <13> Rx: $m8006788,4#42 -[47.990] handlePacket(): Reading 0x4 bytes of memory from addr 0x8006788 -[47.991] write(): <13> Tx: $4ff47a70#33 -[47.991] read(): <13> Rx: $m8007fda,4#c7 -[47.991] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007fda -[47.991] write(): <13> Tx: $70470000#92 -[47.991] read(): <13> Rx: $m8007f80,40#9a -[47.991] handlePacket(): Reading 0x40 bytes of memory from addr 0x8007f80 -[47.992] write(): <13> Tx: $1a68bb681a447b681a603b68fa681a6000bf1437bd465df8047b7047834b040000ca9a3bdff834d0002103e00c4b5b58435004310b480c4b42189a42f6d30b4a#cf -[47.992] read(): <13> Rx: $m8007fdc,4#c9 -[47.992] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007fdc -[47.992] write(): <13> Tx: $00000820#8a -[48.015] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[48.015] write(): <13> Tx: $l#8b -[48.015] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[48.015] write(): <13> Tx: $l#8b -[48.447] read(): <13> Rx: $vCont;s:1;c#c1 -[48.448] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[48.512] handle_vCont_s(): handle_vCont_s, step thread -[48.512] write(): <13> Tx: $OK#9a -[48.523] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[48.523] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[48.529] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[48.529] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[48.529] read(): <13> Rx: $vStopped#55 -[48.529] write(): <13> Tx: $OK#9a -[48.530] read(): <13> Rx: $g#67 -[48.536] write(): <13> Tx: $6c4600007d0000006b4600006c46000000000000000000000000000034ff0720000000000000000000000000000000000000000034ff0720e7450008f60500082d00006100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff100000000000000000000000000000000000000034ff072000000000#79 -[48.536] read(): <13> Rx: $vCont;s:1;c#c1 -[48.537] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[48.544] handle_vCont_s(): handle_vCont_s, step thread -[48.544] write(): <13> Tx: $OK#9a -[48.555] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[48.555] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[48.561] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[48.562] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[48.586] read(): <13> Rx: $vStopped#55 -[48.586] write(): <13> Tx: $OK#9a -[48.586] read(): <13> Rx: $g#67 -[48.593] write(): <13> Tx: $6c4600007d0000006b4600006c46000000000000000000000000000034ff0720000000000000000000000000000000000000000034ff0720e7450008f80500082d00006100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff100000000000000000000000000000000000000034ff072000000000#7b -[48.593] read(): <13> Rx: $vCont;s:1;c#c1 -[48.593] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[48.600] handle_vCont_s(): handle_vCont_s, step thread -[48.600] write(): <13> Tx: $OK#9a -[48.611] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[48.611] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[48.616] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[48.617] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[48.642] read(): <13> Rx: $vStopped#55 -[48.642] write(): <13> Tx: $OK#9a -[48.643] read(): <13> Rx: $g#67 -[48.650] write(): <13> Tx: $6c4600007d0000006b4600006c46000000000000000000000000000038ff0720000000000000000000000000000000000000000038ff0720e7450008fc0500082d00006100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff100000000000000000000000000000000000000038ff072000000000#b2 -[48.650] read(): <13> Rx: $vCont;s:1;c#c1 -[48.650] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[48.657] handle_vCont_s(): handle_vCont_s, step thread -[48.657] write(): <13> Tx: $OK#9a -[48.668] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[48.668] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[48.674] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[48.674] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[48.698] read(): <13> Rx: $vStopped#55 -[48.699] write(): <13> Tx: $OK#9a -[48.699] read(): <13> Rx: $g#67 -[48.705] write(): <13> Tx: $6c4600007d0000006b4600006c46000000000000000000000000000038ff0720000000000000000000000000000000000000000038ff0720e7450008e64500082d00006100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff100000000000000000000000000000000000000038ff072000000000#88 -[48.706] read(): <13> Rx: $m80045e6,4#69 -[48.706] handlePacket(): Reading 0x4 bytes of memory from addr 0x80045e6 -[48.707] write(): <13> Tx: $02467b68#d3 -[48.707] read(): <13> Rx: $m2007ff40,40#f6 -[48.707] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff40 -[48.708] write(): <13> Tx: $48ff07201746000864000000e40200206400000017460c0008000020a401002068ff07202d6e000800000000e400002078ff07200b28000880ff0720e4000020#2a -[48.708] read(): <13> Rx: $m8004616,4#36 -[48.708] handlePacket(): Reading 0x4 bytes of memory from addr 0x8004616 -[48.709] write(): <13> Tx: $7b68db68#3b -[48.709] read(): <13> Rx: $vCont;s:1;c#c1 -[48.710] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[48.717] handle_vCont_s(): handle_vCont_s, step thread -[48.717] write(): <13> Tx: $OK#9a -[48.728] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[48.728] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[48.734] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[48.735] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[48.759] read(): <13> Rx: $vStopped#55 -[48.759] write(): <13> Tx: $OK#9a -[48.759] read(): <13> Rx: $g#67 -[48.766] write(): <13> Tx: $6c4600007d0000006c4600006c46000000000000000000000000000038ff0720000000000000000000000000000000000000000038ff0720e7450008e84500082d00006100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff100000000000000000000000000000000000000038ff072000000000#8b -[48.766] read(): <13> Rx: $vCont;s:1;c#c1 -[48.767] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[48.774] handle_vCont_s(): handle_vCont_s, step thread -[48.774] write(): <13> Tx: $OK#9a -[48.785] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[48.786] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[48.791] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[48.792] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[48.818] read(): <13> Rx: $vStopped#55 -[48.819] write(): <13> Tx: $OK#9a -[48.819] read(): <13> Rx: $g#67 -[48.826] write(): <13> Tx: $6c4600007d0000006c460000e402002000000000000000000000000038ff0720000000000000000000000000000000000000000038ff0720e7450008ea4500082d00006100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff100000000000000000000000000000000000000038ff072000000000#ae -[48.826] read(): <13> Rx: $vCont;s:1;c#c1 -[48.826] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[48.834] handle_vCont_s(): handle_vCont_s, step thread -[48.834] write(): <13> Tx: $OK#9a -[48.845] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[48.845] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[48.851] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[48.852] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[48.874] read(): <13> Rx: $vStopped#55 -[48.874] write(): <13> Tx: $OK#9a -[48.875] read(): <13> Rx: $g#67 -[48.882] write(): <13> Tx: $6c4600007d0000006c460000e402002000000000000000000000000038ff0720000000000000000000000000000000000000000038ff0720e7450008ec4500082d00006100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff100000000000000000000000000000000000000038ff072000000000#b0 -[48.882] read(): <13> Rx: $m80045ec,4#96 -[48.882] handlePacket(): Reading 0x4 bytes of memory from addr 0x80045ec -[48.883] write(): <13> Tx: $7868fff7#46 -[48.884] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[48.884] write(): <13> Tx: $l#8b -[48.884] read(): <13> Rx: $m2007ff40,40#f6 -[48.884] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff40 -[48.885] write(): <13> Tx: $48ff07201746000864000000e40200206400000017460c0008000020a401002068ff07202d6e000800000000e400002078ff07200b28000880ff0720e4000020#2a -[48.886] read(): <13> Rx: $m8004616,4#36 -[48.886] handlePacket(): Reading 0x4 bytes of memory from addr 0x8004616 -[48.887] write(): <13> Tx: $7b68db68#3b -[48.887] read(): <13> Rx: $m2007ff00,40#f2 -[48.887] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff00 -[48.888] write(): <13> Tx: $000000000000000000000000000000000000000000000000000000000000000064ff072028ff07204a46000030ff07206b46000038ff072040000000e4020020#b8 -[48.902] read(): <13> Rx: $m200004f0,4#89 -[48.902] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[48.903] write(): <13> Tx: $00000000#80 -[48.906] read(): <13> Rx: $m2007ff40,40#f6 -[48.906] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff40 -[48.907] write(): <13> Tx: $48ff07201746000864000000e40200206400000017460c0008000020a401002068ff07202d6e000800000000e400002078ff07200b28000880ff0720e4000020#2a -[48.907] read(): <13> Rx: $m8006e2c,4#95 -[48.907] handlePacket(): Reading 0x4 bytes of memory from addr 0x8006e2c -[48.908] write(): <13> Tx: $f0ee407a#5c -[48.908] read(): <13> Rx: $m800280a,4#60 -[48.908] handlePacket(): Reading 0x4 bytes of memory from addr 0x800280a -[48.910] write(): <13> Tx: $7b681b68#08 -[48.910] read(): <13> Rx: $m2007ff80,40#fa -[48.910] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff80 -[48.911] write(): <13> Tx: $88ff0720277e0008b0ff0720f9fffffff80400207d000000f0ff0720f804002000000000c9650008ec0500080000000100000000f8040020c0ff0720f5700008#65 -[48.911] read(): <13> Rx: $m8007e26,4#69 -[48.911] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007e26 -[48.912] write(): <13> Tx: $00bf80bd#56 -[48.912] read(): <13> Rx: $m2007ffac,4#26 -[48.912] handlePacket(): Reading 0x4 bytes of memory from addr 0x2007ffac -[48.913] write(): <13> Tx: $00000001#81 -[48.913] read(): <13> Rx: $m80005ec,4#92 -[48.913] handlePacket(): Reading 0x4 bytes of memory from addr 0x80005ec -[48.913] write(): <13> Tx: $80b400af#25 -[48.913] read(): <13> Rx: $m80065c8,4#6b -[48.913] handlePacket(): Reading 0x4 bytes of memory from addr 0x80065c8 -[48.914] write(): <13> Tx: $03461846#a0 -[48.914] read(): <13> Rx: $m80070f4,4#66 -[48.914] handlePacket(): Reading 0x4 bytes of memory from addr 0x80070f4 -[48.915] write(): <13> Tx: $f8607b68#0b -[48.915] read(): <13> Rx: $m2007ffc0,40#25 -[48.915] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ffc0 -[48.916] write(): <13> Tx: $f0ff0720f40400200000000089670008d8ff072089670008010000002c860008f0ff07207d000000f404002000000000b08600080800002000000000db7f0008#57 -[48.916] read(): <13> Rx: $m8006788,4#42 -[48.916] handlePacket(): Reading 0x4 bytes of memory from addr 0x8006788 -[48.916] write(): <13> Tx: $4ff47a70#33 -[48.917] read(): <13> Rx: $m8007fda,4#c7 -[48.917] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007fda -[48.917] write(): <13> Tx: $70470000#92 -[48.917] read(): <13> Rx: $m8007f80,40#9a -[48.917] handlePacket(): Reading 0x40 bytes of memory from addr 0x8007f80 -[48.918] write(): <13> Tx: $1a68bb681a447b681a603b68fa681a6000bf1437bd465df8047b7047834b040000ca9a3bdff834d0002103e00c4b5b58435004310b480c4b42189a42f6d30b4a#cf -[48.918] read(): <13> Rx: $m8007fdc,4#c9 -[48.918] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007fdc -[48.918] write(): <13> Tx: $00000820#8a -[49.109] read(): <13> Rx: $m2007ff00,40#f2 -[49.109] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff00 -[49.110] write(): <13> Tx: $000000000000000000000000000000000000000000000000000000000000000064ff072028ff07204a46000030ff07206b46000038ff072040000000e4020020#b8 -[49.117] read(): <13> Rx: $vCont;s:1;c#c1 -[49.118] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[49.124] handle_vCont_s(): handle_vCont_s, step thread -[49.124] write(): <13> Tx: $OK#9a -[49.135] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[49.135] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[49.140] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[49.140] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[49.166] read(): <13> Rx: $vStopped#55 -[49.166] write(): <13> Tx: $OK#9a -[49.166] read(): <13> Rx: $g#67 -[49.173] write(): <13> Tx: $e40200207d0000006c460000e402002000000000000000000000000038ff0720000000000000000000000000000000000000000038ff0720e7450008ee4500082d00006100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff100000000000000000000000000000000000000038ff072000000000#ac -[49.173] read(): <13> Rx: $vCont;s:1;c#c1 -[49.173] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[49.179] handle_vCont_s(): handle_vCont_s, step thread -[49.179] write(): <13> Tx: $OK#9a -[49.179] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[49.179] write(): <13> Tx: $l#8b -[49.180] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[49.180] write(): <13> Tx: $l#8b -[49.188] read(): <13> Rx: $T1#85 -[49.188] write(): <13> Tx: $OK#9a -[49.188] read(): <13> Rx: $T1#85 -[49.188] write(): <13> Tx: $OK#9a -[49.198] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[49.198] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[49.204] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[49.204] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[49.230] read(): <13> Rx: $vStopped#55 -[49.230] write(): <13> Tx: $OK#9a -[49.230] read(): <13> Rx: $g#67 -[49.237] write(): <13> Tx: $e40200207d0000006c460000e402002000000000000000000000000038ff0720000000000000000000000000000000000000000038ff0720f3450008164500082d00006100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff100000000000000000000000000000000000000038ff072000000000#46 -[49.237] read(): <13> Rx: $m8004516,4#35 -[49.237] handlePacket(): Reading 0x4 bytes of memory from addr 0x8004516 -[49.238] write(): <13> Tx: $80b485b0#fd -[49.238] read(): <13> Rx: $m80045f2,4#66 -[49.238] handlePacket(): Reading 0x4 bytes of memory from addr 0x80045f2 -[49.238] write(): <13> Tx: $02467b68#d3 -[49.239] read(): <13> Rx: $m8004500,40#5e -[49.239] handlePacket(): Reading 0x40 bytes of memory from addr 0x8004500 -[49.239] write(): <13> Tx: $5a677b6800225a66786802f0b9fc00bf0837bd4680bd80b485b000af78607b681b681b685a6a7b681b68db685b08d31afb60fb6818461437bd465df8047b7047#30 -[49.239] read(): <13> Rx: $m800451e,2#62 -[49.239] handlePacket(): Reading 0x2 bytes of memory from addr 0x800451e -[49.240] write(): <13> Tx: $7b68#07 -[49.240] read(): <13> Rx: $Z1,800451e,2#ac -[49.240] write(): <13> Tx: $OK#9a -[49.240] read(): <13> Rx: $vCont;c#a8 -[49.240] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[49.246] handle_vCont_c(): handle_vCont_c, continue thread -[49.246] write(): <13> Tx: $OK#9a -[49.256] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[49.256] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[49.261] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000003 -[49.262] write(): <13> Tx: %Stop:T05hwbreak:;thread:1;core:0;#7e -[49.286] read(): <13> Rx: $vStopped#55 -[49.286] write(): <13> Tx: $OK#9a -[49.286] read(): <13> Rx: $g#67 -[49.293] write(): <13> Tx: $e40200207d0000006c460000e402002000000000000000000000000020ff0720000000000000000000000000000000000000000020ff0720f34500081e4500082d00006100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff100000000000000000000000000000000000000020ff072000000000#5a -[49.293] read(): <13> Rx: $z1,800451e,2#cc -[49.293] write(): <13> Tx: $OK#9a -[49.293] read(): <13> Rx: $m800451e,4#64 -[49.293] handlePacket(): Reading 0x4 bytes of memory from addr 0x800451e -[49.294] write(): <13> Tx: $7b681b68#08 -[49.294] read(): <13> Rx: $m80045f2,4#66 -[49.294] handlePacket(): Reading 0x4 bytes of memory from addr 0x80045f2 -[49.295] write(): <13> Tx: $02467b68#d3 -[49.295] read(): <13> Rx: $m2007ff00,40#f2 -[49.295] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff00 -[49.295] write(): <13> Tx: $000000000000000000000000000000000000000000000000000000000000000064ff0720e40200204a46000030ff07206b46000038ff072040000000e4020020#76 -[49.295] read(): <13> Rx: $m8004500,40#5e -[49.295] handlePacket(): Reading 0x40 bytes of memory from addr 0x8004500 -[49.296] write(): <13> Tx: $5a677b6800225a66786802f0b9fc00bf0837bd4680bd80b485b000af78607b681b681b685a6a7b681b68db685b08d31afb60fb6818461437bd465df8047b7047#30 -[49.296] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[49.296] write(): <13> Tx: $l#8b -[49.312] read(): <13> Rx: $m200004f0,4#89 -[49.312] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[49.313] write(): <13> Tx: $00000000#80 -[49.324] read(): <13> Rx: $m2007ff40,40#f6 -[49.324] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff40 -[49.325] write(): <13> Tx: $48ff07201746000864000000e40200206400000017460c0008000020a401002068ff07202d6e000800000000e400002078ff07200b28000880ff0720e4000020#2a -[49.325] read(): <13> Rx: $m8004616,4#36 -[49.325] handlePacket(): Reading 0x4 bytes of memory from addr 0x8004616 -[49.327] write(): <13> Tx: $7b68db68#3b -[49.327] read(): <13> Rx: $m8006e2c,4#95 -[49.327] handlePacket(): Reading 0x4 bytes of memory from addr 0x8006e2c -[49.327] write(): <13> Tx: $f0ee407a#5c -[49.328] read(): <13> Rx: $m800280a,4#60 -[49.328] handlePacket(): Reading 0x4 bytes of memory from addr 0x800280a -[49.328] write(): <13> Tx: $7b681b68#08 -[49.328] read(): <13> Rx: $m2007ff80,40#fa -[49.328] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff80 -[49.329] write(): <13> Tx: $88ff0720277e0008b0ff0720f9fffffff80400207d000000f0ff0720f804002000000000c9650008ec0500080000000100000000f8040020c0ff0720f5700008#65 -[49.329] read(): <13> Rx: $m8007e26,4#69 -[49.329] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007e26 -[49.329] write(): <13> Tx: $00bf80bd#56 -[49.330] read(): <13> Rx: $m2007ffac,4#26 -[49.330] handlePacket(): Reading 0x4 bytes of memory from addr 0x2007ffac -[49.330] write(): <13> Tx: $00000001#81 -[49.330] read(): <13> Rx: $m80005ec,4#92 -[49.330] handlePacket(): Reading 0x4 bytes of memory from addr 0x80005ec -[49.330] write(): <13> Tx: $80b400af#25 -[49.330] read(): <13> Rx: $m80065c8,4#6b -[49.330] handlePacket(): Reading 0x4 bytes of memory from addr 0x80065c8 -[49.331] write(): <13> Tx: $03461846#a0 -[49.331] read(): <13> Rx: $m80070f4,4#66 -[49.331] handlePacket(): Reading 0x4 bytes of memory from addr 0x80070f4 -[49.331] write(): <13> Tx: $f8607b68#0b -[49.331] read(): <13> Rx: $m2007ffc0,40#25 -[49.331] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ffc0 -[49.332] write(): <13> Tx: $f0ff0720f40400200000000089670008d8ff072089670008010000002c860008f0ff07207d000000f404002000000000b08600080800002000000000db7f0008#57 -[49.332] read(): <13> Rx: $m8006788,4#42 -[49.332] handlePacket(): Reading 0x4 bytes of memory from addr 0x8006788 -[49.332] write(): <13> Tx: $4ff47a70#33 -[49.332] read(): <13> Rx: $m8007fda,4#c7 -[49.332] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007fda -[49.333] write(): <13> Tx: $70470000#92 -[49.333] read(): <13> Rx: $m8007f80,40#9a -[49.333] handlePacket(): Reading 0x40 bytes of memory from addr 0x8007f80 -[49.333] write(): <13> Tx: $1a68bb681a447b681a603b68fa681a6000bf1437bd465df8047b7047834b040000ca9a3bdff834d0002103e00c4b5b58435004310b480c4b42189a42f6d30b4a#cf -[49.333] read(): <13> Rx: $m8007fdc,4#c9 -[49.333] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007fdc -[49.334] write(): <13> Tx: $00000820#8a -[49.360] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[49.360] write(): <13> Tx: $l#8b -[49.361] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[49.361] write(): <13> Tx: $l#8b -[49.361] read(): <13> Rx: $m2007ff00,40#f2 -[49.361] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff00 -[49.362] write(): <13> Tx: $000000000000000000000000000000000000000000000000000000000000000064ff0720e40200204a46000030ff07206b46000038ff072040000000e4020020#76 -[49.722] read(): <13> Rx: $m2007ff00,40#f2 -[49.722] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff00 -[49.722] write(): <13> Tx: $000000000000000000000000000000000000000000000000000000000000000064ff0720e40200204a46000030ff07206b46000038ff072040000000e4020020#76 -[49.751] read(): <13> Rx: $m2007ff00,40#f2 -[49.752] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff00 -[49.752] write(): <13> Tx: $000000000000000000000000000000000000000000000000000000000000000064ff0720e40200204a46000030ff07206b46000038ff072040000000e4020020#76 -[49.752] read(): <13> Rx: $m2007ff00,40#f2 -[49.752] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff00 -[49.753] write(): <13> Tx: $000000000000000000000000000000000000000000000000000000000000000064ff0720e40200204a46000030ff07206b46000038ff072040000000e4020020#76 -[50.195] read(): <13> Rx: $vCont;s:1;c#c1 -[50.195] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[50.201] handle_vCont_s(): handle_vCont_s, step thread -[50.201] write(): <13> Tx: $OK#9a -[50.212] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[50.212] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[50.217] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[50.218] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[50.218] read(): <13> Rx: $vStopped#55 -[50.218] write(): <13> Tx: $OK#9a -[50.218] read(): <13> Rx: $g#67 -[50.224] write(): <13> Tx: $e40200207d0000006c460000e402002000000000000000000000000020ff0720000000000000000000000000000000000000000020ff0720f3450008204500082d00006100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff100000000000000000000000000000000000000020ff072000000000#26 -[50.224] read(): <13> Rx: $vCont;s:1;c#c1 -[50.235] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[50.241] handle_vCont_s(): handle_vCont_s, step thread -[50.242] write(): <13> Tx: $OK#9a -[50.252] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[50.252] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[50.258] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[50.258] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[50.282] read(): <13> Rx: $vStopped#55 -[50.282] write(): <13> Tx: $OK#9a -[50.283] read(): <13> Rx: $g#67 -[50.289] write(): <13> Tx: $e40200207d0000006c460000a400002000000000000000000000000020ff0720000000000000000000000000000000000000000020ff0720f3450008224500082d00006100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff100000000000000000000000000000000000000020ff072000000000#22 -[50.289] read(): <13> Rx: $vCont;s:1;c#c1 -[50.290] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[50.296] handle_vCont_s(): handle_vCont_s, step thread -[50.297] write(): <13> Tx: $OK#9a -[50.307] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[50.307] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[50.313] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[50.314] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[50.338] read(): <13> Rx: $vStopped#55 -[50.339] write(): <13> Tx: $OK#9a -[50.339] read(): <13> Rx: $g#67 -[50.345] write(): <13> Tx: $e40200207d0000006c4600000000004000000000000000000000000020ff0720000000000000000000000000000000000000000020ff0720f3450008244500082d00006100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff100000000000000000000000000000000000000020ff072000000000#f1 -[50.346] read(): <13> Rx: $vCont;s:1;c#c1 -[50.346] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[50.353] handle_vCont_s(): handle_vCont_s, step thread -[50.353] write(): <13> Tx: $OK#9a -[50.364] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[50.364] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[50.370] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[50.371] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[50.394] read(): <13> Rx: $vStopped#55 -[50.394] write(): <13> Tx: $OK#9a -[50.395] read(): <13> Rx: $g#67 -[50.401] write(): <13> Tx: $e40200207d000000ffffff7f0000004000000000000000000000000020ff0720000000000000000000000000000000000000000020ff0720f3450008264500082d00006100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff100000000000000000000000000000000000000020ff072000000000#31 -[50.402] read(): <13> Rx: $vCont;s:1;c#c1 -[50.402] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[50.410] handle_vCont_s(): handle_vCont_s, step thread -[50.410] write(): <13> Tx: $OK#9a -[50.420] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[50.420] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[50.426] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[50.427] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[50.450] read(): <13> Rx: $vStopped#55 -[50.450] write(): <13> Tx: $OK#9a -[50.451] read(): <13> Rx: $g#67 -[50.457] write(): <13> Tx: $e40200207d000000ffffff7fe402002000000000000000000000000020ff0720000000000000000000000000000000000000000020ff0720f3450008284500082d00006100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff100000000000000000000000000000000000000020ff072000000000#6c -[50.458] read(): <13> Rx: $vCont;s:1;c#c1 -[50.458] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[50.465] handle_vCont_s(): handle_vCont_s, step thread -[50.465] write(): <13> Tx: $OK#9a -[50.476] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[50.476] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[50.482] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[50.483] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[50.506] read(): <13> Rx: $vStopped#55 -[50.506] write(): <13> Tx: $OK#9a -[50.507] read(): <13> Rx: $g#67 -[50.513] write(): <13> Tx: $e40200207d000000ffffff7fa400002000000000000000000000000020ff0720000000000000000000000000000000000000000020ff0720f34500082a4500082d00006100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff100000000000000000000000000000000000000020ff072000000000#8f -[50.514] read(): <13> Rx: $vCont;s:1;c#c1 -[50.514] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[50.521] handle_vCont_s(): handle_vCont_s, step thread -[50.521] write(): <13> Tx: $OK#9a -[50.532] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[50.532] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[50.537] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[50.538] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[50.562] read(): <13> Rx: $vStopped#55 -[50.562] write(): <13> Tx: $OK#9a -[50.563] read(): <13> Rx: $g#67 -[50.569] write(): <13> Tx: $e40200207d000000ffffff7fffffffff00000000000000000000000020ff0720000000000000000000000000000000000000000020ff0720f34500082c4500082d00006100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff100000000000000000000000000000000000000020ff072000000000#0a -[50.570] read(): <13> Rx: $vCont;s:1;c#c1 -[50.570] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[50.577] handle_vCont_s(): handle_vCont_s, step thread -[50.577] write(): <13> Tx: $OK#9a -[50.587] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[50.587] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[50.593] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[50.593] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[50.618] read(): <13> Rx: $vStopped#55 -[50.618] write(): <13> Tx: $OK#9a -[50.618] read(): <13> Rx: $g#67 -[50.625] write(): <13> Tx: $e40200207d000000ffffff7fffffff7f00000000000000000000000020ff0720000000000000000000000000000000000000000020ff0720f34500082e4500082d00002100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff100000000000000000000000000000000000000020ff072000000000#d9 -[50.625] read(): <13> Rx: $vCont;s:1;c#c1 -[50.625] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[50.632] handle_vCont_s(): handle_vCont_s, step thread -[50.632] write(): <13> Tx: $OK#9a -[50.642] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[50.642] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[50.648] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[50.648] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[50.675] read(): <13> Rx: $vStopped#55 -[50.675] write(): <13> Tx: $OK#9a -[50.675] read(): <13> Rx: $g#67 -[50.682] write(): <13> Tx: $e40200207d000000ffffff7f0000000000000000000000000000000020ff0720000000000000000000000000000000000000000020ff0720f3450008304500082d00006100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff100000000000000000000000000000000000000020ff072000000000#28 -[50.682] read(): <13> Rx: $vCont;s:1;c#c1 -[50.683] SWV_SetStatus(): SWV_SetStatus(true): stop_reply_pending == 0 -[50.689] handle_vCont_s(): handle_vCont_s, step thread -[50.689] write(): <13> Tx: $OK#9a -[50.699] SWV_SetStatus(): SWV_SetStatus(false): stop_reply_pending == 1 -[50.699] handleGDBConnection(): TraceCaptureStart and SWV event set to APP_FALSE (0) -[50.705] Device_GetHaltReason(): NVIC_DFSR_REG = 0x00000001 -[50.705] write(): <13> Tx: %Stop:T05thread:1;core:0;#25 -[50.730] read(): <13> Rx: $vStopped#55 -[50.730] write(): <13> Tx: $OK#9a -[50.730] read(): <13> Rx: $g#67 -[50.737] write(): <13> Tx: $e40200207d000000ffffff7f0000000000000000000000000000000020ff0720000000000000000000000000000000000000000020ff0720f3450008324500082d00006100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f12833a00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff100000000000000000000000000000000000000020ff072000000000#2a -[50.737] read(): <13> Rx: $m8004532,4#33 -[50.737] handlePacket(): Reading 0x4 bytes of memory from addr 0x8004532 -[50.738] write(): <13> Tx: $fb681846#09 -[50.738] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[50.738] write(): <13> Tx: $l#8b -[50.738] read(): <13> Rx: $m80045f2,4#66 -[50.738] handlePacket(): Reading 0x4 bytes of memory from addr 0x80045f2 -[50.739] write(): <13> Tx: $02467b68#d3 -[50.739] read(): <13> Rx: $m2007ff00,40#f2 -[50.739] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff00 -[50.740] write(): <13> Tx: $000000000000000000000000000000000000000000000000000000000000000064ff0720e40200204a460000000000006b46000038ff072040000000e4020020#fe -[50.740] read(): <13> Rx: $T1#85 -[50.740] write(): <13> Tx: $OK#9a -[50.740] read(): <13> Rx: $T1#85 -[50.740] write(): <13> Tx: $OK#9a -[50.740] read(): <13> Rx: $m2007ff00,40#f2 -[50.740] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff00 -[50.741] write(): <13> Tx: $000000000000000000000000000000000000000000000000000000000000000064ff0720e40200204a460000000000006b46000038ff072040000000e4020020#fe -[50.760] read(): <13> Rx: $m200004f0,4#89 -[50.760] handlePacket(): Reading 0x4 bytes of memory from addr 0x200004f0 -[50.760] write(): <13> Tx: $00000000#80 -[50.762] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[50.763] write(): <13> Tx: $l#8b -[50.763] read(): <13> Rx: $m2007ff00,40#f2 -[50.763] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff00 -[50.764] write(): <13> Tx: $000000000000000000000000000000000000000000000000000000000000000064ff0720e40200204a460000000000006b46000038ff072040000000e4020020#fe -[50.765] read(): <13> Rx: $m2007ff40,40#f6 -[50.765] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff40 -[50.765] write(): <13> Tx: $48ff07201746000864000000e40200206400000017460c0008000020a401002068ff07202d6e000800000000e400002078ff07200b28000880ff0720e4000020#2a -[50.765] read(): <13> Rx: $m8004616,4#36 -[50.765] handlePacket(): Reading 0x4 bytes of memory from addr 0x8004616 -[50.766] write(): <13> Tx: $7b68db68#3b -[50.766] read(): <13> Rx: $m8006e2c,4#95 -[50.766] handlePacket(): Reading 0x4 bytes of memory from addr 0x8006e2c -[50.766] write(): <13> Tx: $f0ee407a#5c -[50.767] read(): <13> Rx: $m800280a,4#60 -[50.767] handlePacket(): Reading 0x4 bytes of memory from addr 0x800280a -[50.767] write(): <13> Tx: $7b681b68#08 -[50.767] read(): <13> Rx: $m2007ff80,40#fa -[50.767] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff80 -[50.768] write(): <13> Tx: $88ff0720277e0008b0ff0720f9fffffff80400207d000000f0ff0720f804002000000000c9650008ec0500080000000100000000f8040020c0ff0720f5700008#65 -[50.768] read(): <13> Rx: $m8007e26,4#69 -[50.768] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007e26 -[50.769] write(): <13> Tx: $00bf80bd#56 -[50.769] read(): <13> Rx: $m2007ffac,4#26 -[50.769] handlePacket(): Reading 0x4 bytes of memory from addr 0x2007ffac -[50.769] write(): <13> Tx: $00000001#81 -[50.769] read(): <13> Rx: $m80005ec,4#92 -[50.769] handlePacket(): Reading 0x4 bytes of memory from addr 0x80005ec -[50.769] write(): <13> Tx: $80b400af#25 -[50.769] read(): <13> Rx: $m80065c8,4#6b -[50.769] handlePacket(): Reading 0x4 bytes of memory from addr 0x80065c8 -[50.770] write(): <13> Tx: $03461846#a0 -[50.770] read(): <13> Rx: $m80070f4,4#66 -[50.770] handlePacket(): Reading 0x4 bytes of memory from addr 0x80070f4 -[50.770] write(): <13> Tx: $f8607b68#0b -[50.770] read(): <13> Rx: $m2007ffc0,40#25 -[50.770] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ffc0 -[50.771] write(): <13> Tx: $f0ff0720f40400200000000089670008d8ff072089670008010000002c860008f0ff07207d000000f404002000000000b08600080800002000000000db7f0008#57 -[50.771] read(): <13> Rx: $m8006788,4#42 -[50.771] handlePacket(): Reading 0x4 bytes of memory from addr 0x8006788 -[50.771] write(): <13> Tx: $4ff47a70#33 -[50.771] read(): <13> Rx: $m8007fda,4#c7 -[50.771] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007fda -[50.772] write(): <13> Tx: $70470000#92 -[50.772] read(): <13> Rx: $m8007f80,40#9a -[50.772] handlePacket(): Reading 0x40 bytes of memory from addr 0x8007f80 -[50.773] write(): <13> Tx: $1a68bb681a447b681a603b68fa681a6000bf1437bd465df8047b7047834b040000ca9a3bdff834d0002103e00c4b5b58435004310b480c4b42189a42f6d30b4a#cf -[50.773] read(): <13> Rx: $m8007fdc,4#c9 -[50.773] handlePacket(): Reading 0x4 bytes of memory from addr 0x8007fdc -[50.773] write(): <13> Tx: $00000820#8a -[50.815] read(): <13> Rx: $qXfer:threads:read::0,bfb#fb -[50.815] write(): <13> Tx: $l#8b -[50.862] read(): <13> Rx: $m2007ff00,40#f2 -[50.862] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff00 -[50.863] write(): <13> Tx: $000000000000000000000000000000000000000000000000000000000000000064ff0720e40200204a460000000000006b46000038ff072040000000e4020020#fe -[50.887] read(): <13> Rx: $m2007ff00,40#f2 -[50.887] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff00 -[50.888] write(): <13> Tx: $000000000000000000000000000000000000000000000000000000000000000064ff0720e40200204a460000000000006b46000038ff072040000000e4020020#fe -[50.888] read(): <13> Rx: $m2007ff00,40#f2 -[50.888] handlePacket(): Reading 0x40 bytes of memory from addr 0x2007ff00 -[50.889] write(): <13> Tx: $000000000000000000000000000000000000000000000000000000000000000064ff0720e40200204a460000000000006b46000038ff072040000000e4020020#fe -[52.343] read(): <13> Rx: $vKill;a410#33 -[52.343] handlePacket(): Hidden/Unsupported v-command 'vKill', see RSP for details -[52.343] write(): <13> Tx: $#00 -[52.343] read(): <13> Rx: $k#6b -[52.343] stop(): Stopping port 61235 diff --git a/otto_controller_source/Release/Core/Src/subdir.mk b/otto_controller_source/Release/Core/Src/subdir.mk new file mode 100644 index 0000000..a8c0663 --- /dev/null +++ b/otto_controller_source/Release/Core/Src/subdir.mk @@ -0,0 +1,68 @@ +################################################################################ +# Automatically-generated file. Do not edit! +################################################################################ + +# Add inputs and outputs from these tool invocations to the build variables +C_SRCS += \ +../Core/Src/stm32f7xx_hal_msp.c \ +../Core/Src/stm32f7xx_it.c \ +../Core/Src/syscalls.c \ +../Core/Src/sysmem.c \ +../Core/Src/system_stm32f7xx.c + +CPP_SRCS += \ +../Core/Src/duration.cpp \ +../Core/Src/encoder.cpp \ +../Core/Src/main.cpp \ +../Core/Src/odometry_calc.cpp \ +../Core/Src/time.cpp + +OBJS += \ +./Core/Src/duration.o \ +./Core/Src/encoder.o \ +./Core/Src/main.o \ +./Core/Src/odometry_calc.o \ +./Core/Src/stm32f7xx_hal_msp.o \ +./Core/Src/stm32f7xx_it.o \ +./Core/Src/syscalls.o \ +./Core/Src/sysmem.o \ +./Core/Src/system_stm32f7xx.o \ +./Core/Src/time.o + +C_DEPS += \ +./Core/Src/stm32f7xx_hal_msp.d \ +./Core/Src/stm32f7xx_it.d \ +./Core/Src/syscalls.d \ +./Core/Src/sysmem.d \ +./Core/Src/system_stm32f7xx.d + +CPP_DEPS += \ +./Core/Src/duration.d \ +./Core/Src/encoder.d \ +./Core/Src/main.d \ +./Core/Src/odometry_calc.d \ +./Core/Src/time.d + + +# Each subdirectory must supply rules for building sources it contributes +Core/Src/duration.o: ../Core/Src/duration.cpp + arm-none-eabi-g++ "$<" -mcpu=cortex-m7 -std=gnu++14 -DUSE_HAL_DRIVER -DSTM32F767xx -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O3 -ffunction-sections -fdata-sections -fno-exceptions -fno-rtti -fno-threadsafe-statics -fno-use-cxa-atexit -Wall -fstack-usage -MMD -MP -MF"Core/Src/duration.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" +Core/Src/encoder.o: ../Core/Src/encoder.cpp + arm-none-eabi-g++ "$<" -mcpu=cortex-m7 -std=gnu++14 -DUSE_HAL_DRIVER -DSTM32F767xx -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O3 -ffunction-sections -fdata-sections -fno-exceptions -fno-rtti -fno-threadsafe-statics -fno-use-cxa-atexit -Wall -fstack-usage -MMD -MP -MF"Core/Src/encoder.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" +Core/Src/main.o: ../Core/Src/main.cpp + arm-none-eabi-g++ "$<" -mcpu=cortex-m7 -std=gnu++14 -DUSE_HAL_DRIVER -DSTM32F767xx -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O3 -ffunction-sections -fdata-sections -fno-exceptions -fno-rtti -fno-threadsafe-statics -fno-use-cxa-atexit -Wall -fstack-usage -MMD -MP -MF"Core/Src/main.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" +Core/Src/odometry_calc.o: ../Core/Src/odometry_calc.cpp + arm-none-eabi-g++ "$<" -mcpu=cortex-m7 -std=gnu++14 -DUSE_HAL_DRIVER -DSTM32F767xx -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O3 -ffunction-sections -fdata-sections -fno-exceptions -fno-rtti -fno-threadsafe-statics -fno-use-cxa-atexit -Wall -fstack-usage -MMD -MP -MF"Core/Src/odometry_calc.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" +Core/Src/stm32f7xx_hal_msp.o: ../Core/Src/stm32f7xx_hal_msp.c + arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -DUSE_HAL_DRIVER -DSTM32F767xx -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O3 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/stm32f7xx_hal_msp.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" +Core/Src/stm32f7xx_it.o: ../Core/Src/stm32f7xx_it.c + arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -DUSE_HAL_DRIVER -DSTM32F767xx -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O3 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/stm32f7xx_it.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" +Core/Src/syscalls.o: ../Core/Src/syscalls.c + arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -DUSE_HAL_DRIVER -DSTM32F767xx -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O3 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/syscalls.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" +Core/Src/sysmem.o: ../Core/Src/sysmem.c + arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -DUSE_HAL_DRIVER -DSTM32F767xx -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O3 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/sysmem.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" +Core/Src/system_stm32f7xx.o: ../Core/Src/system_stm32f7xx.c + arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -DUSE_HAL_DRIVER -DSTM32F767xx -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O3 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/system_stm32f7xx.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" +Core/Src/time.o: ../Core/Src/time.cpp + arm-none-eabi-g++ "$<" -mcpu=cortex-m7 -std=gnu++14 -DUSE_HAL_DRIVER -DSTM32F767xx -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O3 -ffunction-sections -fdata-sections -fno-exceptions -fno-rtti -fno-threadsafe-statics -fno-use-cxa-atexit -Wall -fstack-usage -MMD -MP -MF"Core/Src/time.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" + diff --git a/otto_controller_source/Debug/Startup/subdir.mk b/otto_controller_source/Release/Core/Startup/subdir.mk similarity index 60% rename from otto_controller_source/Debug/Startup/subdir.mk rename to otto_controller_source/Release/Core/Startup/subdir.mk index 6d36928..f9fe8dd 100644 --- a/otto_controller_source/Debug/Startup/subdir.mk +++ b/otto_controller_source/Release/Core/Startup/subdir.mk @@ -4,13 +4,13 @@ # Add inputs and outputs from these tool invocations to the build variables S_SRCS += \ -../Startup/startup_stm32f767zitx.s +../Core/Startup/startup_stm32f767zitx.s OBJS += \ -./Startup/startup_stm32f767zitx.o +./Core/Startup/startup_stm32f767zitx.o # Each subdirectory must supply rules for building sources it contributes -Startup/%.o: ../Startup/%.s - arm-none-eabi-gcc -mcpu=cortex-m7 -g3 -c -I../ -x assembler-with-cpp --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" "$<" +Core/Startup/%.o: ../Core/Startup/%.s + arm-none-eabi-gcc -mcpu=cortex-m7 -c -x assembler-with-cpp --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" "$<" diff --git a/otto_controller_source/Release/Drivers/STM32F7xx_HAL_Driver/Src/subdir.mk b/otto_controller_source/Release/Drivers/STM32F7xx_HAL_Driver/Src/subdir.mk new file mode 100644 index 0000000..8e93bbc --- /dev/null +++ b/otto_controller_source/Release/Drivers/STM32F7xx_HAL_Driver/Src/subdir.mk @@ -0,0 +1,104 @@ +################################################################################ +# Automatically-generated file. Do not edit! +################################################################################ + +# Add inputs and outputs from these tool invocations to the build variables +C_SRCS += \ +../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c \ +../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c \ +../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c \ +../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c \ +../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c \ +../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c \ +../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c \ +../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c \ +../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c \ +../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c \ +../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c \ +../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c \ +../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c \ +../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c \ +../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c \ +../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c \ +../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c \ +../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c + +OBJS += \ +./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o \ +./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o \ +./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o \ +./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o \ +./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o \ +./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o \ +./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o \ +./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o \ +./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o \ +./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o \ +./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o \ +./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o \ +./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o \ +./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o \ +./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o \ +./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o \ +./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o \ +./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o + +C_DEPS += \ +./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.d \ +./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.d \ +./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.d \ +./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.d \ +./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.d \ +./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.d \ +./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.d \ +./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.d \ +./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.d \ +./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.d \ +./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.d \ +./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.d \ +./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.d \ +./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.d \ +./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.d \ +./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.d \ +./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.d \ +./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.d + + +# Each subdirectory must supply rules for building sources it contributes +Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c + arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -DUSE_HAL_DRIVER -DSTM32F767xx -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O3 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" +Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c + arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -DUSE_HAL_DRIVER -DSTM32F767xx -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O3 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" +Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c + arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -DUSE_HAL_DRIVER -DSTM32F767xx -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O3 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" +Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c + arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -DUSE_HAL_DRIVER -DSTM32F767xx -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O3 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" +Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c + arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -DUSE_HAL_DRIVER -DSTM32F767xx -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O3 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" +Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c + arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -DUSE_HAL_DRIVER -DSTM32F767xx -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O3 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" +Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c + arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -DUSE_HAL_DRIVER -DSTM32F767xx -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O3 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" +Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c + arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -DUSE_HAL_DRIVER -DSTM32F767xx -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O3 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" +Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c + arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -DUSE_HAL_DRIVER -DSTM32F767xx -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O3 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" +Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c + arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -DUSE_HAL_DRIVER -DSTM32F767xx -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O3 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" +Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c + arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -DUSE_HAL_DRIVER -DSTM32F767xx -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O3 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" +Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c + arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -DUSE_HAL_DRIVER -DSTM32F767xx -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O3 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" +Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c + arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -DUSE_HAL_DRIVER -DSTM32F767xx -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O3 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" +Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c + arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -DUSE_HAL_DRIVER -DSTM32F767xx -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O3 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" +Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c + arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -DUSE_HAL_DRIVER -DSTM32F767xx -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O3 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" +Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c + arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -DUSE_HAL_DRIVER -DSTM32F767xx -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O3 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" +Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c + arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -DUSE_HAL_DRIVER -DSTM32F767xx -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O3 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" +Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c + arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -DUSE_HAL_DRIVER -DSTM32F767xx -c -I../Drivers/CMSIS/Include -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -O3 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -o "$@" + diff --git a/otto_controller_source/Release/makefile b/otto_controller_source/Release/makefile new file mode 100644 index 0000000..be3ddb4 --- /dev/null +++ b/otto_controller_source/Release/makefile @@ -0,0 +1,80 @@ +################################################################################ +# Automatically-generated file. Do not edit! +################################################################################ + +-include ../makefile.init + +RM := rm -rf + +# All of the sources participating in the build are defined here +-include sources.mk +-include Drivers/STM32F7xx_HAL_Driver/Src/subdir.mk +-include Core/Startup/subdir.mk +-include Core/Src/subdir.mk +-include subdir.mk +-include objects.mk + +ifneq ($(MAKECMDGOALS),clean) +ifneq ($(strip $(CC_DEPS)),) +-include $(CC_DEPS) +endif +ifneq ($(strip $(C++_DEPS)),) +-include $(C++_DEPS) +endif +ifneq ($(strip $(C_UPPER_DEPS)),) +-include $(C_UPPER_DEPS) +endif +ifneq ($(strip $(CXX_DEPS)),) +-include $(CXX_DEPS) +endif +ifneq ($(strip $(C_DEPS)),) +-include $(C_DEPS) +endif +ifneq ($(strip $(CPP_DEPS)),) +-include $(CPP_DEPS) +endif +endif + +-include ../makefile.defs + +# Add inputs and outputs from these tool invocations to the build variables +EXECUTABLES += \ +otto_controller_source.elf \ + +SIZE_OUTPUT += \ +default.size.stdout \ + +OBJDUMP_LIST += \ +otto_controller_source.list \ + + +# All Target +all: otto_controller_source.elf secondary-outputs + +# Tool invocations +otto_controller_source.elf: $(OBJS) $(USER_OBJS) /home/fdila/Projects/otto/otto_controller_source/STM32F767ZITX_FLASH.ld + arm-none-eabi-g++ -o "otto_controller_source.elf" @"objects.list" $(USER_OBJS) $(LIBS) -mcpu=cortex-m7 -T"/home/fdila/Projects/otto/otto_controller_source/STM32F767ZITX_FLASH.ld" -Wl,-Map="otto_controller_source.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -lstdc++ -lsupc++ -Wl,--end-group + @echo 'Finished building target: $@' + @echo ' ' + +default.size.stdout: $(EXECUTABLES) + arm-none-eabi-size $(EXECUTABLES) + @echo 'Finished building: $@' + @echo ' ' + +otto_controller_source.list: $(EXECUTABLES) + arm-none-eabi-objdump -h -S $(EXECUTABLES) > "otto_controller_source.list" + @echo 'Finished building: $@' + @echo ' ' + +# Other Targets +clean: + -$(RM) * + -@echo ' ' + +secondary-outputs: $(SIZE_OUTPUT) $(OBJDUMP_LIST) + +.PHONY: all clean dependents +.SECONDARY: + +-include ../makefile.targets diff --git a/otto_controller_source/Release/objects.list b/otto_controller_source/Release/objects.list new file mode 100644 index 0000000..a53335a --- /dev/null +++ b/otto_controller_source/Release/objects.list @@ -0,0 +1,29 @@ +"Core/Src/duration.o" +"Core/Src/encoder.o" +"Core/Src/main.o" +"Core/Src/odometry_calc.o" +"Core/Src/stm32f7xx_hal_msp.o" +"Core/Src/stm32f7xx_it.o" +"Core/Src/syscalls.o" +"Core/Src/sysmem.o" +"Core/Src/system_stm32f7xx.o" +"Core/Src/time.o" +"Core/Startup/startup_stm32f767zitx.o" +"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o" +"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o" +"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o" +"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o" +"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o" +"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o" +"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o" +"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o" +"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o" +"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o" +"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o" +"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o" +"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o" +"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o" +"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o" +"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o" +"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o" +"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o" diff --git a/otto_controller_source/Release/objects.mk b/otto_controller_source/Release/objects.mk new file mode 100644 index 0000000..742c2da --- /dev/null +++ b/otto_controller_source/Release/objects.mk @@ -0,0 +1,8 @@ +################################################################################ +# Automatically-generated file. Do not edit! +################################################################################ + +USER_OBJS := + +LIBS := + diff --git a/otto_controller_source/Release/otto_controller_source.list b/otto_controller_source/Release/otto_controller_source.list new file mode 100644 index 0000000..fd63902 --- /dev/null +++ b/otto_controller_source/Release/otto_controller_source.list @@ -0,0 +1,14742 @@ + +otto_controller_source.elf: file format elf32-littlearm + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .isr_vector 000001f8 08000000 08000000 00010000 2**0 + CONTENTS, ALLOC, LOAD, READONLY, DATA + 1 .text 00009dc4 080001f8 080001f8 000101f8 2**3 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .rodata 00000ab0 08009fc0 08009fc0 00019fc0 2**3 + CONTENTS, ALLOC, LOAD, READONLY, DATA + 3 .ARM.extab 00000000 0800aa70 0800aa70 00020080 2**0 + CONTENTS + 4 .ARM 00000008 0800aa70 0800aa70 0001aa70 2**2 + CONTENTS, ALLOC, LOAD, READONLY, DATA + 5 .preinit_array 00000000 0800aa78 0800aa78 00020080 2**0 + CONTENTS, ALLOC, LOAD, DATA + 6 .init_array 00000008 0800aa78 0800aa78 0001aa78 2**2 + CONTENTS, ALLOC, LOAD, DATA + 7 .fini_array 00000004 0800aa80 0800aa80 0001aa80 2**2 + CONTENTS, ALLOC, LOAD, DATA + 8 .data 00000080 20000000 0800aa84 00020000 2**2 + CONTENTS, ALLOC, LOAD, DATA + 9 .bss 00000e40 20000080 0800ab04 00020080 2**2 + ALLOC + 10 ._user_heap_stack 00000600 20000ec0 0800ab04 00020ec0 2**0 + ALLOC + 11 .ARM.attributes 0000002e 00000000 00000000 00020080 2**0 + CONTENTS, READONLY + 12 .comment 0000007b 00000000 00000000 000200ae 2**0 + CONTENTS, READONLY + 13 .debug_frame 0000065c 00000000 00000000 0002012c 2**2 + CONTENTS, READONLY, DEBUGGING + +Disassembly of section .text: + +080001f8 <__do_global_dtors_aux>: + 80001f8: b510 push {r4, lr} + 80001fa: 4c05 ldr r4, [pc, #20] ; (8000210 <__do_global_dtors_aux+0x18>) + 80001fc: 7823 ldrb r3, [r4, #0] + 80001fe: b933 cbnz r3, 800020e <__do_global_dtors_aux+0x16> + 8000200: 4b04 ldr r3, [pc, #16] ; (8000214 <__do_global_dtors_aux+0x1c>) + 8000202: b113 cbz r3, 800020a <__do_global_dtors_aux+0x12> + 8000204: 4804 ldr r0, [pc, #16] ; (8000218 <__do_global_dtors_aux+0x20>) + 8000206: f3af 8000 nop.w + 800020a: 2301 movs r3, #1 + 800020c: 7023 strb r3, [r4, #0] + 800020e: bd10 pop {r4, pc} + 8000210: 20000080 .word 0x20000080 + 8000214: 00000000 .word 0x00000000 + 8000218: 08009fa4 .word 0x08009fa4 + +0800021c : + 800021c: b508 push {r3, lr} + 800021e: 4b03 ldr r3, [pc, #12] ; (800022c ) + 8000220: b11b cbz r3, 800022a + 8000222: 4903 ldr r1, [pc, #12] ; (8000230 ) + 8000224: 4803 ldr r0, [pc, #12] ; (8000234 ) + 8000226: f3af 8000 nop.w + 800022a: bd08 pop {r3, pc} + 800022c: 00000000 .word 0x00000000 + 8000230: 20000084 .word 0x20000084 + 8000234: 08009fa4 .word 0x08009fa4 + +08000238 : + 8000238: 4603 mov r3, r0 + 800023a: f813 2b01 ldrb.w r2, [r3], #1 + 800023e: 2a00 cmp r2, #0 + 8000240: d1fb bne.n 800023a + 8000242: 1a18 subs r0, r3, r0 + 8000244: 3801 subs r0, #1 + 8000246: 4770 bx lr + +08000248 <__aeabi_uldivmod>: + 8000248: b953 cbnz r3, 8000260 <__aeabi_uldivmod+0x18> + 800024a: b94a cbnz r2, 8000260 <__aeabi_uldivmod+0x18> + 800024c: 2900 cmp r1, #0 + 800024e: bf08 it eq + 8000250: 2800 cmpeq r0, #0 + 8000252: bf1c itt ne + 8000254: f04f 31ff movne.w r1, #4294967295 ; 0xffffffff + 8000258: f04f 30ff movne.w r0, #4294967295 ; 0xffffffff + 800025c: f000 b972 b.w 8000544 <__aeabi_idiv0> + 8000260: f1ad 0c08 sub.w ip, sp, #8 + 8000264: e96d ce04 strd ip, lr, [sp, #-16]! + 8000268: f000 f806 bl 8000278 <__udivmoddi4> + 800026c: f8dd e004 ldr.w lr, [sp, #4] + 8000270: e9dd 2302 ldrd r2, r3, [sp, #8] + 8000274: b004 add sp, #16 + 8000276: 4770 bx lr + +08000278 <__udivmoddi4>: + 8000278: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} + 800027c: 9e08 ldr r6, [sp, #32] + 800027e: 4604 mov r4, r0 + 8000280: 4688 mov r8, r1 + 8000282: 2b00 cmp r3, #0 + 8000284: d14b bne.n 800031e <__udivmoddi4+0xa6> + 8000286: 428a cmp r2, r1 + 8000288: 4615 mov r5, r2 + 800028a: d967 bls.n 800035c <__udivmoddi4+0xe4> + 800028c: fab2 f282 clz r2, r2 + 8000290: b14a cbz r2, 80002a6 <__udivmoddi4+0x2e> + 8000292: f1c2 0720 rsb r7, r2, #32 + 8000296: fa01 f302 lsl.w r3, r1, r2 + 800029a: fa20 f707 lsr.w r7, r0, r7 + 800029e: 4095 lsls r5, r2 + 80002a0: ea47 0803 orr.w r8, r7, r3 + 80002a4: 4094 lsls r4, r2 + 80002a6: ea4f 4e15 mov.w lr, r5, lsr #16 + 80002aa: 0c23 lsrs r3, r4, #16 + 80002ac: fbb8 f7fe udiv r7, r8, lr + 80002b0: fa1f fc85 uxth.w ip, r5 + 80002b4: fb0e 8817 mls r8, lr, r7, r8 + 80002b8: ea43 4308 orr.w r3, r3, r8, lsl #16 + 80002bc: fb07 f10c mul.w r1, r7, ip + 80002c0: 4299 cmp r1, r3 + 80002c2: d909 bls.n 80002d8 <__udivmoddi4+0x60> + 80002c4: 18eb adds r3, r5, r3 + 80002c6: f107 30ff add.w r0, r7, #4294967295 ; 0xffffffff + 80002ca: f080 811b bcs.w 8000504 <__udivmoddi4+0x28c> + 80002ce: 4299 cmp r1, r3 + 80002d0: f240 8118 bls.w 8000504 <__udivmoddi4+0x28c> + 80002d4: 3f02 subs r7, #2 + 80002d6: 442b add r3, r5 + 80002d8: 1a5b subs r3, r3, r1 + 80002da: b2a4 uxth r4, r4 + 80002dc: fbb3 f0fe udiv r0, r3, lr + 80002e0: fb0e 3310 mls r3, lr, r0, r3 + 80002e4: ea44 4403 orr.w r4, r4, r3, lsl #16 + 80002e8: fb00 fc0c mul.w ip, r0, ip + 80002ec: 45a4 cmp ip, r4 + 80002ee: d909 bls.n 8000304 <__udivmoddi4+0x8c> + 80002f0: 192c adds r4, r5, r4 + 80002f2: f100 33ff add.w r3, r0, #4294967295 ; 0xffffffff + 80002f6: f080 8107 bcs.w 8000508 <__udivmoddi4+0x290> + 80002fa: 45a4 cmp ip, r4 + 80002fc: f240 8104 bls.w 8000508 <__udivmoddi4+0x290> + 8000300: 3802 subs r0, #2 + 8000302: 442c add r4, r5 + 8000304: ea40 4007 orr.w r0, r0, r7, lsl #16 + 8000308: eba4 040c sub.w r4, r4, ip + 800030c: 2700 movs r7, #0 + 800030e: b11e cbz r6, 8000318 <__udivmoddi4+0xa0> + 8000310: 40d4 lsrs r4, r2 + 8000312: 2300 movs r3, #0 + 8000314: e9c6 4300 strd r4, r3, [r6] + 8000318: 4639 mov r1, r7 + 800031a: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} + 800031e: 428b cmp r3, r1 + 8000320: d909 bls.n 8000336 <__udivmoddi4+0xbe> + 8000322: 2e00 cmp r6, #0 + 8000324: f000 80eb beq.w 80004fe <__udivmoddi4+0x286> + 8000328: 2700 movs r7, #0 + 800032a: e9c6 0100 strd r0, r1, [r6] + 800032e: 4638 mov r0, r7 + 8000330: 4639 mov r1, r7 + 8000332: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} + 8000336: fab3 f783 clz r7, r3 + 800033a: 2f00 cmp r7, #0 + 800033c: d147 bne.n 80003ce <__udivmoddi4+0x156> + 800033e: 428b cmp r3, r1 + 8000340: d302 bcc.n 8000348 <__udivmoddi4+0xd0> + 8000342: 4282 cmp r2, r0 + 8000344: f200 80fa bhi.w 800053c <__udivmoddi4+0x2c4> + 8000348: 1a84 subs r4, r0, r2 + 800034a: eb61 0303 sbc.w r3, r1, r3 + 800034e: 2001 movs r0, #1 + 8000350: 4698 mov r8, r3 + 8000352: 2e00 cmp r6, #0 + 8000354: d0e0 beq.n 8000318 <__udivmoddi4+0xa0> + 8000356: e9c6 4800 strd r4, r8, [r6] + 800035a: e7dd b.n 8000318 <__udivmoddi4+0xa0> + 800035c: b902 cbnz r2, 8000360 <__udivmoddi4+0xe8> + 800035e: deff udf #255 ; 0xff + 8000360: fab2 f282 clz r2, r2 + 8000364: 2a00 cmp r2, #0 + 8000366: f040 808f bne.w 8000488 <__udivmoddi4+0x210> + 800036a: 1b49 subs r1, r1, r5 + 800036c: ea4f 4e15 mov.w lr, r5, lsr #16 + 8000370: fa1f f885 uxth.w r8, r5 + 8000374: 2701 movs r7, #1 + 8000376: fbb1 fcfe udiv ip, r1, lr + 800037a: 0c23 lsrs r3, r4, #16 + 800037c: fb0e 111c mls r1, lr, ip, r1 + 8000380: ea43 4301 orr.w r3, r3, r1, lsl #16 + 8000384: fb08 f10c mul.w r1, r8, ip + 8000388: 4299 cmp r1, r3 + 800038a: d907 bls.n 800039c <__udivmoddi4+0x124> + 800038c: 18eb adds r3, r5, r3 + 800038e: f10c 30ff add.w r0, ip, #4294967295 ; 0xffffffff + 8000392: d202 bcs.n 800039a <__udivmoddi4+0x122> + 8000394: 4299 cmp r1, r3 + 8000396: f200 80cd bhi.w 8000534 <__udivmoddi4+0x2bc> + 800039a: 4684 mov ip, r0 + 800039c: 1a59 subs r1, r3, r1 + 800039e: b2a3 uxth r3, r4 + 80003a0: fbb1 f0fe udiv r0, r1, lr + 80003a4: fb0e 1410 mls r4, lr, r0, r1 + 80003a8: ea43 4404 orr.w r4, r3, r4, lsl #16 + 80003ac: fb08 f800 mul.w r8, r8, r0 + 80003b0: 45a0 cmp r8, r4 + 80003b2: d907 bls.n 80003c4 <__udivmoddi4+0x14c> + 80003b4: 192c adds r4, r5, r4 + 80003b6: f100 33ff add.w r3, r0, #4294967295 ; 0xffffffff + 80003ba: d202 bcs.n 80003c2 <__udivmoddi4+0x14a> + 80003bc: 45a0 cmp r8, r4 + 80003be: f200 80b6 bhi.w 800052e <__udivmoddi4+0x2b6> + 80003c2: 4618 mov r0, r3 + 80003c4: eba4 0408 sub.w r4, r4, r8 + 80003c8: ea40 400c orr.w r0, r0, ip, lsl #16 + 80003cc: e79f b.n 800030e <__udivmoddi4+0x96> + 80003ce: f1c7 0c20 rsb ip, r7, #32 + 80003d2: 40bb lsls r3, r7 + 80003d4: fa22 fe0c lsr.w lr, r2, ip + 80003d8: ea4e 0e03 orr.w lr, lr, r3 + 80003dc: fa01 f407 lsl.w r4, r1, r7 + 80003e0: fa20 f50c lsr.w r5, r0, ip + 80003e4: fa21 f30c lsr.w r3, r1, ip + 80003e8: ea4f 481e mov.w r8, lr, lsr #16 + 80003ec: 4325 orrs r5, r4 + 80003ee: fbb3 f9f8 udiv r9, r3, r8 + 80003f2: 0c2c lsrs r4, r5, #16 + 80003f4: fb08 3319 mls r3, r8, r9, r3 + 80003f8: fa1f fa8e uxth.w sl, lr + 80003fc: ea44 4303 orr.w r3, r4, r3, lsl #16 + 8000400: fb09 f40a mul.w r4, r9, sl + 8000404: 429c cmp r4, r3 + 8000406: fa02 f207 lsl.w r2, r2, r7 + 800040a: fa00 f107 lsl.w r1, r0, r7 + 800040e: d90b bls.n 8000428 <__udivmoddi4+0x1b0> + 8000410: eb1e 0303 adds.w r3, lr, r3 + 8000414: f109 30ff add.w r0, r9, #4294967295 ; 0xffffffff + 8000418: f080 8087 bcs.w 800052a <__udivmoddi4+0x2b2> + 800041c: 429c cmp r4, r3 + 800041e: f240 8084 bls.w 800052a <__udivmoddi4+0x2b2> + 8000422: f1a9 0902 sub.w r9, r9, #2 + 8000426: 4473 add r3, lr + 8000428: 1b1b subs r3, r3, r4 + 800042a: b2ad uxth r5, r5 + 800042c: fbb3 f0f8 udiv r0, r3, r8 + 8000430: fb08 3310 mls r3, r8, r0, r3 + 8000434: ea45 4403 orr.w r4, r5, r3, lsl #16 + 8000438: fb00 fa0a mul.w sl, r0, sl + 800043c: 45a2 cmp sl, r4 + 800043e: d908 bls.n 8000452 <__udivmoddi4+0x1da> + 8000440: eb1e 0404 adds.w r4, lr, r4 + 8000444: f100 33ff add.w r3, r0, #4294967295 ; 0xffffffff + 8000448: d26b bcs.n 8000522 <__udivmoddi4+0x2aa> + 800044a: 45a2 cmp sl, r4 + 800044c: d969 bls.n 8000522 <__udivmoddi4+0x2aa> + 800044e: 3802 subs r0, #2 + 8000450: 4474 add r4, lr + 8000452: ea40 4009 orr.w r0, r0, r9, lsl #16 + 8000456: fba0 8902 umull r8, r9, r0, r2 + 800045a: eba4 040a sub.w r4, r4, sl + 800045e: 454c cmp r4, r9 + 8000460: 46c2 mov sl, r8 + 8000462: 464b mov r3, r9 + 8000464: d354 bcc.n 8000510 <__udivmoddi4+0x298> + 8000466: d051 beq.n 800050c <__udivmoddi4+0x294> + 8000468: 2e00 cmp r6, #0 + 800046a: d069 beq.n 8000540 <__udivmoddi4+0x2c8> + 800046c: ebb1 050a subs.w r5, r1, sl + 8000470: eb64 0403 sbc.w r4, r4, r3 + 8000474: fa04 fc0c lsl.w ip, r4, ip + 8000478: 40fd lsrs r5, r7 + 800047a: 40fc lsrs r4, r7 + 800047c: ea4c 0505 orr.w r5, ip, r5 + 8000480: e9c6 5400 strd r5, r4, [r6] + 8000484: 2700 movs r7, #0 + 8000486: e747 b.n 8000318 <__udivmoddi4+0xa0> + 8000488: f1c2 0320 rsb r3, r2, #32 + 800048c: fa20 f703 lsr.w r7, r0, r3 + 8000490: 4095 lsls r5, r2 + 8000492: fa01 f002 lsl.w r0, r1, r2 + 8000496: fa21 f303 lsr.w r3, r1, r3 + 800049a: ea4f 4e15 mov.w lr, r5, lsr #16 + 800049e: 4338 orrs r0, r7 + 80004a0: 0c01 lsrs r1, r0, #16 + 80004a2: fbb3 f7fe udiv r7, r3, lr + 80004a6: fa1f f885 uxth.w r8, r5 + 80004aa: fb0e 3317 mls r3, lr, r7, r3 + 80004ae: ea41 4103 orr.w r1, r1, r3, lsl #16 + 80004b2: fb07 f308 mul.w r3, r7, r8 + 80004b6: 428b cmp r3, r1 + 80004b8: fa04 f402 lsl.w r4, r4, r2 + 80004bc: d907 bls.n 80004ce <__udivmoddi4+0x256> + 80004be: 1869 adds r1, r5, r1 + 80004c0: f107 3cff add.w ip, r7, #4294967295 ; 0xffffffff + 80004c4: d22f bcs.n 8000526 <__udivmoddi4+0x2ae> + 80004c6: 428b cmp r3, r1 + 80004c8: d92d bls.n 8000526 <__udivmoddi4+0x2ae> + 80004ca: 3f02 subs r7, #2 + 80004cc: 4429 add r1, r5 + 80004ce: 1acb subs r3, r1, r3 + 80004d0: b281 uxth r1, r0 + 80004d2: fbb3 f0fe udiv r0, r3, lr + 80004d6: fb0e 3310 mls r3, lr, r0, r3 + 80004da: ea41 4103 orr.w r1, r1, r3, lsl #16 + 80004de: fb00 f308 mul.w r3, r0, r8 + 80004e2: 428b cmp r3, r1 + 80004e4: d907 bls.n 80004f6 <__udivmoddi4+0x27e> + 80004e6: 1869 adds r1, r5, r1 + 80004e8: f100 3cff add.w ip, r0, #4294967295 ; 0xffffffff + 80004ec: d217 bcs.n 800051e <__udivmoddi4+0x2a6> + 80004ee: 428b cmp r3, r1 + 80004f0: d915 bls.n 800051e <__udivmoddi4+0x2a6> + 80004f2: 3802 subs r0, #2 + 80004f4: 4429 add r1, r5 + 80004f6: 1ac9 subs r1, r1, r3 + 80004f8: ea40 4707 orr.w r7, r0, r7, lsl #16 + 80004fc: e73b b.n 8000376 <__udivmoddi4+0xfe> + 80004fe: 4637 mov r7, r6 + 8000500: 4630 mov r0, r6 + 8000502: e709 b.n 8000318 <__udivmoddi4+0xa0> + 8000504: 4607 mov r7, r0 + 8000506: e6e7 b.n 80002d8 <__udivmoddi4+0x60> + 8000508: 4618 mov r0, r3 + 800050a: e6fb b.n 8000304 <__udivmoddi4+0x8c> + 800050c: 4541 cmp r1, r8 + 800050e: d2ab bcs.n 8000468 <__udivmoddi4+0x1f0> + 8000510: ebb8 0a02 subs.w sl, r8, r2 + 8000514: eb69 020e sbc.w r2, r9, lr + 8000518: 3801 subs r0, #1 + 800051a: 4613 mov r3, r2 + 800051c: e7a4 b.n 8000468 <__udivmoddi4+0x1f0> + 800051e: 4660 mov r0, ip + 8000520: e7e9 b.n 80004f6 <__udivmoddi4+0x27e> + 8000522: 4618 mov r0, r3 + 8000524: e795 b.n 8000452 <__udivmoddi4+0x1da> + 8000526: 4667 mov r7, ip + 8000528: e7d1 b.n 80004ce <__udivmoddi4+0x256> + 800052a: 4681 mov r9, r0 + 800052c: e77c b.n 8000428 <__udivmoddi4+0x1b0> + 800052e: 3802 subs r0, #2 + 8000530: 442c add r4, r5 + 8000532: e747 b.n 80003c4 <__udivmoddi4+0x14c> + 8000534: f1ac 0c02 sub.w ip, ip, #2 + 8000538: 442b add r3, r5 + 800053a: e72f b.n 800039c <__udivmoddi4+0x124> + 800053c: 4638 mov r0, r7 + 800053e: e708 b.n 8000352 <__udivmoddi4+0xda> + 8000540: 4637 mov r7, r6 + 8000542: e6e9 b.n 8000318 <__udivmoddi4+0xa0> + +08000544 <__aeabi_idiv0>: + 8000544: 4770 bx lr + 8000546: bf00 nop + +08000548 <_ZN7EncoderC1EP17TIM_HandleTypeDef>: + 8000548: b430 push {r4, r5} + 800054a: 4d04 ldr r5, [pc, #16] ; (800055c <_ZN7EncoderC1EP17TIM_HandleTypeDef+0x14>) + 800054c: 4c04 ldr r4, [pc, #16] ; (8000560 <_ZN7EncoderC1EP17TIM_HandleTypeDef+0x18>) + 800054e: 4a05 ldr r2, [pc, #20] ; (8000564 <_ZN7EncoderC1EP17TIM_HandleTypeDef+0x1c>) + 8000550: 6105 str r5, [r0, #16] + 8000552: 6144 str r4, [r0, #20] + 8000554: 6001 str r1, [r0, #0] + 8000556: 6182 str r2, [r0, #24] + 8000558: bc30 pop {r4, r5} + 800055a: 4770 bx lr + 800055c: 00012110 .word 0x00012110 + 8000560: 40490fd0 .word 0x40490fd0 + 8000564: 3f40ff97 .word 0x3f40ff97 + +08000568 <_ZN7Encoder5SetupEv>: + 8000568: b510 push {r4, lr} + 800056a: 4604 mov r4, r0 + 800056c: 213c movs r1, #60 ; 0x3c + 800056e: 6800 ldr r0, [r0, #0] + 8000570: f007 f8ce bl 8007710 + 8000574: 6822 ldr r2, [r4, #0] + 8000576: 2100 movs r1, #0 + 8000578: 68d3 ldr r3, [r2, #12] + 800057a: 6812 ldr r2, [r2, #0] + 800057c: 085b lsrs r3, r3, #1 + 800057e: 6253 str r3, [r2, #36] ; 0x24 + 8000580: 6061 str r1, [r4, #4] + 8000582: f005 fde7 bl 8006154 + 8000586: 60a0 str r0, [r4, #8] + 8000588: bd10 pop {r4, pc} + 800058a: bf00 nop + +0800058c <_ZN7Encoder17GetLinearVelocityEv>: + 800058c: b538 push {r3, r4, r5, lr} + 800058e: 6883 ldr r3, [r0, #8] + 8000590: 4604 mov r4, r0 + 8000592: 6043 str r3, [r0, #4] + 8000594: f005 fdde bl 8006154 + 8000598: edd4 5a06 vldr s11, [r4, #24] + 800059c: ed94 7a04 vldr s14, [r4, #16] + 80005a0: ed9f 5a0f vldr s10, [pc, #60] ; 80005e0 <_ZN7Encoder17GetLinearVelocityEv+0x54> + 80005a4: eeb8 7a47 vcvt.f32.u32 s14, s14 + 80005a8: e9d4 2300 ldrd r2, r3, [r4] + 80005ac: 6815 ldr r5, [r2, #0] + 80005ae: 1ac3 subs r3, r0, r3 + 80005b0: 68d2 ldr r2, [r2, #12] + 80005b2: 6a69 ldr r1, [r5, #36] ; 0x24 + 80005b4: ee07 3a90 vmov s15, r3 + 80005b8: 0852 lsrs r2, r2, #1 + 80005ba: 60a0 str r0, [r4, #8] + 80005bc: eef8 7a67 vcvt.f32.u32 s15, s15 + 80005c0: 1a89 subs r1, r1, r2 + 80005c2: ee06 1a90 vmov s13, r1 + 80005c6: ee87 6a85 vdiv.f32 s12, s15, s10 + 80005ca: 60e1 str r1, [r4, #12] + 80005cc: 626a str r2, [r5, #36] ; 0x24 + 80005ce: eef8 6ae6 vcvt.f32.s32 s13, s13 + 80005d2: ee66 7aa5 vmul.f32 s15, s13, s11 + 80005d6: ee87 0a87 vdiv.f32 s0, s15, s14 + 80005da: ee80 0a06 vdiv.f32 s0, s0, s12 + 80005de: bd38 pop {r3, r4, r5, pc} + 80005e0: 447a0000 .word 0x447a0000 + +080005e4 <_ZN8std_msgs6String11deserializeEPh>: + 80005e4: b5f8 push {r3, r4, r5, r6, r7, lr} + 80005e6: 788c ldrb r4, [r1, #2] + 80005e8: 460d mov r5, r1 + 80005ea: 784a ldrb r2, [r1, #1] + 80005ec: 1ccb adds r3, r1, #3 + 80005ee: 0424 lsls r4, r4, #16 + 80005f0: 78c9 ldrb r1, [r1, #3] + 80005f2: 4606 mov r6, r0 + 80005f4: ea44 2402 orr.w r4, r4, r2, lsl #8 + 80005f8: 782a ldrb r2, [r5, #0] + 80005fa: ea44 6401 orr.w r4, r4, r1, lsl #24 + 80005fe: 4314 orrs r4, r2 + 8000600: 1d27 adds r7, r4, #4 + 8000602: 2f04 cmp r7, #4 + 8000604: d905 bls.n 8000612 <_ZN8std_msgs6String11deserializeEPh+0x2e> + 8000606: 4618 mov r0, r3 + 8000608: 4622 mov r2, r4 + 800060a: 1d29 adds r1, r5, #4 + 800060c: f009 fbb9 bl 8009d82 + 8000610: 4603 mov r3, r0 + 8000612: 442c add r4, r5 + 8000614: 2200 movs r2, #0 + 8000616: 4638 mov r0, r7 + 8000618: 70e2 strb r2, [r4, #3] + 800061a: 6073 str r3, [r6, #4] + 800061c: bdf8 pop {r3, r4, r5, r6, r7, pc} + 800061e: bf00 nop + +08000620 <_ZN8std_msgs6String7getTypeEv>: + 8000620: 4800 ldr r0, [pc, #0] ; (8000624 <_ZN8std_msgs6String7getTypeEv+0x4>) + 8000622: 4770 bx lr + 8000624: 0800a480 .word 0x0800a480 + +08000628 <_ZN8std_msgs6String6getMD5Ev>: + 8000628: 4800 ldr r0, [pc, #0] ; (800062c <_ZN8std_msgs6String6getMD5Ev+0x4>) + 800062a: 4770 bx lr + 800062c: 0800a45c .word 0x0800a45c + +08000630 <_ZNK8std_msgs4Time9serializeEPh>: + 8000630: 4603 mov r3, r0 + 8000632: 2008 movs r0, #8 + 8000634: 685a ldr r2, [r3, #4] + 8000636: 700a strb r2, [r1, #0] + 8000638: 685a ldr r2, [r3, #4] + 800063a: 40c2 lsrs r2, r0 + 800063c: 704a strb r2, [r1, #1] + 800063e: 88da ldrh r2, [r3, #6] + 8000640: 708a strb r2, [r1, #2] + 8000642: 79da ldrb r2, [r3, #7] + 8000644: 70ca strb r2, [r1, #3] + 8000646: 689a ldr r2, [r3, #8] + 8000648: 710a strb r2, [r1, #4] + 800064a: 689a ldr r2, [r3, #8] + 800064c: 40c2 lsrs r2, r0 + 800064e: 714a strb r2, [r1, #5] + 8000650: 895a ldrh r2, [r3, #10] + 8000652: 718a strb r2, [r1, #6] + 8000654: 7adb ldrb r3, [r3, #11] + 8000656: 71cb strb r3, [r1, #7] + 8000658: 4770 bx lr + 800065a: bf00 nop + +0800065c <_ZN8std_msgs4Time11deserializeEPh>: + 800065c: b410 push {r4} + 800065e: 4602 mov r2, r0 + 8000660: 780b ldrb r3, [r1, #0] + 8000662: 2008 movs r0, #8 + 8000664: 6053 str r3, [r2, #4] + 8000666: 784c ldrb r4, [r1, #1] + 8000668: ea43 2304 orr.w r3, r3, r4, lsl #8 + 800066c: 6053 str r3, [r2, #4] + 800066e: 788c ldrb r4, [r1, #2] + 8000670: ea43 4304 orr.w r3, r3, r4, lsl #16 + 8000674: 6053 str r3, [r2, #4] + 8000676: 78cc ldrb r4, [r1, #3] + 8000678: ea43 6304 orr.w r3, r3, r4, lsl #24 + 800067c: 6053 str r3, [r2, #4] + 800067e: 790b ldrb r3, [r1, #4] + 8000680: 6093 str r3, [r2, #8] + 8000682: 794c ldrb r4, [r1, #5] + 8000684: ea43 2304 orr.w r3, r3, r4, lsl #8 + 8000688: 6093 str r3, [r2, #8] + 800068a: 798c ldrb r4, [r1, #6] + 800068c: ea43 4304 orr.w r3, r3, r4, lsl #16 + 8000690: f85d 4b04 ldr.w r4, [sp], #4 + 8000694: 6093 str r3, [r2, #8] + 8000696: 79c9 ldrb r1, [r1, #7] + 8000698: ea43 6301 orr.w r3, r3, r1, lsl #24 + 800069c: 6093 str r3, [r2, #8] + 800069e: 4770 bx lr + +080006a0 <_ZN8std_msgs4Time7getTypeEv>: + 80006a0: 4800 ldr r0, [pc, #0] ; (80006a4 <_ZN8std_msgs4Time7getTypeEv+0x4>) + 80006a2: 4770 bx lr + 80006a4: 0800a418 .word 0x0800a418 + +080006a8 <_ZN8std_msgs4Time6getMD5Ev>: + 80006a8: 4800 ldr r0, [pc, #0] ; (80006ac <_ZN8std_msgs4Time6getMD5Ev+0x4>) + 80006aa: 4770 bx lr + 80006ac: 0800a3f4 .word 0x0800a3f4 + +080006b0 <_ZN14rosserial_msgs9TopicInfo11deserializeEPh>: + 80006b0: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} + 80006b4: 780a ldrb r2, [r1, #0] + 80006b6: 460e mov r6, r1 + 80006b8: 1d4b adds r3, r1, #5 + 80006ba: 4607 mov r7, r0 + 80006bc: 8082 strh r2, [r0, #4] + 80006be: 7849 ldrb r1, [r1, #1] + 80006c0: ea42 2201 orr.w r2, r2, r1, lsl #8 + 80006c4: 8082 strh r2, [r0, #4] + 80006c6: 7935 ldrb r5, [r6, #4] + 80006c8: 78f1 ldrb r1, [r6, #3] + 80006ca: 042d lsls r5, r5, #16 + 80006cc: 7972 ldrb r2, [r6, #5] + 80006ce: 78b0 ldrb r0, [r6, #2] + 80006d0: ea45 2501 orr.w r5, r5, r1, lsl #8 + 80006d4: ea45 6502 orr.w r5, r5, r2, lsl #24 + 80006d8: 4305 orrs r5, r0 + 80006da: f105 0906 add.w r9, r5, #6 + 80006de: f1b9 0f06 cmp.w r9, #6 + 80006e2: d905 bls.n 80006f0 <_ZN14rosserial_msgs9TopicInfo11deserializeEPh+0x40> + 80006e4: 4618 mov r0, r3 + 80006e6: 462a mov r2, r5 + 80006e8: 1db1 adds r1, r6, #6 + 80006ea: f009 fb4a bl 8009d82 + 80006ee: 4603 mov r3, r0 + 80006f0: 1972 adds r2, r6, r5 + 80006f2: 2100 movs r1, #0 + 80006f4: f109 0804 add.w r8, r9, #4 + 80006f8: 7151 strb r1, [r2, #5] + 80006fa: 60bb str r3, [r7, #8] + 80006fc: 79d4 ldrb r4, [r2, #7] + 80006fe: 7a11 ldrb r1, [r2, #8] + 8000700: 0224 lsls r4, r4, #8 + 8000702: 7a53 ldrb r3, [r2, #9] + 8000704: f816 0009 ldrb.w r0, [r6, r9] + 8000708: ea44 4401 orr.w r4, r4, r1, lsl #16 + 800070c: ea44 6403 orr.w r4, r4, r3, lsl #24 + 8000710: 4304 orrs r4, r0 + 8000712: 4444 add r4, r8 + 8000714: 4544 cmp r4, r8 + 8000716: d90f bls.n 8000738 <_ZN14rosserial_msgs9TopicInfo11deserializeEPh+0x88> + 8000718: 1b63 subs r3, r4, r5 + 800071a: f105 020b add.w r2, r5, #11 + 800071e: f105 010a add.w r1, r5, #10 + 8000722: f105 0009 add.w r0, r5, #9 + 8000726: 3b0a subs r3, #10 + 8000728: 4431 add r1, r6 + 800072a: 4430 add r0, r6 + 800072c: 4294 cmp r4, r2 + 800072e: bf2c ite cs + 8000730: 461a movcs r2, r3 + 8000732: 2201 movcc r2, #1 + 8000734: f009 fb25 bl 8009d82 + 8000738: f108 33ff add.w r3, r8, #4294967295 ; 0xffffffff + 800073c: 1932 adds r2, r6, r4 + 800073e: 2100 movs r1, #0 + 8000740: f104 0804 add.w r8, r4, #4 + 8000744: 4433 add r3, r6 + 8000746: f802 1c01 strb.w r1, [r2, #-1] + 800074a: 60fb str r3, [r7, #12] + 800074c: 7855 ldrb r5, [r2, #1] + 800074e: 7893 ldrb r3, [r2, #2] + 8000750: 022d lsls r5, r5, #8 + 8000752: 78d2 ldrb r2, [r2, #3] + 8000754: ea45 4503 orr.w r5, r5, r3, lsl #16 + 8000758: 5d33 ldrb r3, [r6, r4] + 800075a: ea45 6502 orr.w r5, r5, r2, lsl #24 + 800075e: 431d orrs r5, r3 + 8000760: 4445 add r5, r8 + 8000762: 45a8 cmp r8, r5 + 8000764: d20c bcs.n 8000780 <_ZN14rosserial_msgs9TopicInfo11deserializeEPh+0xd0> + 8000766: 1b2b subs r3, r5, r4 + 8000768: 1d62 adds r2, r4, #5 + 800076a: 1ce0 adds r0, r4, #3 + 800076c: eb06 0108 add.w r1, r6, r8 + 8000770: 3b04 subs r3, #4 + 8000772: 4430 add r0, r6 + 8000774: 4295 cmp r5, r2 + 8000776: bf2c ite cs + 8000778: 461a movcs r2, r3 + 800077a: 2201 movcc r2, #1 + 800077c: f009 fb01 bl 8009d82 + 8000780: f108 38ff add.w r8, r8, #4294967295 ; 0xffffffff + 8000784: 1972 adds r2, r6, r5 + 8000786: 2100 movs r1, #0 + 8000788: 1d28 adds r0, r5, #4 + 800078a: eb06 0308 add.w r3, r6, r8 + 800078e: f802 1c01 strb.w r1, [r2, #-1] + 8000792: 613b str r3, [r7, #16] + 8000794: 7893 ldrb r3, [r2, #2] + 8000796: 7854 ldrb r4, [r2, #1] + 8000798: 041b lsls r3, r3, #16 + 800079a: 5d71 ldrb r1, [r6, r5] + 800079c: 78d2 ldrb r2, [r2, #3] + 800079e: ea43 2304 orr.w r3, r3, r4, lsl #8 + 80007a2: 430b orrs r3, r1 + 80007a4: ea43 6302 orr.w r3, r3, r2, lsl #24 + 80007a8: 617b str r3, [r7, #20] + 80007aa: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} + 80007ae: bf00 nop + +080007b0 <_ZN14rosserial_msgs9TopicInfo7getTypeEv>: + 80007b0: 4800 ldr r0, [pc, #0] ; (80007b4 <_ZN14rosserial_msgs9TopicInfo7getTypeEv+0x4>) + 80007b2: 4770 bx lr + 80007b4: 0800a348 .word 0x0800a348 + +080007b8 <_ZN14rosserial_msgs9TopicInfo6getMD5Ev>: + 80007b8: 4800 ldr r0, [pc, #0] ; (80007bc <_ZN14rosserial_msgs9TopicInfo6getMD5Ev+0x4>) + 80007ba: 4770 bx lr + 80007bc: 0800a324 .word 0x0800a324 + +080007c0 <_ZN14rosserial_msgs3Log11deserializeEPh>: + 80007c0: b5f8 push {r3, r4, r5, r6, r7, lr} + 80007c2: 460b mov r3, r1 + 80007c4: 460d mov r5, r1 + 80007c6: 4606 mov r6, r0 + 80007c8: f813 2b04 ldrb.w r2, [r3], #4 + 80007cc: 7102 strb r2, [r0, #4] + 80007ce: 78cc ldrb r4, [r1, #3] + 80007d0: 788a ldrb r2, [r1, #2] + 80007d2: 0424 lsls r4, r4, #16 + 80007d4: 7909 ldrb r1, [r1, #4] + 80007d6: ea44 2402 orr.w r4, r4, r2, lsl #8 + 80007da: 786a ldrb r2, [r5, #1] + 80007dc: ea44 6401 orr.w r4, r4, r1, lsl #24 + 80007e0: 4314 orrs r4, r2 + 80007e2: 1d67 adds r7, r4, #5 + 80007e4: 2f05 cmp r7, #5 + 80007e6: d905 bls.n 80007f4 <_ZN14rosserial_msgs3Log11deserializeEPh+0x34> + 80007e8: 4618 mov r0, r3 + 80007ea: 4622 mov r2, r4 + 80007ec: 1d69 adds r1, r5, #5 + 80007ee: f009 fac8 bl 8009d82 + 80007f2: 4603 mov r3, r0 + 80007f4: 442c add r4, r5 + 80007f6: 2200 movs r2, #0 + 80007f8: 4638 mov r0, r7 + 80007fa: 7122 strb r2, [r4, #4] + 80007fc: 60b3 str r3, [r6, #8] + 80007fe: bdf8 pop {r3, r4, r5, r6, r7, pc} + +08000800 <_ZN14rosserial_msgs3Log7getTypeEv>: + 8000800: 4800 ldr r0, [pc, #0] ; (8000804 <_ZN14rosserial_msgs3Log7getTypeEv+0x4>) + 8000802: 4770 bx lr + 8000804: 0800a310 .word 0x0800a310 + +08000808 <_ZN14rosserial_msgs3Log6getMD5Ev>: + 8000808: 4800 ldr r0, [pc, #0] ; (800080c <_ZN14rosserial_msgs3Log6getMD5Ev+0x4>) + 800080a: 4770 bx lr + 800080c: 0800a2ec .word 0x0800a2ec + +08000810 <_ZN14rosserial_msgs20RequestParamResponse7getTypeEv>: + 8000810: 4800 ldr r0, [pc, #0] ; (8000814 <_ZN14rosserial_msgs20RequestParamResponse7getTypeEv+0x4>) + 8000812: 4770 bx lr + 8000814: 0800a364 .word 0x0800a364 + +08000818 <_ZN14rosserial_msgs20RequestParamResponse6getMD5Ev>: + 8000818: 4800 ldr r0, [pc, #0] ; (800081c <_ZN14rosserial_msgs20RequestParamResponse6getMD5Ev+0x4>) + 800081a: 4770 bx lr + 800081c: 0800a2c8 .word 0x0800a2c8 + +08000820 <_ZN8std_msgs6Header11deserializeEPh>: + 8000820: b5f8 push {r3, r4, r5, r6, r7, lr} + 8000822: 780a ldrb r2, [r1, #0] + 8000824: 460c mov r4, r1 + 8000826: f101 030f add.w r3, r1, #15 + 800082a: 4605 mov r5, r0 + 800082c: 6042 str r2, [r0, #4] + 800082e: 7849 ldrb r1, [r1, #1] + 8000830: ea42 2201 orr.w r2, r2, r1, lsl #8 + 8000834: 6042 str r2, [r0, #4] + 8000836: 78a1 ldrb r1, [r4, #2] + 8000838: ea42 4201 orr.w r2, r2, r1, lsl #16 + 800083c: 6042 str r2, [r0, #4] + 800083e: 78e1 ldrb r1, [r4, #3] + 8000840: ea42 6201 orr.w r2, r2, r1, lsl #24 + 8000844: 6042 str r2, [r0, #4] + 8000846: 7922 ldrb r2, [r4, #4] + 8000848: 6082 str r2, [r0, #8] + 800084a: 7961 ldrb r1, [r4, #5] + 800084c: ea42 2201 orr.w r2, r2, r1, lsl #8 + 8000850: 6082 str r2, [r0, #8] + 8000852: 79a1 ldrb r1, [r4, #6] + 8000854: ea42 4201 orr.w r2, r2, r1, lsl #16 + 8000858: 6082 str r2, [r0, #8] + 800085a: 79e1 ldrb r1, [r4, #7] + 800085c: ea42 6201 orr.w r2, r2, r1, lsl #24 + 8000860: 6082 str r2, [r0, #8] + 8000862: 7a22 ldrb r2, [r4, #8] + 8000864: 60c2 str r2, [r0, #12] + 8000866: 7a61 ldrb r1, [r4, #9] + 8000868: ea42 2201 orr.w r2, r2, r1, lsl #8 + 800086c: 60c2 str r2, [r0, #12] + 800086e: 7aa1 ldrb r1, [r4, #10] + 8000870: ea42 4201 orr.w r2, r2, r1, lsl #16 + 8000874: 60c2 str r2, [r0, #12] + 8000876: 7ae1 ldrb r1, [r4, #11] + 8000878: ea42 6201 orr.w r2, r2, r1, lsl #24 + 800087c: 60c2 str r2, [r0, #12] + 800087e: 7ba6 ldrb r6, [r4, #14] + 8000880: 7b62 ldrb r2, [r4, #13] + 8000882: 0436 lsls r6, r6, #16 + 8000884: 7be1 ldrb r1, [r4, #15] + 8000886: ea46 2602 orr.w r6, r6, r2, lsl #8 + 800088a: 7b22 ldrb r2, [r4, #12] + 800088c: ea46 6601 orr.w r6, r6, r1, lsl #24 + 8000890: 4316 orrs r6, r2 + 8000892: f106 0710 add.w r7, r6, #16 + 8000896: 2f10 cmp r7, #16 + 8000898: d906 bls.n 80008a8 <_ZN8std_msgs6Header11deserializeEPh+0x88> + 800089a: 4618 mov r0, r3 + 800089c: 4632 mov r2, r6 + 800089e: f104 0110 add.w r1, r4, #16 + 80008a2: f009 fa6e bl 8009d82 + 80008a6: 4603 mov r3, r0 + 80008a8: 4434 add r4, r6 + 80008aa: 2200 movs r2, #0 + 80008ac: 4638 mov r0, r7 + 80008ae: 73e2 strb r2, [r4, #15] + 80008b0: 612b str r3, [r5, #16] + 80008b2: bdf8 pop {r3, r4, r5, r6, r7, pc} + +080008b4 <_ZN8std_msgs6Header7getTypeEv>: + 80008b4: 4800 ldr r0, [pc, #0] ; (80008b8 <_ZN8std_msgs6Header7getTypeEv+0x4>) + 80008b6: 4770 bx lr + 80008b8: 0800a44c .word 0x0800a44c + +080008bc <_ZN8std_msgs6Header6getMD5Ev>: + 80008bc: 4800 ldr r0, [pc, #0] ; (80008c0 <_ZN8std_msgs6Header6getMD5Ev+0x4>) + 80008be: 4770 bx lr + 80008c0: 0800a428 .word 0x0800a428 + +080008c4 <_ZN13geometry_msgs5Point7getTypeEv>: + 80008c4: 4800 ldr r0, [pc, #0] ; (80008c8 <_ZN13geometry_msgs5Point7getTypeEv+0x4>) + 80008c6: 4770 bx lr + 80008c8: 0800a264 .word 0x0800a264 + +080008cc <_ZN13geometry_msgs5Point6getMD5Ev>: + 80008cc: 4800 ldr r0, [pc, #0] ; (80008d0 <_ZN13geometry_msgs5Point6getMD5Ev+0x4>) + 80008ce: 4770 bx lr + 80008d0: 0800a240 .word 0x0800a240 + +080008d4 <_ZN13geometry_msgs10Quaternion7getTypeEv>: + 80008d4: 4800 ldr r0, [pc, #0] ; (80008d8 <_ZN13geometry_msgs10Quaternion7getTypeEv+0x4>) + 80008d6: 4770 bx lr + 80008d8: 0800a15c .word 0x0800a15c + +080008dc <_ZN13geometry_msgs10Quaternion6getMD5Ev>: + 80008dc: 4800 ldr r0, [pc, #0] ; (80008e0 <_ZN13geometry_msgs10Quaternion6getMD5Ev+0x4>) + 80008de: 4770 bx lr + 80008e0: 0800a138 .word 0x0800a138 + +080008e4 <_ZN13geometry_msgs4Pose7getTypeEv>: + 80008e4: 4800 ldr r0, [pc, #0] ; (80008e8 <_ZN13geometry_msgs4Pose7getTypeEv+0x4>) + 80008e6: 4770 bx lr + 80008e8: 0800a22c .word 0x0800a22c + +080008ec <_ZN13geometry_msgs4Pose6getMD5Ev>: + 80008ec: 4800 ldr r0, [pc, #0] ; (80008f0 <_ZN13geometry_msgs4Pose6getMD5Ev+0x4>) + 80008ee: 4770 bx lr + 80008f0: 0800a208 .word 0x0800a208 + +080008f4 <_ZN13geometry_msgs18PoseWithCovariance7getTypeEv>: + 80008f4: 4800 ldr r0, [pc, #0] ; (80008f8 <_ZN13geometry_msgs18PoseWithCovariance7getTypeEv+0x4>) + 80008f6: 4770 bx lr + 80008f8: 0800a19c .word 0x0800a19c + +080008fc <_ZN13geometry_msgs18PoseWithCovariance6getMD5Ev>: + 80008fc: 4800 ldr r0, [pc, #0] ; (8000900 <_ZN13geometry_msgs18PoseWithCovariance6getMD5Ev+0x4>) + 80008fe: 4770 bx lr + 8000900: 0800a178 .word 0x0800a178 + +08000904 <_ZN13geometry_msgs7Vector37getTypeEv>: + 8000904: 4800 ldr r0, [pc, #0] ; (8000908 <_ZN13geometry_msgs7Vector37getTypeEv+0x4>) + 8000906: 4770 bx lr + 8000908: 0800a2b0 .word 0x0800a2b0 + +0800090c <_ZN13geometry_msgs7Vector36getMD5Ev>: + 800090c: 4800 ldr r0, [pc, #0] ; (8000910 <_ZN13geometry_msgs7Vector36getMD5Ev+0x4>) + 800090e: 4770 bx lr + 8000910: 0800a240 .word 0x0800a240 + +08000914 <_ZN13geometry_msgs5Twist7getTypeEv>: + 8000914: 4800 ldr r0, [pc, #0] ; (8000918 <_ZN13geometry_msgs5Twist7getTypeEv+0x4>) + 8000916: 4770 bx lr + 8000918: 0800a29c .word 0x0800a29c + +0800091c <_ZN13geometry_msgs5Twist6getMD5Ev>: + 800091c: 4800 ldr r0, [pc, #0] ; (8000920 <_ZN13geometry_msgs5Twist6getMD5Ev+0x4>) + 800091e: 4770 bx lr + 8000920: 0800a278 .word 0x0800a278 + +08000924 <_ZN13geometry_msgs19TwistWithCovariance7getTypeEv>: + 8000924: 4800 ldr r0, [pc, #0] ; (8000928 <_ZN13geometry_msgs19TwistWithCovariance7getTypeEv+0x4>) + 8000926: 4770 bx lr + 8000928: 0800a1e4 .word 0x0800a1e4 + +0800092c <_ZN13geometry_msgs19TwistWithCovariance6getMD5Ev>: + 800092c: 4800 ldr r0, [pc, #0] ; (8000930 <_ZN13geometry_msgs19TwistWithCovariance6getMD5Ev+0x4>) + 800092e: 4770 bx lr + 8000930: 0800a1c0 .word 0x0800a1c0 + +08000934 <_ZN8nav_msgs8Odometry7getTypeEv>: + 8000934: 4800 ldr r0, [pc, #0] ; (8000938 <_ZN8nav_msgs8Odometry7getTypeEv+0x4>) + 8000936: 4770 bx lr + 8000938: 0800a3e0 .word 0x0800a3e0 + +0800093c <_ZN8nav_msgs8Odometry6getMD5Ev>: + 800093c: 4800 ldr r0, [pc, #0] ; (8000940 <_ZN8nav_msgs8Odometry6getMD5Ev+0x4>) + 800093e: 4770 bx lr + 8000940: 0800a3bc .word 0x0800a3bc + +08000944 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE9connectedEv>: + 8000944: f890 0680 ldrb.w r0, [r0, #1664] ; 0x680 + 8000948: 4770 bx lr + 800094a: bf00 nop + +0800094c <_ZNK8std_msgs6Header9serializeEPh>: + 800094c: 6843 ldr r3, [r0, #4] + 800094e: b570 push {r4, r5, r6, lr} + 8000950: 700b strb r3, [r1, #0] + 8000952: 4605 mov r5, r0 + 8000954: 6843 ldr r3, [r0, #4] + 8000956: 460c mov r4, r1 + 8000958: 0a1b lsrs r3, r3, #8 + 800095a: 704b strb r3, [r1, #1] + 800095c: 88c3 ldrh r3, [r0, #6] + 800095e: 708b strb r3, [r1, #2] + 8000960: 79c3 ldrb r3, [r0, #7] + 8000962: 70cb strb r3, [r1, #3] + 8000964: 6883 ldr r3, [r0, #8] + 8000966: 710b strb r3, [r1, #4] + 8000968: 6883 ldr r3, [r0, #8] + 800096a: 0a1b lsrs r3, r3, #8 + 800096c: 714b strb r3, [r1, #5] + 800096e: 8943 ldrh r3, [r0, #10] + 8000970: 718b strb r3, [r1, #6] + 8000972: 7ac3 ldrb r3, [r0, #11] + 8000974: 71cb strb r3, [r1, #7] + 8000976: 68c3 ldr r3, [r0, #12] + 8000978: 720b strb r3, [r1, #8] + 800097a: 68c3 ldr r3, [r0, #12] + 800097c: 0a1b lsrs r3, r3, #8 + 800097e: 724b strb r3, [r1, #9] + 8000980: 89c3 ldrh r3, [r0, #14] + 8000982: 728b strb r3, [r1, #10] + 8000984: 7bc3 ldrb r3, [r0, #15] + 8000986: 72cb strb r3, [r1, #11] + 8000988: 6900 ldr r0, [r0, #16] + 800098a: f7ff fc55 bl 8000238 + 800098e: 4606 mov r6, r0 + 8000990: f104 0010 add.w r0, r4, #16 + 8000994: 0a33 lsrs r3, r6, #8 + 8000996: 7326 strb r6, [r4, #12] + 8000998: 0c32 lsrs r2, r6, #16 + 800099a: 7363 strb r3, [r4, #13] + 800099c: 0e33 lsrs r3, r6, #24 + 800099e: 73a2 strb r2, [r4, #14] + 80009a0: 4632 mov r2, r6 + 80009a2: 73e3 strb r3, [r4, #15] + 80009a4: 6929 ldr r1, [r5, #16] + 80009a6: f009 f9e1 bl 8009d6c + 80009aa: f106 0010 add.w r0, r6, #16 + 80009ae: bd70 pop {r4, r5, r6, pc} + +080009b0 <_ZNK14rosserial_msgs20RequestParamResponse9serializeEPh>: + 80009b0: 6843 ldr r3, [r0, #4] + 80009b2: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} + 80009b6: 700b strb r3, [r1, #0] + 80009b8: 6843 ldr r3, [r0, #4] + 80009ba: 0a1b lsrs r3, r3, #8 + 80009bc: 704b strb r3, [r1, #1] + 80009be: 88c3 ldrh r3, [r0, #6] + 80009c0: 708b strb r3, [r1, #2] + 80009c2: 79c3 ldrb r3, [r0, #7] + 80009c4: 70cb strb r3, [r1, #3] + 80009c6: 6843 ldr r3, [r0, #4] + 80009c8: 2b00 cmp r3, #0 + 80009ca: f000 8089 beq.w 8000ae0 <_ZNK14rosserial_msgs20RequestParamResponse9serializeEPh+0x130> + 80009ce: 460a mov r2, r1 + 80009d0: 2500 movs r5, #0 + 80009d2: 2704 movs r7, #4 + 80009d4: 68c3 ldr r3, [r0, #12] + 80009d6: 1d3e adds r6, r7, #4 + 80009d8: 463c mov r4, r7 + 80009da: 3204 adds r2, #4 + 80009dc: f853 3025 ldr.w r3, [r3, r5, lsl #2] + 80009e0: 3501 adds r5, #1 + 80009e2: 4637 mov r7, r6 + 80009e4: 7013 strb r3, [r2, #0] + 80009e6: ea4f 2e13 mov.w lr, r3, lsr #8 + 80009ea: ea4f 4c13 mov.w ip, r3, lsr #16 + 80009ee: 0e1b lsrs r3, r3, #24 + 80009f0: f882 e001 strb.w lr, [r2, #1] + 80009f4: f882 c002 strb.w ip, [r2, #2] + 80009f8: 70d3 strb r3, [r2, #3] + 80009fa: 6843 ldr r3, [r0, #4] + 80009fc: 42ab cmp r3, r5 + 80009fe: d8e9 bhi.n 80009d4 <_ZNK14rosserial_msgs20RequestParamResponse9serializeEPh+0x24> + 8000a00: f104 0508 add.w r5, r4, #8 + 8000a04: f104 0a05 add.w sl, r4, #5 + 8000a08: f104 0906 add.w r9, r4, #6 + 8000a0c: f104 0807 add.w r8, r4, #7 + 8000a10: f104 0e09 add.w lr, r4, #9 + 8000a14: f104 0c0a add.w ip, r4, #10 + 8000a18: f104 070b add.w r7, r4, #11 + 8000a1c: 462a mov r2, r5 + 8000a1e: 340c adds r4, #12 + 8000a20: 6903 ldr r3, [r0, #16] + 8000a22: 558b strb r3, [r1, r6] + 8000a24: 6903 ldr r3, [r0, #16] + 8000a26: 0a1b lsrs r3, r3, #8 + 8000a28: f801 300a strb.w r3, [r1, sl] + 8000a2c: 8a43 ldrh r3, [r0, #18] + 8000a2e: f801 3009 strb.w r3, [r1, r9] + 8000a32: 7cc3 ldrb r3, [r0, #19] + 8000a34: f801 3008 strb.w r3, [r1, r8] + 8000a38: 6903 ldr r3, [r0, #16] + 8000a3a: b1fb cbz r3, 8000a7c <_ZNK14rosserial_msgs20RequestParamResponse9serializeEPh+0xcc> + 8000a3c: 2700 movs r7, #0 + 8000a3e: 6983 ldr r3, [r0, #24] + 8000a40: 2600 movs r6, #0 + 8000a42: 1d15 adds r5, r2, #4 + 8000a44: 4614 mov r4, r2 + 8000a46: f853 3027 ldr.w r3, [r3, r7, lsl #2] + 8000a4a: 3701 adds r7, #1 + 8000a4c: f363 0607 bfi r6, r3, #0, #8 + 8000a50: ea4f 2e13 mov.w lr, r3, lsr #8 + 8000a54: ea4f 4c13 mov.w ip, r3, lsr #16 + 8000a58: f36e 260f bfi r6, lr, #8, #8 + 8000a5c: 0e1b lsrs r3, r3, #24 + 8000a5e: f36c 4617 bfi r6, ip, #16, #8 + 8000a62: f363 661f bfi r6, r3, #24, #8 + 8000a66: 508e str r6, [r1, r2] + 8000a68: 462a mov r2, r5 + 8000a6a: 6903 ldr r3, [r0, #16] + 8000a6c: 42bb cmp r3, r7 + 8000a6e: d8e6 bhi.n 8000a3e <_ZNK14rosserial_msgs20RequestParamResponse9serializeEPh+0x8e> + 8000a70: f104 0e05 add.w lr, r4, #5 + 8000a74: f104 0c06 add.w ip, r4, #6 + 8000a78: 1de7 adds r7, r4, #7 + 8000a7a: 3408 adds r4, #8 + 8000a7c: 69c3 ldr r3, [r0, #28] + 8000a7e: 554b strb r3, [r1, r5] + 8000a80: 69c3 ldr r3, [r0, #28] + 8000a82: 0a1b lsrs r3, r3, #8 + 8000a84: f801 300e strb.w r3, [r1, lr] + 8000a88: 8bc3 ldrh r3, [r0, #30] + 8000a8a: f801 300c strb.w r3, [r1, ip] + 8000a8e: 7fc3 ldrb r3, [r0, #31] + 8000a90: 55cb strb r3, [r1, r7] + 8000a92: 69c3 ldr r3, [r0, #28] + 8000a94: b30b cbz r3, 8000ada <_ZNK14rosserial_msgs20RequestParamResponse9serializeEPh+0x12a> + 8000a96: 460f mov r7, r1 + 8000a98: 4606 mov r6, r0 + 8000a9a: 2500 movs r5, #0 + 8000a9c: 6a73 ldr r3, [r6, #36] ; 0x24 + 8000a9e: f104 0804 add.w r8, r4, #4 + 8000aa2: f853 0025 ldr.w r0, [r3, r5, lsl #2] + 8000aa6: f7ff fbc7 bl 8000238 + 8000aaa: 4602 mov r2, r0 + 8000aac: 193b adds r3, r7, r4 + 8000aae: eb07 0008 add.w r0, r7, r8 + 8000ab2: 553a strb r2, [r7, r4] + 8000ab4: 0e11 lsrs r1, r2, #24 + 8000ab6: 0c14 lsrs r4, r2, #16 + 8000ab8: ea4f 2c12 mov.w ip, r2, lsr #8 + 8000abc: 70d9 strb r1, [r3, #3] + 8000abe: 709c strb r4, [r3, #2] + 8000ac0: eb08 0402 add.w r4, r8, r2 + 8000ac4: f883 c001 strb.w ip, [r3, #1] + 8000ac8: 6a73 ldr r3, [r6, #36] ; 0x24 + 8000aca: f853 1025 ldr.w r1, [r3, r5, lsl #2] + 8000ace: 3501 adds r5, #1 + 8000ad0: f009 f94c bl 8009d6c + 8000ad4: 69f3 ldr r3, [r6, #28] + 8000ad6: 42ab cmp r3, r5 + 8000ad8: d8e0 bhi.n 8000a9c <_ZNK14rosserial_msgs20RequestParamResponse9serializeEPh+0xec> + 8000ada: 4620 mov r0, r4 + 8000adc: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} + 8000ae0: 2508 movs r5, #8 + 8000ae2: 240c movs r4, #12 + 8000ae4: 270b movs r7, #11 + 8000ae6: f04f 0c0a mov.w ip, #10 + 8000aea: 462a mov r2, r5 + 8000aec: f04f 0e09 mov.w lr, #9 + 8000af0: f04f 0807 mov.w r8, #7 + 8000af4: f04f 0906 mov.w r9, #6 + 8000af8: f04f 0a05 mov.w sl, #5 + 8000afc: 2604 movs r6, #4 + 8000afe: e78f b.n 8000a20 <_ZNK14rosserial_msgs20RequestParamResponse9serializeEPh+0x70> + +08000b00 <_ZNK14rosserial_msgs3Log9serializeEPh>: + 8000b00: b570 push {r4, r5, r6, lr} + 8000b02: 7903 ldrb r3, [r0, #4] + 8000b04: 4605 mov r5, r0 + 8000b06: 460e mov r6, r1 + 8000b08: 700b strb r3, [r1, #0] + 8000b0a: 6880 ldr r0, [r0, #8] + 8000b0c: f7ff fb94 bl 8000238 + 8000b10: 2300 movs r3, #0 + 8000b12: 4604 mov r4, r0 + 8000b14: 1d70 adds r0, r6, #5 + 8000b16: 0a21 lsrs r1, r4, #8 + 8000b18: f364 0307 bfi r3, r4, #0, #8 + 8000b1c: 0c22 lsrs r2, r4, #16 + 8000b1e: f361 230f bfi r3, r1, #8, #8 + 8000b22: 0e21 lsrs r1, r4, #24 + 8000b24: f362 4317 bfi r3, r2, #16, #8 + 8000b28: 4622 mov r2, r4 + 8000b2a: f361 631f bfi r3, r1, #24, #8 + 8000b2e: f8c6 3001 str.w r3, [r6, #1] + 8000b32: 68a9 ldr r1, [r5, #8] + 8000b34: f009 f91a bl 8009d6c + 8000b38: 1d60 adds r0, r4, #5 + 8000b3a: bd70 pop {r4, r5, r6, pc} + +08000b3c <_ZNK14rosserial_msgs9TopicInfo9serializeEPh>: + 8000b3c: 8883 ldrh r3, [r0, #4] + 8000b3e: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} + 8000b42: 700b strb r3, [r1, #0] + 8000b44: 4605 mov r5, r0 + 8000b46: 8883 ldrh r3, [r0, #4] + 8000b48: 460c mov r4, r1 + 8000b4a: 0a1b lsrs r3, r3, #8 + 8000b4c: 704b strb r3, [r1, #1] + 8000b4e: 6880 ldr r0, [r0, #8] + 8000b50: f7ff fb72 bl 8000238 + 8000b54: 4602 mov r2, r0 + 8000b56: 1da0 adds r0, r4, #6 + 8000b58: 0a16 lsrs r6, r2, #8 + 8000b5a: 70a2 strb r2, [r4, #2] + 8000b5c: 0c11 lsrs r1, r2, #16 + 8000b5e: 1d97 adds r7, r2, #6 + 8000b60: 0e13 lsrs r3, r2, #24 + 8000b62: 70e6 strb r6, [r4, #3] + 8000b64: 7121 strb r1, [r4, #4] + 8000b66: f102 080a add.w r8, r2, #10 + 8000b6a: 7163 strb r3, [r4, #5] + 8000b6c: 68a9 ldr r1, [r5, #8] + 8000b6e: f009 f8fd bl 8009d6c + 8000b72: 68e8 ldr r0, [r5, #12] + 8000b74: f7ff fb60 bl 8000238 + 8000b78: 2300 movs r3, #0 + 8000b7a: 4602 mov r2, r0 + 8000b7c: eb04 0008 add.w r0, r4, r8 + 8000b80: 0a11 lsrs r1, r2, #8 + 8000b82: f362 0307 bfi r3, r2, #0, #8 + 8000b86: 0c16 lsrs r6, r2, #16 + 8000b88: 4490 add r8, r2 + 8000b8a: f361 230f bfi r3, r1, #8, #8 + 8000b8e: 0e11 lsrs r1, r2, #24 + 8000b90: f366 4317 bfi r3, r6, #16, #8 + 8000b94: f108 0604 add.w r6, r8, #4 + 8000b98: f361 631f bfi r3, r1, #24, #8 + 8000b9c: 51e3 str r3, [r4, r7] + 8000b9e: 68e9 ldr r1, [r5, #12] + 8000ba0: f009 f8e4 bl 8009d6c + 8000ba4: 6928 ldr r0, [r5, #16] + 8000ba6: f7ff fb47 bl 8000238 + 8000baa: 2300 movs r3, #0 + 8000bac: 4607 mov r7, r0 + 8000bae: 19a0 adds r0, r4, r6 + 8000bb0: 0a39 lsrs r1, r7, #8 + 8000bb2: f367 0307 bfi r3, r7, #0, #8 + 8000bb6: 0c3a lsrs r2, r7, #16 + 8000bb8: f361 230f bfi r3, r1, #8, #8 + 8000bbc: 0e39 lsrs r1, r7, #24 + 8000bbe: f362 4317 bfi r3, r2, #16, #8 + 8000bc2: 463a mov r2, r7 + 8000bc4: f361 631f bfi r3, r1, #24, #8 + 8000bc8: f844 3008 str.w r3, [r4, r8] + 8000bcc: 6929 ldr r1, [r5, #16] + 8000bce: f009 f8cd bl 8009d6c + 8000bd2: 696b ldr r3, [r5, #20] + 8000bd4: 19f2 adds r2, r6, r7 + 8000bd6: 0a1d lsrs r5, r3, #8 + 8000bd8: 54a3 strb r3, [r4, r2] + 8000bda: 18a1 adds r1, r4, r2 + 8000bdc: 1d10 adds r0, r2, #4 + 8000bde: 0c1a lsrs r2, r3, #16 + 8000be0: 0e1b lsrs r3, r3, #24 + 8000be2: 704d strb r5, [r1, #1] + 8000be4: 708a strb r2, [r1, #2] + 8000be6: 70cb strb r3, [r1, #3] + 8000be8: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} + +08000bec <_ZNK8std_msgs6String9serializeEPh>: + 8000bec: b570 push {r4, r5, r6, lr} + 8000bee: 4606 mov r6, r0 + 8000bf0: 6840 ldr r0, [r0, #4] + 8000bf2: 460d mov r5, r1 + 8000bf4: f7ff fb20 bl 8000238 + 8000bf8: 4604 mov r4, r0 + 8000bfa: 1d28 adds r0, r5, #4 + 8000bfc: 0a23 lsrs r3, r4, #8 + 8000bfe: 702c strb r4, [r5, #0] + 8000c00: 0c22 lsrs r2, r4, #16 + 8000c02: 706b strb r3, [r5, #1] + 8000c04: 0e23 lsrs r3, r4, #24 + 8000c06: 70aa strb r2, [r5, #2] + 8000c08: 4622 mov r2, r4 + 8000c0a: 70eb strb r3, [r5, #3] + 8000c0c: 6871 ldr r1, [r6, #4] + 8000c0e: f009 f8ad bl 8009d6c + 8000c12: 1d20 adds r0, r4, #4 + 8000c14: bd70 pop {r4, r5, r6, pc} + 8000c16: bf00 nop + +08000c18 <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh>: + 8000c18: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} + 8000c1c: 6843 ldr r3, [r0, #4] + 8000c1e: b083 sub sp, #12 + 8000c20: 680c ldr r4, [r1, #0] + 8000c22: 4605 mov r5, r0 + 8000c24: 460e mov r6, r1 + 8000c26: 42a3 cmp r3, r4 + 8000c28: f0c0 80b4 bcc.w 8000d94 <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x17c> + 8000c2c: 606c str r4, [r5, #4] + 8000c2e: 2c00 cmp r4, #0 + 8000c30: f000 80b9 beq.w 8000da6 <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x18e> + 8000c34: 4630 mov r0, r6 + 8000c36: 2400 movs r4, #0 + 8000c38: 2704 movs r7, #4 + 8000c3a: 7983 ldrb r3, [r0, #6] + 8000c3c: 1d3a adds r2, r7, #4 + 8000c3e: 7941 ldrb r1, [r0, #5] + 8000c40: 46ba mov sl, r7 + 8000c42: 041b lsls r3, r3, #16 + 8000c44: f890 e004 ldrb.w lr, [r0, #4] + 8000c48: f890 c007 ldrb.w ip, [r0, #7] + 8000c4c: 4617 mov r7, r2 + 8000c4e: ea43 2301 orr.w r3, r3, r1, lsl #8 + 8000c52: 68e9 ldr r1, [r5, #12] + 8000c54: 3004 adds r0, #4 + 8000c56: ea43 030e orr.w r3, r3, lr + 8000c5a: ea43 630c orr.w r3, r3, ip, lsl #24 + 8000c5e: 60ab str r3, [r5, #8] + 8000c60: f841 3024 str.w r3, [r1, r4, lsl #2] + 8000c64: 3401 adds r4, #1 + 8000c66: 686b ldr r3, [r5, #4] + 8000c68: 42a3 cmp r3, r4 + 8000c6a: d8e6 bhi.n 8000c3a <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x22> + 8000c6c: f10a 0708 add.w r7, sl, #8 + 8000c70: f10a 0005 add.w r0, sl, #5 + 8000c74: f10a 0306 add.w r3, sl, #6 + 8000c78: f10a 0107 add.w r1, sl, #7 + 8000c7c: f10a 0909 add.w r9, sl, #9 + 8000c80: f10a 0b0a add.w fp, sl, #10 + 8000c84: f10a 080b add.w r8, sl, #11 + 8000c88: 463c mov r4, r7 + 8000c8a: f10a 0a0c add.w sl, sl, #12 + 8000c8e: 5cf3 ldrb r3, [r6, r3] + 8000c90: f816 c000 ldrb.w ip, [r6, r0] + 8000c94: 041b lsls r3, r3, #16 + 8000c96: 5cb0 ldrb r0, [r6, r2] + 8000c98: 5c71 ldrb r1, [r6, r1] + 8000c9a: ea43 230c orr.w r3, r3, ip, lsl #8 + 8000c9e: 692a ldr r2, [r5, #16] + 8000ca0: 4303 orrs r3, r0 + 8000ca2: ea43 6301 orr.w r3, r3, r1, lsl #24 + 8000ca6: 429a cmp r2, r3 + 8000ca8: f0c0 8092 bcc.w 8000dd0 <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x1b8> + 8000cac: 612b str r3, [r5, #16] + 8000cae: b313 cbz r3, 8000cf6 <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0xde> + 8000cb0: 1931 adds r1, r6, r4 + 8000cb2: 2000 movs r0, #0 + 8000cb4: 788b ldrb r3, [r1, #2] + 8000cb6: 1d27 adds r7, r4, #4 + 8000cb8: 784a ldrb r2, [r1, #1] + 8000cba: 46a2 mov sl, r4 + 8000cbc: 041b lsls r3, r3, #16 + 8000cbe: f891 e000 ldrb.w lr, [r1] + 8000cc2: f891 c003 ldrb.w ip, [r1, #3] + 8000cc6: 463c mov r4, r7 + 8000cc8: ea43 2302 orr.w r3, r3, r2, lsl #8 + 8000ccc: 69aa ldr r2, [r5, #24] + 8000cce: 3104 adds r1, #4 + 8000cd0: ea43 030e orr.w r3, r3, lr + 8000cd4: ea43 630c orr.w r3, r3, ip, lsl #24 + 8000cd8: 616b str r3, [r5, #20] + 8000cda: f842 3020 str.w r3, [r2, r0, lsl #2] + 8000cde: 3001 adds r0, #1 + 8000ce0: 692b ldr r3, [r5, #16] + 8000ce2: 4283 cmp r3, r0 + 8000ce4: d8e6 bhi.n 8000cb4 <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x9c> + 8000ce6: f10a 0905 add.w r9, sl, #5 + 8000cea: f10a 0b06 add.w fp, sl, #6 + 8000cee: f10a 0807 add.w r8, sl, #7 + 8000cf2: f10a 0a08 add.w sl, sl, #8 + 8000cf6: f816 400b ldrb.w r4, [r6, fp] + 8000cfa: f816 3009 ldrb.w r3, [r6, r9] + 8000cfe: 0424 lsls r4, r4, #16 + 8000d00: 5df1 ldrb r1, [r6, r7] + 8000d02: f816 2008 ldrb.w r2, [r6, r8] + 8000d06: ea44 2403 orr.w r4, r4, r3, lsl #8 + 8000d0a: 69eb ldr r3, [r5, #28] + 8000d0c: 430c orrs r4, r1 + 8000d0e: ea44 6402 orr.w r4, r4, r2, lsl #24 + 8000d12: 42a3 cmp r3, r4 + 8000d14: d356 bcc.n 8000dc4 <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x1ac> + 8000d16: 61ec str r4, [r5, #28] + 8000d18: 2c00 cmp r4, #0 + 8000d1a: d037 beq.n 8000d8c <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x174> + 8000d1c: f04f 0900 mov.w r9, #0 + 8000d20: f06f 0803 mvn.w r8, #3 + 8000d24: 464f mov r7, r9 + 8000d26: eb06 020a add.w r2, r6, sl + 8000d2a: f10a 0003 add.w r0, sl, #3 + 8000d2e: f816 e00a ldrb.w lr, [r6, sl] + 8000d32: f10a 0b04 add.w fp, sl, #4 + 8000d36: 7894 ldrb r4, [r2, #2] + 8000d38: eba8 030a sub.w r3, r8, sl + 8000d3c: 7852 ldrb r2, [r2, #1] + 8000d3e: f10a 0c05 add.w ip, sl, #5 + 8000d42: 0424 lsls r4, r4, #16 + 8000d44: eb06 010b add.w r1, r6, fp + 8000d48: ea44 2402 orr.w r4, r4, r2, lsl #8 + 8000d4c: 5c32 ldrb r2, [r6, r0] + 8000d4e: 4430 add r0, r6 + 8000d50: ea44 040e orr.w r4, r4, lr + 8000d54: ea44 6402 orr.w r4, r4, r2, lsl #24 + 8000d58: 445c add r4, fp + 8000d5a: 45a3 cmp fp, r4 + 8000d5c: 4423 add r3, r4 + 8000d5e: 46a2 mov sl, r4 + 8000d60: d205 bcs.n 8000d6e <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x156> + 8000d62: 45a4 cmp ip, r4 + 8000d64: bf94 ite ls + 8000d66: 461a movls r2, r3 + 8000d68: 2201 movhi r2, #1 + 8000d6a: f009 f80a bl 8009d82 + 8000d6e: 4434 add r4, r6 + 8000d70: f10b 33ff add.w r3, fp, #4294967295 ; 0xffffffff + 8000d74: f804 7c01 strb.w r7, [r4, #-1] + 8000d78: 4433 add r3, r6 + 8000d7a: 6a6a ldr r2, [r5, #36] ; 0x24 + 8000d7c: 622b str r3, [r5, #32] + 8000d7e: f842 3029 str.w r3, [r2, r9, lsl #2] + 8000d82: f109 0901 add.w r9, r9, #1 + 8000d86: 69eb ldr r3, [r5, #28] + 8000d88: 454b cmp r3, r9 + 8000d8a: d8cc bhi.n 8000d26 <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x10e> + 8000d8c: 4650 mov r0, sl + 8000d8e: b003 add sp, #12 + 8000d90: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} + 8000d94: 00a1 lsls r1, r4, #2 + 8000d96: 68c0 ldr r0, [r0, #12] + 8000d98: f009 f814 bl 8009dc4 + 8000d9c: 606c str r4, [r5, #4] + 8000d9e: 60e8 str r0, [r5, #12] + 8000da0: 2c00 cmp r4, #0 + 8000da2: f47f af47 bne.w 8000c34 <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x1c> + 8000da6: 2708 movs r7, #8 + 8000da8: f04f 0a0c mov.w sl, #12 + 8000dac: f04f 080b mov.w r8, #11 + 8000db0: f04f 0b0a mov.w fp, #10 + 8000db4: 463c mov r4, r7 + 8000db6: f04f 0909 mov.w r9, #9 + 8000dba: 2107 movs r1, #7 + 8000dbc: 2306 movs r3, #6 + 8000dbe: 2005 movs r0, #5 + 8000dc0: 2204 movs r2, #4 + 8000dc2: e764 b.n 8000c8e <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x76> + 8000dc4: 00a1 lsls r1, r4, #2 + 8000dc6: 6a68 ldr r0, [r5, #36] ; 0x24 + 8000dc8: f008 fffc bl 8009dc4 + 8000dcc: 6268 str r0, [r5, #36] ; 0x24 + 8000dce: e7a2 b.n 8000d16 <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0xfe> + 8000dd0: 0099 lsls r1, r3, #2 + 8000dd2: 69a8 ldr r0, [r5, #24] + 8000dd4: 9301 str r3, [sp, #4] + 8000dd6: f008 fff5 bl 8009dc4 + 8000dda: 9b01 ldr r3, [sp, #4] + 8000ddc: 61a8 str r0, [r5, #24] + 8000dde: e765 b.n 8000cac <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x94> + +08000de0 <_ZNK13geometry_msgs5Twist9serializeEPh>: + 8000de0: edd0 7a02 vldr s15, [r0, #8] + 8000de4: ee17 3a90 vmov r3, s15 + 8000de8: f3c3 52c7 ubfx r2, r3, #23, #8 + 8000dec: b4f0 push {r4, r5, r6, r7} + 8000dee: 2a00 cmp r2, #0 + 8000df0: f000 80e5 beq.w 8000fbe <_ZNK13geometry_msgs5Twist9serializeEPh+0x1de> + 8000df4: f502 7260 add.w r2, r2, #896 ; 0x380 + 8000df8: 0114 lsls r4, r2, #4 + 8000dfa: 0912 lsrs r2, r2, #4 + 8000dfc: b264 sxtb r4, r4 + 8000dfe: eef5 7ac0 vcmpe.f32 s15, #0.0 + 8000e02: f3c3 46c3 ubfx r6, r3, #19, #4 + 8000e06: 2500 movs r5, #0 + 8000e08: 015f lsls r7, r3, #5 + 8000e0a: 4334 orrs r4, r6 + 8000e0c: 10de asrs r6, r3, #3 + 8000e0e: eef1 fa10 vmrs APSR_nzcv, fpscr + 8000e12: ea4f 23e3 mov.w r3, r3, asr #11 + 8000e16: 700d strb r5, [r1, #0] + 8000e18: 714b strb r3, [r1, #5] + 8000e1a: bf48 it mi + 8000e1c: f062 027f ornmi r2, r2, #127 ; 0x7f + 8000e20: 718c strb r4, [r1, #6] + 8000e22: 704d strb r5, [r1, #1] + 8000e24: 71ca strb r2, [r1, #7] + 8000e26: 708d strb r5, [r1, #2] + 8000e28: 70cf strb r7, [r1, #3] + 8000e2a: 710e strb r6, [r1, #4] + 8000e2c: edd0 7a03 vldr s15, [r0, #12] + 8000e30: ee17 3a90 vmov r3, s15 + 8000e34: f3c3 52c7 ubfx r2, r3, #23, #8 + 8000e38: 2a00 cmp r2, #0 + 8000e3a: f000 80ca beq.w 8000fd2 <_ZNK13geometry_msgs5Twist9serializeEPh+0x1f2> + 8000e3e: f502 7260 add.w r2, r2, #896 ; 0x380 + 8000e42: 0114 lsls r4, r2, #4 + 8000e44: 0912 lsrs r2, r2, #4 + 8000e46: b264 sxtb r4, r4 + 8000e48: eef5 7ac0 vcmpe.f32 s15, #0.0 + 8000e4c: f3c3 46c3 ubfx r6, r3, #19, #4 + 8000e50: 2500 movs r5, #0 + 8000e52: 015f lsls r7, r3, #5 + 8000e54: 4334 orrs r4, r6 + 8000e56: 10de asrs r6, r3, #3 + 8000e58: eef1 fa10 vmrs APSR_nzcv, fpscr + 8000e5c: ea4f 23e3 mov.w r3, r3, asr #11 + 8000e60: 720d strb r5, [r1, #8] + 8000e62: 734b strb r3, [r1, #13] + 8000e64: bf48 it mi + 8000e66: f062 027f ornmi r2, r2, #127 ; 0x7f + 8000e6a: 738c strb r4, [r1, #14] + 8000e6c: 724d strb r5, [r1, #9] + 8000e6e: 73ca strb r2, [r1, #15] + 8000e70: 728d strb r5, [r1, #10] + 8000e72: 72cf strb r7, [r1, #11] + 8000e74: 730e strb r6, [r1, #12] + 8000e76: edd0 7a04 vldr s15, [r0, #16] + 8000e7a: ee17 3a90 vmov r3, s15 + 8000e7e: f3c3 52c7 ubfx r2, r3, #23, #8 + 8000e82: 2a00 cmp r2, #0 + 8000e84: f000 80a3 beq.w 8000fce <_ZNK13geometry_msgs5Twist9serializeEPh+0x1ee> + 8000e88: f502 7260 add.w r2, r2, #896 ; 0x380 + 8000e8c: 0114 lsls r4, r2, #4 + 8000e8e: 0912 lsrs r2, r2, #4 + 8000e90: b264 sxtb r4, r4 + 8000e92: eef5 7ac0 vcmpe.f32 s15, #0.0 + 8000e96: f3c3 46c3 ubfx r6, r3, #19, #4 + 8000e9a: 2500 movs r5, #0 + 8000e9c: 015f lsls r7, r3, #5 + 8000e9e: 4334 orrs r4, r6 + 8000ea0: 10de asrs r6, r3, #3 + 8000ea2: eef1 fa10 vmrs APSR_nzcv, fpscr + 8000ea6: ea4f 23e3 mov.w r3, r3, asr #11 + 8000eaa: 740d strb r5, [r1, #16] + 8000eac: 754b strb r3, [r1, #21] + 8000eae: bf48 it mi + 8000eb0: f062 027f ornmi r2, r2, #127 ; 0x7f + 8000eb4: 758c strb r4, [r1, #22] + 8000eb6: 744d strb r5, [r1, #17] + 8000eb8: 75ca strb r2, [r1, #23] + 8000eba: 748d strb r5, [r1, #18] + 8000ebc: 74cf strb r7, [r1, #19] + 8000ebe: 750e strb r6, [r1, #20] + 8000ec0: edd0 7a06 vldr s15, [r0, #24] + 8000ec4: ee17 3a90 vmov r3, s15 + 8000ec8: f3c3 52c7 ubfx r2, r3, #23, #8 + 8000ecc: 2a00 cmp r2, #0 + 8000ece: d07c beq.n 8000fca <_ZNK13geometry_msgs5Twist9serializeEPh+0x1ea> + 8000ed0: f502 7260 add.w r2, r2, #896 ; 0x380 + 8000ed4: 0114 lsls r4, r2, #4 + 8000ed6: 0912 lsrs r2, r2, #4 + 8000ed8: b264 sxtb r4, r4 + 8000eda: eef5 7ac0 vcmpe.f32 s15, #0.0 + 8000ede: f3c3 46c3 ubfx r6, r3, #19, #4 + 8000ee2: 2500 movs r5, #0 + 8000ee4: 015f lsls r7, r3, #5 + 8000ee6: 4334 orrs r4, r6 + 8000ee8: 10de asrs r6, r3, #3 + 8000eea: eef1 fa10 vmrs APSR_nzcv, fpscr + 8000eee: ea4f 23e3 mov.w r3, r3, asr #11 + 8000ef2: 760d strb r5, [r1, #24] + 8000ef4: 774b strb r3, [r1, #29] + 8000ef6: bf48 it mi + 8000ef8: f062 027f ornmi r2, r2, #127 ; 0x7f + 8000efc: 778c strb r4, [r1, #30] + 8000efe: 764d strb r5, [r1, #25] + 8000f00: 77ca strb r2, [r1, #31] + 8000f02: 768d strb r5, [r1, #26] + 8000f04: 76cf strb r7, [r1, #27] + 8000f06: 770e strb r6, [r1, #28] + 8000f08: edd0 7a07 vldr s15, [r0, #28] + 8000f0c: ee17 3a90 vmov r3, s15 + 8000f10: f3c3 52c7 ubfx r2, r3, #23, #8 + 8000f14: 2a00 cmp r2, #0 + 8000f16: d056 beq.n 8000fc6 <_ZNK13geometry_msgs5Twist9serializeEPh+0x1e6> + 8000f18: f502 7260 add.w r2, r2, #896 ; 0x380 + 8000f1c: 0114 lsls r4, r2, #4 + 8000f1e: 0912 lsrs r2, r2, #4 + 8000f20: b264 sxtb r4, r4 + 8000f22: eef5 7ac0 vcmpe.f32 s15, #0.0 + 8000f26: f3c3 46c3 ubfx r6, r3, #19, #4 + 8000f2a: 2500 movs r5, #0 + 8000f2c: 015f lsls r7, r3, #5 + 8000f2e: 4334 orrs r4, r6 + 8000f30: 10de asrs r6, r3, #3 + 8000f32: eef1 fa10 vmrs APSR_nzcv, fpscr + 8000f36: ea4f 23e3 mov.w r3, r3, asr #11 + 8000f3a: f881 5020 strb.w r5, [r1, #32] + 8000f3e: f881 3025 strb.w r3, [r1, #37] ; 0x25 + 8000f42: bf48 it mi + 8000f44: f062 027f ornmi r2, r2, #127 ; 0x7f + 8000f48: f881 4026 strb.w r4, [r1, #38] ; 0x26 + 8000f4c: f881 5021 strb.w r5, [r1, #33] ; 0x21 + 8000f50: f881 2027 strb.w r2, [r1, #39] ; 0x27 + 8000f54: f881 5022 strb.w r5, [r1, #34] ; 0x22 + 8000f58: f881 7023 strb.w r7, [r1, #35] ; 0x23 + 8000f5c: f881 6024 strb.w r6, [r1, #36] ; 0x24 + 8000f60: edd0 7a08 vldr s15, [r0, #32] + 8000f64: ee17 3a90 vmov r3, s15 + 8000f68: f3c3 52c7 ubfx r2, r3, #23, #8 + 8000f6c: b34a cbz r2, 8000fc2 <_ZNK13geometry_msgs5Twist9serializeEPh+0x1e2> + 8000f6e: f502 7260 add.w r2, r2, #896 ; 0x380 + 8000f72: 0110 lsls r0, r2, #4 + 8000f74: 0912 lsrs r2, r2, #4 + 8000f76: b240 sxtb r0, r0 + 8000f78: eef5 7ac0 vcmpe.f32 s15, #0.0 + 8000f7c: f3c3 45c3 ubfx r5, r3, #19, #4 + 8000f80: 2400 movs r4, #0 + 8000f82: 015e lsls r6, r3, #5 + 8000f84: 4328 orrs r0, r5 + 8000f86: 10dd asrs r5, r3, #3 + 8000f88: eef1 fa10 vmrs APSR_nzcv, fpscr + 8000f8c: ea4f 23e3 mov.w r3, r3, asr #11 + 8000f90: f881 4028 strb.w r4, [r1, #40] ; 0x28 + 8000f94: f881 002e strb.w r0, [r1, #46] ; 0x2e + 8000f98: f04f 0030 mov.w r0, #48 ; 0x30 + 8000f9c: bf48 it mi + 8000f9e: f062 027f ornmi r2, r2, #127 ; 0x7f + 8000fa2: f881 4029 strb.w r4, [r1, #41] ; 0x29 + 8000fa6: f881 402a strb.w r4, [r1, #42] ; 0x2a + 8000faa: f881 602b strb.w r6, [r1, #43] ; 0x2b + 8000fae: f881 502c strb.w r5, [r1, #44] ; 0x2c + 8000fb2: f881 302d strb.w r3, [r1, #45] ; 0x2d + 8000fb6: f881 202f strb.w r2, [r1, #47] ; 0x2f + 8000fba: bcf0 pop {r4, r5, r6, r7} + 8000fbc: 4770 bx lr + 8000fbe: 4614 mov r4, r2 + 8000fc0: e71d b.n 8000dfe <_ZNK13geometry_msgs5Twist9serializeEPh+0x1e> + 8000fc2: 4610 mov r0, r2 + 8000fc4: e7d8 b.n 8000f78 <_ZNK13geometry_msgs5Twist9serializeEPh+0x198> + 8000fc6: 4614 mov r4, r2 + 8000fc8: e7ab b.n 8000f22 <_ZNK13geometry_msgs5Twist9serializeEPh+0x142> + 8000fca: 4614 mov r4, r2 + 8000fcc: e785 b.n 8000eda <_ZNK13geometry_msgs5Twist9serializeEPh+0xfa> + 8000fce: 4614 mov r4, r2 + 8000fd0: e75f b.n 8000e92 <_ZNK13geometry_msgs5Twist9serializeEPh+0xb2> + 8000fd2: 4614 mov r4, r2 + 8000fd4: e738 b.n 8000e48 <_ZNK13geometry_msgs5Twist9serializeEPh+0x68> + 8000fd6: bf00 nop + +08000fd8 <_ZNK13geometry_msgs4Pose9serializeEPh>: + 8000fd8: edd0 7a02 vldr s15, [r0, #8] + 8000fdc: ee17 3a90 vmov r3, s15 + 8000fe0: f3c3 52c7 ubfx r2, r3, #23, #8 + 8000fe4: b4f0 push {r4, r5, r6, r7} + 8000fe6: 2a00 cmp r2, #0 + 8000fe8: f000 8113 beq.w 8001212 <_ZNK13geometry_msgs4Pose9serializeEPh+0x23a> + 8000fec: f502 7260 add.w r2, r2, #896 ; 0x380 + 8000ff0: 0114 lsls r4, r2, #4 + 8000ff2: 0912 lsrs r2, r2, #4 + 8000ff4: b264 sxtb r4, r4 + 8000ff6: eef5 7ac0 vcmpe.f32 s15, #0.0 + 8000ffa: f3c3 46c3 ubfx r6, r3, #19, #4 + 8000ffe: 2500 movs r5, #0 + 8001000: 015f lsls r7, r3, #5 + 8001002: 4334 orrs r4, r6 + 8001004: 10de asrs r6, r3, #3 + 8001006: eef1 fa10 vmrs APSR_nzcv, fpscr + 800100a: ea4f 23e3 mov.w r3, r3, asr #11 + 800100e: 700d strb r5, [r1, #0] + 8001010: 714b strb r3, [r1, #5] + 8001012: bf48 it mi + 8001014: f062 027f ornmi r2, r2, #127 ; 0x7f + 8001018: 718c strb r4, [r1, #6] + 800101a: 704d strb r5, [r1, #1] + 800101c: 71ca strb r2, [r1, #7] + 800101e: 708d strb r5, [r1, #2] + 8001020: 70cf strb r7, [r1, #3] + 8001022: 710e strb r6, [r1, #4] + 8001024: edd0 7a03 vldr s15, [r0, #12] + 8001028: ee17 3a90 vmov r3, s15 + 800102c: f3c3 52c7 ubfx r2, r3, #23, #8 + 8001030: 2a00 cmp r2, #0 + 8001032: f000 80fa beq.w 800122a <_ZNK13geometry_msgs4Pose9serializeEPh+0x252> + 8001036: f502 7260 add.w r2, r2, #896 ; 0x380 + 800103a: 0114 lsls r4, r2, #4 + 800103c: 0912 lsrs r2, r2, #4 + 800103e: b264 sxtb r4, r4 + 8001040: eef5 7ac0 vcmpe.f32 s15, #0.0 + 8001044: f3c3 46c3 ubfx r6, r3, #19, #4 + 8001048: 2500 movs r5, #0 + 800104a: 015f lsls r7, r3, #5 + 800104c: 4334 orrs r4, r6 + 800104e: 10de asrs r6, r3, #3 + 8001050: eef1 fa10 vmrs APSR_nzcv, fpscr + 8001054: ea4f 23e3 mov.w r3, r3, asr #11 + 8001058: 720d strb r5, [r1, #8] + 800105a: 734b strb r3, [r1, #13] + 800105c: bf48 it mi + 800105e: f062 027f ornmi r2, r2, #127 ; 0x7f + 8001062: 738c strb r4, [r1, #14] + 8001064: 724d strb r5, [r1, #9] + 8001066: 73ca strb r2, [r1, #15] + 8001068: 728d strb r5, [r1, #10] + 800106a: 72cf strb r7, [r1, #11] + 800106c: 730e strb r6, [r1, #12] + 800106e: edd0 7a04 vldr s15, [r0, #16] + 8001072: ee17 3a90 vmov r3, s15 + 8001076: f3c3 52c7 ubfx r2, r3, #23, #8 + 800107a: 2a00 cmp r2, #0 + 800107c: f000 80d3 beq.w 8001226 <_ZNK13geometry_msgs4Pose9serializeEPh+0x24e> + 8001080: f502 7260 add.w r2, r2, #896 ; 0x380 + 8001084: 0114 lsls r4, r2, #4 + 8001086: 0912 lsrs r2, r2, #4 + 8001088: b264 sxtb r4, r4 + 800108a: eef5 7ac0 vcmpe.f32 s15, #0.0 + 800108e: f3c3 46c3 ubfx r6, r3, #19, #4 + 8001092: 2500 movs r5, #0 + 8001094: 015f lsls r7, r3, #5 + 8001096: 4334 orrs r4, r6 + 8001098: 10de asrs r6, r3, #3 + 800109a: eef1 fa10 vmrs APSR_nzcv, fpscr + 800109e: ea4f 23e3 mov.w r3, r3, asr #11 + 80010a2: 740d strb r5, [r1, #16] + 80010a4: 754b strb r3, [r1, #21] + 80010a6: bf48 it mi + 80010a8: f062 027f ornmi r2, r2, #127 ; 0x7f + 80010ac: 758c strb r4, [r1, #22] + 80010ae: 744d strb r5, [r1, #17] + 80010b0: 75ca strb r2, [r1, #23] + 80010b2: 748d strb r5, [r1, #18] + 80010b4: 74cf strb r7, [r1, #19] + 80010b6: 750e strb r6, [r1, #20] + 80010b8: edd0 7a06 vldr s15, [r0, #24] + 80010bc: ee17 3a90 vmov r3, s15 + 80010c0: f3c3 52c7 ubfx r2, r3, #23, #8 + 80010c4: 2a00 cmp r2, #0 + 80010c6: f000 80ac beq.w 8001222 <_ZNK13geometry_msgs4Pose9serializeEPh+0x24a> + 80010ca: f502 7260 add.w r2, r2, #896 ; 0x380 + 80010ce: 0114 lsls r4, r2, #4 + 80010d0: 0912 lsrs r2, r2, #4 + 80010d2: b264 sxtb r4, r4 + 80010d4: eef5 7ac0 vcmpe.f32 s15, #0.0 + 80010d8: f3c3 46c3 ubfx r6, r3, #19, #4 + 80010dc: 2500 movs r5, #0 + 80010de: 015f lsls r7, r3, #5 + 80010e0: 4334 orrs r4, r6 + 80010e2: 10de asrs r6, r3, #3 + 80010e4: eef1 fa10 vmrs APSR_nzcv, fpscr + 80010e8: ea4f 23e3 mov.w r3, r3, asr #11 + 80010ec: 760d strb r5, [r1, #24] + 80010ee: 774b strb r3, [r1, #29] + 80010f0: bf48 it mi + 80010f2: f062 027f ornmi r2, r2, #127 ; 0x7f + 80010f6: 778c strb r4, [r1, #30] + 80010f8: 764d strb r5, [r1, #25] + 80010fa: 77ca strb r2, [r1, #31] + 80010fc: 768d strb r5, [r1, #26] + 80010fe: 76cf strb r7, [r1, #27] + 8001100: 770e strb r6, [r1, #28] + 8001102: edd0 7a07 vldr s15, [r0, #28] + 8001106: ee17 3a90 vmov r3, s15 + 800110a: f3c3 52c7 ubfx r2, r3, #23, #8 + 800110e: 2a00 cmp r2, #0 + 8001110: f000 8085 beq.w 800121e <_ZNK13geometry_msgs4Pose9serializeEPh+0x246> + 8001114: f502 7260 add.w r2, r2, #896 ; 0x380 + 8001118: 0114 lsls r4, r2, #4 + 800111a: 0912 lsrs r2, r2, #4 + 800111c: b264 sxtb r4, r4 + 800111e: eef5 7ac0 vcmpe.f32 s15, #0.0 + 8001122: f3c3 46c3 ubfx r6, r3, #19, #4 + 8001126: 2500 movs r5, #0 + 8001128: 015f lsls r7, r3, #5 + 800112a: 4334 orrs r4, r6 + 800112c: 10de asrs r6, r3, #3 + 800112e: eef1 fa10 vmrs APSR_nzcv, fpscr + 8001132: ea4f 23e3 mov.w r3, r3, asr #11 + 8001136: f881 5020 strb.w r5, [r1, #32] + 800113a: f881 3025 strb.w r3, [r1, #37] ; 0x25 + 800113e: bf48 it mi + 8001140: f062 027f ornmi r2, r2, #127 ; 0x7f + 8001144: f881 4026 strb.w r4, [r1, #38] ; 0x26 + 8001148: f881 5021 strb.w r5, [r1, #33] ; 0x21 + 800114c: f881 2027 strb.w r2, [r1, #39] ; 0x27 + 8001150: f881 5022 strb.w r5, [r1, #34] ; 0x22 + 8001154: f881 7023 strb.w r7, [r1, #35] ; 0x23 + 8001158: f881 6024 strb.w r6, [r1, #36] ; 0x24 + 800115c: edd0 7a08 vldr s15, [r0, #32] + 8001160: ee17 3a90 vmov r3, s15 + 8001164: f3c3 52c7 ubfx r2, r3, #23, #8 + 8001168: 2a00 cmp r2, #0 + 800116a: d056 beq.n 800121a <_ZNK13geometry_msgs4Pose9serializeEPh+0x242> + 800116c: f502 7260 add.w r2, r2, #896 ; 0x380 + 8001170: 0114 lsls r4, r2, #4 + 8001172: 0912 lsrs r2, r2, #4 + 8001174: b264 sxtb r4, r4 + 8001176: eef5 7ac0 vcmpe.f32 s15, #0.0 + 800117a: f3c3 46c3 ubfx r6, r3, #19, #4 + 800117e: 2500 movs r5, #0 + 8001180: 015f lsls r7, r3, #5 + 8001182: 4334 orrs r4, r6 + 8001184: 10de asrs r6, r3, #3 + 8001186: eef1 fa10 vmrs APSR_nzcv, fpscr + 800118a: ea4f 23e3 mov.w r3, r3, asr #11 + 800118e: f881 5028 strb.w r5, [r1, #40] ; 0x28 + 8001192: f881 302d strb.w r3, [r1, #45] ; 0x2d + 8001196: bf48 it mi + 8001198: f062 027f ornmi r2, r2, #127 ; 0x7f + 800119c: f881 402e strb.w r4, [r1, #46] ; 0x2e + 80011a0: f881 5029 strb.w r5, [r1, #41] ; 0x29 + 80011a4: f881 202f strb.w r2, [r1, #47] ; 0x2f + 80011a8: f881 502a strb.w r5, [r1, #42] ; 0x2a + 80011ac: f881 702b strb.w r7, [r1, #43] ; 0x2b + 80011b0: f881 602c strb.w r6, [r1, #44] ; 0x2c + 80011b4: edd0 7a09 vldr s15, [r0, #36] ; 0x24 + 80011b8: ee17 3a90 vmov r3, s15 + 80011bc: f3c3 52c7 ubfx r2, r3, #23, #8 + 80011c0: b34a cbz r2, 8001216 <_ZNK13geometry_msgs4Pose9serializeEPh+0x23e> + 80011c2: f502 7260 add.w r2, r2, #896 ; 0x380 + 80011c6: 0110 lsls r0, r2, #4 + 80011c8: 0912 lsrs r2, r2, #4 + 80011ca: b240 sxtb r0, r0 + 80011cc: eef5 7ac0 vcmpe.f32 s15, #0.0 + 80011d0: f3c3 45c3 ubfx r5, r3, #19, #4 + 80011d4: 2400 movs r4, #0 + 80011d6: 015e lsls r6, r3, #5 + 80011d8: 4328 orrs r0, r5 + 80011da: 10dd asrs r5, r3, #3 + 80011dc: eef1 fa10 vmrs APSR_nzcv, fpscr + 80011e0: ea4f 23e3 mov.w r3, r3, asr #11 + 80011e4: f881 4030 strb.w r4, [r1, #48] ; 0x30 + 80011e8: f881 0036 strb.w r0, [r1, #54] ; 0x36 + 80011ec: f04f 0038 mov.w r0, #56 ; 0x38 + 80011f0: bf48 it mi + 80011f2: f062 027f ornmi r2, r2, #127 ; 0x7f + 80011f6: f881 4031 strb.w r4, [r1, #49] ; 0x31 + 80011fa: f881 4032 strb.w r4, [r1, #50] ; 0x32 + 80011fe: f881 6033 strb.w r6, [r1, #51] ; 0x33 + 8001202: f881 5034 strb.w r5, [r1, #52] ; 0x34 + 8001206: f881 3035 strb.w r3, [r1, #53] ; 0x35 + 800120a: f881 2037 strb.w r2, [r1, #55] ; 0x37 + 800120e: bcf0 pop {r4, r5, r6, r7} + 8001210: 4770 bx lr + 8001212: 4614 mov r4, r2 + 8001214: e6ef b.n 8000ff6 <_ZNK13geometry_msgs4Pose9serializeEPh+0x1e> + 8001216: 4610 mov r0, r2 + 8001218: e7d8 b.n 80011cc <_ZNK13geometry_msgs4Pose9serializeEPh+0x1f4> + 800121a: 4614 mov r4, r2 + 800121c: e7ab b.n 8001176 <_ZNK13geometry_msgs4Pose9serializeEPh+0x19e> + 800121e: 4614 mov r4, r2 + 8001220: e77d b.n 800111e <_ZNK13geometry_msgs4Pose9serializeEPh+0x146> + 8001222: 4614 mov r4, r2 + 8001224: e756 b.n 80010d4 <_ZNK13geometry_msgs4Pose9serializeEPh+0xfc> + 8001226: 4614 mov r4, r2 + 8001228: e72f b.n 800108a <_ZNK13geometry_msgs4Pose9serializeEPh+0xb2> + 800122a: 4614 mov r4, r2 + 800122c: e708 b.n 8001040 <_ZNK13geometry_msgs4Pose9serializeEPh+0x68> + 800122e: bf00 nop + +08001230 <_ZNK13geometry_msgs18PoseWithCovariance9serializeEPh>: + 8001230: edd0 7a03 vldr s15, [r0, #12] + 8001234: ee17 3a90 vmov r3, s15 + 8001238: f3c3 52c7 ubfx r2, r3, #23, #8 + 800123c: b5f0 push {r4, r5, r6, r7, lr} + 800123e: 2a00 cmp r2, #0 + 8001240: f000 8157 beq.w 80014f2 <_ZNK13geometry_msgs18PoseWithCovariance9serializeEPh+0x2c2> + 8001244: f502 7260 add.w r2, r2, #896 ; 0x380 + 8001248: 0114 lsls r4, r2, #4 + 800124a: 0912 lsrs r2, r2, #4 + 800124c: b264 sxtb r4, r4 + 800124e: eef5 7ac0 vcmpe.f32 s15, #0.0 + 8001252: f3c3 46c3 ubfx r6, r3, #19, #4 + 8001256: 2500 movs r5, #0 + 8001258: 015f lsls r7, r3, #5 + 800125a: 4334 orrs r4, r6 + 800125c: 10de asrs r6, r3, #3 + 800125e: eef1 fa10 vmrs APSR_nzcv, fpscr + 8001262: ea4f 23e3 mov.w r3, r3, asr #11 + 8001266: 700d strb r5, [r1, #0] + 8001268: 714b strb r3, [r1, #5] + 800126a: bf48 it mi + 800126c: f062 027f ornmi r2, r2, #127 ; 0x7f + 8001270: 718c strb r4, [r1, #6] + 8001272: 704d strb r5, [r1, #1] + 8001274: 71ca strb r2, [r1, #7] + 8001276: 708d strb r5, [r1, #2] + 8001278: 70cf strb r7, [r1, #3] + 800127a: 710e strb r6, [r1, #4] + 800127c: edd0 7a04 vldr s15, [r0, #16] + 8001280: ee17 3a90 vmov r3, s15 + 8001284: f3c3 52c7 ubfx r2, r3, #23, #8 + 8001288: 2a00 cmp r2, #0 + 800128a: f000 8130 beq.w 80014ee <_ZNK13geometry_msgs18PoseWithCovariance9serializeEPh+0x2be> + 800128e: f502 7260 add.w r2, r2, #896 ; 0x380 + 8001292: 0114 lsls r4, r2, #4 + 8001294: 0912 lsrs r2, r2, #4 + 8001296: b264 sxtb r4, r4 + 8001298: eef5 7ac0 vcmpe.f32 s15, #0.0 + 800129c: f3c3 46c3 ubfx r6, r3, #19, #4 + 80012a0: 2500 movs r5, #0 + 80012a2: 015f lsls r7, r3, #5 + 80012a4: 4334 orrs r4, r6 + 80012a6: 10de asrs r6, r3, #3 + 80012a8: eef1 fa10 vmrs APSR_nzcv, fpscr + 80012ac: ea4f 23e3 mov.w r3, r3, asr #11 + 80012b0: 720d strb r5, [r1, #8] + 80012b2: 734b strb r3, [r1, #13] + 80012b4: bf48 it mi + 80012b6: f062 027f ornmi r2, r2, #127 ; 0x7f + 80012ba: 738c strb r4, [r1, #14] + 80012bc: 724d strb r5, [r1, #9] + 80012be: 73ca strb r2, [r1, #15] + 80012c0: 728d strb r5, [r1, #10] + 80012c2: 72cf strb r7, [r1, #11] + 80012c4: 730e strb r6, [r1, #12] + 80012c6: edd0 7a05 vldr s15, [r0, #20] + 80012ca: ee17 3a90 vmov r3, s15 + 80012ce: f3c3 52c7 ubfx r2, r3, #23, #8 + 80012d2: 2a00 cmp r2, #0 + 80012d4: f000 8109 beq.w 80014ea <_ZNK13geometry_msgs18PoseWithCovariance9serializeEPh+0x2ba> + 80012d8: f502 7260 add.w r2, r2, #896 ; 0x380 + 80012dc: 0114 lsls r4, r2, #4 + 80012de: 0912 lsrs r2, r2, #4 + 80012e0: b264 sxtb r4, r4 + 80012e2: eef5 7ac0 vcmpe.f32 s15, #0.0 + 80012e6: f3c3 46c3 ubfx r6, r3, #19, #4 + 80012ea: 2500 movs r5, #0 + 80012ec: 015f lsls r7, r3, #5 + 80012ee: 4334 orrs r4, r6 + 80012f0: 10de asrs r6, r3, #3 + 80012f2: eef1 fa10 vmrs APSR_nzcv, fpscr + 80012f6: ea4f 23e3 mov.w r3, r3, asr #11 + 80012fa: 740d strb r5, [r1, #16] + 80012fc: 754b strb r3, [r1, #21] + 80012fe: bf48 it mi + 8001300: f062 027f ornmi r2, r2, #127 ; 0x7f + 8001304: 758c strb r4, [r1, #22] + 8001306: 744d strb r5, [r1, #17] + 8001308: 75ca strb r2, [r1, #23] + 800130a: 748d strb r5, [r1, #18] + 800130c: 74cf strb r7, [r1, #19] + 800130e: 750e strb r6, [r1, #20] + 8001310: edd0 7a07 vldr s15, [r0, #28] + 8001314: ee17 3a90 vmov r3, s15 + 8001318: f3c3 52c7 ubfx r2, r3, #23, #8 + 800131c: 2a00 cmp r2, #0 + 800131e: f000 80e2 beq.w 80014e6 <_ZNK13geometry_msgs18PoseWithCovariance9serializeEPh+0x2b6> + 8001322: f502 7260 add.w r2, r2, #896 ; 0x380 + 8001326: 0114 lsls r4, r2, #4 + 8001328: 0912 lsrs r2, r2, #4 + 800132a: b264 sxtb r4, r4 + 800132c: eef5 7ac0 vcmpe.f32 s15, #0.0 + 8001330: f3c3 46c3 ubfx r6, r3, #19, #4 + 8001334: 2500 movs r5, #0 + 8001336: 015f lsls r7, r3, #5 + 8001338: 4334 orrs r4, r6 + 800133a: 10de asrs r6, r3, #3 + 800133c: eef1 fa10 vmrs APSR_nzcv, fpscr + 8001340: ea4f 23e3 mov.w r3, r3, asr #11 + 8001344: 760d strb r5, [r1, #24] + 8001346: 774b strb r3, [r1, #29] + 8001348: bf48 it mi + 800134a: f062 027f ornmi r2, r2, #127 ; 0x7f + 800134e: 778c strb r4, [r1, #30] + 8001350: 764d strb r5, [r1, #25] + 8001352: 77ca strb r2, [r1, #31] + 8001354: 768d strb r5, [r1, #26] + 8001356: 76cf strb r7, [r1, #27] + 8001358: 770e strb r6, [r1, #28] + 800135a: edd0 7a08 vldr s15, [r0, #32] + 800135e: ee17 3a90 vmov r3, s15 + 8001362: f3c3 52c7 ubfx r2, r3, #23, #8 + 8001366: 2a00 cmp r2, #0 + 8001368: f000 80bb beq.w 80014e2 <_ZNK13geometry_msgs18PoseWithCovariance9serializeEPh+0x2b2> + 800136c: f502 7260 add.w r2, r2, #896 ; 0x380 + 8001370: 0114 lsls r4, r2, #4 + 8001372: 0912 lsrs r2, r2, #4 + 8001374: b264 sxtb r4, r4 + 8001376: eef5 7ac0 vcmpe.f32 s15, #0.0 + 800137a: f3c3 46c3 ubfx r6, r3, #19, #4 + 800137e: 2500 movs r5, #0 + 8001380: 015f lsls r7, r3, #5 + 8001382: 4334 orrs r4, r6 + 8001384: 10de asrs r6, r3, #3 + 8001386: eef1 fa10 vmrs APSR_nzcv, fpscr + 800138a: ea4f 23e3 mov.w r3, r3, asr #11 + 800138e: f881 5020 strb.w r5, [r1, #32] + 8001392: f881 3025 strb.w r3, [r1, #37] ; 0x25 + 8001396: bf48 it mi + 8001398: f062 027f ornmi r2, r2, #127 ; 0x7f + 800139c: f881 4026 strb.w r4, [r1, #38] ; 0x26 + 80013a0: f881 5021 strb.w r5, [r1, #33] ; 0x21 + 80013a4: f881 2027 strb.w r2, [r1, #39] ; 0x27 + 80013a8: f881 5022 strb.w r5, [r1, #34] ; 0x22 + 80013ac: f881 7023 strb.w r7, [r1, #35] ; 0x23 + 80013b0: f881 6024 strb.w r6, [r1, #36] ; 0x24 + 80013b4: edd0 7a09 vldr s15, [r0, #36] ; 0x24 + 80013b8: ee17 3a90 vmov r3, s15 + 80013bc: f3c3 52c7 ubfx r2, r3, #23, #8 + 80013c0: 2a00 cmp r2, #0 + 80013c2: f000 808c beq.w 80014de <_ZNK13geometry_msgs18PoseWithCovariance9serializeEPh+0x2ae> + 80013c6: f502 7260 add.w r2, r2, #896 ; 0x380 + 80013ca: 0114 lsls r4, r2, #4 + 80013cc: 0912 lsrs r2, r2, #4 + 80013ce: b264 sxtb r4, r4 + 80013d0: eef5 7ac0 vcmpe.f32 s15, #0.0 + 80013d4: f3c3 46c3 ubfx r6, r3, #19, #4 + 80013d8: 2500 movs r5, #0 + 80013da: 015f lsls r7, r3, #5 + 80013dc: 4334 orrs r4, r6 + 80013de: 10de asrs r6, r3, #3 + 80013e0: eef1 fa10 vmrs APSR_nzcv, fpscr + 80013e4: ea4f 23e3 mov.w r3, r3, asr #11 + 80013e8: f881 5028 strb.w r5, [r1, #40] ; 0x28 + 80013ec: f881 302d strb.w r3, [r1, #45] ; 0x2d + 80013f0: bf48 it mi + 80013f2: f062 027f ornmi r2, r2, #127 ; 0x7f + 80013f6: f881 402e strb.w r4, [r1, #46] ; 0x2e + 80013fa: f881 5029 strb.w r5, [r1, #41] ; 0x29 + 80013fe: f881 202f strb.w r2, [r1, #47] ; 0x2f + 8001402: f881 502a strb.w r5, [r1, #42] ; 0x2a + 8001406: f881 702b strb.w r7, [r1, #43] ; 0x2b + 800140a: f881 602c strb.w r6, [r1, #44] ; 0x2c + 800140e: edd0 7a0a vldr s15, [r0, #40] ; 0x28 + 8001412: ee17 3a90 vmov r3, s15 + 8001416: f3c3 52c7 ubfx r2, r3, #23, #8 + 800141a: 2a00 cmp r2, #0 + 800141c: d05d beq.n 80014da <_ZNK13geometry_msgs18PoseWithCovariance9serializeEPh+0x2aa> + 800141e: f502 7260 add.w r2, r2, #896 ; 0x380 + 8001422: 0114 lsls r4, r2, #4 + 8001424: 0912 lsrs r2, r2, #4 + 8001426: b264 sxtb r4, r4 + 8001428: eef5 7ac0 vcmpe.f32 s15, #0.0 + 800142c: f3c3 46c3 ubfx r6, r3, #19, #4 + 8001430: 2500 movs r5, #0 + 8001432: 015f lsls r7, r3, #5 + 8001434: 4334 orrs r4, r6 + 8001436: f100 0ebc add.w lr, r0, #188 ; 0xbc + 800143a: eef1 fa10 vmrs APSR_nzcv, fpscr + 800143e: ea4f 06e3 mov.w r6, r3, asr #3 + 8001442: f881 5030 strb.w r5, [r1, #48] ; 0x30 + 8001446: ea4f 23e3 mov.w r3, r3, asr #11 + 800144a: f881 4036 strb.w r4, [r1, #54] ; 0x36 + 800144e: f04f 0400 mov.w r4, #0 + 8001452: f881 5031 strb.w r5, [r1, #49] ; 0x31 + 8001456: bf48 it mi + 8001458: f062 027f ornmi r2, r2, #127 ; 0x7f + 800145c: f881 5032 strb.w r5, [r1, #50] ; 0x32 + 8001460: f100 052c add.w r5, r0, #44 ; 0x2c + 8001464: f881 7033 strb.w r7, [r1, #51] ; 0x33 + 8001468: f881 6034 strb.w r6, [r1, #52] ; 0x34 + 800146c: f881 3035 strb.w r3, [r1, #53] ; 0x35 + 8001470: f881 2037 strb.w r2, [r1, #55] ; 0x37 + 8001474: ecf5 7a01 vldmia r5!, {s15} + 8001478: ee17 3a90 vmov r3, s15 + 800147c: f3c3 52c7 ubfx r2, r3, #23, #8 + 8001480: 4610 mov r0, r2 + 8001482: f502 7660 add.w r6, r2, #896 ; 0x380 + 8001486: b112 cbz r2, 800148e <_ZNK13geometry_msgs18PoseWithCovariance9serializeEPh+0x25e> + 8001488: 0132 lsls r2, r6, #4 + 800148a: 0930 lsrs r0, r6, #4 + 800148c: b252 sxtb r2, r2 + 800148e: eef5 7ac0 vcmpe.f32 s15, #0.0 + 8001492: f3c3 4cc3 ubfx ip, r3, #19, #4 + 8001496: 015f lsls r7, r3, #5 + 8001498: f881 4038 strb.w r4, [r1, #56] ; 0x38 + 800149c: 10de asrs r6, r3, #3 + 800149e: ea42 020c orr.w r2, r2, ip + 80014a2: eef1 fa10 vmrs APSR_nzcv, fpscr + 80014a6: ea4f 23e3 mov.w r3, r3, asr #11 + 80014aa: f881 4039 strb.w r4, [r1, #57] ; 0x39 + 80014ae: f101 0108 add.w r1, r1, #8 + 80014b2: f881 4032 strb.w r4, [r1, #50] ; 0x32 + 80014b6: bf48 it mi + 80014b8: f060 007f ornmi r0, r0, #127 ; 0x7f + 80014bc: 4575 cmp r5, lr + 80014be: f881 2036 strb.w r2, [r1, #54] ; 0x36 + 80014c2: f881 7033 strb.w r7, [r1, #51] ; 0x33 + 80014c6: f881 6034 strb.w r6, [r1, #52] ; 0x34 + 80014ca: f881 3035 strb.w r3, [r1, #53] ; 0x35 + 80014ce: f881 0037 strb.w r0, [r1, #55] ; 0x37 + 80014d2: d1cf bne.n 8001474 <_ZNK13geometry_msgs18PoseWithCovariance9serializeEPh+0x244> + 80014d4: f44f 70ac mov.w r0, #344 ; 0x158 + 80014d8: bdf0 pop {r4, r5, r6, r7, pc} + 80014da: 4614 mov r4, r2 + 80014dc: e7a4 b.n 8001428 <_ZNK13geometry_msgs18PoseWithCovariance9serializeEPh+0x1f8> + 80014de: 4614 mov r4, r2 + 80014e0: e776 b.n 80013d0 <_ZNK13geometry_msgs18PoseWithCovariance9serializeEPh+0x1a0> + 80014e2: 4614 mov r4, r2 + 80014e4: e747 b.n 8001376 <_ZNK13geometry_msgs18PoseWithCovariance9serializeEPh+0x146> + 80014e6: 4614 mov r4, r2 + 80014e8: e720 b.n 800132c <_ZNK13geometry_msgs18PoseWithCovariance9serializeEPh+0xfc> + 80014ea: 4614 mov r4, r2 + 80014ec: e6f9 b.n 80012e2 <_ZNK13geometry_msgs18PoseWithCovariance9serializeEPh+0xb2> + 80014ee: 4614 mov r4, r2 + 80014f0: e6d2 b.n 8001298 <_ZNK13geometry_msgs18PoseWithCovariance9serializeEPh+0x68> + 80014f2: 4614 mov r4, r2 + 80014f4: e6ab b.n 800124e <_ZNK13geometry_msgs18PoseWithCovariance9serializeEPh+0x1e> + 80014f6: bf00 nop + +080014f8 <_ZNK13geometry_msgs19TwistWithCovariance9serializeEPh>: + 80014f8: edd0 7a03 vldr s15, [r0, #12] + 80014fc: ee17 3a90 vmov r3, s15 + 8001500: f3c3 52c7 ubfx r2, r3, #23, #8 + 8001504: b5f0 push {r4, r5, r6, r7, lr} + 8001506: 2a00 cmp r2, #0 + 8001508: f000 8128 beq.w 800175c <_ZNK13geometry_msgs19TwistWithCovariance9serializeEPh+0x264> + 800150c: f502 7260 add.w r2, r2, #896 ; 0x380 + 8001510: 0114 lsls r4, r2, #4 + 8001512: 0912 lsrs r2, r2, #4 + 8001514: b264 sxtb r4, r4 + 8001516: eef5 7ac0 vcmpe.f32 s15, #0.0 + 800151a: f3c3 46c3 ubfx r6, r3, #19, #4 + 800151e: 2500 movs r5, #0 + 8001520: 015f lsls r7, r3, #5 + 8001522: 4334 orrs r4, r6 + 8001524: 10de asrs r6, r3, #3 + 8001526: eef1 fa10 vmrs APSR_nzcv, fpscr + 800152a: ea4f 23e3 mov.w r3, r3, asr #11 + 800152e: 700d strb r5, [r1, #0] + 8001530: 714b strb r3, [r1, #5] + 8001532: bf48 it mi + 8001534: f062 027f ornmi r2, r2, #127 ; 0x7f + 8001538: 718c strb r4, [r1, #6] + 800153a: 704d strb r5, [r1, #1] + 800153c: 71ca strb r2, [r1, #7] + 800153e: 708d strb r5, [r1, #2] + 8001540: 70cf strb r7, [r1, #3] + 8001542: 710e strb r6, [r1, #4] + 8001544: edd0 7a04 vldr s15, [r0, #16] + 8001548: ee17 3a90 vmov r3, s15 + 800154c: f3c3 52c7 ubfx r2, r3, #23, #8 + 8001550: 2a00 cmp r2, #0 + 8001552: f000 8101 beq.w 8001758 <_ZNK13geometry_msgs19TwistWithCovariance9serializeEPh+0x260> + 8001556: f502 7260 add.w r2, r2, #896 ; 0x380 + 800155a: 0114 lsls r4, r2, #4 + 800155c: 0912 lsrs r2, r2, #4 + 800155e: b264 sxtb r4, r4 + 8001560: eef5 7ac0 vcmpe.f32 s15, #0.0 + 8001564: f3c3 46c3 ubfx r6, r3, #19, #4 + 8001568: 2500 movs r5, #0 + 800156a: 015f lsls r7, r3, #5 + 800156c: 4334 orrs r4, r6 + 800156e: 10de asrs r6, r3, #3 + 8001570: eef1 fa10 vmrs APSR_nzcv, fpscr + 8001574: ea4f 23e3 mov.w r3, r3, asr #11 + 8001578: 720d strb r5, [r1, #8] + 800157a: 734b strb r3, [r1, #13] + 800157c: bf48 it mi + 800157e: f062 027f ornmi r2, r2, #127 ; 0x7f + 8001582: 738c strb r4, [r1, #14] + 8001584: 724d strb r5, [r1, #9] + 8001586: 73ca strb r2, [r1, #15] + 8001588: 728d strb r5, [r1, #10] + 800158a: 72cf strb r7, [r1, #11] + 800158c: 730e strb r6, [r1, #12] + 800158e: edd0 7a05 vldr s15, [r0, #20] + 8001592: ee17 3a90 vmov r3, s15 + 8001596: f3c3 52c7 ubfx r2, r3, #23, #8 + 800159a: 2a00 cmp r2, #0 + 800159c: f000 80da beq.w 8001754 <_ZNK13geometry_msgs19TwistWithCovariance9serializeEPh+0x25c> + 80015a0: f502 7260 add.w r2, r2, #896 ; 0x380 + 80015a4: 0114 lsls r4, r2, #4 + 80015a6: 0912 lsrs r2, r2, #4 + 80015a8: b264 sxtb r4, r4 + 80015aa: eef5 7ac0 vcmpe.f32 s15, #0.0 + 80015ae: f3c3 46c3 ubfx r6, r3, #19, #4 + 80015b2: 2500 movs r5, #0 + 80015b4: 015f lsls r7, r3, #5 + 80015b6: 4334 orrs r4, r6 + 80015b8: 10de asrs r6, r3, #3 + 80015ba: eef1 fa10 vmrs APSR_nzcv, fpscr + 80015be: ea4f 23e3 mov.w r3, r3, asr #11 + 80015c2: 740d strb r5, [r1, #16] + 80015c4: 754b strb r3, [r1, #21] + 80015c6: bf48 it mi + 80015c8: f062 027f ornmi r2, r2, #127 ; 0x7f + 80015cc: 758c strb r4, [r1, #22] + 80015ce: 744d strb r5, [r1, #17] + 80015d0: 75ca strb r2, [r1, #23] + 80015d2: 748d strb r5, [r1, #18] + 80015d4: 74cf strb r7, [r1, #19] + 80015d6: 750e strb r6, [r1, #20] + 80015d8: edd0 7a07 vldr s15, [r0, #28] + 80015dc: ee17 3a90 vmov r3, s15 + 80015e0: f3c3 52c7 ubfx r2, r3, #23, #8 + 80015e4: 2a00 cmp r2, #0 + 80015e6: f000 80b3 beq.w 8001750 <_ZNK13geometry_msgs19TwistWithCovariance9serializeEPh+0x258> + 80015ea: f502 7260 add.w r2, r2, #896 ; 0x380 + 80015ee: 0114 lsls r4, r2, #4 + 80015f0: 0912 lsrs r2, r2, #4 + 80015f2: b264 sxtb r4, r4 + 80015f4: eef5 7ac0 vcmpe.f32 s15, #0.0 + 80015f8: f3c3 46c3 ubfx r6, r3, #19, #4 + 80015fc: 2500 movs r5, #0 + 80015fe: 015f lsls r7, r3, #5 + 8001600: 4334 orrs r4, r6 + 8001602: 10de asrs r6, r3, #3 + 8001604: eef1 fa10 vmrs APSR_nzcv, fpscr + 8001608: ea4f 23e3 mov.w r3, r3, asr #11 + 800160c: 760d strb r5, [r1, #24] + 800160e: 774b strb r3, [r1, #29] + 8001610: bf48 it mi + 8001612: f062 027f ornmi r2, r2, #127 ; 0x7f + 8001616: 778c strb r4, [r1, #30] + 8001618: 764d strb r5, [r1, #25] + 800161a: 77ca strb r2, [r1, #31] + 800161c: 768d strb r5, [r1, #26] + 800161e: 76cf strb r7, [r1, #27] + 8001620: 770e strb r6, [r1, #28] + 8001622: edd0 7a08 vldr s15, [r0, #32] + 8001626: ee17 3a90 vmov r3, s15 + 800162a: f3c3 52c7 ubfx r2, r3, #23, #8 + 800162e: 2a00 cmp r2, #0 + 8001630: f000 808c beq.w 800174c <_ZNK13geometry_msgs19TwistWithCovariance9serializeEPh+0x254> + 8001634: f502 7260 add.w r2, r2, #896 ; 0x380 + 8001638: 0114 lsls r4, r2, #4 + 800163a: 0912 lsrs r2, r2, #4 + 800163c: b264 sxtb r4, r4 + 800163e: eef5 7ac0 vcmpe.f32 s15, #0.0 + 8001642: f3c3 46c3 ubfx r6, r3, #19, #4 + 8001646: 2500 movs r5, #0 + 8001648: 015f lsls r7, r3, #5 + 800164a: 4334 orrs r4, r6 + 800164c: 10de asrs r6, r3, #3 + 800164e: eef1 fa10 vmrs APSR_nzcv, fpscr + 8001652: ea4f 23e3 mov.w r3, r3, asr #11 + 8001656: f881 5020 strb.w r5, [r1, #32] + 800165a: f881 3025 strb.w r3, [r1, #37] ; 0x25 + 800165e: bf48 it mi + 8001660: f062 027f ornmi r2, r2, #127 ; 0x7f + 8001664: f881 4026 strb.w r4, [r1, #38] ; 0x26 + 8001668: f881 5021 strb.w r5, [r1, #33] ; 0x21 + 800166c: f881 2027 strb.w r2, [r1, #39] ; 0x27 + 8001670: f881 5022 strb.w r5, [r1, #34] ; 0x22 + 8001674: f881 7023 strb.w r7, [r1, #35] ; 0x23 + 8001678: f881 6024 strb.w r6, [r1, #36] ; 0x24 + 800167c: edd0 7a09 vldr s15, [r0, #36] ; 0x24 + 8001680: ee17 3a90 vmov r3, s15 + 8001684: f3c3 52c7 ubfx r2, r3, #23, #8 + 8001688: 2a00 cmp r2, #0 + 800168a: d05d beq.n 8001748 <_ZNK13geometry_msgs19TwistWithCovariance9serializeEPh+0x250> + 800168c: f502 7260 add.w r2, r2, #896 ; 0x380 + 8001690: 0114 lsls r4, r2, #4 + 8001692: 0912 lsrs r2, r2, #4 + 8001694: b264 sxtb r4, r4 + 8001696: eef5 7ac0 vcmpe.f32 s15, #0.0 + 800169a: f3c3 46c3 ubfx r6, r3, #19, #4 + 800169e: 2500 movs r5, #0 + 80016a0: 015f lsls r7, r3, #5 + 80016a2: 4334 orrs r4, r6 + 80016a4: f100 0eb8 add.w lr, r0, #184 ; 0xb8 + 80016a8: eef1 fa10 vmrs APSR_nzcv, fpscr + 80016ac: ea4f 06e3 mov.w r6, r3, asr #3 + 80016b0: f881 5028 strb.w r5, [r1, #40] ; 0x28 + 80016b4: ea4f 23e3 mov.w r3, r3, asr #11 + 80016b8: f881 402e strb.w r4, [r1, #46] ; 0x2e + 80016bc: f04f 0400 mov.w r4, #0 + 80016c0: f881 5029 strb.w r5, [r1, #41] ; 0x29 + 80016c4: bf48 it mi + 80016c6: f062 027f ornmi r2, r2, #127 ; 0x7f + 80016ca: f881 502a strb.w r5, [r1, #42] ; 0x2a + 80016ce: f100 0528 add.w r5, r0, #40 ; 0x28 + 80016d2: f881 702b strb.w r7, [r1, #43] ; 0x2b + 80016d6: f881 602c strb.w r6, [r1, #44] ; 0x2c + 80016da: f881 302d strb.w r3, [r1, #45] ; 0x2d + 80016de: f881 202f strb.w r2, [r1, #47] ; 0x2f + 80016e2: ecf5 7a01 vldmia r5!, {s15} + 80016e6: ee17 3a90 vmov r3, s15 + 80016ea: f3c3 52c7 ubfx r2, r3, #23, #8 + 80016ee: 4610 mov r0, r2 + 80016f0: f502 7660 add.w r6, r2, #896 ; 0x380 + 80016f4: b112 cbz r2, 80016fc <_ZNK13geometry_msgs19TwistWithCovariance9serializeEPh+0x204> + 80016f6: 0132 lsls r2, r6, #4 + 80016f8: 0930 lsrs r0, r6, #4 + 80016fa: b252 sxtb r2, r2 + 80016fc: eef5 7ac0 vcmpe.f32 s15, #0.0 + 8001700: f3c3 4cc3 ubfx ip, r3, #19, #4 + 8001704: 015f lsls r7, r3, #5 + 8001706: f881 4030 strb.w r4, [r1, #48] ; 0x30 + 800170a: 10de asrs r6, r3, #3 + 800170c: ea42 020c orr.w r2, r2, ip + 8001710: eef1 fa10 vmrs APSR_nzcv, fpscr + 8001714: ea4f 23e3 mov.w r3, r3, asr #11 + 8001718: f881 4031 strb.w r4, [r1, #49] ; 0x31 + 800171c: f101 0108 add.w r1, r1, #8 + 8001720: f881 402a strb.w r4, [r1, #42] ; 0x2a + 8001724: bf48 it mi + 8001726: f060 007f ornmi r0, r0, #127 ; 0x7f + 800172a: 4575 cmp r5, lr + 800172c: f881 202e strb.w r2, [r1, #46] ; 0x2e + 8001730: f881 702b strb.w r7, [r1, #43] ; 0x2b + 8001734: f881 602c strb.w r6, [r1, #44] ; 0x2c + 8001738: f881 302d strb.w r3, [r1, #45] ; 0x2d + 800173c: f881 002f strb.w r0, [r1, #47] ; 0x2f + 8001740: d1cf bne.n 80016e2 <_ZNK13geometry_msgs19TwistWithCovariance9serializeEPh+0x1ea> + 8001742: f44f 70a8 mov.w r0, #336 ; 0x150 + 8001746: bdf0 pop {r4, r5, r6, r7, pc} + 8001748: 4614 mov r4, r2 + 800174a: e7a4 b.n 8001696 <_ZNK13geometry_msgs19TwistWithCovariance9serializeEPh+0x19e> + 800174c: 4614 mov r4, r2 + 800174e: e776 b.n 800163e <_ZNK13geometry_msgs19TwistWithCovariance9serializeEPh+0x146> + 8001750: 4614 mov r4, r2 + 8001752: e74f b.n 80015f4 <_ZNK13geometry_msgs19TwistWithCovariance9serializeEPh+0xfc> + 8001754: 4614 mov r4, r2 + 8001756: e728 b.n 80015aa <_ZNK13geometry_msgs19TwistWithCovariance9serializeEPh+0xb2> + 8001758: 4614 mov r4, r2 + 800175a: e701 b.n 8001560 <_ZNK13geometry_msgs19TwistWithCovariance9serializeEPh+0x68> + 800175c: 4614 mov r4, r2 + 800175e: e6da b.n 8001516 <_ZNK13geometry_msgs19TwistWithCovariance9serializeEPh+0x1e> + +08001760 <_ZNK13geometry_msgs7Vector39serializeEPh>: + 8001760: edd0 7a01 vldr s15, [r0, #4] + 8001764: ee17 3a90 vmov r3, s15 + 8001768: f3c3 52c7 ubfx r2, r3, #23, #8 + 800176c: b4f0 push {r4, r5, r6, r7} + 800176e: 2a00 cmp r2, #0 + 8001770: d066 beq.n 8001840 <_ZNK13geometry_msgs7Vector39serializeEPh+0xe0> + 8001772: f502 7260 add.w r2, r2, #896 ; 0x380 + 8001776: 0114 lsls r4, r2, #4 + 8001778: 0912 lsrs r2, r2, #4 + 800177a: b264 sxtb r4, r4 + 800177c: eef5 7ac0 vcmpe.f32 s15, #0.0 + 8001780: f3c3 46c3 ubfx r6, r3, #19, #4 + 8001784: 2500 movs r5, #0 + 8001786: 015f lsls r7, r3, #5 + 8001788: 4334 orrs r4, r6 + 800178a: 10de asrs r6, r3, #3 + 800178c: eef1 fa10 vmrs APSR_nzcv, fpscr + 8001790: ea4f 23e3 mov.w r3, r3, asr #11 + 8001794: 700d strb r5, [r1, #0] + 8001796: 714b strb r3, [r1, #5] + 8001798: bf48 it mi + 800179a: f062 027f ornmi r2, r2, #127 ; 0x7f + 800179e: 718c strb r4, [r1, #6] + 80017a0: 704d strb r5, [r1, #1] + 80017a2: 71ca strb r2, [r1, #7] + 80017a4: 708d strb r5, [r1, #2] + 80017a6: 70cf strb r7, [r1, #3] + 80017a8: 710e strb r6, [r1, #4] + 80017aa: edd0 7a02 vldr s15, [r0, #8] + 80017ae: ee17 3a90 vmov r3, s15 + 80017b2: f3c3 52c7 ubfx r2, r3, #23, #8 + 80017b6: 2a00 cmp r2, #0 + 80017b8: d046 beq.n 8001848 <_ZNK13geometry_msgs7Vector39serializeEPh+0xe8> + 80017ba: f502 7260 add.w r2, r2, #896 ; 0x380 + 80017be: 0114 lsls r4, r2, #4 + 80017c0: 0912 lsrs r2, r2, #4 + 80017c2: b264 sxtb r4, r4 + 80017c4: eef5 7ac0 vcmpe.f32 s15, #0.0 + 80017c8: f3c3 46c3 ubfx r6, r3, #19, #4 + 80017cc: 2500 movs r5, #0 + 80017ce: 015f lsls r7, r3, #5 + 80017d0: 4334 orrs r4, r6 + 80017d2: 10de asrs r6, r3, #3 + 80017d4: eef1 fa10 vmrs APSR_nzcv, fpscr + 80017d8: ea4f 23e3 mov.w r3, r3, asr #11 + 80017dc: 720d strb r5, [r1, #8] + 80017de: 734b strb r3, [r1, #13] + 80017e0: bf48 it mi + 80017e2: f062 027f ornmi r2, r2, #127 ; 0x7f + 80017e6: 738c strb r4, [r1, #14] + 80017e8: 724d strb r5, [r1, #9] + 80017ea: 73ca strb r2, [r1, #15] + 80017ec: 728d strb r5, [r1, #10] + 80017ee: 72cf strb r7, [r1, #11] + 80017f0: 730e strb r6, [r1, #12] + 80017f2: edd0 7a03 vldr s15, [r0, #12] + 80017f6: ee17 3a90 vmov r3, s15 + 80017fa: f3c3 52c7 ubfx r2, r3, #23, #8 + 80017fe: b30a cbz r2, 8001844 <_ZNK13geometry_msgs7Vector39serializeEPh+0xe4> + 8001800: f502 7260 add.w r2, r2, #896 ; 0x380 + 8001804: 0110 lsls r0, r2, #4 + 8001806: 0912 lsrs r2, r2, #4 + 8001808: b240 sxtb r0, r0 + 800180a: eef5 7ac0 vcmpe.f32 s15, #0.0 + 800180e: f3c3 45c3 ubfx r5, r3, #19, #4 + 8001812: 2400 movs r4, #0 + 8001814: 015e lsls r6, r3, #5 + 8001816: 4328 orrs r0, r5 + 8001818: 10dd asrs r5, r3, #3 + 800181a: eef1 fa10 vmrs APSR_nzcv, fpscr + 800181e: ea4f 23e3 mov.w r3, r3, asr #11 + 8001822: 740c strb r4, [r1, #16] + 8001824: 7588 strb r0, [r1, #22] + 8001826: f04f 0018 mov.w r0, #24 + 800182a: bf48 it mi + 800182c: f062 027f ornmi r2, r2, #127 ; 0x7f + 8001830: 744c strb r4, [r1, #17] + 8001832: 748c strb r4, [r1, #18] + 8001834: 74ce strb r6, [r1, #19] + 8001836: 750d strb r5, [r1, #20] + 8001838: 754b strb r3, [r1, #21] + 800183a: 75ca strb r2, [r1, #23] + 800183c: bcf0 pop {r4, r5, r6, r7} + 800183e: 4770 bx lr + 8001840: 4614 mov r4, r2 + 8001842: e79b b.n 800177c <_ZNK13geometry_msgs7Vector39serializeEPh+0x1c> + 8001844: 4610 mov r0, r2 + 8001846: e7e0 b.n 800180a <_ZNK13geometry_msgs7Vector39serializeEPh+0xaa> + 8001848: 4614 mov r4, r2 + 800184a: e7bb b.n 80017c4 <_ZNK13geometry_msgs7Vector39serializeEPh+0x64> + +0800184c <_ZNK13geometry_msgs5Point9serializeEPh>: + 800184c: edd0 7a01 vldr s15, [r0, #4] + 8001850: ee17 3a90 vmov r3, s15 + 8001854: f3c3 52c7 ubfx r2, r3, #23, #8 + 8001858: b4f0 push {r4, r5, r6, r7} + 800185a: 2a00 cmp r2, #0 + 800185c: d066 beq.n 800192c <_ZNK13geometry_msgs5Point9serializeEPh+0xe0> + 800185e: f502 7260 add.w r2, r2, #896 ; 0x380 + 8001862: 0114 lsls r4, r2, #4 + 8001864: 0912 lsrs r2, r2, #4 + 8001866: b264 sxtb r4, r4 + 8001868: eef5 7ac0 vcmpe.f32 s15, #0.0 + 800186c: f3c3 46c3 ubfx r6, r3, #19, #4 + 8001870: 2500 movs r5, #0 + 8001872: 015f lsls r7, r3, #5 + 8001874: 4334 orrs r4, r6 + 8001876: 10de asrs r6, r3, #3 + 8001878: eef1 fa10 vmrs APSR_nzcv, fpscr + 800187c: ea4f 23e3 mov.w r3, r3, asr #11 + 8001880: 700d strb r5, [r1, #0] + 8001882: 714b strb r3, [r1, #5] + 8001884: bf48 it mi + 8001886: f062 027f ornmi r2, r2, #127 ; 0x7f + 800188a: 718c strb r4, [r1, #6] + 800188c: 704d strb r5, [r1, #1] + 800188e: 71ca strb r2, [r1, #7] + 8001890: 708d strb r5, [r1, #2] + 8001892: 70cf strb r7, [r1, #3] + 8001894: 710e strb r6, [r1, #4] + 8001896: edd0 7a02 vldr s15, [r0, #8] + 800189a: ee17 3a90 vmov r3, s15 + 800189e: f3c3 52c7 ubfx r2, r3, #23, #8 + 80018a2: 2a00 cmp r2, #0 + 80018a4: d046 beq.n 8001934 <_ZNK13geometry_msgs5Point9serializeEPh+0xe8> + 80018a6: f502 7260 add.w r2, r2, #896 ; 0x380 + 80018aa: 0114 lsls r4, r2, #4 + 80018ac: 0912 lsrs r2, r2, #4 + 80018ae: b264 sxtb r4, r4 + 80018b0: eef5 7ac0 vcmpe.f32 s15, #0.0 + 80018b4: f3c3 46c3 ubfx r6, r3, #19, #4 + 80018b8: 2500 movs r5, #0 + 80018ba: 015f lsls r7, r3, #5 + 80018bc: 4334 orrs r4, r6 + 80018be: 10de asrs r6, r3, #3 + 80018c0: eef1 fa10 vmrs APSR_nzcv, fpscr + 80018c4: ea4f 23e3 mov.w r3, r3, asr #11 + 80018c8: 720d strb r5, [r1, #8] + 80018ca: 734b strb r3, [r1, #13] + 80018cc: bf48 it mi + 80018ce: f062 027f ornmi r2, r2, #127 ; 0x7f + 80018d2: 738c strb r4, [r1, #14] + 80018d4: 724d strb r5, [r1, #9] + 80018d6: 73ca strb r2, [r1, #15] + 80018d8: 728d strb r5, [r1, #10] + 80018da: 72cf strb r7, [r1, #11] + 80018dc: 730e strb r6, [r1, #12] + 80018de: edd0 7a03 vldr s15, [r0, #12] + 80018e2: ee17 3a90 vmov r3, s15 + 80018e6: f3c3 52c7 ubfx r2, r3, #23, #8 + 80018ea: b30a cbz r2, 8001930 <_ZNK13geometry_msgs5Point9serializeEPh+0xe4> + 80018ec: f502 7260 add.w r2, r2, #896 ; 0x380 + 80018f0: 0110 lsls r0, r2, #4 + 80018f2: 0912 lsrs r2, r2, #4 + 80018f4: b240 sxtb r0, r0 + 80018f6: eef5 7ac0 vcmpe.f32 s15, #0.0 + 80018fa: f3c3 45c3 ubfx r5, r3, #19, #4 + 80018fe: 2400 movs r4, #0 + 8001900: 015e lsls r6, r3, #5 + 8001902: 4328 orrs r0, r5 + 8001904: 10dd asrs r5, r3, #3 + 8001906: eef1 fa10 vmrs APSR_nzcv, fpscr + 800190a: ea4f 23e3 mov.w r3, r3, asr #11 + 800190e: 740c strb r4, [r1, #16] + 8001910: 7588 strb r0, [r1, #22] + 8001912: f04f 0018 mov.w r0, #24 + 8001916: bf48 it mi + 8001918: f062 027f ornmi r2, r2, #127 ; 0x7f + 800191c: 744c strb r4, [r1, #17] + 800191e: 748c strb r4, [r1, #18] + 8001920: 74ce strb r6, [r1, #19] + 8001922: 750d strb r5, [r1, #20] + 8001924: 754b strb r3, [r1, #21] + 8001926: 75ca strb r2, [r1, #23] + 8001928: bcf0 pop {r4, r5, r6, r7} + 800192a: 4770 bx lr + 800192c: 4614 mov r4, r2 + 800192e: e79b b.n 8001868 <_ZNK13geometry_msgs5Point9serializeEPh+0x1c> + 8001930: 4610 mov r0, r2 + 8001932: e7e0 b.n 80018f6 <_ZNK13geometry_msgs5Point9serializeEPh+0xaa> + 8001934: 4614 mov r4, r2 + 8001936: e7bb b.n 80018b0 <_ZNK13geometry_msgs5Point9serializeEPh+0x64> + +08001938 <_ZNK13geometry_msgs10Quaternion9serializeEPh>: + 8001938: edd0 7a01 vldr s15, [r0, #4] + 800193c: ee17 3a90 vmov r3, s15 + 8001940: f3c3 52c7 ubfx r2, r3, #23, #8 + 8001944: b4f0 push {r4, r5, r6, r7} + 8001946: 2a00 cmp r2, #0 + 8001948: f000 808b beq.w 8001a62 <_ZNK13geometry_msgs10Quaternion9serializeEPh+0x12a> + 800194c: f502 7260 add.w r2, r2, #896 ; 0x380 + 8001950: 0114 lsls r4, r2, #4 + 8001952: 0912 lsrs r2, r2, #4 + 8001954: b264 sxtb r4, r4 + 8001956: eef5 7ac0 vcmpe.f32 s15, #0.0 + 800195a: f3c3 46c3 ubfx r6, r3, #19, #4 + 800195e: 2500 movs r5, #0 + 8001960: 015f lsls r7, r3, #5 + 8001962: 4334 orrs r4, r6 + 8001964: 10de asrs r6, r3, #3 + 8001966: eef1 fa10 vmrs APSR_nzcv, fpscr + 800196a: ea4f 23e3 mov.w r3, r3, asr #11 + 800196e: 700d strb r5, [r1, #0] + 8001970: 714b strb r3, [r1, #5] + 8001972: bf48 it mi + 8001974: f062 027f ornmi r2, r2, #127 ; 0x7f + 8001978: 718c strb r4, [r1, #6] + 800197a: 704d strb r5, [r1, #1] + 800197c: 71ca strb r2, [r1, #7] + 800197e: 708d strb r5, [r1, #2] + 8001980: 70cf strb r7, [r1, #3] + 8001982: 710e strb r6, [r1, #4] + 8001984: edd0 7a02 vldr s15, [r0, #8] + 8001988: ee17 3a90 vmov r3, s15 + 800198c: f3c3 52c7 ubfx r2, r3, #23, #8 + 8001990: 2a00 cmp r2, #0 + 8001992: d06c beq.n 8001a6e <_ZNK13geometry_msgs10Quaternion9serializeEPh+0x136> + 8001994: f502 7260 add.w r2, r2, #896 ; 0x380 + 8001998: 0114 lsls r4, r2, #4 + 800199a: 0912 lsrs r2, r2, #4 + 800199c: b264 sxtb r4, r4 + 800199e: eef5 7ac0 vcmpe.f32 s15, #0.0 + 80019a2: f3c3 46c3 ubfx r6, r3, #19, #4 + 80019a6: 2500 movs r5, #0 + 80019a8: 015f lsls r7, r3, #5 + 80019aa: 4334 orrs r4, r6 + 80019ac: 10de asrs r6, r3, #3 + 80019ae: eef1 fa10 vmrs APSR_nzcv, fpscr + 80019b2: ea4f 23e3 mov.w r3, r3, asr #11 + 80019b6: 720d strb r5, [r1, #8] + 80019b8: 734b strb r3, [r1, #13] + 80019ba: bf48 it mi + 80019bc: f062 027f ornmi r2, r2, #127 ; 0x7f + 80019c0: 738c strb r4, [r1, #14] + 80019c2: 724d strb r5, [r1, #9] + 80019c4: 73ca strb r2, [r1, #15] + 80019c6: 728d strb r5, [r1, #10] + 80019c8: 72cf strb r7, [r1, #11] + 80019ca: 730e strb r6, [r1, #12] + 80019cc: edd0 7a03 vldr s15, [r0, #12] + 80019d0: ee17 3a90 vmov r3, s15 + 80019d4: f3c3 52c7 ubfx r2, r3, #23, #8 + 80019d8: 2a00 cmp r2, #0 + 80019da: d046 beq.n 8001a6a <_ZNK13geometry_msgs10Quaternion9serializeEPh+0x132> + 80019dc: f502 7260 add.w r2, r2, #896 ; 0x380 + 80019e0: 0114 lsls r4, r2, #4 + 80019e2: 0912 lsrs r2, r2, #4 + 80019e4: b264 sxtb r4, r4 + 80019e6: eef5 7ac0 vcmpe.f32 s15, #0.0 + 80019ea: f3c3 46c3 ubfx r6, r3, #19, #4 + 80019ee: 2500 movs r5, #0 + 80019f0: 015f lsls r7, r3, #5 + 80019f2: 4334 orrs r4, r6 + 80019f4: 10de asrs r6, r3, #3 + 80019f6: eef1 fa10 vmrs APSR_nzcv, fpscr + 80019fa: ea4f 23e3 mov.w r3, r3, asr #11 + 80019fe: 740d strb r5, [r1, #16] + 8001a00: 754b strb r3, [r1, #21] + 8001a02: bf48 it mi + 8001a04: f062 027f ornmi r2, r2, #127 ; 0x7f + 8001a08: 758c strb r4, [r1, #22] + 8001a0a: 744d strb r5, [r1, #17] + 8001a0c: 75ca strb r2, [r1, #23] + 8001a0e: 748d strb r5, [r1, #18] + 8001a10: 74cf strb r7, [r1, #19] + 8001a12: 750e strb r6, [r1, #20] + 8001a14: edd0 7a04 vldr s15, [r0, #16] + 8001a18: ee17 3a90 vmov r3, s15 + 8001a1c: f3c3 52c7 ubfx r2, r3, #23, #8 + 8001a20: b30a cbz r2, 8001a66 <_ZNK13geometry_msgs10Quaternion9serializeEPh+0x12e> + 8001a22: f502 7260 add.w r2, r2, #896 ; 0x380 + 8001a26: 0110 lsls r0, r2, #4 + 8001a28: 0912 lsrs r2, r2, #4 + 8001a2a: b240 sxtb r0, r0 + 8001a2c: eef5 7ac0 vcmpe.f32 s15, #0.0 + 8001a30: f3c3 45c3 ubfx r5, r3, #19, #4 + 8001a34: 2400 movs r4, #0 + 8001a36: 015e lsls r6, r3, #5 + 8001a38: 4328 orrs r0, r5 + 8001a3a: 10dd asrs r5, r3, #3 + 8001a3c: eef1 fa10 vmrs APSR_nzcv, fpscr + 8001a40: ea4f 23e3 mov.w r3, r3, asr #11 + 8001a44: 760c strb r4, [r1, #24] + 8001a46: 7788 strb r0, [r1, #30] + 8001a48: f04f 0020 mov.w r0, #32 + 8001a4c: bf48 it mi + 8001a4e: f062 027f ornmi r2, r2, #127 ; 0x7f + 8001a52: 764c strb r4, [r1, #25] + 8001a54: 768c strb r4, [r1, #26] + 8001a56: 76ce strb r6, [r1, #27] + 8001a58: 770d strb r5, [r1, #28] + 8001a5a: 774b strb r3, [r1, #29] + 8001a5c: 77ca strb r2, [r1, #31] + 8001a5e: bcf0 pop {r4, r5, r6, r7} + 8001a60: 4770 bx lr + 8001a62: 4614 mov r4, r2 + 8001a64: e777 b.n 8001956 <_ZNK13geometry_msgs10Quaternion9serializeEPh+0x1e> + 8001a66: 4610 mov r0, r2 + 8001a68: e7e0 b.n 8001a2c <_ZNK13geometry_msgs10Quaternion9serializeEPh+0xf4> + 8001a6a: 4614 mov r4, r2 + 8001a6c: e7bb b.n 80019e6 <_ZNK13geometry_msgs10Quaternion9serializeEPh+0xae> + 8001a6e: 4614 mov r4, r2 + 8001a70: e795 b.n 800199e <_ZNK13geometry_msgs10Quaternion9serializeEPh+0x66> + 8001a72: bf00 nop + +08001a74 <_ZNK8nav_msgs8Odometry9serializeEPh>: + 8001a74: 6883 ldr r3, [r0, #8] + 8001a76: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} + 8001a7a: 700b strb r3, [r1, #0] + 8001a7c: 4604 mov r4, r0 + 8001a7e: 6883 ldr r3, [r0, #8] + 8001a80: 460d mov r5, r1 + 8001a82: 0a1b lsrs r3, r3, #8 + 8001a84: 704b strb r3, [r1, #1] + 8001a86: 8943 ldrh r3, [r0, #10] + 8001a88: 708b strb r3, [r1, #2] + 8001a8a: 7ac3 ldrb r3, [r0, #11] + 8001a8c: 70cb strb r3, [r1, #3] + 8001a8e: 68c3 ldr r3, [r0, #12] + 8001a90: 710b strb r3, [r1, #4] + 8001a92: 68c3 ldr r3, [r0, #12] + 8001a94: 0a1b lsrs r3, r3, #8 + 8001a96: 714b strb r3, [r1, #5] + 8001a98: 89c3 ldrh r3, [r0, #14] + 8001a9a: 718b strb r3, [r1, #6] + 8001a9c: 7bc3 ldrb r3, [r0, #15] + 8001a9e: 71cb strb r3, [r1, #7] + 8001aa0: 6903 ldr r3, [r0, #16] + 8001aa2: 720b strb r3, [r1, #8] + 8001aa4: 6903 ldr r3, [r0, #16] + 8001aa6: 0a1b lsrs r3, r3, #8 + 8001aa8: 724b strb r3, [r1, #9] + 8001aaa: 8a43 ldrh r3, [r0, #18] + 8001aac: 728b strb r3, [r1, #10] + 8001aae: 7cc3 ldrb r3, [r0, #19] + 8001ab0: 72cb strb r3, [r1, #11] + 8001ab2: 6940 ldr r0, [r0, #20] + 8001ab4: f7fe fbc0 bl 8000238 + 8001ab8: 4602 mov r2, r0 + 8001aba: f105 0010 add.w r0, r5, #16 + 8001abe: 0a16 lsrs r6, r2, #8 + 8001ac0: 732a strb r2, [r5, #12] + 8001ac2: 0c11 lsrs r1, r2, #16 + 8001ac4: f102 0714 add.w r7, r2, #20 + 8001ac8: 0e13 lsrs r3, r2, #24 + 8001aca: 736e strb r6, [r5, #13] + 8001acc: 73a9 strb r1, [r5, #14] + 8001ace: f102 0810 add.w r8, r2, #16 + 8001ad2: 73eb strb r3, [r5, #15] + 8001ad4: 6961 ldr r1, [r4, #20] + 8001ad6: f008 f949 bl 8009d6c + 8001ada: 69a0 ldr r0, [r4, #24] + 8001adc: f7fe fbac bl 8000238 + 8001ae0: 2300 movs r3, #0 + 8001ae2: 4606 mov r6, r0 + 8001ae4: 19e8 adds r0, r5, r7 + 8001ae6: 0a31 lsrs r1, r6, #8 + 8001ae8: f366 0307 bfi r3, r6, #0, #8 + 8001aec: 0c32 lsrs r2, r6, #16 + 8001aee: f361 230f bfi r3, r1, #8, #8 + 8001af2: 0e31 lsrs r1, r6, #24 + 8001af4: f362 4317 bfi r3, r2, #16, #8 + 8001af8: 4632 mov r2, r6 + 8001afa: f361 631f bfi r3, r1, #24, #8 + 8001afe: f845 3008 str.w r3, [r5, r8] + 8001b02: 69a1 ldr r1, [r4, #24] + 8001b04: f008 f932 bl 8009d6c + 8001b08: edd4 7a0a vldr s15, [r4, #40] ; 0x28 + 8001b0c: 19b8 adds r0, r7, r6 + 8001b0e: ee17 2a90 vmov r2, s15 + 8001b12: 182b adds r3, r5, r0 + 8001b14: f3c2 51c7 ubfx r1, r2, #23, #8 + 8001b18: 2900 cmp r1, #0 + 8001b1a: f000 82bc beq.w 8002096 <_ZNK8nav_msgs8Odometry9serializeEPh+0x622> + 8001b1e: f501 7160 add.w r1, r1, #896 ; 0x380 + 8001b22: 010e lsls r6, r1, #4 + 8001b24: 0909 lsrs r1, r1, #4 + 8001b26: b276 sxtb r6, r6 + 8001b28: eef5 7ac0 vcmpe.f32 s15, #0.0 + 8001b2c: f3c2 4cc3 ubfx ip, r2, #19, #4 + 8001b30: 2700 movs r7, #0 + 8001b32: ea4f 1e42 mov.w lr, r2, lsl #5 + 8001b36: ea46 060c orr.w r6, r6, ip + 8001b3a: ea4f 0ce2 mov.w ip, r2, asr #3 + 8001b3e: eef1 fa10 vmrs APSR_nzcv, fpscr + 8001b42: ea4f 22e2 mov.w r2, r2, asr #11 + 8001b46: 542f strb r7, [r5, r0] + 8001b48: 715a strb r2, [r3, #5] + 8001b4a: bf48 it mi + 8001b4c: f061 017f ornmi r1, r1, #127 ; 0x7f + 8001b50: 719e strb r6, [r3, #6] + 8001b52: 705f strb r7, [r3, #1] + 8001b54: 71d9 strb r1, [r3, #7] + 8001b56: 709f strb r7, [r3, #2] + 8001b58: f883 e003 strb.w lr, [r3, #3] + 8001b5c: f883 c004 strb.w ip, [r3, #4] + 8001b60: edd4 7a0b vldr s15, [r4, #44] ; 0x2c + 8001b64: ee17 2a90 vmov r2, s15 + 8001b68: f3c2 51c7 ubfx r1, r2, #23, #8 + 8001b6c: 2900 cmp r1, #0 + 8001b6e: f000 8290 beq.w 8002092 <_ZNK8nav_msgs8Odometry9serializeEPh+0x61e> + 8001b72: f501 7160 add.w r1, r1, #896 ; 0x380 + 8001b76: 010e lsls r6, r1, #4 + 8001b78: 0909 lsrs r1, r1, #4 + 8001b7a: b276 sxtb r6, r6 + 8001b7c: eef5 7ac0 vcmpe.f32 s15, #0.0 + 8001b80: f3c2 4cc3 ubfx ip, r2, #19, #4 + 8001b84: 2700 movs r7, #0 + 8001b86: ea4f 1e42 mov.w lr, r2, lsl #5 + 8001b8a: ea46 060c orr.w r6, r6, ip + 8001b8e: ea4f 0ce2 mov.w ip, r2, asr #3 + 8001b92: eef1 fa10 vmrs APSR_nzcv, fpscr + 8001b96: ea4f 22e2 mov.w r2, r2, asr #11 + 8001b9a: 721f strb r7, [r3, #8] + 8001b9c: 735a strb r2, [r3, #13] + 8001b9e: bf48 it mi + 8001ba0: f061 017f ornmi r1, r1, #127 ; 0x7f + 8001ba4: 739e strb r6, [r3, #14] + 8001ba6: 725f strb r7, [r3, #9] + 8001ba8: 73d9 strb r1, [r3, #15] + 8001baa: 729f strb r7, [r3, #10] + 8001bac: f883 e00b strb.w lr, [r3, #11] + 8001bb0: f883 c00c strb.w ip, [r3, #12] + 8001bb4: edd4 7a0c vldr s15, [r4, #48] ; 0x30 + 8001bb8: ee17 2a90 vmov r2, s15 + 8001bbc: f3c2 51c7 ubfx r1, r2, #23, #8 + 8001bc0: 2900 cmp r1, #0 + 8001bc2: f000 8264 beq.w 800208e <_ZNK8nav_msgs8Odometry9serializeEPh+0x61a> + 8001bc6: f501 7160 add.w r1, r1, #896 ; 0x380 + 8001bca: 010e lsls r6, r1, #4 + 8001bcc: 0909 lsrs r1, r1, #4 + 8001bce: b276 sxtb r6, r6 + 8001bd0: eef5 7ac0 vcmpe.f32 s15, #0.0 + 8001bd4: f3c2 4cc3 ubfx ip, r2, #19, #4 + 8001bd8: 2700 movs r7, #0 + 8001bda: ea4f 1e42 mov.w lr, r2, lsl #5 + 8001bde: ea46 060c orr.w r6, r6, ip + 8001be2: ea4f 0ce2 mov.w ip, r2, asr #3 + 8001be6: eef1 fa10 vmrs APSR_nzcv, fpscr + 8001bea: ea4f 22e2 mov.w r2, r2, asr #11 + 8001bee: 741f strb r7, [r3, #16] + 8001bf0: 755a strb r2, [r3, #21] + 8001bf2: bf48 it mi + 8001bf4: f061 017f ornmi r1, r1, #127 ; 0x7f + 8001bf8: 759e strb r6, [r3, #22] + 8001bfa: 745f strb r7, [r3, #17] + 8001bfc: 75d9 strb r1, [r3, #23] + 8001bfe: 749f strb r7, [r3, #18] + 8001c00: f883 e013 strb.w lr, [r3, #19] + 8001c04: f883 c014 strb.w ip, [r3, #20] + 8001c08: edd4 7a0e vldr s15, [r4, #56] ; 0x38 + 8001c0c: ee17 2a90 vmov r2, s15 + 8001c10: f3c2 51c7 ubfx r1, r2, #23, #8 + 8001c14: 2900 cmp r1, #0 + 8001c16: f000 8238 beq.w 800208a <_ZNK8nav_msgs8Odometry9serializeEPh+0x616> + 8001c1a: f501 7160 add.w r1, r1, #896 ; 0x380 + 8001c1e: 010e lsls r6, r1, #4 + 8001c20: 0909 lsrs r1, r1, #4 + 8001c22: b276 sxtb r6, r6 + 8001c24: eef5 7ac0 vcmpe.f32 s15, #0.0 + 8001c28: f3c2 4cc3 ubfx ip, r2, #19, #4 + 8001c2c: 2700 movs r7, #0 + 8001c2e: ea4f 1e42 mov.w lr, r2, lsl #5 + 8001c32: ea46 060c orr.w r6, r6, ip + 8001c36: ea4f 0ce2 mov.w ip, r2, asr #3 + 8001c3a: eef1 fa10 vmrs APSR_nzcv, fpscr + 8001c3e: ea4f 22e2 mov.w r2, r2, asr #11 + 8001c42: 761f strb r7, [r3, #24] + 8001c44: 775a strb r2, [r3, #29] + 8001c46: bf48 it mi + 8001c48: f061 017f ornmi r1, r1, #127 ; 0x7f + 8001c4c: 779e strb r6, [r3, #30] + 8001c4e: 765f strb r7, [r3, #25] + 8001c50: 77d9 strb r1, [r3, #31] + 8001c52: 769f strb r7, [r3, #26] + 8001c54: f883 e01b strb.w lr, [r3, #27] + 8001c58: f883 c01c strb.w ip, [r3, #28] + 8001c5c: edd4 7a0f vldr s15, [r4, #60] ; 0x3c + 8001c60: ee17 2a90 vmov r2, s15 + 8001c64: f3c2 51c7 ubfx r1, r2, #23, #8 + 8001c68: 2900 cmp r1, #0 + 8001c6a: f000 820c beq.w 8002086 <_ZNK8nav_msgs8Odometry9serializeEPh+0x612> + 8001c6e: f501 7160 add.w r1, r1, #896 ; 0x380 + 8001c72: 010e lsls r6, r1, #4 + 8001c74: 0909 lsrs r1, r1, #4 + 8001c76: b276 sxtb r6, r6 + 8001c78: eef5 7ac0 vcmpe.f32 s15, #0.0 + 8001c7c: f3c2 4cc3 ubfx ip, r2, #19, #4 + 8001c80: 2700 movs r7, #0 + 8001c82: ea4f 1e42 mov.w lr, r2, lsl #5 + 8001c86: ea46 060c orr.w r6, r6, ip + 8001c8a: ea4f 0ce2 mov.w ip, r2, asr #3 + 8001c8e: eef1 fa10 vmrs APSR_nzcv, fpscr + 8001c92: ea4f 22e2 mov.w r2, r2, asr #11 + 8001c96: f883 7020 strb.w r7, [r3, #32] + 8001c9a: f883 2025 strb.w r2, [r3, #37] ; 0x25 + 8001c9e: bf48 it mi + 8001ca0: f061 017f ornmi r1, r1, #127 ; 0x7f + 8001ca4: f883 6026 strb.w r6, [r3, #38] ; 0x26 + 8001ca8: f883 7021 strb.w r7, [r3, #33] ; 0x21 + 8001cac: f883 1027 strb.w r1, [r3, #39] ; 0x27 + 8001cb0: f883 7022 strb.w r7, [r3, #34] ; 0x22 + 8001cb4: f883 e023 strb.w lr, [r3, #35] ; 0x23 + 8001cb8: f883 c024 strb.w ip, [r3, #36] ; 0x24 + 8001cbc: edd4 7a10 vldr s15, [r4, #64] ; 0x40 + 8001cc0: ee17 2a90 vmov r2, s15 + 8001cc4: f3c2 51c7 ubfx r1, r2, #23, #8 + 8001cc8: 2900 cmp r1, #0 + 8001cca: f000 81da beq.w 8002082 <_ZNK8nav_msgs8Odometry9serializeEPh+0x60e> + 8001cce: f501 7160 add.w r1, r1, #896 ; 0x380 + 8001cd2: 010e lsls r6, r1, #4 + 8001cd4: 0909 lsrs r1, r1, #4 + 8001cd6: b276 sxtb r6, r6 + 8001cd8: eef5 7ac0 vcmpe.f32 s15, #0.0 + 8001cdc: f3c2 4cc3 ubfx ip, r2, #19, #4 + 8001ce0: 2700 movs r7, #0 + 8001ce2: ea4f 1e42 mov.w lr, r2, lsl #5 + 8001ce6: ea46 060c orr.w r6, r6, ip + 8001cea: ea4f 0ce2 mov.w ip, r2, asr #3 + 8001cee: eef1 fa10 vmrs APSR_nzcv, fpscr + 8001cf2: ea4f 22e2 mov.w r2, r2, asr #11 + 8001cf6: f883 7028 strb.w r7, [r3, #40] ; 0x28 + 8001cfa: f883 202d strb.w r2, [r3, #45] ; 0x2d + 8001cfe: bf48 it mi + 8001d00: f061 017f ornmi r1, r1, #127 ; 0x7f + 8001d04: f883 602e strb.w r6, [r3, #46] ; 0x2e + 8001d08: f883 7029 strb.w r7, [r3, #41] ; 0x29 + 8001d0c: f883 102f strb.w r1, [r3, #47] ; 0x2f + 8001d10: f883 702a strb.w r7, [r3, #42] ; 0x2a + 8001d14: f883 e02b strb.w lr, [r3, #43] ; 0x2b + 8001d18: f883 c02c strb.w ip, [r3, #44] ; 0x2c + 8001d1c: edd4 7a11 vldr s15, [r4, #68] ; 0x44 + 8001d20: ee17 2a90 vmov r2, s15 + 8001d24: f3c2 51c7 ubfx r1, r2, #23, #8 + 8001d28: 2900 cmp r1, #0 + 8001d2a: f000 81a8 beq.w 800207e <_ZNK8nav_msgs8Odometry9serializeEPh+0x60a> + 8001d2e: f501 7160 add.w r1, r1, #896 ; 0x380 + 8001d32: 010e lsls r6, r1, #4 + 8001d34: 0909 lsrs r1, r1, #4 + 8001d36: b276 sxtb r6, r6 + 8001d38: eef5 7ac0 vcmpe.f32 s15, #0.0 + 8001d3c: f3c2 4cc3 ubfx ip, r2, #19, #4 + 8001d40: 2700 movs r7, #0 + 8001d42: ea4f 1e42 mov.w lr, r2, lsl #5 + 8001d46: ea46 060c orr.w r6, r6, ip + 8001d4a: ea4f 0ce2 mov.w ip, r2, asr #3 + 8001d4e: eef1 fa10 vmrs APSR_nzcv, fpscr + 8001d52: f883 7030 strb.w r7, [r3, #48] ; 0x30 + 8001d56: ea4f 22e2 mov.w r2, r2, asr #11 + 8001d5a: f883 7031 strb.w r7, [r3, #49] ; 0x31 + 8001d5e: f883 7032 strb.w r7, [r3, #50] ; 0x32 + 8001d62: f04f 0700 mov.w r7, #0 + 8001d66: f883 e033 strb.w lr, [r3, #51] ; 0x33 + 8001d6a: bf48 it mi + 8001d6c: f061 017f ornmi r1, r1, #127 ; 0x7f + 8001d70: f883 c034 strb.w ip, [r3, #52] ; 0x34 + 8001d74: f104 0ed8 add.w lr, r4, #216 ; 0xd8 + 8001d78: f104 0c48 add.w ip, r4, #72 ; 0x48 + 8001d7c: f883 6036 strb.w r6, [r3, #54] ; 0x36 + 8001d80: f883 2035 strb.w r2, [r3, #53] ; 0x35 + 8001d84: f883 1037 strb.w r1, [r3, #55] ; 0x37 + 8001d88: ecfc 7a01 vldmia ip!, {s15} + 8001d8c: ee17 2a90 vmov r2, s15 + 8001d90: f3c2 51c7 ubfx r1, r2, #23, #8 + 8001d94: 460e mov r6, r1 + 8001d96: f501 7860 add.w r8, r1, #896 ; 0x380 + 8001d9a: b121 cbz r1, 8001da6 <_ZNK8nav_msgs8Odometry9serializeEPh+0x332> + 8001d9c: ea4f 1108 mov.w r1, r8, lsl #4 + 8001da0: ea4f 1618 mov.w r6, r8, lsr #4 + 8001da4: b249 sxtb r1, r1 + 8001da6: eef5 7ac0 vcmpe.f32 s15, #0.0 + 8001daa: f3c2 4ac3 ubfx sl, r2, #19, #4 + 8001dae: ea4f 1942 mov.w r9, r2, lsl #5 + 8001db2: f883 7038 strb.w r7, [r3, #56] ; 0x38 + 8001db6: ea4f 08e2 mov.w r8, r2, asr #3 + 8001dba: ea41 010a orr.w r1, r1, sl + 8001dbe: eef1 fa10 vmrs APSR_nzcv, fpscr + 8001dc2: ea4f 22e2 mov.w r2, r2, asr #11 + 8001dc6: f883 7039 strb.w r7, [r3, #57] ; 0x39 + 8001dca: f103 0308 add.w r3, r3, #8 + 8001dce: f883 7032 strb.w r7, [r3, #50] ; 0x32 + 8001dd2: bf48 it mi + 8001dd4: f066 067f ornmi r6, r6, #127 ; 0x7f + 8001dd8: 45e6 cmp lr, ip + 8001dda: f883 1036 strb.w r1, [r3, #54] ; 0x36 + 8001dde: f883 9033 strb.w r9, [r3, #51] ; 0x33 + 8001de2: f883 8034 strb.w r8, [r3, #52] ; 0x34 + 8001de6: f883 2035 strb.w r2, [r3, #53] ; 0x35 + 8001dea: f883 6037 strb.w r6, [r3, #55] ; 0x37 + 8001dee: d1cb bne.n 8001d88 <_ZNK8nav_msgs8Odometry9serializeEPh+0x314> + 8001df0: edd4 7a39 vldr s15, [r4, #228] ; 0xe4 + 8001df4: f500 7cac add.w ip, r0, #344 ; 0x158 + 8001df8: ee17 2a90 vmov r2, s15 + 8001dfc: eb05 030c add.w r3, r5, ip + 8001e00: f3c2 56c7 ubfx r6, r2, #23, #8 + 8001e04: 2e00 cmp r6, #0 + 8001e06: f000 8138 beq.w 800207a <_ZNK8nav_msgs8Odometry9serializeEPh+0x606> + 8001e0a: f506 7660 add.w r6, r6, #896 ; 0x380 + 8001e0e: 0131 lsls r1, r6, #4 + 8001e10: 0936 lsrs r6, r6, #4 + 8001e12: b249 sxtb r1, r1 + 8001e14: eef5 7ac0 vcmpe.f32 s15, #0.0 + 8001e18: f3c2 4ec3 ubfx lr, r2, #19, #4 + 8001e1c: 2700 movs r7, #0 + 8001e1e: ea41 010e orr.w r1, r1, lr + 8001e22: ea4f 1e42 mov.w lr, r2, lsl #5 + 8001e26: eef1 fa10 vmrs APSR_nzcv, fpscr + 8001e2a: f805 700c strb.w r7, [r5, ip] + 8001e2e: ea4f 05e2 mov.w r5, r2, asr #3 + 8001e32: 7199 strb r1, [r3, #6] + 8001e34: ea4f 22e2 mov.w r2, r2, asr #11 + 8001e38: 705f strb r7, [r3, #1] + 8001e3a: 709f strb r7, [r3, #2] + 8001e3c: f883 e003 strb.w lr, [r3, #3] + 8001e40: 711d strb r5, [r3, #4] + 8001e42: 715a strb r2, [r3, #5] + 8001e44: f100 8129 bmi.w 800209a <_ZNK8nav_msgs8Odometry9serializeEPh+0x626> + 8001e48: 71de strb r6, [r3, #7] + 8001e4a: edd4 7a3a vldr s15, [r4, #232] ; 0xe8 + 8001e4e: ee17 2a90 vmov r2, s15 + 8001e52: f3c2 51c7 ubfx r1, r2, #23, #8 + 8001e56: 2900 cmp r1, #0 + 8001e58: f000 810d beq.w 8002076 <_ZNK8nav_msgs8Odometry9serializeEPh+0x602> + 8001e5c: f501 7160 add.w r1, r1, #896 ; 0x380 + 8001e60: 010d lsls r5, r1, #4 + 8001e62: 0909 lsrs r1, r1, #4 + 8001e64: b26d sxtb r5, r5 + 8001e66: eef5 7ac0 vcmpe.f32 s15, #0.0 + 8001e6a: f3c2 47c3 ubfx r7, r2, #19, #4 + 8001e6e: 2600 movs r6, #0 + 8001e70: ea4f 1c42 mov.w ip, r2, lsl #5 + 8001e74: 433d orrs r5, r7 + 8001e76: 10d7 asrs r7, r2, #3 + 8001e78: eef1 fa10 vmrs APSR_nzcv, fpscr + 8001e7c: ea4f 22e2 mov.w r2, r2, asr #11 + 8001e80: 721e strb r6, [r3, #8] + 8001e82: 735a strb r2, [r3, #13] + 8001e84: bf48 it mi + 8001e86: f061 017f ornmi r1, r1, #127 ; 0x7f + 8001e8a: 739d strb r5, [r3, #14] + 8001e8c: 725e strb r6, [r3, #9] + 8001e8e: 73d9 strb r1, [r3, #15] + 8001e90: 729e strb r6, [r3, #10] + 8001e92: f883 c00b strb.w ip, [r3, #11] + 8001e96: 731f strb r7, [r3, #12] + 8001e98: edd4 7a3b vldr s15, [r4, #236] ; 0xec + 8001e9c: ee17 2a90 vmov r2, s15 + 8001ea0: f3c2 51c7 ubfx r1, r2, #23, #8 + 8001ea4: 2900 cmp r1, #0 + 8001ea6: f000 80e4 beq.w 8002072 <_ZNK8nav_msgs8Odometry9serializeEPh+0x5fe> + 8001eaa: f501 7160 add.w r1, r1, #896 ; 0x380 + 8001eae: 010d lsls r5, r1, #4 + 8001eb0: 0909 lsrs r1, r1, #4 + 8001eb2: b26d sxtb r5, r5 + 8001eb4: eef5 7ac0 vcmpe.f32 s15, #0.0 + 8001eb8: f3c2 47c3 ubfx r7, r2, #19, #4 + 8001ebc: 2600 movs r6, #0 + 8001ebe: ea4f 1c42 mov.w ip, r2, lsl #5 + 8001ec2: 433d orrs r5, r7 + 8001ec4: 10d7 asrs r7, r2, #3 + 8001ec6: eef1 fa10 vmrs APSR_nzcv, fpscr + 8001eca: ea4f 22e2 mov.w r2, r2, asr #11 + 8001ece: 741e strb r6, [r3, #16] + 8001ed0: 755a strb r2, [r3, #21] + 8001ed2: bf48 it mi + 8001ed4: f061 017f ornmi r1, r1, #127 ; 0x7f + 8001ed8: 759d strb r5, [r3, #22] + 8001eda: 745e strb r6, [r3, #17] + 8001edc: 75d9 strb r1, [r3, #23] + 8001ede: 749e strb r6, [r3, #18] + 8001ee0: f883 c013 strb.w ip, [r3, #19] + 8001ee4: 751f strb r7, [r3, #20] + 8001ee6: edd4 7a3d vldr s15, [r4, #244] ; 0xf4 + 8001eea: ee17 2a90 vmov r2, s15 + 8001eee: f3c2 51c7 ubfx r1, r2, #23, #8 + 8001ef2: 2900 cmp r1, #0 + 8001ef4: f000 80bb beq.w 800206e <_ZNK8nav_msgs8Odometry9serializeEPh+0x5fa> + 8001ef8: f501 7160 add.w r1, r1, #896 ; 0x380 + 8001efc: 010d lsls r5, r1, #4 + 8001efe: 0909 lsrs r1, r1, #4 + 8001f00: b26d sxtb r5, r5 + 8001f02: eef5 7ac0 vcmpe.f32 s15, #0.0 + 8001f06: f3c2 47c3 ubfx r7, r2, #19, #4 + 8001f0a: 2600 movs r6, #0 + 8001f0c: ea4f 1c42 mov.w ip, r2, lsl #5 + 8001f10: 433d orrs r5, r7 + 8001f12: 10d7 asrs r7, r2, #3 + 8001f14: eef1 fa10 vmrs APSR_nzcv, fpscr + 8001f18: ea4f 22e2 mov.w r2, r2, asr #11 + 8001f1c: 761e strb r6, [r3, #24] + 8001f1e: 775a strb r2, [r3, #29] + 8001f20: bf48 it mi + 8001f22: f061 017f ornmi r1, r1, #127 ; 0x7f + 8001f26: 779d strb r5, [r3, #30] + 8001f28: 765e strb r6, [r3, #25] + 8001f2a: 77d9 strb r1, [r3, #31] + 8001f2c: 769e strb r6, [r3, #26] + 8001f2e: f883 c01b strb.w ip, [r3, #27] + 8001f32: 771f strb r7, [r3, #28] + 8001f34: edd4 7a3e vldr s15, [r4, #248] ; 0xf8 + 8001f38: ee17 2a90 vmov r2, s15 + 8001f3c: f3c2 51c7 ubfx r1, r2, #23, #8 + 8001f40: 2900 cmp r1, #0 + 8001f42: f000 8092 beq.w 800206a <_ZNK8nav_msgs8Odometry9serializeEPh+0x5f6> + 8001f46: f501 7160 add.w r1, r1, #896 ; 0x380 + 8001f4a: 010d lsls r5, r1, #4 + 8001f4c: 0909 lsrs r1, r1, #4 + 8001f4e: b26d sxtb r5, r5 + 8001f50: eef5 7ac0 vcmpe.f32 s15, #0.0 + 8001f54: f3c2 47c3 ubfx r7, r2, #19, #4 + 8001f58: 2600 movs r6, #0 + 8001f5a: ea4f 1c42 mov.w ip, r2, lsl #5 + 8001f5e: 433d orrs r5, r7 + 8001f60: 10d7 asrs r7, r2, #3 + 8001f62: eef1 fa10 vmrs APSR_nzcv, fpscr + 8001f66: ea4f 22e2 mov.w r2, r2, asr #11 + 8001f6a: f883 6020 strb.w r6, [r3, #32] + 8001f6e: f883 2025 strb.w r2, [r3, #37] ; 0x25 + 8001f72: bf48 it mi + 8001f74: f061 017f ornmi r1, r1, #127 ; 0x7f + 8001f78: f883 5026 strb.w r5, [r3, #38] ; 0x26 + 8001f7c: f883 6021 strb.w r6, [r3, #33] ; 0x21 + 8001f80: f883 1027 strb.w r1, [r3, #39] ; 0x27 + 8001f84: f883 6022 strb.w r6, [r3, #34] ; 0x22 + 8001f88: f883 c023 strb.w ip, [r3, #35] ; 0x23 + 8001f8c: f883 7024 strb.w r7, [r3, #36] ; 0x24 + 8001f90: edd4 7a3f vldr s15, [r4, #252] ; 0xfc + 8001f94: ee17 2a90 vmov r2, s15 + 8001f98: f3c2 51c7 ubfx r1, r2, #23, #8 + 8001f9c: 2900 cmp r1, #0 + 8001f9e: d062 beq.n 8002066 <_ZNK8nav_msgs8Odometry9serializeEPh+0x5f2> + 8001fa0: f501 7160 add.w r1, r1, #896 ; 0x380 + 8001fa4: 010d lsls r5, r1, #4 + 8001fa6: 0909 lsrs r1, r1, #4 + 8001fa8: b26d sxtb r5, r5 + 8001faa: eef5 7ac0 vcmpe.f32 s15, #0.0 + 8001fae: f3c2 47c3 ubfx r7, r2, #19, #4 + 8001fb2: 2600 movs r6, #0 + 8001fb4: ea4f 1c42 mov.w ip, r2, lsl #5 + 8001fb8: 433d orrs r5, r7 + 8001fba: 10d7 asrs r7, r2, #3 + 8001fbc: eef1 fa10 vmrs APSR_nzcv, fpscr + 8001fc0: f883 6028 strb.w r6, [r3, #40] ; 0x28 + 8001fc4: ea4f 22e2 mov.w r2, r2, asr #11 + 8001fc8: f883 6029 strb.w r6, [r3, #41] ; 0x29 + 8001fcc: f883 602a strb.w r6, [r3, #42] ; 0x2a + 8001fd0: f04f 0600 mov.w r6, #0 + 8001fd4: f883 702c strb.w r7, [r3, #44] ; 0x2c + 8001fd8: bf48 it mi + 8001fda: f061 017f ornmi r1, r1, #127 ; 0x7f + 8001fde: f504 7780 add.w r7, r4, #256 ; 0x100 + 8001fe2: f504 74c8 add.w r4, r4, #400 ; 0x190 + 8001fe6: f883 502e strb.w r5, [r3, #46] ; 0x2e + 8001fea: f883 c02b strb.w ip, [r3, #43] ; 0x2b + 8001fee: f883 202d strb.w r2, [r3, #45] ; 0x2d + 8001ff2: f883 102f strb.w r1, [r3, #47] ; 0x2f + 8001ff6: ecf7 7a01 vldmia r7!, {s15} + 8001ffa: ee17 2a90 vmov r2, s15 + 8001ffe: f3c2 51c7 ubfx r1, r2, #23, #8 + 8002002: 460d mov r5, r1 + 8002004: f501 7c60 add.w ip, r1, #896 ; 0x380 + 8002008: b121 cbz r1, 8002014 <_ZNK8nav_msgs8Odometry9serializeEPh+0x5a0> + 800200a: ea4f 110c mov.w r1, ip, lsl #4 + 800200e: ea4f 151c mov.w r5, ip, lsr #4 + 8002012: b249 sxtb r1, r1 + 8002014: eef5 7ac0 vcmpe.f32 s15, #0.0 + 8002018: f3c2 48c3 ubfx r8, r2, #19, #4 + 800201c: ea4f 1e42 mov.w lr, r2, lsl #5 + 8002020: f883 6030 strb.w r6, [r3, #48] ; 0x30 + 8002024: ea4f 0ce2 mov.w ip, r2, asr #3 + 8002028: ea41 0108 orr.w r1, r1, r8 + 800202c: eef1 fa10 vmrs APSR_nzcv, fpscr + 8002030: ea4f 22e2 mov.w r2, r2, asr #11 + 8002034: f883 6031 strb.w r6, [r3, #49] ; 0x31 + 8002038: f103 0308 add.w r3, r3, #8 + 800203c: f883 602a strb.w r6, [r3, #42] ; 0x2a + 8002040: bf48 it mi + 8002042: f065 057f ornmi r5, r5, #127 ; 0x7f + 8002046: 42bc cmp r4, r7 + 8002048: f883 102e strb.w r1, [r3, #46] ; 0x2e + 800204c: f883 e02b strb.w lr, [r3, #43] ; 0x2b + 8002050: f883 c02c strb.w ip, [r3, #44] ; 0x2c + 8002054: f883 202d strb.w r2, [r3, #45] ; 0x2d + 8002058: f883 502f strb.w r5, [r3, #47] ; 0x2f + 800205c: d1cb bne.n 8001ff6 <_ZNK8nav_msgs8Odometry9serializeEPh+0x582> + 800205e: f500 702a add.w r0, r0, #680 ; 0x2a8 + 8002062: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} + 8002066: 460d mov r5, r1 + 8002068: e79f b.n 8001faa <_ZNK8nav_msgs8Odometry9serializeEPh+0x536> + 800206a: 460d mov r5, r1 + 800206c: e770 b.n 8001f50 <_ZNK8nav_msgs8Odometry9serializeEPh+0x4dc> + 800206e: 460d mov r5, r1 + 8002070: e747 b.n 8001f02 <_ZNK8nav_msgs8Odometry9serializeEPh+0x48e> + 8002072: 460d mov r5, r1 + 8002074: e71e b.n 8001eb4 <_ZNK8nav_msgs8Odometry9serializeEPh+0x440> + 8002076: 460d mov r5, r1 + 8002078: e6f5 b.n 8001e66 <_ZNK8nav_msgs8Odometry9serializeEPh+0x3f2> + 800207a: 4631 mov r1, r6 + 800207c: e6ca b.n 8001e14 <_ZNK8nav_msgs8Odometry9serializeEPh+0x3a0> + 800207e: 460e mov r6, r1 + 8002080: e65a b.n 8001d38 <_ZNK8nav_msgs8Odometry9serializeEPh+0x2c4> + 8002082: 460e mov r6, r1 + 8002084: e628 b.n 8001cd8 <_ZNK8nav_msgs8Odometry9serializeEPh+0x264> + 8002086: 460e mov r6, r1 + 8002088: e5f6 b.n 8001c78 <_ZNK8nav_msgs8Odometry9serializeEPh+0x204> + 800208a: 460e mov r6, r1 + 800208c: e5ca b.n 8001c24 <_ZNK8nav_msgs8Odometry9serializeEPh+0x1b0> + 800208e: 460e mov r6, r1 + 8002090: e59e b.n 8001bd0 <_ZNK8nav_msgs8Odometry9serializeEPh+0x15c> + 8002092: 460e mov r6, r1 + 8002094: e572 b.n 8001b7c <_ZNK8nav_msgs8Odometry9serializeEPh+0x108> + 8002096: 460e mov r6, r1 + 8002098: e546 b.n 8001b28 <_ZNK8nav_msgs8Odometry9serializeEPh+0xb4> + 800209a: f066 017f orn r1, r6, #127 ; 0x7f + 800209e: 71d9 strb r1, [r3, #7] + 80020a0: e6d3 b.n 8001e4a <_ZNK8nav_msgs8Odometry9serializeEPh+0x3d6> + 80020a2: bf00 nop + +080020a4 <_ZN13geometry_msgs5Twist11deserializeEPh>: + 80020a4: b430 push {r4, r5} + 80020a6: 78ca ldrb r2, [r1, #3] + 80020a8: 4603 mov r3, r0 + 80020aa: 0952 lsrs r2, r2, #5 + 80020ac: 6082 str r2, [r0, #8] + 80020ae: 7908 ldrb r0, [r1, #4] + 80020b0: ea42 02c0 orr.w r2, r2, r0, lsl #3 + 80020b4: 609a str r2, [r3, #8] + 80020b6: 7948 ldrb r0, [r1, #5] + 80020b8: ea42 22c0 orr.w r2, r2, r0, lsl #11 + 80020bc: 609a str r2, [r3, #8] + 80020be: 7988 ldrb r0, [r1, #6] + 80020c0: 04c0 lsls r0, r0, #19 + 80020c2: f400 00f0 and.w r0, r0, #7864320 ; 0x780000 + 80020c6: 4302 orrs r2, r0 + 80020c8: 609a str r2, [r3, #8] + 80020ca: 79c8 ldrb r0, [r1, #7] + 80020cc: 798d ldrb r5, [r1, #6] + 80020ce: 0104 lsls r4, r0, #4 + 80020d0: f404 64fe and.w r4, r4, #2032 ; 0x7f0 + 80020d4: ea54 1415 orrs.w r4, r4, r5, lsr #4 + 80020d8: d005 beq.n 80020e6 <_ZN13geometry_msgs5Twist11deserializeEPh+0x42> + 80020da: f5a4 7460 sub.w r4, r4, #896 ; 0x380 + 80020de: ea42 52c4 orr.w r2, r2, r4, lsl #23 + 80020e2: 609a str r2, [r3, #8] + 80020e4: 79c8 ldrb r0, [r1, #7] + 80020e6: 0600 lsls r0, r0, #24 + 80020e8: f000 4000 and.w r0, r0, #2147483648 ; 0x80000000 + 80020ec: 4302 orrs r2, r0 + 80020ee: 609a str r2, [r3, #8] + 80020f0: 7aca ldrb r2, [r1, #11] + 80020f2: 0952 lsrs r2, r2, #5 + 80020f4: 60da str r2, [r3, #12] + 80020f6: 7b08 ldrb r0, [r1, #12] + 80020f8: ea42 02c0 orr.w r2, r2, r0, lsl #3 + 80020fc: 60da str r2, [r3, #12] + 80020fe: 7b48 ldrb r0, [r1, #13] + 8002100: ea42 22c0 orr.w r2, r2, r0, lsl #11 + 8002104: 60da str r2, [r3, #12] + 8002106: 7b88 ldrb r0, [r1, #14] + 8002108: 04c0 lsls r0, r0, #19 + 800210a: f400 00f0 and.w r0, r0, #7864320 ; 0x780000 + 800210e: 4302 orrs r2, r0 + 8002110: 60da str r2, [r3, #12] + 8002112: 7bc8 ldrb r0, [r1, #15] + 8002114: 7b8d ldrb r5, [r1, #14] + 8002116: 0104 lsls r4, r0, #4 + 8002118: f404 64fe and.w r4, r4, #2032 ; 0x7f0 + 800211c: ea54 1415 orrs.w r4, r4, r5, lsr #4 + 8002120: d005 beq.n 800212e <_ZN13geometry_msgs5Twist11deserializeEPh+0x8a> + 8002122: f5a4 7460 sub.w r4, r4, #896 ; 0x380 + 8002126: ea42 52c4 orr.w r2, r2, r4, lsl #23 + 800212a: 60da str r2, [r3, #12] + 800212c: 7bc8 ldrb r0, [r1, #15] + 800212e: 0600 lsls r0, r0, #24 + 8002130: f000 4000 and.w r0, r0, #2147483648 ; 0x80000000 + 8002134: 4302 orrs r2, r0 + 8002136: 60da str r2, [r3, #12] + 8002138: 7cca ldrb r2, [r1, #19] + 800213a: 0952 lsrs r2, r2, #5 + 800213c: 611a str r2, [r3, #16] + 800213e: 7d08 ldrb r0, [r1, #20] + 8002140: ea42 02c0 orr.w r2, r2, r0, lsl #3 + 8002144: 611a str r2, [r3, #16] + 8002146: 7d48 ldrb r0, [r1, #21] + 8002148: ea42 22c0 orr.w r2, r2, r0, lsl #11 + 800214c: 611a str r2, [r3, #16] + 800214e: 7d88 ldrb r0, [r1, #22] + 8002150: 04c0 lsls r0, r0, #19 + 8002152: f400 00f0 and.w r0, r0, #7864320 ; 0x780000 + 8002156: 4302 orrs r2, r0 + 8002158: 611a str r2, [r3, #16] + 800215a: 7dc8 ldrb r0, [r1, #23] + 800215c: 7d8d ldrb r5, [r1, #22] + 800215e: 0104 lsls r4, r0, #4 + 8002160: f404 64fe and.w r4, r4, #2032 ; 0x7f0 + 8002164: ea54 1415 orrs.w r4, r4, r5, lsr #4 + 8002168: d005 beq.n 8002176 <_ZN13geometry_msgs5Twist11deserializeEPh+0xd2> + 800216a: f5a4 7460 sub.w r4, r4, #896 ; 0x380 + 800216e: ea42 52c4 orr.w r2, r2, r4, lsl #23 + 8002172: 611a str r2, [r3, #16] + 8002174: 7dc8 ldrb r0, [r1, #23] + 8002176: 0600 lsls r0, r0, #24 + 8002178: f000 4000 and.w r0, r0, #2147483648 ; 0x80000000 + 800217c: 4302 orrs r2, r0 + 800217e: 611a str r2, [r3, #16] + 8002180: 7eca ldrb r2, [r1, #27] + 8002182: 0952 lsrs r2, r2, #5 + 8002184: 619a str r2, [r3, #24] + 8002186: 7f08 ldrb r0, [r1, #28] + 8002188: ea42 02c0 orr.w r2, r2, r0, lsl #3 + 800218c: 619a str r2, [r3, #24] + 800218e: 7f48 ldrb r0, [r1, #29] + 8002190: ea42 22c0 orr.w r2, r2, r0, lsl #11 + 8002194: 619a str r2, [r3, #24] + 8002196: 7f88 ldrb r0, [r1, #30] + 8002198: 04c0 lsls r0, r0, #19 + 800219a: f400 00f0 and.w r0, r0, #7864320 ; 0x780000 + 800219e: 4302 orrs r2, r0 + 80021a0: 619a str r2, [r3, #24] + 80021a2: 7fc8 ldrb r0, [r1, #31] + 80021a4: 7f8d ldrb r5, [r1, #30] + 80021a6: 0104 lsls r4, r0, #4 + 80021a8: f404 64fe and.w r4, r4, #2032 ; 0x7f0 + 80021ac: ea54 1415 orrs.w r4, r4, r5, lsr #4 + 80021b0: d005 beq.n 80021be <_ZN13geometry_msgs5Twist11deserializeEPh+0x11a> + 80021b2: f5a4 7460 sub.w r4, r4, #896 ; 0x380 + 80021b6: ea42 52c4 orr.w r2, r2, r4, lsl #23 + 80021ba: 619a str r2, [r3, #24] + 80021bc: 7fc8 ldrb r0, [r1, #31] + 80021be: 0600 lsls r0, r0, #24 + 80021c0: f000 4000 and.w r0, r0, #2147483648 ; 0x80000000 + 80021c4: 4302 orrs r2, r0 + 80021c6: 619a str r2, [r3, #24] + 80021c8: f891 2023 ldrb.w r2, [r1, #35] ; 0x23 + 80021cc: 0952 lsrs r2, r2, #5 + 80021ce: 61da str r2, [r3, #28] + 80021d0: f891 0024 ldrb.w r0, [r1, #36] ; 0x24 + 80021d4: ea42 02c0 orr.w r2, r2, r0, lsl #3 + 80021d8: 61da str r2, [r3, #28] + 80021da: f891 0025 ldrb.w r0, [r1, #37] ; 0x25 + 80021de: ea42 22c0 orr.w r2, r2, r0, lsl #11 + 80021e2: 61da str r2, [r3, #28] + 80021e4: f891 0026 ldrb.w r0, [r1, #38] ; 0x26 + 80021e8: 04c0 lsls r0, r0, #19 + 80021ea: f400 00f0 and.w r0, r0, #7864320 ; 0x780000 + 80021ee: 4302 orrs r2, r0 + 80021f0: 61da str r2, [r3, #28] + 80021f2: f891 0027 ldrb.w r0, [r1, #39] ; 0x27 + 80021f6: f891 5026 ldrb.w r5, [r1, #38] ; 0x26 + 80021fa: 0104 lsls r4, r0, #4 + 80021fc: f404 64fe and.w r4, r4, #2032 ; 0x7f0 + 8002200: ea54 1415 orrs.w r4, r4, r5, lsr #4 + 8002204: d006 beq.n 8002214 <_ZN13geometry_msgs5Twist11deserializeEPh+0x170> + 8002206: f5a4 7460 sub.w r4, r4, #896 ; 0x380 + 800220a: ea42 52c4 orr.w r2, r2, r4, lsl #23 + 800220e: 61da str r2, [r3, #28] + 8002210: f891 0027 ldrb.w r0, [r1, #39] ; 0x27 + 8002214: 0600 lsls r0, r0, #24 + 8002216: f000 4000 and.w r0, r0, #2147483648 ; 0x80000000 + 800221a: 4302 orrs r2, r0 + 800221c: 61da str r2, [r3, #28] + 800221e: f891 202b ldrb.w r2, [r1, #43] ; 0x2b + 8002222: 0952 lsrs r2, r2, #5 + 8002224: 621a str r2, [r3, #32] + 8002226: f891 002c ldrb.w r0, [r1, #44] ; 0x2c + 800222a: ea42 02c0 orr.w r2, r2, r0, lsl #3 + 800222e: 621a str r2, [r3, #32] + 8002230: f891 002d ldrb.w r0, [r1, #45] ; 0x2d + 8002234: ea42 22c0 orr.w r2, r2, r0, lsl #11 + 8002238: 621a str r2, [r3, #32] + 800223a: f891 002e ldrb.w r0, [r1, #46] ; 0x2e + 800223e: 04c0 lsls r0, r0, #19 + 8002240: f400 00f0 and.w r0, r0, #7864320 ; 0x780000 + 8002244: 4302 orrs r2, r0 + 8002246: 621a str r2, [r3, #32] + 8002248: f891 002f ldrb.w r0, [r1, #47] ; 0x2f + 800224c: f891 502e ldrb.w r5, [r1, #46] ; 0x2e + 8002250: 0104 lsls r4, r0, #4 + 8002252: f404 64fe and.w r4, r4, #2032 ; 0x7f0 + 8002256: ea54 1415 orrs.w r4, r4, r5, lsr #4 + 800225a: d006 beq.n 800226a <_ZN13geometry_msgs5Twist11deserializeEPh+0x1c6> + 800225c: f5a4 7460 sub.w r4, r4, #896 ; 0x380 + 8002260: ea42 52c4 orr.w r2, r2, r4, lsl #23 + 8002264: 621a str r2, [r3, #32] + 8002266: f891 002f ldrb.w r0, [r1, #47] ; 0x2f + 800226a: 0601 lsls r1, r0, #24 + 800226c: 2030 movs r0, #48 ; 0x30 + 800226e: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000 + 8002272: 430a orrs r2, r1 + 8002274: bc30 pop {r4, r5} + 8002276: 621a str r2, [r3, #32] + 8002278: 4770 bx lr + 800227a: bf00 nop + +0800227c <_ZN13geometry_msgs4Pose11deserializeEPh>: + 800227c: b430 push {r4, r5} + 800227e: 78ca ldrb r2, [r1, #3] + 8002280: 4603 mov r3, r0 + 8002282: 0952 lsrs r2, r2, #5 + 8002284: 6082 str r2, [r0, #8] + 8002286: 7908 ldrb r0, [r1, #4] + 8002288: ea42 02c0 orr.w r2, r2, r0, lsl #3 + 800228c: 609a str r2, [r3, #8] + 800228e: 7948 ldrb r0, [r1, #5] + 8002290: ea42 22c0 orr.w r2, r2, r0, lsl #11 + 8002294: 609a str r2, [r3, #8] + 8002296: 7988 ldrb r0, [r1, #6] + 8002298: 04c0 lsls r0, r0, #19 + 800229a: f400 00f0 and.w r0, r0, #7864320 ; 0x780000 + 800229e: 4302 orrs r2, r0 + 80022a0: 609a str r2, [r3, #8] + 80022a2: 79c8 ldrb r0, [r1, #7] + 80022a4: 798d ldrb r5, [r1, #6] + 80022a6: 0104 lsls r4, r0, #4 + 80022a8: f404 64fe and.w r4, r4, #2032 ; 0x7f0 + 80022ac: ea54 1415 orrs.w r4, r4, r5, lsr #4 + 80022b0: d005 beq.n 80022be <_ZN13geometry_msgs4Pose11deserializeEPh+0x42> + 80022b2: f5a4 7460 sub.w r4, r4, #896 ; 0x380 + 80022b6: ea42 52c4 orr.w r2, r2, r4, lsl #23 + 80022ba: 609a str r2, [r3, #8] + 80022bc: 79c8 ldrb r0, [r1, #7] + 80022be: 0600 lsls r0, r0, #24 + 80022c0: f000 4000 and.w r0, r0, #2147483648 ; 0x80000000 + 80022c4: 4302 orrs r2, r0 + 80022c6: 609a str r2, [r3, #8] + 80022c8: 7aca ldrb r2, [r1, #11] + 80022ca: 0952 lsrs r2, r2, #5 + 80022cc: 60da str r2, [r3, #12] + 80022ce: 7b08 ldrb r0, [r1, #12] + 80022d0: ea42 02c0 orr.w r2, r2, r0, lsl #3 + 80022d4: 60da str r2, [r3, #12] + 80022d6: 7b48 ldrb r0, [r1, #13] + 80022d8: ea42 22c0 orr.w r2, r2, r0, lsl #11 + 80022dc: 60da str r2, [r3, #12] + 80022de: 7b88 ldrb r0, [r1, #14] + 80022e0: 04c0 lsls r0, r0, #19 + 80022e2: f400 00f0 and.w r0, r0, #7864320 ; 0x780000 + 80022e6: 4302 orrs r2, r0 + 80022e8: 60da str r2, [r3, #12] + 80022ea: 7bc8 ldrb r0, [r1, #15] + 80022ec: 7b8d ldrb r5, [r1, #14] + 80022ee: 0104 lsls r4, r0, #4 + 80022f0: f404 64fe and.w r4, r4, #2032 ; 0x7f0 + 80022f4: ea54 1415 orrs.w r4, r4, r5, lsr #4 + 80022f8: d005 beq.n 8002306 <_ZN13geometry_msgs4Pose11deserializeEPh+0x8a> + 80022fa: f5a4 7460 sub.w r4, r4, #896 ; 0x380 + 80022fe: ea42 52c4 orr.w r2, r2, r4, lsl #23 + 8002302: 60da str r2, [r3, #12] + 8002304: 7bc8 ldrb r0, [r1, #15] + 8002306: 0600 lsls r0, r0, #24 + 8002308: f000 4000 and.w r0, r0, #2147483648 ; 0x80000000 + 800230c: 4302 orrs r2, r0 + 800230e: 60da str r2, [r3, #12] + 8002310: 7cca ldrb r2, [r1, #19] + 8002312: 0952 lsrs r2, r2, #5 + 8002314: 611a str r2, [r3, #16] + 8002316: 7d08 ldrb r0, [r1, #20] + 8002318: ea42 02c0 orr.w r2, r2, r0, lsl #3 + 800231c: 611a str r2, [r3, #16] + 800231e: 7d48 ldrb r0, [r1, #21] + 8002320: ea42 22c0 orr.w r2, r2, r0, lsl #11 + 8002324: 611a str r2, [r3, #16] + 8002326: 7d88 ldrb r0, [r1, #22] + 8002328: 04c0 lsls r0, r0, #19 + 800232a: f400 00f0 and.w r0, r0, #7864320 ; 0x780000 + 800232e: 4302 orrs r2, r0 + 8002330: 611a str r2, [r3, #16] + 8002332: 7dc8 ldrb r0, [r1, #23] + 8002334: 7d8d ldrb r5, [r1, #22] + 8002336: 0104 lsls r4, r0, #4 + 8002338: f404 64fe and.w r4, r4, #2032 ; 0x7f0 + 800233c: ea54 1415 orrs.w r4, r4, r5, lsr #4 + 8002340: d005 beq.n 800234e <_ZN13geometry_msgs4Pose11deserializeEPh+0xd2> + 8002342: f5a4 7460 sub.w r4, r4, #896 ; 0x380 + 8002346: ea42 52c4 orr.w r2, r2, r4, lsl #23 + 800234a: 611a str r2, [r3, #16] + 800234c: 7dc8 ldrb r0, [r1, #23] + 800234e: 0600 lsls r0, r0, #24 + 8002350: f000 4000 and.w r0, r0, #2147483648 ; 0x80000000 + 8002354: 4302 orrs r2, r0 + 8002356: 611a str r2, [r3, #16] + 8002358: 7eca ldrb r2, [r1, #27] + 800235a: 0952 lsrs r2, r2, #5 + 800235c: 619a str r2, [r3, #24] + 800235e: 7f08 ldrb r0, [r1, #28] + 8002360: ea42 02c0 orr.w r2, r2, r0, lsl #3 + 8002364: 619a str r2, [r3, #24] + 8002366: 7f48 ldrb r0, [r1, #29] + 8002368: ea42 22c0 orr.w r2, r2, r0, lsl #11 + 800236c: 619a str r2, [r3, #24] + 800236e: 7f88 ldrb r0, [r1, #30] + 8002370: 04c0 lsls r0, r0, #19 + 8002372: f400 00f0 and.w r0, r0, #7864320 ; 0x780000 + 8002376: 4302 orrs r2, r0 + 8002378: 619a str r2, [r3, #24] + 800237a: 7fc8 ldrb r0, [r1, #31] + 800237c: 7f8d ldrb r5, [r1, #30] + 800237e: 0104 lsls r4, r0, #4 + 8002380: f404 64fe and.w r4, r4, #2032 ; 0x7f0 + 8002384: ea54 1415 orrs.w r4, r4, r5, lsr #4 + 8002388: d005 beq.n 8002396 <_ZN13geometry_msgs4Pose11deserializeEPh+0x11a> + 800238a: f5a4 7460 sub.w r4, r4, #896 ; 0x380 + 800238e: ea42 52c4 orr.w r2, r2, r4, lsl #23 + 8002392: 619a str r2, [r3, #24] + 8002394: 7fc8 ldrb r0, [r1, #31] + 8002396: 0600 lsls r0, r0, #24 + 8002398: f000 4000 and.w r0, r0, #2147483648 ; 0x80000000 + 800239c: 4302 orrs r2, r0 + 800239e: 619a str r2, [r3, #24] + 80023a0: f891 2023 ldrb.w r2, [r1, #35] ; 0x23 + 80023a4: 0952 lsrs r2, r2, #5 + 80023a6: 61da str r2, [r3, #28] + 80023a8: f891 0024 ldrb.w r0, [r1, #36] ; 0x24 + 80023ac: ea42 02c0 orr.w r2, r2, r0, lsl #3 + 80023b0: 61da str r2, [r3, #28] + 80023b2: f891 0025 ldrb.w r0, [r1, #37] ; 0x25 + 80023b6: ea42 22c0 orr.w r2, r2, r0, lsl #11 + 80023ba: 61da str r2, [r3, #28] + 80023bc: f891 0026 ldrb.w r0, [r1, #38] ; 0x26 + 80023c0: 04c0 lsls r0, r0, #19 + 80023c2: f400 00f0 and.w r0, r0, #7864320 ; 0x780000 + 80023c6: 4302 orrs r2, r0 + 80023c8: 61da str r2, [r3, #28] + 80023ca: f891 0027 ldrb.w r0, [r1, #39] ; 0x27 + 80023ce: f891 5026 ldrb.w r5, [r1, #38] ; 0x26 + 80023d2: 0104 lsls r4, r0, #4 + 80023d4: f404 64fe and.w r4, r4, #2032 ; 0x7f0 + 80023d8: ea54 1415 orrs.w r4, r4, r5, lsr #4 + 80023dc: d006 beq.n 80023ec <_ZN13geometry_msgs4Pose11deserializeEPh+0x170> + 80023de: f5a4 7460 sub.w r4, r4, #896 ; 0x380 + 80023e2: ea42 52c4 orr.w r2, r2, r4, lsl #23 + 80023e6: 61da str r2, [r3, #28] + 80023e8: f891 0027 ldrb.w r0, [r1, #39] ; 0x27 + 80023ec: 0600 lsls r0, r0, #24 + 80023ee: f000 4000 and.w r0, r0, #2147483648 ; 0x80000000 + 80023f2: 4302 orrs r2, r0 + 80023f4: 61da str r2, [r3, #28] + 80023f6: f891 202b ldrb.w r2, [r1, #43] ; 0x2b + 80023fa: 0952 lsrs r2, r2, #5 + 80023fc: 621a str r2, [r3, #32] + 80023fe: f891 002c ldrb.w r0, [r1, #44] ; 0x2c + 8002402: ea42 02c0 orr.w r2, r2, r0, lsl #3 + 8002406: 621a str r2, [r3, #32] + 8002408: f891 002d ldrb.w r0, [r1, #45] ; 0x2d + 800240c: ea42 22c0 orr.w r2, r2, r0, lsl #11 + 8002410: 621a str r2, [r3, #32] + 8002412: f891 002e ldrb.w r0, [r1, #46] ; 0x2e + 8002416: 04c0 lsls r0, r0, #19 + 8002418: f400 00f0 and.w r0, r0, #7864320 ; 0x780000 + 800241c: 4302 orrs r2, r0 + 800241e: 621a str r2, [r3, #32] + 8002420: f891 002f ldrb.w r0, [r1, #47] ; 0x2f + 8002424: f891 502e ldrb.w r5, [r1, #46] ; 0x2e + 8002428: 0104 lsls r4, r0, #4 + 800242a: f404 64fe and.w r4, r4, #2032 ; 0x7f0 + 800242e: ea54 1415 orrs.w r4, r4, r5, lsr #4 + 8002432: d006 beq.n 8002442 <_ZN13geometry_msgs4Pose11deserializeEPh+0x1c6> + 8002434: f5a4 7460 sub.w r4, r4, #896 ; 0x380 + 8002438: ea42 52c4 orr.w r2, r2, r4, lsl #23 + 800243c: 621a str r2, [r3, #32] + 800243e: f891 002f ldrb.w r0, [r1, #47] ; 0x2f + 8002442: 0600 lsls r0, r0, #24 + 8002444: f000 4000 and.w r0, r0, #2147483648 ; 0x80000000 + 8002448: 4302 orrs r2, r0 + 800244a: 621a str r2, [r3, #32] + 800244c: f891 2033 ldrb.w r2, [r1, #51] ; 0x33 + 8002450: 0952 lsrs r2, r2, #5 + 8002452: 625a str r2, [r3, #36] ; 0x24 + 8002454: f891 0034 ldrb.w r0, [r1, #52] ; 0x34 + 8002458: ea42 02c0 orr.w r2, r2, r0, lsl #3 + 800245c: 625a str r2, [r3, #36] ; 0x24 + 800245e: f891 0035 ldrb.w r0, [r1, #53] ; 0x35 + 8002462: ea42 22c0 orr.w r2, r2, r0, lsl #11 + 8002466: 625a str r2, [r3, #36] ; 0x24 + 8002468: f891 0036 ldrb.w r0, [r1, #54] ; 0x36 + 800246c: 04c0 lsls r0, r0, #19 + 800246e: f400 00f0 and.w r0, r0, #7864320 ; 0x780000 + 8002472: 4302 orrs r2, r0 + 8002474: 625a str r2, [r3, #36] ; 0x24 + 8002476: f891 0037 ldrb.w r0, [r1, #55] ; 0x37 + 800247a: f891 5036 ldrb.w r5, [r1, #54] ; 0x36 + 800247e: 0104 lsls r4, r0, #4 + 8002480: f404 64fe and.w r4, r4, #2032 ; 0x7f0 + 8002484: ea54 1415 orrs.w r4, r4, r5, lsr #4 + 8002488: d006 beq.n 8002498 <_ZN13geometry_msgs4Pose11deserializeEPh+0x21c> + 800248a: f5a4 7460 sub.w r4, r4, #896 ; 0x380 + 800248e: ea42 52c4 orr.w r2, r2, r4, lsl #23 + 8002492: 625a str r2, [r3, #36] ; 0x24 + 8002494: f891 0037 ldrb.w r0, [r1, #55] ; 0x37 + 8002498: 0601 lsls r1, r0, #24 + 800249a: 2038 movs r0, #56 ; 0x38 + 800249c: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000 + 80024a0: 430a orrs r2, r1 + 80024a2: bc30 pop {r4, r5} + 80024a4: 625a str r2, [r3, #36] ; 0x24 + 80024a6: 4770 bx lr + +080024a8 <_ZN13geometry_msgs19TwistWithCovariance11deserializeEPh>: + 80024a8: 78cb ldrb r3, [r1, #3] + 80024aa: 095b lsrs r3, r3, #5 + 80024ac: b470 push {r4, r5, r6} + 80024ae: 60c3 str r3, [r0, #12] + 80024b0: 790a ldrb r2, [r1, #4] + 80024b2: ea43 03c2 orr.w r3, r3, r2, lsl #3 + 80024b6: 60c3 str r3, [r0, #12] + 80024b8: 794a ldrb r2, [r1, #5] + 80024ba: ea43 23c2 orr.w r3, r3, r2, lsl #11 + 80024be: 60c3 str r3, [r0, #12] + 80024c0: 798a ldrb r2, [r1, #6] + 80024c2: 04d2 lsls r2, r2, #19 + 80024c4: f402 02f0 and.w r2, r2, #7864320 ; 0x780000 + 80024c8: 4313 orrs r3, r2 + 80024ca: 60c3 str r3, [r0, #12] + 80024cc: 79ca ldrb r2, [r1, #7] + 80024ce: 798d ldrb r5, [r1, #6] + 80024d0: 0114 lsls r4, r2, #4 + 80024d2: f404 64fe and.w r4, r4, #2032 ; 0x7f0 + 80024d6: ea54 1415 orrs.w r4, r4, r5, lsr #4 + 80024da: d005 beq.n 80024e8 <_ZN13geometry_msgs19TwistWithCovariance11deserializeEPh+0x40> + 80024dc: f5a4 7460 sub.w r4, r4, #896 ; 0x380 + 80024e0: ea43 53c4 orr.w r3, r3, r4, lsl #23 + 80024e4: 60c3 str r3, [r0, #12] + 80024e6: 79ca ldrb r2, [r1, #7] + 80024e8: 0612 lsls r2, r2, #24 + 80024ea: f002 4200 and.w r2, r2, #2147483648 ; 0x80000000 + 80024ee: 4313 orrs r3, r2 + 80024f0: 60c3 str r3, [r0, #12] + 80024f2: 7acb ldrb r3, [r1, #11] + 80024f4: 095b lsrs r3, r3, #5 + 80024f6: 6103 str r3, [r0, #16] + 80024f8: 7b0a ldrb r2, [r1, #12] + 80024fa: ea43 03c2 orr.w r3, r3, r2, lsl #3 + 80024fe: 6103 str r3, [r0, #16] + 8002500: 7b4a ldrb r2, [r1, #13] + 8002502: ea43 23c2 orr.w r3, r3, r2, lsl #11 + 8002506: 6103 str r3, [r0, #16] + 8002508: 7b8a ldrb r2, [r1, #14] + 800250a: 04d2 lsls r2, r2, #19 + 800250c: f402 02f0 and.w r2, r2, #7864320 ; 0x780000 + 8002510: 4313 orrs r3, r2 + 8002512: 6103 str r3, [r0, #16] + 8002514: 7bca ldrb r2, [r1, #15] + 8002516: 7b8d ldrb r5, [r1, #14] + 8002518: 0114 lsls r4, r2, #4 + 800251a: f404 64fe and.w r4, r4, #2032 ; 0x7f0 + 800251e: ea54 1415 orrs.w r4, r4, r5, lsr #4 + 8002522: d005 beq.n 8002530 <_ZN13geometry_msgs19TwistWithCovariance11deserializeEPh+0x88> + 8002524: f5a4 7460 sub.w r4, r4, #896 ; 0x380 + 8002528: ea43 53c4 orr.w r3, r3, r4, lsl #23 + 800252c: 6103 str r3, [r0, #16] + 800252e: 7bca ldrb r2, [r1, #15] + 8002530: 0612 lsls r2, r2, #24 + 8002532: f002 4200 and.w r2, r2, #2147483648 ; 0x80000000 + 8002536: 4313 orrs r3, r2 + 8002538: 6103 str r3, [r0, #16] + 800253a: 7ccb ldrb r3, [r1, #19] + 800253c: 095b lsrs r3, r3, #5 + 800253e: 6143 str r3, [r0, #20] + 8002540: 7d0a ldrb r2, [r1, #20] + 8002542: ea43 03c2 orr.w r3, r3, r2, lsl #3 + 8002546: 6143 str r3, [r0, #20] + 8002548: 7d4a ldrb r2, [r1, #21] + 800254a: ea43 23c2 orr.w r3, r3, r2, lsl #11 + 800254e: 6143 str r3, [r0, #20] + 8002550: 7d8a ldrb r2, [r1, #22] + 8002552: 04d2 lsls r2, r2, #19 + 8002554: f402 02f0 and.w r2, r2, #7864320 ; 0x780000 + 8002558: 4313 orrs r3, r2 + 800255a: 6143 str r3, [r0, #20] + 800255c: 7dca ldrb r2, [r1, #23] + 800255e: 7d8d ldrb r5, [r1, #22] + 8002560: 0114 lsls r4, r2, #4 + 8002562: f404 64fe and.w r4, r4, #2032 ; 0x7f0 + 8002566: ea54 1415 orrs.w r4, r4, r5, lsr #4 + 800256a: d005 beq.n 8002578 <_ZN13geometry_msgs19TwistWithCovariance11deserializeEPh+0xd0> + 800256c: f5a4 7460 sub.w r4, r4, #896 ; 0x380 + 8002570: ea43 53c4 orr.w r3, r3, r4, lsl #23 + 8002574: 6143 str r3, [r0, #20] + 8002576: 7dca ldrb r2, [r1, #23] + 8002578: 0612 lsls r2, r2, #24 + 800257a: f002 4200 and.w r2, r2, #2147483648 ; 0x80000000 + 800257e: 4313 orrs r3, r2 + 8002580: 6143 str r3, [r0, #20] + 8002582: 7ecb ldrb r3, [r1, #27] + 8002584: 095b lsrs r3, r3, #5 + 8002586: 61c3 str r3, [r0, #28] + 8002588: 7f0a ldrb r2, [r1, #28] + 800258a: ea43 03c2 orr.w r3, r3, r2, lsl #3 + 800258e: 61c3 str r3, [r0, #28] + 8002590: 7f4a ldrb r2, [r1, #29] + 8002592: ea43 23c2 orr.w r3, r3, r2, lsl #11 + 8002596: 61c3 str r3, [r0, #28] + 8002598: 7f8a ldrb r2, [r1, #30] + 800259a: 04d2 lsls r2, r2, #19 + 800259c: f402 02f0 and.w r2, r2, #7864320 ; 0x780000 + 80025a0: 4313 orrs r3, r2 + 80025a2: 61c3 str r3, [r0, #28] + 80025a4: 7fca ldrb r2, [r1, #31] + 80025a6: 7f8d ldrb r5, [r1, #30] + 80025a8: 0114 lsls r4, r2, #4 + 80025aa: f404 64fe and.w r4, r4, #2032 ; 0x7f0 + 80025ae: ea54 1415 orrs.w r4, r4, r5, lsr #4 + 80025b2: d005 beq.n 80025c0 <_ZN13geometry_msgs19TwistWithCovariance11deserializeEPh+0x118> + 80025b4: f5a4 7460 sub.w r4, r4, #896 ; 0x380 + 80025b8: ea43 53c4 orr.w r3, r3, r4, lsl #23 + 80025bc: 61c3 str r3, [r0, #28] + 80025be: 7fca ldrb r2, [r1, #31] + 80025c0: 0612 lsls r2, r2, #24 + 80025c2: f002 4200 and.w r2, r2, #2147483648 ; 0x80000000 + 80025c6: 4313 orrs r3, r2 + 80025c8: 61c3 str r3, [r0, #28] + 80025ca: f891 3023 ldrb.w r3, [r1, #35] ; 0x23 + 80025ce: 095b lsrs r3, r3, #5 + 80025d0: 6203 str r3, [r0, #32] + 80025d2: f891 2024 ldrb.w r2, [r1, #36] ; 0x24 + 80025d6: ea43 03c2 orr.w r3, r3, r2, lsl #3 + 80025da: 6203 str r3, [r0, #32] + 80025dc: f891 2025 ldrb.w r2, [r1, #37] ; 0x25 + 80025e0: ea43 23c2 orr.w r3, r3, r2, lsl #11 + 80025e4: 6203 str r3, [r0, #32] + 80025e6: f891 2026 ldrb.w r2, [r1, #38] ; 0x26 + 80025ea: 04d2 lsls r2, r2, #19 + 80025ec: f402 02f0 and.w r2, r2, #7864320 ; 0x780000 + 80025f0: 4313 orrs r3, r2 + 80025f2: 6203 str r3, [r0, #32] + 80025f4: f891 2027 ldrb.w r2, [r1, #39] ; 0x27 + 80025f8: f891 5026 ldrb.w r5, [r1, #38] ; 0x26 + 80025fc: 0114 lsls r4, r2, #4 + 80025fe: f404 64fe and.w r4, r4, #2032 ; 0x7f0 + 8002602: ea54 1415 orrs.w r4, r4, r5, lsr #4 + 8002606: d006 beq.n 8002616 <_ZN13geometry_msgs19TwistWithCovariance11deserializeEPh+0x16e> + 8002608: f5a4 7460 sub.w r4, r4, #896 ; 0x380 + 800260c: ea43 53c4 orr.w r3, r3, r4, lsl #23 + 8002610: 6203 str r3, [r0, #32] + 8002612: f891 2027 ldrb.w r2, [r1, #39] ; 0x27 + 8002616: 0612 lsls r2, r2, #24 + 8002618: f002 4200 and.w r2, r2, #2147483648 ; 0x80000000 + 800261c: 4313 orrs r3, r2 + 800261e: 6203 str r3, [r0, #32] + 8002620: f891 302b ldrb.w r3, [r1, #43] ; 0x2b + 8002624: 095b lsrs r3, r3, #5 + 8002626: 6243 str r3, [r0, #36] ; 0x24 + 8002628: f891 202c ldrb.w r2, [r1, #44] ; 0x2c + 800262c: ea43 03c2 orr.w r3, r3, r2, lsl #3 + 8002630: 6243 str r3, [r0, #36] ; 0x24 + 8002632: f891 202d ldrb.w r2, [r1, #45] ; 0x2d + 8002636: ea43 23c2 orr.w r3, r3, r2, lsl #11 + 800263a: 6243 str r3, [r0, #36] ; 0x24 + 800263c: f891 202e ldrb.w r2, [r1, #46] ; 0x2e + 8002640: 04d2 lsls r2, r2, #19 + 8002642: f402 02f0 and.w r2, r2, #7864320 ; 0x780000 + 8002646: 4313 orrs r3, r2 + 8002648: 6243 str r3, [r0, #36] ; 0x24 + 800264a: f891 202f ldrb.w r2, [r1, #47] ; 0x2f + 800264e: f891 502e ldrb.w r5, [r1, #46] ; 0x2e + 8002652: 0114 lsls r4, r2, #4 + 8002654: f404 64fe and.w r4, r4, #2032 ; 0x7f0 + 8002658: ea54 1415 orrs.w r4, r4, r5, lsr #4 + 800265c: d006 beq.n 800266c <_ZN13geometry_msgs19TwistWithCovariance11deserializeEPh+0x1c4> + 800265e: f5a4 7460 sub.w r4, r4, #896 ; 0x380 + 8002662: ea43 53c4 orr.w r3, r3, r4, lsl #23 + 8002666: 6243 str r3, [r0, #36] ; 0x24 + 8002668: f891 202f ldrb.w r2, [r1, #47] ; 0x2f + 800266c: 0612 lsls r2, r2, #24 + 800266e: f100 04b4 add.w r4, r0, #180 ; 0xb4 + 8002672: f002 4200 and.w r2, r2, #2147483648 ; 0x80000000 + 8002676: 4313 orrs r3, r2 + 8002678: f840 3f24 str.w r3, [r0, #36]! + 800267c: f891 2033 ldrb.w r2, [r1, #51] ; 0x33 + 8002680: 0952 lsrs r2, r2, #5 + 8002682: f840 2f04 str.w r2, [r0, #4]! + 8002686: f891 3034 ldrb.w r3, [r1, #52] ; 0x34 + 800268a: ea42 02c3 orr.w r2, r2, r3, lsl #3 + 800268e: 6002 str r2, [r0, #0] + 8002690: f891 3035 ldrb.w r3, [r1, #53] ; 0x35 + 8002694: ea42 23c3 orr.w r3, r2, r3, lsl #11 + 8002698: 6003 str r3, [r0, #0] + 800269a: f891 2036 ldrb.w r2, [r1, #54] ; 0x36 + 800269e: 04d2 lsls r2, r2, #19 + 80026a0: f402 02f0 and.w r2, r2, #7864320 ; 0x780000 + 80026a4: 431a orrs r2, r3 + 80026a6: 6002 str r2, [r0, #0] + 80026a8: f891 3037 ldrb.w r3, [r1, #55] ; 0x37 + 80026ac: f891 6036 ldrb.w r6, [r1, #54] ; 0x36 + 80026b0: 061d lsls r5, r3, #24 + 80026b2: 011b lsls r3, r3, #4 + 80026b4: f005 4500 and.w r5, r5, #2147483648 ; 0x80000000 + 80026b8: f403 63fe and.w r3, r3, #2032 ; 0x7f0 + 80026bc: 4315 orrs r5, r2 + 80026be: ea53 1316 orrs.w r3, r3, r6, lsr #4 + 80026c2: f5a3 7360 sub.w r3, r3, #896 ; 0x380 + 80026c6: d013 beq.n 80026f0 <_ZN13geometry_msgs19TwistWithCovariance11deserializeEPh+0x248> + 80026c8: ea42 53c3 orr.w r3, r2, r3, lsl #23 + 80026cc: 42a0 cmp r0, r4 + 80026ce: f101 0108 add.w r1, r1, #8 + 80026d2: 6003 str r3, [r0, #0] + 80026d4: f891 202f ldrb.w r2, [r1, #47] ; 0x2f + 80026d8: ea4f 6202 mov.w r2, r2, lsl #24 + 80026dc: f002 4200 and.w r2, r2, #2147483648 ; 0x80000000 + 80026e0: ea43 0302 orr.w r3, r3, r2 + 80026e4: 6003 str r3, [r0, #0] + 80026e6: d1c9 bne.n 800267c <_ZN13geometry_msgs19TwistWithCovariance11deserializeEPh+0x1d4> + 80026e8: f44f 70a8 mov.w r0, #336 ; 0x150 + 80026ec: bc70 pop {r4, r5, r6} + 80026ee: 4770 bx lr + 80026f0: 42a0 cmp r0, r4 + 80026f2: 6005 str r5, [r0, #0] + 80026f4: f101 0108 add.w r1, r1, #8 + 80026f8: d1c0 bne.n 800267c <_ZN13geometry_msgs19TwistWithCovariance11deserializeEPh+0x1d4> + 80026fa: f44f 70a8 mov.w r0, #336 ; 0x150 + 80026fe: bc70 pop {r4, r5, r6} + 8002700: 4770 bx lr + 8002702: bf00 nop + +08002704 <_ZN13geometry_msgs18PoseWithCovariance11deserializeEPh>: + 8002704: 78cb ldrb r3, [r1, #3] + 8002706: 095b lsrs r3, r3, #5 + 8002708: b470 push {r4, r5, r6} + 800270a: 60c3 str r3, [r0, #12] + 800270c: 790a ldrb r2, [r1, #4] + 800270e: ea43 03c2 orr.w r3, r3, r2, lsl #3 + 8002712: 60c3 str r3, [r0, #12] + 8002714: 794a ldrb r2, [r1, #5] + 8002716: ea43 23c2 orr.w r3, r3, r2, lsl #11 + 800271a: 60c3 str r3, [r0, #12] + 800271c: 798a ldrb r2, [r1, #6] + 800271e: 04d2 lsls r2, r2, #19 + 8002720: f402 02f0 and.w r2, r2, #7864320 ; 0x780000 + 8002724: 4313 orrs r3, r2 + 8002726: 60c3 str r3, [r0, #12] + 8002728: 79ca ldrb r2, [r1, #7] + 800272a: 798d ldrb r5, [r1, #6] + 800272c: 0114 lsls r4, r2, #4 + 800272e: f404 64fe and.w r4, r4, #2032 ; 0x7f0 + 8002732: ea54 1415 orrs.w r4, r4, r5, lsr #4 + 8002736: d005 beq.n 8002744 <_ZN13geometry_msgs18PoseWithCovariance11deserializeEPh+0x40> + 8002738: f5a4 7460 sub.w r4, r4, #896 ; 0x380 + 800273c: ea43 53c4 orr.w r3, r3, r4, lsl #23 + 8002740: 60c3 str r3, [r0, #12] + 8002742: 79ca ldrb r2, [r1, #7] + 8002744: 0612 lsls r2, r2, #24 + 8002746: f002 4200 and.w r2, r2, #2147483648 ; 0x80000000 + 800274a: 4313 orrs r3, r2 + 800274c: 60c3 str r3, [r0, #12] + 800274e: 7acb ldrb r3, [r1, #11] + 8002750: 095b lsrs r3, r3, #5 + 8002752: 6103 str r3, [r0, #16] + 8002754: 7b0a ldrb r2, [r1, #12] + 8002756: ea43 03c2 orr.w r3, r3, r2, lsl #3 + 800275a: 6103 str r3, [r0, #16] + 800275c: 7b4a ldrb r2, [r1, #13] + 800275e: ea43 23c2 orr.w r3, r3, r2, lsl #11 + 8002762: 6103 str r3, [r0, #16] + 8002764: 7b8a ldrb r2, [r1, #14] + 8002766: 04d2 lsls r2, r2, #19 + 8002768: f402 02f0 and.w r2, r2, #7864320 ; 0x780000 + 800276c: 4313 orrs r3, r2 + 800276e: 6103 str r3, [r0, #16] + 8002770: 7bca ldrb r2, [r1, #15] + 8002772: 7b8d ldrb r5, [r1, #14] + 8002774: 0114 lsls r4, r2, #4 + 8002776: f404 64fe and.w r4, r4, #2032 ; 0x7f0 + 800277a: ea54 1415 orrs.w r4, r4, r5, lsr #4 + 800277e: d005 beq.n 800278c <_ZN13geometry_msgs18PoseWithCovariance11deserializeEPh+0x88> + 8002780: f5a4 7460 sub.w r4, r4, #896 ; 0x380 + 8002784: ea43 53c4 orr.w r3, r3, r4, lsl #23 + 8002788: 6103 str r3, [r0, #16] + 800278a: 7bca ldrb r2, [r1, #15] + 800278c: 0612 lsls r2, r2, #24 + 800278e: f002 4200 and.w r2, r2, #2147483648 ; 0x80000000 + 8002792: 4313 orrs r3, r2 + 8002794: 6103 str r3, [r0, #16] + 8002796: 7ccb ldrb r3, [r1, #19] + 8002798: 095b lsrs r3, r3, #5 + 800279a: 6143 str r3, [r0, #20] + 800279c: 7d0a ldrb r2, [r1, #20] + 800279e: ea43 03c2 orr.w r3, r3, r2, lsl #3 + 80027a2: 6143 str r3, [r0, #20] + 80027a4: 7d4a ldrb r2, [r1, #21] + 80027a6: ea43 23c2 orr.w r3, r3, r2, lsl #11 + 80027aa: 6143 str r3, [r0, #20] + 80027ac: 7d8a ldrb r2, [r1, #22] + 80027ae: 04d2 lsls r2, r2, #19 + 80027b0: f402 02f0 and.w r2, r2, #7864320 ; 0x780000 + 80027b4: 4313 orrs r3, r2 + 80027b6: 6143 str r3, [r0, #20] + 80027b8: 7dca ldrb r2, [r1, #23] + 80027ba: 7d8d ldrb r5, [r1, #22] + 80027bc: 0114 lsls r4, r2, #4 + 80027be: f404 64fe and.w r4, r4, #2032 ; 0x7f0 + 80027c2: ea54 1415 orrs.w r4, r4, r5, lsr #4 + 80027c6: d005 beq.n 80027d4 <_ZN13geometry_msgs18PoseWithCovariance11deserializeEPh+0xd0> + 80027c8: f5a4 7460 sub.w r4, r4, #896 ; 0x380 + 80027cc: ea43 53c4 orr.w r3, r3, r4, lsl #23 + 80027d0: 6143 str r3, [r0, #20] + 80027d2: 7dca ldrb r2, [r1, #23] + 80027d4: 0612 lsls r2, r2, #24 + 80027d6: f002 4200 and.w r2, r2, #2147483648 ; 0x80000000 + 80027da: 4313 orrs r3, r2 + 80027dc: 6143 str r3, [r0, #20] + 80027de: 7ecb ldrb r3, [r1, #27] + 80027e0: 095b lsrs r3, r3, #5 + 80027e2: 61c3 str r3, [r0, #28] + 80027e4: 7f0a ldrb r2, [r1, #28] + 80027e6: ea43 03c2 orr.w r3, r3, r2, lsl #3 + 80027ea: 61c3 str r3, [r0, #28] + 80027ec: 7f4a ldrb r2, [r1, #29] + 80027ee: ea43 23c2 orr.w r3, r3, r2, lsl #11 + 80027f2: 61c3 str r3, [r0, #28] + 80027f4: 7f8a ldrb r2, [r1, #30] + 80027f6: 04d2 lsls r2, r2, #19 + 80027f8: f402 02f0 and.w r2, r2, #7864320 ; 0x780000 + 80027fc: 4313 orrs r3, r2 + 80027fe: 61c3 str r3, [r0, #28] + 8002800: 7fca ldrb r2, [r1, #31] + 8002802: 7f8d ldrb r5, [r1, #30] + 8002804: 0114 lsls r4, r2, #4 + 8002806: f404 64fe and.w r4, r4, #2032 ; 0x7f0 + 800280a: ea54 1415 orrs.w r4, r4, r5, lsr #4 + 800280e: d005 beq.n 800281c <_ZN13geometry_msgs18PoseWithCovariance11deserializeEPh+0x118> + 8002810: f5a4 7460 sub.w r4, r4, #896 ; 0x380 + 8002814: ea43 53c4 orr.w r3, r3, r4, lsl #23 + 8002818: 61c3 str r3, [r0, #28] + 800281a: 7fca ldrb r2, [r1, #31] + 800281c: 0612 lsls r2, r2, #24 + 800281e: f002 4200 and.w r2, r2, #2147483648 ; 0x80000000 + 8002822: 4313 orrs r3, r2 + 8002824: 61c3 str r3, [r0, #28] + 8002826: f891 3023 ldrb.w r3, [r1, #35] ; 0x23 + 800282a: 095b lsrs r3, r3, #5 + 800282c: 6203 str r3, [r0, #32] + 800282e: f891 2024 ldrb.w r2, [r1, #36] ; 0x24 + 8002832: ea43 03c2 orr.w r3, r3, r2, lsl #3 + 8002836: 6203 str r3, [r0, #32] + 8002838: f891 2025 ldrb.w r2, [r1, #37] ; 0x25 + 800283c: ea43 23c2 orr.w r3, r3, r2, lsl #11 + 8002840: 6203 str r3, [r0, #32] + 8002842: f891 2026 ldrb.w r2, [r1, #38] ; 0x26 + 8002846: 04d2 lsls r2, r2, #19 + 8002848: f402 02f0 and.w r2, r2, #7864320 ; 0x780000 + 800284c: 4313 orrs r3, r2 + 800284e: 6203 str r3, [r0, #32] + 8002850: f891 2027 ldrb.w r2, [r1, #39] ; 0x27 + 8002854: f891 5026 ldrb.w r5, [r1, #38] ; 0x26 + 8002858: 0114 lsls r4, r2, #4 + 800285a: f404 64fe and.w r4, r4, #2032 ; 0x7f0 + 800285e: ea54 1415 orrs.w r4, r4, r5, lsr #4 + 8002862: d006 beq.n 8002872 <_ZN13geometry_msgs18PoseWithCovariance11deserializeEPh+0x16e> + 8002864: f5a4 7460 sub.w r4, r4, #896 ; 0x380 + 8002868: ea43 53c4 orr.w r3, r3, r4, lsl #23 + 800286c: 6203 str r3, [r0, #32] + 800286e: f891 2027 ldrb.w r2, [r1, #39] ; 0x27 + 8002872: 0612 lsls r2, r2, #24 + 8002874: f002 4200 and.w r2, r2, #2147483648 ; 0x80000000 + 8002878: 4313 orrs r3, r2 + 800287a: 6203 str r3, [r0, #32] + 800287c: f891 302b ldrb.w r3, [r1, #43] ; 0x2b + 8002880: 095b lsrs r3, r3, #5 + 8002882: 6243 str r3, [r0, #36] ; 0x24 + 8002884: f891 202c ldrb.w r2, [r1, #44] ; 0x2c + 8002888: ea43 03c2 orr.w r3, r3, r2, lsl #3 + 800288c: 6243 str r3, [r0, #36] ; 0x24 + 800288e: f891 202d ldrb.w r2, [r1, #45] ; 0x2d + 8002892: ea43 23c2 orr.w r3, r3, r2, lsl #11 + 8002896: 6243 str r3, [r0, #36] ; 0x24 + 8002898: f891 202e ldrb.w r2, [r1, #46] ; 0x2e + 800289c: 04d2 lsls r2, r2, #19 + 800289e: f402 02f0 and.w r2, r2, #7864320 ; 0x780000 + 80028a2: 4313 orrs r3, r2 + 80028a4: 6243 str r3, [r0, #36] ; 0x24 + 80028a6: f891 202f ldrb.w r2, [r1, #47] ; 0x2f + 80028aa: f891 502e ldrb.w r5, [r1, #46] ; 0x2e + 80028ae: 0114 lsls r4, r2, #4 + 80028b0: f404 64fe and.w r4, r4, #2032 ; 0x7f0 + 80028b4: ea54 1415 orrs.w r4, r4, r5, lsr #4 + 80028b8: d006 beq.n 80028c8 <_ZN13geometry_msgs18PoseWithCovariance11deserializeEPh+0x1c4> + 80028ba: f5a4 7460 sub.w r4, r4, #896 ; 0x380 + 80028be: ea43 53c4 orr.w r3, r3, r4, lsl #23 + 80028c2: 6243 str r3, [r0, #36] ; 0x24 + 80028c4: f891 202f ldrb.w r2, [r1, #47] ; 0x2f + 80028c8: 0612 lsls r2, r2, #24 + 80028ca: f002 4200 and.w r2, r2, #2147483648 ; 0x80000000 + 80028ce: 4313 orrs r3, r2 + 80028d0: 6243 str r3, [r0, #36] ; 0x24 + 80028d2: f891 3033 ldrb.w r3, [r1, #51] ; 0x33 + 80028d6: 095b lsrs r3, r3, #5 + 80028d8: 6283 str r3, [r0, #40] ; 0x28 + 80028da: f891 2034 ldrb.w r2, [r1, #52] ; 0x34 + 80028de: ea43 03c2 orr.w r3, r3, r2, lsl #3 + 80028e2: 6283 str r3, [r0, #40] ; 0x28 + 80028e4: f891 2035 ldrb.w r2, [r1, #53] ; 0x35 + 80028e8: ea43 23c2 orr.w r3, r3, r2, lsl #11 + 80028ec: 6283 str r3, [r0, #40] ; 0x28 + 80028ee: f891 2036 ldrb.w r2, [r1, #54] ; 0x36 + 80028f2: 04d2 lsls r2, r2, #19 + 80028f4: f402 02f0 and.w r2, r2, #7864320 ; 0x780000 + 80028f8: 4313 orrs r3, r2 + 80028fa: 6283 str r3, [r0, #40] ; 0x28 + 80028fc: f891 2037 ldrb.w r2, [r1, #55] ; 0x37 + 8002900: f891 5036 ldrb.w r5, [r1, #54] ; 0x36 + 8002904: 0114 lsls r4, r2, #4 + 8002906: f404 64fe and.w r4, r4, #2032 ; 0x7f0 + 800290a: ea54 1415 orrs.w r4, r4, r5, lsr #4 + 800290e: d006 beq.n 800291e <_ZN13geometry_msgs18PoseWithCovariance11deserializeEPh+0x21a> + 8002910: f5a4 7460 sub.w r4, r4, #896 ; 0x380 + 8002914: ea43 53c4 orr.w r3, r3, r4, lsl #23 + 8002918: 6283 str r3, [r0, #40] ; 0x28 + 800291a: f891 2037 ldrb.w r2, [r1, #55] ; 0x37 + 800291e: 0612 lsls r2, r2, #24 + 8002920: f100 04b8 add.w r4, r0, #184 ; 0xb8 + 8002924: f002 4200 and.w r2, r2, #2147483648 ; 0x80000000 + 8002928: 4313 orrs r3, r2 + 800292a: f840 3f28 str.w r3, [r0, #40]! + 800292e: f891 203b ldrb.w r2, [r1, #59] ; 0x3b + 8002932: 0952 lsrs r2, r2, #5 + 8002934: f840 2f04 str.w r2, [r0, #4]! + 8002938: f891 303c ldrb.w r3, [r1, #60] ; 0x3c + 800293c: ea42 02c3 orr.w r2, r2, r3, lsl #3 + 8002940: 6002 str r2, [r0, #0] + 8002942: f891 303d ldrb.w r3, [r1, #61] ; 0x3d + 8002946: ea42 23c3 orr.w r3, r2, r3, lsl #11 + 800294a: 6003 str r3, [r0, #0] + 800294c: f891 203e ldrb.w r2, [r1, #62] ; 0x3e + 8002950: 04d2 lsls r2, r2, #19 + 8002952: f402 02f0 and.w r2, r2, #7864320 ; 0x780000 + 8002956: 431a orrs r2, r3 + 8002958: 6002 str r2, [r0, #0] + 800295a: f891 303f ldrb.w r3, [r1, #63] ; 0x3f + 800295e: f891 603e ldrb.w r6, [r1, #62] ; 0x3e + 8002962: 061d lsls r5, r3, #24 + 8002964: 011b lsls r3, r3, #4 + 8002966: f005 4500 and.w r5, r5, #2147483648 ; 0x80000000 + 800296a: f403 63fe and.w r3, r3, #2032 ; 0x7f0 + 800296e: 4315 orrs r5, r2 + 8002970: ea53 1316 orrs.w r3, r3, r6, lsr #4 + 8002974: f5a3 7360 sub.w r3, r3, #896 ; 0x380 + 8002978: d013 beq.n 80029a2 <_ZN13geometry_msgs18PoseWithCovariance11deserializeEPh+0x29e> + 800297a: ea42 53c3 orr.w r3, r2, r3, lsl #23 + 800297e: 4284 cmp r4, r0 + 8002980: f101 0108 add.w r1, r1, #8 + 8002984: 6003 str r3, [r0, #0] + 8002986: f891 2037 ldrb.w r2, [r1, #55] ; 0x37 + 800298a: ea4f 6202 mov.w r2, r2, lsl #24 + 800298e: f002 4200 and.w r2, r2, #2147483648 ; 0x80000000 + 8002992: ea43 0302 orr.w r3, r3, r2 + 8002996: 6003 str r3, [r0, #0] + 8002998: d1c9 bne.n 800292e <_ZN13geometry_msgs18PoseWithCovariance11deserializeEPh+0x22a> + 800299a: f44f 70ac mov.w r0, #344 ; 0x158 + 800299e: bc70 pop {r4, r5, r6} + 80029a0: 4770 bx lr + 80029a2: 4284 cmp r4, r0 + 80029a4: 6005 str r5, [r0, #0] + 80029a6: f101 0108 add.w r1, r1, #8 + 80029aa: d1c0 bne.n 800292e <_ZN13geometry_msgs18PoseWithCovariance11deserializeEPh+0x22a> + 80029ac: f44f 70ac mov.w r0, #344 ; 0x158 + 80029b0: bc70 pop {r4, r5, r6} + 80029b2: 4770 bx lr + +080029b4 <_ZN13geometry_msgs7Vector311deserializeEPh>: + 80029b4: b430 push {r4, r5} + 80029b6: 78ca ldrb r2, [r1, #3] + 80029b8: 4603 mov r3, r0 + 80029ba: 0952 lsrs r2, r2, #5 + 80029bc: 6042 str r2, [r0, #4] + 80029be: 7908 ldrb r0, [r1, #4] + 80029c0: ea42 02c0 orr.w r2, r2, r0, lsl #3 + 80029c4: 605a str r2, [r3, #4] + 80029c6: 7948 ldrb r0, [r1, #5] + 80029c8: ea42 22c0 orr.w r2, r2, r0, lsl #11 + 80029cc: 605a str r2, [r3, #4] + 80029ce: 7988 ldrb r0, [r1, #6] + 80029d0: 04c0 lsls r0, r0, #19 + 80029d2: f400 00f0 and.w r0, r0, #7864320 ; 0x780000 + 80029d6: 4302 orrs r2, r0 + 80029d8: 605a str r2, [r3, #4] + 80029da: 79c8 ldrb r0, [r1, #7] + 80029dc: 798d ldrb r5, [r1, #6] + 80029de: 0104 lsls r4, r0, #4 + 80029e0: f404 64fe and.w r4, r4, #2032 ; 0x7f0 + 80029e4: ea54 1415 orrs.w r4, r4, r5, lsr #4 + 80029e8: d005 beq.n 80029f6 <_ZN13geometry_msgs7Vector311deserializeEPh+0x42> + 80029ea: f5a4 7460 sub.w r4, r4, #896 ; 0x380 + 80029ee: ea42 52c4 orr.w r2, r2, r4, lsl #23 + 80029f2: 605a str r2, [r3, #4] + 80029f4: 79c8 ldrb r0, [r1, #7] + 80029f6: 0600 lsls r0, r0, #24 + 80029f8: f000 4000 and.w r0, r0, #2147483648 ; 0x80000000 + 80029fc: 4302 orrs r2, r0 + 80029fe: 605a str r2, [r3, #4] + 8002a00: 7aca ldrb r2, [r1, #11] + 8002a02: 0952 lsrs r2, r2, #5 + 8002a04: 609a str r2, [r3, #8] + 8002a06: 7b08 ldrb r0, [r1, #12] + 8002a08: ea42 02c0 orr.w r2, r2, r0, lsl #3 + 8002a0c: 609a str r2, [r3, #8] + 8002a0e: 7b48 ldrb r0, [r1, #13] + 8002a10: ea42 22c0 orr.w r2, r2, r0, lsl #11 + 8002a14: 609a str r2, [r3, #8] + 8002a16: 7b88 ldrb r0, [r1, #14] + 8002a18: 04c0 lsls r0, r0, #19 + 8002a1a: f400 00f0 and.w r0, r0, #7864320 ; 0x780000 + 8002a1e: 4302 orrs r2, r0 + 8002a20: 609a str r2, [r3, #8] + 8002a22: 7bc8 ldrb r0, [r1, #15] + 8002a24: 7b8d ldrb r5, [r1, #14] + 8002a26: 0104 lsls r4, r0, #4 + 8002a28: f404 64fe and.w r4, r4, #2032 ; 0x7f0 + 8002a2c: ea54 1415 orrs.w r4, r4, r5, lsr #4 + 8002a30: d005 beq.n 8002a3e <_ZN13geometry_msgs7Vector311deserializeEPh+0x8a> + 8002a32: f5a4 7460 sub.w r4, r4, #896 ; 0x380 + 8002a36: ea42 52c4 orr.w r2, r2, r4, lsl #23 + 8002a3a: 609a str r2, [r3, #8] + 8002a3c: 7bc8 ldrb r0, [r1, #15] + 8002a3e: 0600 lsls r0, r0, #24 + 8002a40: f000 4000 and.w r0, r0, #2147483648 ; 0x80000000 + 8002a44: 4302 orrs r2, r0 + 8002a46: 609a str r2, [r3, #8] + 8002a48: 7cca ldrb r2, [r1, #19] + 8002a4a: 0952 lsrs r2, r2, #5 + 8002a4c: 60da str r2, [r3, #12] + 8002a4e: 7d08 ldrb r0, [r1, #20] + 8002a50: ea42 02c0 orr.w r2, r2, r0, lsl #3 + 8002a54: 60da str r2, [r3, #12] + 8002a56: 7d48 ldrb r0, [r1, #21] + 8002a58: ea42 22c0 orr.w r2, r2, r0, lsl #11 + 8002a5c: 60da str r2, [r3, #12] + 8002a5e: 7d88 ldrb r0, [r1, #22] + 8002a60: 04c0 lsls r0, r0, #19 + 8002a62: f400 00f0 and.w r0, r0, #7864320 ; 0x780000 + 8002a66: 4302 orrs r2, r0 + 8002a68: 60da str r2, [r3, #12] + 8002a6a: 7dc8 ldrb r0, [r1, #23] + 8002a6c: 7d8d ldrb r5, [r1, #22] + 8002a6e: 0104 lsls r4, r0, #4 + 8002a70: f404 64fe and.w r4, r4, #2032 ; 0x7f0 + 8002a74: ea54 1415 orrs.w r4, r4, r5, lsr #4 + 8002a78: d005 beq.n 8002a86 <_ZN13geometry_msgs7Vector311deserializeEPh+0xd2> + 8002a7a: f5a4 7460 sub.w r4, r4, #896 ; 0x380 + 8002a7e: ea42 52c4 orr.w r2, r2, r4, lsl #23 + 8002a82: 60da str r2, [r3, #12] + 8002a84: 7dc8 ldrb r0, [r1, #23] + 8002a86: 0601 lsls r1, r0, #24 + 8002a88: 2018 movs r0, #24 + 8002a8a: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000 + 8002a8e: 430a orrs r2, r1 + 8002a90: bc30 pop {r4, r5} + 8002a92: 60da str r2, [r3, #12] + 8002a94: 4770 bx lr + 8002a96: bf00 nop + +08002a98 <_ZN13geometry_msgs5Point11deserializeEPh>: + 8002a98: b430 push {r4, r5} + 8002a9a: 78ca ldrb r2, [r1, #3] + 8002a9c: 4603 mov r3, r0 + 8002a9e: 0952 lsrs r2, r2, #5 + 8002aa0: 6042 str r2, [r0, #4] + 8002aa2: 7908 ldrb r0, [r1, #4] + 8002aa4: ea42 02c0 orr.w r2, r2, r0, lsl #3 + 8002aa8: 605a str r2, [r3, #4] + 8002aaa: 7948 ldrb r0, [r1, #5] + 8002aac: ea42 22c0 orr.w r2, r2, r0, lsl #11 + 8002ab0: 605a str r2, [r3, #4] + 8002ab2: 7988 ldrb r0, [r1, #6] + 8002ab4: 04c0 lsls r0, r0, #19 + 8002ab6: f400 00f0 and.w r0, r0, #7864320 ; 0x780000 + 8002aba: 4302 orrs r2, r0 + 8002abc: 605a str r2, [r3, #4] + 8002abe: 79c8 ldrb r0, [r1, #7] + 8002ac0: 798d ldrb r5, [r1, #6] + 8002ac2: 0104 lsls r4, r0, #4 + 8002ac4: f404 64fe and.w r4, r4, #2032 ; 0x7f0 + 8002ac8: ea54 1415 orrs.w r4, r4, r5, lsr #4 + 8002acc: d005 beq.n 8002ada <_ZN13geometry_msgs5Point11deserializeEPh+0x42> + 8002ace: f5a4 7460 sub.w r4, r4, #896 ; 0x380 + 8002ad2: ea42 52c4 orr.w r2, r2, r4, lsl #23 + 8002ad6: 605a str r2, [r3, #4] + 8002ad8: 79c8 ldrb r0, [r1, #7] + 8002ada: 0600 lsls r0, r0, #24 + 8002adc: f000 4000 and.w r0, r0, #2147483648 ; 0x80000000 + 8002ae0: 4302 orrs r2, r0 + 8002ae2: 605a str r2, [r3, #4] + 8002ae4: 7aca ldrb r2, [r1, #11] + 8002ae6: 0952 lsrs r2, r2, #5 + 8002ae8: 609a str r2, [r3, #8] + 8002aea: 7b08 ldrb r0, [r1, #12] + 8002aec: ea42 02c0 orr.w r2, r2, r0, lsl #3 + 8002af0: 609a str r2, [r3, #8] + 8002af2: 7b48 ldrb r0, [r1, #13] + 8002af4: ea42 22c0 orr.w r2, r2, r0, lsl #11 + 8002af8: 609a str r2, [r3, #8] + 8002afa: 7b88 ldrb r0, [r1, #14] + 8002afc: 04c0 lsls r0, r0, #19 + 8002afe: f400 00f0 and.w r0, r0, #7864320 ; 0x780000 + 8002b02: 4302 orrs r2, r0 + 8002b04: 609a str r2, [r3, #8] + 8002b06: 7bc8 ldrb r0, [r1, #15] + 8002b08: 7b8d ldrb r5, [r1, #14] + 8002b0a: 0104 lsls r4, r0, #4 + 8002b0c: f404 64fe and.w r4, r4, #2032 ; 0x7f0 + 8002b10: ea54 1415 orrs.w r4, r4, r5, lsr #4 + 8002b14: d005 beq.n 8002b22 <_ZN13geometry_msgs5Point11deserializeEPh+0x8a> + 8002b16: f5a4 7460 sub.w r4, r4, #896 ; 0x380 + 8002b1a: ea42 52c4 orr.w r2, r2, r4, lsl #23 + 8002b1e: 609a str r2, [r3, #8] + 8002b20: 7bc8 ldrb r0, [r1, #15] + 8002b22: 0600 lsls r0, r0, #24 + 8002b24: f000 4000 and.w r0, r0, #2147483648 ; 0x80000000 + 8002b28: 4302 orrs r2, r0 + 8002b2a: 609a str r2, [r3, #8] + 8002b2c: 7cca ldrb r2, [r1, #19] + 8002b2e: 0952 lsrs r2, r2, #5 + 8002b30: 60da str r2, [r3, #12] + 8002b32: 7d08 ldrb r0, [r1, #20] + 8002b34: ea42 02c0 orr.w r2, r2, r0, lsl #3 + 8002b38: 60da str r2, [r3, #12] + 8002b3a: 7d48 ldrb r0, [r1, #21] + 8002b3c: ea42 22c0 orr.w r2, r2, r0, lsl #11 + 8002b40: 60da str r2, [r3, #12] + 8002b42: 7d88 ldrb r0, [r1, #22] + 8002b44: 04c0 lsls r0, r0, #19 + 8002b46: f400 00f0 and.w r0, r0, #7864320 ; 0x780000 + 8002b4a: 4302 orrs r2, r0 + 8002b4c: 60da str r2, [r3, #12] + 8002b4e: 7dc8 ldrb r0, [r1, #23] + 8002b50: 7d8d ldrb r5, [r1, #22] + 8002b52: 0104 lsls r4, r0, #4 + 8002b54: f404 64fe and.w r4, r4, #2032 ; 0x7f0 + 8002b58: ea54 1415 orrs.w r4, r4, r5, lsr #4 + 8002b5c: d005 beq.n 8002b6a <_ZN13geometry_msgs5Point11deserializeEPh+0xd2> + 8002b5e: f5a4 7460 sub.w r4, r4, #896 ; 0x380 + 8002b62: ea42 52c4 orr.w r2, r2, r4, lsl #23 + 8002b66: 60da str r2, [r3, #12] + 8002b68: 7dc8 ldrb r0, [r1, #23] + 8002b6a: 0601 lsls r1, r0, #24 + 8002b6c: 2018 movs r0, #24 + 8002b6e: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000 + 8002b72: 430a orrs r2, r1 + 8002b74: bc30 pop {r4, r5} + 8002b76: 60da str r2, [r3, #12] + 8002b78: 4770 bx lr + 8002b7a: bf00 nop + +08002b7c <_ZN13geometry_msgs10Quaternion11deserializeEPh>: + 8002b7c: b430 push {r4, r5} + 8002b7e: 78ca ldrb r2, [r1, #3] + 8002b80: 4603 mov r3, r0 + 8002b82: 0952 lsrs r2, r2, #5 + 8002b84: 6042 str r2, [r0, #4] + 8002b86: 7908 ldrb r0, [r1, #4] + 8002b88: ea42 02c0 orr.w r2, r2, r0, lsl #3 + 8002b8c: 605a str r2, [r3, #4] + 8002b8e: 7948 ldrb r0, [r1, #5] + 8002b90: ea42 22c0 orr.w r2, r2, r0, lsl #11 + 8002b94: 605a str r2, [r3, #4] + 8002b96: 7988 ldrb r0, [r1, #6] + 8002b98: 04c0 lsls r0, r0, #19 + 8002b9a: f400 00f0 and.w r0, r0, #7864320 ; 0x780000 + 8002b9e: 4302 orrs r2, r0 + 8002ba0: 605a str r2, [r3, #4] + 8002ba2: 79c8 ldrb r0, [r1, #7] + 8002ba4: 798d ldrb r5, [r1, #6] + 8002ba6: 0104 lsls r4, r0, #4 + 8002ba8: f404 64fe and.w r4, r4, #2032 ; 0x7f0 + 8002bac: ea54 1415 orrs.w r4, r4, r5, lsr #4 + 8002bb0: d005 beq.n 8002bbe <_ZN13geometry_msgs10Quaternion11deserializeEPh+0x42> + 8002bb2: f5a4 7460 sub.w r4, r4, #896 ; 0x380 + 8002bb6: ea42 52c4 orr.w r2, r2, r4, lsl #23 + 8002bba: 605a str r2, [r3, #4] + 8002bbc: 79c8 ldrb r0, [r1, #7] + 8002bbe: 0600 lsls r0, r0, #24 + 8002bc0: f000 4000 and.w r0, r0, #2147483648 ; 0x80000000 + 8002bc4: 4302 orrs r2, r0 + 8002bc6: 605a str r2, [r3, #4] + 8002bc8: 7aca ldrb r2, [r1, #11] + 8002bca: 0952 lsrs r2, r2, #5 + 8002bcc: 609a str r2, [r3, #8] + 8002bce: 7b08 ldrb r0, [r1, #12] + 8002bd0: ea42 02c0 orr.w r2, r2, r0, lsl #3 + 8002bd4: 609a str r2, [r3, #8] + 8002bd6: 7b48 ldrb r0, [r1, #13] + 8002bd8: ea42 22c0 orr.w r2, r2, r0, lsl #11 + 8002bdc: 609a str r2, [r3, #8] + 8002bde: 7b88 ldrb r0, [r1, #14] + 8002be0: 04c0 lsls r0, r0, #19 + 8002be2: f400 00f0 and.w r0, r0, #7864320 ; 0x780000 + 8002be6: 4302 orrs r2, r0 + 8002be8: 609a str r2, [r3, #8] + 8002bea: 7bc8 ldrb r0, [r1, #15] + 8002bec: 7b8d ldrb r5, [r1, #14] + 8002bee: 0104 lsls r4, r0, #4 + 8002bf0: f404 64fe and.w r4, r4, #2032 ; 0x7f0 + 8002bf4: ea54 1415 orrs.w r4, r4, r5, lsr #4 + 8002bf8: d005 beq.n 8002c06 <_ZN13geometry_msgs10Quaternion11deserializeEPh+0x8a> + 8002bfa: f5a4 7460 sub.w r4, r4, #896 ; 0x380 + 8002bfe: ea42 52c4 orr.w r2, r2, r4, lsl #23 + 8002c02: 609a str r2, [r3, #8] + 8002c04: 7bc8 ldrb r0, [r1, #15] + 8002c06: 0600 lsls r0, r0, #24 + 8002c08: f000 4000 and.w r0, r0, #2147483648 ; 0x80000000 + 8002c0c: 4302 orrs r2, r0 + 8002c0e: 609a str r2, [r3, #8] + 8002c10: 7cca ldrb r2, [r1, #19] + 8002c12: 0952 lsrs r2, r2, #5 + 8002c14: 60da str r2, [r3, #12] + 8002c16: 7d08 ldrb r0, [r1, #20] + 8002c18: ea42 02c0 orr.w r2, r2, r0, lsl #3 + 8002c1c: 60da str r2, [r3, #12] + 8002c1e: 7d48 ldrb r0, [r1, #21] + 8002c20: ea42 22c0 orr.w r2, r2, r0, lsl #11 + 8002c24: 60da str r2, [r3, #12] + 8002c26: 7d88 ldrb r0, [r1, #22] + 8002c28: 04c0 lsls r0, r0, #19 + 8002c2a: f400 00f0 and.w r0, r0, #7864320 ; 0x780000 + 8002c2e: 4302 orrs r2, r0 + 8002c30: 60da str r2, [r3, #12] + 8002c32: 7dc8 ldrb r0, [r1, #23] + 8002c34: 7d8d ldrb r5, [r1, #22] + 8002c36: 0104 lsls r4, r0, #4 + 8002c38: f404 64fe and.w r4, r4, #2032 ; 0x7f0 + 8002c3c: ea54 1415 orrs.w r4, r4, r5, lsr #4 + 8002c40: d005 beq.n 8002c4e <_ZN13geometry_msgs10Quaternion11deserializeEPh+0xd2> + 8002c42: f5a4 7460 sub.w r4, r4, #896 ; 0x380 + 8002c46: ea42 52c4 orr.w r2, r2, r4, lsl #23 + 8002c4a: 60da str r2, [r3, #12] + 8002c4c: 7dc8 ldrb r0, [r1, #23] + 8002c4e: 0600 lsls r0, r0, #24 + 8002c50: f000 4000 and.w r0, r0, #2147483648 ; 0x80000000 + 8002c54: 4302 orrs r2, r0 + 8002c56: 60da str r2, [r3, #12] + 8002c58: 7eca ldrb r2, [r1, #27] + 8002c5a: 0952 lsrs r2, r2, #5 + 8002c5c: 611a str r2, [r3, #16] + 8002c5e: 7f08 ldrb r0, [r1, #28] + 8002c60: ea42 02c0 orr.w r2, r2, r0, lsl #3 + 8002c64: 611a str r2, [r3, #16] + 8002c66: 7f48 ldrb r0, [r1, #29] + 8002c68: ea42 22c0 orr.w r2, r2, r0, lsl #11 + 8002c6c: 611a str r2, [r3, #16] + 8002c6e: 7f88 ldrb r0, [r1, #30] + 8002c70: 04c0 lsls r0, r0, #19 + 8002c72: f400 00f0 and.w r0, r0, #7864320 ; 0x780000 + 8002c76: 4302 orrs r2, r0 + 8002c78: 611a str r2, [r3, #16] + 8002c7a: 7fc8 ldrb r0, [r1, #31] + 8002c7c: 7f8d ldrb r5, [r1, #30] + 8002c7e: 0104 lsls r4, r0, #4 + 8002c80: f404 64fe and.w r4, r4, #2032 ; 0x7f0 + 8002c84: ea54 1415 orrs.w r4, r4, r5, lsr #4 + 8002c88: d005 beq.n 8002c96 <_ZN13geometry_msgs10Quaternion11deserializeEPh+0x11a> + 8002c8a: f5a4 7460 sub.w r4, r4, #896 ; 0x380 + 8002c8e: ea42 52c4 orr.w r2, r2, r4, lsl #23 + 8002c92: 611a str r2, [r3, #16] + 8002c94: 7fc8 ldrb r0, [r1, #31] + 8002c96: 0601 lsls r1, r0, #24 + 8002c98: 2020 movs r0, #32 + 8002c9a: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000 + 8002c9e: 430a orrs r2, r1 + 8002ca0: bc30 pop {r4, r5} + 8002ca2: 611a str r2, [r3, #16] + 8002ca4: 4770 bx lr + 8002ca6: bf00 nop + +08002ca8 <_ZN8nav_msgs8Odometry11deserializeEPh>: + 8002ca8: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} + 8002cac: 780b ldrb r3, [r1, #0] + 8002cae: 4605 mov r5, r0 + 8002cb0: 460e mov r6, r1 + 8002cb2: f101 040f add.w r4, r1, #15 + 8002cb6: 6083 str r3, [r0, #8] + 8002cb8: 784a ldrb r2, [r1, #1] + 8002cba: ea43 2302 orr.w r3, r3, r2, lsl #8 + 8002cbe: 6083 str r3, [r0, #8] + 8002cc0: 788a ldrb r2, [r1, #2] + 8002cc2: ea43 4302 orr.w r3, r3, r2, lsl #16 + 8002cc6: 6083 str r3, [r0, #8] + 8002cc8: 78ca ldrb r2, [r1, #3] + 8002cca: ea43 6302 orr.w r3, r3, r2, lsl #24 + 8002cce: 6083 str r3, [r0, #8] + 8002cd0: 790b ldrb r3, [r1, #4] + 8002cd2: 60c3 str r3, [r0, #12] + 8002cd4: 794a ldrb r2, [r1, #5] + 8002cd6: ea43 2302 orr.w r3, r3, r2, lsl #8 + 8002cda: 60c3 str r3, [r0, #12] + 8002cdc: 798a ldrb r2, [r1, #6] + 8002cde: ea43 4302 orr.w r3, r3, r2, lsl #16 + 8002ce2: 60c3 str r3, [r0, #12] + 8002ce4: 79ca ldrb r2, [r1, #7] + 8002ce6: ea43 6302 orr.w r3, r3, r2, lsl #24 + 8002cea: 60c3 str r3, [r0, #12] + 8002cec: 7a0b ldrb r3, [r1, #8] + 8002cee: 6103 str r3, [r0, #16] + 8002cf0: 7a4a ldrb r2, [r1, #9] + 8002cf2: ea43 2302 orr.w r3, r3, r2, lsl #8 + 8002cf6: 6103 str r3, [r0, #16] + 8002cf8: 7a8a ldrb r2, [r1, #10] + 8002cfa: ea43 4302 orr.w r3, r3, r2, lsl #16 + 8002cfe: 6103 str r3, [r0, #16] + 8002d00: 7aca ldrb r2, [r1, #11] + 8002d02: ea43 6302 orr.w r3, r3, r2, lsl #24 + 8002d06: 6103 str r3, [r0, #16] + 8002d08: 7b4f ldrb r7, [r1, #13] + 8002d0a: 7b8a ldrb r2, [r1, #14] + 8002d0c: 023f lsls r7, r7, #8 + 8002d0e: 7bcb ldrb r3, [r1, #15] + 8002d10: 7b08 ldrb r0, [r1, #12] + 8002d12: ea47 4702 orr.w r7, r7, r2, lsl #16 + 8002d16: ea47 6703 orr.w r7, r7, r3, lsl #24 + 8002d1a: 4307 orrs r7, r0 + 8002d1c: f107 0910 add.w r9, r7, #16 + 8002d20: f1b9 0f10 cmp.w r9, #16 + 8002d24: d904 bls.n 8002d30 <_ZN8nav_msgs8Odometry11deserializeEPh+0x88> + 8002d26: 463a mov r2, r7 + 8002d28: 3110 adds r1, #16 + 8002d2a: 4620 mov r0, r4 + 8002d2c: f007 f829 bl 8009d82 + 8002d30: 19f3 adds r3, r6, r7 + 8002d32: 2200 movs r2, #0 + 8002d34: f109 0804 add.w r8, r9, #4 + 8002d38: 73da strb r2, [r3, #15] + 8002d3a: 616c str r4, [r5, #20] + 8002d3c: 7c9c ldrb r4, [r3, #18] + 8002d3e: 7c59 ldrb r1, [r3, #17] + 8002d40: 0424 lsls r4, r4, #16 + 8002d42: 7cda ldrb r2, [r3, #19] + 8002d44: f816 3009 ldrb.w r3, [r6, r9] + 8002d48: ea44 2401 orr.w r4, r4, r1, lsl #8 + 8002d4c: ea44 6402 orr.w r4, r4, r2, lsl #24 + 8002d50: 431c orrs r4, r3 + 8002d52: 4444 add r4, r8 + 8002d54: 45a0 cmp r8, r4 + 8002d56: d20f bcs.n 8002d78 <_ZN8nav_msgs8Odometry11deserializeEPh+0xd0> + 8002d58: 1be3 subs r3, r4, r7 + 8002d5a: f107 0215 add.w r2, r7, #21 + 8002d5e: f107 0114 add.w r1, r7, #20 + 8002d62: f107 0013 add.w r0, r7, #19 + 8002d66: 3b14 subs r3, #20 + 8002d68: 4431 add r1, r6 + 8002d6a: 4430 add r0, r6 + 8002d6c: 4294 cmp r4, r2 + 8002d6e: bf2c ite cs + 8002d70: 461a movcs r2, r3 + 8002d72: 2201 movcc r2, #1 + 8002d74: f007 f805 bl 8009d82 + 8002d78: f108 38ff add.w r8, r8, #4294967295 ; 0xffffffff + 8002d7c: 1930 adds r0, r6, r4 + 8002d7e: 2200 movs r2, #0 + 8002d80: eb06 0308 add.w r3, r6, r8 + 8002d84: f800 2c01 strb.w r2, [r0, #-1] + 8002d88: 61ab str r3, [r5, #24] + 8002d8a: 78c3 ldrb r3, [r0, #3] + 8002d8c: 095b lsrs r3, r3, #5 + 8002d8e: 62ab str r3, [r5, #40] ; 0x28 + 8002d90: 7902 ldrb r2, [r0, #4] + 8002d92: ea43 03c2 orr.w r3, r3, r2, lsl #3 + 8002d96: 62ab str r3, [r5, #40] ; 0x28 + 8002d98: 7942 ldrb r2, [r0, #5] + 8002d9a: ea43 23c2 orr.w r3, r3, r2, lsl #11 + 8002d9e: 62ab str r3, [r5, #40] ; 0x28 + 8002da0: 7982 ldrb r2, [r0, #6] + 8002da2: 04d2 lsls r2, r2, #19 + 8002da4: f402 02f0 and.w r2, r2, #7864320 ; 0x780000 + 8002da8: 4313 orrs r3, r2 + 8002daa: 62ab str r3, [r5, #40] ; 0x28 + 8002dac: 79c2 ldrb r2, [r0, #7] + 8002dae: 7987 ldrb r7, [r0, #6] + 8002db0: 0111 lsls r1, r2, #4 + 8002db2: f401 61fe and.w r1, r1, #2032 ; 0x7f0 + 8002db6: ea51 1117 orrs.w r1, r1, r7, lsr #4 + 8002dba: d005 beq.n 8002dc8 <_ZN8nav_msgs8Odometry11deserializeEPh+0x120> + 8002dbc: f5a1 7160 sub.w r1, r1, #896 ; 0x380 + 8002dc0: ea43 53c1 orr.w r3, r3, r1, lsl #23 + 8002dc4: 62ab str r3, [r5, #40] ; 0x28 + 8002dc6: 79c2 ldrb r2, [r0, #7] + 8002dc8: 0612 lsls r2, r2, #24 + 8002dca: f002 4200 and.w r2, r2, #2147483648 ; 0x80000000 + 8002dce: 4313 orrs r3, r2 + 8002dd0: 62ab str r3, [r5, #40] ; 0x28 + 8002dd2: 7ac3 ldrb r3, [r0, #11] + 8002dd4: 095b lsrs r3, r3, #5 + 8002dd6: 62eb str r3, [r5, #44] ; 0x2c + 8002dd8: 7b02 ldrb r2, [r0, #12] + 8002dda: ea43 03c2 orr.w r3, r3, r2, lsl #3 + 8002dde: 62eb str r3, [r5, #44] ; 0x2c + 8002de0: 7b42 ldrb r2, [r0, #13] + 8002de2: ea43 23c2 orr.w r3, r3, r2, lsl #11 + 8002de6: 62eb str r3, [r5, #44] ; 0x2c + 8002de8: 7b82 ldrb r2, [r0, #14] + 8002dea: 04d2 lsls r2, r2, #19 + 8002dec: f402 02f0 and.w r2, r2, #7864320 ; 0x780000 + 8002df0: 4313 orrs r3, r2 + 8002df2: 62eb str r3, [r5, #44] ; 0x2c + 8002df4: 7bc2 ldrb r2, [r0, #15] + 8002df6: 7b87 ldrb r7, [r0, #14] + 8002df8: 0111 lsls r1, r2, #4 + 8002dfa: f401 61fe and.w r1, r1, #2032 ; 0x7f0 + 8002dfe: ea51 1117 orrs.w r1, r1, r7, lsr #4 + 8002e02: d005 beq.n 8002e10 <_ZN8nav_msgs8Odometry11deserializeEPh+0x168> + 8002e04: f5a1 7160 sub.w r1, r1, #896 ; 0x380 + 8002e08: ea43 53c1 orr.w r3, r3, r1, lsl #23 + 8002e0c: 62eb str r3, [r5, #44] ; 0x2c + 8002e0e: 7bc2 ldrb r2, [r0, #15] + 8002e10: 0612 lsls r2, r2, #24 + 8002e12: f002 4200 and.w r2, r2, #2147483648 ; 0x80000000 + 8002e16: 4313 orrs r3, r2 + 8002e18: 62eb str r3, [r5, #44] ; 0x2c + 8002e1a: 7cc3 ldrb r3, [r0, #19] + 8002e1c: 095b lsrs r3, r3, #5 + 8002e1e: 632b str r3, [r5, #48] ; 0x30 + 8002e20: 7d02 ldrb r2, [r0, #20] + 8002e22: ea43 03c2 orr.w r3, r3, r2, lsl #3 + 8002e26: 632b str r3, [r5, #48] ; 0x30 + 8002e28: 7d42 ldrb r2, [r0, #21] + 8002e2a: ea43 23c2 orr.w r3, r3, r2, lsl #11 + 8002e2e: 632b str r3, [r5, #48] ; 0x30 + 8002e30: 7d82 ldrb r2, [r0, #22] + 8002e32: 04d2 lsls r2, r2, #19 + 8002e34: f402 02f0 and.w r2, r2, #7864320 ; 0x780000 + 8002e38: 4313 orrs r3, r2 + 8002e3a: 632b str r3, [r5, #48] ; 0x30 + 8002e3c: 7dc2 ldrb r2, [r0, #23] + 8002e3e: 7d87 ldrb r7, [r0, #22] + 8002e40: 0111 lsls r1, r2, #4 + 8002e42: f401 61fe and.w r1, r1, #2032 ; 0x7f0 + 8002e46: ea51 1117 orrs.w r1, r1, r7, lsr #4 + 8002e4a: d005 beq.n 8002e58 <_ZN8nav_msgs8Odometry11deserializeEPh+0x1b0> + 8002e4c: f5a1 7160 sub.w r1, r1, #896 ; 0x380 + 8002e50: ea43 53c1 orr.w r3, r3, r1, lsl #23 + 8002e54: 632b str r3, [r5, #48] ; 0x30 + 8002e56: 7dc2 ldrb r2, [r0, #23] + 8002e58: 0612 lsls r2, r2, #24 + 8002e5a: f002 4200 and.w r2, r2, #2147483648 ; 0x80000000 + 8002e5e: 4313 orrs r3, r2 + 8002e60: 632b str r3, [r5, #48] ; 0x30 + 8002e62: 7ec3 ldrb r3, [r0, #27] + 8002e64: 095b lsrs r3, r3, #5 + 8002e66: 63ab str r3, [r5, #56] ; 0x38 + 8002e68: 7f02 ldrb r2, [r0, #28] + 8002e6a: ea43 03c2 orr.w r3, r3, r2, lsl #3 + 8002e6e: 63ab str r3, [r5, #56] ; 0x38 + 8002e70: 7f42 ldrb r2, [r0, #29] + 8002e72: ea43 23c2 orr.w r3, r3, r2, lsl #11 + 8002e76: 63ab str r3, [r5, #56] ; 0x38 + 8002e78: 7f82 ldrb r2, [r0, #30] + 8002e7a: 04d2 lsls r2, r2, #19 + 8002e7c: f402 02f0 and.w r2, r2, #7864320 ; 0x780000 + 8002e80: 4313 orrs r3, r2 + 8002e82: 63ab str r3, [r5, #56] ; 0x38 + 8002e84: 7fc2 ldrb r2, [r0, #31] + 8002e86: 7f87 ldrb r7, [r0, #30] + 8002e88: 0111 lsls r1, r2, #4 + 8002e8a: f401 61fe and.w r1, r1, #2032 ; 0x7f0 + 8002e8e: ea51 1117 orrs.w r1, r1, r7, lsr #4 + 8002e92: d005 beq.n 8002ea0 <_ZN8nav_msgs8Odometry11deserializeEPh+0x1f8> + 8002e94: f5a1 7160 sub.w r1, r1, #896 ; 0x380 + 8002e98: ea43 53c1 orr.w r3, r3, r1, lsl #23 + 8002e9c: 63ab str r3, [r5, #56] ; 0x38 + 8002e9e: 7fc2 ldrb r2, [r0, #31] + 8002ea0: 0612 lsls r2, r2, #24 + 8002ea2: f002 4200 and.w r2, r2, #2147483648 ; 0x80000000 + 8002ea6: 4313 orrs r3, r2 + 8002ea8: 63ab str r3, [r5, #56] ; 0x38 + 8002eaa: f890 3023 ldrb.w r3, [r0, #35] ; 0x23 + 8002eae: 095b lsrs r3, r3, #5 + 8002eb0: 63eb str r3, [r5, #60] ; 0x3c + 8002eb2: f890 2024 ldrb.w r2, [r0, #36] ; 0x24 + 8002eb6: ea43 03c2 orr.w r3, r3, r2, lsl #3 + 8002eba: 63eb str r3, [r5, #60] ; 0x3c + 8002ebc: f890 2025 ldrb.w r2, [r0, #37] ; 0x25 + 8002ec0: ea43 23c2 orr.w r3, r3, r2, lsl #11 + 8002ec4: 63eb str r3, [r5, #60] ; 0x3c + 8002ec6: f890 2026 ldrb.w r2, [r0, #38] ; 0x26 + 8002eca: 04d2 lsls r2, r2, #19 + 8002ecc: f402 02f0 and.w r2, r2, #7864320 ; 0x780000 + 8002ed0: 4313 orrs r3, r2 + 8002ed2: 63eb str r3, [r5, #60] ; 0x3c + 8002ed4: f890 2027 ldrb.w r2, [r0, #39] ; 0x27 + 8002ed8: f890 7026 ldrb.w r7, [r0, #38] ; 0x26 + 8002edc: 0111 lsls r1, r2, #4 + 8002ede: f401 61fe and.w r1, r1, #2032 ; 0x7f0 + 8002ee2: ea51 1117 orrs.w r1, r1, r7, lsr #4 + 8002ee6: d006 beq.n 8002ef6 <_ZN8nav_msgs8Odometry11deserializeEPh+0x24e> + 8002ee8: f5a1 7160 sub.w r1, r1, #896 ; 0x380 + 8002eec: ea43 53c1 orr.w r3, r3, r1, lsl #23 + 8002ef0: 63eb str r3, [r5, #60] ; 0x3c + 8002ef2: f890 2027 ldrb.w r2, [r0, #39] ; 0x27 + 8002ef6: 0612 lsls r2, r2, #24 + 8002ef8: f002 4200 and.w r2, r2, #2147483648 ; 0x80000000 + 8002efc: 4313 orrs r3, r2 + 8002efe: 63eb str r3, [r5, #60] ; 0x3c + 8002f00: f890 302b ldrb.w r3, [r0, #43] ; 0x2b + 8002f04: 095b lsrs r3, r3, #5 + 8002f06: 642b str r3, [r5, #64] ; 0x40 + 8002f08: f890 202c ldrb.w r2, [r0, #44] ; 0x2c + 8002f0c: ea43 03c2 orr.w r3, r3, r2, lsl #3 + 8002f10: 642b str r3, [r5, #64] ; 0x40 + 8002f12: f890 202d ldrb.w r2, [r0, #45] ; 0x2d + 8002f16: ea43 23c2 orr.w r3, r3, r2, lsl #11 + 8002f1a: 642b str r3, [r5, #64] ; 0x40 + 8002f1c: f890 202e ldrb.w r2, [r0, #46] ; 0x2e + 8002f20: 04d2 lsls r2, r2, #19 + 8002f22: f402 02f0 and.w r2, r2, #7864320 ; 0x780000 + 8002f26: 4313 orrs r3, r2 + 8002f28: 642b str r3, [r5, #64] ; 0x40 + 8002f2a: f890 202f ldrb.w r2, [r0, #47] ; 0x2f + 8002f2e: f890 702e ldrb.w r7, [r0, #46] ; 0x2e + 8002f32: 0111 lsls r1, r2, #4 + 8002f34: f401 61fe and.w r1, r1, #2032 ; 0x7f0 + 8002f38: ea51 1117 orrs.w r1, r1, r7, lsr #4 + 8002f3c: d006 beq.n 8002f4c <_ZN8nav_msgs8Odometry11deserializeEPh+0x2a4> + 8002f3e: f5a1 7160 sub.w r1, r1, #896 ; 0x380 + 8002f42: ea43 53c1 orr.w r3, r3, r1, lsl #23 + 8002f46: 642b str r3, [r5, #64] ; 0x40 + 8002f48: f890 202f ldrb.w r2, [r0, #47] ; 0x2f + 8002f4c: 0612 lsls r2, r2, #24 + 8002f4e: f002 4200 and.w r2, r2, #2147483648 ; 0x80000000 + 8002f52: 4313 orrs r3, r2 + 8002f54: 642b str r3, [r5, #64] ; 0x40 + 8002f56: f890 3033 ldrb.w r3, [r0, #51] ; 0x33 + 8002f5a: 095b lsrs r3, r3, #5 + 8002f5c: 646b str r3, [r5, #68] ; 0x44 + 8002f5e: f890 2034 ldrb.w r2, [r0, #52] ; 0x34 + 8002f62: ea43 03c2 orr.w r3, r3, r2, lsl #3 + 8002f66: 646b str r3, [r5, #68] ; 0x44 + 8002f68: f890 2035 ldrb.w r2, [r0, #53] ; 0x35 + 8002f6c: ea43 23c2 orr.w r3, r3, r2, lsl #11 + 8002f70: 646b str r3, [r5, #68] ; 0x44 + 8002f72: f890 2036 ldrb.w r2, [r0, #54] ; 0x36 + 8002f76: 04d2 lsls r2, r2, #19 + 8002f78: f402 02f0 and.w r2, r2, #7864320 ; 0x780000 + 8002f7c: 4313 orrs r3, r2 + 8002f7e: 646b str r3, [r5, #68] ; 0x44 + 8002f80: f890 2037 ldrb.w r2, [r0, #55] ; 0x37 + 8002f84: f890 7036 ldrb.w r7, [r0, #54] ; 0x36 + 8002f88: 0111 lsls r1, r2, #4 + 8002f8a: f401 61fe and.w r1, r1, #2032 ; 0x7f0 + 8002f8e: ea51 1117 orrs.w r1, r1, r7, lsr #4 + 8002f92: d006 beq.n 8002fa2 <_ZN8nav_msgs8Odometry11deserializeEPh+0x2fa> + 8002f94: f5a1 7160 sub.w r1, r1, #896 ; 0x380 + 8002f98: ea43 53c1 orr.w r3, r3, r1, lsl #23 + 8002f9c: 646b str r3, [r5, #68] ; 0x44 + 8002f9e: f890 2037 ldrb.w r2, [r0, #55] ; 0x37 + 8002fa2: 0612 lsls r2, r2, #24 + 8002fa4: 462f mov r7, r5 + 8002fa6: f105 0cd4 add.w ip, r5, #212 ; 0xd4 + 8002faa: f002 4200 and.w r2, r2, #2147483648 ; 0x80000000 + 8002fae: 4313 orrs r3, r2 + 8002fb0: f847 3f44 str.w r3, [r7, #68]! + 8002fb4: f890 203b ldrb.w r2, [r0, #59] ; 0x3b + 8002fb8: 0952 lsrs r2, r2, #5 + 8002fba: f847 2f04 str.w r2, [r7, #4]! + 8002fbe: f890 103c ldrb.w r1, [r0, #60] ; 0x3c + 8002fc2: ea42 02c1 orr.w r2, r2, r1, lsl #3 + 8002fc6: 603a str r2, [r7, #0] + 8002fc8: f890 103d ldrb.w r1, [r0, #61] ; 0x3d + 8002fcc: ea42 21c1 orr.w r1, r2, r1, lsl #11 + 8002fd0: 6039 str r1, [r7, #0] + 8002fd2: f890 203e ldrb.w r2, [r0, #62] ; 0x3e + 8002fd6: 04d2 lsls r2, r2, #19 + 8002fd8: f402 02f0 and.w r2, r2, #7864320 ; 0x780000 + 8002fdc: 430a orrs r2, r1 + 8002fde: 603a str r2, [r7, #0] + 8002fe0: f890 303f ldrb.w r3, [r0, #63] ; 0x3f + 8002fe4: f890 e03e ldrb.w lr, [r0, #62] ; 0x3e + 8002fe8: 0619 lsls r1, r3, #24 + 8002fea: 011b lsls r3, r3, #4 + 8002fec: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000 + 8002ff0: f403 63fe and.w r3, r3, #2032 ; 0x7f0 + 8002ff4: 4311 orrs r1, r2 + 8002ff6: ea53 131e orrs.w r3, r3, lr, lsr #4 + 8002ffa: f5a3 7360 sub.w r3, r3, #896 ; 0x380 + 8002ffe: f000 8163 beq.w 80032c8 <_ZN8nav_msgs8Odometry11deserializeEPh+0x620> + 8003002: ea42 53c3 orr.w r3, r2, r3, lsl #23 + 8003006: 4567 cmp r7, ip + 8003008: f100 0008 add.w r0, r0, #8 + 800300c: 603b str r3, [r7, #0] + 800300e: f890 2037 ldrb.w r2, [r0, #55] ; 0x37 + 8003012: ea4f 6202 mov.w r2, r2, lsl #24 + 8003016: f002 4200 and.w r2, r2, #2147483648 ; 0x80000000 + 800301a: ea43 0302 orr.w r3, r3, r2 + 800301e: 603b str r3, [r7, #0] + 8003020: d1c8 bne.n 8002fb4 <_ZN8nav_msgs8Odometry11deserializeEPh+0x30c> + 8003022: f504 70ac add.w r0, r4, #344 ; 0x158 + 8003026: 4430 add r0, r6 + 8003028: 78c3 ldrb r3, [r0, #3] + 800302a: 095b lsrs r3, r3, #5 + 800302c: f8c5 30e4 str.w r3, [r5, #228] ; 0xe4 + 8003030: 7902 ldrb r2, [r0, #4] + 8003032: ea43 03c2 orr.w r3, r3, r2, lsl #3 + 8003036: f8c5 30e4 str.w r3, [r5, #228] ; 0xe4 + 800303a: 7942 ldrb r2, [r0, #5] + 800303c: ea43 23c2 orr.w r3, r3, r2, lsl #11 + 8003040: f8c5 30e4 str.w r3, [r5, #228] ; 0xe4 + 8003044: 7982 ldrb r2, [r0, #6] + 8003046: 04d2 lsls r2, r2, #19 + 8003048: f402 02f0 and.w r2, r2, #7864320 ; 0x780000 + 800304c: 4313 orrs r3, r2 + 800304e: f8c5 30e4 str.w r3, [r5, #228] ; 0xe4 + 8003052: 79c2 ldrb r2, [r0, #7] + 8003054: 7986 ldrb r6, [r0, #6] + 8003056: 0111 lsls r1, r2, #4 + 8003058: f401 61fe and.w r1, r1, #2032 ; 0x7f0 + 800305c: ea51 1116 orrs.w r1, r1, r6, lsr #4 + 8003060: d006 beq.n 8003070 <_ZN8nav_msgs8Odometry11deserializeEPh+0x3c8> + 8003062: f5a1 7160 sub.w r1, r1, #896 ; 0x380 + 8003066: ea43 53c1 orr.w r3, r3, r1, lsl #23 + 800306a: f8c5 30e4 str.w r3, [r5, #228] ; 0xe4 + 800306e: 79c2 ldrb r2, [r0, #7] + 8003070: 0612 lsls r2, r2, #24 + 8003072: f002 4200 and.w r2, r2, #2147483648 ; 0x80000000 + 8003076: 4313 orrs r3, r2 + 8003078: f8c5 30e4 str.w r3, [r5, #228] ; 0xe4 + 800307c: 7ac3 ldrb r3, [r0, #11] + 800307e: 095b lsrs r3, r3, #5 + 8003080: f8c5 30e8 str.w r3, [r5, #232] ; 0xe8 + 8003084: 7b02 ldrb r2, [r0, #12] + 8003086: ea43 03c2 orr.w r3, r3, r2, lsl #3 + 800308a: f8c5 30e8 str.w r3, [r5, #232] ; 0xe8 + 800308e: 7b42 ldrb r2, [r0, #13] + 8003090: ea43 23c2 orr.w r3, r3, r2, lsl #11 + 8003094: f8c5 30e8 str.w r3, [r5, #232] ; 0xe8 + 8003098: 7b82 ldrb r2, [r0, #14] + 800309a: 04d2 lsls r2, r2, #19 + 800309c: f402 02f0 and.w r2, r2, #7864320 ; 0x780000 + 80030a0: 4313 orrs r3, r2 + 80030a2: f8c5 30e8 str.w r3, [r5, #232] ; 0xe8 + 80030a6: 7bc2 ldrb r2, [r0, #15] + 80030a8: 7b86 ldrb r6, [r0, #14] + 80030aa: 0111 lsls r1, r2, #4 + 80030ac: f401 61fe and.w r1, r1, #2032 ; 0x7f0 + 80030b0: ea51 1116 orrs.w r1, r1, r6, lsr #4 + 80030b4: d006 beq.n 80030c4 <_ZN8nav_msgs8Odometry11deserializeEPh+0x41c> + 80030b6: f5a1 7160 sub.w r1, r1, #896 ; 0x380 + 80030ba: ea43 53c1 orr.w r3, r3, r1, lsl #23 + 80030be: f8c5 30e8 str.w r3, [r5, #232] ; 0xe8 + 80030c2: 7bc2 ldrb r2, [r0, #15] + 80030c4: 0612 lsls r2, r2, #24 + 80030c6: f002 4200 and.w r2, r2, #2147483648 ; 0x80000000 + 80030ca: 4313 orrs r3, r2 + 80030cc: f8c5 30e8 str.w r3, [r5, #232] ; 0xe8 + 80030d0: 7cc3 ldrb r3, [r0, #19] + 80030d2: 095b lsrs r3, r3, #5 + 80030d4: f8c5 30ec str.w r3, [r5, #236] ; 0xec + 80030d8: 7d02 ldrb r2, [r0, #20] + 80030da: ea43 03c2 orr.w r3, r3, r2, lsl #3 + 80030de: f8c5 30ec str.w r3, [r5, #236] ; 0xec + 80030e2: 7d42 ldrb r2, [r0, #21] + 80030e4: ea43 23c2 orr.w r3, r3, r2, lsl #11 + 80030e8: f8c5 30ec str.w r3, [r5, #236] ; 0xec + 80030ec: 7d82 ldrb r2, [r0, #22] + 80030ee: 04d2 lsls r2, r2, #19 + 80030f0: f402 02f0 and.w r2, r2, #7864320 ; 0x780000 + 80030f4: 4313 orrs r3, r2 + 80030f6: f8c5 30ec str.w r3, [r5, #236] ; 0xec + 80030fa: 7dc2 ldrb r2, [r0, #23] + 80030fc: 7d86 ldrb r6, [r0, #22] + 80030fe: 0111 lsls r1, r2, #4 + 8003100: f401 61fe and.w r1, r1, #2032 ; 0x7f0 + 8003104: ea51 1116 orrs.w r1, r1, r6, lsr #4 + 8003108: d006 beq.n 8003118 <_ZN8nav_msgs8Odometry11deserializeEPh+0x470> + 800310a: f5a1 7160 sub.w r1, r1, #896 ; 0x380 + 800310e: ea43 53c1 orr.w r3, r3, r1, lsl #23 + 8003112: f8c5 30ec str.w r3, [r5, #236] ; 0xec + 8003116: 7dc2 ldrb r2, [r0, #23] + 8003118: 0612 lsls r2, r2, #24 + 800311a: f002 4200 and.w r2, r2, #2147483648 ; 0x80000000 + 800311e: 4313 orrs r3, r2 + 8003120: f8c5 30ec str.w r3, [r5, #236] ; 0xec + 8003124: 7ec3 ldrb r3, [r0, #27] + 8003126: 095b lsrs r3, r3, #5 + 8003128: f8c5 30f4 str.w r3, [r5, #244] ; 0xf4 + 800312c: 7f02 ldrb r2, [r0, #28] + 800312e: ea43 03c2 orr.w r3, r3, r2, lsl #3 + 8003132: f8c5 30f4 str.w r3, [r5, #244] ; 0xf4 + 8003136: 7f42 ldrb r2, [r0, #29] + 8003138: ea43 23c2 orr.w r3, r3, r2, lsl #11 + 800313c: f8c5 30f4 str.w r3, [r5, #244] ; 0xf4 + 8003140: 7f82 ldrb r2, [r0, #30] + 8003142: 04d2 lsls r2, r2, #19 + 8003144: f402 02f0 and.w r2, r2, #7864320 ; 0x780000 + 8003148: 4313 orrs r3, r2 + 800314a: f8c5 30f4 str.w r3, [r5, #244] ; 0xf4 + 800314e: 7fc2 ldrb r2, [r0, #31] + 8003150: 7f86 ldrb r6, [r0, #30] + 8003152: 0111 lsls r1, r2, #4 + 8003154: f401 61fe and.w r1, r1, #2032 ; 0x7f0 + 8003158: ea51 1116 orrs.w r1, r1, r6, lsr #4 + 800315c: d006 beq.n 800316c <_ZN8nav_msgs8Odometry11deserializeEPh+0x4c4> + 800315e: f5a1 7160 sub.w r1, r1, #896 ; 0x380 + 8003162: ea43 53c1 orr.w r3, r3, r1, lsl #23 + 8003166: f8c5 30f4 str.w r3, [r5, #244] ; 0xf4 + 800316a: 7fc2 ldrb r2, [r0, #31] + 800316c: 0612 lsls r2, r2, #24 + 800316e: f002 4200 and.w r2, r2, #2147483648 ; 0x80000000 + 8003172: 4313 orrs r3, r2 + 8003174: f8c5 30f4 str.w r3, [r5, #244] ; 0xf4 + 8003178: f890 3023 ldrb.w r3, [r0, #35] ; 0x23 + 800317c: 095b lsrs r3, r3, #5 + 800317e: f8c5 30f8 str.w r3, [r5, #248] ; 0xf8 + 8003182: f890 2024 ldrb.w r2, [r0, #36] ; 0x24 + 8003186: ea43 03c2 orr.w r3, r3, r2, lsl #3 + 800318a: f8c5 30f8 str.w r3, [r5, #248] ; 0xf8 + 800318e: f890 2025 ldrb.w r2, [r0, #37] ; 0x25 + 8003192: ea43 23c2 orr.w r3, r3, r2, lsl #11 + 8003196: f8c5 30f8 str.w r3, [r5, #248] ; 0xf8 + 800319a: f890 2026 ldrb.w r2, [r0, #38] ; 0x26 + 800319e: 04d2 lsls r2, r2, #19 + 80031a0: f402 02f0 and.w r2, r2, #7864320 ; 0x780000 + 80031a4: 4313 orrs r3, r2 + 80031a6: f8c5 30f8 str.w r3, [r5, #248] ; 0xf8 + 80031aa: f890 2027 ldrb.w r2, [r0, #39] ; 0x27 + 80031ae: f890 6026 ldrb.w r6, [r0, #38] ; 0x26 + 80031b2: 0111 lsls r1, r2, #4 + 80031b4: f401 61fe and.w r1, r1, #2032 ; 0x7f0 + 80031b8: ea51 1116 orrs.w r1, r1, r6, lsr #4 + 80031bc: d007 beq.n 80031ce <_ZN8nav_msgs8Odometry11deserializeEPh+0x526> + 80031be: f5a1 7160 sub.w r1, r1, #896 ; 0x380 + 80031c2: ea43 53c1 orr.w r3, r3, r1, lsl #23 + 80031c6: f8c5 30f8 str.w r3, [r5, #248] ; 0xf8 + 80031ca: f890 2027 ldrb.w r2, [r0, #39] ; 0x27 + 80031ce: 0612 lsls r2, r2, #24 + 80031d0: f002 4200 and.w r2, r2, #2147483648 ; 0x80000000 + 80031d4: 4313 orrs r3, r2 + 80031d6: f8c5 30f8 str.w r3, [r5, #248] ; 0xf8 + 80031da: f890 302b ldrb.w r3, [r0, #43] ; 0x2b + 80031de: 095b lsrs r3, r3, #5 + 80031e0: f8c5 30fc str.w r3, [r5, #252] ; 0xfc + 80031e4: f890 202c ldrb.w r2, [r0, #44] ; 0x2c + 80031e8: ea43 03c2 orr.w r3, r3, r2, lsl #3 + 80031ec: f8c5 30fc str.w r3, [r5, #252] ; 0xfc + 80031f0: f890 202d ldrb.w r2, [r0, #45] ; 0x2d + 80031f4: ea43 23c2 orr.w r3, r3, r2, lsl #11 + 80031f8: f8c5 30fc str.w r3, [r5, #252] ; 0xfc + 80031fc: f890 202e ldrb.w r2, [r0, #46] ; 0x2e + 8003200: 04d2 lsls r2, r2, #19 + 8003202: f402 02f0 and.w r2, r2, #7864320 ; 0x780000 + 8003206: 4313 orrs r3, r2 + 8003208: f8c5 30fc str.w r3, [r5, #252] ; 0xfc + 800320c: f890 202f ldrb.w r2, [r0, #47] ; 0x2f + 8003210: f890 602e ldrb.w r6, [r0, #46] ; 0x2e + 8003214: 0111 lsls r1, r2, #4 + 8003216: f401 61fe and.w r1, r1, #2032 ; 0x7f0 + 800321a: ea51 1116 orrs.w r1, r1, r6, lsr #4 + 800321e: d007 beq.n 8003230 <_ZN8nav_msgs8Odometry11deserializeEPh+0x588> + 8003220: f5a1 7160 sub.w r1, r1, #896 ; 0x380 + 8003224: ea43 53c1 orr.w r3, r3, r1, lsl #23 + 8003228: f8c5 30fc str.w r3, [r5, #252] ; 0xfc + 800322c: f890 202f ldrb.w r2, [r0, #47] ; 0x2f + 8003230: 0612 lsls r2, r2, #24 + 8003232: 4629 mov r1, r5 + 8003234: f505 75c6 add.w r5, r5, #396 ; 0x18c + 8003238: f002 4200 and.w r2, r2, #2147483648 ; 0x80000000 + 800323c: 4313 orrs r3, r2 + 800323e: f841 3ffc str.w r3, [r1, #252]! + 8003242: f890 2033 ldrb.w r2, [r0, #51] ; 0x33 + 8003246: 0952 lsrs r2, r2, #5 + 8003248: f841 2f04 str.w r2, [r1, #4]! + 800324c: f890 3034 ldrb.w r3, [r0, #52] ; 0x34 + 8003250: ea42 02c3 orr.w r2, r2, r3, lsl #3 + 8003254: 600a str r2, [r1, #0] + 8003256: f890 3035 ldrb.w r3, [r0, #53] ; 0x35 + 800325a: ea42 23c3 orr.w r3, r2, r3, lsl #11 + 800325e: 600b str r3, [r1, #0] + 8003260: f890 2036 ldrb.w r2, [r0, #54] ; 0x36 + 8003264: 04d2 lsls r2, r2, #19 + 8003266: f402 02f0 and.w r2, r2, #7864320 ; 0x780000 + 800326a: 431a orrs r2, r3 + 800326c: 600a str r2, [r1, #0] + 800326e: f890 3037 ldrb.w r3, [r0, #55] ; 0x37 + 8003272: f890 7036 ldrb.w r7, [r0, #54] ; 0x36 + 8003276: 061e lsls r6, r3, #24 + 8003278: 011b lsls r3, r3, #4 + 800327a: f006 4600 and.w r6, r6, #2147483648 ; 0x80000000 + 800327e: f403 63fe and.w r3, r3, #2032 ; 0x7f0 + 8003282: 4316 orrs r6, r2 + 8003284: ea53 1317 orrs.w r3, r3, r7, lsr #4 + 8003288: f5a3 7360 sub.w r3, r3, #896 ; 0x380 + 800328c: d013 beq.n 80032b6 <_ZN8nav_msgs8Odometry11deserializeEPh+0x60e> + 800328e: ea42 53c3 orr.w r3, r2, r3, lsl #23 + 8003292: 428d cmp r5, r1 + 8003294: f100 0008 add.w r0, r0, #8 + 8003298: 600b str r3, [r1, #0] + 800329a: f890 202f ldrb.w r2, [r0, #47] ; 0x2f + 800329e: ea4f 6202 mov.w r2, r2, lsl #24 + 80032a2: f002 4200 and.w r2, r2, #2147483648 ; 0x80000000 + 80032a6: ea43 0302 orr.w r3, r3, r2 + 80032aa: 600b str r3, [r1, #0] + 80032ac: d1c9 bne.n 8003242 <_ZN8nav_msgs8Odometry11deserializeEPh+0x59a> + 80032ae: f504 702a add.w r0, r4, #680 ; 0x2a8 + 80032b2: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} + 80032b6: 428d cmp r5, r1 + 80032b8: 600e str r6, [r1, #0] + 80032ba: f100 0008 add.w r0, r0, #8 + 80032be: d1c0 bne.n 8003242 <_ZN8nav_msgs8Odometry11deserializeEPh+0x59a> + 80032c0: f504 702a add.w r0, r4, #680 ; 0x2a8 + 80032c4: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} + 80032c8: 4567 cmp r7, ip + 80032ca: 6039 str r1, [r7, #0] + 80032cc: f100 0008 add.w r0, r0, #8 + 80032d0: f47f ae70 bne.w 8002fb4 <_ZN8nav_msgs8Odometry11deserializeEPh+0x30c> + 80032d4: e6a5 b.n 8003022 <_ZN8nav_msgs8Odometry11deserializeEPh+0x37a> + 80032d6: bf00 nop + +080032d8 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE>: + 80032d8: 2963 cmp r1, #99 ; 0x63 + 80032da: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} + 80032de: b085 sub sp, #20 + 80032e0: dd03 ble.n 80032ea <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x12> + 80032e2: f890 5680 ldrb.w r5, [r0, #1664] ; 0x680 + 80032e6: 2d00 cmp r5, #0 + 80032e8: d056 beq.n 8003398 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0xc0> + 80032ea: 4604 mov r4, r0 + 80032ec: 6813 ldr r3, [r2, #0] + 80032ee: 460d mov r5, r1 + 80032f0: 4610 mov r0, r2 + 80032f2: f204 31ab addw r1, r4, #939 ; 0x3ab + 80032f6: 681b ldr r3, [r3, #0] + 80032f8: 4798 blx r3 + 80032fa: f3c0 2207 ubfx r2, r0, #8, #8 + 80032fe: b2c1 uxtb r1, r0 + 8003300: f345 2707 sbfx r7, r5, #8, #8 + 8003304: f64f 66ff movw r6, #65279 ; 0xfeff + 8003308: f884 53a9 strb.w r5, [r4, #937] ; 0x3a9 + 800330c: 188b adds r3, r1, r2 + 800330e: f884 73aa strb.w r7, [r4, #938] ; 0x3aa + 8003312: f884 13a6 strb.w r1, [r4, #934] ; 0x3a6 + 8003316: 43db mvns r3, r3 + 8003318: f884 23a7 strb.w r2, [r4, #935] ; 0x3a7 + 800331c: f8a4 63a4 strh.w r6, [r4, #932] ; 0x3a4 + 8003320: f884 33a8 strb.w r3, [r4, #936] ; 0x3a8 + 8003324: 1c43 adds r3, r0, #1 + 8003326: db67 blt.n 80033f8 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x120> + 8003328: f204 35aa addw r5, r4, #938 ; 0x3aa + 800332c: f504 736a add.w r3, r4, #936 ; 0x3a8 + 8003330: 2200 movs r2, #0 + 8003332: 4405 add r5, r0 + 8003334: f813 1f01 ldrb.w r1, [r3, #1]! + 8003338: 429d cmp r5, r3 + 800333a: 440a add r2, r1 + 800333c: d1fa bne.n 8003334 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x5c> + 800333e: 43d2 mvns r2, r2 + 8003340: b2d2 uxtb r2, r2 + 8003342: f100 0508 add.w r5, r0, #8 + 8003346: 1823 adds r3, r4, r0 + 8003348: f5b5 7f00 cmp.w r5, #512 ; 0x200 + 800334c: f883 23ab strb.w r2, [r3, #939] ; 0x3ab + 8003350: dc54 bgt.n 80033fc <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x124> + 8003352: f8d4 018c ldr.w r0, [r4, #396] ; 0x18c + 8003356: f5b5 7f80 cmp.w r5, #256 ; 0x100 + 800335a: 462f mov r7, r5 + 800335c: f104 0804 add.w r8, r4, #4 + 8003360: f5c0 7680 rsb r6, r0, #256 ; 0x100 + 8003364: bfa8 it ge + 8003366: f44f 7780 movge.w r7, #256 ; 0x100 + 800336a: f504 7969 add.w r9, r4, #932 ; 0x3a4 + 800336e: 3088 adds r0, #136 ; 0x88 + 8003370: 42be cmp r6, r7 + 8003372: 4649 mov r1, r9 + 8003374: 4440 add r0, r8 + 8003376: bf28 it cs + 8003378: 463e movcs r6, r7 + 800337a: 4632 mov r2, r6 + 800337c: f006 fcf6 bl 8009d6c + 8003380: f8d4 318c ldr.w r3, [r4, #396] ; 0x18c + 8003384: 42b7 cmp r7, r6 + 8003386: 443b add r3, r7 + 8003388: b2db uxtb r3, r3 + 800338a: f8c4 318c str.w r3, [r4, #396] ; 0x18c + 800338e: d107 bne.n 80033a0 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0xc8> + 8003390: 6860 ldr r0, [r4, #4] + 8003392: 6f43 ldr r3, [r0, #116] ; 0x74 + 8003394: 2b20 cmp r3, #32 + 8003396: d00e beq.n 80033b6 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0xde> + 8003398: 4628 mov r0, r5 + 800339a: b005 add sp, #20 + 800339c: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} + 80033a0: 1bba subs r2, r7, r6 + 80033a2: eb09 0106 add.w r1, r9, r6 + 80033a6: f104 008c add.w r0, r4, #140 ; 0x8c + 80033aa: f006 fcdf bl 8009d6c + 80033ae: 6860 ldr r0, [r4, #4] + 80033b0: 6f43 ldr r3, [r0, #116] ; 0x74 + 80033b2: 2b20 cmp r3, #32 + 80033b4: d1f0 bne.n 8003398 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0xc0> + 80033b6: 4e59 ldr r6, [pc, #356] ; (800351c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x244>) + 80033b8: 7833 ldrb r3, [r6, #0] + 80033ba: 2b00 cmp r3, #0 + 80033bc: d1ec bne.n 8003398 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0xc0> + 80033be: f8d4 118c ldr.w r1, [r4, #396] ; 0x18c + 80033c2: 2301 movs r3, #1 + 80033c4: f8d4 2190 ldr.w r2, [r4, #400] ; 0x190 + 80033c8: 7033 strb r3, [r6, #0] + 80033ca: 4291 cmp r1, r2 + 80033cc: d011 beq.n 80033f2 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x11a> + 80033ce: b293 uxth r3, r2 + 80033d0: bf8c ite hi + 80033d2: 1acb subhi r3, r1, r3 + 80033d4: f5c3 7380 rsbls r3, r3, #256 ; 0x100 + 80033d8: f102 0188 add.w r1, r2, #136 ; 0x88 + 80033dc: b29f uxth r7, r3 + 80033de: 4441 add r1, r8 + 80033e0: 463a mov r2, r7 + 80033e2: f004 fce5 bl 8007db0 + 80033e6: f8d4 3190 ldr.w r3, [r4, #400] ; 0x190 + 80033ea: 443b add r3, r7 + 80033ec: b2db uxtb r3, r3 + 80033ee: f8c4 3190 str.w r3, [r4, #400] ; 0x190 + 80033f2: 2300 movs r3, #0 + 80033f4: 7033 strb r3, [r6, #0] + 80033f6: e7cf b.n 8003398 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0xc0> + 80033f8: 22ff movs r2, #255 ; 0xff + 80033fa: e7a2 b.n 8003342 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x6a> + 80033fc: 6822 ldr r2, [r4, #0] + 80033fe: 2303 movs r3, #3 + 8003400: 4947 ldr r1, [pc, #284] ; (8003520 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x248>) + 8003402: f88d 3008 strb.w r3, [sp, #8] + 8003406: 6816 ldr r6, [r2, #0] + 8003408: 4a46 ldr r2, [pc, #280] ; (8003524 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x24c>) + 800340a: 4d47 ldr r5, [pc, #284] ; (8003528 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x250>) + 800340c: 4296 cmp r6, r2 + 800340e: 9101 str r1, [sp, #4] + 8003410: 9503 str r5, [sp, #12] + 8003412: d17d bne.n 8003510 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x238> + 8003414: 2238 movs r2, #56 ; 0x38 + 8003416: f504 776c add.w r7, r4, #944 ; 0x3b0 + 800341a: f105 0c30 add.w ip, r5, #48 ; 0x30 + 800341e: f884 33ab strb.w r3, [r4, #939] ; 0x3ab + 8003422: f8c4 23ac str.w r2, [r4, #940] ; 0x3ac + 8003426: 462e mov r6, r5 + 8003428: 3710 adds r7, #16 + 800342a: 3510 adds r5, #16 + 800342c: ce0f ldmia r6!, {r0, r1, r2, r3} + 800342e: 4566 cmp r6, ip + 8003430: f847 0c10 str.w r0, [r7, #-16] + 8003434: f847 1c0c str.w r1, [r7, #-12] + 8003438: f847 2c08 str.w r2, [r7, #-8] + 800343c: f847 3c04 str.w r3, [r7, #-4] + 8003440: d1f1 bne.n 8003426 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x14e> + 8003442: 2600 movs r6, #0 + 8003444: f8df e0e4 ldr.w lr, [pc, #228] ; 800352c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x254> + 8003448: f240 7cc2 movw ip, #1986 ; 0x7c2 + 800344c: f504 736a add.w r3, r4, #936 ; 0x3a8 + 8003450: 4632 mov r2, r6 + 8003452: cd03 ldmia r5!, {r0, r1} + 8003454: 6038 str r0, [r7, #0] + 8003456: f204 30e7 addw r0, r4, #999 ; 0x3e7 + 800345a: 6079 str r1, [r7, #4] + 800345c: f884 63aa strb.w r6, [r4, #938] ; 0x3aa + 8003460: f8c4 e3a4 str.w lr, [r4, #932] ; 0x3a4 + 8003464: f8a4 c3a8 strh.w ip, [r4, #936] ; 0x3a8 + 8003468: f813 1f01 ldrb.w r1, [r3, #1]! + 800346c: 4283 cmp r3, r0 + 800346e: 440a add r2, r1 + 8003470: d1fa bne.n 8003468 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x190> + 8003472: f8d4 318c ldr.w r3, [r4, #396] ; 0x18c + 8003476: 43d2 mvns r2, r2 + 8003478: 1d25 adds r5, r4, #4 + 800347a: f504 7769 add.w r7, r4, #932 ; 0x3a4 + 800347e: f5c3 7680 rsb r6, r3, #256 ; 0x100 + 8003482: 3388 adds r3, #136 ; 0x88 + 8003484: f884 23e8 strb.w r2, [r4, #1000] ; 0x3e8 + 8003488: 4639 mov r1, r7 + 800348a: 2e45 cmp r6, #69 ; 0x45 + 800348c: 46b0 mov r8, r6 + 800348e: eb05 0003 add.w r0, r5, r3 + 8003492: bf28 it cs + 8003494: f04f 0845 movcs.w r8, #69 ; 0x45 + 8003498: 4642 mov r2, r8 + 800349a: f006 fc67 bl 8009d6c + 800349e: f8d4 318c ldr.w r3, [r4, #396] ; 0x18c + 80034a2: 2e44 cmp r6, #68 ; 0x44 + 80034a4: f103 0345 add.w r3, r3, #69 ; 0x45 + 80034a8: b2db uxtb r3, r3 + 80034aa: f8c4 318c str.w r3, [r4, #396] ; 0x18c + 80034ae: d807 bhi.n 80034c0 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x1e8> + 80034b0: eb07 0108 add.w r1, r7, r8 + 80034b4: f1c8 0245 rsb r2, r8, #69 ; 0x45 + 80034b8: f104 008c add.w r0, r4, #140 ; 0x8c + 80034bc: f006 fc56 bl 8009d6c + 80034c0: 6860 ldr r0, [r4, #4] + 80034c2: 6f43 ldr r3, [r0, #116] ; 0x74 + 80034c4: 2b20 cmp r3, #32 + 80034c6: d002 beq.n 80034ce <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x1f6> + 80034c8: f04f 35ff mov.w r5, #4294967295 ; 0xffffffff + 80034cc: e764 b.n 8003398 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0xc0> + 80034ce: 4e13 ldr r6, [pc, #76] ; (800351c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x244>) + 80034d0: 7833 ldrb r3, [r6, #0] + 80034d2: 2b00 cmp r3, #0 + 80034d4: d1f8 bne.n 80034c8 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x1f0> + 80034d6: f8d4 118c ldr.w r1, [r4, #396] ; 0x18c + 80034da: 2301 movs r3, #1 + 80034dc: f8d4 2190 ldr.w r2, [r4, #400] ; 0x190 + 80034e0: 7033 strb r3, [r6, #0] + 80034e2: 4291 cmp r1, r2 + 80034e4: d011 beq.n 800350a <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x232> + 80034e6: b293 uxth r3, r2 + 80034e8: bf8c ite hi + 80034ea: 1acb subhi r3, r1, r3 + 80034ec: f5c3 7380 rsbls r3, r3, #256 ; 0x100 + 80034f0: f102 0188 add.w r1, r2, #136 ; 0x88 + 80034f4: b29f uxth r7, r3 + 80034f6: 4429 add r1, r5 + 80034f8: 463a mov r2, r7 + 80034fa: f004 fc59 bl 8007db0 + 80034fe: f8d4 3190 ldr.w r3, [r4, #400] ; 0x190 + 8003502: 443b add r3, r7 + 8003504: b2db uxtb r3, r3 + 8003506: f8c4 3190 str.w r3, [r4, #400] ; 0x190 + 800350a: 2300 movs r3, #0 + 800350c: 7033 strb r3, [r6, #0] + 800350e: e7db b.n 80034c8 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x1f0> + 8003510: 4620 mov r0, r4 + 8003512: aa01 add r2, sp, #4 + 8003514: 2107 movs r1, #7 + 8003516: 47b0 blx r6 + 8003518: e7d6 b.n 80034c8 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x1f0> + 800351a: bf00 nop + 800351c: 2000009c .word 0x2000009c + 8003520: 0800a010 .word 0x0800a010 + 8003524: 080032d9 .word 0x080032d9 + 8003528: 0800a380 .word 0x0800a380 + 800352c: 003dfeff .word 0x003dfeff + +08003530 <_ZN8nav_msgs8OdometryC1Ev>: + 8003530: b5f8 push {r3, r4, r5, r6, r7, lr} + 8003532: 4604 mov r4, r0 + 8003534: 4b20 ldr r3, [pc, #128] ; (80035b8 <_ZN8nav_msgs8OdometryC1Ev+0x88>) + 8003536: 4d21 ldr r5, [pc, #132] ; (80035bc <_ZN8nav_msgs8OdometryC1Ev+0x8c>) + 8003538: 2600 movs r6, #0 + 800353a: 61e3 str r3, [r4, #28] + 800353c: 2790 movs r7, #144 ; 0x90 + 800353e: 6225 str r5, [r4, #32] + 8003540: 4631 mov r1, r6 + 8003542: 4b1f ldr r3, [pc, #124] ; (80035c0 <_ZN8nav_msgs8OdometryC1Ev+0x90>) + 8003544: 4d1f ldr r5, [pc, #124] ; (80035c4 <_ZN8nav_msgs8OdometryC1Ev+0x94>) + 8003546: 6263 str r3, [r4, #36] ; 0x24 + 8003548: 6365 str r5, [r4, #52] ; 0x34 + 800354a: 2500 movs r5, #0 + 800354c: 4b1e ldr r3, [pc, #120] ; (80035c8 <_ZN8nav_msgs8OdometryC1Ev+0x98>) + 800354e: 481f ldr r0, [pc, #124] ; (80035cc <_ZN8nav_msgs8OdometryC1Ev+0x9c>) + 8003550: 4a1f ldr r2, [pc, #124] ; (80035d0 <_ZN8nav_msgs8OdometryC1Ev+0xa0>) + 8003552: 6020 str r0, [r4, #0] + 8003554: f104 0048 add.w r0, r4, #72 ; 0x48 + 8003558: 6062 str r2, [r4, #4] + 800355a: 463a mov r2, r7 + 800355c: 61a3 str r3, [r4, #24] + 800355e: 62a5 str r5, [r4, #40] ; 0x28 + 8003560: 62e5 str r5, [r4, #44] ; 0x2c + 8003562: 6325 str r5, [r4, #48] ; 0x30 + 8003564: 63a5 str r5, [r4, #56] ; 0x38 + 8003566: 63e5 str r5, [r4, #60] ; 0x3c + 8003568: 6425 str r5, [r4, #64] ; 0x40 + 800356a: 6465 str r5, [r4, #68] ; 0x44 + 800356c: e9c4 6304 strd r6, r3, [r4, #16] + 8003570: e9c4 6602 strd r6, r6, [r4, #8] + 8003574: f006 fc1e bl 8009db4 + 8003578: 4b16 ldr r3, [pc, #88] ; (80035d4 <_ZN8nav_msgs8OdometryC1Ev+0xa4>) + 800357a: f8df e05c ldr.w lr, [pc, #92] ; 80035d8 <_ZN8nav_msgs8OdometryC1Ev+0xa8> + 800357e: 463a mov r2, r7 + 8003580: f8df c058 ldr.w ip, [pc, #88] ; 80035dc <_ZN8nav_msgs8OdometryC1Ev+0xac> + 8003584: 4631 mov r1, r6 + 8003586: f8c4 50e4 str.w r5, [r4, #228] ; 0xe4 + 800358a: f504 7080 add.w r0, r4, #256 ; 0x100 + 800358e: f8c4 50e8 str.w r5, [r4, #232] ; 0xe8 + 8003592: f8c4 50ec str.w r5, [r4, #236] ; 0xec + 8003596: f8c4 50f4 str.w r5, [r4, #244] ; 0xf4 + 800359a: f8c4 50f8 str.w r5, [r4, #248] ; 0xf8 + 800359e: f8c4 50fc str.w r5, [r4, #252] ; 0xfc + 80035a2: f8c4 30e0 str.w r3, [r4, #224] ; 0xe0 + 80035a6: f8c4 30f0 str.w r3, [r4, #240] ; 0xf0 + 80035aa: e9c4 ec36 strd lr, ip, [r4, #216] ; 0xd8 + 80035ae: f006 fc01 bl 8009db4 + 80035b2: 4620 mov r0, r4 + 80035b4: bdf8 pop {r3, r4, r5, r6, r7, pc} + 80035b6: bf00 nop + 80035b8: 0800a0a0 .word 0x0800a0a0 + 80035bc: 0800a088 .word 0x0800a088 + 80035c0: 0800a058 .word 0x0800a058 + 80035c4: 0800a070 .word 0x0800a070 + 80035c8: 0800a3b8 .word 0x0800a3b8 + 80035cc: 0800a100 .word 0x0800a100 + 80035d0: 0800a040 .word 0x0800a040 + 80035d4: 0800a0b8 .word 0x0800a0b8 + 80035d8: 0800a0e8 .word 0x0800a0e8 + 80035dc: 0800a0d0 .word 0x0800a0d0 + +080035e0 <_Z18SystemClock_Configv>: + 80035e0: b530 push {r4, r5, lr} + 80035e2: 2400 movs r4, #0 + 80035e4: b0b9 sub sp, #228 ; 0xe4 + 80035e6: 2230 movs r2, #48 ; 0x30 + 80035e8: 2501 movs r5, #1 + 80035ea: 4621 mov r1, r4 + 80035ec: a808 add r0, sp, #32 + 80035ee: f006 fbe1 bl 8009db4 + 80035f2: 4621 mov r1, r4 + 80035f4: a814 add r0, sp, #80 ; 0x50 + 80035f6: 2290 movs r2, #144 ; 0x90 + 80035f8: 9406 str r4, [sp, #24] + 80035fa: e9cd 4402 strd r4, r4, [sp, #8] + 80035fe: e9cd 4404 strd r4, r4, [sp, #16] + 8003602: f006 fbd7 bl 8009db4 + 8003606: 4b19 ldr r3, [pc, #100] ; (800366c <_Z18SystemClock_Configv+0x8c>) + 8003608: 4a19 ldr r2, [pc, #100] ; (8003670 <_Z18SystemClock_Configv+0x90>) + 800360a: 2002 movs r0, #2 + 800360c: 6c19 ldr r1, [r3, #64] ; 0x40 + 800360e: f041 5180 orr.w r1, r1, #268435456 ; 0x10000000 + 8003612: 6419 str r1, [r3, #64] ; 0x40 + 8003614: 2110 movs r1, #16 + 8003616: 6c1b ldr r3, [r3, #64] ; 0x40 + 8003618: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 + 800361c: 9300 str r3, [sp, #0] + 800361e: 9b00 ldr r3, [sp, #0] + 8003620: 6813 ldr r3, [r2, #0] + 8003622: f423 4340 bic.w r3, r3, #49152 ; 0xc000 + 8003626: f443 4380 orr.w r3, r3, #16384 ; 0x4000 + 800362a: 6013 str r3, [r2, #0] + 800362c: 6813 ldr r3, [r2, #0] + 800362e: 9007 str r0, [sp, #28] + 8003630: a807 add r0, sp, #28 + 8003632: f403 4340 and.w r3, r3, #49152 ; 0xc000 + 8003636: 910b str r1, [sp, #44] ; 0x2c + 8003638: 940d str r4, [sp, #52] ; 0x34 + 800363a: 9301 str r3, [sp, #4] + 800363c: 9b01 ldr r3, [sp, #4] + 800363e: 950a str r5, [sp, #40] ; 0x28 + 8003640: f003 f8ec bl 800681c + 8003644: 230f movs r3, #15 + 8003646: 4621 mov r1, r4 + 8003648: a802 add r0, sp, #8 + 800364a: 9302 str r3, [sp, #8] + 800364c: e9cd 4403 strd r4, r4, [sp, #12] + 8003650: e9cd 4405 strd r4, r4, [sp, #20] + 8003654: f003 fab0 bl 8006bb8 + 8003658: f44f 6310 mov.w r3, #2304 ; 0x900 + 800365c: a814 add r0, sp, #80 ; 0x50 + 800365e: 9427 str r4, [sp, #156] ; 0x9c + 8003660: 942a str r4, [sp, #168] ; 0xa8 + 8003662: 9314 str r3, [sp, #80] ; 0x50 + 8003664: f003 fbc6 bl 8006df4 + 8003668: b039 add sp, #228 ; 0xe4 + 800366a: bd30 pop {r4, r5, pc} + 800366c: 40023800 .word 0x40023800 + 8003670: 40007000 .word 0x40007000 + +08003674
: + 8003674: 2400 movs r4, #0 + 8003676: 4dc0 ldr r5, [pc, #768] ; (8003978 ) + 8003678: 2601 movs r6, #1 + 800367a: f04f 0808 mov.w r8, #8 + 800367e: f04f 39ff mov.w r9, #4294967295 ; 0xffffffff + 8003682: f44f 5a80 mov.w sl, #4096 ; 0x1000 + 8003686: e92d 4880 stmdb sp!, {r7, fp, lr} + 800368a: b09b sub sp, #108 ; 0x6c + 800368c: 2703 movs r7, #3 + 800368e: f002 fd49 bl 8006124 + 8003692: f8df b324 ldr.w fp, [pc, #804] ; 80039b8 + 8003696: f7ff ffa3 bl 80035e0 <_Z18SystemClock_Configv> + 800369a: 9413 str r4, [sp, #76] ; 0x4c + 800369c: 9414 str r4, [sp, #80] ; 0x50 + 800369e: 4622 mov r2, r4 + 80036a0: 9415 str r4, [sp, #84] ; 0x54 + 80036a2: f44f 4160 mov.w r1, #57344 ; 0xe000 + 80036a6: 48b5 ldr r0, [pc, #724] ; (800397c ) + 80036a8: e9cd 4411 strd r4, r4, [sp, #68] ; 0x44 + 80036ac: 6b2b ldr r3, [r5, #48] ; 0x30 + 80036ae: f043 0304 orr.w r3, r3, #4 + 80036b2: 632b str r3, [r5, #48] ; 0x30 + 80036b4: 6b2b ldr r3, [r5, #48] ; 0x30 + 80036b6: f003 0304 and.w r3, r3, #4 + 80036ba: 9304 str r3, [sp, #16] + 80036bc: 9b04 ldr r3, [sp, #16] + 80036be: 6b2b ldr r3, [r5, #48] ; 0x30 + 80036c0: 4333 orrs r3, r6 + 80036c2: 632b str r3, [r5, #48] ; 0x30 + 80036c4: 6b2b ldr r3, [r5, #48] ; 0x30 + 80036c6: 4033 ands r3, r6 + 80036c8: 9305 str r3, [sp, #20] + 80036ca: 9b05 ldr r3, [sp, #20] + 80036cc: 6b2b ldr r3, [r5, #48] ; 0x30 + 80036ce: f043 0320 orr.w r3, r3, #32 + 80036d2: 632b str r3, [r5, #48] ; 0x30 + 80036d4: 6b2b ldr r3, [r5, #48] ; 0x30 + 80036d6: f003 0320 and.w r3, r3, #32 + 80036da: 9306 str r3, [sp, #24] + 80036dc: 9b06 ldr r3, [sp, #24] + 80036de: 6b2b ldr r3, [r5, #48] ; 0x30 + 80036e0: f043 0310 orr.w r3, r3, #16 + 80036e4: 632b str r3, [r5, #48] ; 0x30 + 80036e6: 6b2b ldr r3, [r5, #48] ; 0x30 + 80036e8: f003 0310 and.w r3, r3, #16 + 80036ec: 9307 str r3, [sp, #28] + 80036ee: 9b07 ldr r3, [sp, #28] + 80036f0: 6b2b ldr r3, [r5, #48] ; 0x30 + 80036f2: ea43 0308 orr.w r3, r3, r8 + 80036f6: 632b str r3, [r5, #48] ; 0x30 + 80036f8: 6b2b ldr r3, [r5, #48] ; 0x30 + 80036fa: ea03 0308 and.w r3, r3, r8 + 80036fe: 9308 str r3, [sp, #32] + 8003700: 9b08 ldr r3, [sp, #32] + 8003702: 6b2b ldr r3, [r5, #48] ; 0x30 + 8003704: f043 0302 orr.w r3, r3, #2 + 8003708: 632b str r3, [r5, #48] ; 0x30 + 800370a: 6b2b ldr r3, [r5, #48] ; 0x30 + 800370c: f003 0302 and.w r3, r3, #2 + 8003710: 9309 str r3, [sp, #36] ; 0x24 + 8003712: 9b09 ldr r3, [sp, #36] ; 0x24 + 8003714: f003 f87e bl 8006814 + 8003718: 4622 mov r2, r4 + 800371a: f44f 7180 mov.w r1, #256 ; 0x100 + 800371e: 4898 ldr r0, [pc, #608] ; (8003980 ) + 8003720: f003 f878 bl 8006814 + 8003724: a911 add r1, sp, #68 ; 0x44 + 8003726: 4897 ldr r0, [pc, #604] ; (8003984 ) + 8003728: 9413 str r4, [sp, #76] ; 0x4c + 800372a: e9cd 6711 strd r6, r7, [sp, #68] ; 0x44 + 800372e: f002 ff53 bl 80065d8 + 8003732: a911 add r1, sp, #68 ; 0x44 + 8003734: 4894 ldr r0, [pc, #592] ; (8003988 ) + 8003736: f8cd 8044 str.w r8, [sp, #68] ; 0x44 + 800373a: e9cd 7412 strd r7, r4, [sp, #72] ; 0x48 + 800373e: f002 ff4b bl 80065d8 + 8003742: 2340 movs r3, #64 ; 0x40 + 8003744: a911 add r1, sp, #68 ; 0x44 + 8003746: 4890 ldr r0, [pc, #576] ; (8003988 ) + 8003748: 9311 str r3, [sp, #68] ; 0x44 + 800374a: e9cd 4412 strd r4, r4, [sp, #72] ; 0x48 + 800374e: f002 ff43 bl 80065d8 + 8003752: f44f 4360 mov.w r3, #57344 ; 0xe000 + 8003756: a911 add r1, sp, #68 ; 0x44 + 8003758: 4888 ldr r0, [pc, #544] ; (800397c ) + 800375a: 9311 str r3, [sp, #68] ; 0x44 + 800375c: 9414 str r4, [sp, #80] ; 0x50 + 800375e: e9cd 6412 strd r6, r4, [sp, #72] ; 0x48 + 8003762: f002 ff39 bl 80065d8 + 8003766: f44f 7300 mov.w r3, #512 ; 0x200 + 800376a: a911 add r1, sp, #68 ; 0x44 + 800376c: 4887 ldr r0, [pc, #540] ; (800398c ) + 800376e: 9311 str r3, [sp, #68] ; 0x44 + 8003770: e9cd 4412 strd r4, r4, [sp, #72] ; 0x48 + 8003774: f002 ff30 bl 80065d8 + 8003778: f44f 7380 mov.w r3, #256 ; 0x100 + 800377c: a911 add r1, sp, #68 ; 0x44 + 800377e: 4880 ldr r0, [pc, #512] ; (8003980 ) + 8003780: 9311 str r3, [sp, #68] ; 0x44 + 8003782: 9414 str r4, [sp, #80] ; 0x50 + 8003784: e9cd 6412 strd r6, r4, [sp, #72] ; 0x48 + 8003788: f002 ff26 bl 80065d8 + 800378c: 6b2b ldr r3, [r5, #48] ; 0x30 + 800378e: 4622 mov r2, r4 + 8003790: 4621 mov r1, r4 + 8003792: f443 1300 orr.w r3, r3, #2097152 ; 0x200000 + 8003796: 200c movs r0, #12 + 8003798: 632b str r3, [r5, #48] ; 0x30 + 800379a: 6b2b ldr r3, [r5, #48] ; 0x30 + 800379c: f403 1300 and.w r3, r3, #2097152 ; 0x200000 + 80037a0: 9302 str r3, [sp, #8] + 80037a2: 9b02 ldr r3, [sp, #8] + 80037a4: 6b2b ldr r3, [r5, #48] ; 0x30 + 80037a6: f443 0380 orr.w r3, r3, #4194304 ; 0x400000 + 80037aa: 632b str r3, [r5, #48] ; 0x30 + 80037ac: 6b2b ldr r3, [r5, #48] ; 0x30 + 80037ae: 4d78 ldr r5, [pc, #480] ; (8003990 ) + 80037b0: f403 0380 and.w r3, r3, #4194304 ; 0x400000 + 80037b4: 9303 str r3, [sp, #12] + 80037b6: 9b03 ldr r3, [sp, #12] + 80037b8: f002 fce6 bl 8006188 + 80037bc: 200c movs r0, #12 + 80037be: f002 fd19 bl 80061f4 + 80037c2: 4622 mov r2, r4 + 80037c4: 4621 mov r1, r4 + 80037c6: 200e movs r0, #14 + 80037c8: f002 fcde bl 8006188 + 80037cc: 200e movs r0, #14 + 80037ce: f002 fd11 bl 80061f4 + 80037d2: 4622 mov r2, r4 + 80037d4: 4621 mov r1, r4 + 80037d6: 2039 movs r0, #57 ; 0x39 + 80037d8: f002 fcd6 bl 8006188 + 80037dc: 2039 movs r0, #57 ; 0x39 + 80037de: f002 fd09 bl 80061f4 + 80037e2: 4622 mov r2, r4 + 80037e4: 4621 mov r1, r4 + 80037e6: 2045 movs r0, #69 ; 0x45 + 80037e8: f002 fcce bl 8006188 + 80037ec: 2045 movs r0, #69 ; 0x45 + 80037ee: f002 fd01 bl 80061f4 + 80037f2: 2220 movs r2, #32 + 80037f4: 4621 mov r1, r4 + 80037f6: a812 add r0, sp, #72 ; 0x48 + 80037f8: f006 fadc bl 8009db4 + 80037fc: f04f 4380 mov.w r3, #1073741824 ; 0x40000000 + 8003800: a911 add r1, sp, #68 ; 0x44 + 8003802: 4658 mov r0, fp + 8003804: f8cb 3000 str.w r3, [fp] + 8003808: 9711 str r7, [sp, #68] ; 0x44 + 800380a: 940d str r4, [sp, #52] ; 0x34 + 800380c: 9613 str r6, [sp, #76] ; 0x4c + 800380e: 9617 str r6, [sp, #92] ; 0x5c + 8003810: f8cb 4010 str.w r4, [fp, #16] + 8003814: f8cb 4018 str.w r4, [fp, #24] + 8003818: f8cb 900c str.w r9, [fp, #12] + 800381c: e9cd 440e strd r4, r4, [sp, #56] ; 0x38 + 8003820: e9cb 4401 strd r4, r4, [fp, #4] + 8003824: f003 feb4 bl 8007590 + 8003828: a90d add r1, sp, #52 ; 0x34 + 800382a: 4658 mov r0, fp + 800382c: 940d str r4, [sp, #52] ; 0x34 + 800382e: 940f str r4, [sp, #60] ; 0x3c + 8003830: f004 fa88 bl 8007d44 + 8003834: f649 423f movw r2, #39999 ; 0x9c3f + 8003838: 2309 movs r3, #9 + 800383a: 4956 ldr r1, [pc, #344] ; (8003994 ) + 800383c: 4628 mov r0, r5 + 800383e: 606a str r2, [r5, #4] + 8003840: 60eb str r3, [r5, #12] + 8003842: 6029 str r1, [r5, #0] + 8003844: 60ac str r4, [r5, #8] + 8003846: 612c str r4, [r5, #16] + 8003848: 61ac str r4, [r5, #24] + 800384a: 940f str r4, [sp, #60] ; 0x3c + 800384c: e9cd 4411 strd r4, r4, [sp, #68] ; 0x44 + 8003850: e9cd 4413 strd r4, r4, [sp, #76] ; 0x4c + 8003854: e9cd 440d strd r4, r4, [sp, #52] ; 0x34 + 8003858: f003 fd90 bl 800737c + 800385c: a911 add r1, sp, #68 ; 0x44 + 800385e: 4628 mov r0, r5 + 8003860: f8cd a044 str.w sl, [sp, #68] ; 0x44 + 8003864: f004 f906 bl 8007a74 + 8003868: a90d add r1, sp, #52 ; 0x34 + 800386a: 4628 mov r0, r5 + 800386c: 4d4a ldr r5, [pc, #296] ; (8003998 ) + 800386e: 940d str r4, [sp, #52] ; 0x34 + 8003870: 940f str r4, [sp, #60] ; 0x3c + 8003872: f004 fa67 bl 8007d44 + 8003876: 4b49 ldr r3, [pc, #292] ; (800399c ) + 8003878: 4628 mov r0, r5 + 800387a: 61ac str r4, [r5, #24] + 800387c: 602b str r3, [r5, #0] + 800387e: 940a str r4, [sp, #40] ; 0x28 + 8003880: 9417 str r4, [sp, #92] ; 0x5c + 8003882: e9c5 4401 strd r4, r4, [r5, #4] + 8003886: e9c5 4403 strd r4, r4, [r5, #12] + 800388a: e9cd 440d strd r4, r4, [sp, #52] ; 0x34 + 800388e: e9cd 440f strd r4, r4, [sp, #60] ; 0x3c + 8003892: e9cd 4411 strd r4, r4, [sp, #68] ; 0x44 + 8003896: e9cd 4413 strd r4, r4, [sp, #76] ; 0x4c + 800389a: e9cd 4415 strd r4, r4, [sp, #84] ; 0x54 + 800389e: e9cd 440b strd r4, r4, [sp, #44] ; 0x2c + 80038a2: f003 fd6b bl 800737c + 80038a6: a90d add r1, sp, #52 ; 0x34 + 80038a8: 4628 mov r0, r5 + 80038aa: f8cd a034 str.w sl, [sp, #52] ; 0x34 + 80038ae: f004 f8e1 bl 8007a74 + 80038b2: 4628 mov r0, r5 + 80038b4: f003 fde8 bl 8007488 + 80038b8: a90a add r1, sp, #40 ; 0x28 + 80038ba: 4628 mov r0, r5 + 80038bc: 940a str r4, [sp, #40] ; 0x28 + 80038be: 940c str r4, [sp, #48] ; 0x30 + 80038c0: f004 fa40 bl 8007d44 + 80038c4: 2360 movs r3, #96 ; 0x60 + 80038c6: 4642 mov r2, r8 + 80038c8: a911 add r1, sp, #68 ; 0x44 + 80038ca: 4628 mov r0, r5 + 80038cc: 9311 str r3, [sp, #68] ; 0x44 + 80038ce: f44f 38e1 mov.w r8, #115200 ; 0x1c200 + 80038d2: 9412 str r4, [sp, #72] ; 0x48 + 80038d4: 9413 str r4, [sp, #76] ; 0x4c + 80038d6: 9415 str r4, [sp, #84] ; 0x54 + 80038d8: f003 ff3e bl 8007758 + 80038dc: a911 add r1, sp, #68 ; 0x44 + 80038de: 220c movs r2, #12 + 80038e0: 4628 mov r0, r5 + 80038e2: f8df a0d8 ldr.w sl, [pc, #216] ; 80039bc + 80038e6: f003 ff37 bl 8007758 + 80038ea: 4628 mov r0, r5 + 80038ec: f002 fa24 bl 8005d38 + 80038f0: 2220 movs r2, #32 + 80038f2: 4621 mov r1, r4 + 80038f4: a812 add r0, sp, #72 ; 0x48 + 80038f6: f006 fa5d bl 8009db4 + 80038fa: 4b29 ldr r3, [pc, #164] ; (80039a0 ) + 80038fc: a911 add r1, sp, #68 ; 0x44 + 80038fe: 4650 mov r0, sl + 8003900: f8ca 3000 str.w r3, [sl] + 8003904: 9711 str r7, [sp, #68] ; 0x44 + 8003906: 270c movs r7, #12 + 8003908: 940f str r4, [sp, #60] ; 0x3c + 800390a: 9613 str r6, [sp, #76] ; 0x4c + 800390c: 9617 str r6, [sp, #92] ; 0x5c + 800390e: f8ca 900c str.w r9, [sl, #12] + 8003912: f8ca 4010 str.w r4, [sl, #16] + 8003916: f8ca 4018 str.w r4, [sl, #24] + 800391a: 4d22 ldr r5, [pc, #136] ; (80039a4 ) + 800391c: e9cd 440d strd r4, r4, [sp, #52] ; 0x34 + 8003920: e9ca 4401 strd r4, r4, [sl, #4] + 8003924: f003 fe34 bl 8007590 + 8003928: a90d add r1, sp, #52 ; 0x34 + 800392a: 4650 mov r0, sl + 800392c: 940d str r4, [sp, #52] ; 0x34 + 800392e: 940f str r4, [sp, #60] ; 0x3c + 8003930: f004 fa08 bl 8007d44 + 8003934: 4b1c ldr r3, [pc, #112] ; (80039a8 ) + 8003936: 4a1d ldr r2, [pc, #116] ; (80039ac ) + 8003938: 4618 mov r0, r3 + 800393a: 611c str r4, [r3, #16] + 800393c: 615f str r7, [r3, #20] + 800393e: e9c3 2800 strd r2, r8, [r3] + 8003942: e9c3 4402 strd r4, r4, [r3, #8] + 8003946: e9c3 4406 strd r4, r4, [r3, #24] + 800394a: e9c3 4408 strd r4, r4, [r3, #32] + 800394e: f004 fc5b bl 8008208 + 8003952: 4b17 ldr r3, [pc, #92] ; (80039b0 ) + 8003954: 4a17 ldr r2, [pc, #92] ; (80039b4 ) + 8003956: 4618 mov r0, r3 + 8003958: 625c str r4, [r3, #36] ; 0x24 + 800395a: 601a str r2, [r3, #0] + 800395c: e9c3 8401 strd r8, r4, [r3, #4] + 8003960: e9c3 4403 strd r4, r4, [r3, #12] + 8003964: e9c3 7405 strd r7, r4, [r3, #20] + 8003968: e9c3 4407 strd r4, r4, [r3, #28] + 800396c: f004 fc4c bl 8008208 + 8003970: 2280 movs r2, #128 ; 0x80 + 8003972: f105 0108 add.w r1, r5, #8 + 8003976: e023 b.n 80039c0 + 8003978: 40023800 .word 0x40023800 + 800397c: 40021400 .word 0x40021400 + 8003980: 40020400 .word 0x40020400 + 8003984: 40020800 .word 0x40020800 + 8003988: 40020000 .word 0x40020000 + 800398c: 40021000 .word 0x40021000 + 8003990: 20000274 .word 0x20000274 + 8003994: 40000400 .word 0x40000400 + 8003998: 200002b4 .word 0x200002b4 + 800399c: 40000800 .word 0x40000800 + 80039a0: 40000c00 .word 0x40000c00 + 80039a4: 20000450 .word 0x20000450 + 80039a8: 20000334 .word 0x20000334 + 80039ac: 40004800 .word 0x40004800 + 80039b0: 200003b4 .word 0x200003b4 + 80039b4: 40011400 .word 0x40011400 + 80039b8: 20000234 .word 0x20000234 + 80039bc: 200002f4 .word 0x200002f4 + 80039c0: 6868 ldr r0, [r5, #4] + 80039c2: f004 fa47 bl 8007e54 + 80039c6: 4623 mov r3, r4 + 80039c8: f505 62b4 add.w r2, r5, #1440 ; 0x5a0 + 80039cc: f8c5 466c str.w r4, [r5, #1644] ; 0x66c + 80039d0: f8c5 4670 str.w r4, [r5, #1648] ; 0x670 + 80039d4: f8c5 4678 str.w r4, [r5, #1656] ; 0x678 + 80039d8: f8c5 4674 str.w r4, [r5, #1652] ; 0x674 + 80039dc: f852 1f04 ldr.w r1, [r2, #4]! + 80039e0: b119 cbz r1, 80039ea + 80039e2: 3301 adds r3, #1 + 80039e4: 2b19 cmp r3, #25 + 80039e6: d1f9 bne.n 80039dc + 80039e8: e007 b.n 80039fa + 80039ea: eb05 0183 add.w r1, r5, r3, lsl #2 + 80039ee: 4a35 ldr r2, [pc, #212] ; (8003ac4 ) + 80039f0: 337d adds r3, #125 ; 0x7d + 80039f2: f8c1 25a4 str.w r2, [r1, #1444] ; 0x5a4 + 80039f6: e9c2 3502 strd r3, r5, [r2, #8] + 80039fa: 4b33 ldr r3, [pc, #204] ; (8003ac8 ) + 80039fc: 4a33 ldr r2, [pc, #204] ; (8003acc ) + 80039fe: 4c34 ldr r4, [pc, #208] ; (8003ad0 ) + 8003a00: 4834 ldr r0, [pc, #208] ; (8003ad4 ) + 8003a02: 605a str r2, [r3, #4] + 8003a04: f7fc fdb0 bl 8000568 <_ZN7Encoder5SetupEv> + 8003a08: 4833 ldr r0, [pc, #204] ; (8003ad8 ) + 8003a0a: f104 0bd8 add.w fp, r4, #216 ; 0xd8 + 8003a0e: 4e33 ldr r6, [pc, #204] ; (8003adc ) + 8003a10: f504 78c8 add.w r8, r4, #400 ; 0x190 + 8003a14: f7fc fda8 bl 8000568 <_ZN7Encoder5SetupEv> + 8003a18: 4b2e ldr r3, [pc, #184] ; (8003ad4 ) + 8003a1a: 4830 ldr r0, [pc, #192] ; (8003adc ) + 8003a1c: 681b ldr r3, [r3, #0] + 8003a1e: 681b ldr r3, [r3, #0] + 8003a20: 6a5b ldr r3, [r3, #36] ; 0x24 + 8003a22: f002 f84f bl 8005ac4 <_ZN12OdometryCalc21OdometryUpdateMessageEv> + 8003a26: 6e73 ldr r3, [r6, #100] ; 0x64 + 8003a28: 2290 movs r2, #144 ; 0x90 + 8003a2a: 6eb5 ldr r5, [r6, #104] ; 0x68 + 8003a2c: 62a3 str r3, [r4, #40] ; 0x28 + 8003a2e: 6ef3 ldr r3, [r6, #108] ; 0x6c + 8003a30: 62e5 str r5, [r4, #44] ; 0x2c + 8003a32: 6323 str r3, [r4, #48] ; 0x30 + 8003a34: 6fb3 ldr r3, [r6, #120] ; 0x78 + 8003a36: 6f75 ldr r5, [r6, #116] ; 0x74 + 8003a38: 63e3 str r3, [r4, #60] ; 0x3c + 8003a3a: 4929 ldr r1, [pc, #164] ; (8003ae0 ) + 8003a3c: f8d6 3080 ldr.w r3, [r6, #128] ; 0x80 + 8003a40: 6c77 ldr r7, [r6, #68] ; 0x44 + 8003a42: 63a5 str r5, [r4, #56] ; 0x38 + 8003a44: 6463 str r3, [r4, #68] ; 0x44 + 8003a46: 6ff5 ldr r5, [r6, #124] ; 0x7c + 8003a48: 4b26 ldr r3, [pc, #152] ; (8003ae4 ) + 8003a4a: 6425 str r5, [r4, #64] ; 0x40 + 8003a4c: 60a7 str r7, [r4, #8] + 8003a4e: c903 ldmia r1, {r0, r1} + 8003a50: e9d6 a914 ldrd sl, r9, [r6, #80] ; 0x50 + 8003a54: e9c4 a905 strd sl, r9, [r4, #20] + 8003a58: e883 0003 stmia.w r3, {r0, r1} + 8003a5c: 4922 ldr r1, [pc, #136] ; (8003ae8 ) + 8003a5e: f103 003c add.w r0, r3, #60 ; 0x3c + 8003a62: f006 f983 bl 8009d6c + 8003a66: f8d6 1120 ldr.w r1, [r6, #288] ; 0x120 + 8003a6a: f8d6 0124 ldr.w r0, [r6, #292] ; 0x124 + 8003a6e: 2290 movs r2, #144 ; 0x90 + 8003a70: f8d6 3128 ldr.w r3, [r6, #296] ; 0x128 + 8003a74: f8c4 10e4 str.w r1, [r4, #228] ; 0xe4 + 8003a78: f8c4 00e8 str.w r0, [r4, #232] ; 0xe8 + 8003a7c: f8d6 1130 ldr.w r1, [r6, #304] ; 0x130 + 8003a80: f8d6 0134 ldr.w r0, [r6, #308] ; 0x134 + 8003a84: f8c4 30ec str.w r3, [r4, #236] ; 0xec + 8003a88: f8d6 3138 ldr.w r3, [r6, #312] ; 0x138 + 8003a8c: f8c4 10f4 str.w r1, [r4, #244] ; 0xf4 + 8003a90: f8c4 00f8 str.w r0, [r4, #248] ; 0xf8 + 8003a94: 4915 ldr r1, [pc, #84] ; (8003aec ) + 8003a96: f8c4 30fc str.w r3, [r4, #252] ; 0xfc + 8003a9a: 4815 ldr r0, [pc, #84] ; (8003af0 ) + 8003a9c: f006 f966 bl 8009d6c + 8003aa0: 4b14 ldr r3, [pc, #80] ; (8003af4 ) + 8003aa2: 4915 ldr r1, [pc, #84] ; (8003af8 ) + 8003aa4: e9d3 2502 ldrd r2, r5, [r3, #8] + 8003aa8: 682b ldr r3, [r5, #0] + 8003aaa: 9201 str r2, [sp, #4] + 8003aac: 681b ldr r3, [r3, #0] + 8003aae: 428b cmp r3, r1 + 8003ab0: f040 83da bne.w 8004268 + 8003ab4: 2a63 cmp r2, #99 ; 0x63 + 8003ab6: dd21 ble.n 8003afc + 8003ab8: f895 3680 ldrb.w r3, [r5, #1664] ; 0x680 + 8003abc: 2b00 cmp r3, #0 + 8003abe: d0ab beq.n 8003a18 + 8003ac0: e01c b.n 8003afc + 8003ac2: bf00 nop + 8003ac4: 200000a0 .word 0x200000a0 + 8003ac8: 20000e9c .word 0x20000e9c + 8003acc: 20000000 .word 0x20000000 + 8003ad0: 20000cf0 .word 0x20000cf0 + 8003ad4: 20000434 .word 0x20000434 + 8003ad8: 20000e80 .word 0x20000e80 + 8003adc: 20000b0c .word 0x20000b0c + 8003ae0: 20000b54 .word 0x20000b54 + 8003ae4: 20000cfc .word 0x20000cfc + 8003ae8: 20000b90 .word 0x20000b90 + 8003aec: 20000c48 .word 0x20000c48 + 8003af0: 20000df0 .word 0x20000df0 + 8003af4: 20000cdc .word 0x20000cdc + 8003af8: 080032d9 .word 0x080032d9 + 8003afc: 68e0 ldr r0, [r4, #12] + 8003afe: 0a39 lsrs r1, r7, #8 + 8003b00: 6923 ldr r3, [r4, #16] + 8003b02: 0c3a lsrs r2, r7, #16 + 8003b04: ea4f 2c10 mov.w ip, r0, lsr #8 + 8003b08: f885 03af strb.w r0, [r5, #943] ; 0x3af + 8003b0c: f885 33b3 strb.w r3, [r5, #947] ; 0x3b3 + 8003b10: f885 c3b0 strb.w ip, [r5, #944] ; 0x3b0 + 8003b14: ea4f 4c10 mov.w ip, r0, lsr #16 + 8003b18: 0e00 lsrs r0, r0, #24 + 8003b1a: f885 73ab strb.w r7, [r5, #939] ; 0x3ab + 8003b1e: f885 c3b1 strb.w ip, [r5, #945] ; 0x3b1 + 8003b22: ea4f 2c13 mov.w ip, r3, lsr #8 + 8003b26: f885 03b2 strb.w r0, [r5, #946] ; 0x3b2 + 8003b2a: 0c18 lsrs r0, r3, #16 + 8003b2c: 0e1b lsrs r3, r3, #24 + 8003b2e: f885 c3b4 strb.w ip, [r5, #948] ; 0x3b4 + 8003b32: 0e3f lsrs r7, r7, #24 + 8003b34: f885 03b5 strb.w r0, [r5, #949] ; 0x3b5 + 8003b38: f885 33b6 strb.w r3, [r5, #950] ; 0x3b6 + 8003b3c: f205 33ab addw r3, r5, #939 ; 0x3ab + 8003b40: 4650 mov r0, sl + 8003b42: f885 13ac strb.w r1, [r5, #940] ; 0x3ac + 8003b46: f885 23ad strb.w r2, [r5, #941] ; 0x3ad + 8003b4a: f885 73ae strb.w r7, [r5, #942] ; 0x3ae + 8003b4e: 9300 str r3, [sp, #0] + 8003b50: f7fc fb72 bl 8000238 + 8003b54: 4607 mov r7, r0 + 8003b56: 4651 mov r1, sl + 8003b58: f205 30bb addw r0, r5, #955 ; 0x3bb + 8003b5c: 0a3b lsrs r3, r7, #8 + 8003b5e: f885 73b7 strb.w r7, [r5, #951] ; 0x3b7 + 8003b62: 0c3a lsrs r2, r7, #16 + 8003b64: f107 0a10 add.w sl, r7, #16 + 8003b68: f885 33b8 strb.w r3, [r5, #952] ; 0x3b8 + 8003b6c: 0e3b lsrs r3, r7, #24 + 8003b6e: f885 23b9 strb.w r2, [r5, #953] ; 0x3b9 + 8003b72: 463a mov r2, r7 + 8003b74: f885 33ba strb.w r3, [r5, #954] ; 0x3ba + 8003b78: f006 f8f8 bl 8009d6c + 8003b7c: 4648 mov r0, r9 + 8003b7e: f7fc fb5b bl 8000238 + 8003b82: 4681 mov r9, r0 + 8003b84: 9800 ldr r0, [sp, #0] + 8003b86: ea4f 2119 mov.w r1, r9, lsr #8 + 8003b8a: 19c3 adds r3, r0, r7 + 8003b8c: f800 900a strb.w r9, [r0, sl] + 8003b90: 3714 adds r7, #20 + 8003b92: ea4f 4219 mov.w r2, r9, lsr #16 + 8003b96: 7459 strb r1, [r3, #17] + 8003b98: ea4f 6119 mov.w r1, r9, lsr #24 + 8003b9c: 749a strb r2, [r3, #18] + 8003b9e: 4438 add r0, r7 + 8003ba0: 74d9 strb r1, [r3, #19] + 8003ba2: 464a mov r2, r9 + 8003ba4: 69a1 ldr r1, [r4, #24] + 8003ba6: eb09 0a07 add.w sl, r9, r7 + 8003baa: f006 f8df bl 8009d6c + 8003bae: edd4 7a0a vldr s15, [r4, #40] ; 0x28 + 8003bb2: 9800 ldr r0, [sp, #0] + 8003bb4: ee17 2a90 vmov r2, s15 + 8003bb8: eb00 030a add.w r3, r0, sl + 8003bbc: f3c2 51c7 ubfx r1, r2, #23, #8 + 8003bc0: 2900 cmp r1, #0 + 8003bc2: f000 834f beq.w 8004264 + 8003bc6: f501 7160 add.w r1, r1, #896 ; 0x380 + 8003bca: 0108 lsls r0, r1, #4 + 8003bcc: 0909 lsrs r1, r1, #4 + 8003bce: b240 sxtb r0, r0 + 8003bd0: eef5 7ac0 vcmpe.f32 s15, #0.0 + 8003bd4: f3c2 4cc3 ubfx ip, r2, #19, #4 + 8003bd8: 2700 movs r7, #0 + 8003bda: ea4f 1e42 mov.w lr, r2, lsl #5 + 8003bde: ea40 090c orr.w r9, r0, ip + 8003be2: ea4f 0ce2 mov.w ip, r2, asr #3 + 8003be6: eef1 fa10 vmrs APSR_nzcv, fpscr + 8003bea: ea4f 22e2 mov.w r2, r2, asr #11 + 8003bee: 9800 ldr r0, [sp, #0] + 8003bf0: bf48 it mi + 8003bf2: f061 017f ornmi r1, r1, #127 ; 0x7f + 8003bf6: f800 700a strb.w r7, [r0, sl] + 8003bfa: 715a strb r2, [r3, #5] + 8003bfc: 71d9 strb r1, [r3, #7] + 8003bfe: f883 9006 strb.w r9, [r3, #6] + 8003c02: 705f strb r7, [r3, #1] + 8003c04: 709f strb r7, [r3, #2] + 8003c06: f883 e003 strb.w lr, [r3, #3] + 8003c0a: f883 c004 strb.w ip, [r3, #4] + 8003c0e: edd4 7a0b vldr s15, [r4, #44] ; 0x2c + 8003c12: ee17 2a90 vmov r2, s15 + 8003c16: f3c2 51c7 ubfx r1, r2, #23, #8 + 8003c1a: 2900 cmp r1, #0 + 8003c1c: f000 8320 beq.w 8004260 + 8003c20: f501 7160 add.w r1, r1, #896 ; 0x380 + 8003c24: 0108 lsls r0, r1, #4 + 8003c26: 0909 lsrs r1, r1, #4 + 8003c28: b240 sxtb r0, r0 + 8003c2a: eef5 7ac0 vcmpe.f32 s15, #0.0 + 8003c2e: f3c2 4cc3 ubfx ip, r2, #19, #4 + 8003c32: 2700 movs r7, #0 + 8003c34: ea4f 1e42 mov.w lr, r2, lsl #5 + 8003c38: ea40 000c orr.w r0, r0, ip + 8003c3c: ea4f 0ce2 mov.w ip, r2, asr #3 + 8003c40: eef1 fa10 vmrs APSR_nzcv, fpscr + 8003c44: ea4f 22e2 mov.w r2, r2, asr #11 + 8003c48: 721f strb r7, [r3, #8] + 8003c4a: 735a strb r2, [r3, #13] + 8003c4c: bf48 it mi + 8003c4e: f061 017f ornmi r1, r1, #127 ; 0x7f + 8003c52: 7398 strb r0, [r3, #14] + 8003c54: 725f strb r7, [r3, #9] + 8003c56: 73d9 strb r1, [r3, #15] + 8003c58: 729f strb r7, [r3, #10] + 8003c5a: f883 e00b strb.w lr, [r3, #11] + 8003c5e: f883 c00c strb.w ip, [r3, #12] + 8003c62: edd4 7a0c vldr s15, [r4, #48] ; 0x30 + 8003c66: ee17 2a90 vmov r2, s15 + 8003c6a: f3c2 51c7 ubfx r1, r2, #23, #8 + 8003c6e: 2900 cmp r1, #0 + 8003c70: f000 82f4 beq.w 800425c + 8003c74: f501 7160 add.w r1, r1, #896 ; 0x380 + 8003c78: 0108 lsls r0, r1, #4 + 8003c7a: 0909 lsrs r1, r1, #4 + 8003c7c: b240 sxtb r0, r0 + 8003c7e: eef5 7ac0 vcmpe.f32 s15, #0.0 + 8003c82: f3c2 4cc3 ubfx ip, r2, #19, #4 + 8003c86: 2700 movs r7, #0 + 8003c88: ea4f 1e42 mov.w lr, r2, lsl #5 + 8003c8c: ea40 000c orr.w r0, r0, ip + 8003c90: ea4f 0ce2 mov.w ip, r2, asr #3 + 8003c94: eef1 fa10 vmrs APSR_nzcv, fpscr + 8003c98: ea4f 22e2 mov.w r2, r2, asr #11 + 8003c9c: 741f strb r7, [r3, #16] + 8003c9e: 755a strb r2, [r3, #21] + 8003ca0: bf48 it mi + 8003ca2: f061 017f ornmi r1, r1, #127 ; 0x7f + 8003ca6: 7598 strb r0, [r3, #22] + 8003ca8: 745f strb r7, [r3, #17] + 8003caa: 75d9 strb r1, [r3, #23] + 8003cac: 749f strb r7, [r3, #18] + 8003cae: f883 e013 strb.w lr, [r3, #19] + 8003cb2: f883 c014 strb.w ip, [r3, #20] + 8003cb6: edd4 7a0e vldr s15, [r4, #56] ; 0x38 + 8003cba: ee17 2a90 vmov r2, s15 + 8003cbe: f3c2 51c7 ubfx r1, r2, #23, #8 + 8003cc2: 2900 cmp r1, #0 + 8003cc4: f000 82c8 beq.w 8004258 + 8003cc8: f501 7160 add.w r1, r1, #896 ; 0x380 + 8003ccc: 0108 lsls r0, r1, #4 + 8003cce: 0909 lsrs r1, r1, #4 + 8003cd0: b240 sxtb r0, r0 + 8003cd2: eef5 7ac0 vcmpe.f32 s15, #0.0 + 8003cd6: f3c2 4cc3 ubfx ip, r2, #19, #4 + 8003cda: 2700 movs r7, #0 + 8003cdc: ea4f 1e42 mov.w lr, r2, lsl #5 + 8003ce0: ea40 000c orr.w r0, r0, ip + 8003ce4: ea4f 0ce2 mov.w ip, r2, asr #3 + 8003ce8: eef1 fa10 vmrs APSR_nzcv, fpscr + 8003cec: ea4f 22e2 mov.w r2, r2, asr #11 + 8003cf0: 761f strb r7, [r3, #24] + 8003cf2: 775a strb r2, [r3, #29] + 8003cf4: bf48 it mi + 8003cf6: f061 017f ornmi r1, r1, #127 ; 0x7f + 8003cfa: 7798 strb r0, [r3, #30] + 8003cfc: 765f strb r7, [r3, #25] + 8003cfe: 77d9 strb r1, [r3, #31] + 8003d00: 769f strb r7, [r3, #26] + 8003d02: f883 e01b strb.w lr, [r3, #27] + 8003d06: f883 c01c strb.w ip, [r3, #28] + 8003d0a: edd4 7a0f vldr s15, [r4, #60] ; 0x3c + 8003d0e: ee17 2a90 vmov r2, s15 + 8003d12: f3c2 51c7 ubfx r1, r2, #23, #8 + 8003d16: 2900 cmp r1, #0 + 8003d18: f000 829c beq.w 8004254 + 8003d1c: f501 7160 add.w r1, r1, #896 ; 0x380 + 8003d20: 0108 lsls r0, r1, #4 + 8003d22: 0909 lsrs r1, r1, #4 + 8003d24: b240 sxtb r0, r0 + 8003d26: eef5 7ac0 vcmpe.f32 s15, #0.0 + 8003d2a: f3c2 4cc3 ubfx ip, r2, #19, #4 + 8003d2e: 2700 movs r7, #0 + 8003d30: ea4f 1e42 mov.w lr, r2, lsl #5 + 8003d34: ea40 000c orr.w r0, r0, ip + 8003d38: ea4f 0ce2 mov.w ip, r2, asr #3 + 8003d3c: eef1 fa10 vmrs APSR_nzcv, fpscr + 8003d40: ea4f 22e2 mov.w r2, r2, asr #11 + 8003d44: f883 7020 strb.w r7, [r3, #32] + 8003d48: f883 2025 strb.w r2, [r3, #37] ; 0x25 + 8003d4c: bf48 it mi + 8003d4e: f061 017f ornmi r1, r1, #127 ; 0x7f + 8003d52: f883 0026 strb.w r0, [r3, #38] ; 0x26 + 8003d56: f883 7021 strb.w r7, [r3, #33] ; 0x21 + 8003d5a: f883 1027 strb.w r1, [r3, #39] ; 0x27 + 8003d5e: f883 7022 strb.w r7, [r3, #34] ; 0x22 + 8003d62: f883 e023 strb.w lr, [r3, #35] ; 0x23 + 8003d66: f883 c024 strb.w ip, [r3, #36] ; 0x24 + 8003d6a: edd4 7a10 vldr s15, [r4, #64] ; 0x40 + 8003d6e: ee17 2a90 vmov r2, s15 + 8003d72: f3c2 51c7 ubfx r1, r2, #23, #8 + 8003d76: 2900 cmp r1, #0 + 8003d78: f000 826a beq.w 8004250 + 8003d7c: f501 7160 add.w r1, r1, #896 ; 0x380 + 8003d80: 0108 lsls r0, r1, #4 + 8003d82: 0909 lsrs r1, r1, #4 + 8003d84: b240 sxtb r0, r0 + 8003d86: eef5 7ac0 vcmpe.f32 s15, #0.0 + 8003d8a: f3c2 4cc3 ubfx ip, r2, #19, #4 + 8003d8e: 2700 movs r7, #0 + 8003d90: ea4f 1e42 mov.w lr, r2, lsl #5 + 8003d94: ea40 000c orr.w r0, r0, ip + 8003d98: ea4f 0ce2 mov.w ip, r2, asr #3 + 8003d9c: eef1 fa10 vmrs APSR_nzcv, fpscr + 8003da0: ea4f 22e2 mov.w r2, r2, asr #11 + 8003da4: f883 7028 strb.w r7, [r3, #40] ; 0x28 + 8003da8: f883 202d strb.w r2, [r3, #45] ; 0x2d + 8003dac: bf48 it mi + 8003dae: f061 017f ornmi r1, r1, #127 ; 0x7f + 8003db2: f883 002e strb.w r0, [r3, #46] ; 0x2e + 8003db6: f883 7029 strb.w r7, [r3, #41] ; 0x29 + 8003dba: f883 102f strb.w r1, [r3, #47] ; 0x2f + 8003dbe: f883 702a strb.w r7, [r3, #42] ; 0x2a + 8003dc2: f883 e02b strb.w lr, [r3, #43] ; 0x2b + 8003dc6: f883 c02c strb.w ip, [r3, #44] ; 0x2c + 8003dca: edd4 7a11 vldr s15, [r4, #68] ; 0x44 + 8003dce: ee17 2a90 vmov r2, s15 + 8003dd2: f3c2 51c7 ubfx r1, r2, #23, #8 + 8003dd6: 2900 cmp r1, #0 + 8003dd8: f000 8238 beq.w 800424c + 8003ddc: f501 7160 add.w r1, r1, #896 ; 0x380 + 8003de0: 0108 lsls r0, r1, #4 + 8003de2: 0909 lsrs r1, r1, #4 + 8003de4: b240 sxtb r0, r0 + 8003de6: eef5 7ac0 vcmpe.f32 s15, #0.0 + 8003dea: f3c2 4cc3 ubfx ip, r2, #19, #4 + 8003dee: 2700 movs r7, #0 + 8003df0: ea4f 1e42 mov.w lr, r2, lsl #5 + 8003df4: ea40 000c orr.w r0, r0, ip + 8003df8: ea4f 0ce2 mov.w ip, r2, asr #3 + 8003dfc: eef1 fa10 vmrs APSR_nzcv, fpscr + 8003e00: f883 7030 strb.w r7, [r3, #48] ; 0x30 + 8003e04: ea4f 22e2 mov.w r2, r2, asr #11 + 8003e08: f883 7031 strb.w r7, [r3, #49] ; 0x31 + 8003e0c: f883 7032 strb.w r7, [r3, #50] ; 0x32 + 8003e10: f04f 0700 mov.w r7, #0 + 8003e14: f883 c034 strb.w ip, [r3, #52] ; 0x34 + 8003e18: bf48 it mi + 8003e1a: f061 017f ornmi r1, r1, #127 ; 0x7f + 8003e1e: f8df c594 ldr.w ip, [pc, #1428] ; 80043b4 + 8003e22: f883 0036 strb.w r0, [r3, #54] ; 0x36 + 8003e26: f883 e033 strb.w lr, [r3, #51] ; 0x33 + 8003e2a: f883 2035 strb.w r2, [r3, #53] ; 0x35 + 8003e2e: f883 1037 strb.w r1, [r3, #55] ; 0x37 + 8003e32: ecfc 7a01 vldmia ip!, {s15} + 8003e36: ee17 2a90 vmov r2, s15 + 8003e3a: f3c2 51c7 ubfx r1, r2, #23, #8 + 8003e3e: 4608 mov r0, r1 + 8003e40: f501 7e60 add.w lr, r1, #896 ; 0x380 + 8003e44: b121 cbz r1, 8003e50 + 8003e46: ea4f 110e mov.w r1, lr, lsl #4 + 8003e4a: ea4f 101e mov.w r0, lr, lsr #4 + 8003e4e: b249 sxtb r1, r1 + 8003e50: eef5 7ac0 vcmpe.f32 s15, #0.0 + 8003e54: f3c2 4ec3 ubfx lr, r2, #19, #4 + 8003e58: ea4f 1942 mov.w r9, r2, lsl #5 + 8003e5c: f883 7038 strb.w r7, [r3, #56] ; 0x38 + 8003e60: ea41 010e orr.w r1, r1, lr + 8003e64: ea4f 0ee2 mov.w lr, r2, asr #3 + 8003e68: eef1 fa10 vmrs APSR_nzcv, fpscr + 8003e6c: ea4f 22e2 mov.w r2, r2, asr #11 + 8003e70: f883 7039 strb.w r7, [r3, #57] ; 0x39 + 8003e74: f103 0308 add.w r3, r3, #8 + 8003e78: f883 7032 strb.w r7, [r3, #50] ; 0x32 + 8003e7c: bf48 it mi + 8003e7e: f060 007f ornmi r0, r0, #127 ; 0x7f + 8003e82: 45dc cmp ip, fp + 8003e84: f883 1036 strb.w r1, [r3, #54] ; 0x36 + 8003e88: f883 9033 strb.w r9, [r3, #51] ; 0x33 + 8003e8c: f883 e034 strb.w lr, [r3, #52] ; 0x34 + 8003e90: f883 2035 strb.w r2, [r3, #53] ; 0x35 + 8003e94: f883 0037 strb.w r0, [r3, #55] ; 0x37 + 8003e98: d1cb bne.n 8003e32 + 8003e9a: edd4 7a39 vldr s15, [r4, #228] ; 0xe4 + 8003e9e: f50a 7cac add.w ip, sl, #344 ; 0x158 + 8003ea2: 9b00 ldr r3, [sp, #0] + 8003ea4: ee17 2a90 vmov r2, s15 + 8003ea8: 4463 add r3, ip + 8003eaa: f3c2 51c7 ubfx r1, r2, #23, #8 + 8003eae: 2900 cmp r1, #0 + 8003eb0: f000 81ca beq.w 8004248 + 8003eb4: f501 7160 add.w r1, r1, #896 ; 0x380 + 8003eb8: 010f lsls r7, r1, #4 + 8003eba: 0909 lsrs r1, r1, #4 + 8003ebc: fa4f fe87 sxtb.w lr, r7 + 8003ec0: eef5 7ac0 vcmpe.f32 s15, #0.0 + 8003ec4: f3c2 47c3 ubfx r7, r2, #19, #4 + 8003ec8: 2000 movs r0, #0 + 8003eca: ea4e 0907 orr.w r9, lr, r7 + 8003ece: 9f00 ldr r7, [sp, #0] + 8003ed0: eef1 fa10 vmrs APSR_nzcv, fpscr + 8003ed4: ea4f 1e42 mov.w lr, r2, lsl #5 + 8003ed8: f807 000c strb.w r0, [r7, ip] + 8003edc: ea4f 0ce2 mov.w ip, r2, asr #3 + 8003ee0: ea4f 22e2 mov.w r2, r2, asr #11 + 8003ee4: f883 9006 strb.w r9, [r3, #6] + 8003ee8: bf48 it mi + 8003eea: f061 017f ornmi r1, r1, #127 ; 0x7f + 8003eee: 7058 strb r0, [r3, #1] + 8003ef0: 715a strb r2, [r3, #5] + 8003ef2: 71d9 strb r1, [r3, #7] + 8003ef4: 7098 strb r0, [r3, #2] + 8003ef6: f883 e003 strb.w lr, [r3, #3] + 8003efa: f883 c004 strb.w ip, [r3, #4] + 8003efe: edd4 7a3a vldr s15, [r4, #232] ; 0xe8 + 8003f02: ee17 2a90 vmov r2, s15 + 8003f06: f3c2 51c7 ubfx r1, r2, #23, #8 + 8003f0a: 2900 cmp r1, #0 + 8003f0c: f000 819a beq.w 8004244 + 8003f10: f501 7160 add.w r1, r1, #896 ; 0x380 + 8003f14: 0108 lsls r0, r1, #4 + 8003f16: 0909 lsrs r1, r1, #4 + 8003f18: b240 sxtb r0, r0 + 8003f1a: eef5 7ac0 vcmpe.f32 s15, #0.0 + 8003f1e: f3c2 4cc3 ubfx ip, r2, #19, #4 + 8003f22: 2700 movs r7, #0 + 8003f24: ea4f 1e42 mov.w lr, r2, lsl #5 + 8003f28: ea40 000c orr.w r0, r0, ip + 8003f2c: ea4f 0ce2 mov.w ip, r2, asr #3 + 8003f30: eef1 fa10 vmrs APSR_nzcv, fpscr + 8003f34: ea4f 22e2 mov.w r2, r2, asr #11 + 8003f38: 721f strb r7, [r3, #8] + 8003f3a: 735a strb r2, [r3, #13] + 8003f3c: bf48 it mi + 8003f3e: f061 017f ornmi r1, r1, #127 ; 0x7f + 8003f42: 7398 strb r0, [r3, #14] + 8003f44: 725f strb r7, [r3, #9] + 8003f46: 73d9 strb r1, [r3, #15] + 8003f48: 729f strb r7, [r3, #10] + 8003f4a: f883 e00b strb.w lr, [r3, #11] + 8003f4e: f883 c00c strb.w ip, [r3, #12] + 8003f52: edd4 7a3b vldr s15, [r4, #236] ; 0xec + 8003f56: ee17 2a90 vmov r2, s15 + 8003f5a: f3c2 51c7 ubfx r1, r2, #23, #8 + 8003f5e: 2900 cmp r1, #0 + 8003f60: f000 816e beq.w 8004240 + 8003f64: f501 7160 add.w r1, r1, #896 ; 0x380 + 8003f68: 0108 lsls r0, r1, #4 + 8003f6a: 0909 lsrs r1, r1, #4 + 8003f6c: b240 sxtb r0, r0 + 8003f6e: eef5 7ac0 vcmpe.f32 s15, #0.0 + 8003f72: f3c2 4cc3 ubfx ip, r2, #19, #4 + 8003f76: 2700 movs r7, #0 + 8003f78: ea4f 1e42 mov.w lr, r2, lsl #5 + 8003f7c: ea40 000c orr.w r0, r0, ip + 8003f80: ea4f 0ce2 mov.w ip, r2, asr #3 + 8003f84: eef1 fa10 vmrs APSR_nzcv, fpscr + 8003f88: ea4f 22e2 mov.w r2, r2, asr #11 + 8003f8c: 741f strb r7, [r3, #16] + 8003f8e: 755a strb r2, [r3, #21] + 8003f90: bf48 it mi + 8003f92: f061 017f ornmi r1, r1, #127 ; 0x7f + 8003f96: 7598 strb r0, [r3, #22] + 8003f98: 745f strb r7, [r3, #17] + 8003f9a: 75d9 strb r1, [r3, #23] + 8003f9c: 749f strb r7, [r3, #18] + 8003f9e: f883 e013 strb.w lr, [r3, #19] + 8003fa2: f883 c014 strb.w ip, [r3, #20] + 8003fa6: edd4 7a3d vldr s15, [r4, #244] ; 0xf4 + 8003faa: ee17 2a90 vmov r2, s15 + 8003fae: f3c2 51c7 ubfx r1, r2, #23, #8 + 8003fb2: 2900 cmp r1, #0 + 8003fb4: f000 8142 beq.w 800423c + 8003fb8: f501 7160 add.w r1, r1, #896 ; 0x380 + 8003fbc: 0108 lsls r0, r1, #4 + 8003fbe: 0909 lsrs r1, r1, #4 + 8003fc0: b240 sxtb r0, r0 + 8003fc2: eef5 7ac0 vcmpe.f32 s15, #0.0 + 8003fc6: f3c2 4cc3 ubfx ip, r2, #19, #4 + 8003fca: 2700 movs r7, #0 + 8003fcc: ea4f 1e42 mov.w lr, r2, lsl #5 + 8003fd0: ea40 000c orr.w r0, r0, ip + 8003fd4: ea4f 0ce2 mov.w ip, r2, asr #3 + 8003fd8: eef1 fa10 vmrs APSR_nzcv, fpscr + 8003fdc: ea4f 22e2 mov.w r2, r2, asr #11 + 8003fe0: 761f strb r7, [r3, #24] + 8003fe2: 775a strb r2, [r3, #29] + 8003fe4: bf48 it mi + 8003fe6: f061 017f ornmi r1, r1, #127 ; 0x7f + 8003fea: 7798 strb r0, [r3, #30] + 8003fec: 765f strb r7, [r3, #25] + 8003fee: 77d9 strb r1, [r3, #31] + 8003ff0: 769f strb r7, [r3, #26] + 8003ff2: f883 e01b strb.w lr, [r3, #27] + 8003ff6: f883 c01c strb.w ip, [r3, #28] + 8003ffa: edd4 7a3e vldr s15, [r4, #248] ; 0xf8 + 8003ffe: ee17 2a90 vmov r2, s15 + 8004002: f3c2 51c7 ubfx r1, r2, #23, #8 + 8004006: 2900 cmp r1, #0 + 8004008: f000 8116 beq.w 8004238 + 800400c: f501 7160 add.w r1, r1, #896 ; 0x380 + 8004010: 0108 lsls r0, r1, #4 + 8004012: 0909 lsrs r1, r1, #4 + 8004014: b240 sxtb r0, r0 + 8004016: eef5 7ac0 vcmpe.f32 s15, #0.0 + 800401a: f3c2 4cc3 ubfx ip, r2, #19, #4 + 800401e: 2700 movs r7, #0 + 8004020: ea4f 1e42 mov.w lr, r2, lsl #5 + 8004024: ea40 000c orr.w r0, r0, ip + 8004028: ea4f 0ce2 mov.w ip, r2, asr #3 + 800402c: eef1 fa10 vmrs APSR_nzcv, fpscr + 8004030: ea4f 22e2 mov.w r2, r2, asr #11 + 8004034: f883 7020 strb.w r7, [r3, #32] + 8004038: f883 2025 strb.w r2, [r3, #37] ; 0x25 + 800403c: bf48 it mi + 800403e: f061 017f ornmi r1, r1, #127 ; 0x7f + 8004042: f883 0026 strb.w r0, [r3, #38] ; 0x26 + 8004046: f883 7021 strb.w r7, [r3, #33] ; 0x21 + 800404a: f883 1027 strb.w r1, [r3, #39] ; 0x27 + 800404e: f883 7022 strb.w r7, [r3, #34] ; 0x22 + 8004052: f883 e023 strb.w lr, [r3, #35] ; 0x23 + 8004056: f883 c024 strb.w ip, [r3, #36] ; 0x24 + 800405a: edd4 7a3f vldr s15, [r4, #252] ; 0xfc + 800405e: ee17 2a90 vmov r2, s15 + 8004062: f3c2 51c7 ubfx r1, r2, #23, #8 + 8004066: 2900 cmp r1, #0 + 8004068: f000 80e4 beq.w 8004234 + 800406c: f501 7160 add.w r1, r1, #896 ; 0x380 + 8004070: 0108 lsls r0, r1, #4 + 8004072: 0909 lsrs r1, r1, #4 + 8004074: b240 sxtb r0, r0 + 8004076: eef5 7ac0 vcmpe.f32 s15, #0.0 + 800407a: f3c2 4cc3 ubfx ip, r2, #19, #4 + 800407e: 2700 movs r7, #0 + 8004080: ea4f 1e42 mov.w lr, r2, lsl #5 + 8004084: ea40 000c orr.w r0, r0, ip + 8004088: ea4f 0ce2 mov.w ip, r2, asr #3 + 800408c: eef1 fa10 vmrs APSR_nzcv, fpscr + 8004090: f883 7028 strb.w r7, [r3, #40] ; 0x28 + 8004094: ea4f 22e2 mov.w r2, r2, asr #11 + 8004098: f883 7029 strb.w r7, [r3, #41] ; 0x29 + 800409c: f883 702a strb.w r7, [r3, #42] ; 0x2a + 80040a0: f04f 0700 mov.w r7, #0 + 80040a4: f883 c02c strb.w ip, [r3, #44] ; 0x2c + 80040a8: bf48 it mi + 80040aa: f061 017f ornmi r1, r1, #127 ; 0x7f + 80040ae: f8df c308 ldr.w ip, [pc, #776] ; 80043b8 + 80040b2: f883 002e strb.w r0, [r3, #46] ; 0x2e + 80040b6: f883 e02b strb.w lr, [r3, #43] ; 0x2b + 80040ba: f883 202d strb.w r2, [r3, #45] ; 0x2d + 80040be: f883 102f strb.w r1, [r3, #47] ; 0x2f + 80040c2: ecfc 7a01 vldmia ip!, {s15} + 80040c6: ee17 2a90 vmov r2, s15 + 80040ca: f3c2 51c7 ubfx r1, r2, #23, #8 + 80040ce: 4608 mov r0, r1 + 80040d0: f501 7e60 add.w lr, r1, #896 ; 0x380 + 80040d4: b121 cbz r1, 80040e0 + 80040d6: ea4f 110e mov.w r1, lr, lsl #4 + 80040da: ea4f 101e mov.w r0, lr, lsr #4 + 80040de: b249 sxtb r1, r1 + 80040e0: eef5 7ac0 vcmpe.f32 s15, #0.0 + 80040e4: f3c2 4ec3 ubfx lr, r2, #19, #4 + 80040e8: ea4f 1942 mov.w r9, r2, lsl #5 + 80040ec: f883 7030 strb.w r7, [r3, #48] ; 0x30 + 80040f0: ea41 010e orr.w r1, r1, lr + 80040f4: ea4f 0ee2 mov.w lr, r2, asr #3 + 80040f8: eef1 fa10 vmrs APSR_nzcv, fpscr + 80040fc: ea4f 22e2 mov.w r2, r2, asr #11 + 8004100: f883 7031 strb.w r7, [r3, #49] ; 0x31 + 8004104: f103 0308 add.w r3, r3, #8 + 8004108: f883 702a strb.w r7, [r3, #42] ; 0x2a + 800410c: bf48 it mi + 800410e: f060 007f ornmi r0, r0, #127 ; 0x7f + 8004112: 45e0 cmp r8, ip + 8004114: f883 102e strb.w r1, [r3, #46] ; 0x2e + 8004118: f883 902b strb.w r9, [r3, #43] ; 0x2b + 800411c: f883 e02c strb.w lr, [r3, #44] ; 0x2c + 8004120: f883 202d strb.w r2, [r3, #45] ; 0x2d + 8004124: f883 002f strb.w r0, [r3, #47] ; 0x2f + 8004128: d1cb bne.n 80040c2 + 800412a: 9901 ldr r1, [sp, #4] + 800412c: f50a 732a add.w r3, sl, #680 ; 0x2a8 + 8004130: f46f 702a mvn.w r0, #680 ; 0x2a8 + 8004134: f64f 67ff movw r7, #65279 ; 0xfeff + 8004138: f341 2207 sbfx r2, r1, #8, #8 + 800413c: f885 13a9 strb.w r1, [r5, #937] ; 0x3a9 + 8004140: b2d9 uxtb r1, r3 + 8004142: f3c3 2307 ubfx r3, r3, #8, #8 + 8004146: f885 23aa strb.w r2, [r5, #938] ; 0x3aa + 800414a: 4582 cmp sl, r0 + 800414c: eb01 0203 add.w r2, r1, r3 + 8004150: f885 33a7 strb.w r3, [r5, #935] ; 0x3a7 + 8004154: f885 13a6 strb.w r1, [r5, #934] ; 0x3a6 + 8004158: ea6f 0302 mvn.w r3, r2 + 800415c: f8a5 73a4 strh.w r7, [r5, #932] ; 0x3a4 + 8004160: f885 33a8 strb.w r3, [r5, #936] ; 0x3a8 + 8004164: f2c0 8086 blt.w 8004274 + 8004168: f205 6052 addw r0, r5, #1618 ; 0x652 + 800416c: f505 736a add.w r3, r5, #936 ; 0x3a8 + 8004170: 2200 movs r2, #0 + 8004172: 4450 add r0, sl + 8004174: f813 1f01 ldrb.w r1, [r3, #1]! + 8004178: 4283 cmp r3, r0 + 800417a: 440a add r2, r1 + 800417c: d1fa bne.n 8004174 + 800417e: 43d3 mvns r3, r2 + 8004180: b2db uxtb r3, r3 + 8004182: eb05 020a add.w r2, r5, sl + 8004186: f50a 7a2c add.w sl, sl, #688 ; 0x2b0 + 800418a: f5ba 7f00 cmp.w sl, #512 ; 0x200 + 800418e: f882 3653 strb.w r3, [r2, #1619] ; 0x653 + 8004192: dc75 bgt.n 8004280 + 8004194: f8d5 218c ldr.w r2, [r5, #396] ; 0x18c + 8004198: f5ba 7f80 cmp.w sl, #256 ; 0x100 + 800419c: f505 7369 add.w r3, r5, #932 ; 0x3a4 + 80041a0: f105 0904 add.w r9, r5, #4 + 80041a4: f5c2 7780 rsb r7, r2, #256 ; 0x100 + 80041a8: bfa8 it ge + 80041aa: f44f 7a80 movge.w sl, #256 ; 0x100 + 80041ae: 3288 adds r2, #136 ; 0x88 + 80041b0: 4619 mov r1, r3 + 80041b2: 4557 cmp r7, sl + 80041b4: 9300 str r3, [sp, #0] + 80041b6: eb09 0002 add.w r0, r9, r2 + 80041ba: bf28 it cs + 80041bc: 4657 movcs r7, sl + 80041be: 463a mov r2, r7 + 80041c0: f005 fdd4 bl 8009d6c + 80041c4: f8d5 218c ldr.w r2, [r5, #396] ; 0x18c + 80041c8: 45ba cmp sl, r7 + 80041ca: 4452 add r2, sl + 80041cc: b2d2 uxtb r2, r2 + 80041ce: f8c5 218c str.w r2, [r5, #396] ; 0x18c + 80041d2: d007 beq.n 80041e4 + 80041d4: 9b00 ldr r3, [sp, #0] + 80041d6: ebaa 0207 sub.w r2, sl, r7 + 80041da: f105 008c add.w r0, r5, #140 ; 0x8c + 80041de: 19d9 adds r1, r3, r7 + 80041e0: f005 fdc4 bl 8009d6c + 80041e4: 6868 ldr r0, [r5, #4] + 80041e6: 6f43 ldr r3, [r0, #116] ; 0x74 + 80041e8: 2b20 cmp r3, #32 + 80041ea: f47f ac15 bne.w 8003a18 + 80041ee: 4b6a ldr r3, [pc, #424] ; (8004398 ) + 80041f0: 781b ldrb r3, [r3, #0] + 80041f2: 2b00 cmp r3, #0 + 80041f4: f47f ac10 bne.w 8003a18 + 80041f8: f8d5 218c ldr.w r2, [r5, #396] ; 0x18c + 80041fc: 2101 movs r1, #1 + 80041fe: f8d5 3190 ldr.w r3, [r5, #400] ; 0x190 + 8004202: 4f65 ldr r7, [pc, #404] ; (8004398 ) + 8004204: 429a cmp r2, r3 + 8004206: 7039 strb r1, [r7, #0] + 8004208: d00f beq.n 800422a + 800420a: b29f uxth r7, r3 + 800420c: d934 bls.n 8004278 + 800420e: 1bd2 subs r2, r2, r7 + 8004210: b297 uxth r7, r2 + 8004212: 3388 adds r3, #136 ; 0x88 + 8004214: 463a mov r2, r7 + 8004216: eb09 0103 add.w r1, r9, r3 + 800421a: f003 fdc9 bl 8007db0 + 800421e: f8d5 3190 ldr.w r3, [r5, #400] ; 0x190 + 8004222: 443b add r3, r7 + 8004224: b2db uxtb r3, r3 + 8004226: f8c5 3190 str.w r3, [r5, #400] ; 0x190 + 800422a: 2300 movs r3, #0 + 800422c: 4a5a ldr r2, [pc, #360] ; (8004398 ) + 800422e: 7013 strb r3, [r2, #0] + 8004230: f7ff bbf2 b.w 8003a18 + 8004234: 4608 mov r0, r1 + 8004236: e71e b.n 8004076 + 8004238: 4608 mov r0, r1 + 800423a: e6ec b.n 8004016 + 800423c: 4608 mov r0, r1 + 800423e: e6c0 b.n 8003fc2 + 8004240: 4608 mov r0, r1 + 8004242: e694 b.n 8003f6e + 8004244: 4608 mov r0, r1 + 8004246: e668 b.n 8003f1a + 8004248: 468e mov lr, r1 + 800424a: e639 b.n 8003ec0 + 800424c: 4608 mov r0, r1 + 800424e: e5ca b.n 8003de6 + 8004250: 4608 mov r0, r1 + 8004252: e598 b.n 8003d86 + 8004254: 4608 mov r0, r1 + 8004256: e566 b.n 8003d26 + 8004258: 4608 mov r0, r1 + 800425a: e53a b.n 8003cd2 + 800425c: 4608 mov r0, r1 + 800425e: e50e b.n 8003c7e + 8004260: 4608 mov r0, r1 + 8004262: e4e2 b.n 8003c2a + 8004264: 4608 mov r0, r1 + 8004266: e4b3 b.n 8003bd0 + 8004268: 4611 mov r1, r2 + 800426a: 4628 mov r0, r5 + 800426c: 4a4b ldr r2, [pc, #300] ; (800439c ) + 800426e: 4798 blx r3 + 8004270: f7ff bbd2 b.w 8003a18 + 8004274: 23ff movs r3, #255 ; 0xff + 8004276: e784 b.n 8004182 + 8004278: f5c7 7780 rsb r7, r7, #256 ; 0x100 + 800427c: b2bf uxth r7, r7 + 800427e: e7c8 b.n 8004212 + 8004280: 4a47 ldr r2, [pc, #284] ; (80043a0 ) + 8004282: 2303 movs r3, #3 + 8004284: 9211 str r2, [sp, #68] ; 0x44 + 8004286: 4a47 ldr r2, [pc, #284] ; (80043a4 ) + 8004288: f88d 3048 strb.w r3, [sp, #72] ; 0x48 + 800428c: 9213 str r2, [sp, #76] ; 0x4c + 800428e: 682b ldr r3, [r5, #0] + 8004290: 4a45 ldr r2, [pc, #276] ; (80043a8 ) + 8004292: 681b ldr r3, [r3, #0] + 8004294: 4293 cmp r3, r2 + 8004296: d178 bne.n 800438a + 8004298: f643 0203 movw r2, #14339 ; 0x3803 + 800429c: 2300 movs r3, #0 + 800429e: 4f41 ldr r7, [pc, #260] ; (80043a4 ) + 80042a0: f505 7c6c add.w ip, r5, #944 ; 0x3b0 + 80042a4: f8c5 23ab str.w r2, [r5, #939] ; 0x3ab + 80042a8: f885 33af strb.w r3, [r5, #943] ; 0x3af + 80042ac: 46be mov lr, r7 + 80042ae: f10c 0c10 add.w ip, ip, #16 + 80042b2: 3710 adds r7, #16 + 80042b4: e8be 000f ldmia.w lr!, {r0, r1, r2, r3} + 80042b8: f84c 3c04 str.w r3, [ip, #-4] + 80042bc: 4b3b ldr r3, [pc, #236] ; (80043ac ) + 80042be: f84c 0c10 str.w r0, [ip, #-16] + 80042c2: 459e cmp lr, r3 + 80042c4: f84c 1c0c str.w r1, [ip, #-12] + 80042c8: f84c 2c08 str.w r2, [ip, #-8] + 80042cc: d1ee bne.n 80042ac + 80042ce: f04f 0e00 mov.w lr, #0 + 80042d2: f240 79c2 movw r9, #1986 ; 0x7c2 + 80042d6: f505 726a add.w r2, r5, #936 ; 0x3a8 + 80042da: 4673 mov r3, lr + 80042dc: cf03 ldmia r7!, {r0, r1} + 80042de: f8cc 0000 str.w r0, [ip] + 80042e2: f205 30e7 addw r0, r5, #999 ; 0x3e7 + 80042e6: f8cc 1004 str.w r1, [ip, #4] + 80042ea: 4931 ldr r1, [pc, #196] ; (80043b0 ) + 80042ec: f885 e3aa strb.w lr, [r5, #938] ; 0x3aa + 80042f0: f8c5 13a4 str.w r1, [r5, #932] ; 0x3a4 + 80042f4: f8a5 93a8 strh.w r9, [r5, #936] ; 0x3a8 + 80042f8: f812 1f01 ldrb.w r1, [r2, #1]! + 80042fc: 4290 cmp r0, r2 + 80042fe: 440b add r3, r1 + 8004300: d1fa bne.n 80042f8 + 8004302: f8d5 218c ldr.w r2, [r5, #396] ; 0x18c + 8004306: 43db mvns r3, r3 + 8004308: f105 0904 add.w r9, r5, #4 + 800430c: f505 7769 add.w r7, r5, #932 ; 0x3a4 + 8004310: f5c2 7a80 rsb sl, r2, #256 ; 0x100 + 8004314: f885 33e8 strb.w r3, [r5, #1000] ; 0x3e8 + 8004318: 3288 adds r2, #136 ; 0x88 + 800431a: 4639 mov r1, r7 + 800431c: 4653 mov r3, sl + 800431e: eb09 0002 add.w r0, r9, r2 + 8004322: 2b45 cmp r3, #69 ; 0x45 + 8004324: bf28 it cs + 8004326: 2345 movcs r3, #69 ; 0x45 + 8004328: 461a mov r2, r3 + 800432a: 9300 str r3, [sp, #0] + 800432c: f005 fd1e bl 8009d6c + 8004330: f8d5 218c ldr.w r2, [r5, #396] ; 0x18c + 8004334: f1ba 0f44 cmp.w sl, #68 ; 0x44 + 8004338: f102 0245 add.w r2, r2, #69 ; 0x45 + 800433c: b2d2 uxtb r2, r2 + 800433e: f8c5 218c str.w r2, [r5, #396] ; 0x18c + 8004342: d807 bhi.n 8004354 + 8004344: 9b00 ldr r3, [sp, #0] + 8004346: f105 008c add.w r0, r5, #140 ; 0x8c + 800434a: 18f9 adds r1, r7, r3 + 800434c: f1c3 0245 rsb r2, r3, #69 ; 0x45 + 8004350: f005 fd0c bl 8009d6c + 8004354: 6868 ldr r0, [r5, #4] + 8004356: 6f43 ldr r3, [r0, #116] ; 0x74 + 8004358: 2b20 cmp r3, #32 + 800435a: f47f ab5d bne.w 8003a18 + 800435e: 4b0e ldr r3, [pc, #56] ; (8004398 ) + 8004360: 781b ldrb r3, [r3, #0] + 8004362: 2b00 cmp r3, #0 + 8004364: f47f ab58 bne.w 8003a18 + 8004368: f8d5 118c ldr.w r1, [r5, #396] ; 0x18c + 800436c: 2201 movs r2, #1 + 800436e: f8d5 3190 ldr.w r3, [r5, #400] ; 0x190 + 8004372: 4f09 ldr r7, [pc, #36] ; (8004398 ) + 8004374: 4299 cmp r1, r3 + 8004376: 703a strb r2, [r7, #0] + 8004378: f43f af57 beq.w 800422a + 800437c: b29a uxth r2, r3 + 800437e: bf8c ite hi + 8004380: 1a8a subhi r2, r1, r2 + 8004382: f5c2 7280 rsbls r2, r2, #256 ; 0x100 + 8004386: b297 uxth r7, r2 + 8004388: e743 b.n 8004212 + 800438a: 4628 mov r0, r5 + 800438c: aa11 add r2, sp, #68 ; 0x44 + 800438e: 2107 movs r1, #7 + 8004390: 4798 blx r3 + 8004392: f7ff bb41 b.w 8003a18 + 8004396: bf00 nop + 8004398: 2000009c .word 0x2000009c + 800439c: 20000cf0 .word 0x20000cf0 + 80043a0: 0800a010 .word 0x0800a010 + 80043a4: 0800a380 .word 0x0800a380 + 80043a8: 080032d9 .word 0x080032d9 + 80043ac: 0800a3b0 .word 0x0800a3b0 + 80043b0: 003dfeff .word 0x003dfeff + 80043b4: 20000d38 .word 0x20000d38 + 80043b8: 20000df0 .word 0x20000df0 + +080043bc : + 80043bc: b570 push {r4, r5, r6, lr} + 80043be: 4c13 ldr r4, [pc, #76] ; (800440c ) + 80043c0: 6860 ldr r0, [r4, #4] + 80043c2: 6f43 ldr r3, [r0, #116] ; 0x74 + 80043c4: 2b20 cmp r3, #32 + 80043c6: d000 beq.n 80043ca + 80043c8: bd70 pop {r4, r5, r6, pc} + 80043ca: 4d11 ldr r5, [pc, #68] ; (8004410 ) + 80043cc: 782b ldrb r3, [r5, #0] + 80043ce: 2b00 cmp r3, #0 + 80043d0: d1fa bne.n 80043c8 + 80043d2: f8d4 318c ldr.w r3, [r4, #396] ; 0x18c + 80043d6: 2201 movs r2, #1 + 80043d8: f8d4 1190 ldr.w r1, [r4, #400] ; 0x190 + 80043dc: 702a strb r2, [r5, #0] + 80043de: 428b cmp r3, r1 + 80043e0: d011 beq.n 8004406 + 80043e2: b28e uxth r6, r1 + 80043e4: f101 018c add.w r1, r1, #140 ; 0x8c + 80043e8: bf8c ite hi + 80043ea: 1b9e subhi r6, r3, r6 + 80043ec: f5c6 7680 rsbls r6, r6, #256 ; 0x100 + 80043f0: 4421 add r1, r4 + 80043f2: b2b6 uxth r6, r6 + 80043f4: 4632 mov r2, r6 + 80043f6: f003 fcdb bl 8007db0 + 80043fa: f8d4 3190 ldr.w r3, [r4, #400] ; 0x190 + 80043fe: 441e add r6, r3 + 8004400: b2f6 uxtb r6, r6 + 8004402: f8c4 6190 str.w r6, [r4, #400] ; 0x190 + 8004406: 2300 movs r3, #0 + 8004408: 702b strb r3, [r5, #0] + 800440a: bd70 pop {r4, r5, r6, pc} + 800440c: 20000450 .word 0x20000450 + 8004410: 2000009c .word 0x2000009c + +08004414 : + 8004414: 4b03 ldr r3, [pc, #12] ; (8004424 ) + 8004416: 2280 movs r2, #128 ; 0x80 + 8004418: f103 0108 add.w r1, r3, #8 + 800441c: 6858 ldr r0, [r3, #4] + 800441e: f003 bd19 b.w 8007e54 + 8004422: bf00 nop + 8004424: 20000450 .word 0x20000450 + +08004428 : + 8004428: 4770 bx lr + 800442a: bf00 nop + +0800442c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15requestSyncTimeEv>: + 800442c: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} + 8004430: 4d3f ldr r5, [pc, #252] ; (8004530 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15requestSyncTimeEv+0x104>) + 8004432: b084 sub sp, #16 + 8004434: 6801 ldr r1, [r0, #0] + 8004436: 2300 movs r3, #0 + 8004438: 4a3e ldr r2, [pc, #248] ; (8004534 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15requestSyncTimeEv+0x108>) + 800443a: 4604 mov r4, r0 + 800443c: 9501 str r5, [sp, #4] + 800443e: 680d ldr r5, [r1, #0] + 8004440: 4295 cmp r5, r2 + 8004442: e9cd 3302 strd r3, r3, [sp, #8] + 8004446: d169 bne.n 800451c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15requestSyncTimeEv+0xf0> + 8004448: f8d0 018c ldr.w r0, [r0, #396] ; 0x18c + 800444c: f640 21f7 movw r1, #2807 ; 0xaf7 + 8004450: f8df e0e8 ldr.w lr, [pc, #232] ; 800453c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15requestSyncTimeEv+0x110> + 8004454: f06f 0c0a mvn.w ip, #10 + 8004458: f5c0 7680 rsb r6, r0, #256 ; 0x100 + 800445c: 1d25 adds r5, r4, #4 + 800445e: 3088 adds r0, #136 ; 0x88 + 8004460: f504 7869 add.w r8, r4, #932 ; 0x3a4 + 8004464: 2e10 cmp r6, #16 + 8004466: 4637 mov r7, r6 + 8004468: f8c4 33ac str.w r3, [r4, #940] ; 0x3ac + 800446c: 4428 add r0, r5 + 800446e: bf28 it cs + 8004470: 2710 movcs r7, #16 + 8004472: f8a4 33b0 strh.w r3, [r4, #944] ; 0x3b0 + 8004476: f884 33b2 strb.w r3, [r4, #946] ; 0x3b2 + 800447a: f8c4 13a8 str.w r1, [r4, #936] ; 0x3a8 + 800447e: 463a mov r2, r7 + 8004480: f8c4 e3a4 str.w lr, [r4, #932] ; 0x3a4 + 8004484: 4641 mov r1, r8 + 8004486: f884 c3b3 strb.w ip, [r4, #947] ; 0x3b3 + 800448a: f005 fc6f bl 8009d6c + 800448e: f8d4 318c ldr.w r3, [r4, #396] ; 0x18c + 8004492: 2e0f cmp r6, #15 + 8004494: f103 0310 add.w r3, r3, #16 + 8004498: b2db uxtb r3, r3 + 800449a: f8c4 318c str.w r3, [r4, #396] ; 0x18c + 800449e: d90a bls.n 80044b6 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15requestSyncTimeEv+0x8a> + 80044a0: 6860 ldr r0, [r4, #4] + 80044a2: 6f43 ldr r3, [r0, #116] ; 0x74 + 80044a4: 2b20 cmp r3, #32 + 80044a6: d012 beq.n 80044ce <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15requestSyncTimeEv+0xa2> + 80044a8: f001 fe54 bl 8006154 + 80044ac: f8c4 0194 str.w r0, [r4, #404] ; 0x194 + 80044b0: b004 add sp, #16 + 80044b2: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} + 80044b6: eb08 0107 add.w r1, r8, r7 + 80044ba: f1c7 0210 rsb r2, r7, #16 + 80044be: f104 008c add.w r0, r4, #140 ; 0x8c + 80044c2: f005 fc53 bl 8009d6c + 80044c6: 6860 ldr r0, [r4, #4] + 80044c8: 6f43 ldr r3, [r0, #116] ; 0x74 + 80044ca: 2b20 cmp r3, #32 + 80044cc: d1ec bne.n 80044a8 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15requestSyncTimeEv+0x7c> + 80044ce: 4e1a ldr r6, [pc, #104] ; (8004538 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15requestSyncTimeEv+0x10c>) + 80044d0: 7833 ldrb r3, [r6, #0] + 80044d2: 2b00 cmp r3, #0 + 80044d4: d1e8 bne.n 80044a8 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15requestSyncTimeEv+0x7c> + 80044d6: f8d4 118c ldr.w r1, [r4, #396] ; 0x18c + 80044da: 2301 movs r3, #1 + 80044dc: f8d4 2190 ldr.w r2, [r4, #400] ; 0x190 + 80044e0: 7033 strb r3, [r6, #0] + 80044e2: 4291 cmp r1, r2 + 80044e4: d011 beq.n 800450a <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15requestSyncTimeEv+0xde> + 80044e6: b293 uxth r3, r2 + 80044e8: bf8c ite hi + 80044ea: 1acb subhi r3, r1, r3 + 80044ec: f5c3 7380 rsbls r3, r3, #256 ; 0x100 + 80044f0: f102 0188 add.w r1, r2, #136 ; 0x88 + 80044f4: b29f uxth r7, r3 + 80044f6: 4429 add r1, r5 + 80044f8: 463a mov r2, r7 + 80044fa: f003 fc59 bl 8007db0 + 80044fe: f8d4 3190 ldr.w r3, [r4, #400] ; 0x190 + 8004502: 443b add r3, r7 + 8004504: b2db uxtb r3, r3 + 8004506: f8c4 3190 str.w r3, [r4, #400] ; 0x190 + 800450a: 2300 movs r3, #0 + 800450c: 7033 strb r3, [r6, #0] + 800450e: f001 fe21 bl 8006154 + 8004512: f8c4 0194 str.w r0, [r4, #404] ; 0x194 + 8004516: b004 add sp, #16 + 8004518: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} + 800451c: aa01 add r2, sp, #4 + 800451e: 210a movs r1, #10 + 8004520: 47a8 blx r5 + 8004522: f001 fe17 bl 8006154 + 8004526: f8c4 0194 str.w r0, [r4, #404] ; 0x194 + 800452a: b004 add sp, #16 + 800452c: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} + 8004530: 08009fe0 .word 0x08009fe0 + 8004534: 080032d9 .word 0x080032d9 + 8004538: 2000009c .word 0x2000009c + 800453c: 0008feff .word 0x0008feff + +08004540 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv>: + 8004540: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} + 8004544: 2200 movs r2, #0 + 8004546: b08f sub sp, #60 ; 0x3c + 8004548: 4b8f ldr r3, [pc, #572] ; (8004788 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x248>) + 800454a: 4604 mov r4, r0 + 800454c: 498f ldr r1, [pc, #572] ; (800478c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x24c>) + 800454e: f500 65b4 add.w r5, r0, #1440 ; 0x5a0 + 8004552: f200 6004 addw r0, r0, #1540 ; 0x604 + 8004556: f8ad 2024 strh.w r2, [sp, #36] ; 0x24 + 800455a: 9108 str r1, [sp, #32] + 800455c: 9001 str r0, [sp, #4] + 800455e: 920d str r2, [sp, #52] ; 0x34 + 8004560: 930c str r3, [sp, #48] ; 0x30 + 8004562: e9cd 330a strd r3, r3, [sp, #40] ; 0x28 + 8004566: f855 3f04 ldr.w r3, [r5, #4]! + 800456a: 2b00 cmp r3, #0 + 800456c: f000 80d9 beq.w 8004722 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x1e2> + 8004570: 681a ldr r2, [r3, #0] + 8004572: e9d3 0101 ldrd r0, r1, [r3, #4] + 8004576: 6806 ldr r6, [r0, #0] + 8004578: f8ad 1024 strh.w r1, [sp, #36] ; 0x24 + 800457c: 68b3 ldr r3, [r6, #8] + 800457e: 920a str r2, [sp, #40] ; 0x28 + 8004580: 4798 blx r3 + 8004582: 682b ldr r3, [r5, #0] + 8004584: 900b str r0, [sp, #44] ; 0x2c + 8004586: 6858 ldr r0, [r3, #4] + 8004588: 6803 ldr r3, [r0, #0] + 800458a: 68db ldr r3, [r3, #12] + 800458c: 4798 blx r3 + 800458e: 682a ldr r2, [r5, #0] + 8004590: 6823 ldr r3, [r4, #0] + 8004592: f44f 7100 mov.w r1, #512 ; 0x200 + 8004596: f8d2 a010 ldr.w sl, [r2, #16] + 800459a: 4681 mov r9, r0 + 800459c: 681b ldr r3, [r3, #0] + 800459e: 4a7c ldr r2, [pc, #496] ; (8004790 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x250>) + 80045a0: 4293 cmp r3, r2 + 80045a2: e9cd 010c strd r0, r1, [sp, #48] ; 0x30 + 80045a6: f040 8200 bne.w 80049aa <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x46a> + 80045aa: f1ba 0f63 cmp.w sl, #99 ; 0x63 + 80045ae: dd04 ble.n 80045ba <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x7a> + 80045b0: f894 3680 ldrb.w r3, [r4, #1664] ; 0x680 + 80045b4: 2b00 cmp r3, #0 + 80045b6: f000 80b4 beq.w 8004722 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x1e2> + 80045ba: f8bd 3024 ldrh.w r3, [sp, #36] ; 0x24 + 80045be: f204 37ab addw r7, r4, #939 ; 0x3ab + 80045c2: 9e0a ldr r6, [sp, #40] ; 0x28 + 80045c4: 0a1a lsrs r2, r3, #8 + 80045c6: f884 33ab strb.w r3, [r4, #939] ; 0x3ab + 80045ca: 4630 mov r0, r6 + 80045cc: f884 23ac strb.w r2, [r4, #940] ; 0x3ac + 80045d0: f7fb fe32 bl 8000238 + 80045d4: 4680 mov r8, r0 + 80045d6: 4631 mov r1, r6 + 80045d8: f204 30b1 addw r0, r4, #945 ; 0x3b1 + 80045dc: 4642 mov r2, r8 + 80045de: ea4f 2618 mov.w r6, r8, lsr #8 + 80045e2: ea4f 4318 mov.w r3, r8, lsr #16 + 80045e6: f884 83ad strb.w r8, [r4, #941] ; 0x3ad + 80045ea: f884 63ae strb.w r6, [r4, #942] ; 0x3ae + 80045ee: 0e16 lsrs r6, r2, #24 + 80045f0: f884 33af strb.w r3, [r4, #943] ; 0x3af + 80045f4: 1d93 adds r3, r2, #6 + 80045f6: f884 63b0 strb.w r6, [r4, #944] ; 0x3b0 + 80045fa: f108 0b0a add.w fp, r8, #10 + 80045fe: 9303 str r3, [sp, #12] + 8004600: f005 fbb4 bl 8009d6c + 8004604: 990b ldr r1, [sp, #44] ; 0x2c + 8004606: 44b8 add r8, r7 + 8004608: 4608 mov r0, r1 + 800460a: 9102 str r1, [sp, #8] + 800460c: f7fb fe14 bl 8000238 + 8004610: 9b03 ldr r3, [sp, #12] + 8004612: 4606 mov r6, r0 + 8004614: 0a00 lsrs r0, r0, #8 + 8004616: 9902 ldr r1, [sp, #8] + 8004618: 54fe strb r6, [r7, r3] + 800461a: 0c32 lsrs r2, r6, #16 + 800461c: 0e33 lsrs r3, r6, #24 + 800461e: f888 0007 strb.w r0, [r8, #7] + 8004622: f888 2008 strb.w r2, [r8, #8] + 8004626: eb07 000b add.w r0, r7, fp + 800462a: f888 3009 strb.w r3, [r8, #9] + 800462e: 4632 mov r2, r6 + 8004630: f005 fb9c bl 8009d6c + 8004634: 4648 mov r0, r9 + 8004636: f7fb fdff bl 8000238 + 800463a: 445e add r6, fp + 800463c: 4680 mov r8, r0 + 800463e: ea4f 2c10 mov.w ip, r0, lsr #8 + 8004642: 19bb adds r3, r7, r6 + 8004644: f106 0b04 add.w fp, r6, #4 + 8004648: ea4f 6218 mov.w r2, r8, lsr #24 + 800464c: 55b8 strb r0, [r7, r6] + 800464e: 0c00 lsrs r0, r0, #16 + 8004650: f883 c001 strb.w ip, [r3, #1] + 8004654: 70da strb r2, [r3, #3] + 8004656: 4642 mov r2, r8 + 8004658: 44d8 add r8, fp + 800465a: 7098 strb r0, [r3, #2] + 800465c: 4649 mov r1, r9 + 800465e: eb07 000b add.w r0, r7, fp + 8004662: f108 0604 add.w r6, r8, #4 + 8004666: f005 fb81 bl 8009d6c + 800466a: f44f 7300 mov.w r3, #512 ; 0x200 + 800466e: f34a 2c07 sbfx ip, sl, #8, #8 + 8004672: f3c6 2207 ubfx r2, r6, #8, #8 + 8004676: b2f1 uxtb r1, r6 + 8004678: f847 3008 str.w r3, [r7, r8] + 800467c: f64f 60ff movw r0, #65279 ; 0xfeff + 8004680: 188b adds r3, r1, r2 + 8004682: f884 23a7 strb.w r2, [r4, #935] ; 0x3a7 + 8004686: 1c72 adds r2, r6, #1 + 8004688: f884 a3a9 strb.w sl, [r4, #937] ; 0x3a9 + 800468c: ea6f 0303 mvn.w r3, r3 + 8004690: f884 c3aa strb.w ip, [r4, #938] ; 0x3aa + 8004694: f884 13a6 strb.w r1, [r4, #934] ; 0x3a6 + 8004698: f8a4 03a4 strh.w r0, [r4, #932] ; 0x3a4 + 800469c: f884 33a8 strb.w r3, [r4, #936] ; 0x3a8 + 80046a0: f2c0 818f blt.w 80049c2 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x482> + 80046a4: f204 30ae addw r0, r4, #942 ; 0x3ae + 80046a8: f504 736a add.w r3, r4, #936 ; 0x3a8 + 80046ac: 2100 movs r1, #0 + 80046ae: 4440 add r0, r8 + 80046b0: f813 2f01 ldrb.w r2, [r3, #1]! + 80046b4: 4298 cmp r0, r3 + 80046b6: 4411 add r1, r2 + 80046b8: d1fa bne.n 80046b0 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x170> + 80046ba: 43c9 mvns r1, r1 + 80046bc: b2c9 uxtb r1, r1 + 80046be: 19a3 adds r3, r4, r6 + 80046c0: 3608 adds r6, #8 + 80046c2: f5b6 7f00 cmp.w r6, #512 ; 0x200 + 80046c6: f883 13ab strb.w r1, [r3, #939] ; 0x3ab + 80046ca: f300 8210 bgt.w 8004aee <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x5ae> + 80046ce: f8d4 018c ldr.w r0, [r4, #396] ; 0x18c + 80046d2: f5b6 7f80 cmp.w r6, #256 ; 0x100 + 80046d6: f104 0804 add.w r8, r4, #4 + 80046da: f504 7969 add.w r9, r4, #932 ; 0x3a4 + 80046de: f5c0 7780 rsb r7, r0, #256 ; 0x100 + 80046e2: bfa8 it ge + 80046e4: f44f 7680 movge.w r6, #256 ; 0x100 + 80046e8: 3088 adds r0, #136 ; 0x88 + 80046ea: 4649 mov r1, r9 + 80046ec: 42b7 cmp r7, r6 + 80046ee: 4440 add r0, r8 + 80046f0: bf28 it cs + 80046f2: 4637 movcs r7, r6 + 80046f4: 463a mov r2, r7 + 80046f6: f005 fb39 bl 8009d6c + 80046fa: f8d4 318c ldr.w r3, [r4, #396] ; 0x18c + 80046fe: 42be cmp r6, r7 + 8004700: 4433 add r3, r6 + 8004702: b2db uxtb r3, r3 + 8004704: f8c4 318c str.w r3, [r4, #396] ; 0x18c + 8004708: d006 beq.n 8004718 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x1d8> + 800470a: 1bf2 subs r2, r6, r7 + 800470c: eb09 0107 add.w r1, r9, r7 + 8004710: f104 008c add.w r0, r4, #140 ; 0x8c + 8004714: f005 fb2a bl 8009d6c + 8004718: 6860 ldr r0, [r4, #4] + 800471a: 6f43 ldr r3, [r0, #116] ; 0x74 + 800471c: 2b20 cmp r3, #32 + 800471e: f000 8103 beq.w 8004928 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x3e8> + 8004722: 9b01 ldr r3, [sp, #4] + 8004724: 42ab cmp r3, r5 + 8004726: f47f af1e bne.w 8004566 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x26> + 800472a: 461e mov r6, r3 + 800472c: f504 68cd add.w r8, r4, #1640 ; 0x668 + 8004730: f856 3f04 ldr.w r3, [r6, #4]! + 8004734: 2b00 cmp r3, #0 + 8004736: f000 80ee beq.w 8004916 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x3d6> + 800473a: 6859 ldr r1, [r3, #4] + 800473c: 4618 mov r0, r3 + 800473e: 689a ldr r2, [r3, #8] + 8004740: 681b ldr r3, [r3, #0] + 8004742: f8ad 1024 strh.w r1, [sp, #36] ; 0x24 + 8004746: 920a str r2, [sp, #40] ; 0x28 + 8004748: 689b ldr r3, [r3, #8] + 800474a: 4798 blx r3 + 800474c: 6833 ldr r3, [r6, #0] + 800474e: 900b str r0, [sp, #44] ; 0x2c + 8004750: 681a ldr r2, [r3, #0] + 8004752: 4618 mov r0, r3 + 8004754: 68d3 ldr r3, [r2, #12] + 8004756: 4798 blx r3 + 8004758: 6833 ldr r3, [r6, #0] + 800475a: 6825 ldr r5, [r4, #0] + 800475c: f44f 7200 mov.w r2, #512 ; 0x200 + 8004760: 6819 ldr r1, [r3, #0] + 8004762: 682d ldr r5, [r5, #0] + 8004764: 900c str r0, [sp, #48] ; 0x30 + 8004766: 4618 mov r0, r3 + 8004768: 684b ldr r3, [r1, #4] + 800476a: 920d str r2, [sp, #52] ; 0x34 + 800476c: 4798 blx r3 + 800476e: 4b08 ldr r3, [pc, #32] ; (8004790 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x250>) + 8004770: 4681 mov r9, r0 + 8004772: 429d cmp r5, r3 + 8004774: f040 811e bne.w 80049b4 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x474> + 8004778: 2863 cmp r0, #99 ; 0x63 + 800477a: dd0b ble.n 8004794 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x254> + 800477c: f894 3680 ldrb.w r3, [r4, #1664] ; 0x680 + 8004780: 2b00 cmp r3, #0 + 8004782: f000 80c8 beq.w 8004916 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x3d6> + 8004786: e005 b.n 8004794 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x254> + 8004788: 0800a3b8 .word 0x0800a3b8 + 800478c: 08009ff8 .word 0x08009ff8 + 8004790: 080032d9 .word 0x080032d9 + 8004794: f8bd 3024 ldrh.w r3, [sp, #36] ; 0x24 + 8004798: f204 35ab addw r5, r4, #939 ; 0x3ab + 800479c: f8dd a028 ldr.w sl, [sp, #40] ; 0x28 + 80047a0: 0a1a lsrs r2, r3, #8 + 80047a2: f884 33ab strb.w r3, [r4, #939] ; 0x3ab + 80047a6: 4650 mov r0, sl + 80047a8: f884 23ac strb.w r2, [r4, #940] ; 0x3ac + 80047ac: f7fb fd44 bl 8000238 + 80047b0: 4607 mov r7, r0 + 80047b2: 4651 mov r1, sl + 80047b4: f204 30b1 addw r0, r4, #945 ; 0x3b1 + 80047b8: ea4f 2e17 mov.w lr, r7, lsr #8 + 80047bc: 463a mov r2, r7 + 80047be: ea4f 4c17 mov.w ip, r7, lsr #16 + 80047c2: f884 73ad strb.w r7, [r4, #941] ; 0x3ad + 80047c6: 0e3b lsrs r3, r7, #24 + 80047c8: f884 e3ae strb.w lr, [r4, #942] ; 0x3ae + 80047cc: f884 c3af strb.w ip, [r4, #943] ; 0x3af + 80047d0: f107 0a06 add.w sl, r7, #6 + 80047d4: f884 33b0 strb.w r3, [r4, #944] ; 0x3b0 + 80047d8: f107 0b0a add.w fp, r7, #10 + 80047dc: f005 fac6 bl 8009d6c + 80047e0: 990b ldr r1, [sp, #44] ; 0x2c + 80047e2: 442f add r7, r5 + 80047e4: 4608 mov r0, r1 + 80047e6: 9101 str r1, [sp, #4] + 80047e8: f7fb fd26 bl 8000238 + 80047ec: 4602 mov r2, r0 + 80047ee: ea4f 2e10 mov.w lr, r0, lsr #8 + 80047f2: f805 000a strb.w r0, [r5, sl] + 80047f6: ea4f 4c10 mov.w ip, r0, lsr #16 + 80047fa: 9901 ldr r1, [sp, #4] + 80047fc: 0e13 lsrs r3, r2, #24 + 80047fe: f887 e007 strb.w lr, [r7, #7] + 8004802: f887 c008 strb.w ip, [r7, #8] + 8004806: eb05 000b add.w r0, r5, fp + 800480a: 727b strb r3, [r7, #9] + 800480c: 4493 add fp, r2 + 800480e: f005 faad bl 8009d6c + 8004812: 990c ldr r1, [sp, #48] ; 0x30 + 8004814: f10b 0a04 add.w sl, fp, #4 + 8004818: 4608 mov r0, r1 + 800481a: 9101 str r1, [sp, #4] + 800481c: f7fb fd0c bl 8000238 + 8004820: 4607 mov r7, r0 + 8004822: eb05 030b add.w r3, r5, fp + 8004826: ea4f 2e10 mov.w lr, r0, lsr #8 + 800482a: ea4f 6c17 mov.w ip, r7, lsr #24 + 800482e: f805 000b strb.w r0, [r5, fp] + 8004832: 0c02 lsrs r2, r0, #16 + 8004834: f883 e001 strb.w lr, [r3, #1] + 8004838: eb05 000a add.w r0, r5, sl + 800483c: f883 c003 strb.w ip, [r3, #3] + 8004840: 709a strb r2, [r3, #2] + 8004842: 463a mov r2, r7 + 8004844: 9901 ldr r1, [sp, #4] + 8004846: f005 fa91 bl 8009d6c + 800484a: eb07 020a add.w r2, r7, sl + 800484e: 9b0d ldr r3, [sp, #52] ; 0x34 + 8004850: f349 2c07 sbfx ip, r9, #8, #8 + 8004854: 1d17 adds r7, r2, #4 + 8004856: 18a8 adds r0, r5, r2 + 8004858: 54ab strb r3, [r5, r2] + 800485a: 0a19 lsrs r1, r3, #8 + 800485c: fa5f fe87 uxtb.w lr, r7 + 8004860: f3c7 2507 ubfx r5, r7, #8, #8 + 8004864: 7041 strb r1, [r0, #1] + 8004866: ea4f 4a13 mov.w sl, r3, lsr #16 + 800486a: eb0e 0105 add.w r1, lr, r5 + 800486e: 0e1b lsrs r3, r3, #24 + 8004870: f880 a002 strb.w sl, [r0, #2] + 8004874: f64f 6aff movw sl, #65279 ; 0xfeff + 8004878: 70c3 strb r3, [r0, #3] + 800487a: 43c9 mvns r1, r1 + 800487c: 1c7b adds r3, r7, #1 + 800487e: f884 e3a6 strb.w lr, [r4, #934] ; 0x3a6 + 8004882: f884 13a8 strb.w r1, [r4, #936] ; 0x3a8 + 8004886: f884 53a7 strb.w r5, [r4, #935] ; 0x3a7 + 800488a: f884 93a9 strb.w r9, [r4, #937] ; 0x3a9 + 800488e: f884 c3aa strb.w ip, [r4, #938] ; 0x3aa + 8004892: f8a4 a3a4 strh.w sl, [r4, #932] ; 0x3a4 + 8004896: f2c0 8092 blt.w 80049be <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x47e> + 800489a: f204 30ae addw r0, r4, #942 ; 0x3ae + 800489e: f504 736a add.w r3, r4, #936 ; 0x3a8 + 80048a2: 2100 movs r1, #0 + 80048a4: 4410 add r0, r2 + 80048a6: f813 2f01 ldrb.w r2, [r3, #1]! + 80048aa: 4298 cmp r0, r3 + 80048ac: 4411 add r1, r2 + 80048ae: d1fa bne.n 80048a6 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x366> + 80048b0: 43c9 mvns r1, r1 + 80048b2: b2c9 uxtb r1, r1 + 80048b4: 19e3 adds r3, r4, r7 + 80048b6: 3708 adds r7, #8 + 80048b8: f5b7 7f00 cmp.w r7, #512 ; 0x200 + 80048bc: f883 13ab strb.w r1, [r3, #939] ; 0x3ab + 80048c0: f300 8087 bgt.w 80049d2 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x492> + 80048c4: f8d4 018c ldr.w r0, [r4, #396] ; 0x18c + 80048c8: f5b7 7f80 cmp.w r7, #256 ; 0x100 + 80048cc: f104 0904 add.w r9, r4, #4 + 80048d0: f504 7a69 add.w sl, r4, #932 ; 0x3a4 + 80048d4: f5c0 7580 rsb r5, r0, #256 ; 0x100 + 80048d8: bfa8 it ge + 80048da: f44f 7780 movge.w r7, #256 ; 0x100 + 80048de: 3088 adds r0, #136 ; 0x88 + 80048e0: 4651 mov r1, sl + 80048e2: 42bd cmp r5, r7 + 80048e4: 4448 add r0, r9 + 80048e6: bf28 it cs + 80048e8: 463d movcs r5, r7 + 80048ea: 462a mov r2, r5 + 80048ec: f005 fa3e bl 8009d6c + 80048f0: f8d4 318c ldr.w r3, [r4, #396] ; 0x18c + 80048f4: 42af cmp r7, r5 + 80048f6: 443b add r3, r7 + 80048f8: b2db uxtb r3, r3 + 80048fa: f8c4 318c str.w r3, [r4, #396] ; 0x18c + 80048fe: d006 beq.n 800490e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x3ce> + 8004900: 1b7a subs r2, r7, r5 + 8004902: eb0a 0105 add.w r1, sl, r5 + 8004906: f104 008c add.w r0, r4, #140 ; 0x8c + 800490a: f005 fa2f bl 8009d6c + 800490e: 6860 ldr r0, [r4, #4] + 8004910: 6f43 ldr r3, [r0, #116] ; 0x74 + 8004912: 2b20 cmp r3, #32 + 8004914: d029 beq.n 800496a <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x42a> + 8004916: 45b0 cmp r8, r6 + 8004918: f47f af0a bne.w 8004730 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x1f0> + 800491c: 2301 movs r3, #1 + 800491e: f884 3680 strb.w r3, [r4, #1664] ; 0x680 + 8004922: b00f add sp, #60 ; 0x3c + 8004924: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} + 8004928: 4ebd ldr r6, [pc, #756] ; (8004c20 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x6e0>) + 800492a: 7833 ldrb r3, [r6, #0] + 800492c: 2b00 cmp r3, #0 + 800492e: f47f aef8 bne.w 8004722 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x1e2> + 8004932: f8d4 218c ldr.w r2, [r4, #396] ; 0x18c + 8004936: 2101 movs r1, #1 + 8004938: f8d4 3190 ldr.w r3, [r4, #400] ; 0x190 + 800493c: 7031 strb r1, [r6, #0] + 800493e: 429a cmp r2, r3 + 8004940: d010 beq.n 8004964 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x424> + 8004942: b29f uxth r7, r3 + 8004944: d842 bhi.n 80049cc <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x48c> + 8004946: f5c7 7780 rsb r7, r7, #256 ; 0x100 + 800494a: b2bf uxth r7, r7 + 800494c: 3388 adds r3, #136 ; 0x88 + 800494e: 463a mov r2, r7 + 8004950: eb08 0103 add.w r1, r8, r3 + 8004954: f003 fa2c bl 8007db0 + 8004958: f8d4 3190 ldr.w r3, [r4, #400] ; 0x190 + 800495c: 443b add r3, r7 + 800495e: b2db uxtb r3, r3 + 8004960: f8c4 3190 str.w r3, [r4, #400] ; 0x190 + 8004964: 2300 movs r3, #0 + 8004966: 7033 strb r3, [r6, #0] + 8004968: e6db b.n 8004722 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x1e2> + 800496a: 4dad ldr r5, [pc, #692] ; (8004c20 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x6e0>) + 800496c: 782b ldrb r3, [r5, #0] + 800496e: 2b00 cmp r3, #0 + 8004970: d1d1 bne.n 8004916 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x3d6> + 8004972: f8d4 218c ldr.w r2, [r4, #396] ; 0x18c + 8004976: 2101 movs r1, #1 + 8004978: f8d4 3190 ldr.w r3, [r4, #400] ; 0x190 + 800497c: 7029 strb r1, [r5, #0] + 800497e: 429a cmp r2, r3 + 8004980: d010 beq.n 80049a4 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x464> + 8004982: b29f uxth r7, r3 + 8004984: d81f bhi.n 80049c6 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x486> + 8004986: f5c7 7780 rsb r7, r7, #256 ; 0x100 + 800498a: b2bf uxth r7, r7 + 800498c: 3388 adds r3, #136 ; 0x88 + 800498e: 463a mov r2, r7 + 8004990: eb09 0103 add.w r1, r9, r3 + 8004994: f003 fa0c bl 8007db0 + 8004998: f8d4 3190 ldr.w r3, [r4, #400] ; 0x190 + 800499c: 443b add r3, r7 + 800499e: b2db uxtb r3, r3 + 80049a0: f8c4 3190 str.w r3, [r4, #400] ; 0x190 + 80049a4: 2300 movs r3, #0 + 80049a6: 702b strb r3, [r5, #0] + 80049a8: e7b5 b.n 8004916 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x3d6> + 80049aa: 4651 mov r1, sl + 80049ac: aa08 add r2, sp, #32 + 80049ae: 4620 mov r0, r4 + 80049b0: 4798 blx r3 + 80049b2: e6b6 b.n 8004722 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x1e2> + 80049b4: 4601 mov r1, r0 + 80049b6: aa08 add r2, sp, #32 + 80049b8: 4620 mov r0, r4 + 80049ba: 47a8 blx r5 + 80049bc: e7ab b.n 8004916 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x3d6> + 80049be: 21ff movs r1, #255 ; 0xff + 80049c0: e778 b.n 80048b4 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x374> + 80049c2: 21ff movs r1, #255 ; 0xff + 80049c4: e67b b.n 80046be <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x17e> + 80049c6: 1bd2 subs r2, r2, r7 + 80049c8: b297 uxth r7, r2 + 80049ca: e7df b.n 800498c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x44c> + 80049cc: 1bd2 subs r2, r2, r7 + 80049ce: b297 uxth r7, r2 + 80049d0: e7bc b.n 800494c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x40c> + 80049d2: 2203 movs r2, #3 + 80049d4: 6823 ldr r3, [r4, #0] + 80049d6: 4d93 ldr r5, [pc, #588] ; (8004c24 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x6e4>) + 80049d8: f88d 2018 strb.w r2, [sp, #24] + 80049dc: 4a92 ldr r2, [pc, #584] ; (8004c28 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x6e8>) + 80049de: 681b ldr r3, [r3, #0] + 80049e0: 9205 str r2, [sp, #20] + 80049e2: 4a92 ldr r2, [pc, #584] ; (8004c2c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x6ec>) + 80049e4: 9507 str r5, [sp, #28] + 80049e6: 4293 cmp r3, r2 + 80049e8: f040 8114 bne.w 8004c14 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x6d4> + 80049ec: f643 0203 movw r2, #14339 ; 0x3803 + 80049f0: 2300 movs r3, #0 + 80049f2: f504 7c6c add.w ip, r4, #944 ; 0x3b0 + 80049f6: f105 0e30 add.w lr, r5, #48 ; 0x30 + 80049fa: f8c4 23ab str.w r2, [r4, #939] ; 0x3ab + 80049fe: f884 33af strb.w r3, [r4, #943] ; 0x3af + 8004a02: 462f mov r7, r5 + 8004a04: f10c 0c10 add.w ip, ip, #16 + 8004a08: 3510 adds r5, #16 + 8004a0a: cf0f ldmia r7!, {r0, r1, r2, r3} + 8004a0c: 4577 cmp r7, lr + 8004a0e: f84c 0c10 str.w r0, [ip, #-16] + 8004a12: f84c 1c0c str.w r1, [ip, #-12] + 8004a16: f84c 2c08 str.w r2, [ip, #-8] + 8004a1a: f84c 3c04 str.w r3, [ip, #-4] + 8004a1e: d1f0 bne.n 8004a02 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x4c2> + 8004a20: 2700 movs r7, #0 + 8004a22: f240 7ec2 movw lr, #1986 ; 0x7c2 + 8004a26: f504 736a add.w r3, r4, #936 ; 0x3a8 + 8004a2a: 463a mov r2, r7 + 8004a2c: cd03 ldmia r5!, {r0, r1} + 8004a2e: f8cc 0000 str.w r0, [ip] + 8004a32: f204 30e7 addw r0, r4, #999 ; 0x3e7 + 8004a36: f8cc 1004 str.w r1, [ip, #4] + 8004a3a: 497d ldr r1, [pc, #500] ; (8004c30 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x6f0>) + 8004a3c: f884 73aa strb.w r7, [r4, #938] ; 0x3aa + 8004a40: f8c4 13a4 str.w r1, [r4, #932] ; 0x3a4 + 8004a44: f8a4 e3a8 strh.w lr, [r4, #936] ; 0x3a8 + 8004a48: f813 1f01 ldrb.w r1, [r3, #1]! + 8004a4c: 4298 cmp r0, r3 + 8004a4e: 440a add r2, r1 + 8004a50: d1fa bne.n 8004a48 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x508> + 8004a52: f8d4 318c ldr.w r3, [r4, #396] ; 0x18c + 8004a56: 43d2 mvns r2, r2 + 8004a58: 1d27 adds r7, r4, #4 + 8004a5a: f504 7969 add.w r9, r4, #932 ; 0x3a4 + 8004a5e: f5c3 7580 rsb r5, r3, #256 ; 0x100 + 8004a62: 3388 adds r3, #136 ; 0x88 + 8004a64: f884 23e8 strb.w r2, [r4, #1000] ; 0x3e8 + 8004a68: 4649 mov r1, r9 + 8004a6a: 2d45 cmp r5, #69 ; 0x45 + 8004a6c: 46aa mov sl, r5 + 8004a6e: eb07 0003 add.w r0, r7, r3 + 8004a72: bf28 it cs + 8004a74: f04f 0a45 movcs.w sl, #69 ; 0x45 + 8004a78: 4652 mov r2, sl + 8004a7a: f005 f977 bl 8009d6c + 8004a7e: f8d4 318c ldr.w r3, [r4, #396] ; 0x18c + 8004a82: 2d44 cmp r5, #68 ; 0x44 + 8004a84: f103 0345 add.w r3, r3, #69 ; 0x45 + 8004a88: b2db uxtb r3, r3 + 8004a8a: f8c4 318c str.w r3, [r4, #396] ; 0x18c + 8004a8e: d807 bhi.n 8004aa0 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x560> + 8004a90: eb09 010a add.w r1, r9, sl + 8004a94: f1ca 0245 rsb r2, sl, #69 ; 0x45 + 8004a98: f104 008c add.w r0, r4, #140 ; 0x8c + 8004a9c: f005 f966 bl 8009d6c + 8004aa0: 6860 ldr r0, [r4, #4] + 8004aa2: 6f43 ldr r3, [r0, #116] ; 0x74 + 8004aa4: 2b20 cmp r3, #32 + 8004aa6: f47f af36 bne.w 8004916 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x3d6> + 8004aaa: 4d5d ldr r5, [pc, #372] ; (8004c20 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x6e0>) + 8004aac: 782b ldrb r3, [r5, #0] + 8004aae: 2b00 cmp r3, #0 + 8004ab0: f47f af31 bne.w 8004916 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x3d6> + 8004ab4: f8d4 118c ldr.w r1, [r4, #396] ; 0x18c + 8004ab8: 2201 movs r2, #1 + 8004aba: f8d4 3190 ldr.w r3, [r4, #400] ; 0x190 + 8004abe: 702a strb r2, [r5, #0] + 8004ac0: 4299 cmp r1, r3 + 8004ac2: f43f af6f beq.w 80049a4 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x464> + 8004ac6: b29a uxth r2, r3 + 8004ac8: f103 0388 add.w r3, r3, #136 ; 0x88 + 8004acc: bf8c ite hi + 8004ace: 1a8a subhi r2, r1, r2 + 8004ad0: f5c2 7280 rsbls r2, r2, #256 ; 0x100 + 8004ad4: 18f9 adds r1, r7, r3 + 8004ad6: fa1f f982 uxth.w r9, r2 + 8004ada: 464a mov r2, r9 + 8004adc: f003 f968 bl 8007db0 + 8004ae0: f8d4 3190 ldr.w r3, [r4, #400] ; 0x190 + 8004ae4: 444b add r3, r9 + 8004ae6: b2db uxtb r3, r3 + 8004ae8: f8c4 3190 str.w r3, [r4, #400] ; 0x190 + 8004aec: e75a b.n 80049a4 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x464> + 8004aee: 2203 movs r2, #3 + 8004af0: 6823 ldr r3, [r4, #0] + 8004af2: 4e4c ldr r6, [pc, #304] ; (8004c24 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x6e4>) + 8004af4: f88d 2018 strb.w r2, [sp, #24] + 8004af8: 4a4b ldr r2, [pc, #300] ; (8004c28 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x6e8>) + 8004afa: 681b ldr r3, [r3, #0] + 8004afc: 9205 str r2, [sp, #20] + 8004afe: 4a4b ldr r2, [pc, #300] ; (8004c2c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x6ec>) + 8004b00: 9607 str r6, [sp, #28] + 8004b02: 4293 cmp r3, r2 + 8004b04: f040 8081 bne.w 8004c0a <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x6ca> + 8004b08: f643 0203 movw r2, #14339 ; 0x3803 + 8004b0c: 2300 movs r3, #0 + 8004b0e: f504 7c6c add.w ip, r4, #944 ; 0x3b0 + 8004b12: f106 0e30 add.w lr, r6, #48 ; 0x30 + 8004b16: f8c4 23ab str.w r2, [r4, #939] ; 0x3ab + 8004b1a: f884 33af strb.w r3, [r4, #943] ; 0x3af + 8004b1e: 4637 mov r7, r6 + 8004b20: f10c 0c10 add.w ip, ip, #16 + 8004b24: 3610 adds r6, #16 + 8004b26: cf0f ldmia r7!, {r0, r1, r2, r3} + 8004b28: 4577 cmp r7, lr + 8004b2a: f84c 0c10 str.w r0, [ip, #-16] + 8004b2e: f84c 1c0c str.w r1, [ip, #-12] + 8004b32: f84c 2c08 str.w r2, [ip, #-8] + 8004b36: f84c 3c04 str.w r3, [ip, #-4] + 8004b3a: d1f0 bne.n 8004b1e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x5de> + 8004b3c: 2700 movs r7, #0 + 8004b3e: f240 7ec2 movw lr, #1986 ; 0x7c2 + 8004b42: f504 736a add.w r3, r4, #936 ; 0x3a8 + 8004b46: 463a mov r2, r7 + 8004b48: ce03 ldmia r6!, {r0, r1} + 8004b4a: f8cc 0000 str.w r0, [ip] + 8004b4e: f204 30e7 addw r0, r4, #999 ; 0x3e7 + 8004b52: f8cc 1004 str.w r1, [ip, #4] + 8004b56: 4936 ldr r1, [pc, #216] ; (8004c30 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x6f0>) + 8004b58: f884 73aa strb.w r7, [r4, #938] ; 0x3aa + 8004b5c: f8c4 13a4 str.w r1, [r4, #932] ; 0x3a4 + 8004b60: f8a4 e3a8 strh.w lr, [r4, #936] ; 0x3a8 + 8004b64: f813 1f01 ldrb.w r1, [r3, #1]! + 8004b68: 4298 cmp r0, r3 + 8004b6a: 440a add r2, r1 + 8004b6c: d1fa bne.n 8004b64 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x624> + 8004b6e: f8d4 318c ldr.w r3, [r4, #396] ; 0x18c + 8004b72: 43d2 mvns r2, r2 + 8004b74: 1d27 adds r7, r4, #4 + 8004b76: f504 7869 add.w r8, r4, #932 ; 0x3a4 + 8004b7a: f5c3 7680 rsb r6, r3, #256 ; 0x100 + 8004b7e: 3388 adds r3, #136 ; 0x88 + 8004b80: f884 23e8 strb.w r2, [r4, #1000] ; 0x3e8 + 8004b84: 4641 mov r1, r8 + 8004b86: 2e45 cmp r6, #69 ; 0x45 + 8004b88: 46b1 mov r9, r6 + 8004b8a: eb07 0003 add.w r0, r7, r3 + 8004b8e: bf28 it cs + 8004b90: f04f 0945 movcs.w r9, #69 ; 0x45 + 8004b94: 464a mov r2, r9 + 8004b96: f005 f8e9 bl 8009d6c + 8004b9a: f8d4 318c ldr.w r3, [r4, #396] ; 0x18c + 8004b9e: 2e44 cmp r6, #68 ; 0x44 + 8004ba0: f103 0345 add.w r3, r3, #69 ; 0x45 + 8004ba4: b2db uxtb r3, r3 + 8004ba6: f8c4 318c str.w r3, [r4, #396] ; 0x18c + 8004baa: d807 bhi.n 8004bbc <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x67c> + 8004bac: eb08 0109 add.w r1, r8, r9 + 8004bb0: f1c9 0245 rsb r2, r9, #69 ; 0x45 + 8004bb4: f104 008c add.w r0, r4, #140 ; 0x8c + 8004bb8: f005 f8d8 bl 8009d6c + 8004bbc: 6860 ldr r0, [r4, #4] + 8004bbe: 6f43 ldr r3, [r0, #116] ; 0x74 + 8004bc0: 2b20 cmp r3, #32 + 8004bc2: f47f adae bne.w 8004722 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x1e2> + 8004bc6: 4e16 ldr r6, [pc, #88] ; (8004c20 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x6e0>) + 8004bc8: 7833 ldrb r3, [r6, #0] + 8004bca: 2b00 cmp r3, #0 + 8004bcc: f47f ada9 bne.w 8004722 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x1e2> + 8004bd0: f8d4 118c ldr.w r1, [r4, #396] ; 0x18c + 8004bd4: 2201 movs r2, #1 + 8004bd6: f8d4 3190 ldr.w r3, [r4, #400] ; 0x190 + 8004bda: 7032 strb r2, [r6, #0] + 8004bdc: 4299 cmp r1, r3 + 8004bde: f43f aec1 beq.w 8004964 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x424> + 8004be2: b29a uxth r2, r3 + 8004be4: f103 0388 add.w r3, r3, #136 ; 0x88 + 8004be8: bf8c ite hi + 8004bea: 1a8a subhi r2, r1, r2 + 8004bec: f5c2 7280 rsbls r2, r2, #256 ; 0x100 + 8004bf0: 18f9 adds r1, r7, r3 + 8004bf2: fa1f f882 uxth.w r8, r2 + 8004bf6: 4642 mov r2, r8 + 8004bf8: f003 f8da bl 8007db0 + 8004bfc: f8d4 3190 ldr.w r3, [r4, #400] ; 0x190 + 8004c00: 4443 add r3, r8 + 8004c02: b2db uxtb r3, r3 + 8004c04: f8c4 3190 str.w r3, [r4, #400] ; 0x190 + 8004c08: e6ac b.n 8004964 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x424> + 8004c0a: aa05 add r2, sp, #20 + 8004c0c: 2107 movs r1, #7 + 8004c0e: 4620 mov r0, r4 + 8004c10: 4798 blx r3 + 8004c12: e586 b.n 8004722 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x1e2> + 8004c14: aa05 add r2, sp, #20 + 8004c16: 2107 movs r1, #7 + 8004c18: 4620 mov r0, r4 + 8004c1a: 4798 blx r3 + 8004c1c: e67b b.n 8004916 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x3d6> + 8004c1e: bf00 nop + 8004c20: 2000009c .word 0x2000009c + 8004c24: 0800a380 .word 0x0800a380 + 8004c28: 0800a010 .word 0x0800a010 + 8004c2c: 080032d9 .word 0x080032d9 + 8004c30: 003dfeff .word 0x003dfeff + +08004c34 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv>: + 8004c34: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} + 8004c38: 4604 mov r4, r0 + 8004c3a: b089 sub sp, #36 ; 0x24 + 8004c3c: f001 fa8a bl 8006154 + 8004c40: f642 22f8 movw r2, #11000 ; 0x2af8 + 8004c44: f8d4 3688 ldr.w r3, [r4, #1672] ; 0x688 + 8004c48: 4605 mov r5, r0 + 8004c4a: 1ac3 subs r3, r0, r3 + 8004c4c: 4293 cmp r3, r2 + 8004c4e: d902 bls.n 8004c56 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x22> + 8004c50: 2300 movs r3, #0 + 8004c52: f884 3680 strb.w r3, [r4, #1664] ; 0x680 + 8004c56: f8d4 366c ldr.w r3, [r4, #1644] ; 0x66c + 8004c5a: b133 cbz r3, 8004c6a <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x36> + 8004c5c: f8d4 368c ldr.w r3, [r4, #1676] ; 0x68c + 8004c60: 42ab cmp r3, r5 + 8004c62: d202 bcs.n 8004c6a <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x36> + 8004c64: 2300 movs r3, #0 + 8004c66: f8c4 366c str.w r3, [r4, #1644] ; 0x66c + 8004c6a: f8d4 11a0 ldr.w r1, [r4, #416] ; 0x1a0 + 8004c6e: f8df b438 ldr.w fp, [pc, #1080] ; 80050a8 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x474> + 8004c72: f8df a438 ldr.w sl, [pc, #1080] ; 80050ac <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x478> + 8004c76: bb39 cbnz r1, 8004cc8 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x94> + 8004c78: 6862 ldr r2, [r4, #4] + 8004c7a: f8d4 3088 ldr.w r3, [r4, #136] ; 0x88 + 8004c7e: 6ed2 ldr r2, [r2, #108] ; 0x6c + 8004c80: 6812 ldr r2, [r2, #0] + 8004c82: 6852 ldr r2, [r2, #4] + 8004c84: 4252 negs r2, r2 + 8004c86: f002 027f and.w r2, r2, #127 ; 0x7f + 8004c8a: 4293 cmp r3, r2 + 8004c8c: f000 80e1 beq.w 8004e52 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x21e> + 8004c90: 18e0 adds r0, r4, r3 + 8004c92: f8d4 267c ldr.w r2, [r4, #1660] ; 0x67c + 8004c96: 3301 adds r3, #1 + 8004c98: f8d4 666c ldr.w r6, [r4, #1644] ; 0x66c + 8004c9c: 7a00 ldrb r0, [r0, #8] + 8004c9e: f003 037f and.w r3, r3, #127 ; 0x7f + 8004ca2: 2e07 cmp r6, #7 + 8004ca4: 4402 add r2, r0 + 8004ca6: f8c4 3088 str.w r3, [r4, #136] ; 0x88 + 8004caa: f8c4 267c str.w r2, [r4, #1660] ; 0x67c + 8004cae: d017 beq.n 8004ce0 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0xac> + 8004cb0: bb5e cbnz r6, 8004d0a <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0xd6> + 8004cb2: 28ff cmp r0, #255 ; 0xff + 8004cb4: d163 bne.n 8004d7e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x14a> + 8004cb6: 2201 movs r2, #1 + 8004cb8: f105 0314 add.w r3, r5, #20 + 8004cbc: f8c4 266c str.w r2, [r4, #1644] ; 0x66c + 8004cc0: f8c4 368c str.w r3, [r4, #1676] ; 0x68c + 8004cc4: 2900 cmp r1, #0 + 8004cc6: d0d7 beq.n 8004c78 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x44> + 8004cc8: f001 fa44 bl 8006154 + 8004ccc: f8d4 11a0 ldr.w r1, [r4, #416] ; 0x1a0 + 8004cd0: 1b40 subs r0, r0, r5 + 8004cd2: 4288 cmp r0, r1 + 8004cd4: d9d0 bls.n 8004c78 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x44> + 8004cd6: f06f 0001 mvn.w r0, #1 + 8004cda: b009 add sp, #36 ; 0x24 + 8004cdc: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} + 8004ce0: f8d4 3678 ldr.w r3, [r4, #1656] ; 0x678 + 8004ce4: 1c5a adds r2, r3, #1 + 8004ce6: 4423 add r3, r4 + 8004ce8: f8c4 2678 str.w r2, [r4, #1656] ; 0x678 + 8004cec: f883 01a4 strb.w r0, [r3, #420] ; 0x1a4 + 8004cf0: f8d4 3670 ldr.w r3, [r4, #1648] ; 0x670 + 8004cf4: 3b01 subs r3, #1 + 8004cf6: f8c4 3670 str.w r3, [r4, #1648] ; 0x670 + 8004cfa: 2b00 cmp r3, #0 + 8004cfc: d13c bne.n 8004d78 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x144> + 8004cfe: f8d4 11a0 ldr.w r1, [r4, #416] ; 0x1a0 + 8004d02: 2308 movs r3, #8 + 8004d04: f8c4 366c str.w r3, [r4, #1644] ; 0x66c + 8004d08: e7b5 b.n 8004c76 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x42> + 8004d0a: 2e01 cmp r6, #1 + 8004d0c: d045 beq.n 8004d9a <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x166> + 8004d0e: 2e02 cmp r6, #2 + 8004d10: f000 808a beq.w 8004e28 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x1f4> + 8004d14: 2e03 cmp r6, #3 + 8004d16: f000 8092 beq.w 8004e3e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x20a> + 8004d1a: 2e04 cmp r6, #4 + 8004d1c: f000 80ad beq.w 8004e7a <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x246> + 8004d20: 2e05 cmp r6, #5 + 8004d22: f000 80c5 beq.w 8004eb0 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x27c> + 8004d26: 2e06 cmp r6, #6 + 8004d28: f000 80b3 beq.w 8004e92 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x25e> + 8004d2c: 2e08 cmp r6, #8 + 8004d2e: d1a2 bne.n 8004c76 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x42> + 8004d30: 4253 negs r3, r2 + 8004d32: b2d2 uxtb r2, r2 + 8004d34: f04f 0000 mov.w r0, #0 + 8004d38: b2db uxtb r3, r3 + 8004d3a: f8c4 066c str.w r0, [r4, #1644] ; 0x66c + 8004d3e: bf58 it pl + 8004d40: 425a negpl r2, r3 + 8004d42: 2aff cmp r2, #255 ; 0xff + 8004d44: d197 bne.n 8004c76 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x42> + 8004d46: f8d4 3674 ldr.w r3, [r4, #1652] ; 0x674 + 8004d4a: 2b00 cmp r3, #0 + 8004d4c: f000 82ae beq.w 80052ac <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x678> + 8004d50: 2b0a cmp r3, #10 + 8004d52: f000 8136 beq.w 8004fc2 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x38e> + 8004d56: 2b06 cmp r3, #6 + 8004d58: f000 81aa beq.w 80050b0 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x47c> + 8004d5c: 2b0b cmp r3, #11 + 8004d5e: f000 8198 beq.w 8005092 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x45e> + 8004d62: f503 738f add.w r3, r3, #286 ; 0x11e + 8004d66: f854 0023 ldr.w r0, [r4, r3, lsl #2] + 8004d6a: 2800 cmp r0, #0 + 8004d6c: d083 beq.n 8004c76 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x42> + 8004d6e: 6803 ldr r3, [r0, #0] + 8004d70: f504 71d2 add.w r1, r4, #420 ; 0x1a4 + 8004d74: 681b ldr r3, [r3, #0] + 8004d76: 4798 blx r3 + 8004d78: f8d4 11a0 ldr.w r1, [r4, #416] ; 0x1a0 + 8004d7c: e77b b.n 8004c76 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x42> + 8004d7e: f001 f9e9 bl 8006154 + 8004d82: f241 3388 movw r3, #5000 ; 0x1388 + 8004d86: 1b40 subs r0, r0, r5 + 8004d88: 4298 cmp r0, r3 + 8004d8a: d9f5 bls.n 8004d78 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x144> + 8004d8c: f06f 0001 mvn.w r0, #1 + 8004d90: f884 6680 strb.w r6, [r4, #1664] ; 0x680 + 8004d94: b009 add sp, #36 ; 0x24 + 8004d96: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} + 8004d9a: 28fe cmp r0, #254 ; 0xfe + 8004d9c: d069 beq.n 8004e72 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x23e> + 8004d9e: 2200 movs r2, #0 + 8004da0: f894 3680 ldrb.w r3, [r4, #1664] ; 0x680 + 8004da4: f8c4 266c str.w r2, [r4, #1644] ; 0x66c + 8004da8: 2b00 cmp r3, #0 + 8004daa: f47f af64 bne.w 8004c76 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x42> + 8004dae: 6822 ldr r2, [r4, #0] + 8004db0: 49b9 ldr r1, [pc, #740] ; (8005098 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x464>) + 8004db2: 6816 ldr r6, [r2, #0] + 8004db4: 4ab9 ldr r2, [pc, #740] ; (800509c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x468>) + 8004db6: 9105 str r1, [sp, #20] + 8004db8: 4296 cmp r6, r2 + 8004dba: e9cd 3306 strd r3, r3, [sp, #24] + 8004dbe: f040 80fb bne.w 8004fb8 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x384> + 8004dc2: f8d4 018c ldr.w r0, [r4, #396] ; 0x18c + 8004dc6: f640 2cf7 movw ip, #2807 ; 0xaf7 + 8004dca: 4ab5 ldr r2, [pc, #724] ; (80050a0 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x46c>) + 8004dcc: f04f 4175 mov.w r1, #4110417920 ; 0xf5000000 + 8004dd0: f5c0 7680 rsb r6, r0, #256 ; 0x100 + 8004dd4: 1d27 adds r7, r4, #4 + 8004dd6: 3088 adds r0, #136 ; 0x88 + 8004dd8: f504 7969 add.w r9, r4, #932 ; 0x3a4 + 8004ddc: 2e10 cmp r6, #16 + 8004dde: 46b0 mov r8, r6 + 8004de0: f8c4 33ac str.w r3, [r4, #940] ; 0x3ac + 8004de4: 4438 add r0, r7 + 8004de6: bf28 it cs + 8004de8: f04f 0810 movcs.w r8, #16 + 8004dec: f8c4 23a4 str.w r2, [r4, #932] ; 0x3a4 + 8004df0: f8c4 13b0 str.w r1, [r4, #944] ; 0x3b0 + 8004df4: 4649 mov r1, r9 + 8004df6: 4642 mov r2, r8 + 8004df8: f8c4 c3a8 str.w ip, [r4, #936] ; 0x3a8 + 8004dfc: f004 ffb6 bl 8009d6c + 8004e00: f8d4 318c ldr.w r3, [r4, #396] ; 0x18c + 8004e04: 2e0f cmp r6, #15 + 8004e06: f103 0310 add.w r3, r3, #16 + 8004e0a: b2db uxtb r3, r3 + 8004e0c: f8c4 318c str.w r3, [r4, #396] ; 0x18c + 8004e10: d956 bls.n 8004ec0 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x28c> + 8004e12: 6860 ldr r0, [r4, #4] + 8004e14: 6f43 ldr r3, [r0, #116] ; 0x74 + 8004e16: 2b20 cmp r3, #32 + 8004e18: d05e beq.n 8004ed8 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x2a4> + 8004e1a: f001 f99b bl 8006154 + 8004e1e: f8d4 11a0 ldr.w r1, [r4, #416] ; 0x1a0 + 8004e22: f8c4 0194 str.w r0, [r4, #404] ; 0x194 + 8004e26: e726 b.n 8004c76 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x42> + 8004e28: 2200 movs r2, #0 + 8004e2a: 2303 movs r3, #3 + 8004e2c: f8c4 0670 str.w r0, [r4, #1648] ; 0x670 + 8004e30: f8c4 067c str.w r0, [r4, #1660] ; 0x67c + 8004e34: f8c4 2678 str.w r2, [r4, #1656] ; 0x678 + 8004e38: f8c4 366c str.w r3, [r4, #1644] ; 0x66c + 8004e3c: e71b b.n 8004c76 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x42> + 8004e3e: f8d4 3670 ldr.w r3, [r4, #1648] ; 0x670 + 8004e42: 2204 movs r2, #4 + 8004e44: eb03 2000 add.w r0, r3, r0, lsl #8 + 8004e48: f8c4 266c str.w r2, [r4, #1644] ; 0x66c + 8004e4c: f8c4 0670 str.w r0, [r4, #1648] ; 0x670 + 8004e50: e711 b.n 8004c76 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x42> + 8004e52: f894 0680 ldrb.w r0, [r4, #1664] ; 0x680 + 8004e56: 2800 cmp r0, #0 + 8004e58: f43f af3f beq.w 8004cda <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0xa6> + 8004e5c: f8d4 3684 ldr.w r3, [r4, #1668] ; 0x684 + 8004e60: f640 12c4 movw r2, #2500 ; 0x9c4 + 8004e64: 1aeb subs r3, r5, r3 + 8004e66: 4293 cmp r3, r2 + 8004e68: d858 bhi.n 8004f1c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x2e8> + 8004e6a: 2000 movs r0, #0 + 8004e6c: b009 add sp, #36 ; 0x24 + 8004e6e: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} + 8004e72: 2302 movs r3, #2 + 8004e74: f8c4 366c str.w r3, [r4, #1644] ; 0x66c + 8004e78: e6fd b.n 8004c76 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x42> + 8004e7a: 4253 negs r3, r2 + 8004e7c: b2d2 uxtb r2, r2 + 8004e7e: b2db uxtb r3, r3 + 8004e80: bf58 it pl + 8004e82: 425a negpl r2, r3 + 8004e84: 2aff cmp r2, #255 ; 0xff + 8004e86: bf0c ite eq + 8004e88: 2305 moveq r3, #5 + 8004e8a: 2300 movne r3, #0 + 8004e8c: f8c4 366c str.w r3, [r4, #1644] ; 0x66c + 8004e90: e6f1 b.n 8004c76 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x42> + 8004e92: f8d4 3674 ldr.w r3, [r4, #1652] ; 0x674 + 8004e96: 2607 movs r6, #7 + 8004e98: f8d4 2670 ldr.w r2, [r4, #1648] ; 0x670 + 8004e9c: eb03 2300 add.w r3, r3, r0, lsl #8 + 8004ea0: f8c4 666c str.w r6, [r4, #1644] ; 0x66c + 8004ea4: f8c4 3674 str.w r3, [r4, #1652] ; 0x674 + 8004ea8: 2a00 cmp r2, #0 + 8004eaa: f43f af2a beq.w 8004d02 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0xce> + 8004eae: e6e2 b.n 8004c76 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x42> + 8004eb0: 2306 movs r3, #6 + 8004eb2: f8c4 0674 str.w r0, [r4, #1652] ; 0x674 + 8004eb6: f8c4 067c str.w r0, [r4, #1660] ; 0x67c + 8004eba: f8c4 366c str.w r3, [r4, #1644] ; 0x66c + 8004ebe: e6da b.n 8004c76 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x42> + 8004ec0: eb09 0108 add.w r1, r9, r8 + 8004ec4: f1c8 0210 rsb r2, r8, #16 + 8004ec8: f104 008c add.w r0, r4, #140 ; 0x8c + 8004ecc: f004 ff4e bl 8009d6c + 8004ed0: 6860 ldr r0, [r4, #4] + 8004ed2: 6f43 ldr r3, [r0, #116] ; 0x74 + 8004ed4: 2b20 cmp r3, #32 + 8004ed6: d1a0 bne.n 8004e1a <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x1e6> + 8004ed8: 4e72 ldr r6, [pc, #456] ; (80050a4 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x470>) + 8004eda: 7833 ldrb r3, [r6, #0] + 8004edc: 2b00 cmp r3, #0 + 8004ede: d19c bne.n 8004e1a <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x1e6> + 8004ee0: f8d4 218c ldr.w r2, [r4, #396] ; 0x18c + 8004ee4: 2101 movs r1, #1 + 8004ee6: f8d4 3190 ldr.w r3, [r4, #400] ; 0x190 + 8004eea: 7031 strb r1, [r6, #0] + 8004eec: 429a cmp r2, r3 + 8004eee: d012 beq.n 8004f16 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x2e2> + 8004ef0: fa1f f883 uxth.w r8, r3 + 8004ef4: f240 80c8 bls.w 8005088 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x454> + 8004ef8: eba2 0208 sub.w r2, r2, r8 + 8004efc: fa1f f882 uxth.w r8, r2 + 8004f00: 3388 adds r3, #136 ; 0x88 + 8004f02: 4642 mov r2, r8 + 8004f04: 18f9 adds r1, r7, r3 + 8004f06: f002 ff53 bl 8007db0 + 8004f0a: f8d4 3190 ldr.w r3, [r4, #400] ; 0x190 + 8004f0e: 4443 add r3, r8 + 8004f10: b2db uxtb r3, r3 + 8004f12: f8c4 3190 str.w r3, [r4, #400] ; 0x190 + 8004f16: 2300 movs r3, #0 + 8004f18: 7033 strb r3, [r6, #0] + 8004f1a: e77e b.n 8004e1a <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x1e6> + 8004f1c: 6822 ldr r2, [r4, #0] + 8004f1e: 2300 movs r3, #0 + 8004f20: 495d ldr r1, [pc, #372] ; (8005098 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x464>) + 8004f22: 6816 ldr r6, [r2, #0] + 8004f24: 4a5d ldr r2, [pc, #372] ; (800509c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x468>) + 8004f26: 9307 str r3, [sp, #28] + 8004f28: 4296 cmp r6, r2 + 8004f2a: e9cd 1305 strd r1, r3, [sp, #20] + 8004f2e: f040 80a6 bne.w 800507e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x44a> + 8004f32: f8d4 018c ldr.w r0, [r4, #396] ; 0x18c + 8004f36: f640 21f7 movw r1, #2807 ; 0xaf7 + 8004f3a: f8df e164 ldr.w lr, [pc, #356] ; 80050a0 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x46c> + 8004f3e: f06f 0c0a mvn.w ip, #10 + 8004f42: f5c0 7780 rsb r7, r0, #256 ; 0x100 + 8004f46: 1d26 adds r6, r4, #4 + 8004f48: 3088 adds r0, #136 ; 0x88 + 8004f4a: f504 7969 add.w r9, r4, #932 ; 0x3a4 + 8004f4e: 2f10 cmp r7, #16 + 8004f50: 46b8 mov r8, r7 + 8004f52: f8c4 33ac str.w r3, [r4, #940] ; 0x3ac + 8004f56: 4430 add r0, r6 + 8004f58: bf28 it cs + 8004f5a: f04f 0810 movcs.w r8, #16 + 8004f5e: f8a4 33b0 strh.w r3, [r4, #944] ; 0x3b0 + 8004f62: f884 33b2 strb.w r3, [r4, #946] ; 0x3b2 + 8004f66: f8c4 13a8 str.w r1, [r4, #936] ; 0x3a8 + 8004f6a: 4642 mov r2, r8 + 8004f6c: f8c4 e3a4 str.w lr, [r4, #932] ; 0x3a4 + 8004f70: 4649 mov r1, r9 + 8004f72: f884 c3b3 strb.w ip, [r4, #947] ; 0x3b3 + 8004f76: f004 fef9 bl 8009d6c + 8004f7a: f8d4 318c ldr.w r3, [r4, #396] ; 0x18c + 8004f7e: 2f0f cmp r7, #15 + 8004f80: f103 0310 add.w r3, r3, #16 + 8004f84: b2db uxtb r3, r3 + 8004f86: f8c4 318c str.w r3, [r4, #396] ; 0x18c + 8004f8a: d807 bhi.n 8004f9c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x368> + 8004f8c: eb09 0108 add.w r1, r9, r8 + 8004f90: f1c8 0210 rsb r2, r8, #16 + 8004f94: f104 008c add.w r0, r4, #140 ; 0x8c + 8004f98: f004 fee8 bl 8009d6c + 8004f9c: 6860 ldr r0, [r4, #4] + 8004f9e: 6f43 ldr r3, [r0, #116] ; 0x74 + 8004fa0: 2b20 cmp r3, #32 + 8004fa2: d047 beq.n 8005034 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x400> + 8004fa4: f001 f8d6 bl 8006154 + 8004fa8: f8c4 0194 str.w r0, [r4, #404] ; 0x194 + 8004fac: 2000 movs r0, #0 + 8004fae: f8c4 5684 str.w r5, [r4, #1668] ; 0x684 + 8004fb2: b009 add sp, #36 ; 0x24 + 8004fb4: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} + 8004fb8: aa05 add r2, sp, #20 + 8004fba: 210a movs r1, #10 + 8004fbc: 4620 mov r0, r4 + 8004fbe: 47b0 blx r6 + 8004fc0: e72b b.n 8004e1a <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x1e6> + 8004fc2: f001 f8c7 bl 8006154 + 8004fc6: f8d4 6194 ldr.w r6, [r4, #404] ; 0x194 + 8004fca: f8d4 31a4 ldr.w r3, [r4, #420] ; 0x1a4 + 8004fce: 1b86 subs r6, r0, r6 + 8004fd0: f8d4 71a8 ldr.w r7, [r4, #424] ; 0x1a8 + 8004fd4: f103 38ff add.w r8, r3, #4294967295 ; 0xffffffff + 8004fd8: f001 f8bc bl 8006154 + 8004fdc: f107 576e add.w r7, r7, #998244352 ; 0x3b800000 + 8004fe0: 4601 mov r1, r0 + 8004fe2: fbab 2306 umull r2, r3, fp, r6 + 8004fe6: f44f 727a mov.w r2, #1000 ; 0x3e8 + 8004fea: fbab ec01 umull lr, ip, fp, r1 + 8004fee: f507 17d6 add.w r7, r7, #1753088 ; 0x1ac000 + 8004ff2: 099b lsrs r3, r3, #6 + 8004ff4: f504 70cc add.w r0, r4, #408 ; 0x198 + 8004ff8: ea4f 1c9c mov.w ip, ip, lsr #6 + 8004ffc: f507 6720 add.w r7, r7, #2560 ; 0xa00 + 8005000: fb02 6613 mls r6, r2, r3, r6 + 8005004: 4443 add r3, r8 + 8005006: fb02 121c mls r2, r2, ip, r1 + 800500a: f504 71ce add.w r1, r4, #412 ; 0x19c + 800500e: fb0a 7606 mla r6, sl, r6, r7 + 8005012: eba3 030c sub.w r3, r3, ip + 8005016: fb0a 6212 mls r2, sl, r2, r6 + 800501a: f8c4 3198 str.w r3, [r4, #408] ; 0x198 + 800501e: f8c4 219c str.w r2, [r4, #412] ; 0x19c + 8005022: f001 f81d bl 8006060 <_ZN3ros16normalizeSecNSecERmS0_> + 8005026: f001 f895 bl 8006154 + 800502a: f8d4 11a0 ldr.w r1, [r4, #416] ; 0x1a0 + 800502e: f8c4 0688 str.w r0, [r4, #1672] ; 0x688 + 8005032: e620 b.n 8004c76 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x42> + 8005034: f8df 806c ldr.w r8, [pc, #108] ; 80050a4 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x470> + 8005038: f898 3000 ldrb.w r3, [r8] + 800503c: 2b00 cmp r3, #0 + 800503e: d1b1 bne.n 8004fa4 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x370> + 8005040: f8d4 118c ldr.w r1, [r4, #396] ; 0x18c + 8005044: 2301 movs r3, #1 + 8005046: f8d4 2190 ldr.w r2, [r4, #400] ; 0x190 + 800504a: f888 3000 strb.w r3, [r8] + 800504e: 4291 cmp r1, r2 + 8005050: d011 beq.n 8005076 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x442> + 8005052: b293 uxth r3, r2 + 8005054: bf8c ite hi + 8005056: 1acb subhi r3, r1, r3 + 8005058: f5c3 7380 rsbls r3, r3, #256 ; 0x100 + 800505c: f102 0188 add.w r1, r2, #136 ; 0x88 + 8005060: b29f uxth r7, r3 + 8005062: 4431 add r1, r6 + 8005064: 463a mov r2, r7 + 8005066: f002 fea3 bl 8007db0 + 800506a: f8d4 3190 ldr.w r3, [r4, #400] ; 0x190 + 800506e: 443b add r3, r7 + 8005070: b2db uxtb r3, r3 + 8005072: f8c4 3190 str.w r3, [r4, #400] ; 0x190 + 8005076: 2300 movs r3, #0 + 8005078: f888 3000 strb.w r3, [r8] + 800507c: e792 b.n 8004fa4 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x370> + 800507e: aa05 add r2, sp, #20 + 8005080: 210a movs r1, #10 + 8005082: 4620 mov r0, r4 + 8005084: 47b0 blx r6 + 8005086: e78d b.n 8004fa4 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x370> + 8005088: f5c8 7880 rsb r8, r8, #256 ; 0x100 + 800508c: fa1f f888 uxth.w r8, r8 + 8005090: e736 b.n 8004f00 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x2cc> + 8005092: f884 0680 strb.w r0, [r4, #1664] ; 0x680 + 8005096: e5ee b.n 8004c76 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x42> + 8005098: 08009fe0 .word 0x08009fe0 + 800509c: 080032d9 .word 0x080032d9 + 80050a0: 0008feff .word 0x0008feff + 80050a4: 2000009c .word 0x2000009c + 80050a8: 10624dd3 .word 0x10624dd3 + 80050ac: 000f4240 .word 0x000f4240 + 80050b0: f8d4 71a4 ldr.w r7, [r4, #420] ; 0x1a4 + 80050b4: f504 78d2 add.w r8, r4, #420 ; 0x1a4 + 80050b8: f8d4 3698 ldr.w r3, [r4, #1688] ; 0x698 + 80050bc: 429f cmp r7, r3 + 80050be: d906 bls.n 80050ce <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x49a> + 80050c0: 00b9 lsls r1, r7, #2 + 80050c2: f8d4 06a0 ldr.w r0, [r4, #1696] ; 0x6a0 + 80050c6: f004 fe7d bl 8009dc4 + 80050ca: f8c4 06a0 str.w r0, [r4, #1696] ; 0x6a0 + 80050ce: f8c4 7698 str.w r7, [r4, #1688] ; 0x698 + 80050d2: 2f00 cmp r7, #0 + 80050d4: f000 80db beq.w 800528e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x65a> + 80050d8: 4640 mov r0, r8 + 80050da: f04f 0e04 mov.w lr, #4 + 80050de: 2600 movs r6, #0 + 80050e0: 7983 ldrb r3, [r0, #6] + 80050e2: f10e 0c04 add.w ip, lr, #4 + 80050e6: 7941 ldrb r1, [r0, #5] + 80050e8: 4677 mov r7, lr + 80050ea: 041b lsls r3, r3, #16 + 80050ec: 7902 ldrb r2, [r0, #4] + 80050ee: 46e6 mov lr, ip + 80050f0: 3004 adds r0, #4 + 80050f2: ea43 2301 orr.w r3, r3, r1, lsl #8 + 80050f6: 78c1 ldrb r1, [r0, #3] + 80050f8: 4313 orrs r3, r2 + 80050fa: f8d4 26a0 ldr.w r2, [r4, #1696] ; 0x6a0 + 80050fe: ea43 6301 orr.w r3, r3, r1, lsl #24 + 8005102: f8c4 369c str.w r3, [r4, #1692] ; 0x69c + 8005106: f842 3026 str.w r3, [r2, r6, lsl #2] + 800510a: 3601 adds r6, #1 + 800510c: f8d4 3698 ldr.w r3, [r4, #1688] ; 0x698 + 8005110: 42b3 cmp r3, r6 + 8005112: d8e5 bhi.n 80050e0 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4ac> + 8005114: f107 0209 add.w r2, r7, #9 + 8005118: f107 0308 add.w r3, r7, #8 + 800511c: f107 010b add.w r1, r7, #11 + 8005120: 1d78 adds r0, r7, #5 + 8005122: f107 0e06 add.w lr, r7, #6 + 8005126: f107 0907 add.w r9, r7, #7 + 800512a: 9200 str r2, [sp, #0] + 800512c: 461e mov r6, r3 + 800512e: f107 020a add.w r2, r7, #10 + 8005132: 370c adds r7, #12 + 8005134: 9101 str r1, [sp, #4] + 8005136: f818 100e ldrb.w r1, [r8, lr] + 800513a: f818 0000 ldrb.w r0, [r8, r0] + 800513e: 0409 lsls r1, r1, #16 + 8005140: f818 e00c ldrb.w lr, [r8, ip] + 8005144: f818 c009 ldrb.w ip, [r8, r9] + 8005148: ea41 2100 orr.w r1, r1, r0, lsl #8 + 800514c: f8d4 06a4 ldr.w r0, [r4, #1700] ; 0x6a4 + 8005150: ea41 0e0e orr.w lr, r1, lr + 8005154: ea4e 690c orr.w r9, lr, ip, lsl #24 + 8005158: 4581 cmp r9, r0 + 800515a: d90b bls.n 8005174 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x540> + 800515c: ea4f 0189 mov.w r1, r9, lsl #2 + 8005160: f8d4 06ac ldr.w r0, [r4, #1708] ; 0x6ac + 8005164: e9cd 3202 strd r3, r2, [sp, #8] + 8005168: f004 fe2c bl 8009dc4 + 800516c: f8c4 06ac str.w r0, [r4, #1708] ; 0x6ac + 8005170: e9dd 3202 ldrd r3, r2, [sp, #8] + 8005174: f8c4 96a4 str.w r9, [r4, #1700] ; 0x6a4 + 8005178: f1b9 0f00 cmp.w r9, #0 + 800517c: d026 beq.n 80051cc <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x598> + 800517e: eb08 0106 add.w r1, r8, r6 + 8005182: 2000 movs r0, #0 + 8005184: f204 6c94 addw ip, r4, #1684 ; 0x694 + 8005188: 788a ldrb r2, [r1, #2] + 800518a: 1d33 adds r3, r6, #4 + 800518c: f891 9001 ldrb.w r9, [r1, #1] + 8005190: 4637 mov r7, r6 + 8005192: 0412 lsls r2, r2, #16 + 8005194: f891 e000 ldrb.w lr, [r1] + 8005198: 78ce ldrb r6, [r1, #3] + 800519a: 3104 adds r1, #4 + 800519c: ea42 2209 orr.w r2, r2, r9, lsl #8 + 80051a0: ea42 020e orr.w r2, r2, lr + 80051a4: f8d4 e6ac ldr.w lr, [r4, #1708] ; 0x6ac + 80051a8: ea42 6206 orr.w r2, r2, r6, lsl #24 + 80051ac: 461e mov r6, r3 + 80051ae: f8cc 2014 str.w r2, [ip, #20] + 80051b2: f84e 2020 str.w r2, [lr, r0, lsl #2] + 80051b6: 3001 adds r0, #1 + 80051b8: f8d4 26a4 ldr.w r2, [r4, #1700] ; 0x6a4 + 80051bc: 4282 cmp r2, r0 + 80051be: d8e3 bhi.n 8005188 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x554> + 80051c0: 1d7a adds r2, r7, #5 + 80051c2: 1df9 adds r1, r7, #7 + 80051c4: 9200 str r2, [sp, #0] + 80051c6: 1dba adds r2, r7, #6 + 80051c8: 3708 adds r7, #8 + 80051ca: 9101 str r1, [sp, #4] + 80051cc: f818 6002 ldrb.w r6, [r8, r2] + 80051d0: 9a00 ldr r2, [sp, #0] + 80051d2: 0436 lsls r6, r6, #16 + 80051d4: f818 1003 ldrb.w r1, [r8, r3] + 80051d8: f818 0002 ldrb.w r0, [r8, r2] + 80051dc: 9b01 ldr r3, [sp, #4] + 80051de: ea46 2600 orr.w r6, r6, r0, lsl #8 + 80051e2: f818 2003 ldrb.w r2, [r8, r3] + 80051e6: 430e orrs r6, r1 + 80051e8: f8d4 36b0 ldr.w r3, [r4, #1712] ; 0x6b0 + 80051ec: ea46 6602 orr.w r6, r6, r2, lsl #24 + 80051f0: 429e cmp r6, r3 + 80051f2: d906 bls.n 8005202 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x5ce> + 80051f4: 00b1 lsls r1, r6, #2 + 80051f6: f8d4 06b8 ldr.w r0, [r4, #1720] ; 0x6b8 + 80051fa: f004 fde3 bl 8009dc4 + 80051fe: f8c4 06b8 str.w r0, [r4, #1720] ; 0x6b8 + 8005202: f8c4 66b0 str.w r6, [r4, #1712] ; 0x6b0 + 8005206: 2e00 cmp r6, #0 + 8005208: d03b beq.n 8005282 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x64e> + 800520a: f04f 0900 mov.w r9, #0 + 800520e: 9500 str r5, [sp, #0] + 8005210: eb08 0507 add.w r5, r8, r7 + 8005214: f818 e007 ldrb.w lr, [r8, r7] + 8005218: f06f 0c03 mvn.w ip, #3 + 800521c: f507 71d4 add.w r1, r7, #424 ; 0x1a8 + 8005220: 78ab ldrb r3, [r5, #2] + 8005222: f207 10a7 addw r0, r7, #423 ; 0x1a7 + 8005226: 786e ldrb r6, [r5, #1] + 8005228: ebac 0c07 sub.w ip, ip, r7 + 800522c: 041b lsls r3, r3, #16 + 800522e: 78ed ldrb r5, [r5, #3] + 8005230: 1d7a adds r2, r7, #5 + 8005232: 4421 add r1, r4 + 8005234: ea43 2306 orr.w r3, r3, r6, lsl #8 + 8005238: 1d3e adds r6, r7, #4 + 800523a: 4420 add r0, r4 + 800523c: ea43 030e orr.w r3, r3, lr + 8005240: ea43 6505 orr.w r5, r3, r5, lsl #24 + 8005244: 4435 add r5, r6 + 8005246: 42b5 cmp r5, r6 + 8005248: 44ac add ip, r5 + 800524a: 462f mov r7, r5 + 800524c: d905 bls.n 800525a <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x626> + 800524e: 4295 cmp r5, r2 + 8005250: bf2c ite cs + 8005252: 4662 movcs r2, ip + 8005254: 2201 movcc r2, #1 + 8005256: f004 fd94 bl 8009d82 + 800525a: f04f 0200 mov.w r2, #0 + 800525e: 4445 add r5, r8 + 8005260: 1e73 subs r3, r6, #1 + 8005262: f805 2c01 strb.w r2, [r5, #-1] + 8005266: 4443 add r3, r8 + 8005268: f8d4 26b8 ldr.w r2, [r4, #1720] ; 0x6b8 + 800526c: f8c4 36b4 str.w r3, [r4, #1716] ; 0x6b4 + 8005270: f842 3029 str.w r3, [r2, r9, lsl #2] + 8005274: f109 0901 add.w r9, r9, #1 + 8005278: f8d4 36b0 ldr.w r3, [r4, #1712] ; 0x6b0 + 800527c: 454b cmp r3, r9 + 800527e: d8c7 bhi.n 8005210 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x5dc> + 8005280: 9d00 ldr r5, [sp, #0] + 8005282: 2301 movs r3, #1 + 8005284: f8d4 11a0 ldr.w r1, [r4, #416] ; 0x1a0 + 8005288: f884 3690 strb.w r3, [r4, #1680] ; 0x690 + 800528c: e4f3 b.n 8004c76 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x42> + 800528e: 230b movs r3, #11 + 8005290: 270c movs r7, #12 + 8005292: 220a movs r2, #10 + 8005294: f04f 0907 mov.w r9, #7 + 8005298: 9301 str r3, [sp, #4] + 800529a: 2309 movs r3, #9 + 800529c: f04f 0e06 mov.w lr, #6 + 80052a0: 2005 movs r0, #5 + 80052a2: 9300 str r3, [sp, #0] + 80052a4: f04f 0c04 mov.w ip, #4 + 80052a8: 2308 movs r3, #8 + 80052aa: e744 b.n 8005136 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x502> + 80052ac: 4620 mov r0, r4 + 80052ae: f7ff f8bd bl 800442c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15requestSyncTimeEv> + 80052b2: 4620 mov r0, r4 + 80052b4: f7ff f944 bl 8004540 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv> + 80052b8: f8c4 5684 str.w r5, [r4, #1668] ; 0x684 + 80052bc: f8c4 5688 str.w r5, [r4, #1672] ; 0x688 + 80052c0: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff + 80052c4: e509 b.n 8004cda <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0xa6> + 80052c6: bf00 nop + +080052c8 : + 80052c8: 6802 ldr r2, [r0, #0] + 80052ca: 4bc8 ldr r3, [pc, #800] ; (80055ec ) + 80052cc: 429a cmp r2, r3 + 80052ce: d000 beq.n 80052d2 + 80052d0: 4770 bx lr + 80052d2: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} + 80052d6: 48c6 ldr r0, [pc, #792] ; (80055f0 ) + 80052d8: b085 sub sp, #20 + 80052da: f7fb f957 bl 800058c <_ZN7Encoder17GetLinearVelocityEv> + 80052de: 4bc5 ldr r3, [pc, #788] ; (80055f4 ) + 80052e0: 48c5 ldr r0, [pc, #788] ; (80055f8 ) + 80052e2: ed83 0a00 vstr s0, [r3] + 80052e6: f7fb f951 bl 800058c <_ZN7Encoder17GetLinearVelocityEv> + 80052ea: 4bc4 ldr r3, [pc, #784] ; (80055fc ) + 80052ec: 4dc4 ldr r5, [pc, #784] ; (8005600 ) + 80052ee: 68dc ldr r4, [r3, #12] + 80052f0: 49c4 ldr r1, [pc, #784] ; (8005604 ) + 80052f2: 6822 ldr r2, [r4, #0] + 80052f4: f8d3 8008 ldr.w r8, [r3, #8] + 80052f8: 6816 ldr r6, [r2, #0] + 80052fa: ed81 0a00 vstr s0, [r1] + 80052fe: 42ae cmp r6, r5 + 8005300: f040 8232 bne.w 8005768 + 8005304: f1b8 0f63 cmp.w r8, #99 ; 0x63 + 8005308: dd03 ble.n 8005312 + 800530a: f894 3680 ldrb.w r3, [r4, #1664] ; 0x680 + 800530e: 2b00 cmp r3, #0 + 8005310: d071 beq.n 80053f6 + 8005312: 4bbd ldr r3, [pc, #756] ; (8005608 ) + 8005314: 685e ldr r6, [r3, #4] + 8005316: 4630 mov r0, r6 + 8005318: f7fa ff8e bl 8000238 + 800531c: 2300 movs r3, #0 + 800531e: 4631 mov r1, r6 + 8005320: 0a06 lsrs r6, r0, #8 + 8005322: f360 0307 bfi r3, r0, #0, #8 + 8005326: 4607 mov r7, r0 + 8005328: 4602 mov r2, r0 + 800532a: 0c00 lsrs r0, r0, #16 + 800532c: f366 230f bfi r3, r6, #8, #8 + 8005330: 0e3e lsrs r6, r7, #24 + 8005332: f360 4317 bfi r3, r0, #16, #8 + 8005336: f204 30af addw r0, r4, #943 ; 0x3af + 800533a: f366 631f bfi r3, r6, #24, #8 + 800533e: 1d3e adds r6, r7, #4 + 8005340: f8c4 33ab str.w r3, [r4, #939] ; 0x3ab + 8005344: f004 fd12 bl 8009d6c + 8005348: f3c6 2207 ubfx r2, r6, #8, #8 + 800534c: b2f1 uxtb r1, r6 + 800534e: f348 2c07 sbfx ip, r8, #8, #8 + 8005352: f64f 60ff movw r0, #65279 ; 0xfeff + 8005356: f884 83a9 strb.w r8, [r4, #937] ; 0x3a9 + 800535a: 188b adds r3, r1, r2 + 800535c: f884 c3aa strb.w ip, [r4, #938] ; 0x3aa + 8005360: f884 13a6 strb.w r1, [r4, #934] ; 0x3a6 + 8005364: 43db mvns r3, r3 + 8005366: f884 23a7 strb.w r2, [r4, #935] ; 0x3a7 + 800536a: f8a4 03a4 strh.w r0, [r4, #932] ; 0x3a4 + 800536e: f884 33a8 strb.w r3, [r4, #936] ; 0x3a8 + 8005372: 1c73 adds r3, r6, #1 + 8005374: f2c0 821f blt.w 80057b6 + 8005378: f204 30ae addw r0, r4, #942 ; 0x3ae + 800537c: f504 736a add.w r3, r4, #936 ; 0x3a8 + 8005380: 2200 movs r2, #0 + 8005382: 4438 add r0, r7 + 8005384: f813 1f01 ldrb.w r1, [r3, #1]! + 8005388: 4283 cmp r3, r0 + 800538a: 440a add r2, r1 + 800538c: d1fa bne.n 8005384 + 800538e: 43d2 mvns r2, r2 + 8005390: b2d2 uxtb r2, r2 + 8005392: 19a3 adds r3, r4, r6 + 8005394: 3608 adds r6, #8 + 8005396: f5b6 7f00 cmp.w r6, #512 ; 0x200 + 800539a: f883 23ab strb.w r2, [r3, #939] ; 0x3ab + 800539e: f300 8233 bgt.w 8005808 + 80053a2: f8d4 018c ldr.w r0, [r4, #396] ; 0x18c + 80053a6: f5b6 7f80 cmp.w r6, #256 ; 0x100 + 80053aa: f104 0704 add.w r7, r4, #4 + 80053ae: f504 7869 add.w r8, r4, #932 ; 0x3a4 + 80053b2: f5c0 7580 rsb r5, r0, #256 ; 0x100 + 80053b6: bfa8 it ge + 80053b8: f44f 7680 movge.w r6, #256 ; 0x100 + 80053bc: 3088 adds r0, #136 ; 0x88 + 80053be: 4641 mov r1, r8 + 80053c0: 42b5 cmp r5, r6 + 80053c2: 4438 add r0, r7 + 80053c4: bf28 it cs + 80053c6: 4635 movcs r5, r6 + 80053c8: 462a mov r2, r5 + 80053ca: f004 fccf bl 8009d6c + 80053ce: f8d4 318c ldr.w r3, [r4, #396] ; 0x18c + 80053d2: 42ae cmp r6, r5 + 80053d4: 4433 add r3, r6 + 80053d6: b2db uxtb r3, r3 + 80053d8: f8c4 318c str.w r3, [r4, #396] ; 0x18c + 80053dc: d006 beq.n 80053ec + 80053de: 1b72 subs r2, r6, r5 + 80053e0: eb08 0105 add.w r1, r8, r5 + 80053e4: f104 008c add.w r0, r4, #140 ; 0x8c + 80053e8: f004 fcc0 bl 8009d6c + 80053ec: 6860 ldr r0, [r4, #4] + 80053ee: 6f43 ldr r3, [r0, #116] ; 0x74 + 80053f0: 2b20 cmp r3, #32 + 80053f2: f000 8197 beq.w 8005724 + 80053f6: 4c85 ldr r4, [pc, #532] ; (800560c ) + 80053f8: f000 feac bl 8006154 + 80053fc: f642 22f8 movw r2, #11000 ; 0x2af8 + 8005400: 4605 mov r5, r0 + 8005402: f8d4 3688 ldr.w r3, [r4, #1672] ; 0x688 + 8005406: 1ac3 subs r3, r0, r3 + 8005408: 4293 cmp r3, r2 + 800540a: d902 bls.n 8005412 + 800540c: 2300 movs r3, #0 + 800540e: f884 3680 strb.w r3, [r4, #1664] ; 0x680 + 8005412: f8d4 366c ldr.w r3, [r4, #1644] ; 0x66c + 8005416: b123 cbz r3, 8005422 + 8005418: f8d4 368c ldr.w r3, [r4, #1676] ; 0x68c + 800541c: 429d cmp r5, r3 + 800541e: f200 8165 bhi.w 80056ec + 8005422: 4e7b ldr r6, [pc, #492] ; (8005610 ) + 8005424: f8df b1f4 ldr.w fp, [pc, #500] ; 800561c + 8005428: f1a6 0a0c sub.w sl, r6, #12 + 800542c: f8d4 31a0 ldr.w r3, [r4, #416] ; 0x1a0 + 8005430: bb4b cbnz r3, 8005486 + 8005432: 6862 ldr r2, [r4, #4] + 8005434: f8d4 3088 ldr.w r3, [r4, #136] ; 0x88 + 8005438: 6ed2 ldr r2, [r2, #108] ; 0x6c + 800543a: 6812 ldr r2, [r2, #0] + 800543c: 6852 ldr r2, [r2, #4] + 800543e: 4252 negs r2, r2 + 8005440: f002 027f and.w r2, r2, #127 ; 0x7f + 8005444: 4293 cmp r3, r2 + 8005446: f000 80eb beq.w 8005620 + 800544a: 18e1 adds r1, r4, r3 + 800544c: f8d4 267c ldr.w r2, [r4, #1660] ; 0x67c + 8005450: 3301 adds r3, #1 + 8005452: f8d4 766c ldr.w r7, [r4, #1644] ; 0x66c + 8005456: 7a09 ldrb r1, [r1, #8] + 8005458: f003 037f and.w r3, r3, #127 ; 0x7f + 800545c: 2f07 cmp r7, #7 + 800545e: 440a add r2, r1 + 8005460: f8c4 3088 str.w r3, [r4, #136] ; 0x88 + 8005464: f8c4 267c str.w r2, [r4, #1660] ; 0x67c + 8005468: d017 beq.n 800549a + 800546a: bb4f cbnz r7, 80054c0 + 800546c: 29ff cmp r1, #255 ; 0xff + 800546e: d15d bne.n 800552c + 8005470: f105 0314 add.w r3, r5, #20 + 8005474: 2201 movs r2, #1 + 8005476: f8c4 368c str.w r3, [r4, #1676] ; 0x68c + 800547a: f8d4 31a0 ldr.w r3, [r4, #416] ; 0x1a0 + 800547e: f8c4 266c str.w r2, [r4, #1644] ; 0x66c + 8005482: 2b00 cmp r3, #0 + 8005484: d0d5 beq.n 8005432 + 8005486: f000 fe65 bl 8006154 + 800548a: f8d4 31a0 ldr.w r3, [r4, #416] ; 0x1a0 + 800548e: 1b40 subs r0, r0, r5 + 8005490: 4298 cmp r0, r3 + 8005492: d9ce bls.n 8005432 + 8005494: b005 add sp, #20 + 8005496: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} + 800549a: f8d4 2678 ldr.w r2, [r4, #1656] ; 0x678 + 800549e: f8d4 3670 ldr.w r3, [r4, #1648] ; 0x670 + 80054a2: 1c50 adds r0, r2, #1 + 80054a4: 4422 add r2, r4 + 80054a6: 3b01 subs r3, #1 + 80054a8: f8c4 0678 str.w r0, [r4, #1656] ; 0x678 + 80054ac: f882 11a4 strb.w r1, [r2, #420] ; 0x1a4 + 80054b0: f8c4 3670 str.w r3, [r4, #1648] ; 0x670 + 80054b4: 2b00 cmp r3, #0 + 80054b6: d1b9 bne.n 800542c + 80054b8: 2308 movs r3, #8 + 80054ba: f8c4 366c str.w r3, [r4, #1644] ; 0x66c + 80054be: e7b5 b.n 800542c + 80054c0: 2f01 cmp r7, #1 + 80054c2: d03e beq.n 8005542 + 80054c4: 2f02 cmp r7, #2 + 80054c6: d07b beq.n 80055c0 + 80054c8: 2f03 cmp r7, #3 + 80054ca: f000 8084 beq.w 80055d6 + 80054ce: 2f04 cmp r7, #4 + 80054d0: f000 80f8 beq.w 80056c4 + 80054d4: 2f05 cmp r7, #5 + 80054d6: f000 8101 beq.w 80056dc + 80054da: 2f06 cmp r7, #6 + 80054dc: f000 8113 beq.w 8005706 + 80054e0: 2f08 cmp r7, #8 + 80054e2: d1a3 bne.n 800542c + 80054e4: 4253 negs r3, r2 + 80054e6: b2d2 uxtb r2, r2 + 80054e8: f04f 0100 mov.w r1, #0 + 80054ec: b2db uxtb r3, r3 + 80054ee: f8c4 166c str.w r1, [r4, #1644] ; 0x66c + 80054f2: bf58 it pl + 80054f4: 425a negpl r2, r3 + 80054f6: 2aff cmp r2, #255 ; 0xff + 80054f8: d198 bne.n 800542c + 80054fa: f8d4 3674 ldr.w r3, [r4, #1652] ; 0x674 + 80054fe: 2b00 cmp r3, #0 + 8005500: f000 822e beq.w 8005960 + 8005504: 2b0a cmp r3, #10 + 8005506: f000 81eb beq.w 80058e0 + 800550a: 2b06 cmp r3, #6 + 800550c: f000 821b beq.w 8005946 + 8005510: 2b0b cmp r3, #11 + 8005512: f000 81e2 beq.w 80058da + 8005516: f503 738f add.w r3, r3, #286 ; 0x11e + 800551a: f854 0023 ldr.w r0, [r4, r3, lsl #2] + 800551e: 2800 cmp r0, #0 + 8005520: d084 beq.n 800542c + 8005522: 6803 ldr r3, [r0, #0] + 8005524: 4631 mov r1, r6 + 8005526: 681b ldr r3, [r3, #0] + 8005528: 4798 blx r3 + 800552a: e77f b.n 800542c + 800552c: f000 fe12 bl 8006154 + 8005530: f241 3388 movw r3, #5000 ; 0x1388 + 8005534: 1b40 subs r0, r0, r5 + 8005536: 4298 cmp r0, r3 + 8005538: f67f af78 bls.w 800542c + 800553c: f884 7680 strb.w r7, [r4, #1664] ; 0x680 + 8005540: e7a8 b.n 8005494 + 8005542: 29fe cmp r1, #254 ; 0xfe + 8005544: f000 80ba beq.w 80056bc + 8005548: 2200 movs r2, #0 + 800554a: f894 3680 ldrb.w r3, [r4, #1664] ; 0x680 + 800554e: f8c4 266c str.w r2, [r4, #1644] ; 0x66c + 8005552: 2b00 cmp r3, #0 + 8005554: f47f af6a bne.w 800542c + 8005558: f8d4 018c ldr.w r0, [r4, #396] ; 0x18c + 800555c: f640 2cf7 movw ip, #2807 ; 0xaf7 + 8005560: f8df e0b0 ldr.w lr, [pc, #176] ; 8005614 + 8005564: f5c0 7780 rsb r7, r0, #256 ; 0x100 + 8005568: f8c4 33ac str.w r3, [r4, #940] ; 0x3ac + 800556c: f8df 80a8 ldr.w r8, [pc, #168] ; 8005618 + 8005570: f04f 4375 mov.w r3, #4110417920 ; 0xf5000000 + 8005574: 2f10 cmp r7, #16 + 8005576: 46b9 mov r9, r7 + 8005578: f100 008c add.w r0, r0, #140 ; 0x8c + 800557c: f8c4 33b0 str.w r3, [r4, #944] ; 0x3b0 + 8005580: bf28 it cs + 8005582: f04f 0910 movcs.w r9, #16 + 8005586: 4641 mov r1, r8 + 8005588: 4420 add r0, r4 + 800558a: f8c4 e3a4 str.w lr, [r4, #932] ; 0x3a4 + 800558e: 464a mov r2, r9 + 8005590: f8c4 c3a8 str.w ip, [r4, #936] ; 0x3a8 + 8005594: f004 fbea bl 8009d6c + 8005598: f8d4 318c ldr.w r3, [r4, #396] ; 0x18c + 800559c: 2f0f cmp r7, #15 + 800559e: f103 0310 add.w r3, r3, #16 + 80055a2: b2db uxtb r3, r3 + 80055a4: f8c4 318c str.w r3, [r4, #396] ; 0x18c + 80055a8: f240 80a4 bls.w 80056f4 + 80055ac: 6860 ldr r0, [r4, #4] + 80055ae: 6f43 ldr r3, [r0, #116] ; 0x74 + 80055b0: 2b20 cmp r3, #32 + 80055b2: f000 80de beq.w 8005772 + 80055b6: f000 fdcd bl 8006154 + 80055ba: f8c4 0194 str.w r0, [r4, #404] ; 0x194 + 80055be: e735 b.n 800542c + 80055c0: 2200 movs r2, #0 + 80055c2: 2303 movs r3, #3 + 80055c4: f8c4 1670 str.w r1, [r4, #1648] ; 0x670 + 80055c8: f8c4 167c str.w r1, [r4, #1660] ; 0x67c + 80055cc: f8c4 2678 str.w r2, [r4, #1656] ; 0x678 + 80055d0: f8c4 366c str.w r3, [r4, #1644] ; 0x66c + 80055d4: e72a b.n 800542c + 80055d6: f8d4 3670 ldr.w r3, [r4, #1648] ; 0x670 + 80055da: 2204 movs r2, #4 + 80055dc: eb03 2101 add.w r1, r3, r1, lsl #8 + 80055e0: f8c4 266c str.w r2, [r4, #1644] ; 0x66c + 80055e4: f8c4 1670 str.w r1, [r4, #1648] ; 0x670 + 80055e8: e720 b.n 800542c + 80055ea: bf00 nop + 80055ec: 40000400 .word 0x40000400 + 80055f0: 20000434 .word 0x20000434 + 80055f4: 20000ea4 .word 0x20000ea4 + 80055f8: 20000e80 .word 0x20000e80 + 80055fc: 200000a0 .word 0x200000a0 + 8005600: 080032d9 .word 0x080032d9 + 8005604: 20000ea8 .word 0x20000ea8 + 8005608: 20000e9c .word 0x20000e9c + 800560c: 20000450 .word 0x20000450 + 8005610: 200005f4 .word 0x200005f4 + 8005614: 0008feff .word 0x0008feff + 8005618: 200007f4 .word 0x200007f4 + 800561c: 10624dd3 .word 0x10624dd3 + 8005620: f894 3680 ldrb.w r3, [r4, #1664] ; 0x680 + 8005624: 2b00 cmp r3, #0 + 8005626: f43f af35 beq.w 8005494 + 800562a: f8d4 3684 ldr.w r3, [r4, #1668] ; 0x684 + 800562e: f640 12c4 movw r2, #2500 ; 0x9c4 + 8005632: 1aeb subs r3, r5, r3 + 8005634: 4293 cmp r3, r2 + 8005636: f67f af2d bls.w 8005494 + 800563a: f8d4 318c ldr.w r3, [r4, #396] ; 0x18c + 800563e: f640 2cf7 movw ip, #2807 ; 0xaf7 + 8005642: 4acd ldr r2, [pc, #820] ; (8005978 ) + 8005644: f5c3 7680 rsb r6, r3, #256 ; 0x100 + 8005648: 338c adds r3, #140 ; 0x8c + 800564a: 4fcc ldr r7, [pc, #816] ; (800597c ) + 800564c: 2e10 cmp r6, #16 + 800564e: 46b0 mov r8, r6 + 8005650: eb04 0003 add.w r0, r4, r3 + 8005654: f04f 0300 mov.w r3, #0 + 8005658: bf28 it cs + 800565a: f04f 0810 movcs.w r8, #16 + 800565e: f8c4 c3a8 str.w ip, [r4, #936] ; 0x3a8 + 8005662: f06f 0c0a mvn.w ip, #10 + 8005666: f8c4 23a4 str.w r2, [r4, #932] ; 0x3a4 + 800566a: f8c4 33ac str.w r3, [r4, #940] ; 0x3ac + 800566e: 4639 mov r1, r7 + 8005670: f8a4 33b0 strh.w r3, [r4, #944] ; 0x3b0 + 8005674: 4642 mov r2, r8 + 8005676: f884 33b2 strb.w r3, [r4, #946] ; 0x3b2 + 800567a: f884 c3b3 strb.w ip, [r4, #947] ; 0x3b3 + 800567e: f004 fb75 bl 8009d6c + 8005682: f8d4 318c ldr.w r3, [r4, #396] ; 0x18c + 8005686: 2e0f cmp r6, #15 + 8005688: f103 0310 add.w r3, r3, #16 + 800568c: b2db uxtb r3, r3 + 800568e: f8c4 318c str.w r3, [r4, #396] ; 0x18c + 8005692: d807 bhi.n 80056a4 + 8005694: f1c8 0210 rsb r2, r8, #16 + 8005698: eb07 0108 add.w r1, r7, r8 + 800569c: f5a7 7046 sub.w r0, r7, #792 ; 0x318 + 80056a0: f004 fb64 bl 8009d6c + 80056a4: 6860 ldr r0, [r4, #4] + 80056a6: 6f43 ldr r3, [r0, #116] ; 0x74 + 80056a8: 2b20 cmp r3, #32 + 80056aa: f000 8086 beq.w 80057ba + 80056ae: f000 fd51 bl 8006154 + 80056b2: f8c4 5684 str.w r5, [r4, #1668] ; 0x684 + 80056b6: f8c4 0194 str.w r0, [r4, #404] ; 0x194 + 80056ba: e6eb b.n 8005494 + 80056bc: 2302 movs r3, #2 + 80056be: f8c4 366c str.w r3, [r4, #1644] ; 0x66c + 80056c2: e6b3 b.n 800542c + 80056c4: 4253 negs r3, r2 + 80056c6: b2d2 uxtb r2, r2 + 80056c8: b2db uxtb r3, r3 + 80056ca: bf58 it pl + 80056cc: 425a negpl r2, r3 + 80056ce: 2aff cmp r2, #255 ; 0xff + 80056d0: bf0c ite eq + 80056d2: 2305 moveq r3, #5 + 80056d4: 2300 movne r3, #0 + 80056d6: f8c4 366c str.w r3, [r4, #1644] ; 0x66c + 80056da: e6a7 b.n 800542c + 80056dc: 2306 movs r3, #6 + 80056de: f8c4 1674 str.w r1, [r4, #1652] ; 0x674 + 80056e2: f8c4 167c str.w r1, [r4, #1660] ; 0x67c + 80056e6: f8c4 366c str.w r3, [r4, #1644] ; 0x66c + 80056ea: e69f b.n 800542c + 80056ec: 2300 movs r3, #0 + 80056ee: f8c4 366c str.w r3, [r4, #1644] ; 0x66c + 80056f2: e696 b.n 8005422 + 80056f4: f1c9 0210 rsb r2, r9, #16 + 80056f8: eb08 0109 add.w r1, r8, r9 + 80056fc: f5a8 7046 sub.w r0, r8, #792 ; 0x318 + 8005700: f004 fb34 bl 8009d6c + 8005704: e752 b.n 80055ac + 8005706: f8d4 3674 ldr.w r3, [r4, #1652] ; 0x674 + 800570a: 2007 movs r0, #7 + 800570c: f8d4 2670 ldr.w r2, [r4, #1648] ; 0x670 + 8005710: eb03 2301 add.w r3, r3, r1, lsl #8 + 8005714: f8c4 066c str.w r0, [r4, #1644] ; 0x66c + 8005718: f8c4 3674 str.w r3, [r4, #1652] ; 0x674 + 800571c: 2a00 cmp r2, #0 + 800571e: f43f aecb beq.w 80054b8 + 8005722: e683 b.n 800542c + 8005724: 4e96 ldr r6, [pc, #600] ; (8005980 ) + 8005726: 7833 ldrb r3, [r6, #0] + 8005728: 2b00 cmp r3, #0 + 800572a: f47f ae64 bne.w 80053f6 + 800572e: f8d4 118c ldr.w r1, [r4, #396] ; 0x18c + 8005732: 2301 movs r3, #1 + 8005734: f8d4 2190 ldr.w r2, [r4, #400] ; 0x190 + 8005738: 7033 strb r3, [r6, #0] + 800573a: 4291 cmp r1, r2 + 800573c: d011 beq.n 8005762 + 800573e: b293 uxth r3, r2 + 8005740: bf8c ite hi + 8005742: 1acb subhi r3, r1, r3 + 8005744: f5c3 7380 rsbls r3, r3, #256 ; 0x100 + 8005748: f102 0188 add.w r1, r2, #136 ; 0x88 + 800574c: b29d uxth r5, r3 + 800574e: 4439 add r1, r7 + 8005750: 462a mov r2, r5 + 8005752: f002 fb2d bl 8007db0 + 8005756: f8d4 3190 ldr.w r3, [r4, #400] ; 0x190 + 800575a: 442b add r3, r5 + 800575c: b2db uxtb r3, r3 + 800575e: f8c4 3190 str.w r3, [r4, #400] ; 0x190 + 8005762: 2300 movs r3, #0 + 8005764: 7033 strb r3, [r6, #0] + 8005766: e646 b.n 80053f6 + 8005768: 4641 mov r1, r8 + 800576a: 4620 mov r0, r4 + 800576c: 4a85 ldr r2, [pc, #532] ; (8005984 ) + 800576e: 47b0 blx r6 + 8005770: e641 b.n 80053f6 + 8005772: 4f83 ldr r7, [pc, #524] ; (8005980 ) + 8005774: 783b ldrb r3, [r7, #0] + 8005776: 2b00 cmp r3, #0 + 8005778: f47f af1d bne.w 80055b6 + 800577c: f8d4 218c ldr.w r2, [r4, #396] ; 0x18c + 8005780: 2101 movs r1, #1 + 8005782: f8d4 3190 ldr.w r3, [r4, #400] ; 0x190 + 8005786: 7039 strb r1, [r7, #0] + 8005788: 429a cmp r2, r3 + 800578a: d011 beq.n 80057b0 + 800578c: fa1f f883 uxth.w r8, r3 + 8005790: d935 bls.n 80057fe + 8005792: eba2 0208 sub.w r2, r2, r8 + 8005796: fa1f f882 uxth.w r8, r2 + 800579a: 338c adds r3, #140 ; 0x8c + 800579c: 4642 mov r2, r8 + 800579e: 18e1 adds r1, r4, r3 + 80057a0: f002 fb06 bl 8007db0 + 80057a4: f8d4 3190 ldr.w r3, [r4, #400] ; 0x190 + 80057a8: 4443 add r3, r8 + 80057aa: b2db uxtb r3, r3 + 80057ac: f8c4 3190 str.w r3, [r4, #400] ; 0x190 + 80057b0: 2300 movs r3, #0 + 80057b2: 703b strb r3, [r7, #0] + 80057b4: e6ff b.n 80055b6 + 80057b6: 22ff movs r2, #255 ; 0xff + 80057b8: e5eb b.n 8005392 + 80057ba: 4e71 ldr r6, [pc, #452] ; (8005980 ) + 80057bc: 7833 ldrb r3, [r6, #0] + 80057be: 2b00 cmp r3, #0 + 80057c0: f47f af75 bne.w 80056ae + 80057c4: f8d4 118c ldr.w r1, [r4, #396] ; 0x18c + 80057c8: 2301 movs r3, #1 + 80057ca: f8d4 2190 ldr.w r2, [r4, #400] ; 0x190 + 80057ce: 7033 strb r3, [r6, #0] + 80057d0: 4291 cmp r1, r2 + 80057d2: d011 beq.n 80057f8 + 80057d4: b293 uxth r3, r2 + 80057d6: bf8c ite hi + 80057d8: 1acb subhi r3, r1, r3 + 80057da: f5c3 7380 rsbls r3, r3, #256 ; 0x100 + 80057de: f102 018c add.w r1, r2, #140 ; 0x8c + 80057e2: b29f uxth r7, r3 + 80057e4: 4421 add r1, r4 + 80057e6: 463a mov r2, r7 + 80057e8: f002 fae2 bl 8007db0 + 80057ec: f8d4 3190 ldr.w r3, [r4, #400] ; 0x190 + 80057f0: 443b add r3, r7 + 80057f2: b2db uxtb r3, r3 + 80057f4: f8c4 3190 str.w r3, [r4, #400] ; 0x190 + 80057f8: 2300 movs r3, #0 + 80057fa: 7033 strb r3, [r6, #0] + 80057fc: e757 b.n 80056ae + 80057fe: f5c8 7880 rsb r8, r8, #256 ; 0x100 + 8005802: fa1f f888 uxth.w r8, r8 + 8005806: e7c8 b.n 800579a + 8005808: 4a5f ldr r2, [pc, #380] ; (8005988 ) + 800580a: 2103 movs r1, #3 + 800580c: 4b5f ldr r3, [pc, #380] ; (800598c ) + 800580e: f88d 1008 strb.w r1, [sp, #8] + 8005812: 9201 str r2, [sp, #4] + 8005814: 9303 str r3, [sp, #12] + 8005816: 6822 ldr r2, [r4, #0] + 8005818: 6816 ldr r6, [r2, #0] + 800581a: 42ae cmp r6, r5 + 800581c: f040 809b bne.w 8005956 + 8005820: 2038 movs r0, #56 ; 0x38 + 8005822: f884 13ab strb.w r1, [r4, #939] ; 0x3ab + 8005826: f504 726c add.w r2, r4, #944 ; 0x3b0 + 800582a: f103 0130 add.w r1, r3, #48 ; 0x30 + 800582e: f8c4 03ac str.w r0, [r4, #940] ; 0x3ac + 8005832: 681f ldr r7, [r3, #0] + 8005834: 3310 adds r3, #16 + 8005836: f853 6c0c ldr.w r6, [r3, #-12] + 800583a: 3210 adds r2, #16 + 800583c: f853 5c08 ldr.w r5, [r3, #-8] + 8005840: f853 0c04 ldr.w r0, [r3, #-4] + 8005844: 428b cmp r3, r1 + 8005846: f842 7c10 str.w r7, [r2, #-16] + 800584a: f842 6c0c str.w r6, [r2, #-12] + 800584e: f842 5c08 str.w r5, [r2, #-8] + 8005852: f842 0c04 str.w r0, [r2, #-4] + 8005856: d1ec bne.n 8005832 + 8005858: 681e ldr r6, [r3, #0] + 800585a: 2100 movs r1, #0 + 800585c: 6858 ldr r0, [r3, #4] + 800585e: f240 75c2 movw r5, #1986 ; 0x7c2 + 8005862: 6016 str r6, [r2, #0] + 8005864: 460b mov r3, r1 + 8005866: 6050 str r0, [r2, #4] + 8005868: f504 726a add.w r2, r4, #936 ; 0x3a8 + 800586c: 4e48 ldr r6, [pc, #288] ; (8005990 ) + 800586e: f204 30e7 addw r0, r4, #999 ; 0x3e7 + 8005872: f884 13aa strb.w r1, [r4, #938] ; 0x3aa + 8005876: f8c4 63a4 str.w r6, [r4, #932] ; 0x3a4 + 800587a: f8a4 53a8 strh.w r5, [r4, #936] ; 0x3a8 + 800587e: f812 1f01 ldrb.w r1, [r2, #1]! + 8005882: 4282 cmp r2, r0 + 8005884: 440b add r3, r1 + 8005886: d1fa bne.n 800587e + 8005888: f8d4 218c ldr.w r2, [r4, #396] ; 0x18c + 800588c: 43db mvns r3, r3 + 800588e: 1d27 adds r7, r4, #4 + 8005890: f504 7569 add.w r5, r4, #932 ; 0x3a4 + 8005894: f5c2 7680 rsb r6, r2, #256 ; 0x100 + 8005898: 3288 adds r2, #136 ; 0x88 + 800589a: f884 33e8 strb.w r3, [r4, #1000] ; 0x3e8 + 800589e: 4629 mov r1, r5 + 80058a0: 2e45 cmp r6, #69 ; 0x45 + 80058a2: 46b0 mov r8, r6 + 80058a4: eb07 0002 add.w r0, r7, r2 + 80058a8: bf28 it cs + 80058aa: f04f 0845 movcs.w r8, #69 ; 0x45 + 80058ae: 4642 mov r2, r8 + 80058b0: f004 fa5c bl 8009d6c + 80058b4: f8d4 318c ldr.w r3, [r4, #396] ; 0x18c + 80058b8: 2e44 cmp r6, #68 ; 0x44 + 80058ba: f103 0345 add.w r3, r3, #69 ; 0x45 + 80058be: b2db uxtb r3, r3 + 80058c0: f8c4 318c str.w r3, [r4, #396] ; 0x18c + 80058c4: f63f ad92 bhi.w 80053ec + 80058c8: eb05 0108 add.w r1, r5, r8 + 80058cc: f1c8 0245 rsb r2, r8, #69 ; 0x45 + 80058d0: f104 008c add.w r0, r4, #140 ; 0x8c + 80058d4: f004 fa4a bl 8009d6c + 80058d8: e588 b.n 80053ec + 80058da: f884 1680 strb.w r1, [r4, #1664] ; 0x680 + 80058de: e5a5 b.n 800542c + 80058e0: f000 fc38 bl 8006154 + 80058e4: f8df 80b8 ldr.w r8, [pc, #184] ; 80059a0 + 80058e8: f8d4 31a8 ldr.w r3, [r4, #424] ; 0x1a8 + 80058ec: f8d4 21a4 ldr.w r2, [r4, #420] ; 0x1a4 + 80058f0: f8d4 7194 ldr.w r7, [r4, #404] ; 0x194 + 80058f4: 4498 add r8, r3 + 80058f6: f102 39ff add.w r9, r2, #4294967295 ; 0xffffffff + 80058fa: 1bc7 subs r7, r0, r7 + 80058fc: f000 fc2a bl 8006154 + 8005900: 4601 mov r1, r0 + 8005902: 4650 mov r0, sl + 8005904: fbab 3207 umull r3, r2, fp, r7 + 8005908: f44f 737a mov.w r3, #1000 ; 0x3e8 + 800590c: fbab ec01 umull lr, ip, fp, r1 + 8005910: 0992 lsrs r2, r2, #6 + 8005912: ea4f 1c9c mov.w ip, ip, lsr #6 + 8005916: fb03 7712 mls r7, r3, r2, r7 + 800591a: 444a add r2, r9 + 800591c: fb03 1e1c mls lr, r3, ip, r1 + 8005920: 4b1c ldr r3, [pc, #112] ; (8005994 ) + 8005922: eba2 020c sub.w r2, r2, ip + 8005926: 1d01 adds r1, r0, #4 + 8005928: fb03 8707 mla r7, r3, r7, r8 + 800592c: f8c4 2198 str.w r2, [r4, #408] ; 0x198 + 8005930: fb03 731e mls r3, r3, lr, r7 + 8005934: f8c4 319c str.w r3, [r4, #412] ; 0x19c + 8005938: f000 fb92 bl 8006060 <_ZN3ros16normalizeSecNSecERmS0_> + 800593c: f000 fc0a bl 8006154 + 8005940: f8c4 0688 str.w r0, [r4, #1672] ; 0x688 + 8005944: e572 b.n 800542c + 8005946: 4631 mov r1, r6 + 8005948: 4813 ldr r0, [pc, #76] ; (8005998 ) + 800594a: f7fb f965 bl 8000c18 <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh> + 800594e: 2301 movs r3, #1 + 8005950: f884 3690 strb.w r3, [r4, #1680] ; 0x690 + 8005954: e56a b.n 800542c + 8005956: 4620 mov r0, r4 + 8005958: aa01 add r2, sp, #4 + 800595a: 2107 movs r1, #7 + 800595c: 47b0 blx r6 + 800595e: e54a b.n 80053f6 + 8005960: 480e ldr r0, [pc, #56] ; (800599c ) + 8005962: f7fe fd63 bl 800442c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15requestSyncTimeEv> + 8005966: 480d ldr r0, [pc, #52] ; (800599c ) + 8005968: f7fe fdea bl 8004540 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv> + 800596c: f8c4 5684 str.w r5, [r4, #1668] ; 0x684 + 8005970: f8c4 5688 str.w r5, [r4, #1672] ; 0x688 + 8005974: e58e b.n 8005494 + 8005976: bf00 nop + 8005978: 0008feff .word 0x0008feff + 800597c: 200007f4 .word 0x200007f4 + 8005980: 2000009c .word 0x2000009c + 8005984: 20000e9c .word 0x20000e9c + 8005988: 0800a010 .word 0x0800a010 + 800598c: 0800a380 .word 0x0800a380 + 8005990: 003dfeff .word 0x003dfeff + 8005994: 000f4240 .word 0x000f4240 + 8005998: 20000ae4 .word 0x20000ae4 + 800599c: 20000450 .word 0x20000450 + 80059a0: 3b9aca00 .word 0x3b9aca00 + +080059a4 <_GLOBAL__sub_I_htim2>: + 80059a4: b5f8 push {r3, r4, r5, r6, r7, lr} + 80059a6: 4933 ldr r1, [pc, #204] ; (8005a74 <_GLOBAL__sub_I_htim2+0xd0>) + 80059a8: 2400 movs r4, #0 + 80059aa: 4833 ldr r0, [pc, #204] ; (8005a78 <_GLOBAL__sub_I_htim2+0xd4>) + 80059ac: 2664 movs r6, #100 ; 0x64 + 80059ae: f7fa fdcb bl 8000548 <_ZN7EncoderC1EP17TIM_HandleTypeDef> + 80059b2: 4932 ldr r1, [pc, #200] ; (8005a7c <_GLOBAL__sub_I_htim2+0xd8>) + 80059b4: 4832 ldr r0, [pc, #200] ; (8005a80 <_GLOBAL__sub_I_htim2+0xdc>) + 80059b6: f44f 7700 mov.w r7, #512 ; 0x200 + 80059ba: f7fa fdc5 bl 8000548 <_ZN7EncoderC1EP17TIM_HandleTypeDef> + 80059be: 4d31 ldr r5, [pc, #196] ; (8005a84 <_GLOBAL__sub_I_htim2+0xe0>) + 80059c0: 4b31 ldr r3, [pc, #196] ; (8005a88 <_GLOBAL__sub_I_htim2+0xe4>) + 80059c2: 4932 ldr r1, [pc, #200] ; (8005a8c <_GLOBAL__sub_I_htim2+0xe8>) + 80059c4: 4a32 ldr r2, [pc, #200] ; (8005a90 <_GLOBAL__sub_I_htim2+0xec>) + 80059c6: f103 003c add.w r0, r3, #60 ; 0x3c + 80059ca: 611d str r5, [r3, #16] + 80059cc: 62dd str r5, [r3, #44] ; 0x2c + 80059ce: 6159 str r1, [r3, #20] + 80059d0: 6319 str r1, [r3, #48] ; 0x30 + 80059d2: 619a str r2, [r3, #24] + 80059d4: 635a str r2, [r3, #52] ; 0x34 + 80059d6: 601c str r4, [r3, #0] + 80059d8: 61dc str r4, [r3, #28] + 80059da: 4d2e ldr r5, [pc, #184] ; (8005a94 <_GLOBAL__sub_I_htim2+0xf0>) + 80059dc: f7fd fda8 bl 8003530 <_ZN8nav_msgs8OdometryC1Ev> + 80059e0: 4b2d ldr r3, [pc, #180] ; (8005a98 <_GLOBAL__sub_I_htim2+0xf4>) + 80059e2: 4621 mov r1, r4 + 80059e4: 4a2d ldr r2, [pc, #180] ; (8005a9c <_GLOBAL__sub_I_htim2+0xf8>) + 80059e6: f205 50a4 addw r0, r5, #1444 ; 0x5a4 + 80059ea: 606b str r3, [r5, #4] + 80059ec: 4b2c ldr r3, [pc, #176] ; (8005aa0 <_GLOBAL__sub_I_htim2+0xfc>) + 80059ee: 602a str r2, [r5, #0] + 80059f0: 4632 mov r2, r6 + 80059f2: f8c5 3694 str.w r3, [r5, #1684] ; 0x694 + 80059f6: f8c5 4088 str.w r4, [r5, #136] ; 0x88 + 80059fa: f8c5 418c str.w r4, [r5, #396] ; 0x18c + 80059fe: f8c5 4190 str.w r4, [r5, #400] ; 0x190 + 8005a02: f8c5 46b0 str.w r4, [r5, #1712] ; 0x6b0 + 8005a06: f8c5 46b8 str.w r4, [r5, #1720] ; 0x6b8 + 8005a0a: f885 4680 strb.w r4, [r5, #1664] ; 0x680 + 8005a0e: f004 f9d1 bl 8009db4 + 8005a12: 4632 mov r2, r6 + 8005a14: 4621 mov r1, r4 + 8005a16: f505 60c1 add.w r0, r5, #1544 ; 0x608 + 8005a1a: 4e22 ldr r6, [pc, #136] ; (8005aa4 <_GLOBAL__sub_I_htim2+0x100>) + 8005a1c: f004 f9ca bl 8009db4 + 8005a20: 4621 mov r1, r4 + 8005a22: f505 70d2 add.w r0, r5, #420 ; 0x1a4 + 8005a26: 463a mov r2, r7 + 8005a28: f004 f9c4 bl 8009db4 + 8005a2c: 463a mov r2, r7 + 8005a2e: 4621 mov r1, r4 + 8005a30: f505 7069 add.w r0, r5, #932 ; 0x3a4 + 8005a34: f004 f9be bl 8009db4 + 8005a38: 4a1b ldr r2, [pc, #108] ; (8005aa8 <_GLOBAL__sub_I_htim2+0x104>) + 8005a3a: 491c ldr r1, [pc, #112] ; (8005aac <_GLOBAL__sub_I_htim2+0x108>) + 8005a3c: 4630 mov r0, r6 + 8005a3e: 4b1c ldr r3, [pc, #112] ; (8005ab0 <_GLOBAL__sub_I_htim2+0x10c>) + 8005a40: 6011 str r1, [r2, #0] + 8005a42: f8c5 4698 str.w r4, [r5, #1688] ; 0x698 + 8005a46: f8c5 46a0 str.w r4, [r5, #1696] ; 0x6a0 + 8005a4a: f8c5 46a4 str.w r4, [r5, #1700] ; 0x6a4 + 8005a4e: f8c5 46ac str.w r4, [r5, #1708] ; 0x6ac + 8005a52: f8c5 41a0 str.w r4, [r5, #416] ; 0x1a0 + 8005a56: 4917 ldr r1, [pc, #92] ; (8005ab4 <_GLOBAL__sub_I_htim2+0x110>) + 8005a58: 4d17 ldr r5, [pc, #92] ; (8005ab8 <_GLOBAL__sub_I_htim2+0x114>) + 8005a5a: 6053 str r3, [r2, #4] + 8005a5c: 6114 str r4, [r2, #16] + 8005a5e: e9c3 5100 strd r5, r1, [r3] + 8005a62: f7fd fd65 bl 8003530 <_ZN8nav_msgs8OdometryC1Ev> + 8005a66: 4b15 ldr r3, [pc, #84] ; (8005abc <_GLOBAL__sub_I_htim2+0x118>) + 8005a68: 4a15 ldr r2, [pc, #84] ; (8005ac0 <_GLOBAL__sub_I_htim2+0x11c>) + 8005a6a: 611c str r4, [r3, #16] + 8005a6c: e9c3 2600 strd r2, r6, [r3] + 8005a70: bdf8 pop {r3, r4, r5, r6, r7, pc} + 8005a72: bf00 nop + 8005a74: 20000234 .word 0x20000234 + 8005a78: 20000434 .word 0x20000434 + 8005a7c: 200002f4 .word 0x200002f4 + 8005a80: 20000e80 .word 0x20000e80 + 8005a84: 00012110 .word 0x00012110 + 8005a88: 20000b0c .word 0x20000b0c + 8005a8c: 40490fd0 .word 0x40490fd0 + 8005a90: 3f40ff97 .word 0x3f40ff97 + 8005a94: 20000450 .word 0x20000450 + 8005a98: 200003b4 .word 0x200003b4 + 8005a9c: 0800a118 .word 0x0800a118 + 8005aa0: 0800a028 .word 0x0800a028 + 8005aa4: 20000cf0 .word 0x20000cf0 + 8005aa8: 200000a0 .word 0x200000a0 + 8005aac: 0800a124 .word 0x0800a124 + 8005ab0: 20000e9c .word 0x20000e9c + 8005ab4: 0800a3b8 .word 0x0800a3b8 + 8005ab8: 08009fc8 .word 0x08009fc8 + 8005abc: 20000cdc .word 0x20000cdc + 8005ac0: 0800a12c .word 0x0800a12c + +08005ac4 <_ZN12OdometryCalc21OdometryUpdateMessageEv>: + 8005ac4: b510 push {r4, lr} + 8005ac6: 4604 mov r4, r0 + 8005ac8: f850 3b1c ldr.w r3, [r0], #28 + 8005acc: 681b ldr r3, [r3, #0] + 8005ace: ed2d 8b0e vpush {d8-d14} + 8005ad2: 6a5b ldr r3, [r3, #36] ; 0x24 + 8005ad4: f7fa fd5a bl 800058c <_ZN7Encoder17GetLinearVelocityEv> + 8005ad8: eddf 9a3f vldr s19, [pc, #252] ; 8005bd8 <_ZN12OdometryCalc21OdometryUpdateMessageEv+0x114> + 8005adc: eef0 6a40 vmov.f32 s13, s0 + 8005ae0: ed94 aa19 vldr s20, [r4, #100] ; 0x64 + 8005ae4: eeb6 ea00 vmov.f32 s28, #96 ; 0x3f000000 0.5 + 8005ae8: eeb4 0a69 vcmp.f32 s0, s19 + 8005aec: ed94 9a1a vldr s18, [r4, #104] ; 0x68 + 8005af0: ee30 6a29 vadd.f32 s12, s0, s19 + 8005af4: edd4 8a0e vldr s17, [r4, #56] ; 0x38 + 8005af8: eeb0 da4a vmov.f32 s26, s20 + 8005afc: eef1 fa10 vmrs APSR_nzcv, fpscr + 8005b00: ee86 8a26 vdiv.f32 s16, s12, s13 + 8005b04: eef0 aa49 vmov.f32 s21, s18 + 8005b08: ee26 ea0e vmul.f32 s28, s12, s28 + 8005b0c: e9d4 2301 ldrd r2, r3, [r4, #4] + 8005b10: eba3 0302 sub.w r3, r3, r2 + 8005b14: ee07 3a90 vmov s15, r3 + 8005b18: eeb8 7a67 vcvt.f32.u32 s14, s15 + 8005b1c: edd4 7a73 vldr s15, [r4, #460] ; 0x1cc + 8005b20: bf18 it ne + 8005b22: eec0 9a27 vdivne.f32 s19, s0, s15 + 8005b26: eeb0 0a68 vmov.f32 s0, s17 + 8005b2a: ee89 ba87 vdiv.f32 s22, s19, s14 + 8005b2e: eeb6 7a00 vmov.f32 s14, #96 ; 0x3f000000 0.5 + 8005b32: ee67 7a87 vmul.f32 s15, s15, s14 + 8005b36: ee27 8a88 vmul.f32 s16, s15, s16 + 8005b3a: f002 fdf1 bl 8008720 + 8005b3e: eea8 da40 vfms.f32 s26, s16, s0 + 8005b42: eeb0 0a68 vmov.f32 s0, s17 + 8005b46: ee78 8a8b vadd.f32 s17, s17, s22 + 8005b4a: f002 fda9 bl 80086a0 + 8005b4e: eee8 aa00 vfma.f32 s21, s16, s0 + 8005b52: eeb0 0a4b vmov.f32 s0, s22 + 8005b56: f002 fda3 bl 80086a0 + 8005b5a: eef0 da40 vmov.f32 s27, s0 + 8005b5e: eeb0 0a4b vmov.f32 s0, s22 + 8005b62: f002 fddd bl 8008720 + 8005b66: eeb7 bae8 vcvt.f64.f32 d11, s17 + 8005b6a: eeb6 7b00 vmov.f64 d7, #96 ; 0x3f000000 0.5 + 8005b6e: edc4 8a0e vstr s17, [r4, #56] ; 0x38 + 8005b72: ee39 9a6a vsub.f32 s18, s18, s21 + 8005b76: ee3a aa4d vsub.f32 s20, s20, s26 + 8005b7a: ee2b bb07 vmul.f64 d11, d11, d7 + 8005b7e: ee29 8a00 vmul.f32 s16, s18, s0 + 8005b82: eeb0 0b4b vmov.f64 d0, d11 + 8005b86: f002 fd4f bl 8008628 + 8005b8a: eeb0 cb40 vmov.f64 d12, d0 + 8005b8e: eeb0 0b4b vmov.f64 d0, d11 + 8005b92: f002 fd0d bl 80085b0 + 8005b96: eef0 7a48 vmov.f32 s15, s16 + 8005b9a: ee9a 8a2d vfnms.f32 s16, s20, s27 + 8005b9e: 2300 movs r3, #0 + 8005ba0: eeb7 cbcc vcvt.f32.f64 s24, d12 + 8005ba4: ed84 ea48 vstr s28, [r4, #288] ; 0x120 + 8005ba8: eee9 7a2d vfma.f32 s15, s18, s27 + 8005bac: edc4 9a4e vstr s19, [r4, #312] ; 0x138 + 8005bb0: eeb7 0bc0 vcvt.f32.f64 s0, d0 + 8005bb4: 6763 str r3, [r4, #116] ; 0x74 + 8005bb6: ed84 ca1f vstr s24, [r4, #124] ; 0x7c + 8005bba: 67a3 str r3, [r4, #120] ; 0x78 + 8005bbc: ee38 8a0d vadd.f32 s16, s16, s26 + 8005bc0: ed84 0a20 vstr s0, [r4, #128] ; 0x80 + 8005bc4: ee77 7aaa vadd.f32 s15, s15, s21 + 8005bc8: ed84 8a19 vstr s16, [r4, #100] ; 0x64 + 8005bcc: ecbd 8b0e vpop {d8-d14} + 8005bd0: edc4 7a1a vstr s15, [r4, #104] ; 0x68 + 8005bd4: bd10 pop {r4, pc} + 8005bd6: bf00 nop + 8005bd8: 00000000 .word 0x00000000 + +08005bdc : + 8005bdc: 4b0a ldr r3, [pc, #40] ; (8005c08 ) + 8005bde: b082 sub sp, #8 + 8005be0: 6c1a ldr r2, [r3, #64] ; 0x40 + 8005be2: f042 5280 orr.w r2, r2, #268435456 ; 0x10000000 + 8005be6: 641a str r2, [r3, #64] ; 0x40 + 8005be8: 6c1a ldr r2, [r3, #64] ; 0x40 + 8005bea: f002 5280 and.w r2, r2, #268435456 ; 0x10000000 + 8005bee: 9200 str r2, [sp, #0] + 8005bf0: 9a00 ldr r2, [sp, #0] + 8005bf2: 6c5a ldr r2, [r3, #68] ; 0x44 + 8005bf4: f442 4280 orr.w r2, r2, #16384 ; 0x4000 + 8005bf8: 645a str r2, [r3, #68] ; 0x44 + 8005bfa: 6c5b ldr r3, [r3, #68] ; 0x44 + 8005bfc: f403 4380 and.w r3, r3, #16384 ; 0x4000 + 8005c00: 9301 str r3, [sp, #4] + 8005c02: 9b01 ldr r3, [sp, #4] + 8005c04: b002 add sp, #8 + 8005c06: 4770 bx lr + 8005c08: 40023800 .word 0x40023800 + +08005c0c : + 8005c0c: 6803 ldr r3, [r0, #0] + 8005c0e: b570 push {r4, r5, r6, lr} + 8005c10: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 + 8005c14: b08a sub sp, #40 ; 0x28 + 8005c16: f04f 0400 mov.w r4, #0 + 8005c1a: e9cd 4405 strd r4, r4, [sp, #20] + 8005c1e: e9cd 4407 strd r4, r4, [sp, #28] + 8005c22: 9409 str r4, [sp, #36] ; 0x24 + 8005c24: d022 beq.n 8005c6c + 8005c26: 4a28 ldr r2, [pc, #160] ; (8005cc8 ) + 8005c28: 4293 cmp r3, r2 + 8005c2a: d001 beq.n 8005c30 + 8005c2c: b00a add sp, #40 ; 0x28 + 8005c2e: bd70 pop {r4, r5, r6, pc} + 8005c30: 4b26 ldr r3, [pc, #152] ; (8005ccc ) + 8005c32: 2402 movs r4, #2 + 8005c34: 2503 movs r5, #3 + 8005c36: a905 add r1, sp, #20 + 8005c38: 6c1a ldr r2, [r3, #64] ; 0x40 + 8005c3a: 4825 ldr r0, [pc, #148] ; (8005cd0 ) + 8005c3c: f042 0208 orr.w r2, r2, #8 + 8005c40: 641a str r2, [r3, #64] ; 0x40 + 8005c42: 6c1a ldr r2, [r3, #64] ; 0x40 + 8005c44: f002 0208 and.w r2, r2, #8 + 8005c48: 9203 str r2, [sp, #12] + 8005c4a: 9a03 ldr r2, [sp, #12] + 8005c4c: 6b1a ldr r2, [r3, #48] ; 0x30 + 8005c4e: f042 0201 orr.w r2, r2, #1 + 8005c52: 631a str r2, [r3, #48] ; 0x30 + 8005c54: 6b1b ldr r3, [r3, #48] ; 0x30 + 8005c56: 9505 str r5, [sp, #20] + 8005c58: f003 0301 and.w r3, r3, #1 + 8005c5c: 9406 str r4, [sp, #24] + 8005c5e: 9409 str r4, [sp, #36] ; 0x24 + 8005c60: 9304 str r3, [sp, #16] + 8005c62: 9b04 ldr r3, [sp, #16] + 8005c64: f000 fcb8 bl 80065d8 + 8005c68: b00a add sp, #40 ; 0x28 + 8005c6a: bd70 pop {r4, r5, r6, pc} + 8005c6c: f503 330e add.w r3, r3, #145408 ; 0x23800 + 8005c70: 2501 movs r5, #1 + 8005c72: 2602 movs r6, #2 + 8005c74: 2020 movs r0, #32 + 8005c76: 6c1a ldr r2, [r3, #64] ; 0x40 + 8005c78: a905 add r1, sp, #20 + 8005c7a: 432a orrs r2, r5 + 8005c7c: 641a str r2, [r3, #64] ; 0x40 + 8005c7e: 6c1a ldr r2, [r3, #64] ; 0x40 + 8005c80: 402a ands r2, r5 + 8005c82: 9200 str r2, [sp, #0] + 8005c84: 9a00 ldr r2, [sp, #0] + 8005c86: 6b1a ldr r2, [r3, #48] ; 0x30 + 8005c88: 432a orrs r2, r5 + 8005c8a: 631a str r2, [r3, #48] ; 0x30 + 8005c8c: 6b1a ldr r2, [r3, #48] ; 0x30 + 8005c8e: 402a ands r2, r5 + 8005c90: 9201 str r2, [sp, #4] + 8005c92: 9a01 ldr r2, [sp, #4] + 8005c94: 6b1a ldr r2, [r3, #48] ; 0x30 + 8005c96: 4332 orrs r2, r6 + 8005c98: 631a str r2, [r3, #48] ; 0x30 + 8005c9a: 6b1b ldr r3, [r3, #48] ; 0x30 + 8005c9c: 9005 str r0, [sp, #20] + 8005c9e: 4033 ands r3, r6 + 8005ca0: 480b ldr r0, [pc, #44] ; (8005cd0 ) + 8005ca2: 9606 str r6, [sp, #24] + 8005ca4: 9302 str r3, [sp, #8] + 8005ca6: 9b02 ldr r3, [sp, #8] + 8005ca8: 9509 str r5, [sp, #36] ; 0x24 + 8005caa: f000 fc95 bl 80065d8 + 8005cae: 2308 movs r3, #8 + 8005cb0: a905 add r1, sp, #20 + 8005cb2: 4808 ldr r0, [pc, #32] ; (8005cd4 ) + 8005cb4: 9606 str r6, [sp, #24] + 8005cb6: 9509 str r5, [sp, #36] ; 0x24 + 8005cb8: 9305 str r3, [sp, #20] + 8005cba: e9cd 4407 strd r4, r4, [sp, #28] + 8005cbe: f000 fc8b bl 80065d8 + 8005cc2: b00a add sp, #40 ; 0x28 + 8005cc4: bd70 pop {r4, r5, r6, pc} + 8005cc6: bf00 nop + 8005cc8: 40000c00 .word 0x40000c00 + 8005ccc: 40023800 .word 0x40023800 + 8005cd0: 40020000 .word 0x40020000 + 8005cd4: 40020400 .word 0x40020400 + +08005cd8 : + 8005cd8: 6803 ldr r3, [r0, #0] + 8005cda: 4a14 ldr r2, [pc, #80] ; (8005d2c ) + 8005cdc: 4293 cmp r3, r2 + 8005cde: b510 push {r4, lr} + 8005ce0: b082 sub sp, #8 + 8005ce2: d00e beq.n 8005d02 + 8005ce4: 4a12 ldr r2, [pc, #72] ; (8005d30 ) + 8005ce6: 4293 cmp r3, r2 + 8005ce8: d109 bne.n 8005cfe + 8005cea: 4b12 ldr r3, [pc, #72] ; (8005d34 ) + 8005cec: 6c1a ldr r2, [r3, #64] ; 0x40 + 8005cee: f042 0204 orr.w r2, r2, #4 + 8005cf2: 641a str r2, [r3, #64] ; 0x40 + 8005cf4: 6c1b ldr r3, [r3, #64] ; 0x40 + 8005cf6: f003 0304 and.w r3, r3, #4 + 8005cfa: 9301 str r3, [sp, #4] + 8005cfc: 9b01 ldr r3, [sp, #4] + 8005cfe: b002 add sp, #8 + 8005d00: bd10 pop {r4, pc} + 8005d02: 4b0c ldr r3, [pc, #48] ; (8005d34 ) + 8005d04: 2200 movs r2, #0 + 8005d06: 201d movs r0, #29 + 8005d08: 6c1c ldr r4, [r3, #64] ; 0x40 + 8005d0a: 4611 mov r1, r2 + 8005d0c: f044 0402 orr.w r4, r4, #2 + 8005d10: 641c str r4, [r3, #64] ; 0x40 + 8005d12: 6c1b ldr r3, [r3, #64] ; 0x40 + 8005d14: f003 0302 and.w r3, r3, #2 + 8005d18: 9300 str r3, [sp, #0] + 8005d1a: 9b00 ldr r3, [sp, #0] + 8005d1c: f000 fa34 bl 8006188 + 8005d20: 201d movs r0, #29 + 8005d22: b002 add sp, #8 + 8005d24: e8bd 4010 ldmia.w sp!, {r4, lr} + 8005d28: f000 ba64 b.w 80061f4 + 8005d2c: 40000400 .word 0x40000400 + 8005d30: 40000800 .word 0x40000800 + 8005d34: 40023800 .word 0x40023800 + +08005d38 : + 8005d38: 6801 ldr r1, [r0, #0] + 8005d3a: 2300 movs r3, #0 + 8005d3c: 4a10 ldr r2, [pc, #64] ; (8005d80 ) + 8005d3e: b530 push {r4, r5, lr} + 8005d40: 4291 cmp r1, r2 + 8005d42: b087 sub sp, #28 + 8005d44: e9cd 3301 strd r3, r3, [sp, #4] + 8005d48: e9cd 3303 strd r3, r3, [sp, #12] + 8005d4c: 9305 str r3, [sp, #20] + 8005d4e: d001 beq.n 8005d54 + 8005d50: b007 add sp, #28 + 8005d52: bd30 pop {r4, r5, pc} + 8005d54: 4b0b ldr r3, [pc, #44] ; (8005d84 ) + 8005d56: 2402 movs r4, #2 + 8005d58: f44f 4540 mov.w r5, #49152 ; 0xc000 + 8005d5c: a901 add r1, sp, #4 + 8005d5e: 6b1a ldr r2, [r3, #48] ; 0x30 + 8005d60: 4809 ldr r0, [pc, #36] ; (8005d88 ) + 8005d62: f042 0208 orr.w r2, r2, #8 + 8005d66: 631a str r2, [r3, #48] ; 0x30 + 8005d68: 6b1b ldr r3, [r3, #48] ; 0x30 + 8005d6a: 9501 str r5, [sp, #4] + 8005d6c: f003 0308 and.w r3, r3, #8 + 8005d70: 9402 str r4, [sp, #8] + 8005d72: 9405 str r4, [sp, #20] + 8005d74: 9300 str r3, [sp, #0] + 8005d76: 9b00 ldr r3, [sp, #0] + 8005d78: f000 fc2e bl 80065d8 + 8005d7c: b007 add sp, #28 + 8005d7e: bd30 pop {r4, r5, pc} + 8005d80: 40000800 .word 0x40000800 + 8005d84: 40023800 .word 0x40023800 + 8005d88: 40020c00 .word 0x40020c00 + +08005d8c : + 8005d8c: 4a66 ldr r2, [pc, #408] ; (8005f28 ) + 8005d8e: 6803 ldr r3, [r0, #0] + 8005d90: b5f0 push {r4, r5, r6, r7, lr} + 8005d92: 4293 cmp r3, r2 + 8005d94: b08b sub sp, #44 ; 0x2c + 8005d96: f04f 0400 mov.w r4, #0 + 8005d9a: 4605 mov r5, r0 + 8005d9c: e9cd 4405 strd r4, r4, [sp, #20] + 8005da0: e9cd 4407 strd r4, r4, [sp, #28] + 8005da4: 9409 str r4, [sp, #36] ; 0x24 + 8005da6: d004 beq.n 8005db2 + 8005da8: 4a60 ldr r2, [pc, #384] ; (8005f2c ) + 8005daa: 4293 cmp r3, r2 + 8005dac: d05c beq.n 8005e68 + 8005dae: b00b add sp, #44 ; 0x2c + 8005db0: bdf0 pop {r4, r5, r6, r7, pc} + 8005db2: 4b5f ldr r3, [pc, #380] ; (8005f30 ) + 8005db4: 2602 movs r6, #2 + 8005db6: 2003 movs r0, #3 + 8005db8: f44f 7740 mov.w r7, #768 ; 0x300 + 8005dbc: 6c1a ldr r2, [r3, #64] ; 0x40 + 8005dbe: a905 add r1, sp, #20 + 8005dc0: f442 2280 orr.w r2, r2, #262144 ; 0x40000 + 8005dc4: 641a str r2, [r3, #64] ; 0x40 + 8005dc6: 6c1a ldr r2, [r3, #64] ; 0x40 + 8005dc8: f402 2280 and.w r2, r2, #262144 ; 0x40000 + 8005dcc: 9201 str r2, [sp, #4] + 8005dce: 9a01 ldr r2, [sp, #4] + 8005dd0: 6b1a ldr r2, [r3, #48] ; 0x30 + 8005dd2: f042 0208 orr.w r2, r2, #8 + 8005dd6: 631a str r2, [r3, #48] ; 0x30 + 8005dd8: 2207 movs r2, #7 + 8005dda: 6b1b ldr r3, [r3, #48] ; 0x30 + 8005ddc: 9606 str r6, [sp, #24] + 8005dde: f003 0308 and.w r3, r3, #8 + 8005de2: 4e54 ldr r6, [pc, #336] ; (8005f34 ) + 8005de4: 9008 str r0, [sp, #32] + 8005de6: 9302 str r3, [sp, #8] + 8005de8: 4853 ldr r0, [pc, #332] ; (8005f38 ) + 8005dea: 9b02 ldr r3, [sp, #8] + 8005dec: 9209 str r2, [sp, #36] ; 0x24 + 8005dee: 9705 str r7, [sp, #20] + 8005df0: f000 fbf2 bl 80065d8 + 8005df4: 4951 ldr r1, [pc, #324] ; (8005f3c ) + 8005df6: f04f 6200 mov.w r2, #134217728 ; 0x8000000 + 8005dfa: f44f 6380 mov.w r3, #1024 ; 0x400 + 8005dfe: 4630 mov r0, r6 + 8005e00: 6274 str r4, [r6, #36] ; 0x24 + 8005e02: 6133 str r3, [r6, #16] + 8005e04: e9c6 4402 strd r4, r4, [r6, #8] + 8005e08: e9c6 4405 strd r4, r4, [r6, #20] + 8005e0c: e9c6 4407 strd r4, r4, [r6, #28] + 8005e10: e9c6 1200 strd r1, r2, [r6] + 8005e14: f000 fa14 bl 8006240 + 8005e18: 2800 cmp r0, #0 + 8005e1a: d17c bne.n 8005f16 + 8005e1c: 4c48 ldr r4, [pc, #288] ; (8005f40 ) + 8005e1e: 2300 movs r3, #0 + 8005e20: 4848 ldr r0, [pc, #288] ; (8005f44 ) + 8005e22: f04f 6700 mov.w r7, #134217728 ; 0x8000000 + 8005e26: 2140 movs r1, #64 ; 0x40 + 8005e28: f44f 6280 mov.w r2, #1024 ; 0x400 + 8005e2c: 6020 str r0, [r4, #0] + 8005e2e: 4620 mov r0, r4 + 8005e30: 66ee str r6, [r5, #108] ; 0x6c + 8005e32: 63b5 str r5, [r6, #56] ; 0x38 + 8005e34: 6263 str r3, [r4, #36] ; 0x24 + 8005e36: e9c4 7101 strd r7, r1, [r4, #4] + 8005e3a: e9c4 3203 strd r3, r2, [r4, #12] + 8005e3e: e9c4 3305 strd r3, r3, [r4, #20] + 8005e42: e9c4 3307 strd r3, r3, [r4, #28] + 8005e46: f000 f9fb bl 8006240 + 8005e4a: b108 cbz r0, 8005e50 + 8005e4c: f7fe faec bl 8004428 + 8005e50: 2200 movs r2, #0 + 8005e52: 66ac str r4, [r5, #104] ; 0x68 + 8005e54: 2027 movs r0, #39 ; 0x27 + 8005e56: 63a5 str r5, [r4, #56] ; 0x38 + 8005e58: 4611 mov r1, r2 + 8005e5a: f000 f995 bl 8006188 + 8005e5e: 2027 movs r0, #39 ; 0x27 + 8005e60: f000 f9c8 bl 80061f4 + 8005e64: b00b add sp, #44 ; 0x2c + 8005e66: bdf0 pop {r4, r5, r6, r7, pc} + 8005e68: 4b31 ldr r3, [pc, #196] ; (8005f30 ) + 8005e6a: 2602 movs r6, #2 + 8005e6c: 2003 movs r0, #3 + 8005e6e: 27c0 movs r7, #192 ; 0xc0 + 8005e70: 6c5a ldr r2, [r3, #68] ; 0x44 + 8005e72: a905 add r1, sp, #20 + 8005e74: f042 0220 orr.w r2, r2, #32 + 8005e78: 645a str r2, [r3, #68] ; 0x44 + 8005e7a: 6c5a ldr r2, [r3, #68] ; 0x44 + 8005e7c: f002 0220 and.w r2, r2, #32 + 8005e80: 9203 str r2, [sp, #12] + 8005e82: 9a03 ldr r2, [sp, #12] + 8005e84: 6b1a ldr r2, [r3, #48] ; 0x30 + 8005e86: f042 0204 orr.w r2, r2, #4 + 8005e8a: 631a str r2, [r3, #48] ; 0x30 + 8005e8c: 2208 movs r2, #8 + 8005e8e: 6b1b ldr r3, [r3, #48] ; 0x30 + 8005e90: 9606 str r6, [sp, #24] + 8005e92: f003 0304 and.w r3, r3, #4 + 8005e96: 4e2c ldr r6, [pc, #176] ; (8005f48 ) + 8005e98: 9008 str r0, [sp, #32] + 8005e9a: 9304 str r3, [sp, #16] + 8005e9c: 482b ldr r0, [pc, #172] ; (8005f4c ) + 8005e9e: 9b04 ldr r3, [sp, #16] + 8005ea0: 9209 str r2, [sp, #36] ; 0x24 + 8005ea2: 9705 str r7, [sp, #20] + 8005ea4: f000 fb98 bl 80065d8 + 8005ea8: 4929 ldr r1, [pc, #164] ; (8005f50 ) + 8005eaa: f04f 6220 mov.w r2, #167772160 ; 0xa000000 + 8005eae: f44f 6380 mov.w r3, #1024 ; 0x400 + 8005eb2: 4630 mov r0, r6 + 8005eb4: 6274 str r4, [r6, #36] ; 0x24 + 8005eb6: 6133 str r3, [r6, #16] + 8005eb8: e9c6 4402 strd r4, r4, [r6, #8] + 8005ebc: e9c6 4405 strd r4, r4, [r6, #20] + 8005ec0: e9c6 4407 strd r4, r4, [r6, #28] + 8005ec4: e9c6 1200 strd r1, r2, [r6] + 8005ec8: f000 f9ba bl 8006240 + 8005ecc: bb48 cbnz r0, 8005f22 + 8005ece: 4c21 ldr r4, [pc, #132] ; (8005f54 ) + 8005ed0: 2300 movs r3, #0 + 8005ed2: 4821 ldr r0, [pc, #132] ; (8005f58 ) + 8005ed4: f04f 6720 mov.w r7, #167772160 ; 0xa000000 + 8005ed8: 2140 movs r1, #64 ; 0x40 + 8005eda: f44f 6280 mov.w r2, #1024 ; 0x400 + 8005ede: 6020 str r0, [r4, #0] + 8005ee0: 4620 mov r0, r4 + 8005ee2: 66ee str r6, [r5, #108] ; 0x6c + 8005ee4: 63b5 str r5, [r6, #56] ; 0x38 + 8005ee6: 6263 str r3, [r4, #36] ; 0x24 + 8005ee8: e9c4 7101 strd r7, r1, [r4, #4] + 8005eec: e9c4 3203 strd r3, r2, [r4, #12] + 8005ef0: e9c4 3305 strd r3, r3, [r4, #20] + 8005ef4: e9c4 3307 strd r3, r3, [r4, #28] + 8005ef8: f000 f9a2 bl 8006240 + 8005efc: b970 cbnz r0, 8005f1c + 8005efe: 2200 movs r2, #0 + 8005f00: 66ac str r4, [r5, #104] ; 0x68 + 8005f02: 2047 movs r0, #71 ; 0x47 + 8005f04: 63a5 str r5, [r4, #56] ; 0x38 + 8005f06: 4611 mov r1, r2 + 8005f08: f000 f93e bl 8006188 + 8005f0c: 2047 movs r0, #71 ; 0x47 + 8005f0e: f000 f971 bl 80061f4 + 8005f12: b00b add sp, #44 ; 0x2c + 8005f14: bdf0 pop {r4, r5, r6, r7, pc} + 8005f16: f7fe fa87 bl 8004428 + 8005f1a: e77f b.n 8005e1c + 8005f1c: f7fe fa84 bl 8004428 + 8005f20: e7ed b.n 8005efe + 8005f22: f7fe fa81 bl 8004428 + 8005f26: e7d2 b.n 8005ece + 8005f28: 40004800 .word 0x40004800 + 8005f2c: 40011400 .word 0x40011400 + 8005f30: 40023800 .word 0x40023800 + 8005f34: 200000b4 .word 0x200000b4 + 8005f38: 40020c00 .word 0x40020c00 + 8005f3c: 40026028 .word 0x40026028 + 8005f40: 20000114 .word 0x20000114 + 8005f44: 40026058 .word 0x40026058 + 8005f48: 20000174 .word 0x20000174 + 8005f4c: 40020800 .word 0x40020800 + 8005f50: 40026428 .word 0x40026428 + 8005f54: 200001d4 .word 0x200001d4 + 8005f58: 400264a0 .word 0x400264a0 + +08005f5c : + 8005f5c: 4770 bx lr + 8005f5e: bf00 nop + +08005f60 : + 8005f60: e7fe b.n 8005f60 + 8005f62: bf00 nop + +08005f64 : + 8005f64: e7fe b.n 8005f64 + 8005f66: bf00 nop + +08005f68 : + 8005f68: e7fe b.n 8005f68 + 8005f6a: bf00 nop + +08005f6c : + 8005f6c: e7fe b.n 8005f6c + 8005f6e: bf00 nop + +08005f70 : + 8005f70: 4770 bx lr + 8005f72: bf00 nop + +08005f74 : + 8005f74: 4770 bx lr + 8005f76: bf00 nop + +08005f78 : + 8005f78: 4770 bx lr + 8005f7a: bf00 nop + +08005f7c : + 8005f7c: f000 b8de b.w 800613c + +08005f80 : + 8005f80: 4801 ldr r0, [pc, #4] ; (8005f88 ) + 8005f82: f000 ba53 b.w 800642c + 8005f86: bf00 nop + 8005f88: 200000b4 .word 0x200000b4 + +08005f8c : + 8005f8c: 4801 ldr r0, [pc, #4] ; (8005f94 ) + 8005f8e: f000 ba4d b.w 800642c + 8005f92: bf00 nop + 8005f94: 20000114 .word 0x20000114 + +08005f98 : + 8005f98: 4801 ldr r0, [pc, #4] ; (8005fa0 ) + 8005f9a: f001 be1b b.w 8007bd4 + 8005f9e: bf00 nop + 8005fa0: 20000274 .word 0x20000274 + +08005fa4 : + 8005fa4: 4801 ldr r0, [pc, #4] ; (8005fac ) + 8005fa6: f002 b82b b.w 8008000 + 8005faa: bf00 nop + 8005fac: 20000334 .word 0x20000334 + +08005fb0 : + 8005fb0: 4801 ldr r0, [pc, #4] ; (8005fb8 ) + 8005fb2: f000 ba3b b.w 800642c + 8005fb6: bf00 nop + 8005fb8: 20000174 .word 0x20000174 + +08005fbc : + 8005fbc: 4801 ldr r0, [pc, #4] ; (8005fc4 ) + 8005fbe: f000 ba35 b.w 800642c + 8005fc2: bf00 nop + 8005fc4: 200001d4 .word 0x200001d4 + +08005fc8 : + 8005fc8: 4801 ldr r0, [pc, #4] ; (8005fd0 ) + 8005fca: f002 b819 b.w 8008000 + 8005fce: bf00 nop + 8005fd0: 200003b4 .word 0x200003b4 + +08005fd4 <_sbrk>: + 8005fd4: 4a0c ldr r2, [pc, #48] ; (8006008 <_sbrk+0x34>) + 8005fd6: b508 push {r3, lr} + 8005fd8: 6813 ldr r3, [r2, #0] + 8005fda: b133 cbz r3, 8005fea <_sbrk+0x16> + 8005fdc: 4418 add r0, r3 + 8005fde: 4669 mov r1, sp + 8005fe0: 4288 cmp r0, r1 + 8005fe2: d809 bhi.n 8005ff8 <_sbrk+0x24> + 8005fe4: 6010 str r0, [r2, #0] + 8005fe6: 4618 mov r0, r3 + 8005fe8: bd08 pop {r3, pc} + 8005fea: 4908 ldr r1, [pc, #32] ; (800600c <_sbrk+0x38>) + 8005fec: 460b mov r3, r1 + 8005fee: 6011 str r1, [r2, #0] + 8005ff0: 4669 mov r1, sp + 8005ff2: 4418 add r0, r3 + 8005ff4: 4288 cmp r0, r1 + 8005ff6: d9f5 bls.n 8005fe4 <_sbrk+0x10> + 8005ff8: f003 fe8e bl 8009d18 <__errno> + 8005ffc: 220c movs r2, #12 + 8005ffe: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff + 8006002: 6002 str r2, [r0, #0] + 8006004: 4618 mov r0, r3 + 8006006: bd08 pop {r3, pc} + 8006008: 20000eac .word 0x20000eac + 800600c: 20000ec0 .word 0x20000ec0 + +08006010 : + 8006010: 4a0f ldr r2, [pc, #60] ; (8006050 ) + 8006012: 4b10 ldr r3, [pc, #64] ; (8006054 ) + 8006014: f8d2 0088 ldr.w r0, [r2, #136] ; 0x88 + 8006018: 490f ldr r1, [pc, #60] ; (8006058 ) + 800601a: f440 0070 orr.w r0, r0, #15728640 ; 0xf00000 + 800601e: b470 push {r4, r5, r6} + 8006020: f8c2 0088 str.w r0, [r2, #136] ; 0x88 + 8006024: 2400 movs r4, #0 + 8006026: 6818 ldr r0, [r3, #0] + 8006028: f04f 6500 mov.w r5, #134217728 ; 0x8000000 + 800602c: 4e0b ldr r6, [pc, #44] ; (800605c ) + 800602e: f040 0001 orr.w r0, r0, #1 + 8006032: 6018 str r0, [r3, #0] + 8006034: 609c str r4, [r3, #8] + 8006036: 6818 ldr r0, [r3, #0] + 8006038: 4001 ands r1, r0 + 800603a: 6019 str r1, [r3, #0] + 800603c: 605e str r6, [r3, #4] + 800603e: 6819 ldr r1, [r3, #0] + 8006040: f421 2180 bic.w r1, r1, #262144 ; 0x40000 + 8006044: 6019 str r1, [r3, #0] + 8006046: 60dc str r4, [r3, #12] + 8006048: 6095 str r5, [r2, #8] + 800604a: bc70 pop {r4, r5, r6} + 800604c: 4770 bx lr + 800604e: bf00 nop + 8006050: e000ed00 .word 0xe000ed00 + 8006054: 40023800 .word 0x40023800 + 8006058: fef6ffff .word 0xfef6ffff + 800605c: 24003010 .word 0x24003010 + +08006060 <_ZN3ros16normalizeSecNSecERmS0_>: + 8006060: b470 push {r4, r5, r6} + 8006062: 680d ldr r5, [r1, #0] + 8006064: 4b06 ldr r3, [pc, #24] ; (8006080 <_ZN3ros16normalizeSecNSecERmS0_+0x20>) + 8006066: 0a6a lsrs r2, r5, #9 + 8006068: 6804 ldr r4, [r0, #0] + 800606a: 4e06 ldr r6, [pc, #24] ; (8006084 <_ZN3ros16normalizeSecNSecERmS0_+0x24>) + 800606c: fba3 3202 umull r3, r2, r3, r2 + 8006070: 09d3 lsrs r3, r2, #7 + 8006072: 441c add r4, r3 + 8006074: fb06 5313 mls r3, r6, r3, r5 + 8006078: 6004 str r4, [r0, #0] + 800607a: 600b str r3, [r1, #0] + 800607c: bc70 pop {r4, r5, r6} + 800607e: 4770 bx lr + 8006080: 00044b83 .word 0x00044b83 + 8006084: 3b9aca00 .word 0x3b9aca00 + +08006088 : + 8006088: f8df d034 ldr.w sp, [pc, #52] ; 80060c0 + 800608c: 2100 movs r1, #0 + 800608e: e003 b.n 8006098 + +08006090 : + 8006090: 4b0c ldr r3, [pc, #48] ; (80060c4 ) + 8006092: 585b ldr r3, [r3, r1] + 8006094: 5043 str r3, [r0, r1] + 8006096: 3104 adds r1, #4 + +08006098 : + 8006098: 480b ldr r0, [pc, #44] ; (80060c8 ) + 800609a: 4b0c ldr r3, [pc, #48] ; (80060cc ) + 800609c: 1842 adds r2, r0, r1 + 800609e: 429a cmp r2, r3 + 80060a0: d3f6 bcc.n 8006090 + 80060a2: 4a0b ldr r2, [pc, #44] ; (80060d0 ) + 80060a4: e002 b.n 80060ac + +080060a6 : + 80060a6: 2300 movs r3, #0 + 80060a8: f842 3b04 str.w r3, [r2], #4 + +080060ac : + 80060ac: 4b09 ldr r3, [pc, #36] ; (80060d4 ) + 80060ae: 429a cmp r2, r3 + 80060b0: d3f9 bcc.n 80060a6 + 80060b2: f7ff ffad bl 8006010 + 80060b6: f003 fe35 bl 8009d24 <__libc_init_array> + 80060ba: f7fd fadb bl 8003674
+ 80060be: 4770 bx lr + 80060c0: 20080000 .word 0x20080000 + 80060c4: 0800aa84 .word 0x0800aa84 + 80060c8: 20000000 .word 0x20000000 + 80060cc: 20000080 .word 0x20000080 + 80060d0: 20000080 .word 0x20000080 + 80060d4: 20000ec0 .word 0x20000ec0 + +080060d8 : + 80060d8: e7fe b.n 80060d8 + ... + +080060dc : + 80060dc: 4a0e ldr r2, [pc, #56] ; (8006118 ) + 80060de: f44f 737a mov.w r3, #1000 ; 0x3e8 + 80060e2: 490e ldr r1, [pc, #56] ; (800611c ) + 80060e4: 7812 ldrb r2, [r2, #0] + 80060e6: fbb3 f3f2 udiv r3, r3, r2 + 80060ea: b510 push {r4, lr} + 80060ec: 4604 mov r4, r0 + 80060ee: 6808 ldr r0, [r1, #0] + 80060f0: fbb0 f0f3 udiv r0, r0, r3 + 80060f4: f000 f88c bl 8006210 + 80060f8: b908 cbnz r0, 80060fe + 80060fa: 2c0f cmp r4, #15 + 80060fc: d901 bls.n 8006102 + 80060fe: 2001 movs r0, #1 + 8006100: bd10 pop {r4, pc} + 8006102: 2200 movs r2, #0 + 8006104: 4621 mov r1, r4 + 8006106: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff + 800610a: f000 f83d bl 8006188 + 800610e: 4b04 ldr r3, [pc, #16] ; (8006120 ) + 8006110: 2000 movs r0, #0 + 8006112: 601c str r4, [r3, #0] + 8006114: bd10 pop {r4, pc} + 8006116: bf00 nop + 8006118: 20000014 .word 0x20000014 + 800611c: 20000010 .word 0x20000010 + 8006120: 20000018 .word 0x20000018 + +08006124 : + 8006124: b508 push {r3, lr} + 8006126: 2003 movs r0, #3 + 8006128: f000 f81a bl 8006160 + 800612c: 2000 movs r0, #0 + 800612e: f7ff ffd5 bl 80060dc + 8006132: f7ff fd53 bl 8005bdc + 8006136: 2000 movs r0, #0 + 8006138: bd08 pop {r3, pc} + 800613a: bf00 nop + +0800613c : + 800613c: 4a03 ldr r2, [pc, #12] ; (800614c ) + 800613e: 4b04 ldr r3, [pc, #16] ; (8006150 ) + 8006140: 6811 ldr r1, [r2, #0] + 8006142: 781b ldrb r3, [r3, #0] + 8006144: 440b add r3, r1 + 8006146: 6013 str r3, [r2, #0] + 8006148: 4770 bx lr + 800614a: bf00 nop + 800614c: 20000eb8 .word 0x20000eb8 + 8006150: 20000014 .word 0x20000014 + +08006154 : + 8006154: 4b01 ldr r3, [pc, #4] ; (800615c ) + 8006156: 6818 ldr r0, [r3, #0] + 8006158: 4770 bx lr + 800615a: bf00 nop + 800615c: 20000eb8 .word 0x20000eb8 + +08006160 : + 8006160: 4907 ldr r1, [pc, #28] ; (8006180 ) + 8006162: 0200 lsls r0, r0, #8 + 8006164: 4b07 ldr r3, [pc, #28] ; (8006184 ) + 8006166: 68ca ldr r2, [r1, #12] + 8006168: f400 60e0 and.w r0, r0, #1792 ; 0x700 + 800616c: b410 push {r4} + 800616e: f64f 04ff movw r4, #63743 ; 0xf8ff + 8006172: 4022 ands r2, r4 + 8006174: f85d 4b04 ldr.w r4, [sp], #4 + 8006178: 4313 orrs r3, r2 + 800617a: 4318 orrs r0, r3 + 800617c: 60c8 str r0, [r1, #12] + 800617e: 4770 bx lr + 8006180: e000ed00 .word 0xe000ed00 + 8006184: 05fa0000 .word 0x05fa0000 + +08006188 : + 8006188: 4b17 ldr r3, [pc, #92] ; (80061e8 ) + 800618a: 68db ldr r3, [r3, #12] + 800618c: f3c3 2302 ubfx r3, r3, #8, #3 + 8006190: b430 push {r4, r5} + 8006192: f1c3 0507 rsb r5, r3, #7 + 8006196: 1d1c adds r4, r3, #4 + 8006198: 2d04 cmp r5, #4 + 800619a: bf28 it cs + 800619c: 2504 movcs r5, #4 + 800619e: 2c06 cmp r4, #6 + 80061a0: d918 bls.n 80061d4 + 80061a2: 3b03 subs r3, #3 + 80061a4: f04f 34ff mov.w r4, #4294967295 ; 0xffffffff + 80061a8: 409c lsls r4, r3 + 80061aa: ea22 0404 bic.w r4, r2, r4 + 80061ae: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff + 80061b2: 2800 cmp r0, #0 + 80061b4: fa02 f205 lsl.w r2, r2, r5 + 80061b8: ea21 0102 bic.w r1, r1, r2 + 80061bc: fa01 f203 lsl.w r2, r1, r3 + 80061c0: ea42 0204 orr.w r2, r2, r4 + 80061c4: ea4f 1202 mov.w r2, r2, lsl #4 + 80061c8: b2d2 uxtb r2, r2 + 80061ca: db06 blt.n 80061da + 80061cc: 4b07 ldr r3, [pc, #28] ; (80061ec ) + 80061ce: 541a strb r2, [r3, r0] + 80061d0: bc30 pop {r4, r5} + 80061d2: 4770 bx lr + 80061d4: 2400 movs r4, #0 + 80061d6: 4623 mov r3, r4 + 80061d8: e7e9 b.n 80061ae + 80061da: f000 000f and.w r0, r0, #15 + 80061de: 4b04 ldr r3, [pc, #16] ; (80061f0 ) + 80061e0: 541a strb r2, [r3, r0] + 80061e2: bc30 pop {r4, r5} + 80061e4: 4770 bx lr + 80061e6: bf00 nop + 80061e8: e000ed00 .word 0xe000ed00 + 80061ec: e000e400 .word 0xe000e400 + 80061f0: e000ed14 .word 0xe000ed14 + +080061f4 : + 80061f4: 2800 cmp r0, #0 + 80061f6: db07 blt.n 8006208 + 80061f8: f000 011f and.w r1, r0, #31 + 80061fc: 2301 movs r3, #1 + 80061fe: 0940 lsrs r0, r0, #5 + 8006200: 4a02 ldr r2, [pc, #8] ; (800620c ) + 8006202: 408b lsls r3, r1 + 8006204: f842 3020 str.w r3, [r2, r0, lsl #2] + 8006208: 4770 bx lr + 800620a: bf00 nop + 800620c: e000e100 .word 0xe000e100 + +08006210 : + 8006210: 3801 subs r0, #1 + 8006212: f1b0 7f80 cmp.w r0, #16777216 ; 0x1000000 + 8006216: d20d bcs.n 8006234 + 8006218: 4b07 ldr r3, [pc, #28] ; (8006238 ) + 800621a: 2200 movs r2, #0 + 800621c: 2107 movs r1, #7 + 800621e: b430 push {r4, r5} + 8006220: 25f0 movs r5, #240 ; 0xf0 + 8006222: 4c06 ldr r4, [pc, #24] ; (800623c ) + 8006224: 6058 str r0, [r3, #4] + 8006226: 4610 mov r0, r2 + 8006228: f884 5023 strb.w r5, [r4, #35] ; 0x23 + 800622c: 609a str r2, [r3, #8] + 800622e: 6019 str r1, [r3, #0] + 8006230: bc30 pop {r4, r5} + 8006232: 4770 bx lr + 8006234: 2001 movs r0, #1 + 8006236: 4770 bx lr + 8006238: e000e010 .word 0xe000e010 + 800623c: e000ed00 .word 0xe000ed00 + +08006240 : + 8006240: b5f8 push {r3, r4, r5, r6, r7, lr} + 8006242: 4604 mov r4, r0 + 8006244: f7ff ff86 bl 8006154 + 8006248: 2c00 cmp r4, #0 + 800624a: d053 beq.n 80062f4 + 800624c: 2202 movs r2, #2 + 800624e: 6823 ldr r3, [r4, #0] + 8006250: 2100 movs r1, #0 + 8006252: 4605 mov r5, r0 + 8006254: f884 2035 strb.w r2, [r4, #53] ; 0x35 + 8006258: 681a ldr r2, [r3, #0] + 800625a: f884 1034 strb.w r1, [r4, #52] ; 0x34 + 800625e: f022 0201 bic.w r2, r2, #1 + 8006262: 601a str r2, [r3, #0] + 8006264: e005 b.n 8006272 + 8006266: f7ff ff75 bl 8006154 + 800626a: 1b40 subs r0, r0, r5 + 800626c: 2805 cmp r0, #5 + 800626e: d83a bhi.n 80062e6 + 8006270: 6823 ldr r3, [r4, #0] + 8006272: 681a ldr r2, [r3, #0] + 8006274: 07d1 lsls r1, r2, #31 + 8006276: d4f6 bmi.n 8006266 + 8006278: e9d4 2001 ldrd r2, r0, [r4, #4] + 800627c: 68e1 ldr r1, [r4, #12] + 800627e: 4302 orrs r2, r0 + 8006280: 681f ldr r7, [r3, #0] + 8006282: e9d4 0504 ldrd r0, r5, [r4, #16] + 8006286: 430a orrs r2, r1 + 8006288: 4302 orrs r2, r0 + 800628a: 6a20 ldr r0, [r4, #32] + 800628c: e9d4 6106 ldrd r6, r1, [r4, #24] + 8006290: 432a orrs r2, r5 + 8006292: 4d35 ldr r5, [pc, #212] ; (8006368 ) + 8006294: 4332 orrs r2, r6 + 8006296: 403d ands r5, r7 + 8006298: 430a orrs r2, r1 + 800629a: 6a61 ldr r1, [r4, #36] ; 0x24 + 800629c: 4302 orrs r2, r0 + 800629e: 2904 cmp r1, #4 + 80062a0: ea42 0205 orr.w r2, r2, r5 + 80062a4: d028 beq.n 80062f8 + 80062a6: 601a str r2, [r3, #0] + 80062a8: 695a ldr r2, [r3, #20] + 80062aa: f022 0207 bic.w r2, r2, #7 + 80062ae: 4311 orrs r1, r2 + 80062b0: b2da uxtb r2, r3 + 80062b2: 4d2e ldr r5, [pc, #184] ; (800636c ) + 80062b4: 6159 str r1, [r3, #20] + 80062b6: 3a10 subs r2, #16 + 80062b8: 492d ldr r1, [pc, #180] ; (8006370 ) + 80062ba: 482e ldr r0, [pc, #184] ; (8006374 ) + 80062bc: fba5 5202 umull r5, r2, r5, r2 + 80062c0: 4019 ands r1, r3 + 80062c2: 2501 movs r5, #1 + 80062c4: 0913 lsrs r3, r2, #4 + 80062c6: 2200 movs r2, #0 + 80062c8: 5cc0 ldrb r0, [r0, r3] + 80062ca: 2b03 cmp r3, #3 + 80062cc: f04f 033f mov.w r3, #63 ; 0x3f + 80062d0: bf88 it hi + 80062d2: 3104 addhi r1, #4 + 80062d4: 65e0 str r0, [r4, #92] ; 0x5c + 80062d6: 4083 lsls r3, r0 + 80062d8: 4610 mov r0, r2 + 80062da: 65a1 str r1, [r4, #88] ; 0x58 + 80062dc: 608b str r3, [r1, #8] + 80062de: 6562 str r2, [r4, #84] ; 0x54 + 80062e0: f884 5035 strb.w r5, [r4, #53] ; 0x35 + 80062e4: bdf8 pop {r3, r4, r5, r6, r7, pc} + 80062e6: 2303 movs r3, #3 + 80062e8: 2220 movs r2, #32 + 80062ea: 4618 mov r0, r3 + 80062ec: 6562 str r2, [r4, #84] ; 0x54 + 80062ee: f884 3035 strb.w r3, [r4, #53] ; 0x35 + 80062f2: bdf8 pop {r3, r4, r5, r6, r7, pc} + 80062f4: 2001 movs r0, #1 + 80062f6: bdf8 pop {r3, r4, r5, r6, r7, pc} + 80062f8: e9d4 510b ldrd r5, r1, [r4, #44] ; 0x2c + 80062fc: 6aa7 ldr r7, [r4, #40] ; 0x28 + 80062fe: ea45 0001 orr.w r0, r5, r1 + 8006302: f047 0104 orr.w r1, r7, #4 + 8006306: 4302 orrs r2, r0 + 8006308: 601a str r2, [r3, #0] + 800630a: 695a ldr r2, [r3, #20] + 800630c: f022 0207 bic.w r2, r2, #7 + 8006310: 4311 orrs r1, r2 + 8006312: 2d00 cmp r5, #0 + 8006314: d0cc beq.n 80062b0 + 8006316: b17e cbz r6, 8006338 + 8006318: f5b6 5f00 cmp.w r6, #8192 ; 0x2000 + 800631c: d016 beq.n 800634c + 800631e: 2f02 cmp r7, #2 + 8006320: d903 bls.n 800632a + 8006322: 2f03 cmp r7, #3 + 8006324: d1c4 bne.n 80062b0 + 8006326: 01ea lsls r2, r5, #7 + 8006328: d5c2 bpl.n 80062b0 + 800632a: 2301 movs r3, #1 + 800632c: 2240 movs r2, #64 ; 0x40 + 800632e: 4618 mov r0, r3 + 8006330: 6562 str r2, [r4, #84] ; 0x54 + 8006332: f884 3035 strb.w r3, [r4, #53] ; 0x35 + 8006336: bdf8 pop {r3, r4, r5, r6, r7, pc} + 8006338: 2f01 cmp r7, #1 + 800633a: d003 beq.n 8006344 + 800633c: d3f3 bcc.n 8006326 + 800633e: 2f02 cmp r7, #2 + 8006340: d1b6 bne.n 80062b0 + 8006342: e7f0 b.n 8006326 + 8006344: f1b5 7fc0 cmp.w r5, #25165824 ; 0x1800000 + 8006348: d1b2 bne.n 80062b0 + 800634a: e7ee b.n 800632a + 800634c: 2f03 cmp r7, #3 + 800634e: d8af bhi.n 80062b0 + 8006350: a201 add r2, pc, #4 ; (adr r2, 8006358 ) + 8006352: f852 f027 ldr.w pc, [r2, r7, lsl #2] + 8006356: bf00 nop + 8006358: 0800632b .word 0x0800632b + 800635c: 08006327 .word 0x08006327 + 8006360: 0800632b .word 0x0800632b + 8006364: 08006345 .word 0x08006345 + 8006368: e010803f .word 0xe010803f + 800636c: aaaaaaab .word 0xaaaaaaab + 8006370: fffffc00 .word 0xfffffc00 + 8006374: 0800a4a8 .word 0x0800a4a8 + +08006378 : + 8006378: b4f0 push {r4, r5, r6, r7} + 800637a: f890 4034 ldrb.w r4, [r0, #52] ; 0x34 + 800637e: 2c01 cmp r4, #1 + 8006380: d038 beq.n 80063f4 + 8006382: 2501 movs r5, #1 + 8006384: f890 4035 ldrb.w r4, [r0, #53] ; 0x35 + 8006388: 6d86 ldr r6, [r0, #88] ; 0x58 + 800638a: 42ac cmp r4, r5 + 800638c: f880 5034 strb.w r5, [r0, #52] ; 0x34 + 8006390: d129 bne.n 80063e6 + 8006392: 6804 ldr r4, [r0, #0] + 8006394: 2702 movs r7, #2 + 8006396: 2500 movs r5, #0 + 8006398: f880 7035 strb.w r7, [r0, #53] ; 0x35 + 800639c: 6545 str r5, [r0, #84] ; 0x54 + 800639e: 6887 ldr r7, [r0, #8] + 80063a0: 6825 ldr r5, [r4, #0] + 80063a2: 2f40 cmp r7, #64 ; 0x40 + 80063a4: f425 2580 bic.w r5, r5, #262144 ; 0x40000 + 80063a8: 6025 str r5, [r4, #0] + 80063aa: 6063 str r3, [r4, #4] + 80063ac: d026 beq.n 80063fc + 80063ae: 60a1 str r1, [r4, #8] + 80063b0: 60e2 str r2, [r4, #12] + 80063b2: 6dc1 ldr r1, [r0, #92] ; 0x5c + 80063b4: 233f movs r3, #63 ; 0x3f + 80063b6: 6c02 ldr r2, [r0, #64] ; 0x40 + 80063b8: 408b lsls r3, r1 + 80063ba: 60b3 str r3, [r6, #8] + 80063bc: 6823 ldr r3, [r4, #0] + 80063be: f043 0316 orr.w r3, r3, #22 + 80063c2: 6023 str r3, [r4, #0] + 80063c4: 6963 ldr r3, [r4, #20] + 80063c6: f043 0380 orr.w r3, r3, #128 ; 0x80 + 80063ca: 6163 str r3, [r4, #20] + 80063cc: b11a cbz r2, 80063d6 + 80063ce: 6823 ldr r3, [r4, #0] + 80063d0: f043 0308 orr.w r3, r3, #8 + 80063d4: 6023 str r3, [r4, #0] + 80063d6: 6822 ldr r2, [r4, #0] + 80063d8: 2300 movs r3, #0 + 80063da: f042 0201 orr.w r2, r2, #1 + 80063de: 4618 mov r0, r3 + 80063e0: 6022 str r2, [r4, #0] + 80063e2: bcf0 pop {r4, r5, r6, r7} + 80063e4: 4770 bx lr + 80063e6: 2200 movs r2, #0 + 80063e8: 2302 movs r3, #2 + 80063ea: f880 2034 strb.w r2, [r0, #52] ; 0x34 + 80063ee: 4618 mov r0, r3 + 80063f0: bcf0 pop {r4, r5, r6, r7} + 80063f2: 4770 bx lr + 80063f4: 2302 movs r3, #2 + 80063f6: bcf0 pop {r4, r5, r6, r7} + 80063f8: 4618 mov r0, r3 + 80063fa: 4770 bx lr + 80063fc: 60a2 str r2, [r4, #8] + 80063fe: 60e1 str r1, [r4, #12] + 8006400: e7d7 b.n 80063b2 + 8006402: bf00 nop + +08006404 : + 8006404: f890 2035 ldrb.w r2, [r0, #53] ; 0x35 + 8006408: 4603 mov r3, r0 + 800640a: 2a02 cmp r2, #2 + 800640c: d003 beq.n 8006416 + 800640e: 2280 movs r2, #128 ; 0x80 + 8006410: 2001 movs r0, #1 + 8006412: 655a str r2, [r3, #84] ; 0x54 + 8006414: 4770 bx lr + 8006416: 6802 ldr r2, [r0, #0] + 8006418: 2105 movs r1, #5 + 800641a: 2000 movs r0, #0 + 800641c: f883 1035 strb.w r1, [r3, #53] ; 0x35 + 8006420: 6813 ldr r3, [r2, #0] + 8006422: f023 0301 bic.w r3, r3, #1 + 8006426: 6013 str r3, [r2, #0] + 8006428: 4770 bx lr + 800642a: bf00 nop + +0800642c : + 800642c: b5f0 push {r4, r5, r6, r7, lr} + 800642e: 4604 mov r4, r0 + 8006430: b083 sub sp, #12 + 8006432: 2000 movs r0, #0 + 8006434: 2208 movs r2, #8 + 8006436: 4966 ldr r1, [pc, #408] ; (80065d0 ) + 8006438: 9001 str r0, [sp, #4] + 800643a: 680e ldr r6, [r1, #0] + 800643c: e9d4 7316 ldrd r7, r3, [r4, #88] ; 0x58 + 8006440: 409a lsls r2, r3 + 8006442: 683d ldr r5, [r7, #0] + 8006444: 422a tst r2, r5 + 8006446: d003 beq.n 8006450 + 8006448: 6821 ldr r1, [r4, #0] + 800644a: 6808 ldr r0, [r1, #0] + 800644c: 0740 lsls r0, r0, #29 + 800644e: d459 bmi.n 8006504 + 8006450: 2201 movs r2, #1 + 8006452: 409a lsls r2, r3 + 8006454: 422a tst r2, r5 + 8006456: d003 beq.n 8006460 + 8006458: 6821 ldr r1, [r4, #0] + 800645a: 6949 ldr r1, [r1, #20] + 800645c: 0608 lsls r0, r1, #24 + 800645e: d474 bmi.n 800654a + 8006460: 2204 movs r2, #4 + 8006462: 409a lsls r2, r3 + 8006464: 422a tst r2, r5 + 8006466: d003 beq.n 8006470 + 8006468: 6821 ldr r1, [r4, #0] + 800646a: 6809 ldr r1, [r1, #0] + 800646c: 0789 lsls r1, r1, #30 + 800646e: d466 bmi.n 800653e + 8006470: 2210 movs r2, #16 + 8006472: 409a lsls r2, r3 + 8006474: 422a tst r2, r5 + 8006476: d003 beq.n 8006480 + 8006478: 6821 ldr r1, [r4, #0] + 800647a: 6808 ldr r0, [r1, #0] + 800647c: 0700 lsls r0, r0, #28 + 800647e: d44b bmi.n 8006518 + 8006480: 2220 movs r2, #32 + 8006482: 409a lsls r2, r3 + 8006484: 422a tst r2, r5 + 8006486: d014 beq.n 80064b2 + 8006488: 6821 ldr r1, [r4, #0] + 800648a: 6808 ldr r0, [r1, #0] + 800648c: 06c0 lsls r0, r0, #27 + 800648e: d510 bpl.n 80064b2 + 8006490: 60ba str r2, [r7, #8] + 8006492: f894 2035 ldrb.w r2, [r4, #53] ; 0x35 + 8006496: 2a05 cmp r2, #5 + 8006498: d063 beq.n 8006562 + 800649a: 680b ldr r3, [r1, #0] + 800649c: f413 2f80 tst.w r3, #262144 ; 0x40000 + 80064a0: 680b ldr r3, [r1, #0] + 80064a2: d07e beq.n 80065a2 + 80064a4: 0319 lsls r1, r3, #12 + 80064a6: f140 8089 bpl.w 80065bc + 80064aa: 6be3 ldr r3, [r4, #60] ; 0x3c + 80064ac: b10b cbz r3, 80064b2 + 80064ae: 4620 mov r0, r4 + 80064b0: 4798 blx r3 + 80064b2: 6d63 ldr r3, [r4, #84] ; 0x54 + 80064b4: b323 cbz r3, 8006500 + 80064b6: 6d63 ldr r3, [r4, #84] ; 0x54 + 80064b8: 07da lsls r2, r3, #31 + 80064ba: d51a bpl.n 80064f2 + 80064bc: 6822 ldr r2, [r4, #0] + 80064be: 2105 movs r1, #5 + 80064c0: 4b44 ldr r3, [pc, #272] ; (80065d4 ) + 80064c2: f884 1035 strb.w r1, [r4, #53] ; 0x35 + 80064c6: fba3 3606 umull r3, r6, r3, r6 + 80064ca: 6813 ldr r3, [r2, #0] + 80064cc: f023 0301 bic.w r3, r3, #1 + 80064d0: 0ab6 lsrs r6, r6, #10 + 80064d2: 6013 str r3, [r2, #0] + 80064d4: e002 b.n 80064dc + 80064d6: 6813 ldr r3, [r2, #0] + 80064d8: 07db lsls r3, r3, #31 + 80064da: d504 bpl.n 80064e6 + 80064dc: 9b01 ldr r3, [sp, #4] + 80064de: 3301 adds r3, #1 + 80064e0: 42b3 cmp r3, r6 + 80064e2: 9301 str r3, [sp, #4] + 80064e4: d9f7 bls.n 80064d6 + 80064e6: 2200 movs r2, #0 + 80064e8: 2301 movs r3, #1 + 80064ea: f884 2034 strb.w r2, [r4, #52] ; 0x34 + 80064ee: f884 3035 strb.w r3, [r4, #53] ; 0x35 + 80064f2: 6ce3 ldr r3, [r4, #76] ; 0x4c + 80064f4: b123 cbz r3, 8006500 + 80064f6: 4620 mov r0, r4 + 80064f8: b003 add sp, #12 + 80064fa: e8bd 40f0 ldmia.w sp!, {r4, r5, r6, r7, lr} + 80064fe: 4718 bx r3 + 8006500: b003 add sp, #12 + 8006502: bdf0 pop {r4, r5, r6, r7, pc} + 8006504: 6808 ldr r0, [r1, #0] + 8006506: f020 0004 bic.w r0, r0, #4 + 800650a: 6008 str r0, [r1, #0] + 800650c: 60ba str r2, [r7, #8] + 800650e: 6d62 ldr r2, [r4, #84] ; 0x54 + 8006510: f042 0201 orr.w r2, r2, #1 + 8006514: 6562 str r2, [r4, #84] ; 0x54 + 8006516: e79b b.n 8006450 + 8006518: 60ba str r2, [r7, #8] + 800651a: 680a ldr r2, [r1, #0] + 800651c: f412 2f80 tst.w r2, #262144 ; 0x40000 + 8006520: 680a ldr r2, [r1, #0] + 8006522: d118 bne.n 8006556 + 8006524: 05d2 lsls r2, r2, #23 + 8006526: d403 bmi.n 8006530 + 8006528: 680a ldr r2, [r1, #0] + 800652a: f022 0208 bic.w r2, r2, #8 + 800652e: 600a str r2, [r1, #0] + 8006530: 6c22 ldr r2, [r4, #64] ; 0x40 + 8006532: 2a00 cmp r2, #0 + 8006534: d0a4 beq.n 8006480 + 8006536: 4620 mov r0, r4 + 8006538: 4790 blx r2 + 800653a: 6de3 ldr r3, [r4, #92] ; 0x5c + 800653c: e7a0 b.n 8006480 + 800653e: 60ba str r2, [r7, #8] + 8006540: 6d62 ldr r2, [r4, #84] ; 0x54 + 8006542: f042 0204 orr.w r2, r2, #4 + 8006546: 6562 str r2, [r4, #84] ; 0x54 + 8006548: e792 b.n 8006470 + 800654a: 60ba str r2, [r7, #8] + 800654c: 6d62 ldr r2, [r4, #84] ; 0x54 + 800654e: f042 0202 orr.w r2, r2, #2 + 8006552: 6562 str r2, [r4, #84] ; 0x54 + 8006554: e784 b.n 8006460 + 8006556: 0311 lsls r1, r2, #12 + 8006558: d5ea bpl.n 8006530 + 800655a: 6ca2 ldr r2, [r4, #72] ; 0x48 + 800655c: 2a00 cmp r2, #0 + 800655e: d1ea bne.n 8006536 + 8006560: e78e b.n 8006480 + 8006562: 680a ldr r2, [r1, #0] + 8006564: 6c20 ldr r0, [r4, #64] ; 0x40 + 8006566: f022 0216 bic.w r2, r2, #22 + 800656a: 600a str r2, [r1, #0] + 800656c: 694a ldr r2, [r1, #20] + 800656e: f022 0280 bic.w r2, r2, #128 ; 0x80 + 8006572: 614a str r2, [r1, #20] + 8006574: b338 cbz r0, 80065c6 + 8006576: 680a ldr r2, [r1, #0] + 8006578: f022 0208 bic.w r2, r2, #8 + 800657c: 600a str r2, [r1, #0] + 800657e: 223f movs r2, #63 ; 0x3f + 8006580: 2000 movs r0, #0 + 8006582: 2101 movs r1, #1 + 8006584: fa02 f303 lsl.w r3, r2, r3 + 8006588: 6d22 ldr r2, [r4, #80] ; 0x50 + 800658a: 60bb str r3, [r7, #8] + 800658c: f884 0034 strb.w r0, [r4, #52] ; 0x34 + 8006590: f884 1035 strb.w r1, [r4, #53] ; 0x35 + 8006594: 2a00 cmp r2, #0 + 8006596: d0b3 beq.n 8006500 + 8006598: 4620 mov r0, r4 + 800659a: b003 add sp, #12 + 800659c: e8bd 40f0 ldmia.w sp!, {r4, r5, r6, r7, lr} + 80065a0: 4710 bx r2 + 80065a2: f413 7380 ands.w r3, r3, #256 ; 0x100 + 80065a6: d180 bne.n 80064aa + 80065a8: 680a ldr r2, [r1, #0] + 80065aa: 2001 movs r0, #1 + 80065ac: f022 0210 bic.w r2, r2, #16 + 80065b0: 600a str r2, [r1, #0] + 80065b2: f884 3034 strb.w r3, [r4, #52] ; 0x34 + 80065b6: f884 0035 strb.w r0, [r4, #53] ; 0x35 + 80065ba: e776 b.n 80064aa + 80065bc: 6c63 ldr r3, [r4, #68] ; 0x44 + 80065be: 2b00 cmp r3, #0 + 80065c0: f47f af75 bne.w 80064ae + 80065c4: e775 b.n 80064b2 + 80065c6: 6ca2 ldr r2, [r4, #72] ; 0x48 + 80065c8: 2a00 cmp r2, #0 + 80065ca: d1d4 bne.n 8006576 + 80065cc: e7d7 b.n 800657e + 80065ce: bf00 nop + 80065d0: 20000010 .word 0x20000010 + 80065d4: 1b4e81b5 .word 0x1b4e81b5 + +080065d8 : + 80065d8: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} + 80065dc: f8df c22c ldr.w ip, [pc, #556] ; 800680c + 80065e0: b083 sub sp, #12 + 80065e2: 468e mov lr, r1 + 80065e4: 2500 movs r5, #0 + 80065e6: f8df 9228 ldr.w r9, [pc, #552] ; 8006810 + 80065ea: f8d1 8000 ldr.w r8, [r1] + 80065ee: e003 b.n 80065f8 + 80065f0: 3501 adds r5, #1 + 80065f2: 2d10 cmp r5, #16 + 80065f4: f000 80b6 beq.w 8006764 + 80065f8: 2301 movs r3, #1 + 80065fa: 40ab lsls r3, r5 + 80065fc: ea08 0103 and.w r1, r8, r3 + 8006600: 428b cmp r3, r1 + 8006602: d1f5 bne.n 80065f0 + 8006604: f8de 4004 ldr.w r4, [lr, #4] + 8006608: f024 0710 bic.w r7, r4, #16 + 800660c: 2f02 cmp r7, #2 + 800660e: f040 80ac bne.w 800676a + 8006612: 08ef lsrs r7, r5, #3 + 8006614: f005 0a07 and.w sl, r5, #7 + 8006618: f04f 0b0f mov.w fp, #15 + 800661c: f8de 2010 ldr.w r2, [lr, #16] + 8006620: eb00 0787 add.w r7, r0, r7, lsl #2 + 8006624: ea4f 0a8a mov.w sl, sl, lsl #2 + 8006628: 6a3e ldr r6, [r7, #32] + 800662a: fa0b fb0a lsl.w fp, fp, sl + 800662e: fa02 f20a lsl.w r2, r2, sl + 8006632: ea4f 0a45 mov.w sl, r5, lsl #1 + 8006636: ea26 060b bic.w r6, r6, fp + 800663a: f04f 0b03 mov.w fp, #3 + 800663e: 4332 orrs r2, r6 + 8006640: fa0b fb0a lsl.w fp, fp, sl + 8006644: f004 0603 and.w r6, r4, #3 + 8006648: 623a str r2, [r7, #32] + 800664a: ea6f 020b mvn.w r2, fp + 800664e: 6807 ldr r7, [r0, #0] + 8006650: fa06 f60a lsl.w r6, r6, sl + 8006654: 4017 ands r7, r2 + 8006656: 433e orrs r6, r7 + 8006658: 6006 str r6, [r0, #0] + 800665a: 6886 ldr r6, [r0, #8] + 800665c: f3c4 1700 ubfx r7, r4, #4, #1 + 8006660: ea06 0b02 and.w fp, r6, r2 + 8006664: f8de 600c ldr.w r6, [lr, #12] + 8006668: 40af lsls r7, r5 + 800666a: fa06 f60a lsl.w r6, r6, sl + 800666e: ea46 060b orr.w r6, r6, fp + 8006672: 6086 str r6, [r0, #8] + 8006674: 6846 ldr r6, [r0, #4] + 8006676: ea26 0303 bic.w r3, r6, r3 + 800667a: 431f orrs r7, r3 + 800667c: 6047 str r7, [r0, #4] + 800667e: 68c6 ldr r6, [r0, #12] + 8006680: 00e7 lsls r7, r4, #3 + 8006682: f8de 3008 ldr.w r3, [lr, #8] + 8006686: ea02 0206 and.w r2, r2, r6 + 800668a: fa03 f30a lsl.w r3, r3, sl + 800668e: ea43 0302 orr.w r3, r3, r2 + 8006692: 60c3 str r3, [r0, #12] + 8006694: d5ac bpl.n 80065f0 + 8006696: f8d9 6044 ldr.w r6, [r9, #68] ; 0x44 + 800669a: f025 0703 bic.w r7, r5, #3 + 800669e: f005 0303 and.w r3, r5, #3 + 80066a2: 220f movs r2, #15 + 80066a4: f446 4680 orr.w r6, r6, #16384 ; 0x4000 + 80066a8: f107 4780 add.w r7, r7, #1073741824 ; 0x40000000 + 80066ac: 009b lsls r3, r3, #2 + 80066ae: f8c9 6044 str.w r6, [r9, #68] ; 0x44 + 80066b2: f507 379c add.w r7, r7, #79872 ; 0x13800 + 80066b6: f8d9 6044 ldr.w r6, [r9, #68] ; 0x44 + 80066ba: fa02 fa03 lsl.w sl, r2, r3 + 80066be: f406 4680 and.w r6, r6, #16384 ; 0x4000 + 80066c2: 9601 str r6, [sp, #4] + 80066c4: 4e48 ldr r6, [pc, #288] ; (80067e8 ) + 80066c6: 9a01 ldr r2, [sp, #4] + 80066c8: 42b0 cmp r0, r6 + 80066ca: 68ba ldr r2, [r7, #8] + 80066cc: ea22 020a bic.w r2, r2, sl + 80066d0: d020 beq.n 8006714 + 80066d2: f506 6680 add.w r6, r6, #1024 ; 0x400 + 80066d6: 42b0 cmp r0, r6 + 80066d8: d05e beq.n 8006798 + 80066da: 4e44 ldr r6, [pc, #272] ; (80067ec ) + 80066dc: 42b0 cmp r0, r6 + 80066de: d060 beq.n 80067a2 + 80066e0: 4e43 ldr r6, [pc, #268] ; (80067f0 ) + 80066e2: 42b0 cmp r0, r6 + 80066e4: d062 beq.n 80067ac + 80066e6: 4e43 ldr r6, [pc, #268] ; (80067f4 ) + 80066e8: 42b0 cmp r0, r6 + 80066ea: d064 beq.n 80067b6 + 80066ec: 4e42 ldr r6, [pc, #264] ; (80067f8 ) + 80066ee: 42b0 cmp r0, r6 + 80066f0: d06b beq.n 80067ca + 80066f2: 4e42 ldr r6, [pc, #264] ; (80067fc ) + 80066f4: 42b0 cmp r0, r6 + 80066f6: d06d beq.n 80067d4 + 80066f8: 4e41 ldr r6, [pc, #260] ; (8006800 ) + 80066fa: 42b0 cmp r0, r6 + 80066fc: d060 beq.n 80067c0 + 80066fe: 4e41 ldr r6, [pc, #260] ; (8006804 ) + 8006700: 42b0 cmp r0, r6 + 8006702: d06c beq.n 80067de + 8006704: 4e40 ldr r6, [pc, #256] ; (8006808 ) + 8006706: 42b0 cmp r0, r6 + 8006708: bf0c ite eq + 800670a: 2609 moveq r6, #9 + 800670c: 260a movne r6, #10 + 800670e: fa06 f303 lsl.w r3, r6, r3 + 8006712: 431a orrs r2, r3 + 8006714: 60ba str r2, [r7, #8] + 8006716: 03e6 lsls r6, r4, #15 + 8006718: f8dc 3000 ldr.w r3, [ip] + 800671c: ea6f 0201 mvn.w r2, r1 + 8006720: f105 0501 add.w r5, r5, #1 + 8006724: bf54 ite pl + 8006726: 4013 andpl r3, r2 + 8006728: 430b orrmi r3, r1 + 800672a: 03a7 lsls r7, r4, #14 + 800672c: f8cc 3000 str.w r3, [ip] + 8006730: f8dc 3004 ldr.w r3, [ip, #4] + 8006734: bf54 ite pl + 8006736: 4013 andpl r3, r2 + 8006738: 430b orrmi r3, r1 + 800673a: 02e6 lsls r6, r4, #11 + 800673c: f8cc 3004 str.w r3, [ip, #4] + 8006740: f8dc 3008 ldr.w r3, [ip, #8] + 8006744: bf54 ite pl + 8006746: 4013 andpl r3, r2 + 8006748: 430b orrmi r3, r1 + 800674a: 02a4 lsls r4, r4, #10 + 800674c: f8cc 3008 str.w r3, [ip, #8] + 8006750: f8dc 300c ldr.w r3, [ip, #12] + 8006754: bf54 ite pl + 8006756: 4013 andpl r3, r2 + 8006758: 430b orrmi r3, r1 + 800675a: 2d10 cmp r5, #16 + 800675c: f8cc 300c str.w r3, [ip, #12] + 8006760: f47f af4a bne.w 80065f8 + 8006764: b003 add sp, #12 + 8006766: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} + 800676a: ea4f 0a45 mov.w sl, r5, lsl #1 + 800676e: 2203 movs r2, #3 + 8006770: f8d0 b000 ldr.w fp, [r0] + 8006774: 3f01 subs r7, #1 + 8006776: ea04 0602 and.w r6, r4, r2 + 800677a: fa02 f20a lsl.w r2, r2, sl + 800677e: 2f01 cmp r7, #1 + 8006780: ea6f 0202 mvn.w r2, r2 + 8006784: fa06 f60a lsl.w r6, r6, sl + 8006788: ea02 0b0b and.w fp, r2, fp + 800678c: ea46 060b orr.w r6, r6, fp + 8006790: 6006 str r6, [r0, #0] + 8006792: f63f af74 bhi.w 800667e + 8006796: e760 b.n 800665a + 8006798: 2601 movs r6, #1 + 800679a: fa06 f303 lsl.w r3, r6, r3 + 800679e: 431a orrs r2, r3 + 80067a0: e7b8 b.n 8006714 + 80067a2: 2602 movs r6, #2 + 80067a4: fa06 f303 lsl.w r3, r6, r3 + 80067a8: 431a orrs r2, r3 + 80067aa: e7b3 b.n 8006714 + 80067ac: 2603 movs r6, #3 + 80067ae: fa06 f303 lsl.w r3, r6, r3 + 80067b2: 431a orrs r2, r3 + 80067b4: e7ae b.n 8006714 + 80067b6: 2604 movs r6, #4 + 80067b8: fa06 f303 lsl.w r3, r6, r3 + 80067bc: 431a orrs r2, r3 + 80067be: e7a9 b.n 8006714 + 80067c0: 2607 movs r6, #7 + 80067c2: fa06 f303 lsl.w r3, r6, r3 + 80067c6: 431a orrs r2, r3 + 80067c8: e7a4 b.n 8006714 + 80067ca: 2605 movs r6, #5 + 80067cc: fa06 f303 lsl.w r3, r6, r3 + 80067d0: 431a orrs r2, r3 + 80067d2: e79f b.n 8006714 + 80067d4: 2606 movs r6, #6 + 80067d6: fa06 f303 lsl.w r3, r6, r3 + 80067da: 431a orrs r2, r3 + 80067dc: e79a b.n 8006714 + 80067de: 2608 movs r6, #8 + 80067e0: fa06 f303 lsl.w r3, r6, r3 + 80067e4: 431a orrs r2, r3 + 80067e6: e795 b.n 8006714 + 80067e8: 40020000 .word 0x40020000 + 80067ec: 40020800 .word 0x40020800 + 80067f0: 40020c00 .word 0x40020c00 + 80067f4: 40021000 .word 0x40021000 + 80067f8: 40021400 .word 0x40021400 + 80067fc: 40021800 .word 0x40021800 + 8006800: 40021c00 .word 0x40021c00 + 8006804: 40022000 .word 0x40022000 + 8006808: 40022400 .word 0x40022400 + 800680c: 40013c00 .word 0x40013c00 + 8006810: 40023800 .word 0x40023800 + +08006814 : + 8006814: b902 cbnz r2, 8006818 + 8006816: 0409 lsls r1, r1, #16 + 8006818: 6181 str r1, [r0, #24] + 800681a: 4770 bx lr + +0800681c : + 800681c: 2800 cmp r0, #0 + 800681e: f000 8134 beq.w 8006a8a + 8006822: 6803 ldr r3, [r0, #0] + 8006824: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} + 8006828: 07dd lsls r5, r3, #31 + 800682a: b082 sub sp, #8 + 800682c: 4604 mov r4, r0 + 800682e: d535 bpl.n 800689c + 8006830: 49ab ldr r1, [pc, #684] ; (8006ae0 ) + 8006832: 688a ldr r2, [r1, #8] + 8006834: f002 020c and.w r2, r2, #12 + 8006838: 2a04 cmp r2, #4 + 800683a: f000 80fe beq.w 8006a3a + 800683e: 688a ldr r2, [r1, #8] + 8006840: f002 020c and.w r2, r2, #12 + 8006844: 2a08 cmp r2, #8 + 8006846: f000 80f4 beq.w 8006a32 + 800684a: 6863 ldr r3, [r4, #4] + 800684c: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 + 8006850: d010 beq.n 8006874 + 8006852: 2b00 cmp r3, #0 + 8006854: f000 811b beq.w 8006a8e + 8006858: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000 + 800685c: 4ba0 ldr r3, [pc, #640] ; (8006ae0 ) + 800685e: 681a ldr r2, [r3, #0] + 8006860: f000 8162 beq.w 8006b28 + 8006864: f422 3280 bic.w r2, r2, #65536 ; 0x10000 + 8006868: 601a str r2, [r3, #0] + 800686a: 681a ldr r2, [r3, #0] + 800686c: f422 2280 bic.w r2, r2, #262144 ; 0x40000 + 8006870: 601a str r2, [r3, #0] + 8006872: e004 b.n 800687e + 8006874: 4a9a ldr r2, [pc, #616] ; (8006ae0 ) + 8006876: 6813 ldr r3, [r2, #0] + 8006878: f443 3380 orr.w r3, r3, #65536 ; 0x10000 + 800687c: 6013 str r3, [r2, #0] + 800687e: f7ff fc69 bl 8006154 + 8006882: 4d97 ldr r5, [pc, #604] ; (8006ae0 ) + 8006884: 4606 mov r6, r0 + 8006886: e005 b.n 8006894 + 8006888: f7ff fc64 bl 8006154 + 800688c: 1b80 subs r0, r0, r6 + 800688e: 2864 cmp r0, #100 ; 0x64 + 8006890: f200 80ee bhi.w 8006a70 + 8006894: 682b ldr r3, [r5, #0] + 8006896: 039a lsls r2, r3, #14 + 8006898: d5f6 bpl.n 8006888 + 800689a: 6823 ldr r3, [r4, #0] + 800689c: 079f lsls r7, r3, #30 + 800689e: d442 bmi.n 8006926 + 80068a0: 071a lsls r2, r3, #28 + 80068a2: d517 bpl.n 80068d4 + 80068a4: 6963 ldr r3, [r4, #20] + 80068a6: 2b00 cmp r3, #0 + 80068a8: f000 80b0 beq.w 8006a0c + 80068ac: 4b8c ldr r3, [pc, #560] ; (8006ae0 ) + 80068ae: 6f5a ldr r2, [r3, #116] ; 0x74 + 80068b0: 461d mov r5, r3 + 80068b2: f042 0201 orr.w r2, r2, #1 + 80068b6: 675a str r2, [r3, #116] ; 0x74 + 80068b8: f7ff fc4c bl 8006154 + 80068bc: 4606 mov r6, r0 + 80068be: e005 b.n 80068cc + 80068c0: f7ff fc48 bl 8006154 + 80068c4: 1b80 subs r0, r0, r6 + 80068c6: 2802 cmp r0, #2 + 80068c8: f200 80d2 bhi.w 8006a70 + 80068cc: 6f6b ldr r3, [r5, #116] ; 0x74 + 80068ce: 079b lsls r3, r3, #30 + 80068d0: d5f6 bpl.n 80068c0 + 80068d2: 6823 ldr r3, [r4, #0] + 80068d4: 075d lsls r5, r3, #29 + 80068d6: d56b bpl.n 80069b0 + 80068d8: 4b81 ldr r3, [pc, #516] ; (8006ae0 ) + 80068da: 6c1a ldr r2, [r3, #64] ; 0x40 + 80068dc: 00d0 lsls r0, r2, #3 + 80068de: f100 80ed bmi.w 8006abc + 80068e2: 6c1a ldr r2, [r3, #64] ; 0x40 + 80068e4: 2501 movs r5, #1 + 80068e6: f042 5280 orr.w r2, r2, #268435456 ; 0x10000000 + 80068ea: 641a str r2, [r3, #64] ; 0x40 + 80068ec: 6c1b ldr r3, [r3, #64] ; 0x40 + 80068ee: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 + 80068f2: 9301 str r3, [sp, #4] + 80068f4: 9b01 ldr r3, [sp, #4] + 80068f6: 4b7b ldr r3, [pc, #492] ; (8006ae4 ) + 80068f8: 681a ldr r2, [r3, #0] + 80068fa: 05d1 lsls r1, r2, #23 + 80068fc: f140 80a7 bpl.w 8006a4e + 8006900: 68a3 ldr r3, [r4, #8] + 8006902: 2b01 cmp r3, #1 + 8006904: d039 beq.n 800697a + 8006906: 2b00 cmp r3, #0 + 8006908: f000 80da beq.w 8006ac0 + 800690c: 2b05 cmp r3, #5 + 800690e: 4b74 ldr r3, [pc, #464] ; (8006ae0 ) + 8006910: 6f1a ldr r2, [r3, #112] ; 0x70 + 8006912: f000 8111 beq.w 8006b38 + 8006916: f022 0201 bic.w r2, r2, #1 + 800691a: 671a str r2, [r3, #112] ; 0x70 + 800691c: 6f1a ldr r2, [r3, #112] ; 0x70 + 800691e: f022 0204 bic.w r2, r2, #4 + 8006922: 671a str r2, [r3, #112] ; 0x70 + 8006924: e02e b.n 8006984 + 8006926: 4a6e ldr r2, [pc, #440] ; (8006ae0 ) + 8006928: 6891 ldr r1, [r2, #8] + 800692a: f011 0f0c tst.w r1, #12 + 800692e: d062 beq.n 80069f6 + 8006930: 6891 ldr r1, [r2, #8] + 8006932: f001 010c and.w r1, r1, #12 + 8006936: 2908 cmp r1, #8 + 8006938: d05a beq.n 80069f0 + 800693a: 68e3 ldr r3, [r4, #12] + 800693c: 2b00 cmp r3, #0 + 800693e: f000 80df beq.w 8006b00 + 8006942: 4b67 ldr r3, [pc, #412] ; (8006ae0 ) + 8006944: 681a ldr r2, [r3, #0] + 8006946: 461d mov r5, r3 + 8006948: f042 0201 orr.w r2, r2, #1 + 800694c: 601a str r2, [r3, #0] + 800694e: f7ff fc01 bl 8006154 + 8006952: 4606 mov r6, r0 + 8006954: e005 b.n 8006962 + 8006956: f7ff fbfd bl 8006154 + 800695a: 1b80 subs r0, r0, r6 + 800695c: 2802 cmp r0, #2 + 800695e: f200 8087 bhi.w 8006a70 + 8006962: 682b ldr r3, [r5, #0] + 8006964: 0798 lsls r0, r3, #30 + 8006966: d5f6 bpl.n 8006956 + 8006968: 682b ldr r3, [r5, #0] + 800696a: 6922 ldr r2, [r4, #16] + 800696c: f023 03f8 bic.w r3, r3, #248 ; 0xf8 + 8006970: ea43 03c2 orr.w r3, r3, r2, lsl #3 + 8006974: 602b str r3, [r5, #0] + 8006976: 6823 ldr r3, [r4, #0] + 8006978: e792 b.n 80068a0 + 800697a: 4a59 ldr r2, [pc, #356] ; (8006ae0 ) + 800697c: 6f13 ldr r3, [r2, #112] ; 0x70 + 800697e: f043 0301 orr.w r3, r3, #1 + 8006982: 6713 str r3, [r2, #112] ; 0x70 + 8006984: f7ff fbe6 bl 8006154 + 8006988: 4e55 ldr r6, [pc, #340] ; (8006ae0 ) + 800698a: 4680 mov r8, r0 + 800698c: f241 3788 movw r7, #5000 ; 0x1388 + 8006990: e005 b.n 800699e + 8006992: f7ff fbdf bl 8006154 + 8006996: eba0 0008 sub.w r0, r0, r8 + 800699a: 42b8 cmp r0, r7 + 800699c: d868 bhi.n 8006a70 + 800699e: 6f33 ldr r3, [r6, #112] ; 0x70 + 80069a0: 079b lsls r3, r3, #30 + 80069a2: d5f6 bpl.n 8006992 + 80069a4: b125 cbz r5, 80069b0 + 80069a6: 4a4e ldr r2, [pc, #312] ; (8006ae0 ) + 80069a8: 6c13 ldr r3, [r2, #64] ; 0x40 + 80069aa: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000 + 80069ae: 6413 str r3, [r2, #64] ; 0x40 + 80069b0: 69a3 ldr r3, [r4, #24] + 80069b2: b1cb cbz r3, 80069e8 + 80069b4: 4a4a ldr r2, [pc, #296] ; (8006ae0 ) + 80069b6: 6891 ldr r1, [r2, #8] + 80069b8: f001 010c and.w r1, r1, #12 + 80069bc: 2908 cmp r1, #8 + 80069be: d021 beq.n 8006a04 + 80069c0: 2b02 cmp r3, #2 + 80069c2: 6813 ldr r3, [r2, #0] + 80069c4: f000 80c0 beq.w 8006b48 + 80069c8: f023 7380 bic.w r3, r3, #16777216 ; 0x1000000 + 80069cc: 4614 mov r4, r2 + 80069ce: 6013 str r3, [r2, #0] + 80069d0: f7ff fbc0 bl 8006154 + 80069d4: 4605 mov r5, r0 + 80069d6: e004 b.n 80069e2 + 80069d8: f7ff fbbc bl 8006154 + 80069dc: 1b40 subs r0, r0, r5 + 80069de: 2802 cmp r0, #2 + 80069e0: d846 bhi.n 8006a70 + 80069e2: 6823 ldr r3, [r4, #0] + 80069e4: 019b lsls r3, r3, #6 + 80069e6: d4f7 bmi.n 80069d8 + 80069e8: 2000 movs r0, #0 + 80069ea: b002 add sp, #8 + 80069ec: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} + 80069f0: 6852 ldr r2, [r2, #4] + 80069f2: 0256 lsls r6, r2, #9 + 80069f4: d4a1 bmi.n 800693a + 80069f6: 4a3a ldr r2, [pc, #232] ; (8006ae0 ) + 80069f8: 6812 ldr r2, [r2, #0] + 80069fa: 0795 lsls r5, r2, #30 + 80069fc: d53c bpl.n 8006a78 + 80069fe: 68e2 ldr r2, [r4, #12] + 8006a00: 2a01 cmp r2, #1 + 8006a02: d039 beq.n 8006a78 + 8006a04: 2001 movs r0, #1 + 8006a06: b002 add sp, #8 + 8006a08: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} + 8006a0c: 4b34 ldr r3, [pc, #208] ; (8006ae0 ) + 8006a0e: 6f5a ldr r2, [r3, #116] ; 0x74 + 8006a10: 461d mov r5, r3 + 8006a12: f022 0201 bic.w r2, r2, #1 + 8006a16: 675a str r2, [r3, #116] ; 0x74 + 8006a18: f7ff fb9c bl 8006154 + 8006a1c: 4606 mov r6, r0 + 8006a1e: e004 b.n 8006a2a + 8006a20: f7ff fb98 bl 8006154 + 8006a24: 1b80 subs r0, r0, r6 + 8006a26: 2802 cmp r0, #2 + 8006a28: d822 bhi.n 8006a70 + 8006a2a: 6f6b ldr r3, [r5, #116] ; 0x74 + 8006a2c: 079f lsls r7, r3, #30 + 8006a2e: d4f7 bmi.n 8006a20 + 8006a30: e74f b.n 80068d2 + 8006a32: 684a ldr r2, [r1, #4] + 8006a34: 0250 lsls r0, r2, #9 + 8006a36: f57f af08 bpl.w 800684a + 8006a3a: 4a29 ldr r2, [pc, #164] ; (8006ae0 ) + 8006a3c: 6812 ldr r2, [r2, #0] + 8006a3e: 0391 lsls r1, r2, #14 + 8006a40: f57f af2c bpl.w 800689c + 8006a44: 6862 ldr r2, [r4, #4] + 8006a46: 2a00 cmp r2, #0 + 8006a48: f47f af28 bne.w 800689c + 8006a4c: e7da b.n 8006a04 + 8006a4e: 681a ldr r2, [r3, #0] + 8006a50: 461e mov r6, r3 + 8006a52: f442 7280 orr.w r2, r2, #256 ; 0x100 + 8006a56: 601a str r2, [r3, #0] + 8006a58: f7ff fb7c bl 8006154 + 8006a5c: 4607 mov r7, r0 + 8006a5e: 6833 ldr r3, [r6, #0] + 8006a60: 05da lsls r2, r3, #23 + 8006a62: f53f af4d bmi.w 8006900 + 8006a66: f7ff fb75 bl 8006154 + 8006a6a: 1bc0 subs r0, r0, r7 + 8006a6c: 2864 cmp r0, #100 ; 0x64 + 8006a6e: d9f6 bls.n 8006a5e + 8006a70: 2003 movs r0, #3 + 8006a72: b002 add sp, #8 + 8006a74: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} + 8006a78: 4919 ldr r1, [pc, #100] ; (8006ae0 ) + 8006a7a: 6920 ldr r0, [r4, #16] + 8006a7c: 680a ldr r2, [r1, #0] + 8006a7e: f022 02f8 bic.w r2, r2, #248 ; 0xf8 + 8006a82: ea42 02c0 orr.w r2, r2, r0, lsl #3 + 8006a86: 600a str r2, [r1, #0] + 8006a88: e70a b.n 80068a0 + 8006a8a: 2001 movs r0, #1 + 8006a8c: 4770 bx lr + 8006a8e: 4b14 ldr r3, [pc, #80] ; (8006ae0 ) + 8006a90: 681a ldr r2, [r3, #0] + 8006a92: 461d mov r5, r3 + 8006a94: f422 3280 bic.w r2, r2, #65536 ; 0x10000 + 8006a98: 601a str r2, [r3, #0] + 8006a9a: 681a ldr r2, [r3, #0] + 8006a9c: f422 2280 bic.w r2, r2, #262144 ; 0x40000 + 8006aa0: 601a str r2, [r3, #0] + 8006aa2: f7ff fb57 bl 8006154 + 8006aa6: 4606 mov r6, r0 + 8006aa8: e004 b.n 8006ab4 + 8006aaa: f7ff fb53 bl 8006154 + 8006aae: 1b80 subs r0, r0, r6 + 8006ab0: 2864 cmp r0, #100 ; 0x64 + 8006ab2: d8dd bhi.n 8006a70 + 8006ab4: 682b ldr r3, [r5, #0] + 8006ab6: 039b lsls r3, r3, #14 + 8006ab8: d4f7 bmi.n 8006aaa + 8006aba: e6ee b.n 800689a + 8006abc: 2500 movs r5, #0 + 8006abe: e71a b.n 80068f6 + 8006ac0: 4b07 ldr r3, [pc, #28] ; (8006ae0 ) + 8006ac2: f241 3888 movw r8, #5000 ; 0x1388 + 8006ac6: 6f1a ldr r2, [r3, #112] ; 0x70 + 8006ac8: 461e mov r6, r3 + 8006aca: f022 0201 bic.w r2, r2, #1 + 8006ace: 671a str r2, [r3, #112] ; 0x70 + 8006ad0: 6f1a ldr r2, [r3, #112] ; 0x70 + 8006ad2: f022 0204 bic.w r2, r2, #4 + 8006ad6: 671a str r2, [r3, #112] ; 0x70 + 8006ad8: f7ff fb3c bl 8006154 + 8006adc: 4607 mov r7, r0 + 8006ade: e008 b.n 8006af2 + 8006ae0: 40023800 .word 0x40023800 + 8006ae4: 40007000 .word 0x40007000 + 8006ae8: f7ff fb34 bl 8006154 + 8006aec: 1bc0 subs r0, r0, r7 + 8006aee: 4540 cmp r0, r8 + 8006af0: d8be bhi.n 8006a70 + 8006af2: 6f33 ldr r3, [r6, #112] ; 0x70 + 8006af4: 0798 lsls r0, r3, #30 + 8006af6: d4f7 bmi.n 8006ae8 + 8006af8: 2d00 cmp r5, #0 + 8006afa: f43f af59 beq.w 80069b0 + 8006afe: e752 b.n 80069a6 + 8006b00: 4b2c ldr r3, [pc, #176] ; (8006bb4 ) + 8006b02: 681a ldr r2, [r3, #0] + 8006b04: 461d mov r5, r3 + 8006b06: f022 0201 bic.w r2, r2, #1 + 8006b0a: 601a str r2, [r3, #0] + 8006b0c: f7ff fb22 bl 8006154 + 8006b10: 4606 mov r6, r0 + 8006b12: e004 b.n 8006b1e + 8006b14: f7ff fb1e bl 8006154 + 8006b18: 1b80 subs r0, r0, r6 + 8006b1a: 2802 cmp r0, #2 + 8006b1c: d8a8 bhi.n 8006a70 + 8006b1e: 682b ldr r3, [r5, #0] + 8006b20: 0799 lsls r1, r3, #30 + 8006b22: d4f7 bmi.n 8006b14 + 8006b24: 6823 ldr r3, [r4, #0] + 8006b26: e6bb b.n 80068a0 + 8006b28: f442 2280 orr.w r2, r2, #262144 ; 0x40000 + 8006b2c: 601a str r2, [r3, #0] + 8006b2e: 681a ldr r2, [r3, #0] + 8006b30: f442 3280 orr.w r2, r2, #65536 ; 0x10000 + 8006b34: 601a str r2, [r3, #0] + 8006b36: e6a2 b.n 800687e + 8006b38: f042 0204 orr.w r2, r2, #4 + 8006b3c: 671a str r2, [r3, #112] ; 0x70 + 8006b3e: 6f1a ldr r2, [r3, #112] ; 0x70 + 8006b40: f042 0201 orr.w r2, r2, #1 + 8006b44: 671a str r2, [r3, #112] ; 0x70 + 8006b46: e71d b.n 8006984 + 8006b48: f023 7380 bic.w r3, r3, #16777216 ; 0x1000000 + 8006b4c: 4615 mov r5, r2 + 8006b4e: 6013 str r3, [r2, #0] + 8006b50: f7ff fb00 bl 8006154 + 8006b54: 4606 mov r6, r0 + 8006b56: e004 b.n 8006b62 + 8006b58: f7ff fafc bl 8006154 + 8006b5c: 1b80 subs r0, r0, r6 + 8006b5e: 2802 cmp r0, #2 + 8006b60: d886 bhi.n 8006a70 + 8006b62: 682b ldr r3, [r5, #0] + 8006b64: 0199 lsls r1, r3, #6 + 8006b66: d4f7 bmi.n 8006b58 + 8006b68: e9d4 3207 ldrd r3, r2, [r4, #28] + 8006b6c: 6a61 ldr r1, [r4, #36] ; 0x24 + 8006b6e: 4313 orrs r3, r2 + 8006b70: e9d4 200a ldrd r2, r0, [r4, #40] ; 0x28 + 8006b74: ea43 1381 orr.w r3, r3, r1, lsl #6 + 8006b78: 6b21 ldr r1, [r4, #48] ; 0x30 + 8006b7a: 0852 lsrs r2, r2, #1 + 8006b7c: 4c0d ldr r4, [pc, #52] ; (8006bb4 ) + 8006b7e: ea43 6300 orr.w r3, r3, r0, lsl #24 + 8006b82: 3a01 subs r2, #1 + 8006b84: ea43 7301 orr.w r3, r3, r1, lsl #28 + 8006b88: ea43 4302 orr.w r3, r3, r2, lsl #16 + 8006b8c: 606b str r3, [r5, #4] + 8006b8e: 682b ldr r3, [r5, #0] + 8006b90: f043 7380 orr.w r3, r3, #16777216 ; 0x1000000 + 8006b94: 602b str r3, [r5, #0] + 8006b96: f7ff fadd bl 8006154 + 8006b9a: 4605 mov r5, r0 + 8006b9c: e005 b.n 8006baa + 8006b9e: f7ff fad9 bl 8006154 + 8006ba2: 1b40 subs r0, r0, r5 + 8006ba4: 2802 cmp r0, #2 + 8006ba6: f63f af63 bhi.w 8006a70 + 8006baa: 6823 ldr r3, [r4, #0] + 8006bac: 019a lsls r2, r3, #6 + 8006bae: d5f6 bpl.n 8006b9e + 8006bb0: e71a b.n 80069e8 + 8006bb2: bf00 nop + 8006bb4: 40023800 .word 0x40023800 + +08006bb8 : + 8006bb8: b178 cbz r0, 8006bda + 8006bba: 4a5e ldr r2, [pc, #376] ; (8006d34 ) + 8006bbc: 6813 ldr r3, [r2, #0] + 8006bbe: f003 030f and.w r3, r3, #15 + 8006bc2: 428b cmp r3, r1 + 8006bc4: d20b bcs.n 8006bde + 8006bc6: 6813 ldr r3, [r2, #0] + 8006bc8: f023 030f bic.w r3, r3, #15 + 8006bcc: 430b orrs r3, r1 + 8006bce: 6013 str r3, [r2, #0] + 8006bd0: 6813 ldr r3, [r2, #0] + 8006bd2: f003 030f and.w r3, r3, #15 + 8006bd6: 428b cmp r3, r1 + 8006bd8: d001 beq.n 8006bde + 8006bda: 2001 movs r0, #1 + 8006bdc: 4770 bx lr + 8006bde: 6803 ldr r3, [r0, #0] + 8006be0: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} + 8006be4: 079d lsls r5, r3, #30 + 8006be6: d514 bpl.n 8006c12 + 8006be8: 075c lsls r4, r3, #29 + 8006bea: d504 bpl.n 8006bf6 + 8006bec: 4c52 ldr r4, [pc, #328] ; (8006d38 ) + 8006bee: 68a2 ldr r2, [r4, #8] + 8006bf0: f442 52e0 orr.w r2, r2, #7168 ; 0x1c00 + 8006bf4: 60a2 str r2, [r4, #8] + 8006bf6: 071a lsls r2, r3, #28 + 8006bf8: d504 bpl.n 8006c04 + 8006bfa: 4c4f ldr r4, [pc, #316] ; (8006d38 ) + 8006bfc: 68a2 ldr r2, [r4, #8] + 8006bfe: f442 4260 orr.w r2, r2, #57344 ; 0xe000 + 8006c02: 60a2 str r2, [r4, #8] + 8006c04: 4c4c ldr r4, [pc, #304] ; (8006d38 ) + 8006c06: 6885 ldr r5, [r0, #8] + 8006c08: 68a2 ldr r2, [r4, #8] + 8006c0a: f022 02f0 bic.w r2, r2, #240 ; 0xf0 + 8006c0e: 432a orrs r2, r5 + 8006c10: 60a2 str r2, [r4, #8] + 8006c12: 07df lsls r7, r3, #31 + 8006c14: 4604 mov r4, r0 + 8006c16: 460d mov r5, r1 + 8006c18: d521 bpl.n 8006c5e + 8006c1a: 6842 ldr r2, [r0, #4] + 8006c1c: 4b46 ldr r3, [pc, #280] ; (8006d38 ) + 8006c1e: 2a01 cmp r2, #1 + 8006c20: 681b ldr r3, [r3, #0] + 8006c22: d063 beq.n 8006cec + 8006c24: 2a02 cmp r2, #2 + 8006c26: d078 beq.n 8006d1a + 8006c28: 0799 lsls r1, r3, #30 + 8006c2a: d528 bpl.n 8006c7e + 8006c2c: 4942 ldr r1, [pc, #264] ; (8006d38 ) + 8006c2e: f241 3888 movw r8, #5000 ; 0x1388 + 8006c32: 688b ldr r3, [r1, #8] + 8006c34: 460e mov r6, r1 + 8006c36: f023 0303 bic.w r3, r3, #3 + 8006c3a: 4313 orrs r3, r2 + 8006c3c: 608b str r3, [r1, #8] + 8006c3e: f7ff fa89 bl 8006154 + 8006c42: 4607 mov r7, r0 + 8006c44: e004 b.n 8006c50 + 8006c46: f7ff fa85 bl 8006154 + 8006c4a: 1bc0 subs r0, r0, r7 + 8006c4c: 4540 cmp r0, r8 + 8006c4e: d862 bhi.n 8006d16 + 8006c50: 68b3 ldr r3, [r6, #8] + 8006c52: 6862 ldr r2, [r4, #4] + 8006c54: f003 030c and.w r3, r3, #12 + 8006c58: ebb3 0f82 cmp.w r3, r2, lsl #2 + 8006c5c: d1f3 bne.n 8006c46 + 8006c5e: 4a35 ldr r2, [pc, #212] ; (8006d34 ) + 8006c60: 6813 ldr r3, [r2, #0] + 8006c62: f003 030f and.w r3, r3, #15 + 8006c66: 42ab cmp r3, r5 + 8006c68: d90c bls.n 8006c84 + 8006c6a: 6813 ldr r3, [r2, #0] + 8006c6c: f023 030f bic.w r3, r3, #15 + 8006c70: 432b orrs r3, r5 + 8006c72: 6013 str r3, [r2, #0] + 8006c74: 6813 ldr r3, [r2, #0] + 8006c76: f003 030f and.w r3, r3, #15 + 8006c7a: 42ab cmp r3, r5 + 8006c7c: d002 beq.n 8006c84 + 8006c7e: 2001 movs r0, #1 + 8006c80: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} + 8006c84: 6823 ldr r3, [r4, #0] + 8006c86: 075a lsls r2, r3, #29 + 8006c88: d506 bpl.n 8006c98 + 8006c8a: 492b ldr r1, [pc, #172] ; (8006d38 ) + 8006c8c: 68e0 ldr r0, [r4, #12] + 8006c8e: 688a ldr r2, [r1, #8] + 8006c90: f422 52e0 bic.w r2, r2, #7168 ; 0x1c00 + 8006c94: 4302 orrs r2, r0 + 8006c96: 608a str r2, [r1, #8] + 8006c98: 071b lsls r3, r3, #28 + 8006c9a: d507 bpl.n 8006cac + 8006c9c: 4a26 ldr r2, [pc, #152] ; (8006d38 ) + 8006c9e: 6921 ldr r1, [r4, #16] + 8006ca0: 6893 ldr r3, [r2, #8] + 8006ca2: f423 4360 bic.w r3, r3, #57344 ; 0xe000 + 8006ca6: ea43 03c1 orr.w r3, r3, r1, lsl #3 + 8006caa: 6093 str r3, [r2, #8] + 8006cac: 4922 ldr r1, [pc, #136] ; (8006d38 ) + 8006cae: 688b ldr r3, [r1, #8] + 8006cb0: f003 030c and.w r3, r3, #12 + 8006cb4: 2b04 cmp r3, #4 + 8006cb6: d01c beq.n 8006cf2 + 8006cb8: 2b08 cmp r3, #8 + 8006cba: d12a bne.n 8006d12 + 8006cbc: 684a ldr r2, [r1, #4] + 8006cbe: 684b ldr r3, [r1, #4] + 8006cc0: f002 023f and.w r2, r2, #63 ; 0x3f + 8006cc4: 6849 ldr r1, [r1, #4] + 8006cc6: f413 0380 ands.w r3, r3, #4194304 ; 0x400000 + 8006cca: d129 bne.n 8006d20 + 8006ccc: 481b ldr r0, [pc, #108] ; (8006d3c ) + 8006cce: f3c1 1188 ubfx r1, r1, #6, #9 + 8006cd2: fba1 0100 umull r0, r1, r1, r0 + 8006cd6: f7f9 fab7 bl 8000248 <__aeabi_uldivmod> + 8006cda: 4b17 ldr r3, [pc, #92] ; (8006d38 ) + 8006cdc: 685b ldr r3, [r3, #4] + 8006cde: f3c3 4301 ubfx r3, r3, #16, #2 + 8006ce2: 3301 adds r3, #1 + 8006ce4: 005b lsls r3, r3, #1 + 8006ce6: fbb0 f3f3 udiv r3, r0, r3 + 8006cea: e003 b.n 8006cf4 + 8006cec: 039e lsls r6, r3, #14 + 8006cee: d49d bmi.n 8006c2c + 8006cf0: e7c5 b.n 8006c7e + 8006cf2: 4b13 ldr r3, [pc, #76] ; (8006d40 ) + 8006cf4: 4a10 ldr r2, [pc, #64] ; (8006d38 ) + 8006cf6: 2000 movs r0, #0 + 8006cf8: 4c12 ldr r4, [pc, #72] ; (8006d44 ) + 8006cfa: 6892 ldr r2, [r2, #8] + 8006cfc: 4912 ldr r1, [pc, #72] ; (8006d48 ) + 8006cfe: f3c2 1203 ubfx r2, r2, #4, #4 + 8006d02: 5ca2 ldrb r2, [r4, r2] + 8006d04: 40d3 lsrs r3, r2 + 8006d06: 600b str r3, [r1, #0] + 8006d08: f7ff f9e8 bl 80060dc + 8006d0c: 2000 movs r0, #0 + 8006d0e: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} + 8006d12: 4b0a ldr r3, [pc, #40] ; (8006d3c ) + 8006d14: e7ee b.n 8006cf4 + 8006d16: 2003 movs r0, #3 + 8006d18: e7b2 b.n 8006c80 + 8006d1a: 0198 lsls r0, r3, #6 + 8006d1c: d486 bmi.n 8006c2c + 8006d1e: e7ae b.n 8006c7e + 8006d20: 4807 ldr r0, [pc, #28] ; (8006d40 ) + 8006d22: f3c1 1188 ubfx r1, r1, #6, #9 + 8006d26: 2300 movs r3, #0 + 8006d28: fba1 0100 umull r0, r1, r1, r0 + 8006d2c: f7f9 fa8c bl 8000248 <__aeabi_uldivmod> + 8006d30: e7d3 b.n 8006cda + 8006d32: bf00 nop + 8006d34: 40023c00 .word 0x40023c00 + 8006d38: 40023800 .word 0x40023800 + 8006d3c: 00f42400 .word 0x00f42400 + 8006d40: 017d7840 .word 0x017d7840 + 8006d44: 0800a490 .word 0x0800a490 + 8006d48: 20000010 .word 0x20000010 + +08006d4c : + 8006d4c: 4916 ldr r1, [pc, #88] ; (8006da8 ) + 8006d4e: b508 push {r3, lr} + 8006d50: 688b ldr r3, [r1, #8] + 8006d52: f003 030c and.w r3, r3, #12 + 8006d56: 2b04 cmp r3, #4 + 8006d58: d01b beq.n 8006d92 + 8006d5a: 2b08 cmp r3, #8 + 8006d5c: d117 bne.n 8006d8e + 8006d5e: 684a ldr r2, [r1, #4] + 8006d60: 684b ldr r3, [r1, #4] + 8006d62: f002 023f and.w r2, r2, #63 ; 0x3f + 8006d66: 6849 ldr r1, [r1, #4] + 8006d68: f413 0380 ands.w r3, r3, #4194304 ; 0x400000 + 8006d6c: d113 bne.n 8006d96 + 8006d6e: 480f ldr r0, [pc, #60] ; (8006dac ) + 8006d70: f3c1 1188 ubfx r1, r1, #6, #9 + 8006d74: fba1 0100 umull r0, r1, r1, r0 + 8006d78: f7f9 fa66 bl 8000248 <__aeabi_uldivmod> + 8006d7c: 4b0a ldr r3, [pc, #40] ; (8006da8 ) + 8006d7e: 685b ldr r3, [r3, #4] + 8006d80: f3c3 4301 ubfx r3, r3, #16, #2 + 8006d84: 3301 adds r3, #1 + 8006d86: 005b lsls r3, r3, #1 + 8006d88: fbb0 f0f3 udiv r0, r0, r3 + 8006d8c: bd08 pop {r3, pc} + 8006d8e: 4807 ldr r0, [pc, #28] ; (8006dac ) + 8006d90: bd08 pop {r3, pc} + 8006d92: 4807 ldr r0, [pc, #28] ; (8006db0 ) + 8006d94: bd08 pop {r3, pc} + 8006d96: 4806 ldr r0, [pc, #24] ; (8006db0 ) + 8006d98: f3c1 1188 ubfx r1, r1, #6, #9 + 8006d9c: 2300 movs r3, #0 + 8006d9e: fba1 0100 umull r0, r1, r1, r0 + 8006da2: f7f9 fa51 bl 8000248 <__aeabi_uldivmod> + 8006da6: e7e9 b.n 8006d7c + 8006da8: 40023800 .word 0x40023800 + 8006dac: 00f42400 .word 0x00f42400 + 8006db0: 017d7840 .word 0x017d7840 + +08006db4 : + 8006db4: 4b04 ldr r3, [pc, #16] ; (8006dc8 ) + 8006db6: 4a05 ldr r2, [pc, #20] ; (8006dcc ) + 8006db8: 689b ldr r3, [r3, #8] + 8006dba: 4905 ldr r1, [pc, #20] ; (8006dd0 ) + 8006dbc: f3c3 2382 ubfx r3, r3, #10, #3 + 8006dc0: 6808 ldr r0, [r1, #0] + 8006dc2: 5cd3 ldrb r3, [r2, r3] + 8006dc4: 40d8 lsrs r0, r3 + 8006dc6: 4770 bx lr + 8006dc8: 40023800 .word 0x40023800 + 8006dcc: 0800a4a0 .word 0x0800a4a0 + 8006dd0: 20000010 .word 0x20000010 + +08006dd4 : + 8006dd4: 4b04 ldr r3, [pc, #16] ; (8006de8 ) + 8006dd6: 4a05 ldr r2, [pc, #20] ; (8006dec ) + 8006dd8: 689b ldr r3, [r3, #8] + 8006dda: 4905 ldr r1, [pc, #20] ; (8006df0 ) + 8006ddc: f3c3 3342 ubfx r3, r3, #13, #3 + 8006de0: 6808 ldr r0, [r1, #0] + 8006de2: 5cd3 ldrb r3, [r2, r3] + 8006de4: 40d8 lsrs r0, r3 + 8006de6: 4770 bx lr + 8006de8: 40023800 .word 0x40023800 + 8006dec: 0800a4a0 .word 0x0800a4a0 + 8006df0: 20000010 .word 0x20000010 + +08006df4 : + 8006df4: 6803 ldr r3, [r0, #0] + 8006df6: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} + 8006dfa: f013 0601 ands.w r6, r3, #1 + 8006dfe: b083 sub sp, #12 + 8006e00: 4604 mov r4, r0 + 8006e02: d00b beq.n 8006e1c + 8006e04: 4a9f ldr r2, [pc, #636] ; (8007084 ) + 8006e06: 6891 ldr r1, [r2, #8] + 8006e08: f421 0100 bic.w r1, r1, #8388608 ; 0x800000 + 8006e0c: 6091 str r1, [r2, #8] + 8006e0e: 6b46 ldr r6, [r0, #52] ; 0x34 + 8006e10: 6891 ldr r1, [r2, #8] + 8006e12: 4331 orrs r1, r6 + 8006e14: fab6 f686 clz r6, r6 + 8006e18: 0976 lsrs r6, r6, #5 + 8006e1a: 6091 str r1, [r2, #8] + 8006e1c: f413 2500 ands.w r5, r3, #524288 ; 0x80000 + 8006e20: d010 beq.n 8006e44 + 8006e22: 4998 ldr r1, [pc, #608] ; (8007084 ) + 8006e24: 6be5 ldr r5, [r4, #60] ; 0x3c + 8006e26: f8d1 208c ldr.w r2, [r1, #140] ; 0x8c + 8006e2a: f5b5 1f80 cmp.w r5, #1048576 ; 0x100000 + 8006e2e: f422 1240 bic.w r2, r2, #3145728 ; 0x300000 + 8006e32: ea42 0205 orr.w r2, r2, r5 + 8006e36: f8c1 208c str.w r2, [r1, #140] ; 0x8c + 8006e3a: f000 81d4 beq.w 80071e6 + 8006e3e: fab5 f585 clz r5, r5 + 8006e42: 096d lsrs r5, r5, #5 + 8006e44: 02d9 lsls r1, r3, #11 + 8006e46: d510 bpl.n 8006e6a + 8006e48: 488e ldr r0, [pc, #568] ; (8007084 ) + 8006e4a: 6c21 ldr r1, [r4, #64] ; 0x40 + 8006e4c: f8d0 208c ldr.w r2, [r0, #140] ; 0x8c + 8006e50: f5b1 0f80 cmp.w r1, #4194304 ; 0x400000 + 8006e54: f422 0240 bic.w r2, r2, #12582912 ; 0xc00000 + 8006e58: ea42 0201 orr.w r2, r2, r1 + 8006e5c: f8c0 208c str.w r2, [r0, #140] ; 0x8c + 8006e60: f000 81bf beq.w 80071e2 + 8006e64: 2900 cmp r1, #0 + 8006e66: bf08 it eq + 8006e68: 2501 moveq r5, #1 + 8006e6a: f013 7f80 tst.w r3, #16777216 ; 0x1000000 + 8006e6e: bf18 it ne + 8006e70: 2601 movne r6, #1 + 8006e72: 069a lsls r2, r3, #26 + 8006e74: f100 816d bmi.w 8007152 + 8006e78: 06da lsls r2, r3, #27 + 8006e7a: d50c bpl.n 8006e96 + 8006e7c: 4a81 ldr r2, [pc, #516] ; (8007084 ) + 8006e7e: f8d2 108c ldr.w r1, [r2, #140] ; 0x8c + 8006e82: f021 7180 bic.w r1, r1, #16777216 ; 0x1000000 + 8006e86: f8c2 108c str.w r1, [r2, #140] ; 0x8c + 8006e8a: f8d2 108c ldr.w r1, [r2, #140] ; 0x8c + 8006e8e: 6ba0 ldr r0, [r4, #56] ; 0x38 + 8006e90: 4301 orrs r1, r0 + 8006e92: f8c2 108c str.w r1, [r2, #140] ; 0x8c + 8006e96: 045f lsls r7, r3, #17 + 8006e98: d508 bpl.n 8006eac + 8006e9a: 497a ldr r1, [pc, #488] ; (8007084 ) + 8006e9c: 6e60 ldr r0, [r4, #100] ; 0x64 + 8006e9e: f8d1 2090 ldr.w r2, [r1, #144] ; 0x90 + 8006ea2: f422 3240 bic.w r2, r2, #196608 ; 0x30000 + 8006ea6: 4302 orrs r2, r0 + 8006ea8: f8c1 2090 str.w r2, [r1, #144] ; 0x90 + 8006eac: 0418 lsls r0, r3, #16 + 8006eae: d508 bpl.n 8006ec2 + 8006eb0: 4974 ldr r1, [pc, #464] ; (8007084 ) + 8006eb2: 6ea0 ldr r0, [r4, #104] ; 0x68 + 8006eb4: f8d1 2090 ldr.w r2, [r1, #144] ; 0x90 + 8006eb8: f422 2240 bic.w r2, r2, #786432 ; 0xc0000 + 8006ebc: 4302 orrs r2, r0 + 8006ebe: f8c1 2090 str.w r2, [r1, #144] ; 0x90 + 8006ec2: 03d9 lsls r1, r3, #15 + 8006ec4: d508 bpl.n 8006ed8 + 8006ec6: 496f ldr r1, [pc, #444] ; (8007084 ) + 8006ec8: 6ee0 ldr r0, [r4, #108] ; 0x6c + 8006eca: f8d1 2090 ldr.w r2, [r1, #144] ; 0x90 + 8006ece: f422 1240 bic.w r2, r2, #3145728 ; 0x300000 + 8006ed2: 4302 orrs r2, r0 + 8006ed4: f8c1 2090 str.w r2, [r1, #144] ; 0x90 + 8006ed8: 039a lsls r2, r3, #14 + 8006eda: d508 bpl.n 8006eee + 8006edc: 4969 ldr r1, [pc, #420] ; (8007084 ) + 8006ede: 6f20 ldr r0, [r4, #112] ; 0x70 + 8006ee0: f8d1 2090 ldr.w r2, [r1, #144] ; 0x90 + 8006ee4: f422 0240 bic.w r2, r2, #12582912 ; 0xc00000 + 8006ee8: 4302 orrs r2, r0 + 8006eea: f8c1 2090 str.w r2, [r1, #144] ; 0x90 + 8006eee: 065f lsls r7, r3, #25 + 8006ef0: d508 bpl.n 8006f04 + 8006ef2: 4964 ldr r1, [pc, #400] ; (8007084 ) + 8006ef4: 6c60 ldr r0, [r4, #68] ; 0x44 + 8006ef6: f8d1 2090 ldr.w r2, [r1, #144] ; 0x90 + 8006efa: f022 0203 bic.w r2, r2, #3 + 8006efe: 4302 orrs r2, r0 + 8006f00: f8c1 2090 str.w r2, [r1, #144] ; 0x90 + 8006f04: 0618 lsls r0, r3, #24 + 8006f06: d508 bpl.n 8006f1a + 8006f08: 495e ldr r1, [pc, #376] ; (8007084 ) + 8006f0a: 6ca0 ldr r0, [r4, #72] ; 0x48 + 8006f0c: f8d1 2090 ldr.w r2, [r1, #144] ; 0x90 + 8006f10: f022 020c bic.w r2, r2, #12 + 8006f14: 4302 orrs r2, r0 + 8006f16: f8c1 2090 str.w r2, [r1, #144] ; 0x90 + 8006f1a: 05d9 lsls r1, r3, #23 + 8006f1c: d508 bpl.n 8006f30 + 8006f1e: 4959 ldr r1, [pc, #356] ; (8007084 ) + 8006f20: 6ce0 ldr r0, [r4, #76] ; 0x4c + 8006f22: f8d1 2090 ldr.w r2, [r1, #144] ; 0x90 + 8006f26: f022 0230 bic.w r2, r2, #48 ; 0x30 + 8006f2a: 4302 orrs r2, r0 + 8006f2c: f8c1 2090 str.w r2, [r1, #144] ; 0x90 + 8006f30: 059a lsls r2, r3, #22 + 8006f32: d508 bpl.n 8006f46 + 8006f34: 4953 ldr r1, [pc, #332] ; (8007084 ) + 8006f36: 6d20 ldr r0, [r4, #80] ; 0x50 + 8006f38: f8d1 2090 ldr.w r2, [r1, #144] ; 0x90 + 8006f3c: f022 02c0 bic.w r2, r2, #192 ; 0xc0 + 8006f40: 4302 orrs r2, r0 + 8006f42: f8c1 2090 str.w r2, [r1, #144] ; 0x90 + 8006f46: 055f lsls r7, r3, #21 + 8006f48: d508 bpl.n 8006f5c + 8006f4a: 494e ldr r1, [pc, #312] ; (8007084 ) + 8006f4c: 6d60 ldr r0, [r4, #84] ; 0x54 + 8006f4e: f8d1 2090 ldr.w r2, [r1, #144] ; 0x90 + 8006f52: f422 7240 bic.w r2, r2, #768 ; 0x300 + 8006f56: 4302 orrs r2, r0 + 8006f58: f8c1 2090 str.w r2, [r1, #144] ; 0x90 + 8006f5c: 0518 lsls r0, r3, #20 + 8006f5e: d508 bpl.n 8006f72 + 8006f60: 4948 ldr r1, [pc, #288] ; (8007084 ) + 8006f62: 6da0 ldr r0, [r4, #88] ; 0x58 + 8006f64: f8d1 2090 ldr.w r2, [r1, #144] ; 0x90 + 8006f68: f422 6240 bic.w r2, r2, #3072 ; 0xc00 + 8006f6c: 4302 orrs r2, r0 + 8006f6e: f8c1 2090 str.w r2, [r1, #144] ; 0x90 + 8006f72: 04d9 lsls r1, r3, #19 + 8006f74: d508 bpl.n 8006f88 + 8006f76: 4943 ldr r1, [pc, #268] ; (8007084 ) + 8006f78: 6de0 ldr r0, [r4, #92] ; 0x5c + 8006f7a: f8d1 2090 ldr.w r2, [r1, #144] ; 0x90 + 8006f7e: f422 5240 bic.w r2, r2, #12288 ; 0x3000 + 8006f82: 4302 orrs r2, r0 + 8006f84: f8c1 2090 str.w r2, [r1, #144] ; 0x90 + 8006f88: 049a lsls r2, r3, #18 + 8006f8a: d508 bpl.n 8006f9e + 8006f8c: 493d ldr r1, [pc, #244] ; (8007084 ) + 8006f8e: 6e20 ldr r0, [r4, #96] ; 0x60 + 8006f90: f8d1 2090 ldr.w r2, [r1, #144] ; 0x90 + 8006f94: f422 4240 bic.w r2, r2, #49152 ; 0xc000 + 8006f98: 4302 orrs r2, r0 + 8006f9a: f8c1 2090 str.w r2, [r1, #144] ; 0x90 + 8006f9e: 025f lsls r7, r3, #9 + 8006fa0: d508 bpl.n 8006fb4 + 8006fa2: 4938 ldr r1, [pc, #224] ; (8007084 ) + 8006fa4: 6fa0 ldr r0, [r4, #120] ; 0x78 + 8006fa6: f8d1 2090 ldr.w r2, [r1, #144] ; 0x90 + 8006faa: f022 6280 bic.w r2, r2, #67108864 ; 0x4000000 + 8006fae: 4302 orrs r2, r0 + 8006fb0: f8c1 2090 str.w r2, [r1, #144] ; 0x90 + 8006fb4: 0298 lsls r0, r3, #10 + 8006fb6: d50c bpl.n 8006fd2 + 8006fb8: 4932 ldr r1, [pc, #200] ; (8007084 ) + 8006fba: 6fe0 ldr r0, [r4, #124] ; 0x7c + 8006fbc: f8d1 2090 ldr.w r2, [r1, #144] ; 0x90 + 8006fc0: f1b0 6f00 cmp.w r0, #134217728 ; 0x8000000 + 8006fc4: f022 6200 bic.w r2, r2, #134217728 ; 0x8000000 + 8006fc8: bf08 it eq + 8006fca: 2501 moveq r5, #1 + 8006fcc: 4302 orrs r2, r0 + 8006fce: f8c1 2090 str.w r2, [r1, #144] ; 0x90 + 8006fd2: f013 0f08 tst.w r3, #8 + 8006fd6: bf18 it ne + 8006fd8: 2501 movne r5, #1 + 8006fda: 0359 lsls r1, r3, #13 + 8006fdc: d508 bpl.n 8006ff0 + 8006fde: 4929 ldr r1, [pc, #164] ; (8007084 ) + 8006fe0: 6f60 ldr r0, [r4, #116] ; 0x74 + 8006fe2: f8d1 2090 ldr.w r2, [r1, #144] ; 0x90 + 8006fe6: f022 7240 bic.w r2, r2, #50331648 ; 0x3000000 + 8006fea: 4302 orrs r2, r0 + 8006fec: f8c1 2090 str.w r2, [r1, #144] ; 0x90 + 8006ff0: 021a lsls r2, r3, #8 + 8006ff2: d509 bpl.n 8007008 + 8006ff4: 4923 ldr r1, [pc, #140] ; (8007084 ) + 8006ff6: f8d4 0080 ldr.w r0, [r4, #128] ; 0x80 + 8006ffa: f8d1 2090 ldr.w r2, [r1, #144] ; 0x90 + 8006ffe: f022 5280 bic.w r2, r2, #268435456 ; 0x10000000 + 8007002: 4302 orrs r2, r0 + 8007004: f8c1 2090 str.w r2, [r1, #144] ; 0x90 + 8007008: 015f lsls r7, r3, #5 + 800700a: d509 bpl.n 8007020 + 800700c: 491d ldr r1, [pc, #116] ; (8007084 ) + 800700e: f8d4 0084 ldr.w r0, [r4, #132] ; 0x84 + 8007012: f8d1 2090 ldr.w r2, [r1, #144] ; 0x90 + 8007016: f022 5200 bic.w r2, r2, #536870912 ; 0x20000000 + 800701a: 4302 orrs r2, r0 + 800701c: f8c1 2090 str.w r2, [r1, #144] ; 0x90 + 8007020: 0118 lsls r0, r3, #4 + 8007022: d509 bpl.n 8007038 + 8007024: 4917 ldr r1, [pc, #92] ; (8007084 ) + 8007026: f8d4 0088 ldr.w r0, [r4, #136] ; 0x88 + 800702a: f8d1 208c ldr.w r2, [r1, #140] ; 0x8c + 800702e: f022 7200 bic.w r2, r2, #33554432 ; 0x2000000 + 8007032: 4302 orrs r2, r0 + 8007034: f8c1 208c str.w r2, [r1, #140] ; 0x8c + 8007038: 00d9 lsls r1, r3, #3 + 800703a: d40b bmi.n 8007054 + 800703c: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 + 8007040: d016 beq.n 8007070 + 8007042: 07f2 lsls r2, r6, #31 + 8007044: d414 bmi.n 8007070 + 8007046: 2d01 cmp r5, #1 + 8007048: f000 80d0 beq.w 80071ec + 800704c: 2000 movs r0, #0 + 800704e: b003 add sp, #12 + 8007050: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} + 8007054: 490b ldr r1, [pc, #44] ; (8007084 ) + 8007056: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 + 800705a: f8d4 008c ldr.w r0, [r4, #140] ; 0x8c + 800705e: f8d1 208c ldr.w r2, [r1, #140] ; 0x8c + 8007062: f022 6280 bic.w r2, r2, #67108864 ; 0x4000000 + 8007066: ea42 0200 orr.w r2, r2, r0 + 800706a: f8c1 208c str.w r2, [r1, #140] ; 0x8c + 800706e: d1e8 bne.n 8007042 + 8007070: 4b04 ldr r3, [pc, #16] ; (8007084 ) + 8007072: 681a ldr r2, [r3, #0] + 8007074: 461e mov r6, r3 + 8007076: f022 6280 bic.w r2, r2, #67108864 ; 0x4000000 + 800707a: 601a str r2, [r3, #0] + 800707c: f7ff f86a bl 8006154 + 8007080: 4607 mov r7, r0 + 8007082: e006 b.n 8007092 + 8007084: 40023800 .word 0x40023800 + 8007088: f7ff f864 bl 8006154 + 800708c: 1bc0 subs r0, r0, r7 + 800708e: 2864 cmp r0, #100 ; 0x64 + 8007090: d85b bhi.n 800714a + 8007092: 6833 ldr r3, [r6, #0] + 8007094: 011b lsls r3, r3, #4 + 8007096: d4f7 bmi.n 8007088 + 8007098: 6823 ldr r3, [r4, #0] + 800709a: 07df lsls r7, r3, #31 + 800709c: d512 bpl.n 80070c4 + 800709e: 6b62 ldr r2, [r4, #52] ; 0x34 + 80070a0: b982 cbnz r2, 80070c4 + 80070a2: f8d6 2084 ldr.w r2, [r6, #132] ; 0x84 + 80070a6: f8d6 7084 ldr.w r7, [r6, #132] ; 0x84 + 80070aa: f402 3240 and.w r2, r2, #196608 ; 0x30000 + 80070ae: 6860 ldr r0, [r4, #4] + 80070b0: f007 6770 and.w r7, r7, #251658240 ; 0xf000000 + 80070b4: 68a1 ldr r1, [r4, #8] + 80070b6: 433a orrs r2, r7 + 80070b8: ea42 1280 orr.w r2, r2, r0, lsl #6 + 80070bc: ea42 7201 orr.w r2, r2, r1, lsl #28 + 80070c0: f8c6 2084 str.w r2, [r6, #132] ; 0x84 + 80070c4: 031e lsls r6, r3, #12 + 80070c6: f100 810f bmi.w 80072e8 + 80070ca: 02d8 lsls r0, r3, #11 + 80070cc: d504 bpl.n 80070d8 + 80070ce: 6c22 ldr r2, [r4, #64] ; 0x40 + 80070d0: f5b2 0f80 cmp.w r2, #4194304 ; 0x400000 + 80070d4: f000 810d beq.w 80072f2 + 80070d8: 01d9 lsls r1, r3, #7 + 80070da: d511 bpl.n 8007100 + 80070dc: 4ea4 ldr r6, [pc, #656] ; (8007370 ) + 80070de: 6860 ldr r0, [r4, #4] + 80070e0: f8d6 2084 ldr.w r2, [r6, #132] ; 0x84 + 80070e4: f8d6 7084 ldr.w r7, [r6, #132] ; 0x84 + 80070e8: f002 6270 and.w r2, r2, #251658240 ; 0xf000000 + 80070ec: 6921 ldr r1, [r4, #16] + 80070ee: f007 47e0 and.w r7, r7, #1879048192 ; 0x70000000 + 80070f2: 433a orrs r2, r7 + 80070f4: ea42 1280 orr.w r2, r2, r0, lsl #6 + 80070f8: ea42 4201 orr.w r2, r2, r1, lsl #16 + 80070fc: f8c6 2084 str.w r2, [r6, #132] ; 0x84 + 8007100: 019a lsls r2, r3, #6 + 8007102: d50d bpl.n 8007120 + 8007104: 6923 ldr r3, [r4, #16] + 8007106: 6862 ldr r2, [r4, #4] + 8007108: 041b lsls r3, r3, #16 + 800710a: e9d4 1002 ldrd r1, r0, [r4, #8] + 800710e: ea43 1382 orr.w r3, r3, r2, lsl #6 + 8007112: 4a97 ldr r2, [pc, #604] ; (8007370 ) + 8007114: ea43 6300 orr.w r3, r3, r0, lsl #24 + 8007118: ea43 7301 orr.w r3, r3, r1, lsl #28 + 800711c: f8c2 3084 str.w r3, [r2, #132] ; 0x84 + 8007120: 4b93 ldr r3, [pc, #588] ; (8007370 ) + 8007122: 681a ldr r2, [r3, #0] + 8007124: 461e mov r6, r3 + 8007126: f042 6280 orr.w r2, r2, #67108864 ; 0x4000000 + 800712a: 601a str r2, [r3, #0] + 800712c: f7ff f812 bl 8006154 + 8007130: 4607 mov r7, r0 + 8007132: e004 b.n 800713e + 8007134: f7ff f80e bl 8006154 + 8007138: 1bc0 subs r0, r0, r7 + 800713a: 2864 cmp r0, #100 ; 0x64 + 800713c: d805 bhi.n 800714a + 800713e: 6833 ldr r3, [r6, #0] + 8007140: 011b lsls r3, r3, #4 + 8007142: d5f7 bpl.n 8007134 + 8007144: 2d01 cmp r5, #1 + 8007146: d181 bne.n 800704c + 8007148: e050 b.n 80071ec + 800714a: 2003 movs r0, #3 + 800714c: b003 add sp, #12 + 800714e: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} + 8007152: 4a87 ldr r2, [pc, #540] ; (8007370 ) + 8007154: 4b87 ldr r3, [pc, #540] ; (8007374 ) + 8007156: 6c11 ldr r1, [r2, #64] ; 0x40 + 8007158: 461f mov r7, r3 + 800715a: f041 5180 orr.w r1, r1, #268435456 ; 0x10000000 + 800715e: 6411 str r1, [r2, #64] ; 0x40 + 8007160: 6c12 ldr r2, [r2, #64] ; 0x40 + 8007162: f002 5280 and.w r2, r2, #268435456 ; 0x10000000 + 8007166: 9201 str r2, [sp, #4] + 8007168: 9a01 ldr r2, [sp, #4] + 800716a: 681a ldr r2, [r3, #0] + 800716c: f442 7280 orr.w r2, r2, #256 ; 0x100 + 8007170: 601a str r2, [r3, #0] + 8007172: f7fe ffef bl 8006154 + 8007176: 4680 mov r8, r0 + 8007178: e005 b.n 8007186 + 800717a: f7fe ffeb bl 8006154 + 800717e: eba0 0008 sub.w r0, r0, r8 + 8007182: 2864 cmp r0, #100 ; 0x64 + 8007184: d8e1 bhi.n 800714a + 8007186: 683b ldr r3, [r7, #0] + 8007188: 05db lsls r3, r3, #23 + 800718a: d5f6 bpl.n 800717a + 800718c: 4a78 ldr r2, [pc, #480] ; (8007370 ) + 800718e: 6b23 ldr r3, [r4, #48] ; 0x30 + 8007190: 6f11 ldr r1, [r2, #112] ; 0x70 + 8007192: f403 7040 and.w r0, r3, #768 ; 0x300 + 8007196: f411 7140 ands.w r1, r1, #768 ; 0x300 + 800719a: d011 beq.n 80071c0 + 800719c: 4281 cmp r1, r0 + 800719e: d00f beq.n 80071c0 + 80071a0: 6f11 ldr r1, [r2, #112] ; 0x70 + 80071a2: 6f17 ldr r7, [r2, #112] ; 0x70 + 80071a4: f421 7140 bic.w r1, r1, #768 ; 0x300 + 80071a8: f447 3780 orr.w r7, r7, #65536 ; 0x10000 + 80071ac: 6717 str r7, [r2, #112] ; 0x70 + 80071ae: 6f17 ldr r7, [r2, #112] ; 0x70 + 80071b0: f427 3780 bic.w r7, r7, #65536 ; 0x10000 + 80071b4: 6717 str r7, [r2, #112] ; 0x70 + 80071b6: 6711 str r1, [r2, #112] ; 0x70 + 80071b8: 6f11 ldr r1, [r2, #112] ; 0x70 + 80071ba: 07cf lsls r7, r1, #31 + 80071bc: f100 80c3 bmi.w 8007346 + 80071c0: f5b0 7f40 cmp.w r0, #768 ; 0x300 + 80071c4: f000 80b1 beq.w 800732a + 80071c8: 4969 ldr r1, [pc, #420] ; (8007370 ) + 80071ca: 688a ldr r2, [r1, #8] + 80071cc: f422 12f8 bic.w r2, r2, #2031616 ; 0x1f0000 + 80071d0: 608a str r2, [r1, #8] + 80071d2: 4a67 ldr r2, [pc, #412] ; (8007370 ) + 80071d4: f3c3 030b ubfx r3, r3, #0, #12 + 80071d8: 6f11 ldr r1, [r2, #112] ; 0x70 + 80071da: 430b orrs r3, r1 + 80071dc: 6713 str r3, [r2, #112] ; 0x70 + 80071de: 6823 ldr r3, [r4, #0] + 80071e0: e64a b.n 8006e78 + 80071e2: 2601 movs r6, #1 + 80071e4: e641 b.n 8006e6a + 80071e6: 2500 movs r5, #0 + 80071e8: 2601 movs r6, #1 + 80071ea: e62b b.n 8006e44 + 80071ec: 4b60 ldr r3, [pc, #384] ; (8007370 ) + 80071ee: 681a ldr r2, [r3, #0] + 80071f0: 461d mov r5, r3 + 80071f2: f022 5280 bic.w r2, r2, #268435456 ; 0x10000000 + 80071f6: 601a str r2, [r3, #0] + 80071f8: f7fe ffac bl 8006154 + 80071fc: 4606 mov r6, r0 + 80071fe: e004 b.n 800720a + 8007200: f7fe ffa8 bl 8006154 + 8007204: 1b80 subs r0, r0, r6 + 8007206: 2864 cmp r0, #100 ; 0x64 + 8007208: d89f bhi.n 800714a + 800720a: 682b ldr r3, [r5, #0] + 800720c: 009f lsls r7, r3, #2 + 800720e: d4f7 bmi.n 8007200 + 8007210: 6823 ldr r3, [r4, #0] + 8007212: 031d lsls r5, r3, #12 + 8007214: f100 8092 bmi.w 800733c + 8007218: 02d8 lsls r0, r3, #11 + 800721a: d51d bpl.n 8007258 + 800721c: 6c22 ldr r2, [r4, #64] ; 0x40 + 800721e: b9da cbnz r2, 8007258 + 8007220: 4953 ldr r1, [pc, #332] ; (8007370 ) + 8007222: 6965 ldr r5, [r4, #20] + 8007224: f8d1 2088 ldr.w r2, [r1, #136] ; 0x88 + 8007228: f8d1 6088 ldr.w r6, [r1, #136] ; 0x88 + 800722c: f402 3240 and.w r2, r2, #196608 ; 0x30000 + 8007230: 69a0 ldr r0, [r4, #24] + 8007232: f006 46e0 and.w r6, r6, #1879048192 ; 0x70000000 + 8007236: 4332 orrs r2, r6 + 8007238: ea42 1285 orr.w r2, r2, r5, lsl #6 + 800723c: ea42 6200 orr.w r2, r2, r0, lsl #24 + 8007240: f8c1 2088 str.w r2, [r1, #136] ; 0x88 + 8007244: f8d1 208c ldr.w r2, [r1, #140] ; 0x8c + 8007248: 6aa0 ldr r0, [r4, #40] ; 0x28 + 800724a: f422 52f8 bic.w r2, r2, #7936 ; 0x1f00 + 800724e: 3801 subs r0, #1 + 8007250: ea42 2200 orr.w r2, r2, r0, lsl #8 + 8007254: f8c1 208c str.w r2, [r1, #140] ; 0x8c + 8007258: 0299 lsls r1, r3, #10 + 800725a: d515 bpl.n 8007288 + 800725c: 6fe2 ldr r2, [r4, #124] ; 0x7c + 800725e: f1b2 6f00 cmp.w r2, #134217728 ; 0x8000000 + 8007262: d111 bne.n 8007288 + 8007264: 4942 ldr r1, [pc, #264] ; (8007370 ) + 8007266: 6965 ldr r5, [r4, #20] + 8007268: f8d1 2088 ldr.w r2, [r1, #136] ; 0x88 + 800726c: f8d1 6088 ldr.w r6, [r1, #136] ; 0x88 + 8007270: f002 6270 and.w r2, r2, #251658240 ; 0xf000000 + 8007274: 6a20 ldr r0, [r4, #32] + 8007276: f006 46e0 and.w r6, r6, #1879048192 ; 0x70000000 + 800727a: 4332 orrs r2, r6 + 800727c: ea42 1285 orr.w r2, r2, r5, lsl #6 + 8007280: ea42 4200 orr.w r2, r2, r0, lsl #16 + 8007284: f8c1 2088 str.w r2, [r1, #136] ; 0x88 + 8007288: 071a lsls r2, r3, #28 + 800728a: d519 bpl.n 80072c0 + 800728c: 4a38 ldr r2, [pc, #224] ; (8007370 ) + 800728e: 6965 ldr r5, [r4, #20] + 8007290: f8d2 1088 ldr.w r1, [r2, #136] ; 0x88 + 8007294: f8d2 3088 ldr.w r3, [r2, #136] ; 0x88 + 8007298: f001 6170 and.w r1, r1, #251658240 ; 0xf000000 + 800729c: 69e0 ldr r0, [r4, #28] + 800729e: f403 3340 and.w r3, r3, #196608 ; 0x30000 + 80072a2: 430b orrs r3, r1 + 80072a4: ea43 1385 orr.w r3, r3, r5, lsl #6 + 80072a8: ea43 7300 orr.w r3, r3, r0, lsl #28 + 80072ac: f8c2 3088 str.w r3, [r2, #136] ; 0x88 + 80072b0: f8d2 308c ldr.w r3, [r2, #140] ; 0x8c + 80072b4: 6ae1 ldr r1, [r4, #44] ; 0x2c + 80072b6: f423 3340 bic.w r3, r3, #196608 ; 0x30000 + 80072ba: 430b orrs r3, r1 + 80072bc: f8c2 308c str.w r3, [r2, #140] ; 0x8c + 80072c0: 4b2b ldr r3, [pc, #172] ; (8007370 ) + 80072c2: 681a ldr r2, [r3, #0] + 80072c4: 461c mov r4, r3 + 80072c6: f042 5280 orr.w r2, r2, #268435456 ; 0x10000000 + 80072ca: 601a str r2, [r3, #0] + 80072cc: f7fe ff42 bl 8006154 + 80072d0: 4605 mov r5, r0 + 80072d2: e005 b.n 80072e0 + 80072d4: f7fe ff3e bl 8006154 + 80072d8: 1b40 subs r0, r0, r5 + 80072da: 2864 cmp r0, #100 ; 0x64 + 80072dc: f63f af35 bhi.w 800714a + 80072e0: 6823 ldr r3, [r4, #0] + 80072e2: 009b lsls r3, r3, #2 + 80072e4: d5f6 bpl.n 80072d4 + 80072e6: e6b1 b.n 800704c + 80072e8: 6be2 ldr r2, [r4, #60] ; 0x3c + 80072ea: f5b2 1f80 cmp.w r2, #1048576 ; 0x100000 + 80072ee: f47f aeec bne.w 80070ca + 80072f2: 4e1f ldr r6, [pc, #124] ; (8007370 ) + 80072f4: 6860 ldr r0, [r4, #4] + 80072f6: f8d6 2084 ldr.w r2, [r6, #132] ; 0x84 + 80072fa: f8d6 7084 ldr.w r7, [r6, #132] ; 0x84 + 80072fe: f402 3240 and.w r2, r2, #196608 ; 0x30000 + 8007302: 68e1 ldr r1, [r4, #12] + 8007304: f007 47e0 and.w r7, r7, #1879048192 ; 0x70000000 + 8007308: 433a orrs r2, r7 + 800730a: ea42 1280 orr.w r2, r2, r0, lsl #6 + 800730e: ea42 6201 orr.w r2, r2, r1, lsl #24 + 8007312: f8c6 2084 str.w r2, [r6, #132] ; 0x84 + 8007316: f8d6 108c ldr.w r1, [r6, #140] ; 0x8c + 800731a: 6a62 ldr r2, [r4, #36] ; 0x24 + 800731c: f021 011f bic.w r1, r1, #31 + 8007320: 3a01 subs r2, #1 + 8007322: 430a orrs r2, r1 + 8007324: f8c6 208c str.w r2, [r6, #140] ; 0x8c + 8007328: e6d6 b.n 80070d8 + 800732a: 4811 ldr r0, [pc, #68] ; (8007370 ) + 800732c: 4912 ldr r1, [pc, #72] ; (8007378 ) + 800732e: 6882 ldr r2, [r0, #8] + 8007330: 4019 ands r1, r3 + 8007332: f422 12f8 bic.w r2, r2, #2031616 ; 0x1f0000 + 8007336: 430a orrs r2, r1 + 8007338: 6082 str r2, [r0, #8] + 800733a: e74a b.n 80071d2 + 800733c: 6be2 ldr r2, [r4, #60] ; 0x3c + 800733e: 2a00 cmp r2, #0 + 8007340: f43f af6e beq.w 8007220 + 8007344: e768 b.n 8007218 + 8007346: 4617 mov r7, r2 + 8007348: f241 3888 movw r8, #5000 ; 0x1388 + 800734c: f7fe ff02 bl 8006154 + 8007350: 4681 mov r9, r0 + 8007352: e006 b.n 8007362 + 8007354: f7fe fefe bl 8006154 + 8007358: eba0 0009 sub.w r0, r0, r9 + 800735c: 4540 cmp r0, r8 + 800735e: f63f aef4 bhi.w 800714a + 8007362: 6f3b ldr r3, [r7, #112] ; 0x70 + 8007364: 0799 lsls r1, r3, #30 + 8007366: d5f5 bpl.n 8007354 + 8007368: 6b23 ldr r3, [r4, #48] ; 0x30 + 800736a: f403 7040 and.w r0, r3, #768 ; 0x300 + 800736e: e727 b.n 80071c0 + 8007370: 40023800 .word 0x40023800 + 8007374: 40007000 .word 0x40007000 + 8007378: 0ffffcff .word 0x0ffffcff + +0800737c : + 800737c: 2800 cmp r0, #0 + 800737e: d065 beq.n 800744c + 8007380: b5f8 push {r3, r4, r5, r6, r7, lr} + 8007382: f890 303d ldrb.w r3, [r0, #61] ; 0x3d + 8007386: 4604 mov r4, r0 + 8007388: f003 02ff and.w r2, r3, #255 ; 0xff + 800738c: 2b00 cmp r3, #0 + 800738e: d03b beq.n 8007408 + 8007390: 6822 ldr r2, [r4, #0] + 8007392: 2002 movs r0, #2 + 8007394: 4e36 ldr r6, [pc, #216] ; (8007470 ) + 8007396: 4f37 ldr r7, [pc, #220] ; (8007474 ) + 8007398: f1b2 4f80 cmp.w r2, #1073741824 ; 0x40000000 + 800739c: eba2 0606 sub.w r6, r2, r6 + 80073a0: f884 003d strb.w r0, [r4, #61] ; 0x3d + 80073a4: eba2 0707 sub.w r7, r2, r7 + 80073a8: 6813 ldr r3, [r2, #0] + 80073aa: fab6 f686 clz r6, r6 + 80073ae: fab7 f787 clz r7, r7 + 80073b2: ea4f 1656 mov.w r6, r6, lsr #5 + 80073b6: ea4f 1757 mov.w r7, r7, lsr #5 + 80073ba: d02a beq.n 8007412 + 80073bc: bb4e cbnz r6, 8007412 + 80073be: 492e ldr r1, [pc, #184] ; (8007478 ) + 80073c0: 428a cmp r2, r1 + 80073c2: d045 beq.n 8007450 + 80073c4: f501 6180 add.w r1, r1, #1024 ; 0x400 + 80073c8: 428a cmp r2, r1 + 80073ca: d041 beq.n 8007450 + 80073cc: f501 6180 add.w r1, r1, #1024 ; 0x400 + 80073d0: 428a cmp r2, r1 + 80073d2: d042 beq.n 800745a + 80073d4: 2f00 cmp r7, #0 + 80073d6: d140 bne.n 800745a + 80073d8: 4928 ldr r1, [pc, #160] ; (800747c ) + 80073da: 428a cmp r2, r1 + 80073dc: d01e beq.n 800741c + 80073de: f501 6180 add.w r1, r1, #1024 ; 0x400 + 80073e2: 428a cmp r2, r1 + 80073e4: d01a beq.n 800741c + 80073e6: f501 6180 add.w r1, r1, #1024 ; 0x400 + 80073ea: 428a cmp r2, r1 + 80073ec: d016 beq.n 800741c + 80073ee: f5a1 3198 sub.w r1, r1, #77824 ; 0x13000 + 80073f2: 428a cmp r2, r1 + 80073f4: d012 beq.n 800741c + 80073f6: f501 6180 add.w r1, r1, #1024 ; 0x400 + 80073fa: 428a cmp r2, r1 + 80073fc: d00e beq.n 800741c + 80073fe: f501 6180 add.w r1, r1, #1024 ; 0x400 + 8007402: 428a cmp r2, r1 + 8007404: d10e bne.n 8007424 + 8007406: e009 b.n 800741c + 8007408: f880 203c strb.w r2, [r0, #60] ; 0x3c + 800740c: f7fe fc64 bl 8005cd8 + 8007410: e7be b.n 8007390 + 8007412: f023 0570 bic.w r5, r3, #112 ; 0x70 + 8007416: 68a0 ldr r0, [r4, #8] + 8007418: ea45 0300 orr.w r3, r5, r0 + 800741c: f423 7340 bic.w r3, r3, #768 ; 0x300 + 8007420: 6920 ldr r0, [r4, #16] + 8007422: 4303 orrs r3, r0 + 8007424: 69a1 ldr r1, [r4, #24] + 8007426: f023 0380 bic.w r3, r3, #128 ; 0x80 + 800742a: 68e0 ldr r0, [r4, #12] + 800742c: 430b orrs r3, r1 + 800742e: 6861 ldr r1, [r4, #4] + 8007430: 6013 str r3, [r2, #0] + 8007432: 62d0 str r0, [r2, #44] ; 0x2c + 8007434: 6291 str r1, [r2, #40] ; 0x28 + 8007436: b936 cbnz r6, 8007446 + 8007438: b92f cbnz r7, 8007446 + 800743a: 2301 movs r3, #1 + 800743c: 2000 movs r0, #0 + 800743e: 6153 str r3, [r2, #20] + 8007440: f884 303d strb.w r3, [r4, #61] ; 0x3d + 8007444: bdf8 pop {r3, r4, r5, r6, r7, pc} + 8007446: 6963 ldr r3, [r4, #20] + 8007448: 6313 str r3, [r2, #48] ; 0x30 + 800744a: e7f6 b.n 800743a + 800744c: 2001 movs r0, #1 + 800744e: 4770 bx lr + 8007450: f023 0370 bic.w r3, r3, #112 ; 0x70 + 8007454: 68a1 ldr r1, [r4, #8] + 8007456: 430b orrs r3, r1 + 8007458: e7e0 b.n 800741c + 800745a: 4909 ldr r1, [pc, #36] ; (8007480 ) + 800745c: f023 0370 bic.w r3, r3, #112 ; 0x70 + 8007460: 68a0 ldr r0, [r4, #8] + 8007462: 428a cmp r2, r1 + 8007464: ea43 0300 orr.w r3, r3, r0 + 8007468: d0d8 beq.n 800741c + 800746a: 2f00 cmp r7, #0 + 800746c: d1d6 bne.n 800741c + 800746e: e7b3 b.n 80073d8 + 8007470: 40010000 .word 0x40010000 + 8007474: 40010400 .word 0x40010400 + 8007478: 40000400 .word 0x40000400 + 800747c: 40014000 .word 0x40014000 + 8007480: 40000c00 .word 0x40000c00 + +08007484 : + 8007484: 4770 bx lr + 8007486: bf00 nop + +08007488 : + 8007488: 2800 cmp r0, #0 + 800748a: d065 beq.n 8007558 + 800748c: b5f8 push {r3, r4, r5, r6, r7, lr} + 800748e: f890 303d ldrb.w r3, [r0, #61] ; 0x3d + 8007492: 4604 mov r4, r0 + 8007494: f003 02ff and.w r2, r3, #255 ; 0xff + 8007498: 2b00 cmp r3, #0 + 800749a: d03b beq.n 8007514 + 800749c: 6822 ldr r2, [r4, #0] + 800749e: 2002 movs r0, #2 + 80074a0: 4e36 ldr r6, [pc, #216] ; (800757c ) + 80074a2: 4f37 ldr r7, [pc, #220] ; (8007580 ) + 80074a4: f1b2 4f80 cmp.w r2, #1073741824 ; 0x40000000 + 80074a8: eba2 0606 sub.w r6, r2, r6 + 80074ac: f884 003d strb.w r0, [r4, #61] ; 0x3d + 80074b0: eba2 0707 sub.w r7, r2, r7 + 80074b4: 6813 ldr r3, [r2, #0] + 80074b6: fab6 f686 clz r6, r6 + 80074ba: fab7 f787 clz r7, r7 + 80074be: ea4f 1656 mov.w r6, r6, lsr #5 + 80074c2: ea4f 1757 mov.w r7, r7, lsr #5 + 80074c6: d02a beq.n 800751e + 80074c8: bb4e cbnz r6, 800751e + 80074ca: 492e ldr r1, [pc, #184] ; (8007584 ) + 80074cc: 428a cmp r2, r1 + 80074ce: d045 beq.n 800755c + 80074d0: f501 6180 add.w r1, r1, #1024 ; 0x400 + 80074d4: 428a cmp r2, r1 + 80074d6: d041 beq.n 800755c + 80074d8: f501 6180 add.w r1, r1, #1024 ; 0x400 + 80074dc: 428a cmp r2, r1 + 80074de: d042 beq.n 8007566 + 80074e0: 2f00 cmp r7, #0 + 80074e2: d140 bne.n 8007566 + 80074e4: 4928 ldr r1, [pc, #160] ; (8007588 ) + 80074e6: 428a cmp r2, r1 + 80074e8: d01e beq.n 8007528 + 80074ea: f501 6180 add.w r1, r1, #1024 ; 0x400 + 80074ee: 428a cmp r2, r1 + 80074f0: d01a beq.n 8007528 + 80074f2: f501 6180 add.w r1, r1, #1024 ; 0x400 + 80074f6: 428a cmp r2, r1 + 80074f8: d016 beq.n 8007528 + 80074fa: f5a1 3198 sub.w r1, r1, #77824 ; 0x13000 + 80074fe: 428a cmp r2, r1 + 8007500: d012 beq.n 8007528 + 8007502: f501 6180 add.w r1, r1, #1024 ; 0x400 + 8007506: 428a cmp r2, r1 + 8007508: d00e beq.n 8007528 + 800750a: f501 6180 add.w r1, r1, #1024 ; 0x400 + 800750e: 428a cmp r2, r1 + 8007510: d10e bne.n 8007530 + 8007512: e009 b.n 8007528 + 8007514: f880 203c strb.w r2, [r0, #60] ; 0x3c + 8007518: f7ff ffb4 bl 8007484 + 800751c: e7be b.n 800749c + 800751e: f023 0570 bic.w r5, r3, #112 ; 0x70 + 8007522: 68a0 ldr r0, [r4, #8] + 8007524: ea45 0300 orr.w r3, r5, r0 + 8007528: f423 7340 bic.w r3, r3, #768 ; 0x300 + 800752c: 6920 ldr r0, [r4, #16] + 800752e: 4303 orrs r3, r0 + 8007530: 69a1 ldr r1, [r4, #24] + 8007532: f023 0380 bic.w r3, r3, #128 ; 0x80 + 8007536: 68e0 ldr r0, [r4, #12] + 8007538: 430b orrs r3, r1 + 800753a: 6861 ldr r1, [r4, #4] + 800753c: 6013 str r3, [r2, #0] + 800753e: 62d0 str r0, [r2, #44] ; 0x2c + 8007540: 6291 str r1, [r2, #40] ; 0x28 + 8007542: b936 cbnz r6, 8007552 + 8007544: b92f cbnz r7, 8007552 + 8007546: 2301 movs r3, #1 + 8007548: 2000 movs r0, #0 + 800754a: 6153 str r3, [r2, #20] + 800754c: f884 303d strb.w r3, [r4, #61] ; 0x3d + 8007550: bdf8 pop {r3, r4, r5, r6, r7, pc} + 8007552: 6963 ldr r3, [r4, #20] + 8007554: 6313 str r3, [r2, #48] ; 0x30 + 8007556: e7f6 b.n 8007546 + 8007558: 2001 movs r0, #1 + 800755a: 4770 bx lr + 800755c: f023 0370 bic.w r3, r3, #112 ; 0x70 + 8007560: 68a1 ldr r1, [r4, #8] + 8007562: 430b orrs r3, r1 + 8007564: e7e0 b.n 8007528 + 8007566: 4909 ldr r1, [pc, #36] ; (800758c ) + 8007568: f023 0370 bic.w r3, r3, #112 ; 0x70 + 800756c: 68a0 ldr r0, [r4, #8] + 800756e: 428a cmp r2, r1 + 8007570: ea43 0300 orr.w r3, r3, r0 + 8007574: d0d8 beq.n 8007528 + 8007576: 2f00 cmp r7, #0 + 8007578: d1d6 bne.n 8007528 + 800757a: e7b3 b.n 80074e4 + 800757c: 40010000 .word 0x40010000 + 8007580: 40010400 .word 0x40010400 + 8007584: 40000400 .word 0x40000400 + 8007588: 40014000 .word 0x40014000 + 800758c: 40000c00 .word 0x40000c00 + +08007590 : + 8007590: 2800 cmp r0, #0 + 8007592: f000 809f beq.w 80076d4 + 8007596: f890 303d ldrb.w r3, [r0, #61] ; 0x3d + 800759a: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} + 800759e: f003 02ff and.w r2, r3, #255 ; 0xff + 80075a2: 4605 mov r5, r0 + 80075a4: 460e mov r6, r1 + 80075a6: 2b00 cmp r3, #0 + 80075a8: f000 808c beq.w 80076c4 + 80075ac: 682b ldr r3, [r5, #0] + 80075ae: 2102 movs r1, #2 + 80075b0: 4f4f ldr r7, [pc, #316] ; (80076f0 ) + 80075b2: 4c50 ldr r4, [pc, #320] ; (80076f4 ) + 80075b4: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 + 80075b8: f885 103d strb.w r1, [r5, #61] ; 0x3d + 80075bc: eba3 0707 sub.w r7, r3, r7 + 80075c0: 6899 ldr r1, [r3, #8] + 80075c2: eba3 0404 sub.w r4, r3, r4 + 80075c6: 4a4c ldr r2, [pc, #304] ; (80076f8 ) + 80075c8: fab7 f787 clz r7, r7 + 80075cc: fab4 f484 clz r4, r4 + 80075d0: ea02 0201 and.w r2, r2, r1 + 80075d4: ea4f 1757 mov.w r7, r7, lsr #5 + 80075d8: ea4f 1454 mov.w r4, r4, lsr #5 + 80075dc: 609a str r2, [r3, #8] + 80075de: 681a ldr r2, [r3, #0] + 80075e0: d025 beq.n 800762e + 80075e2: bb27 cbnz r7, 800762e + 80075e4: 4945 ldr r1, [pc, #276] ; (80076fc ) + 80075e6: 428b cmp r3, r1 + 80075e8: d021 beq.n 800762e + 80075ea: f501 6180 add.w r1, r1, #1024 ; 0x400 + 80075ee: 428b cmp r3, r1 + 80075f0: d01d beq.n 800762e + 80075f2: f501 6180 add.w r1, r1, #1024 ; 0x400 + 80075f6: 428b cmp r3, r1 + 80075f8: d06e beq.n 80076d8 + 80075fa: 2c00 cmp r4, #0 + 80075fc: d16c bne.n 80076d8 + 80075fe: 4940 ldr r1, [pc, #256] ; (8007700 ) + 8007600: 428b cmp r3, r1 + 8007602: d018 beq.n 8007636 + 8007604: f501 6180 add.w r1, r1, #1024 ; 0x400 + 8007608: 428b cmp r3, r1 + 800760a: d014 beq.n 8007636 + 800760c: f501 6180 add.w r1, r1, #1024 ; 0x400 + 8007610: 428b cmp r3, r1 + 8007612: d010 beq.n 8007636 + 8007614: f5a1 3198 sub.w r1, r1, #77824 ; 0x13000 + 8007618: 428b cmp r3, r1 + 800761a: d00c beq.n 8007636 + 800761c: f501 6180 add.w r1, r1, #1024 ; 0x400 + 8007620: 428b cmp r3, r1 + 8007622: d008 beq.n 8007636 + 8007624: f501 6180 add.w r1, r1, #1024 ; 0x400 + 8007628: 428b cmp r3, r1 + 800762a: d108 bne.n 800763e + 800762c: e003 b.n 8007636 + 800762e: f022 0270 bic.w r2, r2, #112 ; 0x70 + 8007632: 68a9 ldr r1, [r5, #8] + 8007634: 430a orrs r2, r1 + 8007636: f422 7240 bic.w r2, r2, #768 ; 0x300 + 800763a: 6929 ldr r1, [r5, #16] + 800763c: 430a orrs r2, r1 + 800763e: 69a9 ldr r1, [r5, #24] + 8007640: f022 0280 bic.w r2, r2, #128 ; 0x80 + 8007644: 68e8 ldr r0, [r5, #12] + 8007646: 430a orrs r2, r1 + 8007648: 6869 ldr r1, [r5, #4] + 800764a: 601a str r2, [r3, #0] + 800764c: 62d8 str r0, [r3, #44] ; 0x2c + 800764e: 6299 str r1, [r3, #40] ; 0x28 + 8007650: 2f00 cmp r7, #0 + 8007652: d13c bne.n 80076ce + 8007654: 2c00 cmp r4, #0 + 8007656: d13a bne.n 80076ce + 8007658: 6932 ldr r2, [r6, #16] + 800765a: 2701 movs r7, #1 + 800765c: f8d6 9018 ldr.w r9, [r6, #24] + 8007660: 2000 movs r0, #0 + 8007662: ea4f 1e02 mov.w lr, r2, lsl #4 + 8007666: 68b2 ldr r2, [r6, #8] + 8007668: 615f str r7, [r3, #20] + 800766a: ea42 2909 orr.w r9, r2, r9, lsl #8 + 800766e: 689c ldr r4, [r3, #8] + 8007670: 69f2 ldr r2, [r6, #28] + 8007672: 6999 ldr r1, [r3, #24] + 8007674: f8df c094 ldr.w ip, [pc, #148] ; 800770c + 8007678: ea4e 2202 orr.w r2, lr, r2, lsl #8 + 800767c: f8d6 8000 ldr.w r8, [r6] + 8007680: ea01 0c0c and.w ip, r1, ip + 8007684: 68f1 ldr r1, [r6, #12] + 8007686: f8d6 a020 ldr.w sl, [r6, #32] + 800768a: ea44 0408 orr.w r4, r4, r8 + 800768e: f8d3 e020 ldr.w lr, [r3, #32] + 8007692: ea49 0c0c orr.w ip, r9, ip + 8007696: 4311 orrs r1, r2 + 8007698: f8d6 9004 ldr.w r9, [r6, #4] + 800769c: 6972 ldr r2, [r6, #20] + 800769e: f02e 0eaa bic.w lr, lr, #170 ; 0xaa + 80076a2: 4e18 ldr r6, [pc, #96] ; (8007704 ) + 80076a4: ea41 310a orr.w r1, r1, sl, lsl #12 + 80076a8: ea49 1202 orr.w r2, r9, r2, lsl #4 + 80076ac: 609c str r4, [r3, #8] + 80076ae: ea0c 0606 and.w r6, ip, r6 + 80076b2: ea42 020e orr.w r2, r2, lr + 80076b6: 4331 orrs r1, r6 + 80076b8: 6199 str r1, [r3, #24] + 80076ba: 621a str r2, [r3, #32] + 80076bc: f885 703d strb.w r7, [r5, #61] ; 0x3d + 80076c0: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} + 80076c4: f880 203c strb.w r2, [r0, #60] ; 0x3c + 80076c8: f7fe faa0 bl 8005c0c + 80076cc: e76e b.n 80075ac + 80076ce: 696a ldr r2, [r5, #20] + 80076d0: 631a str r2, [r3, #48] ; 0x30 + 80076d2: e7c1 b.n 8007658 + 80076d4: 2001 movs r0, #1 + 80076d6: 4770 bx lr + 80076d8: 490b ldr r1, [pc, #44] ; (8007708 ) + 80076da: f022 0270 bic.w r2, r2, #112 ; 0x70 + 80076de: 68a8 ldr r0, [r5, #8] + 80076e0: 428b cmp r3, r1 + 80076e2: ea42 0200 orr.w r2, r2, r0 + 80076e6: d0a6 beq.n 8007636 + 80076e8: 2c00 cmp r4, #0 + 80076ea: d1a4 bne.n 8007636 + 80076ec: e787 b.n 80075fe + 80076ee: bf00 nop + 80076f0: 40010000 .word 0x40010000 + 80076f4: 40010400 .word 0x40010400 + 80076f8: fffebff8 .word 0xfffebff8 + 80076fc: 40000400 .word 0x40000400 + 8007700: 40014000 .word 0x40014000 + 8007704: ffff0303 .word 0xffff0303 + 8007708: 40000c00 .word 0x40000c00 + 800770c: fffffcfc .word 0xfffffcfc + +08007710 : + 8007710: 6803 ldr r3, [r0, #0] + 8007712: b1c1 cbz r1, 8007746 + 8007714: 2904 cmp r1, #4 + 8007716: d10d bne.n 8007734 + 8007718: 6a1a ldr r2, [r3, #32] + 800771a: f022 0210 bic.w r2, r2, #16 + 800771e: 621a str r2, [r3, #32] + 8007720: 6a1a ldr r2, [r3, #32] + 8007722: f042 0210 orr.w r2, r2, #16 + 8007726: 621a str r2, [r3, #32] + 8007728: 681a ldr r2, [r3, #0] + 800772a: 2000 movs r0, #0 + 800772c: f042 0201 orr.w r2, r2, #1 + 8007730: 601a str r2, [r3, #0] + 8007732: 4770 bx lr + 8007734: 6a1a ldr r2, [r3, #32] + 8007736: f022 0201 bic.w r2, r2, #1 + 800773a: 621a str r2, [r3, #32] + 800773c: 6a1a ldr r2, [r3, #32] + 800773e: f042 0201 orr.w r2, r2, #1 + 8007742: 621a str r2, [r3, #32] + 8007744: e7e8 b.n 8007718 + 8007746: 6a1a ldr r2, [r3, #32] + 8007748: f022 0201 bic.w r2, r2, #1 + 800774c: 621a str r2, [r3, #32] + 800774e: 6a1a ldr r2, [r3, #32] + 8007750: f042 0201 orr.w r2, r2, #1 + 8007754: 621a str r2, [r3, #32] + 8007756: e7e7 b.n 8007728 + +08007758 : + 8007758: 4603 mov r3, r0 + 800775a: f890 003c ldrb.w r0, [r0, #60] ; 0x3c + 800775e: 2801 cmp r0, #1 + 8007760: f000 813e beq.w 80079e0 + 8007764: 2002 movs r0, #2 + 8007766: b4f0 push {r4, r5, r6, r7} + 8007768: 2401 movs r4, #1 + 800776a: f883 003d strb.w r0, [r3, #61] ; 0x3d + 800776e: f883 403c strb.w r4, [r3, #60] ; 0x3c + 8007772: 2a14 cmp r2, #20 + 8007774: d843 bhi.n 80077fe + 8007776: e8df f012 tbh [pc, r2, lsl #1] + 800777a: 0015 .short 0x0015 + 800777c: 00420042 .word 0x00420042 + 8007780: 007b0042 .word 0x007b0042 + 8007784: 00420042 .word 0x00420042 + 8007788: 00da0042 .word 0x00da0042 + 800778c: 00420042 .word 0x00420042 + 8007790: 00aa0042 .word 0x00aa0042 + 8007794: 00420042 .word 0x00420042 + 8007798: 01060042 .word 0x01060042 + 800779c: 00420042 .word 0x00420042 + 80077a0: 004b0042 .word 0x004b0042 + 80077a4: 681a ldr r2, [r3, #0] + 80077a6: f8d1 c008 ldr.w ip, [r1, #8] + 80077aa: 6a15 ldr r5, [r2, #32] + 80077ac: 680f ldr r7, [r1, #0] + 80077ae: f025 0501 bic.w r5, r5, #1 + 80077b2: 4cab ldr r4, [pc, #684] ; (8007a60 ) + 80077b4: 6215 str r5, [r2, #32] + 80077b6: 6a10 ldr r0, [r2, #32] + 80077b8: 6856 ldr r6, [r2, #4] + 80077ba: 6995 ldr r5, [r2, #24] + 80077bc: f020 0002 bic.w r0, r0, #2 + 80077c0: 402c ands r4, r5 + 80077c2: 4da8 ldr r5, [pc, #672] ; (8007a64 ) + 80077c4: ea40 000c orr.w r0, r0, ip + 80077c8: 42aa cmp r2, r5 + 80077ca: ea44 0407 orr.w r4, r4, r7 + 80077ce: f000 8115 beq.w 80079fc + 80077d2: f505 6580 add.w r5, r5, #1024 ; 0x400 + 80077d6: 42aa cmp r2, r5 + 80077d8: f000 8110 beq.w 80079fc + 80077dc: 684d ldr r5, [r1, #4] + 80077de: 6056 str r6, [r2, #4] + 80077e0: 6194 str r4, [r2, #24] + 80077e2: 6355 str r5, [r2, #52] ; 0x34 + 80077e4: 6210 str r0, [r2, #32] + 80077e6: 6990 ldr r0, [r2, #24] + 80077e8: 690c ldr r4, [r1, #16] + 80077ea: f040 0008 orr.w r0, r0, #8 + 80077ee: 6190 str r0, [r2, #24] + 80077f0: 6990 ldr r0, [r2, #24] + 80077f2: f020 0004 bic.w r0, r0, #4 + 80077f6: 6190 str r0, [r2, #24] + 80077f8: 6991 ldr r1, [r2, #24] + 80077fa: 4321 orrs r1, r4 + 80077fc: 6191 str r1, [r2, #24] + 80077fe: 2200 movs r2, #0 + 8007800: 2101 movs r1, #1 + 8007802: 4610 mov r0, r2 + 8007804: f883 103d strb.w r1, [r3, #61] ; 0x3d + 8007808: f883 203c strb.w r2, [r3, #60] ; 0x3c + 800780c: bcf0 pop {r4, r5, r6, r7} + 800780e: 4770 bx lr + 8007810: 681a ldr r2, [r3, #0] + 8007812: 688e ldr r6, [r1, #8] + 8007814: 6a15 ldr r5, [r2, #32] + 8007816: 680f ldr r7, [r1, #0] + 8007818: f425 1580 bic.w r5, r5, #1048576 ; 0x100000 + 800781c: 4c92 ldr r4, [pc, #584] ; (8007a68 ) + 800781e: 6215 str r5, [r2, #32] + 8007820: 6a10 ldr r0, [r2, #32] + 8007822: 6855 ldr r5, [r2, #4] + 8007824: f420 1000 bic.w r0, r0, #2097152 ; 0x200000 + 8007828: f8d2 c054 ldr.w ip, [r2, #84] ; 0x54 + 800782c: ea40 5006 orr.w r0, r0, r6, lsl #20 + 8007830: 4e8c ldr r6, [pc, #560] ; (8007a64 ) + 8007832: ea0c 0404 and.w r4, ip, r4 + 8007836: 42b2 cmp r2, r6 + 8007838: ea44 2407 orr.w r4, r4, r7, lsl #8 + 800783c: f000 80d2 beq.w 80079e4 + 8007840: f506 6680 add.w r6, r6, #1024 ; 0x400 + 8007844: 42b2 cmp r2, r6 + 8007846: f000 80cd beq.w 80079e4 + 800784a: 684e ldr r6, [r1, #4] + 800784c: 6055 str r5, [r2, #4] + 800784e: 6554 str r4, [r2, #84] ; 0x54 + 8007850: 65d6 str r6, [r2, #92] ; 0x5c + 8007852: 6210 str r0, [r2, #32] + 8007854: 6d50 ldr r0, [r2, #84] ; 0x54 + 8007856: 690c ldr r4, [r1, #16] + 8007858: f440 6000 orr.w r0, r0, #2048 ; 0x800 + 800785c: 6550 str r0, [r2, #84] ; 0x54 + 800785e: 6d50 ldr r0, [r2, #84] ; 0x54 + 8007860: f420 6080 bic.w r0, r0, #1024 ; 0x400 + 8007864: 6550 str r0, [r2, #84] ; 0x54 + 8007866: 6d51 ldr r1, [r2, #84] ; 0x54 + 8007868: ea41 2104 orr.w r1, r1, r4, lsl #8 + 800786c: 6551 str r1, [r2, #84] ; 0x54 + 800786e: e7c6 b.n 80077fe + 8007870: 681a ldr r2, [r3, #0] + 8007872: f8d1 c008 ldr.w ip, [r1, #8] + 8007876: 6a15 ldr r5, [r2, #32] + 8007878: 680f ldr r7, [r1, #0] + 800787a: f025 0510 bic.w r5, r5, #16 + 800787e: 4c7b ldr r4, [pc, #492] ; (8007a6c ) + 8007880: 6215 str r5, [r2, #32] + 8007882: 6a10 ldr r0, [r2, #32] + 8007884: 6856 ldr r6, [r2, #4] + 8007886: 6995 ldr r5, [r2, #24] + 8007888: f020 0020 bic.w r0, r0, #32 + 800788c: 402c ands r4, r5 + 800788e: 4d75 ldr r5, [pc, #468] ; (8007a64 ) + 8007890: ea40 100c orr.w r0, r0, ip, lsl #4 + 8007894: 42aa cmp r2, r5 + 8007896: ea44 2407 orr.w r4, r4, r7, lsl #8 + 800789a: f000 80c3 beq.w 8007a24 + 800789e: f505 6580 add.w r5, r5, #1024 ; 0x400 + 80078a2: 42aa cmp r2, r5 + 80078a4: f000 80be beq.w 8007a24 + 80078a8: 684d ldr r5, [r1, #4] + 80078aa: 6056 str r6, [r2, #4] + 80078ac: 6194 str r4, [r2, #24] + 80078ae: 6395 str r5, [r2, #56] ; 0x38 + 80078b0: 6210 str r0, [r2, #32] + 80078b2: 6990 ldr r0, [r2, #24] + 80078b4: 690c ldr r4, [r1, #16] + 80078b6: f440 6000 orr.w r0, r0, #2048 ; 0x800 + 80078ba: 6190 str r0, [r2, #24] + 80078bc: 6990 ldr r0, [r2, #24] + 80078be: f420 6080 bic.w r0, r0, #1024 ; 0x400 + 80078c2: 6190 str r0, [r2, #24] + 80078c4: 6991 ldr r1, [r2, #24] + 80078c6: ea41 2104 orr.w r1, r1, r4, lsl #8 + 80078ca: 6191 str r1, [r2, #24] + 80078cc: e797 b.n 80077fe + 80078ce: 681a ldr r2, [r3, #0] + 80078d0: 688e ldr r6, [r1, #8] + 80078d2: 6a15 ldr r5, [r2, #32] + 80078d4: 680f ldr r7, [r1, #0] + 80078d6: f425 5580 bic.w r5, r5, #4096 ; 0x1000 + 80078da: 4c64 ldr r4, [pc, #400] ; (8007a6c ) + 80078dc: 6215 str r5, [r2, #32] + 80078de: 6a10 ldr r0, [r2, #32] + 80078e0: 6855 ldr r5, [r2, #4] + 80078e2: f420 5000 bic.w r0, r0, #8192 ; 0x2000 + 80078e6: f8d2 c01c ldr.w ip, [r2, #28] + 80078ea: ea40 3006 orr.w r0, r0, r6, lsl #12 + 80078ee: 4e5d ldr r6, [pc, #372] ; (8007a64 ) + 80078f0: ea0c 0404 and.w r4, ip, r4 + 80078f4: 42b2 cmp r2, r6 + 80078f6: ea44 2407 orr.w r4, r4, r7, lsl #8 + 80078fa: f000 808d beq.w 8007a18 + 80078fe: f506 6680 add.w r6, r6, #1024 ; 0x400 + 8007902: 42b2 cmp r2, r6 + 8007904: f000 8088 beq.w 8007a18 + 8007908: 684e ldr r6, [r1, #4] + 800790a: 6055 str r5, [r2, #4] + 800790c: 61d4 str r4, [r2, #28] + 800790e: 6416 str r6, [r2, #64] ; 0x40 + 8007910: 6210 str r0, [r2, #32] + 8007912: 69d0 ldr r0, [r2, #28] + 8007914: 690c ldr r4, [r1, #16] + 8007916: f440 6000 orr.w r0, r0, #2048 ; 0x800 + 800791a: 61d0 str r0, [r2, #28] + 800791c: 69d0 ldr r0, [r2, #28] + 800791e: f420 6080 bic.w r0, r0, #1024 ; 0x400 + 8007922: 61d0 str r0, [r2, #28] + 8007924: 69d1 ldr r1, [r2, #28] + 8007926: ea41 2104 orr.w r1, r1, r4, lsl #8 + 800792a: 61d1 str r1, [r2, #28] + 800792c: e767 b.n 80077fe + 800792e: 681a ldr r2, [r3, #0] + 8007930: f8d1 c008 ldr.w ip, [r1, #8] + 8007934: 6a15 ldr r5, [r2, #32] + 8007936: 680f ldr r7, [r1, #0] + 8007938: f425 7580 bic.w r5, r5, #256 ; 0x100 + 800793c: 4c48 ldr r4, [pc, #288] ; (8007a60 ) + 800793e: 6215 str r5, [r2, #32] + 8007940: 6a10 ldr r0, [r2, #32] + 8007942: 6856 ldr r6, [r2, #4] + 8007944: 69d5 ldr r5, [r2, #28] + 8007946: f420 7000 bic.w r0, r0, #512 ; 0x200 + 800794a: 402c ands r4, r5 + 800794c: 4d45 ldr r5, [pc, #276] ; (8007a64 ) + 800794e: ea40 200c orr.w r0, r0, ip, lsl #8 + 8007952: 42aa cmp r2, r5 + 8007954: ea44 0407 orr.w r4, r4, r7 + 8007958: d073 beq.n 8007a42 + 800795a: f505 6580 add.w r5, r5, #1024 ; 0x400 + 800795e: 42aa cmp r2, r5 + 8007960: d06f beq.n 8007a42 + 8007962: 684d ldr r5, [r1, #4] + 8007964: 6056 str r6, [r2, #4] + 8007966: 61d4 str r4, [r2, #28] + 8007968: 63d5 str r5, [r2, #60] ; 0x3c + 800796a: 6210 str r0, [r2, #32] + 800796c: 69d0 ldr r0, [r2, #28] + 800796e: 690c ldr r4, [r1, #16] + 8007970: f040 0008 orr.w r0, r0, #8 + 8007974: 61d0 str r0, [r2, #28] + 8007976: 69d0 ldr r0, [r2, #28] + 8007978: f020 0004 bic.w r0, r0, #4 + 800797c: 61d0 str r0, [r2, #28] + 800797e: 69d1 ldr r1, [r2, #28] + 8007980: 4321 orrs r1, r4 + 8007982: 61d1 str r1, [r2, #28] + 8007984: e73b b.n 80077fe + 8007986: 681a ldr r2, [r3, #0] + 8007988: 688e ldr r6, [r1, #8] + 800798a: 6a15 ldr r5, [r2, #32] + 800798c: 680f ldr r7, [r1, #0] + 800798e: f425 3580 bic.w r5, r5, #65536 ; 0x10000 + 8007992: 4c37 ldr r4, [pc, #220] ; (8007a70 ) + 8007994: 6215 str r5, [r2, #32] + 8007996: 6a10 ldr r0, [r2, #32] + 8007998: 6855 ldr r5, [r2, #4] + 800799a: f420 3000 bic.w r0, r0, #131072 ; 0x20000 + 800799e: f8d2 c054 ldr.w ip, [r2, #84] ; 0x54 + 80079a2: ea40 4006 orr.w r0, r0, r6, lsl #16 + 80079a6: 4e2f ldr r6, [pc, #188] ; (8007a64 ) + 80079a8: ea0c 0404 and.w r4, ip, r4 + 80079ac: 42b2 cmp r2, r6 + 80079ae: ea44 0407 orr.w r4, r4, r7 + 80079b2: d01d beq.n 80079f0 + 80079b4: f506 6680 add.w r6, r6, #1024 ; 0x400 + 80079b8: 42b2 cmp r2, r6 + 80079ba: d019 beq.n 80079f0 + 80079bc: 684e ldr r6, [r1, #4] + 80079be: 6055 str r5, [r2, #4] + 80079c0: 6554 str r4, [r2, #84] ; 0x54 + 80079c2: 6596 str r6, [r2, #88] ; 0x58 + 80079c4: 6210 str r0, [r2, #32] + 80079c6: 6d50 ldr r0, [r2, #84] ; 0x54 + 80079c8: 690c ldr r4, [r1, #16] + 80079ca: f040 0008 orr.w r0, r0, #8 + 80079ce: 6550 str r0, [r2, #84] ; 0x54 + 80079d0: 6d50 ldr r0, [r2, #84] ; 0x54 + 80079d2: f020 0004 bic.w r0, r0, #4 + 80079d6: 6550 str r0, [r2, #84] ; 0x54 + 80079d8: 6d51 ldr r1, [r2, #84] ; 0x54 + 80079da: 4321 orrs r1, r4 + 80079dc: 6551 str r1, [r2, #84] ; 0x54 + 80079de: e70e b.n 80077fe + 80079e0: 2002 movs r0, #2 + 80079e2: 4770 bx lr + 80079e4: f425 2580 bic.w r5, r5, #262144 ; 0x40000 + 80079e8: 694e ldr r6, [r1, #20] + 80079ea: ea45 2586 orr.w r5, r5, r6, lsl #10 + 80079ee: e72c b.n 800784a + 80079f0: f425 3580 bic.w r5, r5, #65536 ; 0x10000 + 80079f4: 694e ldr r6, [r1, #20] + 80079f6: ea45 2506 orr.w r5, r5, r6, lsl #8 + 80079fa: e7df b.n 80079bc + 80079fc: f426 7c40 bic.w ip, r6, #768 ; 0x300 + 8007a00: f020 0008 bic.w r0, r0, #8 + 8007a04: 698e ldr r6, [r1, #24] + 8007a06: 68cf ldr r7, [r1, #12] + 8007a08: 694d ldr r5, [r1, #20] + 8007a0a: 4338 orrs r0, r7 + 8007a0c: 4335 orrs r5, r6 + 8007a0e: f020 0004 bic.w r0, r0, #4 + 8007a12: ea45 060c orr.w r6, r5, ip + 8007a16: e6e1 b.n 80077dc + 8007a18: f425 4580 bic.w r5, r5, #16384 ; 0x4000 + 8007a1c: 694e ldr r6, [r1, #20] + 8007a1e: ea45 1586 orr.w r5, r5, r6, lsl #6 + 8007a22: e771 b.n 8007908 + 8007a24: f426 6c40 bic.w ip, r6, #3072 ; 0xc00 + 8007a28: f020 0080 bic.w r0, r0, #128 ; 0x80 + 8007a2c: 698e ldr r6, [r1, #24] + 8007a2e: 68cf ldr r7, [r1, #12] + 8007a30: 694d ldr r5, [r1, #20] + 8007a32: ea40 1007 orr.w r0, r0, r7, lsl #4 + 8007a36: 4335 orrs r5, r6 + 8007a38: f020 0040 bic.w r0, r0, #64 ; 0x40 + 8007a3c: ea4c 0685 orr.w r6, ip, r5, lsl #2 + 8007a40: e732 b.n 80078a8 + 8007a42: f426 5c40 bic.w ip, r6, #12288 ; 0x3000 + 8007a46: f420 6000 bic.w r0, r0, #2048 ; 0x800 + 8007a4a: 698e ldr r6, [r1, #24] + 8007a4c: 68cf ldr r7, [r1, #12] + 8007a4e: 694d ldr r5, [r1, #20] + 8007a50: ea40 2007 orr.w r0, r0, r7, lsl #8 + 8007a54: 4335 orrs r5, r6 + 8007a56: f420 6080 bic.w r0, r0, #1024 ; 0x400 + 8007a5a: ea4c 1605 orr.w r6, ip, r5, lsl #4 + 8007a5e: e780 b.n 8007962 + 8007a60: fffeff8c .word 0xfffeff8c + 8007a64: 40010000 .word 0x40010000 + 8007a68: feff8fff .word 0xfeff8fff + 8007a6c: feff8cff .word 0xfeff8cff + 8007a70: fffeff8f .word 0xfffeff8f + +08007a74 : + 8007a74: f890 303c ldrb.w r3, [r0, #60] ; 0x3c + 8007a78: 2b01 cmp r3, #1 + 8007a7a: d05b beq.n 8007b34 + 8007a7c: 4602 mov r2, r0 + 8007a7e: 2002 movs r0, #2 + 8007a80: 6813 ldr r3, [r2, #0] + 8007a82: b470 push {r4, r5, r6} + 8007a84: f882 003d strb.w r0, [r2, #61] ; 0x3d + 8007a88: 2501 movs r5, #1 + 8007a8a: 6898 ldr r0, [r3, #8] + 8007a8c: 4c4c ldr r4, [pc, #304] ; (8007bc0 ) + 8007a8e: f882 503c strb.w r5, [r2, #60] ; 0x3c + 8007a92: 4004 ands r4, r0 + 8007a94: 6808 ldr r0, [r1, #0] + 8007a96: 2840 cmp r0, #64 ; 0x40 + 8007a98: 609c str r4, [r3, #8] + 8007a9a: d076 beq.n 8007b8a + 8007a9c: d94c bls.n 8007b38 + 8007a9e: 2860 cmp r0, #96 ; 0x60 + 8007aa0: d02f beq.n 8007b02 + 8007aa2: d958 bls.n 8007b56 + 8007aa4: 2870 cmp r0, #112 ; 0x70 + 8007aa6: d01b beq.n 8007ae0 + 8007aa8: f5b0 5f00 cmp.w r0, #8192 ; 0x2000 + 8007aac: d10f bne.n 8007ace + 8007aae: 68cc ldr r4, [r1, #12] + 8007ab0: e9d1 5001 ldrd r5, r0, [r1, #4] + 8007ab4: ea40 0105 orr.w r1, r0, r5 + 8007ab8: 6898 ldr r0, [r3, #8] + 8007aba: ea41 2104 orr.w r1, r1, r4, lsl #8 + 8007abe: f420 407f bic.w r0, r0, #65280 ; 0xff00 + 8007ac2: 4301 orrs r1, r0 + 8007ac4: 6099 str r1, [r3, #8] + 8007ac6: 6899 ldr r1, [r3, #8] + 8007ac8: f441 4180 orr.w r1, r1, #16384 ; 0x4000 + 8007acc: 6099 str r1, [r3, #8] + 8007ace: 2300 movs r3, #0 + 8007ad0: 2101 movs r1, #1 + 8007ad2: 4618 mov r0, r3 + 8007ad4: f882 103d strb.w r1, [r2, #61] ; 0x3d + 8007ad8: f882 303c strb.w r3, [r2, #60] ; 0x3c + 8007adc: bc70 pop {r4, r5, r6} + 8007ade: 4770 bx lr + 8007ae0: e9d1 5001 ldrd r5, r0, [r1, #4] + 8007ae4: 68cc ldr r4, [r1, #12] + 8007ae6: ea40 0105 orr.w r1, r0, r5 + 8007aea: 6898 ldr r0, [r3, #8] + 8007aec: ea41 2104 orr.w r1, r1, r4, lsl #8 + 8007af0: f420 407f bic.w r0, r0, #65280 ; 0xff00 + 8007af4: 4301 orrs r1, r0 + 8007af6: 6099 str r1, [r3, #8] + 8007af8: 6899 ldr r1, [r3, #8] + 8007afa: f041 0177 orr.w r1, r1, #119 ; 0x77 + 8007afe: 6099 str r1, [r3, #8] + 8007b00: e7e5 b.n 8007ace + 8007b02: 6a1c ldr r4, [r3, #32] + 8007b04: 684d ldr r5, [r1, #4] + 8007b06: f024 0410 bic.w r4, r4, #16 + 8007b0a: 68ce ldr r6, [r1, #12] + 8007b0c: 621c str r4, [r3, #32] + 8007b0e: 6998 ldr r0, [r3, #24] + 8007b10: 6a19 ldr r1, [r3, #32] + 8007b12: f420 4070 bic.w r0, r0, #61440 ; 0xf000 + 8007b16: f021 01a0 bic.w r1, r1, #160 ; 0xa0 + 8007b1a: ea40 3006 orr.w r0, r0, r6, lsl #12 + 8007b1e: ea41 1105 orr.w r1, r1, r5, lsl #4 + 8007b22: 6198 str r0, [r3, #24] + 8007b24: 6219 str r1, [r3, #32] + 8007b26: 6899 ldr r1, [r3, #8] + 8007b28: f021 0170 bic.w r1, r1, #112 ; 0x70 + 8007b2c: f041 0167 orr.w r1, r1, #103 ; 0x67 + 8007b30: 6099 str r1, [r3, #8] + 8007b32: e7cc b.n 8007ace + 8007b34: 2002 movs r0, #2 + 8007b36: 4770 bx lr + 8007b38: 2810 cmp r0, #16 + 8007b3a: d004 beq.n 8007b46 + 8007b3c: d93d bls.n 8007bba + 8007b3e: 2820 cmp r0, #32 + 8007b40: d001 beq.n 8007b46 + 8007b42: 2830 cmp r0, #48 ; 0x30 + 8007b44: d1c3 bne.n 8007ace + 8007b46: 6899 ldr r1, [r3, #8] + 8007b48: f040 0007 orr.w r0, r0, #7 + 8007b4c: f021 0170 bic.w r1, r1, #112 ; 0x70 + 8007b50: 4308 orrs r0, r1 + 8007b52: 6098 str r0, [r3, #8] + 8007b54: e7bb b.n 8007ace + 8007b56: 2850 cmp r0, #80 ; 0x50 + 8007b58: d1b9 bne.n 8007ace + 8007b5a: 6a1d ldr r5, [r3, #32] + 8007b5c: 6a1c ldr r4, [r3, #32] + 8007b5e: 6848 ldr r0, [r1, #4] + 8007b60: f025 050a bic.w r5, r5, #10 + 8007b64: f024 0401 bic.w r4, r4, #1 + 8007b68: 68ce ldr r6, [r1, #12] + 8007b6a: 4328 orrs r0, r5 + 8007b6c: 621c str r4, [r3, #32] + 8007b6e: 6999 ldr r1, [r3, #24] + 8007b70: f021 01f0 bic.w r1, r1, #240 ; 0xf0 + 8007b74: ea41 1106 orr.w r1, r1, r6, lsl #4 + 8007b78: 6199 str r1, [r3, #24] + 8007b7a: 6218 str r0, [r3, #32] + 8007b7c: 6899 ldr r1, [r3, #8] + 8007b7e: f021 0170 bic.w r1, r1, #112 ; 0x70 + 8007b82: f041 0157 orr.w r1, r1, #87 ; 0x57 + 8007b86: 6099 str r1, [r3, #8] + 8007b88: e7a1 b.n 8007ace + 8007b8a: 6a1d ldr r5, [r3, #32] + 8007b8c: 6a1c ldr r4, [r3, #32] + 8007b8e: 6848 ldr r0, [r1, #4] + 8007b90: f025 050a bic.w r5, r5, #10 + 8007b94: f024 0401 bic.w r4, r4, #1 + 8007b98: 68ce ldr r6, [r1, #12] + 8007b9a: 4328 orrs r0, r5 + 8007b9c: 621c str r4, [r3, #32] + 8007b9e: 6999 ldr r1, [r3, #24] + 8007ba0: f021 01f0 bic.w r1, r1, #240 ; 0xf0 + 8007ba4: ea41 1106 orr.w r1, r1, r6, lsl #4 + 8007ba8: 6199 str r1, [r3, #24] + 8007baa: 6218 str r0, [r3, #32] + 8007bac: 6899 ldr r1, [r3, #8] + 8007bae: f021 0170 bic.w r1, r1, #112 ; 0x70 + 8007bb2: f041 0147 orr.w r1, r1, #71 ; 0x47 + 8007bb6: 6099 str r1, [r3, #8] + 8007bb8: e789 b.n 8007ace + 8007bba: 2800 cmp r0, #0 + 8007bbc: d0c3 beq.n 8007b46 + 8007bbe: e786 b.n 8007ace + 8007bc0: fffe0088 .word 0xfffe0088 + +08007bc4 : + 8007bc4: 4770 bx lr + 8007bc6: bf00 nop + +08007bc8 : + 8007bc8: 4770 bx lr + 8007bca: bf00 nop + +08007bcc : + 8007bcc: 4770 bx lr + 8007bce: bf00 nop + +08007bd0 : + 8007bd0: 4770 bx lr + 8007bd2: bf00 nop + +08007bd4 : + 8007bd4: 6803 ldr r3, [r0, #0] + 8007bd6: 691a ldr r2, [r3, #16] + 8007bd8: 0791 lsls r1, r2, #30 + 8007bda: b510 push {r4, lr} + 8007bdc: 4604 mov r4, r0 + 8007bde: d502 bpl.n 8007be6 + 8007be0: 68da ldr r2, [r3, #12] + 8007be2: 0792 lsls r2, r2, #30 + 8007be4: d468 bmi.n 8007cb8 + 8007be6: 691a ldr r2, [r3, #16] + 8007be8: 0752 lsls r2, r2, #29 + 8007bea: d502 bpl.n 8007bf2 + 8007bec: 68da ldr r2, [r3, #12] + 8007bee: 0750 lsls r0, r2, #29 + 8007bf0: d44f bmi.n 8007c92 + 8007bf2: 691a ldr r2, [r3, #16] + 8007bf4: 0711 lsls r1, r2, #28 + 8007bf6: d502 bpl.n 8007bfe + 8007bf8: 68da ldr r2, [r3, #12] + 8007bfa: 0712 lsls r2, r2, #28 + 8007bfc: d437 bmi.n 8007c6e + 8007bfe: 691a ldr r2, [r3, #16] + 8007c00: 06d0 lsls r0, r2, #27 + 8007c02: d502 bpl.n 8007c0a + 8007c04: 68da ldr r2, [r3, #12] + 8007c06: 06d1 lsls r1, r2, #27 + 8007c08: d41e bmi.n 8007c48 + 8007c0a: 691a ldr r2, [r3, #16] + 8007c0c: 07d2 lsls r2, r2, #31 + 8007c0e: d502 bpl.n 8007c16 + 8007c10: 68da ldr r2, [r3, #12] + 8007c12: 07d0 lsls r0, r2, #31 + 8007c14: d469 bmi.n 8007cea + 8007c16: 691a ldr r2, [r3, #16] + 8007c18: 0611 lsls r1, r2, #24 + 8007c1a: d502 bpl.n 8007c22 + 8007c1c: 68da ldr r2, [r3, #12] + 8007c1e: 0612 lsls r2, r2, #24 + 8007c20: d46b bmi.n 8007cfa + 8007c22: 691a ldr r2, [r3, #16] + 8007c24: 05d0 lsls r0, r2, #23 + 8007c26: d502 bpl.n 8007c2e + 8007c28: 68da ldr r2, [r3, #12] + 8007c2a: 0611 lsls r1, r2, #24 + 8007c2c: d46d bmi.n 8007d0a + 8007c2e: 691a ldr r2, [r3, #16] + 8007c30: 0652 lsls r2, r2, #25 + 8007c32: d502 bpl.n 8007c3a + 8007c34: 68da ldr r2, [r3, #12] + 8007c36: 0650 lsls r0, r2, #25 + 8007c38: d46f bmi.n 8007d1a + 8007c3a: 691a ldr r2, [r3, #16] + 8007c3c: 0691 lsls r1, r2, #26 + 8007c3e: d502 bpl.n 8007c46 + 8007c40: 68da ldr r2, [r3, #12] + 8007c42: 0692 lsls r2, r2, #26 + 8007c44: d449 bmi.n 8007cda + 8007c46: bd10 pop {r4, pc} + 8007c48: f06f 0110 mvn.w r1, #16 + 8007c4c: 2208 movs r2, #8 + 8007c4e: 4620 mov r0, r4 + 8007c50: 6119 str r1, [r3, #16] + 8007c52: 69db ldr r3, [r3, #28] + 8007c54: 7722 strb r2, [r4, #28] + 8007c56: f413 7f40 tst.w r3, #768 ; 0x300 + 8007c5a: d16f bne.n 8007d3c + 8007c5c: f7ff ffb2 bl 8007bc4 + 8007c60: 4620 mov r0, r4 + 8007c62: f7ff ffb3 bl 8007bcc + 8007c66: 2200 movs r2, #0 + 8007c68: 6823 ldr r3, [r4, #0] + 8007c6a: 7722 strb r2, [r4, #28] + 8007c6c: e7cd b.n 8007c0a + 8007c6e: f06f 0108 mvn.w r1, #8 + 8007c72: 2204 movs r2, #4 + 8007c74: 4620 mov r0, r4 + 8007c76: 6119 str r1, [r3, #16] + 8007c78: 69db ldr r3, [r3, #28] + 8007c7a: 7722 strb r2, [r4, #28] + 8007c7c: 079b lsls r3, r3, #30 + 8007c7e: d15a bne.n 8007d36 + 8007c80: f7ff ffa0 bl 8007bc4 + 8007c84: 4620 mov r0, r4 + 8007c86: f7ff ffa1 bl 8007bcc + 8007c8a: 2200 movs r2, #0 + 8007c8c: 6823 ldr r3, [r4, #0] + 8007c8e: 7722 strb r2, [r4, #28] + 8007c90: e7b5 b.n 8007bfe + 8007c92: f06f 0104 mvn.w r1, #4 + 8007c96: 2202 movs r2, #2 + 8007c98: 4620 mov r0, r4 + 8007c9a: 6119 str r1, [r3, #16] + 8007c9c: 699b ldr r3, [r3, #24] + 8007c9e: 7722 strb r2, [r4, #28] + 8007ca0: f413 7f40 tst.w r3, #768 ; 0x300 + 8007ca4: d144 bne.n 8007d30 + 8007ca6: f7ff ff8d bl 8007bc4 + 8007caa: 4620 mov r0, r4 + 8007cac: f7ff ff8e bl 8007bcc + 8007cb0: 2200 movs r2, #0 + 8007cb2: 6823 ldr r3, [r4, #0] + 8007cb4: 7722 strb r2, [r4, #28] + 8007cb6: e79c b.n 8007bf2 + 8007cb8: f06f 0102 mvn.w r1, #2 + 8007cbc: 2201 movs r2, #1 + 8007cbe: 6119 str r1, [r3, #16] + 8007cc0: 699b ldr r3, [r3, #24] + 8007cc2: 7702 strb r2, [r0, #28] + 8007cc4: 0799 lsls r1, r3, #30 + 8007cc6: d130 bne.n 8007d2a + 8007cc8: f7ff ff7c bl 8007bc4 + 8007ccc: 4620 mov r0, r4 + 8007cce: f7ff ff7d bl 8007bcc + 8007cd2: 2200 movs r2, #0 + 8007cd4: 6823 ldr r3, [r4, #0] + 8007cd6: 7722 strb r2, [r4, #28] + 8007cd8: e785 b.n 8007be6 + 8007cda: f06f 0220 mvn.w r2, #32 + 8007cde: 4620 mov r0, r4 + 8007ce0: 611a str r2, [r3, #16] + 8007ce2: e8bd 4010 ldmia.w sp!, {r4, lr} + 8007ce6: f000 b85d b.w 8007da4 + 8007cea: f06f 0201 mvn.w r2, #1 + 8007cee: 4620 mov r0, r4 + 8007cf0: 611a str r2, [r3, #16] + 8007cf2: f7fd fae9 bl 80052c8 + 8007cf6: 6823 ldr r3, [r4, #0] + 8007cf8: e78d b.n 8007c16 + 8007cfa: f06f 0280 mvn.w r2, #128 ; 0x80 + 8007cfe: 4620 mov r0, r4 + 8007d00: 611a str r2, [r3, #16] + 8007d02: f000 f851 bl 8007da8 + 8007d06: 6823 ldr r3, [r4, #0] + 8007d08: e78b b.n 8007c22 + 8007d0a: f46f 7280 mvn.w r2, #256 ; 0x100 + 8007d0e: 4620 mov r0, r4 + 8007d10: 611a str r2, [r3, #16] + 8007d12: f000 f84b bl 8007dac + 8007d16: 6823 ldr r3, [r4, #0] + 8007d18: e789 b.n 8007c2e + 8007d1a: f06f 0240 mvn.w r2, #64 ; 0x40 + 8007d1e: 4620 mov r0, r4 + 8007d20: 611a str r2, [r3, #16] + 8007d22: f7ff ff55 bl 8007bd0 + 8007d26: 6823 ldr r3, [r4, #0] + 8007d28: e787 b.n 8007c3a + 8007d2a: f7ff ff4d bl 8007bc8 + 8007d2e: e7d0 b.n 8007cd2 + 8007d30: f7ff ff4a bl 8007bc8 + 8007d34: e7bc b.n 8007cb0 + 8007d36: f7ff ff47 bl 8007bc8 + 8007d3a: e7a6 b.n 8007c8a + 8007d3c: f7ff ff44 bl 8007bc8 + 8007d40: e791 b.n 8007c66 + 8007d42: bf00 nop + +08007d44 : + 8007d44: f890 303c ldrb.w r3, [r0, #60] ; 0x3c + 8007d48: 2b01 cmp r3, #1 + 8007d4a: d025 beq.n 8007d98 + 8007d4c: 6802 ldr r2, [r0, #0] + 8007d4e: 2302 movs r3, #2 + 8007d50: b470 push {r4, r5, r6} + 8007d52: 4d13 ldr r5, [pc, #76] ; (8007da0 ) + 8007d54: f880 303d strb.w r3, [r0, #61] ; 0x3d + 8007d58: 42aa cmp r2, r5 + 8007d5a: 6853 ldr r3, [r2, #4] + 8007d5c: 6894 ldr r4, [r2, #8] + 8007d5e: d016 beq.n 8007d8e + 8007d60: f505 6580 add.w r5, r5, #1024 ; 0x400 + 8007d64: 42aa cmp r2, r5 + 8007d66: d012 beq.n 8007d8e + 8007d68: 680d ldr r5, [r1, #0] + 8007d6a: f024 0480 bic.w r4, r4, #128 ; 0x80 + 8007d6e: 6889 ldr r1, [r1, #8] + 8007d70: f023 0370 bic.w r3, r3, #112 ; 0x70 + 8007d74: 2601 movs r6, #1 + 8007d76: 432b orrs r3, r5 + 8007d78: 4321 orrs r1, r4 + 8007d7a: 2500 movs r5, #0 + 8007d7c: 6053 str r3, [r2, #4] + 8007d7e: 6091 str r1, [r2, #8] + 8007d80: f880 603d strb.w r6, [r0, #61] ; 0x3d + 8007d84: f880 503c strb.w r5, [r0, #60] ; 0x3c + 8007d88: 4628 mov r0, r5 + 8007d8a: bc70 pop {r4, r5, r6} + 8007d8c: 4770 bx lr + 8007d8e: f423 0370 bic.w r3, r3, #15728640 ; 0xf00000 + 8007d92: 684d ldr r5, [r1, #4] + 8007d94: 432b orrs r3, r5 + 8007d96: e7e7 b.n 8007d68 + 8007d98: 2302 movs r3, #2 + 8007d9a: 4618 mov r0, r3 + 8007d9c: 4770 bx lr + 8007d9e: bf00 nop + 8007da0: 40010000 .word 0x40010000 + +08007da4 : + 8007da4: 4770 bx lr + 8007da6: bf00 nop + +08007da8 : + 8007da8: 4770 bx lr + 8007daa: bf00 nop + +08007dac : + 8007dac: 4770 bx lr + 8007dae: bf00 nop + +08007db0 : + 8007db0: b5f8 push {r3, r4, r5, r6, r7, lr} + 8007db2: 6f46 ldr r6, [r0, #116] ; 0x74 + 8007db4: 2e20 cmp r6, #32 + 8007db6: d13b bne.n 8007e30 + 8007db8: 2900 cmp r1, #0 + 8007dba: d03b beq.n 8007e34 + 8007dbc: fab2 f782 clz r7, r2 + 8007dc0: 097f lsrs r7, r7, #5 + 8007dc2: 2f00 cmp r7, #0 + 8007dc4: d136 bne.n 8007e34 + 8007dc6: f890 4070 ldrb.w r4, [r0, #112] ; 0x70 + 8007dca: 2c01 cmp r4, #1 + 8007dcc: d030 beq.n 8007e30 + 8007dce: 4613 mov r3, r2 + 8007dd0: 4605 mov r5, r0 + 8007dd2: 2221 movs r2, #33 ; 0x21 + 8007dd4: 2401 movs r4, #1 + 8007dd6: f8d0 e068 ldr.w lr, [r0, #104] ; 0x68 + 8007dda: f8a0 3052 strh.w r3, [r0, #82] ; 0x52 + 8007dde: 64e9 str r1, [r5, #76] ; 0x4c + 8007de0: 67c7 str r7, [r0, #124] ; 0x7c + 8007de2: f8a0 3050 strh.w r3, [r0, #80] ; 0x50 + 8007de6: 6742 str r2, [r0, #116] ; 0x74 + 8007de8: f880 4070 strb.w r4, [r0, #112] ; 0x70 + 8007dec: 6802 ldr r2, [r0, #0] + 8007dee: f1be 0f00 cmp.w lr, #0 + 8007df2: d012 beq.n 8007e1a + 8007df4: f8df c054 ldr.w ip, [pc, #84] ; 8007e4c + 8007df8: 3228 adds r2, #40 ; 0x28 + 8007dfa: 4813 ldr r0, [pc, #76] ; (8007e48 ) + 8007dfc: f8ce c040 str.w ip, [lr, #64] ; 0x40 + 8007e00: f8df c04c ldr.w ip, [pc, #76] ; 8007e50 + 8007e04: f8ce 003c str.w r0, [lr, #60] ; 0x3c + 8007e08: 4670 mov r0, lr + 8007e0a: f8ce 7050 str.w r7, [lr, #80] ; 0x50 + 8007e0e: f8ce c04c str.w ip, [lr, #76] ; 0x4c + 8007e12: f7fe fab1 bl 8006378 + 8007e16: b978 cbnz r0, 8007e38 + 8007e18: 682a ldr r2, [r5, #0] + 8007e1a: 2340 movs r3, #64 ; 0x40 + 8007e1c: 2100 movs r1, #0 + 8007e1e: 6213 str r3, [r2, #32] + 8007e20: 4608 mov r0, r1 + 8007e22: 6893 ldr r3, [r2, #8] + 8007e24: f885 1070 strb.w r1, [r5, #112] ; 0x70 + 8007e28: f043 0380 orr.w r3, r3, #128 ; 0x80 + 8007e2c: 6093 str r3, [r2, #8] + 8007e2e: bdf8 pop {r3, r4, r5, r6, r7, pc} + 8007e30: 2002 movs r0, #2 + 8007e32: bdf8 pop {r3, r4, r5, r6, r7, pc} + 8007e34: 2001 movs r0, #1 + 8007e36: bdf8 pop {r3, r4, r5, r6, r7, pc} + 8007e38: 2310 movs r3, #16 + 8007e3a: f885 7070 strb.w r7, [r5, #112] ; 0x70 + 8007e3e: 4620 mov r0, r4 + 8007e40: 67eb str r3, [r5, #124] ; 0x7c + 8007e42: 676e str r6, [r5, #116] ; 0x74 + 8007e44: bdf8 pop {r3, r4, r5, r6, r7, pc} + 8007e46: bf00 nop + 8007e48: 08007f19 .word 0x08007f19 + 8007e4c: 08007f49 .word 0x08007f49 + 8007e50: 08007fa1 .word 0x08007fa1 + +08007e54 : + 8007e54: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} + 8007e58: 6f86 ldr r6, [r0, #120] ; 0x78 + 8007e5a: 2e20 cmp r6, #32 + 8007e5c: d149 bne.n 8007ef2 + 8007e5e: 2900 cmp r1, #0 + 8007e60: d04a beq.n 8007ef8 + 8007e62: fab2 f782 clz r7, r2 + 8007e66: 097f lsrs r7, r7, #5 + 8007e68: 2f00 cmp r7, #0 + 8007e6a: d145 bne.n 8007ef8 + 8007e6c: f890 3070 ldrb.w r3, [r0, #112] ; 0x70 + 8007e70: 2b01 cmp r3, #1 + 8007e72: d03e beq.n 8007ef2 + 8007e74: 4613 mov r3, r2 + 8007e76: 2401 movs r4, #1 + 8007e78: 2222 movs r2, #34 ; 0x22 + 8007e7a: f8d0 e06c ldr.w lr, [r0, #108] ; 0x6c + 8007e7e: 67c7 str r7, [r0, #124] ; 0x7c + 8007e80: 4605 mov r5, r0 + 8007e82: 6541 str r1, [r0, #84] ; 0x54 + 8007e84: f8a0 3058 strh.w r3, [r0, #88] ; 0x58 + 8007e88: f880 4070 strb.w r4, [r0, #112] ; 0x70 + 8007e8c: 6782 str r2, [r0, #120] ; 0x78 + 8007e8e: f8d0 c000 ldr.w ip, [r0] + 8007e92: f1be 0f00 cmp.w lr, #0 + 8007e96: d015 beq.n 8007ec4 + 8007e98: 481c ldr r0, [pc, #112] ; (8007f0c ) + 8007e9a: 460a mov r2, r1 + 8007e9c: f8df 8070 ldr.w r8, [pc, #112] ; 8007f10 + 8007ea0: f10c 0124 add.w r1, ip, #36 ; 0x24 + 8007ea4: f8df c06c ldr.w ip, [pc, #108] ; 8007f14 + 8007ea8: f8ce 003c str.w r0, [lr, #60] ; 0x3c + 8007eac: 4670 mov r0, lr + 8007eae: f8ce 7050 str.w r7, [lr, #80] ; 0x50 + 8007eb2: f8ce 8040 str.w r8, [lr, #64] ; 0x40 + 8007eb6: f8ce c04c str.w ip, [lr, #76] ; 0x4c + 8007eba: f7fe fa5d bl 8006378 + 8007ebe: b9f0 cbnz r0, 8007efe + 8007ec0: f8d5 c000 ldr.w ip, [r5] + 8007ec4: f8dc 3000 ldr.w r3, [ip] + 8007ec8: 2000 movs r0, #0 + 8007eca: f443 7380 orr.w r3, r3, #256 ; 0x100 + 8007ece: f885 0070 strb.w r0, [r5, #112] ; 0x70 + 8007ed2: f8cc 3000 str.w r3, [ip] + 8007ed6: f8dc 3008 ldr.w r3, [ip, #8] + 8007eda: f043 0301 orr.w r3, r3, #1 + 8007ede: f8cc 3008 str.w r3, [ip, #8] + 8007ee2: f8dc 3008 ldr.w r3, [ip, #8] + 8007ee6: f043 0340 orr.w r3, r3, #64 ; 0x40 + 8007eea: f8cc 3008 str.w r3, [ip, #8] + 8007eee: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} + 8007ef2: 2002 movs r0, #2 + 8007ef4: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} + 8007ef8: 2001 movs r0, #1 + 8007efa: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} + 8007efe: 2310 movs r3, #16 + 8007f00: f885 7070 strb.w r7, [r5, #112] ; 0x70 + 8007f04: 4620 mov r0, r4 + 8007f06: 67eb str r3, [r5, #124] ; 0x7c + 8007f08: 676e str r6, [r5, #116] ; 0x74 + 8007f0a: e7f3 b.n 8007ef4 + 8007f0c: 08007f55 .word 0x08007f55 + 8007f10: 08007f91 .word 0x08007f91 + 8007f14: 08007fa1 .word 0x08007fa1 + +08007f18 : + 8007f18: b508 push {r3, lr} + 8007f1a: 69c3 ldr r3, [r0, #28] + 8007f1c: 6b80 ldr r0, [r0, #56] ; 0x38 + 8007f1e: f5b3 7f80 cmp.w r3, #256 ; 0x100 + 8007f22: d00c beq.n 8007f3e + 8007f24: 6803 ldr r3, [r0, #0] + 8007f26: 2200 movs r2, #0 + 8007f28: f8a0 2052 strh.w r2, [r0, #82] ; 0x52 + 8007f2c: 689a ldr r2, [r3, #8] + 8007f2e: f022 0280 bic.w r2, r2, #128 ; 0x80 + 8007f32: 609a str r2, [r3, #8] + 8007f34: 681a ldr r2, [r3, #0] + 8007f36: f042 0240 orr.w r2, r2, #64 ; 0x40 + 8007f3a: 601a str r2, [r3, #0] + 8007f3c: bd08 pop {r3, pc} + 8007f3e: f7fc fa3d bl 80043bc + 8007f42: bd08 pop {r3, pc} + +08007f44 : + 8007f44: 4770 bx lr + 8007f46: bf00 nop + +08007f48 : + 8007f48: b508 push {r3, lr} + 8007f4a: 6b80 ldr r0, [r0, #56] ; 0x38 + 8007f4c: f7ff fffa bl 8007f44 + 8007f50: bd08 pop {r3, pc} + 8007f52: bf00 nop + +08007f54 : + 8007f54: b508 push {r3, lr} + 8007f56: 69c3 ldr r3, [r0, #28] + 8007f58: 6b80 ldr r0, [r0, #56] ; 0x38 + 8007f5a: f5b3 7f80 cmp.w r3, #256 ; 0x100 + 8007f5e: d011 beq.n 8007f84 + 8007f60: 6803 ldr r3, [r0, #0] + 8007f62: 2200 movs r2, #0 + 8007f64: 2120 movs r1, #32 + 8007f66: f8a0 205a strh.w r2, [r0, #90] ; 0x5a + 8007f6a: 681a ldr r2, [r3, #0] + 8007f6c: f422 7280 bic.w r2, r2, #256 ; 0x100 + 8007f70: 601a str r2, [r3, #0] + 8007f72: 689a ldr r2, [r3, #8] + 8007f74: f022 0201 bic.w r2, r2, #1 + 8007f78: 609a str r2, [r3, #8] + 8007f7a: 689a ldr r2, [r3, #8] + 8007f7c: f022 0240 bic.w r2, r2, #64 ; 0x40 + 8007f80: 609a str r2, [r3, #8] + 8007f82: 6781 str r1, [r0, #120] ; 0x78 + 8007f84: f7fc fa46 bl 8004414 + 8007f88: bd08 pop {r3, pc} + 8007f8a: bf00 nop + +08007f8c : + 8007f8c: 4770 bx lr + 8007f8e: bf00 nop + +08007f90 : + 8007f90: b508 push {r3, lr} + 8007f92: 6b80 ldr r0, [r0, #56] ; 0x38 + 8007f94: f7ff fffa bl 8007f8c + 8007f98: bd08 pop {r3, pc} + 8007f9a: bf00 nop + +08007f9c : + 8007f9c: 4770 bx lr + 8007f9e: bf00 nop + +08007fa0 : + 8007fa0: 6b83 ldr r3, [r0, #56] ; 0x38 + 8007fa2: 681a ldr r2, [r3, #0] + 8007fa4: b510 push {r4, lr} + 8007fa6: 6f5c ldr r4, [r3, #116] ; 0x74 + 8007fa8: 6f98 ldr r0, [r3, #120] ; 0x78 + 8007faa: 6891 ldr r1, [r2, #8] + 8007fac: 0609 lsls r1, r1, #24 + 8007fae: d501 bpl.n 8007fb4 + 8007fb0: 2c21 cmp r4, #33 ; 0x21 + 8007fb2: d01b beq.n 8007fec + 8007fb4: 6891 ldr r1, [r2, #8] + 8007fb6: 0649 lsls r1, r1, #25 + 8007fb8: d501 bpl.n 8007fbe + 8007fba: 2822 cmp r0, #34 ; 0x22 + 8007fbc: d007 beq.n 8007fce + 8007fbe: 6fda ldr r2, [r3, #124] ; 0x7c + 8007fc0: 4618 mov r0, r3 + 8007fc2: f042 0210 orr.w r2, r2, #16 + 8007fc6: 67da str r2, [r3, #124] ; 0x7c + 8007fc8: f7ff ffe8 bl 8007f9c + 8007fcc: bd10 pop {r4, pc} + 8007fce: 2000 movs r0, #0 + 8007fd0: 2420 movs r4, #32 + 8007fd2: f8a3 005a strh.w r0, [r3, #90] ; 0x5a + 8007fd6: 6811 ldr r1, [r2, #0] + 8007fd8: f421 7190 bic.w r1, r1, #288 ; 0x120 + 8007fdc: 6011 str r1, [r2, #0] + 8007fde: 6891 ldr r1, [r2, #8] + 8007fe0: f021 0101 bic.w r1, r1, #1 + 8007fe4: 6091 str r1, [r2, #8] + 8007fe6: 6618 str r0, [r3, #96] ; 0x60 + 8007fe8: 679c str r4, [r3, #120] ; 0x78 + 8007fea: e7e8 b.n 8007fbe + 8007fec: 2100 movs r1, #0 + 8007fee: 2420 movs r4, #32 + 8007ff0: f8a3 1052 strh.w r1, [r3, #82] ; 0x52 + 8007ff4: 6811 ldr r1, [r2, #0] + 8007ff6: f021 01c0 bic.w r1, r1, #192 ; 0xc0 + 8007ffa: 6011 str r1, [r2, #0] + 8007ffc: 675c str r4, [r3, #116] ; 0x74 + 8007ffe: e7d9 b.n 8007fb4 + +08008000 : + 8008000: 6803 ldr r3, [r0, #0] + 8008002: 69da ldr r2, [r3, #28] + 8008004: b570 push {r4, r5, r6, lr} + 8008006: 0716 lsls r6, r2, #28 + 8008008: 681d ldr r5, [r3, #0] + 800800a: 4604 mov r4, r0 + 800800c: 6899 ldr r1, [r3, #8] + 800800e: d047 beq.n 80080a0 + 8008010: f011 0101 ands.w r1, r1, #1 + 8008014: d04b beq.n 80080ae + 8008016: 07d0 lsls r0, r2, #31 + 8008018: d507 bpl.n 800802a + 800801a: 05ee lsls r6, r5, #23 + 800801c: d505 bpl.n 800802a + 800801e: 2001 movs r0, #1 + 8008020: 6218 str r0, [r3, #32] + 8008022: 6fe0 ldr r0, [r4, #124] ; 0x7c + 8008024: f040 0001 orr.w r0, r0, #1 + 8008028: 67e0 str r0, [r4, #124] ; 0x7c + 800802a: 0790 lsls r0, r2, #30 + 800802c: d45d bmi.n 80080ea + 800802e: 0750 lsls r0, r2, #29 + 8008030: d501 bpl.n 8008036 + 8008032: 2900 cmp r1, #0 + 8008034: d163 bne.n 80080fe + 8008036: 0716 lsls r6, r2, #28 + 8008038: d503 bpl.n 8008042 + 800803a: 06a8 lsls r0, r5, #26 + 800803c: d466 bmi.n 800810c + 800803e: 2900 cmp r1, #0 + 8008040: d164 bne.n 800810c + 8008042: 6fe1 ldr r1, [r4, #124] ; 0x7c + 8008044: 2900 cmp r1, #0 + 8008046: d031 beq.n 80080ac + 8008048: 0696 lsls r6, r2, #26 + 800804a: d501 bpl.n 8008050 + 800804c: 06a8 lsls r0, r5, #26 + 800804e: d468 bmi.n 8008122 + 8008050: 6fe5 ldr r5, [r4, #124] ; 0x7c + 8008052: 6899 ldr r1, [r3, #8] + 8008054: 0649 lsls r1, r1, #25 + 8008056: d402 bmi.n 800805e + 8008058: f015 0508 ands.w r5, r5, #8 + 800805c: d068 beq.n 8008130 + 800805e: 681a ldr r2, [r3, #0] + 8008060: 2020 movs r0, #32 + 8008062: 2100 movs r1, #0 + 8008064: f422 7290 bic.w r2, r2, #288 ; 0x120 + 8008068: 601a str r2, [r3, #0] + 800806a: 689a ldr r2, [r3, #8] + 800806c: f022 0201 bic.w r2, r2, #1 + 8008070: 609a str r2, [r3, #8] + 8008072: 67a0 str r0, [r4, #120] ; 0x78 + 8008074: 689a ldr r2, [r3, #8] + 8008076: 6621 str r1, [r4, #96] ; 0x60 + 8008078: 0652 lsls r2, r2, #25 + 800807a: d54e bpl.n 800811a + 800807c: 689a ldr r2, [r3, #8] + 800807e: 6ee1 ldr r1, [r4, #108] ; 0x6c + 8008080: f022 0240 bic.w r2, r2, #64 ; 0x40 + 8008084: 609a str r2, [r3, #8] + 8008086: 2900 cmp r1, #0 + 8008088: d047 beq.n 800811a + 800808a: 4b2c ldr r3, [pc, #176] ; (800813c ) + 800808c: 4608 mov r0, r1 + 800808e: 650b str r3, [r1, #80] ; 0x50 + 8008090: f7fe f9b8 bl 8006404 + 8008094: b150 cbz r0, 80080ac + 8008096: 6ee0 ldr r0, [r4, #108] ; 0x6c + 8008098: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} + 800809c: 6d03 ldr r3, [r0, #80] ; 0x50 + 800809e: 4718 bx r3 + 80080a0: 0691 lsls r1, r2, #26 + 80080a2: d507 bpl.n 80080b4 + 80080a4: 06ae lsls r6, r5, #26 + 80080a6: d505 bpl.n 80080b4 + 80080a8: 6e03 ldr r3, [r0, #96] ; 0x60 + 80080aa: b9db cbnz r3, 80080e4 + 80080ac: bd70 pop {r4, r5, r6, pc} + 80080ae: f415 7f90 tst.w r5, #288 ; 0x120 + 80080b2: d1b0 bne.n 8008016 + 80080b4: 0616 lsls r6, r2, #24 + 80080b6: d40f bmi.n 80080d8 + 80080b8: 0651 lsls r1, r2, #25 + 80080ba: d5f7 bpl.n 80080ac + 80080bc: 066a lsls r2, r5, #25 + 80080be: d5f5 bpl.n 80080ac + 80080c0: 681a ldr r2, [r3, #0] + 80080c2: 2520 movs r5, #32 + 80080c4: 2100 movs r1, #0 + 80080c6: 4620 mov r0, r4 + 80080c8: f022 0240 bic.w r2, r2, #64 ; 0x40 + 80080cc: 601a str r2, [r3, #0] + 80080ce: 6765 str r5, [r4, #116] ; 0x74 + 80080d0: 6661 str r1, [r4, #100] ; 0x64 + 80080d2: f7fc f973 bl 80043bc + 80080d6: bd70 pop {r4, r5, r6, pc} + 80080d8: 0628 lsls r0, r5, #24 + 80080da: d5ed bpl.n 80080b8 + 80080dc: 6e63 ldr r3, [r4, #100] ; 0x64 + 80080de: 2b00 cmp r3, #0 + 80080e0: d0e4 beq.n 80080ac + 80080e2: 4620 mov r0, r4 + 80080e4: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} + 80080e8: 4718 bx r3 + 80080ea: 2900 cmp r1, #0 + 80080ec: d0a3 beq.n 8008036 + 80080ee: 2002 movs r0, #2 + 80080f0: 0756 lsls r6, r2, #29 + 80080f2: 6218 str r0, [r3, #32] + 80080f4: 6fe0 ldr r0, [r4, #124] ; 0x7c + 80080f6: f040 0004 orr.w r0, r0, #4 + 80080fa: 67e0 str r0, [r4, #124] ; 0x7c + 80080fc: d59b bpl.n 8008036 + 80080fe: 2004 movs r0, #4 + 8008100: 6218 str r0, [r3, #32] + 8008102: 6fe0 ldr r0, [r4, #124] ; 0x7c + 8008104: f040 0002 orr.w r0, r0, #2 + 8008108: 67e0 str r0, [r4, #124] ; 0x7c + 800810a: e794 b.n 8008036 + 800810c: 2108 movs r1, #8 + 800810e: 6219 str r1, [r3, #32] + 8008110: 6fe1 ldr r1, [r4, #124] ; 0x7c + 8008112: f041 0108 orr.w r1, r1, #8 + 8008116: 67e1 str r1, [r4, #124] ; 0x7c + 8008118: e793 b.n 8008042 + 800811a: 4620 mov r0, r4 + 800811c: f7ff ff3e bl 8007f9c + 8008120: bd70 pop {r4, r5, r6, pc} + 8008122: 6e22 ldr r2, [r4, #96] ; 0x60 + 8008124: 2a00 cmp r2, #0 + 8008126: d093 beq.n 8008050 + 8008128: 4620 mov r0, r4 + 800812a: 4790 blx r2 + 800812c: 6823 ldr r3, [r4, #0] + 800812e: e78f b.n 8008050 + 8008130: 4620 mov r0, r4 + 8008132: f7ff ff33 bl 8007f9c + 8008136: 67e5 str r5, [r4, #124] ; 0x7c + 8008138: bd70 pop {r4, r5, r6, pc} + 800813a: bf00 nop + 800813c: 08008141 .word 0x08008141 + +08008140 : + 8008140: b508 push {r3, lr} + 8008142: 2200 movs r2, #0 + 8008144: 6b83 ldr r3, [r0, #56] ; 0x38 + 8008146: f8a3 205a strh.w r2, [r3, #90] ; 0x5a + 800814a: 4618 mov r0, r3 + 800814c: f8a3 2052 strh.w r2, [r3, #82] ; 0x52 + 8008150: f7ff ff24 bl 8007f9c + 8008154: bd08 pop {r3, pc} + 8008156: bf00 nop + +08008158 : + 8008158: 6a43 ldr r3, [r0, #36] ; 0x24 + 800815a: 07da lsls r2, r3, #31 + 800815c: b410 push {r4} + 800815e: d506 bpl.n 800816e + 8008160: 6801 ldr r1, [r0, #0] + 8008162: 6a84 ldr r4, [r0, #40] ; 0x28 + 8008164: 684a ldr r2, [r1, #4] + 8008166: f422 3200 bic.w r2, r2, #131072 ; 0x20000 + 800816a: 4322 orrs r2, r4 + 800816c: 604a str r2, [r1, #4] + 800816e: 079c lsls r4, r3, #30 + 8008170: d506 bpl.n 8008180 + 8008172: 6801 ldr r1, [r0, #0] + 8008174: 6ac4 ldr r4, [r0, #44] ; 0x2c + 8008176: 684a ldr r2, [r1, #4] + 8008178: f422 3280 bic.w r2, r2, #65536 ; 0x10000 + 800817c: 4322 orrs r2, r4 + 800817e: 604a str r2, [r1, #4] + 8008180: 0759 lsls r1, r3, #29 + 8008182: d506 bpl.n 8008192 + 8008184: 6801 ldr r1, [r0, #0] + 8008186: 6b04 ldr r4, [r0, #48] ; 0x30 + 8008188: 684a ldr r2, [r1, #4] + 800818a: f422 2280 bic.w r2, r2, #262144 ; 0x40000 + 800818e: 4322 orrs r2, r4 + 8008190: 604a str r2, [r1, #4] + 8008192: 071a lsls r2, r3, #28 + 8008194: d506 bpl.n 80081a4 + 8008196: 6801 ldr r1, [r0, #0] + 8008198: 6b44 ldr r4, [r0, #52] ; 0x34 + 800819a: 684a ldr r2, [r1, #4] + 800819c: f422 4200 bic.w r2, r2, #32768 ; 0x8000 + 80081a0: 4322 orrs r2, r4 + 80081a2: 604a str r2, [r1, #4] + 80081a4: 06dc lsls r4, r3, #27 + 80081a6: d506 bpl.n 80081b6 + 80081a8: 6801 ldr r1, [r0, #0] + 80081aa: 6b84 ldr r4, [r0, #56] ; 0x38 + 80081ac: 688a ldr r2, [r1, #8] + 80081ae: f422 5280 bic.w r2, r2, #4096 ; 0x1000 + 80081b2: 4322 orrs r2, r4 + 80081b4: 608a str r2, [r1, #8] + 80081b6: 0699 lsls r1, r3, #26 + 80081b8: d506 bpl.n 80081c8 + 80081ba: 6801 ldr r1, [r0, #0] + 80081bc: 6bc4 ldr r4, [r0, #60] ; 0x3c + 80081be: 688a ldr r2, [r1, #8] + 80081c0: f422 5200 bic.w r2, r2, #8192 ; 0x2000 + 80081c4: 4322 orrs r2, r4 + 80081c6: 608a str r2, [r1, #8] + 80081c8: 065a lsls r2, r3, #25 + 80081ca: d50a bpl.n 80081e2 + 80081cc: 6801 ldr r1, [r0, #0] + 80081ce: 6c04 ldr r4, [r0, #64] ; 0x40 + 80081d0: 684a ldr r2, [r1, #4] + 80081d2: f5b4 1f80 cmp.w r4, #1048576 ; 0x100000 + 80081d6: f422 1280 bic.w r2, r2, #1048576 ; 0x100000 + 80081da: ea42 0204 orr.w r2, r2, r4 + 80081de: 604a str r2, [r1, #4] + 80081e0: d00b beq.n 80081fa + 80081e2: 061b lsls r3, r3, #24 + 80081e4: d506 bpl.n 80081f4 + 80081e6: 6802 ldr r2, [r0, #0] + 80081e8: 6c81 ldr r1, [r0, #72] ; 0x48 + 80081ea: 6853 ldr r3, [r2, #4] + 80081ec: f423 2300 bic.w r3, r3, #524288 ; 0x80000 + 80081f0: 430b orrs r3, r1 + 80081f2: 6053 str r3, [r2, #4] + 80081f4: f85d 4b04 ldr.w r4, [sp], #4 + 80081f8: 4770 bx lr + 80081fa: 684a ldr r2, [r1, #4] + 80081fc: 6c44 ldr r4, [r0, #68] ; 0x44 + 80081fe: f422 02c0 bic.w r2, r2, #6291456 ; 0x600000 + 8008202: 4322 orrs r2, r4 + 8008204: 604a str r2, [r1, #4] + 8008206: e7ec b.n 80081e2 + +08008208 : + 8008208: 2800 cmp r0, #0 + 800820a: d04f beq.n 80082ac + 800820c: 6f43 ldr r3, [r0, #116] ; 0x74 + 800820e: b570 push {r4, r5, r6, lr} + 8008210: 4604 mov r4, r0 + 8008212: 2b00 cmp r3, #0 + 8008214: d045 beq.n 80082a2 + 8008216: 6823 ldr r3, [r4, #0] + 8008218: 2124 movs r1, #36 ; 0x24 + 800821a: 6920 ldr r0, [r4, #16] + 800821c: 6761 str r1, [r4, #116] ; 0x74 + 800821e: 68a2 ldr r2, [r4, #8] + 8008220: 6819 ldr r1, [r3, #0] + 8008222: 4302 orrs r2, r0 + 8008224: 6960 ldr r0, [r4, #20] + 8008226: f021 0101 bic.w r1, r1, #1 + 800822a: 4dbe ldr r5, [pc, #760] ; (8008524 ) + 800822c: 4302 orrs r2, r0 + 800822e: 69e0 ldr r0, [r4, #28] + 8008230: 6019 str r1, [r3, #0] + 8008232: 6819 ldr r1, [r3, #0] + 8008234: 4302 orrs r2, r0 + 8008236: 68e6 ldr r6, [r4, #12] + 8008238: 400d ands r5, r1 + 800823a: 69a1 ldr r1, [r4, #24] + 800823c: 432a orrs r2, r5 + 800823e: 6a25 ldr r5, [r4, #32] + 8008240: 601a str r2, [r3, #0] + 8008242: ea41 0205 orr.w r2, r1, r5 + 8008246: 6859 ldr r1, [r3, #4] + 8008248: 4db7 ldr r5, [pc, #732] ; (8008528 ) + 800824a: f421 5140 bic.w r1, r1, #12288 ; 0x3000 + 800824e: 42ab cmp r3, r5 + 8008250: ea41 0106 orr.w r1, r1, r6 + 8008254: 6059 str r1, [r3, #4] + 8008256: 6899 ldr r1, [r3, #8] + 8008258: f421 6130 bic.w r1, r1, #2816 ; 0xb00 + 800825c: ea42 0201 orr.w r2, r2, r1 + 8008260: 609a str r2, [r3, #8] + 8008262: d025 beq.n 80082b0 + 8008264: 4ab1 ldr r2, [pc, #708] ; (800852c ) + 8008266: 4293 cmp r3, r2 + 8008268: d044 beq.n 80082f4 + 800826a: 4ab1 ldr r2, [pc, #708] ; (8008530 ) + 800826c: 4293 cmp r3, r2 + 800826e: f000 80d3 beq.w 8008418 + 8008272: 4ab0 ldr r2, [pc, #704] ; (8008534 ) + 8008274: 4293 cmp r3, r2 + 8008276: d045 beq.n 8008304 + 8008278: 4aaf ldr r2, [pc, #700] ; (8008538 ) + 800827a: 4293 cmp r3, r2 + 800827c: f000 80e1 beq.w 8008442 + 8008280: 4aae ldr r2, [pc, #696] ; (800853c ) + 8008282: 4293 cmp r3, r2 + 8008284: f000 816a beq.w 800855c + 8008288: 4aad ldr r2, [pc, #692] ; (8008540 ) + 800828a: 4293 cmp r3, r2 + 800828c: f000 8179 beq.w 8008582 + 8008290: 4aac ldr r2, [pc, #688] ; (8008544 ) + 8008292: 4293 cmp r3, r2 + 8008294: f000 8135 beq.w 8008502 + 8008298: 2300 movs r3, #0 + 800829a: 2001 movs r0, #1 + 800829c: e9c4 3318 strd r3, r3, [r4, #96] ; 0x60 + 80082a0: bd70 pop {r4, r5, r6, pc} + 80082a2: f880 3070 strb.w r3, [r0, #112] ; 0x70 + 80082a6: f7fd fd71 bl 8005d8c + 80082aa: e7b4 b.n 8008216 + 80082ac: 2001 movs r0, #1 + 80082ae: 4770 bx lr + 80082b0: 4ba5 ldr r3, [pc, #660] ; (8008548 ) + 80082b2: 4aa6 ldr r2, [pc, #664] ; (800854c ) + 80082b4: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 80082b8: f003 0303 and.w r3, r3, #3 + 80082bc: 5cd3 ldrb r3, [r2, r3] + 80082be: f5b0 4f00 cmp.w r0, #32768 ; 0x8000 + 80082c2: d02f beq.n 8008324 + 80082c4: 2b08 cmp r3, #8 + 80082c6: d8e7 bhi.n 8008298 + 80082c8: a201 add r2, pc, #4 ; (adr r2, 80082d0 ) + 80082ca: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 80082ce: bf00 nop + 80082d0: 08008407 .word 0x08008407 + 80082d4: 08008361 .word 0x08008361 + 80082d8: 08008433 .word 0x08008433 + 80082dc: 08008299 .word 0x08008299 + 80082e0: 08008459 .word 0x08008459 + 80082e4: 08008299 .word 0x08008299 + 80082e8: 08008299 .word 0x08008299 + 80082ec: 08008299 .word 0x08008299 + 80082f0: 0800846b .word 0x0800846b + 80082f4: 4b94 ldr r3, [pc, #592] ; (8008548 ) + 80082f6: 4a96 ldr r2, [pc, #600] ; (8008550 ) + 80082f8: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 80082fc: f003 030c and.w r3, r3, #12 + 8008300: 5cd3 ldrb r3, [r2, r3] + 8008302: e7dc b.n 80082be + 8008304: 4b90 ldr r3, [pc, #576] ; (8008548 ) + 8008306: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 800830a: f003 03c0 and.w r3, r3, #192 ; 0xc0 + 800830e: 2b40 cmp r3, #64 ; 0x40 + 8008310: f000 809f beq.w 8008452 + 8008314: d971 bls.n 80083fa + 8008316: 2b80 cmp r3, #128 ; 0x80 + 8008318: f000 8088 beq.w 800842c + 800831c: 2bc0 cmp r3, #192 ; 0xc0 + 800831e: f000 80b9 beq.w 8008494 + 8008322: e7b9 b.n 8008298 + 8008324: 2b08 cmp r3, #8 + 8008326: d8b7 bhi.n 8008298 + 8008328: a201 add r2, pc, #4 ; (adr r2, 8008330 ) + 800832a: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 800832e: bf00 nop + 8008330: 080084fd .word 0x080084fd + 8008334: 080084d3 .word 0x080084d3 + 8008338: 080084ed .word 0x080084ed + 800833c: 08008299 .word 0x08008299 + 8008340: 080084e7 .word 0x080084e7 + 8008344: 08008299 .word 0x08008299 + 8008348: 08008299 .word 0x08008299 + 800834c: 08008299 .word 0x08008299 + 8008350: 0800849b .word 0x0800849b + 8008354: 2b00 cmp r3, #0 + 8008356: d19f bne.n 8008298 + 8008358: f5b0 4f00 cmp.w r0, #32768 ; 0x8000 + 800835c: f000 80b9 beq.w 80084d2 + 8008360: f7fe fd38 bl 8006dd4 + 8008364: 6863 ldr r3, [r4, #4] + 8008366: eb00 0253 add.w r2, r0, r3, lsr #1 + 800836a: fbb2 f2f3 udiv r2, r2, r3 + 800836e: b292 uxth r2, r2 + 8008370: f1a2 0110 sub.w r1, r2, #16 + 8008374: f64f 73ef movw r3, #65519 ; 0xffef + 8008378: 4299 cmp r1, r3 + 800837a: d88d bhi.n 8008298 + 800837c: 6823 ldr r3, [r4, #0] + 800837e: 2100 movs r1, #0 + 8008380: 60da str r2, [r3, #12] + 8008382: e9c4 1118 strd r1, r1, [r4, #96] ; 0x60 + 8008386: 6a62 ldr r2, [r4, #36] ; 0x24 + 8008388: 2a00 cmp r2, #0 + 800838a: d176 bne.n 800847a + 800838c: 685a ldr r2, [r3, #4] + 800838e: 2100 movs r1, #0 + 8008390: f422 4290 bic.w r2, r2, #18432 ; 0x4800 + 8008394: 605a str r2, [r3, #4] + 8008396: 689a ldr r2, [r3, #8] + 8008398: f022 022a bic.w r2, r2, #42 ; 0x2a + 800839c: 609a str r2, [r3, #8] + 800839e: 681a ldr r2, [r3, #0] + 80083a0: f042 0201 orr.w r2, r2, #1 + 80083a4: 601a str r2, [r3, #0] + 80083a6: 67e1 str r1, [r4, #124] ; 0x7c + 80083a8: f7fd fed4 bl 8006154 + 80083ac: 6823 ldr r3, [r4, #0] + 80083ae: 4606 mov r6, r0 + 80083b0: 681a ldr r2, [r3, #0] + 80083b2: 0712 lsls r2, r2, #28 + 80083b4: d407 bmi.n 80083c6 + 80083b6: 2220 movs r2, #32 + 80083b8: 2300 movs r3, #0 + 80083ba: 6762 str r2, [r4, #116] ; 0x74 + 80083bc: 4618 mov r0, r3 + 80083be: 67a2 str r2, [r4, #120] ; 0x78 + 80083c0: f884 3070 strb.w r3, [r4, #112] ; 0x70 + 80083c4: bd70 pop {r4, r5, r6, pc} + 80083c6: 69dd ldr r5, [r3, #28] + 80083c8: f415 1500 ands.w r5, r5, #2097152 ; 0x200000 + 80083cc: d1f3 bne.n 80083b6 + 80083ce: f7fd fec1 bl 8006154 + 80083d2: 1b80 subs r0, r0, r6 + 80083d4: 6823 ldr r3, [r4, #0] + 80083d6: f1b0 7f00 cmp.w r0, #33554432 ; 0x2000000 + 80083da: d3f4 bcc.n 80083c6 + 80083dc: 681a ldr r2, [r3, #0] + 80083de: 2120 movs r1, #32 + 80083e0: 2003 movs r0, #3 + 80083e2: f422 72d0 bic.w r2, r2, #416 ; 0x1a0 + 80083e6: 601a str r2, [r3, #0] + 80083e8: 689a ldr r2, [r3, #8] + 80083ea: f022 0201 bic.w r2, r2, #1 + 80083ee: 609a str r2, [r3, #8] + 80083f0: 6761 str r1, [r4, #116] ; 0x74 + 80083f2: f884 5070 strb.w r5, [r4, #112] ; 0x70 + 80083f6: 67a1 str r1, [r4, #120] ; 0x78 + 80083f8: bd70 pop {r4, r5, r6, pc} + 80083fa: 2b00 cmp r3, #0 + 80083fc: f47f af4c bne.w 8008298 + 8008400: f5b0 4f00 cmp.w r0, #32768 ; 0x8000 + 8008404: d07a beq.n 80084fc + 8008406: f7fe fcd5 bl 8006db4 + 800840a: 6863 ldr r3, [r4, #4] + 800840c: eb00 0253 add.w r2, r0, r3, lsr #1 + 8008410: fbb2 f2f3 udiv r2, r2, r3 + 8008414: b292 uxth r2, r2 + 8008416: e7ab b.n 8008370 + 8008418: 4b4b ldr r3, [pc, #300] ; (8008548 ) + 800841a: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 800841e: f003 0330 and.w r3, r3, #48 ; 0x30 + 8008422: 2b10 cmp r3, #16 + 8008424: d015 beq.n 8008452 + 8008426: d9e8 bls.n 80083fa + 8008428: 2b20 cmp r3, #32 + 800842a: d14f bne.n 80084cc + 800842c: f5b0 4f00 cmp.w r0, #32768 ; 0x8000 + 8008430: d05c beq.n 80084ec + 8008432: 6863 ldr r3, [r4, #4] + 8008434: 4a47 ldr r2, [pc, #284] ; (8008554 ) + 8008436: eb02 0253 add.w r2, r2, r3, lsr #1 + 800843a: fbb2 f2f3 udiv r2, r2, r3 + 800843e: b292 uxth r2, r2 + 8008440: e796 b.n 8008370 + 8008442: 4b41 ldr r3, [pc, #260] ; (8008548 ) + 8008444: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 8008448: f403 7340 and.w r3, r3, #768 ; 0x300 + 800844c: f5b3 7f80 cmp.w r3, #256 ; 0x100 + 8008450: d118 bne.n 8008484 + 8008452: f5b0 4f00 cmp.w r0, #32768 ; 0x8000 + 8008456: d046 beq.n 80084e6 + 8008458: f7fe fc78 bl 8006d4c + 800845c: 6863 ldr r3, [r4, #4] + 800845e: eb00 0253 add.w r2, r0, r3, lsr #1 + 8008462: fbb2 f2f3 udiv r2, r2, r3 + 8008466: b292 uxth r2, r2 + 8008468: e782 b.n 8008370 + 800846a: 6863 ldr r3, [r4, #4] + 800846c: 085a lsrs r2, r3, #1 + 800846e: f502 4200 add.w r2, r2, #32768 ; 0x8000 + 8008472: fbb2 f2f3 udiv r2, r2, r3 + 8008476: b292 uxth r2, r2 + 8008478: e77a b.n 8008370 + 800847a: 4620 mov r0, r4 + 800847c: f7ff fe6c bl 8008158 + 8008480: 6823 ldr r3, [r4, #0] + 8008482: e783 b.n 800838c + 8008484: d9b9 bls.n 80083fa + 8008486: f5b3 7f00 cmp.w r3, #512 ; 0x200 + 800848a: d0cf beq.n 800842c + 800848c: f5b3 7f40 cmp.w r3, #768 ; 0x300 + 8008490: f47f af02 bne.w 8008298 + 8008494: f5b0 4f00 cmp.w r0, #32768 ; 0x8000 + 8008498: d1e7 bne.n 800846a + 800849a: 6862 ldr r2, [r4, #4] + 800849c: 0853 lsrs r3, r2, #1 + 800849e: f503 3380 add.w r3, r3, #65536 ; 0x10000 + 80084a2: fbb3 f3f2 udiv r3, r3, r2 + 80084a6: b29b uxth r3, r3 + 80084a8: f1a3 0110 sub.w r1, r3, #16 + 80084ac: f64f 72ef movw r2, #65519 ; 0xffef + 80084b0: 4291 cmp r1, r2 + 80084b2: f63f aef1 bhi.w 8008298 + 80084b6: f023 010f bic.w r1, r3, #15 + 80084ba: f3c3 0242 ubfx r2, r3, #1, #3 + 80084be: 2000 movs r0, #0 + 80084c0: 6823 ldr r3, [r4, #0] + 80084c2: 430a orrs r2, r1 + 80084c4: 60da str r2, [r3, #12] + 80084c6: e9c4 0018 strd r0, r0, [r4, #96] ; 0x60 + 80084ca: e75c b.n 8008386 + 80084cc: 2b30 cmp r3, #48 ; 0x30 + 80084ce: d0e1 beq.n 8008494 + 80084d0: e6e2 b.n 8008298 + 80084d2: f7fe fc7f bl 8006dd4 + 80084d6: 6862 ldr r2, [r4, #4] + 80084d8: 0853 lsrs r3, r2, #1 + 80084da: eb03 0340 add.w r3, r3, r0, lsl #1 + 80084de: fbb3 f3f2 udiv r3, r3, r2 + 80084e2: b29b uxth r3, r3 + 80084e4: e7e0 b.n 80084a8 + 80084e6: f7fe fc31 bl 8006d4c + 80084ea: e7f4 b.n 80084d6 + 80084ec: 6862 ldr r2, [r4, #4] + 80084ee: 4b1a ldr r3, [pc, #104] ; (8008558 ) + 80084f0: eb03 0352 add.w r3, r3, r2, lsr #1 + 80084f4: fbb3 f3f2 udiv r3, r3, r2 + 80084f8: b29b uxth r3, r3 + 80084fa: e7d5 b.n 80084a8 + 80084fc: f7fe fc5a bl 8006db4 + 8008500: e7e9 b.n 80084d6 + 8008502: 4b11 ldr r3, [pc, #68] ; (8008548 ) + 8008504: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 8008508: f403 4340 and.w r3, r3, #49152 ; 0xc000 + 800850c: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 + 8008510: d09f beq.n 8008452 + 8008512: f67f af72 bls.w 80083fa + 8008516: f5b3 4f00 cmp.w r3, #32768 ; 0x8000 + 800851a: d087 beq.n 800842c + 800851c: f5b3 4f40 cmp.w r3, #49152 ; 0xc000 + 8008520: d0b8 beq.n 8008494 + 8008522: e6b9 b.n 8008298 + 8008524: efff69f3 .word 0xefff69f3 + 8008528: 40011000 .word 0x40011000 + 800852c: 40004400 .word 0x40004400 + 8008530: 40004800 .word 0x40004800 + 8008534: 40004c00 .word 0x40004c00 + 8008538: 40005000 .word 0x40005000 + 800853c: 40011400 .word 0x40011400 + 8008540: 40007800 .word 0x40007800 + 8008544: 40007c00 .word 0x40007c00 + 8008548: 40023800 .word 0x40023800 + 800854c: 0800a4b0 .word 0x0800a4b0 + 8008550: 0800a4b4 .word 0x0800a4b4 + 8008554: 00f42400 .word 0x00f42400 + 8008558: 01e84800 .word 0x01e84800 + 800855c: 4b13 ldr r3, [pc, #76] ; (80085ac ) + 800855e: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 8008562: f403 6340 and.w r3, r3, #3072 ; 0xc00 + 8008566: f5b3 6f80 cmp.w r3, #1024 ; 0x400 + 800856a: f43f af72 beq.w 8008452 + 800856e: f67f aef1 bls.w 8008354 + 8008572: f5b3 6f00 cmp.w r3, #2048 ; 0x800 + 8008576: f43f af59 beq.w 800842c + 800857a: f5b3 6f40 cmp.w r3, #3072 ; 0xc00 + 800857e: d089 beq.n 8008494 + 8008580: e68a b.n 8008298 + 8008582: 4b0a ldr r3, [pc, #40] ; (80085ac ) + 8008584: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 8008588: f403 5340 and.w r3, r3, #12288 ; 0x3000 + 800858c: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 + 8008590: f43f af5f beq.w 8008452 + 8008594: f67f af31 bls.w 80083fa + 8008598: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 + 800859c: f43f af46 beq.w 800842c + 80085a0: f5b3 5f40 cmp.w r3, #12288 ; 0x3000 + 80085a4: f43f af76 beq.w 8008494 + 80085a8: e676 b.n 8008298 + 80085aa: bf00 nop + 80085ac: 40023800 .word 0x40023800 + +080085b0 : + 80085b0: b51f push {r0, r1, r2, r3, r4, lr} + 80085b2: eeb0 7b40 vmov.f64 d7, d0 + 80085b6: ee17 3a90 vmov r3, s15 + 80085ba: 4a19 ldr r2, [pc, #100] ; (8008620 ) + 80085bc: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000 + 80085c0: 4293 cmp r3, r2 + 80085c2: dc04 bgt.n 80085ce + 80085c4: ed9f 1b14 vldr d1, [pc, #80] ; 8008618 + 80085c8: f000 fb56 bl 8008c78 <__kernel_cos> + 80085cc: e004 b.n 80085d8 + 80085ce: 4a15 ldr r2, [pc, #84] ; (8008624 ) + 80085d0: 4293 cmp r3, r2 + 80085d2: dd04 ble.n 80085de + 80085d4: ee30 0b40 vsub.f64 d0, d0, d0 + 80085d8: b005 add sp, #20 + 80085da: f85d fb04 ldr.w pc, [sp], #4 + 80085de: 4668 mov r0, sp + 80085e0: f000 f8e2 bl 80087a8 <__ieee754_rem_pio2> + 80085e4: f000 0003 and.w r0, r0, #3 + 80085e8: 2801 cmp r0, #1 + 80085ea: ed9d 1b02 vldr d1, [sp, #8] + 80085ee: ed9d 0b00 vldr d0, [sp] + 80085f2: d007 beq.n 8008604 + 80085f4: 2802 cmp r0, #2 + 80085f6: d00a beq.n 800860e + 80085f8: 2800 cmp r0, #0 + 80085fa: d0e5 beq.n 80085c8 + 80085fc: 2001 movs r0, #1 + 80085fe: f000 fe43 bl 8009288 <__kernel_sin> + 8008602: e7e9 b.n 80085d8 + 8008604: f000 fe40 bl 8009288 <__kernel_sin> + 8008608: eeb1 0b40 vneg.f64 d0, d0 + 800860c: e7e4 b.n 80085d8 + 800860e: f000 fb33 bl 8008c78 <__kernel_cos> + 8008612: e7f9 b.n 8008608 + 8008614: f3af 8000 nop.w + ... + 8008620: 3fe921fb .word 0x3fe921fb + 8008624: 7fefffff .word 0x7fefffff + +08008628 : + 8008628: b51f push {r0, r1, r2, r3, r4, lr} + 800862a: eeb0 7b40 vmov.f64 d7, d0 + 800862e: ee17 3a90 vmov r3, s15 + 8008632: 4a19 ldr r2, [pc, #100] ; (8008698 ) + 8008634: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000 + 8008638: 4293 cmp r3, r2 + 800863a: dc05 bgt.n 8008648 + 800863c: ed9f 1b14 vldr d1, [pc, #80] ; 8008690 + 8008640: 2000 movs r0, #0 + 8008642: f000 fe21 bl 8009288 <__kernel_sin> + 8008646: e004 b.n 8008652 + 8008648: 4a14 ldr r2, [pc, #80] ; (800869c ) + 800864a: 4293 cmp r3, r2 + 800864c: dd04 ble.n 8008658 + 800864e: ee30 0b40 vsub.f64 d0, d0, d0 + 8008652: b005 add sp, #20 + 8008654: f85d fb04 ldr.w pc, [sp], #4 + 8008658: 4668 mov r0, sp + 800865a: f000 f8a5 bl 80087a8 <__ieee754_rem_pio2> + 800865e: f000 0003 and.w r0, r0, #3 + 8008662: 2801 cmp r0, #1 + 8008664: ed9d 1b02 vldr d1, [sp, #8] + 8008668: ed9d 0b00 vldr d0, [sp] + 800866c: d004 beq.n 8008678 + 800866e: 2802 cmp r0, #2 + 8008670: d005 beq.n 800867e + 8008672: b950 cbnz r0, 800868a + 8008674: 2001 movs r0, #1 + 8008676: e7e4 b.n 8008642 + 8008678: f000 fafe bl 8008c78 <__kernel_cos> + 800867c: e7e9 b.n 8008652 + 800867e: 2001 movs r0, #1 + 8008680: f000 fe02 bl 8009288 <__kernel_sin> + 8008684: eeb1 0b40 vneg.f64 d0, d0 + 8008688: e7e3 b.n 8008652 + 800868a: f000 faf5 bl 8008c78 <__kernel_cos> + 800868e: e7f9 b.n 8008684 + ... + 8008698: 3fe921fb .word 0x3fe921fb + 800869c: 7fefffff .word 0x7fefffff + +080086a0 : + 80086a0: ee10 3a10 vmov r3, s0 + 80086a4: b507 push {r0, r1, r2, lr} + 80086a6: 4a1c ldr r2, [pc, #112] ; (8008718 ) + 80086a8: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000 + 80086ac: 4293 cmp r3, r2 + 80086ae: dc04 bgt.n 80086ba + 80086b0: eddf 0a1a vldr s1, [pc, #104] ; 800871c + 80086b4: f000 fe40 bl 8009338 <__kernel_cosf> + 80086b8: e004 b.n 80086c4 + 80086ba: f1b3 4fff cmp.w r3, #2139095040 ; 0x7f800000 + 80086be: db04 blt.n 80086ca + 80086c0: ee30 0a40 vsub.f32 s0, s0, s0 + 80086c4: b003 add sp, #12 + 80086c6: f85d fb04 ldr.w pc, [sp], #4 + 80086ca: 4668 mov r0, sp + 80086cc: f000 f9a8 bl 8008a20 <__ieee754_rem_pio2f> + 80086d0: f000 0003 and.w r0, r0, #3 + 80086d4: 2801 cmp r0, #1 + 80086d6: d007 beq.n 80086e8 + 80086d8: 2802 cmp r0, #2 + 80086da: d00e beq.n 80086fa + 80086dc: b9a0 cbnz r0, 8008708 + 80086de: eddd 0a01 vldr s1, [sp, #4] + 80086e2: ed9d 0a00 vldr s0, [sp] + 80086e6: e7e5 b.n 80086b4 + 80086e8: eddd 0a01 vldr s1, [sp, #4] + 80086ec: ed9d 0a00 vldr s0, [sp] + 80086f0: f001 f902 bl 80098f8 <__kernel_sinf> + 80086f4: eeb1 0a40 vneg.f32 s0, s0 + 80086f8: e7e4 b.n 80086c4 + 80086fa: eddd 0a01 vldr s1, [sp, #4] + 80086fe: ed9d 0a00 vldr s0, [sp] + 8008702: f000 fe19 bl 8009338 <__kernel_cosf> + 8008706: e7f5 b.n 80086f4 + 8008708: 2001 movs r0, #1 + 800870a: eddd 0a01 vldr s1, [sp, #4] + 800870e: ed9d 0a00 vldr s0, [sp] + 8008712: f001 f8f1 bl 80098f8 <__kernel_sinf> + 8008716: e7d5 b.n 80086c4 + 8008718: 3f490fd8 .word 0x3f490fd8 + 800871c: 00000000 .word 0x00000000 + +08008720 : + 8008720: ee10 3a10 vmov r3, s0 + 8008724: b507 push {r0, r1, r2, lr} + 8008726: 4a1d ldr r2, [pc, #116] ; (800879c ) + 8008728: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000 + 800872c: 4293 cmp r3, r2 + 800872e: dc05 bgt.n 800873c + 8008730: eddf 0a1b vldr s1, [pc, #108] ; 80087a0 + 8008734: 2000 movs r0, #0 + 8008736: f001 f8df bl 80098f8 <__kernel_sinf> + 800873a: e004 b.n 8008746 + 800873c: f1b3 4fff cmp.w r3, #2139095040 ; 0x7f800000 + 8008740: db04 blt.n 800874c + 8008742: ee30 0a40 vsub.f32 s0, s0, s0 + 8008746: b003 add sp, #12 + 8008748: f85d fb04 ldr.w pc, [sp], #4 + 800874c: 4668 mov r0, sp + 800874e: f000 f967 bl 8008a20 <__ieee754_rem_pio2f> + 8008752: f000 0003 and.w r0, r0, #3 + 8008756: 2801 cmp r0, #1 + 8008758: d008 beq.n 800876c + 800875a: 2802 cmp r0, #2 + 800875c: d00d beq.n 800877a + 800875e: b9b0 cbnz r0, 800878e + 8008760: 2001 movs r0, #1 + 8008762: eddd 0a01 vldr s1, [sp, #4] + 8008766: ed9d 0a00 vldr s0, [sp] + 800876a: e7e4 b.n 8008736 + 800876c: eddd 0a01 vldr s1, [sp, #4] + 8008770: ed9d 0a00 vldr s0, [sp] + 8008774: f000 fde0 bl 8009338 <__kernel_cosf> + 8008778: e7e5 b.n 8008746 + 800877a: 2001 movs r0, #1 + 800877c: eddd 0a01 vldr s1, [sp, #4] + 8008780: ed9d 0a00 vldr s0, [sp] + 8008784: f001 f8b8 bl 80098f8 <__kernel_sinf> + 8008788: eeb1 0a40 vneg.f32 s0, s0 + 800878c: e7db b.n 8008746 + 800878e: eddd 0a01 vldr s1, [sp, #4] + 8008792: ed9d 0a00 vldr s0, [sp] + 8008796: f000 fdcf bl 8009338 <__kernel_cosf> + 800879a: e7f5 b.n 8008788 + 800879c: 3f490fd8 .word 0x3f490fd8 + ... + +080087a8 <__ieee754_rem_pio2>: + 80087a8: b570 push {r4, r5, r6, lr} + 80087aa: eeb0 7b40 vmov.f64 d7, d0 + 80087ae: ee17 5a90 vmov r5, s15 + 80087b2: 4b95 ldr r3, [pc, #596] ; (8008a08 <__ieee754_rem_pio2+0x260>) + 80087b4: f025 4600 bic.w r6, r5, #2147483648 ; 0x80000000 + 80087b8: 429e cmp r6, r3 + 80087ba: b088 sub sp, #32 + 80087bc: 4604 mov r4, r0 + 80087be: dc07 bgt.n 80087d0 <__ieee754_rem_pio2+0x28> + 80087c0: 2200 movs r2, #0 + 80087c2: 2300 movs r3, #0 + 80087c4: ed84 0b00 vstr d0, [r4] + 80087c8: e9c0 2302 strd r2, r3, [r0, #8] + 80087cc: 2000 movs r0, #0 + 80087ce: e01b b.n 8008808 <__ieee754_rem_pio2+0x60> + 80087d0: 4b8e ldr r3, [pc, #568] ; (8008a0c <__ieee754_rem_pio2+0x264>) + 80087d2: 429e cmp r6, r3 + 80087d4: dc3b bgt.n 800884e <__ieee754_rem_pio2+0xa6> + 80087d6: f5a3 231b sub.w r3, r3, #634880 ; 0x9b000 + 80087da: 2d00 cmp r5, #0 + 80087dc: ed9f 6b7a vldr d6, [pc, #488] ; 80089c8 <__ieee754_rem_pio2+0x220> + 80087e0: f5a3 63f0 sub.w r3, r3, #1920 ; 0x780 + 80087e4: dd19 ble.n 800881a <__ieee754_rem_pio2+0x72> + 80087e6: ee30 7b46 vsub.f64 d7, d0, d6 + 80087ea: 429e cmp r6, r3 + 80087ec: d00e beq.n 800880c <__ieee754_rem_pio2+0x64> + 80087ee: ed9f 6b78 vldr d6, [pc, #480] ; 80089d0 <__ieee754_rem_pio2+0x228> + 80087f2: ee37 5b46 vsub.f64 d5, d7, d6 + 80087f6: ee37 7b45 vsub.f64 d7, d7, d5 + 80087fa: ed84 5b00 vstr d5, [r4] + 80087fe: ee37 7b46 vsub.f64 d7, d7, d6 + 8008802: ed84 7b02 vstr d7, [r4, #8] + 8008806: 2001 movs r0, #1 + 8008808: b008 add sp, #32 + 800880a: bd70 pop {r4, r5, r6, pc} + 800880c: ed9f 6b72 vldr d6, [pc, #456] ; 80089d8 <__ieee754_rem_pio2+0x230> + 8008810: ee37 7b46 vsub.f64 d7, d7, d6 + 8008814: ed9f 6b72 vldr d6, [pc, #456] ; 80089e0 <__ieee754_rem_pio2+0x238> + 8008818: e7eb b.n 80087f2 <__ieee754_rem_pio2+0x4a> + 800881a: 429e cmp r6, r3 + 800881c: ee30 7b06 vadd.f64 d7, d0, d6 + 8008820: d00e beq.n 8008840 <__ieee754_rem_pio2+0x98> + 8008822: ed9f 6b6b vldr d6, [pc, #428] ; 80089d0 <__ieee754_rem_pio2+0x228> + 8008826: ee37 5b06 vadd.f64 d5, d7, d6 + 800882a: ee37 7b45 vsub.f64 d7, d7, d5 + 800882e: ed84 5b00 vstr d5, [r4] + 8008832: ee37 7b06 vadd.f64 d7, d7, d6 + 8008836: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff + 800883a: ed84 7b02 vstr d7, [r4, #8] + 800883e: e7e3 b.n 8008808 <__ieee754_rem_pio2+0x60> + 8008840: ed9f 6b65 vldr d6, [pc, #404] ; 80089d8 <__ieee754_rem_pio2+0x230> + 8008844: ee37 7b06 vadd.f64 d7, d7, d6 + 8008848: ed9f 6b65 vldr d6, [pc, #404] ; 80089e0 <__ieee754_rem_pio2+0x238> + 800884c: e7eb b.n 8008826 <__ieee754_rem_pio2+0x7e> + 800884e: 4b70 ldr r3, [pc, #448] ; (8008a10 <__ieee754_rem_pio2+0x268>) + 8008850: 429e cmp r6, r3 + 8008852: dc6c bgt.n 800892e <__ieee754_rem_pio2+0x186> + 8008854: f001 f898 bl 8009988 + 8008858: eeb6 7b00 vmov.f64 d7, #96 ; 0x3f000000 0.5 + 800885c: ed9f 6b62 vldr d6, [pc, #392] ; 80089e8 <__ieee754_rem_pio2+0x240> + 8008860: eea0 7b06 vfma.f64 d7, d0, d6 + 8008864: eefd 7bc7 vcvt.s32.f64 s15, d7 + 8008868: eeb8 4be7 vcvt.f64.s32 d4, s15 + 800886c: ee17 0a90 vmov r0, s15 + 8008870: eeb1 5b44 vneg.f64 d5, d4 + 8008874: ed9f 7b54 vldr d7, [pc, #336] ; 80089c8 <__ieee754_rem_pio2+0x220> + 8008878: eea5 0b07 vfma.f64 d0, d5, d7 + 800887c: ed9f 7b54 vldr d7, [pc, #336] ; 80089d0 <__ieee754_rem_pio2+0x228> + 8008880: 281f cmp r0, #31 + 8008882: ee24 7b07 vmul.f64 d7, d4, d7 + 8008886: ee30 6b47 vsub.f64 d6, d0, d7 + 800888a: dc08 bgt.n 800889e <__ieee754_rem_pio2+0xf6> + 800888c: 1e42 subs r2, r0, #1 + 800888e: 4b61 ldr r3, [pc, #388] ; (8008a14 <__ieee754_rem_pio2+0x26c>) + 8008890: f853 3022 ldr.w r3, [r3, r2, lsl #2] + 8008894: 42b3 cmp r3, r6 + 8008896: d002 beq.n 800889e <__ieee754_rem_pio2+0xf6> + 8008898: ed84 6b00 vstr d6, [r4] + 800889c: e022 b.n 80088e4 <__ieee754_rem_pio2+0x13c> + 800889e: ee16 3a90 vmov r3, s13 + 80088a2: 1536 asrs r6, r6, #20 + 80088a4: f3c3 530a ubfx r3, r3, #20, #11 + 80088a8: 1af3 subs r3, r6, r3 + 80088aa: 2b10 cmp r3, #16 + 80088ac: ddf4 ble.n 8008898 <__ieee754_rem_pio2+0xf0> + 80088ae: eeb0 6b40 vmov.f64 d6, d0 + 80088b2: ed9f 3b49 vldr d3, [pc, #292] ; 80089d8 <__ieee754_rem_pio2+0x230> + 80088b6: eea5 6b03 vfma.f64 d6, d5, d3 + 80088ba: ee30 7b46 vsub.f64 d7, d0, d6 + 80088be: eea5 7b03 vfma.f64 d7, d5, d3 + 80088c2: ed9f 3b47 vldr d3, [pc, #284] ; 80089e0 <__ieee754_rem_pio2+0x238> + 80088c6: ee94 7b03 vfnms.f64 d7, d4, d3 + 80088ca: ee36 3b47 vsub.f64 d3, d6, d7 + 80088ce: ee13 3a90 vmov r3, s7 + 80088d2: f3c3 530a ubfx r3, r3, #20, #11 + 80088d6: 1af6 subs r6, r6, r3 + 80088d8: 2e31 cmp r6, #49 ; 0x31 + 80088da: dc17 bgt.n 800890c <__ieee754_rem_pio2+0x164> + 80088dc: eeb0 0b46 vmov.f64 d0, d6 + 80088e0: ed84 3b00 vstr d3, [r4] + 80088e4: ed94 6b00 vldr d6, [r4] + 80088e8: 2d00 cmp r5, #0 + 80088ea: ee30 0b46 vsub.f64 d0, d0, d6 + 80088ee: ee30 7b47 vsub.f64 d7, d0, d7 + 80088f2: ed84 7b02 vstr d7, [r4, #8] + 80088f6: da87 bge.n 8008808 <__ieee754_rem_pio2+0x60> + 80088f8: eeb1 6b46 vneg.f64 d6, d6 + 80088fc: ed84 6b00 vstr d6, [r4] + 8008900: eeb1 7b47 vneg.f64 d7, d7 + 8008904: 4240 negs r0, r0 + 8008906: ed84 7b02 vstr d7, [r4, #8] + 800890a: e77d b.n 8008808 <__ieee754_rem_pio2+0x60> + 800890c: ed9f 3b38 vldr d3, [pc, #224] ; 80089f0 <__ieee754_rem_pio2+0x248> + 8008910: eeb0 0b46 vmov.f64 d0, d6 + 8008914: eea5 0b03 vfma.f64 d0, d5, d3 + 8008918: ee36 7b40 vsub.f64 d7, d6, d0 + 800891c: ed9f 6b36 vldr d6, [pc, #216] ; 80089f8 <__ieee754_rem_pio2+0x250> + 8008920: eea5 7b03 vfma.f64 d7, d5, d3 + 8008924: ee94 7b06 vfnms.f64 d7, d4, d6 + 8008928: ee30 6b47 vsub.f64 d6, d0, d7 + 800892c: e7b4 b.n 8008898 <__ieee754_rem_pio2+0xf0> + 800892e: 4b3a ldr r3, [pc, #232] ; (8008a18 <__ieee754_rem_pio2+0x270>) + 8008930: 429e cmp r6, r3 + 8008932: dd06 ble.n 8008942 <__ieee754_rem_pio2+0x19a> + 8008934: ee30 7b40 vsub.f64 d7, d0, d0 + 8008938: ed80 7b02 vstr d7, [r0, #8] + 800893c: ed80 7b00 vstr d7, [r0] + 8008940: e744 b.n 80087cc <__ieee754_rem_pio2+0x24> + 8008942: 1532 asrs r2, r6, #20 + 8008944: f2a2 4216 subw r2, r2, #1046 ; 0x416 + 8008948: ee10 0a10 vmov r0, s0 + 800894c: eba6 5102 sub.w r1, r6, r2, lsl #20 + 8008950: ec41 0b17 vmov d7, r0, r1 + 8008954: eebd 6bc7 vcvt.s32.f64 s12, d7 + 8008958: ed9f 5b29 vldr d5, [pc, #164] ; 8008a00 <__ieee754_rem_pio2+0x258> + 800895c: eeb8 6bc6 vcvt.f64.s32 d6, s12 + 8008960: ee37 7b46 vsub.f64 d7, d7, d6 + 8008964: ed8d 6b02 vstr d6, [sp, #8] + 8008968: ee27 7b05 vmul.f64 d7, d7, d5 + 800896c: eebd 6bc7 vcvt.s32.f64 s12, d7 + 8008970: a908 add r1, sp, #32 + 8008972: eeb8 6bc6 vcvt.f64.s32 d6, s12 + 8008976: ee37 7b46 vsub.f64 d7, d7, d6 + 800897a: ed8d 6b04 vstr d6, [sp, #16] + 800897e: ee27 7b05 vmul.f64 d7, d7, d5 + 8008982: ed8d 7b06 vstr d7, [sp, #24] + 8008986: 2303 movs r3, #3 + 8008988: ed31 7b02 vldmdb r1!, {d7} + 800898c: eeb5 7b40 vcmp.f64 d7, #0.0 + 8008990: eef1 fa10 vmrs APSR_nzcv, fpscr + 8008994: f103 30ff add.w r0, r3, #4294967295 ; 0xffffffff + 8008998: d013 beq.n 80089c2 <__ieee754_rem_pio2+0x21a> + 800899a: 4920 ldr r1, [pc, #128] ; (8008a1c <__ieee754_rem_pio2+0x274>) + 800899c: 9101 str r1, [sp, #4] + 800899e: 2102 movs r1, #2 + 80089a0: 9100 str r1, [sp, #0] + 80089a2: a802 add r0, sp, #8 + 80089a4: 4621 mov r1, r4 + 80089a6: f000 f9d3 bl 8008d50 <__kernel_rem_pio2> + 80089aa: 2d00 cmp r5, #0 + 80089ac: f6bf af2c bge.w 8008808 <__ieee754_rem_pio2+0x60> + 80089b0: ed94 7b00 vldr d7, [r4] + 80089b4: eeb1 7b47 vneg.f64 d7, d7 + 80089b8: ed84 7b00 vstr d7, [r4] + 80089bc: ed94 7b02 vldr d7, [r4, #8] + 80089c0: e79e b.n 8008900 <__ieee754_rem_pio2+0x158> + 80089c2: 4603 mov r3, r0 + 80089c4: e7e0 b.n 8008988 <__ieee754_rem_pio2+0x1e0> + 80089c6: bf00 nop + 80089c8: 54400000 .word 0x54400000 + 80089cc: 3ff921fb .word 0x3ff921fb + 80089d0: 1a626331 .word 0x1a626331 + 80089d4: 3dd0b461 .word 0x3dd0b461 + 80089d8: 1a600000 .word 0x1a600000 + 80089dc: 3dd0b461 .word 0x3dd0b461 + 80089e0: 2e037073 .word 0x2e037073 + 80089e4: 3ba3198a .word 0x3ba3198a + 80089e8: 6dc9c883 .word 0x6dc9c883 + 80089ec: 3fe45f30 .word 0x3fe45f30 + 80089f0: 2e000000 .word 0x2e000000 + 80089f4: 3ba3198a .word 0x3ba3198a + 80089f8: 252049c1 .word 0x252049c1 + 80089fc: 397b839a .word 0x397b839a + 8008a00: 00000000 .word 0x00000000 + 8008a04: 41700000 .word 0x41700000 + 8008a08: 3fe921fb .word 0x3fe921fb + 8008a0c: 4002d97b .word 0x4002d97b + 8008a10: 413921fb .word 0x413921fb + 8008a14: 0800a4c4 .word 0x0800a4c4 + 8008a18: 7fefffff .word 0x7fefffff + 8008a1c: 0800a544 .word 0x0800a544 + +08008a20 <__ieee754_rem_pio2f>: + 8008a20: b5f0 push {r4, r5, r6, r7, lr} + 8008a22: ee10 6a10 vmov r6, s0 + 8008a26: 4b86 ldr r3, [pc, #536] ; (8008c40 <__ieee754_rem_pio2f+0x220>) + 8008a28: f026 4400 bic.w r4, r6, #2147483648 ; 0x80000000 + 8008a2c: 429c cmp r4, r3 + 8008a2e: b087 sub sp, #28 + 8008a30: 4605 mov r5, r0 + 8008a32: dc05 bgt.n 8008a40 <__ieee754_rem_pio2f+0x20> + 8008a34: 2300 movs r3, #0 + 8008a36: ed85 0a00 vstr s0, [r5] + 8008a3a: 6043 str r3, [r0, #4] + 8008a3c: 2000 movs r0, #0 + 8008a3e: e020 b.n 8008a82 <__ieee754_rem_pio2f+0x62> + 8008a40: 4b80 ldr r3, [pc, #512] ; (8008c44 <__ieee754_rem_pio2f+0x224>) + 8008a42: 429c cmp r4, r3 + 8008a44: dc38 bgt.n 8008ab8 <__ieee754_rem_pio2f+0x98> + 8008a46: 2e00 cmp r6, #0 + 8008a48: f024 040f bic.w r4, r4, #15 + 8008a4c: ed9f 7a7e vldr s14, [pc, #504] ; 8008c48 <__ieee754_rem_pio2f+0x228> + 8008a50: 4b7e ldr r3, [pc, #504] ; (8008c4c <__ieee754_rem_pio2f+0x22c>) + 8008a52: dd18 ble.n 8008a86 <__ieee754_rem_pio2f+0x66> + 8008a54: 429c cmp r4, r3 + 8008a56: ee70 7a47 vsub.f32 s15, s0, s14 + 8008a5a: bf09 itett eq + 8008a5c: ed9f 7a7c vldreq s14, [pc, #496] ; 8008c50 <__ieee754_rem_pio2f+0x230> + 8008a60: ed9f 7a7c vldrne s14, [pc, #496] ; 8008c54 <__ieee754_rem_pio2f+0x234> + 8008a64: ee77 7ac7 vsubeq.f32 s15, s15, s14 + 8008a68: ed9f 7a7b vldreq s14, [pc, #492] ; 8008c58 <__ieee754_rem_pio2f+0x238> + 8008a6c: ee77 6ac7 vsub.f32 s13, s15, s14 + 8008a70: ee77 7ae6 vsub.f32 s15, s15, s13 + 8008a74: edc0 6a00 vstr s13, [r0] + 8008a78: ee77 7ac7 vsub.f32 s15, s15, s14 + 8008a7c: edc0 7a01 vstr s15, [r0, #4] + 8008a80: 2001 movs r0, #1 + 8008a82: b007 add sp, #28 + 8008a84: bdf0 pop {r4, r5, r6, r7, pc} + 8008a86: 429c cmp r4, r3 + 8008a88: ee70 7a07 vadd.f32 s15, s0, s14 + 8008a8c: bf09 itett eq + 8008a8e: ed9f 7a70 vldreq s14, [pc, #448] ; 8008c50 <__ieee754_rem_pio2f+0x230> + 8008a92: ed9f 7a70 vldrne s14, [pc, #448] ; 8008c54 <__ieee754_rem_pio2f+0x234> + 8008a96: ee77 7a87 vaddeq.f32 s15, s15, s14 + 8008a9a: ed9f 7a6f vldreq s14, [pc, #444] ; 8008c58 <__ieee754_rem_pio2f+0x238> + 8008a9e: ee77 6a87 vadd.f32 s13, s15, s14 + 8008aa2: ee77 7ae6 vsub.f32 s15, s15, s13 + 8008aa6: edc0 6a00 vstr s13, [r0] + 8008aaa: ee77 7a87 vadd.f32 s15, s15, s14 + 8008aae: edc0 7a01 vstr s15, [r0, #4] + 8008ab2: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff + 8008ab6: e7e4 b.n 8008a82 <__ieee754_rem_pio2f+0x62> + 8008ab8: 4b68 ldr r3, [pc, #416] ; (8008c5c <__ieee754_rem_pio2f+0x23c>) + 8008aba: 429c cmp r4, r3 + 8008abc: dc71 bgt.n 8008ba2 <__ieee754_rem_pio2f+0x182> + 8008abe: f001 f865 bl 8009b8c + 8008ac2: ed9f 7a67 vldr s14, [pc, #412] ; 8008c60 <__ieee754_rem_pio2f+0x240> + 8008ac6: eef6 7a00 vmov.f32 s15, #96 ; 0x3f000000 0.5 + 8008aca: eee0 7a07 vfma.f32 s15, s0, s14 + 8008ace: eefd 7ae7 vcvt.s32.f32 s15, s15 + 8008ad2: eeb8 6ae7 vcvt.f32.s32 s12, s15 + 8008ad6: ee17 0a90 vmov r0, s15 + 8008ada: eddf 7a5b vldr s15, [pc, #364] ; 8008c48 <__ieee754_rem_pio2f+0x228> + 8008ade: eeb1 7a46 vneg.f32 s14, s12 + 8008ae2: eea7 0a27 vfma.f32 s0, s14, s15 + 8008ae6: 281f cmp r0, #31 + 8008ae8: eddf 7a5a vldr s15, [pc, #360] ; 8008c54 <__ieee754_rem_pio2f+0x234> + 8008aec: ee66 7a27 vmul.f32 s15, s12, s15 + 8008af0: ee70 6a67 vsub.f32 s13, s0, s15 + 8008af4: ee16 3a90 vmov r3, s13 + 8008af8: dc1c bgt.n 8008b34 <__ieee754_rem_pio2f+0x114> + 8008afa: 1e47 subs r7, r0, #1 + 8008afc: 4959 ldr r1, [pc, #356] ; (8008c64 <__ieee754_rem_pio2f+0x244>) + 8008afe: f851 1027 ldr.w r1, [r1, r7, lsl #2] + 8008b02: f024 02ff bic.w r2, r4, #255 ; 0xff + 8008b06: 428a cmp r2, r1 + 8008b08: d014 beq.n 8008b34 <__ieee754_rem_pio2f+0x114> + 8008b0a: 602b str r3, [r5, #0] + 8008b0c: ed95 7a00 vldr s14, [r5] + 8008b10: ee30 0a47 vsub.f32 s0, s0, s14 + 8008b14: 2e00 cmp r6, #0 + 8008b16: ee30 0a67 vsub.f32 s0, s0, s15 + 8008b1a: ed85 0a01 vstr s0, [r5, #4] + 8008b1e: dab0 bge.n 8008a82 <__ieee754_rem_pio2f+0x62> + 8008b20: eeb1 7a47 vneg.f32 s14, s14 + 8008b24: eeb1 0a40 vneg.f32 s0, s0 + 8008b28: ed85 7a00 vstr s14, [r5] + 8008b2c: ed85 0a01 vstr s0, [r5, #4] + 8008b30: 4240 negs r0, r0 + 8008b32: e7a6 b.n 8008a82 <__ieee754_rem_pio2f+0x62> + 8008b34: 15e4 asrs r4, r4, #23 + 8008b36: f3c3 52c7 ubfx r2, r3, #23, #8 + 8008b3a: 1aa2 subs r2, r4, r2 + 8008b3c: 2a08 cmp r2, #8 + 8008b3e: dde4 ble.n 8008b0a <__ieee754_rem_pio2f+0xea> + 8008b40: eddf 7a43 vldr s15, [pc, #268] ; 8008c50 <__ieee754_rem_pio2f+0x230> + 8008b44: eef0 6a40 vmov.f32 s13, s0 + 8008b48: eee7 6a27 vfma.f32 s13, s14, s15 + 8008b4c: ee30 0a66 vsub.f32 s0, s0, s13 + 8008b50: eea7 0a27 vfma.f32 s0, s14, s15 + 8008b54: eddf 7a40 vldr s15, [pc, #256] ; 8008c58 <__ieee754_rem_pio2f+0x238> + 8008b58: ee96 0a27 vfnms.f32 s0, s12, s15 + 8008b5c: ee76 5ac0 vsub.f32 s11, s13, s0 + 8008b60: eef0 7a40 vmov.f32 s15, s0 + 8008b64: ee15 3a90 vmov r3, s11 + 8008b68: f3c3 52c7 ubfx r2, r3, #23, #8 + 8008b6c: 1aa4 subs r4, r4, r2 + 8008b6e: 2c19 cmp r4, #25 + 8008b70: dc04 bgt.n 8008b7c <__ieee754_rem_pio2f+0x15c> + 8008b72: edc5 5a00 vstr s11, [r5] + 8008b76: eeb0 0a66 vmov.f32 s0, s13 + 8008b7a: e7c7 b.n 8008b0c <__ieee754_rem_pio2f+0xec> + 8008b7c: eddf 5a3a vldr s11, [pc, #232] ; 8008c68 <__ieee754_rem_pio2f+0x248> + 8008b80: eeb0 0a66 vmov.f32 s0, s13 + 8008b84: eea7 0a25 vfma.f32 s0, s14, s11 + 8008b88: ee76 7ac0 vsub.f32 s15, s13, s0 + 8008b8c: eee7 7a25 vfma.f32 s15, s14, s11 + 8008b90: ed9f 7a36 vldr s14, [pc, #216] ; 8008c6c <__ieee754_rem_pio2f+0x24c> + 8008b94: eed6 7a07 vfnms.f32 s15, s12, s14 + 8008b98: ee30 7a67 vsub.f32 s14, s0, s15 + 8008b9c: ed85 7a00 vstr s14, [r5] + 8008ba0: e7b4 b.n 8008b0c <__ieee754_rem_pio2f+0xec> + 8008ba2: f1b4 4fff cmp.w r4, #2139095040 ; 0x7f800000 + 8008ba6: db06 blt.n 8008bb6 <__ieee754_rem_pio2f+0x196> + 8008ba8: ee70 7a40 vsub.f32 s15, s0, s0 + 8008bac: edc0 7a01 vstr s15, [r0, #4] + 8008bb0: edc0 7a00 vstr s15, [r0] + 8008bb4: e742 b.n 8008a3c <__ieee754_rem_pio2f+0x1c> + 8008bb6: 15e2 asrs r2, r4, #23 + 8008bb8: 3a86 subs r2, #134 ; 0x86 + 8008bba: eba4 53c2 sub.w r3, r4, r2, lsl #23 + 8008bbe: ee07 3a90 vmov s15, r3 + 8008bc2: eebd 7ae7 vcvt.s32.f32 s14, s15 + 8008bc6: eddf 6a2a vldr s13, [pc, #168] ; 8008c70 <__ieee754_rem_pio2f+0x250> + 8008bca: eeb8 7ac7 vcvt.f32.s32 s14, s14 + 8008bce: ee77 7ac7 vsub.f32 s15, s15, s14 + 8008bd2: ed8d 7a03 vstr s14, [sp, #12] + 8008bd6: ee67 7aa6 vmul.f32 s15, s15, s13 + 8008bda: eebd 7ae7 vcvt.s32.f32 s14, s15 + 8008bde: eeb8 7ac7 vcvt.f32.s32 s14, s14 + 8008be2: ee77 7ac7 vsub.f32 s15, s15, s14 + 8008be6: ed8d 7a04 vstr s14, [sp, #16] + 8008bea: ee67 7aa6 vmul.f32 s15, s15, s13 + 8008bee: eef5 7a40 vcmp.f32 s15, #0.0 + 8008bf2: eef1 fa10 vmrs APSR_nzcv, fpscr + 8008bf6: edcd 7a05 vstr s15, [sp, #20] + 8008bfa: d11e bne.n 8008c3a <__ieee754_rem_pio2f+0x21a> + 8008bfc: eeb5 7a40 vcmp.f32 s14, #0.0 + 8008c00: eef1 fa10 vmrs APSR_nzcv, fpscr + 8008c04: bf0c ite eq + 8008c06: 2301 moveq r3, #1 + 8008c08: 2302 movne r3, #2 + 8008c0a: 491a ldr r1, [pc, #104] ; (8008c74 <__ieee754_rem_pio2f+0x254>) + 8008c0c: 9101 str r1, [sp, #4] + 8008c0e: 2102 movs r1, #2 + 8008c10: 9100 str r1, [sp, #0] + 8008c12: a803 add r0, sp, #12 + 8008c14: 4629 mov r1, r5 + 8008c16: f000 fbed bl 80093f4 <__kernel_rem_pio2f> + 8008c1a: 2e00 cmp r6, #0 + 8008c1c: f6bf af31 bge.w 8008a82 <__ieee754_rem_pio2f+0x62> + 8008c20: edd5 7a00 vldr s15, [r5] + 8008c24: eef1 7a67 vneg.f32 s15, s15 + 8008c28: edc5 7a00 vstr s15, [r5] + 8008c2c: edd5 7a01 vldr s15, [r5, #4] + 8008c30: eef1 7a67 vneg.f32 s15, s15 + 8008c34: edc5 7a01 vstr s15, [r5, #4] + 8008c38: e77a b.n 8008b30 <__ieee754_rem_pio2f+0x110> + 8008c3a: 2303 movs r3, #3 + 8008c3c: e7e5 b.n 8008c0a <__ieee754_rem_pio2f+0x1ea> + 8008c3e: bf00 nop + 8008c40: 3f490fd8 .word 0x3f490fd8 + 8008c44: 4016cbe3 .word 0x4016cbe3 + 8008c48: 3fc90f80 .word 0x3fc90f80 + 8008c4c: 3fc90fd0 .word 0x3fc90fd0 + 8008c50: 37354400 .word 0x37354400 + 8008c54: 37354443 .word 0x37354443 + 8008c58: 2e85a308 .word 0x2e85a308 + 8008c5c: 43490f80 .word 0x43490f80 + 8008c60: 3f22f984 .word 0x3f22f984 + 8008c64: 0800a64c .word 0x0800a64c + 8008c68: 2e85a300 .word 0x2e85a300 + 8008c6c: 248d3132 .word 0x248d3132 + 8008c70: 43800000 .word 0x43800000 + 8008c74: 0800a6cc .word 0x0800a6cc + +08008c78 <__kernel_cos>: + 8008c78: ee10 1a90 vmov r1, s1 + 8008c7c: eeb7 7b00 vmov.f64 d7, #112 ; 0x3f800000 1.0 + 8008c80: f021 4100 bic.w r1, r1, #2147483648 ; 0x80000000 + 8008c84: f1b1 5f79 cmp.w r1, #1044381696 ; 0x3e400000 + 8008c88: da05 bge.n 8008c96 <__kernel_cos+0x1e> + 8008c8a: eefd 6bc0 vcvt.s32.f64 s13, d0 + 8008c8e: ee16 3a90 vmov r3, s13 + 8008c92: 2b00 cmp r3, #0 + 8008c94: d03d beq.n 8008d12 <__kernel_cos+0x9a> + 8008c96: ee20 4b00 vmul.f64 d4, d0, d0 + 8008c9a: eeb6 6b00 vmov.f64 d6, #96 ; 0x3f000000 0.5 + 8008c9e: ed9f 3b1e vldr d3, [pc, #120] ; 8008d18 <__kernel_cos+0xa0> + 8008ca2: ee21 1b40 vnmul.f64 d1, d1, d0 + 8008ca6: ee24 6b06 vmul.f64 d6, d4, d6 + 8008caa: ed9f 5b1d vldr d5, [pc, #116] ; 8008d20 <__kernel_cos+0xa8> + 8008cae: eea4 5b03 vfma.f64 d5, d4, d3 + 8008cb2: ed9f 3b1d vldr d3, [pc, #116] ; 8008d28 <__kernel_cos+0xb0> + 8008cb6: eea5 3b04 vfma.f64 d3, d5, d4 + 8008cba: ed9f 5b1d vldr d5, [pc, #116] ; 8008d30 <__kernel_cos+0xb8> + 8008cbe: eea3 5b04 vfma.f64 d5, d3, d4 + 8008cc2: ed9f 3b1d vldr d3, [pc, #116] ; 8008d38 <__kernel_cos+0xc0> + 8008cc6: 4b20 ldr r3, [pc, #128] ; (8008d48 <__kernel_cos+0xd0>) + 8008cc8: eea5 3b04 vfma.f64 d3, d5, d4 + 8008ccc: ed9f 5b1c vldr d5, [pc, #112] ; 8008d40 <__kernel_cos+0xc8> + 8008cd0: 4299 cmp r1, r3 + 8008cd2: eea3 5b04 vfma.f64 d5, d3, d4 + 8008cd6: ee25 5b04 vmul.f64 d5, d5, d4 + 8008cda: eea4 1b05 vfma.f64 d1, d4, d5 + 8008cde: dc04 bgt.n 8008cea <__kernel_cos+0x72> + 8008ce0: ee36 6b41 vsub.f64 d6, d6, d1 + 8008ce4: ee37 0b46 vsub.f64 d0, d7, d6 + 8008ce8: 4770 bx lr + 8008cea: 4b18 ldr r3, [pc, #96] ; (8008d4c <__kernel_cos+0xd4>) + 8008cec: 4299 cmp r1, r3 + 8008cee: dc0d bgt.n 8008d0c <__kernel_cos+0x94> + 8008cf0: 2200 movs r2, #0 + 8008cf2: f5a1 1300 sub.w r3, r1, #2097152 ; 0x200000 + 8008cf6: ec43 2b15 vmov d5, r2, r3 + 8008cfa: ee37 0b45 vsub.f64 d0, d7, d5 + 8008cfe: ee36 6b45 vsub.f64 d6, d6, d5 + 8008d02: ee36 6b41 vsub.f64 d6, d6, d1 + 8008d06: ee30 0b46 vsub.f64 d0, d0, d6 + 8008d0a: 4770 bx lr + 8008d0c: eeb5 5b02 vmov.f64 d5, #82 ; 0x3e900000 0.2812500 + 8008d10: e7f3 b.n 8008cfa <__kernel_cos+0x82> + 8008d12: eeb0 0b47 vmov.f64 d0, d7 + 8008d16: 4770 bx lr + 8008d18: be8838d4 .word 0xbe8838d4 + 8008d1c: bda8fae9 .word 0xbda8fae9 + 8008d20: bdb4b1c4 .word 0xbdb4b1c4 + 8008d24: 3e21ee9e .word 0x3e21ee9e + 8008d28: 809c52ad .word 0x809c52ad + 8008d2c: be927e4f .word 0xbe927e4f + 8008d30: 19cb1590 .word 0x19cb1590 + 8008d34: 3efa01a0 .word 0x3efa01a0 + 8008d38: 16c15177 .word 0x16c15177 + 8008d3c: bf56c16c .word 0xbf56c16c + 8008d40: 5555554c .word 0x5555554c + 8008d44: 3fa55555 .word 0x3fa55555 + 8008d48: 3fd33332 .word 0x3fd33332 + 8008d4c: 3fe90000 .word 0x3fe90000 + +08008d50 <__kernel_rem_pio2>: + 8008d50: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} + 8008d54: ed2d 8b06 vpush {d8-d10} + 8008d58: f5ad 7d13 sub.w sp, sp, #588 ; 0x24c + 8008d5c: 469b mov fp, r3 + 8008d5e: 460e mov r6, r1 + 8008d60: 4bc7 ldr r3, [pc, #796] ; (8009080 <__kernel_rem_pio2+0x330>) + 8008d62: 99a2 ldr r1, [sp, #648] ; 0x288 + 8008d64: 9002 str r0, [sp, #8] + 8008d66: f853 9021 ldr.w r9, [r3, r1, lsl #2] + 8008d6a: 98a3 ldr r0, [sp, #652] ; 0x28c + 8008d6c: 1ed1 subs r1, r2, #3 + 8008d6e: 2318 movs r3, #24 + 8008d70: f06f 0417 mvn.w r4, #23 + 8008d74: fb91 f1f3 sdiv r1, r1, r3 + 8008d78: ea21 71e1 bic.w r1, r1, r1, asr #31 + 8008d7c: f10b 3aff add.w sl, fp, #4294967295 ; 0xffffffff + 8008d80: fb01 4404 mla r4, r1, r4, r4 + 8008d84: ed9f 6bb8 vldr d6, [pc, #736] ; 8009068 <__kernel_rem_pio2+0x318> + 8008d88: 4414 add r4, r2 + 8008d8a: eba1 050a sub.w r5, r1, sl + 8008d8e: aa1a add r2, sp, #104 ; 0x68 + 8008d90: eb09 070a add.w r7, r9, sl + 8008d94: eb00 0c85 add.w ip, r0, r5, lsl #2 + 8008d98: 4696 mov lr, r2 + 8008d9a: 2300 movs r3, #0 + 8008d9c: 42bb cmp r3, r7 + 8008d9e: dd0f ble.n 8008dc0 <__kernel_rem_pio2+0x70> + 8008da0: af6a add r7, sp, #424 ; 0x1a8 + 8008da2: 2200 movs r2, #0 + 8008da4: 454a cmp r2, r9 + 8008da6: dc28 bgt.n 8008dfa <__kernel_rem_pio2+0xaa> + 8008da8: f10d 0c68 add.w ip, sp, #104 ; 0x68 + 8008dac: eb0b 0302 add.w r3, fp, r2 + 8008db0: eb0c 03c3 add.w r3, ip, r3, lsl #3 + 8008db4: 9d02 ldr r5, [sp, #8] + 8008db6: ed9f 7bac vldr d7, [pc, #688] ; 8009068 <__kernel_rem_pio2+0x318> + 8008dba: f04f 0c00 mov.w ip, #0 + 8008dbe: e016 b.n 8008dee <__kernel_rem_pio2+0x9e> + 8008dc0: 42dd cmn r5, r3 + 8008dc2: d409 bmi.n 8008dd8 <__kernel_rem_pio2+0x88> + 8008dc4: f85c 2023 ldr.w r2, [ip, r3, lsl #2] + 8008dc8: ee07 2a90 vmov s15, r2 + 8008dcc: eeb8 7be7 vcvt.f64.s32 d7, s15 + 8008dd0: ecae 7b02 vstmia lr!, {d7} + 8008dd4: 3301 adds r3, #1 + 8008dd6: e7e1 b.n 8008d9c <__kernel_rem_pio2+0x4c> + 8008dd8: eeb0 7b46 vmov.f64 d7, d6 + 8008ddc: e7f8 b.n 8008dd0 <__kernel_rem_pio2+0x80> + 8008dde: ecb5 5b02 vldmia r5!, {d5} + 8008de2: ed33 6b02 vldmdb r3!, {d6} + 8008de6: f10c 0c01 add.w ip, ip, #1 + 8008dea: eea5 7b06 vfma.f64 d7, d5, d6 + 8008dee: 45d4 cmp ip, sl + 8008df0: ddf5 ble.n 8008dde <__kernel_rem_pio2+0x8e> + 8008df2: eca7 7b02 vstmia r7!, {d7} + 8008df6: 3201 adds r2, #1 + 8008df8: e7d4 b.n 8008da4 <__kernel_rem_pio2+0x54> + 8008dfa: ab06 add r3, sp, #24 + 8008dfc: eb03 0389 add.w r3, r3, r9, lsl #2 + 8008e00: ed9f 9b9b vldr d9, [pc, #620] ; 8009070 <__kernel_rem_pio2+0x320> + 8008e04: ed9f ab9c vldr d10, [pc, #624] ; 8009078 <__kernel_rem_pio2+0x328> + 8008e08: 9304 str r3, [sp, #16] + 8008e0a: eb00 0381 add.w r3, r0, r1, lsl #2 + 8008e0e: 9303 str r3, [sp, #12] + 8008e10: 464d mov r5, r9 + 8008e12: ab92 add r3, sp, #584 ; 0x248 + 8008e14: f105 5700 add.w r7, r5, #536870912 ; 0x20000000 + 8008e18: eb03 03c5 add.w r3, r3, r5, lsl #3 + 8008e1c: 3f01 subs r7, #1 + 8008e1e: ed13 0b28 vldr d0, [r3, #-160] ; 0xffffff60 + 8008e22: 00ff lsls r7, r7, #3 + 8008e24: ab92 add r3, sp, #584 ; 0x248 + 8008e26: 19da adds r2, r3, r7 + 8008e28: 3a98 subs r2, #152 ; 0x98 + 8008e2a: 2300 movs r3, #0 + 8008e2c: 1ae9 subs r1, r5, r3 + 8008e2e: 2900 cmp r1, #0 + 8008e30: dc4e bgt.n 8008ed0 <__kernel_rem_pio2+0x180> + 8008e32: 4620 mov r0, r4 + 8008e34: f000 fe2c bl 8009a90 + 8008e38: eeb0 8b40 vmov.f64 d8, d0 + 8008e3c: eeb4 0b00 vmov.f64 d0, #64 ; 0x3e000000 0.125 + 8008e40: ee28 0b00 vmul.f64 d0, d8, d0 + 8008e44: f000 fdac bl 80099a0 + 8008e48: eeb2 7b00 vmov.f64 d7, #32 ; 0x41000000 8.0 + 8008e4c: eea0 8b47 vfms.f64 d8, d0, d7 + 8008e50: eefd 7bc8 vcvt.s32.f64 s15, d8 + 8008e54: 2c00 cmp r4, #0 + 8008e56: edcd 7a01 vstr s15, [sp, #4] + 8008e5a: eeb8 7be7 vcvt.f64.s32 d7, s15 + 8008e5e: ee38 8b47 vsub.f64 d8, d8, d7 + 8008e62: dd4a ble.n 8008efa <__kernel_rem_pio2+0x1aa> + 8008e64: 1e69 subs r1, r5, #1 + 8008e66: ab06 add r3, sp, #24 + 8008e68: f1c4 0018 rsb r0, r4, #24 + 8008e6c: f853 c021 ldr.w ip, [r3, r1, lsl #2] + 8008e70: 9a01 ldr r2, [sp, #4] + 8008e72: fa4c f300 asr.w r3, ip, r0 + 8008e76: 441a add r2, r3 + 8008e78: 4083 lsls r3, r0 + 8008e7a: 9201 str r2, [sp, #4] + 8008e7c: ebac 0203 sub.w r2, ip, r3 + 8008e80: ab06 add r3, sp, #24 + 8008e82: f843 2021 str.w r2, [r3, r1, lsl #2] + 8008e86: f1c4 0317 rsb r3, r4, #23 + 8008e8a: fa42 f803 asr.w r8, r2, r3 + 8008e8e: f1b8 0f00 cmp.w r8, #0 + 8008e92: dd43 ble.n 8008f1c <__kernel_rem_pio2+0x1cc> + 8008e94: 9b01 ldr r3, [sp, #4] + 8008e96: 2000 movs r0, #0 + 8008e98: 3301 adds r3, #1 + 8008e9a: 9301 str r3, [sp, #4] + 8008e9c: 4601 mov r1, r0 + 8008e9e: f06f 4c7f mvn.w ip, #4278190080 ; 0xff000000 + 8008ea2: 4285 cmp r5, r0 + 8008ea4: dc6e bgt.n 8008f84 <__kernel_rem_pio2+0x234> + 8008ea6: 2c00 cmp r4, #0 + 8008ea8: dd04 ble.n 8008eb4 <__kernel_rem_pio2+0x164> + 8008eaa: 2c01 cmp r4, #1 + 8008eac: d07f beq.n 8008fae <__kernel_rem_pio2+0x25e> + 8008eae: 2c02 cmp r4, #2 + 8008eb0: f000 8087 beq.w 8008fc2 <__kernel_rem_pio2+0x272> + 8008eb4: f1b8 0f02 cmp.w r8, #2 + 8008eb8: d130 bne.n 8008f1c <__kernel_rem_pio2+0x1cc> + 8008eba: eeb7 0b00 vmov.f64 d0, #112 ; 0x3f800000 1.0 + 8008ebe: ee30 8b48 vsub.f64 d8, d0, d8 + 8008ec2: b359 cbz r1, 8008f1c <__kernel_rem_pio2+0x1cc> + 8008ec4: 4620 mov r0, r4 + 8008ec6: f000 fde3 bl 8009a90 + 8008eca: ee38 8b40 vsub.f64 d8, d8, d0 + 8008ece: e025 b.n 8008f1c <__kernel_rem_pio2+0x1cc> + 8008ed0: ee20 7b09 vmul.f64 d7, d0, d9 + 8008ed4: eebd 7bc7 vcvt.s32.f64 s14, d7 + 8008ed8: a806 add r0, sp, #24 + 8008eda: eeb8 7bc7 vcvt.f64.s32 d7, s14 + 8008ede: eea7 0b4a vfms.f64 d0, d7, d10 + 8008ee2: eebd 0bc0 vcvt.s32.f64 s0, d0 + 8008ee6: ee10 1a10 vmov r1, s0 + 8008eea: ed32 0b02 vldmdb r2!, {d0} + 8008eee: f840 1023 str.w r1, [r0, r3, lsl #2] + 8008ef2: ee37 0b00 vadd.f64 d0, d7, d0 + 8008ef6: 3301 adds r3, #1 + 8008ef8: e798 b.n 8008e2c <__kernel_rem_pio2+0xdc> + 8008efa: d106 bne.n 8008f0a <__kernel_rem_pio2+0x1ba> + 8008efc: 1e6b subs r3, r5, #1 + 8008efe: aa06 add r2, sp, #24 + 8008f00: f852 2023 ldr.w r2, [r2, r3, lsl #2] + 8008f04: ea4f 58e2 mov.w r8, r2, asr #23 + 8008f08: e7c1 b.n 8008e8e <__kernel_rem_pio2+0x13e> + 8008f0a: eeb6 7b00 vmov.f64 d7, #96 ; 0x3f000000 0.5 + 8008f0e: eeb4 8bc7 vcmpe.f64 d8, d7 + 8008f12: eef1 fa10 vmrs APSR_nzcv, fpscr + 8008f16: da32 bge.n 8008f7e <__kernel_rem_pio2+0x22e> + 8008f18: f04f 0800 mov.w r8, #0 + 8008f1c: eeb5 8b40 vcmp.f64 d8, #0.0 + 8008f20: eef1 fa10 vmrs APSR_nzcv, fpscr + 8008f24: f040 80b0 bne.w 8009088 <__kernel_rem_pio2+0x338> + 8008f28: 1e6b subs r3, r5, #1 + 8008f2a: 4618 mov r0, r3 + 8008f2c: 2200 movs r2, #0 + 8008f2e: 4548 cmp r0, r9 + 8008f30: da4e bge.n 8008fd0 <__kernel_rem_pio2+0x280> + 8008f32: 2a00 cmp r2, #0 + 8008f34: f000 8088 beq.w 8009048 <__kernel_rem_pio2+0x2f8> + 8008f38: aa06 add r2, sp, #24 + 8008f3a: 3c18 subs r4, #24 + 8008f3c: f852 1023 ldr.w r1, [r2, r3, lsl #2] + 8008f40: 2900 cmp r1, #0 + 8008f42: f000 808e beq.w 8009062 <__kernel_rem_pio2+0x312> + 8008f46: eeb7 0b00 vmov.f64 d0, #112 ; 0x3f800000 1.0 + 8008f4a: 4620 mov r0, r4 + 8008f4c: 9302 str r3, [sp, #8] + 8008f4e: f000 fd9f bl 8009a90 + 8008f52: 9b02 ldr r3, [sp, #8] + 8008f54: aa6a add r2, sp, #424 ; 0x1a8 + 8008f56: 00d9 lsls r1, r3, #3 + 8008f58: ed9f 6b45 vldr d6, [pc, #276] ; 8009070 <__kernel_rem_pio2+0x320> + 8008f5c: 1850 adds r0, r2, r1 + 8008f5e: f100 0508 add.w r5, r0, #8 + 8008f62: 461c mov r4, r3 + 8008f64: 2c00 cmp r4, #0 + 8008f66: f280 80bd bge.w 80090e4 <__kernel_rem_pio2+0x394> + 8008f6a: 2500 movs r5, #0 + 8008f6c: 1b5c subs r4, r3, r5 + 8008f6e: 2c00 cmp r4, #0 + 8008f70: f2c0 80dd blt.w 800912e <__kernel_rem_pio2+0x3de> + 8008f74: 4f43 ldr r7, [pc, #268] ; (8009084 <__kernel_rem_pio2+0x334>) + 8008f76: ed9f 7b3c vldr d7, [pc, #240] ; 8009068 <__kernel_rem_pio2+0x318> + 8008f7a: 2400 movs r4, #0 + 8008f7c: e0cb b.n 8009116 <__kernel_rem_pio2+0x3c6> + 8008f7e: f04f 0802 mov.w r8, #2 + 8008f82: e787 b.n 8008e94 <__kernel_rem_pio2+0x144> + 8008f84: ab06 add r3, sp, #24 + 8008f86: f853 3020 ldr.w r3, [r3, r0, lsl #2] + 8008f8a: b949 cbnz r1, 8008fa0 <__kernel_rem_pio2+0x250> + 8008f8c: b12b cbz r3, 8008f9a <__kernel_rem_pio2+0x24a> + 8008f8e: aa06 add r2, sp, #24 + 8008f90: f1c3 7380 rsb r3, r3, #16777216 ; 0x1000000 + 8008f94: f842 3020 str.w r3, [r2, r0, lsl #2] + 8008f98: 2301 movs r3, #1 + 8008f9a: 3001 adds r0, #1 + 8008f9c: 4619 mov r1, r3 + 8008f9e: e780 b.n 8008ea2 <__kernel_rem_pio2+0x152> + 8008fa0: aa06 add r2, sp, #24 + 8008fa2: ebac 0303 sub.w r3, ip, r3 + 8008fa6: f842 3020 str.w r3, [r2, r0, lsl #2] + 8008faa: 460b mov r3, r1 + 8008fac: e7f5 b.n 8008f9a <__kernel_rem_pio2+0x24a> + 8008fae: 1e68 subs r0, r5, #1 + 8008fb0: ab06 add r3, sp, #24 + 8008fb2: f853 3020 ldr.w r3, [r3, r0, lsl #2] + 8008fb6: f3c3 0316 ubfx r3, r3, #0, #23 + 8008fba: aa06 add r2, sp, #24 + 8008fbc: f842 3020 str.w r3, [r2, r0, lsl #2] + 8008fc0: e778 b.n 8008eb4 <__kernel_rem_pio2+0x164> + 8008fc2: 1e68 subs r0, r5, #1 + 8008fc4: ab06 add r3, sp, #24 + 8008fc6: f853 3020 ldr.w r3, [r3, r0, lsl #2] + 8008fca: f3c3 0315 ubfx r3, r3, #0, #22 + 8008fce: e7f4 b.n 8008fba <__kernel_rem_pio2+0x26a> + 8008fd0: a906 add r1, sp, #24 + 8008fd2: f851 1020 ldr.w r1, [r1, r0, lsl #2] + 8008fd6: 3801 subs r0, #1 + 8008fd8: 430a orrs r2, r1 + 8008fda: e7a8 b.n 8008f2e <__kernel_rem_pio2+0x1de> + 8008fdc: f10c 0c01 add.w ip, ip, #1 + 8008fe0: f853 2d04 ldr.w r2, [r3, #-4]! + 8008fe4: 2a00 cmp r2, #0 + 8008fe6: d0f9 beq.n 8008fdc <__kernel_rem_pio2+0x28c> + 8008fe8: eb0b 0305 add.w r3, fp, r5 + 8008fec: aa1a add r2, sp, #104 ; 0x68 + 8008fee: 00db lsls r3, r3, #3 + 8008ff0: 1898 adds r0, r3, r2 + 8008ff2: 3008 adds r0, #8 + 8008ff4: 1c69 adds r1, r5, #1 + 8008ff6: 3708 adds r7, #8 + 8008ff8: 2200 movs r2, #0 + 8008ffa: 4465 add r5, ip + 8008ffc: 9005 str r0, [sp, #20] + 8008ffe: 428d cmp r5, r1 + 8009000: f6ff af07 blt.w 8008e12 <__kernel_rem_pio2+0xc2> + 8009004: a81a add r0, sp, #104 ; 0x68 + 8009006: eb02 0c03 add.w ip, r2, r3 + 800900a: 4484 add ip, r0 + 800900c: 9803 ldr r0, [sp, #12] + 800900e: f8dd e008 ldr.w lr, [sp, #8] + 8009012: f850 0021 ldr.w r0, [r0, r1, lsl #2] + 8009016: 9001 str r0, [sp, #4] + 8009018: ee07 0a90 vmov s15, r0 + 800901c: eeb8 7be7 vcvt.f64.s32 d7, s15 + 8009020: 9805 ldr r0, [sp, #20] + 8009022: ed8c 7b00 vstr d7, [ip] + 8009026: ed9f 7b10 vldr d7, [pc, #64] ; 8009068 <__kernel_rem_pio2+0x318> + 800902a: eb00 0802 add.w r8, r0, r2 + 800902e: f04f 0c00 mov.w ip, #0 + 8009032: 45d4 cmp ip, sl + 8009034: dd0c ble.n 8009050 <__kernel_rem_pio2+0x300> + 8009036: eb02 0c07 add.w ip, r2, r7 + 800903a: a86a add r0, sp, #424 ; 0x1a8 + 800903c: 4484 add ip, r0 + 800903e: ed8c 7b02 vstr d7, [ip, #8] + 8009042: 3101 adds r1, #1 + 8009044: 3208 adds r2, #8 + 8009046: e7da b.n 8008ffe <__kernel_rem_pio2+0x2ae> + 8009048: 9b04 ldr r3, [sp, #16] + 800904a: f04f 0c01 mov.w ip, #1 + 800904e: e7c7 b.n 8008fe0 <__kernel_rem_pio2+0x290> + 8009050: ecbe 5b02 vldmia lr!, {d5} + 8009054: ed38 6b02 vldmdb r8!, {d6} + 8009058: f10c 0c01 add.w ip, ip, #1 + 800905c: eea5 7b06 vfma.f64 d7, d5, d6 + 8009060: e7e7 b.n 8009032 <__kernel_rem_pio2+0x2e2> + 8009062: 3b01 subs r3, #1 + 8009064: e768 b.n 8008f38 <__kernel_rem_pio2+0x1e8> + 8009066: bf00 nop + ... + 8009074: 3e700000 .word 0x3e700000 + 8009078: 00000000 .word 0x00000000 + 800907c: 41700000 .word 0x41700000 + 8009080: 0800aa28 .word 0x0800aa28 + 8009084: 0800a9e8 .word 0x0800a9e8 + 8009088: 4260 negs r0, r4 + 800908a: eeb0 0b48 vmov.f64 d0, d8 + 800908e: f000 fcff bl 8009a90 + 8009092: ed9f 6b77 vldr d6, [pc, #476] ; 8009270 <__kernel_rem_pio2+0x520> + 8009096: eeb4 0bc6 vcmpe.f64 d0, d6 + 800909a: eef1 fa10 vmrs APSR_nzcv, fpscr + 800909e: db18 blt.n 80090d2 <__kernel_rem_pio2+0x382> + 80090a0: ed9f 7b75 vldr d7, [pc, #468] ; 8009278 <__kernel_rem_pio2+0x528> + 80090a4: ee20 7b07 vmul.f64 d7, d0, d7 + 80090a8: eebd 7bc7 vcvt.s32.f64 s14, d7 + 80090ac: aa06 add r2, sp, #24 + 80090ae: eeb8 5bc7 vcvt.f64.s32 d5, s14 + 80090b2: eea5 0b46 vfms.f64 d0, d5, d6 + 80090b6: eebd 0bc0 vcvt.s32.f64 s0, d0 + 80090ba: a906 add r1, sp, #24 + 80090bc: ee10 3a10 vmov r3, s0 + 80090c0: f842 3025 str.w r3, [r2, r5, lsl #2] + 80090c4: 1c6b adds r3, r5, #1 + 80090c6: ee17 2a10 vmov r2, s14 + 80090ca: 3418 adds r4, #24 + 80090cc: f841 2023 str.w r2, [r1, r3, lsl #2] + 80090d0: e739 b.n 8008f46 <__kernel_rem_pio2+0x1f6> + 80090d2: eebd 0bc0 vcvt.s32.f64 s0, d0 + 80090d6: aa06 add r2, sp, #24 + 80090d8: ee10 3a10 vmov r3, s0 + 80090dc: f842 3025 str.w r3, [r2, r5, lsl #2] + 80090e0: 462b mov r3, r5 + 80090e2: e730 b.n 8008f46 <__kernel_rem_pio2+0x1f6> + 80090e4: aa06 add r2, sp, #24 + 80090e6: f852 2024 ldr.w r2, [r2, r4, lsl #2] + 80090ea: 9202 str r2, [sp, #8] + 80090ec: ee07 2a90 vmov s15, r2 + 80090f0: 3c01 subs r4, #1 + 80090f2: eeb8 7be7 vcvt.f64.s32 d7, s15 + 80090f6: ee27 7b00 vmul.f64 d7, d7, d0 + 80090fa: ee20 0b06 vmul.f64 d0, d0, d6 + 80090fe: ed25 7b02 vstmdb r5!, {d7} + 8009102: e72f b.n 8008f64 <__kernel_rem_pio2+0x214> + 8009104: eb00 0cc4 add.w ip, r0, r4, lsl #3 + 8009108: ecb7 5b02 vldmia r7!, {d5} + 800910c: ed9c 6b00 vldr d6, [ip] + 8009110: 3401 adds r4, #1 + 8009112: eea5 7b06 vfma.f64 d7, d5, d6 + 8009116: 454c cmp r4, r9 + 8009118: dc01 bgt.n 800911e <__kernel_rem_pio2+0x3ce> + 800911a: 42a5 cmp r5, r4 + 800911c: daf2 bge.n 8009104 <__kernel_rem_pio2+0x3b4> + 800911e: aa42 add r2, sp, #264 ; 0x108 + 8009120: eb02 04c5 add.w r4, r2, r5, lsl #3 + 8009124: ed84 7b00 vstr d7, [r4] + 8009128: 3501 adds r5, #1 + 800912a: 3808 subs r0, #8 + 800912c: e71e b.n 8008f6c <__kernel_rem_pio2+0x21c> + 800912e: 9aa2 ldr r2, [sp, #648] ; 0x288 + 8009130: 2a03 cmp r2, #3 + 8009132: d84e bhi.n 80091d2 <__kernel_rem_pio2+0x482> + 8009134: e8df f002 tbb [pc, r2] + 8009138: 021f1f3e .word 0x021f1f3e + 800913c: 3108 adds r1, #8 + 800913e: aa42 add r2, sp, #264 ; 0x108 + 8009140: 4411 add r1, r2 + 8009142: 4608 mov r0, r1 + 8009144: 461c mov r4, r3 + 8009146: 2c00 cmp r4, #0 + 8009148: dc61 bgt.n 800920e <__kernel_rem_pio2+0x4be> + 800914a: 4608 mov r0, r1 + 800914c: 461c mov r4, r3 + 800914e: 2c01 cmp r4, #1 + 8009150: dc6d bgt.n 800922e <__kernel_rem_pio2+0x4de> + 8009152: ed9f 7b4b vldr d7, [pc, #300] ; 8009280 <__kernel_rem_pio2+0x530> + 8009156: 2b01 cmp r3, #1 + 8009158: dc79 bgt.n 800924e <__kernel_rem_pio2+0x4fe> + 800915a: ed9d 5b42 vldr d5, [sp, #264] ; 0x108 + 800915e: ed9d 6b44 vldr d6, [sp, #272] ; 0x110 + 8009162: f1b8 0f00 cmp.w r8, #0 + 8009166: d178 bne.n 800925a <__kernel_rem_pio2+0x50a> + 8009168: ed86 5b00 vstr d5, [r6] + 800916c: ed86 6b02 vstr d6, [r6, #8] + 8009170: ed86 7b04 vstr d7, [r6, #16] + 8009174: e02d b.n 80091d2 <__kernel_rem_pio2+0x482> + 8009176: ed9f 6b42 vldr d6, [pc, #264] ; 8009280 <__kernel_rem_pio2+0x530> + 800917a: 3108 adds r1, #8 + 800917c: aa42 add r2, sp, #264 ; 0x108 + 800917e: 4411 add r1, r2 + 8009180: 4618 mov r0, r3 + 8009182: 2800 cmp r0, #0 + 8009184: da34 bge.n 80091f0 <__kernel_rem_pio2+0x4a0> + 8009186: f1b8 0f00 cmp.w r8, #0 + 800918a: d037 beq.n 80091fc <__kernel_rem_pio2+0x4ac> + 800918c: eeb1 7b46 vneg.f64 d7, d6 + 8009190: ed86 7b00 vstr d7, [r6] + 8009194: ed9d 7b42 vldr d7, [sp, #264] ; 0x108 + 8009198: a844 add r0, sp, #272 ; 0x110 + 800919a: 2101 movs r1, #1 + 800919c: ee37 7b46 vsub.f64 d7, d7, d6 + 80091a0: 428b cmp r3, r1 + 80091a2: da2e bge.n 8009202 <__kernel_rem_pio2+0x4b2> + 80091a4: f1b8 0f00 cmp.w r8, #0 + 80091a8: d001 beq.n 80091ae <__kernel_rem_pio2+0x45e> + 80091aa: eeb1 7b47 vneg.f64 d7, d7 + 80091ae: ed86 7b02 vstr d7, [r6, #8] + 80091b2: e00e b.n 80091d2 <__kernel_rem_pio2+0x482> + 80091b4: aa92 add r2, sp, #584 ; 0x248 + 80091b6: ed9f 7b32 vldr d7, [pc, #200] ; 8009280 <__kernel_rem_pio2+0x530> + 80091ba: 4411 add r1, r2 + 80091bc: f5a1 719c sub.w r1, r1, #312 ; 0x138 + 80091c0: 2b00 cmp r3, #0 + 80091c2: da0f bge.n 80091e4 <__kernel_rem_pio2+0x494> + 80091c4: f1b8 0f00 cmp.w r8, #0 + 80091c8: d001 beq.n 80091ce <__kernel_rem_pio2+0x47e> + 80091ca: eeb1 7b47 vneg.f64 d7, d7 + 80091ce: ed86 7b00 vstr d7, [r6] + 80091d2: 9b01 ldr r3, [sp, #4] + 80091d4: f003 0007 and.w r0, r3, #7 + 80091d8: f50d 7d13 add.w sp, sp, #588 ; 0x24c + 80091dc: ecbd 8b06 vpop {d8-d10} + 80091e0: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} + 80091e4: ed31 6b02 vldmdb r1!, {d6} + 80091e8: 3b01 subs r3, #1 + 80091ea: ee37 7b06 vadd.f64 d7, d7, d6 + 80091ee: e7e7 b.n 80091c0 <__kernel_rem_pio2+0x470> + 80091f0: ed31 7b02 vldmdb r1!, {d7} + 80091f4: 3801 subs r0, #1 + 80091f6: ee36 6b07 vadd.f64 d6, d6, d7 + 80091fa: e7c2 b.n 8009182 <__kernel_rem_pio2+0x432> + 80091fc: eeb0 7b46 vmov.f64 d7, d6 + 8009200: e7c6 b.n 8009190 <__kernel_rem_pio2+0x440> + 8009202: ecb0 6b02 vldmia r0!, {d6} + 8009206: 3101 adds r1, #1 + 8009208: ee37 7b06 vadd.f64 d7, d7, d6 + 800920c: e7c8 b.n 80091a0 <__kernel_rem_pio2+0x450> + 800920e: ed10 7b04 vldr d7, [r0, #-16] + 8009212: ed30 5b02 vldmdb r0!, {d5} + 8009216: 3c01 subs r4, #1 + 8009218: ee37 6b05 vadd.f64 d6, d7, d5 + 800921c: ee37 7b46 vsub.f64 d7, d7, d6 + 8009220: ed00 6b02 vstr d6, [r0, #-8] + 8009224: ee37 7b05 vadd.f64 d7, d7, d5 + 8009228: ed80 7b00 vstr d7, [r0] + 800922c: e78b b.n 8009146 <__kernel_rem_pio2+0x3f6> + 800922e: ed10 7b04 vldr d7, [r0, #-16] + 8009232: ed30 5b02 vldmdb r0!, {d5} + 8009236: 3c01 subs r4, #1 + 8009238: ee37 6b05 vadd.f64 d6, d7, d5 + 800923c: ee37 7b46 vsub.f64 d7, d7, d6 + 8009240: ed00 6b02 vstr d6, [r0, #-8] + 8009244: ee37 7b05 vadd.f64 d7, d7, d5 + 8009248: ed80 7b00 vstr d7, [r0] + 800924c: e77f b.n 800914e <__kernel_rem_pio2+0x3fe> + 800924e: ed31 6b02 vldmdb r1!, {d6} + 8009252: 3b01 subs r3, #1 + 8009254: ee37 7b06 vadd.f64 d7, d7, d6 + 8009258: e77d b.n 8009156 <__kernel_rem_pio2+0x406> + 800925a: eeb1 5b45 vneg.f64 d5, d5 + 800925e: eeb1 6b46 vneg.f64 d6, d6 + 8009262: ed86 5b00 vstr d5, [r6] + 8009266: eeb1 7b47 vneg.f64 d7, d7 + 800926a: ed86 6b02 vstr d6, [r6, #8] + 800926e: e77f b.n 8009170 <__kernel_rem_pio2+0x420> + 8009270: 00000000 .word 0x00000000 + 8009274: 41700000 .word 0x41700000 + 8009278: 00000000 .word 0x00000000 + 800927c: 3e700000 .word 0x3e700000 + ... + +08009288 <__kernel_sin>: + 8009288: ee10 3a90 vmov r3, s1 + 800928c: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000 + 8009290: f1b3 5f79 cmp.w r3, #1044381696 ; 0x3e400000 + 8009294: da04 bge.n 80092a0 <__kernel_sin+0x18> + 8009296: eefd 7bc0 vcvt.s32.f64 s15, d0 + 800929a: ee17 3a90 vmov r3, s15 + 800929e: b35b cbz r3, 80092f8 <__kernel_sin+0x70> + 80092a0: ee20 6b00 vmul.f64 d6, d0, d0 + 80092a4: ee20 5b06 vmul.f64 d5, d0, d6 + 80092a8: ed9f 7b15 vldr d7, [pc, #84] ; 8009300 <__kernel_sin+0x78> + 80092ac: ed9f 4b16 vldr d4, [pc, #88] ; 8009308 <__kernel_sin+0x80> + 80092b0: eea6 4b07 vfma.f64 d4, d6, d7 + 80092b4: ed9f 7b16 vldr d7, [pc, #88] ; 8009310 <__kernel_sin+0x88> + 80092b8: eea4 7b06 vfma.f64 d7, d4, d6 + 80092bc: ed9f 4b16 vldr d4, [pc, #88] ; 8009318 <__kernel_sin+0x90> + 80092c0: eea7 4b06 vfma.f64 d4, d7, d6 + 80092c4: ed9f 7b16 vldr d7, [pc, #88] ; 8009320 <__kernel_sin+0x98> + 80092c8: eea4 7b06 vfma.f64 d7, d4, d6 + 80092cc: b930 cbnz r0, 80092dc <__kernel_sin+0x54> + 80092ce: ed9f 4b16 vldr d4, [pc, #88] ; 8009328 <__kernel_sin+0xa0> + 80092d2: eea6 4b07 vfma.f64 d4, d6, d7 + 80092d6: eea4 0b05 vfma.f64 d0, d4, d5 + 80092da: 4770 bx lr + 80092dc: ee27 7b45 vnmul.f64 d7, d7, d5 + 80092e0: eeb6 4b00 vmov.f64 d4, #96 ; 0x3f000000 0.5 + 80092e4: eea1 7b04 vfma.f64 d7, d1, d4 + 80092e8: ee97 1b06 vfnms.f64 d1, d7, d6 + 80092ec: ed9f 7b10 vldr d7, [pc, #64] ; 8009330 <__kernel_sin+0xa8> + 80092f0: eea5 1b07 vfma.f64 d1, d5, d7 + 80092f4: ee30 0b41 vsub.f64 d0, d0, d1 + 80092f8: 4770 bx lr + 80092fa: bf00 nop + 80092fc: f3af 8000 nop.w + 8009300: 5acfd57c .word 0x5acfd57c + 8009304: 3de5d93a .word 0x3de5d93a + 8009308: 8a2b9ceb .word 0x8a2b9ceb + 800930c: be5ae5e6 .word 0xbe5ae5e6 + 8009310: 57b1fe7d .word 0x57b1fe7d + 8009314: 3ec71de3 .word 0x3ec71de3 + 8009318: 19c161d5 .word 0x19c161d5 + 800931c: bf2a01a0 .word 0xbf2a01a0 + 8009320: 1110f8a6 .word 0x1110f8a6 + 8009324: 3f811111 .word 0x3f811111 + 8009328: 55555549 .word 0x55555549 + 800932c: bfc55555 .word 0xbfc55555 + 8009330: 55555549 .word 0x55555549 + 8009334: 3fc55555 .word 0x3fc55555 + +08009338 <__kernel_cosf>: + 8009338: ee10 3a10 vmov r3, s0 + 800933c: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000 + 8009340: f1b3 5f48 cmp.w r3, #838860800 ; 0x32000000 + 8009344: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 + 8009348: da05 bge.n 8009356 <__kernel_cosf+0x1e> + 800934a: eefd 7ac0 vcvt.s32.f32 s15, s0 + 800934e: ee17 2a90 vmov r2, s15 + 8009352: 2a00 cmp r2, #0 + 8009354: d03b beq.n 80093ce <__kernel_cosf+0x96> + 8009356: ee20 6a00 vmul.f32 s12, s0, s0 + 800935a: eeb6 7a00 vmov.f32 s14, #96 ; 0x3f000000 0.5 + 800935e: eddf 5a1d vldr s11, [pc, #116] ; 80093d4 <__kernel_cosf+0x9c> + 8009362: 4a1d ldr r2, [pc, #116] ; (80093d8 <__kernel_cosf+0xa0>) + 8009364: ee66 7a07 vmul.f32 s15, s12, s14 + 8009368: ed9f 7a1c vldr s14, [pc, #112] ; 80093dc <__kernel_cosf+0xa4> + 800936c: eea6 7a25 vfma.f32 s14, s12, s11 + 8009370: 4293 cmp r3, r2 + 8009372: eddf 5a1b vldr s11, [pc, #108] ; 80093e0 <__kernel_cosf+0xa8> + 8009376: eee7 5a06 vfma.f32 s11, s14, s12 + 800937a: ed9f 7a1a vldr s14, [pc, #104] ; 80093e4 <__kernel_cosf+0xac> + 800937e: eea5 7a86 vfma.f32 s14, s11, s12 + 8009382: eddf 5a19 vldr s11, [pc, #100] ; 80093e8 <__kernel_cosf+0xb0> + 8009386: eee7 5a06 vfma.f32 s11, s14, s12 + 800938a: ed9f 7a18 vldr s14, [pc, #96] ; 80093ec <__kernel_cosf+0xb4> + 800938e: eea5 7a86 vfma.f32 s14, s11, s12 + 8009392: ee60 0ac0 vnmul.f32 s1, s1, s0 + 8009396: ee27 7a06 vmul.f32 s14, s14, s12 + 800939a: eee6 0a07 vfma.f32 s1, s12, s14 + 800939e: dc04 bgt.n 80093aa <__kernel_cosf+0x72> + 80093a0: ee77 0ae0 vsub.f32 s1, s15, s1 + 80093a4: ee36 0ae0 vsub.f32 s0, s13, s1 + 80093a8: 4770 bx lr + 80093aa: 4a11 ldr r2, [pc, #68] ; (80093f0 <__kernel_cosf+0xb8>) + 80093ac: 4293 cmp r3, r2 + 80093ae: bfda itte le + 80093b0: f103 437f addle.w r3, r3, #4278190080 ; 0xff000000 + 80093b4: ee07 3a10 vmovle s14, r3 + 80093b8: eeb5 7a02 vmovgt.f32 s14, #82 ; 0x3e900000 0.2812500 + 80093bc: ee77 7ac7 vsub.f32 s15, s15, s14 + 80093c0: ee36 0ac7 vsub.f32 s0, s13, s14 + 80093c4: ee77 7ae0 vsub.f32 s15, s15, s1 + 80093c8: ee30 0a67 vsub.f32 s0, s0, s15 + 80093cc: 4770 bx lr + 80093ce: eeb0 0a66 vmov.f32 s0, s13 + 80093d2: 4770 bx lr + 80093d4: ad47d74e .word 0xad47d74e + 80093d8: 3e999999 .word 0x3e999999 + 80093dc: 310f74f6 .word 0x310f74f6 + 80093e0: b493f27c .word 0xb493f27c + 80093e4: 37d00d01 .word 0x37d00d01 + 80093e8: bab60b61 .word 0xbab60b61 + 80093ec: 3d2aaaab .word 0x3d2aaaab + 80093f0: 3f480000 .word 0x3f480000 + +080093f4 <__kernel_rem_pio2f>: + 80093f4: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} + 80093f8: ed2d 8b04 vpush {d8-d9} + 80093fc: b0d7 sub sp, #348 ; 0x15c + 80093fe: 469b mov fp, r3 + 8009400: 460e mov r6, r1 + 8009402: 4bbe ldr r3, [pc, #760] ; (80096fc <__kernel_rem_pio2f+0x308>) + 8009404: 9964 ldr r1, [sp, #400] ; 0x190 + 8009406: 9002 str r0, [sp, #8] + 8009408: f853 9021 ldr.w r9, [r3, r1, lsl #2] + 800940c: 9865 ldr r0, [sp, #404] ; 0x194 + 800940e: ed9f 7abf vldr s14, [pc, #764] ; 800970c <__kernel_rem_pio2f+0x318> + 8009412: 1ed1 subs r1, r2, #3 + 8009414: 2308 movs r3, #8 + 8009416: fb91 f1f3 sdiv r1, r1, r3 + 800941a: ea21 71e1 bic.w r1, r1, r1, asr #31 + 800941e: f10b 3aff add.w sl, fp, #4294967295 ; 0xffffffff + 8009422: 1c4c adds r4, r1, #1 + 8009424: eba2 04c4 sub.w r4, r2, r4, lsl #3 + 8009428: eba1 050a sub.w r5, r1, sl + 800942c: aa1a add r2, sp, #104 ; 0x68 + 800942e: eb09 070a add.w r7, r9, sl + 8009432: eb00 0c85 add.w ip, r0, r5, lsl #2 + 8009436: 4696 mov lr, r2 + 8009438: 2300 movs r3, #0 + 800943a: 42bb cmp r3, r7 + 800943c: dd0f ble.n 800945e <__kernel_rem_pio2f+0x6a> + 800943e: af42 add r7, sp, #264 ; 0x108 + 8009440: 2200 movs r2, #0 + 8009442: 454a cmp r2, r9 + 8009444: dc27 bgt.n 8009496 <__kernel_rem_pio2f+0xa2> + 8009446: f10d 0c68 add.w ip, sp, #104 ; 0x68 + 800944a: eb0b 0302 add.w r3, fp, r2 + 800944e: eb0c 0383 add.w r3, ip, r3, lsl #2 + 8009452: 9d02 ldr r5, [sp, #8] + 8009454: eddf 7aad vldr s15, [pc, #692] ; 800970c <__kernel_rem_pio2f+0x318> + 8009458: f04f 0c00 mov.w ip, #0 + 800945c: e015 b.n 800948a <__kernel_rem_pio2f+0x96> + 800945e: 42dd cmn r5, r3 + 8009460: bf5d ittte pl + 8009462: f85c 2023 ldrpl.w r2, [ip, r3, lsl #2] + 8009466: ee07 2a90 vmovpl s15, r2 + 800946a: eef8 7ae7 vcvtpl.f32.s32 s15, s15 + 800946e: eef0 7a47 vmovmi.f32 s15, s14 + 8009472: ecee 7a01 vstmia lr!, {s15} + 8009476: 3301 adds r3, #1 + 8009478: e7df b.n 800943a <__kernel_rem_pio2f+0x46> + 800947a: ecf5 6a01 vldmia r5!, {s13} + 800947e: ed33 7a01 vldmdb r3!, {s14} + 8009482: eee6 7a87 vfma.f32 s15, s13, s14 + 8009486: f10c 0c01 add.w ip, ip, #1 + 800948a: 45d4 cmp ip, sl + 800948c: ddf5 ble.n 800947a <__kernel_rem_pio2f+0x86> + 800948e: ece7 7a01 vstmia r7!, {s15} + 8009492: 3201 adds r2, #1 + 8009494: e7d5 b.n 8009442 <__kernel_rem_pio2f+0x4e> + 8009496: ab06 add r3, sp, #24 + 8009498: eb03 0389 add.w r3, r3, r9, lsl #2 + 800949c: 9304 str r3, [sp, #16] + 800949e: eddf 8a9a vldr s17, [pc, #616] ; 8009708 <__kernel_rem_pio2f+0x314> + 80094a2: ed9f 9a98 vldr s18, [pc, #608] ; 8009704 <__kernel_rem_pio2f+0x310> + 80094a6: eb00 0381 add.w r3, r0, r1, lsl #2 + 80094aa: 9303 str r3, [sp, #12] + 80094ac: 464d mov r5, r9 + 80094ae: ab56 add r3, sp, #344 ; 0x158 + 80094b0: f105 4780 add.w r7, r5, #1073741824 ; 0x40000000 + 80094b4: eb03 0385 add.w r3, r3, r5, lsl #2 + 80094b8: 3f01 subs r7, #1 + 80094ba: ed13 0a14 vldr s0, [r3, #-80] ; 0xffffffb0 + 80094be: 00bf lsls r7, r7, #2 + 80094c0: ab56 add r3, sp, #344 ; 0x158 + 80094c2: 19da adds r2, r3, r7 + 80094c4: 3a4c subs r2, #76 ; 0x4c + 80094c6: 2300 movs r3, #0 + 80094c8: 1ae9 subs r1, r5, r3 + 80094ca: 2900 cmp r1, #0 + 80094cc: dc4c bgt.n 8009568 <__kernel_rem_pio2f+0x174> + 80094ce: 4620 mov r0, r4 + 80094d0: f000 fba6 bl 8009c20 + 80094d4: eeb0 8a40 vmov.f32 s16, s0 + 80094d8: eeb4 0a00 vmov.f32 s0, #64 ; 0x3e000000 0.125 + 80094dc: ee28 0a00 vmul.f32 s0, s16, s0 + 80094e0: f000 fb5c bl 8009b9c + 80094e4: eef2 7a00 vmov.f32 s15, #32 ; 0x41000000 8.0 + 80094e8: eea0 8a67 vfms.f32 s16, s0, s15 + 80094ec: 2c00 cmp r4, #0 + 80094ee: eefd 7ac8 vcvt.s32.f32 s15, s16 + 80094f2: edcd 7a01 vstr s15, [sp, #4] + 80094f6: eef8 7ae7 vcvt.f32.s32 s15, s15 + 80094fa: ee38 8a67 vsub.f32 s16, s16, s15 + 80094fe: dd48 ble.n 8009592 <__kernel_rem_pio2f+0x19e> + 8009500: 1e69 subs r1, r5, #1 + 8009502: ab06 add r3, sp, #24 + 8009504: f1c4 0008 rsb r0, r4, #8 + 8009508: f853 c021 ldr.w ip, [r3, r1, lsl #2] + 800950c: 9a01 ldr r2, [sp, #4] + 800950e: fa4c f300 asr.w r3, ip, r0 + 8009512: 441a add r2, r3 + 8009514: 4083 lsls r3, r0 + 8009516: 9201 str r2, [sp, #4] + 8009518: ebac 0203 sub.w r2, ip, r3 + 800951c: ab06 add r3, sp, #24 + 800951e: f843 2021 str.w r2, [r3, r1, lsl #2] + 8009522: f1c4 0307 rsb r3, r4, #7 + 8009526: fa42 f803 asr.w r8, r2, r3 + 800952a: f1b8 0f00 cmp.w r8, #0 + 800952e: dd41 ble.n 80095b4 <__kernel_rem_pio2f+0x1c0> + 8009530: 9b01 ldr r3, [sp, #4] + 8009532: 2000 movs r0, #0 + 8009534: 3301 adds r3, #1 + 8009536: 9301 str r3, [sp, #4] + 8009538: 4601 mov r1, r0 + 800953a: 4285 cmp r5, r0 + 800953c: dc6d bgt.n 800961a <__kernel_rem_pio2f+0x226> + 800953e: 2c00 cmp r4, #0 + 8009540: dd04 ble.n 800954c <__kernel_rem_pio2f+0x158> + 8009542: 2c01 cmp r4, #1 + 8009544: d07e beq.n 8009644 <__kernel_rem_pio2f+0x250> + 8009546: 2c02 cmp r4, #2 + 8009548: f000 8086 beq.w 8009658 <__kernel_rem_pio2f+0x264> + 800954c: f1b8 0f02 cmp.w r8, #2 + 8009550: d130 bne.n 80095b4 <__kernel_rem_pio2f+0x1c0> + 8009552: eeb7 0a00 vmov.f32 s0, #112 ; 0x3f800000 1.0 + 8009556: ee30 8a48 vsub.f32 s16, s0, s16 + 800955a: b359 cbz r1, 80095b4 <__kernel_rem_pio2f+0x1c0> + 800955c: 4620 mov r0, r4 + 800955e: f000 fb5f bl 8009c20 + 8009562: ee38 8a40 vsub.f32 s16, s16, s0 + 8009566: e025 b.n 80095b4 <__kernel_rem_pio2f+0x1c0> + 8009568: ee60 7a28 vmul.f32 s15, s0, s17 + 800956c: a806 add r0, sp, #24 + 800956e: eefd 7ae7 vcvt.s32.f32 s15, s15 + 8009572: eef8 7ae7 vcvt.f32.s32 s15, s15 + 8009576: eea7 0ac9 vfms.f32 s0, s15, s18 + 800957a: eebd 0ac0 vcvt.s32.f32 s0, s0 + 800957e: ee10 1a10 vmov r1, s0 + 8009582: ed32 0a01 vldmdb r2!, {s0} + 8009586: f840 1023 str.w r1, [r0, r3, lsl #2] + 800958a: ee37 0a80 vadd.f32 s0, s15, s0 + 800958e: 3301 adds r3, #1 + 8009590: e79a b.n 80094c8 <__kernel_rem_pio2f+0xd4> + 8009592: d106 bne.n 80095a2 <__kernel_rem_pio2f+0x1ae> + 8009594: 1e6b subs r3, r5, #1 + 8009596: aa06 add r2, sp, #24 + 8009598: f852 2023 ldr.w r2, [r2, r3, lsl #2] + 800959c: ea4f 2822 mov.w r8, r2, asr #8 + 80095a0: e7c3 b.n 800952a <__kernel_rem_pio2f+0x136> + 80095a2: eef6 7a00 vmov.f32 s15, #96 ; 0x3f000000 0.5 + 80095a6: eeb4 8ae7 vcmpe.f32 s16, s15 + 80095aa: eef1 fa10 vmrs APSR_nzcv, fpscr + 80095ae: da31 bge.n 8009614 <__kernel_rem_pio2f+0x220> + 80095b0: f04f 0800 mov.w r8, #0 + 80095b4: eeb5 8a40 vcmp.f32 s16, #0.0 + 80095b8: eef1 fa10 vmrs APSR_nzcv, fpscr + 80095bc: f040 80a8 bne.w 8009710 <__kernel_rem_pio2f+0x31c> + 80095c0: 1e6b subs r3, r5, #1 + 80095c2: 4618 mov r0, r3 + 80095c4: 2200 movs r2, #0 + 80095c6: 4548 cmp r0, r9 + 80095c8: da4d bge.n 8009666 <__kernel_rem_pio2f+0x272> + 80095ca: 2a00 cmp r2, #0 + 80095cc: f000 8087 beq.w 80096de <__kernel_rem_pio2f+0x2ea> + 80095d0: aa06 add r2, sp, #24 + 80095d2: 3c08 subs r4, #8 + 80095d4: f852 1023 ldr.w r1, [r2, r3, lsl #2] + 80095d8: 2900 cmp r1, #0 + 80095da: f000 808d beq.w 80096f8 <__kernel_rem_pio2f+0x304> + 80095de: 4620 mov r0, r4 + 80095e0: eeb7 0a00 vmov.f32 s0, #112 ; 0x3f800000 1.0 + 80095e4: 9302 str r3, [sp, #8] + 80095e6: f000 fb1b bl 8009c20 + 80095ea: 9b02 ldr r3, [sp, #8] + 80095ec: ed9f 7a46 vldr s14, [pc, #280] ; 8009708 <__kernel_rem_pio2f+0x314> + 80095f0: 0099 lsls r1, r3, #2 + 80095f2: aa42 add r2, sp, #264 ; 0x108 + 80095f4: 1850 adds r0, r2, r1 + 80095f6: 1d05 adds r5, r0, #4 + 80095f8: 461c mov r4, r3 + 80095fa: 2c00 cmp r4, #0 + 80095fc: f280 80b8 bge.w 8009770 <__kernel_rem_pio2f+0x37c> + 8009600: 2500 movs r5, #0 + 8009602: 1b5c subs r4, r3, r5 + 8009604: 2c00 cmp r4, #0 + 8009606: f2c0 80d8 blt.w 80097ba <__kernel_rem_pio2f+0x3c6> + 800960a: 4f3d ldr r7, [pc, #244] ; (8009700 <__kernel_rem_pio2f+0x30c>) + 800960c: eddf 7a3f vldr s15, [pc, #252] ; 800970c <__kernel_rem_pio2f+0x318> + 8009610: 2400 movs r4, #0 + 8009612: e0c6 b.n 80097a2 <__kernel_rem_pio2f+0x3ae> + 8009614: f04f 0802 mov.w r8, #2 + 8009618: e78a b.n 8009530 <__kernel_rem_pio2f+0x13c> + 800961a: ab06 add r3, sp, #24 + 800961c: f853 3020 ldr.w r3, [r3, r0, lsl #2] + 8009620: b949 cbnz r1, 8009636 <__kernel_rem_pio2f+0x242> + 8009622: b12b cbz r3, 8009630 <__kernel_rem_pio2f+0x23c> + 8009624: aa06 add r2, sp, #24 + 8009626: f5c3 7380 rsb r3, r3, #256 ; 0x100 + 800962a: f842 3020 str.w r3, [r2, r0, lsl #2] + 800962e: 2301 movs r3, #1 + 8009630: 3001 adds r0, #1 + 8009632: 4619 mov r1, r3 + 8009634: e781 b.n 800953a <__kernel_rem_pio2f+0x146> + 8009636: aa06 add r2, sp, #24 + 8009638: f1c3 03ff rsb r3, r3, #255 ; 0xff + 800963c: f842 3020 str.w r3, [r2, r0, lsl #2] + 8009640: 460b mov r3, r1 + 8009642: e7f5 b.n 8009630 <__kernel_rem_pio2f+0x23c> + 8009644: 1e68 subs r0, r5, #1 + 8009646: ab06 add r3, sp, #24 + 8009648: f853 3020 ldr.w r3, [r3, r0, lsl #2] + 800964c: f003 037f and.w r3, r3, #127 ; 0x7f + 8009650: aa06 add r2, sp, #24 + 8009652: f842 3020 str.w r3, [r2, r0, lsl #2] + 8009656: e779 b.n 800954c <__kernel_rem_pio2f+0x158> + 8009658: 1e68 subs r0, r5, #1 + 800965a: ab06 add r3, sp, #24 + 800965c: f853 3020 ldr.w r3, [r3, r0, lsl #2] + 8009660: f003 033f and.w r3, r3, #63 ; 0x3f + 8009664: e7f4 b.n 8009650 <__kernel_rem_pio2f+0x25c> + 8009666: a906 add r1, sp, #24 + 8009668: f851 1020 ldr.w r1, [r1, r0, lsl #2] + 800966c: 3801 subs r0, #1 + 800966e: 430a orrs r2, r1 + 8009670: e7a9 b.n 80095c6 <__kernel_rem_pio2f+0x1d2> + 8009672: f10c 0c01 add.w ip, ip, #1 + 8009676: f853 2d04 ldr.w r2, [r3, #-4]! + 800967a: 2a00 cmp r2, #0 + 800967c: d0f9 beq.n 8009672 <__kernel_rem_pio2f+0x27e> + 800967e: eb0b 0305 add.w r3, fp, r5 + 8009682: aa1a add r2, sp, #104 ; 0x68 + 8009684: 009b lsls r3, r3, #2 + 8009686: 1898 adds r0, r3, r2 + 8009688: 3004 adds r0, #4 + 800968a: 1c69 adds r1, r5, #1 + 800968c: 3704 adds r7, #4 + 800968e: 2200 movs r2, #0 + 8009690: 4465 add r5, ip + 8009692: 9005 str r0, [sp, #20] + 8009694: 428d cmp r5, r1 + 8009696: f6ff af0a blt.w 80094ae <__kernel_rem_pio2f+0xba> + 800969a: a81a add r0, sp, #104 ; 0x68 + 800969c: eb02 0c03 add.w ip, r2, r3 + 80096a0: 4484 add ip, r0 + 80096a2: 9803 ldr r0, [sp, #12] + 80096a4: f8dd e008 ldr.w lr, [sp, #8] + 80096a8: f850 0021 ldr.w r0, [r0, r1, lsl #2] + 80096ac: 9001 str r0, [sp, #4] + 80096ae: ee07 0a90 vmov s15, r0 + 80096b2: eef8 7ae7 vcvt.f32.s32 s15, s15 + 80096b6: 9805 ldr r0, [sp, #20] + 80096b8: edcc 7a00 vstr s15, [ip] + 80096bc: eddf 7a13 vldr s15, [pc, #76] ; 800970c <__kernel_rem_pio2f+0x318> + 80096c0: eb00 0802 add.w r8, r0, r2 + 80096c4: f04f 0c00 mov.w ip, #0 + 80096c8: 45d4 cmp ip, sl + 80096ca: dd0c ble.n 80096e6 <__kernel_rem_pio2f+0x2f2> + 80096cc: eb02 0c07 add.w ip, r2, r7 + 80096d0: a842 add r0, sp, #264 ; 0x108 + 80096d2: 4484 add ip, r0 + 80096d4: edcc 7a01 vstr s15, [ip, #4] + 80096d8: 3101 adds r1, #1 + 80096da: 3204 adds r2, #4 + 80096dc: e7da b.n 8009694 <__kernel_rem_pio2f+0x2a0> + 80096de: 9b04 ldr r3, [sp, #16] + 80096e0: f04f 0c01 mov.w ip, #1 + 80096e4: e7c7 b.n 8009676 <__kernel_rem_pio2f+0x282> + 80096e6: ecfe 6a01 vldmia lr!, {s13} + 80096ea: ed38 7a01 vldmdb r8!, {s14} + 80096ee: f10c 0c01 add.w ip, ip, #1 + 80096f2: eee6 7a87 vfma.f32 s15, s13, s14 + 80096f6: e7e7 b.n 80096c8 <__kernel_rem_pio2f+0x2d4> + 80096f8: 3b01 subs r3, #1 + 80096fa: e769 b.n 80095d0 <__kernel_rem_pio2f+0x1dc> + 80096fc: 0800aa64 .word 0x0800aa64 + 8009700: 0800aa38 .word 0x0800aa38 + 8009704: 43800000 .word 0x43800000 + 8009708: 3b800000 .word 0x3b800000 + 800970c: 00000000 .word 0x00000000 + 8009710: 4260 negs r0, r4 + 8009712: eeb0 0a48 vmov.f32 s0, s16 + 8009716: f000 fa83 bl 8009c20 + 800971a: ed1f 7a06 vldr s14, [pc, #-24] ; 8009704 <__kernel_rem_pio2f+0x310> + 800971e: eeb4 0ac7 vcmpe.f32 s0, s14 + 8009722: eef1 fa10 vmrs APSR_nzcv, fpscr + 8009726: db1a blt.n 800975e <__kernel_rem_pio2f+0x36a> + 8009728: ed5f 7a09 vldr s15, [pc, #-36] ; 8009708 <__kernel_rem_pio2f+0x314> + 800972c: ee60 7a27 vmul.f32 s15, s0, s15 + 8009730: aa06 add r2, sp, #24 + 8009732: eefd 7ae7 vcvt.s32.f32 s15, s15 + 8009736: a906 add r1, sp, #24 + 8009738: eef8 7ae7 vcvt.f32.s32 s15, s15 + 800973c: 3408 adds r4, #8 + 800973e: eea7 0ac7 vfms.f32 s0, s15, s14 + 8009742: eefd 7ae7 vcvt.s32.f32 s15, s15 + 8009746: eebd 0ac0 vcvt.s32.f32 s0, s0 + 800974a: ee10 3a10 vmov r3, s0 + 800974e: f842 3025 str.w r3, [r2, r5, lsl #2] + 8009752: 1c6b adds r3, r5, #1 + 8009754: ee17 2a90 vmov r2, s15 + 8009758: f841 2023 str.w r2, [r1, r3, lsl #2] + 800975c: e73f b.n 80095de <__kernel_rem_pio2f+0x1ea> + 800975e: eebd 0ac0 vcvt.s32.f32 s0, s0 + 8009762: aa06 add r2, sp, #24 + 8009764: ee10 3a10 vmov r3, s0 + 8009768: f842 3025 str.w r3, [r2, r5, lsl #2] + 800976c: 462b mov r3, r5 + 800976e: e736 b.n 80095de <__kernel_rem_pio2f+0x1ea> + 8009770: aa06 add r2, sp, #24 + 8009772: f852 2024 ldr.w r2, [r2, r4, lsl #2] + 8009776: 9202 str r2, [sp, #8] + 8009778: ee07 2a90 vmov s15, r2 + 800977c: eef8 7ae7 vcvt.f32.s32 s15, s15 + 8009780: 3c01 subs r4, #1 + 8009782: ee67 7a80 vmul.f32 s15, s15, s0 + 8009786: ee20 0a07 vmul.f32 s0, s0, s14 + 800978a: ed65 7a01 vstmdb r5!, {s15} + 800978e: e734 b.n 80095fa <__kernel_rem_pio2f+0x206> + 8009790: eb00 0c84 add.w ip, r0, r4, lsl #2 + 8009794: ecf7 6a01 vldmia r7!, {s13} + 8009798: ed9c 7a00 vldr s14, [ip] + 800979c: eee6 7a87 vfma.f32 s15, s13, s14 + 80097a0: 3401 adds r4, #1 + 80097a2: 454c cmp r4, r9 + 80097a4: dc01 bgt.n 80097aa <__kernel_rem_pio2f+0x3b6> + 80097a6: 42a5 cmp r5, r4 + 80097a8: daf2 bge.n 8009790 <__kernel_rem_pio2f+0x39c> + 80097aa: aa56 add r2, sp, #344 ; 0x158 + 80097ac: eb02 0485 add.w r4, r2, r5, lsl #2 + 80097b0: ed44 7a28 vstr s15, [r4, #-160] ; 0xffffff60 + 80097b4: 3501 adds r5, #1 + 80097b6: 3804 subs r0, #4 + 80097b8: e723 b.n 8009602 <__kernel_rem_pio2f+0x20e> + 80097ba: 9a64 ldr r2, [sp, #400] ; 0x190 + 80097bc: 2a03 cmp r2, #3 + 80097be: d84d bhi.n 800985c <__kernel_rem_pio2f+0x468> + 80097c0: e8df f002 tbb [pc, r2] + 80097c4: 021f1f3e .word 0x021f1f3e + 80097c8: aa56 add r2, sp, #344 ; 0x158 + 80097ca: 4411 add r1, r2 + 80097cc: 399c subs r1, #156 ; 0x9c + 80097ce: 4608 mov r0, r1 + 80097d0: 461c mov r4, r3 + 80097d2: 2c00 cmp r4, #0 + 80097d4: dc5f bgt.n 8009896 <__kernel_rem_pio2f+0x4a2> + 80097d6: 4608 mov r0, r1 + 80097d8: 461c mov r4, r3 + 80097da: 2c01 cmp r4, #1 + 80097dc: dc6b bgt.n 80098b6 <__kernel_rem_pio2f+0x4c2> + 80097de: ed5f 7a35 vldr s15, [pc, #-212] ; 800970c <__kernel_rem_pio2f+0x318> + 80097e2: 2b01 cmp r3, #1 + 80097e4: dc77 bgt.n 80098d6 <__kernel_rem_pio2f+0x4e2> + 80097e6: eddd 6a2e vldr s13, [sp, #184] ; 0xb8 + 80097ea: ed9d 7a2f vldr s14, [sp, #188] ; 0xbc + 80097ee: f1b8 0f00 cmp.w r8, #0 + 80097f2: d176 bne.n 80098e2 <__kernel_rem_pio2f+0x4ee> + 80097f4: edc6 6a00 vstr s13, [r6] + 80097f8: ed86 7a01 vstr s14, [r6, #4] + 80097fc: edc6 7a02 vstr s15, [r6, #8] + 8009800: e02c b.n 800985c <__kernel_rem_pio2f+0x468> + 8009802: aa56 add r2, sp, #344 ; 0x158 + 8009804: 4411 add r1, r2 + 8009806: ed1f 7a3f vldr s14, [pc, #-252] ; 800970c <__kernel_rem_pio2f+0x318> + 800980a: 399c subs r1, #156 ; 0x9c + 800980c: 4618 mov r0, r3 + 800980e: 2800 cmp r0, #0 + 8009810: da32 bge.n 8009878 <__kernel_rem_pio2f+0x484> + 8009812: f1b8 0f00 cmp.w r8, #0 + 8009816: d035 beq.n 8009884 <__kernel_rem_pio2f+0x490> + 8009818: eef1 7a47 vneg.f32 s15, s14 + 800981c: edc6 7a00 vstr s15, [r6] + 8009820: eddd 7a2e vldr s15, [sp, #184] ; 0xb8 + 8009824: ee77 7ac7 vsub.f32 s15, s15, s14 + 8009828: a82f add r0, sp, #188 ; 0xbc + 800982a: 2101 movs r1, #1 + 800982c: 428b cmp r3, r1 + 800982e: da2c bge.n 800988a <__kernel_rem_pio2f+0x496> + 8009830: f1b8 0f00 cmp.w r8, #0 + 8009834: d001 beq.n 800983a <__kernel_rem_pio2f+0x446> + 8009836: eef1 7a67 vneg.f32 s15, s15 + 800983a: edc6 7a01 vstr s15, [r6, #4] + 800983e: e00d b.n 800985c <__kernel_rem_pio2f+0x468> + 8009840: aa56 add r2, sp, #344 ; 0x158 + 8009842: 4411 add r1, r2 + 8009844: ed5f 7a4f vldr s15, [pc, #-316] ; 800970c <__kernel_rem_pio2f+0x318> + 8009848: 399c subs r1, #156 ; 0x9c + 800984a: 2b00 cmp r3, #0 + 800984c: da0e bge.n 800986c <__kernel_rem_pio2f+0x478> + 800984e: f1b8 0f00 cmp.w r8, #0 + 8009852: d001 beq.n 8009858 <__kernel_rem_pio2f+0x464> + 8009854: eef1 7a67 vneg.f32 s15, s15 + 8009858: edc6 7a00 vstr s15, [r6] + 800985c: 9b01 ldr r3, [sp, #4] + 800985e: f003 0007 and.w r0, r3, #7 + 8009862: b057 add sp, #348 ; 0x15c + 8009864: ecbd 8b04 vpop {d8-d9} + 8009868: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} + 800986c: ed31 7a01 vldmdb r1!, {s14} + 8009870: 3b01 subs r3, #1 + 8009872: ee77 7a87 vadd.f32 s15, s15, s14 + 8009876: e7e8 b.n 800984a <__kernel_rem_pio2f+0x456> + 8009878: ed71 7a01 vldmdb r1!, {s15} + 800987c: 3801 subs r0, #1 + 800987e: ee37 7a27 vadd.f32 s14, s14, s15 + 8009882: e7c4 b.n 800980e <__kernel_rem_pio2f+0x41a> + 8009884: eef0 7a47 vmov.f32 s15, s14 + 8009888: e7c8 b.n 800981c <__kernel_rem_pio2f+0x428> + 800988a: ecb0 7a01 vldmia r0!, {s14} + 800988e: 3101 adds r1, #1 + 8009890: ee77 7a87 vadd.f32 s15, s15, s14 + 8009894: e7ca b.n 800982c <__kernel_rem_pio2f+0x438> + 8009896: ed50 7a02 vldr s15, [r0, #-8] + 800989a: ed70 6a01 vldmdb r0!, {s13} + 800989e: ee37 7aa6 vadd.f32 s14, s15, s13 + 80098a2: 3c01 subs r4, #1 + 80098a4: ee77 7ac7 vsub.f32 s15, s15, s14 + 80098a8: ed00 7a01 vstr s14, [r0, #-4] + 80098ac: ee77 7aa6 vadd.f32 s15, s15, s13 + 80098b0: edc0 7a00 vstr s15, [r0] + 80098b4: e78d b.n 80097d2 <__kernel_rem_pio2f+0x3de> + 80098b6: ed50 7a02 vldr s15, [r0, #-8] + 80098ba: ed70 6a01 vldmdb r0!, {s13} + 80098be: ee37 7aa6 vadd.f32 s14, s15, s13 + 80098c2: 3c01 subs r4, #1 + 80098c4: ee77 7ac7 vsub.f32 s15, s15, s14 + 80098c8: ed00 7a01 vstr s14, [r0, #-4] + 80098cc: ee77 7aa6 vadd.f32 s15, s15, s13 + 80098d0: edc0 7a00 vstr s15, [r0] + 80098d4: e781 b.n 80097da <__kernel_rem_pio2f+0x3e6> + 80098d6: ed31 7a01 vldmdb r1!, {s14} + 80098da: 3b01 subs r3, #1 + 80098dc: ee77 7a87 vadd.f32 s15, s15, s14 + 80098e0: e77f b.n 80097e2 <__kernel_rem_pio2f+0x3ee> + 80098e2: eef1 6a66 vneg.f32 s13, s13 + 80098e6: eeb1 7a47 vneg.f32 s14, s14 + 80098ea: edc6 6a00 vstr s13, [r6] + 80098ee: ed86 7a01 vstr s14, [r6, #4] + 80098f2: eef1 7a67 vneg.f32 s15, s15 + 80098f6: e781 b.n 80097fc <__kernel_rem_pio2f+0x408> + +080098f8 <__kernel_sinf>: + 80098f8: ee10 3a10 vmov r3, s0 + 80098fc: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000 + 8009900: f1b3 5f48 cmp.w r3, #838860800 ; 0x32000000 + 8009904: da04 bge.n 8009910 <__kernel_sinf+0x18> + 8009906: eefd 7ac0 vcvt.s32.f32 s15, s0 + 800990a: ee17 3a90 vmov r3, s15 + 800990e: b35b cbz r3, 8009968 <__kernel_sinf+0x70> + 8009910: ee20 7a00 vmul.f32 s14, s0, s0 + 8009914: eddf 7a15 vldr s15, [pc, #84] ; 800996c <__kernel_sinf+0x74> + 8009918: ed9f 6a15 vldr s12, [pc, #84] ; 8009970 <__kernel_sinf+0x78> + 800991c: eea7 6a27 vfma.f32 s12, s14, s15 + 8009920: eddf 7a14 vldr s15, [pc, #80] ; 8009974 <__kernel_sinf+0x7c> + 8009924: eee6 7a07 vfma.f32 s15, s12, s14 + 8009928: ed9f 6a13 vldr s12, [pc, #76] ; 8009978 <__kernel_sinf+0x80> + 800992c: eea7 6a87 vfma.f32 s12, s15, s14 + 8009930: eddf 7a12 vldr s15, [pc, #72] ; 800997c <__kernel_sinf+0x84> + 8009934: ee60 6a07 vmul.f32 s13, s0, s14 + 8009938: eee6 7a07 vfma.f32 s15, s12, s14 + 800993c: b930 cbnz r0, 800994c <__kernel_sinf+0x54> + 800993e: ed9f 6a10 vldr s12, [pc, #64] ; 8009980 <__kernel_sinf+0x88> + 8009942: eea7 6a27 vfma.f32 s12, s14, s15 + 8009946: eea6 0a26 vfma.f32 s0, s12, s13 + 800994a: 4770 bx lr + 800994c: ee67 7ae6 vnmul.f32 s15, s15, s13 + 8009950: eeb6 6a00 vmov.f32 s12, #96 ; 0x3f000000 0.5 + 8009954: eee0 7a86 vfma.f32 s15, s1, s12 + 8009958: eed7 0a87 vfnms.f32 s1, s15, s14 + 800995c: eddf 7a09 vldr s15, [pc, #36] ; 8009984 <__kernel_sinf+0x8c> + 8009960: eee6 0aa7 vfma.f32 s1, s13, s15 + 8009964: ee30 0a60 vsub.f32 s0, s0, s1 + 8009968: 4770 bx lr + 800996a: bf00 nop + 800996c: 2f2ec9d3 .word 0x2f2ec9d3 + 8009970: b2d72f34 .word 0xb2d72f34 + 8009974: 3638ef1b .word 0x3638ef1b + 8009978: b9500d01 .word 0xb9500d01 + 800997c: 3c088889 .word 0x3c088889 + 8009980: be2aaaab .word 0xbe2aaaab + 8009984: 3e2aaaab .word 0x3e2aaaab + +08009988 : + 8009988: ec51 0b10 vmov r0, r1, d0 + 800998c: ee10 2a10 vmov r2, s0 + 8009990: f021 4300 bic.w r3, r1, #2147483648 ; 0x80000000 + 8009994: ec43 2b10 vmov d0, r2, r3 + 8009998: 4770 bx lr + 800999a: 0000 movs r0, r0 + 800999c: 0000 movs r0, r0 + ... + +080099a0 : + 80099a0: ee10 1a90 vmov r1, s1 + 80099a4: f3c1 520a ubfx r2, r1, #20, #11 + 80099a8: f2a2 33ff subw r3, r2, #1023 ; 0x3ff + 80099ac: 2b13 cmp r3, #19 + 80099ae: b530 push {r4, r5, lr} + 80099b0: ee10 0a10 vmov r0, s0 + 80099b4: ee10 5a10 vmov r5, s0 + 80099b8: dc33 bgt.n 8009a22 + 80099ba: 2b00 cmp r3, #0 + 80099bc: da17 bge.n 80099ee + 80099be: ed9f 7b30 vldr d7, [pc, #192] ; 8009a80 + 80099c2: ee30 0b07 vadd.f64 d0, d0, d7 + 80099c6: eeb5 0bc0 vcmpe.f64 d0, #0.0 + 80099ca: eef1 fa10 vmrs APSR_nzcv, fpscr + 80099ce: dd09 ble.n 80099e4 + 80099d0: 2900 cmp r1, #0 + 80099d2: da50 bge.n 8009a76 + 80099d4: f021 4300 bic.w r3, r1, #2147483648 ; 0x80000000 + 80099d8: 4a2b ldr r2, [pc, #172] ; (8009a88 ) + 80099da: 4303 orrs r3, r0 + 80099dc: 2000 movs r0, #0 + 80099de: 4283 cmp r3, r0 + 80099e0: bf18 it ne + 80099e2: 4611 movne r1, r2 + 80099e4: 460b mov r3, r1 + 80099e6: 4602 mov r2, r0 + 80099e8: ec43 2b10 vmov d0, r2, r3 + 80099ec: e020 b.n 8009a30 + 80099ee: 4a27 ldr r2, [pc, #156] ; (8009a8c ) + 80099f0: 411a asrs r2, r3 + 80099f2: ea01 0402 and.w r4, r1, r2 + 80099f6: 4304 orrs r4, r0 + 80099f8: d01a beq.n 8009a30 + 80099fa: ed9f 7b21 vldr d7, [pc, #132] ; 8009a80 + 80099fe: ee30 0b07 vadd.f64 d0, d0, d7 + 8009a02: eeb5 0bc0 vcmpe.f64 d0, #0.0 + 8009a06: eef1 fa10 vmrs APSR_nzcv, fpscr + 8009a0a: ddeb ble.n 80099e4 + 8009a0c: 2900 cmp r1, #0 + 8009a0e: bfbe ittt lt + 8009a10: f44f 1080 movlt.w r0, #1048576 ; 0x100000 + 8009a14: fa40 f303 asrlt.w r3, r0, r3 + 8009a18: 18c9 addlt r1, r1, r3 + 8009a1a: ea21 0102 bic.w r1, r1, r2 + 8009a1e: 2000 movs r0, #0 + 8009a20: e7e0 b.n 80099e4 + 8009a22: 2b33 cmp r3, #51 ; 0x33 + 8009a24: dd05 ble.n 8009a32 + 8009a26: f5b3 6f80 cmp.w r3, #1024 ; 0x400 + 8009a2a: d101 bne.n 8009a30 + 8009a2c: ee30 0b00 vadd.f64 d0, d0, d0 + 8009a30: bd30 pop {r4, r5, pc} + 8009a32: f2a2 4413 subw r4, r2, #1043 ; 0x413 + 8009a36: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff + 8009a3a: 40e2 lsrs r2, r4 + 8009a3c: 4202 tst r2, r0 + 8009a3e: d0f7 beq.n 8009a30 + 8009a40: ed9f 7b0f vldr d7, [pc, #60] ; 8009a80 + 8009a44: ee30 0b07 vadd.f64 d0, d0, d7 + 8009a48: eeb5 0bc0 vcmpe.f64 d0, #0.0 + 8009a4c: eef1 fa10 vmrs APSR_nzcv, fpscr + 8009a50: ddc8 ble.n 80099e4 + 8009a52: 2900 cmp r1, #0 + 8009a54: da02 bge.n 8009a5c + 8009a56: 2b14 cmp r3, #20 + 8009a58: d103 bne.n 8009a62 + 8009a5a: 3101 adds r1, #1 + 8009a5c: ea20 0002 bic.w r0, r0, r2 + 8009a60: e7c0 b.n 80099e4 + 8009a62: 2401 movs r4, #1 + 8009a64: f1c3 0334 rsb r3, r3, #52 ; 0x34 + 8009a68: fa04 f303 lsl.w r3, r4, r3 + 8009a6c: 4418 add r0, r3 + 8009a6e: 42a8 cmp r0, r5 + 8009a70: bf38 it cc + 8009a72: 1909 addcc r1, r1, r4 + 8009a74: e7f2 b.n 8009a5c + 8009a76: 2000 movs r0, #0 + 8009a78: 4601 mov r1, r0 + 8009a7a: e7b3 b.n 80099e4 + 8009a7c: f3af 8000 nop.w + 8009a80: 8800759c .word 0x8800759c + 8009a84: 7e37e43c .word 0x7e37e43c + 8009a88: bff00000 .word 0xbff00000 + 8009a8c: 000fffff .word 0x000fffff + +08009a90 : + 8009a90: b500 push {lr} + 8009a92: ed2d 8b02 vpush {d8} + 8009a96: b083 sub sp, #12 + 8009a98: ed8d 0b00 vstr d0, [sp] + 8009a9c: 9b01 ldr r3, [sp, #4] + 8009a9e: f3c3 520a ubfx r2, r3, #20, #11 + 8009aa2: b9a2 cbnz r2, 8009ace + 8009aa4: 9a00 ldr r2, [sp, #0] + 8009aa6: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000 + 8009aaa: 4313 orrs r3, r2 + 8009aac: d03a beq.n 8009b24 + 8009aae: ed9f 7b2e vldr d7, [pc, #184] ; 8009b68 + 8009ab2: 4b35 ldr r3, [pc, #212] ; (8009b88 ) + 8009ab4: ee20 7b07 vmul.f64 d7, d0, d7 + 8009ab8: 4298 cmp r0, r3 + 8009aba: ed8d 7b00 vstr d7, [sp] + 8009abe: da11 bge.n 8009ae4 + 8009ac0: ed9f 7b2b vldr d7, [pc, #172] ; 8009b70 + 8009ac4: ed9d 6b00 vldr d6, [sp] + 8009ac8: ee27 7b06 vmul.f64 d7, d7, d6 + 8009acc: e007 b.n 8009ade + 8009ace: f240 71ff movw r1, #2047 ; 0x7ff + 8009ad2: 428a cmp r2, r1 + 8009ad4: d10a bne.n 8009aec + 8009ad6: ed9d 7b00 vldr d7, [sp] + 8009ada: ee37 7b07 vadd.f64 d7, d7, d7 + 8009ade: ed8d 7b00 vstr d7, [sp] + 8009ae2: e01f b.n 8009b24 + 8009ae4: 9b01 ldr r3, [sp, #4] + 8009ae6: f3c3 520a ubfx r2, r3, #20, #11 + 8009aea: 3a36 subs r2, #54 ; 0x36 + 8009aec: 4402 add r2, r0 + 8009aee: f240 71fe movw r1, #2046 ; 0x7fe + 8009af2: 428a cmp r2, r1 + 8009af4: dd0a ble.n 8009b0c + 8009af6: ed9f 8b20 vldr d8, [pc, #128] ; 8009b78 + 8009afa: eeb0 0b48 vmov.f64 d0, d8 + 8009afe: ed9d 1b00 vldr d1, [sp] + 8009b02: f000 f8ed bl 8009ce0 + 8009b06: ee20 7b08 vmul.f64 d7, d0, d8 + 8009b0a: e7e8 b.n 8009ade + 8009b0c: 2a00 cmp r2, #0 + 8009b0e: dd10 ble.n 8009b32 + 8009b10: e9dd 0100 ldrd r0, r1, [sp] + 8009b14: f023 43ff bic.w r3, r3, #2139095040 ; 0x7f800000 + 8009b18: f423 03e0 bic.w r3, r3, #7340032 ; 0x700000 + 8009b1c: ea43 5102 orr.w r1, r3, r2, lsl #20 + 8009b20: e9cd 0100 strd r0, r1, [sp] + 8009b24: ed9d 0b00 vldr d0, [sp] + 8009b28: b003 add sp, #12 + 8009b2a: ecbd 8b02 vpop {d8} + 8009b2e: f85d fb04 ldr.w pc, [sp], #4 + 8009b32: f112 0f35 cmn.w r2, #53 ; 0x35 + 8009b36: da06 bge.n 8009b46 + 8009b38: f24c 3350 movw r3, #50000 ; 0xc350 + 8009b3c: 4298 cmp r0, r3 + 8009b3e: dcda bgt.n 8009af6 + 8009b40: ed9f 8b0b vldr d8, [pc, #44] ; 8009b70 + 8009b44: e7d9 b.n 8009afa + 8009b46: e9dd 0100 ldrd r0, r1, [sp] + 8009b4a: f023 43ff bic.w r3, r3, #2139095040 ; 0x7f800000 + 8009b4e: 3236 adds r2, #54 ; 0x36 + 8009b50: f423 03e0 bic.w r3, r3, #7340032 ; 0x700000 + 8009b54: ea43 5102 orr.w r1, r3, r2, lsl #20 + 8009b58: ec41 0b17 vmov d7, r0, r1 + 8009b5c: ed9f 6b08 vldr d6, [pc, #32] ; 8009b80 + 8009b60: e7b2 b.n 8009ac8 + 8009b62: bf00 nop + 8009b64: f3af 8000 nop.w + 8009b68: 00000000 .word 0x00000000 + 8009b6c: 43500000 .word 0x43500000 + 8009b70: c2f8f359 .word 0xc2f8f359 + 8009b74: 01a56e1f .word 0x01a56e1f + 8009b78: 8800759c .word 0x8800759c + 8009b7c: 7e37e43c .word 0x7e37e43c + 8009b80: 00000000 .word 0x00000000 + 8009b84: 3c900000 .word 0x3c900000 + 8009b88: ffff3cb0 .word 0xffff3cb0 + +08009b8c : + 8009b8c: ee10 3a10 vmov r3, s0 + 8009b90: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000 + 8009b94: ee00 3a10 vmov s0, r3 + 8009b98: 4770 bx lr + ... + +08009b9c : + 8009b9c: ee10 3a10 vmov r3, s0 + 8009ba0: f023 4100 bic.w r1, r3, #2147483648 ; 0x80000000 + 8009ba4: 0dca lsrs r2, r1, #23 + 8009ba6: 3a7f subs r2, #127 ; 0x7f + 8009ba8: 2a16 cmp r2, #22 + 8009baa: dc2a bgt.n 8009c02 + 8009bac: 2a00 cmp r2, #0 + 8009bae: da11 bge.n 8009bd4 + 8009bb0: eddf 7a18 vldr s15, [pc, #96] ; 8009c14 + 8009bb4: ee30 0a27 vadd.f32 s0, s0, s15 + 8009bb8: eeb5 0ac0 vcmpe.f32 s0, #0.0 + 8009bbc: eef1 fa10 vmrs APSR_nzcv, fpscr + 8009bc0: dd05 ble.n 8009bce + 8009bc2: 2b00 cmp r3, #0 + 8009bc4: da23 bge.n 8009c0e + 8009bc6: 4a14 ldr r2, [pc, #80] ; (8009c18 ) + 8009bc8: 2900 cmp r1, #0 + 8009bca: bf18 it ne + 8009bcc: 4613 movne r3, r2 + 8009bce: ee00 3a10 vmov s0, r3 + 8009bd2: 4770 bx lr + 8009bd4: 4911 ldr r1, [pc, #68] ; (8009c1c ) + 8009bd6: 4111 asrs r1, r2 + 8009bd8: 420b tst r3, r1 + 8009bda: d0fa beq.n 8009bd2 + 8009bdc: eddf 7a0d vldr s15, [pc, #52] ; 8009c14 + 8009be0: ee30 0a27 vadd.f32 s0, s0, s15 + 8009be4: eeb5 0ac0 vcmpe.f32 s0, #0.0 + 8009be8: eef1 fa10 vmrs APSR_nzcv, fpscr + 8009bec: ddef ble.n 8009bce + 8009bee: 2b00 cmp r3, #0 + 8009bf0: bfbe ittt lt + 8009bf2: f44f 0000 movlt.w r0, #8388608 ; 0x800000 + 8009bf6: fa40 f202 asrlt.w r2, r0, r2 + 8009bfa: 189b addlt r3, r3, r2 + 8009bfc: ea23 0301 bic.w r3, r3, r1 + 8009c00: e7e5 b.n 8009bce + 8009c02: f1b1 4fff cmp.w r1, #2139095040 ; 0x7f800000 + 8009c06: d3e4 bcc.n 8009bd2 + 8009c08: ee30 0a00 vadd.f32 s0, s0, s0 + 8009c0c: 4770 bx lr + 8009c0e: 2300 movs r3, #0 + 8009c10: e7dd b.n 8009bce + 8009c12: bf00 nop + 8009c14: 7149f2ca .word 0x7149f2ca + 8009c18: bf800000 .word 0xbf800000 + 8009c1c: 007fffff .word 0x007fffff + +08009c20 : + 8009c20: b508 push {r3, lr} + 8009c22: ee10 2a10 vmov r2, s0 + 8009c26: f032 4300 bics.w r3, r2, #2147483648 ; 0x80000000 + 8009c2a: ed2d 8b02 vpush {d8} + 8009c2e: eef0 0a40 vmov.f32 s1, s0 + 8009c32: d004 beq.n 8009c3e + 8009c34: f1b3 4fff cmp.w r3, #2139095040 ; 0x7f800000 + 8009c38: d306 bcc.n 8009c48 + 8009c3a: ee70 0a00 vadd.f32 s1, s0, s0 + 8009c3e: ecbd 8b02 vpop {d8} + 8009c42: eeb0 0a60 vmov.f32 s0, s1 + 8009c46: bd08 pop {r3, pc} + 8009c48: f5b3 0f00 cmp.w r3, #8388608 ; 0x800000 + 8009c4c: d21c bcs.n 8009c88 + 8009c4e: 4b1f ldr r3, [pc, #124] ; (8009ccc ) + 8009c50: eddf 7a1f vldr s15, [pc, #124] ; 8009cd0 + 8009c54: 4298 cmp r0, r3 + 8009c56: ee60 0a27 vmul.f32 s1, s0, s15 + 8009c5a: db10 blt.n 8009c7e + 8009c5c: ee10 2a90 vmov r2, s1 + 8009c60: f3c2 53c7 ubfx r3, r2, #23, #8 + 8009c64: 3b19 subs r3, #25 + 8009c66: 4403 add r3, r0 + 8009c68: 2bfe cmp r3, #254 ; 0xfe + 8009c6a: dd0f ble.n 8009c8c + 8009c6c: ed9f 8a19 vldr s16, [pc, #100] ; 8009cd4 + 8009c70: eeb0 0a48 vmov.f32 s0, s16 + 8009c74: f000 f843 bl 8009cfe + 8009c78: ee60 0a08 vmul.f32 s1, s0, s16 + 8009c7c: e7df b.n 8009c3e + 8009c7e: eddf 7a16 vldr s15, [pc, #88] ; 8009cd8 + 8009c82: ee60 0aa7 vmul.f32 s1, s1, s15 + 8009c86: e7da b.n 8009c3e + 8009c88: 0ddb lsrs r3, r3, #23 + 8009c8a: e7ec b.n 8009c66 + 8009c8c: 2b00 cmp r3, #0 + 8009c8e: dd06 ble.n 8009c9e + 8009c90: f022 42ff bic.w r2, r2, #2139095040 ; 0x7f800000 + 8009c94: ea42 53c3 orr.w r3, r2, r3, lsl #23 + 8009c98: ee00 3a90 vmov s1, r3 + 8009c9c: e7cf b.n 8009c3e + 8009c9e: f113 0f16 cmn.w r3, #22 + 8009ca2: da06 bge.n 8009cb2 + 8009ca4: f24c 3350 movw r3, #50000 ; 0xc350 + 8009ca8: 4298 cmp r0, r3 + 8009caa: dcdf bgt.n 8009c6c + 8009cac: ed9f 8a0a vldr s16, [pc, #40] ; 8009cd8 + 8009cb0: e7de b.n 8009c70 + 8009cb2: 3319 adds r3, #25 + 8009cb4: f022 42ff bic.w r2, r2, #2139095040 ; 0x7f800000 + 8009cb8: ea42 53c3 orr.w r3, r2, r3, lsl #23 + 8009cbc: eddf 7a07 vldr s15, [pc, #28] ; 8009cdc + 8009cc0: ee07 3a10 vmov s14, r3 + 8009cc4: ee67 0a27 vmul.f32 s1, s14, s15 + 8009cc8: e7b9 b.n 8009c3e + 8009cca: bf00 nop + 8009ccc: ffff3cb0 .word 0xffff3cb0 + 8009cd0: 4c000000 .word 0x4c000000 + 8009cd4: 7149f2ca .word 0x7149f2ca + 8009cd8: 0da24260 .word 0x0da24260 + 8009cdc: 33000000 .word 0x33000000 + +08009ce0 : + 8009ce0: ec51 0b10 vmov r0, r1, d0 + 8009ce4: ee11 0a90 vmov r0, s3 + 8009ce8: ee10 2a10 vmov r2, s0 + 8009cec: f021 4100 bic.w r1, r1, #2147483648 ; 0x80000000 + 8009cf0: f000 4000 and.w r0, r0, #2147483648 ; 0x80000000 + 8009cf4: ea41 0300 orr.w r3, r1, r0 + 8009cf8: ec43 2b10 vmov d0, r2, r3 + 8009cfc: 4770 bx lr + +08009cfe : + 8009cfe: ee10 3a10 vmov r3, s0 + 8009d02: ee10 2a90 vmov r2, s1 + 8009d06: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000 + 8009d0a: f002 4200 and.w r2, r2, #2147483648 ; 0x80000000 + 8009d0e: 4313 orrs r3, r2 + 8009d10: ee00 3a10 vmov s0, r3 + 8009d14: 4770 bx lr + ... + +08009d18 <__errno>: + 8009d18: 4b01 ldr r3, [pc, #4] ; (8009d20 <__errno+0x8>) + 8009d1a: 6818 ldr r0, [r3, #0] + 8009d1c: 4770 bx lr + 8009d1e: bf00 nop + 8009d20: 2000001c .word 0x2000001c + +08009d24 <__libc_init_array>: + 8009d24: b570 push {r4, r5, r6, lr} + 8009d26: 4e0d ldr r6, [pc, #52] ; (8009d5c <__libc_init_array+0x38>) + 8009d28: 4c0d ldr r4, [pc, #52] ; (8009d60 <__libc_init_array+0x3c>) + 8009d2a: 1ba4 subs r4, r4, r6 + 8009d2c: 10a4 asrs r4, r4, #2 + 8009d2e: 2500 movs r5, #0 + 8009d30: 42a5 cmp r5, r4 + 8009d32: d109 bne.n 8009d48 <__libc_init_array+0x24> + 8009d34: 4e0b ldr r6, [pc, #44] ; (8009d64 <__libc_init_array+0x40>) + 8009d36: 4c0c ldr r4, [pc, #48] ; (8009d68 <__libc_init_array+0x44>) + 8009d38: f000 f934 bl 8009fa4 <_init> + 8009d3c: 1ba4 subs r4, r4, r6 + 8009d3e: 10a4 asrs r4, r4, #2 + 8009d40: 2500 movs r5, #0 + 8009d42: 42a5 cmp r5, r4 + 8009d44: d105 bne.n 8009d52 <__libc_init_array+0x2e> + 8009d46: bd70 pop {r4, r5, r6, pc} + 8009d48: f856 3025 ldr.w r3, [r6, r5, lsl #2] + 8009d4c: 4798 blx r3 + 8009d4e: 3501 adds r5, #1 + 8009d50: e7ee b.n 8009d30 <__libc_init_array+0xc> + 8009d52: f856 3025 ldr.w r3, [r6, r5, lsl #2] + 8009d56: 4798 blx r3 + 8009d58: 3501 adds r5, #1 + 8009d5a: e7f2 b.n 8009d42 <__libc_init_array+0x1e> + 8009d5c: 0800aa78 .word 0x0800aa78 + 8009d60: 0800aa78 .word 0x0800aa78 + 8009d64: 0800aa78 .word 0x0800aa78 + 8009d68: 0800aa80 .word 0x0800aa80 + +08009d6c : + 8009d6c: b510 push {r4, lr} + 8009d6e: 1e43 subs r3, r0, #1 + 8009d70: 440a add r2, r1 + 8009d72: 4291 cmp r1, r2 + 8009d74: d100 bne.n 8009d78 + 8009d76: bd10 pop {r4, pc} + 8009d78: f811 4b01 ldrb.w r4, [r1], #1 + 8009d7c: f803 4f01 strb.w r4, [r3, #1]! + 8009d80: e7f7 b.n 8009d72 + +08009d82 : + 8009d82: 4288 cmp r0, r1 + 8009d84: b510 push {r4, lr} + 8009d86: eb01 0302 add.w r3, r1, r2 + 8009d8a: d807 bhi.n 8009d9c + 8009d8c: 1e42 subs r2, r0, #1 + 8009d8e: 4299 cmp r1, r3 + 8009d90: d00a beq.n 8009da8 + 8009d92: f811 4b01 ldrb.w r4, [r1], #1 + 8009d96: f802 4f01 strb.w r4, [r2, #1]! + 8009d9a: e7f8 b.n 8009d8e + 8009d9c: 4283 cmp r3, r0 + 8009d9e: d9f5 bls.n 8009d8c + 8009da0: 1881 adds r1, r0, r2 + 8009da2: 1ad2 subs r2, r2, r3 + 8009da4: 42d3 cmn r3, r2 + 8009da6: d100 bne.n 8009daa + 8009da8: bd10 pop {r4, pc} + 8009daa: f813 4d01 ldrb.w r4, [r3, #-1]! + 8009dae: f801 4d01 strb.w r4, [r1, #-1]! + 8009db2: e7f7 b.n 8009da4 + +08009db4 : + 8009db4: 4402 add r2, r0 + 8009db6: 4603 mov r3, r0 + 8009db8: 4293 cmp r3, r2 + 8009dba: d100 bne.n 8009dbe + 8009dbc: 4770 bx lr + 8009dbe: f803 1b01 strb.w r1, [r3], #1 + 8009dc2: e7f9 b.n 8009db8 + +08009dc4 : + 8009dc4: 4b02 ldr r3, [pc, #8] ; (8009dd0 ) + 8009dc6: 460a mov r2, r1 + 8009dc8: 4601 mov r1, r0 + 8009dca: 6818 ldr r0, [r3, #0] + 8009dcc: f000 b802 b.w 8009dd4 <_realloc_r> + 8009dd0: 2000001c .word 0x2000001c + +08009dd4 <_realloc_r>: + 8009dd4: b5f8 push {r3, r4, r5, r6, r7, lr} + 8009dd6: 4607 mov r7, r0 + 8009dd8: 4614 mov r4, r2 + 8009dda: 460e mov r6, r1 + 8009ddc: b921 cbnz r1, 8009de8 <_realloc_r+0x14> + 8009dde: 4611 mov r1, r2 + 8009de0: e8bd 40f8 ldmia.w sp!, {r3, r4, r5, r6, r7, lr} + 8009de4: f000 b86a b.w 8009ebc <_malloc_r> + 8009de8: b922 cbnz r2, 8009df4 <_realloc_r+0x20> + 8009dea: f000 f819 bl 8009e20 <_free_r> + 8009dee: 4625 mov r5, r4 + 8009df0: 4628 mov r0, r5 + 8009df2: bdf8 pop {r3, r4, r5, r6, r7, pc} + 8009df4: f000 f8bc bl 8009f70 <_malloc_usable_size_r> + 8009df8: 42a0 cmp r0, r4 + 8009dfa: d20f bcs.n 8009e1c <_realloc_r+0x48> + 8009dfc: 4621 mov r1, r4 + 8009dfe: 4638 mov r0, r7 + 8009e00: f000 f85c bl 8009ebc <_malloc_r> + 8009e04: 4605 mov r5, r0 + 8009e06: 2800 cmp r0, #0 + 8009e08: d0f2 beq.n 8009df0 <_realloc_r+0x1c> + 8009e0a: 4631 mov r1, r6 + 8009e0c: 4622 mov r2, r4 + 8009e0e: f7ff ffad bl 8009d6c + 8009e12: 4631 mov r1, r6 + 8009e14: 4638 mov r0, r7 + 8009e16: f000 f803 bl 8009e20 <_free_r> + 8009e1a: e7e9 b.n 8009df0 <_realloc_r+0x1c> + 8009e1c: 4635 mov r5, r6 + 8009e1e: e7e7 b.n 8009df0 <_realloc_r+0x1c> + +08009e20 <_free_r>: + 8009e20: b538 push {r3, r4, r5, lr} + 8009e22: 4605 mov r5, r0 + 8009e24: 2900 cmp r1, #0 + 8009e26: d045 beq.n 8009eb4 <_free_r+0x94> + 8009e28: f851 3c04 ldr.w r3, [r1, #-4] + 8009e2c: 1f0c subs r4, r1, #4 + 8009e2e: 2b00 cmp r3, #0 + 8009e30: bfb8 it lt + 8009e32: 18e4 addlt r4, r4, r3 + 8009e34: f000 f8b4 bl 8009fa0 <__malloc_lock> + 8009e38: 4a1f ldr r2, [pc, #124] ; (8009eb8 <_free_r+0x98>) + 8009e3a: 6813 ldr r3, [r2, #0] + 8009e3c: 4610 mov r0, r2 + 8009e3e: b933 cbnz r3, 8009e4e <_free_r+0x2e> + 8009e40: 6063 str r3, [r4, #4] + 8009e42: 6014 str r4, [r2, #0] + 8009e44: 4628 mov r0, r5 + 8009e46: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} + 8009e4a: f000 b8aa b.w 8009fa2 <__malloc_unlock> + 8009e4e: 42a3 cmp r3, r4 + 8009e50: d90c bls.n 8009e6c <_free_r+0x4c> + 8009e52: 6821 ldr r1, [r4, #0] + 8009e54: 1862 adds r2, r4, r1 + 8009e56: 4293 cmp r3, r2 + 8009e58: bf04 itt eq + 8009e5a: 681a ldreq r2, [r3, #0] + 8009e5c: 685b ldreq r3, [r3, #4] + 8009e5e: 6063 str r3, [r4, #4] + 8009e60: bf04 itt eq + 8009e62: 1852 addeq r2, r2, r1 + 8009e64: 6022 streq r2, [r4, #0] + 8009e66: 6004 str r4, [r0, #0] + 8009e68: e7ec b.n 8009e44 <_free_r+0x24> + 8009e6a: 4613 mov r3, r2 + 8009e6c: 685a ldr r2, [r3, #4] + 8009e6e: b10a cbz r2, 8009e74 <_free_r+0x54> + 8009e70: 42a2 cmp r2, r4 + 8009e72: d9fa bls.n 8009e6a <_free_r+0x4a> + 8009e74: 6819 ldr r1, [r3, #0] + 8009e76: 1858 adds r0, r3, r1 + 8009e78: 42a0 cmp r0, r4 + 8009e7a: d10b bne.n 8009e94 <_free_r+0x74> + 8009e7c: 6820 ldr r0, [r4, #0] + 8009e7e: 4401 add r1, r0 + 8009e80: 1858 adds r0, r3, r1 + 8009e82: 4282 cmp r2, r0 + 8009e84: 6019 str r1, [r3, #0] + 8009e86: d1dd bne.n 8009e44 <_free_r+0x24> + 8009e88: 6810 ldr r0, [r2, #0] + 8009e8a: 6852 ldr r2, [r2, #4] + 8009e8c: 605a str r2, [r3, #4] + 8009e8e: 4401 add r1, r0 + 8009e90: 6019 str r1, [r3, #0] + 8009e92: e7d7 b.n 8009e44 <_free_r+0x24> + 8009e94: d902 bls.n 8009e9c <_free_r+0x7c> + 8009e96: 230c movs r3, #12 + 8009e98: 602b str r3, [r5, #0] + 8009e9a: e7d3 b.n 8009e44 <_free_r+0x24> + 8009e9c: 6820 ldr r0, [r4, #0] + 8009e9e: 1821 adds r1, r4, r0 + 8009ea0: 428a cmp r2, r1 + 8009ea2: bf04 itt eq + 8009ea4: 6811 ldreq r1, [r2, #0] + 8009ea6: 6852 ldreq r2, [r2, #4] + 8009ea8: 6062 str r2, [r4, #4] + 8009eaa: bf04 itt eq + 8009eac: 1809 addeq r1, r1, r0 + 8009eae: 6021 streq r1, [r4, #0] + 8009eb0: 605c str r4, [r3, #4] + 8009eb2: e7c7 b.n 8009e44 <_free_r+0x24> + 8009eb4: bd38 pop {r3, r4, r5, pc} + 8009eb6: bf00 nop + 8009eb8: 20000eb0 .word 0x20000eb0 + +08009ebc <_malloc_r>: + 8009ebc: b570 push {r4, r5, r6, lr} + 8009ebe: 1ccd adds r5, r1, #3 + 8009ec0: f025 0503 bic.w r5, r5, #3 + 8009ec4: 3508 adds r5, #8 + 8009ec6: 2d0c cmp r5, #12 + 8009ec8: bf38 it cc + 8009eca: 250c movcc r5, #12 + 8009ecc: 2d00 cmp r5, #0 + 8009ece: 4606 mov r6, r0 + 8009ed0: db01 blt.n 8009ed6 <_malloc_r+0x1a> + 8009ed2: 42a9 cmp r1, r5 + 8009ed4: d903 bls.n 8009ede <_malloc_r+0x22> + 8009ed6: 230c movs r3, #12 + 8009ed8: 6033 str r3, [r6, #0] + 8009eda: 2000 movs r0, #0 + 8009edc: bd70 pop {r4, r5, r6, pc} + 8009ede: f000 f85f bl 8009fa0 <__malloc_lock> + 8009ee2: 4a21 ldr r2, [pc, #132] ; (8009f68 <_malloc_r+0xac>) + 8009ee4: 6814 ldr r4, [r2, #0] + 8009ee6: 4621 mov r1, r4 + 8009ee8: b991 cbnz r1, 8009f10 <_malloc_r+0x54> + 8009eea: 4c20 ldr r4, [pc, #128] ; (8009f6c <_malloc_r+0xb0>) + 8009eec: 6823 ldr r3, [r4, #0] + 8009eee: b91b cbnz r3, 8009ef8 <_malloc_r+0x3c> + 8009ef0: 4630 mov r0, r6 + 8009ef2: f000 f845 bl 8009f80 <_sbrk_r> + 8009ef6: 6020 str r0, [r4, #0] + 8009ef8: 4629 mov r1, r5 + 8009efa: 4630 mov r0, r6 + 8009efc: f000 f840 bl 8009f80 <_sbrk_r> + 8009f00: 1c43 adds r3, r0, #1 + 8009f02: d124 bne.n 8009f4e <_malloc_r+0x92> + 8009f04: 230c movs r3, #12 + 8009f06: 6033 str r3, [r6, #0] + 8009f08: 4630 mov r0, r6 + 8009f0a: f000 f84a bl 8009fa2 <__malloc_unlock> + 8009f0e: e7e4 b.n 8009eda <_malloc_r+0x1e> + 8009f10: 680b ldr r3, [r1, #0] + 8009f12: 1b5b subs r3, r3, r5 + 8009f14: d418 bmi.n 8009f48 <_malloc_r+0x8c> + 8009f16: 2b0b cmp r3, #11 + 8009f18: d90f bls.n 8009f3a <_malloc_r+0x7e> + 8009f1a: 600b str r3, [r1, #0] + 8009f1c: 50cd str r5, [r1, r3] + 8009f1e: 18cc adds r4, r1, r3 + 8009f20: 4630 mov r0, r6 + 8009f22: f000 f83e bl 8009fa2 <__malloc_unlock> + 8009f26: f104 000b add.w r0, r4, #11 + 8009f2a: 1d23 adds r3, r4, #4 + 8009f2c: f020 0007 bic.w r0, r0, #7 + 8009f30: 1ac3 subs r3, r0, r3 + 8009f32: d0d3 beq.n 8009edc <_malloc_r+0x20> + 8009f34: 425a negs r2, r3 + 8009f36: 50e2 str r2, [r4, r3] + 8009f38: e7d0 b.n 8009edc <_malloc_r+0x20> + 8009f3a: 428c cmp r4, r1 + 8009f3c: 684b ldr r3, [r1, #4] + 8009f3e: bf16 itet ne + 8009f40: 6063 strne r3, [r4, #4] + 8009f42: 6013 streq r3, [r2, #0] + 8009f44: 460c movne r4, r1 + 8009f46: e7eb b.n 8009f20 <_malloc_r+0x64> + 8009f48: 460c mov r4, r1 + 8009f4a: 6849 ldr r1, [r1, #4] + 8009f4c: e7cc b.n 8009ee8 <_malloc_r+0x2c> + 8009f4e: 1cc4 adds r4, r0, #3 + 8009f50: f024 0403 bic.w r4, r4, #3 + 8009f54: 42a0 cmp r0, r4 + 8009f56: d005 beq.n 8009f64 <_malloc_r+0xa8> + 8009f58: 1a21 subs r1, r4, r0 + 8009f5a: 4630 mov r0, r6 + 8009f5c: f000 f810 bl 8009f80 <_sbrk_r> + 8009f60: 3001 adds r0, #1 + 8009f62: d0cf beq.n 8009f04 <_malloc_r+0x48> + 8009f64: 6025 str r5, [r4, #0] + 8009f66: e7db b.n 8009f20 <_malloc_r+0x64> + 8009f68: 20000eb0 .word 0x20000eb0 + 8009f6c: 20000eb4 .word 0x20000eb4 + +08009f70 <_malloc_usable_size_r>: + 8009f70: f851 3c04 ldr.w r3, [r1, #-4] + 8009f74: 1f18 subs r0, r3, #4 + 8009f76: 2b00 cmp r3, #0 + 8009f78: bfbc itt lt + 8009f7a: 580b ldrlt r3, [r1, r0] + 8009f7c: 18c0 addlt r0, r0, r3 + 8009f7e: 4770 bx lr + +08009f80 <_sbrk_r>: + 8009f80: b538 push {r3, r4, r5, lr} + 8009f82: 4c06 ldr r4, [pc, #24] ; (8009f9c <_sbrk_r+0x1c>) + 8009f84: 2300 movs r3, #0 + 8009f86: 4605 mov r5, r0 + 8009f88: 4608 mov r0, r1 + 8009f8a: 6023 str r3, [r4, #0] + 8009f8c: f7fc f822 bl 8005fd4 <_sbrk> + 8009f90: 1c43 adds r3, r0, #1 + 8009f92: d102 bne.n 8009f9a <_sbrk_r+0x1a> + 8009f94: 6823 ldr r3, [r4, #0] + 8009f96: b103 cbz r3, 8009f9a <_sbrk_r+0x1a> + 8009f98: 602b str r3, [r5, #0] + 8009f9a: bd38 pop {r3, r4, r5, pc} + 8009f9c: 20000ebc .word 0x20000ebc + +08009fa0 <__malloc_lock>: + 8009fa0: 4770 bx lr + +08009fa2 <__malloc_unlock>: + 8009fa2: 4770 bx lr + +08009fa4 <_init>: + 8009fa4: b5f8 push {r3, r4, r5, r6, r7, lr} + 8009fa6: bf00 nop + 8009fa8: bcf8 pop {r3, r4, r5, r6, r7} + 8009faa: bc08 pop {r3} + 8009fac: 469e mov lr, r3 + 8009fae: 4770 bx lr + +08009fb0 <_fini>: + 8009fb0: b5f8 push {r3, r4, r5, r6, r7, lr} + 8009fb2: bf00 nop + 8009fb4: bcf8 pop {r3, r4, r5, r6, r7} + 8009fb6: bc08 pop {r3} + 8009fb8: 469e mov lr, r3 + 8009fba: 4770 bx lr diff --git a/otto_controller_source/Release/sources.mk b/otto_controller_source/Release/sources.mk new file mode 100644 index 0000000..ab6831f --- /dev/null +++ b/otto_controller_source/Release/sources.mk @@ -0,0 +1,32 @@ +################################################################################ +# Automatically-generated file. Do not edit! +################################################################################ + +ELF_SRCS := +C_UPPER_SRCS := +CXX_SRCS := +C++_SRCS := +OBJ_SRCS := +S_SRCS := +CC_SRCS := +C_SRCS := +CPP_SRCS := +S_UPPER_SRCS := +O_SRCS := +CC_DEPS := +SIZE_OUTPUT := +OBJDUMP_LIST := +C++_DEPS := +EXECUTABLES := +OBJS := +C_UPPER_DEPS := +CXX_DEPS := +C_DEPS := +CPP_DEPS := + +# Every subdirectory with source files must be described here +SUBDIRS := \ +Core/Src \ +Core/Startup \ +Drivers/STM32F7xx_HAL_Driver/Src \ + diff --git a/otto_controller_source/STM32F767ZITX_FLASH.ld b/otto_controller_source/STM32F767ZITX_FLASH.ld index 744f0d6..07fe73e 100644 --- a/otto_controller_source/STM32F767ZITX_FLASH.ld +++ b/otto_controller_source/STM32F767ZITX_FLASH.ld @@ -53,7 +53,7 @@ ENTRY(Reset_Handler) /* Highest address of the user mode stack */ -_estack = 0x20080000; /* end of "RAM" Ram type memory */ +_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */ _Min_Heap_Size = 0x200 ; /* required amount of heap */ _Min_Stack_Size = 0x400 ; /* required amount of stack */ @@ -61,8 +61,8 @@ _Min_Stack_Size = 0x400 ; /* required amount of stack */ /* Memories definition */ MEMORY { - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 512K - FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 2048K + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 512K + FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 2048K } /* Sections */ @@ -103,9 +103,9 @@ SECTIONS } >FLASH .ARM.extab : { - . = ALIGN(4); - *(.ARM.extab* .gnu.linkonce.armextab.*) - . = ALIGN(4); + . = ALIGN(4); + *(.ARM.extab* .gnu.linkonce.armextab.*) + . = ALIGN(4); } >FLASH .ARM : { @@ -160,12 +160,12 @@ SECTIONS _edata = .; /* define a global symbol at data end */ } >RAM AT> FLASH - + /* Uninitialized data section into "RAM" Ram type memory */ . = ALIGN(4); .bss : { - /* This is used by the startup in order to initialize the .bss secion */ + /* This is used by the startup in order to initialize the .bss section */ _sbss = .; /* define a global symbol at bss start */ __bss_start__ = _sbss; *(.bss) diff --git a/otto_controller_source/STM32F767ZITX_RAM.ld b/otto_controller_source/STM32F767ZITX_RAM.ld index 18233ce..29e7601 100644 --- a/otto_controller_source/STM32F767ZITX_RAM.ld +++ b/otto_controller_source/STM32F767ZITX_RAM.ld @@ -53,7 +53,7 @@ ENTRY(Reset_Handler) /* Highest address of the user mode stack */ -_estack = 0x20080000; /* end of "RAM" Ram type memory */ +_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */ _Min_Heap_Size = 0x200; /* required amount of heap */ _Min_Stack_Size = 0x400; /* required amount of stack */ @@ -61,8 +61,8 @@ _Min_Stack_Size = 0x400; /* required amount of stack */ /* Memories definition */ MEMORY { - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 512K - FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 2048K + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 512K + FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 2048K } /* Sections */ @@ -103,9 +103,9 @@ SECTIONS } >RAM .ARM.extab : { - . = ALIGN(4); - *(.ARM.extab* .gnu.linkonce.armextab.*) - . = ALIGN(4); + . = ALIGN(4); + *(.ARM.extab* .gnu.linkonce.armextab.*) + . = ALIGN(4); } >RAM .ARM : { @@ -160,12 +160,12 @@ SECTIONS _edata = .; /* define a global symbol at data end */ } >RAM - + /* Uninitialized data section into "RAM" Ram type memory */ . = ALIGN(4); .bss : { - /* This is used by the startup in order to initialize the .bss secion */ + /* This is used by the startup in order to initialize the .bss section */ _sbss = .; /* define a global symbol at bss start */ __bss_start__ = _sbss; *(.bss) diff --git a/otto_controller_source/Src/main.cpp b/otto_controller_source/Src/main.cpp deleted file mode 100644 index 101ba40..0000000 --- a/otto_controller_source/Src/main.cpp +++ /dev/null @@ -1,604 +0,0 @@ -/* USER CODE BEGIN Header */ -/** - ****************************************************************************** - * @file : main.c - * @brief : Main program body - ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** - */ -/* USER CODE END Header */ - -/* Includes ------------------------------------------------------------------*/ -#include "main.h" - -/* Private includes ----------------------------------------------------------*/ -/* USER CODE BEGIN Includes */ -#include "encoder.h" -#include "odometry_calc.h" -#include "ros.h" -#include -#include - -/* USER CODE END Includes */ - -/* Private typedef -----------------------------------------------------------*/ -/* USER CODE BEGIN PTD */ - -/* USER CODE END PTD */ - -/* Private define ------------------------------------------------------------*/ -/* USER CODE BEGIN PD */ - -/* USER CODE END PD */ - -/* Private macro -------------------------------------------------------------*/ -/* USER CODE BEGIN PM */ - -/* USER CODE END PM */ - -/* Private variables ---------------------------------------------------------*/ - -TIM_HandleTypeDef htim2; -TIM_HandleTypeDef htim3; -TIM_HandleTypeDef htim4; -TIM_HandleTypeDef htim5; - -UART_HandleTypeDef huart3; -UART_HandleTypeDef huart6; -DMA_HandleTypeDef hdma_usart3_rx; -DMA_HandleTypeDef hdma_usart3_tx; -DMA_HandleTypeDef hdma_usart6_rx; -DMA_HandleTypeDef hdma_usart6_tx; - -/* USER CODE BEGIN PV */ - -//Odometry -Encoder left_encoder = Encoder(&htim2); -Encoder right_encoder = Encoder(&htim5); - -OdometryCalc odom = OdometryCalc(left_encoder, right_encoder); - -//test stuff -float delta_r = 0; -float delta_l = 0; -float velocity_l = 0; -float velocity_r = 0; - -// ROS stuff -ros::NodeHandle nh; -char hello[] = "Hello world!"; -std_msgs::String str_msg; -nav_msgs::Odometry odometry; -ros::Publisher chatter("chatter", &str_msg); -ros::Publisher odom_pub("odom_pub", &odometry); - -/* USER CODE END PV */ - -/* Private function prototypes -----------------------------------------------*/ -void SystemClock_Config(void); -static void MX_GPIO_Init(void); -static void MX_DMA_Init(void); -static void MX_TIM2_Init(void); -static void MX_TIM3_Init(void); -static void MX_TIM4_Init(void); -static void MX_TIM5_Init(void); -static void MX_USART3_UART_Init(void); -static void MX_USART6_UART_Init(void); -/* USER CODE BEGIN PFP */ - -/* USER CODE END PFP */ - -/* Private user code ---------------------------------------------------------*/ -/* USER CODE BEGIN 0 */ - -/* USER CODE END 0 */ - -/** - * @brief The application entry point. - * @retval int - */ -int main(void) { - /* USER CODE BEGIN 1 */ - - /* USER CODE END 1 */ - - /* MCU Configuration--------------------------------------------------------*/ - - /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ - HAL_Init(); - - /* USER CODE BEGIN Init */ - /* USER CODE END Init */ - - /* Configure the system clock */ - SystemClock_Config(); - - /* USER CODE BEGIN SysInit */ - - /* USER CODE END SysInit */ - - /* Initialize all configured peripherals */ - MX_GPIO_Init(); - MX_DMA_Init(); - MX_TIM2_Init(); - MX_TIM3_Init(); - MX_TIM4_Init(); - MX_TIM5_Init(); - MX_USART3_UART_Init(); - MX_USART6_UART_Init(); - /* USER CODE BEGIN 2 */ - - nh.initNode(); - nh.advertise(chatter); - nh.advertise(odom_pub); - str_msg.data = hello; - - left_encoder.Setup(); - right_encoder.Setup(); - - HAL_TIM_Base_Start_IT(&htim3); - - /* USER CODE END 2 */ - - /* Infinite loop */ - /* USER CODE BEGIN WHILE */ - while (1) { - -// HAL_UART_Transmit(&huart6, (uint8_t*) hello, strlen(hello), 100); - -// HAL_Delay(100); - - /* USER CODE END WHILE */ - - /* USER CODE BEGIN 3 */ - } - /* USER CODE END 3 */ -} - -/** - * @brief System Clock Configuration - * @retval None - */ -void SystemClock_Config(void) { - RCC_OscInitTypeDef RCC_OscInitStruct = { 0 }; - RCC_ClkInitTypeDef RCC_ClkInitStruct = { 0 }; - RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = { 0 }; - - /** Configure the main internal regulator output voltage - */ - __HAL_RCC_PWR_CLK_ENABLE(); - __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE3); - /** Initializes the CPU, AHB and APB busses clocks - */ - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; - RCC_OscInitStruct.HSIState = RCC_HSI_ON; - RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; - RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; - if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { - Error_Handler(); - } - /** Initializes the CPU, AHB and APB busses clocks - */ - RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK - | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; - RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI; - RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV8; - RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; - - if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) { - Error_Handler(); - } - PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART3 - | RCC_PERIPHCLK_USART6; - PeriphClkInitStruct.Usart3ClockSelection = RCC_USART3CLKSOURCE_PCLK1; - PeriphClkInitStruct.Usart6ClockSelection = RCC_USART6CLKSOURCE_PCLK2; - if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) { - Error_Handler(); - } -} - -/** - * @brief TIM2 Initialization Function - * @param None - * @retval None - */ -static void MX_TIM2_Init(void) { - - /* USER CODE BEGIN TIM2_Init 0 */ - - /* USER CODE END TIM2_Init 0 */ - - TIM_Encoder_InitTypeDef sConfig = { 0 }; - TIM_MasterConfigTypeDef sMasterConfig = { 0 }; - - /* USER CODE BEGIN TIM2_Init 1 */ - - /* USER CODE END TIM2_Init 1 */ - htim2.Instance = TIM2; - htim2.Init.Prescaler = 0; - htim2.Init.CounterMode = TIM_COUNTERMODE_UP; - htim2.Init.Period = 4294967295; - htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - sConfig.EncoderMode = TIM_ENCODERMODE_TI12; - sConfig.IC1Polarity = TIM_ICPOLARITY_RISING; - sConfig.IC1Selection = TIM_ICSELECTION_DIRECTTI; - sConfig.IC1Prescaler = TIM_ICPSC_DIV1; - sConfig.IC1Filter = 0; - sConfig.IC2Polarity = TIM_ICPOLARITY_RISING; - sConfig.IC2Selection = TIM_ICSELECTION_DIRECTTI; - sConfig.IC2Prescaler = TIM_ICPSC_DIV1; - sConfig.IC2Filter = 0; - if (HAL_TIM_Encoder_Init(&htim2, &sConfig) != HAL_OK) { - Error_Handler(); - } - sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; - sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK) { - Error_Handler(); - } - /* USER CODE BEGIN TIM2_Init 2 */ - - /* USER CODE END TIM2_Init 2 */ - -} - -/** - * @brief TIM3 Initialization Function - * @param None - * @retval None - */ -static void MX_TIM3_Init(void) { - - /* USER CODE BEGIN TIM3_Init 0 */ - - /* USER CODE END TIM3_Init 0 */ - - TIM_ClockConfigTypeDef sClockSourceConfig = { 0 }; - TIM_MasterConfigTypeDef sMasterConfig = { 0 }; - - /* USER CODE BEGIN TIM3_Init 1 */ - - /* USER CODE END TIM3_Init 1 */ - htim3.Instance = TIM3; - htim3.Init.Prescaler = 39999; - htim3.Init.CounterMode = TIM_COUNTERMODE_UP; - htim3.Init.Period = 9; - htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - if (HAL_TIM_Base_Init(&htim3) != HAL_OK) { - Error_Handler(); - } - sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; - if (HAL_TIM_ConfigClockSource(&htim3, &sClockSourceConfig) != HAL_OK) { - Error_Handler(); - } - sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; - sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK) { - Error_Handler(); - } - /* USER CODE BEGIN TIM3_Init 2 */ - - /* USER CODE END TIM3_Init 2 */ - -} - -/** - * @brief TIM4 Initialization Function - * @param None - * @retval None - */ -static void MX_TIM4_Init(void) { - - /* USER CODE BEGIN TIM4_Init 0 */ - - /* USER CODE END TIM4_Init 0 */ - - TIM_MasterConfigTypeDef sMasterConfig = { 0 }; - TIM_OC_InitTypeDef sConfigOC = { 0 }; - - /* USER CODE BEGIN TIM4_Init 1 */ - - /* USER CODE END TIM4_Init 1 */ - htim4.Instance = TIM4; - htim4.Init.Prescaler = 0; - htim4.Init.CounterMode = TIM_COUNTERMODE_UP; - htim4.Init.Period = 0; - htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - if (HAL_TIM_PWM_Init(&htim4) != HAL_OK) { - Error_Handler(); - } - sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; - sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) { - Error_Handler(); - } - sConfigOC.OCMode = TIM_OCMODE_PWM1; - sConfigOC.Pulse = 0; - sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; - sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; - if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) { - Error_Handler(); - } - if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_4) != HAL_OK) { - Error_Handler(); - } - /* USER CODE BEGIN TIM4_Init 2 */ - - /* USER CODE END TIM4_Init 2 */ - HAL_TIM_MspPostInit(&htim4); - -} - -/** - * @brief TIM5 Initialization Function - * @param None - * @retval None - */ -static void MX_TIM5_Init(void) { - - /* USER CODE BEGIN TIM5_Init 0 */ - - /* USER CODE END TIM5_Init 0 */ - - TIM_Encoder_InitTypeDef sConfig = { 0 }; - TIM_MasterConfigTypeDef sMasterConfig = { 0 }; - - /* USER CODE BEGIN TIM5_Init 1 */ - - /* USER CODE END TIM5_Init 1 */ - htim5.Instance = TIM5; - htim5.Init.Prescaler = 0; - htim5.Init.CounterMode = TIM_COUNTERMODE_UP; - htim5.Init.Period = 0; - htim5.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - htim5.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - sConfig.EncoderMode = TIM_ENCODERMODE_TI12; - sConfig.IC1Polarity = TIM_ICPOLARITY_RISING; - sConfig.IC1Selection = TIM_ICSELECTION_DIRECTTI; - sConfig.IC1Prescaler = TIM_ICPSC_DIV1; - sConfig.IC1Filter = 0; - sConfig.IC2Polarity = TIM_ICPOLARITY_RISING; - sConfig.IC2Selection = TIM_ICSELECTION_DIRECTTI; - sConfig.IC2Prescaler = TIM_ICPSC_DIV1; - sConfig.IC2Filter = 0; - if (HAL_TIM_Encoder_Init(&htim5, &sConfig) != HAL_OK) { - Error_Handler(); - } - sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; - sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - if (HAL_TIMEx_MasterConfigSynchronization(&htim5, &sMasterConfig) != HAL_OK) { - Error_Handler(); - } - /* USER CODE BEGIN TIM5_Init 2 */ - - /* USER CODE END TIM5_Init 2 */ - -} - -/** - * @brief USART3 Initialization Function - * @param None - * @retval None - */ -static void MX_USART3_UART_Init(void) { - - /* USER CODE BEGIN USART3_Init 0 */ - - /* USER CODE END USART3_Init 0 */ - - /* USER CODE BEGIN USART3_Init 1 */ - - /* USER CODE END USART3_Init 1 */ - huart3.Instance = USART3; - huart3.Init.BaudRate = 115200; - huart3.Init.WordLength = UART_WORDLENGTH_8B; - huart3.Init.StopBits = UART_STOPBITS_1; - huart3.Init.Parity = UART_PARITY_NONE; - huart3.Init.Mode = UART_MODE_TX_RX; - huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE; - huart3.Init.OverSampling = UART_OVERSAMPLING_16; - huart3.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; - huart3.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; - if (HAL_UART_Init(&huart3) != HAL_OK) { - Error_Handler(); - } - /* USER CODE BEGIN USART3_Init 2 */ - - /* USER CODE END USART3_Init 2 */ - -} - -/** - * @brief USART6 Initialization Function - * @param None - * @retval None - */ -static void MX_USART6_UART_Init(void) { - - /* USER CODE BEGIN USART6_Init 0 */ - - /* USER CODE END USART6_Init 0 */ - - /* USER CODE BEGIN USART6_Init 1 */ - - /* USER CODE END USART6_Init 1 */ - huart6.Instance = USART6; - huart6.Init.BaudRate = 115200; - huart6.Init.WordLength = UART_WORDLENGTH_8B; - huart6.Init.StopBits = UART_STOPBITS_1; - huart6.Init.Parity = UART_PARITY_NONE; - huart6.Init.Mode = UART_MODE_TX_RX; - huart6.Init.HwFlowCtl = UART_HWCONTROL_NONE; - huart6.Init.OverSampling = UART_OVERSAMPLING_16; - huart6.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; - huart6.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; - if (HAL_UART_Init(&huart6) != HAL_OK) { - Error_Handler(); - } - /* USER CODE BEGIN USART6_Init 2 */ - - /* USER CODE END USART6_Init 2 */ - -} - -/** - * Enable DMA controller clock - */ -static void MX_DMA_Init(void) { - - /* DMA controller clock enable */ - __HAL_RCC_DMA1_CLK_ENABLE(); - __HAL_RCC_DMA2_CLK_ENABLE(); - - /* DMA interrupt init */ - /* DMA1_Stream1_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(DMA1_Stream1_IRQn, 0, 0); - HAL_NVIC_EnableIRQ(DMA1_Stream1_IRQn); - /* DMA1_Stream3_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(DMA1_Stream3_IRQn, 0, 0); - HAL_NVIC_EnableIRQ(DMA1_Stream3_IRQn); - /* DMA2_Stream1_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(DMA2_Stream1_IRQn, 0, 0); - HAL_NVIC_EnableIRQ(DMA2_Stream1_IRQn); - /* DMA2_Stream6_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(DMA2_Stream6_IRQn, 0, 0); - HAL_NVIC_EnableIRQ(DMA2_Stream6_IRQn); - -} - -/** - * @brief GPIO Initialization Function - * @param None - * @retval None - */ -static void MX_GPIO_Init(void) { - GPIO_InitTypeDef GPIO_InitStruct = { 0 }; - - /* GPIO Ports Clock Enable */ - __HAL_RCC_GPIOC_CLK_ENABLE(); - __HAL_RCC_GPIOA_CLK_ENABLE(); - __HAL_RCC_GPIOF_CLK_ENABLE(); - __HAL_RCC_GPIOE_CLK_ENABLE(); - __HAL_RCC_GPIOD_CLK_ENABLE(); - __HAL_RCC_GPIOB_CLK_ENABLE(); - - /*Configure GPIO pin Output Level */ - HAL_GPIO_WritePin(GPIOF, GPIO_PIN_12 | dir_1_Pin | sleep_2_Pin | sleep_1_Pin, - GPIO_PIN_RESET); - - /*Configure GPIO pin Output Level */ - HAL_GPIO_WritePin(GPIOB, GPIO_PIN_8, GPIO_PIN_RESET); - - /*Configure GPIO pin : PC0 */ - GPIO_InitStruct.Pin = GPIO_PIN_0; - GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; - GPIO_InitStruct.Pull = GPIO_NOPULL; - HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); - - /*Configure GPIO pin : current_1_Pin */ - GPIO_InitStruct.Pin = current_1_Pin; - GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; - GPIO_InitStruct.Pull = GPIO_NOPULL; - HAL_GPIO_Init(current_1_GPIO_Port, &GPIO_InitStruct); - - /*Configure GPIO pin : fault_2_Pin */ - GPIO_InitStruct.Pin = fault_2_Pin; - GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - GPIO_InitStruct.Pull = GPIO_NOPULL; - HAL_GPIO_Init(fault_2_GPIO_Port, &GPIO_InitStruct); - - /*Configure GPIO pins : PF12 dir_1_Pin sleep_2_Pin sleep_1_Pin */ - GPIO_InitStruct.Pin = GPIO_PIN_12 | dir_1_Pin | sleep_2_Pin | sleep_1_Pin; - GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); - - /*Configure GPIO pin : fault_1_Pin */ - GPIO_InitStruct.Pin = fault_1_Pin; - GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - GPIO_InitStruct.Pull = GPIO_NOPULL; - HAL_GPIO_Init(fault_1_GPIO_Port, &GPIO_InitStruct); - - /*Configure GPIO pin : PB8 */ - GPIO_InitStruct.Pin = GPIO_PIN_8; - GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - -} - -/* USER CODE BEGIN 4 */ -void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) { - if (htim->Instance == TIM3) { -// velocity_l = left_encoder.GetLinearVelocity(); -// velocity_r = right_encoder.GetLinearVelocity(); -// delta_r = right_encoder.current_millis_ - right_encoder.previous_millis_; -// delta_l = left_encoder.current_millis_ - left_encoder.previous_millis_; - - odom.OdometryUpdateMessage(); - odometry = odom.odometry_; - odom_pub.publish(&odometry); - - chatter.publish(&str_msg); - nh.spinOnce(); - - //HAL_UART_Transmit(&huart3, (uint8_t*)hello, strlen(hello), 100); - - } -} - -void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) { - nh.getHardware()->flush(); -} - -void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) { - nh.getHardware()->reset_rbuf(); -} - -/* USER CODE END 4 */ - -/** - * @brief This function is executed in case of error occurrence. - * @retval None - */ -void Error_Handler(void) { - /* USER CODE BEGIN Error_Handler_Debug */ - /* User can add his own implementation to report the HAL error return state */ - - /* USER CODE END Error_Handler_Debug */ -} - -#ifdef USE_FULL_ASSERT -/** - * @brief Reports the name of the source file and the source line number - * where the assert_param error has occurred. - * @param file: pointer to the source file name - * @param line: assert_param error line source number - * @retval None - */ -void assert_failed(uint8_t *file, uint32_t line) -{ - /* USER CODE BEGIN 6 */ - /* User can add his own implementation to report the file name and line number, - tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ - /* USER CODE END 6 */ -} -#endif /* USE_FULL_ASSERT */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/otto_controller_source/otto_controller_source Debug.cfg b/otto_controller_source/otto_controller_source Debug.cfg deleted file mode 100644 index 12d525f..0000000 --- a/otto_controller_source/otto_controller_source Debug.cfg +++ /dev/null @@ -1,40 +0,0 @@ -# This is an genericBoard board with a single STM32F767ZITx chip -# -# Generated by STM32CubeIDE -# Take care that such file, as generated, may be overridden without any early notice. Please have a look to debug launch configuration setup(s) - -source [find interface/stlink.cfg] - -set WORKAREASIZE 0x8000 - -transport select "hla_swd" - -set CHIPNAME STM32F767ZITx -set BOARDNAME genericBoard - -# Enable debug when in low power modes -set ENABLE_LOW_POWER 1 - -# Stop Watchdog counters when halt -set STOP_WATCHDOG 1 - -# STlink Debug clock frequency -set CLOCK_FREQ 8000 - -# Reset configuration -# use hardware reset, connect under reset -# connect_assert_srst needed if low power mode application running (WFI...) -reset_config srst_only srst_nogate connect_assert_srst -set CONNECT_UNDER_RESET 1 -set CORE_RESET 0 - - - -# BCTM CPU variables - - - -source [find target/stm32f7x.cfg] - - - diff --git a/otto_controller_source/otto_controller_source Debug.launch b/otto_controller_source/otto_controller_source Debug.launch index 280e229..daf695f 100644 --- a/otto_controller_source/otto_controller_source Debug.launch +++ b/otto_controller_source/otto_controller_source Debug.launch @@ -2,7 +2,7 @@ - + @@ -18,17 +18,6 @@ - - - - - - - - - - - @@ -36,19 +25,10 @@ - + - - - - - - - - - @@ -72,13 +52,13 @@ - + - + diff --git a/otto_controller_source/otto_controller_source.elf.cfg b/otto_controller_source/otto_controller_source.elf.cfg deleted file mode 100644 index 84a55ef..0000000 --- a/otto_controller_source/otto_controller_source.elf.cfg +++ /dev/null @@ -1,31 +0,0 @@ -# This is an genericBoard board with a single STM32F767ZITx chip -# -# Generated by STM32CubeIDE -# Take care that such file, as generated, may be overridden without any early notice. Please have a look to debug launch configuration setup(s) - -source [find interface/stlink.cfg] - -set WORKAREASIZE 0x8000 - -transport select "hla_swd" - -set CHIPNAME STM32F767ZITx -set BOARDNAME genericBoard - -# Enable debug when in low power modes -set ENABLE_LOW_POWER 1 - -# Stop Watchdog counters when halt -set STOP_WATCHDOG 1 - -# STlink Debug clock frequency -set CLOCK_FREQ 8000 - -# use hardware reset, connect under reset -# connect_assert_srst needed if low power mode application running (WFI...) -reset_config srst_only srst_nogate connect_assert_srst -set CONNECT_UNDER_RESET 1 - -# BCTM CPU variables - -source [find target/stm32f7x.cfg] diff --git a/otto_controller_source/otto_controller_source.ioc b/otto_controller_source/otto_controller_source.ioc index da4c20b..83e4e1a 100644 --- a/otto_controller_source/otto_controller_source.ioc +++ b/otto_controller_source/otto_controller_source.ioc @@ -12,7 +12,7 @@ Dma.USART3_RX.0.MemInc=DMA_MINC_ENABLE Dma.USART3_RX.0.Mode=DMA_NORMAL Dma.USART3_RX.0.PeriphDataAlignment=DMA_PDATAALIGN_BYTE Dma.USART3_RX.0.PeriphInc=DMA_PINC_DISABLE -Dma.USART3_RX.0.Priority=DMA_PRIORITY_HIGH +Dma.USART3_RX.0.Priority=DMA_PRIORITY_LOW Dma.USART3_RX.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode Dma.USART3_TX.1.Direction=DMA_MEMORY_TO_PERIPH Dma.USART3_TX.1.FIFOMode=DMA_FIFOMODE_DISABLE @@ -22,7 +22,7 @@ Dma.USART3_TX.1.MemInc=DMA_MINC_ENABLE Dma.USART3_TX.1.Mode=DMA_NORMAL Dma.USART3_TX.1.PeriphDataAlignment=DMA_PDATAALIGN_BYTE Dma.USART3_TX.1.PeriphInc=DMA_PINC_DISABLE -Dma.USART3_TX.1.Priority=DMA_PRIORITY_HIGH +Dma.USART3_TX.1.Priority=DMA_PRIORITY_LOW Dma.USART3_TX.1.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode Dma.USART6_RX.2.Direction=DMA_PERIPH_TO_MEMORY Dma.USART6_RX.2.FIFOMode=DMA_FIFOMODE_DISABLE @@ -32,7 +32,7 @@ Dma.USART6_RX.2.MemInc=DMA_MINC_ENABLE Dma.USART6_RX.2.Mode=DMA_NORMAL Dma.USART6_RX.2.PeriphDataAlignment=DMA_PDATAALIGN_BYTE Dma.USART6_RX.2.PeriphInc=DMA_PINC_DISABLE -Dma.USART6_RX.2.Priority=DMA_PRIORITY_HIGH +Dma.USART6_RX.2.Priority=DMA_PRIORITY_LOW Dma.USART6_RX.2.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode Dma.USART6_TX.3.Direction=DMA_MEMORY_TO_PERIPH Dma.USART6_TX.3.FIFOMode=DMA_FIFOMODE_DISABLE @@ -42,7 +42,7 @@ Dma.USART6_TX.3.MemInc=DMA_MINC_ENABLE Dma.USART6_TX.3.Mode=DMA_NORMAL Dma.USART6_TX.3.PeriphDataAlignment=DMA_PDATAALIGN_BYTE Dma.USART6_TX.3.PeriphInc=DMA_PINC_DISABLE -Dma.USART6_TX.3.Priority=DMA_PRIORITY_HIGH +Dma.USART6_TX.3.Priority=DMA_PRIORITY_LOW Dma.USART6_TX.3.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode File.Version=6 KeepUserPlacement=false @@ -63,25 +63,25 @@ Mcu.Name=STM32F767ZITx Mcu.Package=LQFP144 Mcu.Pin0=PC0 Mcu.Pin1=PA0/WKUP -Mcu.Pin10=PE9 -Mcu.Pin11=PD8 -Mcu.Pin12=PD9 -Mcu.Pin13=PD14 -Mcu.Pin14=PD15 -Mcu.Pin15=PC6 -Mcu.Pin16=PC7 -Mcu.Pin17=PB3 -Mcu.Pin18=PB8 -Mcu.Pin19=VP_SYS_VS_Systick +Mcu.Pin10=PD8 +Mcu.Pin11=PD9 +Mcu.Pin12=PD14 +Mcu.Pin13=PD15 +Mcu.Pin14=PC6 +Mcu.Pin15=PC7 +Mcu.Pin16=PB3 +Mcu.Pin17=PB8 +Mcu.Pin18=VP_SYS_VS_Systick +Mcu.Pin19=VP_TIM3_VS_ClockSourceINT Mcu.Pin2=PA1 -Mcu.Pin20=VP_TIM3_VS_ClockSourceINT +Mcu.Pin20=VP_TIM4_VS_ClockSourceINT Mcu.Pin3=PA3 Mcu.Pin4=PA5 Mcu.Pin5=PA6 -Mcu.Pin6=PF12 -Mcu.Pin7=PF13 -Mcu.Pin8=PF14 -Mcu.Pin9=PF15 +Mcu.Pin6=PF13 +Mcu.Pin7=PF14 +Mcu.Pin8=PF15 +Mcu.Pin9=PE9 Mcu.PinsNb=21 Mcu.ThirdPartyNb=0 Mcu.UserConstants= @@ -104,31 +104,30 @@ NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true NVIC.TIM3_IRQn=true\:0\:0\:false\:false\:true\:true\:true NVIC.USART3_IRQn=true\:0\:0\:false\:false\:true\:true\:true +NVIC.USART6_IRQn=true\:0\:0\:false\:false\:true\:true\:true NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false +PA0/WKUP.Locked=true PA0/WKUP.Signal=S_TIM5_CH1 +PA1.Locked=true PA1.Signal=S_TIM5_CH2 PA3.GPIOParameters=GPIO_Label -PA3.GPIO_Label=current_1 +PA3.GPIO_Label=current1 PA3.Locked=true PA3.Signal=GPIO_Analog -PA5.GPIOParameters=GPIO_PuPd -PA5.GPIO_PuPd=GPIO_NOPULL +PA5.Locked=true PA5.Signal=S_TIM2_CH1_ETR PA6.GPIOParameters=GPIO_Label -PA6.GPIO_Label=fault_2 +PA6.GPIO_Label=fault2 PA6.Locked=true PA6.Signal=GPIO_Input -PB3.GPIOParameters=GPIO_PuPd -PB3.GPIO_PuPd=GPIO_NOPULL +PB3.Locked=true PB3.Signal=S_TIM2_CH2 PB8.Locked=true PB8.Signal=GPIO_Output PC0.Locked=true PC0.Signal=GPIO_Analog -PC6.Locked=true PC6.Mode=Asynchronous PC6.Signal=USART6_TX -PC7.Locked=true PC7.Mode=Asynchronous PC7.Signal=USART6_RX PCC.Checker=false @@ -140,11 +139,11 @@ PCC.Series=STM32F7 PCC.Temperature=25 PCC.Vdd=3.3 PD14.GPIOParameters=GPIO_Label -PD14.GPIO_Label=pwm_2 +PD14.GPIO_Label=pwm2 PD14.Locked=true PD14.Signal=S_TIM4_CH3 PD15.GPIOParameters=GPIO_Label -PD15.GPIO_Label=pwm_1 +PD15.GPIO_Label=pwm1 PD15.Locked=true PD15.Signal=S_TIM4_CH4 PD8.Locked=true @@ -154,21 +153,19 @@ PD9.Locked=true PD9.Mode=Asynchronous PD9.Signal=USART3_RX PE9.GPIOParameters=GPIO_Label -PE9.GPIO_Label=fault_1 +PE9.GPIO_Label=fault1 PE9.Locked=true PE9.Signal=GPIO_Input -PF12.Locked=true -PF12.Signal=GPIO_Output PF13.GPIOParameters=GPIO_Label -PF13.GPIO_Label=dir_1 +PF13.GPIO_Label=dir1 PF13.Locked=true PF13.Signal=GPIO_Output PF14.GPIOParameters=GPIO_Label -PF14.GPIO_Label=sleep_2 +PF14.GPIO_Label=sleep2 PF14.Locked=true PF14.Signal=GPIO_Output PF15.GPIOParameters=GPIO_Label -PF15.GPIO_Label=sleep_1 +PF15.GPIO_Label=sleep1 PF15.Locked=true PF15.Signal=GPIO_Output PinOutPanel.RotationAngle=0 @@ -188,7 +185,7 @@ ProjectManager.HeapSize=0x200 ProjectManager.KeepUserCode=true ProjectManager.LastFirmware=true ProjectManager.LibraryCopy=1 -ProjectManager.MainLocation=Src +ProjectManager.MainLocation=Core/Src ProjectManager.NoMain=false ProjectManager.PreviousToolchain= ProjectManager.ProjectBuild=false @@ -198,29 +195,15 @@ ProjectManager.StackSize=0x400 ProjectManager.TargetToolchain=STM32CubeIDE ProjectManager.ToolChainLocation= ProjectManager.UnderRoot=true -ProjectManager.functionlistsort=3-SystemClock_Config-RCC-false-HAL-false -RCC.AHBFreq_Value=16000000 -RCC.APB1CLKDivider=RCC_HCLK_DIV8 -RCC.APB1Freq_Value=2000000 -RCC.APB1TimFreq_Value=4000000 -RCC.APB2Freq_Value=16000000 -RCC.APB2TimFreq_Value=16000000 +ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false RCC.CECFreq_Value=32786.88524590164 -RCC.CortexFreq_Value=16000000 RCC.DFSDMFreq_Value=16000000 -RCC.FCLKCortexFreq_Value=16000000 RCC.FamilyName=M -RCC.HCLKFreq_Value=16000000 RCC.HSE_VALUE=25000000 RCC.HSI_VALUE=16000000 -RCC.I2C1Freq_Value=2000000 -RCC.I2C2Freq_Value=2000000 -RCC.I2C3Freq_Value=2000000 -RCC.I2C4Freq_Value=2000000 RCC.I2SFreq_Value=96000000 -RCC.IPParameters=AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CECFreq_Value,CortexFreq_Value,DFSDMFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LCDTFTFreq_Value,LPTIM1Freq_Value,LSE_VALUE,LSI_VALUE,PLLCLKFreq_Value,PLLI2SPCLKFreq_Value,PLLI2SQCLKFreq_Value,PLLI2SRCLKFreq_Value,PLLQCLKFreq_Value,PLLSAIPCLKFreq_Value,PLLSAIQCLKFreq_Value,PLLSAIRCLKFreq_Value,PLLSAIoutputFreq_Value,RNGFreq_Value,SAI1Freq_Value,SAI2Freq_Value,SDMMC2Freq_Value,SDMMCFreq_Value,SPDIFRXFreq_Value,UART4Freq_Value,UART5Freq_Value,UART7Freq_Value,UART8Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USART6Freq_Value,USBFreq_Value,VCOI2SOutputFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOSAIOutputFreq_Value +RCC.IPParameters=CECFreq_Value,DFSDMFreq_Value,FamilyName,HSE_VALUE,HSI_VALUE,I2SFreq_Value,LCDTFTFreq_Value,LSE_VALUE,LSI_VALUE,PLLCLKFreq_Value,PLLI2SPCLKFreq_Value,PLLI2SQCLKFreq_Value,PLLI2SRCLKFreq_Value,PLLQCLKFreq_Value,PLLSAIPCLKFreq_Value,PLLSAIQCLKFreq_Value,PLLSAIRCLKFreq_Value,PLLSAIoutputFreq_Value,RNGFreq_Value,SAI1Freq_Value,SAI2Freq_Value,SDMMC2Freq_Value,SDMMCFreq_Value,SPDIFRXFreq_Value,USBFreq_Value,VCOI2SOutputFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOSAIOutputFreq_Value RCC.LCDTFTFreq_Value=48000000 -RCC.LPTIM1Freq_Value=2000000 RCC.LSE_VALUE=32768 RCC.LSI_VALUE=32000 RCC.PLLCLKFreq_Value=96000000 @@ -238,14 +221,6 @@ RCC.SAI2Freq_Value=96000000 RCC.SDMMC2Freq_Value=16000000 RCC.SDMMCFreq_Value=16000000 RCC.SPDIFRXFreq_Value=96000000 -RCC.UART4Freq_Value=2000000 -RCC.UART5Freq_Value=2000000 -RCC.UART7Freq_Value=2000000 -RCC.UART8Freq_Value=2000000 -RCC.USART1Freq_Value=16000000 -RCC.USART2Freq_Value=2000000 -RCC.USART3Freq_Value=2000000 -RCC.USART6Freq_Value=16000000 RCC.USBFreq_Value=96000000 RCC.VCOI2SOutputFreq_Value=192000000 RCC.VCOInputFreq_Value=1000000 @@ -264,18 +239,17 @@ SH.S_TIM5_CH1.ConfNb=1 SH.S_TIM5_CH2.0=TIM5_CH2,Encoder_Interface SH.S_TIM5_CH2.ConfNb=1 TIM2.EncoderMode=TIM_ENCODERMODE_TI12 -TIM2.IC1Polarity=TIM_ICPOLARITY_RISING -TIM2.IC2Polarity=TIM_ICPOLARITY_RISING -TIM2.IPParameters=Period,EncoderMode,IC1Polarity,IC2Polarity +TIM2.IPParameters=Period,EncoderMode TIM2.Period=4294967295 TIM3.IPParameters=Prescaler,Period TIM3.Period=9 TIM3.Prescaler=39999 TIM4.Channel-PWM\ Generation3\ CH3=TIM_CHANNEL_3 TIM4.Channel-PWM\ Generation4\ CH4=TIM_CHANNEL_4 -TIM4.IPParameters=Channel-PWM Generation3 CH3,Channel-PWM Generation4 CH4 +TIM4.IPParameters=Channel-PWM Generation4 CH4,Channel-PWM Generation3 CH3 TIM5.EncoderMode=TIM_ENCODERMODE_TI12 -TIM5.IPParameters=EncoderMode +TIM5.IPParameters=Period,EncoderMode +TIM5.Period=4294967295 USART3.IPParameters=VirtualMode-Asynchronous USART3.VirtualMode-Asynchronous=VM_ASYNC USART6.IPParameters=VirtualMode-Asynchronous @@ -284,5 +258,7 @@ VP_SYS_VS_Systick.Mode=SysTick VP_SYS_VS_Systick.Signal=SYS_VS_Systick VP_TIM3_VS_ClockSourceINT.Mode=Internal VP_TIM3_VS_ClockSourceINT.Signal=TIM3_VS_ClockSourceINT +VP_TIM4_VS_ClockSourceINT.Mode=Internal +VP_TIM4_VS_ClockSourceINT.Signal=TIM4_VS_ClockSourceINT board=custom isbadioc=false -- 2.52.0