]> git.leonardobizzoni.com Git - pioneer-stm32/commitdiff
dma works
authorFederica Di Lauro <federicadilauro1998@gmail.com>
Tue, 11 Feb 2020 11:08:43 +0000 (12:08 +0100)
committerFederica Di Lauro <federicadilauro1998@gmail.com>
Tue, 11 Feb 2020 11:08:43 +0000 (12:08 +0100)
otto_controller/.mxproject
otto_controller/Core/Inc/dma.h [new file with mode: 0644]
otto_controller/Core/Inc/stm32f7xx_it.h
otto_controller/Core/Src/dma.c [new file with mode: 0644]
otto_controller/Core/Src/main.cpp
otto_controller/Core/Src/stm32f7xx_it.c
otto_controller/Core/Src/usart.c
otto_controller/otto_controller.ioc

index d4029ca30195bb502f862efc2dd6e141ae4f1ddd..b4aeebb2202657102d37f309f8ee12e378b315a7 100644 (file)
@@ -1,31 +1,33 @@
 [PreviousGenFiles]\r
 AdvancedFolderStructure=true\r
-HeaderFileListSize=6\r
+HeaderFileListSize=7\r
 HeaderFiles#0=/home/fdila/Projects/otto/otto_controller/Core/Inc/gpio.h\r
-HeaderFiles#1=/home/fdila/Projects/otto/otto_controller/Core/Inc/tim.h\r
-HeaderFiles#2=/home/fdila/Projects/otto/otto_controller/Core/Inc/usart.h\r
+HeaderFiles#1=/home/fdila/Projects/otto/otto_controller/Core/Inc/dma.h\r
+HeaderFiles#2=/home/fdila/Projects/otto/otto_controller/Core/Inc/tim.h\r
 HeaderFolderListSize=1\r
 HeaderPath#0=/home/fdila/Projects/otto/otto_controller/Core/Inc\r
-SourceFileListSize=6\r
+SourceFileListSize=7\r
 SourceFiles#0=/home/fdila/Projects/otto/otto_controller/Core/Src/gpio.c\r
-SourceFiles#1=/home/fdila/Projects/otto/otto_controller/Core/Src/tim.c\r
-SourceFiles#2=/home/fdila/Projects/otto/otto_controller/Core/Src/usart.c\r
+SourceFiles#1=/home/fdila/Projects/otto/otto_controller/Core/Src/dma.c\r
+SourceFiles#2=/home/fdila/Projects/otto/otto_controller/Core/Src/tim.c\r
 SourceFolderListSize=1\r
 SourcePath#0=/home/fdila/Projects/otto/otto_controller/Core/Src\r
-HeaderFiles#3=/home/fdila/Projects/otto/otto_controller/Core/Inc/stm32f7xx_it.h\r
-HeaderFiles#4=/home/fdila/Projects/otto/otto_controller/Core/Inc/stm32f7xx_hal_conf.h\r
-HeaderFiles#5=/home/fdila/Projects/otto/otto_controller/Core/Inc/main.h\r
-SourceFiles#3=/home/fdila/Projects/otto/otto_controller/Core/Src/stm32f7xx_it.c\r
-SourceFiles#4=/home/fdila/Projects/otto/otto_controller/Core/Src/stm32f7xx_hal_msp.c\r
-SourceFiles#5=/home/fdila/Projects/otto/otto_controller/Core/Src/main.c\r
+HeaderFiles#3=/home/fdila/Projects/otto/otto_controller/Core/Inc/usart.h\r
+HeaderFiles#4=/home/fdila/Projects/otto/otto_controller/Core/Inc/stm32f7xx_it.h\r
+HeaderFiles#5=/home/fdila/Projects/otto/otto_controller/Core/Inc/stm32f7xx_hal_conf.h\r
+SourceFiles#3=/home/fdila/Projects/otto/otto_controller/Core/Src/usart.c\r
+SourceFiles#4=/home/fdila/Projects/otto/otto_controller/Core/Src/stm32f7xx_it.c\r
+SourceFiles#5=/home/fdila/Projects/otto/otto_controller/Core/Src/stm32f7xx_hal_msp.c\r
 HeaderFiles#6=/home/fdila/Projects/otto/otto_controller/Core/Inc/main.h\r
 SourceFiles#6=/home/fdila/Projects/otto/otto_controller/Core/Src/main.c\r
+HeaderFiles=;\r
+SourceFiles=;\r
 \r
 [PreviousLibFiles]\r
 LibFiles=Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h;Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h;Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h;Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h;Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h;Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h;Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/system_stm32f7xx.c;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/tz_context.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_cm4.h;\r
 \r
 [PreviousUsedCubeIDEFiles]\r
-SourceFiles=Core/Src/main.c;Core/Src/gpio.c;Core/Src/tim.c;Core/Src/usart.c;Core/Src/stm32f7xx_it.c;Core/Src/stm32f7xx_hal_msp.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c;Core/Src/system_stm32f7xx.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c;Core/Src/system_stm32f7xx.c;Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/system_stm32f7xx.c;;\r
+SourceFiles=Core/Src/main.c;Core/Src/gpio.c;Core/Src/dma.c;Core/Src/tim.c;Core/Src/usart.c;Core/Src/stm32f7xx_it.c;Core/Src/stm32f7xx_hal_msp.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c;Core/Src/system_stm32f7xx.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c;Core/Src/system_stm32f7xx.c;Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/system_stm32f7xx.c;;\r
 HeaderPath=Drivers/STM32F7xx_HAL_Driver/Inc;Drivers/STM32F7xx_HAL_Driver/Inc/Legacy;Drivers/CMSIS/Device/ST/STM32F7xx/Include;Drivers/CMSIS/Include;Core/Inc;\r
 CDefines=USE_HAL_DRIVER;STM32F767xx;USE_HAL_DRIVER;USE_HAL_DRIVER;\r
 \r
diff --git a/otto_controller/Core/Inc/dma.h b/otto_controller/Core/Inc/dma.h
new file mode 100644 (file)
index 0000000..16bb88c
--- /dev/null
@@ -0,0 +1,56 @@
+/**\r
+  ******************************************************************************\r
+  * File Name          : dma.h\r
+  * Description        : This file contains all the function prototypes for\r
+  *                      the dma.c file\r
+  ******************************************************************************\r
+  * @attention\r
+  *\r
+  * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.\r
+  * All rights reserved.</center></h2>\r
+  *\r
+  * This software component is licensed by ST under BSD 3-Clause license,\r
+  * the "License"; You may not use this file except in compliance with the\r
+  * License. You may obtain a copy of the License at:\r
+  *                        opensource.org/licenses/BSD-3-Clause\r
+  *\r
+  ******************************************************************************\r
+  */\r
+/* Define to prevent recursive inclusion -------------------------------------*/\r
+#ifndef __dma_H\r
+#define __dma_H\r
+\r
+#ifdef __cplusplus\r
+ extern "C" {\r
+#endif\r
+\r
+/* Includes ------------------------------------------------------------------*/\r
+#include "main.h"\r
+\r
+/* DMA memory to memory transfer handles -------------------------------------*/\r
+\r
+/* USER CODE BEGIN Includes */\r
+\r
+/* USER CODE END Includes */\r
+\r
+/* USER CODE BEGIN Private defines */\r
+\r
+/* USER CODE END Private defines */\r
+\r
+void MX_DMA_Init(void);\r
+\r
+/* USER CODE BEGIN Prototypes */\r
+\r
+/* USER CODE END Prototypes */\r
+\r
+#ifdef __cplusplus\r
+}\r
+#endif\r
+\r
+#endif /* __dma_H */\r
+\r
+/**\r
+  * @}\r
+  */\r
+\r
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/\r
index f138f646573ce783d6393cf109c2c8954fb22d47..d1e7824001ab977304df98b986f926835b0c8f04 100644 (file)
@@ -59,6 +59,8 @@ void SysTick_Handler(void);
 void TIM3_IRQHandler(void);\r
 void EXTI15_10_IRQHandler(void);\r
 void TIM6_DAC_IRQHandler(void);\r
+void DMA2_Stream1_IRQHandler(void);\r
+void DMA2_Stream6_IRQHandler(void);\r
 void USART6_IRQHandler(void);\r
 /* USER CODE BEGIN EFP */\r
 \r
diff --git a/otto_controller/Core/Src/dma.c b/otto_controller/Core/Src/dma.c
new file mode 100644 (file)
index 0000000..35f0a1b
--- /dev/null
@@ -0,0 +1,66 @@
+/**\r
+  ******************************************************************************\r
+  * File Name          : dma.c\r
+  * Description        : This file provides code for the configuration\r
+  *                      of all the requested memory to memory DMA transfers.\r
+  ******************************************************************************\r
+  * @attention\r
+  *\r
+  * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.\r
+  * All rights reserved.</center></h2>\r
+  *\r
+  * This software component is licensed by ST under BSD 3-Clause license,\r
+  * the "License"; You may not use this file except in compliance with the\r
+  * License. You may obtain a copy of the License at:\r
+  *                        opensource.org/licenses/BSD-3-Clause\r
+  *\r
+  ******************************************************************************\r
+  */\r
+\r
+/* Includes ------------------------------------------------------------------*/\r
+#include "dma.h"\r
+\r
+/* USER CODE BEGIN 0 */\r
+\r
+/* USER CODE END 0 */\r
+\r
+/*----------------------------------------------------------------------------*/\r
+/* Configure DMA                                                              */\r
+/*----------------------------------------------------------------------------*/\r
+\r
+/* USER CODE BEGIN 1 */\r
+\r
+/* USER CODE END 1 */\r
+\r
+/** \r
+  * Enable DMA controller clock\r
+  */\r
+void MX_DMA_Init(void) \r
+{\r
+\r
+  /* DMA controller clock enable */\r
+  __HAL_RCC_DMA2_CLK_ENABLE();\r
+\r
+  /* DMA interrupt init */\r
+  /* DMA2_Stream1_IRQn interrupt configuration */\r
+  HAL_NVIC_SetPriority(DMA2_Stream1_IRQn, 0, 0);\r
+  HAL_NVIC_EnableIRQ(DMA2_Stream1_IRQn);\r
+  /* DMA2_Stream6_IRQn interrupt configuration */\r
+  HAL_NVIC_SetPriority(DMA2_Stream6_IRQn, 0, 0);\r
+  HAL_NVIC_EnableIRQ(DMA2_Stream6_IRQn);\r
+\r
+}\r
+\r
+/* USER CODE BEGIN 2 */\r
+\r
+/* USER CODE END 2 */\r
+\r
+/**\r
+  * @}\r
+  */\r
+\r
+/**\r
+  * @}\r
+  */\r
+\r
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/\r
index 813b6f9c4d16b5072c34acd976123c4d6af34a68..3d30f189f23c89836599f383fa1bad8b74ca879b 100644 (file)
@@ -20,6 +20,7 @@
 \r
 /* Includes ------------------------------------------------------------------*/\r
 #include "main.h"\r
+#include "dma.h"\r
 #include "tim.h"\r
 #include "usart.h"\r
 #include "gpio.h"\r
@@ -142,6 +143,7 @@ int main(void)
 \r
   /* Initialize all configured peripherals */\r
   MX_GPIO_Init();\r
+  MX_DMA_Init();\r
   MX_TIM2_Init();\r
   MX_TIM3_Init();\r
   MX_TIM4_Init();\r
@@ -174,7 +176,7 @@ int main(void)
   rx_buffer = (uint8_t*) &vel_msg;\r
 \r
   //Enables UART RX interrupt\r
-  HAL_UART_Receive_IT(&huart6, rx_buffer, 8);\r
+  HAL_UART_Receive_DMA(&huart6, rx_buffer, 8);\r
 \r
   /* USER CODE END 2 */\r
  \r
@@ -298,7 +300,7 @@ void HAL_UART_RxCpltCallback(UART_HandleTypeDef *UartHandle) {
   float cross_setpoint = left_setpoint - right_setpoint;\r
   cross_pid.set(cross_setpoint);\r
 \r
-  HAL_UART_Receive_IT(&huart6, rx_buffer, 8);\r
+  HAL_UART_Receive_DMA(&huart6, rx_buffer, 8);\r
 \r
 }\r
 \r
index 88e7f7d9a42c09142a0fc53b95e1e0388fac3c7d..d3abde0bd660471e4e5d4a04364fdb13dd143153 100644 (file)
@@ -58,6 +58,8 @@
 /* External variables --------------------------------------------------------*/\r
 extern TIM_HandleTypeDef htim3;\r
 extern TIM_HandleTypeDef htim6;\r
+extern DMA_HandleTypeDef hdma_usart6_tx;\r
+extern DMA_HandleTypeDef hdma_usart6_rx;\r
 extern UART_HandleTypeDef huart6;\r
 /* USER CODE BEGIN EV */\r
 \r
@@ -241,6 +243,34 @@ void TIM6_DAC_IRQHandler(void)
   /* USER CODE END TIM6_DAC_IRQn 1 */\r
 }\r
 \r
+/**\r
+  * @brief This function handles DMA2 stream1 global interrupt.\r
+  */\r
+void DMA2_Stream1_IRQHandler(void)\r
+{\r
+  /* USER CODE BEGIN DMA2_Stream1_IRQn 0 */\r
+\r
+  /* USER CODE END DMA2_Stream1_IRQn 0 */\r
+  HAL_DMA_IRQHandler(&hdma_usart6_rx);\r
+  /* USER CODE BEGIN DMA2_Stream1_IRQn 1 */\r
+\r
+  /* USER CODE END DMA2_Stream1_IRQn 1 */\r
+}\r
+\r
+/**\r
+  * @brief This function handles DMA2 stream6 global interrupt.\r
+  */\r
+void DMA2_Stream6_IRQHandler(void)\r
+{\r
+  /* USER CODE BEGIN DMA2_Stream6_IRQn 0 */\r
+\r
+  /* USER CODE END DMA2_Stream6_IRQn 0 */\r
+  HAL_DMA_IRQHandler(&hdma_usart6_tx);\r
+  /* USER CODE BEGIN DMA2_Stream6_IRQn 1 */\r
+\r
+  /* USER CODE END DMA2_Stream6_IRQn 1 */\r
+}\r
+\r
 /**\r
   * @brief This function handles USART6 global interrupt.\r
   */\r
index 7b56c726b654214a451a1733653f09d0987ae6e4..6f25222ddbe76a9f3160ec246d9adef7759f5c87 100644 (file)
@@ -25,6 +25,8 @@
 /* USER CODE END 0 */\r
 \r
 UART_HandleTypeDef huart6;\r
+DMA_HandleTypeDef hdma_usart6_tx;\r
+DMA_HandleTypeDef hdma_usart6_rx;\r
 \r
 /* USART6 init function */\r
 \r
@@ -72,6 +74,43 @@ void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
     GPIO_InitStruct.Alternate = GPIO_AF8_USART6;\r
     HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);\r
 \r
+    /* USART6 DMA Init */\r
+    /* USART6_TX Init */\r
+    hdma_usart6_tx.Instance = DMA2_Stream6;\r
+    hdma_usart6_tx.Init.Channel = DMA_CHANNEL_5;\r
+    hdma_usart6_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;\r
+    hdma_usart6_tx.Init.PeriphInc = DMA_PINC_DISABLE;\r
+    hdma_usart6_tx.Init.MemInc = DMA_MINC_ENABLE;\r
+    hdma_usart6_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;\r
+    hdma_usart6_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;\r
+    hdma_usart6_tx.Init.Mode = DMA_NORMAL;\r
+    hdma_usart6_tx.Init.Priority = DMA_PRIORITY_LOW;\r
+    hdma_usart6_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;\r
+    if (HAL_DMA_Init(&hdma_usart6_tx) != HAL_OK)\r
+    {\r
+      Error_Handler();\r
+    }\r
+\r
+    __HAL_LINKDMA(uartHandle,hdmatx,hdma_usart6_tx);\r
+\r
+    /* USART6_RX Init */\r
+    hdma_usart6_rx.Instance = DMA2_Stream1;\r
+    hdma_usart6_rx.Init.Channel = DMA_CHANNEL_5;\r
+    hdma_usart6_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;\r
+    hdma_usart6_rx.Init.PeriphInc = DMA_PINC_DISABLE;\r
+    hdma_usart6_rx.Init.MemInc = DMA_MINC_ENABLE;\r
+    hdma_usart6_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;\r
+    hdma_usart6_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;\r
+    hdma_usart6_rx.Init.Mode = DMA_NORMAL;\r
+    hdma_usart6_rx.Init.Priority = DMA_PRIORITY_LOW;\r
+    hdma_usart6_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;\r
+    if (HAL_DMA_Init(&hdma_usart6_rx) != HAL_OK)\r
+    {\r
+      Error_Handler();\r
+    }\r
+\r
+    __HAL_LINKDMA(uartHandle,hdmarx,hdma_usart6_rx);\r
+\r
   /* USER CODE BEGIN USART6_MspInit 1 */\r
 \r
   /* USER CODE END USART6_MspInit 1 */\r
@@ -95,6 +134,10 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle)
     */\r
     HAL_GPIO_DeInit(GPIOC, GPIO_PIN_6|GPIO_PIN_7);\r
 \r
+    /* USART6 DMA DeInit */\r
+    HAL_DMA_DeInit(uartHandle->hdmatx);\r
+    HAL_DMA_DeInit(uartHandle->hdmarx);\r
+\r
     /* USART6 interrupt Deinit */\r
     HAL_NVIC_DisableIRQ(USART6_IRQn);\r
   /* USER CODE BEGIN USART6_MspDeInit 1 */\r
index 9b04d16fef71add4d2419f79d1f69989cf89ade7..1568395dd937a4e549bca95377c1a5a008d2859b 100644 (file)
@@ -1,18 +1,42 @@
 #MicroXplorer Configuration settings - do not modify
+Dma.Request0=USART6_TX
+Dma.Request1=USART6_RX
+Dma.RequestsNb=2
+Dma.USART6_RX.1.Direction=DMA_PERIPH_TO_MEMORY
+Dma.USART6_RX.1.FIFOMode=DMA_FIFOMODE_DISABLE
+Dma.USART6_RX.1.Instance=DMA2_Stream1
+Dma.USART6_RX.1.MemDataAlignment=DMA_MDATAALIGN_BYTE
+Dma.USART6_RX.1.MemInc=DMA_MINC_ENABLE
+Dma.USART6_RX.1.Mode=DMA_NORMAL
+Dma.USART6_RX.1.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
+Dma.USART6_RX.1.PeriphInc=DMA_PINC_DISABLE
+Dma.USART6_RX.1.Priority=DMA_PRIORITY_LOW
+Dma.USART6_RX.1.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
+Dma.USART6_TX.0.Direction=DMA_MEMORY_TO_PERIPH
+Dma.USART6_TX.0.FIFOMode=DMA_FIFOMODE_DISABLE
+Dma.USART6_TX.0.Instance=DMA2_Stream6
+Dma.USART6_TX.0.MemDataAlignment=DMA_MDATAALIGN_BYTE
+Dma.USART6_TX.0.MemInc=DMA_MINC_ENABLE
+Dma.USART6_TX.0.Mode=DMA_NORMAL
+Dma.USART6_TX.0.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
+Dma.USART6_TX.0.PeriphInc=DMA_PINC_DISABLE
+Dma.USART6_TX.0.Priority=DMA_PRIORITY_LOW
+Dma.USART6_TX.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
 File.Version=6
 KeepUserPlacement=false
 Mcu.Family=STM32F7
 Mcu.IP0=CORTEX_M7
-Mcu.IP1=NVIC
-Mcu.IP2=RCC
-Mcu.IP3=SYS
-Mcu.IP4=TIM2
-Mcu.IP5=TIM3
-Mcu.IP6=TIM4
-Mcu.IP7=TIM5
-Mcu.IP8=TIM6
-Mcu.IP9=USART6
-Mcu.IPNb=10
+Mcu.IP1=DMA
+Mcu.IP10=USART6
+Mcu.IP2=NVIC
+Mcu.IP3=RCC
+Mcu.IP4=SYS
+Mcu.IP5=TIM2
+Mcu.IP6=TIM3
+Mcu.IP7=TIM4
+Mcu.IP8=TIM5
+Mcu.IP9=TIM6
+Mcu.IPNb=11
 Mcu.Name=STM32F767ZITx
 Mcu.Package=LQFP144
 Mcu.Pin0=PC13
@@ -45,6 +69,8 @@ Mcu.UserName=STM32F767ZITx
 MxCube.Version=5.5.0
 MxDb.Version=DB.5.0.50
 NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
+NVIC.DMA2_Stream1_IRQn=true\:0\:0\:false\:false\:true\:false\:true
+NVIC.DMA2_Stream6_IRQn=true\:0\:0\:false\:false\:true\:false\:true
 NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false
 NVIC.EXTI15_10_IRQn=true\:0\:0\:false\:false\:true\:true\:true
 NVIC.ForceEnableDMAVector=true