--- /dev/null
+
+rosserial_test.elf: file format elf32-littlearm
+
+Sections:
+Idx Name Size VMA LMA File off Algn
+ 0 .isr_vector 000001f8 08000000 08000000 00010000 2**0
+ CONTENTS, ALLOC, LOAD, READONLY, DATA
+ 1 .text 00005be0 080001f8 080001f8 000101f8 2**2
+ CONTENTS, ALLOC, LOAD, READONLY, CODE
+ 2 .rodata 00000250 08005dd8 08005dd8 00015dd8 2**2
+ CONTENTS, ALLOC, LOAD, READONLY, DATA
+ 3 .ARM.extab 00000000 08006028 08006028 00020074 2**0
+ CONTENTS
+ 4 .ARM 00000008 08006028 08006028 00016028 2**2
+ CONTENTS, ALLOC, LOAD, READONLY, DATA
+ 5 .preinit_array 00000000 08006030 08006030 00020074 2**0
+ CONTENTS, ALLOC, LOAD, DATA
+ 6 .init_array 00000004 08006030 08006030 00016030 2**2
+ CONTENTS, ALLOC, LOAD, DATA
+ 7 .fini_array 00000004 08006034 08006034 00016034 2**2
+ CONTENTS, ALLOC, LOAD, DATA
+ 8 .data 00000074 20000000 08006038 00020000 2**2
+ CONTENTS, ALLOC, LOAD, DATA
+ 9 .bss 000001b4 20000074 080060ac 00020074 2**2
+ ALLOC
+ 10 ._user_heap_stack 00000600 20000228 080060ac 00020228 2**0
+ ALLOC
+ 11 .ARM.attributes 0000002e 00000000 00000000 00020074 2**0
+ CONTENTS, READONLY
+ 12 .debug_info 00012bb3 00000000 00000000 000200a2 2**0
+ CONTENTS, READONLY, DEBUGGING
+ 13 .debug_abbrev 0000274a 00000000 00000000 00032c55 2**0
+ CONTENTS, READONLY, DEBUGGING
+ 14 .debug_aranges 00000f00 00000000 00000000 000353a0 2**3
+ CONTENTS, READONLY, DEBUGGING
+ 15 .debug_ranges 00000e10 00000000 00000000 000362a0 2**3
+ CONTENTS, READONLY, DEBUGGING
+ 16 .debug_macro 0002b2b6 00000000 00000000 000370b0 2**0
+ CONTENTS, READONLY, DEBUGGING
+ 17 .debug_line 0000b13d 00000000 00000000 00062366 2**0
+ CONTENTS, READONLY, DEBUGGING
+ 18 .debug_str 000fa8c5 00000000 00000000 0006d4a3 2**0
+ CONTENTS, READONLY, DEBUGGING
+ 19 .comment 0000007b 00000000 00000000 00167d68 2**0
+ CONTENTS, READONLY
+ 20 .debug_frame 00004344 00000000 00000000 00167de4 2**2
+ CONTENTS, READONLY, DEBUGGING
+
+Disassembly of section .text:
+
+080001f8 <__do_global_dtors_aux>:
+ 80001f8: b510 push {r4, lr}
+ 80001fa: 4c05 ldr r4, [pc, #20] ; (8000210 <__do_global_dtors_aux+0x18>)
+ 80001fc: 7823 ldrb r3, [r4, #0]
+ 80001fe: b933 cbnz r3, 800020e <__do_global_dtors_aux+0x16>
+ 8000200: 4b04 ldr r3, [pc, #16] ; (8000214 <__do_global_dtors_aux+0x1c>)
+ 8000202: b113 cbz r3, 800020a <__do_global_dtors_aux+0x12>
+ 8000204: 4804 ldr r0, [pc, #16] ; (8000218 <__do_global_dtors_aux+0x20>)
+ 8000206: f3af 8000 nop.w
+ 800020a: 2301 movs r3, #1
+ 800020c: 7023 strb r3, [r4, #0]
+ 800020e: bd10 pop {r4, pc}
+ 8000210: 20000074 .word 0x20000074
+ 8000214: 00000000 .word 0x00000000
+ 8000218: 08005dc0 .word 0x08005dc0
+
+0800021c <frame_dummy>:
+ 800021c: b508 push {r3, lr}
+ 800021e: 4b03 ldr r3, [pc, #12] ; (800022c <frame_dummy+0x10>)
+ 8000220: b11b cbz r3, 800022a <frame_dummy+0xe>
+ 8000222: 4903 ldr r1, [pc, #12] ; (8000230 <frame_dummy+0x14>)
+ 8000224: 4803 ldr r0, [pc, #12] ; (8000234 <frame_dummy+0x18>)
+ 8000226: f3af 8000 nop.w
+ 800022a: bd08 pop {r3, pc}
+ 800022c: 00000000 .word 0x00000000
+ 8000230: 20000078 .word 0x20000078
+ 8000234: 08005dc0 .word 0x08005dc0
+
+08000238 <strlen>:
+ 8000238: 4603 mov r3, r0
+ 800023a: f813 2b01 ldrb.w r2, [r3], #1
+ 800023e: 2a00 cmp r2, #0
+ 8000240: d1fb bne.n 800023a <strlen+0x2>
+ 8000242: 1a18 subs r0, r3, r0
+ 8000244: 3801 subs r0, #1
+ 8000246: 4770 bx lr
+
+08000248 <__aeabi_uldivmod>:
+ 8000248: b953 cbnz r3, 8000260 <__aeabi_uldivmod+0x18>
+ 800024a: b94a cbnz r2, 8000260 <__aeabi_uldivmod+0x18>
+ 800024c: 2900 cmp r1, #0
+ 800024e: bf08 it eq
+ 8000250: 2800 cmpeq r0, #0
+ 8000252: bf1c itt ne
+ 8000254: f04f 31ff movne.w r1, #4294967295 ; 0xffffffff
+ 8000258: f04f 30ff movne.w r0, #4294967295 ; 0xffffffff
+ 800025c: f000 b972 b.w 8000544 <__aeabi_idiv0>
+ 8000260: f1ad 0c08 sub.w ip, sp, #8
+ 8000264: e96d ce04 strd ip, lr, [sp, #-16]!
+ 8000268: f000 f806 bl 8000278 <__udivmoddi4>
+ 800026c: f8dd e004 ldr.w lr, [sp, #4]
+ 8000270: e9dd 2302 ldrd r2, r3, [sp, #8]
+ 8000274: b004 add sp, #16
+ 8000276: 4770 bx lr
+
+08000278 <__udivmoddi4>:
+ 8000278: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
+ 800027c: 9e08 ldr r6, [sp, #32]
+ 800027e: 4604 mov r4, r0
+ 8000280: 4688 mov r8, r1
+ 8000282: 2b00 cmp r3, #0
+ 8000284: d14b bne.n 800031e <__udivmoddi4+0xa6>
+ 8000286: 428a cmp r2, r1
+ 8000288: 4615 mov r5, r2
+ 800028a: d967 bls.n 800035c <__udivmoddi4+0xe4>
+ 800028c: fab2 f282 clz r2, r2
+ 8000290: b14a cbz r2, 80002a6 <__udivmoddi4+0x2e>
+ 8000292: f1c2 0720 rsb r7, r2, #32
+ 8000296: fa01 f302 lsl.w r3, r1, r2
+ 800029a: fa20 f707 lsr.w r7, r0, r7
+ 800029e: 4095 lsls r5, r2
+ 80002a0: ea47 0803 orr.w r8, r7, r3
+ 80002a4: 4094 lsls r4, r2
+ 80002a6: ea4f 4e15 mov.w lr, r5, lsr #16
+ 80002aa: 0c23 lsrs r3, r4, #16
+ 80002ac: fbb8 f7fe udiv r7, r8, lr
+ 80002b0: fa1f fc85 uxth.w ip, r5
+ 80002b4: fb0e 8817 mls r8, lr, r7, r8
+ 80002b8: ea43 4308 orr.w r3, r3, r8, lsl #16
+ 80002bc: fb07 f10c mul.w r1, r7, ip
+ 80002c0: 4299 cmp r1, r3
+ 80002c2: d909 bls.n 80002d8 <__udivmoddi4+0x60>
+ 80002c4: 18eb adds r3, r5, r3
+ 80002c6: f107 30ff add.w r0, r7, #4294967295 ; 0xffffffff
+ 80002ca: f080 811b bcs.w 8000504 <__udivmoddi4+0x28c>
+ 80002ce: 4299 cmp r1, r3
+ 80002d0: f240 8118 bls.w 8000504 <__udivmoddi4+0x28c>
+ 80002d4: 3f02 subs r7, #2
+ 80002d6: 442b add r3, r5
+ 80002d8: 1a5b subs r3, r3, r1
+ 80002da: b2a4 uxth r4, r4
+ 80002dc: fbb3 f0fe udiv r0, r3, lr
+ 80002e0: fb0e 3310 mls r3, lr, r0, r3
+ 80002e4: ea44 4403 orr.w r4, r4, r3, lsl #16
+ 80002e8: fb00 fc0c mul.w ip, r0, ip
+ 80002ec: 45a4 cmp ip, r4
+ 80002ee: d909 bls.n 8000304 <__udivmoddi4+0x8c>
+ 80002f0: 192c adds r4, r5, r4
+ 80002f2: f100 33ff add.w r3, r0, #4294967295 ; 0xffffffff
+ 80002f6: f080 8107 bcs.w 8000508 <__udivmoddi4+0x290>
+ 80002fa: 45a4 cmp ip, r4
+ 80002fc: f240 8104 bls.w 8000508 <__udivmoddi4+0x290>
+ 8000300: 3802 subs r0, #2
+ 8000302: 442c add r4, r5
+ 8000304: ea40 4007 orr.w r0, r0, r7, lsl #16
+ 8000308: eba4 040c sub.w r4, r4, ip
+ 800030c: 2700 movs r7, #0
+ 800030e: b11e cbz r6, 8000318 <__udivmoddi4+0xa0>
+ 8000310: 40d4 lsrs r4, r2
+ 8000312: 2300 movs r3, #0
+ 8000314: e9c6 4300 strd r4, r3, [r6]
+ 8000318: 4639 mov r1, r7
+ 800031a: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
+ 800031e: 428b cmp r3, r1
+ 8000320: d909 bls.n 8000336 <__udivmoddi4+0xbe>
+ 8000322: 2e00 cmp r6, #0
+ 8000324: f000 80eb beq.w 80004fe <__udivmoddi4+0x286>
+ 8000328: 2700 movs r7, #0
+ 800032a: e9c6 0100 strd r0, r1, [r6]
+ 800032e: 4638 mov r0, r7
+ 8000330: 4639 mov r1, r7
+ 8000332: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
+ 8000336: fab3 f783 clz r7, r3
+ 800033a: 2f00 cmp r7, #0
+ 800033c: d147 bne.n 80003ce <__udivmoddi4+0x156>
+ 800033e: 428b cmp r3, r1
+ 8000340: d302 bcc.n 8000348 <__udivmoddi4+0xd0>
+ 8000342: 4282 cmp r2, r0
+ 8000344: f200 80fa bhi.w 800053c <__udivmoddi4+0x2c4>
+ 8000348: 1a84 subs r4, r0, r2
+ 800034a: eb61 0303 sbc.w r3, r1, r3
+ 800034e: 2001 movs r0, #1
+ 8000350: 4698 mov r8, r3
+ 8000352: 2e00 cmp r6, #0
+ 8000354: d0e0 beq.n 8000318 <__udivmoddi4+0xa0>
+ 8000356: e9c6 4800 strd r4, r8, [r6]
+ 800035a: e7dd b.n 8000318 <__udivmoddi4+0xa0>
+ 800035c: b902 cbnz r2, 8000360 <__udivmoddi4+0xe8>
+ 800035e: deff udf #255 ; 0xff
+ 8000360: fab2 f282 clz r2, r2
+ 8000364: 2a00 cmp r2, #0
+ 8000366: f040 808f bne.w 8000488 <__udivmoddi4+0x210>
+ 800036a: 1b49 subs r1, r1, r5
+ 800036c: ea4f 4e15 mov.w lr, r5, lsr #16
+ 8000370: fa1f f885 uxth.w r8, r5
+ 8000374: 2701 movs r7, #1
+ 8000376: fbb1 fcfe udiv ip, r1, lr
+ 800037a: 0c23 lsrs r3, r4, #16
+ 800037c: fb0e 111c mls r1, lr, ip, r1
+ 8000380: ea43 4301 orr.w r3, r3, r1, lsl #16
+ 8000384: fb08 f10c mul.w r1, r8, ip
+ 8000388: 4299 cmp r1, r3
+ 800038a: d907 bls.n 800039c <__udivmoddi4+0x124>
+ 800038c: 18eb adds r3, r5, r3
+ 800038e: f10c 30ff add.w r0, ip, #4294967295 ; 0xffffffff
+ 8000392: d202 bcs.n 800039a <__udivmoddi4+0x122>
+ 8000394: 4299 cmp r1, r3
+ 8000396: f200 80cd bhi.w 8000534 <__udivmoddi4+0x2bc>
+ 800039a: 4684 mov ip, r0
+ 800039c: 1a59 subs r1, r3, r1
+ 800039e: b2a3 uxth r3, r4
+ 80003a0: fbb1 f0fe udiv r0, r1, lr
+ 80003a4: fb0e 1410 mls r4, lr, r0, r1
+ 80003a8: ea43 4404 orr.w r4, r3, r4, lsl #16
+ 80003ac: fb08 f800 mul.w r8, r8, r0
+ 80003b0: 45a0 cmp r8, r4
+ 80003b2: d907 bls.n 80003c4 <__udivmoddi4+0x14c>
+ 80003b4: 192c adds r4, r5, r4
+ 80003b6: f100 33ff add.w r3, r0, #4294967295 ; 0xffffffff
+ 80003ba: d202 bcs.n 80003c2 <__udivmoddi4+0x14a>
+ 80003bc: 45a0 cmp r8, r4
+ 80003be: f200 80b6 bhi.w 800052e <__udivmoddi4+0x2b6>
+ 80003c2: 4618 mov r0, r3
+ 80003c4: eba4 0408 sub.w r4, r4, r8
+ 80003c8: ea40 400c orr.w r0, r0, ip, lsl #16
+ 80003cc: e79f b.n 800030e <__udivmoddi4+0x96>
+ 80003ce: f1c7 0c20 rsb ip, r7, #32
+ 80003d2: 40bb lsls r3, r7
+ 80003d4: fa22 fe0c lsr.w lr, r2, ip
+ 80003d8: ea4e 0e03 orr.w lr, lr, r3
+ 80003dc: fa01 f407 lsl.w r4, r1, r7
+ 80003e0: fa20 f50c lsr.w r5, r0, ip
+ 80003e4: fa21 f30c lsr.w r3, r1, ip
+ 80003e8: ea4f 481e mov.w r8, lr, lsr #16
+ 80003ec: 4325 orrs r5, r4
+ 80003ee: fbb3 f9f8 udiv r9, r3, r8
+ 80003f2: 0c2c lsrs r4, r5, #16
+ 80003f4: fb08 3319 mls r3, r8, r9, r3
+ 80003f8: fa1f fa8e uxth.w sl, lr
+ 80003fc: ea44 4303 orr.w r3, r4, r3, lsl #16
+ 8000400: fb09 f40a mul.w r4, r9, sl
+ 8000404: 429c cmp r4, r3
+ 8000406: fa02 f207 lsl.w r2, r2, r7
+ 800040a: fa00 f107 lsl.w r1, r0, r7
+ 800040e: d90b bls.n 8000428 <__udivmoddi4+0x1b0>
+ 8000410: eb1e 0303 adds.w r3, lr, r3
+ 8000414: f109 30ff add.w r0, r9, #4294967295 ; 0xffffffff
+ 8000418: f080 8087 bcs.w 800052a <__udivmoddi4+0x2b2>
+ 800041c: 429c cmp r4, r3
+ 800041e: f240 8084 bls.w 800052a <__udivmoddi4+0x2b2>
+ 8000422: f1a9 0902 sub.w r9, r9, #2
+ 8000426: 4473 add r3, lr
+ 8000428: 1b1b subs r3, r3, r4
+ 800042a: b2ad uxth r5, r5
+ 800042c: fbb3 f0f8 udiv r0, r3, r8
+ 8000430: fb08 3310 mls r3, r8, r0, r3
+ 8000434: ea45 4403 orr.w r4, r5, r3, lsl #16
+ 8000438: fb00 fa0a mul.w sl, r0, sl
+ 800043c: 45a2 cmp sl, r4
+ 800043e: d908 bls.n 8000452 <__udivmoddi4+0x1da>
+ 8000440: eb1e 0404 adds.w r4, lr, r4
+ 8000444: f100 33ff add.w r3, r0, #4294967295 ; 0xffffffff
+ 8000448: d26b bcs.n 8000522 <__udivmoddi4+0x2aa>
+ 800044a: 45a2 cmp sl, r4
+ 800044c: d969 bls.n 8000522 <__udivmoddi4+0x2aa>
+ 800044e: 3802 subs r0, #2
+ 8000450: 4474 add r4, lr
+ 8000452: ea40 4009 orr.w r0, r0, r9, lsl #16
+ 8000456: fba0 8902 umull r8, r9, r0, r2
+ 800045a: eba4 040a sub.w r4, r4, sl
+ 800045e: 454c cmp r4, r9
+ 8000460: 46c2 mov sl, r8
+ 8000462: 464b mov r3, r9
+ 8000464: d354 bcc.n 8000510 <__udivmoddi4+0x298>
+ 8000466: d051 beq.n 800050c <__udivmoddi4+0x294>
+ 8000468: 2e00 cmp r6, #0
+ 800046a: d069 beq.n 8000540 <__udivmoddi4+0x2c8>
+ 800046c: ebb1 050a subs.w r5, r1, sl
+ 8000470: eb64 0403 sbc.w r4, r4, r3
+ 8000474: fa04 fc0c lsl.w ip, r4, ip
+ 8000478: 40fd lsrs r5, r7
+ 800047a: 40fc lsrs r4, r7
+ 800047c: ea4c 0505 orr.w r5, ip, r5
+ 8000480: e9c6 5400 strd r5, r4, [r6]
+ 8000484: 2700 movs r7, #0
+ 8000486: e747 b.n 8000318 <__udivmoddi4+0xa0>
+ 8000488: f1c2 0320 rsb r3, r2, #32
+ 800048c: fa20 f703 lsr.w r7, r0, r3
+ 8000490: 4095 lsls r5, r2
+ 8000492: fa01 f002 lsl.w r0, r1, r2
+ 8000496: fa21 f303 lsr.w r3, r1, r3
+ 800049a: ea4f 4e15 mov.w lr, r5, lsr #16
+ 800049e: 4338 orrs r0, r7
+ 80004a0: 0c01 lsrs r1, r0, #16
+ 80004a2: fbb3 f7fe udiv r7, r3, lr
+ 80004a6: fa1f f885 uxth.w r8, r5
+ 80004aa: fb0e 3317 mls r3, lr, r7, r3
+ 80004ae: ea41 4103 orr.w r1, r1, r3, lsl #16
+ 80004b2: fb07 f308 mul.w r3, r7, r8
+ 80004b6: 428b cmp r3, r1
+ 80004b8: fa04 f402 lsl.w r4, r4, r2
+ 80004bc: d907 bls.n 80004ce <__udivmoddi4+0x256>
+ 80004be: 1869 adds r1, r5, r1
+ 80004c0: f107 3cff add.w ip, r7, #4294967295 ; 0xffffffff
+ 80004c4: d22f bcs.n 8000526 <__udivmoddi4+0x2ae>
+ 80004c6: 428b cmp r3, r1
+ 80004c8: d92d bls.n 8000526 <__udivmoddi4+0x2ae>
+ 80004ca: 3f02 subs r7, #2
+ 80004cc: 4429 add r1, r5
+ 80004ce: 1acb subs r3, r1, r3
+ 80004d0: b281 uxth r1, r0
+ 80004d2: fbb3 f0fe udiv r0, r3, lr
+ 80004d6: fb0e 3310 mls r3, lr, r0, r3
+ 80004da: ea41 4103 orr.w r1, r1, r3, lsl #16
+ 80004de: fb00 f308 mul.w r3, r0, r8
+ 80004e2: 428b cmp r3, r1
+ 80004e4: d907 bls.n 80004f6 <__udivmoddi4+0x27e>
+ 80004e6: 1869 adds r1, r5, r1
+ 80004e8: f100 3cff add.w ip, r0, #4294967295 ; 0xffffffff
+ 80004ec: d217 bcs.n 800051e <__udivmoddi4+0x2a6>
+ 80004ee: 428b cmp r3, r1
+ 80004f0: d915 bls.n 800051e <__udivmoddi4+0x2a6>
+ 80004f2: 3802 subs r0, #2
+ 80004f4: 4429 add r1, r5
+ 80004f6: 1ac9 subs r1, r1, r3
+ 80004f8: ea40 4707 orr.w r7, r0, r7, lsl #16
+ 80004fc: e73b b.n 8000376 <__udivmoddi4+0xfe>
+ 80004fe: 4637 mov r7, r6
+ 8000500: 4630 mov r0, r6
+ 8000502: e709 b.n 8000318 <__udivmoddi4+0xa0>
+ 8000504: 4607 mov r7, r0
+ 8000506: e6e7 b.n 80002d8 <__udivmoddi4+0x60>
+ 8000508: 4618 mov r0, r3
+ 800050a: e6fb b.n 8000304 <__udivmoddi4+0x8c>
+ 800050c: 4541 cmp r1, r8
+ 800050e: d2ab bcs.n 8000468 <__udivmoddi4+0x1f0>
+ 8000510: ebb8 0a02 subs.w sl, r8, r2
+ 8000514: eb69 020e sbc.w r2, r9, lr
+ 8000518: 3801 subs r0, #1
+ 800051a: 4613 mov r3, r2
+ 800051c: e7a4 b.n 8000468 <__udivmoddi4+0x1f0>
+ 800051e: 4660 mov r0, ip
+ 8000520: e7e9 b.n 80004f6 <__udivmoddi4+0x27e>
+ 8000522: 4618 mov r0, r3
+ 8000524: e795 b.n 8000452 <__udivmoddi4+0x1da>
+ 8000526: 4667 mov r7, ip
+ 8000528: e7d1 b.n 80004ce <__udivmoddi4+0x256>
+ 800052a: 4681 mov r9, r0
+ 800052c: e77c b.n 8000428 <__udivmoddi4+0x1b0>
+ 800052e: 3802 subs r0, #2
+ 8000530: 442c add r4, r5
+ 8000532: e747 b.n 80003c4 <__udivmoddi4+0x14c>
+ 8000534: f1ac 0c02 sub.w ip, ip, #2
+ 8000538: 442b add r3, r5
+ 800053a: e72f b.n 800039c <__udivmoddi4+0x124>
+ 800053c: 4638 mov r0, r7
+ 800053e: e708 b.n 8000352 <__udivmoddi4+0xda>
+ 8000540: 4637 mov r7, r6
+ 8000542: e6e9 b.n 8000318 <__udivmoddi4+0xa0>
+
+08000544 <__aeabi_idiv0>:
+ 8000544: 4770 bx lr
+ 8000546: bf00 nop
+
+08000548 <HAL_Init>:
+ * need to ensure that the SysTick time base is always set to 1 millisecond
+ * to have correct HAL operation.
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_Init(void)
+{
+ 8000548: b580 push {r7, lr}
+ 800054a: af00 add r7, sp, #0
+#if (PREFETCH_ENABLE != 0U)
+ __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
+#endif /* PREFETCH_ENABLE */
+
+ /* Set Interrupt Group Priority */
+ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
+ 800054c: 2003 movs r0, #3
+ 800054e: f000 f94b bl 80007e8 <HAL_NVIC_SetPriorityGrouping>
+
+ /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
+ HAL_InitTick(TICK_INT_PRIORITY);
+ 8000552: 2000 movs r0, #0
+ 8000554: f000 f806 bl 8000564 <HAL_InitTick>
+
+ /* Init the low level hardware */
+ HAL_MspInit();
+ 8000558: f005 f8b8 bl 80056cc <HAL_MspInit>
+
+ /* Return function status */
+ return HAL_OK;
+ 800055c: 2300 movs r3, #0
+}
+ 800055e: 4618 mov r0, r3
+ 8000560: bd80 pop {r7, pc}
+ ...
+
+08000564 <HAL_InitTick>:
+ * implementation in user file.
+ * @param TickPriority Tick interrupt priority.
+ * @retval HAL status
+ */
+__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
+{
+ 8000564: b580 push {r7, lr}
+ 8000566: b082 sub sp, #8
+ 8000568: af00 add r7, sp, #0
+ 800056a: 6078 str r0, [r7, #4]
+ /* Configure the SysTick to have interrupt in 1ms time basis*/
+ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
+ 800056c: 4b12 ldr r3, [pc, #72] ; (80005b8 <HAL_InitTick+0x54>)
+ 800056e: 681a ldr r2, [r3, #0]
+ 8000570: 4b12 ldr r3, [pc, #72] ; (80005bc <HAL_InitTick+0x58>)
+ 8000572: 781b ldrb r3, [r3, #0]
+ 8000574: 4619 mov r1, r3
+ 8000576: f44f 737a mov.w r3, #1000 ; 0x3e8
+ 800057a: fbb3 f3f1 udiv r3, r3, r1
+ 800057e: fbb2 f3f3 udiv r3, r2, r3
+ 8000582: 4618 mov r0, r3
+ 8000584: f000 f965 bl 8000852 <HAL_SYSTICK_Config>
+ 8000588: 4603 mov r3, r0
+ 800058a: 2b00 cmp r3, #0
+ 800058c: d001 beq.n 8000592 <HAL_InitTick+0x2e>
+ {
+ return HAL_ERROR;
+ 800058e: 2301 movs r3, #1
+ 8000590: e00e b.n 80005b0 <HAL_InitTick+0x4c>
+ }
+
+ /* Configure the SysTick IRQ priority */
+ if (TickPriority < (1UL << __NVIC_PRIO_BITS))
+ 8000592: 687b ldr r3, [r7, #4]
+ 8000594: 2b0f cmp r3, #15
+ 8000596: d80a bhi.n 80005ae <HAL_InitTick+0x4a>
+ {
+ HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
+ 8000598: 2200 movs r2, #0
+ 800059a: 6879 ldr r1, [r7, #4]
+ 800059c: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
+ 80005a0: f000 f92d bl 80007fe <HAL_NVIC_SetPriority>
+ uwTickPrio = TickPriority;
+ 80005a4: 4a06 ldr r2, [pc, #24] ; (80005c0 <HAL_InitTick+0x5c>)
+ 80005a6: 687b ldr r3, [r7, #4]
+ 80005a8: 6013 str r3, [r2, #0]
+ {
+ return HAL_ERROR;
+ }
+
+ /* Return function status */
+ return HAL_OK;
+ 80005aa: 2300 movs r3, #0
+ 80005ac: e000 b.n 80005b0 <HAL_InitTick+0x4c>
+ return HAL_ERROR;
+ 80005ae: 2301 movs r3, #1
+}
+ 80005b0: 4618 mov r0, r3
+ 80005b2: 3708 adds r7, #8
+ 80005b4: 46bd mov sp, r7
+ 80005b6: bd80 pop {r7, pc}
+ 80005b8: 20000008 .word 0x20000008
+ 80005bc: 20000004 .word 0x20000004
+ 80005c0: 20000000 .word 0x20000000
+
+080005c4 <HAL_IncTick>:
+ * @note This function is declared as __weak to be overwritten in case of other
+ * implementations in user file.
+ * @retval None
+ */
+__weak void HAL_IncTick(void)
+{
+ 80005c4: b480 push {r7}
+ 80005c6: af00 add r7, sp, #0
+ uwTick += uwTickFreq;
+ 80005c8: 4b06 ldr r3, [pc, #24] ; (80005e4 <HAL_IncTick+0x20>)
+ 80005ca: 781b ldrb r3, [r3, #0]
+ 80005cc: 461a mov r2, r3
+ 80005ce: 4b06 ldr r3, [pc, #24] ; (80005e8 <HAL_IncTick+0x24>)
+ 80005d0: 681b ldr r3, [r3, #0]
+ 80005d2: 4413 add r3, r2
+ 80005d4: 4a04 ldr r2, [pc, #16] ; (80005e8 <HAL_IncTick+0x24>)
+ 80005d6: 6013 str r3, [r2, #0]
+}
+ 80005d8: bf00 nop
+ 80005da: 46bd mov sp, r7
+ 80005dc: f85d 7b04 ldr.w r7, [sp], #4
+ 80005e0: 4770 bx lr
+ 80005e2: bf00 nop
+ 80005e4: 20000004 .word 0x20000004
+ 80005e8: 20000220 .word 0x20000220
+
+080005ec <HAL_GetTick>:
+ * @note This function is declared as __weak to be overwritten in case of other
+ * implementations in user file.
+ * @retval tick value
+ */
+__weak uint32_t HAL_GetTick(void)
+{
+ 80005ec: b480 push {r7}
+ 80005ee: af00 add r7, sp, #0
+ return uwTick;
+ 80005f0: 4b03 ldr r3, [pc, #12] ; (8000600 <HAL_GetTick+0x14>)
+ 80005f2: 681b ldr r3, [r3, #0]
+}
+ 80005f4: 4618 mov r0, r3
+ 80005f6: 46bd mov sp, r7
+ 80005f8: f85d 7b04 ldr.w r7, [sp], #4
+ 80005fc: 4770 bx lr
+ 80005fe: bf00 nop
+ 8000600: 20000220 .word 0x20000220
+
+08000604 <HAL_Delay>:
+ * implementations in user file.
+ * @param Delay specifies the delay time length, in milliseconds.
+ * @retval None
+ */
+__weak void HAL_Delay(uint32_t Delay)
+{
+ 8000604: b580 push {r7, lr}
+ 8000606: b084 sub sp, #16
+ 8000608: af00 add r7, sp, #0
+ 800060a: 6078 str r0, [r7, #4]
+ uint32_t tickstart = HAL_GetTick();
+ 800060c: f7ff ffee bl 80005ec <HAL_GetTick>
+ 8000610: 60b8 str r0, [r7, #8]
+ uint32_t wait = Delay;
+ 8000612: 687b ldr r3, [r7, #4]
+ 8000614: 60fb str r3, [r7, #12]
+
+ /* Add a freq to guarantee minimum wait */
+ if (wait < HAL_MAX_DELAY)
+ 8000616: 68fb ldr r3, [r7, #12]
+ 8000618: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff
+ 800061c: d005 beq.n 800062a <HAL_Delay+0x26>
+ {
+ wait += (uint32_t)(uwTickFreq);
+ 800061e: 4b09 ldr r3, [pc, #36] ; (8000644 <HAL_Delay+0x40>)
+ 8000620: 781b ldrb r3, [r3, #0]
+ 8000622: 461a mov r2, r3
+ 8000624: 68fb ldr r3, [r7, #12]
+ 8000626: 4413 add r3, r2
+ 8000628: 60fb str r3, [r7, #12]
+ }
+
+ while ((HAL_GetTick() - tickstart) < wait)
+ 800062a: bf00 nop
+ 800062c: f7ff ffde bl 80005ec <HAL_GetTick>
+ 8000630: 4602 mov r2, r0
+ 8000632: 68bb ldr r3, [r7, #8]
+ 8000634: 1ad3 subs r3, r2, r3
+ 8000636: 68fa ldr r2, [r7, #12]
+ 8000638: 429a cmp r2, r3
+ 800063a: d8f7 bhi.n 800062c <HAL_Delay+0x28>
+ {
+ }
+}
+ 800063c: bf00 nop
+ 800063e: 3710 adds r7, #16
+ 8000640: 46bd mov sp, r7
+ 8000642: bd80 pop {r7, pc}
+ 8000644: 20000004 .word 0x20000004
+
+08000648 <__NVIC_SetPriorityGrouping>:
+ In case of a conflict between priority grouping and available
+ priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+ \param [in] PriorityGroup Priority grouping field.
+ */
+__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
+{
+ 8000648: b480 push {r7}
+ 800064a: b085 sub sp, #20
+ 800064c: af00 add r7, sp, #0
+ 800064e: 6078 str r0, [r7, #4]
+ uint32_t reg_value;
+ uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
+ 8000650: 687b ldr r3, [r7, #4]
+ 8000652: f003 0307 and.w r3, r3, #7
+ 8000656: 60fb str r3, [r7, #12]
+
+ reg_value = SCB->AIRCR; /* read old register configuration */
+ 8000658: 4b0b ldr r3, [pc, #44] ; (8000688 <__NVIC_SetPriorityGrouping+0x40>)
+ 800065a: 68db ldr r3, [r3, #12]
+ 800065c: 60bb str r3, [r7, #8]
+ reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
+ 800065e: 68ba ldr r2, [r7, #8]
+ 8000660: f64f 03ff movw r3, #63743 ; 0xf8ff
+ 8000664: 4013 ands r3, r2
+ 8000666: 60bb str r3, [r7, #8]
+ reg_value = (reg_value |
+ ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+ (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */
+ 8000668: 68fb ldr r3, [r7, #12]
+ 800066a: 021a lsls r2, r3, #8
+ ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+ 800066c: 68bb ldr r3, [r7, #8]
+ 800066e: 431a orrs r2, r3
+ reg_value = (reg_value |
+ 8000670: 4b06 ldr r3, [pc, #24] ; (800068c <__NVIC_SetPriorityGrouping+0x44>)
+ 8000672: 4313 orrs r3, r2
+ 8000674: 60bb str r3, [r7, #8]
+ SCB->AIRCR = reg_value;
+ 8000676: 4a04 ldr r2, [pc, #16] ; (8000688 <__NVIC_SetPriorityGrouping+0x40>)
+ 8000678: 68bb ldr r3, [r7, #8]
+ 800067a: 60d3 str r3, [r2, #12]
+}
+ 800067c: bf00 nop
+ 800067e: 3714 adds r7, #20
+ 8000680: 46bd mov sp, r7
+ 8000682: f85d 7b04 ldr.w r7, [sp], #4
+ 8000686: 4770 bx lr
+ 8000688: e000ed00 .word 0xe000ed00
+ 800068c: 05fa0000 .word 0x05fa0000
+
+08000690 <__NVIC_GetPriorityGrouping>:
+ \brief Get Priority Grouping
+ \details Reads the priority grouping field from the NVIC Interrupt Controller.
+ \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
+{
+ 8000690: b480 push {r7}
+ 8000692: af00 add r7, sp, #0
+ return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
+ 8000694: 4b04 ldr r3, [pc, #16] ; (80006a8 <__NVIC_GetPriorityGrouping+0x18>)
+ 8000696: 68db ldr r3, [r3, #12]
+ 8000698: 0a1b lsrs r3, r3, #8
+ 800069a: f003 0307 and.w r3, r3, #7
+}
+ 800069e: 4618 mov r0, r3
+ 80006a0: 46bd mov sp, r7
+ 80006a2: f85d 7b04 ldr.w r7, [sp], #4
+ 80006a6: 4770 bx lr
+ 80006a8: e000ed00 .word 0xe000ed00
+
+080006ac <__NVIC_EnableIRQ>:
+ \details Enables a device specific interrupt in the NVIC interrupt controller.
+ \param [in] IRQn Device specific interrupt number.
+ \note IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+ 80006ac: b480 push {r7}
+ 80006ae: b083 sub sp, #12
+ 80006b0: af00 add r7, sp, #0
+ 80006b2: 4603 mov r3, r0
+ 80006b4: 71fb strb r3, [r7, #7]
+ if ((int32_t)(IRQn) >= 0)
+ 80006b6: f997 3007 ldrsb.w r3, [r7, #7]
+ 80006ba: 2b00 cmp r3, #0
+ 80006bc: db0b blt.n 80006d6 <__NVIC_EnableIRQ+0x2a>
+ {
+ NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+ 80006be: 79fb ldrb r3, [r7, #7]
+ 80006c0: f003 021f and.w r2, r3, #31
+ 80006c4: 4907 ldr r1, [pc, #28] ; (80006e4 <__NVIC_EnableIRQ+0x38>)
+ 80006c6: f997 3007 ldrsb.w r3, [r7, #7]
+ 80006ca: 095b lsrs r3, r3, #5
+ 80006cc: 2001 movs r0, #1
+ 80006ce: fa00 f202 lsl.w r2, r0, r2
+ 80006d2: f841 2023 str.w r2, [r1, r3, lsl #2]
+ }
+}
+ 80006d6: bf00 nop
+ 80006d8: 370c adds r7, #12
+ 80006da: 46bd mov sp, r7
+ 80006dc: f85d 7b04 ldr.w r7, [sp], #4
+ 80006e0: 4770 bx lr
+ 80006e2: bf00 nop
+ 80006e4: e000e100 .word 0xe000e100
+
+080006e8 <__NVIC_SetPriority>:
+ \param [in] IRQn Interrupt number.
+ \param [in] priority Priority to set.
+ \note The priority cannot be set for every processor exception.
+ */
+__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+ 80006e8: b480 push {r7}
+ 80006ea: b083 sub sp, #12
+ 80006ec: af00 add r7, sp, #0
+ 80006ee: 4603 mov r3, r0
+ 80006f0: 6039 str r1, [r7, #0]
+ 80006f2: 71fb strb r3, [r7, #7]
+ if ((int32_t)(IRQn) >= 0)
+ 80006f4: f997 3007 ldrsb.w r3, [r7, #7]
+ 80006f8: 2b00 cmp r3, #0
+ 80006fa: db0a blt.n 8000712 <__NVIC_SetPriority+0x2a>
+ {
+ NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+ 80006fc: 683b ldr r3, [r7, #0]
+ 80006fe: b2da uxtb r2, r3
+ 8000700: 490c ldr r1, [pc, #48] ; (8000734 <__NVIC_SetPriority+0x4c>)
+ 8000702: f997 3007 ldrsb.w r3, [r7, #7]
+ 8000706: 0112 lsls r2, r2, #4
+ 8000708: b2d2 uxtb r2, r2
+ 800070a: 440b add r3, r1
+ 800070c: f883 2300 strb.w r2, [r3, #768] ; 0x300
+ }
+ else
+ {
+ SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+ }
+}
+ 8000710: e00a b.n 8000728 <__NVIC_SetPriority+0x40>
+ SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+ 8000712: 683b ldr r3, [r7, #0]
+ 8000714: b2da uxtb r2, r3
+ 8000716: 4908 ldr r1, [pc, #32] ; (8000738 <__NVIC_SetPriority+0x50>)
+ 8000718: 79fb ldrb r3, [r7, #7]
+ 800071a: f003 030f and.w r3, r3, #15
+ 800071e: 3b04 subs r3, #4
+ 8000720: 0112 lsls r2, r2, #4
+ 8000722: b2d2 uxtb r2, r2
+ 8000724: 440b add r3, r1
+ 8000726: 761a strb r2, [r3, #24]
+}
+ 8000728: bf00 nop
+ 800072a: 370c adds r7, #12
+ 800072c: 46bd mov sp, r7
+ 800072e: f85d 7b04 ldr.w r7, [sp], #4
+ 8000732: 4770 bx lr
+ 8000734: e000e100 .word 0xe000e100
+ 8000738: e000ed00 .word 0xe000ed00
+
+0800073c <NVIC_EncodePriority>:
+ \param [in] PreemptPriority Preemptive priority value (starting from 0).
+ \param [in] SubPriority Subpriority value (starting from 0).
+ \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
+ */
+__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
+{
+ 800073c: b480 push {r7}
+ 800073e: b089 sub sp, #36 ; 0x24
+ 8000740: af00 add r7, sp, #0
+ 8000742: 60f8 str r0, [r7, #12]
+ 8000744: 60b9 str r1, [r7, #8]
+ 8000746: 607a str r2, [r7, #4]
+ uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
+ 8000748: 68fb ldr r3, [r7, #12]
+ 800074a: f003 0307 and.w r3, r3, #7
+ 800074e: 61fb str r3, [r7, #28]
+ uint32_t PreemptPriorityBits;
+ uint32_t SubPriorityBits;
+
+ PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+ 8000750: 69fb ldr r3, [r7, #28]
+ 8000752: f1c3 0307 rsb r3, r3, #7
+ 8000756: 2b04 cmp r3, #4
+ 8000758: bf28 it cs
+ 800075a: 2304 movcs r3, #4
+ 800075c: 61bb str r3, [r7, #24]
+ SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+ 800075e: 69fb ldr r3, [r7, #28]
+ 8000760: 3304 adds r3, #4
+ 8000762: 2b06 cmp r3, #6
+ 8000764: d902 bls.n 800076c <NVIC_EncodePriority+0x30>
+ 8000766: 69fb ldr r3, [r7, #28]
+ 8000768: 3b03 subs r3, #3
+ 800076a: e000 b.n 800076e <NVIC_EncodePriority+0x32>
+ 800076c: 2300 movs r3, #0
+ 800076e: 617b str r3, [r7, #20]
+
+ return (
+ ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
+ 8000770: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff
+ 8000774: 69bb ldr r3, [r7, #24]
+ 8000776: fa02 f303 lsl.w r3, r2, r3
+ 800077a: 43da mvns r2, r3
+ 800077c: 68bb ldr r3, [r7, #8]
+ 800077e: 401a ands r2, r3
+ 8000780: 697b ldr r3, [r7, #20]
+ 8000782: 409a lsls r2, r3
+ ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
+ 8000784: f04f 31ff mov.w r1, #4294967295 ; 0xffffffff
+ 8000788: 697b ldr r3, [r7, #20]
+ 800078a: fa01 f303 lsl.w r3, r1, r3
+ 800078e: 43d9 mvns r1, r3
+ 8000790: 687b ldr r3, [r7, #4]
+ 8000792: 400b ands r3, r1
+ ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
+ 8000794: 4313 orrs r3, r2
+ );
+}
+ 8000796: 4618 mov r0, r3
+ 8000798: 3724 adds r7, #36 ; 0x24
+ 800079a: 46bd mov sp, r7
+ 800079c: f85d 7b04 ldr.w r7, [sp], #4
+ 80007a0: 4770 bx lr
+ ...
+
+080007a4 <SysTick_Config>:
+ \note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
+ function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
+ must contain a vendor-specific implementation of this function.
+ */
+__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
+{
+ 80007a4: b580 push {r7, lr}
+ 80007a6: b082 sub sp, #8
+ 80007a8: af00 add r7, sp, #0
+ 80007aa: 6078 str r0, [r7, #4]
+ if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+ 80007ac: 687b ldr r3, [r7, #4]
+ 80007ae: 3b01 subs r3, #1
+ 80007b0: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000
+ 80007b4: d301 bcc.n 80007ba <SysTick_Config+0x16>
+ {
+ return (1UL); /* Reload value impossible */
+ 80007b6: 2301 movs r3, #1
+ 80007b8: e00f b.n 80007da <SysTick_Config+0x36>
+ }
+
+ SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
+ 80007ba: 4a0a ldr r2, [pc, #40] ; (80007e4 <SysTick_Config+0x40>)
+ 80007bc: 687b ldr r3, [r7, #4]
+ 80007be: 3b01 subs r3, #1
+ 80007c0: 6053 str r3, [r2, #4]
+ NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+ 80007c2: 210f movs r1, #15
+ 80007c4: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
+ 80007c8: f7ff ff8e bl 80006e8 <__NVIC_SetPriority>
+ SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
+ 80007cc: 4b05 ldr r3, [pc, #20] ; (80007e4 <SysTick_Config+0x40>)
+ 80007ce: 2200 movs r2, #0
+ 80007d0: 609a str r2, [r3, #8]
+ SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
+ 80007d2: 4b04 ldr r3, [pc, #16] ; (80007e4 <SysTick_Config+0x40>)
+ 80007d4: 2207 movs r2, #7
+ 80007d6: 601a str r2, [r3, #0]
+ SysTick_CTRL_TICKINT_Msk |
+ SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
+ return (0UL); /* Function successful */
+ 80007d8: 2300 movs r3, #0
+}
+ 80007da: 4618 mov r0, r3
+ 80007dc: 3708 adds r7, #8
+ 80007de: 46bd mov sp, r7
+ 80007e0: bd80 pop {r7, pc}
+ 80007e2: bf00 nop
+ 80007e4: e000e010 .word 0xe000e010
+
+080007e8 <HAL_NVIC_SetPriorityGrouping>:
+ * @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible.
+ * The pending IRQ priority will be managed only by the subpriority.
+ * @retval None
+ */
+void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
+{
+ 80007e8: b580 push {r7, lr}
+ 80007ea: b082 sub sp, #8
+ 80007ec: af00 add r7, sp, #0
+ 80007ee: 6078 str r0, [r7, #4]
+ /* Check the parameters */
+ assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
+
+ /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
+ NVIC_SetPriorityGrouping(PriorityGroup);
+ 80007f0: 6878 ldr r0, [r7, #4]
+ 80007f2: f7ff ff29 bl 8000648 <__NVIC_SetPriorityGrouping>
+}
+ 80007f6: bf00 nop
+ 80007f8: 3708 adds r7, #8
+ 80007fa: 46bd mov sp, r7
+ 80007fc: bd80 pop {r7, pc}
+
+080007fe <HAL_NVIC_SetPriority>:
+ * This parameter can be a value between 0 and 15
+ * A lower priority value indicates a higher priority.
+ * @retval None
+ */
+void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
+{
+ 80007fe: b580 push {r7, lr}
+ 8000800: b086 sub sp, #24
+ 8000802: af00 add r7, sp, #0
+ 8000804: 4603 mov r3, r0
+ 8000806: 60b9 str r1, [r7, #8]
+ 8000808: 607a str r2, [r7, #4]
+ 800080a: 73fb strb r3, [r7, #15]
+ uint32_t prioritygroup = 0x00;
+ 800080c: 2300 movs r3, #0
+ 800080e: 617b str r3, [r7, #20]
+
+ /* Check the parameters */
+ assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
+ assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
+
+ prioritygroup = NVIC_GetPriorityGrouping();
+ 8000810: f7ff ff3e bl 8000690 <__NVIC_GetPriorityGrouping>
+ 8000814: 6178 str r0, [r7, #20]
+
+ NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
+ 8000816: 687a ldr r2, [r7, #4]
+ 8000818: 68b9 ldr r1, [r7, #8]
+ 800081a: 6978 ldr r0, [r7, #20]
+ 800081c: f7ff ff8e bl 800073c <NVIC_EncodePriority>
+ 8000820: 4602 mov r2, r0
+ 8000822: f997 300f ldrsb.w r3, [r7, #15]
+ 8000826: 4611 mov r1, r2
+ 8000828: 4618 mov r0, r3
+ 800082a: f7ff ff5d bl 80006e8 <__NVIC_SetPriority>
+}
+ 800082e: bf00 nop
+ 8000830: 3718 adds r7, #24
+ 8000832: 46bd mov sp, r7
+ 8000834: bd80 pop {r7, pc}
+
+08000836 <HAL_NVIC_EnableIRQ>:
+ * This parameter can be an enumerator of IRQn_Type enumeration
+ * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f7xxxx.h))
+ * @retval None
+ */
+void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+ 8000836: b580 push {r7, lr}
+ 8000838: b082 sub sp, #8
+ 800083a: af00 add r7, sp, #0
+ 800083c: 4603 mov r3, r0
+ 800083e: 71fb strb r3, [r7, #7]
+ /* Check the parameters */
+ assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
+
+ /* Enable interrupt */
+ NVIC_EnableIRQ(IRQn);
+ 8000840: f997 3007 ldrsb.w r3, [r7, #7]
+ 8000844: 4618 mov r0, r3
+ 8000846: f7ff ff31 bl 80006ac <__NVIC_EnableIRQ>
+}
+ 800084a: bf00 nop
+ 800084c: 3708 adds r7, #8
+ 800084e: 46bd mov sp, r7
+ 8000850: bd80 pop {r7, pc}
+
+08000852 <HAL_SYSTICK_Config>:
+ * @param TicksNumb Specifies the ticks Number of ticks between two interrupts.
+ * @retval status: - 0 Function succeeded.
+ * - 1 Function failed.
+ */
+uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
+{
+ 8000852: b580 push {r7, lr}
+ 8000854: b082 sub sp, #8
+ 8000856: af00 add r7, sp, #0
+ 8000858: 6078 str r0, [r7, #4]
+ return SysTick_Config(TicksNumb);
+ 800085a: 6878 ldr r0, [r7, #4]
+ 800085c: f7ff ffa2 bl 80007a4 <SysTick_Config>
+ 8000860: 4603 mov r3, r0
+}
+ 8000862: 4618 mov r0, r3
+ 8000864: 3708 adds r7, #8
+ 8000866: 46bd mov sp, r7
+ 8000868: bd80 pop {r7, pc}
+ ...
+
+0800086c <HAL_DMA_Init>:
+ * @param hdma Pointer to a DMA_HandleTypeDef structure that contains
+ * the configuration information for the specified DMA Stream.
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
+{
+ 800086c: b580 push {r7, lr}
+ 800086e: b086 sub sp, #24
+ 8000870: af00 add r7, sp, #0
+ 8000872: 6078 str r0, [r7, #4]
+ uint32_t tmp = 0U;
+ 8000874: 2300 movs r3, #0
+ 8000876: 617b str r3, [r7, #20]
+ uint32_t tickstart = HAL_GetTick();
+ 8000878: f7ff feb8 bl 80005ec <HAL_GetTick>
+ 800087c: 6138 str r0, [r7, #16]
+ DMA_Base_Registers *regs;
+
+ /* Check the DMA peripheral state */
+ if(hdma == NULL)
+ 800087e: 687b ldr r3, [r7, #4]
+ 8000880: 2b00 cmp r3, #0
+ 8000882: d101 bne.n 8000888 <HAL_DMA_Init+0x1c>
+ {
+ return HAL_ERROR;
+ 8000884: 2301 movs r3, #1
+ 8000886: e099 b.n 80009bc <HAL_DMA_Init+0x150>
+ assert_param(IS_DMA_MEMORY_BURST(hdma->Init.MemBurst));
+ assert_param(IS_DMA_PERIPHERAL_BURST(hdma->Init.PeriphBurst));
+ }
+
+ /* Allocate lock resource */
+ __HAL_UNLOCK(hdma);
+ 8000888: 687b ldr r3, [r7, #4]
+ 800088a: 2200 movs r2, #0
+ 800088c: f883 2034 strb.w r2, [r3, #52] ; 0x34
+
+ /* Change DMA peripheral state */
+ hdma->State = HAL_DMA_STATE_BUSY;
+ 8000890: 687b ldr r3, [r7, #4]
+ 8000892: 2202 movs r2, #2
+ 8000894: f883 2035 strb.w r2, [r3, #53] ; 0x35
+
+ /* Disable the peripheral */
+ __HAL_DMA_DISABLE(hdma);
+ 8000898: 687b ldr r3, [r7, #4]
+ 800089a: 681b ldr r3, [r3, #0]
+ 800089c: 681a ldr r2, [r3, #0]
+ 800089e: 687b ldr r3, [r7, #4]
+ 80008a0: 681b ldr r3, [r3, #0]
+ 80008a2: f022 0201 bic.w r2, r2, #1
+ 80008a6: 601a str r2, [r3, #0]
+
+ /* Check if the DMA Stream is effectively disabled */
+ while((hdma->Instance->CR & DMA_SxCR_EN) != RESET)
+ 80008a8: e00f b.n 80008ca <HAL_DMA_Init+0x5e>
+ {
+ /* Check for the Timeout */
+ if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA_ABORT)
+ 80008aa: f7ff fe9f bl 80005ec <HAL_GetTick>
+ 80008ae: 4602 mov r2, r0
+ 80008b0: 693b ldr r3, [r7, #16]
+ 80008b2: 1ad3 subs r3, r2, r3
+ 80008b4: 2b05 cmp r3, #5
+ 80008b6: d908 bls.n 80008ca <HAL_DMA_Init+0x5e>
+ {
+ /* Update error code */
+ hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT;
+ 80008b8: 687b ldr r3, [r7, #4]
+ 80008ba: 2220 movs r2, #32
+ 80008bc: 655a str r2, [r3, #84] ; 0x54
+
+ /* Change the DMA state */
+ hdma->State = HAL_DMA_STATE_TIMEOUT;
+ 80008be: 687b ldr r3, [r7, #4]
+ 80008c0: 2203 movs r2, #3
+ 80008c2: f883 2035 strb.w r2, [r3, #53] ; 0x35
+
+ return HAL_TIMEOUT;
+ 80008c6: 2303 movs r3, #3
+ 80008c8: e078 b.n 80009bc <HAL_DMA_Init+0x150>
+ while((hdma->Instance->CR & DMA_SxCR_EN) != RESET)
+ 80008ca: 687b ldr r3, [r7, #4]
+ 80008cc: 681b ldr r3, [r3, #0]
+ 80008ce: 681b ldr r3, [r3, #0]
+ 80008d0: f003 0301 and.w r3, r3, #1
+ 80008d4: 2b00 cmp r3, #0
+ 80008d6: d1e8 bne.n 80008aa <HAL_DMA_Init+0x3e>
+ }
+ }
+
+ /* Get the CR register value */
+ tmp = hdma->Instance->CR;
+ 80008d8: 687b ldr r3, [r7, #4]
+ 80008da: 681b ldr r3, [r3, #0]
+ 80008dc: 681b ldr r3, [r3, #0]
+ 80008de: 617b str r3, [r7, #20]
+
+ /* Clear CHSEL, MBURST, PBURST, PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR, CT and DBM bits */
+ tmp &= ((uint32_t)~(DMA_SxCR_CHSEL | DMA_SxCR_MBURST | DMA_SxCR_PBURST | \
+ 80008e0: 697a ldr r2, [r7, #20]
+ 80008e2: 4b38 ldr r3, [pc, #224] ; (80009c4 <HAL_DMA_Init+0x158>)
+ 80008e4: 4013 ands r3, r2
+ 80008e6: 617b str r3, [r7, #20]
+ DMA_SxCR_PL | DMA_SxCR_MSIZE | DMA_SxCR_PSIZE | \
+ DMA_SxCR_MINC | DMA_SxCR_PINC | DMA_SxCR_CIRC | \
+ DMA_SxCR_DIR | DMA_SxCR_CT | DMA_SxCR_DBM));
+
+ /* Prepare the DMA Stream configuration */
+ tmp |= hdma->Init.Channel | hdma->Init.Direction |
+ 80008e8: 687b ldr r3, [r7, #4]
+ 80008ea: 685a ldr r2, [r3, #4]
+ 80008ec: 687b ldr r3, [r7, #4]
+ 80008ee: 689b ldr r3, [r3, #8]
+ 80008f0: 431a orrs r2, r3
+ hdma->Init.PeriphInc | hdma->Init.MemInc |
+ 80008f2: 687b ldr r3, [r7, #4]
+ 80008f4: 68db ldr r3, [r3, #12]
+ tmp |= hdma->Init.Channel | hdma->Init.Direction |
+ 80008f6: 431a orrs r2, r3
+ hdma->Init.PeriphInc | hdma->Init.MemInc |
+ 80008f8: 687b ldr r3, [r7, #4]
+ 80008fa: 691b ldr r3, [r3, #16]
+ 80008fc: 431a orrs r2, r3
+ hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
+ 80008fe: 687b ldr r3, [r7, #4]
+ 8000900: 695b ldr r3, [r3, #20]
+ hdma->Init.PeriphInc | hdma->Init.MemInc |
+ 8000902: 431a orrs r2, r3
+ hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
+ 8000904: 687b ldr r3, [r7, #4]
+ 8000906: 699b ldr r3, [r3, #24]
+ 8000908: 431a orrs r2, r3
+ hdma->Init.Mode | hdma->Init.Priority;
+ 800090a: 687b ldr r3, [r7, #4]
+ 800090c: 69db ldr r3, [r3, #28]
+ hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
+ 800090e: 431a orrs r2, r3
+ hdma->Init.Mode | hdma->Init.Priority;
+ 8000910: 687b ldr r3, [r7, #4]
+ 8000912: 6a1b ldr r3, [r3, #32]
+ 8000914: 4313 orrs r3, r2
+ tmp |= hdma->Init.Channel | hdma->Init.Direction |
+ 8000916: 697a ldr r2, [r7, #20]
+ 8000918: 4313 orrs r3, r2
+ 800091a: 617b str r3, [r7, #20]
+
+ /* the Memory burst and peripheral burst are not used when the FIFO is disabled */
+ if(hdma->Init.FIFOMode == DMA_FIFOMODE_ENABLE)
+ 800091c: 687b ldr r3, [r7, #4]
+ 800091e: 6a5b ldr r3, [r3, #36] ; 0x24
+ 8000920: 2b04 cmp r3, #4
+ 8000922: d107 bne.n 8000934 <HAL_DMA_Init+0xc8>
+ {
+ /* Get memory burst and peripheral burst */
+ tmp |= hdma->Init.MemBurst | hdma->Init.PeriphBurst;
+ 8000924: 687b ldr r3, [r7, #4]
+ 8000926: 6ada ldr r2, [r3, #44] ; 0x2c
+ 8000928: 687b ldr r3, [r7, #4]
+ 800092a: 6b1b ldr r3, [r3, #48] ; 0x30
+ 800092c: 4313 orrs r3, r2
+ 800092e: 697a ldr r2, [r7, #20]
+ 8000930: 4313 orrs r3, r2
+ 8000932: 617b str r3, [r7, #20]
+ }
+
+ /* Write to DMA Stream CR register */
+ hdma->Instance->CR = tmp;
+ 8000934: 687b ldr r3, [r7, #4]
+ 8000936: 681b ldr r3, [r3, #0]
+ 8000938: 697a ldr r2, [r7, #20]
+ 800093a: 601a str r2, [r3, #0]
+
+ /* Get the FCR register value */
+ tmp = hdma->Instance->FCR;
+ 800093c: 687b ldr r3, [r7, #4]
+ 800093e: 681b ldr r3, [r3, #0]
+ 8000940: 695b ldr r3, [r3, #20]
+ 8000942: 617b str r3, [r7, #20]
+
+ /* Clear Direct mode and FIFO threshold bits */
+ tmp &= (uint32_t)~(DMA_SxFCR_DMDIS | DMA_SxFCR_FTH);
+ 8000944: 697b ldr r3, [r7, #20]
+ 8000946: f023 0307 bic.w r3, r3, #7
+ 800094a: 617b str r3, [r7, #20]
+
+ /* Prepare the DMA Stream FIFO configuration */
+ tmp |= hdma->Init.FIFOMode;
+ 800094c: 687b ldr r3, [r7, #4]
+ 800094e: 6a5b ldr r3, [r3, #36] ; 0x24
+ 8000950: 697a ldr r2, [r7, #20]
+ 8000952: 4313 orrs r3, r2
+ 8000954: 617b str r3, [r7, #20]
+
+ /* The FIFO threshold is not used when the FIFO mode is disabled */
+ if(hdma->Init.FIFOMode == DMA_FIFOMODE_ENABLE)
+ 8000956: 687b ldr r3, [r7, #4]
+ 8000958: 6a5b ldr r3, [r3, #36] ; 0x24
+ 800095a: 2b04 cmp r3, #4
+ 800095c: d117 bne.n 800098e <HAL_DMA_Init+0x122>
+ {
+ /* Get the FIFO threshold */
+ tmp |= hdma->Init.FIFOThreshold;
+ 800095e: 687b ldr r3, [r7, #4]
+ 8000960: 6a9b ldr r3, [r3, #40] ; 0x28
+ 8000962: 697a ldr r2, [r7, #20]
+ 8000964: 4313 orrs r3, r2
+ 8000966: 617b str r3, [r7, #20]
+
+ /* Check compatibility between FIFO threshold level and size of the memory burst */
+ /* for INCR4, INCR8, INCR16 bursts */
+ if (hdma->Init.MemBurst != DMA_MBURST_SINGLE)
+ 8000968: 687b ldr r3, [r7, #4]
+ 800096a: 6adb ldr r3, [r3, #44] ; 0x2c
+ 800096c: 2b00 cmp r3, #0
+ 800096e: d00e beq.n 800098e <HAL_DMA_Init+0x122>
+ {
+ if (DMA_CheckFifoParam(hdma) != HAL_OK)
+ 8000970: 6878 ldr r0, [r7, #4]
+ 8000972: f000 fa99 bl 8000ea8 <DMA_CheckFifoParam>
+ 8000976: 4603 mov r3, r0
+ 8000978: 2b00 cmp r3, #0
+ 800097a: d008 beq.n 800098e <HAL_DMA_Init+0x122>
+ {
+ /* Update error code */
+ hdma->ErrorCode = HAL_DMA_ERROR_PARAM;
+ 800097c: 687b ldr r3, [r7, #4]
+ 800097e: 2240 movs r2, #64 ; 0x40
+ 8000980: 655a str r2, [r3, #84] ; 0x54
+
+ /* Change the DMA state */
+ hdma->State = HAL_DMA_STATE_READY;
+ 8000982: 687b ldr r3, [r7, #4]
+ 8000984: 2201 movs r2, #1
+ 8000986: f883 2035 strb.w r2, [r3, #53] ; 0x35
+
+ return HAL_ERROR;
+ 800098a: 2301 movs r3, #1
+ 800098c: e016 b.n 80009bc <HAL_DMA_Init+0x150>
+ }
+ }
+ }
+
+ /* Write to DMA Stream FCR */
+ hdma->Instance->FCR = tmp;
+ 800098e: 687b ldr r3, [r7, #4]
+ 8000990: 681b ldr r3, [r3, #0]
+ 8000992: 697a ldr r2, [r7, #20]
+ 8000994: 615a str r2, [r3, #20]
+
+ /* Initialize StreamBaseAddress and StreamIndex parameters to be used to calculate
+ DMA steam Base Address needed by HAL_DMA_IRQHandler() and HAL_DMA_PollForTransfer() */
+ regs = (DMA_Base_Registers *)DMA_CalcBaseAndBitshift(hdma);
+ 8000996: 6878 ldr r0, [r7, #4]
+ 8000998: f000 fa50 bl 8000e3c <DMA_CalcBaseAndBitshift>
+ 800099c: 4603 mov r3, r0
+ 800099e: 60fb str r3, [r7, #12]
+
+ /* Clear all interrupt flags */
+ regs->IFCR = 0x3FU << hdma->StreamIndex;
+ 80009a0: 687b ldr r3, [r7, #4]
+ 80009a2: 6ddb ldr r3, [r3, #92] ; 0x5c
+ 80009a4: 223f movs r2, #63 ; 0x3f
+ 80009a6: 409a lsls r2, r3
+ 80009a8: 68fb ldr r3, [r7, #12]
+ 80009aa: 609a str r2, [r3, #8]
+
+ /* Initialize the error code */
+ hdma->ErrorCode = HAL_DMA_ERROR_NONE;
+ 80009ac: 687b ldr r3, [r7, #4]
+ 80009ae: 2200 movs r2, #0
+ 80009b0: 655a str r2, [r3, #84] ; 0x54
+
+ /* Initialize the DMA state */
+ hdma->State = HAL_DMA_STATE_READY;
+ 80009b2: 687b ldr r3, [r7, #4]
+ 80009b4: 2201 movs r2, #1
+ 80009b6: f883 2035 strb.w r2, [r3, #53] ; 0x35
+
+ return HAL_OK;
+ 80009ba: 2300 movs r3, #0
+}
+ 80009bc: 4618 mov r0, r3
+ 80009be: 3718 adds r7, #24
+ 80009c0: 46bd mov sp, r7
+ 80009c2: bd80 pop {r7, pc}
+ 80009c4: e010803f .word 0xe010803f
+
+080009c8 <HAL_DMA_Start_IT>:
+ * @param DstAddress The destination memory Buffer address
+ * @param DataLength The length of data to be transferred from source to destination
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
+{
+ 80009c8: b580 push {r7, lr}
+ 80009ca: b086 sub sp, #24
+ 80009cc: af00 add r7, sp, #0
+ 80009ce: 60f8 str r0, [r7, #12]
+ 80009d0: 60b9 str r1, [r7, #8]
+ 80009d2: 607a str r2, [r7, #4]
+ 80009d4: 603b str r3, [r7, #0]
+ HAL_StatusTypeDef status = HAL_OK;
+ 80009d6: 2300 movs r3, #0
+ 80009d8: 75fb strb r3, [r7, #23]
+
+ /* calculate DMA base and stream number */
+ DMA_Base_Registers *regs = (DMA_Base_Registers *)hdma->StreamBaseAddress;
+ 80009da: 68fb ldr r3, [r7, #12]
+ 80009dc: 6d9b ldr r3, [r3, #88] ; 0x58
+ 80009de: 613b str r3, [r7, #16]
+
+ /* Check the parameters */
+ assert_param(IS_DMA_BUFFER_SIZE(DataLength));
+
+ /* Process locked */
+ __HAL_LOCK(hdma);
+ 80009e0: 68fb ldr r3, [r7, #12]
+ 80009e2: f893 3034 ldrb.w r3, [r3, #52] ; 0x34
+ 80009e6: 2b01 cmp r3, #1
+ 80009e8: d101 bne.n 80009ee <HAL_DMA_Start_IT+0x26>
+ 80009ea: 2302 movs r3, #2
+ 80009ec: e048 b.n 8000a80 <HAL_DMA_Start_IT+0xb8>
+ 80009ee: 68fb ldr r3, [r7, #12]
+ 80009f0: 2201 movs r2, #1
+ 80009f2: f883 2034 strb.w r2, [r3, #52] ; 0x34
+
+ if(HAL_DMA_STATE_READY == hdma->State)
+ 80009f6: 68fb ldr r3, [r7, #12]
+ 80009f8: f893 3035 ldrb.w r3, [r3, #53] ; 0x35
+ 80009fc: b2db uxtb r3, r3
+ 80009fe: 2b01 cmp r3, #1
+ 8000a00: d137 bne.n 8000a72 <HAL_DMA_Start_IT+0xaa>
+ {
+ /* Change DMA peripheral state */
+ hdma->State = HAL_DMA_STATE_BUSY;
+ 8000a02: 68fb ldr r3, [r7, #12]
+ 8000a04: 2202 movs r2, #2
+ 8000a06: f883 2035 strb.w r2, [r3, #53] ; 0x35
+
+ /* Initialize the error code */
+ hdma->ErrorCode = HAL_DMA_ERROR_NONE;
+ 8000a0a: 68fb ldr r3, [r7, #12]
+ 8000a0c: 2200 movs r2, #0
+ 8000a0e: 655a str r2, [r3, #84] ; 0x54
+
+ /* Configure the source, destination address and the data length */
+ DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
+ 8000a10: 683b ldr r3, [r7, #0]
+ 8000a12: 687a ldr r2, [r7, #4]
+ 8000a14: 68b9 ldr r1, [r7, #8]
+ 8000a16: 68f8 ldr r0, [r7, #12]
+ 8000a18: f000 f9e2 bl 8000de0 <DMA_SetConfig>
+
+ /* Clear all interrupt flags at correct offset within the register */
+ regs->IFCR = 0x3FU << hdma->StreamIndex;
+ 8000a1c: 68fb ldr r3, [r7, #12]
+ 8000a1e: 6ddb ldr r3, [r3, #92] ; 0x5c
+ 8000a20: 223f movs r2, #63 ; 0x3f
+ 8000a22: 409a lsls r2, r3
+ 8000a24: 693b ldr r3, [r7, #16]
+ 8000a26: 609a str r2, [r3, #8]
+
+ /* Enable Common interrupts*/
+ hdma->Instance->CR |= DMA_IT_TC | DMA_IT_TE | DMA_IT_DME;
+ 8000a28: 68fb ldr r3, [r7, #12]
+ 8000a2a: 681b ldr r3, [r3, #0]
+ 8000a2c: 681a ldr r2, [r3, #0]
+ 8000a2e: 68fb ldr r3, [r7, #12]
+ 8000a30: 681b ldr r3, [r3, #0]
+ 8000a32: f042 0216 orr.w r2, r2, #22
+ 8000a36: 601a str r2, [r3, #0]
+ hdma->Instance->FCR |= DMA_IT_FE;
+ 8000a38: 68fb ldr r3, [r7, #12]
+ 8000a3a: 681b ldr r3, [r3, #0]
+ 8000a3c: 695a ldr r2, [r3, #20]
+ 8000a3e: 68fb ldr r3, [r7, #12]
+ 8000a40: 681b ldr r3, [r3, #0]
+ 8000a42: f042 0280 orr.w r2, r2, #128 ; 0x80
+ 8000a46: 615a str r2, [r3, #20]
+
+ if(hdma->XferHalfCpltCallback != NULL)
+ 8000a48: 68fb ldr r3, [r7, #12]
+ 8000a4a: 6c1b ldr r3, [r3, #64] ; 0x40
+ 8000a4c: 2b00 cmp r3, #0
+ 8000a4e: d007 beq.n 8000a60 <HAL_DMA_Start_IT+0x98>
+ {
+ hdma->Instance->CR |= DMA_IT_HT;
+ 8000a50: 68fb ldr r3, [r7, #12]
+ 8000a52: 681b ldr r3, [r3, #0]
+ 8000a54: 681a ldr r2, [r3, #0]
+ 8000a56: 68fb ldr r3, [r7, #12]
+ 8000a58: 681b ldr r3, [r3, #0]
+ 8000a5a: f042 0208 orr.w r2, r2, #8
+ 8000a5e: 601a str r2, [r3, #0]
+ }
+
+ /* Enable the Peripheral */
+ __HAL_DMA_ENABLE(hdma);
+ 8000a60: 68fb ldr r3, [r7, #12]
+ 8000a62: 681b ldr r3, [r3, #0]
+ 8000a64: 681a ldr r2, [r3, #0]
+ 8000a66: 68fb ldr r3, [r7, #12]
+ 8000a68: 681b ldr r3, [r3, #0]
+ 8000a6a: f042 0201 orr.w r2, r2, #1
+ 8000a6e: 601a str r2, [r3, #0]
+ 8000a70: e005 b.n 8000a7e <HAL_DMA_Start_IT+0xb6>
+ }
+ else
+ {
+ /* Process unlocked */
+ __HAL_UNLOCK(hdma);
+ 8000a72: 68fb ldr r3, [r7, #12]
+ 8000a74: 2200 movs r2, #0
+ 8000a76: f883 2034 strb.w r2, [r3, #52] ; 0x34
+
+ /* Return error status */
+ status = HAL_BUSY;
+ 8000a7a: 2302 movs r3, #2
+ 8000a7c: 75fb strb r3, [r7, #23]
+ }
+
+ return status;
+ 8000a7e: 7dfb ldrb r3, [r7, #23]
+}
+ 8000a80: 4618 mov r0, r3
+ 8000a82: 3718 adds r7, #24
+ 8000a84: 46bd mov sp, r7
+ 8000a86: bd80 pop {r7, pc}
+
+08000a88 <HAL_DMA_Abort_IT>:
+ * @param hdma pointer to a DMA_HandleTypeDef structure that contains
+ * the configuration information for the specified DMA Stream.
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
+{
+ 8000a88: b480 push {r7}
+ 8000a8a: b083 sub sp, #12
+ 8000a8c: af00 add r7, sp, #0
+ 8000a8e: 6078 str r0, [r7, #4]
+ if(hdma->State != HAL_DMA_STATE_BUSY)
+ 8000a90: 687b ldr r3, [r7, #4]
+ 8000a92: f893 3035 ldrb.w r3, [r3, #53] ; 0x35
+ 8000a96: b2db uxtb r3, r3
+ 8000a98: 2b02 cmp r3, #2
+ 8000a9a: d004 beq.n 8000aa6 <HAL_DMA_Abort_IT+0x1e>
+ {
+ hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
+ 8000a9c: 687b ldr r3, [r7, #4]
+ 8000a9e: 2280 movs r2, #128 ; 0x80
+ 8000aa0: 655a str r2, [r3, #84] ; 0x54
+ return HAL_ERROR;
+ 8000aa2: 2301 movs r3, #1
+ 8000aa4: e00c b.n 8000ac0 <HAL_DMA_Abort_IT+0x38>
+ }
+ else
+ {
+ /* Set Abort State */
+ hdma->State = HAL_DMA_STATE_ABORT;
+ 8000aa6: 687b ldr r3, [r7, #4]
+ 8000aa8: 2205 movs r2, #5
+ 8000aaa: f883 2035 strb.w r2, [r3, #53] ; 0x35
+
+ /* Disable the stream */
+ __HAL_DMA_DISABLE(hdma);
+ 8000aae: 687b ldr r3, [r7, #4]
+ 8000ab0: 681b ldr r3, [r3, #0]
+ 8000ab2: 681a ldr r2, [r3, #0]
+ 8000ab4: 687b ldr r3, [r7, #4]
+ 8000ab6: 681b ldr r3, [r3, #0]
+ 8000ab8: f022 0201 bic.w r2, r2, #1
+ 8000abc: 601a str r2, [r3, #0]
+ }
+
+ return HAL_OK;
+ 8000abe: 2300 movs r3, #0
+}
+ 8000ac0: 4618 mov r0, r3
+ 8000ac2: 370c adds r7, #12
+ 8000ac4: 46bd mov sp, r7
+ 8000ac6: f85d 7b04 ldr.w r7, [sp], #4
+ 8000aca: 4770 bx lr
+
+08000acc <HAL_DMA_IRQHandler>:
+ * @param hdma pointer to a DMA_HandleTypeDef structure that contains
+ * the configuration information for the specified DMA Stream.
+ * @retval None
+ */
+void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
+{
+ 8000acc: b580 push {r7, lr}
+ 8000ace: b086 sub sp, #24
+ 8000ad0: af00 add r7, sp, #0
+ 8000ad2: 6078 str r0, [r7, #4]
+ uint32_t tmpisr;
+ __IO uint32_t count = 0;
+ 8000ad4: 2300 movs r3, #0
+ 8000ad6: 60bb str r3, [r7, #8]
+ uint32_t timeout = SystemCoreClock / 9600;
+ 8000ad8: 4b92 ldr r3, [pc, #584] ; (8000d24 <HAL_DMA_IRQHandler+0x258>)
+ 8000ada: 681b ldr r3, [r3, #0]
+ 8000adc: 4a92 ldr r2, [pc, #584] ; (8000d28 <HAL_DMA_IRQHandler+0x25c>)
+ 8000ade: fba2 2303 umull r2, r3, r2, r3
+ 8000ae2: 0a9b lsrs r3, r3, #10
+ 8000ae4: 617b str r3, [r7, #20]
+
+ /* calculate DMA base and stream number */
+ DMA_Base_Registers *regs = (DMA_Base_Registers *)hdma->StreamBaseAddress;
+ 8000ae6: 687b ldr r3, [r7, #4]
+ 8000ae8: 6d9b ldr r3, [r3, #88] ; 0x58
+ 8000aea: 613b str r3, [r7, #16]
+
+ tmpisr = regs->ISR;
+ 8000aec: 693b ldr r3, [r7, #16]
+ 8000aee: 681b ldr r3, [r3, #0]
+ 8000af0: 60fb str r3, [r7, #12]
+
+ /* Transfer Error Interrupt management ***************************************/
+ if ((tmpisr & (DMA_FLAG_TEIF0_4 << hdma->StreamIndex)) != RESET)
+ 8000af2: 687b ldr r3, [r7, #4]
+ 8000af4: 6ddb ldr r3, [r3, #92] ; 0x5c
+ 8000af6: 2208 movs r2, #8
+ 8000af8: 409a lsls r2, r3
+ 8000afa: 68fb ldr r3, [r7, #12]
+ 8000afc: 4013 ands r3, r2
+ 8000afe: 2b00 cmp r3, #0
+ 8000b00: d01a beq.n 8000b38 <HAL_DMA_IRQHandler+0x6c>
+ {
+ if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TE) != RESET)
+ 8000b02: 687b ldr r3, [r7, #4]
+ 8000b04: 681b ldr r3, [r3, #0]
+ 8000b06: 681b ldr r3, [r3, #0]
+ 8000b08: f003 0304 and.w r3, r3, #4
+ 8000b0c: 2b00 cmp r3, #0
+ 8000b0e: d013 beq.n 8000b38 <HAL_DMA_IRQHandler+0x6c>
+ {
+ /* Disable the transfer error interrupt */
+ hdma->Instance->CR &= ~(DMA_IT_TE);
+ 8000b10: 687b ldr r3, [r7, #4]
+ 8000b12: 681b ldr r3, [r3, #0]
+ 8000b14: 681a ldr r2, [r3, #0]
+ 8000b16: 687b ldr r3, [r7, #4]
+ 8000b18: 681b ldr r3, [r3, #0]
+ 8000b1a: f022 0204 bic.w r2, r2, #4
+ 8000b1e: 601a str r2, [r3, #0]
+
+ /* Clear the transfer error flag */
+ regs->IFCR = DMA_FLAG_TEIF0_4 << hdma->StreamIndex;
+ 8000b20: 687b ldr r3, [r7, #4]
+ 8000b22: 6ddb ldr r3, [r3, #92] ; 0x5c
+ 8000b24: 2208 movs r2, #8
+ 8000b26: 409a lsls r2, r3
+ 8000b28: 693b ldr r3, [r7, #16]
+ 8000b2a: 609a str r2, [r3, #8]
+
+ /* Update error code */
+ hdma->ErrorCode |= HAL_DMA_ERROR_TE;
+ 8000b2c: 687b ldr r3, [r7, #4]
+ 8000b2e: 6d5b ldr r3, [r3, #84] ; 0x54
+ 8000b30: f043 0201 orr.w r2, r3, #1
+ 8000b34: 687b ldr r3, [r7, #4]
+ 8000b36: 655a str r2, [r3, #84] ; 0x54
+ }
+ }
+ /* FIFO Error Interrupt management ******************************************/
+ if ((tmpisr & (DMA_FLAG_FEIF0_4 << hdma->StreamIndex)) != RESET)
+ 8000b38: 687b ldr r3, [r7, #4]
+ 8000b3a: 6ddb ldr r3, [r3, #92] ; 0x5c
+ 8000b3c: 2201 movs r2, #1
+ 8000b3e: 409a lsls r2, r3
+ 8000b40: 68fb ldr r3, [r7, #12]
+ 8000b42: 4013 ands r3, r2
+ 8000b44: 2b00 cmp r3, #0
+ 8000b46: d012 beq.n 8000b6e <HAL_DMA_IRQHandler+0xa2>
+ {
+ if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_FE) != RESET)
+ 8000b48: 687b ldr r3, [r7, #4]
+ 8000b4a: 681b ldr r3, [r3, #0]
+ 8000b4c: 695b ldr r3, [r3, #20]
+ 8000b4e: f003 0380 and.w r3, r3, #128 ; 0x80
+ 8000b52: 2b00 cmp r3, #0
+ 8000b54: d00b beq.n 8000b6e <HAL_DMA_IRQHandler+0xa2>
+ {
+ /* Clear the FIFO error flag */
+ regs->IFCR = DMA_FLAG_FEIF0_4 << hdma->StreamIndex;
+ 8000b56: 687b ldr r3, [r7, #4]
+ 8000b58: 6ddb ldr r3, [r3, #92] ; 0x5c
+ 8000b5a: 2201 movs r2, #1
+ 8000b5c: 409a lsls r2, r3
+ 8000b5e: 693b ldr r3, [r7, #16]
+ 8000b60: 609a str r2, [r3, #8]
+
+ /* Update error code */
+ hdma->ErrorCode |= HAL_DMA_ERROR_FE;
+ 8000b62: 687b ldr r3, [r7, #4]
+ 8000b64: 6d5b ldr r3, [r3, #84] ; 0x54
+ 8000b66: f043 0202 orr.w r2, r3, #2
+ 8000b6a: 687b ldr r3, [r7, #4]
+ 8000b6c: 655a str r2, [r3, #84] ; 0x54
+ }
+ }
+ /* Direct Mode Error Interrupt management ***********************************/
+ if ((tmpisr & (DMA_FLAG_DMEIF0_4 << hdma->StreamIndex)) != RESET)
+ 8000b6e: 687b ldr r3, [r7, #4]
+ 8000b70: 6ddb ldr r3, [r3, #92] ; 0x5c
+ 8000b72: 2204 movs r2, #4
+ 8000b74: 409a lsls r2, r3
+ 8000b76: 68fb ldr r3, [r7, #12]
+ 8000b78: 4013 ands r3, r2
+ 8000b7a: 2b00 cmp r3, #0
+ 8000b7c: d012 beq.n 8000ba4 <HAL_DMA_IRQHandler+0xd8>
+ {
+ if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_DME) != RESET)
+ 8000b7e: 687b ldr r3, [r7, #4]
+ 8000b80: 681b ldr r3, [r3, #0]
+ 8000b82: 681b ldr r3, [r3, #0]
+ 8000b84: f003 0302 and.w r3, r3, #2
+ 8000b88: 2b00 cmp r3, #0
+ 8000b8a: d00b beq.n 8000ba4 <HAL_DMA_IRQHandler+0xd8>
+ {
+ /* Clear the direct mode error flag */
+ regs->IFCR = DMA_FLAG_DMEIF0_4 << hdma->StreamIndex;
+ 8000b8c: 687b ldr r3, [r7, #4]
+ 8000b8e: 6ddb ldr r3, [r3, #92] ; 0x5c
+ 8000b90: 2204 movs r2, #4
+ 8000b92: 409a lsls r2, r3
+ 8000b94: 693b ldr r3, [r7, #16]
+ 8000b96: 609a str r2, [r3, #8]
+
+ /* Update error code */
+ hdma->ErrorCode |= HAL_DMA_ERROR_DME;
+ 8000b98: 687b ldr r3, [r7, #4]
+ 8000b9a: 6d5b ldr r3, [r3, #84] ; 0x54
+ 8000b9c: f043 0204 orr.w r2, r3, #4
+ 8000ba0: 687b ldr r3, [r7, #4]
+ 8000ba2: 655a str r2, [r3, #84] ; 0x54
+ }
+ }
+ /* Half Transfer Complete Interrupt management ******************************/
+ if ((tmpisr & (DMA_FLAG_HTIF0_4 << hdma->StreamIndex)) != RESET)
+ 8000ba4: 687b ldr r3, [r7, #4]
+ 8000ba6: 6ddb ldr r3, [r3, #92] ; 0x5c
+ 8000ba8: 2210 movs r2, #16
+ 8000baa: 409a lsls r2, r3
+ 8000bac: 68fb ldr r3, [r7, #12]
+ 8000bae: 4013 ands r3, r2
+ 8000bb0: 2b00 cmp r3, #0
+ 8000bb2: d043 beq.n 8000c3c <HAL_DMA_IRQHandler+0x170>
+ {
+ if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_HT) != RESET)
+ 8000bb4: 687b ldr r3, [r7, #4]
+ 8000bb6: 681b ldr r3, [r3, #0]
+ 8000bb8: 681b ldr r3, [r3, #0]
+ 8000bba: f003 0308 and.w r3, r3, #8
+ 8000bbe: 2b00 cmp r3, #0
+ 8000bc0: d03c beq.n 8000c3c <HAL_DMA_IRQHandler+0x170>
+ {
+ /* Clear the half transfer complete flag */
+ regs->IFCR = DMA_FLAG_HTIF0_4 << hdma->StreamIndex;
+ 8000bc2: 687b ldr r3, [r7, #4]
+ 8000bc4: 6ddb ldr r3, [r3, #92] ; 0x5c
+ 8000bc6: 2210 movs r2, #16
+ 8000bc8: 409a lsls r2, r3
+ 8000bca: 693b ldr r3, [r7, #16]
+ 8000bcc: 609a str r2, [r3, #8]
+
+ /* Multi_Buffering mode enabled */
+ if(((hdma->Instance->CR) & (uint32_t)(DMA_SxCR_DBM)) != RESET)
+ 8000bce: 687b ldr r3, [r7, #4]
+ 8000bd0: 681b ldr r3, [r3, #0]
+ 8000bd2: 681b ldr r3, [r3, #0]
+ 8000bd4: f403 2380 and.w r3, r3, #262144 ; 0x40000
+ 8000bd8: 2b00 cmp r3, #0
+ 8000bda: d018 beq.n 8000c0e <HAL_DMA_IRQHandler+0x142>
+ {
+ /* Current memory buffer used is Memory 0 */
+ if((hdma->Instance->CR & DMA_SxCR_CT) == RESET)
+ 8000bdc: 687b ldr r3, [r7, #4]
+ 8000bde: 681b ldr r3, [r3, #0]
+ 8000be0: 681b ldr r3, [r3, #0]
+ 8000be2: f403 2300 and.w r3, r3, #524288 ; 0x80000
+ 8000be6: 2b00 cmp r3, #0
+ 8000be8: d108 bne.n 8000bfc <HAL_DMA_IRQHandler+0x130>
+ {
+ if(hdma->XferHalfCpltCallback != NULL)
+ 8000bea: 687b ldr r3, [r7, #4]
+ 8000bec: 6c1b ldr r3, [r3, #64] ; 0x40
+ 8000bee: 2b00 cmp r3, #0
+ 8000bf0: d024 beq.n 8000c3c <HAL_DMA_IRQHandler+0x170>
+ {
+ /* Half transfer callback */
+ hdma->XferHalfCpltCallback(hdma);
+ 8000bf2: 687b ldr r3, [r7, #4]
+ 8000bf4: 6c1b ldr r3, [r3, #64] ; 0x40
+ 8000bf6: 6878 ldr r0, [r7, #4]
+ 8000bf8: 4798 blx r3
+ 8000bfa: e01f b.n 8000c3c <HAL_DMA_IRQHandler+0x170>
+ }
+ }
+ /* Current memory buffer used is Memory 1 */
+ else
+ {
+ if(hdma->XferM1HalfCpltCallback != NULL)
+ 8000bfc: 687b ldr r3, [r7, #4]
+ 8000bfe: 6c9b ldr r3, [r3, #72] ; 0x48
+ 8000c00: 2b00 cmp r3, #0
+ 8000c02: d01b beq.n 8000c3c <HAL_DMA_IRQHandler+0x170>
+ {
+ /* Half transfer callback */
+ hdma->XferM1HalfCpltCallback(hdma);
+ 8000c04: 687b ldr r3, [r7, #4]
+ 8000c06: 6c9b ldr r3, [r3, #72] ; 0x48
+ 8000c08: 6878 ldr r0, [r7, #4]
+ 8000c0a: 4798 blx r3
+ 8000c0c: e016 b.n 8000c3c <HAL_DMA_IRQHandler+0x170>
+ }
+ }
+ else
+ {
+ /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */
+ if((hdma->Instance->CR & DMA_SxCR_CIRC) == RESET)
+ 8000c0e: 687b ldr r3, [r7, #4]
+ 8000c10: 681b ldr r3, [r3, #0]
+ 8000c12: 681b ldr r3, [r3, #0]
+ 8000c14: f403 7380 and.w r3, r3, #256 ; 0x100
+ 8000c18: 2b00 cmp r3, #0
+ 8000c1a: d107 bne.n 8000c2c <HAL_DMA_IRQHandler+0x160>
+ {
+ /* Disable the half transfer interrupt */
+ hdma->Instance->CR &= ~(DMA_IT_HT);
+ 8000c1c: 687b ldr r3, [r7, #4]
+ 8000c1e: 681b ldr r3, [r3, #0]
+ 8000c20: 681a ldr r2, [r3, #0]
+ 8000c22: 687b ldr r3, [r7, #4]
+ 8000c24: 681b ldr r3, [r3, #0]
+ 8000c26: f022 0208 bic.w r2, r2, #8
+ 8000c2a: 601a str r2, [r3, #0]
+ }
+
+ if(hdma->XferHalfCpltCallback != NULL)
+ 8000c2c: 687b ldr r3, [r7, #4]
+ 8000c2e: 6c1b ldr r3, [r3, #64] ; 0x40
+ 8000c30: 2b00 cmp r3, #0
+ 8000c32: d003 beq.n 8000c3c <HAL_DMA_IRQHandler+0x170>
+ {
+ /* Half transfer callback */
+ hdma->XferHalfCpltCallback(hdma);
+ 8000c34: 687b ldr r3, [r7, #4]
+ 8000c36: 6c1b ldr r3, [r3, #64] ; 0x40
+ 8000c38: 6878 ldr r0, [r7, #4]
+ 8000c3a: 4798 blx r3
+ }
+ }
+ }
+ }
+ /* Transfer Complete Interrupt management ***********************************/
+ if ((tmpisr & (DMA_FLAG_TCIF0_4 << hdma->StreamIndex)) != RESET)
+ 8000c3c: 687b ldr r3, [r7, #4]
+ 8000c3e: 6ddb ldr r3, [r3, #92] ; 0x5c
+ 8000c40: 2220 movs r2, #32
+ 8000c42: 409a lsls r2, r3
+ 8000c44: 68fb ldr r3, [r7, #12]
+ 8000c46: 4013 ands r3, r2
+ 8000c48: 2b00 cmp r3, #0
+ 8000c4a: f000 808e beq.w 8000d6a <HAL_DMA_IRQHandler+0x29e>
+ {
+ if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TC) != RESET)
+ 8000c4e: 687b ldr r3, [r7, #4]
+ 8000c50: 681b ldr r3, [r3, #0]
+ 8000c52: 681b ldr r3, [r3, #0]
+ 8000c54: f003 0310 and.w r3, r3, #16
+ 8000c58: 2b00 cmp r3, #0
+ 8000c5a: f000 8086 beq.w 8000d6a <HAL_DMA_IRQHandler+0x29e>
+ {
+ /* Clear the transfer complete flag */
+ regs->IFCR = DMA_FLAG_TCIF0_4 << hdma->StreamIndex;
+ 8000c5e: 687b ldr r3, [r7, #4]
+ 8000c60: 6ddb ldr r3, [r3, #92] ; 0x5c
+ 8000c62: 2220 movs r2, #32
+ 8000c64: 409a lsls r2, r3
+ 8000c66: 693b ldr r3, [r7, #16]
+ 8000c68: 609a str r2, [r3, #8]
+
+ if(HAL_DMA_STATE_ABORT == hdma->State)
+ 8000c6a: 687b ldr r3, [r7, #4]
+ 8000c6c: f893 3035 ldrb.w r3, [r3, #53] ; 0x35
+ 8000c70: b2db uxtb r3, r3
+ 8000c72: 2b05 cmp r3, #5
+ 8000c74: d136 bne.n 8000ce4 <HAL_DMA_IRQHandler+0x218>
+ {
+ /* Disable all the transfer interrupts */
+ hdma->Instance->CR &= ~(DMA_IT_TC | DMA_IT_TE | DMA_IT_DME);
+ 8000c76: 687b ldr r3, [r7, #4]
+ 8000c78: 681b ldr r3, [r3, #0]
+ 8000c7a: 681a ldr r2, [r3, #0]
+ 8000c7c: 687b ldr r3, [r7, #4]
+ 8000c7e: 681b ldr r3, [r3, #0]
+ 8000c80: f022 0216 bic.w r2, r2, #22
+ 8000c84: 601a str r2, [r3, #0]
+ hdma->Instance->FCR &= ~(DMA_IT_FE);
+ 8000c86: 687b ldr r3, [r7, #4]
+ 8000c88: 681b ldr r3, [r3, #0]
+ 8000c8a: 695a ldr r2, [r3, #20]
+ 8000c8c: 687b ldr r3, [r7, #4]
+ 8000c8e: 681b ldr r3, [r3, #0]
+ 8000c90: f022 0280 bic.w r2, r2, #128 ; 0x80
+ 8000c94: 615a str r2, [r3, #20]
+
+ if((hdma->XferHalfCpltCallback != NULL) || (hdma->XferM1HalfCpltCallback != NULL))
+ 8000c96: 687b ldr r3, [r7, #4]
+ 8000c98: 6c1b ldr r3, [r3, #64] ; 0x40
+ 8000c9a: 2b00 cmp r3, #0
+ 8000c9c: d103 bne.n 8000ca6 <HAL_DMA_IRQHandler+0x1da>
+ 8000c9e: 687b ldr r3, [r7, #4]
+ 8000ca0: 6c9b ldr r3, [r3, #72] ; 0x48
+ 8000ca2: 2b00 cmp r3, #0
+ 8000ca4: d007 beq.n 8000cb6 <HAL_DMA_IRQHandler+0x1ea>
+ {
+ hdma->Instance->CR &= ~(DMA_IT_HT);
+ 8000ca6: 687b ldr r3, [r7, #4]
+ 8000ca8: 681b ldr r3, [r3, #0]
+ 8000caa: 681a ldr r2, [r3, #0]
+ 8000cac: 687b ldr r3, [r7, #4]
+ 8000cae: 681b ldr r3, [r3, #0]
+ 8000cb0: f022 0208 bic.w r2, r2, #8
+ 8000cb4: 601a str r2, [r3, #0]
+ }
+
+ /* Clear all interrupt flags at correct offset within the register */
+ regs->IFCR = 0x3FU << hdma->StreamIndex;
+ 8000cb6: 687b ldr r3, [r7, #4]
+ 8000cb8: 6ddb ldr r3, [r3, #92] ; 0x5c
+ 8000cba: 223f movs r2, #63 ; 0x3f
+ 8000cbc: 409a lsls r2, r3
+ 8000cbe: 693b ldr r3, [r7, #16]
+ 8000cc0: 609a str r2, [r3, #8]
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(hdma);
+ 8000cc2: 687b ldr r3, [r7, #4]
+ 8000cc4: 2200 movs r2, #0
+ 8000cc6: f883 2034 strb.w r2, [r3, #52] ; 0x34
+
+ /* Change the DMA state */
+ hdma->State = HAL_DMA_STATE_READY;
+ 8000cca: 687b ldr r3, [r7, #4]
+ 8000ccc: 2201 movs r2, #1
+ 8000cce: f883 2035 strb.w r2, [r3, #53] ; 0x35
+
+ if(hdma->XferAbortCallback != NULL)
+ 8000cd2: 687b ldr r3, [r7, #4]
+ 8000cd4: 6d1b ldr r3, [r3, #80] ; 0x50
+ 8000cd6: 2b00 cmp r3, #0
+ 8000cd8: d07d beq.n 8000dd6 <HAL_DMA_IRQHandler+0x30a>
+ {
+ hdma->XferAbortCallback(hdma);
+ 8000cda: 687b ldr r3, [r7, #4]
+ 8000cdc: 6d1b ldr r3, [r3, #80] ; 0x50
+ 8000cde: 6878 ldr r0, [r7, #4]
+ 8000ce0: 4798 blx r3
+ }
+ return;
+ 8000ce2: e078 b.n 8000dd6 <HAL_DMA_IRQHandler+0x30a>
+ }
+
+ if(((hdma->Instance->CR) & (uint32_t)(DMA_SxCR_DBM)) != RESET)
+ 8000ce4: 687b ldr r3, [r7, #4]
+ 8000ce6: 681b ldr r3, [r3, #0]
+ 8000ce8: 681b ldr r3, [r3, #0]
+ 8000cea: f403 2380 and.w r3, r3, #262144 ; 0x40000
+ 8000cee: 2b00 cmp r3, #0
+ 8000cf0: d01c beq.n 8000d2c <HAL_DMA_IRQHandler+0x260>
+ {
+ /* Current memory buffer used is Memory 0 */
+ if((hdma->Instance->CR & DMA_SxCR_CT) == RESET)
+ 8000cf2: 687b ldr r3, [r7, #4]
+ 8000cf4: 681b ldr r3, [r3, #0]
+ 8000cf6: 681b ldr r3, [r3, #0]
+ 8000cf8: f403 2300 and.w r3, r3, #524288 ; 0x80000
+ 8000cfc: 2b00 cmp r3, #0
+ 8000cfe: d108 bne.n 8000d12 <HAL_DMA_IRQHandler+0x246>
+ {
+ if(hdma->XferM1CpltCallback != NULL)
+ 8000d00: 687b ldr r3, [r7, #4]
+ 8000d02: 6c5b ldr r3, [r3, #68] ; 0x44
+ 8000d04: 2b00 cmp r3, #0
+ 8000d06: d030 beq.n 8000d6a <HAL_DMA_IRQHandler+0x29e>
+ {
+ /* Transfer complete Callback for memory1 */
+ hdma->XferM1CpltCallback(hdma);
+ 8000d08: 687b ldr r3, [r7, #4]
+ 8000d0a: 6c5b ldr r3, [r3, #68] ; 0x44
+ 8000d0c: 6878 ldr r0, [r7, #4]
+ 8000d0e: 4798 blx r3
+ 8000d10: e02b b.n 8000d6a <HAL_DMA_IRQHandler+0x29e>
+ }
+ }
+ /* Current memory buffer used is Memory 1 */
+ else
+ {
+ if(hdma->XferCpltCallback != NULL)
+ 8000d12: 687b ldr r3, [r7, #4]
+ 8000d14: 6bdb ldr r3, [r3, #60] ; 0x3c
+ 8000d16: 2b00 cmp r3, #0
+ 8000d18: d027 beq.n 8000d6a <HAL_DMA_IRQHandler+0x29e>
+ {
+ /* Transfer complete Callback for memory0 */
+ hdma->XferCpltCallback(hdma);
+ 8000d1a: 687b ldr r3, [r7, #4]
+ 8000d1c: 6bdb ldr r3, [r3, #60] ; 0x3c
+ 8000d1e: 6878 ldr r0, [r7, #4]
+ 8000d20: 4798 blx r3
+ 8000d22: e022 b.n 8000d6a <HAL_DMA_IRQHandler+0x29e>
+ 8000d24: 20000008 .word 0x20000008
+ 8000d28: 1b4e81b5 .word 0x1b4e81b5
+ }
+ }
+ /* Disable the transfer complete interrupt if the DMA mode is not CIRCULAR */
+ else
+ {
+ if((hdma->Instance->CR & DMA_SxCR_CIRC) == RESET)
+ 8000d2c: 687b ldr r3, [r7, #4]
+ 8000d2e: 681b ldr r3, [r3, #0]
+ 8000d30: 681b ldr r3, [r3, #0]
+ 8000d32: f403 7380 and.w r3, r3, #256 ; 0x100
+ 8000d36: 2b00 cmp r3, #0
+ 8000d38: d10f bne.n 8000d5a <HAL_DMA_IRQHandler+0x28e>
+ {
+ /* Disable the transfer complete interrupt */
+ hdma->Instance->CR &= ~(DMA_IT_TC);
+ 8000d3a: 687b ldr r3, [r7, #4]
+ 8000d3c: 681b ldr r3, [r3, #0]
+ 8000d3e: 681a ldr r2, [r3, #0]
+ 8000d40: 687b ldr r3, [r7, #4]
+ 8000d42: 681b ldr r3, [r3, #0]
+ 8000d44: f022 0210 bic.w r2, r2, #16
+ 8000d48: 601a str r2, [r3, #0]
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(hdma);
+ 8000d4a: 687b ldr r3, [r7, #4]
+ 8000d4c: 2200 movs r2, #0
+ 8000d4e: f883 2034 strb.w r2, [r3, #52] ; 0x34
+
+ /* Change the DMA state */
+ hdma->State = HAL_DMA_STATE_READY;
+ 8000d52: 687b ldr r3, [r7, #4]
+ 8000d54: 2201 movs r2, #1
+ 8000d56: f883 2035 strb.w r2, [r3, #53] ; 0x35
+ }
+
+ if(hdma->XferCpltCallback != NULL)
+ 8000d5a: 687b ldr r3, [r7, #4]
+ 8000d5c: 6bdb ldr r3, [r3, #60] ; 0x3c
+ 8000d5e: 2b00 cmp r3, #0
+ 8000d60: d003 beq.n 8000d6a <HAL_DMA_IRQHandler+0x29e>
+ {
+ /* Transfer complete callback */
+ hdma->XferCpltCallback(hdma);
+ 8000d62: 687b ldr r3, [r7, #4]
+ 8000d64: 6bdb ldr r3, [r3, #60] ; 0x3c
+ 8000d66: 6878 ldr r0, [r7, #4]
+ 8000d68: 4798 blx r3
+ }
+ }
+ }
+
+ /* manage error case */
+ if(hdma->ErrorCode != HAL_DMA_ERROR_NONE)
+ 8000d6a: 687b ldr r3, [r7, #4]
+ 8000d6c: 6d5b ldr r3, [r3, #84] ; 0x54
+ 8000d6e: 2b00 cmp r3, #0
+ 8000d70: d032 beq.n 8000dd8 <HAL_DMA_IRQHandler+0x30c>
+ {
+ if((hdma->ErrorCode & HAL_DMA_ERROR_TE) != RESET)
+ 8000d72: 687b ldr r3, [r7, #4]
+ 8000d74: 6d5b ldr r3, [r3, #84] ; 0x54
+ 8000d76: f003 0301 and.w r3, r3, #1
+ 8000d7a: 2b00 cmp r3, #0
+ 8000d7c: d022 beq.n 8000dc4 <HAL_DMA_IRQHandler+0x2f8>
+ {
+ hdma->State = HAL_DMA_STATE_ABORT;
+ 8000d7e: 687b ldr r3, [r7, #4]
+ 8000d80: 2205 movs r2, #5
+ 8000d82: f883 2035 strb.w r2, [r3, #53] ; 0x35
+
+ /* Disable the stream */
+ __HAL_DMA_DISABLE(hdma);
+ 8000d86: 687b ldr r3, [r7, #4]
+ 8000d88: 681b ldr r3, [r3, #0]
+ 8000d8a: 681a ldr r2, [r3, #0]
+ 8000d8c: 687b ldr r3, [r7, #4]
+ 8000d8e: 681b ldr r3, [r3, #0]
+ 8000d90: f022 0201 bic.w r2, r2, #1
+ 8000d94: 601a str r2, [r3, #0]
+
+ do
+ {
+ if (++count > timeout)
+ 8000d96: 68bb ldr r3, [r7, #8]
+ 8000d98: 3301 adds r3, #1
+ 8000d9a: 60bb str r3, [r7, #8]
+ 8000d9c: 697a ldr r2, [r7, #20]
+ 8000d9e: 429a cmp r2, r3
+ 8000da0: d307 bcc.n 8000db2 <HAL_DMA_IRQHandler+0x2e6>
+ {
+ break;
+ }
+ }
+ while((hdma->Instance->CR & DMA_SxCR_EN) != RESET);
+ 8000da2: 687b ldr r3, [r7, #4]
+ 8000da4: 681b ldr r3, [r3, #0]
+ 8000da6: 681b ldr r3, [r3, #0]
+ 8000da8: f003 0301 and.w r3, r3, #1
+ 8000dac: 2b00 cmp r3, #0
+ 8000dae: d1f2 bne.n 8000d96 <HAL_DMA_IRQHandler+0x2ca>
+ 8000db0: e000 b.n 8000db4 <HAL_DMA_IRQHandler+0x2e8>
+ break;
+ 8000db2: bf00 nop
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(hdma);
+ 8000db4: 687b ldr r3, [r7, #4]
+ 8000db6: 2200 movs r2, #0
+ 8000db8: f883 2034 strb.w r2, [r3, #52] ; 0x34
+
+ /* Change the DMA state */
+ hdma->State = HAL_DMA_STATE_READY;
+ 8000dbc: 687b ldr r3, [r7, #4]
+ 8000dbe: 2201 movs r2, #1
+ 8000dc0: f883 2035 strb.w r2, [r3, #53] ; 0x35
+ }
+
+ if(hdma->XferErrorCallback != NULL)
+ 8000dc4: 687b ldr r3, [r7, #4]
+ 8000dc6: 6cdb ldr r3, [r3, #76] ; 0x4c
+ 8000dc8: 2b00 cmp r3, #0
+ 8000dca: d005 beq.n 8000dd8 <HAL_DMA_IRQHandler+0x30c>
+ {
+ /* Transfer error callback */
+ hdma->XferErrorCallback(hdma);
+ 8000dcc: 687b ldr r3, [r7, #4]
+ 8000dce: 6cdb ldr r3, [r3, #76] ; 0x4c
+ 8000dd0: 6878 ldr r0, [r7, #4]
+ 8000dd2: 4798 blx r3
+ 8000dd4: e000 b.n 8000dd8 <HAL_DMA_IRQHandler+0x30c>
+ return;
+ 8000dd6: bf00 nop
+ }
+ }
+}
+ 8000dd8: 3718 adds r7, #24
+ 8000dda: 46bd mov sp, r7
+ 8000ddc: bd80 pop {r7, pc}
+ 8000dde: bf00 nop
+
+08000de0 <DMA_SetConfig>:
+ * @param DstAddress The destination memory Buffer address
+ * @param DataLength The length of data to be transferred from source to destination
+ * @retval HAL status
+ */
+static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
+{
+ 8000de0: b480 push {r7}
+ 8000de2: b085 sub sp, #20
+ 8000de4: af00 add r7, sp, #0
+ 8000de6: 60f8 str r0, [r7, #12]
+ 8000de8: 60b9 str r1, [r7, #8]
+ 8000dea: 607a str r2, [r7, #4]
+ 8000dec: 603b str r3, [r7, #0]
+ /* Clear DBM bit */
+ hdma->Instance->CR &= (uint32_t)(~DMA_SxCR_DBM);
+ 8000dee: 68fb ldr r3, [r7, #12]
+ 8000df0: 681b ldr r3, [r3, #0]
+ 8000df2: 681a ldr r2, [r3, #0]
+ 8000df4: 68fb ldr r3, [r7, #12]
+ 8000df6: 681b ldr r3, [r3, #0]
+ 8000df8: f422 2280 bic.w r2, r2, #262144 ; 0x40000
+ 8000dfc: 601a str r2, [r3, #0]
+
+ /* Configure DMA Stream data length */
+ hdma->Instance->NDTR = DataLength;
+ 8000dfe: 68fb ldr r3, [r7, #12]
+ 8000e00: 681b ldr r3, [r3, #0]
+ 8000e02: 683a ldr r2, [r7, #0]
+ 8000e04: 605a str r2, [r3, #4]
+
+ /* Memory to Peripheral */
+ if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
+ 8000e06: 68fb ldr r3, [r7, #12]
+ 8000e08: 689b ldr r3, [r3, #8]
+ 8000e0a: 2b40 cmp r3, #64 ; 0x40
+ 8000e0c: d108 bne.n 8000e20 <DMA_SetConfig+0x40>
+ {
+ /* Configure DMA Stream destination address */
+ hdma->Instance->PAR = DstAddress;
+ 8000e0e: 68fb ldr r3, [r7, #12]
+ 8000e10: 681b ldr r3, [r3, #0]
+ 8000e12: 687a ldr r2, [r7, #4]
+ 8000e14: 609a str r2, [r3, #8]
+
+ /* Configure DMA Stream source address */
+ hdma->Instance->M0AR = SrcAddress;
+ 8000e16: 68fb ldr r3, [r7, #12]
+ 8000e18: 681b ldr r3, [r3, #0]
+ 8000e1a: 68ba ldr r2, [r7, #8]
+ 8000e1c: 60da str r2, [r3, #12]
+ hdma->Instance->PAR = SrcAddress;
+
+ /* Configure DMA Stream destination address */
+ hdma->Instance->M0AR = DstAddress;
+ }
+}
+ 8000e1e: e007 b.n 8000e30 <DMA_SetConfig+0x50>
+ hdma->Instance->PAR = SrcAddress;
+ 8000e20: 68fb ldr r3, [r7, #12]
+ 8000e22: 681b ldr r3, [r3, #0]
+ 8000e24: 68ba ldr r2, [r7, #8]
+ 8000e26: 609a str r2, [r3, #8]
+ hdma->Instance->M0AR = DstAddress;
+ 8000e28: 68fb ldr r3, [r7, #12]
+ 8000e2a: 681b ldr r3, [r3, #0]
+ 8000e2c: 687a ldr r2, [r7, #4]
+ 8000e2e: 60da str r2, [r3, #12]
+}
+ 8000e30: bf00 nop
+ 8000e32: 3714 adds r7, #20
+ 8000e34: 46bd mov sp, r7
+ 8000e36: f85d 7b04 ldr.w r7, [sp], #4
+ 8000e3a: 4770 bx lr
+
+08000e3c <DMA_CalcBaseAndBitshift>:
+ * @param hdma pointer to a DMA_HandleTypeDef structure that contains
+ * the configuration information for the specified DMA Stream.
+ * @retval Stream base address
+ */
+static uint32_t DMA_CalcBaseAndBitshift(DMA_HandleTypeDef *hdma)
+{
+ 8000e3c: b480 push {r7}
+ 8000e3e: b085 sub sp, #20
+ 8000e40: af00 add r7, sp, #0
+ 8000e42: 6078 str r0, [r7, #4]
+ uint32_t stream_number = (((uint32_t)hdma->Instance & 0xFFU) - 16U) / 24U;
+ 8000e44: 687b ldr r3, [r7, #4]
+ 8000e46: 681b ldr r3, [r3, #0]
+ 8000e48: b2db uxtb r3, r3
+ 8000e4a: 3b10 subs r3, #16
+ 8000e4c: 4a13 ldr r2, [pc, #76] ; (8000e9c <DMA_CalcBaseAndBitshift+0x60>)
+ 8000e4e: fba2 2303 umull r2, r3, r2, r3
+ 8000e52: 091b lsrs r3, r3, #4
+ 8000e54: 60fb str r3, [r7, #12]
+
+ /* lookup table for necessary bitshift of flags within status registers */
+ static const uint8_t flagBitshiftOffset[8U] = {0U, 6U, 16U, 22U, 0U, 6U, 16U, 22U};
+ hdma->StreamIndex = flagBitshiftOffset[stream_number];
+ 8000e56: 4a12 ldr r2, [pc, #72] ; (8000ea0 <DMA_CalcBaseAndBitshift+0x64>)
+ 8000e58: 68fb ldr r3, [r7, #12]
+ 8000e5a: 4413 add r3, r2
+ 8000e5c: 781b ldrb r3, [r3, #0]
+ 8000e5e: 461a mov r2, r3
+ 8000e60: 687b ldr r3, [r7, #4]
+ 8000e62: 65da str r2, [r3, #92] ; 0x5c
+
+ if (stream_number > 3U)
+ 8000e64: 68fb ldr r3, [r7, #12]
+ 8000e66: 2b03 cmp r3, #3
+ 8000e68: d908 bls.n 8000e7c <DMA_CalcBaseAndBitshift+0x40>
+ {
+ /* return pointer to HISR and HIFCR */
+ hdma->StreamBaseAddress = (((uint32_t)hdma->Instance & (uint32_t)(~0x3FFU)) + 4U);
+ 8000e6a: 687b ldr r3, [r7, #4]
+ 8000e6c: 681b ldr r3, [r3, #0]
+ 8000e6e: 461a mov r2, r3
+ 8000e70: 4b0c ldr r3, [pc, #48] ; (8000ea4 <DMA_CalcBaseAndBitshift+0x68>)
+ 8000e72: 4013 ands r3, r2
+ 8000e74: 1d1a adds r2, r3, #4
+ 8000e76: 687b ldr r3, [r7, #4]
+ 8000e78: 659a str r2, [r3, #88] ; 0x58
+ 8000e7a: e006 b.n 8000e8a <DMA_CalcBaseAndBitshift+0x4e>
+ }
+ else
+ {
+ /* return pointer to LISR and LIFCR */
+ hdma->StreamBaseAddress = ((uint32_t)hdma->Instance & (uint32_t)(~0x3FFU));
+ 8000e7c: 687b ldr r3, [r7, #4]
+ 8000e7e: 681b ldr r3, [r3, #0]
+ 8000e80: 461a mov r2, r3
+ 8000e82: 4b08 ldr r3, [pc, #32] ; (8000ea4 <DMA_CalcBaseAndBitshift+0x68>)
+ 8000e84: 4013 ands r3, r2
+ 8000e86: 687a ldr r2, [r7, #4]
+ 8000e88: 6593 str r3, [r2, #88] ; 0x58
+ }
+
+ return hdma->StreamBaseAddress;
+ 8000e8a: 687b ldr r3, [r7, #4]
+ 8000e8c: 6d9b ldr r3, [r3, #88] ; 0x58
+}
+ 8000e8e: 4618 mov r0, r3
+ 8000e90: 3714 adds r7, #20
+ 8000e92: 46bd mov sp, r7
+ 8000e94: f85d 7b04 ldr.w r7, [sp], #4
+ 8000e98: 4770 bx lr
+ 8000e9a: bf00 nop
+ 8000e9c: aaaaaaab .word 0xaaaaaaab
+ 8000ea0: 08005f34 .word 0x08005f34
+ 8000ea4: fffffc00 .word 0xfffffc00
+
+08000ea8 <DMA_CheckFifoParam>:
+ * @param hdma pointer to a DMA_HandleTypeDef structure that contains
+ * the configuration information for the specified DMA Stream.
+ * @retval HAL status
+ */
+static HAL_StatusTypeDef DMA_CheckFifoParam(DMA_HandleTypeDef *hdma)
+{
+ 8000ea8: b480 push {r7}
+ 8000eaa: b085 sub sp, #20
+ 8000eac: af00 add r7, sp, #0
+ 8000eae: 6078 str r0, [r7, #4]
+ HAL_StatusTypeDef status = HAL_OK;
+ 8000eb0: 2300 movs r3, #0
+ 8000eb2: 73fb strb r3, [r7, #15]
+ uint32_t tmp = hdma->Init.FIFOThreshold;
+ 8000eb4: 687b ldr r3, [r7, #4]
+ 8000eb6: 6a9b ldr r3, [r3, #40] ; 0x28
+ 8000eb8: 60bb str r3, [r7, #8]
+
+ /* Memory Data size equal to Byte */
+ if(hdma->Init.MemDataAlignment == DMA_MDATAALIGN_BYTE)
+ 8000eba: 687b ldr r3, [r7, #4]
+ 8000ebc: 699b ldr r3, [r3, #24]
+ 8000ebe: 2b00 cmp r3, #0
+ 8000ec0: d11f bne.n 8000f02 <DMA_CheckFifoParam+0x5a>
+ {
+ switch (tmp)
+ 8000ec2: 68bb ldr r3, [r7, #8]
+ 8000ec4: 2b03 cmp r3, #3
+ 8000ec6: d855 bhi.n 8000f74 <DMA_CheckFifoParam+0xcc>
+ 8000ec8: a201 add r2, pc, #4 ; (adr r2, 8000ed0 <DMA_CheckFifoParam+0x28>)
+ 8000eca: f852 f023 ldr.w pc, [r2, r3, lsl #2]
+ 8000ece: bf00 nop
+ 8000ed0: 08000ee1 .word 0x08000ee1
+ 8000ed4: 08000ef3 .word 0x08000ef3
+ 8000ed8: 08000ee1 .word 0x08000ee1
+ 8000edc: 08000f75 .word 0x08000f75
+ {
+ case DMA_FIFO_THRESHOLD_1QUARTERFULL:
+ case DMA_FIFO_THRESHOLD_3QUARTERSFULL:
+ if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1)
+ 8000ee0: 687b ldr r3, [r7, #4]
+ 8000ee2: 6adb ldr r3, [r3, #44] ; 0x2c
+ 8000ee4: f003 7380 and.w r3, r3, #16777216 ; 0x1000000
+ 8000ee8: 2b00 cmp r3, #0
+ 8000eea: d045 beq.n 8000f78 <DMA_CheckFifoParam+0xd0>
+ {
+ status = HAL_ERROR;
+ 8000eec: 2301 movs r3, #1
+ 8000eee: 73fb strb r3, [r7, #15]
+ }
+ break;
+ 8000ef0: e042 b.n 8000f78 <DMA_CheckFifoParam+0xd0>
+ case DMA_FIFO_THRESHOLD_HALFFULL:
+ if (hdma->Init.MemBurst == DMA_MBURST_INC16)
+ 8000ef2: 687b ldr r3, [r7, #4]
+ 8000ef4: 6adb ldr r3, [r3, #44] ; 0x2c
+ 8000ef6: f1b3 7fc0 cmp.w r3, #25165824 ; 0x1800000
+ 8000efa: d13f bne.n 8000f7c <DMA_CheckFifoParam+0xd4>
+ {
+ status = HAL_ERROR;
+ 8000efc: 2301 movs r3, #1
+ 8000efe: 73fb strb r3, [r7, #15]
+ }
+ break;
+ 8000f00: e03c b.n 8000f7c <DMA_CheckFifoParam+0xd4>
+ break;
+ }
+ }
+
+ /* Memory Data size equal to Half-Word */
+ else if (hdma->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD)
+ 8000f02: 687b ldr r3, [r7, #4]
+ 8000f04: 699b ldr r3, [r3, #24]
+ 8000f06: f5b3 5f00 cmp.w r3, #8192 ; 0x2000
+ 8000f0a: d121 bne.n 8000f50 <DMA_CheckFifoParam+0xa8>
+ {
+ switch (tmp)
+ 8000f0c: 68bb ldr r3, [r7, #8]
+ 8000f0e: 2b03 cmp r3, #3
+ 8000f10: d836 bhi.n 8000f80 <DMA_CheckFifoParam+0xd8>
+ 8000f12: a201 add r2, pc, #4 ; (adr r2, 8000f18 <DMA_CheckFifoParam+0x70>)
+ 8000f14: f852 f023 ldr.w pc, [r2, r3, lsl #2]
+ 8000f18: 08000f29 .word 0x08000f29
+ 8000f1c: 08000f2f .word 0x08000f2f
+ 8000f20: 08000f29 .word 0x08000f29
+ 8000f24: 08000f41 .word 0x08000f41
+ {
+ case DMA_FIFO_THRESHOLD_1QUARTERFULL:
+ case DMA_FIFO_THRESHOLD_3QUARTERSFULL:
+ status = HAL_ERROR;
+ 8000f28: 2301 movs r3, #1
+ 8000f2a: 73fb strb r3, [r7, #15]
+ break;
+ 8000f2c: e02f b.n 8000f8e <DMA_CheckFifoParam+0xe6>
+ case DMA_FIFO_THRESHOLD_HALFFULL:
+ if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1)
+ 8000f2e: 687b ldr r3, [r7, #4]
+ 8000f30: 6adb ldr r3, [r3, #44] ; 0x2c
+ 8000f32: f003 7380 and.w r3, r3, #16777216 ; 0x1000000
+ 8000f36: 2b00 cmp r3, #0
+ 8000f38: d024 beq.n 8000f84 <DMA_CheckFifoParam+0xdc>
+ {
+ status = HAL_ERROR;
+ 8000f3a: 2301 movs r3, #1
+ 8000f3c: 73fb strb r3, [r7, #15]
+ }
+ break;
+ 8000f3e: e021 b.n 8000f84 <DMA_CheckFifoParam+0xdc>
+ case DMA_FIFO_THRESHOLD_FULL:
+ if (hdma->Init.MemBurst == DMA_MBURST_INC16)
+ 8000f40: 687b ldr r3, [r7, #4]
+ 8000f42: 6adb ldr r3, [r3, #44] ; 0x2c
+ 8000f44: f1b3 7fc0 cmp.w r3, #25165824 ; 0x1800000
+ 8000f48: d11e bne.n 8000f88 <DMA_CheckFifoParam+0xe0>
+ {
+ status = HAL_ERROR;
+ 8000f4a: 2301 movs r3, #1
+ 8000f4c: 73fb strb r3, [r7, #15]
+ }
+ break;
+ 8000f4e: e01b b.n 8000f88 <DMA_CheckFifoParam+0xe0>
+ }
+
+ /* Memory Data size equal to Word */
+ else
+ {
+ switch (tmp)
+ 8000f50: 68bb ldr r3, [r7, #8]
+ 8000f52: 2b02 cmp r3, #2
+ 8000f54: d902 bls.n 8000f5c <DMA_CheckFifoParam+0xb4>
+ 8000f56: 2b03 cmp r3, #3
+ 8000f58: d003 beq.n 8000f62 <DMA_CheckFifoParam+0xba>
+ {
+ status = HAL_ERROR;
+ }
+ break;
+ default:
+ break;
+ 8000f5a: e018 b.n 8000f8e <DMA_CheckFifoParam+0xe6>
+ status = HAL_ERROR;
+ 8000f5c: 2301 movs r3, #1
+ 8000f5e: 73fb strb r3, [r7, #15]
+ break;
+ 8000f60: e015 b.n 8000f8e <DMA_CheckFifoParam+0xe6>
+ if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1)
+ 8000f62: 687b ldr r3, [r7, #4]
+ 8000f64: 6adb ldr r3, [r3, #44] ; 0x2c
+ 8000f66: f003 7380 and.w r3, r3, #16777216 ; 0x1000000
+ 8000f6a: 2b00 cmp r3, #0
+ 8000f6c: d00e beq.n 8000f8c <DMA_CheckFifoParam+0xe4>
+ status = HAL_ERROR;
+ 8000f6e: 2301 movs r3, #1
+ 8000f70: 73fb strb r3, [r7, #15]
+ break;
+ 8000f72: e00b b.n 8000f8c <DMA_CheckFifoParam+0xe4>
+ break;
+ 8000f74: bf00 nop
+ 8000f76: e00a b.n 8000f8e <DMA_CheckFifoParam+0xe6>
+ break;
+ 8000f78: bf00 nop
+ 8000f7a: e008 b.n 8000f8e <DMA_CheckFifoParam+0xe6>
+ break;
+ 8000f7c: bf00 nop
+ 8000f7e: e006 b.n 8000f8e <DMA_CheckFifoParam+0xe6>
+ break;
+ 8000f80: bf00 nop
+ 8000f82: e004 b.n 8000f8e <DMA_CheckFifoParam+0xe6>
+ break;
+ 8000f84: bf00 nop
+ 8000f86: e002 b.n 8000f8e <DMA_CheckFifoParam+0xe6>
+ break;
+ 8000f88: bf00 nop
+ 8000f8a: e000 b.n 8000f8e <DMA_CheckFifoParam+0xe6>
+ break;
+ 8000f8c: bf00 nop
+ }
+ }
+
+ return status;
+ 8000f8e: 7bfb ldrb r3, [r7, #15]
+}
+ 8000f90: 4618 mov r0, r3
+ 8000f92: 3714 adds r7, #20
+ 8000f94: 46bd mov sp, r7
+ 8000f96: f85d 7b04 ldr.w r7, [sp], #4
+ 8000f9a: 4770 bx lr
+
+08000f9c <HAL_GPIO_Init>:
+ * @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains
+ * the configuration information for the specified GPIO peripheral.
+ * @retval None
+ */
+void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
+{
+ 8000f9c: b480 push {r7}
+ 8000f9e: b089 sub sp, #36 ; 0x24
+ 8000fa0: af00 add r7, sp, #0
+ 8000fa2: 6078 str r0, [r7, #4]
+ 8000fa4: 6039 str r1, [r7, #0]
+ uint32_t position = 0x00;
+ 8000fa6: 2300 movs r3, #0
+ 8000fa8: 61fb str r3, [r7, #28]
+ uint32_t ioposition = 0x00;
+ 8000faa: 2300 movs r3, #0
+ 8000fac: 617b str r3, [r7, #20]
+ uint32_t iocurrent = 0x00;
+ 8000fae: 2300 movs r3, #0
+ 8000fb0: 613b str r3, [r7, #16]
+ uint32_t temp = 0x00;
+ 8000fb2: 2300 movs r3, #0
+ 8000fb4: 61bb str r3, [r7, #24]
+ assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
+ assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
+ assert_param(IS_GPIO_PULL(GPIO_Init->Pull));
+
+ /* Configure the port pins */
+ for(position = 0; position < GPIO_NUMBER; position++)
+ 8000fb6: 2300 movs r3, #0
+ 8000fb8: 61fb str r3, [r7, #28]
+ 8000fba: e175 b.n 80012a8 <HAL_GPIO_Init+0x30c>
+ {
+ /* Get the IO position */
+ ioposition = ((uint32_t)0x01) << position;
+ 8000fbc: 2201 movs r2, #1
+ 8000fbe: 69fb ldr r3, [r7, #28]
+ 8000fc0: fa02 f303 lsl.w r3, r2, r3
+ 8000fc4: 617b str r3, [r7, #20]
+ /* Get the current IO position */
+ iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
+ 8000fc6: 683b ldr r3, [r7, #0]
+ 8000fc8: 681b ldr r3, [r3, #0]
+ 8000fca: 697a ldr r2, [r7, #20]
+ 8000fcc: 4013 ands r3, r2
+ 8000fce: 613b str r3, [r7, #16]
+
+ if(iocurrent == ioposition)
+ 8000fd0: 693a ldr r2, [r7, #16]
+ 8000fd2: 697b ldr r3, [r7, #20]
+ 8000fd4: 429a cmp r2, r3
+ 8000fd6: f040 8164 bne.w 80012a2 <HAL_GPIO_Init+0x306>
+ {
+ /*--------------------- GPIO Mode Configuration ------------------------*/
+ /* In case of Alternate function mode selection */
+ if((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
+ 8000fda: 683b ldr r3, [r7, #0]
+ 8000fdc: 685b ldr r3, [r3, #4]
+ 8000fde: 2b02 cmp r3, #2
+ 8000fe0: d003 beq.n 8000fea <HAL_GPIO_Init+0x4e>
+ 8000fe2: 683b ldr r3, [r7, #0]
+ 8000fe4: 685b ldr r3, [r3, #4]
+ 8000fe6: 2b12 cmp r3, #18
+ 8000fe8: d123 bne.n 8001032 <HAL_GPIO_Init+0x96>
+ {
+ /* Check the Alternate function parameter */
+ assert_param(IS_GPIO_AF(GPIO_Init->Alternate));
+
+ /* Configure Alternate function mapped with the current IO */
+ temp = GPIOx->AFR[position >> 3];
+ 8000fea: 69fb ldr r3, [r7, #28]
+ 8000fec: 08da lsrs r2, r3, #3
+ 8000fee: 687b ldr r3, [r7, #4]
+ 8000ff0: 3208 adds r2, #8
+ 8000ff2: f853 3022 ldr.w r3, [r3, r2, lsl #2]
+ 8000ff6: 61bb str r3, [r7, #24]
+ temp &= ~((uint32_t)0xF << ((uint32_t)(position & (uint32_t)0x07) * 4)) ;
+ 8000ff8: 69fb ldr r3, [r7, #28]
+ 8000ffa: f003 0307 and.w r3, r3, #7
+ 8000ffe: 009b lsls r3, r3, #2
+ 8001000: 220f movs r2, #15
+ 8001002: fa02 f303 lsl.w r3, r2, r3
+ 8001006: 43db mvns r3, r3
+ 8001008: 69ba ldr r2, [r7, #24]
+ 800100a: 4013 ands r3, r2
+ 800100c: 61bb str r3, [r7, #24]
+ temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & (uint32_t)0x07) * 4));
+ 800100e: 683b ldr r3, [r7, #0]
+ 8001010: 691a ldr r2, [r3, #16]
+ 8001012: 69fb ldr r3, [r7, #28]
+ 8001014: f003 0307 and.w r3, r3, #7
+ 8001018: 009b lsls r3, r3, #2
+ 800101a: fa02 f303 lsl.w r3, r2, r3
+ 800101e: 69ba ldr r2, [r7, #24]
+ 8001020: 4313 orrs r3, r2
+ 8001022: 61bb str r3, [r7, #24]
+ GPIOx->AFR[position >> 3] = temp;
+ 8001024: 69fb ldr r3, [r7, #28]
+ 8001026: 08da lsrs r2, r3, #3
+ 8001028: 687b ldr r3, [r7, #4]
+ 800102a: 3208 adds r2, #8
+ 800102c: 69b9 ldr r1, [r7, #24]
+ 800102e: f843 1022 str.w r1, [r3, r2, lsl #2]
+ }
+
+ /* Configure IO Direction mode (Input, Output, Alternate or Analog) */
+ temp = GPIOx->MODER;
+ 8001032: 687b ldr r3, [r7, #4]
+ 8001034: 681b ldr r3, [r3, #0]
+ 8001036: 61bb str r3, [r7, #24]
+ temp &= ~(GPIO_MODER_MODER0 << (position * 2));
+ 8001038: 69fb ldr r3, [r7, #28]
+ 800103a: 005b lsls r3, r3, #1
+ 800103c: 2203 movs r2, #3
+ 800103e: fa02 f303 lsl.w r3, r2, r3
+ 8001042: 43db mvns r3, r3
+ 8001044: 69ba ldr r2, [r7, #24]
+ 8001046: 4013 ands r3, r2
+ 8001048: 61bb str r3, [r7, #24]
+ temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2));
+ 800104a: 683b ldr r3, [r7, #0]
+ 800104c: 685b ldr r3, [r3, #4]
+ 800104e: f003 0203 and.w r2, r3, #3
+ 8001052: 69fb ldr r3, [r7, #28]
+ 8001054: 005b lsls r3, r3, #1
+ 8001056: fa02 f303 lsl.w r3, r2, r3
+ 800105a: 69ba ldr r2, [r7, #24]
+ 800105c: 4313 orrs r3, r2
+ 800105e: 61bb str r3, [r7, #24]
+ GPIOx->MODER = temp;
+ 8001060: 687b ldr r3, [r7, #4]
+ 8001062: 69ba ldr r2, [r7, #24]
+ 8001064: 601a str r2, [r3, #0]
+
+ /* In case of Output or Alternate function mode selection */
+ if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) ||
+ 8001066: 683b ldr r3, [r7, #0]
+ 8001068: 685b ldr r3, [r3, #4]
+ 800106a: 2b01 cmp r3, #1
+ 800106c: d00b beq.n 8001086 <HAL_GPIO_Init+0xea>
+ 800106e: 683b ldr r3, [r7, #0]
+ 8001070: 685b ldr r3, [r3, #4]
+ 8001072: 2b02 cmp r3, #2
+ 8001074: d007 beq.n 8001086 <HAL_GPIO_Init+0xea>
+ (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
+ 8001076: 683b ldr r3, [r7, #0]
+ 8001078: 685b ldr r3, [r3, #4]
+ if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) ||
+ 800107a: 2b11 cmp r3, #17
+ 800107c: d003 beq.n 8001086 <HAL_GPIO_Init+0xea>
+ (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
+ 800107e: 683b ldr r3, [r7, #0]
+ 8001080: 685b ldr r3, [r3, #4]
+ 8001082: 2b12 cmp r3, #18
+ 8001084: d130 bne.n 80010e8 <HAL_GPIO_Init+0x14c>
+ {
+ /* Check the Speed parameter */
+ assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
+ /* Configure the IO Speed */
+ temp = GPIOx->OSPEEDR;
+ 8001086: 687b ldr r3, [r7, #4]
+ 8001088: 689b ldr r3, [r3, #8]
+ 800108a: 61bb str r3, [r7, #24]
+ temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2));
+ 800108c: 69fb ldr r3, [r7, #28]
+ 800108e: 005b lsls r3, r3, #1
+ 8001090: 2203 movs r2, #3
+ 8001092: fa02 f303 lsl.w r3, r2, r3
+ 8001096: 43db mvns r3, r3
+ 8001098: 69ba ldr r2, [r7, #24]
+ 800109a: 4013 ands r3, r2
+ 800109c: 61bb str r3, [r7, #24]
+ temp |= (GPIO_Init->Speed << (position * 2));
+ 800109e: 683b ldr r3, [r7, #0]
+ 80010a0: 68da ldr r2, [r3, #12]
+ 80010a2: 69fb ldr r3, [r7, #28]
+ 80010a4: 005b lsls r3, r3, #1
+ 80010a6: fa02 f303 lsl.w r3, r2, r3
+ 80010aa: 69ba ldr r2, [r7, #24]
+ 80010ac: 4313 orrs r3, r2
+ 80010ae: 61bb str r3, [r7, #24]
+ GPIOx->OSPEEDR = temp;
+ 80010b0: 687b ldr r3, [r7, #4]
+ 80010b2: 69ba ldr r2, [r7, #24]
+ 80010b4: 609a str r2, [r3, #8]
+
+ /* Configure the IO Output Type */
+ temp = GPIOx->OTYPER;
+ 80010b6: 687b ldr r3, [r7, #4]
+ 80010b8: 685b ldr r3, [r3, #4]
+ 80010ba: 61bb str r3, [r7, #24]
+ temp &= ~(GPIO_OTYPER_OT_0 << position) ;
+ 80010bc: 2201 movs r2, #1
+ 80010be: 69fb ldr r3, [r7, #28]
+ 80010c0: fa02 f303 lsl.w r3, r2, r3
+ 80010c4: 43db mvns r3, r3
+ 80010c6: 69ba ldr r2, [r7, #24]
+ 80010c8: 4013 ands r3, r2
+ 80010ca: 61bb str r3, [r7, #24]
+ temp |= (((GPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4) << position);
+ 80010cc: 683b ldr r3, [r7, #0]
+ 80010ce: 685b ldr r3, [r3, #4]
+ 80010d0: 091b lsrs r3, r3, #4
+ 80010d2: f003 0201 and.w r2, r3, #1
+ 80010d6: 69fb ldr r3, [r7, #28]
+ 80010d8: fa02 f303 lsl.w r3, r2, r3
+ 80010dc: 69ba ldr r2, [r7, #24]
+ 80010de: 4313 orrs r3, r2
+ 80010e0: 61bb str r3, [r7, #24]
+ GPIOx->OTYPER = temp;
+ 80010e2: 687b ldr r3, [r7, #4]
+ 80010e4: 69ba ldr r2, [r7, #24]
+ 80010e6: 605a str r2, [r3, #4]
+ }
+
+ /* Activate the Pull-up or Pull down resistor for the current IO */
+ temp = GPIOx->PUPDR;
+ 80010e8: 687b ldr r3, [r7, #4]
+ 80010ea: 68db ldr r3, [r3, #12]
+ 80010ec: 61bb str r3, [r7, #24]
+ temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2));
+ 80010ee: 69fb ldr r3, [r7, #28]
+ 80010f0: 005b lsls r3, r3, #1
+ 80010f2: 2203 movs r2, #3
+ 80010f4: fa02 f303 lsl.w r3, r2, r3
+ 80010f8: 43db mvns r3, r3
+ 80010fa: 69ba ldr r2, [r7, #24]
+ 80010fc: 4013 ands r3, r2
+ 80010fe: 61bb str r3, [r7, #24]
+ temp |= ((GPIO_Init->Pull) << (position * 2));
+ 8001100: 683b ldr r3, [r7, #0]
+ 8001102: 689a ldr r2, [r3, #8]
+ 8001104: 69fb ldr r3, [r7, #28]
+ 8001106: 005b lsls r3, r3, #1
+ 8001108: fa02 f303 lsl.w r3, r2, r3
+ 800110c: 69ba ldr r2, [r7, #24]
+ 800110e: 4313 orrs r3, r2
+ 8001110: 61bb str r3, [r7, #24]
+ GPIOx->PUPDR = temp;
+ 8001112: 687b ldr r3, [r7, #4]
+ 8001114: 69ba ldr r2, [r7, #24]
+ 8001116: 60da str r2, [r3, #12]
+
+ /*--------------------- EXTI Mode Configuration ------------------------*/
+ /* Configure the External Interrupt or event for the current IO */
+ if((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
+ 8001118: 683b ldr r3, [r7, #0]
+ 800111a: 685b ldr r3, [r3, #4]
+ 800111c: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
+ 8001120: 2b00 cmp r3, #0
+ 8001122: f000 80be beq.w 80012a2 <HAL_GPIO_Init+0x306>
+ {
+ /* Enable SYSCFG Clock */
+ __HAL_RCC_SYSCFG_CLK_ENABLE();
+ 8001126: 4b65 ldr r3, [pc, #404] ; (80012bc <HAL_GPIO_Init+0x320>)
+ 8001128: 6c5b ldr r3, [r3, #68] ; 0x44
+ 800112a: 4a64 ldr r2, [pc, #400] ; (80012bc <HAL_GPIO_Init+0x320>)
+ 800112c: f443 4380 orr.w r3, r3, #16384 ; 0x4000
+ 8001130: 6453 str r3, [r2, #68] ; 0x44
+ 8001132: 4b62 ldr r3, [pc, #392] ; (80012bc <HAL_GPIO_Init+0x320>)
+ 8001134: 6c5b ldr r3, [r3, #68] ; 0x44
+ 8001136: f403 4380 and.w r3, r3, #16384 ; 0x4000
+ 800113a: 60fb str r3, [r7, #12]
+ 800113c: 68fb ldr r3, [r7, #12]
+
+ temp = SYSCFG->EXTICR[position >> 2];
+ 800113e: 4a60 ldr r2, [pc, #384] ; (80012c0 <HAL_GPIO_Init+0x324>)
+ 8001140: 69fb ldr r3, [r7, #28]
+ 8001142: 089b lsrs r3, r3, #2
+ 8001144: 3302 adds r3, #2
+ 8001146: f852 3023 ldr.w r3, [r2, r3, lsl #2]
+ 800114a: 61bb str r3, [r7, #24]
+ temp &= ~(((uint32_t)0x0F) << (4 * (position & 0x03)));
+ 800114c: 69fb ldr r3, [r7, #28]
+ 800114e: f003 0303 and.w r3, r3, #3
+ 8001152: 009b lsls r3, r3, #2
+ 8001154: 220f movs r2, #15
+ 8001156: fa02 f303 lsl.w r3, r2, r3
+ 800115a: 43db mvns r3, r3
+ 800115c: 69ba ldr r2, [r7, #24]
+ 800115e: 4013 ands r3, r2
+ 8001160: 61bb str r3, [r7, #24]
+ temp |= ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4 * (position & 0x03)));
+ 8001162: 687b ldr r3, [r7, #4]
+ 8001164: 4a57 ldr r2, [pc, #348] ; (80012c4 <HAL_GPIO_Init+0x328>)
+ 8001166: 4293 cmp r3, r2
+ 8001168: d037 beq.n 80011da <HAL_GPIO_Init+0x23e>
+ 800116a: 687b ldr r3, [r7, #4]
+ 800116c: 4a56 ldr r2, [pc, #344] ; (80012c8 <HAL_GPIO_Init+0x32c>)
+ 800116e: 4293 cmp r3, r2
+ 8001170: d031 beq.n 80011d6 <HAL_GPIO_Init+0x23a>
+ 8001172: 687b ldr r3, [r7, #4]
+ 8001174: 4a55 ldr r2, [pc, #340] ; (80012cc <HAL_GPIO_Init+0x330>)
+ 8001176: 4293 cmp r3, r2
+ 8001178: d02b beq.n 80011d2 <HAL_GPIO_Init+0x236>
+ 800117a: 687b ldr r3, [r7, #4]
+ 800117c: 4a54 ldr r2, [pc, #336] ; (80012d0 <HAL_GPIO_Init+0x334>)
+ 800117e: 4293 cmp r3, r2
+ 8001180: d025 beq.n 80011ce <HAL_GPIO_Init+0x232>
+ 8001182: 687b ldr r3, [r7, #4]
+ 8001184: 4a53 ldr r2, [pc, #332] ; (80012d4 <HAL_GPIO_Init+0x338>)
+ 8001186: 4293 cmp r3, r2
+ 8001188: d01f beq.n 80011ca <HAL_GPIO_Init+0x22e>
+ 800118a: 687b ldr r3, [r7, #4]
+ 800118c: 4a52 ldr r2, [pc, #328] ; (80012d8 <HAL_GPIO_Init+0x33c>)
+ 800118e: 4293 cmp r3, r2
+ 8001190: d019 beq.n 80011c6 <HAL_GPIO_Init+0x22a>
+ 8001192: 687b ldr r3, [r7, #4]
+ 8001194: 4a51 ldr r2, [pc, #324] ; (80012dc <HAL_GPIO_Init+0x340>)
+ 8001196: 4293 cmp r3, r2
+ 8001198: d013 beq.n 80011c2 <HAL_GPIO_Init+0x226>
+ 800119a: 687b ldr r3, [r7, #4]
+ 800119c: 4a50 ldr r2, [pc, #320] ; (80012e0 <HAL_GPIO_Init+0x344>)
+ 800119e: 4293 cmp r3, r2
+ 80011a0: d00d beq.n 80011be <HAL_GPIO_Init+0x222>
+ 80011a2: 687b ldr r3, [r7, #4]
+ 80011a4: 4a4f ldr r2, [pc, #316] ; (80012e4 <HAL_GPIO_Init+0x348>)
+ 80011a6: 4293 cmp r3, r2
+ 80011a8: d007 beq.n 80011ba <HAL_GPIO_Init+0x21e>
+ 80011aa: 687b ldr r3, [r7, #4]
+ 80011ac: 4a4e ldr r2, [pc, #312] ; (80012e8 <HAL_GPIO_Init+0x34c>)
+ 80011ae: 4293 cmp r3, r2
+ 80011b0: d101 bne.n 80011b6 <HAL_GPIO_Init+0x21a>
+ 80011b2: 2309 movs r3, #9
+ 80011b4: e012 b.n 80011dc <HAL_GPIO_Init+0x240>
+ 80011b6: 230a movs r3, #10
+ 80011b8: e010 b.n 80011dc <HAL_GPIO_Init+0x240>
+ 80011ba: 2308 movs r3, #8
+ 80011bc: e00e b.n 80011dc <HAL_GPIO_Init+0x240>
+ 80011be: 2307 movs r3, #7
+ 80011c0: e00c b.n 80011dc <HAL_GPIO_Init+0x240>
+ 80011c2: 2306 movs r3, #6
+ 80011c4: e00a b.n 80011dc <HAL_GPIO_Init+0x240>
+ 80011c6: 2305 movs r3, #5
+ 80011c8: e008 b.n 80011dc <HAL_GPIO_Init+0x240>
+ 80011ca: 2304 movs r3, #4
+ 80011cc: e006 b.n 80011dc <HAL_GPIO_Init+0x240>
+ 80011ce: 2303 movs r3, #3
+ 80011d0: e004 b.n 80011dc <HAL_GPIO_Init+0x240>
+ 80011d2: 2302 movs r3, #2
+ 80011d4: e002 b.n 80011dc <HAL_GPIO_Init+0x240>
+ 80011d6: 2301 movs r3, #1
+ 80011d8: e000 b.n 80011dc <HAL_GPIO_Init+0x240>
+ 80011da: 2300 movs r3, #0
+ 80011dc: 69fa ldr r2, [r7, #28]
+ 80011de: f002 0203 and.w r2, r2, #3
+ 80011e2: 0092 lsls r2, r2, #2
+ 80011e4: 4093 lsls r3, r2
+ 80011e6: 69ba ldr r2, [r7, #24]
+ 80011e8: 4313 orrs r3, r2
+ 80011ea: 61bb str r3, [r7, #24]
+ SYSCFG->EXTICR[position >> 2] = temp;
+ 80011ec: 4934 ldr r1, [pc, #208] ; (80012c0 <HAL_GPIO_Init+0x324>)
+ 80011ee: 69fb ldr r3, [r7, #28]
+ 80011f0: 089b lsrs r3, r3, #2
+ 80011f2: 3302 adds r3, #2
+ 80011f4: 69ba ldr r2, [r7, #24]
+ 80011f6: f841 2023 str.w r2, [r1, r3, lsl #2]
+
+ /* Clear EXTI line configuration */
+ temp = EXTI->IMR;
+ 80011fa: 4b3c ldr r3, [pc, #240] ; (80012ec <HAL_GPIO_Init+0x350>)
+ 80011fc: 681b ldr r3, [r3, #0]
+ 80011fe: 61bb str r3, [r7, #24]
+ temp &= ~((uint32_t)iocurrent);
+ 8001200: 693b ldr r3, [r7, #16]
+ 8001202: 43db mvns r3, r3
+ 8001204: 69ba ldr r2, [r7, #24]
+ 8001206: 4013 ands r3, r2
+ 8001208: 61bb str r3, [r7, #24]
+ if((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
+ 800120a: 683b ldr r3, [r7, #0]
+ 800120c: 685b ldr r3, [r3, #4]
+ 800120e: f403 3380 and.w r3, r3, #65536 ; 0x10000
+ 8001212: 2b00 cmp r3, #0
+ 8001214: d003 beq.n 800121e <HAL_GPIO_Init+0x282>
+ {
+ temp |= iocurrent;
+ 8001216: 69ba ldr r2, [r7, #24]
+ 8001218: 693b ldr r3, [r7, #16]
+ 800121a: 4313 orrs r3, r2
+ 800121c: 61bb str r3, [r7, #24]
+ }
+ EXTI->IMR = temp;
+ 800121e: 4a33 ldr r2, [pc, #204] ; (80012ec <HAL_GPIO_Init+0x350>)
+ 8001220: 69bb ldr r3, [r7, #24]
+ 8001222: 6013 str r3, [r2, #0]
+
+ temp = EXTI->EMR;
+ 8001224: 4b31 ldr r3, [pc, #196] ; (80012ec <HAL_GPIO_Init+0x350>)
+ 8001226: 685b ldr r3, [r3, #4]
+ 8001228: 61bb str r3, [r7, #24]
+ temp &= ~((uint32_t)iocurrent);
+ 800122a: 693b ldr r3, [r7, #16]
+ 800122c: 43db mvns r3, r3
+ 800122e: 69ba ldr r2, [r7, #24]
+ 8001230: 4013 ands r3, r2
+ 8001232: 61bb str r3, [r7, #24]
+ if((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
+ 8001234: 683b ldr r3, [r7, #0]
+ 8001236: 685b ldr r3, [r3, #4]
+ 8001238: f403 3300 and.w r3, r3, #131072 ; 0x20000
+ 800123c: 2b00 cmp r3, #0
+ 800123e: d003 beq.n 8001248 <HAL_GPIO_Init+0x2ac>
+ {
+ temp |= iocurrent;
+ 8001240: 69ba ldr r2, [r7, #24]
+ 8001242: 693b ldr r3, [r7, #16]
+ 8001244: 4313 orrs r3, r2
+ 8001246: 61bb str r3, [r7, #24]
+ }
+ EXTI->EMR = temp;
+ 8001248: 4a28 ldr r2, [pc, #160] ; (80012ec <HAL_GPIO_Init+0x350>)
+ 800124a: 69bb ldr r3, [r7, #24]
+ 800124c: 6053 str r3, [r2, #4]
+
+ /* Clear Rising Falling edge configuration */
+ temp = EXTI->RTSR;
+ 800124e: 4b27 ldr r3, [pc, #156] ; (80012ec <HAL_GPIO_Init+0x350>)
+ 8001250: 689b ldr r3, [r3, #8]
+ 8001252: 61bb str r3, [r7, #24]
+ temp &= ~((uint32_t)iocurrent);
+ 8001254: 693b ldr r3, [r7, #16]
+ 8001256: 43db mvns r3, r3
+ 8001258: 69ba ldr r2, [r7, #24]
+ 800125a: 4013 ands r3, r2
+ 800125c: 61bb str r3, [r7, #24]
+ if((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
+ 800125e: 683b ldr r3, [r7, #0]
+ 8001260: 685b ldr r3, [r3, #4]
+ 8001262: f403 1380 and.w r3, r3, #1048576 ; 0x100000
+ 8001266: 2b00 cmp r3, #0
+ 8001268: d003 beq.n 8001272 <HAL_GPIO_Init+0x2d6>
+ {
+ temp |= iocurrent;
+ 800126a: 69ba ldr r2, [r7, #24]
+ 800126c: 693b ldr r3, [r7, #16]
+ 800126e: 4313 orrs r3, r2
+ 8001270: 61bb str r3, [r7, #24]
+ }
+ EXTI->RTSR = temp;
+ 8001272: 4a1e ldr r2, [pc, #120] ; (80012ec <HAL_GPIO_Init+0x350>)
+ 8001274: 69bb ldr r3, [r7, #24]
+ 8001276: 6093 str r3, [r2, #8]
+
+ temp = EXTI->FTSR;
+ 8001278: 4b1c ldr r3, [pc, #112] ; (80012ec <HAL_GPIO_Init+0x350>)
+ 800127a: 68db ldr r3, [r3, #12]
+ 800127c: 61bb str r3, [r7, #24]
+ temp &= ~((uint32_t)iocurrent);
+ 800127e: 693b ldr r3, [r7, #16]
+ 8001280: 43db mvns r3, r3
+ 8001282: 69ba ldr r2, [r7, #24]
+ 8001284: 4013 ands r3, r2
+ 8001286: 61bb str r3, [r7, #24]
+ if((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
+ 8001288: 683b ldr r3, [r7, #0]
+ 800128a: 685b ldr r3, [r3, #4]
+ 800128c: f403 1300 and.w r3, r3, #2097152 ; 0x200000
+ 8001290: 2b00 cmp r3, #0
+ 8001292: d003 beq.n 800129c <HAL_GPIO_Init+0x300>
+ {
+ temp |= iocurrent;
+ 8001294: 69ba ldr r2, [r7, #24]
+ 8001296: 693b ldr r3, [r7, #16]
+ 8001298: 4313 orrs r3, r2
+ 800129a: 61bb str r3, [r7, #24]
+ }
+ EXTI->FTSR = temp;
+ 800129c: 4a13 ldr r2, [pc, #76] ; (80012ec <HAL_GPIO_Init+0x350>)
+ 800129e: 69bb ldr r3, [r7, #24]
+ 80012a0: 60d3 str r3, [r2, #12]
+ for(position = 0; position < GPIO_NUMBER; position++)
+ 80012a2: 69fb ldr r3, [r7, #28]
+ 80012a4: 3301 adds r3, #1
+ 80012a6: 61fb str r3, [r7, #28]
+ 80012a8: 69fb ldr r3, [r7, #28]
+ 80012aa: 2b0f cmp r3, #15
+ 80012ac: f67f ae86 bls.w 8000fbc <HAL_GPIO_Init+0x20>
+ }
+ }
+ }
+}
+ 80012b0: bf00 nop
+ 80012b2: 3724 adds r7, #36 ; 0x24
+ 80012b4: 46bd mov sp, r7
+ 80012b6: f85d 7b04 ldr.w r7, [sp], #4
+ 80012ba: 4770 bx lr
+ 80012bc: 40023800 .word 0x40023800
+ 80012c0: 40013800 .word 0x40013800
+ 80012c4: 40020000 .word 0x40020000
+ 80012c8: 40020400 .word 0x40020400
+ 80012cc: 40020800 .word 0x40020800
+ 80012d0: 40020c00 .word 0x40020c00
+ 80012d4: 40021000 .word 0x40021000
+ 80012d8: 40021400 .word 0x40021400
+ 80012dc: 40021800 .word 0x40021800
+ 80012e0: 40021c00 .word 0x40021c00
+ 80012e4: 40022000 .word 0x40022000
+ 80012e8: 40022400 .word 0x40022400
+ 80012ec: 40013c00 .word 0x40013c00
+
+080012f0 <HAL_RCC_OscConfig>:
+ * supported by this function. User should request a transition to HSE Off
+ * first and then HSE On or HSE Bypass.
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
+{
+ 80012f0: b580 push {r7, lr}
+ 80012f2: b086 sub sp, #24
+ 80012f4: af00 add r7, sp, #0
+ 80012f6: 6078 str r0, [r7, #4]
+ uint32_t tickstart;
+ FlagStatus pwrclkchanged = RESET;
+ 80012f8: 2300 movs r3, #0
+ 80012fa: 75fb strb r3, [r7, #23]
+
+ /* Check Null pointer */
+ if(RCC_OscInitStruct == NULL)
+ 80012fc: 687b ldr r3, [r7, #4]
+ 80012fe: 2b00 cmp r3, #0
+ 8001300: d101 bne.n 8001306 <HAL_RCC_OscConfig+0x16>
+ {
+ return HAL_ERROR;
+ 8001302: 2301 movs r3, #1
+ 8001304: e25e b.n 80017c4 <HAL_RCC_OscConfig+0x4d4>
+
+ /* Check the parameters */
+ assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
+
+ /*------------------------------- HSE Configuration ------------------------*/
+ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
+ 8001306: 687b ldr r3, [r7, #4]
+ 8001308: 681b ldr r3, [r3, #0]
+ 800130a: f003 0301 and.w r3, r3, #1
+ 800130e: 2b00 cmp r3, #0
+ 8001310: f000 8087 beq.w 8001422 <HAL_RCC_OscConfig+0x132>
+ {
+ /* Check the parameters */
+ assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
+ /* When the HSE is used as system clock or clock source for PLL, It can not be disabled */
+ if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE)
+ 8001314: 4b96 ldr r3, [pc, #600] ; (8001570 <HAL_RCC_OscConfig+0x280>)
+ 8001316: 689b ldr r3, [r3, #8]
+ 8001318: f003 030c and.w r3, r3, #12
+ 800131c: 2b04 cmp r3, #4
+ 800131e: d00c beq.n 800133a <HAL_RCC_OscConfig+0x4a>
+ || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)))
+ 8001320: 4b93 ldr r3, [pc, #588] ; (8001570 <HAL_RCC_OscConfig+0x280>)
+ 8001322: 689b ldr r3, [r3, #8]
+ 8001324: f003 030c and.w r3, r3, #12
+ 8001328: 2b08 cmp r3, #8
+ 800132a: d112 bne.n 8001352 <HAL_RCC_OscConfig+0x62>
+ 800132c: 4b90 ldr r3, [pc, #576] ; (8001570 <HAL_RCC_OscConfig+0x280>)
+ 800132e: 685b ldr r3, [r3, #4]
+ 8001330: f403 0380 and.w r3, r3, #4194304 ; 0x400000
+ 8001334: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000
+ 8001338: d10b bne.n 8001352 <HAL_RCC_OscConfig+0x62>
+ {
+ if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
+ 800133a: 4b8d ldr r3, [pc, #564] ; (8001570 <HAL_RCC_OscConfig+0x280>)
+ 800133c: 681b ldr r3, [r3, #0]
+ 800133e: f403 3300 and.w r3, r3, #131072 ; 0x20000
+ 8001342: 2b00 cmp r3, #0
+ 8001344: d06c beq.n 8001420 <HAL_RCC_OscConfig+0x130>
+ 8001346: 687b ldr r3, [r7, #4]
+ 8001348: 685b ldr r3, [r3, #4]
+ 800134a: 2b00 cmp r3, #0
+ 800134c: d168 bne.n 8001420 <HAL_RCC_OscConfig+0x130>
+ {
+ return HAL_ERROR;
+ 800134e: 2301 movs r3, #1
+ 8001350: e238 b.n 80017c4 <HAL_RCC_OscConfig+0x4d4>
+ }
+ }
+ else
+ {
+ /* Set the new HSE configuration ---------------------------------------*/
+ __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
+ 8001352: 687b ldr r3, [r7, #4]
+ 8001354: 685b ldr r3, [r3, #4]
+ 8001356: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
+ 800135a: d106 bne.n 800136a <HAL_RCC_OscConfig+0x7a>
+ 800135c: 4b84 ldr r3, [pc, #528] ; (8001570 <HAL_RCC_OscConfig+0x280>)
+ 800135e: 681b ldr r3, [r3, #0]
+ 8001360: 4a83 ldr r2, [pc, #524] ; (8001570 <HAL_RCC_OscConfig+0x280>)
+ 8001362: f443 3380 orr.w r3, r3, #65536 ; 0x10000
+ 8001366: 6013 str r3, [r2, #0]
+ 8001368: e02e b.n 80013c8 <HAL_RCC_OscConfig+0xd8>
+ 800136a: 687b ldr r3, [r7, #4]
+ 800136c: 685b ldr r3, [r3, #4]
+ 800136e: 2b00 cmp r3, #0
+ 8001370: d10c bne.n 800138c <HAL_RCC_OscConfig+0x9c>
+ 8001372: 4b7f ldr r3, [pc, #508] ; (8001570 <HAL_RCC_OscConfig+0x280>)
+ 8001374: 681b ldr r3, [r3, #0]
+ 8001376: 4a7e ldr r2, [pc, #504] ; (8001570 <HAL_RCC_OscConfig+0x280>)
+ 8001378: f423 3380 bic.w r3, r3, #65536 ; 0x10000
+ 800137c: 6013 str r3, [r2, #0]
+ 800137e: 4b7c ldr r3, [pc, #496] ; (8001570 <HAL_RCC_OscConfig+0x280>)
+ 8001380: 681b ldr r3, [r3, #0]
+ 8001382: 4a7b ldr r2, [pc, #492] ; (8001570 <HAL_RCC_OscConfig+0x280>)
+ 8001384: f423 2380 bic.w r3, r3, #262144 ; 0x40000
+ 8001388: 6013 str r3, [r2, #0]
+ 800138a: e01d b.n 80013c8 <HAL_RCC_OscConfig+0xd8>
+ 800138c: 687b ldr r3, [r7, #4]
+ 800138e: 685b ldr r3, [r3, #4]
+ 8001390: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000
+ 8001394: d10c bne.n 80013b0 <HAL_RCC_OscConfig+0xc0>
+ 8001396: 4b76 ldr r3, [pc, #472] ; (8001570 <HAL_RCC_OscConfig+0x280>)
+ 8001398: 681b ldr r3, [r3, #0]
+ 800139a: 4a75 ldr r2, [pc, #468] ; (8001570 <HAL_RCC_OscConfig+0x280>)
+ 800139c: f443 2380 orr.w r3, r3, #262144 ; 0x40000
+ 80013a0: 6013 str r3, [r2, #0]
+ 80013a2: 4b73 ldr r3, [pc, #460] ; (8001570 <HAL_RCC_OscConfig+0x280>)
+ 80013a4: 681b ldr r3, [r3, #0]
+ 80013a6: 4a72 ldr r2, [pc, #456] ; (8001570 <HAL_RCC_OscConfig+0x280>)
+ 80013a8: f443 3380 orr.w r3, r3, #65536 ; 0x10000
+ 80013ac: 6013 str r3, [r2, #0]
+ 80013ae: e00b b.n 80013c8 <HAL_RCC_OscConfig+0xd8>
+ 80013b0: 4b6f ldr r3, [pc, #444] ; (8001570 <HAL_RCC_OscConfig+0x280>)
+ 80013b2: 681b ldr r3, [r3, #0]
+ 80013b4: 4a6e ldr r2, [pc, #440] ; (8001570 <HAL_RCC_OscConfig+0x280>)
+ 80013b6: f423 3380 bic.w r3, r3, #65536 ; 0x10000
+ 80013ba: 6013 str r3, [r2, #0]
+ 80013bc: 4b6c ldr r3, [pc, #432] ; (8001570 <HAL_RCC_OscConfig+0x280>)
+ 80013be: 681b ldr r3, [r3, #0]
+ 80013c0: 4a6b ldr r2, [pc, #428] ; (8001570 <HAL_RCC_OscConfig+0x280>)
+ 80013c2: f423 2380 bic.w r3, r3, #262144 ; 0x40000
+ 80013c6: 6013 str r3, [r2, #0]
+
+ /* Check the HSE State */
+ if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
+ 80013c8: 687b ldr r3, [r7, #4]
+ 80013ca: 685b ldr r3, [r3, #4]
+ 80013cc: 2b00 cmp r3, #0
+ 80013ce: d013 beq.n 80013f8 <HAL_RCC_OscConfig+0x108>
+ {
+ /* Get Start Tick*/
+ tickstart = HAL_GetTick();
+ 80013d0: f7ff f90c bl 80005ec <HAL_GetTick>
+ 80013d4: 6138 str r0, [r7, #16]
+
+ /* Wait till HSE is ready */
+ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
+ 80013d6: e008 b.n 80013ea <HAL_RCC_OscConfig+0xfa>
+ {
+ if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
+ 80013d8: f7ff f908 bl 80005ec <HAL_GetTick>
+ 80013dc: 4602 mov r2, r0
+ 80013de: 693b ldr r3, [r7, #16]
+ 80013e0: 1ad3 subs r3, r2, r3
+ 80013e2: 2b64 cmp r3, #100 ; 0x64
+ 80013e4: d901 bls.n 80013ea <HAL_RCC_OscConfig+0xfa>
+ {
+ return HAL_TIMEOUT;
+ 80013e6: 2303 movs r3, #3
+ 80013e8: e1ec b.n 80017c4 <HAL_RCC_OscConfig+0x4d4>
+ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
+ 80013ea: 4b61 ldr r3, [pc, #388] ; (8001570 <HAL_RCC_OscConfig+0x280>)
+ 80013ec: 681b ldr r3, [r3, #0]
+ 80013ee: f403 3300 and.w r3, r3, #131072 ; 0x20000
+ 80013f2: 2b00 cmp r3, #0
+ 80013f4: d0f0 beq.n 80013d8 <HAL_RCC_OscConfig+0xe8>
+ 80013f6: e014 b.n 8001422 <HAL_RCC_OscConfig+0x132>
+ }
+ }
+ else
+ {
+ /* Get Start Tick*/
+ tickstart = HAL_GetTick();
+ 80013f8: f7ff f8f8 bl 80005ec <HAL_GetTick>
+ 80013fc: 6138 str r0, [r7, #16]
+
+ /* Wait till HSE is bypassed or disabled */
+ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
+ 80013fe: e008 b.n 8001412 <HAL_RCC_OscConfig+0x122>
+ {
+ if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
+ 8001400: f7ff f8f4 bl 80005ec <HAL_GetTick>
+ 8001404: 4602 mov r2, r0
+ 8001406: 693b ldr r3, [r7, #16]
+ 8001408: 1ad3 subs r3, r2, r3
+ 800140a: 2b64 cmp r3, #100 ; 0x64
+ 800140c: d901 bls.n 8001412 <HAL_RCC_OscConfig+0x122>
+ {
+ return HAL_TIMEOUT;
+ 800140e: 2303 movs r3, #3
+ 8001410: e1d8 b.n 80017c4 <HAL_RCC_OscConfig+0x4d4>
+ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
+ 8001412: 4b57 ldr r3, [pc, #348] ; (8001570 <HAL_RCC_OscConfig+0x280>)
+ 8001414: 681b ldr r3, [r3, #0]
+ 8001416: f403 3300 and.w r3, r3, #131072 ; 0x20000
+ 800141a: 2b00 cmp r3, #0
+ 800141c: d1f0 bne.n 8001400 <HAL_RCC_OscConfig+0x110>
+ 800141e: e000 b.n 8001422 <HAL_RCC_OscConfig+0x132>
+ if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
+ 8001420: bf00 nop
+ }
+ }
+ }
+ }
+ /*----------------------------- HSI Configuration --------------------------*/
+ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
+ 8001422: 687b ldr r3, [r7, #4]
+ 8001424: 681b ldr r3, [r3, #0]
+ 8001426: f003 0302 and.w r3, r3, #2
+ 800142a: 2b00 cmp r3, #0
+ 800142c: d069 beq.n 8001502 <HAL_RCC_OscConfig+0x212>
+ /* Check the parameters */
+ assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
+ assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
+
+ /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
+ if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI)
+ 800142e: 4b50 ldr r3, [pc, #320] ; (8001570 <HAL_RCC_OscConfig+0x280>)
+ 8001430: 689b ldr r3, [r3, #8]
+ 8001432: f003 030c and.w r3, r3, #12
+ 8001436: 2b00 cmp r3, #0
+ 8001438: d00b beq.n 8001452 <HAL_RCC_OscConfig+0x162>
+ || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)))
+ 800143a: 4b4d ldr r3, [pc, #308] ; (8001570 <HAL_RCC_OscConfig+0x280>)
+ 800143c: 689b ldr r3, [r3, #8]
+ 800143e: f003 030c and.w r3, r3, #12
+ 8001442: 2b08 cmp r3, #8
+ 8001444: d11c bne.n 8001480 <HAL_RCC_OscConfig+0x190>
+ 8001446: 4b4a ldr r3, [pc, #296] ; (8001570 <HAL_RCC_OscConfig+0x280>)
+ 8001448: 685b ldr r3, [r3, #4]
+ 800144a: f403 0380 and.w r3, r3, #4194304 ; 0x400000
+ 800144e: 2b00 cmp r3, #0
+ 8001450: d116 bne.n 8001480 <HAL_RCC_OscConfig+0x190>
+ {
+ /* When HSI is used as system clock it will not disabled */
+ if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
+ 8001452: 4b47 ldr r3, [pc, #284] ; (8001570 <HAL_RCC_OscConfig+0x280>)
+ 8001454: 681b ldr r3, [r3, #0]
+ 8001456: f003 0302 and.w r3, r3, #2
+ 800145a: 2b00 cmp r3, #0
+ 800145c: d005 beq.n 800146a <HAL_RCC_OscConfig+0x17a>
+ 800145e: 687b ldr r3, [r7, #4]
+ 8001460: 68db ldr r3, [r3, #12]
+ 8001462: 2b01 cmp r3, #1
+ 8001464: d001 beq.n 800146a <HAL_RCC_OscConfig+0x17a>
+ {
+ return HAL_ERROR;
+ 8001466: 2301 movs r3, #1
+ 8001468: e1ac b.n 80017c4 <HAL_RCC_OscConfig+0x4d4>
+ }
+ /* Otherwise, just the calibration is allowed */
+ else
+ {
+ /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
+ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
+ 800146a: 4b41 ldr r3, [pc, #260] ; (8001570 <HAL_RCC_OscConfig+0x280>)
+ 800146c: 681b ldr r3, [r3, #0]
+ 800146e: f023 02f8 bic.w r2, r3, #248 ; 0xf8
+ 8001472: 687b ldr r3, [r7, #4]
+ 8001474: 691b ldr r3, [r3, #16]
+ 8001476: 00db lsls r3, r3, #3
+ 8001478: 493d ldr r1, [pc, #244] ; (8001570 <HAL_RCC_OscConfig+0x280>)
+ 800147a: 4313 orrs r3, r2
+ 800147c: 600b str r3, [r1, #0]
+ if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
+ 800147e: e040 b.n 8001502 <HAL_RCC_OscConfig+0x212>
+ }
+ }
+ else
+ {
+ /* Check the HSI State */
+ if((RCC_OscInitStruct->HSIState)!= RCC_HSI_OFF)
+ 8001480: 687b ldr r3, [r7, #4]
+ 8001482: 68db ldr r3, [r3, #12]
+ 8001484: 2b00 cmp r3, #0
+ 8001486: d023 beq.n 80014d0 <HAL_RCC_OscConfig+0x1e0>
+ {
+ /* Enable the Internal High Speed oscillator (HSI). */
+ __HAL_RCC_HSI_ENABLE();
+ 8001488: 4b39 ldr r3, [pc, #228] ; (8001570 <HAL_RCC_OscConfig+0x280>)
+ 800148a: 681b ldr r3, [r3, #0]
+ 800148c: 4a38 ldr r2, [pc, #224] ; (8001570 <HAL_RCC_OscConfig+0x280>)
+ 800148e: f043 0301 orr.w r3, r3, #1
+ 8001492: 6013 str r3, [r2, #0]
+
+ /* Get Start Tick*/
+ tickstart = HAL_GetTick();
+ 8001494: f7ff f8aa bl 80005ec <HAL_GetTick>
+ 8001498: 6138 str r0, [r7, #16]
+
+ /* Wait till HSI is ready */
+ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
+ 800149a: e008 b.n 80014ae <HAL_RCC_OscConfig+0x1be>
+ {
+ if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
+ 800149c: f7ff f8a6 bl 80005ec <HAL_GetTick>
+ 80014a0: 4602 mov r2, r0
+ 80014a2: 693b ldr r3, [r7, #16]
+ 80014a4: 1ad3 subs r3, r2, r3
+ 80014a6: 2b02 cmp r3, #2
+ 80014a8: d901 bls.n 80014ae <HAL_RCC_OscConfig+0x1be>
+ {
+ return HAL_TIMEOUT;
+ 80014aa: 2303 movs r3, #3
+ 80014ac: e18a b.n 80017c4 <HAL_RCC_OscConfig+0x4d4>
+ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
+ 80014ae: 4b30 ldr r3, [pc, #192] ; (8001570 <HAL_RCC_OscConfig+0x280>)
+ 80014b0: 681b ldr r3, [r3, #0]
+ 80014b2: f003 0302 and.w r3, r3, #2
+ 80014b6: 2b00 cmp r3, #0
+ 80014b8: d0f0 beq.n 800149c <HAL_RCC_OscConfig+0x1ac>
+ }
+ }
+
+ /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
+ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
+ 80014ba: 4b2d ldr r3, [pc, #180] ; (8001570 <HAL_RCC_OscConfig+0x280>)
+ 80014bc: 681b ldr r3, [r3, #0]
+ 80014be: f023 02f8 bic.w r2, r3, #248 ; 0xf8
+ 80014c2: 687b ldr r3, [r7, #4]
+ 80014c4: 691b ldr r3, [r3, #16]
+ 80014c6: 00db lsls r3, r3, #3
+ 80014c8: 4929 ldr r1, [pc, #164] ; (8001570 <HAL_RCC_OscConfig+0x280>)
+ 80014ca: 4313 orrs r3, r2
+ 80014cc: 600b str r3, [r1, #0]
+ 80014ce: e018 b.n 8001502 <HAL_RCC_OscConfig+0x212>
+ }
+ else
+ {
+ /* Disable the Internal High Speed oscillator (HSI). */
+ __HAL_RCC_HSI_DISABLE();
+ 80014d0: 4b27 ldr r3, [pc, #156] ; (8001570 <HAL_RCC_OscConfig+0x280>)
+ 80014d2: 681b ldr r3, [r3, #0]
+ 80014d4: 4a26 ldr r2, [pc, #152] ; (8001570 <HAL_RCC_OscConfig+0x280>)
+ 80014d6: f023 0301 bic.w r3, r3, #1
+ 80014da: 6013 str r3, [r2, #0]
+
+ /* Get Start Tick*/
+ tickstart = HAL_GetTick();
+ 80014dc: f7ff f886 bl 80005ec <HAL_GetTick>
+ 80014e0: 6138 str r0, [r7, #16]
+
+ /* Wait till HSI is ready */
+ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
+ 80014e2: e008 b.n 80014f6 <HAL_RCC_OscConfig+0x206>
+ {
+ if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
+ 80014e4: f7ff f882 bl 80005ec <HAL_GetTick>
+ 80014e8: 4602 mov r2, r0
+ 80014ea: 693b ldr r3, [r7, #16]
+ 80014ec: 1ad3 subs r3, r2, r3
+ 80014ee: 2b02 cmp r3, #2
+ 80014f0: d901 bls.n 80014f6 <HAL_RCC_OscConfig+0x206>
+ {
+ return HAL_TIMEOUT;
+ 80014f2: 2303 movs r3, #3
+ 80014f4: e166 b.n 80017c4 <HAL_RCC_OscConfig+0x4d4>
+ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
+ 80014f6: 4b1e ldr r3, [pc, #120] ; (8001570 <HAL_RCC_OscConfig+0x280>)
+ 80014f8: 681b ldr r3, [r3, #0]
+ 80014fa: f003 0302 and.w r3, r3, #2
+ 80014fe: 2b00 cmp r3, #0
+ 8001500: d1f0 bne.n 80014e4 <HAL_RCC_OscConfig+0x1f4>
+ }
+ }
+ }
+ }
+ /*------------------------------ LSI Configuration -------------------------*/
+ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
+ 8001502: 687b ldr r3, [r7, #4]
+ 8001504: 681b ldr r3, [r3, #0]
+ 8001506: f003 0308 and.w r3, r3, #8
+ 800150a: 2b00 cmp r3, #0
+ 800150c: d038 beq.n 8001580 <HAL_RCC_OscConfig+0x290>
+ {
+ /* Check the parameters */
+ assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
+
+ /* Check the LSI State */
+ if((RCC_OscInitStruct->LSIState)!= RCC_LSI_OFF)
+ 800150e: 687b ldr r3, [r7, #4]
+ 8001510: 695b ldr r3, [r3, #20]
+ 8001512: 2b00 cmp r3, #0
+ 8001514: d019 beq.n 800154a <HAL_RCC_OscConfig+0x25a>
+ {
+ /* Enable the Internal Low Speed oscillator (LSI). */
+ __HAL_RCC_LSI_ENABLE();
+ 8001516: 4b16 ldr r3, [pc, #88] ; (8001570 <HAL_RCC_OscConfig+0x280>)
+ 8001518: 6f5b ldr r3, [r3, #116] ; 0x74
+ 800151a: 4a15 ldr r2, [pc, #84] ; (8001570 <HAL_RCC_OscConfig+0x280>)
+ 800151c: f043 0301 orr.w r3, r3, #1
+ 8001520: 6753 str r3, [r2, #116] ; 0x74
+
+ /* Get Start Tick*/
+ tickstart = HAL_GetTick();
+ 8001522: f7ff f863 bl 80005ec <HAL_GetTick>
+ 8001526: 6138 str r0, [r7, #16]
+
+ /* Wait till LSI is ready */
+ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
+ 8001528: e008 b.n 800153c <HAL_RCC_OscConfig+0x24c>
+ {
+ if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
+ 800152a: f7ff f85f bl 80005ec <HAL_GetTick>
+ 800152e: 4602 mov r2, r0
+ 8001530: 693b ldr r3, [r7, #16]
+ 8001532: 1ad3 subs r3, r2, r3
+ 8001534: 2b02 cmp r3, #2
+ 8001536: d901 bls.n 800153c <HAL_RCC_OscConfig+0x24c>
+ {
+ return HAL_TIMEOUT;
+ 8001538: 2303 movs r3, #3
+ 800153a: e143 b.n 80017c4 <HAL_RCC_OscConfig+0x4d4>
+ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
+ 800153c: 4b0c ldr r3, [pc, #48] ; (8001570 <HAL_RCC_OscConfig+0x280>)
+ 800153e: 6f5b ldr r3, [r3, #116] ; 0x74
+ 8001540: f003 0302 and.w r3, r3, #2
+ 8001544: 2b00 cmp r3, #0
+ 8001546: d0f0 beq.n 800152a <HAL_RCC_OscConfig+0x23a>
+ 8001548: e01a b.n 8001580 <HAL_RCC_OscConfig+0x290>
+ }
+ }
+ else
+ {
+ /* Disable the Internal Low Speed oscillator (LSI). */
+ __HAL_RCC_LSI_DISABLE();
+ 800154a: 4b09 ldr r3, [pc, #36] ; (8001570 <HAL_RCC_OscConfig+0x280>)
+ 800154c: 6f5b ldr r3, [r3, #116] ; 0x74
+ 800154e: 4a08 ldr r2, [pc, #32] ; (8001570 <HAL_RCC_OscConfig+0x280>)
+ 8001550: f023 0301 bic.w r3, r3, #1
+ 8001554: 6753 str r3, [r2, #116] ; 0x74
+
+ /* Get Start Tick*/
+ tickstart = HAL_GetTick();
+ 8001556: f7ff f849 bl 80005ec <HAL_GetTick>
+ 800155a: 6138 str r0, [r7, #16]
+
+ /* Wait till LSI is ready */
+ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
+ 800155c: e00a b.n 8001574 <HAL_RCC_OscConfig+0x284>
+ {
+ if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
+ 800155e: f7ff f845 bl 80005ec <HAL_GetTick>
+ 8001562: 4602 mov r2, r0
+ 8001564: 693b ldr r3, [r7, #16]
+ 8001566: 1ad3 subs r3, r2, r3
+ 8001568: 2b02 cmp r3, #2
+ 800156a: d903 bls.n 8001574 <HAL_RCC_OscConfig+0x284>
+ {
+ return HAL_TIMEOUT;
+ 800156c: 2303 movs r3, #3
+ 800156e: e129 b.n 80017c4 <HAL_RCC_OscConfig+0x4d4>
+ 8001570: 40023800 .word 0x40023800
+ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
+ 8001574: 4b95 ldr r3, [pc, #596] ; (80017cc <HAL_RCC_OscConfig+0x4dc>)
+ 8001576: 6f5b ldr r3, [r3, #116] ; 0x74
+ 8001578: f003 0302 and.w r3, r3, #2
+ 800157c: 2b00 cmp r3, #0
+ 800157e: d1ee bne.n 800155e <HAL_RCC_OscConfig+0x26e>
+ }
+ }
+ }
+ }
+ /*------------------------------ LSE Configuration -------------------------*/
+ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
+ 8001580: 687b ldr r3, [r7, #4]
+ 8001582: 681b ldr r3, [r3, #0]
+ 8001584: f003 0304 and.w r3, r3, #4
+ 8001588: 2b00 cmp r3, #0
+ 800158a: f000 80a4 beq.w 80016d6 <HAL_RCC_OscConfig+0x3e6>
+ /* Check the parameters */
+ assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
+
+ /* Update LSE configuration in Backup Domain control register */
+ /* Requires to enable write access to Backup Domain of necessary */
+ if(__HAL_RCC_PWR_IS_CLK_DISABLED())
+ 800158e: 4b8f ldr r3, [pc, #572] ; (80017cc <HAL_RCC_OscConfig+0x4dc>)
+ 8001590: 6c1b ldr r3, [r3, #64] ; 0x40
+ 8001592: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
+ 8001596: 2b00 cmp r3, #0
+ 8001598: d10d bne.n 80015b6 <HAL_RCC_OscConfig+0x2c6>
+ {
+ /* Enable Power Clock*/
+ __HAL_RCC_PWR_CLK_ENABLE();
+ 800159a: 4b8c ldr r3, [pc, #560] ; (80017cc <HAL_RCC_OscConfig+0x4dc>)
+ 800159c: 6c1b ldr r3, [r3, #64] ; 0x40
+ 800159e: 4a8b ldr r2, [pc, #556] ; (80017cc <HAL_RCC_OscConfig+0x4dc>)
+ 80015a0: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
+ 80015a4: 6413 str r3, [r2, #64] ; 0x40
+ 80015a6: 4b89 ldr r3, [pc, #548] ; (80017cc <HAL_RCC_OscConfig+0x4dc>)
+ 80015a8: 6c1b ldr r3, [r3, #64] ; 0x40
+ 80015aa: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
+ 80015ae: 60fb str r3, [r7, #12]
+ 80015b0: 68fb ldr r3, [r7, #12]
+ pwrclkchanged = SET;
+ 80015b2: 2301 movs r3, #1
+ 80015b4: 75fb strb r3, [r7, #23]
+ }
+
+ if(HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP))
+ 80015b6: 4b86 ldr r3, [pc, #536] ; (80017d0 <HAL_RCC_OscConfig+0x4e0>)
+ 80015b8: 681b ldr r3, [r3, #0]
+ 80015ba: f403 7380 and.w r3, r3, #256 ; 0x100
+ 80015be: 2b00 cmp r3, #0
+ 80015c0: d118 bne.n 80015f4 <HAL_RCC_OscConfig+0x304>
+ {
+ /* Enable write access to Backup domain */
+ PWR->CR1 |= PWR_CR1_DBP;
+ 80015c2: 4b83 ldr r3, [pc, #524] ; (80017d0 <HAL_RCC_OscConfig+0x4e0>)
+ 80015c4: 681b ldr r3, [r3, #0]
+ 80015c6: 4a82 ldr r2, [pc, #520] ; (80017d0 <HAL_RCC_OscConfig+0x4e0>)
+ 80015c8: f443 7380 orr.w r3, r3, #256 ; 0x100
+ 80015cc: 6013 str r3, [r2, #0]
+
+ /* Wait for Backup domain Write protection disable */
+ tickstart = HAL_GetTick();
+ 80015ce: f7ff f80d bl 80005ec <HAL_GetTick>
+ 80015d2: 6138 str r0, [r7, #16]
+
+ while(HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP))
+ 80015d4: e008 b.n 80015e8 <HAL_RCC_OscConfig+0x2f8>
+ {
+ if((HAL_GetTick() - tickstart ) > RCC_DBP_TIMEOUT_VALUE)
+ 80015d6: f7ff f809 bl 80005ec <HAL_GetTick>
+ 80015da: 4602 mov r2, r0
+ 80015dc: 693b ldr r3, [r7, #16]
+ 80015de: 1ad3 subs r3, r2, r3
+ 80015e0: 2b64 cmp r3, #100 ; 0x64
+ 80015e2: d901 bls.n 80015e8 <HAL_RCC_OscConfig+0x2f8>
+ {
+ return HAL_TIMEOUT;
+ 80015e4: 2303 movs r3, #3
+ 80015e6: e0ed b.n 80017c4 <HAL_RCC_OscConfig+0x4d4>
+ while(HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP))
+ 80015e8: 4b79 ldr r3, [pc, #484] ; (80017d0 <HAL_RCC_OscConfig+0x4e0>)
+ 80015ea: 681b ldr r3, [r3, #0]
+ 80015ec: f403 7380 and.w r3, r3, #256 ; 0x100
+ 80015f0: 2b00 cmp r3, #0
+ 80015f2: d0f0 beq.n 80015d6 <HAL_RCC_OscConfig+0x2e6>
+ }
+ }
+ }
+
+ /* Set the new LSE configuration -----------------------------------------*/
+ __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
+ 80015f4: 687b ldr r3, [r7, #4]
+ 80015f6: 689b ldr r3, [r3, #8]
+ 80015f8: 2b01 cmp r3, #1
+ 80015fa: d106 bne.n 800160a <HAL_RCC_OscConfig+0x31a>
+ 80015fc: 4b73 ldr r3, [pc, #460] ; (80017cc <HAL_RCC_OscConfig+0x4dc>)
+ 80015fe: 6f1b ldr r3, [r3, #112] ; 0x70
+ 8001600: 4a72 ldr r2, [pc, #456] ; (80017cc <HAL_RCC_OscConfig+0x4dc>)
+ 8001602: f043 0301 orr.w r3, r3, #1
+ 8001606: 6713 str r3, [r2, #112] ; 0x70
+ 8001608: e02d b.n 8001666 <HAL_RCC_OscConfig+0x376>
+ 800160a: 687b ldr r3, [r7, #4]
+ 800160c: 689b ldr r3, [r3, #8]
+ 800160e: 2b00 cmp r3, #0
+ 8001610: d10c bne.n 800162c <HAL_RCC_OscConfig+0x33c>
+ 8001612: 4b6e ldr r3, [pc, #440] ; (80017cc <HAL_RCC_OscConfig+0x4dc>)
+ 8001614: 6f1b ldr r3, [r3, #112] ; 0x70
+ 8001616: 4a6d ldr r2, [pc, #436] ; (80017cc <HAL_RCC_OscConfig+0x4dc>)
+ 8001618: f023 0301 bic.w r3, r3, #1
+ 800161c: 6713 str r3, [r2, #112] ; 0x70
+ 800161e: 4b6b ldr r3, [pc, #428] ; (80017cc <HAL_RCC_OscConfig+0x4dc>)
+ 8001620: 6f1b ldr r3, [r3, #112] ; 0x70
+ 8001622: 4a6a ldr r2, [pc, #424] ; (80017cc <HAL_RCC_OscConfig+0x4dc>)
+ 8001624: f023 0304 bic.w r3, r3, #4
+ 8001628: 6713 str r3, [r2, #112] ; 0x70
+ 800162a: e01c b.n 8001666 <HAL_RCC_OscConfig+0x376>
+ 800162c: 687b ldr r3, [r7, #4]
+ 800162e: 689b ldr r3, [r3, #8]
+ 8001630: 2b05 cmp r3, #5
+ 8001632: d10c bne.n 800164e <HAL_RCC_OscConfig+0x35e>
+ 8001634: 4b65 ldr r3, [pc, #404] ; (80017cc <HAL_RCC_OscConfig+0x4dc>)
+ 8001636: 6f1b ldr r3, [r3, #112] ; 0x70
+ 8001638: 4a64 ldr r2, [pc, #400] ; (80017cc <HAL_RCC_OscConfig+0x4dc>)
+ 800163a: f043 0304 orr.w r3, r3, #4
+ 800163e: 6713 str r3, [r2, #112] ; 0x70
+ 8001640: 4b62 ldr r3, [pc, #392] ; (80017cc <HAL_RCC_OscConfig+0x4dc>)
+ 8001642: 6f1b ldr r3, [r3, #112] ; 0x70
+ 8001644: 4a61 ldr r2, [pc, #388] ; (80017cc <HAL_RCC_OscConfig+0x4dc>)
+ 8001646: f043 0301 orr.w r3, r3, #1
+ 800164a: 6713 str r3, [r2, #112] ; 0x70
+ 800164c: e00b b.n 8001666 <HAL_RCC_OscConfig+0x376>
+ 800164e: 4b5f ldr r3, [pc, #380] ; (80017cc <HAL_RCC_OscConfig+0x4dc>)
+ 8001650: 6f1b ldr r3, [r3, #112] ; 0x70
+ 8001652: 4a5e ldr r2, [pc, #376] ; (80017cc <HAL_RCC_OscConfig+0x4dc>)
+ 8001654: f023 0301 bic.w r3, r3, #1
+ 8001658: 6713 str r3, [r2, #112] ; 0x70
+ 800165a: 4b5c ldr r3, [pc, #368] ; (80017cc <HAL_RCC_OscConfig+0x4dc>)
+ 800165c: 6f1b ldr r3, [r3, #112] ; 0x70
+ 800165e: 4a5b ldr r2, [pc, #364] ; (80017cc <HAL_RCC_OscConfig+0x4dc>)
+ 8001660: f023 0304 bic.w r3, r3, #4
+ 8001664: 6713 str r3, [r2, #112] ; 0x70
+ /* Check the LSE State */
+ if((RCC_OscInitStruct->LSEState) != RCC_LSE_OFF)
+ 8001666: 687b ldr r3, [r7, #4]
+ 8001668: 689b ldr r3, [r3, #8]
+ 800166a: 2b00 cmp r3, #0
+ 800166c: d015 beq.n 800169a <HAL_RCC_OscConfig+0x3aa>
+ {
+ /* Get Start Tick*/
+ tickstart = HAL_GetTick();
+ 800166e: f7fe ffbd bl 80005ec <HAL_GetTick>
+ 8001672: 6138 str r0, [r7, #16]
+
+ /* Wait till LSE is ready */
+ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
+ 8001674: e00a b.n 800168c <HAL_RCC_OscConfig+0x39c>
+ {
+ if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
+ 8001676: f7fe ffb9 bl 80005ec <HAL_GetTick>
+ 800167a: 4602 mov r2, r0
+ 800167c: 693b ldr r3, [r7, #16]
+ 800167e: 1ad3 subs r3, r2, r3
+ 8001680: f241 3288 movw r2, #5000 ; 0x1388
+ 8001684: 4293 cmp r3, r2
+ 8001686: d901 bls.n 800168c <HAL_RCC_OscConfig+0x39c>
+ {
+ return HAL_TIMEOUT;
+ 8001688: 2303 movs r3, #3
+ 800168a: e09b b.n 80017c4 <HAL_RCC_OscConfig+0x4d4>
+ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
+ 800168c: 4b4f ldr r3, [pc, #316] ; (80017cc <HAL_RCC_OscConfig+0x4dc>)
+ 800168e: 6f1b ldr r3, [r3, #112] ; 0x70
+ 8001690: f003 0302 and.w r3, r3, #2
+ 8001694: 2b00 cmp r3, #0
+ 8001696: d0ee beq.n 8001676 <HAL_RCC_OscConfig+0x386>
+ 8001698: e014 b.n 80016c4 <HAL_RCC_OscConfig+0x3d4>
+ }
+ }
+ else
+ {
+ /* Get Start Tick*/
+ tickstart = HAL_GetTick();
+ 800169a: f7fe ffa7 bl 80005ec <HAL_GetTick>
+ 800169e: 6138 str r0, [r7, #16]
+
+ /* Wait till LSE is ready */
+ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
+ 80016a0: e00a b.n 80016b8 <HAL_RCC_OscConfig+0x3c8>
+ {
+ if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
+ 80016a2: f7fe ffa3 bl 80005ec <HAL_GetTick>
+ 80016a6: 4602 mov r2, r0
+ 80016a8: 693b ldr r3, [r7, #16]
+ 80016aa: 1ad3 subs r3, r2, r3
+ 80016ac: f241 3288 movw r2, #5000 ; 0x1388
+ 80016b0: 4293 cmp r3, r2
+ 80016b2: d901 bls.n 80016b8 <HAL_RCC_OscConfig+0x3c8>
+ {
+ return HAL_TIMEOUT;
+ 80016b4: 2303 movs r3, #3
+ 80016b6: e085 b.n 80017c4 <HAL_RCC_OscConfig+0x4d4>
+ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
+ 80016b8: 4b44 ldr r3, [pc, #272] ; (80017cc <HAL_RCC_OscConfig+0x4dc>)
+ 80016ba: 6f1b ldr r3, [r3, #112] ; 0x70
+ 80016bc: f003 0302 and.w r3, r3, #2
+ 80016c0: 2b00 cmp r3, #0
+ 80016c2: d1ee bne.n 80016a2 <HAL_RCC_OscConfig+0x3b2>
+ }
+ }
+ }
+
+ /* Restore clock configuration if changed */
+ if(pwrclkchanged == SET)
+ 80016c4: 7dfb ldrb r3, [r7, #23]
+ 80016c6: 2b01 cmp r3, #1
+ 80016c8: d105 bne.n 80016d6 <HAL_RCC_OscConfig+0x3e6>
+ {
+ __HAL_RCC_PWR_CLK_DISABLE();
+ 80016ca: 4b40 ldr r3, [pc, #256] ; (80017cc <HAL_RCC_OscConfig+0x4dc>)
+ 80016cc: 6c1b ldr r3, [r3, #64] ; 0x40
+ 80016ce: 4a3f ldr r2, [pc, #252] ; (80017cc <HAL_RCC_OscConfig+0x4dc>)
+ 80016d0: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000
+ 80016d4: 6413 str r3, [r2, #64] ; 0x40
+ }
+ }
+ /*-------------------------------- PLL Configuration -----------------------*/
+ /* Check the parameters */
+ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
+ if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
+ 80016d6: 687b ldr r3, [r7, #4]
+ 80016d8: 699b ldr r3, [r3, #24]
+ 80016da: 2b00 cmp r3, #0
+ 80016dc: d071 beq.n 80017c2 <HAL_RCC_OscConfig+0x4d2>
+ {
+ /* Check if the PLL is used as system clock or not */
+ if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
+ 80016de: 4b3b ldr r3, [pc, #236] ; (80017cc <HAL_RCC_OscConfig+0x4dc>)
+ 80016e0: 689b ldr r3, [r3, #8]
+ 80016e2: f003 030c and.w r3, r3, #12
+ 80016e6: 2b08 cmp r3, #8
+ 80016e8: d069 beq.n 80017be <HAL_RCC_OscConfig+0x4ce>
+ {
+ if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
+ 80016ea: 687b ldr r3, [r7, #4]
+ 80016ec: 699b ldr r3, [r3, #24]
+ 80016ee: 2b02 cmp r3, #2
+ 80016f0: d14b bne.n 800178a <HAL_RCC_OscConfig+0x49a>
+#if defined (RCC_PLLCFGR_PLLR)
+ assert_param(IS_RCC_PLLR_VALUE(RCC_OscInitStruct->PLL.PLLR));
+#endif
+
+ /* Disable the main PLL. */
+ __HAL_RCC_PLL_DISABLE();
+ 80016f2: 4b36 ldr r3, [pc, #216] ; (80017cc <HAL_RCC_OscConfig+0x4dc>)
+ 80016f4: 681b ldr r3, [r3, #0]
+ 80016f6: 4a35 ldr r2, [pc, #212] ; (80017cc <HAL_RCC_OscConfig+0x4dc>)
+ 80016f8: f023 7380 bic.w r3, r3, #16777216 ; 0x1000000
+ 80016fc: 6013 str r3, [r2, #0]
+
+ /* Get Start Tick*/
+ tickstart = HAL_GetTick();
+ 80016fe: f7fe ff75 bl 80005ec <HAL_GetTick>
+ 8001702: 6138 str r0, [r7, #16]
+
+ /* Wait till PLL is ready */
+ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
+ 8001704: e008 b.n 8001718 <HAL_RCC_OscConfig+0x428>
+ {
+ if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
+ 8001706: f7fe ff71 bl 80005ec <HAL_GetTick>
+ 800170a: 4602 mov r2, r0
+ 800170c: 693b ldr r3, [r7, #16]
+ 800170e: 1ad3 subs r3, r2, r3
+ 8001710: 2b02 cmp r3, #2
+ 8001712: d901 bls.n 8001718 <HAL_RCC_OscConfig+0x428>
+ {
+ return HAL_TIMEOUT;
+ 8001714: 2303 movs r3, #3
+ 8001716: e055 b.n 80017c4 <HAL_RCC_OscConfig+0x4d4>
+ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
+ 8001718: 4b2c ldr r3, [pc, #176] ; (80017cc <HAL_RCC_OscConfig+0x4dc>)
+ 800171a: 681b ldr r3, [r3, #0]
+ 800171c: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
+ 8001720: 2b00 cmp r3, #0
+ 8001722: d1f0 bne.n 8001706 <HAL_RCC_OscConfig+0x416>
+ }
+ }
+
+ /* Configure the main PLL clock source, multiplication and division factors. */
+#if defined (RCC_PLLCFGR_PLLR)
+ __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
+ 8001724: 687b ldr r3, [r7, #4]
+ 8001726: 69da ldr r2, [r3, #28]
+ 8001728: 687b ldr r3, [r7, #4]
+ 800172a: 6a1b ldr r3, [r3, #32]
+ 800172c: 431a orrs r2, r3
+ 800172e: 687b ldr r3, [r7, #4]
+ 8001730: 6a5b ldr r3, [r3, #36] ; 0x24
+ 8001732: 019b lsls r3, r3, #6
+ 8001734: 431a orrs r2, r3
+ 8001736: 687b ldr r3, [r7, #4]
+ 8001738: 6a9b ldr r3, [r3, #40] ; 0x28
+ 800173a: 085b lsrs r3, r3, #1
+ 800173c: 3b01 subs r3, #1
+ 800173e: 041b lsls r3, r3, #16
+ 8001740: 431a orrs r2, r3
+ 8001742: 687b ldr r3, [r7, #4]
+ 8001744: 6adb ldr r3, [r3, #44] ; 0x2c
+ 8001746: 061b lsls r3, r3, #24
+ 8001748: 431a orrs r2, r3
+ 800174a: 687b ldr r3, [r7, #4]
+ 800174c: 6b1b ldr r3, [r3, #48] ; 0x30
+ 800174e: 071b lsls r3, r3, #28
+ 8001750: 491e ldr r1, [pc, #120] ; (80017cc <HAL_RCC_OscConfig+0x4dc>)
+ 8001752: 4313 orrs r3, r2
+ 8001754: 604b str r3, [r1, #4]
+ RCC_OscInitStruct->PLL.PLLP,
+ RCC_OscInitStruct->PLL.PLLQ);
+#endif
+
+ /* Enable the main PLL. */
+ __HAL_RCC_PLL_ENABLE();
+ 8001756: 4b1d ldr r3, [pc, #116] ; (80017cc <HAL_RCC_OscConfig+0x4dc>)
+ 8001758: 681b ldr r3, [r3, #0]
+ 800175a: 4a1c ldr r2, [pc, #112] ; (80017cc <HAL_RCC_OscConfig+0x4dc>)
+ 800175c: f043 7380 orr.w r3, r3, #16777216 ; 0x1000000
+ 8001760: 6013 str r3, [r2, #0]
+
+ /* Get Start Tick*/
+ tickstart = HAL_GetTick();
+ 8001762: f7fe ff43 bl 80005ec <HAL_GetTick>
+ 8001766: 6138 str r0, [r7, #16]
+
+ /* Wait till PLL is ready */
+ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
+ 8001768: e008 b.n 800177c <HAL_RCC_OscConfig+0x48c>
+ {
+ if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
+ 800176a: f7fe ff3f bl 80005ec <HAL_GetTick>
+ 800176e: 4602 mov r2, r0
+ 8001770: 693b ldr r3, [r7, #16]
+ 8001772: 1ad3 subs r3, r2, r3
+ 8001774: 2b02 cmp r3, #2
+ 8001776: d901 bls.n 800177c <HAL_RCC_OscConfig+0x48c>
+ {
+ return HAL_TIMEOUT;
+ 8001778: 2303 movs r3, #3
+ 800177a: e023 b.n 80017c4 <HAL_RCC_OscConfig+0x4d4>
+ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
+ 800177c: 4b13 ldr r3, [pc, #76] ; (80017cc <HAL_RCC_OscConfig+0x4dc>)
+ 800177e: 681b ldr r3, [r3, #0]
+ 8001780: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
+ 8001784: 2b00 cmp r3, #0
+ 8001786: d0f0 beq.n 800176a <HAL_RCC_OscConfig+0x47a>
+ 8001788: e01b b.n 80017c2 <HAL_RCC_OscConfig+0x4d2>
+ }
+ }
+ else
+ {
+ /* Disable the main PLL. */
+ __HAL_RCC_PLL_DISABLE();
+ 800178a: 4b10 ldr r3, [pc, #64] ; (80017cc <HAL_RCC_OscConfig+0x4dc>)
+ 800178c: 681b ldr r3, [r3, #0]
+ 800178e: 4a0f ldr r2, [pc, #60] ; (80017cc <HAL_RCC_OscConfig+0x4dc>)
+ 8001790: f023 7380 bic.w r3, r3, #16777216 ; 0x1000000
+ 8001794: 6013 str r3, [r2, #0]
+
+ /* Get Start Tick*/
+ tickstart = HAL_GetTick();
+ 8001796: f7fe ff29 bl 80005ec <HAL_GetTick>
+ 800179a: 6138 str r0, [r7, #16]
+
+ /* Wait till PLL is ready */
+ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
+ 800179c: e008 b.n 80017b0 <HAL_RCC_OscConfig+0x4c0>
+ {
+ if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
+ 800179e: f7fe ff25 bl 80005ec <HAL_GetTick>
+ 80017a2: 4602 mov r2, r0
+ 80017a4: 693b ldr r3, [r7, #16]
+ 80017a6: 1ad3 subs r3, r2, r3
+ 80017a8: 2b02 cmp r3, #2
+ 80017aa: d901 bls.n 80017b0 <HAL_RCC_OscConfig+0x4c0>
+ {
+ return HAL_TIMEOUT;
+ 80017ac: 2303 movs r3, #3
+ 80017ae: e009 b.n 80017c4 <HAL_RCC_OscConfig+0x4d4>
+ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
+ 80017b0: 4b06 ldr r3, [pc, #24] ; (80017cc <HAL_RCC_OscConfig+0x4dc>)
+ 80017b2: 681b ldr r3, [r3, #0]
+ 80017b4: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
+ 80017b8: 2b00 cmp r3, #0
+ 80017ba: d1f0 bne.n 800179e <HAL_RCC_OscConfig+0x4ae>
+ 80017bc: e001 b.n 80017c2 <HAL_RCC_OscConfig+0x4d2>
+ }
+ }
+ }
+ else
+ {
+ return HAL_ERROR;
+ 80017be: 2301 movs r3, #1
+ 80017c0: e000 b.n 80017c4 <HAL_RCC_OscConfig+0x4d4>
+ }
+ }
+ return HAL_OK;
+ 80017c2: 2300 movs r3, #0
+}
+ 80017c4: 4618 mov r0, r3
+ 80017c6: 3718 adds r7, #24
+ 80017c8: 46bd mov sp, r7
+ 80017ca: bd80 pop {r7, pc}
+ 80017cc: 40023800 .word 0x40023800
+ 80017d0: 40007000 .word 0x40007000
+
+080017d4 <HAL_RCC_ClockConfig>:
+ * HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency
+ * (for more details refer to section above "Initialization/de-initialization functions")
+ * @retval None
+ */
+HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
+{
+ 80017d4: b580 push {r7, lr}
+ 80017d6: b084 sub sp, #16
+ 80017d8: af00 add r7, sp, #0
+ 80017da: 6078 str r0, [r7, #4]
+ 80017dc: 6039 str r1, [r7, #0]
+ uint32_t tickstart = 0;
+ 80017de: 2300 movs r3, #0
+ 80017e0: 60fb str r3, [r7, #12]
+
+ /* Check Null pointer */
+ if(RCC_ClkInitStruct == NULL)
+ 80017e2: 687b ldr r3, [r7, #4]
+ 80017e4: 2b00 cmp r3, #0
+ 80017e6: d101 bne.n 80017ec <HAL_RCC_ClockConfig+0x18>
+ {
+ return HAL_ERROR;
+ 80017e8: 2301 movs r3, #1
+ 80017ea: e0ce b.n 800198a <HAL_RCC_ClockConfig+0x1b6>
+ /* To correctly read data from FLASH memory, the number of wait states (LATENCY)
+ must be correctly programmed according to the frequency of the CPU clock
+ (HCLK) and the supply voltage of the device. */
+
+ /* Increasing the CPU frequency */
+ if(FLatency > __HAL_FLASH_GET_LATENCY())
+ 80017ec: 4b69 ldr r3, [pc, #420] ; (8001994 <HAL_RCC_ClockConfig+0x1c0>)
+ 80017ee: 681b ldr r3, [r3, #0]
+ 80017f0: f003 030f and.w r3, r3, #15
+ 80017f4: 683a ldr r2, [r7, #0]
+ 80017f6: 429a cmp r2, r3
+ 80017f8: d910 bls.n 800181c <HAL_RCC_ClockConfig+0x48>
+ {
+ /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
+ __HAL_FLASH_SET_LATENCY(FLatency);
+ 80017fa: 4b66 ldr r3, [pc, #408] ; (8001994 <HAL_RCC_ClockConfig+0x1c0>)
+ 80017fc: 681b ldr r3, [r3, #0]
+ 80017fe: f023 020f bic.w r2, r3, #15
+ 8001802: 4964 ldr r1, [pc, #400] ; (8001994 <HAL_RCC_ClockConfig+0x1c0>)
+ 8001804: 683b ldr r3, [r7, #0]
+ 8001806: 4313 orrs r3, r2
+ 8001808: 600b str r3, [r1, #0]
+
+ /* Check that the new number of wait states is taken into account to access the Flash
+ memory by reading the FLASH_ACR register */
+ if(__HAL_FLASH_GET_LATENCY() != FLatency)
+ 800180a: 4b62 ldr r3, [pc, #392] ; (8001994 <HAL_RCC_ClockConfig+0x1c0>)
+ 800180c: 681b ldr r3, [r3, #0]
+ 800180e: f003 030f and.w r3, r3, #15
+ 8001812: 683a ldr r2, [r7, #0]
+ 8001814: 429a cmp r2, r3
+ 8001816: d001 beq.n 800181c <HAL_RCC_ClockConfig+0x48>
+ {
+ return HAL_ERROR;
+ 8001818: 2301 movs r3, #1
+ 800181a: e0b6 b.n 800198a <HAL_RCC_ClockConfig+0x1b6>
+ }
+ }
+
+ /*-------------------------- HCLK Configuration --------------------------*/
+ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
+ 800181c: 687b ldr r3, [r7, #4]
+ 800181e: 681b ldr r3, [r3, #0]
+ 8001820: f003 0302 and.w r3, r3, #2
+ 8001824: 2b00 cmp r3, #0
+ 8001826: d020 beq.n 800186a <HAL_RCC_ClockConfig+0x96>
+ {
+ /* Set the highest APBx dividers in order to ensure that we do not go through
+ a non-spec phase whatever we decrease or increase HCLK. */
+ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
+ 8001828: 687b ldr r3, [r7, #4]
+ 800182a: 681b ldr r3, [r3, #0]
+ 800182c: f003 0304 and.w r3, r3, #4
+ 8001830: 2b00 cmp r3, #0
+ 8001832: d005 beq.n 8001840 <HAL_RCC_ClockConfig+0x6c>
+ {
+ MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
+ 8001834: 4b58 ldr r3, [pc, #352] ; (8001998 <HAL_RCC_ClockConfig+0x1c4>)
+ 8001836: 689b ldr r3, [r3, #8]
+ 8001838: 4a57 ldr r2, [pc, #348] ; (8001998 <HAL_RCC_ClockConfig+0x1c4>)
+ 800183a: f443 53e0 orr.w r3, r3, #7168 ; 0x1c00
+ 800183e: 6093 str r3, [r2, #8]
+ }
+
+ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
+ 8001840: 687b ldr r3, [r7, #4]
+ 8001842: 681b ldr r3, [r3, #0]
+ 8001844: f003 0308 and.w r3, r3, #8
+ 8001848: 2b00 cmp r3, #0
+ 800184a: d005 beq.n 8001858 <HAL_RCC_ClockConfig+0x84>
+ {
+ MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
+ 800184c: 4b52 ldr r3, [pc, #328] ; (8001998 <HAL_RCC_ClockConfig+0x1c4>)
+ 800184e: 689b ldr r3, [r3, #8]
+ 8001850: 4a51 ldr r2, [pc, #324] ; (8001998 <HAL_RCC_ClockConfig+0x1c4>)
+ 8001852: f443 4360 orr.w r3, r3, #57344 ; 0xe000
+ 8001856: 6093 str r3, [r2, #8]
+ }
+
+ /* Set the new HCLK clock divider */
+ assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
+ MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
+ 8001858: 4b4f ldr r3, [pc, #316] ; (8001998 <HAL_RCC_ClockConfig+0x1c4>)
+ 800185a: 689b ldr r3, [r3, #8]
+ 800185c: f023 02f0 bic.w r2, r3, #240 ; 0xf0
+ 8001860: 687b ldr r3, [r7, #4]
+ 8001862: 689b ldr r3, [r3, #8]
+ 8001864: 494c ldr r1, [pc, #304] ; (8001998 <HAL_RCC_ClockConfig+0x1c4>)
+ 8001866: 4313 orrs r3, r2
+ 8001868: 608b str r3, [r1, #8]
+ }
+
+ /*------------------------- SYSCLK Configuration ---------------------------*/
+ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
+ 800186a: 687b ldr r3, [r7, #4]
+ 800186c: 681b ldr r3, [r3, #0]
+ 800186e: f003 0301 and.w r3, r3, #1
+ 8001872: 2b00 cmp r3, #0
+ 8001874: d040 beq.n 80018f8 <HAL_RCC_ClockConfig+0x124>
+ {
+ assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
+
+ /* HSE is selected as System Clock Source */
+ if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
+ 8001876: 687b ldr r3, [r7, #4]
+ 8001878: 685b ldr r3, [r3, #4]
+ 800187a: 2b01 cmp r3, #1
+ 800187c: d107 bne.n 800188e <HAL_RCC_ClockConfig+0xba>
+ {
+ /* Check the HSE ready flag */
+ if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
+ 800187e: 4b46 ldr r3, [pc, #280] ; (8001998 <HAL_RCC_ClockConfig+0x1c4>)
+ 8001880: 681b ldr r3, [r3, #0]
+ 8001882: f403 3300 and.w r3, r3, #131072 ; 0x20000
+ 8001886: 2b00 cmp r3, #0
+ 8001888: d115 bne.n 80018b6 <HAL_RCC_ClockConfig+0xe2>
+ {
+ return HAL_ERROR;
+ 800188a: 2301 movs r3, #1
+ 800188c: e07d b.n 800198a <HAL_RCC_ClockConfig+0x1b6>
+ }
+ }
+ /* PLL is selected as System Clock Source */
+ else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
+ 800188e: 687b ldr r3, [r7, #4]
+ 8001890: 685b ldr r3, [r3, #4]
+ 8001892: 2b02 cmp r3, #2
+ 8001894: d107 bne.n 80018a6 <HAL_RCC_ClockConfig+0xd2>
+ {
+ /* Check the PLL ready flag */
+ if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
+ 8001896: 4b40 ldr r3, [pc, #256] ; (8001998 <HAL_RCC_ClockConfig+0x1c4>)
+ 8001898: 681b ldr r3, [r3, #0]
+ 800189a: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
+ 800189e: 2b00 cmp r3, #0
+ 80018a0: d109 bne.n 80018b6 <HAL_RCC_ClockConfig+0xe2>
+ {
+ return HAL_ERROR;
+ 80018a2: 2301 movs r3, #1
+ 80018a4: e071 b.n 800198a <HAL_RCC_ClockConfig+0x1b6>
+ }
+ /* HSI is selected as System Clock Source */
+ else
+ {
+ /* Check the HSI ready flag */
+ if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
+ 80018a6: 4b3c ldr r3, [pc, #240] ; (8001998 <HAL_RCC_ClockConfig+0x1c4>)
+ 80018a8: 681b ldr r3, [r3, #0]
+ 80018aa: f003 0302 and.w r3, r3, #2
+ 80018ae: 2b00 cmp r3, #0
+ 80018b0: d101 bne.n 80018b6 <HAL_RCC_ClockConfig+0xe2>
+ {
+ return HAL_ERROR;
+ 80018b2: 2301 movs r3, #1
+ 80018b4: e069 b.n 800198a <HAL_RCC_ClockConfig+0x1b6>
+ }
+ }
+
+ __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
+ 80018b6: 4b38 ldr r3, [pc, #224] ; (8001998 <HAL_RCC_ClockConfig+0x1c4>)
+ 80018b8: 689b ldr r3, [r3, #8]
+ 80018ba: f023 0203 bic.w r2, r3, #3
+ 80018be: 687b ldr r3, [r7, #4]
+ 80018c0: 685b ldr r3, [r3, #4]
+ 80018c2: 4935 ldr r1, [pc, #212] ; (8001998 <HAL_RCC_ClockConfig+0x1c4>)
+ 80018c4: 4313 orrs r3, r2
+ 80018c6: 608b str r3, [r1, #8]
+
+ /* Get Start Tick*/
+ tickstart = HAL_GetTick();
+ 80018c8: f7fe fe90 bl 80005ec <HAL_GetTick>
+ 80018cc: 60f8 str r0, [r7, #12]
+
+ while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
+ 80018ce: e00a b.n 80018e6 <HAL_RCC_ClockConfig+0x112>
+ {
+ if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
+ 80018d0: f7fe fe8c bl 80005ec <HAL_GetTick>
+ 80018d4: 4602 mov r2, r0
+ 80018d6: 68fb ldr r3, [r7, #12]
+ 80018d8: 1ad3 subs r3, r2, r3
+ 80018da: f241 3288 movw r2, #5000 ; 0x1388
+ 80018de: 4293 cmp r3, r2
+ 80018e0: d901 bls.n 80018e6 <HAL_RCC_ClockConfig+0x112>
+ {
+ return HAL_TIMEOUT;
+ 80018e2: 2303 movs r3, #3
+ 80018e4: e051 b.n 800198a <HAL_RCC_ClockConfig+0x1b6>
+ while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
+ 80018e6: 4b2c ldr r3, [pc, #176] ; (8001998 <HAL_RCC_ClockConfig+0x1c4>)
+ 80018e8: 689b ldr r3, [r3, #8]
+ 80018ea: f003 020c and.w r2, r3, #12
+ 80018ee: 687b ldr r3, [r7, #4]
+ 80018f0: 685b ldr r3, [r3, #4]
+ 80018f2: 009b lsls r3, r3, #2
+ 80018f4: 429a cmp r2, r3
+ 80018f6: d1eb bne.n 80018d0 <HAL_RCC_ClockConfig+0xfc>
+ }
+ }
+ }
+
+ /* Decreasing the number of wait states because of lower CPU frequency */
+ if(FLatency < __HAL_FLASH_GET_LATENCY())
+ 80018f8: 4b26 ldr r3, [pc, #152] ; (8001994 <HAL_RCC_ClockConfig+0x1c0>)
+ 80018fa: 681b ldr r3, [r3, #0]
+ 80018fc: f003 030f and.w r3, r3, #15
+ 8001900: 683a ldr r2, [r7, #0]
+ 8001902: 429a cmp r2, r3
+ 8001904: d210 bcs.n 8001928 <HAL_RCC_ClockConfig+0x154>
+ {
+ /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
+ __HAL_FLASH_SET_LATENCY(FLatency);
+ 8001906: 4b23 ldr r3, [pc, #140] ; (8001994 <HAL_RCC_ClockConfig+0x1c0>)
+ 8001908: 681b ldr r3, [r3, #0]
+ 800190a: f023 020f bic.w r2, r3, #15
+ 800190e: 4921 ldr r1, [pc, #132] ; (8001994 <HAL_RCC_ClockConfig+0x1c0>)
+ 8001910: 683b ldr r3, [r7, #0]
+ 8001912: 4313 orrs r3, r2
+ 8001914: 600b str r3, [r1, #0]
+
+ /* Check that the new number of wait states is taken into account to access the Flash
+ memory by reading the FLASH_ACR register */
+ if(__HAL_FLASH_GET_LATENCY() != FLatency)
+ 8001916: 4b1f ldr r3, [pc, #124] ; (8001994 <HAL_RCC_ClockConfig+0x1c0>)
+ 8001918: 681b ldr r3, [r3, #0]
+ 800191a: f003 030f and.w r3, r3, #15
+ 800191e: 683a ldr r2, [r7, #0]
+ 8001920: 429a cmp r2, r3
+ 8001922: d001 beq.n 8001928 <HAL_RCC_ClockConfig+0x154>
+ {
+ return HAL_ERROR;
+ 8001924: 2301 movs r3, #1
+ 8001926: e030 b.n 800198a <HAL_RCC_ClockConfig+0x1b6>
+ }
+ }
+
+ /*-------------------------- PCLK1 Configuration ---------------------------*/
+ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
+ 8001928: 687b ldr r3, [r7, #4]
+ 800192a: 681b ldr r3, [r3, #0]
+ 800192c: f003 0304 and.w r3, r3, #4
+ 8001930: 2b00 cmp r3, #0
+ 8001932: d008 beq.n 8001946 <HAL_RCC_ClockConfig+0x172>
+ {
+ assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
+ MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
+ 8001934: 4b18 ldr r3, [pc, #96] ; (8001998 <HAL_RCC_ClockConfig+0x1c4>)
+ 8001936: 689b ldr r3, [r3, #8]
+ 8001938: f423 52e0 bic.w r2, r3, #7168 ; 0x1c00
+ 800193c: 687b ldr r3, [r7, #4]
+ 800193e: 68db ldr r3, [r3, #12]
+ 8001940: 4915 ldr r1, [pc, #84] ; (8001998 <HAL_RCC_ClockConfig+0x1c4>)
+ 8001942: 4313 orrs r3, r2
+ 8001944: 608b str r3, [r1, #8]
+ }
+
+ /*-------------------------- PCLK2 Configuration ---------------------------*/
+ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
+ 8001946: 687b ldr r3, [r7, #4]
+ 8001948: 681b ldr r3, [r3, #0]
+ 800194a: f003 0308 and.w r3, r3, #8
+ 800194e: 2b00 cmp r3, #0
+ 8001950: d009 beq.n 8001966 <HAL_RCC_ClockConfig+0x192>
+ {
+ assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
+ MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
+ 8001952: 4b11 ldr r3, [pc, #68] ; (8001998 <HAL_RCC_ClockConfig+0x1c4>)
+ 8001954: 689b ldr r3, [r3, #8]
+ 8001956: f423 4260 bic.w r2, r3, #57344 ; 0xe000
+ 800195a: 687b ldr r3, [r7, #4]
+ 800195c: 691b ldr r3, [r3, #16]
+ 800195e: 00db lsls r3, r3, #3
+ 8001960: 490d ldr r1, [pc, #52] ; (8001998 <HAL_RCC_ClockConfig+0x1c4>)
+ 8001962: 4313 orrs r3, r2
+ 8001964: 608b str r3, [r1, #8]
+ }
+
+ /* Update the SystemCoreClock global variable */
+ SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos];
+ 8001966: f000 f81d bl 80019a4 <HAL_RCC_GetSysClockFreq>
+ 800196a: 4601 mov r1, r0
+ 800196c: 4b0a ldr r3, [pc, #40] ; (8001998 <HAL_RCC_ClockConfig+0x1c4>)
+ 800196e: 689b ldr r3, [r3, #8]
+ 8001970: 091b lsrs r3, r3, #4
+ 8001972: f003 030f and.w r3, r3, #15
+ 8001976: 4a09 ldr r2, [pc, #36] ; (800199c <HAL_RCC_ClockConfig+0x1c8>)
+ 8001978: 5cd3 ldrb r3, [r2, r3]
+ 800197a: fa21 f303 lsr.w r3, r1, r3
+ 800197e: 4a08 ldr r2, [pc, #32] ; (80019a0 <HAL_RCC_ClockConfig+0x1cc>)
+ 8001980: 6013 str r3, [r2, #0]
+
+ /* Configure the source of time base considering new system clocks settings*/
+ HAL_InitTick (TICK_INT_PRIORITY);
+ 8001982: 2000 movs r0, #0
+ 8001984: f7fe fdee bl 8000564 <HAL_InitTick>
+
+ return HAL_OK;
+ 8001988: 2300 movs r3, #0
+}
+ 800198a: 4618 mov r0, r3
+ 800198c: 3710 adds r7, #16
+ 800198e: 46bd mov sp, r7
+ 8001990: bd80 pop {r7, pc}
+ 8001992: bf00 nop
+ 8001994: 40023c00 .word 0x40023c00
+ 8001998: 40023800 .word 0x40023800
+ 800199c: 08006010 .word 0x08006010
+ 80019a0: 20000008 .word 0x20000008
+
+080019a4 <HAL_RCC_GetSysClockFreq>:
+ *
+ *
+ * @retval SYSCLK frequency
+ */
+uint32_t HAL_RCC_GetSysClockFreq(void)
+{
+ 80019a4: b5f0 push {r4, r5, r6, r7, lr}
+ 80019a6: b085 sub sp, #20
+ 80019a8: af00 add r7, sp, #0
+ uint32_t pllm = 0, pllvco = 0, pllp = 0;
+ 80019aa: 2300 movs r3, #0
+ 80019ac: 607b str r3, [r7, #4]
+ 80019ae: 2300 movs r3, #0
+ 80019b0: 60fb str r3, [r7, #12]
+ 80019b2: 2300 movs r3, #0
+ 80019b4: 603b str r3, [r7, #0]
+ uint32_t sysclockfreq = 0;
+ 80019b6: 2300 movs r3, #0
+ 80019b8: 60bb str r3, [r7, #8]
+
+ /* Get SYSCLK source -------------------------------------------------------*/
+ switch (RCC->CFGR & RCC_CFGR_SWS)
+ 80019ba: 4b50 ldr r3, [pc, #320] ; (8001afc <HAL_RCC_GetSysClockFreq+0x158>)
+ 80019bc: 689b ldr r3, [r3, #8]
+ 80019be: f003 030c and.w r3, r3, #12
+ 80019c2: 2b04 cmp r3, #4
+ 80019c4: d007 beq.n 80019d6 <HAL_RCC_GetSysClockFreq+0x32>
+ 80019c6: 2b08 cmp r3, #8
+ 80019c8: d008 beq.n 80019dc <HAL_RCC_GetSysClockFreq+0x38>
+ 80019ca: 2b00 cmp r3, #0
+ 80019cc: f040 808d bne.w 8001aea <HAL_RCC_GetSysClockFreq+0x146>
+ {
+ case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */
+ {
+ sysclockfreq = HSI_VALUE;
+ 80019d0: 4b4b ldr r3, [pc, #300] ; (8001b00 <HAL_RCC_GetSysClockFreq+0x15c>)
+ 80019d2: 60bb str r3, [r7, #8]
+ break;
+ 80019d4: e08c b.n 8001af0 <HAL_RCC_GetSysClockFreq+0x14c>
+ }
+ case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock source */
+ {
+ sysclockfreq = HSE_VALUE;
+ 80019d6: 4b4b ldr r3, [pc, #300] ; (8001b04 <HAL_RCC_GetSysClockFreq+0x160>)
+ 80019d8: 60bb str r3, [r7, #8]
+ break;
+ 80019da: e089 b.n 8001af0 <HAL_RCC_GetSysClockFreq+0x14c>
+ }
+ case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock source */
+ {
+ /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+ SYSCLK = PLL_VCO / PLLP */
+ pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
+ 80019dc: 4b47 ldr r3, [pc, #284] ; (8001afc <HAL_RCC_GetSysClockFreq+0x158>)
+ 80019de: 685b ldr r3, [r3, #4]
+ 80019e0: f003 033f and.w r3, r3, #63 ; 0x3f
+ 80019e4: 607b str r3, [r7, #4]
+ if (__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLCFGR_PLLSRC_HSI)
+ 80019e6: 4b45 ldr r3, [pc, #276] ; (8001afc <HAL_RCC_GetSysClockFreq+0x158>)
+ 80019e8: 685b ldr r3, [r3, #4]
+ 80019ea: f403 0380 and.w r3, r3, #4194304 ; 0x400000
+ 80019ee: 2b00 cmp r3, #0
+ 80019f0: d023 beq.n 8001a3a <HAL_RCC_GetSysClockFreq+0x96>
+ {
+ /* HSE used as PLL clock source */
+ pllvco = (uint32_t) ((((uint64_t) HSE_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm);
+ 80019f2: 4b42 ldr r3, [pc, #264] ; (8001afc <HAL_RCC_GetSysClockFreq+0x158>)
+ 80019f4: 685b ldr r3, [r3, #4]
+ 80019f6: 099b lsrs r3, r3, #6
+ 80019f8: f04f 0400 mov.w r4, #0
+ 80019fc: f240 11ff movw r1, #511 ; 0x1ff
+ 8001a00: f04f 0200 mov.w r2, #0
+ 8001a04: ea03 0501 and.w r5, r3, r1
+ 8001a08: ea04 0602 and.w r6, r4, r2
+ 8001a0c: 4a3d ldr r2, [pc, #244] ; (8001b04 <HAL_RCC_GetSysClockFreq+0x160>)
+ 8001a0e: fb02 f106 mul.w r1, r2, r6
+ 8001a12: 2200 movs r2, #0
+ 8001a14: fb02 f205 mul.w r2, r2, r5
+ 8001a18: 440a add r2, r1
+ 8001a1a: 493a ldr r1, [pc, #232] ; (8001b04 <HAL_RCC_GetSysClockFreq+0x160>)
+ 8001a1c: fba5 0101 umull r0, r1, r5, r1
+ 8001a20: 1853 adds r3, r2, r1
+ 8001a22: 4619 mov r1, r3
+ 8001a24: 687b ldr r3, [r7, #4]
+ 8001a26: f04f 0400 mov.w r4, #0
+ 8001a2a: 461a mov r2, r3
+ 8001a2c: 4623 mov r3, r4
+ 8001a2e: f7fe fc0b bl 8000248 <__aeabi_uldivmod>
+ 8001a32: 4603 mov r3, r0
+ 8001a34: 460c mov r4, r1
+ 8001a36: 60fb str r3, [r7, #12]
+ 8001a38: e049 b.n 8001ace <HAL_RCC_GetSysClockFreq+0x12a>
+ }
+ else
+ {
+ /* HSI used as PLL clock source */
+ pllvco = (uint32_t) ((((uint64_t) HSI_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm);
+ 8001a3a: 4b30 ldr r3, [pc, #192] ; (8001afc <HAL_RCC_GetSysClockFreq+0x158>)
+ 8001a3c: 685b ldr r3, [r3, #4]
+ 8001a3e: 099b lsrs r3, r3, #6
+ 8001a40: f04f 0400 mov.w r4, #0
+ 8001a44: f240 11ff movw r1, #511 ; 0x1ff
+ 8001a48: f04f 0200 mov.w r2, #0
+ 8001a4c: ea03 0501 and.w r5, r3, r1
+ 8001a50: ea04 0602 and.w r6, r4, r2
+ 8001a54: 4629 mov r1, r5
+ 8001a56: 4632 mov r2, r6
+ 8001a58: f04f 0300 mov.w r3, #0
+ 8001a5c: f04f 0400 mov.w r4, #0
+ 8001a60: 0154 lsls r4, r2, #5
+ 8001a62: ea44 64d1 orr.w r4, r4, r1, lsr #27
+ 8001a66: 014b lsls r3, r1, #5
+ 8001a68: 4619 mov r1, r3
+ 8001a6a: 4622 mov r2, r4
+ 8001a6c: 1b49 subs r1, r1, r5
+ 8001a6e: eb62 0206 sbc.w r2, r2, r6
+ 8001a72: f04f 0300 mov.w r3, #0
+ 8001a76: f04f 0400 mov.w r4, #0
+ 8001a7a: 0194 lsls r4, r2, #6
+ 8001a7c: ea44 6491 orr.w r4, r4, r1, lsr #26
+ 8001a80: 018b lsls r3, r1, #6
+ 8001a82: 1a5b subs r3, r3, r1
+ 8001a84: eb64 0402 sbc.w r4, r4, r2
+ 8001a88: f04f 0100 mov.w r1, #0
+ 8001a8c: f04f 0200 mov.w r2, #0
+ 8001a90: 00e2 lsls r2, r4, #3
+ 8001a92: ea42 7253 orr.w r2, r2, r3, lsr #29
+ 8001a96: 00d9 lsls r1, r3, #3
+ 8001a98: 460b mov r3, r1
+ 8001a9a: 4614 mov r4, r2
+ 8001a9c: 195b adds r3, r3, r5
+ 8001a9e: eb44 0406 adc.w r4, r4, r6
+ 8001aa2: f04f 0100 mov.w r1, #0
+ 8001aa6: f04f 0200 mov.w r2, #0
+ 8001aaa: 02a2 lsls r2, r4, #10
+ 8001aac: ea42 5293 orr.w r2, r2, r3, lsr #22
+ 8001ab0: 0299 lsls r1, r3, #10
+ 8001ab2: 460b mov r3, r1
+ 8001ab4: 4614 mov r4, r2
+ 8001ab6: 4618 mov r0, r3
+ 8001ab8: 4621 mov r1, r4
+ 8001aba: 687b ldr r3, [r7, #4]
+ 8001abc: f04f 0400 mov.w r4, #0
+ 8001ac0: 461a mov r2, r3
+ 8001ac2: 4623 mov r3, r4
+ 8001ac4: f7fe fbc0 bl 8000248 <__aeabi_uldivmod>
+ 8001ac8: 4603 mov r3, r0
+ 8001aca: 460c mov r4, r1
+ 8001acc: 60fb str r3, [r7, #12]
+ }
+ pllp = ((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >> RCC_PLLCFGR_PLLP_Pos) + 1 ) *2);
+ 8001ace: 4b0b ldr r3, [pc, #44] ; (8001afc <HAL_RCC_GetSysClockFreq+0x158>)
+ 8001ad0: 685b ldr r3, [r3, #4]
+ 8001ad2: 0c1b lsrs r3, r3, #16
+ 8001ad4: f003 0303 and.w r3, r3, #3
+ 8001ad8: 3301 adds r3, #1
+ 8001ada: 005b lsls r3, r3, #1
+ 8001adc: 603b str r3, [r7, #0]
+
+ sysclockfreq = pllvco/pllp;
+ 8001ade: 68fa ldr r2, [r7, #12]
+ 8001ae0: 683b ldr r3, [r7, #0]
+ 8001ae2: fbb2 f3f3 udiv r3, r2, r3
+ 8001ae6: 60bb str r3, [r7, #8]
+ break;
+ 8001ae8: e002 b.n 8001af0 <HAL_RCC_GetSysClockFreq+0x14c>
+ }
+ default:
+ {
+ sysclockfreq = HSI_VALUE;
+ 8001aea: 4b05 ldr r3, [pc, #20] ; (8001b00 <HAL_RCC_GetSysClockFreq+0x15c>)
+ 8001aec: 60bb str r3, [r7, #8]
+ break;
+ 8001aee: bf00 nop
+ }
+ }
+ return sysclockfreq;
+ 8001af0: 68bb ldr r3, [r7, #8]
+}
+ 8001af2: 4618 mov r0, r3
+ 8001af4: 3714 adds r7, #20
+ 8001af6: 46bd mov sp, r7
+ 8001af8: bdf0 pop {r4, r5, r6, r7, pc}
+ 8001afa: bf00 nop
+ 8001afc: 40023800 .word 0x40023800
+ 8001b00: 00f42400 .word 0x00f42400
+ 8001b04: 017d7840 .word 0x017d7840
+
+08001b08 <HAL_RCC_GetHCLKFreq>:
+ * right HCLK value. Otherwise, any configuration based on this function will be incorrect.
+ * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency.
+ * @retval HCLK frequency
+ */
+uint32_t HAL_RCC_GetHCLKFreq(void)
+{
+ 8001b08: b480 push {r7}
+ 8001b0a: af00 add r7, sp, #0
+ return SystemCoreClock;
+ 8001b0c: 4b03 ldr r3, [pc, #12] ; (8001b1c <HAL_RCC_GetHCLKFreq+0x14>)
+ 8001b0e: 681b ldr r3, [r3, #0]
+}
+ 8001b10: 4618 mov r0, r3
+ 8001b12: 46bd mov sp, r7
+ 8001b14: f85d 7b04 ldr.w r7, [sp], #4
+ 8001b18: 4770 bx lr
+ 8001b1a: bf00 nop
+ 8001b1c: 20000008 .word 0x20000008
+
+08001b20 <HAL_RCC_GetPCLK1Freq>:
+ * @note Each time PCLK1 changes, this function must be called to update the
+ * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
+ * @retval PCLK1 frequency
+ */
+uint32_t HAL_RCC_GetPCLK1Freq(void)
+{
+ 8001b20: b580 push {r7, lr}
+ 8001b22: af00 add r7, sp, #0
+ /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
+ return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1)>> RCC_CFGR_PPRE1_Pos]);
+ 8001b24: f7ff fff0 bl 8001b08 <HAL_RCC_GetHCLKFreq>
+ 8001b28: 4601 mov r1, r0
+ 8001b2a: 4b05 ldr r3, [pc, #20] ; (8001b40 <HAL_RCC_GetPCLK1Freq+0x20>)
+ 8001b2c: 689b ldr r3, [r3, #8]
+ 8001b2e: 0a9b lsrs r3, r3, #10
+ 8001b30: f003 0307 and.w r3, r3, #7
+ 8001b34: 4a03 ldr r2, [pc, #12] ; (8001b44 <HAL_RCC_GetPCLK1Freq+0x24>)
+ 8001b36: 5cd3 ldrb r3, [r2, r3]
+ 8001b38: fa21 f303 lsr.w r3, r1, r3
+}
+ 8001b3c: 4618 mov r0, r3
+ 8001b3e: bd80 pop {r7, pc}
+ 8001b40: 40023800 .word 0x40023800
+ 8001b44: 08006020 .word 0x08006020
+
+08001b48 <HAL_RCC_GetPCLK2Freq>:
+ * @note Each time PCLK2 changes, this function must be called to update the
+ * right PCLK2 value. Otherwise, any configuration based on this function will be incorrect.
+ * @retval PCLK2 frequency
+ */
+uint32_t HAL_RCC_GetPCLK2Freq(void)
+{
+ 8001b48: b580 push {r7, lr}
+ 8001b4a: af00 add r7, sp, #0
+ /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/
+ return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2)>> RCC_CFGR_PPRE2_Pos]);
+ 8001b4c: f7ff ffdc bl 8001b08 <HAL_RCC_GetHCLKFreq>
+ 8001b50: 4601 mov r1, r0
+ 8001b52: 4b05 ldr r3, [pc, #20] ; (8001b68 <HAL_RCC_GetPCLK2Freq+0x20>)
+ 8001b54: 689b ldr r3, [r3, #8]
+ 8001b56: 0b5b lsrs r3, r3, #13
+ 8001b58: f003 0307 and.w r3, r3, #7
+ 8001b5c: 4a03 ldr r2, [pc, #12] ; (8001b6c <HAL_RCC_GetPCLK2Freq+0x24>)
+ 8001b5e: 5cd3 ldrb r3, [r2, r3]
+ 8001b60: fa21 f303 lsr.w r3, r1, r3
+}
+ 8001b64: 4618 mov r0, r3
+ 8001b66: bd80 pop {r7, pc}
+ 8001b68: 40023800 .word 0x40023800
+ 8001b6c: 08006020 .word 0x08006020
+
+08001b70 <HAL_RCCEx_PeriphCLKConfig>:
+ * the backup registers) are set to their reset values.
+ *
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
+{
+ 8001b70: b580 push {r7, lr}
+ 8001b72: b088 sub sp, #32
+ 8001b74: af00 add r7, sp, #0
+ 8001b76: 6078 str r0, [r7, #4]
+ uint32_t tickstart = 0;
+ 8001b78: 2300 movs r3, #0
+ 8001b7a: 617b str r3, [r7, #20]
+ uint32_t tmpreg0 = 0;
+ 8001b7c: 2300 movs r3, #0
+ 8001b7e: 613b str r3, [r7, #16]
+ uint32_t tmpreg1 = 0;
+ 8001b80: 2300 movs r3, #0
+ 8001b82: 60fb str r3, [r7, #12]
+ uint32_t plli2sused = 0;
+ 8001b84: 2300 movs r3, #0
+ 8001b86: 61fb str r3, [r7, #28]
+ uint32_t pllsaiused = 0;
+ 8001b88: 2300 movs r3, #0
+ 8001b8a: 61bb str r3, [r7, #24]
+
+ /* Check the parameters */
+ assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
+
+ /*----------------------------------- I2S configuration ----------------------------------*/
+ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S) == (RCC_PERIPHCLK_I2S))
+ 8001b8c: 687b ldr r3, [r7, #4]
+ 8001b8e: 681b ldr r3, [r3, #0]
+ 8001b90: f003 0301 and.w r3, r3, #1
+ 8001b94: 2b00 cmp r3, #0
+ 8001b96: d012 beq.n 8001bbe <HAL_RCCEx_PeriphCLKConfig+0x4e>
+ {
+ /* Check the parameters */
+ assert_param(IS_RCC_I2SCLKSOURCE(PeriphClkInit->I2sClockSelection));
+
+ /* Configure I2S Clock source */
+ __HAL_RCC_I2S_CONFIG(PeriphClkInit->I2sClockSelection);
+ 8001b98: 4b69 ldr r3, [pc, #420] ; (8001d40 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 8001b9a: 689b ldr r3, [r3, #8]
+ 8001b9c: 4a68 ldr r2, [pc, #416] ; (8001d40 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 8001b9e: f423 0300 bic.w r3, r3, #8388608 ; 0x800000
+ 8001ba2: 6093 str r3, [r2, #8]
+ 8001ba4: 4b66 ldr r3, [pc, #408] ; (8001d40 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 8001ba6: 689a ldr r2, [r3, #8]
+ 8001ba8: 687b ldr r3, [r7, #4]
+ 8001baa: 6b5b ldr r3, [r3, #52] ; 0x34
+ 8001bac: 4964 ldr r1, [pc, #400] ; (8001d40 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 8001bae: 4313 orrs r3, r2
+ 8001bb0: 608b str r3, [r1, #8]
+
+ /* Enable the PLLI2S when it's used as clock source for I2S */
+ if(PeriphClkInit->I2sClockSelection == RCC_I2SCLKSOURCE_PLLI2S)
+ 8001bb2: 687b ldr r3, [r7, #4]
+ 8001bb4: 6b5b ldr r3, [r3, #52] ; 0x34
+ 8001bb6: 2b00 cmp r3, #0
+ 8001bb8: d101 bne.n 8001bbe <HAL_RCCEx_PeriphCLKConfig+0x4e>
+ {
+ plli2sused = 1;
+ 8001bba: 2301 movs r3, #1
+ 8001bbc: 61fb str r3, [r7, #28]
+ }
+ }
+
+ /*------------------------------------ SAI1 configuration --------------------------------------*/
+ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == (RCC_PERIPHCLK_SAI1))
+ 8001bbe: 687b ldr r3, [r7, #4]
+ 8001bc0: 681b ldr r3, [r3, #0]
+ 8001bc2: f403 2300 and.w r3, r3, #524288 ; 0x80000
+ 8001bc6: 2b00 cmp r3, #0
+ 8001bc8: d017 beq.n 8001bfa <HAL_RCCEx_PeriphCLKConfig+0x8a>
+ {
+ /* Check the parameters */
+ assert_param(IS_RCC_SAI1CLKSOURCE(PeriphClkInit->Sai1ClockSelection));
+
+ /* Configure SAI1 Clock source */
+ __HAL_RCC_SAI1_CONFIG(PeriphClkInit->Sai1ClockSelection);
+ 8001bca: 4b5d ldr r3, [pc, #372] ; (8001d40 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 8001bcc: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c
+ 8001bd0: f423 1240 bic.w r2, r3, #3145728 ; 0x300000
+ 8001bd4: 687b ldr r3, [r7, #4]
+ 8001bd6: 6bdb ldr r3, [r3, #60] ; 0x3c
+ 8001bd8: 4959 ldr r1, [pc, #356] ; (8001d40 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 8001bda: 4313 orrs r3, r2
+ 8001bdc: f8c1 308c str.w r3, [r1, #140] ; 0x8c
+ /* Enable the PLLI2S when it's used as clock source for SAI */
+ if(PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLI2S)
+ 8001be0: 687b ldr r3, [r7, #4]
+ 8001be2: 6bdb ldr r3, [r3, #60] ; 0x3c
+ 8001be4: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000
+ 8001be8: d101 bne.n 8001bee <HAL_RCCEx_PeriphCLKConfig+0x7e>
+ {
+ plli2sused = 1;
+ 8001bea: 2301 movs r3, #1
+ 8001bec: 61fb str r3, [r7, #28]
+ }
+ /* Enable the PLLSAI when it's used as clock source for SAI */
+ if(PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLSAI)
+ 8001bee: 687b ldr r3, [r7, #4]
+ 8001bf0: 6bdb ldr r3, [r3, #60] ; 0x3c
+ 8001bf2: 2b00 cmp r3, #0
+ 8001bf4: d101 bne.n 8001bfa <HAL_RCCEx_PeriphCLKConfig+0x8a>
+ {
+ pllsaiused = 1;
+ 8001bf6: 2301 movs r3, #1
+ 8001bf8: 61bb str r3, [r7, #24]
+ }
+ }
+
+ /*------------------------------------ SAI2 configuration --------------------------------------*/
+ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == (RCC_PERIPHCLK_SAI2))
+ 8001bfa: 687b ldr r3, [r7, #4]
+ 8001bfc: 681b ldr r3, [r3, #0]
+ 8001bfe: f403 1380 and.w r3, r3, #1048576 ; 0x100000
+ 8001c02: 2b00 cmp r3, #0
+ 8001c04: d017 beq.n 8001c36 <HAL_RCCEx_PeriphCLKConfig+0xc6>
+ {
+ /* Check the parameters */
+ assert_param(IS_RCC_SAI2CLKSOURCE(PeriphClkInit->Sai2ClockSelection));
+
+ /* Configure SAI2 Clock source */
+ __HAL_RCC_SAI2_CONFIG(PeriphClkInit->Sai2ClockSelection);
+ 8001c06: 4b4e ldr r3, [pc, #312] ; (8001d40 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 8001c08: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c
+ 8001c0c: f423 0240 bic.w r2, r3, #12582912 ; 0xc00000
+ 8001c10: 687b ldr r3, [r7, #4]
+ 8001c12: 6c1b ldr r3, [r3, #64] ; 0x40
+ 8001c14: 494a ldr r1, [pc, #296] ; (8001d40 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 8001c16: 4313 orrs r3, r2
+ 8001c18: f8c1 308c str.w r3, [r1, #140] ; 0x8c
+
+ /* Enable the PLLI2S when it's used as clock source for SAI */
+ if(PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLI2S)
+ 8001c1c: 687b ldr r3, [r7, #4]
+ 8001c1e: 6c1b ldr r3, [r3, #64] ; 0x40
+ 8001c20: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000
+ 8001c24: d101 bne.n 8001c2a <HAL_RCCEx_PeriphCLKConfig+0xba>
+ {
+ plli2sused = 1;
+ 8001c26: 2301 movs r3, #1
+ 8001c28: 61fb str r3, [r7, #28]
+ }
+ /* Enable the PLLSAI when it's used as clock source for SAI */
+ if(PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLSAI)
+ 8001c2a: 687b ldr r3, [r7, #4]
+ 8001c2c: 6c1b ldr r3, [r3, #64] ; 0x40
+ 8001c2e: 2b00 cmp r3, #0
+ 8001c30: d101 bne.n 8001c36 <HAL_RCCEx_PeriphCLKConfig+0xc6>
+ {
+ pllsaiused = 1;
+ 8001c32: 2301 movs r3, #1
+ 8001c34: 61bb str r3, [r7, #24]
+ }
+ }
+
+ /*-------------------------------------- SPDIF-RX Configuration -----------------------------------*/
+ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPDIFRX) == RCC_PERIPHCLK_SPDIFRX)
+ 8001c36: 687b ldr r3, [r7, #4]
+ 8001c38: 681b ldr r3, [r3, #0]
+ 8001c3a: f003 7380 and.w r3, r3, #16777216 ; 0x1000000
+ 8001c3e: 2b00 cmp r3, #0
+ 8001c40: d001 beq.n 8001c46 <HAL_RCCEx_PeriphCLKConfig+0xd6>
+ {
+ plli2sused = 1;
+ 8001c42: 2301 movs r3, #1
+ 8001c44: 61fb str r3, [r7, #28]
+ }
+
+ /*------------------------------------ RTC configuration --------------------------------------*/
+ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == (RCC_PERIPHCLK_RTC))
+ 8001c46: 687b ldr r3, [r7, #4]
+ 8001c48: 681b ldr r3, [r3, #0]
+ 8001c4a: f003 0320 and.w r3, r3, #32
+ 8001c4e: 2b00 cmp r3, #0
+ 8001c50: f000 808b beq.w 8001d6a <HAL_RCCEx_PeriphCLKConfig+0x1fa>
+ {
+ /* Check for RTC Parameters used to output RTCCLK */
+ assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection));
+
+ /* Enable Power Clock*/
+ __HAL_RCC_PWR_CLK_ENABLE();
+ 8001c54: 4b3a ldr r3, [pc, #232] ; (8001d40 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 8001c56: 6c1b ldr r3, [r3, #64] ; 0x40
+ 8001c58: 4a39 ldr r2, [pc, #228] ; (8001d40 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 8001c5a: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
+ 8001c5e: 6413 str r3, [r2, #64] ; 0x40
+ 8001c60: 4b37 ldr r3, [pc, #220] ; (8001d40 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 8001c62: 6c1b ldr r3, [r3, #64] ; 0x40
+ 8001c64: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
+ 8001c68: 60bb str r3, [r7, #8]
+ 8001c6a: 68bb ldr r3, [r7, #8]
+
+ /* Enable write access to Backup domain */
+ PWR->CR1 |= PWR_CR1_DBP;
+ 8001c6c: 4b35 ldr r3, [pc, #212] ; (8001d44 <HAL_RCCEx_PeriphCLKConfig+0x1d4>)
+ 8001c6e: 681b ldr r3, [r3, #0]
+ 8001c70: 4a34 ldr r2, [pc, #208] ; (8001d44 <HAL_RCCEx_PeriphCLKConfig+0x1d4>)
+ 8001c72: f443 7380 orr.w r3, r3, #256 ; 0x100
+ 8001c76: 6013 str r3, [r2, #0]
+
+ /* Get Start Tick*/
+ tickstart = HAL_GetTick();
+ 8001c78: f7fe fcb8 bl 80005ec <HAL_GetTick>
+ 8001c7c: 6178 str r0, [r7, #20]
+
+ /* Wait for Backup domain Write protection disable */
+ while((PWR->CR1 & PWR_CR1_DBP) == RESET)
+ 8001c7e: e008 b.n 8001c92 <HAL_RCCEx_PeriphCLKConfig+0x122>
+ {
+ if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
+ 8001c80: f7fe fcb4 bl 80005ec <HAL_GetTick>
+ 8001c84: 4602 mov r2, r0
+ 8001c86: 697b ldr r3, [r7, #20]
+ 8001c88: 1ad3 subs r3, r2, r3
+ 8001c8a: 2b64 cmp r3, #100 ; 0x64
+ 8001c8c: d901 bls.n 8001c92 <HAL_RCCEx_PeriphCLKConfig+0x122>
+ {
+ return HAL_TIMEOUT;
+ 8001c8e: 2303 movs r3, #3
+ 8001c90: e38d b.n 80023ae <HAL_RCCEx_PeriphCLKConfig+0x83e>
+ while((PWR->CR1 & PWR_CR1_DBP) == RESET)
+ 8001c92: 4b2c ldr r3, [pc, #176] ; (8001d44 <HAL_RCCEx_PeriphCLKConfig+0x1d4>)
+ 8001c94: 681b ldr r3, [r3, #0]
+ 8001c96: f403 7380 and.w r3, r3, #256 ; 0x100
+ 8001c9a: 2b00 cmp r3, #0
+ 8001c9c: d0f0 beq.n 8001c80 <HAL_RCCEx_PeriphCLKConfig+0x110>
+ }
+ }
+
+ /* Reset the Backup domain only if the RTC Clock source selection is modified */
+ tmpreg0 = (RCC->BDCR & RCC_BDCR_RTCSEL);
+ 8001c9e: 4b28 ldr r3, [pc, #160] ; (8001d40 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 8001ca0: 6f1b ldr r3, [r3, #112] ; 0x70
+ 8001ca2: f403 7340 and.w r3, r3, #768 ; 0x300
+ 8001ca6: 613b str r3, [r7, #16]
+
+ if((tmpreg0 != 0x00000000U) && (tmpreg0 != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)))
+ 8001ca8: 693b ldr r3, [r7, #16]
+ 8001caa: 2b00 cmp r3, #0
+ 8001cac: d035 beq.n 8001d1a <HAL_RCCEx_PeriphCLKConfig+0x1aa>
+ 8001cae: 687b ldr r3, [r7, #4]
+ 8001cb0: 6b1b ldr r3, [r3, #48] ; 0x30
+ 8001cb2: f403 7340 and.w r3, r3, #768 ; 0x300
+ 8001cb6: 693a ldr r2, [r7, #16]
+ 8001cb8: 429a cmp r2, r3
+ 8001cba: d02e beq.n 8001d1a <HAL_RCCEx_PeriphCLKConfig+0x1aa>
+ {
+ /* Store the content of BDCR register before the reset of Backup Domain */
+ tmpreg0 = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
+ 8001cbc: 4b20 ldr r3, [pc, #128] ; (8001d40 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 8001cbe: 6f1b ldr r3, [r3, #112] ; 0x70
+ 8001cc0: f423 7340 bic.w r3, r3, #768 ; 0x300
+ 8001cc4: 613b str r3, [r7, #16]
+
+ /* RTC Clock selection can be changed only if the Backup Domain is reset */
+ __HAL_RCC_BACKUPRESET_FORCE();
+ 8001cc6: 4b1e ldr r3, [pc, #120] ; (8001d40 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 8001cc8: 6f1b ldr r3, [r3, #112] ; 0x70
+ 8001cca: 4a1d ldr r2, [pc, #116] ; (8001d40 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 8001ccc: f443 3380 orr.w r3, r3, #65536 ; 0x10000
+ 8001cd0: 6713 str r3, [r2, #112] ; 0x70
+ __HAL_RCC_BACKUPRESET_RELEASE();
+ 8001cd2: 4b1b ldr r3, [pc, #108] ; (8001d40 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 8001cd4: 6f1b ldr r3, [r3, #112] ; 0x70
+ 8001cd6: 4a1a ldr r2, [pc, #104] ; (8001d40 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 8001cd8: f423 3380 bic.w r3, r3, #65536 ; 0x10000
+ 8001cdc: 6713 str r3, [r2, #112] ; 0x70
+
+ /* Restore the Content of BDCR register */
+ RCC->BDCR = tmpreg0;
+ 8001cde: 4a18 ldr r2, [pc, #96] ; (8001d40 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 8001ce0: 693b ldr r3, [r7, #16]
+ 8001ce2: 6713 str r3, [r2, #112] ; 0x70
+
+ /* Wait for LSE reactivation if LSE was enable prior to Backup Domain reset */
+ if (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSEON))
+ 8001ce4: 4b16 ldr r3, [pc, #88] ; (8001d40 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 8001ce6: 6f1b ldr r3, [r3, #112] ; 0x70
+ 8001ce8: f003 0301 and.w r3, r3, #1
+ 8001cec: 2b01 cmp r3, #1
+ 8001cee: d114 bne.n 8001d1a <HAL_RCCEx_PeriphCLKConfig+0x1aa>
+ {
+ /* Get Start Tick*/
+ tickstart = HAL_GetTick();
+ 8001cf0: f7fe fc7c bl 80005ec <HAL_GetTick>
+ 8001cf4: 6178 str r0, [r7, #20]
+
+ /* Wait till LSE is ready */
+ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
+ 8001cf6: e00a b.n 8001d0e <HAL_RCCEx_PeriphCLKConfig+0x19e>
+ {
+ if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
+ 8001cf8: f7fe fc78 bl 80005ec <HAL_GetTick>
+ 8001cfc: 4602 mov r2, r0
+ 8001cfe: 697b ldr r3, [r7, #20]
+ 8001d00: 1ad3 subs r3, r2, r3
+ 8001d02: f241 3288 movw r2, #5000 ; 0x1388
+ 8001d06: 4293 cmp r3, r2
+ 8001d08: d901 bls.n 8001d0e <HAL_RCCEx_PeriphCLKConfig+0x19e>
+ {
+ return HAL_TIMEOUT;
+ 8001d0a: 2303 movs r3, #3
+ 8001d0c: e34f b.n 80023ae <HAL_RCCEx_PeriphCLKConfig+0x83e>
+ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
+ 8001d0e: 4b0c ldr r3, [pc, #48] ; (8001d40 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 8001d10: 6f1b ldr r3, [r3, #112] ; 0x70
+ 8001d12: f003 0302 and.w r3, r3, #2
+ 8001d16: 2b00 cmp r3, #0
+ 8001d18: d0ee beq.n 8001cf8 <HAL_RCCEx_PeriphCLKConfig+0x188>
+ }
+ }
+ }
+ }
+ __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
+ 8001d1a: 687b ldr r3, [r7, #4]
+ 8001d1c: 6b1b ldr r3, [r3, #48] ; 0x30
+ 8001d1e: f403 7340 and.w r3, r3, #768 ; 0x300
+ 8001d22: f5b3 7f40 cmp.w r3, #768 ; 0x300
+ 8001d26: d111 bne.n 8001d4c <HAL_RCCEx_PeriphCLKConfig+0x1dc>
+ 8001d28: 4b05 ldr r3, [pc, #20] ; (8001d40 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 8001d2a: 689b ldr r3, [r3, #8]
+ 8001d2c: f423 12f8 bic.w r2, r3, #2031616 ; 0x1f0000
+ 8001d30: 687b ldr r3, [r7, #4]
+ 8001d32: 6b19 ldr r1, [r3, #48] ; 0x30
+ 8001d34: 4b04 ldr r3, [pc, #16] ; (8001d48 <HAL_RCCEx_PeriphCLKConfig+0x1d8>)
+ 8001d36: 400b ands r3, r1
+ 8001d38: 4901 ldr r1, [pc, #4] ; (8001d40 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 8001d3a: 4313 orrs r3, r2
+ 8001d3c: 608b str r3, [r1, #8]
+ 8001d3e: e00b b.n 8001d58 <HAL_RCCEx_PeriphCLKConfig+0x1e8>
+ 8001d40: 40023800 .word 0x40023800
+ 8001d44: 40007000 .word 0x40007000
+ 8001d48: 0ffffcff .word 0x0ffffcff
+ 8001d4c: 4bb3 ldr r3, [pc, #716] ; (800201c <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001d4e: 689b ldr r3, [r3, #8]
+ 8001d50: 4ab2 ldr r2, [pc, #712] ; (800201c <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001d52: f423 13f8 bic.w r3, r3, #2031616 ; 0x1f0000
+ 8001d56: 6093 str r3, [r2, #8]
+ 8001d58: 4bb0 ldr r3, [pc, #704] ; (800201c <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001d5a: 6f1a ldr r2, [r3, #112] ; 0x70
+ 8001d5c: 687b ldr r3, [r7, #4]
+ 8001d5e: 6b1b ldr r3, [r3, #48] ; 0x30
+ 8001d60: f3c3 030b ubfx r3, r3, #0, #12
+ 8001d64: 49ad ldr r1, [pc, #692] ; (800201c <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001d66: 4313 orrs r3, r2
+ 8001d68: 670b str r3, [r1, #112] ; 0x70
+ }
+
+ /*------------------------------------ TIM configuration --------------------------------------*/
+ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM) == (RCC_PERIPHCLK_TIM))
+ 8001d6a: 687b ldr r3, [r7, #4]
+ 8001d6c: 681b ldr r3, [r3, #0]
+ 8001d6e: f003 0310 and.w r3, r3, #16
+ 8001d72: 2b00 cmp r3, #0
+ 8001d74: d010 beq.n 8001d98 <HAL_RCCEx_PeriphCLKConfig+0x228>
+ {
+ /* Check the parameters */
+ assert_param(IS_RCC_TIMPRES(PeriphClkInit->TIMPresSelection));
+
+ /* Configure Timer Prescaler */
+ __HAL_RCC_TIMCLKPRESCALER(PeriphClkInit->TIMPresSelection);
+ 8001d76: 4ba9 ldr r3, [pc, #676] ; (800201c <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001d78: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c
+ 8001d7c: 4aa7 ldr r2, [pc, #668] ; (800201c <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001d7e: f023 7380 bic.w r3, r3, #16777216 ; 0x1000000
+ 8001d82: f8c2 308c str.w r3, [r2, #140] ; 0x8c
+ 8001d86: 4ba5 ldr r3, [pc, #660] ; (800201c <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001d88: f8d3 208c ldr.w r2, [r3, #140] ; 0x8c
+ 8001d8c: 687b ldr r3, [r7, #4]
+ 8001d8e: 6b9b ldr r3, [r3, #56] ; 0x38
+ 8001d90: 49a2 ldr r1, [pc, #648] ; (800201c <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001d92: 4313 orrs r3, r2
+ 8001d94: f8c1 308c str.w r3, [r1, #140] ; 0x8c
+ }
+
+ /*-------------------------------------- I2C1 Configuration -----------------------------------*/
+ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1)
+ 8001d98: 687b ldr r3, [r7, #4]
+ 8001d9a: 681b ldr r3, [r3, #0]
+ 8001d9c: f403 4380 and.w r3, r3, #16384 ; 0x4000
+ 8001da0: 2b00 cmp r3, #0
+ 8001da2: d00a beq.n 8001dba <HAL_RCCEx_PeriphCLKConfig+0x24a>
+ {
+ /* Check the parameters */
+ assert_param(IS_RCC_I2C1CLKSOURCE(PeriphClkInit->I2c1ClockSelection));
+
+ /* Configure the I2C1 clock source */
+ __HAL_RCC_I2C1_CONFIG(PeriphClkInit->I2c1ClockSelection);
+ 8001da4: 4b9d ldr r3, [pc, #628] ; (800201c <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001da6: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
+ 8001daa: f423 3240 bic.w r2, r3, #196608 ; 0x30000
+ 8001dae: 687b ldr r3, [r7, #4]
+ 8001db0: 6e5b ldr r3, [r3, #100] ; 0x64
+ 8001db2: 499a ldr r1, [pc, #616] ; (800201c <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001db4: 4313 orrs r3, r2
+ 8001db6: f8c1 3090 str.w r3, [r1, #144] ; 0x90
+ }
+
+ /*-------------------------------------- I2C2 Configuration -----------------------------------*/
+ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C2) == RCC_PERIPHCLK_I2C2)
+ 8001dba: 687b ldr r3, [r7, #4]
+ 8001dbc: 681b ldr r3, [r3, #0]
+ 8001dbe: f403 4300 and.w r3, r3, #32768 ; 0x8000
+ 8001dc2: 2b00 cmp r3, #0
+ 8001dc4: d00a beq.n 8001ddc <HAL_RCCEx_PeriphCLKConfig+0x26c>
+ {
+ /* Check the parameters */
+ assert_param(IS_RCC_I2C2CLKSOURCE(PeriphClkInit->I2c2ClockSelection));
+
+ /* Configure the I2C2 clock source */
+ __HAL_RCC_I2C2_CONFIG(PeriphClkInit->I2c2ClockSelection);
+ 8001dc6: 4b95 ldr r3, [pc, #596] ; (800201c <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001dc8: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
+ 8001dcc: f423 2240 bic.w r2, r3, #786432 ; 0xc0000
+ 8001dd0: 687b ldr r3, [r7, #4]
+ 8001dd2: 6e9b ldr r3, [r3, #104] ; 0x68
+ 8001dd4: 4991 ldr r1, [pc, #580] ; (800201c <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001dd6: 4313 orrs r3, r2
+ 8001dd8: f8c1 3090 str.w r3, [r1, #144] ; 0x90
+ }
+
+ /*-------------------------------------- I2C3 Configuration -----------------------------------*/
+ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C3) == RCC_PERIPHCLK_I2C3)
+ 8001ddc: 687b ldr r3, [r7, #4]
+ 8001dde: 681b ldr r3, [r3, #0]
+ 8001de0: f403 3380 and.w r3, r3, #65536 ; 0x10000
+ 8001de4: 2b00 cmp r3, #0
+ 8001de6: d00a beq.n 8001dfe <HAL_RCCEx_PeriphCLKConfig+0x28e>
+ {
+ /* Check the parameters */
+ assert_param(IS_RCC_I2C3CLKSOURCE(PeriphClkInit->I2c3ClockSelection));
+
+ /* Configure the I2C3 clock source */
+ __HAL_RCC_I2C3_CONFIG(PeriphClkInit->I2c3ClockSelection);
+ 8001de8: 4b8c ldr r3, [pc, #560] ; (800201c <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001dea: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
+ 8001dee: f423 1240 bic.w r2, r3, #3145728 ; 0x300000
+ 8001df2: 687b ldr r3, [r7, #4]
+ 8001df4: 6edb ldr r3, [r3, #108] ; 0x6c
+ 8001df6: 4989 ldr r1, [pc, #548] ; (800201c <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001df8: 4313 orrs r3, r2
+ 8001dfa: f8c1 3090 str.w r3, [r1, #144] ; 0x90
+ }
+
+ /*-------------------------------------- I2C4 Configuration -----------------------------------*/
+ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C4) == RCC_PERIPHCLK_I2C4)
+ 8001dfe: 687b ldr r3, [r7, #4]
+ 8001e00: 681b ldr r3, [r3, #0]
+ 8001e02: f403 3300 and.w r3, r3, #131072 ; 0x20000
+ 8001e06: 2b00 cmp r3, #0
+ 8001e08: d00a beq.n 8001e20 <HAL_RCCEx_PeriphCLKConfig+0x2b0>
+ {
+ /* Check the parameters */
+ assert_param(IS_RCC_I2C4CLKSOURCE(PeriphClkInit->I2c4ClockSelection));
+
+ /* Configure the I2C4 clock source */
+ __HAL_RCC_I2C4_CONFIG(PeriphClkInit->I2c4ClockSelection);
+ 8001e0a: 4b84 ldr r3, [pc, #528] ; (800201c <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001e0c: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
+ 8001e10: f423 0240 bic.w r2, r3, #12582912 ; 0xc00000
+ 8001e14: 687b ldr r3, [r7, #4]
+ 8001e16: 6f1b ldr r3, [r3, #112] ; 0x70
+ 8001e18: 4980 ldr r1, [pc, #512] ; (800201c <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001e1a: 4313 orrs r3, r2
+ 8001e1c: f8c1 3090 str.w r3, [r1, #144] ; 0x90
+ }
+
+ /*-------------------------------------- USART1 Configuration -----------------------------------*/
+ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1)
+ 8001e20: 687b ldr r3, [r7, #4]
+ 8001e22: 681b ldr r3, [r3, #0]
+ 8001e24: f003 0340 and.w r3, r3, #64 ; 0x40
+ 8001e28: 2b00 cmp r3, #0
+ 8001e2a: d00a beq.n 8001e42 <HAL_RCCEx_PeriphCLKConfig+0x2d2>
+ {
+ /* Check the parameters */
+ assert_param(IS_RCC_USART1CLKSOURCE(PeriphClkInit->Usart1ClockSelection));
+
+ /* Configure the USART1 clock source */
+ __HAL_RCC_USART1_CONFIG(PeriphClkInit->Usart1ClockSelection);
+ 8001e2c: 4b7b ldr r3, [pc, #492] ; (800201c <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001e2e: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
+ 8001e32: f023 0203 bic.w r2, r3, #3
+ 8001e36: 687b ldr r3, [r7, #4]
+ 8001e38: 6c5b ldr r3, [r3, #68] ; 0x44
+ 8001e3a: 4978 ldr r1, [pc, #480] ; (800201c <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001e3c: 4313 orrs r3, r2
+ 8001e3e: f8c1 3090 str.w r3, [r1, #144] ; 0x90
+ }
+
+ /*-------------------------------------- USART2 Configuration -----------------------------------*/
+ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2)
+ 8001e42: 687b ldr r3, [r7, #4]
+ 8001e44: 681b ldr r3, [r3, #0]
+ 8001e46: f003 0380 and.w r3, r3, #128 ; 0x80
+ 8001e4a: 2b00 cmp r3, #0
+ 8001e4c: d00a beq.n 8001e64 <HAL_RCCEx_PeriphCLKConfig+0x2f4>
+ {
+ /* Check the parameters */
+ assert_param(IS_RCC_USART2CLKSOURCE(PeriphClkInit->Usart2ClockSelection));
+
+ /* Configure the USART2 clock source */
+ __HAL_RCC_USART2_CONFIG(PeriphClkInit->Usart2ClockSelection);
+ 8001e4e: 4b73 ldr r3, [pc, #460] ; (800201c <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001e50: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
+ 8001e54: f023 020c bic.w r2, r3, #12
+ 8001e58: 687b ldr r3, [r7, #4]
+ 8001e5a: 6c9b ldr r3, [r3, #72] ; 0x48
+ 8001e5c: 496f ldr r1, [pc, #444] ; (800201c <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001e5e: 4313 orrs r3, r2
+ 8001e60: f8c1 3090 str.w r3, [r1, #144] ; 0x90
+ }
+
+ /*-------------------------------------- USART3 Configuration -----------------------------------*/
+ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART3) == RCC_PERIPHCLK_USART3)
+ 8001e64: 687b ldr r3, [r7, #4]
+ 8001e66: 681b ldr r3, [r3, #0]
+ 8001e68: f403 7380 and.w r3, r3, #256 ; 0x100
+ 8001e6c: 2b00 cmp r3, #0
+ 8001e6e: d00a beq.n 8001e86 <HAL_RCCEx_PeriphCLKConfig+0x316>
+ {
+ /* Check the parameters */
+ assert_param(IS_RCC_USART3CLKSOURCE(PeriphClkInit->Usart3ClockSelection));
+
+ /* Configure the USART3 clock source */
+ __HAL_RCC_USART3_CONFIG(PeriphClkInit->Usart3ClockSelection);
+ 8001e70: 4b6a ldr r3, [pc, #424] ; (800201c <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001e72: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
+ 8001e76: f023 0230 bic.w r2, r3, #48 ; 0x30
+ 8001e7a: 687b ldr r3, [r7, #4]
+ 8001e7c: 6cdb ldr r3, [r3, #76] ; 0x4c
+ 8001e7e: 4967 ldr r1, [pc, #412] ; (800201c <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001e80: 4313 orrs r3, r2
+ 8001e82: f8c1 3090 str.w r3, [r1, #144] ; 0x90
+ }
+
+ /*-------------------------------------- UART4 Configuration -----------------------------------*/
+ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART4) == RCC_PERIPHCLK_UART4)
+ 8001e86: 687b ldr r3, [r7, #4]
+ 8001e88: 681b ldr r3, [r3, #0]
+ 8001e8a: f403 7300 and.w r3, r3, #512 ; 0x200
+ 8001e8e: 2b00 cmp r3, #0
+ 8001e90: d00a beq.n 8001ea8 <HAL_RCCEx_PeriphCLKConfig+0x338>
+ {
+ /* Check the parameters */
+ assert_param(IS_RCC_UART4CLKSOURCE(PeriphClkInit->Uart4ClockSelection));
+
+ /* Configure the UART4 clock source */
+ __HAL_RCC_UART4_CONFIG(PeriphClkInit->Uart4ClockSelection);
+ 8001e92: 4b62 ldr r3, [pc, #392] ; (800201c <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001e94: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
+ 8001e98: f023 02c0 bic.w r2, r3, #192 ; 0xc0
+ 8001e9c: 687b ldr r3, [r7, #4]
+ 8001e9e: 6d1b ldr r3, [r3, #80] ; 0x50
+ 8001ea0: 495e ldr r1, [pc, #376] ; (800201c <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001ea2: 4313 orrs r3, r2
+ 8001ea4: f8c1 3090 str.w r3, [r1, #144] ; 0x90
+ }
+
+ /*-------------------------------------- UART5 Configuration -----------------------------------*/
+ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART5) == RCC_PERIPHCLK_UART5)
+ 8001ea8: 687b ldr r3, [r7, #4]
+ 8001eaa: 681b ldr r3, [r3, #0]
+ 8001eac: f403 6380 and.w r3, r3, #1024 ; 0x400
+ 8001eb0: 2b00 cmp r3, #0
+ 8001eb2: d00a beq.n 8001eca <HAL_RCCEx_PeriphCLKConfig+0x35a>
+ {
+ /* Check the parameters */
+ assert_param(IS_RCC_UART5CLKSOURCE(PeriphClkInit->Uart5ClockSelection));
+
+ /* Configure the UART5 clock source */
+ __HAL_RCC_UART5_CONFIG(PeriphClkInit->Uart5ClockSelection);
+ 8001eb4: 4b59 ldr r3, [pc, #356] ; (800201c <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001eb6: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
+ 8001eba: f423 7240 bic.w r2, r3, #768 ; 0x300
+ 8001ebe: 687b ldr r3, [r7, #4]
+ 8001ec0: 6d5b ldr r3, [r3, #84] ; 0x54
+ 8001ec2: 4956 ldr r1, [pc, #344] ; (800201c <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001ec4: 4313 orrs r3, r2
+ 8001ec6: f8c1 3090 str.w r3, [r1, #144] ; 0x90
+ }
+
+ /*-------------------------------------- USART6 Configuration -----------------------------------*/
+ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART6) == RCC_PERIPHCLK_USART6)
+ 8001eca: 687b ldr r3, [r7, #4]
+ 8001ecc: 681b ldr r3, [r3, #0]
+ 8001ece: f403 6300 and.w r3, r3, #2048 ; 0x800
+ 8001ed2: 2b00 cmp r3, #0
+ 8001ed4: d00a beq.n 8001eec <HAL_RCCEx_PeriphCLKConfig+0x37c>
+ {
+ /* Check the parameters */
+ assert_param(IS_RCC_USART6CLKSOURCE(PeriphClkInit->Usart6ClockSelection));
+
+ /* Configure the USART6 clock source */
+ __HAL_RCC_USART6_CONFIG(PeriphClkInit->Usart6ClockSelection);
+ 8001ed6: 4b51 ldr r3, [pc, #324] ; (800201c <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001ed8: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
+ 8001edc: f423 6240 bic.w r2, r3, #3072 ; 0xc00
+ 8001ee0: 687b ldr r3, [r7, #4]
+ 8001ee2: 6d9b ldr r3, [r3, #88] ; 0x58
+ 8001ee4: 494d ldr r1, [pc, #308] ; (800201c <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001ee6: 4313 orrs r3, r2
+ 8001ee8: f8c1 3090 str.w r3, [r1, #144] ; 0x90
+ }
+
+ /*-------------------------------------- UART7 Configuration -----------------------------------*/
+ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART7) == RCC_PERIPHCLK_UART7)
+ 8001eec: 687b ldr r3, [r7, #4]
+ 8001eee: 681b ldr r3, [r3, #0]
+ 8001ef0: f403 5380 and.w r3, r3, #4096 ; 0x1000
+ 8001ef4: 2b00 cmp r3, #0
+ 8001ef6: d00a beq.n 8001f0e <HAL_RCCEx_PeriphCLKConfig+0x39e>
+ {
+ /* Check the parameters */
+ assert_param(IS_RCC_UART7CLKSOURCE(PeriphClkInit->Uart7ClockSelection));
+
+ /* Configure the UART7 clock source */
+ __HAL_RCC_UART7_CONFIG(PeriphClkInit->Uart7ClockSelection);
+ 8001ef8: 4b48 ldr r3, [pc, #288] ; (800201c <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001efa: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
+ 8001efe: f423 5240 bic.w r2, r3, #12288 ; 0x3000
+ 8001f02: 687b ldr r3, [r7, #4]
+ 8001f04: 6ddb ldr r3, [r3, #92] ; 0x5c
+ 8001f06: 4945 ldr r1, [pc, #276] ; (800201c <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001f08: 4313 orrs r3, r2
+ 8001f0a: f8c1 3090 str.w r3, [r1, #144] ; 0x90
+ }
+
+ /*-------------------------------------- UART8 Configuration -----------------------------------*/
+ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART8) == RCC_PERIPHCLK_UART8)
+ 8001f0e: 687b ldr r3, [r7, #4]
+ 8001f10: 681b ldr r3, [r3, #0]
+ 8001f12: f403 5300 and.w r3, r3, #8192 ; 0x2000
+ 8001f16: 2b00 cmp r3, #0
+ 8001f18: d00a beq.n 8001f30 <HAL_RCCEx_PeriphCLKConfig+0x3c0>
+ {
+ /* Check the parameters */
+ assert_param(IS_RCC_UART8CLKSOURCE(PeriphClkInit->Uart8ClockSelection));
+
+ /* Configure the UART8 clock source */
+ __HAL_RCC_UART8_CONFIG(PeriphClkInit->Uart8ClockSelection);
+ 8001f1a: 4b40 ldr r3, [pc, #256] ; (800201c <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001f1c: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
+ 8001f20: f423 4240 bic.w r2, r3, #49152 ; 0xc000
+ 8001f24: 687b ldr r3, [r7, #4]
+ 8001f26: 6e1b ldr r3, [r3, #96] ; 0x60
+ 8001f28: 493c ldr r1, [pc, #240] ; (800201c <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001f2a: 4313 orrs r3, r2
+ 8001f2c: f8c1 3090 str.w r3, [r1, #144] ; 0x90
+ }
+
+ /*--------------------------------------- CEC Configuration -----------------------------------*/
+ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CEC) == RCC_PERIPHCLK_CEC)
+ 8001f30: 687b ldr r3, [r7, #4]
+ 8001f32: 681b ldr r3, [r3, #0]
+ 8001f34: f403 0380 and.w r3, r3, #4194304 ; 0x400000
+ 8001f38: 2b00 cmp r3, #0
+ 8001f3a: d00a beq.n 8001f52 <HAL_RCCEx_PeriphCLKConfig+0x3e2>
+ {
+ /* Check the parameters */
+ assert_param(IS_RCC_CECCLKSOURCE(PeriphClkInit->CecClockSelection));
+
+ /* Configure the CEC clock source */
+ __HAL_RCC_CEC_CONFIG(PeriphClkInit->CecClockSelection);
+ 8001f3c: 4b37 ldr r3, [pc, #220] ; (800201c <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001f3e: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
+ 8001f42: f023 6280 bic.w r2, r3, #67108864 ; 0x4000000
+ 8001f46: 687b ldr r3, [r7, #4]
+ 8001f48: 6f9b ldr r3, [r3, #120] ; 0x78
+ 8001f4a: 4934 ldr r1, [pc, #208] ; (800201c <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001f4c: 4313 orrs r3, r2
+ 8001f4e: f8c1 3090 str.w r3, [r1, #144] ; 0x90
+ }
+
+ /*-------------------------------------- CK48 Configuration -----------------------------------*/
+ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CLK48) == RCC_PERIPHCLK_CLK48)
+ 8001f52: 687b ldr r3, [r7, #4]
+ 8001f54: 681b ldr r3, [r3, #0]
+ 8001f56: f403 1300 and.w r3, r3, #2097152 ; 0x200000
+ 8001f5a: 2b00 cmp r3, #0
+ 8001f5c: d011 beq.n 8001f82 <HAL_RCCEx_PeriphCLKConfig+0x412>
+ {
+ /* Check the parameters */
+ assert_param(IS_RCC_CLK48SOURCE(PeriphClkInit->Clk48ClockSelection));
+
+ /* Configure the CLK48 source */
+ __HAL_RCC_CLK48_CONFIG(PeriphClkInit->Clk48ClockSelection);
+ 8001f5e: 4b2f ldr r3, [pc, #188] ; (800201c <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001f60: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
+ 8001f64: f023 6200 bic.w r2, r3, #134217728 ; 0x8000000
+ 8001f68: 687b ldr r3, [r7, #4]
+ 8001f6a: 6fdb ldr r3, [r3, #124] ; 0x7c
+ 8001f6c: 492b ldr r1, [pc, #172] ; (800201c <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001f6e: 4313 orrs r3, r2
+ 8001f70: f8c1 3090 str.w r3, [r1, #144] ; 0x90
+
+ /* Enable the PLLSAI when it's used as clock source for CK48 */
+ if(PeriphClkInit->Clk48ClockSelection == RCC_CLK48SOURCE_PLLSAIP)
+ 8001f74: 687b ldr r3, [r7, #4]
+ 8001f76: 6fdb ldr r3, [r3, #124] ; 0x7c
+ 8001f78: f1b3 6f00 cmp.w r3, #134217728 ; 0x8000000
+ 8001f7c: d101 bne.n 8001f82 <HAL_RCCEx_PeriphCLKConfig+0x412>
+ {
+ pllsaiused = 1;
+ 8001f7e: 2301 movs r3, #1
+ 8001f80: 61bb str r3, [r7, #24]
+ }
+ }
+
+ /*-------------------------------------- LTDC Configuration -----------------------------------*/
+#if defined(STM32F746xx) || defined(STM32F756xx) || defined (STM32F767xx) || defined (STM32F769xx) || defined (STM32F777xx) || defined (STM32F779xx) || defined (STM32F750xx)
+ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LTDC) == RCC_PERIPHCLK_LTDC)
+ 8001f82: 687b ldr r3, [r7, #4]
+ 8001f84: 681b ldr r3, [r3, #0]
+ 8001f86: f003 0308 and.w r3, r3, #8
+ 8001f8a: 2b00 cmp r3, #0
+ 8001f8c: d001 beq.n 8001f92 <HAL_RCCEx_PeriphCLKConfig+0x422>
+ {
+ pllsaiused = 1;
+ 8001f8e: 2301 movs r3, #1
+ 8001f90: 61bb str r3, [r7, #24]
+ }
+#endif /* STM32F746xx || STM32F756xx || STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx || STM32F750xx */
+
+ /*-------------------------------------- LPTIM1 Configuration -----------------------------------*/
+ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM1) == RCC_PERIPHCLK_LPTIM1)
+ 8001f92: 687b ldr r3, [r7, #4]
+ 8001f94: 681b ldr r3, [r3, #0]
+ 8001f96: f403 2380 and.w r3, r3, #262144 ; 0x40000
+ 8001f9a: 2b00 cmp r3, #0
+ 8001f9c: d00a beq.n 8001fb4 <HAL_RCCEx_PeriphCLKConfig+0x444>
+ {
+ /* Check the parameters */
+ assert_param(IS_RCC_LPTIM1CLK(PeriphClkInit->Lptim1ClockSelection));
+
+ /* Configure the LTPIM1 clock source */
+ __HAL_RCC_LPTIM1_CONFIG(PeriphClkInit->Lptim1ClockSelection);
+ 8001f9e: 4b1f ldr r3, [pc, #124] ; (800201c <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001fa0: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
+ 8001fa4: f023 7240 bic.w r2, r3, #50331648 ; 0x3000000
+ 8001fa8: 687b ldr r3, [r7, #4]
+ 8001faa: 6f5b ldr r3, [r3, #116] ; 0x74
+ 8001fac: 491b ldr r1, [pc, #108] ; (800201c <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001fae: 4313 orrs r3, r2
+ 8001fb0: f8c1 3090 str.w r3, [r1, #144] ; 0x90
+ }
+
+ /*------------------------------------- SDMMC1 Configuration ------------------------------------*/
+ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SDMMC1) == RCC_PERIPHCLK_SDMMC1)
+ 8001fb4: 687b ldr r3, [r7, #4]
+ 8001fb6: 681b ldr r3, [r3, #0]
+ 8001fb8: f403 0300 and.w r3, r3, #8388608 ; 0x800000
+ 8001fbc: 2b00 cmp r3, #0
+ 8001fbe: d00b beq.n 8001fd8 <HAL_RCCEx_PeriphCLKConfig+0x468>
+ {
+ /* Check the parameters */
+ assert_param(IS_RCC_SDMMC1CLKSOURCE(PeriphClkInit->Sdmmc1ClockSelection));
+
+ /* Configure the SDMMC1 clock source */
+ __HAL_RCC_SDMMC1_CONFIG(PeriphClkInit->Sdmmc1ClockSelection);
+ 8001fc0: 4b16 ldr r3, [pc, #88] ; (800201c <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001fc2: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
+ 8001fc6: f023 5280 bic.w r2, r3, #268435456 ; 0x10000000
+ 8001fca: 687b ldr r3, [r7, #4]
+ 8001fcc: f8d3 3080 ldr.w r3, [r3, #128] ; 0x80
+ 8001fd0: 4912 ldr r1, [pc, #72] ; (800201c <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001fd2: 4313 orrs r3, r2
+ 8001fd4: f8c1 3090 str.w r3, [r1, #144] ; 0x90
+ }
+
+#if defined (STM32F765xx) || defined (STM32F767xx) || defined (STM32F769xx) || defined (STM32F777xx) || defined (STM32F779xx)
+ /*------------------------------------- SDMMC2 Configuration ------------------------------------*/
+ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SDMMC2) == RCC_PERIPHCLK_SDMMC2)
+ 8001fd8: 687b ldr r3, [r7, #4]
+ 8001fda: 681b ldr r3, [r3, #0]
+ 8001fdc: f003 6380 and.w r3, r3, #67108864 ; 0x4000000
+ 8001fe0: 2b00 cmp r3, #0
+ 8001fe2: d00b beq.n 8001ffc <HAL_RCCEx_PeriphCLKConfig+0x48c>
+ {
+ /* Check the parameters */
+ assert_param(IS_RCC_SDMMC2CLKSOURCE(PeriphClkInit->Sdmmc2ClockSelection));
+
+ /* Configure the SDMMC2 clock source */
+ __HAL_RCC_SDMMC2_CONFIG(PeriphClkInit->Sdmmc2ClockSelection);
+ 8001fe4: 4b0d ldr r3, [pc, #52] ; (800201c <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001fe6: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
+ 8001fea: f023 5200 bic.w r2, r3, #536870912 ; 0x20000000
+ 8001fee: 687b ldr r3, [r7, #4]
+ 8001ff0: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84
+ 8001ff4: 4909 ldr r1, [pc, #36] ; (800201c <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001ff6: 4313 orrs r3, r2
+ 8001ff8: f8c1 3090 str.w r3, [r1, #144] ; 0x90
+ }
+
+ /*------------------------------------- DFSDM1 Configuration -------------------------------------*/
+ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_DFSDM1) == RCC_PERIPHCLK_DFSDM1)
+ 8001ffc: 687b ldr r3, [r7, #4]
+ 8001ffe: 681b ldr r3, [r3, #0]
+ 8002000: f003 6300 and.w r3, r3, #134217728 ; 0x8000000
+ 8002004: 2b00 cmp r3, #0
+ 8002006: d00f beq.n 8002028 <HAL_RCCEx_PeriphCLKConfig+0x4b8>
+ {
+ /* Check the parameters */
+ assert_param(IS_RCC_DFSDM1CLKSOURCE(PeriphClkInit->Dfsdm1ClockSelection));
+
+ /* Configure the DFSDM1 interface clock source */
+ __HAL_RCC_DFSDM1_CONFIG(PeriphClkInit->Dfsdm1ClockSelection);
+ 8002008: 4b04 ldr r3, [pc, #16] ; (800201c <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 800200a: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c
+ 800200e: f023 7200 bic.w r2, r3, #33554432 ; 0x2000000
+ 8002012: 687b ldr r3, [r7, #4]
+ 8002014: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88
+ 8002018: e002 b.n 8002020 <HAL_RCCEx_PeriphCLKConfig+0x4b0>
+ 800201a: bf00 nop
+ 800201c: 40023800 .word 0x40023800
+ 8002020: 4985 ldr r1, [pc, #532] ; (8002238 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
+ 8002022: 4313 orrs r3, r2
+ 8002024: f8c1 308c str.w r3, [r1, #140] ; 0x8c
+ }
+
+ /*------------------------------------- DFSDM AUDIO Configuration -------------------------------------*/
+ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_DFSDM1_AUDIO) == RCC_PERIPHCLK_DFSDM1_AUDIO)
+ 8002028: 687b ldr r3, [r7, #4]
+ 800202a: 681b ldr r3, [r3, #0]
+ 800202c: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
+ 8002030: 2b00 cmp r3, #0
+ 8002032: d00b beq.n 800204c <HAL_RCCEx_PeriphCLKConfig+0x4dc>
+ {
+ /* Check the parameters */
+ assert_param(IS_RCC_DFSDM1AUDIOCLKSOURCE(PeriphClkInit->Dfsdm1AudioClockSelection));
+
+ /* Configure the DFSDM interface clock source */
+ __HAL_RCC_DFSDM1AUDIO_CONFIG(PeriphClkInit->Dfsdm1AudioClockSelection);
+ 8002034: 4b80 ldr r3, [pc, #512] ; (8002238 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
+ 8002036: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c
+ 800203a: f023 6280 bic.w r2, r3, #67108864 ; 0x4000000
+ 800203e: 687b ldr r3, [r7, #4]
+ 8002040: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c
+ 8002044: 497c ldr r1, [pc, #496] ; (8002238 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
+ 8002046: 4313 orrs r3, r2
+ 8002048: f8c1 308c str.w r3, [r1, #140] ; 0x8c
+ }
+#endif /* STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */
+
+ /*-------------------------------------- PLLI2S Configuration ---------------------------------*/
+ /* PLLI2S is configured when a peripheral will use it as source clock : SAI1, SAI2, I2S or SPDIF-RX */
+ if((plli2sused == 1) || (PeriphClkInit->PeriphClockSelection == RCC_PERIPHCLK_PLLI2S))
+ 800204c: 69fb ldr r3, [r7, #28]
+ 800204e: 2b01 cmp r3, #1
+ 8002050: d005 beq.n 800205e <HAL_RCCEx_PeriphCLKConfig+0x4ee>
+ 8002052: 687b ldr r3, [r7, #4]
+ 8002054: 681b ldr r3, [r3, #0]
+ 8002056: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000
+ 800205a: f040 80d6 bne.w 800220a <HAL_RCCEx_PeriphCLKConfig+0x69a>
+ {
+ /* Disable the PLLI2S */
+ __HAL_RCC_PLLI2S_DISABLE();
+ 800205e: 4b76 ldr r3, [pc, #472] ; (8002238 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
+ 8002060: 681b ldr r3, [r3, #0]
+ 8002062: 4a75 ldr r2, [pc, #468] ; (8002238 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
+ 8002064: f023 6380 bic.w r3, r3, #67108864 ; 0x4000000
+ 8002068: 6013 str r3, [r2, #0]
+
+ /* Get Start Tick*/
+ tickstart = HAL_GetTick();
+ 800206a: f7fe fabf bl 80005ec <HAL_GetTick>
+ 800206e: 6178 str r0, [r7, #20]
+
+ /* Wait till PLLI2S is disabled */
+ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) != RESET)
+ 8002070: e008 b.n 8002084 <HAL_RCCEx_PeriphCLKConfig+0x514>
+ {
+ if((HAL_GetTick() - tickstart) > PLLI2S_TIMEOUT_VALUE)
+ 8002072: f7fe fabb bl 80005ec <HAL_GetTick>
+ 8002076: 4602 mov r2, r0
+ 8002078: 697b ldr r3, [r7, #20]
+ 800207a: 1ad3 subs r3, r2, r3
+ 800207c: 2b64 cmp r3, #100 ; 0x64
+ 800207e: d901 bls.n 8002084 <HAL_RCCEx_PeriphCLKConfig+0x514>
+ {
+ /* return in case of Timeout detected */
+ return HAL_TIMEOUT;
+ 8002080: 2303 movs r3, #3
+ 8002082: e194 b.n 80023ae <HAL_RCCEx_PeriphCLKConfig+0x83e>
+ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) != RESET)
+ 8002084: 4b6c ldr r3, [pc, #432] ; (8002238 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
+ 8002086: 681b ldr r3, [r3, #0]
+ 8002088: f003 6300 and.w r3, r3, #134217728 ; 0x8000000
+ 800208c: 2b00 cmp r3, #0
+ 800208e: d1f0 bne.n 8002072 <HAL_RCCEx_PeriphCLKConfig+0x502>
+
+ /* check for common PLLI2S Parameters */
+ assert_param(IS_RCC_PLLI2SN_VALUE(PeriphClkInit->PLLI2S.PLLI2SN));
+
+ /*----------------- In Case of PLLI2S is selected as source clock for I2S -------------------*/
+ if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S) == RCC_PERIPHCLK_I2S) && (PeriphClkInit->I2sClockSelection == RCC_I2SCLKSOURCE_PLLI2S)))
+ 8002090: 687b ldr r3, [r7, #4]
+ 8002092: 681b ldr r3, [r3, #0]
+ 8002094: f003 0301 and.w r3, r3, #1
+ 8002098: 2b00 cmp r3, #0
+ 800209a: d021 beq.n 80020e0 <HAL_RCCEx_PeriphCLKConfig+0x570>
+ 800209c: 687b ldr r3, [r7, #4]
+ 800209e: 6b5b ldr r3, [r3, #52] ; 0x34
+ 80020a0: 2b00 cmp r3, #0
+ 80020a2: d11d bne.n 80020e0 <HAL_RCCEx_PeriphCLKConfig+0x570>
+ {
+ /* check for Parameters */
+ assert_param(IS_RCC_PLLI2SR_VALUE(PeriphClkInit->PLLI2S.PLLI2SR));
+
+ /* Read PLLI2SP and PLLI2SQ value from PLLI2SCFGR register (this value is not needed for I2S configuration) */
+ tmpreg0 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SP) >> RCC_PLLI2SCFGR_PLLI2SP_Pos);
+ 80020a4: 4b64 ldr r3, [pc, #400] ; (8002238 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
+ 80020a6: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84
+ 80020aa: 0c1b lsrs r3, r3, #16
+ 80020ac: f003 0303 and.w r3, r3, #3
+ 80020b0: 613b str r3, [r7, #16]
+ tmpreg1 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SQ) >> RCC_PLLI2SCFGR_PLLI2SQ_Pos);
+ 80020b2: 4b61 ldr r3, [pc, #388] ; (8002238 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
+ 80020b4: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84
+ 80020b8: 0e1b lsrs r3, r3, #24
+ 80020ba: f003 030f and.w r3, r3, #15
+ 80020be: 60fb str r3, [r7, #12]
+ /* Configure the PLLI2S division factors */
+ /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) x (PLLI2SN/PLLM) */
+ /* I2SCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SR */
+ __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN , tmpreg0, tmpreg1, PeriphClkInit->PLLI2S.PLLI2SR);
+ 80020c0: 687b ldr r3, [r7, #4]
+ 80020c2: 685b ldr r3, [r3, #4]
+ 80020c4: 019a lsls r2, r3, #6
+ 80020c6: 693b ldr r3, [r7, #16]
+ 80020c8: 041b lsls r3, r3, #16
+ 80020ca: 431a orrs r2, r3
+ 80020cc: 68fb ldr r3, [r7, #12]
+ 80020ce: 061b lsls r3, r3, #24
+ 80020d0: 431a orrs r2, r3
+ 80020d2: 687b ldr r3, [r7, #4]
+ 80020d4: 689b ldr r3, [r3, #8]
+ 80020d6: 071b lsls r3, r3, #28
+ 80020d8: 4957 ldr r1, [pc, #348] ; (8002238 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
+ 80020da: 4313 orrs r3, r2
+ 80020dc: f8c1 3084 str.w r3, [r1, #132] ; 0x84
+ }
+
+ /*----------------- In Case of PLLI2S is selected as source clock for SAI -------------------*/
+ if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) && (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLI2S)) ||
+ 80020e0: 687b ldr r3, [r7, #4]
+ 80020e2: 681b ldr r3, [r3, #0]
+ 80020e4: f403 2300 and.w r3, r3, #524288 ; 0x80000
+ 80020e8: 2b00 cmp r3, #0
+ 80020ea: d004 beq.n 80020f6 <HAL_RCCEx_PeriphCLKConfig+0x586>
+ 80020ec: 687b ldr r3, [r7, #4]
+ 80020ee: 6bdb ldr r3, [r3, #60] ; 0x3c
+ 80020f0: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000
+ 80020f4: d00a beq.n 800210c <HAL_RCCEx_PeriphCLKConfig+0x59c>
+ ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLI2S)))
+ 80020f6: 687b ldr r3, [r7, #4]
+ 80020f8: 681b ldr r3, [r3, #0]
+ 80020fa: f403 1380 and.w r3, r3, #1048576 ; 0x100000
+ if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) && (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLI2S)) ||
+ 80020fe: 2b00 cmp r3, #0
+ 8002100: d02e beq.n 8002160 <HAL_RCCEx_PeriphCLKConfig+0x5f0>
+ ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLI2S)))
+ 8002102: 687b ldr r3, [r7, #4]
+ 8002104: 6c1b ldr r3, [r3, #64] ; 0x40
+ 8002106: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000
+ 800210a: d129 bne.n 8002160 <HAL_RCCEx_PeriphCLKConfig+0x5f0>
+ assert_param(IS_RCC_PLLI2SQ_VALUE(PeriphClkInit->PLLI2S.PLLI2SQ));
+ /* Check for PLLI2S/DIVQ parameters */
+ assert_param(IS_RCC_PLLI2S_DIVQ_VALUE(PeriphClkInit->PLLI2SDivQ));
+
+ /* Read PLLI2SP and PLLI2SR values from PLLI2SCFGR register (this value is not needed for SAI configuration) */
+ tmpreg0 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SP) >> RCC_PLLI2SCFGR_PLLI2SP_Pos);
+ 800210c: 4b4a ldr r3, [pc, #296] ; (8002238 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
+ 800210e: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84
+ 8002112: 0c1b lsrs r3, r3, #16
+ 8002114: f003 0303 and.w r3, r3, #3
+ 8002118: 613b str r3, [r7, #16]
+ tmpreg1 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos);
+ 800211a: 4b47 ldr r3, [pc, #284] ; (8002238 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
+ 800211c: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84
+ 8002120: 0f1b lsrs r3, r3, #28
+ 8002122: f003 0307 and.w r3, r3, #7
+ 8002126: 60fb str r3, [r7, #12]
+ /* Configure the PLLI2S division factors */
+ /* PLLI2S_VCO Input = PLL_SOURCE/PLLM */
+ /* PLLI2S_VCO Output = PLLI2S_VCO Input * PLLI2SN */
+ /* SAI_CLK(first level) = PLLI2S_VCO Output/PLLI2SQ */
+ __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN, tmpreg0, PeriphClkInit->PLLI2S.PLLI2SQ, tmpreg1);
+ 8002128: 687b ldr r3, [r7, #4]
+ 800212a: 685b ldr r3, [r3, #4]
+ 800212c: 019a lsls r2, r3, #6
+ 800212e: 693b ldr r3, [r7, #16]
+ 8002130: 041b lsls r3, r3, #16
+ 8002132: 431a orrs r2, r3
+ 8002134: 687b ldr r3, [r7, #4]
+ 8002136: 68db ldr r3, [r3, #12]
+ 8002138: 061b lsls r3, r3, #24
+ 800213a: 431a orrs r2, r3
+ 800213c: 68fb ldr r3, [r7, #12]
+ 800213e: 071b lsls r3, r3, #28
+ 8002140: 493d ldr r1, [pc, #244] ; (8002238 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
+ 8002142: 4313 orrs r3, r2
+ 8002144: f8c1 3084 str.w r3, [r1, #132] ; 0x84
+
+ /* SAI_CLK_x = SAI_CLK(first level)/PLLI2SDIVQ */
+ __HAL_RCC_PLLI2S_PLLSAICLKDIVQ_CONFIG(PeriphClkInit->PLLI2SDivQ);
+ 8002148: 4b3b ldr r3, [pc, #236] ; (8002238 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
+ 800214a: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c
+ 800214e: f023 021f bic.w r2, r3, #31
+ 8002152: 687b ldr r3, [r7, #4]
+ 8002154: 6a5b ldr r3, [r3, #36] ; 0x24
+ 8002156: 3b01 subs r3, #1
+ 8002158: 4937 ldr r1, [pc, #220] ; (8002238 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
+ 800215a: 4313 orrs r3, r2
+ 800215c: f8c1 308c str.w r3, [r1, #140] ; 0x8c
+ }
+
+ /*----------------- In Case of PLLI2S is selected as source clock for SPDIF-RX -------------------*/
+ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPDIFRX) == RCC_PERIPHCLK_SPDIFRX)
+ 8002160: 687b ldr r3, [r7, #4]
+ 8002162: 681b ldr r3, [r3, #0]
+ 8002164: f003 7380 and.w r3, r3, #16777216 ; 0x1000000
+ 8002168: 2b00 cmp r3, #0
+ 800216a: d01d beq.n 80021a8 <HAL_RCCEx_PeriphCLKConfig+0x638>
+ {
+ /* check for Parameters */
+ assert_param(IS_RCC_PLLI2SP_VALUE(PeriphClkInit->PLLI2S.PLLI2SP));
+
+ /* Read PLLI2SR value from PLLI2SCFGR register (this value is not needed for SPDIF-RX configuration) */
+ tmpreg0 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SQ) >> RCC_PLLI2SCFGR_PLLI2SQ_Pos);
+ 800216c: 4b32 ldr r3, [pc, #200] ; (8002238 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
+ 800216e: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84
+ 8002172: 0e1b lsrs r3, r3, #24
+ 8002174: f003 030f and.w r3, r3, #15
+ 8002178: 613b str r3, [r7, #16]
+ tmpreg1 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos);
+ 800217a: 4b2f ldr r3, [pc, #188] ; (8002238 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
+ 800217c: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84
+ 8002180: 0f1b lsrs r3, r3, #28
+ 8002182: f003 0307 and.w r3, r3, #7
+ 8002186: 60fb str r3, [r7, #12]
+ /* Configure the PLLI2S division factors */
+ /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) x (PLLI2SN/PLLM) */
+ /* SPDIFCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SP */
+ __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN , PeriphClkInit->PLLI2S.PLLI2SP, tmpreg0, tmpreg1);
+ 8002188: 687b ldr r3, [r7, #4]
+ 800218a: 685b ldr r3, [r3, #4]
+ 800218c: 019a lsls r2, r3, #6
+ 800218e: 687b ldr r3, [r7, #4]
+ 8002190: 691b ldr r3, [r3, #16]
+ 8002192: 041b lsls r3, r3, #16
+ 8002194: 431a orrs r2, r3
+ 8002196: 693b ldr r3, [r7, #16]
+ 8002198: 061b lsls r3, r3, #24
+ 800219a: 431a orrs r2, r3
+ 800219c: 68fb ldr r3, [r7, #12]
+ 800219e: 071b lsls r3, r3, #28
+ 80021a0: 4925 ldr r1, [pc, #148] ; (8002238 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
+ 80021a2: 4313 orrs r3, r2
+ 80021a4: f8c1 3084 str.w r3, [r1, #132] ; 0x84
+ }
+
+ /*----------------- In Case of PLLI2S is just selected -----------------*/
+ if((PeriphClkInit->PeriphClockSelection & RCC_PERIPHCLK_PLLI2S) == RCC_PERIPHCLK_PLLI2S)
+ 80021a8: 687b ldr r3, [r7, #4]
+ 80021aa: 681b ldr r3, [r3, #0]
+ 80021ac: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
+ 80021b0: 2b00 cmp r3, #0
+ 80021b2: d011 beq.n 80021d8 <HAL_RCCEx_PeriphCLKConfig+0x668>
+ assert_param(IS_RCC_PLLI2SQ_VALUE(PeriphClkInit->PLLI2S.PLLI2SQ));
+
+ /* Configure the PLLI2S division factors */
+ /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) x (PLLI2SN/PLLI2SM) */
+ /* SPDIFRXCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SP */
+ __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN , PeriphClkInit->PLLI2S.PLLI2SP, PeriphClkInit->PLLI2S.PLLI2SQ, PeriphClkInit->PLLI2S.PLLI2SR);
+ 80021b4: 687b ldr r3, [r7, #4]
+ 80021b6: 685b ldr r3, [r3, #4]
+ 80021b8: 019a lsls r2, r3, #6
+ 80021ba: 687b ldr r3, [r7, #4]
+ 80021bc: 691b ldr r3, [r3, #16]
+ 80021be: 041b lsls r3, r3, #16
+ 80021c0: 431a orrs r2, r3
+ 80021c2: 687b ldr r3, [r7, #4]
+ 80021c4: 68db ldr r3, [r3, #12]
+ 80021c6: 061b lsls r3, r3, #24
+ 80021c8: 431a orrs r2, r3
+ 80021ca: 687b ldr r3, [r7, #4]
+ 80021cc: 689b ldr r3, [r3, #8]
+ 80021ce: 071b lsls r3, r3, #28
+ 80021d0: 4919 ldr r1, [pc, #100] ; (8002238 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
+ 80021d2: 4313 orrs r3, r2
+ 80021d4: f8c1 3084 str.w r3, [r1, #132] ; 0x84
+ }
+
+ /* Enable the PLLI2S */
+ __HAL_RCC_PLLI2S_ENABLE();
+ 80021d8: 4b17 ldr r3, [pc, #92] ; (8002238 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
+ 80021da: 681b ldr r3, [r3, #0]
+ 80021dc: 4a16 ldr r2, [pc, #88] ; (8002238 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
+ 80021de: f043 6380 orr.w r3, r3, #67108864 ; 0x4000000
+ 80021e2: 6013 str r3, [r2, #0]
+
+ /* Get Start Tick*/
+ tickstart = HAL_GetTick();
+ 80021e4: f7fe fa02 bl 80005ec <HAL_GetTick>
+ 80021e8: 6178 str r0, [r7, #20]
+
+ /* Wait till PLLI2S is ready */
+ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) == RESET)
+ 80021ea: e008 b.n 80021fe <HAL_RCCEx_PeriphCLKConfig+0x68e>
+ {
+ if((HAL_GetTick() - tickstart) > PLLI2S_TIMEOUT_VALUE)
+ 80021ec: f7fe f9fe bl 80005ec <HAL_GetTick>
+ 80021f0: 4602 mov r2, r0
+ 80021f2: 697b ldr r3, [r7, #20]
+ 80021f4: 1ad3 subs r3, r2, r3
+ 80021f6: 2b64 cmp r3, #100 ; 0x64
+ 80021f8: d901 bls.n 80021fe <HAL_RCCEx_PeriphCLKConfig+0x68e>
+ {
+ /* return in case of Timeout detected */
+ return HAL_TIMEOUT;
+ 80021fa: 2303 movs r3, #3
+ 80021fc: e0d7 b.n 80023ae <HAL_RCCEx_PeriphCLKConfig+0x83e>
+ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) == RESET)
+ 80021fe: 4b0e ldr r3, [pc, #56] ; (8002238 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
+ 8002200: 681b ldr r3, [r3, #0]
+ 8002202: f003 6300 and.w r3, r3, #134217728 ; 0x8000000
+ 8002206: 2b00 cmp r3, #0
+ 8002208: d0f0 beq.n 80021ec <HAL_RCCEx_PeriphCLKConfig+0x67c>
+ }
+ }
+
+ /*-------------------------------------- PLLSAI Configuration ---------------------------------*/
+ /* PLLSAI is configured when a peripheral will use it as source clock : SAI1, SAI2, LTDC or CK48 */
+ if(pllsaiused == 1)
+ 800220a: 69bb ldr r3, [r7, #24]
+ 800220c: 2b01 cmp r3, #1
+ 800220e: f040 80cd bne.w 80023ac <HAL_RCCEx_PeriphCLKConfig+0x83c>
+ {
+ /* Disable PLLSAI Clock */
+ __HAL_RCC_PLLSAI_DISABLE();
+ 8002212: 4b09 ldr r3, [pc, #36] ; (8002238 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
+ 8002214: 681b ldr r3, [r3, #0]
+ 8002216: 4a08 ldr r2, [pc, #32] ; (8002238 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
+ 8002218: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000
+ 800221c: 6013 str r3, [r2, #0]
+
+ /* Get Start Tick*/
+ tickstart = HAL_GetTick();
+ 800221e: f7fe f9e5 bl 80005ec <HAL_GetTick>
+ 8002222: 6178 str r0, [r7, #20]
+
+ /* Wait till PLLSAI is disabled */
+ while(__HAL_RCC_PLLSAI_GET_FLAG() != RESET)
+ 8002224: e00a b.n 800223c <HAL_RCCEx_PeriphCLKConfig+0x6cc>
+ {
+ if((HAL_GetTick() - tickstart) > PLLSAI_TIMEOUT_VALUE)
+ 8002226: f7fe f9e1 bl 80005ec <HAL_GetTick>
+ 800222a: 4602 mov r2, r0
+ 800222c: 697b ldr r3, [r7, #20]
+ 800222e: 1ad3 subs r3, r2, r3
+ 8002230: 2b64 cmp r3, #100 ; 0x64
+ 8002232: d903 bls.n 800223c <HAL_RCCEx_PeriphCLKConfig+0x6cc>
+ {
+ /* return in case of Timeout detected */
+ return HAL_TIMEOUT;
+ 8002234: 2303 movs r3, #3
+ 8002236: e0ba b.n 80023ae <HAL_RCCEx_PeriphCLKConfig+0x83e>
+ 8002238: 40023800 .word 0x40023800
+ while(__HAL_RCC_PLLSAI_GET_FLAG() != RESET)
+ 800223c: 4b5e ldr r3, [pc, #376] ; (80023b8 <HAL_RCCEx_PeriphCLKConfig+0x848>)
+ 800223e: 681b ldr r3, [r3, #0]
+ 8002240: f003 5300 and.w r3, r3, #536870912 ; 0x20000000
+ 8002244: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000
+ 8002248: d0ed beq.n 8002226 <HAL_RCCEx_PeriphCLKConfig+0x6b6>
+
+ /* Check the PLLSAI division factors */
+ assert_param(IS_RCC_PLLSAIN_VALUE(PeriphClkInit->PLLSAI.PLLSAIN));
+
+ /*----------------- In Case of PLLSAI is selected as source clock for SAI -------------------*/
+ if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) && (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLSAI)) ||\
+ 800224a: 687b ldr r3, [r7, #4]
+ 800224c: 681b ldr r3, [r3, #0]
+ 800224e: f403 2300 and.w r3, r3, #524288 ; 0x80000
+ 8002252: 2b00 cmp r3, #0
+ 8002254: d003 beq.n 800225e <HAL_RCCEx_PeriphCLKConfig+0x6ee>
+ 8002256: 687b ldr r3, [r7, #4]
+ 8002258: 6bdb ldr r3, [r3, #60] ; 0x3c
+ 800225a: 2b00 cmp r3, #0
+ 800225c: d009 beq.n 8002272 <HAL_RCCEx_PeriphCLKConfig+0x702>
+ ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLSAI)))
+ 800225e: 687b ldr r3, [r7, #4]
+ 8002260: 681b ldr r3, [r3, #0]
+ 8002262: f403 1380 and.w r3, r3, #1048576 ; 0x100000
+ if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) && (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLSAI)) ||\
+ 8002266: 2b00 cmp r3, #0
+ 8002268: d02e beq.n 80022c8 <HAL_RCCEx_PeriphCLKConfig+0x758>
+ ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLSAI)))
+ 800226a: 687b ldr r3, [r7, #4]
+ 800226c: 6c1b ldr r3, [r3, #64] ; 0x40
+ 800226e: 2b00 cmp r3, #0
+ 8002270: d12a bne.n 80022c8 <HAL_RCCEx_PeriphCLKConfig+0x758>
+ assert_param(IS_RCC_PLLSAIQ_VALUE(PeriphClkInit->PLLSAI.PLLSAIQ));
+ /* check for PLLSAI/DIVQ Parameter */
+ assert_param(IS_RCC_PLLSAI_DIVQ_VALUE(PeriphClkInit->PLLSAIDivQ));
+
+ /* Read PLLSAIP value from PLLSAICFGR register (this value is not needed for SAI configuration) */
+ tmpreg0 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIP) >> RCC_PLLSAICFGR_PLLSAIP_Pos);
+ 8002272: 4b51 ldr r3, [pc, #324] ; (80023b8 <HAL_RCCEx_PeriphCLKConfig+0x848>)
+ 8002274: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88
+ 8002278: 0c1b lsrs r3, r3, #16
+ 800227a: f003 0303 and.w r3, r3, #3
+ 800227e: 613b str r3, [r7, #16]
+ tmpreg1 = ((RCC->PLLSAICFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLSAICFGR_PLLSAIR_Pos);
+ 8002280: 4b4d ldr r3, [pc, #308] ; (80023b8 <HAL_RCCEx_PeriphCLKConfig+0x848>)
+ 8002282: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88
+ 8002286: 0f1b lsrs r3, r3, #28
+ 8002288: f003 0307 and.w r3, r3, #7
+ 800228c: 60fb str r3, [r7, #12]
+ /* PLLSAI_VCO Input = PLL_SOURCE/PLLM */
+ /* PLLSAI_VCO Output = PLLSAI_VCO Input * PLLSAIN */
+ /* SAI_CLK(first level) = PLLSAI_VCO Output/PLLSAIQ */
+ __HAL_RCC_PLLSAI_CONFIG(PeriphClkInit->PLLSAI.PLLSAIN , tmpreg0, PeriphClkInit->PLLSAI.PLLSAIQ, tmpreg1);
+ 800228e: 687b ldr r3, [r7, #4]
+ 8002290: 695b ldr r3, [r3, #20]
+ 8002292: 019a lsls r2, r3, #6
+ 8002294: 693b ldr r3, [r7, #16]
+ 8002296: 041b lsls r3, r3, #16
+ 8002298: 431a orrs r2, r3
+ 800229a: 687b ldr r3, [r7, #4]
+ 800229c: 699b ldr r3, [r3, #24]
+ 800229e: 061b lsls r3, r3, #24
+ 80022a0: 431a orrs r2, r3
+ 80022a2: 68fb ldr r3, [r7, #12]
+ 80022a4: 071b lsls r3, r3, #28
+ 80022a6: 4944 ldr r1, [pc, #272] ; (80023b8 <HAL_RCCEx_PeriphCLKConfig+0x848>)
+ 80022a8: 4313 orrs r3, r2
+ 80022aa: f8c1 3088 str.w r3, [r1, #136] ; 0x88
+
+ /* SAI_CLK_x = SAI_CLK(first level)/PLLSAIDIVQ */
+ __HAL_RCC_PLLSAI_PLLSAICLKDIVQ_CONFIG(PeriphClkInit->PLLSAIDivQ);
+ 80022ae: 4b42 ldr r3, [pc, #264] ; (80023b8 <HAL_RCCEx_PeriphCLKConfig+0x848>)
+ 80022b0: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c
+ 80022b4: f423 52f8 bic.w r2, r3, #7936 ; 0x1f00
+ 80022b8: 687b ldr r3, [r7, #4]
+ 80022ba: 6a9b ldr r3, [r3, #40] ; 0x28
+ 80022bc: 3b01 subs r3, #1
+ 80022be: 021b lsls r3, r3, #8
+ 80022c0: 493d ldr r1, [pc, #244] ; (80023b8 <HAL_RCCEx_PeriphCLKConfig+0x848>)
+ 80022c2: 4313 orrs r3, r2
+ 80022c4: f8c1 308c str.w r3, [r1, #140] ; 0x8c
+ }
+
+ /*----------------- In Case of PLLSAI is selected as source clock for CLK48 -------------------*/
+ /* In Case of PLLI2S is selected as source clock for CK48 */
+ if((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CLK48) == RCC_PERIPHCLK_CLK48) && (PeriphClkInit->Clk48ClockSelection == RCC_CLK48SOURCE_PLLSAIP))
+ 80022c8: 687b ldr r3, [r7, #4]
+ 80022ca: 681b ldr r3, [r3, #0]
+ 80022cc: f403 1300 and.w r3, r3, #2097152 ; 0x200000
+ 80022d0: 2b00 cmp r3, #0
+ 80022d2: d022 beq.n 800231a <HAL_RCCEx_PeriphCLKConfig+0x7aa>
+ 80022d4: 687b ldr r3, [r7, #4]
+ 80022d6: 6fdb ldr r3, [r3, #124] ; 0x7c
+ 80022d8: f1b3 6f00 cmp.w r3, #134217728 ; 0x8000000
+ 80022dc: d11d bne.n 800231a <HAL_RCCEx_PeriphCLKConfig+0x7aa>
+ {
+ /* check for Parameters */
+ assert_param(IS_RCC_PLLSAIP_VALUE(PeriphClkInit->PLLSAI.PLLSAIP));
+ /* Read PLLSAIQ and PLLSAIR value from PLLSAICFGR register (this value is not needed for CK48 configuration) */
+ tmpreg0 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIQ) >> RCC_PLLSAICFGR_PLLSAIQ_Pos);
+ 80022de: 4b36 ldr r3, [pc, #216] ; (80023b8 <HAL_RCCEx_PeriphCLKConfig+0x848>)
+ 80022e0: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88
+ 80022e4: 0e1b lsrs r3, r3, #24
+ 80022e6: f003 030f and.w r3, r3, #15
+ 80022ea: 613b str r3, [r7, #16]
+ tmpreg1 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIR) >> RCC_PLLSAICFGR_PLLSAIR_Pos);
+ 80022ec: 4b32 ldr r3, [pc, #200] ; (80023b8 <HAL_RCCEx_PeriphCLKConfig+0x848>)
+ 80022ee: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88
+ 80022f2: 0f1b lsrs r3, r3, #28
+ 80022f4: f003 0307 and.w r3, r3, #7
+ 80022f8: 60fb str r3, [r7, #12]
+
+ /* Configure the PLLSAI division factors */
+ /* PLLSAI_VCO = f(VCO clock) = f(PLLSAI clock input) x (PLLI2SN/PLLM) */
+ /* 48CLK = f(PLLSAI clock output) = f(VCO clock) / PLLSAIP */
+ __HAL_RCC_PLLSAI_CONFIG(PeriphClkInit->PLLSAI.PLLSAIN , PeriphClkInit->PLLSAI.PLLSAIP, tmpreg0, tmpreg1);
+ 80022fa: 687b ldr r3, [r7, #4]
+ 80022fc: 695b ldr r3, [r3, #20]
+ 80022fe: 019a lsls r2, r3, #6
+ 8002300: 687b ldr r3, [r7, #4]
+ 8002302: 6a1b ldr r3, [r3, #32]
+ 8002304: 041b lsls r3, r3, #16
+ 8002306: 431a orrs r2, r3
+ 8002308: 693b ldr r3, [r7, #16]
+ 800230a: 061b lsls r3, r3, #24
+ 800230c: 431a orrs r2, r3
+ 800230e: 68fb ldr r3, [r7, #12]
+ 8002310: 071b lsls r3, r3, #28
+ 8002312: 4929 ldr r1, [pc, #164] ; (80023b8 <HAL_RCCEx_PeriphCLKConfig+0x848>)
+ 8002314: 4313 orrs r3, r2
+ 8002316: f8c1 3088 str.w r3, [r1, #136] ; 0x88
+ }
+
+#if defined(STM32F746xx) || defined(STM32F756xx) || defined (STM32F767xx) || defined (STM32F769xx) || defined (STM32F777xx) || defined (STM32F779xx) || defined (STM32F750xx)
+ /*---------------------------- LTDC configuration -------------------------------*/
+ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LTDC) == (RCC_PERIPHCLK_LTDC))
+ 800231a: 687b ldr r3, [r7, #4]
+ 800231c: 681b ldr r3, [r3, #0]
+ 800231e: f003 0308 and.w r3, r3, #8
+ 8002322: 2b00 cmp r3, #0
+ 8002324: d028 beq.n 8002378 <HAL_RCCEx_PeriphCLKConfig+0x808>
+ {
+ assert_param(IS_RCC_PLLSAIR_VALUE(PeriphClkInit->PLLSAI.PLLSAIR));
+ assert_param(IS_RCC_PLLSAI_DIVR_VALUE(PeriphClkInit->PLLSAIDivR));
+
+ /* Read PLLSAIP and PLLSAIQ value from PLLSAICFGR register (these value are not needed for LTDC configuration) */
+ tmpreg0 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIQ) >> RCC_PLLSAICFGR_PLLSAIQ_Pos);
+ 8002326: 4b24 ldr r3, [pc, #144] ; (80023b8 <HAL_RCCEx_PeriphCLKConfig+0x848>)
+ 8002328: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88
+ 800232c: 0e1b lsrs r3, r3, #24
+ 800232e: f003 030f and.w r3, r3, #15
+ 8002332: 613b str r3, [r7, #16]
+ tmpreg1 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIP) >> RCC_PLLSAICFGR_PLLSAIP_Pos);
+ 8002334: 4b20 ldr r3, [pc, #128] ; (80023b8 <HAL_RCCEx_PeriphCLKConfig+0x848>)
+ 8002336: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88
+ 800233a: 0c1b lsrs r3, r3, #16
+ 800233c: f003 0303 and.w r3, r3, #3
+ 8002340: 60fb str r3, [r7, #12]
+
+ /* PLLSAI_VCO Input = PLL_SOURCE/PLLM */
+ /* PLLSAI_VCO Output = PLLSAI_VCO Input * PLLSAIN */
+ /* LTDC_CLK(first level) = PLLSAI_VCO Output/PLLSAIR */
+ __HAL_RCC_PLLSAI_CONFIG(PeriphClkInit->PLLSAI.PLLSAIN , tmpreg1, tmpreg0, PeriphClkInit->PLLSAI.PLLSAIR);
+ 8002342: 687b ldr r3, [r7, #4]
+ 8002344: 695b ldr r3, [r3, #20]
+ 8002346: 019a lsls r2, r3, #6
+ 8002348: 68fb ldr r3, [r7, #12]
+ 800234a: 041b lsls r3, r3, #16
+ 800234c: 431a orrs r2, r3
+ 800234e: 693b ldr r3, [r7, #16]
+ 8002350: 061b lsls r3, r3, #24
+ 8002352: 431a orrs r2, r3
+ 8002354: 687b ldr r3, [r7, #4]
+ 8002356: 69db ldr r3, [r3, #28]
+ 8002358: 071b lsls r3, r3, #28
+ 800235a: 4917 ldr r1, [pc, #92] ; (80023b8 <HAL_RCCEx_PeriphCLKConfig+0x848>)
+ 800235c: 4313 orrs r3, r2
+ 800235e: f8c1 3088 str.w r3, [r1, #136] ; 0x88
+
+ /* LTDC_CLK = LTDC_CLK(first level)/PLLSAIDIVR */
+ __HAL_RCC_PLLSAI_PLLSAICLKDIVR_CONFIG(PeriphClkInit->PLLSAIDivR);
+ 8002362: 4b15 ldr r3, [pc, #84] ; (80023b8 <HAL_RCCEx_PeriphCLKConfig+0x848>)
+ 8002364: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c
+ 8002368: f423 3240 bic.w r2, r3, #196608 ; 0x30000
+ 800236c: 687b ldr r3, [r7, #4]
+ 800236e: 6adb ldr r3, [r3, #44] ; 0x2c
+ 8002370: 4911 ldr r1, [pc, #68] ; (80023b8 <HAL_RCCEx_PeriphCLKConfig+0x848>)
+ 8002372: 4313 orrs r3, r2
+ 8002374: f8c1 308c str.w r3, [r1, #140] ; 0x8c
+ }
+#endif /* STM32F746xx || STM32F756xx || STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx || STM32F750xx */
+
+ /* Enable PLLSAI Clock */
+ __HAL_RCC_PLLSAI_ENABLE();
+ 8002378: 4b0f ldr r3, [pc, #60] ; (80023b8 <HAL_RCCEx_PeriphCLKConfig+0x848>)
+ 800237a: 681b ldr r3, [r3, #0]
+ 800237c: 4a0e ldr r2, [pc, #56] ; (80023b8 <HAL_RCCEx_PeriphCLKConfig+0x848>)
+ 800237e: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
+ 8002382: 6013 str r3, [r2, #0]
+
+ /* Get Start Tick*/
+ tickstart = HAL_GetTick();
+ 8002384: f7fe f932 bl 80005ec <HAL_GetTick>
+ 8002388: 6178 str r0, [r7, #20]
+
+ /* Wait till PLLSAI is ready */
+ while(__HAL_RCC_PLLSAI_GET_FLAG() == RESET)
+ 800238a: e008 b.n 800239e <HAL_RCCEx_PeriphCLKConfig+0x82e>
+ {
+ if((HAL_GetTick() - tickstart) > PLLSAI_TIMEOUT_VALUE)
+ 800238c: f7fe f92e bl 80005ec <HAL_GetTick>
+ 8002390: 4602 mov r2, r0
+ 8002392: 697b ldr r3, [r7, #20]
+ 8002394: 1ad3 subs r3, r2, r3
+ 8002396: 2b64 cmp r3, #100 ; 0x64
+ 8002398: d901 bls.n 800239e <HAL_RCCEx_PeriphCLKConfig+0x82e>
+ {
+ /* return in case of Timeout detected */
+ return HAL_TIMEOUT;
+ 800239a: 2303 movs r3, #3
+ 800239c: e007 b.n 80023ae <HAL_RCCEx_PeriphCLKConfig+0x83e>
+ while(__HAL_RCC_PLLSAI_GET_FLAG() == RESET)
+ 800239e: 4b06 ldr r3, [pc, #24] ; (80023b8 <HAL_RCCEx_PeriphCLKConfig+0x848>)
+ 80023a0: 681b ldr r3, [r3, #0]
+ 80023a2: f003 5300 and.w r3, r3, #536870912 ; 0x20000000
+ 80023a6: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000
+ 80023aa: d1ef bne.n 800238c <HAL_RCCEx_PeriphCLKConfig+0x81c>
+ }
+ }
+ }
+ return HAL_OK;
+ 80023ac: 2300 movs r3, #0
+}
+ 80023ae: 4618 mov r0, r3
+ 80023b0: 3720 adds r7, #32
+ 80023b2: 46bd mov sp, r7
+ 80023b4: bd80 pop {r7, pc}
+ 80023b6: bf00 nop
+ 80023b8: 40023800 .word 0x40023800
+
+080023bc <HAL_TIM_Base_Init>:
+ * Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init()
+ * @param htim TIM Base handle
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim)
+{
+ 80023bc: b580 push {r7, lr}
+ 80023be: b082 sub sp, #8
+ 80023c0: af00 add r7, sp, #0
+ 80023c2: 6078 str r0, [r7, #4]
+ /* Check the TIM handle allocation */
+ if (htim == NULL)
+ 80023c4: 687b ldr r3, [r7, #4]
+ 80023c6: 2b00 cmp r3, #0
+ 80023c8: d101 bne.n 80023ce <HAL_TIM_Base_Init+0x12>
+ {
+ return HAL_ERROR;
+ 80023ca: 2301 movs r3, #1
+ 80023cc: e01d b.n 800240a <HAL_TIM_Base_Init+0x4e>
+ assert_param(IS_TIM_INSTANCE(htim->Instance));
+ assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
+ assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
+ assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
+
+ if (htim->State == HAL_TIM_STATE_RESET)
+ 80023ce: 687b ldr r3, [r7, #4]
+ 80023d0: f893 303d ldrb.w r3, [r3, #61] ; 0x3d
+ 80023d4: b2db uxtb r3, r3
+ 80023d6: 2b00 cmp r3, #0
+ 80023d8: d106 bne.n 80023e8 <HAL_TIM_Base_Init+0x2c>
+ {
+ /* Allocate lock resource and initialize it */
+ htim->Lock = HAL_UNLOCKED;
+ 80023da: 687b ldr r3, [r7, #4]
+ 80023dc: 2200 movs r2, #0
+ 80023de: f883 203c strb.w r2, [r3, #60] ; 0x3c
+ }
+ /* Init the low level hardware : GPIO, CLOCK, NVIC */
+ htim->Base_MspInitCallback(htim);
+#else
+ /* Init the low level hardware : GPIO, CLOCK, NVIC */
+ HAL_TIM_Base_MspInit(htim);
+ 80023e2: 6878 ldr r0, [r7, #4]
+ 80023e4: f003 f996 bl 8005714 <HAL_TIM_Base_MspInit>
+#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
+ }
+
+ /* Set the TIM state */
+ htim->State = HAL_TIM_STATE_BUSY;
+ 80023e8: 687b ldr r3, [r7, #4]
+ 80023ea: 2202 movs r2, #2
+ 80023ec: f883 203d strb.w r2, [r3, #61] ; 0x3d
+
+ /* Set the Time Base configuration */
+ TIM_Base_SetConfig(htim->Instance, &htim->Init);
+ 80023f0: 687b ldr r3, [r7, #4]
+ 80023f2: 681a ldr r2, [r3, #0]
+ 80023f4: 687b ldr r3, [r7, #4]
+ 80023f6: 3304 adds r3, #4
+ 80023f8: 4619 mov r1, r3
+ 80023fa: 4610 mov r0, r2
+ 80023fc: f000 f8ee bl 80025dc <TIM_Base_SetConfig>
+
+ /* Initialize the TIM state*/
+ htim->State = HAL_TIM_STATE_READY;
+ 8002400: 687b ldr r3, [r7, #4]
+ 8002402: 2201 movs r2, #1
+ 8002404: f883 203d strb.w r2, [r3, #61] ; 0x3d
+
+ return HAL_OK;
+ 8002408: 2300 movs r3, #0
+}
+ 800240a: 4618 mov r0, r3
+ 800240c: 3708 adds r7, #8
+ 800240e: 46bd mov sp, r7
+ 8002410: bd80 pop {r7, pc}
+ ...
+
+08002414 <HAL_TIM_Base_Start>:
+ * @brief Starts the TIM Base generation.
+ * @param htim TIM Base handle
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_TIM_Base_Start(TIM_HandleTypeDef *htim)
+{
+ 8002414: b480 push {r7}
+ 8002416: b085 sub sp, #20
+ 8002418: af00 add r7, sp, #0
+ 800241a: 6078 str r0, [r7, #4]
+
+ /* Check the parameters */
+ assert_param(IS_TIM_INSTANCE(htim->Instance));
+
+ /* Set the TIM state */
+ htim->State = HAL_TIM_STATE_BUSY;
+ 800241c: 687b ldr r3, [r7, #4]
+ 800241e: 2202 movs r2, #2
+ 8002420: f883 203d strb.w r2, [r3, #61] ; 0x3d
+
+ /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
+ tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
+ 8002424: 687b ldr r3, [r7, #4]
+ 8002426: 681b ldr r3, [r3, #0]
+ 8002428: 689a ldr r2, [r3, #8]
+ 800242a: 4b0e ldr r3, [pc, #56] ; (8002464 <HAL_TIM_Base_Start+0x50>)
+ 800242c: 4013 ands r3, r2
+ 800242e: 60fb str r3, [r7, #12]
+ if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
+ 8002430: 68fb ldr r3, [r7, #12]
+ 8002432: 2b06 cmp r3, #6
+ 8002434: d00b beq.n 800244e <HAL_TIM_Base_Start+0x3a>
+ 8002436: 68fb ldr r3, [r7, #12]
+ 8002438: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
+ 800243c: d007 beq.n 800244e <HAL_TIM_Base_Start+0x3a>
+ {
+ __HAL_TIM_ENABLE(htim);
+ 800243e: 687b ldr r3, [r7, #4]
+ 8002440: 681b ldr r3, [r3, #0]
+ 8002442: 681a ldr r2, [r3, #0]
+ 8002444: 687b ldr r3, [r7, #4]
+ 8002446: 681b ldr r3, [r3, #0]
+ 8002448: f042 0201 orr.w r2, r2, #1
+ 800244c: 601a str r2, [r3, #0]
+ }
+
+ /* Change the TIM state*/
+ htim->State = HAL_TIM_STATE_READY;
+ 800244e: 687b ldr r3, [r7, #4]
+ 8002450: 2201 movs r2, #1
+ 8002452: f883 203d strb.w r2, [r3, #61] ; 0x3d
+
+ /* Return function status */
+ return HAL_OK;
+ 8002456: 2300 movs r3, #0
+}
+ 8002458: 4618 mov r0, r3
+ 800245a: 3714 adds r7, #20
+ 800245c: 46bd mov sp, r7
+ 800245e: f85d 7b04 ldr.w r7, [sp], #4
+ 8002462: 4770 bx lr
+ 8002464: 00010007 .word 0x00010007
+
+08002468 <HAL_TIM_ConfigClockSource>:
+ * @param sClockSourceConfig pointer to a TIM_ClockConfigTypeDef structure that
+ * contains the clock source information for the TIM peripheral.
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, TIM_ClockConfigTypeDef *sClockSourceConfig)
+{
+ 8002468: b580 push {r7, lr}
+ 800246a: b084 sub sp, #16
+ 800246c: af00 add r7, sp, #0
+ 800246e: 6078 str r0, [r7, #4]
+ 8002470: 6039 str r1, [r7, #0]
+ uint32_t tmpsmcr;
+
+ /* Process Locked */
+ __HAL_LOCK(htim);
+ 8002472: 687b ldr r3, [r7, #4]
+ 8002474: f893 303c ldrb.w r3, [r3, #60] ; 0x3c
+ 8002478: 2b01 cmp r3, #1
+ 800247a: d101 bne.n 8002480 <HAL_TIM_ConfigClockSource+0x18>
+ 800247c: 2302 movs r3, #2
+ 800247e: e0a6 b.n 80025ce <HAL_TIM_ConfigClockSource+0x166>
+ 8002480: 687b ldr r3, [r7, #4]
+ 8002482: 2201 movs r2, #1
+ 8002484: f883 203c strb.w r2, [r3, #60] ; 0x3c
+
+ htim->State = HAL_TIM_STATE_BUSY;
+ 8002488: 687b ldr r3, [r7, #4]
+ 800248a: 2202 movs r2, #2
+ 800248c: f883 203d strb.w r2, [r3, #61] ; 0x3d
+
+ /* Check the parameters */
+ assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource));
+
+ /* Reset the SMS, TS, ECE, ETPS and ETRF bits */
+ tmpsmcr = htim->Instance->SMCR;
+ 8002490: 687b ldr r3, [r7, #4]
+ 8002492: 681b ldr r3, [r3, #0]
+ 8002494: 689b ldr r3, [r3, #8]
+ 8002496: 60fb str r3, [r7, #12]
+ tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS);
+ 8002498: 68fa ldr r2, [r7, #12]
+ 800249a: 4b4f ldr r3, [pc, #316] ; (80025d8 <HAL_TIM_ConfigClockSource+0x170>)
+ 800249c: 4013 ands r3, r2
+ 800249e: 60fb str r3, [r7, #12]
+ tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
+ 80024a0: 68fb ldr r3, [r7, #12]
+ 80024a2: f423 437f bic.w r3, r3, #65280 ; 0xff00
+ 80024a6: 60fb str r3, [r7, #12]
+ htim->Instance->SMCR = tmpsmcr;
+ 80024a8: 687b ldr r3, [r7, #4]
+ 80024aa: 681b ldr r3, [r3, #0]
+ 80024ac: 68fa ldr r2, [r7, #12]
+ 80024ae: 609a str r2, [r3, #8]
+
+ switch (sClockSourceConfig->ClockSource)
+ 80024b0: 683b ldr r3, [r7, #0]
+ 80024b2: 681b ldr r3, [r3, #0]
+ 80024b4: 2b40 cmp r3, #64 ; 0x40
+ 80024b6: d067 beq.n 8002588 <HAL_TIM_ConfigClockSource+0x120>
+ 80024b8: 2b40 cmp r3, #64 ; 0x40
+ 80024ba: d80b bhi.n 80024d4 <HAL_TIM_ConfigClockSource+0x6c>
+ 80024bc: 2b10 cmp r3, #16
+ 80024be: d073 beq.n 80025a8 <HAL_TIM_ConfigClockSource+0x140>
+ 80024c0: 2b10 cmp r3, #16
+ 80024c2: d802 bhi.n 80024ca <HAL_TIM_ConfigClockSource+0x62>
+ 80024c4: 2b00 cmp r3, #0
+ 80024c6: d06f beq.n 80025a8 <HAL_TIM_ConfigClockSource+0x140>
+ TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource);
+ break;
+ }
+
+ default:
+ break;
+ 80024c8: e078 b.n 80025bc <HAL_TIM_ConfigClockSource+0x154>
+ switch (sClockSourceConfig->ClockSource)
+ 80024ca: 2b20 cmp r3, #32
+ 80024cc: d06c beq.n 80025a8 <HAL_TIM_ConfigClockSource+0x140>
+ 80024ce: 2b30 cmp r3, #48 ; 0x30
+ 80024d0: d06a beq.n 80025a8 <HAL_TIM_ConfigClockSource+0x140>
+ break;
+ 80024d2: e073 b.n 80025bc <HAL_TIM_ConfigClockSource+0x154>
+ switch (sClockSourceConfig->ClockSource)
+ 80024d4: 2b70 cmp r3, #112 ; 0x70
+ 80024d6: d00d beq.n 80024f4 <HAL_TIM_ConfigClockSource+0x8c>
+ 80024d8: 2b70 cmp r3, #112 ; 0x70
+ 80024da: d804 bhi.n 80024e6 <HAL_TIM_ConfigClockSource+0x7e>
+ 80024dc: 2b50 cmp r3, #80 ; 0x50
+ 80024de: d033 beq.n 8002548 <HAL_TIM_ConfigClockSource+0xe0>
+ 80024e0: 2b60 cmp r3, #96 ; 0x60
+ 80024e2: d041 beq.n 8002568 <HAL_TIM_ConfigClockSource+0x100>
+ break;
+ 80024e4: e06a b.n 80025bc <HAL_TIM_ConfigClockSource+0x154>
+ switch (sClockSourceConfig->ClockSource)
+ 80024e6: f5b3 5f80 cmp.w r3, #4096 ; 0x1000
+ 80024ea: d066 beq.n 80025ba <HAL_TIM_ConfigClockSource+0x152>
+ 80024ec: f5b3 5f00 cmp.w r3, #8192 ; 0x2000
+ 80024f0: d017 beq.n 8002522 <HAL_TIM_ConfigClockSource+0xba>
+ break;
+ 80024f2: e063 b.n 80025bc <HAL_TIM_ConfigClockSource+0x154>
+ TIM_ETR_SetConfig(htim->Instance,
+ 80024f4: 687b ldr r3, [r7, #4]
+ 80024f6: 6818 ldr r0, [r3, #0]
+ 80024f8: 683b ldr r3, [r7, #0]
+ 80024fa: 6899 ldr r1, [r3, #8]
+ 80024fc: 683b ldr r3, [r7, #0]
+ 80024fe: 685a ldr r2, [r3, #4]
+ 8002500: 683b ldr r3, [r7, #0]
+ 8002502: 68db ldr r3, [r3, #12]
+ 8002504: f000 f984 bl 8002810 <TIM_ETR_SetConfig>
+ tmpsmcr = htim->Instance->SMCR;
+ 8002508: 687b ldr r3, [r7, #4]
+ 800250a: 681b ldr r3, [r3, #0]
+ 800250c: 689b ldr r3, [r3, #8]
+ 800250e: 60fb str r3, [r7, #12]
+ tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1);
+ 8002510: 68fb ldr r3, [r7, #12]
+ 8002512: f043 0377 orr.w r3, r3, #119 ; 0x77
+ 8002516: 60fb str r3, [r7, #12]
+ htim->Instance->SMCR = tmpsmcr;
+ 8002518: 687b ldr r3, [r7, #4]
+ 800251a: 681b ldr r3, [r3, #0]
+ 800251c: 68fa ldr r2, [r7, #12]
+ 800251e: 609a str r2, [r3, #8]
+ break;
+ 8002520: e04c b.n 80025bc <HAL_TIM_ConfigClockSource+0x154>
+ TIM_ETR_SetConfig(htim->Instance,
+ 8002522: 687b ldr r3, [r7, #4]
+ 8002524: 6818 ldr r0, [r3, #0]
+ 8002526: 683b ldr r3, [r7, #0]
+ 8002528: 6899 ldr r1, [r3, #8]
+ 800252a: 683b ldr r3, [r7, #0]
+ 800252c: 685a ldr r2, [r3, #4]
+ 800252e: 683b ldr r3, [r7, #0]
+ 8002530: 68db ldr r3, [r3, #12]
+ 8002532: f000 f96d bl 8002810 <TIM_ETR_SetConfig>
+ htim->Instance->SMCR |= TIM_SMCR_ECE;
+ 8002536: 687b ldr r3, [r7, #4]
+ 8002538: 681b ldr r3, [r3, #0]
+ 800253a: 689a ldr r2, [r3, #8]
+ 800253c: 687b ldr r3, [r7, #4]
+ 800253e: 681b ldr r3, [r3, #0]
+ 8002540: f442 4280 orr.w r2, r2, #16384 ; 0x4000
+ 8002544: 609a str r2, [r3, #8]
+ break;
+ 8002546: e039 b.n 80025bc <HAL_TIM_ConfigClockSource+0x154>
+ TIM_TI1_ConfigInputStage(htim->Instance,
+ 8002548: 687b ldr r3, [r7, #4]
+ 800254a: 6818 ldr r0, [r3, #0]
+ 800254c: 683b ldr r3, [r7, #0]
+ 800254e: 6859 ldr r1, [r3, #4]
+ 8002550: 683b ldr r3, [r7, #0]
+ 8002552: 68db ldr r3, [r3, #12]
+ 8002554: 461a mov r2, r3
+ 8002556: f000 f8e1 bl 800271c <TIM_TI1_ConfigInputStage>
+ TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1);
+ 800255a: 687b ldr r3, [r7, #4]
+ 800255c: 681b ldr r3, [r3, #0]
+ 800255e: 2150 movs r1, #80 ; 0x50
+ 8002560: 4618 mov r0, r3
+ 8002562: f000 f93a bl 80027da <TIM_ITRx_SetConfig>
+ break;
+ 8002566: e029 b.n 80025bc <HAL_TIM_ConfigClockSource+0x154>
+ TIM_TI2_ConfigInputStage(htim->Instance,
+ 8002568: 687b ldr r3, [r7, #4]
+ 800256a: 6818 ldr r0, [r3, #0]
+ 800256c: 683b ldr r3, [r7, #0]
+ 800256e: 6859 ldr r1, [r3, #4]
+ 8002570: 683b ldr r3, [r7, #0]
+ 8002572: 68db ldr r3, [r3, #12]
+ 8002574: 461a mov r2, r3
+ 8002576: f000 f900 bl 800277a <TIM_TI2_ConfigInputStage>
+ TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2);
+ 800257a: 687b ldr r3, [r7, #4]
+ 800257c: 681b ldr r3, [r3, #0]
+ 800257e: 2160 movs r1, #96 ; 0x60
+ 8002580: 4618 mov r0, r3
+ 8002582: f000 f92a bl 80027da <TIM_ITRx_SetConfig>
+ break;
+ 8002586: e019 b.n 80025bc <HAL_TIM_ConfigClockSource+0x154>
+ TIM_TI1_ConfigInputStage(htim->Instance,
+ 8002588: 687b ldr r3, [r7, #4]
+ 800258a: 6818 ldr r0, [r3, #0]
+ 800258c: 683b ldr r3, [r7, #0]
+ 800258e: 6859 ldr r1, [r3, #4]
+ 8002590: 683b ldr r3, [r7, #0]
+ 8002592: 68db ldr r3, [r3, #12]
+ 8002594: 461a mov r2, r3
+ 8002596: f000 f8c1 bl 800271c <TIM_TI1_ConfigInputStage>
+ TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED);
+ 800259a: 687b ldr r3, [r7, #4]
+ 800259c: 681b ldr r3, [r3, #0]
+ 800259e: 2140 movs r1, #64 ; 0x40
+ 80025a0: 4618 mov r0, r3
+ 80025a2: f000 f91a bl 80027da <TIM_ITRx_SetConfig>
+ break;
+ 80025a6: e009 b.n 80025bc <HAL_TIM_ConfigClockSource+0x154>
+ TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource);
+ 80025a8: 687b ldr r3, [r7, #4]
+ 80025aa: 681a ldr r2, [r3, #0]
+ 80025ac: 683b ldr r3, [r7, #0]
+ 80025ae: 681b ldr r3, [r3, #0]
+ 80025b0: 4619 mov r1, r3
+ 80025b2: 4610 mov r0, r2
+ 80025b4: f000 f911 bl 80027da <TIM_ITRx_SetConfig>
+ break;
+ 80025b8: e000 b.n 80025bc <HAL_TIM_ConfigClockSource+0x154>
+ break;
+ 80025ba: bf00 nop
+ }
+ htim->State = HAL_TIM_STATE_READY;
+ 80025bc: 687b ldr r3, [r7, #4]
+ 80025be: 2201 movs r2, #1
+ 80025c0: f883 203d strb.w r2, [r3, #61] ; 0x3d
+
+ __HAL_UNLOCK(htim);
+ 80025c4: 687b ldr r3, [r7, #4]
+ 80025c6: 2200 movs r2, #0
+ 80025c8: f883 203c strb.w r2, [r3, #60] ; 0x3c
+
+ return HAL_OK;
+ 80025cc: 2300 movs r3, #0
+}
+ 80025ce: 4618 mov r0, r3
+ 80025d0: 3710 adds r7, #16
+ 80025d2: 46bd mov sp, r7
+ 80025d4: bd80 pop {r7, pc}
+ 80025d6: bf00 nop
+ 80025d8: fffeff88 .word 0xfffeff88
+
+080025dc <TIM_Base_SetConfig>:
+ * @param TIMx TIM peripheral
+ * @param Structure TIM Base configuration structure
+ * @retval None
+ */
+void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure)
+{
+ 80025dc: b480 push {r7}
+ 80025de: b085 sub sp, #20
+ 80025e0: af00 add r7, sp, #0
+ 80025e2: 6078 str r0, [r7, #4]
+ 80025e4: 6039 str r1, [r7, #0]
+ uint32_t tmpcr1;
+ tmpcr1 = TIMx->CR1;
+ 80025e6: 687b ldr r3, [r7, #4]
+ 80025e8: 681b ldr r3, [r3, #0]
+ 80025ea: 60fb str r3, [r7, #12]
+
+ /* Set TIM Time Base Unit parameters ---------------------------------------*/
+ if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
+ 80025ec: 687b ldr r3, [r7, #4]
+ 80025ee: 4a40 ldr r2, [pc, #256] ; (80026f0 <TIM_Base_SetConfig+0x114>)
+ 80025f0: 4293 cmp r3, r2
+ 80025f2: d013 beq.n 800261c <TIM_Base_SetConfig+0x40>
+ 80025f4: 687b ldr r3, [r7, #4]
+ 80025f6: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000
+ 80025fa: d00f beq.n 800261c <TIM_Base_SetConfig+0x40>
+ 80025fc: 687b ldr r3, [r7, #4]
+ 80025fe: 4a3d ldr r2, [pc, #244] ; (80026f4 <TIM_Base_SetConfig+0x118>)
+ 8002600: 4293 cmp r3, r2
+ 8002602: d00b beq.n 800261c <TIM_Base_SetConfig+0x40>
+ 8002604: 687b ldr r3, [r7, #4]
+ 8002606: 4a3c ldr r2, [pc, #240] ; (80026f8 <TIM_Base_SetConfig+0x11c>)
+ 8002608: 4293 cmp r3, r2
+ 800260a: d007 beq.n 800261c <TIM_Base_SetConfig+0x40>
+ 800260c: 687b ldr r3, [r7, #4]
+ 800260e: 4a3b ldr r2, [pc, #236] ; (80026fc <TIM_Base_SetConfig+0x120>)
+ 8002610: 4293 cmp r3, r2
+ 8002612: d003 beq.n 800261c <TIM_Base_SetConfig+0x40>
+ 8002614: 687b ldr r3, [r7, #4]
+ 8002616: 4a3a ldr r2, [pc, #232] ; (8002700 <TIM_Base_SetConfig+0x124>)
+ 8002618: 4293 cmp r3, r2
+ 800261a: d108 bne.n 800262e <TIM_Base_SetConfig+0x52>
+ {
+ /* Select the Counter Mode */
+ tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
+ 800261c: 68fb ldr r3, [r7, #12]
+ 800261e: f023 0370 bic.w r3, r3, #112 ; 0x70
+ 8002622: 60fb str r3, [r7, #12]
+ tmpcr1 |= Structure->CounterMode;
+ 8002624: 683b ldr r3, [r7, #0]
+ 8002626: 685b ldr r3, [r3, #4]
+ 8002628: 68fa ldr r2, [r7, #12]
+ 800262a: 4313 orrs r3, r2
+ 800262c: 60fb str r3, [r7, #12]
+ }
+
+ if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
+ 800262e: 687b ldr r3, [r7, #4]
+ 8002630: 4a2f ldr r2, [pc, #188] ; (80026f0 <TIM_Base_SetConfig+0x114>)
+ 8002632: 4293 cmp r3, r2
+ 8002634: d02b beq.n 800268e <TIM_Base_SetConfig+0xb2>
+ 8002636: 687b ldr r3, [r7, #4]
+ 8002638: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000
+ 800263c: d027 beq.n 800268e <TIM_Base_SetConfig+0xb2>
+ 800263e: 687b ldr r3, [r7, #4]
+ 8002640: 4a2c ldr r2, [pc, #176] ; (80026f4 <TIM_Base_SetConfig+0x118>)
+ 8002642: 4293 cmp r3, r2
+ 8002644: d023 beq.n 800268e <TIM_Base_SetConfig+0xb2>
+ 8002646: 687b ldr r3, [r7, #4]
+ 8002648: 4a2b ldr r2, [pc, #172] ; (80026f8 <TIM_Base_SetConfig+0x11c>)
+ 800264a: 4293 cmp r3, r2
+ 800264c: d01f beq.n 800268e <TIM_Base_SetConfig+0xb2>
+ 800264e: 687b ldr r3, [r7, #4]
+ 8002650: 4a2a ldr r2, [pc, #168] ; (80026fc <TIM_Base_SetConfig+0x120>)
+ 8002652: 4293 cmp r3, r2
+ 8002654: d01b beq.n 800268e <TIM_Base_SetConfig+0xb2>
+ 8002656: 687b ldr r3, [r7, #4]
+ 8002658: 4a29 ldr r2, [pc, #164] ; (8002700 <TIM_Base_SetConfig+0x124>)
+ 800265a: 4293 cmp r3, r2
+ 800265c: d017 beq.n 800268e <TIM_Base_SetConfig+0xb2>
+ 800265e: 687b ldr r3, [r7, #4]
+ 8002660: 4a28 ldr r2, [pc, #160] ; (8002704 <TIM_Base_SetConfig+0x128>)
+ 8002662: 4293 cmp r3, r2
+ 8002664: d013 beq.n 800268e <TIM_Base_SetConfig+0xb2>
+ 8002666: 687b ldr r3, [r7, #4]
+ 8002668: 4a27 ldr r2, [pc, #156] ; (8002708 <TIM_Base_SetConfig+0x12c>)
+ 800266a: 4293 cmp r3, r2
+ 800266c: d00f beq.n 800268e <TIM_Base_SetConfig+0xb2>
+ 800266e: 687b ldr r3, [r7, #4]
+ 8002670: 4a26 ldr r2, [pc, #152] ; (800270c <TIM_Base_SetConfig+0x130>)
+ 8002672: 4293 cmp r3, r2
+ 8002674: d00b beq.n 800268e <TIM_Base_SetConfig+0xb2>
+ 8002676: 687b ldr r3, [r7, #4]
+ 8002678: 4a25 ldr r2, [pc, #148] ; (8002710 <TIM_Base_SetConfig+0x134>)
+ 800267a: 4293 cmp r3, r2
+ 800267c: d007 beq.n 800268e <TIM_Base_SetConfig+0xb2>
+ 800267e: 687b ldr r3, [r7, #4]
+ 8002680: 4a24 ldr r2, [pc, #144] ; (8002714 <TIM_Base_SetConfig+0x138>)
+ 8002682: 4293 cmp r3, r2
+ 8002684: d003 beq.n 800268e <TIM_Base_SetConfig+0xb2>
+ 8002686: 687b ldr r3, [r7, #4]
+ 8002688: 4a23 ldr r2, [pc, #140] ; (8002718 <TIM_Base_SetConfig+0x13c>)
+ 800268a: 4293 cmp r3, r2
+ 800268c: d108 bne.n 80026a0 <TIM_Base_SetConfig+0xc4>
+ {
+ /* Set the clock division */
+ tmpcr1 &= ~TIM_CR1_CKD;
+ 800268e: 68fb ldr r3, [r7, #12]
+ 8002690: f423 7340 bic.w r3, r3, #768 ; 0x300
+ 8002694: 60fb str r3, [r7, #12]
+ tmpcr1 |= (uint32_t)Structure->ClockDivision;
+ 8002696: 683b ldr r3, [r7, #0]
+ 8002698: 68db ldr r3, [r3, #12]
+ 800269a: 68fa ldr r2, [r7, #12]
+ 800269c: 4313 orrs r3, r2
+ 800269e: 60fb str r3, [r7, #12]
+ }
+
+ /* Set the auto-reload preload */
+ MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload);
+ 80026a0: 68fb ldr r3, [r7, #12]
+ 80026a2: f023 0280 bic.w r2, r3, #128 ; 0x80
+ 80026a6: 683b ldr r3, [r7, #0]
+ 80026a8: 695b ldr r3, [r3, #20]
+ 80026aa: 4313 orrs r3, r2
+ 80026ac: 60fb str r3, [r7, #12]
+
+ TIMx->CR1 = tmpcr1;
+ 80026ae: 687b ldr r3, [r7, #4]
+ 80026b0: 68fa ldr r2, [r7, #12]
+ 80026b2: 601a str r2, [r3, #0]
+
+ /* Set the Autoreload value */
+ TIMx->ARR = (uint32_t)Structure->Period ;
+ 80026b4: 683b ldr r3, [r7, #0]
+ 80026b6: 689a ldr r2, [r3, #8]
+ 80026b8: 687b ldr r3, [r7, #4]
+ 80026ba: 62da str r2, [r3, #44] ; 0x2c
+
+ /* Set the Prescaler value */
+ TIMx->PSC = Structure->Prescaler;
+ 80026bc: 683b ldr r3, [r7, #0]
+ 80026be: 681a ldr r2, [r3, #0]
+ 80026c0: 687b ldr r3, [r7, #4]
+ 80026c2: 629a str r2, [r3, #40] ; 0x28
+
+ if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx))
+ 80026c4: 687b ldr r3, [r7, #4]
+ 80026c6: 4a0a ldr r2, [pc, #40] ; (80026f0 <TIM_Base_SetConfig+0x114>)
+ 80026c8: 4293 cmp r3, r2
+ 80026ca: d003 beq.n 80026d4 <TIM_Base_SetConfig+0xf8>
+ 80026cc: 687b ldr r3, [r7, #4]
+ 80026ce: 4a0c ldr r2, [pc, #48] ; (8002700 <TIM_Base_SetConfig+0x124>)
+ 80026d0: 4293 cmp r3, r2
+ 80026d2: d103 bne.n 80026dc <TIM_Base_SetConfig+0x100>
+ {
+ /* Set the Repetition Counter value */
+ TIMx->RCR = Structure->RepetitionCounter;
+ 80026d4: 683b ldr r3, [r7, #0]
+ 80026d6: 691a ldr r2, [r3, #16]
+ 80026d8: 687b ldr r3, [r7, #4]
+ 80026da: 631a str r2, [r3, #48] ; 0x30
+ }
+
+ /* Generate an update event to reload the Prescaler
+ and the repetition counter (only for advanced timer) value immediately */
+ TIMx->EGR = TIM_EGR_UG;
+ 80026dc: 687b ldr r3, [r7, #4]
+ 80026de: 2201 movs r2, #1
+ 80026e0: 615a str r2, [r3, #20]
+}
+ 80026e2: bf00 nop
+ 80026e4: 3714 adds r7, #20
+ 80026e6: 46bd mov sp, r7
+ 80026e8: f85d 7b04 ldr.w r7, [sp], #4
+ 80026ec: 4770 bx lr
+ 80026ee: bf00 nop
+ 80026f0: 40010000 .word 0x40010000
+ 80026f4: 40000400 .word 0x40000400
+ 80026f8: 40000800 .word 0x40000800
+ 80026fc: 40000c00 .word 0x40000c00
+ 8002700: 40010400 .word 0x40010400
+ 8002704: 40014000 .word 0x40014000
+ 8002708: 40014400 .word 0x40014400
+ 800270c: 40014800 .word 0x40014800
+ 8002710: 40001800 .word 0x40001800
+ 8002714: 40001c00 .word 0x40001c00
+ 8002718: 40002000 .word 0x40002000
+
+0800271c <TIM_TI1_ConfigInputStage>:
+ * @param TIM_ICFilter Specifies the Input Capture Filter.
+ * This parameter must be a value between 0x00 and 0x0F.
+ * @retval None
+ */
+static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
+{
+ 800271c: b480 push {r7}
+ 800271e: b087 sub sp, #28
+ 8002720: af00 add r7, sp, #0
+ 8002722: 60f8 str r0, [r7, #12]
+ 8002724: 60b9 str r1, [r7, #8]
+ 8002726: 607a str r2, [r7, #4]
+ uint32_t tmpccmr1;
+ uint32_t tmpccer;
+
+ /* Disable the Channel 1: Reset the CC1E Bit */
+ tmpccer = TIMx->CCER;
+ 8002728: 68fb ldr r3, [r7, #12]
+ 800272a: 6a1b ldr r3, [r3, #32]
+ 800272c: 617b str r3, [r7, #20]
+ TIMx->CCER &= ~TIM_CCER_CC1E;
+ 800272e: 68fb ldr r3, [r7, #12]
+ 8002730: 6a1b ldr r3, [r3, #32]
+ 8002732: f023 0201 bic.w r2, r3, #1
+ 8002736: 68fb ldr r3, [r7, #12]
+ 8002738: 621a str r2, [r3, #32]
+ tmpccmr1 = TIMx->CCMR1;
+ 800273a: 68fb ldr r3, [r7, #12]
+ 800273c: 699b ldr r3, [r3, #24]
+ 800273e: 613b str r3, [r7, #16]
+
+ /* Set the filter */
+ tmpccmr1 &= ~TIM_CCMR1_IC1F;
+ 8002740: 693b ldr r3, [r7, #16]
+ 8002742: f023 03f0 bic.w r3, r3, #240 ; 0xf0
+ 8002746: 613b str r3, [r7, #16]
+ tmpccmr1 |= (TIM_ICFilter << 4U);
+ 8002748: 687b ldr r3, [r7, #4]
+ 800274a: 011b lsls r3, r3, #4
+ 800274c: 693a ldr r2, [r7, #16]
+ 800274e: 4313 orrs r3, r2
+ 8002750: 613b str r3, [r7, #16]
+
+ /* Select the Polarity and set the CC1E Bit */
+ tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP);
+ 8002752: 697b ldr r3, [r7, #20]
+ 8002754: f023 030a bic.w r3, r3, #10
+ 8002758: 617b str r3, [r7, #20]
+ tmpccer |= TIM_ICPolarity;
+ 800275a: 697a ldr r2, [r7, #20]
+ 800275c: 68bb ldr r3, [r7, #8]
+ 800275e: 4313 orrs r3, r2
+ 8002760: 617b str r3, [r7, #20]
+
+ /* Write to TIMx CCMR1 and CCER registers */
+ TIMx->CCMR1 = tmpccmr1;
+ 8002762: 68fb ldr r3, [r7, #12]
+ 8002764: 693a ldr r2, [r7, #16]
+ 8002766: 619a str r2, [r3, #24]
+ TIMx->CCER = tmpccer;
+ 8002768: 68fb ldr r3, [r7, #12]
+ 800276a: 697a ldr r2, [r7, #20]
+ 800276c: 621a str r2, [r3, #32]
+}
+ 800276e: bf00 nop
+ 8002770: 371c adds r7, #28
+ 8002772: 46bd mov sp, r7
+ 8002774: f85d 7b04 ldr.w r7, [sp], #4
+ 8002778: 4770 bx lr
+
+0800277a <TIM_TI2_ConfigInputStage>:
+ * @param TIM_ICFilter Specifies the Input Capture Filter.
+ * This parameter must be a value between 0x00 and 0x0F.
+ * @retval None
+ */
+static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
+{
+ 800277a: b480 push {r7}
+ 800277c: b087 sub sp, #28
+ 800277e: af00 add r7, sp, #0
+ 8002780: 60f8 str r0, [r7, #12]
+ 8002782: 60b9 str r1, [r7, #8]
+ 8002784: 607a str r2, [r7, #4]
+ uint32_t tmpccmr1;
+ uint32_t tmpccer;
+
+ /* Disable the Channel 2: Reset the CC2E Bit */
+ TIMx->CCER &= ~TIM_CCER_CC2E;
+ 8002786: 68fb ldr r3, [r7, #12]
+ 8002788: 6a1b ldr r3, [r3, #32]
+ 800278a: f023 0210 bic.w r2, r3, #16
+ 800278e: 68fb ldr r3, [r7, #12]
+ 8002790: 621a str r2, [r3, #32]
+ tmpccmr1 = TIMx->CCMR1;
+ 8002792: 68fb ldr r3, [r7, #12]
+ 8002794: 699b ldr r3, [r3, #24]
+ 8002796: 617b str r3, [r7, #20]
+ tmpccer = TIMx->CCER;
+ 8002798: 68fb ldr r3, [r7, #12]
+ 800279a: 6a1b ldr r3, [r3, #32]
+ 800279c: 613b str r3, [r7, #16]
+
+ /* Set the filter */
+ tmpccmr1 &= ~TIM_CCMR1_IC2F;
+ 800279e: 697b ldr r3, [r7, #20]
+ 80027a0: f423 4370 bic.w r3, r3, #61440 ; 0xf000
+ 80027a4: 617b str r3, [r7, #20]
+ tmpccmr1 |= (TIM_ICFilter << 12U);
+ 80027a6: 687b ldr r3, [r7, #4]
+ 80027a8: 031b lsls r3, r3, #12
+ 80027aa: 697a ldr r2, [r7, #20]
+ 80027ac: 4313 orrs r3, r2
+ 80027ae: 617b str r3, [r7, #20]
+
+ /* Select the Polarity and set the CC2E Bit */
+ tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP);
+ 80027b0: 693b ldr r3, [r7, #16]
+ 80027b2: f023 03a0 bic.w r3, r3, #160 ; 0xa0
+ 80027b6: 613b str r3, [r7, #16]
+ tmpccer |= (TIM_ICPolarity << 4U);
+ 80027b8: 68bb ldr r3, [r7, #8]
+ 80027ba: 011b lsls r3, r3, #4
+ 80027bc: 693a ldr r2, [r7, #16]
+ 80027be: 4313 orrs r3, r2
+ 80027c0: 613b str r3, [r7, #16]
+
+ /* Write to TIMx CCMR1 and CCER registers */
+ TIMx->CCMR1 = tmpccmr1 ;
+ 80027c2: 68fb ldr r3, [r7, #12]
+ 80027c4: 697a ldr r2, [r7, #20]
+ 80027c6: 619a str r2, [r3, #24]
+ TIMx->CCER = tmpccer;
+ 80027c8: 68fb ldr r3, [r7, #12]
+ 80027ca: 693a ldr r2, [r7, #16]
+ 80027cc: 621a str r2, [r3, #32]
+}
+ 80027ce: bf00 nop
+ 80027d0: 371c adds r7, #28
+ 80027d2: 46bd mov sp, r7
+ 80027d4: f85d 7b04 ldr.w r7, [sp], #4
+ 80027d8: 4770 bx lr
+
+080027da <TIM_ITRx_SetConfig>:
+ * @arg TIM_TS_TI2FP2: Filtered Timer Input 2
+ * @arg TIM_TS_ETRF: External Trigger input
+ * @retval None
+ */
+static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource)
+{
+ 80027da: b480 push {r7}
+ 80027dc: b085 sub sp, #20
+ 80027de: af00 add r7, sp, #0
+ 80027e0: 6078 str r0, [r7, #4]
+ 80027e2: 6039 str r1, [r7, #0]
+ uint32_t tmpsmcr;
+
+ /* Get the TIMx SMCR register value */
+ tmpsmcr = TIMx->SMCR;
+ 80027e4: 687b ldr r3, [r7, #4]
+ 80027e6: 689b ldr r3, [r3, #8]
+ 80027e8: 60fb str r3, [r7, #12]
+ /* Reset the TS Bits */
+ tmpsmcr &= ~TIM_SMCR_TS;
+ 80027ea: 68fb ldr r3, [r7, #12]
+ 80027ec: f023 0370 bic.w r3, r3, #112 ; 0x70
+ 80027f0: 60fb str r3, [r7, #12]
+ /* Set the Input Trigger source and the slave mode*/
+ tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1);
+ 80027f2: 683a ldr r2, [r7, #0]
+ 80027f4: 68fb ldr r3, [r7, #12]
+ 80027f6: 4313 orrs r3, r2
+ 80027f8: f043 0307 orr.w r3, r3, #7
+ 80027fc: 60fb str r3, [r7, #12]
+ /* Write to TIMx SMCR */
+ TIMx->SMCR = tmpsmcr;
+ 80027fe: 687b ldr r3, [r7, #4]
+ 8002800: 68fa ldr r2, [r7, #12]
+ 8002802: 609a str r2, [r3, #8]
+}
+ 8002804: bf00 nop
+ 8002806: 3714 adds r7, #20
+ 8002808: 46bd mov sp, r7
+ 800280a: f85d 7b04 ldr.w r7, [sp], #4
+ 800280e: 4770 bx lr
+
+08002810 <TIM_ETR_SetConfig>:
+ * This parameter must be a value between 0x00 and 0x0F
+ * @retval None
+ */
+void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler,
+ uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter)
+{
+ 8002810: b480 push {r7}
+ 8002812: b087 sub sp, #28
+ 8002814: af00 add r7, sp, #0
+ 8002816: 60f8 str r0, [r7, #12]
+ 8002818: 60b9 str r1, [r7, #8]
+ 800281a: 607a str r2, [r7, #4]
+ 800281c: 603b str r3, [r7, #0]
+ uint32_t tmpsmcr;
+
+ tmpsmcr = TIMx->SMCR;
+ 800281e: 68fb ldr r3, [r7, #12]
+ 8002820: 689b ldr r3, [r3, #8]
+ 8002822: 617b str r3, [r7, #20]
+
+ /* Reset the ETR Bits */
+ tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
+ 8002824: 697b ldr r3, [r7, #20]
+ 8002826: f423 437f bic.w r3, r3, #65280 ; 0xff00
+ 800282a: 617b str r3, [r7, #20]
+
+ /* Set the Prescaler, the Filter value and the Polarity */
+ tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U)));
+ 800282c: 683b ldr r3, [r7, #0]
+ 800282e: 021a lsls r2, r3, #8
+ 8002830: 687b ldr r3, [r7, #4]
+ 8002832: 431a orrs r2, r3
+ 8002834: 68bb ldr r3, [r7, #8]
+ 8002836: 4313 orrs r3, r2
+ 8002838: 697a ldr r2, [r7, #20]
+ 800283a: 4313 orrs r3, r2
+ 800283c: 617b str r3, [r7, #20]
+
+ /* Write to TIMx SMCR */
+ TIMx->SMCR = tmpsmcr;
+ 800283e: 68fb ldr r3, [r7, #12]
+ 8002840: 697a ldr r2, [r7, #20]
+ 8002842: 609a str r2, [r3, #8]
+}
+ 8002844: bf00 nop
+ 8002846: 371c adds r7, #28
+ 8002848: 46bd mov sp, r7
+ 800284a: f85d 7b04 ldr.w r7, [sp], #4
+ 800284e: 4770 bx lr
+
+08002850 <HAL_TIMEx_MasterConfigSynchronization>:
+ * mode.
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
+ TIM_MasterConfigTypeDef *sMasterConfig)
+{
+ 8002850: b480 push {r7}
+ 8002852: b085 sub sp, #20
+ 8002854: af00 add r7, sp, #0
+ 8002856: 6078 str r0, [r7, #4]
+ 8002858: 6039 str r1, [r7, #0]
+ assert_param(IS_TIM_SYNCHRO_INSTANCE(htim->Instance));
+ assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
+ assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
+
+ /* Check input state */
+ __HAL_LOCK(htim);
+ 800285a: 687b ldr r3, [r7, #4]
+ 800285c: f893 303c ldrb.w r3, [r3, #60] ; 0x3c
+ 8002860: 2b01 cmp r3, #1
+ 8002862: d101 bne.n 8002868 <HAL_TIMEx_MasterConfigSynchronization+0x18>
+ 8002864: 2302 movs r3, #2
+ 8002866: e045 b.n 80028f4 <HAL_TIMEx_MasterConfigSynchronization+0xa4>
+ 8002868: 687b ldr r3, [r7, #4]
+ 800286a: 2201 movs r2, #1
+ 800286c: f883 203c strb.w r2, [r3, #60] ; 0x3c
+
+ /* Change the handler state */
+ htim->State = HAL_TIM_STATE_BUSY;
+ 8002870: 687b ldr r3, [r7, #4]
+ 8002872: 2202 movs r2, #2
+ 8002874: f883 203d strb.w r2, [r3, #61] ; 0x3d
+
+ /* Get the TIMx CR2 register value */
+ tmpcr2 = htim->Instance->CR2;
+ 8002878: 687b ldr r3, [r7, #4]
+ 800287a: 681b ldr r3, [r3, #0]
+ 800287c: 685b ldr r3, [r3, #4]
+ 800287e: 60fb str r3, [r7, #12]
+
+ /* Get the TIMx SMCR register value */
+ tmpsmcr = htim->Instance->SMCR;
+ 8002880: 687b ldr r3, [r7, #4]
+ 8002882: 681b ldr r3, [r3, #0]
+ 8002884: 689b ldr r3, [r3, #8]
+ 8002886: 60bb str r3, [r7, #8]
+
+ /* If the timer supports ADC synchronization through TRGO2, set the master mode selection 2 */
+ if (IS_TIM_TRGO2_INSTANCE(htim->Instance))
+ 8002888: 687b ldr r3, [r7, #4]
+ 800288a: 681b ldr r3, [r3, #0]
+ 800288c: 4a1c ldr r2, [pc, #112] ; (8002900 <HAL_TIMEx_MasterConfigSynchronization+0xb0>)
+ 800288e: 4293 cmp r3, r2
+ 8002890: d004 beq.n 800289c <HAL_TIMEx_MasterConfigSynchronization+0x4c>
+ 8002892: 687b ldr r3, [r7, #4]
+ 8002894: 681b ldr r3, [r3, #0]
+ 8002896: 4a1b ldr r2, [pc, #108] ; (8002904 <HAL_TIMEx_MasterConfigSynchronization+0xb4>)
+ 8002898: 4293 cmp r3, r2
+ 800289a: d108 bne.n 80028ae <HAL_TIMEx_MasterConfigSynchronization+0x5e>
+ {
+ /* Check the parameters */
+ assert_param(IS_TIM_TRGO2_SOURCE(sMasterConfig->MasterOutputTrigger2));
+
+ /* Clear the MMS2 bits */
+ tmpcr2 &= ~TIM_CR2_MMS2;
+ 800289c: 68fb ldr r3, [r7, #12]
+ 800289e: f423 0370 bic.w r3, r3, #15728640 ; 0xf00000
+ 80028a2: 60fb str r3, [r7, #12]
+ /* Select the TRGO2 source*/
+ tmpcr2 |= sMasterConfig->MasterOutputTrigger2;
+ 80028a4: 683b ldr r3, [r7, #0]
+ 80028a6: 685b ldr r3, [r3, #4]
+ 80028a8: 68fa ldr r2, [r7, #12]
+ 80028aa: 4313 orrs r3, r2
+ 80028ac: 60fb str r3, [r7, #12]
+ }
+
+ /* Reset the MMS Bits */
+ tmpcr2 &= ~TIM_CR2_MMS;
+ 80028ae: 68fb ldr r3, [r7, #12]
+ 80028b0: f023 0370 bic.w r3, r3, #112 ; 0x70
+ 80028b4: 60fb str r3, [r7, #12]
+ /* Select the TRGO source */
+ tmpcr2 |= sMasterConfig->MasterOutputTrigger;
+ 80028b6: 683b ldr r3, [r7, #0]
+ 80028b8: 681b ldr r3, [r3, #0]
+ 80028ba: 68fa ldr r2, [r7, #12]
+ 80028bc: 4313 orrs r3, r2
+ 80028be: 60fb str r3, [r7, #12]
+
+ /* Reset the MSM Bit */
+ tmpsmcr &= ~TIM_SMCR_MSM;
+ 80028c0: 68bb ldr r3, [r7, #8]
+ 80028c2: f023 0380 bic.w r3, r3, #128 ; 0x80
+ 80028c6: 60bb str r3, [r7, #8]
+ /* Set master mode */
+ tmpsmcr |= sMasterConfig->MasterSlaveMode;
+ 80028c8: 683b ldr r3, [r7, #0]
+ 80028ca: 689b ldr r3, [r3, #8]
+ 80028cc: 68ba ldr r2, [r7, #8]
+ 80028ce: 4313 orrs r3, r2
+ 80028d0: 60bb str r3, [r7, #8]
+
+ /* Update TIMx CR2 */
+ htim->Instance->CR2 = tmpcr2;
+ 80028d2: 687b ldr r3, [r7, #4]
+ 80028d4: 681b ldr r3, [r3, #0]
+ 80028d6: 68fa ldr r2, [r7, #12]
+ 80028d8: 605a str r2, [r3, #4]
+
+ /* Update TIMx SMCR */
+ htim->Instance->SMCR = tmpsmcr;
+ 80028da: 687b ldr r3, [r7, #4]
+ 80028dc: 681b ldr r3, [r3, #0]
+ 80028de: 68ba ldr r2, [r7, #8]
+ 80028e0: 609a str r2, [r3, #8]
+
+ /* Change the htim state */
+ htim->State = HAL_TIM_STATE_READY;
+ 80028e2: 687b ldr r3, [r7, #4]
+ 80028e4: 2201 movs r2, #1
+ 80028e6: f883 203d strb.w r2, [r3, #61] ; 0x3d
+
+ __HAL_UNLOCK(htim);
+ 80028ea: 687b ldr r3, [r7, #4]
+ 80028ec: 2200 movs r2, #0
+ 80028ee: f883 203c strb.w r2, [r3, #60] ; 0x3c
+
+ return HAL_OK;
+ 80028f2: 2300 movs r3, #0
+}
+ 80028f4: 4618 mov r0, r3
+ 80028f6: 3714 adds r7, #20
+ 80028f8: 46bd mov sp, r7
+ 80028fa: f85d 7b04 ldr.w r7, [sp], #4
+ 80028fe: 4770 bx lr
+ 8002900: 40010000 .word 0x40010000
+ 8002904: 40010400 .word 0x40010400
+
+08002908 <HAL_UART_Init>:
+ * parameters in the UART_InitTypeDef and initialize the associated handle.
+ * @param huart UART handle.
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
+{
+ 8002908: b580 push {r7, lr}
+ 800290a: b082 sub sp, #8
+ 800290c: af00 add r7, sp, #0
+ 800290e: 6078 str r0, [r7, #4]
+ /* Check the UART handle allocation */
+ if (huart == NULL)
+ 8002910: 687b ldr r3, [r7, #4]
+ 8002912: 2b00 cmp r3, #0
+ 8002914: d101 bne.n 800291a <HAL_UART_Init+0x12>
+ {
+ return HAL_ERROR;
+ 8002916: 2301 movs r3, #1
+ 8002918: e040 b.n 800299c <HAL_UART_Init+0x94>
+ {
+ /* Check the parameters */
+ assert_param(IS_UART_INSTANCE(huart->Instance));
+ }
+
+ if (huart->gState == HAL_UART_STATE_RESET)
+ 800291a: 687b ldr r3, [r7, #4]
+ 800291c: 6f5b ldr r3, [r3, #116] ; 0x74
+ 800291e: 2b00 cmp r3, #0
+ 8002920: d106 bne.n 8002930 <HAL_UART_Init+0x28>
+ {
+ /* Allocate lock resource and initialize it */
+ huart->Lock = HAL_UNLOCKED;
+ 8002922: 687b ldr r3, [r7, #4]
+ 8002924: 2200 movs r2, #0
+ 8002926: f883 2070 strb.w r2, [r3, #112] ; 0x70
+
+ /* Init the low level hardware */
+ huart->MspInitCallback(huart);
+#else
+ /* Init the low level hardware : GPIO, CLOCK */
+ HAL_UART_MspInit(huart);
+ 800292a: 6878 ldr r0, [r7, #4]
+ 800292c: f002 ff10 bl 8005750 <HAL_UART_MspInit>
+#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
+ }
+
+ huart->gState = HAL_UART_STATE_BUSY;
+ 8002930: 687b ldr r3, [r7, #4]
+ 8002932: 2224 movs r2, #36 ; 0x24
+ 8002934: 675a str r2, [r3, #116] ; 0x74
+
+ /* Disable the Peripheral */
+ __HAL_UART_DISABLE(huart);
+ 8002936: 687b ldr r3, [r7, #4]
+ 8002938: 681b ldr r3, [r3, #0]
+ 800293a: 681a ldr r2, [r3, #0]
+ 800293c: 687b ldr r3, [r7, #4]
+ 800293e: 681b ldr r3, [r3, #0]
+ 8002940: f022 0201 bic.w r2, r2, #1
+ 8002944: 601a str r2, [r3, #0]
+
+ /* Set the UART Communication parameters */
+ if (UART_SetConfig(huart) == HAL_ERROR)
+ 8002946: 6878 ldr r0, [r7, #4]
+ 8002948: f000 fa7a bl 8002e40 <UART_SetConfig>
+ 800294c: 4603 mov r3, r0
+ 800294e: 2b01 cmp r3, #1
+ 8002950: d101 bne.n 8002956 <HAL_UART_Init+0x4e>
+ {
+ return HAL_ERROR;
+ 8002952: 2301 movs r3, #1
+ 8002954: e022 b.n 800299c <HAL_UART_Init+0x94>
+ }
+
+ if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
+ 8002956: 687b ldr r3, [r7, #4]
+ 8002958: 6a5b ldr r3, [r3, #36] ; 0x24
+ 800295a: 2b00 cmp r3, #0
+ 800295c: d002 beq.n 8002964 <HAL_UART_Init+0x5c>
+ {
+ UART_AdvFeatureConfig(huart);
+ 800295e: 6878 ldr r0, [r7, #4]
+ 8002960: f000 fd12 bl 8003388 <UART_AdvFeatureConfig>
+ }
+
+ /* In asynchronous mode, the following bits must be kept cleared:
+ - LINEN and CLKEN bits in the USART_CR2 register,
+ - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/
+ CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
+ 8002964: 687b ldr r3, [r7, #4]
+ 8002966: 681b ldr r3, [r3, #0]
+ 8002968: 685a ldr r2, [r3, #4]
+ 800296a: 687b ldr r3, [r7, #4]
+ 800296c: 681b ldr r3, [r3, #0]
+ 800296e: f422 4290 bic.w r2, r2, #18432 ; 0x4800
+ 8002972: 605a str r2, [r3, #4]
+ CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
+ 8002974: 687b ldr r3, [r7, #4]
+ 8002976: 681b ldr r3, [r3, #0]
+ 8002978: 689a ldr r2, [r3, #8]
+ 800297a: 687b ldr r3, [r7, #4]
+ 800297c: 681b ldr r3, [r3, #0]
+ 800297e: f022 022a bic.w r2, r2, #42 ; 0x2a
+ 8002982: 609a str r2, [r3, #8]
+
+ /* Enable the Peripheral */
+ __HAL_UART_ENABLE(huart);
+ 8002984: 687b ldr r3, [r7, #4]
+ 8002986: 681b ldr r3, [r3, #0]
+ 8002988: 681a ldr r2, [r3, #0]
+ 800298a: 687b ldr r3, [r7, #4]
+ 800298c: 681b ldr r3, [r3, #0]
+ 800298e: f042 0201 orr.w r2, r2, #1
+ 8002992: 601a str r2, [r3, #0]
+
+ /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
+ return (UART_CheckIdleState(huart));
+ 8002994: 6878 ldr r0, [r7, #4]
+ 8002996: f000 fd99 bl 80034cc <UART_CheckIdleState>
+ 800299a: 4603 mov r3, r0
+}
+ 800299c: 4618 mov r0, r3
+ 800299e: 3708 adds r7, #8
+ 80029a0: 46bd mov sp, r7
+ 80029a2: bd80 pop {r7, pc}
+
+080029a4 <HAL_UART_Transmit_DMA>:
+ * @param pData Pointer to data buffer.
+ * @param Size Amount of data to be sent.
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
+{
+ 80029a4: b580 push {r7, lr}
+ 80029a6: b084 sub sp, #16
+ 80029a8: af00 add r7, sp, #0
+ 80029aa: 60f8 str r0, [r7, #12]
+ 80029ac: 60b9 str r1, [r7, #8]
+ 80029ae: 4613 mov r3, r2
+ 80029b0: 80fb strh r3, [r7, #6]
+ /* Check that a Tx process is not already ongoing */
+ if (huart->gState == HAL_UART_STATE_READY)
+ 80029b2: 68fb ldr r3, [r7, #12]
+ 80029b4: 6f5b ldr r3, [r3, #116] ; 0x74
+ 80029b6: 2b20 cmp r3, #32
+ 80029b8: d164 bne.n 8002a84 <HAL_UART_Transmit_DMA+0xe0>
+ {
+ if ((pData == NULL) || (Size == 0U))
+ 80029ba: 68bb ldr r3, [r7, #8]
+ 80029bc: 2b00 cmp r3, #0
+ 80029be: d002 beq.n 80029c6 <HAL_UART_Transmit_DMA+0x22>
+ 80029c0: 88fb ldrh r3, [r7, #6]
+ 80029c2: 2b00 cmp r3, #0
+ 80029c4: d101 bne.n 80029ca <HAL_UART_Transmit_DMA+0x26>
+ {
+ return HAL_ERROR;
+ 80029c6: 2301 movs r3, #1
+ 80029c8: e05d b.n 8002a86 <HAL_UART_Transmit_DMA+0xe2>
+ }
+
+ /* Process Locked */
+ __HAL_LOCK(huart);
+ 80029ca: 68fb ldr r3, [r7, #12]
+ 80029cc: f893 3070 ldrb.w r3, [r3, #112] ; 0x70
+ 80029d0: 2b01 cmp r3, #1
+ 80029d2: d101 bne.n 80029d8 <HAL_UART_Transmit_DMA+0x34>
+ 80029d4: 2302 movs r3, #2
+ 80029d6: e056 b.n 8002a86 <HAL_UART_Transmit_DMA+0xe2>
+ 80029d8: 68fb ldr r3, [r7, #12]
+ 80029da: 2201 movs r2, #1
+ 80029dc: f883 2070 strb.w r2, [r3, #112] ; 0x70
+
+ huart->pTxBuffPtr = pData;
+ 80029e0: 68fb ldr r3, [r7, #12]
+ 80029e2: 68ba ldr r2, [r7, #8]
+ 80029e4: 64da str r2, [r3, #76] ; 0x4c
+ huart->TxXferSize = Size;
+ 80029e6: 68fb ldr r3, [r7, #12]
+ 80029e8: 88fa ldrh r2, [r7, #6]
+ 80029ea: f8a3 2050 strh.w r2, [r3, #80] ; 0x50
+ huart->TxXferCount = Size;
+ 80029ee: 68fb ldr r3, [r7, #12]
+ 80029f0: 88fa ldrh r2, [r7, #6]
+ 80029f2: f8a3 2052 strh.w r2, [r3, #82] ; 0x52
+
+ huart->ErrorCode = HAL_UART_ERROR_NONE;
+ 80029f6: 68fb ldr r3, [r7, #12]
+ 80029f8: 2200 movs r2, #0
+ 80029fa: 67da str r2, [r3, #124] ; 0x7c
+ huart->gState = HAL_UART_STATE_BUSY_TX;
+ 80029fc: 68fb ldr r3, [r7, #12]
+ 80029fe: 2221 movs r2, #33 ; 0x21
+ 8002a00: 675a str r2, [r3, #116] ; 0x74
+
+ if (huart->hdmatx != NULL)
+ 8002a02: 68fb ldr r3, [r7, #12]
+ 8002a04: 6e9b ldr r3, [r3, #104] ; 0x68
+ 8002a06: 2b00 cmp r3, #0
+ 8002a08: d02a beq.n 8002a60 <HAL_UART_Transmit_DMA+0xbc>
+ {
+ /* Set the UART DMA transfer complete callback */
+ huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt;
+ 8002a0a: 68fb ldr r3, [r7, #12]
+ 8002a0c: 6e9b ldr r3, [r3, #104] ; 0x68
+ 8002a0e: 4a20 ldr r2, [pc, #128] ; (8002a90 <HAL_UART_Transmit_DMA+0xec>)
+ 8002a10: 63da str r2, [r3, #60] ; 0x3c
+
+ /* Set the UART DMA Half transfer complete callback */
+ huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt;
+ 8002a12: 68fb ldr r3, [r7, #12]
+ 8002a14: 6e9b ldr r3, [r3, #104] ; 0x68
+ 8002a16: 4a1f ldr r2, [pc, #124] ; (8002a94 <HAL_UART_Transmit_DMA+0xf0>)
+ 8002a18: 641a str r2, [r3, #64] ; 0x40
+
+ /* Set the DMA error callback */
+ huart->hdmatx->XferErrorCallback = UART_DMAError;
+ 8002a1a: 68fb ldr r3, [r7, #12]
+ 8002a1c: 6e9b ldr r3, [r3, #104] ; 0x68
+ 8002a1e: 4a1e ldr r2, [pc, #120] ; (8002a98 <HAL_UART_Transmit_DMA+0xf4>)
+ 8002a20: 64da str r2, [r3, #76] ; 0x4c
+
+ /* Set the DMA abort callback */
+ huart->hdmatx->XferAbortCallback = NULL;
+ 8002a22: 68fb ldr r3, [r7, #12]
+ 8002a24: 6e9b ldr r3, [r3, #104] ; 0x68
+ 8002a26: 2200 movs r2, #0
+ 8002a28: 651a str r2, [r3, #80] ; 0x50
+
+ /* Enable the UART transmit DMA channel */
+ if (HAL_DMA_Start_IT(huart->hdmatx, (uint32_t)huart->pTxBuffPtr, (uint32_t)&huart->Instance->TDR, Size) != HAL_OK)
+ 8002a2a: 68fb ldr r3, [r7, #12]
+ 8002a2c: 6e98 ldr r0, [r3, #104] ; 0x68
+ 8002a2e: 68fb ldr r3, [r7, #12]
+ 8002a30: 6cdb ldr r3, [r3, #76] ; 0x4c
+ 8002a32: 4619 mov r1, r3
+ 8002a34: 68fb ldr r3, [r7, #12]
+ 8002a36: 681b ldr r3, [r3, #0]
+ 8002a38: 3328 adds r3, #40 ; 0x28
+ 8002a3a: 461a mov r2, r3
+ 8002a3c: 88fb ldrh r3, [r7, #6]
+ 8002a3e: f7fd ffc3 bl 80009c8 <HAL_DMA_Start_IT>
+ 8002a42: 4603 mov r3, r0
+ 8002a44: 2b00 cmp r3, #0
+ 8002a46: d00b beq.n 8002a60 <HAL_UART_Transmit_DMA+0xbc>
+ {
+ /* Set error code to DMA */
+ huart->ErrorCode = HAL_UART_ERROR_DMA;
+ 8002a48: 68fb ldr r3, [r7, #12]
+ 8002a4a: 2210 movs r2, #16
+ 8002a4c: 67da str r2, [r3, #124] ; 0x7c
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(huart);
+ 8002a4e: 68fb ldr r3, [r7, #12]
+ 8002a50: 2200 movs r2, #0
+ 8002a52: f883 2070 strb.w r2, [r3, #112] ; 0x70
+
+ /* Restore huart->gState to ready */
+ huart->gState = HAL_UART_STATE_READY;
+ 8002a56: 68fb ldr r3, [r7, #12]
+ 8002a58: 2220 movs r2, #32
+ 8002a5a: 675a str r2, [r3, #116] ; 0x74
+
+ return HAL_ERROR;
+ 8002a5c: 2301 movs r3, #1
+ 8002a5e: e012 b.n 8002a86 <HAL_UART_Transmit_DMA+0xe2>
+ }
+ }
+ /* Clear the TC flag in the ICR register */
+ __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_TCF);
+ 8002a60: 68fb ldr r3, [r7, #12]
+ 8002a62: 681b ldr r3, [r3, #0]
+ 8002a64: 2240 movs r2, #64 ; 0x40
+ 8002a66: 621a str r2, [r3, #32]
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(huart);
+ 8002a68: 68fb ldr r3, [r7, #12]
+ 8002a6a: 2200 movs r2, #0
+ 8002a6c: f883 2070 strb.w r2, [r3, #112] ; 0x70
+
+ /* Enable the DMA transfer for transmit request by setting the DMAT bit
+ in the UART CR3 register */
+ SET_BIT(huart->Instance->CR3, USART_CR3_DMAT);
+ 8002a70: 68fb ldr r3, [r7, #12]
+ 8002a72: 681b ldr r3, [r3, #0]
+ 8002a74: 689a ldr r2, [r3, #8]
+ 8002a76: 68fb ldr r3, [r7, #12]
+ 8002a78: 681b ldr r3, [r3, #0]
+ 8002a7a: f042 0280 orr.w r2, r2, #128 ; 0x80
+ 8002a7e: 609a str r2, [r3, #8]
+
+ return HAL_OK;
+ 8002a80: 2300 movs r3, #0
+ 8002a82: e000 b.n 8002a86 <HAL_UART_Transmit_DMA+0xe2>
+ }
+ else
+ {
+ return HAL_BUSY;
+ 8002a84: 2302 movs r3, #2
+ }
+}
+ 8002a86: 4618 mov r0, r3
+ 8002a88: 3710 adds r7, #16
+ 8002a8a: 46bd mov sp, r7
+ 8002a8c: bd80 pop {r7, pc}
+ 8002a8e: bf00 nop
+ 8002a90: 08003625 .word 0x08003625
+ 8002a94: 08003675 .word 0x08003675
+ 8002a98: 08003711 .word 0x08003711
+
+08002a9c <HAL_UART_Receive_DMA>:
+ * @param pData Pointer to data buffer.
+ * @param Size Amount of data to be received.
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
+{
+ 8002a9c: b580 push {r7, lr}
+ 8002a9e: b084 sub sp, #16
+ 8002aa0: af00 add r7, sp, #0
+ 8002aa2: 60f8 str r0, [r7, #12]
+ 8002aa4: 60b9 str r1, [r7, #8]
+ 8002aa6: 4613 mov r3, r2
+ 8002aa8: 80fb strh r3, [r7, #6]
+ /* Check that a Rx process is not already ongoing */
+ if (huart->RxState == HAL_UART_STATE_READY)
+ 8002aaa: 68fb ldr r3, [r7, #12]
+ 8002aac: 6f9b ldr r3, [r3, #120] ; 0x78
+ 8002aae: 2b20 cmp r3, #32
+ 8002ab0: d16c bne.n 8002b8c <HAL_UART_Receive_DMA+0xf0>
+ {
+ if ((pData == NULL) || (Size == 0U))
+ 8002ab2: 68bb ldr r3, [r7, #8]
+ 8002ab4: 2b00 cmp r3, #0
+ 8002ab6: d002 beq.n 8002abe <HAL_UART_Receive_DMA+0x22>
+ 8002ab8: 88fb ldrh r3, [r7, #6]
+ 8002aba: 2b00 cmp r3, #0
+ 8002abc: d101 bne.n 8002ac2 <HAL_UART_Receive_DMA+0x26>
+ {
+ return HAL_ERROR;
+ 8002abe: 2301 movs r3, #1
+ 8002ac0: e065 b.n 8002b8e <HAL_UART_Receive_DMA+0xf2>
+ }
+
+ /* Process Locked */
+ __HAL_LOCK(huart);
+ 8002ac2: 68fb ldr r3, [r7, #12]
+ 8002ac4: f893 3070 ldrb.w r3, [r3, #112] ; 0x70
+ 8002ac8: 2b01 cmp r3, #1
+ 8002aca: d101 bne.n 8002ad0 <HAL_UART_Receive_DMA+0x34>
+ 8002acc: 2302 movs r3, #2
+ 8002ace: e05e b.n 8002b8e <HAL_UART_Receive_DMA+0xf2>
+ 8002ad0: 68fb ldr r3, [r7, #12]
+ 8002ad2: 2201 movs r2, #1
+ 8002ad4: f883 2070 strb.w r2, [r3, #112] ; 0x70
+
+ huart->pRxBuffPtr = pData;
+ 8002ad8: 68fb ldr r3, [r7, #12]
+ 8002ada: 68ba ldr r2, [r7, #8]
+ 8002adc: 655a str r2, [r3, #84] ; 0x54
+ huart->RxXferSize = Size;
+ 8002ade: 68fb ldr r3, [r7, #12]
+ 8002ae0: 88fa ldrh r2, [r7, #6]
+ 8002ae2: f8a3 2058 strh.w r2, [r3, #88] ; 0x58
+
+ huart->ErrorCode = HAL_UART_ERROR_NONE;
+ 8002ae6: 68fb ldr r3, [r7, #12]
+ 8002ae8: 2200 movs r2, #0
+ 8002aea: 67da str r2, [r3, #124] ; 0x7c
+ huart->RxState = HAL_UART_STATE_BUSY_RX;
+ 8002aec: 68fb ldr r3, [r7, #12]
+ 8002aee: 2222 movs r2, #34 ; 0x22
+ 8002af0: 679a str r2, [r3, #120] ; 0x78
+
+ if (huart->hdmarx != NULL)
+ 8002af2: 68fb ldr r3, [r7, #12]
+ 8002af4: 6edb ldr r3, [r3, #108] ; 0x6c
+ 8002af6: 2b00 cmp r3, #0
+ 8002af8: d02a beq.n 8002b50 <HAL_UART_Receive_DMA+0xb4>
+ {
+ /* Set the UART DMA transfer complete callback */
+ huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt;
+ 8002afa: 68fb ldr r3, [r7, #12]
+ 8002afc: 6edb ldr r3, [r3, #108] ; 0x6c
+ 8002afe: 4a26 ldr r2, [pc, #152] ; (8002b98 <HAL_UART_Receive_DMA+0xfc>)
+ 8002b00: 63da str r2, [r3, #60] ; 0x3c
+
+ /* Set the UART DMA Half transfer complete callback */
+ huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt;
+ 8002b02: 68fb ldr r3, [r7, #12]
+ 8002b04: 6edb ldr r3, [r3, #108] ; 0x6c
+ 8002b06: 4a25 ldr r2, [pc, #148] ; (8002b9c <HAL_UART_Receive_DMA+0x100>)
+ 8002b08: 641a str r2, [r3, #64] ; 0x40
+
+ /* Set the DMA error callback */
+ huart->hdmarx->XferErrorCallback = UART_DMAError;
+ 8002b0a: 68fb ldr r3, [r7, #12]
+ 8002b0c: 6edb ldr r3, [r3, #108] ; 0x6c
+ 8002b0e: 4a24 ldr r2, [pc, #144] ; (8002ba0 <HAL_UART_Receive_DMA+0x104>)
+ 8002b10: 64da str r2, [r3, #76] ; 0x4c
+
+ /* Set the DMA abort callback */
+ huart->hdmarx->XferAbortCallback = NULL;
+ 8002b12: 68fb ldr r3, [r7, #12]
+ 8002b14: 6edb ldr r3, [r3, #108] ; 0x6c
+ 8002b16: 2200 movs r2, #0
+ 8002b18: 651a str r2, [r3, #80] ; 0x50
+
+ /* Enable the DMA channel */
+ if (HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->RDR, (uint32_t)huart->pRxBuffPtr, Size) != HAL_OK)
+ 8002b1a: 68fb ldr r3, [r7, #12]
+ 8002b1c: 6ed8 ldr r0, [r3, #108] ; 0x6c
+ 8002b1e: 68fb ldr r3, [r7, #12]
+ 8002b20: 681b ldr r3, [r3, #0]
+ 8002b22: 3324 adds r3, #36 ; 0x24
+ 8002b24: 4619 mov r1, r3
+ 8002b26: 68fb ldr r3, [r7, #12]
+ 8002b28: 6d5b ldr r3, [r3, #84] ; 0x54
+ 8002b2a: 461a mov r2, r3
+ 8002b2c: 88fb ldrh r3, [r7, #6]
+ 8002b2e: f7fd ff4b bl 80009c8 <HAL_DMA_Start_IT>
+ 8002b32: 4603 mov r3, r0
+ 8002b34: 2b00 cmp r3, #0
+ 8002b36: d00b beq.n 8002b50 <HAL_UART_Receive_DMA+0xb4>
+ {
+ /* Set error code to DMA */
+ huart->ErrorCode = HAL_UART_ERROR_DMA;
+ 8002b38: 68fb ldr r3, [r7, #12]
+ 8002b3a: 2210 movs r2, #16
+ 8002b3c: 67da str r2, [r3, #124] ; 0x7c
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(huart);
+ 8002b3e: 68fb ldr r3, [r7, #12]
+ 8002b40: 2200 movs r2, #0
+ 8002b42: f883 2070 strb.w r2, [r3, #112] ; 0x70
+
+ /* Restore huart->gState to ready */
+ huart->gState = HAL_UART_STATE_READY;
+ 8002b46: 68fb ldr r3, [r7, #12]
+ 8002b48: 2220 movs r2, #32
+ 8002b4a: 675a str r2, [r3, #116] ; 0x74
+
+ return HAL_ERROR;
+ 8002b4c: 2301 movs r3, #1
+ 8002b4e: e01e b.n 8002b8e <HAL_UART_Receive_DMA+0xf2>
+ }
+ }
+ /* Process Unlocked */
+ __HAL_UNLOCK(huart);
+ 8002b50: 68fb ldr r3, [r7, #12]
+ 8002b52: 2200 movs r2, #0
+ 8002b54: f883 2070 strb.w r2, [r3, #112] ; 0x70
+
+ /* Enable the UART Parity Error Interrupt */
+ SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
+ 8002b58: 68fb ldr r3, [r7, #12]
+ 8002b5a: 681b ldr r3, [r3, #0]
+ 8002b5c: 681a ldr r2, [r3, #0]
+ 8002b5e: 68fb ldr r3, [r7, #12]
+ 8002b60: 681b ldr r3, [r3, #0]
+ 8002b62: f442 7280 orr.w r2, r2, #256 ; 0x100
+ 8002b66: 601a str r2, [r3, #0]
+
+ /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
+ SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
+ 8002b68: 68fb ldr r3, [r7, #12]
+ 8002b6a: 681b ldr r3, [r3, #0]
+ 8002b6c: 689a ldr r2, [r3, #8]
+ 8002b6e: 68fb ldr r3, [r7, #12]
+ 8002b70: 681b ldr r3, [r3, #0]
+ 8002b72: f042 0201 orr.w r2, r2, #1
+ 8002b76: 609a str r2, [r3, #8]
+
+ /* Enable the DMA transfer for the receiver request by setting the DMAR bit
+ in the UART CR3 register */
+ SET_BIT(huart->Instance->CR3, USART_CR3_DMAR);
+ 8002b78: 68fb ldr r3, [r7, #12]
+ 8002b7a: 681b ldr r3, [r3, #0]
+ 8002b7c: 689a ldr r2, [r3, #8]
+ 8002b7e: 68fb ldr r3, [r7, #12]
+ 8002b80: 681b ldr r3, [r3, #0]
+ 8002b82: f042 0240 orr.w r2, r2, #64 ; 0x40
+ 8002b86: 609a str r2, [r3, #8]
+
+ return HAL_OK;
+ 8002b88: 2300 movs r3, #0
+ 8002b8a: e000 b.n 8002b8e <HAL_UART_Receive_DMA+0xf2>
+ }
+ else
+ {
+ return HAL_BUSY;
+ 8002b8c: 2302 movs r3, #2
+ }
+}
+ 8002b8e: 4618 mov r0, r3
+ 8002b90: 3710 adds r7, #16
+ 8002b92: 46bd mov sp, r7
+ 8002b94: bd80 pop {r7, pc}
+ 8002b96: bf00 nop
+ 8002b98: 08003691 .word 0x08003691
+ 8002b9c: 080036f5 .word 0x080036f5
+ 8002ba0: 08003711 .word 0x08003711
+
+08002ba4 <HAL_UART_IRQHandler>:
+ * @brief Handle UART interrupt request.
+ * @param huart UART handle.
+ * @retval None
+ */
+void HAL_UART_IRQHandler(UART_HandleTypeDef *huart)
+{
+ 8002ba4: b580 push {r7, lr}
+ 8002ba6: b088 sub sp, #32
+ 8002ba8: af00 add r7, sp, #0
+ 8002baa: 6078 str r0, [r7, #4]
+ uint32_t isrflags = READ_REG(huart->Instance->ISR);
+ 8002bac: 687b ldr r3, [r7, #4]
+ 8002bae: 681b ldr r3, [r3, #0]
+ 8002bb0: 69db ldr r3, [r3, #28]
+ 8002bb2: 61fb str r3, [r7, #28]
+ uint32_t cr1its = READ_REG(huart->Instance->CR1);
+ 8002bb4: 687b ldr r3, [r7, #4]
+ 8002bb6: 681b ldr r3, [r3, #0]
+ 8002bb8: 681b ldr r3, [r3, #0]
+ 8002bba: 61bb str r3, [r7, #24]
+ uint32_t cr3its = READ_REG(huart->Instance->CR3);
+ 8002bbc: 687b ldr r3, [r7, #4]
+ 8002bbe: 681b ldr r3, [r3, #0]
+ 8002bc0: 689b ldr r3, [r3, #8]
+ 8002bc2: 617b str r3, [r7, #20]
+
+ uint32_t errorflags;
+ uint32_t errorcode;
+
+ /* If no error occurs */
+ errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE));
+ 8002bc4: 69fb ldr r3, [r7, #28]
+ 8002bc6: f003 030f and.w r3, r3, #15
+ 8002bca: 613b str r3, [r7, #16]
+ if (errorflags == 0U)
+ 8002bcc: 693b ldr r3, [r7, #16]
+ 8002bce: 2b00 cmp r3, #0
+ 8002bd0: d113 bne.n 8002bfa <HAL_UART_IRQHandler+0x56>
+ {
+ /* UART in mode Receiver ---------------------------------------------------*/
+ if (((isrflags & USART_ISR_RXNE) != 0U)
+ 8002bd2: 69fb ldr r3, [r7, #28]
+ 8002bd4: f003 0320 and.w r3, r3, #32
+ 8002bd8: 2b00 cmp r3, #0
+ 8002bda: d00e beq.n 8002bfa <HAL_UART_IRQHandler+0x56>
+ && ((cr1its & USART_CR1_RXNEIE) != 0U))
+ 8002bdc: 69bb ldr r3, [r7, #24]
+ 8002bde: f003 0320 and.w r3, r3, #32
+ 8002be2: 2b00 cmp r3, #0
+ 8002be4: d009 beq.n 8002bfa <HAL_UART_IRQHandler+0x56>
+ {
+ if (huart->RxISR != NULL)
+ 8002be6: 687b ldr r3, [r7, #4]
+ 8002be8: 6e1b ldr r3, [r3, #96] ; 0x60
+ 8002bea: 2b00 cmp r3, #0
+ 8002bec: f000 80eb beq.w 8002dc6 <HAL_UART_IRQHandler+0x222>
+ {
+ huart->RxISR(huart);
+ 8002bf0: 687b ldr r3, [r7, #4]
+ 8002bf2: 6e1b ldr r3, [r3, #96] ; 0x60
+ 8002bf4: 6878 ldr r0, [r7, #4]
+ 8002bf6: 4798 blx r3
+ }
+ return;
+ 8002bf8: e0e5 b.n 8002dc6 <HAL_UART_IRQHandler+0x222>
+ }
+ }
+
+ /* If some errors occur */
+ if ((errorflags != 0U)
+ 8002bfa: 693b ldr r3, [r7, #16]
+ 8002bfc: 2b00 cmp r3, #0
+ 8002bfe: f000 80c0 beq.w 8002d82 <HAL_UART_IRQHandler+0x1de>
+ && (((cr3its & USART_CR3_EIE) != 0U)
+ 8002c02: 697b ldr r3, [r7, #20]
+ 8002c04: f003 0301 and.w r3, r3, #1
+ 8002c08: 2b00 cmp r3, #0
+ 8002c0a: d105 bne.n 8002c18 <HAL_UART_IRQHandler+0x74>
+ || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != 0U)))
+ 8002c0c: 69bb ldr r3, [r7, #24]
+ 8002c0e: f403 7390 and.w r3, r3, #288 ; 0x120
+ 8002c12: 2b00 cmp r3, #0
+ 8002c14: f000 80b5 beq.w 8002d82 <HAL_UART_IRQHandler+0x1de>
+ {
+ /* UART parity error interrupt occurred -------------------------------------*/
+ if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U))
+ 8002c18: 69fb ldr r3, [r7, #28]
+ 8002c1a: f003 0301 and.w r3, r3, #1
+ 8002c1e: 2b00 cmp r3, #0
+ 8002c20: d00e beq.n 8002c40 <HAL_UART_IRQHandler+0x9c>
+ 8002c22: 69bb ldr r3, [r7, #24]
+ 8002c24: f403 7380 and.w r3, r3, #256 ; 0x100
+ 8002c28: 2b00 cmp r3, #0
+ 8002c2a: d009 beq.n 8002c40 <HAL_UART_IRQHandler+0x9c>
+ {
+ __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF);
+ 8002c2c: 687b ldr r3, [r7, #4]
+ 8002c2e: 681b ldr r3, [r3, #0]
+ 8002c30: 2201 movs r2, #1
+ 8002c32: 621a str r2, [r3, #32]
+
+ huart->ErrorCode |= HAL_UART_ERROR_PE;
+ 8002c34: 687b ldr r3, [r7, #4]
+ 8002c36: 6fdb ldr r3, [r3, #124] ; 0x7c
+ 8002c38: f043 0201 orr.w r2, r3, #1
+ 8002c3c: 687b ldr r3, [r7, #4]
+ 8002c3e: 67da str r2, [r3, #124] ; 0x7c
+ }
+
+ /* UART frame error interrupt occurred --------------------------------------*/
+ if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
+ 8002c40: 69fb ldr r3, [r7, #28]
+ 8002c42: f003 0302 and.w r3, r3, #2
+ 8002c46: 2b00 cmp r3, #0
+ 8002c48: d00e beq.n 8002c68 <HAL_UART_IRQHandler+0xc4>
+ 8002c4a: 697b ldr r3, [r7, #20]
+ 8002c4c: f003 0301 and.w r3, r3, #1
+ 8002c50: 2b00 cmp r3, #0
+ 8002c52: d009 beq.n 8002c68 <HAL_UART_IRQHandler+0xc4>
+ {
+ __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF);
+ 8002c54: 687b ldr r3, [r7, #4]
+ 8002c56: 681b ldr r3, [r3, #0]
+ 8002c58: 2202 movs r2, #2
+ 8002c5a: 621a str r2, [r3, #32]
+
+ huart->ErrorCode |= HAL_UART_ERROR_FE;
+ 8002c5c: 687b ldr r3, [r7, #4]
+ 8002c5e: 6fdb ldr r3, [r3, #124] ; 0x7c
+ 8002c60: f043 0204 orr.w r2, r3, #4
+ 8002c64: 687b ldr r3, [r7, #4]
+ 8002c66: 67da str r2, [r3, #124] ; 0x7c
+ }
+
+ /* UART noise error interrupt occurred --------------------------------------*/
+ if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
+ 8002c68: 69fb ldr r3, [r7, #28]
+ 8002c6a: f003 0304 and.w r3, r3, #4
+ 8002c6e: 2b00 cmp r3, #0
+ 8002c70: d00e beq.n 8002c90 <HAL_UART_IRQHandler+0xec>
+ 8002c72: 697b ldr r3, [r7, #20]
+ 8002c74: f003 0301 and.w r3, r3, #1
+ 8002c78: 2b00 cmp r3, #0
+ 8002c7a: d009 beq.n 8002c90 <HAL_UART_IRQHandler+0xec>
+ {
+ __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF);
+ 8002c7c: 687b ldr r3, [r7, #4]
+ 8002c7e: 681b ldr r3, [r3, #0]
+ 8002c80: 2204 movs r2, #4
+ 8002c82: 621a str r2, [r3, #32]
+
+ huart->ErrorCode |= HAL_UART_ERROR_NE;
+ 8002c84: 687b ldr r3, [r7, #4]
+ 8002c86: 6fdb ldr r3, [r3, #124] ; 0x7c
+ 8002c88: f043 0202 orr.w r2, r3, #2
+ 8002c8c: 687b ldr r3, [r7, #4]
+ 8002c8e: 67da str r2, [r3, #124] ; 0x7c
+ }
+
+ /* UART Over-Run interrupt occurred -----------------------------------------*/
+ if (((isrflags & USART_ISR_ORE) != 0U)
+ 8002c90: 69fb ldr r3, [r7, #28]
+ 8002c92: f003 0308 and.w r3, r3, #8
+ 8002c96: 2b00 cmp r3, #0
+ 8002c98: d013 beq.n 8002cc2 <HAL_UART_IRQHandler+0x11e>
+ && (((cr1its & USART_CR1_RXNEIE) != 0U) ||
+ 8002c9a: 69bb ldr r3, [r7, #24]
+ 8002c9c: f003 0320 and.w r3, r3, #32
+ 8002ca0: 2b00 cmp r3, #0
+ 8002ca2: d104 bne.n 8002cae <HAL_UART_IRQHandler+0x10a>
+ ((cr3its & USART_CR3_EIE) != 0U)))
+ 8002ca4: 697b ldr r3, [r7, #20]
+ 8002ca6: f003 0301 and.w r3, r3, #1
+ && (((cr1its & USART_CR1_RXNEIE) != 0U) ||
+ 8002caa: 2b00 cmp r3, #0
+ 8002cac: d009 beq.n 8002cc2 <HAL_UART_IRQHandler+0x11e>
+ {
+ __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF);
+ 8002cae: 687b ldr r3, [r7, #4]
+ 8002cb0: 681b ldr r3, [r3, #0]
+ 8002cb2: 2208 movs r2, #8
+ 8002cb4: 621a str r2, [r3, #32]
+
+ huart->ErrorCode |= HAL_UART_ERROR_ORE;
+ 8002cb6: 687b ldr r3, [r7, #4]
+ 8002cb8: 6fdb ldr r3, [r3, #124] ; 0x7c
+ 8002cba: f043 0208 orr.w r2, r3, #8
+ 8002cbe: 687b ldr r3, [r7, #4]
+ 8002cc0: 67da str r2, [r3, #124] ; 0x7c
+ }
+
+ /* Call UART Error Call back function if need be --------------------------*/
+ if (huart->ErrorCode != HAL_UART_ERROR_NONE)
+ 8002cc2: 687b ldr r3, [r7, #4]
+ 8002cc4: 6fdb ldr r3, [r3, #124] ; 0x7c
+ 8002cc6: 2b00 cmp r3, #0
+ 8002cc8: d07f beq.n 8002dca <HAL_UART_IRQHandler+0x226>
+ {
+ /* UART in mode Receiver ---------------------------------------------------*/
+ if (((isrflags & USART_ISR_RXNE) != 0U)
+ 8002cca: 69fb ldr r3, [r7, #28]
+ 8002ccc: f003 0320 and.w r3, r3, #32
+ 8002cd0: 2b00 cmp r3, #0
+ 8002cd2: d00c beq.n 8002cee <HAL_UART_IRQHandler+0x14a>
+ && ((cr1its & USART_CR1_RXNEIE) != 0U))
+ 8002cd4: 69bb ldr r3, [r7, #24]
+ 8002cd6: f003 0320 and.w r3, r3, #32
+ 8002cda: 2b00 cmp r3, #0
+ 8002cdc: d007 beq.n 8002cee <HAL_UART_IRQHandler+0x14a>
+ {
+ if (huart->RxISR != NULL)
+ 8002cde: 687b ldr r3, [r7, #4]
+ 8002ce0: 6e1b ldr r3, [r3, #96] ; 0x60
+ 8002ce2: 2b00 cmp r3, #0
+ 8002ce4: d003 beq.n 8002cee <HAL_UART_IRQHandler+0x14a>
+ {
+ huart->RxISR(huart);
+ 8002ce6: 687b ldr r3, [r7, #4]
+ 8002ce8: 6e1b ldr r3, [r3, #96] ; 0x60
+ 8002cea: 6878 ldr r0, [r7, #4]
+ 8002cec: 4798 blx r3
+ }
+ }
+
+ /* If Overrun error occurs, or if any error occurs in DMA mode reception,
+ consider error as blocking */
+ errorcode = huart->ErrorCode;
+ 8002cee: 687b ldr r3, [r7, #4]
+ 8002cf0: 6fdb ldr r3, [r3, #124] ; 0x7c
+ 8002cf2: 60fb str r3, [r7, #12]
+ if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) ||
+ 8002cf4: 687b ldr r3, [r7, #4]
+ 8002cf6: 681b ldr r3, [r3, #0]
+ 8002cf8: 689b ldr r3, [r3, #8]
+ 8002cfa: f003 0340 and.w r3, r3, #64 ; 0x40
+ 8002cfe: 2b40 cmp r3, #64 ; 0x40
+ 8002d00: d004 beq.n 8002d0c <HAL_UART_IRQHandler+0x168>
+ ((errorcode & HAL_UART_ERROR_ORE) != 0U))
+ 8002d02: 68fb ldr r3, [r7, #12]
+ 8002d04: f003 0308 and.w r3, r3, #8
+ if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) ||
+ 8002d08: 2b00 cmp r3, #0
+ 8002d0a: d031 beq.n 8002d70 <HAL_UART_IRQHandler+0x1cc>
+ {
+ /* Blocking error : transfer is aborted
+ Set the UART state ready to be able to start again the process,
+ Disable Rx Interrupts, and disable Rx DMA request, if ongoing */
+ UART_EndRxTransfer(huart);
+ 8002d0c: 6878 ldr r0, [r7, #4]
+ 8002d0e: f000 fc69 bl 80035e4 <UART_EndRxTransfer>
+
+ /* Disable the UART DMA Rx request if enabled */
+ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
+ 8002d12: 687b ldr r3, [r7, #4]
+ 8002d14: 681b ldr r3, [r3, #0]
+ 8002d16: 689b ldr r3, [r3, #8]
+ 8002d18: f003 0340 and.w r3, r3, #64 ; 0x40
+ 8002d1c: 2b40 cmp r3, #64 ; 0x40
+ 8002d1e: d123 bne.n 8002d68 <HAL_UART_IRQHandler+0x1c4>
+ {
+ CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
+ 8002d20: 687b ldr r3, [r7, #4]
+ 8002d22: 681b ldr r3, [r3, #0]
+ 8002d24: 689a ldr r2, [r3, #8]
+ 8002d26: 687b ldr r3, [r7, #4]
+ 8002d28: 681b ldr r3, [r3, #0]
+ 8002d2a: f022 0240 bic.w r2, r2, #64 ; 0x40
+ 8002d2e: 609a str r2, [r3, #8]
+
+ /* Abort the UART DMA Rx channel */
+ if (huart->hdmarx != NULL)
+ 8002d30: 687b ldr r3, [r7, #4]
+ 8002d32: 6edb ldr r3, [r3, #108] ; 0x6c
+ 8002d34: 2b00 cmp r3, #0
+ 8002d36: d013 beq.n 8002d60 <HAL_UART_IRQHandler+0x1bc>
+ {
+ /* Set the UART DMA Abort callback :
+ will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */
+ huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError;
+ 8002d38: 687b ldr r3, [r7, #4]
+ 8002d3a: 6edb ldr r3, [r3, #108] ; 0x6c
+ 8002d3c: 4a26 ldr r2, [pc, #152] ; (8002dd8 <HAL_UART_IRQHandler+0x234>)
+ 8002d3e: 651a str r2, [r3, #80] ; 0x50
+
+ /* Abort DMA RX */
+ if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
+ 8002d40: 687b ldr r3, [r7, #4]
+ 8002d42: 6edb ldr r3, [r3, #108] ; 0x6c
+ 8002d44: 4618 mov r0, r3
+ 8002d46: f7fd fe9f bl 8000a88 <HAL_DMA_Abort_IT>
+ 8002d4a: 4603 mov r3, r0
+ 8002d4c: 2b00 cmp r3, #0
+ 8002d4e: d016 beq.n 8002d7e <HAL_UART_IRQHandler+0x1da>
+ {
+ /* Call Directly huart->hdmarx->XferAbortCallback function in case of error */
+ huart->hdmarx->XferAbortCallback(huart->hdmarx);
+ 8002d50: 687b ldr r3, [r7, #4]
+ 8002d52: 6edb ldr r3, [r3, #108] ; 0x6c
+ 8002d54: 6d1b ldr r3, [r3, #80] ; 0x50
+ 8002d56: 687a ldr r2, [r7, #4]
+ 8002d58: 6ed2 ldr r2, [r2, #108] ; 0x6c
+ 8002d5a: 4610 mov r0, r2
+ 8002d5c: 4798 blx r3
+ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
+ 8002d5e: e00e b.n 8002d7e <HAL_UART_IRQHandler+0x1da>
+#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
+ /*Call registered error callback*/
+ huart->ErrorCallback(huart);
+#else
+ /*Call legacy weak error callback*/
+ HAL_UART_ErrorCallback(huart);
+ 8002d60: 6878 ldr r0, [r7, #4]
+ 8002d62: f000 f863 bl 8002e2c <HAL_UART_ErrorCallback>
+ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
+ 8002d66: e00a b.n 8002d7e <HAL_UART_IRQHandler+0x1da>
+#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
+ /*Call registered error callback*/
+ huart->ErrorCallback(huart);
+#else
+ /*Call legacy weak error callback*/
+ HAL_UART_ErrorCallback(huart);
+ 8002d68: 6878 ldr r0, [r7, #4]
+ 8002d6a: f000 f85f bl 8002e2c <HAL_UART_ErrorCallback>
+ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
+ 8002d6e: e006 b.n 8002d7e <HAL_UART_IRQHandler+0x1da>
+#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
+ /*Call registered error callback*/
+ huart->ErrorCallback(huart);
+#else
+ /*Call legacy weak error callback*/
+ HAL_UART_ErrorCallback(huart);
+ 8002d70: 6878 ldr r0, [r7, #4]
+ 8002d72: f000 f85b bl 8002e2c <HAL_UART_ErrorCallback>
+#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
+ huart->ErrorCode = HAL_UART_ERROR_NONE;
+ 8002d76: 687b ldr r3, [r7, #4]
+ 8002d78: 2200 movs r2, #0
+ 8002d7a: 67da str r2, [r3, #124] ; 0x7c
+ }
+ }
+ return;
+ 8002d7c: e025 b.n 8002dca <HAL_UART_IRQHandler+0x226>
+ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
+ 8002d7e: bf00 nop
+ return;
+ 8002d80: e023 b.n 8002dca <HAL_UART_IRQHandler+0x226>
+
+ } /* End if some error occurs */
+
+ /* UART in mode Transmitter ------------------------------------------------*/
+ if (((isrflags & USART_ISR_TXE) != 0U)
+ 8002d82: 69fb ldr r3, [r7, #28]
+ 8002d84: f003 0380 and.w r3, r3, #128 ; 0x80
+ 8002d88: 2b00 cmp r3, #0
+ 8002d8a: d00d beq.n 8002da8 <HAL_UART_IRQHandler+0x204>
+ && ((cr1its & USART_CR1_TXEIE) != 0U))
+ 8002d8c: 69bb ldr r3, [r7, #24]
+ 8002d8e: f003 0380 and.w r3, r3, #128 ; 0x80
+ 8002d92: 2b00 cmp r3, #0
+ 8002d94: d008 beq.n 8002da8 <HAL_UART_IRQHandler+0x204>
+ {
+ if (huart->TxISR != NULL)
+ 8002d96: 687b ldr r3, [r7, #4]
+ 8002d98: 6e5b ldr r3, [r3, #100] ; 0x64
+ 8002d9a: 2b00 cmp r3, #0
+ 8002d9c: d017 beq.n 8002dce <HAL_UART_IRQHandler+0x22a>
+ {
+ huart->TxISR(huart);
+ 8002d9e: 687b ldr r3, [r7, #4]
+ 8002da0: 6e5b ldr r3, [r3, #100] ; 0x64
+ 8002da2: 6878 ldr r0, [r7, #4]
+ 8002da4: 4798 blx r3
+ }
+ return;
+ 8002da6: e012 b.n 8002dce <HAL_UART_IRQHandler+0x22a>
+ }
+
+ /* UART in mode Transmitter (transmission end) -----------------------------*/
+ if (((isrflags & USART_ISR_TC) != 0U) && ((cr1its & USART_CR1_TCIE) != 0U))
+ 8002da8: 69fb ldr r3, [r7, #28]
+ 8002daa: f003 0340 and.w r3, r3, #64 ; 0x40
+ 8002dae: 2b00 cmp r3, #0
+ 8002db0: d00e beq.n 8002dd0 <HAL_UART_IRQHandler+0x22c>
+ 8002db2: 69bb ldr r3, [r7, #24]
+ 8002db4: f003 0340 and.w r3, r3, #64 ; 0x40
+ 8002db8: 2b00 cmp r3, #0
+ 8002dba: d009 beq.n 8002dd0 <HAL_UART_IRQHandler+0x22c>
+ {
+ UART_EndTransmit_IT(huart);
+ 8002dbc: 6878 ldr r0, [r7, #4]
+ 8002dbe: f000 fcf9 bl 80037b4 <UART_EndTransmit_IT>
+ return;
+ 8002dc2: bf00 nop
+ 8002dc4: e004 b.n 8002dd0 <HAL_UART_IRQHandler+0x22c>
+ return;
+ 8002dc6: bf00 nop
+ 8002dc8: e002 b.n 8002dd0 <HAL_UART_IRQHandler+0x22c>
+ return;
+ 8002dca: bf00 nop
+ 8002dcc: e000 b.n 8002dd0 <HAL_UART_IRQHandler+0x22c>
+ return;
+ 8002dce: bf00 nop
+ }
+
+}
+ 8002dd0: 3720 adds r7, #32
+ 8002dd2: 46bd mov sp, r7
+ 8002dd4: bd80 pop {r7, pc}
+ 8002dd6: bf00 nop
+ 8002dd8: 08003789 .word 0x08003789
+
+08002ddc <HAL_UART_TxCpltCallback>:
+ * @brief Tx Transfer completed callback.
+ * @param huart UART handle.
+ * @retval None
+ */
+__weak void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
+{
+ 8002ddc: b480 push {r7}
+ 8002dde: b083 sub sp, #12
+ 8002de0: af00 add r7, sp, #0
+ 8002de2: 6078 str r0, [r7, #4]
+ UNUSED(huart);
+
+ /* NOTE : This function should not be modified, when the callback is needed,
+ the HAL_UART_TxCpltCallback can be implemented in the user file.
+ */
+}
+ 8002de4: bf00 nop
+ 8002de6: 370c adds r7, #12
+ 8002de8: 46bd mov sp, r7
+ 8002dea: f85d 7b04 ldr.w r7, [sp], #4
+ 8002dee: 4770 bx lr
+
+08002df0 <HAL_UART_TxHalfCpltCallback>:
+ * @brief Tx Half Transfer completed callback.
+ * @param huart UART handle.
+ * @retval None
+ */
+__weak void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart)
+{
+ 8002df0: b480 push {r7}
+ 8002df2: b083 sub sp, #12
+ 8002df4: af00 add r7, sp, #0
+ 8002df6: 6078 str r0, [r7, #4]
+ UNUSED(huart);
+
+ /* NOTE: This function should not be modified, when the callback is needed,
+ the HAL_UART_TxHalfCpltCallback can be implemented in the user file.
+ */
+}
+ 8002df8: bf00 nop
+ 8002dfa: 370c adds r7, #12
+ 8002dfc: 46bd mov sp, r7
+ 8002dfe: f85d 7b04 ldr.w r7, [sp], #4
+ 8002e02: 4770 bx lr
+
+08002e04 <HAL_UART_RxCpltCallback>:
+ * @brief Rx Transfer completed callback.
+ * @param huart UART handle.
+ * @retval None
+ */
+__weak void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
+{
+ 8002e04: b480 push {r7}
+ 8002e06: b083 sub sp, #12
+ 8002e08: af00 add r7, sp, #0
+ 8002e0a: 6078 str r0, [r7, #4]
+ UNUSED(huart);
+
+ /* NOTE : This function should not be modified, when the callback is needed,
+ the HAL_UART_RxCpltCallback can be implemented in the user file.
+ */
+}
+ 8002e0c: bf00 nop
+ 8002e0e: 370c adds r7, #12
+ 8002e10: 46bd mov sp, r7
+ 8002e12: f85d 7b04 ldr.w r7, [sp], #4
+ 8002e16: 4770 bx lr
+
+08002e18 <HAL_UART_RxHalfCpltCallback>:
+ * @brief Rx Half Transfer completed callback.
+ * @param huart UART handle.
+ * @retval None
+ */
+__weak void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart)
+{
+ 8002e18: b480 push {r7}
+ 8002e1a: b083 sub sp, #12
+ 8002e1c: af00 add r7, sp, #0
+ 8002e1e: 6078 str r0, [r7, #4]
+ UNUSED(huart);
+
+ /* NOTE: This function should not be modified, when the callback is needed,
+ the HAL_UART_RxHalfCpltCallback can be implemented in the user file.
+ */
+}
+ 8002e20: bf00 nop
+ 8002e22: 370c adds r7, #12
+ 8002e24: 46bd mov sp, r7
+ 8002e26: f85d 7b04 ldr.w r7, [sp], #4
+ 8002e2a: 4770 bx lr
+
+08002e2c <HAL_UART_ErrorCallback>:
+ * @brief UART error callback.
+ * @param huart UART handle.
+ * @retval None
+ */
+__weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
+{
+ 8002e2c: b480 push {r7}
+ 8002e2e: b083 sub sp, #12
+ 8002e30: af00 add r7, sp, #0
+ 8002e32: 6078 str r0, [r7, #4]
+ UNUSED(huart);
+
+ /* NOTE : This function should not be modified, when the callback is needed,
+ the HAL_UART_ErrorCallback can be implemented in the user file.
+ */
+}
+ 8002e34: bf00 nop
+ 8002e36: 370c adds r7, #12
+ 8002e38: 46bd mov sp, r7
+ 8002e3a: f85d 7b04 ldr.w r7, [sp], #4
+ 8002e3e: 4770 bx lr
+
+08002e40 <UART_SetConfig>:
+ * @brief Configure the UART peripheral.
+ * @param huart UART handle.
+ * @retval HAL status
+ */
+HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart)
+{
+ 8002e40: b580 push {r7, lr}
+ 8002e42: b088 sub sp, #32
+ 8002e44: af00 add r7, sp, #0
+ 8002e46: 6078 str r0, [r7, #4]
+ uint32_t tmpreg;
+ uint16_t brrtemp;
+ UART_ClockSourceTypeDef clocksource;
+ uint32_t usartdiv = 0x00000000U;
+ 8002e48: 2300 movs r3, #0
+ 8002e4a: 61bb str r3, [r7, #24]
+ HAL_StatusTypeDef ret = HAL_OK;
+ 8002e4c: 2300 movs r3, #0
+ 8002e4e: 75fb strb r3, [r7, #23]
+ * the UART Word Length, Parity, Mode and oversampling:
+ * set the M bits according to huart->Init.WordLength value
+ * set PCE and PS bits according to huart->Init.Parity value
+ * set TE and RE bits according to huart->Init.Mode value
+ * set OVER8 bit according to huart->Init.OverSampling value */
+ tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling ;
+ 8002e50: 687b ldr r3, [r7, #4]
+ 8002e52: 689a ldr r2, [r3, #8]
+ 8002e54: 687b ldr r3, [r7, #4]
+ 8002e56: 691b ldr r3, [r3, #16]
+ 8002e58: 431a orrs r2, r3
+ 8002e5a: 687b ldr r3, [r7, #4]
+ 8002e5c: 695b ldr r3, [r3, #20]
+ 8002e5e: 431a orrs r2, r3
+ 8002e60: 687b ldr r3, [r7, #4]
+ 8002e62: 69db ldr r3, [r3, #28]
+ 8002e64: 4313 orrs r3, r2
+ 8002e66: 613b str r3, [r7, #16]
+ MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg);
+ 8002e68: 687b ldr r3, [r7, #4]
+ 8002e6a: 681b ldr r3, [r3, #0]
+ 8002e6c: 681a ldr r2, [r3, #0]
+ 8002e6e: 4bb1 ldr r3, [pc, #708] ; (8003134 <UART_SetConfig+0x2f4>)
+ 8002e70: 4013 ands r3, r2
+ 8002e72: 687a ldr r2, [r7, #4]
+ 8002e74: 6812 ldr r2, [r2, #0]
+ 8002e76: 6939 ldr r1, [r7, #16]
+ 8002e78: 430b orrs r3, r1
+ 8002e7a: 6013 str r3, [r2, #0]
+
+ /*-------------------------- USART CR2 Configuration -----------------------*/
+ /* Configure the UART Stop Bits: Set STOP[13:12] bits according
+ * to huart->Init.StopBits value */
+ MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
+ 8002e7c: 687b ldr r3, [r7, #4]
+ 8002e7e: 681b ldr r3, [r3, #0]
+ 8002e80: 685b ldr r3, [r3, #4]
+ 8002e82: f423 5140 bic.w r1, r3, #12288 ; 0x3000
+ 8002e86: 687b ldr r3, [r7, #4]
+ 8002e88: 68da ldr r2, [r3, #12]
+ 8002e8a: 687b ldr r3, [r7, #4]
+ 8002e8c: 681b ldr r3, [r3, #0]
+ 8002e8e: 430a orrs r2, r1
+ 8002e90: 605a str r2, [r3, #4]
+ /* Configure
+ * - UART HardWare Flow Control: set CTSE and RTSE bits according
+ * to huart->Init.HwFlowCtl value
+ * - one-bit sampling method versus three samples' majority rule according
+ * to huart->Init.OneBitSampling (not applicable to LPUART) */
+ tmpreg = (uint32_t)huart->Init.HwFlowCtl;
+ 8002e92: 687b ldr r3, [r7, #4]
+ 8002e94: 699b ldr r3, [r3, #24]
+ 8002e96: 613b str r3, [r7, #16]
+
+ tmpreg |= huart->Init.OneBitSampling;
+ 8002e98: 687b ldr r3, [r7, #4]
+ 8002e9a: 6a1b ldr r3, [r3, #32]
+ 8002e9c: 693a ldr r2, [r7, #16]
+ 8002e9e: 4313 orrs r3, r2
+ 8002ea0: 613b str r3, [r7, #16]
+ MODIFY_REG(huart->Instance->CR3, USART_CR3_FIELDS, tmpreg);
+ 8002ea2: 687b ldr r3, [r7, #4]
+ 8002ea4: 681b ldr r3, [r3, #0]
+ 8002ea6: 689b ldr r3, [r3, #8]
+ 8002ea8: f423 6130 bic.w r1, r3, #2816 ; 0xb00
+ 8002eac: 687b ldr r3, [r7, #4]
+ 8002eae: 681b ldr r3, [r3, #0]
+ 8002eb0: 693a ldr r2, [r7, #16]
+ 8002eb2: 430a orrs r2, r1
+ 8002eb4: 609a str r2, [r3, #8]
+
+
+ /*-------------------------- USART BRR Configuration -----------------------*/
+ UART_GETCLOCKSOURCE(huart, clocksource);
+ 8002eb6: 687b ldr r3, [r7, #4]
+ 8002eb8: 681b ldr r3, [r3, #0]
+ 8002eba: 4a9f ldr r2, [pc, #636] ; (8003138 <UART_SetConfig+0x2f8>)
+ 8002ebc: 4293 cmp r3, r2
+ 8002ebe: d121 bne.n 8002f04 <UART_SetConfig+0xc4>
+ 8002ec0: 4b9e ldr r3, [pc, #632] ; (800313c <UART_SetConfig+0x2fc>)
+ 8002ec2: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
+ 8002ec6: f003 0303 and.w r3, r3, #3
+ 8002eca: 2b03 cmp r3, #3
+ 8002ecc: d816 bhi.n 8002efc <UART_SetConfig+0xbc>
+ 8002ece: a201 add r2, pc, #4 ; (adr r2, 8002ed4 <UART_SetConfig+0x94>)
+ 8002ed0: f852 f023 ldr.w pc, [r2, r3, lsl #2]
+ 8002ed4: 08002ee5 .word 0x08002ee5
+ 8002ed8: 08002ef1 .word 0x08002ef1
+ 8002edc: 08002eeb .word 0x08002eeb
+ 8002ee0: 08002ef7 .word 0x08002ef7
+ 8002ee4: 2301 movs r3, #1
+ 8002ee6: 77fb strb r3, [r7, #31]
+ 8002ee8: e151 b.n 800318e <UART_SetConfig+0x34e>
+ 8002eea: 2302 movs r3, #2
+ 8002eec: 77fb strb r3, [r7, #31]
+ 8002eee: e14e b.n 800318e <UART_SetConfig+0x34e>
+ 8002ef0: 2304 movs r3, #4
+ 8002ef2: 77fb strb r3, [r7, #31]
+ 8002ef4: e14b b.n 800318e <UART_SetConfig+0x34e>
+ 8002ef6: 2308 movs r3, #8
+ 8002ef8: 77fb strb r3, [r7, #31]
+ 8002efa: e148 b.n 800318e <UART_SetConfig+0x34e>
+ 8002efc: 2310 movs r3, #16
+ 8002efe: 77fb strb r3, [r7, #31]
+ 8002f00: bf00 nop
+ 8002f02: e144 b.n 800318e <UART_SetConfig+0x34e>
+ 8002f04: 687b ldr r3, [r7, #4]
+ 8002f06: 681b ldr r3, [r3, #0]
+ 8002f08: 4a8d ldr r2, [pc, #564] ; (8003140 <UART_SetConfig+0x300>)
+ 8002f0a: 4293 cmp r3, r2
+ 8002f0c: d134 bne.n 8002f78 <UART_SetConfig+0x138>
+ 8002f0e: 4b8b ldr r3, [pc, #556] ; (800313c <UART_SetConfig+0x2fc>)
+ 8002f10: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
+ 8002f14: f003 030c and.w r3, r3, #12
+ 8002f18: 2b0c cmp r3, #12
+ 8002f1a: d829 bhi.n 8002f70 <UART_SetConfig+0x130>
+ 8002f1c: a201 add r2, pc, #4 ; (adr r2, 8002f24 <UART_SetConfig+0xe4>)
+ 8002f1e: f852 f023 ldr.w pc, [r2, r3, lsl #2]
+ 8002f22: bf00 nop
+ 8002f24: 08002f59 .word 0x08002f59
+ 8002f28: 08002f71 .word 0x08002f71
+ 8002f2c: 08002f71 .word 0x08002f71
+ 8002f30: 08002f71 .word 0x08002f71
+ 8002f34: 08002f65 .word 0x08002f65
+ 8002f38: 08002f71 .word 0x08002f71
+ 8002f3c: 08002f71 .word 0x08002f71
+ 8002f40: 08002f71 .word 0x08002f71
+ 8002f44: 08002f5f .word 0x08002f5f
+ 8002f48: 08002f71 .word 0x08002f71
+ 8002f4c: 08002f71 .word 0x08002f71
+ 8002f50: 08002f71 .word 0x08002f71
+ 8002f54: 08002f6b .word 0x08002f6b
+ 8002f58: 2300 movs r3, #0
+ 8002f5a: 77fb strb r3, [r7, #31]
+ 8002f5c: e117 b.n 800318e <UART_SetConfig+0x34e>
+ 8002f5e: 2302 movs r3, #2
+ 8002f60: 77fb strb r3, [r7, #31]
+ 8002f62: e114 b.n 800318e <UART_SetConfig+0x34e>
+ 8002f64: 2304 movs r3, #4
+ 8002f66: 77fb strb r3, [r7, #31]
+ 8002f68: e111 b.n 800318e <UART_SetConfig+0x34e>
+ 8002f6a: 2308 movs r3, #8
+ 8002f6c: 77fb strb r3, [r7, #31]
+ 8002f6e: e10e b.n 800318e <UART_SetConfig+0x34e>
+ 8002f70: 2310 movs r3, #16
+ 8002f72: 77fb strb r3, [r7, #31]
+ 8002f74: bf00 nop
+ 8002f76: e10a b.n 800318e <UART_SetConfig+0x34e>
+ 8002f78: 687b ldr r3, [r7, #4]
+ 8002f7a: 681b ldr r3, [r3, #0]
+ 8002f7c: 4a71 ldr r2, [pc, #452] ; (8003144 <UART_SetConfig+0x304>)
+ 8002f7e: 4293 cmp r3, r2
+ 8002f80: d120 bne.n 8002fc4 <UART_SetConfig+0x184>
+ 8002f82: 4b6e ldr r3, [pc, #440] ; (800313c <UART_SetConfig+0x2fc>)
+ 8002f84: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
+ 8002f88: f003 0330 and.w r3, r3, #48 ; 0x30
+ 8002f8c: 2b10 cmp r3, #16
+ 8002f8e: d00f beq.n 8002fb0 <UART_SetConfig+0x170>
+ 8002f90: 2b10 cmp r3, #16
+ 8002f92: d802 bhi.n 8002f9a <UART_SetConfig+0x15a>
+ 8002f94: 2b00 cmp r3, #0
+ 8002f96: d005 beq.n 8002fa4 <UART_SetConfig+0x164>
+ 8002f98: e010 b.n 8002fbc <UART_SetConfig+0x17c>
+ 8002f9a: 2b20 cmp r3, #32
+ 8002f9c: d005 beq.n 8002faa <UART_SetConfig+0x16a>
+ 8002f9e: 2b30 cmp r3, #48 ; 0x30
+ 8002fa0: d009 beq.n 8002fb6 <UART_SetConfig+0x176>
+ 8002fa2: e00b b.n 8002fbc <UART_SetConfig+0x17c>
+ 8002fa4: 2300 movs r3, #0
+ 8002fa6: 77fb strb r3, [r7, #31]
+ 8002fa8: e0f1 b.n 800318e <UART_SetConfig+0x34e>
+ 8002faa: 2302 movs r3, #2
+ 8002fac: 77fb strb r3, [r7, #31]
+ 8002fae: e0ee b.n 800318e <UART_SetConfig+0x34e>
+ 8002fb0: 2304 movs r3, #4
+ 8002fb2: 77fb strb r3, [r7, #31]
+ 8002fb4: e0eb b.n 800318e <UART_SetConfig+0x34e>
+ 8002fb6: 2308 movs r3, #8
+ 8002fb8: 77fb strb r3, [r7, #31]
+ 8002fba: e0e8 b.n 800318e <UART_SetConfig+0x34e>
+ 8002fbc: 2310 movs r3, #16
+ 8002fbe: 77fb strb r3, [r7, #31]
+ 8002fc0: bf00 nop
+ 8002fc2: e0e4 b.n 800318e <UART_SetConfig+0x34e>
+ 8002fc4: 687b ldr r3, [r7, #4]
+ 8002fc6: 681b ldr r3, [r3, #0]
+ 8002fc8: 4a5f ldr r2, [pc, #380] ; (8003148 <UART_SetConfig+0x308>)
+ 8002fca: 4293 cmp r3, r2
+ 8002fcc: d120 bne.n 8003010 <UART_SetConfig+0x1d0>
+ 8002fce: 4b5b ldr r3, [pc, #364] ; (800313c <UART_SetConfig+0x2fc>)
+ 8002fd0: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
+ 8002fd4: f003 03c0 and.w r3, r3, #192 ; 0xc0
+ 8002fd8: 2b40 cmp r3, #64 ; 0x40
+ 8002fda: d00f beq.n 8002ffc <UART_SetConfig+0x1bc>
+ 8002fdc: 2b40 cmp r3, #64 ; 0x40
+ 8002fde: d802 bhi.n 8002fe6 <UART_SetConfig+0x1a6>
+ 8002fe0: 2b00 cmp r3, #0
+ 8002fe2: d005 beq.n 8002ff0 <UART_SetConfig+0x1b0>
+ 8002fe4: e010 b.n 8003008 <UART_SetConfig+0x1c8>
+ 8002fe6: 2b80 cmp r3, #128 ; 0x80
+ 8002fe8: d005 beq.n 8002ff6 <UART_SetConfig+0x1b6>
+ 8002fea: 2bc0 cmp r3, #192 ; 0xc0
+ 8002fec: d009 beq.n 8003002 <UART_SetConfig+0x1c2>
+ 8002fee: e00b b.n 8003008 <UART_SetConfig+0x1c8>
+ 8002ff0: 2300 movs r3, #0
+ 8002ff2: 77fb strb r3, [r7, #31]
+ 8002ff4: e0cb b.n 800318e <UART_SetConfig+0x34e>
+ 8002ff6: 2302 movs r3, #2
+ 8002ff8: 77fb strb r3, [r7, #31]
+ 8002ffa: e0c8 b.n 800318e <UART_SetConfig+0x34e>
+ 8002ffc: 2304 movs r3, #4
+ 8002ffe: 77fb strb r3, [r7, #31]
+ 8003000: e0c5 b.n 800318e <UART_SetConfig+0x34e>
+ 8003002: 2308 movs r3, #8
+ 8003004: 77fb strb r3, [r7, #31]
+ 8003006: e0c2 b.n 800318e <UART_SetConfig+0x34e>
+ 8003008: 2310 movs r3, #16
+ 800300a: 77fb strb r3, [r7, #31]
+ 800300c: bf00 nop
+ 800300e: e0be b.n 800318e <UART_SetConfig+0x34e>
+ 8003010: 687b ldr r3, [r7, #4]
+ 8003012: 681b ldr r3, [r3, #0]
+ 8003014: 4a4d ldr r2, [pc, #308] ; (800314c <UART_SetConfig+0x30c>)
+ 8003016: 4293 cmp r3, r2
+ 8003018: d124 bne.n 8003064 <UART_SetConfig+0x224>
+ 800301a: 4b48 ldr r3, [pc, #288] ; (800313c <UART_SetConfig+0x2fc>)
+ 800301c: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
+ 8003020: f403 7340 and.w r3, r3, #768 ; 0x300
+ 8003024: f5b3 7f80 cmp.w r3, #256 ; 0x100
+ 8003028: d012 beq.n 8003050 <UART_SetConfig+0x210>
+ 800302a: f5b3 7f80 cmp.w r3, #256 ; 0x100
+ 800302e: d802 bhi.n 8003036 <UART_SetConfig+0x1f6>
+ 8003030: 2b00 cmp r3, #0
+ 8003032: d007 beq.n 8003044 <UART_SetConfig+0x204>
+ 8003034: e012 b.n 800305c <UART_SetConfig+0x21c>
+ 8003036: f5b3 7f00 cmp.w r3, #512 ; 0x200
+ 800303a: d006 beq.n 800304a <UART_SetConfig+0x20a>
+ 800303c: f5b3 7f40 cmp.w r3, #768 ; 0x300
+ 8003040: d009 beq.n 8003056 <UART_SetConfig+0x216>
+ 8003042: e00b b.n 800305c <UART_SetConfig+0x21c>
+ 8003044: 2300 movs r3, #0
+ 8003046: 77fb strb r3, [r7, #31]
+ 8003048: e0a1 b.n 800318e <UART_SetConfig+0x34e>
+ 800304a: 2302 movs r3, #2
+ 800304c: 77fb strb r3, [r7, #31]
+ 800304e: e09e b.n 800318e <UART_SetConfig+0x34e>
+ 8003050: 2304 movs r3, #4
+ 8003052: 77fb strb r3, [r7, #31]
+ 8003054: e09b b.n 800318e <UART_SetConfig+0x34e>
+ 8003056: 2308 movs r3, #8
+ 8003058: 77fb strb r3, [r7, #31]
+ 800305a: e098 b.n 800318e <UART_SetConfig+0x34e>
+ 800305c: 2310 movs r3, #16
+ 800305e: 77fb strb r3, [r7, #31]
+ 8003060: bf00 nop
+ 8003062: e094 b.n 800318e <UART_SetConfig+0x34e>
+ 8003064: 687b ldr r3, [r7, #4]
+ 8003066: 681b ldr r3, [r3, #0]
+ 8003068: 4a39 ldr r2, [pc, #228] ; (8003150 <UART_SetConfig+0x310>)
+ 800306a: 4293 cmp r3, r2
+ 800306c: d124 bne.n 80030b8 <UART_SetConfig+0x278>
+ 800306e: 4b33 ldr r3, [pc, #204] ; (800313c <UART_SetConfig+0x2fc>)
+ 8003070: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
+ 8003074: f403 6340 and.w r3, r3, #3072 ; 0xc00
+ 8003078: f5b3 6f80 cmp.w r3, #1024 ; 0x400
+ 800307c: d012 beq.n 80030a4 <UART_SetConfig+0x264>
+ 800307e: f5b3 6f80 cmp.w r3, #1024 ; 0x400
+ 8003082: d802 bhi.n 800308a <UART_SetConfig+0x24a>
+ 8003084: 2b00 cmp r3, #0
+ 8003086: d007 beq.n 8003098 <UART_SetConfig+0x258>
+ 8003088: e012 b.n 80030b0 <UART_SetConfig+0x270>
+ 800308a: f5b3 6f00 cmp.w r3, #2048 ; 0x800
+ 800308e: d006 beq.n 800309e <UART_SetConfig+0x25e>
+ 8003090: f5b3 6f40 cmp.w r3, #3072 ; 0xc00
+ 8003094: d009 beq.n 80030aa <UART_SetConfig+0x26a>
+ 8003096: e00b b.n 80030b0 <UART_SetConfig+0x270>
+ 8003098: 2301 movs r3, #1
+ 800309a: 77fb strb r3, [r7, #31]
+ 800309c: e077 b.n 800318e <UART_SetConfig+0x34e>
+ 800309e: 2302 movs r3, #2
+ 80030a0: 77fb strb r3, [r7, #31]
+ 80030a2: e074 b.n 800318e <UART_SetConfig+0x34e>
+ 80030a4: 2304 movs r3, #4
+ 80030a6: 77fb strb r3, [r7, #31]
+ 80030a8: e071 b.n 800318e <UART_SetConfig+0x34e>
+ 80030aa: 2308 movs r3, #8
+ 80030ac: 77fb strb r3, [r7, #31]
+ 80030ae: e06e b.n 800318e <UART_SetConfig+0x34e>
+ 80030b0: 2310 movs r3, #16
+ 80030b2: 77fb strb r3, [r7, #31]
+ 80030b4: bf00 nop
+ 80030b6: e06a b.n 800318e <UART_SetConfig+0x34e>
+ 80030b8: 687b ldr r3, [r7, #4]
+ 80030ba: 681b ldr r3, [r3, #0]
+ 80030bc: 4a25 ldr r2, [pc, #148] ; (8003154 <UART_SetConfig+0x314>)
+ 80030be: 4293 cmp r3, r2
+ 80030c0: d124 bne.n 800310c <UART_SetConfig+0x2cc>
+ 80030c2: 4b1e ldr r3, [pc, #120] ; (800313c <UART_SetConfig+0x2fc>)
+ 80030c4: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
+ 80030c8: f403 5340 and.w r3, r3, #12288 ; 0x3000
+ 80030cc: f5b3 5f80 cmp.w r3, #4096 ; 0x1000
+ 80030d0: d012 beq.n 80030f8 <UART_SetConfig+0x2b8>
+ 80030d2: f5b3 5f80 cmp.w r3, #4096 ; 0x1000
+ 80030d6: d802 bhi.n 80030de <UART_SetConfig+0x29e>
+ 80030d8: 2b00 cmp r3, #0
+ 80030da: d007 beq.n 80030ec <UART_SetConfig+0x2ac>
+ 80030dc: e012 b.n 8003104 <UART_SetConfig+0x2c4>
+ 80030de: f5b3 5f00 cmp.w r3, #8192 ; 0x2000
+ 80030e2: d006 beq.n 80030f2 <UART_SetConfig+0x2b2>
+ 80030e4: f5b3 5f40 cmp.w r3, #12288 ; 0x3000
+ 80030e8: d009 beq.n 80030fe <UART_SetConfig+0x2be>
+ 80030ea: e00b b.n 8003104 <UART_SetConfig+0x2c4>
+ 80030ec: 2300 movs r3, #0
+ 80030ee: 77fb strb r3, [r7, #31]
+ 80030f0: e04d b.n 800318e <UART_SetConfig+0x34e>
+ 80030f2: 2302 movs r3, #2
+ 80030f4: 77fb strb r3, [r7, #31]
+ 80030f6: e04a b.n 800318e <UART_SetConfig+0x34e>
+ 80030f8: 2304 movs r3, #4
+ 80030fa: 77fb strb r3, [r7, #31]
+ 80030fc: e047 b.n 800318e <UART_SetConfig+0x34e>
+ 80030fe: 2308 movs r3, #8
+ 8003100: 77fb strb r3, [r7, #31]
+ 8003102: e044 b.n 800318e <UART_SetConfig+0x34e>
+ 8003104: 2310 movs r3, #16
+ 8003106: 77fb strb r3, [r7, #31]
+ 8003108: bf00 nop
+ 800310a: e040 b.n 800318e <UART_SetConfig+0x34e>
+ 800310c: 687b ldr r3, [r7, #4]
+ 800310e: 681b ldr r3, [r3, #0]
+ 8003110: 4a11 ldr r2, [pc, #68] ; (8003158 <UART_SetConfig+0x318>)
+ 8003112: 4293 cmp r3, r2
+ 8003114: d139 bne.n 800318a <UART_SetConfig+0x34a>
+ 8003116: 4b09 ldr r3, [pc, #36] ; (800313c <UART_SetConfig+0x2fc>)
+ 8003118: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
+ 800311c: f403 4340 and.w r3, r3, #49152 ; 0xc000
+ 8003120: f5b3 4f80 cmp.w r3, #16384 ; 0x4000
+ 8003124: d027 beq.n 8003176 <UART_SetConfig+0x336>
+ 8003126: f5b3 4f80 cmp.w r3, #16384 ; 0x4000
+ 800312a: d817 bhi.n 800315c <UART_SetConfig+0x31c>
+ 800312c: 2b00 cmp r3, #0
+ 800312e: d01c beq.n 800316a <UART_SetConfig+0x32a>
+ 8003130: e027 b.n 8003182 <UART_SetConfig+0x342>
+ 8003132: bf00 nop
+ 8003134: efff69f3 .word 0xefff69f3
+ 8003138: 40011000 .word 0x40011000
+ 800313c: 40023800 .word 0x40023800
+ 8003140: 40004400 .word 0x40004400
+ 8003144: 40004800 .word 0x40004800
+ 8003148: 40004c00 .word 0x40004c00
+ 800314c: 40005000 .word 0x40005000
+ 8003150: 40011400 .word 0x40011400
+ 8003154: 40007800 .word 0x40007800
+ 8003158: 40007c00 .word 0x40007c00
+ 800315c: f5b3 4f00 cmp.w r3, #32768 ; 0x8000
+ 8003160: d006 beq.n 8003170 <UART_SetConfig+0x330>
+ 8003162: f5b3 4f40 cmp.w r3, #49152 ; 0xc000
+ 8003166: d009 beq.n 800317c <UART_SetConfig+0x33c>
+ 8003168: e00b b.n 8003182 <UART_SetConfig+0x342>
+ 800316a: 2300 movs r3, #0
+ 800316c: 77fb strb r3, [r7, #31]
+ 800316e: e00e b.n 800318e <UART_SetConfig+0x34e>
+ 8003170: 2302 movs r3, #2
+ 8003172: 77fb strb r3, [r7, #31]
+ 8003174: e00b b.n 800318e <UART_SetConfig+0x34e>
+ 8003176: 2304 movs r3, #4
+ 8003178: 77fb strb r3, [r7, #31]
+ 800317a: e008 b.n 800318e <UART_SetConfig+0x34e>
+ 800317c: 2308 movs r3, #8
+ 800317e: 77fb strb r3, [r7, #31]
+ 8003180: e005 b.n 800318e <UART_SetConfig+0x34e>
+ 8003182: 2310 movs r3, #16
+ 8003184: 77fb strb r3, [r7, #31]
+ 8003186: bf00 nop
+ 8003188: e001 b.n 800318e <UART_SetConfig+0x34e>
+ 800318a: 2310 movs r3, #16
+ 800318c: 77fb strb r3, [r7, #31]
+
+ if (huart->Init.OverSampling == UART_OVERSAMPLING_8)
+ 800318e: 687b ldr r3, [r7, #4]
+ 8003190: 69db ldr r3, [r3, #28]
+ 8003192: f5b3 4f00 cmp.w r3, #32768 ; 0x8000
+ 8003196: d17c bne.n 8003292 <UART_SetConfig+0x452>
+ {
+ switch (clocksource)
+ 8003198: 7ffb ldrb r3, [r7, #31]
+ 800319a: 2b08 cmp r3, #8
+ 800319c: d859 bhi.n 8003252 <UART_SetConfig+0x412>
+ 800319e: a201 add r2, pc, #4 ; (adr r2, 80031a4 <UART_SetConfig+0x364>)
+ 80031a0: f852 f023 ldr.w pc, [r2, r3, lsl #2]
+ 80031a4: 080031c9 .word 0x080031c9
+ 80031a8: 080031e7 .word 0x080031e7
+ 80031ac: 08003205 .word 0x08003205
+ 80031b0: 08003253 .word 0x08003253
+ 80031b4: 0800321d .word 0x0800321d
+ 80031b8: 08003253 .word 0x08003253
+ 80031bc: 08003253 .word 0x08003253
+ 80031c0: 08003253 .word 0x08003253
+ 80031c4: 0800323b .word 0x0800323b
+ {
+ case UART_CLOCKSOURCE_PCLK1:
+ usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate));
+ 80031c8: f7fe fcaa bl 8001b20 <HAL_RCC_GetPCLK1Freq>
+ 80031cc: 4603 mov r3, r0
+ 80031ce: 005a lsls r2, r3, #1
+ 80031d0: 687b ldr r3, [r7, #4]
+ 80031d2: 685b ldr r3, [r3, #4]
+ 80031d4: 085b lsrs r3, r3, #1
+ 80031d6: 441a add r2, r3
+ 80031d8: 687b ldr r3, [r7, #4]
+ 80031da: 685b ldr r3, [r3, #4]
+ 80031dc: fbb2 f3f3 udiv r3, r2, r3
+ 80031e0: b29b uxth r3, r3
+ 80031e2: 61bb str r3, [r7, #24]
+ break;
+ 80031e4: e038 b.n 8003258 <UART_SetConfig+0x418>
+ case UART_CLOCKSOURCE_PCLK2:
+ usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate));
+ 80031e6: f7fe fcaf bl 8001b48 <HAL_RCC_GetPCLK2Freq>
+ 80031ea: 4603 mov r3, r0
+ 80031ec: 005a lsls r2, r3, #1
+ 80031ee: 687b ldr r3, [r7, #4]
+ 80031f0: 685b ldr r3, [r3, #4]
+ 80031f2: 085b lsrs r3, r3, #1
+ 80031f4: 441a add r2, r3
+ 80031f6: 687b ldr r3, [r7, #4]
+ 80031f8: 685b ldr r3, [r3, #4]
+ 80031fa: fbb2 f3f3 udiv r3, r2, r3
+ 80031fe: b29b uxth r3, r3
+ 8003200: 61bb str r3, [r7, #24]
+ break;
+ 8003202: e029 b.n 8003258 <UART_SetConfig+0x418>
+ case UART_CLOCKSOURCE_HSI:
+ usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HSI_VALUE, huart->Init.BaudRate));
+ 8003204: 687b ldr r3, [r7, #4]
+ 8003206: 685b ldr r3, [r3, #4]
+ 8003208: 085a lsrs r2, r3, #1
+ 800320a: 4b5d ldr r3, [pc, #372] ; (8003380 <UART_SetConfig+0x540>)
+ 800320c: 4413 add r3, r2
+ 800320e: 687a ldr r2, [r7, #4]
+ 8003210: 6852 ldr r2, [r2, #4]
+ 8003212: fbb3 f3f2 udiv r3, r3, r2
+ 8003216: b29b uxth r3, r3
+ 8003218: 61bb str r3, [r7, #24]
+ break;
+ 800321a: e01d b.n 8003258 <UART_SetConfig+0x418>
+ case UART_CLOCKSOURCE_SYSCLK:
+ usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HAL_RCC_GetSysClockFreq(), huart->Init.BaudRate));
+ 800321c: f7fe fbc2 bl 80019a4 <HAL_RCC_GetSysClockFreq>
+ 8003220: 4603 mov r3, r0
+ 8003222: 005a lsls r2, r3, #1
+ 8003224: 687b ldr r3, [r7, #4]
+ 8003226: 685b ldr r3, [r3, #4]
+ 8003228: 085b lsrs r3, r3, #1
+ 800322a: 441a add r2, r3
+ 800322c: 687b ldr r3, [r7, #4]
+ 800322e: 685b ldr r3, [r3, #4]
+ 8003230: fbb2 f3f3 udiv r3, r2, r3
+ 8003234: b29b uxth r3, r3
+ 8003236: 61bb str r3, [r7, #24]
+ break;
+ 8003238: e00e b.n 8003258 <UART_SetConfig+0x418>
+ case UART_CLOCKSOURCE_LSE:
+ usartdiv = (uint16_t)(UART_DIV_SAMPLING8(LSE_VALUE, huart->Init.BaudRate));
+ 800323a: 687b ldr r3, [r7, #4]
+ 800323c: 685b ldr r3, [r3, #4]
+ 800323e: 085b lsrs r3, r3, #1
+ 8003240: f503 3280 add.w r2, r3, #65536 ; 0x10000
+ 8003244: 687b ldr r3, [r7, #4]
+ 8003246: 685b ldr r3, [r3, #4]
+ 8003248: fbb2 f3f3 udiv r3, r2, r3
+ 800324c: b29b uxth r3, r3
+ 800324e: 61bb str r3, [r7, #24]
+ break;
+ 8003250: e002 b.n 8003258 <UART_SetConfig+0x418>
+ case UART_CLOCKSOURCE_UNDEFINED:
+ default:
+ ret = HAL_ERROR;
+ 8003252: 2301 movs r3, #1
+ 8003254: 75fb strb r3, [r7, #23]
+ break;
+ 8003256: bf00 nop
+ }
+
+ /* USARTDIV must be greater than or equal to 0d16 */
+ if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
+ 8003258: 69bb ldr r3, [r7, #24]
+ 800325a: 2b0f cmp r3, #15
+ 800325c: d916 bls.n 800328c <UART_SetConfig+0x44c>
+ 800325e: 69bb ldr r3, [r7, #24]
+ 8003260: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
+ 8003264: d212 bcs.n 800328c <UART_SetConfig+0x44c>
+ {
+ brrtemp = (uint16_t)(usartdiv & 0xFFF0U);
+ 8003266: 69bb ldr r3, [r7, #24]
+ 8003268: b29b uxth r3, r3
+ 800326a: f023 030f bic.w r3, r3, #15
+ 800326e: 81fb strh r3, [r7, #14]
+ brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U);
+ 8003270: 69bb ldr r3, [r7, #24]
+ 8003272: 085b lsrs r3, r3, #1
+ 8003274: b29b uxth r3, r3
+ 8003276: f003 0307 and.w r3, r3, #7
+ 800327a: b29a uxth r2, r3
+ 800327c: 89fb ldrh r3, [r7, #14]
+ 800327e: 4313 orrs r3, r2
+ 8003280: 81fb strh r3, [r7, #14]
+ huart->Instance->BRR = brrtemp;
+ 8003282: 687b ldr r3, [r7, #4]
+ 8003284: 681b ldr r3, [r3, #0]
+ 8003286: 89fa ldrh r2, [r7, #14]
+ 8003288: 60da str r2, [r3, #12]
+ 800328a: e06e b.n 800336a <UART_SetConfig+0x52a>
+ }
+ else
+ {
+ ret = HAL_ERROR;
+ 800328c: 2301 movs r3, #1
+ 800328e: 75fb strb r3, [r7, #23]
+ 8003290: e06b b.n 800336a <UART_SetConfig+0x52a>
+ }
+ }
+ else
+ {
+ switch (clocksource)
+ 8003292: 7ffb ldrb r3, [r7, #31]
+ 8003294: 2b08 cmp r3, #8
+ 8003296: d857 bhi.n 8003348 <UART_SetConfig+0x508>
+ 8003298: a201 add r2, pc, #4 ; (adr r2, 80032a0 <UART_SetConfig+0x460>)
+ 800329a: f852 f023 ldr.w pc, [r2, r3, lsl #2]
+ 800329e: bf00 nop
+ 80032a0: 080032c5 .word 0x080032c5
+ 80032a4: 080032e1 .word 0x080032e1
+ 80032a8: 080032fd .word 0x080032fd
+ 80032ac: 08003349 .word 0x08003349
+ 80032b0: 08003315 .word 0x08003315
+ 80032b4: 08003349 .word 0x08003349
+ 80032b8: 08003349 .word 0x08003349
+ 80032bc: 08003349 .word 0x08003349
+ 80032c0: 08003331 .word 0x08003331
+ {
+ case UART_CLOCKSOURCE_PCLK1:
+ usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate));
+ 80032c4: f7fe fc2c bl 8001b20 <HAL_RCC_GetPCLK1Freq>
+ 80032c8: 4602 mov r2, r0
+ 80032ca: 687b ldr r3, [r7, #4]
+ 80032cc: 685b ldr r3, [r3, #4]
+ 80032ce: 085b lsrs r3, r3, #1
+ 80032d0: 441a add r2, r3
+ 80032d2: 687b ldr r3, [r7, #4]
+ 80032d4: 685b ldr r3, [r3, #4]
+ 80032d6: fbb2 f3f3 udiv r3, r2, r3
+ 80032da: b29b uxth r3, r3
+ 80032dc: 61bb str r3, [r7, #24]
+ break;
+ 80032de: e036 b.n 800334e <UART_SetConfig+0x50e>
+ case UART_CLOCKSOURCE_PCLK2:
+ usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate));
+ 80032e0: f7fe fc32 bl 8001b48 <HAL_RCC_GetPCLK2Freq>
+ 80032e4: 4602 mov r2, r0
+ 80032e6: 687b ldr r3, [r7, #4]
+ 80032e8: 685b ldr r3, [r3, #4]
+ 80032ea: 085b lsrs r3, r3, #1
+ 80032ec: 441a add r2, r3
+ 80032ee: 687b ldr r3, [r7, #4]
+ 80032f0: 685b ldr r3, [r3, #4]
+ 80032f2: fbb2 f3f3 udiv r3, r2, r3
+ 80032f6: b29b uxth r3, r3
+ 80032f8: 61bb str r3, [r7, #24]
+ break;
+ 80032fa: e028 b.n 800334e <UART_SetConfig+0x50e>
+ case UART_CLOCKSOURCE_HSI:
+ usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HSI_VALUE, huart->Init.BaudRate));
+ 80032fc: 687b ldr r3, [r7, #4]
+ 80032fe: 685b ldr r3, [r3, #4]
+ 8003300: 085a lsrs r2, r3, #1
+ 8003302: 4b20 ldr r3, [pc, #128] ; (8003384 <UART_SetConfig+0x544>)
+ 8003304: 4413 add r3, r2
+ 8003306: 687a ldr r2, [r7, #4]
+ 8003308: 6852 ldr r2, [r2, #4]
+ 800330a: fbb3 f3f2 udiv r3, r3, r2
+ 800330e: b29b uxth r3, r3
+ 8003310: 61bb str r3, [r7, #24]
+ break;
+ 8003312: e01c b.n 800334e <UART_SetConfig+0x50e>
+ case UART_CLOCKSOURCE_SYSCLK:
+ usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetSysClockFreq(), huart->Init.BaudRate));
+ 8003314: f7fe fb46 bl 80019a4 <HAL_RCC_GetSysClockFreq>
+ 8003318: 4602 mov r2, r0
+ 800331a: 687b ldr r3, [r7, #4]
+ 800331c: 685b ldr r3, [r3, #4]
+ 800331e: 085b lsrs r3, r3, #1
+ 8003320: 441a add r2, r3
+ 8003322: 687b ldr r3, [r7, #4]
+ 8003324: 685b ldr r3, [r3, #4]
+ 8003326: fbb2 f3f3 udiv r3, r2, r3
+ 800332a: b29b uxth r3, r3
+ 800332c: 61bb str r3, [r7, #24]
+ break;
+ 800332e: e00e b.n 800334e <UART_SetConfig+0x50e>
+ case UART_CLOCKSOURCE_LSE:
+ usartdiv = (uint16_t)(UART_DIV_SAMPLING16(LSE_VALUE, huart->Init.BaudRate));
+ 8003330: 687b ldr r3, [r7, #4]
+ 8003332: 685b ldr r3, [r3, #4]
+ 8003334: 085b lsrs r3, r3, #1
+ 8003336: f503 4200 add.w r2, r3, #32768 ; 0x8000
+ 800333a: 687b ldr r3, [r7, #4]
+ 800333c: 685b ldr r3, [r3, #4]
+ 800333e: fbb2 f3f3 udiv r3, r2, r3
+ 8003342: b29b uxth r3, r3
+ 8003344: 61bb str r3, [r7, #24]
+ break;
+ 8003346: e002 b.n 800334e <UART_SetConfig+0x50e>
+ case UART_CLOCKSOURCE_UNDEFINED:
+ default:
+ ret = HAL_ERROR;
+ 8003348: 2301 movs r3, #1
+ 800334a: 75fb strb r3, [r7, #23]
+ break;
+ 800334c: bf00 nop
+ }
+
+ /* USARTDIV must be greater than or equal to 0d16 */
+ if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
+ 800334e: 69bb ldr r3, [r7, #24]
+ 8003350: 2b0f cmp r3, #15
+ 8003352: d908 bls.n 8003366 <UART_SetConfig+0x526>
+ 8003354: 69bb ldr r3, [r7, #24]
+ 8003356: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
+ 800335a: d204 bcs.n 8003366 <UART_SetConfig+0x526>
+ {
+ huart->Instance->BRR = usartdiv;
+ 800335c: 687b ldr r3, [r7, #4]
+ 800335e: 681b ldr r3, [r3, #0]
+ 8003360: 69ba ldr r2, [r7, #24]
+ 8003362: 60da str r2, [r3, #12]
+ 8003364: e001 b.n 800336a <UART_SetConfig+0x52a>
+ }
+ else
+ {
+ ret = HAL_ERROR;
+ 8003366: 2301 movs r3, #1
+ 8003368: 75fb strb r3, [r7, #23]
+ }
+ }
+
+
+ /* Clear ISR function pointers */
+ huart->RxISR = NULL;
+ 800336a: 687b ldr r3, [r7, #4]
+ 800336c: 2200 movs r2, #0
+ 800336e: 661a str r2, [r3, #96] ; 0x60
+ huart->TxISR = NULL;
+ 8003370: 687b ldr r3, [r7, #4]
+ 8003372: 2200 movs r2, #0
+ 8003374: 665a str r2, [r3, #100] ; 0x64
+
+ return ret;
+ 8003376: 7dfb ldrb r3, [r7, #23]
+}
+ 8003378: 4618 mov r0, r3
+ 800337a: 3720 adds r7, #32
+ 800337c: 46bd mov sp, r7
+ 800337e: bd80 pop {r7, pc}
+ 8003380: 01e84800 .word 0x01e84800
+ 8003384: 00f42400 .word 0x00f42400
+
+08003388 <UART_AdvFeatureConfig>:
+ * @brief Configure the UART peripheral advanced features.
+ * @param huart UART handle.
+ * @retval None
+ */
+void UART_AdvFeatureConfig(UART_HandleTypeDef *huart)
+{
+ 8003388: b480 push {r7}
+ 800338a: b083 sub sp, #12
+ 800338c: af00 add r7, sp, #0
+ 800338e: 6078 str r0, [r7, #4]
+ /* Check whether the set of advanced features to configure is properly set */
+ assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit));
+
+ /* if required, configure TX pin active level inversion */
+ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT))
+ 8003390: 687b ldr r3, [r7, #4]
+ 8003392: 6a5b ldr r3, [r3, #36] ; 0x24
+ 8003394: f003 0301 and.w r3, r3, #1
+ 8003398: 2b00 cmp r3, #0
+ 800339a: d00a beq.n 80033b2 <UART_AdvFeatureConfig+0x2a>
+ {
+ assert_param(IS_UART_ADVFEATURE_TXINV(huart->AdvancedInit.TxPinLevelInvert));
+ MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert);
+ 800339c: 687b ldr r3, [r7, #4]
+ 800339e: 681b ldr r3, [r3, #0]
+ 80033a0: 685b ldr r3, [r3, #4]
+ 80033a2: f423 3100 bic.w r1, r3, #131072 ; 0x20000
+ 80033a6: 687b ldr r3, [r7, #4]
+ 80033a8: 6a9a ldr r2, [r3, #40] ; 0x28
+ 80033aa: 687b ldr r3, [r7, #4]
+ 80033ac: 681b ldr r3, [r3, #0]
+ 80033ae: 430a orrs r2, r1
+ 80033b0: 605a str r2, [r3, #4]
+ }
+
+ /* if required, configure RX pin active level inversion */
+ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXINVERT_INIT))
+ 80033b2: 687b ldr r3, [r7, #4]
+ 80033b4: 6a5b ldr r3, [r3, #36] ; 0x24
+ 80033b6: f003 0302 and.w r3, r3, #2
+ 80033ba: 2b00 cmp r3, #0
+ 80033bc: d00a beq.n 80033d4 <UART_AdvFeatureConfig+0x4c>
+ {
+ assert_param(IS_UART_ADVFEATURE_RXINV(huart->AdvancedInit.RxPinLevelInvert));
+ MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert);
+ 80033be: 687b ldr r3, [r7, #4]
+ 80033c0: 681b ldr r3, [r3, #0]
+ 80033c2: 685b ldr r3, [r3, #4]
+ 80033c4: f423 3180 bic.w r1, r3, #65536 ; 0x10000
+ 80033c8: 687b ldr r3, [r7, #4]
+ 80033ca: 6ada ldr r2, [r3, #44] ; 0x2c
+ 80033cc: 687b ldr r3, [r7, #4]
+ 80033ce: 681b ldr r3, [r3, #0]
+ 80033d0: 430a orrs r2, r1
+ 80033d2: 605a str r2, [r3, #4]
+ }
+
+ /* if required, configure data inversion */
+ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DATAINVERT_INIT))
+ 80033d4: 687b ldr r3, [r7, #4]
+ 80033d6: 6a5b ldr r3, [r3, #36] ; 0x24
+ 80033d8: f003 0304 and.w r3, r3, #4
+ 80033dc: 2b00 cmp r3, #0
+ 80033de: d00a beq.n 80033f6 <UART_AdvFeatureConfig+0x6e>
+ {
+ assert_param(IS_UART_ADVFEATURE_DATAINV(huart->AdvancedInit.DataInvert));
+ MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert);
+ 80033e0: 687b ldr r3, [r7, #4]
+ 80033e2: 681b ldr r3, [r3, #0]
+ 80033e4: 685b ldr r3, [r3, #4]
+ 80033e6: f423 2180 bic.w r1, r3, #262144 ; 0x40000
+ 80033ea: 687b ldr r3, [r7, #4]
+ 80033ec: 6b1a ldr r2, [r3, #48] ; 0x30
+ 80033ee: 687b ldr r3, [r7, #4]
+ 80033f0: 681b ldr r3, [r3, #0]
+ 80033f2: 430a orrs r2, r1
+ 80033f4: 605a str r2, [r3, #4]
+ }
+
+ /* if required, configure RX/TX pins swap */
+ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT))
+ 80033f6: 687b ldr r3, [r7, #4]
+ 80033f8: 6a5b ldr r3, [r3, #36] ; 0x24
+ 80033fa: f003 0308 and.w r3, r3, #8
+ 80033fe: 2b00 cmp r3, #0
+ 8003400: d00a beq.n 8003418 <UART_AdvFeatureConfig+0x90>
+ {
+ assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap));
+ MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap);
+ 8003402: 687b ldr r3, [r7, #4]
+ 8003404: 681b ldr r3, [r3, #0]
+ 8003406: 685b ldr r3, [r3, #4]
+ 8003408: f423 4100 bic.w r1, r3, #32768 ; 0x8000
+ 800340c: 687b ldr r3, [r7, #4]
+ 800340e: 6b5a ldr r2, [r3, #52] ; 0x34
+ 8003410: 687b ldr r3, [r7, #4]
+ 8003412: 681b ldr r3, [r3, #0]
+ 8003414: 430a orrs r2, r1
+ 8003416: 605a str r2, [r3, #4]
+ }
+
+ /* if required, configure RX overrun detection disabling */
+ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT))
+ 8003418: 687b ldr r3, [r7, #4]
+ 800341a: 6a5b ldr r3, [r3, #36] ; 0x24
+ 800341c: f003 0310 and.w r3, r3, #16
+ 8003420: 2b00 cmp r3, #0
+ 8003422: d00a beq.n 800343a <UART_AdvFeatureConfig+0xb2>
+ {
+ assert_param(IS_UART_OVERRUN(huart->AdvancedInit.OverrunDisable));
+ MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable);
+ 8003424: 687b ldr r3, [r7, #4]
+ 8003426: 681b ldr r3, [r3, #0]
+ 8003428: 689b ldr r3, [r3, #8]
+ 800342a: f423 5180 bic.w r1, r3, #4096 ; 0x1000
+ 800342e: 687b ldr r3, [r7, #4]
+ 8003430: 6b9a ldr r2, [r3, #56] ; 0x38
+ 8003432: 687b ldr r3, [r7, #4]
+ 8003434: 681b ldr r3, [r3, #0]
+ 8003436: 430a orrs r2, r1
+ 8003438: 609a str r2, [r3, #8]
+ }
+
+ /* if required, configure DMA disabling on reception error */
+ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DMADISABLEONERROR_INIT))
+ 800343a: 687b ldr r3, [r7, #4]
+ 800343c: 6a5b ldr r3, [r3, #36] ; 0x24
+ 800343e: f003 0320 and.w r3, r3, #32
+ 8003442: 2b00 cmp r3, #0
+ 8003444: d00a beq.n 800345c <UART_AdvFeatureConfig+0xd4>
+ {
+ assert_param(IS_UART_ADVFEATURE_DMAONRXERROR(huart->AdvancedInit.DMADisableonRxError));
+ MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError);
+ 8003446: 687b ldr r3, [r7, #4]
+ 8003448: 681b ldr r3, [r3, #0]
+ 800344a: 689b ldr r3, [r3, #8]
+ 800344c: f423 5100 bic.w r1, r3, #8192 ; 0x2000
+ 8003450: 687b ldr r3, [r7, #4]
+ 8003452: 6bda ldr r2, [r3, #60] ; 0x3c
+ 8003454: 687b ldr r3, [r7, #4]
+ 8003456: 681b ldr r3, [r3, #0]
+ 8003458: 430a orrs r2, r1
+ 800345a: 609a str r2, [r3, #8]
+ }
+
+ /* if required, configure auto Baud rate detection scheme */
+ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_AUTOBAUDRATE_INIT))
+ 800345c: 687b ldr r3, [r7, #4]
+ 800345e: 6a5b ldr r3, [r3, #36] ; 0x24
+ 8003460: f003 0340 and.w r3, r3, #64 ; 0x40
+ 8003464: 2b00 cmp r3, #0
+ 8003466: d01a beq.n 800349e <UART_AdvFeatureConfig+0x116>
+ {
+ assert_param(IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(huart->Instance));
+ assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATE(huart->AdvancedInit.AutoBaudRateEnable));
+ MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable);
+ 8003468: 687b ldr r3, [r7, #4]
+ 800346a: 681b ldr r3, [r3, #0]
+ 800346c: 685b ldr r3, [r3, #4]
+ 800346e: f423 1180 bic.w r1, r3, #1048576 ; 0x100000
+ 8003472: 687b ldr r3, [r7, #4]
+ 8003474: 6c1a ldr r2, [r3, #64] ; 0x40
+ 8003476: 687b ldr r3, [r7, #4]
+ 8003478: 681b ldr r3, [r3, #0]
+ 800347a: 430a orrs r2, r1
+ 800347c: 605a str r2, [r3, #4]
+ /* set auto Baudrate detection parameters if detection is enabled */
+ if (huart->AdvancedInit.AutoBaudRateEnable == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)
+ 800347e: 687b ldr r3, [r7, #4]
+ 8003480: 6c1b ldr r3, [r3, #64] ; 0x40
+ 8003482: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000
+ 8003486: d10a bne.n 800349e <UART_AdvFeatureConfig+0x116>
+ {
+ assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(huart->AdvancedInit.AutoBaudRateMode));
+ MODIFY_REG(huart->Instance->CR2, USART_CR2_ABRMODE, huart->AdvancedInit.AutoBaudRateMode);
+ 8003488: 687b ldr r3, [r7, #4]
+ 800348a: 681b ldr r3, [r3, #0]
+ 800348c: 685b ldr r3, [r3, #4]
+ 800348e: f423 01c0 bic.w r1, r3, #6291456 ; 0x600000
+ 8003492: 687b ldr r3, [r7, #4]
+ 8003494: 6c5a ldr r2, [r3, #68] ; 0x44
+ 8003496: 687b ldr r3, [r7, #4]
+ 8003498: 681b ldr r3, [r3, #0]
+ 800349a: 430a orrs r2, r1
+ 800349c: 605a str r2, [r3, #4]
+ }
+ }
+
+ /* if required, configure MSB first on communication line */
+ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_MSBFIRST_INIT))
+ 800349e: 687b ldr r3, [r7, #4]
+ 80034a0: 6a5b ldr r3, [r3, #36] ; 0x24
+ 80034a2: f003 0380 and.w r3, r3, #128 ; 0x80
+ 80034a6: 2b00 cmp r3, #0
+ 80034a8: d00a beq.n 80034c0 <UART_AdvFeatureConfig+0x138>
+ {
+ assert_param(IS_UART_ADVFEATURE_MSBFIRST(huart->AdvancedInit.MSBFirst));
+ MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst);
+ 80034aa: 687b ldr r3, [r7, #4]
+ 80034ac: 681b ldr r3, [r3, #0]
+ 80034ae: 685b ldr r3, [r3, #4]
+ 80034b0: f423 2100 bic.w r1, r3, #524288 ; 0x80000
+ 80034b4: 687b ldr r3, [r7, #4]
+ 80034b6: 6c9a ldr r2, [r3, #72] ; 0x48
+ 80034b8: 687b ldr r3, [r7, #4]
+ 80034ba: 681b ldr r3, [r3, #0]
+ 80034bc: 430a orrs r2, r1
+ 80034be: 605a str r2, [r3, #4]
+ }
+}
+ 80034c0: bf00 nop
+ 80034c2: 370c adds r7, #12
+ 80034c4: 46bd mov sp, r7
+ 80034c6: f85d 7b04 ldr.w r7, [sp], #4
+ 80034ca: 4770 bx lr
+
+080034cc <UART_CheckIdleState>:
+ * @brief Check the UART Idle State.
+ * @param huart UART handle.
+ * @retval HAL status
+ */
+HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart)
+{
+ 80034cc: b580 push {r7, lr}
+ 80034ce: b086 sub sp, #24
+ 80034d0: af02 add r7, sp, #8
+ 80034d2: 6078 str r0, [r7, #4]
+ uint32_t tickstart;
+
+ /* Initialize the UART ErrorCode */
+ huart->ErrorCode = HAL_UART_ERROR_NONE;
+ 80034d4: 687b ldr r3, [r7, #4]
+ 80034d6: 2200 movs r2, #0
+ 80034d8: 67da str r2, [r3, #124] ; 0x7c
+
+ /* Init tickstart for timeout managment*/
+ tickstart = HAL_GetTick();
+ 80034da: f7fd f887 bl 80005ec <HAL_GetTick>
+ 80034de: 60f8 str r0, [r7, #12]
+
+ /* Check if the Transmitter is enabled */
+ if ((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE)
+ 80034e0: 687b ldr r3, [r7, #4]
+ 80034e2: 681b ldr r3, [r3, #0]
+ 80034e4: 681b ldr r3, [r3, #0]
+ 80034e6: f003 0308 and.w r3, r3, #8
+ 80034ea: 2b08 cmp r3, #8
+ 80034ec: d10e bne.n 800350c <UART_CheckIdleState+0x40>
+ {
+ /* Wait until TEACK flag is set */
+ if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
+ 80034ee: f06f 437e mvn.w r3, #4261412864 ; 0xfe000000
+ 80034f2: 9300 str r3, [sp, #0]
+ 80034f4: 68fb ldr r3, [r7, #12]
+ 80034f6: 2200 movs r2, #0
+ 80034f8: f44f 1100 mov.w r1, #2097152 ; 0x200000
+ 80034fc: 6878 ldr r0, [r7, #4]
+ 80034fe: f000 f814 bl 800352a <UART_WaitOnFlagUntilTimeout>
+ 8003502: 4603 mov r3, r0
+ 8003504: 2b00 cmp r3, #0
+ 8003506: d001 beq.n 800350c <UART_CheckIdleState+0x40>
+ {
+ /* Timeout occurred */
+ return HAL_TIMEOUT;
+ 8003508: 2303 movs r3, #3
+ 800350a: e00a b.n 8003522 <UART_CheckIdleState+0x56>
+ }
+ }
+
+ /* Initialize the UART State */
+ huart->gState = HAL_UART_STATE_READY;
+ 800350c: 687b ldr r3, [r7, #4]
+ 800350e: 2220 movs r2, #32
+ 8003510: 675a str r2, [r3, #116] ; 0x74
+ huart->RxState = HAL_UART_STATE_READY;
+ 8003512: 687b ldr r3, [r7, #4]
+ 8003514: 2220 movs r2, #32
+ 8003516: 679a str r2, [r3, #120] ; 0x78
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(huart);
+ 8003518: 687b ldr r3, [r7, #4]
+ 800351a: 2200 movs r2, #0
+ 800351c: f883 2070 strb.w r2, [r3, #112] ; 0x70
+
+ return HAL_OK;
+ 8003520: 2300 movs r3, #0
+}
+ 8003522: 4618 mov r0, r3
+ 8003524: 3710 adds r7, #16
+ 8003526: 46bd mov sp, r7
+ 8003528: bd80 pop {r7, pc}
+
+0800352a <UART_WaitOnFlagUntilTimeout>:
+ * @param Tickstart Tick start value
+ * @param Timeout Timeout duration
+ * @retval HAL status
+ */
+HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout)
+{
+ 800352a: b580 push {r7, lr}
+ 800352c: b084 sub sp, #16
+ 800352e: af00 add r7, sp, #0
+ 8003530: 60f8 str r0, [r7, #12]
+ 8003532: 60b9 str r1, [r7, #8]
+ 8003534: 603b str r3, [r7, #0]
+ 8003536: 4613 mov r3, r2
+ 8003538: 71fb strb r3, [r7, #7]
+ /* Wait until flag is set */
+ while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
+ 800353a: e02a b.n 8003592 <UART_WaitOnFlagUntilTimeout+0x68>
+ {
+ /* Check for the Timeout */
+ if (Timeout != HAL_MAX_DELAY)
+ 800353c: 69bb ldr r3, [r7, #24]
+ 800353e: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff
+ 8003542: d026 beq.n 8003592 <UART_WaitOnFlagUntilTimeout+0x68>
+ {
+ if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
+ 8003544: f7fd f852 bl 80005ec <HAL_GetTick>
+ 8003548: 4602 mov r2, r0
+ 800354a: 683b ldr r3, [r7, #0]
+ 800354c: 1ad3 subs r3, r2, r3
+ 800354e: 69ba ldr r2, [r7, #24]
+ 8003550: 429a cmp r2, r3
+ 8003552: d302 bcc.n 800355a <UART_WaitOnFlagUntilTimeout+0x30>
+ 8003554: 69bb ldr r3, [r7, #24]
+ 8003556: 2b00 cmp r3, #0
+ 8003558: d11b bne.n 8003592 <UART_WaitOnFlagUntilTimeout+0x68>
+ {
+ /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
+ CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
+ 800355a: 68fb ldr r3, [r7, #12]
+ 800355c: 681b ldr r3, [r3, #0]
+ 800355e: 681a ldr r2, [r3, #0]
+ 8003560: 68fb ldr r3, [r7, #12]
+ 8003562: 681b ldr r3, [r3, #0]
+ 8003564: f422 72d0 bic.w r2, r2, #416 ; 0x1a0
+ 8003568: 601a str r2, [r3, #0]
+ CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
+ 800356a: 68fb ldr r3, [r7, #12]
+ 800356c: 681b ldr r3, [r3, #0]
+ 800356e: 689a ldr r2, [r3, #8]
+ 8003570: 68fb ldr r3, [r7, #12]
+ 8003572: 681b ldr r3, [r3, #0]
+ 8003574: f022 0201 bic.w r2, r2, #1
+ 8003578: 609a str r2, [r3, #8]
+
+ huart->gState = HAL_UART_STATE_READY;
+ 800357a: 68fb ldr r3, [r7, #12]
+ 800357c: 2220 movs r2, #32
+ 800357e: 675a str r2, [r3, #116] ; 0x74
+ huart->RxState = HAL_UART_STATE_READY;
+ 8003580: 68fb ldr r3, [r7, #12]
+ 8003582: 2220 movs r2, #32
+ 8003584: 679a str r2, [r3, #120] ; 0x78
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(huart);
+ 8003586: 68fb ldr r3, [r7, #12]
+ 8003588: 2200 movs r2, #0
+ 800358a: f883 2070 strb.w r2, [r3, #112] ; 0x70
+
+ return HAL_TIMEOUT;
+ 800358e: 2303 movs r3, #3
+ 8003590: e00f b.n 80035b2 <UART_WaitOnFlagUntilTimeout+0x88>
+ while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
+ 8003592: 68fb ldr r3, [r7, #12]
+ 8003594: 681b ldr r3, [r3, #0]
+ 8003596: 69da ldr r2, [r3, #28]
+ 8003598: 68bb ldr r3, [r7, #8]
+ 800359a: 4013 ands r3, r2
+ 800359c: 68ba ldr r2, [r7, #8]
+ 800359e: 429a cmp r2, r3
+ 80035a0: bf0c ite eq
+ 80035a2: 2301 moveq r3, #1
+ 80035a4: 2300 movne r3, #0
+ 80035a6: b2db uxtb r3, r3
+ 80035a8: 461a mov r2, r3
+ 80035aa: 79fb ldrb r3, [r7, #7]
+ 80035ac: 429a cmp r2, r3
+ 80035ae: d0c5 beq.n 800353c <UART_WaitOnFlagUntilTimeout+0x12>
+ }
+ }
+ }
+ return HAL_OK;
+ 80035b0: 2300 movs r3, #0
+}
+ 80035b2: 4618 mov r0, r3
+ 80035b4: 3710 adds r7, #16
+ 80035b6: 46bd mov sp, r7
+ 80035b8: bd80 pop {r7, pc}
+
+080035ba <UART_EndTxTransfer>:
+ * @brief End ongoing Tx transfer on UART peripheral (following error detection or Transmit completion).
+ * @param huart UART handle.
+ * @retval None
+ */
+static void UART_EndTxTransfer(UART_HandleTypeDef *huart)
+{
+ 80035ba: b480 push {r7}
+ 80035bc: b083 sub sp, #12
+ 80035be: af00 add r7, sp, #0
+ 80035c0: 6078 str r0, [r7, #4]
+ /* Disable TXEIE and TCIE interrupts */
+ CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
+ 80035c2: 687b ldr r3, [r7, #4]
+ 80035c4: 681b ldr r3, [r3, #0]
+ 80035c6: 681a ldr r2, [r3, #0]
+ 80035c8: 687b ldr r3, [r7, #4]
+ 80035ca: 681b ldr r3, [r3, #0]
+ 80035cc: f022 02c0 bic.w r2, r2, #192 ; 0xc0
+ 80035d0: 601a str r2, [r3, #0]
+
+ /* At end of Tx process, restore huart->gState to Ready */
+ huart->gState = HAL_UART_STATE_READY;
+ 80035d2: 687b ldr r3, [r7, #4]
+ 80035d4: 2220 movs r2, #32
+ 80035d6: 675a str r2, [r3, #116] ; 0x74
+}
+ 80035d8: bf00 nop
+ 80035da: 370c adds r7, #12
+ 80035dc: 46bd mov sp, r7
+ 80035de: f85d 7b04 ldr.w r7, [sp], #4
+ 80035e2: 4770 bx lr
+
+080035e4 <UART_EndRxTransfer>:
+ * @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion).
+ * @param huart UART handle.
+ * @retval None
+ */
+static void UART_EndRxTransfer(UART_HandleTypeDef *huart)
+{
+ 80035e4: b480 push {r7}
+ 80035e6: b083 sub sp, #12
+ 80035e8: af00 add r7, sp, #0
+ 80035ea: 6078 str r0, [r7, #4]
+ /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
+ CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
+ 80035ec: 687b ldr r3, [r7, #4]
+ 80035ee: 681b ldr r3, [r3, #0]
+ 80035f0: 681a ldr r2, [r3, #0]
+ 80035f2: 687b ldr r3, [r7, #4]
+ 80035f4: 681b ldr r3, [r3, #0]
+ 80035f6: f422 7290 bic.w r2, r2, #288 ; 0x120
+ 80035fa: 601a str r2, [r3, #0]
+ CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
+ 80035fc: 687b ldr r3, [r7, #4]
+ 80035fe: 681b ldr r3, [r3, #0]
+ 8003600: 689a ldr r2, [r3, #8]
+ 8003602: 687b ldr r3, [r7, #4]
+ 8003604: 681b ldr r3, [r3, #0]
+ 8003606: f022 0201 bic.w r2, r2, #1
+ 800360a: 609a str r2, [r3, #8]
+
+ /* At end of Rx process, restore huart->RxState to Ready */
+ huart->RxState = HAL_UART_STATE_READY;
+ 800360c: 687b ldr r3, [r7, #4]
+ 800360e: 2220 movs r2, #32
+ 8003610: 679a str r2, [r3, #120] ; 0x78
+
+ /* Reset RxIsr function pointer */
+ huart->RxISR = NULL;
+ 8003612: 687b ldr r3, [r7, #4]
+ 8003614: 2200 movs r2, #0
+ 8003616: 661a str r2, [r3, #96] ; 0x60
+}
+ 8003618: bf00 nop
+ 800361a: 370c adds r7, #12
+ 800361c: 46bd mov sp, r7
+ 800361e: f85d 7b04 ldr.w r7, [sp], #4
+ 8003622: 4770 bx lr
+
+08003624 <UART_DMATransmitCplt>:
+ * @brief DMA UART transmit process complete callback.
+ * @param hdma DMA handle.
+ * @retval None
+ */
+static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma)
+{
+ 8003624: b580 push {r7, lr}
+ 8003626: b084 sub sp, #16
+ 8003628: af00 add r7, sp, #0
+ 800362a: 6078 str r0, [r7, #4]
+ UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
+ 800362c: 687b ldr r3, [r7, #4]
+ 800362e: 6b9b ldr r3, [r3, #56] ; 0x38
+ 8003630: 60fb str r3, [r7, #12]
+
+ /* DMA Normal mode */
+ if (hdma->Init.Mode != DMA_CIRCULAR)
+ 8003632: 687b ldr r3, [r7, #4]
+ 8003634: 69db ldr r3, [r3, #28]
+ 8003636: f5b3 7f80 cmp.w r3, #256 ; 0x100
+ 800363a: d014 beq.n 8003666 <UART_DMATransmitCplt+0x42>
+ {
+ huart->TxXferCount = 0U;
+ 800363c: 68fb ldr r3, [r7, #12]
+ 800363e: 2200 movs r2, #0
+ 8003640: f8a3 2052 strh.w r2, [r3, #82] ; 0x52
+
+ /* Disable the DMA transfer for transmit request by resetting the DMAT bit
+ in the UART CR3 register */
+ CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
+ 8003644: 68fb ldr r3, [r7, #12]
+ 8003646: 681b ldr r3, [r3, #0]
+ 8003648: 689a ldr r2, [r3, #8]
+ 800364a: 68fb ldr r3, [r7, #12]
+ 800364c: 681b ldr r3, [r3, #0]
+ 800364e: f022 0280 bic.w r2, r2, #128 ; 0x80
+ 8003652: 609a str r2, [r3, #8]
+
+ /* Enable the UART Transmit Complete Interrupt */
+ SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
+ 8003654: 68fb ldr r3, [r7, #12]
+ 8003656: 681b ldr r3, [r3, #0]
+ 8003658: 681a ldr r2, [r3, #0]
+ 800365a: 68fb ldr r3, [r7, #12]
+ 800365c: 681b ldr r3, [r3, #0]
+ 800365e: f042 0240 orr.w r2, r2, #64 ; 0x40
+ 8003662: 601a str r2, [r3, #0]
+#else
+ /*Call legacy weak Tx complete callback*/
+ HAL_UART_TxCpltCallback(huart);
+#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
+ }
+}
+ 8003664: e002 b.n 800366c <UART_DMATransmitCplt+0x48>
+ HAL_UART_TxCpltCallback(huart);
+ 8003666: 68f8 ldr r0, [r7, #12]
+ 8003668: f7ff fbb8 bl 8002ddc <HAL_UART_TxCpltCallback>
+}
+ 800366c: bf00 nop
+ 800366e: 3710 adds r7, #16
+ 8003670: 46bd mov sp, r7
+ 8003672: bd80 pop {r7, pc}
+
+08003674 <UART_DMATxHalfCplt>:
+ * @brief DMA UART transmit process half complete callback.
+ * @param hdma DMA handle.
+ * @retval None
+ */
+static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
+{
+ 8003674: b580 push {r7, lr}
+ 8003676: b084 sub sp, #16
+ 8003678: af00 add r7, sp, #0
+ 800367a: 6078 str r0, [r7, #4]
+ UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
+ 800367c: 687b ldr r3, [r7, #4]
+ 800367e: 6b9b ldr r3, [r3, #56] ; 0x38
+ 8003680: 60fb str r3, [r7, #12]
+#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
+ /*Call registered Tx Half complete callback*/
+ huart->TxHalfCpltCallback(huart);
+#else
+ /*Call legacy weak Tx Half complete callback*/
+ HAL_UART_TxHalfCpltCallback(huart);
+ 8003682: 68f8 ldr r0, [r7, #12]
+ 8003684: f7ff fbb4 bl 8002df0 <HAL_UART_TxHalfCpltCallback>
+#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
+}
+ 8003688: bf00 nop
+ 800368a: 3710 adds r7, #16
+ 800368c: 46bd mov sp, r7
+ 800368e: bd80 pop {r7, pc}
+
+08003690 <UART_DMAReceiveCplt>:
+ * @brief DMA UART receive process complete callback.
+ * @param hdma DMA handle.
+ * @retval None
+ */
+static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
+{
+ 8003690: b580 push {r7, lr}
+ 8003692: b084 sub sp, #16
+ 8003694: af00 add r7, sp, #0
+ 8003696: 6078 str r0, [r7, #4]
+ UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
+ 8003698: 687b ldr r3, [r7, #4]
+ 800369a: 6b9b ldr r3, [r3, #56] ; 0x38
+ 800369c: 60fb str r3, [r7, #12]
+
+ /* DMA Normal mode */
+ if (hdma->Init.Mode != DMA_CIRCULAR)
+ 800369e: 687b ldr r3, [r7, #4]
+ 80036a0: 69db ldr r3, [r3, #28]
+ 80036a2: f5b3 7f80 cmp.w r3, #256 ; 0x100
+ 80036a6: d01e beq.n 80036e6 <UART_DMAReceiveCplt+0x56>
+ {
+ huart->RxXferCount = 0U;
+ 80036a8: 68fb ldr r3, [r7, #12]
+ 80036aa: 2200 movs r2, #0
+ 80036ac: f8a3 205a strh.w r2, [r3, #90] ; 0x5a
+
+ /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
+ CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
+ 80036b0: 68fb ldr r3, [r7, #12]
+ 80036b2: 681b ldr r3, [r3, #0]
+ 80036b4: 681a ldr r2, [r3, #0]
+ 80036b6: 68fb ldr r3, [r7, #12]
+ 80036b8: 681b ldr r3, [r3, #0]
+ 80036ba: f422 7280 bic.w r2, r2, #256 ; 0x100
+ 80036be: 601a str r2, [r3, #0]
+ CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
+ 80036c0: 68fb ldr r3, [r7, #12]
+ 80036c2: 681b ldr r3, [r3, #0]
+ 80036c4: 689a ldr r2, [r3, #8]
+ 80036c6: 68fb ldr r3, [r7, #12]
+ 80036c8: 681b ldr r3, [r3, #0]
+ 80036ca: f022 0201 bic.w r2, r2, #1
+ 80036ce: 609a str r2, [r3, #8]
+
+ /* Disable the DMA transfer for the receiver request by resetting the DMAR bit
+ in the UART CR3 register */
+ CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
+ 80036d0: 68fb ldr r3, [r7, #12]
+ 80036d2: 681b ldr r3, [r3, #0]
+ 80036d4: 689a ldr r2, [r3, #8]
+ 80036d6: 68fb ldr r3, [r7, #12]
+ 80036d8: 681b ldr r3, [r3, #0]
+ 80036da: f022 0240 bic.w r2, r2, #64 ; 0x40
+ 80036de: 609a str r2, [r3, #8]
+
+ /* At end of Rx process, restore huart->RxState to Ready */
+ huart->RxState = HAL_UART_STATE_READY;
+ 80036e0: 68fb ldr r3, [r7, #12]
+ 80036e2: 2220 movs r2, #32
+ 80036e4: 679a str r2, [r3, #120] ; 0x78
+#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
+ /*Call registered Rx complete callback*/
+ huart->RxCpltCallback(huart);
+#else
+ /*Call legacy weak Rx complete callback*/
+ HAL_UART_RxCpltCallback(huart);
+ 80036e6: 68f8 ldr r0, [r7, #12]
+ 80036e8: f7ff fb8c bl 8002e04 <HAL_UART_RxCpltCallback>
+#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
+}
+ 80036ec: bf00 nop
+ 80036ee: 3710 adds r7, #16
+ 80036f0: 46bd mov sp, r7
+ 80036f2: bd80 pop {r7, pc}
+
+080036f4 <UART_DMARxHalfCplt>:
+ * @brief DMA UART receive process half complete callback.
+ * @param hdma DMA handle.
+ * @retval None
+ */
+static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
+{
+ 80036f4: b580 push {r7, lr}
+ 80036f6: b084 sub sp, #16
+ 80036f8: af00 add r7, sp, #0
+ 80036fa: 6078 str r0, [r7, #4]
+ UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
+ 80036fc: 687b ldr r3, [r7, #4]
+ 80036fe: 6b9b ldr r3, [r3, #56] ; 0x38
+ 8003700: 60fb str r3, [r7, #12]
+#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
+ /*Call registered Rx Half complete callback*/
+ huart->RxHalfCpltCallback(huart);
+#else
+ /*Call legacy weak Rx Half complete callback*/
+ HAL_UART_RxHalfCpltCallback(huart);
+ 8003702: 68f8 ldr r0, [r7, #12]
+ 8003704: f7ff fb88 bl 8002e18 <HAL_UART_RxHalfCpltCallback>
+#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
+}
+ 8003708: bf00 nop
+ 800370a: 3710 adds r7, #16
+ 800370c: 46bd mov sp, r7
+ 800370e: bd80 pop {r7, pc}
+
+08003710 <UART_DMAError>:
+ * @brief DMA UART communication error callback.
+ * @param hdma DMA handle.
+ * @retval None
+ */
+static void UART_DMAError(DMA_HandleTypeDef *hdma)
+{
+ 8003710: b580 push {r7, lr}
+ 8003712: b086 sub sp, #24
+ 8003714: af00 add r7, sp, #0
+ 8003716: 6078 str r0, [r7, #4]
+ UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
+ 8003718: 687b ldr r3, [r7, #4]
+ 800371a: 6b9b ldr r3, [r3, #56] ; 0x38
+ 800371c: 617b str r3, [r7, #20]
+
+ const HAL_UART_StateTypeDef gstate = huart->gState;
+ 800371e: 697b ldr r3, [r7, #20]
+ 8003720: 6f5b ldr r3, [r3, #116] ; 0x74
+ 8003722: 613b str r3, [r7, #16]
+ const HAL_UART_StateTypeDef rxstate = huart->RxState;
+ 8003724: 697b ldr r3, [r7, #20]
+ 8003726: 6f9b ldr r3, [r3, #120] ; 0x78
+ 8003728: 60fb str r3, [r7, #12]
+
+ /* Stop UART DMA Tx request if ongoing */
+ if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) &&
+ 800372a: 697b ldr r3, [r7, #20]
+ 800372c: 681b ldr r3, [r3, #0]
+ 800372e: 689b ldr r3, [r3, #8]
+ 8003730: f003 0380 and.w r3, r3, #128 ; 0x80
+ 8003734: 2b80 cmp r3, #128 ; 0x80
+ 8003736: d109 bne.n 800374c <UART_DMAError+0x3c>
+ 8003738: 693b ldr r3, [r7, #16]
+ 800373a: 2b21 cmp r3, #33 ; 0x21
+ 800373c: d106 bne.n 800374c <UART_DMAError+0x3c>
+ (gstate == HAL_UART_STATE_BUSY_TX))
+ {
+ huart->TxXferCount = 0U;
+ 800373e: 697b ldr r3, [r7, #20]
+ 8003740: 2200 movs r2, #0
+ 8003742: f8a3 2052 strh.w r2, [r3, #82] ; 0x52
+ UART_EndTxTransfer(huart);
+ 8003746: 6978 ldr r0, [r7, #20]
+ 8003748: f7ff ff37 bl 80035ba <UART_EndTxTransfer>
+ }
+
+ /* Stop UART DMA Rx request if ongoing */
+ if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) &&
+ 800374c: 697b ldr r3, [r7, #20]
+ 800374e: 681b ldr r3, [r3, #0]
+ 8003750: 689b ldr r3, [r3, #8]
+ 8003752: f003 0340 and.w r3, r3, #64 ; 0x40
+ 8003756: 2b40 cmp r3, #64 ; 0x40
+ 8003758: d109 bne.n 800376e <UART_DMAError+0x5e>
+ 800375a: 68fb ldr r3, [r7, #12]
+ 800375c: 2b22 cmp r3, #34 ; 0x22
+ 800375e: d106 bne.n 800376e <UART_DMAError+0x5e>
+ (rxstate == HAL_UART_STATE_BUSY_RX))
+ {
+ huart->RxXferCount = 0U;
+ 8003760: 697b ldr r3, [r7, #20]
+ 8003762: 2200 movs r2, #0
+ 8003764: f8a3 205a strh.w r2, [r3, #90] ; 0x5a
+ UART_EndRxTransfer(huart);
+ 8003768: 6978 ldr r0, [r7, #20]
+ 800376a: f7ff ff3b bl 80035e4 <UART_EndRxTransfer>
+ }
+
+ huart->ErrorCode |= HAL_UART_ERROR_DMA;
+ 800376e: 697b ldr r3, [r7, #20]
+ 8003770: 6fdb ldr r3, [r3, #124] ; 0x7c
+ 8003772: f043 0210 orr.w r2, r3, #16
+ 8003776: 697b ldr r3, [r7, #20]
+ 8003778: 67da str r2, [r3, #124] ; 0x7c
+#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
+ /*Call registered error callback*/
+ huart->ErrorCallback(huart);
+#else
+ /*Call legacy weak error callback*/
+ HAL_UART_ErrorCallback(huart);
+ 800377a: 6978 ldr r0, [r7, #20]
+ 800377c: f7ff fb56 bl 8002e2c <HAL_UART_ErrorCallback>
+#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
+}
+ 8003780: bf00 nop
+ 8003782: 3718 adds r7, #24
+ 8003784: 46bd mov sp, r7
+ 8003786: bd80 pop {r7, pc}
+
+08003788 <UART_DMAAbortOnError>:
+ * (To be called at end of DMA Abort procedure following error occurrence).
+ * @param hdma DMA handle.
+ * @retval None
+ */
+static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma)
+{
+ 8003788: b580 push {r7, lr}
+ 800378a: b084 sub sp, #16
+ 800378c: af00 add r7, sp, #0
+ 800378e: 6078 str r0, [r7, #4]
+ UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
+ 8003790: 687b ldr r3, [r7, #4]
+ 8003792: 6b9b ldr r3, [r3, #56] ; 0x38
+ 8003794: 60fb str r3, [r7, #12]
+ huart->RxXferCount = 0U;
+ 8003796: 68fb ldr r3, [r7, #12]
+ 8003798: 2200 movs r2, #0
+ 800379a: f8a3 205a strh.w r2, [r3, #90] ; 0x5a
+ huart->TxXferCount = 0U;
+ 800379e: 68fb ldr r3, [r7, #12]
+ 80037a0: 2200 movs r2, #0
+ 80037a2: f8a3 2052 strh.w r2, [r3, #82] ; 0x52
+#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
+ /*Call registered error callback*/
+ huart->ErrorCallback(huart);
+#else
+ /*Call legacy weak error callback*/
+ HAL_UART_ErrorCallback(huart);
+ 80037a6: 68f8 ldr r0, [r7, #12]
+ 80037a8: f7ff fb40 bl 8002e2c <HAL_UART_ErrorCallback>
+#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
+}
+ 80037ac: bf00 nop
+ 80037ae: 3710 adds r7, #16
+ 80037b0: 46bd mov sp, r7
+ 80037b2: bd80 pop {r7, pc}
+
+080037b4 <UART_EndTransmit_IT>:
+ * @param huart pointer to a UART_HandleTypeDef structure that contains
+ * the configuration information for the specified UART module.
+ * @retval None
+ */
+static void UART_EndTransmit_IT(UART_HandleTypeDef *huart)
+{
+ 80037b4: b580 push {r7, lr}
+ 80037b6: b082 sub sp, #8
+ 80037b8: af00 add r7, sp, #0
+ 80037ba: 6078 str r0, [r7, #4]
+ /* Disable the UART Transmit Complete Interrupt */
+ CLEAR_BIT(huart->Instance->CR1, USART_CR1_TCIE);
+ 80037bc: 687b ldr r3, [r7, #4]
+ 80037be: 681b ldr r3, [r3, #0]
+ 80037c0: 681a ldr r2, [r3, #0]
+ 80037c2: 687b ldr r3, [r7, #4]
+ 80037c4: 681b ldr r3, [r3, #0]
+ 80037c6: f022 0240 bic.w r2, r2, #64 ; 0x40
+ 80037ca: 601a str r2, [r3, #0]
+
+ /* Tx process is ended, restore huart->gState to Ready */
+ huart->gState = HAL_UART_STATE_READY;
+ 80037cc: 687b ldr r3, [r7, #4]
+ 80037ce: 2220 movs r2, #32
+ 80037d0: 675a str r2, [r3, #116] ; 0x74
+
+ /* Cleat TxISR function pointer */
+ huart->TxISR = NULL;
+ 80037d2: 687b ldr r3, [r7, #4]
+ 80037d4: 2200 movs r2, #0
+ 80037d6: 665a str r2, [r3, #100] ; 0x64
+#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
+ /*Call registered Tx complete callback*/
+ huart->TxCpltCallback(huart);
+#else
+ /*Call legacy weak Tx complete callback*/
+ HAL_UART_TxCpltCallback(huart);
+ 80037d8: 6878 ldr r0, [r7, #4]
+ 80037da: f7ff faff bl 8002ddc <HAL_UART_TxCpltCallback>
+#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
+}
+ 80037de: bf00 nop
+ 80037e0: 3708 adds r7, #8
+ 80037e2: 46bd mov sp, r7
+ 80037e4: bd80 pop {r7, pc}
+ ...
+
+080037e8 <_ZN3ros3MsgC1Ev>:
+
+namespace ros
+{
+
+/* Base Message Type */
+class Msg
+ 80037e8: b480 push {r7}
+ 80037ea: b083 sub sp, #12
+ 80037ec: af00 add r7, sp, #0
+ 80037ee: 6078 str r0, [r7, #4]
+ 80037f0: 4a04 ldr r2, [pc, #16] ; (8003804 <_ZN3ros3MsgC1Ev+0x1c>)
+ 80037f2: 687b ldr r3, [r7, #4]
+ 80037f4: 601a str r2, [r3, #0]
+ 80037f6: 687b ldr r3, [r7, #4]
+ 80037f8: 4618 mov r0, r3
+ 80037fa: 370c adds r7, #12
+ 80037fc: 46bd mov sp, r7
+ 80037fe: f85d 7b04 ldr.w r7, [sp], #4
+ 8003802: 4770 bx lr
+ 8003804: 08006000 .word 0x08006000
+
+08003808 <_ZN8std_msgs6StringC1Ev>:
+ {
+ public:
+ typedef const char* _data_type;
+ _data_type data;
+
+ String():
+ 8003808: b580 push {r7, lr}
+ 800380a: b082 sub sp, #8
+ 800380c: af00 add r7, sp, #0
+ 800380e: 6078 str r0, [r7, #4]
+ data("")
+ 8003810: 687b ldr r3, [r7, #4]
+ 8003812: 4618 mov r0, r3
+ 8003814: f7ff ffe8 bl 80037e8 <_ZN3ros3MsgC1Ev>
+ 8003818: 4a05 ldr r2, [pc, #20] ; (8003830 <_ZN8std_msgs6StringC1Ev+0x28>)
+ 800381a: 687b ldr r3, [r7, #4]
+ 800381c: 601a str r2, [r3, #0]
+ 800381e: 687b ldr r3, [r7, #4]
+ 8003820: 4a04 ldr r2, [pc, #16] ; (8003834 <_ZN8std_msgs6StringC1Ev+0x2c>)
+ 8003822: 605a str r2, [r3, #4]
+ {
+ }
+ 8003824: 687b ldr r3, [r7, #4]
+ 8003826: 4618 mov r0, r3
+ 8003828: 3708 adds r7, #8
+ 800382a: 46bd mov sp, r7
+ 800382c: bd80 pop {r7, pc}
+ 800382e: bf00 nop
+ 8003830: 08005fe8 .word 0x08005fe8
+ 8003834: 08005dd8 .word 0x08005dd8
+
+08003838 <_ZNK8std_msgs6String9serializeEPh>:
+
+ virtual int serialize(unsigned char *outbuffer) const
+ 8003838: b580 push {r7, lr}
+ 800383a: b084 sub sp, #16
+ 800383c: af00 add r7, sp, #0
+ 800383e: 6078 str r0, [r7, #4]
+ 8003840: 6039 str r1, [r7, #0]
+ {
+ int offset = 0;
+ 8003842: 2300 movs r3, #0
+ 8003844: 60fb str r3, [r7, #12]
+ uint32_t length_data = strlen(this->data);
+ 8003846: 687b ldr r3, [r7, #4]
+ 8003848: 685b ldr r3, [r3, #4]
+ 800384a: 4618 mov r0, r3
+ 800384c: f7fc fcf4 bl 8000238 <strlen>
+ 8003850: 60b8 str r0, [r7, #8]
+ varToArr(outbuffer + offset, length_data);
+ 8003852: 68fb ldr r3, [r7, #12]
+ 8003854: 683a ldr r2, [r7, #0]
+ 8003856: 4413 add r3, r2
+ 8003858: 68b9 ldr r1, [r7, #8]
+ 800385a: 4618 mov r0, r3
+ 800385c: f001 f9bb bl 8004bd6 <_ZN3ros3Msg8varToArrIPhmEEvT_T0_>
+ offset += 4;
+ 8003860: 68fb ldr r3, [r7, #12]
+ 8003862: 3304 adds r3, #4
+ 8003864: 60fb str r3, [r7, #12]
+ memcpy(outbuffer + offset, this->data, length_data);
+ 8003866: 68fb ldr r3, [r7, #12]
+ 8003868: 683a ldr r2, [r7, #0]
+ 800386a: 18d0 adds r0, r2, r3
+ 800386c: 687b ldr r3, [r7, #4]
+ 800386e: 685b ldr r3, [r3, #4]
+ 8003870: 68ba ldr r2, [r7, #8]
+ 8003872: 4619 mov r1, r3
+ 8003874: f002 f95c bl 8005b30 <memcpy>
+ offset += length_data;
+ 8003878: 68fa ldr r2, [r7, #12]
+ 800387a: 68bb ldr r3, [r7, #8]
+ 800387c: 4413 add r3, r2
+ 800387e: 60fb str r3, [r7, #12]
+ return offset;
+ 8003880: 68fb ldr r3, [r7, #12]
+ }
+ 8003882: 4618 mov r0, r3
+ 8003884: 3710 adds r7, #16
+ 8003886: 46bd mov sp, r7
+ 8003888: bd80 pop {r7, pc}
+
+0800388a <_ZN8std_msgs6String11deserializeEPh>:
+
+ virtual int deserialize(unsigned char *inbuffer)
+ 800388a: b580 push {r7, lr}
+ 800388c: b086 sub sp, #24
+ 800388e: af00 add r7, sp, #0
+ 8003890: 6078 str r0, [r7, #4]
+ 8003892: 6039 str r1, [r7, #0]
+ {
+ int offset = 0;
+ 8003894: 2300 movs r3, #0
+ 8003896: 613b str r3, [r7, #16]
+ uint32_t length_data;
+ arrToVar(length_data, (inbuffer + offset));
+ 8003898: 693b ldr r3, [r7, #16]
+ 800389a: 683a ldr r2, [r7, #0]
+ 800389c: 441a add r2, r3
+ 800389e: f107 030c add.w r3, r7, #12
+ 80038a2: 4611 mov r1, r2
+ 80038a4: 4618 mov r0, r3
+ 80038a6: f001 f9b4 bl 8004c12 <_ZN3ros3Msg8arrToVarImPhEEvRT_T0_>
+ offset += 4;
+ 80038aa: 693b ldr r3, [r7, #16]
+ 80038ac: 3304 adds r3, #4
+ 80038ae: 613b str r3, [r7, #16]
+ for(unsigned int k= offset; k< offset+length_data; ++k){
+ 80038b0: 693b ldr r3, [r7, #16]
+ 80038b2: 617b str r3, [r7, #20]
+ 80038b4: 693a ldr r2, [r7, #16]
+ 80038b6: 68fb ldr r3, [r7, #12]
+ 80038b8: 4413 add r3, r2
+ 80038ba: 697a ldr r2, [r7, #20]
+ 80038bc: 429a cmp r2, r3
+ 80038be: d20c bcs.n 80038da <_ZN8std_msgs6String11deserializeEPh+0x50>
+ inbuffer[k-1]=inbuffer[k];
+ 80038c0: 683a ldr r2, [r7, #0]
+ 80038c2: 697b ldr r3, [r7, #20]
+ 80038c4: 441a add r2, r3
+ 80038c6: 697b ldr r3, [r7, #20]
+ 80038c8: 3b01 subs r3, #1
+ 80038ca: 6839 ldr r1, [r7, #0]
+ 80038cc: 440b add r3, r1
+ 80038ce: 7812 ldrb r2, [r2, #0]
+ 80038d0: 701a strb r2, [r3, #0]
+ for(unsigned int k= offset; k< offset+length_data; ++k){
+ 80038d2: 697b ldr r3, [r7, #20]
+ 80038d4: 3301 adds r3, #1
+ 80038d6: 617b str r3, [r7, #20]
+ 80038d8: e7ec b.n 80038b4 <_ZN8std_msgs6String11deserializeEPh+0x2a>
+ }
+ inbuffer[offset+length_data-1]=0;
+ 80038da: 693a ldr r2, [r7, #16]
+ 80038dc: 68fb ldr r3, [r7, #12]
+ 80038de: 4413 add r3, r2
+ 80038e0: 3b01 subs r3, #1
+ 80038e2: 683a ldr r2, [r7, #0]
+ 80038e4: 4413 add r3, r2
+ 80038e6: 2200 movs r2, #0
+ 80038e8: 701a strb r2, [r3, #0]
+ this->data = (char *)(inbuffer + offset-1);
+ 80038ea: 693b ldr r3, [r7, #16]
+ 80038ec: 3b01 subs r3, #1
+ 80038ee: 683a ldr r2, [r7, #0]
+ 80038f0: 441a add r2, r3
+ 80038f2: 687b ldr r3, [r7, #4]
+ 80038f4: 605a str r2, [r3, #4]
+ offset += length_data;
+ 80038f6: 693a ldr r2, [r7, #16]
+ 80038f8: 68fb ldr r3, [r7, #12]
+ 80038fa: 4413 add r3, r2
+ 80038fc: 613b str r3, [r7, #16]
+ return offset;
+ 80038fe: 693b ldr r3, [r7, #16]
+ }
+ 8003900: 4618 mov r0, r3
+ 8003902: 3718 adds r7, #24
+ 8003904: 46bd mov sp, r7
+ 8003906: bd80 pop {r7, pc}
+
+08003908 <_ZN8std_msgs6String7getTypeEv>:
+
+ const char * getType(){ return "std_msgs/String"; };
+ 8003908: b480 push {r7}
+ 800390a: b083 sub sp, #12
+ 800390c: af00 add r7, sp, #0
+ 800390e: 6078 str r0, [r7, #4]
+ 8003910: 4b03 ldr r3, [pc, #12] ; (8003920 <_ZN8std_msgs6String7getTypeEv+0x18>)
+ 8003912: 4618 mov r0, r3
+ 8003914: 370c adds r7, #12
+ 8003916: 46bd mov sp, r7
+ 8003918: f85d 7b04 ldr.w r7, [sp], #4
+ 800391c: 4770 bx lr
+ 800391e: bf00 nop
+ 8003920: 08005ddc .word 0x08005ddc
+
+08003924 <_ZN8std_msgs6String6getMD5Ev>:
+ const char * getMD5(){ return "992ce8a1687cec8c8bd883ec73ca41d1"; };
+ 8003924: b480 push {r7}
+ 8003926: b083 sub sp, #12
+ 8003928: af00 add r7, sp, #0
+ 800392a: 6078 str r0, [r7, #4]
+ 800392c: 4b03 ldr r3, [pc, #12] ; (800393c <_ZN8std_msgs6String6getMD5Ev+0x18>)
+ 800392e: 4618 mov r0, r3
+ 8003930: 370c adds r7, #12
+ 8003932: 46bd mov sp, r7
+ 8003934: f85d 7b04 ldr.w r7, [sp], #4
+ 8003938: 4770 bx lr
+ 800393a: bf00 nop
+ 800393c: 08005dec .word 0x08005dec
+
+08003940 <_ZN3ros4TimeC1Ev>:
+class Time
+{
+public:
+ uint32_t sec, nsec;
+
+ Time() : sec(0), nsec(0) {}
+ 8003940: b480 push {r7}
+ 8003942: b083 sub sp, #12
+ 8003944: af00 add r7, sp, #0
+ 8003946: 6078 str r0, [r7, #4]
+ 8003948: 687b ldr r3, [r7, #4]
+ 800394a: 2200 movs r2, #0
+ 800394c: 601a str r2, [r3, #0]
+ 800394e: 687b ldr r3, [r7, #4]
+ 8003950: 2200 movs r2, #0
+ 8003952: 605a str r2, [r3, #4]
+ 8003954: 687b ldr r3, [r7, #4]
+ 8003956: 4618 mov r0, r3
+ 8003958: 370c adds r7, #12
+ 800395a: 46bd mov sp, r7
+ 800395c: f85d 7b04 ldr.w r7, [sp], #4
+ 8003960: 4770 bx lr
+ ...
+
+08003964 <_ZN8std_msgs4TimeC1Ev>:
+ {
+ public:
+ typedef ros::Time _data_type;
+ _data_type data;
+
+ Time():
+ 8003964: b580 push {r7, lr}
+ 8003966: b082 sub sp, #8
+ 8003968: af00 add r7, sp, #0
+ 800396a: 6078 str r0, [r7, #4]
+ data()
+ 800396c: 687b ldr r3, [r7, #4]
+ 800396e: 4618 mov r0, r3
+ 8003970: f7ff ff3a bl 80037e8 <_ZN3ros3MsgC1Ev>
+ 8003974: 4a06 ldr r2, [pc, #24] ; (8003990 <_ZN8std_msgs4TimeC1Ev+0x2c>)
+ 8003976: 687b ldr r3, [r7, #4]
+ 8003978: 601a str r2, [r3, #0]
+ 800397a: 687b ldr r3, [r7, #4]
+ 800397c: 3304 adds r3, #4
+ 800397e: 4618 mov r0, r3
+ 8003980: f7ff ffde bl 8003940 <_ZN3ros4TimeC1Ev>
+ {
+ }
+ 8003984: 687b ldr r3, [r7, #4]
+ 8003986: 4618 mov r0, r3
+ 8003988: 3708 adds r7, #8
+ 800398a: 46bd mov sp, r7
+ 800398c: bd80 pop {r7, pc}
+ 800398e: bf00 nop
+ 8003990: 08005fd0 .word 0x08005fd0
+
+08003994 <_ZNK8std_msgs4Time9serializeEPh>:
+
+ virtual int serialize(unsigned char *outbuffer) const
+ 8003994: b480 push {r7}
+ 8003996: b085 sub sp, #20
+ 8003998: af00 add r7, sp, #0
+ 800399a: 6078 str r0, [r7, #4]
+ 800399c: 6039 str r1, [r7, #0]
+ {
+ int offset = 0;
+ 800399e: 2300 movs r3, #0
+ 80039a0: 60fb str r3, [r7, #12]
+ *(outbuffer + offset + 0) = (this->data.sec >> (8 * 0)) & 0xFF;
+ 80039a2: 687b ldr r3, [r7, #4]
+ 80039a4: 6859 ldr r1, [r3, #4]
+ 80039a6: 68fb ldr r3, [r7, #12]
+ 80039a8: 683a ldr r2, [r7, #0]
+ 80039aa: 4413 add r3, r2
+ 80039ac: b2ca uxtb r2, r1
+ 80039ae: 701a strb r2, [r3, #0]
+ *(outbuffer + offset + 1) = (this->data.sec >> (8 * 1)) & 0xFF;
+ 80039b0: 687b ldr r3, [r7, #4]
+ 80039b2: 685b ldr r3, [r3, #4]
+ 80039b4: 0a19 lsrs r1, r3, #8
+ 80039b6: 68fb ldr r3, [r7, #12]
+ 80039b8: 3301 adds r3, #1
+ 80039ba: 683a ldr r2, [r7, #0]
+ 80039bc: 4413 add r3, r2
+ 80039be: b2ca uxtb r2, r1
+ 80039c0: 701a strb r2, [r3, #0]
+ *(outbuffer + offset + 2) = (this->data.sec >> (8 * 2)) & 0xFF;
+ 80039c2: 687b ldr r3, [r7, #4]
+ 80039c4: 685b ldr r3, [r3, #4]
+ 80039c6: 0c19 lsrs r1, r3, #16
+ 80039c8: 68fb ldr r3, [r7, #12]
+ 80039ca: 3302 adds r3, #2
+ 80039cc: 683a ldr r2, [r7, #0]
+ 80039ce: 4413 add r3, r2
+ 80039d0: b2ca uxtb r2, r1
+ 80039d2: 701a strb r2, [r3, #0]
+ *(outbuffer + offset + 3) = (this->data.sec >> (8 * 3)) & 0xFF;
+ 80039d4: 687b ldr r3, [r7, #4]
+ 80039d6: 685b ldr r3, [r3, #4]
+ 80039d8: 0e19 lsrs r1, r3, #24
+ 80039da: 68fb ldr r3, [r7, #12]
+ 80039dc: 3303 adds r3, #3
+ 80039de: 683a ldr r2, [r7, #0]
+ 80039e0: 4413 add r3, r2
+ 80039e2: b2ca uxtb r2, r1
+ 80039e4: 701a strb r2, [r3, #0]
+ offset += sizeof(this->data.sec);
+ 80039e6: 68fb ldr r3, [r7, #12]
+ 80039e8: 3304 adds r3, #4
+ 80039ea: 60fb str r3, [r7, #12]
+ *(outbuffer + offset + 0) = (this->data.nsec >> (8 * 0)) & 0xFF;
+ 80039ec: 687b ldr r3, [r7, #4]
+ 80039ee: 6899 ldr r1, [r3, #8]
+ 80039f0: 68fb ldr r3, [r7, #12]
+ 80039f2: 683a ldr r2, [r7, #0]
+ 80039f4: 4413 add r3, r2
+ 80039f6: b2ca uxtb r2, r1
+ 80039f8: 701a strb r2, [r3, #0]
+ *(outbuffer + offset + 1) = (this->data.nsec >> (8 * 1)) & 0xFF;
+ 80039fa: 687b ldr r3, [r7, #4]
+ 80039fc: 689b ldr r3, [r3, #8]
+ 80039fe: 0a19 lsrs r1, r3, #8
+ 8003a00: 68fb ldr r3, [r7, #12]
+ 8003a02: 3301 adds r3, #1
+ 8003a04: 683a ldr r2, [r7, #0]
+ 8003a06: 4413 add r3, r2
+ 8003a08: b2ca uxtb r2, r1
+ 8003a0a: 701a strb r2, [r3, #0]
+ *(outbuffer + offset + 2) = (this->data.nsec >> (8 * 2)) & 0xFF;
+ 8003a0c: 687b ldr r3, [r7, #4]
+ 8003a0e: 689b ldr r3, [r3, #8]
+ 8003a10: 0c19 lsrs r1, r3, #16
+ 8003a12: 68fb ldr r3, [r7, #12]
+ 8003a14: 3302 adds r3, #2
+ 8003a16: 683a ldr r2, [r7, #0]
+ 8003a18: 4413 add r3, r2
+ 8003a1a: b2ca uxtb r2, r1
+ 8003a1c: 701a strb r2, [r3, #0]
+ *(outbuffer + offset + 3) = (this->data.nsec >> (8 * 3)) & 0xFF;
+ 8003a1e: 687b ldr r3, [r7, #4]
+ 8003a20: 689b ldr r3, [r3, #8]
+ 8003a22: 0e19 lsrs r1, r3, #24
+ 8003a24: 68fb ldr r3, [r7, #12]
+ 8003a26: 3303 adds r3, #3
+ 8003a28: 683a ldr r2, [r7, #0]
+ 8003a2a: 4413 add r3, r2
+ 8003a2c: b2ca uxtb r2, r1
+ 8003a2e: 701a strb r2, [r3, #0]
+ offset += sizeof(this->data.nsec);
+ 8003a30: 68fb ldr r3, [r7, #12]
+ 8003a32: 3304 adds r3, #4
+ 8003a34: 60fb str r3, [r7, #12]
+ return offset;
+ 8003a36: 68fb ldr r3, [r7, #12]
+ }
+ 8003a38: 4618 mov r0, r3
+ 8003a3a: 3714 adds r7, #20
+ 8003a3c: 46bd mov sp, r7
+ 8003a3e: f85d 7b04 ldr.w r7, [sp], #4
+ 8003a42: 4770 bx lr
+
+08003a44 <_ZN8std_msgs4Time11deserializeEPh>:
+
+ virtual int deserialize(unsigned char *inbuffer)
+ 8003a44: b480 push {r7}
+ 8003a46: b085 sub sp, #20
+ 8003a48: af00 add r7, sp, #0
+ 8003a4a: 6078 str r0, [r7, #4]
+ 8003a4c: 6039 str r1, [r7, #0]
+ {
+ int offset = 0;
+ 8003a4e: 2300 movs r3, #0
+ 8003a50: 60fb str r3, [r7, #12]
+ this->data.sec = ((uint32_t) (*(inbuffer + offset)));
+ 8003a52: 68fb ldr r3, [r7, #12]
+ 8003a54: 683a ldr r2, [r7, #0]
+ 8003a56: 4413 add r3, r2
+ 8003a58: 781b ldrb r3, [r3, #0]
+ 8003a5a: 461a mov r2, r3
+ 8003a5c: 687b ldr r3, [r7, #4]
+ 8003a5e: 605a str r2, [r3, #4]
+ this->data.sec |= ((uint32_t) (*(inbuffer + offset + 1))) << (8 * 1);
+ 8003a60: 687b ldr r3, [r7, #4]
+ 8003a62: 685a ldr r2, [r3, #4]
+ 8003a64: 68fb ldr r3, [r7, #12]
+ 8003a66: 3301 adds r3, #1
+ 8003a68: 6839 ldr r1, [r7, #0]
+ 8003a6a: 440b add r3, r1
+ 8003a6c: 781b ldrb r3, [r3, #0]
+ 8003a6e: 021b lsls r3, r3, #8
+ 8003a70: 431a orrs r2, r3
+ 8003a72: 687b ldr r3, [r7, #4]
+ 8003a74: 605a str r2, [r3, #4]
+ this->data.sec |= ((uint32_t) (*(inbuffer + offset + 2))) << (8 * 2);
+ 8003a76: 687b ldr r3, [r7, #4]
+ 8003a78: 685a ldr r2, [r3, #4]
+ 8003a7a: 68fb ldr r3, [r7, #12]
+ 8003a7c: 3302 adds r3, #2
+ 8003a7e: 6839 ldr r1, [r7, #0]
+ 8003a80: 440b add r3, r1
+ 8003a82: 781b ldrb r3, [r3, #0]
+ 8003a84: 041b lsls r3, r3, #16
+ 8003a86: 431a orrs r2, r3
+ 8003a88: 687b ldr r3, [r7, #4]
+ 8003a8a: 605a str r2, [r3, #4]
+ this->data.sec |= ((uint32_t) (*(inbuffer + offset + 3))) << (8 * 3);
+ 8003a8c: 687b ldr r3, [r7, #4]
+ 8003a8e: 685a ldr r2, [r3, #4]
+ 8003a90: 68fb ldr r3, [r7, #12]
+ 8003a92: 3303 adds r3, #3
+ 8003a94: 6839 ldr r1, [r7, #0]
+ 8003a96: 440b add r3, r1
+ 8003a98: 781b ldrb r3, [r3, #0]
+ 8003a9a: 061b lsls r3, r3, #24
+ 8003a9c: 431a orrs r2, r3
+ 8003a9e: 687b ldr r3, [r7, #4]
+ 8003aa0: 605a str r2, [r3, #4]
+ offset += sizeof(this->data.sec);
+ 8003aa2: 68fb ldr r3, [r7, #12]
+ 8003aa4: 3304 adds r3, #4
+ 8003aa6: 60fb str r3, [r7, #12]
+ this->data.nsec = ((uint32_t) (*(inbuffer + offset)));
+ 8003aa8: 68fb ldr r3, [r7, #12]
+ 8003aaa: 683a ldr r2, [r7, #0]
+ 8003aac: 4413 add r3, r2
+ 8003aae: 781b ldrb r3, [r3, #0]
+ 8003ab0: 461a mov r2, r3
+ 8003ab2: 687b ldr r3, [r7, #4]
+ 8003ab4: 609a str r2, [r3, #8]
+ this->data.nsec |= ((uint32_t) (*(inbuffer + offset + 1))) << (8 * 1);
+ 8003ab6: 687b ldr r3, [r7, #4]
+ 8003ab8: 689a ldr r2, [r3, #8]
+ 8003aba: 68fb ldr r3, [r7, #12]
+ 8003abc: 3301 adds r3, #1
+ 8003abe: 6839 ldr r1, [r7, #0]
+ 8003ac0: 440b add r3, r1
+ 8003ac2: 781b ldrb r3, [r3, #0]
+ 8003ac4: 021b lsls r3, r3, #8
+ 8003ac6: 431a orrs r2, r3
+ 8003ac8: 687b ldr r3, [r7, #4]
+ 8003aca: 609a str r2, [r3, #8]
+ this->data.nsec |= ((uint32_t) (*(inbuffer + offset + 2))) << (8 * 2);
+ 8003acc: 687b ldr r3, [r7, #4]
+ 8003ace: 689a ldr r2, [r3, #8]
+ 8003ad0: 68fb ldr r3, [r7, #12]
+ 8003ad2: 3302 adds r3, #2
+ 8003ad4: 6839 ldr r1, [r7, #0]
+ 8003ad6: 440b add r3, r1
+ 8003ad8: 781b ldrb r3, [r3, #0]
+ 8003ada: 041b lsls r3, r3, #16
+ 8003adc: 431a orrs r2, r3
+ 8003ade: 687b ldr r3, [r7, #4]
+ 8003ae0: 609a str r2, [r3, #8]
+ this->data.nsec |= ((uint32_t) (*(inbuffer + offset + 3))) << (8 * 3);
+ 8003ae2: 687b ldr r3, [r7, #4]
+ 8003ae4: 689a ldr r2, [r3, #8]
+ 8003ae6: 68fb ldr r3, [r7, #12]
+ 8003ae8: 3303 adds r3, #3
+ 8003aea: 6839 ldr r1, [r7, #0]
+ 8003aec: 440b add r3, r1
+ 8003aee: 781b ldrb r3, [r3, #0]
+ 8003af0: 061b lsls r3, r3, #24
+ 8003af2: 431a orrs r2, r3
+ 8003af4: 687b ldr r3, [r7, #4]
+ 8003af6: 609a str r2, [r3, #8]
+ offset += sizeof(this->data.nsec);
+ 8003af8: 68fb ldr r3, [r7, #12]
+ 8003afa: 3304 adds r3, #4
+ 8003afc: 60fb str r3, [r7, #12]
+ return offset;
+ 8003afe: 68fb ldr r3, [r7, #12]
+ }
+ 8003b00: 4618 mov r0, r3
+ 8003b02: 3714 adds r7, #20
+ 8003b04: 46bd mov sp, r7
+ 8003b06: f85d 7b04 ldr.w r7, [sp], #4
+ 8003b0a: 4770 bx lr
+
+08003b0c <_ZN8std_msgs4Time7getTypeEv>:
+
+ const char * getType(){ return "std_msgs/Time"; };
+ 8003b0c: b480 push {r7}
+ 8003b0e: b083 sub sp, #12
+ 8003b10: af00 add r7, sp, #0
+ 8003b12: 6078 str r0, [r7, #4]
+ 8003b14: 4b03 ldr r3, [pc, #12] ; (8003b24 <_ZN8std_msgs4Time7getTypeEv+0x18>)
+ 8003b16: 4618 mov r0, r3
+ 8003b18: 370c adds r7, #12
+ 8003b1a: 46bd mov sp, r7
+ 8003b1c: f85d 7b04 ldr.w r7, [sp], #4
+ 8003b20: 4770 bx lr
+ 8003b22: bf00 nop
+ 8003b24: 08005e10 .word 0x08005e10
+
+08003b28 <_ZN8std_msgs4Time6getMD5Ev>:
+ const char * getMD5(){ return "cd7166c74c552c311fbcc2fe5a7bc289"; };
+ 8003b28: b480 push {r7}
+ 8003b2a: b083 sub sp, #12
+ 8003b2c: af00 add r7, sp, #0
+ 8003b2e: 6078 str r0, [r7, #4]
+ 8003b30: 4b03 ldr r3, [pc, #12] ; (8003b40 <_ZN8std_msgs4Time6getMD5Ev+0x18>)
+ 8003b32: 4618 mov r0, r3
+ 8003b34: 370c adds r7, #12
+ 8003b36: 46bd mov sp, r7
+ 8003b38: f85d 7b04 ldr.w r7, [sp], #4
+ 8003b3c: 4770 bx lr
+ 8003b3e: bf00 nop
+ 8003b40: 08005e20 .word 0x08005e20
+
+08003b44 <_ZN14rosserial_msgs9TopicInfoC1Ev>:
+ enum { ID_PARAMETER_REQUEST = 6 };
+ enum { ID_LOG = 7 };
+ enum { ID_TIME = 10 };
+ enum { ID_TX_STOP = 11 };
+
+ TopicInfo():
+ 8003b44: b580 push {r7, lr}
+ 8003b46: b082 sub sp, #8
+ 8003b48: af00 add r7, sp, #0
+ 8003b4a: 6078 str r0, [r7, #4]
+ topic_id(0),
+ topic_name(""),
+ message_type(""),
+ md5sum(""),
+ buffer_size(0)
+ 8003b4c: 687b ldr r3, [r7, #4]
+ 8003b4e: 4618 mov r0, r3
+ 8003b50: f7ff fe4a bl 80037e8 <_ZN3ros3MsgC1Ev>
+ 8003b54: 4a0b ldr r2, [pc, #44] ; (8003b84 <_ZN14rosserial_msgs9TopicInfoC1Ev+0x40>)
+ 8003b56: 687b ldr r3, [r7, #4]
+ 8003b58: 601a str r2, [r3, #0]
+ 8003b5a: 687b ldr r3, [r7, #4]
+ 8003b5c: 2200 movs r2, #0
+ 8003b5e: 809a strh r2, [r3, #4]
+ 8003b60: 687b ldr r3, [r7, #4]
+ 8003b62: 4a09 ldr r2, [pc, #36] ; (8003b88 <_ZN14rosserial_msgs9TopicInfoC1Ev+0x44>)
+ 8003b64: 609a str r2, [r3, #8]
+ 8003b66: 687b ldr r3, [r7, #4]
+ 8003b68: 4a07 ldr r2, [pc, #28] ; (8003b88 <_ZN14rosserial_msgs9TopicInfoC1Ev+0x44>)
+ 8003b6a: 60da str r2, [r3, #12]
+ 8003b6c: 687b ldr r3, [r7, #4]
+ 8003b6e: 4a06 ldr r2, [pc, #24] ; (8003b88 <_ZN14rosserial_msgs9TopicInfoC1Ev+0x44>)
+ 8003b70: 611a str r2, [r3, #16]
+ 8003b72: 687b ldr r3, [r7, #4]
+ 8003b74: 2200 movs r2, #0
+ 8003b76: 615a str r2, [r3, #20]
+ {
+ }
+ 8003b78: 687b ldr r3, [r7, #4]
+ 8003b7a: 4618 mov r0, r3
+ 8003b7c: 3708 adds r7, #8
+ 8003b7e: 46bd mov sp, r7
+ 8003b80: bd80 pop {r7, pc}
+ 8003b82: bf00 nop
+ 8003b84: 08005fb8 .word 0x08005fb8
+ 8003b88: 08005dd8 .word 0x08005dd8
+
+08003b8c <_ZNK14rosserial_msgs9TopicInfo9serializeEPh>:
+
+ virtual int serialize(unsigned char *outbuffer) const
+ 8003b8c: b580 push {r7, lr}
+ 8003b8e: b088 sub sp, #32
+ 8003b90: af00 add r7, sp, #0
+ 8003b92: 6078 str r0, [r7, #4]
+ 8003b94: 6039 str r1, [r7, #0]
+ {
+ int offset = 0;
+ 8003b96: 2300 movs r3, #0
+ 8003b98: 61fb str r3, [r7, #28]
+ *(outbuffer + offset + 0) = (this->topic_id >> (8 * 0)) & 0xFF;
+ 8003b9a: 687b ldr r3, [r7, #4]
+ 8003b9c: 8899 ldrh r1, [r3, #4]
+ 8003b9e: 69fb ldr r3, [r7, #28]
+ 8003ba0: 683a ldr r2, [r7, #0]
+ 8003ba2: 4413 add r3, r2
+ 8003ba4: b2ca uxtb r2, r1
+ 8003ba6: 701a strb r2, [r3, #0]
+ *(outbuffer + offset + 1) = (this->topic_id >> (8 * 1)) & 0xFF;
+ 8003ba8: 687b ldr r3, [r7, #4]
+ 8003baa: 889b ldrh r3, [r3, #4]
+ 8003bac: 0a1b lsrs r3, r3, #8
+ 8003bae: b299 uxth r1, r3
+ 8003bb0: 69fb ldr r3, [r7, #28]
+ 8003bb2: 3301 adds r3, #1
+ 8003bb4: 683a ldr r2, [r7, #0]
+ 8003bb6: 4413 add r3, r2
+ 8003bb8: b2ca uxtb r2, r1
+ 8003bba: 701a strb r2, [r3, #0]
+ offset += sizeof(this->topic_id);
+ 8003bbc: 69fb ldr r3, [r7, #28]
+ 8003bbe: 3302 adds r3, #2
+ 8003bc0: 61fb str r3, [r7, #28]
+ uint32_t length_topic_name = strlen(this->topic_name);
+ 8003bc2: 687b ldr r3, [r7, #4]
+ 8003bc4: 689b ldr r3, [r3, #8]
+ 8003bc6: 4618 mov r0, r3
+ 8003bc8: f7fc fb36 bl 8000238 <strlen>
+ 8003bcc: 61b8 str r0, [r7, #24]
+ varToArr(outbuffer + offset, length_topic_name);
+ 8003bce: 69fb ldr r3, [r7, #28]
+ 8003bd0: 683a ldr r2, [r7, #0]
+ 8003bd2: 4413 add r3, r2
+ 8003bd4: 69b9 ldr r1, [r7, #24]
+ 8003bd6: 4618 mov r0, r3
+ 8003bd8: f000 fffd bl 8004bd6 <_ZN3ros3Msg8varToArrIPhmEEvT_T0_>
+ offset += 4;
+ 8003bdc: 69fb ldr r3, [r7, #28]
+ 8003bde: 3304 adds r3, #4
+ 8003be0: 61fb str r3, [r7, #28]
+ memcpy(outbuffer + offset, this->topic_name, length_topic_name);
+ 8003be2: 69fb ldr r3, [r7, #28]
+ 8003be4: 683a ldr r2, [r7, #0]
+ 8003be6: 18d0 adds r0, r2, r3
+ 8003be8: 687b ldr r3, [r7, #4]
+ 8003bea: 689b ldr r3, [r3, #8]
+ 8003bec: 69ba ldr r2, [r7, #24]
+ 8003bee: 4619 mov r1, r3
+ 8003bf0: f001 ff9e bl 8005b30 <memcpy>
+ offset += length_topic_name;
+ 8003bf4: 69fa ldr r2, [r7, #28]
+ 8003bf6: 69bb ldr r3, [r7, #24]
+ 8003bf8: 4413 add r3, r2
+ 8003bfa: 61fb str r3, [r7, #28]
+ uint32_t length_message_type = strlen(this->message_type);
+ 8003bfc: 687b ldr r3, [r7, #4]
+ 8003bfe: 68db ldr r3, [r3, #12]
+ 8003c00: 4618 mov r0, r3
+ 8003c02: f7fc fb19 bl 8000238 <strlen>
+ 8003c06: 6178 str r0, [r7, #20]
+ varToArr(outbuffer + offset, length_message_type);
+ 8003c08: 69fb ldr r3, [r7, #28]
+ 8003c0a: 683a ldr r2, [r7, #0]
+ 8003c0c: 4413 add r3, r2
+ 8003c0e: 6979 ldr r1, [r7, #20]
+ 8003c10: 4618 mov r0, r3
+ 8003c12: f000 ffe0 bl 8004bd6 <_ZN3ros3Msg8varToArrIPhmEEvT_T0_>
+ offset += 4;
+ 8003c16: 69fb ldr r3, [r7, #28]
+ 8003c18: 3304 adds r3, #4
+ 8003c1a: 61fb str r3, [r7, #28]
+ memcpy(outbuffer + offset, this->message_type, length_message_type);
+ 8003c1c: 69fb ldr r3, [r7, #28]
+ 8003c1e: 683a ldr r2, [r7, #0]
+ 8003c20: 18d0 adds r0, r2, r3
+ 8003c22: 687b ldr r3, [r7, #4]
+ 8003c24: 68db ldr r3, [r3, #12]
+ 8003c26: 697a ldr r2, [r7, #20]
+ 8003c28: 4619 mov r1, r3
+ 8003c2a: f001 ff81 bl 8005b30 <memcpy>
+ offset += length_message_type;
+ 8003c2e: 69fa ldr r2, [r7, #28]
+ 8003c30: 697b ldr r3, [r7, #20]
+ 8003c32: 4413 add r3, r2
+ 8003c34: 61fb str r3, [r7, #28]
+ uint32_t length_md5sum = strlen(this->md5sum);
+ 8003c36: 687b ldr r3, [r7, #4]
+ 8003c38: 691b ldr r3, [r3, #16]
+ 8003c3a: 4618 mov r0, r3
+ 8003c3c: f7fc fafc bl 8000238 <strlen>
+ 8003c40: 6138 str r0, [r7, #16]
+ varToArr(outbuffer + offset, length_md5sum);
+ 8003c42: 69fb ldr r3, [r7, #28]
+ 8003c44: 683a ldr r2, [r7, #0]
+ 8003c46: 4413 add r3, r2
+ 8003c48: 6939 ldr r1, [r7, #16]
+ 8003c4a: 4618 mov r0, r3
+ 8003c4c: f000 ffc3 bl 8004bd6 <_ZN3ros3Msg8varToArrIPhmEEvT_T0_>
+ offset += 4;
+ 8003c50: 69fb ldr r3, [r7, #28]
+ 8003c52: 3304 adds r3, #4
+ 8003c54: 61fb str r3, [r7, #28]
+ memcpy(outbuffer + offset, this->md5sum, length_md5sum);
+ 8003c56: 69fb ldr r3, [r7, #28]
+ 8003c58: 683a ldr r2, [r7, #0]
+ 8003c5a: 18d0 adds r0, r2, r3
+ 8003c5c: 687b ldr r3, [r7, #4]
+ 8003c5e: 691b ldr r3, [r3, #16]
+ 8003c60: 693a ldr r2, [r7, #16]
+ 8003c62: 4619 mov r1, r3
+ 8003c64: f001 ff64 bl 8005b30 <memcpy>
+ offset += length_md5sum;
+ 8003c68: 69fa ldr r2, [r7, #28]
+ 8003c6a: 693b ldr r3, [r7, #16]
+ 8003c6c: 4413 add r3, r2
+ 8003c6e: 61fb str r3, [r7, #28]
+ union {
+ int32_t real;
+ uint32_t base;
+ } u_buffer_size;
+ u_buffer_size.real = this->buffer_size;
+ 8003c70: 687b ldr r3, [r7, #4]
+ 8003c72: 695b ldr r3, [r3, #20]
+ 8003c74: 60fb str r3, [r7, #12]
+ *(outbuffer + offset + 0) = (u_buffer_size.base >> (8 * 0)) & 0xFF;
+ 8003c76: 68f9 ldr r1, [r7, #12]
+ 8003c78: 69fb ldr r3, [r7, #28]
+ 8003c7a: 683a ldr r2, [r7, #0]
+ 8003c7c: 4413 add r3, r2
+ 8003c7e: b2ca uxtb r2, r1
+ 8003c80: 701a strb r2, [r3, #0]
+ *(outbuffer + offset + 1) = (u_buffer_size.base >> (8 * 1)) & 0xFF;
+ 8003c82: 68fb ldr r3, [r7, #12]
+ 8003c84: 0a19 lsrs r1, r3, #8
+ 8003c86: 69fb ldr r3, [r7, #28]
+ 8003c88: 3301 adds r3, #1
+ 8003c8a: 683a ldr r2, [r7, #0]
+ 8003c8c: 4413 add r3, r2
+ 8003c8e: b2ca uxtb r2, r1
+ 8003c90: 701a strb r2, [r3, #0]
+ *(outbuffer + offset + 2) = (u_buffer_size.base >> (8 * 2)) & 0xFF;
+ 8003c92: 68fb ldr r3, [r7, #12]
+ 8003c94: 0c19 lsrs r1, r3, #16
+ 8003c96: 69fb ldr r3, [r7, #28]
+ 8003c98: 3302 adds r3, #2
+ 8003c9a: 683a ldr r2, [r7, #0]
+ 8003c9c: 4413 add r3, r2
+ 8003c9e: b2ca uxtb r2, r1
+ 8003ca0: 701a strb r2, [r3, #0]
+ *(outbuffer + offset + 3) = (u_buffer_size.base >> (8 * 3)) & 0xFF;
+ 8003ca2: 68fb ldr r3, [r7, #12]
+ 8003ca4: 0e19 lsrs r1, r3, #24
+ 8003ca6: 69fb ldr r3, [r7, #28]
+ 8003ca8: 3303 adds r3, #3
+ 8003caa: 683a ldr r2, [r7, #0]
+ 8003cac: 4413 add r3, r2
+ 8003cae: b2ca uxtb r2, r1
+ 8003cb0: 701a strb r2, [r3, #0]
+ offset += sizeof(this->buffer_size);
+ 8003cb2: 69fb ldr r3, [r7, #28]
+ 8003cb4: 3304 adds r3, #4
+ 8003cb6: 61fb str r3, [r7, #28]
+ return offset;
+ 8003cb8: 69fb ldr r3, [r7, #28]
+ }
+ 8003cba: 4618 mov r0, r3
+ 8003cbc: 3720 adds r7, #32
+ 8003cbe: 46bd mov sp, r7
+ 8003cc0: bd80 pop {r7, pc}
+
+08003cc2 <_ZN14rosserial_msgs9TopicInfo11deserializeEPh>:
+
+ virtual int deserialize(unsigned char *inbuffer)
+ 8003cc2: b580 push {r7, lr}
+ 8003cc4: b08a sub sp, #40 ; 0x28
+ 8003cc6: af00 add r7, sp, #0
+ 8003cc8: 6078 str r0, [r7, #4]
+ 8003cca: 6039 str r1, [r7, #0]
+ {
+ int offset = 0;
+ 8003ccc: 2300 movs r3, #0
+ 8003cce: 61bb str r3, [r7, #24]
+ this->topic_id = ((uint16_t) (*(inbuffer + offset)));
+ 8003cd0: 69bb ldr r3, [r7, #24]
+ 8003cd2: 683a ldr r2, [r7, #0]
+ 8003cd4: 4413 add r3, r2
+ 8003cd6: 781b ldrb r3, [r3, #0]
+ 8003cd8: b29a uxth r2, r3
+ 8003cda: 687b ldr r3, [r7, #4]
+ 8003cdc: 809a strh r2, [r3, #4]
+ this->topic_id |= ((uint16_t) (*(inbuffer + offset + 1))) << (8 * 1);
+ 8003cde: 687b ldr r3, [r7, #4]
+ 8003ce0: 889b ldrh r3, [r3, #4]
+ 8003ce2: b21a sxth r2, r3
+ 8003ce4: 69bb ldr r3, [r7, #24]
+ 8003ce6: 3301 adds r3, #1
+ 8003ce8: 6839 ldr r1, [r7, #0]
+ 8003cea: 440b add r3, r1
+ 8003cec: 781b ldrb r3, [r3, #0]
+ 8003cee: 021b lsls r3, r3, #8
+ 8003cf0: b21b sxth r3, r3
+ 8003cf2: 4313 orrs r3, r2
+ 8003cf4: b21b sxth r3, r3
+ 8003cf6: b29a uxth r2, r3
+ 8003cf8: 687b ldr r3, [r7, #4]
+ 8003cfa: 809a strh r2, [r3, #4]
+ offset += sizeof(this->topic_id);
+ 8003cfc: 69bb ldr r3, [r7, #24]
+ 8003cfe: 3302 adds r3, #2
+ 8003d00: 61bb str r3, [r7, #24]
+ uint32_t length_topic_name;
+ arrToVar(length_topic_name, (inbuffer + offset));
+ 8003d02: 69bb ldr r3, [r7, #24]
+ 8003d04: 683a ldr r2, [r7, #0]
+ 8003d06: 441a add r2, r3
+ 8003d08: f107 0314 add.w r3, r7, #20
+ 8003d0c: 4611 mov r1, r2
+ 8003d0e: 4618 mov r0, r3
+ 8003d10: f000 ff7f bl 8004c12 <_ZN3ros3Msg8arrToVarImPhEEvRT_T0_>
+ offset += 4;
+ 8003d14: 69bb ldr r3, [r7, #24]
+ 8003d16: 3304 adds r3, #4
+ 8003d18: 61bb str r3, [r7, #24]
+ for(unsigned int k= offset; k< offset+length_topic_name; ++k){
+ 8003d1a: 69bb ldr r3, [r7, #24]
+ 8003d1c: 627b str r3, [r7, #36] ; 0x24
+ 8003d1e: 69ba ldr r2, [r7, #24]
+ 8003d20: 697b ldr r3, [r7, #20]
+ 8003d22: 4413 add r3, r2
+ 8003d24: 6a7a ldr r2, [r7, #36] ; 0x24
+ 8003d26: 429a cmp r2, r3
+ 8003d28: d20c bcs.n 8003d44 <_ZN14rosserial_msgs9TopicInfo11deserializeEPh+0x82>
+ inbuffer[k-1]=inbuffer[k];
+ 8003d2a: 683a ldr r2, [r7, #0]
+ 8003d2c: 6a7b ldr r3, [r7, #36] ; 0x24
+ 8003d2e: 441a add r2, r3
+ 8003d30: 6a7b ldr r3, [r7, #36] ; 0x24
+ 8003d32: 3b01 subs r3, #1
+ 8003d34: 6839 ldr r1, [r7, #0]
+ 8003d36: 440b add r3, r1
+ 8003d38: 7812 ldrb r2, [r2, #0]
+ 8003d3a: 701a strb r2, [r3, #0]
+ for(unsigned int k= offset; k< offset+length_topic_name; ++k){
+ 8003d3c: 6a7b ldr r3, [r7, #36] ; 0x24
+ 8003d3e: 3301 adds r3, #1
+ 8003d40: 627b str r3, [r7, #36] ; 0x24
+ 8003d42: e7ec b.n 8003d1e <_ZN14rosserial_msgs9TopicInfo11deserializeEPh+0x5c>
+ }
+ inbuffer[offset+length_topic_name-1]=0;
+ 8003d44: 69ba ldr r2, [r7, #24]
+ 8003d46: 697b ldr r3, [r7, #20]
+ 8003d48: 4413 add r3, r2
+ 8003d4a: 3b01 subs r3, #1
+ 8003d4c: 683a ldr r2, [r7, #0]
+ 8003d4e: 4413 add r3, r2
+ 8003d50: 2200 movs r2, #0
+ 8003d52: 701a strb r2, [r3, #0]
+ this->topic_name = (char *)(inbuffer + offset-1);
+ 8003d54: 69bb ldr r3, [r7, #24]
+ 8003d56: 3b01 subs r3, #1
+ 8003d58: 683a ldr r2, [r7, #0]
+ 8003d5a: 441a add r2, r3
+ 8003d5c: 687b ldr r3, [r7, #4]
+ 8003d5e: 609a str r2, [r3, #8]
+ offset += length_topic_name;
+ 8003d60: 69ba ldr r2, [r7, #24]
+ 8003d62: 697b ldr r3, [r7, #20]
+ 8003d64: 4413 add r3, r2
+ 8003d66: 61bb str r3, [r7, #24]
+ uint32_t length_message_type;
+ arrToVar(length_message_type, (inbuffer + offset));
+ 8003d68: 69bb ldr r3, [r7, #24]
+ 8003d6a: 683a ldr r2, [r7, #0]
+ 8003d6c: 441a add r2, r3
+ 8003d6e: f107 0310 add.w r3, r7, #16
+ 8003d72: 4611 mov r1, r2
+ 8003d74: 4618 mov r0, r3
+ 8003d76: f000 ff4c bl 8004c12 <_ZN3ros3Msg8arrToVarImPhEEvRT_T0_>
+ offset += 4;
+ 8003d7a: 69bb ldr r3, [r7, #24]
+ 8003d7c: 3304 adds r3, #4
+ 8003d7e: 61bb str r3, [r7, #24]
+ for(unsigned int k= offset; k< offset+length_message_type; ++k){
+ 8003d80: 69bb ldr r3, [r7, #24]
+ 8003d82: 623b str r3, [r7, #32]
+ 8003d84: 69ba ldr r2, [r7, #24]
+ 8003d86: 693b ldr r3, [r7, #16]
+ 8003d88: 4413 add r3, r2
+ 8003d8a: 6a3a ldr r2, [r7, #32]
+ 8003d8c: 429a cmp r2, r3
+ 8003d8e: d20c bcs.n 8003daa <_ZN14rosserial_msgs9TopicInfo11deserializeEPh+0xe8>
+ inbuffer[k-1]=inbuffer[k];
+ 8003d90: 683a ldr r2, [r7, #0]
+ 8003d92: 6a3b ldr r3, [r7, #32]
+ 8003d94: 441a add r2, r3
+ 8003d96: 6a3b ldr r3, [r7, #32]
+ 8003d98: 3b01 subs r3, #1
+ 8003d9a: 6839 ldr r1, [r7, #0]
+ 8003d9c: 440b add r3, r1
+ 8003d9e: 7812 ldrb r2, [r2, #0]
+ 8003da0: 701a strb r2, [r3, #0]
+ for(unsigned int k= offset; k< offset+length_message_type; ++k){
+ 8003da2: 6a3b ldr r3, [r7, #32]
+ 8003da4: 3301 adds r3, #1
+ 8003da6: 623b str r3, [r7, #32]
+ 8003da8: e7ec b.n 8003d84 <_ZN14rosserial_msgs9TopicInfo11deserializeEPh+0xc2>
+ }
+ inbuffer[offset+length_message_type-1]=0;
+ 8003daa: 69ba ldr r2, [r7, #24]
+ 8003dac: 693b ldr r3, [r7, #16]
+ 8003dae: 4413 add r3, r2
+ 8003db0: 3b01 subs r3, #1
+ 8003db2: 683a ldr r2, [r7, #0]
+ 8003db4: 4413 add r3, r2
+ 8003db6: 2200 movs r2, #0
+ 8003db8: 701a strb r2, [r3, #0]
+ this->message_type = (char *)(inbuffer + offset-1);
+ 8003dba: 69bb ldr r3, [r7, #24]
+ 8003dbc: 3b01 subs r3, #1
+ 8003dbe: 683a ldr r2, [r7, #0]
+ 8003dc0: 441a add r2, r3
+ 8003dc2: 687b ldr r3, [r7, #4]
+ 8003dc4: 60da str r2, [r3, #12]
+ offset += length_message_type;
+ 8003dc6: 69ba ldr r2, [r7, #24]
+ 8003dc8: 693b ldr r3, [r7, #16]
+ 8003dca: 4413 add r3, r2
+ 8003dcc: 61bb str r3, [r7, #24]
+ uint32_t length_md5sum;
+ arrToVar(length_md5sum, (inbuffer + offset));
+ 8003dce: 69bb ldr r3, [r7, #24]
+ 8003dd0: 683a ldr r2, [r7, #0]
+ 8003dd2: 441a add r2, r3
+ 8003dd4: f107 030c add.w r3, r7, #12
+ 8003dd8: 4611 mov r1, r2
+ 8003dda: 4618 mov r0, r3
+ 8003ddc: f000 ff19 bl 8004c12 <_ZN3ros3Msg8arrToVarImPhEEvRT_T0_>
+ offset += 4;
+ 8003de0: 69bb ldr r3, [r7, #24]
+ 8003de2: 3304 adds r3, #4
+ 8003de4: 61bb str r3, [r7, #24]
+ for(unsigned int k= offset; k< offset+length_md5sum; ++k){
+ 8003de6: 69bb ldr r3, [r7, #24]
+ 8003de8: 61fb str r3, [r7, #28]
+ 8003dea: 69ba ldr r2, [r7, #24]
+ 8003dec: 68fb ldr r3, [r7, #12]
+ 8003dee: 4413 add r3, r2
+ 8003df0: 69fa ldr r2, [r7, #28]
+ 8003df2: 429a cmp r2, r3
+ 8003df4: d20c bcs.n 8003e10 <_ZN14rosserial_msgs9TopicInfo11deserializeEPh+0x14e>
+ inbuffer[k-1]=inbuffer[k];
+ 8003df6: 683a ldr r2, [r7, #0]
+ 8003df8: 69fb ldr r3, [r7, #28]
+ 8003dfa: 441a add r2, r3
+ 8003dfc: 69fb ldr r3, [r7, #28]
+ 8003dfe: 3b01 subs r3, #1
+ 8003e00: 6839 ldr r1, [r7, #0]
+ 8003e02: 440b add r3, r1
+ 8003e04: 7812 ldrb r2, [r2, #0]
+ 8003e06: 701a strb r2, [r3, #0]
+ for(unsigned int k= offset; k< offset+length_md5sum; ++k){
+ 8003e08: 69fb ldr r3, [r7, #28]
+ 8003e0a: 3301 adds r3, #1
+ 8003e0c: 61fb str r3, [r7, #28]
+ 8003e0e: e7ec b.n 8003dea <_ZN14rosserial_msgs9TopicInfo11deserializeEPh+0x128>
+ }
+ inbuffer[offset+length_md5sum-1]=0;
+ 8003e10: 69ba ldr r2, [r7, #24]
+ 8003e12: 68fb ldr r3, [r7, #12]
+ 8003e14: 4413 add r3, r2
+ 8003e16: 3b01 subs r3, #1
+ 8003e18: 683a ldr r2, [r7, #0]
+ 8003e1a: 4413 add r3, r2
+ 8003e1c: 2200 movs r2, #0
+ 8003e1e: 701a strb r2, [r3, #0]
+ this->md5sum = (char *)(inbuffer + offset-1);
+ 8003e20: 69bb ldr r3, [r7, #24]
+ 8003e22: 3b01 subs r3, #1
+ 8003e24: 683a ldr r2, [r7, #0]
+ 8003e26: 441a add r2, r3
+ 8003e28: 687b ldr r3, [r7, #4]
+ 8003e2a: 611a str r2, [r3, #16]
+ offset += length_md5sum;
+ 8003e2c: 69ba ldr r2, [r7, #24]
+ 8003e2e: 68fb ldr r3, [r7, #12]
+ 8003e30: 4413 add r3, r2
+ 8003e32: 61bb str r3, [r7, #24]
+ union {
+ int32_t real;
+ uint32_t base;
+ } u_buffer_size;
+ u_buffer_size.base = 0;
+ 8003e34: 2300 movs r3, #0
+ 8003e36: 60bb str r3, [r7, #8]
+ u_buffer_size.base |= ((uint32_t) (*(inbuffer + offset + 0))) << (8 * 0);
+ 8003e38: 68bb ldr r3, [r7, #8]
+ 8003e3a: 69ba ldr r2, [r7, #24]
+ 8003e3c: 6839 ldr r1, [r7, #0]
+ 8003e3e: 440a add r2, r1
+ 8003e40: 7812 ldrb r2, [r2, #0]
+ 8003e42: 4313 orrs r3, r2
+ 8003e44: 60bb str r3, [r7, #8]
+ u_buffer_size.base |= ((uint32_t) (*(inbuffer + offset + 1))) << (8 * 1);
+ 8003e46: 68ba ldr r2, [r7, #8]
+ 8003e48: 69bb ldr r3, [r7, #24]
+ 8003e4a: 3301 adds r3, #1
+ 8003e4c: 6839 ldr r1, [r7, #0]
+ 8003e4e: 440b add r3, r1
+ 8003e50: 781b ldrb r3, [r3, #0]
+ 8003e52: 021b lsls r3, r3, #8
+ 8003e54: 4313 orrs r3, r2
+ 8003e56: 60bb str r3, [r7, #8]
+ u_buffer_size.base |= ((uint32_t) (*(inbuffer + offset + 2))) << (8 * 2);
+ 8003e58: 68ba ldr r2, [r7, #8]
+ 8003e5a: 69bb ldr r3, [r7, #24]
+ 8003e5c: 3302 adds r3, #2
+ 8003e5e: 6839 ldr r1, [r7, #0]
+ 8003e60: 440b add r3, r1
+ 8003e62: 781b ldrb r3, [r3, #0]
+ 8003e64: 041b lsls r3, r3, #16
+ 8003e66: 4313 orrs r3, r2
+ 8003e68: 60bb str r3, [r7, #8]
+ u_buffer_size.base |= ((uint32_t) (*(inbuffer + offset + 3))) << (8 * 3);
+ 8003e6a: 68ba ldr r2, [r7, #8]
+ 8003e6c: 69bb ldr r3, [r7, #24]
+ 8003e6e: 3303 adds r3, #3
+ 8003e70: 6839 ldr r1, [r7, #0]
+ 8003e72: 440b add r3, r1
+ 8003e74: 781b ldrb r3, [r3, #0]
+ 8003e76: 061b lsls r3, r3, #24
+ 8003e78: 4313 orrs r3, r2
+ 8003e7a: 60bb str r3, [r7, #8]
+ this->buffer_size = u_buffer_size.real;
+ 8003e7c: 68ba ldr r2, [r7, #8]
+ 8003e7e: 687b ldr r3, [r7, #4]
+ 8003e80: 615a str r2, [r3, #20]
+ offset += sizeof(this->buffer_size);
+ 8003e82: 69bb ldr r3, [r7, #24]
+ 8003e84: 3304 adds r3, #4
+ 8003e86: 61bb str r3, [r7, #24]
+ return offset;
+ 8003e88: 69bb ldr r3, [r7, #24]
+ }
+ 8003e8a: 4618 mov r0, r3
+ 8003e8c: 3728 adds r7, #40 ; 0x28
+ 8003e8e: 46bd mov sp, r7
+ 8003e90: bd80 pop {r7, pc}
+ ...
+
+08003e94 <_ZN14rosserial_msgs9TopicInfo7getTypeEv>:
+
+ const char * getType(){ return "rosserial_msgs/TopicInfo"; };
+ 8003e94: b480 push {r7}
+ 8003e96: b083 sub sp, #12
+ 8003e98: af00 add r7, sp, #0
+ 8003e9a: 6078 str r0, [r7, #4]
+ 8003e9c: 4b03 ldr r3, [pc, #12] ; (8003eac <_ZN14rosserial_msgs9TopicInfo7getTypeEv+0x18>)
+ 8003e9e: 4618 mov r0, r3
+ 8003ea0: 370c adds r7, #12
+ 8003ea2: 46bd mov sp, r7
+ 8003ea4: f85d 7b04 ldr.w r7, [sp], #4
+ 8003ea8: 4770 bx lr
+ 8003eaa: bf00 nop
+ 8003eac: 08005e44 .word 0x08005e44
+
+08003eb0 <_ZN14rosserial_msgs9TopicInfo6getMD5Ev>:
+ const char * getMD5(){ return "0ad51f88fc44892f8c10684077646005"; };
+ 8003eb0: b480 push {r7}
+ 8003eb2: b083 sub sp, #12
+ 8003eb4: af00 add r7, sp, #0
+ 8003eb6: 6078 str r0, [r7, #4]
+ 8003eb8: 4b03 ldr r3, [pc, #12] ; (8003ec8 <_ZN14rosserial_msgs9TopicInfo6getMD5Ev+0x18>)
+ 8003eba: 4618 mov r0, r3
+ 8003ebc: 370c adds r7, #12
+ 8003ebe: 46bd mov sp, r7
+ 8003ec0: f85d 7b04 ldr.w r7, [sp], #4
+ 8003ec4: 4770 bx lr
+ 8003ec6: bf00 nop
+ 8003ec8: 08005e60 .word 0x08005e60
+
+08003ecc <_ZN14rosserial_msgs3LogC1Ev>:
+ enum { INFO = 1 };
+ enum { WARN = 2 };
+ enum { ERROR = 3 };
+ enum { FATAL = 4 };
+
+ Log():
+ 8003ecc: b580 push {r7, lr}
+ 8003ece: b082 sub sp, #8
+ 8003ed0: af00 add r7, sp, #0
+ 8003ed2: 6078 str r0, [r7, #4]
+ level(0),
+ msg("")
+ 8003ed4: 687b ldr r3, [r7, #4]
+ 8003ed6: 4618 mov r0, r3
+ 8003ed8: f7ff fc86 bl 80037e8 <_ZN3ros3MsgC1Ev>
+ 8003edc: 4a06 ldr r2, [pc, #24] ; (8003ef8 <_ZN14rosserial_msgs3LogC1Ev+0x2c>)
+ 8003ede: 687b ldr r3, [r7, #4]
+ 8003ee0: 601a str r2, [r3, #0]
+ 8003ee2: 687b ldr r3, [r7, #4]
+ 8003ee4: 2200 movs r2, #0
+ 8003ee6: 711a strb r2, [r3, #4]
+ 8003ee8: 687b ldr r3, [r7, #4]
+ 8003eea: 4a04 ldr r2, [pc, #16] ; (8003efc <_ZN14rosserial_msgs3LogC1Ev+0x30>)
+ 8003eec: 609a str r2, [r3, #8]
+ {
+ }
+ 8003eee: 687b ldr r3, [r7, #4]
+ 8003ef0: 4618 mov r0, r3
+ 8003ef2: 3708 adds r7, #8
+ 8003ef4: 46bd mov sp, r7
+ 8003ef6: bd80 pop {r7, pc}
+ 8003ef8: 08005fa0 .word 0x08005fa0
+ 8003efc: 08005dd8 .word 0x08005dd8
+
+08003f00 <_ZNK14rosserial_msgs3Log9serializeEPh>:
+
+ virtual int serialize(unsigned char *outbuffer) const
+ 8003f00: b580 push {r7, lr}
+ 8003f02: b084 sub sp, #16
+ 8003f04: af00 add r7, sp, #0
+ 8003f06: 6078 str r0, [r7, #4]
+ 8003f08: 6039 str r1, [r7, #0]
+ {
+ int offset = 0;
+ 8003f0a: 2300 movs r3, #0
+ 8003f0c: 60fb str r3, [r7, #12]
+ *(outbuffer + offset + 0) = (this->level >> (8 * 0)) & 0xFF;
+ 8003f0e: 68fb ldr r3, [r7, #12]
+ 8003f10: 683a ldr r2, [r7, #0]
+ 8003f12: 4413 add r3, r2
+ 8003f14: 687a ldr r2, [r7, #4]
+ 8003f16: 7912 ldrb r2, [r2, #4]
+ 8003f18: 701a strb r2, [r3, #0]
+ offset += sizeof(this->level);
+ 8003f1a: 68fb ldr r3, [r7, #12]
+ 8003f1c: 3301 adds r3, #1
+ 8003f1e: 60fb str r3, [r7, #12]
+ uint32_t length_msg = strlen(this->msg);
+ 8003f20: 687b ldr r3, [r7, #4]
+ 8003f22: 689b ldr r3, [r3, #8]
+ 8003f24: 4618 mov r0, r3
+ 8003f26: f7fc f987 bl 8000238 <strlen>
+ 8003f2a: 60b8 str r0, [r7, #8]
+ varToArr(outbuffer + offset, length_msg);
+ 8003f2c: 68fb ldr r3, [r7, #12]
+ 8003f2e: 683a ldr r2, [r7, #0]
+ 8003f30: 4413 add r3, r2
+ 8003f32: 68b9 ldr r1, [r7, #8]
+ 8003f34: 4618 mov r0, r3
+ 8003f36: f000 fe4e bl 8004bd6 <_ZN3ros3Msg8varToArrIPhmEEvT_T0_>
+ offset += 4;
+ 8003f3a: 68fb ldr r3, [r7, #12]
+ 8003f3c: 3304 adds r3, #4
+ 8003f3e: 60fb str r3, [r7, #12]
+ memcpy(outbuffer + offset, this->msg, length_msg);
+ 8003f40: 68fb ldr r3, [r7, #12]
+ 8003f42: 683a ldr r2, [r7, #0]
+ 8003f44: 18d0 adds r0, r2, r3
+ 8003f46: 687b ldr r3, [r7, #4]
+ 8003f48: 689b ldr r3, [r3, #8]
+ 8003f4a: 68ba ldr r2, [r7, #8]
+ 8003f4c: 4619 mov r1, r3
+ 8003f4e: f001 fdef bl 8005b30 <memcpy>
+ offset += length_msg;
+ 8003f52: 68fa ldr r2, [r7, #12]
+ 8003f54: 68bb ldr r3, [r7, #8]
+ 8003f56: 4413 add r3, r2
+ 8003f58: 60fb str r3, [r7, #12]
+ return offset;
+ 8003f5a: 68fb ldr r3, [r7, #12]
+ }
+ 8003f5c: 4618 mov r0, r3
+ 8003f5e: 3710 adds r7, #16
+ 8003f60: 46bd mov sp, r7
+ 8003f62: bd80 pop {r7, pc}
+
+08003f64 <_ZN14rosserial_msgs3Log11deserializeEPh>:
+
+ virtual int deserialize(unsigned char *inbuffer)
+ 8003f64: b580 push {r7, lr}
+ 8003f66: b086 sub sp, #24
+ 8003f68: af00 add r7, sp, #0
+ 8003f6a: 6078 str r0, [r7, #4]
+ 8003f6c: 6039 str r1, [r7, #0]
+ {
+ int offset = 0;
+ 8003f6e: 2300 movs r3, #0
+ 8003f70: 613b str r3, [r7, #16]
+ this->level = ((uint8_t) (*(inbuffer + offset)));
+ 8003f72: 693b ldr r3, [r7, #16]
+ 8003f74: 683a ldr r2, [r7, #0]
+ 8003f76: 4413 add r3, r2
+ 8003f78: 781a ldrb r2, [r3, #0]
+ 8003f7a: 687b ldr r3, [r7, #4]
+ 8003f7c: 711a strb r2, [r3, #4]
+ offset += sizeof(this->level);
+ 8003f7e: 693b ldr r3, [r7, #16]
+ 8003f80: 3301 adds r3, #1
+ 8003f82: 613b str r3, [r7, #16]
+ uint32_t length_msg;
+ arrToVar(length_msg, (inbuffer + offset));
+ 8003f84: 693b ldr r3, [r7, #16]
+ 8003f86: 683a ldr r2, [r7, #0]
+ 8003f88: 441a add r2, r3
+ 8003f8a: f107 030c add.w r3, r7, #12
+ 8003f8e: 4611 mov r1, r2
+ 8003f90: 4618 mov r0, r3
+ 8003f92: f000 fe3e bl 8004c12 <_ZN3ros3Msg8arrToVarImPhEEvRT_T0_>
+ offset += 4;
+ 8003f96: 693b ldr r3, [r7, #16]
+ 8003f98: 3304 adds r3, #4
+ 8003f9a: 613b str r3, [r7, #16]
+ for(unsigned int k= offset; k< offset+length_msg; ++k){
+ 8003f9c: 693b ldr r3, [r7, #16]
+ 8003f9e: 617b str r3, [r7, #20]
+ 8003fa0: 693a ldr r2, [r7, #16]
+ 8003fa2: 68fb ldr r3, [r7, #12]
+ 8003fa4: 4413 add r3, r2
+ 8003fa6: 697a ldr r2, [r7, #20]
+ 8003fa8: 429a cmp r2, r3
+ 8003faa: d20c bcs.n 8003fc6 <_ZN14rosserial_msgs3Log11deserializeEPh+0x62>
+ inbuffer[k-1]=inbuffer[k];
+ 8003fac: 683a ldr r2, [r7, #0]
+ 8003fae: 697b ldr r3, [r7, #20]
+ 8003fb0: 441a add r2, r3
+ 8003fb2: 697b ldr r3, [r7, #20]
+ 8003fb4: 3b01 subs r3, #1
+ 8003fb6: 6839 ldr r1, [r7, #0]
+ 8003fb8: 440b add r3, r1
+ 8003fba: 7812 ldrb r2, [r2, #0]
+ 8003fbc: 701a strb r2, [r3, #0]
+ for(unsigned int k= offset; k< offset+length_msg; ++k){
+ 8003fbe: 697b ldr r3, [r7, #20]
+ 8003fc0: 3301 adds r3, #1
+ 8003fc2: 617b str r3, [r7, #20]
+ 8003fc4: e7ec b.n 8003fa0 <_ZN14rosserial_msgs3Log11deserializeEPh+0x3c>
+ }
+ inbuffer[offset+length_msg-1]=0;
+ 8003fc6: 693a ldr r2, [r7, #16]
+ 8003fc8: 68fb ldr r3, [r7, #12]
+ 8003fca: 4413 add r3, r2
+ 8003fcc: 3b01 subs r3, #1
+ 8003fce: 683a ldr r2, [r7, #0]
+ 8003fd0: 4413 add r3, r2
+ 8003fd2: 2200 movs r2, #0
+ 8003fd4: 701a strb r2, [r3, #0]
+ this->msg = (char *)(inbuffer + offset-1);
+ 8003fd6: 693b ldr r3, [r7, #16]
+ 8003fd8: 3b01 subs r3, #1
+ 8003fda: 683a ldr r2, [r7, #0]
+ 8003fdc: 441a add r2, r3
+ 8003fde: 687b ldr r3, [r7, #4]
+ 8003fe0: 609a str r2, [r3, #8]
+ offset += length_msg;
+ 8003fe2: 693a ldr r2, [r7, #16]
+ 8003fe4: 68fb ldr r3, [r7, #12]
+ 8003fe6: 4413 add r3, r2
+ 8003fe8: 613b str r3, [r7, #16]
+ return offset;
+ 8003fea: 693b ldr r3, [r7, #16]
+ }
+ 8003fec: 4618 mov r0, r3
+ 8003fee: 3718 adds r7, #24
+ 8003ff0: 46bd mov sp, r7
+ 8003ff2: bd80 pop {r7, pc}
+
+08003ff4 <_ZN14rosserial_msgs3Log7getTypeEv>:
+
+ const char * getType(){ return "rosserial_msgs/Log"; };
+ 8003ff4: b480 push {r7}
+ 8003ff6: b083 sub sp, #12
+ 8003ff8: af00 add r7, sp, #0
+ 8003ffa: 6078 str r0, [r7, #4]
+ 8003ffc: 4b03 ldr r3, [pc, #12] ; (800400c <_ZN14rosserial_msgs3Log7getTypeEv+0x18>)
+ 8003ffe: 4618 mov r0, r3
+ 8004000: 370c adds r7, #12
+ 8004002: 46bd mov sp, r7
+ 8004004: f85d 7b04 ldr.w r7, [sp], #4
+ 8004008: 4770 bx lr
+ 800400a: bf00 nop
+ 800400c: 08005e84 .word 0x08005e84
+
+08004010 <_ZN14rosserial_msgs3Log6getMD5Ev>:
+ const char * getMD5(){ return "11abd731c25933261cd6183bd12d6295"; };
+ 8004010: b480 push {r7}
+ 8004012: b083 sub sp, #12
+ 8004014: af00 add r7, sp, #0
+ 8004016: 6078 str r0, [r7, #4]
+ 8004018: 4b03 ldr r3, [pc, #12] ; (8004028 <_ZN14rosserial_msgs3Log6getMD5Ev+0x18>)
+ 800401a: 4618 mov r0, r3
+ 800401c: 370c adds r7, #12
+ 800401e: 46bd mov sp, r7
+ 8004020: f85d 7b04 ldr.w r7, [sp], #4
+ 8004024: 4770 bx lr
+ 8004026: bf00 nop
+ 8004028: 08005e98 .word 0x08005e98
+
+0800402c <_ZN14rosserial_msgs20RequestParamResponseC1Ev>:
+ uint32_t strings_length;
+ typedef char* _strings_type;
+ _strings_type st_strings;
+ _strings_type * strings;
+
+ RequestParamResponse():
+ 800402c: b580 push {r7, lr}
+ 800402e: b082 sub sp, #8
+ 8004030: af00 add r7, sp, #0
+ 8004032: 6078 str r0, [r7, #4]
+ ints_length(0), ints(NULL),
+ floats_length(0), floats(NULL),
+ strings_length(0), strings(NULL)
+ 8004034: 687b ldr r3, [r7, #4]
+ 8004036: 4618 mov r0, r3
+ 8004038: f7ff fbd6 bl 80037e8 <_ZN3ros3MsgC1Ev>
+ 800403c: 4a0c ldr r2, [pc, #48] ; (8004070 <_ZN14rosserial_msgs20RequestParamResponseC1Ev+0x44>)
+ 800403e: 687b ldr r3, [r7, #4]
+ 8004040: 601a str r2, [r3, #0]
+ 8004042: 687b ldr r3, [r7, #4]
+ 8004044: 2200 movs r2, #0
+ 8004046: 605a str r2, [r3, #4]
+ 8004048: 687b ldr r3, [r7, #4]
+ 800404a: 2200 movs r2, #0
+ 800404c: 60da str r2, [r3, #12]
+ 800404e: 687b ldr r3, [r7, #4]
+ 8004050: 2200 movs r2, #0
+ 8004052: 611a str r2, [r3, #16]
+ 8004054: 687b ldr r3, [r7, #4]
+ 8004056: 2200 movs r2, #0
+ 8004058: 619a str r2, [r3, #24]
+ 800405a: 687b ldr r3, [r7, #4]
+ 800405c: 2200 movs r2, #0
+ 800405e: 61da str r2, [r3, #28]
+ 8004060: 687b ldr r3, [r7, #4]
+ 8004062: 2200 movs r2, #0
+ 8004064: 625a str r2, [r3, #36] ; 0x24
+ {
+ }
+ 8004066: 687b ldr r3, [r7, #4]
+ 8004068: 4618 mov r0, r3
+ 800406a: 3708 adds r7, #8
+ 800406c: 46bd mov sp, r7
+ 800406e: bd80 pop {r7, pc}
+ 8004070: 08005f88 .word 0x08005f88
+
+08004074 <_ZNK14rosserial_msgs20RequestParamResponse9serializeEPh>:
+
+ virtual int serialize(unsigned char *outbuffer) const
+ 8004074: b580 push {r7, lr}
+ 8004076: b08a sub sp, #40 ; 0x28
+ 8004078: af00 add r7, sp, #0
+ 800407a: 6078 str r0, [r7, #4]
+ 800407c: 6039 str r1, [r7, #0]
+ {
+ int offset = 0;
+ 800407e: 2300 movs r3, #0
+ 8004080: 627b str r3, [r7, #36] ; 0x24
+ *(outbuffer + offset + 0) = (this->ints_length >> (8 * 0)) & 0xFF;
+ 8004082: 687b ldr r3, [r7, #4]
+ 8004084: 6859 ldr r1, [r3, #4]
+ 8004086: 6a7b ldr r3, [r7, #36] ; 0x24
+ 8004088: 683a ldr r2, [r7, #0]
+ 800408a: 4413 add r3, r2
+ 800408c: b2ca uxtb r2, r1
+ 800408e: 701a strb r2, [r3, #0]
+ *(outbuffer + offset + 1) = (this->ints_length >> (8 * 1)) & 0xFF;
+ 8004090: 687b ldr r3, [r7, #4]
+ 8004092: 685b ldr r3, [r3, #4]
+ 8004094: 0a19 lsrs r1, r3, #8
+ 8004096: 6a7b ldr r3, [r7, #36] ; 0x24
+ 8004098: 3301 adds r3, #1
+ 800409a: 683a ldr r2, [r7, #0]
+ 800409c: 4413 add r3, r2
+ 800409e: b2ca uxtb r2, r1
+ 80040a0: 701a strb r2, [r3, #0]
+ *(outbuffer + offset + 2) = (this->ints_length >> (8 * 2)) & 0xFF;
+ 80040a2: 687b ldr r3, [r7, #4]
+ 80040a4: 685b ldr r3, [r3, #4]
+ 80040a6: 0c19 lsrs r1, r3, #16
+ 80040a8: 6a7b ldr r3, [r7, #36] ; 0x24
+ 80040aa: 3302 adds r3, #2
+ 80040ac: 683a ldr r2, [r7, #0]
+ 80040ae: 4413 add r3, r2
+ 80040b0: b2ca uxtb r2, r1
+ 80040b2: 701a strb r2, [r3, #0]
+ *(outbuffer + offset + 3) = (this->ints_length >> (8 * 3)) & 0xFF;
+ 80040b4: 687b ldr r3, [r7, #4]
+ 80040b6: 685b ldr r3, [r3, #4]
+ 80040b8: 0e19 lsrs r1, r3, #24
+ 80040ba: 6a7b ldr r3, [r7, #36] ; 0x24
+ 80040bc: 3303 adds r3, #3
+ 80040be: 683a ldr r2, [r7, #0]
+ 80040c0: 4413 add r3, r2
+ 80040c2: b2ca uxtb r2, r1
+ 80040c4: 701a strb r2, [r3, #0]
+ offset += sizeof(this->ints_length);
+ 80040c6: 6a7b ldr r3, [r7, #36] ; 0x24
+ 80040c8: 3304 adds r3, #4
+ 80040ca: 627b str r3, [r7, #36] ; 0x24
+ for( uint32_t i = 0; i < ints_length; i++){
+ 80040cc: 2300 movs r3, #0
+ 80040ce: 623b str r3, [r7, #32]
+ 80040d0: 687b ldr r3, [r7, #4]
+ 80040d2: 685b ldr r3, [r3, #4]
+ 80040d4: 6a3a ldr r2, [r7, #32]
+ 80040d6: 429a cmp r2, r3
+ 80040d8: d22b bcs.n 8004132 <_ZNK14rosserial_msgs20RequestParamResponse9serializeEPh+0xbe>
+ union {
+ int32_t real;
+ uint32_t base;
+ } u_intsi;
+ u_intsi.real = this->ints[i];
+ 80040da: 687b ldr r3, [r7, #4]
+ 80040dc: 68da ldr r2, [r3, #12]
+ 80040de: 6a3b ldr r3, [r7, #32]
+ 80040e0: 009b lsls r3, r3, #2
+ 80040e2: 4413 add r3, r2
+ 80040e4: 681b ldr r3, [r3, #0]
+ 80040e6: 613b str r3, [r7, #16]
+ *(outbuffer + offset + 0) = (u_intsi.base >> (8 * 0)) & 0xFF;
+ 80040e8: 6939 ldr r1, [r7, #16]
+ 80040ea: 6a7b ldr r3, [r7, #36] ; 0x24
+ 80040ec: 683a ldr r2, [r7, #0]
+ 80040ee: 4413 add r3, r2
+ 80040f0: b2ca uxtb r2, r1
+ 80040f2: 701a strb r2, [r3, #0]
+ *(outbuffer + offset + 1) = (u_intsi.base >> (8 * 1)) & 0xFF;
+ 80040f4: 693b ldr r3, [r7, #16]
+ 80040f6: 0a19 lsrs r1, r3, #8
+ 80040f8: 6a7b ldr r3, [r7, #36] ; 0x24
+ 80040fa: 3301 adds r3, #1
+ 80040fc: 683a ldr r2, [r7, #0]
+ 80040fe: 4413 add r3, r2
+ 8004100: b2ca uxtb r2, r1
+ 8004102: 701a strb r2, [r3, #0]
+ *(outbuffer + offset + 2) = (u_intsi.base >> (8 * 2)) & 0xFF;
+ 8004104: 693b ldr r3, [r7, #16]
+ 8004106: 0c19 lsrs r1, r3, #16
+ 8004108: 6a7b ldr r3, [r7, #36] ; 0x24
+ 800410a: 3302 adds r3, #2
+ 800410c: 683a ldr r2, [r7, #0]
+ 800410e: 4413 add r3, r2
+ 8004110: b2ca uxtb r2, r1
+ 8004112: 701a strb r2, [r3, #0]
+ *(outbuffer + offset + 3) = (u_intsi.base >> (8 * 3)) & 0xFF;
+ 8004114: 693b ldr r3, [r7, #16]
+ 8004116: 0e19 lsrs r1, r3, #24
+ 8004118: 6a7b ldr r3, [r7, #36] ; 0x24
+ 800411a: 3303 adds r3, #3
+ 800411c: 683a ldr r2, [r7, #0]
+ 800411e: 4413 add r3, r2
+ 8004120: b2ca uxtb r2, r1
+ 8004122: 701a strb r2, [r3, #0]
+ offset += sizeof(this->ints[i]);
+ 8004124: 6a7b ldr r3, [r7, #36] ; 0x24
+ 8004126: 3304 adds r3, #4
+ 8004128: 627b str r3, [r7, #36] ; 0x24
+ for( uint32_t i = 0; i < ints_length; i++){
+ 800412a: 6a3b ldr r3, [r7, #32]
+ 800412c: 3301 adds r3, #1
+ 800412e: 623b str r3, [r7, #32]
+ 8004130: e7ce b.n 80040d0 <_ZNK14rosserial_msgs20RequestParamResponse9serializeEPh+0x5c>
+ }
+ *(outbuffer + offset + 0) = (this->floats_length >> (8 * 0)) & 0xFF;
+ 8004132: 687b ldr r3, [r7, #4]
+ 8004134: 6919 ldr r1, [r3, #16]
+ 8004136: 6a7b ldr r3, [r7, #36] ; 0x24
+ 8004138: 683a ldr r2, [r7, #0]
+ 800413a: 4413 add r3, r2
+ 800413c: b2ca uxtb r2, r1
+ 800413e: 701a strb r2, [r3, #0]
+ *(outbuffer + offset + 1) = (this->floats_length >> (8 * 1)) & 0xFF;
+ 8004140: 687b ldr r3, [r7, #4]
+ 8004142: 691b ldr r3, [r3, #16]
+ 8004144: 0a19 lsrs r1, r3, #8
+ 8004146: 6a7b ldr r3, [r7, #36] ; 0x24
+ 8004148: 3301 adds r3, #1
+ 800414a: 683a ldr r2, [r7, #0]
+ 800414c: 4413 add r3, r2
+ 800414e: b2ca uxtb r2, r1
+ 8004150: 701a strb r2, [r3, #0]
+ *(outbuffer + offset + 2) = (this->floats_length >> (8 * 2)) & 0xFF;
+ 8004152: 687b ldr r3, [r7, #4]
+ 8004154: 691b ldr r3, [r3, #16]
+ 8004156: 0c19 lsrs r1, r3, #16
+ 8004158: 6a7b ldr r3, [r7, #36] ; 0x24
+ 800415a: 3302 adds r3, #2
+ 800415c: 683a ldr r2, [r7, #0]
+ 800415e: 4413 add r3, r2
+ 8004160: b2ca uxtb r2, r1
+ 8004162: 701a strb r2, [r3, #0]
+ *(outbuffer + offset + 3) = (this->floats_length >> (8 * 3)) & 0xFF;
+ 8004164: 687b ldr r3, [r7, #4]
+ 8004166: 691b ldr r3, [r3, #16]
+ 8004168: 0e19 lsrs r1, r3, #24
+ 800416a: 6a7b ldr r3, [r7, #36] ; 0x24
+ 800416c: 3303 adds r3, #3
+ 800416e: 683a ldr r2, [r7, #0]
+ 8004170: 4413 add r3, r2
+ 8004172: b2ca uxtb r2, r1
+ 8004174: 701a strb r2, [r3, #0]
+ offset += sizeof(this->floats_length);
+ 8004176: 6a7b ldr r3, [r7, #36] ; 0x24
+ 8004178: 3304 adds r3, #4
+ 800417a: 627b str r3, [r7, #36] ; 0x24
+ for( uint32_t i = 0; i < floats_length; i++){
+ 800417c: 2300 movs r3, #0
+ 800417e: 61fb str r3, [r7, #28]
+ 8004180: 687b ldr r3, [r7, #4]
+ 8004182: 691b ldr r3, [r3, #16]
+ 8004184: 69fa ldr r2, [r7, #28]
+ 8004186: 429a cmp r2, r3
+ 8004188: d22b bcs.n 80041e2 <_ZNK14rosserial_msgs20RequestParamResponse9serializeEPh+0x16e>
+ union {
+ float real;
+ uint32_t base;
+ } u_floatsi;
+ u_floatsi.real = this->floats[i];
+ 800418a: 687b ldr r3, [r7, #4]
+ 800418c: 699a ldr r2, [r3, #24]
+ 800418e: 69fb ldr r3, [r7, #28]
+ 8004190: 009b lsls r3, r3, #2
+ 8004192: 4413 add r3, r2
+ 8004194: 681b ldr r3, [r3, #0]
+ 8004196: 60fb str r3, [r7, #12]
+ *(outbuffer + offset + 0) = (u_floatsi.base >> (8 * 0)) & 0xFF;
+ 8004198: 68f9 ldr r1, [r7, #12]
+ 800419a: 6a7b ldr r3, [r7, #36] ; 0x24
+ 800419c: 683a ldr r2, [r7, #0]
+ 800419e: 4413 add r3, r2
+ 80041a0: b2ca uxtb r2, r1
+ 80041a2: 701a strb r2, [r3, #0]
+ *(outbuffer + offset + 1) = (u_floatsi.base >> (8 * 1)) & 0xFF;
+ 80041a4: 68fb ldr r3, [r7, #12]
+ 80041a6: 0a19 lsrs r1, r3, #8
+ 80041a8: 6a7b ldr r3, [r7, #36] ; 0x24
+ 80041aa: 3301 adds r3, #1
+ 80041ac: 683a ldr r2, [r7, #0]
+ 80041ae: 4413 add r3, r2
+ 80041b0: b2ca uxtb r2, r1
+ 80041b2: 701a strb r2, [r3, #0]
+ *(outbuffer + offset + 2) = (u_floatsi.base >> (8 * 2)) & 0xFF;
+ 80041b4: 68fb ldr r3, [r7, #12]
+ 80041b6: 0c19 lsrs r1, r3, #16
+ 80041b8: 6a7b ldr r3, [r7, #36] ; 0x24
+ 80041ba: 3302 adds r3, #2
+ 80041bc: 683a ldr r2, [r7, #0]
+ 80041be: 4413 add r3, r2
+ 80041c0: b2ca uxtb r2, r1
+ 80041c2: 701a strb r2, [r3, #0]
+ *(outbuffer + offset + 3) = (u_floatsi.base >> (8 * 3)) & 0xFF;
+ 80041c4: 68fb ldr r3, [r7, #12]
+ 80041c6: 0e19 lsrs r1, r3, #24
+ 80041c8: 6a7b ldr r3, [r7, #36] ; 0x24
+ 80041ca: 3303 adds r3, #3
+ 80041cc: 683a ldr r2, [r7, #0]
+ 80041ce: 4413 add r3, r2
+ 80041d0: b2ca uxtb r2, r1
+ 80041d2: 701a strb r2, [r3, #0]
+ offset += sizeof(this->floats[i]);
+ 80041d4: 6a7b ldr r3, [r7, #36] ; 0x24
+ 80041d6: 3304 adds r3, #4
+ 80041d8: 627b str r3, [r7, #36] ; 0x24
+ for( uint32_t i = 0; i < floats_length; i++){
+ 80041da: 69fb ldr r3, [r7, #28]
+ 80041dc: 3301 adds r3, #1
+ 80041de: 61fb str r3, [r7, #28]
+ 80041e0: e7ce b.n 8004180 <_ZNK14rosserial_msgs20RequestParamResponse9serializeEPh+0x10c>
+ }
+ *(outbuffer + offset + 0) = (this->strings_length >> (8 * 0)) & 0xFF;
+ 80041e2: 687b ldr r3, [r7, #4]
+ 80041e4: 69d9 ldr r1, [r3, #28]
+ 80041e6: 6a7b ldr r3, [r7, #36] ; 0x24
+ 80041e8: 683a ldr r2, [r7, #0]
+ 80041ea: 4413 add r3, r2
+ 80041ec: b2ca uxtb r2, r1
+ 80041ee: 701a strb r2, [r3, #0]
+ *(outbuffer + offset + 1) = (this->strings_length >> (8 * 1)) & 0xFF;
+ 80041f0: 687b ldr r3, [r7, #4]
+ 80041f2: 69db ldr r3, [r3, #28]
+ 80041f4: 0a19 lsrs r1, r3, #8
+ 80041f6: 6a7b ldr r3, [r7, #36] ; 0x24
+ 80041f8: 3301 adds r3, #1
+ 80041fa: 683a ldr r2, [r7, #0]
+ 80041fc: 4413 add r3, r2
+ 80041fe: b2ca uxtb r2, r1
+ 8004200: 701a strb r2, [r3, #0]
+ *(outbuffer + offset + 2) = (this->strings_length >> (8 * 2)) & 0xFF;
+ 8004202: 687b ldr r3, [r7, #4]
+ 8004204: 69db ldr r3, [r3, #28]
+ 8004206: 0c19 lsrs r1, r3, #16
+ 8004208: 6a7b ldr r3, [r7, #36] ; 0x24
+ 800420a: 3302 adds r3, #2
+ 800420c: 683a ldr r2, [r7, #0]
+ 800420e: 4413 add r3, r2
+ 8004210: b2ca uxtb r2, r1
+ 8004212: 701a strb r2, [r3, #0]
+ *(outbuffer + offset + 3) = (this->strings_length >> (8 * 3)) & 0xFF;
+ 8004214: 687b ldr r3, [r7, #4]
+ 8004216: 69db ldr r3, [r3, #28]
+ 8004218: 0e19 lsrs r1, r3, #24
+ 800421a: 6a7b ldr r3, [r7, #36] ; 0x24
+ 800421c: 3303 adds r3, #3
+ 800421e: 683a ldr r2, [r7, #0]
+ 8004220: 4413 add r3, r2
+ 8004222: b2ca uxtb r2, r1
+ 8004224: 701a strb r2, [r3, #0]
+ offset += sizeof(this->strings_length);
+ 8004226: 6a7b ldr r3, [r7, #36] ; 0x24
+ 8004228: 3304 adds r3, #4
+ 800422a: 627b str r3, [r7, #36] ; 0x24
+ for( uint32_t i = 0; i < strings_length; i++){
+ 800422c: 2300 movs r3, #0
+ 800422e: 61bb str r3, [r7, #24]
+ 8004230: 687b ldr r3, [r7, #4]
+ 8004232: 69db ldr r3, [r3, #28]
+ 8004234: 69ba ldr r2, [r7, #24]
+ 8004236: 429a cmp r2, r3
+ 8004238: d228 bcs.n 800428c <_ZNK14rosserial_msgs20RequestParamResponse9serializeEPh+0x218>
+ uint32_t length_stringsi = strlen(this->strings[i]);
+ 800423a: 687b ldr r3, [r7, #4]
+ 800423c: 6a5a ldr r2, [r3, #36] ; 0x24
+ 800423e: 69bb ldr r3, [r7, #24]
+ 8004240: 009b lsls r3, r3, #2
+ 8004242: 4413 add r3, r2
+ 8004244: 681b ldr r3, [r3, #0]
+ 8004246: 4618 mov r0, r3
+ 8004248: f7fb fff6 bl 8000238 <strlen>
+ 800424c: 6178 str r0, [r7, #20]
+ varToArr(outbuffer + offset, length_stringsi);
+ 800424e: 6a7b ldr r3, [r7, #36] ; 0x24
+ 8004250: 683a ldr r2, [r7, #0]
+ 8004252: 4413 add r3, r2
+ 8004254: 6979 ldr r1, [r7, #20]
+ 8004256: 4618 mov r0, r3
+ 8004258: f000 fcbd bl 8004bd6 <_ZN3ros3Msg8varToArrIPhmEEvT_T0_>
+ offset += 4;
+ 800425c: 6a7b ldr r3, [r7, #36] ; 0x24
+ 800425e: 3304 adds r3, #4
+ 8004260: 627b str r3, [r7, #36] ; 0x24
+ memcpy(outbuffer + offset, this->strings[i], length_stringsi);
+ 8004262: 6a7b ldr r3, [r7, #36] ; 0x24
+ 8004264: 683a ldr r2, [r7, #0]
+ 8004266: 18d0 adds r0, r2, r3
+ 8004268: 687b ldr r3, [r7, #4]
+ 800426a: 6a5a ldr r2, [r3, #36] ; 0x24
+ 800426c: 69bb ldr r3, [r7, #24]
+ 800426e: 009b lsls r3, r3, #2
+ 8004270: 4413 add r3, r2
+ 8004272: 681b ldr r3, [r3, #0]
+ 8004274: 697a ldr r2, [r7, #20]
+ 8004276: 4619 mov r1, r3
+ 8004278: f001 fc5a bl 8005b30 <memcpy>
+ offset += length_stringsi;
+ 800427c: 6a7a ldr r2, [r7, #36] ; 0x24
+ 800427e: 697b ldr r3, [r7, #20]
+ 8004280: 4413 add r3, r2
+ 8004282: 627b str r3, [r7, #36] ; 0x24
+ for( uint32_t i = 0; i < strings_length; i++){
+ 8004284: 69bb ldr r3, [r7, #24]
+ 8004286: 3301 adds r3, #1
+ 8004288: 61bb str r3, [r7, #24]
+ 800428a: e7d1 b.n 8004230 <_ZNK14rosserial_msgs20RequestParamResponse9serializeEPh+0x1bc>
+ }
+ return offset;
+ 800428c: 6a7b ldr r3, [r7, #36] ; 0x24
+ }
+ 800428e: 4618 mov r0, r3
+ 8004290: 3728 adds r7, #40 ; 0x28
+ 8004292: 46bd mov sp, r7
+ 8004294: bd80 pop {r7, pc}
+
+08004296 <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh>:
+
+ virtual int deserialize(unsigned char *inbuffer)
+ 8004296: b580 push {r7, lr}
+ 8004298: b08e sub sp, #56 ; 0x38
+ 800429a: af00 add r7, sp, #0
+ 800429c: 6078 str r0, [r7, #4]
+ 800429e: 6039 str r1, [r7, #0]
+ {
+ int offset = 0;
+ 80042a0: 2300 movs r3, #0
+ 80042a2: 637b str r3, [r7, #52] ; 0x34
+ uint32_t ints_lengthT = ((uint32_t) (*(inbuffer + offset)));
+ 80042a4: 6b7b ldr r3, [r7, #52] ; 0x34
+ 80042a6: 683a ldr r2, [r7, #0]
+ 80042a8: 4413 add r3, r2
+ 80042aa: 781b ldrb r3, [r3, #0]
+ 80042ac: 623b str r3, [r7, #32]
+ ints_lengthT |= ((uint32_t) (*(inbuffer + offset + 1))) << (8 * 1);
+ 80042ae: 6b7b ldr r3, [r7, #52] ; 0x34
+ 80042b0: 3301 adds r3, #1
+ 80042b2: 683a ldr r2, [r7, #0]
+ 80042b4: 4413 add r3, r2
+ 80042b6: 781b ldrb r3, [r3, #0]
+ 80042b8: 021b lsls r3, r3, #8
+ 80042ba: 6a3a ldr r2, [r7, #32]
+ 80042bc: 4313 orrs r3, r2
+ 80042be: 623b str r3, [r7, #32]
+ ints_lengthT |= ((uint32_t) (*(inbuffer + offset + 2))) << (8 * 2);
+ 80042c0: 6b7b ldr r3, [r7, #52] ; 0x34
+ 80042c2: 3302 adds r3, #2
+ 80042c4: 683a ldr r2, [r7, #0]
+ 80042c6: 4413 add r3, r2
+ 80042c8: 781b ldrb r3, [r3, #0]
+ 80042ca: 041b lsls r3, r3, #16
+ 80042cc: 6a3a ldr r2, [r7, #32]
+ 80042ce: 4313 orrs r3, r2
+ 80042d0: 623b str r3, [r7, #32]
+ ints_lengthT |= ((uint32_t) (*(inbuffer + offset + 3))) << (8 * 3);
+ 80042d2: 6b7b ldr r3, [r7, #52] ; 0x34
+ 80042d4: 3303 adds r3, #3
+ 80042d6: 683a ldr r2, [r7, #0]
+ 80042d8: 4413 add r3, r2
+ 80042da: 781b ldrb r3, [r3, #0]
+ 80042dc: 061b lsls r3, r3, #24
+ 80042de: 6a3a ldr r2, [r7, #32]
+ 80042e0: 4313 orrs r3, r2
+ 80042e2: 623b str r3, [r7, #32]
+ offset += sizeof(this->ints_length);
+ 80042e4: 6b7b ldr r3, [r7, #52] ; 0x34
+ 80042e6: 3304 adds r3, #4
+ 80042e8: 637b str r3, [r7, #52] ; 0x34
+ if(ints_lengthT > ints_length)
+ 80042ea: 687b ldr r3, [r7, #4]
+ 80042ec: 685b ldr r3, [r3, #4]
+ 80042ee: 6a3a ldr r2, [r7, #32]
+ 80042f0: 429a cmp r2, r3
+ 80042f2: d90a bls.n 800430a <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x74>
+ this->ints = (int32_t*)realloc(this->ints, ints_lengthT * sizeof(int32_t));
+ 80042f4: 687b ldr r3, [r7, #4]
+ 80042f6: 68da ldr r2, [r3, #12]
+ 80042f8: 6a3b ldr r3, [r7, #32]
+ 80042fa: 009b lsls r3, r3, #2
+ 80042fc: 4619 mov r1, r3
+ 80042fe: 4610 mov r0, r2
+ 8004300: f001 fc2a bl 8005b58 <realloc>
+ 8004304: 4602 mov r2, r0
+ 8004306: 687b ldr r3, [r7, #4]
+ 8004308: 60da str r2, [r3, #12]
+ ints_length = ints_lengthT;
+ 800430a: 687b ldr r3, [r7, #4]
+ 800430c: 6a3a ldr r2, [r7, #32]
+ 800430e: 605a str r2, [r3, #4]
+ for( uint32_t i = 0; i < ints_length; i++){
+ 8004310: 2300 movs r3, #0
+ 8004312: 633b str r3, [r7, #48] ; 0x30
+ 8004314: 687b ldr r3, [r7, #4]
+ 8004316: 685b ldr r3, [r3, #4]
+ 8004318: 6b3a ldr r2, [r7, #48] ; 0x30
+ 800431a: 429a cmp r2, r3
+ 800431c: d236 bcs.n 800438c <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0xf6>
+ union {
+ int32_t real;
+ uint32_t base;
+ } u_st_ints;
+ u_st_ints.base = 0;
+ 800431e: 2300 movs r3, #0
+ 8004320: 617b str r3, [r7, #20]
+ u_st_ints.base |= ((uint32_t) (*(inbuffer + offset + 0))) << (8 * 0);
+ 8004322: 697b ldr r3, [r7, #20]
+ 8004324: 6b7a ldr r2, [r7, #52] ; 0x34
+ 8004326: 6839 ldr r1, [r7, #0]
+ 8004328: 440a add r2, r1
+ 800432a: 7812 ldrb r2, [r2, #0]
+ 800432c: 4313 orrs r3, r2
+ 800432e: 617b str r3, [r7, #20]
+ u_st_ints.base |= ((uint32_t) (*(inbuffer + offset + 1))) << (8 * 1);
+ 8004330: 697a ldr r2, [r7, #20]
+ 8004332: 6b7b ldr r3, [r7, #52] ; 0x34
+ 8004334: 3301 adds r3, #1
+ 8004336: 6839 ldr r1, [r7, #0]
+ 8004338: 440b add r3, r1
+ 800433a: 781b ldrb r3, [r3, #0]
+ 800433c: 021b lsls r3, r3, #8
+ 800433e: 4313 orrs r3, r2
+ 8004340: 617b str r3, [r7, #20]
+ u_st_ints.base |= ((uint32_t) (*(inbuffer + offset + 2))) << (8 * 2);
+ 8004342: 697a ldr r2, [r7, #20]
+ 8004344: 6b7b ldr r3, [r7, #52] ; 0x34
+ 8004346: 3302 adds r3, #2
+ 8004348: 6839 ldr r1, [r7, #0]
+ 800434a: 440b add r3, r1
+ 800434c: 781b ldrb r3, [r3, #0]
+ 800434e: 041b lsls r3, r3, #16
+ 8004350: 4313 orrs r3, r2
+ 8004352: 617b str r3, [r7, #20]
+ u_st_ints.base |= ((uint32_t) (*(inbuffer + offset + 3))) << (8 * 3);
+ 8004354: 697a ldr r2, [r7, #20]
+ 8004356: 6b7b ldr r3, [r7, #52] ; 0x34
+ 8004358: 3303 adds r3, #3
+ 800435a: 6839 ldr r1, [r7, #0]
+ 800435c: 440b add r3, r1
+ 800435e: 781b ldrb r3, [r3, #0]
+ 8004360: 061b lsls r3, r3, #24
+ 8004362: 4313 orrs r3, r2
+ 8004364: 617b str r3, [r7, #20]
+ this->st_ints = u_st_ints.real;
+ 8004366: 697a ldr r2, [r7, #20]
+ 8004368: 687b ldr r3, [r7, #4]
+ 800436a: 609a str r2, [r3, #8]
+ offset += sizeof(this->st_ints);
+ 800436c: 6b7b ldr r3, [r7, #52] ; 0x34
+ 800436e: 3304 adds r3, #4
+ 8004370: 637b str r3, [r7, #52] ; 0x34
+ memcpy( &(this->ints[i]), &(this->st_ints), sizeof(int32_t));
+ 8004372: 687b ldr r3, [r7, #4]
+ 8004374: 68da ldr r2, [r3, #12]
+ 8004376: 6b3b ldr r3, [r7, #48] ; 0x30
+ 8004378: 009b lsls r3, r3, #2
+ 800437a: 4413 add r3, r2
+ 800437c: 687a ldr r2, [r7, #4]
+ 800437e: 3208 adds r2, #8
+ 8004380: 6812 ldr r2, [r2, #0]
+ 8004382: 601a str r2, [r3, #0]
+ for( uint32_t i = 0; i < ints_length; i++){
+ 8004384: 6b3b ldr r3, [r7, #48] ; 0x30
+ 8004386: 3301 adds r3, #1
+ 8004388: 633b str r3, [r7, #48] ; 0x30
+ 800438a: e7c3 b.n 8004314 <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x7e>
+ }
+ uint32_t floats_lengthT = ((uint32_t) (*(inbuffer + offset)));
+ 800438c: 6b7b ldr r3, [r7, #52] ; 0x34
+ 800438e: 683a ldr r2, [r7, #0]
+ 8004390: 4413 add r3, r2
+ 8004392: 781b ldrb r3, [r3, #0]
+ 8004394: 61fb str r3, [r7, #28]
+ floats_lengthT |= ((uint32_t) (*(inbuffer + offset + 1))) << (8 * 1);
+ 8004396: 6b7b ldr r3, [r7, #52] ; 0x34
+ 8004398: 3301 adds r3, #1
+ 800439a: 683a ldr r2, [r7, #0]
+ 800439c: 4413 add r3, r2
+ 800439e: 781b ldrb r3, [r3, #0]
+ 80043a0: 021b lsls r3, r3, #8
+ 80043a2: 69fa ldr r2, [r7, #28]
+ 80043a4: 4313 orrs r3, r2
+ 80043a6: 61fb str r3, [r7, #28]
+ floats_lengthT |= ((uint32_t) (*(inbuffer + offset + 2))) << (8 * 2);
+ 80043a8: 6b7b ldr r3, [r7, #52] ; 0x34
+ 80043aa: 3302 adds r3, #2
+ 80043ac: 683a ldr r2, [r7, #0]
+ 80043ae: 4413 add r3, r2
+ 80043b0: 781b ldrb r3, [r3, #0]
+ 80043b2: 041b lsls r3, r3, #16
+ 80043b4: 69fa ldr r2, [r7, #28]
+ 80043b6: 4313 orrs r3, r2
+ 80043b8: 61fb str r3, [r7, #28]
+ floats_lengthT |= ((uint32_t) (*(inbuffer + offset + 3))) << (8 * 3);
+ 80043ba: 6b7b ldr r3, [r7, #52] ; 0x34
+ 80043bc: 3303 adds r3, #3
+ 80043be: 683a ldr r2, [r7, #0]
+ 80043c0: 4413 add r3, r2
+ 80043c2: 781b ldrb r3, [r3, #0]
+ 80043c4: 061b lsls r3, r3, #24
+ 80043c6: 69fa ldr r2, [r7, #28]
+ 80043c8: 4313 orrs r3, r2
+ 80043ca: 61fb str r3, [r7, #28]
+ offset += sizeof(this->floats_length);
+ 80043cc: 6b7b ldr r3, [r7, #52] ; 0x34
+ 80043ce: 3304 adds r3, #4
+ 80043d0: 637b str r3, [r7, #52] ; 0x34
+ if(floats_lengthT > floats_length)
+ 80043d2: 687b ldr r3, [r7, #4]
+ 80043d4: 691b ldr r3, [r3, #16]
+ 80043d6: 69fa ldr r2, [r7, #28]
+ 80043d8: 429a cmp r2, r3
+ 80043da: d90a bls.n 80043f2 <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x15c>
+ this->floats = (float*)realloc(this->floats, floats_lengthT * sizeof(float));
+ 80043dc: 687b ldr r3, [r7, #4]
+ 80043de: 699a ldr r2, [r3, #24]
+ 80043e0: 69fb ldr r3, [r7, #28]
+ 80043e2: 009b lsls r3, r3, #2
+ 80043e4: 4619 mov r1, r3
+ 80043e6: 4610 mov r0, r2
+ 80043e8: f001 fbb6 bl 8005b58 <realloc>
+ 80043ec: 4602 mov r2, r0
+ 80043ee: 687b ldr r3, [r7, #4]
+ 80043f0: 619a str r2, [r3, #24]
+ floats_length = floats_lengthT;
+ 80043f2: 687b ldr r3, [r7, #4]
+ 80043f4: 69fa ldr r2, [r7, #28]
+ 80043f6: 611a str r2, [r3, #16]
+ for( uint32_t i = 0; i < floats_length; i++){
+ 80043f8: 2300 movs r3, #0
+ 80043fa: 62fb str r3, [r7, #44] ; 0x2c
+ 80043fc: 687b ldr r3, [r7, #4]
+ 80043fe: 691b ldr r3, [r3, #16]
+ 8004400: 6afa ldr r2, [r7, #44] ; 0x2c
+ 8004402: 429a cmp r2, r3
+ 8004404: d236 bcs.n 8004474 <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x1de>
+ union {
+ float real;
+ uint32_t base;
+ } u_st_floats;
+ u_st_floats.base = 0;
+ 8004406: 2300 movs r3, #0
+ 8004408: 613b str r3, [r7, #16]
+ u_st_floats.base |= ((uint32_t) (*(inbuffer + offset + 0))) << (8 * 0);
+ 800440a: 693b ldr r3, [r7, #16]
+ 800440c: 6b7a ldr r2, [r7, #52] ; 0x34
+ 800440e: 6839 ldr r1, [r7, #0]
+ 8004410: 440a add r2, r1
+ 8004412: 7812 ldrb r2, [r2, #0]
+ 8004414: 4313 orrs r3, r2
+ 8004416: 613b str r3, [r7, #16]
+ u_st_floats.base |= ((uint32_t) (*(inbuffer + offset + 1))) << (8 * 1);
+ 8004418: 693a ldr r2, [r7, #16]
+ 800441a: 6b7b ldr r3, [r7, #52] ; 0x34
+ 800441c: 3301 adds r3, #1
+ 800441e: 6839 ldr r1, [r7, #0]
+ 8004420: 440b add r3, r1
+ 8004422: 781b ldrb r3, [r3, #0]
+ 8004424: 021b lsls r3, r3, #8
+ 8004426: 4313 orrs r3, r2
+ 8004428: 613b str r3, [r7, #16]
+ u_st_floats.base |= ((uint32_t) (*(inbuffer + offset + 2))) << (8 * 2);
+ 800442a: 693a ldr r2, [r7, #16]
+ 800442c: 6b7b ldr r3, [r7, #52] ; 0x34
+ 800442e: 3302 adds r3, #2
+ 8004430: 6839 ldr r1, [r7, #0]
+ 8004432: 440b add r3, r1
+ 8004434: 781b ldrb r3, [r3, #0]
+ 8004436: 041b lsls r3, r3, #16
+ 8004438: 4313 orrs r3, r2
+ 800443a: 613b str r3, [r7, #16]
+ u_st_floats.base |= ((uint32_t) (*(inbuffer + offset + 3))) << (8 * 3);
+ 800443c: 693a ldr r2, [r7, #16]
+ 800443e: 6b7b ldr r3, [r7, #52] ; 0x34
+ 8004440: 3303 adds r3, #3
+ 8004442: 6839 ldr r1, [r7, #0]
+ 8004444: 440b add r3, r1
+ 8004446: 781b ldrb r3, [r3, #0]
+ 8004448: 061b lsls r3, r3, #24
+ 800444a: 4313 orrs r3, r2
+ 800444c: 613b str r3, [r7, #16]
+ this->st_floats = u_st_floats.real;
+ 800444e: 693a ldr r2, [r7, #16]
+ 8004450: 687b ldr r3, [r7, #4]
+ 8004452: 615a str r2, [r3, #20]
+ offset += sizeof(this->st_floats);
+ 8004454: 6b7b ldr r3, [r7, #52] ; 0x34
+ 8004456: 3304 adds r3, #4
+ 8004458: 637b str r3, [r7, #52] ; 0x34
+ memcpy( &(this->floats[i]), &(this->st_floats), sizeof(float));
+ 800445a: 687b ldr r3, [r7, #4]
+ 800445c: 699a ldr r2, [r3, #24]
+ 800445e: 6afb ldr r3, [r7, #44] ; 0x2c
+ 8004460: 009b lsls r3, r3, #2
+ 8004462: 4413 add r3, r2
+ 8004464: 687a ldr r2, [r7, #4]
+ 8004466: 3214 adds r2, #20
+ 8004468: 6812 ldr r2, [r2, #0]
+ 800446a: 601a str r2, [r3, #0]
+ for( uint32_t i = 0; i < floats_length; i++){
+ 800446c: 6afb ldr r3, [r7, #44] ; 0x2c
+ 800446e: 3301 adds r3, #1
+ 8004470: 62fb str r3, [r7, #44] ; 0x2c
+ 8004472: e7c3 b.n 80043fc <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x166>
+ }
+ uint32_t strings_lengthT = ((uint32_t) (*(inbuffer + offset)));
+ 8004474: 6b7b ldr r3, [r7, #52] ; 0x34
+ 8004476: 683a ldr r2, [r7, #0]
+ 8004478: 4413 add r3, r2
+ 800447a: 781b ldrb r3, [r3, #0]
+ 800447c: 61bb str r3, [r7, #24]
+ strings_lengthT |= ((uint32_t) (*(inbuffer + offset + 1))) << (8 * 1);
+ 800447e: 6b7b ldr r3, [r7, #52] ; 0x34
+ 8004480: 3301 adds r3, #1
+ 8004482: 683a ldr r2, [r7, #0]
+ 8004484: 4413 add r3, r2
+ 8004486: 781b ldrb r3, [r3, #0]
+ 8004488: 021b lsls r3, r3, #8
+ 800448a: 69ba ldr r2, [r7, #24]
+ 800448c: 4313 orrs r3, r2
+ 800448e: 61bb str r3, [r7, #24]
+ strings_lengthT |= ((uint32_t) (*(inbuffer + offset + 2))) << (8 * 2);
+ 8004490: 6b7b ldr r3, [r7, #52] ; 0x34
+ 8004492: 3302 adds r3, #2
+ 8004494: 683a ldr r2, [r7, #0]
+ 8004496: 4413 add r3, r2
+ 8004498: 781b ldrb r3, [r3, #0]
+ 800449a: 041b lsls r3, r3, #16
+ 800449c: 69ba ldr r2, [r7, #24]
+ 800449e: 4313 orrs r3, r2
+ 80044a0: 61bb str r3, [r7, #24]
+ strings_lengthT |= ((uint32_t) (*(inbuffer + offset + 3))) << (8 * 3);
+ 80044a2: 6b7b ldr r3, [r7, #52] ; 0x34
+ 80044a4: 3303 adds r3, #3
+ 80044a6: 683a ldr r2, [r7, #0]
+ 80044a8: 4413 add r3, r2
+ 80044aa: 781b ldrb r3, [r3, #0]
+ 80044ac: 061b lsls r3, r3, #24
+ 80044ae: 69ba ldr r2, [r7, #24]
+ 80044b0: 4313 orrs r3, r2
+ 80044b2: 61bb str r3, [r7, #24]
+ offset += sizeof(this->strings_length);
+ 80044b4: 6b7b ldr r3, [r7, #52] ; 0x34
+ 80044b6: 3304 adds r3, #4
+ 80044b8: 637b str r3, [r7, #52] ; 0x34
+ if(strings_lengthT > strings_length)
+ 80044ba: 687b ldr r3, [r7, #4]
+ 80044bc: 69db ldr r3, [r3, #28]
+ 80044be: 69ba ldr r2, [r7, #24]
+ 80044c0: 429a cmp r2, r3
+ 80044c2: d90a bls.n 80044da <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x244>
+ this->strings = (char**)realloc(this->strings, strings_lengthT * sizeof(char*));
+ 80044c4: 687b ldr r3, [r7, #4]
+ 80044c6: 6a5a ldr r2, [r3, #36] ; 0x24
+ 80044c8: 69bb ldr r3, [r7, #24]
+ 80044ca: 009b lsls r3, r3, #2
+ 80044cc: 4619 mov r1, r3
+ 80044ce: 4610 mov r0, r2
+ 80044d0: f001 fb42 bl 8005b58 <realloc>
+ 80044d4: 4602 mov r2, r0
+ 80044d6: 687b ldr r3, [r7, #4]
+ 80044d8: 625a str r2, [r3, #36] ; 0x24
+ strings_length = strings_lengthT;
+ 80044da: 687b ldr r3, [r7, #4]
+ 80044dc: 69ba ldr r2, [r7, #24]
+ 80044de: 61da str r2, [r3, #28]
+ for( uint32_t i = 0; i < strings_length; i++){
+ 80044e0: 2300 movs r3, #0
+ 80044e2: 62bb str r3, [r7, #40] ; 0x28
+ 80044e4: 687b ldr r3, [r7, #4]
+ 80044e6: 69db ldr r3, [r3, #28]
+ 80044e8: 6aba ldr r2, [r7, #40] ; 0x28
+ 80044ea: 429a cmp r2, r3
+ 80044ec: d23f bcs.n 800456e <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x2d8>
+ uint32_t length_st_strings;
+ arrToVar(length_st_strings, (inbuffer + offset));
+ 80044ee: 6b7b ldr r3, [r7, #52] ; 0x34
+ 80044f0: 683a ldr r2, [r7, #0]
+ 80044f2: 441a add r2, r3
+ 80044f4: f107 030c add.w r3, r7, #12
+ 80044f8: 4611 mov r1, r2
+ 80044fa: 4618 mov r0, r3
+ 80044fc: f000 fb89 bl 8004c12 <_ZN3ros3Msg8arrToVarImPhEEvRT_T0_>
+ offset += 4;
+ 8004500: 6b7b ldr r3, [r7, #52] ; 0x34
+ 8004502: 3304 adds r3, #4
+ 8004504: 637b str r3, [r7, #52] ; 0x34
+ for(unsigned int k= offset; k< offset+length_st_strings; ++k){
+ 8004506: 6b7b ldr r3, [r7, #52] ; 0x34
+ 8004508: 627b str r3, [r7, #36] ; 0x24
+ 800450a: 6b7a ldr r2, [r7, #52] ; 0x34
+ 800450c: 68fb ldr r3, [r7, #12]
+ 800450e: 4413 add r3, r2
+ 8004510: 6a7a ldr r2, [r7, #36] ; 0x24
+ 8004512: 429a cmp r2, r3
+ 8004514: d20c bcs.n 8004530 <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x29a>
+ inbuffer[k-1]=inbuffer[k];
+ 8004516: 683a ldr r2, [r7, #0]
+ 8004518: 6a7b ldr r3, [r7, #36] ; 0x24
+ 800451a: 441a add r2, r3
+ 800451c: 6a7b ldr r3, [r7, #36] ; 0x24
+ 800451e: 3b01 subs r3, #1
+ 8004520: 6839 ldr r1, [r7, #0]
+ 8004522: 440b add r3, r1
+ 8004524: 7812 ldrb r2, [r2, #0]
+ 8004526: 701a strb r2, [r3, #0]
+ for(unsigned int k= offset; k< offset+length_st_strings; ++k){
+ 8004528: 6a7b ldr r3, [r7, #36] ; 0x24
+ 800452a: 3301 adds r3, #1
+ 800452c: 627b str r3, [r7, #36] ; 0x24
+ 800452e: e7ec b.n 800450a <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x274>
+ }
+ inbuffer[offset+length_st_strings-1]=0;
+ 8004530: 6b7a ldr r2, [r7, #52] ; 0x34
+ 8004532: 68fb ldr r3, [r7, #12]
+ 8004534: 4413 add r3, r2
+ 8004536: 3b01 subs r3, #1
+ 8004538: 683a ldr r2, [r7, #0]
+ 800453a: 4413 add r3, r2
+ 800453c: 2200 movs r2, #0
+ 800453e: 701a strb r2, [r3, #0]
+ this->st_strings = (char *)(inbuffer + offset-1);
+ 8004540: 6b7b ldr r3, [r7, #52] ; 0x34
+ 8004542: 3b01 subs r3, #1
+ 8004544: 683a ldr r2, [r7, #0]
+ 8004546: 441a add r2, r3
+ 8004548: 687b ldr r3, [r7, #4]
+ 800454a: 621a str r2, [r3, #32]
+ offset += length_st_strings;
+ 800454c: 6b7a ldr r2, [r7, #52] ; 0x34
+ 800454e: 68fb ldr r3, [r7, #12]
+ 8004550: 4413 add r3, r2
+ 8004552: 637b str r3, [r7, #52] ; 0x34
+ memcpy( &(this->strings[i]), &(this->st_strings), sizeof(char*));
+ 8004554: 687b ldr r3, [r7, #4]
+ 8004556: 6a5a ldr r2, [r3, #36] ; 0x24
+ 8004558: 6abb ldr r3, [r7, #40] ; 0x28
+ 800455a: 009b lsls r3, r3, #2
+ 800455c: 4413 add r3, r2
+ 800455e: 687a ldr r2, [r7, #4]
+ 8004560: 3220 adds r2, #32
+ 8004562: 6812 ldr r2, [r2, #0]
+ 8004564: 601a str r2, [r3, #0]
+ for( uint32_t i = 0; i < strings_length; i++){
+ 8004566: 6abb ldr r3, [r7, #40] ; 0x28
+ 8004568: 3301 adds r3, #1
+ 800456a: 62bb str r3, [r7, #40] ; 0x28
+ 800456c: e7ba b.n 80044e4 <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x24e>
+ }
+ return offset;
+ 800456e: 6b7b ldr r3, [r7, #52] ; 0x34
+ }
+ 8004570: 4618 mov r0, r3
+ 8004572: 3738 adds r7, #56 ; 0x38
+ 8004574: 46bd mov sp, r7
+ 8004576: bd80 pop {r7, pc}
+
+08004578 <_ZN14rosserial_msgs20RequestParamResponse7getTypeEv>:
+
+ const char * getType(){ return REQUESTPARAM; };
+ 8004578: b480 push {r7}
+ 800457a: b083 sub sp, #12
+ 800457c: af00 add r7, sp, #0
+ 800457e: 6078 str r0, [r7, #4]
+ 8004580: 4b03 ldr r3, [pc, #12] ; (8004590 <_ZN14rosserial_msgs20RequestParamResponse7getTypeEv+0x18>)
+ 8004582: 4618 mov r0, r3
+ 8004584: 370c adds r7, #12
+ 8004586: 46bd mov sp, r7
+ 8004588: f85d 7b04 ldr.w r7, [sp], #4
+ 800458c: 4770 bx lr
+ 800458e: bf00 nop
+ 8004590: 08005f3c .word 0x08005f3c
+
+08004594 <_ZN14rosserial_msgs20RequestParamResponse6getMD5Ev>:
+ const char * getMD5(){ return "9f0e98bda65981986ddf53afa7a40e49"; };
+ 8004594: b480 push {r7}
+ 8004596: b083 sub sp, #12
+ 8004598: af00 add r7, sp, #0
+ 800459a: 6078 str r0, [r7, #4]
+ 800459c: 4b03 ldr r3, [pc, #12] ; (80045ac <_ZN14rosserial_msgs20RequestParamResponse6getMD5Ev+0x18>)
+ 800459e: 4618 mov r0, r3
+ 80045a0: 370c adds r7, #12
+ 80045a2: 46bd mov sp, r7
+ 80045a4: f85d 7b04 ldr.w r7, [sp], #4
+ 80045a8: 4770 bx lr
+ 80045aa: bf00 nop
+ 80045ac: 08005ebc .word 0x08005ebc
+
+080045b0 <_ZN3ros9PublisherC1EPKcPNS_3MsgEi>:
+
+/* Generic Publisher */
+class Publisher
+{
+public:
+ Publisher(const char * topic_name, Msg * msg, int endpoint = rosserial_msgs::TopicInfo::ID_PUBLISHER) :
+ 80045b0: b480 push {r7}
+ 80045b2: b085 sub sp, #20
+ 80045b4: af00 add r7, sp, #0
+ 80045b6: 60f8 str r0, [r7, #12]
+ 80045b8: 60b9 str r1, [r7, #8]
+ 80045ba: 607a str r2, [r7, #4]
+ 80045bc: 603b str r3, [r7, #0]
+ topic_(topic_name),
+ msg_(msg),
+ endpoint_(endpoint) {};
+ 80045be: 68fb ldr r3, [r7, #12]
+ 80045c0: 68ba ldr r2, [r7, #8]
+ 80045c2: 601a str r2, [r3, #0]
+ 80045c4: 68fb ldr r3, [r7, #12]
+ 80045c6: 687a ldr r2, [r7, #4]
+ 80045c8: 605a str r2, [r3, #4]
+ 80045ca: 68fb ldr r3, [r7, #12]
+ 80045cc: 683a ldr r2, [r7, #0]
+ 80045ce: 611a str r2, [r3, #16]
+ 80045d0: 68fb ldr r3, [r7, #12]
+ 80045d2: 4618 mov r0, r3
+ 80045d4: 3714 adds r7, #20
+ 80045d6: 46bd mov sp, r7
+ 80045d8: f85d 7b04 ldr.w r7, [sp], #4
+ 80045dc: 4770 bx lr
+
+080045de <_ZN3ros9Publisher7publishEPKNS_3MsgE>:
+
+ int publish(const Msg * msg)
+ 80045de: b580 push {r7, lr}
+ 80045e0: b082 sub sp, #8
+ 80045e2: af00 add r7, sp, #0
+ 80045e4: 6078 str r0, [r7, #4]
+ 80045e6: 6039 str r1, [r7, #0]
+ {
+ return nh_->publish(id_, msg);
+ 80045e8: 687b ldr r3, [r7, #4]
+ 80045ea: 68d8 ldr r0, [r3, #12]
+ 80045ec: 687b ldr r3, [r7, #4]
+ 80045ee: 68db ldr r3, [r3, #12]
+ 80045f0: 681b ldr r3, [r3, #0]
+ 80045f2: 681b ldr r3, [r3, #0]
+ 80045f4: 687a ldr r2, [r7, #4]
+ 80045f6: 6891 ldr r1, [r2, #8]
+ 80045f8: 683a ldr r2, [r7, #0]
+ 80045fa: 4798 blx r3
+ 80045fc: 4603 mov r3, r0
+ };
+ 80045fe: 4618 mov r0, r3
+ 8004600: 3708 adds r7, #8
+ 8004602: 46bd mov sp, r7
+ 8004604: bd80 pop {r7, pc}
+
+08004606 <_ZN3ros9Publisher15getEndpointTypeEv>:
+ int getEndpointType()
+ 8004606: b480 push {r7}
+ 8004608: b083 sub sp, #12
+ 800460a: af00 add r7, sp, #0
+ 800460c: 6078 str r0, [r7, #4]
+ {
+ return endpoint_;
+ 800460e: 687b ldr r3, [r7, #4]
+ 8004610: 691b ldr r3, [r3, #16]
+ }
+ 8004612: 4618 mov r0, r3
+ 8004614: 370c adds r7, #12
+ 8004616: 46bd mov sp, r7
+ 8004618: f85d 7b04 ldr.w r7, [sp], #4
+ 800461c: 4770 bx lr
+
+0800461e <_ZN13STM32Hardware10getRdmaIndEv>:
+ UART_HandleTypeDef *huart;
+
+ const static uint16_t rbuflen = 128;
+ uint8_t rbuf[rbuflen];
+ uint32_t rind;
+ inline uint32_t getRdmaInd(void){ return (rbuflen - huart->hdmarx->Instance->NDTR) & (rbuflen - 1); }
+ 800461e: b480 push {r7}
+ 8004620: b083 sub sp, #12
+ 8004622: af00 add r7, sp, #0
+ 8004624: 6078 str r0, [r7, #4]
+ 8004626: 687b ldr r3, [r7, #4]
+ 8004628: 685b ldr r3, [r3, #4]
+ 800462a: 6edb ldr r3, [r3, #108] ; 0x6c
+ 800462c: 681b ldr r3, [r3, #0]
+ 800462e: 685b ldr r3, [r3, #4]
+ 8004630: 425b negs r3, r3
+ 8004632: f003 037f and.w r3, r3, #127 ; 0x7f
+ 8004636: 4618 mov r0, r3
+ 8004638: 370c adds r7, #12
+ 800463a: 46bd mov sp, r7
+ 800463c: f85d 7b04 ldr.w r7, [sp], #4
+ 8004640: 4770 bx lr
+ ...
+
+08004644 <_ZN13STM32HardwareC1Ev>:
+ const static uint16_t tbuflen = 256;
+ uint8_t tbuf[tbuflen];
+ uint32_t twind, tfind;
+
+ public:
+ STM32Hardware():
+ 8004644: b480 push {r7}
+ 8004646: b083 sub sp, #12
+ 8004648: af00 add r7, sp, #0
+ 800464a: 6078 str r0, [r7, #4]
+ htim(&htim2), huart(&huart3), rind(0), twind(0), tfind(0){
+ 800464c: 687b ldr r3, [r7, #4]
+ 800464e: 4a0c ldr r2, [pc, #48] ; (8004680 <_ZN13STM32HardwareC1Ev+0x3c>)
+ 8004650: 601a str r2, [r3, #0]
+ 8004652: 687b ldr r3, [r7, #4]
+ 8004654: 4a0b ldr r2, [pc, #44] ; (8004684 <_ZN13STM32HardwareC1Ev+0x40>)
+ 8004656: 605a str r2, [r3, #4]
+ 8004658: 687b ldr r3, [r7, #4]
+ 800465a: 2200 movs r2, #0
+ 800465c: f8c3 2088 str.w r2, [r3, #136] ; 0x88
+ 8004660: 687b ldr r3, [r7, #4]
+ 8004662: 2200 movs r2, #0
+ 8004664: f8c3 218c str.w r2, [r3, #396] ; 0x18c
+ 8004668: 687b ldr r3, [r7, #4]
+ 800466a: 2200 movs r2, #0
+ 800466c: f8c3 2190 str.w r2, [r3, #400] ; 0x190
+ }
+ 8004670: 687b ldr r3, [r7, #4]
+ 8004672: 4618 mov r0, r3
+ 8004674: 370c adds r7, #12
+ 8004676: 46bd mov sp, r7
+ 8004678: f85d 7b04 ldr.w r7, [sp], #4
+ 800467c: 4770 bx lr
+ 800467e: bf00 nop
+ 8004680: 20000094 .word 0x20000094
+ 8004684: 200000d4 .word 0x200000d4
+
+08004688 <_ZN13STM32Hardware4initEv>:
+
+ STM32Hardware(TIM_HandleTypeDef *htim_, UART_HandleTypeDef *huart_):
+ htim(htim_), huart(huart_), rind(0), twind(0), tfind(0){
+ }
+
+ void init(){
+ 8004688: b580 push {r7, lr}
+ 800468a: b082 sub sp, #8
+ 800468c: af00 add r7, sp, #0
+ 800468e: 6078 str r0, [r7, #4]
+ reset_rbuf();
+ 8004690: 6878 ldr r0, [r7, #4]
+ 8004692: f000 f809 bl 80046a8 <_ZN13STM32Hardware10reset_rbufEv>
+
+ HAL_TIM_Base_Start(htim);
+ 8004696: 687b ldr r3, [r7, #4]
+ 8004698: 681b ldr r3, [r3, #0]
+ 800469a: 4618 mov r0, r3
+ 800469c: f7fd feba bl 8002414 <HAL_TIM_Base_Start>
+ }
+ 80046a0: bf00 nop
+ 80046a2: 3708 adds r7, #8
+ 80046a4: 46bd mov sp, r7
+ 80046a6: bd80 pop {r7, pc}
+
+080046a8 <_ZN13STM32Hardware10reset_rbufEv>:
+
+ void reset_rbuf(void){
+ 80046a8: b580 push {r7, lr}
+ 80046aa: b082 sub sp, #8
+ 80046ac: af00 add r7, sp, #0
+ 80046ae: 6078 str r0, [r7, #4]
+ HAL_UART_Receive_DMA(huart, rbuf, rbuflen);
+ 80046b0: 687b ldr r3, [r7, #4]
+ 80046b2: 6858 ldr r0, [r3, #4]
+ 80046b4: 687b ldr r3, [r7, #4]
+ 80046b6: 3308 adds r3, #8
+ 80046b8: 2280 movs r2, #128 ; 0x80
+ 80046ba: 4619 mov r1, r3
+ 80046bc: f7fe f9ee bl 8002a9c <HAL_UART_Receive_DMA>
+ }
+ 80046c0: bf00 nop
+ 80046c2: 3708 adds r7, #8
+ 80046c4: 46bd mov sp, r7
+ 80046c6: bd80 pop {r7, pc}
+
+080046c8 <_ZN13STM32Hardware4readEv>:
+
+ int read(){
+ 80046c8: b590 push {r4, r7, lr}
+ 80046ca: b085 sub sp, #20
+ 80046cc: af00 add r7, sp, #0
+ 80046ce: 6078 str r0, [r7, #4]
+ int c = -1;
+ 80046d0: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff
+ 80046d4: 60fb str r3, [r7, #12]
+ if(rind != getRdmaInd()){
+ 80046d6: 687b ldr r3, [r7, #4]
+ 80046d8: f8d3 4088 ldr.w r4, [r3, #136] ; 0x88
+ 80046dc: 6878 ldr r0, [r7, #4]
+ 80046de: f7ff ff9e bl 800461e <_ZN13STM32Hardware10getRdmaIndEv>
+ 80046e2: 4603 mov r3, r0
+ 80046e4: 429c cmp r4, r3
+ 80046e6: bf14 ite ne
+ 80046e8: 2301 movne r3, #1
+ 80046ea: 2300 moveq r3, #0
+ 80046ec: b2db uxtb r3, r3
+ 80046ee: 2b00 cmp r3, #0
+ 80046f0: d012 beq.n 8004718 <_ZN13STM32Hardware4readEv+0x50>
+ c = rbuf[rind++];
+ 80046f2: 687b ldr r3, [r7, #4]
+ 80046f4: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88
+ 80046f8: 1c59 adds r1, r3, #1
+ 80046fa: 687a ldr r2, [r7, #4]
+ 80046fc: f8c2 1088 str.w r1, [r2, #136] ; 0x88
+ 8004700: 687a ldr r2, [r7, #4]
+ 8004702: 4413 add r3, r2
+ 8004704: 7a1b ldrb r3, [r3, #8]
+ 8004706: 60fb str r3, [r7, #12]
+ rind &= rbuflen - 1;
+ 8004708: 687b ldr r3, [r7, #4]
+ 800470a: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88
+ 800470e: f003 027f and.w r2, r3, #127 ; 0x7f
+ 8004712: 687b ldr r3, [r7, #4]
+ 8004714: f8c3 2088 str.w r2, [r3, #136] ; 0x88
+ }
+ return c;
+ 8004718: 68fb ldr r3, [r7, #12]
+ }
+ 800471a: 4618 mov r0, r3
+ 800471c: 3714 adds r7, #20
+ 800471e: 46bd mov sp, r7
+ 8004720: bd90 pop {r4, r7, pc}
+ ...
+
+08004724 <_ZN13STM32Hardware5flushEv>:
+
+ void flush(void){
+ 8004724: b580 push {r7, lr}
+ 8004726: b084 sub sp, #16
+ 8004728: af00 add r7, sp, #0
+ 800472a: 6078 str r0, [r7, #4]
+ static bool mutex = false;
+
+ if((huart->gState == HAL_UART_STATE_READY) && !mutex){
+ 800472c: 687b ldr r3, [r7, #4]
+ 800472e: 685b ldr r3, [r3, #4]
+ 8004730: 6f5b ldr r3, [r3, #116] ; 0x74
+ 8004732: 2b20 cmp r3, #32
+ 8004734: d108 bne.n 8004748 <_ZN13STM32Hardware5flushEv+0x24>
+ 8004736: 4b27 ldr r3, [pc, #156] ; (80047d4 <_ZN13STM32Hardware5flushEv+0xb0>)
+ 8004738: 781b ldrb r3, [r3, #0]
+ 800473a: f083 0301 eor.w r3, r3, #1
+ 800473e: b2db uxtb r3, r3
+ 8004740: 2b00 cmp r3, #0
+ 8004742: d001 beq.n 8004748 <_ZN13STM32Hardware5flushEv+0x24>
+ 8004744: 2301 movs r3, #1
+ 8004746: e000 b.n 800474a <_ZN13STM32Hardware5flushEv+0x26>
+ 8004748: 2300 movs r3, #0
+ 800474a: 2b00 cmp r3, #0
+ 800474c: d03e beq.n 80047cc <_ZN13STM32Hardware5flushEv+0xa8>
+ mutex = true;
+ 800474e: 4b21 ldr r3, [pc, #132] ; (80047d4 <_ZN13STM32Hardware5flushEv+0xb0>)
+ 8004750: 2201 movs r2, #1
+ 8004752: 701a strb r2, [r3, #0]
+
+ if(twind != tfind){
+ 8004754: 687b ldr r3, [r7, #4]
+ 8004756: f8d3 218c ldr.w r2, [r3, #396] ; 0x18c
+ 800475a: 687b ldr r3, [r7, #4]
+ 800475c: f8d3 3190 ldr.w r3, [r3, #400] ; 0x190
+ 8004760: 429a cmp r2, r3
+ 8004762: d030 beq.n 80047c6 <_ZN13STM32Hardware5flushEv+0xa2>
+ uint16_t len = tfind < twind ? twind - tfind : tbuflen - tfind;
+ 8004764: 687b ldr r3, [r7, #4]
+ 8004766: f8d3 2190 ldr.w r2, [r3, #400] ; 0x190
+ 800476a: 687b ldr r3, [r7, #4]
+ 800476c: f8d3 318c ldr.w r3, [r3, #396] ; 0x18c
+ 8004770: 429a cmp r2, r3
+ 8004772: d20a bcs.n 800478a <_ZN13STM32Hardware5flushEv+0x66>
+ 8004774: 687b ldr r3, [r7, #4]
+ 8004776: f8d3 318c ldr.w r3, [r3, #396] ; 0x18c
+ 800477a: b29a uxth r2, r3
+ 800477c: 687b ldr r3, [r7, #4]
+ 800477e: f8d3 3190 ldr.w r3, [r3, #400] ; 0x190
+ 8004782: b29b uxth r3, r3
+ 8004784: 1ad3 subs r3, r2, r3
+ 8004786: b29b uxth r3, r3
+ 8004788: e006 b.n 8004798 <_ZN13STM32Hardware5flushEv+0x74>
+ 800478a: 687b ldr r3, [r7, #4]
+ 800478c: f8d3 3190 ldr.w r3, [r3, #400] ; 0x190
+ 8004790: b29b uxth r3, r3
+ 8004792: f5c3 7380 rsb r3, r3, #256 ; 0x100
+ 8004796: b29b uxth r3, r3
+ 8004798: 81fb strh r3, [r7, #14]
+ HAL_UART_Transmit_DMA(huart, &(tbuf[tfind]), len);
+ 800479a: 687b ldr r3, [r7, #4]
+ 800479c: 6858 ldr r0, [r3, #4]
+ 800479e: 687b ldr r3, [r7, #4]
+ 80047a0: f8d3 3190 ldr.w r3, [r3, #400] ; 0x190
+ 80047a4: 3388 adds r3, #136 ; 0x88
+ 80047a6: 687a ldr r2, [r7, #4]
+ 80047a8: 4413 add r3, r2
+ 80047aa: 3304 adds r3, #4
+ 80047ac: 89fa ldrh r2, [r7, #14]
+ 80047ae: 4619 mov r1, r3
+ 80047b0: f7fe f8f8 bl 80029a4 <HAL_UART_Transmit_DMA>
+ tfind = (tfind + len) & (tbuflen - 1);
+ 80047b4: 687b ldr r3, [r7, #4]
+ 80047b6: f8d3 2190 ldr.w r2, [r3, #400] ; 0x190
+ 80047ba: 89fb ldrh r3, [r7, #14]
+ 80047bc: 4413 add r3, r2
+ 80047be: b2da uxtb r2, r3
+ 80047c0: 687b ldr r3, [r7, #4]
+ 80047c2: f8c3 2190 str.w r2, [r3, #400] ; 0x190
+ }
+ mutex = false;
+ 80047c6: 4b03 ldr r3, [pc, #12] ; (80047d4 <_ZN13STM32Hardware5flushEv+0xb0>)
+ 80047c8: 2200 movs r2, #0
+ 80047ca: 701a strb r2, [r3, #0]
+ }
+ }
+ 80047cc: bf00 nop
+ 80047ce: 3710 adds r7, #16
+ 80047d0: 46bd mov sp, r7
+ 80047d2: bd80 pop {r7, pc}
+ 80047d4: 20000090 .word 0x20000090
+
+080047d8 <_ZN13STM32Hardware5writeEPhi>:
+
+ void write(uint8_t* data, int length){
+ 80047d8: b580 push {r7, lr}
+ 80047da: b086 sub sp, #24
+ 80047dc: af00 add r7, sp, #0
+ 80047de: 60f8 str r0, [r7, #12]
+ 80047e0: 60b9 str r1, [r7, #8]
+ 80047e2: 607a str r2, [r7, #4]
+
+
+ int n = length;
+ 80047e4: 687b ldr r3, [r7, #4]
+ 80047e6: 617b str r3, [r7, #20]
+ n = n <= tbuflen ? n : tbuflen;
+ 80047e8: 697b ldr r3, [r7, #20]
+ 80047ea: f5b3 7f80 cmp.w r3, #256 ; 0x100
+ 80047ee: bfa8 it ge
+ 80047f0: f44f 7380 movge.w r3, #256 ; 0x100
+ 80047f4: 617b str r3, [r7, #20]
+
+ int n_tail = n <= tbuflen - twind ? n : tbuflen - twind;
+ 80047f6: 68fb ldr r3, [r7, #12]
+ 80047f8: f8d3 318c ldr.w r3, [r3, #396] ; 0x18c
+ 80047fc: f5c3 7280 rsb r2, r3, #256 ; 0x100
+ 8004800: 697b ldr r3, [r7, #20]
+ 8004802: 4293 cmp r3, r2
+ 8004804: bf28 it cs
+ 8004806: 4613 movcs r3, r2
+ 8004808: 613b str r3, [r7, #16]
+ memcpy(&(tbuf[twind]), data, n_tail);
+ 800480a: 68fb ldr r3, [r7, #12]
+ 800480c: f8d3 318c ldr.w r3, [r3, #396] ; 0x18c
+ 8004810: 3388 adds r3, #136 ; 0x88
+ 8004812: 68fa ldr r2, [r7, #12]
+ 8004814: 4413 add r3, r2
+ 8004816: 3304 adds r3, #4
+ 8004818: 693a ldr r2, [r7, #16]
+ 800481a: 68b9 ldr r1, [r7, #8]
+ 800481c: 4618 mov r0, r3
+ 800481e: f001 f987 bl 8005b30 <memcpy>
+ twind = (twind + n) & (tbuflen - 1);
+ 8004822: 68fb ldr r3, [r7, #12]
+ 8004824: f8d3 218c ldr.w r2, [r3, #396] ; 0x18c
+ 8004828: 697b ldr r3, [r7, #20]
+ 800482a: 4413 add r3, r2
+ 800482c: b2da uxtb r2, r3
+ 800482e: 68fb ldr r3, [r7, #12]
+ 8004830: f8c3 218c str.w r2, [r3, #396] ; 0x18c
+
+ if(n != n_tail){
+ 8004834: 697a ldr r2, [r7, #20]
+ 8004836: 693b ldr r3, [r7, #16]
+ 8004838: 429a cmp r2, r3
+ 800483a: d00b beq.n 8004854 <_ZN13STM32Hardware5writeEPhi+0x7c>
+ memcpy(tbuf, &(data[n_tail]), n - n_tail);
+ 800483c: 68fb ldr r3, [r7, #12]
+ 800483e: f103 008c add.w r0, r3, #140 ; 0x8c
+ 8004842: 693b ldr r3, [r7, #16]
+ 8004844: 68ba ldr r2, [r7, #8]
+ 8004846: 18d1 adds r1, r2, r3
+ 8004848: 697a ldr r2, [r7, #20]
+ 800484a: 693b ldr r3, [r7, #16]
+ 800484c: 1ad3 subs r3, r2, r3
+ 800484e: 461a mov r2, r3
+ 8004850: f001 f96e bl 8005b30 <memcpy>
+ }
+
+ flush();
+ 8004854: 68f8 ldr r0, [r7, #12]
+ 8004856: f7ff ff65 bl 8004724 <_ZN13STM32Hardware5flushEv>
+ }
+ 800485a: bf00 nop
+ 800485c: 3718 adds r7, #24
+ 800485e: 46bd mov sp, r7
+ 8004860: bd80 pop {r7, pc}
+
+08004862 <_ZN13STM32Hardware4timeEv>:
+
+ unsigned long time(){ return HAL_GetTick(); }
+ 8004862: b580 push {r7, lr}
+ 8004864: b082 sub sp, #8
+ 8004866: af00 add r7, sp, #0
+ 8004868: 6078 str r0, [r7, #4]
+ 800486a: f7fb febf bl 80005ec <HAL_GetTick>
+ 800486e: 4603 mov r3, r0
+ 8004870: 4618 mov r0, r3
+ 8004872: 3708 adds r7, #8
+ 8004874: 46bd mov sp, r7
+ 8004876: bd80 pop {r7, pc}
+
+08004878 <main>:
+/**
+ * @brief The application entry point.
+ * @retval int
+ */
+int main(void)
+{
+ 8004878: b590 push {r4, r7, lr}
+ 800487a: f2ad 6df4 subw sp, sp, #1780 ; 0x6f4
+ 800487e: af00 add r7, sp, #0
+
+
+ /* MCU Configuration--------------------------------------------------------*/
+
+ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+ HAL_Init();
+ 8004880: f7fb fe62 bl 8000548 <HAL_Init>
+ /* USER CODE BEGIN Init */
+
+ /* USER CODE END Init */
+
+ /* Configure the system clock */
+ SystemClock_Config();
+ 8004884: f000 f848 bl 8004918 <_Z18SystemClock_Configv>
+ /* USER CODE BEGIN SysInit */
+
+ /* USER CODE END SysInit */
+
+ /* Initialize all configured peripherals */
+ MX_GPIO_Init();
+ 8004888: f000 f986 bl 8004b98 <_ZL12MX_GPIO_Initv>
+ MX_DMA_Init();
+ 800488c: f000 f95e bl 8004b4c <_ZL11MX_DMA_Initv>
+ MX_TIM2_Init();
+ 8004890: f000 f8cc bl 8004a2c <_ZL12MX_TIM2_Initv>
+ MX_USART3_UART_Init();
+ 8004894: f000 f926 bl 8004ae4 <_ZL19MX_USART3_UART_Initv>
+ /* USER CODE BEGIN 2 */
+ ros::NodeHandle nh;
+ 8004898: f107 0330 add.w r3, r7, #48 ; 0x30
+ 800489c: 4618 mov r0, r3
+ 800489e: f000 f9ed bl 8004c7c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev>
+
+ std_msgs::String str_msg;
+ 80048a2: f107 0328 add.w r3, r7, #40 ; 0x28
+ 80048a6: 4618 mov r0, r3
+ 80048a8: f7fe ffae bl 8003808 <_ZN8std_msgs6StringC1Ev>
+ ros::Publisher chatter("chatter", &str_msg);
+ 80048ac: f107 0228 add.w r2, r7, #40 ; 0x28
+ 80048b0: f107 0014 add.w r0, r7, #20
+ 80048b4: 2300 movs r3, #0
+ 80048b6: 4916 ldr r1, [pc, #88] ; (8004910 <main+0x98>)
+ 80048b8: f7ff fe7a bl 80045b0 <_ZN3ros9PublisherC1EPKcPNS_3MsgEi>
+ char hello[] = "Hello world!";
+ 80048bc: 1d3b adds r3, r7, #4
+ 80048be: 4a15 ldr r2, [pc, #84] ; (8004914 <main+0x9c>)
+ 80048c0: 461c mov r4, r3
+ 80048c2: 4613 mov r3, r2
+ 80048c4: cb0f ldmia r3, {r0, r1, r2, r3}
+ 80048c6: c407 stmia r4!, {r0, r1, r2}
+ 80048c8: 7023 strb r3, [r4, #0]
+
+ nh.initNode();
+ 80048ca: f107 0330 add.w r3, r7, #48 ; 0x30
+ 80048ce: 4618 mov r0, r3
+ 80048d0: f000 fa54 bl 8004d7c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8initNodeEv>
+ nh.advertise(chatter);
+ 80048d4: f107 0214 add.w r2, r7, #20
+ 80048d8: f107 0330 add.w r3, r7, #48 ; 0x30
+ 80048dc: 4611 mov r1, r2
+ 80048de: 4618 mov r0, r3
+ 80048e0: f000 fa69 bl 8004db6 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE9advertiseERNS_9PublisherE>
+ /* Infinite loop */
+ /* USER CODE BEGIN WHILE */
+ while (1) {
+
+
+ str_msg.data = hello;
+ 80048e4: f107 0328 add.w r3, r7, #40 ; 0x28
+ 80048e8: 1d3a adds r2, r7, #4
+ 80048ea: 605a str r2, [r3, #4]
+ chatter.publish(&str_msg);
+ 80048ec: f107 0228 add.w r2, r7, #40 ; 0x28
+ 80048f0: f107 0314 add.w r3, r7, #20
+ 80048f4: 4611 mov r1, r2
+ 80048f6: 4618 mov r0, r3
+ 80048f8: f7ff fe71 bl 80045de <_ZN3ros9Publisher7publishEPKNS_3MsgE>
+ nh.spinOnce();
+ 80048fc: f107 0330 add.w r3, r7, #48 ; 0x30
+ 8004900: 4618 mov r0, r3
+ 8004902: f000 fa86 bl 8004e12 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv>
+
+ //HAL_UART_Transmit(&huart3, (uint8_t*)hello, strlen(hello), 100);
+
+
+ HAL_Delay(1000);
+ 8004906: f44f 707a mov.w r0, #1000 ; 0x3e8
+ 800490a: f7fb fe7b bl 8000604 <HAL_Delay>
+ str_msg.data = hello;
+ 800490e: e7e9 b.n 80048e4 <main+0x6c>
+ 8004910: 08005ee0 .word 0x08005ee0
+ 8004914: 08005ee8 .word 0x08005ee8
+
+08004918 <_Z18SystemClock_Configv>:
+/**
+ * @brief System Clock Configuration
+ * @retval None
+ */
+void SystemClock_Config(void)
+{
+ 8004918: b580 push {r7, lr}
+ 800491a: b0b8 sub sp, #224 ; 0xe0
+ 800491c: af00 add r7, sp, #0
+ RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+ 800491e: f107 03ac add.w r3, r7, #172 ; 0xac
+ 8004922: 2234 movs r2, #52 ; 0x34
+ 8004924: 2100 movs r1, #0
+ 8004926: 4618 mov r0, r3
+ 8004928: f001 f90d bl 8005b46 <memset>
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+ 800492c: f107 0398 add.w r3, r7, #152 ; 0x98
+ 8004930: 2200 movs r2, #0
+ 8004932: 601a str r2, [r3, #0]
+ 8004934: 605a str r2, [r3, #4]
+ 8004936: 609a str r2, [r3, #8]
+ 8004938: 60da str r2, [r3, #12]
+ 800493a: 611a str r2, [r3, #16]
+ RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
+ 800493c: f107 0308 add.w r3, r7, #8
+ 8004940: 2290 movs r2, #144 ; 0x90
+ 8004942: 2100 movs r1, #0
+ 8004944: 4618 mov r0, r3
+ 8004946: f001 f8fe bl 8005b46 <memset>
+
+ /** Configure the main internal regulator output voltage
+ */
+ __HAL_RCC_PWR_CLK_ENABLE();
+ 800494a: 4b36 ldr r3, [pc, #216] ; (8004a24 <_Z18SystemClock_Configv+0x10c>)
+ 800494c: 6c1b ldr r3, [r3, #64] ; 0x40
+ 800494e: 4a35 ldr r2, [pc, #212] ; (8004a24 <_Z18SystemClock_Configv+0x10c>)
+ 8004950: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
+ 8004954: 6413 str r3, [r2, #64] ; 0x40
+ 8004956: 4b33 ldr r3, [pc, #204] ; (8004a24 <_Z18SystemClock_Configv+0x10c>)
+ 8004958: 6c1b ldr r3, [r3, #64] ; 0x40
+ 800495a: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
+ 800495e: 607b str r3, [r7, #4]
+ 8004960: 687b ldr r3, [r7, #4]
+ __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE3);
+ 8004962: 4b31 ldr r3, [pc, #196] ; (8004a28 <_Z18SystemClock_Configv+0x110>)
+ 8004964: 681b ldr r3, [r3, #0]
+ 8004966: f423 4340 bic.w r3, r3, #49152 ; 0xc000
+ 800496a: 4a2f ldr r2, [pc, #188] ; (8004a28 <_Z18SystemClock_Configv+0x110>)
+ 800496c: f443 4380 orr.w r3, r3, #16384 ; 0x4000
+ 8004970: 6013 str r3, [r2, #0]
+ 8004972: 4b2d ldr r3, [pc, #180] ; (8004a28 <_Z18SystemClock_Configv+0x110>)
+ 8004974: 681b ldr r3, [r3, #0]
+ 8004976: f403 4340 and.w r3, r3, #49152 ; 0xc000
+ 800497a: 603b str r3, [r7, #0]
+ 800497c: 683b ldr r3, [r7, #0]
+ /** Initializes the CPU, AHB and APB busses clocks
+ */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+ 800497e: 2302 movs r3, #2
+ 8004980: f8c7 30ac str.w r3, [r7, #172] ; 0xac
+ RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+ 8004984: 2301 movs r3, #1
+ 8004986: f8c7 30b8 str.w r3, [r7, #184] ; 0xb8
+ RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+ 800498a: 2310 movs r3, #16
+ 800498c: f8c7 30bc str.w r3, [r7, #188] ; 0xbc
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
+ 8004990: 2300 movs r3, #0
+ 8004992: f8c7 30c4 str.w r3, [r7, #196] ; 0xc4
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ 8004996: f107 03ac add.w r3, r7, #172 ; 0xac
+ 800499a: 4618 mov r0, r3
+ 800499c: f7fc fca8 bl 80012f0 <HAL_RCC_OscConfig>
+ 80049a0: 4603 mov r3, r0
+ 80049a2: 2b00 cmp r3, #0
+ 80049a4: bf14 ite ne
+ 80049a6: 2301 movne r3, #1
+ 80049a8: 2300 moveq r3, #0
+ 80049aa: b2db uxtb r3, r3
+ 80049ac: 2b00 cmp r3, #0
+ 80049ae: d001 beq.n 80049b4 <_Z18SystemClock_Configv+0x9c>
+ {
+ Error_Handler();
+ 80049b0: f000 f90a bl 8004bc8 <Error_Handler>
+ }
+ /** Initializes the CPU, AHB and APB busses clocks
+ */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+ 80049b4: 230f movs r3, #15
+ 80049b6: f8c7 3098 str.w r3, [r7, #152] ; 0x98
+ |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI;
+ 80049ba: 2300 movs r3, #0
+ 80049bc: f8c7 309c str.w r3, [r7, #156] ; 0x9c
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ 80049c0: 2300 movs r3, #0
+ 80049c2: f8c7 30a0 str.w r3, [r7, #160] ; 0xa0
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+ 80049c6: 2300 movs r3, #0
+ 80049c8: f8c7 30a4 str.w r3, [r7, #164] ; 0xa4
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+ 80049cc: 2300 movs r3, #0
+ 80049ce: f8c7 30a8 str.w r3, [r7, #168] ; 0xa8
+
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
+ 80049d2: f107 0398 add.w r3, r7, #152 ; 0x98
+ 80049d6: 2100 movs r1, #0
+ 80049d8: 4618 mov r0, r3
+ 80049da: f7fc fefb bl 80017d4 <HAL_RCC_ClockConfig>
+ 80049de: 4603 mov r3, r0
+ 80049e0: 2b00 cmp r3, #0
+ 80049e2: bf14 ite ne
+ 80049e4: 2301 movne r3, #1
+ 80049e6: 2300 moveq r3, #0
+ 80049e8: b2db uxtb r3, r3
+ 80049ea: 2b00 cmp r3, #0
+ 80049ec: d001 beq.n 80049f2 <_Z18SystemClock_Configv+0xda>
+ {
+ Error_Handler();
+ 80049ee: f000 f8eb bl 8004bc8 <Error_Handler>
+ }
+ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART3;
+ 80049f2: f44f 7380 mov.w r3, #256 ; 0x100
+ 80049f6: 60bb str r3, [r7, #8]
+ PeriphClkInitStruct.Usart3ClockSelection = RCC_USART3CLKSOURCE_PCLK1;
+ 80049f8: 2300 movs r3, #0
+ 80049fa: 657b str r3, [r7, #84] ; 0x54
+ if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
+ 80049fc: f107 0308 add.w r3, r7, #8
+ 8004a00: 4618 mov r0, r3
+ 8004a02: f7fd f8b5 bl 8001b70 <HAL_RCCEx_PeriphCLKConfig>
+ 8004a06: 4603 mov r3, r0
+ 8004a08: 2b00 cmp r3, #0
+ 8004a0a: bf14 ite ne
+ 8004a0c: 2301 movne r3, #1
+ 8004a0e: 2300 moveq r3, #0
+ 8004a10: b2db uxtb r3, r3
+ 8004a12: 2b00 cmp r3, #0
+ 8004a14: d001 beq.n 8004a1a <_Z18SystemClock_Configv+0x102>
+ {
+ Error_Handler();
+ 8004a16: f000 f8d7 bl 8004bc8 <Error_Handler>
+ }
+}
+ 8004a1a: bf00 nop
+ 8004a1c: 37e0 adds r7, #224 ; 0xe0
+ 8004a1e: 46bd mov sp, r7
+ 8004a20: bd80 pop {r7, pc}
+ 8004a22: bf00 nop
+ 8004a24: 40023800 .word 0x40023800
+ 8004a28: 40007000 .word 0x40007000
+
+08004a2c <_ZL12MX_TIM2_Initv>:
+ * @brief TIM2 Initialization Function
+ * @param None
+ * @retval None
+ */
+static void MX_TIM2_Init(void)
+{
+ 8004a2c: b580 push {r7, lr}
+ 8004a2e: b088 sub sp, #32
+ 8004a30: af00 add r7, sp, #0
+
+ /* USER CODE BEGIN TIM2_Init 0 */
+
+ /* USER CODE END TIM2_Init 0 */
+
+ TIM_ClockConfigTypeDef sClockSourceConfig = {0};
+ 8004a32: f107 0310 add.w r3, r7, #16
+ 8004a36: 2200 movs r2, #0
+ 8004a38: 601a str r2, [r3, #0]
+ 8004a3a: 605a str r2, [r3, #4]
+ 8004a3c: 609a str r2, [r3, #8]
+ 8004a3e: 60da str r2, [r3, #12]
+ TIM_MasterConfigTypeDef sMasterConfig = {0};
+ 8004a40: 1d3b adds r3, r7, #4
+ 8004a42: 2200 movs r2, #0
+ 8004a44: 601a str r2, [r3, #0]
+ 8004a46: 605a str r2, [r3, #4]
+ 8004a48: 609a str r2, [r3, #8]
+
+ /* USER CODE BEGIN TIM2_Init 1 */
+
+ /* USER CODE END TIM2_Init 1 */
+ htim2.Instance = TIM2;
+ 8004a4a: 4b25 ldr r3, [pc, #148] ; (8004ae0 <_ZL12MX_TIM2_Initv+0xb4>)
+ 8004a4c: f04f 4280 mov.w r2, #1073741824 ; 0x40000000
+ 8004a50: 601a str r2, [r3, #0]
+ htim2.Init.Prescaler = 0;
+ 8004a52: 4b23 ldr r3, [pc, #140] ; (8004ae0 <_ZL12MX_TIM2_Initv+0xb4>)
+ 8004a54: 2200 movs r2, #0
+ 8004a56: 605a str r2, [r3, #4]
+ htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
+ 8004a58: 4b21 ldr r3, [pc, #132] ; (8004ae0 <_ZL12MX_TIM2_Initv+0xb4>)
+ 8004a5a: 2200 movs r2, #0
+ 8004a5c: 609a str r2, [r3, #8]
+ htim2.Init.Period = 0;
+ 8004a5e: 4b20 ldr r3, [pc, #128] ; (8004ae0 <_ZL12MX_TIM2_Initv+0xb4>)
+ 8004a60: 2200 movs r2, #0
+ 8004a62: 60da str r2, [r3, #12]
+ htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+ 8004a64: 4b1e ldr r3, [pc, #120] ; (8004ae0 <_ZL12MX_TIM2_Initv+0xb4>)
+ 8004a66: 2200 movs r2, #0
+ 8004a68: 611a str r2, [r3, #16]
+ htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+ 8004a6a: 4b1d ldr r3, [pc, #116] ; (8004ae0 <_ZL12MX_TIM2_Initv+0xb4>)
+ 8004a6c: 2200 movs r2, #0
+ 8004a6e: 619a str r2, [r3, #24]
+ if (HAL_TIM_Base_Init(&htim2) != HAL_OK)
+ 8004a70: 481b ldr r0, [pc, #108] ; (8004ae0 <_ZL12MX_TIM2_Initv+0xb4>)
+ 8004a72: f7fd fca3 bl 80023bc <HAL_TIM_Base_Init>
+ 8004a76: 4603 mov r3, r0
+ 8004a78: 2b00 cmp r3, #0
+ 8004a7a: bf14 ite ne
+ 8004a7c: 2301 movne r3, #1
+ 8004a7e: 2300 moveq r3, #0
+ 8004a80: b2db uxtb r3, r3
+ 8004a82: 2b00 cmp r3, #0
+ 8004a84: d001 beq.n 8004a8a <_ZL12MX_TIM2_Initv+0x5e>
+ {
+ Error_Handler();
+ 8004a86: f000 f89f bl 8004bc8 <Error_Handler>
+ }
+ sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
+ 8004a8a: f44f 5380 mov.w r3, #4096 ; 0x1000
+ 8004a8e: 613b str r3, [r7, #16]
+ if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK)
+ 8004a90: f107 0310 add.w r3, r7, #16
+ 8004a94: 4619 mov r1, r3
+ 8004a96: 4812 ldr r0, [pc, #72] ; (8004ae0 <_ZL12MX_TIM2_Initv+0xb4>)
+ 8004a98: f7fd fce6 bl 8002468 <HAL_TIM_ConfigClockSource>
+ 8004a9c: 4603 mov r3, r0
+ 8004a9e: 2b00 cmp r3, #0
+ 8004aa0: bf14 ite ne
+ 8004aa2: 2301 movne r3, #1
+ 8004aa4: 2300 moveq r3, #0
+ 8004aa6: b2db uxtb r3, r3
+ 8004aa8: 2b00 cmp r3, #0
+ 8004aaa: d001 beq.n 8004ab0 <_ZL12MX_TIM2_Initv+0x84>
+ {
+ Error_Handler();
+ 8004aac: f000 f88c bl 8004bc8 <Error_Handler>
+ }
+ sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
+ 8004ab0: 2300 movs r3, #0
+ 8004ab2: 607b str r3, [r7, #4]
+ sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+ 8004ab4: 2300 movs r3, #0
+ 8004ab6: 60fb str r3, [r7, #12]
+ if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK)
+ 8004ab8: 1d3b adds r3, r7, #4
+ 8004aba: 4619 mov r1, r3
+ 8004abc: 4808 ldr r0, [pc, #32] ; (8004ae0 <_ZL12MX_TIM2_Initv+0xb4>)
+ 8004abe: f7fd fec7 bl 8002850 <HAL_TIMEx_MasterConfigSynchronization>
+ 8004ac2: 4603 mov r3, r0
+ 8004ac4: 2b00 cmp r3, #0
+ 8004ac6: bf14 ite ne
+ 8004ac8: 2301 movne r3, #1
+ 8004aca: 2300 moveq r3, #0
+ 8004acc: b2db uxtb r3, r3
+ 8004ace: 2b00 cmp r3, #0
+ 8004ad0: d001 beq.n 8004ad6 <_ZL12MX_TIM2_Initv+0xaa>
+ {
+ Error_Handler();
+ 8004ad2: f000 f879 bl 8004bc8 <Error_Handler>
+ }
+ /* USER CODE BEGIN TIM2_Init 2 */
+
+ /* USER CODE END TIM2_Init 2 */
+
+}
+ 8004ad6: bf00 nop
+ 8004ad8: 3720 adds r7, #32
+ 8004ada: 46bd mov sp, r7
+ 8004adc: bd80 pop {r7, pc}
+ 8004ade: bf00 nop
+ 8004ae0: 20000094 .word 0x20000094
+
+08004ae4 <_ZL19MX_USART3_UART_Initv>:
+ * @brief USART3 Initialization Function
+ * @param None
+ * @retval None
+ */
+static void MX_USART3_UART_Init(void)
+{
+ 8004ae4: b580 push {r7, lr}
+ 8004ae6: af00 add r7, sp, #0
+ /* USER CODE END USART3_Init 0 */
+
+ /* USER CODE BEGIN USART3_Init 1 */
+
+ /* USER CODE END USART3_Init 1 */
+ huart3.Instance = USART3;
+ 8004ae8: 4b16 ldr r3, [pc, #88] ; (8004b44 <_ZL19MX_USART3_UART_Initv+0x60>)
+ 8004aea: 4a17 ldr r2, [pc, #92] ; (8004b48 <_ZL19MX_USART3_UART_Initv+0x64>)
+ 8004aec: 601a str r2, [r3, #0]
+ huart3.Init.BaudRate = 115200;
+ 8004aee: 4b15 ldr r3, [pc, #84] ; (8004b44 <_ZL19MX_USART3_UART_Initv+0x60>)
+ 8004af0: f44f 32e1 mov.w r2, #115200 ; 0x1c200
+ 8004af4: 605a str r2, [r3, #4]
+ huart3.Init.WordLength = UART_WORDLENGTH_8B;
+ 8004af6: 4b13 ldr r3, [pc, #76] ; (8004b44 <_ZL19MX_USART3_UART_Initv+0x60>)
+ 8004af8: 2200 movs r2, #0
+ 8004afa: 609a str r2, [r3, #8]
+ huart3.Init.StopBits = UART_STOPBITS_1;
+ 8004afc: 4b11 ldr r3, [pc, #68] ; (8004b44 <_ZL19MX_USART3_UART_Initv+0x60>)
+ 8004afe: 2200 movs r2, #0
+ 8004b00: 60da str r2, [r3, #12]
+ huart3.Init.Parity = UART_PARITY_NONE;
+ 8004b02: 4b10 ldr r3, [pc, #64] ; (8004b44 <_ZL19MX_USART3_UART_Initv+0x60>)
+ 8004b04: 2200 movs r2, #0
+ 8004b06: 611a str r2, [r3, #16]
+ huart3.Init.Mode = UART_MODE_TX_RX;
+ 8004b08: 4b0e ldr r3, [pc, #56] ; (8004b44 <_ZL19MX_USART3_UART_Initv+0x60>)
+ 8004b0a: 220c movs r2, #12
+ 8004b0c: 615a str r2, [r3, #20]
+ huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+ 8004b0e: 4b0d ldr r3, [pc, #52] ; (8004b44 <_ZL19MX_USART3_UART_Initv+0x60>)
+ 8004b10: 2200 movs r2, #0
+ 8004b12: 619a str r2, [r3, #24]
+ huart3.Init.OverSampling = UART_OVERSAMPLING_16;
+ 8004b14: 4b0b ldr r3, [pc, #44] ; (8004b44 <_ZL19MX_USART3_UART_Initv+0x60>)
+ 8004b16: 2200 movs r2, #0
+ 8004b18: 61da str r2, [r3, #28]
+ huart3.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
+ 8004b1a: 4b0a ldr r3, [pc, #40] ; (8004b44 <_ZL19MX_USART3_UART_Initv+0x60>)
+ 8004b1c: 2200 movs r2, #0
+ 8004b1e: 621a str r2, [r3, #32]
+ huart3.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
+ 8004b20: 4b08 ldr r3, [pc, #32] ; (8004b44 <_ZL19MX_USART3_UART_Initv+0x60>)
+ 8004b22: 2200 movs r2, #0
+ 8004b24: 625a str r2, [r3, #36] ; 0x24
+ if (HAL_UART_Init(&huart3) != HAL_OK)
+ 8004b26: 4807 ldr r0, [pc, #28] ; (8004b44 <_ZL19MX_USART3_UART_Initv+0x60>)
+ 8004b28: f7fd feee bl 8002908 <HAL_UART_Init>
+ 8004b2c: 4603 mov r3, r0
+ 8004b2e: 2b00 cmp r3, #0
+ 8004b30: bf14 ite ne
+ 8004b32: 2301 movne r3, #1
+ 8004b34: 2300 moveq r3, #0
+ 8004b36: b2db uxtb r3, r3
+ 8004b38: 2b00 cmp r3, #0
+ 8004b3a: d001 beq.n 8004b40 <_ZL19MX_USART3_UART_Initv+0x5c>
+ {
+ Error_Handler();
+ 8004b3c: f000 f844 bl 8004bc8 <Error_Handler>
+ }
+ /* USER CODE BEGIN USART3_Init 2 */
+
+ /* USER CODE END USART3_Init 2 */
+
+}
+ 8004b40: bf00 nop
+ 8004b42: bd80 pop {r7, pc}
+ 8004b44: 200000d4 .word 0x200000d4
+ 8004b48: 40004800 .word 0x40004800
+
+08004b4c <_ZL11MX_DMA_Initv>:
+
+/**
+ * Enable DMA controller clock
+ */
+static void MX_DMA_Init(void)
+{
+ 8004b4c: b580 push {r7, lr}
+ 8004b4e: b082 sub sp, #8
+ 8004b50: af00 add r7, sp, #0
+
+ /* DMA controller clock enable */
+ __HAL_RCC_DMA1_CLK_ENABLE();
+ 8004b52: 4b10 ldr r3, [pc, #64] ; (8004b94 <_ZL11MX_DMA_Initv+0x48>)
+ 8004b54: 6b1b ldr r3, [r3, #48] ; 0x30
+ 8004b56: 4a0f ldr r2, [pc, #60] ; (8004b94 <_ZL11MX_DMA_Initv+0x48>)
+ 8004b58: f443 1300 orr.w r3, r3, #2097152 ; 0x200000
+ 8004b5c: 6313 str r3, [r2, #48] ; 0x30
+ 8004b5e: 4b0d ldr r3, [pc, #52] ; (8004b94 <_ZL11MX_DMA_Initv+0x48>)
+ 8004b60: 6b1b ldr r3, [r3, #48] ; 0x30
+ 8004b62: f403 1300 and.w r3, r3, #2097152 ; 0x200000
+ 8004b66: 607b str r3, [r7, #4]
+ 8004b68: 687b ldr r3, [r7, #4]
+
+ /* DMA interrupt init */
+ /* DMA1_Stream1_IRQn interrupt configuration */
+ HAL_NVIC_SetPriority(DMA1_Stream1_IRQn, 0, 0);
+ 8004b6a: 2200 movs r2, #0
+ 8004b6c: 2100 movs r1, #0
+ 8004b6e: 200c movs r0, #12
+ 8004b70: f7fb fe45 bl 80007fe <HAL_NVIC_SetPriority>
+ HAL_NVIC_EnableIRQ(DMA1_Stream1_IRQn);
+ 8004b74: 200c movs r0, #12
+ 8004b76: f7fb fe5e bl 8000836 <HAL_NVIC_EnableIRQ>
+ /* DMA1_Stream3_IRQn interrupt configuration */
+ HAL_NVIC_SetPriority(DMA1_Stream3_IRQn, 0, 0);
+ 8004b7a: 2200 movs r2, #0
+ 8004b7c: 2100 movs r1, #0
+ 8004b7e: 200e movs r0, #14
+ 8004b80: f7fb fe3d bl 80007fe <HAL_NVIC_SetPriority>
+ HAL_NVIC_EnableIRQ(DMA1_Stream3_IRQn);
+ 8004b84: 200e movs r0, #14
+ 8004b86: f7fb fe56 bl 8000836 <HAL_NVIC_EnableIRQ>
+
+}
+ 8004b8a: bf00 nop
+ 8004b8c: 3708 adds r7, #8
+ 8004b8e: 46bd mov sp, r7
+ 8004b90: bd80 pop {r7, pc}
+ 8004b92: bf00 nop
+ 8004b94: 40023800 .word 0x40023800
+
+08004b98 <_ZL12MX_GPIO_Initv>:
+ * @brief GPIO Initialization Function
+ * @param None
+ * @retval None
+ */
+static void MX_GPIO_Init(void)
+{
+ 8004b98: b480 push {r7}
+ 8004b9a: b083 sub sp, #12
+ 8004b9c: af00 add r7, sp, #0
+
+ /* GPIO Ports Clock Enable */
+ __HAL_RCC_GPIOD_CLK_ENABLE();
+ 8004b9e: 4b09 ldr r3, [pc, #36] ; (8004bc4 <_ZL12MX_GPIO_Initv+0x2c>)
+ 8004ba0: 6b1b ldr r3, [r3, #48] ; 0x30
+ 8004ba2: 4a08 ldr r2, [pc, #32] ; (8004bc4 <_ZL12MX_GPIO_Initv+0x2c>)
+ 8004ba4: f043 0308 orr.w r3, r3, #8
+ 8004ba8: 6313 str r3, [r2, #48] ; 0x30
+ 8004baa: 4b06 ldr r3, [pc, #24] ; (8004bc4 <_ZL12MX_GPIO_Initv+0x2c>)
+ 8004bac: 6b1b ldr r3, [r3, #48] ; 0x30
+ 8004bae: f003 0308 and.w r3, r3, #8
+ 8004bb2: 607b str r3, [r7, #4]
+ 8004bb4: 687b ldr r3, [r7, #4]
+
+}
+ 8004bb6: bf00 nop
+ 8004bb8: 370c adds r7, #12
+ 8004bba: 46bd mov sp, r7
+ 8004bbc: f85d 7b04 ldr.w r7, [sp], #4
+ 8004bc0: 4770 bx lr
+ 8004bc2: bf00 nop
+ 8004bc4: 40023800 .word 0x40023800
+
+08004bc8 <Error_Handler>:
+/**
+ * @brief This function is executed in case of error occurrence.
+ * @retval None
+ */
+void Error_Handler(void)
+{
+ 8004bc8: b480 push {r7}
+ 8004bca: af00 add r7, sp, #0
+ /* USER CODE BEGIN Error_Handler_Debug */
+ /* User can add his own implementation to report the HAL error return state */
+
+ /* USER CODE END Error_Handler_Debug */
+}
+ 8004bcc: bf00 nop
+ 8004bce: 46bd mov sp, r7
+ 8004bd0: f85d 7b04 ldr.w r7, [sp], #4
+ 8004bd4: 4770 bx lr
+
+08004bd6 <_ZN3ros3Msg8varToArrIPhmEEvT_T0_>:
+ return 8;
+ }
+
+ // Copy data from variable into a byte array
+ template<typename A, typename V>
+ static void varToArr(A arr, const V var)
+ 8004bd6: b480 push {r7}
+ 8004bd8: b085 sub sp, #20
+ 8004bda: af00 add r7, sp, #0
+ 8004bdc: 6078 str r0, [r7, #4]
+ 8004bde: 6039 str r1, [r7, #0]
+ {
+ for (size_t i = 0; i < sizeof(V); i++)
+ 8004be0: 2300 movs r3, #0
+ 8004be2: 60fb str r3, [r7, #12]
+ 8004be4: 68fb ldr r3, [r7, #12]
+ 8004be6: 2b03 cmp r3, #3
+ 8004be8: d80d bhi.n 8004c06 <_ZN3ros3Msg8varToArrIPhmEEvT_T0_+0x30>
+ arr[i] = (var >> (8 * i));
+ 8004bea: 68fb ldr r3, [r7, #12]
+ 8004bec: 00db lsls r3, r3, #3
+ 8004bee: 683a ldr r2, [r7, #0]
+ 8004bf0: fa22 f103 lsr.w r1, r2, r3
+ 8004bf4: 687a ldr r2, [r7, #4]
+ 8004bf6: 68fb ldr r3, [r7, #12]
+ 8004bf8: 4413 add r3, r2
+ 8004bfa: b2ca uxtb r2, r1
+ 8004bfc: 701a strb r2, [r3, #0]
+ for (size_t i = 0; i < sizeof(V); i++)
+ 8004bfe: 68fb ldr r3, [r7, #12]
+ 8004c00: 3301 adds r3, #1
+ 8004c02: 60fb str r3, [r7, #12]
+ 8004c04: e7ee b.n 8004be4 <_ZN3ros3Msg8varToArrIPhmEEvT_T0_+0xe>
+ }
+ 8004c06: bf00 nop
+ 8004c08: 3714 adds r7, #20
+ 8004c0a: 46bd mov sp, r7
+ 8004c0c: f85d 7b04 ldr.w r7, [sp], #4
+ 8004c10: 4770 bx lr
+
+08004c12 <_ZN3ros3Msg8arrToVarImPhEEvRT_T0_>:
+
+ // Copy data from a byte array into variable
+ template<typename V, typename A>
+ static void arrToVar(V& var, const A arr)
+ 8004c12: b480 push {r7}
+ 8004c14: b085 sub sp, #20
+ 8004c16: af00 add r7, sp, #0
+ 8004c18: 6078 str r0, [r7, #4]
+ 8004c1a: 6039 str r1, [r7, #0]
+ {
+ var = 0;
+ 8004c1c: 687b ldr r3, [r7, #4]
+ 8004c1e: 2200 movs r2, #0
+ 8004c20: 601a str r2, [r3, #0]
+ for (size_t i = 0; i < sizeof(V); i++)
+ 8004c22: 2300 movs r3, #0
+ 8004c24: 60fb str r3, [r7, #12]
+ 8004c26: 68fb ldr r3, [r7, #12]
+ 8004c28: 2b03 cmp r3, #3
+ 8004c2a: d811 bhi.n 8004c50 <_ZN3ros3Msg8arrToVarImPhEEvRT_T0_+0x3e>
+ var |= (arr[i] << (8 * i));
+ 8004c2c: 687b ldr r3, [r7, #4]
+ 8004c2e: 681b ldr r3, [r3, #0]
+ 8004c30: 6839 ldr r1, [r7, #0]
+ 8004c32: 68fa ldr r2, [r7, #12]
+ 8004c34: 440a add r2, r1
+ 8004c36: 7812 ldrb r2, [r2, #0]
+ 8004c38: 4611 mov r1, r2
+ 8004c3a: 68fa ldr r2, [r7, #12]
+ 8004c3c: 00d2 lsls r2, r2, #3
+ 8004c3e: fa01 f202 lsl.w r2, r1, r2
+ 8004c42: 431a orrs r2, r3
+ 8004c44: 687b ldr r3, [r7, #4]
+ 8004c46: 601a str r2, [r3, #0]
+ for (size_t i = 0; i < sizeof(V); i++)
+ 8004c48: 68fb ldr r3, [r7, #12]
+ 8004c4a: 3301 adds r3, #1
+ 8004c4c: 60fb str r3, [r7, #12]
+ 8004c4e: e7ea b.n 8004c26 <_ZN3ros3Msg8arrToVarImPhEEvRT_T0_+0x14>
+ }
+ 8004c50: bf00 nop
+ 8004c52: 3714 adds r7, #20
+ 8004c54: 46bd mov sp, r7
+ 8004c56: f85d 7b04 ldr.w r7, [sp], #4
+ 8004c5a: 4770 bx lr
+
+08004c5c <_ZN3ros15NodeHandleBase_C1Ev>:
+#include "ros/msg.h"
+
+namespace ros
+{
+
+class NodeHandleBase_
+ 8004c5c: b480 push {r7}
+ 8004c5e: b083 sub sp, #12
+ 8004c60: af00 add r7, sp, #0
+ 8004c62: 6078 str r0, [r7, #4]
+ 8004c64: 4a04 ldr r2, [pc, #16] ; (8004c78 <_ZN3ros15NodeHandleBase_C1Ev+0x1c>)
+ 8004c66: 687b ldr r3, [r7, #4]
+ 8004c68: 601a str r2, [r3, #0]
+ 8004c6a: 687b ldr r3, [r7, #4]
+ 8004c6c: 4618 mov r0, r3
+ 8004c6e: 370c adds r7, #12
+ 8004c70: 46bd mov sp, r7
+ 8004c72: f85d 7b04 ldr.w r7, [sp], #4
+ 8004c76: 4770 bx lr
+ 8004c78: 08005f74 .word 0x08005f74
+
+08004c7c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev>:
+
+ /*
+ * Setup Functions
+ */
+public:
+ NodeHandle_() : configured_(false)
+ 8004c7c: b580 push {r7, lr}
+ 8004c7e: b086 sub sp, #24
+ 8004c80: af00 add r7, sp, #0
+ 8004c82: 6078 str r0, [r7, #4]
+ 8004c84: 687b ldr r3, [r7, #4]
+ 8004c86: 4618 mov r0, r3
+ 8004c88: f7ff ffe8 bl 8004c5c <_ZN3ros15NodeHandleBase_C1Ev>
+ 8004c8c: 4a3a ldr r2, [pc, #232] ; (8004d78 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev+0xfc>)
+ 8004c8e: 687b ldr r3, [r7, #4]
+ 8004c90: 601a str r2, [r3, #0]
+ 8004c92: 687b ldr r3, [r7, #4]
+ 8004c94: 3304 adds r3, #4
+ 8004c96: 4618 mov r0, r3
+ 8004c98: f7ff fcd4 bl 8004644 <_ZN13STM32HardwareC1Ev>
+ 8004c9c: 687b ldr r3, [r7, #4]
+ 8004c9e: 2200 movs r2, #0
+ 8004ca0: f883 2684 strb.w r2, [r3, #1668] ; 0x684
+ 8004ca4: 687b ldr r3, [r7, #4]
+ 8004ca6: f503 63d3 add.w r3, r3, #1688 ; 0x698
+ 8004caa: 4618 mov r0, r3
+ 8004cac: f7ff f9be bl 800402c <_ZN14rosserial_msgs20RequestParamResponseC1Ev>
+ {
+
+ for (unsigned int i = 0; i < MAX_PUBLISHERS; i++)
+ 8004cb0: 2300 movs r3, #0
+ 8004cb2: 617b str r3, [r7, #20]
+ 8004cb4: 697b ldr r3, [r7, #20]
+ 8004cb6: 2b18 cmp r3, #24
+ 8004cb8: d80a bhi.n 8004cd0 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev+0x54>
+ publishers[i] = 0;
+ 8004cba: 687b ldr r3, [r7, #4]
+ 8004cbc: 697a ldr r2, [r7, #20]
+ 8004cbe: f502 72b5 add.w r2, r2, #362 ; 0x16a
+ 8004cc2: 2100 movs r1, #0
+ 8004cc4: f843 1022 str.w r1, [r3, r2, lsl #2]
+ for (unsigned int i = 0; i < MAX_PUBLISHERS; i++)
+ 8004cc8: 697b ldr r3, [r7, #20]
+ 8004cca: 3301 adds r3, #1
+ 8004ccc: 617b str r3, [r7, #20]
+ 8004cce: e7f1 b.n 8004cb4 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev+0x38>
+
+ for (unsigned int i = 0; i < MAX_SUBSCRIBERS; i++)
+ 8004cd0: 2300 movs r3, #0
+ 8004cd2: 613b str r3, [r7, #16]
+ 8004cd4: 693b ldr r3, [r7, #16]
+ 8004cd6: 2b18 cmp r3, #24
+ 8004cd8: d80b bhi.n 8004cf2 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev+0x76>
+ subscribers[i] = 0;
+ 8004cda: 687a ldr r2, [r7, #4]
+ 8004cdc: 693b ldr r3, [r7, #16]
+ 8004cde: f503 73c1 add.w r3, r3, #386 ; 0x182
+ 8004ce2: 009b lsls r3, r3, #2
+ 8004ce4: 4413 add r3, r2
+ 8004ce6: 2200 movs r2, #0
+ 8004ce8: 605a str r2, [r3, #4]
+ for (unsigned int i = 0; i < MAX_SUBSCRIBERS; i++)
+ 8004cea: 693b ldr r3, [r7, #16]
+ 8004cec: 3301 adds r3, #1
+ 8004cee: 613b str r3, [r7, #16]
+ 8004cf0: e7f0 b.n 8004cd4 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev+0x58>
+
+ for (unsigned int i = 0; i < INPUT_SIZE; i++)
+ 8004cf2: 2300 movs r3, #0
+ 8004cf4: 60fb str r3, [r7, #12]
+ 8004cf6: 68fb ldr r3, [r7, #12]
+ 8004cf8: f5b3 7f00 cmp.w r3, #512 ; 0x200
+ 8004cfc: d20a bcs.n 8004d14 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev+0x98>
+ message_in[i] = 0;
+ 8004cfe: 687a ldr r2, [r7, #4]
+ 8004d00: 68fb ldr r3, [r7, #12]
+ 8004d02: 4413 add r3, r2
+ 8004d04: f503 73d4 add.w r3, r3, #424 ; 0x1a8
+ 8004d08: 2200 movs r2, #0
+ 8004d0a: 701a strb r2, [r3, #0]
+ for (unsigned int i = 0; i < INPUT_SIZE; i++)
+ 8004d0c: 68fb ldr r3, [r7, #12]
+ 8004d0e: 3301 adds r3, #1
+ 8004d10: 60fb str r3, [r7, #12]
+ 8004d12: e7f0 b.n 8004cf6 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev+0x7a>
+
+ for (unsigned int i = 0; i < OUTPUT_SIZE; i++)
+ 8004d14: 2300 movs r3, #0
+ 8004d16: 60bb str r3, [r7, #8]
+ 8004d18: 68bb ldr r3, [r7, #8]
+ 8004d1a: f5b3 7f00 cmp.w r3, #512 ; 0x200
+ 8004d1e: d20a bcs.n 8004d36 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev+0xba>
+ message_out[i] = 0;
+ 8004d20: 687a ldr r2, [r7, #4]
+ 8004d22: 68bb ldr r3, [r7, #8]
+ 8004d24: 4413 add r3, r2
+ 8004d26: f503 736a add.w r3, r3, #936 ; 0x3a8
+ 8004d2a: 2200 movs r2, #0
+ 8004d2c: 701a strb r2, [r3, #0]
+ for (unsigned int i = 0; i < OUTPUT_SIZE; i++)
+ 8004d2e: 68bb ldr r3, [r7, #8]
+ 8004d30: 3301 adds r3, #1
+ 8004d32: 60bb str r3, [r7, #8]
+ 8004d34: e7f0 b.n 8004d18 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev+0x9c>
+
+ req_param_resp.ints_length = 0;
+ 8004d36: 687b ldr r3, [r7, #4]
+ 8004d38: 2200 movs r2, #0
+ 8004d3a: f8c3 269c str.w r2, [r3, #1692] ; 0x69c
+ req_param_resp.ints = NULL;
+ 8004d3e: 687b ldr r3, [r7, #4]
+ 8004d40: 2200 movs r2, #0
+ 8004d42: f8c3 26a4 str.w r2, [r3, #1700] ; 0x6a4
+ req_param_resp.floats_length = 0;
+ 8004d46: 687b ldr r3, [r7, #4]
+ 8004d48: 2200 movs r2, #0
+ 8004d4a: f8c3 26a8 str.w r2, [r3, #1704] ; 0x6a8
+ req_param_resp.floats = NULL;
+ 8004d4e: 687b ldr r3, [r7, #4]
+ 8004d50: 2200 movs r2, #0
+ 8004d52: f8c3 26b0 str.w r2, [r3, #1712] ; 0x6b0
+ req_param_resp.ints_length = 0;
+ 8004d56: 687b ldr r3, [r7, #4]
+ 8004d58: 2200 movs r2, #0
+ 8004d5a: f8c3 269c str.w r2, [r3, #1692] ; 0x69c
+ req_param_resp.ints = NULL;
+ 8004d5e: 687b ldr r3, [r7, #4]
+ 8004d60: 2200 movs r2, #0
+ 8004d62: f8c3 26a4 str.w r2, [r3, #1700] ; 0x6a4
+
+ spin_timeout_ = 0;
+ 8004d66: 687b ldr r3, [r7, #4]
+ 8004d68: 2200 movs r2, #0
+ 8004d6a: f8c3 21a4 str.w r2, [r3, #420] ; 0x1a4
+ }
+ 8004d6e: 687b ldr r3, [r7, #4]
+ 8004d70: 4618 mov r0, r3
+ 8004d72: 3718 adds r7, #24
+ 8004d74: 46bd mov sp, r7
+ 8004d76: bd80 pop {r7, pc}
+ 8004d78: 08005f60 .word 0x08005f60
+
+08004d7c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8initNodeEv>:
+ {
+ return &hardware_;
+ }
+
+ /* Start serial, initialize buffers */
+ void initNode()
+ 8004d7c: b580 push {r7, lr}
+ 8004d7e: b082 sub sp, #8
+ 8004d80: af00 add r7, sp, #0
+ 8004d82: 6078 str r0, [r7, #4]
+ {
+ hardware_.init();
+ 8004d84: 687b ldr r3, [r7, #4]
+ 8004d86: 3304 adds r3, #4
+ 8004d88: 4618 mov r0, r3
+ 8004d8a: f7ff fc7d bl 8004688 <_ZN13STM32Hardware4initEv>
+ mode_ = 0;
+ 8004d8e: 687b ldr r3, [r7, #4]
+ 8004d90: 2200 movs r2, #0
+ 8004d92: f8c3 2670 str.w r2, [r3, #1648] ; 0x670
+ bytes_ = 0;
+ 8004d96: 687b ldr r3, [r7, #4]
+ 8004d98: 2200 movs r2, #0
+ 8004d9a: f8c3 2674 str.w r2, [r3, #1652] ; 0x674
+ index_ = 0;
+ 8004d9e: 687b ldr r3, [r7, #4]
+ 8004da0: 2200 movs r2, #0
+ 8004da2: f8c3 267c str.w r2, [r3, #1660] ; 0x67c
+ topic_ = 0;
+ 8004da6: 687b ldr r3, [r7, #4]
+ 8004da8: 2200 movs r2, #0
+ 8004daa: f8c3 2678 str.w r2, [r3, #1656] ; 0x678
+ };
+ 8004dae: bf00 nop
+ 8004db0: 3708 adds r7, #8
+ 8004db2: 46bd mov sp, r7
+ 8004db4: bd80 pop {r7, pc}
+
+08004db6 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE9advertiseERNS_9PublisherE>:
+ /********************************************************************
+ * Topic Management
+ */
+
+ /* Register a new publisher */
+ bool advertise(Publisher & p)
+ 8004db6: b480 push {r7}
+ 8004db8: b085 sub sp, #20
+ 8004dba: af00 add r7, sp, #0
+ 8004dbc: 6078 str r0, [r7, #4]
+ 8004dbe: 6039 str r1, [r7, #0]
+ {
+ for (int i = 0; i < MAX_PUBLISHERS; i++)
+ 8004dc0: 2300 movs r3, #0
+ 8004dc2: 60fb str r3, [r7, #12]
+ 8004dc4: 68fb ldr r3, [r7, #12]
+ 8004dc6: 2b18 cmp r3, #24
+ 8004dc8: dc1c bgt.n 8004e04 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE9advertiseERNS_9PublisherE+0x4e>
+ {
+ if (publishers[i] == 0) // empty slot
+ 8004dca: 687b ldr r3, [r7, #4]
+ 8004dcc: 68fa ldr r2, [r7, #12]
+ 8004dce: f502 72b5 add.w r2, r2, #362 ; 0x16a
+ 8004dd2: f853 3022 ldr.w r3, [r3, r2, lsl #2]
+ 8004dd6: 2b00 cmp r3, #0
+ 8004dd8: d110 bne.n 8004dfc <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE9advertiseERNS_9PublisherE+0x46>
+ {
+ publishers[i] = &p;
+ 8004dda: 687b ldr r3, [r7, #4]
+ 8004ddc: 68fa ldr r2, [r7, #12]
+ 8004dde: f502 72b5 add.w r2, r2, #362 ; 0x16a
+ 8004de2: 6839 ldr r1, [r7, #0]
+ 8004de4: f843 1022 str.w r1, [r3, r2, lsl #2]
+ p.id_ = i + 100 + MAX_SUBSCRIBERS;
+ 8004de8: 68fb ldr r3, [r7, #12]
+ 8004dea: f103 027d add.w r2, r3, #125 ; 0x7d
+ 8004dee: 683b ldr r3, [r7, #0]
+ 8004df0: 609a str r2, [r3, #8]
+ p.nh_ = this;
+ 8004df2: 687a ldr r2, [r7, #4]
+ 8004df4: 683b ldr r3, [r7, #0]
+ 8004df6: 60da str r2, [r3, #12]
+ return true;
+ 8004df8: 2301 movs r3, #1
+ 8004dfa: e004 b.n 8004e06 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE9advertiseERNS_9PublisherE+0x50>
+ for (int i = 0; i < MAX_PUBLISHERS; i++)
+ 8004dfc: 68fb ldr r3, [r7, #12]
+ 8004dfe: 3301 adds r3, #1
+ 8004e00: 60fb str r3, [r7, #12]
+ 8004e02: e7df b.n 8004dc4 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE9advertiseERNS_9PublisherE+0xe>
+ }
+ }
+ return false;
+ 8004e04: 2300 movs r3, #0
+ }
+ 8004e06: 4618 mov r0, r3
+ 8004e08: 3714 adds r7, #20
+ 8004e0a: 46bd mov sp, r7
+ 8004e0c: f85d 7b04 ldr.w r7, [sp], #4
+ 8004e10: 4770 bx lr
+
+08004e12 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv>:
+ virtual int spinOnce()
+ 8004e12: b580 push {r7, lr}
+ 8004e14: b084 sub sp, #16
+ 8004e16: af00 add r7, sp, #0
+ 8004e18: 6078 str r0, [r7, #4]
+ uint32_t c_time = hardware_.time();
+ 8004e1a: 687b ldr r3, [r7, #4]
+ 8004e1c: 3304 adds r3, #4
+ 8004e1e: 4618 mov r0, r3
+ 8004e20: f7ff fd1f bl 8004862 <_ZN13STM32Hardware4timeEv>
+ 8004e24: 60f8 str r0, [r7, #12]
+ if ((c_time - last_sync_receive_time) > (SYNC_SECONDS * 2200))
+ 8004e26: 687b ldr r3, [r7, #4]
+ 8004e28: f8d3 368c ldr.w r3, [r3, #1676] ; 0x68c
+ 8004e2c: 68fa ldr r2, [r7, #12]
+ 8004e2e: 1ad3 subs r3, r2, r3
+ 8004e30: f642 22f8 movw r2, #11000 ; 0x2af8
+ 8004e34: 4293 cmp r3, r2
+ 8004e36: d903 bls.n 8004e40 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x2e>
+ configured_ = false;
+ 8004e38: 687b ldr r3, [r7, #4]
+ 8004e3a: 2200 movs r2, #0
+ 8004e3c: f883 2684 strb.w r2, [r3, #1668] ; 0x684
+ if (mode_ != MODE_FIRST_FF)
+ 8004e40: 687b ldr r3, [r7, #4]
+ 8004e42: f8d3 3670 ldr.w r3, [r3, #1648] ; 0x670
+ 8004e46: 2b00 cmp r3, #0
+ 8004e48: d009 beq.n 8004e5e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
+ if (c_time > last_msg_timeout_time)
+ 8004e4a: 687b ldr r3, [r7, #4]
+ 8004e4c: f8d3 3690 ldr.w r3, [r3, #1680] ; 0x690
+ 8004e50: 68fa ldr r2, [r7, #12]
+ 8004e52: 429a cmp r2, r3
+ 8004e54: d903 bls.n 8004e5e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
+ mode_ = MODE_FIRST_FF;
+ 8004e56: 687b ldr r3, [r7, #4]
+ 8004e58: 2200 movs r2, #0
+ 8004e5a: f8c3 2670 str.w r2, [r3, #1648] ; 0x670
+ if (spin_timeout_ > 0)
+ 8004e5e: 687b ldr r3, [r7, #4]
+ 8004e60: f8d3 31a4 ldr.w r3, [r3, #420] ; 0x1a4
+ 8004e64: 2b00 cmp r3, #0
+ 8004e66: d014 beq.n 8004e92 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x80>
+ if ((hardware_.time() - c_time) > spin_timeout_)
+ 8004e68: 687b ldr r3, [r7, #4]
+ 8004e6a: 3304 adds r3, #4
+ 8004e6c: 4618 mov r0, r3
+ 8004e6e: f7ff fcf8 bl 8004862 <_ZN13STM32Hardware4timeEv>
+ 8004e72: 4602 mov r2, r0
+ 8004e74: 68fb ldr r3, [r7, #12]
+ 8004e76: 1ad2 subs r2, r2, r3
+ 8004e78: 687b ldr r3, [r7, #4]
+ 8004e7a: f8d3 31a4 ldr.w r3, [r3, #420] ; 0x1a4
+ 8004e7e: 429a cmp r2, r3
+ 8004e80: bf8c ite hi
+ 8004e82: 2301 movhi r3, #1
+ 8004e84: 2300 movls r3, #0
+ 8004e86: b2db uxtb r3, r3
+ 8004e88: 2b00 cmp r3, #0
+ 8004e8a: d002 beq.n 8004e92 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x80>
+ return SPIN_TIMEOUT;
+ 8004e8c: f06f 0301 mvn.w r3, #1
+ 8004e90: e197 b.n 80051c2 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x3b0>
+ int data = hardware_.read();
+ 8004e92: 687b ldr r3, [r7, #4]
+ 8004e94: 3304 adds r3, #4
+ 8004e96: 4618 mov r0, r3
+ 8004e98: f7ff fc16 bl 80046c8 <_ZN13STM32Hardware4readEv>
+ 8004e9c: 60b8 str r0, [r7, #8]
+ if (data < 0)
+ 8004e9e: 68bb ldr r3, [r7, #8]
+ 8004ea0: 2b00 cmp r3, #0
+ 8004ea2: f2c0 8177 blt.w 8005194 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x382>
+ checksum_ += data;
+ 8004ea6: 687b ldr r3, [r7, #4]
+ 8004ea8: f8d3 2680 ldr.w r2, [r3, #1664] ; 0x680
+ 8004eac: 68bb ldr r3, [r7, #8]
+ 8004eae: 441a add r2, r3
+ 8004eb0: 687b ldr r3, [r7, #4]
+ 8004eb2: f8c3 2680 str.w r2, [r3, #1664] ; 0x680
+ if (mode_ == MODE_MESSAGE) /* message data being recieved */
+ 8004eb6: 687b ldr r3, [r7, #4]
+ 8004eb8: f8d3 3670 ldr.w r3, [r3, #1648] ; 0x670
+ 8004ebc: 2b07 cmp r3, #7
+ 8004ebe: d11e bne.n 8004efe <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0xec>
+ message_in[index_++] = data;
+ 8004ec0: 687b ldr r3, [r7, #4]
+ 8004ec2: f8d3 367c ldr.w r3, [r3, #1660] ; 0x67c
+ 8004ec6: 1c59 adds r1, r3, #1
+ 8004ec8: 687a ldr r2, [r7, #4]
+ 8004eca: f8c2 167c str.w r1, [r2, #1660] ; 0x67c
+ 8004ece: 68ba ldr r2, [r7, #8]
+ 8004ed0: b2d1 uxtb r1, r2
+ 8004ed2: 687a ldr r2, [r7, #4]
+ 8004ed4: 4413 add r3, r2
+ 8004ed6: 460a mov r2, r1
+ 8004ed8: f883 21a8 strb.w r2, [r3, #424] ; 0x1a8
+ bytes_--;
+ 8004edc: 687b ldr r3, [r7, #4]
+ 8004ede: f8d3 3674 ldr.w r3, [r3, #1652] ; 0x674
+ 8004ee2: 1e5a subs r2, r3, #1
+ 8004ee4: 687b ldr r3, [r7, #4]
+ 8004ee6: f8c3 2674 str.w r2, [r3, #1652] ; 0x674
+ if (bytes_ == 0) /* is message complete? if so, checksum */
+ 8004eea: 687b ldr r3, [r7, #4]
+ 8004eec: f8d3 3674 ldr.w r3, [r3, #1652] ; 0x674
+ 8004ef0: 2b00 cmp r3, #0
+ 8004ef2: d1b4 bne.n 8004e5e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
+ mode_ = MODE_MSG_CHECKSUM;
+ 8004ef4: 687b ldr r3, [r7, #4]
+ 8004ef6: 2208 movs r2, #8
+ 8004ef8: f8c3 2670 str.w r2, [r3, #1648] ; 0x670
+ 8004efc: e7af b.n 8004e5e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
+ else if (mode_ == MODE_FIRST_FF)
+ 8004efe: 687b ldr r3, [r7, #4]
+ 8004f00: f8d3 3670 ldr.w r3, [r3, #1648] ; 0x670
+ 8004f04: 2b00 cmp r3, #0
+ 8004f06: d128 bne.n 8004f5a <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x148>
+ if (data == 0xff)
+ 8004f08: 68bb ldr r3, [r7, #8]
+ 8004f0a: 2bff cmp r3, #255 ; 0xff
+ 8004f0c: d10d bne.n 8004f2a <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x118>
+ mode_++;
+ 8004f0e: 687b ldr r3, [r7, #4]
+ 8004f10: f8d3 3670 ldr.w r3, [r3, #1648] ; 0x670
+ 8004f14: 1c5a adds r2, r3, #1
+ 8004f16: 687b ldr r3, [r7, #4]
+ 8004f18: f8c3 2670 str.w r2, [r3, #1648] ; 0x670
+ last_msg_timeout_time = c_time + SERIAL_MSG_TIMEOUT;
+ 8004f1c: 68fb ldr r3, [r7, #12]
+ 8004f1e: f103 0214 add.w r2, r3, #20
+ 8004f22: 687b ldr r3, [r7, #4]
+ 8004f24: f8c3 2690 str.w r2, [r3, #1680] ; 0x690
+ 8004f28: e799 b.n 8004e5e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
+ else if (hardware_.time() - c_time > (SYNC_SECONDS * 1000))
+ 8004f2a: 687b ldr r3, [r7, #4]
+ 8004f2c: 3304 adds r3, #4
+ 8004f2e: 4618 mov r0, r3
+ 8004f30: f7ff fc97 bl 8004862 <_ZN13STM32Hardware4timeEv>
+ 8004f34: 4602 mov r2, r0
+ 8004f36: 68fb ldr r3, [r7, #12]
+ 8004f38: 1ad3 subs r3, r2, r3
+ 8004f3a: f241 3288 movw r2, #5000 ; 0x1388
+ 8004f3e: 4293 cmp r3, r2
+ 8004f40: bf8c ite hi
+ 8004f42: 2301 movhi r3, #1
+ 8004f44: 2300 movls r3, #0
+ 8004f46: b2db uxtb r3, r3
+ 8004f48: 2b00 cmp r3, #0
+ 8004f4a: d088 beq.n 8004e5e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
+ configured_ = false;
+ 8004f4c: 687b ldr r3, [r7, #4]
+ 8004f4e: 2200 movs r2, #0
+ 8004f50: f883 2684 strb.w r2, [r3, #1668] ; 0x684
+ return SPIN_TIMEOUT;
+ 8004f54: f06f 0301 mvn.w r3, #1
+ 8004f58: e133 b.n 80051c2 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x3b0>
+ else if (mode_ == MODE_PROTOCOL_VER)
+ 8004f5a: 687b ldr r3, [r7, #4]
+ 8004f5c: f8d3 3670 ldr.w r3, [r3, #1648] ; 0x670
+ 8004f60: 2b01 cmp r3, #1
+ 8004f62: d11b bne.n 8004f9c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x18a>
+ if (data == PROTOCOL_VER)
+ 8004f64: 68bb ldr r3, [r7, #8]
+ 8004f66: 2bfe cmp r3, #254 ; 0xfe
+ 8004f68: d107 bne.n 8004f7a <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x168>
+ mode_++;
+ 8004f6a: 687b ldr r3, [r7, #4]
+ 8004f6c: f8d3 3670 ldr.w r3, [r3, #1648] ; 0x670
+ 8004f70: 1c5a adds r2, r3, #1
+ 8004f72: 687b ldr r3, [r7, #4]
+ 8004f74: f8c3 2670 str.w r2, [r3, #1648] ; 0x670
+ 8004f78: e771 b.n 8004e5e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
+ mode_ = MODE_FIRST_FF;
+ 8004f7a: 687b ldr r3, [r7, #4]
+ 8004f7c: 2200 movs r2, #0
+ 8004f7e: f8c3 2670 str.w r2, [r3, #1648] ; 0x670
+ if (configured_ == false)
+ 8004f82: 687b ldr r3, [r7, #4]
+ 8004f84: f893 3684 ldrb.w r3, [r3, #1668] ; 0x684
+ 8004f88: f083 0301 eor.w r3, r3, #1
+ 8004f8c: b2db uxtb r3, r3
+ 8004f8e: 2b00 cmp r3, #0
+ 8004f90: f43f af65 beq.w 8004e5e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
+ requestSyncTime(); /* send a msg back showing our protocol version */
+ 8004f94: 6878 ldr r0, [r7, #4]
+ 8004f96: f000 f918 bl 80051ca <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15requestSyncTimeEv>
+ 8004f9a: e760 b.n 8004e5e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
+ else if (mode_ == MODE_SIZE_L) /* bottom half of message size */
+ 8004f9c: 687b ldr r3, [r7, #4]
+ 8004f9e: f8d3 3670 ldr.w r3, [r3, #1648] ; 0x670
+ 8004fa2: 2b02 cmp r3, #2
+ 8004fa4: d113 bne.n 8004fce <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x1bc>
+ bytes_ = data;
+ 8004fa6: 687b ldr r3, [r7, #4]
+ 8004fa8: 68ba ldr r2, [r7, #8]
+ 8004faa: f8c3 2674 str.w r2, [r3, #1652] ; 0x674
+ index_ = 0;
+ 8004fae: 687b ldr r3, [r7, #4]
+ 8004fb0: 2200 movs r2, #0
+ 8004fb2: f8c3 267c str.w r2, [r3, #1660] ; 0x67c
+ mode_++;
+ 8004fb6: 687b ldr r3, [r7, #4]
+ 8004fb8: f8d3 3670 ldr.w r3, [r3, #1648] ; 0x670
+ 8004fbc: 1c5a adds r2, r3, #1
+ 8004fbe: 687b ldr r3, [r7, #4]
+ 8004fc0: f8c3 2670 str.w r2, [r3, #1648] ; 0x670
+ checksum_ = data; /* first byte for calculating size checksum */
+ 8004fc4: 687b ldr r3, [r7, #4]
+ 8004fc6: 68ba ldr r2, [r7, #8]
+ 8004fc8: f8c3 2680 str.w r2, [r3, #1664] ; 0x680
+ 8004fcc: e747 b.n 8004e5e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
+ else if (mode_ == MODE_SIZE_H) /* top half of message size */
+ 8004fce: 687b ldr r3, [r7, #4]
+ 8004fd0: f8d3 3670 ldr.w r3, [r3, #1648] ; 0x670
+ 8004fd4: 2b03 cmp r3, #3
+ 8004fd6: d110 bne.n 8004ffa <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x1e8>
+ bytes_ += data << 8;
+ 8004fd8: 687b ldr r3, [r7, #4]
+ 8004fda: f8d3 2674 ldr.w r2, [r3, #1652] ; 0x674
+ 8004fde: 68bb ldr r3, [r7, #8]
+ 8004fe0: 021b lsls r3, r3, #8
+ 8004fe2: 441a add r2, r3
+ 8004fe4: 687b ldr r3, [r7, #4]
+ 8004fe6: f8c3 2674 str.w r2, [r3, #1652] ; 0x674
+ mode_++;
+ 8004fea: 687b ldr r3, [r7, #4]
+ 8004fec: f8d3 3670 ldr.w r3, [r3, #1648] ; 0x670
+ 8004ff0: 1c5a adds r2, r3, #1
+ 8004ff2: 687b ldr r3, [r7, #4]
+ 8004ff4: f8c3 2670 str.w r2, [r3, #1648] ; 0x670
+ 8004ff8: e731 b.n 8004e5e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
+ else if (mode_ == MODE_SIZE_CHECKSUM)
+ 8004ffa: 687b ldr r3, [r7, #4]
+ 8004ffc: f8d3 3670 ldr.w r3, [r3, #1648] ; 0x670
+ 8005000: 2b04 cmp r3, #4
+ 8005002: d116 bne.n 8005032 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x220>
+ if ((checksum_ % 256) == 255)
+ 8005004: 687b ldr r3, [r7, #4]
+ 8005006: f8d3 3680 ldr.w r3, [r3, #1664] ; 0x680
+ 800500a: 425a negs r2, r3
+ 800500c: b2db uxtb r3, r3
+ 800500e: b2d2 uxtb r2, r2
+ 8005010: bf58 it pl
+ 8005012: 4253 negpl r3, r2
+ 8005014: 2bff cmp r3, #255 ; 0xff
+ 8005016: d107 bne.n 8005028 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x216>
+ mode_++;
+ 8005018: 687b ldr r3, [r7, #4]
+ 800501a: f8d3 3670 ldr.w r3, [r3, #1648] ; 0x670
+ 800501e: 1c5a adds r2, r3, #1
+ 8005020: 687b ldr r3, [r7, #4]
+ 8005022: f8c3 2670 str.w r2, [r3, #1648] ; 0x670
+ 8005026: e71a b.n 8004e5e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
+ mode_ = MODE_FIRST_FF; /* Abandon the frame if the msg len is wrong */
+ 8005028: 687b ldr r3, [r7, #4]
+ 800502a: 2200 movs r2, #0
+ 800502c: f8c3 2670 str.w r2, [r3, #1648] ; 0x670
+ 8005030: e715 b.n 8004e5e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
+ else if (mode_ == MODE_TOPIC_L) /* bottom half of topic id */
+ 8005032: 687b ldr r3, [r7, #4]
+ 8005034: f8d3 3670 ldr.w r3, [r3, #1648] ; 0x670
+ 8005038: 2b05 cmp r3, #5
+ 800503a: d10f bne.n 800505c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x24a>
+ topic_ = data;
+ 800503c: 687b ldr r3, [r7, #4]
+ 800503e: 68ba ldr r2, [r7, #8]
+ 8005040: f8c3 2678 str.w r2, [r3, #1656] ; 0x678
+ mode_++;
+ 8005044: 687b ldr r3, [r7, #4]
+ 8005046: f8d3 3670 ldr.w r3, [r3, #1648] ; 0x670
+ 800504a: 1c5a adds r2, r3, #1
+ 800504c: 687b ldr r3, [r7, #4]
+ 800504e: f8c3 2670 str.w r2, [r3, #1648] ; 0x670
+ checksum_ = data; /* first byte included in checksum */
+ 8005052: 687b ldr r3, [r7, #4]
+ 8005054: 68ba ldr r2, [r7, #8]
+ 8005056: f8c3 2680 str.w r2, [r3, #1664] ; 0x680
+ 800505a: e700 b.n 8004e5e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
+ else if (mode_ == MODE_TOPIC_H) /* top half of topic id */
+ 800505c: 687b ldr r3, [r7, #4]
+ 800505e: f8d3 3670 ldr.w r3, [r3, #1648] ; 0x670
+ 8005062: 2b06 cmp r3, #6
+ 8005064: d117 bne.n 8005096 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x284>
+ topic_ += data << 8;
+ 8005066: 687b ldr r3, [r7, #4]
+ 8005068: f8d3 2678 ldr.w r2, [r3, #1656] ; 0x678
+ 800506c: 68bb ldr r3, [r7, #8]
+ 800506e: 021b lsls r3, r3, #8
+ 8005070: 441a add r2, r3
+ 8005072: 687b ldr r3, [r7, #4]
+ 8005074: f8c3 2678 str.w r2, [r3, #1656] ; 0x678
+ mode_ = MODE_MESSAGE;
+ 8005078: 687b ldr r3, [r7, #4]
+ 800507a: 2207 movs r2, #7
+ 800507c: f8c3 2670 str.w r2, [r3, #1648] ; 0x670
+ if (bytes_ == 0)
+ 8005080: 687b ldr r3, [r7, #4]
+ 8005082: f8d3 3674 ldr.w r3, [r3, #1652] ; 0x674
+ 8005086: 2b00 cmp r3, #0
+ 8005088: f47f aee9 bne.w 8004e5e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
+ mode_ = MODE_MSG_CHECKSUM;
+ 800508c: 687b ldr r3, [r7, #4]
+ 800508e: 2208 movs r2, #8
+ 8005090: f8c3 2670 str.w r2, [r3, #1648] ; 0x670
+ 8005094: e6e3 b.n 8004e5e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
+ else if (mode_ == MODE_MSG_CHECKSUM) /* do checksum */
+ 8005096: 687b ldr r3, [r7, #4]
+ 8005098: f8d3 3670 ldr.w r3, [r3, #1648] ; 0x670
+ 800509c: 2b08 cmp r3, #8
+ 800509e: f47f aede bne.w 8004e5e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
+ mode_ = MODE_FIRST_FF;
+ 80050a2: 687b ldr r3, [r7, #4]
+ 80050a4: 2200 movs r2, #0
+ 80050a6: f8c3 2670 str.w r2, [r3, #1648] ; 0x670
+ if ((checksum_ % 256) == 255)
+ 80050aa: 687b ldr r3, [r7, #4]
+ 80050ac: f8d3 3680 ldr.w r3, [r3, #1664] ; 0x680
+ 80050b0: 425a negs r2, r3
+ 80050b2: b2db uxtb r3, r3
+ 80050b4: b2d2 uxtb r2, r2
+ 80050b6: bf58 it pl
+ 80050b8: 4253 negpl r3, r2
+ 80050ba: 2bff cmp r3, #255 ; 0xff
+ 80050bc: f47f aecf bne.w 8004e5e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
+ if (topic_ == TopicInfo::ID_PUBLISHER)
+ 80050c0: 687b ldr r3, [r7, #4]
+ 80050c2: f8d3 3678 ldr.w r3, [r3, #1656] ; 0x678
+ 80050c6: 2b00 cmp r3, #0
+ 80050c8: d110 bne.n 80050ec <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x2da>
+ requestSyncTime();
+ 80050ca: 6878 ldr r0, [r7, #4]
+ 80050cc: f000 f87d bl 80051ca <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15requestSyncTimeEv>
+ negotiateTopics();
+ 80050d0: 6878 ldr r0, [r7, #4]
+ 80050d2: f000 f898 bl 8005206 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv>
+ last_sync_time = c_time;
+ 80050d6: 687b ldr r3, [r7, #4]
+ 80050d8: 68fa ldr r2, [r7, #12]
+ 80050da: f8c3 2688 str.w r2, [r3, #1672] ; 0x688
+ last_sync_receive_time = c_time;
+ 80050de: 687b ldr r3, [r7, #4]
+ 80050e0: 68fa ldr r2, [r7, #12]
+ 80050e2: f8c3 268c str.w r2, [r3, #1676] ; 0x68c
+ return SPIN_ERR;
+ 80050e6: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff
+ 80050ea: e06a b.n 80051c2 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x3b0>
+ else if (topic_ == TopicInfo::ID_TIME)
+ 80050ec: 687b ldr r3, [r7, #4]
+ 80050ee: f8d3 3678 ldr.w r3, [r3, #1656] ; 0x678
+ 80050f2: 2b0a cmp r3, #10
+ 80050f4: d107 bne.n 8005106 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x2f4>
+ syncTime(message_in);
+ 80050f6: 687b ldr r3, [r7, #4]
+ 80050f8: f503 73d4 add.w r3, r3, #424 ; 0x1a8
+ 80050fc: 4619 mov r1, r3
+ 80050fe: 6878 ldr r0, [r7, #4]
+ 8005100: f000 f962 bl 80053c8 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8syncTimeEPh>
+ 8005104: e6ab b.n 8004e5e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
+ else if (topic_ == TopicInfo::ID_PARAMETER_REQUEST)
+ 8005106: 687b ldr r3, [r7, #4]
+ 8005108: f8d3 3678 ldr.w r3, [r3, #1656] ; 0x678
+ 800510c: 2b06 cmp r3, #6
+ 800510e: d10e bne.n 800512e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x31c>
+ req_param_resp.deserialize(message_in);
+ 8005110: 687b ldr r3, [r7, #4]
+ 8005112: f503 62d3 add.w r2, r3, #1688 ; 0x698
+ 8005116: 687b ldr r3, [r7, #4]
+ 8005118: f503 73d4 add.w r3, r3, #424 ; 0x1a8
+ 800511c: 4619 mov r1, r3
+ 800511e: 4610 mov r0, r2
+ 8005120: f7ff f8b9 bl 8004296 <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh>
+ param_recieved = true;
+ 8005124: 687b ldr r3, [r7, #4]
+ 8005126: 2201 movs r2, #1
+ 8005128: f883 2694 strb.w r2, [r3, #1684] ; 0x694
+ 800512c: e697 b.n 8004e5e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
+ else if (topic_ == TopicInfo::ID_TX_STOP)
+ 800512e: 687b ldr r3, [r7, #4]
+ 8005130: f8d3 3678 ldr.w r3, [r3, #1656] ; 0x678
+ 8005134: 2b0b cmp r3, #11
+ 8005136: d104 bne.n 8005142 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x330>
+ configured_ = false;
+ 8005138: 687b ldr r3, [r7, #4]
+ 800513a: 2200 movs r2, #0
+ 800513c: f883 2684 strb.w r2, [r3, #1668] ; 0x684
+ 8005140: e68d b.n 8004e5e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
+ if (subscribers[topic_ - 100])
+ 8005142: 687b ldr r3, [r7, #4]
+ 8005144: f8d3 3678 ldr.w r3, [r3, #1656] ; 0x678
+ 8005148: 3b64 subs r3, #100 ; 0x64
+ 800514a: 687a ldr r2, [r7, #4]
+ 800514c: f503 73c1 add.w r3, r3, #386 ; 0x182
+ 8005150: 009b lsls r3, r3, #2
+ 8005152: 4413 add r3, r2
+ 8005154: 685b ldr r3, [r3, #4]
+ 8005156: 2b00 cmp r3, #0
+ 8005158: f43f ae81 beq.w 8004e5e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
+ subscribers[topic_ - 100]->callback(message_in);
+ 800515c: 687b ldr r3, [r7, #4]
+ 800515e: f8d3 3678 ldr.w r3, [r3, #1656] ; 0x678
+ 8005162: 3b64 subs r3, #100 ; 0x64
+ 8005164: 687a ldr r2, [r7, #4]
+ 8005166: f503 73c1 add.w r3, r3, #386 ; 0x182
+ 800516a: 009b lsls r3, r3, #2
+ 800516c: 4413 add r3, r2
+ 800516e: 6858 ldr r0, [r3, #4]
+ 8005170: 687b ldr r3, [r7, #4]
+ 8005172: f8d3 3678 ldr.w r3, [r3, #1656] ; 0x678
+ 8005176: 3b64 subs r3, #100 ; 0x64
+ 8005178: 687a ldr r2, [r7, #4]
+ 800517a: f503 73c1 add.w r3, r3, #386 ; 0x182
+ 800517e: 009b lsls r3, r3, #2
+ 8005180: 4413 add r3, r2
+ 8005182: 685b ldr r3, [r3, #4]
+ 8005184: 681b ldr r3, [r3, #0]
+ 8005186: 681b ldr r3, [r3, #0]
+ 8005188: 687a ldr r2, [r7, #4]
+ 800518a: f502 72d4 add.w r2, r2, #424 ; 0x1a8
+ 800518e: 4611 mov r1, r2
+ 8005190: 4798 blx r3
+ while (true)
+ 8005192: e664 b.n 8004e5e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
+ break;
+ 8005194: bf00 nop
+ if (configured_ && ((c_time - last_sync_time) > (SYNC_SECONDS * 500)))
+ 8005196: 687b ldr r3, [r7, #4]
+ 8005198: f893 3684 ldrb.w r3, [r3, #1668] ; 0x684
+ 800519c: 2b00 cmp r3, #0
+ 800519e: d00f beq.n 80051c0 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x3ae>
+ 80051a0: 687b ldr r3, [r7, #4]
+ 80051a2: f8d3 3688 ldr.w r3, [r3, #1672] ; 0x688
+ 80051a6: 68fa ldr r2, [r7, #12]
+ 80051a8: 1ad3 subs r3, r2, r3
+ 80051aa: f640 12c4 movw r2, #2500 ; 0x9c4
+ 80051ae: 4293 cmp r3, r2
+ 80051b0: d906 bls.n 80051c0 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x3ae>
+ requestSyncTime();
+ 80051b2: 6878 ldr r0, [r7, #4]
+ 80051b4: f000 f809 bl 80051ca <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15requestSyncTimeEv>
+ last_sync_time = c_time;
+ 80051b8: 687b ldr r3, [r7, #4]
+ 80051ba: 68fa ldr r2, [r7, #12]
+ 80051bc: f8c3 2688 str.w r2, [r3, #1672] ; 0x688
+ return SPIN_OK;
+ 80051c0: 2300 movs r3, #0
+ }
+ 80051c2: 4618 mov r0, r3
+ 80051c4: 3710 adds r7, #16
+ 80051c6: 46bd mov sp, r7
+ 80051c8: bd80 pop {r7, pc}
+
+080051ca <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15requestSyncTimeEv>:
+ void requestSyncTime()
+ 80051ca: b580 push {r7, lr}
+ 80051cc: b086 sub sp, #24
+ 80051ce: af00 add r7, sp, #0
+ 80051d0: 6078 str r0, [r7, #4]
+ std_msgs::Time t;
+ 80051d2: f107 030c add.w r3, r7, #12
+ 80051d6: 4618 mov r0, r3
+ 80051d8: f7fe fbc4 bl 8003964 <_ZN8std_msgs4TimeC1Ev>
+ publish(TopicInfo::ID_TIME, &t);
+ 80051dc: 687b ldr r3, [r7, #4]
+ 80051de: 681b ldr r3, [r3, #0]
+ 80051e0: 681b ldr r3, [r3, #0]
+ 80051e2: f107 020c add.w r2, r7, #12
+ 80051e6: 210a movs r1, #10
+ 80051e8: 6878 ldr r0, [r7, #4]
+ 80051ea: 4798 blx r3
+ rt_time = hardware_.time();
+ 80051ec: 687b ldr r3, [r7, #4]
+ 80051ee: 3304 adds r3, #4
+ 80051f0: 4618 mov r0, r3
+ 80051f2: f7ff fb36 bl 8004862 <_ZN13STM32Hardware4timeEv>
+ 80051f6: 4602 mov r2, r0
+ 80051f8: 687b ldr r3, [r7, #4]
+ 80051fa: f8c3 2198 str.w r2, [r3, #408] ; 0x198
+ }
+ 80051fe: bf00 nop
+ 8005200: 3718 adds r7, #24
+ 8005202: 46bd mov sp, r7
+ 8005204: bd80 pop {r7, pc}
+
+08005206 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv>:
+ }
+ }
+ return false;
+ }
+
+ void negotiateTopics()
+ 8005206: b590 push {r4, r7, lr}
+ 8005208: b08b sub sp, #44 ; 0x2c
+ 800520a: af00 add r7, sp, #0
+ 800520c: 6078 str r0, [r7, #4]
+ {
+ rosserial_msgs::TopicInfo ti;
+ 800520e: f107 030c add.w r3, r7, #12
+ 8005212: 4618 mov r0, r3
+ 8005214: f7fe fc96 bl 8003b44 <_ZN14rosserial_msgs9TopicInfoC1Ev>
+ int i;
+ for (i = 0; i < MAX_PUBLISHERS; i++)
+ 8005218: 2300 movs r3, #0
+ 800521a: 627b str r3, [r7, #36] ; 0x24
+ 800521c: 6a7b ldr r3, [r7, #36] ; 0x24
+ 800521e: 2b18 cmp r3, #24
+ 8005220: dc5b bgt.n 80052da <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0xd4>
+ {
+ if (publishers[i] != 0) // non-empty slot
+ 8005222: 687b ldr r3, [r7, #4]
+ 8005224: 6a7a ldr r2, [r7, #36] ; 0x24
+ 8005226: f502 72b5 add.w r2, r2, #362 ; 0x16a
+ 800522a: f853 3022 ldr.w r3, [r3, r2, lsl #2]
+ 800522e: 2b00 cmp r3, #0
+ 8005230: d04f beq.n 80052d2 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0xcc>
+ {
+ ti.topic_id = publishers[i]->id_;
+ 8005232: 687b ldr r3, [r7, #4]
+ 8005234: 6a7a ldr r2, [r7, #36] ; 0x24
+ 8005236: f502 72b5 add.w r2, r2, #362 ; 0x16a
+ 800523a: f853 3022 ldr.w r3, [r3, r2, lsl #2]
+ 800523e: 689b ldr r3, [r3, #8]
+ 8005240: b29b uxth r3, r3
+ 8005242: 823b strh r3, [r7, #16]
+ ti.topic_name = (char *) publishers[i]->topic_;
+ 8005244: 687b ldr r3, [r7, #4]
+ 8005246: 6a7a ldr r2, [r7, #36] ; 0x24
+ 8005248: f502 72b5 add.w r2, r2, #362 ; 0x16a
+ 800524c: f853 3022 ldr.w r3, [r3, r2, lsl #2]
+ 8005250: 681b ldr r3, [r3, #0]
+ 8005252: 617b str r3, [r7, #20]
+ ti.message_type = (char *) publishers[i]->msg_->getType();
+ 8005254: 687b ldr r3, [r7, #4]
+ 8005256: 6a7a ldr r2, [r7, #36] ; 0x24
+ 8005258: f502 72b5 add.w r2, r2, #362 ; 0x16a
+ 800525c: f853 3022 ldr.w r3, [r3, r2, lsl #2]
+ 8005260: 6859 ldr r1, [r3, #4]
+ 8005262: 687b ldr r3, [r7, #4]
+ 8005264: 6a7a ldr r2, [r7, #36] ; 0x24
+ 8005266: f502 72b5 add.w r2, r2, #362 ; 0x16a
+ 800526a: f853 3022 ldr.w r3, [r3, r2, lsl #2]
+ 800526e: 685b ldr r3, [r3, #4]
+ 8005270: 681b ldr r3, [r3, #0]
+ 8005272: 3308 adds r3, #8
+ 8005274: 681b ldr r3, [r3, #0]
+ 8005276: 4608 mov r0, r1
+ 8005278: 4798 blx r3
+ 800527a: 4603 mov r3, r0
+ 800527c: 61bb str r3, [r7, #24]
+ ti.md5sum = (char *) publishers[i]->msg_->getMD5();
+ 800527e: 687b ldr r3, [r7, #4]
+ 8005280: 6a7a ldr r2, [r7, #36] ; 0x24
+ 8005282: f502 72b5 add.w r2, r2, #362 ; 0x16a
+ 8005286: f853 3022 ldr.w r3, [r3, r2, lsl #2]
+ 800528a: 6859 ldr r1, [r3, #4]
+ 800528c: 687b ldr r3, [r7, #4]
+ 800528e: 6a7a ldr r2, [r7, #36] ; 0x24
+ 8005290: f502 72b5 add.w r2, r2, #362 ; 0x16a
+ 8005294: f853 3022 ldr.w r3, [r3, r2, lsl #2]
+ 8005298: 685b ldr r3, [r3, #4]
+ 800529a: 681b ldr r3, [r3, #0]
+ 800529c: 330c adds r3, #12
+ 800529e: 681b ldr r3, [r3, #0]
+ 80052a0: 4608 mov r0, r1
+ 80052a2: 4798 blx r3
+ 80052a4: 4603 mov r3, r0
+ 80052a6: 61fb str r3, [r7, #28]
+ ti.buffer_size = OUTPUT_SIZE;
+ 80052a8: f44f 7300 mov.w r3, #512 ; 0x200
+ 80052ac: 623b str r3, [r7, #32]
+ publish(publishers[i]->getEndpointType(), &ti);
+ 80052ae: 687b ldr r3, [r7, #4]
+ 80052b0: 681b ldr r3, [r3, #0]
+ 80052b2: 681c ldr r4, [r3, #0]
+ 80052b4: 687b ldr r3, [r7, #4]
+ 80052b6: 6a7a ldr r2, [r7, #36] ; 0x24
+ 80052b8: f502 72b5 add.w r2, r2, #362 ; 0x16a
+ 80052bc: f853 3022 ldr.w r3, [r3, r2, lsl #2]
+ 80052c0: 4618 mov r0, r3
+ 80052c2: f7ff f9a0 bl 8004606 <_ZN3ros9Publisher15getEndpointTypeEv>
+ 80052c6: 4601 mov r1, r0
+ 80052c8: f107 030c add.w r3, r7, #12
+ 80052cc: 461a mov r2, r3
+ 80052ce: 6878 ldr r0, [r7, #4]
+ 80052d0: 47a0 blx r4
+ for (i = 0; i < MAX_PUBLISHERS; i++)
+ 80052d2: 6a7b ldr r3, [r7, #36] ; 0x24
+ 80052d4: 3301 adds r3, #1
+ 80052d6: 627b str r3, [r7, #36] ; 0x24
+ 80052d8: e7a0 b.n 800521c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x16>
+ }
+ }
+ for (i = 0; i < MAX_SUBSCRIBERS; i++)
+ 80052da: 2300 movs r3, #0
+ 80052dc: 627b str r3, [r7, #36] ; 0x24
+ 80052de: 6a7b ldr r3, [r7, #36] ; 0x24
+ 80052e0: 2b18 cmp r3, #24
+ 80052e2: dc68 bgt.n 80053b6 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x1b0>
+ {
+ if (subscribers[i] != 0) // non-empty slot
+ 80052e4: 687a ldr r2, [r7, #4]
+ 80052e6: 6a7b ldr r3, [r7, #36] ; 0x24
+ 80052e8: f503 73c1 add.w r3, r3, #386 ; 0x182
+ 80052ec: 009b lsls r3, r3, #2
+ 80052ee: 4413 add r3, r2
+ 80052f0: 685b ldr r3, [r3, #4]
+ 80052f2: 2b00 cmp r3, #0
+ 80052f4: d05b beq.n 80053ae <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x1a8>
+ {
+ ti.topic_id = subscribers[i]->id_;
+ 80052f6: 687a ldr r2, [r7, #4]
+ 80052f8: 6a7b ldr r3, [r7, #36] ; 0x24
+ 80052fa: f503 73c1 add.w r3, r3, #386 ; 0x182
+ 80052fe: 009b lsls r3, r3, #2
+ 8005300: 4413 add r3, r2
+ 8005302: 685b ldr r3, [r3, #4]
+ 8005304: 685b ldr r3, [r3, #4]
+ 8005306: b29b uxth r3, r3
+ 8005308: 823b strh r3, [r7, #16]
+ ti.topic_name = (char *) subscribers[i]->topic_;
+ 800530a: 687a ldr r2, [r7, #4]
+ 800530c: 6a7b ldr r3, [r7, #36] ; 0x24
+ 800530e: f503 73c1 add.w r3, r3, #386 ; 0x182
+ 8005312: 009b lsls r3, r3, #2
+ 8005314: 4413 add r3, r2
+ 8005316: 685b ldr r3, [r3, #4]
+ 8005318: 689b ldr r3, [r3, #8]
+ 800531a: 617b str r3, [r7, #20]
+ ti.message_type = (char *) subscribers[i]->getMsgType();
+ 800531c: 687a ldr r2, [r7, #4]
+ 800531e: 6a7b ldr r3, [r7, #36] ; 0x24
+ 8005320: f503 73c1 add.w r3, r3, #386 ; 0x182
+ 8005324: 009b lsls r3, r3, #2
+ 8005326: 4413 add r3, r2
+ 8005328: 6859 ldr r1, [r3, #4]
+ 800532a: 687a ldr r2, [r7, #4]
+ 800532c: 6a7b ldr r3, [r7, #36] ; 0x24
+ 800532e: f503 73c1 add.w r3, r3, #386 ; 0x182
+ 8005332: 009b lsls r3, r3, #2
+ 8005334: 4413 add r3, r2
+ 8005336: 685b ldr r3, [r3, #4]
+ 8005338: 681b ldr r3, [r3, #0]
+ 800533a: 3308 adds r3, #8
+ 800533c: 681b ldr r3, [r3, #0]
+ 800533e: 4608 mov r0, r1
+ 8005340: 4798 blx r3
+ 8005342: 4603 mov r3, r0
+ 8005344: 61bb str r3, [r7, #24]
+ ti.md5sum = (char *) subscribers[i]->getMsgMD5();
+ 8005346: 687a ldr r2, [r7, #4]
+ 8005348: 6a7b ldr r3, [r7, #36] ; 0x24
+ 800534a: f503 73c1 add.w r3, r3, #386 ; 0x182
+ 800534e: 009b lsls r3, r3, #2
+ 8005350: 4413 add r3, r2
+ 8005352: 6859 ldr r1, [r3, #4]
+ 8005354: 687a ldr r2, [r7, #4]
+ 8005356: 6a7b ldr r3, [r7, #36] ; 0x24
+ 8005358: f503 73c1 add.w r3, r3, #386 ; 0x182
+ 800535c: 009b lsls r3, r3, #2
+ 800535e: 4413 add r3, r2
+ 8005360: 685b ldr r3, [r3, #4]
+ 8005362: 681b ldr r3, [r3, #0]
+ 8005364: 330c adds r3, #12
+ 8005366: 681b ldr r3, [r3, #0]
+ 8005368: 4608 mov r0, r1
+ 800536a: 4798 blx r3
+ 800536c: 4603 mov r3, r0
+ 800536e: 61fb str r3, [r7, #28]
+ ti.buffer_size = INPUT_SIZE;
+ 8005370: f44f 7300 mov.w r3, #512 ; 0x200
+ 8005374: 623b str r3, [r7, #32]
+ publish(subscribers[i]->getEndpointType(), &ti);
+ 8005376: 687b ldr r3, [r7, #4]
+ 8005378: 681b ldr r3, [r3, #0]
+ 800537a: 681c ldr r4, [r3, #0]
+ 800537c: 687a ldr r2, [r7, #4]
+ 800537e: 6a7b ldr r3, [r7, #36] ; 0x24
+ 8005380: f503 73c1 add.w r3, r3, #386 ; 0x182
+ 8005384: 009b lsls r3, r3, #2
+ 8005386: 4413 add r3, r2
+ 8005388: 6859 ldr r1, [r3, #4]
+ 800538a: 687a ldr r2, [r7, #4]
+ 800538c: 6a7b ldr r3, [r7, #36] ; 0x24
+ 800538e: f503 73c1 add.w r3, r3, #386 ; 0x182
+ 8005392: 009b lsls r3, r3, #2
+ 8005394: 4413 add r3, r2
+ 8005396: 685b ldr r3, [r3, #4]
+ 8005398: 681b ldr r3, [r3, #0]
+ 800539a: 3304 adds r3, #4
+ 800539c: 681b ldr r3, [r3, #0]
+ 800539e: 4608 mov r0, r1
+ 80053a0: 4798 blx r3
+ 80053a2: 4601 mov r1, r0
+ 80053a4: f107 030c add.w r3, r7, #12
+ 80053a8: 461a mov r2, r3
+ 80053aa: 6878 ldr r0, [r7, #4]
+ 80053ac: 47a0 blx r4
+ for (i = 0; i < MAX_SUBSCRIBERS; i++)
+ 80053ae: 6a7b ldr r3, [r7, #36] ; 0x24
+ 80053b0: 3301 adds r3, #1
+ 80053b2: 627b str r3, [r7, #36] ; 0x24
+ 80053b4: e793 b.n 80052de <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0xd8>
+ }
+ }
+ configured_ = true;
+ 80053b6: 687b ldr r3, [r7, #4]
+ 80053b8: 2201 movs r2, #1
+ 80053ba: f883 2684 strb.w r2, [r3, #1668] ; 0x684
+ }
+ 80053be: bf00 nop
+ 80053c0: 372c adds r7, #44 ; 0x2c
+ 80053c2: 46bd mov sp, r7
+ 80053c4: bd90 pop {r4, r7, pc}
+ ...
+
+080053c8 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8syncTimeEPh>:
+ void syncTime(uint8_t * data)
+ 80053c8: b580 push {r7, lr}
+ 80053ca: b086 sub sp, #24
+ 80053cc: af00 add r7, sp, #0
+ 80053ce: 6078 str r0, [r7, #4]
+ 80053d0: 6039 str r1, [r7, #0]
+ std_msgs::Time t;
+ 80053d2: f107 0308 add.w r3, r7, #8
+ 80053d6: 4618 mov r0, r3
+ 80053d8: f7fe fac4 bl 8003964 <_ZN8std_msgs4TimeC1Ev>
+ uint32_t offset = hardware_.time() - rt_time;
+ 80053dc: 687b ldr r3, [r7, #4]
+ 80053de: 3304 adds r3, #4
+ 80053e0: 4618 mov r0, r3
+ 80053e2: f7ff fa3e bl 8004862 <_ZN13STM32Hardware4timeEv>
+ 80053e6: 4602 mov r2, r0
+ 80053e8: 687b ldr r3, [r7, #4]
+ 80053ea: f8d3 3198 ldr.w r3, [r3, #408] ; 0x198
+ 80053ee: 1ad3 subs r3, r2, r3
+ 80053f0: 617b str r3, [r7, #20]
+ t.deserialize(data);
+ 80053f2: f107 0308 add.w r3, r7, #8
+ 80053f6: 6839 ldr r1, [r7, #0]
+ 80053f8: 4618 mov r0, r3
+ 80053fa: f7fe fb23 bl 8003a44 <_ZN8std_msgs4Time11deserializeEPh>
+ t.data.sec += offset / 1000;
+ 80053fe: 68fa ldr r2, [r7, #12]
+ 8005400: 697b ldr r3, [r7, #20]
+ 8005402: 4915 ldr r1, [pc, #84] ; (8005458 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8syncTimeEPh+0x90>)
+ 8005404: fba1 1303 umull r1, r3, r1, r3
+ 8005408: 099b lsrs r3, r3, #6
+ 800540a: 4413 add r3, r2
+ 800540c: 60fb str r3, [r7, #12]
+ t.data.nsec += (offset % 1000) * 1000000UL;
+ 800540e: 6939 ldr r1, [r7, #16]
+ 8005410: 697a ldr r2, [r7, #20]
+ 8005412: 4b11 ldr r3, [pc, #68] ; (8005458 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8syncTimeEPh+0x90>)
+ 8005414: fba3 0302 umull r0, r3, r3, r2
+ 8005418: 099b lsrs r3, r3, #6
+ 800541a: f44f 707a mov.w r0, #1000 ; 0x3e8
+ 800541e: fb00 f303 mul.w r3, r0, r3
+ 8005422: 1ad3 subs r3, r2, r3
+ 8005424: 4a0d ldr r2, [pc, #52] ; (800545c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8syncTimeEPh+0x94>)
+ 8005426: fb02 f303 mul.w r3, r2, r3
+ 800542a: 440b add r3, r1
+ 800542c: 613b str r3, [r7, #16]
+ this->setNow(t.data);
+ 800542e: f107 0308 add.w r3, r7, #8
+ 8005432: 3304 adds r3, #4
+ 8005434: 4619 mov r1, r3
+ 8005436: 6878 ldr r0, [r7, #4]
+ 8005438: f000 f8a4 bl 8005584 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE6setNowERNS_4TimeE>
+ last_sync_receive_time = hardware_.time();
+ 800543c: 687b ldr r3, [r7, #4]
+ 800543e: 3304 adds r3, #4
+ 8005440: 4618 mov r0, r3
+ 8005442: f7ff fa0e bl 8004862 <_ZN13STM32Hardware4timeEv>
+ 8005446: 4602 mov r2, r0
+ 8005448: 687b ldr r3, [r7, #4]
+ 800544a: f8c3 268c str.w r2, [r3, #1676] ; 0x68c
+ }
+ 800544e: bf00 nop
+ 8005450: 3718 adds r7, #24
+ 8005452: 46bd mov sp, r7
+ 8005454: bd80 pop {r7, pc}
+ 8005456: bf00 nop
+ 8005458: 10624dd3 .word 0x10624dd3
+ 800545c: 000f4240 .word 0x000f4240
+
+08005460 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE>:
+
+ virtual int publish(int id, const Msg * msg)
+ 8005460: b580 push {r7, lr}
+ 8005462: b088 sub sp, #32
+ 8005464: af00 add r7, sp, #0
+ 8005466: 60f8 str r0, [r7, #12]
+ 8005468: 60b9 str r1, [r7, #8]
+ 800546a: 607a str r2, [r7, #4]
+ {
+ if (id >= 100 && !configured_)
+ 800546c: 68bb ldr r3, [r7, #8]
+ 800546e: 2b63 cmp r3, #99 ; 0x63
+ 8005470: dd09 ble.n 8005486 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x26>
+ 8005472: 68fb ldr r3, [r7, #12]
+ 8005474: f893 3684 ldrb.w r3, [r3, #1668] ; 0x684
+ 8005478: f083 0301 eor.w r3, r3, #1
+ 800547c: b2db uxtb r3, r3
+ 800547e: 2b00 cmp r3, #0
+ 8005480: d001 beq.n 8005486 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x26>
+ return 0;
+ 8005482: 2300 movs r3, #0
+ 8005484: e077 b.n 8005576 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x116>
+
+ /* serialize message */
+ int l = msg->serialize(message_out + 7);
+ 8005486: 687b ldr r3, [r7, #4]
+ 8005488: 681b ldr r3, [r3, #0]
+ 800548a: 681b ldr r3, [r3, #0]
+ 800548c: 68fa ldr r2, [r7, #12]
+ 800548e: f502 726a add.w r2, r2, #936 ; 0x3a8
+ 8005492: 3207 adds r2, #7
+ 8005494: 4611 mov r1, r2
+ 8005496: 6878 ldr r0, [r7, #4]
+ 8005498: 4798 blx r3
+ 800549a: 6178 str r0, [r7, #20]
+
+ /* setup the header */
+ message_out[0] = 0xff;
+ 800549c: 68fb ldr r3, [r7, #12]
+ 800549e: 22ff movs r2, #255 ; 0xff
+ 80054a0: f883 23a8 strb.w r2, [r3, #936] ; 0x3a8
+ message_out[1] = PROTOCOL_VER;
+ 80054a4: 68fb ldr r3, [r7, #12]
+ 80054a6: 22fe movs r2, #254 ; 0xfe
+ 80054a8: f883 23a9 strb.w r2, [r3, #937] ; 0x3a9
+ message_out[2] = (uint8_t)((uint16_t)l & 255);
+ 80054ac: 697b ldr r3, [r7, #20]
+ 80054ae: b2da uxtb r2, r3
+ 80054b0: 68fb ldr r3, [r7, #12]
+ 80054b2: f883 23aa strb.w r2, [r3, #938] ; 0x3aa
+ message_out[3] = (uint8_t)((uint16_t)l >> 8);
+ 80054b6: 697b ldr r3, [r7, #20]
+ 80054b8: b29b uxth r3, r3
+ 80054ba: 121b asrs r3, r3, #8
+ 80054bc: b2da uxtb r2, r3
+ 80054be: 68fb ldr r3, [r7, #12]
+ 80054c0: f883 23ab strb.w r2, [r3, #939] ; 0x3ab
+ message_out[4] = 255 - ((message_out[2] + message_out[3]) % 256);
+ 80054c4: 68fb ldr r3, [r7, #12]
+ 80054c6: f893 23aa ldrb.w r2, [r3, #938] ; 0x3aa
+ 80054ca: 68fb ldr r3, [r7, #12]
+ 80054cc: f893 33ab ldrb.w r3, [r3, #939] ; 0x3ab
+ 80054d0: 4413 add r3, r2
+ 80054d2: b2db uxtb r3, r3
+ 80054d4: 43db mvns r3, r3
+ 80054d6: b2da uxtb r2, r3
+ 80054d8: 68fb ldr r3, [r7, #12]
+ 80054da: f883 23ac strb.w r2, [r3, #940] ; 0x3ac
+ message_out[5] = (uint8_t)((int16_t)id & 255);
+ 80054de: 68bb ldr r3, [r7, #8]
+ 80054e0: b2da uxtb r2, r3
+ 80054e2: 68fb ldr r3, [r7, #12]
+ 80054e4: f883 23ad strb.w r2, [r3, #941] ; 0x3ad
+ message_out[6] = (uint8_t)((int16_t)id >> 8);
+ 80054e8: 68bb ldr r3, [r7, #8]
+ 80054ea: b21b sxth r3, r3
+ 80054ec: 121b asrs r3, r3, #8
+ 80054ee: b2da uxtb r2, r3
+ 80054f0: 68fb ldr r3, [r7, #12]
+ 80054f2: f883 23ae strb.w r2, [r3, #942] ; 0x3ae
+
+ /* calculate checksum */
+ int chk = 0;
+ 80054f6: 2300 movs r3, #0
+ 80054f8: 61fb str r3, [r7, #28]
+ for (int i = 5; i < l + 7; i++)
+ 80054fa: 2305 movs r3, #5
+ 80054fc: 61bb str r3, [r7, #24]
+ 80054fe: 697b ldr r3, [r7, #20]
+ 8005500: 3307 adds r3, #7
+ 8005502: 69ba ldr r2, [r7, #24]
+ 8005504: 429a cmp r2, r3
+ 8005506: da0d bge.n 8005524 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0xc4>
+ chk += message_out[i];
+ 8005508: 68fa ldr r2, [r7, #12]
+ 800550a: 69bb ldr r3, [r7, #24]
+ 800550c: 4413 add r3, r2
+ 800550e: f503 736a add.w r3, r3, #936 ; 0x3a8
+ 8005512: 781b ldrb r3, [r3, #0]
+ 8005514: 461a mov r2, r3
+ 8005516: 69fb ldr r3, [r7, #28]
+ 8005518: 4413 add r3, r2
+ 800551a: 61fb str r3, [r7, #28]
+ for (int i = 5; i < l + 7; i++)
+ 800551c: 69bb ldr r3, [r7, #24]
+ 800551e: 3301 adds r3, #1
+ 8005520: 61bb str r3, [r7, #24]
+ 8005522: e7ec b.n 80054fe <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x9e>
+ l += 7;
+ 8005524: 697b ldr r3, [r7, #20]
+ 8005526: 3307 adds r3, #7
+ 8005528: 617b str r3, [r7, #20]
+ message_out[l++] = 255 - (chk % 256);
+ 800552a: 69fb ldr r3, [r7, #28]
+ 800552c: 425a negs r2, r3
+ 800552e: b2db uxtb r3, r3
+ 8005530: b2d2 uxtb r2, r2
+ 8005532: bf58 it pl
+ 8005534: 4253 negpl r3, r2
+ 8005536: b2da uxtb r2, r3
+ 8005538: 697b ldr r3, [r7, #20]
+ 800553a: 1c59 adds r1, r3, #1
+ 800553c: 6179 str r1, [r7, #20]
+ 800553e: 43d2 mvns r2, r2
+ 8005540: b2d1 uxtb r1, r2
+ 8005542: 68fa ldr r2, [r7, #12]
+ 8005544: 4413 add r3, r2
+ 8005546: 460a mov r2, r1
+ 8005548: f883 23a8 strb.w r2, [r3, #936] ; 0x3a8
+
+ if (l <= OUTPUT_SIZE)
+ 800554c: 697b ldr r3, [r7, #20]
+ 800554e: f5b3 7f00 cmp.w r3, #512 ; 0x200
+ 8005552: dc0a bgt.n 800556a <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x10a>
+ {
+ hardware_.write(message_out, l);
+ 8005554: 68fb ldr r3, [r7, #12]
+ 8005556: 1d18 adds r0, r3, #4
+ 8005558: 68fb ldr r3, [r7, #12]
+ 800555a: f503 736a add.w r3, r3, #936 ; 0x3a8
+ 800555e: 697a ldr r2, [r7, #20]
+ 8005560: 4619 mov r1, r3
+ 8005562: f7ff f939 bl 80047d8 <_ZN13STM32Hardware5writeEPhi>
+ return l;
+ 8005566: 697b ldr r3, [r7, #20]
+ 8005568: e005 b.n 8005576 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x116>
+ }
+ else
+ {
+ logerror("Message from device dropped: message larger than buffer.");
+ 800556a: 4905 ldr r1, [pc, #20] ; (8005580 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x120>)
+ 800556c: 68f8 ldr r0, [r7, #12]
+ 800556e: f000 f849 bl 8005604 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8logerrorEPKc>
+ return -1;
+ 8005572: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff
+ }
+ }
+ 8005576: 4618 mov r0, r3
+ 8005578: 3720 adds r7, #32
+ 800557a: 46bd mov sp, r7
+ 800557c: bd80 pop {r7, pc}
+ 800557e: bf00 nop
+ 8005580: 08005ef8 .word 0x08005ef8
+
+08005584 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE6setNowERNS_4TimeE>:
+ void setNow(Time & new_now)
+ 8005584: b580 push {r7, lr}
+ 8005586: b084 sub sp, #16
+ 8005588: af00 add r7, sp, #0
+ 800558a: 6078 str r0, [r7, #4]
+ 800558c: 6039 str r1, [r7, #0]
+ uint32_t ms = hardware_.time();
+ 800558e: 687b ldr r3, [r7, #4]
+ 8005590: 3304 adds r3, #4
+ 8005592: 4618 mov r0, r3
+ 8005594: f7ff f965 bl 8004862 <_ZN13STM32Hardware4timeEv>
+ 8005598: 60f8 str r0, [r7, #12]
+ sec_offset = new_now.sec - ms / 1000 - 1;
+ 800559a: 683b ldr r3, [r7, #0]
+ 800559c: 681a ldr r2, [r3, #0]
+ 800559e: 68fb ldr r3, [r7, #12]
+ 80055a0: 4915 ldr r1, [pc, #84] ; (80055f8 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE6setNowERNS_4TimeE+0x74>)
+ 80055a2: fba1 1303 umull r1, r3, r1, r3
+ 80055a6: 099b lsrs r3, r3, #6
+ 80055a8: 1ad3 subs r3, r2, r3
+ 80055aa: 1e5a subs r2, r3, #1
+ 80055ac: 687b ldr r3, [r7, #4]
+ 80055ae: f8c3 219c str.w r2, [r3, #412] ; 0x19c
+ nsec_offset = new_now.nsec - (ms % 1000) * 1000000UL + 1000000000UL;
+ 80055b2: 683b ldr r3, [r7, #0]
+ 80055b4: 6859 ldr r1, [r3, #4]
+ 80055b6: 68fa ldr r2, [r7, #12]
+ 80055b8: 4b0f ldr r3, [pc, #60] ; (80055f8 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE6setNowERNS_4TimeE+0x74>)
+ 80055ba: fba3 0302 umull r0, r3, r3, r2
+ 80055be: 099b lsrs r3, r3, #6
+ 80055c0: f44f 707a mov.w r0, #1000 ; 0x3e8
+ 80055c4: fb00 f303 mul.w r3, r0, r3
+ 80055c8: 1ad3 subs r3, r2, r3
+ 80055ca: 4a0c ldr r2, [pc, #48] ; (80055fc <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE6setNowERNS_4TimeE+0x78>)
+ 80055cc: fb02 f303 mul.w r3, r2, r3
+ 80055d0: 1aca subs r2, r1, r3
+ 80055d2: 4b0b ldr r3, [pc, #44] ; (8005600 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE6setNowERNS_4TimeE+0x7c>)
+ 80055d4: 4413 add r3, r2
+ 80055d6: 687a ldr r2, [r7, #4]
+ 80055d8: f8c2 31a0 str.w r3, [r2, #416] ; 0x1a0
+ normalizeSecNSec(sec_offset, nsec_offset);
+ 80055dc: 687b ldr r3, [r7, #4]
+ 80055de: f503 72ce add.w r2, r3, #412 ; 0x19c
+ 80055e2: 687b ldr r3, [r7, #4]
+ 80055e4: f503 73d0 add.w r3, r3, #416 ; 0x1a0
+ 80055e8: 4619 mov r1, r3
+ 80055ea: 4610 mov r0, r2
+ 80055ec: f000 f842 bl 8005674 <_ZN3ros16normalizeSecNSecERmS0_>
+ }
+ 80055f0: bf00 nop
+ 80055f2: 3710 adds r7, #16
+ 80055f4: 46bd mov sp, r7
+ 80055f6: bd80 pop {r7, pc}
+ 80055f8: 10624dd3 .word 0x10624dd3
+ 80055fc: 000f4240 .word 0x000f4240
+ 8005600: 3b9aca00 .word 0x3b9aca00
+
+08005604 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8logerrorEPKc>:
+ }
+ void logwarn(const char *msg)
+ {
+ log(rosserial_msgs::Log::WARN, msg);
+ }
+ void logerror(const char*msg)
+ 8005604: b580 push {r7, lr}
+ 8005606: b082 sub sp, #8
+ 8005608: af00 add r7, sp, #0
+ 800560a: 6078 str r0, [r7, #4]
+ 800560c: 6039 str r1, [r7, #0]
+ {
+ log(rosserial_msgs::Log::ERROR, msg);
+ 800560e: 683a ldr r2, [r7, #0]
+ 8005610: 2103 movs r1, #3
+ 8005612: 6878 ldr r0, [r7, #4]
+ 8005614: f000 f804 bl 8005620 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE3logEcPKc>
+ }
+ 8005618: bf00 nop
+ 800561a: 3708 adds r7, #8
+ 800561c: 46bd mov sp, r7
+ 800561e: bd80 pop {r7, pc}
+
+08005620 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE3logEcPKc>:
+ void log(char byte, const char * msg)
+ 8005620: b580 push {r7, lr}
+ 8005622: b088 sub sp, #32
+ 8005624: af00 add r7, sp, #0
+ 8005626: 60f8 str r0, [r7, #12]
+ 8005628: 460b mov r3, r1
+ 800562a: 607a str r2, [r7, #4]
+ 800562c: 72fb strb r3, [r7, #11]
+ rosserial_msgs::Log l;
+ 800562e: f107 0314 add.w r3, r7, #20
+ 8005632: 4618 mov r0, r3
+ 8005634: f7fe fc4a bl 8003ecc <_ZN14rosserial_msgs3LogC1Ev>
+ l.level = byte;
+ 8005638: 7afb ldrb r3, [r7, #11]
+ 800563a: 763b strb r3, [r7, #24]
+ l.msg = (char*)msg;
+ 800563c: 687b ldr r3, [r7, #4]
+ 800563e: 61fb str r3, [r7, #28]
+ publish(rosserial_msgs::TopicInfo::ID_LOG, &l);
+ 8005640: 68fb ldr r3, [r7, #12]
+ 8005642: 681b ldr r3, [r3, #0]
+ 8005644: 681b ldr r3, [r3, #0]
+ 8005646: f107 0214 add.w r2, r7, #20
+ 800564a: 2107 movs r1, #7
+ 800564c: 68f8 ldr r0, [r7, #12]
+ 800564e: 4798 blx r3
+ }
+ 8005650: bf00 nop
+ 8005652: 3720 adds r7, #32
+ 8005654: 46bd mov sp, r7
+ 8005656: bd80 pop {r7, pc}
+
+08005658 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE9connectedEv>:
+ virtual bool connected()
+ 8005658: b480 push {r7}
+ 800565a: b083 sub sp, #12
+ 800565c: af00 add r7, sp, #0
+ 800565e: 6078 str r0, [r7, #4]
+ return configured_;
+ 8005660: 687b ldr r3, [r7, #4]
+ 8005662: f893 3684 ldrb.w r3, [r3, #1668] ; 0x684
+ };
+ 8005666: 4618 mov r0, r3
+ 8005668: 370c adds r7, #12
+ 800566a: 46bd mov sp, r7
+ 800566c: f85d 7b04 ldr.w r7, [sp], #4
+ 8005670: 4770 bx lr
+ ...
+
+08005674 <_ZN3ros16normalizeSecNSecERmS0_>:
+#include "ros/ros_time.h"
+
+namespace ros
+{
+void normalizeSecNSec(uint32_t& sec, uint32_t& nsec)
+{
+ 8005674: b480 push {r7}
+ 8005676: b085 sub sp, #20
+ 8005678: af00 add r7, sp, #0
+ 800567a: 6078 str r0, [r7, #4]
+ 800567c: 6039 str r1, [r7, #0]
+ uint32_t nsec_part = nsec % 1000000000UL;
+ 800567e: 683b ldr r3, [r7, #0]
+ 8005680: 681b ldr r3, [r3, #0]
+ 8005682: 0a5a lsrs r2, r3, #9
+ 8005684: 490f ldr r1, [pc, #60] ; (80056c4 <_ZN3ros16normalizeSecNSecERmS0_+0x50>)
+ 8005686: fba1 1202 umull r1, r2, r1, r2
+ 800568a: 09d2 lsrs r2, r2, #7
+ 800568c: 490e ldr r1, [pc, #56] ; (80056c8 <_ZN3ros16normalizeSecNSecERmS0_+0x54>)
+ 800568e: fb01 f202 mul.w r2, r1, r2
+ 8005692: 1a9b subs r3, r3, r2
+ 8005694: 60fb str r3, [r7, #12]
+ uint32_t sec_part = nsec / 1000000000UL;
+ 8005696: 683b ldr r3, [r7, #0]
+ 8005698: 681b ldr r3, [r3, #0]
+ 800569a: 0a5b lsrs r3, r3, #9
+ 800569c: 4a09 ldr r2, [pc, #36] ; (80056c4 <_ZN3ros16normalizeSecNSecERmS0_+0x50>)
+ 800569e: fba2 2303 umull r2, r3, r2, r3
+ 80056a2: 09db lsrs r3, r3, #7
+ 80056a4: 60bb str r3, [r7, #8]
+ sec += sec_part;
+ 80056a6: 687b ldr r3, [r7, #4]
+ 80056a8: 681a ldr r2, [r3, #0]
+ 80056aa: 68bb ldr r3, [r7, #8]
+ 80056ac: 441a add r2, r3
+ 80056ae: 687b ldr r3, [r7, #4]
+ 80056b0: 601a str r2, [r3, #0]
+ nsec = nsec_part;
+ 80056b2: 683b ldr r3, [r7, #0]
+ 80056b4: 68fa ldr r2, [r7, #12]
+ 80056b6: 601a str r2, [r3, #0]
+}
+ 80056b8: bf00 nop
+ 80056ba: 3714 adds r7, #20
+ 80056bc: 46bd mov sp, r7
+ 80056be: f85d 7b04 ldr.w r7, [sp], #4
+ 80056c2: 4770 bx lr
+ 80056c4: 00044b83 .word 0x00044b83
+ 80056c8: 3b9aca00 .word 0x3b9aca00
+
+080056cc <HAL_MspInit>:
+/* USER CODE END 0 */
+/**
+ * Initializes the Global MSP.
+ */
+void HAL_MspInit(void)
+{
+ 80056cc: b480 push {r7}
+ 80056ce: b083 sub sp, #12
+ 80056d0: af00 add r7, sp, #0
+ /* USER CODE BEGIN MspInit 0 */
+
+ /* USER CODE END MspInit 0 */
+
+ __HAL_RCC_PWR_CLK_ENABLE();
+ 80056d2: 4b0f ldr r3, [pc, #60] ; (8005710 <HAL_MspInit+0x44>)
+ 80056d4: 6c1b ldr r3, [r3, #64] ; 0x40
+ 80056d6: 4a0e ldr r2, [pc, #56] ; (8005710 <HAL_MspInit+0x44>)
+ 80056d8: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
+ 80056dc: 6413 str r3, [r2, #64] ; 0x40
+ 80056de: 4b0c ldr r3, [pc, #48] ; (8005710 <HAL_MspInit+0x44>)
+ 80056e0: 6c1b ldr r3, [r3, #64] ; 0x40
+ 80056e2: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
+ 80056e6: 607b str r3, [r7, #4]
+ 80056e8: 687b ldr r3, [r7, #4]
+ __HAL_RCC_SYSCFG_CLK_ENABLE();
+ 80056ea: 4b09 ldr r3, [pc, #36] ; (8005710 <HAL_MspInit+0x44>)
+ 80056ec: 6c5b ldr r3, [r3, #68] ; 0x44
+ 80056ee: 4a08 ldr r2, [pc, #32] ; (8005710 <HAL_MspInit+0x44>)
+ 80056f0: f443 4380 orr.w r3, r3, #16384 ; 0x4000
+ 80056f4: 6453 str r3, [r2, #68] ; 0x44
+ 80056f6: 4b06 ldr r3, [pc, #24] ; (8005710 <HAL_MspInit+0x44>)
+ 80056f8: 6c5b ldr r3, [r3, #68] ; 0x44
+ 80056fa: f403 4380 and.w r3, r3, #16384 ; 0x4000
+ 80056fe: 603b str r3, [r7, #0]
+ 8005700: 683b ldr r3, [r7, #0]
+ /* System interrupt init*/
+
+ /* USER CODE BEGIN MspInit 1 */
+
+ /* USER CODE END MspInit 1 */
+}
+ 8005702: bf00 nop
+ 8005704: 370c adds r7, #12
+ 8005706: 46bd mov sp, r7
+ 8005708: f85d 7b04 ldr.w r7, [sp], #4
+ 800570c: 4770 bx lr
+ 800570e: bf00 nop
+ 8005710: 40023800 .word 0x40023800
+
+08005714 <HAL_TIM_Base_MspInit>:
+* This function configures the hardware resources used in this example
+* @param htim_base: TIM_Base handle pointer
+* @retval None
+*/
+void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
+{
+ 8005714: b480 push {r7}
+ 8005716: b085 sub sp, #20
+ 8005718: af00 add r7, sp, #0
+ 800571a: 6078 str r0, [r7, #4]
+ if(htim_base->Instance==TIM2)
+ 800571c: 687b ldr r3, [r7, #4]
+ 800571e: 681b ldr r3, [r3, #0]
+ 8005720: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000
+ 8005724: d10b bne.n 800573e <HAL_TIM_Base_MspInit+0x2a>
+ {
+ /* USER CODE BEGIN TIM2_MspInit 0 */
+
+ /* USER CODE END TIM2_MspInit 0 */
+ /* Peripheral clock enable */
+ __HAL_RCC_TIM2_CLK_ENABLE();
+ 8005726: 4b09 ldr r3, [pc, #36] ; (800574c <HAL_TIM_Base_MspInit+0x38>)
+ 8005728: 6c1b ldr r3, [r3, #64] ; 0x40
+ 800572a: 4a08 ldr r2, [pc, #32] ; (800574c <HAL_TIM_Base_MspInit+0x38>)
+ 800572c: f043 0301 orr.w r3, r3, #1
+ 8005730: 6413 str r3, [r2, #64] ; 0x40
+ 8005732: 4b06 ldr r3, [pc, #24] ; (800574c <HAL_TIM_Base_MspInit+0x38>)
+ 8005734: 6c1b ldr r3, [r3, #64] ; 0x40
+ 8005736: f003 0301 and.w r3, r3, #1
+ 800573a: 60fb str r3, [r7, #12]
+ 800573c: 68fb ldr r3, [r7, #12]
+ /* USER CODE BEGIN TIM2_MspInit 1 */
+
+ /* USER CODE END TIM2_MspInit 1 */
+ }
+
+}
+ 800573e: bf00 nop
+ 8005740: 3714 adds r7, #20
+ 8005742: 46bd mov sp, r7
+ 8005744: f85d 7b04 ldr.w r7, [sp], #4
+ 8005748: 4770 bx lr
+ 800574a: bf00 nop
+ 800574c: 40023800 .word 0x40023800
+
+08005750 <HAL_UART_MspInit>:
+* This function configures the hardware resources used in this example
+* @param huart: UART handle pointer
+* @retval None
+*/
+void HAL_UART_MspInit(UART_HandleTypeDef* huart)
+{
+ 8005750: b580 push {r7, lr}
+ 8005752: b08a sub sp, #40 ; 0x28
+ 8005754: af00 add r7, sp, #0
+ 8005756: 6078 str r0, [r7, #4]
+ GPIO_InitTypeDef GPIO_InitStruct = {0};
+ 8005758: f107 0314 add.w r3, r7, #20
+ 800575c: 2200 movs r2, #0
+ 800575e: 601a str r2, [r3, #0]
+ 8005760: 605a str r2, [r3, #4]
+ 8005762: 609a str r2, [r3, #8]
+ 8005764: 60da str r2, [r3, #12]
+ 8005766: 611a str r2, [r3, #16]
+ if(huart->Instance==USART3)
+ 8005768: 687b ldr r3, [r7, #4]
+ 800576a: 681b ldr r3, [r3, #0]
+ 800576c: 4a4a ldr r2, [pc, #296] ; (8005898 <HAL_UART_MspInit+0x148>)
+ 800576e: 4293 cmp r3, r2
+ 8005770: f040 808d bne.w 800588e <HAL_UART_MspInit+0x13e>
+ {
+ /* USER CODE BEGIN USART3_MspInit 0 */
+
+ /* USER CODE END USART3_MspInit 0 */
+ /* Peripheral clock enable */
+ __HAL_RCC_USART3_CLK_ENABLE();
+ 8005774: 4b49 ldr r3, [pc, #292] ; (800589c <HAL_UART_MspInit+0x14c>)
+ 8005776: 6c1b ldr r3, [r3, #64] ; 0x40
+ 8005778: 4a48 ldr r2, [pc, #288] ; (800589c <HAL_UART_MspInit+0x14c>)
+ 800577a: f443 2380 orr.w r3, r3, #262144 ; 0x40000
+ 800577e: 6413 str r3, [r2, #64] ; 0x40
+ 8005780: 4b46 ldr r3, [pc, #280] ; (800589c <HAL_UART_MspInit+0x14c>)
+ 8005782: 6c1b ldr r3, [r3, #64] ; 0x40
+ 8005784: f403 2380 and.w r3, r3, #262144 ; 0x40000
+ 8005788: 613b str r3, [r7, #16]
+ 800578a: 693b ldr r3, [r7, #16]
+
+ __HAL_RCC_GPIOD_CLK_ENABLE();
+ 800578c: 4b43 ldr r3, [pc, #268] ; (800589c <HAL_UART_MspInit+0x14c>)
+ 800578e: 6b1b ldr r3, [r3, #48] ; 0x30
+ 8005790: 4a42 ldr r2, [pc, #264] ; (800589c <HAL_UART_MspInit+0x14c>)
+ 8005792: f043 0308 orr.w r3, r3, #8
+ 8005796: 6313 str r3, [r2, #48] ; 0x30
+ 8005798: 4b40 ldr r3, [pc, #256] ; (800589c <HAL_UART_MspInit+0x14c>)
+ 800579a: 6b1b ldr r3, [r3, #48] ; 0x30
+ 800579c: f003 0308 and.w r3, r3, #8
+ 80057a0: 60fb str r3, [r7, #12]
+ 80057a2: 68fb ldr r3, [r7, #12]
+ /**USART3 GPIO Configuration
+ PD8 ------> USART3_TX
+ PD9 ------> USART3_RX
+ */
+ GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9;
+ 80057a4: f44f 7340 mov.w r3, #768 ; 0x300
+ 80057a8: 617b str r3, [r7, #20]
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 80057aa: 2302 movs r3, #2
+ 80057ac: 61bb str r3, [r7, #24]
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 80057ae: 2300 movs r3, #0
+ 80057b0: 61fb str r3, [r7, #28]
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ 80057b2: 2303 movs r3, #3
+ 80057b4: 623b str r3, [r7, #32]
+ GPIO_InitStruct.Alternate = GPIO_AF7_USART3;
+ 80057b6: 2307 movs r3, #7
+ 80057b8: 627b str r3, [r7, #36] ; 0x24
+ HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+ 80057ba: f107 0314 add.w r3, r7, #20
+ 80057be: 4619 mov r1, r3
+ 80057c0: 4837 ldr r0, [pc, #220] ; (80058a0 <HAL_UART_MspInit+0x150>)
+ 80057c2: f7fb fbeb bl 8000f9c <HAL_GPIO_Init>
+
+ /* USART3 DMA Init */
+ /* USART3_RX Init */
+ hdma_usart3_rx.Instance = DMA1_Stream1;
+ 80057c6: 4b37 ldr r3, [pc, #220] ; (80058a4 <HAL_UART_MspInit+0x154>)
+ 80057c8: 4a37 ldr r2, [pc, #220] ; (80058a8 <HAL_UART_MspInit+0x158>)
+ 80057ca: 601a str r2, [r3, #0]
+ hdma_usart3_rx.Init.Channel = DMA_CHANNEL_4;
+ 80057cc: 4b35 ldr r3, [pc, #212] ; (80058a4 <HAL_UART_MspInit+0x154>)
+ 80057ce: f04f 6200 mov.w r2, #134217728 ; 0x8000000
+ 80057d2: 605a str r2, [r3, #4]
+ hdma_usart3_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
+ 80057d4: 4b33 ldr r3, [pc, #204] ; (80058a4 <HAL_UART_MspInit+0x154>)
+ 80057d6: 2200 movs r2, #0
+ 80057d8: 609a str r2, [r3, #8]
+ hdma_usart3_rx.Init.PeriphInc = DMA_PINC_DISABLE;
+ 80057da: 4b32 ldr r3, [pc, #200] ; (80058a4 <HAL_UART_MspInit+0x154>)
+ 80057dc: 2200 movs r2, #0
+ 80057de: 60da str r2, [r3, #12]
+ hdma_usart3_rx.Init.MemInc = DMA_MINC_ENABLE;
+ 80057e0: 4b30 ldr r3, [pc, #192] ; (80058a4 <HAL_UART_MspInit+0x154>)
+ 80057e2: f44f 6280 mov.w r2, #1024 ; 0x400
+ 80057e6: 611a str r2, [r3, #16]
+ hdma_usart3_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
+ 80057e8: 4b2e ldr r3, [pc, #184] ; (80058a4 <HAL_UART_MspInit+0x154>)
+ 80057ea: 2200 movs r2, #0
+ 80057ec: 615a str r2, [r3, #20]
+ hdma_usart3_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
+ 80057ee: 4b2d ldr r3, [pc, #180] ; (80058a4 <HAL_UART_MspInit+0x154>)
+ 80057f0: 2200 movs r2, #0
+ 80057f2: 619a str r2, [r3, #24]
+ hdma_usart3_rx.Init.Mode = DMA_NORMAL;
+ 80057f4: 4b2b ldr r3, [pc, #172] ; (80058a4 <HAL_UART_MspInit+0x154>)
+ 80057f6: 2200 movs r2, #0
+ 80057f8: 61da str r2, [r3, #28]
+ hdma_usart3_rx.Init.Priority = DMA_PRIORITY_LOW;
+ 80057fa: 4b2a ldr r3, [pc, #168] ; (80058a4 <HAL_UART_MspInit+0x154>)
+ 80057fc: 2200 movs r2, #0
+ 80057fe: 621a str r2, [r3, #32]
+ hdma_usart3_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
+ 8005800: 4b28 ldr r3, [pc, #160] ; (80058a4 <HAL_UART_MspInit+0x154>)
+ 8005802: 2200 movs r2, #0
+ 8005804: 625a str r2, [r3, #36] ; 0x24
+ if (HAL_DMA_Init(&hdma_usart3_rx) != HAL_OK)
+ 8005806: 4827 ldr r0, [pc, #156] ; (80058a4 <HAL_UART_MspInit+0x154>)
+ 8005808: f7fb f830 bl 800086c <HAL_DMA_Init>
+ 800580c: 4603 mov r3, r0
+ 800580e: 2b00 cmp r3, #0
+ 8005810: d001 beq.n 8005816 <HAL_UART_MspInit+0xc6>
+ {
+ Error_Handler();
+ 8005812: f7ff f9d9 bl 8004bc8 <Error_Handler>
+ }
+
+ __HAL_LINKDMA(huart,hdmarx,hdma_usart3_rx);
+ 8005816: 687b ldr r3, [r7, #4]
+ 8005818: 4a22 ldr r2, [pc, #136] ; (80058a4 <HAL_UART_MspInit+0x154>)
+ 800581a: 66da str r2, [r3, #108] ; 0x6c
+ 800581c: 4a21 ldr r2, [pc, #132] ; (80058a4 <HAL_UART_MspInit+0x154>)
+ 800581e: 687b ldr r3, [r7, #4]
+ 8005820: 6393 str r3, [r2, #56] ; 0x38
+
+ /* USART3_TX Init */
+ hdma_usart3_tx.Instance = DMA1_Stream3;
+ 8005822: 4b22 ldr r3, [pc, #136] ; (80058ac <HAL_UART_MspInit+0x15c>)
+ 8005824: 4a22 ldr r2, [pc, #136] ; (80058b0 <HAL_UART_MspInit+0x160>)
+ 8005826: 601a str r2, [r3, #0]
+ hdma_usart3_tx.Init.Channel = DMA_CHANNEL_4;
+ 8005828: 4b20 ldr r3, [pc, #128] ; (80058ac <HAL_UART_MspInit+0x15c>)
+ 800582a: f04f 6200 mov.w r2, #134217728 ; 0x8000000
+ 800582e: 605a str r2, [r3, #4]
+ hdma_usart3_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
+ 8005830: 4b1e ldr r3, [pc, #120] ; (80058ac <HAL_UART_MspInit+0x15c>)
+ 8005832: 2240 movs r2, #64 ; 0x40
+ 8005834: 609a str r2, [r3, #8]
+ hdma_usart3_tx.Init.PeriphInc = DMA_PINC_DISABLE;
+ 8005836: 4b1d ldr r3, [pc, #116] ; (80058ac <HAL_UART_MspInit+0x15c>)
+ 8005838: 2200 movs r2, #0
+ 800583a: 60da str r2, [r3, #12]
+ hdma_usart3_tx.Init.MemInc = DMA_MINC_ENABLE;
+ 800583c: 4b1b ldr r3, [pc, #108] ; (80058ac <HAL_UART_MspInit+0x15c>)
+ 800583e: f44f 6280 mov.w r2, #1024 ; 0x400
+ 8005842: 611a str r2, [r3, #16]
+ hdma_usart3_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
+ 8005844: 4b19 ldr r3, [pc, #100] ; (80058ac <HAL_UART_MspInit+0x15c>)
+ 8005846: 2200 movs r2, #0
+ 8005848: 615a str r2, [r3, #20]
+ hdma_usart3_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
+ 800584a: 4b18 ldr r3, [pc, #96] ; (80058ac <HAL_UART_MspInit+0x15c>)
+ 800584c: 2200 movs r2, #0
+ 800584e: 619a str r2, [r3, #24]
+ hdma_usart3_tx.Init.Mode = DMA_NORMAL;
+ 8005850: 4b16 ldr r3, [pc, #88] ; (80058ac <HAL_UART_MspInit+0x15c>)
+ 8005852: 2200 movs r2, #0
+ 8005854: 61da str r2, [r3, #28]
+ hdma_usart3_tx.Init.Priority = DMA_PRIORITY_LOW;
+ 8005856: 4b15 ldr r3, [pc, #84] ; (80058ac <HAL_UART_MspInit+0x15c>)
+ 8005858: 2200 movs r2, #0
+ 800585a: 621a str r2, [r3, #32]
+ hdma_usart3_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
+ 800585c: 4b13 ldr r3, [pc, #76] ; (80058ac <HAL_UART_MspInit+0x15c>)
+ 800585e: 2200 movs r2, #0
+ 8005860: 625a str r2, [r3, #36] ; 0x24
+ if (HAL_DMA_Init(&hdma_usart3_tx) != HAL_OK)
+ 8005862: 4812 ldr r0, [pc, #72] ; (80058ac <HAL_UART_MspInit+0x15c>)
+ 8005864: f7fb f802 bl 800086c <HAL_DMA_Init>
+ 8005868: 4603 mov r3, r0
+ 800586a: 2b00 cmp r3, #0
+ 800586c: d001 beq.n 8005872 <HAL_UART_MspInit+0x122>
+ {
+ Error_Handler();
+ 800586e: f7ff f9ab bl 8004bc8 <Error_Handler>
+ }
+
+ __HAL_LINKDMA(huart,hdmatx,hdma_usart3_tx);
+ 8005872: 687b ldr r3, [r7, #4]
+ 8005874: 4a0d ldr r2, [pc, #52] ; (80058ac <HAL_UART_MspInit+0x15c>)
+ 8005876: 669a str r2, [r3, #104] ; 0x68
+ 8005878: 4a0c ldr r2, [pc, #48] ; (80058ac <HAL_UART_MspInit+0x15c>)
+ 800587a: 687b ldr r3, [r7, #4]
+ 800587c: 6393 str r3, [r2, #56] ; 0x38
+
+ /* USART3 interrupt Init */
+ HAL_NVIC_SetPriority(USART3_IRQn, 0, 0);
+ 800587e: 2200 movs r2, #0
+ 8005880: 2100 movs r1, #0
+ 8005882: 2027 movs r0, #39 ; 0x27
+ 8005884: f7fa ffbb bl 80007fe <HAL_NVIC_SetPriority>
+ HAL_NVIC_EnableIRQ(USART3_IRQn);
+ 8005888: 2027 movs r0, #39 ; 0x27
+ 800588a: f7fa ffd4 bl 8000836 <HAL_NVIC_EnableIRQ>
+ /* USER CODE BEGIN USART3_MspInit 1 */
+
+ /* USER CODE END USART3_MspInit 1 */
+ }
+
+}
+ 800588e: bf00 nop
+ 8005890: 3728 adds r7, #40 ; 0x28
+ 8005892: 46bd mov sp, r7
+ 8005894: bd80 pop {r7, pc}
+ 8005896: bf00 nop
+ 8005898: 40004800 .word 0x40004800
+ 800589c: 40023800 .word 0x40023800
+ 80058a0: 40020c00 .word 0x40020c00
+ 80058a4: 20000154 .word 0x20000154
+ 80058a8: 40026028 .word 0x40026028
+ 80058ac: 200001b4 .word 0x200001b4
+ 80058b0: 40026058 .word 0x40026058
+
+080058b4 <NMI_Handler>:
+/******************************************************************************/
+/**
+ * @brief This function handles Non maskable interrupt.
+ */
+void NMI_Handler(void)
+{
+ 80058b4: b480 push {r7}
+ 80058b6: af00 add r7, sp, #0
+
+ /* USER CODE END NonMaskableInt_IRQn 0 */
+ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+ /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+ 80058b8: bf00 nop
+ 80058ba: 46bd mov sp, r7
+ 80058bc: f85d 7b04 ldr.w r7, [sp], #4
+ 80058c0: 4770 bx lr
+
+080058c2 <HardFault_Handler>:
+
+/**
+ * @brief This function handles Hard fault interrupt.
+ */
+void HardFault_Handler(void)
+{
+ 80058c2: b480 push {r7}
+ 80058c4: af00 add r7, sp, #0
+ /* USER CODE BEGIN HardFault_IRQn 0 */
+
+ /* USER CODE END HardFault_IRQn 0 */
+ while (1)
+ 80058c6: e7fe b.n 80058c6 <HardFault_Handler+0x4>
+
+080058c8 <MemManage_Handler>:
+
+/**
+ * @brief This function handles Memory management fault.
+ */
+void MemManage_Handler(void)
+{
+ 80058c8: b480 push {r7}
+ 80058ca: af00 add r7, sp, #0
+ /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+ /* USER CODE END MemoryManagement_IRQn 0 */
+ while (1)
+ 80058cc: e7fe b.n 80058cc <MemManage_Handler+0x4>
+
+080058ce <BusFault_Handler>:
+
+/**
+ * @brief This function handles Pre-fetch fault, memory access fault.
+ */
+void BusFault_Handler(void)
+{
+ 80058ce: b480 push {r7}
+ 80058d0: af00 add r7, sp, #0
+ /* USER CODE BEGIN BusFault_IRQn 0 */
+
+ /* USER CODE END BusFault_IRQn 0 */
+ while (1)
+ 80058d2: e7fe b.n 80058d2 <BusFault_Handler+0x4>
+
+080058d4 <UsageFault_Handler>:
+
+/**
+ * @brief This function handles Undefined instruction or illegal state.
+ */
+void UsageFault_Handler(void)
+{
+ 80058d4: b480 push {r7}
+ 80058d6: af00 add r7, sp, #0
+ /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+ /* USER CODE END UsageFault_IRQn 0 */
+ while (1)
+ 80058d8: e7fe b.n 80058d8 <UsageFault_Handler+0x4>
+
+080058da <SVC_Handler>:
+
+/**
+ * @brief This function handles System service call via SWI instruction.
+ */
+void SVC_Handler(void)
+{
+ 80058da: b480 push {r7}
+ 80058dc: af00 add r7, sp, #0
+
+ /* USER CODE END SVCall_IRQn 0 */
+ /* USER CODE BEGIN SVCall_IRQn 1 */
+
+ /* USER CODE END SVCall_IRQn 1 */
+}
+ 80058de: bf00 nop
+ 80058e0: 46bd mov sp, r7
+ 80058e2: f85d 7b04 ldr.w r7, [sp], #4
+ 80058e6: 4770 bx lr
+
+080058e8 <DebugMon_Handler>:
+
+/**
+ * @brief This function handles Debug monitor.
+ */
+void DebugMon_Handler(void)
+{
+ 80058e8: b480 push {r7}
+ 80058ea: af00 add r7, sp, #0
+
+ /* USER CODE END DebugMonitor_IRQn 0 */
+ /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+ /* USER CODE END DebugMonitor_IRQn 1 */
+}
+ 80058ec: bf00 nop
+ 80058ee: 46bd mov sp, r7
+ 80058f0: f85d 7b04 ldr.w r7, [sp], #4
+ 80058f4: 4770 bx lr
+
+080058f6 <PendSV_Handler>:
+
+/**
+ * @brief This function handles Pendable request for system service.
+ */
+void PendSV_Handler(void)
+{
+ 80058f6: b480 push {r7}
+ 80058f8: af00 add r7, sp, #0
+
+ /* USER CODE END PendSV_IRQn 0 */
+ /* USER CODE BEGIN PendSV_IRQn 1 */
+
+ /* USER CODE END PendSV_IRQn 1 */
+}
+ 80058fa: bf00 nop
+ 80058fc: 46bd mov sp, r7
+ 80058fe: f85d 7b04 ldr.w r7, [sp], #4
+ 8005902: 4770 bx lr
+
+08005904 <SysTick_Handler>:
+
+/**
+ * @brief This function handles System tick timer.
+ */
+void SysTick_Handler(void)
+{
+ 8005904: b580 push {r7, lr}
+ 8005906: af00 add r7, sp, #0
+ /* USER CODE BEGIN SysTick_IRQn 0 */
+
+ /* USER CODE END SysTick_IRQn 0 */
+ HAL_IncTick();
+ 8005908: f7fa fe5c bl 80005c4 <HAL_IncTick>
+ /* USER CODE BEGIN SysTick_IRQn 1 */
+
+ /* USER CODE END SysTick_IRQn 1 */
+}
+ 800590c: bf00 nop
+ 800590e: bd80 pop {r7, pc}
+
+08005910 <DMA1_Stream1_IRQHandler>:
+
+/**
+ * @brief This function handles DMA1 stream1 global interrupt.
+ */
+void DMA1_Stream1_IRQHandler(void)
+{
+ 8005910: b580 push {r7, lr}
+ 8005912: af00 add r7, sp, #0
+ /* USER CODE BEGIN DMA1_Stream1_IRQn 0 */
+
+ /* USER CODE END DMA1_Stream1_IRQn 0 */
+ HAL_DMA_IRQHandler(&hdma_usart3_rx);
+ 8005914: 4802 ldr r0, [pc, #8] ; (8005920 <DMA1_Stream1_IRQHandler+0x10>)
+ 8005916: f7fb f8d9 bl 8000acc <HAL_DMA_IRQHandler>
+ /* USER CODE BEGIN DMA1_Stream1_IRQn 1 */
+
+ /* USER CODE END DMA1_Stream1_IRQn 1 */
+}
+ 800591a: bf00 nop
+ 800591c: bd80 pop {r7, pc}
+ 800591e: bf00 nop
+ 8005920: 20000154 .word 0x20000154
+
+08005924 <DMA1_Stream3_IRQHandler>:
+
+/**
+ * @brief This function handles DMA1 stream3 global interrupt.
+ */
+void DMA1_Stream3_IRQHandler(void)
+{
+ 8005924: b580 push {r7, lr}
+ 8005926: af00 add r7, sp, #0
+ /* USER CODE BEGIN DMA1_Stream3_IRQn 0 */
+
+ /* USER CODE END DMA1_Stream3_IRQn 0 */
+ HAL_DMA_IRQHandler(&hdma_usart3_tx);
+ 8005928: 4802 ldr r0, [pc, #8] ; (8005934 <DMA1_Stream3_IRQHandler+0x10>)
+ 800592a: f7fb f8cf bl 8000acc <HAL_DMA_IRQHandler>
+ /* USER CODE BEGIN DMA1_Stream3_IRQn 1 */
+
+ /* USER CODE END DMA1_Stream3_IRQn 1 */
+}
+ 800592e: bf00 nop
+ 8005930: bd80 pop {r7, pc}
+ 8005932: bf00 nop
+ 8005934: 200001b4 .word 0x200001b4
+
+08005938 <USART3_IRQHandler>:
+
+/**
+ * @brief This function handles USART3 global interrupt.
+ */
+void USART3_IRQHandler(void)
+{
+ 8005938: b580 push {r7, lr}
+ 800593a: af00 add r7, sp, #0
+ /* USER CODE BEGIN USART3_IRQn 0 */
+
+ /* USER CODE END USART3_IRQn 0 */
+ HAL_UART_IRQHandler(&huart3);
+ 800593c: 4802 ldr r0, [pc, #8] ; (8005948 <USART3_IRQHandler+0x10>)
+ 800593e: f7fd f931 bl 8002ba4 <HAL_UART_IRQHandler>
+ /* USER CODE BEGIN USART3_IRQn 1 */
+
+ /* USER CODE END USART3_IRQn 1 */
+}
+ 8005942: bf00 nop
+ 8005944: bd80 pop {r7, pc}
+ 8005946: bf00 nop
+ 8005948: 200000d4 .word 0x200000d4
+
+0800594c <_getpid>:
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+ 800594c: b480 push {r7}
+ 800594e: af00 add r7, sp, #0
+ return 1;
+ 8005950: 2301 movs r3, #1
+}
+ 8005952: 4618 mov r0, r3
+ 8005954: 46bd mov sp, r7
+ 8005956: f85d 7b04 ldr.w r7, [sp], #4
+ 800595a: 4770 bx lr
+
+0800595c <_kill>:
+
+int _kill(int pid, int sig)
+{
+ 800595c: b580 push {r7, lr}
+ 800595e: b082 sub sp, #8
+ 8005960: af00 add r7, sp, #0
+ 8005962: 6078 str r0, [r7, #4]
+ 8005964: 6039 str r1, [r7, #0]
+ errno = EINVAL;
+ 8005966: f000 f8b9 bl 8005adc <__errno>
+ 800596a: 4602 mov r2, r0
+ 800596c: 2316 movs r3, #22
+ 800596e: 6013 str r3, [r2, #0]
+ return -1;
+ 8005970: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff
+}
+ 8005974: 4618 mov r0, r3
+ 8005976: 3708 adds r7, #8
+ 8005978: 46bd mov sp, r7
+ 800597a: bd80 pop {r7, pc}
+
+0800597c <_exit>:
+
+void _exit (int status)
+{
+ 800597c: b580 push {r7, lr}
+ 800597e: b082 sub sp, #8
+ 8005980: af00 add r7, sp, #0
+ 8005982: 6078 str r0, [r7, #4]
+ _kill(status, -1);
+ 8005984: f04f 31ff mov.w r1, #4294967295 ; 0xffffffff
+ 8005988: 6878 ldr r0, [r7, #4]
+ 800598a: f7ff ffe7 bl 800595c <_kill>
+ while (1) {} /* Make sure we hang here */
+ 800598e: e7fe b.n 800598e <_exit+0x12>
+
+08005990 <_sbrk>:
+/**
+ _sbrk
+ Increase program data space. Malloc and related functions depend on this
+**/
+caddr_t _sbrk(int incr)
+{
+ 8005990: b580 push {r7, lr}
+ 8005992: b084 sub sp, #16
+ 8005994: af00 add r7, sp, #0
+ 8005996: 6078 str r0, [r7, #4]
+ extern char end asm("end");
+ static char *heap_end;
+ char *prev_heap_end;
+
+ if (heap_end == 0)
+ 8005998: 4b11 ldr r3, [pc, #68] ; (80059e0 <_sbrk+0x50>)
+ 800599a: 681b ldr r3, [r3, #0]
+ 800599c: 2b00 cmp r3, #0
+ 800599e: d102 bne.n 80059a6 <_sbrk+0x16>
+ heap_end = &end;
+ 80059a0: 4b0f ldr r3, [pc, #60] ; (80059e0 <_sbrk+0x50>)
+ 80059a2: 4a10 ldr r2, [pc, #64] ; (80059e4 <_sbrk+0x54>)
+ 80059a4: 601a str r2, [r3, #0]
+
+ prev_heap_end = heap_end;
+ 80059a6: 4b0e ldr r3, [pc, #56] ; (80059e0 <_sbrk+0x50>)
+ 80059a8: 681b ldr r3, [r3, #0]
+ 80059aa: 60fb str r3, [r7, #12]
+ if (heap_end + incr > stack_ptr)
+ 80059ac: 4b0c ldr r3, [pc, #48] ; (80059e0 <_sbrk+0x50>)
+ 80059ae: 681a ldr r2, [r3, #0]
+ 80059b0: 687b ldr r3, [r7, #4]
+ 80059b2: 4413 add r3, r2
+ 80059b4: 466a mov r2, sp
+ 80059b6: 4293 cmp r3, r2
+ 80059b8: d907 bls.n 80059ca <_sbrk+0x3a>
+ {
+ errno = ENOMEM;
+ 80059ba: f000 f88f bl 8005adc <__errno>
+ 80059be: 4602 mov r2, r0
+ 80059c0: 230c movs r3, #12
+ 80059c2: 6013 str r3, [r2, #0]
+ return (caddr_t) -1;
+ 80059c4: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff
+ 80059c8: e006 b.n 80059d8 <_sbrk+0x48>
+ }
+
+ heap_end += incr;
+ 80059ca: 4b05 ldr r3, [pc, #20] ; (80059e0 <_sbrk+0x50>)
+ 80059cc: 681a ldr r2, [r3, #0]
+ 80059ce: 687b ldr r3, [r7, #4]
+ 80059d0: 4413 add r3, r2
+ 80059d2: 4a03 ldr r2, [pc, #12] ; (80059e0 <_sbrk+0x50>)
+ 80059d4: 6013 str r3, [r2, #0]
+
+ return (caddr_t) prev_heap_end;
+ 80059d6: 68fb ldr r3, [r7, #12]
+}
+ 80059d8: 4618 mov r0, r3
+ 80059da: 3710 adds r7, #16
+ 80059dc: 46bd mov sp, r7
+ 80059de: bd80 pop {r7, pc}
+ 80059e0: 20000214 .word 0x20000214
+ 80059e4: 20000228 .word 0x20000228
+
+080059e8 <SystemInit>:
+ * SystemFrequency variable.
+ * @param None
+ * @retval None
+ */
+void SystemInit(void)
+{
+ 80059e8: b480 push {r7}
+ 80059ea: af00 add r7, sp, #0
+ /* FPU settings ------------------------------------------------------------*/
+ #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+ SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
+ 80059ec: 4b15 ldr r3, [pc, #84] ; (8005a44 <SystemInit+0x5c>)
+ 80059ee: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88
+ 80059f2: 4a14 ldr r2, [pc, #80] ; (8005a44 <SystemInit+0x5c>)
+ 80059f4: f443 0370 orr.w r3, r3, #15728640 ; 0xf00000
+ 80059f8: f8c2 3088 str.w r3, [r2, #136] ; 0x88
+ #endif
+ /* Reset the RCC clock configuration to the default reset state ------------*/
+ /* Set HSION bit */
+ RCC->CR |= (uint32_t)0x00000001;
+ 80059fc: 4b12 ldr r3, [pc, #72] ; (8005a48 <SystemInit+0x60>)
+ 80059fe: 681b ldr r3, [r3, #0]
+ 8005a00: 4a11 ldr r2, [pc, #68] ; (8005a48 <SystemInit+0x60>)
+ 8005a02: f043 0301 orr.w r3, r3, #1
+ 8005a06: 6013 str r3, [r2, #0]
+
+ /* Reset CFGR register */
+ RCC->CFGR = 0x00000000;
+ 8005a08: 4b0f ldr r3, [pc, #60] ; (8005a48 <SystemInit+0x60>)
+ 8005a0a: 2200 movs r2, #0
+ 8005a0c: 609a str r2, [r3, #8]
+
+ /* Reset HSEON, CSSON and PLLON bits */
+ RCC->CR &= (uint32_t)0xFEF6FFFF;
+ 8005a0e: 4b0e ldr r3, [pc, #56] ; (8005a48 <SystemInit+0x60>)
+ 8005a10: 681a ldr r2, [r3, #0]
+ 8005a12: 490d ldr r1, [pc, #52] ; (8005a48 <SystemInit+0x60>)
+ 8005a14: 4b0d ldr r3, [pc, #52] ; (8005a4c <SystemInit+0x64>)
+ 8005a16: 4013 ands r3, r2
+ 8005a18: 600b str r3, [r1, #0]
+
+ /* Reset PLLCFGR register */
+ RCC->PLLCFGR = 0x24003010;
+ 8005a1a: 4b0b ldr r3, [pc, #44] ; (8005a48 <SystemInit+0x60>)
+ 8005a1c: 4a0c ldr r2, [pc, #48] ; (8005a50 <SystemInit+0x68>)
+ 8005a1e: 605a str r2, [r3, #4]
+
+ /* Reset HSEBYP bit */
+ RCC->CR &= (uint32_t)0xFFFBFFFF;
+ 8005a20: 4b09 ldr r3, [pc, #36] ; (8005a48 <SystemInit+0x60>)
+ 8005a22: 681b ldr r3, [r3, #0]
+ 8005a24: 4a08 ldr r2, [pc, #32] ; (8005a48 <SystemInit+0x60>)
+ 8005a26: f423 2380 bic.w r3, r3, #262144 ; 0x40000
+ 8005a2a: 6013 str r3, [r2, #0]
+
+ /* Disable all interrupts */
+ RCC->CIR = 0x00000000;
+ 8005a2c: 4b06 ldr r3, [pc, #24] ; (8005a48 <SystemInit+0x60>)
+ 8005a2e: 2200 movs r2, #0
+ 8005a30: 60da str r2, [r3, #12]
+
+ /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+ SCB->VTOR = RAMDTCM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+ SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+ 8005a32: 4b04 ldr r3, [pc, #16] ; (8005a44 <SystemInit+0x5c>)
+ 8005a34: f04f 6200 mov.w r2, #134217728 ; 0x8000000
+ 8005a38: 609a str r2, [r3, #8]
+#endif
+}
+ 8005a3a: bf00 nop
+ 8005a3c: 46bd mov sp, r7
+ 8005a3e: f85d 7b04 ldr.w r7, [sp], #4
+ 8005a42: 4770 bx lr
+ 8005a44: e000ed00 .word 0xe000ed00
+ 8005a48: 40023800 .word 0x40023800
+ 8005a4c: fef6ffff .word 0xfef6ffff
+ 8005a50: 24003010 .word 0x24003010
+
+08005a54 <Reset_Handler>:
+
+ .section .text.Reset_Handler
+ .weak Reset_Handler
+ .type Reset_Handler, %function
+Reset_Handler:
+ ldr sp, =_estack /* set stack pointer */
+ 8005a54: f8df d034 ldr.w sp, [pc, #52] ; 8005a8c <LoopFillZerobss+0x14>
+
+/* Copy the data segment initializers from flash to SRAM */
+ movs r1, #0
+ 8005a58: 2100 movs r1, #0
+ b LoopCopyDataInit
+ 8005a5a: e003 b.n 8005a64 <LoopCopyDataInit>
+
+08005a5c <CopyDataInit>:
+
+CopyDataInit:
+ ldr r3, =_sidata
+ 8005a5c: 4b0c ldr r3, [pc, #48] ; (8005a90 <LoopFillZerobss+0x18>)
+ ldr r3, [r3, r1]
+ 8005a5e: 585b ldr r3, [r3, r1]
+ str r3, [r0, r1]
+ 8005a60: 5043 str r3, [r0, r1]
+ adds r1, r1, #4
+ 8005a62: 3104 adds r1, #4
+
+08005a64 <LoopCopyDataInit>:
+
+LoopCopyDataInit:
+ ldr r0, =_sdata
+ 8005a64: 480b ldr r0, [pc, #44] ; (8005a94 <LoopFillZerobss+0x1c>)
+ ldr r3, =_edata
+ 8005a66: 4b0c ldr r3, [pc, #48] ; (8005a98 <LoopFillZerobss+0x20>)
+ adds r2, r0, r1
+ 8005a68: 1842 adds r2, r0, r1
+ cmp r2, r3
+ 8005a6a: 429a cmp r2, r3
+ bcc CopyDataInit
+ 8005a6c: d3f6 bcc.n 8005a5c <CopyDataInit>
+ ldr r2, =_sbss
+ 8005a6e: 4a0b ldr r2, [pc, #44] ; (8005a9c <LoopFillZerobss+0x24>)
+ b LoopFillZerobss
+ 8005a70: e002 b.n 8005a78 <LoopFillZerobss>
+
+08005a72 <FillZerobss>:
+/* Zero fill the bss segment. */
+FillZerobss:
+ movs r3, #0
+ 8005a72: 2300 movs r3, #0
+ str r3, [r2], #4
+ 8005a74: f842 3b04 str.w r3, [r2], #4
+
+08005a78 <LoopFillZerobss>:
+
+LoopFillZerobss:
+ ldr r3, = _ebss
+ 8005a78: 4b09 ldr r3, [pc, #36] ; (8005aa0 <LoopFillZerobss+0x28>)
+ cmp r2, r3
+ 8005a7a: 429a cmp r2, r3
+ bcc FillZerobss
+ 8005a7c: d3f9 bcc.n 8005a72 <FillZerobss>
+
+/* Call the clock system initialization function.*/
+ bl SystemInit
+ 8005a7e: f7ff ffb3 bl 80059e8 <SystemInit>
+/* Call static constructors */
+ bl __libc_init_array
+ 8005a82: f000 f831 bl 8005ae8 <__libc_init_array>
+/* Call the application's entry point.*/
+ bl main
+ 8005a86: f7fe fef7 bl 8004878 <main>
+ bx lr
+ 8005a8a: 4770 bx lr
+ ldr sp, =_estack /* set stack pointer */
+ 8005a8c: 20080000 .word 0x20080000
+ ldr r3, =_sidata
+ 8005a90: 08006038 .word 0x08006038
+ ldr r0, =_sdata
+ 8005a94: 20000000 .word 0x20000000
+ ldr r3, =_edata
+ 8005a98: 20000074 .word 0x20000074
+ ldr r2, =_sbss
+ 8005a9c: 20000074 .word 0x20000074
+ ldr r3, = _ebss
+ 8005aa0: 20000228 .word 0x20000228
+
+08005aa4 <ADC_IRQHandler>:
+ * @retval None
+*/
+ .section .text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+ b Infinite_Loop
+ 8005aa4: e7fe b.n 8005aa4 <ADC_IRQHandler>
+
+08005aa6 <__cxa_pure_virtual>:
+ 8005aa6: b508 push {r3, lr}
+ 8005aa8: f000 f80c bl 8005ac4 <_ZSt9terminatev>
+
+08005aac <_ZN10__cxxabiv111__terminateEPFvvE>:
+ 8005aac: b508 push {r3, lr}
+ 8005aae: 4780 blx r0
+ 8005ab0: f000 f80d bl 8005ace <abort>
+
+08005ab4 <_ZSt13get_terminatev>:
+ 8005ab4: 4b02 ldr r3, [pc, #8] ; (8005ac0 <_ZSt13get_terminatev+0xc>)
+ 8005ab6: 6818 ldr r0, [r3, #0]
+ 8005ab8: f3bf 8f5b dmb ish
+ 8005abc: 4770 bx lr
+ 8005abe: bf00 nop
+ 8005ac0: 2000000c .word 0x2000000c
+
+08005ac4 <_ZSt9terminatev>:
+ 8005ac4: b508 push {r3, lr}
+ 8005ac6: f7ff fff5 bl 8005ab4 <_ZSt13get_terminatev>
+ 8005aca: f7ff ffef bl 8005aac <_ZN10__cxxabiv111__terminateEPFvvE>
+
+08005ace <abort>:
+ 8005ace: b508 push {r3, lr}
+ 8005ad0: 2006 movs r0, #6
+ 8005ad2: f000 f871 bl 8005bb8 <raise>
+ 8005ad6: 2001 movs r0, #1
+ 8005ad8: f7ff ff50 bl 800597c <_exit>
+
+08005adc <__errno>:
+ 8005adc: 4b01 ldr r3, [pc, #4] ; (8005ae4 <__errno+0x8>)
+ 8005ade: 6818 ldr r0, [r3, #0]
+ 8005ae0: 4770 bx lr
+ 8005ae2: bf00 nop
+ 8005ae4: 20000010 .word 0x20000010
+
+08005ae8 <__libc_init_array>:
+ 8005ae8: b570 push {r4, r5, r6, lr}
+ 8005aea: 4e0d ldr r6, [pc, #52] ; (8005b20 <__libc_init_array+0x38>)
+ 8005aec: 4c0d ldr r4, [pc, #52] ; (8005b24 <__libc_init_array+0x3c>)
+ 8005aee: 1ba4 subs r4, r4, r6
+ 8005af0: 10a4 asrs r4, r4, #2
+ 8005af2: 2500 movs r5, #0
+ 8005af4: 42a5 cmp r5, r4
+ 8005af6: d109 bne.n 8005b0c <__libc_init_array+0x24>
+ 8005af8: 4e0b ldr r6, [pc, #44] ; (8005b28 <__libc_init_array+0x40>)
+ 8005afa: 4c0c ldr r4, [pc, #48] ; (8005b2c <__libc_init_array+0x44>)
+ 8005afc: f000 f960 bl 8005dc0 <_init>
+ 8005b00: 1ba4 subs r4, r4, r6
+ 8005b02: 10a4 asrs r4, r4, #2
+ 8005b04: 2500 movs r5, #0
+ 8005b06: 42a5 cmp r5, r4
+ 8005b08: d105 bne.n 8005b16 <__libc_init_array+0x2e>
+ 8005b0a: bd70 pop {r4, r5, r6, pc}
+ 8005b0c: f856 3025 ldr.w r3, [r6, r5, lsl #2]
+ 8005b10: 4798 blx r3
+ 8005b12: 3501 adds r5, #1
+ 8005b14: e7ee b.n 8005af4 <__libc_init_array+0xc>
+ 8005b16: f856 3025 ldr.w r3, [r6, r5, lsl #2]
+ 8005b1a: 4798 blx r3
+ 8005b1c: 3501 adds r5, #1
+ 8005b1e: e7f2 b.n 8005b06 <__libc_init_array+0x1e>
+ 8005b20: 08006030 .word 0x08006030
+ 8005b24: 08006030 .word 0x08006030
+ 8005b28: 08006030 .word 0x08006030
+ 8005b2c: 08006034 .word 0x08006034
+
+08005b30 <memcpy>:
+ 8005b30: b510 push {r4, lr}
+ 8005b32: 1e43 subs r3, r0, #1
+ 8005b34: 440a add r2, r1
+ 8005b36: 4291 cmp r1, r2
+ 8005b38: d100 bne.n 8005b3c <memcpy+0xc>
+ 8005b3a: bd10 pop {r4, pc}
+ 8005b3c: f811 4b01 ldrb.w r4, [r1], #1
+ 8005b40: f803 4f01 strb.w r4, [r3, #1]!
+ 8005b44: e7f7 b.n 8005b36 <memcpy+0x6>
+
+08005b46 <memset>:
+ 8005b46: 4402 add r2, r0
+ 8005b48: 4603 mov r3, r0
+ 8005b4a: 4293 cmp r3, r2
+ 8005b4c: d100 bne.n 8005b50 <memset+0xa>
+ 8005b4e: 4770 bx lr
+ 8005b50: f803 1b01 strb.w r1, [r3], #1
+ 8005b54: e7f9 b.n 8005b4a <memset+0x4>
+ ...
+
+08005b58 <realloc>:
+ 8005b58: 4b02 ldr r3, [pc, #8] ; (8005b64 <realloc+0xc>)
+ 8005b5a: 460a mov r2, r1
+ 8005b5c: 4601 mov r1, r0
+ 8005b5e: 6818 ldr r0, [r3, #0]
+ 8005b60: f000 b8a0 b.w 8005ca4 <_realloc_r>
+ 8005b64: 20000010 .word 0x20000010
+
+08005b68 <_raise_r>:
+ 8005b68: 291f cmp r1, #31
+ 8005b6a: b538 push {r3, r4, r5, lr}
+ 8005b6c: 4604 mov r4, r0
+ 8005b6e: 460d mov r5, r1
+ 8005b70: d904 bls.n 8005b7c <_raise_r+0x14>
+ 8005b72: 2316 movs r3, #22
+ 8005b74: 6003 str r3, [r0, #0]
+ 8005b76: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
+ 8005b7a: bd38 pop {r3, r4, r5, pc}
+ 8005b7c: 6c42 ldr r2, [r0, #68] ; 0x44
+ 8005b7e: b112 cbz r2, 8005b86 <_raise_r+0x1e>
+ 8005b80: f852 3021 ldr.w r3, [r2, r1, lsl #2]
+ 8005b84: b94b cbnz r3, 8005b9a <_raise_r+0x32>
+ 8005b86: 4620 mov r0, r4
+ 8005b88: f000 f830 bl 8005bec <_getpid_r>
+ 8005b8c: 462a mov r2, r5
+ 8005b8e: 4601 mov r1, r0
+ 8005b90: 4620 mov r0, r4
+ 8005b92: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr}
+ 8005b96: f000 b817 b.w 8005bc8 <_kill_r>
+ 8005b9a: 2b01 cmp r3, #1
+ 8005b9c: d00a beq.n 8005bb4 <_raise_r+0x4c>
+ 8005b9e: 1c59 adds r1, r3, #1
+ 8005ba0: d103 bne.n 8005baa <_raise_r+0x42>
+ 8005ba2: 2316 movs r3, #22
+ 8005ba4: 6003 str r3, [r0, #0]
+ 8005ba6: 2001 movs r0, #1
+ 8005ba8: e7e7 b.n 8005b7a <_raise_r+0x12>
+ 8005baa: 2400 movs r4, #0
+ 8005bac: f842 4025 str.w r4, [r2, r5, lsl #2]
+ 8005bb0: 4628 mov r0, r5
+ 8005bb2: 4798 blx r3
+ 8005bb4: 2000 movs r0, #0
+ 8005bb6: e7e0 b.n 8005b7a <_raise_r+0x12>
+
+08005bb8 <raise>:
+ 8005bb8: 4b02 ldr r3, [pc, #8] ; (8005bc4 <raise+0xc>)
+ 8005bba: 4601 mov r1, r0
+ 8005bbc: 6818 ldr r0, [r3, #0]
+ 8005bbe: f7ff bfd3 b.w 8005b68 <_raise_r>
+ 8005bc2: bf00 nop
+ 8005bc4: 20000010 .word 0x20000010
+
+08005bc8 <_kill_r>:
+ 8005bc8: b538 push {r3, r4, r5, lr}
+ 8005bca: 4c07 ldr r4, [pc, #28] ; (8005be8 <_kill_r+0x20>)
+ 8005bcc: 2300 movs r3, #0
+ 8005bce: 4605 mov r5, r0
+ 8005bd0: 4608 mov r0, r1
+ 8005bd2: 4611 mov r1, r2
+ 8005bd4: 6023 str r3, [r4, #0]
+ 8005bd6: f7ff fec1 bl 800595c <_kill>
+ 8005bda: 1c43 adds r3, r0, #1
+ 8005bdc: d102 bne.n 8005be4 <_kill_r+0x1c>
+ 8005bde: 6823 ldr r3, [r4, #0]
+ 8005be0: b103 cbz r3, 8005be4 <_kill_r+0x1c>
+ 8005be2: 602b str r3, [r5, #0]
+ 8005be4: bd38 pop {r3, r4, r5, pc}
+ 8005be6: bf00 nop
+ 8005be8: 20000224 .word 0x20000224
+
+08005bec <_getpid_r>:
+ 8005bec: f7ff beae b.w 800594c <_getpid>
+
+08005bf0 <_malloc_r>:
+ 8005bf0: b570 push {r4, r5, r6, lr}
+ 8005bf2: 1ccd adds r5, r1, #3
+ 8005bf4: f025 0503 bic.w r5, r5, #3
+ 8005bf8: 3508 adds r5, #8
+ 8005bfa: 2d0c cmp r5, #12
+ 8005bfc: bf38 it cc
+ 8005bfe: 250c movcc r5, #12
+ 8005c00: 2d00 cmp r5, #0
+ 8005c02: 4606 mov r6, r0
+ 8005c04: db01 blt.n 8005c0a <_malloc_r+0x1a>
+ 8005c06: 42a9 cmp r1, r5
+ 8005c08: d903 bls.n 8005c12 <_malloc_r+0x22>
+ 8005c0a: 230c movs r3, #12
+ 8005c0c: 6033 str r3, [r6, #0]
+ 8005c0e: 2000 movs r0, #0
+ 8005c10: bd70 pop {r4, r5, r6, pc}
+ 8005c12: f000 f87d bl 8005d10 <__malloc_lock>
+ 8005c16: 4a21 ldr r2, [pc, #132] ; (8005c9c <_malloc_r+0xac>)
+ 8005c18: 6814 ldr r4, [r2, #0]
+ 8005c1a: 4621 mov r1, r4
+ 8005c1c: b991 cbnz r1, 8005c44 <_malloc_r+0x54>
+ 8005c1e: 4c20 ldr r4, [pc, #128] ; (8005ca0 <_malloc_r+0xb0>)
+ 8005c20: 6823 ldr r3, [r4, #0]
+ 8005c22: b91b cbnz r3, 8005c2c <_malloc_r+0x3c>
+ 8005c24: 4630 mov r0, r6
+ 8005c26: f000 f863 bl 8005cf0 <_sbrk_r>
+ 8005c2a: 6020 str r0, [r4, #0]
+ 8005c2c: 4629 mov r1, r5
+ 8005c2e: 4630 mov r0, r6
+ 8005c30: f000 f85e bl 8005cf0 <_sbrk_r>
+ 8005c34: 1c43 adds r3, r0, #1
+ 8005c36: d124 bne.n 8005c82 <_malloc_r+0x92>
+ 8005c38: 230c movs r3, #12
+ 8005c3a: 6033 str r3, [r6, #0]
+ 8005c3c: 4630 mov r0, r6
+ 8005c3e: f000 f868 bl 8005d12 <__malloc_unlock>
+ 8005c42: e7e4 b.n 8005c0e <_malloc_r+0x1e>
+ 8005c44: 680b ldr r3, [r1, #0]
+ 8005c46: 1b5b subs r3, r3, r5
+ 8005c48: d418 bmi.n 8005c7c <_malloc_r+0x8c>
+ 8005c4a: 2b0b cmp r3, #11
+ 8005c4c: d90f bls.n 8005c6e <_malloc_r+0x7e>
+ 8005c4e: 600b str r3, [r1, #0]
+ 8005c50: 50cd str r5, [r1, r3]
+ 8005c52: 18cc adds r4, r1, r3
+ 8005c54: 4630 mov r0, r6
+ 8005c56: f000 f85c bl 8005d12 <__malloc_unlock>
+ 8005c5a: f104 000b add.w r0, r4, #11
+ 8005c5e: 1d23 adds r3, r4, #4
+ 8005c60: f020 0007 bic.w r0, r0, #7
+ 8005c64: 1ac3 subs r3, r0, r3
+ 8005c66: d0d3 beq.n 8005c10 <_malloc_r+0x20>
+ 8005c68: 425a negs r2, r3
+ 8005c6a: 50e2 str r2, [r4, r3]
+ 8005c6c: e7d0 b.n 8005c10 <_malloc_r+0x20>
+ 8005c6e: 428c cmp r4, r1
+ 8005c70: 684b ldr r3, [r1, #4]
+ 8005c72: bf16 itet ne
+ 8005c74: 6063 strne r3, [r4, #4]
+ 8005c76: 6013 streq r3, [r2, #0]
+ 8005c78: 460c movne r4, r1
+ 8005c7a: e7eb b.n 8005c54 <_malloc_r+0x64>
+ 8005c7c: 460c mov r4, r1
+ 8005c7e: 6849 ldr r1, [r1, #4]
+ 8005c80: e7cc b.n 8005c1c <_malloc_r+0x2c>
+ 8005c82: 1cc4 adds r4, r0, #3
+ 8005c84: f024 0403 bic.w r4, r4, #3
+ 8005c88: 42a0 cmp r0, r4
+ 8005c8a: d005 beq.n 8005c98 <_malloc_r+0xa8>
+ 8005c8c: 1a21 subs r1, r4, r0
+ 8005c8e: 4630 mov r0, r6
+ 8005c90: f000 f82e bl 8005cf0 <_sbrk_r>
+ 8005c94: 3001 adds r0, #1
+ 8005c96: d0cf beq.n 8005c38 <_malloc_r+0x48>
+ 8005c98: 6025 str r5, [r4, #0]
+ 8005c9a: e7db b.n 8005c54 <_malloc_r+0x64>
+ 8005c9c: 20000218 .word 0x20000218
+ 8005ca0: 2000021c .word 0x2000021c
+
+08005ca4 <_realloc_r>:
+ 8005ca4: b5f8 push {r3, r4, r5, r6, r7, lr}
+ 8005ca6: 4607 mov r7, r0
+ 8005ca8: 4614 mov r4, r2
+ 8005caa: 460e mov r6, r1
+ 8005cac: b921 cbnz r1, 8005cb8 <_realloc_r+0x14>
+ 8005cae: 4611 mov r1, r2
+ 8005cb0: e8bd 40f8 ldmia.w sp!, {r3, r4, r5, r6, r7, lr}
+ 8005cb4: f7ff bf9c b.w 8005bf0 <_malloc_r>
+ 8005cb8: b922 cbnz r2, 8005cc4 <_realloc_r+0x20>
+ 8005cba: f000 f82b bl 8005d14 <_free_r>
+ 8005cbe: 4625 mov r5, r4
+ 8005cc0: 4628 mov r0, r5
+ 8005cc2: bdf8 pop {r3, r4, r5, r6, r7, pc}
+ 8005cc4: f000 f874 bl 8005db0 <_malloc_usable_size_r>
+ 8005cc8: 42a0 cmp r0, r4
+ 8005cca: d20f bcs.n 8005cec <_realloc_r+0x48>
+ 8005ccc: 4621 mov r1, r4
+ 8005cce: 4638 mov r0, r7
+ 8005cd0: f7ff ff8e bl 8005bf0 <_malloc_r>
+ 8005cd4: 4605 mov r5, r0
+ 8005cd6: 2800 cmp r0, #0
+ 8005cd8: d0f2 beq.n 8005cc0 <_realloc_r+0x1c>
+ 8005cda: 4631 mov r1, r6
+ 8005cdc: 4622 mov r2, r4
+ 8005cde: f7ff ff27 bl 8005b30 <memcpy>
+ 8005ce2: 4631 mov r1, r6
+ 8005ce4: 4638 mov r0, r7
+ 8005ce6: f000 f815 bl 8005d14 <_free_r>
+ 8005cea: e7e9 b.n 8005cc0 <_realloc_r+0x1c>
+ 8005cec: 4635 mov r5, r6
+ 8005cee: e7e7 b.n 8005cc0 <_realloc_r+0x1c>
+
+08005cf0 <_sbrk_r>:
+ 8005cf0: b538 push {r3, r4, r5, lr}
+ 8005cf2: 4c06 ldr r4, [pc, #24] ; (8005d0c <_sbrk_r+0x1c>)
+ 8005cf4: 2300 movs r3, #0
+ 8005cf6: 4605 mov r5, r0
+ 8005cf8: 4608 mov r0, r1
+ 8005cfa: 6023 str r3, [r4, #0]
+ 8005cfc: f7ff fe48 bl 8005990 <_sbrk>
+ 8005d00: 1c43 adds r3, r0, #1
+ 8005d02: d102 bne.n 8005d0a <_sbrk_r+0x1a>
+ 8005d04: 6823 ldr r3, [r4, #0]
+ 8005d06: b103 cbz r3, 8005d0a <_sbrk_r+0x1a>
+ 8005d08: 602b str r3, [r5, #0]
+ 8005d0a: bd38 pop {r3, r4, r5, pc}
+ 8005d0c: 20000224 .word 0x20000224
+
+08005d10 <__malloc_lock>:
+ 8005d10: 4770 bx lr
+
+08005d12 <__malloc_unlock>:
+ 8005d12: 4770 bx lr
+
+08005d14 <_free_r>:
+ 8005d14: b538 push {r3, r4, r5, lr}
+ 8005d16: 4605 mov r5, r0
+ 8005d18: 2900 cmp r1, #0
+ 8005d1a: d045 beq.n 8005da8 <_free_r+0x94>
+ 8005d1c: f851 3c04 ldr.w r3, [r1, #-4]
+ 8005d20: 1f0c subs r4, r1, #4
+ 8005d22: 2b00 cmp r3, #0
+ 8005d24: bfb8 it lt
+ 8005d26: 18e4 addlt r4, r4, r3
+ 8005d28: f7ff fff2 bl 8005d10 <__malloc_lock>
+ 8005d2c: 4a1f ldr r2, [pc, #124] ; (8005dac <_free_r+0x98>)
+ 8005d2e: 6813 ldr r3, [r2, #0]
+ 8005d30: 4610 mov r0, r2
+ 8005d32: b933 cbnz r3, 8005d42 <_free_r+0x2e>
+ 8005d34: 6063 str r3, [r4, #4]
+ 8005d36: 6014 str r4, [r2, #0]
+ 8005d38: 4628 mov r0, r5
+ 8005d3a: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr}
+ 8005d3e: f7ff bfe8 b.w 8005d12 <__malloc_unlock>
+ 8005d42: 42a3 cmp r3, r4
+ 8005d44: d90c bls.n 8005d60 <_free_r+0x4c>
+ 8005d46: 6821 ldr r1, [r4, #0]
+ 8005d48: 1862 adds r2, r4, r1
+ 8005d4a: 4293 cmp r3, r2
+ 8005d4c: bf04 itt eq
+ 8005d4e: 681a ldreq r2, [r3, #0]
+ 8005d50: 685b ldreq r3, [r3, #4]
+ 8005d52: 6063 str r3, [r4, #4]
+ 8005d54: bf04 itt eq
+ 8005d56: 1852 addeq r2, r2, r1
+ 8005d58: 6022 streq r2, [r4, #0]
+ 8005d5a: 6004 str r4, [r0, #0]
+ 8005d5c: e7ec b.n 8005d38 <_free_r+0x24>
+ 8005d5e: 4613 mov r3, r2
+ 8005d60: 685a ldr r2, [r3, #4]
+ 8005d62: b10a cbz r2, 8005d68 <_free_r+0x54>
+ 8005d64: 42a2 cmp r2, r4
+ 8005d66: d9fa bls.n 8005d5e <_free_r+0x4a>
+ 8005d68: 6819 ldr r1, [r3, #0]
+ 8005d6a: 1858 adds r0, r3, r1
+ 8005d6c: 42a0 cmp r0, r4
+ 8005d6e: d10b bne.n 8005d88 <_free_r+0x74>
+ 8005d70: 6820 ldr r0, [r4, #0]
+ 8005d72: 4401 add r1, r0
+ 8005d74: 1858 adds r0, r3, r1
+ 8005d76: 4282 cmp r2, r0
+ 8005d78: 6019 str r1, [r3, #0]
+ 8005d7a: d1dd bne.n 8005d38 <_free_r+0x24>
+ 8005d7c: 6810 ldr r0, [r2, #0]
+ 8005d7e: 6852 ldr r2, [r2, #4]
+ 8005d80: 605a str r2, [r3, #4]
+ 8005d82: 4401 add r1, r0
+ 8005d84: 6019 str r1, [r3, #0]
+ 8005d86: e7d7 b.n 8005d38 <_free_r+0x24>
+ 8005d88: d902 bls.n 8005d90 <_free_r+0x7c>
+ 8005d8a: 230c movs r3, #12
+ 8005d8c: 602b str r3, [r5, #0]
+ 8005d8e: e7d3 b.n 8005d38 <_free_r+0x24>
+ 8005d90: 6820 ldr r0, [r4, #0]
+ 8005d92: 1821 adds r1, r4, r0
+ 8005d94: 428a cmp r2, r1
+ 8005d96: bf04 itt eq
+ 8005d98: 6811 ldreq r1, [r2, #0]
+ 8005d9a: 6852 ldreq r2, [r2, #4]
+ 8005d9c: 6062 str r2, [r4, #4]
+ 8005d9e: bf04 itt eq
+ 8005da0: 1809 addeq r1, r1, r0
+ 8005da2: 6021 streq r1, [r4, #0]
+ 8005da4: 605c str r4, [r3, #4]
+ 8005da6: e7c7 b.n 8005d38 <_free_r+0x24>
+ 8005da8: bd38 pop {r3, r4, r5, pc}
+ 8005daa: bf00 nop
+ 8005dac: 20000218 .word 0x20000218
+
+08005db0 <_malloc_usable_size_r>:
+ 8005db0: f851 3c04 ldr.w r3, [r1, #-4]
+ 8005db4: 1f18 subs r0, r3, #4
+ 8005db6: 2b00 cmp r3, #0
+ 8005db8: bfbc itt lt
+ 8005dba: 580b ldrlt r3, [r1, r0]
+ 8005dbc: 18c0 addlt r0, r0, r3
+ 8005dbe: 4770 bx lr
+
+08005dc0 <_init>:
+ 8005dc0: b5f8 push {r3, r4, r5, r6, r7, lr}
+ 8005dc2: bf00 nop
+ 8005dc4: bcf8 pop {r3, r4, r5, r6, r7}
+ 8005dc6: bc08 pop {r3}
+ 8005dc8: 469e mov lr, r3
+ 8005dca: 4770 bx lr
+
+08005dcc <_fini>:
+ 8005dcc: b5f8 push {r3, r4, r5, r6, r7, lr}
+ 8005dce: bf00 nop
+ 8005dd0: bcf8 pop {r3, r4, r5, r6, r7}
+ 8005dd2: bc08 pop {r3}
+ 8005dd4: 469e mov lr, r3
+ 8005dd6: 4770 bx lr
+++ /dev/null
-
-rosserial_test.elf: file format elf32-littlearm
-
-Sections:
-Idx Name Size VMA LMA File off Algn
- 0 .isr_vector 000001f8 08000000 08000000 00010000 2**0
- CONTENTS, ALLOC, LOAD, READONLY, DATA
- 1 .text 000117b0 08000200 08000200 00010200 2**4
- CONTENTS, ALLOC, LOAD, READONLY, CODE
- 2 .rodata 000016f0 080119b0 080119b0 000219b0 2**3
- CONTENTS, ALLOC, LOAD, READONLY, DATA
- 3 .ARM.extab 00000100 080130a0 080130a0 000230a0 2**2
- CONTENTS, ALLOC, LOAD, READONLY, DATA
- 4 .ARM 00000188 080131a0 080131a0 000231a0 2**2
- CONTENTS, ALLOC, LOAD, READONLY, DATA
- 5 .preinit_array 00000000 08013328 08013328 000309c0 2**0
- CONTENTS, ALLOC, LOAD, DATA
- 6 .init_array 0000000c 08013328 08013328 00023328 2**2
- CONTENTS, ALLOC, LOAD, DATA
- 7 .fini_array 00000004 08013334 08013334 00023334 2**2
- CONTENTS, ALLOC, LOAD, DATA
- 8 .data 000009c0 20000000 08013338 00030000 2**3
- CONTENTS, ALLOC, LOAD, DATA
- 9 .bss 0000014c 200009c0 08013cf8 000309c0 2**2
- ALLOC
- 10 ._user_heap_stack 00000604 20000b0c 08013cf8 00030b0c 2**0
- ALLOC
- 11 .ARM.attributes 0000002e 00000000 00000000 000309c0 2**0
- CONTENTS, READONLY
- 12 .debug_info 00010b10 00000000 00000000 000309ee 2**0
- CONTENTS, READONLY, DEBUGGING
- 13 .debug_abbrev 0000253c 00000000 00000000 000414fe 2**0
- CONTENTS, READONLY, DEBUGGING
- 14 .debug_aranges 00000d70 00000000 00000000 00043a40 2**3
- CONTENTS, READONLY, DEBUGGING
- 15 .debug_ranges 00000c90 00000000 00000000 000447b0 2**3
- CONTENTS, READONLY, DEBUGGING
- 16 .debug_macro 0002b117 00000000 00000000 00045440 2**0
- CONTENTS, READONLY, DEBUGGING
- 17 .debug_line 0000a042 00000000 00000000 00070557 2**0
- CONTENTS, READONLY, DEBUGGING
- 18 .debug_str 000f9e37 00000000 00000000 0007a599 2**0
- CONTENTS, READONLY, DEBUGGING
- 19 .comment 0000007b 00000000 00000000 001743d0 2**0
- CONTENTS, READONLY
- 20 .debug_frame 00005e00 00000000 00000000 0017444c 2**2
- CONTENTS, READONLY, DEBUGGING
-
-Disassembly of section .text:
-
-08000200 <__do_global_dtors_aux>:
- 8000200: b510 push {r4, lr}
- 8000202: 4c05 ldr r4, [pc, #20] ; (8000218 <__do_global_dtors_aux+0x18>)
- 8000204: 7823 ldrb r3, [r4, #0]
- 8000206: b933 cbnz r3, 8000216 <__do_global_dtors_aux+0x16>
- 8000208: 4b04 ldr r3, [pc, #16] ; (800021c <__do_global_dtors_aux+0x1c>)
- 800020a: b113 cbz r3, 8000212 <__do_global_dtors_aux+0x12>
- 800020c: 4804 ldr r0, [pc, #16] ; (8000220 <__do_global_dtors_aux+0x20>)
- 800020e: f3af 8000 nop.w
- 8000212: 2301 movs r3, #1
- 8000214: 7023 strb r3, [r4, #0]
- 8000216: bd10 pop {r4, pc}
- 8000218: 200009c0 .word 0x200009c0
- 800021c: 00000000 .word 0x00000000
- 8000220: 08011998 .word 0x08011998
-
-08000224 <frame_dummy>:
- 8000224: b508 push {r3, lr}
- 8000226: 4b03 ldr r3, [pc, #12] ; (8000234 <frame_dummy+0x10>)
- 8000228: b11b cbz r3, 8000232 <frame_dummy+0xe>
- 800022a: 4903 ldr r1, [pc, #12] ; (8000238 <frame_dummy+0x14>)
- 800022c: 4803 ldr r0, [pc, #12] ; (800023c <frame_dummy+0x18>)
- 800022e: f3af 8000 nop.w
- 8000232: bd08 pop {r3, pc}
- 8000234: 00000000 .word 0x00000000
- 8000238: 200009c4 .word 0x200009c4
- 800023c: 08011998 .word 0x08011998
-
-08000240 <d_make_comp>:
- 8000240: b4f0 push {r4, r5, r6, r7}
- 8000242: 1e4c subs r4, r1, #1
- 8000244: 4605 mov r5, r0
- 8000246: 2c4e cmp r4, #78 ; 0x4e
- 8000248: d83f bhi.n 80002ca <d_make_comp+0x8a>
- 800024a: e8df f004 tbb [pc, r4]
- 800024e: 3b3b .short 0x3b3b
- 8000250: 3e3e3b3b .word 0x3e3e3b3b
- 8000254: 28283e3e .word 0x28283e3e
- 8000258: 2828283b .word 0x2828283b
- 800025c: 28282828 .word 0x28282828
- 8000260: 28282828 .word 0x28282828
- 8000264: 29293e28 .word 0x29293e28
- 8000268: 29292929 .word 0x29292929
- 800026c: 283b2929 .word 0x283b2929
- 8000270: 28282828 .word 0x28282828
- 8000274: 3c29283e .word 0x3c29283e
- 8000278: 293b3e3b .word 0x293b3e3b
- 800027c: 3e3e3c29 .word 0x3e3e3c29
- 8000280: 3b282828 .word 0x3b282828
- 8000284: 3b3b3b3b .word 0x3b3b3b3b
- 8000288: 283b3b28 .word 0x283b3b28
- 800028c: 283e3e3b .word 0x283e3e3b
- 8000290: 3e3e2828 .word 0x3e3e2828
- 8000294: 2828283e .word 0x2828283e
- 8000298: 293b293b .word 0x293b293b
- 800029c: 29 .byte 0x29
- 800029d: 00 .byte 0x00
- 800029e: b1a2 cbz r2, 80002ca <d_make_comp+0x8a>
- 80002a0: e9d5 4005 ldrd r4, r0, [r5, #20]
- 80002a4: 4284 cmp r4, r0
- 80002a6: da10 bge.n 80002ca <d_make_comp+0x8a>
- 80002a8: 692f ldr r7, [r5, #16]
- 80002aa: 0126 lsls r6, r4, #4
- 80002ac: 19b8 adds r0, r7, r6
- 80002ae: 3401 adds r4, #1
- 80002b0: f04f 0c00 mov.w ip, #0
- 80002b4: f8c0 c004 str.w ip, [r0, #4]
- 80002b8: 616c str r4, [r5, #20]
- 80002ba: 55b9 strb r1, [r7, r6]
- 80002bc: e9c0 2302 strd r2, r3, [r0, #8]
- 80002c0: bcf0 pop {r4, r5, r6, r7}
- 80002c2: 4770 bx lr
- 80002c4: b10a cbz r2, 80002ca <d_make_comp+0x8a>
- 80002c6: 2b00 cmp r3, #0
- 80002c8: d1ea bne.n 80002a0 <d_make_comp+0x60>
- 80002ca: 2000 movs r0, #0
- 80002cc: bcf0 pop {r4, r5, r6, r7}
- 80002ce: 4770 bx lr
-
-080002d0 <d_ref_qualifier>:
- 80002d0: b410 push {r4}
- 80002d2: 68c3 ldr r3, [r0, #12]
- 80002d4: 781c ldrb r4, [r3, #0]
- 80002d6: 2c52 cmp r4, #82 ; 0x52
- 80002d8: 460a mov r2, r1
- 80002da: d00f beq.n 80002fc <d_ref_qualifier+0x2c>
- 80002dc: 2c4f cmp r4, #79 ; 0x4f
- 80002de: d003 beq.n 80002e8 <d_ref_qualifier+0x18>
- 80002e0: 4608 mov r0, r1
- 80002e2: f85d 4b04 ldr.w r4, [sp], #4
- 80002e6: 4770 bx lr
- 80002e8: 6b01 ldr r1, [r0, #48] ; 0x30
- 80002ea: 3103 adds r1, #3
- 80002ec: 6301 str r1, [r0, #48] ; 0x30
- 80002ee: 2120 movs r1, #32
- 80002f0: 3301 adds r3, #1
- 80002f2: 60c3 str r3, [r0, #12]
- 80002f4: f85d 4b04 ldr.w r4, [sp], #4
- 80002f8: 2300 movs r3, #0
- 80002fa: e7a1 b.n 8000240 <d_make_comp>
- 80002fc: 6b01 ldr r1, [r0, #48] ; 0x30
- 80002fe: 3102 adds r1, #2
- 8000300: 6301 str r1, [r0, #48] ; 0x30
- 8000302: 211f movs r1, #31
- 8000304: e7f4 b.n 80002f0 <d_ref_qualifier+0x20>
- 8000306: bf00 nop
-
-08000308 <d_count_templates_scopes>:
- 8000308: 2a00 cmp r2, #0
- 800030a: d04e beq.n 80003aa <d_count_templates_scopes+0xa2>
- 800030c: b570 push {r4, r5, r6, lr}
- 800030e: 4605 mov r5, r0
- 8000310: 460e mov r6, r1
- 8000312: 4614 mov r4, r2
- 8000314: 7823 ldrb r3, [r4, #0]
- 8000316: 3b01 subs r3, #1
- 8000318: 2b4e cmp r3, #78 ; 0x4e
- 800031a: d82c bhi.n 8000376 <d_count_templates_scopes+0x6e>
- 800031c: e8df f003 tbb [pc, r3]
- 8000320: 40373737 .word 0x40373737
- 8000324: 28282b2b .word 0x28282b2b
- 8000328: 37373737 .word 0x37373737
- 800032c: 37373737 .word 0x37373737
- 8000330: 37373737 .word 0x37373737
- 8000334: 2b373737 .word 0x2b373737
- 8000338: 37373737 .word 0x37373737
- 800033c: 37373737 .word 0x37373737
- 8000340: 30303737 .word 0x30303737
- 8000344: 372b3737 .word 0x372b3737
- 8000348: 2c373737 .word 0x2c373737
- 800034c: 37373737 .word 0x37373737
- 8000350: 3737282b .word 0x3737282b
- 8000354: 37373737 .word 0x37373737
- 8000358: 37373737 .word 0x37373737
- 800035c: 2b373737 .word 0x2b373737
- 8000360: 2c2c372b .word 0x2c2c372b
- 8000364: 372b2c2c .word 0x372b2c2c
- 8000368: 37373737 .word 0x37373737
- 800036c: 3737 .short 0x3737
- 800036e: 37 .byte 0x37
- 800036f: 00 .byte 0x00
- 8000370: 68e4 ldr r4, [r4, #12]
- 8000372: 2c00 cmp r4, #0
- 8000374: d1ce bne.n 8000314 <d_count_templates_scopes+0xc>
- 8000376: bd70 pop {r4, r5, r6, pc}
- 8000378: 68a4 ldr r4, [r4, #8]
- 800037a: 2c00 cmp r4, #0
- 800037c: d1ca bne.n 8000314 <d_count_templates_scopes+0xc>
- 800037e: e7fa b.n 8000376 <d_count_templates_scopes+0x6e>
- 8000380: 68a2 ldr r2, [r4, #8]
- 8000382: 7813 ldrb r3, [r2, #0]
- 8000384: 2b05 cmp r3, #5
- 8000386: d103 bne.n 8000390 <d_count_templates_scopes+0x88>
- 8000388: 6833 ldr r3, [r6, #0]
- 800038a: 3301 adds r3, #1
- 800038c: 6033 str r3, [r6, #0]
- 800038e: 68a2 ldr r2, [r4, #8]
- 8000390: 4631 mov r1, r6
- 8000392: 4628 mov r0, r5
- 8000394: f7ff ffb8 bl 8000308 <d_count_templates_scopes>
- 8000398: 68e4 ldr r4, [r4, #12]
- 800039a: 2c00 cmp r4, #0
- 800039c: d1ba bne.n 8000314 <d_count_templates_scopes+0xc>
- 800039e: e7ea b.n 8000376 <d_count_templates_scopes+0x6e>
- 80003a0: 682b ldr r3, [r5, #0]
- 80003a2: 3301 adds r3, #1
- 80003a4: 602b str r3, [r5, #0]
- 80003a6: 68a2 ldr r2, [r4, #8]
- 80003a8: e7f2 b.n 8000390 <d_count_templates_scopes+0x88>
- 80003aa: 4770 bx lr
-
-080003ac <d_append_buffer>:
- 80003ac: b39a cbz r2, 8000416 <d_append_buffer+0x6a>
- 80003ae: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
- 80003b2: 188e adds r6, r1, r2
- 80003b4: 4604 mov r4, r0
- 80003b6: f8d0 3100 ldr.w r3, [r0, #256] ; 0x100
- 80003ba: 3e01 subs r6, #1
- 80003bc: 1e4d subs r5, r1, #1
- 80003be: 2700 movs r7, #0
- 80003c0: e016 b.n 80003f0 <d_append_buffer+0x44>
- 80003c2: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 80003c6: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 80003ca: f884 70ff strb.w r7, [r4, #255] ; 0xff
- 80003ce: 4798 blx r3
- 80003d0: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 80003d4: 2200 movs r2, #0
- 80003d6: 3301 adds r3, #1
- 80003d8: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 80003dc: 42b5 cmp r5, r6
- 80003de: f04f 0301 mov.w r3, #1
- 80003e2: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 80003e6: f804 8002 strb.w r8, [r4, r2]
- 80003ea: f884 8104 strb.w r8, [r4, #260] ; 0x104
- 80003ee: d010 beq.n 8000412 <d_append_buffer+0x66>
- 80003f0: 2bff cmp r3, #255 ; 0xff
- 80003f2: 4619 mov r1, r3
- 80003f4: 4620 mov r0, r4
- 80003f6: f815 8f01 ldrb.w r8, [r5, #1]!
- 80003fa: d0e2 beq.n 80003c2 <d_append_buffer+0x16>
- 80003fc: 461a mov r2, r3
- 80003fe: 42b5 cmp r5, r6
- 8000400: f103 0301 add.w r3, r3, #1
- 8000404: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 8000408: f804 8002 strb.w r8, [r4, r2]
- 800040c: f884 8104 strb.w r8, [r4, #260] ; 0x104
- 8000410: d1ee bne.n 80003f0 <d_append_buffer+0x44>
- 8000412: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
- 8000416: 4770 bx lr
-
-08000418 <is_fnqual_component_type>:
- 8000418: f1a0 031c sub.w r3, r0, #28
- 800041c: 2b04 cmp r3, #4
- 800041e: d907 bls.n 8000430 <is_fnqual_component_type+0x18>
- 8000420: 284c cmp r0, #76 ; 0x4c
- 8000422: d005 beq.n 8000430 <is_fnqual_component_type+0x18>
- 8000424: 384e subs r0, #78 ; 0x4e
- 8000426: 2801 cmp r0, #1
- 8000428: bf8c ite hi
- 800042a: 2000 movhi r0, #0
- 800042c: 2001 movls r0, #1
- 800042e: 4770 bx lr
- 8000430: 2001 movs r0, #1
- 8000432: 4770 bx lr
-
-08000434 <d_number.isra.1>:
- 8000434: b470 push {r4, r5, r6}
- 8000436: 6802 ldr r2, [r0, #0]
- 8000438: 7811 ldrb r1, [r2, #0]
- 800043a: 296e cmp r1, #110 ; 0x6e
- 800043c: d018 beq.n 8000470 <d_number.isra.1+0x3c>
- 800043e: f1a1 0330 sub.w r3, r1, #48 ; 0x30
- 8000442: 2b09 cmp r3, #9
- 8000444: d81e bhi.n 8000484 <d_number.isra.1+0x50>
- 8000446: 2600 movs r6, #0
- 8000448: 2300 movs r3, #0
- 800044a: 3201 adds r2, #1
- 800044c: eb03 0383 add.w r3, r3, r3, lsl #2
- 8000450: 6002 str r2, [r0, #0]
- 8000452: eb01 0443 add.w r4, r1, r3, lsl #1
- 8000456: 7811 ldrb r1, [r2, #0]
- 8000458: f1a1 0530 sub.w r5, r1, #48 ; 0x30
- 800045c: 2d09 cmp r5, #9
- 800045e: f1a4 0330 sub.w r3, r4, #48 ; 0x30
- 8000462: d9f2 bls.n 800044a <d_number.isra.1+0x16>
- 8000464: b10e cbz r6, 800046a <d_number.isra.1+0x36>
- 8000466: f1c4 0330 rsb r3, r4, #48 ; 0x30
- 800046a: 4618 mov r0, r3
- 800046c: bc70 pop {r4, r5, r6}
- 800046e: 4770 bx lr
- 8000470: 1c53 adds r3, r2, #1
- 8000472: 6003 str r3, [r0, #0]
- 8000474: 7851 ldrb r1, [r2, #1]
- 8000476: f1a1 0230 sub.w r2, r1, #48 ; 0x30
- 800047a: 2a09 cmp r2, #9
- 800047c: d802 bhi.n 8000484 <d_number.isra.1+0x50>
- 800047e: 461a mov r2, r3
- 8000480: 2601 movs r6, #1
- 8000482: e7e1 b.n 8000448 <d_number.isra.1+0x14>
- 8000484: 2300 movs r3, #0
- 8000486: 4618 mov r0, r3
- 8000488: bc70 pop {r4, r5, r6}
- 800048a: 4770 bx lr
-
-0800048c <d_number_component>:
- 800048c: e9d0 3205 ldrd r3, r2, [r0, #20]
- 8000490: 4293 cmp r3, r2
- 8000492: b570 push {r4, r5, r6, lr}
- 8000494: da0e bge.n 80004b4 <d_number_component+0x28>
- 8000496: 6901 ldr r1, [r0, #16]
- 8000498: 011a lsls r2, r3, #4
- 800049a: 188c adds r4, r1, r2
- 800049c: 3301 adds r3, #1
- 800049e: 2600 movs r6, #0
- 80004a0: 2541 movs r5, #65 ; 0x41
- 80004a2: 6066 str r6, [r4, #4]
- 80004a4: 300c adds r0, #12
- 80004a6: 6083 str r3, [r0, #8]
- 80004a8: 548d strb r5, [r1, r2]
- 80004aa: f7ff ffc3 bl 8000434 <d_number.isra.1>
- 80004ae: 60a0 str r0, [r4, #8]
- 80004b0: 4620 mov r0, r4
- 80004b2: bd70 pop {r4, r5, r6, pc}
- 80004b4: 2400 movs r4, #0
- 80004b6: 4620 mov r0, r4
- 80004b8: bd70 pop {r4, r5, r6, pc}
- 80004ba: bf00 nop
-
-080004bc <d_compact_number>:
- 80004bc: b510 push {r4, lr}
- 80004be: 68c3 ldr r3, [r0, #12]
- 80004c0: 781a ldrb r2, [r3, #0]
- 80004c2: 2a5f cmp r2, #95 ; 0x5f
- 80004c4: 4604 mov r4, r0
- 80004c6: d00d beq.n 80004e4 <d_compact_number+0x28>
- 80004c8: 2a6e cmp r2, #110 ; 0x6e
- 80004ca: d00d beq.n 80004e8 <d_compact_number+0x2c>
- 80004cc: 300c adds r0, #12
- 80004ce: f7ff ffb1 bl 8000434 <d_number.isra.1>
- 80004d2: 3001 adds r0, #1
- 80004d4: d408 bmi.n 80004e8 <d_compact_number+0x2c>
- 80004d6: 68e3 ldr r3, [r4, #12]
- 80004d8: 781a ldrb r2, [r3, #0]
- 80004da: 2a5f cmp r2, #95 ; 0x5f
- 80004dc: d104 bne.n 80004e8 <d_compact_number+0x2c>
- 80004de: 3301 adds r3, #1
- 80004e0: 60e3 str r3, [r4, #12]
- 80004e2: bd10 pop {r4, pc}
- 80004e4: 2000 movs r0, #0
- 80004e6: e7fa b.n 80004de <d_compact_number+0x22>
- 80004e8: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
- 80004ec: bd10 pop {r4, pc}
- 80004ee: bf00 nop
-
-080004f0 <d_template_param>:
- 80004f0: b5f8 push {r3, r4, r5, r6, r7, lr}
- 80004f2: 68c3 ldr r3, [r0, #12]
- 80004f4: 781a ldrb r2, [r3, #0]
- 80004f6: 2a54 cmp r2, #84 ; 0x54
- 80004f8: d119 bne.n 800052e <d_template_param+0x3e>
- 80004fa: 3301 adds r3, #1
- 80004fc: 60c3 str r3, [r0, #12]
- 80004fe: 4604 mov r4, r0
- 8000500: f7ff ffdc bl 80004bc <d_compact_number>
- 8000504: 1e05 subs r5, r0, #0
- 8000506: db12 blt.n 800052e <d_template_param+0x3e>
- 8000508: e9d4 3105 ldrd r3, r1, [r4, #20]
- 800050c: 6aa2 ldr r2, [r4, #40] ; 0x28
- 800050e: 428b cmp r3, r1
- 8000510: f102 0201 add.w r2, r2, #1
- 8000514: 62a2 str r2, [r4, #40] ; 0x28
- 8000516: da0a bge.n 800052e <d_template_param+0x3e>
- 8000518: 6921 ldr r1, [r4, #16]
- 800051a: 011a lsls r2, r3, #4
- 800051c: 1888 adds r0, r1, r2
- 800051e: 3301 adds r3, #1
- 8000520: 2700 movs r7, #0
- 8000522: 2605 movs r6, #5
- 8000524: 6047 str r7, [r0, #4]
- 8000526: 6163 str r3, [r4, #20]
- 8000528: 548e strb r6, [r1, r2]
- 800052a: 6085 str r5, [r0, #8]
- 800052c: bdf8 pop {r3, r4, r5, r6, r7, pc}
- 800052e: 2000 movs r0, #0
- 8000530: bdf8 pop {r3, r4, r5, r6, r7, pc}
- 8000532: bf00 nop
-
-08000534 <d_source_name>:
- 8000534: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
- 8000538: 4604 mov r4, r0
- 800053a: 300c adds r0, #12
- 800053c: f7ff ff7a bl 8000434 <d_number.isra.1>
- 8000540: 1e07 subs r7, r0, #0
- 8000542: dd49 ble.n 80005d8 <d_source_name+0xa4>
- 8000544: 68e5 ldr r5, [r4, #12]
- 8000546: 6863 ldr r3, [r4, #4]
- 8000548: 1b5b subs r3, r3, r5
- 800054a: 429f cmp r7, r3
- 800054c: dc42 bgt.n 80005d4 <d_source_name+0xa0>
- 800054e: 68a2 ldr r2, [r4, #8]
- 8000550: 19eb adds r3, r5, r7
- 8000552: 0752 lsls r2, r2, #29
- 8000554: 60e3 str r3, [r4, #12]
- 8000556: d504 bpl.n 8000562 <d_source_name+0x2e>
- 8000558: 5dea ldrb r2, [r5, r7]
- 800055a: 2a24 cmp r2, #36 ; 0x24
- 800055c: bf04 itt eq
- 800055e: 3301 addeq r3, #1
- 8000560: 60e3 streq r3, [r4, #12]
- 8000562: 2f09 cmp r7, #9
- 8000564: e9d4 6805 ldrd r6, r8, [r4, #20]
- 8000568: dc10 bgt.n 800058c <d_source_name+0x58>
- 800056a: 45b0 cmp r8, r6
- 800056c: dd32 ble.n 80005d4 <d_source_name+0xa0>
- 800056e: 6921 ldr r1, [r4, #16]
- 8000570: 0132 lsls r2, r6, #4
- 8000572: 1888 adds r0, r1, r2
- 8000574: 3601 adds r6, #1
- 8000576: 2300 movs r3, #0
- 8000578: 6043 str r3, [r0, #4]
- 800057a: 6166 str r6, [r4, #20]
- 800057c: b355 cbz r5, 80005d4 <d_source_name+0xa0>
- 800057e: 6043 str r3, [r0, #4]
- 8000580: 548b strb r3, [r1, r2]
- 8000582: e9c0 5702 strd r5, r7, [r0, #8]
- 8000586: 62e0 str r0, [r4, #44] ; 0x2c
- 8000588: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
- 800058c: 2208 movs r2, #8
- 800058e: 4914 ldr r1, [pc, #80] ; (80005e0 <d_source_name+0xac>)
- 8000590: 4628 mov r0, r5
- 8000592: f00d fee1 bl 800e358 <memcmp>
- 8000596: 2800 cmp r0, #0
- 8000598: d1e7 bne.n 800056a <d_source_name+0x36>
- 800059a: 7a2b ldrb r3, [r5, #8]
- 800059c: 2b2e cmp r3, #46 ; 0x2e
- 800059e: d003 beq.n 80005a8 <d_source_name+0x74>
- 80005a0: 2b5f cmp r3, #95 ; 0x5f
- 80005a2: d001 beq.n 80005a8 <d_source_name+0x74>
- 80005a4: 2b24 cmp r3, #36 ; 0x24
- 80005a6: d1e0 bne.n 800056a <d_source_name+0x36>
- 80005a8: 7a6b ldrb r3, [r5, #9]
- 80005aa: 2b4e cmp r3, #78 ; 0x4e
- 80005ac: d1dd bne.n 800056a <d_source_name+0x36>
- 80005ae: 6b23 ldr r3, [r4, #48] ; 0x30
- 80005b0: 3316 adds r3, #22
- 80005b2: 1bdf subs r7, r3, r7
- 80005b4: 45b0 cmp r8, r6
- 80005b6: 6327 str r7, [r4, #48] ; 0x30
- 80005b8: dd0c ble.n 80005d4 <d_source_name+0xa0>
- 80005ba: 6922 ldr r2, [r4, #16]
- 80005bc: 4d09 ldr r5, [pc, #36] ; (80005e4 <d_source_name+0xb0>)
- 80005be: 0133 lsls r3, r6, #4
- 80005c0: 18d0 adds r0, r2, r3
- 80005c2: 2100 movs r1, #0
- 80005c4: 3601 adds r6, #1
- 80005c6: 6166 str r6, [r4, #20]
- 80005c8: 6041 str r1, [r0, #4]
- 80005ca: 54d1 strb r1, [r2, r3]
- 80005cc: 2315 movs r3, #21
- 80005ce: e9c0 5302 strd r5, r3, [r0, #8]
- 80005d2: e7d8 b.n 8000586 <d_source_name+0x52>
- 80005d4: 2000 movs r0, #0
- 80005d6: e7d6 b.n 8000586 <d_source_name+0x52>
- 80005d8: 2000 movs r0, #0
- 80005da: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
- 80005de: bf00 nop
- 80005e0: 08012550 .word 0x08012550
- 80005e4: 0801255c .word 0x0801255c
-
-080005e8 <d_abi_tags>:
- 80005e8: b570 push {r4, r5, r6, lr}
- 80005ea: 68c3 ldr r3, [r0, #12]
- 80005ec: 6ac6 ldr r6, [r0, #44] ; 0x2c
- 80005ee: 781a ldrb r2, [r3, #0]
- 80005f0: 2a42 cmp r2, #66 ; 0x42
- 80005f2: 4604 mov r4, r0
- 80005f4: 460d mov r5, r1
- 80005f6: d10f bne.n 8000618 <d_abi_tags+0x30>
- 80005f8: 3301 adds r3, #1
- 80005fa: 60e3 str r3, [r4, #12]
- 80005fc: 4620 mov r0, r4
- 80005fe: f7ff ff99 bl 8000534 <d_source_name>
- 8000602: 462a mov r2, r5
- 8000604: 4603 mov r3, r0
- 8000606: 214b movs r1, #75 ; 0x4b
- 8000608: 4620 mov r0, r4
- 800060a: f7ff fe19 bl 8000240 <d_make_comp>
- 800060e: 68e3 ldr r3, [r4, #12]
- 8000610: 781a ldrb r2, [r3, #0]
- 8000612: 2a42 cmp r2, #66 ; 0x42
- 8000614: 4605 mov r5, r0
- 8000616: d0ef beq.n 80005f8 <d_abi_tags+0x10>
- 8000618: 62e6 str r6, [r4, #44] ; 0x2c
- 800061a: 4628 mov r0, r5
- 800061c: bd70 pop {r4, r5, r6, pc}
- 800061e: bf00 nop
-
-08000620 <d_substitution>:
- 8000620: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
- 8000624: 4605 mov r5, r0
- 8000626: 68c0 ldr r0, [r0, #12]
- 8000628: 7803 ldrb r3, [r0, #0]
- 800062a: 2b53 cmp r3, #83 ; 0x53
- 800062c: d131 bne.n 8000692 <d_substitution+0x72>
- 800062e: 1c43 adds r3, r0, #1
- 8000630: 60eb str r3, [r5, #12]
- 8000632: 7842 ldrb r2, [r0, #1]
- 8000634: b3a2 cbz r2, 80006a0 <d_substitution+0x80>
- 8000636: 1c83 adds r3, r0, #2
- 8000638: 60eb str r3, [r5, #12]
- 800063a: 7842 ldrb r2, [r0, #1]
- 800063c: 2a5f cmp r2, #95 ; 0x5f
- 800063e: f000 8089 beq.w 8000754 <d_substitution+0x134>
- 8000642: f1a2 0430 sub.w r4, r2, #48 ; 0x30
- 8000646: b2e3 uxtb r3, r4
- 8000648: 2b09 cmp r3, #9
- 800064a: d825 bhi.n 8000698 <d_substitution+0x78>
- 800064c: 2100 movs r1, #0
- 800064e: e00e b.n 800066e <d_substitution+0x4e>
- 8000650: 3b30 subs r3, #48 ; 0x30
- 8000652: 4299 cmp r1, r3
- 8000654: d81d bhi.n 8000692 <d_substitution+0x72>
- 8000656: 68e9 ldr r1, [r5, #12]
- 8000658: 780a ldrb r2, [r1, #0]
- 800065a: 1c48 adds r0, r1, #1
- 800065c: b122 cbz r2, 8000668 <d_substitution+0x48>
- 800065e: 60e8 str r0, [r5, #12]
- 8000660: 780a ldrb r2, [r1, #0]
- 8000662: 2a5f cmp r2, #95 ; 0x5f
- 8000664: f000 8082 beq.w 800076c <d_substitution+0x14c>
- 8000668: f1a2 0430 sub.w r4, r2, #48 ; 0x30
- 800066c: 4619 mov r1, r3
- 800066e: b2e4 uxtb r4, r4
- 8000670: eb01 03c1 add.w r3, r1, r1, lsl #3
- 8000674: 2c09 cmp r4, #9
- 8000676: f1a2 0041 sub.w r0, r2, #65 ; 0x41
- 800067a: eb02 0383 add.w r3, r2, r3, lsl #2
- 800067e: d9e7 bls.n 8000650 <d_substitution+0x30>
- 8000680: 2819 cmp r0, #25
- 8000682: d806 bhi.n 8000692 <d_substitution+0x72>
- 8000684: eb01 03c1 add.w r3, r1, r1, lsl #3
- 8000688: eb02 0383 add.w r3, r2, r3, lsl #2
- 800068c: 3b37 subs r3, #55 ; 0x37
- 800068e: 4299 cmp r1, r3
- 8000690: d9e1 bls.n 8000656 <d_substitution+0x36>
- 8000692: 2000 movs r0, #0
- 8000694: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
- 8000698: f1a2 0341 sub.w r3, r2, #65 ; 0x41
- 800069c: 2b19 cmp r3, #25
- 800069e: d9d5 bls.n 800064c <d_substitution+0x2c>
- 80006a0: 68ab ldr r3, [r5, #8]
- 80006a2: f003 0308 and.w r3, r3, #8
- 80006a6: 2b00 cmp r3, #0
- 80006a8: bf14 ite ne
- 80006aa: 2401 movne r4, #1
- 80006ac: 2400 moveq r4, #0
- 80006ae: d101 bne.n 80006b4 <d_substitution+0x94>
- 80006b0: 2900 cmp r1, #0
- 80006b2: d15d bne.n 8000770 <d_substitution+0x150>
- 80006b4: 4b35 ldr r3, [pc, #212] ; (800078c <d_substitution+0x16c>)
- 80006b6: 2174 movs r1, #116 ; 0x74
- 80006b8: 4291 cmp r1, r2
- 80006ba: f103 00c4 add.w r0, r3, #196 ; 0xc4
- 80006be: d005 beq.n 80006cc <d_substitution+0xac>
- 80006c0: 331c adds r3, #28
- 80006c2: 4283 cmp r3, r0
- 80006c4: d2e5 bcs.n 8000692 <d_substitution+0x72>
- 80006c6: 7819 ldrb r1, [r3, #0]
- 80006c8: 4291 cmp r1, r2
- 80006ca: d1f9 bne.n 80006c0 <d_substitution+0xa0>
- 80006cc: 6958 ldr r0, [r3, #20]
- 80006ce: e9d5 2105 ldrd r2, r1, [r5, #20]
- 80006d2: b1a8 cbz r0, 8000700 <d_substitution+0xe0>
- 80006d4: 428a cmp r2, r1
- 80006d6: da57 bge.n 8000788 <d_substitution+0x168>
- 80006d8: f8d5 c010 ldr.w ip, [r5, #16]
- 80006dc: f8d3 e018 ldr.w lr, [r3, #24]
- 80006e0: 0117 lsls r7, r2, #4
- 80006e2: eb0c 0607 add.w r6, ip, r7
- 80006e6: 3201 adds r2, #1
- 80006e8: f04f 0900 mov.w r9, #0
- 80006ec: f04f 0818 mov.w r8, #24
- 80006f0: f8c6 9004 str.w r9, [r6, #4]
- 80006f4: 616a str r2, [r5, #20]
- 80006f6: f80c 8007 strb.w r8, [ip, r7]
- 80006fa: e9c6 0e02 strd r0, lr, [r6, #8]
- 80006fe: 62ee str r6, [r5, #44] ; 0x2c
- 8000700: 2c00 cmp r4, #0
- 8000702: d13c bne.n 800077e <d_substitution+0x15e>
- 8000704: e9d3 6401 ldrd r6, r4, [r3, #4]
- 8000708: 6b2b ldr r3, [r5, #48] ; 0x30
- 800070a: 4291 cmp r1, r2
- 800070c: 4423 add r3, r4
- 800070e: 632b str r3, [r5, #48] ; 0x30
- 8000710: dd38 ble.n 8000784 <d_substitution+0x164>
- 8000712: 6929 ldr r1, [r5, #16]
- 8000714: 0113 lsls r3, r2, #4
- 8000716: 18c8 adds r0, r1, r3
- 8000718: 3201 adds r2, #1
- 800071a: f04f 0c00 mov.w ip, #0
- 800071e: 2718 movs r7, #24
- 8000720: f8c0 c004 str.w ip, [r0, #4]
- 8000724: 616a str r2, [r5, #20]
- 8000726: 54cf strb r7, [r1, r3]
- 8000728: e9c0 6402 strd r6, r4, [r0, #8]
- 800072c: 68eb ldr r3, [r5, #12]
- 800072e: 781b ldrb r3, [r3, #0]
- 8000730: 2b42 cmp r3, #66 ; 0x42
- 8000732: d1af bne.n 8000694 <d_substitution+0x74>
- 8000734: 4601 mov r1, r0
- 8000736: 4628 mov r0, r5
- 8000738: f7ff ff56 bl 80005e8 <d_abi_tags>
- 800073c: 2800 cmp r0, #0
- 800073e: d0a8 beq.n 8000692 <d_substitution+0x72>
- 8000740: e9d5 3208 ldrd r3, r2, [r5, #32]
- 8000744: 4293 cmp r3, r2
- 8000746: daa5 bge.n 8000694 <d_substitution+0x74>
- 8000748: 69e9 ldr r1, [r5, #28]
- 800074a: 1c5a adds r2, r3, #1
- 800074c: f841 0023 str.w r0, [r1, r3, lsl #2]
- 8000750: 622a str r2, [r5, #32]
- 8000752: e79f b.n 8000694 <d_substitution+0x74>
- 8000754: 2300 movs r3, #0
- 8000756: 6a2a ldr r2, [r5, #32]
- 8000758: 429a cmp r2, r3
- 800075a: d99a bls.n 8000692 <d_substitution+0x72>
- 800075c: 6aaa ldr r2, [r5, #40] ; 0x28
- 800075e: 69e9 ldr r1, [r5, #28]
- 8000760: 3201 adds r2, #1
- 8000762: 62aa str r2, [r5, #40] ; 0x28
- 8000764: f851 0023 ldr.w r0, [r1, r3, lsl #2]
- 8000768: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
- 800076c: 3301 adds r3, #1
- 800076e: e7f2 b.n 8000756 <d_substitution+0x136>
- 8000770: 68eb ldr r3, [r5, #12]
- 8000772: 781b ldrb r3, [r3, #0]
- 8000774: 3b43 subs r3, #67 ; 0x43
- 8000776: 2b01 cmp r3, #1
- 8000778: bf98 it ls
- 800077a: 460c movls r4, r1
- 800077c: e79a b.n 80006b4 <d_substitution+0x94>
- 800077e: e9d3 6403 ldrd r6, r4, [r3, #12]
- 8000782: e7c1 b.n 8000708 <d_substitution+0xe8>
- 8000784: 2000 movs r0, #0
- 8000786: e7d1 b.n 800072c <d_substitution+0x10c>
- 8000788: 2600 movs r6, #0
- 800078a: e7b8 b.n 80006fe <d_substitution+0xde>
- 800078c: 08011b0c .word 0x08011b0c
-
-08000790 <d_discriminator>:
- 8000790: 68c3 ldr r3, [r0, #12]
- 8000792: 781a ldrb r2, [r3, #0]
- 8000794: 2a5f cmp r2, #95 ; 0x5f
- 8000796: d001 beq.n 800079c <d_discriminator+0xc>
- 8000798: 2001 movs r0, #1
- 800079a: 4770 bx lr
- 800079c: b510 push {r4, lr}
- 800079e: 1c5a adds r2, r3, #1
- 80007a0: 4604 mov r4, r0
- 80007a2: f840 2f0c str.w r2, [r0, #12]!
- 80007a6: 785a ldrb r2, [r3, #1]
- 80007a8: 2a5f cmp r2, #95 ; 0x5f
- 80007aa: d004 beq.n 80007b6 <d_discriminator+0x26>
- 80007ac: f7ff fe42 bl 8000434 <d_number.isra.1>
- 80007b0: 43c0 mvns r0, r0
- 80007b2: 0fc0 lsrs r0, r0, #31
- 80007b4: bd10 pop {r4, pc}
- 80007b6: 3302 adds r3, #2
- 80007b8: 60e3 str r3, [r4, #12]
- 80007ba: f7ff fe3b bl 8000434 <d_number.isra.1>
- 80007be: 2800 cmp r0, #0
- 80007c0: db05 blt.n 80007ce <d_discriminator+0x3e>
- 80007c2: 2809 cmp r0, #9
- 80007c4: dd07 ble.n 80007d6 <d_discriminator+0x46>
- 80007c6: 68e3 ldr r3, [r4, #12]
- 80007c8: 781a ldrb r2, [r3, #0]
- 80007ca: 2a5f cmp r2, #95 ; 0x5f
- 80007cc: d001 beq.n 80007d2 <d_discriminator+0x42>
- 80007ce: 2000 movs r0, #0
- 80007d0: bd10 pop {r4, pc}
- 80007d2: 3301 adds r3, #1
- 80007d4: 60e3 str r3, [r4, #12]
- 80007d6: 2001 movs r0, #1
- 80007d8: bd10 pop {r4, pc}
- 80007da: bf00 nop
-
-080007dc <d_index_template_argument.part.9>:
- 80007dc: b170 cbz r0, 80007fc <d_index_template_argument.part.9+0x20>
- 80007de: 7803 ldrb r3, [r0, #0]
- 80007e0: 2b2f cmp r3, #47 ; 0x2f
- 80007e2: d10f bne.n 8000804 <d_index_template_argument.part.9+0x28>
- 80007e4: 2900 cmp r1, #0
- 80007e6: dc04 bgt.n 80007f2 <d_index_template_argument.part.9+0x16>
- 80007e8: e009 b.n 80007fe <d_index_template_argument.part.9+0x22>
- 80007ea: 7803 ldrb r3, [r0, #0]
- 80007ec: 2b2f cmp r3, #47 ; 0x2f
- 80007ee: d109 bne.n 8000804 <d_index_template_argument.part.9+0x28>
- 80007f0: b131 cbz r1, 8000800 <d_index_template_argument.part.9+0x24>
- 80007f2: 68c0 ldr r0, [r0, #12]
- 80007f4: 3901 subs r1, #1
- 80007f6: 2800 cmp r0, #0
- 80007f8: d1f7 bne.n 80007ea <d_index_template_argument.part.9+0xe>
- 80007fa: 4770 bx lr
- 80007fc: 4770 bx lr
- 80007fe: d101 bne.n 8000804 <d_index_template_argument.part.9+0x28>
- 8000800: 6880 ldr r0, [r0, #8]
- 8000802: 4770 bx lr
- 8000804: 2000 movs r0, #0
- 8000806: 4770 bx lr
-
-08000808 <d_lookup_template_argument.isra.10>:
- 8000808: f8d0 3110 ldr.w r3, [r0, #272] ; 0x110
- 800080c: b133 cbz r3, 800081c <d_lookup_template_argument.isra.10+0x14>
- 800080e: 6809 ldr r1, [r1, #0]
- 8000810: 685b ldr r3, [r3, #4]
- 8000812: 2900 cmp r1, #0
- 8000814: 68db ldr r3, [r3, #12]
- 8000816: db04 blt.n 8000822 <d_lookup_template_argument.isra.10+0x1a>
- 8000818: 4618 mov r0, r3
- 800081a: e7df b.n 80007dc <d_index_template_argument.part.9>
- 800081c: 2201 movs r2, #1
- 800081e: f8c0 2118 str.w r2, [r0, #280] ; 0x118
- 8000822: 4618 mov r0, r3
- 8000824: 4770 bx lr
- 8000826: bf00 nop
-
-08000828 <d_find_pack>:
- 8000828: 2900 cmp r1, #0
- 800082a: d042 beq.n 80008b2 <d_find_pack+0x8a>
- 800082c: b538 push {r3, r4, r5, lr}
- 800082e: 4605 mov r5, r0
- 8000830: 460c mov r4, r1
- 8000832: 7823 ldrb r3, [r4, #0]
- 8000834: 2b4b cmp r3, #75 ; 0x4b
- 8000836: d827 bhi.n 8000888 <d_find_pack+0x60>
- 8000838: e8df f003 tbb [pc, r3]
- 800083c: 2626262e .word 0x2626262e
- 8000840: 2b2e3026 .word 0x2b2e3026
- 8000844: 2626262b .word 0x2626262b
- 8000848: 26262626 .word 0x26262626
- 800084c: 26262626 .word 0x26262626
- 8000850: 26262626 .word 0x26262626
- 8000854: 2626262e .word 0x2626262e
- 8000858: 26262626 .word 0x26262626
- 800085c: 26262626 .word 0x26262626
- 8000860: 2e262626 .word 0x2e262626
- 8000864: 26262626 .word 0x26262626
- 8000868: 2626262e .word 0x2626262e
- 800086c: 262b2e26 .word 0x262b2e26
- 8000870: 26262626 .word 0x26262626
- 8000874: 26262626 .word 0x26262626
- 8000878: 26262626 .word 0x26262626
- 800087c: 26262e2e .word 0x26262e2e
- 8000880: 2e2e2e26 .word 0x2e2e2e26
- 8000884: 2e2e2626 .word 0x2e2e2626
- 8000888: 68a1 ldr r1, [r4, #8]
- 800088a: 4628 mov r0, r5
- 800088c: f7ff ffcc bl 8000828 <d_find_pack>
- 8000890: b918 cbnz r0, 800089a <d_find_pack+0x72>
- 8000892: 68e4 ldr r4, [r4, #12]
- 8000894: 2c00 cmp r4, #0
- 8000896: d1cc bne.n 8000832 <d_find_pack+0xa>
- 8000898: 2000 movs r0, #0
- 800089a: bd38 pop {r3, r4, r5, pc}
- 800089c: f104 0108 add.w r1, r4, #8
- 80008a0: 4628 mov r0, r5
- 80008a2: f7ff ffb1 bl 8000808 <d_lookup_template_argument.isra.10>
- 80008a6: 2800 cmp r0, #0
- 80008a8: d0f6 beq.n 8000898 <d_find_pack+0x70>
- 80008aa: 7803 ldrb r3, [r0, #0]
- 80008ac: 2b2f cmp r3, #47 ; 0x2f
- 80008ae: d1f3 bne.n 8000898 <d_find_pack+0x70>
- 80008b0: bd38 pop {r3, r4, r5, pc}
- 80008b2: 2000 movs r0, #0
- 80008b4: 4770 bx lr
- 80008b6: bf00 nop
-
-080008b8 <d_growable_string_callback_adapter>:
- 80008b8: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
- 80008bc: 4614 mov r4, r2
- 80008be: e9d4 5702 ldrd r5, r7, [r4, #8]
- 80008c2: 6852 ldr r2, [r2, #4]
- 80008c4: 1c4b adds r3, r1, #1
- 80008c6: 4413 add r3, r2
- 80008c8: 42ab cmp r3, r5
- 80008ca: b082 sub sp, #8
- 80008cc: 460e mov r6, r1
- 80008ce: 4680 mov r8, r0
- 80008d0: d814 bhi.n 80008fc <d_growable_string_callback_adapter+0x44>
- 80008d2: b117 cbz r7, 80008da <d_growable_string_callback_adapter+0x22>
- 80008d4: b002 add sp, #8
- 80008d6: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
- 80008da: e9d4 0300 ldrd r0, r3, [r4]
- 80008de: 4632 mov r2, r6
- 80008e0: 4641 mov r1, r8
- 80008e2: 4418 add r0, r3
- 80008e4: f00d fd47 bl 800e376 <memcpy>
- 80008e8: e9d4 3200 ldrd r3, r2, [r4]
- 80008ec: 4433 add r3, r6
- 80008ee: 549f strb r7, [r3, r2]
- 80008f0: 6863 ldr r3, [r4, #4]
- 80008f2: 441e add r6, r3
- 80008f4: 6066 str r6, [r4, #4]
- 80008f6: b002 add sp, #8
- 80008f8: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
- 80008fc: 2f00 cmp r7, #0
- 80008fe: d1e9 bne.n 80008d4 <d_growable_string_callback_adapter+0x1c>
- 8000900: b91d cbnz r5, 800090a <d_growable_string_callback_adapter+0x52>
- 8000902: 2b02 cmp r3, #2
- 8000904: f04f 0502 mov.w r5, #2
- 8000908: d902 bls.n 8000910 <d_growable_string_callback_adapter+0x58>
- 800090a: 006d lsls r5, r5, #1
- 800090c: 42ab cmp r3, r5
- 800090e: d8fc bhi.n 800090a <d_growable_string_callback_adapter+0x52>
- 8000910: 4629 mov r1, r5
- 8000912: 6820 ldr r0, [r4, #0]
- 8000914: f00d fd9c bl 800e450 <realloc>
- 8000918: b128 cbz r0, 8000926 <d_growable_string_callback_adapter+0x6e>
- 800091a: 68e7 ldr r7, [r4, #12]
- 800091c: 6020 str r0, [r4, #0]
- 800091e: 60a5 str r5, [r4, #8]
- 8000920: 2f00 cmp r7, #0
- 8000922: d1d7 bne.n 80008d4 <d_growable_string_callback_adapter+0x1c>
- 8000924: e7d9 b.n 80008da <d_growable_string_callback_adapter+0x22>
- 8000926: 9001 str r0, [sp, #4]
- 8000928: 6820 ldr r0, [r4, #0]
- 800092a: f00d fad7 bl 800dedc <free>
- 800092e: 9b01 ldr r3, [sp, #4]
- 8000930: 2201 movs r2, #1
- 8000932: e9c4 3300 strd r3, r3, [r4]
- 8000936: e9c4 3202 strd r3, r2, [r4, #8]
- 800093a: e7cb b.n 80008d4 <d_growable_string_callback_adapter+0x1c>
-
-0800093c <d_call_offset>:
- 800093c: b538 push {r3, r4, r5, lr}
- 800093e: 4604 mov r4, r0
- 8000940: b929 cbnz r1, 800094e <d_call_offset+0x12>
- 8000942: 68c3 ldr r3, [r0, #12]
- 8000944: 781a ldrb r2, [r3, #0]
- 8000946: b132 cbz r2, 8000956 <d_call_offset+0x1a>
- 8000948: 1c5a adds r2, r3, #1
- 800094a: 60c2 str r2, [r0, #12]
- 800094c: 7819 ldrb r1, [r3, #0]
- 800094e: 2968 cmp r1, #104 ; 0x68
- 8000950: d012 beq.n 8000978 <d_call_offset+0x3c>
- 8000952: 2976 cmp r1, #118 ; 0x76
- 8000954: d001 beq.n 800095a <d_call_offset+0x1e>
- 8000956: 2000 movs r0, #0
- 8000958: bd38 pop {r3, r4, r5, pc}
- 800095a: f104 050c add.w r5, r4, #12
- 800095e: 4628 mov r0, r5
- 8000960: f7ff fd68 bl 8000434 <d_number.isra.1>
- 8000964: 68e3 ldr r3, [r4, #12]
- 8000966: 781a ldrb r2, [r3, #0]
- 8000968: 2a5f cmp r2, #95 ; 0x5f
- 800096a: d1f4 bne.n 8000956 <d_call_offset+0x1a>
- 800096c: 3301 adds r3, #1
- 800096e: 60e3 str r3, [r4, #12]
- 8000970: 4628 mov r0, r5
- 8000972: f7ff fd5f bl 8000434 <d_number.isra.1>
- 8000976: e003 b.n 8000980 <d_call_offset+0x44>
- 8000978: f104 000c add.w r0, r4, #12
- 800097c: f7ff fd5a bl 8000434 <d_number.isra.1>
- 8000980: 68e3 ldr r3, [r4, #12]
- 8000982: 781a ldrb r2, [r3, #0]
- 8000984: 2a5f cmp r2, #95 ; 0x5f
- 8000986: d1e6 bne.n 8000956 <d_call_offset+0x1a>
- 8000988: 3301 adds r3, #1
- 800098a: 60e3 str r3, [r4, #12]
- 800098c: 2001 movs r0, #1
- 800098e: bd38 pop {r3, r4, r5, pc}
-
-08000990 <d_append_num>:
- 8000990: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
- 8000994: b088 sub sp, #32
- 8000996: 460a mov r2, r1
- 8000998: 4604 mov r4, r0
- 800099a: 491c ldr r1, [pc, #112] ; (8000a0c <d_append_num+0x7c>)
- 800099c: a801 add r0, sp, #4
- 800099e: f00d ff5d bl 800e85c <sprintf>
- 80009a2: a801 add r0, sp, #4
- 80009a4: f006 fa16 bl 8006dd4 <strlen>
- 80009a8: b368 cbz r0, 8000a06 <d_append_num+0x76>
- 80009aa: ad01 add r5, sp, #4
- 80009ac: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 80009b0: 182e adds r6, r5, r0
- 80009b2: 2700 movs r7, #0
- 80009b4: e016 b.n 80009e4 <d_append_num+0x54>
- 80009b6: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 80009ba: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 80009be: f884 70ff strb.w r7, [r4, #255] ; 0xff
- 80009c2: 4798 blx r3
- 80009c4: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 80009c8: 2200 movs r2, #0
- 80009ca: 3301 adds r3, #1
- 80009cc: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 80009d0: 42ae cmp r6, r5
- 80009d2: f04f 0301 mov.w r3, #1
- 80009d6: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 80009da: f804 8002 strb.w r8, [r4, r2]
- 80009de: f884 8104 strb.w r8, [r4, #260] ; 0x104
- 80009e2: d010 beq.n 8000a06 <d_append_num+0x76>
- 80009e4: 2bff cmp r3, #255 ; 0xff
- 80009e6: 4619 mov r1, r3
- 80009e8: 4620 mov r0, r4
- 80009ea: f815 8b01 ldrb.w r8, [r5], #1
- 80009ee: d0e2 beq.n 80009b6 <d_append_num+0x26>
- 80009f0: 461a mov r2, r3
- 80009f2: 42ae cmp r6, r5
- 80009f4: f103 0301 add.w r3, r3, #1
- 80009f8: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 80009fc: f804 8002 strb.w r8, [r4, r2]
- 8000a00: f884 8104 strb.w r8, [r4, #260] ; 0x104
- 8000a04: d1ee bne.n 80009e4 <d_append_num+0x54>
- 8000a06: b008 add sp, #32
- 8000a08: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
- 8000a0c: 08012574 .word 0x08012574
-
-08000a10 <d_exprlist>:
- 8000a10: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
- 8000a14: 68c3 ldr r3, [r0, #12]
- 8000a16: 781d ldrb r5, [r3, #0]
- 8000a18: b083 sub sp, #12
- 8000a1a: 2200 movs r2, #0
- 8000a1c: 428d cmp r5, r1
- 8000a1e: 4604 mov r4, r0
- 8000a20: 9201 str r2, [sp, #4]
- 8000a22: f000 8199 beq.w 8000d58 <d_exprlist+0x348>
- 8000a26: f8df 94c0 ldr.w r9, [pc, #1216] ; 8000ee8 <d_exprlist+0x4d8>
- 8000a2a: 4688 mov r8, r1
- 8000a2c: af01 add r7, sp, #4
- 8000a2e: 2501 movs r5, #1
- 8000a30: 6b66 ldr r6, [r4, #52] ; 0x34
- 8000a32: 6365 str r5, [r4, #52] ; 0x34
- 8000a34: 781a ldrb r2, [r3, #0]
- 8000a36: 2a4c cmp r2, #76 ; 0x4c
- 8000a38: d05c beq.n 8000af4 <d_exprlist+0xe4>
- 8000a3a: 2a54 cmp r2, #84 ; 0x54
- 8000a3c: d066 beq.n 8000b0c <d_exprlist+0xfc>
- 8000a3e: 2a73 cmp r2, #115 ; 0x73
- 8000a40: d045 beq.n 8000ace <d_exprlist+0xbe>
- 8000a42: 2a66 cmp r2, #102 ; 0x66
- 8000a44: d11c bne.n 8000a80 <d_exprlist+0x70>
- 8000a46: 785a ldrb r2, [r3, #1]
- 8000a48: 2a70 cmp r2, #112 ; 0x70
- 8000a4a: f000 8087 beq.w 8000b5c <d_exprlist+0x14c>
- 8000a4e: 4620 mov r0, r4
- 8000a50: f001 fa70 bl 8001f34 <d_operator_name>
- 8000a54: 4605 mov r5, r0
- 8000a56: 2800 cmp r0, #0
- 8000a58: f000 818c beq.w 8000d74 <d_exprlist+0x364>
- 8000a5c: 7803 ldrb r3, [r0, #0]
- 8000a5e: 2b31 cmp r3, #49 ; 0x31
- 8000a60: f000 8098 beq.w 8000b94 <d_exprlist+0x184>
- 8000a64: 2b32 cmp r3, #50 ; 0x32
- 8000a66: d056 beq.n 8000b16 <d_exprlist+0x106>
- 8000a68: 2b33 cmp r3, #51 ; 0x33
- 8000a6a: d171 bne.n 8000b50 <d_exprlist+0x140>
- 8000a6c: 68e3 ldr r3, [r4, #12]
- 8000a6e: 781a ldrb r2, [r3, #0]
- 8000a70: 2a5f cmp r2, #95 ; 0x5f
- 8000a72: f000 81da beq.w 8000e2a <d_exprlist+0x41a>
- 8000a76: 4620 mov r0, r4
- 8000a78: f000 fa38 bl 8000eec <d_expression_1>
- 8000a7c: 4603 mov r3, r0
- 8000a7e: e0c1 b.n 8000c04 <d_exprlist+0x1f4>
- 8000a80: f1a2 0130 sub.w r1, r2, #48 ; 0x30
- 8000a84: 2909 cmp r1, #9
- 8000a86: f200 80e7 bhi.w 8000c58 <d_exprlist+0x248>
- 8000a8a: 4620 mov r0, r4
- 8000a8c: f001 fbfe bl 800228c <d_unqualified_name>
- 8000a90: 4605 mov r5, r0
- 8000a92: 2800 cmp r0, #0
- 8000a94: f000 816e beq.w 8000d74 <d_exprlist+0x364>
- 8000a98: 68e3 ldr r3, [r4, #12]
- 8000a9a: 781a ldrb r2, [r3, #0]
- 8000a9c: 2a49 cmp r2, #73 ; 0x49
- 8000a9e: f000 80b8 beq.w 8000c12 <d_exprlist+0x202>
- 8000aa2: 6366 str r6, [r4, #52] ; 0x34
- 8000aa4: 462a mov r2, r5
- 8000aa6: 2300 movs r3, #0
- 8000aa8: 212e movs r1, #46 ; 0x2e
- 8000aaa: 4620 mov r0, r4
- 8000aac: f7ff fbc8 bl 8000240 <d_make_comp>
- 8000ab0: 6038 str r0, [r7, #0]
- 8000ab2: b330 cbz r0, 8000b02 <d_exprlist+0xf2>
- 8000ab4: 68e3 ldr r3, [r4, #12]
- 8000ab6: 781a ldrb r2, [r3, #0]
- 8000ab8: 4542 cmp r2, r8
- 8000aba: f100 070c add.w r7, r0, #12
- 8000abe: d1b6 bne.n 8000a2e <d_exprlist+0x1e>
- 8000ac0: 3301 adds r3, #1
- 8000ac2: 9d01 ldr r5, [sp, #4]
- 8000ac4: 60e3 str r3, [r4, #12]
- 8000ac6: 4628 mov r0, r5
- 8000ac8: b003 add sp, #12
- 8000aca: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
- 8000ace: 785a ldrb r2, [r3, #1]
- 8000ad0: 2a72 cmp r2, #114 ; 0x72
- 8000ad2: f000 80ab beq.w 8000c2c <d_exprlist+0x21c>
- 8000ad6: 2a70 cmp r2, #112 ; 0x70
- 8000ad8: d1b9 bne.n 8000a4e <d_exprlist+0x3e>
- 8000ada: 3302 adds r3, #2
- 8000adc: 60e3 str r3, [r4, #12]
- 8000ade: 4620 mov r0, r4
- 8000ae0: f000 fa04 bl 8000eec <d_expression_1>
- 8000ae4: 2300 movs r3, #0
- 8000ae6: 4602 mov r2, r0
- 8000ae8: 214a movs r1, #74 ; 0x4a
- 8000aea: 4620 mov r0, r4
- 8000aec: f7ff fba8 bl 8000240 <d_make_comp>
- 8000af0: 4605 mov r5, r0
- 8000af2: e003 b.n 8000afc <d_exprlist+0xec>
- 8000af4: 4620 mov r0, r4
- 8000af6: f002 f813 bl 8002b20 <d_expr_primary>
- 8000afa: 4605 mov r5, r0
- 8000afc: 6366 str r6, [r4, #52] ; 0x34
- 8000afe: 2d00 cmp r5, #0
- 8000b00: d1d0 bne.n 8000aa4 <d_exprlist+0x94>
- 8000b02: 2500 movs r5, #0
- 8000b04: 4628 mov r0, r5
- 8000b06: b003 add sp, #12
- 8000b08: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
- 8000b0c: 4620 mov r0, r4
- 8000b0e: f7ff fcef bl 80004f0 <d_template_param>
- 8000b12: 4605 mov r5, r0
- 8000b14: e7f2 b.n 8000afc <d_exprlist+0xec>
- 8000b16: 6883 ldr r3, [r0, #8]
- 8000b18: 2b03 cmp r3, #3
- 8000b1a: d819 bhi.n 8000b50 <d_exprlist+0x140>
- 8000b1c: a201 add r2, pc, #4 ; (adr r2, 8000b24 <d_exprlist+0x114>)
- 8000b1e: f852 f023 ldr.w pc, [r2, r3, lsl #2]
- 8000b22: bf00 nop
- 8000b24: 08000cb7 .word 0x08000cb7
- 8000b28: 08000a77 .word 0x08000a77
- 8000b2c: 08000b51 .word 0x08000b51
- 8000b30: 08000b51 .word 0x08000b51
- 8000b34: 2a74 cmp r2, #116 ; 0x74
- 8000b36: d18a bne.n 8000a4e <d_exprlist+0x3e>
- 8000b38: 785b ldrb r3, [r3, #1]
- 8000b3a: 2b6c cmp r3, #108 ; 0x6c
- 8000b3c: d187 bne.n 8000a4e <d_exprlist+0x3e>
- 8000b3e: 4620 mov r0, r4
- 8000b40: f000 fdfe bl 8001740 <d_type>
- 8000b44: 68e3 ldr r3, [r4, #12]
- 8000b46: 785a ldrb r2, [r3, #1]
- 8000b48: 4605 mov r5, r0
- 8000b4a: 2a00 cmp r2, #0
- 8000b4c: f040 8123 bne.w 8000d96 <d_exprlist+0x386>
- 8000b50: 2500 movs r5, #0
- 8000b52: 4628 mov r0, r5
- 8000b54: 6366 str r6, [r4, #52] ; 0x34
- 8000b56: b003 add sp, #12
- 8000b58: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
- 8000b5c: 1c9a adds r2, r3, #2
- 8000b5e: 60e2 str r2, [r4, #12]
- 8000b60: 789a ldrb r2, [r3, #2]
- 8000b62: 2a54 cmp r2, #84 ; 0x54
- 8000b64: f040 8082 bne.w 8000c6c <d_exprlist+0x25c>
- 8000b68: 3303 adds r3, #3
- 8000b6a: 60e3 str r3, [r4, #12]
- 8000b6c: 2000 movs r0, #0
- 8000b6e: e9d4 3205 ldrd r3, r2, [r4, #20]
- 8000b72: 4293 cmp r3, r2
- 8000b74: daec bge.n 8000b50 <d_exprlist+0x140>
- 8000b76: 6921 ldr r1, [r4, #16]
- 8000b78: 011a lsls r2, r3, #4
- 8000b7a: 188d adds r5, r1, r2
- 8000b7c: 3301 adds r3, #1
- 8000b7e: f04f 0e00 mov.w lr, #0
- 8000b82: f04f 0c06 mov.w ip, #6
- 8000b86: f8c5 e004 str.w lr, [r5, #4]
- 8000b8a: 6163 str r3, [r4, #20]
- 8000b8c: f801 c002 strb.w ip, [r1, r2]
- 8000b90: 60a8 str r0, [r5, #8]
- 8000b92: e786 b.n 8000aa2 <d_exprlist+0x92>
- 8000b94: f8d0 b008 ldr.w fp, [r0, #8]
- 8000b98: 6b23 ldr r3, [r4, #48] ; 0x30
- 8000b9a: f8db 2008 ldr.w r2, [fp, #8]
- 8000b9e: f8db a000 ldr.w sl, [fp]
- 8000ba2: 3a02 subs r2, #2
- 8000ba4: 4413 add r3, r2
- 8000ba6: 6323 str r3, [r4, #48] ; 0x30
- 8000ba8: 4650 mov r0, sl
- 8000baa: 4649 mov r1, r9
- 8000bac: f006 f908 bl 8006dc0 <strcmp>
- 8000bb0: 2800 cmp r0, #0
- 8000bb2: f000 80e4 beq.w 8000d7e <d_exprlist+0x36e>
- 8000bb6: f8db b00c ldr.w fp, [fp, #12]
- 8000bba: f1bb 0f03 cmp.w fp, #3
- 8000bbe: d8c7 bhi.n 8000b50 <d_exprlist+0x140>
- 8000bc0: e8df f01b tbh [pc, fp, lsl #1]
- 8000bc4: 00040079 .word 0x00040079
- 8000bc8: 008100f7 .word 0x008100f7
- 8000bcc: f89a 3000 ldrb.w r3, [sl]
- 8000bd0: 2b70 cmp r3, #112 ; 0x70
- 8000bd2: d065 beq.n 8000ca0 <d_exprlist+0x290>
- 8000bd4: 2b6d cmp r3, #109 ; 0x6d
- 8000bd6: d063 beq.n 8000ca0 <d_exprlist+0x290>
- 8000bd8: f04f 0b00 mov.w fp, #0
- 8000bdc: 4650 mov r0, sl
- 8000bde: 49bd ldr r1, [pc, #756] ; (8000ed4 <d_exprlist+0x4c4>)
- 8000be0: f006 f8ee bl 8006dc0 <strcmp>
- 8000be4: 2800 cmp r0, #0
- 8000be6: f040 80c0 bne.w 8000d6a <d_exprlist+0x35a>
- 8000bea: 4620 mov r0, r4
- 8000bec: f000 fb90 bl 8001310 <d_template_args_1>
- 8000bf0: 4603 mov r3, r0
- 8000bf2: f1bb 0f00 cmp.w fp, #0
- 8000bf6: d005 beq.n 8000c04 <d_exprlist+0x1f4>
- 8000bf8: 461a mov r2, r3
- 8000bfa: 2138 movs r1, #56 ; 0x38
- 8000bfc: 4620 mov r0, r4
- 8000bfe: f7ff fb1f bl 8000240 <d_make_comp>
- 8000c02: 4603 mov r3, r0
- 8000c04: 462a mov r2, r5
- 8000c06: 2136 movs r1, #54 ; 0x36
- 8000c08: 4620 mov r0, r4
- 8000c0a: f7ff fb19 bl 8000240 <d_make_comp>
- 8000c0e: 4605 mov r5, r0
- 8000c10: e774 b.n 8000afc <d_exprlist+0xec>
- 8000c12: 3301 adds r3, #1
- 8000c14: 60e3 str r3, [r4, #12]
- 8000c16: 4620 mov r0, r4
- 8000c18: f000 fb7a bl 8001310 <d_template_args_1>
- 8000c1c: 462a mov r2, r5
- 8000c1e: 4603 mov r3, r0
- 8000c20: 2104 movs r1, #4
- 8000c22: 4620 mov r0, r4
- 8000c24: f7ff fb0c bl 8000240 <d_make_comp>
- 8000c28: 4605 mov r5, r0
- 8000c2a: e767 b.n 8000afc <d_exprlist+0xec>
- 8000c2c: 3302 adds r3, #2
- 8000c2e: 60e3 str r3, [r4, #12]
- 8000c30: 4620 mov r0, r4
- 8000c32: f000 fd85 bl 8001740 <d_type>
- 8000c36: 4682 mov sl, r0
- 8000c38: 4620 mov r0, r4
- 8000c3a: f001 fb27 bl 800228c <d_unqualified_name>
- 8000c3e: 68e3 ldr r3, [r4, #12]
- 8000c40: 781a ldrb r2, [r3, #0]
- 8000c42: 2a49 cmp r2, #73 ; 0x49
- 8000c44: 4683 mov fp, r0
- 8000c46: d01e beq.n 8000c86 <d_exprlist+0x276>
- 8000c48: 4603 mov r3, r0
- 8000c4a: 4629 mov r1, r5
- 8000c4c: 4652 mov r2, sl
- 8000c4e: 4620 mov r0, r4
- 8000c50: f7ff faf6 bl 8000240 <d_make_comp>
- 8000c54: 4605 mov r5, r0
- 8000c56: e751 b.n 8000afc <d_exprlist+0xec>
- 8000c58: 2a6f cmp r2, #111 ; 0x6f
- 8000c5a: f040 8094 bne.w 8000d86 <d_exprlist+0x376>
- 8000c5e: 785a ldrb r2, [r3, #1]
- 8000c60: 2a6e cmp r2, #110 ; 0x6e
- 8000c62: f47f aef4 bne.w 8000a4e <d_exprlist+0x3e>
- 8000c66: 3302 adds r3, #2
- 8000c68: 60e3 str r3, [r4, #12]
- 8000c6a: e70e b.n 8000a8a <d_exprlist+0x7a>
- 8000c6c: 4620 mov r0, r4
- 8000c6e: f7ff fc25 bl 80004bc <d_compact_number>
- 8000c72: f06f 4300 mvn.w r3, #2147483648 ; 0x80000000
- 8000c76: 4298 cmp r0, r3
- 8000c78: f43f af6a beq.w 8000b50 <d_exprlist+0x140>
- 8000c7c: 1c43 adds r3, r0, #1
- 8000c7e: f43f af67 beq.w 8000b50 <d_exprlist+0x140>
- 8000c82: 3001 adds r0, #1
- 8000c84: e773 b.n 8000b6e <d_exprlist+0x15e>
- 8000c86: 3301 adds r3, #1
- 8000c88: 60e3 str r3, [r4, #12]
- 8000c8a: 4620 mov r0, r4
- 8000c8c: f000 fb40 bl 8001310 <d_template_args_1>
- 8000c90: 465a mov r2, fp
- 8000c92: 4603 mov r3, r0
- 8000c94: 2104 movs r1, #4
- 8000c96: 4620 mov r0, r4
- 8000c98: f7ff fad2 bl 8000240 <d_make_comp>
- 8000c9c: 4603 mov r3, r0
- 8000c9e: e7d4 b.n 8000c4a <d_exprlist+0x23a>
- 8000ca0: f89a 2001 ldrb.w r2, [sl, #1]
- 8000ca4: 429a cmp r2, r3
- 8000ca6: d197 bne.n 8000bd8 <d_exprlist+0x1c8>
- 8000ca8: 68e3 ldr r3, [r4, #12]
- 8000caa: 781a ldrb r2, [r3, #0]
- 8000cac: 2a5f cmp r2, #95 ; 0x5f
- 8000cae: d195 bne.n 8000bdc <d_exprlist+0x1cc>
- 8000cb0: 3301 adds r3, #1
- 8000cb2: 60e3 str r3, [r4, #12]
- 8000cb4: e790 b.n 8000bd8 <d_exprlist+0x1c8>
- 8000cb6: 462a mov r2, r5
- 8000cb8: 2300 movs r3, #0
- 8000cba: 2135 movs r1, #53 ; 0x35
- 8000cbc: 4620 mov r0, r4
- 8000cbe: f7ff fabf bl 8000240 <d_make_comp>
- 8000cc2: 4605 mov r5, r0
- 8000cc4: e71a b.n 8000afc <d_exprlist+0xec>
- 8000cc6: f1ba 0f00 cmp.w sl, #0
- 8000cca: f43f af41 beq.w 8000b50 <d_exprlist+0x140>
- 8000cce: 4982 ldr r1, [pc, #520] ; (8000ed8 <d_exprlist+0x4c8>)
- 8000cd0: 4650 mov r0, sl
- 8000cd2: f006 f875 bl 8006dc0 <strcmp>
- 8000cd6: 2800 cmp r0, #0
- 8000cd8: f000 80c7 beq.w 8000e6a <d_exprlist+0x45a>
- 8000cdc: f89a 3000 ldrb.w r3, [sl]
- 8000ce0: 2b66 cmp r3, #102 ; 0x66
- 8000ce2: f000 80ed beq.w 8000ec0 <d_exprlist+0x4b0>
- 8000ce6: 2b6e cmp r3, #110 ; 0x6e
- 8000ce8: f47f af32 bne.w 8000b50 <d_exprlist+0x140>
- 8000cec: f89a 3001 ldrb.w r3, [sl, #1]
- 8000cf0: 2b77 cmp r3, #119 ; 0x77
- 8000cf2: d002 beq.n 8000cfa <d_exprlist+0x2ea>
- 8000cf4: 2b61 cmp r3, #97 ; 0x61
- 8000cf6: f47f af2b bne.w 8000b50 <d_exprlist+0x140>
- 8000cfa: 215f movs r1, #95 ; 0x5f
- 8000cfc: 4620 mov r0, r4
- 8000cfe: f7ff fe87 bl 8000a10 <d_exprlist>
- 8000d02: 4682 mov sl, r0
- 8000d04: 4620 mov r0, r4
- 8000d06: f000 fd1b bl 8001740 <d_type>
- 8000d0a: 68e3 ldr r3, [r4, #12]
- 8000d0c: 781a ldrb r2, [r3, #0]
- 8000d0e: 2a45 cmp r2, #69 ; 0x45
- 8000d10: 4683 mov fp, r0
- 8000d12: f000 8086 beq.w 8000e22 <d_exprlist+0x412>
- 8000d16: 2a70 cmp r2, #112 ; 0x70
- 8000d18: f000 80c6 beq.w 8000ea8 <d_exprlist+0x498>
- 8000d1c: 2a69 cmp r2, #105 ; 0x69
- 8000d1e: f47f af17 bne.w 8000b50 <d_exprlist+0x140>
- 8000d22: 785b ldrb r3, [r3, #1]
- 8000d24: 2b6c cmp r3, #108 ; 0x6c
- 8000d26: f47f af13 bne.w 8000b50 <d_exprlist+0x140>
- 8000d2a: 4620 mov r0, r4
- 8000d2c: f000 f8de bl 8000eec <d_expression_1>
- 8000d30: 4603 mov r3, r0
- 8000d32: 465a mov r2, fp
- 8000d34: 213b movs r1, #59 ; 0x3b
- 8000d36: 4620 mov r0, r4
- 8000d38: f7ff fa82 bl 8000240 <d_make_comp>
- 8000d3c: 4652 mov r2, sl
- 8000d3e: 4603 mov r3, r0
- 8000d40: 213a movs r1, #58 ; 0x3a
- 8000d42: 4620 mov r0, r4
- 8000d44: f7ff fa7c bl 8000240 <d_make_comp>
- 8000d48: 462a mov r2, r5
- 8000d4a: 4603 mov r3, r0
- 8000d4c: 2139 movs r1, #57 ; 0x39
- 8000d4e: 4620 mov r0, r4
- 8000d50: f7ff fa76 bl 8000240 <d_make_comp>
- 8000d54: 4605 mov r5, r0
- 8000d56: e6d1 b.n 8000afc <d_exprlist+0xec>
- 8000d58: 3301 adds r3, #1
- 8000d5a: 60c3 str r3, [r0, #12]
- 8000d5c: 212e movs r1, #46 ; 0x2e
- 8000d5e: 4613 mov r3, r2
- 8000d60: b003 add sp, #12
- 8000d62: e8bd 4ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
- 8000d66: f7ff ba6b b.w 8000240 <d_make_comp>
- 8000d6a: 4620 mov r0, r4
- 8000d6c: f000 f8be bl 8000eec <d_expression_1>
- 8000d70: 4603 mov r3, r0
- 8000d72: e73e b.n 8000bf2 <d_exprlist+0x1e2>
- 8000d74: 4628 mov r0, r5
- 8000d76: 6366 str r6, [r4, #52] ; 0x34
- 8000d78: b003 add sp, #12
- 8000d7a: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
- 8000d7e: 4620 mov r0, r4
- 8000d80: f000 fcde bl 8001740 <d_type>
- 8000d84: e73d b.n 8000c02 <d_exprlist+0x1f2>
- 8000d86: 2a69 cmp r2, #105 ; 0x69
- 8000d88: f47f aed4 bne.w 8000b34 <d_exprlist+0x124>
- 8000d8c: 785a ldrb r2, [r3, #1]
- 8000d8e: 2a6c cmp r2, #108 ; 0x6c
- 8000d90: f47f ae5d bne.w 8000a4e <d_exprlist+0x3e>
- 8000d94: 2500 movs r5, #0
- 8000d96: 3302 adds r3, #2
- 8000d98: 60e3 str r3, [r4, #12]
- 8000d9a: 2145 movs r1, #69 ; 0x45
- 8000d9c: 4620 mov r0, r4
- 8000d9e: f7ff fe37 bl 8000a10 <d_exprlist>
- 8000da2: 462a mov r2, r5
- 8000da4: 4603 mov r3, r0
- 8000da6: 2130 movs r1, #48 ; 0x30
- 8000da8: 4620 mov r0, r4
- 8000daa: f7ff fa49 bl 8000240 <d_make_comp>
- 8000dae: 4605 mov r5, r0
- 8000db0: e6a4 b.n 8000afc <d_exprlist+0xec>
- 8000db2: f1ba 0f00 cmp.w sl, #0
- 8000db6: f43f aecb beq.w 8000b50 <d_exprlist+0x140>
- 8000dba: 68ab ldr r3, [r5, #8]
- 8000dbc: 681b ldr r3, [r3, #0]
- 8000dbe: 785a ldrb r2, [r3, #1]
- 8000dc0: 2a63 cmp r2, #99 ; 0x63
- 8000dc2: d03a beq.n 8000e3a <d_exprlist+0x42a>
- 8000dc4: f89a 3000 ldrb.w r3, [sl]
- 8000dc8: 2b66 cmp r3, #102 ; 0x66
- 8000dca: d149 bne.n 8000e60 <d_exprlist+0x450>
- 8000dcc: 4620 mov r0, r4
- 8000dce: f001 f8b1 bl 8001f34 <d_operator_name>
- 8000dd2: 4683 mov fp, r0
- 8000dd4: 4941 ldr r1, [pc, #260] ; (8000edc <d_exprlist+0x4cc>)
- 8000dd6: 4650 mov r0, sl
- 8000dd8: f005 fff2 bl 8006dc0 <strcmp>
- 8000ddc: 2800 cmp r0, #0
- 8000dde: d039 beq.n 8000e54 <d_exprlist+0x444>
- 8000de0: 493f ldr r1, [pc, #252] ; (8000ee0 <d_exprlist+0x4d0>)
- 8000de2: 4650 mov r0, sl
- 8000de4: f005 ffec bl 8006dc0 <strcmp>
- 8000de8: b128 cbz r0, 8000df6 <d_exprlist+0x3e6>
- 8000dea: 4650 mov r0, sl
- 8000dec: 493d ldr r1, [pc, #244] ; (8000ee4 <d_exprlist+0x4d4>)
- 8000dee: f005 ffe7 bl 8006dc0 <strcmp>
- 8000df2: 2800 cmp r0, #0
- 8000df4: d168 bne.n 8000ec8 <d_exprlist+0x4b8>
- 8000df6: 4620 mov r0, r4
- 8000df8: f001 fa48 bl 800228c <d_unqualified_name>
- 8000dfc: 68e3 ldr r3, [r4, #12]
- 8000dfe: 781a ldrb r2, [r3, #0]
- 8000e00: 2a49 cmp r2, #73 ; 0x49
- 8000e02: 4682 mov sl, r0
- 8000e04: d043 beq.n 8000e8e <d_exprlist+0x47e>
- 8000e06: 4653 mov r3, sl
- 8000e08: 465a mov r2, fp
- 8000e0a: 2138 movs r1, #56 ; 0x38
- 8000e0c: 4620 mov r0, r4
- 8000e0e: f7ff fa17 bl 8000240 <d_make_comp>
- 8000e12: 462a mov r2, r5
- 8000e14: 4603 mov r3, r0
- 8000e16: 2137 movs r1, #55 ; 0x37
- 8000e18: 4620 mov r0, r4
- 8000e1a: f7ff fa11 bl 8000240 <d_make_comp>
- 8000e1e: 4605 mov r5, r0
- 8000e20: e66c b.n 8000afc <d_exprlist+0xec>
- 8000e22: 3301 adds r3, #1
- 8000e24: 60e3 str r3, [r4, #12]
- 8000e26: 2300 movs r3, #0
- 8000e28: e783 b.n 8000d32 <d_exprlist+0x322>
- 8000e2a: 3301 adds r3, #1
- 8000e2c: 60e3 str r3, [r4, #12]
- 8000e2e: 2145 movs r1, #69 ; 0x45
- 8000e30: 4620 mov r0, r4
- 8000e32: f7ff fded bl 8000a10 <d_exprlist>
- 8000e36: 4603 mov r3, r0
- 8000e38: e6e4 b.n 8000c04 <d_exprlist+0x1f4>
- 8000e3a: 781b ldrb r3, [r3, #0]
- 8000e3c: f1a3 0263 sub.w r2, r3, #99 ; 0x63
- 8000e40: 2a01 cmp r2, #1
- 8000e42: d902 bls.n 8000e4a <d_exprlist+0x43a>
- 8000e44: 3b72 subs r3, #114 ; 0x72
- 8000e46: 2b01 cmp r3, #1
- 8000e48: d8bc bhi.n 8000dc4 <d_exprlist+0x3b4>
- 8000e4a: 4620 mov r0, r4
- 8000e4c: f000 fc78 bl 8001740 <d_type>
- 8000e50: 4683 mov fp, r0
- 8000e52: e7bf b.n 8000dd4 <d_exprlist+0x3c4>
- 8000e54: 2145 movs r1, #69 ; 0x45
- 8000e56: 4620 mov r0, r4
- 8000e58: f7ff fdda bl 8000a10 <d_exprlist>
- 8000e5c: 4682 mov sl, r0
- 8000e5e: e7d2 b.n 8000e06 <d_exprlist+0x3f6>
- 8000e60: 4620 mov r0, r4
- 8000e62: f000 f843 bl 8000eec <d_expression_1>
- 8000e66: 4683 mov fp, r0
- 8000e68: e7b4 b.n 8000dd4 <d_exprlist+0x3c4>
- 8000e6a: 4620 mov r0, r4
- 8000e6c: f000 f83e bl 8000eec <d_expression_1>
- 8000e70: 4682 mov sl, r0
- 8000e72: 4620 mov r0, r4
- 8000e74: f000 f83a bl 8000eec <d_expression_1>
- 8000e78: 4683 mov fp, r0
- 8000e7a: 4620 mov r0, r4
- 8000e7c: f000 f836 bl 8000eec <d_expression_1>
- 8000e80: 4603 mov r3, r0
- 8000e82: 2800 cmp r0, #0
- 8000e84: f47f af55 bne.w 8000d32 <d_exprlist+0x322>
- 8000e88: 6366 str r6, [r4, #52] ; 0x34
- 8000e8a: 4605 mov r5, r0
- 8000e8c: e61b b.n 8000ac6 <d_exprlist+0xb6>
- 8000e8e: 3301 adds r3, #1
- 8000e90: 60e3 str r3, [r4, #12]
- 8000e92: 4620 mov r0, r4
- 8000e94: f000 fa3c bl 8001310 <d_template_args_1>
- 8000e98: 4652 mov r2, sl
- 8000e9a: 4603 mov r3, r0
- 8000e9c: 2104 movs r1, #4
- 8000e9e: 4620 mov r0, r4
- 8000ea0: f7ff f9ce bl 8000240 <d_make_comp>
- 8000ea4: 4682 mov sl, r0
- 8000ea6: e7ae b.n 8000e06 <d_exprlist+0x3f6>
- 8000ea8: 785a ldrb r2, [r3, #1]
- 8000eaa: 2a69 cmp r2, #105 ; 0x69
- 8000eac: f47f ae50 bne.w 8000b50 <d_exprlist+0x140>
- 8000eb0: 3302 adds r3, #2
- 8000eb2: 60e3 str r3, [r4, #12]
- 8000eb4: 2145 movs r1, #69 ; 0x45
- 8000eb6: 4620 mov r0, r4
- 8000eb8: f7ff fdaa bl 8000a10 <d_exprlist>
- 8000ebc: 4603 mov r3, r0
- 8000ebe: e738 b.n 8000d32 <d_exprlist+0x322>
- 8000ec0: 4620 mov r0, r4
- 8000ec2: f001 f837 bl 8001f34 <d_operator_name>
- 8000ec6: e7d3 b.n 8000e70 <d_exprlist+0x460>
- 8000ec8: 4620 mov r0, r4
- 8000eca: f000 f80f bl 8000eec <d_expression_1>
- 8000ece: 4682 mov sl, r0
- 8000ed0: e799 b.n 8000e06 <d_exprlist+0x3f6>
- 8000ed2: bf00 nop
- 8000ed4: 08012578 .word 0x08012578
- 8000ed8: 08012588 .word 0x08012588
- 8000edc: 0801257c .word 0x0801257c
- 8000ee0: 08012580 .word 0x08012580
- 8000ee4: 08012584 .word 0x08012584
- 8000ee8: 08012a94 .word 0x08012a94
-
-08000eec <d_expression_1>:
- 8000eec: 68c1 ldr r1, [r0, #12]
- 8000eee: 780b ldrb r3, [r1, #0]
- 8000ef0: 2b4c cmp r3, #76 ; 0x4c
- 8000ef2: d067 beq.n 8000fc4 <d_expression_1+0xd8>
- 8000ef4: 2b54 cmp r3, #84 ; 0x54
- 8000ef6: d067 beq.n 8000fc8 <d_expression_1+0xdc>
- 8000ef8: 2b73 cmp r3, #115 ; 0x73
- 8000efa: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
- 8000efe: 4604 mov r4, r0
- 8000f00: d01c beq.n 8000f3c <d_expression_1+0x50>
- 8000f02: 2b66 cmp r3, #102 ; 0x66
- 8000f04: d13d bne.n 8000f82 <d_expression_1+0x96>
- 8000f06: 784b ldrb r3, [r1, #1]
- 8000f08: 2b70 cmp r3, #112 ; 0x70
- 8000f0a: d11d bne.n 8000f48 <d_expression_1+0x5c>
- 8000f0c: 1c8b adds r3, r1, #2
- 8000f0e: 60c3 str r3, [r0, #12]
- 8000f10: 788b ldrb r3, [r1, #2]
- 8000f12: 2b54 cmp r3, #84 ; 0x54
- 8000f14: f040 809a bne.w 800104c <d_expression_1+0x160>
- 8000f18: 3103 adds r1, #3
- 8000f1a: 60c1 str r1, [r0, #12]
- 8000f1c: 2000 movs r0, #0
- 8000f1e: e9d4 3205 ldrd r3, r2, [r4, #20]
- 8000f22: 4293 cmp r3, r2
- 8000f24: da4a bge.n 8000fbc <d_expression_1+0xd0>
- 8000f26: 6921 ldr r1, [r4, #16]
- 8000f28: 011a lsls r2, r3, #4
- 8000f2a: 188d adds r5, r1, r2
- 8000f2c: 3301 adds r3, #1
- 8000f2e: 2700 movs r7, #0
- 8000f30: 2606 movs r6, #6
- 8000f32: 606f str r7, [r5, #4]
- 8000f34: 6163 str r3, [r4, #20]
- 8000f36: 548e strb r6, [r1, r2]
- 8000f38: 60a8 str r0, [r5, #8]
- 8000f3a: e02f b.n 8000f9c <d_expression_1+0xb0>
- 8000f3c: 784b ldrb r3, [r1, #1]
- 8000f3e: 2b72 cmp r3, #114 ; 0x72
- 8000f40: d06e beq.n 8001020 <d_expression_1+0x134>
- 8000f42: 2b70 cmp r3, #112 ; 0x70
- 8000f44: f000 8160 beq.w 8001208 <d_expression_1+0x31c>
- 8000f48: 4620 mov r0, r4
- 8000f4a: f000 fff3 bl 8001f34 <d_operator_name>
- 8000f4e: 4605 mov r5, r0
- 8000f50: b3a0 cbz r0, 8000fbc <d_expression_1+0xd0>
- 8000f52: 7803 ldrb r3, [r0, #0]
- 8000f54: 2b31 cmp r3, #49 ; 0x31
- 8000f56: d039 beq.n 8000fcc <d_expression_1+0xe0>
- 8000f58: 2b32 cmp r3, #50 ; 0x32
- 8000f5a: f000 8127 beq.w 80011ac <d_expression_1+0x2c0>
- 8000f5e: 2b33 cmp r3, #51 ; 0x33
- 8000f60: d12c bne.n 8000fbc <d_expression_1+0xd0>
- 8000f62: 68e3 ldr r3, [r4, #12]
- 8000f64: 781a ldrb r2, [r3, #0]
- 8000f66: 2a5f cmp r2, #95 ; 0x5f
- 8000f68: f000 8176 beq.w 8001258 <d_expression_1+0x36c>
- 8000f6c: 4620 mov r0, r4
- 8000f6e: f7ff ffbd bl 8000eec <d_expression_1>
- 8000f72: 4603 mov r3, r0
- 8000f74: 462a mov r2, r5
- 8000f76: 4620 mov r0, r4
- 8000f78: 2136 movs r1, #54 ; 0x36
- 8000f7a: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr}
- 8000f7e: f7ff b95f b.w 8000240 <d_make_comp>
- 8000f82: f1a3 0230 sub.w r2, r3, #48 ; 0x30
- 8000f86: 2a09 cmp r2, #9
- 8000f88: d841 bhi.n 800100e <d_expression_1+0x122>
- 8000f8a: 4620 mov r0, r4
- 8000f8c: f001 f97e bl 800228c <d_unqualified_name>
- 8000f90: 4605 mov r5, r0
- 8000f92: b198 cbz r0, 8000fbc <d_expression_1+0xd0>
- 8000f94: 68e3 ldr r3, [r4, #12]
- 8000f96: 781a ldrb r2, [r3, #0]
- 8000f98: 2a49 cmp r2, #73 ; 0x49
- 8000f9a: d02b beq.n 8000ff4 <d_expression_1+0x108>
- 8000f9c: 4628 mov r0, r5
- 8000f9e: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
- 8000fa2: 2b74 cmp r3, #116 ; 0x74
- 8000fa4: d1d0 bne.n 8000f48 <d_expression_1+0x5c>
- 8000fa6: 784b ldrb r3, [r1, #1]
- 8000fa8: 2b6c cmp r3, #108 ; 0x6c
- 8000faa: d1cd bne.n 8000f48 <d_expression_1+0x5c>
- 8000fac: f000 fbc8 bl 8001740 <d_type>
- 8000fb0: 68e1 ldr r1, [r4, #12]
- 8000fb2: 784b ldrb r3, [r1, #1]
- 8000fb4: 4605 mov r5, r0
- 8000fb6: 2b00 cmp r3, #0
- 8000fb8: f040 8190 bne.w 80012dc <d_expression_1+0x3f0>
- 8000fbc: 2500 movs r5, #0
- 8000fbe: 4628 mov r0, r5
- 8000fc0: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
- 8000fc4: f001 bdac b.w 8002b20 <d_expr_primary>
- 8000fc8: f7ff ba92 b.w 80004f0 <d_template_param>
- 8000fcc: 6887 ldr r7, [r0, #8]
- 8000fce: 6b23 ldr r3, [r4, #48] ; 0x30
- 8000fd0: 68ba ldr r2, [r7, #8]
- 8000fd2: 683e ldr r6, [r7, #0]
- 8000fd4: 49c8 ldr r1, [pc, #800] ; (80012f8 <d_expression_1+0x40c>)
- 8000fd6: 3a02 subs r2, #2
- 8000fd8: 4413 add r3, r2
- 8000fda: 6323 str r3, [r4, #48] ; 0x30
- 8000fdc: 4630 mov r0, r6
- 8000fde: f005 feef bl 8006dc0 <strcmp>
- 8000fe2: 2800 cmp r0, #0
- 8000fe4: d05b beq.n 800109e <d_expression_1+0x1b2>
- 8000fe6: 68ff ldr r7, [r7, #12]
- 8000fe8: 2f03 cmp r7, #3
- 8000fea: d8e7 bhi.n 8000fbc <d_expression_1+0xd0>
- 8000fec: e8df f007 tbb [pc, r7]
- 8000ff0: 64a7385c .word 0x64a7385c
- 8000ff4: 3301 adds r3, #1
- 8000ff6: 60e3 str r3, [r4, #12]
- 8000ff8: 4620 mov r0, r4
- 8000ffa: f000 f989 bl 8001310 <d_template_args_1>
- 8000ffe: 462a mov r2, r5
- 8001000: 4603 mov r3, r0
- 8001002: 2104 movs r1, #4
- 8001004: 4620 mov r0, r4
- 8001006: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr}
- 800100a: f7ff b919 b.w 8000240 <d_make_comp>
- 800100e: 2b6f cmp r3, #111 ; 0x6f
- 8001010: f040 815c bne.w 80012cc <d_expression_1+0x3e0>
- 8001014: 784b ldrb r3, [r1, #1]
- 8001016: 2b6e cmp r3, #110 ; 0x6e
- 8001018: d196 bne.n 8000f48 <d_expression_1+0x5c>
- 800101a: 3102 adds r1, #2
- 800101c: 60c1 str r1, [r0, #12]
- 800101e: e7b4 b.n 8000f8a <d_expression_1+0x9e>
- 8001020: 3102 adds r1, #2
- 8001022: 60c1 str r1, [r0, #12]
- 8001024: f000 fb8c bl 8001740 <d_type>
- 8001028: 4605 mov r5, r0
- 800102a: 4620 mov r0, r4
- 800102c: f001 f92e bl 800228c <d_unqualified_name>
- 8001030: 68e3 ldr r3, [r4, #12]
- 8001032: 7819 ldrb r1, [r3, #0]
- 8001034: 2949 cmp r1, #73 ; 0x49
- 8001036: 4606 mov r6, r0
- 8001038: f000 80d9 beq.w 80011ee <d_expression_1+0x302>
- 800103c: 4603 mov r3, r0
- 800103e: 462a mov r2, r5
- 8001040: 4620 mov r0, r4
- 8001042: 2101 movs r1, #1
- 8001044: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr}
- 8001048: f7ff b8fa b.w 8000240 <d_make_comp>
- 800104c: f7ff fa36 bl 80004bc <d_compact_number>
- 8001050: 43c3 mvns r3, r0
- 8001052: f033 4300 bics.w r3, r3, #2147483648 ; 0x80000000
- 8001056: bf18 it ne
- 8001058: 3001 addne r0, #1
- 800105a: f47f af60 bne.w 8000f1e <d_expression_1+0x32>
- 800105e: e7ad b.n 8000fbc <d_expression_1+0xd0>
- 8001060: 2e00 cmp r6, #0
- 8001062: d083 beq.n 8000f6c <d_expression_1+0x80>
- 8001064: 7833 ldrb r3, [r6, #0]
- 8001066: 2b70 cmp r3, #112 ; 0x70
- 8001068: f000 80b0 beq.w 80011cc <d_expression_1+0x2e0>
- 800106c: 2b6d cmp r3, #109 ; 0x6d
- 800106e: f000 80ad beq.w 80011cc <d_expression_1+0x2e0>
- 8001072: 2700 movs r7, #0
- 8001074: 4630 mov r0, r6
- 8001076: 49a1 ldr r1, [pc, #644] ; (80012fc <d_expression_1+0x410>)
- 8001078: f005 fea2 bl 8006dc0 <strcmp>
- 800107c: 2800 cmp r0, #0
- 800107e: f040 80b1 bne.w 80011e4 <d_expression_1+0x2f8>
- 8001082: 4620 mov r0, r4
- 8001084: f000 f944 bl 8001310 <d_template_args_1>
- 8001088: 4603 mov r3, r0
- 800108a: 2f00 cmp r7, #0
- 800108c: f43f af72 beq.w 8000f74 <d_expression_1+0x88>
- 8001090: 461a mov r2, r3
- 8001092: 2138 movs r1, #56 ; 0x38
- 8001094: 4620 mov r0, r4
- 8001096: f7ff f8d3 bl 8000240 <d_make_comp>
- 800109a: 4603 mov r3, r0
- 800109c: e76a b.n 8000f74 <d_expression_1+0x88>
- 800109e: 4620 mov r0, r4
- 80010a0: f000 fb4e bl 8001740 <d_type>
- 80010a4: 4603 mov r3, r0
- 80010a6: e765 b.n 8000f74 <d_expression_1+0x88>
- 80010a8: 462a mov r2, r5
- 80010aa: 4620 mov r0, r4
- 80010ac: 2300 movs r3, #0
- 80010ae: 2135 movs r1, #53 ; 0x35
- 80010b0: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr}
- 80010b4: f7ff b8c4 b.w 8000240 <d_make_comp>
- 80010b8: 4991 ldr r1, [pc, #580] ; (8001300 <d_expression_1+0x414>)
- 80010ba: 4630 mov r0, r6
- 80010bc: f005 fe80 bl 8006dc0 <strcmp>
- 80010c0: 2800 cmp r0, #0
- 80010c2: f000 80d1 beq.w 8001268 <d_expression_1+0x37c>
- 80010c6: 7833 ldrb r3, [r6, #0]
- 80010c8: 2b66 cmp r3, #102 ; 0x66
- 80010ca: f000 80f6 beq.w 80012ba <d_expression_1+0x3ce>
- 80010ce: 2b6e cmp r3, #110 ; 0x6e
- 80010d0: f47f af74 bne.w 8000fbc <d_expression_1+0xd0>
- 80010d4: 7873 ldrb r3, [r6, #1]
- 80010d6: 2b77 cmp r3, #119 ; 0x77
- 80010d8: d002 beq.n 80010e0 <d_expression_1+0x1f4>
- 80010da: 2b61 cmp r3, #97 ; 0x61
- 80010dc: f47f af6e bne.w 8000fbc <d_expression_1+0xd0>
- 80010e0: 215f movs r1, #95 ; 0x5f
- 80010e2: 4620 mov r0, r4
- 80010e4: f7ff fc94 bl 8000a10 <d_exprlist>
- 80010e8: 4606 mov r6, r0
- 80010ea: 4620 mov r0, r4
- 80010ec: f000 fb28 bl 8001740 <d_type>
- 80010f0: 68e3 ldr r3, [r4, #12]
- 80010f2: 7819 ldrb r1, [r3, #0]
- 80010f4: 2945 cmp r1, #69 ; 0x45
- 80010f6: 4607 mov r7, r0
- 80010f8: f000 80aa beq.w 8001250 <d_expression_1+0x364>
- 80010fc: 2970 cmp r1, #112 ; 0x70
- 80010fe: f000 80d0 beq.w 80012a2 <d_expression_1+0x3b6>
- 8001102: 2969 cmp r1, #105 ; 0x69
- 8001104: f47f af5a bne.w 8000fbc <d_expression_1+0xd0>
- 8001108: 785b ldrb r3, [r3, #1]
- 800110a: 2b6c cmp r3, #108 ; 0x6c
- 800110c: f47f af56 bne.w 8000fbc <d_expression_1+0xd0>
- 8001110: 4620 mov r0, r4
- 8001112: f7ff feeb bl 8000eec <d_expression_1>
- 8001116: 4603 mov r3, r0
- 8001118: 463a mov r2, r7
- 800111a: 213b movs r1, #59 ; 0x3b
- 800111c: 4620 mov r0, r4
- 800111e: f7ff f88f bl 8000240 <d_make_comp>
- 8001122: 4632 mov r2, r6
- 8001124: 4603 mov r3, r0
- 8001126: 213a movs r1, #58 ; 0x3a
- 8001128: 4620 mov r0, r4
- 800112a: f7ff f889 bl 8000240 <d_make_comp>
- 800112e: 462a mov r2, r5
- 8001130: 4603 mov r3, r0
- 8001132: 2139 movs r1, #57 ; 0x39
- 8001134: 4620 mov r0, r4
- 8001136: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr}
- 800113a: f7ff b881 b.w 8000240 <d_make_comp>
- 800113e: 2e00 cmp r6, #0
- 8001140: f43f af3c beq.w 8000fbc <d_expression_1+0xd0>
- 8001144: 68ab ldr r3, [r5, #8]
- 8001146: 681b ldr r3, [r3, #0]
- 8001148: 785a ldrb r2, [r3, #1]
- 800114a: 2a63 cmp r2, #99 ; 0x63
- 800114c: d068 beq.n 8001220 <d_expression_1+0x334>
- 800114e: 7833 ldrb r3, [r6, #0]
- 8001150: 2b66 cmp r3, #102 ; 0x66
- 8001152: d178 bne.n 8001246 <d_expression_1+0x35a>
- 8001154: 4620 mov r0, r4
- 8001156: f000 feed bl 8001f34 <d_operator_name>
- 800115a: 4607 mov r7, r0
- 800115c: 4969 ldr r1, [pc, #420] ; (8001304 <d_expression_1+0x418>)
- 800115e: 4630 mov r0, r6
- 8001160: f005 fe2e bl 8006dc0 <strcmp>
- 8001164: 2800 cmp r0, #0
- 8001166: d068 beq.n 800123a <d_expression_1+0x34e>
- 8001168: 4967 ldr r1, [pc, #412] ; (8001308 <d_expression_1+0x41c>)
- 800116a: 4630 mov r0, r6
- 800116c: f005 fe28 bl 8006dc0 <strcmp>
- 8001170: b130 cbz r0, 8001180 <d_expression_1+0x294>
- 8001172: 4630 mov r0, r6
- 8001174: 4965 ldr r1, [pc, #404] ; (800130c <d_expression_1+0x420>)
- 8001176: f005 fe23 bl 8006dc0 <strcmp>
- 800117a: 2800 cmp r0, #0
- 800117c: f040 80a1 bne.w 80012c2 <d_expression_1+0x3d6>
- 8001180: 4620 mov r0, r4
- 8001182: f001 f883 bl 800228c <d_unqualified_name>
- 8001186: 68e3 ldr r3, [r4, #12]
- 8001188: 781a ldrb r2, [r3, #0]
- 800118a: 2a49 cmp r2, #73 ; 0x49
- 800118c: 4606 mov r6, r0
- 800118e: d07b beq.n 8001288 <d_expression_1+0x39c>
- 8001190: 4633 mov r3, r6
- 8001192: 463a mov r2, r7
- 8001194: 2138 movs r1, #56 ; 0x38
- 8001196: 4620 mov r0, r4
- 8001198: f7ff f852 bl 8000240 <d_make_comp>
- 800119c: 462a mov r2, r5
- 800119e: 4603 mov r3, r0
- 80011a0: 2137 movs r1, #55 ; 0x37
- 80011a2: 4620 mov r0, r4
- 80011a4: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr}
- 80011a8: f7ff b84a b.w 8000240 <d_make_comp>
- 80011ac: 6883 ldr r3, [r0, #8]
- 80011ae: 2b03 cmp r3, #3
- 80011b0: f63f af04 bhi.w 8000fbc <d_expression_1+0xd0>
- 80011b4: a201 add r2, pc, #4 ; (adr r2, 80011bc <d_expression_1+0x2d0>)
- 80011b6: f852 f023 ldr.w pc, [r2, r3, lsl #2]
- 80011ba: bf00 nop
- 80011bc: 080010a9 .word 0x080010a9
- 80011c0: 08000f6d .word 0x08000f6d
- 80011c4: 08000fbd .word 0x08000fbd
- 80011c8: 08000fbd .word 0x08000fbd
- 80011cc: 7872 ldrb r2, [r6, #1]
- 80011ce: 429a cmp r2, r3
- 80011d0: f47f af4f bne.w 8001072 <d_expression_1+0x186>
- 80011d4: 68e3 ldr r3, [r4, #12]
- 80011d6: 781a ldrb r2, [r3, #0]
- 80011d8: 2a5f cmp r2, #95 ; 0x5f
- 80011da: f47f af4b bne.w 8001074 <d_expression_1+0x188>
- 80011de: 3301 adds r3, #1
- 80011e0: 60e3 str r3, [r4, #12]
- 80011e2: e746 b.n 8001072 <d_expression_1+0x186>
- 80011e4: 4620 mov r0, r4
- 80011e6: f7ff fe81 bl 8000eec <d_expression_1>
- 80011ea: 4603 mov r3, r0
- 80011ec: e74d b.n 800108a <d_expression_1+0x19e>
- 80011ee: 3301 adds r3, #1
- 80011f0: 60e3 str r3, [r4, #12]
- 80011f2: 4620 mov r0, r4
- 80011f4: f000 f88c bl 8001310 <d_template_args_1>
- 80011f8: 4632 mov r2, r6
- 80011fa: 4603 mov r3, r0
- 80011fc: 2104 movs r1, #4
- 80011fe: 4620 mov r0, r4
- 8001200: f7ff f81e bl 8000240 <d_make_comp>
- 8001204: 4603 mov r3, r0
- 8001206: e71a b.n 800103e <d_expression_1+0x152>
- 8001208: 3102 adds r1, #2
- 800120a: 60e1 str r1, [r4, #12]
- 800120c: f7ff fe6e bl 8000eec <d_expression_1>
- 8001210: 2300 movs r3, #0
- 8001212: 4602 mov r2, r0
- 8001214: 214a movs r1, #74 ; 0x4a
- 8001216: 4620 mov r0, r4
- 8001218: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr}
- 800121c: f7ff b810 b.w 8000240 <d_make_comp>
- 8001220: 781b ldrb r3, [r3, #0]
- 8001222: f1a3 0263 sub.w r2, r3, #99 ; 0x63
- 8001226: 2a01 cmp r2, #1
- 8001228: d902 bls.n 8001230 <d_expression_1+0x344>
- 800122a: 3b72 subs r3, #114 ; 0x72
- 800122c: 2b01 cmp r3, #1
- 800122e: d88e bhi.n 800114e <d_expression_1+0x262>
- 8001230: 4620 mov r0, r4
- 8001232: f000 fa85 bl 8001740 <d_type>
- 8001236: 4607 mov r7, r0
- 8001238: e790 b.n 800115c <d_expression_1+0x270>
- 800123a: 2145 movs r1, #69 ; 0x45
- 800123c: 4620 mov r0, r4
- 800123e: f7ff fbe7 bl 8000a10 <d_exprlist>
- 8001242: 4606 mov r6, r0
- 8001244: e7a4 b.n 8001190 <d_expression_1+0x2a4>
- 8001246: 4620 mov r0, r4
- 8001248: f7ff fe50 bl 8000eec <d_expression_1>
- 800124c: 4607 mov r7, r0
- 800124e: e785 b.n 800115c <d_expression_1+0x270>
- 8001250: 3301 adds r3, #1
- 8001252: 60e3 str r3, [r4, #12]
- 8001254: 2300 movs r3, #0
- 8001256: e75f b.n 8001118 <d_expression_1+0x22c>
- 8001258: 3301 adds r3, #1
- 800125a: 60e3 str r3, [r4, #12]
- 800125c: 2145 movs r1, #69 ; 0x45
- 800125e: 4620 mov r0, r4
- 8001260: f7ff fbd6 bl 8000a10 <d_exprlist>
- 8001264: 4603 mov r3, r0
- 8001266: e685 b.n 8000f74 <d_expression_1+0x88>
- 8001268: 4620 mov r0, r4
- 800126a: f7ff fe3f bl 8000eec <d_expression_1>
- 800126e: 4606 mov r6, r0
- 8001270: 4620 mov r0, r4
- 8001272: f7ff fe3b bl 8000eec <d_expression_1>
- 8001276: 4607 mov r7, r0
- 8001278: 4620 mov r0, r4
- 800127a: f7ff fe37 bl 8000eec <d_expression_1>
- 800127e: 4603 mov r3, r0
- 8001280: 2800 cmp r0, #0
- 8001282: f47f af49 bne.w 8001118 <d_expression_1+0x22c>
- 8001286: e699 b.n 8000fbc <d_expression_1+0xd0>
- 8001288: 3301 adds r3, #1
- 800128a: 60e3 str r3, [r4, #12]
- 800128c: 4620 mov r0, r4
- 800128e: f000 f83f bl 8001310 <d_template_args_1>
- 8001292: 4632 mov r2, r6
- 8001294: 4603 mov r3, r0
- 8001296: 2104 movs r1, #4
- 8001298: 4620 mov r0, r4
- 800129a: f7fe ffd1 bl 8000240 <d_make_comp>
- 800129e: 4606 mov r6, r0
- 80012a0: e776 b.n 8001190 <d_expression_1+0x2a4>
- 80012a2: 785a ldrb r2, [r3, #1]
- 80012a4: 2a69 cmp r2, #105 ; 0x69
- 80012a6: f47f ae89 bne.w 8000fbc <d_expression_1+0xd0>
- 80012aa: 3302 adds r3, #2
- 80012ac: 60e3 str r3, [r4, #12]
- 80012ae: 2145 movs r1, #69 ; 0x45
- 80012b0: 4620 mov r0, r4
- 80012b2: f7ff fbad bl 8000a10 <d_exprlist>
- 80012b6: 4603 mov r3, r0
- 80012b8: e72e b.n 8001118 <d_expression_1+0x22c>
- 80012ba: 4620 mov r0, r4
- 80012bc: f000 fe3a bl 8001f34 <d_operator_name>
- 80012c0: e7d5 b.n 800126e <d_expression_1+0x382>
- 80012c2: 4620 mov r0, r4
- 80012c4: f7ff fe12 bl 8000eec <d_expression_1>
- 80012c8: 4606 mov r6, r0
- 80012ca: e761 b.n 8001190 <d_expression_1+0x2a4>
- 80012cc: 2b69 cmp r3, #105 ; 0x69
- 80012ce: f47f ae68 bne.w 8000fa2 <d_expression_1+0xb6>
- 80012d2: 784b ldrb r3, [r1, #1]
- 80012d4: 2b6c cmp r3, #108 ; 0x6c
- 80012d6: f47f ae37 bne.w 8000f48 <d_expression_1+0x5c>
- 80012da: 2500 movs r5, #0
- 80012dc: 3102 adds r1, #2
- 80012de: 60e1 str r1, [r4, #12]
- 80012e0: 4620 mov r0, r4
- 80012e2: 2145 movs r1, #69 ; 0x45
- 80012e4: f7ff fb94 bl 8000a10 <d_exprlist>
- 80012e8: 462a mov r2, r5
- 80012ea: 4603 mov r3, r0
- 80012ec: 2130 movs r1, #48 ; 0x30
- 80012ee: 4620 mov r0, r4
- 80012f0: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr}
- 80012f4: f7fe bfa4 b.w 8000240 <d_make_comp>
- 80012f8: 08012a94 .word 0x08012a94
- 80012fc: 08012578 .word 0x08012578
- 8001300: 08012588 .word 0x08012588
- 8001304: 0801257c .word 0x0801257c
- 8001308: 08012580 .word 0x08012580
- 800130c: 08012584 .word 0x08012584
-
-08001310 <d_template_args_1>:
- 8001310: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
- 8001314: 68c2 ldr r2, [r0, #12]
- 8001316: 6ac7 ldr r7, [r0, #44] ; 0x2c
- 8001318: 7813 ldrb r3, [r2, #0]
- 800131a: 2b45 cmp r3, #69 ; 0x45
- 800131c: b082 sub sp, #8
- 800131e: 4604 mov r4, r0
- 8001320: d04e beq.n 80013c0 <d_template_args_1+0xb0>
- 8001322: ad02 add r5, sp, #8
- 8001324: 2100 movs r1, #0
- 8001326: f845 1d04 str.w r1, [r5, #-4]!
- 800132a: 2601 movs r6, #1
- 800132c: 3b49 subs r3, #73 ; 0x49
- 800132e: 2b0f cmp r3, #15
- 8001330: d83d bhi.n 80013ae <d_template_args_1+0x9e>
- 8001332: e8df f003 tbb [pc, r3]
- 8001336: 3737 .short 0x3737
- 8001338: 3c3c323c .word 0x3c3c323c
- 800133c: 3c3c3c3c .word 0x3c3c3c3c
- 8001340: 3c3c3c3c .word 0x3c3c3c3c
- 8001344: 083c .short 0x083c
- 8001346: 3201 adds r2, #1
- 8001348: f8d4 8034 ldr.w r8, [r4, #52] ; 0x34
- 800134c: 60e2 str r2, [r4, #12]
- 800134e: 6366 str r6, [r4, #52] ; 0x34
- 8001350: 4620 mov r0, r4
- 8001352: f7ff fdcb bl 8000eec <d_expression_1>
- 8001356: 68e3 ldr r3, [r4, #12]
- 8001358: f8c4 8034 str.w r8, [r4, #52] ; 0x34
- 800135c: 781a ldrb r2, [r3, #0]
- 800135e: 2a45 cmp r2, #69 ; 0x45
- 8001360: 4684 mov ip, r0
- 8001362: f103 0301 add.w r3, r3, #1
- 8001366: d127 bne.n 80013b8 <d_template_args_1+0xa8>
- 8001368: 60e3 str r3, [r4, #12]
- 800136a: 2300 movs r3, #0
- 800136c: 212f movs r1, #47 ; 0x2f
- 800136e: 4662 mov r2, ip
- 8001370: 4620 mov r0, r4
- 8001372: f1bc 0f00 cmp.w ip, #0
- 8001376: d01f beq.n 80013b8 <d_template_args_1+0xa8>
- 8001378: f7fe ff62 bl 8000240 <d_make_comp>
- 800137c: 6028 str r0, [r5, #0]
- 800137e: f100 050c add.w r5, r0, #12
- 8001382: b1c8 cbz r0, 80013b8 <d_template_args_1+0xa8>
- 8001384: 68e2 ldr r2, [r4, #12]
- 8001386: 7813 ldrb r3, [r2, #0]
- 8001388: 2b45 cmp r3, #69 ; 0x45
- 800138a: d1cf bne.n 800132c <d_template_args_1+0x1c>
- 800138c: 9801 ldr r0, [sp, #4]
- 800138e: 62e7 str r7, [r4, #44] ; 0x2c
- 8001390: 3201 adds r2, #1
- 8001392: 60e2 str r2, [r4, #12]
- 8001394: b002 add sp, #8
- 8001396: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
- 800139a: 4620 mov r0, r4
- 800139c: f001 fbc0 bl 8002b20 <d_expr_primary>
- 80013a0: 4684 mov ip, r0
- 80013a2: e7e2 b.n 800136a <d_template_args_1+0x5a>
- 80013a4: 4620 mov r0, r4
- 80013a6: f000 f815 bl 80013d4 <d_template_args>
- 80013aa: 4684 mov ip, r0
- 80013ac: e7dd b.n 800136a <d_template_args_1+0x5a>
- 80013ae: 4620 mov r0, r4
- 80013b0: f000 f9c6 bl 8001740 <d_type>
- 80013b4: 4684 mov ip, r0
- 80013b6: e7d8 b.n 800136a <d_template_args_1+0x5a>
- 80013b8: 2000 movs r0, #0
- 80013ba: b002 add sp, #8
- 80013bc: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
- 80013c0: 3201 adds r2, #1
- 80013c2: 2300 movs r3, #0
- 80013c4: 60c2 str r2, [r0, #12]
- 80013c6: 212f movs r1, #47 ; 0x2f
- 80013c8: 461a mov r2, r3
- 80013ca: b002 add sp, #8
- 80013cc: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr}
- 80013d0: f7fe bf36 b.w 8000240 <d_make_comp>
-
-080013d4 <d_template_args>:
- 80013d4: 68c3 ldr r3, [r0, #12]
- 80013d6: 781a ldrb r2, [r3, #0]
- 80013d8: 3a49 subs r2, #73 ; 0x49
- 80013da: 2a01 cmp r2, #1
- 80013dc: d802 bhi.n 80013e4 <d_template_args+0x10>
- 80013de: 3301 adds r3, #1
- 80013e0: 60c3 str r3, [r0, #12]
- 80013e2: e795 b.n 8001310 <d_template_args_1>
- 80013e4: 2000 movs r0, #0
- 80013e6: 4770 bx lr
-
-080013e8 <d_name>:
- 80013e8: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr}
- 80013ec: 68c2 ldr r2, [r0, #12]
- 80013ee: 7813 ldrb r3, [r2, #0]
- 80013f0: 3b4e subs r3, #78 ; 0x4e
- 80013f2: b083 sub sp, #12
- 80013f4: 4604 mov r4, r0
- 80013f6: 2b0c cmp r3, #12
- 80013f8: d846 bhi.n 8001488 <d_name+0xa0>
- 80013fa: e8df f003 tbb [pc, r3]
- 80013fe: 4567 .short 0x4567
- 8001400: 0e454545 .word 0x0e454545
- 8001404: 45450745 .word 0x45450745
- 8001408: 4545 .short 0x4545
- 800140a: a4 .byte 0xa4
- 800140b: 00 .byte 0x00
- 800140c: f000 ff3e bl 800228c <d_unqualified_name>
- 8001410: 4605 mov r5, r0
- 8001412: 4628 mov r0, r5
- 8001414: b003 add sp, #12
- 8001416: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc}
- 800141a: 7853 ldrb r3, [r2, #1]
- 800141c: 2b74 cmp r3, #116 ; 0x74
- 800141e: f040 80d7 bne.w 80015d0 <d_name+0x1e8>
- 8001422: e9d0 3105 ldrd r3, r1, [r0, #20]
- 8001426: 3202 adds r2, #2
- 8001428: 428b cmp r3, r1
- 800142a: 60c2 str r2, [r0, #12]
- 800142c: f280 8127 bge.w 800167e <d_name+0x296>
- 8001430: 6901 ldr r1, [r0, #16]
- 8001432: 48c0 ldr r0, [pc, #768] ; (8001734 <d_name+0x34c>)
- 8001434: 011a lsls r2, r3, #4
- 8001436: 188d adds r5, r1, r2
- 8001438: 3301 adds r3, #1
- 800143a: 6163 str r3, [r4, #20]
- 800143c: 2300 movs r3, #0
- 800143e: 606b str r3, [r5, #4]
- 8001440: 548b strb r3, [r1, r2]
- 8001442: 2303 movs r3, #3
- 8001444: e9c5 0302 strd r0, r3, [r5, #8]
- 8001448: 4620 mov r0, r4
- 800144a: f000 ff1f bl 800228c <d_unqualified_name>
- 800144e: 462a mov r2, r5
- 8001450: 4603 mov r3, r0
- 8001452: 2101 movs r1, #1
- 8001454: 4620 mov r0, r4
- 8001456: f7fe fef3 bl 8000240 <d_make_comp>
- 800145a: 6b23 ldr r3, [r4, #48] ; 0x30
- 800145c: 68e2 ldr r2, [r4, #12]
- 800145e: 3303 adds r3, #3
- 8001460: 6323 str r3, [r4, #48] ; 0x30
- 8001462: 7813 ldrb r3, [r2, #0]
- 8001464: 2b49 cmp r3, #73 ; 0x49
- 8001466: 4605 mov r5, r0
- 8001468: d1d3 bne.n 8001412 <d_name+0x2a>
- 800146a: 2800 cmp r0, #0
- 800146c: f000 80ba beq.w 80015e4 <d_name+0x1fc>
- 8001470: e9d4 3208 ldrd r3, r2, [r4, #32]
- 8001474: 4293 cmp r3, r2
- 8001476: f280 80b5 bge.w 80015e4 <d_name+0x1fc>
- 800147a: 69e1 ldr r1, [r4, #28]
- 800147c: 1c5a adds r2, r3, #1
- 800147e: f841 0023 str.w r0, [r1, r3, lsl #2]
- 8001482: 6222 str r2, [r4, #32]
- 8001484: 4620 mov r0, r4
- 8001486: e014 b.n 80014b2 <d_name+0xca>
- 8001488: f000 ff00 bl 800228c <d_unqualified_name>
- 800148c: 68e3 ldr r3, [r4, #12]
- 800148e: 781b ldrb r3, [r3, #0]
- 8001490: 2b49 cmp r3, #73 ; 0x49
- 8001492: 4605 mov r5, r0
- 8001494: d1bd bne.n 8001412 <d_name+0x2a>
- 8001496: 2800 cmp r0, #0
- 8001498: f000 80a4 beq.w 80015e4 <d_name+0x1fc>
- 800149c: e9d4 3208 ldrd r3, r2, [r4, #32]
- 80014a0: 4293 cmp r3, r2
- 80014a2: f280 809f bge.w 80015e4 <d_name+0x1fc>
- 80014a6: 69e1 ldr r1, [r4, #28]
- 80014a8: 1c5a adds r2, r3, #1
- 80014aa: f841 0023 str.w r0, [r1, r3, lsl #2]
- 80014ae: 4620 mov r0, r4
- 80014b0: 6222 str r2, [r4, #32]
- 80014b2: f7ff ff8f bl 80013d4 <d_template_args>
- 80014b6: 462a mov r2, r5
- 80014b8: 4603 mov r3, r0
- 80014ba: 2104 movs r1, #4
- 80014bc: 4620 mov r0, r4
- 80014be: f7fe febf bl 8000240 <d_make_comp>
- 80014c2: 4605 mov r5, r0
- 80014c4: 4628 mov r0, r5
- 80014c6: b003 add sp, #12
- 80014c8: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc}
- 80014cc: 3201 adds r2, #1
- 80014ce: 60c2 str r2, [r0, #12]
- 80014d0: a901 add r1, sp, #4
- 80014d2: 2201 movs r2, #1
- 80014d4: f000 fde6 bl 80020a4 <d_cv_qualifiers>
- 80014d8: 4680 mov r8, r0
- 80014da: 2800 cmp r0, #0
- 80014dc: f000 8082 beq.w 80015e4 <d_name+0x1fc>
- 80014e0: 2100 movs r1, #0
- 80014e2: 4620 mov r0, r4
- 80014e4: f7fe fef4 bl 80002d0 <d_ref_qualifier>
- 80014e8: 68e2 ldr r2, [r4, #12]
- 80014ea: 4e93 ldr r6, [pc, #588] ; (8001738 <d_name+0x350>)
- 80014ec: 7815 ldrb r5, [r2, #0]
- 80014ee: 4681 mov r9, r0
- 80014f0: 2700 movs r7, #0
- 80014f2: 2d00 cmp r5, #0
- 80014f4: f000 80b3 beq.w 800165e <d_name+0x276>
- 80014f8: 2d44 cmp r5, #68 ; 0x44
- 80014fa: f000 8096 beq.w 800162a <d_name+0x242>
- 80014fe: f1a5 0330 sub.w r3, r5, #48 ; 0x30
- 8001502: b2db uxtb r3, r3
- 8001504: 2b1c cmp r3, #28
- 8001506: d96f bls.n 80015e8 <d_name+0x200>
- 8001508: f1a5 0361 sub.w r3, r5, #97 ; 0x61
- 800150c: b2db uxtb r3, r3
- 800150e: 2b19 cmp r3, #25
- 8001510: d96e bls.n 80015f0 <d_name+0x208>
- 8001512: 2d55 cmp r5, #85 ; 0x55
- 8001514: f000 80a1 beq.w 800165a <d_name+0x272>
- 8001518: 2d53 cmp r5, #83 ; 0x53
- 800151a: f000 80b2 beq.w 8001682 <d_name+0x29a>
- 800151e: 2d49 cmp r5, #73 ; 0x49
- 8001520: f000 80a4 beq.w 800166c <d_name+0x284>
- 8001524: 2d54 cmp r5, #84 ; 0x54
- 8001526: f000 80e6 beq.w 80016f6 <d_name+0x30e>
- 800152a: 2d45 cmp r5, #69 ; 0x45
- 800152c: f000 80e9 beq.w 8001702 <d_name+0x31a>
- 8001530: 2d4d cmp r5, #77 ; 0x4d
- 8001532: f040 8094 bne.w 800165e <d_name+0x276>
- 8001536: 2f00 cmp r7, #0
- 8001538: f000 8091 beq.w 800165e <d_name+0x276>
- 800153c: 1c53 adds r3, r2, #1
- 800153e: 60e3 str r3, [r4, #12]
- 8001540: 7855 ldrb r5, [r2, #1]
- 8001542: 461a mov r2, r3
- 8001544: e7d5 b.n 80014f2 <d_name+0x10a>
- 8001546: 3201 adds r2, #1
- 8001548: 60c2 str r2, [r0, #12]
- 800154a: 2100 movs r1, #0
- 800154c: f001 f83a bl 80025c4 <d_encoding>
- 8001550: 68e3 ldr r3, [r4, #12]
- 8001552: 781a ldrb r2, [r3, #0]
- 8001554: 2a45 cmp r2, #69 ; 0x45
- 8001556: 4606 mov r6, r0
- 8001558: d144 bne.n 80015e4 <d_name+0x1fc>
- 800155a: 1c5a adds r2, r3, #1
- 800155c: 60e2 str r2, [r4, #12]
- 800155e: 785a ldrb r2, [r3, #1]
- 8001560: 2a73 cmp r2, #115 ; 0x73
- 8001562: f000 80b0 beq.w 80016c6 <d_name+0x2de>
- 8001566: 2a64 cmp r2, #100 ; 0x64
- 8001568: f000 8095 beq.w 8001696 <d_name+0x2ae>
- 800156c: 4620 mov r0, r4
- 800156e: f7ff ff3b bl 80013e8 <d_name>
- 8001572: 4605 mov r5, r0
- 8001574: b308 cbz r0, 80015ba <d_name+0x1d2>
- 8001576: 7803 ldrb r3, [r0, #0]
- 8001578: 2b45 cmp r3, #69 ; 0x45
- 800157a: d01e beq.n 80015ba <d_name+0x1d2>
- 800157c: 2b47 cmp r3, #71 ; 0x47
- 800157e: d01c beq.n 80015ba <d_name+0x1d2>
- 8001580: f04f 37ff mov.w r7, #4294967295 ; 0xffffffff
- 8001584: 4620 mov r0, r4
- 8001586: f7ff f903 bl 8000790 <d_discriminator>
- 800158a: b358 cbz r0, 80015e4 <d_name+0x1fc>
- 800158c: 1c7b adds r3, r7, #1
- 800158e: d014 beq.n 80015ba <d_name+0x1d2>
- 8001590: e9d4 3205 ldrd r3, r2, [r4, #20]
- 8001594: 4293 cmp r3, r2
- 8001596: f280 8094 bge.w 80016c2 <d_name+0x2da>
- 800159a: 6920 ldr r0, [r4, #16]
- 800159c: 0119 lsls r1, r3, #4
- 800159e: 1842 adds r2, r0, r1
- 80015a0: 3301 adds r3, #1
- 80015a2: f04f 0e00 mov.w lr, #0
- 80015a6: f04f 0c46 mov.w ip, #70 ; 0x46
- 80015aa: f8c2 e004 str.w lr, [r2, #4]
- 80015ae: 6163 str r3, [r4, #20]
- 80015b0: f800 c001 strb.w ip, [r0, r1]
- 80015b4: e9c2 5702 strd r5, r7, [r2, #8]
- 80015b8: 4615 mov r5, r2
- 80015ba: 462b mov r3, r5
- 80015bc: 4632 mov r2, r6
- 80015be: 4620 mov r0, r4
- 80015c0: 2102 movs r1, #2
- 80015c2: f7fe fe3d bl 8000240 <d_make_comp>
- 80015c6: 4605 mov r5, r0
- 80015c8: 4628 mov r0, r5
- 80015ca: b003 add sp, #12
- 80015cc: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc}
- 80015d0: 2100 movs r1, #0
- 80015d2: f7ff f825 bl 8000620 <d_substitution>
- 80015d6: 68e3 ldr r3, [r4, #12]
- 80015d8: 781b ldrb r3, [r3, #0]
- 80015da: 2b49 cmp r3, #73 ; 0x49
- 80015dc: 4605 mov r5, r0
- 80015de: f47f af18 bne.w 8001412 <d_name+0x2a>
- 80015e2: e74f b.n 8001484 <d_name+0x9c>
- 80015e4: 2500 movs r5, #0
- 80015e6: e714 b.n 8001412 <d_name+0x2a>
- 80015e8: fa26 f303 lsr.w r3, r6, r3
- 80015ec: 07d9 lsls r1, r3, #31
- 80015ee: d58b bpl.n 8001508 <d_name+0x120>
- 80015f0: 4620 mov r0, r4
- 80015f2: f000 fe4b bl 800228c <d_unqualified_name>
- 80015f6: b35f cbz r7, 8001650 <d_name+0x268>
- 80015f8: 2101 movs r1, #1
- 80015fa: 4603 mov r3, r0
- 80015fc: 463a mov r2, r7
- 80015fe: 4620 mov r0, r4
- 8001600: f7fe fe1e bl 8000240 <d_make_comp>
- 8001604: 4607 mov r7, r0
- 8001606: 68e2 ldr r2, [r4, #12]
- 8001608: 2d53 cmp r5, #83 ; 0x53
- 800160a: 7813 ldrb r3, [r2, #0]
- 800160c: d01e beq.n 800164c <d_name+0x264>
- 800160e: 2b45 cmp r3, #69 ; 0x45
- 8001610: d01a beq.n 8001648 <d_name+0x260>
- 8001612: b327 cbz r7, 800165e <d_name+0x276>
- 8001614: e9d4 3108 ldrd r3, r1, [r4, #32]
- 8001618: 428b cmp r3, r1
- 800161a: da20 bge.n 800165e <d_name+0x276>
- 800161c: 69e1 ldr r1, [r4, #28]
- 800161e: f841 7023 str.w r7, [r1, r3, lsl #2]
- 8001622: 3301 adds r3, #1
- 8001624: 6223 str r3, [r4, #32]
- 8001626: 7815 ldrb r5, [r2, #0]
- 8001628: e763 b.n 80014f2 <d_name+0x10a>
- 800162a: 7853 ldrb r3, [r2, #1]
- 800162c: f003 03df and.w r3, r3, #223 ; 0xdf
- 8001630: 2b54 cmp r3, #84 ; 0x54
- 8001632: 4620 mov r0, r4
- 8001634: d00e beq.n 8001654 <d_name+0x26c>
- 8001636: f000 fe29 bl 800228c <d_unqualified_name>
- 800163a: 2f00 cmp r7, #0
- 800163c: d1dc bne.n 80015f8 <d_name+0x210>
- 800163e: 68e2 ldr r2, [r4, #12]
- 8001640: 7813 ldrb r3, [r2, #0]
- 8001642: 2b45 cmp r3, #69 ; 0x45
- 8001644: 4607 mov r7, r0
- 8001646: d1e4 bne.n 8001612 <d_name+0x22a>
- 8001648: 461d mov r5, r3
- 800164a: e758 b.n 80014fe <d_name+0x116>
- 800164c: 461d mov r5, r3
- 800164e: e750 b.n 80014f2 <d_name+0x10a>
- 8001650: 4607 mov r7, r0
- 8001652: e7d8 b.n 8001606 <d_name+0x21e>
- 8001654: f000 f874 bl 8001740 <d_type>
- 8001658: e7ef b.n 800163a <d_name+0x252>
- 800165a: 4620 mov r0, r4
- 800165c: e7eb b.n 8001636 <d_name+0x24e>
- 800165e: 2500 movs r5, #0
- 8001660: 4628 mov r0, r5
- 8001662: f8c8 5000 str.w r5, [r8]
- 8001666: b003 add sp, #12
- 8001668: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc}
- 800166c: 2f00 cmp r7, #0
- 800166e: d0f6 beq.n 800165e <d_name+0x276>
- 8001670: 3201 adds r2, #1
- 8001672: 60e2 str r2, [r4, #12]
- 8001674: 4620 mov r0, r4
- 8001676: f7ff fe4b bl 8001310 <d_template_args_1>
- 800167a: 2104 movs r1, #4
- 800167c: e7bd b.n 80015fa <d_name+0x212>
- 800167e: 2500 movs r5, #0
- 8001680: e6e2 b.n 8001448 <d_name+0x60>
- 8001682: 2101 movs r1, #1
- 8001684: 4620 mov r0, r4
- 8001686: f7fe ffcb bl 8000620 <d_substitution>
- 800168a: 2f00 cmp r7, #0
- 800168c: d1b4 bne.n 80015f8 <d_name+0x210>
- 800168e: 68e2 ldr r2, [r4, #12]
- 8001690: 4607 mov r7, r0
- 8001692: 7815 ldrb r5, [r2, #0]
- 8001694: e72d b.n 80014f2 <d_name+0x10a>
- 8001696: 3302 adds r3, #2
- 8001698: 60e3 str r3, [r4, #12]
- 800169a: 4620 mov r0, r4
- 800169c: f7fe ff0e bl 80004bc <d_compact_number>
- 80016a0: 1e07 subs r7, r0, #0
- 80016a2: db9f blt.n 80015e4 <d_name+0x1fc>
- 80016a4: 4620 mov r0, r4
- 80016a6: f7ff fe9f bl 80013e8 <d_name>
- 80016aa: 4605 mov r5, r0
- 80016ac: 2800 cmp r0, #0
- 80016ae: f43f af6f beq.w 8001590 <d_name+0x1a8>
- 80016b2: 7803 ldrb r3, [r0, #0]
- 80016b4: 2b45 cmp r3, #69 ; 0x45
- 80016b6: f43f af69 beq.w 800158c <d_name+0x1a4>
- 80016ba: 2b47 cmp r3, #71 ; 0x47
- 80016bc: f43f af66 beq.w 800158c <d_name+0x1a4>
- 80016c0: e760 b.n 8001584 <d_name+0x19c>
- 80016c2: 2500 movs r5, #0
- 80016c4: e779 b.n 80015ba <d_name+0x1d2>
- 80016c6: 3302 adds r3, #2
- 80016c8: 60e3 str r3, [r4, #12]
- 80016ca: 4620 mov r0, r4
- 80016cc: f7ff f860 bl 8000790 <d_discriminator>
- 80016d0: 2800 cmp r0, #0
- 80016d2: d087 beq.n 80015e4 <d_name+0x1fc>
- 80016d4: e9d4 2305 ldrd r2, r3, [r4, #20]
- 80016d8: 429a cmp r2, r3
- 80016da: da10 bge.n 80016fe <d_name+0x316>
- 80016dc: 6920 ldr r0, [r4, #16]
- 80016de: 4d17 ldr r5, [pc, #92] ; (800173c <d_name+0x354>)
- 80016e0: 0111 lsls r1, r2, #4
- 80016e2: 1843 adds r3, r0, r1
- 80016e4: 3201 adds r2, #1
- 80016e6: 6162 str r2, [r4, #20]
- 80016e8: 2200 movs r2, #0
- 80016ea: 605a str r2, [r3, #4]
- 80016ec: 5442 strb r2, [r0, r1]
- 80016ee: 220e movs r2, #14
- 80016f0: e9c3 5202 strd r5, r2, [r3, #8]
- 80016f4: e762 b.n 80015bc <d_name+0x1d4>
- 80016f6: 4620 mov r0, r4
- 80016f8: f7fe fefa bl 80004f0 <d_template_param>
- 80016fc: e79d b.n 800163a <d_name+0x252>
- 80016fe: 2300 movs r3, #0
- 8001700: e75c b.n 80015bc <d_name+0x1d4>
- 8001702: f8c8 7000 str.w r7, [r8]
- 8001706: 2f00 cmp r7, #0
- 8001708: f43f af6c beq.w 80015e4 <d_name+0x1fc>
- 800170c: f1b9 0f00 cmp.w r9, #0
- 8001710: d004 beq.n 800171c <d_name+0x334>
- 8001712: 9b01 ldr r3, [sp, #4]
- 8001714: f8c9 3008 str.w r3, [r9, #8]
- 8001718: f8cd 9004 str.w r9, [sp, #4]
- 800171c: 7813 ldrb r3, [r2, #0]
- 800171e: 2b45 cmp r3, #69 ; 0x45
- 8001720: f47f af60 bne.w 80015e4 <d_name+0x1fc>
- 8001724: 9d01 ldr r5, [sp, #4]
- 8001726: 3201 adds r2, #1
- 8001728: 4628 mov r0, r5
- 800172a: 60e2 str r2, [r4, #12]
- 800172c: b003 add sp, #12
- 800172e: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc}
- 8001732: bf00 nop
- 8001734: 0801259c .word 0x0801259c
- 8001738: 100803ff .word 0x100803ff
- 800173c: 0801258c .word 0x0801258c
-
-08001740 <d_type>:
- 8001740: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr}
- 8001744: 68c2 ldr r2, [r0, #12]
- 8001746: 7813 ldrb r3, [r2, #0]
- 8001748: 2b72 cmp r3, #114 ; 0x72
- 800174a: b083 sub sp, #12
- 800174c: 4604 mov r4, r0
- 800174e: d05f beq.n 8001810 <d_type+0xd0>
- 8001750: 2b56 cmp r3, #86 ; 0x56
- 8001752: d05d beq.n 8001810 <d_type+0xd0>
- 8001754: 2b4b cmp r3, #75 ; 0x4b
- 8001756: d05b beq.n 8001810 <d_type+0xd0>
- 8001758: 2b44 cmp r3, #68 ; 0x44
- 800175a: d051 beq.n 8001800 <d_type+0xc0>
- 800175c: f1a3 0130 sub.w r1, r3, #48 ; 0x30
- 8001760: 294a cmp r1, #74 ; 0x4a
- 8001762: f200 809e bhi.w 80018a2 <d_type+0x162>
- 8001766: e8df f011 tbh [pc, r1, lsl #1]
- 800176a: 0111 .short 0x0111
- 800176c: 01110111 .word 0x01110111
- 8001770: 01110111 .word 0x01110111
- 8001774: 01110111 .word 0x01110111
- 8001778: 01110111 .word 0x01110111
- 800177c: 009c0111 .word 0x009c0111
- 8001780: 009c009c .word 0x009c009c
- 8001784: 009c009c .word 0x009c009c
- 8001788: 009c009c .word 0x009c009c
- 800178c: 009c021e .word 0x009c021e
- 8001790: 009c013b .word 0x009c013b
- 8001794: 0135009c .word 0x0135009c
- 8001798: 009c0149 .word 0x009c0149
- 800179c: 009c009c .word 0x009c009c
- 80017a0: 009c009c .word 0x009c009c
- 80017a4: 01110206 .word 0x01110206
- 80017a8: 01650157 .word 0x01650157
- 80017ac: 0173009c .word 0x0173009c
- 80017b0: 01a50181 .word 0x01a50181
- 80017b4: 009c01cc .word 0x009c01cc
- 80017b8: 009c009c .word 0x009c009c
- 80017bc: 0111009c .word 0x0111009c
- 80017c0: 009c009c .word 0x009c009c
- 80017c4: 009c009c .word 0x009c009c
- 80017c8: 009c009c .word 0x009c009c
- 80017cc: 01e401e4 .word 0x01e401e4
- 80017d0: 01e401e4 .word 0x01e401e4
- 80017d4: 01e401e4 .word 0x01e401e4
- 80017d8: 01e401e4 .word 0x01e401e4
- 80017dc: 01e401e4 .word 0x01e401e4
- 80017e0: 01e4009c .word 0x01e4009c
- 80017e4: 01e401e4 .word 0x01e401e4
- 80017e8: 009c01e4 .word 0x009c01e4
- 80017ec: 009c009c .word 0x009c009c
- 80017f0: 01e401e4 .word 0x01e401e4
- 80017f4: 01e40127 .word 0x01e40127
- 80017f8: 01e401e4 .word 0x01e401e4
- 80017fc: 01e401e4 .word 0x01e401e4
- 8001800: 7853 ldrb r3, [r2, #1]
- 8001802: f003 01df and.w r1, r3, #223 ; 0xdf
- 8001806: 294f cmp r1, #79 ; 0x4f
- 8001808: d002 beq.n 8001810 <d_type+0xd0>
- 800180a: 3b77 subs r3, #119 ; 0x77
- 800180c: 2b01 cmp r3, #1
- 800180e: d84d bhi.n 80018ac <d_type+0x16c>
- 8001810: 2200 movs r2, #0
- 8001812: a901 add r1, sp, #4
- 8001814: 4620 mov r0, r4
- 8001816: f000 fc45 bl 80020a4 <d_cv_qualifiers>
- 800181a: 4605 mov r5, r0
- 800181c: 2800 cmp r0, #0
- 800181e: d040 beq.n 80018a2 <d_type+0x162>
- 8001820: 68e3 ldr r3, [r4, #12]
- 8001822: 781b ldrb r3, [r3, #0]
- 8001824: 2b46 cmp r3, #70 ; 0x46
- 8001826: 4620 mov r0, r4
- 8001828: d119 bne.n 800185e <d_type+0x11e>
- 800182a: f000 fd0f bl 800224c <d_function_type>
- 800182e: 6028 str r0, [r5, #0]
- 8001830: 2800 cmp r0, #0
- 8001832: d036 beq.n 80018a2 <d_type+0x162>
- 8001834: 7803 ldrb r3, [r0, #0]
- 8001836: 9a01 ldr r2, [sp, #4]
- 8001838: 3b1f subs r3, #31
- 800183a: 2b01 cmp r3, #1
- 800183c: d913 bls.n 8001866 <d_type+0x126>
- 800183e: 2a00 cmp r2, #0
- 8001840: d02f beq.n 80018a2 <d_type+0x162>
- 8001842: e9d4 3108 ldrd r3, r1, [r4, #32]
- 8001846: 428b cmp r3, r1
- 8001848: da2b bge.n 80018a2 <d_type+0x162>
- 800184a: 69e0 ldr r0, [r4, #28]
- 800184c: f840 2023 str.w r2, [r0, r3, lsl #2]
- 8001850: 1c59 adds r1, r3, #1
- 8001852: 9d01 ldr r5, [sp, #4]
- 8001854: 6221 str r1, [r4, #32]
- 8001856: 4628 mov r0, r5
- 8001858: b003 add sp, #12
- 800185a: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc}
- 800185e: f7ff ff6f bl 8001740 <d_type>
- 8001862: 6028 str r0, [r5, #0]
- 8001864: e7e4 b.n 8001830 <d_type+0xf0>
- 8001866: 6883 ldr r3, [r0, #8]
- 8001868: 6082 str r2, [r0, #8]
- 800186a: 682a ldr r2, [r5, #0]
- 800186c: 9201 str r2, [sp, #4]
- 800186e: 602b str r3, [r5, #0]
- 8001870: 9a01 ldr r2, [sp, #4]
- 8001872: e7e4 b.n 800183e <d_type+0xfe>
- 8001874: 2301 movs r3, #1
- 8001876: 6b45 ldr r5, [r0, #52] ; 0x34
- 8001878: 6343 str r3, [r0, #52] ; 0x34
- 800187a: f7ff fb37 bl 8000eec <d_expression_1>
- 800187e: 6365 str r5, [r4, #52] ; 0x34
- 8001880: 4602 mov r2, r0
- 8001882: 2300 movs r3, #0
- 8001884: 2142 movs r1, #66 ; 0x42
- 8001886: 4620 mov r0, r4
- 8001888: f7fe fcda bl 8000240 <d_make_comp>
- 800188c: 4605 mov r5, r0
- 800188e: 9001 str r0, [sp, #4]
- 8001890: b138 cbz r0, 80018a2 <d_type+0x162>
- 8001892: 68e3 ldr r3, [r4, #12]
- 8001894: 781a ldrb r2, [r3, #0]
- 8001896: b122 cbz r2, 80018a2 <d_type+0x162>
- 8001898: 1c5a adds r2, r3, #1
- 800189a: 60e2 str r2, [r4, #12]
- 800189c: 781b ldrb r3, [r3, #0]
- 800189e: 2b45 cmp r3, #69 ; 0x45
- 80018a0: d07b beq.n 800199a <d_type+0x25a>
- 80018a2: 2500 movs r5, #0
- 80018a4: 4628 mov r0, r5
- 80018a6: b003 add sp, #12
- 80018a8: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc}
- 80018ac: 1c53 adds r3, r2, #1
- 80018ae: 60c3 str r3, [r0, #12]
- 80018b0: 7853 ldrb r3, [r2, #1]
- 80018b2: 2b00 cmp r3, #0
- 80018b4: d0f5 beq.n 80018a2 <d_type+0x162>
- 80018b6: 1c93 adds r3, r2, #2
- 80018b8: 60c3 str r3, [r0, #12]
- 80018ba: 7853 ldrb r3, [r2, #1]
- 80018bc: 3b46 subs r3, #70 ; 0x46
- 80018be: 2b30 cmp r3, #48 ; 0x30
- 80018c0: d8ef bhi.n 80018a2 <d_type+0x162>
- 80018c2: a101 add r1, pc, #4 ; (adr r1, 80018c8 <d_type+0x188>)
- 80018c4: f851 f023 ldr.w pc, [r1, r3, lsl #2]
- 80018c8: 08001d85 .word 0x08001d85
- 80018cc: 080018a3 .word 0x080018a3
- 80018d0: 080018a3 .word 0x080018a3
- 80018d4: 080018a3 .word 0x080018a3
- 80018d8: 080018a3 .word 0x080018a3
- 80018dc: 080018a3 .word 0x080018a3
- 80018e0: 080018a3 .word 0x080018a3
- 80018e4: 080018a3 .word 0x080018a3
- 80018e8: 080018a3 .word 0x080018a3
- 80018ec: 080018a3 .word 0x080018a3
- 80018f0: 080018a3 .word 0x080018a3
- 80018f4: 080018a3 .word 0x080018a3
- 80018f8: 080018a3 .word 0x080018a3
- 80018fc: 080018a3 .word 0x080018a3
- 8001900: 08001875 .word 0x08001875
- 8001904: 080018a3 .word 0x080018a3
- 8001908: 080018a3 .word 0x080018a3
- 800190c: 080018a3 .word 0x080018a3
- 8001910: 080018a3 .word 0x080018a3
- 8001914: 080018a3 .word 0x080018a3
- 8001918: 080018a3 .word 0x080018a3
- 800191c: 080018a3 .word 0x080018a3
- 8001920: 080018a3 .word 0x080018a3
- 8001924: 080018a3 .word 0x080018a3
- 8001928: 080018a3 .word 0x080018a3
- 800192c: 080018a3 .word 0x080018a3
- 8001930: 080018a3 .word 0x080018a3
- 8001934: 08001d61 .word 0x08001d61
- 8001938: 080018a3 .word 0x080018a3
- 800193c: 08001d3d .word 0x08001d3d
- 8001940: 08001d15 .word 0x08001d15
- 8001944: 08001ced .word 0x08001ced
- 8001948: 08001cc5 .word 0x08001cc5
- 800194c: 080018a3 .word 0x080018a3
- 8001950: 08001c9d .word 0x08001c9d
- 8001954: 08001e39 .word 0x08001e39
- 8001958: 080018a3 .word 0x080018a3
- 800195c: 080018a3 .word 0x080018a3
- 8001960: 080018a3 .word 0x080018a3
- 8001964: 080018a3 .word 0x080018a3
- 8001968: 08001ded .word 0x08001ded
- 800196c: 080018a3 .word 0x080018a3
- 8001970: 08001c87 .word 0x08001c87
- 8001974: 080018a3 .word 0x080018a3
- 8001978: 080018a3 .word 0x080018a3
- 800197c: 08001c5f .word 0x08001c5f
- 8001980: 08001875 .word 0x08001875
- 8001984: 080018a3 .word 0x080018a3
- 8001988: 08001c25 .word 0x08001c25
- 800198c: 4620 mov r0, r4
- 800198e: f7ff fd2b bl 80013e8 <d_name>
- 8001992: 4605 mov r5, r0
- 8001994: 9001 str r0, [sp, #4]
- 8001996: 2d00 cmp r5, #0
- 8001998: d083 beq.n 80018a2 <d_type+0x162>
- 800199a: e9d4 3208 ldrd r3, r2, [r4, #32]
- 800199e: 4293 cmp r3, r2
- 80019a0: f6bf af7f bge.w 80018a2 <d_type+0x162>
- 80019a4: 69e1 ldr r1, [r4, #28]
- 80019a6: f841 5023 str.w r5, [r1, r3, lsl #2]
- 80019aa: 9d01 ldr r5, [sp, #4]
- 80019ac: 1c5a adds r2, r3, #1
- 80019ae: 4628 mov r0, r5
- 80019b0: 6222 str r2, [r4, #32]
- 80019b2: b003 add sp, #12
- 80019b4: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc}
- 80019b8: 3201 adds r2, #1
- 80019ba: 60e2 str r2, [r4, #12]
- 80019bc: 4620 mov r0, r4
- 80019be: f7fe fdb9 bl 8000534 <d_source_name>
- 80019c2: 2300 movs r3, #0
- 80019c4: 4602 mov r2, r0
- 80019c6: 2128 movs r1, #40 ; 0x28
- 80019c8: 4620 mov r0, r4
- 80019ca: f7fe fc39 bl 8000240 <d_make_comp>
- 80019ce: 4605 mov r5, r0
- 80019d0: 9001 str r0, [sp, #4]
- 80019d2: e7e0 b.n 8001996 <d_type+0x256>
- 80019d4: 4620 mov r0, r4
- 80019d6: f000 fc39 bl 800224c <d_function_type>
- 80019da: 4605 mov r5, r0
- 80019dc: 9001 str r0, [sp, #4]
- 80019de: e7da b.n 8001996 <d_type+0x256>
- 80019e0: 3201 adds r2, #1
- 80019e2: 60e2 str r2, [r4, #12]
- 80019e4: 4620 mov r0, r4
- 80019e6: f7ff feab bl 8001740 <d_type>
- 80019ea: 2300 movs r3, #0
- 80019ec: 4602 mov r2, r0
- 80019ee: 2125 movs r1, #37 ; 0x25
- 80019f0: 4620 mov r0, r4
- 80019f2: f7fe fc25 bl 8000240 <d_make_comp>
- 80019f6: 4605 mov r5, r0
- 80019f8: 9001 str r0, [sp, #4]
- 80019fa: e7cc b.n 8001996 <d_type+0x256>
- 80019fc: 3201 adds r2, #1
- 80019fe: 60e2 str r2, [r4, #12]
- 8001a00: 4620 mov r0, r4
- 8001a02: f7ff fe9d bl 8001740 <d_type>
- 8001a06: 2300 movs r3, #0
- 8001a08: 4602 mov r2, r0
- 8001a0a: 2126 movs r1, #38 ; 0x26
- 8001a0c: 4620 mov r0, r4
- 8001a0e: f7fe fc17 bl 8000240 <d_make_comp>
- 8001a12: 4605 mov r5, r0
- 8001a14: 9001 str r0, [sp, #4]
- 8001a16: e7be b.n 8001996 <d_type+0x256>
- 8001a18: 3201 adds r2, #1
- 8001a1a: 60e2 str r2, [r4, #12]
- 8001a1c: 4620 mov r0, r4
- 8001a1e: f7ff fe8f bl 8001740 <d_type>
- 8001a22: 2300 movs r3, #0
- 8001a24: 4602 mov r2, r0
- 8001a26: 2124 movs r1, #36 ; 0x24
- 8001a28: 4620 mov r0, r4
- 8001a2a: f7fe fc09 bl 8000240 <d_make_comp>
- 8001a2e: 4605 mov r5, r0
- 8001a30: 9001 str r0, [sp, #4]
- 8001a32: e7b0 b.n 8001996 <d_type+0x256>
- 8001a34: 3201 adds r2, #1
- 8001a36: 60e2 str r2, [r4, #12]
- 8001a38: 4620 mov r0, r4
- 8001a3a: f7ff fe81 bl 8001740 <d_type>
- 8001a3e: 2300 movs r3, #0
- 8001a40: 4602 mov r2, r0
- 8001a42: 2122 movs r1, #34 ; 0x22
- 8001a44: 4620 mov r0, r4
- 8001a46: f7fe fbfb bl 8000240 <d_make_comp>
- 8001a4a: 4605 mov r5, r0
- 8001a4c: 9001 str r0, [sp, #4]
- 8001a4e: e7a2 b.n 8001996 <d_type+0x256>
- 8001a50: 3201 adds r2, #1
- 8001a52: 60e2 str r2, [r4, #12]
- 8001a54: 4620 mov r0, r4
- 8001a56: f7ff fe73 bl 8001740 <d_type>
- 8001a5a: 2300 movs r3, #0
- 8001a5c: 4602 mov r2, r0
- 8001a5e: 2123 movs r1, #35 ; 0x23
- 8001a60: 4620 mov r0, r4
- 8001a62: f7fe fbed bl 8000240 <d_make_comp>
- 8001a66: 4605 mov r5, r0
- 8001a68: 9001 str r0, [sp, #4]
- 8001a6a: e794 b.n 8001996 <d_type+0x256>
- 8001a6c: 7853 ldrb r3, [r2, #1]
- 8001a6e: f1a3 0230 sub.w r2, r3, #48 ; 0x30
- 8001a72: 2a09 cmp r2, #9
- 8001a74: d905 bls.n 8001a82 <d_type+0x342>
- 8001a76: 2b5f cmp r3, #95 ; 0x5f
- 8001a78: d003 beq.n 8001a82 <d_type+0x342>
- 8001a7a: 3b41 subs r3, #65 ; 0x41
- 8001a7c: 2b19 cmp r3, #25
- 8001a7e: f200 820f bhi.w 8001ea0 <d_type+0x760>
- 8001a82: 2100 movs r1, #0
- 8001a84: 4620 mov r0, r4
- 8001a86: f7fe fdcb bl 8000620 <d_substitution>
- 8001a8a: 68e3 ldr r3, [r4, #12]
- 8001a8c: 9001 str r0, [sp, #4]
- 8001a8e: 781a ldrb r2, [r3, #0]
- 8001a90: 2a49 cmp r2, #73 ; 0x49
- 8001a92: 4605 mov r5, r0
- 8001a94: f47f aedf bne.w 8001856 <d_type+0x116>
- 8001a98: 3301 adds r3, #1
- 8001a9a: 60e3 str r3, [r4, #12]
- 8001a9c: 4620 mov r0, r4
- 8001a9e: f7ff fc37 bl 8001310 <d_template_args_1>
- 8001aa2: 4603 mov r3, r0
- 8001aa4: 462a mov r2, r5
- 8001aa6: 2104 movs r1, #4
- 8001aa8: 4620 mov r0, r4
- 8001aaa: f7fe fbc9 bl 8000240 <d_make_comp>
- 8001aae: 4605 mov r5, r0
- 8001ab0: 9001 str r0, [sp, #4]
- 8001ab2: e770 b.n 8001996 <d_type+0x256>
- 8001ab4: 4620 mov r0, r4
- 8001ab6: f7fe fd1b bl 80004f0 <d_template_param>
- 8001aba: 68e6 ldr r6, [r4, #12]
- 8001abc: 9001 str r0, [sp, #4]
- 8001abe: 7833 ldrb r3, [r6, #0]
- 8001ac0: 2b49 cmp r3, #73 ; 0x49
- 8001ac2: 4605 mov r5, r0
- 8001ac4: f47f af67 bne.w 8001996 <d_type+0x256>
- 8001ac8: 6ba3 ldr r3, [r4, #56] ; 0x38
- 8001aca: 2b00 cmp r3, #0
- 8001acc: f040 81f5 bne.w 8001eba <d_type+0x77a>
- 8001ad0: 2800 cmp r0, #0
- 8001ad2: f43f aee6 beq.w 80018a2 <d_type+0x162>
- 8001ad6: e9d4 2108 ldrd r2, r1, [r4, #32]
- 8001ada: 428a cmp r2, r1
- 8001adc: f6bf aee1 bge.w 80018a2 <d_type+0x162>
- 8001ae0: 69e1 ldr r1, [r4, #28]
- 8001ae2: f841 0022 str.w r0, [r1, r2, lsl #2]
- 8001ae6: 3201 adds r2, #1
- 8001ae8: 6222 str r2, [r4, #32]
- 8001aea: 7831 ldrb r1, [r6, #0]
- 8001aec: 9d01 ldr r5, [sp, #4]
- 8001aee: 3949 subs r1, #73 ; 0x49
- 8001af0: 2901 cmp r1, #1
- 8001af2: d8d7 bhi.n 8001aa4 <d_type+0x364>
- 8001af4: 3601 adds r6, #1
- 8001af6: 60e6 str r6, [r4, #12]
- 8001af8: 4620 mov r0, r4
- 8001afa: f7ff fc09 bl 8001310 <d_template_args_1>
- 8001afe: 4603 mov r3, r0
- 8001b00: e7d0 b.n 8001aa4 <d_type+0x364>
- 8001b02: 3201 adds r2, #1
- 8001b04: 60e2 str r2, [r4, #12]
- 8001b06: 4620 mov r0, r4
- 8001b08: f7fe fd14 bl 8000534 <d_source_name>
- 8001b0c: 68e3 ldr r3, [r4, #12]
- 8001b0e: 9001 str r0, [sp, #4]
- 8001b10: 781a ldrb r2, [r3, #0]
- 8001b12: 2a49 cmp r2, #73 ; 0x49
- 8001b14: 4605 mov r5, r0
- 8001b16: f000 81a8 beq.w 8001e6a <d_type+0x72a>
- 8001b1a: 4620 mov r0, r4
- 8001b1c: f7ff fe10 bl 8001740 <d_type>
- 8001b20: 9b01 ldr r3, [sp, #4]
- 8001b22: 4602 mov r2, r0
- 8001b24: 2121 movs r1, #33 ; 0x21
- 8001b26: 4620 mov r0, r4
- 8001b28: f7fe fb8a bl 8000240 <d_make_comp>
- 8001b2c: 4605 mov r5, r0
- 8001b2e: 9001 str r0, [sp, #4]
- 8001b30: e731 b.n 8001996 <d_type+0x256>
- 8001b32: e9d4 1005 ldrd r1, r0, [r4, #20]
- 8001b36: 3b61 subs r3, #97 ; 0x61
- 8001b38: 4db6 ldr r5, [pc, #728] ; (8001e14 <d_type+0x6d4>)
- 8001b3a: eb03 0383 add.w r3, r3, r3, lsl #2
- 8001b3e: 4281 cmp r1, r0
- 8001b40: eb05 0383 add.w r3, r5, r3, lsl #2
- 8001b44: f280 818b bge.w 8001e5e <d_type+0x71e>
- 8001b48: 6858 ldr r0, [r3, #4]
- 8001b4a: 6b26 ldr r6, [r4, #48] ; 0x30
- 8001b4c: f8d4 c010 ldr.w ip, [r4, #16]
- 8001b50: 010f lsls r7, r1, #4
- 8001b52: eb0c 0507 add.w r5, ip, r7
- 8001b56: 4406 add r6, r0
- 8001b58: 4630 mov r0, r6
- 8001b5a: 3201 adds r2, #1
- 8001b5c: 3101 adds r1, #1
- 8001b5e: f04f 0e00 mov.w lr, #0
- 8001b62: 2627 movs r6, #39 ; 0x27
- 8001b64: f8c5 e004 str.w lr, [r5, #4]
- 8001b68: 6161 str r1, [r4, #20]
- 8001b6a: f80c 6007 strb.w r6, [ip, r7]
- 8001b6e: 60ab str r3, [r5, #8]
- 8001b70: 60e2 str r2, [r4, #12]
- 8001b72: 6320 str r0, [r4, #48] ; 0x30
- 8001b74: e66f b.n 8001856 <d_type+0x116>
- 8001b76: 3201 adds r2, #1
- 8001b78: 60e2 str r2, [r4, #12]
- 8001b7a: 4620 mov r0, r4
- 8001b7c: f7ff fde0 bl 8001740 <d_type>
- 8001b80: 4605 mov r5, r0
- 8001b82: 2800 cmp r0, #0
- 8001b84: f43f ae8d beq.w 80018a2 <d_type+0x162>
- 8001b88: 4620 mov r0, r4
- 8001b8a: f7ff fdd9 bl 8001740 <d_type>
- 8001b8e: 4603 mov r3, r0
- 8001b90: 2800 cmp r0, #0
- 8001b92: f43f ae86 beq.w 80018a2 <d_type+0x162>
- 8001b96: 462a mov r2, r5
- 8001b98: 212b movs r1, #43 ; 0x2b
- 8001b9a: 4620 mov r0, r4
- 8001b9c: f7fe fb50 bl 8000240 <d_make_comp>
- 8001ba0: 4605 mov r5, r0
- 8001ba2: 9001 str r0, [sp, #4]
- 8001ba4: e6f7 b.n 8001996 <d_type+0x256>
- 8001ba6: 1c55 adds r5, r2, #1
- 8001ba8: 60e5 str r5, [r4, #12]
- 8001baa: 7853 ldrb r3, [r2, #1]
- 8001bac: 2b5f cmp r3, #95 ; 0x5f
- 8001bae: f000 815a beq.w 8001e66 <d_type+0x726>
- 8001bb2: 3b30 subs r3, #48 ; 0x30
- 8001bb4: 2b09 cmp r3, #9
- 8001bb6: f200 8165 bhi.w 8001e84 <d_type+0x744>
- 8001bba: 4628 mov r0, r5
- 8001bbc: e000 b.n 8001bc0 <d_type+0x480>
- 8001bbe: 4608 mov r0, r1
- 8001bc0: 1c41 adds r1, r0, #1
- 8001bc2: 60e1 str r1, [r4, #12]
- 8001bc4: 7843 ldrb r3, [r0, #1]
- 8001bc6: 3b30 subs r3, #48 ; 0x30
- 8001bc8: 2b09 cmp r3, #9
- 8001bca: d9f8 bls.n 8001bbe <d_type+0x47e>
- 8001bcc: e9d4 3205 ldrd r3, r2, [r4, #20]
- 8001bd0: 4293 cmp r3, r2
- 8001bd2: eba1 0705 sub.w r7, r1, r5
- 8001bd6: f6bf ae64 bge.w 80018a2 <d_type+0x162>
- 8001bda: f8d4 e010 ldr.w lr, [r4, #16]
- 8001bde: ea4f 1c03 mov.w ip, r3, lsl #4
- 8001be2: eb0e 060c add.w r6, lr, ip
- 8001be6: 3301 adds r3, #1
- 8001be8: 2200 movs r2, #0
- 8001bea: 6072 str r2, [r6, #4]
- 8001bec: 6163 str r3, [r4, #20]
- 8001bee: 2f00 cmp r7, #0
- 8001bf0: f43f ae57 beq.w 80018a2 <d_type+0x162>
- 8001bf4: 6072 str r2, [r6, #4]
- 8001bf6: f80e 200c strb.w r2, [lr, ip]
- 8001bfa: e9c6 5702 strd r5, r7, [r6, #8]
- 8001bfe: 7843 ldrb r3, [r0, #1]
- 8001c00: 460d mov r5, r1
- 8001c02: 2b5f cmp r3, #95 ; 0x5f
- 8001c04: f47f ae4d bne.w 80018a2 <d_type+0x162>
- 8001c08: 3501 adds r5, #1
- 8001c0a: 60e5 str r5, [r4, #12]
- 8001c0c: 4620 mov r0, r4
- 8001c0e: f7ff fd97 bl 8001740 <d_type>
- 8001c12: 4632 mov r2, r6
- 8001c14: 4603 mov r3, r0
- 8001c16: 212a movs r1, #42 ; 0x2a
- 8001c18: 4620 mov r0, r4
- 8001c1a: f7fe fb11 bl 8000240 <d_make_comp>
- 8001c1e: 4605 mov r5, r0
- 8001c20: 9001 str r0, [sp, #4]
- 8001c22: e6b8 b.n 8001996 <d_type+0x256>
- 8001c24: 7893 ldrb r3, [r2, #2]
- 8001c26: 2b5f cmp r3, #95 ; 0x5f
- 8001c28: f000 8178 beq.w 8001f1c <d_type+0x7dc>
- 8001c2c: f7fe fc2e bl 800048c <d_number_component>
- 8001c30: 4605 mov r5, r0
- 8001c32: 2d00 cmp r5, #0
- 8001c34: f43f ae35 beq.w 80018a2 <d_type+0x162>
- 8001c38: 68e3 ldr r3, [r4, #12]
- 8001c3a: 781a ldrb r2, [r3, #0]
- 8001c3c: 2a5f cmp r2, #95 ; 0x5f
- 8001c3e: f47f ae30 bne.w 80018a2 <d_type+0x162>
- 8001c42: 3301 adds r3, #1
- 8001c44: 60e3 str r3, [r4, #12]
- 8001c46: 4620 mov r0, r4
- 8001c48: f7ff fd7a bl 8001740 <d_type>
- 8001c4c: 462a mov r2, r5
- 8001c4e: 4603 mov r3, r0
- 8001c50: 212d movs r1, #45 ; 0x2d
- 8001c52: 4620 mov r0, r4
- 8001c54: f7fe faf4 bl 8000240 <d_make_comp>
- 8001c58: 4605 mov r5, r0
- 8001c5a: 9001 str r0, [sp, #4]
- 8001c5c: e69b b.n 8001996 <d_type+0x256>
- 8001c5e: e9d0 3205 ldrd r3, r2, [r0, #20]
- 8001c62: 4293 cmp r3, r2
- 8001c64: f280 80fb bge.w 8001e5e <d_type+0x71e>
- 8001c68: 6900 ldr r0, [r0, #16]
- 8001c6a: 6b22 ldr r2, [r4, #48] ; 0x30
- 8001c6c: 0119 lsls r1, r3, #4
- 8001c6e: 1845 adds r5, r0, r1
- 8001c70: 3301 adds r3, #1
- 8001c72: 2600 movs r6, #0
- 8001c74: 606e str r6, [r5, #4]
- 8001c76: 3208 adds r2, #8
- 8001c78: 6163 str r3, [r4, #20]
- 8001c7a: 2627 movs r6, #39 ; 0x27
- 8001c7c: 4b66 ldr r3, [pc, #408] ; (8001e18 <d_type+0x6d8>)
- 8001c7e: 5446 strb r6, [r0, r1]
- 8001c80: 60ab str r3, [r5, #8]
- 8001c82: 6322 str r2, [r4, #48] ; 0x30
- 8001c84: e5e7 b.n 8001856 <d_type+0x116>
- 8001c86: f7ff fd5b bl 8001740 <d_type>
- 8001c8a: 2300 movs r3, #0
- 8001c8c: 4602 mov r2, r0
- 8001c8e: 214a movs r1, #74 ; 0x4a
- 8001c90: 4620 mov r0, r4
- 8001c92: f7fe fad5 bl 8000240 <d_make_comp>
- 8001c96: 4605 mov r5, r0
- 8001c98: 9001 str r0, [sp, #4]
- 8001c9a: e67c b.n 8001996 <d_type+0x256>
- 8001c9c: e9d0 3205 ldrd r3, r2, [r0, #20]
- 8001ca0: 4293 cmp r3, r2
- 8001ca2: f280 80dc bge.w 8001e5e <d_type+0x71e>
- 8001ca6: 6900 ldr r0, [r0, #16]
- 8001ca8: 6b22 ldr r2, [r4, #48] ; 0x30
- 8001caa: 0119 lsls r1, r3, #4
- 8001cac: 1845 adds r5, r0, r1
- 8001cae: 3301 adds r3, #1
- 8001cb0: 2600 movs r6, #0
- 8001cb2: 606e str r6, [r5, #4]
- 8001cb4: 3204 adds r2, #4
- 8001cb6: 6163 str r3, [r4, #20]
- 8001cb8: 2627 movs r6, #39 ; 0x27
- 8001cba: 4b58 ldr r3, [pc, #352] ; (8001e1c <d_type+0x6dc>)
- 8001cbc: 5446 strb r6, [r0, r1]
- 8001cbe: 60ab str r3, [r5, #8]
- 8001cc0: 6322 str r2, [r4, #48] ; 0x30
- 8001cc2: e5c8 b.n 8001856 <d_type+0x116>
- 8001cc4: e9d0 3205 ldrd r3, r2, [r0, #20]
- 8001cc8: 4293 cmp r3, r2
- 8001cca: f280 80c8 bge.w 8001e5e <d_type+0x71e>
- 8001cce: 6900 ldr r0, [r0, #16]
- 8001cd0: 6b22 ldr r2, [r4, #48] ; 0x30
- 8001cd2: 0119 lsls r1, r3, #4
- 8001cd4: 1845 adds r5, r0, r1
- 8001cd6: 3301 adds r3, #1
- 8001cd8: 2600 movs r6, #0
- 8001cda: 606e str r6, [r5, #4]
- 8001cdc: 3209 adds r2, #9
- 8001cde: 6163 str r3, [r4, #20]
- 8001ce0: 2627 movs r6, #39 ; 0x27
- 8001ce2: 4b4f ldr r3, [pc, #316] ; (8001e20 <d_type+0x6e0>)
- 8001ce4: 5446 strb r6, [r0, r1]
- 8001ce6: 60ab str r3, [r5, #8]
- 8001ce8: 6322 str r2, [r4, #48] ; 0x30
- 8001cea: e5b4 b.n 8001856 <d_type+0x116>
- 8001cec: e9d0 3205 ldrd r3, r2, [r0, #20]
- 8001cf0: 4293 cmp r3, r2
- 8001cf2: f280 80b4 bge.w 8001e5e <d_type+0x71e>
- 8001cf6: 6900 ldr r0, [r0, #16]
- 8001cf8: 6b22 ldr r2, [r4, #48] ; 0x30
- 8001cfa: 0119 lsls r1, r3, #4
- 8001cfc: 1845 adds r5, r0, r1
- 8001cfe: 3301 adds r3, #1
- 8001d00: 2600 movs r6, #0
- 8001d02: 606e str r6, [r5, #4]
- 8001d04: 320a adds r2, #10
- 8001d06: 6163 str r3, [r4, #20]
- 8001d08: 2627 movs r6, #39 ; 0x27
- 8001d0a: 4b46 ldr r3, [pc, #280] ; (8001e24 <d_type+0x6e4>)
- 8001d0c: 5446 strb r6, [r0, r1]
- 8001d0e: 60ab str r3, [r5, #8]
- 8001d10: 6322 str r2, [r4, #48] ; 0x30
- 8001d12: e5a0 b.n 8001856 <d_type+0x116>
- 8001d14: e9d0 3205 ldrd r3, r2, [r0, #20]
- 8001d18: 4293 cmp r3, r2
- 8001d1a: f280 80a0 bge.w 8001e5e <d_type+0x71e>
- 8001d1e: 6900 ldr r0, [r0, #16]
- 8001d20: 6b22 ldr r2, [r4, #48] ; 0x30
- 8001d22: 0119 lsls r1, r3, #4
- 8001d24: 1845 adds r5, r0, r1
- 8001d26: 3301 adds r3, #1
- 8001d28: 2600 movs r6, #0
- 8001d2a: 606e str r6, [r5, #4]
- 8001d2c: 3209 adds r2, #9
- 8001d2e: 6163 str r3, [r4, #20]
- 8001d30: 2627 movs r6, #39 ; 0x27
- 8001d32: 4b3d ldr r3, [pc, #244] ; (8001e28 <d_type+0x6e8>)
- 8001d34: 5446 strb r6, [r0, r1]
- 8001d36: 60ab str r3, [r5, #8]
- 8001d38: 6322 str r2, [r4, #48] ; 0x30
- 8001d3a: e58c b.n 8001856 <d_type+0x116>
- 8001d3c: e9d0 3205 ldrd r3, r2, [r0, #20]
- 8001d40: 4293 cmp r3, r2
- 8001d42: f6bf adae bge.w 80018a2 <d_type+0x162>
- 8001d46: 6901 ldr r1, [r0, #16]
- 8001d48: 4e38 ldr r6, [pc, #224] ; (8001e2c <d_type+0x6ec>)
- 8001d4a: 011a lsls r2, r3, #4
- 8001d4c: 188d adds r5, r1, r2
- 8001d4e: 3301 adds r3, #1
- 8001d50: 6143 str r3, [r0, #20]
- 8001d52: 2300 movs r3, #0
- 8001d54: 200e movs r0, #14
- 8001d56: 606b str r3, [r5, #4]
- 8001d58: 548b strb r3, [r1, r2]
- 8001d5a: e9c5 6002 strd r6, r0, [r5, #8]
- 8001d5e: e57a b.n 8001856 <d_type+0x116>
- 8001d60: e9d0 3205 ldrd r3, r2, [r0, #20]
- 8001d64: 4293 cmp r3, r2
- 8001d66: f6bf ad9c bge.w 80018a2 <d_type+0x162>
- 8001d6a: 6901 ldr r1, [r0, #16]
- 8001d6c: 4e30 ldr r6, [pc, #192] ; (8001e30 <d_type+0x6f0>)
- 8001d6e: 011a lsls r2, r3, #4
- 8001d70: 188d adds r5, r1, r2
- 8001d72: 3301 adds r3, #1
- 8001d74: 6143 str r3, [r0, #20]
- 8001d76: 2300 movs r3, #0
- 8001d78: 2004 movs r0, #4
- 8001d7a: 606b str r3, [r5, #4]
- 8001d7c: 548b strb r3, [r1, r2]
- 8001d7e: e9c5 6002 strd r6, r0, [r5, #8]
- 8001d82: e568 b.n 8001856 <d_type+0x116>
- 8001d84: e9d0 3105 ldrd r3, r1, [r0, #20]
- 8001d88: 428b cmp r3, r1
- 8001d8a: f280 80af bge.w 8001eec <d_type+0x7ac>
- 8001d8e: 6905 ldr r5, [r0, #16]
- 8001d90: 0118 lsls r0, r3, #4
- 8001d92: 1829 adds r1, r5, r0
- 8001d94: 3301 adds r3, #1
- 8001d96: 2700 movs r7, #0
- 8001d98: 262c movs r6, #44 ; 0x2c
- 8001d9a: 604f str r7, [r1, #4]
- 8001d9c: 9101 str r1, [sp, #4]
- 8001d9e: 6163 str r3, [r4, #20]
- 8001da0: 542e strb r6, [r5, r0]
- 8001da2: 7893 ldrb r3, [r2, #2]
- 8001da4: 3b30 subs r3, #48 ; 0x30
- 8001da6: b2db uxtb r3, r3
- 8001da8: 2b09 cmp r3, #9
- 8001daa: bf94 ite ls
- 8001dac: 2301 movls r3, #1
- 8001dae: 463b movhi r3, r7
- 8001db0: 818b strh r3, [r1, #12]
- 8001db2: f240 80ae bls.w 8001f12 <d_type+0x7d2>
- 8001db6: 4620 mov r0, r4
- 8001db8: 9d01 ldr r5, [sp, #4]
- 8001dba: f7ff fcc1 bl 8001740 <d_type>
- 8001dbe: 9b01 ldr r3, [sp, #4]
- 8001dc0: 60a8 str r0, [r5, #8]
- 8001dc2: 689b ldr r3, [r3, #8]
- 8001dc4: 2b00 cmp r3, #0
- 8001dc6: f43f ad6c beq.w 80018a2 <d_type+0x162>
- 8001dca: f104 000c add.w r0, r4, #12
- 8001dce: f7fe fb31 bl 8000434 <d_number.isra.1>
- 8001dd2: 68e2 ldr r2, [r4, #12]
- 8001dd4: 7813 ldrb r3, [r2, #0]
- 8001dd6: b113 cbz r3, 8001dde <d_type+0x69e>
- 8001dd8: 1c53 adds r3, r2, #1
- 8001dda: 60e3 str r3, [r4, #12]
- 8001ddc: 7813 ldrb r3, [r2, #0]
- 8001dde: 9d01 ldr r5, [sp, #4]
- 8001de0: f1a3 0273 sub.w r2, r3, #115 ; 0x73
- 8001de4: 4253 negs r3, r2
- 8001de6: 4153 adcs r3, r2
- 8001de8: 81eb strh r3, [r5, #14]
- 8001dea: e534 b.n 8001856 <d_type+0x116>
- 8001dec: e9d0 3205 ldrd r3, r2, [r0, #20]
- 8001df0: 4293 cmp r3, r2
- 8001df2: da34 bge.n 8001e5e <d_type+0x71e>
- 8001df4: 6900 ldr r0, [r0, #16]
- 8001df6: 6b22 ldr r2, [r4, #48] ; 0x30
- 8001df8: 0119 lsls r1, r3, #4
- 8001dfa: 1845 adds r5, r0, r1
- 8001dfc: 3301 adds r3, #1
- 8001dfe: 2600 movs r6, #0
- 8001e00: 606e str r6, [r5, #4]
- 8001e02: 3211 adds r2, #17
- 8001e04: 6163 str r3, [r4, #20]
- 8001e06: 2627 movs r6, #39 ; 0x27
- 8001e08: 4b0a ldr r3, [pc, #40] ; (8001e34 <d_type+0x6f4>)
- 8001e0a: 5446 strb r6, [r0, r1]
- 8001e0c: 60ab str r3, [r5, #8]
- 8001e0e: 6322 str r2, [r4, #48] ; 0x30
- 8001e10: e521 b.n 8001856 <d_type+0x116>
- 8001e12: bf00 nop
- 8001e14: 08011bd0 .word 0x08011bd0
- 8001e18: 08011e28 .word 0x08011e28
- 8001e1c: 08011e14 .word 0x08011e14
- 8001e20: 08011dd8 .word 0x08011dd8
- 8001e24: 08011e00 .word 0x08011e00
- 8001e28: 08011dec .word 0x08011dec
- 8001e2c: 080125a8 .word 0x080125a8
- 8001e30: 080125a0 .word 0x080125a0
- 8001e34: 08011e50 .word 0x08011e50
- 8001e38: e9d0 3205 ldrd r3, r2, [r0, #20]
- 8001e3c: 4293 cmp r3, r2
- 8001e3e: da0e bge.n 8001e5e <d_type+0x71e>
- 8001e40: 6900 ldr r0, [r0, #16]
- 8001e42: 6b22 ldr r2, [r4, #48] ; 0x30
- 8001e44: 0119 lsls r1, r3, #4
- 8001e46: 1845 adds r5, r0, r1
- 8001e48: 3301 adds r3, #1
- 8001e4a: 2600 movs r6, #0
- 8001e4c: 606e str r6, [r5, #4]
- 8001e4e: 3208 adds r2, #8
- 8001e50: 6163 str r3, [r4, #20]
- 8001e52: 2627 movs r6, #39 ; 0x27
- 8001e54: 4b36 ldr r3, [pc, #216] ; (8001f30 <d_type+0x7f0>)
- 8001e56: 5446 strb r6, [r0, r1]
- 8001e58: 60ab str r3, [r5, #8]
- 8001e5a: 6322 str r2, [r4, #48] ; 0x30
- 8001e5c: e4fb b.n 8001856 <d_type+0x116>
- 8001e5e: 2300 movs r3, #0
- 8001e60: 9301 str r3, [sp, #4]
- 8001e62: 689b ldr r3, [r3, #8]
- 8001e64: deff udf #255 ; 0xff
- 8001e66: 2600 movs r6, #0
- 8001e68: e6ce b.n 8001c08 <d_type+0x4c8>
- 8001e6a: 3301 adds r3, #1
- 8001e6c: 60e3 str r3, [r4, #12]
- 8001e6e: 4620 mov r0, r4
- 8001e70: f7ff fa4e bl 8001310 <d_template_args_1>
- 8001e74: 462a mov r2, r5
- 8001e76: 4603 mov r3, r0
- 8001e78: 2104 movs r1, #4
- 8001e7a: 4620 mov r0, r4
- 8001e7c: f7fe f9e0 bl 8000240 <d_make_comp>
- 8001e80: 9001 str r0, [sp, #4]
- 8001e82: e64a b.n 8001b1a <d_type+0x3da>
- 8001e84: 2301 movs r3, #1
- 8001e86: 6b65 ldr r5, [r4, #52] ; 0x34
- 8001e88: 6363 str r3, [r4, #52] ; 0x34
- 8001e8a: 4620 mov r0, r4
- 8001e8c: f7ff f82e bl 8000eec <d_expression_1>
- 8001e90: 6365 str r5, [r4, #52] ; 0x34
- 8001e92: 4606 mov r6, r0
- 8001e94: 2800 cmp r0, #0
- 8001e96: f43f ad04 beq.w 80018a2 <d_type+0x162>
- 8001e9a: 68e5 ldr r5, [r4, #12]
- 8001e9c: 782b ldrb r3, [r5, #0]
- 8001e9e: e6b0 b.n 8001c02 <d_type+0x4c2>
- 8001ea0: 4620 mov r0, r4
- 8001ea2: f7ff faa1 bl 80013e8 <d_name>
- 8001ea6: 4605 mov r5, r0
- 8001ea8: 9001 str r0, [sp, #4]
- 8001eaa: 2800 cmp r0, #0
- 8001eac: f43f acf9 beq.w 80018a2 <d_type+0x162>
- 8001eb0: 7803 ldrb r3, [r0, #0]
- 8001eb2: 2b18 cmp r3, #24
- 8001eb4: f47f ad71 bne.w 800199a <d_type+0x25a>
- 8001eb8: e4cd b.n 8001856 <d_type+0x116>
- 8001eba: 1c73 adds r3, r6, #1
- 8001ebc: 60e3 str r3, [r4, #12]
- 8001ebe: 4620 mov r0, r4
- 8001ec0: f8d4 9014 ldr.w r9, [r4, #20]
- 8001ec4: f8d4 8020 ldr.w r8, [r4, #32]
- 8001ec8: 6aa7 ldr r7, [r4, #40] ; 0x28
- 8001eca: 6b25 ldr r5, [r4, #48] ; 0x30
- 8001ecc: f7ff fa20 bl 8001310 <d_template_args_1>
- 8001ed0: 68e2 ldr r2, [r4, #12]
- 8001ed2: 7812 ldrb r2, [r2, #0]
- 8001ed4: 2a49 cmp r2, #73 ; 0x49
- 8001ed6: 4603 mov r3, r0
- 8001ed8: d00b beq.n 8001ef2 <d_type+0x7b2>
- 8001eda: 6325 str r5, [r4, #48] ; 0x30
- 8001edc: 60e6 str r6, [r4, #12]
- 8001ede: f8c4 9014 str.w r9, [r4, #20]
- 8001ee2: f8c4 8020 str.w r8, [r4, #32]
- 8001ee6: 62a7 str r7, [r4, #40] ; 0x28
- 8001ee8: 9d01 ldr r5, [sp, #4]
- 8001eea: e554 b.n 8001996 <d_type+0x256>
- 8001eec: 2300 movs r3, #0
- 8001eee: 701b strb r3, [r3, #0]
- 8001ef0: deff udf #255 ; 0xff
- 8001ef2: 9901 ldr r1, [sp, #4]
- 8001ef4: 2900 cmp r1, #0
- 8001ef6: f43f acd4 beq.w 80018a2 <d_type+0x162>
- 8001efa: e9d4 2008 ldrd r2, r0, [r4, #32]
- 8001efe: 4282 cmp r2, r0
- 8001f00: f6bf accf bge.w 80018a2 <d_type+0x162>
- 8001f04: 69e0 ldr r0, [r4, #28]
- 8001f06: f840 1022 str.w r1, [r0, r2, lsl #2]
- 8001f0a: 3201 adds r2, #1
- 8001f0c: 6222 str r2, [r4, #32]
- 8001f0e: 9a01 ldr r2, [sp, #4]
- 8001f10: e5c9 b.n 8001aa6 <d_type+0x366>
- 8001f12: f104 000c add.w r0, r4, #12
- 8001f16: f7fe fa8d bl 8000434 <d_number.isra.1>
- 8001f1a: e74c b.n 8001db6 <d_type+0x676>
- 8001f1c: 3203 adds r2, #3
- 8001f1e: 2301 movs r3, #1
- 8001f20: 6b46 ldr r6, [r0, #52] ; 0x34
- 8001f22: 60c2 str r2, [r0, #12]
- 8001f24: 6343 str r3, [r0, #52] ; 0x34
- 8001f26: f7fe ffe1 bl 8000eec <d_expression_1>
- 8001f2a: 6366 str r6, [r4, #52] ; 0x34
- 8001f2c: 4605 mov r5, r0
- 8001f2e: e680 b.n 8001c32 <d_type+0x4f2>
- 8001f30: 08011e3c .word 0x08011e3c
-
-08001f34 <d_operator_name>:
- 8001f34: b5f8 push {r3, r4, r5, r6, r7, lr}
- 8001f36: 68c3 ldr r3, [r0, #12]
- 8001f38: 781e ldrb r6, [r3, #0]
- 8001f3a: 4686 mov lr, r0
- 8001f3c: b336 cbz r6, 8001f8c <d_operator_name+0x58>
- 8001f3e: 1c5a adds r2, r3, #1
- 8001f40: 60c2 str r2, [r0, #12]
- 8001f42: 785a ldrb r2, [r3, #1]
- 8001f44: 781e ldrb r6, [r3, #0]
- 8001f46: 2a00 cmp r2, #0
- 8001f48: d04a beq.n 8001fe0 <d_operator_name+0xac>
- 8001f4a: 1c9a adds r2, r3, #2
- 8001f4c: 60c2 str r2, [r0, #12]
- 8001f4e: 2e76 cmp r6, #118 ; 0x76
- 8001f50: 4604 mov r4, r0
- 8001f52: f893 c001 ldrb.w ip, [r3, #1]
- 8001f56: d145 bne.n 8001fe4 <d_operator_name+0xb0>
- 8001f58: f1ac 0530 sub.w r5, ip, #48 ; 0x30
- 8001f5c: b2eb uxtb r3, r5
- 8001f5e: 2b09 cmp r3, #9
- 8001f60: d815 bhi.n 8001f8e <d_operator_name+0x5a>
- 8001f62: f7fe fae7 bl 8000534 <d_source_name>
- 8001f66: e9d4 3105 ldrd r3, r1, [r4, #20]
- 8001f6a: 428b cmp r3, r1
- 8001f6c: 4602 mov r2, r0
- 8001f6e: da21 bge.n 8001fb4 <d_operator_name+0x80>
- 8001f70: 6926 ldr r6, [r4, #16]
- 8001f72: 0119 lsls r1, r3, #4
- 8001f74: 1870 adds r0, r6, r1
- 8001f76: 3301 adds r3, #1
- 8001f78: 2700 movs r7, #0
- 8001f7a: 6047 str r7, [r0, #4]
- 8001f7c: 6163 str r3, [r4, #20]
- 8001f7e: b1ca cbz r2, 8001fb4 <d_operator_name+0x80>
- 8001f80: 2332 movs r3, #50 ; 0x32
- 8001f82: 6047 str r7, [r0, #4]
- 8001f84: 5473 strb r3, [r6, r1]
- 8001f86: e9c0 5202 strd r5, r2, [r0, #8]
- 8001f8a: bdf8 pop {r3, r4, r5, r6, r7, pc}
- 8001f8c: 46b4 mov ip, r6
- 8001f8e: 4c23 ldr r4, [pc, #140] ; (800201c <d_operator_name+0xe8>)
- 8001f90: 2043 movs r0, #67 ; 0x43
- 8001f92: 2200 movs r2, #0
- 8001f94: 1a83 subs r3, r0, r2
- 8001f96: eb03 73d3 add.w r3, r3, r3, lsr #31
- 8001f9a: eb02 0363 add.w r3, r2, r3, asr #1
- 8001f9e: 0119 lsls r1, r3, #4
- 8001fa0: 1867 adds r7, r4, r1
- 8001fa2: 5861 ldr r1, [r4, r1]
- 8001fa4: 780d ldrb r5, [r1, #0]
- 8001fa6: 42b5 cmp r5, r6
- 8001fa8: d006 beq.n 8001fb8 <d_operator_name+0x84>
- 8001faa: bf94 ite ls
- 8001fac: 1c5a addls r2, r3, #1
- 8001fae: 4618 movhi r0, r3
- 8001fb0: 4282 cmp r2, r0
- 8001fb2: d1ef bne.n 8001f94 <d_operator_name+0x60>
- 8001fb4: 2000 movs r0, #0
- 8001fb6: bdf8 pop {r3, r4, r5, r6, r7, pc}
- 8001fb8: 7849 ldrb r1, [r1, #1]
- 8001fba: 4561 cmp r1, ip
- 8001fbc: d1f5 bne.n 8001faa <d_operator_name+0x76>
- 8001fbe: e9de 3205 ldrd r3, r2, [lr, #20]
- 8001fc2: 4293 cmp r3, r2
- 8001fc4: daf6 bge.n 8001fb4 <d_operator_name+0x80>
- 8001fc6: f8de 1010 ldr.w r1, [lr, #16]
- 8001fca: 011a lsls r2, r3, #4
- 8001fcc: 1888 adds r0, r1, r2
- 8001fce: 3301 adds r3, #1
- 8001fd0: 2500 movs r5, #0
- 8001fd2: 2431 movs r4, #49 ; 0x31
- 8001fd4: 6045 str r5, [r0, #4]
- 8001fd6: f8ce 3014 str.w r3, [lr, #20]
- 8001fda: 548c strb r4, [r1, r2]
- 8001fdc: 6087 str r7, [r0, #8]
- 8001fde: bdf8 pop {r3, r4, r5, r6, r7, pc}
- 8001fe0: 4694 mov ip, r2
- 8001fe2: e7d4 b.n 8001f8e <d_operator_name+0x5a>
- 8001fe4: 2e63 cmp r6, #99 ; 0x63
- 8001fe6: d1d2 bne.n 8001f8e <d_operator_name+0x5a>
- 8001fe8: f1bc 0f76 cmp.w ip, #118 ; 0x76
- 8001fec: d1cf bne.n 8001f8e <d_operator_name+0x5a>
- 8001fee: e9d0 350d ldrd r3, r5, [r0, #52] ; 0x34
- 8001ff2: fab3 f383 clz r3, r3
- 8001ff6: 095b lsrs r3, r3, #5
- 8001ff8: 6383 str r3, [r0, #56] ; 0x38
- 8001ffa: f7ff fba1 bl 8001740 <d_type>
- 8001ffe: 6ba3 ldr r3, [r4, #56] ; 0x38
- 8002000: 4602 mov r2, r0
- 8002002: b92b cbnz r3, 8002010 <d_operator_name+0xdc>
- 8002004: 2133 movs r1, #51 ; 0x33
- 8002006: 4620 mov r0, r4
- 8002008: f7fe f91a bl 8000240 <d_make_comp>
- 800200c: 63a5 str r5, [r4, #56] ; 0x38
- 800200e: bdf8 pop {r3, r4, r5, r6, r7, pc}
- 8002010: 2300 movs r3, #0
- 8002012: 2134 movs r1, #52 ; 0x34
- 8002014: 4620 mov r0, r4
- 8002016: f7fe f913 bl 8000240 <d_make_comp>
- 800201a: e7f7 b.n 800200c <d_operator_name+0xd8>
- 800201c: 08011e64 .word 0x08011e64
-
-08002020 <d_parmlist>:
- 8002020: b530 push {r4, r5, lr}
- 8002022: 68c2 ldr r2, [r0, #12]
- 8002024: b083 sub sp, #12
- 8002026: 2300 movs r3, #0
- 8002028: 9301 str r3, [sp, #4]
- 800202a: 7813 ldrb r3, [r2, #0]
- 800202c: 2b00 cmp r3, #0
- 800202e: d036 beq.n 800209e <d_parmlist+0x7e>
- 8002030: 2b45 cmp r3, #69 ; 0x45
- 8002032: d034 beq.n 800209e <d_parmlist+0x7e>
- 8002034: 2b2e cmp r3, #46 ; 0x2e
- 8002036: d032 beq.n 800209e <d_parmlist+0x7e>
- 8002038: 4604 mov r4, r0
- 800203a: ad01 add r5, sp, #4
- 800203c: e015 b.n 800206a <d_parmlist+0x4a>
- 800203e: 2b4f cmp r3, #79 ; 0x4f
- 8002040: d016 beq.n 8002070 <d_parmlist+0x50>
- 8002042: f7ff fb7d bl 8001740 <d_type>
- 8002046: 2300 movs r3, #0
- 8002048: 4602 mov r2, r0
- 800204a: 212e movs r1, #46 ; 0x2e
- 800204c: b338 cbz r0, 800209e <d_parmlist+0x7e>
- 800204e: 4620 mov r0, r4
- 8002050: f7fe f8f6 bl 8000240 <d_make_comp>
- 8002054: 6028 str r0, [r5, #0]
- 8002056: b310 cbz r0, 800209e <d_parmlist+0x7e>
- 8002058: 68e2 ldr r2, [r4, #12]
- 800205a: 7813 ldrb r3, [r2, #0]
- 800205c: f100 050c add.w r5, r0, #12
- 8002060: b14b cbz r3, 8002076 <d_parmlist+0x56>
- 8002062: 2b45 cmp r3, #69 ; 0x45
- 8002064: d007 beq.n 8002076 <d_parmlist+0x56>
- 8002066: 2b2e cmp r3, #46 ; 0x2e
- 8002068: d005 beq.n 8002076 <d_parmlist+0x56>
- 800206a: 2b52 cmp r3, #82 ; 0x52
- 800206c: 4620 mov r0, r4
- 800206e: d1e6 bne.n 800203e <d_parmlist+0x1e>
- 8002070: 7853 ldrb r3, [r2, #1]
- 8002072: 2b45 cmp r3, #69 ; 0x45
- 8002074: d1e5 bne.n 8002042 <d_parmlist+0x22>
- 8002076: 9801 ldr r0, [sp, #4]
- 8002078: b188 cbz r0, 800209e <d_parmlist+0x7e>
- 800207a: 68c3 ldr r3, [r0, #12]
- 800207c: b10b cbz r3, 8002082 <d_parmlist+0x62>
- 800207e: b003 add sp, #12
- 8002080: bd30 pop {r4, r5, pc}
- 8002082: 6882 ldr r2, [r0, #8]
- 8002084: 7811 ldrb r1, [r2, #0]
- 8002086: 2927 cmp r1, #39 ; 0x27
- 8002088: d1f9 bne.n 800207e <d_parmlist+0x5e>
- 800208a: 6892 ldr r2, [r2, #8]
- 800208c: 7c11 ldrb r1, [r2, #16]
- 800208e: 2909 cmp r1, #9
- 8002090: d1f5 bne.n 800207e <d_parmlist+0x5e>
- 8002092: 6851 ldr r1, [r2, #4]
- 8002094: 6b22 ldr r2, [r4, #48] ; 0x30
- 8002096: 1a52 subs r2, r2, r1
- 8002098: 6322 str r2, [r4, #48] ; 0x30
- 800209a: 6083 str r3, [r0, #8]
- 800209c: e7ef b.n 800207e <d_parmlist+0x5e>
- 800209e: 2000 movs r0, #0
- 80020a0: b003 add sp, #12
- 80020a2: bd30 pop {r4, r5, pc}
-
-080020a4 <d_cv_qualifiers>:
- 80020a4: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
- 80020a8: 4689 mov r9, r1
- 80020aa: b083 sub sp, #12
- 80020ac: 68c1 ldr r1, [r0, #12]
- 80020ae: 1e13 subs r3, r2, #0
- 80020b0: 9301 str r3, [sp, #4]
- 80020b2: 4604 mov r4, r0
- 80020b4: 780b ldrb r3, [r1, #0]
- 80020b6: bf15 itete ne
- 80020b8: f04f 081e movne.w r8, #30
- 80020bc: f04f 081b moveq.w r8, #27
- 80020c0: 271d movne r7, #29
- 80020c2: 271a moveq r7, #26
- 80020c4: bf14 ite ne
- 80020c6: 261c movne r6, #28
- 80020c8: 2619 moveq r6, #25
- 80020ca: 464d mov r5, r9
- 80020cc: f04f 0a01 mov.w sl, #1
- 80020d0: e01c b.n 800210c <d_cv_qualifiers+0x68>
- 80020d2: 2b56 cmp r3, #86 ; 0x56
- 80020d4: d03f beq.n 8002156 <d_cv_qualifiers+0xb2>
- 80020d6: 2b4b cmp r3, #75 ; 0x4b
- 80020d8: d043 beq.n 8002162 <d_cv_qualifiers+0xbe>
- 80020da: 784b ldrb r3, [r1, #1]
- 80020dc: 2b00 cmp r3, #0
- 80020de: d035 beq.n 800214c <d_cv_qualifiers+0xa8>
- 80020e0: 1c8b adds r3, r1, #2
- 80020e2: 60e3 str r3, [r4, #12]
- 80020e4: 784b ldrb r3, [r1, #1]
- 80020e6: 2b78 cmp r3, #120 ; 0x78
- 80020e8: d041 beq.n 800216e <d_cv_qualifiers+0xca>
- 80020ea: 2b6f cmp r3, #111 ; 0x6f
- 80020ec: d145 bne.n 800217a <d_cv_qualifiers+0xd6>
- 80020ee: 6b23 ldr r3, [r4, #48] ; 0x30
- 80020f0: 3309 adds r3, #9
- 80020f2: 6323 str r3, [r4, #48] ; 0x30
- 80020f4: 214e movs r1, #78 ; 0x4e
- 80020f6: 2300 movs r3, #0
- 80020f8: 2200 movs r2, #0
- 80020fa: 4620 mov r0, r4
- 80020fc: f7fe f8a0 bl 8000240 <d_make_comp>
- 8002100: 6028 str r0, [r5, #0]
- 8002102: b318 cbz r0, 800214c <d_cv_qualifiers+0xa8>
- 8002104: 68e1 ldr r1, [r4, #12]
- 8002106: 780b ldrb r3, [r1, #0]
- 8002108: f100 0508 add.w r5, r0, #8
- 800210c: 2b72 cmp r3, #114 ; 0x72
- 800210e: d00d beq.n 800212c <d_cv_qualifiers+0x88>
- 8002110: 2b56 cmp r3, #86 ; 0x56
- 8002112: d00b beq.n 800212c <d_cv_qualifiers+0x88>
- 8002114: 2b4b cmp r3, #75 ; 0x4b
- 8002116: d009 beq.n 800212c <d_cv_qualifiers+0x88>
- 8002118: 2b44 cmp r3, #68 ; 0x44
- 800211a: d146 bne.n 80021aa <d_cv_qualifiers+0x106>
- 800211c: 784a ldrb r2, [r1, #1]
- 800211e: f002 00df and.w r0, r2, #223 ; 0xdf
- 8002122: 284f cmp r0, #79 ; 0x4f
- 8002124: d002 beq.n 800212c <d_cv_qualifiers+0x88>
- 8002126: 3a77 subs r2, #119 ; 0x77
- 8002128: 2a01 cmp r2, #1
- 800212a: d83e bhi.n 80021aa <d_cv_qualifiers+0x106>
- 800212c: 1c4a adds r2, r1, #1
- 800212e: 2b72 cmp r3, #114 ; 0x72
- 8002130: 60e2 str r2, [r4, #12]
- 8002132: d1ce bne.n 80020d2 <d_cv_qualifiers+0x2e>
- 8002134: 6b23 ldr r3, [r4, #48] ; 0x30
- 8002136: 3309 adds r3, #9
- 8002138: 6323 str r3, [r4, #48] ; 0x30
- 800213a: 4631 mov r1, r6
- 800213c: 2300 movs r3, #0
- 800213e: 2200 movs r2, #0
- 8002140: 4620 mov r0, r4
- 8002142: f7fe f87d bl 8000240 <d_make_comp>
- 8002146: 6028 str r0, [r5, #0]
- 8002148: 2800 cmp r0, #0
- 800214a: d1db bne.n 8002104 <d_cv_qualifiers+0x60>
- 800214c: 2500 movs r5, #0
- 800214e: 4628 mov r0, r5
- 8002150: b003 add sp, #12
- 8002152: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
- 8002156: 6b23 ldr r3, [r4, #48] ; 0x30
- 8002158: 3309 adds r3, #9
- 800215a: 6323 str r3, [r4, #48] ; 0x30
- 800215c: 4639 mov r1, r7
- 800215e: 2300 movs r3, #0
- 8002160: e7ca b.n 80020f8 <d_cv_qualifiers+0x54>
- 8002162: 6b23 ldr r3, [r4, #48] ; 0x30
- 8002164: 3306 adds r3, #6
- 8002166: 6323 str r3, [r4, #48] ; 0x30
- 8002168: 4641 mov r1, r8
- 800216a: 2300 movs r3, #0
- 800216c: e7c4 b.n 80020f8 <d_cv_qualifiers+0x54>
- 800216e: 6b23 ldr r3, [r4, #48] ; 0x30
- 8002170: 3311 adds r3, #17
- 8002172: 6323 str r3, [r4, #48] ; 0x30
- 8002174: 214c movs r1, #76 ; 0x4c
- 8002176: 2300 movs r3, #0
- 8002178: e7be b.n 80020f8 <d_cv_qualifiers+0x54>
- 800217a: 2b4f cmp r3, #79 ; 0x4f
- 800217c: d132 bne.n 80021e4 <d_cv_qualifiers+0x140>
- 800217e: e9d4 3b0c ldrd r3, fp, [r4, #48] ; 0x30
- 8002182: 3309 adds r3, #9
- 8002184: 6323 str r3, [r4, #48] ; 0x30
- 8002186: f8c4 a034 str.w sl, [r4, #52] ; 0x34
- 800218a: 4620 mov r0, r4
- 800218c: f7fe feae bl 8000eec <d_expression_1>
- 8002190: f8c4 b034 str.w fp, [r4, #52] ; 0x34
- 8002194: 4603 mov r3, r0
- 8002196: 2800 cmp r0, #0
- 8002198: d0d8 beq.n 800214c <d_cv_qualifiers+0xa8>
- 800219a: 68e2 ldr r2, [r4, #12]
- 800219c: 7811 ldrb r1, [r2, #0]
- 800219e: 2945 cmp r1, #69 ; 0x45
- 80021a0: d1d4 bne.n 800214c <d_cv_qualifiers+0xa8>
- 80021a2: 3201 adds r2, #1
- 80021a4: 60e2 str r2, [r4, #12]
- 80021a6: 214e movs r1, #78 ; 0x4e
- 80021a8: e7a6 b.n 80020f8 <d_cv_qualifiers+0x54>
- 80021aa: 9a01 ldr r2, [sp, #4]
- 80021ac: 2a00 cmp r2, #0
- 80021ae: d1ce bne.n 800214e <d_cv_qualifiers+0xaa>
- 80021b0: 2b46 cmp r3, #70 ; 0x46
- 80021b2: d1cc bne.n 800214e <d_cv_qualifiers+0xaa>
- 80021b4: 454d cmp r5, r9
- 80021b6: d0ca beq.n 800214e <d_cv_qualifiers+0xaa>
- 80021b8: 241d movs r4, #29
- 80021ba: 201e movs r0, #30
- 80021bc: 211c movs r1, #28
- 80021be: e008 b.n 80021d2 <d_cv_qualifiers+0x12e>
- 80021c0: 2a1b cmp r2, #27
- 80021c2: d00d beq.n 80021e0 <d_cv_qualifiers+0x13c>
- 80021c4: 2a19 cmp r2, #25
- 80021c6: d100 bne.n 80021ca <d_cv_qualifiers+0x126>
- 80021c8: 7019 strb r1, [r3, #0]
- 80021ca: f103 0908 add.w r9, r3, #8
- 80021ce: 454d cmp r5, r9
- 80021d0: d0bd beq.n 800214e <d_cv_qualifiers+0xaa>
- 80021d2: f8d9 3000 ldr.w r3, [r9]
- 80021d6: 781a ldrb r2, [r3, #0]
- 80021d8: 2a1a cmp r2, #26
- 80021da: d1f1 bne.n 80021c0 <d_cv_qualifiers+0x11c>
- 80021dc: 701c strb r4, [r3, #0]
- 80021de: e7f4 b.n 80021ca <d_cv_qualifiers+0x126>
- 80021e0: 7018 strb r0, [r3, #0]
- 80021e2: e7f2 b.n 80021ca <d_cv_qualifiers+0x126>
- 80021e4: 2b77 cmp r3, #119 ; 0x77
- 80021e6: d1b1 bne.n 800214c <d_cv_qualifiers+0xa8>
- 80021e8: 6b23 ldr r3, [r4, #48] ; 0x30
- 80021ea: 3306 adds r3, #6
- 80021ec: 6323 str r3, [r4, #48] ; 0x30
- 80021ee: 4620 mov r0, r4
- 80021f0: f7ff ff16 bl 8002020 <d_parmlist>
- 80021f4: 4603 mov r3, r0
- 80021f6: 2800 cmp r0, #0
- 80021f8: d0a8 beq.n 800214c <d_cv_qualifiers+0xa8>
- 80021fa: 68e2 ldr r2, [r4, #12]
- 80021fc: 7811 ldrb r1, [r2, #0]
- 80021fe: 2945 cmp r1, #69 ; 0x45
- 8002200: d1a4 bne.n 800214c <d_cv_qualifiers+0xa8>
- 8002202: 3201 adds r2, #1
- 8002204: 60e2 str r2, [r4, #12]
- 8002206: 214f movs r1, #79 ; 0x4f
- 8002208: e776 b.n 80020f8 <d_cv_qualifiers+0x54>
- 800220a: bf00 nop
-
-0800220c <d_bare_function_type>:
- 800220c: b570 push {r4, r5, r6, lr}
- 800220e: 68c3 ldr r3, [r0, #12]
- 8002210: 781a ldrb r2, [r3, #0]
- 8002212: 2a4a cmp r2, #74 ; 0x4a
- 8002214: 4604 mov r4, r0
- 8002216: d013 beq.n 8002240 <d_bare_function_type+0x34>
- 8002218: b181 cbz r1, 800223c <d_bare_function_type+0x30>
- 800221a: 4620 mov r0, r4
- 800221c: f7ff fa90 bl 8001740 <d_type>
- 8002220: 4605 mov r5, r0
- 8002222: b180 cbz r0, 8002246 <d_bare_function_type+0x3a>
- 8002224: 4620 mov r0, r4
- 8002226: f7ff fefb bl 8002020 <d_parmlist>
- 800222a: b160 cbz r0, 8002246 <d_bare_function_type+0x3a>
- 800222c: 4603 mov r3, r0
- 800222e: 462a mov r2, r5
- 8002230: 4620 mov r0, r4
- 8002232: 2129 movs r1, #41 ; 0x29
- 8002234: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr}
- 8002238: f7fe b802 b.w 8000240 <d_make_comp>
- 800223c: 460d mov r5, r1
- 800223e: e7f1 b.n 8002224 <d_bare_function_type+0x18>
- 8002240: 3301 adds r3, #1
- 8002242: 60c3 str r3, [r0, #12]
- 8002244: e7e9 b.n 800221a <d_bare_function_type+0xe>
- 8002246: 2000 movs r0, #0
- 8002248: bd70 pop {r4, r5, r6, pc}
- 800224a: bf00 nop
-
-0800224c <d_function_type>:
- 800224c: 68c3 ldr r3, [r0, #12]
- 800224e: 781a ldrb r2, [r3, #0]
- 8002250: 2a46 cmp r2, #70 ; 0x46
- 8002252: d118 bne.n 8002286 <d_function_type+0x3a>
- 8002254: b510 push {r4, lr}
- 8002256: 1c5a adds r2, r3, #1
- 8002258: 60c2 str r2, [r0, #12]
- 800225a: 785a ldrb r2, [r3, #1]
- 800225c: 2a59 cmp r2, #89 ; 0x59
- 800225e: bf04 itt eq
- 8002260: 3302 addeq r3, #2
- 8002262: 60c3 streq r3, [r0, #12]
- 8002264: 2101 movs r1, #1
- 8002266: 4604 mov r4, r0
- 8002268: f7ff ffd0 bl 800220c <d_bare_function_type>
- 800226c: 4601 mov r1, r0
- 800226e: 4620 mov r0, r4
- 8002270: f7fe f82e bl 80002d0 <d_ref_qualifier>
- 8002274: 68e3 ldr r3, [r4, #12]
- 8002276: 781a ldrb r2, [r3, #0]
- 8002278: 2a45 cmp r2, #69 ; 0x45
- 800227a: d102 bne.n 8002282 <d_function_type+0x36>
- 800227c: 3301 adds r3, #1
- 800227e: 60e3 str r3, [r4, #12]
- 8002280: bd10 pop {r4, pc}
- 8002282: 2000 movs r0, #0
- 8002284: bd10 pop {r4, pc}
- 8002286: 2000 movs r0, #0
- 8002288: 4770 bx lr
- 800228a: bf00 nop
-
-0800228c <d_unqualified_name>:
- 800228c: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
- 8002290: 68c1 ldr r1, [r0, #12]
- 8002292: 780b ldrb r3, [r1, #0]
- 8002294: f1a3 0230 sub.w r2, r3, #48 ; 0x30
- 8002298: 2a09 cmp r2, #9
- 800229a: 4604 mov r4, r0
- 800229c: d93c bls.n 8002318 <d_unqualified_name+0x8c>
- 800229e: f1a3 0261 sub.w r2, r3, #97 ; 0x61
- 80022a2: 2a19 cmp r2, #25
- 80022a4: d922 bls.n 80022ec <d_unqualified_name+0x60>
- 80022a6: f1a3 0243 sub.w r2, r3, #67 ; 0x43
- 80022aa: 2a01 cmp r2, #1
- 80022ac: d969 bls.n 8002382 <d_unqualified_name+0xf6>
- 80022ae: 2b4c cmp r3, #76 ; 0x4c
- 80022b0: d056 beq.n 8002360 <d_unqualified_name+0xd4>
- 80022b2: 2b55 cmp r3, #85 ; 0x55
- 80022b4: d15f bne.n 8002376 <d_unqualified_name+0xea>
- 80022b6: 784b ldrb r3, [r1, #1]
- 80022b8: 2b6c cmp r3, #108 ; 0x6c
- 80022ba: f000 80e5 beq.w 8002488 <d_unqualified_name+0x1fc>
- 80022be: 2b74 cmp r3, #116 ; 0x74
- 80022c0: d159 bne.n 8002376 <d_unqualified_name+0xea>
- 80022c2: 1c4b adds r3, r1, #1
- 80022c4: 60c3 str r3, [r0, #12]
- 80022c6: 784b ldrb r3, [r1, #1]
- 80022c8: 2b74 cmp r3, #116 ; 0x74
- 80022ca: d158 bne.n 800237e <d_unqualified_name+0xf2>
- 80022cc: 3102 adds r1, #2
- 80022ce: 60c1 str r1, [r0, #12]
- 80022d0: f7fe f8f4 bl 80004bc <d_compact_number>
- 80022d4: 2800 cmp r0, #0
- 80022d6: f2c0 8155 blt.w 8002584 <d_unqualified_name+0x2f8>
- 80022da: e9d4 3205 ldrd r3, r2, [r4, #20]
- 80022de: 4293 cmp r3, r2
- 80022e0: 68e7 ldr r7, [r4, #12]
- 80022e2: f2c0 80f3 blt.w 80024cc <d_unqualified_name+0x240>
- 80022e6: 783b ldrb r3, [r7, #0]
- 80022e8: 2500 movs r5, #0
- 80022ea: e010 b.n 800230e <d_unqualified_name+0x82>
- 80022ec: 2b6f cmp r3, #111 ; 0x6f
- 80022ee: d104 bne.n 80022fa <d_unqualified_name+0x6e>
- 80022f0: 784b ldrb r3, [r1, #1]
- 80022f2: 2b6e cmp r3, #110 ; 0x6e
- 80022f4: bf04 itt eq
- 80022f6: 3102 addeq r1, #2
- 80022f8: 60c1 streq r1, [r0, #12]
- 80022fa: 4620 mov r0, r4
- 80022fc: f7ff fe1a bl 8001f34 <d_operator_name>
- 8002300: 4605 mov r5, r0
- 8002302: b110 cbz r0, 800230a <d_unqualified_name+0x7e>
- 8002304: 7803 ldrb r3, [r0, #0]
- 8002306: 2b31 cmp r3, #49 ; 0x31
- 8002308: d013 beq.n 8002332 <d_unqualified_name+0xa6>
- 800230a: 68e3 ldr r3, [r4, #12]
- 800230c: 781b ldrb r3, [r3, #0]
- 800230e: 2b42 cmp r3, #66 ; 0x42
- 8002310: d009 beq.n 8002326 <d_unqualified_name+0x9a>
- 8002312: 4628 mov r0, r5
- 8002314: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
- 8002318: f7fe f90c bl 8000534 <d_source_name>
- 800231c: 68e3 ldr r3, [r4, #12]
- 800231e: 781b ldrb r3, [r3, #0]
- 8002320: 2b42 cmp r3, #66 ; 0x42
- 8002322: 4605 mov r5, r0
- 8002324: d1f5 bne.n 8002312 <d_unqualified_name+0x86>
- 8002326: 4629 mov r1, r5
- 8002328: 4620 mov r0, r4
- 800232a: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr}
- 800232e: f7fe b95b b.w 80005e8 <d_abi_tags>
- 8002332: 6882 ldr r2, [r0, #8]
- 8002334: 6b23 ldr r3, [r4, #48] ; 0x30
- 8002336: 6896 ldr r6, [r2, #8]
- 8002338: 6810 ldr r0, [r2, #0]
- 800233a: 49a1 ldr r1, [pc, #644] ; (80025c0 <d_unqualified_name+0x334>)
- 800233c: 3307 adds r3, #7
- 800233e: 4433 add r3, r6
- 8002340: 6323 str r3, [r4, #48] ; 0x30
- 8002342: f004 fd3d bl 8006dc0 <strcmp>
- 8002346: 2800 cmp r0, #0
- 8002348: d1df bne.n 800230a <d_unqualified_name+0x7e>
- 800234a: 4620 mov r0, r4
- 800234c: f7fe f8f2 bl 8000534 <d_source_name>
- 8002350: 462a mov r2, r5
- 8002352: 4603 mov r3, r0
- 8002354: 2136 movs r1, #54 ; 0x36
- 8002356: 4620 mov r0, r4
- 8002358: f7fd ff72 bl 8000240 <d_make_comp>
- 800235c: 4605 mov r5, r0
- 800235e: e7d4 b.n 800230a <d_unqualified_name+0x7e>
- 8002360: 3101 adds r1, #1
- 8002362: 60c1 str r1, [r0, #12]
- 8002364: f7fe f8e6 bl 8000534 <d_source_name>
- 8002368: 4605 mov r5, r0
- 800236a: b120 cbz r0, 8002376 <d_unqualified_name+0xea>
- 800236c: 4620 mov r0, r4
- 800236e: f7fe fa0f bl 8000790 <d_discriminator>
- 8002372: 2800 cmp r0, #0
- 8002374: d1c9 bne.n 800230a <d_unqualified_name+0x7e>
- 8002376: 2500 movs r5, #0
- 8002378: 4628 mov r0, r5
- 800237a: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
- 800237e: 2500 movs r5, #0
- 8002380: e7c5 b.n 800230e <d_unqualified_name+0x82>
- 8002382: 6ac2 ldr r2, [r0, #44] ; 0x2c
- 8002384: b132 cbz r2, 8002394 <d_unqualified_name+0x108>
- 8002386: 7810 ldrb r0, [r2, #0]
- 8002388: b9e0 cbnz r0, 80023c4 <d_unqualified_name+0x138>
- 800238a: 6b23 ldr r3, [r4, #48] ; 0x30
- 800238c: 68d0 ldr r0, [r2, #12]
- 800238e: 4403 add r3, r0
- 8002390: 6323 str r3, [r4, #48] ; 0x30
- 8002392: 780b ldrb r3, [r1, #0]
- 8002394: 2b43 cmp r3, #67 ; 0x43
- 8002396: d018 beq.n 80023ca <d_unqualified_name+0x13e>
- 8002398: 2b44 cmp r3, #68 ; 0x44
- 800239a: d1f0 bne.n 800237e <d_unqualified_name+0xf2>
- 800239c: 784b ldrb r3, [r1, #1]
- 800239e: 3b30 subs r3, #48 ; 0x30
- 80023a0: 2b05 cmp r3, #5
- 80023a2: d8e8 bhi.n 8002376 <d_unqualified_name+0xea>
- 80023a4: a001 add r0, pc, #4 ; (adr r0, 80023ac <d_unqualified_name+0x120>)
- 80023a6: f850 f023 ldr.w pc, [r0, r3, lsl #2]
- 80023aa: bf00 nop
- 80023ac: 0800241d .word 0x0800241d
- 80023b0: 080023e7 .word 0x080023e7
- 80023b4: 0800242f .word 0x0800242f
- 80023b8: 08002377 .word 0x08002377
- 80023bc: 08002429 .word 0x08002429
- 80023c0: 08002423 .word 0x08002423
- 80023c4: 2818 cmp r0, #24
- 80023c6: d1e5 bne.n 8002394 <d_unqualified_name+0x108>
- 80023c8: e7df b.n 800238a <d_unqualified_name+0xfe>
- 80023ca: 784b ldrb r3, [r1, #1]
- 80023cc: 2b49 cmp r3, #73 ; 0x49
- 80023ce: f000 80b0 beq.w 8002532 <d_unqualified_name+0x2a6>
- 80023d2: 3b31 subs r3, #49 ; 0x31
- 80023d4: 2b04 cmp r3, #4
- 80023d6: d8ce bhi.n 8002376 <d_unqualified_name+0xea>
- 80023d8: e8df f013 tbh [pc, r3, lsl #1]
- 80023dc: 005100ed .word 0x005100ed
- 80023e0: 0047004c .word 0x0047004c
- 80023e4: 002c .short 0x002c
- 80023e6: f04f 0c02 mov.w ip, #2
- 80023ea: e9d4 3005 ldrd r3, r0, [r4, #20]
- 80023ee: 1c8d adds r5, r1, #2
- 80023f0: 4283 cmp r3, r0
- 80023f2: 60e5 str r5, [r4, #12]
- 80023f4: f280 80d0 bge.w 8002598 <d_unqualified_name+0x30c>
- 80023f8: 6926 ldr r6, [r4, #16]
- 80023fa: 0118 lsls r0, r3, #4
- 80023fc: 1835 adds r5, r6, r0
- 80023fe: 3301 adds r3, #1
- 8002400: 2700 movs r7, #0
- 8002402: 606f str r7, [r5, #4]
- 8002404: 6163 str r3, [r4, #20]
- 8002406: 2a00 cmp r2, #0
- 8002408: f000 80cf beq.w 80025aa <d_unqualified_name+0x31e>
- 800240c: 2308 movs r3, #8
- 800240e: 606f str r7, [r5, #4]
- 8002410: 5433 strb r3, [r6, r0]
- 8002412: f885 c008 strb.w ip, [r5, #8]
- 8002416: 60ea str r2, [r5, #12]
- 8002418: 788b ldrb r3, [r1, #2]
- 800241a: e778 b.n 800230e <d_unqualified_name+0x82>
- 800241c: f04f 0c01 mov.w ip, #1
- 8002420: e7e3 b.n 80023ea <d_unqualified_name+0x15e>
- 8002422: f04f 0c05 mov.w ip, #5
- 8002426: e7e0 b.n 80023ea <d_unqualified_name+0x15e>
- 8002428: f04f 0c04 mov.w ip, #4
- 800242c: e7dd b.n 80023ea <d_unqualified_name+0x15e>
- 800242e: f04f 0c03 mov.w ip, #3
- 8002432: e7da b.n 80023ea <d_unqualified_name+0x15e>
- 8002434: 3102 adds r1, #2
- 8002436: 60e1 str r1, [r4, #12]
- 8002438: f04f 0805 mov.w r8, #5
- 800243c: e9d4 3005 ldrd r3, r0, [r4, #20]
- 8002440: 4283 cmp r3, r0
- 8002442: f280 80ac bge.w 800259e <d_unqualified_name+0x312>
- 8002446: 6926 ldr r6, [r4, #16]
- 8002448: 0118 lsls r0, r3, #4
- 800244a: 1835 adds r5, r6, r0
- 800244c: 3301 adds r3, #1
- 800244e: 2700 movs r7, #0
- 8002450: 606f str r7, [r5, #4]
- 8002452: 6163 str r3, [r4, #20]
- 8002454: 2a00 cmp r2, #0
- 8002456: f000 80ab beq.w 80025b0 <d_unqualified_name+0x324>
- 800245a: 2307 movs r3, #7
- 800245c: 606f str r7, [r5, #4]
- 800245e: 5433 strb r3, [r6, r0]
- 8002460: f885 8008 strb.w r8, [r5, #8]
- 8002464: 60ea str r2, [r5, #12]
- 8002466: 780b ldrb r3, [r1, #0]
- 8002468: e751 b.n 800230e <d_unqualified_name+0x82>
- 800246a: 3102 adds r1, #2
- 800246c: 60e1 str r1, [r4, #12]
- 800246e: f04f 0804 mov.w r8, #4
- 8002472: e7e3 b.n 800243c <d_unqualified_name+0x1b0>
- 8002474: 3102 adds r1, #2
- 8002476: 60e1 str r1, [r4, #12]
- 8002478: f04f 0803 mov.w r8, #3
- 800247c: e7de b.n 800243c <d_unqualified_name+0x1b0>
- 800247e: 3102 adds r1, #2
- 8002480: 60e1 str r1, [r4, #12]
- 8002482: f04f 0802 mov.w r8, #2
- 8002486: e7d9 b.n 800243c <d_unqualified_name+0x1b0>
- 8002488: 1c4b adds r3, r1, #1
- 800248a: 60c3 str r3, [r0, #12]
- 800248c: 784b ldrb r3, [r1, #1]
- 800248e: 2b6c cmp r3, #108 ; 0x6c
- 8002490: f47f af75 bne.w 800237e <d_unqualified_name+0xf2>
- 8002494: 3102 adds r1, #2
- 8002496: 60c1 str r1, [r0, #12]
- 8002498: f7ff fdc2 bl 8002020 <d_parmlist>
- 800249c: 4606 mov r6, r0
- 800249e: 2800 cmp r0, #0
- 80024a0: d070 beq.n 8002584 <d_unqualified_name+0x2f8>
- 80024a2: 68e2 ldr r2, [r4, #12]
- 80024a4: 7813 ldrb r3, [r2, #0]
- 80024a6: 2b45 cmp r3, #69 ; 0x45
- 80024a8: f47f af69 bne.w 800237e <d_unqualified_name+0xf2>
- 80024ac: 3201 adds r2, #1
- 80024ae: 60e2 str r2, [r4, #12]
- 80024b0: 4620 mov r0, r4
- 80024b2: f7fe f803 bl 80004bc <d_compact_number>
- 80024b6: f1b0 0e00 subs.w lr, r0, #0
- 80024ba: db63 blt.n 8002584 <d_unqualified_name+0x2f8>
- 80024bc: e9d4 3205 ldrd r3, r2, [r4, #20]
- 80024c0: 4293 cmp r3, r2
- 80024c2: 68e0 ldr r0, [r4, #12]
- 80024c4: db1b blt.n 80024fe <d_unqualified_name+0x272>
- 80024c6: 7803 ldrb r3, [r0, #0]
- 80024c8: 2500 movs r5, #0
- 80024ca: e720 b.n 800230e <d_unqualified_name+0x82>
- 80024cc: 6926 ldr r6, [r4, #16]
- 80024ce: 6a22 ldr r2, [r4, #32]
- 80024d0: f8d4 e024 ldr.w lr, [r4, #36] ; 0x24
- 80024d4: 0119 lsls r1, r3, #4
- 80024d6: 1875 adds r5, r6, r1
- 80024d8: 3301 adds r3, #1
- 80024da: f04f 0c00 mov.w ip, #0
- 80024de: f8c5 c004 str.w ip, [r5, #4]
- 80024e2: 4572 cmp r2, lr
- 80024e4: 6163 str r3, [r4, #20]
- 80024e6: f04f 0347 mov.w r3, #71 ; 0x47
- 80024ea: 5473 strb r3, [r6, r1]
- 80024ec: 60a8 str r0, [r5, #8]
- 80024ee: da4d bge.n 800258c <d_unqualified_name+0x300>
- 80024f0: 69e3 ldr r3, [r4, #28]
- 80024f2: f843 5022 str.w r5, [r3, r2, lsl #2]
- 80024f6: 3201 adds r2, #1
- 80024f8: 6222 str r2, [r4, #32]
- 80024fa: 783b ldrb r3, [r7, #0]
- 80024fc: e707 b.n 800230e <d_unqualified_name+0x82>
- 80024fe: 6927 ldr r7, [r4, #16]
- 8002500: 6a22 ldr r2, [r4, #32]
- 8002502: f8d4 8024 ldr.w r8, [r4, #36] ; 0x24
- 8002506: 0119 lsls r1, r3, #4
- 8002508: 187d adds r5, r7, r1
- 800250a: 3301 adds r3, #1
- 800250c: f04f 0c00 mov.w ip, #0
- 8002510: f8c5 c004 str.w ip, [r5, #4]
- 8002514: 4542 cmp r2, r8
- 8002516: 6163 str r3, [r4, #20]
- 8002518: f04f 0345 mov.w r3, #69 ; 0x45
- 800251c: 547b strb r3, [r7, r1]
- 800251e: e9c5 6e02 strd r6, lr, [r5, #8]
- 8002522: da36 bge.n 8002592 <d_unqualified_name+0x306>
- 8002524: 69e3 ldr r3, [r4, #28]
- 8002526: f843 5022 str.w r5, [r3, r2, lsl #2]
- 800252a: 3201 adds r2, #1
- 800252c: 6222 str r2, [r4, #32]
- 800252e: 7803 ldrb r3, [r0, #0]
- 8002530: e6ed b.n 800230e <d_unqualified_name+0x82>
- 8002532: 1c4b adds r3, r1, #1
- 8002534: 60e3 str r3, [r4, #12]
- 8002536: 788b ldrb r3, [r1, #2]
- 8002538: 3b31 subs r3, #49 ; 0x31
- 800253a: 2b04 cmp r3, #4
- 800253c: d832 bhi.n 80025a4 <d_unqualified_name+0x318>
- 800253e: e8df f003 tbb [pc, r3]
- 8002542: 1c03 .short 0x1c03
- 8002544: 1217 .short 0x1217
- 8002546: 0d .byte 0x0d
- 8002547: 00 .byte 0x00
- 8002548: 3103 adds r1, #3
- 800254a: 60e1 str r1, [r4, #12]
- 800254c: f04f 0801 mov.w r8, #1
- 8002550: 4620 mov r0, r4
- 8002552: f7ff f8f5 bl 8001740 <d_type>
- 8002556: 6ae2 ldr r2, [r4, #44] ; 0x2c
- 8002558: 68e1 ldr r1, [r4, #12]
- 800255a: e76f b.n 800243c <d_unqualified_name+0x1b0>
- 800255c: 3103 adds r1, #3
- 800255e: 60e1 str r1, [r4, #12]
- 8002560: f04f 0805 mov.w r8, #5
- 8002564: e7f4 b.n 8002550 <d_unqualified_name+0x2c4>
- 8002566: 3103 adds r1, #3
- 8002568: 60e1 str r1, [r4, #12]
- 800256a: f04f 0804 mov.w r8, #4
- 800256e: e7ef b.n 8002550 <d_unqualified_name+0x2c4>
- 8002570: 3103 adds r1, #3
- 8002572: 60e1 str r1, [r4, #12]
- 8002574: f04f 0803 mov.w r8, #3
- 8002578: e7ea b.n 8002550 <d_unqualified_name+0x2c4>
- 800257a: 3103 adds r1, #3
- 800257c: 60e1 str r1, [r4, #12]
- 800257e: f04f 0802 mov.w r8, #2
- 8002582: e7e5 b.n 8002550 <d_unqualified_name+0x2c4>
- 8002584: 68e3 ldr r3, [r4, #12]
- 8002586: 2500 movs r5, #0
- 8002588: 781b ldrb r3, [r3, #0]
- 800258a: e6c0 b.n 800230e <d_unqualified_name+0x82>
- 800258c: 783b ldrb r3, [r7, #0]
- 800258e: 4665 mov r5, ip
- 8002590: e6bd b.n 800230e <d_unqualified_name+0x82>
- 8002592: 7803 ldrb r3, [r0, #0]
- 8002594: 4665 mov r5, ip
- 8002596: e6ba b.n 800230e <d_unqualified_name+0x82>
- 8002598: 788b ldrb r3, [r1, #2]
- 800259a: 2500 movs r5, #0
- 800259c: e6b7 b.n 800230e <d_unqualified_name+0x82>
- 800259e: 780b ldrb r3, [r1, #0]
- 80025a0: 2500 movs r5, #0
- 80025a2: e6b4 b.n 800230e <d_unqualified_name+0x82>
- 80025a4: 784b ldrb r3, [r1, #1]
- 80025a6: 2500 movs r5, #0
- 80025a8: e6b1 b.n 800230e <d_unqualified_name+0x82>
- 80025aa: 788b ldrb r3, [r1, #2]
- 80025ac: 4615 mov r5, r2
- 80025ae: e6ae b.n 800230e <d_unqualified_name+0x82>
- 80025b0: 780b ldrb r3, [r1, #0]
- 80025b2: 4615 mov r5, r2
- 80025b4: e6ab b.n 800230e <d_unqualified_name+0x82>
- 80025b6: 3102 adds r1, #2
- 80025b8: 60e1 str r1, [r4, #12]
- 80025ba: f04f 0801 mov.w r8, #1
- 80025be: e73d b.n 800243c <d_unqualified_name+0x1b0>
- 80025c0: 080125b8 .word 0x080125b8
-
-080025c4 <d_encoding>:
- 80025c4: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
- 80025c8: 68c3 ldr r3, [r0, #12]
- 80025ca: 781a ldrb r2, [r3, #0]
- 80025cc: 2a47 cmp r2, #71 ; 0x47
- 80025ce: 4604 mov r4, r0
- 80025d0: d019 beq.n 8002606 <d_encoding+0x42>
- 80025d2: 2a54 cmp r2, #84 ; 0x54
- 80025d4: d017 beq.n 8002606 <d_encoding+0x42>
- 80025d6: 460e mov r6, r1
- 80025d8: f7fe ff06 bl 80013e8 <d_name>
- 80025dc: 4605 mov r5, r0
- 80025de: 2800 cmp r0, #0
- 80025e0: d07d beq.n 80026de <d_encoding+0x11a>
- 80025e2: 2e00 cmp r6, #0
- 80025e4: d057 beq.n 8002696 <d_encoding+0xd2>
- 80025e6: 68a3 ldr r3, [r4, #8]
- 80025e8: 07db lsls r3, r3, #31
- 80025ea: d454 bmi.n 8002696 <d_encoding+0xd2>
- 80025ec: e000 b.n 80025f0 <d_encoding+0x2c>
- 80025ee: 68ad ldr r5, [r5, #8]
- 80025f0: 782b ldrb r3, [r5, #0]
- 80025f2: f1a3 021c sub.w r2, r3, #28
- 80025f6: 2a04 cmp r2, #4
- 80025f8: d9f9 bls.n 80025ee <d_encoding+0x2a>
- 80025fa: 2b02 cmp r3, #2
- 80025fc: f000 8186 beq.w 800290c <d_encoding+0x348>
- 8002600: 4628 mov r0, r5
- 8002602: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
- 8002606: 6b21 ldr r1, [r4, #48] ; 0x30
- 8002608: f101 0214 add.w r2, r1, #20
- 800260c: 6322 str r2, [r4, #48] ; 0x30
- 800260e: 781a ldrb r2, [r3, #0]
- 8002610: 2a54 cmp r2, #84 ; 0x54
- 8002612: d068 beq.n 80026e6 <d_encoding+0x122>
- 8002614: 2a47 cmp r2, #71 ; 0x47
- 8002616: d162 bne.n 80026de <d_encoding+0x11a>
- 8002618: 1c5a adds r2, r3, #1
- 800261a: 60e2 str r2, [r4, #12]
- 800261c: 785a ldrb r2, [r3, #1]
- 800261e: 2a00 cmp r2, #0
- 8002620: d05d beq.n 80026de <d_encoding+0x11a>
- 8002622: 1c9a adds r2, r3, #2
- 8002624: 60e2 str r2, [r4, #12]
- 8002626: 785a ldrb r2, [r3, #1]
- 8002628: 3a41 subs r2, #65 ; 0x41
- 800262a: 2a31 cmp r2, #49 ; 0x31
- 800262c: d857 bhi.n 80026de <d_encoding+0x11a>
- 800262e: e8df f012 tbh [pc, r2, lsl #1]
- 8002632: 013e .short 0x013e
- 8002634: 00560056 .word 0x00560056
- 8002638: 00560056 .word 0x00560056
- 800263c: 00560056 .word 0x00560056
- 8002640: 00560056 .word 0x00560056
- 8002644: 00560056 .word 0x00560056
- 8002648: 00560056 .word 0x00560056
- 800264c: 00560056 .word 0x00560056
- 8002650: 00560056 .word 0x00560056
- 8002654: 0056014a .word 0x0056014a
- 8002658: 00560159 .word 0x00560159
- 800265c: 005600e0 .word 0x005600e0
- 8002660: 00560056 .word 0x00560056
- 8002664: 00560056 .word 0x00560056
- 8002668: 00560056 .word 0x00560056
- 800266c: 00560056 .word 0x00560056
- 8002670: 00560056 .word 0x00560056
- 8002674: 00560056 .word 0x00560056
- 8002678: 00560056 .word 0x00560056
- 800267c: 00560056 .word 0x00560056
- 8002680: 00560056 .word 0x00560056
- 8002684: 00560056 .word 0x00560056
- 8002688: 00560056 .word 0x00560056
- 800268c: 00560056 .word 0x00560056
- 8002690: 00560056 .word 0x00560056
- 8002694: 00eb .short 0x00eb
- 8002696: 68e3 ldr r3, [r4, #12]
- 8002698: 781b ldrb r3, [r3, #0]
- 800269a: 2b00 cmp r3, #0
- 800269c: d0b0 beq.n 8002600 <d_encoding+0x3c>
- 800269e: 2b45 cmp r3, #69 ; 0x45
- 80026a0: d0ae beq.n 8002600 <d_encoding+0x3c>
- 80026a2: 4629 mov r1, r5
- 80026a4: 780b ldrb r3, [r1, #0]
- 80026a6: 2b20 cmp r3, #32
- 80026a8: f200 8218 bhi.w 8002adc <d_encoding+0x518>
- 80026ac: 2b1c cmp r3, #28
- 80026ae: f080 821e bcs.w 8002aee <d_encoding+0x52a>
- 80026b2: 2b04 cmp r3, #4
- 80026b4: f040 8091 bne.w 80027da <d_encoding+0x216>
- 80026b8: 688a ldr r2, [r1, #8]
- 80026ba: b16a cbz r2, 80026d8 <d_encoding+0x114>
- 80026bc: 7813 ldrb r3, [r2, #0]
- 80026be: 2b08 cmp r3, #8
- 80026c0: f103 31ff add.w r1, r3, #4294967295 ; 0xffffffff
- 80026c4: f200 8086 bhi.w 80027d4 <d_encoding+0x210>
- 80026c8: 2b07 cmp r3, #7
- 80026ca: f080 8086 bcs.w 80027da <d_encoding+0x216>
- 80026ce: 2901 cmp r1, #1
- 80026d0: d802 bhi.n 80026d8 <d_encoding+0x114>
- 80026d2: 68d2 ldr r2, [r2, #12]
- 80026d4: 2a00 cmp r2, #0
- 80026d6: d1f1 bne.n 80026bc <d_encoding+0xf8>
- 80026d8: 2101 movs r1, #1
- 80026da: e07f b.n 80027dc <d_encoding+0x218>
- 80026dc: 60e7 str r7, [r4, #12]
- 80026de: 2500 movs r5, #0
- 80026e0: 4628 mov r0, r5
- 80026e2: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
- 80026e6: 1c5a adds r2, r3, #1
- 80026e8: 60e2 str r2, [r4, #12]
- 80026ea: 785a ldrb r2, [r3, #1]
- 80026ec: 2a00 cmp r2, #0
- 80026ee: d0f6 beq.n 80026de <d_encoding+0x11a>
- 80026f0: 1c9a adds r2, r3, #2
- 80026f2: 60e2 str r2, [r4, #12]
- 80026f4: 785b ldrb r3, [r3, #1]
- 80026f6: 3b43 subs r3, #67 ; 0x43
- 80026f8: 2b33 cmp r3, #51 ; 0x33
- 80026fa: d8f0 bhi.n 80026de <d_encoding+0x11a>
- 80026fc: a201 add r2, pc, #4 ; (adr r2, 8002704 <d_encoding+0x140>)
- 80026fe: f852 f023 ldr.w pc, [r2, r3, lsl #2]
- 8002702: bf00 nop
- 8002704: 08002a59 .word 0x08002a59
- 8002708: 080026df .word 0x080026df
- 800270c: 080026df .word 0x080026df
- 8002710: 08002a43 .word 0x08002a43
- 8002714: 080026df .word 0x080026df
- 8002718: 08002a2d .word 0x08002a2d
- 800271c: 08002a17 .word 0x08002a17
- 8002720: 08002a01 .word 0x08002a01
- 8002724: 080026df .word 0x080026df
- 8002728: 080026df .word 0x080026df
- 800272c: 080026df .word 0x080026df
- 8002730: 080026df .word 0x080026df
- 8002734: 080026df .word 0x080026df
- 8002738: 080026df .word 0x080026df
- 800273c: 080026df .word 0x080026df
- 8002740: 080026df .word 0x080026df
- 8002744: 080029eb .word 0x080029eb
- 8002748: 080029d1 .word 0x080029d1
- 800274c: 080026df .word 0x080026df
- 8002750: 080029b7 .word 0x080029b7
- 8002754: 080029a1 .word 0x080029a1
- 8002758: 080026df .word 0x080026df
- 800275c: 080026df .word 0x080026df
- 8002760: 080026df .word 0x080026df
- 8002764: 080026df .word 0x080026df
- 8002768: 080026df .word 0x080026df
- 800276c: 080026df .word 0x080026df
- 8002770: 080026df .word 0x080026df
- 8002774: 080026df .word 0x080026df
- 8002778: 080026df .word 0x080026df
- 800277c: 080026df .word 0x080026df
- 8002780: 080026df .word 0x080026df
- 8002784: 0800296d .word 0x0800296d
- 8002788: 080026df .word 0x080026df
- 800278c: 080026df .word 0x080026df
- 8002790: 080026df .word 0x080026df
- 8002794: 080026df .word 0x080026df
- 8002798: 08002947 .word 0x08002947
- 800279c: 080026df .word 0x080026df
- 80027a0: 080026df .word 0x080026df
- 80027a4: 080026df .word 0x080026df
- 80027a8: 080026df .word 0x080026df
- 80027ac: 080026df .word 0x080026df
- 80027b0: 080026df .word 0x080026df
- 80027b4: 080026df .word 0x080026df
- 80027b8: 080026df .word 0x080026df
- 80027bc: 080026df .word 0x080026df
- 80027c0: 080026df .word 0x080026df
- 80027c4: 080026df .word 0x080026df
- 80027c8: 080026df .word 0x080026df
- 80027cc: 080026df .word 0x080026df
- 80027d0: 08002921 .word 0x08002921
- 80027d4: 2b34 cmp r3, #52 ; 0x34
- 80027d6: f47f af7f bne.w 80026d8 <d_encoding+0x114>
- 80027da: 2100 movs r1, #0
- 80027dc: 4620 mov r0, r4
- 80027de: f7ff fd15 bl 800220c <d_bare_function_type>
- 80027e2: 462a mov r2, r5
- 80027e4: 4603 mov r3, r0
- 80027e6: 2103 movs r1, #3
- 80027e8: 4620 mov r0, r4
- 80027ea: e8bd 47f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
- 80027ee: f7fd bd27 b.w 8000240 <d_make_comp>
- 80027f2: 4620 mov r0, r4
- 80027f4: f7fe fdf8 bl 80013e8 <d_name>
- 80027f8: 2300 movs r3, #0
- 80027fa: 4602 mov r2, r0
- 80027fc: 2113 movs r1, #19
- 80027fe: 4620 mov r0, r4
- 8002800: e8bd 47f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
- 8002804: f7fd bd1c b.w 8000240 <d_make_comp>
- 8002808: f104 000c add.w r0, r4, #12
- 800280c: f7fd fe12 bl 8000434 <d_number.isra.1>
- 8002810: 2801 cmp r0, #1
- 8002812: f77f af64 ble.w 80026de <d_encoding+0x11a>
- 8002816: 68e3 ldr r3, [r4, #12]
- 8002818: 781a ldrb r2, [r3, #0]
- 800281a: 2a00 cmp r2, #0
- 800281c: f43f af5f beq.w 80026de <d_encoding+0x11a>
- 8002820: 1c5f adds r7, r3, #1
- 8002822: 60e7 str r7, [r4, #12]
- 8002824: 781b ldrb r3, [r3, #0]
- 8002826: 2b5f cmp r3, #95 ; 0x5f
- 8002828: f47f af59 bne.w 80026de <d_encoding+0x11a>
- 800282c: 2200 movs r2, #0
- 800282e: 1e45 subs r5, r0, #1
- 8002830: 4690 mov r8, r2
- 8002832: f04f 0940 mov.w r9, #64 ; 0x40
- 8002836: 783b ldrb r3, [r7, #0]
- 8002838: 2b00 cmp r3, #0
- 800283a: f43f af50 beq.w 80026de <d_encoding+0x11a>
- 800283e: 2b24 cmp r3, #36 ; 0x24
- 8002840: f040 812a bne.w 8002a98 <d_encoding+0x4d4>
- 8002844: 787b ldrb r3, [r7, #1]
- 8002846: 2b53 cmp r3, #83 ; 0x53
- 8002848: f000 8156 beq.w 8002af8 <d_encoding+0x534>
- 800284c: 2b5f cmp r3, #95 ; 0x5f
- 800284e: f000 8155 beq.w 8002afc <d_encoding+0x538>
- 8002852: 2b24 cmp r3, #36 ; 0x24
- 8002854: f47f af43 bne.w 80026de <d_encoding+0x11a>
- 8002858: 4619 mov r1, r3
- 800285a: e9d4 0305 ldrd r0, r3, [r4, #20]
- 800285e: 68e7 ldr r7, [r4, #12]
- 8002860: 4298 cmp r0, r3
- 8002862: f107 0702 add.w r7, r7, #2
- 8002866: f6bf af39 bge.w 80026dc <d_encoding+0x118>
- 800286a: f8d4 c010 ldr.w ip, [r4, #16]
- 800286e: 0106 lsls r6, r0, #4
- 8002870: eb0c 0306 add.w r3, ip, r6
- 8002874: 3001 adds r0, #1
- 8002876: f8c3 8004 str.w r8, [r3, #4]
- 800287a: 3d02 subs r5, #2
- 800287c: 6160 str r0, [r4, #20]
- 800287e: f80c 9006 strb.w r9, [ip, r6]
- 8002882: 6099 str r1, [r3, #8]
- 8002884: 60e7 str r7, [r4, #12]
- 8002886: 2a00 cmp r2, #0
- 8002888: f000 8126 beq.w 8002ad8 <d_encoding+0x514>
- 800288c: 213f movs r1, #63 ; 0x3f
- 800288e: 4620 mov r0, r4
- 8002890: f7fd fcd6 bl 8000240 <d_make_comp>
- 8002894: 4602 mov r2, r0
- 8002896: 2800 cmp r0, #0
- 8002898: f43f af21 beq.w 80026de <d_encoding+0x11a>
- 800289c: 2d00 cmp r5, #0
- 800289e: dcca bgt.n 8002836 <d_encoding+0x272>
- 80028a0: 4620 mov r0, r4
- 80028a2: 2300 movs r3, #0
- 80028a4: 213e movs r1, #62 ; 0x3e
- 80028a6: e8bd 47f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
- 80028aa: f7fd bcc9 b.w 8000240 <d_make_comp>
- 80028ae: 2100 movs r1, #0
- 80028b0: 4620 mov r0, r4
- 80028b2: f7ff fe87 bl 80025c4 <d_encoding>
- 80028b6: 2300 movs r3, #0
- 80028b8: 4602 mov r2, r0
- 80028ba: 2117 movs r1, #23
- 80028bc: 4620 mov r0, r4
- 80028be: e8bd 47f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
- 80028c2: f7fd bcbd b.w 8000240 <d_make_comp>
- 80028c6: 4620 mov r0, r4
- 80028c8: f7fe fd8e bl 80013e8 <d_name>
- 80028cc: 4605 mov r5, r0
- 80028ce: 4620 mov r0, r4
- 80028d0: f7fd fddc bl 800048c <d_number_component>
- 80028d4: 462a mov r2, r5
- 80028d6: 4603 mov r3, r0
- 80028d8: 2116 movs r1, #22
- 80028da: 4620 mov r0, r4
- 80028dc: e8bd 47f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
- 80028e0: f7fd bcae b.w 8000240 <d_make_comp>
- 80028e4: 789a ldrb r2, [r3, #2]
- 80028e6: 2100 movs r1, #0
- 80028e8: 4620 mov r0, r4
- 80028ea: b12a cbz r2, 80028f8 <d_encoding+0x334>
- 80028ec: 1cda adds r2, r3, #3
- 80028ee: 60e2 str r2, [r4, #12]
- 80028f0: 789b ldrb r3, [r3, #2]
- 80028f2: 2b6e cmp r3, #110 ; 0x6e
- 80028f4: f000 8109 beq.w 8002b0a <d_encoding+0x546>
- 80028f8: f7ff fe64 bl 80025c4 <d_encoding>
- 80028fc: 2300 movs r3, #0
- 80028fe: 4602 mov r2, r0
- 8002900: 2148 movs r1, #72 ; 0x48
- 8002902: 4620 mov r0, r4
- 8002904: e8bd 47f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
- 8002908: f7fd bc9a b.w 8000240 <d_make_comp>
- 800290c: 68ea ldr r2, [r5, #12]
- 800290e: e000 b.n 8002912 <d_encoding+0x34e>
- 8002910: 6892 ldr r2, [r2, #8]
- 8002912: 7810 ldrb r0, [r2, #0]
- 8002914: f7fd fd80 bl 8000418 <is_fnqual_component_type>
- 8002918: 2800 cmp r0, #0
- 800291a: d1f9 bne.n 8002910 <d_encoding+0x34c>
- 800291c: 60ea str r2, [r5, #12]
- 800291e: e66f b.n 8002600 <d_encoding+0x3c>
- 8002920: 2176 movs r1, #118 ; 0x76
- 8002922: 4620 mov r0, r4
- 8002924: f7fe f80a bl 800093c <d_call_offset>
- 8002928: 2800 cmp r0, #0
- 800292a: f43f aed8 beq.w 80026de <d_encoding+0x11a>
- 800292e: 2100 movs r1, #0
- 8002930: 4620 mov r0, r4
- 8002932: f7ff fe47 bl 80025c4 <d_encoding>
- 8002936: 2300 movs r3, #0
- 8002938: 4602 mov r2, r0
- 800293a: 2110 movs r1, #16
- 800293c: 4620 mov r0, r4
- 800293e: e8bd 47f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
- 8002942: f7fd bc7d b.w 8000240 <d_make_comp>
- 8002946: 2168 movs r1, #104 ; 0x68
- 8002948: 4620 mov r0, r4
- 800294a: f7fd fff7 bl 800093c <d_call_offset>
- 800294e: 2800 cmp r0, #0
- 8002950: f43f aec5 beq.w 80026de <d_encoding+0x11a>
- 8002954: 2100 movs r1, #0
- 8002956: 4620 mov r0, r4
- 8002958: f7ff fe34 bl 80025c4 <d_encoding>
- 800295c: 2300 movs r3, #0
- 800295e: 4602 mov r2, r0
- 8002960: 210f movs r1, #15
- 8002962: 4620 mov r0, r4
- 8002964: e8bd 47f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
- 8002968: f7fd bc6a b.w 8000240 <d_make_comp>
- 800296c: 2100 movs r1, #0
- 800296e: 4620 mov r0, r4
- 8002970: f7fd ffe4 bl 800093c <d_call_offset>
- 8002974: 2800 cmp r0, #0
- 8002976: f43f aeb2 beq.w 80026de <d_encoding+0x11a>
- 800297a: 2100 movs r1, #0
- 800297c: 4620 mov r0, r4
- 800297e: f7fd ffdd bl 800093c <d_call_offset>
- 8002982: 2800 cmp r0, #0
- 8002984: f43f aeab beq.w 80026de <d_encoding+0x11a>
- 8002988: 2100 movs r1, #0
- 800298a: 4620 mov r0, r4
- 800298c: f7ff fe1a bl 80025c4 <d_encoding>
- 8002990: 2300 movs r3, #0
- 8002992: 4602 mov r2, r0
- 8002994: 2111 movs r1, #17
- 8002996: 4620 mov r0, r4
- 8002998: e8bd 47f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
- 800299c: f7fd bc50 b.w 8000240 <d_make_comp>
- 80029a0: 4620 mov r0, r4
- 80029a2: f7fe fd21 bl 80013e8 <d_name>
- 80029a6: 2300 movs r3, #0
- 80029a8: 4602 mov r2, r0
- 80029aa: 2115 movs r1, #21
- 80029ac: 4620 mov r0, r4
- 80029ae: e8bd 47f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
- 80029b2: f7fd bc45 b.w 8000240 <d_make_comp>
- 80029b6: 310f adds r1, #15
- 80029b8: 6321 str r1, [r4, #48] ; 0x30
- 80029ba: 4620 mov r0, r4
- 80029bc: f7fe fec0 bl 8001740 <d_type>
- 80029c0: 2300 movs r3, #0
- 80029c2: 4602 mov r2, r0
- 80029c4: 2109 movs r1, #9
- 80029c6: 4620 mov r0, r4
- 80029c8: e8bd 47f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
- 80029cc: f7fd bc38 b.w 8000240 <d_make_comp>
- 80029d0: 310a adds r1, #10
- 80029d2: 6321 str r1, [r4, #48] ; 0x30
- 80029d4: 4620 mov r0, r4
- 80029d6: f7fe feb3 bl 8001740 <d_type>
- 80029da: 2300 movs r3, #0
- 80029dc: 4602 mov r2, r0
- 80029de: 210a movs r1, #10
- 80029e0: 4620 mov r0, r4
- 80029e2: e8bd 47f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
- 80029e6: f7fd bc2b b.w 8000240 <d_make_comp>
- 80029ea: 4620 mov r0, r4
- 80029ec: f7fe fea8 bl 8001740 <d_type>
- 80029f0: 2300 movs r3, #0
- 80029f2: 4602 mov r2, r0
- 80029f4: 210d movs r1, #13
- 80029f6: 4620 mov r0, r4
- 80029f8: e8bd 47f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
- 80029fc: f7fd bc20 b.w 8000240 <d_make_comp>
- 8002a00: 4620 mov r0, r4
- 8002a02: f7fe fe9d bl 8001740 <d_type>
- 8002a06: 2300 movs r3, #0
- 8002a08: 4602 mov r2, r0
- 8002a0a: 2112 movs r1, #18
- 8002a0c: 4620 mov r0, r4
- 8002a0e: e8bd 47f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
- 8002a12: f7fd bc15 b.w 8000240 <d_make_comp>
- 8002a16: 4620 mov r0, r4
- 8002a18: f7fe fe92 bl 8001740 <d_type>
- 8002a1c: 2300 movs r3, #0
- 8002a1e: 4602 mov r2, r0
- 8002a20: 210c movs r1, #12
- 8002a22: 4620 mov r0, r4
- 8002a24: e8bd 47f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
- 8002a28: f7fd bc0a b.w 8000240 <d_make_comp>
- 8002a2c: 4620 mov r0, r4
- 8002a2e: f7fe fcdb bl 80013e8 <d_name>
- 8002a32: 2300 movs r3, #0
- 8002a34: 4602 mov r2, r0
- 8002a36: 2114 movs r1, #20
- 8002a38: 4620 mov r0, r4
- 8002a3a: e8bd 47f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
- 8002a3e: f7fd bbff b.w 8000240 <d_make_comp>
- 8002a42: 4620 mov r0, r4
- 8002a44: f7fe fe7c bl 8001740 <d_type>
- 8002a48: 2300 movs r3, #0
- 8002a4a: 4602 mov r2, r0
- 8002a4c: 210e movs r1, #14
- 8002a4e: 4620 mov r0, r4
- 8002a50: e8bd 47f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
- 8002a54: f7fd bbf4 b.w 8000240 <d_make_comp>
- 8002a58: 4620 mov r0, r4
- 8002a5a: f7fe fe71 bl 8001740 <d_type>
- 8002a5e: 4605 mov r5, r0
- 8002a60: f104 000c add.w r0, r4, #12
- 8002a64: f7fd fce6 bl 8000434 <d_number.isra.1>
- 8002a68: 2800 cmp r0, #0
- 8002a6a: f6ff ae38 blt.w 80026de <d_encoding+0x11a>
- 8002a6e: 68e3 ldr r3, [r4, #12]
- 8002a70: 781a ldrb r2, [r3, #0]
- 8002a72: 2a5f cmp r2, #95 ; 0x5f
- 8002a74: f47f ae33 bne.w 80026de <d_encoding+0x11a>
- 8002a78: 3301 adds r3, #1
- 8002a7a: 60e3 str r3, [r4, #12]
- 8002a7c: 4620 mov r0, r4
- 8002a7e: f7fe fe5f bl 8001740 <d_type>
- 8002a82: 6b23 ldr r3, [r4, #48] ; 0x30
- 8002a84: 1d59 adds r1, r3, #5
- 8002a86: 6321 str r1, [r4, #48] ; 0x30
- 8002a88: 4602 mov r2, r0
- 8002a8a: 462b mov r3, r5
- 8002a8c: 4620 mov r0, r4
- 8002a8e: 210b movs r1, #11
- 8002a90: e8bd 47f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
- 8002a94: f7fd bbd4 b.w 8000240 <d_make_comp>
- 8002a98: 463e mov r6, r7
- 8002a9a: 2100 movs r1, #0
- 8002a9c: e004 b.n 8002aa8 <d_encoding+0x4e4>
- 8002a9e: f816 3f01 ldrb.w r3, [r6, #1]!
- 8002aa2: b123 cbz r3, 8002aae <d_encoding+0x4ea>
- 8002aa4: 2b24 cmp r3, #36 ; 0x24
- 8002aa6: d002 beq.n 8002aae <d_encoding+0x4ea>
- 8002aa8: 3101 adds r1, #1
- 8002aaa: 42a9 cmp r1, r5
- 8002aac: dbf7 blt.n 8002a9e <d_encoding+0x4da>
- 8002aae: e9d4 3005 ldrd r3, r0, [r4, #20]
- 8002ab2: 4283 cmp r3, r0
- 8002ab4: da24 bge.n 8002b00 <d_encoding+0x53c>
- 8002ab6: e9d4 c603 ldrd ip, r6, [r4, #12]
- 8002aba: 0118 lsls r0, r3, #4
- 8002abc: 3301 adds r3, #1
- 8002abe: 6163 str r3, [r4, #20]
- 8002ac0: 1833 adds r3, r6, r0
- 8002ac2: 1a6d subs r5, r5, r1
- 8002ac4: f8c3 8004 str.w r8, [r3, #4]
- 8002ac8: f806 8000 strb.w r8, [r6, r0]
- 8002acc: 609f str r7, [r3, #8]
- 8002ace: eb0c 0701 add.w r7, ip, r1
- 8002ad2: 60d9 str r1, [r3, #12]
- 8002ad4: 60e7 str r7, [r4, #12]
- 8002ad6: e6d6 b.n 8002886 <d_encoding+0x2c2>
- 8002ad8: 461a mov r2, r3
- 8002ada: e6df b.n 800289c <d_encoding+0x2d8>
- 8002adc: 2b4c cmp r3, #76 ; 0x4c
- 8002ade: f1a3 024e sub.w r2, r3, #78 ; 0x4e
- 8002ae2: d004 beq.n 8002aee <d_encoding+0x52a>
- 8002ae4: f4ff ae79 bcc.w 80027da <d_encoding+0x216>
- 8002ae8: 2a01 cmp r2, #1
- 8002aea: f63f ae76 bhi.w 80027da <d_encoding+0x216>
- 8002aee: 6889 ldr r1, [r1, #8]
- 8002af0: 2900 cmp r1, #0
- 8002af2: f47f add7 bne.w 80026a4 <d_encoding+0xe0>
- 8002af6: e671 b.n 80027dc <d_encoding+0x218>
- 8002af8: 212f movs r1, #47 ; 0x2f
- 8002afa: e6ae b.n 800285a <d_encoding+0x296>
- 8002afc: 212e movs r1, #46 ; 0x2e
- 8002afe: e6ac b.n 800285a <d_encoding+0x296>
- 8002b00: 68e3 ldr r3, [r4, #12]
- 8002b02: 440b add r3, r1
- 8002b04: 60e3 str r3, [r4, #12]
- 8002b06: 2500 movs r5, #0
- 8002b08: e57a b.n 8002600 <d_encoding+0x3c>
- 8002b0a: f7ff fd5b bl 80025c4 <d_encoding>
- 8002b0e: 2300 movs r3, #0
- 8002b10: 4602 mov r2, r0
- 8002b12: 2149 movs r1, #73 ; 0x49
- 8002b14: 4620 mov r0, r4
- 8002b16: e8bd 47f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
- 8002b1a: f7fd bb91 b.w 8000240 <d_make_comp>
- 8002b1e: bf00 nop
-
-08002b20 <d_expr_primary>:
- 8002b20: b5f8 push {r3, r4, r5, r6, r7, lr}
- 8002b22: 68c2 ldr r2, [r0, #12]
- 8002b24: 7813 ldrb r3, [r2, #0]
- 8002b26: 2b4c cmp r3, #76 ; 0x4c
- 8002b28: d144 bne.n 8002bb4 <d_expr_primary+0x94>
- 8002b2a: 1c53 adds r3, r2, #1
- 8002b2c: 60c3 str r3, [r0, #12]
- 8002b2e: 7851 ldrb r1, [r2, #1]
- 8002b30: 295f cmp r1, #95 ; 0x5f
- 8002b32: 4604 mov r4, r0
- 8002b34: d040 beq.n 8002bb8 <d_expr_primary+0x98>
- 8002b36: 295a cmp r1, #90 ; 0x5a
- 8002b38: d10c bne.n 8002b54 <d_expr_primary+0x34>
- 8002b3a: 3301 adds r3, #1
- 8002b3c: 60e3 str r3, [r4, #12]
- 8002b3e: 2100 movs r1, #0
- 8002b40: 4620 mov r0, r4
- 8002b42: f7ff fd3f bl 80025c4 <d_encoding>
- 8002b46: 68e3 ldr r3, [r4, #12]
- 8002b48: 781a ldrb r2, [r3, #0]
- 8002b4a: 2a45 cmp r2, #69 ; 0x45
- 8002b4c: d132 bne.n 8002bb4 <d_expr_primary+0x94>
- 8002b4e: 3301 adds r3, #1
- 8002b50: 60e3 str r3, [r4, #12]
- 8002b52: bdf8 pop {r3, r4, r5, r6, r7, pc}
- 8002b54: f7fe fdf4 bl 8001740 <d_type>
- 8002b58: b360 cbz r0, 8002bb4 <d_expr_primary+0x94>
- 8002b5a: 7803 ldrb r3, [r0, #0]
- 8002b5c: 2b27 cmp r3, #39 ; 0x27
- 8002b5e: d032 beq.n 8002bc6 <d_expr_primary+0xa6>
- 8002b60: 68e6 ldr r6, [r4, #12]
- 8002b62: 7833 ldrb r3, [r6, #0]
- 8002b64: 2b6e cmp r3, #110 ; 0x6e
- 8002b66: d037 beq.n 8002bd8 <d_expr_primary+0xb8>
- 8002b68: 213c movs r1, #60 ; 0x3c
- 8002b6a: 2b45 cmp r3, #69 ; 0x45
- 8002b6c: d040 beq.n 8002bf0 <d_expr_primary+0xd0>
- 8002b6e: b30b cbz r3, 8002bb4 <d_expr_primary+0x94>
- 8002b70: 4633 mov r3, r6
- 8002b72: e000 b.n 8002b76 <d_expr_primary+0x56>
- 8002b74: b1f5 cbz r5, 8002bb4 <d_expr_primary+0x94>
- 8002b76: 3301 adds r3, #1
- 8002b78: 60e3 str r3, [r4, #12]
- 8002b7a: 781d ldrb r5, [r3, #0]
- 8002b7c: 2d45 cmp r5, #69 ; 0x45
- 8002b7e: d1f9 bne.n 8002b74 <d_expr_primary+0x54>
- 8002b80: 1b9d subs r5, r3, r6
- 8002b82: e9d4 2305 ldrd r2, r3, [r4, #20]
- 8002b86: 429a cmp r2, r3
- 8002b88: da0b bge.n 8002ba2 <d_expr_primary+0x82>
- 8002b8a: f8d4 e010 ldr.w lr, [r4, #16]
- 8002b8e: ea4f 1c02 mov.w ip, r2, lsl #4
- 8002b92: eb0e 030c add.w r3, lr, ip
- 8002b96: 3201 adds r2, #1
- 8002b98: 2700 movs r7, #0
- 8002b9a: 605f str r7, [r3, #4]
- 8002b9c: 6162 str r2, [r4, #20]
- 8002b9e: b106 cbz r6, 8002ba2 <d_expr_primary+0x82>
- 8002ba0: bb05 cbnz r5, 8002be4 <d_expr_primary+0xc4>
- 8002ba2: 2300 movs r3, #0
- 8002ba4: 4602 mov r2, r0
- 8002ba6: 4620 mov r0, r4
- 8002ba8: f7fd fb4a bl 8000240 <d_make_comp>
- 8002bac: 68e3 ldr r3, [r4, #12]
- 8002bae: 781a ldrb r2, [r3, #0]
- 8002bb0: 2a45 cmp r2, #69 ; 0x45
- 8002bb2: d0cc beq.n 8002b4e <d_expr_primary+0x2e>
- 8002bb4: 2000 movs r0, #0
- 8002bb6: bdf8 pop {r3, r4, r5, r6, r7, pc}
- 8002bb8: 1c93 adds r3, r2, #2
- 8002bba: 60c3 str r3, [r0, #12]
- 8002bbc: 7892 ldrb r2, [r2, #2]
- 8002bbe: 2a5a cmp r2, #90 ; 0x5a
- 8002bc0: d0bb beq.n 8002b3a <d_expr_primary+0x1a>
- 8002bc2: 2000 movs r0, #0
- 8002bc4: e7c1 b.n 8002b4a <d_expr_primary+0x2a>
- 8002bc6: 6883 ldr r3, [r0, #8]
- 8002bc8: 7c1a ldrb r2, [r3, #16]
- 8002bca: 2a00 cmp r2, #0
- 8002bcc: d0c8 beq.n 8002b60 <d_expr_primary+0x40>
- 8002bce: 685a ldr r2, [r3, #4]
- 8002bd0: 6b23 ldr r3, [r4, #48] ; 0x30
- 8002bd2: 1a9b subs r3, r3, r2
- 8002bd4: 6323 str r3, [r4, #48] ; 0x30
- 8002bd6: e7c3 b.n 8002b60 <d_expr_primary+0x40>
- 8002bd8: 1c72 adds r2, r6, #1
- 8002bda: 60e2 str r2, [r4, #12]
- 8002bdc: 7873 ldrb r3, [r6, #1]
- 8002bde: 213d movs r1, #61 ; 0x3d
- 8002be0: 4616 mov r6, r2
- 8002be2: e7c2 b.n 8002b6a <d_expr_primary+0x4a>
- 8002be4: 605f str r7, [r3, #4]
- 8002be6: f80e 700c strb.w r7, [lr, ip]
- 8002bea: e9c3 6502 strd r6, r5, [r3, #8]
- 8002bee: e7d9 b.n 8002ba4 <d_expr_primary+0x84>
- 8002bf0: 2500 movs r5, #0
- 8002bf2: e7c6 b.n 8002b82 <d_expr_primary+0x62>
-
-08002bf4 <d_print_comp>:
- 8002bf4: b112 cbz r2, 8002bfc <d_print_comp+0x8>
- 8002bf6: 6853 ldr r3, [r2, #4]
- 8002bf8: 2b01 cmp r3, #1
- 8002bfa: dd03 ble.n 8002c04 <d_print_comp+0x10>
- 8002bfc: 2301 movs r3, #1
- 8002bfe: f8c0 3118 str.w r3, [r0, #280] ; 0x118
- 8002c02: 4770 bx lr
- 8002c04: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
- 8002c08: 4615 mov r5, r2
- 8002c0a: 1c5a adds r2, r3, #1
- 8002c0c: 606a str r2, [r5, #4]
- 8002c0e: b099 sub sp, #100 ; 0x64
- 8002c10: f8d0 7118 ldr.w r7, [r0, #280] ; 0x118
- 8002c14: 9504 str r5, [sp, #16]
- 8002c16: 460e mov r6, r1
- 8002c18: ab04 add r3, sp, #16
- 8002c1a: f8d0 1128 ldr.w r1, [r0, #296] ; 0x128
- 8002c1e: 9105 str r1, [sp, #20]
- 8002c20: 4604 mov r4, r0
- 8002c22: f8c0 3128 str.w r3, [r0, #296] ; 0x128
- 8002c26: 2f00 cmp r7, #0
- 8002c28: f040 80d7 bne.w 8002dda <d_print_comp+0x1e6>
- 8002c2c: 7828 ldrb r0, [r5, #0]
- 8002c2e: 284f cmp r0, #79 ; 0x4f
- 8002c30: f201 82ef bhi.w 8004212 <d_print_comp+0x161e>
- 8002c34: e8df f010 tbh [pc, r0, lsl #1]
- 8002c38: 0ab80a87 .word 0x0ab80a87
- 8002c3c: 0a4f0ab8 .word 0x0a4f0ab8
- 8002c40: 079407c6 .word 0x079407c6
- 8002c44: 075e0767 .word 0x075e0767
- 8002c48: 070f0737 .word 0x070f0737
- 8002c4c: 06bf06e7 .word 0x06bf06e7
- 8002c50: 066f0697 .word 0x066f0697
- 8002c54: 061f0647 .word 0x061f0647
- 8002c58: 091f0947 .word 0x091f0947
- 8002c5c: 08cf08f7 .word 0x08cf08f7
- 8002c60: 087f08a7 .word 0x087f08a7
- 8002c64: 082f0857 .word 0x082f0857
- 8002c68: 09bf09d6 .word 0x09bf09d6
- 8002c6c: 09bf09bf .word 0x09bf09bf
- 8002c70: 09990999 .word 0x09990999
- 8002c74: 09990999 .word 0x09990999
- 8002c78: 09990999 .word 0x09990999
- 8002c7c: 096f0999 .word 0x096f0999
- 8002c80: 0999096f .word 0x0999096f
- 8002c84: 0a1d0999 .word 0x0a1d0999
- 8002c88: 06060a14 .word 0x06060a14
- 8002c8c: 05720592 .word 0x05720592
- 8002c90: 0572051b .word 0x0572051b
- 8002c94: 04d304d3 .word 0x04d304d3
- 8002c98: 045c0488 .word 0x045c0488
- 8002c9c: 0aed0434 .word 0x0aed0434
- 8002ca0: 0404040c .word 0x0404040c
- 8002ca4: 039c03b0 .word 0x039c03b0
- 8002ca8: 038d0397 .word 0x038d0397
- 8002cac: 03880388 .word 0x03880388
- 8002cb0: 03330333 .word 0x03330333
- 8002cb4: 02fe030b .word 0x02fe030b
- 8002cb8: 02aa02dc .word 0x02aa02dc
- 8002cbc: 025a0282 .word 0x025a0282
- 8002cc0: 01f80232 .word 0x01f80232
- 8002cc4: 01d00aed .word 0x01d00aed
- 8002cc8: 015301a8 .word 0x015301a8
- 8002ccc: 017b0105 .word 0x017b0105
- 8002cd0: 00d80999 .word 0x00d80999
- 8002cd4: 09990999 .word 0x09990999
- 8002cd8: 68aa ldr r2, [r5, #8]
- 8002cda: 6893 ldr r3, [r2, #8]
- 8002cdc: 681b ldr r3, [r3, #0]
- 8002cde: 7859 ldrb r1, [r3, #1]
- 8002ce0: 2963 cmp r1, #99 ; 0x63
- 8002ce2: d109 bne.n 8002cf8 <d_print_comp+0x104>
- 8002ce4: 781b ldrb r3, [r3, #0]
- 8002ce6: f1a3 0163 sub.w r1, r3, #99 ; 0x63
- 8002cea: 2901 cmp r1, #1
- 8002cec: f242 8319 bls.w 8005322 <d_print_comp+0x272e>
- 8002cf0: 3b72 subs r3, #114 ; 0x72
- 8002cf2: 2b01 cmp r3, #1
- 8002cf4: f242 8315 bls.w 8005322 <d_print_comp+0x272e>
- 8002cf8: f105 030c add.w r3, r5, #12
- 8002cfc: 4631 mov r1, r6
- 8002cfe: 4620 mov r0, r4
- 8002d00: f003 fcd2 bl 80066a8 <d_maybe_print_fold_expression.isra.20>
- 8002d04: 4680 mov r8, r0
- 8002d06: 2800 cmp r0, #0
- 8002d08: f042 8400 bne.w 800550c <d_print_comp+0x2918>
- 8002d0c: 68ab ldr r3, [r5, #8]
- 8002d0e: 781a ldrb r2, [r3, #0]
- 8002d10: 2a31 cmp r2, #49 ; 0x31
- 8002d12: f002 8592 beq.w 800583a <d_print_comp+0x2c46>
- 8002d16: 689b ldr r3, [r3, #8]
- 8002d18: 49d7 ldr r1, [pc, #860] ; (8003078 <d_print_comp+0x484>)
- 8002d1a: 6818 ldr r0, [r3, #0]
- 8002d1c: f004 f850 bl 8006dc0 <strcmp>
- 8002d20: 68eb ldr r3, [r5, #12]
- 8002d22: 689a ldr r2, [r3, #8]
- 8002d24: b918 cbnz r0, 8002d2e <d_print_comp+0x13a>
- 8002d26: 7813 ldrb r3, [r2, #0]
- 8002d28: 2b03 cmp r3, #3
- 8002d2a: f002 85d4 beq.w 80058d6 <d_print_comp+0x2ce2>
- 8002d2e: 4631 mov r1, r6
- 8002d30: 4620 mov r0, r4
- 8002d32: f003 fc67 bl 8006604 <d_print_subexpr>
- 8002d36: 68af ldr r7, [r5, #8]
- 8002d38: 49d0 ldr r1, [pc, #832] ; (800307c <d_print_comp+0x488>)
- 8002d3a: 68bb ldr r3, [r7, #8]
- 8002d3c: f8d3 8000 ldr.w r8, [r3]
- 8002d40: 4640 mov r0, r8
- 8002d42: f004 f83d bl 8006dc0 <strcmp>
- 8002d46: 4681 mov r9, r0
- 8002d48: 2800 cmp r0, #0
- 8002d4a: f042 83d0 bne.w 80054ee <d_print_comp+0x28fa>
- 8002d4e: f8d4 7100 ldr.w r7, [r4, #256] ; 0x100
- 8002d52: 2fff cmp r7, #255 ; 0xff
- 8002d54: d110 bne.n 8002d78 <d_print_comp+0x184>
- 8002d56: f884 00ff strb.w r0, [r4, #255] ; 0xff
- 8002d5a: 4639 mov r1, r7
- 8002d5c: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8002d60: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8002d64: 4620 mov r0, r4
- 8002d66: 4798 blx r3
- 8002d68: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8002d6c: f8c4 9100 str.w r9, [r4, #256] ; 0x100
- 8002d70: 3301 adds r3, #1
- 8002d72: 464f mov r7, r9
- 8002d74: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8002d78: 1c7a adds r2, r7, #1
- 8002d7a: 235b movs r3, #91 ; 0x5b
- 8002d7c: f8c4 2100 str.w r2, [r4, #256] ; 0x100
- 8002d80: 55e3 strb r3, [r4, r7]
- 8002d82: f884 3104 strb.w r3, [r4, #260] ; 0x104
- 8002d86: 68eb ldr r3, [r5, #12]
- 8002d88: 4631 mov r1, r6
- 8002d8a: 68da ldr r2, [r3, #12]
- 8002d8c: 4620 mov r0, r4
- 8002d8e: f7ff ff31 bl 8002bf4 <d_print_comp>
- 8002d92: f8d4 7100 ldr.w r7, [r4, #256] ; 0x100
- 8002d96: 2fff cmp r7, #255 ; 0xff
- 8002d98: d111 bne.n 8002dbe <d_print_comp+0x1ca>
- 8002d9a: 2600 movs r6, #0
- 8002d9c: 4639 mov r1, r7
- 8002d9e: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8002da2: f884 60ff strb.w r6, [r4, #255] ; 0xff
- 8002da6: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8002daa: 4620 mov r0, r4
- 8002dac: 4798 blx r3
- 8002dae: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8002db2: f8c4 6100 str.w r6, [r4, #256] ; 0x100
- 8002db6: 3301 adds r3, #1
- 8002db8: 4637 mov r7, r6
- 8002dba: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8002dbe: 235d movs r3, #93 ; 0x5d
- 8002dc0: 1c7a adds r2, r7, #1
- 8002dc2: f8c4 2100 str.w r2, [r4, #256] ; 0x100
- 8002dc6: 55e3 strb r3, [r4, r7]
- 8002dc8: f884 3104 strb.w r3, [r4, #260] ; 0x104
- 8002dcc: 68ab ldr r3, [r5, #8]
- 8002dce: 781a ldrb r2, [r3, #0]
- 8002dd0: 2a31 cmp r2, #49 ; 0x31
- 8002dd2: f002 83ad beq.w 8005530 <d_print_comp+0x293c>
- 8002dd6: 9905 ldr r1, [sp, #20]
- 8002dd8: 686a ldr r2, [r5, #4]
- 8002dda: f8c4 1128 str.w r1, [r4, #296] ; 0x128
- 8002dde: 3a01 subs r2, #1
- 8002de0: 606a str r2, [r5, #4]
- 8002de2: b019 add sp, #100 ; 0x64
- 8002de4: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
- 8002de8: 4fa5 ldr r7, [pc, #660] ; (8003080 <d_print_comp+0x48c>)
- 8002dea: 68aa ldr r2, [r5, #8]
- 8002dec: 4631 mov r1, r6
- 8002dee: 4620 mov r0, r4
- 8002df0: f7ff ff00 bl 8002bf4 <d_print_comp>
- 8002df4: f107 0808 add.w r8, r7, #8
- 8002df8: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 8002dfc: f04f 0900 mov.w r9, #0
- 8002e00: e016 b.n 8002e30 <d_print_comp+0x23c>
- 8002e02: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8002e06: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8002e0a: f884 90ff strb.w r9, [r4, #255] ; 0xff
- 8002e0e: 4798 blx r3
- 8002e10: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8002e14: 3301 adds r3, #1
- 8002e16: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8002e1a: 2200 movs r2, #0
- 8002e1c: 2301 movs r3, #1
- 8002e1e: 45b8 cmp r8, r7
- 8002e20: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 8002e24: f804 a002 strb.w sl, [r4, r2]
- 8002e28: f884 a104 strb.w sl, [r4, #260] ; 0x104
- 8002e2c: f001 82f9 beq.w 8004422 <d_print_comp+0x182e>
- 8002e30: 2bff cmp r3, #255 ; 0xff
- 8002e32: 4619 mov r1, r3
- 8002e34: 4620 mov r0, r4
- 8002e36: f817 af01 ldrb.w sl, [r7, #1]!
- 8002e3a: d0e2 beq.n 8002e02 <d_print_comp+0x20e>
- 8002e3c: 461a mov r2, r3
- 8002e3e: 3301 adds r3, #1
- 8002e40: e7ed b.n 8002e1e <d_print_comp+0x22a>
- 8002e42: 68a9 ldr r1, [r5, #8]
- 8002e44: 4620 mov r0, r4
- 8002e46: f7fd fcef bl 8000828 <d_find_pack>
- 8002e4a: 2800 cmp r0, #0
- 8002e4c: f002 81e1 beq.w 8005212 <d_print_comp+0x261e>
- 8002e50: 2300 movs r3, #0
- 8002e52: 7802 ldrb r2, [r0, #0]
- 8002e54: 2a2f cmp r2, #47 ; 0x2f
- 8002e56: f041 85df bne.w 8004a18 <d_print_comp+0x1e24>
- 8002e5a: 6882 ldr r2, [r0, #8]
- 8002e5c: 2a00 cmp r2, #0
- 8002e5e: f001 85db beq.w 8004a18 <d_print_comp+0x1e24>
- 8002e62: 68c0 ldr r0, [r0, #12]
- 8002e64: 3301 adds r3, #1
- 8002e66: 2800 cmp r0, #0
- 8002e68: d1f3 bne.n 8002e52 <d_print_comp+0x25e>
- 8002e6a: 4619 mov r1, r3
- 8002e6c: 68ab ldr r3, [r5, #8]
- 8002e6e: 9301 str r3, [sp, #4]
- 8002e70: 1e4a subs r2, r1, #1
- 8002e72: 9202 str r2, [sp, #8]
- 8002e74: f04f 0a00 mov.w sl, #0
- 8002e78: 4689 mov r9, r1
- 8002e7a: 9503 str r5, [sp, #12]
- 8002e7c: f8c4 7120 str.w r7, [r4, #288] ; 0x120
- 8002e80: 9a01 ldr r2, [sp, #4]
- 8002e82: 4631 mov r1, r6
- 8002e84: 4620 mov r0, r4
- 8002e86: f7ff feb5 bl 8002bf4 <d_print_comp>
- 8002e8a: 9b02 ldr r3, [sp, #8]
- 8002e8c: 429f cmp r7, r3
- 8002e8e: f281 81c6 bge.w 800421e <d_print_comp+0x162a>
- 8002e92: 4d7c ldr r5, [pc, #496] ; (8003084 <d_print_comp+0x490>)
- 8002e94: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 8002e98: f105 0802 add.w r8, r5, #2
- 8002e9c: e016 b.n 8002ecc <d_print_comp+0x2d8>
- 8002e9e: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8002ea2: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8002ea6: f884 a0ff strb.w sl, [r4, #255] ; 0xff
- 8002eaa: 4798 blx r3
- 8002eac: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8002eb0: 3301 adds r3, #1
- 8002eb2: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8002eb6: 2200 movs r2, #0
- 8002eb8: 2301 movs r3, #1
- 8002eba: 45a8 cmp r8, r5
- 8002ebc: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 8002ec0: f804 b002 strb.w fp, [r4, r2]
- 8002ec4: f884 b104 strb.w fp, [r4, #260] ; 0x104
- 8002ec8: f001 81a9 beq.w 800421e <d_print_comp+0x162a>
- 8002ecc: 2bff cmp r3, #255 ; 0xff
- 8002ece: 4619 mov r1, r3
- 8002ed0: 4620 mov r0, r4
- 8002ed2: f815 bb01 ldrb.w fp, [r5], #1
- 8002ed6: d0e2 beq.n 8002e9e <d_print_comp+0x2aa>
- 8002ed8: 461a mov r2, r3
- 8002eda: 3301 adds r3, #1
- 8002edc: e7ed b.n 8002eba <d_print_comp+0x2c6>
- 8002ede: 4f6a ldr r7, [pc, #424] ; (8003088 <d_print_comp+0x494>)
- 8002ee0: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 8002ee4: f107 081a add.w r8, r7, #26
- 8002ee8: f04f 0900 mov.w r9, #0
- 8002eec: e016 b.n 8002f1c <d_print_comp+0x328>
- 8002eee: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8002ef2: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8002ef6: f884 90ff strb.w r9, [r4, #255] ; 0xff
- 8002efa: 4798 blx r3
- 8002efc: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8002f00: 3301 adds r3, #1
- 8002f02: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8002f06: 2200 movs r2, #0
- 8002f08: 2301 movs r3, #1
- 8002f0a: 45b8 cmp r8, r7
- 8002f0c: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 8002f10: f804 a002 strb.w sl, [r4, r2]
- 8002f14: f884 a104 strb.w sl, [r4, #260] ; 0x104
- 8002f18: f001 82f1 beq.w 80044fe <d_print_comp+0x190a>
- 8002f1c: 2bff cmp r3, #255 ; 0xff
- 8002f1e: 4619 mov r1, r3
- 8002f20: 4620 mov r0, r4
- 8002f22: f817 af01 ldrb.w sl, [r7, #1]!
- 8002f26: d0e2 beq.n 8002eee <d_print_comp+0x2fa>
- 8002f28: 461a mov r2, r3
- 8002f2a: 3301 adds r3, #1
- 8002f2c: e7ed b.n 8002f0a <d_print_comp+0x316>
- 8002f2e: 4f57 ldr r7, [pc, #348] ; (800308c <d_print_comp+0x498>)
- 8002f30: 68aa ldr r2, [r5, #8]
- 8002f32: 4631 mov r1, r6
- 8002f34: 4620 mov r0, r4
- 8002f36: f7ff fe5d bl 8002bf4 <d_print_comp>
- 8002f3a: f107 0805 add.w r8, r7, #5
- 8002f3e: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 8002f42: f04f 0900 mov.w r9, #0
- 8002f46: e016 b.n 8002f76 <d_print_comp+0x382>
- 8002f48: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8002f4c: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8002f50: f884 90ff strb.w r9, [r4, #255] ; 0xff
- 8002f54: 4798 blx r3
- 8002f56: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8002f5a: 3301 adds r3, #1
- 8002f5c: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8002f60: 2200 movs r2, #0
- 8002f62: 2301 movs r3, #1
- 8002f64: 45b8 cmp r8, r7
- 8002f66: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 8002f6a: f804 a002 strb.w sl, [r4, r2]
- 8002f6e: f884 a104 strb.w sl, [r4, #260] ; 0x104
- 8002f72: f001 827c beq.w 800446e <d_print_comp+0x187a>
- 8002f76: 2bff cmp r3, #255 ; 0xff
- 8002f78: 4619 mov r1, r3
- 8002f7a: 4620 mov r0, r4
- 8002f7c: f817 ab01 ldrb.w sl, [r7], #1
- 8002f80: d0e2 beq.n 8002f48 <d_print_comp+0x354>
- 8002f82: 461a mov r2, r3
- 8002f84: 3301 adds r3, #1
- 8002f86: e7ed b.n 8002f64 <d_print_comp+0x370>
- 8002f88: 4f41 ldr r7, [pc, #260] ; (8003090 <d_print_comp+0x49c>)
- 8002f8a: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 8002f8e: f107 0816 add.w r8, r7, #22
- 8002f92: f04f 0900 mov.w r9, #0
- 8002f96: e016 b.n 8002fc6 <d_print_comp+0x3d2>
- 8002f98: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8002f9c: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8002fa0: f884 90ff strb.w r9, [r4, #255] ; 0xff
- 8002fa4: 4798 blx r3
- 8002fa6: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8002faa: 3301 adds r3, #1
- 8002fac: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8002fb0: 2200 movs r2, #0
- 8002fb2: 2301 movs r3, #1
- 8002fb4: 45b8 cmp r8, r7
- 8002fb6: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 8002fba: f804 a002 strb.w sl, [r4, r2]
- 8002fbe: f884 a104 strb.w sl, [r4, #260] ; 0x104
- 8002fc2: f001 81f4 beq.w 80043ae <d_print_comp+0x17ba>
- 8002fc6: 2bff cmp r3, #255 ; 0xff
- 8002fc8: 4619 mov r1, r3
- 8002fca: 4620 mov r0, r4
- 8002fcc: f817 af01 ldrb.w sl, [r7, #1]!
- 8002fd0: d0e2 beq.n 8002f98 <d_print_comp+0x3a4>
- 8002fd2: 461a mov r2, r3
- 8002fd4: 3301 adds r3, #1
- 8002fd6: e7ed b.n 8002fb4 <d_print_comp+0x3c0>
- 8002fd8: 4e2e ldr r6, [pc, #184] ; (8003094 <d_print_comp+0x4a0>)
- 8002fda: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 8002fde: f106 070e add.w r7, r6, #14
- 8002fe2: f04f 0800 mov.w r8, #0
- 8002fe6: e016 b.n 8003016 <d_print_comp+0x422>
- 8002fe8: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8002fec: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8002ff0: f884 80ff strb.w r8, [r4, #255] ; 0xff
- 8002ff4: 4798 blx r3
- 8002ff6: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8002ffa: 3301 adds r3, #1
- 8002ffc: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8003000: 2200 movs r2, #0
- 8003002: 2301 movs r3, #1
- 8003004: 42b7 cmp r7, r6
- 8003006: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 800300a: f804 9002 strb.w r9, [r4, r2]
- 800300e: f884 9104 strb.w r9, [r4, #260] ; 0x104
- 8003012: f001 81d5 beq.w 80043c0 <d_print_comp+0x17cc>
- 8003016: 2bff cmp r3, #255 ; 0xff
- 8003018: 4619 mov r1, r3
- 800301a: 4620 mov r0, r4
- 800301c: f816 9f01 ldrb.w r9, [r6, #1]!
- 8003020: d0e2 beq.n 8002fe8 <d_print_comp+0x3f4>
- 8003022: 461a mov r2, r3
- 8003024: 3301 adds r3, #1
- 8003026: e7ed b.n 8003004 <d_print_comp+0x410>
- 8003028: 4f1b ldr r7, [pc, #108] ; (8003098 <d_print_comp+0x4a4>)
- 800302a: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 800302e: f107 0808 add.w r8, r7, #8
- 8003032: f04f 0900 mov.w r9, #0
- 8003036: e016 b.n 8003066 <d_print_comp+0x472>
- 8003038: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 800303c: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8003040: f884 90ff strb.w r9, [r4, #255] ; 0xff
- 8003044: 4798 blx r3
- 8003046: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 800304a: 3301 adds r3, #1
- 800304c: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8003050: 2200 movs r2, #0
- 8003052: 2301 movs r3, #1
- 8003054: 45b8 cmp r8, r7
- 8003056: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 800305a: f804 a002 strb.w sl, [r4, r2]
- 800305e: f884 a104 strb.w sl, [r4, #260] ; 0x104
- 8003062: f001 8114 beq.w 800428e <d_print_comp+0x169a>
- 8003066: 2bff cmp r3, #255 ; 0xff
- 8003068: 4619 mov r1, r3
- 800306a: 4620 mov r0, r4
- 800306c: f817 af01 ldrb.w sl, [r7, #1]!
- 8003070: d0e2 beq.n 8003038 <d_print_comp+0x444>
- 8003072: 461a mov r2, r3
- 8003074: 3301 adds r3, #1
- 8003076: e7ed b.n 8003054 <d_print_comp+0x460>
- 8003078: 0801257c .word 0x0801257c
- 800307c: 0801277c .word 0x0801277c
- 8003080: 08012837 .word 0x08012837
- 8003084: 08012750 .word 0x08012750
- 8003088: 0801271b .word 0x0801271b
- 800308c: 080125bc .word 0x080125bc
- 8003090: 0801271f .word 0x0801271f
- 8003094: 08012827 .word 0x08012827
- 8003098: 08012817 .word 0x08012817
- 800309c: 4fb9 ldr r7, [pc, #740] ; (8003384 <d_print_comp+0x790>)
- 800309e: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 80030a2: f107 081c add.w r8, r7, #28
- 80030a6: f04f 0900 mov.w r9, #0
- 80030aa: e016 b.n 80030da <d_print_comp+0x4e6>
- 80030ac: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 80030b0: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 80030b4: f884 90ff strb.w r9, [r4, #255] ; 0xff
- 80030b8: 4798 blx r3
- 80030ba: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 80030be: 3301 adds r3, #1
- 80030c0: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 80030c4: 2200 movs r2, #0
- 80030c6: 2301 movs r3, #1
- 80030c8: 45b8 cmp r8, r7
- 80030ca: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 80030ce: f804 a002 strb.w sl, [r4, r2]
- 80030d2: f884 a104 strb.w sl, [r4, #260] ; 0x104
- 80030d6: f001 810f beq.w 80042f8 <d_print_comp+0x1704>
- 80030da: 2bff cmp r3, #255 ; 0xff
- 80030dc: 4619 mov r1, r3
- 80030de: 4620 mov r0, r4
- 80030e0: f817 af01 ldrb.w sl, [r7, #1]!
- 80030e4: d0e2 beq.n 80030ac <d_print_comp+0x4b8>
- 80030e6: 461a mov r2, r3
- 80030e8: 3301 adds r3, #1
- 80030ea: e7ed b.n 80030c8 <d_print_comp+0x4d4>
- 80030ec: 4fa6 ldr r7, [pc, #664] ; (8003388 <d_print_comp+0x794>)
- 80030ee: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 80030f2: f107 081d add.w r8, r7, #29
- 80030f6: f04f 0900 mov.w r9, #0
- 80030fa: e016 b.n 800312a <d_print_comp+0x536>
- 80030fc: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8003100: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8003104: f884 90ff strb.w r9, [r4, #255] ; 0xff
- 8003108: 4798 blx r3
- 800310a: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 800310e: 3301 adds r3, #1
- 8003110: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8003114: 2200 movs r2, #0
- 8003116: 2301 movs r3, #1
- 8003118: 4547 cmp r7, r8
- 800311a: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 800311e: f804 a002 strb.w sl, [r4, r2]
- 8003122: f884 a104 strb.w sl, [r4, #260] ; 0x104
- 8003126: f001 8083 beq.w 8004230 <d_print_comp+0x163c>
- 800312a: 2bff cmp r3, #255 ; 0xff
- 800312c: 4619 mov r1, r3
- 800312e: 4620 mov r0, r4
- 8003130: f817 af01 ldrb.w sl, [r7, #1]!
- 8003134: d0e2 beq.n 80030fc <d_print_comp+0x508>
- 8003136: 461a mov r2, r3
- 8003138: 3301 adds r3, #1
- 800313a: e7ed b.n 8003118 <d_print_comp+0x524>
- 800313c: 4f93 ldr r7, [pc, #588] ; (800338c <d_print_comp+0x798>)
- 800313e: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 8003142: f107 080a add.w r8, r7, #10
- 8003146: f04f 0900 mov.w r9, #0
- 800314a: e016 b.n 800317a <d_print_comp+0x586>
- 800314c: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8003150: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8003154: f884 90ff strb.w r9, [r4, #255] ; 0xff
- 8003158: 4798 blx r3
- 800315a: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 800315e: 3301 adds r3, #1
- 8003160: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8003164: 2200 movs r2, #0
- 8003166: 2301 movs r3, #1
- 8003168: 45b8 cmp r8, r7
- 800316a: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 800316e: f804 a002 strb.w sl, [r4, r2]
- 8003172: f884 a104 strb.w sl, [r4, #260] ; 0x104
- 8003176: f001 8064 beq.w 8004242 <d_print_comp+0x164e>
- 800317a: 2bff cmp r3, #255 ; 0xff
- 800317c: 4619 mov r1, r3
- 800317e: 4620 mov r0, r4
- 8003180: f817 ab01 ldrb.w sl, [r7], #1
- 8003184: d0e2 beq.n 800314c <d_print_comp+0x558>
- 8003186: 461a mov r2, r3
- 8003188: 3301 adds r3, #1
- 800318a: e7ed b.n 8003168 <d_print_comp+0x574>
- 800318c: a808 add r0, sp, #32
- 800318e: 68aa ldr r2, [r5, #8]
- 8003190: 497f ldr r1, [pc, #508] ; (8003390 <d_print_comp+0x79c>)
- 8003192: f00b fb63 bl 800e85c <sprintf>
- 8003196: a808 add r0, sp, #32
- 8003198: f003 fe1c bl 8006dd4 <strlen>
- 800319c: 2800 cmp r0, #0
- 800319e: f001 81b7 beq.w 8004510 <d_print_comp+0x191c>
- 80031a2: ae08 add r6, sp, #32
- 80031a4: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 80031a8: 1837 adds r7, r6, r0
- 80031aa: f04f 0800 mov.w r8, #0
- 80031ae: e016 b.n 80031de <d_print_comp+0x5ea>
- 80031b0: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 80031b4: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 80031b8: f884 80ff strb.w r8, [r4, #255] ; 0xff
- 80031bc: 4798 blx r3
- 80031be: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 80031c2: 3301 adds r3, #1
- 80031c4: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 80031c8: 2200 movs r2, #0
- 80031ca: 2301 movs r3, #1
- 80031cc: 42be cmp r6, r7
- 80031ce: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 80031d2: f804 9002 strb.w r9, [r4, r2]
- 80031d6: f884 9104 strb.w r9, [r4, #260] ; 0x104
- 80031da: f001 8199 beq.w 8004510 <d_print_comp+0x191c>
- 80031de: 2bff cmp r3, #255 ; 0xff
- 80031e0: 4619 mov r1, r3
- 80031e2: 4620 mov r0, r4
- 80031e4: f816 9b01 ldrb.w r9, [r6], #1
- 80031e8: d0e2 beq.n 80031b0 <d_print_comp+0x5bc>
- 80031ea: 461a mov r2, r3
- 80031ec: 3301 adds r3, #1
- 80031ee: e7ed b.n 80031cc <d_print_comp+0x5d8>
- 80031f0: f8d4 7100 ldr.w r7, [r4, #256] ; 0x100
- 80031f4: f895 8008 ldrb.w r8, [r5, #8]
- 80031f8: 2fff cmp r7, #255 ; 0xff
- 80031fa: d111 bne.n 8003220 <d_print_comp+0x62c>
- 80031fc: 2600 movs r6, #0
- 80031fe: 4639 mov r1, r7
- 8003200: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8003204: f884 60ff strb.w r6, [r4, #255] ; 0xff
- 8003208: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 800320c: 4620 mov r0, r4
- 800320e: 4798 blx r3
- 8003210: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8003214: f8c4 6100 str.w r6, [r4, #256] ; 0x100
- 8003218: 3301 adds r3, #1
- 800321a: 4637 mov r7, r6
- 800321c: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8003220: 1c7b adds r3, r7, #1
- 8003222: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 8003226: f804 8007 strb.w r8, [r4, r7]
- 800322a: f884 8104 strb.w r8, [r4, #260] ; 0x104
- 800322e: 686a ldr r2, [r5, #4]
- 8003230: 9905 ldr r1, [sp, #20]
- 8003232: e5d2 b.n 8002dda <d_print_comp+0x1e6>
- 8003234: 68aa ldr r2, [r5, #8]
- 8003236: 4631 mov r1, r6
- 8003238: 4620 mov r0, r4
- 800323a: f7ff fcdb bl 8002bf4 <d_print_comp>
- 800323e: 4631 mov r1, r6
- 8003240: 68ea ldr r2, [r5, #12]
- 8003242: 4620 mov r0, r4
- 8003244: f7ff fcd6 bl 8002bf4 <d_print_comp>
- 8003248: 9905 ldr r1, [sp, #20]
- 800324a: 686a ldr r2, [r5, #4]
- 800324c: e5c5 b.n 8002dda <d_print_comp+0x1e6>
- 800324e: 4f51 ldr r7, [pc, #324] ; (8003394 <d_print_comp+0x7a0>)
- 8003250: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 8003254: f107 080e add.w r8, r7, #14
- 8003258: f04f 0900 mov.w r9, #0
- 800325c: e016 b.n 800328c <d_print_comp+0x698>
- 800325e: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8003262: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8003266: f884 90ff strb.w r9, [r4, #255] ; 0xff
- 800326a: 4798 blx r3
- 800326c: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8003270: 3301 adds r3, #1
- 8003272: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8003276: 2200 movs r2, #0
- 8003278: 2301 movs r3, #1
- 800327a: 45b8 cmp r8, r7
- 800327c: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 8003280: f804 a002 strb.w sl, [r4, r2]
- 8003284: f884 a104 strb.w sl, [r4, #260] ; 0x104
- 8003288: f001 8146 beq.w 8004518 <d_print_comp+0x1924>
- 800328c: 2bff cmp r3, #255 ; 0xff
- 800328e: 4619 mov r1, r3
- 8003290: 4620 mov r0, r4
- 8003292: f817 af01 ldrb.w sl, [r7, #1]!
- 8003296: d0e2 beq.n 800325e <d_print_comp+0x66a>
- 8003298: 461a mov r2, r3
- 800329a: 3301 adds r3, #1
- 800329c: e7ed b.n 800327a <d_print_comp+0x686>
- 800329e: 68ab ldr r3, [r5, #8]
- 80032a0: 781a ldrb r2, [r3, #0]
- 80032a2: 2a27 cmp r2, #39 ; 0x27
- 80032a4: f001 8572 beq.w 8004d8c <d_print_comp+0x2198>
- 80032a8: f04f 0800 mov.w r8, #0
- 80032ac: f8d4 7100 ldr.w r7, [r4, #256] ; 0x100
- 80032b0: 2fff cmp r7, #255 ; 0xff
- 80032b2: d112 bne.n 80032da <d_print_comp+0x6e6>
- 80032b4: f04f 0900 mov.w r9, #0
- 80032b8: 4639 mov r1, r7
- 80032ba: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 80032be: f884 90ff strb.w r9, [r4, #255] ; 0xff
- 80032c2: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 80032c6: 4620 mov r0, r4
- 80032c8: 4798 blx r3
- 80032ca: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 80032ce: f8c4 9100 str.w r9, [r4, #256] ; 0x100
- 80032d2: 3301 adds r3, #1
- 80032d4: 464f mov r7, r9
- 80032d6: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 80032da: 2328 movs r3, #40 ; 0x28
- 80032dc: 1c7a adds r2, r7, #1
- 80032de: f8c4 2100 str.w r2, [r4, #256] ; 0x100
- 80032e2: 55e3 strb r3, [r4, r7]
- 80032e4: f884 3104 strb.w r3, [r4, #260] ; 0x104
- 80032e8: 68aa ldr r2, [r5, #8]
- 80032ea: 4631 mov r1, r6
- 80032ec: 4620 mov r0, r4
- 80032ee: f7ff fc81 bl 8002bf4 <d_print_comp>
- 80032f2: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 80032f6: 2bff cmp r3, #255 ; 0xff
- 80032f8: f041 85b8 bne.w 8004e6c <d_print_comp+0x2278>
- 80032fc: 2200 movs r2, #0
- 80032fe: 4619 mov r1, r3
- 8003300: f884 20ff strb.w r2, [r4, #255] ; 0xff
- 8003304: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8003308: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 800330c: 4620 mov r0, r4
- 800330e: 4798 blx r3
- 8003310: 2329 movs r3, #41 ; 0x29
- 8003312: 7023 strb r3, [r4, #0]
- 8003314: f884 3104 strb.w r3, [r4, #260] ; 0x104
- 8003318: 782a ldrb r2, [r5, #0]
- 800331a: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 800331e: 2101 movs r1, #1
- 8003320: 3301 adds r3, #1
- 8003322: 2a3d cmp r2, #61 ; 0x3d
- 8003324: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8003328: f8c4 1100 str.w r1, [r4, #256] ; 0x100
- 800332c: f001 85bb beq.w 8004ea6 <d_print_comp+0x22b2>
- 8003330: f1b8 0f08 cmp.w r8, #8
- 8003334: f001 8556 beq.w 8004de4 <d_print_comp+0x21f0>
- 8003338: 4631 mov r1, r6
- 800333a: 68ea ldr r2, [r5, #12]
- 800333c: 4620 mov r0, r4
- 800333e: f7ff fc59 bl 8002bf4 <d_print_comp>
- 8003342: 9905 ldr r1, [sp, #20]
- 8003344: 686a ldr r2, [r5, #4]
- 8003346: e548 b.n 8002dda <d_print_comp+0x1e6>
- 8003348: 2301 movs r3, #1
- 800334a: f8c4 3118 str.w r3, [r4, #280] ; 0x118
- 800334e: 686a ldr r2, [r5, #4]
- 8003350: e543 b.n 8002dda <d_print_comp+0x1e6>
- 8003352: 68eb ldr r3, [r5, #12]
- 8003354: 781a ldrb r2, [r3, #0]
- 8003356: 2a3a cmp r2, #58 ; 0x3a
- 8003358: f001 8405 beq.w 8004b66 <d_print_comp+0x1f72>
- 800335c: 2301 movs r3, #1
- 800335e: f8c4 3118 str.w r3, [r4, #280] ; 0x118
- 8003362: 686a ldr r2, [r5, #4]
- 8003364: e539 b.n 8002dda <d_print_comp+0x1e6>
- 8003366: 2301 movs r3, #1
- 8003368: f8c4 3118 str.w r3, [r4, #280] ; 0x118
- 800336c: 686a ldr r2, [r5, #4]
- 800336e: e534 b.n 8002dda <d_print_comp+0x1e6>
- 8003370: 68eb ldr r3, [r5, #12]
- 8003372: 781b ldrb r3, [r3, #0]
- 8003374: 2b38 cmp r3, #56 ; 0x38
- 8003376: f43f acaf beq.w 8002cd8 <d_print_comp+0xe4>
- 800337a: 2301 movs r3, #1
- 800337c: f8c4 3118 str.w r3, [r4, #280] ; 0x118
- 8003380: 686a ldr r2, [r5, #4]
- 8003382: e52a b.n 8002dda <d_print_comp+0x1e6>
- 8003384: 080127f7 .word 0x080127f7
- 8003388: 080127d7 .word 0x080127d7
- 800338c: 080127b8 .word 0x080127b8
- 8003390: 08012574 .word 0x08012574
- 8003394: 080127a7 .word 0x080127a7
- 8003398: e9d5 9802 ldrd r9, r8, [r5, #8]
- 800339c: f899 3000 ldrb.w r3, [r9]
- 80033a0: 2b31 cmp r3, #49 ; 0x31
- 80033a2: f001 843a beq.w 8004c1a <d_print_comp+0x2026>
- 80033a6: 2b33 cmp r3, #51 ; 0x33
- 80033a8: f042 8192 bne.w 80056d0 <d_print_comp+0x2adc>
- 80033ac: f8d4 7100 ldr.w r7, [r4, #256] ; 0x100
- 80033b0: 2fff cmp r7, #255 ; 0xff
- 80033b2: d112 bne.n 80033da <d_print_comp+0x7e6>
- 80033b4: f04f 0a00 mov.w sl, #0
- 80033b8: 4639 mov r1, r7
- 80033ba: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 80033be: f884 a0ff strb.w sl, [r4, #255] ; 0xff
- 80033c2: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 80033c6: 4620 mov r0, r4
- 80033c8: 4798 blx r3
- 80033ca: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 80033ce: f8c4 a100 str.w sl, [r4, #256] ; 0x100
- 80033d2: 3301 adds r3, #1
- 80033d4: 4657 mov r7, sl
- 80033d6: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 80033da: 1c7a adds r2, r7, #1
- 80033dc: 2328 movs r3, #40 ; 0x28
- 80033de: f8c4 2100 str.w r2, [r4, #256] ; 0x100
- 80033e2: 55e3 strb r3, [r4, r7]
- 80033e4: f884 3104 strb.w r3, [r4, #260] ; 0x104
- 80033e8: f8d9 2008 ldr.w r2, [r9, #8]
- 80033ec: 4631 mov r1, r6
- 80033ee: 4620 mov r0, r4
- 80033f0: f7ff fc00 bl 8002bf4 <d_print_comp>
- 80033f4: f8d4 7100 ldr.w r7, [r4, #256] ; 0x100
- 80033f8: 2fff cmp r7, #255 ; 0xff
- 80033fa: d112 bne.n 8003422 <d_print_comp+0x82e>
- 80033fc: f04f 0900 mov.w r9, #0
- 8003400: 4639 mov r1, r7
- 8003402: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8003406: f884 90ff strb.w r9, [r4, #255] ; 0xff
- 800340a: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 800340e: 4620 mov r0, r4
- 8003410: 4798 blx r3
- 8003412: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8003416: f8c4 9100 str.w r9, [r4, #256] ; 0x100
- 800341a: 3301 adds r3, #1
- 800341c: 464f mov r7, r9
- 800341e: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8003422: 2329 movs r3, #41 ; 0x29
- 8003424: 1c7a adds r2, r7, #1
- 8003426: f8c4 2100 str.w r2, [r4, #256] ; 0x100
- 800342a: 55e3 strb r3, [r4, r7]
- 800342c: f884 3104 strb.w r3, [r4, #260] ; 0x104
- 8003430: 4642 mov r2, r8
- 8003432: 4631 mov r1, r6
- 8003434: 4620 mov r0, r4
- 8003436: f003 f8e5 bl 8006604 <d_print_subexpr>
- 800343a: 9905 ldr r1, [sp, #20]
- 800343c: 686a ldr r2, [r5, #4]
- 800343e: e4cc b.n 8002dda <d_print_comp+0x1e6>
- 8003440: 4631 mov r1, r6
- 8003442: 68aa ldr r2, [r5, #8]
- 8003444: 4620 mov r0, r4
- 8003446: f003 f89d bl 8006584 <d_print_expr_op>
- 800344a: 9905 ldr r1, [sp, #20]
- 800344c: 686a ldr r2, [r5, #4]
- 800344e: e4c4 b.n 8002dda <d_print_comp+0x1e6>
- 8003450: 4fd2 ldr r7, [pc, #840] ; (800379c <d_print_comp+0xba8>)
- 8003452: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 8003456: f107 0809 add.w r8, r7, #9
- 800345a: f04f 0900 mov.w r9, #0
- 800345e: e016 b.n 800348e <d_print_comp+0x89a>
- 8003460: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8003464: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8003468: f884 90ff strb.w r9, [r4, #255] ; 0xff
- 800346c: 4798 blx r3
- 800346e: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8003472: 3301 adds r3, #1
- 8003474: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8003478: 2200 movs r2, #0
- 800347a: 2301 movs r3, #1
- 800347c: 45b8 cmp r8, r7
- 800347e: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 8003482: f804 a002 strb.w sl, [r4, r2]
- 8003486: f884 a104 strb.w sl, [r4, #260] ; 0x104
- 800348a: f001 8057 beq.w 800453c <d_print_comp+0x1948>
- 800348e: 2bff cmp r3, #255 ; 0xff
- 8003490: 4619 mov r1, r3
- 8003492: 4620 mov r0, r4
- 8003494: f817 af01 ldrb.w sl, [r7, #1]!
- 8003498: d0e2 beq.n 8003460 <d_print_comp+0x86c>
- 800349a: 461a mov r2, r3
- 800349c: 3301 adds r3, #1
- 800349e: e7ed b.n 800347c <d_print_comp+0x888>
- 80034a0: 4fbe ldr r7, [pc, #760] ; (800379c <d_print_comp+0xba8>)
- 80034a2: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 80034a6: f107 0809 add.w r8, r7, #9
- 80034aa: f04f 0900 mov.w r9, #0
- 80034ae: e016 b.n 80034de <d_print_comp+0x8ea>
- 80034b0: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 80034b4: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 80034b8: f884 90ff strb.w r9, [r4, #255] ; 0xff
- 80034bc: 4798 blx r3
- 80034be: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 80034c2: 3301 adds r3, #1
- 80034c4: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 80034c8: 2200 movs r2, #0
- 80034ca: 2301 movs r3, #1
- 80034cc: 45b8 cmp r8, r7
- 80034ce: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 80034d2: f804 a002 strb.w sl, [r4, r2]
- 80034d6: f884 a104 strb.w sl, [r4, #260] ; 0x104
- 80034da: f001 8026 beq.w 800452a <d_print_comp+0x1936>
- 80034de: 2bff cmp r3, #255 ; 0xff
- 80034e0: 4619 mov r1, r3
- 80034e2: 4620 mov r0, r4
- 80034e4: f817 af01 ldrb.w sl, [r7, #1]!
- 80034e8: d0e2 beq.n 80034b0 <d_print_comp+0x8bc>
- 80034ea: 461a mov r2, r3
- 80034ec: 3301 adds r3, #1
- 80034ee: e7ed b.n 80034cc <d_print_comp+0x8d8>
- 80034f0: f8d5 a008 ldr.w sl, [r5, #8]
- 80034f4: 4eaa ldr r6, [pc, #680] ; (80037a0 <d_print_comp+0xbac>)
- 80034f6: f8da 7008 ldr.w r7, [sl, #8]
- 80034fa: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 80034fe: f106 0808 add.w r8, r6, #8
- 8003502: f04f 0900 mov.w r9, #0
- 8003506: e016 b.n 8003536 <d_print_comp+0x942>
- 8003508: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 800350c: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8003510: f884 90ff strb.w r9, [r4, #255] ; 0xff
- 8003514: 4798 blx r3
- 8003516: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 800351a: 3301 adds r3, #1
- 800351c: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8003520: 2200 movs r2, #0
- 8003522: 2301 movs r3, #1
- 8003524: 4546 cmp r6, r8
- 8003526: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 800352a: f804 b002 strb.w fp, [r4, r2]
- 800352e: f884 b104 strb.w fp, [r4, #260] ; 0x104
- 8003532: f001 8021 beq.w 8004578 <d_print_comp+0x1984>
- 8003536: 2bff cmp r3, #255 ; 0xff
- 8003538: 4619 mov r1, r3
- 800353a: 4620 mov r0, r4
- 800353c: f816 bf01 ldrb.w fp, [r6, #1]!
- 8003540: d0e2 beq.n 8003508 <d_print_comp+0x914>
- 8003542: 461a mov r2, r3
- 8003544: 3301 adds r3, #1
- 8003546: e7ed b.n 8003524 <d_print_comp+0x930>
- 8003548: e9d5 2802 ldrd r2, r8, [r5, #8]
- 800354c: b11a cbz r2, 8003556 <d_print_comp+0x962>
- 800354e: 4631 mov r1, r6
- 8003550: 4620 mov r0, r4
- 8003552: f7ff fb4f bl 8002bf4 <d_print_comp>
- 8003556: f8d4 7100 ldr.w r7, [r4, #256] ; 0x100
- 800355a: 2fff cmp r7, #255 ; 0xff
- 800355c: d112 bne.n 8003584 <d_print_comp+0x990>
- 800355e: f04f 0900 mov.w r9, #0
- 8003562: 4639 mov r1, r7
- 8003564: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8003568: f884 90ff strb.w r9, [r4, #255] ; 0xff
- 800356c: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8003570: 4620 mov r0, r4
- 8003572: 4798 blx r3
- 8003574: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8003578: f8c4 9100 str.w r9, [r4, #256] ; 0x100
- 800357c: 3301 adds r3, #1
- 800357e: 464f mov r7, r9
- 8003580: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8003584: 1c78 adds r0, r7, #1
- 8003586: 237b movs r3, #123 ; 0x7b
- 8003588: f8c4 0100 str.w r0, [r4, #256] ; 0x100
- 800358c: 4642 mov r2, r8
- 800358e: 55e3 strb r3, [r4, r7]
- 8003590: 4631 mov r1, r6
- 8003592: 4620 mov r0, r4
- 8003594: f884 3104 strb.w r3, [r4, #260] ; 0x104
- 8003598: f7ff fb2c bl 8002bf4 <d_print_comp>
- 800359c: f8d4 7100 ldr.w r7, [r4, #256] ; 0x100
- 80035a0: 2fff cmp r7, #255 ; 0xff
- 80035a2: d111 bne.n 80035c8 <d_print_comp+0x9d4>
- 80035a4: 2600 movs r6, #0
- 80035a6: 4639 mov r1, r7
- 80035a8: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 80035ac: f884 60ff strb.w r6, [r4, #255] ; 0xff
- 80035b0: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 80035b4: 4620 mov r0, r4
- 80035b6: 4798 blx r3
- 80035b8: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 80035bc: f8c4 6100 str.w r6, [r4, #256] ; 0x100
- 80035c0: 3301 adds r3, #1
- 80035c2: 4637 mov r7, r6
- 80035c4: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 80035c8: 1c7a adds r2, r7, #1
- 80035ca: 237d movs r3, #125 ; 0x7d
- 80035cc: f8c4 2100 str.w r2, [r4, #256] ; 0x100
- 80035d0: 55e3 strb r3, [r4, r7]
- 80035d2: f884 3104 strb.w r3, [r4, #260] ; 0x104
- 80035d6: 686a ldr r2, [r5, #4]
- 80035d8: 9905 ldr r1, [sp, #20]
- 80035da: f7ff bbfe b.w 8002dda <d_print_comp+0x1e6>
- 80035de: 68aa ldr r2, [r5, #8]
- 80035e0: b11a cbz r2, 80035ea <d_print_comp+0x9f6>
- 80035e2: 4631 mov r1, r6
- 80035e4: 4620 mov r0, r4
- 80035e6: f7ff fb05 bl 8002bf4 <d_print_comp>
- 80035ea: 68eb ldr r3, [r5, #12]
- 80035ec: 2b00 cmp r3, #0
- 80035ee: f001 853d beq.w 800506c <d_print_comp+0x2478>
- 80035f2: f8d4 7100 ldr.w r7, [r4, #256] ; 0x100
- 80035f6: 2ffd cmp r7, #253 ; 0xfd
- 80035f8: d912 bls.n 8003620 <d_print_comp+0xa2c>
- 80035fa: f04f 0800 mov.w r8, #0
- 80035fe: f804 8007 strb.w r8, [r4, r7]
- 8003602: 4639 mov r1, r7
- 8003604: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8003608: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 800360c: 4620 mov r0, r4
- 800360e: 4798 blx r3
- 8003610: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8003614: f8c4 8100 str.w r8, [r4, #256] ; 0x100
- 8003618: 3301 adds r3, #1
- 800361a: 4647 mov r7, r8
- 800361c: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8003620: f8df 8188 ldr.w r8, [pc, #392] ; 80037ac <d_print_comp+0xbb8>
- 8003624: f04f 0a00 mov.w sl, #0
- 8003628: f108 0b02 add.w fp, r8, #2
- 800362c: e016 b.n 800365c <d_print_comp+0xa68>
- 800362e: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8003632: f884 a0ff strb.w sl, [r4, #255] ; 0xff
- 8003636: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 800363a: 4798 blx r3
- 800363c: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8003640: 3301 adds r3, #1
- 8003642: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8003646: 2701 movs r7, #1
- 8003648: 2300 movs r3, #0
- 800364a: 45c3 cmp fp, r8
- 800364c: f8c4 7100 str.w r7, [r4, #256] ; 0x100
- 8003650: f804 9003 strb.w r9, [r4, r3]
- 8003654: f884 9104 strb.w r9, [r4, #260] ; 0x104
- 8003658: f001 80cf beq.w 80047fa <d_print_comp+0x1c06>
- 800365c: 2fff cmp r7, #255 ; 0xff
- 800365e: 4639 mov r1, r7
- 8003660: 4620 mov r0, r4
- 8003662: f818 9b01 ldrb.w r9, [r8], #1
- 8003666: d0e2 beq.n 800362e <d_print_comp+0xa3a>
- 8003668: 463b mov r3, r7
- 800366a: 3701 adds r7, #1
- 800366c: e7ed b.n 800364a <d_print_comp+0xa56>
- 800366e: f9b5 300e ldrsh.w r3, [r5, #14]
- 8003672: 2b00 cmp r3, #0
- 8003674: f041 84a0 bne.w 8004fb8 <d_print_comp+0x23c4>
- 8003678: 68aa ldr r2, [r5, #8]
- 800367a: 4b4a ldr r3, [pc, #296] ; (80037a4 <d_print_comp+0xbb0>)
- 800367c: 6891 ldr r1, [r2, #8]
- 800367e: 4299 cmp r1, r3
- 8003680: d020 beq.n 80036c4 <d_print_comp+0xad0>
- 8003682: 4631 mov r1, r6
- 8003684: 4620 mov r0, r4
- 8003686: f7ff fab5 bl 8002bf4 <d_print_comp>
- 800368a: f8d4 7100 ldr.w r7, [r4, #256] ; 0x100
- 800368e: 2fff cmp r7, #255 ; 0xff
- 8003690: d111 bne.n 80036b6 <d_print_comp+0xac2>
- 8003692: 2600 movs r6, #0
- 8003694: 4639 mov r1, r7
- 8003696: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 800369a: f884 60ff strb.w r6, [r4, #255] ; 0xff
- 800369e: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 80036a2: 4620 mov r0, r4
- 80036a4: 4798 blx r3
- 80036a6: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 80036aa: f8c4 6100 str.w r6, [r4, #256] ; 0x100
- 80036ae: 3301 adds r3, #1
- 80036b0: 4637 mov r7, r6
- 80036b2: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 80036b6: 2320 movs r3, #32
- 80036b8: 1c7a adds r2, r7, #1
- 80036ba: f8c4 2100 str.w r2, [r4, #256] ; 0x100
- 80036be: 55e3 strb r3, [r4, r7]
- 80036c0: f884 3104 strb.w r3, [r4, #260] ; 0x104
- 80036c4: f9b5 200c ldrsh.w r2, [r5, #12]
- 80036c8: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 80036cc: 2a00 cmp r2, #0
- 80036ce: f001 80a6 beq.w 800481e <d_print_comp+0x1c2a>
- 80036d2: 4e35 ldr r6, [pc, #212] ; (80037a8 <d_print_comp+0xbb4>)
- 80036d4: f04f 0800 mov.w r8, #0
- 80036d8: f106 0906 add.w r9, r6, #6
- 80036dc: e015 b.n 800370a <d_print_comp+0xb16>
- 80036de: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 80036e2: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 80036e6: f884 80ff strb.w r8, [r4, #255] ; 0xff
- 80036ea: 4798 blx r3
- 80036ec: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 80036f0: 3301 adds r3, #1
- 80036f2: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 80036f6: 2200 movs r2, #0
- 80036f8: 2301 movs r3, #1
- 80036fa: 45b1 cmp r9, r6
- 80036fc: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 8003700: 54a7 strb r7, [r4, r2]
- 8003702: f884 7104 strb.w r7, [r4, #260] ; 0x104
- 8003706: f001 8183 beq.w 8004a10 <d_print_comp+0x1e1c>
- 800370a: 2bff cmp r3, #255 ; 0xff
- 800370c: 4619 mov r1, r3
- 800370e: 4620 mov r0, r4
- 8003710: f816 7b01 ldrb.w r7, [r6], #1
- 8003714: d0e3 beq.n 80036de <d_print_comp+0xaea>
- 8003716: 461a mov r2, r3
- 8003718: 3301 adds r3, #1
- 800371a: e7ee b.n 80036fa <d_print_comp+0xb06>
- 800371c: ab18 add r3, sp, #96 ; 0x60
- 800371e: f8d4 2114 ldr.w r2, [r4, #276] ; 0x114
- 8003722: f843 2d40 str.w r2, [r3, #-64]!
- 8003726: 2000 movs r0, #0
- 8003728: f8c4 3114 str.w r3, [r4, #276] ; 0x114
- 800372c: 900a str r0, [sp, #40] ; 0x28
- 800372e: f8d4 3110 ldr.w r3, [r4, #272] ; 0x110
- 8003732: 68ea ldr r2, [r5, #12]
- 8003734: 930b str r3, [sp, #44] ; 0x2c
- 8003736: 4631 mov r1, r6
- 8003738: 4620 mov r0, r4
- 800373a: 9509 str r5, [sp, #36] ; 0x24
- 800373c: f7ff fa5a bl 8002bf4 <d_print_comp>
- 8003740: 9b0a ldr r3, [sp, #40] ; 0x28
- 8003742: b923 cbnz r3, 800374e <d_print_comp+0xb5a>
- 8003744: 4631 mov r1, r6
- 8003746: 462a mov r2, r5
- 8003748: 4620 mov r0, r4
- 800374a: f002 f8e9 bl 8005920 <d_print_mod>
- 800374e: 9b08 ldr r3, [sp, #32]
- 8003750: f8c4 3114 str.w r3, [r4, #276] ; 0x114
- 8003754: 9905 ldr r1, [sp, #20]
- 8003756: 686a ldr r2, [r5, #4]
- 8003758: f7ff bb3f b.w 8002dda <d_print_comp+0x1e6>
- 800375c: f10d 0960 add.w r9, sp, #96 ; 0x60
- 8003760: f8d4 c114 ldr.w ip, [r4, #276] ; 0x114
- 8003764: f849 cd40 str.w ip, [r9, #-64]!
- 8003768: f8d4 3110 ldr.w r3, [r4, #272] ; 0x110
- 800376c: f8cd c004 str.w ip, [sp, #4]
- 8003770: 2200 movs r2, #0
- 8003772: 4667 mov r7, ip
- 8003774: f8c4 9114 str.w r9, [r4, #276] ; 0x114
- 8003778: 9509 str r5, [sp, #36] ; 0x24
- 800377a: e9cd 230a strd r2, r3, [sp, #40] ; 0x28
- 800377e: 2f00 cmp r7, #0
- 8003780: f001 852f beq.w 80051e2 <d_print_comp+0x25ee>
- 8003784: 687b ldr r3, [r7, #4]
- 8003786: 781b ldrb r3, [r3, #0]
- 8003788: 3b19 subs r3, #25
- 800378a: 2b02 cmp r3, #2
- 800378c: f201 8529 bhi.w 80051e2 <d_print_comp+0x25ee>
- 8003790: 4623 mov r3, r4
- 8003792: f04f 0801 mov.w r8, #1
- 8003796: 464c mov r4, r9
- 8003798: 469c mov ip, r3
- 800379a: e00e b.n 80037ba <d_print_comp+0xbc6>
- 800379c: 0801275f .word 0x0801275f
- 80037a0: 08012753 .word 0x08012753
- 80037a4: 08011c70 .word 0x08011c70
- 80037a8: 08012740 .word 0x08012740
- 80037ac: 08012750 .word 0x08012750
- 80037b0: 687b ldr r3, [r7, #4]
- 80037b2: 781b ldrb r3, [r3, #0]
- 80037b4: 3b19 subs r3, #25
- 80037b6: 2b02 cmp r3, #2
- 80037b8: d81d bhi.n 80037f6 <d_print_comp+0xc02>
- 80037ba: 68bb ldr r3, [r7, #8]
- 80037bc: ea4f 1e08 mov.w lr, r8, lsl #4
- 80037c0: aa18 add r2, sp, #96 ; 0x60
- 80037c2: eb02 0b0e add.w fp, r2, lr
- 80037c6: b99b cbnz r3, 80037f0 <d_print_comp+0xbfc>
- 80037c8: f1b8 0f03 cmp.w r8, #3
- 80037cc: f201 8517 bhi.w 80051fe <d_print_comp+0x260a>
- 80037d0: e897 000f ldmia.w r7, {r0, r1, r2, r3}
- 80037d4: f1ab 0a40 sub.w sl, fp, #64 ; 0x40
- 80037d8: e88a 000f stmia.w sl, {r0, r1, r2, r3}
- 80037dc: f84b 4c40 str.w r4, [fp, #-64]
- 80037e0: 2301 movs r3, #1
- 80037e2: eb09 040e add.w r4, r9, lr
- 80037e6: f8cc 4114 str.w r4, [ip, #276] ; 0x114
- 80037ea: f108 0801 add.w r8, r8, #1
- 80037ee: 60bb str r3, [r7, #8]
- 80037f0: 683f ldr r7, [r7, #0]
- 80037f2: 2f00 cmp r7, #0
- 80037f4: d1dc bne.n 80037b0 <d_print_comp+0xbbc>
- 80037f6: 68ea ldr r2, [r5, #12]
- 80037f8: 4631 mov r1, r6
- 80037fa: 4660 mov r0, ip
- 80037fc: 4664 mov r4, ip
- 80037fe: f7ff f9f9 bl 8002bf4 <d_print_comp>
- 8003802: 9b0a ldr r3, [sp, #40] ; 0x28
- 8003804: 9a01 ldr r2, [sp, #4]
- 8003806: f8c4 2114 str.w r2, [r4, #276] ; 0x114
- 800380a: b9bb cbnz r3, 800383c <d_print_comp+0xc48>
- 800380c: f1b8 0f01 cmp.w r8, #1
- 8003810: d00c beq.n 800382c <d_print_comp+0xc38>
- 8003812: eb09 1808 add.w r8, r9, r8, lsl #4
- 8003816: af0c add r7, sp, #48 ; 0x30
- 8003818: f858 2c0c ldr.w r2, [r8, #-12]
- 800381c: 4631 mov r1, r6
- 800381e: f1a8 0810 sub.w r8, r8, #16
- 8003822: 4620 mov r0, r4
- 8003824: f002 f87c bl 8005920 <d_print_mod>
- 8003828: 4547 cmp r7, r8
- 800382a: d1f5 bne.n 8003818 <d_print_comp+0xc24>
- 800382c: 4631 mov r1, r6
- 800382e: f8d4 3114 ldr.w r3, [r4, #276] ; 0x114
- 8003832: f105 0208 add.w r2, r5, #8
- 8003836: 4620 mov r0, r4
- 8003838: f002 fdca bl 80063d0 <d_print_array_type.isra.14>
- 800383c: 9905 ldr r1, [sp, #20]
- 800383e: 686a ldr r2, [r5, #4]
- 8003840: f7ff bacb b.w 8002dda <d_print_comp+0x1e6>
- 8003844: 06b2 lsls r2, r6, #26
- 8003846: f026 0860 bic.w r8, r6, #96 ; 0x60
- 800384a: f8d4 3114 ldr.w r3, [r4, #276] ; 0x114
- 800384e: f101 825a bmi.w 8004d06 <d_print_comp+0x2112>
- 8003852: 68aa ldr r2, [r5, #8]
- 8003854: b11a cbz r2, 800385e <d_print_comp+0xc6a>
- 8003856: f016 0640 ands.w r6, r6, #64 ; 0x40
- 800385a: f001 85c3 beq.w 80053e4 <d_print_comp+0x27f0>
- 800385e: 4641 mov r1, r8
- 8003860: f105 020c add.w r2, r5, #12
- 8003864: f8d4 3114 ldr.w r3, [r4, #276] ; 0x114
- 8003868: 4620 mov r0, r4
- 800386a: f002 fb87 bl 8005f7c <d_print_function_type.isra.15>
- 800386e: 9905 ldr r1, [sp, #20]
- 8003870: 686a ldr r2, [r5, #4]
- 8003872: f7ff bab2 b.w 8002dda <d_print_comp+0x1e6>
- 8003876: 4fcb ldr r7, [pc, #812] ; (8003ba4 <d_print_comp+0xfb0>)
- 8003878: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 800387c: f107 0815 add.w r8, r7, #21
- 8003880: f04f 0900 mov.w r9, #0
- 8003884: e016 b.n 80038b4 <d_print_comp+0xcc0>
- 8003886: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 800388a: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 800388e: f884 90ff strb.w r9, [r4, #255] ; 0xff
- 8003892: 4798 blx r3
- 8003894: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8003898: 3301 adds r3, #1
- 800389a: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 800389e: 2200 movs r2, #0
- 80038a0: 2301 movs r3, #1
- 80038a2: 45b8 cmp r8, r7
- 80038a4: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 80038a8: f804 a002 strb.w sl, [r4, r2]
- 80038ac: f884 a104 strb.w sl, [r4, #260] ; 0x104
- 80038b0: f000 8789 beq.w 80047c6 <d_print_comp+0x1bd2>
- 80038b4: 2bff cmp r3, #255 ; 0xff
- 80038b6: 4619 mov r1, r3
- 80038b8: 4620 mov r0, r4
- 80038ba: f817 af01 ldrb.w sl, [r7, #1]!
- 80038be: d0e2 beq.n 8003886 <d_print_comp+0xc92>
- 80038c0: 461a mov r2, r3
- 80038c2: 3301 adds r3, #1
- 80038c4: e7ed b.n 80038a2 <d_print_comp+0xcae>
- 80038c6: 4fb8 ldr r7, [pc, #736] ; (8003ba8 <d_print_comp+0xfb4>)
- 80038c8: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 80038cc: f107 0810 add.w r8, r7, #16
- 80038d0: f04f 0900 mov.w r9, #0
- 80038d4: e016 b.n 8003904 <d_print_comp+0xd10>
- 80038d6: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 80038da: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 80038de: f884 90ff strb.w r9, [r4, #255] ; 0xff
- 80038e2: 4798 blx r3
- 80038e4: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 80038e8: 3301 adds r3, #1
- 80038ea: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 80038ee: 2200 movs r2, #0
- 80038f0: 2301 movs r3, #1
- 80038f2: 45b8 cmp r8, r7
- 80038f4: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 80038f8: f804 a002 strb.w sl, [r4, r2]
- 80038fc: f884 a104 strb.w sl, [r4, #260] ; 0x104
- 8003900: f000 876a beq.w 80047d8 <d_print_comp+0x1be4>
- 8003904: 2bff cmp r3, #255 ; 0xff
- 8003906: 4619 mov r1, r3
- 8003908: 4620 mov r0, r4
- 800390a: f817 af01 ldrb.w sl, [r7, #1]!
- 800390e: d0e2 beq.n 80038d6 <d_print_comp+0xce2>
- 8003910: 461a mov r2, r3
- 8003912: 3301 adds r3, #1
- 8003914: e7ed b.n 80038f2 <d_print_comp+0xcfe>
- 8003916: 4fa5 ldr r7, [pc, #660] ; (8003bac <d_print_comp+0xfb8>)
- 8003918: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 800391c: f107 0812 add.w r8, r7, #18
- 8003920: f04f 0900 mov.w r9, #0
- 8003924: e016 b.n 8003954 <d_print_comp+0xd60>
- 8003926: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 800392a: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 800392e: f884 90ff strb.w r9, [r4, #255] ; 0xff
- 8003932: 4798 blx r3
- 8003934: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8003938: 3301 adds r3, #1
- 800393a: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 800393e: 2200 movs r2, #0
- 8003940: 2301 movs r3, #1
- 8003942: 45b8 cmp r8, r7
- 8003944: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 8003948: f804 a002 strb.w sl, [r4, r2]
- 800394c: f884 a104 strb.w sl, [r4, #260] ; 0x104
- 8003950: f000 8727 beq.w 80047a2 <d_print_comp+0x1bae>
- 8003954: 2bff cmp r3, #255 ; 0xff
- 8003956: 4619 mov r1, r3
- 8003958: 4620 mov r0, r4
- 800395a: f817 af01 ldrb.w sl, [r7, #1]!
- 800395e: d0e2 beq.n 8003926 <d_print_comp+0xd32>
- 8003960: 461a mov r2, r3
- 8003962: 3301 adds r3, #1
- 8003964: e7ed b.n 8003942 <d_print_comp+0xd4e>
- 8003966: 4f92 ldr r7, [pc, #584] ; (8003bb0 <d_print_comp+0xfbc>)
- 8003968: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 800396c: f107 080d add.w r8, r7, #13
- 8003970: f04f 0900 mov.w r9, #0
- 8003974: e016 b.n 80039a4 <d_print_comp+0xdb0>
- 8003976: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 800397a: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 800397e: f884 90ff strb.w r9, [r4, #255] ; 0xff
- 8003982: 4798 blx r3
- 8003984: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8003988: 3301 adds r3, #1
- 800398a: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 800398e: 2200 movs r2, #0
- 8003990: 2301 movs r3, #1
- 8003992: 45b8 cmp r8, r7
- 8003994: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 8003998: f804 a002 strb.w sl, [r4, r2]
- 800399c: f884 a104 strb.w sl, [r4, #260] ; 0x104
- 80039a0: f000 8708 beq.w 80047b4 <d_print_comp+0x1bc0>
- 80039a4: 2bff cmp r3, #255 ; 0xff
- 80039a6: 4619 mov r1, r3
- 80039a8: 4620 mov r0, r4
- 80039aa: f817 ab01 ldrb.w sl, [r7], #1
- 80039ae: d0e2 beq.n 8003976 <d_print_comp+0xd82>
- 80039b0: 461a mov r2, r3
- 80039b2: 3301 adds r3, #1
- 80039b4: e7ed b.n 8003992 <d_print_comp+0xd9e>
- 80039b6: 4f7f ldr r7, [pc, #508] ; (8003bb4 <d_print_comp+0xfc0>)
- 80039b8: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 80039bc: f107 0818 add.w r8, r7, #24
- 80039c0: f04f 0900 mov.w r9, #0
- 80039c4: e016 b.n 80039f4 <d_print_comp+0xe00>
- 80039c6: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 80039ca: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 80039ce: f884 90ff strb.w r9, [r4, #255] ; 0xff
- 80039d2: 4798 blx r3
- 80039d4: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 80039d8: 3301 adds r3, #1
- 80039da: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 80039de: 2200 movs r2, #0
- 80039e0: 2301 movs r3, #1
- 80039e2: 45b8 cmp r8, r7
- 80039e4: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 80039e8: f804 a002 strb.w sl, [r4, r2]
- 80039ec: f884 a104 strb.w sl, [r4, #260] ; 0x104
- 80039f0: f000 8699 beq.w 8004726 <d_print_comp+0x1b32>
- 80039f4: 2bff cmp r3, #255 ; 0xff
- 80039f6: 4619 mov r1, r3
- 80039f8: 4620 mov r0, r4
- 80039fa: f817 af01 ldrb.w sl, [r7, #1]!
- 80039fe: d0e2 beq.n 80039c6 <d_print_comp+0xdd2>
- 8003a00: 461a mov r2, r3
- 8003a02: 3301 adds r3, #1
- 8003a04: e7ed b.n 80039e2 <d_print_comp+0xdee>
- 8003a06: 4f6c ldr r7, [pc, #432] ; (8003bb8 <d_print_comp+0xfc4>)
- 8003a08: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 8003a0c: f107 0808 add.w r8, r7, #8
- 8003a10: f04f 0900 mov.w r9, #0
- 8003a14: e016 b.n 8003a44 <d_print_comp+0xe50>
- 8003a16: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8003a1a: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8003a1e: f884 90ff strb.w r9, [r4, #255] ; 0xff
- 8003a22: 4798 blx r3
- 8003a24: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8003a28: 3301 adds r3, #1
- 8003a2a: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8003a2e: 2200 movs r2, #0
- 8003a30: 2301 movs r3, #1
- 8003a32: 45b8 cmp r8, r7
- 8003a34: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 8003a38: f804 a002 strb.w sl, [r4, r2]
- 8003a3c: f884 a104 strb.w sl, [r4, #260] ; 0x104
- 8003a40: f000 86a6 beq.w 8004790 <d_print_comp+0x1b9c>
- 8003a44: 2bff cmp r3, #255 ; 0xff
- 8003a46: 4619 mov r1, r3
- 8003a48: 4620 mov r0, r4
- 8003a4a: f817 af01 ldrb.w sl, [r7, #1]!
- 8003a4e: d0e2 beq.n 8003a16 <d_print_comp+0xe22>
- 8003a50: 461a mov r2, r3
- 8003a52: 3301 adds r3, #1
- 8003a54: e7ed b.n 8003a32 <d_print_comp+0xe3e>
- 8003a56: 4f59 ldr r7, [pc, #356] ; (8003bbc <d_print_comp+0xfc8>)
- 8003a58: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 8003a5c: f107 080b add.w r8, r7, #11
- 8003a60: f04f 0900 mov.w r9, #0
- 8003a64: e016 b.n 8003a94 <d_print_comp+0xea0>
- 8003a66: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8003a6a: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8003a6e: f884 90ff strb.w r9, [r4, #255] ; 0xff
- 8003a72: 4798 blx r3
- 8003a74: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8003a78: 3301 adds r3, #1
- 8003a7a: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8003a7e: 2200 movs r2, #0
- 8003a80: 2301 movs r3, #1
- 8003a82: 45b8 cmp r8, r7
- 8003a84: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 8003a88: f804 a002 strb.w sl, [r4, r2]
- 8003a8c: f884 a104 strb.w sl, [r4, #260] ; 0x104
- 8003a90: f000 85cc beq.w 800462c <d_print_comp+0x1a38>
- 8003a94: 2bff cmp r3, #255 ; 0xff
- 8003a96: 4619 mov r1, r3
- 8003a98: 4620 mov r0, r4
- 8003a9a: f817 ab01 ldrb.w sl, [r7], #1
- 8003a9e: d0e2 beq.n 8003a66 <d_print_comp+0xe72>
- 8003aa0: 461a mov r2, r3
- 8003aa2: 3301 adds r3, #1
- 8003aa4: e7ed b.n 8003a82 <d_print_comp+0xe8e>
- 8003aa6: f8d4 7100 ldr.w r7, [r4, #256] ; 0x100
- 8003aaa: 2fff cmp r7, #255 ; 0xff
- 8003aac: d112 bne.n 8003ad4 <d_print_comp+0xee0>
- 8003aae: f04f 0800 mov.w r8, #0
- 8003ab2: 4639 mov r1, r7
- 8003ab4: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8003ab8: f884 80ff strb.w r8, [r4, #255] ; 0xff
- 8003abc: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8003ac0: 4620 mov r0, r4
- 8003ac2: 4798 blx r3
- 8003ac4: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8003ac8: f8c4 8100 str.w r8, [r4, #256] ; 0x100
- 8003acc: 3301 adds r3, #1
- 8003ace: 4647 mov r7, r8
- 8003ad0: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8003ad4: 237e movs r3, #126 ; 0x7e
- 8003ad6: 1c7a adds r2, r7, #1
- 8003ad8: f8c4 2100 str.w r2, [r4, #256] ; 0x100
- 8003adc: 55e3 strb r3, [r4, r7]
- 8003ade: f884 3104 strb.w r3, [r4, #260] ; 0x104
- 8003ae2: 4631 mov r1, r6
- 8003ae4: 68ea ldr r2, [r5, #12]
- 8003ae6: 4620 mov r0, r4
- 8003ae8: f7ff f884 bl 8002bf4 <d_print_comp>
- 8003aec: 9905 ldr r1, [sp, #20]
- 8003aee: 686a ldr r2, [r5, #4]
- 8003af0: f7ff b973 b.w 8002dda <d_print_comp+0x1e6>
- 8003af4: 4631 mov r1, r6
- 8003af6: 68ea ldr r2, [r5, #12]
- 8003af8: 4620 mov r0, r4
- 8003afa: f7ff f87b bl 8002bf4 <d_print_comp>
- 8003afe: 9905 ldr r1, [sp, #20]
- 8003b00: 686a ldr r2, [r5, #4]
- 8003b02: f7ff b96a b.w 8002dda <d_print_comp+0x1e6>
- 8003b06: f8d5 8008 ldr.w r8, [r5, #8]
- 8003b0a: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 8003b0e: f1b8 0f00 cmp.w r8, #0
- 8003b12: f000 878b beq.w 8004a2c <d_print_comp+0x1e38>
- 8003b16: 4e2a ldr r6, [pc, #168] ; (8003bc0 <d_print_comp+0xfcc>)
- 8003b18: f04f 0900 mov.w r9, #0
- 8003b1c: f106 0a06 add.w sl, r6, #6
- 8003b20: e015 b.n 8003b4e <d_print_comp+0xf5a>
- 8003b22: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8003b26: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8003b2a: f884 90ff strb.w r9, [r4, #255] ; 0xff
- 8003b2e: 4798 blx r3
- 8003b30: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8003b34: 3301 adds r3, #1
- 8003b36: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8003b3a: 2200 movs r2, #0
- 8003b3c: 2301 movs r3, #1
- 8003b3e: 45b2 cmp sl, r6
- 8003b40: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 8003b44: 54a7 strb r7, [r4, r2]
- 8003b46: f884 7104 strb.w r7, [r4, #260] ; 0x104
- 8003b4a: f000 868f beq.w 800486c <d_print_comp+0x1c78>
- 8003b4e: 2bff cmp r3, #255 ; 0xff
- 8003b50: 4619 mov r1, r3
- 8003b52: 4620 mov r0, r4
- 8003b54: f816 7b01 ldrb.w r7, [r6], #1
- 8003b58: d0e3 beq.n 8003b22 <d_print_comp+0xf2e>
- 8003b5a: 461a mov r2, r3
- 8003b5c: 3301 adds r3, #1
- 8003b5e: e7ee b.n 8003b3e <d_print_comp+0xf4a>
- 8003b60: f8d4 311c ldr.w r3, [r4, #284] ; 0x11c
- 8003b64: 2b00 cmp r3, #0
- 8003b66: f040 86d1 bne.w 800490c <d_print_comp+0x1d18>
- 8003b6a: f105 0108 add.w r1, r5, #8
- 8003b6e: 4620 mov r0, r4
- 8003b70: f7fc fe4a bl 8000808 <d_lookup_template_argument.isra.10>
- 8003b74: 4602 mov r2, r0
- 8003b76: 2800 cmp r0, #0
- 8003b78: f001 8271 beq.w 800505e <d_print_comp+0x246a>
- 8003b7c: 7803 ldrb r3, [r0, #0]
- 8003b7e: 2b2f cmp r3, #47 ; 0x2f
- 8003b80: f001 8262 beq.w 8005048 <d_print_comp+0x2454>
- 8003b84: f8d4 7110 ldr.w r7, [r4, #272] ; 0x110
- 8003b88: 683b ldr r3, [r7, #0]
- 8003b8a: f8c4 3110 str.w r3, [r4, #272] ; 0x110
- 8003b8e: 4631 mov r1, r6
- 8003b90: 4620 mov r0, r4
- 8003b92: f7ff f82f bl 8002bf4 <d_print_comp>
- 8003b96: f8c4 7110 str.w r7, [r4, #272] ; 0x110
- 8003b9a: 9905 ldr r1, [sp, #20]
- 8003b9c: 686a ldr r2, [r5, #4]
- 8003b9e: f7ff b91c b.w 8002dda <d_print_comp+0x1e6>
- 8003ba2: bf00 nop
- 8003ba4: 08012663 .word 0x08012663
- 8003ba8: 0801264f .word 0x0801264f
- 8003bac: 0801263b .word 0x0801263b
- 8003bb0: 0801262c .word 0x0801262c
- 8003bb4: 08012607 .word 0x08012607
- 8003bb8: 080125fb .word 0x080125fb
- 8003bbc: 080125f0 .word 0x080125f0
- 8003bc0: 080127d0 .word 0x080127d0
- 8003bc4: 2300 movs r3, #0
- 8003bc6: 0771 lsls r1, r6, #29
- 8003bc8: f8d4 9114 ldr.w r9, [r4, #276] ; 0x114
- 8003bcc: f8d4 8144 ldr.w r8, [r4, #324] ; 0x144
- 8003bd0: f8c4 3114 str.w r3, [r4, #276] ; 0x114
- 8003bd4: f8c4 5144 str.w r5, [r4, #324] ; 0x144
- 8003bd8: 68af ldr r7, [r5, #8]
- 8003bda: d505 bpl.n 8003be8 <d_print_comp+0xff4>
- 8003bdc: 783b ldrb r3, [r7, #0]
- 8003bde: b91b cbnz r3, 8003be8 <d_print_comp+0xff4>
- 8003be0: 68fa ldr r2, [r7, #12]
- 8003be2: 2a06 cmp r2, #6
- 8003be4: f001 8433 beq.w 800544e <d_print_comp+0x285a>
- 8003be8: 463a mov r2, r7
- 8003bea: 4631 mov r1, r6
- 8003bec: 4620 mov r0, r4
- 8003bee: f7ff f801 bl 8002bf4 <d_print_comp>
- 8003bf2: f894 3104 ldrb.w r3, [r4, #260] ; 0x104
- 8003bf6: 2b3c cmp r3, #60 ; 0x3c
- 8003bf8: f001 8206 beq.w 8005008 <d_print_comp+0x2414>
- 8003bfc: f8d4 7100 ldr.w r7, [r4, #256] ; 0x100
- 8003c00: 2fff cmp r7, #255 ; 0xff
- 8003c02: d112 bne.n 8003c2a <d_print_comp+0x1036>
- 8003c04: f04f 0a00 mov.w sl, #0
- 8003c08: 4639 mov r1, r7
- 8003c0a: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8003c0e: f884 a0ff strb.w sl, [r4, #255] ; 0xff
- 8003c12: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8003c16: 4620 mov r0, r4
- 8003c18: 4798 blx r3
- 8003c1a: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8003c1e: f8c4 a100 str.w sl, [r4, #256] ; 0x100
- 8003c22: 3301 adds r3, #1
- 8003c24: 4657 mov r7, sl
- 8003c26: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8003c2a: 233c movs r3, #60 ; 0x3c
- 8003c2c: 1c7a adds r2, r7, #1
- 8003c2e: f8c4 2100 str.w r2, [r4, #256] ; 0x100
- 8003c32: 55e3 strb r3, [r4, r7]
- 8003c34: f884 3104 strb.w r3, [r4, #260] ; 0x104
- 8003c38: 4631 mov r1, r6
- 8003c3a: 68ea ldr r2, [r5, #12]
- 8003c3c: 4620 mov r0, r4
- 8003c3e: f7fe ffd9 bl 8002bf4 <d_print_comp>
- 8003c42: f894 3104 ldrb.w r3, [r4, #260] ; 0x104
- 8003c46: 2b3e cmp r3, #62 ; 0x3e
- 8003c48: f001 806f beq.w 8004d2a <d_print_comp+0x2136>
- 8003c4c: f8d4 7100 ldr.w r7, [r4, #256] ; 0x100
- 8003c50: 2fff cmp r7, #255 ; 0xff
- 8003c52: d111 bne.n 8003c78 <d_print_comp+0x1084>
- 8003c54: 2600 movs r6, #0
- 8003c56: 4639 mov r1, r7
- 8003c58: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8003c5c: f884 60ff strb.w r6, [r4, #255] ; 0xff
- 8003c60: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8003c64: 4620 mov r0, r4
- 8003c66: 4798 blx r3
- 8003c68: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8003c6c: f8c4 6100 str.w r6, [r4, #256] ; 0x100
- 8003c70: 3301 adds r3, #1
- 8003c72: 4637 mov r7, r6
- 8003c74: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8003c78: 233e movs r3, #62 ; 0x3e
- 8003c7a: 1c7a adds r2, r7, #1
- 8003c7c: f8c4 2100 str.w r2, [r4, #256] ; 0x100
- 8003c80: 55e3 strb r3, [r4, r7]
- 8003c82: f884 3104 strb.w r3, [r4, #260] ; 0x104
- 8003c86: f8c4 9114 str.w r9, [r4, #276] ; 0x114
- 8003c8a: f8c4 8144 str.w r8, [r4, #324] ; 0x144
- 8003c8e: 9905 ldr r1, [sp, #20]
- 8003c90: 686a ldr r2, [r5, #4]
- 8003c92: f7ff b8a2 b.w 8002dda <d_print_comp+0x1e6>
- 8003c96: 4fda ldr r7, [pc, #872] ; (8004000 <d_print_comp+0x140c>)
- 8003c98: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 8003c9c: f107 0811 add.w r8, r7, #17
- 8003ca0: f04f 0900 mov.w r9, #0
- 8003ca4: e016 b.n 8003cd4 <d_print_comp+0x10e0>
- 8003ca6: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8003caa: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8003cae: f884 90ff strb.w r9, [r4, #255] ; 0xff
- 8003cb2: 4798 blx r3
- 8003cb4: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8003cb8: 3301 adds r3, #1
- 8003cba: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8003cbe: 2200 movs r2, #0
- 8003cc0: 2301 movs r3, #1
- 8003cc2: 45b8 cmp r8, r7
- 8003cc4: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 8003cc8: f804 a002 strb.w sl, [r4, r2]
- 8003ccc: f884 a104 strb.w sl, [r4, #260] ; 0x104
- 8003cd0: f000 84eb beq.w 80046aa <d_print_comp+0x1ab6>
- 8003cd4: 2bff cmp r3, #255 ; 0xff
- 8003cd6: 4619 mov r1, r3
- 8003cd8: 4620 mov r0, r4
- 8003cda: f817 af01 ldrb.w sl, [r7, #1]!
- 8003cde: d0e2 beq.n 8003ca6 <d_print_comp+0x10b2>
- 8003ce0: 461a mov r2, r3
- 8003ce2: 3301 adds r3, #1
- 8003ce4: e7ed b.n 8003cc2 <d_print_comp+0x10ce>
- 8003ce6: 4fc7 ldr r7, [pc, #796] ; (8004004 <d_print_comp+0x1410>)
- 8003ce8: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 8003cec: f107 0815 add.w r8, r7, #21
- 8003cf0: f04f 0900 mov.w r9, #0
- 8003cf4: e016 b.n 8003d24 <d_print_comp+0x1130>
- 8003cf6: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8003cfa: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8003cfe: f884 90ff strb.w r9, [r4, #255] ; 0xff
- 8003d02: 4798 blx r3
- 8003d04: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8003d08: 3301 adds r3, #1
- 8003d0a: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8003d0e: 2200 movs r2, #0
- 8003d10: 2301 movs r3, #1
- 8003d12: 45b8 cmp r8, r7
- 8003d14: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 8003d18: f804 a002 strb.w sl, [r4, r2]
- 8003d1c: f884 a104 strb.w sl, [r4, #260] ; 0x104
- 8003d20: f000 84cc beq.w 80046bc <d_print_comp+0x1ac8>
- 8003d24: 2bff cmp r3, #255 ; 0xff
- 8003d26: 4619 mov r1, r3
- 8003d28: 4620 mov r0, r4
- 8003d2a: f817 af01 ldrb.w sl, [r7, #1]!
- 8003d2e: d0e2 beq.n 8003cf6 <d_print_comp+0x1102>
- 8003d30: 461a mov r2, r3
- 8003d32: 3301 adds r3, #1
- 8003d34: e7ed b.n 8003d12 <d_print_comp+0x111e>
- 8003d36: 4fb4 ldr r7, [pc, #720] ; (8004008 <d_print_comp+0x1414>)
- 8003d38: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 8003d3c: f107 0819 add.w r8, r7, #25
- 8003d40: f04f 0900 mov.w r9, #0
- 8003d44: e016 b.n 8003d74 <d_print_comp+0x1180>
- 8003d46: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8003d4a: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8003d4e: f884 90ff strb.w r9, [r4, #255] ; 0xff
- 8003d52: 4798 blx r3
- 8003d54: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8003d58: 3301 adds r3, #1
- 8003d5a: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8003d5e: 2200 movs r2, #0
- 8003d60: 2301 movs r3, #1
- 8003d62: 45b8 cmp r8, r7
- 8003d64: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 8003d68: f804 a002 strb.w sl, [r4, r2]
- 8003d6c: f884 a104 strb.w sl, [r4, #260] ; 0x104
- 8003d70: f000 8489 beq.w 8004686 <d_print_comp+0x1a92>
- 8003d74: 2bff cmp r3, #255 ; 0xff
- 8003d76: 4619 mov r1, r3
- 8003d78: 4620 mov r0, r4
- 8003d7a: f817 af01 ldrb.w sl, [r7, #1]!
- 8003d7e: d0e2 beq.n 8003d46 <d_print_comp+0x1152>
- 8003d80: 461a mov r2, r3
- 8003d82: 3301 adds r3, #1
- 8003d84: e7ed b.n 8003d62 <d_print_comp+0x116e>
- 8003d86: 4fa1 ldr r7, [pc, #644] ; (800400c <d_print_comp+0x1418>)
- 8003d88: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 8003d8c: f107 0816 add.w r8, r7, #22
- 8003d90: f04f 0900 mov.w r9, #0
- 8003d94: e016 b.n 8003dc4 <d_print_comp+0x11d0>
- 8003d96: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8003d9a: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8003d9e: f884 90ff strb.w r9, [r4, #255] ; 0xff
- 8003da2: 4798 blx r3
- 8003da4: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8003da8: 3301 adds r3, #1
- 8003daa: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8003dae: 2200 movs r2, #0
- 8003db0: 2301 movs r3, #1
- 8003db2: 45b8 cmp r8, r7
- 8003db4: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 8003db8: f804 a002 strb.w sl, [r4, r2]
- 8003dbc: f884 a104 strb.w sl, [r4, #260] ; 0x104
- 8003dc0: f000 846a beq.w 8004698 <d_print_comp+0x1aa4>
- 8003dc4: 2bff cmp r3, #255 ; 0xff
- 8003dc6: 4619 mov r1, r3
- 8003dc8: 4620 mov r0, r4
- 8003dca: f817 af01 ldrb.w sl, [r7, #1]!
- 8003dce: d0e2 beq.n 8003d96 <d_print_comp+0x11a2>
- 8003dd0: 461a mov r2, r3
- 8003dd2: 3301 adds r3, #1
- 8003dd4: e7ed b.n 8003db2 <d_print_comp+0x11be>
- 8003dd6: 4f8e ldr r7, [pc, #568] ; (8004010 <d_print_comp+0x141c>)
- 8003dd8: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 8003ddc: f107 0813 add.w r8, r7, #19
- 8003de0: f04f 0900 mov.w r9, #0
- 8003de4: e016 b.n 8003e14 <d_print_comp+0x1220>
- 8003de6: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8003dea: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8003dee: f884 90ff strb.w r9, [r4, #255] ; 0xff
- 8003df2: 4798 blx r3
- 8003df4: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8003df8: 3301 adds r3, #1
- 8003dfa: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8003dfe: 2200 movs r2, #0
- 8003e00: 2301 movs r3, #1
- 8003e02: 45b8 cmp r8, r7
- 8003e04: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 8003e08: f804 a002 strb.w sl, [r4, r2]
- 8003e0c: f884 a104 strb.w sl, [r4, #260] ; 0x104
- 8003e10: f000 8427 beq.w 8004662 <d_print_comp+0x1a6e>
- 8003e14: 2bff cmp r3, #255 ; 0xff
- 8003e16: 4619 mov r1, r3
- 8003e18: 4620 mov r0, r4
- 8003e1a: f817 af01 ldrb.w sl, [r7, #1]!
- 8003e1e: d0e2 beq.n 8003de6 <d_print_comp+0x11f2>
- 8003e20: 461a mov r2, r3
- 8003e22: 3301 adds r3, #1
- 8003e24: e7ed b.n 8003e02 <d_print_comp+0x120e>
- 8003e26: 4f7b ldr r7, [pc, #492] ; (8004014 <d_print_comp+0x1420>)
- 8003e28: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 8003e2c: f107 080f add.w r8, r7, #15
- 8003e30: f04f 0900 mov.w r9, #0
- 8003e34: e016 b.n 8003e64 <d_print_comp+0x1270>
- 8003e36: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8003e3a: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8003e3e: f884 90ff strb.w r9, [r4, #255] ; 0xff
- 8003e42: 4798 blx r3
- 8003e44: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8003e48: 3301 adds r3, #1
- 8003e4a: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8003e4e: 2200 movs r2, #0
- 8003e50: 2301 movs r3, #1
- 8003e52: 45b8 cmp r8, r7
- 8003e54: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 8003e58: f804 a002 strb.w sl, [r4, r2]
- 8003e5c: f884 a104 strb.w sl, [r4, #260] ; 0x104
- 8003e60: f000 8408 beq.w 8004674 <d_print_comp+0x1a80>
- 8003e64: 2bff cmp r3, #255 ; 0xff
- 8003e66: 4619 mov r1, r3
- 8003e68: 4620 mov r0, r4
- 8003e6a: f817 af01 ldrb.w sl, [r7, #1]!
- 8003e6e: d0e2 beq.n 8003e36 <d_print_comp+0x1242>
- 8003e70: 461a mov r2, r3
- 8003e72: 3301 adds r3, #1
- 8003e74: e7ed b.n 8003e52 <d_print_comp+0x125e>
- 8003e76: 4f68 ldr r7, [pc, #416] ; (8004018 <d_print_comp+0x1424>)
- 8003e78: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 8003e7c: f107 081a add.w r8, r7, #26
- 8003e80: f04f 0900 mov.w r9, #0
- 8003e84: e016 b.n 8003eb4 <d_print_comp+0x12c0>
- 8003e86: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8003e8a: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8003e8e: f884 90ff strb.w r9, [r4, #255] ; 0xff
- 8003e92: 4798 blx r3
- 8003e94: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8003e98: 3301 adds r3, #1
- 8003e9a: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8003e9e: 2200 movs r2, #0
- 8003ea0: 2301 movs r3, #1
- 8003ea2: 45b8 cmp r8, r7
- 8003ea4: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 8003ea8: f804 a002 strb.w sl, [r4, r2]
- 8003eac: f884 a104 strb.w sl, [r4, #260] ; 0x104
- 8003eb0: f000 83c5 beq.w 800463e <d_print_comp+0x1a4a>
- 8003eb4: 2bff cmp r3, #255 ; 0xff
- 8003eb6: 4619 mov r1, r3
- 8003eb8: 4620 mov r0, r4
- 8003eba: f817 af01 ldrb.w sl, [r7, #1]!
- 8003ebe: d0e2 beq.n 8003e86 <d_print_comp+0x1292>
- 8003ec0: 461a mov r2, r3
- 8003ec2: 3301 adds r3, #1
- 8003ec4: e7ed b.n 8003ea2 <d_print_comp+0x12ae>
- 8003ec6: 4f55 ldr r7, [pc, #340] ; (800401c <d_print_comp+0x1428>)
- 8003ec8: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 8003ecc: f107 0811 add.w r8, r7, #17
- 8003ed0: f04f 0900 mov.w r9, #0
- 8003ed4: e016 b.n 8003f04 <d_print_comp+0x1310>
- 8003ed6: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8003eda: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8003ede: f884 90ff strb.w r9, [r4, #255] ; 0xff
- 8003ee2: 4798 blx r3
- 8003ee4: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8003ee8: 3301 adds r3, #1
- 8003eea: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8003eee: 2200 movs r2, #0
- 8003ef0: 2301 movs r3, #1
- 8003ef2: 45b8 cmp r8, r7
- 8003ef4: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 8003ef8: f804 a002 strb.w sl, [r4, r2]
- 8003efc: f884 a104 strb.w sl, [r4, #260] ; 0x104
- 8003f00: f000 83a6 beq.w 8004650 <d_print_comp+0x1a5c>
- 8003f04: 2bff cmp r3, #255 ; 0xff
- 8003f06: 4619 mov r1, r3
- 8003f08: 4620 mov r0, r4
- 8003f0a: f817 af01 ldrb.w sl, [r7, #1]!
- 8003f0e: d0e2 beq.n 8003ed6 <d_print_comp+0x12e2>
- 8003f10: 461a mov r2, r3
- 8003f12: 3301 adds r3, #1
- 8003f14: e7ed b.n 8003ef2 <d_print_comp+0x12fe>
- 8003f16: f8d4 711c ldr.w r7, [r4, #284] ; 0x11c
- 8003f1a: f8d5 9008 ldr.w r9, [r5, #8]
- 8003f1e: 2f00 cmp r7, #0
- 8003f20: f040 85ae bne.w 8004a80 <d_print_comp+0x1e8c>
- 8003f24: f899 2000 ldrb.w r2, [r9]
- 8003f28: 2a05 cmp r2, #5
- 8003f2a: f001 8180 beq.w 800522e <d_print_comp+0x263a>
- 8003f2e: f899 3000 ldrb.w r3, [r9]
- 8003f32: 2b23 cmp r3, #35 ; 0x23
- 8003f34: f000 85a0 beq.w 8004a78 <d_print_comp+0x1e84>
- 8003f38: 782a ldrb r2, [r5, #0]
- 8003f3a: 429a cmp r2, r3
- 8003f3c: f000 859c beq.w 8004a78 <d_print_comp+0x1e84>
- 8003f40: 2b24 cmp r3, #36 ; 0x24
- 8003f42: f001 8162 beq.w 800520a <d_print_comp+0x2616>
- 8003f46: f8d4 c114 ldr.w ip, [r4, #276] ; 0x114
- 8003f4a: 46a9 mov r9, r5
- 8003f4c: ab18 add r3, sp, #96 ; 0x60
- 8003f4e: f8d4 2110 ldr.w r2, [r4, #272] ; 0x110
- 8003f52: f843 cd40 str.w ip, [r3, #-64]!
- 8003f56: 2100 movs r1, #0
- 8003f58: e9cd 120a strd r1, r2, [sp, #40] ; 0x28
- 8003f5c: f8cd 9024 str.w r9, [sp, #36] ; 0x24
- 8003f60: f8c4 3114 str.w r3, [r4, #276] ; 0x114
- 8003f64: f8d9 2008 ldr.w r2, [r9, #8]
- 8003f68: e010 b.n 8003f8c <d_print_comp+0x1398>
- 8003f6a: 2200 movs r2, #0
- 8003f6c: ab18 add r3, sp, #96 ; 0x60
- 8003f6e: f8d4 1114 ldr.w r1, [r4, #276] ; 0x114
- 8003f72: f843 1d40 str.w r1, [r3, #-64]!
- 8003f76: f8d4 1110 ldr.w r1, [r4, #272] ; 0x110
- 8003f7a: 9509 str r5, [sp, #36] ; 0x24
- 8003f7c: 2000 movs r0, #0
- 8003f7e: f8c4 3114 str.w r3, [r4, #276] ; 0x114
- 8003f82: e9cd 010a strd r0, r1, [sp, #40] ; 0x28
- 8003f86: 46a9 mov r9, r5
- 8003f88: 2a00 cmp r2, #0
- 8003f8a: d0eb beq.n 8003f64 <d_print_comp+0x1370>
- 8003f8c: 4631 mov r1, r6
- 8003f8e: 4620 mov r0, r4
- 8003f90: f7fe fe30 bl 8002bf4 <d_print_comp>
- 8003f94: 9b0a ldr r3, [sp, #40] ; 0x28
- 8003f96: b923 cbnz r3, 8003fa2 <d_print_comp+0x13ae>
- 8003f98: 464a mov r2, r9
- 8003f9a: 4631 mov r1, r6
- 8003f9c: 4620 mov r0, r4
- 8003f9e: f001 fcbf bl 8005920 <d_print_mod>
- 8003fa2: 9b08 ldr r3, [sp, #32]
- 8003fa4: f8c4 3114 str.w r3, [r4, #276] ; 0x114
- 8003fa8: b10f cbz r7, 8003fae <d_print_comp+0x13ba>
- 8003faa: f8c4 8110 str.w r8, [r4, #272] ; 0x110
- 8003fae: 9905 ldr r1, [sp, #20]
- 8003fb0: 686a ldr r2, [r5, #4]
- 8003fb2: f7fe bf12 b.w 8002dda <d_print_comp+0x1e6>
- 8003fb6: f8d4 c114 ldr.w ip, [r4, #276] ; 0x114
- 8003fba: 4663 mov r3, ip
- 8003fbc: f1bc 0f00 cmp.w ip, #0
- 8003fc0: d0c3 beq.n 8003f4a <d_print_comp+0x1356>
- 8003fc2: 6899 ldr r1, [r3, #8]
- 8003fc4: b951 cbnz r1, 8003fdc <d_print_comp+0x13e8>
- 8003fc6: 685a ldr r2, [r3, #4]
- 8003fc8: 7812 ldrb r2, [r2, #0]
- 8003fca: f1a2 0e19 sub.w lr, r2, #25
- 8003fce: f1be 0f02 cmp.w lr, #2
- 8003fd2: f201 80fc bhi.w 80051ce <d_print_comp+0x25da>
- 8003fd6: 4290 cmp r0, r2
- 8003fd8: f001 80f0 beq.w 80051bc <d_print_comp+0x25c8>
- 8003fdc: 681b ldr r3, [r3, #0]
- 8003fde: 2b00 cmp r3, #0
- 8003fe0: d1ef bne.n 8003fc2 <d_print_comp+0x13ce>
- 8003fe2: e7b2 b.n 8003f4a <d_print_comp+0x1356>
- 8003fe4: e9d5 6702 ldrd r6, r7, [r5, #8]
- 8003fe8: 2f00 cmp r7, #0
- 8003fea: f43e aef6 beq.w 8002dda <d_print_comp+0x1e6>
- 8003fee: 4437 add r7, r6
- 8003ff0: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 8003ff4: 3f01 subs r7, #1
- 8003ff6: 3e01 subs r6, #1
- 8003ff8: f04f 0800 mov.w r8, #0
- 8003ffc: e027 b.n 800404e <d_print_comp+0x145a>
- 8003ffe: bf00 nop
- 8004000: 08012707 .word 0x08012707
- 8004004: 080126ef .word 0x080126ef
- 8004008: 080126d3 .word 0x080126d3
- 800400c: 080126bb .word 0x080126bb
- 8004010: 080126a7 .word 0x080126a7
- 8004014: 08012697 .word 0x08012697
- 8004018: 0801267b .word 0x0801267b
- 800401c: 08012667 .word 0x08012667
- 8004020: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8004024: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8004028: f884 80ff strb.w r8, [r4, #255] ; 0xff
- 800402c: 4798 blx r3
- 800402e: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8004032: 3301 adds r3, #1
- 8004034: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8004038: 2200 movs r2, #0
- 800403a: 2301 movs r3, #1
- 800403c: 42b7 cmp r7, r6
- 800403e: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 8004042: f804 9002 strb.w r9, [r4, r2]
- 8004046: f884 9104 strb.w r9, [r4, #260] ; 0x104
- 800404a: f000 83ce beq.w 80047ea <d_print_comp+0x1bf6>
- 800404e: 2bff cmp r3, #255 ; 0xff
- 8004050: 4619 mov r1, r3
- 8004052: 4620 mov r0, r4
- 8004054: f816 9f01 ldrb.w r9, [r6, #1]!
- 8004058: d0e2 beq.n 8004020 <d_print_comp+0x142c>
- 800405a: 461a mov r2, r3
- 800405c: 3301 adds r3, #1
- 800405e: e7ed b.n 800403c <d_print_comp+0x1448>
- 8004060: 4631 mov r1, r6
- 8004062: 68aa ldr r2, [r5, #8]
- 8004064: 4620 mov r0, r4
- 8004066: f7fe fdc5 bl 8002bf4 <d_print_comp>
- 800406a: 9905 ldr r1, [sp, #20]
- 800406c: 686a ldr r2, [r5, #4]
- 800406e: f7fe beb4 b.w 8002dda <d_print_comp+0x1e6>
- 8004072: f016 0604 ands.w r6, r6, #4
- 8004076: 68a8 ldr r0, [r5, #8]
- 8004078: f040 8505 bne.w 8004a86 <d_print_comp+0x1e92>
- 800407c: e9d0 7300 ldrd r7, r3, [r0]
- 8004080: 2b00 cmp r3, #0
- 8004082: f43e aeaa beq.w 8002dda <d_print_comp+0x1e6>
- 8004086: eb07 0803 add.w r8, r7, r3
- 800408a: f108 38ff add.w r8, r8, #4294967295 ; 0xffffffff
- 800408e: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 8004092: 3f01 subs r7, #1
- 8004094: 46b1 mov r9, r6
- 8004096: e015 b.n 80040c4 <d_print_comp+0x14d0>
- 8004098: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 800409c: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 80040a0: f884 90ff strb.w r9, [r4, #255] ; 0xff
- 80040a4: 4798 blx r3
- 80040a6: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 80040aa: 3301 adds r3, #1
- 80040ac: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 80040b0: 2200 movs r2, #0
- 80040b2: 2301 movs r3, #1
- 80040b4: 45b8 cmp r8, r7
- 80040b6: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 80040ba: 54a6 strb r6, [r4, r2]
- 80040bc: f884 6104 strb.w r6, [r4, #260] ; 0x104
- 80040c0: f000 8545 beq.w 8004b4e <d_print_comp+0x1f5a>
- 80040c4: 2bff cmp r3, #255 ; 0xff
- 80040c6: 4619 mov r1, r3
- 80040c8: 4620 mov r0, r4
- 80040ca: f817 6f01 ldrb.w r6, [r7, #1]!
- 80040ce: d0e3 beq.n 8004098 <d_print_comp+0x14a4>
- 80040d0: 461a mov r2, r3
- 80040d2: 3301 adds r3, #1
- 80040d4: e7ee b.n 80040b4 <d_print_comp+0x14c0>
- 80040d6: f8d5 8008 ldr.w r8, [r5, #8]
- 80040da: f8d4 3114 ldr.w r3, [r4, #276] ; 0x114
- 80040de: 9302 str r3, [sp, #8]
- 80040e0: 2200 movs r2, #0
- 80040e2: f8c4 2114 str.w r2, [r4, #276] ; 0x114
- 80040e6: f1b8 0f00 cmp.w r8, #0
- 80040ea: d025 beq.n 8004138 <d_print_comp+0x1544>
- 80040ec: f8d4 3110 ldr.w r3, [r4, #272] ; 0x110
- 80040f0: 9301 str r3, [sp, #4]
- 80040f2: f10d 0920 add.w r9, sp, #32
- 80040f6: 4623 mov r3, r4
- 80040f8: 4617 mov r7, r2
- 80040fa: 4644 mov r4, r8
- 80040fc: 4692 mov sl, r2
- 80040fe: 4649 mov r1, r9
- 8004100: 46ab mov fp, r5
- 8004102: 4698 mov r8, r3
- 8004104: 7825 ldrb r5, [r4, #0]
- 8004106: 9b01 ldr r3, [sp, #4]
- 8004108: 600a str r2, [r1, #0]
- 800410a: 4628 mov r0, r5
- 800410c: e9c1 4a01 strd r4, sl, [r1, #4]
- 8004110: 60cb str r3, [r1, #12]
- 8004112: 3701 adds r7, #1
- 8004114: 460a mov r2, r1
- 8004116: f7fc f97f bl 8000418 <is_fnqual_component_type>
- 800411a: 2800 cmp r0, #0
- 800411c: f000 87c8 beq.w 80050b0 <d_print_comp+0x24bc>
- 8004120: 68a4 ldr r4, [r4, #8]
- 8004122: 2c00 cmp r4, #0
- 8004124: f001 8057 beq.w 80051d6 <d_print_comp+0x25e2>
- 8004128: 2f04 cmp r7, #4
- 800412a: f101 0110 add.w r1, r1, #16
- 800412e: d1e9 bne.n 8004104 <d_print_comp+0x1510>
- 8004130: 4644 mov r4, r8
- 8004132: 465d mov r5, fp
- 8004134: f8c8 2114 str.w r2, [r8, #276] ; 0x114
- 8004138: 2301 movs r3, #1
- 800413a: f8c4 3118 str.w r3, [r4, #280] ; 0x118
- 800413e: 9905 ldr r1, [sp, #20]
- 8004140: 686a ldr r2, [r5, #4]
- 8004142: f7fe be4a b.w 8002dda <d_print_comp+0x1e6>
- 8004146: f016 0604 ands.w r6, r6, #4
- 800414a: 68af ldr r7, [r5, #8]
- 800414c: f040 8405 bne.w 800495a <d_print_comp+0x1d66>
- 8004150: 68eb ldr r3, [r5, #12]
- 8004152: 2b00 cmp r3, #0
- 8004154: f43e ae41 beq.w 8002dda <d_print_comp+0x1e6>
- 8004158: eb07 0803 add.w r8, r7, r3
- 800415c: f108 38ff add.w r8, r8, #4294967295 ; 0xffffffff
- 8004160: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 8004164: 3f01 subs r7, #1
- 8004166: 46b1 mov r9, r6
- 8004168: e015 b.n 8004196 <d_print_comp+0x15a2>
- 800416a: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 800416e: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8004172: f884 90ff strb.w r9, [r4, #255] ; 0xff
- 8004176: 4798 blx r3
- 8004178: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 800417c: 3301 adds r3, #1
- 800417e: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8004182: 2200 movs r2, #0
- 8004184: 2301 movs r3, #1
- 8004186: 45b8 cmp r8, r7
- 8004188: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 800418c: 54a6 strb r6, [r4, r2]
- 800418e: f884 6104 strb.w r6, [r4, #260] ; 0x104
- 8004192: f000 84e0 beq.w 8004b56 <d_print_comp+0x1f62>
- 8004196: 2bff cmp r3, #255 ; 0xff
- 8004198: 4619 mov r1, r3
- 800419a: 4620 mov r0, r4
- 800419c: f817 6f01 ldrb.w r6, [r7, #1]!
- 80041a0: d0e3 beq.n 800416a <d_print_comp+0x1576>
- 80041a2: 461a mov r2, r3
- 80041a4: 3301 adds r3, #1
- 80041a6: e7ee b.n 8004186 <d_print_comp+0x1592>
- 80041a8: 68aa ldr r2, [r5, #8]
- 80041aa: 4631 mov r1, r6
- 80041ac: 4620 mov r0, r4
- 80041ae: f7fe fd21 bl 8002bf4 <d_print_comp>
- 80041b2: f016 0904 ands.w r9, r6, #4
- 80041b6: f000 8681 beq.w 8004ebc <d_print_comp+0x22c8>
- 80041ba: f8d4 7100 ldr.w r7, [r4, #256] ; 0x100
- 80041be: 2fff cmp r7, #255 ; 0xff
- 80041c0: d112 bne.n 80041e8 <d_print_comp+0x15f4>
- 80041c2: f04f 0800 mov.w r8, #0
- 80041c6: 4639 mov r1, r7
- 80041c8: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 80041cc: f884 80ff strb.w r8, [r4, #255] ; 0xff
- 80041d0: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 80041d4: 4620 mov r0, r4
- 80041d6: 4798 blx r3
- 80041d8: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 80041dc: f8c4 8100 str.w r8, [r4, #256] ; 0x100
- 80041e0: 3301 adds r3, #1
- 80041e2: 4647 mov r7, r8
- 80041e4: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 80041e8: 232e movs r3, #46 ; 0x2e
- 80041ea: 1c7a adds r2, r7, #1
- 80041ec: f8c4 2100 str.w r2, [r4, #256] ; 0x100
- 80041f0: 55e3 strb r3, [r4, r7]
- 80041f2: f884 3104 strb.w r3, [r4, #260] ; 0x104
- 80041f6: 68ef ldr r7, [r5, #12]
- 80041f8: 783b ldrb r3, [r7, #0]
- 80041fa: 2b46 cmp r3, #70 ; 0x46
- 80041fc: f000 873a beq.w 8005074 <d_print_comp+0x2480>
- 8004200: 463a mov r2, r7
- 8004202: 4631 mov r1, r6
- 8004204: 4620 mov r0, r4
- 8004206: f7fe fcf5 bl 8002bf4 <d_print_comp>
- 800420a: 9905 ldr r1, [sp, #20]
- 800420c: 686a ldr r2, [r5, #4]
- 800420e: f7fe bde4 b.w 8002dda <d_print_comp+0x1e6>
- 8004212: 2301 movs r3, #1
- 8004214: f8c4 3118 str.w r3, [r4, #280] ; 0x118
- 8004218: 686a ldr r2, [r5, #4]
- 800421a: f7fe bdde b.w 8002dda <d_print_comp+0x1e6>
- 800421e: 3701 adds r7, #1
- 8004220: 454f cmp r7, r9
- 8004222: f47e ae2b bne.w 8002e7c <d_print_comp+0x288>
- 8004226: 9d03 ldr r5, [sp, #12]
- 8004228: 9905 ldr r1, [sp, #20]
- 800422a: 686a ldr r2, [r5, #4]
- 800422c: f7fe bdd5 b.w 8002dda <d_print_comp+0x1e6>
- 8004230: 4631 mov r1, r6
- 8004232: 68aa ldr r2, [r5, #8]
- 8004234: 4620 mov r0, r4
- 8004236: f7fe fcdd bl 8002bf4 <d_print_comp>
- 800423a: 9905 ldr r1, [sp, #20]
- 800423c: 686a ldr r2, [r5, #4]
- 800423e: f7fe bdcc b.w 8002dda <d_print_comp+0x1e6>
- 8004242: 4631 mov r1, r6
- 8004244: 68aa ldr r2, [r5, #8]
- 8004246: 4620 mov r0, r4
- 8004248: f7fe fcd4 bl 8002bf4 <d_print_comp>
- 800424c: f8d4 7100 ldr.w r7, [r4, #256] ; 0x100
- 8004250: 2fff cmp r7, #255 ; 0xff
- 8004252: d111 bne.n 8004278 <d_print_comp+0x1684>
- 8004254: 2600 movs r6, #0
- 8004256: 4639 mov r1, r7
- 8004258: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 800425c: f884 60ff strb.w r6, [r4, #255] ; 0xff
- 8004260: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8004264: 4620 mov r0, r4
- 8004266: 4798 blx r3
- 8004268: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 800426c: f8c4 6100 str.w r6, [r4, #256] ; 0x100
- 8004270: 3301 adds r3, #1
- 8004272: 4637 mov r7, r6
- 8004274: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8004278: 1c7a adds r2, r7, #1
- 800427a: 2329 movs r3, #41 ; 0x29
- 800427c: f8c4 2100 str.w r2, [r4, #256] ; 0x100
- 8004280: 55e3 strb r3, [r4, r7]
- 8004282: f884 3104 strb.w r3, [r4, #260] ; 0x104
- 8004286: 686a ldr r2, [r5, #4]
- 8004288: 9905 ldr r1, [sp, #20]
- 800428a: f7fe bda6 b.w 8002dda <d_print_comp+0x1e6>
- 800428e: f8d4 311c ldr.w r3, [r4, #284] ; 0x11c
- 8004292: 68aa ldr r2, [r5, #8]
- 8004294: 4fd3 ldr r7, [pc, #844] ; (80045e4 <d_print_comp+0x19f0>)
- 8004296: 3301 adds r3, #1
- 8004298: 4631 mov r1, r6
- 800429a: f8c4 311c str.w r3, [r4, #284] ; 0x11c
- 800429e: 4620 mov r0, r4
- 80042a0: f7fe fca8 bl 8002bf4 <d_print_comp>
- 80042a4: f8d4 211c ldr.w r2, [r4, #284] ; 0x11c
- 80042a8: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 80042ac: 3a01 subs r2, #1
- 80042ae: f8c4 211c str.w r2, [r4, #284] ; 0x11c
- 80042b2: 1cbe adds r6, r7, #2
- 80042b4: f04f 0800 mov.w r8, #0
- 80042b8: e015 b.n 80042e6 <d_print_comp+0x16f2>
- 80042ba: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 80042be: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 80042c2: f884 80ff strb.w r8, [r4, #255] ; 0xff
- 80042c6: 4798 blx r3
- 80042c8: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 80042cc: 3301 adds r3, #1
- 80042ce: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 80042d2: 2200 movs r2, #0
- 80042d4: 2301 movs r3, #1
- 80042d6: 42b7 cmp r7, r6
- 80042d8: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 80042dc: f804 9002 strb.w r9, [r4, r2]
- 80042e0: f884 9104 strb.w r9, [r4, #260] ; 0x104
- 80042e4: d011 beq.n 800430a <d_print_comp+0x1716>
- 80042e6: 2bff cmp r3, #255 ; 0xff
- 80042e8: 4619 mov r1, r3
- 80042ea: 4620 mov r0, r4
- 80042ec: f817 9b01 ldrb.w r9, [r7], #1
- 80042f0: d0e3 beq.n 80042ba <d_print_comp+0x16c6>
- 80042f2: 461a mov r2, r3
- 80042f4: 3301 adds r3, #1
- 80042f6: e7ee b.n 80042d6 <d_print_comp+0x16e2>
- 80042f8: 4631 mov r1, r6
- 80042fa: 68aa ldr r2, [r5, #8]
- 80042fc: 4620 mov r0, r4
- 80042fe: f7fe fc79 bl 8002bf4 <d_print_comp>
- 8004302: 9905 ldr r1, [sp, #20]
- 8004304: 686a ldr r2, [r5, #4]
- 8004306: f7fe bd68 b.w 8002dda <d_print_comp+0x1e6>
- 800430a: 68ea ldr r2, [r5, #12]
- 800430c: 49b6 ldr r1, [pc, #728] ; (80045e8 <d_print_comp+0x19f4>)
- 800430e: 3201 adds r2, #1
- 8004310: a808 add r0, sp, #32
- 8004312: f00a faa3 bl 800e85c <sprintf>
- 8004316: a808 add r0, sp, #32
- 8004318: f002 fd5c bl 8006dd4 <strlen>
- 800431c: b328 cbz r0, 800436a <d_print_comp+0x1776>
- 800431e: ae08 add r6, sp, #32
- 8004320: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 8004324: 1837 adds r7, r6, r0
- 8004326: f04f 0800 mov.w r8, #0
- 800432a: e015 b.n 8004358 <d_print_comp+0x1764>
- 800432c: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8004330: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8004334: f884 80ff strb.w r8, [r4, #255] ; 0xff
- 8004338: 4798 blx r3
- 800433a: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 800433e: 3301 adds r3, #1
- 8004340: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8004344: 2200 movs r2, #0
- 8004346: 2301 movs r3, #1
- 8004348: 42be cmp r6, r7
- 800434a: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 800434e: f804 9002 strb.w r9, [r4, r2]
- 8004352: f884 9104 strb.w r9, [r4, #260] ; 0x104
- 8004356: d00a beq.n 800436e <d_print_comp+0x177a>
- 8004358: 2bff cmp r3, #255 ; 0xff
- 800435a: 4619 mov r1, r3
- 800435c: 4620 mov r0, r4
- 800435e: f816 9b01 ldrb.w r9, [r6], #1
- 8004362: d0e3 beq.n 800432c <d_print_comp+0x1738>
- 8004364: 461a mov r2, r3
- 8004366: 3301 adds r3, #1
- 8004368: e7ee b.n 8004348 <d_print_comp+0x1754>
- 800436a: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 800436e: 2bff cmp r3, #255 ; 0xff
- 8004370: d110 bne.n 8004394 <d_print_comp+0x17a0>
- 8004372: 2600 movs r6, #0
- 8004374: 4619 mov r1, r3
- 8004376: f884 60ff strb.w r6, [r4, #255] ; 0xff
- 800437a: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 800437e: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8004382: 4620 mov r0, r4
- 8004384: 4798 blx r3
- 8004386: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 800438a: f8c4 6100 str.w r6, [r4, #256] ; 0x100
- 800438e: 3301 adds r3, #1
- 8004390: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8004394: f8d4 2100 ldr.w r2, [r4, #256] ; 0x100
- 8004398: 9905 ldr r1, [sp, #20]
- 800439a: 1c50 adds r0, r2, #1
- 800439c: 237d movs r3, #125 ; 0x7d
- 800439e: f8c4 0100 str.w r0, [r4, #256] ; 0x100
- 80043a2: 54a3 strb r3, [r4, r2]
- 80043a4: f884 3104 strb.w r3, [r4, #260] ; 0x104
- 80043a8: 686a ldr r2, [r5, #4]
- 80043aa: f7fe bd16 b.w 8002dda <d_print_comp+0x1e6>
- 80043ae: 4631 mov r1, r6
- 80043b0: 68aa ldr r2, [r5, #8]
- 80043b2: 4620 mov r0, r4
- 80043b4: f7fe fc1e bl 8002bf4 <d_print_comp>
- 80043b8: 9905 ldr r1, [sp, #20]
- 80043ba: 686a ldr r2, [r5, #4]
- 80043bc: f7fe bd0d b.w 8002dda <d_print_comp+0x1e6>
- 80043c0: 68aa ldr r2, [r5, #8]
- 80043c2: 4989 ldr r1, [pc, #548] ; (80045e8 <d_print_comp+0x19f4>)
- 80043c4: 3201 adds r2, #1
- 80043c6: a808 add r0, sp, #32
- 80043c8: f00a fa48 bl 800e85c <sprintf>
- 80043cc: a808 add r0, sp, #32
- 80043ce: f002 fd01 bl 8006dd4 <strlen>
- 80043d2: 2800 cmp r0, #0
- 80043d4: d071 beq.n 80044ba <d_print_comp+0x18c6>
- 80043d6: ae08 add r6, sp, #32
- 80043d8: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 80043dc: 1837 adds r7, r6, r0
- 80043de: f04f 0800 mov.w r8, #0
- 80043e2: e015 b.n 8004410 <d_print_comp+0x181c>
- 80043e4: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 80043e8: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 80043ec: f884 80ff strb.w r8, [r4, #255] ; 0xff
- 80043f0: 4798 blx r3
- 80043f2: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 80043f6: 3301 adds r3, #1
- 80043f8: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 80043fc: 2200 movs r2, #0
- 80043fe: 2301 movs r3, #1
- 8004400: 42b7 cmp r7, r6
- 8004402: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 8004406: f804 9002 strb.w r9, [r4, r2]
- 800440a: f884 9104 strb.w r9, [r4, #260] ; 0x104
- 800440e: d056 beq.n 80044be <d_print_comp+0x18ca>
- 8004410: 2bff cmp r3, #255 ; 0xff
- 8004412: 4619 mov r1, r3
- 8004414: 4620 mov r0, r4
- 8004416: f816 9b01 ldrb.w r9, [r6], #1
- 800441a: d0e3 beq.n 80043e4 <d_print_comp+0x17f0>
- 800441c: 461a mov r2, r3
- 800441e: 3301 adds r3, #1
- 8004420: e7ee b.n 8004400 <d_print_comp+0x180c>
- 8004422: 4631 mov r1, r6
- 8004424: 68ea ldr r2, [r5, #12]
- 8004426: 4620 mov r0, r4
- 8004428: f7fe fbe4 bl 8002bf4 <d_print_comp>
- 800442c: f8d4 7100 ldr.w r7, [r4, #256] ; 0x100
- 8004430: 2fff cmp r7, #255 ; 0xff
- 8004432: d111 bne.n 8004458 <d_print_comp+0x1864>
- 8004434: 2600 movs r6, #0
- 8004436: 4639 mov r1, r7
- 8004438: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 800443c: f884 60ff strb.w r6, [r4, #255] ; 0xff
- 8004440: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8004444: 4620 mov r0, r4
- 8004446: 4798 blx r3
- 8004448: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 800444c: f8c4 6100 str.w r6, [r4, #256] ; 0x100
- 8004450: 3301 adds r3, #1
- 8004452: 4637 mov r7, r6
- 8004454: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8004458: 1c7a adds r2, r7, #1
- 800445a: 235d movs r3, #93 ; 0x5d
- 800445c: f8c4 2100 str.w r2, [r4, #256] ; 0x100
- 8004460: 55e3 strb r3, [r4, r7]
- 8004462: f884 3104 strb.w r3, [r4, #260] ; 0x104
- 8004466: 686a ldr r2, [r5, #4]
- 8004468: 9905 ldr r1, [sp, #20]
- 800446a: f7fe bcb6 b.w 8002dda <d_print_comp+0x1e6>
- 800446e: 4631 mov r1, r6
- 8004470: 68ea ldr r2, [r5, #12]
- 8004472: 4620 mov r0, r4
- 8004474: f7fe fbbe bl 8002bf4 <d_print_comp>
- 8004478: f8d4 7100 ldr.w r7, [r4, #256] ; 0x100
- 800447c: 2fff cmp r7, #255 ; 0xff
- 800447e: d111 bne.n 80044a4 <d_print_comp+0x18b0>
- 8004480: 2600 movs r6, #0
- 8004482: 4639 mov r1, r7
- 8004484: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8004488: f884 60ff strb.w r6, [r4, #255] ; 0xff
- 800448c: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8004490: 4620 mov r0, r4
- 8004492: 4798 blx r3
- 8004494: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8004498: f8c4 6100 str.w r6, [r4, #256] ; 0x100
- 800449c: 3301 adds r3, #1
- 800449e: 4637 mov r7, r6
- 80044a0: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 80044a4: 1c7a adds r2, r7, #1
- 80044a6: 235d movs r3, #93 ; 0x5d
- 80044a8: f8c4 2100 str.w r2, [r4, #256] ; 0x100
- 80044ac: 55e3 strb r3, [r4, r7]
- 80044ae: f884 3104 strb.w r3, [r4, #260] ; 0x104
- 80044b2: 686a ldr r2, [r5, #4]
- 80044b4: 9905 ldr r1, [sp, #20]
- 80044b6: f7fe bc90 b.w 8002dda <d_print_comp+0x1e6>
- 80044ba: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 80044be: 2bff cmp r3, #255 ; 0xff
- 80044c0: d110 bne.n 80044e4 <d_print_comp+0x18f0>
- 80044c2: 2600 movs r6, #0
- 80044c4: 4619 mov r1, r3
- 80044c6: f884 60ff strb.w r6, [r4, #255] ; 0xff
- 80044ca: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 80044ce: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 80044d2: 4620 mov r0, r4
- 80044d4: 4798 blx r3
- 80044d6: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 80044da: f8c4 6100 str.w r6, [r4, #256] ; 0x100
- 80044de: 3301 adds r3, #1
- 80044e0: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 80044e4: f8d4 2100 ldr.w r2, [r4, #256] ; 0x100
- 80044e8: 9905 ldr r1, [sp, #20]
- 80044ea: 1c50 adds r0, r2, #1
- 80044ec: 237d movs r3, #125 ; 0x7d
- 80044ee: f8c4 0100 str.w r0, [r4, #256] ; 0x100
- 80044f2: 54a3 strb r3, [r4, r2]
- 80044f4: f884 3104 strb.w r3, [r4, #260] ; 0x104
- 80044f8: 686a ldr r2, [r5, #4]
- 80044fa: f7fe bc6e b.w 8002dda <d_print_comp+0x1e6>
- 80044fe: 4631 mov r1, r6
- 8004500: 68aa ldr r2, [r5, #8]
- 8004502: 4620 mov r0, r4
- 8004504: f7fe fb76 bl 8002bf4 <d_print_comp>
- 8004508: 9905 ldr r1, [sp, #20]
- 800450a: 686a ldr r2, [r5, #4]
- 800450c: f7fe bc65 b.w 8002dda <d_print_comp+0x1e6>
- 8004510: 9905 ldr r1, [sp, #20]
- 8004512: 686a ldr r2, [r5, #4]
- 8004514: f7fe bc61 b.w 8002dda <d_print_comp+0x1e6>
- 8004518: 4631 mov r1, r6
- 800451a: 68aa ldr r2, [r5, #8]
- 800451c: 4620 mov r0, r4
- 800451e: f7fe fb69 bl 8002bf4 <d_print_comp>
- 8004522: 9905 ldr r1, [sp, #20]
- 8004524: 686a ldr r2, [r5, #4]
- 8004526: f7fe bc58 b.w 8002dda <d_print_comp+0x1e6>
- 800452a: 4631 mov r1, r6
- 800452c: 68ea ldr r2, [r5, #12]
- 800452e: 4620 mov r0, r4
- 8004530: f7fe fb60 bl 8002bf4 <d_print_comp>
- 8004534: 9905 ldr r1, [sp, #20]
- 8004536: 686a ldr r2, [r5, #4]
- 8004538: f7fe bc4f b.w 8002dda <d_print_comp+0x1e6>
- 800453c: f8d4 2144 ldr.w r2, [r4, #324] ; 0x144
- 8004540: b13a cbz r2, 8004552 <d_print_comp+0x195e>
- 8004542: ab18 add r3, sp, #96 ; 0x60
- 8004544: f8d4 1110 ldr.w r1, [r4, #272] ; 0x110
- 8004548: f843 1d40 str.w r1, [r3, #-64]!
- 800454c: 9209 str r2, [sp, #36] ; 0x24
- 800454e: f8c4 3110 str.w r3, [r4, #272] ; 0x110
- 8004552: 68aa ldr r2, [r5, #8]
- 8004554: 7813 ldrb r3, [r2, #0]
- 8004556: 2b04 cmp r3, #4
- 8004558: f000 84d6 beq.w 8004f08 <d_print_comp+0x2314>
- 800455c: 4631 mov r1, r6
- 800455e: 4620 mov r0, r4
- 8004560: f7fe fb48 bl 8002bf4 <d_print_comp>
- 8004564: f8d4 3144 ldr.w r3, [r4, #324] ; 0x144
- 8004568: b113 cbz r3, 8004570 <d_print_comp+0x197c>
- 800456a: 9b08 ldr r3, [sp, #32]
- 800456c: f8c4 3110 str.w r3, [r4, #272] ; 0x110
- 8004570: 9905 ldr r1, [sp, #20]
- 8004572: 686a ldr r2, [r5, #4]
- 8004574: f7fe bc31 b.w 8002dda <d_print_comp+0x1e6>
- 8004578: f8da 6004 ldr.w r6, [sl, #4]
- 800457c: 7832 ldrb r2, [r6, #0]
- 800457e: 3a61 subs r2, #97 ; 0x61
- 8004580: 2a19 cmp r2, #25
- 8004582: d81d bhi.n 80045c0 <d_print_comp+0x19cc>
- 8004584: 2bff cmp r3, #255 ; 0xff
- 8004586: d110 bne.n 80045aa <d_print_comp+0x19b6>
- 8004588: 2600 movs r6, #0
- 800458a: 4619 mov r1, r3
- 800458c: f884 60ff strb.w r6, [r4, #255] ; 0xff
- 8004590: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8004594: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8004598: 4620 mov r0, r4
- 800459a: 4798 blx r3
- 800459c: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 80045a0: f8c4 6100 str.w r6, [r4, #256] ; 0x100
- 80045a4: 3301 adds r3, #1
- 80045a6: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 80045aa: f8d4 2100 ldr.w r2, [r4, #256] ; 0x100
- 80045ae: 2320 movs r3, #32
- 80045b0: 1c51 adds r1, r2, #1
- 80045b2: f8c4 1100 str.w r1, [r4, #256] ; 0x100
- 80045b6: 54a3 strb r3, [r4, r2]
- 80045b8: f884 3104 strb.w r3, [r4, #260] ; 0x104
- 80045bc: f8da 6004 ldr.w r6, [sl, #4]
- 80045c0: 19f3 adds r3, r6, r7
- 80045c2: f813 3c01 ldrb.w r3, [r3, #-1]
- 80045c6: 2b20 cmp r3, #32
- 80045c8: bf08 it eq
- 80045ca: f107 37ff addeq.w r7, r7, #4294967295 ; 0xffffffff
- 80045ce: 2f00 cmp r7, #0
- 80045d0: f000 86fb beq.w 80053ca <d_print_comp+0x27d6>
- 80045d4: 3e01 subs r6, #1
- 80045d6: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 80045da: 4437 add r7, r6
- 80045dc: f04f 0800 mov.w r8, #0
- 80045e0: e01b b.n 800461a <d_print_comp+0x1a26>
- 80045e2: bf00 nop
- 80045e4: 08012824 .word 0x08012824
- 80045e8: 08012574 .word 0x08012574
- 80045ec: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 80045f0: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 80045f4: f884 80ff strb.w r8, [r4, #255] ; 0xff
- 80045f8: 4798 blx r3
- 80045fa: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 80045fe: 3301 adds r3, #1
- 8004600: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8004604: 2200 movs r2, #0
- 8004606: 2301 movs r3, #1
- 8004608: 42be cmp r6, r7
- 800460a: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 800460e: f804 9002 strb.w r9, [r4, r2]
- 8004612: f884 9104 strb.w r9, [r4, #260] ; 0x104
- 8004616: f000 80ec beq.w 80047f2 <d_print_comp+0x1bfe>
- 800461a: 2bff cmp r3, #255 ; 0xff
- 800461c: 4619 mov r1, r3
- 800461e: 4620 mov r0, r4
- 8004620: f816 9f01 ldrb.w r9, [r6, #1]!
- 8004624: d0e2 beq.n 80045ec <d_print_comp+0x19f8>
- 8004626: 461a mov r2, r3
- 8004628: 3301 adds r3, #1
- 800462a: e7ed b.n 8004608 <d_print_comp+0x1a14>
- 800462c: 4631 mov r1, r6
- 800462e: 68aa ldr r2, [r5, #8]
- 8004630: 4620 mov r0, r4
- 8004632: f7fe fadf bl 8002bf4 <d_print_comp>
- 8004636: 9905 ldr r1, [sp, #20]
- 8004638: 686a ldr r2, [r5, #4]
- 800463a: f7fe bbce b.w 8002dda <d_print_comp+0x1e6>
- 800463e: 4631 mov r1, r6
- 8004640: 68aa ldr r2, [r5, #8]
- 8004642: 4620 mov r0, r4
- 8004644: f7fe fad6 bl 8002bf4 <d_print_comp>
- 8004648: 9905 ldr r1, [sp, #20]
- 800464a: 686a ldr r2, [r5, #4]
- 800464c: f7fe bbc5 b.w 8002dda <d_print_comp+0x1e6>
- 8004650: 4631 mov r1, r6
- 8004652: 68aa ldr r2, [r5, #8]
- 8004654: 4620 mov r0, r4
- 8004656: f7fe facd bl 8002bf4 <d_print_comp>
- 800465a: 9905 ldr r1, [sp, #20]
- 800465c: 686a ldr r2, [r5, #4]
- 800465e: f7fe bbbc b.w 8002dda <d_print_comp+0x1e6>
- 8004662: 4631 mov r1, r6
- 8004664: 68aa ldr r2, [r5, #8]
- 8004666: 4620 mov r0, r4
- 8004668: f7fe fac4 bl 8002bf4 <d_print_comp>
- 800466c: 9905 ldr r1, [sp, #20]
- 800466e: 686a ldr r2, [r5, #4]
- 8004670: f7fe bbb3 b.w 8002dda <d_print_comp+0x1e6>
- 8004674: 4631 mov r1, r6
- 8004676: 68aa ldr r2, [r5, #8]
- 8004678: 4620 mov r0, r4
- 800467a: f7fe fabb bl 8002bf4 <d_print_comp>
- 800467e: 9905 ldr r1, [sp, #20]
- 8004680: 686a ldr r2, [r5, #4]
- 8004682: f7fe bbaa b.w 8002dda <d_print_comp+0x1e6>
- 8004686: 4631 mov r1, r6
- 8004688: 68aa ldr r2, [r5, #8]
- 800468a: 4620 mov r0, r4
- 800468c: f7fe fab2 bl 8002bf4 <d_print_comp>
- 8004690: 9905 ldr r1, [sp, #20]
- 8004692: 686a ldr r2, [r5, #4]
- 8004694: f7fe bba1 b.w 8002dda <d_print_comp+0x1e6>
- 8004698: 4631 mov r1, r6
- 800469a: 68aa ldr r2, [r5, #8]
- 800469c: 4620 mov r0, r4
- 800469e: f7fe faa9 bl 8002bf4 <d_print_comp>
- 80046a2: 9905 ldr r1, [sp, #20]
- 80046a4: 686a ldr r2, [r5, #4]
- 80046a6: f7fe bb98 b.w 8002dda <d_print_comp+0x1e6>
- 80046aa: 4631 mov r1, r6
- 80046ac: 68aa ldr r2, [r5, #8]
- 80046ae: 4620 mov r0, r4
- 80046b0: f7fe faa0 bl 8002bf4 <d_print_comp>
- 80046b4: 9905 ldr r1, [sp, #20]
- 80046b6: 686a ldr r2, [r5, #4]
- 80046b8: f7fe bb8f b.w 8002dda <d_print_comp+0x1e6>
- 80046bc: 4fcf ldr r7, [pc, #828] ; (80049fc <d_print_comp+0x1e08>)
- 80046be: 68ea ldr r2, [r5, #12]
- 80046c0: 4631 mov r1, r6
- 80046c2: 4620 mov r0, r4
- 80046c4: f7fe fa96 bl 8002bf4 <d_print_comp>
- 80046c8: f107 0805 add.w r8, r7, #5
- 80046cc: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 80046d0: f04f 0900 mov.w r9, #0
- 80046d4: e015 b.n 8004702 <d_print_comp+0x1b0e>
- 80046d6: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 80046da: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 80046de: f884 90ff strb.w r9, [r4, #255] ; 0xff
- 80046e2: 4798 blx r3
- 80046e4: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 80046e8: 3301 adds r3, #1
- 80046ea: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 80046ee: 2200 movs r2, #0
- 80046f0: 2301 movs r3, #1
- 80046f2: 4547 cmp r7, r8
- 80046f4: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 80046f8: f804 a002 strb.w sl, [r4, r2]
- 80046fc: f884 a104 strb.w sl, [r4, #260] ; 0x104
- 8004700: d008 beq.n 8004714 <d_print_comp+0x1b20>
- 8004702: 2bff cmp r3, #255 ; 0xff
- 8004704: 4619 mov r1, r3
- 8004706: 4620 mov r0, r4
- 8004708: f817 ab01 ldrb.w sl, [r7], #1
- 800470c: d0e3 beq.n 80046d6 <d_print_comp+0x1ae2>
- 800470e: 461a mov r2, r3
- 8004710: 3301 adds r3, #1
- 8004712: e7ee b.n 80046f2 <d_print_comp+0x1afe>
- 8004714: 4631 mov r1, r6
- 8004716: 68aa ldr r2, [r5, #8]
- 8004718: 4620 mov r0, r4
- 800471a: f7fe fa6b bl 8002bf4 <d_print_comp>
- 800471e: 9905 ldr r1, [sp, #20]
- 8004720: 686a ldr r2, [r5, #4]
- 8004722: f7fe bb5a b.w 8002dda <d_print_comp+0x1e6>
- 8004726: 4fb6 ldr r7, [pc, #728] ; (8004a00 <d_print_comp+0x1e0c>)
- 8004728: 68aa ldr r2, [r5, #8]
- 800472a: 4631 mov r1, r6
- 800472c: 4620 mov r0, r4
- 800472e: f7fe fa61 bl 8002bf4 <d_print_comp>
- 8004732: f107 0804 add.w r8, r7, #4
- 8004736: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 800473a: f04f 0900 mov.w r9, #0
- 800473e: e015 b.n 800476c <d_print_comp+0x1b78>
- 8004740: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8004744: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8004748: f884 90ff strb.w r9, [r4, #255] ; 0xff
- 800474c: 4798 blx r3
- 800474e: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8004752: 3301 adds r3, #1
- 8004754: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8004758: 2200 movs r2, #0
- 800475a: 2301 movs r3, #1
- 800475c: 45b8 cmp r8, r7
- 800475e: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 8004762: f804 a002 strb.w sl, [r4, r2]
- 8004766: f884 a104 strb.w sl, [r4, #260] ; 0x104
- 800476a: d008 beq.n 800477e <d_print_comp+0x1b8a>
- 800476c: 2bff cmp r3, #255 ; 0xff
- 800476e: 4619 mov r1, r3
- 8004770: 4620 mov r0, r4
- 8004772: f817 ab01 ldrb.w sl, [r7], #1
- 8004776: d0e3 beq.n 8004740 <d_print_comp+0x1b4c>
- 8004778: 461a mov r2, r3
- 800477a: 3301 adds r3, #1
- 800477c: e7ee b.n 800475c <d_print_comp+0x1b68>
- 800477e: 4631 mov r1, r6
- 8004780: 68ea ldr r2, [r5, #12]
- 8004782: 4620 mov r0, r4
- 8004784: f7fe fa36 bl 8002bf4 <d_print_comp>
- 8004788: 9905 ldr r1, [sp, #20]
- 800478a: 686a ldr r2, [r5, #4]
- 800478c: f7fe bb25 b.w 8002dda <d_print_comp+0x1e6>
- 8004790: 4631 mov r1, r6
- 8004792: 68aa ldr r2, [r5, #8]
- 8004794: 4620 mov r0, r4
- 8004796: f7fe fa2d bl 8002bf4 <d_print_comp>
- 800479a: 9905 ldr r1, [sp, #20]
- 800479c: 686a ldr r2, [r5, #4]
- 800479e: f7fe bb1c b.w 8002dda <d_print_comp+0x1e6>
- 80047a2: 4631 mov r1, r6
- 80047a4: 68aa ldr r2, [r5, #8]
- 80047a6: 4620 mov r0, r4
- 80047a8: f7fe fa24 bl 8002bf4 <d_print_comp>
- 80047ac: 9905 ldr r1, [sp, #20]
- 80047ae: 686a ldr r2, [r5, #4]
- 80047b0: f7fe bb13 b.w 8002dda <d_print_comp+0x1e6>
- 80047b4: 4631 mov r1, r6
- 80047b6: 68aa ldr r2, [r5, #8]
- 80047b8: 4620 mov r0, r4
- 80047ba: f7fe fa1b bl 8002bf4 <d_print_comp>
- 80047be: 9905 ldr r1, [sp, #20]
- 80047c0: 686a ldr r2, [r5, #4]
- 80047c2: f7fe bb0a b.w 8002dda <d_print_comp+0x1e6>
- 80047c6: 4631 mov r1, r6
- 80047c8: 68aa ldr r2, [r5, #8]
- 80047ca: 4620 mov r0, r4
- 80047cc: f7fe fa12 bl 8002bf4 <d_print_comp>
- 80047d0: 9905 ldr r1, [sp, #20]
- 80047d2: 686a ldr r2, [r5, #4]
- 80047d4: f7fe bb01 b.w 8002dda <d_print_comp+0x1e6>
- 80047d8: 4631 mov r1, r6
- 80047da: 68aa ldr r2, [r5, #8]
- 80047dc: 4620 mov r0, r4
- 80047de: f7fe fa09 bl 8002bf4 <d_print_comp>
- 80047e2: 9905 ldr r1, [sp, #20]
- 80047e4: 686a ldr r2, [r5, #4]
- 80047e6: f7fe baf8 b.w 8002dda <d_print_comp+0x1e6>
- 80047ea: 9905 ldr r1, [sp, #20]
- 80047ec: 686a ldr r2, [r5, #4]
- 80047ee: f7fe baf4 b.w 8002dda <d_print_comp+0x1e6>
- 80047f2: 9905 ldr r1, [sp, #20]
- 80047f4: 686a ldr r2, [r5, #4]
- 80047f6: f7fe baf0 b.w 8002dda <d_print_comp+0x1e6>
- 80047fa: 4631 mov r1, r6
- 80047fc: 68ea ldr r2, [r5, #12]
- 80047fe: 9301 str r3, [sp, #4]
- 8004800: 4620 mov r0, r4
- 8004802: f8d4 6124 ldr.w r6, [r4, #292] ; 0x124
- 8004806: f7fe f9f5 bl 8002bf4 <d_print_comp>
- 800480a: f8d4 2124 ldr.w r2, [r4, #292] ; 0x124
- 800480e: 9b01 ldr r3, [sp, #4]
- 8004810: 4296 cmp r6, r2
- 8004812: f000 8441 beq.w 8005098 <d_print_comp+0x24a4>
- 8004816: 9905 ldr r1, [sp, #20]
- 8004818: 686a ldr r2, [r5, #4]
- 800481a: f7fe bade b.w 8002dda <d_print_comp+0x1e6>
- 800481e: 4e79 ldr r6, [pc, #484] ; (8004a04 <d_print_comp+0x1e10>)
- 8004820: 4690 mov r8, r2
- 8004822: f106 0906 add.w r9, r6, #6
- 8004826: e014 b.n 8004852 <d_print_comp+0x1c5e>
- 8004828: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 800482c: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8004830: f884 80ff strb.w r8, [r4, #255] ; 0xff
- 8004834: 4798 blx r3
- 8004836: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 800483a: 3301 adds r3, #1
- 800483c: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8004840: 2200 movs r2, #0
- 8004842: 2301 movs r3, #1
- 8004844: 45b1 cmp r9, r6
- 8004846: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 800484a: 54a7 strb r7, [r4, r2]
- 800484c: f884 7104 strb.w r7, [r4, #260] ; 0x104
- 8004850: d008 beq.n 8004864 <d_print_comp+0x1c70>
- 8004852: 2bff cmp r3, #255 ; 0xff
- 8004854: 4619 mov r1, r3
- 8004856: 4620 mov r0, r4
- 8004858: f816 7b01 ldrb.w r7, [r6], #1
- 800485c: d0e4 beq.n 8004828 <d_print_comp+0x1c34>
- 800485e: 461a mov r2, r3
- 8004860: 3301 adds r3, #1
- 8004862: e7ef b.n 8004844 <d_print_comp+0x1c50>
- 8004864: 9905 ldr r1, [sp, #20]
- 8004866: 686a ldr r2, [r5, #4]
- 8004868: f7fe bab7 b.w 8002dda <d_print_comp+0x1e6>
- 800486c: 4642 mov r2, r8
- 800486e: a808 add r0, sp, #32
- 8004870: 4965 ldr r1, [pc, #404] ; (8004a08 <d_print_comp+0x1e14>)
- 8004872: f009 fff3 bl 800e85c <sprintf>
- 8004876: a808 add r0, sp, #32
- 8004878: f002 faac bl 8006dd4 <strlen>
- 800487c: b328 cbz r0, 80048ca <d_print_comp+0x1cd6>
- 800487e: ae08 add r6, sp, #32
- 8004880: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 8004884: eb06 0900 add.w r9, r6, r0
- 8004888: f04f 0800 mov.w r8, #0
- 800488c: e014 b.n 80048b8 <d_print_comp+0x1cc4>
- 800488e: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8004892: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8004896: f884 80ff strb.w r8, [r4, #255] ; 0xff
- 800489a: 4798 blx r3
- 800489c: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 80048a0: 3301 adds r3, #1
- 80048a2: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 80048a6: 2200 movs r2, #0
- 80048a8: 2301 movs r3, #1
- 80048aa: 45b1 cmp r9, r6
- 80048ac: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 80048b0: 54a7 strb r7, [r4, r2]
- 80048b2: f884 7104 strb.w r7, [r4, #260] ; 0x104
- 80048b6: d008 beq.n 80048ca <d_print_comp+0x1cd6>
- 80048b8: 2bff cmp r3, #255 ; 0xff
- 80048ba: 4619 mov r1, r3
- 80048bc: 4620 mov r0, r4
- 80048be: f816 7b01 ldrb.w r7, [r6], #1
- 80048c2: d0e4 beq.n 800488e <d_print_comp+0x1c9a>
- 80048c4: 461a mov r2, r3
- 80048c6: 3301 adds r3, #1
- 80048c8: e7ef b.n 80048aa <d_print_comp+0x1cb6>
- 80048ca: f8d4 7100 ldr.w r7, [r4, #256] ; 0x100
- 80048ce: 2fff cmp r7, #255 ; 0xff
- 80048d0: d111 bne.n 80048f6 <d_print_comp+0x1d02>
- 80048d2: 2600 movs r6, #0
- 80048d4: 4639 mov r1, r7
- 80048d6: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 80048da: f884 60ff strb.w r6, [r4, #255] ; 0xff
- 80048de: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 80048e2: 4620 mov r0, r4
- 80048e4: 4798 blx r3
- 80048e6: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 80048ea: f8c4 6100 str.w r6, [r4, #256] ; 0x100
- 80048ee: 3301 adds r3, #1
- 80048f0: 4637 mov r7, r6
- 80048f2: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 80048f6: 1c7a adds r2, r7, #1
- 80048f8: 237d movs r3, #125 ; 0x7d
- 80048fa: f8c4 2100 str.w r2, [r4, #256] ; 0x100
- 80048fe: 55e3 strb r3, [r4, r7]
- 8004900: f884 3104 strb.w r3, [r4, #260] ; 0x104
- 8004904: 686a ldr r2, [r5, #4]
- 8004906: 9905 ldr r1, [sp, #20]
- 8004908: f7fe ba67 b.w 8002dda <d_print_comp+0x1e6>
- 800490c: 4e3f ldr r6, [pc, #252] ; (8004a0c <d_print_comp+0x1e18>)
- 800490e: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 8004912: f106 0905 add.w r9, r6, #5
- 8004916: f04f 0800 mov.w r8, #0
- 800491a: e015 b.n 8004948 <d_print_comp+0x1d54>
- 800491c: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8004920: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8004924: f884 80ff strb.w r8, [r4, #255] ; 0xff
- 8004928: 4798 blx r3
- 800492a: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 800492e: 3301 adds r3, #1
- 8004930: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8004934: 2200 movs r2, #0
- 8004936: 2301 movs r3, #1
- 8004938: 45b1 cmp r9, r6
- 800493a: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 800493e: 54a7 strb r7, [r4, r2]
- 8004940: f884 7104 strb.w r7, [r4, #260] ; 0x104
- 8004944: f000 80cf beq.w 8004ae6 <d_print_comp+0x1ef2>
- 8004948: 2bff cmp r3, #255 ; 0xff
- 800494a: 4619 mov r1, r3
- 800494c: 4620 mov r0, r4
- 800494e: f816 7b01 ldrb.w r7, [r6], #1
- 8004952: d0e3 beq.n 800491c <d_print_comp+0x1d28>
- 8004954: 461a mov r2, r3
- 8004956: 3301 adds r3, #1
- 8004958: e7ee b.n 8004938 <d_print_comp+0x1d44>
- 800495a: 68ee ldr r6, [r5, #12]
- 800495c: 443e add r6, r7
- 800495e: 42be cmp r6, r7
- 8004960: f67e aa3b bls.w 8002dda <d_print_comp+0x1e6>
- 8004964: f04f 0800 mov.w r8, #0
- 8004968: e018 b.n 800499c <d_print_comp+0x1da8>
- 800496a: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 800496e: f884 80ff strb.w r8, [r4, #255] ; 0xff
- 8004972: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8004976: 4620 mov r0, r4
- 8004978: 4798 blx r3
- 800497a: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 800497e: 3301 adds r3, #1
- 8004980: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8004984: 2100 movs r1, #0
- 8004986: 2301 movs r3, #1
- 8004988: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 800498c: f804 9001 strb.w r9, [r4, r1]
- 8004990: f884 9104 strb.w r9, [r4, #260] ; 0x104
- 8004994: 3701 adds r7, #1
- 8004996: 42be cmp r6, r7
- 8004998: f240 80e1 bls.w 8004b5e <d_print_comp+0x1f6a>
- 800499c: 1bf3 subs r3, r6, r7
- 800499e: 2b03 cmp r3, #3
- 80049a0: f897 9000 ldrb.w r9, [r7]
- 80049a4: dd02 ble.n 80049ac <d_print_comp+0x1db8>
- 80049a6: f1b9 0f5f cmp.w r9, #95 ; 0x5f
- 80049aa: d005 beq.n 80049b8 <d_print_comp+0x1dc4>
- 80049ac: f8d4 1100 ldr.w r1, [r4, #256] ; 0x100
- 80049b0: 29ff cmp r1, #255 ; 0xff
- 80049b2: d0da beq.n 800496a <d_print_comp+0x1d76>
- 80049b4: 1c4b adds r3, r1, #1
- 80049b6: e7e7 b.n 8004988 <d_print_comp+0x1d94>
- 80049b8: 787b ldrb r3, [r7, #1]
- 80049ba: 2b5f cmp r3, #95 ; 0x5f
- 80049bc: d1f6 bne.n 80049ac <d_print_comp+0x1db8>
- 80049be: 78bb ldrb r3, [r7, #2]
- 80049c0: 2b55 cmp r3, #85 ; 0x55
- 80049c2: d1f3 bne.n 80049ac <d_print_comp+0x1db8>
- 80049c4: 1cf9 adds r1, r7, #3
- 80049c6: 2000 movs r0, #0
- 80049c8: e002 b.n 80049d0 <d_print_comp+0x1ddc>
- 80049ca: 4613 mov r3, r2
- 80049cc: eb03 1000 add.w r0, r3, r0, lsl #4
- 80049d0: 428e cmp r6, r1
- 80049d2: 468a mov sl, r1
- 80049d4: d9ea bls.n 80049ac <d_print_comp+0x1db8>
- 80049d6: f811 3b01 ldrb.w r3, [r1], #1
- 80049da: f1a3 0230 sub.w r2, r3, #48 ; 0x30
- 80049de: fa5f fe82 uxtb.w lr, r2
- 80049e2: f1be 0f09 cmp.w lr, #9
- 80049e6: f1a3 0c41 sub.w ip, r3, #65 ; 0x41
- 80049ea: d9ee bls.n 80049ca <d_print_comp+0x1dd6>
- 80049ec: f1bc 0f05 cmp.w ip, #5
- 80049f0: f1a3 0261 sub.w r2, r3, #97 ; 0x61
- 80049f4: f200 85c7 bhi.w 8005586 <d_print_comp+0x2992>
- 80049f8: 3b37 subs r3, #55 ; 0x37
- 80049fa: e7e7 b.n 80049cc <d_print_comp+0x1dd8>
- 80049fc: 080126e8 .word 0x080126e8
- 8004a00: 08012624 .word 0x08012624
- 8004a04: 08012748 .word 0x08012748
- 8004a08: 08012574 .word 0x08012574
- 8004a0c: 080125e8 .word 0x080125e8
- 8004a10: 9905 ldr r1, [sp, #20]
- 8004a12: 686a ldr r2, [r5, #4]
- 8004a14: f7fe b9e1 b.w 8002dda <d_print_comp+0x1e6>
- 8004a18: 68aa ldr r2, [r5, #8]
- 8004a1a: 9201 str r2, [sp, #4]
- 8004a1c: 4619 mov r1, r3
- 8004a1e: 2b00 cmp r3, #0
- 8004a20: f47e aa26 bne.w 8002e70 <d_print_comp+0x27c>
- 8004a24: 9905 ldr r1, [sp, #20]
- 8004a26: 686a ldr r2, [r5, #4]
- 8004a28: f7fe b9d7 b.w 8002dda <d_print_comp+0x1e6>
- 8004a2c: 4ece ldr r6, [pc, #824] ; (8004d68 <d_print_comp+0x2174>)
- 8004a2e: f106 0904 add.w r9, r6, #4
- 8004a32: e014 b.n 8004a5e <d_print_comp+0x1e6a>
- 8004a34: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8004a38: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8004a3c: f884 80ff strb.w r8, [r4, #255] ; 0xff
- 8004a40: 4798 blx r3
- 8004a42: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8004a46: 3301 adds r3, #1
- 8004a48: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8004a4c: 2200 movs r2, #0
- 8004a4e: 2301 movs r3, #1
- 8004a50: 45b1 cmp r9, r6
- 8004a52: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 8004a56: 54a7 strb r7, [r4, r2]
- 8004a58: f884 7104 strb.w r7, [r4, #260] ; 0x104
- 8004a5c: d008 beq.n 8004a70 <d_print_comp+0x1e7c>
- 8004a5e: 2bff cmp r3, #255 ; 0xff
- 8004a60: 4619 mov r1, r3
- 8004a62: 4620 mov r0, r4
- 8004a64: f816 7b01 ldrb.w r7, [r6], #1
- 8004a68: d0e4 beq.n 8004a34 <d_print_comp+0x1e40>
- 8004a6a: 461a mov r2, r3
- 8004a6c: 3301 adds r3, #1
- 8004a6e: e7ef b.n 8004a50 <d_print_comp+0x1e5c>
- 8004a70: 9905 ldr r1, [sp, #20]
- 8004a72: 686a ldr r2, [r5, #4]
- 8004a74: f7fe b9b1 b.w 8002dda <d_print_comp+0x1e6>
- 8004a78: f8d4 c114 ldr.w ip, [r4, #276] ; 0x114
- 8004a7c: f7ff ba66 b.w 8003f4c <d_print_comp+0x1358>
- 8004a80: 2700 movs r7, #0
- 8004a82: f7ff ba54 b.w 8003f2e <d_print_comp+0x133a>
- 8004a86: e9d0 6702 ldrd r6, r7, [r0, #8]
- 8004a8a: 2f00 cmp r7, #0
- 8004a8c: f43e a9a5 beq.w 8002dda <d_print_comp+0x1e6>
- 8004a90: 4437 add r7, r6
- 8004a92: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 8004a96: 3f01 subs r7, #1
- 8004a98: 3e01 subs r6, #1
- 8004a9a: f04f 0900 mov.w r9, #0
- 8004a9e: e015 b.n 8004acc <d_print_comp+0x1ed8>
- 8004aa0: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8004aa4: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8004aa8: f884 90ff strb.w r9, [r4, #255] ; 0xff
- 8004aac: 4798 blx r3
- 8004aae: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8004ab2: 3301 adds r3, #1
- 8004ab4: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8004ab8: 2200 movs r2, #0
- 8004aba: 2301 movs r3, #1
- 8004abc: 42b7 cmp r7, r6
- 8004abe: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 8004ac2: f804 8002 strb.w r8, [r4, r2]
- 8004ac6: f884 8104 strb.w r8, [r4, #260] ; 0x104
- 8004aca: d008 beq.n 8004ade <d_print_comp+0x1eea>
- 8004acc: 2bff cmp r3, #255 ; 0xff
- 8004ace: 4619 mov r1, r3
- 8004ad0: 4620 mov r0, r4
- 8004ad2: f816 8f01 ldrb.w r8, [r6, #1]!
- 8004ad6: d0e3 beq.n 8004aa0 <d_print_comp+0x1eac>
- 8004ad8: 461a mov r2, r3
- 8004ada: 3301 adds r3, #1
- 8004adc: e7ee b.n 8004abc <d_print_comp+0x1ec8>
- 8004ade: 9905 ldr r1, [sp, #20]
- 8004ae0: 686a ldr r2, [r5, #4]
- 8004ae2: f7fe b97a b.w 8002dda <d_print_comp+0x1e6>
- 8004ae6: 68aa ldr r2, [r5, #8]
- 8004ae8: 49a0 ldr r1, [pc, #640] ; (8004d6c <d_print_comp+0x2178>)
- 8004aea: 3201 adds r2, #1
- 8004aec: a808 add r0, sp, #32
- 8004aee: f009 feb5 bl 800e85c <sprintf>
- 8004af2: a808 add r0, sp, #32
- 8004af4: f002 f96e bl 8006dd4 <strlen>
- 8004af8: b328 cbz r0, 8004b46 <d_print_comp+0x1f52>
- 8004afa: ae08 add r6, sp, #32
- 8004afc: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 8004b00: eb06 0900 add.w r9, r6, r0
- 8004b04: f04f 0800 mov.w r8, #0
- 8004b08: e014 b.n 8004b34 <d_print_comp+0x1f40>
- 8004b0a: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8004b0e: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8004b12: f884 80ff strb.w r8, [r4, #255] ; 0xff
- 8004b16: 4798 blx r3
- 8004b18: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8004b1c: 3301 adds r3, #1
- 8004b1e: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8004b22: 2200 movs r2, #0
- 8004b24: 2301 movs r3, #1
- 8004b26: 45b1 cmp r9, r6
- 8004b28: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 8004b2c: 54a7 strb r7, [r4, r2]
- 8004b2e: f884 7104 strb.w r7, [r4, #260] ; 0x104
- 8004b32: d008 beq.n 8004b46 <d_print_comp+0x1f52>
- 8004b34: 2bff cmp r3, #255 ; 0xff
- 8004b36: 4619 mov r1, r3
- 8004b38: 4620 mov r0, r4
- 8004b3a: f816 7b01 ldrb.w r7, [r6], #1
- 8004b3e: d0e4 beq.n 8004b0a <d_print_comp+0x1f16>
- 8004b40: 461a mov r2, r3
- 8004b42: 3301 adds r3, #1
- 8004b44: e7ef b.n 8004b26 <d_print_comp+0x1f32>
- 8004b46: 9905 ldr r1, [sp, #20]
- 8004b48: 686a ldr r2, [r5, #4]
- 8004b4a: f7fe b946 b.w 8002dda <d_print_comp+0x1e6>
- 8004b4e: 9905 ldr r1, [sp, #20]
- 8004b50: 686a ldr r2, [r5, #4]
- 8004b52: f7fe b942 b.w 8002dda <d_print_comp+0x1e6>
- 8004b56: 9905 ldr r1, [sp, #20]
- 8004b58: 686a ldr r2, [r5, #4]
- 8004b5a: f7fe b93e b.w 8002dda <d_print_comp+0x1e6>
- 8004b5e: 9905 ldr r1, [sp, #20]
- 8004b60: 686a ldr r2, [r5, #4]
- 8004b62: f7fe b93a b.w 8002dda <d_print_comp+0x1e6>
- 8004b66: 68db ldr r3, [r3, #12]
- 8004b68: 781b ldrb r3, [r3, #0]
- 8004b6a: 2b3b cmp r3, #59 ; 0x3b
- 8004b6c: f47e abf6 bne.w 800335c <d_print_comp+0x768>
- 8004b70: f105 030c add.w r3, r5, #12
- 8004b74: 68aa ldr r2, [r5, #8]
- 8004b76: 4631 mov r1, r6
- 8004b78: 4620 mov r0, r4
- 8004b7a: f001 fd95 bl 80066a8 <d_maybe_print_fold_expression.isra.20>
- 8004b7e: 4680 mov r8, r0
- 8004b80: 2800 cmp r0, #0
- 8004b82: f040 86a0 bne.w 80058c6 <d_print_comp+0x2cd2>
- 8004b86: e9d5 7202 ldrd r7, r2, [r5, #8]
- 8004b8a: 68b9 ldr r1, [r7, #8]
- 8004b8c: 68d3 ldr r3, [r2, #12]
- 8004b8e: 6808 ldr r0, [r1, #0]
- 8004b90: 4977 ldr r1, [pc, #476] ; (8004d70 <d_print_comp+0x217c>)
- 8004b92: f8d2 b008 ldr.w fp, [r2, #8]
- 8004b96: e9d3 a902 ldrd sl, r9, [r3, #8]
- 8004b9a: f002 f911 bl 8006dc0 <strcmp>
- 8004b9e: 2800 cmp r0, #0
- 8004ba0: f000 8674 beq.w 800588c <d_print_comp+0x2c98>
- 8004ba4: 2204 movs r2, #4
- 8004ba6: 4973 ldr r1, [pc, #460] ; (8004d74 <d_print_comp+0x2180>)
- 8004ba8: 4620 mov r0, r4
- 8004baa: f7fb fbff bl 80003ac <d_append_buffer>
- 8004bae: f8db 3008 ldr.w r3, [fp, #8]
- 8004bb2: b303 cbz r3, 8004bf6 <d_print_comp+0x2002>
- 8004bb4: 465a mov r2, fp
- 8004bb6: 4631 mov r1, r6
- 8004bb8: 4620 mov r0, r4
- 8004bba: f001 fd23 bl 8006604 <d_print_subexpr>
- 8004bbe: f8d4 7100 ldr.w r7, [r4, #256] ; 0x100
- 8004bc2: 2fff cmp r7, #255 ; 0xff
- 8004bc4: d110 bne.n 8004be8 <d_print_comp+0x1ff4>
- 8004bc6: 4639 mov r1, r7
- 8004bc8: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8004bcc: f884 80ff strb.w r8, [r4, #255] ; 0xff
- 8004bd0: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8004bd4: 4620 mov r0, r4
- 8004bd6: 4798 blx r3
- 8004bd8: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8004bdc: f8c4 8100 str.w r8, [r4, #256] ; 0x100
- 8004be0: 3301 adds r3, #1
- 8004be2: 4647 mov r7, r8
- 8004be4: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8004be8: 2320 movs r3, #32
- 8004bea: 1c7a adds r2, r7, #1
- 8004bec: f8c4 2100 str.w r2, [r4, #256] ; 0x100
- 8004bf0: 55e3 strb r3, [r4, r7]
- 8004bf2: f884 3104 strb.w r3, [r4, #260] ; 0x104
- 8004bf6: 4652 mov r2, sl
- 8004bf8: 4631 mov r1, r6
- 8004bfa: 4620 mov r0, r4
- 8004bfc: f7fd fffa bl 8002bf4 <d_print_comp>
- 8004c00: f1b9 0f00 cmp.w r9, #0
- 8004c04: f000 8663 beq.w 80058ce <d_print_comp+0x2cda>
- 8004c08: 464a mov r2, r9
- 8004c0a: 4631 mov r1, r6
- 8004c0c: 4620 mov r0, r4
- 8004c0e: f001 fcf9 bl 8006604 <d_print_subexpr>
- 8004c12: 9905 ldr r1, [sp, #20]
- 8004c14: 686a ldr r2, [r5, #4]
- 8004c16: f7fe b8e0 b.w 8002dda <d_print_comp+0x1e6>
- 8004c1a: f8d9 3008 ldr.w r3, [r9, #8]
- 8004c1e: 4956 ldr r1, [pc, #344] ; (8004d78 <d_print_comp+0x2184>)
- 8004c20: f8d3 a000 ldr.w sl, [r3]
- 8004c24: 4650 mov r0, sl
- 8004c26: f002 f8cb bl 8006dc0 <strcmp>
- 8004c2a: f898 3000 ldrb.w r3, [r8]
- 8004c2e: b910 cbnz r0, 8004c36 <d_print_comp+0x2042>
- 8004c30: 2b03 cmp r3, #3
- 8004c32: f000 852b beq.w 800568c <d_print_comp+0x2a98>
- 8004c36: 2b38 cmp r3, #56 ; 0x38
- 8004c38: f000 850c beq.w 8005654 <d_print_comp+0x2a60>
- 8004c3c: 494f ldr r1, [pc, #316] ; (8004d7c <d_print_comp+0x2188>)
- 8004c3e: 4650 mov r0, sl
- 8004c40: f002 f8be bl 8006dc0 <strcmp>
- 8004c44: 4607 mov r7, r0
- 8004c46: 2800 cmp r0, #0
- 8004c48: f000 8513 beq.w 8005672 <d_print_comp+0x2a7e>
- 8004c4c: 494c ldr r1, [pc, #304] ; (8004d80 <d_print_comp+0x218c>)
- 8004c4e: 4650 mov r0, sl
- 8004c50: f002 f8b6 bl 8006dc0 <strcmp>
- 8004c54: 2800 cmp r0, #0
- 8004c56: f000 8333 beq.w 80052c0 <d_print_comp+0x26cc>
- 8004c5a: 4631 mov r1, r6
- 8004c5c: 4620 mov r0, r4
- 8004c5e: 464a mov r2, r9
- 8004c60: f001 fc90 bl 8006584 <d_print_expr_op>
- 8004c64: 4947 ldr r1, [pc, #284] ; (8004d84 <d_print_comp+0x2190>)
- 8004c66: 4650 mov r0, sl
- 8004c68: f002 f8aa bl 8006dc0 <strcmp>
- 8004c6c: 2800 cmp r0, #0
- 8004c6e: f000 83b0 beq.w 80053d2 <d_print_comp+0x27de>
- 8004c72: 4650 mov r0, sl
- 8004c74: 4944 ldr r1, [pc, #272] ; (8004d88 <d_print_comp+0x2194>)
- 8004c76: f002 f8a3 bl 8006dc0 <strcmp>
- 8004c7a: 4681 mov r9, r0
- 8004c7c: 2800 cmp r0, #0
- 8004c7e: f47e abd7 bne.w 8003430 <d_print_comp+0x83c>
- 8004c82: f8d4 7100 ldr.w r7, [r4, #256] ; 0x100
- 8004c86: 2fff cmp r7, #255 ; 0xff
- 8004c88: d110 bne.n 8004cac <d_print_comp+0x20b8>
- 8004c8a: f884 00ff strb.w r0, [r4, #255] ; 0xff
- 8004c8e: 4639 mov r1, r7
- 8004c90: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8004c94: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8004c98: 4620 mov r0, r4
- 8004c9a: 4798 blx r3
- 8004c9c: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8004ca0: f8c4 9100 str.w r9, [r4, #256] ; 0x100
- 8004ca4: 3301 adds r3, #1
- 8004ca6: 464f mov r7, r9
- 8004ca8: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8004cac: 1c78 adds r0, r7, #1
- 8004cae: 2328 movs r3, #40 ; 0x28
- 8004cb0: f8c4 0100 str.w r0, [r4, #256] ; 0x100
- 8004cb4: 4642 mov r2, r8
- 8004cb6: 55e3 strb r3, [r4, r7]
- 8004cb8: 4631 mov r1, r6
- 8004cba: 4620 mov r0, r4
- 8004cbc: f884 3104 strb.w r3, [r4, #260] ; 0x104
- 8004cc0: f7fd ff98 bl 8002bf4 <d_print_comp>
- 8004cc4: f8d4 7100 ldr.w r7, [r4, #256] ; 0x100
- 8004cc8: 2fff cmp r7, #255 ; 0xff
- 8004cca: d111 bne.n 8004cf0 <d_print_comp+0x20fc>
- 8004ccc: 2600 movs r6, #0
- 8004cce: 4639 mov r1, r7
- 8004cd0: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8004cd4: f884 60ff strb.w r6, [r4, #255] ; 0xff
- 8004cd8: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8004cdc: 4620 mov r0, r4
- 8004cde: 4798 blx r3
- 8004ce0: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8004ce4: f8c4 6100 str.w r6, [r4, #256] ; 0x100
- 8004ce8: 3301 adds r3, #1
- 8004cea: 4637 mov r7, r6
- 8004cec: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8004cf0: 1c7a adds r2, r7, #1
- 8004cf2: 2329 movs r3, #41 ; 0x29
- 8004cf4: f8c4 2100 str.w r2, [r4, #256] ; 0x100
- 8004cf8: 55e3 strb r3, [r4, r7]
- 8004cfa: f884 3104 strb.w r3, [r4, #260] ; 0x104
- 8004cfe: 686a ldr r2, [r5, #4]
- 8004d00: 9905 ldr r1, [sp, #20]
- 8004d02: f7fe b86a b.w 8002dda <d_print_comp+0x1e6>
- 8004d06: f105 020c add.w r2, r5, #12
- 8004d0a: 4641 mov r1, r8
- 8004d0c: 4620 mov r0, r4
- 8004d0e: f001 f935 bl 8005f7c <d_print_function_type.isra.15>
- 8004d12: 68aa ldr r2, [r5, #8]
- 8004d14: 2a00 cmp r2, #0
- 8004d16: f000 83fd beq.w 8005514 <d_print_comp+0x2920>
- 8004d1a: 4641 mov r1, r8
- 8004d1c: 4620 mov r0, r4
- 8004d1e: f7fd ff69 bl 8002bf4 <d_print_comp>
- 8004d22: 9905 ldr r1, [sp, #20]
- 8004d24: 686a ldr r2, [r5, #4]
- 8004d26: f7fe b858 b.w 8002dda <d_print_comp+0x1e6>
- 8004d2a: f8d4 7100 ldr.w r7, [r4, #256] ; 0x100
- 8004d2e: 2fff cmp r7, #255 ; 0xff
- 8004d30: d111 bne.n 8004d56 <d_print_comp+0x2162>
- 8004d32: 2600 movs r6, #0
- 8004d34: 4639 mov r1, r7
- 8004d36: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8004d3a: f884 60ff strb.w r6, [r4, #255] ; 0xff
- 8004d3e: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8004d42: 4620 mov r0, r4
- 8004d44: 4798 blx r3
- 8004d46: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8004d4a: f8c4 6100 str.w r6, [r4, #256] ; 0x100
- 8004d4e: 3301 adds r3, #1
- 8004d50: 4637 mov r7, r6
- 8004d52: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8004d56: 2320 movs r3, #32
- 8004d58: 1c7a adds r2, r7, #1
- 8004d5a: f8c4 2100 str.w r2, [r4, #256] ; 0x100
- 8004d5e: 55e3 strb r3, [r4, r7]
- 8004d60: f884 3104 strb.w r3, [r4, #260] ; 0x104
- 8004d64: f7fe bf72 b.w 8003c4c <d_print_comp+0x1058>
- 8004d68: 080127c8 .word 0x080127c8
- 8004d6c: 08012574 .word 0x08012574
- 8004d70: 08012588 .word 0x08012588
- 8004d74: 08012784 .word 0x08012784
- 8004d78: 0801276c .word 0x0801276c
- 8004d7c: 08012770 .word 0x08012770
- 8004d80: 08012578 .word 0x08012578
- 8004d84: 08012774 .word 0x08012774
- 8004d88: 08012a94 .word 0x08012a94
- 8004d8c: 689b ldr r3, [r3, #8]
- 8004d8e: f893 8010 ldrb.w r8, [r3, #16]
- 8004d92: f1b8 0f00 cmp.w r8, #0
- 8004d96: f43e aa89 beq.w 80032ac <d_print_comp+0x6b8>
- 8004d9a: f1b8 0f06 cmp.w r8, #6
- 8004d9e: f240 843f bls.w 8005620 <d_print_comp+0x2a2c>
- 8004da2: f1b8 0f07 cmp.w r8, #7
- 8004da6: f47e aa81 bne.w 80032ac <d_print_comp+0x6b8>
- 8004daa: 68eb ldr r3, [r5, #12]
- 8004dac: 781a ldrb r2, [r3, #0]
- 8004dae: 2a00 cmp r2, #0
- 8004db0: f47e aa7c bne.w 80032ac <d_print_comp+0x6b8>
- 8004db4: 68da ldr r2, [r3, #12]
- 8004db6: 2a01 cmp r2, #1
- 8004db8: f47e aa78 bne.w 80032ac <d_print_comp+0x6b8>
- 8004dbc: 283c cmp r0, #60 ; 0x3c
- 8004dbe: f47e aa75 bne.w 80032ac <d_print_comp+0x6b8>
- 8004dc2: 689b ldr r3, [r3, #8]
- 8004dc4: 781b ldrb r3, [r3, #0]
- 8004dc6: 2b30 cmp r3, #48 ; 0x30
- 8004dc8: f000 84b6 beq.w 8005738 <d_print_comp+0x2b44>
- 8004dcc: 2b31 cmp r3, #49 ; 0x31
- 8004dce: f47e aa6d bne.w 80032ac <d_print_comp+0x6b8>
- 8004dd2: 2204 movs r2, #4
- 8004dd4: 49c3 ldr r1, [pc, #780] ; (80050e4 <d_print_comp+0x24f0>)
- 8004dd6: 4620 mov r0, r4
- 8004dd8: f7fb fae8 bl 80003ac <d_append_buffer>
- 8004ddc: 9905 ldr r1, [sp, #20]
- 8004dde: 686a ldr r2, [r5, #4]
- 8004de0: f7fd bffb b.w 8002dda <d_print_comp+0x1e6>
- 8004de4: f8d4 7100 ldr.w r7, [r4, #256] ; 0x100
- 8004de8: 2fff cmp r7, #255 ; 0xff
- 8004dea: d112 bne.n 8004e12 <d_print_comp+0x221e>
- 8004dec: f04f 0800 mov.w r8, #0
- 8004df0: 4639 mov r1, r7
- 8004df2: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8004df6: f884 80ff strb.w r8, [r4, #255] ; 0xff
- 8004dfa: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8004dfe: 4620 mov r0, r4
- 8004e00: 4798 blx r3
- 8004e02: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8004e06: f8c4 8100 str.w r8, [r4, #256] ; 0x100
- 8004e0a: 3301 adds r3, #1
- 8004e0c: 4647 mov r7, r8
- 8004e0e: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8004e12: 1c7a adds r2, r7, #1
- 8004e14: 235b movs r3, #91 ; 0x5b
- 8004e16: f8c4 2100 str.w r2, [r4, #256] ; 0x100
- 8004e1a: 55e3 strb r3, [r4, r7]
- 8004e1c: f884 3104 strb.w r3, [r4, #260] ; 0x104
- 8004e20: 4631 mov r1, r6
- 8004e22: 68ea ldr r2, [r5, #12]
- 8004e24: 4620 mov r0, r4
- 8004e26: f7fd fee5 bl 8002bf4 <d_print_comp>
- 8004e2a: f8d4 7100 ldr.w r7, [r4, #256] ; 0x100
- 8004e2e: 2fff cmp r7, #255 ; 0xff
- 8004e30: d111 bne.n 8004e56 <d_print_comp+0x2262>
- 8004e32: 2600 movs r6, #0
- 8004e34: 4639 mov r1, r7
- 8004e36: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8004e3a: f884 60ff strb.w r6, [r4, #255] ; 0xff
- 8004e3e: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8004e42: 4620 mov r0, r4
- 8004e44: 4798 blx r3
- 8004e46: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8004e4a: f8c4 6100 str.w r6, [r4, #256] ; 0x100
- 8004e4e: 3301 adds r3, #1
- 8004e50: 4637 mov r7, r6
- 8004e52: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8004e56: 1c7a adds r2, r7, #1
- 8004e58: 235d movs r3, #93 ; 0x5d
- 8004e5a: f8c4 2100 str.w r2, [r4, #256] ; 0x100
- 8004e5e: 55e3 strb r3, [r4, r7]
- 8004e60: f884 3104 strb.w r3, [r4, #260] ; 0x104
- 8004e64: 686a ldr r2, [r5, #4]
- 8004e66: 9905 ldr r1, [sp, #20]
- 8004e68: f7fd bfb7 b.w 8002dda <d_print_comp+0x1e6>
- 8004e6c: 1c59 adds r1, r3, #1
- 8004e6e: 2229 movs r2, #41 ; 0x29
- 8004e70: f8c4 1100 str.w r1, [r4, #256] ; 0x100
- 8004e74: 54e2 strb r2, [r4, r3]
- 8004e76: f884 2104 strb.w r2, [r4, #260] ; 0x104
- 8004e7a: 782b ldrb r3, [r5, #0]
- 8004e7c: 2b3d cmp r3, #61 ; 0x3d
- 8004e7e: f47e aa57 bne.w 8003330 <d_print_comp+0x73c>
- 8004e82: 29ff cmp r1, #255 ; 0xff
- 8004e84: d10f bne.n 8004ea6 <d_print_comp+0x22b2>
- 8004e86: 2700 movs r7, #0
- 8004e88: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8004e8c: f884 70ff strb.w r7, [r4, #255] ; 0xff
- 8004e90: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8004e94: 4620 mov r0, r4
- 8004e96: 4798 blx r3
- 8004e98: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8004e9c: f8c4 7100 str.w r7, [r4, #256] ; 0x100
- 8004ea0: 3301 adds r3, #1
- 8004ea2: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8004ea6: f8d4 2100 ldr.w r2, [r4, #256] ; 0x100
- 8004eaa: 232d movs r3, #45 ; 0x2d
- 8004eac: 1c51 adds r1, r2, #1
- 8004eae: f8c4 1100 str.w r1, [r4, #256] ; 0x100
- 8004eb2: 54a3 strb r3, [r4, r2]
- 8004eb4: f884 3104 strb.w r3, [r4, #260] ; 0x104
- 8004eb8: f7fe ba3a b.w 8003330 <d_print_comp+0x73c>
- 8004ebc: 4f8a ldr r7, [pc, #552] ; (80050e8 <d_print_comp+0x24f4>)
- 8004ebe: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 8004ec2: f107 0a02 add.w sl, r7, #2
- 8004ec6: e016 b.n 8004ef6 <d_print_comp+0x2302>
- 8004ec8: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8004ecc: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8004ed0: f884 90ff strb.w r9, [r4, #255] ; 0xff
- 8004ed4: 4798 blx r3
- 8004ed6: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8004eda: 3301 adds r3, #1
- 8004edc: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8004ee0: 2200 movs r2, #0
- 8004ee2: 2301 movs r3, #1
- 8004ee4: 45ba cmp sl, r7
- 8004ee6: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 8004eea: f804 8002 strb.w r8, [r4, r2]
- 8004eee: f884 8104 strb.w r8, [r4, #260] ; 0x104
- 8004ef2: f43f a980 beq.w 80041f6 <d_print_comp+0x1602>
- 8004ef6: 2bff cmp r3, #255 ; 0xff
- 8004ef8: 4619 mov r1, r3
- 8004efa: 4620 mov r0, r4
- 8004efc: f817 8b01 ldrb.w r8, [r7], #1
- 8004f00: d0e2 beq.n 8004ec8 <d_print_comp+0x22d4>
- 8004f02: 461a mov r2, r3
- 8004f04: 3301 adds r3, #1
- 8004f06: e7ed b.n 8004ee4 <d_print_comp+0x22f0>
- 8004f08: 6892 ldr r2, [r2, #8]
- 8004f0a: 4631 mov r1, r6
- 8004f0c: 4620 mov r0, r4
- 8004f0e: f7fd fe71 bl 8002bf4 <d_print_comp>
- 8004f12: f8d4 3144 ldr.w r3, [r4, #324] ; 0x144
- 8004f16: b113 cbz r3, 8004f1e <d_print_comp+0x232a>
- 8004f18: 9b08 ldr r3, [sp, #32]
- 8004f1a: f8c4 3110 str.w r3, [r4, #272] ; 0x110
- 8004f1e: f894 3104 ldrb.w r3, [r4, #260] ; 0x104
- 8004f22: 2b3c cmp r3, #60 ; 0x3c
- 8004f24: f000 82c4 beq.w 80054b0 <d_print_comp+0x28bc>
- 8004f28: f8d4 7100 ldr.w r7, [r4, #256] ; 0x100
- 8004f2c: 2fff cmp r7, #255 ; 0xff
- 8004f2e: d112 bne.n 8004f56 <d_print_comp+0x2362>
- 8004f30: f04f 0800 mov.w r8, #0
- 8004f34: 4639 mov r1, r7
- 8004f36: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8004f3a: f884 80ff strb.w r8, [r4, #255] ; 0xff
- 8004f3e: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8004f42: 4620 mov r0, r4
- 8004f44: 4798 blx r3
- 8004f46: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8004f4a: f8c4 8100 str.w r8, [r4, #256] ; 0x100
- 8004f4e: 3301 adds r3, #1
- 8004f50: 4647 mov r7, r8
- 8004f52: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8004f56: 233c movs r3, #60 ; 0x3c
- 8004f58: 1c7a adds r2, r7, #1
- 8004f5a: f8c4 2100 str.w r2, [r4, #256] ; 0x100
- 8004f5e: 55e3 strb r3, [r4, r7]
- 8004f60: f884 3104 strb.w r3, [r4, #260] ; 0x104
- 8004f64: 68ab ldr r3, [r5, #8]
- 8004f66: 4631 mov r1, r6
- 8004f68: 68da ldr r2, [r3, #12]
- 8004f6a: 4620 mov r0, r4
- 8004f6c: f7fd fe42 bl 8002bf4 <d_print_comp>
- 8004f70: f894 3104 ldrb.w r3, [r4, #260] ; 0x104
- 8004f74: 2b3e cmp r3, #62 ; 0x3e
- 8004f76: f000 827d beq.w 8005474 <d_print_comp+0x2880>
- 8004f7a: f8d4 7100 ldr.w r7, [r4, #256] ; 0x100
- 8004f7e: 2fff cmp r7, #255 ; 0xff
- 8004f80: d111 bne.n 8004fa6 <d_print_comp+0x23b2>
- 8004f82: 2600 movs r6, #0
- 8004f84: 4639 mov r1, r7
- 8004f86: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8004f8a: f884 60ff strb.w r6, [r4, #255] ; 0xff
- 8004f8e: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8004f92: 4620 mov r0, r4
- 8004f94: 4798 blx r3
- 8004f96: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8004f9a: f8c4 6100 str.w r6, [r4, #256] ; 0x100
- 8004f9e: 3301 adds r3, #1
- 8004fa0: 4637 mov r7, r6
- 8004fa2: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8004fa6: 233e movs r3, #62 ; 0x3e
- 8004fa8: 1c7a adds r2, r7, #1
- 8004faa: f8c4 2100 str.w r2, [r4, #256] ; 0x100
- 8004fae: 55e3 strb r3, [r4, r7]
- 8004fb0: f884 3104 strb.w r3, [r4, #260] ; 0x104
- 8004fb4: f7ff badc b.w 8004570 <d_print_comp+0x197c>
- 8004fb8: 4f4c ldr r7, [pc, #304] ; (80050ec <d_print_comp+0x24f8>)
- 8004fba: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 8004fbe: f107 0905 add.w r9, r7, #5
- 8004fc2: f04f 0a00 mov.w sl, #0
- 8004fc6: e016 b.n 8004ff6 <d_print_comp+0x2402>
- 8004fc8: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8004fcc: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8004fd0: f884 a0ff strb.w sl, [r4, #255] ; 0xff
- 8004fd4: 4798 blx r3
- 8004fd6: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8004fda: 3301 adds r3, #1
- 8004fdc: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8004fe0: 2200 movs r2, #0
- 8004fe2: 2301 movs r3, #1
- 8004fe4: 45b9 cmp r9, r7
- 8004fe6: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 8004fea: f804 8002 strb.w r8, [r4, r2]
- 8004fee: f884 8104 strb.w r8, [r4, #260] ; 0x104
- 8004ff2: f43e ab41 beq.w 8003678 <d_print_comp+0xa84>
- 8004ff6: 2bff cmp r3, #255 ; 0xff
- 8004ff8: 4619 mov r1, r3
- 8004ffa: 4620 mov r0, r4
- 8004ffc: f817 8b01 ldrb.w r8, [r7], #1
- 8005000: d0e2 beq.n 8004fc8 <d_print_comp+0x23d4>
- 8005002: 461a mov r2, r3
- 8005004: 3301 adds r3, #1
- 8005006: e7ed b.n 8004fe4 <d_print_comp+0x23f0>
- 8005008: f8d4 7100 ldr.w r7, [r4, #256] ; 0x100
- 800500c: 2fff cmp r7, #255 ; 0xff
- 800500e: d112 bne.n 8005036 <d_print_comp+0x2442>
- 8005010: f04f 0a00 mov.w sl, #0
- 8005014: 4639 mov r1, r7
- 8005016: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 800501a: f884 a0ff strb.w sl, [r4, #255] ; 0xff
- 800501e: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8005022: 4620 mov r0, r4
- 8005024: 4798 blx r3
- 8005026: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 800502a: f8c4 a100 str.w sl, [r4, #256] ; 0x100
- 800502e: 3301 adds r3, #1
- 8005030: 4657 mov r7, sl
- 8005032: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8005036: 2320 movs r3, #32
- 8005038: 1c7a adds r2, r7, #1
- 800503a: f8c4 2100 str.w r2, [r4, #256] ; 0x100
- 800503e: 55e3 strb r3, [r4, r7]
- 8005040: f884 3104 strb.w r3, [r4, #260] ; 0x104
- 8005044: f7fe bdda b.w 8003bfc <d_print_comp+0x1008>
- 8005048: f8d4 1120 ldr.w r1, [r4, #288] ; 0x120
- 800504c: 2900 cmp r1, #0
- 800504e: f6fe ad99 blt.w 8003b84 <d_print_comp+0xf90>
- 8005052: f7fb fbc3 bl 80007dc <d_index_template_argument.part.9>
- 8005056: 4602 mov r2, r0
- 8005058: 2800 cmp r0, #0
- 800505a: f47e ad93 bne.w 8003b84 <d_print_comp+0xf90>
- 800505e: 2301 movs r3, #1
- 8005060: f8c4 3118 str.w r3, [r4, #280] ; 0x118
- 8005064: 686a ldr r2, [r5, #4]
- 8005066: 9905 ldr r1, [sp, #20]
- 8005068: f7fd beb7 b.w 8002dda <d_print_comp+0x1e6>
- 800506c: 9905 ldr r1, [sp, #20]
- 800506e: 686a ldr r2, [r5, #4]
- 8005070: f7fd beb3 b.w 8002dda <d_print_comp+0x1e6>
- 8005074: 220d movs r2, #13
- 8005076: 491e ldr r1, [pc, #120] ; (80050f0 <d_print_comp+0x24fc>)
- 8005078: 4620 mov r0, r4
- 800507a: f7fb f997 bl 80003ac <d_append_buffer>
- 800507e: 68f9 ldr r1, [r7, #12]
- 8005080: 4620 mov r0, r4
- 8005082: 3101 adds r1, #1
- 8005084: f7fb fc84 bl 8000990 <d_append_num>
- 8005088: 2203 movs r2, #3
- 800508a: 491a ldr r1, [pc, #104] ; (80050f4 <d_print_comp+0x2500>)
- 800508c: 4620 mov r0, r4
- 800508e: f7fb f98d bl 80003ac <d_append_buffer>
- 8005092: 68bf ldr r7, [r7, #8]
- 8005094: f7ff b8b4 b.w 8004200 <d_print_comp+0x160c>
- 8005098: f8d4 0100 ldr.w r0, [r4, #256] ; 0x100
- 800509c: 9905 ldr r1, [sp, #20]
- 800509e: 686a ldr r2, [r5, #4]
- 80050a0: 42b8 cmp r0, r7
- 80050a2: f47d ae9a bne.w 8002dda <d_print_comp+0x1e6>
- 80050a6: 3b01 subs r3, #1
- 80050a8: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 80050ac: f7fd be95 b.w 8002dda <d_print_comp+0x1e6>
- 80050b0: 4642 mov r2, r8
- 80050b2: 465b mov r3, fp
- 80050b4: 46ab mov fp, r5
- 80050b6: f1bb 0f04 cmp.w fp, #4
- 80050ba: 46a0 mov r8, r4
- 80050bc: 461d mov r5, r3
- 80050be: 4614 mov r4, r2
- 80050c0: f8c2 1114 str.w r1, [r2, #276] ; 0x114
- 80050c4: f000 82a3 beq.w 800560e <d_print_comp+0x2a1a>
- 80050c8: f1bb 0f02 cmp.w fp, #2
- 80050cc: d137 bne.n 800513e <d_print_comp+0x254a>
- 80050ce: f8d8 a00c ldr.w sl, [r8, #12]
- 80050d2: f89a 3000 ldrb.w r3, [sl]
- 80050d6: 2b46 cmp r3, #70 ; 0x46
- 80050d8: f000 8327 beq.w 800572a <d_print_comp+0x2b36>
- 80050dc: eb09 1207 add.w r2, r9, r7, lsl #4
- 80050e0: 3a0c subs r2, #12
- 80050e2: e020 b.n 8005126 <d_print_comp+0x2532>
- 80050e4: 080127a0 .word 0x080127a0
- 80050e8: 080125c4 .word 0x080125c4
- 80050ec: 08012738 .word 0x08012738
- 80050f0: 080125c8 .word 0x080125c8
- 80050f4: 080125d8 .word 0x080125d8
- 80050f8: 2f04 cmp r7, #4
- 80050fa: f43f a81d beq.w 8004138 <d_print_comp+0x1544>
- 80050fe: e89b 000f ldmia.w fp, {r0, r1, r2, r3}
- 8005102: e88c 000f stmia.w ip, {r0, r1, r2, r3}
- 8005106: 2300 movs r3, #0
- 8005108: f84e 3c0c str.w r3, [lr, #-12]
- 800510c: f84e ac10 str.w sl, [lr, #-16]
- 8005110: 9b01 ldr r3, [sp, #4]
- 8005112: f8da a008 ldr.w sl, [sl, #8]
- 8005116: f8c4 c114 str.w ip, [r4, #276] ; 0x114
- 800511a: 3701 adds r7, #1
- 800511c: f84e bc04 str.w fp, [lr, #-4]
- 8005120: f84e 3c08 str.w r3, [lr, #-8]
- 8005124: 4672 mov r2, lr
- 8005126: f89a 0000 ldrb.w r0, [sl]
- 800512a: f7fb f975 bl 8000418 <is_fnqual_component_type>
- 800512e: f1a2 0b04 sub.w fp, r2, #4
- 8005132: f102 0e10 add.w lr, r2, #16
- 8005136: f102 0c0c add.w ip, r2, #12
- 800513a: 2800 cmp r0, #0
- 800513c: d1dc bne.n 80050f8 <d_print_comp+0x2504>
- 800513e: 68ea ldr r2, [r5, #12]
- 8005140: 4631 mov r1, r6
- 8005142: 4620 mov r0, r4
- 8005144: f7fd fd56 bl 8002bf4 <d_print_comp>
- 8005148: f898 3000 ldrb.w r3, [r8]
- 800514c: 2b04 cmp r3, #4
- 800514e: bf04 itt eq
- 8005150: 9b06 ldreq r3, [sp, #24]
- 8005152: f8c4 3110 streq.w r3, [r4, #272] ; 0x110
- 8005156: 013f lsls r7, r7, #4
- 8005158: f04f 0a20 mov.w sl, #32
- 800515c: 46a8 mov r8, r5
- 800515e: eb09 0b07 add.w fp, r9, r7
- 8005162: f85b 5c08 ldr.w r5, [fp, #-8]
- 8005166: bb0d cbnz r5, 80051ac <d_print_comp+0x25b8>
- 8005168: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 800516c: 2bff cmp r3, #255 ; 0xff
- 800516e: 4620 mov r0, r4
- 8005170: 4619 mov r1, r3
- 8005172: d10e bne.n 8005192 <d_print_comp+0x259e>
- 8005174: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8005178: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 800517c: f884 50ff strb.w r5, [r4, #255] ; 0xff
- 8005180: 4798 blx r3
- 8005182: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8005186: f8c4 5100 str.w r5, [r4, #256] ; 0x100
- 800518a: 1c5a adds r2, r3, #1
- 800518c: f8c4 2124 str.w r2, [r4, #292] ; 0x124
- 8005190: 462b mov r3, r5
- 8005192: 1c59 adds r1, r3, #1
- 8005194: f8c4 1100 str.w r1, [r4, #256] ; 0x100
- 8005198: f85b 2c0c ldr.w r2, [fp, #-12]
- 800519c: f804 a003 strb.w sl, [r4, r3]
- 80051a0: 4631 mov r1, r6
- 80051a2: 4620 mov r0, r4
- 80051a4: f884 a104 strb.w sl, [r4, #260] ; 0x104
- 80051a8: f000 fbba bl 8005920 <d_print_mod>
- 80051ac: 3f10 subs r7, #16
- 80051ae: d1d6 bne.n 800515e <d_print_comp+0x256a>
- 80051b0: 9b02 ldr r3, [sp, #8]
- 80051b2: f8c4 3114 str.w r3, [r4, #276] ; 0x114
- 80051b6: 4645 mov r5, r8
- 80051b8: f7fe bfc1 b.w 800413e <d_print_comp+0x154a>
- 80051bc: 4631 mov r1, r6
- 80051be: 68aa ldr r2, [r5, #8]
- 80051c0: 4620 mov r0, r4
- 80051c2: f7fd fd17 bl 8002bf4 <d_print_comp>
- 80051c6: 9905 ldr r1, [sp, #20]
- 80051c8: 686a ldr r2, [r5, #4]
- 80051ca: f7fd be06 b.w 8002dda <d_print_comp+0x1e6>
- 80051ce: 460f mov r7, r1
- 80051d0: 46a9 mov r9, r5
- 80051d2: f7fe bebb b.w 8003f4c <d_print_comp+0x1358>
- 80051d6: 4644 mov r4, r8
- 80051d8: 465d mov r5, fp
- 80051da: f8c8 1114 str.w r1, [r8, #276] ; 0x114
- 80051de: f7fe bfab b.w 8004138 <d_print_comp+0x1544>
- 80051e2: 68ea ldr r2, [r5, #12]
- 80051e4: 4631 mov r1, r6
- 80051e6: 4620 mov r0, r4
- 80051e8: f7fd fd04 bl 8002bf4 <d_print_comp>
- 80051ec: 9b0a ldr r3, [sp, #40] ; 0x28
- 80051ee: 9a01 ldr r2, [sp, #4]
- 80051f0: f8c4 2114 str.w r2, [r4, #276] ; 0x114
- 80051f4: 2b00 cmp r3, #0
- 80051f6: f43e ab19 beq.w 800382c <d_print_comp+0xc38>
- 80051fa: f7fe bb1f b.w 800383c <d_print_comp+0xc48>
- 80051fe: 2301 movs r3, #1
- 8005200: 4664 mov r4, ip
- 8005202: f8cc 3118 str.w r3, [ip, #280] ; 0x118
- 8005206: f7fe bb19 b.w 800383c <d_print_comp+0xc48>
- 800520a: f8d9 2008 ldr.w r2, [r9, #8]
- 800520e: f7fe bead b.w 8003f6c <d_print_comp+0x1378>
- 8005212: 4631 mov r1, r6
- 8005214: 68aa ldr r2, [r5, #8]
- 8005216: 4620 mov r0, r4
- 8005218: f001 f9f4 bl 8006604 <d_print_subexpr>
- 800521c: 2203 movs r2, #3
- 800521e: 49bf ldr r1, [pc, #764] ; (800551c <d_print_comp+0x2928>)
- 8005220: 4620 mov r0, r4
- 8005222: f7fb f8c3 bl 80003ac <d_append_buffer>
- 8005226: 9905 ldr r1, [sp, #20]
- 8005228: 686a ldr r2, [r5, #4]
- 800522a: f7fd bdd6 b.w 8002dda <d_print_comp+0x1e6>
- 800522e: f8d4 e130 ldr.w lr, [r4, #304] ; 0x130
- 8005232: f8d4 212c ldr.w r2, [r4, #300] ; 0x12c
- 8005236: f1be 0f00 cmp.w lr, #0
- 800523a: dd17 ble.n 800526c <d_print_comp+0x2678>
- 800523c: 6810 ldr r0, [r2, #0]
- 800523e: 4581 cmp r9, r0
- 8005240: f000 81a7 beq.w 8005592 <d_print_comp+0x299e>
- 8005244: f102 0b08 add.w fp, r2, #8
- 8005248: 46bc mov ip, r7
- 800524a: 9101 str r1, [sp, #4]
- 800524c: 4670 mov r0, lr
- 800524e: e004 b.n 800525a <d_print_comp+0x2666>
- 8005250: f852 103c ldr.w r1, [r2, ip, lsl #3]
- 8005254: 4589 cmp r9, r1
- 8005256: f000 819d beq.w 8005594 <d_print_comp+0x29a0>
- 800525a: f10c 0c01 add.w ip, ip, #1
- 800525e: 4560 cmp r0, ip
- 8005260: 46da mov sl, fp
- 8005262: f10b 0b08 add.w fp, fp, #8
- 8005266: d1f3 bne.n 8005250 <d_print_comp+0x265c>
- 8005268: 9901 ldr r1, [sp, #4]
- 800526a: 4686 mov lr, r0
- 800526c: f8d4 3134 ldr.w r3, [r4, #308] ; 0x134
- 8005270: 459e cmp lr, r3
- 8005272: f280 8344 bge.w 80058fe <d_print_comp+0x2d0a>
- 8005276: f10e 0301 add.w r3, lr, #1
- 800527a: eb02 0cce add.w ip, r2, lr, lsl #3
- 800527e: f8c4 3130 str.w r3, [r4, #304] ; 0x130
- 8005282: f8d4 0110 ldr.w r0, [r4, #272] ; 0x110
- 8005286: f842 903e str.w r9, [r2, lr, lsl #3]
- 800528a: f10c 0c04 add.w ip, ip, #4
- 800528e: 2800 cmp r0, #0
- 8005290: f000 825b beq.w 800574a <d_print_comp+0x2b56>
- 8005294: f8d4 213c ldr.w r2, [r4, #316] ; 0x13c
- 8005298: f8d4 3140 ldr.w r3, [r4, #320] ; 0x140
- 800529c: 429a cmp r2, r3
- 800529e: f102 0e01 add.w lr, r2, #1
- 80052a2: f280 832c bge.w 80058fe <d_print_comp+0x2d0a>
- 80052a6: f8d4 3138 ldr.w r3, [r4, #312] ; 0x138
- 80052aa: f8c4 e13c str.w lr, [r4, #316] ; 0x13c
- 80052ae: eb03 03c2 add.w r3, r3, r2, lsl #3
- 80052b2: 6842 ldr r2, [r0, #4]
- 80052b4: 605a str r2, [r3, #4]
- 80052b6: f8cc 3000 str.w r3, [ip]
- 80052ba: 6800 ldr r0, [r0, #0]
- 80052bc: 469c mov ip, r3
- 80052be: e7e6 b.n 800528e <d_print_comp+0x269a>
- 80052c0: 4606 mov r6, r0
- 80052c2: 4647 mov r7, r8
- 80052c4: e001 b.n 80052ca <d_print_comp+0x26d6>
- 80052c6: 68ff ldr r7, [r7, #12]
- 80052c8: b31f cbz r7, 8005312 <d_print_comp+0x271e>
- 80052ca: 783b ldrb r3, [r7, #0]
- 80052cc: 2b2f cmp r3, #47 ; 0x2f
- 80052ce: d120 bne.n 8005312 <d_print_comp+0x271e>
- 80052d0: 68bb ldr r3, [r7, #8]
- 80052d2: b1f3 cbz r3, 8005312 <d_print_comp+0x271e>
- 80052d4: 781a ldrb r2, [r3, #0]
- 80052d6: 2a4a cmp r2, #74 ; 0x4a
- 80052d8: bf18 it ne
- 80052da: 3601 addne r6, #1
- 80052dc: d1f3 bne.n 80052c6 <d_print_comp+0x26d2>
- 80052de: 6899 ldr r1, [r3, #8]
- 80052e0: 4620 mov r0, r4
- 80052e2: f7fb faa1 bl 8000828 <d_find_pack>
- 80052e6: 2800 cmp r0, #0
- 80052e8: f000 81ef beq.w 80056ca <d_print_comp+0x2ad6>
- 80052ec: 7803 ldrb r3, [r0, #0]
- 80052ee: 2b2f cmp r3, #47 ; 0x2f
- 80052f0: f040 81eb bne.w 80056ca <d_print_comp+0x2ad6>
- 80052f4: 6883 ldr r3, [r0, #8]
- 80052f6: b153 cbz r3, 800530e <d_print_comp+0x271a>
- 80052f8: 2300 movs r3, #0
- 80052fa: e004 b.n 8005306 <d_print_comp+0x2712>
- 80052fc: 7802 ldrb r2, [r0, #0]
- 80052fe: 2a2f cmp r2, #47 ; 0x2f
- 8005300: d105 bne.n 800530e <d_print_comp+0x271a>
- 8005302: 6882 ldr r2, [r0, #8]
- 8005304: b11a cbz r2, 800530e <d_print_comp+0x271a>
- 8005306: 68c0 ldr r0, [r0, #12]
- 8005308: 3301 adds r3, #1
- 800530a: 2800 cmp r0, #0
- 800530c: d1f6 bne.n 80052fc <d_print_comp+0x2708>
- 800530e: 441e add r6, r3
- 8005310: e7d9 b.n 80052c6 <d_print_comp+0x26d2>
- 8005312: 4631 mov r1, r6
- 8005314: 4620 mov r0, r4
- 8005316: f7fb fb3b bl 8000990 <d_append_num>
- 800531a: 9905 ldr r1, [sp, #20]
- 800531c: 686a ldr r2, [r5, #4]
- 800531e: f7fd bd5c b.w 8002dda <d_print_comp+0x1e6>
- 8005322: 4631 mov r1, r6
- 8005324: 4620 mov r0, r4
- 8005326: f001 f92d bl 8006584 <d_print_expr_op>
- 800532a: f8d4 7100 ldr.w r7, [r4, #256] ; 0x100
- 800532e: 2fff cmp r7, #255 ; 0xff
- 8005330: d112 bne.n 8005358 <d_print_comp+0x2764>
- 8005332: f04f 0800 mov.w r8, #0
- 8005336: 4639 mov r1, r7
- 8005338: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 800533c: f884 80ff strb.w r8, [r4, #255] ; 0xff
- 8005340: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8005344: 4620 mov r0, r4
- 8005346: 4798 blx r3
- 8005348: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 800534c: f8c4 8100 str.w r8, [r4, #256] ; 0x100
- 8005350: 3301 adds r3, #1
- 8005352: 4647 mov r7, r8
- 8005354: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8005358: 1c7a adds r2, r7, #1
- 800535a: 233c movs r3, #60 ; 0x3c
- 800535c: f8c4 2100 str.w r2, [r4, #256] ; 0x100
- 8005360: 55e3 strb r3, [r4, r7]
- 8005362: f884 3104 strb.w r3, [r4, #260] ; 0x104
- 8005366: 68eb ldr r3, [r5, #12]
- 8005368: 4631 mov r1, r6
- 800536a: 689a ldr r2, [r3, #8]
- 800536c: 4620 mov r0, r4
- 800536e: f7fd fc41 bl 8002bf4 <d_print_comp>
- 8005372: 2202 movs r2, #2
- 8005374: 496a ldr r1, [pc, #424] ; (8005520 <d_print_comp+0x292c>)
- 8005376: 4620 mov r0, r4
- 8005378: f7fb f818 bl 80003ac <d_append_buffer>
- 800537c: 68eb ldr r3, [r5, #12]
- 800537e: 4631 mov r1, r6
- 8005380: 68da ldr r2, [r3, #12]
- 8005382: 4620 mov r0, r4
- 8005384: f7fd fc36 bl 8002bf4 <d_print_comp>
- 8005388: f8d4 7100 ldr.w r7, [r4, #256] ; 0x100
- 800538c: 2fff cmp r7, #255 ; 0xff
- 800538e: d111 bne.n 80053b4 <d_print_comp+0x27c0>
- 8005390: 2600 movs r6, #0
- 8005392: 4639 mov r1, r7
- 8005394: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8005398: f884 60ff strb.w r6, [r4, #255] ; 0xff
- 800539c: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 80053a0: 4620 mov r0, r4
- 80053a2: 4798 blx r3
- 80053a4: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 80053a8: f8c4 6100 str.w r6, [r4, #256] ; 0x100
- 80053ac: 3301 adds r3, #1
- 80053ae: 4637 mov r7, r6
- 80053b0: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 80053b4: 1c7a adds r2, r7, #1
- 80053b6: 2329 movs r3, #41 ; 0x29
- 80053b8: f8c4 2100 str.w r2, [r4, #256] ; 0x100
- 80053bc: 55e3 strb r3, [r4, r7]
- 80053be: f884 3104 strb.w r3, [r4, #260] ; 0x104
- 80053c2: 686a ldr r2, [r5, #4]
- 80053c4: 9905 ldr r1, [sp, #20]
- 80053c6: f7fd bd08 b.w 8002dda <d_print_comp+0x1e6>
- 80053ca: 9905 ldr r1, [sp, #20]
- 80053cc: 686a ldr r2, [r5, #4]
- 80053ce: f7fd bd04 b.w 8002dda <d_print_comp+0x1e6>
- 80053d2: 4642 mov r2, r8
- 80053d4: 4631 mov r1, r6
- 80053d6: 4620 mov r0, r4
- 80053d8: f7fd fc0c bl 8002bf4 <d_print_comp>
- 80053dc: 9905 ldr r1, [sp, #20]
- 80053de: 686a ldr r2, [r5, #4]
- 80053e0: f7fd bcfb b.w 8002dda <d_print_comp+0x1e6>
- 80053e4: a918 add r1, sp, #96 ; 0x60
- 80053e6: 4620 mov r0, r4
- 80053e8: f841 3d40 str.w r3, [r1, #-64]!
- 80053ec: f8d4 3110 ldr.w r3, [r4, #272] ; 0x110
- 80053f0: f8c4 1114 str.w r1, [r4, #276] ; 0x114
- 80053f4: 4641 mov r1, r8
- 80053f6: 960a str r6, [sp, #40] ; 0x28
- 80053f8: 930b str r3, [sp, #44] ; 0x2c
- 80053fa: 9509 str r5, [sp, #36] ; 0x24
- 80053fc: f7fd fbfa bl 8002bf4 <d_print_comp>
- 8005400: 9e0a ldr r6, [sp, #40] ; 0x28
- 8005402: 9b08 ldr r3, [sp, #32]
- 8005404: f8c4 3114 str.w r3, [r4, #276] ; 0x114
- 8005408: b9ee cbnz r6, 8005446 <d_print_comp+0x2852>
- 800540a: f8d4 7100 ldr.w r7, [r4, #256] ; 0x100
- 800540e: 2fff cmp r7, #255 ; 0xff
- 8005410: d110 bne.n 8005434 <d_print_comp+0x2840>
- 8005412: 4639 mov r1, r7
- 8005414: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8005418: f884 60ff strb.w r6, [r4, #255] ; 0xff
- 800541c: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8005420: 4620 mov r0, r4
- 8005422: 4798 blx r3
- 8005424: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8005428: f8c4 6100 str.w r6, [r4, #256] ; 0x100
- 800542c: 3301 adds r3, #1
- 800542e: 4637 mov r7, r6
- 8005430: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8005434: 2320 movs r3, #32
- 8005436: 1c7a adds r2, r7, #1
- 8005438: f8c4 2100 str.w r2, [r4, #256] ; 0x100
- 800543c: 55e3 strb r3, [r4, r7]
- 800543e: f884 3104 strb.w r3, [r4, #260] ; 0x104
- 8005442: f7fe ba0c b.w 800385e <d_print_comp+0xc6a>
- 8005446: 9905 ldr r1, [sp, #20]
- 8005448: 686a ldr r2, [r5, #4]
- 800544a: f7fd bcc6 b.w 8002dda <d_print_comp+0x1e6>
- 800544e: 4935 ldr r1, [pc, #212] ; (8005524 <d_print_comp+0x2930>)
- 8005450: 68b8 ldr r0, [r7, #8]
- 8005452: f009 fa23 bl 800e89c <strncmp>
- 8005456: 2800 cmp r0, #0
- 8005458: f47e abc6 bne.w 8003be8 <d_print_comp+0xff4>
- 800545c: 4631 mov r1, r6
- 800545e: 68ea ldr r2, [r5, #12]
- 8005460: 4620 mov r0, r4
- 8005462: f7fd fbc7 bl 8002bf4 <d_print_comp>
- 8005466: 2202 movs r2, #2
- 8005468: 492f ldr r1, [pc, #188] ; (8005528 <d_print_comp+0x2934>)
- 800546a: 4620 mov r0, r4
- 800546c: f7fa ff9e bl 80003ac <d_append_buffer>
- 8005470: f7fe bc09 b.w 8003c86 <d_print_comp+0x1092>
- 8005474: f8d4 7100 ldr.w r7, [r4, #256] ; 0x100
- 8005478: 2fff cmp r7, #255 ; 0xff
- 800547a: d111 bne.n 80054a0 <d_print_comp+0x28ac>
- 800547c: 2600 movs r6, #0
- 800547e: 4639 mov r1, r7
- 8005480: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8005484: f884 60ff strb.w r6, [r4, #255] ; 0xff
- 8005488: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 800548c: 4620 mov r0, r4
- 800548e: 4798 blx r3
- 8005490: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8005494: f8c4 6100 str.w r6, [r4, #256] ; 0x100
- 8005498: 3301 adds r3, #1
- 800549a: 4637 mov r7, r6
- 800549c: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 80054a0: 2320 movs r3, #32
- 80054a2: 1c7a adds r2, r7, #1
- 80054a4: f8c4 2100 str.w r2, [r4, #256] ; 0x100
- 80054a8: 55e3 strb r3, [r4, r7]
- 80054aa: f884 3104 strb.w r3, [r4, #260] ; 0x104
- 80054ae: e564 b.n 8004f7a <d_print_comp+0x2386>
- 80054b0: f8d4 7100 ldr.w r7, [r4, #256] ; 0x100
- 80054b4: 2fff cmp r7, #255 ; 0xff
- 80054b6: d112 bne.n 80054de <d_print_comp+0x28ea>
- 80054b8: f04f 0800 mov.w r8, #0
- 80054bc: 4639 mov r1, r7
- 80054be: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 80054c2: f884 80ff strb.w r8, [r4, #255] ; 0xff
- 80054c6: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 80054ca: 4620 mov r0, r4
- 80054cc: 4798 blx r3
- 80054ce: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 80054d2: f8c4 8100 str.w r8, [r4, #256] ; 0x100
- 80054d6: 3301 adds r3, #1
- 80054d8: 4647 mov r7, r8
- 80054da: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 80054de: 2320 movs r3, #32
- 80054e0: 1c7a adds r2, r7, #1
- 80054e2: f8c4 2100 str.w r2, [r4, #256] ; 0x100
- 80054e6: 55e3 strb r3, [r4, r7]
- 80054e8: f884 3104 strb.w r3, [r4, #260] ; 0x104
- 80054ec: e51c b.n 8004f28 <d_print_comp+0x2334>
- 80054ee: 4640 mov r0, r8
- 80054f0: 490e ldr r1, [pc, #56] ; (800552c <d_print_comp+0x2938>)
- 80054f2: f001 fc65 bl 8006dc0 <strcmp>
- 80054f6: 2800 cmp r0, #0
- 80054f8: f040 81fb bne.w 80058f2 <d_print_comp+0x2cfe>
- 80054fc: 68eb ldr r3, [r5, #12]
- 80054fe: 4631 mov r1, r6
- 8005500: 68da ldr r2, [r3, #12]
- 8005502: 4620 mov r0, r4
- 8005504: f001 f87e bl 8006604 <d_print_subexpr>
- 8005508: f7fd bc60 b.w 8002dcc <d_print_comp+0x1d8>
- 800550c: 9905 ldr r1, [sp, #20]
- 800550e: 686a ldr r2, [r5, #4]
- 8005510: f7fd bc63 b.w 8002dda <d_print_comp+0x1e6>
- 8005514: 9905 ldr r1, [sp, #20]
- 8005516: 686a ldr r2, [r5, #4]
- 8005518: f7fd bc5f b.w 8002dda <d_print_comp+0x1e6>
- 800551c: 080127c4 .word 0x080127c4
- 8005520: 08012778 .word 0x08012778
- 8005524: 080125dc .word 0x080125dc
- 8005528: 080125e4 .word 0x080125e4
- 800552c: 0801257c .word 0x0801257c
- 8005530: 689b ldr r3, [r3, #8]
- 8005532: 689a ldr r2, [r3, #8]
- 8005534: 2a01 cmp r2, #1
- 8005536: f47d ac4e bne.w 8002dd6 <d_print_comp+0x1e2>
- 800553a: 685b ldr r3, [r3, #4]
- 800553c: 781b ldrb r3, [r3, #0]
- 800553e: 2b3e cmp r3, #62 ; 0x3e
- 8005540: f47d ac49 bne.w 8002dd6 <d_print_comp+0x1e2>
- 8005544: f8d4 7100 ldr.w r7, [r4, #256] ; 0x100
- 8005548: 2fff cmp r7, #255 ; 0xff
- 800554a: d111 bne.n 8005570 <d_print_comp+0x297c>
- 800554c: 2600 movs r6, #0
- 800554e: 4639 mov r1, r7
- 8005550: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8005554: f884 60ff strb.w r6, [r4, #255] ; 0xff
- 8005558: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 800555c: 4620 mov r0, r4
- 800555e: 4798 blx r3
- 8005560: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8005564: f8c4 6100 str.w r6, [r4, #256] ; 0x100
- 8005568: 3301 adds r3, #1
- 800556a: 4637 mov r7, r6
- 800556c: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8005570: 1c7a adds r2, r7, #1
- 8005572: 2329 movs r3, #41 ; 0x29
- 8005574: f8c4 2100 str.w r2, [r4, #256] ; 0x100
- 8005578: 55e3 strb r3, [r4, r7]
- 800557a: f884 3104 strb.w r3, [r4, #260] ; 0x104
- 800557e: 686a ldr r2, [r5, #4]
- 8005580: 9905 ldr r1, [sp, #20]
- 8005582: f7fd bc2a b.w 8002dda <d_print_comp+0x1e6>
- 8005586: 2a05 cmp r2, #5
- 8005588: f200 80a9 bhi.w 80056de <d_print_comp+0x2aea>
- 800558c: 3b57 subs r3, #87 ; 0x57
- 800558e: f7ff ba1d b.w 80049cc <d_print_comp+0x1dd8>
- 8005592: 4692 mov sl, r2
- 8005594: 461a mov r2, r3
- 8005596: e001 b.n 800559c <d_print_comp+0x29a8>
- 8005598: 6852 ldr r2, [r2, #4]
- 800559a: b342 cbz r2, 80055ee <d_print_comp+0x29fa>
- 800559c: 6811 ldr r1, [r2, #0]
- 800559e: 4589 cmp r9, r1
- 80055a0: d003 beq.n 80055aa <d_print_comp+0x29b6>
- 80055a2: 428d cmp r5, r1
- 80055a4: d1f8 bne.n 8005598 <d_print_comp+0x29a4>
- 80055a6: 429a cmp r2, r3
- 80055a8: d0f6 beq.n 8005598 <d_print_comp+0x29a4>
- 80055aa: f109 0108 add.w r1, r9, #8
- 80055ae: 4620 mov r0, r4
- 80055b0: f7fb f92a bl 8000808 <d_lookup_template_argument.isra.10>
- 80055b4: 4681 mov r9, r0
- 80055b6: b198 cbz r0, 80055e0 <d_print_comp+0x29ec>
- 80055b8: f899 3000 ldrb.w r3, [r9]
- 80055bc: 2b2f cmp r3, #47 ; 0x2f
- 80055be: f47e acb6 bne.w 8003f2e <d_print_comp+0x133a>
- 80055c2: f8d4 1120 ldr.w r1, [r4, #288] ; 0x120
- 80055c6: 2900 cmp r1, #0
- 80055c8: f6fe acb6 blt.w 8003f38 <d_print_comp+0x1344>
- 80055cc: 4648 mov r0, r9
- 80055ce: f7fb f905 bl 80007dc <d_index_template_argument.part.9>
- 80055d2: 4681 mov r9, r0
- 80055d4: 2800 cmp r0, #0
- 80055d6: f47e acaa bne.w 8003f2e <d_print_comp+0x133a>
- 80055da: b10f cbz r7, 80055e0 <d_print_comp+0x29ec>
- 80055dc: f8c4 8110 str.w r8, [r4, #272] ; 0x110
- 80055e0: 2301 movs r3, #1
- 80055e2: f8c4 3118 str.w r3, [r4, #280] ; 0x118
- 80055e6: 686a ldr r2, [r5, #4]
- 80055e8: 9905 ldr r1, [sp, #20]
- 80055ea: f7fd bbf6 b.w 8002dda <d_print_comp+0x1e6>
- 80055ee: f8da 3004 ldr.w r3, [sl, #4]
- 80055f2: f8d4 8110 ldr.w r8, [r4, #272] ; 0x110
- 80055f6: f8c4 3110 str.w r3, [r4, #272] ; 0x110
- 80055fa: f109 0108 add.w r1, r9, #8
- 80055fe: 4620 mov r0, r4
- 8005600: f7fb f902 bl 8000808 <d_lookup_template_argument.isra.10>
- 8005604: 2701 movs r7, #1
- 8005606: 4681 mov r9, r0
- 8005608: 2800 cmp r0, #0
- 800560a: d1d5 bne.n 80055b8 <d_print_comp+0x29c4>
- 800560c: e7e6 b.n 80055dc <d_print_comp+0x29e8>
- 800560e: ab18 add r3, sp, #96 ; 0x60
- 8005610: 9a01 ldr r2, [sp, #4]
- 8005612: f843 2d48 str.w r2, [r3, #-72]!
- 8005616: f8cd 801c str.w r8, [sp, #28]
- 800561a: f8c4 3110 str.w r3, [r4, #272] ; 0x110
- 800561e: e58e b.n 800513e <d_print_comp+0x254a>
- 8005620: 68eb ldr r3, [r5, #12]
- 8005622: f893 9000 ldrb.w r9, [r3]
- 8005626: f1b9 0f00 cmp.w r9, #0
- 800562a: f47d ae3f bne.w 80032ac <d_print_comp+0x6b8>
- 800562e: 283d cmp r0, #61 ; 0x3d
- 8005630: f000 80e6 beq.w 8005800 <d_print_comp+0x2c0c>
- 8005634: 4631 mov r1, r6
- 8005636: 68ea ldr r2, [r5, #12]
- 8005638: 4620 mov r0, r4
- 800563a: f1a8 0802 sub.w r8, r8, #2
- 800563e: f7fd fad9 bl 8002bf4 <d_print_comp>
- 8005642: f1b8 0f04 cmp.w r8, #4
- 8005646: f200 80d7 bhi.w 80057f8 <d_print_comp+0x2c04>
- 800564a: e8df f008 tbb [pc, r8]
- 800564e: 93b4 .short 0x93b4
- 8005650: 818a .short 0x818a
- 8005652: 35 .byte 0x35
- 8005653: 00 .byte 0x00
- 8005654: f8d8 2008 ldr.w r2, [r8, #8]
- 8005658: 4631 mov r1, r6
- 800565a: 4620 mov r0, r4
- 800565c: f000 ffd2 bl 8006604 <d_print_subexpr>
- 8005660: 464a mov r2, r9
- 8005662: 4631 mov r1, r6
- 8005664: 4620 mov r0, r4
- 8005666: f000 ff8d bl 8006584 <d_print_expr_op>
- 800566a: 9905 ldr r1, [sp, #20]
- 800566c: 686a ldr r2, [r5, #4]
- 800566e: f7fd bbb4 b.w 8002dda <d_print_comp+0x1e6>
- 8005672: 4641 mov r1, r8
- 8005674: 4620 mov r0, r4
- 8005676: f7fb f8d7 bl 8000828 <d_find_pack>
- 800567a: b1a8 cbz r0, 80056a8 <d_print_comp+0x2ab4>
- 800567c: 7803 ldrb r3, [r0, #0]
- 800567e: 2b2f cmp r3, #47 ; 0x2f
- 8005680: d112 bne.n 80056a8 <d_print_comp+0x2ab4>
- 8005682: 6883 ldr r3, [r0, #8]
- 8005684: b183 cbz r3, 80056a8 <d_print_comp+0x2ab4>
- 8005686: 68c0 ldr r0, [r0, #12]
- 8005688: 3701 adds r7, #1
- 800568a: e7f6 b.n 800567a <d_print_comp+0x2a86>
- 800568c: f8d8 3008 ldr.w r3, [r8, #8]
- 8005690: 781a ldrb r2, [r3, #0]
- 8005692: 2a01 cmp r2, #1
- 8005694: f47f aad2 bne.w 8004c3c <d_print_comp+0x2048>
- 8005698: f8d8 200c ldr.w r2, [r8, #12]
- 800569c: 7812 ldrb r2, [r2, #0]
- 800569e: 2a29 cmp r2, #41 ; 0x29
- 80056a0: bf08 it eq
- 80056a2: 4698 moveq r8, r3
- 80056a4: f7ff baca b.w 8004c3c <d_print_comp+0x2048>
- 80056a8: 4639 mov r1, r7
- 80056aa: 4620 mov r0, r4
- 80056ac: f7fb f970 bl 8000990 <d_append_num>
- 80056b0: 9905 ldr r1, [sp, #20]
- 80056b2: 686a ldr r2, [r5, #4]
- 80056b4: f7fd bb91 b.w 8002dda <d_print_comp+0x1e6>
- 80056b8: 2203 movs r2, #3
- 80056ba: 4994 ldr r1, [pc, #592] ; (800590c <d_print_comp+0x2d18>)
- 80056bc: 4620 mov r0, r4
- 80056be: f7fa fe75 bl 80003ac <d_append_buffer>
- 80056c2: 9905 ldr r1, [sp, #20]
- 80056c4: 686a ldr r2, [r5, #4]
- 80056c6: f7fd bb88 b.w 8002dda <d_print_comp+0x1e6>
- 80056ca: 2300 movs r3, #0
- 80056cc: 441e add r6, r3
- 80056ce: e5fa b.n 80052c6 <d_print_comp+0x26d2>
- 80056d0: 464a mov r2, r9
- 80056d2: 4631 mov r1, r6
- 80056d4: 4620 mov r0, r4
- 80056d6: f000 ff55 bl 8006584 <d_print_expr_op>
- 80056da: f7fd bea9 b.w 8003430 <d_print_comp+0x83c>
- 80056de: 2b5f cmp r3, #95 ; 0x5f
- 80056e0: f8d4 1100 ldr.w r1, [r4, #256] ; 0x100
- 80056e4: f47f a964 bne.w 80049b0 <d_print_comp+0x1dbc>
- 80056e8: 28ff cmp r0, #255 ; 0xff
- 80056ea: f63f a961 bhi.w 80049b0 <d_print_comp+0x1dbc>
- 80056ee: 29ff cmp r1, #255 ; 0xff
- 80056f0: fa5f f980 uxtb.w r9, r0
- 80056f4: d10f bne.n 8005716 <d_print_comp+0x2b22>
- 80056f6: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 80056fa: f884 80ff strb.w r8, [r4, #255] ; 0xff
- 80056fe: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8005702: 4620 mov r0, r4
- 8005704: 4798 blx r3
- 8005706: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 800570a: f8c4 8100 str.w r8, [r4, #256] ; 0x100
- 800570e: 3301 adds r3, #1
- 8005710: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8005714: 2100 movs r1, #0
- 8005716: 1c4b adds r3, r1, #1
- 8005718: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 800571c: 4657 mov r7, sl
- 800571e: f804 9001 strb.w r9, [r4, r1]
- 8005722: f884 9104 strb.w r9, [r4, #260] ; 0x104
- 8005726: f7ff b935 b.w 8004994 <d_print_comp+0x1da0>
- 800572a: f8da a008 ldr.w sl, [sl, #8]
- 800572e: f1ba 0f00 cmp.w sl, #0
- 8005732: f43e ad01 beq.w 8004138 <d_print_comp+0x1544>
- 8005736: e4d1 b.n 80050dc <d_print_comp+0x24e8>
- 8005738: 2205 movs r2, #5
- 800573a: 4975 ldr r1, [pc, #468] ; (8005910 <d_print_comp+0x2d1c>)
- 800573c: 4620 mov r0, r4
- 800573e: f7fa fe35 bl 80003ac <d_append_buffer>
- 8005742: 9905 ldr r1, [sp, #20]
- 8005744: 686a ldr r2, [r5, #4]
- 8005746: f7fd bb48 b.w 8002dda <d_print_comp+0x1e6>
- 800574a: f8cc 0000 str.w r0, [ip]
- 800574e: e72c b.n 80055aa <d_print_comp+0x29b6>
- 8005750: 2202 movs r2, #2
- 8005752: 4970 ldr r1, [pc, #448] ; (8005914 <d_print_comp+0x2d20>)
- 8005754: 4620 mov r0, r4
- 8005756: f7fa fe29 bl 80003ac <d_append_buffer>
- 800575a: 9905 ldr r1, [sp, #20]
- 800575c: 686a ldr r2, [r5, #4]
- 800575e: f7fd bb3c b.w 8002dda <d_print_comp+0x1e6>
- 8005762: 2202 movs r2, #2
- 8005764: 496c ldr r1, [pc, #432] ; (8005918 <d_print_comp+0x2d24>)
- 8005766: 4620 mov r0, r4
- 8005768: f7fa fe20 bl 80003ac <d_append_buffer>
- 800576c: 9905 ldr r1, [sp, #20]
- 800576e: 686a ldr r2, [r5, #4]
- 8005770: f7fd bb33 b.w 8002dda <d_print_comp+0x1e6>
- 8005774: f8d4 7100 ldr.w r7, [r4, #256] ; 0x100
- 8005778: 2fff cmp r7, #255 ; 0xff
- 800577a: d111 bne.n 80057a0 <d_print_comp+0x2bac>
- 800577c: 2600 movs r6, #0
- 800577e: 4639 mov r1, r7
- 8005780: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8005784: f884 60ff strb.w r6, [r4, #255] ; 0xff
- 8005788: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 800578c: 4620 mov r0, r4
- 800578e: 4798 blx r3
- 8005790: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8005794: f8c4 6100 str.w r6, [r4, #256] ; 0x100
- 8005798: 3301 adds r3, #1
- 800579a: 4637 mov r7, r6
- 800579c: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 80057a0: 1c7a adds r2, r7, #1
- 80057a2: 236c movs r3, #108 ; 0x6c
- 80057a4: f8c4 2100 str.w r2, [r4, #256] ; 0x100
- 80057a8: 55e3 strb r3, [r4, r7]
- 80057aa: f884 3104 strb.w r3, [r4, #260] ; 0x104
- 80057ae: 686a ldr r2, [r5, #4]
- 80057b0: 9905 ldr r1, [sp, #20]
- 80057b2: f7fd bb12 b.w 8002dda <d_print_comp+0x1e6>
- 80057b6: f8d4 7100 ldr.w r7, [r4, #256] ; 0x100
- 80057ba: 2fff cmp r7, #255 ; 0xff
- 80057bc: d111 bne.n 80057e2 <d_print_comp+0x2bee>
- 80057be: 2600 movs r6, #0
- 80057c0: 4639 mov r1, r7
- 80057c2: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 80057c6: f884 60ff strb.w r6, [r4, #255] ; 0xff
- 80057ca: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 80057ce: 4620 mov r0, r4
- 80057d0: 4798 blx r3
- 80057d2: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 80057d6: f8c4 6100 str.w r6, [r4, #256] ; 0x100
- 80057da: 3301 adds r3, #1
- 80057dc: 4637 mov r7, r6
- 80057de: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 80057e2: 1c7a adds r2, r7, #1
- 80057e4: 2375 movs r3, #117 ; 0x75
- 80057e6: f8c4 2100 str.w r2, [r4, #256] ; 0x100
- 80057ea: 55e3 strb r3, [r4, r7]
- 80057ec: f884 3104 strb.w r3, [r4, #260] ; 0x104
- 80057f0: 686a ldr r2, [r5, #4]
- 80057f2: 9905 ldr r1, [sp, #20]
- 80057f4: f7fd baf1 b.w 8002dda <d_print_comp+0x1e6>
- 80057f8: 9905 ldr r1, [sp, #20]
- 80057fa: 686a ldr r2, [r5, #4]
- 80057fc: f7fd baed b.w 8002dda <d_print_comp+0x1e6>
- 8005800: f8d4 7100 ldr.w r7, [r4, #256] ; 0x100
- 8005804: 2fff cmp r7, #255 ; 0xff
- 8005806: d110 bne.n 800582a <d_print_comp+0x2c36>
- 8005808: 4639 mov r1, r7
- 800580a: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 800580e: f884 90ff strb.w r9, [r4, #255] ; 0xff
- 8005812: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8005816: 4620 mov r0, r4
- 8005818: 4798 blx r3
- 800581a: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 800581e: f8c4 9100 str.w r9, [r4, #256] ; 0x100
- 8005822: 3301 adds r3, #1
- 8005824: 464f mov r7, r9
- 8005826: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 800582a: 232d movs r3, #45 ; 0x2d
- 800582c: 1c7a adds r2, r7, #1
- 800582e: f8c4 2100 str.w r2, [r4, #256] ; 0x100
- 8005832: 55e3 strb r3, [r4, r7]
- 8005834: f884 3104 strb.w r3, [r4, #260] ; 0x104
- 8005838: e6fc b.n 8005634 <d_print_comp+0x2a40>
- 800583a: 689a ldr r2, [r3, #8]
- 800583c: 6891 ldr r1, [r2, #8]
- 800583e: 2901 cmp r1, #1
- 8005840: f47d aa69 bne.w 8002d16 <d_print_comp+0x122>
- 8005844: 6852 ldr r2, [r2, #4]
- 8005846: 7812 ldrb r2, [r2, #0]
- 8005848: 2a3e cmp r2, #62 ; 0x3e
- 800584a: f47d aa64 bne.w 8002d16 <d_print_comp+0x122>
- 800584e: f8d4 7100 ldr.w r7, [r4, #256] ; 0x100
- 8005852: 2fff cmp r7, #255 ; 0xff
- 8005854: d110 bne.n 8005878 <d_print_comp+0x2c84>
- 8005856: f884 00ff strb.w r0, [r4, #255] ; 0xff
- 800585a: 4639 mov r1, r7
- 800585c: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8005860: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8005864: 4620 mov r0, r4
- 8005866: 4798 blx r3
- 8005868: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 800586c: f8c4 8100 str.w r8, [r4, #256] ; 0x100
- 8005870: 3301 adds r3, #1
- 8005872: 4647 mov r7, r8
- 8005874: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8005878: 2328 movs r3, #40 ; 0x28
- 800587a: 1c7a adds r2, r7, #1
- 800587c: f8c4 2100 str.w r2, [r4, #256] ; 0x100
- 8005880: 55e3 strb r3, [r4, r7]
- 8005882: f884 3104 strb.w r3, [r4, #260] ; 0x104
- 8005886: 68ab ldr r3, [r5, #8]
- 8005888: f7fd ba45 b.w 8002d16 <d_print_comp+0x122>
- 800588c: 465a mov r2, fp
- 800588e: 4631 mov r1, r6
- 8005890: 4620 mov r0, r4
- 8005892: f000 feb7 bl 8006604 <d_print_subexpr>
- 8005896: 463a mov r2, r7
- 8005898: 4631 mov r1, r6
- 800589a: 4620 mov r0, r4
- 800589c: f000 fe72 bl 8006584 <d_print_expr_op>
- 80058a0: 4652 mov r2, sl
- 80058a2: 4631 mov r1, r6
- 80058a4: 4620 mov r0, r4
- 80058a6: f000 fead bl 8006604 <d_print_subexpr>
- 80058aa: 2203 movs r2, #3
- 80058ac: 491b ldr r1, [pc, #108] ; (800591c <d_print_comp+0x2d28>)
- 80058ae: 4620 mov r0, r4
- 80058b0: f7fa fd7c bl 80003ac <d_append_buffer>
- 80058b4: 464a mov r2, r9
- 80058b6: 4631 mov r1, r6
- 80058b8: 4620 mov r0, r4
- 80058ba: f000 fea3 bl 8006604 <d_print_subexpr>
- 80058be: 9905 ldr r1, [sp, #20]
- 80058c0: 686a ldr r2, [r5, #4]
- 80058c2: f7fd ba8a b.w 8002dda <d_print_comp+0x1e6>
- 80058c6: 9905 ldr r1, [sp, #20]
- 80058c8: 686a ldr r2, [r5, #4]
- 80058ca: f7fd ba86 b.w 8002dda <d_print_comp+0x1e6>
- 80058ce: 9905 ldr r1, [sp, #20]
- 80058d0: 686a ldr r2, [r5, #4]
- 80058d2: f7fd ba82 b.w 8002dda <d_print_comp+0x1e6>
- 80058d6: 68d3 ldr r3, [r2, #12]
- 80058d8: 781b ldrb r3, [r3, #0]
- 80058da: 2b29 cmp r3, #41 ; 0x29
- 80058dc: bf1c itt ne
- 80058de: 2301 movne r3, #1
- 80058e0: f8c4 3118 strne.w r3, [r4, #280] ; 0x118
- 80058e4: 6892 ldr r2, [r2, #8]
- 80058e6: 4631 mov r1, r6
- 80058e8: 4620 mov r0, r4
- 80058ea: f000 fe8b bl 8006604 <d_print_subexpr>
- 80058ee: f7fd ba22 b.w 8002d36 <d_print_comp+0x142>
- 80058f2: 463a mov r2, r7
- 80058f4: 4631 mov r1, r6
- 80058f6: 4620 mov r0, r4
- 80058f8: f000 fe44 bl 8006584 <d_print_expr_op>
- 80058fc: e5fe b.n 80054fc <d_print_comp+0x2908>
- 80058fe: 2301 movs r3, #1
- 8005900: f8c4 3118 str.w r3, [r4, #280] ; 0x118
- 8005904: 686a ldr r2, [r5, #4]
- 8005906: f7fd ba68 b.w 8002dda <d_print_comp+0x1e6>
- 800590a: bf00 nop
- 800590c: 08012794 .word 0x08012794
- 8005910: 08012798 .word 0x08012798
- 8005914: 08012790 .word 0x08012790
- 8005918: 0801278c .word 0x0801278c
- 800591c: 08012780 .word 0x08012780
-
-08005920 <d_print_mod>:
- 8005920: 7813 ldrb r3, [r2, #0]
- 8005922: 3b03 subs r3, #3
- 8005924: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
- 8005928: 4615 mov r5, r2
- 800592a: 4604 mov r4, r0
- 800592c: 460e mov r6, r1
- 800592e: 2b4c cmp r3, #76 ; 0x4c
- 8005930: f200 82c8 bhi.w 8005ec4 <d_print_mod+0x5a4>
- 8005934: e8df f013 tbh [pc, r3, lsl #1]
- 8005938: 02c60075 .word 0x02c60075
- 800593c: 02c602c6 .word 0x02c602c6
- 8005940: 02c602c6 .word 0x02c602c6
- 8005944: 02c602c6 .word 0x02c602c6
- 8005948: 02c602c6 .word 0x02c602c6
- 800594c: 02c602c6 .word 0x02c602c6
- 8005950: 02c602c6 .word 0x02c602c6
- 8005954: 02c602c6 .word 0x02c602c6
- 8005958: 02c602c6 .word 0x02c602c6
- 800595c: 02c602c6 .word 0x02c602c6
- 8005960: 02c602c6 .word 0x02c602c6
- 8005964: 00a1007a .word 0x00a1007a
- 8005968: 007a00c8 .word 0x007a00c8
- 800596c: 00c800a1 .word 0x00c800a1
- 8005970: 010a00ee .word 0x010a00ee
- 8005974: 01480126 .word 0x01480126
- 8005978: 02790166 .word 0x02790166
- 800597c: 029f0252 .word 0x029f0252
- 8005980: 02c602c6 .word 0x02c602c6
- 8005984: 02c602c6 .word 0x02c602c6
- 8005988: 02c60184 .word 0x02c60184
- 800598c: 02c601cc .word 0x02c601cc
- 8005990: 02c602c6 .word 0x02c602c6
- 8005994: 02c602c6 .word 0x02c602c6
- 8005998: 02c602c6 .word 0x02c602c6
- 800599c: 02c602c6 .word 0x02c602c6
- 80059a0: 02c602c6 .word 0x02c602c6
- 80059a4: 02c602c6 .word 0x02c602c6
- 80059a8: 02c602c6 .word 0x02c602c6
- 80059ac: 02c602c6 .word 0x02c602c6
- 80059b0: 02c602c6 .word 0x02c602c6
- 80059b4: 02c602c6 .word 0x02c602c6
- 80059b8: 02c602c6 .word 0x02c602c6
- 80059bc: 02c602c6 .word 0x02c602c6
- 80059c0: 02c602c6 .word 0x02c602c6
- 80059c4: 02c602c6 .word 0x02c602c6
- 80059c8: 01f402c6 .word 0x01f402c6
- 80059cc: 022a02c6 .word 0x022a02c6
- 80059d0: 004d .short 0x004d
- 80059d2: 4fd7 ldr r7, [pc, #860] ; (8005d30 <d_print_mod+0x410>)
- 80059d4: f8d0 3100 ldr.w r3, [r0, #256] ; 0x100
- 80059d8: f107 0806 add.w r8, r7, #6
- 80059dc: f04f 0900 mov.w r9, #0
- 80059e0: e016 b.n 8005a10 <d_print_mod+0xf0>
- 80059e2: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 80059e6: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 80059ea: f884 90ff strb.w r9, [r4, #255] ; 0xff
- 80059ee: 4798 blx r3
- 80059f0: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 80059f4: 3301 adds r3, #1
- 80059f6: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 80059fa: 2200 movs r2, #0
- 80059fc: 2301 movs r3, #1
- 80059fe: 4547 cmp r7, r8
- 8005a00: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 8005a04: f804 a002 strb.w sl, [r4, r2]
- 8005a08: f884 a104 strb.w sl, [r4, #260] ; 0x104
- 8005a0c: f000 825f beq.w 8005ece <d_print_mod+0x5ae>
- 8005a10: 2bff cmp r3, #255 ; 0xff
- 8005a12: 4619 mov r1, r3
- 8005a14: 4620 mov r0, r4
- 8005a16: f817 ab01 ldrb.w sl, [r7], #1
- 8005a1a: d0e2 beq.n 80059e2 <d_print_mod+0xc2>
- 8005a1c: 461a mov r2, r3
- 8005a1e: 3301 adds r3, #1
- 8005a20: e7ed b.n 80059fe <d_print_mod+0xde>
- 8005a22: 68aa ldr r2, [r5, #8]
- 8005a24: e8bd 47f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
- 8005a28: f7fd b8e4 b.w 8002bf4 <d_print_comp>
- 8005a2c: 4dc1 ldr r5, [pc, #772] ; (8005d34 <d_print_mod+0x414>)
- 8005a2e: f8d0 3100 ldr.w r3, [r0, #256] ; 0x100
- 8005a32: f105 0609 add.w r6, r5, #9
- 8005a36: 2700 movs r7, #0
- 8005a38: e016 b.n 8005a68 <d_print_mod+0x148>
- 8005a3a: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8005a3e: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8005a42: f884 70ff strb.w r7, [r4, #255] ; 0xff
- 8005a46: 4798 blx r3
- 8005a48: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8005a4c: 3301 adds r3, #1
- 8005a4e: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8005a52: 2200 movs r2, #0
- 8005a54: 2301 movs r3, #1
- 8005a56: 42ae cmp r6, r5
- 8005a58: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 8005a5c: f804 8002 strb.w r8, [r4, r2]
- 8005a60: f884 8104 strb.w r8, [r4, #260] ; 0x104
- 8005a64: f000 80ea beq.w 8005c3c <d_print_mod+0x31c>
- 8005a68: 2bff cmp r3, #255 ; 0xff
- 8005a6a: 4619 mov r1, r3
- 8005a6c: 4620 mov r0, r4
- 8005a6e: f815 8f01 ldrb.w r8, [r5, #1]!
- 8005a72: d0e2 beq.n 8005a3a <d_print_mod+0x11a>
- 8005a74: 461a mov r2, r3
- 8005a76: 3301 adds r3, #1
- 8005a78: e7ed b.n 8005a56 <d_print_mod+0x136>
- 8005a7a: 4daf ldr r5, [pc, #700] ; (8005d38 <d_print_mod+0x418>)
- 8005a7c: f8d0 3100 ldr.w r3, [r0, #256] ; 0x100
- 8005a80: f105 0609 add.w r6, r5, #9
- 8005a84: 2700 movs r7, #0
- 8005a86: e016 b.n 8005ab6 <d_print_mod+0x196>
- 8005a88: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8005a8c: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8005a90: f884 70ff strb.w r7, [r4, #255] ; 0xff
- 8005a94: 4798 blx r3
- 8005a96: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8005a9a: 3301 adds r3, #1
- 8005a9c: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8005aa0: 2200 movs r2, #0
- 8005aa2: 2301 movs r3, #1
- 8005aa4: 42ae cmp r6, r5
- 8005aa6: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 8005aaa: f804 8002 strb.w r8, [r4, r2]
- 8005aae: f884 8104 strb.w r8, [r4, #260] ; 0x104
- 8005ab2: f000 80c3 beq.w 8005c3c <d_print_mod+0x31c>
- 8005ab6: 2bff cmp r3, #255 ; 0xff
- 8005ab8: 4619 mov r1, r3
- 8005aba: 4620 mov r0, r4
- 8005abc: f815 8f01 ldrb.w r8, [r5, #1]!
- 8005ac0: d0e2 beq.n 8005a88 <d_print_mod+0x168>
- 8005ac2: 461a mov r2, r3
- 8005ac4: 3301 adds r3, #1
- 8005ac6: e7ed b.n 8005aa4 <d_print_mod+0x184>
- 8005ac8: 4d9c ldr r5, [pc, #624] ; (8005d3c <d_print_mod+0x41c>)
- 8005aca: f8d0 3100 ldr.w r3, [r0, #256] ; 0x100
- 8005ace: 1dae adds r6, r5, #6
- 8005ad0: 2700 movs r7, #0
- 8005ad2: e016 b.n 8005b02 <d_print_mod+0x1e2>
- 8005ad4: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8005ad8: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8005adc: f884 70ff strb.w r7, [r4, #255] ; 0xff
- 8005ae0: 4798 blx r3
- 8005ae2: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8005ae6: 3301 adds r3, #1
- 8005ae8: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8005aec: 2200 movs r2, #0
- 8005aee: 2301 movs r3, #1
- 8005af0: 42b5 cmp r5, r6
- 8005af2: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 8005af6: f804 8002 strb.w r8, [r4, r2]
- 8005afa: f884 8104 strb.w r8, [r4, #260] ; 0x104
- 8005afe: f000 809d beq.w 8005c3c <d_print_mod+0x31c>
- 8005b02: 2bff cmp r3, #255 ; 0xff
- 8005b04: 4619 mov r1, r3
- 8005b06: 4620 mov r0, r4
- 8005b08: f815 8b01 ldrb.w r8, [r5], #1
- 8005b0c: d0e2 beq.n 8005ad4 <d_print_mod+0x1b4>
- 8005b0e: 461a mov r2, r3
- 8005b10: 3301 adds r3, #1
- 8005b12: e7ed b.n 8005af0 <d_print_mod+0x1d0>
- 8005b14: f8d0 1100 ldr.w r1, [r0, #256] ; 0x100
- 8005b18: 29ff cmp r1, #255 ; 0xff
- 8005b1a: d10f bne.n 8005b3c <d_print_mod+0x21c>
- 8005b1c: 2500 movs r5, #0
- 8005b1e: f8d0 3108 ldr.w r3, [r0, #264] ; 0x108
- 8005b22: f880 50ff strb.w r5, [r0, #255] ; 0xff
- 8005b26: f8d0 210c ldr.w r2, [r0, #268] ; 0x10c
- 8005b2a: 4798 blx r3
- 8005b2c: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8005b30: f8c4 5100 str.w r5, [r4, #256] ; 0x100
- 8005b34: 3301 adds r3, #1
- 8005b36: 4629 mov r1, r5
- 8005b38: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8005b3c: 2220 movs r2, #32
- 8005b3e: 1c4b adds r3, r1, #1
- 8005b40: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 8005b44: 5462 strb r2, [r4, r1]
- 8005b46: f884 2104 strb.w r2, [r4, #260] ; 0x104
- 8005b4a: e05d b.n 8005c08 <d_print_mod+0x2e8>
- 8005b4c: f8d0 1100 ldr.w r1, [r0, #256] ; 0x100
- 8005b50: 29ff cmp r1, #255 ; 0xff
- 8005b52: d10f bne.n 8005b74 <d_print_mod+0x254>
- 8005b54: 2500 movs r5, #0
- 8005b56: f8d0 3108 ldr.w r3, [r0, #264] ; 0x108
- 8005b5a: f880 50ff strb.w r5, [r0, #255] ; 0xff
- 8005b5e: f8d0 210c ldr.w r2, [r0, #268] ; 0x10c
- 8005b62: 4798 blx r3
- 8005b64: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8005b68: f8c4 5100 str.w r5, [r4, #256] ; 0x100
- 8005b6c: 3301 adds r3, #1
- 8005b6e: 4629 mov r1, r5
- 8005b70: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8005b74: 2220 movs r2, #32
- 8005b76: 1c4b adds r3, r1, #1
- 8005b78: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 8005b7c: 5462 strb r2, [r4, r1]
- 8005b7e: f884 2104 strb.w r2, [r4, #260] ; 0x104
- 8005b82: e154 b.n 8005e2e <d_print_mod+0x50e>
- 8005b84: f8d0 1100 ldr.w r1, [r0, #256] ; 0x100
- 8005b88: 29ff cmp r1, #255 ; 0xff
- 8005b8a: d10f bne.n 8005bac <d_print_mod+0x28c>
- 8005b8c: 2700 movs r7, #0
- 8005b8e: f8d0 3108 ldr.w r3, [r0, #264] ; 0x108
- 8005b92: f880 70ff strb.w r7, [r0, #255] ; 0xff
- 8005b96: f8d0 210c ldr.w r2, [r0, #268] ; 0x10c
- 8005b9a: 4798 blx r3
- 8005b9c: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8005ba0: f8c4 7100 str.w r7, [r4, #256] ; 0x100
- 8005ba4: 3301 adds r3, #1
- 8005ba6: 4639 mov r1, r7
- 8005ba8: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8005bac: 1c4a adds r2, r1, #1
- 8005bae: 2320 movs r3, #32
- 8005bb0: f8c4 2100 str.w r2, [r4, #256] ; 0x100
- 8005bb4: 5463 strb r3, [r4, r1]
- 8005bb6: f884 3104 strb.w r3, [r4, #260] ; 0x104
- 8005bba: 4631 mov r1, r6
- 8005bbc: 68ea ldr r2, [r5, #12]
- 8005bbe: 4620 mov r0, r4
- 8005bc0: e8bd 47f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
- 8005bc4: f7fd b816 b.w 8002bf4 <d_print_comp>
- 8005bc8: f011 0604 ands.w r6, r1, #4
- 8005bcc: d136 bne.n 8005c3c <d_print_mod+0x31c>
- 8005bce: f8d0 1100 ldr.w r1, [r0, #256] ; 0x100
- 8005bd2: 29ff cmp r1, #255 ; 0xff
- 8005bd4: d10e bne.n 8005bf4 <d_print_mod+0x2d4>
- 8005bd6: f8d0 3108 ldr.w r3, [r0, #264] ; 0x108
- 8005bda: f880 60ff strb.w r6, [r0, #255] ; 0xff
- 8005bde: f8d0 210c ldr.w r2, [r0, #268] ; 0x10c
- 8005be2: 4798 blx r3
- 8005be4: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8005be8: f8c4 6100 str.w r6, [r4, #256] ; 0x100
- 8005bec: 3301 adds r3, #1
- 8005bee: 4631 mov r1, r6
- 8005bf0: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8005bf4: 232a movs r3, #42 ; 0x2a
- 8005bf6: 1c4a adds r2, r1, #1
- 8005bf8: f8c4 2100 str.w r2, [r4, #256] ; 0x100
- 8005bfc: 5463 strb r3, [r4, r1]
- 8005bfe: f884 3104 strb.w r3, [r4, #260] ; 0x104
- 8005c02: e01b b.n 8005c3c <d_print_mod+0x31c>
- 8005c04: f8d0 3100 ldr.w r3, [r0, #256] ; 0x100
- 8005c08: 2bff cmp r3, #255 ; 0xff
- 8005c0a: f040 81a9 bne.w 8005f60 <d_print_mod+0x640>
- 8005c0e: 2500 movs r5, #0
- 8005c10: 4619 mov r1, r3
- 8005c12: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8005c16: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8005c1a: f884 50ff strb.w r5, [r4, #255] ; 0xff
- 8005c1e: 4620 mov r0, r4
- 8005c20: 4798 blx r3
- 8005c22: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8005c26: 1c5a adds r2, r3, #1
- 8005c28: f8c4 2124 str.w r2, [r4, #292] ; 0x124
- 8005c2c: 462b mov r3, r5
- 8005c2e: 2101 movs r1, #1
- 8005c30: 2226 movs r2, #38 ; 0x26
- 8005c32: f8c4 1100 str.w r1, [r4, #256] ; 0x100
- 8005c36: 54e2 strb r2, [r4, r3]
- 8005c38: f884 2104 strb.w r2, [r4, #260] ; 0x104
- 8005c3c: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
- 8005c40: f890 3104 ldrb.w r3, [r0, #260] ; 0x104
- 8005c44: 2b28 cmp r3, #40 ; 0x28
- 8005c46: d019 beq.n 8005c7c <d_print_mod+0x35c>
- 8005c48: f8d0 1100 ldr.w r1, [r0, #256] ; 0x100
- 8005c4c: 29ff cmp r1, #255 ; 0xff
- 8005c4e: f040 818b bne.w 8005f68 <d_print_mod+0x648>
- 8005c52: 2700 movs r7, #0
- 8005c54: f8d0 3108 ldr.w r3, [r0, #264] ; 0x108
- 8005c58: f8d0 210c ldr.w r2, [r0, #268] ; 0x10c
- 8005c5c: f880 70ff strb.w r7, [r0, #255] ; 0xff
- 8005c60: 4798 blx r3
- 8005c62: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8005c66: 3301 adds r3, #1
- 8005c68: 4639 mov r1, r7
- 8005c6a: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8005c6e: 2201 movs r2, #1
- 8005c70: 2320 movs r3, #32
- 8005c72: f8c4 2100 str.w r2, [r4, #256] ; 0x100
- 8005c76: 5463 strb r3, [r4, r1]
- 8005c78: f884 3104 strb.w r3, [r4, #260] ; 0x104
- 8005c7c: 68aa ldr r2, [r5, #8]
- 8005c7e: 4d30 ldr r5, [pc, #192] ; (8005d40 <d_print_mod+0x420>)
- 8005c80: 4631 mov r1, r6
- 8005c82: 4620 mov r0, r4
- 8005c84: f7fc ffb6 bl 8002bf4 <d_print_comp>
- 8005c88: 1cee adds r6, r5, #3
- 8005c8a: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 8005c8e: 2700 movs r7, #0
- 8005c90: e015 b.n 8005cbe <d_print_mod+0x39e>
- 8005c92: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8005c96: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8005c9a: f884 70ff strb.w r7, [r4, #255] ; 0xff
- 8005c9e: 4798 blx r3
- 8005ca0: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8005ca4: 3301 adds r3, #1
- 8005ca6: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8005caa: 2200 movs r2, #0
- 8005cac: 2301 movs r3, #1
- 8005cae: 42ae cmp r6, r5
- 8005cb0: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 8005cb4: f804 8002 strb.w r8, [r4, r2]
- 8005cb8: f884 8104 strb.w r8, [r4, #260] ; 0x104
- 8005cbc: d0be beq.n 8005c3c <d_print_mod+0x31c>
- 8005cbe: 2bff cmp r3, #255 ; 0xff
- 8005cc0: 4619 mov r1, r3
- 8005cc2: 4620 mov r0, r4
- 8005cc4: f815 8b01 ldrb.w r8, [r5], #1
- 8005cc8: d0e3 beq.n 8005c92 <d_print_mod+0x372>
- 8005cca: 461a mov r2, r3
- 8005ccc: 3301 adds r3, #1
- 8005cce: e7ee b.n 8005cae <d_print_mod+0x38e>
- 8005cd0: 4f1c ldr r7, [pc, #112] ; (8005d44 <d_print_mod+0x424>)
- 8005cd2: f8d0 3100 ldr.w r3, [r0, #256] ; 0x100
- 8005cd6: f107 080a add.w r8, r7, #10
- 8005cda: f04f 0900 mov.w r9, #0
- 8005cde: e016 b.n 8005d0e <d_print_mod+0x3ee>
- 8005ce0: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8005ce4: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8005ce8: f884 90ff strb.w r9, [r4, #255] ; 0xff
- 8005cec: 4798 blx r3
- 8005cee: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8005cf2: 3301 adds r3, #1
- 8005cf4: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8005cf8: 2200 movs r2, #0
- 8005cfa: 2301 movs r3, #1
- 8005cfc: 45b8 cmp r8, r7
- 8005cfe: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 8005d02: f804 a002 strb.w sl, [r4, r2]
- 8005d06: f884 a104 strb.w sl, [r4, #260] ; 0x104
- 8005d0a: f000 811e beq.w 8005f4a <d_print_mod+0x62a>
- 8005d0e: 2bff cmp r3, #255 ; 0xff
- 8005d10: 4619 mov r1, r3
- 8005d12: 4620 mov r0, r4
- 8005d14: f817 ab01 ldrb.w sl, [r7], #1
- 8005d18: d0e2 beq.n 8005ce0 <d_print_mod+0x3c0>
- 8005d1a: 461a mov r2, r3
- 8005d1c: 3301 adds r3, #1
- 8005d1e: e7ed b.n 8005cfc <d_print_mod+0x3dc>
- 8005d20: 4d09 ldr r5, [pc, #36] ; (8005d48 <d_print_mod+0x428>)
- 8005d22: f8d0 3100 ldr.w r3, [r0, #256] ; 0x100
- 8005d26: f105 0611 add.w r6, r5, #17
- 8005d2a: 2700 movs r7, #0
- 8005d2c: e025 b.n 8005d7a <d_print_mod+0x45a>
- 8005d2e: bf00 nop
- 8005d30: 08012884 .word 0x08012884
- 8005d34: 08012843 .word 0x08012843
- 8005d38: 0801284f .word 0x0801284f
- 8005d3c: 0801285c .word 0x0801285c
- 8005d40: 080128a8 .word 0x080128a8
- 8005d44: 080128ac .word 0x080128ac
- 8005d48: 08012863 .word 0x08012863
- 8005d4c: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8005d50: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8005d54: f884 70ff strb.w r7, [r4, #255] ; 0xff
- 8005d58: 4798 blx r3
- 8005d5a: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8005d5e: 3301 adds r3, #1
- 8005d60: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8005d64: 2200 movs r2, #0
- 8005d66: 2301 movs r3, #1
- 8005d68: 42ae cmp r6, r5
- 8005d6a: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 8005d6e: f804 8002 strb.w r8, [r4, r2]
- 8005d72: f884 8104 strb.w r8, [r4, #260] ; 0x104
- 8005d76: f43f af61 beq.w 8005c3c <d_print_mod+0x31c>
- 8005d7a: 2bff cmp r3, #255 ; 0xff
- 8005d7c: 4619 mov r1, r3
- 8005d7e: 4620 mov r0, r4
- 8005d80: f815 8f01 ldrb.w r8, [r5, #1]!
- 8005d84: d0e2 beq.n 8005d4c <d_print_mod+0x42c>
- 8005d86: 461a mov r2, r3
- 8005d88: 3301 adds r3, #1
- 8005d8a: e7ed b.n 8005d68 <d_print_mod+0x448>
- 8005d8c: 4f77 ldr r7, [pc, #476] ; (8005f6c <d_print_mod+0x64c>)
- 8005d8e: f8d0 3100 ldr.w r3, [r0, #256] ; 0x100
- 8005d92: f107 0809 add.w r8, r7, #9
- 8005d96: f04f 0900 mov.w r9, #0
- 8005d9a: e016 b.n 8005dca <d_print_mod+0x4aa>
- 8005d9c: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8005da0: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8005da4: f884 90ff strb.w r9, [r4, #255] ; 0xff
- 8005da8: 4798 blx r3
- 8005daa: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8005dae: 3301 adds r3, #1
- 8005db0: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8005db4: 2200 movs r2, #0
- 8005db6: 2301 movs r3, #1
- 8005db8: 4547 cmp r7, r8
- 8005dba: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 8005dbe: f804 a002 strb.w sl, [r4, r2]
- 8005dc2: f884 a104 strb.w sl, [r4, #260] ; 0x104
- 8005dc6: f000 8082 beq.w 8005ece <d_print_mod+0x5ae>
- 8005dca: 2bff cmp r3, #255 ; 0xff
- 8005dcc: 4619 mov r1, r3
- 8005dce: 4620 mov r0, r4
- 8005dd0: f817 af01 ldrb.w sl, [r7, #1]!
- 8005dd4: d0e2 beq.n 8005d9c <d_print_mod+0x47c>
- 8005dd6: 461a mov r2, r3
- 8005dd8: 3301 adds r3, #1
- 8005dda: e7ed b.n 8005db8 <d_print_mod+0x498>
- 8005ddc: 4d64 ldr r5, [pc, #400] ; (8005f70 <d_print_mod+0x650>)
- 8005dde: f8d0 3100 ldr.w r3, [r0, #256] ; 0x100
- 8005de2: f105 0608 add.w r6, r5, #8
- 8005de6: 2700 movs r7, #0
- 8005de8: e016 b.n 8005e18 <d_print_mod+0x4f8>
- 8005dea: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8005dee: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8005df2: f884 70ff strb.w r7, [r4, #255] ; 0xff
- 8005df6: 4798 blx r3
- 8005df8: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8005dfc: 3301 adds r3, #1
- 8005dfe: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8005e02: 2200 movs r2, #0
- 8005e04: 2301 movs r3, #1
- 8005e06: 42ae cmp r6, r5
- 8005e08: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 8005e0c: f804 8002 strb.w r8, [r4, r2]
- 8005e10: f884 8104 strb.w r8, [r4, #260] ; 0x104
- 8005e14: f43f af12 beq.w 8005c3c <d_print_mod+0x31c>
- 8005e18: 2bff cmp r3, #255 ; 0xff
- 8005e1a: 4619 mov r1, r3
- 8005e1c: 4620 mov r0, r4
- 8005e1e: f815 8f01 ldrb.w r8, [r5, #1]!
- 8005e22: d0e2 beq.n 8005dea <d_print_mod+0x4ca>
- 8005e24: 461a mov r2, r3
- 8005e26: 3301 adds r3, #1
- 8005e28: e7ed b.n 8005e06 <d_print_mod+0x4e6>
- 8005e2a: f8d0 3100 ldr.w r3, [r0, #256] ; 0x100
- 8005e2e: 4d51 ldr r5, [pc, #324] ; (8005f74 <d_print_mod+0x654>)
- 8005e30: 2700 movs r7, #0
- 8005e32: 1cae adds r6, r5, #2
- 8005e34: e016 b.n 8005e64 <d_print_mod+0x544>
- 8005e36: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8005e3a: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8005e3e: f884 70ff strb.w r7, [r4, #255] ; 0xff
- 8005e42: 4798 blx r3
- 8005e44: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8005e48: 3301 adds r3, #1
- 8005e4a: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8005e4e: 2200 movs r2, #0
- 8005e50: 2301 movs r3, #1
- 8005e52: 42b5 cmp r5, r6
- 8005e54: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 8005e58: f804 8002 strb.w r8, [r4, r2]
- 8005e5c: f884 8104 strb.w r8, [r4, #260] ; 0x104
- 8005e60: f43f aeec beq.w 8005c3c <d_print_mod+0x31c>
- 8005e64: 2bff cmp r3, #255 ; 0xff
- 8005e66: 4619 mov r1, r3
- 8005e68: 4620 mov r0, r4
- 8005e6a: f815 8b01 ldrb.w r8, [r5], #1
- 8005e6e: d0e2 beq.n 8005e36 <d_print_mod+0x516>
- 8005e70: 461a mov r2, r3
- 8005e72: 3301 adds r3, #1
- 8005e74: e7ed b.n 8005e52 <d_print_mod+0x532>
- 8005e76: 4d40 ldr r5, [pc, #256] ; (8005f78 <d_print_mod+0x658>)
- 8005e78: f8d0 3100 ldr.w r3, [r0, #256] ; 0x100
- 8005e7c: f105 060a add.w r6, r5, #10
- 8005e80: 2700 movs r7, #0
- 8005e82: e016 b.n 8005eb2 <d_print_mod+0x592>
- 8005e84: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8005e88: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8005e8c: f884 70ff strb.w r7, [r4, #255] ; 0xff
- 8005e90: 4798 blx r3
- 8005e92: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8005e96: 3301 adds r3, #1
- 8005e98: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8005e9c: 2200 movs r2, #0
- 8005e9e: 2301 movs r3, #1
- 8005ea0: 42b5 cmp r5, r6
- 8005ea2: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 8005ea6: f804 8002 strb.w r8, [r4, r2]
- 8005eaa: f884 8104 strb.w r8, [r4, #260] ; 0x104
- 8005eae: f43f aec5 beq.w 8005c3c <d_print_mod+0x31c>
- 8005eb2: 2bff cmp r3, #255 ; 0xff
- 8005eb4: 4619 mov r1, r3
- 8005eb6: 4620 mov r0, r4
- 8005eb8: f815 8b01 ldrb.w r8, [r5], #1
- 8005ebc: d0e2 beq.n 8005e84 <d_print_mod+0x564>
- 8005ebe: 461a mov r2, r3
- 8005ec0: 3301 adds r3, #1
- 8005ec2: e7ed b.n 8005ea0 <d_print_mod+0x580>
- 8005ec4: 462a mov r2, r5
- 8005ec6: e8bd 47f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
- 8005eca: f7fc be93 b.w 8002bf4 <d_print_comp>
- 8005ece: 68ea ldr r2, [r5, #12]
- 8005ed0: 2a00 cmp r2, #0
- 8005ed2: f43f aeb3 beq.w 8005c3c <d_print_mod+0x31c>
- 8005ed6: 2bff cmp r3, #255 ; 0xff
- 8005ed8: d144 bne.n 8005f64 <d_print_mod+0x644>
- 8005eda: 2700 movs r7, #0
- 8005edc: 4619 mov r1, r3
- 8005ede: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8005ee2: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8005ee6: f884 70ff strb.w r7, [r4, #255] ; 0xff
- 8005eea: 4620 mov r0, r4
- 8005eec: 4798 blx r3
- 8005eee: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8005ef2: 68ea ldr r2, [r5, #12]
- 8005ef4: 1c59 adds r1, r3, #1
- 8005ef6: f8c4 1124 str.w r1, [r4, #292] ; 0x124
- 8005efa: 463b mov r3, r7
- 8005efc: 2101 movs r1, #1
- 8005efe: 2528 movs r5, #40 ; 0x28
- 8005f00: f8c4 1100 str.w r1, [r4, #256] ; 0x100
- 8005f04: 4620 mov r0, r4
- 8005f06: 4631 mov r1, r6
- 8005f08: 54e5 strb r5, [r4, r3]
- 8005f0a: f884 5104 strb.w r5, [r4, #260] ; 0x104
- 8005f0e: f7fc fe71 bl 8002bf4 <d_print_comp>
- 8005f12: f8d4 1100 ldr.w r1, [r4, #256] ; 0x100
- 8005f16: 29ff cmp r1, #255 ; 0xff
- 8005f18: d120 bne.n 8005f5c <d_print_mod+0x63c>
- 8005f1a: 2500 movs r5, #0
- 8005f1c: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8005f20: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8005f24: f884 50ff strb.w r5, [r4, #255] ; 0xff
- 8005f28: 4620 mov r0, r4
- 8005f2a: 4798 blx r3
- 8005f2c: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8005f30: 3301 adds r3, #1
- 8005f32: 4629 mov r1, r5
- 8005f34: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8005f38: 2201 movs r2, #1
- 8005f3a: 2329 movs r3, #41 ; 0x29
- 8005f3c: f8c4 2100 str.w r2, [r4, #256] ; 0x100
- 8005f40: 5463 strb r3, [r4, r1]
- 8005f42: f884 3104 strb.w r3, [r4, #260] ; 0x104
- 8005f46: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
- 8005f4a: 4631 mov r1, r6
- 8005f4c: 68aa ldr r2, [r5, #8]
- 8005f4e: 4620 mov r0, r4
- 8005f50: f7fc fe50 bl 8002bf4 <d_print_comp>
- 8005f54: f8d4 1100 ldr.w r1, [r4, #256] ; 0x100
- 8005f58: 29ff cmp r1, #255 ; 0xff
- 8005f5a: d0de beq.n 8005f1a <d_print_mod+0x5fa>
- 8005f5c: 1c4a adds r2, r1, #1
- 8005f5e: e7ec b.n 8005f3a <d_print_mod+0x61a>
- 8005f60: 1c59 adds r1, r3, #1
- 8005f62: e665 b.n 8005c30 <d_print_mod+0x310>
- 8005f64: 1c59 adds r1, r3, #1
- 8005f66: e7ca b.n 8005efe <d_print_mod+0x5de>
- 8005f68: 1c4a adds r2, r1, #1
- 8005f6a: e681 b.n 8005c70 <d_print_mod+0x350>
- 8005f6c: 08012877 .word 0x08012877
- 8005f70: 0801288f .word 0x0801288f
- 8005f74: 0801288c .word 0x0801288c
- 8005f78: 0801289c .word 0x0801289c
-
-08005f7c <d_print_function_type.isra.15>:
- 8005f7c: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
- 8005f80: 4604 mov r4, r0
- 8005f82: 460e mov r6, r1
- 8005f84: 4617 mov r7, r2
- 8005f86: 461d mov r5, r3
- 8005f88: b1d3 cbz r3, 8005fc0 <d_print_function_type.isra.15+0x44>
- 8005f8a: 689b ldr r3, [r3, #8]
- 8005f8c: b9c3 cbnz r3, 8005fc0 <d_print_function_type.isra.15+0x44>
- 8005f8e: 462a mov r2, r5
- 8005f90: 2001 movs r0, #1
- 8005f92: f8df c1c8 ldr.w ip, [pc, #456] ; 800615c <d_print_function_type.isra.15+0x1e0>
- 8005f96: e001 b.n 8005f9c <d_print_function_type.isra.15+0x20>
- 8005f98: 6893 ldr r3, [r2, #8]
- 8005f9a: b98b cbnz r3, 8005fc0 <d_print_function_type.isra.15+0x44>
- 8005f9c: 6853 ldr r3, [r2, #4]
- 8005f9e: 781b ldrb r3, [r3, #0]
- 8005fa0: 3b19 subs r3, #25
- 8005fa2: b2db uxtb r3, r3
- 8005fa4: 2b12 cmp r3, #18
- 8005fa6: fa00 f103 lsl.w r1, r0, r3
- 8005faa: d806 bhi.n 8005fba <d_print_function_type.isra.15+0x3e>
- 8005fac: ea11 0f0c tst.w r1, ip
- 8005fb0: f040 80c7 bne.w 8006142 <d_print_function_type.isra.15+0x1c6>
- 8005fb4: f411 6f60 tst.w r1, #3584 ; 0xe00
- 8005fb8: d154 bne.n 8006064 <d_print_function_type.isra.15+0xe8>
- 8005fba: 6812 ldr r2, [r2, #0]
- 8005fbc: 2a00 cmp r2, #0
- 8005fbe: d1eb bne.n 8005f98 <d_print_function_type.isra.15+0x1c>
- 8005fc0: 2300 movs r3, #0
- 8005fc2: f8d4 8114 ldr.w r8, [r4, #276] ; 0x114
- 8005fc6: f8c4 3114 str.w r3, [r4, #276] ; 0x114
- 8005fca: 4631 mov r1, r6
- 8005fcc: 462a mov r2, r5
- 8005fce: 4620 mov r0, r4
- 8005fd0: f000 f8c6 bl 8006160 <d_print_mod_list>
- 8005fd4: f8d4 1100 ldr.w r1, [r4, #256] ; 0x100
- 8005fd8: 29ff cmp r1, #255 ; 0xff
- 8005fda: f040 80a4 bne.w 8006126 <d_print_function_type.isra.15+0x1aa>
- 8005fde: 2300 movs r3, #0
- 8005fe0: f884 30ff strb.w r3, [r4, #255] ; 0xff
- 8005fe4: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8005fe8: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8005fec: 4620 mov r0, r4
- 8005fee: 4798 blx r3
- 8005ff0: 2328 movs r3, #40 ; 0x28
- 8005ff2: 7023 strb r3, [r4, #0]
- 8005ff4: f884 3104 strb.w r3, [r4, #260] ; 0x104
- 8005ff8: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8005ffc: 683a ldr r2, [r7, #0]
- 8005ffe: 1c59 adds r1, r3, #1
- 8006000: 2301 movs r3, #1
- 8006002: f8c4 1124 str.w r1, [r4, #292] ; 0x124
- 8006006: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 800600a: 2a00 cmp r2, #0
- 800600c: f000 8097 beq.w 800613e <d_print_function_type.isra.15+0x1c2>
- 8006010: 4631 mov r1, r6
- 8006012: 4620 mov r0, r4
- 8006014: f7fc fdee bl 8002bf4 <d_print_comp>
- 8006018: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 800601c: 2bff cmp r3, #255 ; 0xff
- 800601e: f040 808e bne.w 800613e <d_print_function_type.isra.15+0x1c2>
- 8006022: 2700 movs r7, #0
- 8006024: 4619 mov r1, r3
- 8006026: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 800602a: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 800602e: f884 70ff strb.w r7, [r4, #255] ; 0xff
- 8006032: 4620 mov r0, r4
- 8006034: 4798 blx r3
- 8006036: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 800603a: 1c5a adds r2, r3, #1
- 800603c: f8c4 2124 str.w r2, [r4, #292] ; 0x124
- 8006040: 463b mov r3, r7
- 8006042: 2201 movs r2, #1
- 8006044: 2029 movs r0, #41 ; 0x29
- 8006046: f8c4 2100 str.w r2, [r4, #256] ; 0x100
- 800604a: 4631 mov r1, r6
- 800604c: 54e0 strb r0, [r4, r3]
- 800604e: 462a mov r2, r5
- 8006050: f884 0104 strb.w r0, [r4, #260] ; 0x104
- 8006054: 2301 movs r3, #1
- 8006056: 4620 mov r0, r4
- 8006058: f000 f882 bl 8006160 <d_print_mod_list>
- 800605c: f8c4 8114 str.w r8, [r4, #276] ; 0x114
- 8006060: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
- 8006064: f894 3104 ldrb.w r3, [r4, #260] ; 0x104
- 8006068: f8d4 1100 ldr.w r1, [r4, #256] ; 0x100
- 800606c: f003 02fd and.w r2, r3, #253 ; 0xfd
- 8006070: 2a28 cmp r2, #40 ; 0x28
- 8006072: d01e beq.n 80060b2 <d_print_function_type.isra.15+0x136>
- 8006074: 2b20 cmp r3, #32
- 8006076: d01c beq.n 80060b2 <d_print_function_type.isra.15+0x136>
- 8006078: 29ff cmp r1, #255 ; 0xff
- 800607a: d112 bne.n 80060a2 <d_print_function_type.isra.15+0x126>
- 800607c: 2300 movs r3, #0
- 800607e: f884 30ff strb.w r3, [r4, #255] ; 0xff
- 8006082: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8006086: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 800608a: 4620 mov r0, r4
- 800608c: 4798 blx r3
- 800608e: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8006092: 2220 movs r2, #32
- 8006094: 3301 adds r3, #1
- 8006096: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 800609a: 7022 strb r2, [r4, #0]
- 800609c: 2101 movs r1, #1
- 800609e: 1c4a adds r2, r1, #1
- 80060a0: e01a b.n 80060d8 <d_print_function_type.isra.15+0x15c>
- 80060a2: 1c4b adds r3, r1, #1
- 80060a4: 2220 movs r2, #32
- 80060a6: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 80060aa: 5462 strb r2, [r4, r1]
- 80060ac: f884 2104 strb.w r2, [r4, #260] ; 0x104
- 80060b0: 4619 mov r1, r3
- 80060b2: 29ff cmp r1, #255 ; 0xff
- 80060b4: d1f3 bne.n 800609e <d_print_function_type.isra.15+0x122>
- 80060b6: f04f 0800 mov.w r8, #0
- 80060ba: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 80060be: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 80060c2: f884 80ff strb.w r8, [r4, #255] ; 0xff
- 80060c6: 4620 mov r0, r4
- 80060c8: 4798 blx r3
- 80060ca: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 80060ce: 3301 adds r3, #1
- 80060d0: 4641 mov r1, r8
- 80060d2: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 80060d6: 2201 movs r2, #1
- 80060d8: 2328 movs r3, #40 ; 0x28
- 80060da: f8c4 2100 str.w r2, [r4, #256] ; 0x100
- 80060de: 5463 strb r3, [r4, r1]
- 80060e0: f04f 0900 mov.w r9, #0
- 80060e4: f884 3104 strb.w r3, [r4, #260] ; 0x104
- 80060e8: f8d4 8114 ldr.w r8, [r4, #276] ; 0x114
- 80060ec: f8c4 9114 str.w r9, [r4, #276] ; 0x114
- 80060f0: 464b mov r3, r9
- 80060f2: 462a mov r2, r5
- 80060f4: 4631 mov r1, r6
- 80060f6: 4620 mov r0, r4
- 80060f8: f000 f832 bl 8006160 <d_print_mod_list>
- 80060fc: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 8006100: 2bff cmp r3, #255 ; 0xff
- 8006102: d123 bne.n 800614c <d_print_function_type.isra.15+0x1d0>
- 8006104: 4619 mov r1, r3
- 8006106: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 800610a: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 800610e: f884 90ff strb.w r9, [r4, #255] ; 0xff
- 8006112: 4620 mov r0, r4
- 8006114: 4798 blx r3
- 8006116: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 800611a: 2229 movs r2, #41 ; 0x29
- 800611c: 3301 adds r3, #1
- 800611e: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8006122: 7022 strb r2, [r4, #0]
- 8006124: 2101 movs r1, #1
- 8006126: 2228 movs r2, #40 ; 0x28
- 8006128: 1c4b adds r3, r1, #1
- 800612a: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 800612e: 5462 strb r2, [r4, r1]
- 8006130: f884 2104 strb.w r2, [r4, #260] ; 0x104
- 8006134: 683a ldr r2, [r7, #0]
- 8006136: 2a00 cmp r2, #0
- 8006138: f43f af70 beq.w 800601c <d_print_function_type.isra.15+0xa0>
- 800613c: e768 b.n 8006010 <d_print_function_type.isra.15+0x94>
- 800613e: 1c5a adds r2, r3, #1
- 8006140: e780 b.n 8006044 <d_print_function_type.isra.15+0xc8>
- 8006142: f894 3104 ldrb.w r3, [r4, #260] ; 0x104
- 8006146: f8d4 1100 ldr.w r1, [r4, #256] ; 0x100
- 800614a: e793 b.n 8006074 <d_print_function_type.isra.15+0xf8>
- 800614c: 2229 movs r2, #41 ; 0x29
- 800614e: 1c59 adds r1, r3, #1
- 8006150: f8c4 1100 str.w r1, [r4, #256] ; 0x100
- 8006154: 54e2 strb r2, [r4, r3]
- 8006156: f884 2104 strb.w r2, [r4, #260] ; 0x104
- 800615a: e73d b.n 8005fd8 <d_print_function_type.isra.15+0x5c>
- 800615c: 00043107 .word 0x00043107
-
-08006160 <d_print_mod_list>:
- 8006160: 2a00 cmp r2, #0
- 8006162: f000 80ac beq.w 80062be <d_print_mod_list+0x15e>
- 8006166: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
- 800616a: 461f mov r7, r3
- 800616c: f8d0 3118 ldr.w r3, [r0, #280] ; 0x118
- 8006170: b089 sub sp, #36 ; 0x24
- 8006172: 4605 mov r5, r0
- 8006174: bb4b cbnz r3, 80061ca <d_print_mod_list+0x6a>
- 8006176: 4688 mov r8, r1
- 8006178: 4614 mov r4, r2
- 800617a: f04f 0901 mov.w r9, #1
- 800617e: e002 b.n 8006186 <d_print_mod_list+0x26>
- 8006180: f8d5 3118 ldr.w r3, [r5, #280] ; 0x118
- 8006184: bb0b cbnz r3, 80061ca <d_print_mod_list+0x6a>
- 8006186: 68a3 ldr r3, [r4, #8]
- 8006188: b9e3 cbnz r3, 80061c4 <d_print_mod_list+0x64>
- 800618a: f8d4 a004 ldr.w sl, [r4, #4]
- 800618e: f89a 6000 ldrb.w r6, [sl]
- 8006192: 4630 mov r0, r6
- 8006194: b917 cbnz r7, 800619c <d_print_mod_list+0x3c>
- 8006196: f7fa f93f bl 8000418 <is_fnqual_component_type>
- 800619a: b998 cbnz r0, 80061c4 <d_print_mod_list+0x64>
- 800619c: 68e3 ldr r3, [r4, #12]
- 800619e: f8c4 9008 str.w r9, [r4, #8]
- 80061a2: 2e29 cmp r6, #41 ; 0x29
- 80061a4: f8d5 b110 ldr.w fp, [r5, #272] ; 0x110
- 80061a8: f8c5 3110 str.w r3, [r5, #272] ; 0x110
- 80061ac: 4652 mov r2, sl
- 80061ae: 4641 mov r1, r8
- 80061b0: 4628 mov r0, r5
- 80061b2: d00d beq.n 80061d0 <d_print_mod_list+0x70>
- 80061b4: 2e2a cmp r6, #42 ; 0x2a
- 80061b6: d015 beq.n 80061e4 <d_print_mod_list+0x84>
- 80061b8: 2e02 cmp r6, #2
- 80061ba: d01d beq.n 80061f8 <d_print_mod_list+0x98>
- 80061bc: f7ff fbb0 bl 8005920 <d_print_mod>
- 80061c0: f8c5 b110 str.w fp, [r5, #272] ; 0x110
- 80061c4: 6824 ldr r4, [r4, #0]
- 80061c6: 2c00 cmp r4, #0
- 80061c8: d1da bne.n 8006180 <d_print_mod_list+0x20>
- 80061ca: b009 add sp, #36 ; 0x24
- 80061cc: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
- 80061d0: 6823 ldr r3, [r4, #0]
- 80061d2: f10a 020c add.w r2, sl, #12
- 80061d6: f7ff fed1 bl 8005f7c <d_print_function_type.isra.15>
- 80061da: f8c5 b110 str.w fp, [r5, #272] ; 0x110
- 80061de: b009 add sp, #36 ; 0x24
- 80061e0: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
- 80061e4: 6823 ldr r3, [r4, #0]
- 80061e6: f10a 0208 add.w r2, sl, #8
- 80061ea: f000 f8f1 bl 80063d0 <d_print_array_type.isra.14>
- 80061ee: f8c5 b110 str.w fp, [r5, #272] ; 0x110
- 80061f2: b009 add sp, #36 ; 0x24
- 80061f4: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
- 80061f8: 2600 movs r6, #0
- 80061fa: f8d5 7114 ldr.w r7, [r5, #276] ; 0x114
- 80061fe: f8da 2008 ldr.w r2, [sl, #8]
- 8006202: f8c5 6114 str.w r6, [r5, #276] ; 0x114
- 8006206: f7fc fcf5 bl 8002bf4 <d_print_comp>
- 800620a: f8c5 7114 str.w r7, [r5, #276] ; 0x114
- 800620e: f018 0704 ands.w r7, r8, #4
- 8006212: d02f beq.n 8006274 <d_print_mod_list+0x114>
- 8006214: f8d5 1100 ldr.w r1, [r5, #256] ; 0x100
- 8006218: 29ff cmp r1, #255 ; 0xff
- 800621a: f040 80cf bne.w 80063bc <d_print_mod_list+0x25c>
- 800621e: f8d5 3108 ldr.w r3, [r5, #264] ; 0x108
- 8006222: f8d5 210c ldr.w r2, [r5, #268] ; 0x10c
- 8006226: f885 60ff strb.w r6, [r5, #255] ; 0xff
- 800622a: 4628 mov r0, r5
- 800622c: 4798 blx r3
- 800622e: f8d5 3124 ldr.w r3, [r5, #292] ; 0x124
- 8006232: 3301 adds r3, #1
- 8006234: 4631 mov r1, r6
- 8006236: f8c5 3124 str.w r3, [r5, #292] ; 0x124
- 800623a: 2201 movs r2, #1
- 800623c: 232e movs r3, #46 ; 0x2e
- 800623e: f8c5 2100 str.w r2, [r5, #256] ; 0x100
- 8006242: 546b strb r3, [r5, r1]
- 8006244: f885 3104 strb.w r3, [r5, #260] ; 0x104
- 8006248: 6863 ldr r3, [r4, #4]
- 800624a: 68dc ldr r4, [r3, #12]
- 800624c: 7820 ldrb r0, [r4, #0]
- 800624e: 2846 cmp r0, #70 ; 0x46
- 8006250: d102 bne.n 8006258 <d_print_mod_list+0xf8>
- 8006252: e035 b.n 80062c0 <d_print_mod_list+0x160>
- 8006254: 68a4 ldr r4, [r4, #8]
- 8006256: 7820 ldrb r0, [r4, #0]
- 8006258: f7fa f8de bl 8000418 <is_fnqual_component_type>
- 800625c: 2800 cmp r0, #0
- 800625e: d1f9 bne.n 8006254 <d_print_mod_list+0xf4>
- 8006260: 4622 mov r2, r4
- 8006262: 4641 mov r1, r8
- 8006264: 4628 mov r0, r5
- 8006266: f7fc fcc5 bl 8002bf4 <d_print_comp>
- 800626a: f8c5 b110 str.w fp, [r5, #272] ; 0x110
- 800626e: b009 add sp, #36 ; 0x24
- 8006270: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
- 8006274: 4e52 ldr r6, [pc, #328] ; (80063c0 <d_print_mod_list+0x260>)
- 8006276: f8d5 3100 ldr.w r3, [r5, #256] ; 0x100
- 800627a: f106 0902 add.w r9, r6, #2
- 800627e: e015 b.n 80062ac <d_print_mod_list+0x14c>
- 8006280: f8d5 3108 ldr.w r3, [r5, #264] ; 0x108
- 8006284: f8d5 210c ldr.w r2, [r5, #268] ; 0x10c
- 8006288: f885 70ff strb.w r7, [r5, #255] ; 0xff
- 800628c: 4798 blx r3
- 800628e: f8d5 3124 ldr.w r3, [r5, #292] ; 0x124
- 8006292: 3301 adds r3, #1
- 8006294: f8c5 3124 str.w r3, [r5, #292] ; 0x124
- 8006298: 2200 movs r2, #0
- 800629a: 2301 movs r3, #1
- 800629c: 45b1 cmp r9, r6
- 800629e: f8c5 3100 str.w r3, [r5, #256] ; 0x100
- 80062a2: f805 a002 strb.w sl, [r5, r2]
- 80062a6: f885 a104 strb.w sl, [r5, #260] ; 0x104
- 80062aa: d0cd beq.n 8006248 <d_print_mod_list+0xe8>
- 80062ac: 2bff cmp r3, #255 ; 0xff
- 80062ae: 4619 mov r1, r3
- 80062b0: 4628 mov r0, r5
- 80062b2: f816 ab01 ldrb.w sl, [r6], #1
- 80062b6: d0e3 beq.n 8006280 <d_print_mod_list+0x120>
- 80062b8: 461a mov r2, r3
- 80062ba: 3301 adds r3, #1
- 80062bc: e7ee b.n 800629c <d_print_mod_list+0x13c>
- 80062be: 4770 bx lr
- 80062c0: 4e40 ldr r6, [pc, #256] ; (80063c4 <d_print_mod_list+0x264>)
- 80062c2: f8d5 3100 ldr.w r3, [r5, #256] ; 0x100
- 80062c6: f106 070d add.w r7, r6, #13
- 80062ca: f04f 0900 mov.w r9, #0
- 80062ce: e015 b.n 80062fc <d_print_mod_list+0x19c>
- 80062d0: f8d5 3108 ldr.w r3, [r5, #264] ; 0x108
- 80062d4: f8d5 210c ldr.w r2, [r5, #268] ; 0x10c
- 80062d8: f885 90ff strb.w r9, [r5, #255] ; 0xff
- 80062dc: 4798 blx r3
- 80062de: f8d5 3124 ldr.w r3, [r5, #292] ; 0x124
- 80062e2: 3301 adds r3, #1
- 80062e4: f8c5 3124 str.w r3, [r5, #292] ; 0x124
- 80062e8: 2200 movs r2, #0
- 80062ea: 2301 movs r3, #1
- 80062ec: 42b7 cmp r7, r6
- 80062ee: f8c5 3100 str.w r3, [r5, #256] ; 0x100
- 80062f2: f805 a002 strb.w sl, [r5, r2]
- 80062f6: f885 a104 strb.w sl, [r5, #260] ; 0x104
- 80062fa: d008 beq.n 800630e <d_print_mod_list+0x1ae>
- 80062fc: 2bff cmp r3, #255 ; 0xff
- 80062fe: 4619 mov r1, r3
- 8006300: 4628 mov r0, r5
- 8006302: f816 ab01 ldrb.w sl, [r6], #1
- 8006306: d0e3 beq.n 80062d0 <d_print_mod_list+0x170>
- 8006308: 461a mov r2, r3
- 800630a: 3301 adds r3, #1
- 800630c: e7ee b.n 80062ec <d_print_mod_list+0x18c>
- 800630e: 68e2 ldr r2, [r4, #12]
- 8006310: 492d ldr r1, [pc, #180] ; (80063c8 <d_print_mod_list+0x268>)
- 8006312: 3201 adds r2, #1
- 8006314: a801 add r0, sp, #4
- 8006316: f008 faa1 bl 800e85c <sprintf>
- 800631a: a801 add r0, sp, #4
- 800631c: f000 fd5a bl 8006dd4 <strlen>
- 8006320: b328 cbz r0, 800636e <d_print_mod_list+0x20e>
- 8006322: ae01 add r6, sp, #4
- 8006324: f8d5 3100 ldr.w r3, [r5, #256] ; 0x100
- 8006328: 1837 adds r7, r6, r0
- 800632a: f04f 0900 mov.w r9, #0
- 800632e: e015 b.n 800635c <d_print_mod_list+0x1fc>
- 8006330: f8d5 3108 ldr.w r3, [r5, #264] ; 0x108
- 8006334: f8d5 210c ldr.w r2, [r5, #268] ; 0x10c
- 8006338: f885 90ff strb.w r9, [r5, #255] ; 0xff
- 800633c: 4798 blx r3
- 800633e: f8d5 3124 ldr.w r3, [r5, #292] ; 0x124
- 8006342: 3301 adds r3, #1
- 8006344: f8c5 3124 str.w r3, [r5, #292] ; 0x124
- 8006348: 2200 movs r2, #0
- 800634a: 2301 movs r3, #1
- 800634c: 42be cmp r6, r7
- 800634e: f8c5 3100 str.w r3, [r5, #256] ; 0x100
- 8006352: f805 a002 strb.w sl, [r5, r2]
- 8006356: f885 a104 strb.w sl, [r5, #260] ; 0x104
- 800635a: d00a beq.n 8006372 <d_print_mod_list+0x212>
- 800635c: 2bff cmp r3, #255 ; 0xff
- 800635e: 4619 mov r1, r3
- 8006360: 4628 mov r0, r5
- 8006362: f816 ab01 ldrb.w sl, [r6], #1
- 8006366: d0e3 beq.n 8006330 <d_print_mod_list+0x1d0>
- 8006368: 461a mov r2, r3
- 800636a: 3301 adds r3, #1
- 800636c: e7ee b.n 800634c <d_print_mod_list+0x1ec>
- 800636e: f8d5 3100 ldr.w r3, [r5, #256] ; 0x100
- 8006372: 4e16 ldr r6, [pc, #88] ; (80063cc <d_print_mod_list+0x26c>)
- 8006374: f04f 0900 mov.w r9, #0
- 8006378: 1cf7 adds r7, r6, #3
- 800637a: e016 b.n 80063aa <d_print_mod_list+0x24a>
- 800637c: f8d5 3108 ldr.w r3, [r5, #264] ; 0x108
- 8006380: f8d5 210c ldr.w r2, [r5, #268] ; 0x10c
- 8006384: f885 90ff strb.w r9, [r5, #255] ; 0xff
- 8006388: 4798 blx r3
- 800638a: f8d5 3124 ldr.w r3, [r5, #292] ; 0x124
- 800638e: 3301 adds r3, #1
- 8006390: f8c5 3124 str.w r3, [r5, #292] ; 0x124
- 8006394: 2200 movs r2, #0
- 8006396: 2301 movs r3, #1
- 8006398: 42b7 cmp r7, r6
- 800639a: f8c5 3100 str.w r3, [r5, #256] ; 0x100
- 800639e: f805 a002 strb.w sl, [r5, r2]
- 80063a2: f885 a104 strb.w sl, [r5, #260] ; 0x104
- 80063a6: f43f af55 beq.w 8006254 <d_print_mod_list+0xf4>
- 80063aa: 2bff cmp r3, #255 ; 0xff
- 80063ac: 4619 mov r1, r3
- 80063ae: 4628 mov r0, r5
- 80063b0: f816 ab01 ldrb.w sl, [r6], #1
- 80063b4: d0e2 beq.n 800637c <d_print_mod_list+0x21c>
- 80063b6: 461a mov r2, r3
- 80063b8: 3301 adds r3, #1
- 80063ba: e7ed b.n 8006398 <d_print_mod_list+0x238>
- 80063bc: 1c4a adds r2, r1, #1
- 80063be: e73d b.n 800623c <d_print_mod_list+0xdc>
- 80063c0: 080125c4 .word 0x080125c4
- 80063c4: 080125c8 .word 0x080125c8
- 80063c8: 08012574 .word 0x08012574
- 80063cc: 080125d8 .word 0x080125d8
-
-080063d0 <d_print_array_type.isra.14>:
- 80063d0: e92d 4ff8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
- 80063d4: 4604 mov r4, r0
- 80063d6: 460f mov r7, r1
- 80063d8: 4690 mov r8, r2
- 80063da: b15b cbz r3, 80063f4 <d_print_array_type.isra.14+0x24>
- 80063dc: 461e mov r6, r3
- 80063de: 689d ldr r5, [r3, #8]
- 80063e0: 2d00 cmp r5, #0
- 80063e2: d042 beq.n 800646a <d_print_array_type.isra.14+0x9a>
- 80063e4: 681b ldr r3, [r3, #0]
- 80063e6: 2b00 cmp r3, #0
- 80063e8: d1f9 bne.n 80063de <d_print_array_type.isra.14+0xe>
- 80063ea: 4632 mov r2, r6
- 80063ec: 4639 mov r1, r7
- 80063ee: 4620 mov r0, r4
- 80063f0: f7ff feb6 bl 8006160 <d_print_mod_list>
- 80063f4: f8d4 1100 ldr.w r1, [r4, #256] ; 0x100
- 80063f8: 29ff cmp r1, #255 ; 0xff
- 80063fa: f040 80b1 bne.w 8006560 <d_print_array_type.isra.14+0x190>
- 80063fe: 2300 movs r3, #0
- 8006400: f884 30ff strb.w r3, [r4, #255] ; 0xff
- 8006404: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8006408: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 800640c: 4620 mov r0, r4
- 800640e: 4798 blx r3
- 8006410: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8006414: 2220 movs r2, #32
- 8006416: 3301 adds r3, #1
- 8006418: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 800641c: 7022 strb r2, [r4, #0]
- 800641e: 2301 movs r3, #1
- 8006420: 225b movs r2, #91 ; 0x5b
- 8006422: 1c59 adds r1, r3, #1
- 8006424: f8c4 1100 str.w r1, [r4, #256] ; 0x100
- 8006428: 54e2 strb r2, [r4, r3]
- 800642a: f884 2104 strb.w r2, [r4, #260] ; 0x104
- 800642e: f8d8 2000 ldr.w r2, [r8]
- 8006432: 2a00 cmp r2, #0
- 8006434: d140 bne.n 80064b8 <d_print_array_type.isra.14+0xe8>
- 8006436: 29ff cmp r1, #255 ; 0xff
- 8006438: d145 bne.n 80064c6 <d_print_array_type.isra.14+0xf6>
- 800643a: 2500 movs r5, #0
- 800643c: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8006440: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8006444: f884 50ff strb.w r5, [r4, #255] ; 0xff
- 8006448: 4620 mov r0, r4
- 800644a: 4798 blx r3
- 800644c: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8006450: 3301 adds r3, #1
- 8006452: 4629 mov r1, r5
- 8006454: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8006458: 2201 movs r2, #1
- 800645a: 235d movs r3, #93 ; 0x5d
- 800645c: f8c4 2100 str.w r2, [r4, #256] ; 0x100
- 8006460: 5463 strb r3, [r4, r1]
- 8006462: f884 3104 strb.w r3, [r4, #260] ; 0x104
- 8006466: e8bd 8ff8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
- 800646a: 685b ldr r3, [r3, #4]
- 800646c: 781b ldrb r3, [r3, #0]
- 800646e: 2b2a cmp r3, #42 ; 0x2a
- 8006470: d12b bne.n 80064ca <d_print_array_type.isra.14+0xfa>
- 8006472: 462b mov r3, r5
- 8006474: 4632 mov r2, r6
- 8006476: 4639 mov r1, r7
- 8006478: 4620 mov r0, r4
- 800647a: f7ff fe71 bl 8006160 <d_print_mod_list>
- 800647e: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 8006482: 2bff cmp r3, #255 ; 0xff
- 8006484: d1cc bne.n 8006420 <d_print_array_type.isra.14+0x50>
- 8006486: 2200 movs r2, #0
- 8006488: 4619 mov r1, r3
- 800648a: f884 20ff strb.w r2, [r4, #255] ; 0xff
- 800648e: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8006492: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8006496: 4620 mov r0, r4
- 8006498: 4798 blx r3
- 800649a: 235b movs r3, #91 ; 0x5b
- 800649c: 7023 strb r3, [r4, #0]
- 800649e: f884 3104 strb.w r3, [r4, #260] ; 0x104
- 80064a2: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 80064a6: f8d8 2000 ldr.w r2, [r8]
- 80064aa: 3301 adds r3, #1
- 80064ac: 2101 movs r1, #1
- 80064ae: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 80064b2: f8c4 1100 str.w r1, [r4, #256] ; 0x100
- 80064b6: b132 cbz r2, 80064c6 <d_print_array_type.isra.14+0xf6>
- 80064b8: 4639 mov r1, r7
- 80064ba: 4620 mov r0, r4
- 80064bc: f7fc fb9a bl 8002bf4 <d_print_comp>
- 80064c0: f8d4 1100 ldr.w r1, [r4, #256] ; 0x100
- 80064c4: e7b7 b.n 8006436 <d_print_array_type.isra.14+0x66>
- 80064c6: 1c4a adds r2, r1, #1
- 80064c8: e7c7 b.n 800645a <d_print_array_type.isra.14+0x8a>
- 80064ca: f8df 90b4 ldr.w r9, [pc, #180] ; 8006580 <d_print_array_type.isra.14+0x1b0>
- 80064ce: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 80064d2: f109 0a02 add.w sl, r9, #2
- 80064d6: e016 b.n 8006506 <d_print_array_type.isra.14+0x136>
- 80064d8: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 80064dc: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 80064e0: f884 50ff strb.w r5, [r4, #255] ; 0xff
- 80064e4: 4798 blx r3
- 80064e6: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 80064ea: 2200 movs r2, #0
- 80064ec: 3301 adds r3, #1
- 80064ee: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 80064f2: 45ca cmp sl, r9
- 80064f4: f04f 0301 mov.w r3, #1
- 80064f8: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 80064fc: f804 b002 strb.w fp, [r4, r2]
- 8006500: f884 b104 strb.w fp, [r4, #260] ; 0x104
- 8006504: d010 beq.n 8006528 <d_print_array_type.isra.14+0x158>
- 8006506: 2bff cmp r3, #255 ; 0xff
- 8006508: 4619 mov r1, r3
- 800650a: 4620 mov r0, r4
- 800650c: f819 bb01 ldrb.w fp, [r9], #1
- 8006510: d0e2 beq.n 80064d8 <d_print_array_type.isra.14+0x108>
- 8006512: 461a mov r2, r3
- 8006514: 45ca cmp sl, r9
- 8006516: f103 0301 add.w r3, r3, #1
- 800651a: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 800651e: f804 b002 strb.w fp, [r4, r2]
- 8006522: f884 b104 strb.w fp, [r4, #260] ; 0x104
- 8006526: d1ee bne.n 8006506 <d_print_array_type.isra.14+0x136>
- 8006528: 2300 movs r3, #0
- 800652a: 4632 mov r2, r6
- 800652c: 4639 mov r1, r7
- 800652e: 4620 mov r0, r4
- 8006530: f7ff fe16 bl 8006160 <d_print_mod_list>
- 8006534: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 8006538: 2bff cmp r3, #255 ; 0xff
- 800653a: d119 bne.n 8006570 <d_print_array_type.isra.14+0x1a0>
- 800653c: 2200 movs r2, #0
- 800653e: 4619 mov r1, r3
- 8006540: f884 20ff strb.w r2, [r4, #255] ; 0xff
- 8006544: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8006548: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 800654c: 4620 mov r0, r4
- 800654e: 4798 blx r3
- 8006550: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8006554: 2229 movs r2, #41 ; 0x29
- 8006556: 3301 adds r3, #1
- 8006558: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 800655c: 7022 strb r2, [r4, #0]
- 800655e: 2101 movs r1, #1
- 8006560: 2220 movs r2, #32
- 8006562: 1c4b adds r3, r1, #1
- 8006564: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 8006568: 5462 strb r2, [r4, r1]
- 800656a: f884 2104 strb.w r2, [r4, #260] ; 0x104
- 800656e: e788 b.n 8006482 <d_print_array_type.isra.14+0xb2>
- 8006570: 2229 movs r2, #41 ; 0x29
- 8006572: 1c59 adds r1, r3, #1
- 8006574: f8c4 1100 str.w r1, [r4, #256] ; 0x100
- 8006578: 54e2 strb r2, [r4, r3]
- 800657a: f884 2104 strb.w r2, [r4, #260] ; 0x104
- 800657e: e73b b.n 80063f8 <d_print_array_type.isra.14+0x28>
- 8006580: 080127c0 .word 0x080127c0
-
-08006584 <d_print_expr_op>:
- 8006584: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
- 8006588: 7815 ldrb r5, [r2, #0]
- 800658a: 2d31 cmp r5, #49 ; 0x31
- 800658c: d003 beq.n 8006596 <d_print_expr_op+0x12>
- 800658e: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr}
- 8006592: f7fc bb2f b.w 8002bf4 <d_print_comp>
- 8006596: 6893 ldr r3, [r2, #8]
- 8006598: e9d3 5601 ldrd r5, r6, [r3, #4]
- 800659c: b37e cbz r6, 80065fe <d_print_expr_op+0x7a>
- 800659e: 442e add r6, r5
- 80065a0: 4604 mov r4, r0
- 80065a2: f8d0 3100 ldr.w r3, [r0, #256] ; 0x100
- 80065a6: 3e01 subs r6, #1
- 80065a8: 3d01 subs r5, #1
- 80065aa: 2700 movs r7, #0
- 80065ac: e016 b.n 80065dc <d_print_expr_op+0x58>
- 80065ae: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 80065b2: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 80065b6: f884 70ff strb.w r7, [r4, #255] ; 0xff
- 80065ba: 4798 blx r3
- 80065bc: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 80065c0: 2200 movs r2, #0
- 80065c2: 3301 adds r3, #1
- 80065c4: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 80065c8: 42b5 cmp r5, r6
- 80065ca: f04f 0301 mov.w r3, #1
- 80065ce: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 80065d2: f804 8002 strb.w r8, [r4, r2]
- 80065d6: f884 8104 strb.w r8, [r4, #260] ; 0x104
- 80065da: d010 beq.n 80065fe <d_print_expr_op+0x7a>
- 80065dc: 2bff cmp r3, #255 ; 0xff
- 80065de: 4619 mov r1, r3
- 80065e0: 4620 mov r0, r4
- 80065e2: f815 8f01 ldrb.w r8, [r5, #1]!
- 80065e6: d0e2 beq.n 80065ae <d_print_expr_op+0x2a>
- 80065e8: 461a mov r2, r3
- 80065ea: 42b5 cmp r5, r6
- 80065ec: f103 0301 add.w r3, r3, #1
- 80065f0: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 80065f4: f804 8002 strb.w r8, [r4, r2]
- 80065f8: f884 8104 strb.w r8, [r4, #260] ; 0x104
- 80065fc: d1ee bne.n 80065dc <d_print_expr_op+0x58>
- 80065fe: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
- 8006602: bf00 nop
-
-08006604 <d_print_subexpr>:
- 8006604: 7813 ldrb r3, [r2, #0]
- 8006606: 2b01 cmp r3, #1
- 8006608: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
- 800660c: 4604 mov r4, r0
- 800660e: d941 bls.n 8006694 <d_print_subexpr+0x90>
- 8006610: 2b30 cmp r3, #48 ; 0x30
- 8006612: d03f beq.n 8006694 <d_print_subexpr+0x90>
- 8006614: 2b06 cmp r3, #6
- 8006616: d03d beq.n 8006694 <d_print_subexpr+0x90>
- 8006618: f8d0 7100 ldr.w r7, [r0, #256] ; 0x100
- 800661c: 2fff cmp r7, #255 ; 0xff
- 800661e: 460e mov r6, r1
- 8006620: 4615 mov r5, r2
- 8006622: d13e bne.n 80066a2 <d_print_subexpr+0x9e>
- 8006624: f04f 0800 mov.w r8, #0
- 8006628: 4639 mov r1, r7
- 800662a: f8d0 3108 ldr.w r3, [r0, #264] ; 0x108
- 800662e: f8d0 210c ldr.w r2, [r0, #268] ; 0x10c
- 8006632: f880 80ff strb.w r8, [r0, #255] ; 0xff
- 8006636: 4798 blx r3
- 8006638: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 800663c: 3301 adds r3, #1
- 800663e: 4647 mov r7, r8
- 8006640: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8006644: 2201 movs r2, #1
- 8006646: 2328 movs r3, #40 ; 0x28
- 8006648: f8c4 2100 str.w r2, [r4, #256] ; 0x100
- 800664c: 4631 mov r1, r6
- 800664e: 55e3 strb r3, [r4, r7]
- 8006650: 462a mov r2, r5
- 8006652: 4620 mov r0, r4
- 8006654: f884 3104 strb.w r3, [r4, #260] ; 0x104
- 8006658: f7fc facc bl 8002bf4 <d_print_comp>
- 800665c: f8d4 1100 ldr.w r1, [r4, #256] ; 0x100
- 8006660: 29ff cmp r1, #255 ; 0xff
- 8006662: d11c bne.n 800669e <d_print_subexpr+0x9a>
- 8006664: 2500 movs r5, #0
- 8006666: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 800666a: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 800666e: f884 50ff strb.w r5, [r4, #255] ; 0xff
- 8006672: 4620 mov r0, r4
- 8006674: 4798 blx r3
- 8006676: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 800667a: 3301 adds r3, #1
- 800667c: 4629 mov r1, r5
- 800667e: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8006682: 2201 movs r2, #1
- 8006684: 2329 movs r3, #41 ; 0x29
- 8006686: f8c4 2100 str.w r2, [r4, #256] ; 0x100
- 800668a: 5463 strb r3, [r4, r1]
- 800668c: f884 3104 strb.w r3, [r4, #260] ; 0x104
- 8006690: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
- 8006694: 4620 mov r0, r4
- 8006696: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr}
- 800669a: f7fc baab b.w 8002bf4 <d_print_comp>
- 800669e: 1c4a adds r2, r1, #1
- 80066a0: e7f0 b.n 8006684 <d_print_subexpr+0x80>
- 80066a2: 1c7a adds r2, r7, #1
- 80066a4: e7cf b.n 8006646 <d_print_subexpr+0x42>
- 80066a6: bf00 nop
-
-080066a8 <d_maybe_print_fold_expression.isra.20>:
- 80066a8: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
- 80066ac: 6892 ldr r2, [r2, #8]
- 80066ae: 6812 ldr r2, [r2, #0]
- 80066b0: 7816 ldrb r6, [r2, #0]
- 80066b2: 2e66 cmp r6, #102 ; 0x66
- 80066b4: b083 sub sp, #12
- 80066b6: d003 beq.n 80066c0 <d_maybe_print_fold_expression.isra.20+0x18>
- 80066b8: 2000 movs r0, #0
- 80066ba: b003 add sp, #12
- 80066bc: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
- 80066c0: 681b ldr r3, [r3, #0]
- 80066c2: e9d3 8902 ldrd r8, r9, [r3, #8]
- 80066c6: f899 3000 ldrb.w r3, [r9]
- 80066ca: 2b3b cmp r3, #59 ; 0x3b
- 80066cc: f000 8110 beq.w 80068f0 <d_maybe_print_fold_expression.isra.20+0x248>
- 80066d0: 2300 movs r3, #0
- 80066d2: 9301 str r3, [sp, #4]
- 80066d4: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff
- 80066d8: f8d0 7120 ldr.w r7, [r0, #288] ; 0x120
- 80066dc: f8c0 3120 str.w r3, [r0, #288] ; 0x120
- 80066e0: 7853 ldrb r3, [r2, #1]
- 80066e2: 3b4c subs r3, #76 ; 0x4c
- 80066e4: 460d mov r5, r1
- 80066e6: 4604 mov r4, r0
- 80066e8: 2b26 cmp r3, #38 ; 0x26
- 80066ea: d83a bhi.n 8006762 <d_maybe_print_fold_expression.isra.20+0xba>
- 80066ec: e8df f003 tbb [pc, r3]
- 80066f0: 393939b0 .word 0x393939b0
- 80066f4: 39b03939 .word 0x39b03939
- 80066f8: 39393939 .word 0x39393939
- 80066fc: 39393939 .word 0x39393939
- 8006700: 39393939 .word 0x39393939
- 8006704: 39393939 .word 0x39393939
- 8006708: 39393939 .word 0x39393939
- 800670c: 39393939 .word 0x39393939
- 8006710: 39393989 .word 0x39393989
- 8006714: 3939 .short 0x3939
- 8006716: 3f .byte 0x3f
- 8006717: 00 .byte 0x00
- 8006718: 4642 mov r2, r8
- 800671a: 4629 mov r1, r5
- 800671c: 4620 mov r0, r4
- 800671e: f7ff ff31 bl 8006584 <d_print_expr_op>
- 8006722: 9a01 ldr r2, [sp, #4]
- 8006724: 4629 mov r1, r5
- 8006726: 4620 mov r0, r4
- 8006728: f7ff ff6c bl 8006604 <d_print_subexpr>
- 800672c: f8d4 1100 ldr.w r1, [r4, #256] ; 0x100
- 8006730: 29ff cmp r1, #255 ; 0xff
- 8006732: f040 80ea bne.w 800690a <d_maybe_print_fold_expression.isra.20+0x262>
- 8006736: 2500 movs r5, #0
- 8006738: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 800673c: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8006740: f884 50ff strb.w r5, [r4, #255] ; 0xff
- 8006744: 4620 mov r0, r4
- 8006746: 4798 blx r3
- 8006748: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 800674c: 3301 adds r3, #1
- 800674e: 4629 mov r1, r5
- 8006750: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8006754: 2201 movs r2, #1
- 8006756: 2329 movs r3, #41 ; 0x29
- 8006758: f8c4 2100 str.w r2, [r4, #256] ; 0x100
- 800675c: 5463 strb r3, [r4, r1]
- 800675e: f884 3104 strb.w r3, [r4, #260] ; 0x104
- 8006762: 2001 movs r0, #1
- 8006764: f8c4 7120 str.w r7, [r4, #288] ; 0x120
- 8006768: b003 add sp, #12
- 800676a: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
- 800676e: f8d0 1100 ldr.w r1, [r0, #256] ; 0x100
- 8006772: 29ff cmp r1, #255 ; 0xff
- 8006774: f040 80cb bne.w 800690e <d_maybe_print_fold_expression.isra.20+0x266>
- 8006778: 2600 movs r6, #0
- 800677a: f8d0 3108 ldr.w r3, [r0, #264] ; 0x108
- 800677e: f8d0 210c ldr.w r2, [r0, #268] ; 0x10c
- 8006782: f880 60ff strb.w r6, [r0, #255] ; 0xff
- 8006786: 4798 blx r3
- 8006788: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 800678c: 3301 adds r3, #1
- 800678e: 4631 mov r1, r6
- 8006790: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 8006794: 2201 movs r2, #1
- 8006796: 2328 movs r3, #40 ; 0x28
- 8006798: f8c4 2100 str.w r2, [r4, #256] ; 0x100
- 800679c: 4620 mov r0, r4
- 800679e: 5463 strb r3, [r4, r1]
- 80067a0: 464a mov r2, r9
- 80067a2: 4629 mov r1, r5
- 80067a4: f884 3104 strb.w r3, [r4, #260] ; 0x104
- 80067a8: f7ff ff2c bl 8006604 <d_print_subexpr>
- 80067ac: 4629 mov r1, r5
- 80067ae: 4d59 ldr r5, [pc, #356] ; (8006914 <d_maybe_print_fold_expression.isra.20+0x26c>)
- 80067b0: 4642 mov r2, r8
- 80067b2: 4620 mov r0, r4
- 80067b4: f7ff fee6 bl 8006584 <d_print_expr_op>
- 80067b8: 1d2e adds r6, r5, #4
- 80067ba: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 80067be: f04f 0800 mov.w r8, #0
- 80067c2: e015 b.n 80067f0 <d_maybe_print_fold_expression.isra.20+0x148>
- 80067c4: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 80067c8: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 80067cc: f884 80ff strb.w r8, [r4, #255] ; 0xff
- 80067d0: 4798 blx r3
- 80067d2: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 80067d6: 3301 adds r3, #1
- 80067d8: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 80067dc: 2200 movs r2, #0
- 80067de: 2301 movs r3, #1
- 80067e0: 42ae cmp r6, r5
- 80067e2: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 80067e6: f804 9002 strb.w r9, [r4, r2]
- 80067ea: f884 9104 strb.w r9, [r4, #260] ; 0x104
- 80067ee: d0b8 beq.n 8006762 <d_maybe_print_fold_expression.isra.20+0xba>
- 80067f0: 2bff cmp r3, #255 ; 0xff
- 80067f2: 4619 mov r1, r3
- 80067f4: 4620 mov r0, r4
- 80067f6: f815 9b01 ldrb.w r9, [r5], #1
- 80067fa: d0e3 beq.n 80067c4 <d_maybe_print_fold_expression.isra.20+0x11c>
- 80067fc: 461a mov r2, r3
- 80067fe: 3301 adds r3, #1
- 8006800: e7ee b.n 80067e0 <d_maybe_print_fold_expression.isra.20+0x138>
- 8006802: 4e45 ldr r6, [pc, #276] ; (8006918 <d_maybe_print_fold_expression.isra.20+0x270>)
- 8006804: f8d0 3100 ldr.w r3, [r0, #256] ; 0x100
- 8006808: f106 0a04 add.w sl, r6, #4
- 800680c: e017 b.n 800683e <d_maybe_print_fold_expression.isra.20+0x196>
- 800680e: f04f 0300 mov.w r3, #0
- 8006812: f884 30ff strb.w r3, [r4, #255] ; 0xff
- 8006816: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 800681a: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 800681e: 4798 blx r3
- 8006820: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 8006824: 3301 adds r3, #1
- 8006826: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 800682a: 2200 movs r2, #0
- 800682c: 2301 movs r3, #1
- 800682e: 45b2 cmp sl, r6
- 8006830: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 8006834: f804 b002 strb.w fp, [r4, r2]
- 8006838: f884 b104 strb.w fp, [r4, #260] ; 0x104
- 800683c: d05e beq.n 80068fc <d_maybe_print_fold_expression.isra.20+0x254>
- 800683e: 2bff cmp r3, #255 ; 0xff
- 8006840: 4619 mov r1, r3
- 8006842: 4620 mov r0, r4
- 8006844: f816 bb01 ldrb.w fp, [r6], #1
- 8006848: d0e1 beq.n 800680e <d_maybe_print_fold_expression.isra.20+0x166>
- 800684a: 461a mov r2, r3
- 800684c: 3301 adds r3, #1
- 800684e: e7ee b.n 800682e <d_maybe_print_fold_expression.isra.20+0x186>
- 8006850: f8d0 3100 ldr.w r3, [r0, #256] ; 0x100
- 8006854: 2bff cmp r3, #255 ; 0xff
- 8006856: d110 bne.n 800687a <d_maybe_print_fold_expression.isra.20+0x1d2>
- 8006858: 2600 movs r6, #0
- 800685a: 4619 mov r1, r3
- 800685c: f8d0 210c ldr.w r2, [r0, #268] ; 0x10c
- 8006860: f8d0 3108 ldr.w r3, [r0, #264] ; 0x108
- 8006864: f880 60ff strb.w r6, [r0, #255] ; 0xff
- 8006868: 4798 blx r3
- 800686a: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 800686e: f8c4 6100 str.w r6, [r4, #256] ; 0x100
- 8006872: 1c5a adds r2, r3, #1
- 8006874: f8c4 2124 str.w r2, [r4, #292] ; 0x124
- 8006878: 4633 mov r3, r6
- 800687a: 1c59 adds r1, r3, #1
- 800687c: f04f 0c28 mov.w ip, #40 ; 0x28
- 8006880: 464a mov r2, r9
- 8006882: f8c4 1100 str.w r1, [r4, #256] ; 0x100
- 8006886: 4620 mov r0, r4
- 8006888: f804 c003 strb.w ip, [r4, r3]
- 800688c: 4629 mov r1, r5
- 800688e: f884 c104 strb.w ip, [r4, #260] ; 0x104
- 8006892: f8df 9088 ldr.w r9, [pc, #136] ; 800691c <d_maybe_print_fold_expression.isra.20+0x274>
- 8006896: f7ff feb5 bl 8006604 <d_print_subexpr>
- 800689a: 4642 mov r2, r8
- 800689c: 4629 mov r1, r5
- 800689e: 4620 mov r0, r4
- 80068a0: f7ff fe70 bl 8006584 <d_print_expr_op>
- 80068a4: f109 0a03 add.w sl, r9, #3
- 80068a8: f8d4 3100 ldr.w r3, [r4, #256] ; 0x100
- 80068ac: 2600 movs r6, #0
- 80068ae: e016 b.n 80068de <d_maybe_print_fold_expression.isra.20+0x236>
- 80068b0: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 80068b4: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 80068b8: f884 60ff strb.w r6, [r4, #255] ; 0xff
- 80068bc: 4798 blx r3
- 80068be: f8d4 3124 ldr.w r3, [r4, #292] ; 0x124
- 80068c2: 3301 adds r3, #1
- 80068c4: f8c4 3124 str.w r3, [r4, #292] ; 0x124
- 80068c8: 2200 movs r2, #0
- 80068ca: 2301 movs r3, #1
- 80068cc: 45d1 cmp r9, sl
- 80068ce: f8c4 3100 str.w r3, [r4, #256] ; 0x100
- 80068d2: f804 b002 strb.w fp, [r4, r2]
- 80068d6: f884 b104 strb.w fp, [r4, #260] ; 0x104
- 80068da: f43f af1d beq.w 8006718 <d_maybe_print_fold_expression.isra.20+0x70>
- 80068de: 2bff cmp r3, #255 ; 0xff
- 80068e0: 4619 mov r1, r3
- 80068e2: 4620 mov r0, r4
- 80068e4: f819 bb01 ldrb.w fp, [r9], #1
- 80068e8: d0e2 beq.n 80068b0 <d_maybe_print_fold_expression.isra.20+0x208>
- 80068ea: 461a mov r2, r3
- 80068ec: 3301 adds r3, #1
- 80068ee: e7ed b.n 80068cc <d_maybe_print_fold_expression.isra.20+0x224>
- 80068f0: f8d9 300c ldr.w r3, [r9, #12]
- 80068f4: 9301 str r3, [sp, #4]
- 80068f6: f8d9 9008 ldr.w r9, [r9, #8]
- 80068fa: e6eb b.n 80066d4 <d_maybe_print_fold_expression.isra.20+0x2c>
- 80068fc: 4642 mov r2, r8
- 80068fe: 4629 mov r1, r5
- 8006900: 4620 mov r0, r4
- 8006902: f7ff fe3f bl 8006584 <d_print_expr_op>
- 8006906: 464a mov r2, r9
- 8006908: e70c b.n 8006724 <d_maybe_print_fold_expression.isra.20+0x7c>
- 800690a: 1c4a adds r2, r1, #1
- 800690c: e723 b.n 8006756 <d_maybe_print_fold_expression.isra.20+0xae>
- 800690e: 1c4a adds r2, r1, #1
- 8006910: e741 b.n 8006796 <d_maybe_print_fold_expression.isra.20+0xee>
- 8006912: bf00 nop
- 8006914: 080128c0 .word 0x080128c0
- 8006918: 080128b8 .word 0x080128b8
- 800691c: 080127c4 .word 0x080127c4
-
-08006920 <d_demangle_callback.constprop.22>:
- 8006920: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
- 8006924: b0e5 sub sp, #404 ; 0x194
- 8006926: f890 a000 ldrb.w sl, [r0]
- 800692a: f1ba 0f5f cmp.w sl, #95 ; 0x5f
- 800692e: af00 add r7, sp, #0
- 8006930: 4605 mov r5, r0
- 8006932: 4688 mov r8, r1
- 8006934: 4616 mov r6, r2
- 8006936: f000 80f3 beq.w 8006b20 <d_demangle_callback.constprop.22+0x200>
- 800693a: 2208 movs r2, #8
- 800693c: 49bb ldr r1, [pc, #748] ; (8006c2c <d_demangle_callback.constprop.22+0x30c>)
- 800693e: 4628 mov r0, r5
- 8006940: f007 ffac bl 800e89c <strncmp>
- 8006944: b948 cbnz r0, 800695a <d_demangle_callback.constprop.22+0x3a>
- 8006946: 7a2b ldrb r3, [r5, #8]
- 8006948: 2b2e cmp r3, #46 ; 0x2e
- 800694a: f000 80d8 beq.w 8006afe <d_demangle_callback.constprop.22+0x1de>
- 800694e: 2b5f cmp r3, #95 ; 0x5f
- 8006950: f000 80d5 beq.w 8006afe <d_demangle_callback.constprop.22+0x1de>
- 8006954: 2b24 cmp r3, #36 ; 0x24
- 8006956: f000 80d2 beq.w 8006afe <d_demangle_callback.constprop.22+0x1de>
- 800695a: f04f 0900 mov.w r9, #0
- 800695e: 4628 mov r0, r5
- 8006960: f000 fa38 bl 8006dd4 <strlen>
- 8006964: 0142 lsls r2, r0, #5
- 8006966: 0083 lsls r3, r0, #2
- 8006968: 3208 adds r2, #8
- 800696a: 330a adds r3, #10
- 800696c: ebad 0d02 sub.w sp, sp, r2
- 8006970: f023 0307 bic.w r3, r3, #7
- 8006974: 2400 movs r4, #0
- 8006976: 46eb mov fp, sp
- 8006978: 1829 adds r1, r5, r0
- 800697a: ebad 0d03 sub.w sp, sp, r3
- 800697e: 2211 movs r2, #17
- 8006980: 0043 lsls r3, r0, #1
- 8006982: f1b9 0f01 cmp.w r9, #1
- 8006986: f8c7 b01c str.w fp, [r7, #28]
- 800698a: f8c7 d028 str.w sp, [r7, #40] ; 0x28
- 800698e: 60fd str r5, [r7, #12]
- 8006990: 61bd str r5, [r7, #24]
- 8006992: 6338 str r0, [r7, #48] ; 0x30
- 8006994: 6139 str r1, [r7, #16]
- 8006996: 627b str r3, [r7, #36] ; 0x24
- 8006998: 617a str r2, [r7, #20]
- 800699a: 623c str r4, [r7, #32]
- 800699c: 62fc str r4, [r7, #44] ; 0x2c
- 800699e: e9c7 440d strd r4, r4, [r7, #52] ; 0x34
- 80069a2: e9c7 440f strd r4, r4, [r7, #60] ; 0x3c
- 80069a6: 647c str r4, [r7, #68] ; 0x44
- 80069a8: f000 80a0 beq.w 8006aec <d_demangle_callback.constprop.22+0x1cc>
- 80069ac: f0c0 80bf bcc.w 8006b2e <d_demangle_callback.constprop.22+0x20e>
- 80069b0: 7aea ldrb r2, [r5, #11]
- 80069b2: f1b9 0f02 cmp.w r9, #2
- 80069b6: f105 0a0b add.w sl, r5, #11
- 80069ba: bf14 ite ne
- 80069bc: f04f 0944 movne.w r9, #68 ; 0x44
- 80069c0: f04f 0943 moveq.w r9, #67 ; 0x43
- 80069c4: 2a5f cmp r2, #95 ; 0x5f
- 80069c6: f8c7 a018 str.w sl, [r7, #24]
- 80069ca: f000 80b9 beq.w 8006b40 <d_demangle_callback.constprop.22+0x220>
- 80069ce: 4650 mov r0, sl
- 80069d0: 607b str r3, [r7, #4]
- 80069d2: f000 f9ff bl 8006dd4 <strlen>
- 80069d6: 687b ldr r3, [r7, #4]
- 80069d8: 2b00 cmp r3, #0
- 80069da: f340 8123 ble.w 8006c24 <d_demangle_callback.constprop.22+0x304>
- 80069de: 2300 movs r3, #0
- 80069e0: 2201 movs r2, #1
- 80069e2: f8cb 3004 str.w r3, [fp, #4]
- 80069e6: 623a str r2, [r7, #32]
- 80069e8: 2800 cmp r0, #0
- 80069ea: f000 811b beq.w 8006c24 <d_demangle_callback.constprop.22+0x304>
- 80069ee: e9cb a002 strd sl, r0, [fp, #8]
- 80069f2: f88b 3000 strb.w r3, [fp]
- 80069f6: 4649 mov r1, r9
- 80069f8: 2300 movs r3, #0
- 80069fa: 465a mov r2, fp
- 80069fc: f107 000c add.w r0, r7, #12
- 8006a00: f7f9 fc1e bl 8000240 <d_make_comp>
- 8006a04: 69bc ldr r4, [r7, #24]
- 8006a06: 4605 mov r5, r0
- 8006a08: 4620 mov r0, r4
- 8006a0a: f000 f9e3 bl 8006dd4 <strlen>
- 8006a0e: 1823 adds r3, r4, r0
- 8006a10: 61bb str r3, [r7, #24]
- 8006a12: f814 9000 ldrb.w r9, [r4, r0]
- 8006a16: f1b9 0f00 cmp.w r9, #0
- 8006a1a: d16a bne.n 8006af2 <d_demangle_callback.constprop.22+0x1d2>
- 8006a1c: 2d00 cmp r5, #0
- 8006a1e: d068 beq.n 8006af2 <d_demangle_callback.constprop.22+0x1d2>
- 8006a20: f107 0448 add.w r4, r7, #72 ; 0x48
- 8006a24: 462a mov r2, r5
- 8006a26: f507 71be add.w r1, r7, #380 ; 0x17c
- 8006a2a: f507 70c4 add.w r0, r7, #392 ; 0x188
- 8006a2e: f8c4 8108 str.w r8, [r4, #264] ; 0x108
- 8006a32: f8c4 610c str.w r6, [r4, #268] ; 0x10c
- 8006a36: f8c4 9100 str.w r9, [r4, #256] ; 0x100
- 8006a3a: f884 9104 strb.w r9, [r4, #260] ; 0x104
- 8006a3e: f8c4 9110 str.w r9, [r4, #272] ; 0x110
- 8006a42: f8c4 9114 str.w r9, [r4, #276] ; 0x114
- 8006a46: f8c4 9120 str.w r9, [r4, #288] ; 0x120
- 8006a4a: f8c4 9124 str.w r9, [r4, #292] ; 0x124
- 8006a4e: f8c4 9118 str.w r9, [r4, #280] ; 0x118
- 8006a52: f8c4 911c str.w r9, [r4, #284] ; 0x11c
- 8006a56: f8c4 9128 str.w r9, [r4, #296] ; 0x128
- 8006a5a: f8c4 912c str.w r9, [r4, #300] ; 0x12c
- 8006a5e: f8c4 9130 str.w r9, [r4, #304] ; 0x130
- 8006a62: f8c4 9134 str.w r9, [r4, #308] ; 0x134
- 8006a66: f8c4 9138 str.w r9, [r4, #312] ; 0x138
- 8006a6a: f8c4 913c str.w r9, [r4, #316] ; 0x13c
- 8006a6e: f8c4 9140 str.w r9, [r4, #320] ; 0x140
- 8006a72: f7f9 fc49 bl 8000308 <d_count_templates_scopes>
- 8006a76: f8d4 3134 ldr.w r3, [r4, #308] ; 0x134
- 8006a7a: f8d4 6140 ldr.w r6, [r4, #320] ; 0x140
- 8006a7e: f8c4 9144 str.w r9, [r4, #324] ; 0x144
- 8006a82: 2b01 cmp r3, #1
- 8006a84: fb06 f603 mul.w r6, r6, r3
- 8006a88: 461a mov r2, r3
- 8006a8a: bfb8 it lt
- 8006a8c: 2201 movlt r2, #1
- 8006a8e: 00d2 lsls r2, r2, #3
- 8006a90: 2e01 cmp r6, #1
- 8006a92: 4633 mov r3, r6
- 8006a94: f102 0208 add.w r2, r2, #8
- 8006a98: bfb8 it lt
- 8006a9a: 2301 movlt r3, #1
- 8006a9c: 46e8 mov r8, sp
- 8006a9e: 00db lsls r3, r3, #3
- 8006aa0: ebad 0d02 sub.w sp, sp, r2
- 8006aa4: 3308 adds r3, #8
- 8006aa6: 4669 mov r1, sp
- 8006aa8: 462a mov r2, r5
- 8006aaa: ebad 0d03 sub.w sp, sp, r3
- 8006aae: 4620 mov r0, r4
- 8006ab0: f8c4 112c str.w r1, [r4, #300] ; 0x12c
- 8006ab4: 2111 movs r1, #17
- 8006ab6: f8c4 d138 str.w sp, [r4, #312] ; 0x138
- 8006aba: f8c4 6140 str.w r6, [r4, #320] ; 0x140
- 8006abe: f7fc f899 bl 8002bf4 <d_print_comp>
- 8006ac2: f8d4 1100 ldr.w r1, [r4, #256] ; 0x100
- 8006ac6: f8d4 3108 ldr.w r3, [r4, #264] ; 0x108
- 8006aca: f804 9001 strb.w r9, [r4, r1]
- 8006ace: 4620 mov r0, r4
- 8006ad0: 46c5 mov sp, r8
- 8006ad2: f8d4 210c ldr.w r2, [r4, #268] ; 0x10c
- 8006ad6: 4798 blx r3
- 8006ad8: f8d4 0118 ldr.w r0, [r4, #280] ; 0x118
- 8006adc: fab0 f080 clz r0, r0
- 8006ae0: 0940 lsrs r0, r0, #5
- 8006ae2: f507 77ca add.w r7, r7, #404 ; 0x194
- 8006ae6: 46bd mov sp, r7
- 8006ae8: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
- 8006aec: f1ba 0f5f cmp.w sl, #95 ; 0x5f
- 8006af0: d033 beq.n 8006b5a <d_demangle_callback.constprop.22+0x23a>
- 8006af2: 2000 movs r0, #0
- 8006af4: f507 77ca add.w r7, r7, #404 ; 0x194
- 8006af8: 46bd mov sp, r7
- 8006afa: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
- 8006afe: 7a6b ldrb r3, [r5, #9]
- 8006b00: 2b44 cmp r3, #68 ; 0x44
- 8006b02: d002 beq.n 8006b0a <d_demangle_callback.constprop.22+0x1ea>
- 8006b04: 2b49 cmp r3, #73 ; 0x49
- 8006b06: f47f af28 bne.w 800695a <d_demangle_callback.constprop.22+0x3a>
- 8006b0a: 7aaa ldrb r2, [r5, #10]
- 8006b0c: 2a5f cmp r2, #95 ; 0x5f
- 8006b0e: f47f af24 bne.w 800695a <d_demangle_callback.constprop.22+0x3a>
- 8006b12: 2b49 cmp r3, #73 ; 0x49
- 8006b14: bf14 ite ne
- 8006b16: f04f 0903 movne.w r9, #3
- 8006b1a: f04f 0902 moveq.w r9, #2
- 8006b1e: e71e b.n 800695e <d_demangle_callback.constprop.22+0x3e>
- 8006b20: 7843 ldrb r3, [r0, #1]
- 8006b22: 2b5a cmp r3, #90 ; 0x5a
- 8006b24: f47f af09 bne.w 800693a <d_demangle_callback.constprop.22+0x1a>
- 8006b28: f04f 0901 mov.w r9, #1
- 8006b2c: e717 b.n 800695e <d_demangle_callback.constprop.22+0x3e>
- 8006b2e: f107 000c add.w r0, r7, #12
- 8006b32: f7fa fe05 bl 8001740 <d_type>
- 8006b36: 69bb ldr r3, [r7, #24]
- 8006b38: 4605 mov r5, r0
- 8006b3a: f893 9000 ldrb.w r9, [r3]
- 8006b3e: e76a b.n 8006a16 <d_demangle_callback.constprop.22+0xf6>
- 8006b40: 7b2a ldrb r2, [r5, #12]
- 8006b42: 2a5a cmp r2, #90 ; 0x5a
- 8006b44: f47f af43 bne.w 80069ce <d_demangle_callback.constprop.22+0xae>
- 8006b48: 350d adds r5, #13
- 8006b4a: 4621 mov r1, r4
- 8006b4c: f107 000c add.w r0, r7, #12
- 8006b50: 61bd str r5, [r7, #24]
- 8006b52: f7fb fd37 bl 80025c4 <d_encoding>
- 8006b56: 4683 mov fp, r0
- 8006b58: e74d b.n 80069f6 <d_demangle_callback.constprop.22+0xd6>
- 8006b5a: 786b ldrb r3, [r5, #1]
- 8006b5c: 2b5a cmp r3, #90 ; 0x5a
- 8006b5e: d1c8 bne.n 8006af2 <d_demangle_callback.constprop.22+0x1d2>
- 8006b60: 3502 adds r5, #2
- 8006b62: 4649 mov r1, r9
- 8006b64: f107 000c add.w r0, r7, #12
- 8006b68: 61bd str r5, [r7, #24]
- 8006b6a: f7fb fd2b bl 80025c4 <d_encoding>
- 8006b6e: 697b ldr r3, [r7, #20]
- 8006b70: 07db lsls r3, r3, #31
- 8006b72: 4605 mov r5, r0
- 8006b74: d552 bpl.n 8006c1c <d_demangle_callback.constprop.22+0x2fc>
- 8006b76: 69b8 ldr r0, [r7, #24]
- 8006b78: f890 9000 ldrb.w r9, [r0]
- 8006b7c: f1b9 0f2e cmp.w r9, #46 ; 0x2e
- 8006b80: f47f af49 bne.w 8006a16 <d_demangle_callback.constprop.22+0xf6>
- 8006b84: 7843 ldrb r3, [r0, #1]
- 8006b86: f1a3 0261 sub.w r2, r3, #97 ; 0x61
- 8006b8a: 2a19 cmp r2, #25
- 8006b8c: d93a bls.n 8006c04 <d_demangle_callback.constprop.22+0x2e4>
- 8006b8e: 2b5f cmp r3, #95 ; 0x5f
- 8006b90: d038 beq.n 8006c04 <d_demangle_callback.constprop.22+0x2e4>
- 8006b92: 3b30 subs r3, #48 ; 0x30
- 8006b94: 2b09 cmp r3, #9
- 8006b96: d841 bhi.n 8006c1c <d_demangle_callback.constprop.22+0x2fc>
- 8006b98: 7803 ldrb r3, [r0, #0]
- 8006b9a: 4602 mov r2, r0
- 8006b9c: 2b2e cmp r3, #46 ; 0x2e
- 8006b9e: d112 bne.n 8006bc6 <d_demangle_callback.constprop.22+0x2a6>
- 8006ba0: 7853 ldrb r3, [r2, #1]
- 8006ba2: 3b30 subs r3, #48 ; 0x30
- 8006ba4: 2b09 cmp r3, #9
- 8006ba6: d80e bhi.n 8006bc6 <d_demangle_callback.constprop.22+0x2a6>
- 8006ba8: 7893 ldrb r3, [r2, #2]
- 8006baa: f1a3 0130 sub.w r1, r3, #48 ; 0x30
- 8006bae: 2909 cmp r1, #9
- 8006bb0: f102 0202 add.w r2, r2, #2
- 8006bb4: d8f2 bhi.n 8006b9c <d_demangle_callback.constprop.22+0x27c>
- 8006bb6: f812 3f01 ldrb.w r3, [r2, #1]!
- 8006bba: f1a3 0130 sub.w r1, r3, #48 ; 0x30
- 8006bbe: 2909 cmp r1, #9
- 8006bc0: d9f9 bls.n 8006bb6 <d_demangle_callback.constprop.22+0x296>
- 8006bc2: 2b2e cmp r3, #46 ; 0x2e
- 8006bc4: d0ec beq.n 8006ba0 <d_demangle_callback.constprop.22+0x280>
- 8006bc6: e9d7 1308 ldrd r1, r3, [r7, #32]
- 8006bca: 4299 cmp r1, r3
- 8006bcc: 61ba str r2, [r7, #24]
- 8006bce: da17 bge.n 8006c00 <d_demangle_callback.constprop.22+0x2e0>
- 8006bd0: f8d7 e01c ldr.w lr, [r7, #28]
- 8006bd4: ea4f 1c01 mov.w ip, r1, lsl #4
- 8006bd8: eb0e 030c add.w r3, lr, ip
- 8006bdc: 3101 adds r1, #1
- 8006bde: 1a12 subs r2, r2, r0
- 8006be0: 605c str r4, [r3, #4]
- 8006be2: 6239 str r1, [r7, #32]
- 8006be4: d00c beq.n 8006c00 <d_demangle_callback.constprop.22+0x2e0>
- 8006be6: 605c str r4, [r3, #4]
- 8006be8: f80e 400c strb.w r4, [lr, ip]
- 8006bec: e9c3 0202 strd r0, r2, [r3, #8]
- 8006bf0: 462a mov r2, r5
- 8006bf2: 214d movs r1, #77 ; 0x4d
- 8006bf4: f107 000c add.w r0, r7, #12
- 8006bf8: f7f9 fb22 bl 8000240 <d_make_comp>
- 8006bfc: 4605 mov r5, r0
- 8006bfe: e7ba b.n 8006b76 <d_demangle_callback.constprop.22+0x256>
- 8006c00: 2300 movs r3, #0
- 8006c02: e7f5 b.n 8006bf0 <d_demangle_callback.constprop.22+0x2d0>
- 8006c04: 1c81 adds r1, r0, #2
- 8006c06: 460a mov r2, r1
- 8006c08: f811 3b01 ldrb.w r3, [r1], #1
- 8006c0c: f1a3 0c61 sub.w ip, r3, #97 ; 0x61
- 8006c10: f1bc 0f19 cmp.w ip, #25
- 8006c14: d9f7 bls.n 8006c06 <d_demangle_callback.constprop.22+0x2e6>
- 8006c16: 2b5f cmp r3, #95 ; 0x5f
- 8006c18: d0f5 beq.n 8006c06 <d_demangle_callback.constprop.22+0x2e6>
- 8006c1a: e7bf b.n 8006b9c <d_demangle_callback.constprop.22+0x27c>
- 8006c1c: 69bb ldr r3, [r7, #24]
- 8006c1e: f893 9000 ldrb.w r9, [r3]
- 8006c22: e6f8 b.n 8006a16 <d_demangle_callback.constprop.22+0xf6>
- 8006c24: f04f 0b00 mov.w fp, #0
- 8006c28: e6e5 b.n 80069f6 <d_demangle_callback.constprop.22+0xd6>
- 8006c2a: bf00 nop
- 8006c2c: 08012550 .word 0x08012550
-
-08006c30 <__cxa_demangle>:
- 8006c30: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
- 8006c34: b084 sub sp, #16
- 8006c36: b380 cbz r0, 8006c9a <__cxa_demangle+0x6a>
- 8006c38: b101 cbz r1, 8006c3c <__cxa_demangle+0xc>
- 8006c3a: b372 cbz r2, 8006c9a <__cxa_demangle+0x6a>
- 8006c3c: 2400 movs r4, #0
- 8006c3e: 4617 mov r7, r2
- 8006c40: 460e mov r6, r1
- 8006c42: 466a mov r2, sp
- 8006c44: 492b ldr r1, [pc, #172] ; (8006cf4 <__cxa_demangle+0xc4>)
- 8006c46: 461d mov r5, r3
- 8006c48: e9cd 4400 strd r4, r4, [sp]
- 8006c4c: e9cd 4402 strd r4, r4, [sp, #8]
- 8006c50: f7ff fe66 bl 8006920 <d_demangle_callback.constprop.22>
- 8006c54: 2800 cmp r0, #0
- 8006c56: d047 beq.n 8006ce8 <__cxa_demangle+0xb8>
- 8006c58: 9b03 ldr r3, [sp, #12]
- 8006c5a: 9c00 ldr r4, [sp, #0]
- 8006c5c: b9ab cbnz r3, 8006c8a <__cxa_demangle+0x5a>
- 8006c5e: f8dd 8008 ldr.w r8, [sp, #8]
- 8006c62: b36c cbz r4, 8006cc0 <__cxa_demangle+0x90>
- 8006c64: b1b6 cbz r6, 8006c94 <__cxa_demangle+0x64>
- 8006c66: 4620 mov r0, r4
- 8006c68: f000 f8b4 bl 8006dd4 <strlen>
- 8006c6c: 683b ldr r3, [r7, #0]
- 8006c6e: 4298 cmp r0, r3
- 8006c70: d31c bcc.n 8006cac <__cxa_demangle+0x7c>
- 8006c72: 4630 mov r0, r6
- 8006c74: f007 f932 bl 800dedc <free>
- 8006c78: f8c7 8000 str.w r8, [r7]
- 8006c7c: b195 cbz r5, 8006ca4 <__cxa_demangle+0x74>
- 8006c7e: 2300 movs r3, #0
- 8006c80: 4620 mov r0, r4
- 8006c82: 602b str r3, [r5, #0]
- 8006c84: b004 add sp, #16
- 8006c86: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
- 8006c8a: b334 cbz r4, 8006cda <__cxa_demangle+0xaa>
- 8006c8c: f04f 0801 mov.w r8, #1
- 8006c90: 2e00 cmp r6, #0
- 8006c92: d1e8 bne.n 8006c66 <__cxa_demangle+0x36>
- 8006c94: 2f00 cmp r7, #0
- 8006c96: d1ef bne.n 8006c78 <__cxa_demangle+0x48>
- 8006c98: e7f0 b.n 8006c7c <__cxa_demangle+0x4c>
- 8006c9a: b113 cbz r3, 8006ca2 <__cxa_demangle+0x72>
- 8006c9c: f06f 0202 mvn.w r2, #2
- 8006ca0: 601a str r2, [r3, #0]
- 8006ca2: 2400 movs r4, #0
- 8006ca4: 4620 mov r0, r4
- 8006ca6: b004 add sp, #16
- 8006ca8: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
- 8006cac: 1c42 adds r2, r0, #1
- 8006cae: 4621 mov r1, r4
- 8006cb0: 4630 mov r0, r6
- 8006cb2: f007 fb60 bl 800e376 <memcpy>
- 8006cb6: 4620 mov r0, r4
- 8006cb8: f007 f910 bl 800dedc <free>
- 8006cbc: 4634 mov r4, r6
- 8006cbe: e7dd b.n 8006c7c <__cxa_demangle+0x4c>
- 8006cc0: 2d00 cmp r5, #0
- 8006cc2: d0ee beq.n 8006ca2 <__cxa_demangle+0x72>
- 8006cc4: f1b8 0f01 cmp.w r8, #1
- 8006cc8: d009 beq.n 8006cde <__cxa_demangle+0xae>
- 8006cca: 2400 movs r4, #0
- 8006ccc: f06f 0301 mvn.w r3, #1
- 8006cd0: 4620 mov r0, r4
- 8006cd2: 602b str r3, [r5, #0]
- 8006cd4: b004 add sp, #16
- 8006cd6: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
- 8006cda: 2d00 cmp r5, #0
- 8006cdc: d0e1 beq.n 8006ca2 <__cxa_demangle+0x72>
- 8006cde: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff
- 8006ce2: 602b str r3, [r5, #0]
- 8006ce4: 2400 movs r4, #0
- 8006ce6: e7dd b.n 8006ca4 <__cxa_demangle+0x74>
- 8006ce8: 9800 ldr r0, [sp, #0]
- 8006cea: f007 f8f7 bl 800dedc <free>
- 8006cee: 2d00 cmp r5, #0
- 8006cf0: d1eb bne.n 8006cca <__cxa_demangle+0x9a>
- 8006cf2: e7d6 b.n 8006ca2 <__cxa_demangle+0x72>
- 8006cf4: 080008b9 .word 0x080008b9
-
-08006cf8 <__gcclibcxx_demangle_callback>:
- 8006cf8: b160 cbz r0, 8006d14 <__gcclibcxx_demangle_callback+0x1c>
- 8006cfa: b508 push {r3, lr}
- 8006cfc: b139 cbz r1, 8006d0e <__gcclibcxx_demangle_callback+0x16>
- 8006cfe: f7ff fe0f bl 8006920 <d_demangle_callback.constprop.22>
- 8006d02: 2800 cmp r0, #0
- 8006d04: bf0c ite eq
- 8006d06: f06f 0001 mvneq.w r0, #1
- 8006d0a: 2000 movne r0, #0
- 8006d0c: bd08 pop {r3, pc}
- 8006d0e: f06f 0002 mvn.w r0, #2
- 8006d12: bd08 pop {r3, pc}
- 8006d14: f06f 0002 mvn.w r0, #2
- 8006d18: 4770 bx lr
- 8006d1a: bf00 nop
- 8006d1c: 0000 movs r0, r0
- ...
-
-08006d20 <memchr>:
- 8006d20: f001 01ff and.w r1, r1, #255 ; 0xff
- 8006d24: 2a10 cmp r2, #16
- 8006d26: db2b blt.n 8006d80 <memchr+0x60>
- 8006d28: f010 0f07 tst.w r0, #7
- 8006d2c: d008 beq.n 8006d40 <memchr+0x20>
- 8006d2e: f810 3b01 ldrb.w r3, [r0], #1
- 8006d32: 3a01 subs r2, #1
- 8006d34: 428b cmp r3, r1
- 8006d36: d02d beq.n 8006d94 <memchr+0x74>
- 8006d38: f010 0f07 tst.w r0, #7
- 8006d3c: b342 cbz r2, 8006d90 <memchr+0x70>
- 8006d3e: d1f6 bne.n 8006d2e <memchr+0xe>
- 8006d40: b4f0 push {r4, r5, r6, r7}
- 8006d42: ea41 2101 orr.w r1, r1, r1, lsl #8
- 8006d46: ea41 4101 orr.w r1, r1, r1, lsl #16
- 8006d4a: f022 0407 bic.w r4, r2, #7
- 8006d4e: f07f 0700 mvns.w r7, #0
- 8006d52: 2300 movs r3, #0
- 8006d54: e8f0 5602 ldrd r5, r6, [r0], #8
- 8006d58: 3c08 subs r4, #8
- 8006d5a: ea85 0501 eor.w r5, r5, r1
- 8006d5e: ea86 0601 eor.w r6, r6, r1
- 8006d62: fa85 f547 uadd8 r5, r5, r7
- 8006d66: faa3 f587 sel r5, r3, r7
- 8006d6a: fa86 f647 uadd8 r6, r6, r7
- 8006d6e: faa5 f687 sel r6, r5, r7
- 8006d72: b98e cbnz r6, 8006d98 <memchr+0x78>
- 8006d74: d1ee bne.n 8006d54 <memchr+0x34>
- 8006d76: bcf0 pop {r4, r5, r6, r7}
- 8006d78: f001 01ff and.w r1, r1, #255 ; 0xff
- 8006d7c: f002 0207 and.w r2, r2, #7
- 8006d80: b132 cbz r2, 8006d90 <memchr+0x70>
- 8006d82: f810 3b01 ldrb.w r3, [r0], #1
- 8006d86: 3a01 subs r2, #1
- 8006d88: ea83 0301 eor.w r3, r3, r1
- 8006d8c: b113 cbz r3, 8006d94 <memchr+0x74>
- 8006d8e: d1f8 bne.n 8006d82 <memchr+0x62>
- 8006d90: 2000 movs r0, #0
- 8006d92: 4770 bx lr
- 8006d94: 3801 subs r0, #1
- 8006d96: 4770 bx lr
- 8006d98: 2d00 cmp r5, #0
- 8006d9a: bf06 itte eq
- 8006d9c: 4635 moveq r5, r6
- 8006d9e: 3803 subeq r0, #3
- 8006da0: 3807 subne r0, #7
- 8006da2: f015 0f01 tst.w r5, #1
- 8006da6: d107 bne.n 8006db8 <memchr+0x98>
- 8006da8: 3001 adds r0, #1
- 8006daa: f415 7f80 tst.w r5, #256 ; 0x100
- 8006dae: bf02 ittt eq
- 8006db0: 3001 addeq r0, #1
- 8006db2: f415 3fc0 tsteq.w r5, #98304 ; 0x18000
- 8006db6: 3001 addeq r0, #1
- 8006db8: bcf0 pop {r4, r5, r6, r7}
- 8006dba: 3801 subs r0, #1
- 8006dbc: 4770 bx lr
- 8006dbe: bf00 nop
-
-08006dc0 <strcmp>:
- 8006dc0: f810 2b01 ldrb.w r2, [r0], #1
- 8006dc4: f811 3b01 ldrb.w r3, [r1], #1
- 8006dc8: 2a01 cmp r2, #1
- 8006dca: bf28 it cs
- 8006dcc: 429a cmpcs r2, r3
- 8006dce: d0f7 beq.n 8006dc0 <strcmp>
- 8006dd0: 1ad0 subs r0, r2, r3
- 8006dd2: 4770 bx lr
-
-08006dd4 <strlen>:
- 8006dd4: 4603 mov r3, r0
- 8006dd6: f813 2b01 ldrb.w r2, [r3], #1
- 8006dda: 2a00 cmp r2, #0
- 8006ddc: d1fb bne.n 8006dd6 <strlen+0x2>
- 8006dde: 1a18 subs r0, r3, r0
- 8006de0: 3801 subs r0, #1
- 8006de2: 4770 bx lr
-
-08006de4 <__aeabi_uldivmod>:
- 8006de4: b953 cbnz r3, 8006dfc <__aeabi_uldivmod+0x18>
- 8006de6: b94a cbnz r2, 8006dfc <__aeabi_uldivmod+0x18>
- 8006de8: 2900 cmp r1, #0
- 8006dea: bf08 it eq
- 8006dec: 2800 cmpeq r0, #0
- 8006dee: bf1c itt ne
- 8006df0: f04f 31ff movne.w r1, #4294967295 ; 0xffffffff
- 8006df4: f04f 30ff movne.w r0, #4294967295 ; 0xffffffff
- 8006df8: f001 b8f8 b.w 8007fec <__aeabi_idiv0>
- 8006dfc: f1ad 0c08 sub.w ip, sp, #8
- 8006e00: e96d ce04 strd ip, lr, [sp, #-16]!
- 8006e04: f000 f806 bl 8006e14 <__udivmoddi4>
- 8006e08: f8dd e004 ldr.w lr, [sp, #4]
- 8006e0c: e9dd 2302 ldrd r2, r3, [sp, #8]
- 8006e10: b004 add sp, #16
- 8006e12: 4770 bx lr
-
-08006e14 <__udivmoddi4>:
- 8006e14: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
- 8006e18: 9e08 ldr r6, [sp, #32]
- 8006e1a: 4604 mov r4, r0
- 8006e1c: 4688 mov r8, r1
- 8006e1e: 2b00 cmp r3, #0
- 8006e20: d14b bne.n 8006eba <__udivmoddi4+0xa6>
- 8006e22: 428a cmp r2, r1
- 8006e24: 4615 mov r5, r2
- 8006e26: d967 bls.n 8006ef8 <__udivmoddi4+0xe4>
- 8006e28: fab2 f282 clz r2, r2
- 8006e2c: b14a cbz r2, 8006e42 <__udivmoddi4+0x2e>
- 8006e2e: f1c2 0720 rsb r7, r2, #32
- 8006e32: fa01 f302 lsl.w r3, r1, r2
- 8006e36: fa20 f707 lsr.w r7, r0, r7
- 8006e3a: 4095 lsls r5, r2
- 8006e3c: ea47 0803 orr.w r8, r7, r3
- 8006e40: 4094 lsls r4, r2
- 8006e42: ea4f 4e15 mov.w lr, r5, lsr #16
- 8006e46: 0c23 lsrs r3, r4, #16
- 8006e48: fbb8 f7fe udiv r7, r8, lr
- 8006e4c: fa1f fc85 uxth.w ip, r5
- 8006e50: fb0e 8817 mls r8, lr, r7, r8
- 8006e54: ea43 4308 orr.w r3, r3, r8, lsl #16
- 8006e58: fb07 f10c mul.w r1, r7, ip
- 8006e5c: 4299 cmp r1, r3
- 8006e5e: d909 bls.n 8006e74 <__udivmoddi4+0x60>
- 8006e60: 18eb adds r3, r5, r3
- 8006e62: f107 30ff add.w r0, r7, #4294967295 ; 0xffffffff
- 8006e66: f080 811b bcs.w 80070a0 <__udivmoddi4+0x28c>
- 8006e6a: 4299 cmp r1, r3
- 8006e6c: f240 8118 bls.w 80070a0 <__udivmoddi4+0x28c>
- 8006e70: 3f02 subs r7, #2
- 8006e72: 442b add r3, r5
- 8006e74: 1a5b subs r3, r3, r1
- 8006e76: b2a4 uxth r4, r4
- 8006e78: fbb3 f0fe udiv r0, r3, lr
- 8006e7c: fb0e 3310 mls r3, lr, r0, r3
- 8006e80: ea44 4403 orr.w r4, r4, r3, lsl #16
- 8006e84: fb00 fc0c mul.w ip, r0, ip
- 8006e88: 45a4 cmp ip, r4
- 8006e8a: d909 bls.n 8006ea0 <__udivmoddi4+0x8c>
- 8006e8c: 192c adds r4, r5, r4
- 8006e8e: f100 33ff add.w r3, r0, #4294967295 ; 0xffffffff
- 8006e92: f080 8107 bcs.w 80070a4 <__udivmoddi4+0x290>
- 8006e96: 45a4 cmp ip, r4
- 8006e98: f240 8104 bls.w 80070a4 <__udivmoddi4+0x290>
- 8006e9c: 3802 subs r0, #2
- 8006e9e: 442c add r4, r5
- 8006ea0: ea40 4007 orr.w r0, r0, r7, lsl #16
- 8006ea4: eba4 040c sub.w r4, r4, ip
- 8006ea8: 2700 movs r7, #0
- 8006eaa: b11e cbz r6, 8006eb4 <__udivmoddi4+0xa0>
- 8006eac: 40d4 lsrs r4, r2
- 8006eae: 2300 movs r3, #0
- 8006eb0: e9c6 4300 strd r4, r3, [r6]
- 8006eb4: 4639 mov r1, r7
- 8006eb6: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
- 8006eba: 428b cmp r3, r1
- 8006ebc: d909 bls.n 8006ed2 <__udivmoddi4+0xbe>
- 8006ebe: 2e00 cmp r6, #0
- 8006ec0: f000 80eb beq.w 800709a <__udivmoddi4+0x286>
- 8006ec4: 2700 movs r7, #0
- 8006ec6: e9c6 0100 strd r0, r1, [r6]
- 8006eca: 4638 mov r0, r7
- 8006ecc: 4639 mov r1, r7
- 8006ece: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
- 8006ed2: fab3 f783 clz r7, r3
- 8006ed6: 2f00 cmp r7, #0
- 8006ed8: d147 bne.n 8006f6a <__udivmoddi4+0x156>
- 8006eda: 428b cmp r3, r1
- 8006edc: d302 bcc.n 8006ee4 <__udivmoddi4+0xd0>
- 8006ede: 4282 cmp r2, r0
- 8006ee0: f200 80fa bhi.w 80070d8 <__udivmoddi4+0x2c4>
- 8006ee4: 1a84 subs r4, r0, r2
- 8006ee6: eb61 0303 sbc.w r3, r1, r3
- 8006eea: 2001 movs r0, #1
- 8006eec: 4698 mov r8, r3
- 8006eee: 2e00 cmp r6, #0
- 8006ef0: d0e0 beq.n 8006eb4 <__udivmoddi4+0xa0>
- 8006ef2: e9c6 4800 strd r4, r8, [r6]
- 8006ef6: e7dd b.n 8006eb4 <__udivmoddi4+0xa0>
- 8006ef8: b902 cbnz r2, 8006efc <__udivmoddi4+0xe8>
- 8006efa: deff udf #255 ; 0xff
- 8006efc: fab2 f282 clz r2, r2
- 8006f00: 2a00 cmp r2, #0
- 8006f02: f040 808f bne.w 8007024 <__udivmoddi4+0x210>
- 8006f06: 1b49 subs r1, r1, r5
- 8006f08: ea4f 4e15 mov.w lr, r5, lsr #16
- 8006f0c: fa1f f885 uxth.w r8, r5
- 8006f10: 2701 movs r7, #1
- 8006f12: fbb1 fcfe udiv ip, r1, lr
- 8006f16: 0c23 lsrs r3, r4, #16
- 8006f18: fb0e 111c mls r1, lr, ip, r1
- 8006f1c: ea43 4301 orr.w r3, r3, r1, lsl #16
- 8006f20: fb08 f10c mul.w r1, r8, ip
- 8006f24: 4299 cmp r1, r3
- 8006f26: d907 bls.n 8006f38 <__udivmoddi4+0x124>
- 8006f28: 18eb adds r3, r5, r3
- 8006f2a: f10c 30ff add.w r0, ip, #4294967295 ; 0xffffffff
- 8006f2e: d202 bcs.n 8006f36 <__udivmoddi4+0x122>
- 8006f30: 4299 cmp r1, r3
- 8006f32: f200 80cd bhi.w 80070d0 <__udivmoddi4+0x2bc>
- 8006f36: 4684 mov ip, r0
- 8006f38: 1a59 subs r1, r3, r1
- 8006f3a: b2a3 uxth r3, r4
- 8006f3c: fbb1 f0fe udiv r0, r1, lr
- 8006f40: fb0e 1410 mls r4, lr, r0, r1
- 8006f44: ea43 4404 orr.w r4, r3, r4, lsl #16
- 8006f48: fb08 f800 mul.w r8, r8, r0
- 8006f4c: 45a0 cmp r8, r4
- 8006f4e: d907 bls.n 8006f60 <__udivmoddi4+0x14c>
- 8006f50: 192c adds r4, r5, r4
- 8006f52: f100 33ff add.w r3, r0, #4294967295 ; 0xffffffff
- 8006f56: d202 bcs.n 8006f5e <__udivmoddi4+0x14a>
- 8006f58: 45a0 cmp r8, r4
- 8006f5a: f200 80b6 bhi.w 80070ca <__udivmoddi4+0x2b6>
- 8006f5e: 4618 mov r0, r3
- 8006f60: eba4 0408 sub.w r4, r4, r8
- 8006f64: ea40 400c orr.w r0, r0, ip, lsl #16
- 8006f68: e79f b.n 8006eaa <__udivmoddi4+0x96>
- 8006f6a: f1c7 0c20 rsb ip, r7, #32
- 8006f6e: 40bb lsls r3, r7
- 8006f70: fa22 fe0c lsr.w lr, r2, ip
- 8006f74: ea4e 0e03 orr.w lr, lr, r3
- 8006f78: fa01 f407 lsl.w r4, r1, r7
- 8006f7c: fa20 f50c lsr.w r5, r0, ip
- 8006f80: fa21 f30c lsr.w r3, r1, ip
- 8006f84: ea4f 481e mov.w r8, lr, lsr #16
- 8006f88: 4325 orrs r5, r4
- 8006f8a: fbb3 f9f8 udiv r9, r3, r8
- 8006f8e: 0c2c lsrs r4, r5, #16
- 8006f90: fb08 3319 mls r3, r8, r9, r3
- 8006f94: fa1f fa8e uxth.w sl, lr
- 8006f98: ea44 4303 orr.w r3, r4, r3, lsl #16
- 8006f9c: fb09 f40a mul.w r4, r9, sl
- 8006fa0: 429c cmp r4, r3
- 8006fa2: fa02 f207 lsl.w r2, r2, r7
- 8006fa6: fa00 f107 lsl.w r1, r0, r7
- 8006faa: d90b bls.n 8006fc4 <__udivmoddi4+0x1b0>
- 8006fac: eb1e 0303 adds.w r3, lr, r3
- 8006fb0: f109 30ff add.w r0, r9, #4294967295 ; 0xffffffff
- 8006fb4: f080 8087 bcs.w 80070c6 <__udivmoddi4+0x2b2>
- 8006fb8: 429c cmp r4, r3
- 8006fba: f240 8084 bls.w 80070c6 <__udivmoddi4+0x2b2>
- 8006fbe: f1a9 0902 sub.w r9, r9, #2
- 8006fc2: 4473 add r3, lr
- 8006fc4: 1b1b subs r3, r3, r4
- 8006fc6: b2ad uxth r5, r5
- 8006fc8: fbb3 f0f8 udiv r0, r3, r8
- 8006fcc: fb08 3310 mls r3, r8, r0, r3
- 8006fd0: ea45 4403 orr.w r4, r5, r3, lsl #16
- 8006fd4: fb00 fa0a mul.w sl, r0, sl
- 8006fd8: 45a2 cmp sl, r4
- 8006fda: d908 bls.n 8006fee <__udivmoddi4+0x1da>
- 8006fdc: eb1e 0404 adds.w r4, lr, r4
- 8006fe0: f100 33ff add.w r3, r0, #4294967295 ; 0xffffffff
- 8006fe4: d26b bcs.n 80070be <__udivmoddi4+0x2aa>
- 8006fe6: 45a2 cmp sl, r4
- 8006fe8: d969 bls.n 80070be <__udivmoddi4+0x2aa>
- 8006fea: 3802 subs r0, #2
- 8006fec: 4474 add r4, lr
- 8006fee: ea40 4009 orr.w r0, r0, r9, lsl #16
- 8006ff2: fba0 8902 umull r8, r9, r0, r2
- 8006ff6: eba4 040a sub.w r4, r4, sl
- 8006ffa: 454c cmp r4, r9
- 8006ffc: 46c2 mov sl, r8
- 8006ffe: 464b mov r3, r9
- 8007000: d354 bcc.n 80070ac <__udivmoddi4+0x298>
- 8007002: d051 beq.n 80070a8 <__udivmoddi4+0x294>
- 8007004: 2e00 cmp r6, #0
- 8007006: d069 beq.n 80070dc <__udivmoddi4+0x2c8>
- 8007008: ebb1 050a subs.w r5, r1, sl
- 800700c: eb64 0403 sbc.w r4, r4, r3
- 8007010: fa04 fc0c lsl.w ip, r4, ip
- 8007014: 40fd lsrs r5, r7
- 8007016: 40fc lsrs r4, r7
- 8007018: ea4c 0505 orr.w r5, ip, r5
- 800701c: e9c6 5400 strd r5, r4, [r6]
- 8007020: 2700 movs r7, #0
- 8007022: e747 b.n 8006eb4 <__udivmoddi4+0xa0>
- 8007024: f1c2 0320 rsb r3, r2, #32
- 8007028: fa20 f703 lsr.w r7, r0, r3
- 800702c: 4095 lsls r5, r2
- 800702e: fa01 f002 lsl.w r0, r1, r2
- 8007032: fa21 f303 lsr.w r3, r1, r3
- 8007036: ea4f 4e15 mov.w lr, r5, lsr #16
- 800703a: 4338 orrs r0, r7
- 800703c: 0c01 lsrs r1, r0, #16
- 800703e: fbb3 f7fe udiv r7, r3, lr
- 8007042: fa1f f885 uxth.w r8, r5
- 8007046: fb0e 3317 mls r3, lr, r7, r3
- 800704a: ea41 4103 orr.w r1, r1, r3, lsl #16
- 800704e: fb07 f308 mul.w r3, r7, r8
- 8007052: 428b cmp r3, r1
- 8007054: fa04 f402 lsl.w r4, r4, r2
- 8007058: d907 bls.n 800706a <__udivmoddi4+0x256>
- 800705a: 1869 adds r1, r5, r1
- 800705c: f107 3cff add.w ip, r7, #4294967295 ; 0xffffffff
- 8007060: d22f bcs.n 80070c2 <__udivmoddi4+0x2ae>
- 8007062: 428b cmp r3, r1
- 8007064: d92d bls.n 80070c2 <__udivmoddi4+0x2ae>
- 8007066: 3f02 subs r7, #2
- 8007068: 4429 add r1, r5
- 800706a: 1acb subs r3, r1, r3
- 800706c: b281 uxth r1, r0
- 800706e: fbb3 f0fe udiv r0, r3, lr
- 8007072: fb0e 3310 mls r3, lr, r0, r3
- 8007076: ea41 4103 orr.w r1, r1, r3, lsl #16
- 800707a: fb00 f308 mul.w r3, r0, r8
- 800707e: 428b cmp r3, r1
- 8007080: d907 bls.n 8007092 <__udivmoddi4+0x27e>
- 8007082: 1869 adds r1, r5, r1
- 8007084: f100 3cff add.w ip, r0, #4294967295 ; 0xffffffff
- 8007088: d217 bcs.n 80070ba <__udivmoddi4+0x2a6>
- 800708a: 428b cmp r3, r1
- 800708c: d915 bls.n 80070ba <__udivmoddi4+0x2a6>
- 800708e: 3802 subs r0, #2
- 8007090: 4429 add r1, r5
- 8007092: 1ac9 subs r1, r1, r3
- 8007094: ea40 4707 orr.w r7, r0, r7, lsl #16
- 8007098: e73b b.n 8006f12 <__udivmoddi4+0xfe>
- 800709a: 4637 mov r7, r6
- 800709c: 4630 mov r0, r6
- 800709e: e709 b.n 8006eb4 <__udivmoddi4+0xa0>
- 80070a0: 4607 mov r7, r0
- 80070a2: e6e7 b.n 8006e74 <__udivmoddi4+0x60>
- 80070a4: 4618 mov r0, r3
- 80070a6: e6fb b.n 8006ea0 <__udivmoddi4+0x8c>
- 80070a8: 4541 cmp r1, r8
- 80070aa: d2ab bcs.n 8007004 <__udivmoddi4+0x1f0>
- 80070ac: ebb8 0a02 subs.w sl, r8, r2
- 80070b0: eb69 020e sbc.w r2, r9, lr
- 80070b4: 3801 subs r0, #1
- 80070b6: 4613 mov r3, r2
- 80070b8: e7a4 b.n 8007004 <__udivmoddi4+0x1f0>
- 80070ba: 4660 mov r0, ip
- 80070bc: e7e9 b.n 8007092 <__udivmoddi4+0x27e>
- 80070be: 4618 mov r0, r3
- 80070c0: e795 b.n 8006fee <__udivmoddi4+0x1da>
- 80070c2: 4667 mov r7, ip
- 80070c4: e7d1 b.n 800706a <__udivmoddi4+0x256>
- 80070c6: 4681 mov r9, r0
- 80070c8: e77c b.n 8006fc4 <__udivmoddi4+0x1b0>
- 80070ca: 3802 subs r0, #2
- 80070cc: 442c add r4, r5
- 80070ce: e747 b.n 8006f60 <__udivmoddi4+0x14c>
- 80070d0: f1ac 0c02 sub.w ip, ip, #2
- 80070d4: 442b add r3, r5
- 80070d6: e72f b.n 8006f38 <__udivmoddi4+0x124>
- 80070d8: 4638 mov r0, r7
- 80070da: e708 b.n 8006eee <__udivmoddi4+0xda>
- 80070dc: 4637 mov r7, r6
- 80070de: e6e9 b.n 8006eb4 <__udivmoddi4+0xa0>
-
-080070e0 <selfrel_offset31>:
- 80070e0: 6803 ldr r3, [r0, #0]
- 80070e2: 005a lsls r2, r3, #1
- 80070e4: bf4c ite mi
- 80070e6: f043 4300 orrmi.w r3, r3, #2147483648 ; 0x80000000
- 80070ea: f023 4300 bicpl.w r3, r3, #2147483648 ; 0x80000000
- 80070ee: 4418 add r0, r3
- 80070f0: 4770 bx lr
- 80070f2: bf00 nop
-
-080070f4 <search_EIT_table>:
- 80070f4: b361 cbz r1, 8007150 <search_EIT_table+0x5c>
- 80070f6: e92d 4ff8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
- 80070fa: f101 3aff add.w sl, r1, #4294967295 ; 0xffffffff
- 80070fe: 4690 mov r8, r2
- 8007100: 4606 mov r6, r0
- 8007102: 46d1 mov r9, sl
- 8007104: 2700 movs r7, #0
- 8007106: eb07 0409 add.w r4, r7, r9
- 800710a: eb04 74d4 add.w r4, r4, r4, lsr #31
- 800710e: 1064 asrs r4, r4, #1
- 8007110: 00e5 lsls r5, r4, #3
- 8007112: 1971 adds r1, r6, r5
- 8007114: 4608 mov r0, r1
- 8007116: f7ff ffe3 bl 80070e0 <selfrel_offset31>
- 800711a: 45a2 cmp sl, r4
- 800711c: 4683 mov fp, r0
- 800711e: f105 0008 add.w r0, r5, #8
- 8007122: 4430 add r0, r6
- 8007124: d009 beq.n 800713a <search_EIT_table+0x46>
- 8007126: f7ff ffdb bl 80070e0 <selfrel_offset31>
- 800712a: 45c3 cmp fp, r8
- 800712c: f100 30ff add.w r0, r0, #4294967295 ; 0xffffffff
- 8007130: d805 bhi.n 800713e <search_EIT_table+0x4a>
- 8007132: 4540 cmp r0, r8
- 8007134: d209 bcs.n 800714a <search_EIT_table+0x56>
- 8007136: 1c67 adds r7, r4, #1
- 8007138: e7e5 b.n 8007106 <search_EIT_table+0x12>
- 800713a: 45c3 cmp fp, r8
- 800713c: d905 bls.n 800714a <search_EIT_table+0x56>
- 800713e: 42a7 cmp r7, r4
- 8007140: d002 beq.n 8007148 <search_EIT_table+0x54>
- 8007142: f104 39ff add.w r9, r4, #4294967295 ; 0xffffffff
- 8007146: e7de b.n 8007106 <search_EIT_table+0x12>
- 8007148: 2100 movs r1, #0
- 800714a: 4608 mov r0, r1
- 800714c: e8bd 8ff8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
- 8007150: 4608 mov r0, r1
- 8007152: 4770 bx lr
-
-08007154 <__gnu_unwind_get_pr_addr>:
- 8007154: 2801 cmp r0, #1
- 8007156: d007 beq.n 8007168 <__gnu_unwind_get_pr_addr+0x14>
- 8007158: 2802 cmp r0, #2
- 800715a: d007 beq.n 800716c <__gnu_unwind_get_pr_addr+0x18>
- 800715c: 4b04 ldr r3, [pc, #16] ; (8007170 <__gnu_unwind_get_pr_addr+0x1c>)
- 800715e: 2800 cmp r0, #0
- 8007160: bf0c ite eq
- 8007162: 4618 moveq r0, r3
- 8007164: 2000 movne r0, #0
- 8007166: 4770 bx lr
- 8007168: 4802 ldr r0, [pc, #8] ; (8007174 <__gnu_unwind_get_pr_addr+0x20>)
- 800716a: 4770 bx lr
- 800716c: 4802 ldr r0, [pc, #8] ; (8007178 <__gnu_unwind_get_pr_addr+0x24>)
- 800716e: 4770 bx lr
- 8007170: 08007841 .word 0x08007841
- 8007174: 08007845 .word 0x08007845
- 8007178: 08007849 .word 0x08007849
-
-0800717c <get_eit_entry>:
- 800717c: b530 push {r4, r5, lr}
- 800717e: 4b25 ldr r3, [pc, #148] ; (8007214 <get_eit_entry+0x98>)
- 8007180: b083 sub sp, #12
- 8007182: 4604 mov r4, r0
- 8007184: 1e8d subs r5, r1, #2
- 8007186: b34b cbz r3, 80071dc <get_eit_entry+0x60>
- 8007188: a901 add r1, sp, #4
- 800718a: 4628 mov r0, r5
- 800718c: f3af 8000 nop.w
- 8007190: b1f0 cbz r0, 80071d0 <get_eit_entry+0x54>
- 8007192: 9901 ldr r1, [sp, #4]
- 8007194: 462a mov r2, r5
- 8007196: f7ff ffad bl 80070f4 <search_EIT_table>
- 800719a: 4601 mov r1, r0
- 800719c: b1c0 cbz r0, 80071d0 <get_eit_entry+0x54>
- 800719e: f7ff ff9f bl 80070e0 <selfrel_offset31>
- 80071a2: 684b ldr r3, [r1, #4]
- 80071a4: 64a0 str r0, [r4, #72] ; 0x48
- 80071a6: 2b01 cmp r3, #1
- 80071a8: d02e beq.n 8007208 <get_eit_entry+0x8c>
- 80071aa: 2b00 cmp r3, #0
- 80071ac: f101 0004 add.w r0, r1, #4
- 80071b0: db26 blt.n 8007200 <get_eit_entry+0x84>
- 80071b2: f7ff ff95 bl 80070e0 <selfrel_offset31>
- 80071b6: 2300 movs r3, #0
- 80071b8: e9c4 0313 strd r0, r3, [r4, #76] ; 0x4c
- 80071bc: 6803 ldr r3, [r0, #0]
- 80071be: 2b00 cmp r3, #0
- 80071c0: db12 blt.n 80071e8 <get_eit_entry+0x6c>
- 80071c2: f7ff ff8d bl 80070e0 <selfrel_offset31>
- 80071c6: 2300 movs r3, #0
- 80071c8: 6120 str r0, [r4, #16]
- 80071ca: 4618 mov r0, r3
- 80071cc: b003 add sp, #12
- 80071ce: bd30 pop {r4, r5, pc}
- 80071d0: 2300 movs r3, #0
- 80071d2: 6123 str r3, [r4, #16]
- 80071d4: 2309 movs r3, #9
- 80071d6: 4618 mov r0, r3
- 80071d8: b003 add sp, #12
- 80071da: bd30 pop {r4, r5, pc}
- 80071dc: 490e ldr r1, [pc, #56] ; (8007218 <get_eit_entry+0x9c>)
- 80071de: 480f ldr r0, [pc, #60] ; (800721c <get_eit_entry+0xa0>)
- 80071e0: 1a09 subs r1, r1, r0
- 80071e2: 10c9 asrs r1, r1, #3
- 80071e4: 9101 str r1, [sp, #4]
- 80071e6: e7d5 b.n 8007194 <get_eit_entry+0x18>
- 80071e8: f3c3 6003 ubfx r0, r3, #24, #4
- 80071ec: f7ff ffb2 bl 8007154 <__gnu_unwind_get_pr_addr>
- 80071f0: 2800 cmp r0, #0
- 80071f2: bf14 ite ne
- 80071f4: 2300 movne r3, #0
- 80071f6: 2309 moveq r3, #9
- 80071f8: 6120 str r0, [r4, #16]
- 80071fa: 4618 mov r0, r3
- 80071fc: b003 add sp, #12
- 80071fe: bd30 pop {r4, r5, pc}
- 8007200: 2301 movs r3, #1
- 8007202: e9c4 0313 strd r0, r3, [r4, #76] ; 0x4c
- 8007206: e7d9 b.n 80071bc <get_eit_entry+0x40>
- 8007208: 2300 movs r3, #0
- 800720a: 6123 str r3, [r4, #16]
- 800720c: 2305 movs r3, #5
- 800720e: 4618 mov r0, r3
- 8007210: b003 add sp, #12
- 8007212: bd30 pop {r4, r5, pc}
- 8007214: 00000000 .word 0x00000000
- 8007218: 08013328 .word 0x08013328
- 800721c: 080131a0 .word 0x080131a0
-
-08007220 <restore_non_core_regs>:
- 8007220: 6803 ldr r3, [r0, #0]
- 8007222: 07da lsls r2, r3, #31
- 8007224: b510 push {r4, lr}
- 8007226: 4604 mov r4, r0
- 8007228: d406 bmi.n 8007238 <restore_non_core_regs+0x18>
- 800722a: 079b lsls r3, r3, #30
- 800722c: f100 0048 add.w r0, r0, #72 ; 0x48
- 8007230: d509 bpl.n 8007246 <restore_non_core_regs+0x26>
- 8007232: f000 fc5f bl 8007af4 <__gnu_Unwind_Restore_VFP_D>
- 8007236: 6823 ldr r3, [r4, #0]
- 8007238: 0759 lsls r1, r3, #29
- 800723a: d509 bpl.n 8007250 <restore_non_core_regs+0x30>
- 800723c: 071a lsls r2, r3, #28
- 800723e: d50e bpl.n 800725e <restore_non_core_regs+0x3e>
- 8007240: 06db lsls r3, r3, #27
- 8007242: d513 bpl.n 800726c <restore_non_core_regs+0x4c>
- 8007244: bd10 pop {r4, pc}
- 8007246: f000 fc4d bl 8007ae4 <__gnu_Unwind_Restore_VFP>
- 800724a: 6823 ldr r3, [r4, #0]
- 800724c: 0759 lsls r1, r3, #29
- 800724e: d4f5 bmi.n 800723c <restore_non_core_regs+0x1c>
- 8007250: f104 00d0 add.w r0, r4, #208 ; 0xd0
- 8007254: f000 fc56 bl 8007b04 <__gnu_Unwind_Restore_VFP_D_16_to_31>
- 8007258: 6823 ldr r3, [r4, #0]
- 800725a: 071a lsls r2, r3, #28
- 800725c: d4f0 bmi.n 8007240 <restore_non_core_regs+0x20>
- 800725e: f504 70a8 add.w r0, r4, #336 ; 0x150
- 8007262: f000 fc57 bl 8007b14 <__gnu_Unwind_Restore_WMMXD>
- 8007266: 6823 ldr r3, [r4, #0]
- 8007268: 06db lsls r3, r3, #27
- 800726a: d4eb bmi.n 8007244 <restore_non_core_regs+0x24>
- 800726c: f504 70e8 add.w r0, r4, #464 ; 0x1d0
- 8007270: e8bd 4010 ldmia.w sp!, {r4, lr}
- 8007274: f000 bc92 b.w 8007b9c <__gnu_Unwind_Restore_WMMXC>
-
-08007278 <_Unwind_decode_typeinfo_ptr.isra.0>:
- 8007278: 6803 ldr r3, [r0, #0]
- 800727a: b103 cbz r3, 800727e <_Unwind_decode_typeinfo_ptr.isra.0+0x6>
- 800727c: 4403 add r3, r0
- 800727e: 4618 mov r0, r3
- 8007280: 4770 bx lr
- 8007282: bf00 nop
-
-08007284 <__gnu_unwind_24bit.isra.1>:
- 8007284: 2009 movs r0, #9
- 8007286: 4770 bx lr
-
-08007288 <_Unwind_DebugHook>:
- 8007288: 4770 bx lr
- 800728a: bf00 nop
-
-0800728c <unwind_phase2>:
- 800728c: b570 push {r4, r5, r6, lr}
- 800728e: 4604 mov r4, r0
- 8007290: 460d mov r5, r1
- 8007292: e008 b.n 80072a6 <unwind_phase2+0x1a>
- 8007294: 6c2b ldr r3, [r5, #64] ; 0x40
- 8007296: 6163 str r3, [r4, #20]
- 8007298: 462a mov r2, r5
- 800729a: 6923 ldr r3, [r4, #16]
- 800729c: 4621 mov r1, r4
- 800729e: 2001 movs r0, #1
- 80072a0: 4798 blx r3
- 80072a2: 2808 cmp r0, #8
- 80072a4: d108 bne.n 80072b8 <unwind_phase2+0x2c>
- 80072a6: 6c29 ldr r1, [r5, #64] ; 0x40
- 80072a8: 4620 mov r0, r4
- 80072aa: f7ff ff67 bl 800717c <get_eit_entry>
- 80072ae: 4606 mov r6, r0
- 80072b0: 2800 cmp r0, #0
- 80072b2: d0ef beq.n 8007294 <unwind_phase2+0x8>
- 80072b4: f006 fbc0 bl 800da38 <abort>
- 80072b8: 2807 cmp r0, #7
- 80072ba: d1fb bne.n 80072b4 <unwind_phase2+0x28>
- 80072bc: 4630 mov r0, r6
- 80072be: 6c29 ldr r1, [r5, #64] ; 0x40
- 80072c0: f7ff ffe2 bl 8007288 <_Unwind_DebugHook>
- 80072c4: 1d28 adds r0, r5, #4
- 80072c6: f000 fc01 bl 8007acc <__restore_core_regs>
- 80072ca: bf00 nop
-
-080072cc <unwind_phase2_forced>:
- 80072cc: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
- 80072d0: 1d0c adds r4, r1, #4
- 80072d2: 4605 mov r5, r0
- 80072d4: 4617 mov r7, r2
- 80072d6: cc0f ldmia r4!, {r0, r1, r2, r3}
- 80072d8: f5ad 7d72 sub.w sp, sp, #968 ; 0x3c8
- 80072dc: ae03 add r6, sp, #12
- 80072de: c60f stmia r6!, {r0, r1, r2, r3}
- 80072e0: cc0f ldmia r4!, {r0, r1, r2, r3}
- 80072e2: c60f stmia r6!, {r0, r1, r2, r3}
- 80072e4: cc0f ldmia r4!, {r0, r1, r2, r3}
- 80072e6: c60f stmia r6!, {r0, r1, r2, r3}
- 80072e8: e894 000f ldmia.w r4, {r0, r1, r2, r3}
- 80072ec: ac02 add r4, sp, #8
- 80072ee: f8d5 800c ldr.w r8, [r5, #12]
- 80072f2: f8d5 9018 ldr.w r9, [r5, #24]
- 80072f6: e886 000f stmia.w r6, {r0, r1, r2, r3}
- 80072fa: 2300 movs r3, #0
- 80072fc: 6023 str r3, [r4, #0]
- 80072fe: e021 b.n 8007344 <unwind_phase2_forced+0x78>
- 8007300: 6c23 ldr r3, [r4, #64] ; 0x40
- 8007302: 616b str r3, [r5, #20]
- 8007304: f44f 72f0 mov.w r2, #480 ; 0x1e0
- 8007308: 4621 mov r1, r4
- 800730a: a87a add r0, sp, #488 ; 0x1e8
- 800730c: f007 f833 bl 800e376 <memcpy>
- 8007310: 692b ldr r3, [r5, #16]
- 8007312: aa7a add r2, sp, #488 ; 0x1e8
- 8007314: 4629 mov r1, r5
- 8007316: 4630 mov r0, r6
- 8007318: 4798 blx r3
- 800731a: 9b88 ldr r3, [sp, #544] ; 0x220
- 800731c: e9cd 4900 strd r4, r9, [sp]
- 8007320: 4682 mov sl, r0
- 8007322: 6463 str r3, [r4, #68] ; 0x44
- 8007324: 4631 mov r1, r6
- 8007326: 462b mov r3, r5
- 8007328: 462a mov r2, r5
- 800732a: 2001 movs r0, #1
- 800732c: 47c0 blx r8
- 800732e: 4607 mov r7, r0
- 8007330: b9f8 cbnz r0, 8007372 <unwind_phase2_forced+0xa6>
- 8007332: f44f 72f0 mov.w r2, #480 ; 0x1e0
- 8007336: a97a add r1, sp, #488 ; 0x1e8
- 8007338: 4620 mov r0, r4
- 800733a: f007 f81c bl 800e376 <memcpy>
- 800733e: f1ba 0f08 cmp.w sl, #8
- 8007342: d11c bne.n 800737e <unwind_phase2_forced+0xb2>
- 8007344: 6c21 ldr r1, [r4, #64] ; 0x40
- 8007346: 4628 mov r0, r5
- 8007348: f7ff ff18 bl 800717c <get_eit_entry>
- 800734c: 2f00 cmp r7, #0
- 800734e: bf08 it eq
- 8007350: 2609 moveq r6, #9
- 8007352: 4607 mov r7, r0
- 8007354: bf18 it ne
- 8007356: 260a movne r6, #10
- 8007358: 2800 cmp r0, #0
- 800735a: d0d1 beq.n 8007300 <unwind_phase2_forced+0x34>
- 800735c: 6ba3 ldr r3, [r4, #56] ; 0x38
- 800735e: f046 0110 orr.w r1, r6, #16
- 8007362: e9cd 4900 strd r4, r9, [sp]
- 8007366: 462a mov r2, r5
- 8007368: 6463 str r3, [r4, #68] ; 0x44
- 800736a: 2001 movs r0, #1
- 800736c: 462b mov r3, r5
- 800736e: 47c0 blx r8
- 8007370: b100 cbz r0, 8007374 <unwind_phase2_forced+0xa8>
- 8007372: 2709 movs r7, #9
- 8007374: 4638 mov r0, r7
- 8007376: f50d 7d72 add.w sp, sp, #968 ; 0x3c8
- 800737a: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
- 800737e: f1ba 0f07 cmp.w sl, #7
- 8007382: d1f6 bne.n 8007372 <unwind_phase2_forced+0xa6>
- 8007384: 4638 mov r0, r7
- 8007386: 6c21 ldr r1, [r4, #64] ; 0x40
- 8007388: f7ff ff7e bl 8007288 <_Unwind_DebugHook>
- 800738c: a803 add r0, sp, #12
- 800738e: f000 fb9d bl 8007acc <__restore_core_regs>
- 8007392: bf00 nop
-
-08007394 <_Unwind_GetCFA>:
- 8007394: 6c40 ldr r0, [r0, #68] ; 0x44
- 8007396: 4770 bx lr
-
-08007398 <__gnu_Unwind_RaiseException>:
- 8007398: b5f0 push {r4, r5, r6, r7, lr}
- 800739a: 6bcb ldr r3, [r1, #60] ; 0x3c
- 800739c: 640b str r3, [r1, #64] ; 0x40
- 800739e: 1d0d adds r5, r1, #4
- 80073a0: 460f mov r7, r1
- 80073a2: 4606 mov r6, r0
- 80073a4: cd0f ldmia r5!, {r0, r1, r2, r3}
- 80073a6: b0f9 sub sp, #484 ; 0x1e4
- 80073a8: ac01 add r4, sp, #4
- 80073aa: c40f stmia r4!, {r0, r1, r2, r3}
- 80073ac: cd0f ldmia r5!, {r0, r1, r2, r3}
- 80073ae: c40f stmia r4!, {r0, r1, r2, r3}
- 80073b0: cd0f ldmia r5!, {r0, r1, r2, r3}
- 80073b2: c40f stmia r4!, {r0, r1, r2, r3}
- 80073b4: e895 000f ldmia.w r5, {r0, r1, r2, r3}
- 80073b8: f04f 35ff mov.w r5, #4294967295 ; 0xffffffff
- 80073bc: e884 000f stmia.w r4, {r0, r1, r2, r3}
- 80073c0: 9500 str r5, [sp, #0]
- 80073c2: e006 b.n 80073d2 <__gnu_Unwind_RaiseException+0x3a>
- 80073c4: 6933 ldr r3, [r6, #16]
- 80073c6: 466a mov r2, sp
- 80073c8: 4631 mov r1, r6
- 80073ca: 4798 blx r3
- 80073cc: 2808 cmp r0, #8
- 80073ce: 4604 mov r4, r0
- 80073d0: d108 bne.n 80073e4 <__gnu_Unwind_RaiseException+0x4c>
- 80073d2: 9910 ldr r1, [sp, #64] ; 0x40
- 80073d4: 4630 mov r0, r6
- 80073d6: f7ff fed1 bl 800717c <get_eit_entry>
- 80073da: 2800 cmp r0, #0
- 80073dc: d0f2 beq.n 80073c4 <__gnu_Unwind_RaiseException+0x2c>
- 80073de: 2009 movs r0, #9
- 80073e0: b079 add sp, #484 ; 0x1e4
- 80073e2: bdf0 pop {r4, r5, r6, r7, pc}
- 80073e4: 4668 mov r0, sp
- 80073e6: f7ff ff1b bl 8007220 <restore_non_core_regs>
- 80073ea: 2c06 cmp r4, #6
- 80073ec: d1f7 bne.n 80073de <__gnu_Unwind_RaiseException+0x46>
- 80073ee: 4639 mov r1, r7
- 80073f0: 4630 mov r0, r6
- 80073f2: f7ff ff4b bl 800728c <unwind_phase2>
- 80073f6: bf00 nop
-
-080073f8 <__gnu_Unwind_ForcedUnwind>:
- 80073f8: b430 push {r4, r5}
- 80073fa: 6bdd ldr r5, [r3, #60] ; 0x3c
- 80073fc: 60c1 str r1, [r0, #12]
- 80073fe: 6182 str r2, [r0, #24]
- 8007400: 4619 mov r1, r3
- 8007402: 641d str r5, [r3, #64] ; 0x40
- 8007404: 2200 movs r2, #0
- 8007406: bc30 pop {r4, r5}
- 8007408: e760 b.n 80072cc <unwind_phase2_forced>
- 800740a: bf00 nop
-
-0800740c <__gnu_Unwind_Resume>:
- 800740c: b570 push {r4, r5, r6, lr}
- 800740e: 68c6 ldr r6, [r0, #12]
- 8007410: 6943 ldr r3, [r0, #20]
- 8007412: 640b str r3, [r1, #64] ; 0x40
- 8007414: b9be cbnz r6, 8007446 <__gnu_Unwind_Resume+0x3a>
- 8007416: 6903 ldr r3, [r0, #16]
- 8007418: 460a mov r2, r1
- 800741a: 4604 mov r4, r0
- 800741c: 460d mov r5, r1
- 800741e: 4601 mov r1, r0
- 8007420: 2002 movs r0, #2
- 8007422: 4798 blx r3
- 8007424: 2807 cmp r0, #7
- 8007426: d007 beq.n 8007438 <__gnu_Unwind_Resume+0x2c>
- 8007428: 2808 cmp r0, #8
- 800742a: d103 bne.n 8007434 <__gnu_Unwind_Resume+0x28>
- 800742c: 4629 mov r1, r5
- 800742e: 4620 mov r0, r4
- 8007430: f7ff ff2c bl 800728c <unwind_phase2>
- 8007434: f006 fb00 bl 800da38 <abort>
- 8007438: 4630 mov r0, r6
- 800743a: 6c29 ldr r1, [r5, #64] ; 0x40
- 800743c: f7ff ff24 bl 8007288 <_Unwind_DebugHook>
- 8007440: 1d28 adds r0, r5, #4
- 8007442: f000 fb43 bl 8007acc <__restore_core_regs>
- 8007446: 2201 movs r2, #1
- 8007448: f7ff ff40 bl 80072cc <unwind_phase2_forced>
- 800744c: f006 faf4 bl 800da38 <abort>
-
-08007450 <__gnu_Unwind_Resume_or_Rethrow>:
- 8007450: 68c2 ldr r2, [r0, #12]
- 8007452: b11a cbz r2, 800745c <__gnu_Unwind_Resume_or_Rethrow+0xc>
- 8007454: 6bca ldr r2, [r1, #60] ; 0x3c
- 8007456: 640a str r2, [r1, #64] ; 0x40
- 8007458: 2200 movs r2, #0
- 800745a: e737 b.n 80072cc <unwind_phase2_forced>
- 800745c: e79c b.n 8007398 <__gnu_Unwind_RaiseException>
- 800745e: bf00 nop
-
-08007460 <_Unwind_Complete>:
- 8007460: 4770 bx lr
- 8007462: bf00 nop
-
-08007464 <_Unwind_DeleteException>:
- 8007464: 6883 ldr r3, [r0, #8]
- 8007466: b113 cbz r3, 800746e <_Unwind_DeleteException+0xa>
- 8007468: 4601 mov r1, r0
- 800746a: 2001 movs r0, #1
- 800746c: 4718 bx r3
- 800746e: 4770 bx lr
-
-08007470 <_Unwind_VRS_Get>:
- 8007470: 2904 cmp r1, #4
- 8007472: d807 bhi.n 8007484 <_Unwind_VRS_Get+0x14>
- 8007474: e8df f001 tbb [pc, r1]
- 8007478: 08060803 .word 0x08060803
- 800747c: 08 .byte 0x08
- 800747d: 00 .byte 0x00
- 800747e: b90b cbnz r3, 8007484 <_Unwind_VRS_Get+0x14>
- 8007480: 2a0f cmp r2, #15
- 8007482: d903 bls.n 800748c <_Unwind_VRS_Get+0x1c>
- 8007484: 2002 movs r0, #2
- 8007486: 4770 bx lr
- 8007488: 2001 movs r0, #1
- 800748a: 4770 bx lr
- 800748c: eb00 0282 add.w r2, r0, r2, lsl #2
- 8007490: 4618 mov r0, r3
- 8007492: 6853 ldr r3, [r2, #4]
- 8007494: 9a00 ldr r2, [sp, #0]
- 8007496: 6013 str r3, [r2, #0]
- 8007498: 4770 bx lr
- 800749a: bf00 nop
-
-0800749c <_Unwind_GetGR>:
- 800749c: b510 push {r4, lr}
- 800749e: b084 sub sp, #16
- 80074a0: 2300 movs r3, #0
- 80074a2: ac03 add r4, sp, #12
- 80074a4: 460a mov r2, r1
- 80074a6: 9400 str r4, [sp, #0]
- 80074a8: 4619 mov r1, r3
- 80074aa: f7ff ffe1 bl 8007470 <_Unwind_VRS_Get>
- 80074ae: 9803 ldr r0, [sp, #12]
- 80074b0: b004 add sp, #16
- 80074b2: bd10 pop {r4, pc}
-
-080074b4 <_Unwind_VRS_Set>:
- 80074b4: 2904 cmp r1, #4
- 80074b6: d807 bhi.n 80074c8 <_Unwind_VRS_Set+0x14>
- 80074b8: e8df f001 tbb [pc, r1]
- 80074bc: 08060803 .word 0x08060803
- 80074c0: 08 .byte 0x08
- 80074c1: 00 .byte 0x00
- 80074c2: b90b cbnz r3, 80074c8 <_Unwind_VRS_Set+0x14>
- 80074c4: 2a0f cmp r2, #15
- 80074c6: d903 bls.n 80074d0 <_Unwind_VRS_Set+0x1c>
- 80074c8: 2002 movs r0, #2
- 80074ca: 4770 bx lr
- 80074cc: 2001 movs r0, #1
- 80074ce: 4770 bx lr
- 80074d0: eb00 0082 add.w r0, r0, r2, lsl #2
- 80074d4: 9a00 ldr r2, [sp, #0]
- 80074d6: 6812 ldr r2, [r2, #0]
- 80074d8: 6042 str r2, [r0, #4]
- 80074da: 4618 mov r0, r3
- 80074dc: 4770 bx lr
- 80074de: bf00 nop
-
-080074e0 <_Unwind_SetGR>:
- 80074e0: b510 push {r4, lr}
- 80074e2: b084 sub sp, #16
- 80074e4: ac04 add r4, sp, #16
- 80074e6: 2300 movs r3, #0
- 80074e8: f844 2d04 str.w r2, [r4, #-4]!
- 80074ec: 460a mov r2, r1
- 80074ee: 9400 str r4, [sp, #0]
- 80074f0: 4619 mov r1, r3
- 80074f2: f7ff ffdf bl 80074b4 <_Unwind_VRS_Set>
- 80074f6: b004 add sp, #16
- 80074f8: bd10 pop {r4, pc}
- 80074fa: bf00 nop
-
-080074fc <__gnu_Unwind_Backtrace>:
- 80074fc: b5f0 push {r4, r5, r6, r7, lr}
- 80074fe: 6bd3 ldr r3, [r2, #60] ; 0x3c
- 8007500: 6413 str r3, [r2, #64] ; 0x40
- 8007502: 1d15 adds r5, r2, #4
- 8007504: 4607 mov r7, r0
- 8007506: 460e mov r6, r1
- 8007508: cd0f ldmia r5!, {r0, r1, r2, r3}
- 800750a: f5ad 7d0f sub.w sp, sp, #572 ; 0x23c
- 800750e: ac17 add r4, sp, #92 ; 0x5c
- 8007510: c40f stmia r4!, {r0, r1, r2, r3}
- 8007512: cd0f ldmia r5!, {r0, r1, r2, r3}
- 8007514: c40f stmia r4!, {r0, r1, r2, r3}
- 8007516: cd0f ldmia r5!, {r0, r1, r2, r3}
- 8007518: c40f stmia r4!, {r0, r1, r2, r3}
- 800751a: e895 000f ldmia.w r5, {r0, r1, r2, r3}
- 800751e: f04f 35ff mov.w r5, #4294967295 ; 0xffffffff
- 8007522: e884 000f stmia.w r4, {r0, r1, r2, r3}
- 8007526: 9516 str r5, [sp, #88] ; 0x58
- 8007528: e010 b.n 800754c <__gnu_Unwind_Backtrace+0x50>
- 800752a: a816 add r0, sp, #88 ; 0x58
- 800752c: f7ff ffd8 bl 80074e0 <_Unwind_SetGR>
- 8007530: 4631 mov r1, r6
- 8007532: a816 add r0, sp, #88 ; 0x58
- 8007534: 47b8 blx r7
- 8007536: aa16 add r2, sp, #88 ; 0x58
- 8007538: 4669 mov r1, sp
- 800753a: b978 cbnz r0, 800755c <__gnu_Unwind_Backtrace+0x60>
- 800753c: 9b04 ldr r3, [sp, #16]
- 800753e: 2008 movs r0, #8
- 8007540: 4798 blx r3
- 8007542: 2805 cmp r0, #5
- 8007544: 4604 mov r4, r0
- 8007546: d00a beq.n 800755e <__gnu_Unwind_Backtrace+0x62>
- 8007548: 2809 cmp r0, #9
- 800754a: d007 beq.n 800755c <__gnu_Unwind_Backtrace+0x60>
- 800754c: 9926 ldr r1, [sp, #152] ; 0x98
- 800754e: 4668 mov r0, sp
- 8007550: f7ff fe14 bl 800717c <get_eit_entry>
- 8007554: 466a mov r2, sp
- 8007556: 210c movs r1, #12
- 8007558: 2800 cmp r0, #0
- 800755a: d0e6 beq.n 800752a <__gnu_Unwind_Backtrace+0x2e>
- 800755c: 2409 movs r4, #9
- 800755e: a816 add r0, sp, #88 ; 0x58
- 8007560: f7ff fe5e bl 8007220 <restore_non_core_regs>
- 8007564: 4620 mov r0, r4
- 8007566: f50d 7d0f add.w sp, sp, #572 ; 0x23c
- 800756a: bdf0 pop {r4, r5, r6, r7, pc}
-
-0800756c <__gnu_unwind_pr_common>:
- 800756c: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
- 8007570: 460d mov r5, r1
- 8007572: 6cc9 ldr r1, [r1, #76] ; 0x4c
- 8007574: b089 sub sp, #36 ; 0x24
- 8007576: 1d0c adds r4, r1, #4
- 8007578: 4616 mov r6, r2
- 800757a: f000 0b03 and.w fp, r0, #3
- 800757e: 680a ldr r2, [r1, #0]
- 8007580: 9406 str r4, [sp, #24]
- 8007582: 461f mov r7, r3
- 8007584: 2b00 cmp r3, #0
- 8007586: d068 beq.n 800765a <__gnu_unwind_pr_common+0xee>
- 8007588: 0c13 lsrs r3, r2, #16
- 800758a: b2d9 uxtb r1, r3
- 800758c: 0412 lsls r2, r2, #16
- 800758e: f88d 301d strb.w r3, [sp, #29]
- 8007592: 2302 movs r3, #2
- 8007594: eb04 0481 add.w r4, r4, r1, lsl #2
- 8007598: 9205 str r2, [sp, #20]
- 800759a: f88d 301c strb.w r3, [sp, #28]
- 800759e: 6d2b ldr r3, [r5, #80] ; 0x50
- 80075a0: f1bb 0f02 cmp.w fp, #2
- 80075a4: bf08 it eq
- 80075a6: 6bac ldreq r4, [r5, #56] ; 0x38
- 80075a8: f013 0301 ands.w r3, r3, #1
- 80075ac: d146 bne.n 800763c <__gnu_unwind_pr_common+0xd0>
- 80075ae: 9301 str r3, [sp, #4]
- 80075b0: f000 0308 and.w r3, r0, #8
- 80075b4: 9300 str r3, [sp, #0]
- 80075b6: f8d4 9000 ldr.w r9, [r4]
- 80075ba: f1b9 0f00 cmp.w r9, #0
- 80075be: f000 80f3 beq.w 80077a8 <__gnu_unwind_pr_common+0x23c>
- 80075c2: 2f02 cmp r7, #2
- 80075c4: d045 beq.n 8007652 <__gnu_unwind_pr_common+0xe6>
- 80075c6: f8b4 9000 ldrh.w r9, [r4]
- 80075ca: f8b4 8002 ldrh.w r8, [r4, #2]
- 80075ce: 3404 adds r4, #4
- 80075d0: 6cab ldr r3, [r5, #72] ; 0x48
- 80075d2: f028 0a01 bic.w sl, r8, #1
- 80075d6: 210f movs r1, #15
- 80075d8: 4630 mov r0, r6
- 80075da: 449a add sl, r3
- 80075dc: f7ff ff5e bl 800749c <_Unwind_GetGR>
- 80075e0: 4582 cmp sl, r0
- 80075e2: d834 bhi.n 800764e <__gnu_unwind_pr_common+0xe2>
- 80075e4: f029 0301 bic.w r3, r9, #1
- 80075e8: 4453 add r3, sl
- 80075ea: 4283 cmp r3, r0
- 80075ec: bf94 ite ls
- 80075ee: 2000 movls r0, #0
- 80075f0: 2001 movhi r0, #1
- 80075f2: ea4f 0848 mov.w r8, r8, lsl #1
- 80075f6: f008 0802 and.w r8, r8, #2
- 80075fa: f009 0901 and.w r9, r9, #1
- 80075fe: ea48 0809 orr.w r8, r8, r9
- 8007602: f1b8 0f01 cmp.w r8, #1
- 8007606: d03a beq.n 800767e <__gnu_unwind_pr_common+0x112>
- 8007608: d331 bcc.n 800766e <__gnu_unwind_pr_common+0x102>
- 800760a: f1b8 0f02 cmp.w r8, #2
- 800760e: d11a bne.n 8007646 <__gnu_unwind_pr_common+0xda>
- 8007610: 6823 ldr r3, [r4, #0]
- 8007612: f023 4a00 bic.w sl, r3, #2147483648 ; 0x80000000
- 8007616: f1bb 0f00 cmp.w fp, #0
- 800761a: d166 bne.n 80076ea <__gnu_unwind_pr_common+0x17e>
- 800761c: b130 cbz r0, 800762c <__gnu_unwind_pr_common+0xc0>
- 800761e: 9a00 ldr r2, [sp, #0]
- 8007620: 2a00 cmp r2, #0
- 8007622: d06c beq.n 80076fe <__gnu_unwind_pr_common+0x192>
- 8007624: f1ba 0f00 cmp.w sl, #0
- 8007628: f000 8090 beq.w 800774c <__gnu_unwind_pr_common+0x1e0>
- 800762c: 2b00 cmp r3, #0
- 800762e: da00 bge.n 8007632 <__gnu_unwind_pr_common+0xc6>
- 8007630: 3404 adds r4, #4
- 8007632: f10a 0301 add.w r3, sl, #1
- 8007636: eb04 0483 add.w r4, r4, r3, lsl #2
- 800763a: e7bc b.n 80075b6 <__gnu_unwind_pr_common+0x4a>
- 800763c: 4630 mov r0, r6
- 800763e: a905 add r1, sp, #20
- 8007640: f000 fb46 bl 8007cd0 <__gnu_unwind_execute>
- 8007644: b178 cbz r0, 8007666 <__gnu_unwind_pr_common+0xfa>
- 8007646: 2009 movs r0, #9
- 8007648: b009 add sp, #36 ; 0x24
- 800764a: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
- 800764e: 2000 movs r0, #0
- 8007650: e7cf b.n 80075f2 <__gnu_unwind_pr_common+0x86>
- 8007652: f8d4 8004 ldr.w r8, [r4, #4]
- 8007656: 3408 adds r4, #8
- 8007658: e7ba b.n 80075d0 <__gnu_unwind_pr_common+0x64>
- 800765a: 0212 lsls r2, r2, #8
- 800765c: 2303 movs r3, #3
- 800765e: 9205 str r2, [sp, #20]
- 8007660: f8ad 301c strh.w r3, [sp, #28]
- 8007664: e79b b.n 800759e <__gnu_unwind_pr_common+0x32>
- 8007666: 2008 movs r0, #8
- 8007668: b009 add sp, #36 ; 0x24
- 800766a: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
- 800766e: f1bb 0f00 cmp.w fp, #0
- 8007672: d002 beq.n 800767a <__gnu_unwind_pr_common+0x10e>
- 8007674: 2800 cmp r0, #0
- 8007676: f040 80b4 bne.w 80077e2 <__gnu_unwind_pr_common+0x276>
- 800767a: 3404 adds r4, #4
- 800767c: e79b b.n 80075b6 <__gnu_unwind_pr_common+0x4a>
- 800767e: f1bb 0f00 cmp.w fp, #0
- 8007682: d118 bne.n 80076b6 <__gnu_unwind_pr_common+0x14a>
- 8007684: b1a8 cbz r0, 80076b2 <__gnu_unwind_pr_common+0x146>
- 8007686: e9d4 2300 ldrd r2, r3, [r4]
- 800768a: 1c99 adds r1, r3, #2
- 800768c: ea4f 72d2 mov.w r2, r2, lsr #31
- 8007690: d0d9 beq.n 8007646 <__gnu_unwind_pr_common+0xda>
- 8007692: f105 0158 add.w r1, r5, #88 ; 0x58
- 8007696: 3301 adds r3, #1
- 8007698: 9104 str r1, [sp, #16]
- 800769a: f000 80b5 beq.w 8007808 <__gnu_unwind_pr_common+0x29c>
- 800769e: 1d20 adds r0, r4, #4
- 80076a0: f7ff fdea bl 8007278 <_Unwind_decode_typeinfo_ptr.isra.0>
- 80076a4: ab04 add r3, sp, #16
- 80076a6: 4601 mov r1, r0
- 80076a8: 4628 mov r0, r5
- 80076aa: f005 fa1b bl 800cae4 <__cxa_type_match>
- 80076ae: 2800 cmp r0, #0
- 80076b0: d167 bne.n 8007782 <__gnu_unwind_pr_common+0x216>
- 80076b2: 3408 adds r4, #8
- 80076b4: e77f b.n 80075b6 <__gnu_unwind_pr_common+0x4a>
- 80076b6: 210d movs r1, #13
- 80076b8: 4630 mov r0, r6
- 80076ba: f8d5 8020 ldr.w r8, [r5, #32]
- 80076be: f7ff feed bl 800749c <_Unwind_GetGR>
- 80076c2: 4580 cmp r8, r0
- 80076c4: d1f5 bne.n 80076b2 <__gnu_unwind_pr_common+0x146>
- 80076c6: 6aab ldr r3, [r5, #40] ; 0x28
- 80076c8: 429c cmp r4, r3
- 80076ca: d1f2 bne.n 80076b2 <__gnu_unwind_pr_common+0x146>
- 80076cc: 4620 mov r0, r4
- 80076ce: f7ff fd07 bl 80070e0 <selfrel_offset31>
- 80076d2: 210f movs r1, #15
- 80076d4: 4602 mov r2, r0
- 80076d6: 4630 mov r0, r6
- 80076d8: f7ff ff02 bl 80074e0 <_Unwind_SetGR>
- 80076dc: 4630 mov r0, r6
- 80076de: 462a mov r2, r5
- 80076e0: 2100 movs r1, #0
- 80076e2: f7ff fefd bl 80074e0 <_Unwind_SetGR>
- 80076e6: 2007 movs r0, #7
- 80076e8: e7ae b.n 8007648 <__gnu_unwind_pr_common+0xdc>
- 80076ea: 210d movs r1, #13
- 80076ec: 4630 mov r0, r6
- 80076ee: f8d5 8020 ldr.w r8, [r5, #32]
- 80076f2: f7ff fed3 bl 800749c <_Unwind_GetGR>
- 80076f6: 4580 cmp r8, r0
- 80076f8: d032 beq.n 8007760 <__gnu_unwind_pr_common+0x1f4>
- 80076fa: 6823 ldr r3, [r4, #0]
- 80076fc: e796 b.n 800762c <__gnu_unwind_pr_common+0xc0>
- 80076fe: f1ba 0f00 cmp.w sl, #0
- 8007702: d023 beq.n 800774c <__gnu_unwind_pr_common+0x1e0>
- 8007704: f105 0358 add.w r3, r5, #88 ; 0x58
- 8007708: f104 0804 add.w r8, r4, #4
- 800770c: f8cd b008 str.w fp, [sp, #8]
- 8007710: f8dd 9000 ldr.w r9, [sp]
- 8007714: 9703 str r7, [sp, #12]
- 8007716: 46a3 mov fp, r4
- 8007718: 461c mov r4, r3
- 800771a: e002 b.n 8007722 <__gnu_unwind_pr_common+0x1b6>
- 800771c: 4557 cmp r7, sl
- 800771e: 46b9 mov r9, r7
- 8007720: d040 beq.n 80077a4 <__gnu_unwind_pr_common+0x238>
- 8007722: 4640 mov r0, r8
- 8007724: 9404 str r4, [sp, #16]
- 8007726: f7ff fda7 bl 8007278 <_Unwind_decode_typeinfo_ptr.isra.0>
- 800772a: ab04 add r3, sp, #16
- 800772c: 4601 mov r1, r0
- 800772e: 2200 movs r2, #0
- 8007730: 4628 mov r0, r5
- 8007732: f005 f9d7 bl 800cae4 <__cxa_type_match>
- 8007736: f109 0701 add.w r7, r9, #1
- 800773a: f108 0804 add.w r8, r8, #4
- 800773e: 2800 cmp r0, #0
- 8007740: d0ec beq.n 800771c <__gnu_unwind_pr_common+0x1b0>
- 8007742: 45d1 cmp r9, sl
- 8007744: 465c mov r4, fp
- 8007746: e9dd b702 ldrd fp, r7, [sp, #8]
- 800774a: d1d6 bne.n 80076fa <__gnu_unwind_pr_common+0x18e>
- 800774c: 4630 mov r0, r6
- 800774e: 210d movs r1, #13
- 8007750: f7ff fea4 bl 800749c <_Unwind_GetGR>
- 8007754: 9b04 ldr r3, [sp, #16]
- 8007756: 6228 str r0, [r5, #32]
- 8007758: e9c5 3409 strd r3, r4, [r5, #36] ; 0x24
- 800775c: 2006 movs r0, #6
- 800775e: e773 b.n 8007648 <__gnu_unwind_pr_common+0xdc>
- 8007760: 6aab ldr r3, [r5, #40] ; 0x28
- 8007762: 429c cmp r4, r3
- 8007764: d1c9 bne.n 80076fa <__gnu_unwind_pr_common+0x18e>
- 8007766: 2204 movs r2, #4
- 8007768: f04f 0800 mov.w r8, #0
- 800776c: 18a3 adds r3, r4, r2
- 800776e: e9c5 a80a strd sl, r8, [r5, #40] ; 0x28
- 8007772: e9c5 230c strd r2, r3, [r5, #48] ; 0x30
- 8007776: 6823 ldr r3, [r4, #0]
- 8007778: 4543 cmp r3, r8
- 800777a: db4d blt.n 8007818 <__gnu_unwind_pr_common+0x2ac>
- 800777c: 2301 movs r3, #1
- 800777e: 9301 str r3, [sp, #4]
- 8007780: e757 b.n 8007632 <__gnu_unwind_pr_common+0xc6>
- 8007782: 4680 mov r8, r0
- 8007784: 210d movs r1, #13
- 8007786: 4630 mov r0, r6
- 8007788: f7ff fe88 bl 800749c <_Unwind_GetGR>
- 800778c: f1b8 0f02 cmp.w r8, #2
- 8007790: 6228 str r0, [r5, #32]
- 8007792: d13e bne.n 8007812 <__gnu_unwind_pr_common+0x2a6>
- 8007794: 462b mov r3, r5
- 8007796: 9a04 ldr r2, [sp, #16]
- 8007798: f843 2f2c str.w r2, [r3, #44]!
- 800779c: 626b str r3, [r5, #36] ; 0x24
- 800779e: 62ac str r4, [r5, #40] ; 0x28
- 80077a0: 2006 movs r0, #6
- 80077a2: e751 b.n 8007648 <__gnu_unwind_pr_common+0xdc>
- 80077a4: 465c mov r4, fp
- 80077a6: e7d1 b.n 800774c <__gnu_unwind_pr_common+0x1e0>
- 80077a8: a905 add r1, sp, #20
- 80077aa: 4630 mov r0, r6
- 80077ac: f000 fa90 bl 8007cd0 <__gnu_unwind_execute>
- 80077b0: 2800 cmp r0, #0
- 80077b2: f47f af48 bne.w 8007646 <__gnu_unwind_pr_common+0xda>
- 80077b6: 9b01 ldr r3, [sp, #4]
- 80077b8: 2b00 cmp r3, #0
- 80077ba: f43f af54 beq.w 8007666 <__gnu_unwind_pr_common+0xfa>
- 80077be: 210f movs r1, #15
- 80077c0: 4630 mov r0, r6
- 80077c2: f7ff fe6b bl 800749c <_Unwind_GetGR>
- 80077c6: 210e movs r1, #14
- 80077c8: 4602 mov r2, r0
- 80077ca: 4630 mov r0, r6
- 80077cc: f7ff fe88 bl 80074e0 <_Unwind_SetGR>
- 80077d0: 4630 mov r0, r6
- 80077d2: 4a1a ldr r2, [pc, #104] ; (800783c <__gnu_unwind_pr_common+0x2d0>)
- 80077d4: 210f movs r1, #15
- 80077d6: f7ff fe83 bl 80074e0 <_Unwind_SetGR>
- 80077da: 2007 movs r0, #7
- 80077dc: b009 add sp, #36 ; 0x24
- 80077de: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
- 80077e2: 4620 mov r0, r4
- 80077e4: f7ff fc7c bl 80070e0 <selfrel_offset31>
- 80077e8: 3404 adds r4, #4
- 80077ea: 4607 mov r7, r0
- 80077ec: 63ac str r4, [r5, #56] ; 0x38
- 80077ee: 4628 mov r0, r5
- 80077f0: f005 f9d0 bl 800cb94 <__cxa_begin_cleanup>
- 80077f4: 2800 cmp r0, #0
- 80077f6: f43f af26 beq.w 8007646 <__gnu_unwind_pr_common+0xda>
- 80077fa: 4630 mov r0, r6
- 80077fc: 463a mov r2, r7
- 80077fe: 210f movs r1, #15
- 8007800: f7ff fe6e bl 80074e0 <_Unwind_SetGR>
- 8007804: 2007 movs r0, #7
- 8007806: e71f b.n 8007648 <__gnu_unwind_pr_common+0xdc>
- 8007808: 4630 mov r0, r6
- 800780a: 210d movs r1, #13
- 800780c: f7ff fe46 bl 800749c <_Unwind_GetGR>
- 8007810: 6228 str r0, [r5, #32]
- 8007812: 9b04 ldr r3, [sp, #16]
- 8007814: 626b str r3, [r5, #36] ; 0x24
- 8007816: e7c2 b.n 800779e <__gnu_unwind_pr_common+0x232>
- 8007818: f10a 0001 add.w r0, sl, #1
- 800781c: eb04 0080 add.w r0, r4, r0, lsl #2
- 8007820: f7ff fc5e bl 80070e0 <selfrel_offset31>
- 8007824: 210f movs r1, #15
- 8007826: 4602 mov r2, r0
- 8007828: 4630 mov r0, r6
- 800782a: f7ff fe59 bl 80074e0 <_Unwind_SetGR>
- 800782e: 4630 mov r0, r6
- 8007830: 462a mov r2, r5
- 8007832: 4641 mov r1, r8
- 8007834: f7ff fe54 bl 80074e0 <_Unwind_SetGR>
- 8007838: 2007 movs r0, #7
- 800783a: e705 b.n 8007648 <__gnu_unwind_pr_common+0xdc>
- 800783c: 0800c9fd .word 0x0800c9fd
-
-08007840 <__aeabi_unwind_cpp_pr0>:
- 8007840: 2300 movs r3, #0
- 8007842: e693 b.n 800756c <__gnu_unwind_pr_common>
-
-08007844 <__aeabi_unwind_cpp_pr1>:
- 8007844: 2301 movs r3, #1
- 8007846: e691 b.n 800756c <__gnu_unwind_pr_common>
-
-08007848 <__aeabi_unwind_cpp_pr2>:
- 8007848: 2302 movs r3, #2
- 800784a: e68f b.n 800756c <__gnu_unwind_pr_common>
-
-0800784c <_Unwind_VRS_Pop>:
- 800784c: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
- 8007850: 4605 mov r5, r0
- 8007852: b0c4 sub sp, #272 ; 0x110
- 8007854: 2904 cmp r1, #4
- 8007856: d806 bhi.n 8007866 <_Unwind_VRS_Pop+0x1a>
- 8007858: e8df f001 tbb [pc, r1]
- 800785c: 03052b4d .word 0x03052b4d
- 8007860: 09 .byte 0x09
- 8007861: 00 .byte 0x00
- 8007862: 2b03 cmp r3, #3
- 8007864: d05f beq.n 8007926 <_Unwind_VRS_Pop+0xda>
- 8007866: 2002 movs r0, #2
- 8007868: b044 add sp, #272 ; 0x110
- 800786a: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
- 800786e: 2b00 cmp r3, #0
- 8007870: d1f9 bne.n 8007866 <_Unwind_VRS_Pop+0x1a>
- 8007872: 2a10 cmp r2, #16
- 8007874: d8f7 bhi.n 8007866 <_Unwind_VRS_Pop+0x1a>
- 8007876: 682b ldr r3, [r5, #0]
- 8007878: 06dc lsls r4, r3, #27
- 800787a: f100 80f4 bmi.w 8007a66 <_Unwind_VRS_Pop+0x21a>
- 800787e: ac22 add r4, sp, #136 ; 0x88
- 8007880: 4620 mov r0, r4
- 8007882: 9201 str r2, [sp, #4]
- 8007884: f000 f994 bl 8007bb0 <__gnu_Unwind_Save_WMMXC>
- 8007888: 6ba8 ldr r0, [r5, #56] ; 0x38
- 800788a: 9a01 ldr r2, [sp, #4]
- 800788c: 2300 movs r3, #0
- 800788e: 2601 movs r6, #1
- 8007890: fa06 f103 lsl.w r1, r6, r3
- 8007894: 4211 tst r1, r2
- 8007896: d003 beq.n 80078a0 <_Unwind_VRS_Pop+0x54>
- 8007898: 6801 ldr r1, [r0, #0]
- 800789a: f844 1023 str.w r1, [r4, r3, lsl #2]
- 800789e: 3004 adds r0, #4
- 80078a0: 3301 adds r3, #1
- 80078a2: 2b04 cmp r3, #4
- 80078a4: d1f4 bne.n 8007890 <_Unwind_VRS_Pop+0x44>
- 80078a6: 63a8 str r0, [r5, #56] ; 0x38
- 80078a8: 4620 mov r0, r4
- 80078aa: f000 f977 bl 8007b9c <__gnu_Unwind_Restore_WMMXC>
- 80078ae: 2000 movs r0, #0
- 80078b0: e7da b.n 8007868 <_Unwind_VRS_Pop+0x1c>
- 80078b2: 2b01 cmp r3, #1
- 80078b4: ea4f 4612 mov.w r6, r2, lsr #16
- 80078b8: b297 uxth r7, r2
- 80078ba: d052 beq.n 8007962 <_Unwind_VRS_Pop+0x116>
- 80078bc: 2b05 cmp r3, #5
- 80078be: d1d2 bne.n 8007866 <_Unwind_VRS_Pop+0x1a>
- 80078c0: eb06 0807 add.w r8, r6, r7
- 80078c4: f1b8 0f20 cmp.w r8, #32
- 80078c8: d8cd bhi.n 8007866 <_Unwind_VRS_Pop+0x1a>
- 80078ca: 2e0f cmp r6, #15
- 80078cc: f240 8099 bls.w 8007a02 <_Unwind_VRS_Pop+0x1b6>
- 80078d0: 46b8 mov r8, r7
- 80078d2: 2f00 cmp r7, #0
- 80078d4: f040 80db bne.w 8007a8e <_Unwind_VRS_Pop+0x242>
- 80078d8: 6baa ldr r2, [r5, #56] ; 0x38
- 80078da: 63aa str r2, [r5, #56] ; 0x38
- 80078dc: 2e0f cmp r6, #15
- 80078de: f240 80be bls.w 8007a5e <_Unwind_VRS_Pop+0x212>
- 80078e2: f1b8 0f00 cmp.w r8, #0
- 80078e6: d002 beq.n 80078ee <_Unwind_VRS_Pop+0xa2>
- 80078e8: a802 add r0, sp, #8
- 80078ea: f000 f90b bl 8007b04 <__gnu_Unwind_Restore_VFP_D_16_to_31>
- 80078ee: 2000 movs r0, #0
- 80078f0: b044 add sp, #272 ; 0x110
- 80078f2: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
- 80078f6: 2b00 cmp r3, #0
- 80078f8: d1b5 bne.n 8007866 <_Unwind_VRS_Pop+0x1a>
- 80078fa: 6bac ldr r4, [r5, #56] ; 0x38
- 80078fc: b297 uxth r7, r2
- 80078fe: 1d28 adds r0, r5, #4
- 8007900: 2601 movs r6, #1
- 8007902: fa06 f103 lsl.w r1, r6, r3
- 8007906: 4239 tst r1, r7
- 8007908: f103 0301 add.w r3, r3, #1
- 800790c: d002 beq.n 8007914 <_Unwind_VRS_Pop+0xc8>
- 800790e: 6821 ldr r1, [r4, #0]
- 8007910: 6001 str r1, [r0, #0]
- 8007912: 3404 adds r4, #4
- 8007914: 2b10 cmp r3, #16
- 8007916: f100 0004 add.w r0, r0, #4
- 800791a: d1f2 bne.n 8007902 <_Unwind_VRS_Pop+0xb6>
- 800791c: f412 5000 ands.w r0, r2, #8192 ; 0x2000
- 8007920: d1e5 bne.n 80078ee <_Unwind_VRS_Pop+0xa2>
- 8007922: 63ac str r4, [r5, #56] ; 0x38
- 8007924: e7a0 b.n 8007868 <_Unwind_VRS_Pop+0x1c>
- 8007926: 0c16 lsrs r6, r2, #16
- 8007928: b297 uxth r7, r2
- 800792a: 19f3 adds r3, r6, r7
- 800792c: 2b10 cmp r3, #16
- 800792e: d89a bhi.n 8007866 <_Unwind_VRS_Pop+0x1a>
- 8007930: 682b ldr r3, [r5, #0]
- 8007932: 071a lsls r2, r3, #28
- 8007934: d45d bmi.n 80079f2 <_Unwind_VRS_Pop+0x1a6>
- 8007936: ac22 add r4, sp, #136 ; 0x88
- 8007938: 4620 mov r0, r4
- 800793a: f000 f90d bl 8007b58 <__gnu_Unwind_Save_WMMXD>
- 800793e: eb04 01c6 add.w r1, r4, r6, lsl #3
- 8007942: 6bab ldr r3, [r5, #56] ; 0x38
- 8007944: b13f cbz r7, 8007956 <_Unwind_VRS_Pop+0x10a>
- 8007946: eb03 02c7 add.w r2, r3, r7, lsl #3
- 800794a: 6818 ldr r0, [r3, #0]
- 800794c: f841 0b04 str.w r0, [r1], #4
- 8007950: 3304 adds r3, #4
- 8007952: 4293 cmp r3, r2
- 8007954: d1f9 bne.n 800794a <_Unwind_VRS_Pop+0xfe>
- 8007956: 4620 mov r0, r4
- 8007958: 63ab str r3, [r5, #56] ; 0x38
- 800795a: f000 f8db bl 8007b14 <__gnu_Unwind_Restore_WMMXD>
- 800795e: 2000 movs r0, #0
- 8007960: e782 b.n 8007868 <_Unwind_VRS_Pop+0x1c>
- 8007962: 19f2 adds r2, r6, r7
- 8007964: 2a10 cmp r2, #16
- 8007966: f63f af7e bhi.w 8007866 <_Unwind_VRS_Pop+0x1a>
- 800796a: 2e0f cmp r6, #15
- 800796c: f63f af7b bhi.w 8007866 <_Unwind_VRS_Pop+0x1a>
- 8007970: 682a ldr r2, [r5, #0]
- 8007972: 07d1 lsls r1, r2, #31
- 8007974: d508 bpl.n 8007988 <_Unwind_VRS_Pop+0x13c>
- 8007976: 4628 mov r0, r5
- 8007978: f022 0203 bic.w r2, r2, #3
- 800797c: f840 2b48 str.w r2, [r0], #72
- 8007980: 9301 str r3, [sp, #4]
- 8007982: f000 f8b3 bl 8007aec <__gnu_Unwind_Save_VFP>
- 8007986: 9b01 ldr r3, [sp, #4]
- 8007988: 9301 str r3, [sp, #4]
- 800798a: ac22 add r4, sp, #136 ; 0x88
- 800798c: 4620 mov r0, r4
- 800798e: f000 f8ad bl 8007aec <__gnu_Unwind_Save_VFP>
- 8007992: 6ba9 ldr r1, [r5, #56] ; 0x38
- 8007994: 9b01 ldr r3, [sp, #4]
- 8007996: 2f00 cmp r7, #0
- 8007998: f000 8095 beq.w 8007ac6 <_Unwind_VRS_Pop+0x27a>
- 800799c: 007f lsls r7, r7, #1
- 800799e: eb04 04c6 add.w r4, r4, r6, lsl #3
- 80079a2: f04f 0800 mov.w r8, #0
- 80079a6: 3c04 subs r4, #4
- 80079a8: eb01 0287 add.w r2, r1, r7, lsl #2
- 80079ac: f851 0b04 ldr.w r0, [r1], #4
- 80079b0: f844 0f04 str.w r0, [r4, #4]!
- 80079b4: 4291 cmp r1, r2
- 80079b6: d1f9 bne.n 80079ac <_Unwind_VRS_Pop+0x160>
- 80079b8: f1b8 0f00 cmp.w r8, #0
- 80079bc: d00f beq.n 80079de <_Unwind_VRS_Pop+0x192>
- 80079be: ac02 add r4, sp, #8
- 80079c0: 2e10 cmp r6, #16
- 80079c2: 4631 mov r1, r6
- 80079c4: bf38 it cc
- 80079c6: 2110 movcc r1, #16
- 80079c8: eb04 01c1 add.w r1, r4, r1, lsl #3
- 80079cc: 3984 subs r1, #132 ; 0x84
- 80079ce: eb02 04c8 add.w r4, r2, r8, lsl #3
- 80079d2: f852 0b04 ldr.w r0, [r2], #4
- 80079d6: f841 0f04 str.w r0, [r1, #4]!
- 80079da: 4294 cmp r4, r2
- 80079dc: d1f9 bne.n 80079d2 <_Unwind_VRS_Pop+0x186>
- 80079de: 2b01 cmp r3, #1
- 80079e0: f47f af7b bne.w 80078da <_Unwind_VRS_Pop+0x8e>
- 80079e4: ac22 add r4, sp, #136 ; 0x88
- 80079e6: 3204 adds r2, #4
- 80079e8: 63aa str r2, [r5, #56] ; 0x38
- 80079ea: 4620 mov r0, r4
- 80079ec: f000 f87a bl 8007ae4 <__gnu_Unwind_Restore_VFP>
- 80079f0: e77d b.n 80078ee <_Unwind_VRS_Pop+0xa2>
- 80079f2: f023 0308 bic.w r3, r3, #8
- 80079f6: 602b str r3, [r5, #0]
- 80079f8: f505 70a8 add.w r0, r5, #336 ; 0x150
- 80079fc: f000 f8ac bl 8007b58 <__gnu_Unwind_Save_WMMXD>
- 8007a00: e799 b.n 8007936 <_Unwind_VRS_Pop+0xea>
- 8007a02: f1b8 0f10 cmp.w r8, #16
- 8007a06: 682a ldr r2, [r5, #0]
- 8007a08: d943 bls.n 8007a92 <_Unwind_VRS_Pop+0x246>
- 8007a0a: 07d0 lsls r0, r2, #31
- 8007a0c: f1a8 0810 sub.w r8, r8, #16
- 8007a10: d50b bpl.n 8007a2a <_Unwind_VRS_Pop+0x1de>
- 8007a12: 4628 mov r0, r5
- 8007a14: f022 0201 bic.w r2, r2, #1
- 8007a18: f042 0202 orr.w r2, r2, #2
- 8007a1c: f840 2b48 str.w r2, [r0], #72
- 8007a20: 9301 str r3, [sp, #4]
- 8007a22: f000 f86b bl 8007afc <__gnu_Unwind_Save_VFP_D>
- 8007a26: 682a ldr r2, [r5, #0]
- 8007a28: 9b01 ldr r3, [sp, #4]
- 8007a2a: 0751 lsls r1, r2, #29
- 8007a2c: d425 bmi.n 8007a7a <_Unwind_VRS_Pop+0x22e>
- 8007a2e: 2e0f cmp r6, #15
- 8007a30: d804 bhi.n 8007a3c <_Unwind_VRS_Pop+0x1f0>
- 8007a32: a822 add r0, sp, #136 ; 0x88
- 8007a34: 9301 str r3, [sp, #4]
- 8007a36: f000 f861 bl 8007afc <__gnu_Unwind_Save_VFP_D>
- 8007a3a: 9b01 ldr r3, [sp, #4]
- 8007a3c: 9301 str r3, [sp, #4]
- 8007a3e: ac02 add r4, sp, #8
- 8007a40: 4620 mov r0, r4
- 8007a42: f000 f863 bl 8007b0c <__gnu_Unwind_Save_VFP_D_16_to_31>
- 8007a46: f1c6 0110 rsb r1, r6, #16
- 8007a4a: 2900 cmp r1, #0
- 8007a4c: 6baa ldr r2, [r5, #56] ; 0x38
- 8007a4e: 9b01 ldr r3, [sp, #4]
- 8007a50: ddb6 ble.n 80079c0 <_Unwind_VRS_Pop+0x174>
- 8007a52: ac22 add r4, sp, #136 ; 0x88
- 8007a54: 004f lsls r7, r1, #1
- 8007a56: eb04 04c6 add.w r4, r4, r6, lsl #3
- 8007a5a: 4611 mov r1, r2
- 8007a5c: e7a3 b.n 80079a6 <_Unwind_VRS_Pop+0x15a>
- 8007a5e: a822 add r0, sp, #136 ; 0x88
- 8007a60: f000 f848 bl 8007af4 <__gnu_Unwind_Restore_VFP_D>
- 8007a64: e73d b.n 80078e2 <_Unwind_VRS_Pop+0x96>
- 8007a66: f023 0310 bic.w r3, r3, #16
- 8007a6a: 602b str r3, [r5, #0]
- 8007a6c: f505 70e8 add.w r0, r5, #464 ; 0x1d0
- 8007a70: 9201 str r2, [sp, #4]
- 8007a72: f000 f89d bl 8007bb0 <__gnu_Unwind_Save_WMMXC>
- 8007a76: 9a01 ldr r2, [sp, #4]
- 8007a78: e701 b.n 800787e <_Unwind_VRS_Pop+0x32>
- 8007a7a: 4628 mov r0, r5
- 8007a7c: f022 0204 bic.w r2, r2, #4
- 8007a80: f840 2bd0 str.w r2, [r0], #208
- 8007a84: 9301 str r3, [sp, #4]
- 8007a86: f000 f841 bl 8007b0c <__gnu_Unwind_Save_VFP_D_16_to_31>
- 8007a8a: 9b01 ldr r3, [sp, #4]
- 8007a8c: e7cf b.n 8007a2e <_Unwind_VRS_Pop+0x1e2>
- 8007a8e: 682a ldr r2, [r5, #0]
- 8007a90: e7cb b.n 8007a2a <_Unwind_VRS_Pop+0x1de>
- 8007a92: 07d0 lsls r0, r2, #31
- 8007a94: d50a bpl.n 8007aac <_Unwind_VRS_Pop+0x260>
- 8007a96: 4628 mov r0, r5
- 8007a98: f022 0201 bic.w r2, r2, #1
- 8007a9c: f042 0202 orr.w r2, r2, #2
- 8007aa0: f840 2b48 str.w r2, [r0], #72
- 8007aa4: 9301 str r3, [sp, #4]
- 8007aa6: f000 f829 bl 8007afc <__gnu_Unwind_Save_VFP_D>
- 8007aaa: 9b01 ldr r3, [sp, #4]
- 8007aac: 9301 str r3, [sp, #4]
- 8007aae: ac22 add r4, sp, #136 ; 0x88
- 8007ab0: 4620 mov r0, r4
- 8007ab2: f000 f823 bl 8007afc <__gnu_Unwind_Save_VFP_D>
- 8007ab6: 46b8 mov r8, r7
- 8007ab8: 6ba9 ldr r1, [r5, #56] ; 0x38
- 8007aba: 9b01 ldr r3, [sp, #4]
- 8007abc: 2f00 cmp r7, #0
- 8007abe: f47f af6d bne.w 800799c <_Unwind_VRS_Pop+0x150>
- 8007ac2: 460a mov r2, r1
- 8007ac4: e709 b.n 80078da <_Unwind_VRS_Pop+0x8e>
- 8007ac6: 460a mov r2, r1
- 8007ac8: e78d b.n 80079e6 <_Unwind_VRS_Pop+0x19a>
- 8007aca: bf00 nop
-
-08007acc <__restore_core_regs>:
- 8007acc: f100 0134 add.w r1, r0, #52 ; 0x34
- 8007ad0: e891 0038 ldmia.w r1, {r3, r4, r5}
- 8007ad4: 469c mov ip, r3
- 8007ad6: 46a6 mov lr, r4
- 8007ad8: f84c 5d04 str.w r5, [ip, #-4]!
- 8007adc: e890 0fff ldmia.w r0, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp}
- 8007ae0: 46e5 mov sp, ip
- 8007ae2: bd00 pop {pc}
-
-08007ae4 <__gnu_Unwind_Restore_VFP>:
- 8007ae4: ec90 0b21 fldmiax r0, {d0-d15} ;@ Deprecated
- 8007ae8: 4770 bx lr
- 8007aea: bf00 nop
-
-08007aec <__gnu_Unwind_Save_VFP>:
- 8007aec: ec80 0b21 fstmiax r0, {d0-d15} ;@ Deprecated
- 8007af0: 4770 bx lr
- 8007af2: bf00 nop
-
-08007af4 <__gnu_Unwind_Restore_VFP_D>:
- 8007af4: ec90 0b20 vldmia r0, {d0-d15}
- 8007af8: 4770 bx lr
- 8007afa: bf00 nop
-
-08007afc <__gnu_Unwind_Save_VFP_D>:
- 8007afc: ec80 0b20 vstmia r0, {d0-d15}
- 8007b00: 4770 bx lr
- 8007b02: bf00 nop
-
-08007b04 <__gnu_Unwind_Restore_VFP_D_16_to_31>:
- 8007b04: ecd0 0b20 vldmia r0, {d16-d31}
- 8007b08: 4770 bx lr
- 8007b0a: bf00 nop
-
-08007b0c <__gnu_Unwind_Save_VFP_D_16_to_31>:
- 8007b0c: ecc0 0b20 vstmia r0, {d16-d31}
- 8007b10: 4770 bx lr
- 8007b12: bf00 nop
-
-08007b14 <__gnu_Unwind_Restore_WMMXD>:
- 8007b14: ecf0 0102 ldfe f0, [r0], #8
- 8007b18: ecf0 1102 ldfe f1, [r0], #8
- 8007b1c: ecf0 2102 ldfe f2, [r0], #8
- 8007b20: ecf0 3102 ldfe f3, [r0], #8
- 8007b24: ecf0 4102 ldfe f4, [r0], #8
- 8007b28: ecf0 5102 ldfe f5, [r0], #8
- 8007b2c: ecf0 6102 ldfe f6, [r0], #8
- 8007b30: ecf0 7102 ldfe f7, [r0], #8
- 8007b34: ecf0 8102 ldfp f0, [r0], #8
- 8007b38: ecf0 9102 ldfp f1, [r0], #8
- 8007b3c: ecf0 a102 ldfp f2, [r0], #8
- 8007b40: ecf0 b102 ldfp f3, [r0], #8
- 8007b44: ecf0 c102 ldfp f4, [r0], #8
- 8007b48: ecf0 d102 ldfp f5, [r0], #8
- 8007b4c: ecf0 e102 ldfp f6, [r0], #8
- 8007b50: ecf0 f102 ldfp f7, [r0], #8
- 8007b54: 4770 bx lr
- 8007b56: bf00 nop
-
-08007b58 <__gnu_Unwind_Save_WMMXD>:
- 8007b58: ece0 0102 stfe f0, [r0], #8
- 8007b5c: ece0 1102 stfe f1, [r0], #8
- 8007b60: ece0 2102 stfe f2, [r0], #8
- 8007b64: ece0 3102 stfe f3, [r0], #8
- 8007b68: ece0 4102 stfe f4, [r0], #8
- 8007b6c: ece0 5102 stfe f5, [r0], #8
- 8007b70: ece0 6102 stfe f6, [r0], #8
- 8007b74: ece0 7102 stfe f7, [r0], #8
- 8007b78: ece0 8102 stfp f0, [r0], #8
- 8007b7c: ece0 9102 stfp f1, [r0], #8
- 8007b80: ece0 a102 stfp f2, [r0], #8
- 8007b84: ece0 b102 stfp f3, [r0], #8
- 8007b88: ece0 c102 stfp f4, [r0], #8
- 8007b8c: ece0 d102 stfp f5, [r0], #8
- 8007b90: ece0 e102 stfp f6, [r0], #8
- 8007b94: ece0 f102 stfp f7, [r0], #8
- 8007b98: 4770 bx lr
- 8007b9a: bf00 nop
-
-08007b9c <__gnu_Unwind_Restore_WMMXC>:
- 8007b9c: fcb0 8101 ldc2 1, cr8, [r0], #4
- 8007ba0: fcb0 9101 ldc2 1, cr9, [r0], #4
- 8007ba4: fcb0 a101 ldc2 1, cr10, [r0], #4
- 8007ba8: fcb0 b101 ldc2 1, cr11, [r0], #4
- 8007bac: 4770 bx lr
- 8007bae: bf00 nop
-
-08007bb0 <__gnu_Unwind_Save_WMMXC>:
- 8007bb0: fca0 8101 stc2 1, cr8, [r0], #4
- 8007bb4: fca0 9101 stc2 1, cr9, [r0], #4
- 8007bb8: fca0 a101 stc2 1, cr10, [r0], #4
- 8007bbc: fca0 b101 stc2 1, cr11, [r0], #4
- 8007bc0: 4770 bx lr
- 8007bc2: bf00 nop
-
-08007bc4 <_Unwind_RaiseException>:
- 8007bc4: 46ec mov ip, sp
- 8007bc6: b500 push {lr}
- 8007bc8: e92d 5000 stmdb sp!, {ip, lr}
- 8007bcc: e92d 1fff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip}
- 8007bd0: f04f 0300 mov.w r3, #0
- 8007bd4: e92d 000c stmdb sp!, {r2, r3}
- 8007bd8: a901 add r1, sp, #4
- 8007bda: f7ff fbdd bl 8007398 <__gnu_Unwind_RaiseException>
- 8007bde: f8dd e040 ldr.w lr, [sp, #64] ; 0x40
- 8007be2: b012 add sp, #72 ; 0x48
- 8007be4: 4770 bx lr
- 8007be6: bf00 nop
-
-08007be8 <_Unwind_Resume>:
- 8007be8: 46ec mov ip, sp
- 8007bea: b500 push {lr}
- 8007bec: e92d 5000 stmdb sp!, {ip, lr}
- 8007bf0: e92d 1fff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip}
- 8007bf4: f04f 0300 mov.w r3, #0
- 8007bf8: e92d 000c stmdb sp!, {r2, r3}
- 8007bfc: a901 add r1, sp, #4
- 8007bfe: f7ff fc05 bl 800740c <__gnu_Unwind_Resume>
- 8007c02: f8dd e040 ldr.w lr, [sp, #64] ; 0x40
- 8007c06: b012 add sp, #72 ; 0x48
- 8007c08: 4770 bx lr
- 8007c0a: bf00 nop
-
-08007c0c <_Unwind_Resume_or_Rethrow>:
- 8007c0c: 46ec mov ip, sp
- 8007c0e: b500 push {lr}
- 8007c10: e92d 5000 stmdb sp!, {ip, lr}
- 8007c14: e92d 1fff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip}
- 8007c18: f04f 0300 mov.w r3, #0
- 8007c1c: e92d 000c stmdb sp!, {r2, r3}
- 8007c20: a901 add r1, sp, #4
- 8007c22: f7ff fc15 bl 8007450 <__gnu_Unwind_Resume_or_Rethrow>
- 8007c26: f8dd e040 ldr.w lr, [sp, #64] ; 0x40
- 8007c2a: b012 add sp, #72 ; 0x48
- 8007c2c: 4770 bx lr
- 8007c2e: bf00 nop
-
-08007c30 <_Unwind_ForcedUnwind>:
- 8007c30: 46ec mov ip, sp
- 8007c32: b500 push {lr}
- 8007c34: e92d 5000 stmdb sp!, {ip, lr}
- 8007c38: e92d 1fff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip}
- 8007c3c: f04f 0300 mov.w r3, #0
- 8007c40: e92d 000c stmdb sp!, {r2, r3}
- 8007c44: ab01 add r3, sp, #4
- 8007c46: f7ff fbd7 bl 80073f8 <__gnu_Unwind_ForcedUnwind>
- 8007c4a: f8dd e040 ldr.w lr, [sp, #64] ; 0x40
- 8007c4e: b012 add sp, #72 ; 0x48
- 8007c50: 4770 bx lr
- 8007c52: bf00 nop
-
-08007c54 <_Unwind_Backtrace>:
- 8007c54: 46ec mov ip, sp
- 8007c56: b500 push {lr}
- 8007c58: e92d 5000 stmdb sp!, {ip, lr}
- 8007c5c: e92d 1fff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip}
- 8007c60: f04f 0300 mov.w r3, #0
- 8007c64: e92d 000c stmdb sp!, {r2, r3}
- 8007c68: aa01 add r2, sp, #4
- 8007c6a: f7ff fc47 bl 80074fc <__gnu_Unwind_Backtrace>
- 8007c6e: f8dd e040 ldr.w lr, [sp, #64] ; 0x40
- 8007c72: b012 add sp, #72 ; 0x48
- 8007c74: 4770 bx lr
- 8007c76: bf00 nop
-
-08007c78 <next_unwind_byte>:
- 8007c78: 7a02 ldrb r2, [r0, #8]
- 8007c7a: b982 cbnz r2, 8007c9e <next_unwind_byte+0x26>
- 8007c7c: 7a43 ldrb r3, [r0, #9]
- 8007c7e: b1ab cbz r3, 8007cac <next_unwind_byte+0x34>
- 8007c80: 6842 ldr r2, [r0, #4]
- 8007c82: 3b01 subs r3, #1
- 8007c84: b410 push {r4}
- 8007c86: 7243 strb r3, [r0, #9]
- 8007c88: 6813 ldr r3, [r2, #0]
- 8007c8a: 2103 movs r1, #3
- 8007c8c: 1d14 adds r4, r2, #4
- 8007c8e: 7201 strb r1, [r0, #8]
- 8007c90: 021a lsls r2, r3, #8
- 8007c92: 6044 str r4, [r0, #4]
- 8007c94: 6002 str r2, [r0, #0]
- 8007c96: f85d 4b04 ldr.w r4, [sp], #4
- 8007c9a: 0e18 lsrs r0, r3, #24
- 8007c9c: 4770 bx lr
- 8007c9e: 6803 ldr r3, [r0, #0]
- 8007ca0: 3a01 subs r2, #1
- 8007ca2: 7202 strb r2, [r0, #8]
- 8007ca4: 021a lsls r2, r3, #8
- 8007ca6: 6002 str r2, [r0, #0]
- 8007ca8: 0e18 lsrs r0, r3, #24
- 8007caa: 4770 bx lr
- 8007cac: 20b0 movs r0, #176 ; 0xb0
- 8007cae: 4770 bx lr
-
-08007cb0 <_Unwind_GetGR.constprop.0>:
- 8007cb0: b500 push {lr}
- 8007cb2: b085 sub sp, #20
- 8007cb4: aa03 add r2, sp, #12
- 8007cb6: 2300 movs r3, #0
- 8007cb8: 9200 str r2, [sp, #0]
- 8007cba: 4619 mov r1, r3
- 8007cbc: 220c movs r2, #12
- 8007cbe: f7ff fbd7 bl 8007470 <_Unwind_VRS_Get>
- 8007cc2: 9803 ldr r0, [sp, #12]
- 8007cc4: b005 add sp, #20
- 8007cc6: f85d fb04 ldr.w pc, [sp], #4
- 8007cca: bf00 nop
-
-08007ccc <unwind_UCB_from_context>:
- 8007ccc: e7f0 b.n 8007cb0 <_Unwind_GetGR.constprop.0>
- 8007cce: bf00 nop
-
-08007cd0 <__gnu_unwind_execute>:
- 8007cd0: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr}
- 8007cd4: 4605 mov r5, r0
- 8007cd6: b085 sub sp, #20
- 8007cd8: 460e mov r6, r1
- 8007cda: f04f 0800 mov.w r8, #0
- 8007cde: 4630 mov r0, r6
- 8007ce0: f7ff ffca bl 8007c78 <next_unwind_byte>
- 8007ce4: 28b0 cmp r0, #176 ; 0xb0
- 8007ce6: 4604 mov r4, r0
- 8007ce8: f000 80b1 beq.w 8007e4e <__gnu_unwind_execute+0x17e>
- 8007cec: 0607 lsls r7, r0, #24
- 8007cee: d520 bpl.n 8007d32 <__gnu_unwind_execute+0x62>
- 8007cf0: f000 03f0 and.w r3, r0, #240 ; 0xf0
- 8007cf4: 2b80 cmp r3, #128 ; 0x80
- 8007cf6: d065 beq.n 8007dc4 <__gnu_unwind_execute+0xf4>
- 8007cf8: 2b90 cmp r3, #144 ; 0x90
- 8007cfa: d036 beq.n 8007d6a <__gnu_unwind_execute+0x9a>
- 8007cfc: 2ba0 cmp r3, #160 ; 0xa0
- 8007cfe: d078 beq.n 8007df2 <__gnu_unwind_execute+0x122>
- 8007d00: 2bb0 cmp r3, #176 ; 0xb0
- 8007d02: d047 beq.n 8007d94 <__gnu_unwind_execute+0xc4>
- 8007d04: 2bc0 cmp r3, #192 ; 0xc0
- 8007d06: f000 808a beq.w 8007e1e <__gnu_unwind_execute+0x14e>
- 8007d0a: f000 03f8 and.w r3, r0, #248 ; 0xf8
- 8007d0e: 2bd0 cmp r3, #208 ; 0xd0
- 8007d10: d10b bne.n 8007d2a <__gnu_unwind_execute+0x5a>
- 8007d12: f000 0207 and.w r2, r0, #7
- 8007d16: 3201 adds r2, #1
- 8007d18: f442 2200 orr.w r2, r2, #524288 ; 0x80000
- 8007d1c: 2305 movs r3, #5
- 8007d1e: 2101 movs r1, #1
- 8007d20: 4628 mov r0, r5
- 8007d22: f7ff fd93 bl 800784c <_Unwind_VRS_Pop>
- 8007d26: 2800 cmp r0, #0
- 8007d28: d0d9 beq.n 8007cde <__gnu_unwind_execute+0xe>
- 8007d2a: 2009 movs r0, #9
- 8007d2c: b005 add sp, #20
- 8007d2e: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc}
- 8007d32: f10d 090c add.w r9, sp, #12
- 8007d36: 2300 movs r3, #0
- 8007d38: 4619 mov r1, r3
- 8007d3a: 0087 lsls r7, r0, #2
- 8007d3c: f8cd 9000 str.w r9, [sp]
- 8007d40: 220d movs r2, #13
- 8007d42: 4628 mov r0, r5
- 8007d44: f7ff fb94 bl 8007470 <_Unwind_VRS_Get>
- 8007d48: b2ff uxtb r7, r7
- 8007d4a: 9b03 ldr r3, [sp, #12]
- 8007d4c: f8cd 9000 str.w r9, [sp]
- 8007d50: 3704 adds r7, #4
- 8007d52: 0660 lsls r0, r4, #25
- 8007d54: bf4c ite mi
- 8007d56: 1bdf submi r7, r3, r7
- 8007d58: 18ff addpl r7, r7, r3
- 8007d5a: 2300 movs r3, #0
- 8007d5c: 4619 mov r1, r3
- 8007d5e: 220d movs r2, #13
- 8007d60: 4628 mov r0, r5
- 8007d62: 9703 str r7, [sp, #12]
- 8007d64: f7ff fba6 bl 80074b4 <_Unwind_VRS_Set>
- 8007d68: e7b9 b.n 8007cde <__gnu_unwind_execute+0xe>
- 8007d6a: f000 030d and.w r3, r0, #13
- 8007d6e: 2b0d cmp r3, #13
- 8007d70: d0db beq.n 8007d2a <__gnu_unwind_execute+0x5a>
- 8007d72: af03 add r7, sp, #12
- 8007d74: 2300 movs r3, #0
- 8007d76: f000 020f and.w r2, r0, #15
- 8007d7a: 4619 mov r1, r3
- 8007d7c: 9700 str r7, [sp, #0]
- 8007d7e: 4628 mov r0, r5
- 8007d80: f7ff fb76 bl 8007470 <_Unwind_VRS_Get>
- 8007d84: 2300 movs r3, #0
- 8007d86: 9700 str r7, [sp, #0]
- 8007d88: 4619 mov r1, r3
- 8007d8a: 220d movs r2, #13
- 8007d8c: 4628 mov r0, r5
- 8007d8e: f7ff fb91 bl 80074b4 <_Unwind_VRS_Set>
- 8007d92: e7a4 b.n 8007cde <__gnu_unwind_execute+0xe>
- 8007d94: 28b1 cmp r0, #177 ; 0xb1
- 8007d96: d05f beq.n 8007e58 <__gnu_unwind_execute+0x188>
- 8007d98: 28b2 cmp r0, #178 ; 0xb2
- 8007d9a: f000 80cc beq.w 8007f36 <__gnu_unwind_execute+0x266>
- 8007d9e: 28b3 cmp r0, #179 ; 0xb3
- 8007da0: d07e beq.n 8007ea0 <__gnu_unwind_execute+0x1d0>
- 8007da2: f000 03fc and.w r3, r0, #252 ; 0xfc
- 8007da6: 2bb4 cmp r3, #180 ; 0xb4
- 8007da8: d0bf beq.n 8007d2a <__gnu_unwind_execute+0x5a>
- 8007daa: f000 0207 and.w r2, r0, #7
- 8007dae: 3201 adds r2, #1
- 8007db0: 2301 movs r3, #1
- 8007db2: f442 2200 orr.w r2, r2, #524288 ; 0x80000
- 8007db6: 4619 mov r1, r3
- 8007db8: 4628 mov r0, r5
- 8007dba: f7ff fd47 bl 800784c <_Unwind_VRS_Pop>
- 8007dbe: 2800 cmp r0, #0
- 8007dc0: d08d beq.n 8007cde <__gnu_unwind_execute+0xe>
- 8007dc2: e7b2 b.n 8007d2a <__gnu_unwind_execute+0x5a>
- 8007dc4: 4630 mov r0, r6
- 8007dc6: f7ff ff57 bl 8007c78 <next_unwind_byte>
- 8007dca: 0224 lsls r4, r4, #8
- 8007dcc: 4304 orrs r4, r0
- 8007dce: f5b4 4f00 cmp.w r4, #32768 ; 0x8000
- 8007dd2: d0aa beq.n 8007d2a <__gnu_unwind_execute+0x5a>
- 8007dd4: 0124 lsls r4, r4, #4
- 8007dd6: 2300 movs r3, #0
- 8007dd8: b2a2 uxth r2, r4
- 8007dda: 4619 mov r1, r3
- 8007ddc: 4628 mov r0, r5
- 8007dde: f7ff fd35 bl 800784c <_Unwind_VRS_Pop>
- 8007de2: 2800 cmp r0, #0
- 8007de4: d1a1 bne.n 8007d2a <__gnu_unwind_execute+0x5a>
- 8007de6: f414 4f00 tst.w r4, #32768 ; 0x8000
- 8007dea: bf18 it ne
- 8007dec: f04f 0801 movne.w r8, #1
- 8007df0: e775 b.n 8007cde <__gnu_unwind_execute+0xe>
- 8007df2: 43c2 mvns r2, r0
- 8007df4: f002 0307 and.w r3, r2, #7
- 8007df8: f44f 627f mov.w r2, #4080 ; 0xff0
- 8007dfc: 411a asrs r2, r3
- 8007dfe: 0701 lsls r1, r0, #28
- 8007e00: f402 627f and.w r2, r2, #4080 ; 0xff0
- 8007e04: f04f 0300 mov.w r3, #0
- 8007e08: bf48 it mi
- 8007e0a: f442 4280 orrmi.w r2, r2, #16384 ; 0x4000
- 8007e0e: 4619 mov r1, r3
- 8007e10: 4628 mov r0, r5
- 8007e12: f7ff fd1b bl 800784c <_Unwind_VRS_Pop>
- 8007e16: 2800 cmp r0, #0
- 8007e18: f43f af61 beq.w 8007cde <__gnu_unwind_execute+0xe>
- 8007e1c: e785 b.n 8007d2a <__gnu_unwind_execute+0x5a>
- 8007e1e: 28c6 cmp r0, #198 ; 0xc6
- 8007e20: d051 beq.n 8007ec6 <__gnu_unwind_execute+0x1f6>
- 8007e22: 28c7 cmp r0, #199 ; 0xc7
- 8007e24: d05a beq.n 8007edc <__gnu_unwind_execute+0x20c>
- 8007e26: f000 03f8 and.w r3, r0, #248 ; 0xf8
- 8007e2a: 2bc0 cmp r3, #192 ; 0xc0
- 8007e2c: d069 beq.n 8007f02 <__gnu_unwind_execute+0x232>
- 8007e2e: 28c8 cmp r0, #200 ; 0xc8
- 8007e30: d075 beq.n 8007f1e <__gnu_unwind_execute+0x24e>
- 8007e32: 28c9 cmp r0, #201 ; 0xc9
- 8007e34: f47f af79 bne.w 8007d2a <__gnu_unwind_execute+0x5a>
- 8007e38: 4630 mov r0, r6
- 8007e3a: f7ff ff1d bl 8007c78 <next_unwind_byte>
- 8007e3e: 0302 lsls r2, r0, #12
- 8007e40: f000 000f and.w r0, r0, #15
- 8007e44: f402 2270 and.w r2, r2, #983040 ; 0xf0000
- 8007e48: 3001 adds r0, #1
- 8007e4a: 4302 orrs r2, r0
- 8007e4c: e766 b.n 8007d1c <__gnu_unwind_execute+0x4c>
- 8007e4e: f1b8 0f00 cmp.w r8, #0
- 8007e52: d014 beq.n 8007e7e <__gnu_unwind_execute+0x1ae>
- 8007e54: 2000 movs r0, #0
- 8007e56: e769 b.n 8007d2c <__gnu_unwind_execute+0x5c>
- 8007e58: 4630 mov r0, r6
- 8007e5a: f7ff ff0d bl 8007c78 <next_unwind_byte>
- 8007e5e: 2800 cmp r0, #0
- 8007e60: f43f af63 beq.w 8007d2a <__gnu_unwind_execute+0x5a>
- 8007e64: f010 03f0 ands.w r3, r0, #240 ; 0xf0
- 8007e68: f47f af5f bne.w 8007d2a <__gnu_unwind_execute+0x5a>
- 8007e6c: 4602 mov r2, r0
- 8007e6e: 4619 mov r1, r3
- 8007e70: 4628 mov r0, r5
- 8007e72: f7ff fceb bl 800784c <_Unwind_VRS_Pop>
- 8007e76: 2800 cmp r0, #0
- 8007e78: f43f af31 beq.w 8007cde <__gnu_unwind_execute+0xe>
- 8007e7c: e755 b.n 8007d2a <__gnu_unwind_execute+0x5a>
- 8007e7e: ac03 add r4, sp, #12
- 8007e80: 4643 mov r3, r8
- 8007e82: 220e movs r2, #14
- 8007e84: 4641 mov r1, r8
- 8007e86: 9400 str r4, [sp, #0]
- 8007e88: 4628 mov r0, r5
- 8007e8a: f7ff faf1 bl 8007470 <_Unwind_VRS_Get>
- 8007e8e: 9400 str r4, [sp, #0]
- 8007e90: 4628 mov r0, r5
- 8007e92: 4643 mov r3, r8
- 8007e94: 220f movs r2, #15
- 8007e96: 4641 mov r1, r8
- 8007e98: f7ff fb0c bl 80074b4 <_Unwind_VRS_Set>
- 8007e9c: 4640 mov r0, r8
- 8007e9e: e745 b.n 8007d2c <__gnu_unwind_execute+0x5c>
- 8007ea0: 4630 mov r0, r6
- 8007ea2: f7ff fee9 bl 8007c78 <next_unwind_byte>
- 8007ea6: 0301 lsls r1, r0, #12
- 8007ea8: f000 000f and.w r0, r0, #15
- 8007eac: f401 2170 and.w r1, r1, #983040 ; 0xf0000
- 8007eb0: 1c42 adds r2, r0, #1
- 8007eb2: 2301 movs r3, #1
- 8007eb4: 430a orrs r2, r1
- 8007eb6: 4628 mov r0, r5
- 8007eb8: 4619 mov r1, r3
- 8007eba: f7ff fcc7 bl 800784c <_Unwind_VRS_Pop>
- 8007ebe: 2800 cmp r0, #0
- 8007ec0: f43f af0d beq.w 8007cde <__gnu_unwind_execute+0xe>
- 8007ec4: e731 b.n 8007d2a <__gnu_unwind_execute+0x5a>
- 8007ec6: 4630 mov r0, r6
- 8007ec8: f7ff fed6 bl 8007c78 <next_unwind_byte>
- 8007ecc: 0301 lsls r1, r0, #12
- 8007ece: f000 000f and.w r0, r0, #15
- 8007ed2: f401 2170 and.w r1, r1, #983040 ; 0xf0000
- 8007ed6: 1c42 adds r2, r0, #1
- 8007ed8: 2303 movs r3, #3
- 8007eda: e7eb b.n 8007eb4 <__gnu_unwind_execute+0x1e4>
- 8007edc: 4630 mov r0, r6
- 8007ede: f7ff fecb bl 8007c78 <next_unwind_byte>
- 8007ee2: 4602 mov r2, r0
- 8007ee4: 2800 cmp r0, #0
- 8007ee6: f43f af20 beq.w 8007d2a <__gnu_unwind_execute+0x5a>
- 8007eea: f010 03f0 ands.w r3, r0, #240 ; 0xf0
- 8007eee: f47f af1c bne.w 8007d2a <__gnu_unwind_execute+0x5a>
- 8007ef2: 2104 movs r1, #4
- 8007ef4: 4628 mov r0, r5
- 8007ef6: f7ff fca9 bl 800784c <_Unwind_VRS_Pop>
- 8007efa: 2800 cmp r0, #0
- 8007efc: f43f aeef beq.w 8007cde <__gnu_unwind_execute+0xe>
- 8007f00: e713 b.n 8007d2a <__gnu_unwind_execute+0x5a>
- 8007f02: f000 020f and.w r2, r0, #15
- 8007f06: 3201 adds r2, #1
- 8007f08: 2303 movs r3, #3
- 8007f0a: f442 2220 orr.w r2, r2, #655360 ; 0xa0000
- 8007f0e: 4619 mov r1, r3
- 8007f10: 4628 mov r0, r5
- 8007f12: f7ff fc9b bl 800784c <_Unwind_VRS_Pop>
- 8007f16: 2800 cmp r0, #0
- 8007f18: f43f aee1 beq.w 8007cde <__gnu_unwind_execute+0xe>
- 8007f1c: e705 b.n 8007d2a <__gnu_unwind_execute+0x5a>
- 8007f1e: 4630 mov r0, r6
- 8007f20: f7ff feaa bl 8007c78 <next_unwind_byte>
- 8007f24: f000 02f0 and.w r2, r0, #240 ; 0xf0
- 8007f28: f000 030f and.w r3, r0, #15
- 8007f2c: 3210 adds r2, #16
- 8007f2e: 3301 adds r3, #1
- 8007f30: ea43 3202 orr.w r2, r3, r2, lsl #12
- 8007f34: e6f2 b.n 8007d1c <__gnu_unwind_execute+0x4c>
- 8007f36: 2300 movs r3, #0
- 8007f38: f10d 090c add.w r9, sp, #12
- 8007f3c: 220d movs r2, #13
- 8007f3e: 4619 mov r1, r3
- 8007f40: f8cd 9000 str.w r9, [sp]
- 8007f44: 4628 mov r0, r5
- 8007f46: f7ff fa93 bl 8007470 <_Unwind_VRS_Get>
- 8007f4a: 4630 mov r0, r6
- 8007f4c: f7ff fe94 bl 8007c78 <next_unwind_byte>
- 8007f50: 0602 lsls r2, r0, #24
- 8007f52: f04f 0702 mov.w r7, #2
- 8007f56: d50c bpl.n 8007f72 <__gnu_unwind_execute+0x2a2>
- 8007f58: 9b03 ldr r3, [sp, #12]
- 8007f5a: f000 007f and.w r0, r0, #127 ; 0x7f
- 8007f5e: 40b8 lsls r0, r7
- 8007f60: 4403 add r3, r0
- 8007f62: 4630 mov r0, r6
- 8007f64: 9303 str r3, [sp, #12]
- 8007f66: f7ff fe87 bl 8007c78 <next_unwind_byte>
- 8007f6a: 0603 lsls r3, r0, #24
- 8007f6c: f107 0707 add.w r7, r7, #7
- 8007f70: d4f2 bmi.n 8007f58 <__gnu_unwind_execute+0x288>
- 8007f72: 9b03 ldr r3, [sp, #12]
- 8007f74: f8cd 9000 str.w r9, [sp]
- 8007f78: f000 047f and.w r4, r0, #127 ; 0x7f
- 8007f7c: f503 7201 add.w r2, r3, #516 ; 0x204
- 8007f80: 40bc lsls r4, r7
- 8007f82: 2300 movs r3, #0
- 8007f84: 4414 add r4, r2
- 8007f86: 4619 mov r1, r3
- 8007f88: 220d movs r2, #13
- 8007f8a: 4628 mov r0, r5
- 8007f8c: 9403 str r4, [sp, #12]
- 8007f8e: f7ff fa91 bl 80074b4 <_Unwind_VRS_Set>
- 8007f92: e6a4 b.n 8007cde <__gnu_unwind_execute+0xe>
-
-08007f94 <__gnu_unwind_frame>:
- 8007f94: b510 push {r4, lr}
- 8007f96: 6cc3 ldr r3, [r0, #76] ; 0x4c
- 8007f98: b084 sub sp, #16
- 8007f9a: 685a ldr r2, [r3, #4]
- 8007f9c: 2003 movs r0, #3
- 8007f9e: f88d 000c strb.w r0, [sp, #12]
- 8007fa2: 79dc ldrb r4, [r3, #7]
- 8007fa4: f88d 400d strb.w r4, [sp, #13]
- 8007fa8: 0212 lsls r2, r2, #8
- 8007faa: 3308 adds r3, #8
- 8007fac: 4608 mov r0, r1
- 8007fae: a901 add r1, sp, #4
- 8007fb0: 9201 str r2, [sp, #4]
- 8007fb2: 9302 str r3, [sp, #8]
- 8007fb4: f7ff fe8c bl 8007cd0 <__gnu_unwind_execute>
- 8007fb8: b004 add sp, #16
- 8007fba: bd10 pop {r4, pc}
-
-08007fbc <_Unwind_GetRegionStart>:
- 8007fbc: b508 push {r3, lr}
- 8007fbe: f7ff fe85 bl 8007ccc <unwind_UCB_from_context>
- 8007fc2: 6c80 ldr r0, [r0, #72] ; 0x48
- 8007fc4: bd08 pop {r3, pc}
- 8007fc6: bf00 nop
-
-08007fc8 <_Unwind_GetLanguageSpecificData>:
- 8007fc8: b508 push {r3, lr}
- 8007fca: f7ff fe7f bl 8007ccc <unwind_UCB_from_context>
- 8007fce: 6cc0 ldr r0, [r0, #76] ; 0x4c
- 8007fd0: 79c3 ldrb r3, [r0, #7]
- 8007fd2: eb00 0083 add.w r0, r0, r3, lsl #2
- 8007fd6: 3008 adds r0, #8
- 8007fd8: bd08 pop {r3, pc}
- 8007fda: bf00 nop
-
-08007fdc <_Unwind_GetDataRelBase>:
- 8007fdc: b508 push {r3, lr}
- 8007fde: f005 fd2b bl 800da38 <abort>
- 8007fe2: bf00 nop
-
-08007fe4 <_Unwind_GetTextRelBase>:
- 8007fe4: b508 push {r3, lr}
- 8007fe6: f7ff fff9 bl 8007fdc <_Unwind_GetDataRelBase>
- 8007fea: bf00 nop
-
-08007fec <__aeabi_idiv0>:
- 8007fec: 4770 bx lr
- 8007fee: bf00 nop
-
-08007ff0 <HAL_Init>:
- * need to ensure that the SysTick time base is always set to 1 millisecond
- * to have correct HAL operation.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_Init(void)
-{
- 8007ff0: b580 push {r7, lr}
- 8007ff2: af00 add r7, sp, #0
-#if (PREFETCH_ENABLE != 0U)
- __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
-#endif /* PREFETCH_ENABLE */
-
- /* Set Interrupt Group Priority */
- HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
- 8007ff4: 2003 movs r0, #3
- 8007ff6: f000 f92d bl 8008254 <HAL_NVIC_SetPriorityGrouping>
-
- /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
- HAL_InitTick(TICK_INT_PRIORITY);
- 8007ffa: 2000 movs r0, #0
- 8007ffc: f000 f806 bl 800800c <HAL_InitTick>
-
- /* Init the low level hardware */
- HAL_MspInit();
- 8008000: f004 fab8 bl 800c574 <HAL_MspInit>
-
- /* Return function status */
- return HAL_OK;
- 8008004: 2300 movs r3, #0
-}
- 8008006: 4618 mov r0, r3
- 8008008: bd80 pop {r7, pc}
- ...
-
-0800800c <HAL_InitTick>:
- * implementation in user file.
- * @param TickPriority Tick interrupt priority.
- * @retval HAL status
- */
-__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
-{
- 800800c: b580 push {r7, lr}
- 800800e: b082 sub sp, #8
- 8008010: af00 add r7, sp, #0
- 8008012: 6078 str r0, [r7, #4]
- /* Configure the SysTick to have interrupt in 1ms time basis*/
- if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
- 8008014: 4b12 ldr r3, [pc, #72] ; (8008060 <HAL_InitTick+0x54>)
- 8008016: 681a ldr r2, [r3, #0]
- 8008018: 4b12 ldr r3, [pc, #72] ; (8008064 <HAL_InitTick+0x58>)
- 800801a: 781b ldrb r3, [r3, #0]
- 800801c: 4619 mov r1, r3
- 800801e: f44f 737a mov.w r3, #1000 ; 0x3e8
- 8008022: fbb3 f3f1 udiv r3, r3, r1
- 8008026: fbb2 f3f3 udiv r3, r2, r3
- 800802a: 4618 mov r0, r3
- 800802c: f000 f939 bl 80082a2 <HAL_SYSTICK_Config>
- 8008030: 4603 mov r3, r0
- 8008032: 2b00 cmp r3, #0
- 8008034: d001 beq.n 800803a <HAL_InitTick+0x2e>
- {
- return HAL_ERROR;
- 8008036: 2301 movs r3, #1
- 8008038: e00e b.n 8008058 <HAL_InitTick+0x4c>
- }
-
- /* Configure the SysTick IRQ priority */
- if (TickPriority < (1UL << __NVIC_PRIO_BITS))
- 800803a: 687b ldr r3, [r7, #4]
- 800803c: 2b0f cmp r3, #15
- 800803e: d80a bhi.n 8008056 <HAL_InitTick+0x4a>
- {
- HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
- 8008040: 2200 movs r2, #0
- 8008042: 6879 ldr r1, [r7, #4]
- 8008044: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
- 8008048: f000 f90f bl 800826a <HAL_NVIC_SetPriority>
- uwTickPrio = TickPriority;
- 800804c: 4a06 ldr r2, [pc, #24] ; (8008068 <HAL_InitTick+0x5c>)
- 800804e: 687b ldr r3, [r7, #4]
- 8008050: 6013 str r3, [r2, #0]
- {
- return HAL_ERROR;
- }
-
- /* Return function status */
- return HAL_OK;
- 8008052: 2300 movs r3, #0
- 8008054: e000 b.n 8008058 <HAL_InitTick+0x4c>
- return HAL_ERROR;
- 8008056: 2301 movs r3, #1
-}
- 8008058: 4618 mov r0, r3
- 800805a: 3708 adds r7, #8
- 800805c: 46bd mov sp, r7
- 800805e: bd80 pop {r7, pc}
- 8008060: 20000008 .word 0x20000008
- 8008064: 20000004 .word 0x20000004
- 8008068: 20000000 .word 0x20000000
-
-0800806c <HAL_IncTick>:
- * @note This function is declared as __weak to be overwritten in case of other
- * implementations in user file.
- * @retval None
- */
-__weak void HAL_IncTick(void)
-{
- 800806c: b480 push {r7}
- 800806e: af00 add r7, sp, #0
- uwTick += uwTickFreq;
- 8008070: 4b06 ldr r3, [pc, #24] ; (800808c <HAL_IncTick+0x20>)
- 8008072: 781b ldrb r3, [r3, #0]
- 8008074: 461a mov r2, r3
- 8008076: 4b06 ldr r3, [pc, #24] ; (8008090 <HAL_IncTick+0x24>)
- 8008078: 681b ldr r3, [r3, #0]
- 800807a: 4413 add r3, r2
- 800807c: 4a04 ldr r2, [pc, #16] ; (8008090 <HAL_IncTick+0x24>)
- 800807e: 6013 str r3, [r2, #0]
-}
- 8008080: bf00 nop
- 8008082: 46bd mov sp, r7
- 8008084: f85d 7b04 ldr.w r7, [sp], #4
- 8008088: 4770 bx lr
- 800808a: bf00 nop
- 800808c: 20000004 .word 0x20000004
- 8008090: 20000af8 .word 0x20000af8
-
-08008094 <HAL_GetTick>:
- * @note This function is declared as __weak to be overwritten in case of other
- * implementations in user file.
- * @retval tick value
- */
-__weak uint32_t HAL_GetTick(void)
-{
- 8008094: b480 push {r7}
- 8008096: af00 add r7, sp, #0
- return uwTick;
- 8008098: 4b03 ldr r3, [pc, #12] ; (80080a8 <HAL_GetTick+0x14>)
- 800809a: 681b ldr r3, [r3, #0]
-}
- 800809c: 4618 mov r0, r3
- 800809e: 46bd mov sp, r7
- 80080a0: f85d 7b04 ldr.w r7, [sp], #4
- 80080a4: 4770 bx lr
- 80080a6: bf00 nop
- 80080a8: 20000af8 .word 0x20000af8
-
-080080ac <HAL_Delay>:
- * implementations in user file.
- * @param Delay specifies the delay time length, in milliseconds.
- * @retval None
- */
-__weak void HAL_Delay(uint32_t Delay)
-{
- 80080ac: b580 push {r7, lr}
- 80080ae: b084 sub sp, #16
- 80080b0: af00 add r7, sp, #0
- 80080b2: 6078 str r0, [r7, #4]
- uint32_t tickstart = HAL_GetTick();
- 80080b4: f7ff ffee bl 8008094 <HAL_GetTick>
- 80080b8: 60b8 str r0, [r7, #8]
- uint32_t wait = Delay;
- 80080ba: 687b ldr r3, [r7, #4]
- 80080bc: 60fb str r3, [r7, #12]
-
- /* Add a freq to guarantee minimum wait */
- if (wait < HAL_MAX_DELAY)
- 80080be: 68fb ldr r3, [r7, #12]
- 80080c0: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff
- 80080c4: d005 beq.n 80080d2 <HAL_Delay+0x26>
- {
- wait += (uint32_t)(uwTickFreq);
- 80080c6: 4b09 ldr r3, [pc, #36] ; (80080ec <HAL_Delay+0x40>)
- 80080c8: 781b ldrb r3, [r3, #0]
- 80080ca: 461a mov r2, r3
- 80080cc: 68fb ldr r3, [r7, #12]
- 80080ce: 4413 add r3, r2
- 80080d0: 60fb str r3, [r7, #12]
- }
-
- while ((HAL_GetTick() - tickstart) < wait)
- 80080d2: bf00 nop
- 80080d4: f7ff ffde bl 8008094 <HAL_GetTick>
- 80080d8: 4602 mov r2, r0
- 80080da: 68bb ldr r3, [r7, #8]
- 80080dc: 1ad3 subs r3, r2, r3
- 80080de: 68fa ldr r2, [r7, #12]
- 80080e0: 429a cmp r2, r3
- 80080e2: d8f7 bhi.n 80080d4 <HAL_Delay+0x28>
- {
- }
-}
- 80080e4: bf00 nop
- 80080e6: 3710 adds r7, #16
- 80080e8: 46bd mov sp, r7
- 80080ea: bd80 pop {r7, pc}
- 80080ec: 20000004 .word 0x20000004
-
-080080f0 <__NVIC_SetPriorityGrouping>:
- In case of a conflict between priority grouping and available
- priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
- \param [in] PriorityGroup Priority grouping field.
- */
-__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
-{
- 80080f0: b480 push {r7}
- 80080f2: b085 sub sp, #20
- 80080f4: af00 add r7, sp, #0
- 80080f6: 6078 str r0, [r7, #4]
- uint32_t reg_value;
- uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
- 80080f8: 687b ldr r3, [r7, #4]
- 80080fa: f003 0307 and.w r3, r3, #7
- 80080fe: 60fb str r3, [r7, #12]
-
- reg_value = SCB->AIRCR; /* read old register configuration */
- 8008100: 4b0b ldr r3, [pc, #44] ; (8008130 <__NVIC_SetPriorityGrouping+0x40>)
- 8008102: 68db ldr r3, [r3, #12]
- 8008104: 60bb str r3, [r7, #8]
- reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
- 8008106: 68ba ldr r2, [r7, #8]
- 8008108: f64f 03ff movw r3, #63743 ; 0xf8ff
- 800810c: 4013 ands r3, r2
- 800810e: 60bb str r3, [r7, #8]
- reg_value = (reg_value |
- ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
- (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */
- 8008110: 68fb ldr r3, [r7, #12]
- 8008112: 021a lsls r2, r3, #8
- ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
- 8008114: 68bb ldr r3, [r7, #8]
- 8008116: 431a orrs r2, r3
- reg_value = (reg_value |
- 8008118: 4b06 ldr r3, [pc, #24] ; (8008134 <__NVIC_SetPriorityGrouping+0x44>)
- 800811a: 4313 orrs r3, r2
- 800811c: 60bb str r3, [r7, #8]
- SCB->AIRCR = reg_value;
- 800811e: 4a04 ldr r2, [pc, #16] ; (8008130 <__NVIC_SetPriorityGrouping+0x40>)
- 8008120: 68bb ldr r3, [r7, #8]
- 8008122: 60d3 str r3, [r2, #12]
-}
- 8008124: bf00 nop
- 8008126: 3714 adds r7, #20
- 8008128: 46bd mov sp, r7
- 800812a: f85d 7b04 ldr.w r7, [sp], #4
- 800812e: 4770 bx lr
- 8008130: e000ed00 .word 0xe000ed00
- 8008134: 05fa0000 .word 0x05fa0000
-
-08008138 <__NVIC_GetPriorityGrouping>:
- \brief Get Priority Grouping
- \details Reads the priority grouping field from the NVIC Interrupt Controller.
- \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
- */
-__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
-{
- 8008138: b480 push {r7}
- 800813a: af00 add r7, sp, #0
- return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
- 800813c: 4b04 ldr r3, [pc, #16] ; (8008150 <__NVIC_GetPriorityGrouping+0x18>)
- 800813e: 68db ldr r3, [r3, #12]
- 8008140: 0a1b lsrs r3, r3, #8
- 8008142: f003 0307 and.w r3, r3, #7
-}
- 8008146: 4618 mov r0, r3
- 8008148: 46bd mov sp, r7
- 800814a: f85d 7b04 ldr.w r7, [sp], #4
- 800814e: 4770 bx lr
- 8008150: e000ed00 .word 0xe000ed00
-
-08008154 <__NVIC_SetPriority>:
- \param [in] IRQn Interrupt number.
- \param [in] priority Priority to set.
- \note The priority cannot be set for every processor exception.
- */
-__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
- 8008154: b480 push {r7}
- 8008156: b083 sub sp, #12
- 8008158: af00 add r7, sp, #0
- 800815a: 4603 mov r3, r0
- 800815c: 6039 str r1, [r7, #0]
- 800815e: 71fb strb r3, [r7, #7]
- if ((int32_t)(IRQn) >= 0)
- 8008160: f997 3007 ldrsb.w r3, [r7, #7]
- 8008164: 2b00 cmp r3, #0
- 8008166: db0a blt.n 800817e <__NVIC_SetPriority+0x2a>
- {
- NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
- 8008168: 683b ldr r3, [r7, #0]
- 800816a: b2da uxtb r2, r3
- 800816c: 490c ldr r1, [pc, #48] ; (80081a0 <__NVIC_SetPriority+0x4c>)
- 800816e: f997 3007 ldrsb.w r3, [r7, #7]
- 8008172: 0112 lsls r2, r2, #4
- 8008174: b2d2 uxtb r2, r2
- 8008176: 440b add r3, r1
- 8008178: f883 2300 strb.w r2, [r3, #768] ; 0x300
- }
- else
- {
- SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
- }
-}
- 800817c: e00a b.n 8008194 <__NVIC_SetPriority+0x40>
- SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
- 800817e: 683b ldr r3, [r7, #0]
- 8008180: b2da uxtb r2, r3
- 8008182: 4908 ldr r1, [pc, #32] ; (80081a4 <__NVIC_SetPriority+0x50>)
- 8008184: 79fb ldrb r3, [r7, #7]
- 8008186: f003 030f and.w r3, r3, #15
- 800818a: 3b04 subs r3, #4
- 800818c: 0112 lsls r2, r2, #4
- 800818e: b2d2 uxtb r2, r2
- 8008190: 440b add r3, r1
- 8008192: 761a strb r2, [r3, #24]
-}
- 8008194: bf00 nop
- 8008196: 370c adds r7, #12
- 8008198: 46bd mov sp, r7
- 800819a: f85d 7b04 ldr.w r7, [sp], #4
- 800819e: 4770 bx lr
- 80081a0: e000e100 .word 0xe000e100
- 80081a4: e000ed00 .word 0xe000ed00
-
-080081a8 <NVIC_EncodePriority>:
- \param [in] PreemptPriority Preemptive priority value (starting from 0).
- \param [in] SubPriority Subpriority value (starting from 0).
- \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
- */
-__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
-{
- 80081a8: b480 push {r7}
- 80081aa: b089 sub sp, #36 ; 0x24
- 80081ac: af00 add r7, sp, #0
- 80081ae: 60f8 str r0, [r7, #12]
- 80081b0: 60b9 str r1, [r7, #8]
- 80081b2: 607a str r2, [r7, #4]
- uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
- 80081b4: 68fb ldr r3, [r7, #12]
- 80081b6: f003 0307 and.w r3, r3, #7
- 80081ba: 61fb str r3, [r7, #28]
- uint32_t PreemptPriorityBits;
- uint32_t SubPriorityBits;
-
- PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
- 80081bc: 69fb ldr r3, [r7, #28]
- 80081be: f1c3 0307 rsb r3, r3, #7
- 80081c2: 2b04 cmp r3, #4
- 80081c4: bf28 it cs
- 80081c6: 2304 movcs r3, #4
- 80081c8: 61bb str r3, [r7, #24]
- SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
- 80081ca: 69fb ldr r3, [r7, #28]
- 80081cc: 3304 adds r3, #4
- 80081ce: 2b06 cmp r3, #6
- 80081d0: d902 bls.n 80081d8 <NVIC_EncodePriority+0x30>
- 80081d2: 69fb ldr r3, [r7, #28]
- 80081d4: 3b03 subs r3, #3
- 80081d6: e000 b.n 80081da <NVIC_EncodePriority+0x32>
- 80081d8: 2300 movs r3, #0
- 80081da: 617b str r3, [r7, #20]
-
- return (
- ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
- 80081dc: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff
- 80081e0: 69bb ldr r3, [r7, #24]
- 80081e2: fa02 f303 lsl.w r3, r2, r3
- 80081e6: 43da mvns r2, r3
- 80081e8: 68bb ldr r3, [r7, #8]
- 80081ea: 401a ands r2, r3
- 80081ec: 697b ldr r3, [r7, #20]
- 80081ee: 409a lsls r2, r3
- ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
- 80081f0: f04f 31ff mov.w r1, #4294967295 ; 0xffffffff
- 80081f4: 697b ldr r3, [r7, #20]
- 80081f6: fa01 f303 lsl.w r3, r1, r3
- 80081fa: 43d9 mvns r1, r3
- 80081fc: 687b ldr r3, [r7, #4]
- 80081fe: 400b ands r3, r1
- ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
- 8008200: 4313 orrs r3, r2
- );
-}
- 8008202: 4618 mov r0, r3
- 8008204: 3724 adds r7, #36 ; 0x24
- 8008206: 46bd mov sp, r7
- 8008208: f85d 7b04 ldr.w r7, [sp], #4
- 800820c: 4770 bx lr
- ...
-
-08008210 <SysTick_Config>:
- \note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
- function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
- must contain a vendor-specific implementation of this function.
- */
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
-{
- 8008210: b580 push {r7, lr}
- 8008212: b082 sub sp, #8
- 8008214: af00 add r7, sp, #0
- 8008216: 6078 str r0, [r7, #4]
- if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
- 8008218: 687b ldr r3, [r7, #4]
- 800821a: 3b01 subs r3, #1
- 800821c: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000
- 8008220: d301 bcc.n 8008226 <SysTick_Config+0x16>
- {
- return (1UL); /* Reload value impossible */
- 8008222: 2301 movs r3, #1
- 8008224: e00f b.n 8008246 <SysTick_Config+0x36>
- }
-
- SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
- 8008226: 4a0a ldr r2, [pc, #40] ; (8008250 <SysTick_Config+0x40>)
- 8008228: 687b ldr r3, [r7, #4]
- 800822a: 3b01 subs r3, #1
- 800822c: 6053 str r3, [r2, #4]
- NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
- 800822e: 210f movs r1, #15
- 8008230: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
- 8008234: f7ff ff8e bl 8008154 <__NVIC_SetPriority>
- SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
- 8008238: 4b05 ldr r3, [pc, #20] ; (8008250 <SysTick_Config+0x40>)
- 800823a: 2200 movs r2, #0
- 800823c: 609a str r2, [r3, #8]
- SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
- 800823e: 4b04 ldr r3, [pc, #16] ; (8008250 <SysTick_Config+0x40>)
- 8008240: 2207 movs r2, #7
- 8008242: 601a str r2, [r3, #0]
- SysTick_CTRL_TICKINT_Msk |
- SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
- return (0UL); /* Function successful */
- 8008244: 2300 movs r3, #0
-}
- 8008246: 4618 mov r0, r3
- 8008248: 3708 adds r7, #8
- 800824a: 46bd mov sp, r7
- 800824c: bd80 pop {r7, pc}
- 800824e: bf00 nop
- 8008250: e000e010 .word 0xe000e010
-
-08008254 <HAL_NVIC_SetPriorityGrouping>:
- * @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible.
- * The pending IRQ priority will be managed only by the subpriority.
- * @retval None
- */
-void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
-{
- 8008254: b580 push {r7, lr}
- 8008256: b082 sub sp, #8
- 8008258: af00 add r7, sp, #0
- 800825a: 6078 str r0, [r7, #4]
- /* Check the parameters */
- assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
-
- /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
- NVIC_SetPriorityGrouping(PriorityGroup);
- 800825c: 6878 ldr r0, [r7, #4]
- 800825e: f7ff ff47 bl 80080f0 <__NVIC_SetPriorityGrouping>
-}
- 8008262: bf00 nop
- 8008264: 3708 adds r7, #8
- 8008266: 46bd mov sp, r7
- 8008268: bd80 pop {r7, pc}
-
-0800826a <HAL_NVIC_SetPriority>:
- * This parameter can be a value between 0 and 15
- * A lower priority value indicates a higher priority.
- * @retval None
- */
-void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
-{
- 800826a: b580 push {r7, lr}
- 800826c: b086 sub sp, #24
- 800826e: af00 add r7, sp, #0
- 8008270: 4603 mov r3, r0
- 8008272: 60b9 str r1, [r7, #8]
- 8008274: 607a str r2, [r7, #4]
- 8008276: 73fb strb r3, [r7, #15]
- uint32_t prioritygroup = 0x00;
- 8008278: 2300 movs r3, #0
- 800827a: 617b str r3, [r7, #20]
-
- /* Check the parameters */
- assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
- assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
-
- prioritygroup = NVIC_GetPriorityGrouping();
- 800827c: f7ff ff5c bl 8008138 <__NVIC_GetPriorityGrouping>
- 8008280: 6178 str r0, [r7, #20]
-
- NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
- 8008282: 687a ldr r2, [r7, #4]
- 8008284: 68b9 ldr r1, [r7, #8]
- 8008286: 6978 ldr r0, [r7, #20]
- 8008288: f7ff ff8e bl 80081a8 <NVIC_EncodePriority>
- 800828c: 4602 mov r2, r0
- 800828e: f997 300f ldrsb.w r3, [r7, #15]
- 8008292: 4611 mov r1, r2
- 8008294: 4618 mov r0, r3
- 8008296: f7ff ff5d bl 8008154 <__NVIC_SetPriority>
-}
- 800829a: bf00 nop
- 800829c: 3718 adds r7, #24
- 800829e: 46bd mov sp, r7
- 80082a0: bd80 pop {r7, pc}
-
-080082a2 <HAL_SYSTICK_Config>:
- * @param TicksNumb Specifies the ticks Number of ticks between two interrupts.
- * @retval status: - 0 Function succeeded.
- * - 1 Function failed.
- */
-uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
-{
- 80082a2: b580 push {r7, lr}
- 80082a4: b082 sub sp, #8
- 80082a6: af00 add r7, sp, #0
- 80082a8: 6078 str r0, [r7, #4]
- return SysTick_Config(TicksNumb);
- 80082aa: 6878 ldr r0, [r7, #4]
- 80082ac: f7ff ffb0 bl 8008210 <SysTick_Config>
- 80082b0: 4603 mov r3, r0
-}
- 80082b2: 4618 mov r0, r3
- 80082b4: 3708 adds r7, #8
- 80082b6: 46bd mov sp, r7
- 80082b8: bd80 pop {r7, pc}
-
-080082ba <HAL_DMA_Start_IT>:
- * @param DstAddress The destination memory Buffer address
- * @param DataLength The length of data to be transferred from source to destination
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
-{
- 80082ba: b580 push {r7, lr}
- 80082bc: b086 sub sp, #24
- 80082be: af00 add r7, sp, #0
- 80082c0: 60f8 str r0, [r7, #12]
- 80082c2: 60b9 str r1, [r7, #8]
- 80082c4: 607a str r2, [r7, #4]
- 80082c6: 603b str r3, [r7, #0]
- HAL_StatusTypeDef status = HAL_OK;
- 80082c8: 2300 movs r3, #0
- 80082ca: 75fb strb r3, [r7, #23]
-
- /* calculate DMA base and stream number */
- DMA_Base_Registers *regs = (DMA_Base_Registers *)hdma->StreamBaseAddress;
- 80082cc: 68fb ldr r3, [r7, #12]
- 80082ce: 6d9b ldr r3, [r3, #88] ; 0x58
- 80082d0: 613b str r3, [r7, #16]
-
- /* Check the parameters */
- assert_param(IS_DMA_BUFFER_SIZE(DataLength));
-
- /* Process locked */
- __HAL_LOCK(hdma);
- 80082d2: 68fb ldr r3, [r7, #12]
- 80082d4: f893 3034 ldrb.w r3, [r3, #52] ; 0x34
- 80082d8: 2b01 cmp r3, #1
- 80082da: d101 bne.n 80082e0 <HAL_DMA_Start_IT+0x26>
- 80082dc: 2302 movs r3, #2
- 80082de: e048 b.n 8008372 <HAL_DMA_Start_IT+0xb8>
- 80082e0: 68fb ldr r3, [r7, #12]
- 80082e2: 2201 movs r2, #1
- 80082e4: f883 2034 strb.w r2, [r3, #52] ; 0x34
-
- if(HAL_DMA_STATE_READY == hdma->State)
- 80082e8: 68fb ldr r3, [r7, #12]
- 80082ea: f893 3035 ldrb.w r3, [r3, #53] ; 0x35
- 80082ee: b2db uxtb r3, r3
- 80082f0: 2b01 cmp r3, #1
- 80082f2: d137 bne.n 8008364 <HAL_DMA_Start_IT+0xaa>
- {
- /* Change DMA peripheral state */
- hdma->State = HAL_DMA_STATE_BUSY;
- 80082f4: 68fb ldr r3, [r7, #12]
- 80082f6: 2202 movs r2, #2
- 80082f8: f883 2035 strb.w r2, [r3, #53] ; 0x35
-
- /* Initialize the error code */
- hdma->ErrorCode = HAL_DMA_ERROR_NONE;
- 80082fc: 68fb ldr r3, [r7, #12]
- 80082fe: 2200 movs r2, #0
- 8008300: 655a str r2, [r3, #84] ; 0x54
-
- /* Configure the source, destination address and the data length */
- DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
- 8008302: 683b ldr r3, [r7, #0]
- 8008304: 687a ldr r2, [r7, #4]
- 8008306: 68b9 ldr r1, [r7, #8]
- 8008308: 68f8 ldr r0, [r7, #12]
- 800830a: f000 f836 bl 800837a <DMA_SetConfig>
-
- /* Clear all interrupt flags at correct offset within the register */
- regs->IFCR = 0x3FU << hdma->StreamIndex;
- 800830e: 68fb ldr r3, [r7, #12]
- 8008310: 6ddb ldr r3, [r3, #92] ; 0x5c
- 8008312: 223f movs r2, #63 ; 0x3f
- 8008314: 409a lsls r2, r3
- 8008316: 693b ldr r3, [r7, #16]
- 8008318: 609a str r2, [r3, #8]
-
- /* Enable Common interrupts*/
- hdma->Instance->CR |= DMA_IT_TC | DMA_IT_TE | DMA_IT_DME;
- 800831a: 68fb ldr r3, [r7, #12]
- 800831c: 681b ldr r3, [r3, #0]
- 800831e: 681a ldr r2, [r3, #0]
- 8008320: 68fb ldr r3, [r7, #12]
- 8008322: 681b ldr r3, [r3, #0]
- 8008324: f042 0216 orr.w r2, r2, #22
- 8008328: 601a str r2, [r3, #0]
- hdma->Instance->FCR |= DMA_IT_FE;
- 800832a: 68fb ldr r3, [r7, #12]
- 800832c: 681b ldr r3, [r3, #0]
- 800832e: 695a ldr r2, [r3, #20]
- 8008330: 68fb ldr r3, [r7, #12]
- 8008332: 681b ldr r3, [r3, #0]
- 8008334: f042 0280 orr.w r2, r2, #128 ; 0x80
- 8008338: 615a str r2, [r3, #20]
-
- if(hdma->XferHalfCpltCallback != NULL)
- 800833a: 68fb ldr r3, [r7, #12]
- 800833c: 6c1b ldr r3, [r3, #64] ; 0x40
- 800833e: 2b00 cmp r3, #0
- 8008340: d007 beq.n 8008352 <HAL_DMA_Start_IT+0x98>
- {
- hdma->Instance->CR |= DMA_IT_HT;
- 8008342: 68fb ldr r3, [r7, #12]
- 8008344: 681b ldr r3, [r3, #0]
- 8008346: 681a ldr r2, [r3, #0]
- 8008348: 68fb ldr r3, [r7, #12]
- 800834a: 681b ldr r3, [r3, #0]
- 800834c: f042 0208 orr.w r2, r2, #8
- 8008350: 601a str r2, [r3, #0]
- }
-
- /* Enable the Peripheral */
- __HAL_DMA_ENABLE(hdma);
- 8008352: 68fb ldr r3, [r7, #12]
- 8008354: 681b ldr r3, [r3, #0]
- 8008356: 681a ldr r2, [r3, #0]
- 8008358: 68fb ldr r3, [r7, #12]
- 800835a: 681b ldr r3, [r3, #0]
- 800835c: f042 0201 orr.w r2, r2, #1
- 8008360: 601a str r2, [r3, #0]
- 8008362: e005 b.n 8008370 <HAL_DMA_Start_IT+0xb6>
- }
- else
- {
- /* Process unlocked */
- __HAL_UNLOCK(hdma);
- 8008364: 68fb ldr r3, [r7, #12]
- 8008366: 2200 movs r2, #0
- 8008368: f883 2034 strb.w r2, [r3, #52] ; 0x34
-
- /* Return error status */
- status = HAL_BUSY;
- 800836c: 2302 movs r3, #2
- 800836e: 75fb strb r3, [r7, #23]
- }
-
- return status;
- 8008370: 7dfb ldrb r3, [r7, #23]
-}
- 8008372: 4618 mov r0, r3
- 8008374: 3718 adds r7, #24
- 8008376: 46bd mov sp, r7
- 8008378: bd80 pop {r7, pc}
-
-0800837a <DMA_SetConfig>:
- * @param DstAddress The destination memory Buffer address
- * @param DataLength The length of data to be transferred from source to destination
- * @retval HAL status
- */
-static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
-{
- 800837a: b480 push {r7}
- 800837c: b085 sub sp, #20
- 800837e: af00 add r7, sp, #0
- 8008380: 60f8 str r0, [r7, #12]
- 8008382: 60b9 str r1, [r7, #8]
- 8008384: 607a str r2, [r7, #4]
- 8008386: 603b str r3, [r7, #0]
- /* Clear DBM bit */
- hdma->Instance->CR &= (uint32_t)(~DMA_SxCR_DBM);
- 8008388: 68fb ldr r3, [r7, #12]
- 800838a: 681b ldr r3, [r3, #0]
- 800838c: 681a ldr r2, [r3, #0]
- 800838e: 68fb ldr r3, [r7, #12]
- 8008390: 681b ldr r3, [r3, #0]
- 8008392: f422 2280 bic.w r2, r2, #262144 ; 0x40000
- 8008396: 601a str r2, [r3, #0]
-
- /* Configure DMA Stream data length */
- hdma->Instance->NDTR = DataLength;
- 8008398: 68fb ldr r3, [r7, #12]
- 800839a: 681b ldr r3, [r3, #0]
- 800839c: 683a ldr r2, [r7, #0]
- 800839e: 605a str r2, [r3, #4]
-
- /* Memory to Peripheral */
- if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
- 80083a0: 68fb ldr r3, [r7, #12]
- 80083a2: 689b ldr r3, [r3, #8]
- 80083a4: 2b40 cmp r3, #64 ; 0x40
- 80083a6: d108 bne.n 80083ba <DMA_SetConfig+0x40>
- {
- /* Configure DMA Stream destination address */
- hdma->Instance->PAR = DstAddress;
- 80083a8: 68fb ldr r3, [r7, #12]
- 80083aa: 681b ldr r3, [r3, #0]
- 80083ac: 687a ldr r2, [r7, #4]
- 80083ae: 609a str r2, [r3, #8]
-
- /* Configure DMA Stream source address */
- hdma->Instance->M0AR = SrcAddress;
- 80083b0: 68fb ldr r3, [r7, #12]
- 80083b2: 681b ldr r3, [r3, #0]
- 80083b4: 68ba ldr r2, [r7, #8]
- 80083b6: 60da str r2, [r3, #12]
- hdma->Instance->PAR = SrcAddress;
-
- /* Configure DMA Stream destination address */
- hdma->Instance->M0AR = DstAddress;
- }
-}
- 80083b8: e007 b.n 80083ca <DMA_SetConfig+0x50>
- hdma->Instance->PAR = SrcAddress;
- 80083ba: 68fb ldr r3, [r7, #12]
- 80083bc: 681b ldr r3, [r3, #0]
- 80083be: 68ba ldr r2, [r7, #8]
- 80083c0: 609a str r2, [r3, #8]
- hdma->Instance->M0AR = DstAddress;
- 80083c2: 68fb ldr r3, [r7, #12]
- 80083c4: 681b ldr r3, [r3, #0]
- 80083c6: 687a ldr r2, [r7, #4]
- 80083c8: 60da str r2, [r3, #12]
-}
- 80083ca: bf00 nop
- 80083cc: 3714 adds r7, #20
- 80083ce: 46bd mov sp, r7
- 80083d0: f85d 7b04 ldr.w r7, [sp], #4
- 80083d4: 4770 bx lr
- ...
-
-080083d8 <HAL_GPIO_Init>:
- * @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains
- * the configuration information for the specified GPIO peripheral.
- * @retval None
- */
-void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
-{
- 80083d8: b480 push {r7}
- 80083da: b089 sub sp, #36 ; 0x24
- 80083dc: af00 add r7, sp, #0
- 80083de: 6078 str r0, [r7, #4]
- 80083e0: 6039 str r1, [r7, #0]
- uint32_t position = 0x00;
- 80083e2: 2300 movs r3, #0
- 80083e4: 61fb str r3, [r7, #28]
- uint32_t ioposition = 0x00;
- 80083e6: 2300 movs r3, #0
- 80083e8: 617b str r3, [r7, #20]
- uint32_t iocurrent = 0x00;
- 80083ea: 2300 movs r3, #0
- 80083ec: 613b str r3, [r7, #16]
- uint32_t temp = 0x00;
- 80083ee: 2300 movs r3, #0
- 80083f0: 61bb str r3, [r7, #24]
- assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
- assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
- assert_param(IS_GPIO_PULL(GPIO_Init->Pull));
-
- /* Configure the port pins */
- for(position = 0; position < GPIO_NUMBER; position++)
- 80083f2: 2300 movs r3, #0
- 80083f4: 61fb str r3, [r7, #28]
- 80083f6: e175 b.n 80086e4 <HAL_GPIO_Init+0x30c>
- {
- /* Get the IO position */
- ioposition = ((uint32_t)0x01) << position;
- 80083f8: 2201 movs r2, #1
- 80083fa: 69fb ldr r3, [r7, #28]
- 80083fc: fa02 f303 lsl.w r3, r2, r3
- 8008400: 617b str r3, [r7, #20]
- /* Get the current IO position */
- iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
- 8008402: 683b ldr r3, [r7, #0]
- 8008404: 681b ldr r3, [r3, #0]
- 8008406: 697a ldr r2, [r7, #20]
- 8008408: 4013 ands r3, r2
- 800840a: 613b str r3, [r7, #16]
-
- if(iocurrent == ioposition)
- 800840c: 693a ldr r2, [r7, #16]
- 800840e: 697b ldr r3, [r7, #20]
- 8008410: 429a cmp r2, r3
- 8008412: f040 8164 bne.w 80086de <HAL_GPIO_Init+0x306>
- {
- /*--------------------- GPIO Mode Configuration ------------------------*/
- /* In case of Alternate function mode selection */
- if((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
- 8008416: 683b ldr r3, [r7, #0]
- 8008418: 685b ldr r3, [r3, #4]
- 800841a: 2b02 cmp r3, #2
- 800841c: d003 beq.n 8008426 <HAL_GPIO_Init+0x4e>
- 800841e: 683b ldr r3, [r7, #0]
- 8008420: 685b ldr r3, [r3, #4]
- 8008422: 2b12 cmp r3, #18
- 8008424: d123 bne.n 800846e <HAL_GPIO_Init+0x96>
- {
- /* Check the Alternate function parameter */
- assert_param(IS_GPIO_AF(GPIO_Init->Alternate));
-
- /* Configure Alternate function mapped with the current IO */
- temp = GPIOx->AFR[position >> 3];
- 8008426: 69fb ldr r3, [r7, #28]
- 8008428: 08da lsrs r2, r3, #3
- 800842a: 687b ldr r3, [r7, #4]
- 800842c: 3208 adds r2, #8
- 800842e: f853 3022 ldr.w r3, [r3, r2, lsl #2]
- 8008432: 61bb str r3, [r7, #24]
- temp &= ~((uint32_t)0xF << ((uint32_t)(position & (uint32_t)0x07) * 4)) ;
- 8008434: 69fb ldr r3, [r7, #28]
- 8008436: f003 0307 and.w r3, r3, #7
- 800843a: 009b lsls r3, r3, #2
- 800843c: 220f movs r2, #15
- 800843e: fa02 f303 lsl.w r3, r2, r3
- 8008442: 43db mvns r3, r3
- 8008444: 69ba ldr r2, [r7, #24]
- 8008446: 4013 ands r3, r2
- 8008448: 61bb str r3, [r7, #24]
- temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & (uint32_t)0x07) * 4));
- 800844a: 683b ldr r3, [r7, #0]
- 800844c: 691a ldr r2, [r3, #16]
- 800844e: 69fb ldr r3, [r7, #28]
- 8008450: f003 0307 and.w r3, r3, #7
- 8008454: 009b lsls r3, r3, #2
- 8008456: fa02 f303 lsl.w r3, r2, r3
- 800845a: 69ba ldr r2, [r7, #24]
- 800845c: 4313 orrs r3, r2
- 800845e: 61bb str r3, [r7, #24]
- GPIOx->AFR[position >> 3] = temp;
- 8008460: 69fb ldr r3, [r7, #28]
- 8008462: 08da lsrs r2, r3, #3
- 8008464: 687b ldr r3, [r7, #4]
- 8008466: 3208 adds r2, #8
- 8008468: 69b9 ldr r1, [r7, #24]
- 800846a: f843 1022 str.w r1, [r3, r2, lsl #2]
- }
-
- /* Configure IO Direction mode (Input, Output, Alternate or Analog) */
- temp = GPIOx->MODER;
- 800846e: 687b ldr r3, [r7, #4]
- 8008470: 681b ldr r3, [r3, #0]
- 8008472: 61bb str r3, [r7, #24]
- temp &= ~(GPIO_MODER_MODER0 << (position * 2));
- 8008474: 69fb ldr r3, [r7, #28]
- 8008476: 005b lsls r3, r3, #1
- 8008478: 2203 movs r2, #3
- 800847a: fa02 f303 lsl.w r3, r2, r3
- 800847e: 43db mvns r3, r3
- 8008480: 69ba ldr r2, [r7, #24]
- 8008482: 4013 ands r3, r2
- 8008484: 61bb str r3, [r7, #24]
- temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2));
- 8008486: 683b ldr r3, [r7, #0]
- 8008488: 685b ldr r3, [r3, #4]
- 800848a: f003 0203 and.w r2, r3, #3
- 800848e: 69fb ldr r3, [r7, #28]
- 8008490: 005b lsls r3, r3, #1
- 8008492: fa02 f303 lsl.w r3, r2, r3
- 8008496: 69ba ldr r2, [r7, #24]
- 8008498: 4313 orrs r3, r2
- 800849a: 61bb str r3, [r7, #24]
- GPIOx->MODER = temp;
- 800849c: 687b ldr r3, [r7, #4]
- 800849e: 69ba ldr r2, [r7, #24]
- 80084a0: 601a str r2, [r3, #0]
-
- /* In case of Output or Alternate function mode selection */
- if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) ||
- 80084a2: 683b ldr r3, [r7, #0]
- 80084a4: 685b ldr r3, [r3, #4]
- 80084a6: 2b01 cmp r3, #1
- 80084a8: d00b beq.n 80084c2 <HAL_GPIO_Init+0xea>
- 80084aa: 683b ldr r3, [r7, #0]
- 80084ac: 685b ldr r3, [r3, #4]
- 80084ae: 2b02 cmp r3, #2
- 80084b0: d007 beq.n 80084c2 <HAL_GPIO_Init+0xea>
- (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
- 80084b2: 683b ldr r3, [r7, #0]
- 80084b4: 685b ldr r3, [r3, #4]
- if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) ||
- 80084b6: 2b11 cmp r3, #17
- 80084b8: d003 beq.n 80084c2 <HAL_GPIO_Init+0xea>
- (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
- 80084ba: 683b ldr r3, [r7, #0]
- 80084bc: 685b ldr r3, [r3, #4]
- 80084be: 2b12 cmp r3, #18
- 80084c0: d130 bne.n 8008524 <HAL_GPIO_Init+0x14c>
- {
- /* Check the Speed parameter */
- assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
- /* Configure the IO Speed */
- temp = GPIOx->OSPEEDR;
- 80084c2: 687b ldr r3, [r7, #4]
- 80084c4: 689b ldr r3, [r3, #8]
- 80084c6: 61bb str r3, [r7, #24]
- temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2));
- 80084c8: 69fb ldr r3, [r7, #28]
- 80084ca: 005b lsls r3, r3, #1
- 80084cc: 2203 movs r2, #3
- 80084ce: fa02 f303 lsl.w r3, r2, r3
- 80084d2: 43db mvns r3, r3
- 80084d4: 69ba ldr r2, [r7, #24]
- 80084d6: 4013 ands r3, r2
- 80084d8: 61bb str r3, [r7, #24]
- temp |= (GPIO_Init->Speed << (position * 2));
- 80084da: 683b ldr r3, [r7, #0]
- 80084dc: 68da ldr r2, [r3, #12]
- 80084de: 69fb ldr r3, [r7, #28]
- 80084e0: 005b lsls r3, r3, #1
- 80084e2: fa02 f303 lsl.w r3, r2, r3
- 80084e6: 69ba ldr r2, [r7, #24]
- 80084e8: 4313 orrs r3, r2
- 80084ea: 61bb str r3, [r7, #24]
- GPIOx->OSPEEDR = temp;
- 80084ec: 687b ldr r3, [r7, #4]
- 80084ee: 69ba ldr r2, [r7, #24]
- 80084f0: 609a str r2, [r3, #8]
-
- /* Configure the IO Output Type */
- temp = GPIOx->OTYPER;
- 80084f2: 687b ldr r3, [r7, #4]
- 80084f4: 685b ldr r3, [r3, #4]
- 80084f6: 61bb str r3, [r7, #24]
- temp &= ~(GPIO_OTYPER_OT_0 << position) ;
- 80084f8: 2201 movs r2, #1
- 80084fa: 69fb ldr r3, [r7, #28]
- 80084fc: fa02 f303 lsl.w r3, r2, r3
- 8008500: 43db mvns r3, r3
- 8008502: 69ba ldr r2, [r7, #24]
- 8008504: 4013 ands r3, r2
- 8008506: 61bb str r3, [r7, #24]
- temp |= (((GPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4) << position);
- 8008508: 683b ldr r3, [r7, #0]
- 800850a: 685b ldr r3, [r3, #4]
- 800850c: 091b lsrs r3, r3, #4
- 800850e: f003 0201 and.w r2, r3, #1
- 8008512: 69fb ldr r3, [r7, #28]
- 8008514: fa02 f303 lsl.w r3, r2, r3
- 8008518: 69ba ldr r2, [r7, #24]
- 800851a: 4313 orrs r3, r2
- 800851c: 61bb str r3, [r7, #24]
- GPIOx->OTYPER = temp;
- 800851e: 687b ldr r3, [r7, #4]
- 8008520: 69ba ldr r2, [r7, #24]
- 8008522: 605a str r2, [r3, #4]
- }
-
- /* Activate the Pull-up or Pull down resistor for the current IO */
- temp = GPIOx->PUPDR;
- 8008524: 687b ldr r3, [r7, #4]
- 8008526: 68db ldr r3, [r3, #12]
- 8008528: 61bb str r3, [r7, #24]
- temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2));
- 800852a: 69fb ldr r3, [r7, #28]
- 800852c: 005b lsls r3, r3, #1
- 800852e: 2203 movs r2, #3
- 8008530: fa02 f303 lsl.w r3, r2, r3
- 8008534: 43db mvns r3, r3
- 8008536: 69ba ldr r2, [r7, #24]
- 8008538: 4013 ands r3, r2
- 800853a: 61bb str r3, [r7, #24]
- temp |= ((GPIO_Init->Pull) << (position * 2));
- 800853c: 683b ldr r3, [r7, #0]
- 800853e: 689a ldr r2, [r3, #8]
- 8008540: 69fb ldr r3, [r7, #28]
- 8008542: 005b lsls r3, r3, #1
- 8008544: fa02 f303 lsl.w r3, r2, r3
- 8008548: 69ba ldr r2, [r7, #24]
- 800854a: 4313 orrs r3, r2
- 800854c: 61bb str r3, [r7, #24]
- GPIOx->PUPDR = temp;
- 800854e: 687b ldr r3, [r7, #4]
- 8008550: 69ba ldr r2, [r7, #24]
- 8008552: 60da str r2, [r3, #12]
-
- /*--------------------- EXTI Mode Configuration ------------------------*/
- /* Configure the External Interrupt or event for the current IO */
- if((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
- 8008554: 683b ldr r3, [r7, #0]
- 8008556: 685b ldr r3, [r3, #4]
- 8008558: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
- 800855c: 2b00 cmp r3, #0
- 800855e: f000 80be beq.w 80086de <HAL_GPIO_Init+0x306>
- {
- /* Enable SYSCFG Clock */
- __HAL_RCC_SYSCFG_CLK_ENABLE();
- 8008562: 4b65 ldr r3, [pc, #404] ; (80086f8 <HAL_GPIO_Init+0x320>)
- 8008564: 6c5b ldr r3, [r3, #68] ; 0x44
- 8008566: 4a64 ldr r2, [pc, #400] ; (80086f8 <HAL_GPIO_Init+0x320>)
- 8008568: f443 4380 orr.w r3, r3, #16384 ; 0x4000
- 800856c: 6453 str r3, [r2, #68] ; 0x44
- 800856e: 4b62 ldr r3, [pc, #392] ; (80086f8 <HAL_GPIO_Init+0x320>)
- 8008570: 6c5b ldr r3, [r3, #68] ; 0x44
- 8008572: f403 4380 and.w r3, r3, #16384 ; 0x4000
- 8008576: 60fb str r3, [r7, #12]
- 8008578: 68fb ldr r3, [r7, #12]
-
- temp = SYSCFG->EXTICR[position >> 2];
- 800857a: 4a60 ldr r2, [pc, #384] ; (80086fc <HAL_GPIO_Init+0x324>)
- 800857c: 69fb ldr r3, [r7, #28]
- 800857e: 089b lsrs r3, r3, #2
- 8008580: 3302 adds r3, #2
- 8008582: f852 3023 ldr.w r3, [r2, r3, lsl #2]
- 8008586: 61bb str r3, [r7, #24]
- temp &= ~(((uint32_t)0x0F) << (4 * (position & 0x03)));
- 8008588: 69fb ldr r3, [r7, #28]
- 800858a: f003 0303 and.w r3, r3, #3
- 800858e: 009b lsls r3, r3, #2
- 8008590: 220f movs r2, #15
- 8008592: fa02 f303 lsl.w r3, r2, r3
- 8008596: 43db mvns r3, r3
- 8008598: 69ba ldr r2, [r7, #24]
- 800859a: 4013 ands r3, r2
- 800859c: 61bb str r3, [r7, #24]
- temp |= ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4 * (position & 0x03)));
- 800859e: 687b ldr r3, [r7, #4]
- 80085a0: 4a57 ldr r2, [pc, #348] ; (8008700 <HAL_GPIO_Init+0x328>)
- 80085a2: 4293 cmp r3, r2
- 80085a4: d037 beq.n 8008616 <HAL_GPIO_Init+0x23e>
- 80085a6: 687b ldr r3, [r7, #4]
- 80085a8: 4a56 ldr r2, [pc, #344] ; (8008704 <HAL_GPIO_Init+0x32c>)
- 80085aa: 4293 cmp r3, r2
- 80085ac: d031 beq.n 8008612 <HAL_GPIO_Init+0x23a>
- 80085ae: 687b ldr r3, [r7, #4]
- 80085b0: 4a55 ldr r2, [pc, #340] ; (8008708 <HAL_GPIO_Init+0x330>)
- 80085b2: 4293 cmp r3, r2
- 80085b4: d02b beq.n 800860e <HAL_GPIO_Init+0x236>
- 80085b6: 687b ldr r3, [r7, #4]
- 80085b8: 4a54 ldr r2, [pc, #336] ; (800870c <HAL_GPIO_Init+0x334>)
- 80085ba: 4293 cmp r3, r2
- 80085bc: d025 beq.n 800860a <HAL_GPIO_Init+0x232>
- 80085be: 687b ldr r3, [r7, #4]
- 80085c0: 4a53 ldr r2, [pc, #332] ; (8008710 <HAL_GPIO_Init+0x338>)
- 80085c2: 4293 cmp r3, r2
- 80085c4: d01f beq.n 8008606 <HAL_GPIO_Init+0x22e>
- 80085c6: 687b ldr r3, [r7, #4]
- 80085c8: 4a52 ldr r2, [pc, #328] ; (8008714 <HAL_GPIO_Init+0x33c>)
- 80085ca: 4293 cmp r3, r2
- 80085cc: d019 beq.n 8008602 <HAL_GPIO_Init+0x22a>
- 80085ce: 687b ldr r3, [r7, #4]
- 80085d0: 4a51 ldr r2, [pc, #324] ; (8008718 <HAL_GPIO_Init+0x340>)
- 80085d2: 4293 cmp r3, r2
- 80085d4: d013 beq.n 80085fe <HAL_GPIO_Init+0x226>
- 80085d6: 687b ldr r3, [r7, #4]
- 80085d8: 4a50 ldr r2, [pc, #320] ; (800871c <HAL_GPIO_Init+0x344>)
- 80085da: 4293 cmp r3, r2
- 80085dc: d00d beq.n 80085fa <HAL_GPIO_Init+0x222>
- 80085de: 687b ldr r3, [r7, #4]
- 80085e0: 4a4f ldr r2, [pc, #316] ; (8008720 <HAL_GPIO_Init+0x348>)
- 80085e2: 4293 cmp r3, r2
- 80085e4: d007 beq.n 80085f6 <HAL_GPIO_Init+0x21e>
- 80085e6: 687b ldr r3, [r7, #4]
- 80085e8: 4a4e ldr r2, [pc, #312] ; (8008724 <HAL_GPIO_Init+0x34c>)
- 80085ea: 4293 cmp r3, r2
- 80085ec: d101 bne.n 80085f2 <HAL_GPIO_Init+0x21a>
- 80085ee: 2309 movs r3, #9
- 80085f0: e012 b.n 8008618 <HAL_GPIO_Init+0x240>
- 80085f2: 230a movs r3, #10
- 80085f4: e010 b.n 8008618 <HAL_GPIO_Init+0x240>
- 80085f6: 2308 movs r3, #8
- 80085f8: e00e b.n 8008618 <HAL_GPIO_Init+0x240>
- 80085fa: 2307 movs r3, #7
- 80085fc: e00c b.n 8008618 <HAL_GPIO_Init+0x240>
- 80085fe: 2306 movs r3, #6
- 8008600: e00a b.n 8008618 <HAL_GPIO_Init+0x240>
- 8008602: 2305 movs r3, #5
- 8008604: e008 b.n 8008618 <HAL_GPIO_Init+0x240>
- 8008606: 2304 movs r3, #4
- 8008608: e006 b.n 8008618 <HAL_GPIO_Init+0x240>
- 800860a: 2303 movs r3, #3
- 800860c: e004 b.n 8008618 <HAL_GPIO_Init+0x240>
- 800860e: 2302 movs r3, #2
- 8008610: e002 b.n 8008618 <HAL_GPIO_Init+0x240>
- 8008612: 2301 movs r3, #1
- 8008614: e000 b.n 8008618 <HAL_GPIO_Init+0x240>
- 8008616: 2300 movs r3, #0
- 8008618: 69fa ldr r2, [r7, #28]
- 800861a: f002 0203 and.w r2, r2, #3
- 800861e: 0092 lsls r2, r2, #2
- 8008620: 4093 lsls r3, r2
- 8008622: 69ba ldr r2, [r7, #24]
- 8008624: 4313 orrs r3, r2
- 8008626: 61bb str r3, [r7, #24]
- SYSCFG->EXTICR[position >> 2] = temp;
- 8008628: 4934 ldr r1, [pc, #208] ; (80086fc <HAL_GPIO_Init+0x324>)
- 800862a: 69fb ldr r3, [r7, #28]
- 800862c: 089b lsrs r3, r3, #2
- 800862e: 3302 adds r3, #2
- 8008630: 69ba ldr r2, [r7, #24]
- 8008632: f841 2023 str.w r2, [r1, r3, lsl #2]
-
- /* Clear EXTI line configuration */
- temp = EXTI->IMR;
- 8008636: 4b3c ldr r3, [pc, #240] ; (8008728 <HAL_GPIO_Init+0x350>)
- 8008638: 681b ldr r3, [r3, #0]
- 800863a: 61bb str r3, [r7, #24]
- temp &= ~((uint32_t)iocurrent);
- 800863c: 693b ldr r3, [r7, #16]
- 800863e: 43db mvns r3, r3
- 8008640: 69ba ldr r2, [r7, #24]
- 8008642: 4013 ands r3, r2
- 8008644: 61bb str r3, [r7, #24]
- if((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
- 8008646: 683b ldr r3, [r7, #0]
- 8008648: 685b ldr r3, [r3, #4]
- 800864a: f403 3380 and.w r3, r3, #65536 ; 0x10000
- 800864e: 2b00 cmp r3, #0
- 8008650: d003 beq.n 800865a <HAL_GPIO_Init+0x282>
- {
- temp |= iocurrent;
- 8008652: 69ba ldr r2, [r7, #24]
- 8008654: 693b ldr r3, [r7, #16]
- 8008656: 4313 orrs r3, r2
- 8008658: 61bb str r3, [r7, #24]
- }
- EXTI->IMR = temp;
- 800865a: 4a33 ldr r2, [pc, #204] ; (8008728 <HAL_GPIO_Init+0x350>)
- 800865c: 69bb ldr r3, [r7, #24]
- 800865e: 6013 str r3, [r2, #0]
-
- temp = EXTI->EMR;
- 8008660: 4b31 ldr r3, [pc, #196] ; (8008728 <HAL_GPIO_Init+0x350>)
- 8008662: 685b ldr r3, [r3, #4]
- 8008664: 61bb str r3, [r7, #24]
- temp &= ~((uint32_t)iocurrent);
- 8008666: 693b ldr r3, [r7, #16]
- 8008668: 43db mvns r3, r3
- 800866a: 69ba ldr r2, [r7, #24]
- 800866c: 4013 ands r3, r2
- 800866e: 61bb str r3, [r7, #24]
- if((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
- 8008670: 683b ldr r3, [r7, #0]
- 8008672: 685b ldr r3, [r3, #4]
- 8008674: f403 3300 and.w r3, r3, #131072 ; 0x20000
- 8008678: 2b00 cmp r3, #0
- 800867a: d003 beq.n 8008684 <HAL_GPIO_Init+0x2ac>
- {
- temp |= iocurrent;
- 800867c: 69ba ldr r2, [r7, #24]
- 800867e: 693b ldr r3, [r7, #16]
- 8008680: 4313 orrs r3, r2
- 8008682: 61bb str r3, [r7, #24]
- }
- EXTI->EMR = temp;
- 8008684: 4a28 ldr r2, [pc, #160] ; (8008728 <HAL_GPIO_Init+0x350>)
- 8008686: 69bb ldr r3, [r7, #24]
- 8008688: 6053 str r3, [r2, #4]
-
- /* Clear Rising Falling edge configuration */
- temp = EXTI->RTSR;
- 800868a: 4b27 ldr r3, [pc, #156] ; (8008728 <HAL_GPIO_Init+0x350>)
- 800868c: 689b ldr r3, [r3, #8]
- 800868e: 61bb str r3, [r7, #24]
- temp &= ~((uint32_t)iocurrent);
- 8008690: 693b ldr r3, [r7, #16]
- 8008692: 43db mvns r3, r3
- 8008694: 69ba ldr r2, [r7, #24]
- 8008696: 4013 ands r3, r2
- 8008698: 61bb str r3, [r7, #24]
- if((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
- 800869a: 683b ldr r3, [r7, #0]
- 800869c: 685b ldr r3, [r3, #4]
- 800869e: f403 1380 and.w r3, r3, #1048576 ; 0x100000
- 80086a2: 2b00 cmp r3, #0
- 80086a4: d003 beq.n 80086ae <HAL_GPIO_Init+0x2d6>
- {
- temp |= iocurrent;
- 80086a6: 69ba ldr r2, [r7, #24]
- 80086a8: 693b ldr r3, [r7, #16]
- 80086aa: 4313 orrs r3, r2
- 80086ac: 61bb str r3, [r7, #24]
- }
- EXTI->RTSR = temp;
- 80086ae: 4a1e ldr r2, [pc, #120] ; (8008728 <HAL_GPIO_Init+0x350>)
- 80086b0: 69bb ldr r3, [r7, #24]
- 80086b2: 6093 str r3, [r2, #8]
-
- temp = EXTI->FTSR;
- 80086b4: 4b1c ldr r3, [pc, #112] ; (8008728 <HAL_GPIO_Init+0x350>)
- 80086b6: 68db ldr r3, [r3, #12]
- 80086b8: 61bb str r3, [r7, #24]
- temp &= ~((uint32_t)iocurrent);
- 80086ba: 693b ldr r3, [r7, #16]
- 80086bc: 43db mvns r3, r3
- 80086be: 69ba ldr r2, [r7, #24]
- 80086c0: 4013 ands r3, r2
- 80086c2: 61bb str r3, [r7, #24]
- if((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
- 80086c4: 683b ldr r3, [r7, #0]
- 80086c6: 685b ldr r3, [r3, #4]
- 80086c8: f403 1300 and.w r3, r3, #2097152 ; 0x200000
- 80086cc: 2b00 cmp r3, #0
- 80086ce: d003 beq.n 80086d8 <HAL_GPIO_Init+0x300>
- {
- temp |= iocurrent;
- 80086d0: 69ba ldr r2, [r7, #24]
- 80086d2: 693b ldr r3, [r7, #16]
- 80086d4: 4313 orrs r3, r2
- 80086d6: 61bb str r3, [r7, #24]
- }
- EXTI->FTSR = temp;
- 80086d8: 4a13 ldr r2, [pc, #76] ; (8008728 <HAL_GPIO_Init+0x350>)
- 80086da: 69bb ldr r3, [r7, #24]
- 80086dc: 60d3 str r3, [r2, #12]
- for(position = 0; position < GPIO_NUMBER; position++)
- 80086de: 69fb ldr r3, [r7, #28]
- 80086e0: 3301 adds r3, #1
- 80086e2: 61fb str r3, [r7, #28]
- 80086e4: 69fb ldr r3, [r7, #28]
- 80086e6: 2b0f cmp r3, #15
- 80086e8: f67f ae86 bls.w 80083f8 <HAL_GPIO_Init+0x20>
- }
- }
- }
-}
- 80086ec: bf00 nop
- 80086ee: 3724 adds r7, #36 ; 0x24
- 80086f0: 46bd mov sp, r7
- 80086f2: f85d 7b04 ldr.w r7, [sp], #4
- 80086f6: 4770 bx lr
- 80086f8: 40023800 .word 0x40023800
- 80086fc: 40013800 .word 0x40013800
- 8008700: 40020000 .word 0x40020000
- 8008704: 40020400 .word 0x40020400
- 8008708: 40020800 .word 0x40020800
- 800870c: 40020c00 .word 0x40020c00
- 8008710: 40021000 .word 0x40021000
- 8008714: 40021400 .word 0x40021400
- 8008718: 40021800 .word 0x40021800
- 800871c: 40021c00 .word 0x40021c00
- 8008720: 40022000 .word 0x40022000
- 8008724: 40022400 .word 0x40022400
- 8008728: 40013c00 .word 0x40013c00
-
-0800872c <HAL_RCC_OscConfig>:
- * supported by this function. User should request a transition to HSE Off
- * first and then HSE On or HSE Bypass.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
-{
- 800872c: b580 push {r7, lr}
- 800872e: b086 sub sp, #24
- 8008730: af00 add r7, sp, #0
- 8008732: 6078 str r0, [r7, #4]
- uint32_t tickstart;
- FlagStatus pwrclkchanged = RESET;
- 8008734: 2300 movs r3, #0
- 8008736: 75fb strb r3, [r7, #23]
-
- /* Check Null pointer */
- if(RCC_OscInitStruct == NULL)
- 8008738: 687b ldr r3, [r7, #4]
- 800873a: 2b00 cmp r3, #0
- 800873c: d101 bne.n 8008742 <HAL_RCC_OscConfig+0x16>
- {
- return HAL_ERROR;
- 800873e: 2301 movs r3, #1
- 8008740: e25e b.n 8008c00 <HAL_RCC_OscConfig+0x4d4>
-
- /* Check the parameters */
- assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
-
- /*------------------------------- HSE Configuration ------------------------*/
- if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
- 8008742: 687b ldr r3, [r7, #4]
- 8008744: 681b ldr r3, [r3, #0]
- 8008746: f003 0301 and.w r3, r3, #1
- 800874a: 2b00 cmp r3, #0
- 800874c: f000 8087 beq.w 800885e <HAL_RCC_OscConfig+0x132>
- {
- /* Check the parameters */
- assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
- /* When the HSE is used as system clock or clock source for PLL, It can not be disabled */
- if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE)
- 8008750: 4b96 ldr r3, [pc, #600] ; (80089ac <HAL_RCC_OscConfig+0x280>)
- 8008752: 689b ldr r3, [r3, #8]
- 8008754: f003 030c and.w r3, r3, #12
- 8008758: 2b04 cmp r3, #4
- 800875a: d00c beq.n 8008776 <HAL_RCC_OscConfig+0x4a>
- || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)))
- 800875c: 4b93 ldr r3, [pc, #588] ; (80089ac <HAL_RCC_OscConfig+0x280>)
- 800875e: 689b ldr r3, [r3, #8]
- 8008760: f003 030c and.w r3, r3, #12
- 8008764: 2b08 cmp r3, #8
- 8008766: d112 bne.n 800878e <HAL_RCC_OscConfig+0x62>
- 8008768: 4b90 ldr r3, [pc, #576] ; (80089ac <HAL_RCC_OscConfig+0x280>)
- 800876a: 685b ldr r3, [r3, #4]
- 800876c: f403 0380 and.w r3, r3, #4194304 ; 0x400000
- 8008770: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000
- 8008774: d10b bne.n 800878e <HAL_RCC_OscConfig+0x62>
- {
- if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
- 8008776: 4b8d ldr r3, [pc, #564] ; (80089ac <HAL_RCC_OscConfig+0x280>)
- 8008778: 681b ldr r3, [r3, #0]
- 800877a: f403 3300 and.w r3, r3, #131072 ; 0x20000
- 800877e: 2b00 cmp r3, #0
- 8008780: d06c beq.n 800885c <HAL_RCC_OscConfig+0x130>
- 8008782: 687b ldr r3, [r7, #4]
- 8008784: 685b ldr r3, [r3, #4]
- 8008786: 2b00 cmp r3, #0
- 8008788: d168 bne.n 800885c <HAL_RCC_OscConfig+0x130>
- {
- return HAL_ERROR;
- 800878a: 2301 movs r3, #1
- 800878c: e238 b.n 8008c00 <HAL_RCC_OscConfig+0x4d4>
- }
- }
- else
- {
- /* Set the new HSE configuration ---------------------------------------*/
- __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
- 800878e: 687b ldr r3, [r7, #4]
- 8008790: 685b ldr r3, [r3, #4]
- 8008792: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
- 8008796: d106 bne.n 80087a6 <HAL_RCC_OscConfig+0x7a>
- 8008798: 4b84 ldr r3, [pc, #528] ; (80089ac <HAL_RCC_OscConfig+0x280>)
- 800879a: 681b ldr r3, [r3, #0]
- 800879c: 4a83 ldr r2, [pc, #524] ; (80089ac <HAL_RCC_OscConfig+0x280>)
- 800879e: f443 3380 orr.w r3, r3, #65536 ; 0x10000
- 80087a2: 6013 str r3, [r2, #0]
- 80087a4: e02e b.n 8008804 <HAL_RCC_OscConfig+0xd8>
- 80087a6: 687b ldr r3, [r7, #4]
- 80087a8: 685b ldr r3, [r3, #4]
- 80087aa: 2b00 cmp r3, #0
- 80087ac: d10c bne.n 80087c8 <HAL_RCC_OscConfig+0x9c>
- 80087ae: 4b7f ldr r3, [pc, #508] ; (80089ac <HAL_RCC_OscConfig+0x280>)
- 80087b0: 681b ldr r3, [r3, #0]
- 80087b2: 4a7e ldr r2, [pc, #504] ; (80089ac <HAL_RCC_OscConfig+0x280>)
- 80087b4: f423 3380 bic.w r3, r3, #65536 ; 0x10000
- 80087b8: 6013 str r3, [r2, #0]
- 80087ba: 4b7c ldr r3, [pc, #496] ; (80089ac <HAL_RCC_OscConfig+0x280>)
- 80087bc: 681b ldr r3, [r3, #0]
- 80087be: 4a7b ldr r2, [pc, #492] ; (80089ac <HAL_RCC_OscConfig+0x280>)
- 80087c0: f423 2380 bic.w r3, r3, #262144 ; 0x40000
- 80087c4: 6013 str r3, [r2, #0]
- 80087c6: e01d b.n 8008804 <HAL_RCC_OscConfig+0xd8>
- 80087c8: 687b ldr r3, [r7, #4]
- 80087ca: 685b ldr r3, [r3, #4]
- 80087cc: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000
- 80087d0: d10c bne.n 80087ec <HAL_RCC_OscConfig+0xc0>
- 80087d2: 4b76 ldr r3, [pc, #472] ; (80089ac <HAL_RCC_OscConfig+0x280>)
- 80087d4: 681b ldr r3, [r3, #0]
- 80087d6: 4a75 ldr r2, [pc, #468] ; (80089ac <HAL_RCC_OscConfig+0x280>)
- 80087d8: f443 2380 orr.w r3, r3, #262144 ; 0x40000
- 80087dc: 6013 str r3, [r2, #0]
- 80087de: 4b73 ldr r3, [pc, #460] ; (80089ac <HAL_RCC_OscConfig+0x280>)
- 80087e0: 681b ldr r3, [r3, #0]
- 80087e2: 4a72 ldr r2, [pc, #456] ; (80089ac <HAL_RCC_OscConfig+0x280>)
- 80087e4: f443 3380 orr.w r3, r3, #65536 ; 0x10000
- 80087e8: 6013 str r3, [r2, #0]
- 80087ea: e00b b.n 8008804 <HAL_RCC_OscConfig+0xd8>
- 80087ec: 4b6f ldr r3, [pc, #444] ; (80089ac <HAL_RCC_OscConfig+0x280>)
- 80087ee: 681b ldr r3, [r3, #0]
- 80087f0: 4a6e ldr r2, [pc, #440] ; (80089ac <HAL_RCC_OscConfig+0x280>)
- 80087f2: f423 3380 bic.w r3, r3, #65536 ; 0x10000
- 80087f6: 6013 str r3, [r2, #0]
- 80087f8: 4b6c ldr r3, [pc, #432] ; (80089ac <HAL_RCC_OscConfig+0x280>)
- 80087fa: 681b ldr r3, [r3, #0]
- 80087fc: 4a6b ldr r2, [pc, #428] ; (80089ac <HAL_RCC_OscConfig+0x280>)
- 80087fe: f423 2380 bic.w r3, r3, #262144 ; 0x40000
- 8008802: 6013 str r3, [r2, #0]
-
- /* Check the HSE State */
- if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
- 8008804: 687b ldr r3, [r7, #4]
- 8008806: 685b ldr r3, [r3, #4]
- 8008808: 2b00 cmp r3, #0
- 800880a: d013 beq.n 8008834 <HAL_RCC_OscConfig+0x108>
- {
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 800880c: f7ff fc42 bl 8008094 <HAL_GetTick>
- 8008810: 6138 str r0, [r7, #16]
-
- /* Wait till HSE is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
- 8008812: e008 b.n 8008826 <HAL_RCC_OscConfig+0xfa>
- {
- if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
- 8008814: f7ff fc3e bl 8008094 <HAL_GetTick>
- 8008818: 4602 mov r2, r0
- 800881a: 693b ldr r3, [r7, #16]
- 800881c: 1ad3 subs r3, r2, r3
- 800881e: 2b64 cmp r3, #100 ; 0x64
- 8008820: d901 bls.n 8008826 <HAL_RCC_OscConfig+0xfa>
- {
- return HAL_TIMEOUT;
- 8008822: 2303 movs r3, #3
- 8008824: e1ec b.n 8008c00 <HAL_RCC_OscConfig+0x4d4>
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
- 8008826: 4b61 ldr r3, [pc, #388] ; (80089ac <HAL_RCC_OscConfig+0x280>)
- 8008828: 681b ldr r3, [r3, #0]
- 800882a: f403 3300 and.w r3, r3, #131072 ; 0x20000
- 800882e: 2b00 cmp r3, #0
- 8008830: d0f0 beq.n 8008814 <HAL_RCC_OscConfig+0xe8>
- 8008832: e014 b.n 800885e <HAL_RCC_OscConfig+0x132>
- }
- }
- else
- {
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 8008834: f7ff fc2e bl 8008094 <HAL_GetTick>
- 8008838: 6138 str r0, [r7, #16]
-
- /* Wait till HSE is bypassed or disabled */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
- 800883a: e008 b.n 800884e <HAL_RCC_OscConfig+0x122>
- {
- if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
- 800883c: f7ff fc2a bl 8008094 <HAL_GetTick>
- 8008840: 4602 mov r2, r0
- 8008842: 693b ldr r3, [r7, #16]
- 8008844: 1ad3 subs r3, r2, r3
- 8008846: 2b64 cmp r3, #100 ; 0x64
- 8008848: d901 bls.n 800884e <HAL_RCC_OscConfig+0x122>
- {
- return HAL_TIMEOUT;
- 800884a: 2303 movs r3, #3
- 800884c: e1d8 b.n 8008c00 <HAL_RCC_OscConfig+0x4d4>
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
- 800884e: 4b57 ldr r3, [pc, #348] ; (80089ac <HAL_RCC_OscConfig+0x280>)
- 8008850: 681b ldr r3, [r3, #0]
- 8008852: f403 3300 and.w r3, r3, #131072 ; 0x20000
- 8008856: 2b00 cmp r3, #0
- 8008858: d1f0 bne.n 800883c <HAL_RCC_OscConfig+0x110>
- 800885a: e000 b.n 800885e <HAL_RCC_OscConfig+0x132>
- if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
- 800885c: bf00 nop
- }
- }
- }
- }
- /*----------------------------- HSI Configuration --------------------------*/
- if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
- 800885e: 687b ldr r3, [r7, #4]
- 8008860: 681b ldr r3, [r3, #0]
- 8008862: f003 0302 and.w r3, r3, #2
- 8008866: 2b00 cmp r3, #0
- 8008868: d069 beq.n 800893e <HAL_RCC_OscConfig+0x212>
- /* Check the parameters */
- assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
- assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
-
- /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
- if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI)
- 800886a: 4b50 ldr r3, [pc, #320] ; (80089ac <HAL_RCC_OscConfig+0x280>)
- 800886c: 689b ldr r3, [r3, #8]
- 800886e: f003 030c and.w r3, r3, #12
- 8008872: 2b00 cmp r3, #0
- 8008874: d00b beq.n 800888e <HAL_RCC_OscConfig+0x162>
- || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)))
- 8008876: 4b4d ldr r3, [pc, #308] ; (80089ac <HAL_RCC_OscConfig+0x280>)
- 8008878: 689b ldr r3, [r3, #8]
- 800887a: f003 030c and.w r3, r3, #12
- 800887e: 2b08 cmp r3, #8
- 8008880: d11c bne.n 80088bc <HAL_RCC_OscConfig+0x190>
- 8008882: 4b4a ldr r3, [pc, #296] ; (80089ac <HAL_RCC_OscConfig+0x280>)
- 8008884: 685b ldr r3, [r3, #4]
- 8008886: f403 0380 and.w r3, r3, #4194304 ; 0x400000
- 800888a: 2b00 cmp r3, #0
- 800888c: d116 bne.n 80088bc <HAL_RCC_OscConfig+0x190>
- {
- /* When HSI is used as system clock it will not disabled */
- if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
- 800888e: 4b47 ldr r3, [pc, #284] ; (80089ac <HAL_RCC_OscConfig+0x280>)
- 8008890: 681b ldr r3, [r3, #0]
- 8008892: f003 0302 and.w r3, r3, #2
- 8008896: 2b00 cmp r3, #0
- 8008898: d005 beq.n 80088a6 <HAL_RCC_OscConfig+0x17a>
- 800889a: 687b ldr r3, [r7, #4]
- 800889c: 68db ldr r3, [r3, #12]
- 800889e: 2b01 cmp r3, #1
- 80088a0: d001 beq.n 80088a6 <HAL_RCC_OscConfig+0x17a>
- {
- return HAL_ERROR;
- 80088a2: 2301 movs r3, #1
- 80088a4: e1ac b.n 8008c00 <HAL_RCC_OscConfig+0x4d4>
- }
- /* Otherwise, just the calibration is allowed */
- else
- {
- /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
- __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
- 80088a6: 4b41 ldr r3, [pc, #260] ; (80089ac <HAL_RCC_OscConfig+0x280>)
- 80088a8: 681b ldr r3, [r3, #0]
- 80088aa: f023 02f8 bic.w r2, r3, #248 ; 0xf8
- 80088ae: 687b ldr r3, [r7, #4]
- 80088b0: 691b ldr r3, [r3, #16]
- 80088b2: 00db lsls r3, r3, #3
- 80088b4: 493d ldr r1, [pc, #244] ; (80089ac <HAL_RCC_OscConfig+0x280>)
- 80088b6: 4313 orrs r3, r2
- 80088b8: 600b str r3, [r1, #0]
- if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
- 80088ba: e040 b.n 800893e <HAL_RCC_OscConfig+0x212>
- }
- }
- else
- {
- /* Check the HSI State */
- if((RCC_OscInitStruct->HSIState)!= RCC_HSI_OFF)
- 80088bc: 687b ldr r3, [r7, #4]
- 80088be: 68db ldr r3, [r3, #12]
- 80088c0: 2b00 cmp r3, #0
- 80088c2: d023 beq.n 800890c <HAL_RCC_OscConfig+0x1e0>
- {
- /* Enable the Internal High Speed oscillator (HSI). */
- __HAL_RCC_HSI_ENABLE();
- 80088c4: 4b39 ldr r3, [pc, #228] ; (80089ac <HAL_RCC_OscConfig+0x280>)
- 80088c6: 681b ldr r3, [r3, #0]
- 80088c8: 4a38 ldr r2, [pc, #224] ; (80089ac <HAL_RCC_OscConfig+0x280>)
- 80088ca: f043 0301 orr.w r3, r3, #1
- 80088ce: 6013 str r3, [r2, #0]
-
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 80088d0: f7ff fbe0 bl 8008094 <HAL_GetTick>
- 80088d4: 6138 str r0, [r7, #16]
-
- /* Wait till HSI is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
- 80088d6: e008 b.n 80088ea <HAL_RCC_OscConfig+0x1be>
- {
- if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
- 80088d8: f7ff fbdc bl 8008094 <HAL_GetTick>
- 80088dc: 4602 mov r2, r0
- 80088de: 693b ldr r3, [r7, #16]
- 80088e0: 1ad3 subs r3, r2, r3
- 80088e2: 2b02 cmp r3, #2
- 80088e4: d901 bls.n 80088ea <HAL_RCC_OscConfig+0x1be>
- {
- return HAL_TIMEOUT;
- 80088e6: 2303 movs r3, #3
- 80088e8: e18a b.n 8008c00 <HAL_RCC_OscConfig+0x4d4>
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
- 80088ea: 4b30 ldr r3, [pc, #192] ; (80089ac <HAL_RCC_OscConfig+0x280>)
- 80088ec: 681b ldr r3, [r3, #0]
- 80088ee: f003 0302 and.w r3, r3, #2
- 80088f2: 2b00 cmp r3, #0
- 80088f4: d0f0 beq.n 80088d8 <HAL_RCC_OscConfig+0x1ac>
- }
- }
-
- /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
- __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
- 80088f6: 4b2d ldr r3, [pc, #180] ; (80089ac <HAL_RCC_OscConfig+0x280>)
- 80088f8: 681b ldr r3, [r3, #0]
- 80088fa: f023 02f8 bic.w r2, r3, #248 ; 0xf8
- 80088fe: 687b ldr r3, [r7, #4]
- 8008900: 691b ldr r3, [r3, #16]
- 8008902: 00db lsls r3, r3, #3
- 8008904: 4929 ldr r1, [pc, #164] ; (80089ac <HAL_RCC_OscConfig+0x280>)
- 8008906: 4313 orrs r3, r2
- 8008908: 600b str r3, [r1, #0]
- 800890a: e018 b.n 800893e <HAL_RCC_OscConfig+0x212>
- }
- else
- {
- /* Disable the Internal High Speed oscillator (HSI). */
- __HAL_RCC_HSI_DISABLE();
- 800890c: 4b27 ldr r3, [pc, #156] ; (80089ac <HAL_RCC_OscConfig+0x280>)
- 800890e: 681b ldr r3, [r3, #0]
- 8008910: 4a26 ldr r2, [pc, #152] ; (80089ac <HAL_RCC_OscConfig+0x280>)
- 8008912: f023 0301 bic.w r3, r3, #1
- 8008916: 6013 str r3, [r2, #0]
-
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 8008918: f7ff fbbc bl 8008094 <HAL_GetTick>
- 800891c: 6138 str r0, [r7, #16]
-
- /* Wait till HSI is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
- 800891e: e008 b.n 8008932 <HAL_RCC_OscConfig+0x206>
- {
- if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
- 8008920: f7ff fbb8 bl 8008094 <HAL_GetTick>
- 8008924: 4602 mov r2, r0
- 8008926: 693b ldr r3, [r7, #16]
- 8008928: 1ad3 subs r3, r2, r3
- 800892a: 2b02 cmp r3, #2
- 800892c: d901 bls.n 8008932 <HAL_RCC_OscConfig+0x206>
- {
- return HAL_TIMEOUT;
- 800892e: 2303 movs r3, #3
- 8008930: e166 b.n 8008c00 <HAL_RCC_OscConfig+0x4d4>
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
- 8008932: 4b1e ldr r3, [pc, #120] ; (80089ac <HAL_RCC_OscConfig+0x280>)
- 8008934: 681b ldr r3, [r3, #0]
- 8008936: f003 0302 and.w r3, r3, #2
- 800893a: 2b00 cmp r3, #0
- 800893c: d1f0 bne.n 8008920 <HAL_RCC_OscConfig+0x1f4>
- }
- }
- }
- }
- /*------------------------------ LSI Configuration -------------------------*/
- if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
- 800893e: 687b ldr r3, [r7, #4]
- 8008940: 681b ldr r3, [r3, #0]
- 8008942: f003 0308 and.w r3, r3, #8
- 8008946: 2b00 cmp r3, #0
- 8008948: d038 beq.n 80089bc <HAL_RCC_OscConfig+0x290>
- {
- /* Check the parameters */
- assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
-
- /* Check the LSI State */
- if((RCC_OscInitStruct->LSIState)!= RCC_LSI_OFF)
- 800894a: 687b ldr r3, [r7, #4]
- 800894c: 695b ldr r3, [r3, #20]
- 800894e: 2b00 cmp r3, #0
- 8008950: d019 beq.n 8008986 <HAL_RCC_OscConfig+0x25a>
- {
- /* Enable the Internal Low Speed oscillator (LSI). */
- __HAL_RCC_LSI_ENABLE();
- 8008952: 4b16 ldr r3, [pc, #88] ; (80089ac <HAL_RCC_OscConfig+0x280>)
- 8008954: 6f5b ldr r3, [r3, #116] ; 0x74
- 8008956: 4a15 ldr r2, [pc, #84] ; (80089ac <HAL_RCC_OscConfig+0x280>)
- 8008958: f043 0301 orr.w r3, r3, #1
- 800895c: 6753 str r3, [r2, #116] ; 0x74
-
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 800895e: f7ff fb99 bl 8008094 <HAL_GetTick>
- 8008962: 6138 str r0, [r7, #16]
-
- /* Wait till LSI is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
- 8008964: e008 b.n 8008978 <HAL_RCC_OscConfig+0x24c>
- {
- if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
- 8008966: f7ff fb95 bl 8008094 <HAL_GetTick>
- 800896a: 4602 mov r2, r0
- 800896c: 693b ldr r3, [r7, #16]
- 800896e: 1ad3 subs r3, r2, r3
- 8008970: 2b02 cmp r3, #2
- 8008972: d901 bls.n 8008978 <HAL_RCC_OscConfig+0x24c>
- {
- return HAL_TIMEOUT;
- 8008974: 2303 movs r3, #3
- 8008976: e143 b.n 8008c00 <HAL_RCC_OscConfig+0x4d4>
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
- 8008978: 4b0c ldr r3, [pc, #48] ; (80089ac <HAL_RCC_OscConfig+0x280>)
- 800897a: 6f5b ldr r3, [r3, #116] ; 0x74
- 800897c: f003 0302 and.w r3, r3, #2
- 8008980: 2b00 cmp r3, #0
- 8008982: d0f0 beq.n 8008966 <HAL_RCC_OscConfig+0x23a>
- 8008984: e01a b.n 80089bc <HAL_RCC_OscConfig+0x290>
- }
- }
- else
- {
- /* Disable the Internal Low Speed oscillator (LSI). */
- __HAL_RCC_LSI_DISABLE();
- 8008986: 4b09 ldr r3, [pc, #36] ; (80089ac <HAL_RCC_OscConfig+0x280>)
- 8008988: 6f5b ldr r3, [r3, #116] ; 0x74
- 800898a: 4a08 ldr r2, [pc, #32] ; (80089ac <HAL_RCC_OscConfig+0x280>)
- 800898c: f023 0301 bic.w r3, r3, #1
- 8008990: 6753 str r3, [r2, #116] ; 0x74
-
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 8008992: f7ff fb7f bl 8008094 <HAL_GetTick>
- 8008996: 6138 str r0, [r7, #16]
-
- /* Wait till LSI is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
- 8008998: e00a b.n 80089b0 <HAL_RCC_OscConfig+0x284>
- {
- if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
- 800899a: f7ff fb7b bl 8008094 <HAL_GetTick>
- 800899e: 4602 mov r2, r0
- 80089a0: 693b ldr r3, [r7, #16]
- 80089a2: 1ad3 subs r3, r2, r3
- 80089a4: 2b02 cmp r3, #2
- 80089a6: d903 bls.n 80089b0 <HAL_RCC_OscConfig+0x284>
- {
- return HAL_TIMEOUT;
- 80089a8: 2303 movs r3, #3
- 80089aa: e129 b.n 8008c00 <HAL_RCC_OscConfig+0x4d4>
- 80089ac: 40023800 .word 0x40023800
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
- 80089b0: 4b95 ldr r3, [pc, #596] ; (8008c08 <HAL_RCC_OscConfig+0x4dc>)
- 80089b2: 6f5b ldr r3, [r3, #116] ; 0x74
- 80089b4: f003 0302 and.w r3, r3, #2
- 80089b8: 2b00 cmp r3, #0
- 80089ba: d1ee bne.n 800899a <HAL_RCC_OscConfig+0x26e>
- }
- }
- }
- }
- /*------------------------------ LSE Configuration -------------------------*/
- if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
- 80089bc: 687b ldr r3, [r7, #4]
- 80089be: 681b ldr r3, [r3, #0]
- 80089c0: f003 0304 and.w r3, r3, #4
- 80089c4: 2b00 cmp r3, #0
- 80089c6: f000 80a4 beq.w 8008b12 <HAL_RCC_OscConfig+0x3e6>
- /* Check the parameters */
- assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
-
- /* Update LSE configuration in Backup Domain control register */
- /* Requires to enable write access to Backup Domain of necessary */
- if(__HAL_RCC_PWR_IS_CLK_DISABLED())
- 80089ca: 4b8f ldr r3, [pc, #572] ; (8008c08 <HAL_RCC_OscConfig+0x4dc>)
- 80089cc: 6c1b ldr r3, [r3, #64] ; 0x40
- 80089ce: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
- 80089d2: 2b00 cmp r3, #0
- 80089d4: d10d bne.n 80089f2 <HAL_RCC_OscConfig+0x2c6>
- {
- /* Enable Power Clock*/
- __HAL_RCC_PWR_CLK_ENABLE();
- 80089d6: 4b8c ldr r3, [pc, #560] ; (8008c08 <HAL_RCC_OscConfig+0x4dc>)
- 80089d8: 6c1b ldr r3, [r3, #64] ; 0x40
- 80089da: 4a8b ldr r2, [pc, #556] ; (8008c08 <HAL_RCC_OscConfig+0x4dc>)
- 80089dc: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
- 80089e0: 6413 str r3, [r2, #64] ; 0x40
- 80089e2: 4b89 ldr r3, [pc, #548] ; (8008c08 <HAL_RCC_OscConfig+0x4dc>)
- 80089e4: 6c1b ldr r3, [r3, #64] ; 0x40
- 80089e6: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
- 80089ea: 60fb str r3, [r7, #12]
- 80089ec: 68fb ldr r3, [r7, #12]
- pwrclkchanged = SET;
- 80089ee: 2301 movs r3, #1
- 80089f0: 75fb strb r3, [r7, #23]
- }
-
- if(HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP))
- 80089f2: 4b86 ldr r3, [pc, #536] ; (8008c0c <HAL_RCC_OscConfig+0x4e0>)
- 80089f4: 681b ldr r3, [r3, #0]
- 80089f6: f403 7380 and.w r3, r3, #256 ; 0x100
- 80089fa: 2b00 cmp r3, #0
- 80089fc: d118 bne.n 8008a30 <HAL_RCC_OscConfig+0x304>
- {
- /* Enable write access to Backup domain */
- PWR->CR1 |= PWR_CR1_DBP;
- 80089fe: 4b83 ldr r3, [pc, #524] ; (8008c0c <HAL_RCC_OscConfig+0x4e0>)
- 8008a00: 681b ldr r3, [r3, #0]
- 8008a02: 4a82 ldr r2, [pc, #520] ; (8008c0c <HAL_RCC_OscConfig+0x4e0>)
- 8008a04: f443 7380 orr.w r3, r3, #256 ; 0x100
- 8008a08: 6013 str r3, [r2, #0]
-
- /* Wait for Backup domain Write protection disable */
- tickstart = HAL_GetTick();
- 8008a0a: f7ff fb43 bl 8008094 <HAL_GetTick>
- 8008a0e: 6138 str r0, [r7, #16]
-
- while(HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP))
- 8008a10: e008 b.n 8008a24 <HAL_RCC_OscConfig+0x2f8>
- {
- if((HAL_GetTick() - tickstart ) > RCC_DBP_TIMEOUT_VALUE)
- 8008a12: f7ff fb3f bl 8008094 <HAL_GetTick>
- 8008a16: 4602 mov r2, r0
- 8008a18: 693b ldr r3, [r7, #16]
- 8008a1a: 1ad3 subs r3, r2, r3
- 8008a1c: 2b64 cmp r3, #100 ; 0x64
- 8008a1e: d901 bls.n 8008a24 <HAL_RCC_OscConfig+0x2f8>
- {
- return HAL_TIMEOUT;
- 8008a20: 2303 movs r3, #3
- 8008a22: e0ed b.n 8008c00 <HAL_RCC_OscConfig+0x4d4>
- while(HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP))
- 8008a24: 4b79 ldr r3, [pc, #484] ; (8008c0c <HAL_RCC_OscConfig+0x4e0>)
- 8008a26: 681b ldr r3, [r3, #0]
- 8008a28: f403 7380 and.w r3, r3, #256 ; 0x100
- 8008a2c: 2b00 cmp r3, #0
- 8008a2e: d0f0 beq.n 8008a12 <HAL_RCC_OscConfig+0x2e6>
- }
- }
- }
-
- /* Set the new LSE configuration -----------------------------------------*/
- __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
- 8008a30: 687b ldr r3, [r7, #4]
- 8008a32: 689b ldr r3, [r3, #8]
- 8008a34: 2b01 cmp r3, #1
- 8008a36: d106 bne.n 8008a46 <HAL_RCC_OscConfig+0x31a>
- 8008a38: 4b73 ldr r3, [pc, #460] ; (8008c08 <HAL_RCC_OscConfig+0x4dc>)
- 8008a3a: 6f1b ldr r3, [r3, #112] ; 0x70
- 8008a3c: 4a72 ldr r2, [pc, #456] ; (8008c08 <HAL_RCC_OscConfig+0x4dc>)
- 8008a3e: f043 0301 orr.w r3, r3, #1
- 8008a42: 6713 str r3, [r2, #112] ; 0x70
- 8008a44: e02d b.n 8008aa2 <HAL_RCC_OscConfig+0x376>
- 8008a46: 687b ldr r3, [r7, #4]
- 8008a48: 689b ldr r3, [r3, #8]
- 8008a4a: 2b00 cmp r3, #0
- 8008a4c: d10c bne.n 8008a68 <HAL_RCC_OscConfig+0x33c>
- 8008a4e: 4b6e ldr r3, [pc, #440] ; (8008c08 <HAL_RCC_OscConfig+0x4dc>)
- 8008a50: 6f1b ldr r3, [r3, #112] ; 0x70
- 8008a52: 4a6d ldr r2, [pc, #436] ; (8008c08 <HAL_RCC_OscConfig+0x4dc>)
- 8008a54: f023 0301 bic.w r3, r3, #1
- 8008a58: 6713 str r3, [r2, #112] ; 0x70
- 8008a5a: 4b6b ldr r3, [pc, #428] ; (8008c08 <HAL_RCC_OscConfig+0x4dc>)
- 8008a5c: 6f1b ldr r3, [r3, #112] ; 0x70
- 8008a5e: 4a6a ldr r2, [pc, #424] ; (8008c08 <HAL_RCC_OscConfig+0x4dc>)
- 8008a60: f023 0304 bic.w r3, r3, #4
- 8008a64: 6713 str r3, [r2, #112] ; 0x70
- 8008a66: e01c b.n 8008aa2 <HAL_RCC_OscConfig+0x376>
- 8008a68: 687b ldr r3, [r7, #4]
- 8008a6a: 689b ldr r3, [r3, #8]
- 8008a6c: 2b05 cmp r3, #5
- 8008a6e: d10c bne.n 8008a8a <HAL_RCC_OscConfig+0x35e>
- 8008a70: 4b65 ldr r3, [pc, #404] ; (8008c08 <HAL_RCC_OscConfig+0x4dc>)
- 8008a72: 6f1b ldr r3, [r3, #112] ; 0x70
- 8008a74: 4a64 ldr r2, [pc, #400] ; (8008c08 <HAL_RCC_OscConfig+0x4dc>)
- 8008a76: f043 0304 orr.w r3, r3, #4
- 8008a7a: 6713 str r3, [r2, #112] ; 0x70
- 8008a7c: 4b62 ldr r3, [pc, #392] ; (8008c08 <HAL_RCC_OscConfig+0x4dc>)
- 8008a7e: 6f1b ldr r3, [r3, #112] ; 0x70
- 8008a80: 4a61 ldr r2, [pc, #388] ; (8008c08 <HAL_RCC_OscConfig+0x4dc>)
- 8008a82: f043 0301 orr.w r3, r3, #1
- 8008a86: 6713 str r3, [r2, #112] ; 0x70
- 8008a88: e00b b.n 8008aa2 <HAL_RCC_OscConfig+0x376>
- 8008a8a: 4b5f ldr r3, [pc, #380] ; (8008c08 <HAL_RCC_OscConfig+0x4dc>)
- 8008a8c: 6f1b ldr r3, [r3, #112] ; 0x70
- 8008a8e: 4a5e ldr r2, [pc, #376] ; (8008c08 <HAL_RCC_OscConfig+0x4dc>)
- 8008a90: f023 0301 bic.w r3, r3, #1
- 8008a94: 6713 str r3, [r2, #112] ; 0x70
- 8008a96: 4b5c ldr r3, [pc, #368] ; (8008c08 <HAL_RCC_OscConfig+0x4dc>)
- 8008a98: 6f1b ldr r3, [r3, #112] ; 0x70
- 8008a9a: 4a5b ldr r2, [pc, #364] ; (8008c08 <HAL_RCC_OscConfig+0x4dc>)
- 8008a9c: f023 0304 bic.w r3, r3, #4
- 8008aa0: 6713 str r3, [r2, #112] ; 0x70
- /* Check the LSE State */
- if((RCC_OscInitStruct->LSEState) != RCC_LSE_OFF)
- 8008aa2: 687b ldr r3, [r7, #4]
- 8008aa4: 689b ldr r3, [r3, #8]
- 8008aa6: 2b00 cmp r3, #0
- 8008aa8: d015 beq.n 8008ad6 <HAL_RCC_OscConfig+0x3aa>
- {
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 8008aaa: f7ff faf3 bl 8008094 <HAL_GetTick>
- 8008aae: 6138 str r0, [r7, #16]
-
- /* Wait till LSE is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
- 8008ab0: e00a b.n 8008ac8 <HAL_RCC_OscConfig+0x39c>
- {
- if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
- 8008ab2: f7ff faef bl 8008094 <HAL_GetTick>
- 8008ab6: 4602 mov r2, r0
- 8008ab8: 693b ldr r3, [r7, #16]
- 8008aba: 1ad3 subs r3, r2, r3
- 8008abc: f241 3288 movw r2, #5000 ; 0x1388
- 8008ac0: 4293 cmp r3, r2
- 8008ac2: d901 bls.n 8008ac8 <HAL_RCC_OscConfig+0x39c>
- {
- return HAL_TIMEOUT;
- 8008ac4: 2303 movs r3, #3
- 8008ac6: e09b b.n 8008c00 <HAL_RCC_OscConfig+0x4d4>
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
- 8008ac8: 4b4f ldr r3, [pc, #316] ; (8008c08 <HAL_RCC_OscConfig+0x4dc>)
- 8008aca: 6f1b ldr r3, [r3, #112] ; 0x70
- 8008acc: f003 0302 and.w r3, r3, #2
- 8008ad0: 2b00 cmp r3, #0
- 8008ad2: d0ee beq.n 8008ab2 <HAL_RCC_OscConfig+0x386>
- 8008ad4: e014 b.n 8008b00 <HAL_RCC_OscConfig+0x3d4>
- }
- }
- else
- {
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 8008ad6: f7ff fadd bl 8008094 <HAL_GetTick>
- 8008ada: 6138 str r0, [r7, #16]
-
- /* Wait till LSE is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
- 8008adc: e00a b.n 8008af4 <HAL_RCC_OscConfig+0x3c8>
- {
- if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
- 8008ade: f7ff fad9 bl 8008094 <HAL_GetTick>
- 8008ae2: 4602 mov r2, r0
- 8008ae4: 693b ldr r3, [r7, #16]
- 8008ae6: 1ad3 subs r3, r2, r3
- 8008ae8: f241 3288 movw r2, #5000 ; 0x1388
- 8008aec: 4293 cmp r3, r2
- 8008aee: d901 bls.n 8008af4 <HAL_RCC_OscConfig+0x3c8>
- {
- return HAL_TIMEOUT;
- 8008af0: 2303 movs r3, #3
- 8008af2: e085 b.n 8008c00 <HAL_RCC_OscConfig+0x4d4>
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
- 8008af4: 4b44 ldr r3, [pc, #272] ; (8008c08 <HAL_RCC_OscConfig+0x4dc>)
- 8008af6: 6f1b ldr r3, [r3, #112] ; 0x70
- 8008af8: f003 0302 and.w r3, r3, #2
- 8008afc: 2b00 cmp r3, #0
- 8008afe: d1ee bne.n 8008ade <HAL_RCC_OscConfig+0x3b2>
- }
- }
- }
-
- /* Restore clock configuration if changed */
- if(pwrclkchanged == SET)
- 8008b00: 7dfb ldrb r3, [r7, #23]
- 8008b02: 2b01 cmp r3, #1
- 8008b04: d105 bne.n 8008b12 <HAL_RCC_OscConfig+0x3e6>
- {
- __HAL_RCC_PWR_CLK_DISABLE();
- 8008b06: 4b40 ldr r3, [pc, #256] ; (8008c08 <HAL_RCC_OscConfig+0x4dc>)
- 8008b08: 6c1b ldr r3, [r3, #64] ; 0x40
- 8008b0a: 4a3f ldr r2, [pc, #252] ; (8008c08 <HAL_RCC_OscConfig+0x4dc>)
- 8008b0c: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000
- 8008b10: 6413 str r3, [r2, #64] ; 0x40
- }
- }
- /*-------------------------------- PLL Configuration -----------------------*/
- /* Check the parameters */
- assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
- if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
- 8008b12: 687b ldr r3, [r7, #4]
- 8008b14: 699b ldr r3, [r3, #24]
- 8008b16: 2b00 cmp r3, #0
- 8008b18: d071 beq.n 8008bfe <HAL_RCC_OscConfig+0x4d2>
- {
- /* Check if the PLL is used as system clock or not */
- if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
- 8008b1a: 4b3b ldr r3, [pc, #236] ; (8008c08 <HAL_RCC_OscConfig+0x4dc>)
- 8008b1c: 689b ldr r3, [r3, #8]
- 8008b1e: f003 030c and.w r3, r3, #12
- 8008b22: 2b08 cmp r3, #8
- 8008b24: d069 beq.n 8008bfa <HAL_RCC_OscConfig+0x4ce>
- {
- if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
- 8008b26: 687b ldr r3, [r7, #4]
- 8008b28: 699b ldr r3, [r3, #24]
- 8008b2a: 2b02 cmp r3, #2
- 8008b2c: d14b bne.n 8008bc6 <HAL_RCC_OscConfig+0x49a>
-#if defined (RCC_PLLCFGR_PLLR)
- assert_param(IS_RCC_PLLR_VALUE(RCC_OscInitStruct->PLL.PLLR));
-#endif
-
- /* Disable the main PLL. */
- __HAL_RCC_PLL_DISABLE();
- 8008b2e: 4b36 ldr r3, [pc, #216] ; (8008c08 <HAL_RCC_OscConfig+0x4dc>)
- 8008b30: 681b ldr r3, [r3, #0]
- 8008b32: 4a35 ldr r2, [pc, #212] ; (8008c08 <HAL_RCC_OscConfig+0x4dc>)
- 8008b34: f023 7380 bic.w r3, r3, #16777216 ; 0x1000000
- 8008b38: 6013 str r3, [r2, #0]
-
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 8008b3a: f7ff faab bl 8008094 <HAL_GetTick>
- 8008b3e: 6138 str r0, [r7, #16]
-
- /* Wait till PLL is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
- 8008b40: e008 b.n 8008b54 <HAL_RCC_OscConfig+0x428>
- {
- if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
- 8008b42: f7ff faa7 bl 8008094 <HAL_GetTick>
- 8008b46: 4602 mov r2, r0
- 8008b48: 693b ldr r3, [r7, #16]
- 8008b4a: 1ad3 subs r3, r2, r3
- 8008b4c: 2b02 cmp r3, #2
- 8008b4e: d901 bls.n 8008b54 <HAL_RCC_OscConfig+0x428>
- {
- return HAL_TIMEOUT;
- 8008b50: 2303 movs r3, #3
- 8008b52: e055 b.n 8008c00 <HAL_RCC_OscConfig+0x4d4>
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
- 8008b54: 4b2c ldr r3, [pc, #176] ; (8008c08 <HAL_RCC_OscConfig+0x4dc>)
- 8008b56: 681b ldr r3, [r3, #0]
- 8008b58: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
- 8008b5c: 2b00 cmp r3, #0
- 8008b5e: d1f0 bne.n 8008b42 <HAL_RCC_OscConfig+0x416>
- }
- }
-
- /* Configure the main PLL clock source, multiplication and division factors. */
-#if defined (RCC_PLLCFGR_PLLR)
- __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
- 8008b60: 687b ldr r3, [r7, #4]
- 8008b62: 69da ldr r2, [r3, #28]
- 8008b64: 687b ldr r3, [r7, #4]
- 8008b66: 6a1b ldr r3, [r3, #32]
- 8008b68: 431a orrs r2, r3
- 8008b6a: 687b ldr r3, [r7, #4]
- 8008b6c: 6a5b ldr r3, [r3, #36] ; 0x24
- 8008b6e: 019b lsls r3, r3, #6
- 8008b70: 431a orrs r2, r3
- 8008b72: 687b ldr r3, [r7, #4]
- 8008b74: 6a9b ldr r3, [r3, #40] ; 0x28
- 8008b76: 085b lsrs r3, r3, #1
- 8008b78: 3b01 subs r3, #1
- 8008b7a: 041b lsls r3, r3, #16
- 8008b7c: 431a orrs r2, r3
- 8008b7e: 687b ldr r3, [r7, #4]
- 8008b80: 6adb ldr r3, [r3, #44] ; 0x2c
- 8008b82: 061b lsls r3, r3, #24
- 8008b84: 431a orrs r2, r3
- 8008b86: 687b ldr r3, [r7, #4]
- 8008b88: 6b1b ldr r3, [r3, #48] ; 0x30
- 8008b8a: 071b lsls r3, r3, #28
- 8008b8c: 491e ldr r1, [pc, #120] ; (8008c08 <HAL_RCC_OscConfig+0x4dc>)
- 8008b8e: 4313 orrs r3, r2
- 8008b90: 604b str r3, [r1, #4]
- RCC_OscInitStruct->PLL.PLLP,
- RCC_OscInitStruct->PLL.PLLQ);
-#endif
-
- /* Enable the main PLL. */
- __HAL_RCC_PLL_ENABLE();
- 8008b92: 4b1d ldr r3, [pc, #116] ; (8008c08 <HAL_RCC_OscConfig+0x4dc>)
- 8008b94: 681b ldr r3, [r3, #0]
- 8008b96: 4a1c ldr r2, [pc, #112] ; (8008c08 <HAL_RCC_OscConfig+0x4dc>)
- 8008b98: f043 7380 orr.w r3, r3, #16777216 ; 0x1000000
- 8008b9c: 6013 str r3, [r2, #0]
-
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 8008b9e: f7ff fa79 bl 8008094 <HAL_GetTick>
- 8008ba2: 6138 str r0, [r7, #16]
-
- /* Wait till PLL is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
- 8008ba4: e008 b.n 8008bb8 <HAL_RCC_OscConfig+0x48c>
- {
- if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
- 8008ba6: f7ff fa75 bl 8008094 <HAL_GetTick>
- 8008baa: 4602 mov r2, r0
- 8008bac: 693b ldr r3, [r7, #16]
- 8008bae: 1ad3 subs r3, r2, r3
- 8008bb0: 2b02 cmp r3, #2
- 8008bb2: d901 bls.n 8008bb8 <HAL_RCC_OscConfig+0x48c>
- {
- return HAL_TIMEOUT;
- 8008bb4: 2303 movs r3, #3
- 8008bb6: e023 b.n 8008c00 <HAL_RCC_OscConfig+0x4d4>
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
- 8008bb8: 4b13 ldr r3, [pc, #76] ; (8008c08 <HAL_RCC_OscConfig+0x4dc>)
- 8008bba: 681b ldr r3, [r3, #0]
- 8008bbc: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
- 8008bc0: 2b00 cmp r3, #0
- 8008bc2: d0f0 beq.n 8008ba6 <HAL_RCC_OscConfig+0x47a>
- 8008bc4: e01b b.n 8008bfe <HAL_RCC_OscConfig+0x4d2>
- }
- }
- else
- {
- /* Disable the main PLL. */
- __HAL_RCC_PLL_DISABLE();
- 8008bc6: 4b10 ldr r3, [pc, #64] ; (8008c08 <HAL_RCC_OscConfig+0x4dc>)
- 8008bc8: 681b ldr r3, [r3, #0]
- 8008bca: 4a0f ldr r2, [pc, #60] ; (8008c08 <HAL_RCC_OscConfig+0x4dc>)
- 8008bcc: f023 7380 bic.w r3, r3, #16777216 ; 0x1000000
- 8008bd0: 6013 str r3, [r2, #0]
-
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 8008bd2: f7ff fa5f bl 8008094 <HAL_GetTick>
- 8008bd6: 6138 str r0, [r7, #16]
-
- /* Wait till PLL is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
- 8008bd8: e008 b.n 8008bec <HAL_RCC_OscConfig+0x4c0>
- {
- if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
- 8008bda: f7ff fa5b bl 8008094 <HAL_GetTick>
- 8008bde: 4602 mov r2, r0
- 8008be0: 693b ldr r3, [r7, #16]
- 8008be2: 1ad3 subs r3, r2, r3
- 8008be4: 2b02 cmp r3, #2
- 8008be6: d901 bls.n 8008bec <HAL_RCC_OscConfig+0x4c0>
- {
- return HAL_TIMEOUT;
- 8008be8: 2303 movs r3, #3
- 8008bea: e009 b.n 8008c00 <HAL_RCC_OscConfig+0x4d4>
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
- 8008bec: 4b06 ldr r3, [pc, #24] ; (8008c08 <HAL_RCC_OscConfig+0x4dc>)
- 8008bee: 681b ldr r3, [r3, #0]
- 8008bf0: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
- 8008bf4: 2b00 cmp r3, #0
- 8008bf6: d1f0 bne.n 8008bda <HAL_RCC_OscConfig+0x4ae>
- 8008bf8: e001 b.n 8008bfe <HAL_RCC_OscConfig+0x4d2>
- }
- }
- }
- else
- {
- return HAL_ERROR;
- 8008bfa: 2301 movs r3, #1
- 8008bfc: e000 b.n 8008c00 <HAL_RCC_OscConfig+0x4d4>
- }
- }
- return HAL_OK;
- 8008bfe: 2300 movs r3, #0
-}
- 8008c00: 4618 mov r0, r3
- 8008c02: 3718 adds r7, #24
- 8008c04: 46bd mov sp, r7
- 8008c06: bd80 pop {r7, pc}
- 8008c08: 40023800 .word 0x40023800
- 8008c0c: 40007000 .word 0x40007000
-
-08008c10 <HAL_RCC_ClockConfig>:
- * HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency
- * (for more details refer to section above "Initialization/de-initialization functions")
- * @retval None
- */
-HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
-{
- 8008c10: b580 push {r7, lr}
- 8008c12: b084 sub sp, #16
- 8008c14: af00 add r7, sp, #0
- 8008c16: 6078 str r0, [r7, #4]
- 8008c18: 6039 str r1, [r7, #0]
- uint32_t tickstart = 0;
- 8008c1a: 2300 movs r3, #0
- 8008c1c: 60fb str r3, [r7, #12]
-
- /* Check Null pointer */
- if(RCC_ClkInitStruct == NULL)
- 8008c1e: 687b ldr r3, [r7, #4]
- 8008c20: 2b00 cmp r3, #0
- 8008c22: d101 bne.n 8008c28 <HAL_RCC_ClockConfig+0x18>
- {
- return HAL_ERROR;
- 8008c24: 2301 movs r3, #1
- 8008c26: e0ce b.n 8008dc6 <HAL_RCC_ClockConfig+0x1b6>
- /* To correctly read data from FLASH memory, the number of wait states (LATENCY)
- must be correctly programmed according to the frequency of the CPU clock
- (HCLK) and the supply voltage of the device. */
-
- /* Increasing the CPU frequency */
- if(FLatency > __HAL_FLASH_GET_LATENCY())
- 8008c28: 4b69 ldr r3, [pc, #420] ; (8008dd0 <HAL_RCC_ClockConfig+0x1c0>)
- 8008c2a: 681b ldr r3, [r3, #0]
- 8008c2c: f003 030f and.w r3, r3, #15
- 8008c30: 683a ldr r2, [r7, #0]
- 8008c32: 429a cmp r2, r3
- 8008c34: d910 bls.n 8008c58 <HAL_RCC_ClockConfig+0x48>
- {
- /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
- __HAL_FLASH_SET_LATENCY(FLatency);
- 8008c36: 4b66 ldr r3, [pc, #408] ; (8008dd0 <HAL_RCC_ClockConfig+0x1c0>)
- 8008c38: 681b ldr r3, [r3, #0]
- 8008c3a: f023 020f bic.w r2, r3, #15
- 8008c3e: 4964 ldr r1, [pc, #400] ; (8008dd0 <HAL_RCC_ClockConfig+0x1c0>)
- 8008c40: 683b ldr r3, [r7, #0]
- 8008c42: 4313 orrs r3, r2
- 8008c44: 600b str r3, [r1, #0]
-
- /* Check that the new number of wait states is taken into account to access the Flash
- memory by reading the FLASH_ACR register */
- if(__HAL_FLASH_GET_LATENCY() != FLatency)
- 8008c46: 4b62 ldr r3, [pc, #392] ; (8008dd0 <HAL_RCC_ClockConfig+0x1c0>)
- 8008c48: 681b ldr r3, [r3, #0]
- 8008c4a: f003 030f and.w r3, r3, #15
- 8008c4e: 683a ldr r2, [r7, #0]
- 8008c50: 429a cmp r2, r3
- 8008c52: d001 beq.n 8008c58 <HAL_RCC_ClockConfig+0x48>
- {
- return HAL_ERROR;
- 8008c54: 2301 movs r3, #1
- 8008c56: e0b6 b.n 8008dc6 <HAL_RCC_ClockConfig+0x1b6>
- }
- }
-
- /*-------------------------- HCLK Configuration --------------------------*/
- if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
- 8008c58: 687b ldr r3, [r7, #4]
- 8008c5a: 681b ldr r3, [r3, #0]
- 8008c5c: f003 0302 and.w r3, r3, #2
- 8008c60: 2b00 cmp r3, #0
- 8008c62: d020 beq.n 8008ca6 <HAL_RCC_ClockConfig+0x96>
- {
- /* Set the highest APBx dividers in order to ensure that we do not go through
- a non-spec phase whatever we decrease or increase HCLK. */
- if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
- 8008c64: 687b ldr r3, [r7, #4]
- 8008c66: 681b ldr r3, [r3, #0]
- 8008c68: f003 0304 and.w r3, r3, #4
- 8008c6c: 2b00 cmp r3, #0
- 8008c6e: d005 beq.n 8008c7c <HAL_RCC_ClockConfig+0x6c>
- {
- MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
- 8008c70: 4b58 ldr r3, [pc, #352] ; (8008dd4 <HAL_RCC_ClockConfig+0x1c4>)
- 8008c72: 689b ldr r3, [r3, #8]
- 8008c74: 4a57 ldr r2, [pc, #348] ; (8008dd4 <HAL_RCC_ClockConfig+0x1c4>)
- 8008c76: f443 53e0 orr.w r3, r3, #7168 ; 0x1c00
- 8008c7a: 6093 str r3, [r2, #8]
- }
-
- if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
- 8008c7c: 687b ldr r3, [r7, #4]
- 8008c7e: 681b ldr r3, [r3, #0]
- 8008c80: f003 0308 and.w r3, r3, #8
- 8008c84: 2b00 cmp r3, #0
- 8008c86: d005 beq.n 8008c94 <HAL_RCC_ClockConfig+0x84>
- {
- MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
- 8008c88: 4b52 ldr r3, [pc, #328] ; (8008dd4 <HAL_RCC_ClockConfig+0x1c4>)
- 8008c8a: 689b ldr r3, [r3, #8]
- 8008c8c: 4a51 ldr r2, [pc, #324] ; (8008dd4 <HAL_RCC_ClockConfig+0x1c4>)
- 8008c8e: f443 4360 orr.w r3, r3, #57344 ; 0xe000
- 8008c92: 6093 str r3, [r2, #8]
- }
-
- /* Set the new HCLK clock divider */
- assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
- MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
- 8008c94: 4b4f ldr r3, [pc, #316] ; (8008dd4 <HAL_RCC_ClockConfig+0x1c4>)
- 8008c96: 689b ldr r3, [r3, #8]
- 8008c98: f023 02f0 bic.w r2, r3, #240 ; 0xf0
- 8008c9c: 687b ldr r3, [r7, #4]
- 8008c9e: 689b ldr r3, [r3, #8]
- 8008ca0: 494c ldr r1, [pc, #304] ; (8008dd4 <HAL_RCC_ClockConfig+0x1c4>)
- 8008ca2: 4313 orrs r3, r2
- 8008ca4: 608b str r3, [r1, #8]
- }
-
- /*------------------------- SYSCLK Configuration ---------------------------*/
- if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
- 8008ca6: 687b ldr r3, [r7, #4]
- 8008ca8: 681b ldr r3, [r3, #0]
- 8008caa: f003 0301 and.w r3, r3, #1
- 8008cae: 2b00 cmp r3, #0
- 8008cb0: d040 beq.n 8008d34 <HAL_RCC_ClockConfig+0x124>
- {
- assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
-
- /* HSE is selected as System Clock Source */
- if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
- 8008cb2: 687b ldr r3, [r7, #4]
- 8008cb4: 685b ldr r3, [r3, #4]
- 8008cb6: 2b01 cmp r3, #1
- 8008cb8: d107 bne.n 8008cca <HAL_RCC_ClockConfig+0xba>
- {
- /* Check the HSE ready flag */
- if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
- 8008cba: 4b46 ldr r3, [pc, #280] ; (8008dd4 <HAL_RCC_ClockConfig+0x1c4>)
- 8008cbc: 681b ldr r3, [r3, #0]
- 8008cbe: f403 3300 and.w r3, r3, #131072 ; 0x20000
- 8008cc2: 2b00 cmp r3, #0
- 8008cc4: d115 bne.n 8008cf2 <HAL_RCC_ClockConfig+0xe2>
- {
- return HAL_ERROR;
- 8008cc6: 2301 movs r3, #1
- 8008cc8: e07d b.n 8008dc6 <HAL_RCC_ClockConfig+0x1b6>
- }
- }
- /* PLL is selected as System Clock Source */
- else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
- 8008cca: 687b ldr r3, [r7, #4]
- 8008ccc: 685b ldr r3, [r3, #4]
- 8008cce: 2b02 cmp r3, #2
- 8008cd0: d107 bne.n 8008ce2 <HAL_RCC_ClockConfig+0xd2>
- {
- /* Check the PLL ready flag */
- if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
- 8008cd2: 4b40 ldr r3, [pc, #256] ; (8008dd4 <HAL_RCC_ClockConfig+0x1c4>)
- 8008cd4: 681b ldr r3, [r3, #0]
- 8008cd6: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
- 8008cda: 2b00 cmp r3, #0
- 8008cdc: d109 bne.n 8008cf2 <HAL_RCC_ClockConfig+0xe2>
- {
- return HAL_ERROR;
- 8008cde: 2301 movs r3, #1
- 8008ce0: e071 b.n 8008dc6 <HAL_RCC_ClockConfig+0x1b6>
- }
- /* HSI is selected as System Clock Source */
- else
- {
- /* Check the HSI ready flag */
- if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
- 8008ce2: 4b3c ldr r3, [pc, #240] ; (8008dd4 <HAL_RCC_ClockConfig+0x1c4>)
- 8008ce4: 681b ldr r3, [r3, #0]
- 8008ce6: f003 0302 and.w r3, r3, #2
- 8008cea: 2b00 cmp r3, #0
- 8008cec: d101 bne.n 8008cf2 <HAL_RCC_ClockConfig+0xe2>
- {
- return HAL_ERROR;
- 8008cee: 2301 movs r3, #1
- 8008cf0: e069 b.n 8008dc6 <HAL_RCC_ClockConfig+0x1b6>
- }
- }
-
- __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
- 8008cf2: 4b38 ldr r3, [pc, #224] ; (8008dd4 <HAL_RCC_ClockConfig+0x1c4>)
- 8008cf4: 689b ldr r3, [r3, #8]
- 8008cf6: f023 0203 bic.w r2, r3, #3
- 8008cfa: 687b ldr r3, [r7, #4]
- 8008cfc: 685b ldr r3, [r3, #4]
- 8008cfe: 4935 ldr r1, [pc, #212] ; (8008dd4 <HAL_RCC_ClockConfig+0x1c4>)
- 8008d00: 4313 orrs r3, r2
- 8008d02: 608b str r3, [r1, #8]
-
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 8008d04: f7ff f9c6 bl 8008094 <HAL_GetTick>
- 8008d08: 60f8 str r0, [r7, #12]
-
- while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
- 8008d0a: e00a b.n 8008d22 <HAL_RCC_ClockConfig+0x112>
- {
- if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
- 8008d0c: f7ff f9c2 bl 8008094 <HAL_GetTick>
- 8008d10: 4602 mov r2, r0
- 8008d12: 68fb ldr r3, [r7, #12]
- 8008d14: 1ad3 subs r3, r2, r3
- 8008d16: f241 3288 movw r2, #5000 ; 0x1388
- 8008d1a: 4293 cmp r3, r2
- 8008d1c: d901 bls.n 8008d22 <HAL_RCC_ClockConfig+0x112>
- {
- return HAL_TIMEOUT;
- 8008d1e: 2303 movs r3, #3
- 8008d20: e051 b.n 8008dc6 <HAL_RCC_ClockConfig+0x1b6>
- while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
- 8008d22: 4b2c ldr r3, [pc, #176] ; (8008dd4 <HAL_RCC_ClockConfig+0x1c4>)
- 8008d24: 689b ldr r3, [r3, #8]
- 8008d26: f003 020c and.w r2, r3, #12
- 8008d2a: 687b ldr r3, [r7, #4]
- 8008d2c: 685b ldr r3, [r3, #4]
- 8008d2e: 009b lsls r3, r3, #2
- 8008d30: 429a cmp r2, r3
- 8008d32: d1eb bne.n 8008d0c <HAL_RCC_ClockConfig+0xfc>
- }
- }
- }
-
- /* Decreasing the number of wait states because of lower CPU frequency */
- if(FLatency < __HAL_FLASH_GET_LATENCY())
- 8008d34: 4b26 ldr r3, [pc, #152] ; (8008dd0 <HAL_RCC_ClockConfig+0x1c0>)
- 8008d36: 681b ldr r3, [r3, #0]
- 8008d38: f003 030f and.w r3, r3, #15
- 8008d3c: 683a ldr r2, [r7, #0]
- 8008d3e: 429a cmp r2, r3
- 8008d40: d210 bcs.n 8008d64 <HAL_RCC_ClockConfig+0x154>
- {
- /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
- __HAL_FLASH_SET_LATENCY(FLatency);
- 8008d42: 4b23 ldr r3, [pc, #140] ; (8008dd0 <HAL_RCC_ClockConfig+0x1c0>)
- 8008d44: 681b ldr r3, [r3, #0]
- 8008d46: f023 020f bic.w r2, r3, #15
- 8008d4a: 4921 ldr r1, [pc, #132] ; (8008dd0 <HAL_RCC_ClockConfig+0x1c0>)
- 8008d4c: 683b ldr r3, [r7, #0]
- 8008d4e: 4313 orrs r3, r2
- 8008d50: 600b str r3, [r1, #0]
-
- /* Check that the new number of wait states is taken into account to access the Flash
- memory by reading the FLASH_ACR register */
- if(__HAL_FLASH_GET_LATENCY() != FLatency)
- 8008d52: 4b1f ldr r3, [pc, #124] ; (8008dd0 <HAL_RCC_ClockConfig+0x1c0>)
- 8008d54: 681b ldr r3, [r3, #0]
- 8008d56: f003 030f and.w r3, r3, #15
- 8008d5a: 683a ldr r2, [r7, #0]
- 8008d5c: 429a cmp r2, r3
- 8008d5e: d001 beq.n 8008d64 <HAL_RCC_ClockConfig+0x154>
- {
- return HAL_ERROR;
- 8008d60: 2301 movs r3, #1
- 8008d62: e030 b.n 8008dc6 <HAL_RCC_ClockConfig+0x1b6>
- }
- }
-
- /*-------------------------- PCLK1 Configuration ---------------------------*/
- if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
- 8008d64: 687b ldr r3, [r7, #4]
- 8008d66: 681b ldr r3, [r3, #0]
- 8008d68: f003 0304 and.w r3, r3, #4
- 8008d6c: 2b00 cmp r3, #0
- 8008d6e: d008 beq.n 8008d82 <HAL_RCC_ClockConfig+0x172>
- {
- assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
- MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
- 8008d70: 4b18 ldr r3, [pc, #96] ; (8008dd4 <HAL_RCC_ClockConfig+0x1c4>)
- 8008d72: 689b ldr r3, [r3, #8]
- 8008d74: f423 52e0 bic.w r2, r3, #7168 ; 0x1c00
- 8008d78: 687b ldr r3, [r7, #4]
- 8008d7a: 68db ldr r3, [r3, #12]
- 8008d7c: 4915 ldr r1, [pc, #84] ; (8008dd4 <HAL_RCC_ClockConfig+0x1c4>)
- 8008d7e: 4313 orrs r3, r2
- 8008d80: 608b str r3, [r1, #8]
- }
-
- /*-------------------------- PCLK2 Configuration ---------------------------*/
- if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
- 8008d82: 687b ldr r3, [r7, #4]
- 8008d84: 681b ldr r3, [r3, #0]
- 8008d86: f003 0308 and.w r3, r3, #8
- 8008d8a: 2b00 cmp r3, #0
- 8008d8c: d009 beq.n 8008da2 <HAL_RCC_ClockConfig+0x192>
- {
- assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
- MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
- 8008d8e: 4b11 ldr r3, [pc, #68] ; (8008dd4 <HAL_RCC_ClockConfig+0x1c4>)
- 8008d90: 689b ldr r3, [r3, #8]
- 8008d92: f423 4260 bic.w r2, r3, #57344 ; 0xe000
- 8008d96: 687b ldr r3, [r7, #4]
- 8008d98: 691b ldr r3, [r3, #16]
- 8008d9a: 00db lsls r3, r3, #3
- 8008d9c: 490d ldr r1, [pc, #52] ; (8008dd4 <HAL_RCC_ClockConfig+0x1c4>)
- 8008d9e: 4313 orrs r3, r2
- 8008da0: 608b str r3, [r1, #8]
- }
-
- /* Update the SystemCoreClock global variable */
- SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos];
- 8008da2: f000 f81d bl 8008de0 <HAL_RCC_GetSysClockFreq>
- 8008da6: 4601 mov r1, r0
- 8008da8: 4b0a ldr r3, [pc, #40] ; (8008dd4 <HAL_RCC_ClockConfig+0x1c4>)
- 8008daa: 689b ldr r3, [r3, #8]
- 8008dac: 091b lsrs r3, r3, #4
- 8008dae: f003 030f and.w r3, r3, #15
- 8008db2: 4a09 ldr r2, [pc, #36] ; (8008dd8 <HAL_RCC_ClockConfig+0x1c8>)
- 8008db4: 5cd3 ldrb r3, [r2, r3]
- 8008db6: fa21 f303 lsr.w r3, r1, r3
- 8008dba: 4a08 ldr r2, [pc, #32] ; (8008ddc <HAL_RCC_ClockConfig+0x1cc>)
- 8008dbc: 6013 str r3, [r2, #0]
-
- /* Configure the source of time base considering new system clocks settings*/
- HAL_InitTick (TICK_INT_PRIORITY);
- 8008dbe: 2000 movs r0, #0
- 8008dc0: f7ff f924 bl 800800c <HAL_InitTick>
-
- return HAL_OK;
- 8008dc4: 2300 movs r3, #0
-}
- 8008dc6: 4618 mov r0, r3
- 8008dc8: 3710 adds r7, #16
- 8008dca: 46bd mov sp, r7
- 8008dcc: bd80 pop {r7, pc}
- 8008dce: bf00 nop
- 8008dd0: 40023c00 .word 0x40023c00
- 8008dd4: 40023800 .word 0x40023800
- 8008dd8: 08012378 .word 0x08012378
- 8008ddc: 20000008 .word 0x20000008
-
-08008de0 <HAL_RCC_GetSysClockFreq>:
- *
- *
- * @retval SYSCLK frequency
- */
-uint32_t HAL_RCC_GetSysClockFreq(void)
-{
- 8008de0: b5f0 push {r4, r5, r6, r7, lr}
- 8008de2: b085 sub sp, #20
- 8008de4: af00 add r7, sp, #0
- uint32_t pllm = 0, pllvco = 0, pllp = 0;
- 8008de6: 2300 movs r3, #0
- 8008de8: 607b str r3, [r7, #4]
- 8008dea: 2300 movs r3, #0
- 8008dec: 60fb str r3, [r7, #12]
- 8008dee: 2300 movs r3, #0
- 8008df0: 603b str r3, [r7, #0]
- uint32_t sysclockfreq = 0;
- 8008df2: 2300 movs r3, #0
- 8008df4: 60bb str r3, [r7, #8]
-
- /* Get SYSCLK source -------------------------------------------------------*/
- switch (RCC->CFGR & RCC_CFGR_SWS)
- 8008df6: 4b50 ldr r3, [pc, #320] ; (8008f38 <HAL_RCC_GetSysClockFreq+0x158>)
- 8008df8: 689b ldr r3, [r3, #8]
- 8008dfa: f003 030c and.w r3, r3, #12
- 8008dfe: 2b04 cmp r3, #4
- 8008e00: d007 beq.n 8008e12 <HAL_RCC_GetSysClockFreq+0x32>
- 8008e02: 2b08 cmp r3, #8
- 8008e04: d008 beq.n 8008e18 <HAL_RCC_GetSysClockFreq+0x38>
- 8008e06: 2b00 cmp r3, #0
- 8008e08: f040 808d bne.w 8008f26 <HAL_RCC_GetSysClockFreq+0x146>
- {
- case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */
- {
- sysclockfreq = HSI_VALUE;
- 8008e0c: 4b4b ldr r3, [pc, #300] ; (8008f3c <HAL_RCC_GetSysClockFreq+0x15c>)
- 8008e0e: 60bb str r3, [r7, #8]
- break;
- 8008e10: e08c b.n 8008f2c <HAL_RCC_GetSysClockFreq+0x14c>
- }
- case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock source */
- {
- sysclockfreq = HSE_VALUE;
- 8008e12: 4b4b ldr r3, [pc, #300] ; (8008f40 <HAL_RCC_GetSysClockFreq+0x160>)
- 8008e14: 60bb str r3, [r7, #8]
- break;
- 8008e16: e089 b.n 8008f2c <HAL_RCC_GetSysClockFreq+0x14c>
- }
- case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock source */
- {
- /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
- SYSCLK = PLL_VCO / PLLP */
- pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
- 8008e18: 4b47 ldr r3, [pc, #284] ; (8008f38 <HAL_RCC_GetSysClockFreq+0x158>)
- 8008e1a: 685b ldr r3, [r3, #4]
- 8008e1c: f003 033f and.w r3, r3, #63 ; 0x3f
- 8008e20: 607b str r3, [r7, #4]
- if (__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLCFGR_PLLSRC_HSI)
- 8008e22: 4b45 ldr r3, [pc, #276] ; (8008f38 <HAL_RCC_GetSysClockFreq+0x158>)
- 8008e24: 685b ldr r3, [r3, #4]
- 8008e26: f403 0380 and.w r3, r3, #4194304 ; 0x400000
- 8008e2a: 2b00 cmp r3, #0
- 8008e2c: d023 beq.n 8008e76 <HAL_RCC_GetSysClockFreq+0x96>
- {
- /* HSE used as PLL clock source */
- pllvco = (uint32_t) ((((uint64_t) HSE_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm);
- 8008e2e: 4b42 ldr r3, [pc, #264] ; (8008f38 <HAL_RCC_GetSysClockFreq+0x158>)
- 8008e30: 685b ldr r3, [r3, #4]
- 8008e32: 099b lsrs r3, r3, #6
- 8008e34: f04f 0400 mov.w r4, #0
- 8008e38: f240 11ff movw r1, #511 ; 0x1ff
- 8008e3c: f04f 0200 mov.w r2, #0
- 8008e40: ea03 0501 and.w r5, r3, r1
- 8008e44: ea04 0602 and.w r6, r4, r2
- 8008e48: 4a3d ldr r2, [pc, #244] ; (8008f40 <HAL_RCC_GetSysClockFreq+0x160>)
- 8008e4a: fb02 f106 mul.w r1, r2, r6
- 8008e4e: 2200 movs r2, #0
- 8008e50: fb02 f205 mul.w r2, r2, r5
- 8008e54: 440a add r2, r1
- 8008e56: 493a ldr r1, [pc, #232] ; (8008f40 <HAL_RCC_GetSysClockFreq+0x160>)
- 8008e58: fba5 0101 umull r0, r1, r5, r1
- 8008e5c: 1853 adds r3, r2, r1
- 8008e5e: 4619 mov r1, r3
- 8008e60: 687b ldr r3, [r7, #4]
- 8008e62: f04f 0400 mov.w r4, #0
- 8008e66: 461a mov r2, r3
- 8008e68: 4623 mov r3, r4
- 8008e6a: f7fd ffbb bl 8006de4 <__aeabi_uldivmod>
- 8008e6e: 4603 mov r3, r0
- 8008e70: 460c mov r4, r1
- 8008e72: 60fb str r3, [r7, #12]
- 8008e74: e049 b.n 8008f0a <HAL_RCC_GetSysClockFreq+0x12a>
- }
- else
- {
- /* HSI used as PLL clock source */
- pllvco = (uint32_t) ((((uint64_t) HSI_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm);
- 8008e76: 4b30 ldr r3, [pc, #192] ; (8008f38 <HAL_RCC_GetSysClockFreq+0x158>)
- 8008e78: 685b ldr r3, [r3, #4]
- 8008e7a: 099b lsrs r3, r3, #6
- 8008e7c: f04f 0400 mov.w r4, #0
- 8008e80: f240 11ff movw r1, #511 ; 0x1ff
- 8008e84: f04f 0200 mov.w r2, #0
- 8008e88: ea03 0501 and.w r5, r3, r1
- 8008e8c: ea04 0602 and.w r6, r4, r2
- 8008e90: 4629 mov r1, r5
- 8008e92: 4632 mov r2, r6
- 8008e94: f04f 0300 mov.w r3, #0
- 8008e98: f04f 0400 mov.w r4, #0
- 8008e9c: 0154 lsls r4, r2, #5
- 8008e9e: ea44 64d1 orr.w r4, r4, r1, lsr #27
- 8008ea2: 014b lsls r3, r1, #5
- 8008ea4: 4619 mov r1, r3
- 8008ea6: 4622 mov r2, r4
- 8008ea8: 1b49 subs r1, r1, r5
- 8008eaa: eb62 0206 sbc.w r2, r2, r6
- 8008eae: f04f 0300 mov.w r3, #0
- 8008eb2: f04f 0400 mov.w r4, #0
- 8008eb6: 0194 lsls r4, r2, #6
- 8008eb8: ea44 6491 orr.w r4, r4, r1, lsr #26
- 8008ebc: 018b lsls r3, r1, #6
- 8008ebe: 1a5b subs r3, r3, r1
- 8008ec0: eb64 0402 sbc.w r4, r4, r2
- 8008ec4: f04f 0100 mov.w r1, #0
- 8008ec8: f04f 0200 mov.w r2, #0
- 8008ecc: 00e2 lsls r2, r4, #3
- 8008ece: ea42 7253 orr.w r2, r2, r3, lsr #29
- 8008ed2: 00d9 lsls r1, r3, #3
- 8008ed4: 460b mov r3, r1
- 8008ed6: 4614 mov r4, r2
- 8008ed8: 195b adds r3, r3, r5
- 8008eda: eb44 0406 adc.w r4, r4, r6
- 8008ede: f04f 0100 mov.w r1, #0
- 8008ee2: f04f 0200 mov.w r2, #0
- 8008ee6: 02a2 lsls r2, r4, #10
- 8008ee8: ea42 5293 orr.w r2, r2, r3, lsr #22
- 8008eec: 0299 lsls r1, r3, #10
- 8008eee: 460b mov r3, r1
- 8008ef0: 4614 mov r4, r2
- 8008ef2: 4618 mov r0, r3
- 8008ef4: 4621 mov r1, r4
- 8008ef6: 687b ldr r3, [r7, #4]
- 8008ef8: f04f 0400 mov.w r4, #0
- 8008efc: 461a mov r2, r3
- 8008efe: 4623 mov r3, r4
- 8008f00: f7fd ff70 bl 8006de4 <__aeabi_uldivmod>
- 8008f04: 4603 mov r3, r0
- 8008f06: 460c mov r4, r1
- 8008f08: 60fb str r3, [r7, #12]
- }
- pllp = ((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >> RCC_PLLCFGR_PLLP_Pos) + 1 ) *2);
- 8008f0a: 4b0b ldr r3, [pc, #44] ; (8008f38 <HAL_RCC_GetSysClockFreq+0x158>)
- 8008f0c: 685b ldr r3, [r3, #4]
- 8008f0e: 0c1b lsrs r3, r3, #16
- 8008f10: f003 0303 and.w r3, r3, #3
- 8008f14: 3301 adds r3, #1
- 8008f16: 005b lsls r3, r3, #1
- 8008f18: 603b str r3, [r7, #0]
-
- sysclockfreq = pllvco/pllp;
- 8008f1a: 68fa ldr r2, [r7, #12]
- 8008f1c: 683b ldr r3, [r7, #0]
- 8008f1e: fbb2 f3f3 udiv r3, r2, r3
- 8008f22: 60bb str r3, [r7, #8]
- break;
- 8008f24: e002 b.n 8008f2c <HAL_RCC_GetSysClockFreq+0x14c>
- }
- default:
- {
- sysclockfreq = HSI_VALUE;
- 8008f26: 4b05 ldr r3, [pc, #20] ; (8008f3c <HAL_RCC_GetSysClockFreq+0x15c>)
- 8008f28: 60bb str r3, [r7, #8]
- break;
- 8008f2a: bf00 nop
- }
- }
- return sysclockfreq;
- 8008f2c: 68bb ldr r3, [r7, #8]
-}
- 8008f2e: 4618 mov r0, r3
- 8008f30: 3714 adds r7, #20
- 8008f32: 46bd mov sp, r7
- 8008f34: bdf0 pop {r4, r5, r6, r7, pc}
- 8008f36: bf00 nop
- 8008f38: 40023800 .word 0x40023800
- 8008f3c: 00f42400 .word 0x00f42400
- 8008f40: 017d7840 .word 0x017d7840
-
-08008f44 <HAL_RCC_GetHCLKFreq>:
- * right HCLK value. Otherwise, any configuration based on this function will be incorrect.
- * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency.
- * @retval HCLK frequency
- */
-uint32_t HAL_RCC_GetHCLKFreq(void)
-{
- 8008f44: b480 push {r7}
- 8008f46: af00 add r7, sp, #0
- return SystemCoreClock;
- 8008f48: 4b03 ldr r3, [pc, #12] ; (8008f58 <HAL_RCC_GetHCLKFreq+0x14>)
- 8008f4a: 681b ldr r3, [r3, #0]
-}
- 8008f4c: 4618 mov r0, r3
- 8008f4e: 46bd mov sp, r7
- 8008f50: f85d 7b04 ldr.w r7, [sp], #4
- 8008f54: 4770 bx lr
- 8008f56: bf00 nop
- 8008f58: 20000008 .word 0x20000008
-
-08008f5c <HAL_RCC_GetPCLK1Freq>:
- * @note Each time PCLK1 changes, this function must be called to update the
- * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
- * @retval PCLK1 frequency
- */
-uint32_t HAL_RCC_GetPCLK1Freq(void)
-{
- 8008f5c: b580 push {r7, lr}
- 8008f5e: af00 add r7, sp, #0
- /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
- return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1)>> RCC_CFGR_PPRE1_Pos]);
- 8008f60: f7ff fff0 bl 8008f44 <HAL_RCC_GetHCLKFreq>
- 8008f64: 4601 mov r1, r0
- 8008f66: 4b05 ldr r3, [pc, #20] ; (8008f7c <HAL_RCC_GetPCLK1Freq+0x20>)
- 8008f68: 689b ldr r3, [r3, #8]
- 8008f6a: 0a9b lsrs r3, r3, #10
- 8008f6c: f003 0307 and.w r3, r3, #7
- 8008f70: 4a03 ldr r2, [pc, #12] ; (8008f80 <HAL_RCC_GetPCLK1Freq+0x24>)
- 8008f72: 5cd3 ldrb r3, [r2, r3]
- 8008f74: fa21 f303 lsr.w r3, r1, r3
-}
- 8008f78: 4618 mov r0, r3
- 8008f7a: bd80 pop {r7, pc}
- 8008f7c: 40023800 .word 0x40023800
- 8008f80: 08012388 .word 0x08012388
-
-08008f84 <HAL_RCC_GetPCLK2Freq>:
- * @note Each time PCLK2 changes, this function must be called to update the
- * right PCLK2 value. Otherwise, any configuration based on this function will be incorrect.
- * @retval PCLK2 frequency
- */
-uint32_t HAL_RCC_GetPCLK2Freq(void)
-{
- 8008f84: b580 push {r7, lr}
- 8008f86: af00 add r7, sp, #0
- /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/
- return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2)>> RCC_CFGR_PPRE2_Pos]);
- 8008f88: f7ff ffdc bl 8008f44 <HAL_RCC_GetHCLKFreq>
- 8008f8c: 4601 mov r1, r0
- 8008f8e: 4b05 ldr r3, [pc, #20] ; (8008fa4 <HAL_RCC_GetPCLK2Freq+0x20>)
- 8008f90: 689b ldr r3, [r3, #8]
- 8008f92: 0b5b lsrs r3, r3, #13
- 8008f94: f003 0307 and.w r3, r3, #7
- 8008f98: 4a03 ldr r2, [pc, #12] ; (8008fa8 <HAL_RCC_GetPCLK2Freq+0x24>)
- 8008f9a: 5cd3 ldrb r3, [r2, r3]
- 8008f9c: fa21 f303 lsr.w r3, r1, r3
-}
- 8008fa0: 4618 mov r0, r3
- 8008fa2: bd80 pop {r7, pc}
- 8008fa4: 40023800 .word 0x40023800
- 8008fa8: 08012388 .word 0x08012388
-
-08008fac <HAL_RCCEx_PeriphCLKConfig>:
- * the backup registers) are set to their reset values.
- *
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
-{
- 8008fac: b580 push {r7, lr}
- 8008fae: b088 sub sp, #32
- 8008fb0: af00 add r7, sp, #0
- 8008fb2: 6078 str r0, [r7, #4]
- uint32_t tickstart = 0;
- 8008fb4: 2300 movs r3, #0
- 8008fb6: 617b str r3, [r7, #20]
- uint32_t tmpreg0 = 0;
- 8008fb8: 2300 movs r3, #0
- 8008fba: 613b str r3, [r7, #16]
- uint32_t tmpreg1 = 0;
- 8008fbc: 2300 movs r3, #0
- 8008fbe: 60fb str r3, [r7, #12]
- uint32_t plli2sused = 0;
- 8008fc0: 2300 movs r3, #0
- 8008fc2: 61fb str r3, [r7, #28]
- uint32_t pllsaiused = 0;
- 8008fc4: 2300 movs r3, #0
- 8008fc6: 61bb str r3, [r7, #24]
-
- /* Check the parameters */
- assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
-
- /*----------------------------------- I2S configuration ----------------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S) == (RCC_PERIPHCLK_I2S))
- 8008fc8: 687b ldr r3, [r7, #4]
- 8008fca: 681b ldr r3, [r3, #0]
- 8008fcc: f003 0301 and.w r3, r3, #1
- 8008fd0: 2b00 cmp r3, #0
- 8008fd2: d012 beq.n 8008ffa <HAL_RCCEx_PeriphCLKConfig+0x4e>
- {
- /* Check the parameters */
- assert_param(IS_RCC_I2SCLKSOURCE(PeriphClkInit->I2sClockSelection));
-
- /* Configure I2S Clock source */
- __HAL_RCC_I2S_CONFIG(PeriphClkInit->I2sClockSelection);
- 8008fd4: 4b69 ldr r3, [pc, #420] ; (800917c <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 8008fd6: 689b ldr r3, [r3, #8]
- 8008fd8: 4a68 ldr r2, [pc, #416] ; (800917c <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 8008fda: f423 0300 bic.w r3, r3, #8388608 ; 0x800000
- 8008fde: 6093 str r3, [r2, #8]
- 8008fe0: 4b66 ldr r3, [pc, #408] ; (800917c <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 8008fe2: 689a ldr r2, [r3, #8]
- 8008fe4: 687b ldr r3, [r7, #4]
- 8008fe6: 6b5b ldr r3, [r3, #52] ; 0x34
- 8008fe8: 4964 ldr r1, [pc, #400] ; (800917c <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 8008fea: 4313 orrs r3, r2
- 8008fec: 608b str r3, [r1, #8]
-
- /* Enable the PLLI2S when it's used as clock source for I2S */
- if(PeriphClkInit->I2sClockSelection == RCC_I2SCLKSOURCE_PLLI2S)
- 8008fee: 687b ldr r3, [r7, #4]
- 8008ff0: 6b5b ldr r3, [r3, #52] ; 0x34
- 8008ff2: 2b00 cmp r3, #0
- 8008ff4: d101 bne.n 8008ffa <HAL_RCCEx_PeriphCLKConfig+0x4e>
- {
- plli2sused = 1;
- 8008ff6: 2301 movs r3, #1
- 8008ff8: 61fb str r3, [r7, #28]
- }
- }
-
- /*------------------------------------ SAI1 configuration --------------------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == (RCC_PERIPHCLK_SAI1))
- 8008ffa: 687b ldr r3, [r7, #4]
- 8008ffc: 681b ldr r3, [r3, #0]
- 8008ffe: f403 2300 and.w r3, r3, #524288 ; 0x80000
- 8009002: 2b00 cmp r3, #0
- 8009004: d017 beq.n 8009036 <HAL_RCCEx_PeriphCLKConfig+0x8a>
- {
- /* Check the parameters */
- assert_param(IS_RCC_SAI1CLKSOURCE(PeriphClkInit->Sai1ClockSelection));
-
- /* Configure SAI1 Clock source */
- __HAL_RCC_SAI1_CONFIG(PeriphClkInit->Sai1ClockSelection);
- 8009006: 4b5d ldr r3, [pc, #372] ; (800917c <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 8009008: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c
- 800900c: f423 1240 bic.w r2, r3, #3145728 ; 0x300000
- 8009010: 687b ldr r3, [r7, #4]
- 8009012: 6bdb ldr r3, [r3, #60] ; 0x3c
- 8009014: 4959 ldr r1, [pc, #356] ; (800917c <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 8009016: 4313 orrs r3, r2
- 8009018: f8c1 308c str.w r3, [r1, #140] ; 0x8c
- /* Enable the PLLI2S when it's used as clock source for SAI */
- if(PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLI2S)
- 800901c: 687b ldr r3, [r7, #4]
- 800901e: 6bdb ldr r3, [r3, #60] ; 0x3c
- 8009020: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000
- 8009024: d101 bne.n 800902a <HAL_RCCEx_PeriphCLKConfig+0x7e>
- {
- plli2sused = 1;
- 8009026: 2301 movs r3, #1
- 8009028: 61fb str r3, [r7, #28]
- }
- /* Enable the PLLSAI when it's used as clock source for SAI */
- if(PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLSAI)
- 800902a: 687b ldr r3, [r7, #4]
- 800902c: 6bdb ldr r3, [r3, #60] ; 0x3c
- 800902e: 2b00 cmp r3, #0
- 8009030: d101 bne.n 8009036 <HAL_RCCEx_PeriphCLKConfig+0x8a>
- {
- pllsaiused = 1;
- 8009032: 2301 movs r3, #1
- 8009034: 61bb str r3, [r7, #24]
- }
- }
-
- /*------------------------------------ SAI2 configuration --------------------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == (RCC_PERIPHCLK_SAI2))
- 8009036: 687b ldr r3, [r7, #4]
- 8009038: 681b ldr r3, [r3, #0]
- 800903a: f403 1380 and.w r3, r3, #1048576 ; 0x100000
- 800903e: 2b00 cmp r3, #0
- 8009040: d017 beq.n 8009072 <HAL_RCCEx_PeriphCLKConfig+0xc6>
- {
- /* Check the parameters */
- assert_param(IS_RCC_SAI2CLKSOURCE(PeriphClkInit->Sai2ClockSelection));
-
- /* Configure SAI2 Clock source */
- __HAL_RCC_SAI2_CONFIG(PeriphClkInit->Sai2ClockSelection);
- 8009042: 4b4e ldr r3, [pc, #312] ; (800917c <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 8009044: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c
- 8009048: f423 0240 bic.w r2, r3, #12582912 ; 0xc00000
- 800904c: 687b ldr r3, [r7, #4]
- 800904e: 6c1b ldr r3, [r3, #64] ; 0x40
- 8009050: 494a ldr r1, [pc, #296] ; (800917c <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 8009052: 4313 orrs r3, r2
- 8009054: f8c1 308c str.w r3, [r1, #140] ; 0x8c
-
- /* Enable the PLLI2S when it's used as clock source for SAI */
- if(PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLI2S)
- 8009058: 687b ldr r3, [r7, #4]
- 800905a: 6c1b ldr r3, [r3, #64] ; 0x40
- 800905c: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000
- 8009060: d101 bne.n 8009066 <HAL_RCCEx_PeriphCLKConfig+0xba>
- {
- plli2sused = 1;
- 8009062: 2301 movs r3, #1
- 8009064: 61fb str r3, [r7, #28]
- }
- /* Enable the PLLSAI when it's used as clock source for SAI */
- if(PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLSAI)
- 8009066: 687b ldr r3, [r7, #4]
- 8009068: 6c1b ldr r3, [r3, #64] ; 0x40
- 800906a: 2b00 cmp r3, #0
- 800906c: d101 bne.n 8009072 <HAL_RCCEx_PeriphCLKConfig+0xc6>
- {
- pllsaiused = 1;
- 800906e: 2301 movs r3, #1
- 8009070: 61bb str r3, [r7, #24]
- }
- }
-
- /*-------------------------------------- SPDIF-RX Configuration -----------------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPDIFRX) == RCC_PERIPHCLK_SPDIFRX)
- 8009072: 687b ldr r3, [r7, #4]
- 8009074: 681b ldr r3, [r3, #0]
- 8009076: f003 7380 and.w r3, r3, #16777216 ; 0x1000000
- 800907a: 2b00 cmp r3, #0
- 800907c: d001 beq.n 8009082 <HAL_RCCEx_PeriphCLKConfig+0xd6>
- {
- plli2sused = 1;
- 800907e: 2301 movs r3, #1
- 8009080: 61fb str r3, [r7, #28]
- }
-
- /*------------------------------------ RTC configuration --------------------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == (RCC_PERIPHCLK_RTC))
- 8009082: 687b ldr r3, [r7, #4]
- 8009084: 681b ldr r3, [r3, #0]
- 8009086: f003 0320 and.w r3, r3, #32
- 800908a: 2b00 cmp r3, #0
- 800908c: f000 808b beq.w 80091a6 <HAL_RCCEx_PeriphCLKConfig+0x1fa>
- {
- /* Check for RTC Parameters used to output RTCCLK */
- assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection));
-
- /* Enable Power Clock*/
- __HAL_RCC_PWR_CLK_ENABLE();
- 8009090: 4b3a ldr r3, [pc, #232] ; (800917c <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 8009092: 6c1b ldr r3, [r3, #64] ; 0x40
- 8009094: 4a39 ldr r2, [pc, #228] ; (800917c <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 8009096: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
- 800909a: 6413 str r3, [r2, #64] ; 0x40
- 800909c: 4b37 ldr r3, [pc, #220] ; (800917c <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 800909e: 6c1b ldr r3, [r3, #64] ; 0x40
- 80090a0: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
- 80090a4: 60bb str r3, [r7, #8]
- 80090a6: 68bb ldr r3, [r7, #8]
-
- /* Enable write access to Backup domain */
- PWR->CR1 |= PWR_CR1_DBP;
- 80090a8: 4b35 ldr r3, [pc, #212] ; (8009180 <HAL_RCCEx_PeriphCLKConfig+0x1d4>)
- 80090aa: 681b ldr r3, [r3, #0]
- 80090ac: 4a34 ldr r2, [pc, #208] ; (8009180 <HAL_RCCEx_PeriphCLKConfig+0x1d4>)
- 80090ae: f443 7380 orr.w r3, r3, #256 ; 0x100
- 80090b2: 6013 str r3, [r2, #0]
-
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 80090b4: f7fe ffee bl 8008094 <HAL_GetTick>
- 80090b8: 6178 str r0, [r7, #20]
-
- /* Wait for Backup domain Write protection disable */
- while((PWR->CR1 & PWR_CR1_DBP) == RESET)
- 80090ba: e008 b.n 80090ce <HAL_RCCEx_PeriphCLKConfig+0x122>
- {
- if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
- 80090bc: f7fe ffea bl 8008094 <HAL_GetTick>
- 80090c0: 4602 mov r2, r0
- 80090c2: 697b ldr r3, [r7, #20]
- 80090c4: 1ad3 subs r3, r2, r3
- 80090c6: 2b64 cmp r3, #100 ; 0x64
- 80090c8: d901 bls.n 80090ce <HAL_RCCEx_PeriphCLKConfig+0x122>
- {
- return HAL_TIMEOUT;
- 80090ca: 2303 movs r3, #3
- 80090cc: e38d b.n 80097ea <HAL_RCCEx_PeriphCLKConfig+0x83e>
- while((PWR->CR1 & PWR_CR1_DBP) == RESET)
- 80090ce: 4b2c ldr r3, [pc, #176] ; (8009180 <HAL_RCCEx_PeriphCLKConfig+0x1d4>)
- 80090d0: 681b ldr r3, [r3, #0]
- 80090d2: f403 7380 and.w r3, r3, #256 ; 0x100
- 80090d6: 2b00 cmp r3, #0
- 80090d8: d0f0 beq.n 80090bc <HAL_RCCEx_PeriphCLKConfig+0x110>
- }
- }
-
- /* Reset the Backup domain only if the RTC Clock source selection is modified */
- tmpreg0 = (RCC->BDCR & RCC_BDCR_RTCSEL);
- 80090da: 4b28 ldr r3, [pc, #160] ; (800917c <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 80090dc: 6f1b ldr r3, [r3, #112] ; 0x70
- 80090de: f403 7340 and.w r3, r3, #768 ; 0x300
- 80090e2: 613b str r3, [r7, #16]
-
- if((tmpreg0 != 0x00000000U) && (tmpreg0 != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)))
- 80090e4: 693b ldr r3, [r7, #16]
- 80090e6: 2b00 cmp r3, #0
- 80090e8: d035 beq.n 8009156 <HAL_RCCEx_PeriphCLKConfig+0x1aa>
- 80090ea: 687b ldr r3, [r7, #4]
- 80090ec: 6b1b ldr r3, [r3, #48] ; 0x30
- 80090ee: f403 7340 and.w r3, r3, #768 ; 0x300
- 80090f2: 693a ldr r2, [r7, #16]
- 80090f4: 429a cmp r2, r3
- 80090f6: d02e beq.n 8009156 <HAL_RCCEx_PeriphCLKConfig+0x1aa>
- {
- /* Store the content of BDCR register before the reset of Backup Domain */
- tmpreg0 = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
- 80090f8: 4b20 ldr r3, [pc, #128] ; (800917c <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 80090fa: 6f1b ldr r3, [r3, #112] ; 0x70
- 80090fc: f423 7340 bic.w r3, r3, #768 ; 0x300
- 8009100: 613b str r3, [r7, #16]
-
- /* RTC Clock selection can be changed only if the Backup Domain is reset */
- __HAL_RCC_BACKUPRESET_FORCE();
- 8009102: 4b1e ldr r3, [pc, #120] ; (800917c <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 8009104: 6f1b ldr r3, [r3, #112] ; 0x70
- 8009106: 4a1d ldr r2, [pc, #116] ; (800917c <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 8009108: f443 3380 orr.w r3, r3, #65536 ; 0x10000
- 800910c: 6713 str r3, [r2, #112] ; 0x70
- __HAL_RCC_BACKUPRESET_RELEASE();
- 800910e: 4b1b ldr r3, [pc, #108] ; (800917c <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 8009110: 6f1b ldr r3, [r3, #112] ; 0x70
- 8009112: 4a1a ldr r2, [pc, #104] ; (800917c <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 8009114: f423 3380 bic.w r3, r3, #65536 ; 0x10000
- 8009118: 6713 str r3, [r2, #112] ; 0x70
-
- /* Restore the Content of BDCR register */
- RCC->BDCR = tmpreg0;
- 800911a: 4a18 ldr r2, [pc, #96] ; (800917c <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 800911c: 693b ldr r3, [r7, #16]
- 800911e: 6713 str r3, [r2, #112] ; 0x70
-
- /* Wait for LSE reactivation if LSE was enable prior to Backup Domain reset */
- if (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSEON))
- 8009120: 4b16 ldr r3, [pc, #88] ; (800917c <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 8009122: 6f1b ldr r3, [r3, #112] ; 0x70
- 8009124: f003 0301 and.w r3, r3, #1
- 8009128: 2b01 cmp r3, #1
- 800912a: d114 bne.n 8009156 <HAL_RCCEx_PeriphCLKConfig+0x1aa>
- {
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 800912c: f7fe ffb2 bl 8008094 <HAL_GetTick>
- 8009130: 6178 str r0, [r7, #20]
-
- /* Wait till LSE is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
- 8009132: e00a b.n 800914a <HAL_RCCEx_PeriphCLKConfig+0x19e>
- {
- if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
- 8009134: f7fe ffae bl 8008094 <HAL_GetTick>
- 8009138: 4602 mov r2, r0
- 800913a: 697b ldr r3, [r7, #20]
- 800913c: 1ad3 subs r3, r2, r3
- 800913e: f241 3288 movw r2, #5000 ; 0x1388
- 8009142: 4293 cmp r3, r2
- 8009144: d901 bls.n 800914a <HAL_RCCEx_PeriphCLKConfig+0x19e>
- {
- return HAL_TIMEOUT;
- 8009146: 2303 movs r3, #3
- 8009148: e34f b.n 80097ea <HAL_RCCEx_PeriphCLKConfig+0x83e>
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
- 800914a: 4b0c ldr r3, [pc, #48] ; (800917c <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 800914c: 6f1b ldr r3, [r3, #112] ; 0x70
- 800914e: f003 0302 and.w r3, r3, #2
- 8009152: 2b00 cmp r3, #0
- 8009154: d0ee beq.n 8009134 <HAL_RCCEx_PeriphCLKConfig+0x188>
- }
- }
- }
- }
- __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
- 8009156: 687b ldr r3, [r7, #4]
- 8009158: 6b1b ldr r3, [r3, #48] ; 0x30
- 800915a: f403 7340 and.w r3, r3, #768 ; 0x300
- 800915e: f5b3 7f40 cmp.w r3, #768 ; 0x300
- 8009162: d111 bne.n 8009188 <HAL_RCCEx_PeriphCLKConfig+0x1dc>
- 8009164: 4b05 ldr r3, [pc, #20] ; (800917c <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 8009166: 689b ldr r3, [r3, #8]
- 8009168: f423 12f8 bic.w r2, r3, #2031616 ; 0x1f0000
- 800916c: 687b ldr r3, [r7, #4]
- 800916e: 6b19 ldr r1, [r3, #48] ; 0x30
- 8009170: 4b04 ldr r3, [pc, #16] ; (8009184 <HAL_RCCEx_PeriphCLKConfig+0x1d8>)
- 8009172: 400b ands r3, r1
- 8009174: 4901 ldr r1, [pc, #4] ; (800917c <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 8009176: 4313 orrs r3, r2
- 8009178: 608b str r3, [r1, #8]
- 800917a: e00b b.n 8009194 <HAL_RCCEx_PeriphCLKConfig+0x1e8>
- 800917c: 40023800 .word 0x40023800
- 8009180: 40007000 .word 0x40007000
- 8009184: 0ffffcff .word 0x0ffffcff
- 8009188: 4bb3 ldr r3, [pc, #716] ; (8009458 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 800918a: 689b ldr r3, [r3, #8]
- 800918c: 4ab2 ldr r2, [pc, #712] ; (8009458 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 800918e: f423 13f8 bic.w r3, r3, #2031616 ; 0x1f0000
- 8009192: 6093 str r3, [r2, #8]
- 8009194: 4bb0 ldr r3, [pc, #704] ; (8009458 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8009196: 6f1a ldr r2, [r3, #112] ; 0x70
- 8009198: 687b ldr r3, [r7, #4]
- 800919a: 6b1b ldr r3, [r3, #48] ; 0x30
- 800919c: f3c3 030b ubfx r3, r3, #0, #12
- 80091a0: 49ad ldr r1, [pc, #692] ; (8009458 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 80091a2: 4313 orrs r3, r2
- 80091a4: 670b str r3, [r1, #112] ; 0x70
- }
-
- /*------------------------------------ TIM configuration --------------------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM) == (RCC_PERIPHCLK_TIM))
- 80091a6: 687b ldr r3, [r7, #4]
- 80091a8: 681b ldr r3, [r3, #0]
- 80091aa: f003 0310 and.w r3, r3, #16
- 80091ae: 2b00 cmp r3, #0
- 80091b0: d010 beq.n 80091d4 <HAL_RCCEx_PeriphCLKConfig+0x228>
- {
- /* Check the parameters */
- assert_param(IS_RCC_TIMPRES(PeriphClkInit->TIMPresSelection));
-
- /* Configure Timer Prescaler */
- __HAL_RCC_TIMCLKPRESCALER(PeriphClkInit->TIMPresSelection);
- 80091b2: 4ba9 ldr r3, [pc, #676] ; (8009458 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 80091b4: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c
- 80091b8: 4aa7 ldr r2, [pc, #668] ; (8009458 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 80091ba: f023 7380 bic.w r3, r3, #16777216 ; 0x1000000
- 80091be: f8c2 308c str.w r3, [r2, #140] ; 0x8c
- 80091c2: 4ba5 ldr r3, [pc, #660] ; (8009458 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 80091c4: f8d3 208c ldr.w r2, [r3, #140] ; 0x8c
- 80091c8: 687b ldr r3, [r7, #4]
- 80091ca: 6b9b ldr r3, [r3, #56] ; 0x38
- 80091cc: 49a2 ldr r1, [pc, #648] ; (8009458 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 80091ce: 4313 orrs r3, r2
- 80091d0: f8c1 308c str.w r3, [r1, #140] ; 0x8c
- }
-
- /*-------------------------------------- I2C1 Configuration -----------------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1)
- 80091d4: 687b ldr r3, [r7, #4]
- 80091d6: 681b ldr r3, [r3, #0]
- 80091d8: f403 4380 and.w r3, r3, #16384 ; 0x4000
- 80091dc: 2b00 cmp r3, #0
- 80091de: d00a beq.n 80091f6 <HAL_RCCEx_PeriphCLKConfig+0x24a>
- {
- /* Check the parameters */
- assert_param(IS_RCC_I2C1CLKSOURCE(PeriphClkInit->I2c1ClockSelection));
-
- /* Configure the I2C1 clock source */
- __HAL_RCC_I2C1_CONFIG(PeriphClkInit->I2c1ClockSelection);
- 80091e0: 4b9d ldr r3, [pc, #628] ; (8009458 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 80091e2: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 80091e6: f423 3240 bic.w r2, r3, #196608 ; 0x30000
- 80091ea: 687b ldr r3, [r7, #4]
- 80091ec: 6e5b ldr r3, [r3, #100] ; 0x64
- 80091ee: 499a ldr r1, [pc, #616] ; (8009458 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 80091f0: 4313 orrs r3, r2
- 80091f2: f8c1 3090 str.w r3, [r1, #144] ; 0x90
- }
-
- /*-------------------------------------- I2C2 Configuration -----------------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C2) == RCC_PERIPHCLK_I2C2)
- 80091f6: 687b ldr r3, [r7, #4]
- 80091f8: 681b ldr r3, [r3, #0]
- 80091fa: f403 4300 and.w r3, r3, #32768 ; 0x8000
- 80091fe: 2b00 cmp r3, #0
- 8009200: d00a beq.n 8009218 <HAL_RCCEx_PeriphCLKConfig+0x26c>
- {
- /* Check the parameters */
- assert_param(IS_RCC_I2C2CLKSOURCE(PeriphClkInit->I2c2ClockSelection));
-
- /* Configure the I2C2 clock source */
- __HAL_RCC_I2C2_CONFIG(PeriphClkInit->I2c2ClockSelection);
- 8009202: 4b95 ldr r3, [pc, #596] ; (8009458 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8009204: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 8009208: f423 2240 bic.w r2, r3, #786432 ; 0xc0000
- 800920c: 687b ldr r3, [r7, #4]
- 800920e: 6e9b ldr r3, [r3, #104] ; 0x68
- 8009210: 4991 ldr r1, [pc, #580] ; (8009458 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8009212: 4313 orrs r3, r2
- 8009214: f8c1 3090 str.w r3, [r1, #144] ; 0x90
- }
-
- /*-------------------------------------- I2C3 Configuration -----------------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C3) == RCC_PERIPHCLK_I2C3)
- 8009218: 687b ldr r3, [r7, #4]
- 800921a: 681b ldr r3, [r3, #0]
- 800921c: f403 3380 and.w r3, r3, #65536 ; 0x10000
- 8009220: 2b00 cmp r3, #0
- 8009222: d00a beq.n 800923a <HAL_RCCEx_PeriphCLKConfig+0x28e>
- {
- /* Check the parameters */
- assert_param(IS_RCC_I2C3CLKSOURCE(PeriphClkInit->I2c3ClockSelection));
-
- /* Configure the I2C3 clock source */
- __HAL_RCC_I2C3_CONFIG(PeriphClkInit->I2c3ClockSelection);
- 8009224: 4b8c ldr r3, [pc, #560] ; (8009458 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8009226: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 800922a: f423 1240 bic.w r2, r3, #3145728 ; 0x300000
- 800922e: 687b ldr r3, [r7, #4]
- 8009230: 6edb ldr r3, [r3, #108] ; 0x6c
- 8009232: 4989 ldr r1, [pc, #548] ; (8009458 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8009234: 4313 orrs r3, r2
- 8009236: f8c1 3090 str.w r3, [r1, #144] ; 0x90
- }
-
- /*-------------------------------------- I2C4 Configuration -----------------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C4) == RCC_PERIPHCLK_I2C4)
- 800923a: 687b ldr r3, [r7, #4]
- 800923c: 681b ldr r3, [r3, #0]
- 800923e: f403 3300 and.w r3, r3, #131072 ; 0x20000
- 8009242: 2b00 cmp r3, #0
- 8009244: d00a beq.n 800925c <HAL_RCCEx_PeriphCLKConfig+0x2b0>
- {
- /* Check the parameters */
- assert_param(IS_RCC_I2C4CLKSOURCE(PeriphClkInit->I2c4ClockSelection));
-
- /* Configure the I2C4 clock source */
- __HAL_RCC_I2C4_CONFIG(PeriphClkInit->I2c4ClockSelection);
- 8009246: 4b84 ldr r3, [pc, #528] ; (8009458 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8009248: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 800924c: f423 0240 bic.w r2, r3, #12582912 ; 0xc00000
- 8009250: 687b ldr r3, [r7, #4]
- 8009252: 6f1b ldr r3, [r3, #112] ; 0x70
- 8009254: 4980 ldr r1, [pc, #512] ; (8009458 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8009256: 4313 orrs r3, r2
- 8009258: f8c1 3090 str.w r3, [r1, #144] ; 0x90
- }
-
- /*-------------------------------------- USART1 Configuration -----------------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1)
- 800925c: 687b ldr r3, [r7, #4]
- 800925e: 681b ldr r3, [r3, #0]
- 8009260: f003 0340 and.w r3, r3, #64 ; 0x40
- 8009264: 2b00 cmp r3, #0
- 8009266: d00a beq.n 800927e <HAL_RCCEx_PeriphCLKConfig+0x2d2>
- {
- /* Check the parameters */
- assert_param(IS_RCC_USART1CLKSOURCE(PeriphClkInit->Usart1ClockSelection));
-
- /* Configure the USART1 clock source */
- __HAL_RCC_USART1_CONFIG(PeriphClkInit->Usart1ClockSelection);
- 8009268: 4b7b ldr r3, [pc, #492] ; (8009458 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 800926a: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 800926e: f023 0203 bic.w r2, r3, #3
- 8009272: 687b ldr r3, [r7, #4]
- 8009274: 6c5b ldr r3, [r3, #68] ; 0x44
- 8009276: 4978 ldr r1, [pc, #480] ; (8009458 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8009278: 4313 orrs r3, r2
- 800927a: f8c1 3090 str.w r3, [r1, #144] ; 0x90
- }
-
- /*-------------------------------------- USART2 Configuration -----------------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2)
- 800927e: 687b ldr r3, [r7, #4]
- 8009280: 681b ldr r3, [r3, #0]
- 8009282: f003 0380 and.w r3, r3, #128 ; 0x80
- 8009286: 2b00 cmp r3, #0
- 8009288: d00a beq.n 80092a0 <HAL_RCCEx_PeriphCLKConfig+0x2f4>
- {
- /* Check the parameters */
- assert_param(IS_RCC_USART2CLKSOURCE(PeriphClkInit->Usart2ClockSelection));
-
- /* Configure the USART2 clock source */
- __HAL_RCC_USART2_CONFIG(PeriphClkInit->Usart2ClockSelection);
- 800928a: 4b73 ldr r3, [pc, #460] ; (8009458 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 800928c: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 8009290: f023 020c bic.w r2, r3, #12
- 8009294: 687b ldr r3, [r7, #4]
- 8009296: 6c9b ldr r3, [r3, #72] ; 0x48
- 8009298: 496f ldr r1, [pc, #444] ; (8009458 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 800929a: 4313 orrs r3, r2
- 800929c: f8c1 3090 str.w r3, [r1, #144] ; 0x90
- }
-
- /*-------------------------------------- USART3 Configuration -----------------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART3) == RCC_PERIPHCLK_USART3)
- 80092a0: 687b ldr r3, [r7, #4]
- 80092a2: 681b ldr r3, [r3, #0]
- 80092a4: f403 7380 and.w r3, r3, #256 ; 0x100
- 80092a8: 2b00 cmp r3, #0
- 80092aa: d00a beq.n 80092c2 <HAL_RCCEx_PeriphCLKConfig+0x316>
- {
- /* Check the parameters */
- assert_param(IS_RCC_USART3CLKSOURCE(PeriphClkInit->Usart3ClockSelection));
-
- /* Configure the USART3 clock source */
- __HAL_RCC_USART3_CONFIG(PeriphClkInit->Usart3ClockSelection);
- 80092ac: 4b6a ldr r3, [pc, #424] ; (8009458 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 80092ae: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 80092b2: f023 0230 bic.w r2, r3, #48 ; 0x30
- 80092b6: 687b ldr r3, [r7, #4]
- 80092b8: 6cdb ldr r3, [r3, #76] ; 0x4c
- 80092ba: 4967 ldr r1, [pc, #412] ; (8009458 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 80092bc: 4313 orrs r3, r2
- 80092be: f8c1 3090 str.w r3, [r1, #144] ; 0x90
- }
-
- /*-------------------------------------- UART4 Configuration -----------------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART4) == RCC_PERIPHCLK_UART4)
- 80092c2: 687b ldr r3, [r7, #4]
- 80092c4: 681b ldr r3, [r3, #0]
- 80092c6: f403 7300 and.w r3, r3, #512 ; 0x200
- 80092ca: 2b00 cmp r3, #0
- 80092cc: d00a beq.n 80092e4 <HAL_RCCEx_PeriphCLKConfig+0x338>
- {
- /* Check the parameters */
- assert_param(IS_RCC_UART4CLKSOURCE(PeriphClkInit->Uart4ClockSelection));
-
- /* Configure the UART4 clock source */
- __HAL_RCC_UART4_CONFIG(PeriphClkInit->Uart4ClockSelection);
- 80092ce: 4b62 ldr r3, [pc, #392] ; (8009458 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 80092d0: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 80092d4: f023 02c0 bic.w r2, r3, #192 ; 0xc0
- 80092d8: 687b ldr r3, [r7, #4]
- 80092da: 6d1b ldr r3, [r3, #80] ; 0x50
- 80092dc: 495e ldr r1, [pc, #376] ; (8009458 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 80092de: 4313 orrs r3, r2
- 80092e0: f8c1 3090 str.w r3, [r1, #144] ; 0x90
- }
-
- /*-------------------------------------- UART5 Configuration -----------------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART5) == RCC_PERIPHCLK_UART5)
- 80092e4: 687b ldr r3, [r7, #4]
- 80092e6: 681b ldr r3, [r3, #0]
- 80092e8: f403 6380 and.w r3, r3, #1024 ; 0x400
- 80092ec: 2b00 cmp r3, #0
- 80092ee: d00a beq.n 8009306 <HAL_RCCEx_PeriphCLKConfig+0x35a>
- {
- /* Check the parameters */
- assert_param(IS_RCC_UART5CLKSOURCE(PeriphClkInit->Uart5ClockSelection));
-
- /* Configure the UART5 clock source */
- __HAL_RCC_UART5_CONFIG(PeriphClkInit->Uart5ClockSelection);
- 80092f0: 4b59 ldr r3, [pc, #356] ; (8009458 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 80092f2: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 80092f6: f423 7240 bic.w r2, r3, #768 ; 0x300
- 80092fa: 687b ldr r3, [r7, #4]
- 80092fc: 6d5b ldr r3, [r3, #84] ; 0x54
- 80092fe: 4956 ldr r1, [pc, #344] ; (8009458 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8009300: 4313 orrs r3, r2
- 8009302: f8c1 3090 str.w r3, [r1, #144] ; 0x90
- }
-
- /*-------------------------------------- USART6 Configuration -----------------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART6) == RCC_PERIPHCLK_USART6)
- 8009306: 687b ldr r3, [r7, #4]
- 8009308: 681b ldr r3, [r3, #0]
- 800930a: f403 6300 and.w r3, r3, #2048 ; 0x800
- 800930e: 2b00 cmp r3, #0
- 8009310: d00a beq.n 8009328 <HAL_RCCEx_PeriphCLKConfig+0x37c>
- {
- /* Check the parameters */
- assert_param(IS_RCC_USART6CLKSOURCE(PeriphClkInit->Usart6ClockSelection));
-
- /* Configure the USART6 clock source */
- __HAL_RCC_USART6_CONFIG(PeriphClkInit->Usart6ClockSelection);
- 8009312: 4b51 ldr r3, [pc, #324] ; (8009458 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8009314: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 8009318: f423 6240 bic.w r2, r3, #3072 ; 0xc00
- 800931c: 687b ldr r3, [r7, #4]
- 800931e: 6d9b ldr r3, [r3, #88] ; 0x58
- 8009320: 494d ldr r1, [pc, #308] ; (8009458 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8009322: 4313 orrs r3, r2
- 8009324: f8c1 3090 str.w r3, [r1, #144] ; 0x90
- }
-
- /*-------------------------------------- UART7 Configuration -----------------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART7) == RCC_PERIPHCLK_UART7)
- 8009328: 687b ldr r3, [r7, #4]
- 800932a: 681b ldr r3, [r3, #0]
- 800932c: f403 5380 and.w r3, r3, #4096 ; 0x1000
- 8009330: 2b00 cmp r3, #0
- 8009332: d00a beq.n 800934a <HAL_RCCEx_PeriphCLKConfig+0x39e>
- {
- /* Check the parameters */
- assert_param(IS_RCC_UART7CLKSOURCE(PeriphClkInit->Uart7ClockSelection));
-
- /* Configure the UART7 clock source */
- __HAL_RCC_UART7_CONFIG(PeriphClkInit->Uart7ClockSelection);
- 8009334: 4b48 ldr r3, [pc, #288] ; (8009458 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8009336: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 800933a: f423 5240 bic.w r2, r3, #12288 ; 0x3000
- 800933e: 687b ldr r3, [r7, #4]
- 8009340: 6ddb ldr r3, [r3, #92] ; 0x5c
- 8009342: 4945 ldr r1, [pc, #276] ; (8009458 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8009344: 4313 orrs r3, r2
- 8009346: f8c1 3090 str.w r3, [r1, #144] ; 0x90
- }
-
- /*-------------------------------------- UART8 Configuration -----------------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART8) == RCC_PERIPHCLK_UART8)
- 800934a: 687b ldr r3, [r7, #4]
- 800934c: 681b ldr r3, [r3, #0]
- 800934e: f403 5300 and.w r3, r3, #8192 ; 0x2000
- 8009352: 2b00 cmp r3, #0
- 8009354: d00a beq.n 800936c <HAL_RCCEx_PeriphCLKConfig+0x3c0>
- {
- /* Check the parameters */
- assert_param(IS_RCC_UART8CLKSOURCE(PeriphClkInit->Uart8ClockSelection));
-
- /* Configure the UART8 clock source */
- __HAL_RCC_UART8_CONFIG(PeriphClkInit->Uart8ClockSelection);
- 8009356: 4b40 ldr r3, [pc, #256] ; (8009458 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8009358: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 800935c: f423 4240 bic.w r2, r3, #49152 ; 0xc000
- 8009360: 687b ldr r3, [r7, #4]
- 8009362: 6e1b ldr r3, [r3, #96] ; 0x60
- 8009364: 493c ldr r1, [pc, #240] ; (8009458 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8009366: 4313 orrs r3, r2
- 8009368: f8c1 3090 str.w r3, [r1, #144] ; 0x90
- }
-
- /*--------------------------------------- CEC Configuration -----------------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CEC) == RCC_PERIPHCLK_CEC)
- 800936c: 687b ldr r3, [r7, #4]
- 800936e: 681b ldr r3, [r3, #0]
- 8009370: f403 0380 and.w r3, r3, #4194304 ; 0x400000
- 8009374: 2b00 cmp r3, #0
- 8009376: d00a beq.n 800938e <HAL_RCCEx_PeriphCLKConfig+0x3e2>
- {
- /* Check the parameters */
- assert_param(IS_RCC_CECCLKSOURCE(PeriphClkInit->CecClockSelection));
-
- /* Configure the CEC clock source */
- __HAL_RCC_CEC_CONFIG(PeriphClkInit->CecClockSelection);
- 8009378: 4b37 ldr r3, [pc, #220] ; (8009458 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 800937a: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 800937e: f023 6280 bic.w r2, r3, #67108864 ; 0x4000000
- 8009382: 687b ldr r3, [r7, #4]
- 8009384: 6f9b ldr r3, [r3, #120] ; 0x78
- 8009386: 4934 ldr r1, [pc, #208] ; (8009458 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8009388: 4313 orrs r3, r2
- 800938a: f8c1 3090 str.w r3, [r1, #144] ; 0x90
- }
-
- /*-------------------------------------- CK48 Configuration -----------------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CLK48) == RCC_PERIPHCLK_CLK48)
- 800938e: 687b ldr r3, [r7, #4]
- 8009390: 681b ldr r3, [r3, #0]
- 8009392: f403 1300 and.w r3, r3, #2097152 ; 0x200000
- 8009396: 2b00 cmp r3, #0
- 8009398: d011 beq.n 80093be <HAL_RCCEx_PeriphCLKConfig+0x412>
- {
- /* Check the parameters */
- assert_param(IS_RCC_CLK48SOURCE(PeriphClkInit->Clk48ClockSelection));
-
- /* Configure the CLK48 source */
- __HAL_RCC_CLK48_CONFIG(PeriphClkInit->Clk48ClockSelection);
- 800939a: 4b2f ldr r3, [pc, #188] ; (8009458 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 800939c: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 80093a0: f023 6200 bic.w r2, r3, #134217728 ; 0x8000000
- 80093a4: 687b ldr r3, [r7, #4]
- 80093a6: 6fdb ldr r3, [r3, #124] ; 0x7c
- 80093a8: 492b ldr r1, [pc, #172] ; (8009458 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 80093aa: 4313 orrs r3, r2
- 80093ac: f8c1 3090 str.w r3, [r1, #144] ; 0x90
-
- /* Enable the PLLSAI when it's used as clock source for CK48 */
- if(PeriphClkInit->Clk48ClockSelection == RCC_CLK48SOURCE_PLLSAIP)
- 80093b0: 687b ldr r3, [r7, #4]
- 80093b2: 6fdb ldr r3, [r3, #124] ; 0x7c
- 80093b4: f1b3 6f00 cmp.w r3, #134217728 ; 0x8000000
- 80093b8: d101 bne.n 80093be <HAL_RCCEx_PeriphCLKConfig+0x412>
- {
- pllsaiused = 1;
- 80093ba: 2301 movs r3, #1
- 80093bc: 61bb str r3, [r7, #24]
- }
- }
-
- /*-------------------------------------- LTDC Configuration -----------------------------------*/
-#if defined(STM32F746xx) || defined(STM32F756xx) || defined (STM32F767xx) || defined (STM32F769xx) || defined (STM32F777xx) || defined (STM32F779xx) || defined (STM32F750xx)
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LTDC) == RCC_PERIPHCLK_LTDC)
- 80093be: 687b ldr r3, [r7, #4]
- 80093c0: 681b ldr r3, [r3, #0]
- 80093c2: f003 0308 and.w r3, r3, #8
- 80093c6: 2b00 cmp r3, #0
- 80093c8: d001 beq.n 80093ce <HAL_RCCEx_PeriphCLKConfig+0x422>
- {
- pllsaiused = 1;
- 80093ca: 2301 movs r3, #1
- 80093cc: 61bb str r3, [r7, #24]
- }
-#endif /* STM32F746xx || STM32F756xx || STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx || STM32F750xx */
-
- /*-------------------------------------- LPTIM1 Configuration -----------------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM1) == RCC_PERIPHCLK_LPTIM1)
- 80093ce: 687b ldr r3, [r7, #4]
- 80093d0: 681b ldr r3, [r3, #0]
- 80093d2: f403 2380 and.w r3, r3, #262144 ; 0x40000
- 80093d6: 2b00 cmp r3, #0
- 80093d8: d00a beq.n 80093f0 <HAL_RCCEx_PeriphCLKConfig+0x444>
- {
- /* Check the parameters */
- assert_param(IS_RCC_LPTIM1CLK(PeriphClkInit->Lptim1ClockSelection));
-
- /* Configure the LTPIM1 clock source */
- __HAL_RCC_LPTIM1_CONFIG(PeriphClkInit->Lptim1ClockSelection);
- 80093da: 4b1f ldr r3, [pc, #124] ; (8009458 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 80093dc: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 80093e0: f023 7240 bic.w r2, r3, #50331648 ; 0x3000000
- 80093e4: 687b ldr r3, [r7, #4]
- 80093e6: 6f5b ldr r3, [r3, #116] ; 0x74
- 80093e8: 491b ldr r1, [pc, #108] ; (8009458 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 80093ea: 4313 orrs r3, r2
- 80093ec: f8c1 3090 str.w r3, [r1, #144] ; 0x90
- }
-
- /*------------------------------------- SDMMC1 Configuration ------------------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SDMMC1) == RCC_PERIPHCLK_SDMMC1)
- 80093f0: 687b ldr r3, [r7, #4]
- 80093f2: 681b ldr r3, [r3, #0]
- 80093f4: f403 0300 and.w r3, r3, #8388608 ; 0x800000
- 80093f8: 2b00 cmp r3, #0
- 80093fa: d00b beq.n 8009414 <HAL_RCCEx_PeriphCLKConfig+0x468>
- {
- /* Check the parameters */
- assert_param(IS_RCC_SDMMC1CLKSOURCE(PeriphClkInit->Sdmmc1ClockSelection));
-
- /* Configure the SDMMC1 clock source */
- __HAL_RCC_SDMMC1_CONFIG(PeriphClkInit->Sdmmc1ClockSelection);
- 80093fc: 4b16 ldr r3, [pc, #88] ; (8009458 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 80093fe: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 8009402: f023 5280 bic.w r2, r3, #268435456 ; 0x10000000
- 8009406: 687b ldr r3, [r7, #4]
- 8009408: f8d3 3080 ldr.w r3, [r3, #128] ; 0x80
- 800940c: 4912 ldr r1, [pc, #72] ; (8009458 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 800940e: 4313 orrs r3, r2
- 8009410: f8c1 3090 str.w r3, [r1, #144] ; 0x90
- }
-
-#if defined (STM32F765xx) || defined (STM32F767xx) || defined (STM32F769xx) || defined (STM32F777xx) || defined (STM32F779xx)
- /*------------------------------------- SDMMC2 Configuration ------------------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SDMMC2) == RCC_PERIPHCLK_SDMMC2)
- 8009414: 687b ldr r3, [r7, #4]
- 8009416: 681b ldr r3, [r3, #0]
- 8009418: f003 6380 and.w r3, r3, #67108864 ; 0x4000000
- 800941c: 2b00 cmp r3, #0
- 800941e: d00b beq.n 8009438 <HAL_RCCEx_PeriphCLKConfig+0x48c>
- {
- /* Check the parameters */
- assert_param(IS_RCC_SDMMC2CLKSOURCE(PeriphClkInit->Sdmmc2ClockSelection));
-
- /* Configure the SDMMC2 clock source */
- __HAL_RCC_SDMMC2_CONFIG(PeriphClkInit->Sdmmc2ClockSelection);
- 8009420: 4b0d ldr r3, [pc, #52] ; (8009458 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8009422: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 8009426: f023 5200 bic.w r2, r3, #536870912 ; 0x20000000
- 800942a: 687b ldr r3, [r7, #4]
- 800942c: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84
- 8009430: 4909 ldr r1, [pc, #36] ; (8009458 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8009432: 4313 orrs r3, r2
- 8009434: f8c1 3090 str.w r3, [r1, #144] ; 0x90
- }
-
- /*------------------------------------- DFSDM1 Configuration -------------------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_DFSDM1) == RCC_PERIPHCLK_DFSDM1)
- 8009438: 687b ldr r3, [r7, #4]
- 800943a: 681b ldr r3, [r3, #0]
- 800943c: f003 6300 and.w r3, r3, #134217728 ; 0x8000000
- 8009440: 2b00 cmp r3, #0
- 8009442: d00f beq.n 8009464 <HAL_RCCEx_PeriphCLKConfig+0x4b8>
- {
- /* Check the parameters */
- assert_param(IS_RCC_DFSDM1CLKSOURCE(PeriphClkInit->Dfsdm1ClockSelection));
-
- /* Configure the DFSDM1 interface clock source */
- __HAL_RCC_DFSDM1_CONFIG(PeriphClkInit->Dfsdm1ClockSelection);
- 8009444: 4b04 ldr r3, [pc, #16] ; (8009458 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8009446: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c
- 800944a: f023 7200 bic.w r2, r3, #33554432 ; 0x2000000
- 800944e: 687b ldr r3, [r7, #4]
- 8009450: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88
- 8009454: e002 b.n 800945c <HAL_RCCEx_PeriphCLKConfig+0x4b0>
- 8009456: bf00 nop
- 8009458: 40023800 .word 0x40023800
- 800945c: 4985 ldr r1, [pc, #532] ; (8009674 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 800945e: 4313 orrs r3, r2
- 8009460: f8c1 308c str.w r3, [r1, #140] ; 0x8c
- }
-
- /*------------------------------------- DFSDM AUDIO Configuration -------------------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_DFSDM1_AUDIO) == RCC_PERIPHCLK_DFSDM1_AUDIO)
- 8009464: 687b ldr r3, [r7, #4]
- 8009466: 681b ldr r3, [r3, #0]
- 8009468: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
- 800946c: 2b00 cmp r3, #0
- 800946e: d00b beq.n 8009488 <HAL_RCCEx_PeriphCLKConfig+0x4dc>
- {
- /* Check the parameters */
- assert_param(IS_RCC_DFSDM1AUDIOCLKSOURCE(PeriphClkInit->Dfsdm1AudioClockSelection));
-
- /* Configure the DFSDM interface clock source */
- __HAL_RCC_DFSDM1AUDIO_CONFIG(PeriphClkInit->Dfsdm1AudioClockSelection);
- 8009470: 4b80 ldr r3, [pc, #512] ; (8009674 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8009472: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c
- 8009476: f023 6280 bic.w r2, r3, #67108864 ; 0x4000000
- 800947a: 687b ldr r3, [r7, #4]
- 800947c: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c
- 8009480: 497c ldr r1, [pc, #496] ; (8009674 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8009482: 4313 orrs r3, r2
- 8009484: f8c1 308c str.w r3, [r1, #140] ; 0x8c
- }
-#endif /* STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */
-
- /*-------------------------------------- PLLI2S Configuration ---------------------------------*/
- /* PLLI2S is configured when a peripheral will use it as source clock : SAI1, SAI2, I2S or SPDIF-RX */
- if((plli2sused == 1) || (PeriphClkInit->PeriphClockSelection == RCC_PERIPHCLK_PLLI2S))
- 8009488: 69fb ldr r3, [r7, #28]
- 800948a: 2b01 cmp r3, #1
- 800948c: d005 beq.n 800949a <HAL_RCCEx_PeriphCLKConfig+0x4ee>
- 800948e: 687b ldr r3, [r7, #4]
- 8009490: 681b ldr r3, [r3, #0]
- 8009492: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000
- 8009496: f040 80d6 bne.w 8009646 <HAL_RCCEx_PeriphCLKConfig+0x69a>
- {
- /* Disable the PLLI2S */
- __HAL_RCC_PLLI2S_DISABLE();
- 800949a: 4b76 ldr r3, [pc, #472] ; (8009674 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 800949c: 681b ldr r3, [r3, #0]
- 800949e: 4a75 ldr r2, [pc, #468] ; (8009674 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 80094a0: f023 6380 bic.w r3, r3, #67108864 ; 0x4000000
- 80094a4: 6013 str r3, [r2, #0]
-
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 80094a6: f7fe fdf5 bl 8008094 <HAL_GetTick>
- 80094aa: 6178 str r0, [r7, #20]
-
- /* Wait till PLLI2S is disabled */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) != RESET)
- 80094ac: e008 b.n 80094c0 <HAL_RCCEx_PeriphCLKConfig+0x514>
- {
- if((HAL_GetTick() - tickstart) > PLLI2S_TIMEOUT_VALUE)
- 80094ae: f7fe fdf1 bl 8008094 <HAL_GetTick>
- 80094b2: 4602 mov r2, r0
- 80094b4: 697b ldr r3, [r7, #20]
- 80094b6: 1ad3 subs r3, r2, r3
- 80094b8: 2b64 cmp r3, #100 ; 0x64
- 80094ba: d901 bls.n 80094c0 <HAL_RCCEx_PeriphCLKConfig+0x514>
- {
- /* return in case of Timeout detected */
- return HAL_TIMEOUT;
- 80094bc: 2303 movs r3, #3
- 80094be: e194 b.n 80097ea <HAL_RCCEx_PeriphCLKConfig+0x83e>
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) != RESET)
- 80094c0: 4b6c ldr r3, [pc, #432] ; (8009674 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 80094c2: 681b ldr r3, [r3, #0]
- 80094c4: f003 6300 and.w r3, r3, #134217728 ; 0x8000000
- 80094c8: 2b00 cmp r3, #0
- 80094ca: d1f0 bne.n 80094ae <HAL_RCCEx_PeriphCLKConfig+0x502>
-
- /* check for common PLLI2S Parameters */
- assert_param(IS_RCC_PLLI2SN_VALUE(PeriphClkInit->PLLI2S.PLLI2SN));
-
- /*----------------- In Case of PLLI2S is selected as source clock for I2S -------------------*/
- if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S) == RCC_PERIPHCLK_I2S) && (PeriphClkInit->I2sClockSelection == RCC_I2SCLKSOURCE_PLLI2S)))
- 80094cc: 687b ldr r3, [r7, #4]
- 80094ce: 681b ldr r3, [r3, #0]
- 80094d0: f003 0301 and.w r3, r3, #1
- 80094d4: 2b00 cmp r3, #0
- 80094d6: d021 beq.n 800951c <HAL_RCCEx_PeriphCLKConfig+0x570>
- 80094d8: 687b ldr r3, [r7, #4]
- 80094da: 6b5b ldr r3, [r3, #52] ; 0x34
- 80094dc: 2b00 cmp r3, #0
- 80094de: d11d bne.n 800951c <HAL_RCCEx_PeriphCLKConfig+0x570>
- {
- /* check for Parameters */
- assert_param(IS_RCC_PLLI2SR_VALUE(PeriphClkInit->PLLI2S.PLLI2SR));
-
- /* Read PLLI2SP and PLLI2SQ value from PLLI2SCFGR register (this value is not needed for I2S configuration) */
- tmpreg0 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SP) >> RCC_PLLI2SCFGR_PLLI2SP_Pos);
- 80094e0: 4b64 ldr r3, [pc, #400] ; (8009674 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 80094e2: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84
- 80094e6: 0c1b lsrs r3, r3, #16
- 80094e8: f003 0303 and.w r3, r3, #3
- 80094ec: 613b str r3, [r7, #16]
- tmpreg1 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SQ) >> RCC_PLLI2SCFGR_PLLI2SQ_Pos);
- 80094ee: 4b61 ldr r3, [pc, #388] ; (8009674 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 80094f0: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84
- 80094f4: 0e1b lsrs r3, r3, #24
- 80094f6: f003 030f and.w r3, r3, #15
- 80094fa: 60fb str r3, [r7, #12]
- /* Configure the PLLI2S division factors */
- /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) x (PLLI2SN/PLLM) */
- /* I2SCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SR */
- __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN , tmpreg0, tmpreg1, PeriphClkInit->PLLI2S.PLLI2SR);
- 80094fc: 687b ldr r3, [r7, #4]
- 80094fe: 685b ldr r3, [r3, #4]
- 8009500: 019a lsls r2, r3, #6
- 8009502: 693b ldr r3, [r7, #16]
- 8009504: 041b lsls r3, r3, #16
- 8009506: 431a orrs r2, r3
- 8009508: 68fb ldr r3, [r7, #12]
- 800950a: 061b lsls r3, r3, #24
- 800950c: 431a orrs r2, r3
- 800950e: 687b ldr r3, [r7, #4]
- 8009510: 689b ldr r3, [r3, #8]
- 8009512: 071b lsls r3, r3, #28
- 8009514: 4957 ldr r1, [pc, #348] ; (8009674 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8009516: 4313 orrs r3, r2
- 8009518: f8c1 3084 str.w r3, [r1, #132] ; 0x84
- }
-
- /*----------------- In Case of PLLI2S is selected as source clock for SAI -------------------*/
- if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) && (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLI2S)) ||
- 800951c: 687b ldr r3, [r7, #4]
- 800951e: 681b ldr r3, [r3, #0]
- 8009520: f403 2300 and.w r3, r3, #524288 ; 0x80000
- 8009524: 2b00 cmp r3, #0
- 8009526: d004 beq.n 8009532 <HAL_RCCEx_PeriphCLKConfig+0x586>
- 8009528: 687b ldr r3, [r7, #4]
- 800952a: 6bdb ldr r3, [r3, #60] ; 0x3c
- 800952c: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000
- 8009530: d00a beq.n 8009548 <HAL_RCCEx_PeriphCLKConfig+0x59c>
- ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLI2S)))
- 8009532: 687b ldr r3, [r7, #4]
- 8009534: 681b ldr r3, [r3, #0]
- 8009536: f403 1380 and.w r3, r3, #1048576 ; 0x100000
- if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) && (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLI2S)) ||
- 800953a: 2b00 cmp r3, #0
- 800953c: d02e beq.n 800959c <HAL_RCCEx_PeriphCLKConfig+0x5f0>
- ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLI2S)))
- 800953e: 687b ldr r3, [r7, #4]
- 8009540: 6c1b ldr r3, [r3, #64] ; 0x40
- 8009542: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000
- 8009546: d129 bne.n 800959c <HAL_RCCEx_PeriphCLKConfig+0x5f0>
- assert_param(IS_RCC_PLLI2SQ_VALUE(PeriphClkInit->PLLI2S.PLLI2SQ));
- /* Check for PLLI2S/DIVQ parameters */
- assert_param(IS_RCC_PLLI2S_DIVQ_VALUE(PeriphClkInit->PLLI2SDivQ));
-
- /* Read PLLI2SP and PLLI2SR values from PLLI2SCFGR register (this value is not needed for SAI configuration) */
- tmpreg0 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SP) >> RCC_PLLI2SCFGR_PLLI2SP_Pos);
- 8009548: 4b4a ldr r3, [pc, #296] ; (8009674 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 800954a: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84
- 800954e: 0c1b lsrs r3, r3, #16
- 8009550: f003 0303 and.w r3, r3, #3
- 8009554: 613b str r3, [r7, #16]
- tmpreg1 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos);
- 8009556: 4b47 ldr r3, [pc, #284] ; (8009674 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8009558: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84
- 800955c: 0f1b lsrs r3, r3, #28
- 800955e: f003 0307 and.w r3, r3, #7
- 8009562: 60fb str r3, [r7, #12]
- /* Configure the PLLI2S division factors */
- /* PLLI2S_VCO Input = PLL_SOURCE/PLLM */
- /* PLLI2S_VCO Output = PLLI2S_VCO Input * PLLI2SN */
- /* SAI_CLK(first level) = PLLI2S_VCO Output/PLLI2SQ */
- __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN, tmpreg0, PeriphClkInit->PLLI2S.PLLI2SQ, tmpreg1);
- 8009564: 687b ldr r3, [r7, #4]
- 8009566: 685b ldr r3, [r3, #4]
- 8009568: 019a lsls r2, r3, #6
- 800956a: 693b ldr r3, [r7, #16]
- 800956c: 041b lsls r3, r3, #16
- 800956e: 431a orrs r2, r3
- 8009570: 687b ldr r3, [r7, #4]
- 8009572: 68db ldr r3, [r3, #12]
- 8009574: 061b lsls r3, r3, #24
- 8009576: 431a orrs r2, r3
- 8009578: 68fb ldr r3, [r7, #12]
- 800957a: 071b lsls r3, r3, #28
- 800957c: 493d ldr r1, [pc, #244] ; (8009674 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 800957e: 4313 orrs r3, r2
- 8009580: f8c1 3084 str.w r3, [r1, #132] ; 0x84
-
- /* SAI_CLK_x = SAI_CLK(first level)/PLLI2SDIVQ */
- __HAL_RCC_PLLI2S_PLLSAICLKDIVQ_CONFIG(PeriphClkInit->PLLI2SDivQ);
- 8009584: 4b3b ldr r3, [pc, #236] ; (8009674 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8009586: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c
- 800958a: f023 021f bic.w r2, r3, #31
- 800958e: 687b ldr r3, [r7, #4]
- 8009590: 6a5b ldr r3, [r3, #36] ; 0x24
- 8009592: 3b01 subs r3, #1
- 8009594: 4937 ldr r1, [pc, #220] ; (8009674 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8009596: 4313 orrs r3, r2
- 8009598: f8c1 308c str.w r3, [r1, #140] ; 0x8c
- }
-
- /*----------------- In Case of PLLI2S is selected as source clock for SPDIF-RX -------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPDIFRX) == RCC_PERIPHCLK_SPDIFRX)
- 800959c: 687b ldr r3, [r7, #4]
- 800959e: 681b ldr r3, [r3, #0]
- 80095a0: f003 7380 and.w r3, r3, #16777216 ; 0x1000000
- 80095a4: 2b00 cmp r3, #0
- 80095a6: d01d beq.n 80095e4 <HAL_RCCEx_PeriphCLKConfig+0x638>
- {
- /* check for Parameters */
- assert_param(IS_RCC_PLLI2SP_VALUE(PeriphClkInit->PLLI2S.PLLI2SP));
-
- /* Read PLLI2SR value from PLLI2SCFGR register (this value is not needed for SPDIF-RX configuration) */
- tmpreg0 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SQ) >> RCC_PLLI2SCFGR_PLLI2SQ_Pos);
- 80095a8: 4b32 ldr r3, [pc, #200] ; (8009674 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 80095aa: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84
- 80095ae: 0e1b lsrs r3, r3, #24
- 80095b0: f003 030f and.w r3, r3, #15
- 80095b4: 613b str r3, [r7, #16]
- tmpreg1 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos);
- 80095b6: 4b2f ldr r3, [pc, #188] ; (8009674 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 80095b8: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84
- 80095bc: 0f1b lsrs r3, r3, #28
- 80095be: f003 0307 and.w r3, r3, #7
- 80095c2: 60fb str r3, [r7, #12]
- /* Configure the PLLI2S division factors */
- /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) x (PLLI2SN/PLLM) */
- /* SPDIFCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SP */
- __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN , PeriphClkInit->PLLI2S.PLLI2SP, tmpreg0, tmpreg1);
- 80095c4: 687b ldr r3, [r7, #4]
- 80095c6: 685b ldr r3, [r3, #4]
- 80095c8: 019a lsls r2, r3, #6
- 80095ca: 687b ldr r3, [r7, #4]
- 80095cc: 691b ldr r3, [r3, #16]
- 80095ce: 041b lsls r3, r3, #16
- 80095d0: 431a orrs r2, r3
- 80095d2: 693b ldr r3, [r7, #16]
- 80095d4: 061b lsls r3, r3, #24
- 80095d6: 431a orrs r2, r3
- 80095d8: 68fb ldr r3, [r7, #12]
- 80095da: 071b lsls r3, r3, #28
- 80095dc: 4925 ldr r1, [pc, #148] ; (8009674 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 80095de: 4313 orrs r3, r2
- 80095e0: f8c1 3084 str.w r3, [r1, #132] ; 0x84
- }
-
- /*----------------- In Case of PLLI2S is just selected -----------------*/
- if((PeriphClkInit->PeriphClockSelection & RCC_PERIPHCLK_PLLI2S) == RCC_PERIPHCLK_PLLI2S)
- 80095e4: 687b ldr r3, [r7, #4]
- 80095e6: 681b ldr r3, [r3, #0]
- 80095e8: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
- 80095ec: 2b00 cmp r3, #0
- 80095ee: d011 beq.n 8009614 <HAL_RCCEx_PeriphCLKConfig+0x668>
- assert_param(IS_RCC_PLLI2SQ_VALUE(PeriphClkInit->PLLI2S.PLLI2SQ));
-
- /* Configure the PLLI2S division factors */
- /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) x (PLLI2SN/PLLI2SM) */
- /* SPDIFRXCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SP */
- __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN , PeriphClkInit->PLLI2S.PLLI2SP, PeriphClkInit->PLLI2S.PLLI2SQ, PeriphClkInit->PLLI2S.PLLI2SR);
- 80095f0: 687b ldr r3, [r7, #4]
- 80095f2: 685b ldr r3, [r3, #4]
- 80095f4: 019a lsls r2, r3, #6
- 80095f6: 687b ldr r3, [r7, #4]
- 80095f8: 691b ldr r3, [r3, #16]
- 80095fa: 041b lsls r3, r3, #16
- 80095fc: 431a orrs r2, r3
- 80095fe: 687b ldr r3, [r7, #4]
- 8009600: 68db ldr r3, [r3, #12]
- 8009602: 061b lsls r3, r3, #24
- 8009604: 431a orrs r2, r3
- 8009606: 687b ldr r3, [r7, #4]
- 8009608: 689b ldr r3, [r3, #8]
- 800960a: 071b lsls r3, r3, #28
- 800960c: 4919 ldr r1, [pc, #100] ; (8009674 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 800960e: 4313 orrs r3, r2
- 8009610: f8c1 3084 str.w r3, [r1, #132] ; 0x84
- }
-
- /* Enable the PLLI2S */
- __HAL_RCC_PLLI2S_ENABLE();
- 8009614: 4b17 ldr r3, [pc, #92] ; (8009674 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8009616: 681b ldr r3, [r3, #0]
- 8009618: 4a16 ldr r2, [pc, #88] ; (8009674 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 800961a: f043 6380 orr.w r3, r3, #67108864 ; 0x4000000
- 800961e: 6013 str r3, [r2, #0]
-
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 8009620: f7fe fd38 bl 8008094 <HAL_GetTick>
- 8009624: 6178 str r0, [r7, #20]
-
- /* Wait till PLLI2S is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) == RESET)
- 8009626: e008 b.n 800963a <HAL_RCCEx_PeriphCLKConfig+0x68e>
- {
- if((HAL_GetTick() - tickstart) > PLLI2S_TIMEOUT_VALUE)
- 8009628: f7fe fd34 bl 8008094 <HAL_GetTick>
- 800962c: 4602 mov r2, r0
- 800962e: 697b ldr r3, [r7, #20]
- 8009630: 1ad3 subs r3, r2, r3
- 8009632: 2b64 cmp r3, #100 ; 0x64
- 8009634: d901 bls.n 800963a <HAL_RCCEx_PeriphCLKConfig+0x68e>
- {
- /* return in case of Timeout detected */
- return HAL_TIMEOUT;
- 8009636: 2303 movs r3, #3
- 8009638: e0d7 b.n 80097ea <HAL_RCCEx_PeriphCLKConfig+0x83e>
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) == RESET)
- 800963a: 4b0e ldr r3, [pc, #56] ; (8009674 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 800963c: 681b ldr r3, [r3, #0]
- 800963e: f003 6300 and.w r3, r3, #134217728 ; 0x8000000
- 8009642: 2b00 cmp r3, #0
- 8009644: d0f0 beq.n 8009628 <HAL_RCCEx_PeriphCLKConfig+0x67c>
- }
- }
-
- /*-------------------------------------- PLLSAI Configuration ---------------------------------*/
- /* PLLSAI is configured when a peripheral will use it as source clock : SAI1, SAI2, LTDC or CK48 */
- if(pllsaiused == 1)
- 8009646: 69bb ldr r3, [r7, #24]
- 8009648: 2b01 cmp r3, #1
- 800964a: f040 80cd bne.w 80097e8 <HAL_RCCEx_PeriphCLKConfig+0x83c>
- {
- /* Disable PLLSAI Clock */
- __HAL_RCC_PLLSAI_DISABLE();
- 800964e: 4b09 ldr r3, [pc, #36] ; (8009674 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8009650: 681b ldr r3, [r3, #0]
- 8009652: 4a08 ldr r2, [pc, #32] ; (8009674 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8009654: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000
- 8009658: 6013 str r3, [r2, #0]
-
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 800965a: f7fe fd1b bl 8008094 <HAL_GetTick>
- 800965e: 6178 str r0, [r7, #20]
-
- /* Wait till PLLSAI is disabled */
- while(__HAL_RCC_PLLSAI_GET_FLAG() != RESET)
- 8009660: e00a b.n 8009678 <HAL_RCCEx_PeriphCLKConfig+0x6cc>
- {
- if((HAL_GetTick() - tickstart) > PLLSAI_TIMEOUT_VALUE)
- 8009662: f7fe fd17 bl 8008094 <HAL_GetTick>
- 8009666: 4602 mov r2, r0
- 8009668: 697b ldr r3, [r7, #20]
- 800966a: 1ad3 subs r3, r2, r3
- 800966c: 2b64 cmp r3, #100 ; 0x64
- 800966e: d903 bls.n 8009678 <HAL_RCCEx_PeriphCLKConfig+0x6cc>
- {
- /* return in case of Timeout detected */
- return HAL_TIMEOUT;
- 8009670: 2303 movs r3, #3
- 8009672: e0ba b.n 80097ea <HAL_RCCEx_PeriphCLKConfig+0x83e>
- 8009674: 40023800 .word 0x40023800
- while(__HAL_RCC_PLLSAI_GET_FLAG() != RESET)
- 8009678: 4b5e ldr r3, [pc, #376] ; (80097f4 <HAL_RCCEx_PeriphCLKConfig+0x848>)
- 800967a: 681b ldr r3, [r3, #0]
- 800967c: f003 5300 and.w r3, r3, #536870912 ; 0x20000000
- 8009680: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000
- 8009684: d0ed beq.n 8009662 <HAL_RCCEx_PeriphCLKConfig+0x6b6>
-
- /* Check the PLLSAI division factors */
- assert_param(IS_RCC_PLLSAIN_VALUE(PeriphClkInit->PLLSAI.PLLSAIN));
-
- /*----------------- In Case of PLLSAI is selected as source clock for SAI -------------------*/
- if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) && (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLSAI)) ||\
- 8009686: 687b ldr r3, [r7, #4]
- 8009688: 681b ldr r3, [r3, #0]
- 800968a: f403 2300 and.w r3, r3, #524288 ; 0x80000
- 800968e: 2b00 cmp r3, #0
- 8009690: d003 beq.n 800969a <HAL_RCCEx_PeriphCLKConfig+0x6ee>
- 8009692: 687b ldr r3, [r7, #4]
- 8009694: 6bdb ldr r3, [r3, #60] ; 0x3c
- 8009696: 2b00 cmp r3, #0
- 8009698: d009 beq.n 80096ae <HAL_RCCEx_PeriphCLKConfig+0x702>
- ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLSAI)))
- 800969a: 687b ldr r3, [r7, #4]
- 800969c: 681b ldr r3, [r3, #0]
- 800969e: f403 1380 and.w r3, r3, #1048576 ; 0x100000
- if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) && (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLSAI)) ||\
- 80096a2: 2b00 cmp r3, #0
- 80096a4: d02e beq.n 8009704 <HAL_RCCEx_PeriphCLKConfig+0x758>
- ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLSAI)))
- 80096a6: 687b ldr r3, [r7, #4]
- 80096a8: 6c1b ldr r3, [r3, #64] ; 0x40
- 80096aa: 2b00 cmp r3, #0
- 80096ac: d12a bne.n 8009704 <HAL_RCCEx_PeriphCLKConfig+0x758>
- assert_param(IS_RCC_PLLSAIQ_VALUE(PeriphClkInit->PLLSAI.PLLSAIQ));
- /* check for PLLSAI/DIVQ Parameter */
- assert_param(IS_RCC_PLLSAI_DIVQ_VALUE(PeriphClkInit->PLLSAIDivQ));
-
- /* Read PLLSAIP value from PLLSAICFGR register (this value is not needed for SAI configuration) */
- tmpreg0 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIP) >> RCC_PLLSAICFGR_PLLSAIP_Pos);
- 80096ae: 4b51 ldr r3, [pc, #324] ; (80097f4 <HAL_RCCEx_PeriphCLKConfig+0x848>)
- 80096b0: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88
- 80096b4: 0c1b lsrs r3, r3, #16
- 80096b6: f003 0303 and.w r3, r3, #3
- 80096ba: 613b str r3, [r7, #16]
- tmpreg1 = ((RCC->PLLSAICFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLSAICFGR_PLLSAIR_Pos);
- 80096bc: 4b4d ldr r3, [pc, #308] ; (80097f4 <HAL_RCCEx_PeriphCLKConfig+0x848>)
- 80096be: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88
- 80096c2: 0f1b lsrs r3, r3, #28
- 80096c4: f003 0307 and.w r3, r3, #7
- 80096c8: 60fb str r3, [r7, #12]
- /* PLLSAI_VCO Input = PLL_SOURCE/PLLM */
- /* PLLSAI_VCO Output = PLLSAI_VCO Input * PLLSAIN */
- /* SAI_CLK(first level) = PLLSAI_VCO Output/PLLSAIQ */
- __HAL_RCC_PLLSAI_CONFIG(PeriphClkInit->PLLSAI.PLLSAIN , tmpreg0, PeriphClkInit->PLLSAI.PLLSAIQ, tmpreg1);
- 80096ca: 687b ldr r3, [r7, #4]
- 80096cc: 695b ldr r3, [r3, #20]
- 80096ce: 019a lsls r2, r3, #6
- 80096d0: 693b ldr r3, [r7, #16]
- 80096d2: 041b lsls r3, r3, #16
- 80096d4: 431a orrs r2, r3
- 80096d6: 687b ldr r3, [r7, #4]
- 80096d8: 699b ldr r3, [r3, #24]
- 80096da: 061b lsls r3, r3, #24
- 80096dc: 431a orrs r2, r3
- 80096de: 68fb ldr r3, [r7, #12]
- 80096e0: 071b lsls r3, r3, #28
- 80096e2: 4944 ldr r1, [pc, #272] ; (80097f4 <HAL_RCCEx_PeriphCLKConfig+0x848>)
- 80096e4: 4313 orrs r3, r2
- 80096e6: f8c1 3088 str.w r3, [r1, #136] ; 0x88
-
- /* SAI_CLK_x = SAI_CLK(first level)/PLLSAIDIVQ */
- __HAL_RCC_PLLSAI_PLLSAICLKDIVQ_CONFIG(PeriphClkInit->PLLSAIDivQ);
- 80096ea: 4b42 ldr r3, [pc, #264] ; (80097f4 <HAL_RCCEx_PeriphCLKConfig+0x848>)
- 80096ec: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c
- 80096f0: f423 52f8 bic.w r2, r3, #7936 ; 0x1f00
- 80096f4: 687b ldr r3, [r7, #4]
- 80096f6: 6a9b ldr r3, [r3, #40] ; 0x28
- 80096f8: 3b01 subs r3, #1
- 80096fa: 021b lsls r3, r3, #8
- 80096fc: 493d ldr r1, [pc, #244] ; (80097f4 <HAL_RCCEx_PeriphCLKConfig+0x848>)
- 80096fe: 4313 orrs r3, r2
- 8009700: f8c1 308c str.w r3, [r1, #140] ; 0x8c
- }
-
- /*----------------- In Case of PLLSAI is selected as source clock for CLK48 -------------------*/
- /* In Case of PLLI2S is selected as source clock for CK48 */
- if((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CLK48) == RCC_PERIPHCLK_CLK48) && (PeriphClkInit->Clk48ClockSelection == RCC_CLK48SOURCE_PLLSAIP))
- 8009704: 687b ldr r3, [r7, #4]
- 8009706: 681b ldr r3, [r3, #0]
- 8009708: f403 1300 and.w r3, r3, #2097152 ; 0x200000
- 800970c: 2b00 cmp r3, #0
- 800970e: d022 beq.n 8009756 <HAL_RCCEx_PeriphCLKConfig+0x7aa>
- 8009710: 687b ldr r3, [r7, #4]
- 8009712: 6fdb ldr r3, [r3, #124] ; 0x7c
- 8009714: f1b3 6f00 cmp.w r3, #134217728 ; 0x8000000
- 8009718: d11d bne.n 8009756 <HAL_RCCEx_PeriphCLKConfig+0x7aa>
- {
- /* check for Parameters */
- assert_param(IS_RCC_PLLSAIP_VALUE(PeriphClkInit->PLLSAI.PLLSAIP));
- /* Read PLLSAIQ and PLLSAIR value from PLLSAICFGR register (this value is not needed for CK48 configuration) */
- tmpreg0 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIQ) >> RCC_PLLSAICFGR_PLLSAIQ_Pos);
- 800971a: 4b36 ldr r3, [pc, #216] ; (80097f4 <HAL_RCCEx_PeriphCLKConfig+0x848>)
- 800971c: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88
- 8009720: 0e1b lsrs r3, r3, #24
- 8009722: f003 030f and.w r3, r3, #15
- 8009726: 613b str r3, [r7, #16]
- tmpreg1 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIR) >> RCC_PLLSAICFGR_PLLSAIR_Pos);
- 8009728: 4b32 ldr r3, [pc, #200] ; (80097f4 <HAL_RCCEx_PeriphCLKConfig+0x848>)
- 800972a: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88
- 800972e: 0f1b lsrs r3, r3, #28
- 8009730: f003 0307 and.w r3, r3, #7
- 8009734: 60fb str r3, [r7, #12]
-
- /* Configure the PLLSAI division factors */
- /* PLLSAI_VCO = f(VCO clock) = f(PLLSAI clock input) x (PLLI2SN/PLLM) */
- /* 48CLK = f(PLLSAI clock output) = f(VCO clock) / PLLSAIP */
- __HAL_RCC_PLLSAI_CONFIG(PeriphClkInit->PLLSAI.PLLSAIN , PeriphClkInit->PLLSAI.PLLSAIP, tmpreg0, tmpreg1);
- 8009736: 687b ldr r3, [r7, #4]
- 8009738: 695b ldr r3, [r3, #20]
- 800973a: 019a lsls r2, r3, #6
- 800973c: 687b ldr r3, [r7, #4]
- 800973e: 6a1b ldr r3, [r3, #32]
- 8009740: 041b lsls r3, r3, #16
- 8009742: 431a orrs r2, r3
- 8009744: 693b ldr r3, [r7, #16]
- 8009746: 061b lsls r3, r3, #24
- 8009748: 431a orrs r2, r3
- 800974a: 68fb ldr r3, [r7, #12]
- 800974c: 071b lsls r3, r3, #28
- 800974e: 4929 ldr r1, [pc, #164] ; (80097f4 <HAL_RCCEx_PeriphCLKConfig+0x848>)
- 8009750: 4313 orrs r3, r2
- 8009752: f8c1 3088 str.w r3, [r1, #136] ; 0x88
- }
-
-#if defined(STM32F746xx) || defined(STM32F756xx) || defined (STM32F767xx) || defined (STM32F769xx) || defined (STM32F777xx) || defined (STM32F779xx) || defined (STM32F750xx)
- /*---------------------------- LTDC configuration -------------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LTDC) == (RCC_PERIPHCLK_LTDC))
- 8009756: 687b ldr r3, [r7, #4]
- 8009758: 681b ldr r3, [r3, #0]
- 800975a: f003 0308 and.w r3, r3, #8
- 800975e: 2b00 cmp r3, #0
- 8009760: d028 beq.n 80097b4 <HAL_RCCEx_PeriphCLKConfig+0x808>
- {
- assert_param(IS_RCC_PLLSAIR_VALUE(PeriphClkInit->PLLSAI.PLLSAIR));
- assert_param(IS_RCC_PLLSAI_DIVR_VALUE(PeriphClkInit->PLLSAIDivR));
-
- /* Read PLLSAIP and PLLSAIQ value from PLLSAICFGR register (these value are not needed for LTDC configuration) */
- tmpreg0 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIQ) >> RCC_PLLSAICFGR_PLLSAIQ_Pos);
- 8009762: 4b24 ldr r3, [pc, #144] ; (80097f4 <HAL_RCCEx_PeriphCLKConfig+0x848>)
- 8009764: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88
- 8009768: 0e1b lsrs r3, r3, #24
- 800976a: f003 030f and.w r3, r3, #15
- 800976e: 613b str r3, [r7, #16]
- tmpreg1 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIP) >> RCC_PLLSAICFGR_PLLSAIP_Pos);
- 8009770: 4b20 ldr r3, [pc, #128] ; (80097f4 <HAL_RCCEx_PeriphCLKConfig+0x848>)
- 8009772: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88
- 8009776: 0c1b lsrs r3, r3, #16
- 8009778: f003 0303 and.w r3, r3, #3
- 800977c: 60fb str r3, [r7, #12]
-
- /* PLLSAI_VCO Input = PLL_SOURCE/PLLM */
- /* PLLSAI_VCO Output = PLLSAI_VCO Input * PLLSAIN */
- /* LTDC_CLK(first level) = PLLSAI_VCO Output/PLLSAIR */
- __HAL_RCC_PLLSAI_CONFIG(PeriphClkInit->PLLSAI.PLLSAIN , tmpreg1, tmpreg0, PeriphClkInit->PLLSAI.PLLSAIR);
- 800977e: 687b ldr r3, [r7, #4]
- 8009780: 695b ldr r3, [r3, #20]
- 8009782: 019a lsls r2, r3, #6
- 8009784: 68fb ldr r3, [r7, #12]
- 8009786: 041b lsls r3, r3, #16
- 8009788: 431a orrs r2, r3
- 800978a: 693b ldr r3, [r7, #16]
- 800978c: 061b lsls r3, r3, #24
- 800978e: 431a orrs r2, r3
- 8009790: 687b ldr r3, [r7, #4]
- 8009792: 69db ldr r3, [r3, #28]
- 8009794: 071b lsls r3, r3, #28
- 8009796: 4917 ldr r1, [pc, #92] ; (80097f4 <HAL_RCCEx_PeriphCLKConfig+0x848>)
- 8009798: 4313 orrs r3, r2
- 800979a: f8c1 3088 str.w r3, [r1, #136] ; 0x88
-
- /* LTDC_CLK = LTDC_CLK(first level)/PLLSAIDIVR */
- __HAL_RCC_PLLSAI_PLLSAICLKDIVR_CONFIG(PeriphClkInit->PLLSAIDivR);
- 800979e: 4b15 ldr r3, [pc, #84] ; (80097f4 <HAL_RCCEx_PeriphCLKConfig+0x848>)
- 80097a0: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c
- 80097a4: f423 3240 bic.w r2, r3, #196608 ; 0x30000
- 80097a8: 687b ldr r3, [r7, #4]
- 80097aa: 6adb ldr r3, [r3, #44] ; 0x2c
- 80097ac: 4911 ldr r1, [pc, #68] ; (80097f4 <HAL_RCCEx_PeriphCLKConfig+0x848>)
- 80097ae: 4313 orrs r3, r2
- 80097b0: f8c1 308c str.w r3, [r1, #140] ; 0x8c
- }
-#endif /* STM32F746xx || STM32F756xx || STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx || STM32F750xx */
-
- /* Enable PLLSAI Clock */
- __HAL_RCC_PLLSAI_ENABLE();
- 80097b4: 4b0f ldr r3, [pc, #60] ; (80097f4 <HAL_RCCEx_PeriphCLKConfig+0x848>)
- 80097b6: 681b ldr r3, [r3, #0]
- 80097b8: 4a0e ldr r2, [pc, #56] ; (80097f4 <HAL_RCCEx_PeriphCLKConfig+0x848>)
- 80097ba: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
- 80097be: 6013 str r3, [r2, #0]
-
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 80097c0: f7fe fc68 bl 8008094 <HAL_GetTick>
- 80097c4: 6178 str r0, [r7, #20]
-
- /* Wait till PLLSAI is ready */
- while(__HAL_RCC_PLLSAI_GET_FLAG() == RESET)
- 80097c6: e008 b.n 80097da <HAL_RCCEx_PeriphCLKConfig+0x82e>
- {
- if((HAL_GetTick() - tickstart) > PLLSAI_TIMEOUT_VALUE)
- 80097c8: f7fe fc64 bl 8008094 <HAL_GetTick>
- 80097cc: 4602 mov r2, r0
- 80097ce: 697b ldr r3, [r7, #20]
- 80097d0: 1ad3 subs r3, r2, r3
- 80097d2: 2b64 cmp r3, #100 ; 0x64
- 80097d4: d901 bls.n 80097da <HAL_RCCEx_PeriphCLKConfig+0x82e>
- {
- /* return in case of Timeout detected */
- return HAL_TIMEOUT;
- 80097d6: 2303 movs r3, #3
- 80097d8: e007 b.n 80097ea <HAL_RCCEx_PeriphCLKConfig+0x83e>
- while(__HAL_RCC_PLLSAI_GET_FLAG() == RESET)
- 80097da: 4b06 ldr r3, [pc, #24] ; (80097f4 <HAL_RCCEx_PeriphCLKConfig+0x848>)
- 80097dc: 681b ldr r3, [r3, #0]
- 80097de: f003 5300 and.w r3, r3, #536870912 ; 0x20000000
- 80097e2: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000
- 80097e6: d1ef bne.n 80097c8 <HAL_RCCEx_PeriphCLKConfig+0x81c>
- }
- }
- }
- return HAL_OK;
- 80097e8: 2300 movs r3, #0
-}
- 80097ea: 4618 mov r0, r3
- 80097ec: 3720 adds r7, #32
- 80097ee: 46bd mov sp, r7
- 80097f0: bd80 pop {r7, pc}
- 80097f2: bf00 nop
- 80097f4: 40023800 .word 0x40023800
-
-080097f8 <HAL_TIM_Base_Start>:
- * @brief Starts the TIM Base generation.
- * @param htim TIM Base handle
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_Base_Start(TIM_HandleTypeDef *htim)
-{
- 80097f8: b480 push {r7}
- 80097fa: b085 sub sp, #20
- 80097fc: af00 add r7, sp, #0
- 80097fe: 6078 str r0, [r7, #4]
-
- /* Check the parameters */
- assert_param(IS_TIM_INSTANCE(htim->Instance));
-
- /* Set the TIM state */
- htim->State = HAL_TIM_STATE_BUSY;
- 8009800: 687b ldr r3, [r7, #4]
- 8009802: 2202 movs r2, #2
- 8009804: f883 203d strb.w r2, [r3, #61] ; 0x3d
-
- /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
- tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
- 8009808: 687b ldr r3, [r7, #4]
- 800980a: 681b ldr r3, [r3, #0]
- 800980c: 689a ldr r2, [r3, #8]
- 800980e: 4b0e ldr r3, [pc, #56] ; (8009848 <HAL_TIM_Base_Start+0x50>)
- 8009810: 4013 ands r3, r2
- 8009812: 60fb str r3, [r7, #12]
- if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
- 8009814: 68fb ldr r3, [r7, #12]
- 8009816: 2b06 cmp r3, #6
- 8009818: d00b beq.n 8009832 <HAL_TIM_Base_Start+0x3a>
- 800981a: 68fb ldr r3, [r7, #12]
- 800981c: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
- 8009820: d007 beq.n 8009832 <HAL_TIM_Base_Start+0x3a>
- {
- __HAL_TIM_ENABLE(htim);
- 8009822: 687b ldr r3, [r7, #4]
- 8009824: 681b ldr r3, [r3, #0]
- 8009826: 681a ldr r2, [r3, #0]
- 8009828: 687b ldr r3, [r7, #4]
- 800982a: 681b ldr r3, [r3, #0]
- 800982c: f042 0201 orr.w r2, r2, #1
- 8009830: 601a str r2, [r3, #0]
- }
-
- /* Change the TIM state*/
- htim->State = HAL_TIM_STATE_READY;
- 8009832: 687b ldr r3, [r7, #4]
- 8009834: 2201 movs r2, #1
- 8009836: f883 203d strb.w r2, [r3, #61] ; 0x3d
-
- /* Return function status */
- return HAL_OK;
- 800983a: 2300 movs r3, #0
-}
- 800983c: 4618 mov r0, r3
- 800983e: 3714 adds r7, #20
- 8009840: 46bd mov sp, r7
- 8009842: f85d 7b04 ldr.w r7, [sp], #4
- 8009846: 4770 bx lr
- 8009848: 00010007 .word 0x00010007
-
-0800984c <HAL_TIM_OnePulse_Init>:
- * @arg TIM_OPMODE_SINGLE: Only one pulse will be generated.
- * @arg TIM_OPMODE_REPETITIVE: Repetitive pulses will be generated.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_OnePulse_Init(TIM_HandleTypeDef *htim, uint32_t OnePulseMode)
-{
- 800984c: b580 push {r7, lr}
- 800984e: b082 sub sp, #8
- 8009850: af00 add r7, sp, #0
- 8009852: 6078 str r0, [r7, #4]
- 8009854: 6039 str r1, [r7, #0]
- /* Check the TIM handle allocation */
- if (htim == NULL)
- 8009856: 687b ldr r3, [r7, #4]
- 8009858: 2b00 cmp r3, #0
- 800985a: d101 bne.n 8009860 <HAL_TIM_OnePulse_Init+0x14>
- {
- return HAL_ERROR;
- 800985c: 2301 movs r3, #1
- 800985e: e02d b.n 80098bc <HAL_TIM_OnePulse_Init+0x70>
- assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
- assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
- assert_param(IS_TIM_OPM_MODE(OnePulseMode));
- assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
-
- if (htim->State == HAL_TIM_STATE_RESET)
- 8009860: 687b ldr r3, [r7, #4]
- 8009862: f893 303d ldrb.w r3, [r3, #61] ; 0x3d
- 8009866: b2db uxtb r3, r3
- 8009868: 2b00 cmp r3, #0
- 800986a: d106 bne.n 800987a <HAL_TIM_OnePulse_Init+0x2e>
- {
- /* Allocate lock resource and initialize it */
- htim->Lock = HAL_UNLOCKED;
- 800986c: 687b ldr r3, [r7, #4]
- 800986e: 2200 movs r2, #0
- 8009870: f883 203c strb.w r2, [r3, #60] ; 0x3c
- }
- /* Init the low level hardware : GPIO, CLOCK, NVIC */
- htim->OnePulse_MspInitCallback(htim);
-#else
- /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
- HAL_TIM_OnePulse_MspInit(htim);
- 8009874: 6878 ldr r0, [r7, #4]
- 8009876: f002 fea1 bl 800c5bc <HAL_TIM_OnePulse_MspInit>
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
- }
-
- /* Set the TIM state */
- htim->State = HAL_TIM_STATE_BUSY;
- 800987a: 687b ldr r3, [r7, #4]
- 800987c: 2202 movs r2, #2
- 800987e: f883 203d strb.w r2, [r3, #61] ; 0x3d
-
- /* Configure the Time base in the One Pulse Mode */
- TIM_Base_SetConfig(htim->Instance, &htim->Init);
- 8009882: 687b ldr r3, [r7, #4]
- 8009884: 681a ldr r2, [r3, #0]
- 8009886: 687b ldr r3, [r7, #4]
- 8009888: 3304 adds r3, #4
- 800988a: 4619 mov r1, r3
- 800988c: 4610 mov r0, r2
- 800988e: f000 f819 bl 80098c4 <TIM_Base_SetConfig>
-
- /* Reset the OPM Bit */
- htim->Instance->CR1 &= ~TIM_CR1_OPM;
- 8009892: 687b ldr r3, [r7, #4]
- 8009894: 681b ldr r3, [r3, #0]
- 8009896: 681a ldr r2, [r3, #0]
- 8009898: 687b ldr r3, [r7, #4]
- 800989a: 681b ldr r3, [r3, #0]
- 800989c: f022 0208 bic.w r2, r2, #8
- 80098a0: 601a str r2, [r3, #0]
-
- /* Configure the OPM Mode */
- htim->Instance->CR1 |= OnePulseMode;
- 80098a2: 687b ldr r3, [r7, #4]
- 80098a4: 681b ldr r3, [r3, #0]
- 80098a6: 6819 ldr r1, [r3, #0]
- 80098a8: 687b ldr r3, [r7, #4]
- 80098aa: 681b ldr r3, [r3, #0]
- 80098ac: 683a ldr r2, [r7, #0]
- 80098ae: 430a orrs r2, r1
- 80098b0: 601a str r2, [r3, #0]
-
- /* Initialize the TIM state*/
- htim->State = HAL_TIM_STATE_READY;
- 80098b2: 687b ldr r3, [r7, #4]
- 80098b4: 2201 movs r2, #1
- 80098b6: f883 203d strb.w r2, [r3, #61] ; 0x3d
-
- return HAL_OK;
- 80098ba: 2300 movs r3, #0
-}
- 80098bc: 4618 mov r0, r3
- 80098be: 3708 adds r7, #8
- 80098c0: 46bd mov sp, r7
- 80098c2: bd80 pop {r7, pc}
-
-080098c4 <TIM_Base_SetConfig>:
- * @param TIMx TIM peripheral
- * @param Structure TIM Base configuration structure
- * @retval None
- */
-void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure)
-{
- 80098c4: b480 push {r7}
- 80098c6: b085 sub sp, #20
- 80098c8: af00 add r7, sp, #0
- 80098ca: 6078 str r0, [r7, #4]
- 80098cc: 6039 str r1, [r7, #0]
- uint32_t tmpcr1;
- tmpcr1 = TIMx->CR1;
- 80098ce: 687b ldr r3, [r7, #4]
- 80098d0: 681b ldr r3, [r3, #0]
- 80098d2: 60fb str r3, [r7, #12]
-
- /* Set TIM Time Base Unit parameters ---------------------------------------*/
- if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
- 80098d4: 687b ldr r3, [r7, #4]
- 80098d6: 4a40 ldr r2, [pc, #256] ; (80099d8 <TIM_Base_SetConfig+0x114>)
- 80098d8: 4293 cmp r3, r2
- 80098da: d013 beq.n 8009904 <TIM_Base_SetConfig+0x40>
- 80098dc: 687b ldr r3, [r7, #4]
- 80098de: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000
- 80098e2: d00f beq.n 8009904 <TIM_Base_SetConfig+0x40>
- 80098e4: 687b ldr r3, [r7, #4]
- 80098e6: 4a3d ldr r2, [pc, #244] ; (80099dc <TIM_Base_SetConfig+0x118>)
- 80098e8: 4293 cmp r3, r2
- 80098ea: d00b beq.n 8009904 <TIM_Base_SetConfig+0x40>
- 80098ec: 687b ldr r3, [r7, #4]
- 80098ee: 4a3c ldr r2, [pc, #240] ; (80099e0 <TIM_Base_SetConfig+0x11c>)
- 80098f0: 4293 cmp r3, r2
- 80098f2: d007 beq.n 8009904 <TIM_Base_SetConfig+0x40>
- 80098f4: 687b ldr r3, [r7, #4]
- 80098f6: 4a3b ldr r2, [pc, #236] ; (80099e4 <TIM_Base_SetConfig+0x120>)
- 80098f8: 4293 cmp r3, r2
- 80098fa: d003 beq.n 8009904 <TIM_Base_SetConfig+0x40>
- 80098fc: 687b ldr r3, [r7, #4]
- 80098fe: 4a3a ldr r2, [pc, #232] ; (80099e8 <TIM_Base_SetConfig+0x124>)
- 8009900: 4293 cmp r3, r2
- 8009902: d108 bne.n 8009916 <TIM_Base_SetConfig+0x52>
- {
- /* Select the Counter Mode */
- tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
- 8009904: 68fb ldr r3, [r7, #12]
- 8009906: f023 0370 bic.w r3, r3, #112 ; 0x70
- 800990a: 60fb str r3, [r7, #12]
- tmpcr1 |= Structure->CounterMode;
- 800990c: 683b ldr r3, [r7, #0]
- 800990e: 685b ldr r3, [r3, #4]
- 8009910: 68fa ldr r2, [r7, #12]
- 8009912: 4313 orrs r3, r2
- 8009914: 60fb str r3, [r7, #12]
- }
-
- if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
- 8009916: 687b ldr r3, [r7, #4]
- 8009918: 4a2f ldr r2, [pc, #188] ; (80099d8 <TIM_Base_SetConfig+0x114>)
- 800991a: 4293 cmp r3, r2
- 800991c: d02b beq.n 8009976 <TIM_Base_SetConfig+0xb2>
- 800991e: 687b ldr r3, [r7, #4]
- 8009920: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000
- 8009924: d027 beq.n 8009976 <TIM_Base_SetConfig+0xb2>
- 8009926: 687b ldr r3, [r7, #4]
- 8009928: 4a2c ldr r2, [pc, #176] ; (80099dc <TIM_Base_SetConfig+0x118>)
- 800992a: 4293 cmp r3, r2
- 800992c: d023 beq.n 8009976 <TIM_Base_SetConfig+0xb2>
- 800992e: 687b ldr r3, [r7, #4]
- 8009930: 4a2b ldr r2, [pc, #172] ; (80099e0 <TIM_Base_SetConfig+0x11c>)
- 8009932: 4293 cmp r3, r2
- 8009934: d01f beq.n 8009976 <TIM_Base_SetConfig+0xb2>
- 8009936: 687b ldr r3, [r7, #4]
- 8009938: 4a2a ldr r2, [pc, #168] ; (80099e4 <TIM_Base_SetConfig+0x120>)
- 800993a: 4293 cmp r3, r2
- 800993c: d01b beq.n 8009976 <TIM_Base_SetConfig+0xb2>
- 800993e: 687b ldr r3, [r7, #4]
- 8009940: 4a29 ldr r2, [pc, #164] ; (80099e8 <TIM_Base_SetConfig+0x124>)
- 8009942: 4293 cmp r3, r2
- 8009944: d017 beq.n 8009976 <TIM_Base_SetConfig+0xb2>
- 8009946: 687b ldr r3, [r7, #4]
- 8009948: 4a28 ldr r2, [pc, #160] ; (80099ec <TIM_Base_SetConfig+0x128>)
- 800994a: 4293 cmp r3, r2
- 800994c: d013 beq.n 8009976 <TIM_Base_SetConfig+0xb2>
- 800994e: 687b ldr r3, [r7, #4]
- 8009950: 4a27 ldr r2, [pc, #156] ; (80099f0 <TIM_Base_SetConfig+0x12c>)
- 8009952: 4293 cmp r3, r2
- 8009954: d00f beq.n 8009976 <TIM_Base_SetConfig+0xb2>
- 8009956: 687b ldr r3, [r7, #4]
- 8009958: 4a26 ldr r2, [pc, #152] ; (80099f4 <TIM_Base_SetConfig+0x130>)
- 800995a: 4293 cmp r3, r2
- 800995c: d00b beq.n 8009976 <TIM_Base_SetConfig+0xb2>
- 800995e: 687b ldr r3, [r7, #4]
- 8009960: 4a25 ldr r2, [pc, #148] ; (80099f8 <TIM_Base_SetConfig+0x134>)
- 8009962: 4293 cmp r3, r2
- 8009964: d007 beq.n 8009976 <TIM_Base_SetConfig+0xb2>
- 8009966: 687b ldr r3, [r7, #4]
- 8009968: 4a24 ldr r2, [pc, #144] ; (80099fc <TIM_Base_SetConfig+0x138>)
- 800996a: 4293 cmp r3, r2
- 800996c: d003 beq.n 8009976 <TIM_Base_SetConfig+0xb2>
- 800996e: 687b ldr r3, [r7, #4]
- 8009970: 4a23 ldr r2, [pc, #140] ; (8009a00 <TIM_Base_SetConfig+0x13c>)
- 8009972: 4293 cmp r3, r2
- 8009974: d108 bne.n 8009988 <TIM_Base_SetConfig+0xc4>
- {
- /* Set the clock division */
- tmpcr1 &= ~TIM_CR1_CKD;
- 8009976: 68fb ldr r3, [r7, #12]
- 8009978: f423 7340 bic.w r3, r3, #768 ; 0x300
- 800997c: 60fb str r3, [r7, #12]
- tmpcr1 |= (uint32_t)Structure->ClockDivision;
- 800997e: 683b ldr r3, [r7, #0]
- 8009980: 68db ldr r3, [r3, #12]
- 8009982: 68fa ldr r2, [r7, #12]
- 8009984: 4313 orrs r3, r2
- 8009986: 60fb str r3, [r7, #12]
- }
-
- /* Set the auto-reload preload */
- MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload);
- 8009988: 68fb ldr r3, [r7, #12]
- 800998a: f023 0280 bic.w r2, r3, #128 ; 0x80
- 800998e: 683b ldr r3, [r7, #0]
- 8009990: 695b ldr r3, [r3, #20]
- 8009992: 4313 orrs r3, r2
- 8009994: 60fb str r3, [r7, #12]
-
- TIMx->CR1 = tmpcr1;
- 8009996: 687b ldr r3, [r7, #4]
- 8009998: 68fa ldr r2, [r7, #12]
- 800999a: 601a str r2, [r3, #0]
-
- /* Set the Autoreload value */
- TIMx->ARR = (uint32_t)Structure->Period ;
- 800999c: 683b ldr r3, [r7, #0]
- 800999e: 689a ldr r2, [r3, #8]
- 80099a0: 687b ldr r3, [r7, #4]
- 80099a2: 62da str r2, [r3, #44] ; 0x2c
-
- /* Set the Prescaler value */
- TIMx->PSC = Structure->Prescaler;
- 80099a4: 683b ldr r3, [r7, #0]
- 80099a6: 681a ldr r2, [r3, #0]
- 80099a8: 687b ldr r3, [r7, #4]
- 80099aa: 629a str r2, [r3, #40] ; 0x28
-
- if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx))
- 80099ac: 687b ldr r3, [r7, #4]
- 80099ae: 4a0a ldr r2, [pc, #40] ; (80099d8 <TIM_Base_SetConfig+0x114>)
- 80099b0: 4293 cmp r3, r2
- 80099b2: d003 beq.n 80099bc <TIM_Base_SetConfig+0xf8>
- 80099b4: 687b ldr r3, [r7, #4]
- 80099b6: 4a0c ldr r2, [pc, #48] ; (80099e8 <TIM_Base_SetConfig+0x124>)
- 80099b8: 4293 cmp r3, r2
- 80099ba: d103 bne.n 80099c4 <TIM_Base_SetConfig+0x100>
- {
- /* Set the Repetition Counter value */
- TIMx->RCR = Structure->RepetitionCounter;
- 80099bc: 683b ldr r3, [r7, #0]
- 80099be: 691a ldr r2, [r3, #16]
- 80099c0: 687b ldr r3, [r7, #4]
- 80099c2: 631a str r2, [r3, #48] ; 0x30
- }
-
- /* Generate an update event to reload the Prescaler
- and the repetition counter (only for advanced timer) value immediately */
- TIMx->EGR = TIM_EGR_UG;
- 80099c4: 687b ldr r3, [r7, #4]
- 80099c6: 2201 movs r2, #1
- 80099c8: 615a str r2, [r3, #20]
-}
- 80099ca: bf00 nop
- 80099cc: 3714 adds r7, #20
- 80099ce: 46bd mov sp, r7
- 80099d0: f85d 7b04 ldr.w r7, [sp], #4
- 80099d4: 4770 bx lr
- 80099d6: bf00 nop
- 80099d8: 40010000 .word 0x40010000
- 80099dc: 40000400 .word 0x40000400
- 80099e0: 40000800 .word 0x40000800
- 80099e4: 40000c00 .word 0x40000c00
- 80099e8: 40010400 .word 0x40010400
- 80099ec: 40014000 .word 0x40014000
- 80099f0: 40014400 .word 0x40014400
- 80099f4: 40014800 .word 0x40014800
- 80099f8: 40001800 .word 0x40001800
- 80099fc: 40001c00 .word 0x40001c00
- 8009a00: 40002000 .word 0x40002000
-
-08009a04 <HAL_UART_Init>:
- * parameters in the UART_InitTypeDef and initialize the associated handle.
- * @param huart UART handle.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
-{
- 8009a04: b580 push {r7, lr}
- 8009a06: b082 sub sp, #8
- 8009a08: af00 add r7, sp, #0
- 8009a0a: 6078 str r0, [r7, #4]
- /* Check the UART handle allocation */
- if (huart == NULL)
- 8009a0c: 687b ldr r3, [r7, #4]
- 8009a0e: 2b00 cmp r3, #0
- 8009a10: d101 bne.n 8009a16 <HAL_UART_Init+0x12>
- {
- return HAL_ERROR;
- 8009a12: 2301 movs r3, #1
- 8009a14: e040 b.n 8009a98 <HAL_UART_Init+0x94>
- {
- /* Check the parameters */
- assert_param(IS_UART_INSTANCE(huart->Instance));
- }
-
- if (huart->gState == HAL_UART_STATE_RESET)
- 8009a16: 687b ldr r3, [r7, #4]
- 8009a18: 6f5b ldr r3, [r3, #116] ; 0x74
- 8009a1a: 2b00 cmp r3, #0
- 8009a1c: d106 bne.n 8009a2c <HAL_UART_Init+0x28>
- {
- /* Allocate lock resource and initialize it */
- huart->Lock = HAL_UNLOCKED;
- 8009a1e: 687b ldr r3, [r7, #4]
- 8009a20: 2200 movs r2, #0
- 8009a22: f883 2070 strb.w r2, [r3, #112] ; 0x70
-
- /* Init the low level hardware */
- huart->MspInitCallback(huart);
-#else
- /* Init the low level hardware : GPIO, CLOCK */
- HAL_UART_MspInit(huart);
- 8009a26: 6878 ldr r0, [r7, #4]
- 8009a28: f002 fde6 bl 800c5f8 <HAL_UART_MspInit>
-#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
- }
-
- huart->gState = HAL_UART_STATE_BUSY;
- 8009a2c: 687b ldr r3, [r7, #4]
- 8009a2e: 2224 movs r2, #36 ; 0x24
- 8009a30: 675a str r2, [r3, #116] ; 0x74
-
- /* Disable the Peripheral */
- __HAL_UART_DISABLE(huart);
- 8009a32: 687b ldr r3, [r7, #4]
- 8009a34: 681b ldr r3, [r3, #0]
- 8009a36: 681a ldr r2, [r3, #0]
- 8009a38: 687b ldr r3, [r7, #4]
- 8009a3a: 681b ldr r3, [r3, #0]
- 8009a3c: f022 0201 bic.w r2, r2, #1
- 8009a40: 601a str r2, [r3, #0]
-
- /* Set the UART Communication parameters */
- if (UART_SetConfig(huart) == HAL_ERROR)
- 8009a42: 6878 ldr r0, [r7, #4]
- 8009a44: f000 f9f0 bl 8009e28 <UART_SetConfig>
- 8009a48: 4603 mov r3, r0
- 8009a4a: 2b01 cmp r3, #1
- 8009a4c: d101 bne.n 8009a52 <HAL_UART_Init+0x4e>
- {
- return HAL_ERROR;
- 8009a4e: 2301 movs r3, #1
- 8009a50: e022 b.n 8009a98 <HAL_UART_Init+0x94>
- }
-
- if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
- 8009a52: 687b ldr r3, [r7, #4]
- 8009a54: 6a5b ldr r3, [r3, #36] ; 0x24
- 8009a56: 2b00 cmp r3, #0
- 8009a58: d002 beq.n 8009a60 <HAL_UART_Init+0x5c>
- {
- UART_AdvFeatureConfig(huart);
- 8009a5a: 6878 ldr r0, [r7, #4]
- 8009a5c: f000 fc88 bl 800a370 <UART_AdvFeatureConfig>
- }
-
- /* In asynchronous mode, the following bits must be kept cleared:
- - LINEN and CLKEN bits in the USART_CR2 register,
- - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/
- CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
- 8009a60: 687b ldr r3, [r7, #4]
- 8009a62: 681b ldr r3, [r3, #0]
- 8009a64: 685a ldr r2, [r3, #4]
- 8009a66: 687b ldr r3, [r7, #4]
- 8009a68: 681b ldr r3, [r3, #0]
- 8009a6a: f422 4290 bic.w r2, r2, #18432 ; 0x4800
- 8009a6e: 605a str r2, [r3, #4]
- CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
- 8009a70: 687b ldr r3, [r7, #4]
- 8009a72: 681b ldr r3, [r3, #0]
- 8009a74: 689a ldr r2, [r3, #8]
- 8009a76: 687b ldr r3, [r7, #4]
- 8009a78: 681b ldr r3, [r3, #0]
- 8009a7a: f022 022a bic.w r2, r2, #42 ; 0x2a
- 8009a7e: 609a str r2, [r3, #8]
-
- /* Enable the Peripheral */
- __HAL_UART_ENABLE(huart);
- 8009a80: 687b ldr r3, [r7, #4]
- 8009a82: 681b ldr r3, [r3, #0]
- 8009a84: 681a ldr r2, [r3, #0]
- 8009a86: 687b ldr r3, [r7, #4]
- 8009a88: 681b ldr r3, [r3, #0]
- 8009a8a: f042 0201 orr.w r2, r2, #1
- 8009a8e: 601a str r2, [r3, #0]
-
- /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
- return (UART_CheckIdleState(huart));
- 8009a90: 6878 ldr r0, [r7, #4]
- 8009a92: f000 fd0f bl 800a4b4 <UART_CheckIdleState>
- 8009a96: 4603 mov r3, r0
-}
- 8009a98: 4618 mov r0, r3
- 8009a9a: 3708 adds r7, #8
- 8009a9c: 46bd mov sp, r7
- 8009a9e: bd80 pop {r7, pc}
-
-08009aa0 <HAL_UART_Transmit>:
- * @param Size Amount of data to be sent.
- * @param Timeout Timeout duration.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
- 8009aa0: b580 push {r7, lr}
- 8009aa2: b08a sub sp, #40 ; 0x28
- 8009aa4: af02 add r7, sp, #8
- 8009aa6: 60f8 str r0, [r7, #12]
- 8009aa8: 60b9 str r1, [r7, #8]
- 8009aaa: 603b str r3, [r7, #0]
- 8009aac: 4613 mov r3, r2
- 8009aae: 80fb strh r3, [r7, #6]
- uint8_t *pdata8bits;
- uint16_t *pdata16bits;
- uint32_t tickstart;
-
- /* Check that a Tx process is not already ongoing */
- if (huart->gState == HAL_UART_STATE_READY)
- 8009ab0: 68fb ldr r3, [r7, #12]
- 8009ab2: 6f5b ldr r3, [r3, #116] ; 0x74
- 8009ab4: 2b20 cmp r3, #32
- 8009ab6: d17f bne.n 8009bb8 <HAL_UART_Transmit+0x118>
- {
- if ((pData == NULL) || (Size == 0U))
- 8009ab8: 68bb ldr r3, [r7, #8]
- 8009aba: 2b00 cmp r3, #0
- 8009abc: d002 beq.n 8009ac4 <HAL_UART_Transmit+0x24>
- 8009abe: 88fb ldrh r3, [r7, #6]
- 8009ac0: 2b00 cmp r3, #0
- 8009ac2: d101 bne.n 8009ac8 <HAL_UART_Transmit+0x28>
- {
- return HAL_ERROR;
- 8009ac4: 2301 movs r3, #1
- 8009ac6: e078 b.n 8009bba <HAL_UART_Transmit+0x11a>
- }
-
- /* Process Locked */
- __HAL_LOCK(huart);
- 8009ac8: 68fb ldr r3, [r7, #12]
- 8009aca: f893 3070 ldrb.w r3, [r3, #112] ; 0x70
- 8009ace: 2b01 cmp r3, #1
- 8009ad0: d101 bne.n 8009ad6 <HAL_UART_Transmit+0x36>
- 8009ad2: 2302 movs r3, #2
- 8009ad4: e071 b.n 8009bba <HAL_UART_Transmit+0x11a>
- 8009ad6: 68fb ldr r3, [r7, #12]
- 8009ad8: 2201 movs r2, #1
- 8009ada: f883 2070 strb.w r2, [r3, #112] ; 0x70
-
- huart->ErrorCode = HAL_UART_ERROR_NONE;
- 8009ade: 68fb ldr r3, [r7, #12]
- 8009ae0: 2200 movs r2, #0
- 8009ae2: 67da str r2, [r3, #124] ; 0x7c
- huart->gState = HAL_UART_STATE_BUSY_TX;
- 8009ae4: 68fb ldr r3, [r7, #12]
- 8009ae6: 2221 movs r2, #33 ; 0x21
- 8009ae8: 675a str r2, [r3, #116] ; 0x74
-
- /* Init tickstart for timeout managment*/
- tickstart = HAL_GetTick();
- 8009aea: f7fe fad3 bl 8008094 <HAL_GetTick>
- 8009aee: 6178 str r0, [r7, #20]
-
- huart->TxXferSize = Size;
- 8009af0: 68fb ldr r3, [r7, #12]
- 8009af2: 88fa ldrh r2, [r7, #6]
- 8009af4: f8a3 2050 strh.w r2, [r3, #80] ; 0x50
- huart->TxXferCount = Size;
- 8009af8: 68fb ldr r3, [r7, #12]
- 8009afa: 88fa ldrh r2, [r7, #6]
- 8009afc: f8a3 2052 strh.w r2, [r3, #82] ; 0x52
-
- /* In case of 9bits/No Parity transfer, pData needs to be handled as a uint16_t pointer */
- if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
- 8009b00: 68fb ldr r3, [r7, #12]
- 8009b02: 689b ldr r3, [r3, #8]
- 8009b04: f5b3 5f80 cmp.w r3, #4096 ; 0x1000
- 8009b08: d108 bne.n 8009b1c <HAL_UART_Transmit+0x7c>
- 8009b0a: 68fb ldr r3, [r7, #12]
- 8009b0c: 691b ldr r3, [r3, #16]
- 8009b0e: 2b00 cmp r3, #0
- 8009b10: d104 bne.n 8009b1c <HAL_UART_Transmit+0x7c>
- {
- pdata8bits = NULL;
- 8009b12: 2300 movs r3, #0
- 8009b14: 61fb str r3, [r7, #28]
- pdata16bits = (uint16_t *) pData;
- 8009b16: 68bb ldr r3, [r7, #8]
- 8009b18: 61bb str r3, [r7, #24]
- 8009b1a: e003 b.n 8009b24 <HAL_UART_Transmit+0x84>
- }
- else
- {
- pdata8bits = pData;
- 8009b1c: 68bb ldr r3, [r7, #8]
- 8009b1e: 61fb str r3, [r7, #28]
- pdata16bits = NULL;
- 8009b20: 2300 movs r3, #0
- 8009b22: 61bb str r3, [r7, #24]
- }
-
- while (huart->TxXferCount > 0U)
- 8009b24: e02c b.n 8009b80 <HAL_UART_Transmit+0xe0>
- {
- if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
- 8009b26: 683b ldr r3, [r7, #0]
- 8009b28: 9300 str r3, [sp, #0]
- 8009b2a: 697b ldr r3, [r7, #20]
- 8009b2c: 2200 movs r2, #0
- 8009b2e: 2180 movs r1, #128 ; 0x80
- 8009b30: 68f8 ldr r0, [r7, #12]
- 8009b32: f000 fcee bl 800a512 <UART_WaitOnFlagUntilTimeout>
- 8009b36: 4603 mov r3, r0
- 8009b38: 2b00 cmp r3, #0
- 8009b3a: d001 beq.n 8009b40 <HAL_UART_Transmit+0xa0>
- {
- return HAL_TIMEOUT;
- 8009b3c: 2303 movs r3, #3
- 8009b3e: e03c b.n 8009bba <HAL_UART_Transmit+0x11a>
- }
- if (pdata8bits == NULL)
- 8009b40: 69fb ldr r3, [r7, #28]
- 8009b42: 2b00 cmp r3, #0
- 8009b44: d10b bne.n 8009b5e <HAL_UART_Transmit+0xbe>
- {
- huart->Instance->TDR = (uint16_t)(*pdata16bits & 0x01FFU);
- 8009b46: 69bb ldr r3, [r7, #24]
- 8009b48: 881b ldrh r3, [r3, #0]
- 8009b4a: 461a mov r2, r3
- 8009b4c: 68fb ldr r3, [r7, #12]
- 8009b4e: 681b ldr r3, [r3, #0]
- 8009b50: f3c2 0208 ubfx r2, r2, #0, #9
- 8009b54: 629a str r2, [r3, #40] ; 0x28
- pdata16bits++;
- 8009b56: 69bb ldr r3, [r7, #24]
- 8009b58: 3302 adds r3, #2
- 8009b5a: 61bb str r3, [r7, #24]
- 8009b5c: e007 b.n 8009b6e <HAL_UART_Transmit+0xce>
- }
- else
- {
- huart->Instance->TDR = (uint8_t)(*pdata8bits & 0xFFU);
- 8009b5e: 69fb ldr r3, [r7, #28]
- 8009b60: 781a ldrb r2, [r3, #0]
- 8009b62: 68fb ldr r3, [r7, #12]
- 8009b64: 681b ldr r3, [r3, #0]
- 8009b66: 629a str r2, [r3, #40] ; 0x28
- pdata8bits++;
- 8009b68: 69fb ldr r3, [r7, #28]
- 8009b6a: 3301 adds r3, #1
- 8009b6c: 61fb str r3, [r7, #28]
- }
- huart->TxXferCount--;
- 8009b6e: 68fb ldr r3, [r7, #12]
- 8009b70: f8b3 3052 ldrh.w r3, [r3, #82] ; 0x52
- 8009b74: b29b uxth r3, r3
- 8009b76: 3b01 subs r3, #1
- 8009b78: b29a uxth r2, r3
- 8009b7a: 68fb ldr r3, [r7, #12]
- 8009b7c: f8a3 2052 strh.w r2, [r3, #82] ; 0x52
- while (huart->TxXferCount > 0U)
- 8009b80: 68fb ldr r3, [r7, #12]
- 8009b82: f8b3 3052 ldrh.w r3, [r3, #82] ; 0x52
- 8009b86: b29b uxth r3, r3
- 8009b88: 2b00 cmp r3, #0
- 8009b8a: d1cc bne.n 8009b26 <HAL_UART_Transmit+0x86>
- }
-
- if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
- 8009b8c: 683b ldr r3, [r7, #0]
- 8009b8e: 9300 str r3, [sp, #0]
- 8009b90: 697b ldr r3, [r7, #20]
- 8009b92: 2200 movs r2, #0
- 8009b94: 2140 movs r1, #64 ; 0x40
- 8009b96: 68f8 ldr r0, [r7, #12]
- 8009b98: f000 fcbb bl 800a512 <UART_WaitOnFlagUntilTimeout>
- 8009b9c: 4603 mov r3, r0
- 8009b9e: 2b00 cmp r3, #0
- 8009ba0: d001 beq.n 8009ba6 <HAL_UART_Transmit+0x106>
- {
- return HAL_TIMEOUT;
- 8009ba2: 2303 movs r3, #3
- 8009ba4: e009 b.n 8009bba <HAL_UART_Transmit+0x11a>
- }
-
- /* At end of Tx process, restore huart->gState to Ready */
- huart->gState = HAL_UART_STATE_READY;
- 8009ba6: 68fb ldr r3, [r7, #12]
- 8009ba8: 2220 movs r2, #32
- 8009baa: 675a str r2, [r3, #116] ; 0x74
-
- /* Process Unlocked */
- __HAL_UNLOCK(huart);
- 8009bac: 68fb ldr r3, [r7, #12]
- 8009bae: 2200 movs r2, #0
- 8009bb0: f883 2070 strb.w r2, [r3, #112] ; 0x70
-
- return HAL_OK;
- 8009bb4: 2300 movs r3, #0
- 8009bb6: e000 b.n 8009bba <HAL_UART_Transmit+0x11a>
- }
- else
- {
- return HAL_BUSY;
- 8009bb8: 2302 movs r3, #2
- }
-}
- 8009bba: 4618 mov r0, r3
- 8009bbc: 3720 adds r7, #32
- 8009bbe: 46bd mov sp, r7
- 8009bc0: bd80 pop {r7, pc}
- ...
-
-08009bc4 <HAL_UART_Transmit_DMA>:
- * @param pData Pointer to data buffer.
- * @param Size Amount of data to be sent.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
-{
- 8009bc4: b580 push {r7, lr}
- 8009bc6: b084 sub sp, #16
- 8009bc8: af00 add r7, sp, #0
- 8009bca: 60f8 str r0, [r7, #12]
- 8009bcc: 60b9 str r1, [r7, #8]
- 8009bce: 4613 mov r3, r2
- 8009bd0: 80fb strh r3, [r7, #6]
- /* Check that a Tx process is not already ongoing */
- if (huart->gState == HAL_UART_STATE_READY)
- 8009bd2: 68fb ldr r3, [r7, #12]
- 8009bd4: 6f5b ldr r3, [r3, #116] ; 0x74
- 8009bd6: 2b20 cmp r3, #32
- 8009bd8: d164 bne.n 8009ca4 <HAL_UART_Transmit_DMA+0xe0>
- {
- if ((pData == NULL) || (Size == 0U))
- 8009bda: 68bb ldr r3, [r7, #8]
- 8009bdc: 2b00 cmp r3, #0
- 8009bde: d002 beq.n 8009be6 <HAL_UART_Transmit_DMA+0x22>
- 8009be0: 88fb ldrh r3, [r7, #6]
- 8009be2: 2b00 cmp r3, #0
- 8009be4: d101 bne.n 8009bea <HAL_UART_Transmit_DMA+0x26>
- {
- return HAL_ERROR;
- 8009be6: 2301 movs r3, #1
- 8009be8: e05d b.n 8009ca6 <HAL_UART_Transmit_DMA+0xe2>
- }
-
- /* Process Locked */
- __HAL_LOCK(huart);
- 8009bea: 68fb ldr r3, [r7, #12]
- 8009bec: f893 3070 ldrb.w r3, [r3, #112] ; 0x70
- 8009bf0: 2b01 cmp r3, #1
- 8009bf2: d101 bne.n 8009bf8 <HAL_UART_Transmit_DMA+0x34>
- 8009bf4: 2302 movs r3, #2
- 8009bf6: e056 b.n 8009ca6 <HAL_UART_Transmit_DMA+0xe2>
- 8009bf8: 68fb ldr r3, [r7, #12]
- 8009bfa: 2201 movs r2, #1
- 8009bfc: f883 2070 strb.w r2, [r3, #112] ; 0x70
-
- huart->pTxBuffPtr = pData;
- 8009c00: 68fb ldr r3, [r7, #12]
- 8009c02: 68ba ldr r2, [r7, #8]
- 8009c04: 64da str r2, [r3, #76] ; 0x4c
- huart->TxXferSize = Size;
- 8009c06: 68fb ldr r3, [r7, #12]
- 8009c08: 88fa ldrh r2, [r7, #6]
- 8009c0a: f8a3 2050 strh.w r2, [r3, #80] ; 0x50
- huart->TxXferCount = Size;
- 8009c0e: 68fb ldr r3, [r7, #12]
- 8009c10: 88fa ldrh r2, [r7, #6]
- 8009c12: f8a3 2052 strh.w r2, [r3, #82] ; 0x52
-
- huart->ErrorCode = HAL_UART_ERROR_NONE;
- 8009c16: 68fb ldr r3, [r7, #12]
- 8009c18: 2200 movs r2, #0
- 8009c1a: 67da str r2, [r3, #124] ; 0x7c
- huart->gState = HAL_UART_STATE_BUSY_TX;
- 8009c1c: 68fb ldr r3, [r7, #12]
- 8009c1e: 2221 movs r2, #33 ; 0x21
- 8009c20: 675a str r2, [r3, #116] ; 0x74
-
- if (huart->hdmatx != NULL)
- 8009c22: 68fb ldr r3, [r7, #12]
- 8009c24: 6e9b ldr r3, [r3, #104] ; 0x68
- 8009c26: 2b00 cmp r3, #0
- 8009c28: d02a beq.n 8009c80 <HAL_UART_Transmit_DMA+0xbc>
- {
- /* Set the UART DMA transfer complete callback */
- huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt;
- 8009c2a: 68fb ldr r3, [r7, #12]
- 8009c2c: 6e9b ldr r3, [r3, #104] ; 0x68
- 8009c2e: 4a20 ldr r2, [pc, #128] ; (8009cb0 <HAL_UART_Transmit_DMA+0xec>)
- 8009c30: 63da str r2, [r3, #60] ; 0x3c
-
- /* Set the UART DMA Half transfer complete callback */
- huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt;
- 8009c32: 68fb ldr r3, [r7, #12]
- 8009c34: 6e9b ldr r3, [r3, #104] ; 0x68
- 8009c36: 4a1f ldr r2, [pc, #124] ; (8009cb4 <HAL_UART_Transmit_DMA+0xf0>)
- 8009c38: 641a str r2, [r3, #64] ; 0x40
-
- /* Set the DMA error callback */
- huart->hdmatx->XferErrorCallback = UART_DMAError;
- 8009c3a: 68fb ldr r3, [r7, #12]
- 8009c3c: 6e9b ldr r3, [r3, #104] ; 0x68
- 8009c3e: 4a1e ldr r2, [pc, #120] ; (8009cb8 <HAL_UART_Transmit_DMA+0xf4>)
- 8009c40: 64da str r2, [r3, #76] ; 0x4c
-
- /* Set the DMA abort callback */
- huart->hdmatx->XferAbortCallback = NULL;
- 8009c42: 68fb ldr r3, [r7, #12]
- 8009c44: 6e9b ldr r3, [r3, #104] ; 0x68
- 8009c46: 2200 movs r2, #0
- 8009c48: 651a str r2, [r3, #80] ; 0x50
-
- /* Enable the UART transmit DMA channel */
- if (HAL_DMA_Start_IT(huart->hdmatx, (uint32_t)huart->pTxBuffPtr, (uint32_t)&huart->Instance->TDR, Size) != HAL_OK)
- 8009c4a: 68fb ldr r3, [r7, #12]
- 8009c4c: 6e98 ldr r0, [r3, #104] ; 0x68
- 8009c4e: 68fb ldr r3, [r7, #12]
- 8009c50: 6cdb ldr r3, [r3, #76] ; 0x4c
- 8009c52: 4619 mov r1, r3
- 8009c54: 68fb ldr r3, [r7, #12]
- 8009c56: 681b ldr r3, [r3, #0]
- 8009c58: 3328 adds r3, #40 ; 0x28
- 8009c5a: 461a mov r2, r3
- 8009c5c: 88fb ldrh r3, [r7, #6]
- 8009c5e: f7fe fb2c bl 80082ba <HAL_DMA_Start_IT>
- 8009c62: 4603 mov r3, r0
- 8009c64: 2b00 cmp r3, #0
- 8009c66: d00b beq.n 8009c80 <HAL_UART_Transmit_DMA+0xbc>
- {
- /* Set error code to DMA */
- huart->ErrorCode = HAL_UART_ERROR_DMA;
- 8009c68: 68fb ldr r3, [r7, #12]
- 8009c6a: 2210 movs r2, #16
- 8009c6c: 67da str r2, [r3, #124] ; 0x7c
-
- /* Process Unlocked */
- __HAL_UNLOCK(huart);
- 8009c6e: 68fb ldr r3, [r7, #12]
- 8009c70: 2200 movs r2, #0
- 8009c72: f883 2070 strb.w r2, [r3, #112] ; 0x70
-
- /* Restore huart->gState to ready */
- huart->gState = HAL_UART_STATE_READY;
- 8009c76: 68fb ldr r3, [r7, #12]
- 8009c78: 2220 movs r2, #32
- 8009c7a: 675a str r2, [r3, #116] ; 0x74
-
- return HAL_ERROR;
- 8009c7c: 2301 movs r3, #1
- 8009c7e: e012 b.n 8009ca6 <HAL_UART_Transmit_DMA+0xe2>
- }
- }
- /* Clear the TC flag in the ICR register */
- __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_TCF);
- 8009c80: 68fb ldr r3, [r7, #12]
- 8009c82: 681b ldr r3, [r3, #0]
- 8009c84: 2240 movs r2, #64 ; 0x40
- 8009c86: 621a str r2, [r3, #32]
-
- /* Process Unlocked */
- __HAL_UNLOCK(huart);
- 8009c88: 68fb ldr r3, [r7, #12]
- 8009c8a: 2200 movs r2, #0
- 8009c8c: f883 2070 strb.w r2, [r3, #112] ; 0x70
-
- /* Enable the DMA transfer for transmit request by setting the DMAT bit
- in the UART CR3 register */
- SET_BIT(huart->Instance->CR3, USART_CR3_DMAT);
- 8009c90: 68fb ldr r3, [r7, #12]
- 8009c92: 681b ldr r3, [r3, #0]
- 8009c94: 689a ldr r2, [r3, #8]
- 8009c96: 68fb ldr r3, [r7, #12]
- 8009c98: 681b ldr r3, [r3, #0]
- 8009c9a: f042 0280 orr.w r2, r2, #128 ; 0x80
- 8009c9e: 609a str r2, [r3, #8]
-
- return HAL_OK;
- 8009ca0: 2300 movs r3, #0
- 8009ca2: e000 b.n 8009ca6 <HAL_UART_Transmit_DMA+0xe2>
- }
- else
- {
- return HAL_BUSY;
- 8009ca4: 2302 movs r3, #2
- }
-}
- 8009ca6: 4618 mov r0, r3
- 8009ca8: 3710 adds r7, #16
- 8009caa: 46bd mov sp, r7
- 8009cac: bd80 pop {r7, pc}
- 8009cae: bf00 nop
- 8009cb0: 0800a60d .word 0x0800a60d
- 8009cb4: 0800a65d .word 0x0800a65d
- 8009cb8: 0800a6f9 .word 0x0800a6f9
-
-08009cbc <HAL_UART_Receive_DMA>:
- * @param pData Pointer to data buffer.
- * @param Size Amount of data to be received.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
-{
- 8009cbc: b580 push {r7, lr}
- 8009cbe: b084 sub sp, #16
- 8009cc0: af00 add r7, sp, #0
- 8009cc2: 60f8 str r0, [r7, #12]
- 8009cc4: 60b9 str r1, [r7, #8]
- 8009cc6: 4613 mov r3, r2
- 8009cc8: 80fb strh r3, [r7, #6]
- /* Check that a Rx process is not already ongoing */
- if (huart->RxState == HAL_UART_STATE_READY)
- 8009cca: 68fb ldr r3, [r7, #12]
- 8009ccc: 6f9b ldr r3, [r3, #120] ; 0x78
- 8009cce: 2b20 cmp r3, #32
- 8009cd0: d16c bne.n 8009dac <HAL_UART_Receive_DMA+0xf0>
- {
- if ((pData == NULL) || (Size == 0U))
- 8009cd2: 68bb ldr r3, [r7, #8]
- 8009cd4: 2b00 cmp r3, #0
- 8009cd6: d002 beq.n 8009cde <HAL_UART_Receive_DMA+0x22>
- 8009cd8: 88fb ldrh r3, [r7, #6]
- 8009cda: 2b00 cmp r3, #0
- 8009cdc: d101 bne.n 8009ce2 <HAL_UART_Receive_DMA+0x26>
- {
- return HAL_ERROR;
- 8009cde: 2301 movs r3, #1
- 8009ce0: e065 b.n 8009dae <HAL_UART_Receive_DMA+0xf2>
- }
-
- /* Process Locked */
- __HAL_LOCK(huart);
- 8009ce2: 68fb ldr r3, [r7, #12]
- 8009ce4: f893 3070 ldrb.w r3, [r3, #112] ; 0x70
- 8009ce8: 2b01 cmp r3, #1
- 8009cea: d101 bne.n 8009cf0 <HAL_UART_Receive_DMA+0x34>
- 8009cec: 2302 movs r3, #2
- 8009cee: e05e b.n 8009dae <HAL_UART_Receive_DMA+0xf2>
- 8009cf0: 68fb ldr r3, [r7, #12]
- 8009cf2: 2201 movs r2, #1
- 8009cf4: f883 2070 strb.w r2, [r3, #112] ; 0x70
-
- huart->pRxBuffPtr = pData;
- 8009cf8: 68fb ldr r3, [r7, #12]
- 8009cfa: 68ba ldr r2, [r7, #8]
- 8009cfc: 655a str r2, [r3, #84] ; 0x54
- huart->RxXferSize = Size;
- 8009cfe: 68fb ldr r3, [r7, #12]
- 8009d00: 88fa ldrh r2, [r7, #6]
- 8009d02: f8a3 2058 strh.w r2, [r3, #88] ; 0x58
-
- huart->ErrorCode = HAL_UART_ERROR_NONE;
- 8009d06: 68fb ldr r3, [r7, #12]
- 8009d08: 2200 movs r2, #0
- 8009d0a: 67da str r2, [r3, #124] ; 0x7c
- huart->RxState = HAL_UART_STATE_BUSY_RX;
- 8009d0c: 68fb ldr r3, [r7, #12]
- 8009d0e: 2222 movs r2, #34 ; 0x22
- 8009d10: 679a str r2, [r3, #120] ; 0x78
-
- if (huart->hdmarx != NULL)
- 8009d12: 68fb ldr r3, [r7, #12]
- 8009d14: 6edb ldr r3, [r3, #108] ; 0x6c
- 8009d16: 2b00 cmp r3, #0
- 8009d18: d02a beq.n 8009d70 <HAL_UART_Receive_DMA+0xb4>
- {
- /* Set the UART DMA transfer complete callback */
- huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt;
- 8009d1a: 68fb ldr r3, [r7, #12]
- 8009d1c: 6edb ldr r3, [r3, #108] ; 0x6c
- 8009d1e: 4a26 ldr r2, [pc, #152] ; (8009db8 <HAL_UART_Receive_DMA+0xfc>)
- 8009d20: 63da str r2, [r3, #60] ; 0x3c
-
- /* Set the UART DMA Half transfer complete callback */
- huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt;
- 8009d22: 68fb ldr r3, [r7, #12]
- 8009d24: 6edb ldr r3, [r3, #108] ; 0x6c
- 8009d26: 4a25 ldr r2, [pc, #148] ; (8009dbc <HAL_UART_Receive_DMA+0x100>)
- 8009d28: 641a str r2, [r3, #64] ; 0x40
-
- /* Set the DMA error callback */
- huart->hdmarx->XferErrorCallback = UART_DMAError;
- 8009d2a: 68fb ldr r3, [r7, #12]
- 8009d2c: 6edb ldr r3, [r3, #108] ; 0x6c
- 8009d2e: 4a24 ldr r2, [pc, #144] ; (8009dc0 <HAL_UART_Receive_DMA+0x104>)
- 8009d30: 64da str r2, [r3, #76] ; 0x4c
-
- /* Set the DMA abort callback */
- huart->hdmarx->XferAbortCallback = NULL;
- 8009d32: 68fb ldr r3, [r7, #12]
- 8009d34: 6edb ldr r3, [r3, #108] ; 0x6c
- 8009d36: 2200 movs r2, #0
- 8009d38: 651a str r2, [r3, #80] ; 0x50
-
- /* Enable the DMA channel */
- if (HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->RDR, (uint32_t)huart->pRxBuffPtr, Size) != HAL_OK)
- 8009d3a: 68fb ldr r3, [r7, #12]
- 8009d3c: 6ed8 ldr r0, [r3, #108] ; 0x6c
- 8009d3e: 68fb ldr r3, [r7, #12]
- 8009d40: 681b ldr r3, [r3, #0]
- 8009d42: 3324 adds r3, #36 ; 0x24
- 8009d44: 4619 mov r1, r3
- 8009d46: 68fb ldr r3, [r7, #12]
- 8009d48: 6d5b ldr r3, [r3, #84] ; 0x54
- 8009d4a: 461a mov r2, r3
- 8009d4c: 88fb ldrh r3, [r7, #6]
- 8009d4e: f7fe fab4 bl 80082ba <HAL_DMA_Start_IT>
- 8009d52: 4603 mov r3, r0
- 8009d54: 2b00 cmp r3, #0
- 8009d56: d00b beq.n 8009d70 <HAL_UART_Receive_DMA+0xb4>
- {
- /* Set error code to DMA */
- huart->ErrorCode = HAL_UART_ERROR_DMA;
- 8009d58: 68fb ldr r3, [r7, #12]
- 8009d5a: 2210 movs r2, #16
- 8009d5c: 67da str r2, [r3, #124] ; 0x7c
-
- /* Process Unlocked */
- __HAL_UNLOCK(huart);
- 8009d5e: 68fb ldr r3, [r7, #12]
- 8009d60: 2200 movs r2, #0
- 8009d62: f883 2070 strb.w r2, [r3, #112] ; 0x70
-
- /* Restore huart->gState to ready */
- huart->gState = HAL_UART_STATE_READY;
- 8009d66: 68fb ldr r3, [r7, #12]
- 8009d68: 2220 movs r2, #32
- 8009d6a: 675a str r2, [r3, #116] ; 0x74
-
- return HAL_ERROR;
- 8009d6c: 2301 movs r3, #1
- 8009d6e: e01e b.n 8009dae <HAL_UART_Receive_DMA+0xf2>
- }
- }
- /* Process Unlocked */
- __HAL_UNLOCK(huart);
- 8009d70: 68fb ldr r3, [r7, #12]
- 8009d72: 2200 movs r2, #0
- 8009d74: f883 2070 strb.w r2, [r3, #112] ; 0x70
-
- /* Enable the UART Parity Error Interrupt */
- SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
- 8009d78: 68fb ldr r3, [r7, #12]
- 8009d7a: 681b ldr r3, [r3, #0]
- 8009d7c: 681a ldr r2, [r3, #0]
- 8009d7e: 68fb ldr r3, [r7, #12]
- 8009d80: 681b ldr r3, [r3, #0]
- 8009d82: f442 7280 orr.w r2, r2, #256 ; 0x100
- 8009d86: 601a str r2, [r3, #0]
-
- /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
- SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
- 8009d88: 68fb ldr r3, [r7, #12]
- 8009d8a: 681b ldr r3, [r3, #0]
- 8009d8c: 689a ldr r2, [r3, #8]
- 8009d8e: 68fb ldr r3, [r7, #12]
- 8009d90: 681b ldr r3, [r3, #0]
- 8009d92: f042 0201 orr.w r2, r2, #1
- 8009d96: 609a str r2, [r3, #8]
-
- /* Enable the DMA transfer for the receiver request by setting the DMAR bit
- in the UART CR3 register */
- SET_BIT(huart->Instance->CR3, USART_CR3_DMAR);
- 8009d98: 68fb ldr r3, [r7, #12]
- 8009d9a: 681b ldr r3, [r3, #0]
- 8009d9c: 689a ldr r2, [r3, #8]
- 8009d9e: 68fb ldr r3, [r7, #12]
- 8009da0: 681b ldr r3, [r3, #0]
- 8009da2: f042 0240 orr.w r2, r2, #64 ; 0x40
- 8009da6: 609a str r2, [r3, #8]
-
- return HAL_OK;
- 8009da8: 2300 movs r3, #0
- 8009daa: e000 b.n 8009dae <HAL_UART_Receive_DMA+0xf2>
- }
- else
- {
- return HAL_BUSY;
- 8009dac: 2302 movs r3, #2
- }
-}
- 8009dae: 4618 mov r0, r3
- 8009db0: 3710 adds r7, #16
- 8009db2: 46bd mov sp, r7
- 8009db4: bd80 pop {r7, pc}
- 8009db6: bf00 nop
- 8009db8: 0800a679 .word 0x0800a679
- 8009dbc: 0800a6dd .word 0x0800a6dd
- 8009dc0: 0800a6f9 .word 0x0800a6f9
-
-08009dc4 <HAL_UART_TxCpltCallback>:
- * @brief Tx Transfer completed callback.
- * @param huart UART handle.
- * @retval None
- */
-__weak void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
-{
- 8009dc4: b480 push {r7}
- 8009dc6: b083 sub sp, #12
- 8009dc8: af00 add r7, sp, #0
- 8009dca: 6078 str r0, [r7, #4]
- UNUSED(huart);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_UART_TxCpltCallback can be implemented in the user file.
- */
-}
- 8009dcc: bf00 nop
- 8009dce: 370c adds r7, #12
- 8009dd0: 46bd mov sp, r7
- 8009dd2: f85d 7b04 ldr.w r7, [sp], #4
- 8009dd6: 4770 bx lr
-
-08009dd8 <HAL_UART_TxHalfCpltCallback>:
- * @brief Tx Half Transfer completed callback.
- * @param huart UART handle.
- * @retval None
- */
-__weak void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart)
-{
- 8009dd8: b480 push {r7}
- 8009dda: b083 sub sp, #12
- 8009ddc: af00 add r7, sp, #0
- 8009dde: 6078 str r0, [r7, #4]
- UNUSED(huart);
-
- /* NOTE: This function should not be modified, when the callback is needed,
- the HAL_UART_TxHalfCpltCallback can be implemented in the user file.
- */
-}
- 8009de0: bf00 nop
- 8009de2: 370c adds r7, #12
- 8009de4: 46bd mov sp, r7
- 8009de6: f85d 7b04 ldr.w r7, [sp], #4
- 8009dea: 4770 bx lr
-
-08009dec <HAL_UART_RxCpltCallback>:
- * @brief Rx Transfer completed callback.
- * @param huart UART handle.
- * @retval None
- */
-__weak void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
-{
- 8009dec: b480 push {r7}
- 8009dee: b083 sub sp, #12
- 8009df0: af00 add r7, sp, #0
- 8009df2: 6078 str r0, [r7, #4]
- UNUSED(huart);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_UART_RxCpltCallback can be implemented in the user file.
- */
-}
- 8009df4: bf00 nop
- 8009df6: 370c adds r7, #12
- 8009df8: 46bd mov sp, r7
- 8009dfa: f85d 7b04 ldr.w r7, [sp], #4
- 8009dfe: 4770 bx lr
-
-08009e00 <HAL_UART_RxHalfCpltCallback>:
- * @brief Rx Half Transfer completed callback.
- * @param huart UART handle.
- * @retval None
- */
-__weak void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart)
-{
- 8009e00: b480 push {r7}
- 8009e02: b083 sub sp, #12
- 8009e04: af00 add r7, sp, #0
- 8009e06: 6078 str r0, [r7, #4]
- UNUSED(huart);
-
- /* NOTE: This function should not be modified, when the callback is needed,
- the HAL_UART_RxHalfCpltCallback can be implemented in the user file.
- */
-}
- 8009e08: bf00 nop
- 8009e0a: 370c adds r7, #12
- 8009e0c: 46bd mov sp, r7
- 8009e0e: f85d 7b04 ldr.w r7, [sp], #4
- 8009e12: 4770 bx lr
-
-08009e14 <HAL_UART_ErrorCallback>:
- * @brief UART error callback.
- * @param huart UART handle.
- * @retval None
- */
-__weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
-{
- 8009e14: b480 push {r7}
- 8009e16: b083 sub sp, #12
- 8009e18: af00 add r7, sp, #0
- 8009e1a: 6078 str r0, [r7, #4]
- UNUSED(huart);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_UART_ErrorCallback can be implemented in the user file.
- */
-}
- 8009e1c: bf00 nop
- 8009e1e: 370c adds r7, #12
- 8009e20: 46bd mov sp, r7
- 8009e22: f85d 7b04 ldr.w r7, [sp], #4
- 8009e26: 4770 bx lr
-
-08009e28 <UART_SetConfig>:
- * @brief Configure the UART peripheral.
- * @param huart UART handle.
- * @retval HAL status
- */
-HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart)
-{
- 8009e28: b580 push {r7, lr}
- 8009e2a: b088 sub sp, #32
- 8009e2c: af00 add r7, sp, #0
- 8009e2e: 6078 str r0, [r7, #4]
- uint32_t tmpreg;
- uint16_t brrtemp;
- UART_ClockSourceTypeDef clocksource;
- uint32_t usartdiv = 0x00000000U;
- 8009e30: 2300 movs r3, #0
- 8009e32: 61bb str r3, [r7, #24]
- HAL_StatusTypeDef ret = HAL_OK;
- 8009e34: 2300 movs r3, #0
- 8009e36: 75fb strb r3, [r7, #23]
- * the UART Word Length, Parity, Mode and oversampling:
- * set the M bits according to huart->Init.WordLength value
- * set PCE and PS bits according to huart->Init.Parity value
- * set TE and RE bits according to huart->Init.Mode value
- * set OVER8 bit according to huart->Init.OverSampling value */
- tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling ;
- 8009e38: 687b ldr r3, [r7, #4]
- 8009e3a: 689a ldr r2, [r3, #8]
- 8009e3c: 687b ldr r3, [r7, #4]
- 8009e3e: 691b ldr r3, [r3, #16]
- 8009e40: 431a orrs r2, r3
- 8009e42: 687b ldr r3, [r7, #4]
- 8009e44: 695b ldr r3, [r3, #20]
- 8009e46: 431a orrs r2, r3
- 8009e48: 687b ldr r3, [r7, #4]
- 8009e4a: 69db ldr r3, [r3, #28]
- 8009e4c: 4313 orrs r3, r2
- 8009e4e: 613b str r3, [r7, #16]
- MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg);
- 8009e50: 687b ldr r3, [r7, #4]
- 8009e52: 681b ldr r3, [r3, #0]
- 8009e54: 681a ldr r2, [r3, #0]
- 8009e56: 4bb1 ldr r3, [pc, #708] ; (800a11c <UART_SetConfig+0x2f4>)
- 8009e58: 4013 ands r3, r2
- 8009e5a: 687a ldr r2, [r7, #4]
- 8009e5c: 6812 ldr r2, [r2, #0]
- 8009e5e: 6939 ldr r1, [r7, #16]
- 8009e60: 430b orrs r3, r1
- 8009e62: 6013 str r3, [r2, #0]
-
- /*-------------------------- USART CR2 Configuration -----------------------*/
- /* Configure the UART Stop Bits: Set STOP[13:12] bits according
- * to huart->Init.StopBits value */
- MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
- 8009e64: 687b ldr r3, [r7, #4]
- 8009e66: 681b ldr r3, [r3, #0]
- 8009e68: 685b ldr r3, [r3, #4]
- 8009e6a: f423 5140 bic.w r1, r3, #12288 ; 0x3000
- 8009e6e: 687b ldr r3, [r7, #4]
- 8009e70: 68da ldr r2, [r3, #12]
- 8009e72: 687b ldr r3, [r7, #4]
- 8009e74: 681b ldr r3, [r3, #0]
- 8009e76: 430a orrs r2, r1
- 8009e78: 605a str r2, [r3, #4]
- /* Configure
- * - UART HardWare Flow Control: set CTSE and RTSE bits according
- * to huart->Init.HwFlowCtl value
- * - one-bit sampling method versus three samples' majority rule according
- * to huart->Init.OneBitSampling (not applicable to LPUART) */
- tmpreg = (uint32_t)huart->Init.HwFlowCtl;
- 8009e7a: 687b ldr r3, [r7, #4]
- 8009e7c: 699b ldr r3, [r3, #24]
- 8009e7e: 613b str r3, [r7, #16]
-
- tmpreg |= huart->Init.OneBitSampling;
- 8009e80: 687b ldr r3, [r7, #4]
- 8009e82: 6a1b ldr r3, [r3, #32]
- 8009e84: 693a ldr r2, [r7, #16]
- 8009e86: 4313 orrs r3, r2
- 8009e88: 613b str r3, [r7, #16]
- MODIFY_REG(huart->Instance->CR3, USART_CR3_FIELDS, tmpreg);
- 8009e8a: 687b ldr r3, [r7, #4]
- 8009e8c: 681b ldr r3, [r3, #0]
- 8009e8e: 689b ldr r3, [r3, #8]
- 8009e90: f423 6130 bic.w r1, r3, #2816 ; 0xb00
- 8009e94: 687b ldr r3, [r7, #4]
- 8009e96: 681b ldr r3, [r3, #0]
- 8009e98: 693a ldr r2, [r7, #16]
- 8009e9a: 430a orrs r2, r1
- 8009e9c: 609a str r2, [r3, #8]
-
-
- /*-------------------------- USART BRR Configuration -----------------------*/
- UART_GETCLOCKSOURCE(huart, clocksource);
- 8009e9e: 687b ldr r3, [r7, #4]
- 8009ea0: 681b ldr r3, [r3, #0]
- 8009ea2: 4a9f ldr r2, [pc, #636] ; (800a120 <UART_SetConfig+0x2f8>)
- 8009ea4: 4293 cmp r3, r2
- 8009ea6: d121 bne.n 8009eec <UART_SetConfig+0xc4>
- 8009ea8: 4b9e ldr r3, [pc, #632] ; (800a124 <UART_SetConfig+0x2fc>)
- 8009eaa: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 8009eae: f003 0303 and.w r3, r3, #3
- 8009eb2: 2b03 cmp r3, #3
- 8009eb4: d816 bhi.n 8009ee4 <UART_SetConfig+0xbc>
- 8009eb6: a201 add r2, pc, #4 ; (adr r2, 8009ebc <UART_SetConfig+0x94>)
- 8009eb8: f852 f023 ldr.w pc, [r2, r3, lsl #2]
- 8009ebc: 08009ecd .word 0x08009ecd
- 8009ec0: 08009ed9 .word 0x08009ed9
- 8009ec4: 08009ed3 .word 0x08009ed3
- 8009ec8: 08009edf .word 0x08009edf
- 8009ecc: 2301 movs r3, #1
- 8009ece: 77fb strb r3, [r7, #31]
- 8009ed0: e151 b.n 800a176 <UART_SetConfig+0x34e>
- 8009ed2: 2302 movs r3, #2
- 8009ed4: 77fb strb r3, [r7, #31]
- 8009ed6: e14e b.n 800a176 <UART_SetConfig+0x34e>
- 8009ed8: 2304 movs r3, #4
- 8009eda: 77fb strb r3, [r7, #31]
- 8009edc: e14b b.n 800a176 <UART_SetConfig+0x34e>
- 8009ede: 2308 movs r3, #8
- 8009ee0: 77fb strb r3, [r7, #31]
- 8009ee2: e148 b.n 800a176 <UART_SetConfig+0x34e>
- 8009ee4: 2310 movs r3, #16
- 8009ee6: 77fb strb r3, [r7, #31]
- 8009ee8: bf00 nop
- 8009eea: e144 b.n 800a176 <UART_SetConfig+0x34e>
- 8009eec: 687b ldr r3, [r7, #4]
- 8009eee: 681b ldr r3, [r3, #0]
- 8009ef0: 4a8d ldr r2, [pc, #564] ; (800a128 <UART_SetConfig+0x300>)
- 8009ef2: 4293 cmp r3, r2
- 8009ef4: d134 bne.n 8009f60 <UART_SetConfig+0x138>
- 8009ef6: 4b8b ldr r3, [pc, #556] ; (800a124 <UART_SetConfig+0x2fc>)
- 8009ef8: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 8009efc: f003 030c and.w r3, r3, #12
- 8009f00: 2b0c cmp r3, #12
- 8009f02: d829 bhi.n 8009f58 <UART_SetConfig+0x130>
- 8009f04: a201 add r2, pc, #4 ; (adr r2, 8009f0c <UART_SetConfig+0xe4>)
- 8009f06: f852 f023 ldr.w pc, [r2, r3, lsl #2]
- 8009f0a: bf00 nop
- 8009f0c: 08009f41 .word 0x08009f41
- 8009f10: 08009f59 .word 0x08009f59
- 8009f14: 08009f59 .word 0x08009f59
- 8009f18: 08009f59 .word 0x08009f59
- 8009f1c: 08009f4d .word 0x08009f4d
- 8009f20: 08009f59 .word 0x08009f59
- 8009f24: 08009f59 .word 0x08009f59
- 8009f28: 08009f59 .word 0x08009f59
- 8009f2c: 08009f47 .word 0x08009f47
- 8009f30: 08009f59 .word 0x08009f59
- 8009f34: 08009f59 .word 0x08009f59
- 8009f38: 08009f59 .word 0x08009f59
- 8009f3c: 08009f53 .word 0x08009f53
- 8009f40: 2300 movs r3, #0
- 8009f42: 77fb strb r3, [r7, #31]
- 8009f44: e117 b.n 800a176 <UART_SetConfig+0x34e>
- 8009f46: 2302 movs r3, #2
- 8009f48: 77fb strb r3, [r7, #31]
- 8009f4a: e114 b.n 800a176 <UART_SetConfig+0x34e>
- 8009f4c: 2304 movs r3, #4
- 8009f4e: 77fb strb r3, [r7, #31]
- 8009f50: e111 b.n 800a176 <UART_SetConfig+0x34e>
- 8009f52: 2308 movs r3, #8
- 8009f54: 77fb strb r3, [r7, #31]
- 8009f56: e10e b.n 800a176 <UART_SetConfig+0x34e>
- 8009f58: 2310 movs r3, #16
- 8009f5a: 77fb strb r3, [r7, #31]
- 8009f5c: bf00 nop
- 8009f5e: e10a b.n 800a176 <UART_SetConfig+0x34e>
- 8009f60: 687b ldr r3, [r7, #4]
- 8009f62: 681b ldr r3, [r3, #0]
- 8009f64: 4a71 ldr r2, [pc, #452] ; (800a12c <UART_SetConfig+0x304>)
- 8009f66: 4293 cmp r3, r2
- 8009f68: d120 bne.n 8009fac <UART_SetConfig+0x184>
- 8009f6a: 4b6e ldr r3, [pc, #440] ; (800a124 <UART_SetConfig+0x2fc>)
- 8009f6c: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 8009f70: f003 0330 and.w r3, r3, #48 ; 0x30
- 8009f74: 2b10 cmp r3, #16
- 8009f76: d00f beq.n 8009f98 <UART_SetConfig+0x170>
- 8009f78: 2b10 cmp r3, #16
- 8009f7a: d802 bhi.n 8009f82 <UART_SetConfig+0x15a>
- 8009f7c: 2b00 cmp r3, #0
- 8009f7e: d005 beq.n 8009f8c <UART_SetConfig+0x164>
- 8009f80: e010 b.n 8009fa4 <UART_SetConfig+0x17c>
- 8009f82: 2b20 cmp r3, #32
- 8009f84: d005 beq.n 8009f92 <UART_SetConfig+0x16a>
- 8009f86: 2b30 cmp r3, #48 ; 0x30
- 8009f88: d009 beq.n 8009f9e <UART_SetConfig+0x176>
- 8009f8a: e00b b.n 8009fa4 <UART_SetConfig+0x17c>
- 8009f8c: 2300 movs r3, #0
- 8009f8e: 77fb strb r3, [r7, #31]
- 8009f90: e0f1 b.n 800a176 <UART_SetConfig+0x34e>
- 8009f92: 2302 movs r3, #2
- 8009f94: 77fb strb r3, [r7, #31]
- 8009f96: e0ee b.n 800a176 <UART_SetConfig+0x34e>
- 8009f98: 2304 movs r3, #4
- 8009f9a: 77fb strb r3, [r7, #31]
- 8009f9c: e0eb b.n 800a176 <UART_SetConfig+0x34e>
- 8009f9e: 2308 movs r3, #8
- 8009fa0: 77fb strb r3, [r7, #31]
- 8009fa2: e0e8 b.n 800a176 <UART_SetConfig+0x34e>
- 8009fa4: 2310 movs r3, #16
- 8009fa6: 77fb strb r3, [r7, #31]
- 8009fa8: bf00 nop
- 8009faa: e0e4 b.n 800a176 <UART_SetConfig+0x34e>
- 8009fac: 687b ldr r3, [r7, #4]
- 8009fae: 681b ldr r3, [r3, #0]
- 8009fb0: 4a5f ldr r2, [pc, #380] ; (800a130 <UART_SetConfig+0x308>)
- 8009fb2: 4293 cmp r3, r2
- 8009fb4: d120 bne.n 8009ff8 <UART_SetConfig+0x1d0>
- 8009fb6: 4b5b ldr r3, [pc, #364] ; (800a124 <UART_SetConfig+0x2fc>)
- 8009fb8: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 8009fbc: f003 03c0 and.w r3, r3, #192 ; 0xc0
- 8009fc0: 2b40 cmp r3, #64 ; 0x40
- 8009fc2: d00f beq.n 8009fe4 <UART_SetConfig+0x1bc>
- 8009fc4: 2b40 cmp r3, #64 ; 0x40
- 8009fc6: d802 bhi.n 8009fce <UART_SetConfig+0x1a6>
- 8009fc8: 2b00 cmp r3, #0
- 8009fca: d005 beq.n 8009fd8 <UART_SetConfig+0x1b0>
- 8009fcc: e010 b.n 8009ff0 <UART_SetConfig+0x1c8>
- 8009fce: 2b80 cmp r3, #128 ; 0x80
- 8009fd0: d005 beq.n 8009fde <UART_SetConfig+0x1b6>
- 8009fd2: 2bc0 cmp r3, #192 ; 0xc0
- 8009fd4: d009 beq.n 8009fea <UART_SetConfig+0x1c2>
- 8009fd6: e00b b.n 8009ff0 <UART_SetConfig+0x1c8>
- 8009fd8: 2300 movs r3, #0
- 8009fda: 77fb strb r3, [r7, #31]
- 8009fdc: e0cb b.n 800a176 <UART_SetConfig+0x34e>
- 8009fde: 2302 movs r3, #2
- 8009fe0: 77fb strb r3, [r7, #31]
- 8009fe2: e0c8 b.n 800a176 <UART_SetConfig+0x34e>
- 8009fe4: 2304 movs r3, #4
- 8009fe6: 77fb strb r3, [r7, #31]
- 8009fe8: e0c5 b.n 800a176 <UART_SetConfig+0x34e>
- 8009fea: 2308 movs r3, #8
- 8009fec: 77fb strb r3, [r7, #31]
- 8009fee: e0c2 b.n 800a176 <UART_SetConfig+0x34e>
- 8009ff0: 2310 movs r3, #16
- 8009ff2: 77fb strb r3, [r7, #31]
- 8009ff4: bf00 nop
- 8009ff6: e0be b.n 800a176 <UART_SetConfig+0x34e>
- 8009ff8: 687b ldr r3, [r7, #4]
- 8009ffa: 681b ldr r3, [r3, #0]
- 8009ffc: 4a4d ldr r2, [pc, #308] ; (800a134 <UART_SetConfig+0x30c>)
- 8009ffe: 4293 cmp r3, r2
- 800a000: d124 bne.n 800a04c <UART_SetConfig+0x224>
- 800a002: 4b48 ldr r3, [pc, #288] ; (800a124 <UART_SetConfig+0x2fc>)
- 800a004: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 800a008: f403 7340 and.w r3, r3, #768 ; 0x300
- 800a00c: f5b3 7f80 cmp.w r3, #256 ; 0x100
- 800a010: d012 beq.n 800a038 <UART_SetConfig+0x210>
- 800a012: f5b3 7f80 cmp.w r3, #256 ; 0x100
- 800a016: d802 bhi.n 800a01e <UART_SetConfig+0x1f6>
- 800a018: 2b00 cmp r3, #0
- 800a01a: d007 beq.n 800a02c <UART_SetConfig+0x204>
- 800a01c: e012 b.n 800a044 <UART_SetConfig+0x21c>
- 800a01e: f5b3 7f00 cmp.w r3, #512 ; 0x200
- 800a022: d006 beq.n 800a032 <UART_SetConfig+0x20a>
- 800a024: f5b3 7f40 cmp.w r3, #768 ; 0x300
- 800a028: d009 beq.n 800a03e <UART_SetConfig+0x216>
- 800a02a: e00b b.n 800a044 <UART_SetConfig+0x21c>
- 800a02c: 2300 movs r3, #0
- 800a02e: 77fb strb r3, [r7, #31]
- 800a030: e0a1 b.n 800a176 <UART_SetConfig+0x34e>
- 800a032: 2302 movs r3, #2
- 800a034: 77fb strb r3, [r7, #31]
- 800a036: e09e b.n 800a176 <UART_SetConfig+0x34e>
- 800a038: 2304 movs r3, #4
- 800a03a: 77fb strb r3, [r7, #31]
- 800a03c: e09b b.n 800a176 <UART_SetConfig+0x34e>
- 800a03e: 2308 movs r3, #8
- 800a040: 77fb strb r3, [r7, #31]
- 800a042: e098 b.n 800a176 <UART_SetConfig+0x34e>
- 800a044: 2310 movs r3, #16
- 800a046: 77fb strb r3, [r7, #31]
- 800a048: bf00 nop
- 800a04a: e094 b.n 800a176 <UART_SetConfig+0x34e>
- 800a04c: 687b ldr r3, [r7, #4]
- 800a04e: 681b ldr r3, [r3, #0]
- 800a050: 4a39 ldr r2, [pc, #228] ; (800a138 <UART_SetConfig+0x310>)
- 800a052: 4293 cmp r3, r2
- 800a054: d124 bne.n 800a0a0 <UART_SetConfig+0x278>
- 800a056: 4b33 ldr r3, [pc, #204] ; (800a124 <UART_SetConfig+0x2fc>)
- 800a058: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 800a05c: f403 6340 and.w r3, r3, #3072 ; 0xc00
- 800a060: f5b3 6f80 cmp.w r3, #1024 ; 0x400
- 800a064: d012 beq.n 800a08c <UART_SetConfig+0x264>
- 800a066: f5b3 6f80 cmp.w r3, #1024 ; 0x400
- 800a06a: d802 bhi.n 800a072 <UART_SetConfig+0x24a>
- 800a06c: 2b00 cmp r3, #0
- 800a06e: d007 beq.n 800a080 <UART_SetConfig+0x258>
- 800a070: e012 b.n 800a098 <UART_SetConfig+0x270>
- 800a072: f5b3 6f00 cmp.w r3, #2048 ; 0x800
- 800a076: d006 beq.n 800a086 <UART_SetConfig+0x25e>
- 800a078: f5b3 6f40 cmp.w r3, #3072 ; 0xc00
- 800a07c: d009 beq.n 800a092 <UART_SetConfig+0x26a>
- 800a07e: e00b b.n 800a098 <UART_SetConfig+0x270>
- 800a080: 2301 movs r3, #1
- 800a082: 77fb strb r3, [r7, #31]
- 800a084: e077 b.n 800a176 <UART_SetConfig+0x34e>
- 800a086: 2302 movs r3, #2
- 800a088: 77fb strb r3, [r7, #31]
- 800a08a: e074 b.n 800a176 <UART_SetConfig+0x34e>
- 800a08c: 2304 movs r3, #4
- 800a08e: 77fb strb r3, [r7, #31]
- 800a090: e071 b.n 800a176 <UART_SetConfig+0x34e>
- 800a092: 2308 movs r3, #8
- 800a094: 77fb strb r3, [r7, #31]
- 800a096: e06e b.n 800a176 <UART_SetConfig+0x34e>
- 800a098: 2310 movs r3, #16
- 800a09a: 77fb strb r3, [r7, #31]
- 800a09c: bf00 nop
- 800a09e: e06a b.n 800a176 <UART_SetConfig+0x34e>
- 800a0a0: 687b ldr r3, [r7, #4]
- 800a0a2: 681b ldr r3, [r3, #0]
- 800a0a4: 4a25 ldr r2, [pc, #148] ; (800a13c <UART_SetConfig+0x314>)
- 800a0a6: 4293 cmp r3, r2
- 800a0a8: d124 bne.n 800a0f4 <UART_SetConfig+0x2cc>
- 800a0aa: 4b1e ldr r3, [pc, #120] ; (800a124 <UART_SetConfig+0x2fc>)
- 800a0ac: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 800a0b0: f403 5340 and.w r3, r3, #12288 ; 0x3000
- 800a0b4: f5b3 5f80 cmp.w r3, #4096 ; 0x1000
- 800a0b8: d012 beq.n 800a0e0 <UART_SetConfig+0x2b8>
- 800a0ba: f5b3 5f80 cmp.w r3, #4096 ; 0x1000
- 800a0be: d802 bhi.n 800a0c6 <UART_SetConfig+0x29e>
- 800a0c0: 2b00 cmp r3, #0
- 800a0c2: d007 beq.n 800a0d4 <UART_SetConfig+0x2ac>
- 800a0c4: e012 b.n 800a0ec <UART_SetConfig+0x2c4>
- 800a0c6: f5b3 5f00 cmp.w r3, #8192 ; 0x2000
- 800a0ca: d006 beq.n 800a0da <UART_SetConfig+0x2b2>
- 800a0cc: f5b3 5f40 cmp.w r3, #12288 ; 0x3000
- 800a0d0: d009 beq.n 800a0e6 <UART_SetConfig+0x2be>
- 800a0d2: e00b b.n 800a0ec <UART_SetConfig+0x2c4>
- 800a0d4: 2300 movs r3, #0
- 800a0d6: 77fb strb r3, [r7, #31]
- 800a0d8: e04d b.n 800a176 <UART_SetConfig+0x34e>
- 800a0da: 2302 movs r3, #2
- 800a0dc: 77fb strb r3, [r7, #31]
- 800a0de: e04a b.n 800a176 <UART_SetConfig+0x34e>
- 800a0e0: 2304 movs r3, #4
- 800a0e2: 77fb strb r3, [r7, #31]
- 800a0e4: e047 b.n 800a176 <UART_SetConfig+0x34e>
- 800a0e6: 2308 movs r3, #8
- 800a0e8: 77fb strb r3, [r7, #31]
- 800a0ea: e044 b.n 800a176 <UART_SetConfig+0x34e>
- 800a0ec: 2310 movs r3, #16
- 800a0ee: 77fb strb r3, [r7, #31]
- 800a0f0: bf00 nop
- 800a0f2: e040 b.n 800a176 <UART_SetConfig+0x34e>
- 800a0f4: 687b ldr r3, [r7, #4]
- 800a0f6: 681b ldr r3, [r3, #0]
- 800a0f8: 4a11 ldr r2, [pc, #68] ; (800a140 <UART_SetConfig+0x318>)
- 800a0fa: 4293 cmp r3, r2
- 800a0fc: d139 bne.n 800a172 <UART_SetConfig+0x34a>
- 800a0fe: 4b09 ldr r3, [pc, #36] ; (800a124 <UART_SetConfig+0x2fc>)
- 800a100: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 800a104: f403 4340 and.w r3, r3, #49152 ; 0xc000
- 800a108: f5b3 4f80 cmp.w r3, #16384 ; 0x4000
- 800a10c: d027 beq.n 800a15e <UART_SetConfig+0x336>
- 800a10e: f5b3 4f80 cmp.w r3, #16384 ; 0x4000
- 800a112: d817 bhi.n 800a144 <UART_SetConfig+0x31c>
- 800a114: 2b00 cmp r3, #0
- 800a116: d01c beq.n 800a152 <UART_SetConfig+0x32a>
- 800a118: e027 b.n 800a16a <UART_SetConfig+0x342>
- 800a11a: bf00 nop
- 800a11c: efff69f3 .word 0xefff69f3
- 800a120: 40011000 .word 0x40011000
- 800a124: 40023800 .word 0x40023800
- 800a128: 40004400 .word 0x40004400
- 800a12c: 40004800 .word 0x40004800
- 800a130: 40004c00 .word 0x40004c00
- 800a134: 40005000 .word 0x40005000
- 800a138: 40011400 .word 0x40011400
- 800a13c: 40007800 .word 0x40007800
- 800a140: 40007c00 .word 0x40007c00
- 800a144: f5b3 4f00 cmp.w r3, #32768 ; 0x8000
- 800a148: d006 beq.n 800a158 <UART_SetConfig+0x330>
- 800a14a: f5b3 4f40 cmp.w r3, #49152 ; 0xc000
- 800a14e: d009 beq.n 800a164 <UART_SetConfig+0x33c>
- 800a150: e00b b.n 800a16a <UART_SetConfig+0x342>
- 800a152: 2300 movs r3, #0
- 800a154: 77fb strb r3, [r7, #31]
- 800a156: e00e b.n 800a176 <UART_SetConfig+0x34e>
- 800a158: 2302 movs r3, #2
- 800a15a: 77fb strb r3, [r7, #31]
- 800a15c: e00b b.n 800a176 <UART_SetConfig+0x34e>
- 800a15e: 2304 movs r3, #4
- 800a160: 77fb strb r3, [r7, #31]
- 800a162: e008 b.n 800a176 <UART_SetConfig+0x34e>
- 800a164: 2308 movs r3, #8
- 800a166: 77fb strb r3, [r7, #31]
- 800a168: e005 b.n 800a176 <UART_SetConfig+0x34e>
- 800a16a: 2310 movs r3, #16
- 800a16c: 77fb strb r3, [r7, #31]
- 800a16e: bf00 nop
- 800a170: e001 b.n 800a176 <UART_SetConfig+0x34e>
- 800a172: 2310 movs r3, #16
- 800a174: 77fb strb r3, [r7, #31]
-
- if (huart->Init.OverSampling == UART_OVERSAMPLING_8)
- 800a176: 687b ldr r3, [r7, #4]
- 800a178: 69db ldr r3, [r3, #28]
- 800a17a: f5b3 4f00 cmp.w r3, #32768 ; 0x8000
- 800a17e: d17c bne.n 800a27a <UART_SetConfig+0x452>
- {
- switch (clocksource)
- 800a180: 7ffb ldrb r3, [r7, #31]
- 800a182: 2b08 cmp r3, #8
- 800a184: d859 bhi.n 800a23a <UART_SetConfig+0x412>
- 800a186: a201 add r2, pc, #4 ; (adr r2, 800a18c <UART_SetConfig+0x364>)
- 800a188: f852 f023 ldr.w pc, [r2, r3, lsl #2]
- 800a18c: 0800a1b1 .word 0x0800a1b1
- 800a190: 0800a1cf .word 0x0800a1cf
- 800a194: 0800a1ed .word 0x0800a1ed
- 800a198: 0800a23b .word 0x0800a23b
- 800a19c: 0800a205 .word 0x0800a205
- 800a1a0: 0800a23b .word 0x0800a23b
- 800a1a4: 0800a23b .word 0x0800a23b
- 800a1a8: 0800a23b .word 0x0800a23b
- 800a1ac: 0800a223 .word 0x0800a223
- {
- case UART_CLOCKSOURCE_PCLK1:
- usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate));
- 800a1b0: f7fe fed4 bl 8008f5c <HAL_RCC_GetPCLK1Freq>
- 800a1b4: 4603 mov r3, r0
- 800a1b6: 005a lsls r2, r3, #1
- 800a1b8: 687b ldr r3, [r7, #4]
- 800a1ba: 685b ldr r3, [r3, #4]
- 800a1bc: 085b lsrs r3, r3, #1
- 800a1be: 441a add r2, r3
- 800a1c0: 687b ldr r3, [r7, #4]
- 800a1c2: 685b ldr r3, [r3, #4]
- 800a1c4: fbb2 f3f3 udiv r3, r2, r3
- 800a1c8: b29b uxth r3, r3
- 800a1ca: 61bb str r3, [r7, #24]
- break;
- 800a1cc: e038 b.n 800a240 <UART_SetConfig+0x418>
- case UART_CLOCKSOURCE_PCLK2:
- usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate));
- 800a1ce: f7fe fed9 bl 8008f84 <HAL_RCC_GetPCLK2Freq>
- 800a1d2: 4603 mov r3, r0
- 800a1d4: 005a lsls r2, r3, #1
- 800a1d6: 687b ldr r3, [r7, #4]
- 800a1d8: 685b ldr r3, [r3, #4]
- 800a1da: 085b lsrs r3, r3, #1
- 800a1dc: 441a add r2, r3
- 800a1de: 687b ldr r3, [r7, #4]
- 800a1e0: 685b ldr r3, [r3, #4]
- 800a1e2: fbb2 f3f3 udiv r3, r2, r3
- 800a1e6: b29b uxth r3, r3
- 800a1e8: 61bb str r3, [r7, #24]
- break;
- 800a1ea: e029 b.n 800a240 <UART_SetConfig+0x418>
- case UART_CLOCKSOURCE_HSI:
- usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HSI_VALUE, huart->Init.BaudRate));
- 800a1ec: 687b ldr r3, [r7, #4]
- 800a1ee: 685b ldr r3, [r3, #4]
- 800a1f0: 085a lsrs r2, r3, #1
- 800a1f2: 4b5d ldr r3, [pc, #372] ; (800a368 <UART_SetConfig+0x540>)
- 800a1f4: 4413 add r3, r2
- 800a1f6: 687a ldr r2, [r7, #4]
- 800a1f8: 6852 ldr r2, [r2, #4]
- 800a1fa: fbb3 f3f2 udiv r3, r3, r2
- 800a1fe: b29b uxth r3, r3
- 800a200: 61bb str r3, [r7, #24]
- break;
- 800a202: e01d b.n 800a240 <UART_SetConfig+0x418>
- case UART_CLOCKSOURCE_SYSCLK:
- usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HAL_RCC_GetSysClockFreq(), huart->Init.BaudRate));
- 800a204: f7fe fdec bl 8008de0 <HAL_RCC_GetSysClockFreq>
- 800a208: 4603 mov r3, r0
- 800a20a: 005a lsls r2, r3, #1
- 800a20c: 687b ldr r3, [r7, #4]
- 800a20e: 685b ldr r3, [r3, #4]
- 800a210: 085b lsrs r3, r3, #1
- 800a212: 441a add r2, r3
- 800a214: 687b ldr r3, [r7, #4]
- 800a216: 685b ldr r3, [r3, #4]
- 800a218: fbb2 f3f3 udiv r3, r2, r3
- 800a21c: b29b uxth r3, r3
- 800a21e: 61bb str r3, [r7, #24]
- break;
- 800a220: e00e b.n 800a240 <UART_SetConfig+0x418>
- case UART_CLOCKSOURCE_LSE:
- usartdiv = (uint16_t)(UART_DIV_SAMPLING8(LSE_VALUE, huart->Init.BaudRate));
- 800a222: 687b ldr r3, [r7, #4]
- 800a224: 685b ldr r3, [r3, #4]
- 800a226: 085b lsrs r3, r3, #1
- 800a228: f503 3280 add.w r2, r3, #65536 ; 0x10000
- 800a22c: 687b ldr r3, [r7, #4]
- 800a22e: 685b ldr r3, [r3, #4]
- 800a230: fbb2 f3f3 udiv r3, r2, r3
- 800a234: b29b uxth r3, r3
- 800a236: 61bb str r3, [r7, #24]
- break;
- 800a238: e002 b.n 800a240 <UART_SetConfig+0x418>
- case UART_CLOCKSOURCE_UNDEFINED:
- default:
- ret = HAL_ERROR;
- 800a23a: 2301 movs r3, #1
- 800a23c: 75fb strb r3, [r7, #23]
- break;
- 800a23e: bf00 nop
- }
-
- /* USARTDIV must be greater than or equal to 0d16 */
- if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
- 800a240: 69bb ldr r3, [r7, #24]
- 800a242: 2b0f cmp r3, #15
- 800a244: d916 bls.n 800a274 <UART_SetConfig+0x44c>
- 800a246: 69bb ldr r3, [r7, #24]
- 800a248: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
- 800a24c: d212 bcs.n 800a274 <UART_SetConfig+0x44c>
- {
- brrtemp = (uint16_t)(usartdiv & 0xFFF0U);
- 800a24e: 69bb ldr r3, [r7, #24]
- 800a250: b29b uxth r3, r3
- 800a252: f023 030f bic.w r3, r3, #15
- 800a256: 81fb strh r3, [r7, #14]
- brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U);
- 800a258: 69bb ldr r3, [r7, #24]
- 800a25a: 085b lsrs r3, r3, #1
- 800a25c: b29b uxth r3, r3
- 800a25e: f003 0307 and.w r3, r3, #7
- 800a262: b29a uxth r2, r3
- 800a264: 89fb ldrh r3, [r7, #14]
- 800a266: 4313 orrs r3, r2
- 800a268: 81fb strh r3, [r7, #14]
- huart->Instance->BRR = brrtemp;
- 800a26a: 687b ldr r3, [r7, #4]
- 800a26c: 681b ldr r3, [r3, #0]
- 800a26e: 89fa ldrh r2, [r7, #14]
- 800a270: 60da str r2, [r3, #12]
- 800a272: e06e b.n 800a352 <UART_SetConfig+0x52a>
- }
- else
- {
- ret = HAL_ERROR;
- 800a274: 2301 movs r3, #1
- 800a276: 75fb strb r3, [r7, #23]
- 800a278: e06b b.n 800a352 <UART_SetConfig+0x52a>
- }
- }
- else
- {
- switch (clocksource)
- 800a27a: 7ffb ldrb r3, [r7, #31]
- 800a27c: 2b08 cmp r3, #8
- 800a27e: d857 bhi.n 800a330 <UART_SetConfig+0x508>
- 800a280: a201 add r2, pc, #4 ; (adr r2, 800a288 <UART_SetConfig+0x460>)
- 800a282: f852 f023 ldr.w pc, [r2, r3, lsl #2]
- 800a286: bf00 nop
- 800a288: 0800a2ad .word 0x0800a2ad
- 800a28c: 0800a2c9 .word 0x0800a2c9
- 800a290: 0800a2e5 .word 0x0800a2e5
- 800a294: 0800a331 .word 0x0800a331
- 800a298: 0800a2fd .word 0x0800a2fd
- 800a29c: 0800a331 .word 0x0800a331
- 800a2a0: 0800a331 .word 0x0800a331
- 800a2a4: 0800a331 .word 0x0800a331
- 800a2a8: 0800a319 .word 0x0800a319
- {
- case UART_CLOCKSOURCE_PCLK1:
- usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate));
- 800a2ac: f7fe fe56 bl 8008f5c <HAL_RCC_GetPCLK1Freq>
- 800a2b0: 4602 mov r2, r0
- 800a2b2: 687b ldr r3, [r7, #4]
- 800a2b4: 685b ldr r3, [r3, #4]
- 800a2b6: 085b lsrs r3, r3, #1
- 800a2b8: 441a add r2, r3
- 800a2ba: 687b ldr r3, [r7, #4]
- 800a2bc: 685b ldr r3, [r3, #4]
- 800a2be: fbb2 f3f3 udiv r3, r2, r3
- 800a2c2: b29b uxth r3, r3
- 800a2c4: 61bb str r3, [r7, #24]
- break;
- 800a2c6: e036 b.n 800a336 <UART_SetConfig+0x50e>
- case UART_CLOCKSOURCE_PCLK2:
- usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate));
- 800a2c8: f7fe fe5c bl 8008f84 <HAL_RCC_GetPCLK2Freq>
- 800a2cc: 4602 mov r2, r0
- 800a2ce: 687b ldr r3, [r7, #4]
- 800a2d0: 685b ldr r3, [r3, #4]
- 800a2d2: 085b lsrs r3, r3, #1
- 800a2d4: 441a add r2, r3
- 800a2d6: 687b ldr r3, [r7, #4]
- 800a2d8: 685b ldr r3, [r3, #4]
- 800a2da: fbb2 f3f3 udiv r3, r2, r3
- 800a2de: b29b uxth r3, r3
- 800a2e0: 61bb str r3, [r7, #24]
- break;
- 800a2e2: e028 b.n 800a336 <UART_SetConfig+0x50e>
- case UART_CLOCKSOURCE_HSI:
- usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HSI_VALUE, huart->Init.BaudRate));
- 800a2e4: 687b ldr r3, [r7, #4]
- 800a2e6: 685b ldr r3, [r3, #4]
- 800a2e8: 085a lsrs r2, r3, #1
- 800a2ea: 4b20 ldr r3, [pc, #128] ; (800a36c <UART_SetConfig+0x544>)
- 800a2ec: 4413 add r3, r2
- 800a2ee: 687a ldr r2, [r7, #4]
- 800a2f0: 6852 ldr r2, [r2, #4]
- 800a2f2: fbb3 f3f2 udiv r3, r3, r2
- 800a2f6: b29b uxth r3, r3
- 800a2f8: 61bb str r3, [r7, #24]
- break;
- 800a2fa: e01c b.n 800a336 <UART_SetConfig+0x50e>
- case UART_CLOCKSOURCE_SYSCLK:
- usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetSysClockFreq(), huart->Init.BaudRate));
- 800a2fc: f7fe fd70 bl 8008de0 <HAL_RCC_GetSysClockFreq>
- 800a300: 4602 mov r2, r0
- 800a302: 687b ldr r3, [r7, #4]
- 800a304: 685b ldr r3, [r3, #4]
- 800a306: 085b lsrs r3, r3, #1
- 800a308: 441a add r2, r3
- 800a30a: 687b ldr r3, [r7, #4]
- 800a30c: 685b ldr r3, [r3, #4]
- 800a30e: fbb2 f3f3 udiv r3, r2, r3
- 800a312: b29b uxth r3, r3
- 800a314: 61bb str r3, [r7, #24]
- break;
- 800a316: e00e b.n 800a336 <UART_SetConfig+0x50e>
- case UART_CLOCKSOURCE_LSE:
- usartdiv = (uint16_t)(UART_DIV_SAMPLING16(LSE_VALUE, huart->Init.BaudRate));
- 800a318: 687b ldr r3, [r7, #4]
- 800a31a: 685b ldr r3, [r3, #4]
- 800a31c: 085b lsrs r3, r3, #1
- 800a31e: f503 4200 add.w r2, r3, #32768 ; 0x8000
- 800a322: 687b ldr r3, [r7, #4]
- 800a324: 685b ldr r3, [r3, #4]
- 800a326: fbb2 f3f3 udiv r3, r2, r3
- 800a32a: b29b uxth r3, r3
- 800a32c: 61bb str r3, [r7, #24]
- break;
- 800a32e: e002 b.n 800a336 <UART_SetConfig+0x50e>
- case UART_CLOCKSOURCE_UNDEFINED:
- default:
- ret = HAL_ERROR;
- 800a330: 2301 movs r3, #1
- 800a332: 75fb strb r3, [r7, #23]
- break;
- 800a334: bf00 nop
- }
-
- /* USARTDIV must be greater than or equal to 0d16 */
- if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
- 800a336: 69bb ldr r3, [r7, #24]
- 800a338: 2b0f cmp r3, #15
- 800a33a: d908 bls.n 800a34e <UART_SetConfig+0x526>
- 800a33c: 69bb ldr r3, [r7, #24]
- 800a33e: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
- 800a342: d204 bcs.n 800a34e <UART_SetConfig+0x526>
- {
- huart->Instance->BRR = usartdiv;
- 800a344: 687b ldr r3, [r7, #4]
- 800a346: 681b ldr r3, [r3, #0]
- 800a348: 69ba ldr r2, [r7, #24]
- 800a34a: 60da str r2, [r3, #12]
- 800a34c: e001 b.n 800a352 <UART_SetConfig+0x52a>
- }
- else
- {
- ret = HAL_ERROR;
- 800a34e: 2301 movs r3, #1
- 800a350: 75fb strb r3, [r7, #23]
- }
- }
-
-
- /* Clear ISR function pointers */
- huart->RxISR = NULL;
- 800a352: 687b ldr r3, [r7, #4]
- 800a354: 2200 movs r2, #0
- 800a356: 661a str r2, [r3, #96] ; 0x60
- huart->TxISR = NULL;
- 800a358: 687b ldr r3, [r7, #4]
- 800a35a: 2200 movs r2, #0
- 800a35c: 665a str r2, [r3, #100] ; 0x64
-
- return ret;
- 800a35e: 7dfb ldrb r3, [r7, #23]
-}
- 800a360: 4618 mov r0, r3
- 800a362: 3720 adds r7, #32
- 800a364: 46bd mov sp, r7
- 800a366: bd80 pop {r7, pc}
- 800a368: 01e84800 .word 0x01e84800
- 800a36c: 00f42400 .word 0x00f42400
-
-0800a370 <UART_AdvFeatureConfig>:
- * @brief Configure the UART peripheral advanced features.
- * @param huart UART handle.
- * @retval None
- */
-void UART_AdvFeatureConfig(UART_HandleTypeDef *huart)
-{
- 800a370: b480 push {r7}
- 800a372: b083 sub sp, #12
- 800a374: af00 add r7, sp, #0
- 800a376: 6078 str r0, [r7, #4]
- /* Check whether the set of advanced features to configure is properly set */
- assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit));
-
- /* if required, configure TX pin active level inversion */
- if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT))
- 800a378: 687b ldr r3, [r7, #4]
- 800a37a: 6a5b ldr r3, [r3, #36] ; 0x24
- 800a37c: f003 0301 and.w r3, r3, #1
- 800a380: 2b00 cmp r3, #0
- 800a382: d00a beq.n 800a39a <UART_AdvFeatureConfig+0x2a>
- {
- assert_param(IS_UART_ADVFEATURE_TXINV(huart->AdvancedInit.TxPinLevelInvert));
- MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert);
- 800a384: 687b ldr r3, [r7, #4]
- 800a386: 681b ldr r3, [r3, #0]
- 800a388: 685b ldr r3, [r3, #4]
- 800a38a: f423 3100 bic.w r1, r3, #131072 ; 0x20000
- 800a38e: 687b ldr r3, [r7, #4]
- 800a390: 6a9a ldr r2, [r3, #40] ; 0x28
- 800a392: 687b ldr r3, [r7, #4]
- 800a394: 681b ldr r3, [r3, #0]
- 800a396: 430a orrs r2, r1
- 800a398: 605a str r2, [r3, #4]
- }
-
- /* if required, configure RX pin active level inversion */
- if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXINVERT_INIT))
- 800a39a: 687b ldr r3, [r7, #4]
- 800a39c: 6a5b ldr r3, [r3, #36] ; 0x24
- 800a39e: f003 0302 and.w r3, r3, #2
- 800a3a2: 2b00 cmp r3, #0
- 800a3a4: d00a beq.n 800a3bc <UART_AdvFeatureConfig+0x4c>
- {
- assert_param(IS_UART_ADVFEATURE_RXINV(huart->AdvancedInit.RxPinLevelInvert));
- MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert);
- 800a3a6: 687b ldr r3, [r7, #4]
- 800a3a8: 681b ldr r3, [r3, #0]
- 800a3aa: 685b ldr r3, [r3, #4]
- 800a3ac: f423 3180 bic.w r1, r3, #65536 ; 0x10000
- 800a3b0: 687b ldr r3, [r7, #4]
- 800a3b2: 6ada ldr r2, [r3, #44] ; 0x2c
- 800a3b4: 687b ldr r3, [r7, #4]
- 800a3b6: 681b ldr r3, [r3, #0]
- 800a3b8: 430a orrs r2, r1
- 800a3ba: 605a str r2, [r3, #4]
- }
-
- /* if required, configure data inversion */
- if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DATAINVERT_INIT))
- 800a3bc: 687b ldr r3, [r7, #4]
- 800a3be: 6a5b ldr r3, [r3, #36] ; 0x24
- 800a3c0: f003 0304 and.w r3, r3, #4
- 800a3c4: 2b00 cmp r3, #0
- 800a3c6: d00a beq.n 800a3de <UART_AdvFeatureConfig+0x6e>
- {
- assert_param(IS_UART_ADVFEATURE_DATAINV(huart->AdvancedInit.DataInvert));
- MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert);
- 800a3c8: 687b ldr r3, [r7, #4]
- 800a3ca: 681b ldr r3, [r3, #0]
- 800a3cc: 685b ldr r3, [r3, #4]
- 800a3ce: f423 2180 bic.w r1, r3, #262144 ; 0x40000
- 800a3d2: 687b ldr r3, [r7, #4]
- 800a3d4: 6b1a ldr r2, [r3, #48] ; 0x30
- 800a3d6: 687b ldr r3, [r7, #4]
- 800a3d8: 681b ldr r3, [r3, #0]
- 800a3da: 430a orrs r2, r1
- 800a3dc: 605a str r2, [r3, #4]
- }
-
- /* if required, configure RX/TX pins swap */
- if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT))
- 800a3de: 687b ldr r3, [r7, #4]
- 800a3e0: 6a5b ldr r3, [r3, #36] ; 0x24
- 800a3e2: f003 0308 and.w r3, r3, #8
- 800a3e6: 2b00 cmp r3, #0
- 800a3e8: d00a beq.n 800a400 <UART_AdvFeatureConfig+0x90>
- {
- assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap));
- MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap);
- 800a3ea: 687b ldr r3, [r7, #4]
- 800a3ec: 681b ldr r3, [r3, #0]
- 800a3ee: 685b ldr r3, [r3, #4]
- 800a3f0: f423 4100 bic.w r1, r3, #32768 ; 0x8000
- 800a3f4: 687b ldr r3, [r7, #4]
- 800a3f6: 6b5a ldr r2, [r3, #52] ; 0x34
- 800a3f8: 687b ldr r3, [r7, #4]
- 800a3fa: 681b ldr r3, [r3, #0]
- 800a3fc: 430a orrs r2, r1
- 800a3fe: 605a str r2, [r3, #4]
- }
-
- /* if required, configure RX overrun detection disabling */
- if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT))
- 800a400: 687b ldr r3, [r7, #4]
- 800a402: 6a5b ldr r3, [r3, #36] ; 0x24
- 800a404: f003 0310 and.w r3, r3, #16
- 800a408: 2b00 cmp r3, #0
- 800a40a: d00a beq.n 800a422 <UART_AdvFeatureConfig+0xb2>
- {
- assert_param(IS_UART_OVERRUN(huart->AdvancedInit.OverrunDisable));
- MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable);
- 800a40c: 687b ldr r3, [r7, #4]
- 800a40e: 681b ldr r3, [r3, #0]
- 800a410: 689b ldr r3, [r3, #8]
- 800a412: f423 5180 bic.w r1, r3, #4096 ; 0x1000
- 800a416: 687b ldr r3, [r7, #4]
- 800a418: 6b9a ldr r2, [r3, #56] ; 0x38
- 800a41a: 687b ldr r3, [r7, #4]
- 800a41c: 681b ldr r3, [r3, #0]
- 800a41e: 430a orrs r2, r1
- 800a420: 609a str r2, [r3, #8]
- }
-
- /* if required, configure DMA disabling on reception error */
- if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DMADISABLEONERROR_INIT))
- 800a422: 687b ldr r3, [r7, #4]
- 800a424: 6a5b ldr r3, [r3, #36] ; 0x24
- 800a426: f003 0320 and.w r3, r3, #32
- 800a42a: 2b00 cmp r3, #0
- 800a42c: d00a beq.n 800a444 <UART_AdvFeatureConfig+0xd4>
- {
- assert_param(IS_UART_ADVFEATURE_DMAONRXERROR(huart->AdvancedInit.DMADisableonRxError));
- MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError);
- 800a42e: 687b ldr r3, [r7, #4]
- 800a430: 681b ldr r3, [r3, #0]
- 800a432: 689b ldr r3, [r3, #8]
- 800a434: f423 5100 bic.w r1, r3, #8192 ; 0x2000
- 800a438: 687b ldr r3, [r7, #4]
- 800a43a: 6bda ldr r2, [r3, #60] ; 0x3c
- 800a43c: 687b ldr r3, [r7, #4]
- 800a43e: 681b ldr r3, [r3, #0]
- 800a440: 430a orrs r2, r1
- 800a442: 609a str r2, [r3, #8]
- }
-
- /* if required, configure auto Baud rate detection scheme */
- if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_AUTOBAUDRATE_INIT))
- 800a444: 687b ldr r3, [r7, #4]
- 800a446: 6a5b ldr r3, [r3, #36] ; 0x24
- 800a448: f003 0340 and.w r3, r3, #64 ; 0x40
- 800a44c: 2b00 cmp r3, #0
- 800a44e: d01a beq.n 800a486 <UART_AdvFeatureConfig+0x116>
- {
- assert_param(IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(huart->Instance));
- assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATE(huart->AdvancedInit.AutoBaudRateEnable));
- MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable);
- 800a450: 687b ldr r3, [r7, #4]
- 800a452: 681b ldr r3, [r3, #0]
- 800a454: 685b ldr r3, [r3, #4]
- 800a456: f423 1180 bic.w r1, r3, #1048576 ; 0x100000
- 800a45a: 687b ldr r3, [r7, #4]
- 800a45c: 6c1a ldr r2, [r3, #64] ; 0x40
- 800a45e: 687b ldr r3, [r7, #4]
- 800a460: 681b ldr r3, [r3, #0]
- 800a462: 430a orrs r2, r1
- 800a464: 605a str r2, [r3, #4]
- /* set auto Baudrate detection parameters if detection is enabled */
- if (huart->AdvancedInit.AutoBaudRateEnable == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)
- 800a466: 687b ldr r3, [r7, #4]
- 800a468: 6c1b ldr r3, [r3, #64] ; 0x40
- 800a46a: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000
- 800a46e: d10a bne.n 800a486 <UART_AdvFeatureConfig+0x116>
- {
- assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(huart->AdvancedInit.AutoBaudRateMode));
- MODIFY_REG(huart->Instance->CR2, USART_CR2_ABRMODE, huart->AdvancedInit.AutoBaudRateMode);
- 800a470: 687b ldr r3, [r7, #4]
- 800a472: 681b ldr r3, [r3, #0]
- 800a474: 685b ldr r3, [r3, #4]
- 800a476: f423 01c0 bic.w r1, r3, #6291456 ; 0x600000
- 800a47a: 687b ldr r3, [r7, #4]
- 800a47c: 6c5a ldr r2, [r3, #68] ; 0x44
- 800a47e: 687b ldr r3, [r7, #4]
- 800a480: 681b ldr r3, [r3, #0]
- 800a482: 430a orrs r2, r1
- 800a484: 605a str r2, [r3, #4]
- }
- }
-
- /* if required, configure MSB first on communication line */
- if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_MSBFIRST_INIT))
- 800a486: 687b ldr r3, [r7, #4]
- 800a488: 6a5b ldr r3, [r3, #36] ; 0x24
- 800a48a: f003 0380 and.w r3, r3, #128 ; 0x80
- 800a48e: 2b00 cmp r3, #0
- 800a490: d00a beq.n 800a4a8 <UART_AdvFeatureConfig+0x138>
- {
- assert_param(IS_UART_ADVFEATURE_MSBFIRST(huart->AdvancedInit.MSBFirst));
- MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst);
- 800a492: 687b ldr r3, [r7, #4]
- 800a494: 681b ldr r3, [r3, #0]
- 800a496: 685b ldr r3, [r3, #4]
- 800a498: f423 2100 bic.w r1, r3, #524288 ; 0x80000
- 800a49c: 687b ldr r3, [r7, #4]
- 800a49e: 6c9a ldr r2, [r3, #72] ; 0x48
- 800a4a0: 687b ldr r3, [r7, #4]
- 800a4a2: 681b ldr r3, [r3, #0]
- 800a4a4: 430a orrs r2, r1
- 800a4a6: 605a str r2, [r3, #4]
- }
-}
- 800a4a8: bf00 nop
- 800a4aa: 370c adds r7, #12
- 800a4ac: 46bd mov sp, r7
- 800a4ae: f85d 7b04 ldr.w r7, [sp], #4
- 800a4b2: 4770 bx lr
-
-0800a4b4 <UART_CheckIdleState>:
- * @brief Check the UART Idle State.
- * @param huart UART handle.
- * @retval HAL status
- */
-HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart)
-{
- 800a4b4: b580 push {r7, lr}
- 800a4b6: b086 sub sp, #24
- 800a4b8: af02 add r7, sp, #8
- 800a4ba: 6078 str r0, [r7, #4]
- uint32_t tickstart;
-
- /* Initialize the UART ErrorCode */
- huart->ErrorCode = HAL_UART_ERROR_NONE;
- 800a4bc: 687b ldr r3, [r7, #4]
- 800a4be: 2200 movs r2, #0
- 800a4c0: 67da str r2, [r3, #124] ; 0x7c
-
- /* Init tickstart for timeout managment*/
- tickstart = HAL_GetTick();
- 800a4c2: f7fd fde7 bl 8008094 <HAL_GetTick>
- 800a4c6: 60f8 str r0, [r7, #12]
-
- /* Check if the Transmitter is enabled */
- if ((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE)
- 800a4c8: 687b ldr r3, [r7, #4]
- 800a4ca: 681b ldr r3, [r3, #0]
- 800a4cc: 681b ldr r3, [r3, #0]
- 800a4ce: f003 0308 and.w r3, r3, #8
- 800a4d2: 2b08 cmp r3, #8
- 800a4d4: d10e bne.n 800a4f4 <UART_CheckIdleState+0x40>
- {
- /* Wait until TEACK flag is set */
- if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
- 800a4d6: f06f 437e mvn.w r3, #4261412864 ; 0xfe000000
- 800a4da: 9300 str r3, [sp, #0]
- 800a4dc: 68fb ldr r3, [r7, #12]
- 800a4de: 2200 movs r2, #0
- 800a4e0: f44f 1100 mov.w r1, #2097152 ; 0x200000
- 800a4e4: 6878 ldr r0, [r7, #4]
- 800a4e6: f000 f814 bl 800a512 <UART_WaitOnFlagUntilTimeout>
- 800a4ea: 4603 mov r3, r0
- 800a4ec: 2b00 cmp r3, #0
- 800a4ee: d001 beq.n 800a4f4 <UART_CheckIdleState+0x40>
- {
- /* Timeout occurred */
- return HAL_TIMEOUT;
- 800a4f0: 2303 movs r3, #3
- 800a4f2: e00a b.n 800a50a <UART_CheckIdleState+0x56>
- }
- }
-
- /* Initialize the UART State */
- huart->gState = HAL_UART_STATE_READY;
- 800a4f4: 687b ldr r3, [r7, #4]
- 800a4f6: 2220 movs r2, #32
- 800a4f8: 675a str r2, [r3, #116] ; 0x74
- huart->RxState = HAL_UART_STATE_READY;
- 800a4fa: 687b ldr r3, [r7, #4]
- 800a4fc: 2220 movs r2, #32
- 800a4fe: 679a str r2, [r3, #120] ; 0x78
-
- /* Process Unlocked */
- __HAL_UNLOCK(huart);
- 800a500: 687b ldr r3, [r7, #4]
- 800a502: 2200 movs r2, #0
- 800a504: f883 2070 strb.w r2, [r3, #112] ; 0x70
-
- return HAL_OK;
- 800a508: 2300 movs r3, #0
-}
- 800a50a: 4618 mov r0, r3
- 800a50c: 3710 adds r7, #16
- 800a50e: 46bd mov sp, r7
- 800a510: bd80 pop {r7, pc}
-
-0800a512 <UART_WaitOnFlagUntilTimeout>:
- * @param Tickstart Tick start value
- * @param Timeout Timeout duration
- * @retval HAL status
- */
-HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout)
-{
- 800a512: b580 push {r7, lr}
- 800a514: b084 sub sp, #16
- 800a516: af00 add r7, sp, #0
- 800a518: 60f8 str r0, [r7, #12]
- 800a51a: 60b9 str r1, [r7, #8]
- 800a51c: 603b str r3, [r7, #0]
- 800a51e: 4613 mov r3, r2
- 800a520: 71fb strb r3, [r7, #7]
- /* Wait until flag is set */
- while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
- 800a522: e02a b.n 800a57a <UART_WaitOnFlagUntilTimeout+0x68>
- {
- /* Check for the Timeout */
- if (Timeout != HAL_MAX_DELAY)
- 800a524: 69bb ldr r3, [r7, #24]
- 800a526: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff
- 800a52a: d026 beq.n 800a57a <UART_WaitOnFlagUntilTimeout+0x68>
- {
- if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
- 800a52c: f7fd fdb2 bl 8008094 <HAL_GetTick>
- 800a530: 4602 mov r2, r0
- 800a532: 683b ldr r3, [r7, #0]
- 800a534: 1ad3 subs r3, r2, r3
- 800a536: 69ba ldr r2, [r7, #24]
- 800a538: 429a cmp r2, r3
- 800a53a: d302 bcc.n 800a542 <UART_WaitOnFlagUntilTimeout+0x30>
- 800a53c: 69bb ldr r3, [r7, #24]
- 800a53e: 2b00 cmp r3, #0
- 800a540: d11b bne.n 800a57a <UART_WaitOnFlagUntilTimeout+0x68>
- {
- /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
- CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
- 800a542: 68fb ldr r3, [r7, #12]
- 800a544: 681b ldr r3, [r3, #0]
- 800a546: 681a ldr r2, [r3, #0]
- 800a548: 68fb ldr r3, [r7, #12]
- 800a54a: 681b ldr r3, [r3, #0]
- 800a54c: f422 72d0 bic.w r2, r2, #416 ; 0x1a0
- 800a550: 601a str r2, [r3, #0]
- CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
- 800a552: 68fb ldr r3, [r7, #12]
- 800a554: 681b ldr r3, [r3, #0]
- 800a556: 689a ldr r2, [r3, #8]
- 800a558: 68fb ldr r3, [r7, #12]
- 800a55a: 681b ldr r3, [r3, #0]
- 800a55c: f022 0201 bic.w r2, r2, #1
- 800a560: 609a str r2, [r3, #8]
-
- huart->gState = HAL_UART_STATE_READY;
- 800a562: 68fb ldr r3, [r7, #12]
- 800a564: 2220 movs r2, #32
- 800a566: 675a str r2, [r3, #116] ; 0x74
- huart->RxState = HAL_UART_STATE_READY;
- 800a568: 68fb ldr r3, [r7, #12]
- 800a56a: 2220 movs r2, #32
- 800a56c: 679a str r2, [r3, #120] ; 0x78
-
- /* Process Unlocked */
- __HAL_UNLOCK(huart);
- 800a56e: 68fb ldr r3, [r7, #12]
- 800a570: 2200 movs r2, #0
- 800a572: f883 2070 strb.w r2, [r3, #112] ; 0x70
-
- return HAL_TIMEOUT;
- 800a576: 2303 movs r3, #3
- 800a578: e00f b.n 800a59a <UART_WaitOnFlagUntilTimeout+0x88>
- while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
- 800a57a: 68fb ldr r3, [r7, #12]
- 800a57c: 681b ldr r3, [r3, #0]
- 800a57e: 69da ldr r2, [r3, #28]
- 800a580: 68bb ldr r3, [r7, #8]
- 800a582: 4013 ands r3, r2
- 800a584: 68ba ldr r2, [r7, #8]
- 800a586: 429a cmp r2, r3
- 800a588: bf0c ite eq
- 800a58a: 2301 moveq r3, #1
- 800a58c: 2300 movne r3, #0
- 800a58e: b2db uxtb r3, r3
- 800a590: 461a mov r2, r3
- 800a592: 79fb ldrb r3, [r7, #7]
- 800a594: 429a cmp r2, r3
- 800a596: d0c5 beq.n 800a524 <UART_WaitOnFlagUntilTimeout+0x12>
- }
- }
- }
- return HAL_OK;
- 800a598: 2300 movs r3, #0
-}
- 800a59a: 4618 mov r0, r3
- 800a59c: 3710 adds r7, #16
- 800a59e: 46bd mov sp, r7
- 800a5a0: bd80 pop {r7, pc}
-
-0800a5a2 <UART_EndTxTransfer>:
- * @brief End ongoing Tx transfer on UART peripheral (following error detection or Transmit completion).
- * @param huart UART handle.
- * @retval None
- */
-static void UART_EndTxTransfer(UART_HandleTypeDef *huart)
-{
- 800a5a2: b480 push {r7}
- 800a5a4: b083 sub sp, #12
- 800a5a6: af00 add r7, sp, #0
- 800a5a8: 6078 str r0, [r7, #4]
- /* Disable TXEIE and TCIE interrupts */
- CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
- 800a5aa: 687b ldr r3, [r7, #4]
- 800a5ac: 681b ldr r3, [r3, #0]
- 800a5ae: 681a ldr r2, [r3, #0]
- 800a5b0: 687b ldr r3, [r7, #4]
- 800a5b2: 681b ldr r3, [r3, #0]
- 800a5b4: f022 02c0 bic.w r2, r2, #192 ; 0xc0
- 800a5b8: 601a str r2, [r3, #0]
-
- /* At end of Tx process, restore huart->gState to Ready */
- huart->gState = HAL_UART_STATE_READY;
- 800a5ba: 687b ldr r3, [r7, #4]
- 800a5bc: 2220 movs r2, #32
- 800a5be: 675a str r2, [r3, #116] ; 0x74
-}
- 800a5c0: bf00 nop
- 800a5c2: 370c adds r7, #12
- 800a5c4: 46bd mov sp, r7
- 800a5c6: f85d 7b04 ldr.w r7, [sp], #4
- 800a5ca: 4770 bx lr
-
-0800a5cc <UART_EndRxTransfer>:
- * @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion).
- * @param huart UART handle.
- * @retval None
- */
-static void UART_EndRxTransfer(UART_HandleTypeDef *huart)
-{
- 800a5cc: b480 push {r7}
- 800a5ce: b083 sub sp, #12
- 800a5d0: af00 add r7, sp, #0
- 800a5d2: 6078 str r0, [r7, #4]
- /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
- CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
- 800a5d4: 687b ldr r3, [r7, #4]
- 800a5d6: 681b ldr r3, [r3, #0]
- 800a5d8: 681a ldr r2, [r3, #0]
- 800a5da: 687b ldr r3, [r7, #4]
- 800a5dc: 681b ldr r3, [r3, #0]
- 800a5de: f422 7290 bic.w r2, r2, #288 ; 0x120
- 800a5e2: 601a str r2, [r3, #0]
- CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
- 800a5e4: 687b ldr r3, [r7, #4]
- 800a5e6: 681b ldr r3, [r3, #0]
- 800a5e8: 689a ldr r2, [r3, #8]
- 800a5ea: 687b ldr r3, [r7, #4]
- 800a5ec: 681b ldr r3, [r3, #0]
- 800a5ee: f022 0201 bic.w r2, r2, #1
- 800a5f2: 609a str r2, [r3, #8]
-
- /* At end of Rx process, restore huart->RxState to Ready */
- huart->RxState = HAL_UART_STATE_READY;
- 800a5f4: 687b ldr r3, [r7, #4]
- 800a5f6: 2220 movs r2, #32
- 800a5f8: 679a str r2, [r3, #120] ; 0x78
-
- /* Reset RxIsr function pointer */
- huart->RxISR = NULL;
- 800a5fa: 687b ldr r3, [r7, #4]
- 800a5fc: 2200 movs r2, #0
- 800a5fe: 661a str r2, [r3, #96] ; 0x60
-}
- 800a600: bf00 nop
- 800a602: 370c adds r7, #12
- 800a604: 46bd mov sp, r7
- 800a606: f85d 7b04 ldr.w r7, [sp], #4
- 800a60a: 4770 bx lr
-
-0800a60c <UART_DMATransmitCplt>:
- * @brief DMA UART transmit process complete callback.
- * @param hdma DMA handle.
- * @retval None
- */
-static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma)
-{
- 800a60c: b580 push {r7, lr}
- 800a60e: b084 sub sp, #16
- 800a610: af00 add r7, sp, #0
- 800a612: 6078 str r0, [r7, #4]
- UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
- 800a614: 687b ldr r3, [r7, #4]
- 800a616: 6b9b ldr r3, [r3, #56] ; 0x38
- 800a618: 60fb str r3, [r7, #12]
-
- /* DMA Normal mode */
- if (hdma->Init.Mode != DMA_CIRCULAR)
- 800a61a: 687b ldr r3, [r7, #4]
- 800a61c: 69db ldr r3, [r3, #28]
- 800a61e: f5b3 7f80 cmp.w r3, #256 ; 0x100
- 800a622: d014 beq.n 800a64e <UART_DMATransmitCplt+0x42>
- {
- huart->TxXferCount = 0U;
- 800a624: 68fb ldr r3, [r7, #12]
- 800a626: 2200 movs r2, #0
- 800a628: f8a3 2052 strh.w r2, [r3, #82] ; 0x52
-
- /* Disable the DMA transfer for transmit request by resetting the DMAT bit
- in the UART CR3 register */
- CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
- 800a62c: 68fb ldr r3, [r7, #12]
- 800a62e: 681b ldr r3, [r3, #0]
- 800a630: 689a ldr r2, [r3, #8]
- 800a632: 68fb ldr r3, [r7, #12]
- 800a634: 681b ldr r3, [r3, #0]
- 800a636: f022 0280 bic.w r2, r2, #128 ; 0x80
- 800a63a: 609a str r2, [r3, #8]
-
- /* Enable the UART Transmit Complete Interrupt */
- SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
- 800a63c: 68fb ldr r3, [r7, #12]
- 800a63e: 681b ldr r3, [r3, #0]
- 800a640: 681a ldr r2, [r3, #0]
- 800a642: 68fb ldr r3, [r7, #12]
- 800a644: 681b ldr r3, [r3, #0]
- 800a646: f042 0240 orr.w r2, r2, #64 ; 0x40
- 800a64a: 601a str r2, [r3, #0]
-#else
- /*Call legacy weak Tx complete callback*/
- HAL_UART_TxCpltCallback(huart);
-#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
- }
-}
- 800a64c: e002 b.n 800a654 <UART_DMATransmitCplt+0x48>
- HAL_UART_TxCpltCallback(huart);
- 800a64e: 68f8 ldr r0, [r7, #12]
- 800a650: f7ff fbb8 bl 8009dc4 <HAL_UART_TxCpltCallback>
-}
- 800a654: bf00 nop
- 800a656: 3710 adds r7, #16
- 800a658: 46bd mov sp, r7
- 800a65a: bd80 pop {r7, pc}
-
-0800a65c <UART_DMATxHalfCplt>:
- * @brief DMA UART transmit process half complete callback.
- * @param hdma DMA handle.
- * @retval None
- */
-static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
-{
- 800a65c: b580 push {r7, lr}
- 800a65e: b084 sub sp, #16
- 800a660: af00 add r7, sp, #0
- 800a662: 6078 str r0, [r7, #4]
- UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
- 800a664: 687b ldr r3, [r7, #4]
- 800a666: 6b9b ldr r3, [r3, #56] ; 0x38
- 800a668: 60fb str r3, [r7, #12]
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /*Call registered Tx Half complete callback*/
- huart->TxHalfCpltCallback(huart);
-#else
- /*Call legacy weak Tx Half complete callback*/
- HAL_UART_TxHalfCpltCallback(huart);
- 800a66a: 68f8 ldr r0, [r7, #12]
- 800a66c: f7ff fbb4 bl 8009dd8 <HAL_UART_TxHalfCpltCallback>
-#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
-}
- 800a670: bf00 nop
- 800a672: 3710 adds r7, #16
- 800a674: 46bd mov sp, r7
- 800a676: bd80 pop {r7, pc}
-
-0800a678 <UART_DMAReceiveCplt>:
- * @brief DMA UART receive process complete callback.
- * @param hdma DMA handle.
- * @retval None
- */
-static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
-{
- 800a678: b580 push {r7, lr}
- 800a67a: b084 sub sp, #16
- 800a67c: af00 add r7, sp, #0
- 800a67e: 6078 str r0, [r7, #4]
- UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
- 800a680: 687b ldr r3, [r7, #4]
- 800a682: 6b9b ldr r3, [r3, #56] ; 0x38
- 800a684: 60fb str r3, [r7, #12]
-
- /* DMA Normal mode */
- if (hdma->Init.Mode != DMA_CIRCULAR)
- 800a686: 687b ldr r3, [r7, #4]
- 800a688: 69db ldr r3, [r3, #28]
- 800a68a: f5b3 7f80 cmp.w r3, #256 ; 0x100
- 800a68e: d01e beq.n 800a6ce <UART_DMAReceiveCplt+0x56>
- {
- huart->RxXferCount = 0U;
- 800a690: 68fb ldr r3, [r7, #12]
- 800a692: 2200 movs r2, #0
- 800a694: f8a3 205a strh.w r2, [r3, #90] ; 0x5a
-
- /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
- CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
- 800a698: 68fb ldr r3, [r7, #12]
- 800a69a: 681b ldr r3, [r3, #0]
- 800a69c: 681a ldr r2, [r3, #0]
- 800a69e: 68fb ldr r3, [r7, #12]
- 800a6a0: 681b ldr r3, [r3, #0]
- 800a6a2: f422 7280 bic.w r2, r2, #256 ; 0x100
- 800a6a6: 601a str r2, [r3, #0]
- CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
- 800a6a8: 68fb ldr r3, [r7, #12]
- 800a6aa: 681b ldr r3, [r3, #0]
- 800a6ac: 689a ldr r2, [r3, #8]
- 800a6ae: 68fb ldr r3, [r7, #12]
- 800a6b0: 681b ldr r3, [r3, #0]
- 800a6b2: f022 0201 bic.w r2, r2, #1
- 800a6b6: 609a str r2, [r3, #8]
-
- /* Disable the DMA transfer for the receiver request by resetting the DMAR bit
- in the UART CR3 register */
- CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
- 800a6b8: 68fb ldr r3, [r7, #12]
- 800a6ba: 681b ldr r3, [r3, #0]
- 800a6bc: 689a ldr r2, [r3, #8]
- 800a6be: 68fb ldr r3, [r7, #12]
- 800a6c0: 681b ldr r3, [r3, #0]
- 800a6c2: f022 0240 bic.w r2, r2, #64 ; 0x40
- 800a6c6: 609a str r2, [r3, #8]
-
- /* At end of Rx process, restore huart->RxState to Ready */
- huart->RxState = HAL_UART_STATE_READY;
- 800a6c8: 68fb ldr r3, [r7, #12]
- 800a6ca: 2220 movs r2, #32
- 800a6cc: 679a str r2, [r3, #120] ; 0x78
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /*Call registered Rx complete callback*/
- huart->RxCpltCallback(huart);
-#else
- /*Call legacy weak Rx complete callback*/
- HAL_UART_RxCpltCallback(huart);
- 800a6ce: 68f8 ldr r0, [r7, #12]
- 800a6d0: f7ff fb8c bl 8009dec <HAL_UART_RxCpltCallback>
-#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
-}
- 800a6d4: bf00 nop
- 800a6d6: 3710 adds r7, #16
- 800a6d8: 46bd mov sp, r7
- 800a6da: bd80 pop {r7, pc}
-
-0800a6dc <UART_DMARxHalfCplt>:
- * @brief DMA UART receive process half complete callback.
- * @param hdma DMA handle.
- * @retval None
- */
-static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
-{
- 800a6dc: b580 push {r7, lr}
- 800a6de: b084 sub sp, #16
- 800a6e0: af00 add r7, sp, #0
- 800a6e2: 6078 str r0, [r7, #4]
- UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
- 800a6e4: 687b ldr r3, [r7, #4]
- 800a6e6: 6b9b ldr r3, [r3, #56] ; 0x38
- 800a6e8: 60fb str r3, [r7, #12]
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /*Call registered Rx Half complete callback*/
- huart->RxHalfCpltCallback(huart);
-#else
- /*Call legacy weak Rx Half complete callback*/
- HAL_UART_RxHalfCpltCallback(huart);
- 800a6ea: 68f8 ldr r0, [r7, #12]
- 800a6ec: f7ff fb88 bl 8009e00 <HAL_UART_RxHalfCpltCallback>
-#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
-}
- 800a6f0: bf00 nop
- 800a6f2: 3710 adds r7, #16
- 800a6f4: 46bd mov sp, r7
- 800a6f6: bd80 pop {r7, pc}
-
-0800a6f8 <UART_DMAError>:
- * @brief DMA UART communication error callback.
- * @param hdma DMA handle.
- * @retval None
- */
-static void UART_DMAError(DMA_HandleTypeDef *hdma)
-{
- 800a6f8: b580 push {r7, lr}
- 800a6fa: b086 sub sp, #24
- 800a6fc: af00 add r7, sp, #0
- 800a6fe: 6078 str r0, [r7, #4]
- UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
- 800a700: 687b ldr r3, [r7, #4]
- 800a702: 6b9b ldr r3, [r3, #56] ; 0x38
- 800a704: 617b str r3, [r7, #20]
-
- const HAL_UART_StateTypeDef gstate = huart->gState;
- 800a706: 697b ldr r3, [r7, #20]
- 800a708: 6f5b ldr r3, [r3, #116] ; 0x74
- 800a70a: 613b str r3, [r7, #16]
- const HAL_UART_StateTypeDef rxstate = huart->RxState;
- 800a70c: 697b ldr r3, [r7, #20]
- 800a70e: 6f9b ldr r3, [r3, #120] ; 0x78
- 800a710: 60fb str r3, [r7, #12]
-
- /* Stop UART DMA Tx request if ongoing */
- if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) &&
- 800a712: 697b ldr r3, [r7, #20]
- 800a714: 681b ldr r3, [r3, #0]
- 800a716: 689b ldr r3, [r3, #8]
- 800a718: f003 0380 and.w r3, r3, #128 ; 0x80
- 800a71c: 2b80 cmp r3, #128 ; 0x80
- 800a71e: d109 bne.n 800a734 <UART_DMAError+0x3c>
- 800a720: 693b ldr r3, [r7, #16]
- 800a722: 2b21 cmp r3, #33 ; 0x21
- 800a724: d106 bne.n 800a734 <UART_DMAError+0x3c>
- (gstate == HAL_UART_STATE_BUSY_TX))
- {
- huart->TxXferCount = 0U;
- 800a726: 697b ldr r3, [r7, #20]
- 800a728: 2200 movs r2, #0
- 800a72a: f8a3 2052 strh.w r2, [r3, #82] ; 0x52
- UART_EndTxTransfer(huart);
- 800a72e: 6978 ldr r0, [r7, #20]
- 800a730: f7ff ff37 bl 800a5a2 <UART_EndTxTransfer>
- }
-
- /* Stop UART DMA Rx request if ongoing */
- if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) &&
- 800a734: 697b ldr r3, [r7, #20]
- 800a736: 681b ldr r3, [r3, #0]
- 800a738: 689b ldr r3, [r3, #8]
- 800a73a: f003 0340 and.w r3, r3, #64 ; 0x40
- 800a73e: 2b40 cmp r3, #64 ; 0x40
- 800a740: d109 bne.n 800a756 <UART_DMAError+0x5e>
- 800a742: 68fb ldr r3, [r7, #12]
- 800a744: 2b22 cmp r3, #34 ; 0x22
- 800a746: d106 bne.n 800a756 <UART_DMAError+0x5e>
- (rxstate == HAL_UART_STATE_BUSY_RX))
- {
- huart->RxXferCount = 0U;
- 800a748: 697b ldr r3, [r7, #20]
- 800a74a: 2200 movs r2, #0
- 800a74c: f8a3 205a strh.w r2, [r3, #90] ; 0x5a
- UART_EndRxTransfer(huart);
- 800a750: 6978 ldr r0, [r7, #20]
- 800a752: f7ff ff3b bl 800a5cc <UART_EndRxTransfer>
- }
-
- huart->ErrorCode |= HAL_UART_ERROR_DMA;
- 800a756: 697b ldr r3, [r7, #20]
- 800a758: 6fdb ldr r3, [r3, #124] ; 0x7c
- 800a75a: f043 0210 orr.w r2, r3, #16
- 800a75e: 697b ldr r3, [r7, #20]
- 800a760: 67da str r2, [r3, #124] ; 0x7c
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /*Call registered error callback*/
- huart->ErrorCallback(huart);
-#else
- /*Call legacy weak error callback*/
- HAL_UART_ErrorCallback(huart);
- 800a762: 6978 ldr r0, [r7, #20]
- 800a764: f7ff fb56 bl 8009e14 <HAL_UART_ErrorCallback>
-#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
-}
- 800a768: bf00 nop
- 800a76a: 3718 adds r7, #24
- 800a76c: 46bd mov sp, r7
- 800a76e: bd80 pop {r7, pc}
-
-0800a770 <_ZN3ros3MsgC1Ev>:
-
-namespace ros
-{
-
-/* Base Message Type */
-class Msg
- 800a770: b480 push {r7}
- 800a772: b083 sub sp, #12
- 800a774: af00 add r7, sp, #0
- 800a776: 6078 str r0, [r7, #4]
- 800a778: 4a04 ldr r2, [pc, #16] ; (800a78c <_ZN3ros3MsgC1Ev+0x1c>)
- 800a77a: 687b ldr r3, [r7, #4]
- 800a77c: 601a str r2, [r3, #0]
- 800a77e: 687b ldr r3, [r7, #4]
- 800a780: 4618 mov r0, r3
- 800a782: 370c adds r7, #12
- 800a784: 46bd mov sp, r7
- 800a786: f85d 7b04 ldr.w r7, [sp], #4
- 800a78a: 4770 bx lr
- 800a78c: 08012368 .word 0x08012368
-
-0800a790 <_ZN8std_msgs6StringC1Ev>:
- {
- public:
- typedef const char* _data_type;
- _data_type data;
-
- String():
- 800a790: b580 push {r7, lr}
- 800a792: b082 sub sp, #8
- 800a794: af00 add r7, sp, #0
- 800a796: 6078 str r0, [r7, #4]
- data("")
- 800a798: 687b ldr r3, [r7, #4]
- 800a79a: 4618 mov r0, r3
- 800a79c: f7ff ffe8 bl 800a770 <_ZN3ros3MsgC1Ev>
- 800a7a0: 4a05 ldr r2, [pc, #20] ; (800a7b8 <_ZN8std_msgs6StringC1Ev+0x28>)
- 800a7a2: 687b ldr r3, [r7, #4]
- 800a7a4: 601a str r2, [r3, #0]
- 800a7a6: 687b ldr r3, [r7, #4]
- 800a7a8: 4a04 ldr r2, [pc, #16] ; (800a7bc <_ZN8std_msgs6StringC1Ev+0x2c>)
- 800a7aa: 605a str r2, [r3, #4]
- {
- }
- 800a7ac: 687b ldr r3, [r7, #4]
- 800a7ae: 4618 mov r0, r3
- 800a7b0: 3708 adds r7, #8
- 800a7b2: 46bd mov sp, r7
- 800a7b4: bd80 pop {r7, pc}
- 800a7b6: bf00 nop
- 800a7b8: 08012350 .word 0x08012350
- 800a7bc: 080119b0 .word 0x080119b0
-
-0800a7c0 <_ZNK8std_msgs6String9serializeEPh>:
-
- virtual int serialize(unsigned char *outbuffer) const
- 800a7c0: b580 push {r7, lr}
- 800a7c2: b084 sub sp, #16
- 800a7c4: af00 add r7, sp, #0
- 800a7c6: 6078 str r0, [r7, #4]
- 800a7c8: 6039 str r1, [r7, #0]
- {
- int offset = 0;
- 800a7ca: 2300 movs r3, #0
- 800a7cc: 60fb str r3, [r7, #12]
- uint32_t length_data = strlen(this->data);
- 800a7ce: 687b ldr r3, [r7, #4]
- 800a7d0: 685b ldr r3, [r3, #4]
- 800a7d2: 4618 mov r0, r3
- 800a7d4: f7fc fafe bl 8006dd4 <strlen>
- 800a7d8: 60b8 str r0, [r7, #8]
- varToArr(outbuffer + offset, length_data);
- 800a7da: 68fb ldr r3, [r7, #12]
- 800a7dc: 683a ldr r2, [r7, #0]
- 800a7de: 4413 add r3, r2
- 800a7e0: 68b9 ldr r1, [r7, #8]
- 800a7e2: 4618 mov r0, r3
- 800a7e4: f001 f94b bl 800ba7e <_ZN3ros3Msg8varToArrIPhmEEvT_T0_>
- offset += 4;
- 800a7e8: 68fb ldr r3, [r7, #12]
- 800a7ea: 3304 adds r3, #4
- 800a7ec: 60fb str r3, [r7, #12]
- memcpy(outbuffer + offset, this->data, length_data);
- 800a7ee: 68fb ldr r3, [r7, #12]
- 800a7f0: 683a ldr r2, [r7, #0]
- 800a7f2: 18d0 adds r0, r2, r3
- 800a7f4: 687b ldr r3, [r7, #4]
- 800a7f6: 685b ldr r3, [r3, #4]
- 800a7f8: 68ba ldr r2, [r7, #8]
- 800a7fa: 4619 mov r1, r3
- 800a7fc: f003 fdbb bl 800e376 <memcpy>
- offset += length_data;
- 800a800: 68fa ldr r2, [r7, #12]
- 800a802: 68bb ldr r3, [r7, #8]
- 800a804: 4413 add r3, r2
- 800a806: 60fb str r3, [r7, #12]
- return offset;
- 800a808: 68fb ldr r3, [r7, #12]
- }
- 800a80a: 4618 mov r0, r3
- 800a80c: 3710 adds r7, #16
- 800a80e: 46bd mov sp, r7
- 800a810: bd80 pop {r7, pc}
-
-0800a812 <_ZN8std_msgs6String11deserializeEPh>:
-
- virtual int deserialize(unsigned char *inbuffer)
- 800a812: b580 push {r7, lr}
- 800a814: b086 sub sp, #24
- 800a816: af00 add r7, sp, #0
- 800a818: 6078 str r0, [r7, #4]
- 800a81a: 6039 str r1, [r7, #0]
- {
- int offset = 0;
- 800a81c: 2300 movs r3, #0
- 800a81e: 613b str r3, [r7, #16]
- uint32_t length_data;
- arrToVar(length_data, (inbuffer + offset));
- 800a820: 693b ldr r3, [r7, #16]
- 800a822: 683a ldr r2, [r7, #0]
- 800a824: 441a add r2, r3
- 800a826: f107 030c add.w r3, r7, #12
- 800a82a: 4611 mov r1, r2
- 800a82c: 4618 mov r0, r3
- 800a82e: f001 f944 bl 800baba <_ZN3ros3Msg8arrToVarImPhEEvRT_T0_>
- offset += 4;
- 800a832: 693b ldr r3, [r7, #16]
- 800a834: 3304 adds r3, #4
- 800a836: 613b str r3, [r7, #16]
- for(unsigned int k= offset; k< offset+length_data; ++k){
- 800a838: 693b ldr r3, [r7, #16]
- 800a83a: 617b str r3, [r7, #20]
- 800a83c: 693a ldr r2, [r7, #16]
- 800a83e: 68fb ldr r3, [r7, #12]
- 800a840: 4413 add r3, r2
- 800a842: 697a ldr r2, [r7, #20]
- 800a844: 429a cmp r2, r3
- 800a846: d20c bcs.n 800a862 <_ZN8std_msgs6String11deserializeEPh+0x50>
- inbuffer[k-1]=inbuffer[k];
- 800a848: 683a ldr r2, [r7, #0]
- 800a84a: 697b ldr r3, [r7, #20]
- 800a84c: 441a add r2, r3
- 800a84e: 697b ldr r3, [r7, #20]
- 800a850: 3b01 subs r3, #1
- 800a852: 6839 ldr r1, [r7, #0]
- 800a854: 440b add r3, r1
- 800a856: 7812 ldrb r2, [r2, #0]
- 800a858: 701a strb r2, [r3, #0]
- for(unsigned int k= offset; k< offset+length_data; ++k){
- 800a85a: 697b ldr r3, [r7, #20]
- 800a85c: 3301 adds r3, #1
- 800a85e: 617b str r3, [r7, #20]
- 800a860: e7ec b.n 800a83c <_ZN8std_msgs6String11deserializeEPh+0x2a>
- }
- inbuffer[offset+length_data-1]=0;
- 800a862: 693a ldr r2, [r7, #16]
- 800a864: 68fb ldr r3, [r7, #12]
- 800a866: 4413 add r3, r2
- 800a868: 3b01 subs r3, #1
- 800a86a: 683a ldr r2, [r7, #0]
- 800a86c: 4413 add r3, r2
- 800a86e: 2200 movs r2, #0
- 800a870: 701a strb r2, [r3, #0]
- this->data = (char *)(inbuffer + offset-1);
- 800a872: 693b ldr r3, [r7, #16]
- 800a874: 3b01 subs r3, #1
- 800a876: 683a ldr r2, [r7, #0]
- 800a878: 441a add r2, r3
- 800a87a: 687b ldr r3, [r7, #4]
- 800a87c: 605a str r2, [r3, #4]
- offset += length_data;
- 800a87e: 693a ldr r2, [r7, #16]
- 800a880: 68fb ldr r3, [r7, #12]
- 800a882: 4413 add r3, r2
- 800a884: 613b str r3, [r7, #16]
- return offset;
- 800a886: 693b ldr r3, [r7, #16]
- }
- 800a888: 4618 mov r0, r3
- 800a88a: 3718 adds r7, #24
- 800a88c: 46bd mov sp, r7
- 800a88e: bd80 pop {r7, pc}
-
-0800a890 <_ZN8std_msgs6String7getTypeEv>:
-
- const char * getType(){ return "std_msgs/String"; };
- 800a890: b480 push {r7}
- 800a892: b083 sub sp, #12
- 800a894: af00 add r7, sp, #0
- 800a896: 6078 str r0, [r7, #4]
- 800a898: 4b03 ldr r3, [pc, #12] ; (800a8a8 <_ZN8std_msgs6String7getTypeEv+0x18>)
- 800a89a: 4618 mov r0, r3
- 800a89c: 370c adds r7, #12
- 800a89e: 46bd mov sp, r7
- 800a8a0: f85d 7b04 ldr.w r7, [sp], #4
- 800a8a4: 4770 bx lr
- 800a8a6: bf00 nop
- 800a8a8: 080119b4 .word 0x080119b4
-
-0800a8ac <_ZN8std_msgs6String6getMD5Ev>:
- const char * getMD5(){ return "992ce8a1687cec8c8bd883ec73ca41d1"; };
- 800a8ac: b480 push {r7}
- 800a8ae: b083 sub sp, #12
- 800a8b0: af00 add r7, sp, #0
- 800a8b2: 6078 str r0, [r7, #4]
- 800a8b4: 4b03 ldr r3, [pc, #12] ; (800a8c4 <_ZN8std_msgs6String6getMD5Ev+0x18>)
- 800a8b6: 4618 mov r0, r3
- 800a8b8: 370c adds r7, #12
- 800a8ba: 46bd mov sp, r7
- 800a8bc: f85d 7b04 ldr.w r7, [sp], #4
- 800a8c0: 4770 bx lr
- 800a8c2: bf00 nop
- 800a8c4: 080119c4 .word 0x080119c4
-
-0800a8c8 <_ZN3ros4TimeC1Ev>:
-class Time
-{
-public:
- uint32_t sec, nsec;
-
- Time() : sec(0), nsec(0) {}
- 800a8c8: b480 push {r7}
- 800a8ca: b083 sub sp, #12
- 800a8cc: af00 add r7, sp, #0
- 800a8ce: 6078 str r0, [r7, #4]
- 800a8d0: 687b ldr r3, [r7, #4]
- 800a8d2: 2200 movs r2, #0
- 800a8d4: 601a str r2, [r3, #0]
- 800a8d6: 687b ldr r3, [r7, #4]
- 800a8d8: 2200 movs r2, #0
- 800a8da: 605a str r2, [r3, #4]
- 800a8dc: 687b ldr r3, [r7, #4]
- 800a8de: 4618 mov r0, r3
- 800a8e0: 370c adds r7, #12
- 800a8e2: 46bd mov sp, r7
- 800a8e4: f85d 7b04 ldr.w r7, [sp], #4
- 800a8e8: 4770 bx lr
- ...
-
-0800a8ec <_ZN8std_msgs4TimeC1Ev>:
- {
- public:
- typedef ros::Time _data_type;
- _data_type data;
-
- Time():
- 800a8ec: b580 push {r7, lr}
- 800a8ee: b082 sub sp, #8
- 800a8f0: af00 add r7, sp, #0
- 800a8f2: 6078 str r0, [r7, #4]
- data()
- 800a8f4: 687b ldr r3, [r7, #4]
- 800a8f6: 4618 mov r0, r3
- 800a8f8: f7ff ff3a bl 800a770 <_ZN3ros3MsgC1Ev>
- 800a8fc: 4a06 ldr r2, [pc, #24] ; (800a918 <_ZN8std_msgs4TimeC1Ev+0x2c>)
- 800a8fe: 687b ldr r3, [r7, #4]
- 800a900: 601a str r2, [r3, #0]
- 800a902: 687b ldr r3, [r7, #4]
- 800a904: 3304 adds r3, #4
- 800a906: 4618 mov r0, r3
- 800a908: f7ff ffde bl 800a8c8 <_ZN3ros4TimeC1Ev>
- {
- }
- 800a90c: 687b ldr r3, [r7, #4]
- 800a90e: 4618 mov r0, r3
- 800a910: 3708 adds r7, #8
- 800a912: 46bd mov sp, r7
- 800a914: bd80 pop {r7, pc}
- 800a916: bf00 nop
- 800a918: 08012338 .word 0x08012338
-
-0800a91c <_ZNK8std_msgs4Time9serializeEPh>:
-
- virtual int serialize(unsigned char *outbuffer) const
- 800a91c: b480 push {r7}
- 800a91e: b085 sub sp, #20
- 800a920: af00 add r7, sp, #0
- 800a922: 6078 str r0, [r7, #4]
- 800a924: 6039 str r1, [r7, #0]
- {
- int offset = 0;
- 800a926: 2300 movs r3, #0
- 800a928: 60fb str r3, [r7, #12]
- *(outbuffer + offset + 0) = (this->data.sec >> (8 * 0)) & 0xFF;
- 800a92a: 687b ldr r3, [r7, #4]
- 800a92c: 6859 ldr r1, [r3, #4]
- 800a92e: 68fb ldr r3, [r7, #12]
- 800a930: 683a ldr r2, [r7, #0]
- 800a932: 4413 add r3, r2
- 800a934: b2ca uxtb r2, r1
- 800a936: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 1) = (this->data.sec >> (8 * 1)) & 0xFF;
- 800a938: 687b ldr r3, [r7, #4]
- 800a93a: 685b ldr r3, [r3, #4]
- 800a93c: 0a19 lsrs r1, r3, #8
- 800a93e: 68fb ldr r3, [r7, #12]
- 800a940: 3301 adds r3, #1
- 800a942: 683a ldr r2, [r7, #0]
- 800a944: 4413 add r3, r2
- 800a946: b2ca uxtb r2, r1
- 800a948: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 2) = (this->data.sec >> (8 * 2)) & 0xFF;
- 800a94a: 687b ldr r3, [r7, #4]
- 800a94c: 685b ldr r3, [r3, #4]
- 800a94e: 0c19 lsrs r1, r3, #16
- 800a950: 68fb ldr r3, [r7, #12]
- 800a952: 3302 adds r3, #2
- 800a954: 683a ldr r2, [r7, #0]
- 800a956: 4413 add r3, r2
- 800a958: b2ca uxtb r2, r1
- 800a95a: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 3) = (this->data.sec >> (8 * 3)) & 0xFF;
- 800a95c: 687b ldr r3, [r7, #4]
- 800a95e: 685b ldr r3, [r3, #4]
- 800a960: 0e19 lsrs r1, r3, #24
- 800a962: 68fb ldr r3, [r7, #12]
- 800a964: 3303 adds r3, #3
- 800a966: 683a ldr r2, [r7, #0]
- 800a968: 4413 add r3, r2
- 800a96a: b2ca uxtb r2, r1
- 800a96c: 701a strb r2, [r3, #0]
- offset += sizeof(this->data.sec);
- 800a96e: 68fb ldr r3, [r7, #12]
- 800a970: 3304 adds r3, #4
- 800a972: 60fb str r3, [r7, #12]
- *(outbuffer + offset + 0) = (this->data.nsec >> (8 * 0)) & 0xFF;
- 800a974: 687b ldr r3, [r7, #4]
- 800a976: 6899 ldr r1, [r3, #8]
- 800a978: 68fb ldr r3, [r7, #12]
- 800a97a: 683a ldr r2, [r7, #0]
- 800a97c: 4413 add r3, r2
- 800a97e: b2ca uxtb r2, r1
- 800a980: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 1) = (this->data.nsec >> (8 * 1)) & 0xFF;
- 800a982: 687b ldr r3, [r7, #4]
- 800a984: 689b ldr r3, [r3, #8]
- 800a986: 0a19 lsrs r1, r3, #8
- 800a988: 68fb ldr r3, [r7, #12]
- 800a98a: 3301 adds r3, #1
- 800a98c: 683a ldr r2, [r7, #0]
- 800a98e: 4413 add r3, r2
- 800a990: b2ca uxtb r2, r1
- 800a992: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 2) = (this->data.nsec >> (8 * 2)) & 0xFF;
- 800a994: 687b ldr r3, [r7, #4]
- 800a996: 689b ldr r3, [r3, #8]
- 800a998: 0c19 lsrs r1, r3, #16
- 800a99a: 68fb ldr r3, [r7, #12]
- 800a99c: 3302 adds r3, #2
- 800a99e: 683a ldr r2, [r7, #0]
- 800a9a0: 4413 add r3, r2
- 800a9a2: b2ca uxtb r2, r1
- 800a9a4: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 3) = (this->data.nsec >> (8 * 3)) & 0xFF;
- 800a9a6: 687b ldr r3, [r7, #4]
- 800a9a8: 689b ldr r3, [r3, #8]
- 800a9aa: 0e19 lsrs r1, r3, #24
- 800a9ac: 68fb ldr r3, [r7, #12]
- 800a9ae: 3303 adds r3, #3
- 800a9b0: 683a ldr r2, [r7, #0]
- 800a9b2: 4413 add r3, r2
- 800a9b4: b2ca uxtb r2, r1
- 800a9b6: 701a strb r2, [r3, #0]
- offset += sizeof(this->data.nsec);
- 800a9b8: 68fb ldr r3, [r7, #12]
- 800a9ba: 3304 adds r3, #4
- 800a9bc: 60fb str r3, [r7, #12]
- return offset;
- 800a9be: 68fb ldr r3, [r7, #12]
- }
- 800a9c0: 4618 mov r0, r3
- 800a9c2: 3714 adds r7, #20
- 800a9c4: 46bd mov sp, r7
- 800a9c6: f85d 7b04 ldr.w r7, [sp], #4
- 800a9ca: 4770 bx lr
-
-0800a9cc <_ZN8std_msgs4Time11deserializeEPh>:
-
- virtual int deserialize(unsigned char *inbuffer)
- 800a9cc: b480 push {r7}
- 800a9ce: b085 sub sp, #20
- 800a9d0: af00 add r7, sp, #0
- 800a9d2: 6078 str r0, [r7, #4]
- 800a9d4: 6039 str r1, [r7, #0]
- {
- int offset = 0;
- 800a9d6: 2300 movs r3, #0
- 800a9d8: 60fb str r3, [r7, #12]
- this->data.sec = ((uint32_t) (*(inbuffer + offset)));
- 800a9da: 68fb ldr r3, [r7, #12]
- 800a9dc: 683a ldr r2, [r7, #0]
- 800a9de: 4413 add r3, r2
- 800a9e0: 781b ldrb r3, [r3, #0]
- 800a9e2: 461a mov r2, r3
- 800a9e4: 687b ldr r3, [r7, #4]
- 800a9e6: 605a str r2, [r3, #4]
- this->data.sec |= ((uint32_t) (*(inbuffer + offset + 1))) << (8 * 1);
- 800a9e8: 687b ldr r3, [r7, #4]
- 800a9ea: 685a ldr r2, [r3, #4]
- 800a9ec: 68fb ldr r3, [r7, #12]
- 800a9ee: 3301 adds r3, #1
- 800a9f0: 6839 ldr r1, [r7, #0]
- 800a9f2: 440b add r3, r1
- 800a9f4: 781b ldrb r3, [r3, #0]
- 800a9f6: 021b lsls r3, r3, #8
- 800a9f8: 431a orrs r2, r3
- 800a9fa: 687b ldr r3, [r7, #4]
- 800a9fc: 605a str r2, [r3, #4]
- this->data.sec |= ((uint32_t) (*(inbuffer + offset + 2))) << (8 * 2);
- 800a9fe: 687b ldr r3, [r7, #4]
- 800aa00: 685a ldr r2, [r3, #4]
- 800aa02: 68fb ldr r3, [r7, #12]
- 800aa04: 3302 adds r3, #2
- 800aa06: 6839 ldr r1, [r7, #0]
- 800aa08: 440b add r3, r1
- 800aa0a: 781b ldrb r3, [r3, #0]
- 800aa0c: 041b lsls r3, r3, #16
- 800aa0e: 431a orrs r2, r3
- 800aa10: 687b ldr r3, [r7, #4]
- 800aa12: 605a str r2, [r3, #4]
- this->data.sec |= ((uint32_t) (*(inbuffer + offset + 3))) << (8 * 3);
- 800aa14: 687b ldr r3, [r7, #4]
- 800aa16: 685a ldr r2, [r3, #4]
- 800aa18: 68fb ldr r3, [r7, #12]
- 800aa1a: 3303 adds r3, #3
- 800aa1c: 6839 ldr r1, [r7, #0]
- 800aa1e: 440b add r3, r1
- 800aa20: 781b ldrb r3, [r3, #0]
- 800aa22: 061b lsls r3, r3, #24
- 800aa24: 431a orrs r2, r3
- 800aa26: 687b ldr r3, [r7, #4]
- 800aa28: 605a str r2, [r3, #4]
- offset += sizeof(this->data.sec);
- 800aa2a: 68fb ldr r3, [r7, #12]
- 800aa2c: 3304 adds r3, #4
- 800aa2e: 60fb str r3, [r7, #12]
- this->data.nsec = ((uint32_t) (*(inbuffer + offset)));
- 800aa30: 68fb ldr r3, [r7, #12]
- 800aa32: 683a ldr r2, [r7, #0]
- 800aa34: 4413 add r3, r2
- 800aa36: 781b ldrb r3, [r3, #0]
- 800aa38: 461a mov r2, r3
- 800aa3a: 687b ldr r3, [r7, #4]
- 800aa3c: 609a str r2, [r3, #8]
- this->data.nsec |= ((uint32_t) (*(inbuffer + offset + 1))) << (8 * 1);
- 800aa3e: 687b ldr r3, [r7, #4]
- 800aa40: 689a ldr r2, [r3, #8]
- 800aa42: 68fb ldr r3, [r7, #12]
- 800aa44: 3301 adds r3, #1
- 800aa46: 6839 ldr r1, [r7, #0]
- 800aa48: 440b add r3, r1
- 800aa4a: 781b ldrb r3, [r3, #0]
- 800aa4c: 021b lsls r3, r3, #8
- 800aa4e: 431a orrs r2, r3
- 800aa50: 687b ldr r3, [r7, #4]
- 800aa52: 609a str r2, [r3, #8]
- this->data.nsec |= ((uint32_t) (*(inbuffer + offset + 2))) << (8 * 2);
- 800aa54: 687b ldr r3, [r7, #4]
- 800aa56: 689a ldr r2, [r3, #8]
- 800aa58: 68fb ldr r3, [r7, #12]
- 800aa5a: 3302 adds r3, #2
- 800aa5c: 6839 ldr r1, [r7, #0]
- 800aa5e: 440b add r3, r1
- 800aa60: 781b ldrb r3, [r3, #0]
- 800aa62: 041b lsls r3, r3, #16
- 800aa64: 431a orrs r2, r3
- 800aa66: 687b ldr r3, [r7, #4]
- 800aa68: 609a str r2, [r3, #8]
- this->data.nsec |= ((uint32_t) (*(inbuffer + offset + 3))) << (8 * 3);
- 800aa6a: 687b ldr r3, [r7, #4]
- 800aa6c: 689a ldr r2, [r3, #8]
- 800aa6e: 68fb ldr r3, [r7, #12]
- 800aa70: 3303 adds r3, #3
- 800aa72: 6839 ldr r1, [r7, #0]
- 800aa74: 440b add r3, r1
- 800aa76: 781b ldrb r3, [r3, #0]
- 800aa78: 061b lsls r3, r3, #24
- 800aa7a: 431a orrs r2, r3
- 800aa7c: 687b ldr r3, [r7, #4]
- 800aa7e: 609a str r2, [r3, #8]
- offset += sizeof(this->data.nsec);
- 800aa80: 68fb ldr r3, [r7, #12]
- 800aa82: 3304 adds r3, #4
- 800aa84: 60fb str r3, [r7, #12]
- return offset;
- 800aa86: 68fb ldr r3, [r7, #12]
- }
- 800aa88: 4618 mov r0, r3
- 800aa8a: 3714 adds r7, #20
- 800aa8c: 46bd mov sp, r7
- 800aa8e: f85d 7b04 ldr.w r7, [sp], #4
- 800aa92: 4770 bx lr
-
-0800aa94 <_ZN8std_msgs4Time7getTypeEv>:
-
- const char * getType(){ return "std_msgs/Time"; };
- 800aa94: b480 push {r7}
- 800aa96: b083 sub sp, #12
- 800aa98: af00 add r7, sp, #0
- 800aa9a: 6078 str r0, [r7, #4]
- 800aa9c: 4b03 ldr r3, [pc, #12] ; (800aaac <_ZN8std_msgs4Time7getTypeEv+0x18>)
- 800aa9e: 4618 mov r0, r3
- 800aaa0: 370c adds r7, #12
- 800aaa2: 46bd mov sp, r7
- 800aaa4: f85d 7b04 ldr.w r7, [sp], #4
- 800aaa8: 4770 bx lr
- 800aaaa: bf00 nop
- 800aaac: 080119e8 .word 0x080119e8
-
-0800aab0 <_ZN8std_msgs4Time6getMD5Ev>:
- const char * getMD5(){ return "cd7166c74c552c311fbcc2fe5a7bc289"; };
- 800aab0: b480 push {r7}
- 800aab2: b083 sub sp, #12
- 800aab4: af00 add r7, sp, #0
- 800aab6: 6078 str r0, [r7, #4]
- 800aab8: 4b03 ldr r3, [pc, #12] ; (800aac8 <_ZN8std_msgs4Time6getMD5Ev+0x18>)
- 800aaba: 4618 mov r0, r3
- 800aabc: 370c adds r7, #12
- 800aabe: 46bd mov sp, r7
- 800aac0: f85d 7b04 ldr.w r7, [sp], #4
- 800aac4: 4770 bx lr
- 800aac6: bf00 nop
- 800aac8: 080119f8 .word 0x080119f8
-
-0800aacc <_ZN14rosserial_msgs9TopicInfoC1Ev>:
- enum { ID_PARAMETER_REQUEST = 6 };
- enum { ID_LOG = 7 };
- enum { ID_TIME = 10 };
- enum { ID_TX_STOP = 11 };
-
- TopicInfo():
- 800aacc: b580 push {r7, lr}
- 800aace: b082 sub sp, #8
- 800aad0: af00 add r7, sp, #0
- 800aad2: 6078 str r0, [r7, #4]
- topic_id(0),
- topic_name(""),
- message_type(""),
- md5sum(""),
- buffer_size(0)
- 800aad4: 687b ldr r3, [r7, #4]
- 800aad6: 4618 mov r0, r3
- 800aad8: f7ff fe4a bl 800a770 <_ZN3ros3MsgC1Ev>
- 800aadc: 4a0b ldr r2, [pc, #44] ; (800ab0c <_ZN14rosserial_msgs9TopicInfoC1Ev+0x40>)
- 800aade: 687b ldr r3, [r7, #4]
- 800aae0: 601a str r2, [r3, #0]
- 800aae2: 687b ldr r3, [r7, #4]
- 800aae4: 2200 movs r2, #0
- 800aae6: 809a strh r2, [r3, #4]
- 800aae8: 687b ldr r3, [r7, #4]
- 800aaea: 4a09 ldr r2, [pc, #36] ; (800ab10 <_ZN14rosserial_msgs9TopicInfoC1Ev+0x44>)
- 800aaec: 609a str r2, [r3, #8]
- 800aaee: 687b ldr r3, [r7, #4]
- 800aaf0: 4a07 ldr r2, [pc, #28] ; (800ab10 <_ZN14rosserial_msgs9TopicInfoC1Ev+0x44>)
- 800aaf2: 60da str r2, [r3, #12]
- 800aaf4: 687b ldr r3, [r7, #4]
- 800aaf6: 4a06 ldr r2, [pc, #24] ; (800ab10 <_ZN14rosserial_msgs9TopicInfoC1Ev+0x44>)
- 800aaf8: 611a str r2, [r3, #16]
- 800aafa: 687b ldr r3, [r7, #4]
- 800aafc: 2200 movs r2, #0
- 800aafe: 615a str r2, [r3, #20]
- {
- }
- 800ab00: 687b ldr r3, [r7, #4]
- 800ab02: 4618 mov r0, r3
- 800ab04: 3708 adds r7, #8
- 800ab06: 46bd mov sp, r7
- 800ab08: bd80 pop {r7, pc}
- 800ab0a: bf00 nop
- 800ab0c: 08012320 .word 0x08012320
- 800ab10: 080119b0 .word 0x080119b0
-
-0800ab14 <_ZNK14rosserial_msgs9TopicInfo9serializeEPh>:
-
- virtual int serialize(unsigned char *outbuffer) const
- 800ab14: b580 push {r7, lr}
- 800ab16: b088 sub sp, #32
- 800ab18: af00 add r7, sp, #0
- 800ab1a: 6078 str r0, [r7, #4]
- 800ab1c: 6039 str r1, [r7, #0]
- {
- int offset = 0;
- 800ab1e: 2300 movs r3, #0
- 800ab20: 61fb str r3, [r7, #28]
- *(outbuffer + offset + 0) = (this->topic_id >> (8 * 0)) & 0xFF;
- 800ab22: 687b ldr r3, [r7, #4]
- 800ab24: 8899 ldrh r1, [r3, #4]
- 800ab26: 69fb ldr r3, [r7, #28]
- 800ab28: 683a ldr r2, [r7, #0]
- 800ab2a: 4413 add r3, r2
- 800ab2c: b2ca uxtb r2, r1
- 800ab2e: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 1) = (this->topic_id >> (8 * 1)) & 0xFF;
- 800ab30: 687b ldr r3, [r7, #4]
- 800ab32: 889b ldrh r3, [r3, #4]
- 800ab34: 0a1b lsrs r3, r3, #8
- 800ab36: b299 uxth r1, r3
- 800ab38: 69fb ldr r3, [r7, #28]
- 800ab3a: 3301 adds r3, #1
- 800ab3c: 683a ldr r2, [r7, #0]
- 800ab3e: 4413 add r3, r2
- 800ab40: b2ca uxtb r2, r1
- 800ab42: 701a strb r2, [r3, #0]
- offset += sizeof(this->topic_id);
- 800ab44: 69fb ldr r3, [r7, #28]
- 800ab46: 3302 adds r3, #2
- 800ab48: 61fb str r3, [r7, #28]
- uint32_t length_topic_name = strlen(this->topic_name);
- 800ab4a: 687b ldr r3, [r7, #4]
- 800ab4c: 689b ldr r3, [r3, #8]
- 800ab4e: 4618 mov r0, r3
- 800ab50: f7fc f940 bl 8006dd4 <strlen>
- 800ab54: 61b8 str r0, [r7, #24]
- varToArr(outbuffer + offset, length_topic_name);
- 800ab56: 69fb ldr r3, [r7, #28]
- 800ab58: 683a ldr r2, [r7, #0]
- 800ab5a: 4413 add r3, r2
- 800ab5c: 69b9 ldr r1, [r7, #24]
- 800ab5e: 4618 mov r0, r3
- 800ab60: f000 ff8d bl 800ba7e <_ZN3ros3Msg8varToArrIPhmEEvT_T0_>
- offset += 4;
- 800ab64: 69fb ldr r3, [r7, #28]
- 800ab66: 3304 adds r3, #4
- 800ab68: 61fb str r3, [r7, #28]
- memcpy(outbuffer + offset, this->topic_name, length_topic_name);
- 800ab6a: 69fb ldr r3, [r7, #28]
- 800ab6c: 683a ldr r2, [r7, #0]
- 800ab6e: 18d0 adds r0, r2, r3
- 800ab70: 687b ldr r3, [r7, #4]
- 800ab72: 689b ldr r3, [r3, #8]
- 800ab74: 69ba ldr r2, [r7, #24]
- 800ab76: 4619 mov r1, r3
- 800ab78: f003 fbfd bl 800e376 <memcpy>
- offset += length_topic_name;
- 800ab7c: 69fa ldr r2, [r7, #28]
- 800ab7e: 69bb ldr r3, [r7, #24]
- 800ab80: 4413 add r3, r2
- 800ab82: 61fb str r3, [r7, #28]
- uint32_t length_message_type = strlen(this->message_type);
- 800ab84: 687b ldr r3, [r7, #4]
- 800ab86: 68db ldr r3, [r3, #12]
- 800ab88: 4618 mov r0, r3
- 800ab8a: f7fc f923 bl 8006dd4 <strlen>
- 800ab8e: 6178 str r0, [r7, #20]
- varToArr(outbuffer + offset, length_message_type);
- 800ab90: 69fb ldr r3, [r7, #28]
- 800ab92: 683a ldr r2, [r7, #0]
- 800ab94: 4413 add r3, r2
- 800ab96: 6979 ldr r1, [r7, #20]
- 800ab98: 4618 mov r0, r3
- 800ab9a: f000 ff70 bl 800ba7e <_ZN3ros3Msg8varToArrIPhmEEvT_T0_>
- offset += 4;
- 800ab9e: 69fb ldr r3, [r7, #28]
- 800aba0: 3304 adds r3, #4
- 800aba2: 61fb str r3, [r7, #28]
- memcpy(outbuffer + offset, this->message_type, length_message_type);
- 800aba4: 69fb ldr r3, [r7, #28]
- 800aba6: 683a ldr r2, [r7, #0]
- 800aba8: 18d0 adds r0, r2, r3
- 800abaa: 687b ldr r3, [r7, #4]
- 800abac: 68db ldr r3, [r3, #12]
- 800abae: 697a ldr r2, [r7, #20]
- 800abb0: 4619 mov r1, r3
- 800abb2: f003 fbe0 bl 800e376 <memcpy>
- offset += length_message_type;
- 800abb6: 69fa ldr r2, [r7, #28]
- 800abb8: 697b ldr r3, [r7, #20]
- 800abba: 4413 add r3, r2
- 800abbc: 61fb str r3, [r7, #28]
- uint32_t length_md5sum = strlen(this->md5sum);
- 800abbe: 687b ldr r3, [r7, #4]
- 800abc0: 691b ldr r3, [r3, #16]
- 800abc2: 4618 mov r0, r3
- 800abc4: f7fc f906 bl 8006dd4 <strlen>
- 800abc8: 6138 str r0, [r7, #16]
- varToArr(outbuffer + offset, length_md5sum);
- 800abca: 69fb ldr r3, [r7, #28]
- 800abcc: 683a ldr r2, [r7, #0]
- 800abce: 4413 add r3, r2
- 800abd0: 6939 ldr r1, [r7, #16]
- 800abd2: 4618 mov r0, r3
- 800abd4: f000 ff53 bl 800ba7e <_ZN3ros3Msg8varToArrIPhmEEvT_T0_>
- offset += 4;
- 800abd8: 69fb ldr r3, [r7, #28]
- 800abda: 3304 adds r3, #4
- 800abdc: 61fb str r3, [r7, #28]
- memcpy(outbuffer + offset, this->md5sum, length_md5sum);
- 800abde: 69fb ldr r3, [r7, #28]
- 800abe0: 683a ldr r2, [r7, #0]
- 800abe2: 18d0 adds r0, r2, r3
- 800abe4: 687b ldr r3, [r7, #4]
- 800abe6: 691b ldr r3, [r3, #16]
- 800abe8: 693a ldr r2, [r7, #16]
- 800abea: 4619 mov r1, r3
- 800abec: f003 fbc3 bl 800e376 <memcpy>
- offset += length_md5sum;
- 800abf0: 69fa ldr r2, [r7, #28]
- 800abf2: 693b ldr r3, [r7, #16]
- 800abf4: 4413 add r3, r2
- 800abf6: 61fb str r3, [r7, #28]
- union {
- int32_t real;
- uint32_t base;
- } u_buffer_size;
- u_buffer_size.real = this->buffer_size;
- 800abf8: 687b ldr r3, [r7, #4]
- 800abfa: 695b ldr r3, [r3, #20]
- 800abfc: 60fb str r3, [r7, #12]
- *(outbuffer + offset + 0) = (u_buffer_size.base >> (8 * 0)) & 0xFF;
- 800abfe: 68f9 ldr r1, [r7, #12]
- 800ac00: 69fb ldr r3, [r7, #28]
- 800ac02: 683a ldr r2, [r7, #0]
- 800ac04: 4413 add r3, r2
- 800ac06: b2ca uxtb r2, r1
- 800ac08: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 1) = (u_buffer_size.base >> (8 * 1)) & 0xFF;
- 800ac0a: 68fb ldr r3, [r7, #12]
- 800ac0c: 0a19 lsrs r1, r3, #8
- 800ac0e: 69fb ldr r3, [r7, #28]
- 800ac10: 3301 adds r3, #1
- 800ac12: 683a ldr r2, [r7, #0]
- 800ac14: 4413 add r3, r2
- 800ac16: b2ca uxtb r2, r1
- 800ac18: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 2) = (u_buffer_size.base >> (8 * 2)) & 0xFF;
- 800ac1a: 68fb ldr r3, [r7, #12]
- 800ac1c: 0c19 lsrs r1, r3, #16
- 800ac1e: 69fb ldr r3, [r7, #28]
- 800ac20: 3302 adds r3, #2
- 800ac22: 683a ldr r2, [r7, #0]
- 800ac24: 4413 add r3, r2
- 800ac26: b2ca uxtb r2, r1
- 800ac28: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 3) = (u_buffer_size.base >> (8 * 3)) & 0xFF;
- 800ac2a: 68fb ldr r3, [r7, #12]
- 800ac2c: 0e19 lsrs r1, r3, #24
- 800ac2e: 69fb ldr r3, [r7, #28]
- 800ac30: 3303 adds r3, #3
- 800ac32: 683a ldr r2, [r7, #0]
- 800ac34: 4413 add r3, r2
- 800ac36: b2ca uxtb r2, r1
- 800ac38: 701a strb r2, [r3, #0]
- offset += sizeof(this->buffer_size);
- 800ac3a: 69fb ldr r3, [r7, #28]
- 800ac3c: 3304 adds r3, #4
- 800ac3e: 61fb str r3, [r7, #28]
- return offset;
- 800ac40: 69fb ldr r3, [r7, #28]
- }
- 800ac42: 4618 mov r0, r3
- 800ac44: 3720 adds r7, #32
- 800ac46: 46bd mov sp, r7
- 800ac48: bd80 pop {r7, pc}
-
-0800ac4a <_ZN14rosserial_msgs9TopicInfo11deserializeEPh>:
-
- virtual int deserialize(unsigned char *inbuffer)
- 800ac4a: b580 push {r7, lr}
- 800ac4c: b08a sub sp, #40 ; 0x28
- 800ac4e: af00 add r7, sp, #0
- 800ac50: 6078 str r0, [r7, #4]
- 800ac52: 6039 str r1, [r7, #0]
- {
- int offset = 0;
- 800ac54: 2300 movs r3, #0
- 800ac56: 61bb str r3, [r7, #24]
- this->topic_id = ((uint16_t) (*(inbuffer + offset)));
- 800ac58: 69bb ldr r3, [r7, #24]
- 800ac5a: 683a ldr r2, [r7, #0]
- 800ac5c: 4413 add r3, r2
- 800ac5e: 781b ldrb r3, [r3, #0]
- 800ac60: b29a uxth r2, r3
- 800ac62: 687b ldr r3, [r7, #4]
- 800ac64: 809a strh r2, [r3, #4]
- this->topic_id |= ((uint16_t) (*(inbuffer + offset + 1))) << (8 * 1);
- 800ac66: 687b ldr r3, [r7, #4]
- 800ac68: 889b ldrh r3, [r3, #4]
- 800ac6a: b21a sxth r2, r3
- 800ac6c: 69bb ldr r3, [r7, #24]
- 800ac6e: 3301 adds r3, #1
- 800ac70: 6839 ldr r1, [r7, #0]
- 800ac72: 440b add r3, r1
- 800ac74: 781b ldrb r3, [r3, #0]
- 800ac76: 021b lsls r3, r3, #8
- 800ac78: b21b sxth r3, r3
- 800ac7a: 4313 orrs r3, r2
- 800ac7c: b21b sxth r3, r3
- 800ac7e: b29a uxth r2, r3
- 800ac80: 687b ldr r3, [r7, #4]
- 800ac82: 809a strh r2, [r3, #4]
- offset += sizeof(this->topic_id);
- 800ac84: 69bb ldr r3, [r7, #24]
- 800ac86: 3302 adds r3, #2
- 800ac88: 61bb str r3, [r7, #24]
- uint32_t length_topic_name;
- arrToVar(length_topic_name, (inbuffer + offset));
- 800ac8a: 69bb ldr r3, [r7, #24]
- 800ac8c: 683a ldr r2, [r7, #0]
- 800ac8e: 441a add r2, r3
- 800ac90: f107 0314 add.w r3, r7, #20
- 800ac94: 4611 mov r1, r2
- 800ac96: 4618 mov r0, r3
- 800ac98: f000 ff0f bl 800baba <_ZN3ros3Msg8arrToVarImPhEEvRT_T0_>
- offset += 4;
- 800ac9c: 69bb ldr r3, [r7, #24]
- 800ac9e: 3304 adds r3, #4
- 800aca0: 61bb str r3, [r7, #24]
- for(unsigned int k= offset; k< offset+length_topic_name; ++k){
- 800aca2: 69bb ldr r3, [r7, #24]
- 800aca4: 627b str r3, [r7, #36] ; 0x24
- 800aca6: 69ba ldr r2, [r7, #24]
- 800aca8: 697b ldr r3, [r7, #20]
- 800acaa: 4413 add r3, r2
- 800acac: 6a7a ldr r2, [r7, #36] ; 0x24
- 800acae: 429a cmp r2, r3
- 800acb0: d20c bcs.n 800accc <_ZN14rosserial_msgs9TopicInfo11deserializeEPh+0x82>
- inbuffer[k-1]=inbuffer[k];
- 800acb2: 683a ldr r2, [r7, #0]
- 800acb4: 6a7b ldr r3, [r7, #36] ; 0x24
- 800acb6: 441a add r2, r3
- 800acb8: 6a7b ldr r3, [r7, #36] ; 0x24
- 800acba: 3b01 subs r3, #1
- 800acbc: 6839 ldr r1, [r7, #0]
- 800acbe: 440b add r3, r1
- 800acc0: 7812 ldrb r2, [r2, #0]
- 800acc2: 701a strb r2, [r3, #0]
- for(unsigned int k= offset; k< offset+length_topic_name; ++k){
- 800acc4: 6a7b ldr r3, [r7, #36] ; 0x24
- 800acc6: 3301 adds r3, #1
- 800acc8: 627b str r3, [r7, #36] ; 0x24
- 800acca: e7ec b.n 800aca6 <_ZN14rosserial_msgs9TopicInfo11deserializeEPh+0x5c>
- }
- inbuffer[offset+length_topic_name-1]=0;
- 800accc: 69ba ldr r2, [r7, #24]
- 800acce: 697b ldr r3, [r7, #20]
- 800acd0: 4413 add r3, r2
- 800acd2: 3b01 subs r3, #1
- 800acd4: 683a ldr r2, [r7, #0]
- 800acd6: 4413 add r3, r2
- 800acd8: 2200 movs r2, #0
- 800acda: 701a strb r2, [r3, #0]
- this->topic_name = (char *)(inbuffer + offset-1);
- 800acdc: 69bb ldr r3, [r7, #24]
- 800acde: 3b01 subs r3, #1
- 800ace0: 683a ldr r2, [r7, #0]
- 800ace2: 441a add r2, r3
- 800ace4: 687b ldr r3, [r7, #4]
- 800ace6: 609a str r2, [r3, #8]
- offset += length_topic_name;
- 800ace8: 69ba ldr r2, [r7, #24]
- 800acea: 697b ldr r3, [r7, #20]
- 800acec: 4413 add r3, r2
- 800acee: 61bb str r3, [r7, #24]
- uint32_t length_message_type;
- arrToVar(length_message_type, (inbuffer + offset));
- 800acf0: 69bb ldr r3, [r7, #24]
- 800acf2: 683a ldr r2, [r7, #0]
- 800acf4: 441a add r2, r3
- 800acf6: f107 0310 add.w r3, r7, #16
- 800acfa: 4611 mov r1, r2
- 800acfc: 4618 mov r0, r3
- 800acfe: f000 fedc bl 800baba <_ZN3ros3Msg8arrToVarImPhEEvRT_T0_>
- offset += 4;
- 800ad02: 69bb ldr r3, [r7, #24]
- 800ad04: 3304 adds r3, #4
- 800ad06: 61bb str r3, [r7, #24]
- for(unsigned int k= offset; k< offset+length_message_type; ++k){
- 800ad08: 69bb ldr r3, [r7, #24]
- 800ad0a: 623b str r3, [r7, #32]
- 800ad0c: 69ba ldr r2, [r7, #24]
- 800ad0e: 693b ldr r3, [r7, #16]
- 800ad10: 4413 add r3, r2
- 800ad12: 6a3a ldr r2, [r7, #32]
- 800ad14: 429a cmp r2, r3
- 800ad16: d20c bcs.n 800ad32 <_ZN14rosserial_msgs9TopicInfo11deserializeEPh+0xe8>
- inbuffer[k-1]=inbuffer[k];
- 800ad18: 683a ldr r2, [r7, #0]
- 800ad1a: 6a3b ldr r3, [r7, #32]
- 800ad1c: 441a add r2, r3
- 800ad1e: 6a3b ldr r3, [r7, #32]
- 800ad20: 3b01 subs r3, #1
- 800ad22: 6839 ldr r1, [r7, #0]
- 800ad24: 440b add r3, r1
- 800ad26: 7812 ldrb r2, [r2, #0]
- 800ad28: 701a strb r2, [r3, #0]
- for(unsigned int k= offset; k< offset+length_message_type; ++k){
- 800ad2a: 6a3b ldr r3, [r7, #32]
- 800ad2c: 3301 adds r3, #1
- 800ad2e: 623b str r3, [r7, #32]
- 800ad30: e7ec b.n 800ad0c <_ZN14rosserial_msgs9TopicInfo11deserializeEPh+0xc2>
- }
- inbuffer[offset+length_message_type-1]=0;
- 800ad32: 69ba ldr r2, [r7, #24]
- 800ad34: 693b ldr r3, [r7, #16]
- 800ad36: 4413 add r3, r2
- 800ad38: 3b01 subs r3, #1
- 800ad3a: 683a ldr r2, [r7, #0]
- 800ad3c: 4413 add r3, r2
- 800ad3e: 2200 movs r2, #0
- 800ad40: 701a strb r2, [r3, #0]
- this->message_type = (char *)(inbuffer + offset-1);
- 800ad42: 69bb ldr r3, [r7, #24]
- 800ad44: 3b01 subs r3, #1
- 800ad46: 683a ldr r2, [r7, #0]
- 800ad48: 441a add r2, r3
- 800ad4a: 687b ldr r3, [r7, #4]
- 800ad4c: 60da str r2, [r3, #12]
- offset += length_message_type;
- 800ad4e: 69ba ldr r2, [r7, #24]
- 800ad50: 693b ldr r3, [r7, #16]
- 800ad52: 4413 add r3, r2
- 800ad54: 61bb str r3, [r7, #24]
- uint32_t length_md5sum;
- arrToVar(length_md5sum, (inbuffer + offset));
- 800ad56: 69bb ldr r3, [r7, #24]
- 800ad58: 683a ldr r2, [r7, #0]
- 800ad5a: 441a add r2, r3
- 800ad5c: f107 030c add.w r3, r7, #12
- 800ad60: 4611 mov r1, r2
- 800ad62: 4618 mov r0, r3
- 800ad64: f000 fea9 bl 800baba <_ZN3ros3Msg8arrToVarImPhEEvRT_T0_>
- offset += 4;
- 800ad68: 69bb ldr r3, [r7, #24]
- 800ad6a: 3304 adds r3, #4
- 800ad6c: 61bb str r3, [r7, #24]
- for(unsigned int k= offset; k< offset+length_md5sum; ++k){
- 800ad6e: 69bb ldr r3, [r7, #24]
- 800ad70: 61fb str r3, [r7, #28]
- 800ad72: 69ba ldr r2, [r7, #24]
- 800ad74: 68fb ldr r3, [r7, #12]
- 800ad76: 4413 add r3, r2
- 800ad78: 69fa ldr r2, [r7, #28]
- 800ad7a: 429a cmp r2, r3
- 800ad7c: d20c bcs.n 800ad98 <_ZN14rosserial_msgs9TopicInfo11deserializeEPh+0x14e>
- inbuffer[k-1]=inbuffer[k];
- 800ad7e: 683a ldr r2, [r7, #0]
- 800ad80: 69fb ldr r3, [r7, #28]
- 800ad82: 441a add r2, r3
- 800ad84: 69fb ldr r3, [r7, #28]
- 800ad86: 3b01 subs r3, #1
- 800ad88: 6839 ldr r1, [r7, #0]
- 800ad8a: 440b add r3, r1
- 800ad8c: 7812 ldrb r2, [r2, #0]
- 800ad8e: 701a strb r2, [r3, #0]
- for(unsigned int k= offset; k< offset+length_md5sum; ++k){
- 800ad90: 69fb ldr r3, [r7, #28]
- 800ad92: 3301 adds r3, #1
- 800ad94: 61fb str r3, [r7, #28]
- 800ad96: e7ec b.n 800ad72 <_ZN14rosserial_msgs9TopicInfo11deserializeEPh+0x128>
- }
- inbuffer[offset+length_md5sum-1]=0;
- 800ad98: 69ba ldr r2, [r7, #24]
- 800ad9a: 68fb ldr r3, [r7, #12]
- 800ad9c: 4413 add r3, r2
- 800ad9e: 3b01 subs r3, #1
- 800ada0: 683a ldr r2, [r7, #0]
- 800ada2: 4413 add r3, r2
- 800ada4: 2200 movs r2, #0
- 800ada6: 701a strb r2, [r3, #0]
- this->md5sum = (char *)(inbuffer + offset-1);
- 800ada8: 69bb ldr r3, [r7, #24]
- 800adaa: 3b01 subs r3, #1
- 800adac: 683a ldr r2, [r7, #0]
- 800adae: 441a add r2, r3
- 800adb0: 687b ldr r3, [r7, #4]
- 800adb2: 611a str r2, [r3, #16]
- offset += length_md5sum;
- 800adb4: 69ba ldr r2, [r7, #24]
- 800adb6: 68fb ldr r3, [r7, #12]
- 800adb8: 4413 add r3, r2
- 800adba: 61bb str r3, [r7, #24]
- union {
- int32_t real;
- uint32_t base;
- } u_buffer_size;
- u_buffer_size.base = 0;
- 800adbc: 2300 movs r3, #0
- 800adbe: 60bb str r3, [r7, #8]
- u_buffer_size.base |= ((uint32_t) (*(inbuffer + offset + 0))) << (8 * 0);
- 800adc0: 68bb ldr r3, [r7, #8]
- 800adc2: 69ba ldr r2, [r7, #24]
- 800adc4: 6839 ldr r1, [r7, #0]
- 800adc6: 440a add r2, r1
- 800adc8: 7812 ldrb r2, [r2, #0]
- 800adca: 4313 orrs r3, r2
- 800adcc: 60bb str r3, [r7, #8]
- u_buffer_size.base |= ((uint32_t) (*(inbuffer + offset + 1))) << (8 * 1);
- 800adce: 68ba ldr r2, [r7, #8]
- 800add0: 69bb ldr r3, [r7, #24]
- 800add2: 3301 adds r3, #1
- 800add4: 6839 ldr r1, [r7, #0]
- 800add6: 440b add r3, r1
- 800add8: 781b ldrb r3, [r3, #0]
- 800adda: 021b lsls r3, r3, #8
- 800addc: 4313 orrs r3, r2
- 800adde: 60bb str r3, [r7, #8]
- u_buffer_size.base |= ((uint32_t) (*(inbuffer + offset + 2))) << (8 * 2);
- 800ade0: 68ba ldr r2, [r7, #8]
- 800ade2: 69bb ldr r3, [r7, #24]
- 800ade4: 3302 adds r3, #2
- 800ade6: 6839 ldr r1, [r7, #0]
- 800ade8: 440b add r3, r1
- 800adea: 781b ldrb r3, [r3, #0]
- 800adec: 041b lsls r3, r3, #16
- 800adee: 4313 orrs r3, r2
- 800adf0: 60bb str r3, [r7, #8]
- u_buffer_size.base |= ((uint32_t) (*(inbuffer + offset + 3))) << (8 * 3);
- 800adf2: 68ba ldr r2, [r7, #8]
- 800adf4: 69bb ldr r3, [r7, #24]
- 800adf6: 3303 adds r3, #3
- 800adf8: 6839 ldr r1, [r7, #0]
- 800adfa: 440b add r3, r1
- 800adfc: 781b ldrb r3, [r3, #0]
- 800adfe: 061b lsls r3, r3, #24
- 800ae00: 4313 orrs r3, r2
- 800ae02: 60bb str r3, [r7, #8]
- this->buffer_size = u_buffer_size.real;
- 800ae04: 68ba ldr r2, [r7, #8]
- 800ae06: 687b ldr r3, [r7, #4]
- 800ae08: 615a str r2, [r3, #20]
- offset += sizeof(this->buffer_size);
- 800ae0a: 69bb ldr r3, [r7, #24]
- 800ae0c: 3304 adds r3, #4
- 800ae0e: 61bb str r3, [r7, #24]
- return offset;
- 800ae10: 69bb ldr r3, [r7, #24]
- }
- 800ae12: 4618 mov r0, r3
- 800ae14: 3728 adds r7, #40 ; 0x28
- 800ae16: 46bd mov sp, r7
- 800ae18: bd80 pop {r7, pc}
- ...
-
-0800ae1c <_ZN14rosserial_msgs9TopicInfo7getTypeEv>:
-
- const char * getType(){ return "rosserial_msgs/TopicInfo"; };
- 800ae1c: b480 push {r7}
- 800ae1e: b083 sub sp, #12
- 800ae20: af00 add r7, sp, #0
- 800ae22: 6078 str r0, [r7, #4]
- 800ae24: 4b03 ldr r3, [pc, #12] ; (800ae34 <_ZN14rosserial_msgs9TopicInfo7getTypeEv+0x18>)
- 800ae26: 4618 mov r0, r3
- 800ae28: 370c adds r7, #12
- 800ae2a: 46bd mov sp, r7
- 800ae2c: f85d 7b04 ldr.w r7, [sp], #4
- 800ae30: 4770 bx lr
- 800ae32: bf00 nop
- 800ae34: 08011a1c .word 0x08011a1c
-
-0800ae38 <_ZN14rosserial_msgs9TopicInfo6getMD5Ev>:
- const char * getMD5(){ return "0ad51f88fc44892f8c10684077646005"; };
- 800ae38: b480 push {r7}
- 800ae3a: b083 sub sp, #12
- 800ae3c: af00 add r7, sp, #0
- 800ae3e: 6078 str r0, [r7, #4]
- 800ae40: 4b03 ldr r3, [pc, #12] ; (800ae50 <_ZN14rosserial_msgs9TopicInfo6getMD5Ev+0x18>)
- 800ae42: 4618 mov r0, r3
- 800ae44: 370c adds r7, #12
- 800ae46: 46bd mov sp, r7
- 800ae48: f85d 7b04 ldr.w r7, [sp], #4
- 800ae4c: 4770 bx lr
- 800ae4e: bf00 nop
- 800ae50: 08011a38 .word 0x08011a38
-
-0800ae54 <_ZN14rosserial_msgs3LogC1Ev>:
- enum { INFO = 1 };
- enum { WARN = 2 };
- enum { ERROR = 3 };
- enum { FATAL = 4 };
-
- Log():
- 800ae54: b580 push {r7, lr}
- 800ae56: b082 sub sp, #8
- 800ae58: af00 add r7, sp, #0
- 800ae5a: 6078 str r0, [r7, #4]
- level(0),
- msg("")
- 800ae5c: 687b ldr r3, [r7, #4]
- 800ae5e: 4618 mov r0, r3
- 800ae60: f7ff fc86 bl 800a770 <_ZN3ros3MsgC1Ev>
- 800ae64: 4a06 ldr r2, [pc, #24] ; (800ae80 <_ZN14rosserial_msgs3LogC1Ev+0x2c>)
- 800ae66: 687b ldr r3, [r7, #4]
- 800ae68: 601a str r2, [r3, #0]
- 800ae6a: 687b ldr r3, [r7, #4]
- 800ae6c: 2200 movs r2, #0
- 800ae6e: 711a strb r2, [r3, #4]
- 800ae70: 687b ldr r3, [r7, #4]
- 800ae72: 4a04 ldr r2, [pc, #16] ; (800ae84 <_ZN14rosserial_msgs3LogC1Ev+0x30>)
- 800ae74: 609a str r2, [r3, #8]
- {
- }
- 800ae76: 687b ldr r3, [r7, #4]
- 800ae78: 4618 mov r0, r3
- 800ae7a: 3708 adds r7, #8
- 800ae7c: 46bd mov sp, r7
- 800ae7e: bd80 pop {r7, pc}
- 800ae80: 08012308 .word 0x08012308
- 800ae84: 080119b0 .word 0x080119b0
-
-0800ae88 <_ZNK14rosserial_msgs3Log9serializeEPh>:
-
- virtual int serialize(unsigned char *outbuffer) const
- 800ae88: b580 push {r7, lr}
- 800ae8a: b084 sub sp, #16
- 800ae8c: af00 add r7, sp, #0
- 800ae8e: 6078 str r0, [r7, #4]
- 800ae90: 6039 str r1, [r7, #0]
- {
- int offset = 0;
- 800ae92: 2300 movs r3, #0
- 800ae94: 60fb str r3, [r7, #12]
- *(outbuffer + offset + 0) = (this->level >> (8 * 0)) & 0xFF;
- 800ae96: 68fb ldr r3, [r7, #12]
- 800ae98: 683a ldr r2, [r7, #0]
- 800ae9a: 4413 add r3, r2
- 800ae9c: 687a ldr r2, [r7, #4]
- 800ae9e: 7912 ldrb r2, [r2, #4]
- 800aea0: 701a strb r2, [r3, #0]
- offset += sizeof(this->level);
- 800aea2: 68fb ldr r3, [r7, #12]
- 800aea4: 3301 adds r3, #1
- 800aea6: 60fb str r3, [r7, #12]
- uint32_t length_msg = strlen(this->msg);
- 800aea8: 687b ldr r3, [r7, #4]
- 800aeaa: 689b ldr r3, [r3, #8]
- 800aeac: 4618 mov r0, r3
- 800aeae: f7fb ff91 bl 8006dd4 <strlen>
- 800aeb2: 60b8 str r0, [r7, #8]
- varToArr(outbuffer + offset, length_msg);
- 800aeb4: 68fb ldr r3, [r7, #12]
- 800aeb6: 683a ldr r2, [r7, #0]
- 800aeb8: 4413 add r3, r2
- 800aeba: 68b9 ldr r1, [r7, #8]
- 800aebc: 4618 mov r0, r3
- 800aebe: f000 fdde bl 800ba7e <_ZN3ros3Msg8varToArrIPhmEEvT_T0_>
- offset += 4;
- 800aec2: 68fb ldr r3, [r7, #12]
- 800aec4: 3304 adds r3, #4
- 800aec6: 60fb str r3, [r7, #12]
- memcpy(outbuffer + offset, this->msg, length_msg);
- 800aec8: 68fb ldr r3, [r7, #12]
- 800aeca: 683a ldr r2, [r7, #0]
- 800aecc: 18d0 adds r0, r2, r3
- 800aece: 687b ldr r3, [r7, #4]
- 800aed0: 689b ldr r3, [r3, #8]
- 800aed2: 68ba ldr r2, [r7, #8]
- 800aed4: 4619 mov r1, r3
- 800aed6: f003 fa4e bl 800e376 <memcpy>
- offset += length_msg;
- 800aeda: 68fa ldr r2, [r7, #12]
- 800aedc: 68bb ldr r3, [r7, #8]
- 800aede: 4413 add r3, r2
- 800aee0: 60fb str r3, [r7, #12]
- return offset;
- 800aee2: 68fb ldr r3, [r7, #12]
- }
- 800aee4: 4618 mov r0, r3
- 800aee6: 3710 adds r7, #16
- 800aee8: 46bd mov sp, r7
- 800aeea: bd80 pop {r7, pc}
-
-0800aeec <_ZN14rosserial_msgs3Log11deserializeEPh>:
-
- virtual int deserialize(unsigned char *inbuffer)
- 800aeec: b580 push {r7, lr}
- 800aeee: b086 sub sp, #24
- 800aef0: af00 add r7, sp, #0
- 800aef2: 6078 str r0, [r7, #4]
- 800aef4: 6039 str r1, [r7, #0]
- {
- int offset = 0;
- 800aef6: 2300 movs r3, #0
- 800aef8: 613b str r3, [r7, #16]
- this->level = ((uint8_t) (*(inbuffer + offset)));
- 800aefa: 693b ldr r3, [r7, #16]
- 800aefc: 683a ldr r2, [r7, #0]
- 800aefe: 4413 add r3, r2
- 800af00: 781a ldrb r2, [r3, #0]
- 800af02: 687b ldr r3, [r7, #4]
- 800af04: 711a strb r2, [r3, #4]
- offset += sizeof(this->level);
- 800af06: 693b ldr r3, [r7, #16]
- 800af08: 3301 adds r3, #1
- 800af0a: 613b str r3, [r7, #16]
- uint32_t length_msg;
- arrToVar(length_msg, (inbuffer + offset));
- 800af0c: 693b ldr r3, [r7, #16]
- 800af0e: 683a ldr r2, [r7, #0]
- 800af10: 441a add r2, r3
- 800af12: f107 030c add.w r3, r7, #12
- 800af16: 4611 mov r1, r2
- 800af18: 4618 mov r0, r3
- 800af1a: f000 fdce bl 800baba <_ZN3ros3Msg8arrToVarImPhEEvRT_T0_>
- offset += 4;
- 800af1e: 693b ldr r3, [r7, #16]
- 800af20: 3304 adds r3, #4
- 800af22: 613b str r3, [r7, #16]
- for(unsigned int k= offset; k< offset+length_msg; ++k){
- 800af24: 693b ldr r3, [r7, #16]
- 800af26: 617b str r3, [r7, #20]
- 800af28: 693a ldr r2, [r7, #16]
- 800af2a: 68fb ldr r3, [r7, #12]
- 800af2c: 4413 add r3, r2
- 800af2e: 697a ldr r2, [r7, #20]
- 800af30: 429a cmp r2, r3
- 800af32: d20c bcs.n 800af4e <_ZN14rosserial_msgs3Log11deserializeEPh+0x62>
- inbuffer[k-1]=inbuffer[k];
- 800af34: 683a ldr r2, [r7, #0]
- 800af36: 697b ldr r3, [r7, #20]
- 800af38: 441a add r2, r3
- 800af3a: 697b ldr r3, [r7, #20]
- 800af3c: 3b01 subs r3, #1
- 800af3e: 6839 ldr r1, [r7, #0]
- 800af40: 440b add r3, r1
- 800af42: 7812 ldrb r2, [r2, #0]
- 800af44: 701a strb r2, [r3, #0]
- for(unsigned int k= offset; k< offset+length_msg; ++k){
- 800af46: 697b ldr r3, [r7, #20]
- 800af48: 3301 adds r3, #1
- 800af4a: 617b str r3, [r7, #20]
- 800af4c: e7ec b.n 800af28 <_ZN14rosserial_msgs3Log11deserializeEPh+0x3c>
- }
- inbuffer[offset+length_msg-1]=0;
- 800af4e: 693a ldr r2, [r7, #16]
- 800af50: 68fb ldr r3, [r7, #12]
- 800af52: 4413 add r3, r2
- 800af54: 3b01 subs r3, #1
- 800af56: 683a ldr r2, [r7, #0]
- 800af58: 4413 add r3, r2
- 800af5a: 2200 movs r2, #0
- 800af5c: 701a strb r2, [r3, #0]
- this->msg = (char *)(inbuffer + offset-1);
- 800af5e: 693b ldr r3, [r7, #16]
- 800af60: 3b01 subs r3, #1
- 800af62: 683a ldr r2, [r7, #0]
- 800af64: 441a add r2, r3
- 800af66: 687b ldr r3, [r7, #4]
- 800af68: 609a str r2, [r3, #8]
- offset += length_msg;
- 800af6a: 693a ldr r2, [r7, #16]
- 800af6c: 68fb ldr r3, [r7, #12]
- 800af6e: 4413 add r3, r2
- 800af70: 613b str r3, [r7, #16]
- return offset;
- 800af72: 693b ldr r3, [r7, #16]
- }
- 800af74: 4618 mov r0, r3
- 800af76: 3718 adds r7, #24
- 800af78: 46bd mov sp, r7
- 800af7a: bd80 pop {r7, pc}
-
-0800af7c <_ZN14rosserial_msgs3Log7getTypeEv>:
-
- const char * getType(){ return "rosserial_msgs/Log"; };
- 800af7c: b480 push {r7}
- 800af7e: b083 sub sp, #12
- 800af80: af00 add r7, sp, #0
- 800af82: 6078 str r0, [r7, #4]
- 800af84: 4b03 ldr r3, [pc, #12] ; (800af94 <_ZN14rosserial_msgs3Log7getTypeEv+0x18>)
- 800af86: 4618 mov r0, r3
- 800af88: 370c adds r7, #12
- 800af8a: 46bd mov sp, r7
- 800af8c: f85d 7b04 ldr.w r7, [sp], #4
- 800af90: 4770 bx lr
- 800af92: bf00 nop
- 800af94: 08011a5c .word 0x08011a5c
-
-0800af98 <_ZN14rosserial_msgs3Log6getMD5Ev>:
- const char * getMD5(){ return "11abd731c25933261cd6183bd12d6295"; };
- 800af98: b480 push {r7}
- 800af9a: b083 sub sp, #12
- 800af9c: af00 add r7, sp, #0
- 800af9e: 6078 str r0, [r7, #4]
- 800afa0: 4b03 ldr r3, [pc, #12] ; (800afb0 <_ZN14rosserial_msgs3Log6getMD5Ev+0x18>)
- 800afa2: 4618 mov r0, r3
- 800afa4: 370c adds r7, #12
- 800afa6: 46bd mov sp, r7
- 800afa8: f85d 7b04 ldr.w r7, [sp], #4
- 800afac: 4770 bx lr
- 800afae: bf00 nop
- 800afb0: 08011a70 .word 0x08011a70
-
-0800afb4 <_ZN14rosserial_msgs20RequestParamResponseC1Ev>:
- uint32_t strings_length;
- typedef char* _strings_type;
- _strings_type st_strings;
- _strings_type * strings;
-
- RequestParamResponse():
- 800afb4: b580 push {r7, lr}
- 800afb6: b082 sub sp, #8
- 800afb8: af00 add r7, sp, #0
- 800afba: 6078 str r0, [r7, #4]
- ints_length(0), ints(NULL),
- floats_length(0), floats(NULL),
- strings_length(0), strings(NULL)
- 800afbc: 687b ldr r3, [r7, #4]
- 800afbe: 4618 mov r0, r3
- 800afc0: f7ff fbd6 bl 800a770 <_ZN3ros3MsgC1Ev>
- 800afc4: 4a0c ldr r2, [pc, #48] ; (800aff8 <_ZN14rosserial_msgs20RequestParamResponseC1Ev+0x44>)
- 800afc6: 687b ldr r3, [r7, #4]
- 800afc8: 601a str r2, [r3, #0]
- 800afca: 687b ldr r3, [r7, #4]
- 800afcc: 2200 movs r2, #0
- 800afce: 605a str r2, [r3, #4]
- 800afd0: 687b ldr r3, [r7, #4]
- 800afd2: 2200 movs r2, #0
- 800afd4: 60da str r2, [r3, #12]
- 800afd6: 687b ldr r3, [r7, #4]
- 800afd8: 2200 movs r2, #0
- 800afda: 611a str r2, [r3, #16]
- 800afdc: 687b ldr r3, [r7, #4]
- 800afde: 2200 movs r2, #0
- 800afe0: 619a str r2, [r3, #24]
- 800afe2: 687b ldr r3, [r7, #4]
- 800afe4: 2200 movs r2, #0
- 800afe6: 61da str r2, [r3, #28]
- 800afe8: 687b ldr r3, [r7, #4]
- 800afea: 2200 movs r2, #0
- 800afec: 625a str r2, [r3, #36] ; 0x24
- {
- }
- 800afee: 687b ldr r3, [r7, #4]
- 800aff0: 4618 mov r0, r3
- 800aff2: 3708 adds r7, #8
- 800aff4: 46bd mov sp, r7
- 800aff6: bd80 pop {r7, pc}
- 800aff8: 080122f0 .word 0x080122f0
-
-0800affc <_ZNK14rosserial_msgs20RequestParamResponse9serializeEPh>:
-
- virtual int serialize(unsigned char *outbuffer) const
- 800affc: b580 push {r7, lr}
- 800affe: b08a sub sp, #40 ; 0x28
- 800b000: af00 add r7, sp, #0
- 800b002: 6078 str r0, [r7, #4]
- 800b004: 6039 str r1, [r7, #0]
- {
- int offset = 0;
- 800b006: 2300 movs r3, #0
- 800b008: 627b str r3, [r7, #36] ; 0x24
- *(outbuffer + offset + 0) = (this->ints_length >> (8 * 0)) & 0xFF;
- 800b00a: 687b ldr r3, [r7, #4]
- 800b00c: 6859 ldr r1, [r3, #4]
- 800b00e: 6a7b ldr r3, [r7, #36] ; 0x24
- 800b010: 683a ldr r2, [r7, #0]
- 800b012: 4413 add r3, r2
- 800b014: b2ca uxtb r2, r1
- 800b016: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 1) = (this->ints_length >> (8 * 1)) & 0xFF;
- 800b018: 687b ldr r3, [r7, #4]
- 800b01a: 685b ldr r3, [r3, #4]
- 800b01c: 0a19 lsrs r1, r3, #8
- 800b01e: 6a7b ldr r3, [r7, #36] ; 0x24
- 800b020: 3301 adds r3, #1
- 800b022: 683a ldr r2, [r7, #0]
- 800b024: 4413 add r3, r2
- 800b026: b2ca uxtb r2, r1
- 800b028: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 2) = (this->ints_length >> (8 * 2)) & 0xFF;
- 800b02a: 687b ldr r3, [r7, #4]
- 800b02c: 685b ldr r3, [r3, #4]
- 800b02e: 0c19 lsrs r1, r3, #16
- 800b030: 6a7b ldr r3, [r7, #36] ; 0x24
- 800b032: 3302 adds r3, #2
- 800b034: 683a ldr r2, [r7, #0]
- 800b036: 4413 add r3, r2
- 800b038: b2ca uxtb r2, r1
- 800b03a: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 3) = (this->ints_length >> (8 * 3)) & 0xFF;
- 800b03c: 687b ldr r3, [r7, #4]
- 800b03e: 685b ldr r3, [r3, #4]
- 800b040: 0e19 lsrs r1, r3, #24
- 800b042: 6a7b ldr r3, [r7, #36] ; 0x24
- 800b044: 3303 adds r3, #3
- 800b046: 683a ldr r2, [r7, #0]
- 800b048: 4413 add r3, r2
- 800b04a: b2ca uxtb r2, r1
- 800b04c: 701a strb r2, [r3, #0]
- offset += sizeof(this->ints_length);
- 800b04e: 6a7b ldr r3, [r7, #36] ; 0x24
- 800b050: 3304 adds r3, #4
- 800b052: 627b str r3, [r7, #36] ; 0x24
- for( uint32_t i = 0; i < ints_length; i++){
- 800b054: 2300 movs r3, #0
- 800b056: 623b str r3, [r7, #32]
- 800b058: 687b ldr r3, [r7, #4]
- 800b05a: 685b ldr r3, [r3, #4]
- 800b05c: 6a3a ldr r2, [r7, #32]
- 800b05e: 429a cmp r2, r3
- 800b060: d22b bcs.n 800b0ba <_ZNK14rosserial_msgs20RequestParamResponse9serializeEPh+0xbe>
- union {
- int32_t real;
- uint32_t base;
- } u_intsi;
- u_intsi.real = this->ints[i];
- 800b062: 687b ldr r3, [r7, #4]
- 800b064: 68da ldr r2, [r3, #12]
- 800b066: 6a3b ldr r3, [r7, #32]
- 800b068: 009b lsls r3, r3, #2
- 800b06a: 4413 add r3, r2
- 800b06c: 681b ldr r3, [r3, #0]
- 800b06e: 613b str r3, [r7, #16]
- *(outbuffer + offset + 0) = (u_intsi.base >> (8 * 0)) & 0xFF;
- 800b070: 6939 ldr r1, [r7, #16]
- 800b072: 6a7b ldr r3, [r7, #36] ; 0x24
- 800b074: 683a ldr r2, [r7, #0]
- 800b076: 4413 add r3, r2
- 800b078: b2ca uxtb r2, r1
- 800b07a: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 1) = (u_intsi.base >> (8 * 1)) & 0xFF;
- 800b07c: 693b ldr r3, [r7, #16]
- 800b07e: 0a19 lsrs r1, r3, #8
- 800b080: 6a7b ldr r3, [r7, #36] ; 0x24
- 800b082: 3301 adds r3, #1
- 800b084: 683a ldr r2, [r7, #0]
- 800b086: 4413 add r3, r2
- 800b088: b2ca uxtb r2, r1
- 800b08a: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 2) = (u_intsi.base >> (8 * 2)) & 0xFF;
- 800b08c: 693b ldr r3, [r7, #16]
- 800b08e: 0c19 lsrs r1, r3, #16
- 800b090: 6a7b ldr r3, [r7, #36] ; 0x24
- 800b092: 3302 adds r3, #2
- 800b094: 683a ldr r2, [r7, #0]
- 800b096: 4413 add r3, r2
- 800b098: b2ca uxtb r2, r1
- 800b09a: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 3) = (u_intsi.base >> (8 * 3)) & 0xFF;
- 800b09c: 693b ldr r3, [r7, #16]
- 800b09e: 0e19 lsrs r1, r3, #24
- 800b0a0: 6a7b ldr r3, [r7, #36] ; 0x24
- 800b0a2: 3303 adds r3, #3
- 800b0a4: 683a ldr r2, [r7, #0]
- 800b0a6: 4413 add r3, r2
- 800b0a8: b2ca uxtb r2, r1
- 800b0aa: 701a strb r2, [r3, #0]
- offset += sizeof(this->ints[i]);
- 800b0ac: 6a7b ldr r3, [r7, #36] ; 0x24
- 800b0ae: 3304 adds r3, #4
- 800b0b0: 627b str r3, [r7, #36] ; 0x24
- for( uint32_t i = 0; i < ints_length; i++){
- 800b0b2: 6a3b ldr r3, [r7, #32]
- 800b0b4: 3301 adds r3, #1
- 800b0b6: 623b str r3, [r7, #32]
- 800b0b8: e7ce b.n 800b058 <_ZNK14rosserial_msgs20RequestParamResponse9serializeEPh+0x5c>
- }
- *(outbuffer + offset + 0) = (this->floats_length >> (8 * 0)) & 0xFF;
- 800b0ba: 687b ldr r3, [r7, #4]
- 800b0bc: 6919 ldr r1, [r3, #16]
- 800b0be: 6a7b ldr r3, [r7, #36] ; 0x24
- 800b0c0: 683a ldr r2, [r7, #0]
- 800b0c2: 4413 add r3, r2
- 800b0c4: b2ca uxtb r2, r1
- 800b0c6: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 1) = (this->floats_length >> (8 * 1)) & 0xFF;
- 800b0c8: 687b ldr r3, [r7, #4]
- 800b0ca: 691b ldr r3, [r3, #16]
- 800b0cc: 0a19 lsrs r1, r3, #8
- 800b0ce: 6a7b ldr r3, [r7, #36] ; 0x24
- 800b0d0: 3301 adds r3, #1
- 800b0d2: 683a ldr r2, [r7, #0]
- 800b0d4: 4413 add r3, r2
- 800b0d6: b2ca uxtb r2, r1
- 800b0d8: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 2) = (this->floats_length >> (8 * 2)) & 0xFF;
- 800b0da: 687b ldr r3, [r7, #4]
- 800b0dc: 691b ldr r3, [r3, #16]
- 800b0de: 0c19 lsrs r1, r3, #16
- 800b0e0: 6a7b ldr r3, [r7, #36] ; 0x24
- 800b0e2: 3302 adds r3, #2
- 800b0e4: 683a ldr r2, [r7, #0]
- 800b0e6: 4413 add r3, r2
- 800b0e8: b2ca uxtb r2, r1
- 800b0ea: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 3) = (this->floats_length >> (8 * 3)) & 0xFF;
- 800b0ec: 687b ldr r3, [r7, #4]
- 800b0ee: 691b ldr r3, [r3, #16]
- 800b0f0: 0e19 lsrs r1, r3, #24
- 800b0f2: 6a7b ldr r3, [r7, #36] ; 0x24
- 800b0f4: 3303 adds r3, #3
- 800b0f6: 683a ldr r2, [r7, #0]
- 800b0f8: 4413 add r3, r2
- 800b0fa: b2ca uxtb r2, r1
- 800b0fc: 701a strb r2, [r3, #0]
- offset += sizeof(this->floats_length);
- 800b0fe: 6a7b ldr r3, [r7, #36] ; 0x24
- 800b100: 3304 adds r3, #4
- 800b102: 627b str r3, [r7, #36] ; 0x24
- for( uint32_t i = 0; i < floats_length; i++){
- 800b104: 2300 movs r3, #0
- 800b106: 61fb str r3, [r7, #28]
- 800b108: 687b ldr r3, [r7, #4]
- 800b10a: 691b ldr r3, [r3, #16]
- 800b10c: 69fa ldr r2, [r7, #28]
- 800b10e: 429a cmp r2, r3
- 800b110: d22b bcs.n 800b16a <_ZNK14rosserial_msgs20RequestParamResponse9serializeEPh+0x16e>
- union {
- float real;
- uint32_t base;
- } u_floatsi;
- u_floatsi.real = this->floats[i];
- 800b112: 687b ldr r3, [r7, #4]
- 800b114: 699a ldr r2, [r3, #24]
- 800b116: 69fb ldr r3, [r7, #28]
- 800b118: 009b lsls r3, r3, #2
- 800b11a: 4413 add r3, r2
- 800b11c: 681b ldr r3, [r3, #0]
- 800b11e: 60fb str r3, [r7, #12]
- *(outbuffer + offset + 0) = (u_floatsi.base >> (8 * 0)) & 0xFF;
- 800b120: 68f9 ldr r1, [r7, #12]
- 800b122: 6a7b ldr r3, [r7, #36] ; 0x24
- 800b124: 683a ldr r2, [r7, #0]
- 800b126: 4413 add r3, r2
- 800b128: b2ca uxtb r2, r1
- 800b12a: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 1) = (u_floatsi.base >> (8 * 1)) & 0xFF;
- 800b12c: 68fb ldr r3, [r7, #12]
- 800b12e: 0a19 lsrs r1, r3, #8
- 800b130: 6a7b ldr r3, [r7, #36] ; 0x24
- 800b132: 3301 adds r3, #1
- 800b134: 683a ldr r2, [r7, #0]
- 800b136: 4413 add r3, r2
- 800b138: b2ca uxtb r2, r1
- 800b13a: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 2) = (u_floatsi.base >> (8 * 2)) & 0xFF;
- 800b13c: 68fb ldr r3, [r7, #12]
- 800b13e: 0c19 lsrs r1, r3, #16
- 800b140: 6a7b ldr r3, [r7, #36] ; 0x24
- 800b142: 3302 adds r3, #2
- 800b144: 683a ldr r2, [r7, #0]
- 800b146: 4413 add r3, r2
- 800b148: b2ca uxtb r2, r1
- 800b14a: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 3) = (u_floatsi.base >> (8 * 3)) & 0xFF;
- 800b14c: 68fb ldr r3, [r7, #12]
- 800b14e: 0e19 lsrs r1, r3, #24
- 800b150: 6a7b ldr r3, [r7, #36] ; 0x24
- 800b152: 3303 adds r3, #3
- 800b154: 683a ldr r2, [r7, #0]
- 800b156: 4413 add r3, r2
- 800b158: b2ca uxtb r2, r1
- 800b15a: 701a strb r2, [r3, #0]
- offset += sizeof(this->floats[i]);
- 800b15c: 6a7b ldr r3, [r7, #36] ; 0x24
- 800b15e: 3304 adds r3, #4
- 800b160: 627b str r3, [r7, #36] ; 0x24
- for( uint32_t i = 0; i < floats_length; i++){
- 800b162: 69fb ldr r3, [r7, #28]
- 800b164: 3301 adds r3, #1
- 800b166: 61fb str r3, [r7, #28]
- 800b168: e7ce b.n 800b108 <_ZNK14rosserial_msgs20RequestParamResponse9serializeEPh+0x10c>
- }
- *(outbuffer + offset + 0) = (this->strings_length >> (8 * 0)) & 0xFF;
- 800b16a: 687b ldr r3, [r7, #4]
- 800b16c: 69d9 ldr r1, [r3, #28]
- 800b16e: 6a7b ldr r3, [r7, #36] ; 0x24
- 800b170: 683a ldr r2, [r7, #0]
- 800b172: 4413 add r3, r2
- 800b174: b2ca uxtb r2, r1
- 800b176: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 1) = (this->strings_length >> (8 * 1)) & 0xFF;
- 800b178: 687b ldr r3, [r7, #4]
- 800b17a: 69db ldr r3, [r3, #28]
- 800b17c: 0a19 lsrs r1, r3, #8
- 800b17e: 6a7b ldr r3, [r7, #36] ; 0x24
- 800b180: 3301 adds r3, #1
- 800b182: 683a ldr r2, [r7, #0]
- 800b184: 4413 add r3, r2
- 800b186: b2ca uxtb r2, r1
- 800b188: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 2) = (this->strings_length >> (8 * 2)) & 0xFF;
- 800b18a: 687b ldr r3, [r7, #4]
- 800b18c: 69db ldr r3, [r3, #28]
- 800b18e: 0c19 lsrs r1, r3, #16
- 800b190: 6a7b ldr r3, [r7, #36] ; 0x24
- 800b192: 3302 adds r3, #2
- 800b194: 683a ldr r2, [r7, #0]
- 800b196: 4413 add r3, r2
- 800b198: b2ca uxtb r2, r1
- 800b19a: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 3) = (this->strings_length >> (8 * 3)) & 0xFF;
- 800b19c: 687b ldr r3, [r7, #4]
- 800b19e: 69db ldr r3, [r3, #28]
- 800b1a0: 0e19 lsrs r1, r3, #24
- 800b1a2: 6a7b ldr r3, [r7, #36] ; 0x24
- 800b1a4: 3303 adds r3, #3
- 800b1a6: 683a ldr r2, [r7, #0]
- 800b1a8: 4413 add r3, r2
- 800b1aa: b2ca uxtb r2, r1
- 800b1ac: 701a strb r2, [r3, #0]
- offset += sizeof(this->strings_length);
- 800b1ae: 6a7b ldr r3, [r7, #36] ; 0x24
- 800b1b0: 3304 adds r3, #4
- 800b1b2: 627b str r3, [r7, #36] ; 0x24
- for( uint32_t i = 0; i < strings_length; i++){
- 800b1b4: 2300 movs r3, #0
- 800b1b6: 61bb str r3, [r7, #24]
- 800b1b8: 687b ldr r3, [r7, #4]
- 800b1ba: 69db ldr r3, [r3, #28]
- 800b1bc: 69ba ldr r2, [r7, #24]
- 800b1be: 429a cmp r2, r3
- 800b1c0: d228 bcs.n 800b214 <_ZNK14rosserial_msgs20RequestParamResponse9serializeEPh+0x218>
- uint32_t length_stringsi = strlen(this->strings[i]);
- 800b1c2: 687b ldr r3, [r7, #4]
- 800b1c4: 6a5a ldr r2, [r3, #36] ; 0x24
- 800b1c6: 69bb ldr r3, [r7, #24]
- 800b1c8: 009b lsls r3, r3, #2
- 800b1ca: 4413 add r3, r2
- 800b1cc: 681b ldr r3, [r3, #0]
- 800b1ce: 4618 mov r0, r3
- 800b1d0: f7fb fe00 bl 8006dd4 <strlen>
- 800b1d4: 6178 str r0, [r7, #20]
- varToArr(outbuffer + offset, length_stringsi);
- 800b1d6: 6a7b ldr r3, [r7, #36] ; 0x24
- 800b1d8: 683a ldr r2, [r7, #0]
- 800b1da: 4413 add r3, r2
- 800b1dc: 6979 ldr r1, [r7, #20]
- 800b1de: 4618 mov r0, r3
- 800b1e0: f000 fc4d bl 800ba7e <_ZN3ros3Msg8varToArrIPhmEEvT_T0_>
- offset += 4;
- 800b1e4: 6a7b ldr r3, [r7, #36] ; 0x24
- 800b1e6: 3304 adds r3, #4
- 800b1e8: 627b str r3, [r7, #36] ; 0x24
- memcpy(outbuffer + offset, this->strings[i], length_stringsi);
- 800b1ea: 6a7b ldr r3, [r7, #36] ; 0x24
- 800b1ec: 683a ldr r2, [r7, #0]
- 800b1ee: 18d0 adds r0, r2, r3
- 800b1f0: 687b ldr r3, [r7, #4]
- 800b1f2: 6a5a ldr r2, [r3, #36] ; 0x24
- 800b1f4: 69bb ldr r3, [r7, #24]
- 800b1f6: 009b lsls r3, r3, #2
- 800b1f8: 4413 add r3, r2
- 800b1fa: 681b ldr r3, [r3, #0]
- 800b1fc: 697a ldr r2, [r7, #20]
- 800b1fe: 4619 mov r1, r3
- 800b200: f003 f8b9 bl 800e376 <memcpy>
- offset += length_stringsi;
- 800b204: 6a7a ldr r2, [r7, #36] ; 0x24
- 800b206: 697b ldr r3, [r7, #20]
- 800b208: 4413 add r3, r2
- 800b20a: 627b str r3, [r7, #36] ; 0x24
- for( uint32_t i = 0; i < strings_length; i++){
- 800b20c: 69bb ldr r3, [r7, #24]
- 800b20e: 3301 adds r3, #1
- 800b210: 61bb str r3, [r7, #24]
- 800b212: e7d1 b.n 800b1b8 <_ZNK14rosserial_msgs20RequestParamResponse9serializeEPh+0x1bc>
- }
- return offset;
- 800b214: 6a7b ldr r3, [r7, #36] ; 0x24
- }
- 800b216: 4618 mov r0, r3
- 800b218: 3728 adds r7, #40 ; 0x28
- 800b21a: 46bd mov sp, r7
- 800b21c: bd80 pop {r7, pc}
-
-0800b21e <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh>:
-
- virtual int deserialize(unsigned char *inbuffer)
- 800b21e: b580 push {r7, lr}
- 800b220: b08e sub sp, #56 ; 0x38
- 800b222: af00 add r7, sp, #0
- 800b224: 6078 str r0, [r7, #4]
- 800b226: 6039 str r1, [r7, #0]
- {
- int offset = 0;
- 800b228: 2300 movs r3, #0
- 800b22a: 637b str r3, [r7, #52] ; 0x34
- uint32_t ints_lengthT = ((uint32_t) (*(inbuffer + offset)));
- 800b22c: 6b7b ldr r3, [r7, #52] ; 0x34
- 800b22e: 683a ldr r2, [r7, #0]
- 800b230: 4413 add r3, r2
- 800b232: 781b ldrb r3, [r3, #0]
- 800b234: 623b str r3, [r7, #32]
- ints_lengthT |= ((uint32_t) (*(inbuffer + offset + 1))) << (8 * 1);
- 800b236: 6b7b ldr r3, [r7, #52] ; 0x34
- 800b238: 3301 adds r3, #1
- 800b23a: 683a ldr r2, [r7, #0]
- 800b23c: 4413 add r3, r2
- 800b23e: 781b ldrb r3, [r3, #0]
- 800b240: 021b lsls r3, r3, #8
- 800b242: 6a3a ldr r2, [r7, #32]
- 800b244: 4313 orrs r3, r2
- 800b246: 623b str r3, [r7, #32]
- ints_lengthT |= ((uint32_t) (*(inbuffer + offset + 2))) << (8 * 2);
- 800b248: 6b7b ldr r3, [r7, #52] ; 0x34
- 800b24a: 3302 adds r3, #2
- 800b24c: 683a ldr r2, [r7, #0]
- 800b24e: 4413 add r3, r2
- 800b250: 781b ldrb r3, [r3, #0]
- 800b252: 041b lsls r3, r3, #16
- 800b254: 6a3a ldr r2, [r7, #32]
- 800b256: 4313 orrs r3, r2
- 800b258: 623b str r3, [r7, #32]
- ints_lengthT |= ((uint32_t) (*(inbuffer + offset + 3))) << (8 * 3);
- 800b25a: 6b7b ldr r3, [r7, #52] ; 0x34
- 800b25c: 3303 adds r3, #3
- 800b25e: 683a ldr r2, [r7, #0]
- 800b260: 4413 add r3, r2
- 800b262: 781b ldrb r3, [r3, #0]
- 800b264: 061b lsls r3, r3, #24
- 800b266: 6a3a ldr r2, [r7, #32]
- 800b268: 4313 orrs r3, r2
- 800b26a: 623b str r3, [r7, #32]
- offset += sizeof(this->ints_length);
- 800b26c: 6b7b ldr r3, [r7, #52] ; 0x34
- 800b26e: 3304 adds r3, #4
- 800b270: 637b str r3, [r7, #52] ; 0x34
- if(ints_lengthT > ints_length)
- 800b272: 687b ldr r3, [r7, #4]
- 800b274: 685b ldr r3, [r3, #4]
- 800b276: 6a3a ldr r2, [r7, #32]
- 800b278: 429a cmp r2, r3
- 800b27a: d90a bls.n 800b292 <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x74>
- this->ints = (int32_t*)realloc(this->ints, ints_lengthT * sizeof(int32_t));
- 800b27c: 687b ldr r3, [r7, #4]
- 800b27e: 68da ldr r2, [r3, #12]
- 800b280: 6a3b ldr r3, [r7, #32]
- 800b282: 009b lsls r3, r3, #2
- 800b284: 4619 mov r1, r3
- 800b286: 4610 mov r0, r2
- 800b288: f003 f8e2 bl 800e450 <realloc>
- 800b28c: 4602 mov r2, r0
- 800b28e: 687b ldr r3, [r7, #4]
- 800b290: 60da str r2, [r3, #12]
- ints_length = ints_lengthT;
- 800b292: 687b ldr r3, [r7, #4]
- 800b294: 6a3a ldr r2, [r7, #32]
- 800b296: 605a str r2, [r3, #4]
- for( uint32_t i = 0; i < ints_length; i++){
- 800b298: 2300 movs r3, #0
- 800b29a: 633b str r3, [r7, #48] ; 0x30
- 800b29c: 687b ldr r3, [r7, #4]
- 800b29e: 685b ldr r3, [r3, #4]
- 800b2a0: 6b3a ldr r2, [r7, #48] ; 0x30
- 800b2a2: 429a cmp r2, r3
- 800b2a4: d236 bcs.n 800b314 <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0xf6>
- union {
- int32_t real;
- uint32_t base;
- } u_st_ints;
- u_st_ints.base = 0;
- 800b2a6: 2300 movs r3, #0
- 800b2a8: 617b str r3, [r7, #20]
- u_st_ints.base |= ((uint32_t) (*(inbuffer + offset + 0))) << (8 * 0);
- 800b2aa: 697b ldr r3, [r7, #20]
- 800b2ac: 6b7a ldr r2, [r7, #52] ; 0x34
- 800b2ae: 6839 ldr r1, [r7, #0]
- 800b2b0: 440a add r2, r1
- 800b2b2: 7812 ldrb r2, [r2, #0]
- 800b2b4: 4313 orrs r3, r2
- 800b2b6: 617b str r3, [r7, #20]
- u_st_ints.base |= ((uint32_t) (*(inbuffer + offset + 1))) << (8 * 1);
- 800b2b8: 697a ldr r2, [r7, #20]
- 800b2ba: 6b7b ldr r3, [r7, #52] ; 0x34
- 800b2bc: 3301 adds r3, #1
- 800b2be: 6839 ldr r1, [r7, #0]
- 800b2c0: 440b add r3, r1
- 800b2c2: 781b ldrb r3, [r3, #0]
- 800b2c4: 021b lsls r3, r3, #8
- 800b2c6: 4313 orrs r3, r2
- 800b2c8: 617b str r3, [r7, #20]
- u_st_ints.base |= ((uint32_t) (*(inbuffer + offset + 2))) << (8 * 2);
- 800b2ca: 697a ldr r2, [r7, #20]
- 800b2cc: 6b7b ldr r3, [r7, #52] ; 0x34
- 800b2ce: 3302 adds r3, #2
- 800b2d0: 6839 ldr r1, [r7, #0]
- 800b2d2: 440b add r3, r1
- 800b2d4: 781b ldrb r3, [r3, #0]
- 800b2d6: 041b lsls r3, r3, #16
- 800b2d8: 4313 orrs r3, r2
- 800b2da: 617b str r3, [r7, #20]
- u_st_ints.base |= ((uint32_t) (*(inbuffer + offset + 3))) << (8 * 3);
- 800b2dc: 697a ldr r2, [r7, #20]
- 800b2de: 6b7b ldr r3, [r7, #52] ; 0x34
- 800b2e0: 3303 adds r3, #3
- 800b2e2: 6839 ldr r1, [r7, #0]
- 800b2e4: 440b add r3, r1
- 800b2e6: 781b ldrb r3, [r3, #0]
- 800b2e8: 061b lsls r3, r3, #24
- 800b2ea: 4313 orrs r3, r2
- 800b2ec: 617b str r3, [r7, #20]
- this->st_ints = u_st_ints.real;
- 800b2ee: 697a ldr r2, [r7, #20]
- 800b2f0: 687b ldr r3, [r7, #4]
- 800b2f2: 609a str r2, [r3, #8]
- offset += sizeof(this->st_ints);
- 800b2f4: 6b7b ldr r3, [r7, #52] ; 0x34
- 800b2f6: 3304 adds r3, #4
- 800b2f8: 637b str r3, [r7, #52] ; 0x34
- memcpy( &(this->ints[i]), &(this->st_ints), sizeof(int32_t));
- 800b2fa: 687b ldr r3, [r7, #4]
- 800b2fc: 68da ldr r2, [r3, #12]
- 800b2fe: 6b3b ldr r3, [r7, #48] ; 0x30
- 800b300: 009b lsls r3, r3, #2
- 800b302: 4413 add r3, r2
- 800b304: 687a ldr r2, [r7, #4]
- 800b306: 3208 adds r2, #8
- 800b308: 6812 ldr r2, [r2, #0]
- 800b30a: 601a str r2, [r3, #0]
- for( uint32_t i = 0; i < ints_length; i++){
- 800b30c: 6b3b ldr r3, [r7, #48] ; 0x30
- 800b30e: 3301 adds r3, #1
- 800b310: 633b str r3, [r7, #48] ; 0x30
- 800b312: e7c3 b.n 800b29c <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x7e>
- }
- uint32_t floats_lengthT = ((uint32_t) (*(inbuffer + offset)));
- 800b314: 6b7b ldr r3, [r7, #52] ; 0x34
- 800b316: 683a ldr r2, [r7, #0]
- 800b318: 4413 add r3, r2
- 800b31a: 781b ldrb r3, [r3, #0]
- 800b31c: 61fb str r3, [r7, #28]
- floats_lengthT |= ((uint32_t) (*(inbuffer + offset + 1))) << (8 * 1);
- 800b31e: 6b7b ldr r3, [r7, #52] ; 0x34
- 800b320: 3301 adds r3, #1
- 800b322: 683a ldr r2, [r7, #0]
- 800b324: 4413 add r3, r2
- 800b326: 781b ldrb r3, [r3, #0]
- 800b328: 021b lsls r3, r3, #8
- 800b32a: 69fa ldr r2, [r7, #28]
- 800b32c: 4313 orrs r3, r2
- 800b32e: 61fb str r3, [r7, #28]
- floats_lengthT |= ((uint32_t) (*(inbuffer + offset + 2))) << (8 * 2);
- 800b330: 6b7b ldr r3, [r7, #52] ; 0x34
- 800b332: 3302 adds r3, #2
- 800b334: 683a ldr r2, [r7, #0]
- 800b336: 4413 add r3, r2
- 800b338: 781b ldrb r3, [r3, #0]
- 800b33a: 041b lsls r3, r3, #16
- 800b33c: 69fa ldr r2, [r7, #28]
- 800b33e: 4313 orrs r3, r2
- 800b340: 61fb str r3, [r7, #28]
- floats_lengthT |= ((uint32_t) (*(inbuffer + offset + 3))) << (8 * 3);
- 800b342: 6b7b ldr r3, [r7, #52] ; 0x34
- 800b344: 3303 adds r3, #3
- 800b346: 683a ldr r2, [r7, #0]
- 800b348: 4413 add r3, r2
- 800b34a: 781b ldrb r3, [r3, #0]
- 800b34c: 061b lsls r3, r3, #24
- 800b34e: 69fa ldr r2, [r7, #28]
- 800b350: 4313 orrs r3, r2
- 800b352: 61fb str r3, [r7, #28]
- offset += sizeof(this->floats_length);
- 800b354: 6b7b ldr r3, [r7, #52] ; 0x34
- 800b356: 3304 adds r3, #4
- 800b358: 637b str r3, [r7, #52] ; 0x34
- if(floats_lengthT > floats_length)
- 800b35a: 687b ldr r3, [r7, #4]
- 800b35c: 691b ldr r3, [r3, #16]
- 800b35e: 69fa ldr r2, [r7, #28]
- 800b360: 429a cmp r2, r3
- 800b362: d90a bls.n 800b37a <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x15c>
- this->floats = (float*)realloc(this->floats, floats_lengthT * sizeof(float));
- 800b364: 687b ldr r3, [r7, #4]
- 800b366: 699a ldr r2, [r3, #24]
- 800b368: 69fb ldr r3, [r7, #28]
- 800b36a: 009b lsls r3, r3, #2
- 800b36c: 4619 mov r1, r3
- 800b36e: 4610 mov r0, r2
- 800b370: f003 f86e bl 800e450 <realloc>
- 800b374: 4602 mov r2, r0
- 800b376: 687b ldr r3, [r7, #4]
- 800b378: 619a str r2, [r3, #24]
- floats_length = floats_lengthT;
- 800b37a: 687b ldr r3, [r7, #4]
- 800b37c: 69fa ldr r2, [r7, #28]
- 800b37e: 611a str r2, [r3, #16]
- for( uint32_t i = 0; i < floats_length; i++){
- 800b380: 2300 movs r3, #0
- 800b382: 62fb str r3, [r7, #44] ; 0x2c
- 800b384: 687b ldr r3, [r7, #4]
- 800b386: 691b ldr r3, [r3, #16]
- 800b388: 6afa ldr r2, [r7, #44] ; 0x2c
- 800b38a: 429a cmp r2, r3
- 800b38c: d236 bcs.n 800b3fc <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x1de>
- union {
- float real;
- uint32_t base;
- } u_st_floats;
- u_st_floats.base = 0;
- 800b38e: 2300 movs r3, #0
- 800b390: 613b str r3, [r7, #16]
- u_st_floats.base |= ((uint32_t) (*(inbuffer + offset + 0))) << (8 * 0);
- 800b392: 693b ldr r3, [r7, #16]
- 800b394: 6b7a ldr r2, [r7, #52] ; 0x34
- 800b396: 6839 ldr r1, [r7, #0]
- 800b398: 440a add r2, r1
- 800b39a: 7812 ldrb r2, [r2, #0]
- 800b39c: 4313 orrs r3, r2
- 800b39e: 613b str r3, [r7, #16]
- u_st_floats.base |= ((uint32_t) (*(inbuffer + offset + 1))) << (8 * 1);
- 800b3a0: 693a ldr r2, [r7, #16]
- 800b3a2: 6b7b ldr r3, [r7, #52] ; 0x34
- 800b3a4: 3301 adds r3, #1
- 800b3a6: 6839 ldr r1, [r7, #0]
- 800b3a8: 440b add r3, r1
- 800b3aa: 781b ldrb r3, [r3, #0]
- 800b3ac: 021b lsls r3, r3, #8
- 800b3ae: 4313 orrs r3, r2
- 800b3b0: 613b str r3, [r7, #16]
- u_st_floats.base |= ((uint32_t) (*(inbuffer + offset + 2))) << (8 * 2);
- 800b3b2: 693a ldr r2, [r7, #16]
- 800b3b4: 6b7b ldr r3, [r7, #52] ; 0x34
- 800b3b6: 3302 adds r3, #2
- 800b3b8: 6839 ldr r1, [r7, #0]
- 800b3ba: 440b add r3, r1
- 800b3bc: 781b ldrb r3, [r3, #0]
- 800b3be: 041b lsls r3, r3, #16
- 800b3c0: 4313 orrs r3, r2
- 800b3c2: 613b str r3, [r7, #16]
- u_st_floats.base |= ((uint32_t) (*(inbuffer + offset + 3))) << (8 * 3);
- 800b3c4: 693a ldr r2, [r7, #16]
- 800b3c6: 6b7b ldr r3, [r7, #52] ; 0x34
- 800b3c8: 3303 adds r3, #3
- 800b3ca: 6839 ldr r1, [r7, #0]
- 800b3cc: 440b add r3, r1
- 800b3ce: 781b ldrb r3, [r3, #0]
- 800b3d0: 061b lsls r3, r3, #24
- 800b3d2: 4313 orrs r3, r2
- 800b3d4: 613b str r3, [r7, #16]
- this->st_floats = u_st_floats.real;
- 800b3d6: 693a ldr r2, [r7, #16]
- 800b3d8: 687b ldr r3, [r7, #4]
- 800b3da: 615a str r2, [r3, #20]
- offset += sizeof(this->st_floats);
- 800b3dc: 6b7b ldr r3, [r7, #52] ; 0x34
- 800b3de: 3304 adds r3, #4
- 800b3e0: 637b str r3, [r7, #52] ; 0x34
- memcpy( &(this->floats[i]), &(this->st_floats), sizeof(float));
- 800b3e2: 687b ldr r3, [r7, #4]
- 800b3e4: 699a ldr r2, [r3, #24]
- 800b3e6: 6afb ldr r3, [r7, #44] ; 0x2c
- 800b3e8: 009b lsls r3, r3, #2
- 800b3ea: 4413 add r3, r2
- 800b3ec: 687a ldr r2, [r7, #4]
- 800b3ee: 3214 adds r2, #20
- 800b3f0: 6812 ldr r2, [r2, #0]
- 800b3f2: 601a str r2, [r3, #0]
- for( uint32_t i = 0; i < floats_length; i++){
- 800b3f4: 6afb ldr r3, [r7, #44] ; 0x2c
- 800b3f6: 3301 adds r3, #1
- 800b3f8: 62fb str r3, [r7, #44] ; 0x2c
- 800b3fa: e7c3 b.n 800b384 <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x166>
- }
- uint32_t strings_lengthT = ((uint32_t) (*(inbuffer + offset)));
- 800b3fc: 6b7b ldr r3, [r7, #52] ; 0x34
- 800b3fe: 683a ldr r2, [r7, #0]
- 800b400: 4413 add r3, r2
- 800b402: 781b ldrb r3, [r3, #0]
- 800b404: 61bb str r3, [r7, #24]
- strings_lengthT |= ((uint32_t) (*(inbuffer + offset + 1))) << (8 * 1);
- 800b406: 6b7b ldr r3, [r7, #52] ; 0x34
- 800b408: 3301 adds r3, #1
- 800b40a: 683a ldr r2, [r7, #0]
- 800b40c: 4413 add r3, r2
- 800b40e: 781b ldrb r3, [r3, #0]
- 800b410: 021b lsls r3, r3, #8
- 800b412: 69ba ldr r2, [r7, #24]
- 800b414: 4313 orrs r3, r2
- 800b416: 61bb str r3, [r7, #24]
- strings_lengthT |= ((uint32_t) (*(inbuffer + offset + 2))) << (8 * 2);
- 800b418: 6b7b ldr r3, [r7, #52] ; 0x34
- 800b41a: 3302 adds r3, #2
- 800b41c: 683a ldr r2, [r7, #0]
- 800b41e: 4413 add r3, r2
- 800b420: 781b ldrb r3, [r3, #0]
- 800b422: 041b lsls r3, r3, #16
- 800b424: 69ba ldr r2, [r7, #24]
- 800b426: 4313 orrs r3, r2
- 800b428: 61bb str r3, [r7, #24]
- strings_lengthT |= ((uint32_t) (*(inbuffer + offset + 3))) << (8 * 3);
- 800b42a: 6b7b ldr r3, [r7, #52] ; 0x34
- 800b42c: 3303 adds r3, #3
- 800b42e: 683a ldr r2, [r7, #0]
- 800b430: 4413 add r3, r2
- 800b432: 781b ldrb r3, [r3, #0]
- 800b434: 061b lsls r3, r3, #24
- 800b436: 69ba ldr r2, [r7, #24]
- 800b438: 4313 orrs r3, r2
- 800b43a: 61bb str r3, [r7, #24]
- offset += sizeof(this->strings_length);
- 800b43c: 6b7b ldr r3, [r7, #52] ; 0x34
- 800b43e: 3304 adds r3, #4
- 800b440: 637b str r3, [r7, #52] ; 0x34
- if(strings_lengthT > strings_length)
- 800b442: 687b ldr r3, [r7, #4]
- 800b444: 69db ldr r3, [r3, #28]
- 800b446: 69ba ldr r2, [r7, #24]
- 800b448: 429a cmp r2, r3
- 800b44a: d90a bls.n 800b462 <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x244>
- this->strings = (char**)realloc(this->strings, strings_lengthT * sizeof(char*));
- 800b44c: 687b ldr r3, [r7, #4]
- 800b44e: 6a5a ldr r2, [r3, #36] ; 0x24
- 800b450: 69bb ldr r3, [r7, #24]
- 800b452: 009b lsls r3, r3, #2
- 800b454: 4619 mov r1, r3
- 800b456: 4610 mov r0, r2
- 800b458: f002 fffa bl 800e450 <realloc>
- 800b45c: 4602 mov r2, r0
- 800b45e: 687b ldr r3, [r7, #4]
- 800b460: 625a str r2, [r3, #36] ; 0x24
- strings_length = strings_lengthT;
- 800b462: 687b ldr r3, [r7, #4]
- 800b464: 69ba ldr r2, [r7, #24]
- 800b466: 61da str r2, [r3, #28]
- for( uint32_t i = 0; i < strings_length; i++){
- 800b468: 2300 movs r3, #0
- 800b46a: 62bb str r3, [r7, #40] ; 0x28
- 800b46c: 687b ldr r3, [r7, #4]
- 800b46e: 69db ldr r3, [r3, #28]
- 800b470: 6aba ldr r2, [r7, #40] ; 0x28
- 800b472: 429a cmp r2, r3
- 800b474: d23f bcs.n 800b4f6 <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x2d8>
- uint32_t length_st_strings;
- arrToVar(length_st_strings, (inbuffer + offset));
- 800b476: 6b7b ldr r3, [r7, #52] ; 0x34
- 800b478: 683a ldr r2, [r7, #0]
- 800b47a: 441a add r2, r3
- 800b47c: f107 030c add.w r3, r7, #12
- 800b480: 4611 mov r1, r2
- 800b482: 4618 mov r0, r3
- 800b484: f000 fb19 bl 800baba <_ZN3ros3Msg8arrToVarImPhEEvRT_T0_>
- offset += 4;
- 800b488: 6b7b ldr r3, [r7, #52] ; 0x34
- 800b48a: 3304 adds r3, #4
- 800b48c: 637b str r3, [r7, #52] ; 0x34
- for(unsigned int k= offset; k< offset+length_st_strings; ++k){
- 800b48e: 6b7b ldr r3, [r7, #52] ; 0x34
- 800b490: 627b str r3, [r7, #36] ; 0x24
- 800b492: 6b7a ldr r2, [r7, #52] ; 0x34
- 800b494: 68fb ldr r3, [r7, #12]
- 800b496: 4413 add r3, r2
- 800b498: 6a7a ldr r2, [r7, #36] ; 0x24
- 800b49a: 429a cmp r2, r3
- 800b49c: d20c bcs.n 800b4b8 <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x29a>
- inbuffer[k-1]=inbuffer[k];
- 800b49e: 683a ldr r2, [r7, #0]
- 800b4a0: 6a7b ldr r3, [r7, #36] ; 0x24
- 800b4a2: 441a add r2, r3
- 800b4a4: 6a7b ldr r3, [r7, #36] ; 0x24
- 800b4a6: 3b01 subs r3, #1
- 800b4a8: 6839 ldr r1, [r7, #0]
- 800b4aa: 440b add r3, r1
- 800b4ac: 7812 ldrb r2, [r2, #0]
- 800b4ae: 701a strb r2, [r3, #0]
- for(unsigned int k= offset; k< offset+length_st_strings; ++k){
- 800b4b0: 6a7b ldr r3, [r7, #36] ; 0x24
- 800b4b2: 3301 adds r3, #1
- 800b4b4: 627b str r3, [r7, #36] ; 0x24
- 800b4b6: e7ec b.n 800b492 <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x274>
- }
- inbuffer[offset+length_st_strings-1]=0;
- 800b4b8: 6b7a ldr r2, [r7, #52] ; 0x34
- 800b4ba: 68fb ldr r3, [r7, #12]
- 800b4bc: 4413 add r3, r2
- 800b4be: 3b01 subs r3, #1
- 800b4c0: 683a ldr r2, [r7, #0]
- 800b4c2: 4413 add r3, r2
- 800b4c4: 2200 movs r2, #0
- 800b4c6: 701a strb r2, [r3, #0]
- this->st_strings = (char *)(inbuffer + offset-1);
- 800b4c8: 6b7b ldr r3, [r7, #52] ; 0x34
- 800b4ca: 3b01 subs r3, #1
- 800b4cc: 683a ldr r2, [r7, #0]
- 800b4ce: 441a add r2, r3
- 800b4d0: 687b ldr r3, [r7, #4]
- 800b4d2: 621a str r2, [r3, #32]
- offset += length_st_strings;
- 800b4d4: 6b7a ldr r2, [r7, #52] ; 0x34
- 800b4d6: 68fb ldr r3, [r7, #12]
- 800b4d8: 4413 add r3, r2
- 800b4da: 637b str r3, [r7, #52] ; 0x34
- memcpy( &(this->strings[i]), &(this->st_strings), sizeof(char*));
- 800b4dc: 687b ldr r3, [r7, #4]
- 800b4de: 6a5a ldr r2, [r3, #36] ; 0x24
- 800b4e0: 6abb ldr r3, [r7, #40] ; 0x28
- 800b4e2: 009b lsls r3, r3, #2
- 800b4e4: 4413 add r3, r2
- 800b4e6: 687a ldr r2, [r7, #4]
- 800b4e8: 3220 adds r2, #32
- 800b4ea: 6812 ldr r2, [r2, #0]
- 800b4ec: 601a str r2, [r3, #0]
- for( uint32_t i = 0; i < strings_length; i++){
- 800b4ee: 6abb ldr r3, [r7, #40] ; 0x28
- 800b4f0: 3301 adds r3, #1
- 800b4f2: 62bb str r3, [r7, #40] ; 0x28
- 800b4f4: e7ba b.n 800b46c <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x24e>
- }
- return offset;
- 800b4f6: 6b7b ldr r3, [r7, #52] ; 0x34
- }
- 800b4f8: 4618 mov r0, r3
- 800b4fa: 3738 adds r7, #56 ; 0x38
- 800b4fc: 46bd mov sp, r7
- 800b4fe: bd80 pop {r7, pc}
-
-0800b500 <_ZN14rosserial_msgs20RequestParamResponse7getTypeEv>:
-
- const char * getType(){ return REQUESTPARAM; };
- 800b500: b480 push {r7}
- 800b502: b083 sub sp, #12
- 800b504: af00 add r7, sp, #0
- 800b506: 6078 str r0, [r7, #4]
- 800b508: 4b03 ldr r3, [pc, #12] ; (800b518 <_ZN14rosserial_msgs20RequestParamResponse7getTypeEv+0x18>)
- 800b50a: 4618 mov r0, r3
- 800b50c: 370c adds r7, #12
- 800b50e: 46bd mov sp, r7
- 800b510: f85d 7b04 ldr.w r7, [sp], #4
- 800b514: 4770 bx lr
- 800b516: bf00 nop
- 800b518: 080122a4 .word 0x080122a4
-
-0800b51c <_ZN14rosserial_msgs20RequestParamResponse6getMD5Ev>:
- const char * getMD5(){ return "9f0e98bda65981986ddf53afa7a40e49"; };
- 800b51c: b480 push {r7}
- 800b51e: b083 sub sp, #12
- 800b520: af00 add r7, sp, #0
- 800b522: 6078 str r0, [r7, #4]
- 800b524: 4b03 ldr r3, [pc, #12] ; (800b534 <_ZN14rosserial_msgs20RequestParamResponse6getMD5Ev+0x18>)
- 800b526: 4618 mov r0, r3
- 800b528: 370c adds r7, #12
- 800b52a: 46bd mov sp, r7
- 800b52c: f85d 7b04 ldr.w r7, [sp], #4
- 800b530: 4770 bx lr
- 800b532: bf00 nop
- 800b534: 08011a94 .word 0x08011a94
-
-0800b538 <_ZN3ros9PublisherC1EPKcPNS_3MsgEi>:
-
-/* Generic Publisher */
-class Publisher
-{
-public:
- Publisher(const char * topic_name, Msg * msg, int endpoint = rosserial_msgs::TopicInfo::ID_PUBLISHER) :
- 800b538: b480 push {r7}
- 800b53a: b085 sub sp, #20
- 800b53c: af00 add r7, sp, #0
- 800b53e: 60f8 str r0, [r7, #12]
- 800b540: 60b9 str r1, [r7, #8]
- 800b542: 607a str r2, [r7, #4]
- 800b544: 603b str r3, [r7, #0]
- topic_(topic_name),
- msg_(msg),
- endpoint_(endpoint) {};
- 800b546: 68fb ldr r3, [r7, #12]
- 800b548: 68ba ldr r2, [r7, #8]
- 800b54a: 601a str r2, [r3, #0]
- 800b54c: 68fb ldr r3, [r7, #12]
- 800b54e: 687a ldr r2, [r7, #4]
- 800b550: 605a str r2, [r3, #4]
- 800b552: 68fb ldr r3, [r7, #12]
- 800b554: 683a ldr r2, [r7, #0]
- 800b556: 611a str r2, [r3, #16]
- 800b558: 68fb ldr r3, [r7, #12]
- 800b55a: 4618 mov r0, r3
- 800b55c: 3714 adds r7, #20
- 800b55e: 46bd mov sp, r7
- 800b560: f85d 7b04 ldr.w r7, [sp], #4
- 800b564: 4770 bx lr
-
-0800b566 <_ZN3ros9Publisher15getEndpointTypeEv>:
-
- int publish(const Msg * msg)
- {
- return nh_->publish(id_, msg);
- };
- int getEndpointType()
- 800b566: b480 push {r7}
- 800b568: b083 sub sp, #12
- 800b56a: af00 add r7, sp, #0
- 800b56c: 6078 str r0, [r7, #4]
- {
- return endpoint_;
- 800b56e: 687b ldr r3, [r7, #4]
- 800b570: 691b ldr r3, [r3, #16]
- }
- 800b572: 4618 mov r0, r3
- 800b574: 370c adds r7, #12
- 800b576: 46bd mov sp, r7
- 800b578: f85d 7b04 ldr.w r7, [sp], #4
- 800b57c: 4770 bx lr
-
-0800b57e <_ZN13STM32Hardware10getRdmaIndEv>:
- UART_HandleTypeDef *huart;
-
- const static uint16_t rbuflen = 128;
- uint8_t rbuf[rbuflen];
- uint32_t rind;
- inline uint32_t getRdmaInd(void){ return (rbuflen - huart->hdmarx->Instance->NDTR) & (rbuflen - 1); }
- 800b57e: b480 push {r7}
- 800b580: b083 sub sp, #12
- 800b582: af00 add r7, sp, #0
- 800b584: 6078 str r0, [r7, #4]
- 800b586: 687b ldr r3, [r7, #4]
- 800b588: 685b ldr r3, [r3, #4]
- 800b58a: 6edb ldr r3, [r3, #108] ; 0x6c
- 800b58c: 681b ldr r3, [r3, #0]
- 800b58e: 685b ldr r3, [r3, #4]
- 800b590: 425b negs r3, r3
- 800b592: f003 037f and.w r3, r3, #127 ; 0x7f
- 800b596: 4618 mov r0, r3
- 800b598: 370c adds r7, #12
- 800b59a: 46bd mov sp, r7
- 800b59c: f85d 7b04 ldr.w r7, [sp], #4
- 800b5a0: 4770 bx lr
- ...
-
-0800b5a4 <_ZN13STM32HardwareC1Ev>:
- const static uint16_t tbuflen = 256;
- uint8_t tbuf[tbuflen];
- uint32_t twind, tfind;
-
- public:
- STM32Hardware():
- 800b5a4: b480 push {r7}
- 800b5a6: b083 sub sp, #12
- 800b5a8: af00 add r7, sp, #0
- 800b5aa: 6078 str r0, [r7, #4]
- htim(&htim2), huart(&huart3), rind(0), twind(0), tfind(0){
- 800b5ac: 687b ldr r3, [r7, #4]
- 800b5ae: 4a0c ldr r2, [pc, #48] ; (800b5e0 <_ZN13STM32HardwareC1Ev+0x3c>)
- 800b5b0: 601a str r2, [r3, #0]
- 800b5b2: 687b ldr r3, [r7, #4]
- 800b5b4: 4a0b ldr r2, [pc, #44] ; (800b5e4 <_ZN13STM32HardwareC1Ev+0x40>)
- 800b5b6: 605a str r2, [r3, #4]
- 800b5b8: 687b ldr r3, [r7, #4]
- 800b5ba: 2200 movs r2, #0
- 800b5bc: f8c3 2088 str.w r2, [r3, #136] ; 0x88
- 800b5c0: 687b ldr r3, [r7, #4]
- 800b5c2: 2200 movs r2, #0
- 800b5c4: f8c3 218c str.w r2, [r3, #396] ; 0x18c
- 800b5c8: 687b ldr r3, [r7, #4]
- 800b5ca: 2200 movs r2, #0
- 800b5cc: f8c3 2190 str.w r2, [r3, #400] ; 0x190
- }
- 800b5d0: 687b ldr r3, [r7, #4]
- 800b5d2: 4618 mov r0, r3
- 800b5d4: 370c adds r7, #12
- 800b5d6: 46bd mov sp, r7
- 800b5d8: f85d 7b04 ldr.w r7, [sp], #4
- 800b5dc: 4770 bx lr
- 800b5de: bf00 nop
- 800b5e0: 200009e0 .word 0x200009e0
- 800b5e4: 20000a20 .word 0x20000a20
-
-0800b5e8 <_ZN13STM32Hardware4initEv>:
-
- STM32Hardware(TIM_HandleTypeDef *htim_, UART_HandleTypeDef *huart_):
- htim(htim_), huart(huart_), rind(0), twind(0), tfind(0){
- }
-
- void init(){
- 800b5e8: b580 push {r7, lr}
- 800b5ea: b082 sub sp, #8
- 800b5ec: af00 add r7, sp, #0
- 800b5ee: 6078 str r0, [r7, #4]
- reset_rbuf();
- 800b5f0: 6878 ldr r0, [r7, #4]
- 800b5f2: f000 f809 bl 800b608 <_ZN13STM32Hardware10reset_rbufEv>
-
- HAL_TIM_Base_Start(htim);
- 800b5f6: 687b ldr r3, [r7, #4]
- 800b5f8: 681b ldr r3, [r3, #0]
- 800b5fa: 4618 mov r0, r3
- 800b5fc: f7fe f8fc bl 80097f8 <HAL_TIM_Base_Start>
- }
- 800b600: bf00 nop
- 800b602: 3708 adds r7, #8
- 800b604: 46bd mov sp, r7
- 800b606: bd80 pop {r7, pc}
-
-0800b608 <_ZN13STM32Hardware10reset_rbufEv>:
-
- void reset_rbuf(void){
- 800b608: b580 push {r7, lr}
- 800b60a: b082 sub sp, #8
- 800b60c: af00 add r7, sp, #0
- 800b60e: 6078 str r0, [r7, #4]
- HAL_UART_Receive_DMA(huart, rbuf, rbuflen);
- 800b610: 687b ldr r3, [r7, #4]
- 800b612: 6858 ldr r0, [r3, #4]
- 800b614: 687b ldr r3, [r7, #4]
- 800b616: 3308 adds r3, #8
- 800b618: 2280 movs r2, #128 ; 0x80
- 800b61a: 4619 mov r1, r3
- 800b61c: f7fe fb4e bl 8009cbc <HAL_UART_Receive_DMA>
- }
- 800b620: bf00 nop
- 800b622: 3708 adds r7, #8
- 800b624: 46bd mov sp, r7
- 800b626: bd80 pop {r7, pc}
-
-0800b628 <_ZN13STM32Hardware4readEv>:
-
- int read(){
- 800b628: b590 push {r4, r7, lr}
- 800b62a: b085 sub sp, #20
- 800b62c: af00 add r7, sp, #0
- 800b62e: 6078 str r0, [r7, #4]
- int c = -1;
- 800b630: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff
- 800b634: 60fb str r3, [r7, #12]
- if(rind != getRdmaInd()){
- 800b636: 687b ldr r3, [r7, #4]
- 800b638: f8d3 4088 ldr.w r4, [r3, #136] ; 0x88
- 800b63c: 6878 ldr r0, [r7, #4]
- 800b63e: f7ff ff9e bl 800b57e <_ZN13STM32Hardware10getRdmaIndEv>
- 800b642: 4603 mov r3, r0
- 800b644: 429c cmp r4, r3
- 800b646: bf14 ite ne
- 800b648: 2301 movne r3, #1
- 800b64a: 2300 moveq r3, #0
- 800b64c: b2db uxtb r3, r3
- 800b64e: 2b00 cmp r3, #0
- 800b650: d012 beq.n 800b678 <_ZN13STM32Hardware4readEv+0x50>
- c = rbuf[rind++];
- 800b652: 687b ldr r3, [r7, #4]
- 800b654: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88
- 800b658: 1c59 adds r1, r3, #1
- 800b65a: 687a ldr r2, [r7, #4]
- 800b65c: f8c2 1088 str.w r1, [r2, #136] ; 0x88
- 800b660: 687a ldr r2, [r7, #4]
- 800b662: 4413 add r3, r2
- 800b664: 7a1b ldrb r3, [r3, #8]
- 800b666: 60fb str r3, [r7, #12]
- rind &= rbuflen - 1;
- 800b668: 687b ldr r3, [r7, #4]
- 800b66a: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88
- 800b66e: f003 027f and.w r2, r3, #127 ; 0x7f
- 800b672: 687b ldr r3, [r7, #4]
- 800b674: f8c3 2088 str.w r2, [r3, #136] ; 0x88
- }
- return c;
- 800b678: 68fb ldr r3, [r7, #12]
- }
- 800b67a: 4618 mov r0, r3
- 800b67c: 3714 adds r7, #20
- 800b67e: 46bd mov sp, r7
- 800b680: bd90 pop {r4, r7, pc}
- ...
-
-0800b684 <_ZN13STM32Hardware5flushEv>:
-
- void flush(void){
- 800b684: b580 push {r7, lr}
- 800b686: b084 sub sp, #16
- 800b688: af00 add r7, sp, #0
- 800b68a: 6078 str r0, [r7, #4]
- static bool mutex = false;
-
- if((huart->gState == HAL_UART_STATE_READY) && !mutex){
- 800b68c: 687b ldr r3, [r7, #4]
- 800b68e: 685b ldr r3, [r3, #4]
- 800b690: 6f5b ldr r3, [r3, #116] ; 0x74
- 800b692: 2b20 cmp r3, #32
- 800b694: d108 bne.n 800b6a8 <_ZN13STM32Hardware5flushEv+0x24>
- 800b696: 4b27 ldr r3, [pc, #156] ; (800b734 <_ZN13STM32Hardware5flushEv+0xb0>)
- 800b698: 781b ldrb r3, [r3, #0]
- 800b69a: f083 0301 eor.w r3, r3, #1
- 800b69e: b2db uxtb r3, r3
- 800b6a0: 2b00 cmp r3, #0
- 800b6a2: d001 beq.n 800b6a8 <_ZN13STM32Hardware5flushEv+0x24>
- 800b6a4: 2301 movs r3, #1
- 800b6a6: e000 b.n 800b6aa <_ZN13STM32Hardware5flushEv+0x26>
- 800b6a8: 2300 movs r3, #0
- 800b6aa: 2b00 cmp r3, #0
- 800b6ac: d03e beq.n 800b72c <_ZN13STM32Hardware5flushEv+0xa8>
- mutex = true;
- 800b6ae: 4b21 ldr r3, [pc, #132] ; (800b734 <_ZN13STM32Hardware5flushEv+0xb0>)
- 800b6b0: 2201 movs r2, #1
- 800b6b2: 701a strb r2, [r3, #0]
-
- if(twind != tfind){
- 800b6b4: 687b ldr r3, [r7, #4]
- 800b6b6: f8d3 218c ldr.w r2, [r3, #396] ; 0x18c
- 800b6ba: 687b ldr r3, [r7, #4]
- 800b6bc: f8d3 3190 ldr.w r3, [r3, #400] ; 0x190
- 800b6c0: 429a cmp r2, r3
- 800b6c2: d030 beq.n 800b726 <_ZN13STM32Hardware5flushEv+0xa2>
- uint16_t len = tfind < twind ? twind - tfind : tbuflen - tfind;
- 800b6c4: 687b ldr r3, [r7, #4]
- 800b6c6: f8d3 2190 ldr.w r2, [r3, #400] ; 0x190
- 800b6ca: 687b ldr r3, [r7, #4]
- 800b6cc: f8d3 318c ldr.w r3, [r3, #396] ; 0x18c
- 800b6d0: 429a cmp r2, r3
- 800b6d2: d20a bcs.n 800b6ea <_ZN13STM32Hardware5flushEv+0x66>
- 800b6d4: 687b ldr r3, [r7, #4]
- 800b6d6: f8d3 318c ldr.w r3, [r3, #396] ; 0x18c
- 800b6da: b29a uxth r2, r3
- 800b6dc: 687b ldr r3, [r7, #4]
- 800b6de: f8d3 3190 ldr.w r3, [r3, #400] ; 0x190
- 800b6e2: b29b uxth r3, r3
- 800b6e4: 1ad3 subs r3, r2, r3
- 800b6e6: b29b uxth r3, r3
- 800b6e8: e006 b.n 800b6f8 <_ZN13STM32Hardware5flushEv+0x74>
- 800b6ea: 687b ldr r3, [r7, #4]
- 800b6ec: f8d3 3190 ldr.w r3, [r3, #400] ; 0x190
- 800b6f0: b29b uxth r3, r3
- 800b6f2: f5c3 7380 rsb r3, r3, #256 ; 0x100
- 800b6f6: b29b uxth r3, r3
- 800b6f8: 81fb strh r3, [r7, #14]
- HAL_UART_Transmit_DMA(huart, &(tbuf[tfind]), len);
- 800b6fa: 687b ldr r3, [r7, #4]
- 800b6fc: 6858 ldr r0, [r3, #4]
- 800b6fe: 687b ldr r3, [r7, #4]
- 800b700: f8d3 3190 ldr.w r3, [r3, #400] ; 0x190
- 800b704: 3388 adds r3, #136 ; 0x88
- 800b706: 687a ldr r2, [r7, #4]
- 800b708: 4413 add r3, r2
- 800b70a: 3304 adds r3, #4
- 800b70c: 89fa ldrh r2, [r7, #14]
- 800b70e: 4619 mov r1, r3
- 800b710: f7fe fa58 bl 8009bc4 <HAL_UART_Transmit_DMA>
- tfind = (tfind + len) & (tbuflen - 1);
- 800b714: 687b ldr r3, [r7, #4]
- 800b716: f8d3 2190 ldr.w r2, [r3, #400] ; 0x190
- 800b71a: 89fb ldrh r3, [r7, #14]
- 800b71c: 4413 add r3, r2
- 800b71e: b2da uxtb r2, r3
- 800b720: 687b ldr r3, [r7, #4]
- 800b722: f8c3 2190 str.w r2, [r3, #400] ; 0x190
- }
- mutex = false;
- 800b726: 4b03 ldr r3, [pc, #12] ; (800b734 <_ZN13STM32Hardware5flushEv+0xb0>)
- 800b728: 2200 movs r2, #0
- 800b72a: 701a strb r2, [r3, #0]
- }
- }
- 800b72c: bf00 nop
- 800b72e: 3710 adds r7, #16
- 800b730: 46bd mov sp, r7
- 800b732: bd80 pop {r7, pc}
- 800b734: 200009dc .word 0x200009dc
-
-0800b738 <_ZN13STM32Hardware5writeEPhi>:
-
- void write(uint8_t* data, int length){
- 800b738: b580 push {r7, lr}
- 800b73a: b086 sub sp, #24
- 800b73c: af00 add r7, sp, #0
- 800b73e: 60f8 str r0, [r7, #12]
- 800b740: 60b9 str r1, [r7, #8]
- 800b742: 607a str r2, [r7, #4]
-
-
- int n = length;
- 800b744: 687b ldr r3, [r7, #4]
- 800b746: 617b str r3, [r7, #20]
- n = n <= tbuflen ? n : tbuflen;
- 800b748: 697b ldr r3, [r7, #20]
- 800b74a: f5b3 7f80 cmp.w r3, #256 ; 0x100
- 800b74e: bfa8 it ge
- 800b750: f44f 7380 movge.w r3, #256 ; 0x100
- 800b754: 617b str r3, [r7, #20]
-
- int n_tail = n <= tbuflen - twind ? n : tbuflen - twind;
- 800b756: 68fb ldr r3, [r7, #12]
- 800b758: f8d3 318c ldr.w r3, [r3, #396] ; 0x18c
- 800b75c: f5c3 7280 rsb r2, r3, #256 ; 0x100
- 800b760: 697b ldr r3, [r7, #20]
- 800b762: 4293 cmp r3, r2
- 800b764: bf28 it cs
- 800b766: 4613 movcs r3, r2
- 800b768: 613b str r3, [r7, #16]
- memcpy(&(tbuf[twind]), data, n_tail);
- 800b76a: 68fb ldr r3, [r7, #12]
- 800b76c: f8d3 318c ldr.w r3, [r3, #396] ; 0x18c
- 800b770: 3388 adds r3, #136 ; 0x88
- 800b772: 68fa ldr r2, [r7, #12]
- 800b774: 4413 add r3, r2
- 800b776: 3304 adds r3, #4
- 800b778: 693a ldr r2, [r7, #16]
- 800b77a: 68b9 ldr r1, [r7, #8]
- 800b77c: 4618 mov r0, r3
- 800b77e: f002 fdfa bl 800e376 <memcpy>
- twind = (twind + n) & (tbuflen - 1);
- 800b782: 68fb ldr r3, [r7, #12]
- 800b784: f8d3 218c ldr.w r2, [r3, #396] ; 0x18c
- 800b788: 697b ldr r3, [r7, #20]
- 800b78a: 4413 add r3, r2
- 800b78c: b2da uxtb r2, r3
- 800b78e: 68fb ldr r3, [r7, #12]
- 800b790: f8c3 218c str.w r2, [r3, #396] ; 0x18c
-
- if(n != n_tail){
- 800b794: 697a ldr r2, [r7, #20]
- 800b796: 693b ldr r3, [r7, #16]
- 800b798: 429a cmp r2, r3
- 800b79a: d00b beq.n 800b7b4 <_ZN13STM32Hardware5writeEPhi+0x7c>
- memcpy(tbuf, &(data[n_tail]), n - n_tail);
- 800b79c: 68fb ldr r3, [r7, #12]
- 800b79e: f103 008c add.w r0, r3, #140 ; 0x8c
- 800b7a2: 693b ldr r3, [r7, #16]
- 800b7a4: 68ba ldr r2, [r7, #8]
- 800b7a6: 18d1 adds r1, r2, r3
- 800b7a8: 697a ldr r2, [r7, #20]
- 800b7aa: 693b ldr r3, [r7, #16]
- 800b7ac: 1ad3 subs r3, r2, r3
- 800b7ae: 461a mov r2, r3
- 800b7b0: f002 fde1 bl 800e376 <memcpy>
- }
-
- flush();
- 800b7b4: 68f8 ldr r0, [r7, #12]
- 800b7b6: f7ff ff65 bl 800b684 <_ZN13STM32Hardware5flushEv>
-
-
- //HAL_UART_Transmit(&huart3, data, length, 100);
- }
- 800b7ba: bf00 nop
- 800b7bc: 3718 adds r7, #24
- 800b7be: 46bd mov sp, r7
- 800b7c0: bd80 pop {r7, pc}
-
-0800b7c2 <_ZN13STM32Hardware4timeEv>:
-
- unsigned long time(){ return __HAL_TIM_GET_COUNTER(htim); }
- 800b7c2: b480 push {r7}
- 800b7c4: b083 sub sp, #12
- 800b7c6: af00 add r7, sp, #0
- 800b7c8: 6078 str r0, [r7, #4]
- 800b7ca: 687b ldr r3, [r7, #4]
- 800b7cc: 681b ldr r3, [r3, #0]
- 800b7ce: 681b ldr r3, [r3, #0]
- 800b7d0: 6a5b ldr r3, [r3, #36] ; 0x24
- 800b7d2: 4618 mov r0, r3
- 800b7d4: 370c adds r7, #12
- 800b7d6: 46bd mov sp, r7
- 800b7d8: f85d 7b04 ldr.w r7, [sp], #4
- 800b7dc: 4770 bx lr
- ...
-
-0800b7e0 <main>:
-/**
- * @brief The application entry point.
- * @retval int
- */
-int main(void)
-{
- 800b7e0: b590 push {r4, r7, lr}
- 800b7e2: f2ad 6df4 subw sp, sp, #1780 ; 0x6f4
- 800b7e6: af00 add r7, sp, #0
-
-
- /* MCU Configuration--------------------------------------------------------*/
-
- /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
- HAL_Init();
- 800b7e8: f7fc fc02 bl 8007ff0 <HAL_Init>
- /* USER CODE BEGIN Init */
-
- /* USER CODE END Init */
-
- /* Configure the system clock */
- SystemClock_Config();
- 800b7ec: f000 f842 bl 800b874 <_Z18SystemClock_Configv>
- /* USER CODE BEGIN SysInit */
-
- /* USER CODE END SysInit */
-
- /* Initialize all configured peripherals */
- MX_GPIO_Init();
- 800b7f0: f000 f926 bl 800ba40 <_ZL12MX_GPIO_Initv>
- MX_TIM2_Init();
- 800b7f4: f000 f8c8 bl 800b988 <_ZL12MX_TIM2_Initv>
- MX_USART3_UART_Init();
- 800b7f8: f000 f8ee bl 800b9d8 <_ZL19MX_USART3_UART_Initv>
- /* USER CODE BEGIN 2 */
- ros::NodeHandle nh;
- 800b7fc: f107 0330 add.w r3, r7, #48 ; 0x30
- 800b800: 4618 mov r0, r3
- 800b802: f000 f98f bl 800bb24 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev>
-
- std_msgs::String str_msg;
- 800b806: f107 0328 add.w r3, r7, #40 ; 0x28
- 800b80a: 4618 mov r0, r3
- 800b80c: f7fe ffc0 bl 800a790 <_ZN8std_msgs6StringC1Ev>
- ros::Publisher chatter("chatter", &str_msg);
- 800b810: f107 0228 add.w r2, r7, #40 ; 0x28
- 800b814: f107 0014 add.w r0, r7, #20
- 800b818: 2300 movs r3, #0
- 800b81a: 4913 ldr r1, [pc, #76] ; (800b868 <main+0x88>)
- 800b81c: f7ff fe8c bl 800b538 <_ZN3ros9PublisherC1EPKcPNS_3MsgEi>
- char hello[] = "Hello world!";
- 800b820: 1d3b adds r3, r7, #4
- 800b822: 4a12 ldr r2, [pc, #72] ; (800b86c <main+0x8c>)
- 800b824: 461c mov r4, r3
- 800b826: 4613 mov r3, r2
- 800b828: cb0f ldmia r3, {r0, r1, r2, r3}
- 800b82a: c407 stmia r4!, {r0, r1, r2}
- 800b82c: 7023 strb r3, [r4, #0]
-
- nh.initNode();
- 800b82e: f107 0330 add.w r3, r7, #48 ; 0x30
- 800b832: 4618 mov r0, r3
- 800b834: f000 f9f6 bl 800bc24 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8initNodeEv>
- nh.advertise(chatter);
- 800b838: f107 0214 add.w r2, r7, #20
- 800b83c: f107 0330 add.w r3, r7, #48 ; 0x30
- 800b840: 4611 mov r1, r2
- 800b842: 4618 mov r0, r3
- 800b844: f000 fa0b bl 800bc5e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE9advertiseERNS_9PublisherE>
- /*
- str_msg.data = hello;
- chatter.publish(&str_msg);
- nh.spinOnce();
- */
- HAL_UART_Transmit(&huart3, (uint8_t*)hello, strlen(hello), 100);
- 800b848: 1d3b adds r3, r7, #4
- 800b84a: 4618 mov r0, r3
- 800b84c: f7fb fac2 bl 8006dd4 <strlen>
- 800b850: 4603 mov r3, r0
- 800b852: b29a uxth r2, r3
- 800b854: 1d39 adds r1, r7, #4
- 800b856: 2364 movs r3, #100 ; 0x64
- 800b858: 4805 ldr r0, [pc, #20] ; (800b870 <main+0x90>)
- 800b85a: f7fe f921 bl 8009aa0 <HAL_UART_Transmit>
-
- HAL_Delay(1000);
- 800b85e: f44f 707a mov.w r0, #1000 ; 0x3e8
- 800b862: f7fc fc23 bl 80080ac <HAL_Delay>
- HAL_UART_Transmit(&huart3, (uint8_t*)hello, strlen(hello), 100);
- 800b866: e7ef b.n 800b848 <main+0x68>
- 800b868: 08011ab8 .word 0x08011ab8
- 800b86c: 08011ac0 .word 0x08011ac0
- 800b870: 20000a20 .word 0x20000a20
-
-0800b874 <_Z18SystemClock_Configv>:
-/**
- * @brief System Clock Configuration
- * @retval None
- */
-void SystemClock_Config(void)
-{
- 800b874: b580 push {r7, lr}
- 800b876: b0b8 sub sp, #224 ; 0xe0
- 800b878: af00 add r7, sp, #0
- RCC_OscInitTypeDef RCC_OscInitStruct = {0};
- 800b87a: f107 03ac add.w r3, r7, #172 ; 0xac
- 800b87e: 2234 movs r2, #52 ; 0x34
- 800b880: 2100 movs r1, #0
- 800b882: 4618 mov r0, r3
- 800b884: f002 fd9b bl 800e3be <memset>
- RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
- 800b888: f107 0398 add.w r3, r7, #152 ; 0x98
- 800b88c: 2200 movs r2, #0
- 800b88e: 601a str r2, [r3, #0]
- 800b890: 605a str r2, [r3, #4]
- 800b892: 609a str r2, [r3, #8]
- 800b894: 60da str r2, [r3, #12]
- 800b896: 611a str r2, [r3, #16]
- RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
- 800b898: f107 0308 add.w r3, r7, #8
- 800b89c: 2290 movs r2, #144 ; 0x90
- 800b89e: 2100 movs r1, #0
- 800b8a0: 4618 mov r0, r3
- 800b8a2: f002 fd8c bl 800e3be <memset>
-
- /** Configure the main internal regulator output voltage
- */
- __HAL_RCC_PWR_CLK_ENABLE();
- 800b8a6: 4b36 ldr r3, [pc, #216] ; (800b980 <_Z18SystemClock_Configv+0x10c>)
- 800b8a8: 6c1b ldr r3, [r3, #64] ; 0x40
- 800b8aa: 4a35 ldr r2, [pc, #212] ; (800b980 <_Z18SystemClock_Configv+0x10c>)
- 800b8ac: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
- 800b8b0: 6413 str r3, [r2, #64] ; 0x40
- 800b8b2: 4b33 ldr r3, [pc, #204] ; (800b980 <_Z18SystemClock_Configv+0x10c>)
- 800b8b4: 6c1b ldr r3, [r3, #64] ; 0x40
- 800b8b6: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
- 800b8ba: 607b str r3, [r7, #4]
- 800b8bc: 687b ldr r3, [r7, #4]
- __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE3);
- 800b8be: 4b31 ldr r3, [pc, #196] ; (800b984 <_Z18SystemClock_Configv+0x110>)
- 800b8c0: 681b ldr r3, [r3, #0]
- 800b8c2: f423 4340 bic.w r3, r3, #49152 ; 0xc000
- 800b8c6: 4a2f ldr r2, [pc, #188] ; (800b984 <_Z18SystemClock_Configv+0x110>)
- 800b8c8: f443 4380 orr.w r3, r3, #16384 ; 0x4000
- 800b8cc: 6013 str r3, [r2, #0]
- 800b8ce: 4b2d ldr r3, [pc, #180] ; (800b984 <_Z18SystemClock_Configv+0x110>)
- 800b8d0: 681b ldr r3, [r3, #0]
- 800b8d2: f403 4340 and.w r3, r3, #49152 ; 0xc000
- 800b8d6: 603b str r3, [r7, #0]
- 800b8d8: 683b ldr r3, [r7, #0]
- /** Initializes the CPU, AHB and APB busses clocks
- */
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
- 800b8da: 2302 movs r3, #2
- 800b8dc: f8c7 30ac str.w r3, [r7, #172] ; 0xac
- RCC_OscInitStruct.HSIState = RCC_HSI_ON;
- 800b8e0: 2301 movs r3, #1
- 800b8e2: f8c7 30b8 str.w r3, [r7, #184] ; 0xb8
- RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
- 800b8e6: 2310 movs r3, #16
- 800b8e8: f8c7 30bc str.w r3, [r7, #188] ; 0xbc
- RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
- 800b8ec: 2300 movs r3, #0
- 800b8ee: f8c7 30c4 str.w r3, [r7, #196] ; 0xc4
- if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
- 800b8f2: f107 03ac add.w r3, r7, #172 ; 0xac
- 800b8f6: 4618 mov r0, r3
- 800b8f8: f7fc ff18 bl 800872c <HAL_RCC_OscConfig>
- 800b8fc: 4603 mov r3, r0
- 800b8fe: 2b00 cmp r3, #0
- 800b900: bf14 ite ne
- 800b902: 2301 movne r3, #1
- 800b904: 2300 moveq r3, #0
- 800b906: b2db uxtb r3, r3
- 800b908: 2b00 cmp r3, #0
- 800b90a: d001 beq.n 800b910 <_Z18SystemClock_Configv+0x9c>
- {
- Error_Handler();
- 800b90c: f000 f8b0 bl 800ba70 <Error_Handler>
- }
- /** Initializes the CPU, AHB and APB busses clocks
- */
- RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
- 800b910: 230f movs r3, #15
- 800b912: f8c7 3098 str.w r3, [r7, #152] ; 0x98
- |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
- RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI;
- 800b916: 2300 movs r3, #0
- 800b918: f8c7 309c str.w r3, [r7, #156] ; 0x9c
- RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
- 800b91c: 2300 movs r3, #0
- 800b91e: f8c7 30a0 str.w r3, [r7, #160] ; 0xa0
- RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
- 800b922: 2300 movs r3, #0
- 800b924: f8c7 30a4 str.w r3, [r7, #164] ; 0xa4
- RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
- 800b928: 2300 movs r3, #0
- 800b92a: f8c7 30a8 str.w r3, [r7, #168] ; 0xa8
-
- if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
- 800b92e: f107 0398 add.w r3, r7, #152 ; 0x98
- 800b932: 2100 movs r1, #0
- 800b934: 4618 mov r0, r3
- 800b936: f7fd f96b bl 8008c10 <HAL_RCC_ClockConfig>
- 800b93a: 4603 mov r3, r0
- 800b93c: 2b00 cmp r3, #0
- 800b93e: bf14 ite ne
- 800b940: 2301 movne r3, #1
- 800b942: 2300 moveq r3, #0
- 800b944: b2db uxtb r3, r3
- 800b946: 2b00 cmp r3, #0
- 800b948: d001 beq.n 800b94e <_Z18SystemClock_Configv+0xda>
- {
- Error_Handler();
- 800b94a: f000 f891 bl 800ba70 <Error_Handler>
- }
- PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART3;
- 800b94e: f44f 7380 mov.w r3, #256 ; 0x100
- 800b952: 60bb str r3, [r7, #8]
- PeriphClkInitStruct.Usart3ClockSelection = RCC_USART3CLKSOURCE_PCLK1;
- 800b954: 2300 movs r3, #0
- 800b956: 657b str r3, [r7, #84] ; 0x54
- if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
- 800b958: f107 0308 add.w r3, r7, #8
- 800b95c: 4618 mov r0, r3
- 800b95e: f7fd fb25 bl 8008fac <HAL_RCCEx_PeriphCLKConfig>
- 800b962: 4603 mov r3, r0
- 800b964: 2b00 cmp r3, #0
- 800b966: bf14 ite ne
- 800b968: 2301 movne r3, #1
- 800b96a: 2300 moveq r3, #0
- 800b96c: b2db uxtb r3, r3
- 800b96e: 2b00 cmp r3, #0
- 800b970: d001 beq.n 800b976 <_Z18SystemClock_Configv+0x102>
- {
- Error_Handler();
- 800b972: f000 f87d bl 800ba70 <Error_Handler>
- }
-}
- 800b976: bf00 nop
- 800b978: 37e0 adds r7, #224 ; 0xe0
- 800b97a: 46bd mov sp, r7
- 800b97c: bd80 pop {r7, pc}
- 800b97e: bf00 nop
- 800b980: 40023800 .word 0x40023800
- 800b984: 40007000 .word 0x40007000
-
-0800b988 <_ZL12MX_TIM2_Initv>:
- * @brief TIM2 Initialization Function
- * @param None
- * @retval None
- */
-static void MX_TIM2_Init(void)
-{
- 800b988: b580 push {r7, lr}
- 800b98a: af00 add r7, sp, #0
- /* USER CODE END TIM2_Init 0 */
-
- /* USER CODE BEGIN TIM2_Init 1 */
-
- /* USER CODE END TIM2_Init 1 */
- htim2.Instance = TIM2;
- 800b98c: 4b11 ldr r3, [pc, #68] ; (800b9d4 <_ZL12MX_TIM2_Initv+0x4c>)
- 800b98e: f04f 4280 mov.w r2, #1073741824 ; 0x40000000
- 800b992: 601a str r2, [r3, #0]
- htim2.Init.Prescaler = 0;
- 800b994: 4b0f ldr r3, [pc, #60] ; (800b9d4 <_ZL12MX_TIM2_Initv+0x4c>)
- 800b996: 2200 movs r2, #0
- 800b998: 605a str r2, [r3, #4]
- htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
- 800b99a: 4b0e ldr r3, [pc, #56] ; (800b9d4 <_ZL12MX_TIM2_Initv+0x4c>)
- 800b99c: 2200 movs r2, #0
- 800b99e: 609a str r2, [r3, #8]
- htim2.Init.Period = 0;
- 800b9a0: 4b0c ldr r3, [pc, #48] ; (800b9d4 <_ZL12MX_TIM2_Initv+0x4c>)
- 800b9a2: 2200 movs r2, #0
- 800b9a4: 60da str r2, [r3, #12]
- htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
- 800b9a6: 4b0b ldr r3, [pc, #44] ; (800b9d4 <_ZL12MX_TIM2_Initv+0x4c>)
- 800b9a8: 2200 movs r2, #0
- 800b9aa: 611a str r2, [r3, #16]
- htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
- 800b9ac: 4b09 ldr r3, [pc, #36] ; (800b9d4 <_ZL12MX_TIM2_Initv+0x4c>)
- 800b9ae: 2200 movs r2, #0
- 800b9b0: 619a str r2, [r3, #24]
- if (HAL_TIM_OnePulse_Init(&htim2, TIM_OPMODE_SINGLE) != HAL_OK)
- 800b9b2: 2108 movs r1, #8
- 800b9b4: 4807 ldr r0, [pc, #28] ; (800b9d4 <_ZL12MX_TIM2_Initv+0x4c>)
- 800b9b6: f7fd ff49 bl 800984c <HAL_TIM_OnePulse_Init>
- 800b9ba: 4603 mov r3, r0
- 800b9bc: 2b00 cmp r3, #0
- 800b9be: bf14 ite ne
- 800b9c0: 2301 movne r3, #1
- 800b9c2: 2300 moveq r3, #0
- 800b9c4: b2db uxtb r3, r3
- 800b9c6: 2b00 cmp r3, #0
- 800b9c8: d001 beq.n 800b9ce <_ZL12MX_TIM2_Initv+0x46>
- {
- Error_Handler();
- 800b9ca: f000 f851 bl 800ba70 <Error_Handler>
- }
- /* USER CODE BEGIN TIM2_Init 2 */
-
- /* USER CODE END TIM2_Init 2 */
-
-}
- 800b9ce: bf00 nop
- 800b9d0: bd80 pop {r7, pc}
- 800b9d2: bf00 nop
- 800b9d4: 200009e0 .word 0x200009e0
-
-0800b9d8 <_ZL19MX_USART3_UART_Initv>:
- * @brief USART3 Initialization Function
- * @param None
- * @retval None
- */
-static void MX_USART3_UART_Init(void)
-{
- 800b9d8: b580 push {r7, lr}
- 800b9da: af00 add r7, sp, #0
- /* USER CODE END USART3_Init 0 */
-
- /* USER CODE BEGIN USART3_Init 1 */
-
- /* USER CODE END USART3_Init 1 */
- huart3.Instance = USART3;
- 800b9dc: 4b16 ldr r3, [pc, #88] ; (800ba38 <_ZL19MX_USART3_UART_Initv+0x60>)
- 800b9de: 4a17 ldr r2, [pc, #92] ; (800ba3c <_ZL19MX_USART3_UART_Initv+0x64>)
- 800b9e0: 601a str r2, [r3, #0]
- huart3.Init.BaudRate = 115200;
- 800b9e2: 4b15 ldr r3, [pc, #84] ; (800ba38 <_ZL19MX_USART3_UART_Initv+0x60>)
- 800b9e4: f44f 32e1 mov.w r2, #115200 ; 0x1c200
- 800b9e8: 605a str r2, [r3, #4]
- huart3.Init.WordLength = UART_WORDLENGTH_8B;
- 800b9ea: 4b13 ldr r3, [pc, #76] ; (800ba38 <_ZL19MX_USART3_UART_Initv+0x60>)
- 800b9ec: 2200 movs r2, #0
- 800b9ee: 609a str r2, [r3, #8]
- huart3.Init.StopBits = UART_STOPBITS_1;
- 800b9f0: 4b11 ldr r3, [pc, #68] ; (800ba38 <_ZL19MX_USART3_UART_Initv+0x60>)
- 800b9f2: 2200 movs r2, #0
- 800b9f4: 60da str r2, [r3, #12]
- huart3.Init.Parity = UART_PARITY_NONE;
- 800b9f6: 4b10 ldr r3, [pc, #64] ; (800ba38 <_ZL19MX_USART3_UART_Initv+0x60>)
- 800b9f8: 2200 movs r2, #0
- 800b9fa: 611a str r2, [r3, #16]
- huart3.Init.Mode = UART_MODE_TX_RX;
- 800b9fc: 4b0e ldr r3, [pc, #56] ; (800ba38 <_ZL19MX_USART3_UART_Initv+0x60>)
- 800b9fe: 220c movs r2, #12
- 800ba00: 615a str r2, [r3, #20]
- huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE;
- 800ba02: 4b0d ldr r3, [pc, #52] ; (800ba38 <_ZL19MX_USART3_UART_Initv+0x60>)
- 800ba04: 2200 movs r2, #0
- 800ba06: 619a str r2, [r3, #24]
- huart3.Init.OverSampling = UART_OVERSAMPLING_16;
- 800ba08: 4b0b ldr r3, [pc, #44] ; (800ba38 <_ZL19MX_USART3_UART_Initv+0x60>)
- 800ba0a: 2200 movs r2, #0
- 800ba0c: 61da str r2, [r3, #28]
- huart3.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
- 800ba0e: 4b0a ldr r3, [pc, #40] ; (800ba38 <_ZL19MX_USART3_UART_Initv+0x60>)
- 800ba10: 2200 movs r2, #0
- 800ba12: 621a str r2, [r3, #32]
- huart3.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
- 800ba14: 4b08 ldr r3, [pc, #32] ; (800ba38 <_ZL19MX_USART3_UART_Initv+0x60>)
- 800ba16: 2200 movs r2, #0
- 800ba18: 625a str r2, [r3, #36] ; 0x24
- if (HAL_UART_Init(&huart3) != HAL_OK)
- 800ba1a: 4807 ldr r0, [pc, #28] ; (800ba38 <_ZL19MX_USART3_UART_Initv+0x60>)
- 800ba1c: f7fd fff2 bl 8009a04 <HAL_UART_Init>
- 800ba20: 4603 mov r3, r0
- 800ba22: 2b00 cmp r3, #0
- 800ba24: bf14 ite ne
- 800ba26: 2301 movne r3, #1
- 800ba28: 2300 moveq r3, #0
- 800ba2a: b2db uxtb r3, r3
- 800ba2c: 2b00 cmp r3, #0
- 800ba2e: d001 beq.n 800ba34 <_ZL19MX_USART3_UART_Initv+0x5c>
- {
- Error_Handler();
- 800ba30: f000 f81e bl 800ba70 <Error_Handler>
- }
- /* USER CODE BEGIN USART3_Init 2 */
-
- /* USER CODE END USART3_Init 2 */
-
-}
- 800ba34: bf00 nop
- 800ba36: bd80 pop {r7, pc}
- 800ba38: 20000a20 .word 0x20000a20
- 800ba3c: 40004800 .word 0x40004800
-
-0800ba40 <_ZL12MX_GPIO_Initv>:
- * @brief GPIO Initialization Function
- * @param None
- * @retval None
- */
-static void MX_GPIO_Init(void)
-{
- 800ba40: b480 push {r7}
- 800ba42: b083 sub sp, #12
- 800ba44: af00 add r7, sp, #0
-
- /* GPIO Ports Clock Enable */
- __HAL_RCC_GPIOD_CLK_ENABLE();
- 800ba46: 4b09 ldr r3, [pc, #36] ; (800ba6c <_ZL12MX_GPIO_Initv+0x2c>)
- 800ba48: 6b1b ldr r3, [r3, #48] ; 0x30
- 800ba4a: 4a08 ldr r2, [pc, #32] ; (800ba6c <_ZL12MX_GPIO_Initv+0x2c>)
- 800ba4c: f043 0308 orr.w r3, r3, #8
- 800ba50: 6313 str r3, [r2, #48] ; 0x30
- 800ba52: 4b06 ldr r3, [pc, #24] ; (800ba6c <_ZL12MX_GPIO_Initv+0x2c>)
- 800ba54: 6b1b ldr r3, [r3, #48] ; 0x30
- 800ba56: f003 0308 and.w r3, r3, #8
- 800ba5a: 607b str r3, [r7, #4]
- 800ba5c: 687b ldr r3, [r7, #4]
-
-}
- 800ba5e: bf00 nop
- 800ba60: 370c adds r7, #12
- 800ba62: 46bd mov sp, r7
- 800ba64: f85d 7b04 ldr.w r7, [sp], #4
- 800ba68: 4770 bx lr
- 800ba6a: bf00 nop
- 800ba6c: 40023800 .word 0x40023800
-
-0800ba70 <Error_Handler>:
-/**
- * @brief This function is executed in case of error occurrence.
- * @retval None
- */
-void Error_Handler(void)
-{
- 800ba70: b480 push {r7}
- 800ba72: af00 add r7, sp, #0
- /* USER CODE BEGIN Error_Handler_Debug */
- /* User can add his own implementation to report the HAL error return state */
-
- /* USER CODE END Error_Handler_Debug */
-}
- 800ba74: bf00 nop
- 800ba76: 46bd mov sp, r7
- 800ba78: f85d 7b04 ldr.w r7, [sp], #4
- 800ba7c: 4770 bx lr
-
-0800ba7e <_ZN3ros3Msg8varToArrIPhmEEvT_T0_>:
- return 8;
- }
-
- // Copy data from variable into a byte array
- template<typename A, typename V>
- static void varToArr(A arr, const V var)
- 800ba7e: b480 push {r7}
- 800ba80: b085 sub sp, #20
- 800ba82: af00 add r7, sp, #0
- 800ba84: 6078 str r0, [r7, #4]
- 800ba86: 6039 str r1, [r7, #0]
- {
- for (size_t i = 0; i < sizeof(V); i++)
- 800ba88: 2300 movs r3, #0
- 800ba8a: 60fb str r3, [r7, #12]
- 800ba8c: 68fb ldr r3, [r7, #12]
- 800ba8e: 2b03 cmp r3, #3
- 800ba90: d80d bhi.n 800baae <_ZN3ros3Msg8varToArrIPhmEEvT_T0_+0x30>
- arr[i] = (var >> (8 * i));
- 800ba92: 68fb ldr r3, [r7, #12]
- 800ba94: 00db lsls r3, r3, #3
- 800ba96: 683a ldr r2, [r7, #0]
- 800ba98: fa22 f103 lsr.w r1, r2, r3
- 800ba9c: 687a ldr r2, [r7, #4]
- 800ba9e: 68fb ldr r3, [r7, #12]
- 800baa0: 4413 add r3, r2
- 800baa2: b2ca uxtb r2, r1
- 800baa4: 701a strb r2, [r3, #0]
- for (size_t i = 0; i < sizeof(V); i++)
- 800baa6: 68fb ldr r3, [r7, #12]
- 800baa8: 3301 adds r3, #1
- 800baaa: 60fb str r3, [r7, #12]
- 800baac: e7ee b.n 800ba8c <_ZN3ros3Msg8varToArrIPhmEEvT_T0_+0xe>
- }
- 800baae: bf00 nop
- 800bab0: 3714 adds r7, #20
- 800bab2: 46bd mov sp, r7
- 800bab4: f85d 7b04 ldr.w r7, [sp], #4
- 800bab8: 4770 bx lr
-
-0800baba <_ZN3ros3Msg8arrToVarImPhEEvRT_T0_>:
-
- // Copy data from a byte array into variable
- template<typename V, typename A>
- static void arrToVar(V& var, const A arr)
- 800baba: b480 push {r7}
- 800babc: b085 sub sp, #20
- 800babe: af00 add r7, sp, #0
- 800bac0: 6078 str r0, [r7, #4]
- 800bac2: 6039 str r1, [r7, #0]
- {
- var = 0;
- 800bac4: 687b ldr r3, [r7, #4]
- 800bac6: 2200 movs r2, #0
- 800bac8: 601a str r2, [r3, #0]
- for (size_t i = 0; i < sizeof(V); i++)
- 800baca: 2300 movs r3, #0
- 800bacc: 60fb str r3, [r7, #12]
- 800bace: 68fb ldr r3, [r7, #12]
- 800bad0: 2b03 cmp r3, #3
- 800bad2: d811 bhi.n 800baf8 <_ZN3ros3Msg8arrToVarImPhEEvRT_T0_+0x3e>
- var |= (arr[i] << (8 * i));
- 800bad4: 687b ldr r3, [r7, #4]
- 800bad6: 681b ldr r3, [r3, #0]
- 800bad8: 6839 ldr r1, [r7, #0]
- 800bada: 68fa ldr r2, [r7, #12]
- 800badc: 440a add r2, r1
- 800bade: 7812 ldrb r2, [r2, #0]
- 800bae0: 4611 mov r1, r2
- 800bae2: 68fa ldr r2, [r7, #12]
- 800bae4: 00d2 lsls r2, r2, #3
- 800bae6: fa01 f202 lsl.w r2, r1, r2
- 800baea: 431a orrs r2, r3
- 800baec: 687b ldr r3, [r7, #4]
- 800baee: 601a str r2, [r3, #0]
- for (size_t i = 0; i < sizeof(V); i++)
- 800baf0: 68fb ldr r3, [r7, #12]
- 800baf2: 3301 adds r3, #1
- 800baf4: 60fb str r3, [r7, #12]
- 800baf6: e7ea b.n 800bace <_ZN3ros3Msg8arrToVarImPhEEvRT_T0_+0x14>
- }
- 800baf8: bf00 nop
- 800bafa: 3714 adds r7, #20
- 800bafc: 46bd mov sp, r7
- 800bafe: f85d 7b04 ldr.w r7, [sp], #4
- 800bb02: 4770 bx lr
-
-0800bb04 <_ZN3ros15NodeHandleBase_C1Ev>:
-#include "ros/msg.h"
-
-namespace ros
-{
-
-class NodeHandleBase_
- 800bb04: b480 push {r7}
- 800bb06: b083 sub sp, #12
- 800bb08: af00 add r7, sp, #0
- 800bb0a: 6078 str r0, [r7, #4]
- 800bb0c: 4a04 ldr r2, [pc, #16] ; (800bb20 <_ZN3ros15NodeHandleBase_C1Ev+0x1c>)
- 800bb0e: 687b ldr r3, [r7, #4]
- 800bb10: 601a str r2, [r3, #0]
- 800bb12: 687b ldr r3, [r7, #4]
- 800bb14: 4618 mov r0, r3
- 800bb16: 370c adds r7, #12
- 800bb18: 46bd mov sp, r7
- 800bb1a: f85d 7b04 ldr.w r7, [sp], #4
- 800bb1e: 4770 bx lr
- 800bb20: 080122dc .word 0x080122dc
-
-0800bb24 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev>:
-
- /*
- * Setup Functions
- */
-public:
- NodeHandle_() : configured_(false)
- 800bb24: b580 push {r7, lr}
- 800bb26: b086 sub sp, #24
- 800bb28: af00 add r7, sp, #0
- 800bb2a: 6078 str r0, [r7, #4]
- 800bb2c: 687b ldr r3, [r7, #4]
- 800bb2e: 4618 mov r0, r3
- 800bb30: f7ff ffe8 bl 800bb04 <_ZN3ros15NodeHandleBase_C1Ev>
- 800bb34: 4a3a ldr r2, [pc, #232] ; (800bc20 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev+0xfc>)
- 800bb36: 687b ldr r3, [r7, #4]
- 800bb38: 601a str r2, [r3, #0]
- 800bb3a: 687b ldr r3, [r7, #4]
- 800bb3c: 3304 adds r3, #4
- 800bb3e: 4618 mov r0, r3
- 800bb40: f7ff fd30 bl 800b5a4 <_ZN13STM32HardwareC1Ev>
- 800bb44: 687b ldr r3, [r7, #4]
- 800bb46: 2200 movs r2, #0
- 800bb48: f883 2684 strb.w r2, [r3, #1668] ; 0x684
- 800bb4c: 687b ldr r3, [r7, #4]
- 800bb4e: f503 63d3 add.w r3, r3, #1688 ; 0x698
- 800bb52: 4618 mov r0, r3
- 800bb54: f7ff fa2e bl 800afb4 <_ZN14rosserial_msgs20RequestParamResponseC1Ev>
- {
-
- for (unsigned int i = 0; i < MAX_PUBLISHERS; i++)
- 800bb58: 2300 movs r3, #0
- 800bb5a: 617b str r3, [r7, #20]
- 800bb5c: 697b ldr r3, [r7, #20]
- 800bb5e: 2b18 cmp r3, #24
- 800bb60: d80a bhi.n 800bb78 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev+0x54>
- publishers[i] = 0;
- 800bb62: 687b ldr r3, [r7, #4]
- 800bb64: 697a ldr r2, [r7, #20]
- 800bb66: f502 72b5 add.w r2, r2, #362 ; 0x16a
- 800bb6a: 2100 movs r1, #0
- 800bb6c: f843 1022 str.w r1, [r3, r2, lsl #2]
- for (unsigned int i = 0; i < MAX_PUBLISHERS; i++)
- 800bb70: 697b ldr r3, [r7, #20]
- 800bb72: 3301 adds r3, #1
- 800bb74: 617b str r3, [r7, #20]
- 800bb76: e7f1 b.n 800bb5c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev+0x38>
-
- for (unsigned int i = 0; i < MAX_SUBSCRIBERS; i++)
- 800bb78: 2300 movs r3, #0
- 800bb7a: 613b str r3, [r7, #16]
- 800bb7c: 693b ldr r3, [r7, #16]
- 800bb7e: 2b18 cmp r3, #24
- 800bb80: d80b bhi.n 800bb9a <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev+0x76>
- subscribers[i] = 0;
- 800bb82: 687a ldr r2, [r7, #4]
- 800bb84: 693b ldr r3, [r7, #16]
- 800bb86: f503 73c1 add.w r3, r3, #386 ; 0x182
- 800bb8a: 009b lsls r3, r3, #2
- 800bb8c: 4413 add r3, r2
- 800bb8e: 2200 movs r2, #0
- 800bb90: 605a str r2, [r3, #4]
- for (unsigned int i = 0; i < MAX_SUBSCRIBERS; i++)
- 800bb92: 693b ldr r3, [r7, #16]
- 800bb94: 3301 adds r3, #1
- 800bb96: 613b str r3, [r7, #16]
- 800bb98: e7f0 b.n 800bb7c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev+0x58>
-
- for (unsigned int i = 0; i < INPUT_SIZE; i++)
- 800bb9a: 2300 movs r3, #0
- 800bb9c: 60fb str r3, [r7, #12]
- 800bb9e: 68fb ldr r3, [r7, #12]
- 800bba0: f5b3 7f00 cmp.w r3, #512 ; 0x200
- 800bba4: d20a bcs.n 800bbbc <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev+0x98>
- message_in[i] = 0;
- 800bba6: 687a ldr r2, [r7, #4]
- 800bba8: 68fb ldr r3, [r7, #12]
- 800bbaa: 4413 add r3, r2
- 800bbac: f503 73d4 add.w r3, r3, #424 ; 0x1a8
- 800bbb0: 2200 movs r2, #0
- 800bbb2: 701a strb r2, [r3, #0]
- for (unsigned int i = 0; i < INPUT_SIZE; i++)
- 800bbb4: 68fb ldr r3, [r7, #12]
- 800bbb6: 3301 adds r3, #1
- 800bbb8: 60fb str r3, [r7, #12]
- 800bbba: e7f0 b.n 800bb9e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev+0x7a>
-
- for (unsigned int i = 0; i < OUTPUT_SIZE; i++)
- 800bbbc: 2300 movs r3, #0
- 800bbbe: 60bb str r3, [r7, #8]
- 800bbc0: 68bb ldr r3, [r7, #8]
- 800bbc2: f5b3 7f00 cmp.w r3, #512 ; 0x200
- 800bbc6: d20a bcs.n 800bbde <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev+0xba>
- message_out[i] = 0;
- 800bbc8: 687a ldr r2, [r7, #4]
- 800bbca: 68bb ldr r3, [r7, #8]
- 800bbcc: 4413 add r3, r2
- 800bbce: f503 736a add.w r3, r3, #936 ; 0x3a8
- 800bbd2: 2200 movs r2, #0
- 800bbd4: 701a strb r2, [r3, #0]
- for (unsigned int i = 0; i < OUTPUT_SIZE; i++)
- 800bbd6: 68bb ldr r3, [r7, #8]
- 800bbd8: 3301 adds r3, #1
- 800bbda: 60bb str r3, [r7, #8]
- 800bbdc: e7f0 b.n 800bbc0 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev+0x9c>
-
- req_param_resp.ints_length = 0;
- 800bbde: 687b ldr r3, [r7, #4]
- 800bbe0: 2200 movs r2, #0
- 800bbe2: f8c3 269c str.w r2, [r3, #1692] ; 0x69c
- req_param_resp.ints = NULL;
- 800bbe6: 687b ldr r3, [r7, #4]
- 800bbe8: 2200 movs r2, #0
- 800bbea: f8c3 26a4 str.w r2, [r3, #1700] ; 0x6a4
- req_param_resp.floats_length = 0;
- 800bbee: 687b ldr r3, [r7, #4]
- 800bbf0: 2200 movs r2, #0
- 800bbf2: f8c3 26a8 str.w r2, [r3, #1704] ; 0x6a8
- req_param_resp.floats = NULL;
- 800bbf6: 687b ldr r3, [r7, #4]
- 800bbf8: 2200 movs r2, #0
- 800bbfa: f8c3 26b0 str.w r2, [r3, #1712] ; 0x6b0
- req_param_resp.ints_length = 0;
- 800bbfe: 687b ldr r3, [r7, #4]
- 800bc00: 2200 movs r2, #0
- 800bc02: f8c3 269c str.w r2, [r3, #1692] ; 0x69c
- req_param_resp.ints = NULL;
- 800bc06: 687b ldr r3, [r7, #4]
- 800bc08: 2200 movs r2, #0
- 800bc0a: f8c3 26a4 str.w r2, [r3, #1700] ; 0x6a4
-
- spin_timeout_ = 0;
- 800bc0e: 687b ldr r3, [r7, #4]
- 800bc10: 2200 movs r2, #0
- 800bc12: f8c3 21a4 str.w r2, [r3, #420] ; 0x1a4
- }
- 800bc16: 687b ldr r3, [r7, #4]
- 800bc18: 4618 mov r0, r3
- 800bc1a: 3718 adds r7, #24
- 800bc1c: 46bd mov sp, r7
- 800bc1e: bd80 pop {r7, pc}
- 800bc20: 080122c8 .word 0x080122c8
-
-0800bc24 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8initNodeEv>:
- {
- return &hardware_;
- }
-
- /* Start serial, initialize buffers */
- void initNode()
- 800bc24: b580 push {r7, lr}
- 800bc26: b082 sub sp, #8
- 800bc28: af00 add r7, sp, #0
- 800bc2a: 6078 str r0, [r7, #4]
- {
- hardware_.init();
- 800bc2c: 687b ldr r3, [r7, #4]
- 800bc2e: 3304 adds r3, #4
- 800bc30: 4618 mov r0, r3
- 800bc32: f7ff fcd9 bl 800b5e8 <_ZN13STM32Hardware4initEv>
- mode_ = 0;
- 800bc36: 687b ldr r3, [r7, #4]
- 800bc38: 2200 movs r2, #0
- 800bc3a: f8c3 2670 str.w r2, [r3, #1648] ; 0x670
- bytes_ = 0;
- 800bc3e: 687b ldr r3, [r7, #4]
- 800bc40: 2200 movs r2, #0
- 800bc42: f8c3 2674 str.w r2, [r3, #1652] ; 0x674
- index_ = 0;
- 800bc46: 687b ldr r3, [r7, #4]
- 800bc48: 2200 movs r2, #0
- 800bc4a: f8c3 267c str.w r2, [r3, #1660] ; 0x67c
- topic_ = 0;
- 800bc4e: 687b ldr r3, [r7, #4]
- 800bc50: 2200 movs r2, #0
- 800bc52: f8c3 2678 str.w r2, [r3, #1656] ; 0x678
- };
- 800bc56: bf00 nop
- 800bc58: 3708 adds r7, #8
- 800bc5a: 46bd mov sp, r7
- 800bc5c: bd80 pop {r7, pc}
-
-0800bc5e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE9advertiseERNS_9PublisherE>:
- /********************************************************************
- * Topic Management
- */
-
- /* Register a new publisher */
- bool advertise(Publisher & p)
- 800bc5e: b480 push {r7}
- 800bc60: b085 sub sp, #20
- 800bc62: af00 add r7, sp, #0
- 800bc64: 6078 str r0, [r7, #4]
- 800bc66: 6039 str r1, [r7, #0]
- {
- for (int i = 0; i < MAX_PUBLISHERS; i++)
- 800bc68: 2300 movs r3, #0
- 800bc6a: 60fb str r3, [r7, #12]
- 800bc6c: 68fb ldr r3, [r7, #12]
- 800bc6e: 2b18 cmp r3, #24
- 800bc70: dc1c bgt.n 800bcac <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE9advertiseERNS_9PublisherE+0x4e>
- {
- if (publishers[i] == 0) // empty slot
- 800bc72: 687b ldr r3, [r7, #4]
- 800bc74: 68fa ldr r2, [r7, #12]
- 800bc76: f502 72b5 add.w r2, r2, #362 ; 0x16a
- 800bc7a: f853 3022 ldr.w r3, [r3, r2, lsl #2]
- 800bc7e: 2b00 cmp r3, #0
- 800bc80: d110 bne.n 800bca4 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE9advertiseERNS_9PublisherE+0x46>
- {
- publishers[i] = &p;
- 800bc82: 687b ldr r3, [r7, #4]
- 800bc84: 68fa ldr r2, [r7, #12]
- 800bc86: f502 72b5 add.w r2, r2, #362 ; 0x16a
- 800bc8a: 6839 ldr r1, [r7, #0]
- 800bc8c: f843 1022 str.w r1, [r3, r2, lsl #2]
- p.id_ = i + 100 + MAX_SUBSCRIBERS;
- 800bc90: 68fb ldr r3, [r7, #12]
- 800bc92: f103 027d add.w r2, r3, #125 ; 0x7d
- 800bc96: 683b ldr r3, [r7, #0]
- 800bc98: 609a str r2, [r3, #8]
- p.nh_ = this;
- 800bc9a: 687a ldr r2, [r7, #4]
- 800bc9c: 683b ldr r3, [r7, #0]
- 800bc9e: 60da str r2, [r3, #12]
- return true;
- 800bca0: 2301 movs r3, #1
- 800bca2: e004 b.n 800bcae <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE9advertiseERNS_9PublisherE+0x50>
- for (int i = 0; i < MAX_PUBLISHERS; i++)
- 800bca4: 68fb ldr r3, [r7, #12]
- 800bca6: 3301 adds r3, #1
- 800bca8: 60fb str r3, [r7, #12]
- 800bcaa: e7df b.n 800bc6c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE9advertiseERNS_9PublisherE+0xe>
- }
- }
- return false;
- 800bcac: 2300 movs r3, #0
- }
- 800bcae: 4618 mov r0, r3
- 800bcb0: 3714 adds r7, #20
- 800bcb2: 46bd mov sp, r7
- 800bcb4: f85d 7b04 ldr.w r7, [sp], #4
- 800bcb8: 4770 bx lr
- ...
-
-0800bcbc <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE>:
- }
- }
- configured_ = true;
- }
-
- virtual int publish(int id, const Msg * msg)
- 800bcbc: b580 push {r7, lr}
- 800bcbe: b088 sub sp, #32
- 800bcc0: af00 add r7, sp, #0
- 800bcc2: 60f8 str r0, [r7, #12]
- 800bcc4: 60b9 str r1, [r7, #8]
- 800bcc6: 607a str r2, [r7, #4]
- {
- if (id >= 100 && !configured_)
- 800bcc8: 68bb ldr r3, [r7, #8]
- 800bcca: 2b63 cmp r3, #99 ; 0x63
- 800bccc: dd09 ble.n 800bce2 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x26>
- 800bcce: 68fb ldr r3, [r7, #12]
- 800bcd0: f893 3684 ldrb.w r3, [r3, #1668] ; 0x684
- 800bcd4: f083 0301 eor.w r3, r3, #1
- 800bcd8: b2db uxtb r3, r3
- 800bcda: 2b00 cmp r3, #0
- 800bcdc: d001 beq.n 800bce2 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x26>
- return 0;
- 800bcde: 2300 movs r3, #0
- 800bce0: e077 b.n 800bdd2 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x116>
-
- /* serialize message */
- int l = msg->serialize(message_out + 7);
- 800bce2: 687b ldr r3, [r7, #4]
- 800bce4: 681b ldr r3, [r3, #0]
- 800bce6: 681b ldr r3, [r3, #0]
- 800bce8: 68fa ldr r2, [r7, #12]
- 800bcea: f502 726a add.w r2, r2, #936 ; 0x3a8
- 800bcee: 3207 adds r2, #7
- 800bcf0: 4611 mov r1, r2
- 800bcf2: 6878 ldr r0, [r7, #4]
- 800bcf4: 4798 blx r3
- 800bcf6: 6178 str r0, [r7, #20]
-
- /* setup the header */
- message_out[0] = 0xff;
- 800bcf8: 68fb ldr r3, [r7, #12]
- 800bcfa: 22ff movs r2, #255 ; 0xff
- 800bcfc: f883 23a8 strb.w r2, [r3, #936] ; 0x3a8
- message_out[1] = PROTOCOL_VER;
- 800bd00: 68fb ldr r3, [r7, #12]
- 800bd02: 22fe movs r2, #254 ; 0xfe
- 800bd04: f883 23a9 strb.w r2, [r3, #937] ; 0x3a9
- message_out[2] = (uint8_t)((uint16_t)l & 255);
- 800bd08: 697b ldr r3, [r7, #20]
- 800bd0a: b2da uxtb r2, r3
- 800bd0c: 68fb ldr r3, [r7, #12]
- 800bd0e: f883 23aa strb.w r2, [r3, #938] ; 0x3aa
- message_out[3] = (uint8_t)((uint16_t)l >> 8);
- 800bd12: 697b ldr r3, [r7, #20]
- 800bd14: b29b uxth r3, r3
- 800bd16: 121b asrs r3, r3, #8
- 800bd18: b2da uxtb r2, r3
- 800bd1a: 68fb ldr r3, [r7, #12]
- 800bd1c: f883 23ab strb.w r2, [r3, #939] ; 0x3ab
- message_out[4] = 255 - ((message_out[2] + message_out[3]) % 256);
- 800bd20: 68fb ldr r3, [r7, #12]
- 800bd22: f893 23aa ldrb.w r2, [r3, #938] ; 0x3aa
- 800bd26: 68fb ldr r3, [r7, #12]
- 800bd28: f893 33ab ldrb.w r3, [r3, #939] ; 0x3ab
- 800bd2c: 4413 add r3, r2
- 800bd2e: b2db uxtb r3, r3
- 800bd30: 43db mvns r3, r3
- 800bd32: b2da uxtb r2, r3
- 800bd34: 68fb ldr r3, [r7, #12]
- 800bd36: f883 23ac strb.w r2, [r3, #940] ; 0x3ac
- message_out[5] = (uint8_t)((int16_t)id & 255);
- 800bd3a: 68bb ldr r3, [r7, #8]
- 800bd3c: b2da uxtb r2, r3
- 800bd3e: 68fb ldr r3, [r7, #12]
- 800bd40: f883 23ad strb.w r2, [r3, #941] ; 0x3ad
- message_out[6] = (uint8_t)((int16_t)id >> 8);
- 800bd44: 68bb ldr r3, [r7, #8]
- 800bd46: b21b sxth r3, r3
- 800bd48: 121b asrs r3, r3, #8
- 800bd4a: b2da uxtb r2, r3
- 800bd4c: 68fb ldr r3, [r7, #12]
- 800bd4e: f883 23ae strb.w r2, [r3, #942] ; 0x3ae
-
- /* calculate checksum */
- int chk = 0;
- 800bd52: 2300 movs r3, #0
- 800bd54: 61fb str r3, [r7, #28]
- for (int i = 5; i < l + 7; i++)
- 800bd56: 2305 movs r3, #5
- 800bd58: 61bb str r3, [r7, #24]
- 800bd5a: 697b ldr r3, [r7, #20]
- 800bd5c: 3307 adds r3, #7
- 800bd5e: 69ba ldr r2, [r7, #24]
- 800bd60: 429a cmp r2, r3
- 800bd62: da0d bge.n 800bd80 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0xc4>
- chk += message_out[i];
- 800bd64: 68fa ldr r2, [r7, #12]
- 800bd66: 69bb ldr r3, [r7, #24]
- 800bd68: 4413 add r3, r2
- 800bd6a: f503 736a add.w r3, r3, #936 ; 0x3a8
- 800bd6e: 781b ldrb r3, [r3, #0]
- 800bd70: 461a mov r2, r3
- 800bd72: 69fb ldr r3, [r7, #28]
- 800bd74: 4413 add r3, r2
- 800bd76: 61fb str r3, [r7, #28]
- for (int i = 5; i < l + 7; i++)
- 800bd78: 69bb ldr r3, [r7, #24]
- 800bd7a: 3301 adds r3, #1
- 800bd7c: 61bb str r3, [r7, #24]
- 800bd7e: e7ec b.n 800bd5a <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x9e>
- l += 7;
- 800bd80: 697b ldr r3, [r7, #20]
- 800bd82: 3307 adds r3, #7
- 800bd84: 617b str r3, [r7, #20]
- message_out[l++] = 255 - (chk % 256);
- 800bd86: 69fb ldr r3, [r7, #28]
- 800bd88: 425a negs r2, r3
- 800bd8a: b2db uxtb r3, r3
- 800bd8c: b2d2 uxtb r2, r2
- 800bd8e: bf58 it pl
- 800bd90: 4253 negpl r3, r2
- 800bd92: b2da uxtb r2, r3
- 800bd94: 697b ldr r3, [r7, #20]
- 800bd96: 1c59 adds r1, r3, #1
- 800bd98: 6179 str r1, [r7, #20]
- 800bd9a: 43d2 mvns r2, r2
- 800bd9c: b2d1 uxtb r1, r2
- 800bd9e: 68fa ldr r2, [r7, #12]
- 800bda0: 4413 add r3, r2
- 800bda2: 460a mov r2, r1
- 800bda4: f883 23a8 strb.w r2, [r3, #936] ; 0x3a8
-
- if (l <= OUTPUT_SIZE)
- 800bda8: 697b ldr r3, [r7, #20]
- 800bdaa: f5b3 7f00 cmp.w r3, #512 ; 0x200
- 800bdae: dc0a bgt.n 800bdc6 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x10a>
- {
- hardware_.write(message_out, l);
- 800bdb0: 68fb ldr r3, [r7, #12]
- 800bdb2: 1d18 adds r0, r3, #4
- 800bdb4: 68fb ldr r3, [r7, #12]
- 800bdb6: f503 736a add.w r3, r3, #936 ; 0x3a8
- 800bdba: 697a ldr r2, [r7, #20]
- 800bdbc: 4619 mov r1, r3
- 800bdbe: f7ff fcbb bl 800b738 <_ZN13STM32Hardware5writeEPhi>
- return l;
- 800bdc2: 697b ldr r3, [r7, #20]
- 800bdc4: e005 b.n 800bdd2 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x116>
- }
- else
- {
- logerror("Message from device dropped: message larger than buffer.");
- 800bdc6: 4905 ldr r1, [pc, #20] ; (800bddc <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x120>)
- 800bdc8: 68f8 ldr r0, [r7, #12]
- 800bdca: f000 f9f2 bl 800c1b2 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8logerrorEPKc>
- return -1;
- 800bdce: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff
- }
- }
- 800bdd2: 4618 mov r0, r3
- 800bdd4: 3720 adds r7, #32
- 800bdd6: 46bd mov sp, r7
- 800bdd8: bd80 pop {r7, pc}
- 800bdda: bf00 nop
- 800bddc: 08011ad0 .word 0x08011ad0
-
-0800bde0 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv>:
- virtual int spinOnce()
- 800bde0: b580 push {r7, lr}
- 800bde2: b084 sub sp, #16
- 800bde4: af00 add r7, sp, #0
- 800bde6: 6078 str r0, [r7, #4]
- uint32_t c_time = hardware_.time();
- 800bde8: 687b ldr r3, [r7, #4]
- 800bdea: 3304 adds r3, #4
- 800bdec: 4618 mov r0, r3
- 800bdee: f7ff fce8 bl 800b7c2 <_ZN13STM32Hardware4timeEv>
- 800bdf2: 60f8 str r0, [r7, #12]
- if ((c_time - last_sync_receive_time) > (SYNC_SECONDS * 2200))
- 800bdf4: 687b ldr r3, [r7, #4]
- 800bdf6: f8d3 368c ldr.w r3, [r3, #1676] ; 0x68c
- 800bdfa: 68fa ldr r2, [r7, #12]
- 800bdfc: 1ad3 subs r3, r2, r3
- 800bdfe: f642 22f8 movw r2, #11000 ; 0x2af8
- 800be02: 4293 cmp r3, r2
- 800be04: d903 bls.n 800be0e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x2e>
- configured_ = false;
- 800be06: 687b ldr r3, [r7, #4]
- 800be08: 2200 movs r2, #0
- 800be0a: f883 2684 strb.w r2, [r3, #1668] ; 0x684
- if (mode_ != MODE_FIRST_FF)
- 800be0e: 687b ldr r3, [r7, #4]
- 800be10: f8d3 3670 ldr.w r3, [r3, #1648] ; 0x670
- 800be14: 2b00 cmp r3, #0
- 800be16: d009 beq.n 800be2c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
- if (c_time > last_msg_timeout_time)
- 800be18: 687b ldr r3, [r7, #4]
- 800be1a: f8d3 3690 ldr.w r3, [r3, #1680] ; 0x690
- 800be1e: 68fa ldr r2, [r7, #12]
- 800be20: 429a cmp r2, r3
- 800be22: d903 bls.n 800be2c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
- mode_ = MODE_FIRST_FF;
- 800be24: 687b ldr r3, [r7, #4]
- 800be26: 2200 movs r2, #0
- 800be28: f8c3 2670 str.w r2, [r3, #1648] ; 0x670
- if (spin_timeout_ > 0)
- 800be2c: 687b ldr r3, [r7, #4]
- 800be2e: f8d3 31a4 ldr.w r3, [r3, #420] ; 0x1a4
- 800be32: 2b00 cmp r3, #0
- 800be34: d014 beq.n 800be60 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x80>
- if ((hardware_.time() - c_time) > spin_timeout_)
- 800be36: 687b ldr r3, [r7, #4]
- 800be38: 3304 adds r3, #4
- 800be3a: 4618 mov r0, r3
- 800be3c: f7ff fcc1 bl 800b7c2 <_ZN13STM32Hardware4timeEv>
- 800be40: 4602 mov r2, r0
- 800be42: 68fb ldr r3, [r7, #12]
- 800be44: 1ad2 subs r2, r2, r3
- 800be46: 687b ldr r3, [r7, #4]
- 800be48: f8d3 31a4 ldr.w r3, [r3, #420] ; 0x1a4
- 800be4c: 429a cmp r2, r3
- 800be4e: bf8c ite hi
- 800be50: 2301 movhi r3, #1
- 800be52: 2300 movls r3, #0
- 800be54: b2db uxtb r3, r3
- 800be56: 2b00 cmp r3, #0
- 800be58: d002 beq.n 800be60 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x80>
- return SPIN_TIMEOUT;
- 800be5a: f06f 0301 mvn.w r3, #1
- 800be5e: e197 b.n 800c190 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x3b0>
- int data = hardware_.read();
- 800be60: 687b ldr r3, [r7, #4]
- 800be62: 3304 adds r3, #4
- 800be64: 4618 mov r0, r3
- 800be66: f7ff fbdf bl 800b628 <_ZN13STM32Hardware4readEv>
- 800be6a: 60b8 str r0, [r7, #8]
- if (data < 0)
- 800be6c: 68bb ldr r3, [r7, #8]
- 800be6e: 2b00 cmp r3, #0
- 800be70: f2c0 8177 blt.w 800c162 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x382>
- checksum_ += data;
- 800be74: 687b ldr r3, [r7, #4]
- 800be76: f8d3 2680 ldr.w r2, [r3, #1664] ; 0x680
- 800be7a: 68bb ldr r3, [r7, #8]
- 800be7c: 441a add r2, r3
- 800be7e: 687b ldr r3, [r7, #4]
- 800be80: f8c3 2680 str.w r2, [r3, #1664] ; 0x680
- if (mode_ == MODE_MESSAGE) /* message data being recieved */
- 800be84: 687b ldr r3, [r7, #4]
- 800be86: f8d3 3670 ldr.w r3, [r3, #1648] ; 0x670
- 800be8a: 2b07 cmp r3, #7
- 800be8c: d11e bne.n 800becc <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0xec>
- message_in[index_++] = data;
- 800be8e: 687b ldr r3, [r7, #4]
- 800be90: f8d3 367c ldr.w r3, [r3, #1660] ; 0x67c
- 800be94: 1c59 adds r1, r3, #1
- 800be96: 687a ldr r2, [r7, #4]
- 800be98: f8c2 167c str.w r1, [r2, #1660] ; 0x67c
- 800be9c: 68ba ldr r2, [r7, #8]
- 800be9e: b2d1 uxtb r1, r2
- 800bea0: 687a ldr r2, [r7, #4]
- 800bea2: 4413 add r3, r2
- 800bea4: 460a mov r2, r1
- 800bea6: f883 21a8 strb.w r2, [r3, #424] ; 0x1a8
- bytes_--;
- 800beaa: 687b ldr r3, [r7, #4]
- 800beac: f8d3 3674 ldr.w r3, [r3, #1652] ; 0x674
- 800beb0: 1e5a subs r2, r3, #1
- 800beb2: 687b ldr r3, [r7, #4]
- 800beb4: f8c3 2674 str.w r2, [r3, #1652] ; 0x674
- if (bytes_ == 0) /* is message complete? if so, checksum */
- 800beb8: 687b ldr r3, [r7, #4]
- 800beba: f8d3 3674 ldr.w r3, [r3, #1652] ; 0x674
- 800bebe: 2b00 cmp r3, #0
- 800bec0: d1b4 bne.n 800be2c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
- mode_ = MODE_MSG_CHECKSUM;
- 800bec2: 687b ldr r3, [r7, #4]
- 800bec4: 2208 movs r2, #8
- 800bec6: f8c3 2670 str.w r2, [r3, #1648] ; 0x670
- 800beca: e7af b.n 800be2c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
- else if (mode_ == MODE_FIRST_FF)
- 800becc: 687b ldr r3, [r7, #4]
- 800bece: f8d3 3670 ldr.w r3, [r3, #1648] ; 0x670
- 800bed2: 2b00 cmp r3, #0
- 800bed4: d128 bne.n 800bf28 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x148>
- if (data == 0xff)
- 800bed6: 68bb ldr r3, [r7, #8]
- 800bed8: 2bff cmp r3, #255 ; 0xff
- 800beda: d10d bne.n 800bef8 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x118>
- mode_++;
- 800bedc: 687b ldr r3, [r7, #4]
- 800bede: f8d3 3670 ldr.w r3, [r3, #1648] ; 0x670
- 800bee2: 1c5a adds r2, r3, #1
- 800bee4: 687b ldr r3, [r7, #4]
- 800bee6: f8c3 2670 str.w r2, [r3, #1648] ; 0x670
- last_msg_timeout_time = c_time + SERIAL_MSG_TIMEOUT;
- 800beea: 68fb ldr r3, [r7, #12]
- 800beec: f103 0214 add.w r2, r3, #20
- 800bef0: 687b ldr r3, [r7, #4]
- 800bef2: f8c3 2690 str.w r2, [r3, #1680] ; 0x690
- 800bef6: e799 b.n 800be2c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
- else if (hardware_.time() - c_time > (SYNC_SECONDS * 1000))
- 800bef8: 687b ldr r3, [r7, #4]
- 800befa: 3304 adds r3, #4
- 800befc: 4618 mov r0, r3
- 800befe: f7ff fc60 bl 800b7c2 <_ZN13STM32Hardware4timeEv>
- 800bf02: 4602 mov r2, r0
- 800bf04: 68fb ldr r3, [r7, #12]
- 800bf06: 1ad3 subs r3, r2, r3
- 800bf08: f241 3288 movw r2, #5000 ; 0x1388
- 800bf0c: 4293 cmp r3, r2
- 800bf0e: bf8c ite hi
- 800bf10: 2301 movhi r3, #1
- 800bf12: 2300 movls r3, #0
- 800bf14: b2db uxtb r3, r3
- 800bf16: 2b00 cmp r3, #0
- 800bf18: d088 beq.n 800be2c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
- configured_ = false;
- 800bf1a: 687b ldr r3, [r7, #4]
- 800bf1c: 2200 movs r2, #0
- 800bf1e: f883 2684 strb.w r2, [r3, #1668] ; 0x684
- return SPIN_TIMEOUT;
- 800bf22: f06f 0301 mvn.w r3, #1
- 800bf26: e133 b.n 800c190 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x3b0>
- else if (mode_ == MODE_PROTOCOL_VER)
- 800bf28: 687b ldr r3, [r7, #4]
- 800bf2a: f8d3 3670 ldr.w r3, [r3, #1648] ; 0x670
- 800bf2e: 2b01 cmp r3, #1
- 800bf30: d11b bne.n 800bf6a <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x18a>
- if (data == PROTOCOL_VER)
- 800bf32: 68bb ldr r3, [r7, #8]
- 800bf34: 2bfe cmp r3, #254 ; 0xfe
- 800bf36: d107 bne.n 800bf48 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x168>
- mode_++;
- 800bf38: 687b ldr r3, [r7, #4]
- 800bf3a: f8d3 3670 ldr.w r3, [r3, #1648] ; 0x670
- 800bf3e: 1c5a adds r2, r3, #1
- 800bf40: 687b ldr r3, [r7, #4]
- 800bf42: f8c3 2670 str.w r2, [r3, #1648] ; 0x670
- 800bf46: e771 b.n 800be2c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
- mode_ = MODE_FIRST_FF;
- 800bf48: 687b ldr r3, [r7, #4]
- 800bf4a: 2200 movs r2, #0
- 800bf4c: f8c3 2670 str.w r2, [r3, #1648] ; 0x670
- if (configured_ == false)
- 800bf50: 687b ldr r3, [r7, #4]
- 800bf52: f893 3684 ldrb.w r3, [r3, #1668] ; 0x684
- 800bf56: f083 0301 eor.w r3, r3, #1
- 800bf5a: b2db uxtb r3, r3
- 800bf5c: 2b00 cmp r3, #0
- 800bf5e: f43f af65 beq.w 800be2c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
- requestSyncTime(); /* send a msg back showing our protocol version */
- 800bf62: 6878 ldr r0, [r7, #4]
- 800bf64: f000 f933 bl 800c1ce <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15requestSyncTimeEv>
- 800bf68: e760 b.n 800be2c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
- else if (mode_ == MODE_SIZE_L) /* bottom half of message size */
- 800bf6a: 687b ldr r3, [r7, #4]
- 800bf6c: f8d3 3670 ldr.w r3, [r3, #1648] ; 0x670
- 800bf70: 2b02 cmp r3, #2
- 800bf72: d113 bne.n 800bf9c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x1bc>
- bytes_ = data;
- 800bf74: 687b ldr r3, [r7, #4]
- 800bf76: 68ba ldr r2, [r7, #8]
- 800bf78: f8c3 2674 str.w r2, [r3, #1652] ; 0x674
- index_ = 0;
- 800bf7c: 687b ldr r3, [r7, #4]
- 800bf7e: 2200 movs r2, #0
- 800bf80: f8c3 267c str.w r2, [r3, #1660] ; 0x67c
- mode_++;
- 800bf84: 687b ldr r3, [r7, #4]
- 800bf86: f8d3 3670 ldr.w r3, [r3, #1648] ; 0x670
- 800bf8a: 1c5a adds r2, r3, #1
- 800bf8c: 687b ldr r3, [r7, #4]
- 800bf8e: f8c3 2670 str.w r2, [r3, #1648] ; 0x670
- checksum_ = data; /* first byte for calculating size checksum */
- 800bf92: 687b ldr r3, [r7, #4]
- 800bf94: 68ba ldr r2, [r7, #8]
- 800bf96: f8c3 2680 str.w r2, [r3, #1664] ; 0x680
- 800bf9a: e747 b.n 800be2c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
- else if (mode_ == MODE_SIZE_H) /* top half of message size */
- 800bf9c: 687b ldr r3, [r7, #4]
- 800bf9e: f8d3 3670 ldr.w r3, [r3, #1648] ; 0x670
- 800bfa2: 2b03 cmp r3, #3
- 800bfa4: d110 bne.n 800bfc8 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x1e8>
- bytes_ += data << 8;
- 800bfa6: 687b ldr r3, [r7, #4]
- 800bfa8: f8d3 2674 ldr.w r2, [r3, #1652] ; 0x674
- 800bfac: 68bb ldr r3, [r7, #8]
- 800bfae: 021b lsls r3, r3, #8
- 800bfb0: 441a add r2, r3
- 800bfb2: 687b ldr r3, [r7, #4]
- 800bfb4: f8c3 2674 str.w r2, [r3, #1652] ; 0x674
- mode_++;
- 800bfb8: 687b ldr r3, [r7, #4]
- 800bfba: f8d3 3670 ldr.w r3, [r3, #1648] ; 0x670
- 800bfbe: 1c5a adds r2, r3, #1
- 800bfc0: 687b ldr r3, [r7, #4]
- 800bfc2: f8c3 2670 str.w r2, [r3, #1648] ; 0x670
- 800bfc6: e731 b.n 800be2c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
- else if (mode_ == MODE_SIZE_CHECKSUM)
- 800bfc8: 687b ldr r3, [r7, #4]
- 800bfca: f8d3 3670 ldr.w r3, [r3, #1648] ; 0x670
- 800bfce: 2b04 cmp r3, #4
- 800bfd0: d116 bne.n 800c000 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x220>
- if ((checksum_ % 256) == 255)
- 800bfd2: 687b ldr r3, [r7, #4]
- 800bfd4: f8d3 3680 ldr.w r3, [r3, #1664] ; 0x680
- 800bfd8: 425a negs r2, r3
- 800bfda: b2db uxtb r3, r3
- 800bfdc: b2d2 uxtb r2, r2
- 800bfde: bf58 it pl
- 800bfe0: 4253 negpl r3, r2
- 800bfe2: 2bff cmp r3, #255 ; 0xff
- 800bfe4: d107 bne.n 800bff6 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x216>
- mode_++;
- 800bfe6: 687b ldr r3, [r7, #4]
- 800bfe8: f8d3 3670 ldr.w r3, [r3, #1648] ; 0x670
- 800bfec: 1c5a adds r2, r3, #1
- 800bfee: 687b ldr r3, [r7, #4]
- 800bff0: f8c3 2670 str.w r2, [r3, #1648] ; 0x670
- 800bff4: e71a b.n 800be2c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
- mode_ = MODE_FIRST_FF; /* Abandon the frame if the msg len is wrong */
- 800bff6: 687b ldr r3, [r7, #4]
- 800bff8: 2200 movs r2, #0
- 800bffa: f8c3 2670 str.w r2, [r3, #1648] ; 0x670
- 800bffe: e715 b.n 800be2c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
- else if (mode_ == MODE_TOPIC_L) /* bottom half of topic id */
- 800c000: 687b ldr r3, [r7, #4]
- 800c002: f8d3 3670 ldr.w r3, [r3, #1648] ; 0x670
- 800c006: 2b05 cmp r3, #5
- 800c008: d10f bne.n 800c02a <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x24a>
- topic_ = data;
- 800c00a: 687b ldr r3, [r7, #4]
- 800c00c: 68ba ldr r2, [r7, #8]
- 800c00e: f8c3 2678 str.w r2, [r3, #1656] ; 0x678
- mode_++;
- 800c012: 687b ldr r3, [r7, #4]
- 800c014: f8d3 3670 ldr.w r3, [r3, #1648] ; 0x670
- 800c018: 1c5a adds r2, r3, #1
- 800c01a: 687b ldr r3, [r7, #4]
- 800c01c: f8c3 2670 str.w r2, [r3, #1648] ; 0x670
- checksum_ = data; /* first byte included in checksum */
- 800c020: 687b ldr r3, [r7, #4]
- 800c022: 68ba ldr r2, [r7, #8]
- 800c024: f8c3 2680 str.w r2, [r3, #1664] ; 0x680
- 800c028: e700 b.n 800be2c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
- else if (mode_ == MODE_TOPIC_H) /* top half of topic id */
- 800c02a: 687b ldr r3, [r7, #4]
- 800c02c: f8d3 3670 ldr.w r3, [r3, #1648] ; 0x670
- 800c030: 2b06 cmp r3, #6
- 800c032: d117 bne.n 800c064 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x284>
- topic_ += data << 8;
- 800c034: 687b ldr r3, [r7, #4]
- 800c036: f8d3 2678 ldr.w r2, [r3, #1656] ; 0x678
- 800c03a: 68bb ldr r3, [r7, #8]
- 800c03c: 021b lsls r3, r3, #8
- 800c03e: 441a add r2, r3
- 800c040: 687b ldr r3, [r7, #4]
- 800c042: f8c3 2678 str.w r2, [r3, #1656] ; 0x678
- mode_ = MODE_MESSAGE;
- 800c046: 687b ldr r3, [r7, #4]
- 800c048: 2207 movs r2, #7
- 800c04a: f8c3 2670 str.w r2, [r3, #1648] ; 0x670
- if (bytes_ == 0)
- 800c04e: 687b ldr r3, [r7, #4]
- 800c050: f8d3 3674 ldr.w r3, [r3, #1652] ; 0x674
- 800c054: 2b00 cmp r3, #0
- 800c056: f47f aee9 bne.w 800be2c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
- mode_ = MODE_MSG_CHECKSUM;
- 800c05a: 687b ldr r3, [r7, #4]
- 800c05c: 2208 movs r2, #8
- 800c05e: f8c3 2670 str.w r2, [r3, #1648] ; 0x670
- 800c062: e6e3 b.n 800be2c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
- else if (mode_ == MODE_MSG_CHECKSUM) /* do checksum */
- 800c064: 687b ldr r3, [r7, #4]
- 800c066: f8d3 3670 ldr.w r3, [r3, #1648] ; 0x670
- 800c06a: 2b08 cmp r3, #8
- 800c06c: f47f aede bne.w 800be2c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
- mode_ = MODE_FIRST_FF;
- 800c070: 687b ldr r3, [r7, #4]
- 800c072: 2200 movs r2, #0
- 800c074: f8c3 2670 str.w r2, [r3, #1648] ; 0x670
- if ((checksum_ % 256) == 255)
- 800c078: 687b ldr r3, [r7, #4]
- 800c07a: f8d3 3680 ldr.w r3, [r3, #1664] ; 0x680
- 800c07e: 425a negs r2, r3
- 800c080: b2db uxtb r3, r3
- 800c082: b2d2 uxtb r2, r2
- 800c084: bf58 it pl
- 800c086: 4253 negpl r3, r2
- 800c088: 2bff cmp r3, #255 ; 0xff
- 800c08a: f47f aecf bne.w 800be2c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
- if (topic_ == TopicInfo::ID_PUBLISHER)
- 800c08e: 687b ldr r3, [r7, #4]
- 800c090: f8d3 3678 ldr.w r3, [r3, #1656] ; 0x678
- 800c094: 2b00 cmp r3, #0
- 800c096: d110 bne.n 800c0ba <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x2da>
- requestSyncTime();
- 800c098: 6878 ldr r0, [r7, #4]
- 800c09a: f000 f898 bl 800c1ce <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15requestSyncTimeEv>
- negotiateTopics();
- 800c09e: 6878 ldr r0, [r7, #4]
- 800c0a0: f000 f8b3 bl 800c20a <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv>
- last_sync_time = c_time;
- 800c0a4: 687b ldr r3, [r7, #4]
- 800c0a6: 68fa ldr r2, [r7, #12]
- 800c0a8: f8c3 2688 str.w r2, [r3, #1672] ; 0x688
- last_sync_receive_time = c_time;
- 800c0ac: 687b ldr r3, [r7, #4]
- 800c0ae: 68fa ldr r2, [r7, #12]
- 800c0b0: f8c3 268c str.w r2, [r3, #1676] ; 0x68c
- return SPIN_ERR;
- 800c0b4: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff
- 800c0b8: e06a b.n 800c190 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x3b0>
- else if (topic_ == TopicInfo::ID_TIME)
- 800c0ba: 687b ldr r3, [r7, #4]
- 800c0bc: f8d3 3678 ldr.w r3, [r3, #1656] ; 0x678
- 800c0c0: 2b0a cmp r3, #10
- 800c0c2: d107 bne.n 800c0d4 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x2f4>
- syncTime(message_in);
- 800c0c4: 687b ldr r3, [r7, #4]
- 800c0c6: f503 73d4 add.w r3, r3, #424 ; 0x1a8
- 800c0ca: 4619 mov r1, r3
- 800c0cc: 6878 ldr r0, [r7, #4]
- 800c0ce: f000 f97d bl 800c3cc <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8syncTimeEPh>
- 800c0d2: e6ab b.n 800be2c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
- else if (topic_ == TopicInfo::ID_PARAMETER_REQUEST)
- 800c0d4: 687b ldr r3, [r7, #4]
- 800c0d6: f8d3 3678 ldr.w r3, [r3, #1656] ; 0x678
- 800c0da: 2b06 cmp r3, #6
- 800c0dc: d10e bne.n 800c0fc <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x31c>
- req_param_resp.deserialize(message_in);
- 800c0de: 687b ldr r3, [r7, #4]
- 800c0e0: f503 62d3 add.w r2, r3, #1688 ; 0x698
- 800c0e4: 687b ldr r3, [r7, #4]
- 800c0e6: f503 73d4 add.w r3, r3, #424 ; 0x1a8
- 800c0ea: 4619 mov r1, r3
- 800c0ec: 4610 mov r0, r2
- 800c0ee: f7ff f896 bl 800b21e <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh>
- param_recieved = true;
- 800c0f2: 687b ldr r3, [r7, #4]
- 800c0f4: 2201 movs r2, #1
- 800c0f6: f883 2694 strb.w r2, [r3, #1684] ; 0x694
- 800c0fa: e697 b.n 800be2c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
- else if (topic_ == TopicInfo::ID_TX_STOP)
- 800c0fc: 687b ldr r3, [r7, #4]
- 800c0fe: f8d3 3678 ldr.w r3, [r3, #1656] ; 0x678
- 800c102: 2b0b cmp r3, #11
- 800c104: d104 bne.n 800c110 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x330>
- configured_ = false;
- 800c106: 687b ldr r3, [r7, #4]
- 800c108: 2200 movs r2, #0
- 800c10a: f883 2684 strb.w r2, [r3, #1668] ; 0x684
- 800c10e: e68d b.n 800be2c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
- if (subscribers[topic_ - 100])
- 800c110: 687b ldr r3, [r7, #4]
- 800c112: f8d3 3678 ldr.w r3, [r3, #1656] ; 0x678
- 800c116: 3b64 subs r3, #100 ; 0x64
- 800c118: 687a ldr r2, [r7, #4]
- 800c11a: f503 73c1 add.w r3, r3, #386 ; 0x182
- 800c11e: 009b lsls r3, r3, #2
- 800c120: 4413 add r3, r2
- 800c122: 685b ldr r3, [r3, #4]
- 800c124: 2b00 cmp r3, #0
- 800c126: f43f ae81 beq.w 800be2c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
- subscribers[topic_ - 100]->callback(message_in);
- 800c12a: 687b ldr r3, [r7, #4]
- 800c12c: f8d3 3678 ldr.w r3, [r3, #1656] ; 0x678
- 800c130: 3b64 subs r3, #100 ; 0x64
- 800c132: 687a ldr r2, [r7, #4]
- 800c134: f503 73c1 add.w r3, r3, #386 ; 0x182
- 800c138: 009b lsls r3, r3, #2
- 800c13a: 4413 add r3, r2
- 800c13c: 6858 ldr r0, [r3, #4]
- 800c13e: 687b ldr r3, [r7, #4]
- 800c140: f8d3 3678 ldr.w r3, [r3, #1656] ; 0x678
- 800c144: 3b64 subs r3, #100 ; 0x64
- 800c146: 687a ldr r2, [r7, #4]
- 800c148: f503 73c1 add.w r3, r3, #386 ; 0x182
- 800c14c: 009b lsls r3, r3, #2
- 800c14e: 4413 add r3, r2
- 800c150: 685b ldr r3, [r3, #4]
- 800c152: 681b ldr r3, [r3, #0]
- 800c154: 681b ldr r3, [r3, #0]
- 800c156: 687a ldr r2, [r7, #4]
- 800c158: f502 72d4 add.w r2, r2, #424 ; 0x1a8
- 800c15c: 4611 mov r1, r2
- 800c15e: 4798 blx r3
- while (true)
- 800c160: e664 b.n 800be2c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
- break;
- 800c162: bf00 nop
- if (configured_ && ((c_time - last_sync_time) > (SYNC_SECONDS * 500)))
- 800c164: 687b ldr r3, [r7, #4]
- 800c166: f893 3684 ldrb.w r3, [r3, #1668] ; 0x684
- 800c16a: 2b00 cmp r3, #0
- 800c16c: d00f beq.n 800c18e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x3ae>
- 800c16e: 687b ldr r3, [r7, #4]
- 800c170: f8d3 3688 ldr.w r3, [r3, #1672] ; 0x688
- 800c174: 68fa ldr r2, [r7, #12]
- 800c176: 1ad3 subs r3, r2, r3
- 800c178: f640 12c4 movw r2, #2500 ; 0x9c4
- 800c17c: 4293 cmp r3, r2
- 800c17e: d906 bls.n 800c18e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x3ae>
- requestSyncTime();
- 800c180: 6878 ldr r0, [r7, #4]
- 800c182: f000 f824 bl 800c1ce <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15requestSyncTimeEv>
- last_sync_time = c_time;
- 800c186: 687b ldr r3, [r7, #4]
- 800c188: 68fa ldr r2, [r7, #12]
- 800c18a: f8c3 2688 str.w r2, [r3, #1672] ; 0x688
- return SPIN_OK;
- 800c18e: 2300 movs r3, #0
- }
- 800c190: 4618 mov r0, r3
- 800c192: 3710 adds r7, #16
- 800c194: 46bd mov sp, r7
- 800c196: bd80 pop {r7, pc}
-
-0800c198 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE9connectedEv>:
- virtual bool connected()
- 800c198: b480 push {r7}
- 800c19a: b083 sub sp, #12
- 800c19c: af00 add r7, sp, #0
- 800c19e: 6078 str r0, [r7, #4]
- return configured_;
- 800c1a0: 687b ldr r3, [r7, #4]
- 800c1a2: f893 3684 ldrb.w r3, [r3, #1668] ; 0x684
- };
- 800c1a6: 4618 mov r0, r3
- 800c1a8: 370c adds r7, #12
- 800c1aa: 46bd mov sp, r7
- 800c1ac: f85d 7b04 ldr.w r7, [sp], #4
- 800c1b0: 4770 bx lr
-
-0800c1b2 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8logerrorEPKc>:
- }
- void logwarn(const char *msg)
- {
- log(rosserial_msgs::Log::WARN, msg);
- }
- void logerror(const char*msg)
- 800c1b2: b580 push {r7, lr}
- 800c1b4: b082 sub sp, #8
- 800c1b6: af00 add r7, sp, #0
- 800c1b8: 6078 str r0, [r7, #4]
- 800c1ba: 6039 str r1, [r7, #0]
- {
- log(rosserial_msgs::Log::ERROR, msg);
- 800c1bc: 683a ldr r2, [r7, #0]
- 800c1be: 2103 movs r1, #3
- 800c1c0: 6878 ldr r0, [r7, #4]
- 800c1c2: f000 f94f bl 800c464 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE3logEcPKc>
- }
- 800c1c6: bf00 nop
- 800c1c8: 3708 adds r7, #8
- 800c1ca: 46bd mov sp, r7
- 800c1cc: bd80 pop {r7, pc}
-
-0800c1ce <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15requestSyncTimeEv>:
- void requestSyncTime()
- 800c1ce: b580 push {r7, lr}
- 800c1d0: b086 sub sp, #24
- 800c1d2: af00 add r7, sp, #0
- 800c1d4: 6078 str r0, [r7, #4]
- std_msgs::Time t;
- 800c1d6: f107 030c add.w r3, r7, #12
- 800c1da: 4618 mov r0, r3
- 800c1dc: f7fe fb86 bl 800a8ec <_ZN8std_msgs4TimeC1Ev>
- publish(TopicInfo::ID_TIME, &t);
- 800c1e0: 687b ldr r3, [r7, #4]
- 800c1e2: 681b ldr r3, [r3, #0]
- 800c1e4: 681b ldr r3, [r3, #0]
- 800c1e6: f107 020c add.w r2, r7, #12
- 800c1ea: 210a movs r1, #10
- 800c1ec: 6878 ldr r0, [r7, #4]
- 800c1ee: 4798 blx r3
- rt_time = hardware_.time();
- 800c1f0: 687b ldr r3, [r7, #4]
- 800c1f2: 3304 adds r3, #4
- 800c1f4: 4618 mov r0, r3
- 800c1f6: f7ff fae4 bl 800b7c2 <_ZN13STM32Hardware4timeEv>
- 800c1fa: 4602 mov r2, r0
- 800c1fc: 687b ldr r3, [r7, #4]
- 800c1fe: f8c3 2198 str.w r2, [r3, #408] ; 0x198
- }
- 800c202: bf00 nop
- 800c204: 3718 adds r7, #24
- 800c206: 46bd mov sp, r7
- 800c208: bd80 pop {r7, pc}
-
-0800c20a <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv>:
- void negotiateTopics()
- 800c20a: b590 push {r4, r7, lr}
- 800c20c: b08b sub sp, #44 ; 0x2c
- 800c20e: af00 add r7, sp, #0
- 800c210: 6078 str r0, [r7, #4]
- rosserial_msgs::TopicInfo ti;
- 800c212: f107 030c add.w r3, r7, #12
- 800c216: 4618 mov r0, r3
- 800c218: f7fe fc58 bl 800aacc <_ZN14rosserial_msgs9TopicInfoC1Ev>
- for (i = 0; i < MAX_PUBLISHERS; i++)
- 800c21c: 2300 movs r3, #0
- 800c21e: 627b str r3, [r7, #36] ; 0x24
- 800c220: 6a7b ldr r3, [r7, #36] ; 0x24
- 800c222: 2b18 cmp r3, #24
- 800c224: dc5b bgt.n 800c2de <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0xd4>
- if (publishers[i] != 0) // non-empty slot
- 800c226: 687b ldr r3, [r7, #4]
- 800c228: 6a7a ldr r2, [r7, #36] ; 0x24
- 800c22a: f502 72b5 add.w r2, r2, #362 ; 0x16a
- 800c22e: f853 3022 ldr.w r3, [r3, r2, lsl #2]
- 800c232: 2b00 cmp r3, #0
- 800c234: d04f beq.n 800c2d6 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0xcc>
- ti.topic_id = publishers[i]->id_;
- 800c236: 687b ldr r3, [r7, #4]
- 800c238: 6a7a ldr r2, [r7, #36] ; 0x24
- 800c23a: f502 72b5 add.w r2, r2, #362 ; 0x16a
- 800c23e: f853 3022 ldr.w r3, [r3, r2, lsl #2]
- 800c242: 689b ldr r3, [r3, #8]
- 800c244: b29b uxth r3, r3
- 800c246: 823b strh r3, [r7, #16]
- ti.topic_name = (char *) publishers[i]->topic_;
- 800c248: 687b ldr r3, [r7, #4]
- 800c24a: 6a7a ldr r2, [r7, #36] ; 0x24
- 800c24c: f502 72b5 add.w r2, r2, #362 ; 0x16a
- 800c250: f853 3022 ldr.w r3, [r3, r2, lsl #2]
- 800c254: 681b ldr r3, [r3, #0]
- 800c256: 617b str r3, [r7, #20]
- ti.message_type = (char *) publishers[i]->msg_->getType();
- 800c258: 687b ldr r3, [r7, #4]
- 800c25a: 6a7a ldr r2, [r7, #36] ; 0x24
- 800c25c: f502 72b5 add.w r2, r2, #362 ; 0x16a
- 800c260: f853 3022 ldr.w r3, [r3, r2, lsl #2]
- 800c264: 6859 ldr r1, [r3, #4]
- 800c266: 687b ldr r3, [r7, #4]
- 800c268: 6a7a ldr r2, [r7, #36] ; 0x24
- 800c26a: f502 72b5 add.w r2, r2, #362 ; 0x16a
- 800c26e: f853 3022 ldr.w r3, [r3, r2, lsl #2]
- 800c272: 685b ldr r3, [r3, #4]
- 800c274: 681b ldr r3, [r3, #0]
- 800c276: 3308 adds r3, #8
- 800c278: 681b ldr r3, [r3, #0]
- 800c27a: 4608 mov r0, r1
- 800c27c: 4798 blx r3
- 800c27e: 4603 mov r3, r0
- 800c280: 61bb str r3, [r7, #24]
- ti.md5sum = (char *) publishers[i]->msg_->getMD5();
- 800c282: 687b ldr r3, [r7, #4]
- 800c284: 6a7a ldr r2, [r7, #36] ; 0x24
- 800c286: f502 72b5 add.w r2, r2, #362 ; 0x16a
- 800c28a: f853 3022 ldr.w r3, [r3, r2, lsl #2]
- 800c28e: 6859 ldr r1, [r3, #4]
- 800c290: 687b ldr r3, [r7, #4]
- 800c292: 6a7a ldr r2, [r7, #36] ; 0x24
- 800c294: f502 72b5 add.w r2, r2, #362 ; 0x16a
- 800c298: f853 3022 ldr.w r3, [r3, r2, lsl #2]
- 800c29c: 685b ldr r3, [r3, #4]
- 800c29e: 681b ldr r3, [r3, #0]
- 800c2a0: 330c adds r3, #12
- 800c2a2: 681b ldr r3, [r3, #0]
- 800c2a4: 4608 mov r0, r1
- 800c2a6: 4798 blx r3
- 800c2a8: 4603 mov r3, r0
- 800c2aa: 61fb str r3, [r7, #28]
- ti.buffer_size = OUTPUT_SIZE;
- 800c2ac: f44f 7300 mov.w r3, #512 ; 0x200
- 800c2b0: 623b str r3, [r7, #32]
- publish(publishers[i]->getEndpointType(), &ti);
- 800c2b2: 687b ldr r3, [r7, #4]
- 800c2b4: 681b ldr r3, [r3, #0]
- 800c2b6: 681c ldr r4, [r3, #0]
- 800c2b8: 687b ldr r3, [r7, #4]
- 800c2ba: 6a7a ldr r2, [r7, #36] ; 0x24
- 800c2bc: f502 72b5 add.w r2, r2, #362 ; 0x16a
- 800c2c0: f853 3022 ldr.w r3, [r3, r2, lsl #2]
- 800c2c4: 4618 mov r0, r3
- 800c2c6: f7ff f94e bl 800b566 <_ZN3ros9Publisher15getEndpointTypeEv>
- 800c2ca: 4601 mov r1, r0
- 800c2cc: f107 030c add.w r3, r7, #12
- 800c2d0: 461a mov r2, r3
- 800c2d2: 6878 ldr r0, [r7, #4]
- 800c2d4: 47a0 blx r4
- for (i = 0; i < MAX_PUBLISHERS; i++)
- 800c2d6: 6a7b ldr r3, [r7, #36] ; 0x24
- 800c2d8: 3301 adds r3, #1
- 800c2da: 627b str r3, [r7, #36] ; 0x24
- 800c2dc: e7a0 b.n 800c220 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x16>
- for (i = 0; i < MAX_SUBSCRIBERS; i++)
- 800c2de: 2300 movs r3, #0
- 800c2e0: 627b str r3, [r7, #36] ; 0x24
- 800c2e2: 6a7b ldr r3, [r7, #36] ; 0x24
- 800c2e4: 2b18 cmp r3, #24
- 800c2e6: dc68 bgt.n 800c3ba <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x1b0>
- if (subscribers[i] != 0) // non-empty slot
- 800c2e8: 687a ldr r2, [r7, #4]
- 800c2ea: 6a7b ldr r3, [r7, #36] ; 0x24
- 800c2ec: f503 73c1 add.w r3, r3, #386 ; 0x182
- 800c2f0: 009b lsls r3, r3, #2
- 800c2f2: 4413 add r3, r2
- 800c2f4: 685b ldr r3, [r3, #4]
- 800c2f6: 2b00 cmp r3, #0
- 800c2f8: d05b beq.n 800c3b2 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x1a8>
- ti.topic_id = subscribers[i]->id_;
- 800c2fa: 687a ldr r2, [r7, #4]
- 800c2fc: 6a7b ldr r3, [r7, #36] ; 0x24
- 800c2fe: f503 73c1 add.w r3, r3, #386 ; 0x182
- 800c302: 009b lsls r3, r3, #2
- 800c304: 4413 add r3, r2
- 800c306: 685b ldr r3, [r3, #4]
- 800c308: 685b ldr r3, [r3, #4]
- 800c30a: b29b uxth r3, r3
- 800c30c: 823b strh r3, [r7, #16]
- ti.topic_name = (char *) subscribers[i]->topic_;
- 800c30e: 687a ldr r2, [r7, #4]
- 800c310: 6a7b ldr r3, [r7, #36] ; 0x24
- 800c312: f503 73c1 add.w r3, r3, #386 ; 0x182
- 800c316: 009b lsls r3, r3, #2
- 800c318: 4413 add r3, r2
- 800c31a: 685b ldr r3, [r3, #4]
- 800c31c: 689b ldr r3, [r3, #8]
- 800c31e: 617b str r3, [r7, #20]
- ti.message_type = (char *) subscribers[i]->getMsgType();
- 800c320: 687a ldr r2, [r7, #4]
- 800c322: 6a7b ldr r3, [r7, #36] ; 0x24
- 800c324: f503 73c1 add.w r3, r3, #386 ; 0x182
- 800c328: 009b lsls r3, r3, #2
- 800c32a: 4413 add r3, r2
- 800c32c: 6859 ldr r1, [r3, #4]
- 800c32e: 687a ldr r2, [r7, #4]
- 800c330: 6a7b ldr r3, [r7, #36] ; 0x24
- 800c332: f503 73c1 add.w r3, r3, #386 ; 0x182
- 800c336: 009b lsls r3, r3, #2
- 800c338: 4413 add r3, r2
- 800c33a: 685b ldr r3, [r3, #4]
- 800c33c: 681b ldr r3, [r3, #0]
- 800c33e: 3308 adds r3, #8
- 800c340: 681b ldr r3, [r3, #0]
- 800c342: 4608 mov r0, r1
- 800c344: 4798 blx r3
- 800c346: 4603 mov r3, r0
- 800c348: 61bb str r3, [r7, #24]
- ti.md5sum = (char *) subscribers[i]->getMsgMD5();
- 800c34a: 687a ldr r2, [r7, #4]
- 800c34c: 6a7b ldr r3, [r7, #36] ; 0x24
- 800c34e: f503 73c1 add.w r3, r3, #386 ; 0x182
- 800c352: 009b lsls r3, r3, #2
- 800c354: 4413 add r3, r2
- 800c356: 6859 ldr r1, [r3, #4]
- 800c358: 687a ldr r2, [r7, #4]
- 800c35a: 6a7b ldr r3, [r7, #36] ; 0x24
- 800c35c: f503 73c1 add.w r3, r3, #386 ; 0x182
- 800c360: 009b lsls r3, r3, #2
- 800c362: 4413 add r3, r2
- 800c364: 685b ldr r3, [r3, #4]
- 800c366: 681b ldr r3, [r3, #0]
- 800c368: 330c adds r3, #12
- 800c36a: 681b ldr r3, [r3, #0]
- 800c36c: 4608 mov r0, r1
- 800c36e: 4798 blx r3
- 800c370: 4603 mov r3, r0
- 800c372: 61fb str r3, [r7, #28]
- ti.buffer_size = INPUT_SIZE;
- 800c374: f44f 7300 mov.w r3, #512 ; 0x200
- 800c378: 623b str r3, [r7, #32]
- publish(subscribers[i]->getEndpointType(), &ti);
- 800c37a: 687b ldr r3, [r7, #4]
- 800c37c: 681b ldr r3, [r3, #0]
- 800c37e: 681c ldr r4, [r3, #0]
- 800c380: 687a ldr r2, [r7, #4]
- 800c382: 6a7b ldr r3, [r7, #36] ; 0x24
- 800c384: f503 73c1 add.w r3, r3, #386 ; 0x182
- 800c388: 009b lsls r3, r3, #2
- 800c38a: 4413 add r3, r2
- 800c38c: 6859 ldr r1, [r3, #4]
- 800c38e: 687a ldr r2, [r7, #4]
- 800c390: 6a7b ldr r3, [r7, #36] ; 0x24
- 800c392: f503 73c1 add.w r3, r3, #386 ; 0x182
- 800c396: 009b lsls r3, r3, #2
- 800c398: 4413 add r3, r2
- 800c39a: 685b ldr r3, [r3, #4]
- 800c39c: 681b ldr r3, [r3, #0]
- 800c39e: 3304 adds r3, #4
- 800c3a0: 681b ldr r3, [r3, #0]
- 800c3a2: 4608 mov r0, r1
- 800c3a4: 4798 blx r3
- 800c3a6: 4601 mov r1, r0
- 800c3a8: f107 030c add.w r3, r7, #12
- 800c3ac: 461a mov r2, r3
- 800c3ae: 6878 ldr r0, [r7, #4]
- 800c3b0: 47a0 blx r4
- for (i = 0; i < MAX_SUBSCRIBERS; i++)
- 800c3b2: 6a7b ldr r3, [r7, #36] ; 0x24
- 800c3b4: 3301 adds r3, #1
- 800c3b6: 627b str r3, [r7, #36] ; 0x24
- 800c3b8: e793 b.n 800c2e2 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0xd8>
- configured_ = true;
- 800c3ba: 687b ldr r3, [r7, #4]
- 800c3bc: 2201 movs r2, #1
- 800c3be: f883 2684 strb.w r2, [r3, #1668] ; 0x684
- }
- 800c3c2: bf00 nop
- 800c3c4: 372c adds r7, #44 ; 0x2c
- 800c3c6: 46bd mov sp, r7
- 800c3c8: bd90 pop {r4, r7, pc}
- ...
-
-0800c3cc <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8syncTimeEPh>:
- void syncTime(uint8_t * data)
- 800c3cc: b580 push {r7, lr}
- 800c3ce: b086 sub sp, #24
- 800c3d0: af00 add r7, sp, #0
- 800c3d2: 6078 str r0, [r7, #4]
- 800c3d4: 6039 str r1, [r7, #0]
- std_msgs::Time t;
- 800c3d6: f107 0308 add.w r3, r7, #8
- 800c3da: 4618 mov r0, r3
- 800c3dc: f7fe fa86 bl 800a8ec <_ZN8std_msgs4TimeC1Ev>
- uint32_t offset = hardware_.time() - rt_time;
- 800c3e0: 687b ldr r3, [r7, #4]
- 800c3e2: 3304 adds r3, #4
- 800c3e4: 4618 mov r0, r3
- 800c3e6: f7ff f9ec bl 800b7c2 <_ZN13STM32Hardware4timeEv>
- 800c3ea: 4602 mov r2, r0
- 800c3ec: 687b ldr r3, [r7, #4]
- 800c3ee: f8d3 3198 ldr.w r3, [r3, #408] ; 0x198
- 800c3f2: 1ad3 subs r3, r2, r3
- 800c3f4: 617b str r3, [r7, #20]
- t.deserialize(data);
- 800c3f6: f107 0308 add.w r3, r7, #8
- 800c3fa: 6839 ldr r1, [r7, #0]
- 800c3fc: 4618 mov r0, r3
- 800c3fe: f7fe fae5 bl 800a9cc <_ZN8std_msgs4Time11deserializeEPh>
- t.data.sec += offset / 1000;
- 800c402: 68fa ldr r2, [r7, #12]
- 800c404: 697b ldr r3, [r7, #20]
- 800c406: 4915 ldr r1, [pc, #84] ; (800c45c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8syncTimeEPh+0x90>)
- 800c408: fba1 1303 umull r1, r3, r1, r3
- 800c40c: 099b lsrs r3, r3, #6
- 800c40e: 4413 add r3, r2
- 800c410: 60fb str r3, [r7, #12]
- t.data.nsec += (offset % 1000) * 1000000UL;
- 800c412: 6939 ldr r1, [r7, #16]
- 800c414: 697a ldr r2, [r7, #20]
- 800c416: 4b11 ldr r3, [pc, #68] ; (800c45c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8syncTimeEPh+0x90>)
- 800c418: fba3 0302 umull r0, r3, r3, r2
- 800c41c: 099b lsrs r3, r3, #6
- 800c41e: f44f 707a mov.w r0, #1000 ; 0x3e8
- 800c422: fb00 f303 mul.w r3, r0, r3
- 800c426: 1ad3 subs r3, r2, r3
- 800c428: 4a0d ldr r2, [pc, #52] ; (800c460 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8syncTimeEPh+0x94>)
- 800c42a: fb02 f303 mul.w r3, r2, r3
- 800c42e: 440b add r3, r1
- 800c430: 613b str r3, [r7, #16]
- this->setNow(t.data);
- 800c432: f107 0308 add.w r3, r7, #8
- 800c436: 3304 adds r3, #4
- 800c438: 4619 mov r1, r3
- 800c43a: 6878 ldr r0, [r7, #4]
- 800c43c: f000 f82e bl 800c49c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE6setNowERNS_4TimeE>
- last_sync_receive_time = hardware_.time();
- 800c440: 687b ldr r3, [r7, #4]
- 800c442: 3304 adds r3, #4
- 800c444: 4618 mov r0, r3
- 800c446: f7ff f9bc bl 800b7c2 <_ZN13STM32Hardware4timeEv>
- 800c44a: 4602 mov r2, r0
- 800c44c: 687b ldr r3, [r7, #4]
- 800c44e: f8c3 268c str.w r2, [r3, #1676] ; 0x68c
- }
- 800c452: bf00 nop
- 800c454: 3718 adds r7, #24
- 800c456: 46bd mov sp, r7
- 800c458: bd80 pop {r7, pc}
- 800c45a: bf00 nop
- 800c45c: 10624dd3 .word 0x10624dd3
- 800c460: 000f4240 .word 0x000f4240
-
-0800c464 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE3logEcPKc>:
- void log(char byte, const char * msg)
- 800c464: b580 push {r7, lr}
- 800c466: b088 sub sp, #32
- 800c468: af00 add r7, sp, #0
- 800c46a: 60f8 str r0, [r7, #12]
- 800c46c: 460b mov r3, r1
- 800c46e: 607a str r2, [r7, #4]
- 800c470: 72fb strb r3, [r7, #11]
- rosserial_msgs::Log l;
- 800c472: f107 0314 add.w r3, r7, #20
- 800c476: 4618 mov r0, r3
- 800c478: f7fe fcec bl 800ae54 <_ZN14rosserial_msgs3LogC1Ev>
- l.level = byte;
- 800c47c: 7afb ldrb r3, [r7, #11]
- 800c47e: 763b strb r3, [r7, #24]
- l.msg = (char*)msg;
- 800c480: 687b ldr r3, [r7, #4]
- 800c482: 61fb str r3, [r7, #28]
- publish(rosserial_msgs::TopicInfo::ID_LOG, &l);
- 800c484: 68fb ldr r3, [r7, #12]
- 800c486: 681b ldr r3, [r3, #0]
- 800c488: 681b ldr r3, [r3, #0]
- 800c48a: f107 0214 add.w r2, r7, #20
- 800c48e: 2107 movs r1, #7
- 800c490: 68f8 ldr r0, [r7, #12]
- 800c492: 4798 blx r3
- }
- 800c494: bf00 nop
- 800c496: 3720 adds r7, #32
- 800c498: 46bd mov sp, r7
- 800c49a: bd80 pop {r7, pc}
-
-0800c49c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE6setNowERNS_4TimeE>:
- void setNow(Time & new_now)
- 800c49c: b580 push {r7, lr}
- 800c49e: b084 sub sp, #16
- 800c4a0: af00 add r7, sp, #0
- 800c4a2: 6078 str r0, [r7, #4]
- 800c4a4: 6039 str r1, [r7, #0]
- uint32_t ms = hardware_.time();
- 800c4a6: 687b ldr r3, [r7, #4]
- 800c4a8: 3304 adds r3, #4
- 800c4aa: 4618 mov r0, r3
- 800c4ac: f7ff f989 bl 800b7c2 <_ZN13STM32Hardware4timeEv>
- 800c4b0: 60f8 str r0, [r7, #12]
- sec_offset = new_now.sec - ms / 1000 - 1;
- 800c4b2: 683b ldr r3, [r7, #0]
- 800c4b4: 681a ldr r2, [r3, #0]
- 800c4b6: 68fb ldr r3, [r7, #12]
- 800c4b8: 4915 ldr r1, [pc, #84] ; (800c510 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE6setNowERNS_4TimeE+0x74>)
- 800c4ba: fba1 1303 umull r1, r3, r1, r3
- 800c4be: 099b lsrs r3, r3, #6
- 800c4c0: 1ad3 subs r3, r2, r3
- 800c4c2: 1e5a subs r2, r3, #1
- 800c4c4: 687b ldr r3, [r7, #4]
- 800c4c6: f8c3 219c str.w r2, [r3, #412] ; 0x19c
- nsec_offset = new_now.nsec - (ms % 1000) * 1000000UL + 1000000000UL;
- 800c4ca: 683b ldr r3, [r7, #0]
- 800c4cc: 6859 ldr r1, [r3, #4]
- 800c4ce: 68fa ldr r2, [r7, #12]
- 800c4d0: 4b0f ldr r3, [pc, #60] ; (800c510 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE6setNowERNS_4TimeE+0x74>)
- 800c4d2: fba3 0302 umull r0, r3, r3, r2
- 800c4d6: 099b lsrs r3, r3, #6
- 800c4d8: f44f 707a mov.w r0, #1000 ; 0x3e8
- 800c4dc: fb00 f303 mul.w r3, r0, r3
- 800c4e0: 1ad3 subs r3, r2, r3
- 800c4e2: 4a0c ldr r2, [pc, #48] ; (800c514 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE6setNowERNS_4TimeE+0x78>)
- 800c4e4: fb02 f303 mul.w r3, r2, r3
- 800c4e8: 1aca subs r2, r1, r3
- 800c4ea: 4b0b ldr r3, [pc, #44] ; (800c518 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE6setNowERNS_4TimeE+0x7c>)
- 800c4ec: 4413 add r3, r2
- 800c4ee: 687a ldr r2, [r7, #4]
- 800c4f0: f8c2 31a0 str.w r3, [r2, #416] ; 0x1a0
- normalizeSecNSec(sec_offset, nsec_offset);
- 800c4f4: 687b ldr r3, [r7, #4]
- 800c4f6: f503 72ce add.w r2, r3, #412 ; 0x19c
- 800c4fa: 687b ldr r3, [r7, #4]
- 800c4fc: f503 73d0 add.w r3, r3, #416 ; 0x1a0
- 800c500: 4619 mov r1, r3
- 800c502: 4610 mov r0, r2
- 800c504: f000 f80a bl 800c51c <_ZN3ros16normalizeSecNSecERmS0_>
- }
- 800c508: bf00 nop
- 800c50a: 3710 adds r7, #16
- 800c50c: 46bd mov sp, r7
- 800c50e: bd80 pop {r7, pc}
- 800c510: 10624dd3 .word 0x10624dd3
- 800c514: 000f4240 .word 0x000f4240
- 800c518: 3b9aca00 .word 0x3b9aca00
-
-0800c51c <_ZN3ros16normalizeSecNSecERmS0_>:
-#include "ros/ros_time.h"
-
-namespace ros
-{
-void normalizeSecNSec(uint32_t& sec, uint32_t& nsec)
-{
- 800c51c: b480 push {r7}
- 800c51e: b085 sub sp, #20
- 800c520: af00 add r7, sp, #0
- 800c522: 6078 str r0, [r7, #4]
- 800c524: 6039 str r1, [r7, #0]
- uint32_t nsec_part = nsec % 1000000000UL;
- 800c526: 683b ldr r3, [r7, #0]
- 800c528: 681b ldr r3, [r3, #0]
- 800c52a: 0a5a lsrs r2, r3, #9
- 800c52c: 490f ldr r1, [pc, #60] ; (800c56c <_ZN3ros16normalizeSecNSecERmS0_+0x50>)
- 800c52e: fba1 1202 umull r1, r2, r1, r2
- 800c532: 09d2 lsrs r2, r2, #7
- 800c534: 490e ldr r1, [pc, #56] ; (800c570 <_ZN3ros16normalizeSecNSecERmS0_+0x54>)
- 800c536: fb01 f202 mul.w r2, r1, r2
- 800c53a: 1a9b subs r3, r3, r2
- 800c53c: 60fb str r3, [r7, #12]
- uint32_t sec_part = nsec / 1000000000UL;
- 800c53e: 683b ldr r3, [r7, #0]
- 800c540: 681b ldr r3, [r3, #0]
- 800c542: 0a5b lsrs r3, r3, #9
- 800c544: 4a09 ldr r2, [pc, #36] ; (800c56c <_ZN3ros16normalizeSecNSecERmS0_+0x50>)
- 800c546: fba2 2303 umull r2, r3, r2, r3
- 800c54a: 09db lsrs r3, r3, #7
- 800c54c: 60bb str r3, [r7, #8]
- sec += sec_part;
- 800c54e: 687b ldr r3, [r7, #4]
- 800c550: 681a ldr r2, [r3, #0]
- 800c552: 68bb ldr r3, [r7, #8]
- 800c554: 441a add r2, r3
- 800c556: 687b ldr r3, [r7, #4]
- 800c558: 601a str r2, [r3, #0]
- nsec = nsec_part;
- 800c55a: 683b ldr r3, [r7, #0]
- 800c55c: 68fa ldr r2, [r7, #12]
- 800c55e: 601a str r2, [r3, #0]
-}
- 800c560: bf00 nop
- 800c562: 3714 adds r7, #20
- 800c564: 46bd mov sp, r7
- 800c566: f85d 7b04 ldr.w r7, [sp], #4
- 800c56a: 4770 bx lr
- 800c56c: 00044b83 .word 0x00044b83
- 800c570: 3b9aca00 .word 0x3b9aca00
-
-0800c574 <HAL_MspInit>:
-/* USER CODE END 0 */
-/**
- * Initializes the Global MSP.
- */
-void HAL_MspInit(void)
-{
- 800c574: b480 push {r7}
- 800c576: b083 sub sp, #12
- 800c578: af00 add r7, sp, #0
- /* USER CODE BEGIN MspInit 0 */
-
- /* USER CODE END MspInit 0 */
-
- __HAL_RCC_PWR_CLK_ENABLE();
- 800c57a: 4b0f ldr r3, [pc, #60] ; (800c5b8 <HAL_MspInit+0x44>)
- 800c57c: 6c1b ldr r3, [r3, #64] ; 0x40
- 800c57e: 4a0e ldr r2, [pc, #56] ; (800c5b8 <HAL_MspInit+0x44>)
- 800c580: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
- 800c584: 6413 str r3, [r2, #64] ; 0x40
- 800c586: 4b0c ldr r3, [pc, #48] ; (800c5b8 <HAL_MspInit+0x44>)
- 800c588: 6c1b ldr r3, [r3, #64] ; 0x40
- 800c58a: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
- 800c58e: 607b str r3, [r7, #4]
- 800c590: 687b ldr r3, [r7, #4]
- __HAL_RCC_SYSCFG_CLK_ENABLE();
- 800c592: 4b09 ldr r3, [pc, #36] ; (800c5b8 <HAL_MspInit+0x44>)
- 800c594: 6c5b ldr r3, [r3, #68] ; 0x44
- 800c596: 4a08 ldr r2, [pc, #32] ; (800c5b8 <HAL_MspInit+0x44>)
- 800c598: f443 4380 orr.w r3, r3, #16384 ; 0x4000
- 800c59c: 6453 str r3, [r2, #68] ; 0x44
- 800c59e: 4b06 ldr r3, [pc, #24] ; (800c5b8 <HAL_MspInit+0x44>)
- 800c5a0: 6c5b ldr r3, [r3, #68] ; 0x44
- 800c5a2: f403 4380 and.w r3, r3, #16384 ; 0x4000
- 800c5a6: 603b str r3, [r7, #0]
- 800c5a8: 683b ldr r3, [r7, #0]
- /* System interrupt init*/
-
- /* USER CODE BEGIN MspInit 1 */
-
- /* USER CODE END MspInit 1 */
-}
- 800c5aa: bf00 nop
- 800c5ac: 370c adds r7, #12
- 800c5ae: 46bd mov sp, r7
- 800c5b0: f85d 7b04 ldr.w r7, [sp], #4
- 800c5b4: 4770 bx lr
- 800c5b6: bf00 nop
- 800c5b8: 40023800 .word 0x40023800
-
-0800c5bc <HAL_TIM_OnePulse_MspInit>:
-* This function configures the hardware resources used in this example
-* @param htim_onepulse: TIM_OnePulse handle pointer
-* @retval None
-*/
-void HAL_TIM_OnePulse_MspInit(TIM_HandleTypeDef* htim_onepulse)
-{
- 800c5bc: b480 push {r7}
- 800c5be: b085 sub sp, #20
- 800c5c0: af00 add r7, sp, #0
- 800c5c2: 6078 str r0, [r7, #4]
- if(htim_onepulse->Instance==TIM2)
- 800c5c4: 687b ldr r3, [r7, #4]
- 800c5c6: 681b ldr r3, [r3, #0]
- 800c5c8: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000
- 800c5cc: d10b bne.n 800c5e6 <HAL_TIM_OnePulse_MspInit+0x2a>
- {
- /* USER CODE BEGIN TIM2_MspInit 0 */
-
- /* USER CODE END TIM2_MspInit 0 */
- /* Peripheral clock enable */
- __HAL_RCC_TIM2_CLK_ENABLE();
- 800c5ce: 4b09 ldr r3, [pc, #36] ; (800c5f4 <HAL_TIM_OnePulse_MspInit+0x38>)
- 800c5d0: 6c1b ldr r3, [r3, #64] ; 0x40
- 800c5d2: 4a08 ldr r2, [pc, #32] ; (800c5f4 <HAL_TIM_OnePulse_MspInit+0x38>)
- 800c5d4: f043 0301 orr.w r3, r3, #1
- 800c5d8: 6413 str r3, [r2, #64] ; 0x40
- 800c5da: 4b06 ldr r3, [pc, #24] ; (800c5f4 <HAL_TIM_OnePulse_MspInit+0x38>)
- 800c5dc: 6c1b ldr r3, [r3, #64] ; 0x40
- 800c5de: f003 0301 and.w r3, r3, #1
- 800c5e2: 60fb str r3, [r7, #12]
- 800c5e4: 68fb ldr r3, [r7, #12]
- /* USER CODE BEGIN TIM2_MspInit 1 */
-
- /* USER CODE END TIM2_MspInit 1 */
- }
-
-}
- 800c5e6: bf00 nop
- 800c5e8: 3714 adds r7, #20
- 800c5ea: 46bd mov sp, r7
- 800c5ec: f85d 7b04 ldr.w r7, [sp], #4
- 800c5f0: 4770 bx lr
- 800c5f2: bf00 nop
- 800c5f4: 40023800 .word 0x40023800
-
-0800c5f8 <HAL_UART_MspInit>:
-* This function configures the hardware resources used in this example
-* @param huart: UART handle pointer
-* @retval None
-*/
-void HAL_UART_MspInit(UART_HandleTypeDef* huart)
-{
- 800c5f8: b580 push {r7, lr}
- 800c5fa: b08a sub sp, #40 ; 0x28
- 800c5fc: af00 add r7, sp, #0
- 800c5fe: 6078 str r0, [r7, #4]
- GPIO_InitTypeDef GPIO_InitStruct = {0};
- 800c600: f107 0314 add.w r3, r7, #20
- 800c604: 2200 movs r2, #0
- 800c606: 601a str r2, [r3, #0]
- 800c608: 605a str r2, [r3, #4]
- 800c60a: 609a str r2, [r3, #8]
- 800c60c: 60da str r2, [r3, #12]
- 800c60e: 611a str r2, [r3, #16]
- if(huart->Instance==USART3)
- 800c610: 687b ldr r3, [r7, #4]
- 800c612: 681b ldr r3, [r3, #0]
- 800c614: 4a17 ldr r2, [pc, #92] ; (800c674 <HAL_UART_MspInit+0x7c>)
- 800c616: 4293 cmp r3, r2
- 800c618: d128 bne.n 800c66c <HAL_UART_MspInit+0x74>
- {
- /* USER CODE BEGIN USART3_MspInit 0 */
-
- /* USER CODE END USART3_MspInit 0 */
- /* Peripheral clock enable */
- __HAL_RCC_USART3_CLK_ENABLE();
- 800c61a: 4b17 ldr r3, [pc, #92] ; (800c678 <HAL_UART_MspInit+0x80>)
- 800c61c: 6c1b ldr r3, [r3, #64] ; 0x40
- 800c61e: 4a16 ldr r2, [pc, #88] ; (800c678 <HAL_UART_MspInit+0x80>)
- 800c620: f443 2380 orr.w r3, r3, #262144 ; 0x40000
- 800c624: 6413 str r3, [r2, #64] ; 0x40
- 800c626: 4b14 ldr r3, [pc, #80] ; (800c678 <HAL_UART_MspInit+0x80>)
- 800c628: 6c1b ldr r3, [r3, #64] ; 0x40
- 800c62a: f403 2380 and.w r3, r3, #262144 ; 0x40000
- 800c62e: 613b str r3, [r7, #16]
- 800c630: 693b ldr r3, [r7, #16]
-
- __HAL_RCC_GPIOD_CLK_ENABLE();
- 800c632: 4b11 ldr r3, [pc, #68] ; (800c678 <HAL_UART_MspInit+0x80>)
- 800c634: 6b1b ldr r3, [r3, #48] ; 0x30
- 800c636: 4a10 ldr r2, [pc, #64] ; (800c678 <HAL_UART_MspInit+0x80>)
- 800c638: f043 0308 orr.w r3, r3, #8
- 800c63c: 6313 str r3, [r2, #48] ; 0x30
- 800c63e: 4b0e ldr r3, [pc, #56] ; (800c678 <HAL_UART_MspInit+0x80>)
- 800c640: 6b1b ldr r3, [r3, #48] ; 0x30
- 800c642: f003 0308 and.w r3, r3, #8
- 800c646: 60fb str r3, [r7, #12]
- 800c648: 68fb ldr r3, [r7, #12]
- /**USART3 GPIO Configuration
- PD8 ------> USART3_TX
- PD9 ------> USART3_RX
- */
- GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9;
- 800c64a: f44f 7340 mov.w r3, #768 ; 0x300
- 800c64e: 617b str r3, [r7, #20]
- GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 800c650: 2302 movs r3, #2
- 800c652: 61bb str r3, [r7, #24]
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- 800c654: 2300 movs r3, #0
- 800c656: 61fb str r3, [r7, #28]
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- 800c658: 2303 movs r3, #3
- 800c65a: 623b str r3, [r7, #32]
- GPIO_InitStruct.Alternate = GPIO_AF7_USART3;
- 800c65c: 2307 movs r3, #7
- 800c65e: 627b str r3, [r7, #36] ; 0x24
- HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
- 800c660: f107 0314 add.w r3, r7, #20
- 800c664: 4619 mov r1, r3
- 800c666: 4805 ldr r0, [pc, #20] ; (800c67c <HAL_UART_MspInit+0x84>)
- 800c668: f7fb feb6 bl 80083d8 <HAL_GPIO_Init>
- /* USER CODE BEGIN USART3_MspInit 1 */
-
- /* USER CODE END USART3_MspInit 1 */
- }
-
-}
- 800c66c: bf00 nop
- 800c66e: 3728 adds r7, #40 ; 0x28
- 800c670: 46bd mov sp, r7
- 800c672: bd80 pop {r7, pc}
- 800c674: 40004800 .word 0x40004800
- 800c678: 40023800 .word 0x40023800
- 800c67c: 40020c00 .word 0x40020c00
-
-0800c680 <NMI_Handler>:
-/******************************************************************************/
-/**
- * @brief This function handles Non maskable interrupt.
- */
-void NMI_Handler(void)
-{
- 800c680: b480 push {r7}
- 800c682: af00 add r7, sp, #0
-
- /* USER CODE END NonMaskableInt_IRQn 0 */
- /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
-
- /* USER CODE END NonMaskableInt_IRQn 1 */
-}
- 800c684: bf00 nop
- 800c686: 46bd mov sp, r7
- 800c688: f85d 7b04 ldr.w r7, [sp], #4
- 800c68c: 4770 bx lr
-
-0800c68e <HardFault_Handler>:
-
-/**
- * @brief This function handles Hard fault interrupt.
- */
-void HardFault_Handler(void)
-{
- 800c68e: b480 push {r7}
- 800c690: af00 add r7, sp, #0
- /* USER CODE BEGIN HardFault_IRQn 0 */
-
- /* USER CODE END HardFault_IRQn 0 */
- while (1)
- 800c692: e7fe b.n 800c692 <HardFault_Handler+0x4>
-
-0800c694 <MemManage_Handler>:
-
-/**
- * @brief This function handles Memory management fault.
- */
-void MemManage_Handler(void)
-{
- 800c694: b480 push {r7}
- 800c696: af00 add r7, sp, #0
- /* USER CODE BEGIN MemoryManagement_IRQn 0 */
-
- /* USER CODE END MemoryManagement_IRQn 0 */
- while (1)
- 800c698: e7fe b.n 800c698 <MemManage_Handler+0x4>
-
-0800c69a <BusFault_Handler>:
-
-/**
- * @brief This function handles Pre-fetch fault, memory access fault.
- */
-void BusFault_Handler(void)
-{
- 800c69a: b480 push {r7}
- 800c69c: af00 add r7, sp, #0
- /* USER CODE BEGIN BusFault_IRQn 0 */
-
- /* USER CODE END BusFault_IRQn 0 */
- while (1)
- 800c69e: e7fe b.n 800c69e <BusFault_Handler+0x4>
-
-0800c6a0 <UsageFault_Handler>:
-
-/**
- * @brief This function handles Undefined instruction or illegal state.
- */
-void UsageFault_Handler(void)
-{
- 800c6a0: b480 push {r7}
- 800c6a2: af00 add r7, sp, #0
- /* USER CODE BEGIN UsageFault_IRQn 0 */
-
- /* USER CODE END UsageFault_IRQn 0 */
- while (1)
- 800c6a4: e7fe b.n 800c6a4 <UsageFault_Handler+0x4>
-
-0800c6a6 <SVC_Handler>:
-
-/**
- * @brief This function handles System service call via SWI instruction.
- */
-void SVC_Handler(void)
-{
- 800c6a6: b480 push {r7}
- 800c6a8: af00 add r7, sp, #0
-
- /* USER CODE END SVCall_IRQn 0 */
- /* USER CODE BEGIN SVCall_IRQn 1 */
-
- /* USER CODE END SVCall_IRQn 1 */
-}
- 800c6aa: bf00 nop
- 800c6ac: 46bd mov sp, r7
- 800c6ae: f85d 7b04 ldr.w r7, [sp], #4
- 800c6b2: 4770 bx lr
-
-0800c6b4 <DebugMon_Handler>:
-
-/**
- * @brief This function handles Debug monitor.
- */
-void DebugMon_Handler(void)
-{
- 800c6b4: b480 push {r7}
- 800c6b6: af00 add r7, sp, #0
-
- /* USER CODE END DebugMonitor_IRQn 0 */
- /* USER CODE BEGIN DebugMonitor_IRQn 1 */
-
- /* USER CODE END DebugMonitor_IRQn 1 */
-}
- 800c6b8: bf00 nop
- 800c6ba: 46bd mov sp, r7
- 800c6bc: f85d 7b04 ldr.w r7, [sp], #4
- 800c6c0: 4770 bx lr
-
-0800c6c2 <PendSV_Handler>:
-
-/**
- * @brief This function handles Pendable request for system service.
- */
-void PendSV_Handler(void)
-{
- 800c6c2: b480 push {r7}
- 800c6c4: af00 add r7, sp, #0
-
- /* USER CODE END PendSV_IRQn 0 */
- /* USER CODE BEGIN PendSV_IRQn 1 */
-
- /* USER CODE END PendSV_IRQn 1 */
-}
- 800c6c6: bf00 nop
- 800c6c8: 46bd mov sp, r7
- 800c6ca: f85d 7b04 ldr.w r7, [sp], #4
- 800c6ce: 4770 bx lr
-
-0800c6d0 <SysTick_Handler>:
-
-/**
- * @brief This function handles System tick timer.
- */
-void SysTick_Handler(void)
-{
- 800c6d0: b580 push {r7, lr}
- 800c6d2: af00 add r7, sp, #0
- /* USER CODE BEGIN SysTick_IRQn 0 */
-
- /* USER CODE END SysTick_IRQn 0 */
- HAL_IncTick();
- 800c6d4: f7fb fcca bl 800806c <HAL_IncTick>
- /* USER CODE BEGIN SysTick_IRQn 1 */
-
- /* USER CODE END SysTick_IRQn 1 */
-}
- 800c6d8: bf00 nop
- 800c6da: bd80 pop {r7, pc}
-
-0800c6dc <_getpid>:
-void initialise_monitor_handles()
-{
-}
-
-int _getpid(void)
-{
- 800c6dc: b480 push {r7}
- 800c6de: af00 add r7, sp, #0
- return 1;
- 800c6e0: 2301 movs r3, #1
-}
- 800c6e2: 4618 mov r0, r3
- 800c6e4: 46bd mov sp, r7
- 800c6e6: f85d 7b04 ldr.w r7, [sp], #4
- 800c6ea: 4770 bx lr
-
-0800c6ec <_kill>:
-
-int _kill(int pid, int sig)
-{
- 800c6ec: b580 push {r7, lr}
- 800c6ee: b082 sub sp, #8
- 800c6f0: af00 add r7, sp, #0
- 800c6f2: 6078 str r0, [r7, #4]
- 800c6f4: 6039 str r1, [r7, #0]
- errno = EINVAL;
- 800c6f6: f001 f9a7 bl 800da48 <__errno>
- 800c6fa: 4602 mov r2, r0
- 800c6fc: 2316 movs r3, #22
- 800c6fe: 6013 str r3, [r2, #0]
- return -1;
- 800c700: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff
-}
- 800c704: 4618 mov r0, r3
- 800c706: 3708 adds r7, #8
- 800c708: 46bd mov sp, r7
- 800c70a: bd80 pop {r7, pc}
-
-0800c70c <_exit>:
-
-void _exit (int status)
-{
- 800c70c: b580 push {r7, lr}
- 800c70e: b082 sub sp, #8
- 800c710: af00 add r7, sp, #0
- 800c712: 6078 str r0, [r7, #4]
- _kill(status, -1);
- 800c714: f04f 31ff mov.w r1, #4294967295 ; 0xffffffff
- 800c718: 6878 ldr r0, [r7, #4]
- 800c71a: f7ff ffe7 bl 800c6ec <_kill>
- while (1) {} /* Make sure we hang here */
- 800c71e: e7fe b.n 800c71e <_exit+0x12>
-
-0800c720 <_read>:
-}
-
-__attribute__((weak)) int _read(int file, char *ptr, int len)
-{
- 800c720: b580 push {r7, lr}
- 800c722: b086 sub sp, #24
- 800c724: af00 add r7, sp, #0
- 800c726: 60f8 str r0, [r7, #12]
- 800c728: 60b9 str r1, [r7, #8]
- 800c72a: 607a str r2, [r7, #4]
- int DataIdx;
-
- for (DataIdx = 0; DataIdx < len; DataIdx++)
- 800c72c: 2300 movs r3, #0
- 800c72e: 617b str r3, [r7, #20]
- 800c730: e00a b.n 800c748 <_read+0x28>
- {
- *ptr++ = __io_getchar();
- 800c732: f3af 8000 nop.w
- 800c736: 4601 mov r1, r0
- 800c738: 68bb ldr r3, [r7, #8]
- 800c73a: 1c5a adds r2, r3, #1
- 800c73c: 60ba str r2, [r7, #8]
- 800c73e: b2ca uxtb r2, r1
- 800c740: 701a strb r2, [r3, #0]
- for (DataIdx = 0; DataIdx < len; DataIdx++)
- 800c742: 697b ldr r3, [r7, #20]
- 800c744: 3301 adds r3, #1
- 800c746: 617b str r3, [r7, #20]
- 800c748: 697a ldr r2, [r7, #20]
- 800c74a: 687b ldr r3, [r7, #4]
- 800c74c: 429a cmp r2, r3
- 800c74e: dbf0 blt.n 800c732 <_read+0x12>
- }
-
-return len;
- 800c750: 687b ldr r3, [r7, #4]
-}
- 800c752: 4618 mov r0, r3
- 800c754: 3718 adds r7, #24
- 800c756: 46bd mov sp, r7
- 800c758: bd80 pop {r7, pc}
-
-0800c75a <_write>:
-
-__attribute__((weak)) int _write(int file, char *ptr, int len)
-{
- 800c75a: b580 push {r7, lr}
- 800c75c: b086 sub sp, #24
- 800c75e: af00 add r7, sp, #0
- 800c760: 60f8 str r0, [r7, #12]
- 800c762: 60b9 str r1, [r7, #8]
- 800c764: 607a str r2, [r7, #4]
- int DataIdx;
-
- for (DataIdx = 0; DataIdx < len; DataIdx++)
- 800c766: 2300 movs r3, #0
- 800c768: 617b str r3, [r7, #20]
- 800c76a: e009 b.n 800c780 <_write+0x26>
- {
- __io_putchar(*ptr++);
- 800c76c: 68bb ldr r3, [r7, #8]
- 800c76e: 1c5a adds r2, r3, #1
- 800c770: 60ba str r2, [r7, #8]
- 800c772: 781b ldrb r3, [r3, #0]
- 800c774: 4618 mov r0, r3
- 800c776: f3af 8000 nop.w
- for (DataIdx = 0; DataIdx < len; DataIdx++)
- 800c77a: 697b ldr r3, [r7, #20]
- 800c77c: 3301 adds r3, #1
- 800c77e: 617b str r3, [r7, #20]
- 800c780: 697a ldr r2, [r7, #20]
- 800c782: 687b ldr r3, [r7, #4]
- 800c784: 429a cmp r2, r3
- 800c786: dbf1 blt.n 800c76c <_write+0x12>
- }
- return len;
- 800c788: 687b ldr r3, [r7, #4]
-}
- 800c78a: 4618 mov r0, r3
- 800c78c: 3718 adds r7, #24
- 800c78e: 46bd mov sp, r7
- 800c790: bd80 pop {r7, pc}
-
-0800c792 <_close>:
-
-int _close(int file)
-{
- 800c792: b480 push {r7}
- 800c794: b083 sub sp, #12
- 800c796: af00 add r7, sp, #0
- 800c798: 6078 str r0, [r7, #4]
- return -1;
- 800c79a: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff
-}
- 800c79e: 4618 mov r0, r3
- 800c7a0: 370c adds r7, #12
- 800c7a2: 46bd mov sp, r7
- 800c7a4: f85d 7b04 ldr.w r7, [sp], #4
- 800c7a8: 4770 bx lr
-
-0800c7aa <_fstat>:
-
-
-int _fstat(int file, struct stat *st)
-{
- 800c7aa: b480 push {r7}
- 800c7ac: b083 sub sp, #12
- 800c7ae: af00 add r7, sp, #0
- 800c7b0: 6078 str r0, [r7, #4]
- 800c7b2: 6039 str r1, [r7, #0]
- st->st_mode = S_IFCHR;
- 800c7b4: 683b ldr r3, [r7, #0]
- 800c7b6: f44f 5200 mov.w r2, #8192 ; 0x2000
- 800c7ba: 605a str r2, [r3, #4]
- return 0;
- 800c7bc: 2300 movs r3, #0
-}
- 800c7be: 4618 mov r0, r3
- 800c7c0: 370c adds r7, #12
- 800c7c2: 46bd mov sp, r7
- 800c7c4: f85d 7b04 ldr.w r7, [sp], #4
- 800c7c8: 4770 bx lr
-
-0800c7ca <_isatty>:
-
-int _isatty(int file)
-{
- 800c7ca: b480 push {r7}
- 800c7cc: b083 sub sp, #12
- 800c7ce: af00 add r7, sp, #0
- 800c7d0: 6078 str r0, [r7, #4]
- return 1;
- 800c7d2: 2301 movs r3, #1
-}
- 800c7d4: 4618 mov r0, r3
- 800c7d6: 370c adds r7, #12
- 800c7d8: 46bd mov sp, r7
- 800c7da: f85d 7b04 ldr.w r7, [sp], #4
- 800c7de: 4770 bx lr
-
-0800c7e0 <_lseek>:
-
-int _lseek(int file, int ptr, int dir)
-{
- 800c7e0: b480 push {r7}
- 800c7e2: b085 sub sp, #20
- 800c7e4: af00 add r7, sp, #0
- 800c7e6: 60f8 str r0, [r7, #12]
- 800c7e8: 60b9 str r1, [r7, #8]
- 800c7ea: 607a str r2, [r7, #4]
- return 0;
- 800c7ec: 2300 movs r3, #0
-}
- 800c7ee: 4618 mov r0, r3
- 800c7f0: 3714 adds r7, #20
- 800c7f2: 46bd mov sp, r7
- 800c7f4: f85d 7b04 ldr.w r7, [sp], #4
- 800c7f8: 4770 bx lr
- ...
-
-0800c7fc <_sbrk>:
-/**
- _sbrk
- Increase program data space. Malloc and related functions depend on this
-**/
-caddr_t _sbrk(int incr)
-{
- 800c7fc: b580 push {r7, lr}
- 800c7fe: b084 sub sp, #16
- 800c800: af00 add r7, sp, #0
- 800c802: 6078 str r0, [r7, #4]
- extern char end asm("end");
- static char *heap_end;
- char *prev_heap_end;
-
- if (heap_end == 0)
- 800c804: 4b11 ldr r3, [pc, #68] ; (800c84c <_sbrk+0x50>)
- 800c806: 681b ldr r3, [r3, #0]
- 800c808: 2b00 cmp r3, #0
- 800c80a: d102 bne.n 800c812 <_sbrk+0x16>
- heap_end = &end;
- 800c80c: 4b0f ldr r3, [pc, #60] ; (800c84c <_sbrk+0x50>)
- 800c80e: 4a10 ldr r2, [pc, #64] ; (800c850 <_sbrk+0x54>)
- 800c810: 601a str r2, [r3, #0]
-
- prev_heap_end = heap_end;
- 800c812: 4b0e ldr r3, [pc, #56] ; (800c84c <_sbrk+0x50>)
- 800c814: 681b ldr r3, [r3, #0]
- 800c816: 60fb str r3, [r7, #12]
- if (heap_end + incr > stack_ptr)
- 800c818: 4b0c ldr r3, [pc, #48] ; (800c84c <_sbrk+0x50>)
- 800c81a: 681a ldr r2, [r3, #0]
- 800c81c: 687b ldr r3, [r7, #4]
- 800c81e: 4413 add r3, r2
- 800c820: 466a mov r2, sp
- 800c822: 4293 cmp r3, r2
- 800c824: d907 bls.n 800c836 <_sbrk+0x3a>
- {
- errno = ENOMEM;
- 800c826: f001 f90f bl 800da48 <__errno>
- 800c82a: 4602 mov r2, r0
- 800c82c: 230c movs r3, #12
- 800c82e: 6013 str r3, [r2, #0]
- return (caddr_t) -1;
- 800c830: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff
- 800c834: e006 b.n 800c844 <_sbrk+0x48>
- }
-
- heap_end += incr;
- 800c836: 4b05 ldr r3, [pc, #20] ; (800c84c <_sbrk+0x50>)
- 800c838: 681a ldr r2, [r3, #0]
- 800c83a: 687b ldr r3, [r7, #4]
- 800c83c: 4413 add r3, r2
- 800c83e: 4a03 ldr r2, [pc, #12] ; (800c84c <_sbrk+0x50>)
- 800c840: 6013 str r3, [r2, #0]
-
- return (caddr_t) prev_heap_end;
- 800c842: 68fb ldr r3, [r7, #12]
-}
- 800c844: 4618 mov r0, r3
- 800c846: 3710 adds r7, #16
- 800c848: 46bd mov sp, r7
- 800c84a: bd80 pop {r7, pc}
- 800c84c: 20000aa0 .word 0x20000aa0
- 800c850: 20000b10 .word 0x20000b10
-
-0800c854 <SystemInit>:
- * SystemFrequency variable.
- * @param None
- * @retval None
- */
-void SystemInit(void)
-{
- 800c854: b480 push {r7}
- 800c856: af00 add r7, sp, #0
- /* FPU settings ------------------------------------------------------------*/
- #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
- SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
- 800c858: 4b15 ldr r3, [pc, #84] ; (800c8b0 <SystemInit+0x5c>)
- 800c85a: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88
- 800c85e: 4a14 ldr r2, [pc, #80] ; (800c8b0 <SystemInit+0x5c>)
- 800c860: f443 0370 orr.w r3, r3, #15728640 ; 0xf00000
- 800c864: f8c2 3088 str.w r3, [r2, #136] ; 0x88
- #endif
- /* Reset the RCC clock configuration to the default reset state ------------*/
- /* Set HSION bit */
- RCC->CR |= (uint32_t)0x00000001;
- 800c868: 4b12 ldr r3, [pc, #72] ; (800c8b4 <SystemInit+0x60>)
- 800c86a: 681b ldr r3, [r3, #0]
- 800c86c: 4a11 ldr r2, [pc, #68] ; (800c8b4 <SystemInit+0x60>)
- 800c86e: f043 0301 orr.w r3, r3, #1
- 800c872: 6013 str r3, [r2, #0]
-
- /* Reset CFGR register */
- RCC->CFGR = 0x00000000;
- 800c874: 4b0f ldr r3, [pc, #60] ; (800c8b4 <SystemInit+0x60>)
- 800c876: 2200 movs r2, #0
- 800c878: 609a str r2, [r3, #8]
-
- /* Reset HSEON, CSSON and PLLON bits */
- RCC->CR &= (uint32_t)0xFEF6FFFF;
- 800c87a: 4b0e ldr r3, [pc, #56] ; (800c8b4 <SystemInit+0x60>)
- 800c87c: 681a ldr r2, [r3, #0]
- 800c87e: 490d ldr r1, [pc, #52] ; (800c8b4 <SystemInit+0x60>)
- 800c880: 4b0d ldr r3, [pc, #52] ; (800c8b8 <SystemInit+0x64>)
- 800c882: 4013 ands r3, r2
- 800c884: 600b str r3, [r1, #0]
-
- /* Reset PLLCFGR register */
- RCC->PLLCFGR = 0x24003010;
- 800c886: 4b0b ldr r3, [pc, #44] ; (800c8b4 <SystemInit+0x60>)
- 800c888: 4a0c ldr r2, [pc, #48] ; (800c8bc <SystemInit+0x68>)
- 800c88a: 605a str r2, [r3, #4]
-
- /* Reset HSEBYP bit */
- RCC->CR &= (uint32_t)0xFFFBFFFF;
- 800c88c: 4b09 ldr r3, [pc, #36] ; (800c8b4 <SystemInit+0x60>)
- 800c88e: 681b ldr r3, [r3, #0]
- 800c890: 4a08 ldr r2, [pc, #32] ; (800c8b4 <SystemInit+0x60>)
- 800c892: f423 2380 bic.w r3, r3, #262144 ; 0x40000
- 800c896: 6013 str r3, [r2, #0]
-
- /* Disable all interrupts */
- RCC->CIR = 0x00000000;
- 800c898: 4b06 ldr r3, [pc, #24] ; (800c8b4 <SystemInit+0x60>)
- 800c89a: 2200 movs r2, #0
- 800c89c: 60da str r2, [r3, #12]
-
- /* Configure the Vector Table location add offset address ------------------*/
-#ifdef VECT_TAB_SRAM
- SCB->VTOR = RAMDTCM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
-#else
- SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
- 800c89e: 4b04 ldr r3, [pc, #16] ; (800c8b0 <SystemInit+0x5c>)
- 800c8a0: f04f 6200 mov.w r2, #134217728 ; 0x8000000
- 800c8a4: 609a str r2, [r3, #8]
-#endif
-}
- 800c8a6: bf00 nop
- 800c8a8: 46bd mov sp, r7
- 800c8aa: f85d 7b04 ldr.w r7, [sp], #4
- 800c8ae: 4770 bx lr
- 800c8b0: e000ed00 .word 0xe000ed00
- 800c8b4: 40023800 .word 0x40023800
- 800c8b8: fef6ffff .word 0xfef6ffff
- 800c8bc: 24003010 .word 0x24003010
-
-0800c8c0 <Reset_Handler>:
-
- .section .text.Reset_Handler
- .weak Reset_Handler
- .type Reset_Handler, %function
-Reset_Handler:
- ldr sp, =_estack /* set stack pointer */
- 800c8c0: f8df d034 ldr.w sp, [pc, #52] ; 800c8f8 <LoopFillZerobss+0x14>
-
-/* Copy the data segment initializers from flash to SRAM */
- movs r1, #0
- 800c8c4: 2100 movs r1, #0
- b LoopCopyDataInit
- 800c8c6: e003 b.n 800c8d0 <LoopCopyDataInit>
-
-0800c8c8 <CopyDataInit>:
-
-CopyDataInit:
- ldr r3, =_sidata
- 800c8c8: 4b0c ldr r3, [pc, #48] ; (800c8fc <LoopFillZerobss+0x18>)
- ldr r3, [r3, r1]
- 800c8ca: 585b ldr r3, [r3, r1]
- str r3, [r0, r1]
- 800c8cc: 5043 str r3, [r0, r1]
- adds r1, r1, #4
- 800c8ce: 3104 adds r1, #4
-
-0800c8d0 <LoopCopyDataInit>:
-
-LoopCopyDataInit:
- ldr r0, =_sdata
- 800c8d0: 480b ldr r0, [pc, #44] ; (800c900 <LoopFillZerobss+0x1c>)
- ldr r3, =_edata
- 800c8d2: 4b0c ldr r3, [pc, #48] ; (800c904 <LoopFillZerobss+0x20>)
- adds r2, r0, r1
- 800c8d4: 1842 adds r2, r0, r1
- cmp r2, r3
- 800c8d6: 429a cmp r2, r3
- bcc CopyDataInit
- 800c8d8: d3f6 bcc.n 800c8c8 <CopyDataInit>
- ldr r2, =_sbss
- 800c8da: 4a0b ldr r2, [pc, #44] ; (800c908 <LoopFillZerobss+0x24>)
- b LoopFillZerobss
- 800c8dc: e002 b.n 800c8e4 <LoopFillZerobss>
-
-0800c8de <FillZerobss>:
-/* Zero fill the bss segment. */
-FillZerobss:
- movs r3, #0
- 800c8de: 2300 movs r3, #0
- str r3, [r2], #4
- 800c8e0: f842 3b04 str.w r3, [r2], #4
-
-0800c8e4 <LoopFillZerobss>:
-
-LoopFillZerobss:
- ldr r3, = _ebss
- 800c8e4: 4b09 ldr r3, [pc, #36] ; (800c90c <LoopFillZerobss+0x28>)
- cmp r2, r3
- 800c8e6: 429a cmp r2, r3
- bcc FillZerobss
- 800c8e8: d3f9 bcc.n 800c8de <FillZerobss>
-
-/* Call the clock system initialization function.*/
- bl SystemInit
- 800c8ea: f7ff ffb3 bl 800c854 <SystemInit>
-/* Call static constructors */
- bl __libc_init_array
- 800c8ee: f001 fac5 bl 800de7c <__libc_init_array>
-/* Call the application's entry point.*/
- bl main
- 800c8f2: f7fe ff75 bl 800b7e0 <main>
- bx lr
- 800c8f6: 4770 bx lr
- ldr sp, =_estack /* set stack pointer */
- 800c8f8: 20080000 .word 0x20080000
- ldr r3, =_sidata
- 800c8fc: 08013338 .word 0x08013338
- ldr r0, =_sdata
- 800c900: 20000000 .word 0x20000000
- ldr r3, =_edata
- 800c904: 200009c0 .word 0x200009c0
- ldr r2, =_sbss
- 800c908: 200009c0 .word 0x200009c0
- ldr r3, = _ebss
- 800c90c: 20000b0c .word 0x20000b0c
-
-0800c910 <ADC_IRQHandler>:
- * @retval None
-*/
- .section .text.Default_Handler,"ax",%progbits
-Default_Handler:
-Infinite_Loop:
- b Infinite_Loop
- 800c910: e7fe b.n 800c910 <ADC_IRQHandler>
- ...
-
-0800c914 <__cxa_pure_virtual>:
- 800c914: b508 push {r3, lr}
- 800c916: 221b movs r2, #27
- 800c918: 4902 ldr r1, [pc, #8] ; (800c924 <__cxa_pure_virtual+0x10>)
- 800c91a: 2002 movs r0, #2
- 800c91c: f003 f9be bl 800fc9c <write>
- 800c920: f000 f816 bl 800c950 <_ZSt9terminatev>
- 800c924: 08012390 .word 0x08012390
-
-0800c928 <_ZN10__cxxabiv111__terminateEPFvvE>:
- 800c928: b508 push {r3, lr}
- 800c92a: 4780 blx r0
- 800c92c: f001 f884 bl 800da38 <abort>
- 800c930: f000 fd7c bl 800d42c <__cxa_begin_catch>
- 800c934: f001 f880 bl 800da38 <abort>
- 800c938: 460d mov r5, r1
- 800c93a: 4604 mov r4, r0
- 800c93c: f000 fdb6 bl 800d4ac <__cxa_end_catch>
- 800c940: 3501 adds r5, #1
- 800c942: d001 beq.n 800c948 <_ZN10__cxxabiv111__terminateEPFvvE+0x20>
- 800c944: f000 f8c8 bl 800cad8 <__cxa_end_cleanup>
- 800c948: 4620 mov r0, r4
- 800c94a: f000 f857 bl 800c9fc <__cxa_call_unexpected>
- 800c94e: bf00 nop
-
-0800c950 <_ZSt9terminatev>:
- 800c950: b508 push {r3, lr}
- 800c952: 4b03 ldr r3, [pc, #12] ; (800c960 <_ZSt9terminatev+0x10>)
- 800c954: 6818 ldr r0, [r3, #0]
- 800c956: f3bf 8f5b dmb ish
- 800c95a: f7ff ffe5 bl 800c928 <_ZN10__cxxabiv111__terminateEPFvvE>
- 800c95e: bf00 nop
- 800c960: 20000010 .word 0x20000010
-
-0800c964 <_ZN10__cxxabiv112__unexpectedEPFvvE>:
- 800c964: b508 push {r3, lr}
- 800c966: 4780 blx r0
- 800c968: f7ff fff2 bl 800c950 <_ZSt9terminatev>
-
-0800c96c <_ZSt10unexpectedv>:
- 800c96c: b508 push {r3, lr}
- 800c96e: 4b03 ldr r3, [pc, #12] ; (800c97c <_ZSt10unexpectedv+0x10>)
- 800c970: 6818 ldr r0, [r3, #0]
- 800c972: f3bf 8f5b dmb ish
- 800c976: f7ff fff5 bl 800c964 <_ZN10__cxxabiv112__unexpectedEPFvvE>
- 800c97a: bf00 nop
- 800c97c: 2000000c .word 0x2000000c
-
-0800c980 <_ZSt13get_terminatev>:
- 800c980: 4b02 ldr r3, [pc, #8] ; (800c98c <_ZSt13get_terminatev+0xc>)
- 800c982: 6818 ldr r0, [r3, #0]
- 800c984: f3bf 8f5b dmb ish
- 800c988: 4770 bx lr
- 800c98a: bf00 nop
- 800c98c: 20000010 .word 0x20000010
-
-0800c990 <_ZSt14get_unexpectedv>:
- 800c990: 4b02 ldr r3, [pc, #8] ; (800c99c <_ZSt14get_unexpectedv+0xc>)
- 800c992: 6818 ldr r0, [r3, #0]
- 800c994: f3bf 8f5b dmb ish
- 800c998: 4770 bx lr
- 800c99a: bf00 nop
- 800c99c: 2000000c .word 0x2000000c
-
-0800c9a0 <_ZN10__cxxabiv1L24__is_gxx_exception_classEPc>:
- 800c9a0: 7803 ldrb r3, [r0, #0]
- 800c9a2: 2b47 cmp r3, #71 ; 0x47
- 800c9a4: d001 beq.n 800c9aa <_ZN10__cxxabiv1L24__is_gxx_exception_classEPc+0xa>
- 800c9a6: 2000 movs r0, #0
- 800c9a8: 4770 bx lr
- 800c9aa: 7843 ldrb r3, [r0, #1]
- 800c9ac: 2b4e cmp r3, #78 ; 0x4e
- 800c9ae: d1fa bne.n 800c9a6 <_ZN10__cxxabiv1L24__is_gxx_exception_classEPc+0x6>
- 800c9b0: 7883 ldrb r3, [r0, #2]
- 800c9b2: 2b55 cmp r3, #85 ; 0x55
- 800c9b4: d1f7 bne.n 800c9a6 <_ZN10__cxxabiv1L24__is_gxx_exception_classEPc+0x6>
- 800c9b6: 78c3 ldrb r3, [r0, #3]
- 800c9b8: 2b43 cmp r3, #67 ; 0x43
- 800c9ba: d1f4 bne.n 800c9a6 <_ZN10__cxxabiv1L24__is_gxx_exception_classEPc+0x6>
- 800c9bc: 7903 ldrb r3, [r0, #4]
- 800c9be: 2b43 cmp r3, #67 ; 0x43
- 800c9c0: d1f1 bne.n 800c9a6 <_ZN10__cxxabiv1L24__is_gxx_exception_classEPc+0x6>
- 800c9c2: 7943 ldrb r3, [r0, #5]
- 800c9c4: 2b2b cmp r3, #43 ; 0x2b
- 800c9c6: d1ee bne.n 800c9a6 <_ZN10__cxxabiv1L24__is_gxx_exception_classEPc+0x6>
- 800c9c8: 7983 ldrb r3, [r0, #6]
- 800c9ca: 2b2b cmp r3, #43 ; 0x2b
- 800c9cc: d1eb bne.n 800c9a6 <_ZN10__cxxabiv1L24__is_gxx_exception_classEPc+0x6>
- 800c9ce: 79c0 ldrb r0, [r0, #7]
- 800c9d0: 2801 cmp r0, #1
- 800c9d2: bf8c ite hi
- 800c9d4: 2000 movhi r0, #0
- 800c9d6: 2001 movls r0, #1
- 800c9d8: 4770 bx lr
- 800c9da: bf00 nop
-
-0800c9dc <__cxa_call_terminate>:
- 800c9dc: b510 push {r4, lr}
- 800c9de: b130 cbz r0, 800c9ee <__cxa_call_terminate+0x12>
- 800c9e0: 4604 mov r4, r0
- 800c9e2: f000 fd23 bl 800d42c <__cxa_begin_catch>
- 800c9e6: 4620 mov r0, r4
- 800c9e8: f7ff ffda bl 800c9a0 <_ZN10__cxxabiv1L24__is_gxx_exception_classEPc>
- 800c9ec: b908 cbnz r0, 800c9f2 <__cxa_call_terminate+0x16>
- 800c9ee: f7ff ffaf bl 800c950 <_ZSt9terminatev>
- 800c9f2: f854 0c14 ldr.w r0, [r4, #-20]
- 800c9f6: f7ff ff97 bl 800c928 <_ZN10__cxxabiv111__terminateEPFvvE>
- 800c9fa: bf00 nop
-
-0800c9fc <__cxa_call_unexpected>:
- 800c9fc: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
- 800ca00: b085 sub sp, #20
- 800ca02: 4602 mov r2, r0
- 800ca04: f7ff ffcc bl 800c9a0 <_ZN10__cxxabiv1L24__is_gxx_exception_classEPc>
- 800ca08: b150 cbz r0, 800ca20 <__cxa_call_unexpected+0x24>
- 800ca0a: e952 8506 ldrd r8, r5, [r2, #-24]
- 800ca0e: 4610 mov r0, r2
- 800ca10: 6a96 ldr r6, [r2, #40] ; 0x28
- 800ca12: e9d2 740c ldrd r7, r4, [r2, #48] ; 0x30
- 800ca16: f000 fd09 bl 800d42c <__cxa_begin_catch>
- 800ca1a: 4640 mov r0, r8
- 800ca1c: f7ff ffa2 bl 800c964 <_ZN10__cxxabiv112__unexpectedEPFvvE>
- 800ca20: 4610 mov r0, r2
- 800ca22: f000 fd03 bl 800d42c <__cxa_begin_catch>
- 800ca26: f7ff ffa1 bl 800c96c <_ZSt10unexpectedv>
- 800ca2a: f000 fcff bl 800d42c <__cxa_begin_catch>
- 800ca2e: f7ff ff8f bl 800c950 <_ZSt9terminatev>
- 800ca32: f000 fcfb bl 800d42c <__cxa_begin_catch>
- 800ca36: f000 f917 bl 800cc68 <__cxa_get_globals_fast>
- 800ca3a: 6803 ldr r3, [r0, #0]
- 800ca3c: f893 2027 ldrb.w r2, [r3, #39] ; 0x27
- 800ca40: f10d 0a10 add.w sl, sp, #16
- 800ca44: 2a01 cmp r2, #1
- 800ca46: bf0c ite eq
- 800ca48: 681a ldreq r2, [r3, #0]
- 800ca4a: f103 0278 addne.w r2, r3, #120 ; 0x78
- 800ca4e: f04f 0800 mov.w r8, #0
- 800ca52: 3320 adds r3, #32
- 800ca54: f84a 2d08 str.w r2, [sl, #-8]!
- 800ca58: f027 0b03 bic.w fp, r7, #3
- 800ca5c: 9301 str r3, [sp, #4]
- 800ca5e: 46c1 mov r9, r8
- 800ca60: 45b1 cmp r9, r6
- 800ca62: da1b bge.n 800ca9c <__cxa_call_unexpected+0xa0>
- 800ca64: 6827 ldr r7, [r4, #0]
- 800ca66: b107 cbz r7, 800ca6a <__cxa_call_unexpected+0x6e>
- 800ca68: 4427 add r7, r4
- 800ca6a: 4653 mov r3, sl
- 800ca6c: 2200 movs r2, #0
- 800ca6e: 4639 mov r1, r7
- 800ca70: 9801 ldr r0, [sp, #4]
- 800ca72: f000 f837 bl 800cae4 <__cxa_type_match>
- 800ca76: b9e8 cbnz r0, 800cab4 <__cxa_call_unexpected+0xb8>
- 800ca78: 683b ldr r3, [r7, #0]
- 800ca7a: 4914 ldr r1, [pc, #80] ; (800cacc <__cxa_call_unexpected+0xd0>)
- 800ca7c: 691b ldr r3, [r3, #16]
- 800ca7e: 9300 str r3, [sp, #0]
- 800ca80: aa04 add r2, sp, #16
- 800ca82: 2301 movs r3, #1
- 800ca84: f842 0d04 str.w r0, [r2, #-4]!
- 800ca88: 4638 mov r0, r7
- 800ca8a: 9f00 ldr r7, [sp, #0]
- 800ca8c: 47b8 blx r7
- 800ca8e: 2800 cmp r0, #0
- 800ca90: bf18 it ne
- 800ca92: 4680 movne r8, r0
- 800ca94: f109 0901 add.w r9, r9, #1
- 800ca98: 445c add r4, fp
- 800ca9a: e7e1 b.n 800ca60 <__cxa_call_unexpected+0x64>
- 800ca9c: f1b8 0f00 cmp.w r8, #0
- 800caa0: d010 beq.n 800cac4 <__cxa_call_unexpected+0xc8>
- 800caa2: 2004 movs r0, #4
- 800caa4: f000 fdc0 bl 800d628 <__cxa_allocate_exception>
- 800caa8: 4b09 ldr r3, [pc, #36] ; (800cad0 <__cxa_call_unexpected+0xd4>)
- 800caaa: 6003 str r3, [r0, #0]
- 800caac: 4a09 ldr r2, [pc, #36] ; (800cad4 <__cxa_call_unexpected+0xd8>)
- 800caae: 4907 ldr r1, [pc, #28] ; (800cacc <__cxa_call_unexpected+0xd0>)
- 800cab0: f000 fc68 bl 800d384 <__cxa_throw>
- 800cab4: f000 fc82 bl 800d3bc <__cxa_rethrow>
- 800cab8: f000 fcf8 bl 800d4ac <__cxa_end_catch>
- 800cabc: f000 fcf6 bl 800d4ac <__cxa_end_catch>
- 800cac0: f000 f80a bl 800cad8 <__cxa_end_cleanup>
- 800cac4: 4628 mov r0, r5
- 800cac6: f7ff ff2f bl 800c928 <_ZN10__cxxabiv111__terminateEPFvvE>
- 800caca: bf00 nop
- 800cacc: 080123d0 .word 0x080123d0
- 800cad0: 08012454 .word 0x08012454
- 800cad4: 0800d6a1 .word 0x0800d6a1
-
-0800cad8 <__cxa_end_cleanup>:
- 800cad8: b41e push {r1, r2, r3, r4}
- 800cada: f000 f88d bl 800cbf8 <__gnu_end_cleanup>
- 800cade: bc1e pop {r1, r2, r3, r4}
- 800cae0: f7fb f882 bl 8007be8 <_Unwind_Resume>
-
-0800cae4 <__cxa_type_match>:
- 800cae4: b5f0 push {r4, r5, r6, r7, lr}
- 800cae6: 7802 ldrb r2, [r0, #0]
- 800cae8: 2a47 cmp r2, #71 ; 0x47
- 800caea: b083 sub sp, #12
- 800caec: 460d mov r5, r1
- 800caee: 461f mov r7, r3
- 800caf0: d01e beq.n 800cb30 <__cxa_type_match+0x4c>
- 800caf2: 2300 movs r3, #0
- 800caf4: 4c25 ldr r4, [pc, #148] ; (800cb8c <__cxa_type_match+0xa8>)
- 800caf6: 9301 str r3, [sp, #4]
- 800caf8: 6823 ldr r3, [r4, #0]
- 800cafa: 4620 mov r0, r4
- 800cafc: 689b ldr r3, [r3, #8]
- 800cafe: 4798 blx r3
- 800cb00: b180 cbz r0, 800cb24 <__cxa_type_match+0x40>
- 800cb02: 9b01 ldr r3, [sp, #4]
- 800cb04: 681b ldr r3, [r3, #0]
- 800cb06: 9301 str r3, [sp, #4]
- 800cb08: 2602 movs r6, #2
- 800cb0a: 682b ldr r3, [r5, #0]
- 800cb0c: 4621 mov r1, r4
- 800cb0e: 4628 mov r0, r5
- 800cb10: 691c ldr r4, [r3, #16]
- 800cb12: aa01 add r2, sp, #4
- 800cb14: 2301 movs r3, #1
- 800cb16: 47a0 blx r4
- 800cb18: b130 cbz r0, 800cb28 <__cxa_type_match+0x44>
- 800cb1a: 9b01 ldr r3, [sp, #4]
- 800cb1c: 603b str r3, [r7, #0]
- 800cb1e: 4630 mov r0, r6
- 800cb20: b003 add sp, #12
- 800cb22: bdf0 pop {r4, r5, r6, r7, pc}
- 800cb24: 2601 movs r6, #1
- 800cb26: e7f0 b.n 800cb0a <__cxa_type_match+0x26>
- 800cb28: 4606 mov r6, r0
- 800cb2a: 4630 mov r0, r6
- 800cb2c: b003 add sp, #12
- 800cb2e: bdf0 pop {r4, r5, r6, r7, pc}
- 800cb30: 7843 ldrb r3, [r0, #1]
- 800cb32: 2b4e cmp r3, #78 ; 0x4e
- 800cb34: d1dd bne.n 800caf2 <__cxa_type_match+0xe>
- 800cb36: 7883 ldrb r3, [r0, #2]
- 800cb38: 2b55 cmp r3, #85 ; 0x55
- 800cb3a: d1da bne.n 800caf2 <__cxa_type_match+0xe>
- 800cb3c: 78c3 ldrb r3, [r0, #3]
- 800cb3e: 2b43 cmp r3, #67 ; 0x43
- 800cb40: d1d7 bne.n 800caf2 <__cxa_type_match+0xe>
- 800cb42: 7903 ldrb r3, [r0, #4]
- 800cb44: 2b46 cmp r3, #70 ; 0x46
- 800cb46: d015 beq.n 800cb74 <__cxa_type_match+0x90>
- 800cb48: 7903 ldrb r3, [r0, #4]
- 800cb4a: 2b43 cmp r3, #67 ; 0x43
- 800cb4c: d1d1 bne.n 800caf2 <__cxa_type_match+0xe>
- 800cb4e: 7943 ldrb r3, [r0, #5]
- 800cb50: 2b2b cmp r3, #43 ; 0x2b
- 800cb52: d1ce bne.n 800caf2 <__cxa_type_match+0xe>
- 800cb54: 7983 ldrb r3, [r0, #6]
- 800cb56: 2b2b cmp r3, #43 ; 0x2b
- 800cb58: d1cb bne.n 800caf2 <__cxa_type_match+0xe>
- 800cb5a: 79c3 ldrb r3, [r0, #7]
- 800cb5c: 2b01 cmp r3, #1
- 800cb5e: d8c8 bhi.n 800caf2 <__cxa_type_match+0xe>
- 800cb60: f850 4c20 ldr.w r4, [r0, #-32]
- 800cb64: d002 beq.n 800cb6c <__cxa_type_match+0x88>
- 800cb66: 3058 adds r0, #88 ; 0x58
- 800cb68: 9001 str r0, [sp, #4]
- 800cb6a: e7c5 b.n 800caf8 <__cxa_type_match+0x14>
- 800cb6c: 4620 mov r0, r4
- 800cb6e: f854 4c78 ldr.w r4, [r4, #-120]
- 800cb72: e7f9 b.n 800cb68 <__cxa_type_match+0x84>
- 800cb74: 7943 ldrb r3, [r0, #5]
- 800cb76: 2b4f cmp r3, #79 ; 0x4f
- 800cb78: d1e6 bne.n 800cb48 <__cxa_type_match+0x64>
- 800cb7a: 7983 ldrb r3, [r0, #6]
- 800cb7c: 2b52 cmp r3, #82 ; 0x52
- 800cb7e: d1e3 bne.n 800cb48 <__cxa_type_match+0x64>
- 800cb80: 79c3 ldrb r3, [r0, #7]
- 800cb82: 2b00 cmp r3, #0
- 800cb84: d1e0 bne.n 800cb48 <__cxa_type_match+0x64>
- 800cb86: 9301 str r3, [sp, #4]
- 800cb88: 4c01 ldr r4, [pc, #4] ; (800cb90 <__cxa_type_match+0xac>)
- 800cb8a: e7b5 b.n 800caf8 <__cxa_type_match+0x14>
- 800cb8c: 080123c8 .word 0x080123c8
- 800cb90: 080123c0 .word 0x080123c0
-
-0800cb94 <__cxa_begin_cleanup>:
- 800cb94: b510 push {r4, lr}
- 800cb96: 4604 mov r4, r0
- 800cb98: f000 f86a bl 800cc70 <__cxa_get_globals>
- 800cb9c: 7823 ldrb r3, [r4, #0]
- 800cb9e: 2b47 cmp r3, #71 ; 0x47
- 800cba0: f1a4 0220 sub.w r2, r4, #32
- 800cba4: d004 beq.n 800cbb0 <__cxa_begin_cleanup+0x1c>
- 800cba6: 6883 ldr r3, [r0, #8]
- 800cba8: bb23 cbnz r3, 800cbf4 <__cxa_begin_cleanup+0x60>
- 800cbaa: 6082 str r2, [r0, #8]
- 800cbac: 2001 movs r0, #1
- 800cbae: bd10 pop {r4, pc}
- 800cbb0: 7863 ldrb r3, [r4, #1]
- 800cbb2: 2b4e cmp r3, #78 ; 0x4e
- 800cbb4: d1f7 bne.n 800cba6 <__cxa_begin_cleanup+0x12>
- 800cbb6: 78a3 ldrb r3, [r4, #2]
- 800cbb8: 2b55 cmp r3, #85 ; 0x55
- 800cbba: d1f4 bne.n 800cba6 <__cxa_begin_cleanup+0x12>
- 800cbbc: 78e3 ldrb r3, [r4, #3]
- 800cbbe: 2b43 cmp r3, #67 ; 0x43
- 800cbc0: d1f1 bne.n 800cba6 <__cxa_begin_cleanup+0x12>
- 800cbc2: 7923 ldrb r3, [r4, #4]
- 800cbc4: 2b43 cmp r3, #67 ; 0x43
- 800cbc6: d1ee bne.n 800cba6 <__cxa_begin_cleanup+0x12>
- 800cbc8: 7963 ldrb r3, [r4, #5]
- 800cbca: 2b2b cmp r3, #43 ; 0x2b
- 800cbcc: d1eb bne.n 800cba6 <__cxa_begin_cleanup+0x12>
- 800cbce: 79a3 ldrb r3, [r4, #6]
- 800cbd0: 2b2b cmp r3, #43 ; 0x2b
- 800cbd2: d1e8 bne.n 800cba6 <__cxa_begin_cleanup+0x12>
- 800cbd4: 79e3 ldrb r3, [r4, #7]
- 800cbd6: 2b01 cmp r3, #1
- 800cbd8: d8e5 bhi.n 800cba6 <__cxa_begin_cleanup+0x12>
- 800cbda: f854 3c04 ldr.w r3, [r4, #-4]
- 800cbde: 3301 adds r3, #1
- 800cbe0: 2b01 cmp r3, #1
- 800cbe2: f844 3c04 str.w r3, [r4, #-4]
- 800cbe6: d1e1 bne.n 800cbac <__cxa_begin_cleanup+0x18>
- 800cbe8: 6883 ldr r3, [r0, #8]
- 800cbea: f844 3c08 str.w r3, [r4, #-8]
- 800cbee: 6082 str r2, [r0, #8]
- 800cbf0: 2001 movs r0, #1
- 800cbf2: bd10 pop {r4, pc}
- 800cbf4: f7ff feac bl 800c950 <_ZSt9terminatev>
-
-0800cbf8 <__gnu_end_cleanup>:
- 800cbf8: b508 push {r3, lr}
- 800cbfa: f000 f839 bl 800cc70 <__cxa_get_globals>
- 800cbfe: 6883 ldr r3, [r0, #8]
- 800cc00: b383 cbz r3, 800cc64 <__gnu_end_cleanup+0x6c>
- 800cc02: f893 2020 ldrb.w r2, [r3, #32]
- 800cc06: 2a47 cmp r2, #71 ; 0x47
- 800cc08: d004 beq.n 800cc14 <__gnu_end_cleanup+0x1c>
- 800cc0a: 2200 movs r2, #0
- 800cc0c: 6082 str r2, [r0, #8]
- 800cc0e: f103 0020 add.w r0, r3, #32
- 800cc12: bd08 pop {r3, pc}
- 800cc14: f893 2021 ldrb.w r2, [r3, #33] ; 0x21
- 800cc18: 2a4e cmp r2, #78 ; 0x4e
- 800cc1a: d1f6 bne.n 800cc0a <__gnu_end_cleanup+0x12>
- 800cc1c: f893 2022 ldrb.w r2, [r3, #34] ; 0x22
- 800cc20: 2a55 cmp r2, #85 ; 0x55
- 800cc22: d1f2 bne.n 800cc0a <__gnu_end_cleanup+0x12>
- 800cc24: f893 2023 ldrb.w r2, [r3, #35] ; 0x23
- 800cc28: 2a43 cmp r2, #67 ; 0x43
- 800cc2a: d1ee bne.n 800cc0a <__gnu_end_cleanup+0x12>
- 800cc2c: f893 2024 ldrb.w r2, [r3, #36] ; 0x24
- 800cc30: 2a43 cmp r2, #67 ; 0x43
- 800cc32: d1ea bne.n 800cc0a <__gnu_end_cleanup+0x12>
- 800cc34: f893 2025 ldrb.w r2, [r3, #37] ; 0x25
- 800cc38: 2a2b cmp r2, #43 ; 0x2b
- 800cc3a: d1e6 bne.n 800cc0a <__gnu_end_cleanup+0x12>
- 800cc3c: f893 2026 ldrb.w r2, [r3, #38] ; 0x26
- 800cc40: 2a2b cmp r2, #43 ; 0x2b
- 800cc42: d1e2 bne.n 800cc0a <__gnu_end_cleanup+0x12>
- 800cc44: f893 2027 ldrb.w r2, [r3, #39] ; 0x27
- 800cc48: 2a01 cmp r2, #1
- 800cc4a: d8de bhi.n 800cc0a <__gnu_end_cleanup+0x12>
- 800cc4c: 69da ldr r2, [r3, #28]
- 800cc4e: 3a01 subs r2, #1
- 800cc50: 61da str r2, [r3, #28]
- 800cc52: 2a00 cmp r2, #0
- 800cc54: d1db bne.n 800cc0e <__gnu_end_cleanup+0x16>
- 800cc56: 699a ldr r2, [r3, #24]
- 800cc58: 6082 str r2, [r0, #8]
- 800cc5a: 2200 movs r2, #0
- 800cc5c: 619a str r2, [r3, #24]
- 800cc5e: f103 0020 add.w r0, r3, #32
- 800cc62: bd08 pop {r3, pc}
- 800cc64: f7ff fe74 bl 800c950 <_ZSt9terminatev>
-
-0800cc68 <__cxa_get_globals_fast>:
- 800cc68: 4800 ldr r0, [pc, #0] ; (800cc6c <__cxa_get_globals_fast+0x4>)
- 800cc6a: 4770 bx lr
- 800cc6c: 20000aa4 .word 0x20000aa4
-
-0800cc70 <__cxa_get_globals>:
- 800cc70: 4800 ldr r0, [pc, #0] ; (800cc74 <__cxa_get_globals+0x4>)
- 800cc72: 4770 bx lr
- 800cc74: 20000aa4 .word 0x20000aa4
-
-0800cc78 <_ZL28read_encoded_value_with_basehjPKhPj>:
- 800cc78: 2850 cmp r0, #80 ; 0x50
- 800cc7a: b5f8 push {r3, r4, r5, r6, r7, lr}
- 800cc7c: d01c beq.n 800ccb8 <_ZL28read_encoded_value_with_basehjPKhPj+0x40>
- 800cc7e: f000 040f and.w r4, r0, #15
- 800cc82: 2c0c cmp r4, #12
- 800cc84: d856 bhi.n 800cd34 <_ZL28read_encoded_value_with_basehjPKhPj+0xbc>
- 800cc86: e8df f004 tbb [pc, r4]
- 800cc8a: 4107 .short 0x4107
- 800cc8c: 551f0751 .word 0x551f0751
- 800cc90: 27555555 .word 0x27555555
- 800cc94: 0723 .short 0x0723
- 800cc96: 1f .byte 0x1f
- 800cc97: 00 .byte 0x00
- 800cc98: 4614 mov r4, r2
- 800cc9a: f854 5b04 ldr.w r5, [r4], #4
- 800cc9e: b145 cbz r5, 800ccb2 <_ZL28read_encoded_value_with_basehjPKhPj+0x3a>
- 800cca0: f000 0670 and.w r6, r0, #112 ; 0x70
- 800cca4: 2e10 cmp r6, #16
- 800cca6: bf08 it eq
- 800cca8: 4611 moveq r1, r2
- 800ccaa: 440d add r5, r1
- 800ccac: 0602 lsls r2, r0, #24
- 800ccae: bf48 it mi
- 800ccb0: 682d ldrmi r5, [r5, #0]
- 800ccb2: 601d str r5, [r3, #0]
- 800ccb4: 4620 mov r0, r4
- 800ccb6: bdf8 pop {r3, r4, r5, r6, r7, pc}
- 800ccb8: 3203 adds r2, #3
- 800ccba: f022 0403 bic.w r4, r2, #3
- 800ccbe: f854 5b04 ldr.w r5, [r4], #4
- 800ccc2: 601d str r5, [r3, #0]
- 800ccc4: 4620 mov r0, r4
- 800ccc6: bdf8 pop {r3, r4, r5, r6, r7, pc}
- 800ccc8: 4614 mov r4, r2
- 800ccca: f854 5b08 ldr.w r5, [r4], #8
- 800ccce: e7e6 b.n 800cc9e <_ZL28read_encoded_value_with_basehjPKhPj+0x26>
- 800ccd0: 4614 mov r4, r2
- 800ccd2: f934 5b02 ldrsh.w r5, [r4], #2
- 800ccd6: e7e2 b.n 800cc9e <_ZL28read_encoded_value_with_basehjPKhPj+0x26>
- 800ccd8: 2500 movs r5, #0
- 800ccda: 462f mov r7, r5
- 800ccdc: 4614 mov r4, r2
- 800ccde: f814 cb01 ldrb.w ip, [r4], #1
- 800cce2: f00c 067f and.w r6, ip, #127 ; 0x7f
- 800cce6: 40be lsls r6, r7
- 800cce8: f01c 0f80 tst.w ip, #128 ; 0x80
- 800ccec: ea45 0506 orr.w r5, r5, r6
- 800ccf0: f107 0707 add.w r7, r7, #7
- 800ccf4: d1f3 bne.n 800ccde <_ZL28read_encoded_value_with_basehjPKhPj+0x66>
- 800ccf6: 2f1f cmp r7, #31
- 800ccf8: d8d1 bhi.n 800cc9e <_ZL28read_encoded_value_with_basehjPKhPj+0x26>
- 800ccfa: f01c 0f40 tst.w ip, #64 ; 0x40
- 800ccfe: d0ce beq.n 800cc9e <_ZL28read_encoded_value_with_basehjPKhPj+0x26>
- 800cd00: f04f 36ff mov.w r6, #4294967295 ; 0xffffffff
- 800cd04: fa06 f707 lsl.w r7, r6, r7
- 800cd08: 433d orrs r5, r7
- 800cd0a: e7c9 b.n 800cca0 <_ZL28read_encoded_value_with_basehjPKhPj+0x28>
- 800cd0c: 2500 movs r5, #0
- 800cd0e: 462f mov r7, r5
- 800cd10: 4614 mov r4, r2
- 800cd12: f814 cb01 ldrb.w ip, [r4], #1
- 800cd16: f00c 067f and.w r6, ip, #127 ; 0x7f
- 800cd1a: 40be lsls r6, r7
- 800cd1c: f01c 0f80 tst.w ip, #128 ; 0x80
- 800cd20: ea45 0506 orr.w r5, r5, r6
- 800cd24: f107 0707 add.w r7, r7, #7
- 800cd28: d1f3 bne.n 800cd12 <_ZL28read_encoded_value_with_basehjPKhPj+0x9a>
- 800cd2a: e7b8 b.n 800cc9e <_ZL28read_encoded_value_with_basehjPKhPj+0x26>
- 800cd2c: 4614 mov r4, r2
- 800cd2e: f834 5b02 ldrh.w r5, [r4], #2
- 800cd32: e7b4 b.n 800cc9e <_ZL28read_encoded_value_with_basehjPKhPj+0x26>
- 800cd34: f000 fe80 bl 800da38 <abort>
-
-0800cd38 <_ZL21base_of_encoded_valuehP15_Unwind_Context.part.3>:
- 800cd38: f000 0070 and.w r0, r0, #112 ; 0x70
- 800cd3c: 2820 cmp r0, #32
- 800cd3e: d011 beq.n 800cd64 <_ZL21base_of_encoded_valuehP15_Unwind_Context.part.3+0x2c>
- 800cd40: d90b bls.n 800cd5a <_ZL21base_of_encoded_valuehP15_Unwind_Context.part.3+0x22>
- 800cd42: 2840 cmp r0, #64 ; 0x40
- 800cd44: d006 beq.n 800cd54 <_ZL21base_of_encoded_valuehP15_Unwind_Context.part.3+0x1c>
- 800cd46: 2850 cmp r0, #80 ; 0x50
- 800cd48: d00a beq.n 800cd60 <_ZL21base_of_encoded_valuehP15_Unwind_Context.part.3+0x28>
- 800cd4a: 2830 cmp r0, #48 ; 0x30
- 800cd4c: d10d bne.n 800cd6a <_ZL21base_of_encoded_valuehP15_Unwind_Context.part.3+0x32>
- 800cd4e: 4608 mov r0, r1
- 800cd50: f7fb b944 b.w 8007fdc <_Unwind_GetDataRelBase>
- 800cd54: 4608 mov r0, r1
- 800cd56: f7fb b931 b.w 8007fbc <_Unwind_GetRegionStart>
- 800cd5a: b108 cbz r0, 800cd60 <_ZL21base_of_encoded_valuehP15_Unwind_Context.part.3+0x28>
- 800cd5c: 2810 cmp r0, #16
- 800cd5e: d104 bne.n 800cd6a <_ZL21base_of_encoded_valuehP15_Unwind_Context.part.3+0x32>
- 800cd60: 2000 movs r0, #0
- 800cd62: 4770 bx lr
- 800cd64: 4608 mov r0, r1
- 800cd66: f7fb b93d b.w 8007fe4 <_Unwind_GetTextRelBase>
- 800cd6a: b508 push {r3, lr}
- 800cd6c: f000 fe64 bl 800da38 <abort>
-
-0800cd70 <_ZL17parse_lsda_headerP15_Unwind_ContextPKhP16lsda_header_info>:
- 800cd70: b5f8 push {r3, r4, r5, r6, r7, lr}
- 800cd72: 460c mov r4, r1
- 800cd74: 4615 mov r5, r2
- 800cd76: 4607 mov r7, r0
- 800cd78: b108 cbz r0, 800cd7e <_ZL17parse_lsda_headerP15_Unwind_ContextPKhP16lsda_header_info+0xe>
- 800cd7a: f7fb f91f bl 8007fbc <_Unwind_GetRegionStart>
- 800cd7e: 6028 str r0, [r5, #0]
- 800cd80: 7826 ldrb r6, [r4, #0]
- 800cd82: 2eff cmp r6, #255 ; 0xff
- 800cd84: f104 0401 add.w r4, r4, #1
- 800cd88: d129 bne.n 800cdde <_ZL17parse_lsda_headerP15_Unwind_ContextPKhP16lsda_header_info+0x6e>
- 800cd8a: 6068 str r0, [r5, #4]
- 800cd8c: 7823 ldrb r3, [r4, #0]
- 800cd8e: 752b strb r3, [r5, #20]
- 800cd90: 2bff cmp r3, #255 ; 0xff
- 800cd92: f104 0001 add.w r0, r4, #1
- 800cd96: d032 beq.n 800cdfe <_ZL17parse_lsda_headerP15_Unwind_ContextPKhP16lsda_header_info+0x8e>
- 800cd98: 2310 movs r3, #16
- 800cd9a: 2400 movs r4, #0
- 800cd9c: 752b strb r3, [r5, #20]
- 800cd9e: 4622 mov r2, r4
- 800cda0: f810 1b01 ldrb.w r1, [r0], #1
- 800cda4: f001 037f and.w r3, r1, #127 ; 0x7f
- 800cda8: 4093 lsls r3, r2
- 800cdaa: 0609 lsls r1, r1, #24
- 800cdac: ea44 0403 orr.w r4, r4, r3
- 800cdb0: f102 0207 add.w r2, r2, #7
- 800cdb4: d4f4 bmi.n 800cda0 <_ZL17parse_lsda_headerP15_Unwind_ContextPKhP16lsda_header_info+0x30>
- 800cdb6: 4404 add r4, r0
- 800cdb8: 60ec str r4, [r5, #12]
- 800cdba: 7803 ldrb r3, [r0, #0]
- 800cdbc: 756b strb r3, [r5, #21]
- 800cdbe: 2400 movs r4, #0
- 800cdc0: 3001 adds r0, #1
- 800cdc2: 4622 mov r2, r4
- 800cdc4: f810 1b01 ldrb.w r1, [r0], #1
- 800cdc8: f001 037f and.w r3, r1, #127 ; 0x7f
- 800cdcc: 4093 lsls r3, r2
- 800cdce: 431c orrs r4, r3
- 800cdd0: 060b lsls r3, r1, #24
- 800cdd2: f102 0207 add.w r2, r2, #7
- 800cdd6: d4f5 bmi.n 800cdc4 <_ZL17parse_lsda_headerP15_Unwind_ContextPKhP16lsda_header_info+0x54>
- 800cdd8: 4404 add r4, r0
- 800cdda: 612c str r4, [r5, #16]
- 800cddc: bdf8 pop {r3, r4, r5, r6, r7, pc}
- 800cdde: 4639 mov r1, r7
- 800cde0: 4630 mov r0, r6
- 800cde2: f7ff ffa9 bl 800cd38 <_ZL21base_of_encoded_valuehP15_Unwind_Context.part.3>
- 800cde6: 4622 mov r2, r4
- 800cde8: 4601 mov r1, r0
- 800cdea: 1d2b adds r3, r5, #4
- 800cdec: 4630 mov r0, r6
- 800cdee: f7ff ff43 bl 800cc78 <_ZL28read_encoded_value_with_basehjPKhPj>
- 800cdf2: 4604 mov r4, r0
- 800cdf4: 1c60 adds r0, r4, #1
- 800cdf6: 7823 ldrb r3, [r4, #0]
- 800cdf8: 752b strb r3, [r5, #20]
- 800cdfa: 2bff cmp r3, #255 ; 0xff
- 800cdfc: d1cc bne.n 800cd98 <_ZL17parse_lsda_headerP15_Unwind_ContextPKhP16lsda_header_info+0x28>
- 800cdfe: 2300 movs r3, #0
- 800ce00: 60eb str r3, [r5, #12]
- 800ce02: e7da b.n 800cdba <_ZL17parse_lsda_headerP15_Unwind_ContextPKhP16lsda_header_info+0x4a>
-
-0800ce04 <__gxx_personality_v0>:
- 800ce04: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
- 800ce08: f000 0403 and.w r4, r0, #3
- 800ce0c: b099 sub sp, #100 ; 0x64
- 800ce0e: 2300 movs r3, #0
- 800ce10: 2c01 cmp r4, #1
- 800ce12: 4688 mov r8, r1
- 800ce14: 4617 mov r7, r2
- 800ce16: 930c str r3, [sp, #48] ; 0x30
- 800ce18: f000 8096 beq.w 800cf48 <__gxx_personality_v0+0x144>
- 800ce1c: d30d bcc.n 800ce3a <__gxx_personality_v0+0x36>
- 800ce1e: 2c02 cmp r4, #2
- 800ce20: f040 825f bne.w 800d2e2 <__gxx_personality_v0+0x4de>
- 800ce24: 4639 mov r1, r7
- 800ce26: 4640 mov r0, r8
- 800ce28: f7fb f8b4 bl 8007f94 <__gnu_unwind_frame>
- 800ce2c: 2800 cmp r0, #0
- 800ce2e: f000 809b beq.w 800cf68 <__gxx_personality_v0+0x164>
- 800ce32: 2009 movs r0, #9
- 800ce34: b019 add sp, #100 ; 0x64
- 800ce36: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
- 800ce3a: 0702 lsls r2, r0, #28
- 800ce3c: d4f2 bmi.n 800ce24 <__gxx_personality_v0+0x20>
- 800ce3e: 2301 movs r3, #1
- 800ce40: 9304 str r3, [sp, #16]
- 800ce42: aa18 add r2, sp, #96 ; 0x60
- 800ce44: 2300 movs r3, #0
- 800ce46: f842 8d2c str.w r8, [r2, #-44]!
- 800ce4a: 4619 mov r1, r3
- 800ce4c: 9200 str r2, [sp, #0]
- 800ce4e: 4638 mov r0, r7
- 800ce50: 220c movs r2, #12
- 800ce52: f7fa fb2f bl 80074b4 <_Unwind_VRS_Set>
- 800ce56: 4638 mov r0, r7
- 800ce58: f7fb f8b6 bl 8007fc8 <_Unwind_GetLanguageSpecificData>
- 800ce5c: 9005 str r0, [sp, #20]
- 800ce5e: 2800 cmp r0, #0
- 800ce60: d0e0 beq.n 800ce24 <__gxx_personality_v0+0x20>
- 800ce62: ab12 add r3, sp, #72 ; 0x48
- 800ce64: 461a mov r2, r3
- 800ce66: 9905 ldr r1, [sp, #20]
- 800ce68: 9306 str r3, [sp, #24]
- 800ce6a: 4638 mov r0, r7
- 800ce6c: f7ff ff80 bl 800cd70 <_ZL17parse_lsda_headerP15_Unwind_ContextPKhP16lsda_header_info>
- 800ce70: 4605 mov r5, r0
- 800ce72: f89d 005c ldrb.w r0, [sp, #92] ; 0x5c
- 800ce76: 28ff cmp r0, #255 ; 0xff
- 800ce78: f000 80e5 beq.w 800d046 <__gxx_personality_v0+0x242>
- 800ce7c: 4639 mov r1, r7
- 800ce7e: f7ff ff5b bl 800cd38 <_ZL21base_of_encoded_valuehP15_Unwind_Context.part.3>
- 800ce82: 4604 mov r4, r0
- 800ce84: 2300 movs r3, #0
- 800ce86: f10d 0b44 add.w fp, sp, #68 ; 0x44
- 800ce8a: 4619 mov r1, r3
- 800ce8c: f8cd b000 str.w fp, [sp]
- 800ce90: 220f movs r2, #15
- 800ce92: 4638 mov r0, r7
- 800ce94: 9414 str r4, [sp, #80] ; 0x50
- 800ce96: f7fa faeb bl 8007470 <_Unwind_VRS_Get>
- 800ce9a: 9e11 ldr r6, [sp, #68] ; 0x44
- 800ce9c: 9b16 ldr r3, [sp, #88] ; 0x58
- 800ce9e: f026 0601 bic.w r6, r6, #1
- 800cea2: 429d cmp r5, r3
- 800cea4: f106 36ff add.w r6, r6, #4294967295 ; 0xffffffff
- 800cea8: f080 80d4 bcs.w 800d054 <__gxx_personality_v0+0x250>
- 800ceac: f10d 0a3c add.w sl, sp, #60 ; 0x3c
- 800ceb0: f10d 0940 add.w r9, sp, #64 ; 0x40
- 800ceb4: f89d 405d ldrb.w r4, [sp, #93] ; 0x5d
- 800ceb8: 2cff cmp r4, #255 ; 0xff
- 800ceba: f04f 0100 mov.w r1, #0
- 800cebe: d003 beq.n 800cec8 <__gxx_personality_v0+0xc4>
- 800cec0: 4620 mov r0, r4
- 800cec2: f7ff ff39 bl 800cd38 <_ZL21base_of_encoded_valuehP15_Unwind_Context.part.3>
- 800cec6: 4601 mov r1, r0
- 800cec8: 462a mov r2, r5
- 800ceca: 4620 mov r0, r4
- 800cecc: 4653 mov r3, sl
- 800cece: f7ff fed3 bl 800cc78 <_ZL28read_encoded_value_with_basehjPKhPj>
- 800ced2: f89d 405d ldrb.w r4, [sp, #93] ; 0x5d
- 800ced6: 2cff cmp r4, #255 ; 0xff
- 800ced8: 4605 mov r5, r0
- 800ceda: f04f 0100 mov.w r1, #0
- 800cede: d003 beq.n 800cee8 <__gxx_personality_v0+0xe4>
- 800cee0: 4620 mov r0, r4
- 800cee2: f7ff ff29 bl 800cd38 <_ZL21base_of_encoded_valuehP15_Unwind_Context.part.3>
- 800cee6: 4601 mov r1, r0
- 800cee8: 462a mov r2, r5
- 800ceea: 4620 mov r0, r4
- 800ceec: 464b mov r3, r9
- 800ceee: f7ff fec3 bl 800cc78 <_ZL28read_encoded_value_with_basehjPKhPj>
- 800cef2: f89d 405d ldrb.w r4, [sp, #93] ; 0x5d
- 800cef6: 2cff cmp r4, #255 ; 0xff
- 800cef8: 4605 mov r5, r0
- 800cefa: f04f 0100 mov.w r1, #0
- 800cefe: d003 beq.n 800cf08 <__gxx_personality_v0+0x104>
- 800cf00: 4620 mov r0, r4
- 800cf02: f7ff ff19 bl 800cd38 <_ZL21base_of_encoded_valuehP15_Unwind_Context.part.3>
- 800cf06: 4601 mov r1, r0
- 800cf08: 462a mov r2, r5
- 800cf0a: 4620 mov r0, r4
- 800cf0c: 465b mov r3, fp
- 800cf0e: f7ff feb3 bl 800cc78 <_ZL28read_encoded_value_with_basehjPKhPj>
- 800cf12: 2400 movs r4, #0
- 800cf14: 4605 mov r5, r0
- 800cf16: 4621 mov r1, r4
- 800cf18: f815 2b01 ldrb.w r2, [r5], #1
- 800cf1c: f002 037f and.w r3, r2, #127 ; 0x7f
- 800cf20: 408b lsls r3, r1
- 800cf22: 431c orrs r4, r3
- 800cf24: 0613 lsls r3, r2, #24
- 800cf26: f101 0107 add.w r1, r1, #7
- 800cf2a: d4f5 bmi.n 800cf18 <__gxx_personality_v0+0x114>
- 800cf2c: 9b12 ldr r3, [sp, #72] ; 0x48
- 800cf2e: 9a0f ldr r2, [sp, #60] ; 0x3c
- 800cf30: 4413 add r3, r2
- 800cf32: 42b3 cmp r3, r6
- 800cf34: d91f bls.n 800cf76 <__gxx_personality_v0+0x172>
- 800cf36: 9b04 ldr r3, [sp, #16]
- 800cf38: 07db lsls r3, r3, #31
- 800cf3a: f100 8091 bmi.w 800d060 <__gxx_personality_v0+0x25c>
- 800cf3e: 9b04 ldr r3, [sp, #16]
- 800cf40: 071c lsls r4, r3, #28
- 800cf42: d515 bpl.n 800cf70 <__gxx_personality_v0+0x16c>
- 800cf44: f7ff fd04 bl 800c950 <_ZSt9terminatev>
- 800cf48: f010 0408 ands.w r4, r0, #8
- 800cf4c: d01c beq.n 800cf88 <__gxx_personality_v0+0x184>
- 800cf4e: aa18 add r2, sp, #96 ; 0x60
- 800cf50: f044 0402 orr.w r4, r4, #2
- 800cf54: f842 1d2c str.w r1, [r2, #-44]!
- 800cf58: 4638 mov r0, r7
- 800cf5a: 9200 str r2, [sp, #0]
- 800cf5c: 4619 mov r1, r3
- 800cf5e: 220c movs r2, #12
- 800cf60: 9404 str r4, [sp, #16]
- 800cf62: f7fa faa7 bl 80074b4 <_Unwind_VRS_Set>
- 800cf66: e776 b.n 800ce56 <__gxx_personality_v0+0x52>
- 800cf68: 2008 movs r0, #8
- 800cf6a: b019 add sp, #100 ; 0x64
- 800cf6c: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
- 800cf70: 4640 mov r0, r8
- 800cf72: f7ff fd33 bl 800c9dc <__cxa_call_terminate>
- 800cf76: 9a10 ldr r2, [sp, #64] ; 0x40
- 800cf78: 4413 add r3, r2
- 800cf7a: 42b3 cmp r3, r6
- 800cf7c: f200 8088 bhi.w 800d090 <__gxx_personality_v0+0x28c>
- 800cf80: 9b16 ldr r3, [sp, #88] ; 0x58
- 800cf82: 42ab cmp r3, r5
- 800cf84: d896 bhi.n 800ceb4 <__gxx_personality_v0+0xb0>
- 800cf86: e7d6 b.n 800cf36 <__gxx_personality_v0+0x132>
- 800cf88: ab12 add r3, sp, #72 ; 0x48
- 800cf8a: 9300 str r3, [sp, #0]
- 800cf8c: 9306 str r3, [sp, #24]
- 800cf8e: 220d movs r2, #13
- 800cf90: 4623 mov r3, r4
- 800cf92: 4621 mov r1, r4
- 800cf94: 4638 mov r0, r7
- 800cf96: f8d8 5020 ldr.w r5, [r8, #32]
- 800cf9a: f7fa fa69 bl 8007470 <_Unwind_VRS_Get>
- 800cf9e: 9b12 ldr r3, [sp, #72] ; 0x48
- 800cfa0: 429d cmp r5, r3
- 800cfa2: d002 beq.n 800cfaa <__gxx_personality_v0+0x1a6>
- 800cfa4: 2302 movs r3, #2
- 800cfa6: 9304 str r3, [sp, #16]
- 800cfa8: e74b b.n 800ce42 <__gxx_personality_v0+0x3e>
- 800cfaa: aa18 add r2, sp, #96 ; 0x60
- 800cfac: 4623 mov r3, r4
- 800cfae: f842 8d2c str.w r8, [r2, #-44]!
- 800cfb2: 4621 mov r1, r4
- 800cfb4: 9200 str r2, [sp, #0]
- 800cfb6: 4638 mov r0, r7
- 800cfb8: 220c movs r2, #12
- 800cfba: f7fa fa7b bl 80074b4 <_Unwind_VRS_Set>
- 800cfbe: f8d8 3030 ldr.w r3, [r8, #48] ; 0x30
- 800cfc2: 9303 str r3, [sp, #12]
- 800cfc4: 2b00 cmp r3, #0
- 800cfc6: d0d3 beq.n 800cf70 <__gxx_personality_v0+0x16c>
- 800cfc8: f8d8 3028 ldr.w r3, [r8, #40] ; 0x28
- 800cfcc: 461a mov r2, r3
- 800cfce: f8d8 302c ldr.w r3, [r8, #44] ; 0x2c
- 800cfd2: 9305 str r3, [sp, #20]
- 800cfd4: f10d 0a3c add.w sl, sp, #60 ; 0x3c
- 800cfd8: f10d 0940 add.w r9, sp, #64 ; 0x40
- 800cfdc: 4613 mov r3, r2
- 800cfde: 2b00 cmp r3, #0
- 800cfe0: 461c mov r4, r3
- 800cfe2: f2c0 8127 blt.w 800d234 <__gxx_personality_v0+0x430>
- 800cfe6: 2503 movs r5, #3
- 800cfe8: a918 add r1, sp, #96 ; 0x60
- 800cfea: 2300 movs r3, #0
- 800cfec: f841 8d28 str.w r8, [r1, #-40]!
- 800cff0: 461a mov r2, r3
- 800cff2: 9100 str r1, [sp, #0]
- 800cff4: 4638 mov r0, r7
- 800cff6: 4619 mov r1, r3
- 800cff8: f7fa fa5c bl 80074b4 <_Unwind_VRS_Set>
- 800cffc: 2300 movs r3, #0
- 800cffe: 4619 mov r1, r3
- 800d000: 2201 movs r2, #1
- 800d002: f8cd a000 str.w sl, [sp]
- 800d006: 4638 mov r0, r7
- 800d008: 940f str r4, [sp, #60] ; 0x3c
- 800d00a: f7fa fa53 bl 80074b4 <_Unwind_VRS_Set>
- 800d00e: 2300 movs r3, #0
- 800d010: 4619 mov r1, r3
- 800d012: 220f movs r2, #15
- 800d014: f8cd 9000 str.w r9, [sp]
- 800d018: 4638 mov r0, r7
- 800d01a: f7fa fa29 bl 8007470 <_Unwind_VRS_Get>
- 800d01e: 9b10 ldr r3, [sp, #64] ; 0x40
- 800d020: 9a03 ldr r2, [sp, #12]
- 800d022: f8cd 9000 str.w r9, [sp]
- 800d026: f003 0401 and.w r4, r3, #1
- 800d02a: 2300 movs r3, #0
- 800d02c: 4314 orrs r4, r2
- 800d02e: 4638 mov r0, r7
- 800d030: 4619 mov r1, r3
- 800d032: 220f movs r2, #15
- 800d034: 9410 str r4, [sp, #64] ; 0x40
- 800d036: f7fa fa3d bl 80074b4 <_Unwind_VRS_Set>
- 800d03a: 2d02 cmp r5, #2
- 800d03c: d005 beq.n 800d04a <__gxx_personality_v0+0x246>
- 800d03e: 2007 movs r0, #7
- 800d040: b019 add sp, #100 ; 0x64
- 800d042: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
- 800d046: 2400 movs r4, #0
- 800d048: e71c b.n 800ce84 <__gxx_personality_v0+0x80>
- 800d04a: 4640 mov r0, r8
- 800d04c: f7ff fda2 bl 800cb94 <__cxa_begin_cleanup>
- 800d050: 2007 movs r0, #7
- 800d052: e6ef b.n 800ce34 <__gxx_personality_v0+0x30>
- 800d054: 9b04 ldr r3, [sp, #16]
- 800d056: 07d9 lsls r1, r3, #31
- 800d058: f57f af71 bpl.w 800cf3e <__gxx_personality_v0+0x13a>
- 800d05c: f10d 0940 add.w r9, sp, #64 ; 0x40
- 800d060: 2400 movs r4, #0
- 800d062: 9403 str r4, [sp, #12]
- 800d064: 2300 movs r3, #0
- 800d066: 4619 mov r1, r3
- 800d068: 220d movs r2, #13
- 800d06a: f8cd 9000 str.w r9, [sp]
- 800d06e: 4638 mov r0, r7
- 800d070: 9d0c ldr r5, [sp, #48] ; 0x30
- 800d072: f7fa f9fd bl 8007470 <_Unwind_VRS_Get>
- 800d076: 9a05 ldr r2, [sp, #20]
- 800d078: 9b10 ldr r3, [sp, #64] ; 0x40
- 800d07a: f8c8 202c str.w r2, [r8, #44] ; 0x2c
- 800d07e: 9a03 ldr r2, [sp, #12]
- 800d080: f8c8 2030 str.w r2, [r8, #48] ; 0x30
- 800d084: e9c8 5409 strd r5, r4, [r8, #36] ; 0x24
- 800d088: f8c8 3020 str.w r3, [r8, #32]
- 800d08c: 2006 movs r0, #6
- 800d08e: e6d1 b.n 800ce34 <__gxx_personality_v0+0x30>
- 800d090: 9b11 ldr r3, [sp, #68] ; 0x44
- 800d092: 2b00 cmp r3, #0
- 800d094: f43f aec6 beq.w 800ce24 <__gxx_personality_v0+0x20>
- 800d098: 9a13 ldr r2, [sp, #76] ; 0x4c
- 800d09a: 189a adds r2, r3, r2
- 800d09c: 9203 str r2, [sp, #12]
- 800d09e: 2c00 cmp r4, #0
- 800d0a0: f000 80f0 beq.w 800d284 <__gxx_personality_v0+0x480>
- 800d0a4: 9b16 ldr r3, [sp, #88] ; 0x58
- 800d0a6: 3c01 subs r4, #1
- 800d0a8: 4423 add r3, r4
- 800d0aa: 2a00 cmp r2, #0
- 800d0ac: f43f aeba beq.w 800ce24 <__gxx_personality_v0+0x20>
- 800d0b0: 2b00 cmp r3, #0
- 800d0b2: f000 80f8 beq.w 800d2a6 <__gxx_personality_v0+0x4a2>
- 800d0b6: 9a04 ldr r2, [sp, #16]
- 800d0b8: f012 0208 ands.w r2, r2, #8
- 800d0bc: 9209 str r2, [sp, #36] ; 0x24
- 800d0be: f000 8103 beq.w 800d2c8 <__gxx_personality_v0+0x4c4>
- 800d0c2: 2147 movs r1, #71 ; 0x47
- 800d0c4: 224e movs r2, #78 ; 0x4e
- 800d0c6: f888 1000 strb.w r1, [r8]
- 800d0ca: f888 2001 strb.w r2, [r8, #1]
- 800d0ce: 2155 movs r1, #85 ; 0x55
- 800d0d0: 2243 movs r2, #67 ; 0x43
- 800d0d2: f888 1002 strb.w r1, [r8, #2]
- 800d0d6: f888 2003 strb.w r2, [r8, #3]
- 800d0da: 2146 movs r1, #70 ; 0x46
- 800d0dc: 224f movs r2, #79 ; 0x4f
- 800d0de: f888 1004 strb.w r1, [r8, #4]
- 800d0e2: f888 2005 strb.w r2, [r8, #5]
- 800d0e6: 2152 movs r1, #82 ; 0x52
- 800d0e8: 2200 movs r2, #0
- 800d0ea: f888 1006 strb.w r1, [r8, #6]
- 800d0ee: f888 2007 strb.w r2, [r8, #7]
- 800d0f2: e9cd 7a0a strd r7, sl, [sp, #40] ; 0x28
- 800d0f6: 2200 movs r2, #0
- 800d0f8: 9207 str r2, [sp, #28]
- 800d0fa: f8cd 9020 str.w r9, [sp, #32]
- 800d0fe: 2400 movs r4, #0
- 800d100: 4621 mov r1, r4
- 800d102: e000 b.n 800d106 <__gxx_personality_v0+0x302>
- 800d104: 462b mov r3, r5
- 800d106: 461d mov r5, r3
- 800d108: f815 0b01 ldrb.w r0, [r5], #1
- 800d10c: f000 027f and.w r2, r0, #127 ; 0x7f
- 800d110: 408a lsls r2, r1
- 800d112: 0606 lsls r6, r0, #24
- 800d114: ea44 0402 orr.w r4, r4, r2
- 800d118: f101 0107 add.w r1, r1, #7
- 800d11c: d4f2 bmi.n 800d104 <__gxx_personality_v0+0x300>
- 800d11e: 291f cmp r1, #31
- 800d120: d805 bhi.n 800d12e <__gxx_personality_v0+0x32a>
- 800d122: 0640 lsls r0, r0, #25
- 800d124: d503 bpl.n 800d12e <__gxx_personality_v0+0x32a>
- 800d126: 2201 movs r2, #1
- 800d128: 408a lsls r2, r1
- 800d12a: 4252 negs r2, r2
- 800d12c: 4314 orrs r4, r2
- 800d12e: 2600 movs r6, #0
- 800d130: 4631 mov r1, r6
- 800d132: 46a1 mov r9, r4
- 800d134: f813 0f01 ldrb.w r0, [r3, #1]!
- 800d138: f000 027f and.w r2, r0, #127 ; 0x7f
- 800d13c: 408a lsls r2, r1
- 800d13e: 4316 orrs r6, r2
- 800d140: 0602 lsls r2, r0, #24
- 800d142: f101 0107 add.w r1, r1, #7
- 800d146: d4f5 bmi.n 800d134 <__gxx_personality_v0+0x330>
- 800d148: 291f cmp r1, #31
- 800d14a: d805 bhi.n 800d158 <__gxx_personality_v0+0x354>
- 800d14c: 0647 lsls r7, r0, #25
- 800d14e: d503 bpl.n 800d158 <__gxx_personality_v0+0x354>
- 800d150: 2301 movs r3, #1
- 800d152: 408b lsls r3, r1
- 800d154: 425b negs r3, r3
- 800d156: 431e orrs r6, r3
- 800d158: 2c00 cmp r4, #0
- 800d15a: d04c beq.n 800d1f6 <__gxx_personality_v0+0x3f2>
- 800d15c: dc4e bgt.n 800d1fc <__gxx_personality_v0+0x3f8>
- 800d15e: f104 0a01 add.w sl, r4, #1
- 800d162: ebca 728a rsb r2, sl, sl, lsl #30
- 800d166: 9b15 ldr r3, [sp, #84] ; 0x54
- 800d168: eb03 0782 add.w r7, r3, r2, lsl #2
- 800d16c: f853 1022 ldr.w r1, [r3, r2, lsl #2]
- 800d170: f1b8 0f00 cmp.w r8, #0
- 800d174: d001 beq.n 800d17a <__gxx_personality_v0+0x376>
- 800d176: 9b09 ldr r3, [sp, #36] ; 0x24
- 800d178: b12b cbz r3, 800d186 <__gxx_personality_v0+0x382>
- 800d17a: b351 cbz r1, 800d1d2 <__gxx_personality_v0+0x3ce>
- 800d17c: 2e00 cmp r6, #0
- 800d17e: f000 808b beq.w 800d298 <__gxx_personality_v0+0x494>
- 800d182: 19ab adds r3, r5, r6
- 800d184: e7bb b.n 800d0fe <__gxx_personality_v0+0x2fa>
- 800d186: 9b0c ldr r3, [sp, #48] ; 0x30
- 800d188: 9311 str r3, [sp, #68] ; 0x44
- 800d18a: b929 cbnz r1, 800d198 <__gxx_personality_v0+0x394>
- 800d18c: e091 b.n 800d2b2 <__gxx_personality_v0+0x4ae>
- 800d18e: f857 1f04 ldr.w r1, [r7, #4]!
- 800d192: 2900 cmp r1, #0
- 800d194: f000 808d beq.w 800d2b2 <__gxx_personality_v0+0x4ae>
- 800d198: 4439 add r1, r7
- 800d19a: 465b mov r3, fp
- 800d19c: 2200 movs r2, #0
- 800d19e: 4640 mov r0, r8
- 800d1a0: f7ff fca0 bl 800cae4 <__cxa_type_match>
- 800d1a4: 2800 cmp r0, #0
- 800d1a6: d0f2 beq.n 800d18e <__gxx_personality_v0+0x38a>
- 800d1a8: e7e8 b.n 800d17c <__gxx_personality_v0+0x378>
- 800d1aa: 00e2 lsls r2, r4, #3
- 800d1ac: 4252 negs r2, r2
- 800d1ae: e9dd 1314 ldrd r1, r3, [sp, #80] ; 0x50
- 800d1b2: 441a add r2, r3
- 800d1b4: 9b08 ldr r3, [sp, #32]
- 800d1b6: f7ff fd5f bl 800cc78 <_ZL28read_encoded_value_with_basehjPKhPj>
- 800d1ba: 9910 ldr r1, [sp, #64] ; 0x40
- 800d1bc: b149 cbz r1, 800d1d2 <__gxx_personality_v0+0x3ce>
- 800d1be: f1b8 0f00 cmp.w r8, #0
- 800d1c2: d0db beq.n 800d17c <__gxx_personality_v0+0x378>
- 800d1c4: ab0c add r3, sp, #48 ; 0x30
- 800d1c6: 2200 movs r2, #0
- 800d1c8: 4640 mov r0, r8
- 800d1ca: f7ff fc8b bl 800cae4 <__cxa_type_match>
- 800d1ce: 2800 cmp r0, #0
- 800d1d0: d0d4 beq.n 800d17c <__gxx_personality_v0+0x378>
- 800d1d2: 9b04 ldr r3, [sp, #16]
- 800d1d4: 07d8 lsls r0, r3, #31
- 800d1d6: 464a mov r2, r9
- 800d1d8: e9dd 7a0a ldrd r7, sl, [sp, #40] ; 0x28
- 800d1dc: f8dd 9020 ldr.w r9, [sp, #32]
- 800d1e0: f53f af40 bmi.w 800d064 <__gxx_personality_v0+0x260>
- 800d1e4: 9b09 ldr r3, [sp, #36] ; 0x24
- 800d1e6: 2b00 cmp r3, #0
- 800d1e8: f43f aef8 beq.w 800cfdc <__gxx_personality_v0+0x1d8>
- 800d1ec: 2c00 cmp r4, #0
- 800d1ee: f6bf aefa bge.w 800cfe6 <__gxx_personality_v0+0x1e2>
- 800d1f2: f7ff fbbb bl 800c96c <_ZSt10unexpectedv>
- 800d1f6: 2301 movs r3, #1
- 800d1f8: 9307 str r3, [sp, #28]
- 800d1fa: e7bf b.n 800d17c <__gxx_personality_v0+0x378>
- 800d1fc: f89d 005c ldrb.w r0, [sp, #92] ; 0x5c
- 800d200: 28ff cmp r0, #255 ; 0xff
- 800d202: d03b beq.n 800d27c <__gxx_personality_v0+0x478>
- 800d204: f000 0307 and.w r3, r0, #7
- 800d208: 2b04 cmp r3, #4
- 800d20a: d86a bhi.n 800d2e2 <__gxx_personality_v0+0x4de>
- 800d20c: a201 add r2, pc, #4 ; (adr r2, 800d214 <__gxx_personality_v0+0x410>)
- 800d20e: f852 f023 ldr.w pc, [r2, r3, lsl #2]
- 800d212: bf00 nop
- 800d214: 0800d22f .word 0x0800d22f
- 800d218: 0800d2e3 .word 0x0800d2e3
- 800d21c: 0800d229 .word 0x0800d229
- 800d220: 0800d22f .word 0x0800d22f
- 800d224: 0800d1ab .word 0x0800d1ab
- 800d228: 0062 lsls r2, r4, #1
- 800d22a: 4252 negs r2, r2
- 800d22c: e7bf b.n 800d1ae <__gxx_personality_v0+0x3aa>
- 800d22e: 00a2 lsls r2, r4, #2
- 800d230: 4252 negs r2, r2
- 800d232: e7bc b.n 800d1ae <__gxx_personality_v0+0x3aa>
- 800d234: 3301 adds r3, #1
- 800d236: 461d mov r5, r3
- 800d238: e9dd 1205 ldrd r1, r2, [sp, #20]
- 800d23c: 4638 mov r0, r7
- 800d23e: f7ff fd97 bl 800cd70 <_ZL17parse_lsda_headerP15_Unwind_ContextPKhP16lsda_header_info>
- 800d242: f89d 005c ldrb.w r0, [sp, #92] ; 0x5c
- 800d246: 28ff cmp r0, #255 ; 0xff
- 800d248: d01a beq.n 800d280 <__gxx_personality_v0+0x47c>
- 800d24a: 4639 mov r1, r7
- 800d24c: f7ff fd74 bl 800cd38 <_ZL21base_of_encoded_valuehP15_Unwind_Context.part.3>
- 800d250: ebc5 7285 rsb r2, r5, r5, lsl #30
- 800d254: 0092 lsls r2, r2, #2
- 800d256: 9d15 ldr r5, [sp, #84] ; 0x54
- 800d258: 9014 str r0, [sp, #80] ; 0x50
- 800d25a: 58ab ldr r3, [r5, r2]
- 800d25c: 4415 add r5, r2
- 800d25e: b133 cbz r3, 800d26e <__gxx_personality_v0+0x46a>
- 800d260: 462a mov r2, r5
- 800d262: 2300 movs r3, #0
- 800d264: f852 1f04 ldr.w r1, [r2, #4]!
- 800d268: 3301 adds r3, #1
- 800d26a: 2900 cmp r1, #0
- 800d26c: d1fa bne.n 800d264 <__gxx_personality_v0+0x460>
- 800d26e: 2204 movs r2, #4
- 800d270: e9c8 250c strd r2, r5, [r8, #48] ; 0x30
- 800d274: e9c8 300a strd r3, r0, [r8, #40] ; 0x28
- 800d278: 2503 movs r5, #3
- 800d27a: e6b5 b.n 800cfe8 <__gxx_personality_v0+0x1e4>
- 800d27c: 2200 movs r2, #0
- 800d27e: e796 b.n 800d1ae <__gxx_personality_v0+0x3aa>
- 800d280: 2000 movs r0, #0
- 800d282: e7e5 b.n 800d250 <__gxx_personality_v0+0x44c>
- 800d284: 9b03 ldr r3, [sp, #12]
- 800d286: 2b00 cmp r3, #0
- 800d288: f43f adcc beq.w 800ce24 <__gxx_personality_v0+0x20>
- 800d28c: 9b04 ldr r3, [sp, #16]
- 800d28e: 07da lsls r2, r3, #31
- 800d290: f53f adc8 bmi.w 800ce24 <__gxx_personality_v0+0x20>
- 800d294: 2502 movs r5, #2
- 800d296: e6a7 b.n 800cfe8 <__gxx_personality_v0+0x1e4>
- 800d298: e9dd 3907 ldrd r3, r9, [sp, #28]
- 800d29c: e9dd 7a0a ldrd r7, sl, [sp, #40] ; 0x28
- 800d2a0: 2b00 cmp r3, #0
- 800d2a2: f43f adbf beq.w 800ce24 <__gxx_personality_v0+0x20>
- 800d2a6: 9b04 ldr r3, [sp, #16]
- 800d2a8: 07dd lsls r5, r3, #31
- 800d2aa: f53f adbb bmi.w 800ce24 <__gxx_personality_v0+0x20>
- 800d2ae: 2400 movs r4, #0
- 800d2b0: e7f0 b.n 800d294 <__gxx_personality_v0+0x490>
- 800d2b2: 9b04 ldr r3, [sp, #16]
- 800d2b4: 9f0a ldr r7, [sp, #40] ; 0x28
- 800d2b6: f8dd 9020 ldr.w r9, [sp, #32]
- 800d2ba: 07de lsls r6, r3, #31
- 800d2bc: 4655 mov r5, sl
- 800d2be: f8dd a02c ldr.w sl, [sp, #44] ; 0x2c
- 800d2c2: f53f aecf bmi.w 800d064 <__gxx_personality_v0+0x260>
- 800d2c6: e7b7 b.n 800d238 <__gxx_personality_v0+0x434>
- 800d2c8: f898 2007 ldrb.w r2, [r8, #7]
- 800d2cc: 2a01 cmp r2, #1
- 800d2ce: bf0c ite eq
- 800d2d0: f858 2c20 ldreq.w r2, [r8, #-32]
- 800d2d4: f108 0258 addne.w r2, r8, #88 ; 0x58
- 800d2d8: 920c str r2, [sp, #48] ; 0x30
- 800d2da: e70a b.n 800d0f2 <__gxx_personality_v0+0x2ee>
- 800d2dc: f000 f8a6 bl 800d42c <__cxa_begin_catch>
- 800d2e0: e630 b.n 800cf44 <__gxx_personality_v0+0x140>
- 800d2e2: f000 fba9 bl 800da38 <abort>
- 800d2e6: bf00 nop
-
-0800d2e8 <_ZL23__gxx_exception_cleanup19_Unwind_Reason_CodeP21_Unwind_Control_Block>:
- 800d2e8: 2801 cmp r0, #1
- 800d2ea: b510 push {r4, lr}
- 800d2ec: d81a bhi.n 800d324 <_ZL23__gxx_exception_cleanup19_Unwind_Reason_CodeP21_Unwind_Control_Block+0x3c>
- 800d2ee: f3bf 8f5b dmb ish
- 800d2f2: f1a1 0328 sub.w r3, r1, #40 ; 0x28
- 800d2f6: e853 2f00 ldrex r2, [r3]
- 800d2fa: 3a01 subs r2, #1
- 800d2fc: e843 2000 strex r0, r2, [r3]
- 800d300: 2800 cmp r0, #0
- 800d302: d1f8 bne.n 800d2f6 <_ZL23__gxx_exception_cleanup19_Unwind_Reason_CodeP21_Unwind_Control_Block+0xe>
- 800d304: f3bf 8f5b dmb ish
- 800d308: b95a cbnz r2, 800d322 <_ZL23__gxx_exception_cleanup19_Unwind_Reason_CodeP21_Unwind_Control_Block+0x3a>
- 800d30a: f851 3c1c ldr.w r3, [r1, #-28]
- 800d30e: f101 0458 add.w r4, r1, #88 ; 0x58
- 800d312: b10b cbz r3, 800d318 <_ZL23__gxx_exception_cleanup19_Unwind_Reason_CodeP21_Unwind_Control_Block+0x30>
- 800d314: 4620 mov r0, r4
- 800d316: 4798 blx r3
- 800d318: 4620 mov r0, r4
- 800d31a: e8bd 4010 ldmia.w sp!, {r4, lr}
- 800d31e: f000 b99b b.w 800d658 <__cxa_free_exception>
- 800d322: bd10 pop {r4, pc}
- 800d324: f851 0c14 ldr.w r0, [r1, #-20]
- 800d328: f7ff fafe bl 800c928 <_ZN10__cxxabiv111__terminateEPFvvE>
-
-0800d32c <__cxa_init_primary_exception>:
- 800d32c: b5f8 push {r3, r4, r5, r6, r7, lr}
- 800d32e: 2500 movs r5, #0
- 800d330: e940 121e strd r1, r2, [r0, #-120] ; 0x78
- 800d334: f840 5c80 str.w r5, [r0, #-128]
- 800d338: 4604 mov r4, r0
- 800d33a: f7ff fb29 bl 800c990 <_ZSt14get_unexpectedv>
- 800d33e: f844 0c70 str.w r0, [r4, #-112]
- 800d342: f7ff fb1d bl 800c980 <_ZSt13get_terminatev>
- 800d346: 2347 movs r3, #71 ; 0x47
- 800d348: 2243 movs r2, #67 ; 0x43
- 800d34a: 274e movs r7, #78 ; 0x4e
- 800d34c: 2655 movs r6, #85 ; 0x55
- 800d34e: 490c ldr r1, [pc, #48] ; (800d380 <__cxa_init_primary_exception+0x54>)
- 800d350: f804 3c58 strb.w r3, [r4, #-88]
- 800d354: 232b movs r3, #43 ; 0x2b
- 800d356: f804 5c51 strb.w r5, [r4, #-81]
- 800d35a: f804 7c57 strb.w r7, [r4, #-87]
- 800d35e: f804 6c56 strb.w r6, [r4, #-86]
- 800d362: f844 1c50 str.w r1, [r4, #-80]
- 800d366: f804 2c55 strb.w r2, [r4, #-85]
- 800d36a: f804 2c54 strb.w r2, [r4, #-84]
- 800d36e: f804 3c53 strb.w r3, [r4, #-83]
- 800d372: f804 3c52 strb.w r3, [r4, #-82]
- 800d376: f844 0c6c str.w r0, [r4, #-108]
- 800d37a: f1a4 0080 sub.w r0, r4, #128 ; 0x80
- 800d37e: bdf8 pop {r3, r4, r5, r6, r7, pc}
- 800d380: 0800d2e9 .word 0x0800d2e9
-
-0800d384 <__cxa_throw>:
- 800d384: b5f8 push {r3, r4, r5, r6, r7, lr}
- 800d386: 4605 mov r5, r0
- 800d388: 460e mov r6, r1
- 800d38a: 4617 mov r7, r2
- 800d38c: f7ff fc70 bl 800cc70 <__cxa_get_globals>
- 800d390: 6843 ldr r3, [r0, #4]
- 800d392: 4604 mov r4, r0
- 800d394: 3301 adds r3, #1
- 800d396: 463a mov r2, r7
- 800d398: 4631 mov r1, r6
- 800d39a: 6063 str r3, [r4, #4]
- 800d39c: 4628 mov r0, r5
- 800d39e: f7ff ffc5 bl 800d32c <__cxa_init_primary_exception>
- 800d3a2: 4604 mov r4, r0
- 800d3a4: 2301 movs r3, #1
- 800d3a6: f844 3b28 str.w r3, [r4], #40
- 800d3aa: 4620 mov r0, r4
- 800d3ac: f7fa fc0a bl 8007bc4 <_Unwind_RaiseException>
- 800d3b0: 4620 mov r0, r4
- 800d3b2: f000 f83b bl 800d42c <__cxa_begin_catch>
- 800d3b6: f7ff facb bl 800c950 <_ZSt9terminatev>
- 800d3ba: bf00 nop
-
-0800d3bc <__cxa_rethrow>:
- 800d3bc: b510 push {r4, lr}
- 800d3be: f7ff fc57 bl 800cc70 <__cxa_get_globals>
- 800d3c2: e9d0 4200 ldrd r4, r2, [r0]
- 800d3c6: 3201 adds r2, #1
- 800d3c8: 6042 str r2, [r0, #4]
- 800d3ca: b164 cbz r4, 800d3e6 <__cxa_rethrow+0x2a>
- 800d3cc: f894 2020 ldrb.w r2, [r4, #32]
- 800d3d0: 2a47 cmp r2, #71 ; 0x47
- 800d3d2: d00a beq.n 800d3ea <__cxa_rethrow+0x2e>
- 800d3d4: 2200 movs r2, #0
- 800d3d6: 6002 str r2, [r0, #0]
- 800d3d8: 3420 adds r4, #32
- 800d3da: 4620 mov r0, r4
- 800d3dc: f7fa fc16 bl 8007c0c <_Unwind_Resume_or_Rethrow>
- 800d3e0: 4620 mov r0, r4
- 800d3e2: f000 f823 bl 800d42c <__cxa_begin_catch>
- 800d3e6: f7ff fab3 bl 800c950 <_ZSt9terminatev>
- 800d3ea: f894 2021 ldrb.w r2, [r4, #33] ; 0x21
- 800d3ee: 2a4e cmp r2, #78 ; 0x4e
- 800d3f0: d1f0 bne.n 800d3d4 <__cxa_rethrow+0x18>
- 800d3f2: f894 2022 ldrb.w r2, [r4, #34] ; 0x22
- 800d3f6: 2a55 cmp r2, #85 ; 0x55
- 800d3f8: d1ec bne.n 800d3d4 <__cxa_rethrow+0x18>
- 800d3fa: f894 2023 ldrb.w r2, [r4, #35] ; 0x23
- 800d3fe: 2a43 cmp r2, #67 ; 0x43
- 800d400: d1e8 bne.n 800d3d4 <__cxa_rethrow+0x18>
- 800d402: f894 2024 ldrb.w r2, [r4, #36] ; 0x24
- 800d406: 2a43 cmp r2, #67 ; 0x43
- 800d408: d1e4 bne.n 800d3d4 <__cxa_rethrow+0x18>
- 800d40a: f894 2025 ldrb.w r2, [r4, #37] ; 0x25
- 800d40e: 2a2b cmp r2, #43 ; 0x2b
- 800d410: d1e0 bne.n 800d3d4 <__cxa_rethrow+0x18>
- 800d412: f894 2026 ldrb.w r2, [r4, #38] ; 0x26
- 800d416: 2a2b cmp r2, #43 ; 0x2b
- 800d418: d1dc bne.n 800d3d4 <__cxa_rethrow+0x18>
- 800d41a: f894 2027 ldrb.w r2, [r4, #39] ; 0x27
- 800d41e: 2a01 cmp r2, #1
- 800d420: d8d8 bhi.n 800d3d4 <__cxa_rethrow+0x18>
- 800d422: 6962 ldr r2, [r4, #20]
- 800d424: 4252 negs r2, r2
- 800d426: 6162 str r2, [r4, #20]
- 800d428: e7d6 b.n 800d3d8 <__cxa_rethrow+0x1c>
- 800d42a: bf00 nop
-
-0800d42c <__cxa_begin_catch>:
- 800d42c: b538 push {r3, r4, r5, lr}
- 800d42e: 4604 mov r4, r0
- 800d430: f7ff fc1e bl 800cc70 <__cxa_get_globals>
- 800d434: 7822 ldrb r2, [r4, #0]
- 800d436: 6803 ldr r3, [r0, #0]
- 800d438: 2a47 cmp r2, #71 ; 0x47
- 800d43a: f1a4 0120 sub.w r1, r4, #32
- 800d43e: d004 beq.n 800d44a <__cxa_begin_catch+0x1e>
- 800d440: bb8b cbnz r3, 800d4a6 <__cxa_begin_catch+0x7a>
- 800d442: 461c mov r4, r3
- 800d444: 6001 str r1, [r0, #0]
- 800d446: 4620 mov r0, r4
- 800d448: bd38 pop {r3, r4, r5, pc}
- 800d44a: 7862 ldrb r2, [r4, #1]
- 800d44c: 2a4e cmp r2, #78 ; 0x4e
- 800d44e: d1f7 bne.n 800d440 <__cxa_begin_catch+0x14>
- 800d450: 78a2 ldrb r2, [r4, #2]
- 800d452: 2a55 cmp r2, #85 ; 0x55
- 800d454: d1f4 bne.n 800d440 <__cxa_begin_catch+0x14>
- 800d456: 78e2 ldrb r2, [r4, #3]
- 800d458: 2a43 cmp r2, #67 ; 0x43
- 800d45a: d1f1 bne.n 800d440 <__cxa_begin_catch+0x14>
- 800d45c: 7922 ldrb r2, [r4, #4]
- 800d45e: 2a43 cmp r2, #67 ; 0x43
- 800d460: d1ee bne.n 800d440 <__cxa_begin_catch+0x14>
- 800d462: 7962 ldrb r2, [r4, #5]
- 800d464: 2a2b cmp r2, #43 ; 0x2b
- 800d466: d1eb bne.n 800d440 <__cxa_begin_catch+0x14>
- 800d468: 79a2 ldrb r2, [r4, #6]
- 800d46a: 2a2b cmp r2, #43 ; 0x2b
- 800d46c: d1e8 bne.n 800d440 <__cxa_begin_catch+0x14>
- 800d46e: 79e2 ldrb r2, [r4, #7]
- 800d470: 2a01 cmp r2, #1
- 800d472: d8e5 bhi.n 800d440 <__cxa_begin_catch+0x14>
- 800d474: f854 2c0c ldr.w r2, [r4, #-12]
- 800d478: 2a00 cmp r2, #0
- 800d47a: db11 blt.n 800d4a0 <__cxa_begin_catch+0x74>
- 800d47c: 3201 adds r2, #1
- 800d47e: 6845 ldr r5, [r0, #4]
- 800d480: f844 2c0c str.w r2, [r4, #-12]
- 800d484: 428b cmp r3, r1
- 800d486: f105 35ff add.w r5, r5, #4294967295 ; 0xffffffff
- 800d48a: 6045 str r5, [r0, #4]
- 800d48c: bf1c itt ne
- 800d48e: f844 3c10 strne.w r3, [r4, #-16]
- 800d492: 6001 strne r1, [r0, #0]
- 800d494: 4620 mov r0, r4
- 800d496: 6a64 ldr r4, [r4, #36] ; 0x24
- 800d498: f7f9 ffe2 bl 8007460 <_Unwind_Complete>
- 800d49c: 4620 mov r0, r4
- 800d49e: bd38 pop {r3, r4, r5, pc}
- 800d4a0: f1c2 0201 rsb r2, r2, #1
- 800d4a4: e7eb b.n 800d47e <__cxa_begin_catch+0x52>
- 800d4a6: f7ff fa53 bl 800c950 <_ZSt9terminatev>
- 800d4aa: bf00 nop
-
-0800d4ac <__cxa_end_catch>:
- 800d4ac: b508 push {r3, lr}
- 800d4ae: f7ff fbdb bl 800cc68 <__cxa_get_globals_fast>
- 800d4b2: 4602 mov r2, r0
- 800d4b4: 6800 ldr r0, [r0, #0]
- 800d4b6: b370 cbz r0, 800d516 <__cxa_end_catch+0x6a>
- 800d4b8: f890 3020 ldrb.w r3, [r0, #32]
- 800d4bc: 2b47 cmp r3, #71 ; 0x47
- 800d4be: d006 beq.n 800d4ce <__cxa_end_catch+0x22>
- 800d4c0: 2300 movs r3, #0
- 800d4c2: 6013 str r3, [r2, #0]
- 800d4c4: 3020 adds r0, #32
- 800d4c6: e8bd 4008 ldmia.w sp!, {r3, lr}
- 800d4ca: f7f9 bfcb b.w 8007464 <_Unwind_DeleteException>
- 800d4ce: f890 3021 ldrb.w r3, [r0, #33] ; 0x21
- 800d4d2: 2b4e cmp r3, #78 ; 0x4e
- 800d4d4: d1f4 bne.n 800d4c0 <__cxa_end_catch+0x14>
- 800d4d6: f890 3022 ldrb.w r3, [r0, #34] ; 0x22
- 800d4da: 2b55 cmp r3, #85 ; 0x55
- 800d4dc: d1f0 bne.n 800d4c0 <__cxa_end_catch+0x14>
- 800d4de: f890 3023 ldrb.w r3, [r0, #35] ; 0x23
- 800d4e2: 2b43 cmp r3, #67 ; 0x43
- 800d4e4: d1ec bne.n 800d4c0 <__cxa_end_catch+0x14>
- 800d4e6: f890 3024 ldrb.w r3, [r0, #36] ; 0x24
- 800d4ea: 2b43 cmp r3, #67 ; 0x43
- 800d4ec: d1e8 bne.n 800d4c0 <__cxa_end_catch+0x14>
- 800d4ee: f890 3025 ldrb.w r3, [r0, #37] ; 0x25
- 800d4f2: 2b2b cmp r3, #43 ; 0x2b
- 800d4f4: d1e4 bne.n 800d4c0 <__cxa_end_catch+0x14>
- 800d4f6: f890 3026 ldrb.w r3, [r0, #38] ; 0x26
- 800d4fa: 2b2b cmp r3, #43 ; 0x2b
- 800d4fc: d1e0 bne.n 800d4c0 <__cxa_end_catch+0x14>
- 800d4fe: f890 3027 ldrb.w r3, [r0, #39] ; 0x27
- 800d502: 2b01 cmp r3, #1
- 800d504: d8dc bhi.n 800d4c0 <__cxa_end_catch+0x14>
- 800d506: 6943 ldr r3, [r0, #20]
- 800d508: 2b00 cmp r3, #0
- 800d50a: db05 blt.n 800d518 <__cxa_end_catch+0x6c>
- 800d50c: 3b01 subs r3, #1
- 800d50e: 2b00 cmp r3, #0
- 800d510: d007 beq.n 800d522 <__cxa_end_catch+0x76>
- 800d512: db0d blt.n 800d530 <__cxa_end_catch+0x84>
- 800d514: 6143 str r3, [r0, #20]
- 800d516: bd08 pop {r3, pc}
- 800d518: 3301 adds r3, #1
- 800d51a: d1fb bne.n 800d514 <__cxa_end_catch+0x68>
- 800d51c: 6901 ldr r1, [r0, #16]
- 800d51e: 6011 str r1, [r2, #0]
- 800d520: e7f8 b.n 800d514 <__cxa_end_catch+0x68>
- 800d522: 6903 ldr r3, [r0, #16]
- 800d524: 6013 str r3, [r2, #0]
- 800d526: 3020 adds r0, #32
- 800d528: e8bd 4008 ldmia.w sp!, {r3, lr}
- 800d52c: f7f9 bf9a b.w 8007464 <_Unwind_DeleteException>
- 800d530: f7ff fa0e bl 800c950 <_ZSt9terminatev>
-
-0800d534 <_ZN12_GLOBAL__N_14pool4freeEPv.constprop.4>:
- 800d534: b4f0 push {r4, r5, r6, r7}
- 800d536: 4c22 ldr r4, [pc, #136] ; (800d5c0 <_ZN12_GLOBAL__N_14pool4freeEPv.constprop.4+0x8c>)
- 800d538: 6863 ldr r3, [r4, #4]
- 800d53a: f1a0 0608 sub.w r6, r0, #8
- 800d53e: b31b cbz r3, 800d588 <_ZN12_GLOBAL__N_14pool4freeEPv.constprop.4+0x54>
- 800d540: f850 7c08 ldr.w r7, [r0, #-8]
- 800d544: 19f5 adds r5, r6, r7
- 800d546: 42ab cmp r3, r5
- 800d548: d81e bhi.n 800d588 <_ZN12_GLOBAL__N_14pool4freeEPv.constprop.4+0x54>
- 800d54a: d022 beq.n 800d592 <_ZN12_GLOBAL__N_14pool4freeEPv.constprop.4+0x5e>
- 800d54c: 6859 ldr r1, [r3, #4]
- 800d54e: 2900 cmp r1, #0
- 800d550: d031 beq.n 800d5b6 <_ZN12_GLOBAL__N_14pool4freeEPv.constprop.4+0x82>
- 800d552: 428d cmp r5, r1
- 800d554: d303 bcc.n 800d55e <_ZN12_GLOBAL__N_14pool4freeEPv.constprop.4+0x2a>
- 800d556: e02e b.n 800d5b6 <_ZN12_GLOBAL__N_14pool4freeEPv.constprop.4+0x82>
- 800d558: 4295 cmp r5, r2
- 800d55a: d205 bcs.n 800d568 <_ZN12_GLOBAL__N_14pool4freeEPv.constprop.4+0x34>
- 800d55c: 4611 mov r1, r2
- 800d55e: 684a ldr r2, [r1, #4]
- 800d560: 1d1c adds r4, r3, #4
- 800d562: 460b mov r3, r1
- 800d564: 2a00 cmp r2, #0
- 800d566: d1f7 bne.n 800d558 <_ZN12_GLOBAL__N_14pool4freeEPv.constprop.4+0x24>
- 800d568: 4295 cmp r5, r2
- 800d56a: d01c beq.n 800d5a6 <_ZN12_GLOBAL__N_14pool4freeEPv.constprop.4+0x72>
- 800d56c: 6823 ldr r3, [r4, #0]
- 800d56e: 681a ldr r2, [r3, #0]
- 800d570: 1899 adds r1, r3, r2
- 800d572: 428e cmp r6, r1
- 800d574: d01c beq.n 800d5b0 <_ZN12_GLOBAL__N_14pool4freeEPv.constprop.4+0x7c>
- 800d576: 685b ldr r3, [r3, #4]
- 800d578: f840 3c04 str.w r3, [r0, #-4]
- 800d57c: 6823 ldr r3, [r4, #0]
- 800d57e: f840 7c08 str.w r7, [r0, #-8]
- 800d582: 605e str r6, [r3, #4]
- 800d584: bcf0 pop {r4, r5, r6, r7}
- 800d586: 4770 bx lr
- 800d588: f840 3c04 str.w r3, [r0, #-4]
- 800d58c: 6066 str r6, [r4, #4]
- 800d58e: bcf0 pop {r4, r5, r6, r7}
- 800d590: 4770 bx lr
- 800d592: e9d3 2300 ldrd r2, r3, [r3]
- 800d596: 4417 add r7, r2
- 800d598: f840 7c08 str.w r7, [r0, #-8]
- 800d59c: f840 3c04 str.w r3, [r0, #-4]
- 800d5a0: 6066 str r6, [r4, #4]
- 800d5a2: bcf0 pop {r4, r5, r6, r7}
- 800d5a4: 4770 bx lr
- 800d5a6: e9d5 3200 ldrd r3, r2, [r5]
- 800d5aa: 604a str r2, [r1, #4]
- 800d5ac: 441f add r7, r3
- 800d5ae: e7dd b.n 800d56c <_ZN12_GLOBAL__N_14pool4freeEPv.constprop.4+0x38>
- 800d5b0: 4417 add r7, r2
- 800d5b2: 601f str r7, [r3, #0]
- 800d5b4: e7eb b.n 800d58e <_ZN12_GLOBAL__N_14pool4freeEPv.constprop.4+0x5a>
- 800d5b6: 460a mov r2, r1
- 800d5b8: 3404 adds r4, #4
- 800d5ba: 4619 mov r1, r3
- 800d5bc: e7d4 b.n 800d568 <_ZN12_GLOBAL__N_14pool4freeEPv.constprop.4+0x34>
- 800d5be: bf00 nop
- 800d5c0: 20000ab0 .word 0x20000ab0
-
-0800d5c4 <_ZN12_GLOBAL__N_14pool8allocateEj.constprop.5>:
- 800d5c4: b430 push {r4, r5}
- 800d5c6: 4c17 ldr r4, [pc, #92] ; (800d624 <_ZN12_GLOBAL__N_14pool8allocateEj.constprop.5+0x60>)
- 800d5c8: f100 0208 add.w r2, r0, #8
- 800d5cc: 6863 ldr r3, [r4, #4]
- 800d5ce: 2a08 cmp r2, #8
- 800d5d0: bf38 it cc
- 800d5d2: 2208 movcc r2, #8
- 800d5d4: b303 cbz r3, 800d618 <_ZN12_GLOBAL__N_14pool8allocateEj.constprop.5+0x54>
- 800d5d6: 3207 adds r2, #7
- 800d5d8: 6819 ldr r1, [r3, #0]
- 800d5da: f022 0207 bic.w r2, r2, #7
- 800d5de: 428a cmp r2, r1
- 800d5e0: d804 bhi.n 800d5ec <_ZN12_GLOBAL__N_14pool8allocateEj.constprop.5+0x28>
- 800d5e2: e01b b.n 800d61c <_ZN12_GLOBAL__N_14pool8allocateEj.constprop.5+0x58>
- 800d5e4: 6801 ldr r1, [r0, #0]
- 800d5e6: 428a cmp r2, r1
- 800d5e8: d905 bls.n 800d5f6 <_ZN12_GLOBAL__N_14pool8allocateEj.constprop.5+0x32>
- 800d5ea: 4603 mov r3, r0
- 800d5ec: 6858 ldr r0, [r3, #4]
- 800d5ee: 2800 cmp r0, #0
- 800d5f0: d1f8 bne.n 800d5e4 <_ZN12_GLOBAL__N_14pool8allocateEj.constprop.5+0x20>
- 800d5f2: bc30 pop {r4, r5}
- 800d5f4: 4770 bx lr
- 800d5f6: 3304 adds r3, #4
- 800d5f8: 1a8c subs r4, r1, r2
- 800d5fa: 2c07 cmp r4, #7
- 800d5fc: 6845 ldr r5, [r0, #4]
- 800d5fe: d908 bls.n 800d612 <_ZN12_GLOBAL__N_14pool8allocateEj.constprop.5+0x4e>
- 800d600: 1881 adds r1, r0, r2
- 800d602: 604d str r5, [r1, #4]
- 800d604: 5084 str r4, [r0, r2]
- 800d606: 6818 ldr r0, [r3, #0]
- 800d608: 6002 str r2, [r0, #0]
- 800d60a: 6019 str r1, [r3, #0]
- 800d60c: 3008 adds r0, #8
- 800d60e: bc30 pop {r4, r5}
- 800d610: 4770 bx lr
- 800d612: 6001 str r1, [r0, #0]
- 800d614: 601d str r5, [r3, #0]
- 800d616: e7f9 b.n 800d60c <_ZN12_GLOBAL__N_14pool8allocateEj.constprop.5+0x48>
- 800d618: 4618 mov r0, r3
- 800d61a: e7ea b.n 800d5f2 <_ZN12_GLOBAL__N_14pool8allocateEj.constprop.5+0x2e>
- 800d61c: 4618 mov r0, r3
- 800d61e: 1d23 adds r3, r4, #4
- 800d620: e7ea b.n 800d5f8 <_ZN12_GLOBAL__N_14pool8allocateEj.constprop.5+0x34>
- 800d622: bf00 nop
- 800d624: 20000ab0 .word 0x20000ab0
-
-0800d628 <__cxa_allocate_exception>:
- 800d628: b510 push {r4, lr}
- 800d62a: f100 0480 add.w r4, r0, #128 ; 0x80
- 800d62e: 4620 mov r0, r4
- 800d630: f000 fc4c bl 800decc <malloc>
- 800d634: b138 cbz r0, 800d646 <__cxa_allocate_exception+0x1e>
- 800d636: 4603 mov r3, r0
- 800d638: 2280 movs r2, #128 ; 0x80
- 800d63a: 2100 movs r1, #0
- 800d63c: 4618 mov r0, r3
- 800d63e: f000 febe bl 800e3be <memset>
- 800d642: 3080 adds r0, #128 ; 0x80
- 800d644: bd10 pop {r4, pc}
- 800d646: 4620 mov r0, r4
- 800d648: f7ff ffbc bl 800d5c4 <_ZN12_GLOBAL__N_14pool8allocateEj.constprop.5>
- 800d64c: 4603 mov r3, r0
- 800d64e: 2800 cmp r0, #0
- 800d650: d1f2 bne.n 800d638 <__cxa_allocate_exception+0x10>
- 800d652: f7ff f97d bl 800c950 <_ZSt9terminatev>
- 800d656: bf00 nop
-
-0800d658 <__cxa_free_exception>:
- 800d658: 4a06 ldr r2, [pc, #24] ; (800d674 <__cxa_free_exception+0x1c>)
- 800d65a: 6893 ldr r3, [r2, #8]
- 800d65c: 3880 subs r0, #128 ; 0x80
- 800d65e: 4298 cmp r0, r3
- 800d660: d903 bls.n 800d66a <__cxa_free_exception+0x12>
- 800d662: 68d2 ldr r2, [r2, #12]
- 800d664: 4413 add r3, r2
- 800d666: 4298 cmp r0, r3
- 800d668: d301 bcc.n 800d66e <__cxa_free_exception+0x16>
- 800d66a: f000 bc37 b.w 800dedc <free>
- 800d66e: f7ff bf61 b.w 800d534 <_ZN12_GLOBAL__N_14pool4freeEPv.constprop.4>
- 800d672: bf00 nop
- 800d674: 20000ab0 .word 0x20000ab0
-
-0800d678 <_GLOBAL__sub_I__ZN9__gnu_cxx9__freeresEv>:
- 800d678: b538 push {r3, r4, r5, lr}
- 800d67a: 4c08 ldr r4, [pc, #32] ; (800d69c <_GLOBAL__sub_I__ZN9__gnu_cxx9__freeresEv+0x24>)
- 800d67c: f44f 651e mov.w r5, #2528 ; 0x9e0
- 800d680: 4628 mov r0, r5
- 800d682: 60e5 str r5, [r4, #12]
- 800d684: f000 fc22 bl 800decc <malloc>
- 800d688: 60a0 str r0, [r4, #8]
- 800d68a: b120 cbz r0, 800d696 <_GLOBAL__sub_I__ZN9__gnu_cxx9__freeresEv+0x1e>
- 800d68c: 2300 movs r3, #0
- 800d68e: 6060 str r0, [r4, #4]
- 800d690: e9c0 5300 strd r5, r3, [r0]
- 800d694: bd38 pop {r3, r4, r5, pc}
- 800d696: 60e0 str r0, [r4, #12]
- 800d698: 6060 str r0, [r4, #4]
- 800d69a: bd38 pop {r3, r4, r5, pc}
- 800d69c: 20000ab0 .word 0x20000ab0
-
-0800d6a0 <_ZNSt13bad_exceptionD1Ev>:
- 800d6a0: 4770 bx lr
- 800d6a2: bf00 nop
-
-0800d6a4 <_ZGTtNKSt13bad_exception4whatEv>:
- 800d6a4: 4800 ldr r0, [pc, #0] ; (800d6a8 <_ZGTtNKSt13bad_exception4whatEv+0x4>)
- 800d6a6: 4770 bx lr
- 800d6a8: 080123ac .word 0x080123ac
-
-0800d6ac <_ZNSt13bad_exceptionD0Ev>:
- 800d6ac: b510 push {r4, lr}
- 800d6ae: 2104 movs r1, #4
- 800d6b0: 4604 mov r4, r0
- 800d6b2: f000 f803 bl 800d6bc <_ZdlPvj>
- 800d6b6: 4620 mov r0, r4
- 800d6b8: bd10 pop {r4, pc}
- 800d6ba: bf00 nop
-
-0800d6bc <_ZdlPvj>:
- 800d6bc: f000 b9a0 b.w 800da00 <_ZdlPv>
-
-0800d6c0 <_ZNK10__cxxabiv117__class_type_info11__do_upcastEPKS0_PPv>:
- 800d6c0: b570 push {r4, r5, r6, lr}
- 800d6c2: 6803 ldr r3, [r0, #0]
- 800d6c4: b084 sub sp, #16
- 800d6c6: 2400 movs r4, #0
- 800d6c8: 699e ldr r6, [r3, #24]
- 800d6ca: 9400 str r4, [sp, #0]
- 800d6cc: 2310 movs r3, #16
- 800d6ce: 4615 mov r5, r2
- 800d6d0: e9cd 3402 strd r3, r4, [sp, #8]
- 800d6d4: 6812 ldr r2, [r2, #0]
- 800d6d6: f88d 4004 strb.w r4, [sp, #4]
- 800d6da: 466b mov r3, sp
- 800d6dc: 47b0 blx r6
- 800d6de: f89d 3004 ldrb.w r3, [sp, #4]
- 800d6e2: f003 0306 and.w r3, r3, #6
- 800d6e6: 2b06 cmp r3, #6
- 800d6e8: bf03 ittte eq
- 800d6ea: 9b00 ldreq r3, [sp, #0]
- 800d6ec: 602b streq r3, [r5, #0]
- 800d6ee: 2001 moveq r0, #1
- 800d6f0: 4620 movne r0, r4
- 800d6f2: b004 add sp, #16
- 800d6f4: bd70 pop {r4, r5, r6, pc}
- 800d6f6: bf00 nop
-
-0800d6f8 <_ZNK10__cxxabiv117__class_type_info20__do_find_public_srcEiPKvPKS0_S2_>:
- 800d6f8: 9800 ldr r0, [sp, #0]
- 800d6fa: 4290 cmp r0, r2
- 800d6fc: bf0c ite eq
- 800d6fe: 2006 moveq r0, #6
- 800d700: 2001 movne r0, #1
- 800d702: 4770 bx lr
-
-0800d704 <_ZN10__cxxabiv117__class_type_infoD1Ev>:
- 800d704: b510 push {r4, lr}
- 800d706: 4b03 ldr r3, [pc, #12] ; (800d714 <_ZN10__cxxabiv117__class_type_infoD1Ev+0x10>)
- 800d708: 6003 str r3, [r0, #0]
- 800d70a: 4604 mov r4, r0
- 800d70c: f000 f97a bl 800da04 <_ZNSt9type_infoD1Ev>
- 800d710: 4620 mov r0, r4
- 800d712: bd10 pop {r4, pc}
- 800d714: 08012498 .word 0x08012498
-
-0800d718 <_ZN10__cxxabiv117__class_type_infoD0Ev>:
- 800d718: b510 push {r4, lr}
- 800d71a: 4b05 ldr r3, [pc, #20] ; (800d730 <_ZN10__cxxabiv117__class_type_infoD0Ev+0x18>)
- 800d71c: 6003 str r3, [r0, #0]
- 800d71e: 4604 mov r4, r0
- 800d720: f000 f970 bl 800da04 <_ZNSt9type_infoD1Ev>
- 800d724: 4620 mov r0, r4
- 800d726: 2108 movs r1, #8
- 800d728: f7ff ffc8 bl 800d6bc <_ZdlPvj>
- 800d72c: 4620 mov r0, r4
- 800d72e: bd10 pop {r4, pc}
- 800d730: 08012498 .word 0x08012498
-
-0800d734 <_ZNK10__cxxabiv117__class_type_info12__do_dyncastEiNS0_10__sub_kindEPKS0_PKvS3_S5_RNS0_16__dyncast_resultE>:
- 800d734: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
- 800d738: e9dd 1408 ldrd r1, r4, [sp, #32]
- 800d73c: 9d06 ldr r5, [sp, #24]
- 800d73e: 428d cmp r5, r1
- 800d740: 4690 mov r8, r2
- 800d742: 461f mov r7, r3
- 800d744: 4606 mov r6, r0
- 800d746: d00c beq.n 800d762 <_ZNK10__cxxabiv117__class_type_info12__do_dyncastEiNS0_10__sub_kindEPKS0_PKvS3_S5_RNS0_16__dyncast_resultE+0x2e>
- 800d748: 4639 mov r1, r7
- 800d74a: 4630 mov r0, r6
- 800d74c: f000 f95e bl 800da0c <_ZNKSt9type_infoeqERKS_>
- 800d750: b120 cbz r0, 800d75c <_ZNK10__cxxabiv117__class_type_info12__do_dyncastEiNS0_10__sub_kindEPKS0_PKvS3_S5_RNS0_16__dyncast_resultE+0x28>
- 800d752: 2301 movs r3, #1
- 800d754: 6025 str r5, [r4, #0]
- 800d756: f884 8004 strb.w r8, [r4, #4]
- 800d75a: 71a3 strb r3, [r4, #6]
- 800d75c: 2000 movs r0, #0
- 800d75e: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
- 800d762: 9907 ldr r1, [sp, #28]
- 800d764: f000 f952 bl 800da0c <_ZNKSt9type_infoeqERKS_>
- 800d768: 2800 cmp r0, #0
- 800d76a: d0ed beq.n 800d748 <_ZNK10__cxxabiv117__class_type_info12__do_dyncastEiNS0_10__sub_kindEPKS0_PKvS3_S5_RNS0_16__dyncast_resultE+0x14>
- 800d76c: f884 8005 strb.w r8, [r4, #5]
- 800d770: 2000 movs r0, #0
- 800d772: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
- 800d776: bf00 nop
-
-0800d778 <_ZNK10__cxxabiv117__class_type_info11__do_upcastEPKS0_PKvRNS0_15__upcast_resultE>:
- 800d778: b538 push {r3, r4, r5, lr}
- 800d77a: 4615 mov r5, r2
- 800d77c: 461c mov r4, r3
- 800d77e: f000 f945 bl 800da0c <_ZNKSt9type_infoeqERKS_>
- 800d782: b120 cbz r0, 800d78e <_ZNK10__cxxabiv117__class_type_info11__do_upcastEPKS0_PKvRNS0_15__upcast_resultE+0x16>
- 800d784: 2208 movs r2, #8
- 800d786: 2306 movs r3, #6
- 800d788: 6025 str r5, [r4, #0]
- 800d78a: 60e2 str r2, [r4, #12]
- 800d78c: 7123 strb r3, [r4, #4]
- 800d78e: bd38 pop {r3, r4, r5, pc}
-
-0800d790 <_ZNK10__cxxabiv117__class_type_info10__do_catchEPKSt9type_infoPPvj>:
- 800d790: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
- 800d794: 4617 mov r7, r2
- 800d796: 461c mov r4, r3
- 800d798: 4606 mov r6, r0
- 800d79a: 460d mov r5, r1
- 800d79c: f000 f936 bl 800da0c <_ZNKSt9type_infoeqERKS_>
- 800d7a0: b908 cbnz r0, 800d7a6 <_ZNK10__cxxabiv117__class_type_info10__do_catchEPKSt9type_infoPPvj+0x16>
- 800d7a2: 2c03 cmp r4, #3
- 800d7a4: d901 bls.n 800d7aa <_ZNK10__cxxabiv117__class_type_info10__do_catchEPKSt9type_infoPPvj+0x1a>
- 800d7a6: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
- 800d7aa: 682b ldr r3, [r5, #0]
- 800d7ac: 463a mov r2, r7
- 800d7ae: 4631 mov r1, r6
- 800d7b0: 4628 mov r0, r5
- 800d7b2: 695b ldr r3, [r3, #20]
- 800d7b4: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr}
- 800d7b8: 4718 bx r3
- 800d7ba: bf00 nop
-
-0800d7bc <_ZN9__gnu_cxx27__verbose_terminate_handlerEv>:
- 800d7bc: b570 push {r4, r5, r6, lr}
- 800d7be: 4b3c ldr r3, [pc, #240] ; (800d8b0 <_ZN9__gnu_cxx27__verbose_terminate_handlerEv+0xf4>)
- 800d7c0: 781a ldrb r2, [r3, #0]
- 800d7c2: b082 sub sp, #8
- 800d7c4: 2a00 cmp r2, #0
- 800d7c6: d135 bne.n 800d834 <_ZN9__gnu_cxx27__verbose_terminate_handlerEv+0x78>
- 800d7c8: 2401 movs r4, #1
- 800d7ca: 701c strb r4, [r3, #0]
- 800d7cc: f000 f87e bl 800d8cc <__cxa_current_exception_type>
- 800d7d0: 2800 cmp r0, #0
- 800d7d2: d03d beq.n 800d850 <_ZN9__gnu_cxx27__verbose_terminate_handlerEv+0x94>
- 800d7d4: 6844 ldr r4, [r0, #4]
- 800d7d6: 4d37 ldr r5, [pc, #220] ; (800d8b4 <_ZN9__gnu_cxx27__verbose_terminate_handlerEv+0xf8>)
- 800d7d8: 7823 ldrb r3, [r4, #0]
- 800d7da: 2b2a cmp r3, #42 ; 0x2a
- 800d7dc: ab02 add r3, sp, #8
- 800d7de: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff
- 800d7e2: bf08 it eq
- 800d7e4: 3401 addeq r4, #1
- 800d7e6: f843 2d04 str.w r2, [r3, #-4]!
- 800d7ea: 2200 movs r2, #0
- 800d7ec: 4611 mov r1, r2
- 800d7ee: 4620 mov r0, r4
- 800d7f0: f7f9 fa1e bl 8006c30 <__cxa_demangle>
- 800d7f4: 682b ldr r3, [r5, #0]
- 800d7f6: 4606 mov r6, r0
- 800d7f8: 68db ldr r3, [r3, #12]
- 800d7fa: 482f ldr r0, [pc, #188] ; (800d8b8 <_ZN9__gnu_cxx27__verbose_terminate_handlerEv+0xfc>)
- 800d7fc: 2230 movs r2, #48 ; 0x30
- 800d7fe: 2101 movs r1, #1
- 800d800: f000 fb2e bl 800de60 <fwrite>
- 800d804: 9b01 ldr r3, [sp, #4]
- 800d806: b17b cbz r3, 800d828 <_ZN9__gnu_cxx27__verbose_terminate_handlerEv+0x6c>
- 800d808: 682b ldr r3, [r5, #0]
- 800d80a: 4620 mov r0, r4
- 800d80c: 68d9 ldr r1, [r3, #12]
- 800d80e: f000 f987 bl 800db20 <fputs>
- 800d812: 682b ldr r3, [r5, #0]
- 800d814: 4829 ldr r0, [pc, #164] ; (800d8bc <_ZN9__gnu_cxx27__verbose_terminate_handlerEv+0x100>)
- 800d816: 68db ldr r3, [r3, #12]
- 800d818: 2202 movs r2, #2
- 800d81a: 2101 movs r1, #1
- 800d81c: f000 fb20 bl 800de60 <fwrite>
- 800d820: 9b01 ldr r3, [sp, #4]
- 800d822: b18b cbz r3, 800d848 <_ZN9__gnu_cxx27__verbose_terminate_handlerEv+0x8c>
- 800d824: f7ff fdca bl 800d3bc <__cxa_rethrow>
- 800d828: 682b ldr r3, [r5, #0]
- 800d82a: 4630 mov r0, r6
- 800d82c: 68d9 ldr r1, [r3, #12]
- 800d82e: f000 f977 bl 800db20 <fputs>
- 800d832: e7ee b.n 800d812 <_ZN9__gnu_cxx27__verbose_terminate_handlerEv+0x56>
- 800d834: 4b1f ldr r3, [pc, #124] ; (800d8b4 <_ZN9__gnu_cxx27__verbose_terminate_handlerEv+0xf8>)
- 800d836: 4822 ldr r0, [pc, #136] ; (800d8c0 <_ZN9__gnu_cxx27__verbose_terminate_handlerEv+0x104>)
- 800d838: 681b ldr r3, [r3, #0]
- 800d83a: 221d movs r2, #29
- 800d83c: 68db ldr r3, [r3, #12]
- 800d83e: 2101 movs r1, #1
- 800d840: f000 fb0e bl 800de60 <fwrite>
- 800d844: f000 f8f8 bl 800da38 <abort>
- 800d848: 4630 mov r0, r6
- 800d84a: f000 fb47 bl 800dedc <free>
- 800d84e: e7e9 b.n 800d824 <_ZN9__gnu_cxx27__verbose_terminate_handlerEv+0x68>
- 800d850: 4b18 ldr r3, [pc, #96] ; (800d8b4 <_ZN9__gnu_cxx27__verbose_terminate_handlerEv+0xf8>)
- 800d852: 481c ldr r0, [pc, #112] ; (800d8c4 <_ZN9__gnu_cxx27__verbose_terminate_handlerEv+0x108>)
- 800d854: 681b ldr r3, [r3, #0]
- 800d856: 4621 mov r1, r4
- 800d858: 68db ldr r3, [r3, #12]
- 800d85a: 222d movs r2, #45 ; 0x2d
- 800d85c: f000 fb00 bl 800de60 <fwrite>
- 800d860: f000 f8ea bl 800da38 <abort>
- 800d864: 2901 cmp r1, #1
- 800d866: 460c mov r4, r1
- 800d868: d119 bne.n 800d89e <_ZN9__gnu_cxx27__verbose_terminate_handlerEv+0xe2>
- 800d86a: f7ff fddf bl 800d42c <__cxa_begin_catch>
- 800d86e: 6803 ldr r3, [r0, #0]
- 800d870: 689b ldr r3, [r3, #8]
- 800d872: 4798 blx r3
- 800d874: 682b ldr r3, [r5, #0]
- 800d876: 4606 mov r6, r0
- 800d878: 68db ldr r3, [r3, #12]
- 800d87a: 4813 ldr r0, [pc, #76] ; (800d8c8 <_ZN9__gnu_cxx27__verbose_terminate_handlerEv+0x10c>)
- 800d87c: 4621 mov r1, r4
- 800d87e: 220b movs r2, #11
- 800d880: f000 faee bl 800de60 <fwrite>
- 800d884: 682b ldr r3, [r5, #0]
- 800d886: 4630 mov r0, r6
- 800d888: 68d9 ldr r1, [r3, #12]
- 800d88a: f000 f949 bl 800db20 <fputs>
- 800d88e: 682b ldr r3, [r5, #0]
- 800d890: 200a movs r0, #10
- 800d892: 68d9 ldr r1, [r3, #12]
- 800d894: f000 f902 bl 800da9c <fputc>
- 800d898: f7ff fe08 bl 800d4ac <__cxa_end_catch>
- 800d89c: e7e0 b.n 800d860 <_ZN9__gnu_cxx27__verbose_terminate_handlerEv+0xa4>
- 800d89e: f7ff fdc5 bl 800d42c <__cxa_begin_catch>
- 800d8a2: f7ff fe03 bl 800d4ac <__cxa_end_catch>
- 800d8a6: e7db b.n 800d860 <_ZN9__gnu_cxx27__verbose_terminate_handlerEv+0xa4>
- 800d8a8: f7ff fe00 bl 800d4ac <__cxa_end_catch>
- 800d8ac: f7ff f914 bl 800cad8 <__cxa_end_cleanup>
- 800d8b0: 20000ac0 .word 0x20000ac0
- 800d8b4: 20000014 .word 0x20000014
- 800d8b8: 080124dc .word 0x080124dc
- 800d8bc: 08012510 .word 0x08012510
- 800d8c0: 080124bc .word 0x080124bc
- 800d8c4: 08012514 .word 0x08012514
- 800d8c8: 08012544 .word 0x08012544
-
-0800d8cc <__cxa_current_exception_type>:
- 800d8cc: b508 push {r3, lr}
- 800d8ce: f7ff f9cf bl 800cc70 <__cxa_get_globals>
- 800d8d2: 6800 ldr r0, [r0, #0]
- 800d8d4: b130 cbz r0, 800d8e4 <__cxa_current_exception_type+0x18>
- 800d8d6: f890 3027 ldrb.w r3, [r0, #39] ; 0x27
- 800d8da: 6800 ldr r0, [r0, #0]
- 800d8dc: 2b01 cmp r3, #1
- 800d8de: bf08 it eq
- 800d8e0: f850 0c78 ldreq.w r0, [r0, #-120]
- 800d8e4: bd08 pop {r3, pc}
- 800d8e6: bf00 nop
-
-0800d8e8 <_ZN10__cxxabiv120__si_class_type_infoD1Ev>:
- 800d8e8: b510 push {r4, lr}
- 800d8ea: 4b03 ldr r3, [pc, #12] ; (800d8f8 <_ZN10__cxxabiv120__si_class_type_infoD1Ev+0x10>)
- 800d8ec: 6003 str r3, [r0, #0]
- 800d8ee: 4604 mov r4, r0
- 800d8f0: f7ff ff08 bl 800d704 <_ZN10__cxxabiv117__class_type_infoD1Ev>
- 800d8f4: 4620 mov r0, r4
- 800d8f6: bd10 pop {r4, pc}
- 800d8f8: 08012df0 .word 0x08012df0
-
-0800d8fc <_ZN10__cxxabiv120__si_class_type_infoD0Ev>:
- 800d8fc: b510 push {r4, lr}
- 800d8fe: 4b05 ldr r3, [pc, #20] ; (800d914 <_ZN10__cxxabiv120__si_class_type_infoD0Ev+0x18>)
- 800d900: 6003 str r3, [r0, #0]
- 800d902: 4604 mov r4, r0
- 800d904: f7ff fefe bl 800d704 <_ZN10__cxxabiv117__class_type_infoD1Ev>
- 800d908: 4620 mov r0, r4
- 800d90a: 210c movs r1, #12
- 800d90c: f7ff fed6 bl 800d6bc <_ZdlPvj>
- 800d910: 4620 mov r0, r4
- 800d912: bd10 pop {r4, pc}
- 800d914: 08012df0 .word 0x08012df0
-
-0800d918 <_ZNK10__cxxabiv120__si_class_type_info20__do_find_public_srcEiPKvPKNS_17__class_type_infoES2_>:
- 800d918: b570 push {r4, r5, r6, lr}
- 800d91a: b082 sub sp, #8
- 800d91c: 460e mov r6, r1
- 800d91e: 9c06 ldr r4, [sp, #24]
- 800d920: 4294 cmp r4, r2
- 800d922: 4605 mov r5, r0
- 800d924: d009 beq.n 800d93a <_ZNK10__cxxabiv120__si_class_type_info20__do_find_public_srcEiPKvPKNS_17__class_type_infoES2_+0x22>
- 800d926: 68a8 ldr r0, [r5, #8]
- 800d928: 6805 ldr r5, [r0, #0]
- 800d92a: 9406 str r4, [sp, #24]
- 800d92c: 6a2c ldr r4, [r5, #32]
- 800d92e: 4631 mov r1, r6
- 800d930: 46a4 mov ip, r4
- 800d932: b002 add sp, #8
- 800d934: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr}
- 800d938: 4760 bx ip
- 800d93a: 4619 mov r1, r3
- 800d93c: 9201 str r2, [sp, #4]
- 800d93e: 9300 str r3, [sp, #0]
- 800d940: f000 f864 bl 800da0c <_ZNKSt9type_infoeqERKS_>
- 800d944: e9dd 3200 ldrd r3, r2, [sp]
- 800d948: 2800 cmp r0, #0
- 800d94a: d0ec beq.n 800d926 <_ZNK10__cxxabiv120__si_class_type_info20__do_find_public_srcEiPKvPKNS_17__class_type_infoES2_+0xe>
- 800d94c: 2006 movs r0, #6
- 800d94e: b002 add sp, #8
- 800d950: bd70 pop {r4, r5, r6, pc}
- 800d952: bf00 nop
-
-0800d954 <_ZNK10__cxxabiv120__si_class_type_info12__do_dyncastEiNS_17__class_type_info10__sub_kindEPKS1_PKvS4_S6_RNS1_16__dyncast_resultE>:
- 800d954: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
- 800d958: 460e mov r6, r1
- 800d95a: b081 sub sp, #4
- 800d95c: 4619 mov r1, r3
- 800d95e: 461f mov r7, r3
- 800d960: 4691 mov r9, r2
- 800d962: 4683 mov fp, r0
- 800d964: e9dd 4a0a ldrd r4, sl, [sp, #40] ; 0x28
- 800d968: e9dd 850c ldrd r8, r5, [sp, #48] ; 0x30
- 800d96c: f000 f84e bl 800da0c <_ZNKSt9type_infoeqERKS_>
- 800d970: b170 cbz r0, 800d990 <_ZNK10__cxxabiv120__si_class_type_info12__do_dyncastEiNS_17__class_type_info10__sub_kindEPKS1_PKvS4_S6_RNS1_16__dyncast_resultE+0x3c>
- 800d972: 2e00 cmp r6, #0
- 800d974: 602c str r4, [r5, #0]
- 800d976: f885 9004 strb.w r9, [r5, #4]
- 800d97a: db1d blt.n 800d9b8 <_ZNK10__cxxabiv120__si_class_type_info12__do_dyncastEiNS_17__class_type_info10__sub_kindEPKS1_PKvS4_S6_RNS1_16__dyncast_resultE+0x64>
- 800d97c: 4434 add r4, r6
- 800d97e: 45a0 cmp r8, r4
- 800d980: bf0c ite eq
- 800d982: 2406 moveq r4, #6
- 800d984: 2401 movne r4, #1
- 800d986: 71ac strb r4, [r5, #6]
- 800d988: 2000 movs r0, #0
- 800d98a: b001 add sp, #4
- 800d98c: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
- 800d990: 4544 cmp r4, r8
- 800d992: d016 beq.n 800d9c2 <_ZNK10__cxxabiv120__si_class_type_info12__do_dyncastEiNS_17__class_type_info10__sub_kindEPKS1_PKvS4_S6_RNS1_16__dyncast_resultE+0x6e>
- 800d994: f8db 0008 ldr.w r0, [fp, #8]
- 800d998: f8d0 c000 ldr.w ip, [r0]
- 800d99c: e9cd 850c strd r8, r5, [sp, #48] ; 0x30
- 800d9a0: e9cd 4a0a strd r4, sl, [sp, #40] ; 0x28
- 800d9a4: f8dc 401c ldr.w r4, [ip, #28]
- 800d9a8: 463b mov r3, r7
- 800d9aa: 464a mov r2, r9
- 800d9ac: 4631 mov r1, r6
- 800d9ae: 46a4 mov ip, r4
- 800d9b0: b001 add sp, #4
- 800d9b2: e8bd 4ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
- 800d9b6: 4760 bx ip
- 800d9b8: 3602 adds r6, #2
- 800d9ba: d1e5 bne.n 800d988 <_ZNK10__cxxabiv120__si_class_type_info12__do_dyncastEiNS_17__class_type_info10__sub_kindEPKS1_PKvS4_S6_RNS1_16__dyncast_resultE+0x34>
- 800d9bc: 2301 movs r3, #1
- 800d9be: 71ab strb r3, [r5, #6]
- 800d9c0: e7e2 b.n 800d988 <_ZNK10__cxxabiv120__si_class_type_info12__do_dyncastEiNS_17__class_type_info10__sub_kindEPKS1_PKvS4_S6_RNS1_16__dyncast_resultE+0x34>
- 800d9c2: 4651 mov r1, sl
- 800d9c4: 4658 mov r0, fp
- 800d9c6: f000 f821 bl 800da0c <_ZNKSt9type_infoeqERKS_>
- 800d9ca: 2800 cmp r0, #0
- 800d9cc: d0e2 beq.n 800d994 <_ZNK10__cxxabiv120__si_class_type_info12__do_dyncastEiNS_17__class_type_info10__sub_kindEPKS1_PKvS4_S6_RNS1_16__dyncast_resultE+0x40>
- 800d9ce: f885 9005 strb.w r9, [r5, #5]
- 800d9d2: e7d9 b.n 800d988 <_ZNK10__cxxabiv120__si_class_type_info12__do_dyncastEiNS_17__class_type_info10__sub_kindEPKS1_PKvS4_S6_RNS1_16__dyncast_resultE+0x34>
-
-0800d9d4 <_ZNK10__cxxabiv120__si_class_type_info11__do_upcastEPKNS_17__class_type_infoEPKvRNS1_15__upcast_resultE>:
- 800d9d4: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
- 800d9d8: 4607 mov r7, r0
- 800d9da: 460c mov r4, r1
- 800d9dc: 4615 mov r5, r2
- 800d9de: 461e mov r6, r3
- 800d9e0: f7ff feca bl 800d778 <_ZNK10__cxxabiv117__class_type_info11__do_upcastEPKS0_PKvRNS0_15__upcast_resultE>
- 800d9e4: b108 cbz r0, 800d9ea <_ZNK10__cxxabiv120__si_class_type_info11__do_upcastEPKNS_17__class_type_infoEPKvRNS1_15__upcast_resultE+0x16>
- 800d9e6: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
- 800d9ea: 68b8 ldr r0, [r7, #8]
- 800d9ec: 6807 ldr r7, [r0, #0]
- 800d9ee: 4621 mov r1, r4
- 800d9f0: 69bc ldr r4, [r7, #24]
- 800d9f2: 4633 mov r3, r6
- 800d9f4: 462a mov r2, r5
- 800d9f6: 46a4 mov ip, r4
- 800d9f8: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr}
- 800d9fc: 4760 bx ip
- 800d9fe: bf00 nop
-
-0800da00 <_ZdlPv>:
- 800da00: f000 ba6c b.w 800dedc <free>
-
-0800da04 <_ZNSt9type_infoD1Ev>:
- 800da04: 4770 bx lr
- 800da06: bf00 nop
-
-0800da08 <_ZNKSt9type_info14__is_pointer_pEv>:
- 800da08: 2000 movs r0, #0
- 800da0a: 4770 bx lr
-
-0800da0c <_ZNKSt9type_infoeqERKS_>:
- 800da0c: 4281 cmp r1, r0
- 800da0e: d00f beq.n 800da30 <_ZNKSt9type_infoeqERKS_+0x24>
- 800da10: b508 push {r3, lr}
- 800da12: 6840 ldr r0, [r0, #4]
- 800da14: 7803 ldrb r3, [r0, #0]
- 800da16: 2b2a cmp r3, #42 ; 0x2a
- 800da18: d00c beq.n 800da34 <_ZNKSt9type_infoeqERKS_+0x28>
- 800da1a: 6849 ldr r1, [r1, #4]
- 800da1c: 780b ldrb r3, [r1, #0]
- 800da1e: 2b2a cmp r3, #42 ; 0x2a
- 800da20: bf08 it eq
- 800da22: 3101 addeq r1, #1
- 800da24: f7f9 f9cc bl 8006dc0 <strcmp>
- 800da28: fab0 f080 clz r0, r0
- 800da2c: 0940 lsrs r0, r0, #5
- 800da2e: bd08 pop {r3, pc}
- 800da30: 2001 movs r0, #1
- 800da32: 4770 bx lr
- 800da34: 2000 movs r0, #0
- 800da36: bd08 pop {r3, pc}
-
-0800da38 <abort>:
- 800da38: b508 push {r3, lr}
- 800da3a: 2006 movs r0, #6
- 800da3c: f000 fef2 bl 800e824 <raise>
- 800da40: 2001 movs r0, #1
- 800da42: f7fe fe63 bl 800c70c <_exit>
- ...
-
-0800da48 <__errno>:
- 800da48: 4b01 ldr r3, [pc, #4] ; (800da50 <__errno+0x8>)
- 800da4a: 6818 ldr r0, [r3, #0]
- 800da4c: 4770 bx lr
- 800da4e: bf00 nop
- 800da50: 20000014 .word 0x20000014
-
-0800da54 <_fputc_r>:
- 800da54: b570 push {r4, r5, r6, lr}
- 800da56: 460e mov r6, r1
- 800da58: 4614 mov r4, r2
- 800da5a: 4605 mov r5, r0
- 800da5c: b118 cbz r0, 800da66 <_fputc_r+0x12>
- 800da5e: 6b83 ldr r3, [r0, #56] ; 0x38
- 800da60: b90b cbnz r3, 800da66 <_fputc_r+0x12>
- 800da62: f003 f8a7 bl 8010bb4 <__sinit>
- 800da66: 6e63 ldr r3, [r4, #100] ; 0x64
- 800da68: 07d8 lsls r0, r3, #31
- 800da6a: d405 bmi.n 800da78 <_fputc_r+0x24>
- 800da6c: 89a3 ldrh r3, [r4, #12]
- 800da6e: 0599 lsls r1, r3, #22
- 800da70: d402 bmi.n 800da78 <_fputc_r+0x24>
- 800da72: 6da0 ldr r0, [r4, #88] ; 0x58
- 800da74: f000 fa28 bl 800dec8 <__retarget_lock_acquire_recursive>
- 800da78: 4622 mov r2, r4
- 800da7a: 4628 mov r0, r5
- 800da7c: 4631 mov r1, r6
- 800da7e: f000 fcb3 bl 800e3e8 <_putc_r>
- 800da82: 6e63 ldr r3, [r4, #100] ; 0x64
- 800da84: 07da lsls r2, r3, #31
- 800da86: 4605 mov r5, r0
- 800da88: d405 bmi.n 800da96 <_fputc_r+0x42>
- 800da8a: 89a3 ldrh r3, [r4, #12]
- 800da8c: 059b lsls r3, r3, #22
- 800da8e: d402 bmi.n 800da96 <_fputc_r+0x42>
- 800da90: 6da0 ldr r0, [r4, #88] ; 0x58
- 800da92: f000 fa1a bl 800deca <__retarget_lock_release_recursive>
- 800da96: 4628 mov r0, r5
- 800da98: bd70 pop {r4, r5, r6, pc}
- ...
-
-0800da9c <fputc>:
- 800da9c: 4b02 ldr r3, [pc, #8] ; (800daa8 <fputc+0xc>)
- 800da9e: 460a mov r2, r1
- 800daa0: 4601 mov r1, r0
- 800daa2: 6818 ldr r0, [r3, #0]
- 800daa4: f7ff bfd6 b.w 800da54 <_fputc_r>
- 800daa8: 20000014 .word 0x20000014
-
-0800daac <_fputs_r>:
- 800daac: b530 push {r4, r5, lr}
- 800daae: b087 sub sp, #28
- 800dab0: 4605 mov r5, r0
- 800dab2: 4608 mov r0, r1
- 800dab4: 4614 mov r4, r2
- 800dab6: 9101 str r1, [sp, #4]
- 800dab8: f7f9 f98c bl 8006dd4 <strlen>
- 800dabc: ab01 add r3, sp, #4
- 800dabe: 9303 str r3, [sp, #12]
- 800dac0: 2301 movs r3, #1
- 800dac2: 9005 str r0, [sp, #20]
- 800dac4: 9002 str r0, [sp, #8]
- 800dac6: 9304 str r3, [sp, #16]
- 800dac8: b125 cbz r5, 800dad4 <_fputs_r+0x28>
- 800daca: 6bab ldr r3, [r5, #56] ; 0x38
- 800dacc: b913 cbnz r3, 800dad4 <_fputs_r+0x28>
- 800dace: 4628 mov r0, r5
- 800dad0: f003 f870 bl 8010bb4 <__sinit>
- 800dad4: 6e63 ldr r3, [r4, #100] ; 0x64
- 800dad6: 07db lsls r3, r3, #31
- 800dad8: d405 bmi.n 800dae6 <_fputs_r+0x3a>
- 800dada: 89a3 ldrh r3, [r4, #12]
- 800dadc: 0598 lsls r0, r3, #22
- 800dade: d402 bmi.n 800dae6 <_fputs_r+0x3a>
- 800dae0: 6da0 ldr r0, [r4, #88] ; 0x58
- 800dae2: f000 f9f1 bl 800dec8 <__retarget_lock_acquire_recursive>
- 800dae6: f9b4 300c ldrsh.w r3, [r4, #12]
- 800daea: 0499 lsls r1, r3, #18
- 800daec: d406 bmi.n 800dafc <_fputs_r+0x50>
- 800daee: f443 5300 orr.w r3, r3, #8192 ; 0x2000
- 800daf2: 81a3 strh r3, [r4, #12]
- 800daf4: 6e63 ldr r3, [r4, #100] ; 0x64
- 800daf6: f423 5300 bic.w r3, r3, #8192 ; 0x2000
- 800dafa: 6663 str r3, [r4, #100] ; 0x64
- 800dafc: aa03 add r2, sp, #12
- 800dafe: 4628 mov r0, r5
- 800db00: 4621 mov r1, r4
- 800db02: f000 f815 bl 800db30 <__sfvwrite_r>
- 800db06: 6e63 ldr r3, [r4, #100] ; 0x64
- 800db08: 07da lsls r2, r3, #31
- 800db0a: 4605 mov r5, r0
- 800db0c: d405 bmi.n 800db1a <_fputs_r+0x6e>
- 800db0e: 89a3 ldrh r3, [r4, #12]
- 800db10: 059b lsls r3, r3, #22
- 800db12: d402 bmi.n 800db1a <_fputs_r+0x6e>
- 800db14: 6da0 ldr r0, [r4, #88] ; 0x58
- 800db16: f000 f9d8 bl 800deca <__retarget_lock_release_recursive>
- 800db1a: 4628 mov r0, r5
- 800db1c: b007 add sp, #28
- 800db1e: bd30 pop {r4, r5, pc}
-
-0800db20 <fputs>:
- 800db20: 4b02 ldr r3, [pc, #8] ; (800db2c <fputs+0xc>)
- 800db22: 460a mov r2, r1
- 800db24: 4601 mov r1, r0
- 800db26: 6818 ldr r0, [r3, #0]
- 800db28: f7ff bfc0 b.w 800daac <_fputs_r>
- 800db2c: 20000014 .word 0x20000014
-
-0800db30 <__sfvwrite_r>:
- 800db30: 6893 ldr r3, [r2, #8]
- 800db32: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
- 800db36: 4680 mov r8, r0
- 800db38: 460c mov r4, r1
- 800db3a: 4691 mov r9, r2
- 800db3c: b91b cbnz r3, 800db46 <__sfvwrite_r+0x16>
- 800db3e: 2000 movs r0, #0
- 800db40: b003 add sp, #12
- 800db42: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
- 800db46: 898b ldrh r3, [r1, #12]
- 800db48: 0718 lsls r0, r3, #28
- 800db4a: d54f bpl.n 800dbec <__sfvwrite_r+0xbc>
- 800db4c: 690b ldr r3, [r1, #16]
- 800db4e: 2b00 cmp r3, #0
- 800db50: d04c beq.n 800dbec <__sfvwrite_r+0xbc>
- 800db52: 89a5 ldrh r5, [r4, #12]
- 800db54: f8d9 6000 ldr.w r6, [r9]
- 800db58: f015 0702 ands.w r7, r5, #2
- 800db5c: d169 bne.n 800dc32 <__sfvwrite_r+0x102>
- 800db5e: f015 0501 ands.w r5, r5, #1
- 800db62: f000 809a beq.w 800dc9a <__sfvwrite_r+0x16a>
- 800db66: 4638 mov r0, r7
- 800db68: 46ba mov sl, r7
- 800db6a: 46bb mov fp, r7
- 800db6c: f1bb 0f00 cmp.w fp, #0
- 800db70: f000 8103 beq.w 800dd7a <__sfvwrite_r+0x24a>
- 800db74: b950 cbnz r0, 800db8c <__sfvwrite_r+0x5c>
- 800db76: 465a mov r2, fp
- 800db78: 210a movs r1, #10
- 800db7a: 4650 mov r0, sl
- 800db7c: f7f9 f8d0 bl 8006d20 <memchr>
- 800db80: 2800 cmp r0, #0
- 800db82: f000 80ff beq.w 800dd84 <__sfvwrite_r+0x254>
- 800db86: 3001 adds r0, #1
- 800db88: eba0 070a sub.w r7, r0, sl
- 800db8c: 6820 ldr r0, [r4, #0]
- 800db8e: 6921 ldr r1, [r4, #16]
- 800db90: 6962 ldr r2, [r4, #20]
- 800db92: 455f cmp r7, fp
- 800db94: 463b mov r3, r7
- 800db96: bf28 it cs
- 800db98: 465b movcs r3, fp
- 800db9a: 4288 cmp r0, r1
- 800db9c: f240 80f5 bls.w 800dd8a <__sfvwrite_r+0x25a>
- 800dba0: 68a5 ldr r5, [r4, #8]
- 800dba2: 4415 add r5, r2
- 800dba4: 42ab cmp r3, r5
- 800dba6: f340 80f0 ble.w 800dd8a <__sfvwrite_r+0x25a>
- 800dbaa: 4651 mov r1, sl
- 800dbac: 462a mov r2, r5
- 800dbae: f000 fbed bl 800e38c <memmove>
- 800dbb2: 6823 ldr r3, [r4, #0]
- 800dbb4: 442b add r3, r5
- 800dbb6: 6023 str r3, [r4, #0]
- 800dbb8: 4621 mov r1, r4
- 800dbba: 4640 mov r0, r8
- 800dbbc: f002 ff8e bl 8010adc <_fflush_r>
- 800dbc0: 2800 cmp r0, #0
- 800dbc2: d165 bne.n 800dc90 <__sfvwrite_r+0x160>
- 800dbc4: 1b7f subs r7, r7, r5
- 800dbc6: f040 80fa bne.w 800ddbe <__sfvwrite_r+0x28e>
- 800dbca: 4621 mov r1, r4
- 800dbcc: 4640 mov r0, r8
- 800dbce: f002 ff85 bl 8010adc <_fflush_r>
- 800dbd2: 2800 cmp r0, #0
- 800dbd4: d15c bne.n 800dc90 <__sfvwrite_r+0x160>
- 800dbd6: f8d9 3008 ldr.w r3, [r9, #8]
- 800dbda: 44aa add sl, r5
- 800dbdc: ebab 0b05 sub.w fp, fp, r5
- 800dbe0: 1b5d subs r5, r3, r5
- 800dbe2: f8c9 5008 str.w r5, [r9, #8]
- 800dbe6: 2d00 cmp r5, #0
- 800dbe8: d1c0 bne.n 800db6c <__sfvwrite_r+0x3c>
- 800dbea: e7a8 b.n 800db3e <__sfvwrite_r+0xe>
- 800dbec: 4621 mov r1, r4
- 800dbee: 4640 mov r0, r8
- 800dbf0: f002 f8ba bl 800fd68 <__swsetup_r>
- 800dbf4: 2800 cmp r0, #0
- 800dbf6: d0ac beq.n 800db52 <__sfvwrite_r+0x22>
- 800dbf8: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
- 800dbfc: e7a0 b.n 800db40 <__sfvwrite_r+0x10>
- 800dbfe: e9d6 a700 ldrd sl, r7, [r6]
- 800dc02: 3608 adds r6, #8
- 800dc04: 2f00 cmp r7, #0
- 800dc06: d0fa beq.n 800dbfe <__sfvwrite_r+0xce>
- 800dc08: 455f cmp r7, fp
- 800dc0a: 463b mov r3, r7
- 800dc0c: 4652 mov r2, sl
- 800dc0e: bf28 it cs
- 800dc10: 465b movcs r3, fp
- 800dc12: 69e1 ldr r1, [r4, #28]
- 800dc14: 6a65 ldr r5, [r4, #36] ; 0x24
- 800dc16: 4640 mov r0, r8
- 800dc18: 47a8 blx r5
- 800dc1a: 2800 cmp r0, #0
- 800dc1c: dd38 ble.n 800dc90 <__sfvwrite_r+0x160>
- 800dc1e: f8d9 3008 ldr.w r3, [r9, #8]
- 800dc22: 4482 add sl, r0
- 800dc24: 1a3f subs r7, r7, r0
- 800dc26: 1a18 subs r0, r3, r0
- 800dc28: f8c9 0008 str.w r0, [r9, #8]
- 800dc2c: 2800 cmp r0, #0
- 800dc2e: d1e9 bne.n 800dc04 <__sfvwrite_r+0xd4>
- 800dc30: e785 b.n 800db3e <__sfvwrite_r+0xe>
- 800dc32: f04f 0a00 mov.w sl, #0
- 800dc36: 4657 mov r7, sl
- 800dc38: f8df b18c ldr.w fp, [pc, #396] ; 800ddc8 <__sfvwrite_r+0x298>
- 800dc3c: e7e2 b.n 800dc04 <__sfvwrite_r+0xd4>
- 800dc3e: e9d6 5a00 ldrd r5, sl, [r6]
- 800dc42: 3608 adds r6, #8
- 800dc44: f1ba 0f00 cmp.w sl, #0
- 800dc48: d0f9 beq.n 800dc3e <__sfvwrite_r+0x10e>
- 800dc4a: 89a2 ldrh r2, [r4, #12]
- 800dc4c: 68a3 ldr r3, [r4, #8]
- 800dc4e: 6820 ldr r0, [r4, #0]
- 800dc50: 0591 lsls r1, r2, #22
- 800dc52: d564 bpl.n 800dd1e <__sfvwrite_r+0x1ee>
- 800dc54: 4553 cmp r3, sl
- 800dc56: d836 bhi.n 800dcc6 <__sfvwrite_r+0x196>
- 800dc58: f412 6f90 tst.w r2, #1152 ; 0x480
- 800dc5c: d033 beq.n 800dcc6 <__sfvwrite_r+0x196>
- 800dc5e: 6921 ldr r1, [r4, #16]
- 800dc60: 6967 ldr r7, [r4, #20]
- 800dc62: eba0 0b01 sub.w fp, r0, r1
- 800dc66: 2302 movs r3, #2
- 800dc68: eb07 0747 add.w r7, r7, r7, lsl #1
- 800dc6c: fb97 f7f3 sdiv r7, r7, r3
- 800dc70: f10b 0301 add.w r3, fp, #1
- 800dc74: 4453 add r3, sl
- 800dc76: 429f cmp r7, r3
- 800dc78: bf38 it cc
- 800dc7a: 461f movcc r7, r3
- 800dc7c: 0553 lsls r3, r2, #21
- 800dc7e: d53e bpl.n 800dcfe <__sfvwrite_r+0x1ce>
- 800dc80: 4639 mov r1, r7
- 800dc82: 4640 mov r0, r8
- 800dc84: f000 f932 bl 800deec <_malloc_r>
- 800dc88: b948 cbnz r0, 800dc9e <__sfvwrite_r+0x16e>
- 800dc8a: 230c movs r3, #12
- 800dc8c: f8c8 3000 str.w r3, [r8]
- 800dc90: 89a3 ldrh r3, [r4, #12]
- 800dc92: f043 0340 orr.w r3, r3, #64 ; 0x40
- 800dc96: 81a3 strh r3, [r4, #12]
- 800dc98: e7ae b.n 800dbf8 <__sfvwrite_r+0xc8>
- 800dc9a: 46aa mov sl, r5
- 800dc9c: e7d2 b.n 800dc44 <__sfvwrite_r+0x114>
- 800dc9e: 465a mov r2, fp
- 800dca0: 6921 ldr r1, [r4, #16]
- 800dca2: 9001 str r0, [sp, #4]
- 800dca4: f000 fb67 bl 800e376 <memcpy>
- 800dca8: 89a2 ldrh r2, [r4, #12]
- 800dcaa: 9b01 ldr r3, [sp, #4]
- 800dcac: f422 6290 bic.w r2, r2, #1152 ; 0x480
- 800dcb0: f042 0280 orr.w r2, r2, #128 ; 0x80
- 800dcb4: 81a2 strh r2, [r4, #12]
- 800dcb6: 6123 str r3, [r4, #16]
- 800dcb8: 6167 str r7, [r4, #20]
- 800dcba: 445b add r3, fp
- 800dcbc: eba7 070b sub.w r7, r7, fp
- 800dcc0: 6023 str r3, [r4, #0]
- 800dcc2: 60a7 str r7, [r4, #8]
- 800dcc4: 4653 mov r3, sl
- 800dcc6: 4553 cmp r3, sl
- 800dcc8: bf28 it cs
- 800dcca: 4653 movcs r3, sl
- 800dccc: 461a mov r2, r3
- 800dcce: 4629 mov r1, r5
- 800dcd0: 6820 ldr r0, [r4, #0]
- 800dcd2: 9301 str r3, [sp, #4]
- 800dcd4: f000 fb5a bl 800e38c <memmove>
- 800dcd8: 68a2 ldr r2, [r4, #8]
- 800dcda: 9b01 ldr r3, [sp, #4]
- 800dcdc: 1ad2 subs r2, r2, r3
- 800dcde: 60a2 str r2, [r4, #8]
- 800dce0: 6822 ldr r2, [r4, #0]
- 800dce2: 4413 add r3, r2
- 800dce4: 4657 mov r7, sl
- 800dce6: 6023 str r3, [r4, #0]
- 800dce8: f8d9 3008 ldr.w r3, [r9, #8]
- 800dcec: 443d add r5, r7
- 800dcee: ebaa 0a07 sub.w sl, sl, r7
- 800dcf2: 1bdf subs r7, r3, r7
- 800dcf4: f8c9 7008 str.w r7, [r9, #8]
- 800dcf8: 2f00 cmp r7, #0
- 800dcfa: d1a3 bne.n 800dc44 <__sfvwrite_r+0x114>
- 800dcfc: e71f b.n 800db3e <__sfvwrite_r+0xe>
- 800dcfe: 463a mov r2, r7
- 800dd00: 4640 mov r0, r8
- 800dd02: f000 fbad bl 800e460 <_realloc_r>
- 800dd06: 4603 mov r3, r0
- 800dd08: 2800 cmp r0, #0
- 800dd0a: d1d4 bne.n 800dcb6 <__sfvwrite_r+0x186>
- 800dd0c: 6921 ldr r1, [r4, #16]
- 800dd0e: 4640 mov r0, r8
- 800dd10: f002 ffe0 bl 8010cd4 <_free_r>
- 800dd14: 89a3 ldrh r3, [r4, #12]
- 800dd16: f023 0380 bic.w r3, r3, #128 ; 0x80
- 800dd1a: 81a3 strh r3, [r4, #12]
- 800dd1c: e7b5 b.n 800dc8a <__sfvwrite_r+0x15a>
- 800dd1e: 6922 ldr r2, [r4, #16]
- 800dd20: 4282 cmp r2, r0
- 800dd22: d302 bcc.n 800dd2a <__sfvwrite_r+0x1fa>
- 800dd24: 6962 ldr r2, [r4, #20]
- 800dd26: 4552 cmp r2, sl
- 800dd28: d916 bls.n 800dd58 <__sfvwrite_r+0x228>
- 800dd2a: 4553 cmp r3, sl
- 800dd2c: bf28 it cs
- 800dd2e: 4653 movcs r3, sl
- 800dd30: 461a mov r2, r3
- 800dd32: 4629 mov r1, r5
- 800dd34: 461f mov r7, r3
- 800dd36: f000 fb29 bl 800e38c <memmove>
- 800dd3a: 68a3 ldr r3, [r4, #8]
- 800dd3c: 6822 ldr r2, [r4, #0]
- 800dd3e: 1bdb subs r3, r3, r7
- 800dd40: 443a add r2, r7
- 800dd42: 60a3 str r3, [r4, #8]
- 800dd44: 6022 str r2, [r4, #0]
- 800dd46: 2b00 cmp r3, #0
- 800dd48: d1ce bne.n 800dce8 <__sfvwrite_r+0x1b8>
- 800dd4a: 4621 mov r1, r4
- 800dd4c: 4640 mov r0, r8
- 800dd4e: f002 fec5 bl 8010adc <_fflush_r>
- 800dd52: 2800 cmp r0, #0
- 800dd54: d0c8 beq.n 800dce8 <__sfvwrite_r+0x1b8>
- 800dd56: e79b b.n 800dc90 <__sfvwrite_r+0x160>
- 800dd58: 4b1a ldr r3, [pc, #104] ; (800ddc4 <__sfvwrite_r+0x294>)
- 800dd5a: 6a67 ldr r7, [r4, #36] ; 0x24
- 800dd5c: 69e1 ldr r1, [r4, #28]
- 800dd5e: 459a cmp sl, r3
- 800dd60: bf94 ite ls
- 800dd62: 4653 movls r3, sl
- 800dd64: f06f 4300 mvnhi.w r3, #2147483648 ; 0x80000000
- 800dd68: 4640 mov r0, r8
- 800dd6a: fb93 f3f2 sdiv r3, r3, r2
- 800dd6e: 4353 muls r3, r2
- 800dd70: 462a mov r2, r5
- 800dd72: 47b8 blx r7
- 800dd74: 1e07 subs r7, r0, #0
- 800dd76: dcb7 bgt.n 800dce8 <__sfvwrite_r+0x1b8>
- 800dd78: e78a b.n 800dc90 <__sfvwrite_r+0x160>
- 800dd7a: e9d6 ab00 ldrd sl, fp, [r6]
- 800dd7e: 2000 movs r0, #0
- 800dd80: 3608 adds r6, #8
- 800dd82: e6f3 b.n 800db6c <__sfvwrite_r+0x3c>
- 800dd84: f10b 0701 add.w r7, fp, #1
- 800dd88: e700 b.n 800db8c <__sfvwrite_r+0x5c>
- 800dd8a: 429a cmp r2, r3
- 800dd8c: dc09 bgt.n 800dda2 <__sfvwrite_r+0x272>
- 800dd8e: 6a65 ldr r5, [r4, #36] ; 0x24
- 800dd90: 69e1 ldr r1, [r4, #28]
- 800dd92: 4613 mov r3, r2
- 800dd94: 4640 mov r0, r8
- 800dd96: 4652 mov r2, sl
- 800dd98: 47a8 blx r5
- 800dd9a: 1e05 subs r5, r0, #0
- 800dd9c: f73f af12 bgt.w 800dbc4 <__sfvwrite_r+0x94>
- 800dda0: e776 b.n 800dc90 <__sfvwrite_r+0x160>
- 800dda2: 461a mov r2, r3
- 800dda4: 4651 mov r1, sl
- 800dda6: 9301 str r3, [sp, #4]
- 800dda8: f000 faf0 bl 800e38c <memmove>
- 800ddac: 9b01 ldr r3, [sp, #4]
- 800ddae: 68a2 ldr r2, [r4, #8]
- 800ddb0: 1ad2 subs r2, r2, r3
- 800ddb2: 60a2 str r2, [r4, #8]
- 800ddb4: 6822 ldr r2, [r4, #0]
- 800ddb6: 441a add r2, r3
- 800ddb8: 6022 str r2, [r4, #0]
- 800ddba: 461d mov r5, r3
- 800ddbc: e702 b.n 800dbc4 <__sfvwrite_r+0x94>
- 800ddbe: 2001 movs r0, #1
- 800ddc0: e709 b.n 800dbd6 <__sfvwrite_r+0xa6>
- 800ddc2: bf00 nop
- 800ddc4: 7ffffffe .word 0x7ffffffe
- 800ddc8: 7ffffc00 .word 0x7ffffc00
-
-0800ddcc <_fwrite_r>:
- 800ddcc: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
- 800ddd0: b086 sub sp, #24
- 800ddd2: fb02 f503 mul.w r5, r2, r3
- 800ddd6: 461e mov r6, r3
- 800ddd8: ab01 add r3, sp, #4
- 800ddda: 9303 str r3, [sp, #12]
- 800dddc: 2301 movs r3, #1
- 800ddde: 4617 mov r7, r2
- 800dde0: 9c0c ldr r4, [sp, #48] ; 0x30
- 800dde2: 9101 str r1, [sp, #4]
- 800dde4: 9502 str r5, [sp, #8]
- 800dde6: 9505 str r5, [sp, #20]
- 800dde8: 9304 str r3, [sp, #16]
- 800ddea: 4680 mov r8, r0
- 800ddec: b118 cbz r0, 800ddf6 <_fwrite_r+0x2a>
- 800ddee: 6b83 ldr r3, [r0, #56] ; 0x38
- 800ddf0: b90b cbnz r3, 800ddf6 <_fwrite_r+0x2a>
- 800ddf2: f002 fedf bl 8010bb4 <__sinit>
- 800ddf6: 6e63 ldr r3, [r4, #100] ; 0x64
- 800ddf8: 07d8 lsls r0, r3, #31
- 800ddfa: d405 bmi.n 800de08 <_fwrite_r+0x3c>
- 800ddfc: 89a3 ldrh r3, [r4, #12]
- 800ddfe: 0599 lsls r1, r3, #22
- 800de00: d402 bmi.n 800de08 <_fwrite_r+0x3c>
- 800de02: 6da0 ldr r0, [r4, #88] ; 0x58
- 800de04: f000 f860 bl 800dec8 <__retarget_lock_acquire_recursive>
- 800de08: f9b4 300c ldrsh.w r3, [r4, #12]
- 800de0c: 049a lsls r2, r3, #18
- 800de0e: d406 bmi.n 800de1e <_fwrite_r+0x52>
- 800de10: f443 5300 orr.w r3, r3, #8192 ; 0x2000
- 800de14: 81a3 strh r3, [r4, #12]
- 800de16: 6e63 ldr r3, [r4, #100] ; 0x64
- 800de18: f423 5300 bic.w r3, r3, #8192 ; 0x2000
- 800de1c: 6663 str r3, [r4, #100] ; 0x64
- 800de1e: aa03 add r2, sp, #12
- 800de20: 4621 mov r1, r4
- 800de22: 4640 mov r0, r8
- 800de24: f7ff fe84 bl 800db30 <__sfvwrite_r>
- 800de28: 6e63 ldr r3, [r4, #100] ; 0x64
- 800de2a: b958 cbnz r0, 800de44 <_fwrite_r+0x78>
- 800de2c: 07d8 lsls r0, r3, #31
- 800de2e: d405 bmi.n 800de3c <_fwrite_r+0x70>
- 800de30: 89a3 ldrh r3, [r4, #12]
- 800de32: 0599 lsls r1, r3, #22
- 800de34: d402 bmi.n 800de3c <_fwrite_r+0x70>
- 800de36: 6da0 ldr r0, [r4, #88] ; 0x58
- 800de38: f000 f847 bl 800deca <__retarget_lock_release_recursive>
- 800de3c: 4630 mov r0, r6
- 800de3e: b006 add sp, #24
- 800de40: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
- 800de44: 07da lsls r2, r3, #31
- 800de46: d405 bmi.n 800de54 <_fwrite_r+0x88>
- 800de48: 89a3 ldrh r3, [r4, #12]
- 800de4a: 059b lsls r3, r3, #22
- 800de4c: d402 bmi.n 800de54 <_fwrite_r+0x88>
- 800de4e: 6da0 ldr r0, [r4, #88] ; 0x58
- 800de50: f000 f83b bl 800deca <__retarget_lock_release_recursive>
- 800de54: 9b05 ldr r3, [sp, #20]
- 800de56: 1aed subs r5, r5, r3
- 800de58: fbb5 f6f7 udiv r6, r5, r7
- 800de5c: e7ee b.n 800de3c <_fwrite_r+0x70>
- ...
-
-0800de60 <fwrite>:
- 800de60: b507 push {r0, r1, r2, lr}
- 800de62: 9300 str r3, [sp, #0]
- 800de64: 4613 mov r3, r2
- 800de66: 460a mov r2, r1
- 800de68: 4601 mov r1, r0
- 800de6a: 4803 ldr r0, [pc, #12] ; (800de78 <fwrite+0x18>)
- 800de6c: 6800 ldr r0, [r0, #0]
- 800de6e: f7ff ffad bl 800ddcc <_fwrite_r>
- 800de72: b003 add sp, #12
- 800de74: f85d fb04 ldr.w pc, [sp], #4
- 800de78: 20000014 .word 0x20000014
-
-0800de7c <__libc_init_array>:
- 800de7c: b570 push {r4, r5, r6, lr}
- 800de7e: 4e0d ldr r6, [pc, #52] ; (800deb4 <__libc_init_array+0x38>)
- 800de80: 4c0d ldr r4, [pc, #52] ; (800deb8 <__libc_init_array+0x3c>)
- 800de82: 1ba4 subs r4, r4, r6
- 800de84: 10a4 asrs r4, r4, #2
- 800de86: 2500 movs r5, #0
- 800de88: 42a5 cmp r5, r4
- 800de8a: d109 bne.n 800dea0 <__libc_init_array+0x24>
- 800de8c: 4e0b ldr r6, [pc, #44] ; (800debc <__libc_init_array+0x40>)
- 800de8e: 4c0c ldr r4, [pc, #48] ; (800dec0 <__libc_init_array+0x44>)
- 800de90: f003 fd82 bl 8011998 <_init>
- 800de94: 1ba4 subs r4, r4, r6
- 800de96: 10a4 asrs r4, r4, #2
- 800de98: 2500 movs r5, #0
- 800de9a: 42a5 cmp r5, r4
- 800de9c: d105 bne.n 800deaa <__libc_init_array+0x2e>
- 800de9e: bd70 pop {r4, r5, r6, pc}
- 800dea0: f856 3025 ldr.w r3, [r6, r5, lsl #2]
- 800dea4: 4798 blx r3
- 800dea6: 3501 adds r5, #1
- 800dea8: e7ee b.n 800de88 <__libc_init_array+0xc>
- 800deaa: f856 3025 ldr.w r3, [r6, r5, lsl #2]
- 800deae: 4798 blx r3
- 800deb0: 3501 adds r5, #1
- 800deb2: e7f2 b.n 800de9a <__libc_init_array+0x1e>
- 800deb4: 08013328 .word 0x08013328
- 800deb8: 08013328 .word 0x08013328
- 800debc: 08013328 .word 0x08013328
- 800dec0: 08013334 .word 0x08013334
-
-0800dec4 <__retarget_lock_init_recursive>:
- 800dec4: 4770 bx lr
-
-0800dec6 <__retarget_lock_close_recursive>:
- 800dec6: 4770 bx lr
-
-0800dec8 <__retarget_lock_acquire_recursive>:
- 800dec8: 4770 bx lr
-
-0800deca <__retarget_lock_release_recursive>:
- 800deca: 4770 bx lr
-
-0800decc <malloc>:
- 800decc: 4b02 ldr r3, [pc, #8] ; (800ded8 <malloc+0xc>)
- 800dece: 4601 mov r1, r0
- 800ded0: 6818 ldr r0, [r3, #0]
- 800ded2: f000 b80b b.w 800deec <_malloc_r>
- 800ded6: bf00 nop
- 800ded8: 20000014 .word 0x20000014
-
-0800dedc <free>:
- 800dedc: 4b02 ldr r3, [pc, #8] ; (800dee8 <free+0xc>)
- 800dede: 4601 mov r1, r0
- 800dee0: 6818 ldr r0, [r3, #0]
- 800dee2: f002 bef7 b.w 8010cd4 <_free_r>
- 800dee6: bf00 nop
- 800dee8: 20000014 .word 0x20000014
-
-0800deec <_malloc_r>:
- 800deec: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
- 800def0: f101 050b add.w r5, r1, #11
- 800def4: 2d16 cmp r5, #22
- 800def6: 4606 mov r6, r0
- 800def8: d906 bls.n 800df08 <_malloc_r+0x1c>
- 800defa: f035 0507 bics.w r5, r5, #7
- 800defe: d504 bpl.n 800df0a <_malloc_r+0x1e>
- 800df00: 230c movs r3, #12
- 800df02: 6033 str r3, [r6, #0]
- 800df04: 2400 movs r4, #0
- 800df06: e1a8 b.n 800e25a <_malloc_r+0x36e>
- 800df08: 2510 movs r5, #16
- 800df0a: 428d cmp r5, r1
- 800df0c: d3f8 bcc.n 800df00 <_malloc_r+0x14>
- 800df0e: 4630 mov r0, r6
- 800df10: f000 fa5e bl 800e3d0 <__malloc_lock>
- 800df14: f5b5 7ffc cmp.w r5, #504 ; 0x1f8
- 800df18: 4fc0 ldr r7, [pc, #768] ; (800e21c <_malloc_r+0x330>)
- 800df1a: d238 bcs.n 800df8e <_malloc_r+0xa2>
- 800df1c: f105 0208 add.w r2, r5, #8
- 800df20: 443a add r2, r7
- 800df22: f1a2 0108 sub.w r1, r2, #8
- 800df26: 6854 ldr r4, [r2, #4]
- 800df28: 428c cmp r4, r1
- 800df2a: ea4f 03d5 mov.w r3, r5, lsr #3
- 800df2e: d102 bne.n 800df36 <_malloc_r+0x4a>
- 800df30: 68d4 ldr r4, [r2, #12]
- 800df32: 42a2 cmp r2, r4
- 800df34: d010 beq.n 800df58 <_malloc_r+0x6c>
- 800df36: 6863 ldr r3, [r4, #4]
- 800df38: e9d4 1202 ldrd r1, r2, [r4, #8]
- 800df3c: f023 0303 bic.w r3, r3, #3
- 800df40: 60ca str r2, [r1, #12]
- 800df42: 4423 add r3, r4
- 800df44: 6091 str r1, [r2, #8]
- 800df46: 685a ldr r2, [r3, #4]
- 800df48: f042 0201 orr.w r2, r2, #1
- 800df4c: 605a str r2, [r3, #4]
- 800df4e: 4630 mov r0, r6
- 800df50: f000 fa44 bl 800e3dc <__malloc_unlock>
- 800df54: 3408 adds r4, #8
- 800df56: e180 b.n 800e25a <_malloc_r+0x36e>
- 800df58: 3302 adds r3, #2
- 800df5a: 4ab1 ldr r2, [pc, #708] ; (800e220 <_malloc_r+0x334>)
- 800df5c: 693c ldr r4, [r7, #16]
- 800df5e: 4294 cmp r4, r2
- 800df60: 4611 mov r1, r2
- 800df62: d075 beq.n 800e050 <_malloc_r+0x164>
- 800df64: 6860 ldr r0, [r4, #4]
- 800df66: f020 0c03 bic.w ip, r0, #3
- 800df6a: ebac 0005 sub.w r0, ip, r5
- 800df6e: 280f cmp r0, #15
- 800df70: dd48 ble.n 800e004 <_malloc_r+0x118>
- 800df72: 1963 adds r3, r4, r5
- 800df74: f045 0501 orr.w r5, r5, #1
- 800df78: 6065 str r5, [r4, #4]
- 800df7a: e9c7 3304 strd r3, r3, [r7, #16]
- 800df7e: e9c3 2202 strd r2, r2, [r3, #8]
- 800df82: f040 0201 orr.w r2, r0, #1
- 800df86: 605a str r2, [r3, #4]
- 800df88: f844 000c str.w r0, [r4, ip]
- 800df8c: e7df b.n 800df4e <_malloc_r+0x62>
- 800df8e: 0a6b lsrs r3, r5, #9
- 800df90: d02a beq.n 800dfe8 <_malloc_r+0xfc>
- 800df92: 2b04 cmp r3, #4
- 800df94: d812 bhi.n 800dfbc <_malloc_r+0xd0>
- 800df96: 09ab lsrs r3, r5, #6
- 800df98: 3338 adds r3, #56 ; 0x38
- 800df9a: 1c5a adds r2, r3, #1
- 800df9c: eb07 02c2 add.w r2, r7, r2, lsl #3
- 800dfa0: f1a2 0c08 sub.w ip, r2, #8
- 800dfa4: 6854 ldr r4, [r2, #4]
- 800dfa6: 4564 cmp r4, ip
- 800dfa8: d006 beq.n 800dfb8 <_malloc_r+0xcc>
- 800dfaa: 6862 ldr r2, [r4, #4]
- 800dfac: f022 0203 bic.w r2, r2, #3
- 800dfb0: 1b50 subs r0, r2, r5
- 800dfb2: 280f cmp r0, #15
- 800dfb4: dd1c ble.n 800dff0 <_malloc_r+0x104>
- 800dfb6: 3b01 subs r3, #1
- 800dfb8: 3301 adds r3, #1
- 800dfba: e7ce b.n 800df5a <_malloc_r+0x6e>
- 800dfbc: 2b14 cmp r3, #20
- 800dfbe: d801 bhi.n 800dfc4 <_malloc_r+0xd8>
- 800dfc0: 335b adds r3, #91 ; 0x5b
- 800dfc2: e7ea b.n 800df9a <_malloc_r+0xae>
- 800dfc4: 2b54 cmp r3, #84 ; 0x54
- 800dfc6: d802 bhi.n 800dfce <_malloc_r+0xe2>
- 800dfc8: 0b2b lsrs r3, r5, #12
- 800dfca: 336e adds r3, #110 ; 0x6e
- 800dfcc: e7e5 b.n 800df9a <_malloc_r+0xae>
- 800dfce: f5b3 7faa cmp.w r3, #340 ; 0x154
- 800dfd2: d802 bhi.n 800dfda <_malloc_r+0xee>
- 800dfd4: 0beb lsrs r3, r5, #15
- 800dfd6: 3377 adds r3, #119 ; 0x77
- 800dfd8: e7df b.n 800df9a <_malloc_r+0xae>
- 800dfda: f240 5254 movw r2, #1364 ; 0x554
- 800dfde: 4293 cmp r3, r2
- 800dfe0: d804 bhi.n 800dfec <_malloc_r+0x100>
- 800dfe2: 0cab lsrs r3, r5, #18
- 800dfe4: 337c adds r3, #124 ; 0x7c
- 800dfe6: e7d8 b.n 800df9a <_malloc_r+0xae>
- 800dfe8: 233f movs r3, #63 ; 0x3f
- 800dfea: e7d6 b.n 800df9a <_malloc_r+0xae>
- 800dfec: 237e movs r3, #126 ; 0x7e
- 800dfee: e7d4 b.n 800df9a <_malloc_r+0xae>
- 800dff0: 2800 cmp r0, #0
- 800dff2: 68e1 ldr r1, [r4, #12]
- 800dff4: db04 blt.n 800e000 <_malloc_r+0x114>
- 800dff6: 68a3 ldr r3, [r4, #8]
- 800dff8: 60d9 str r1, [r3, #12]
- 800dffa: 608b str r3, [r1, #8]
- 800dffc: 18a3 adds r3, r4, r2
- 800dffe: e7a2 b.n 800df46 <_malloc_r+0x5a>
- 800e000: 460c mov r4, r1
- 800e002: e7d0 b.n 800dfa6 <_malloc_r+0xba>
- 800e004: 2800 cmp r0, #0
- 800e006: e9c7 2204 strd r2, r2, [r7, #16]
- 800e00a: db07 blt.n 800e01c <_malloc_r+0x130>
- 800e00c: 44a4 add ip, r4
- 800e00e: f8dc 3004 ldr.w r3, [ip, #4]
- 800e012: f043 0301 orr.w r3, r3, #1
- 800e016: f8cc 3004 str.w r3, [ip, #4]
- 800e01a: e798 b.n 800df4e <_malloc_r+0x62>
- 800e01c: f5bc 7f00 cmp.w ip, #512 ; 0x200
- 800e020: 6878 ldr r0, [r7, #4]
- 800e022: f080 8099 bcs.w 800e158 <_malloc_r+0x26c>
- 800e026: ea4f 0cdc mov.w ip, ip, lsr #3
- 800e02a: ea4f 0eac mov.w lr, ip, asr #2
- 800e02e: 2201 movs r2, #1
- 800e030: f10c 0c01 add.w ip, ip, #1
- 800e034: fa02 f20e lsl.w r2, r2, lr
- 800e038: 4310 orrs r0, r2
- 800e03a: 6078 str r0, [r7, #4]
- 800e03c: eb07 02cc add.w r2, r7, ip, lsl #3
- 800e040: f857 003c ldr.w r0, [r7, ip, lsl #3]
- 800e044: 3a08 subs r2, #8
- 800e046: e9c4 0202 strd r0, r2, [r4, #8]
- 800e04a: f847 403c str.w r4, [r7, ip, lsl #3]
- 800e04e: 60c4 str r4, [r0, #12]
- 800e050: 2001 movs r0, #1
- 800e052: 109a asrs r2, r3, #2
- 800e054: fa00 f202 lsl.w r2, r0, r2
- 800e058: 6878 ldr r0, [r7, #4]
- 800e05a: 4290 cmp r0, r2
- 800e05c: d326 bcc.n 800e0ac <_malloc_r+0x1c0>
- 800e05e: 4210 tst r0, r2
- 800e060: d106 bne.n 800e070 <_malloc_r+0x184>
- 800e062: f023 0303 bic.w r3, r3, #3
- 800e066: 0052 lsls r2, r2, #1
- 800e068: 4210 tst r0, r2
- 800e06a: f103 0304 add.w r3, r3, #4
- 800e06e: d0fa beq.n 800e066 <_malloc_r+0x17a>
- 800e070: eb07 0cc3 add.w ip, r7, r3, lsl #3
- 800e074: 46e1 mov r9, ip
- 800e076: 4698 mov r8, r3
- 800e078: f8d9 400c ldr.w r4, [r9, #12]
- 800e07c: 454c cmp r4, r9
- 800e07e: f040 80af bne.w 800e1e0 <_malloc_r+0x2f4>
- 800e082: f108 0801 add.w r8, r8, #1
- 800e086: f018 0f03 tst.w r8, #3
- 800e08a: f109 0908 add.w r9, r9, #8
- 800e08e: d1f3 bne.n 800e078 <_malloc_r+0x18c>
- 800e090: 0798 lsls r0, r3, #30
- 800e092: f040 80e8 bne.w 800e266 <_malloc_r+0x37a>
- 800e096: 687b ldr r3, [r7, #4]
- 800e098: ea23 0302 bic.w r3, r3, r2
- 800e09c: 607b str r3, [r7, #4]
- 800e09e: 6878 ldr r0, [r7, #4]
- 800e0a0: 0052 lsls r2, r2, #1
- 800e0a2: 4290 cmp r0, r2
- 800e0a4: d302 bcc.n 800e0ac <_malloc_r+0x1c0>
- 800e0a6: 2a00 cmp r2, #0
- 800e0a8: f040 80ec bne.w 800e284 <_malloc_r+0x398>
- 800e0ac: f8d7 a008 ldr.w sl, [r7, #8]
- 800e0b0: f8da 4004 ldr.w r4, [sl, #4]
- 800e0b4: f024 0203 bic.w r2, r4, #3
- 800e0b8: 42aa cmp r2, r5
- 800e0ba: d303 bcc.n 800e0c4 <_malloc_r+0x1d8>
- 800e0bc: 1b53 subs r3, r2, r5
- 800e0be: 2b0f cmp r3, #15
- 800e0c0: f300 8140 bgt.w 800e344 <_malloc_r+0x458>
- 800e0c4: 4b57 ldr r3, [pc, #348] ; (800e224 <_malloc_r+0x338>)
- 800e0c6: 9200 str r2, [sp, #0]
- 800e0c8: 2008 movs r0, #8
- 800e0ca: 681c ldr r4, [r3, #0]
- 800e0cc: f001 fdd8 bl 800fc80 <sysconf>
- 800e0d0: 4b55 ldr r3, [pc, #340] ; (800e228 <_malloc_r+0x33c>)
- 800e0d2: 9a00 ldr r2, [sp, #0]
- 800e0d4: 6819 ldr r1, [r3, #0]
- 800e0d6: 3410 adds r4, #16
- 800e0d8: 3101 adds r1, #1
- 800e0da: 442c add r4, r5
- 800e0dc: bf1f itttt ne
- 800e0de: f104 34ff addne.w r4, r4, #4294967295 ; 0xffffffff
- 800e0e2: 1824 addne r4, r4, r0
- 800e0e4: 4241 negne r1, r0
- 800e0e6: 400c andne r4, r1
- 800e0e8: 4680 mov r8, r0
- 800e0ea: 4621 mov r1, r4
- 800e0ec: 4630 mov r0, r6
- 800e0ee: e9cd 2300 strd r2, r3, [sp]
- 800e0f2: f000 fb5d bl 800e7b0 <_sbrk_r>
- 800e0f6: f1b0 3fff cmp.w r0, #4294967295 ; 0xffffffff
- 800e0fa: 4683 mov fp, r0
- 800e0fc: f000 80fb beq.w 800e2f6 <_malloc_r+0x40a>
- 800e100: 9a00 ldr r2, [sp, #0]
- 800e102: 9b01 ldr r3, [sp, #4]
- 800e104: eb0a 0102 add.w r1, sl, r2
- 800e108: 4281 cmp r1, r0
- 800e10a: d902 bls.n 800e112 <_malloc_r+0x226>
- 800e10c: 45ba cmp sl, r7
- 800e10e: f040 80f2 bne.w 800e2f6 <_malloc_r+0x40a>
- 800e112: f8df 9120 ldr.w r9, [pc, #288] ; 800e234 <_malloc_r+0x348>
- 800e116: f8d9 0000 ldr.w r0, [r9]
- 800e11a: 4559 cmp r1, fp
- 800e11c: eb00 0e04 add.w lr, r0, r4
- 800e120: f8c9 e000 str.w lr, [r9]
- 800e124: f108 3cff add.w ip, r8, #4294967295 ; 0xffffffff
- 800e128: f040 80ae bne.w 800e288 <_malloc_r+0x39c>
- 800e12c: ea11 0f0c tst.w r1, ip
- 800e130: f040 80aa bne.w 800e288 <_malloc_r+0x39c>
- 800e134: 68bb ldr r3, [r7, #8]
- 800e136: 4414 add r4, r2
- 800e138: f044 0401 orr.w r4, r4, #1
- 800e13c: 605c str r4, [r3, #4]
- 800e13e: 4a3b ldr r2, [pc, #236] ; (800e22c <_malloc_r+0x340>)
- 800e140: f8d9 3000 ldr.w r3, [r9]
- 800e144: 6811 ldr r1, [r2, #0]
- 800e146: 428b cmp r3, r1
- 800e148: bf88 it hi
- 800e14a: 6013 strhi r3, [r2, #0]
- 800e14c: 4a38 ldr r2, [pc, #224] ; (800e230 <_malloc_r+0x344>)
- 800e14e: 6811 ldr r1, [r2, #0]
- 800e150: 428b cmp r3, r1
- 800e152: bf88 it hi
- 800e154: 6013 strhi r3, [r2, #0]
- 800e156: e0ce b.n 800e2f6 <_malloc_r+0x40a>
- 800e158: ea4f 225c mov.w r2, ip, lsr #9
- 800e15c: 2a04 cmp r2, #4
- 800e15e: d818 bhi.n 800e192 <_malloc_r+0x2a6>
- 800e160: ea4f 129c mov.w r2, ip, lsr #6
- 800e164: 3238 adds r2, #56 ; 0x38
- 800e166: f102 0e01 add.w lr, r2, #1
- 800e16a: eb07 08c2 add.w r8, r7, r2, lsl #3
- 800e16e: f857 e03e ldr.w lr, [r7, lr, lsl #3]
- 800e172: 45f0 cmp r8, lr
- 800e174: d12b bne.n 800e1ce <_malloc_r+0x2e2>
- 800e176: 1092 asrs r2, r2, #2
- 800e178: f04f 0c01 mov.w ip, #1
- 800e17c: fa0c f202 lsl.w r2, ip, r2
- 800e180: 4310 orrs r0, r2
- 800e182: 6078 str r0, [r7, #4]
- 800e184: e9c4 e802 strd lr, r8, [r4, #8]
- 800e188: f8c8 4008 str.w r4, [r8, #8]
- 800e18c: f8ce 400c str.w r4, [lr, #12]
- 800e190: e75e b.n 800e050 <_malloc_r+0x164>
- 800e192: 2a14 cmp r2, #20
- 800e194: d801 bhi.n 800e19a <_malloc_r+0x2ae>
- 800e196: 325b adds r2, #91 ; 0x5b
- 800e198: e7e5 b.n 800e166 <_malloc_r+0x27a>
- 800e19a: 2a54 cmp r2, #84 ; 0x54
- 800e19c: d803 bhi.n 800e1a6 <_malloc_r+0x2ba>
- 800e19e: ea4f 321c mov.w r2, ip, lsr #12
- 800e1a2: 326e adds r2, #110 ; 0x6e
- 800e1a4: e7df b.n 800e166 <_malloc_r+0x27a>
- 800e1a6: f5b2 7faa cmp.w r2, #340 ; 0x154
- 800e1aa: d803 bhi.n 800e1b4 <_malloc_r+0x2c8>
- 800e1ac: ea4f 32dc mov.w r2, ip, lsr #15
- 800e1b0: 3277 adds r2, #119 ; 0x77
- 800e1b2: e7d8 b.n 800e166 <_malloc_r+0x27a>
- 800e1b4: f240 5e54 movw lr, #1364 ; 0x554
- 800e1b8: 4572 cmp r2, lr
- 800e1ba: bf9a itte ls
- 800e1bc: ea4f 429c movls.w r2, ip, lsr #18
- 800e1c0: 327c addls r2, #124 ; 0x7c
- 800e1c2: 227e movhi r2, #126 ; 0x7e
- 800e1c4: e7cf b.n 800e166 <_malloc_r+0x27a>
- 800e1c6: f8de e008 ldr.w lr, [lr, #8]
- 800e1ca: 45f0 cmp r8, lr
- 800e1cc: d005 beq.n 800e1da <_malloc_r+0x2ee>
- 800e1ce: f8de 2004 ldr.w r2, [lr, #4]
- 800e1d2: f022 0203 bic.w r2, r2, #3
- 800e1d6: 4562 cmp r2, ip
- 800e1d8: d8f5 bhi.n 800e1c6 <_malloc_r+0x2da>
- 800e1da: f8de 800c ldr.w r8, [lr, #12]
- 800e1de: e7d1 b.n 800e184 <_malloc_r+0x298>
- 800e1e0: 6860 ldr r0, [r4, #4]
- 800e1e2: f8d4 e00c ldr.w lr, [r4, #12]
- 800e1e6: f020 0003 bic.w r0, r0, #3
- 800e1ea: eba0 0a05 sub.w sl, r0, r5
- 800e1ee: f1ba 0f0f cmp.w sl, #15
- 800e1f2: dd21 ble.n 800e238 <_malloc_r+0x34c>
- 800e1f4: 68a2 ldr r2, [r4, #8]
- 800e1f6: 1963 adds r3, r4, r5
- 800e1f8: f045 0501 orr.w r5, r5, #1
- 800e1fc: 6065 str r5, [r4, #4]
- 800e1fe: f8c2 e00c str.w lr, [r2, #12]
- 800e202: f8ce 2008 str.w r2, [lr, #8]
- 800e206: f04a 0201 orr.w r2, sl, #1
- 800e20a: e9c7 3304 strd r3, r3, [r7, #16]
- 800e20e: e9c3 1102 strd r1, r1, [r3, #8]
- 800e212: 605a str r2, [r3, #4]
- 800e214: f844 a000 str.w sl, [r4, r0]
- 800e218: e699 b.n 800df4e <_malloc_r+0x62>
- 800e21a: bf00 nop
- 800e21c: 20000440 .word 0x20000440
- 800e220: 20000448 .word 0x20000448
- 800e224: 20000af4 .word 0x20000af4
- 800e228: 20000848 .word 0x20000848
- 800e22c: 20000aec .word 0x20000aec
- 800e230: 20000af0 .word 0x20000af0
- 800e234: 20000ac4 .word 0x20000ac4
- 800e238: f1ba 0f00 cmp.w sl, #0
- 800e23c: db11 blt.n 800e262 <_malloc_r+0x376>
- 800e23e: 4420 add r0, r4
- 800e240: 6843 ldr r3, [r0, #4]
- 800e242: f043 0301 orr.w r3, r3, #1
- 800e246: 6043 str r3, [r0, #4]
- 800e248: f854 3f08 ldr.w r3, [r4, #8]!
- 800e24c: 4630 mov r0, r6
- 800e24e: f8c3 e00c str.w lr, [r3, #12]
- 800e252: f8ce 3008 str.w r3, [lr, #8]
- 800e256: f000 f8c1 bl 800e3dc <__malloc_unlock>
- 800e25a: 4620 mov r0, r4
- 800e25c: b003 add sp, #12
- 800e25e: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
- 800e262: 4674 mov r4, lr
- 800e264: e70a b.n 800e07c <_malloc_r+0x190>
- 800e266: f1ac 0008 sub.w r0, ip, #8
- 800e26a: f8dc c000 ldr.w ip, [ip]
- 800e26e: 4584 cmp ip, r0
- 800e270: f103 33ff add.w r3, r3, #4294967295 ; 0xffffffff
- 800e274: f43f af0c beq.w 800e090 <_malloc_r+0x1a4>
- 800e278: e711 b.n 800e09e <_malloc_r+0x1b2>
- 800e27a: 3304 adds r3, #4
- 800e27c: 0052 lsls r2, r2, #1
- 800e27e: 4210 tst r0, r2
- 800e280: d0fb beq.n 800e27a <_malloc_r+0x38e>
- 800e282: e6f5 b.n 800e070 <_malloc_r+0x184>
- 800e284: 4643 mov r3, r8
- 800e286: e7fa b.n 800e27e <_malloc_r+0x392>
- 800e288: 6818 ldr r0, [r3, #0]
- 800e28a: 9200 str r2, [sp, #0]
- 800e28c: 3001 adds r0, #1
- 800e28e: bf1b ittet ne
- 800e290: ebab 0101 subne.w r1, fp, r1
- 800e294: 4471 addne r1, lr
- 800e296: f8c3 b000 streq.w fp, [r3]
- 800e29a: f8c9 1000 strne.w r1, [r9]
- 800e29e: f01b 0307 ands.w r3, fp, #7
- 800e2a2: bf1c itt ne
- 800e2a4: f1c3 0308 rsbne r3, r3, #8
- 800e2a8: 449b addne fp, r3
- 800e2aa: 445c add r4, fp
- 800e2ac: 4498 add r8, r3
- 800e2ae: ea04 030c and.w r3, r4, ip
- 800e2b2: eba8 0803 sub.w r8, r8, r3
- 800e2b6: 4641 mov r1, r8
- 800e2b8: 4630 mov r0, r6
- 800e2ba: f000 fa79 bl 800e7b0 <_sbrk_r>
- 800e2be: 1c43 adds r3, r0, #1
- 800e2c0: bf04 itt eq
- 800e2c2: 4658 moveq r0, fp
- 800e2c4: f04f 0800 moveq.w r8, #0
- 800e2c8: f8d9 3000 ldr.w r3, [r9]
- 800e2cc: f8c7 b008 str.w fp, [r7, #8]
- 800e2d0: eba0 000b sub.w r0, r0, fp
- 800e2d4: 4440 add r0, r8
- 800e2d6: 4443 add r3, r8
- 800e2d8: f040 0001 orr.w r0, r0, #1
- 800e2dc: 45ba cmp sl, r7
- 800e2de: 9a00 ldr r2, [sp, #0]
- 800e2e0: f8c9 3000 str.w r3, [r9]
- 800e2e4: f8cb 0004 str.w r0, [fp, #4]
- 800e2e8: f43f af29 beq.w 800e13e <_malloc_r+0x252>
- 800e2ec: 2a0f cmp r2, #15
- 800e2ee: d810 bhi.n 800e312 <_malloc_r+0x426>
- 800e2f0: 2301 movs r3, #1
- 800e2f2: f8cb 3004 str.w r3, [fp, #4]
- 800e2f6: 68bb ldr r3, [r7, #8]
- 800e2f8: 685a ldr r2, [r3, #4]
- 800e2fa: f022 0203 bic.w r2, r2, #3
- 800e2fe: 42aa cmp r2, r5
- 800e300: eba2 0305 sub.w r3, r2, r5
- 800e304: d301 bcc.n 800e30a <_malloc_r+0x41e>
- 800e306: 2b0f cmp r3, #15
- 800e308: dc1c bgt.n 800e344 <_malloc_r+0x458>
- 800e30a: 4630 mov r0, r6
- 800e30c: f000 f866 bl 800e3dc <__malloc_unlock>
- 800e310: e5f8 b.n 800df04 <_malloc_r+0x18>
- 800e312: f8da 3004 ldr.w r3, [sl, #4]
- 800e316: f1a2 040c sub.w r4, r2, #12
- 800e31a: f024 0407 bic.w r4, r4, #7
- 800e31e: f003 0301 and.w r3, r3, #1
- 800e322: 4323 orrs r3, r4
- 800e324: f8ca 3004 str.w r3, [sl, #4]
- 800e328: 2205 movs r2, #5
- 800e32a: eb0a 0304 add.w r3, sl, r4
- 800e32e: 2c0f cmp r4, #15
- 800e330: e9c3 2201 strd r2, r2, [r3, #4]
- 800e334: f67f af03 bls.w 800e13e <_malloc_r+0x252>
- 800e338: f10a 0108 add.w r1, sl, #8
- 800e33c: 4630 mov r0, r6
- 800e33e: f002 fcc9 bl 8010cd4 <_free_r>
- 800e342: e6fc b.n 800e13e <_malloc_r+0x252>
- 800e344: 68bc ldr r4, [r7, #8]
- 800e346: f045 0201 orr.w r2, r5, #1
- 800e34a: 4425 add r5, r4
- 800e34c: f043 0301 orr.w r3, r3, #1
- 800e350: 6062 str r2, [r4, #4]
- 800e352: 60bd str r5, [r7, #8]
- 800e354: 606b str r3, [r5, #4]
- 800e356: e5fa b.n 800df4e <_malloc_r+0x62>
-
-0800e358 <memcmp>:
- 800e358: b530 push {r4, r5, lr}
- 800e35a: 2400 movs r4, #0
- 800e35c: 42a2 cmp r2, r4
- 800e35e: d101 bne.n 800e364 <memcmp+0xc>
- 800e360: 2000 movs r0, #0
- 800e362: e007 b.n 800e374 <memcmp+0x1c>
- 800e364: 5d03 ldrb r3, [r0, r4]
- 800e366: 3401 adds r4, #1
- 800e368: 190d adds r5, r1, r4
- 800e36a: f815 5c01 ldrb.w r5, [r5, #-1]
- 800e36e: 42ab cmp r3, r5
- 800e370: d0f4 beq.n 800e35c <memcmp+0x4>
- 800e372: 1b58 subs r0, r3, r5
- 800e374: bd30 pop {r4, r5, pc}
-
-0800e376 <memcpy>:
- 800e376: b510 push {r4, lr}
- 800e378: 1e43 subs r3, r0, #1
- 800e37a: 440a add r2, r1
- 800e37c: 4291 cmp r1, r2
- 800e37e: d100 bne.n 800e382 <memcpy+0xc>
- 800e380: bd10 pop {r4, pc}
- 800e382: f811 4b01 ldrb.w r4, [r1], #1
- 800e386: f803 4f01 strb.w r4, [r3, #1]!
- 800e38a: e7f7 b.n 800e37c <memcpy+0x6>
-
-0800e38c <memmove>:
- 800e38c: 4288 cmp r0, r1
- 800e38e: b510 push {r4, lr}
- 800e390: eb01 0302 add.w r3, r1, r2
- 800e394: d807 bhi.n 800e3a6 <memmove+0x1a>
- 800e396: 1e42 subs r2, r0, #1
- 800e398: 4299 cmp r1, r3
- 800e39a: d00a beq.n 800e3b2 <memmove+0x26>
- 800e39c: f811 4b01 ldrb.w r4, [r1], #1
- 800e3a0: f802 4f01 strb.w r4, [r2, #1]!
- 800e3a4: e7f8 b.n 800e398 <memmove+0xc>
- 800e3a6: 4283 cmp r3, r0
- 800e3a8: d9f5 bls.n 800e396 <memmove+0xa>
- 800e3aa: 1881 adds r1, r0, r2
- 800e3ac: 1ad2 subs r2, r2, r3
- 800e3ae: 42d3 cmn r3, r2
- 800e3b0: d100 bne.n 800e3b4 <memmove+0x28>
- 800e3b2: bd10 pop {r4, pc}
- 800e3b4: f813 4d01 ldrb.w r4, [r3, #-1]!
- 800e3b8: f801 4d01 strb.w r4, [r1, #-1]!
- 800e3bc: e7f7 b.n 800e3ae <memmove+0x22>
-
-0800e3be <memset>:
- 800e3be: 4402 add r2, r0
- 800e3c0: 4603 mov r3, r0
- 800e3c2: 4293 cmp r3, r2
- 800e3c4: d100 bne.n 800e3c8 <memset+0xa>
- 800e3c6: 4770 bx lr
- 800e3c8: f803 1b01 strb.w r1, [r3], #1
- 800e3cc: e7f9 b.n 800e3c2 <memset+0x4>
- ...
-
-0800e3d0 <__malloc_lock>:
- 800e3d0: 4801 ldr r0, [pc, #4] ; (800e3d8 <__malloc_lock+0x8>)
- 800e3d2: f7ff bd79 b.w 800dec8 <__retarget_lock_acquire_recursive>
- 800e3d6: bf00 nop
- 800e3d8: 20000b00 .word 0x20000b00
-
-0800e3dc <__malloc_unlock>:
- 800e3dc: 4801 ldr r0, [pc, #4] ; (800e3e4 <__malloc_unlock+0x8>)
- 800e3de: f7ff bd74 b.w 800deca <__retarget_lock_release_recursive>
- 800e3e2: bf00 nop
- 800e3e4: 20000b00 .word 0x20000b00
-
-0800e3e8 <_putc_r>:
- 800e3e8: b570 push {r4, r5, r6, lr}
- 800e3ea: 460d mov r5, r1
- 800e3ec: 4614 mov r4, r2
- 800e3ee: 4606 mov r6, r0
- 800e3f0: b118 cbz r0, 800e3fa <_putc_r+0x12>
- 800e3f2: 6b83 ldr r3, [r0, #56] ; 0x38
- 800e3f4: b90b cbnz r3, 800e3fa <_putc_r+0x12>
- 800e3f6: f002 fbdd bl 8010bb4 <__sinit>
- 800e3fa: 6e63 ldr r3, [r4, #100] ; 0x64
- 800e3fc: 07d8 lsls r0, r3, #31
- 800e3fe: d405 bmi.n 800e40c <_putc_r+0x24>
- 800e400: 89a3 ldrh r3, [r4, #12]
- 800e402: 0599 lsls r1, r3, #22
- 800e404: d402 bmi.n 800e40c <_putc_r+0x24>
- 800e406: 6da0 ldr r0, [r4, #88] ; 0x58
- 800e408: f7ff fd5e bl 800dec8 <__retarget_lock_acquire_recursive>
- 800e40c: 68a3 ldr r3, [r4, #8]
- 800e40e: 3b01 subs r3, #1
- 800e410: 2b00 cmp r3, #0
- 800e412: 60a3 str r3, [r4, #8]
- 800e414: da05 bge.n 800e422 <_putc_r+0x3a>
- 800e416: 69a2 ldr r2, [r4, #24]
- 800e418: 4293 cmp r3, r2
- 800e41a: db12 blt.n 800e442 <_putc_r+0x5a>
- 800e41c: b2eb uxtb r3, r5
- 800e41e: 2b0a cmp r3, #10
- 800e420: d00f beq.n 800e442 <_putc_r+0x5a>
- 800e422: 6823 ldr r3, [r4, #0]
- 800e424: 1c5a adds r2, r3, #1
- 800e426: 6022 str r2, [r4, #0]
- 800e428: 701d strb r5, [r3, #0]
- 800e42a: b2ed uxtb r5, r5
- 800e42c: 6e63 ldr r3, [r4, #100] ; 0x64
- 800e42e: 07da lsls r2, r3, #31
- 800e430: d405 bmi.n 800e43e <_putc_r+0x56>
- 800e432: 89a3 ldrh r3, [r4, #12]
- 800e434: 059b lsls r3, r3, #22
- 800e436: d402 bmi.n 800e43e <_putc_r+0x56>
- 800e438: 6da0 ldr r0, [r4, #88] ; 0x58
- 800e43a: f7ff fd46 bl 800deca <__retarget_lock_release_recursive>
- 800e43e: 4628 mov r0, r5
- 800e440: bd70 pop {r4, r5, r6, pc}
- 800e442: 4629 mov r1, r5
- 800e444: 4622 mov r2, r4
- 800e446: 4630 mov r0, r6
- 800e448: f001 fc32 bl 800fcb0 <__swbuf_r>
- 800e44c: 4605 mov r5, r0
- 800e44e: e7ed b.n 800e42c <_putc_r+0x44>
-
-0800e450 <realloc>:
- 800e450: 4b02 ldr r3, [pc, #8] ; (800e45c <realloc+0xc>)
- 800e452: 460a mov r2, r1
- 800e454: 4601 mov r1, r0
- 800e456: 6818 ldr r0, [r3, #0]
- 800e458: f000 b802 b.w 800e460 <_realloc_r>
- 800e45c: 20000014 .word 0x20000014
-
-0800e460 <_realloc_r>:
- 800e460: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
- 800e464: 4682 mov sl, r0
- 800e466: 460c mov r4, r1
- 800e468: b929 cbnz r1, 800e476 <_realloc_r+0x16>
- 800e46a: 4611 mov r1, r2
- 800e46c: b003 add sp, #12
- 800e46e: e8bd 4ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
- 800e472: f7ff bd3b b.w 800deec <_malloc_r>
- 800e476: 9201 str r2, [sp, #4]
- 800e478: f7ff ffaa bl 800e3d0 <__malloc_lock>
- 800e47c: 9a01 ldr r2, [sp, #4]
- 800e47e: f854 5c04 ldr.w r5, [r4, #-4]
- 800e482: f102 080b add.w r8, r2, #11
- 800e486: f1b8 0f16 cmp.w r8, #22
- 800e48a: f1a4 0908 sub.w r9, r4, #8
- 800e48e: f025 0603 bic.w r6, r5, #3
- 800e492: d90b bls.n 800e4ac <_realloc_r+0x4c>
- 800e494: f038 0807 bics.w r8, r8, #7
- 800e498: d50a bpl.n 800e4b0 <_realloc_r+0x50>
- 800e49a: 230c movs r3, #12
- 800e49c: f8ca 3000 str.w r3, [sl]
- 800e4a0: f04f 0b00 mov.w fp, #0
- 800e4a4: 4658 mov r0, fp
- 800e4a6: b003 add sp, #12
- 800e4a8: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
- 800e4ac: f04f 0810 mov.w r8, #16
- 800e4b0: 4590 cmp r8, r2
- 800e4b2: d3f2 bcc.n 800e49a <_realloc_r+0x3a>
- 800e4b4: 45b0 cmp r8, r6
- 800e4b6: f340 8170 ble.w 800e79a <_realloc_r+0x33a>
- 800e4ba: 49a9 ldr r1, [pc, #676] ; (800e760 <_realloc_r+0x300>)
- 800e4bc: 9101 str r1, [sp, #4]
- 800e4be: f8d1 c008 ldr.w ip, [r1, #8]
- 800e4c2: eb09 0306 add.w r3, r9, r6
- 800e4c6: 459c cmp ip, r3
- 800e4c8: 6858 ldr r0, [r3, #4]
- 800e4ca: d005 beq.n 800e4d8 <_realloc_r+0x78>
- 800e4cc: f020 0101 bic.w r1, r0, #1
- 800e4d0: 4419 add r1, r3
- 800e4d2: 6849 ldr r1, [r1, #4]
- 800e4d4: 07cf lsls r7, r1, #31
- 800e4d6: d447 bmi.n 800e568 <_realloc_r+0x108>
- 800e4d8: f020 0003 bic.w r0, r0, #3
- 800e4dc: 459c cmp ip, r3
- 800e4de: eb06 0700 add.w r7, r6, r0
- 800e4e2: d119 bne.n 800e518 <_realloc_r+0xb8>
- 800e4e4: f108 0110 add.w r1, r8, #16
- 800e4e8: 42b9 cmp r1, r7
- 800e4ea: dc3f bgt.n 800e56c <_realloc_r+0x10c>
- 800e4ec: eb09 0308 add.w r3, r9, r8
- 800e4f0: 9a01 ldr r2, [sp, #4]
- 800e4f2: eba7 0708 sub.w r7, r7, r8
- 800e4f6: f047 0701 orr.w r7, r7, #1
- 800e4fa: 6093 str r3, [r2, #8]
- 800e4fc: 605f str r7, [r3, #4]
- 800e4fe: f854 3c04 ldr.w r3, [r4, #-4]
- 800e502: f003 0301 and.w r3, r3, #1
- 800e506: ea43 0308 orr.w r3, r3, r8
- 800e50a: f844 3c04 str.w r3, [r4, #-4]
- 800e50e: 4650 mov r0, sl
- 800e510: f7ff ff64 bl 800e3dc <__malloc_unlock>
- 800e514: 46a3 mov fp, r4
- 800e516: e7c5 b.n 800e4a4 <_realloc_r+0x44>
- 800e518: 45b8 cmp r8, r7
- 800e51a: dc27 bgt.n 800e56c <_realloc_r+0x10c>
- 800e51c: e9d3 3202 ldrd r3, r2, [r3, #8]
- 800e520: 60da str r2, [r3, #12]
- 800e522: 6093 str r3, [r2, #8]
- 800e524: eba7 0008 sub.w r0, r7, r8
- 800e528: f8d9 2004 ldr.w r2, [r9, #4]
- 800e52c: 280f cmp r0, #15
- 800e52e: f002 0201 and.w r2, r2, #1
- 800e532: eb09 0307 add.w r3, r9, r7
- 800e536: f240 8132 bls.w 800e79e <_realloc_r+0x33e>
- 800e53a: eb09 0108 add.w r1, r9, r8
- 800e53e: ea48 0202 orr.w r2, r8, r2
- 800e542: f040 0001 orr.w r0, r0, #1
- 800e546: f8c9 2004 str.w r2, [r9, #4]
- 800e54a: 6048 str r0, [r1, #4]
- 800e54c: 685a ldr r2, [r3, #4]
- 800e54e: f042 0201 orr.w r2, r2, #1
- 800e552: 605a str r2, [r3, #4]
- 800e554: 3108 adds r1, #8
- 800e556: 4650 mov r0, sl
- 800e558: f002 fbbc bl 8010cd4 <_free_r>
- 800e55c: 4650 mov r0, sl
- 800e55e: f7ff ff3d bl 800e3dc <__malloc_unlock>
- 800e562: f109 0b08 add.w fp, r9, #8
- 800e566: e79d b.n 800e4a4 <_realloc_r+0x44>
- 800e568: 2000 movs r0, #0
- 800e56a: 4603 mov r3, r0
- 800e56c: 07e9 lsls r1, r5, #31
- 800e56e: f100 80c6 bmi.w 800e6fe <_realloc_r+0x29e>
- 800e572: f854 5c08 ldr.w r5, [r4, #-8]
- 800e576: eba9 0505 sub.w r5, r9, r5
- 800e57a: 6869 ldr r1, [r5, #4]
- 800e57c: f021 0103 bic.w r1, r1, #3
- 800e580: eb01 0b06 add.w fp, r1, r6
- 800e584: 2b00 cmp r3, #0
- 800e586: f000 8086 beq.w 800e696 <_realloc_r+0x236>
- 800e58a: 459c cmp ip, r3
- 800e58c: eb00 070b add.w r7, r0, fp
- 800e590: d149 bne.n 800e626 <_realloc_r+0x1c6>
- 800e592: f108 0310 add.w r3, r8, #16
- 800e596: 42bb cmp r3, r7
- 800e598: dc7d bgt.n 800e696 <_realloc_r+0x236>
- 800e59a: 46ab mov fp, r5
- 800e59c: 68eb ldr r3, [r5, #12]
- 800e59e: f85b 2f08 ldr.w r2, [fp, #8]!
- 800e5a2: 60d3 str r3, [r2, #12]
- 800e5a4: 609a str r2, [r3, #8]
- 800e5a6: 1f32 subs r2, r6, #4
- 800e5a8: 2a24 cmp r2, #36 ; 0x24
- 800e5aa: d837 bhi.n 800e61c <_realloc_r+0x1bc>
- 800e5ac: 2a13 cmp r2, #19
- 800e5ae: d933 bls.n 800e618 <_realloc_r+0x1b8>
- 800e5b0: 6823 ldr r3, [r4, #0]
- 800e5b2: 60ab str r3, [r5, #8]
- 800e5b4: 6863 ldr r3, [r4, #4]
- 800e5b6: 60eb str r3, [r5, #12]
- 800e5b8: 2a1b cmp r2, #27
- 800e5ba: d81b bhi.n 800e5f4 <_realloc_r+0x194>
- 800e5bc: 3408 adds r4, #8
- 800e5be: f105 0310 add.w r3, r5, #16
- 800e5c2: 6822 ldr r2, [r4, #0]
- 800e5c4: 601a str r2, [r3, #0]
- 800e5c6: 6862 ldr r2, [r4, #4]
- 800e5c8: 605a str r2, [r3, #4]
- 800e5ca: 68a2 ldr r2, [r4, #8]
- 800e5cc: 609a str r2, [r3, #8]
- 800e5ce: eb05 0308 add.w r3, r5, r8
- 800e5d2: 9a01 ldr r2, [sp, #4]
- 800e5d4: eba7 0708 sub.w r7, r7, r8
- 800e5d8: f047 0701 orr.w r7, r7, #1
- 800e5dc: 6093 str r3, [r2, #8]
- 800e5de: 605f str r7, [r3, #4]
- 800e5e0: 686b ldr r3, [r5, #4]
- 800e5e2: f003 0301 and.w r3, r3, #1
- 800e5e6: ea43 0308 orr.w r3, r3, r8
- 800e5ea: 606b str r3, [r5, #4]
- 800e5ec: 4650 mov r0, sl
- 800e5ee: f7ff fef5 bl 800e3dc <__malloc_unlock>
- 800e5f2: e757 b.n 800e4a4 <_realloc_r+0x44>
- 800e5f4: 68a3 ldr r3, [r4, #8]
- 800e5f6: 612b str r3, [r5, #16]
- 800e5f8: 68e3 ldr r3, [r4, #12]
- 800e5fa: 616b str r3, [r5, #20]
- 800e5fc: 2a24 cmp r2, #36 ; 0x24
- 800e5fe: bf01 itttt eq
- 800e600: 6923 ldreq r3, [r4, #16]
- 800e602: 61ab streq r3, [r5, #24]
- 800e604: 6962 ldreq r2, [r4, #20]
- 800e606: 61ea streq r2, [r5, #28]
- 800e608: bf19 ittee ne
- 800e60a: 3410 addne r4, #16
- 800e60c: f105 0318 addne.w r3, r5, #24
- 800e610: f105 0320 addeq.w r3, r5, #32
- 800e614: 3418 addeq r4, #24
- 800e616: e7d4 b.n 800e5c2 <_realloc_r+0x162>
- 800e618: 465b mov r3, fp
- 800e61a: e7d2 b.n 800e5c2 <_realloc_r+0x162>
- 800e61c: 4621 mov r1, r4
- 800e61e: 4658 mov r0, fp
- 800e620: f7ff feb4 bl 800e38c <memmove>
- 800e624: e7d3 b.n 800e5ce <_realloc_r+0x16e>
- 800e626: 45b8 cmp r8, r7
- 800e628: dc35 bgt.n 800e696 <_realloc_r+0x236>
- 800e62a: e9d3 3202 ldrd r3, r2, [r3, #8]
- 800e62e: 4628 mov r0, r5
- 800e630: 60da str r2, [r3, #12]
- 800e632: 6093 str r3, [r2, #8]
- 800e634: f850 2f08 ldr.w r2, [r0, #8]!
- 800e638: 68eb ldr r3, [r5, #12]
- 800e63a: 60d3 str r3, [r2, #12]
- 800e63c: 609a str r2, [r3, #8]
- 800e63e: 1f32 subs r2, r6, #4
- 800e640: 2a24 cmp r2, #36 ; 0x24
- 800e642: d824 bhi.n 800e68e <_realloc_r+0x22e>
- 800e644: 2a13 cmp r2, #19
- 800e646: d908 bls.n 800e65a <_realloc_r+0x1fa>
- 800e648: 6823 ldr r3, [r4, #0]
- 800e64a: 60ab str r3, [r5, #8]
- 800e64c: 6863 ldr r3, [r4, #4]
- 800e64e: 60eb str r3, [r5, #12]
- 800e650: 2a1b cmp r2, #27
- 800e652: d80a bhi.n 800e66a <_realloc_r+0x20a>
- 800e654: 3408 adds r4, #8
- 800e656: f105 0010 add.w r0, r5, #16
- 800e65a: 6823 ldr r3, [r4, #0]
- 800e65c: 6003 str r3, [r0, #0]
- 800e65e: 6863 ldr r3, [r4, #4]
- 800e660: 6043 str r3, [r0, #4]
- 800e662: 68a3 ldr r3, [r4, #8]
- 800e664: 6083 str r3, [r0, #8]
- 800e666: 46a9 mov r9, r5
- 800e668: e75c b.n 800e524 <_realloc_r+0xc4>
- 800e66a: 68a3 ldr r3, [r4, #8]
- 800e66c: 612b str r3, [r5, #16]
- 800e66e: 68e3 ldr r3, [r4, #12]
- 800e670: 616b str r3, [r5, #20]
- 800e672: 2a24 cmp r2, #36 ; 0x24
- 800e674: bf01 itttt eq
- 800e676: 6923 ldreq r3, [r4, #16]
- 800e678: 61ab streq r3, [r5, #24]
- 800e67a: 6963 ldreq r3, [r4, #20]
- 800e67c: 61eb streq r3, [r5, #28]
- 800e67e: bf19 ittee ne
- 800e680: 3410 addne r4, #16
- 800e682: f105 0018 addne.w r0, r5, #24
- 800e686: f105 0020 addeq.w r0, r5, #32
- 800e68a: 3418 addeq r4, #24
- 800e68c: e7e5 b.n 800e65a <_realloc_r+0x1fa>
- 800e68e: 4621 mov r1, r4
- 800e690: f7ff fe7c bl 800e38c <memmove>
- 800e694: e7e7 b.n 800e666 <_realloc_r+0x206>
- 800e696: 45d8 cmp r8, fp
- 800e698: dc31 bgt.n 800e6fe <_realloc_r+0x29e>
- 800e69a: 4628 mov r0, r5
- 800e69c: 68eb ldr r3, [r5, #12]
- 800e69e: f850 2f08 ldr.w r2, [r0, #8]!
- 800e6a2: 60d3 str r3, [r2, #12]
- 800e6a4: 609a str r2, [r3, #8]
- 800e6a6: 1f32 subs r2, r6, #4
- 800e6a8: 2a24 cmp r2, #36 ; 0x24
- 800e6aa: d824 bhi.n 800e6f6 <_realloc_r+0x296>
- 800e6ac: 2a13 cmp r2, #19
- 800e6ae: d908 bls.n 800e6c2 <_realloc_r+0x262>
- 800e6b0: 6823 ldr r3, [r4, #0]
- 800e6b2: 60ab str r3, [r5, #8]
- 800e6b4: 6863 ldr r3, [r4, #4]
- 800e6b6: 60eb str r3, [r5, #12]
- 800e6b8: 2a1b cmp r2, #27
- 800e6ba: d80a bhi.n 800e6d2 <_realloc_r+0x272>
- 800e6bc: 3408 adds r4, #8
- 800e6be: f105 0010 add.w r0, r5, #16
- 800e6c2: 6823 ldr r3, [r4, #0]
- 800e6c4: 6003 str r3, [r0, #0]
- 800e6c6: 6863 ldr r3, [r4, #4]
- 800e6c8: 6043 str r3, [r0, #4]
- 800e6ca: 68a3 ldr r3, [r4, #8]
- 800e6cc: 6083 str r3, [r0, #8]
- 800e6ce: 465f mov r7, fp
- 800e6d0: e7c9 b.n 800e666 <_realloc_r+0x206>
- 800e6d2: 68a3 ldr r3, [r4, #8]
- 800e6d4: 612b str r3, [r5, #16]
- 800e6d6: 68e3 ldr r3, [r4, #12]
- 800e6d8: 616b str r3, [r5, #20]
- 800e6da: 2a24 cmp r2, #36 ; 0x24
- 800e6dc: bf01 itttt eq
- 800e6de: 6923 ldreq r3, [r4, #16]
- 800e6e0: 61ab streq r3, [r5, #24]
- 800e6e2: 6963 ldreq r3, [r4, #20]
- 800e6e4: 61eb streq r3, [r5, #28]
- 800e6e6: bf19 ittee ne
- 800e6e8: 3410 addne r4, #16
- 800e6ea: f105 0018 addne.w r0, r5, #24
- 800e6ee: f105 0020 addeq.w r0, r5, #32
- 800e6f2: 3418 addeq r4, #24
- 800e6f4: e7e5 b.n 800e6c2 <_realloc_r+0x262>
- 800e6f6: 4621 mov r1, r4
- 800e6f8: f7ff fe48 bl 800e38c <memmove>
- 800e6fc: e7e7 b.n 800e6ce <_realloc_r+0x26e>
- 800e6fe: 4611 mov r1, r2
- 800e700: 4650 mov r0, sl
- 800e702: f7ff fbf3 bl 800deec <_malloc_r>
- 800e706: 4683 mov fp, r0
- 800e708: 2800 cmp r0, #0
- 800e70a: f43f af6f beq.w 800e5ec <_realloc_r+0x18c>
- 800e70e: f854 3c04 ldr.w r3, [r4, #-4]
- 800e712: f023 0301 bic.w r3, r3, #1
- 800e716: 444b add r3, r9
- 800e718: f1a0 0208 sub.w r2, r0, #8
- 800e71c: 4293 cmp r3, r2
- 800e71e: d105 bne.n 800e72c <_realloc_r+0x2cc>
- 800e720: f850 7c04 ldr.w r7, [r0, #-4]
- 800e724: f027 0703 bic.w r7, r7, #3
- 800e728: 4437 add r7, r6
- 800e72a: e6fb b.n 800e524 <_realloc_r+0xc4>
- 800e72c: 1f32 subs r2, r6, #4
- 800e72e: 2a24 cmp r2, #36 ; 0x24
- 800e730: d82f bhi.n 800e792 <_realloc_r+0x332>
- 800e732: 2a13 cmp r2, #19
- 800e734: d92a bls.n 800e78c <_realloc_r+0x32c>
- 800e736: 6823 ldr r3, [r4, #0]
- 800e738: 6003 str r3, [r0, #0]
- 800e73a: 6863 ldr r3, [r4, #4]
- 800e73c: 6043 str r3, [r0, #4]
- 800e73e: 2a1b cmp r2, #27
- 800e740: d810 bhi.n 800e764 <_realloc_r+0x304>
- 800e742: f104 0208 add.w r2, r4, #8
- 800e746: f100 0308 add.w r3, r0, #8
- 800e74a: 6811 ldr r1, [r2, #0]
- 800e74c: 6019 str r1, [r3, #0]
- 800e74e: 6851 ldr r1, [r2, #4]
- 800e750: 6059 str r1, [r3, #4]
- 800e752: 6892 ldr r2, [r2, #8]
- 800e754: 609a str r2, [r3, #8]
- 800e756: 4621 mov r1, r4
- 800e758: 4650 mov r0, sl
- 800e75a: f002 fabb bl 8010cd4 <_free_r>
- 800e75e: e745 b.n 800e5ec <_realloc_r+0x18c>
- 800e760: 20000440 .word 0x20000440
- 800e764: 68a3 ldr r3, [r4, #8]
- 800e766: 6083 str r3, [r0, #8]
- 800e768: 68e3 ldr r3, [r4, #12]
- 800e76a: 60c3 str r3, [r0, #12]
- 800e76c: 2a24 cmp r2, #36 ; 0x24
- 800e76e: bf01 itttt eq
- 800e770: 6923 ldreq r3, [r4, #16]
- 800e772: 6103 streq r3, [r0, #16]
- 800e774: 6961 ldreq r1, [r4, #20]
- 800e776: 6141 streq r1, [r0, #20]
- 800e778: bf19 ittee ne
- 800e77a: f104 0210 addne.w r2, r4, #16
- 800e77e: f100 0310 addne.w r3, r0, #16
- 800e782: f104 0218 addeq.w r2, r4, #24
- 800e786: f100 0318 addeq.w r3, r0, #24
- 800e78a: e7de b.n 800e74a <_realloc_r+0x2ea>
- 800e78c: 4603 mov r3, r0
- 800e78e: 4622 mov r2, r4
- 800e790: e7db b.n 800e74a <_realloc_r+0x2ea>
- 800e792: 4621 mov r1, r4
- 800e794: f7ff fdfa bl 800e38c <memmove>
- 800e798: e7dd b.n 800e756 <_realloc_r+0x2f6>
- 800e79a: 4637 mov r7, r6
- 800e79c: e6c2 b.n 800e524 <_realloc_r+0xc4>
- 800e79e: 4317 orrs r7, r2
- 800e7a0: f8c9 7004 str.w r7, [r9, #4]
- 800e7a4: 685a ldr r2, [r3, #4]
- 800e7a6: f042 0201 orr.w r2, r2, #1
- 800e7aa: 605a str r2, [r3, #4]
- 800e7ac: e6d6 b.n 800e55c <_realloc_r+0xfc>
- 800e7ae: bf00 nop
-
-0800e7b0 <_sbrk_r>:
- 800e7b0: b538 push {r3, r4, r5, lr}
- 800e7b2: 4c06 ldr r4, [pc, #24] ; (800e7cc <_sbrk_r+0x1c>)
- 800e7b4: 2300 movs r3, #0
- 800e7b6: 4605 mov r5, r0
- 800e7b8: 4608 mov r0, r1
- 800e7ba: 6023 str r3, [r4, #0]
- 800e7bc: f7fe f81e bl 800c7fc <_sbrk>
- 800e7c0: 1c43 adds r3, r0, #1
- 800e7c2: d102 bne.n 800e7ca <_sbrk_r+0x1a>
- 800e7c4: 6823 ldr r3, [r4, #0]
- 800e7c6: b103 cbz r3, 800e7ca <_sbrk_r+0x1a>
- 800e7c8: 602b str r3, [r5, #0]
- 800e7ca: bd38 pop {r3, r4, r5, pc}
- 800e7cc: 20000b08 .word 0x20000b08
-
-0800e7d0 <_raise_r>:
- 800e7d0: 291f cmp r1, #31
- 800e7d2: b538 push {r3, r4, r5, lr}
- 800e7d4: 4604 mov r4, r0
- 800e7d6: 460d mov r5, r1
- 800e7d8: d904 bls.n 800e7e4 <_raise_r+0x14>
- 800e7da: 2316 movs r3, #22
- 800e7dc: 6003 str r3, [r0, #0]
- 800e7de: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
- 800e7e2: bd38 pop {r3, r4, r5, pc}
- 800e7e4: f8d0 22dc ldr.w r2, [r0, #732] ; 0x2dc
- 800e7e8: b112 cbz r2, 800e7f0 <_raise_r+0x20>
- 800e7ea: f852 3021 ldr.w r3, [r2, r1, lsl #2]
- 800e7ee: b94b cbnz r3, 800e804 <_raise_r+0x34>
- 800e7f0: 4620 mov r0, r4
- 800e7f2: f000 f831 bl 800e858 <_getpid_r>
- 800e7f6: 462a mov r2, r5
- 800e7f8: 4601 mov r1, r0
- 800e7fa: 4620 mov r0, r4
- 800e7fc: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr}
- 800e800: f000 b818 b.w 800e834 <_kill_r>
- 800e804: 2b01 cmp r3, #1
- 800e806: d00a beq.n 800e81e <_raise_r+0x4e>
- 800e808: 1c59 adds r1, r3, #1
- 800e80a: d103 bne.n 800e814 <_raise_r+0x44>
- 800e80c: 2316 movs r3, #22
- 800e80e: 6003 str r3, [r0, #0]
- 800e810: 2001 movs r0, #1
- 800e812: e7e6 b.n 800e7e2 <_raise_r+0x12>
- 800e814: 2400 movs r4, #0
- 800e816: f842 4025 str.w r4, [r2, r5, lsl #2]
- 800e81a: 4628 mov r0, r5
- 800e81c: 4798 blx r3
- 800e81e: 2000 movs r0, #0
- 800e820: e7df b.n 800e7e2 <_raise_r+0x12>
- ...
-
-0800e824 <raise>:
- 800e824: 4b02 ldr r3, [pc, #8] ; (800e830 <raise+0xc>)
- 800e826: 4601 mov r1, r0
- 800e828: 6818 ldr r0, [r3, #0]
- 800e82a: f7ff bfd1 b.w 800e7d0 <_raise_r>
- 800e82e: bf00 nop
- 800e830: 20000014 .word 0x20000014
-
-0800e834 <_kill_r>:
- 800e834: b538 push {r3, r4, r5, lr}
- 800e836: 4c07 ldr r4, [pc, #28] ; (800e854 <_kill_r+0x20>)
- 800e838: 2300 movs r3, #0
- 800e83a: 4605 mov r5, r0
- 800e83c: 4608 mov r0, r1
- 800e83e: 4611 mov r1, r2
- 800e840: 6023 str r3, [r4, #0]
- 800e842: f7fd ff53 bl 800c6ec <_kill>
- 800e846: 1c43 adds r3, r0, #1
- 800e848: d102 bne.n 800e850 <_kill_r+0x1c>
- 800e84a: 6823 ldr r3, [r4, #0]
- 800e84c: b103 cbz r3, 800e850 <_kill_r+0x1c>
- 800e84e: 602b str r3, [r5, #0]
- 800e850: bd38 pop {r3, r4, r5, pc}
- 800e852: bf00 nop
- 800e854: 20000b08 .word 0x20000b08
-
-0800e858 <_getpid_r>:
- 800e858: f7fd bf40 b.w 800c6dc <_getpid>
-
-0800e85c <sprintf>:
- 800e85c: b40e push {r1, r2, r3}
- 800e85e: b500 push {lr}
- 800e860: b09c sub sp, #112 ; 0x70
- 800e862: ab1d add r3, sp, #116 ; 0x74
- 800e864: 9002 str r0, [sp, #8]
- 800e866: 9006 str r0, [sp, #24]
- 800e868: f06f 4100 mvn.w r1, #2147483648 ; 0x80000000
- 800e86c: 4809 ldr r0, [pc, #36] ; (800e894 <sprintf+0x38>)
- 800e86e: 9107 str r1, [sp, #28]
- 800e870: 9104 str r1, [sp, #16]
- 800e872: 4909 ldr r1, [pc, #36] ; (800e898 <sprintf+0x3c>)
- 800e874: f853 2b04 ldr.w r2, [r3], #4
- 800e878: 9105 str r1, [sp, #20]
- 800e87a: 6800 ldr r0, [r0, #0]
- 800e87c: 9301 str r3, [sp, #4]
- 800e87e: a902 add r1, sp, #8
- 800e880: f000 f81e bl 800e8c0 <_svfprintf_r>
- 800e884: 9b02 ldr r3, [sp, #8]
- 800e886: 2200 movs r2, #0
- 800e888: 701a strb r2, [r3, #0]
- 800e88a: b01c add sp, #112 ; 0x70
- 800e88c: f85d eb04 ldr.w lr, [sp], #4
- 800e890: b003 add sp, #12
- 800e892: 4770 bx lr
- 800e894: 20000014 .word 0x20000014
- 800e898: ffff0208 .word 0xffff0208
-
-0800e89c <strncmp>:
- 800e89c: b510 push {r4, lr}
- 800e89e: b16a cbz r2, 800e8bc <strncmp+0x20>
- 800e8a0: 3901 subs r1, #1
- 800e8a2: 1884 adds r4, r0, r2
- 800e8a4: f810 3b01 ldrb.w r3, [r0], #1
- 800e8a8: f811 2f01 ldrb.w r2, [r1, #1]!
- 800e8ac: 4293 cmp r3, r2
- 800e8ae: d103 bne.n 800e8b8 <strncmp+0x1c>
- 800e8b0: 42a0 cmp r0, r4
- 800e8b2: d001 beq.n 800e8b8 <strncmp+0x1c>
- 800e8b4: 2b00 cmp r3, #0
- 800e8b6: d1f5 bne.n 800e8a4 <strncmp+0x8>
- 800e8b8: 1a98 subs r0, r3, r2
- 800e8ba: bd10 pop {r4, pc}
- 800e8bc: 4610 mov r0, r2
- 800e8be: e7fc b.n 800e8ba <strncmp+0x1e>
-
-0800e8c0 <_svfprintf_r>:
- 800e8c0: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
- 800e8c4: ed2d 8b04 vpush {d8-d9}
- 800e8c8: b0cb sub sp, #300 ; 0x12c
- 800e8ca: 468b mov fp, r1
- 800e8cc: 4691 mov r9, r2
- 800e8ce: 461e mov r6, r3
- 800e8d0: 9002 str r0, [sp, #8]
- 800e8d2: f002 fad9 bl 8010e88 <_localeconv_r>
- 800e8d6: 6803 ldr r3, [r0, #0]
- 800e8d8: 930f str r3, [sp, #60] ; 0x3c
- 800e8da: 4618 mov r0, r3
- 800e8dc: f7f8 fa7a bl 8006dd4 <strlen>
- 800e8e0: f8bb 300c ldrh.w r3, [fp, #12]
- 800e8e4: 9009 str r0, [sp, #36] ; 0x24
- 800e8e6: 0618 lsls r0, r3, #24
- 800e8e8: d51a bpl.n 800e920 <_svfprintf_r+0x60>
- 800e8ea: f8db 3010 ldr.w r3, [fp, #16]
- 800e8ee: b9bb cbnz r3, 800e920 <_svfprintf_r+0x60>
- 800e8f0: 2140 movs r1, #64 ; 0x40
- 800e8f2: 9802 ldr r0, [sp, #8]
- 800e8f4: f7ff fafa bl 800deec <_malloc_r>
- 800e8f8: f8cb 0000 str.w r0, [fp]
- 800e8fc: f8cb 0010 str.w r0, [fp, #16]
- 800e900: b958 cbnz r0, 800e91a <_svfprintf_r+0x5a>
- 800e902: 9a02 ldr r2, [sp, #8]
- 800e904: 230c movs r3, #12
- 800e906: 6013 str r3, [r2, #0]
- 800e908: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff
- 800e90c: 930a str r3, [sp, #40] ; 0x28
- 800e90e: 980a ldr r0, [sp, #40] ; 0x28
- 800e910: b04b add sp, #300 ; 0x12c
- 800e912: ecbd 8b04 vpop {d8-d9}
- 800e916: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
- 800e91a: 2340 movs r3, #64 ; 0x40
- 800e91c: f8cb 3014 str.w r3, [fp, #20]
- 800e920: 2300 movs r3, #0
- 800e922: e9cd 331f strd r3, r3, [sp, #124] ; 0x7c
- 800e926: ed9f 8bc6 vldr d8, [pc, #792] ; 800ec40 <_svfprintf_r+0x380>
- 800e92a: e9cd 3310 strd r3, r3, [sp, #64] ; 0x40
- 800e92e: ac21 add r4, sp, #132 ; 0x84
- 800e930: 941e str r4, [sp, #120] ; 0x78
- 800e932: 9303 str r3, [sp, #12]
- 800e934: 9307 str r3, [sp, #28]
- 800e936: 930e str r3, [sp, #56] ; 0x38
- 800e938: 9312 str r3, [sp, #72] ; 0x48
- 800e93a: 930a str r3, [sp, #40] ; 0x28
- 800e93c: 464d mov r5, r9
- 800e93e: 462b mov r3, r5
- 800e940: f813 2b01 ldrb.w r2, [r3], #1
- 800e944: b112 cbz r2, 800e94c <_svfprintf_r+0x8c>
- 800e946: 2a25 cmp r2, #37 ; 0x25
- 800e948: f040 80e4 bne.w 800eb14 <_svfprintf_r+0x254>
- 800e94c: ebb5 0709 subs.w r7, r5, r9
- 800e950: d00e beq.n 800e970 <_svfprintf_r+0xb0>
- 800e952: 9b20 ldr r3, [sp, #128] ; 0x80
- 800e954: 443b add r3, r7
- 800e956: 9320 str r3, [sp, #128] ; 0x80
- 800e958: 9b1f ldr r3, [sp, #124] ; 0x7c
- 800e95a: 3301 adds r3, #1
- 800e95c: 2b07 cmp r3, #7
- 800e95e: e9c4 9700 strd r9, r7, [r4]
- 800e962: 931f str r3, [sp, #124] ; 0x7c
- 800e964: f300 80d8 bgt.w 800eb18 <_svfprintf_r+0x258>
- 800e968: 3408 adds r4, #8
- 800e96a: 9b0a ldr r3, [sp, #40] ; 0x28
- 800e96c: 443b add r3, r7
- 800e96e: 930a str r3, [sp, #40] ; 0x28
- 800e970: 782b ldrb r3, [r5, #0]
- 800e972: 2b00 cmp r3, #0
- 800e974: f001 8174 beq.w 800fc60 <_svfprintf_r+0x13a0>
- 800e978: 1c6b adds r3, r5, #1
- 800e97a: 9308 str r3, [sp, #32]
- 800e97c: 2300 movs r3, #0
- 800e97e: f88d 305b strb.w r3, [sp, #91] ; 0x5b
- 800e982: f04f 38ff mov.w r8, #4294967295 ; 0xffffffff
- 800e986: 930b str r3, [sp, #44] ; 0x2c
- 800e988: 461d mov r5, r3
- 800e98a: 9b08 ldr r3, [sp, #32]
- 800e98c: 781b ldrb r3, [r3, #0]
- 800e98e: 9304 str r3, [sp, #16]
- 800e990: 9b08 ldr r3, [sp, #32]
- 800e992: 3301 adds r3, #1
- 800e994: 9308 str r3, [sp, #32]
- 800e996: 9b04 ldr r3, [sp, #16]
- 800e998: 3b20 subs r3, #32
- 800e99a: 2b5a cmp r3, #90 ; 0x5a
- 800e99c: f200 85e5 bhi.w 800f56a <_svfprintf_r+0xcaa>
- 800e9a0: a201 add r2, pc, #4 ; (adr r2, 800e9a8 <_svfprintf_r+0xe8>)
- 800e9a2: f852 f023 ldr.w pc, [r2, r3, lsl #2]
- 800e9a6: bf00 nop
- 800e9a8: 0800eba7 .word 0x0800eba7
- 800e9ac: 0800f56b .word 0x0800f56b
- 800e9b0: 0800f56b .word 0x0800f56b
- 800e9b4: 0800ebb9 .word 0x0800ebb9
- 800e9b8: 0800f56b .word 0x0800f56b
- 800e9bc: 0800f56b .word 0x0800f56b
- 800e9c0: 0800f56b .word 0x0800f56b
- 800e9c4: 0800eb6d .word 0x0800eb6d
- 800e9c8: 0800f56b .word 0x0800f56b
- 800e9cc: 0800f56b .word 0x0800f56b
- 800e9d0: 0800ebbf .word 0x0800ebbf
- 800e9d4: 0800ebd7 .word 0x0800ebd7
- 800e9d8: 0800f56b .word 0x0800f56b
- 800e9dc: 0800ebd1 .word 0x0800ebd1
- 800e9e0: 0800ebdb .word 0x0800ebdb
- 800e9e4: 0800f56b .word 0x0800f56b
- 800e9e8: 0800ec13 .word 0x0800ec13
- 800e9ec: 0800ec19 .word 0x0800ec19
- 800e9f0: 0800ec19 .word 0x0800ec19
- 800e9f4: 0800ec19 .word 0x0800ec19
- 800e9f8: 0800ec19 .word 0x0800ec19
- 800e9fc: 0800ec19 .word 0x0800ec19
- 800ea00: 0800ec19 .word 0x0800ec19
- 800ea04: 0800ec19 .word 0x0800ec19
- 800ea08: 0800ec19 .word 0x0800ec19
- 800ea0c: 0800ec19 .word 0x0800ec19
- 800ea10: 0800f56b .word 0x0800f56b
- 800ea14: 0800f56b .word 0x0800f56b
- 800ea18: 0800f56b .word 0x0800f56b
- 800ea1c: 0800f56b .word 0x0800f56b
- 800ea20: 0800f56b .word 0x0800f56b
- 800ea24: 0800f56b .word 0x0800f56b
- 800ea28: 0800f56b .word 0x0800f56b
- 800ea2c: 0800ed13 .word 0x0800ed13
- 800ea30: 0800f56b .word 0x0800f56b
- 800ea34: 0800ec81 .word 0x0800ec81
- 800ea38: 0800eca5 .word 0x0800eca5
- 800ea3c: 0800ed13 .word 0x0800ed13
- 800ea40: 0800ed13 .word 0x0800ed13
- 800ea44: 0800ed13 .word 0x0800ed13
- 800ea48: 0800f56b .word 0x0800f56b
- 800ea4c: 0800f56b .word 0x0800f56b
- 800ea50: 0800f56b .word 0x0800f56b
- 800ea54: 0800f56b .word 0x0800f56b
- 800ea58: 0800ec3b .word 0x0800ec3b
- 800ea5c: 0800f56b .word 0x0800f56b
- 800ea60: 0800f56b .word 0x0800f56b
- 800ea64: 0800f187 .word 0x0800f187
- 800ea68: 0800f56b .word 0x0800f56b
- 800ea6c: 0800f56b .word 0x0800f56b
- 800ea70: 0800f56b .word 0x0800f56b
- 800ea74: 0800f20f .word 0x0800f20f
- 800ea78: 0800f56b .word 0x0800f56b
- 800ea7c: 0800f3e7 .word 0x0800f3e7
- 800ea80: 0800f56b .word 0x0800f56b
- 800ea84: 0800f56b .word 0x0800f56b
- 800ea88: 0800eb31 .word 0x0800eb31
- 800ea8c: 0800f56b .word 0x0800f56b
- 800ea90: 0800f56b .word 0x0800f56b
- 800ea94: 0800f56b .word 0x0800f56b
- 800ea98: 0800f56b .word 0x0800f56b
- 800ea9c: 0800f56b .word 0x0800f56b
- 800eaa0: 0800f56b .word 0x0800f56b
- 800eaa4: 0800f56b .word 0x0800f56b
- 800eaa8: 0800f56b .word 0x0800f56b
- 800eaac: 0800ed13 .word 0x0800ed13
- 800eab0: 0800f56b .word 0x0800f56b
- 800eab4: 0800ec81 .word 0x0800ec81
- 800eab8: 0800eca9 .word 0x0800eca9
- 800eabc: 0800ed13 .word 0x0800ed13
- 800eac0: 0800ed13 .word 0x0800ed13
- 800eac4: 0800ed13 .word 0x0800ed13
- 800eac8: 0800ec4d .word 0x0800ec4d
- 800eacc: 0800eca9 .word 0x0800eca9
- 800ead0: 0800ec75 .word 0x0800ec75
- 800ead4: 0800f56b .word 0x0800f56b
- 800ead8: 0800ec67 .word 0x0800ec67
- 800eadc: 0800f56b .word 0x0800f56b
- 800eae0: 0800f149 .word 0x0800f149
- 800eae4: 0800f18b .word 0x0800f18b
- 800eae8: 0800f1ef .word 0x0800f1ef
- 800eaec: 0800ec75 .word 0x0800ec75
- 800eaf0: 0800f56b .word 0x0800f56b
- 800eaf4: 0800f20f .word 0x0800f20f
- 800eaf8: 0800e98b .word 0x0800e98b
- 800eafc: 0800f3eb .word 0x0800f3eb
- 800eb00: 0800f56b .word 0x0800f56b
- 800eb04: 0800f56b .word 0x0800f56b
- 800eb08: 0800f421 .word 0x0800f421
- 800eb0c: 0800f56b .word 0x0800f56b
- 800eb10: 0800e98b .word 0x0800e98b
- 800eb14: 461d mov r5, r3
- 800eb16: e712 b.n 800e93e <_svfprintf_r+0x7e>
- 800eb18: aa1e add r2, sp, #120 ; 0x78
- 800eb1a: 4659 mov r1, fp
- 800eb1c: 9802 ldr r0, [sp, #8]
- 800eb1e: f002 fd71 bl 8011604 <__ssprint_r>
- 800eb22: 2800 cmp r0, #0
- 800eb24: f040 8150 bne.w 800edc8 <_svfprintf_r+0x508>
- 800eb28: ac21 add r4, sp, #132 ; 0x84
- 800eb2a: e71e b.n 800e96a <_svfprintf_r+0xaa>
- 800eb2c: 461e mov r6, r3
- 800eb2e: e72c b.n 800e98a <_svfprintf_r+0xca>
- 800eb30: 4b45 ldr r3, [pc, #276] ; (800ec48 <_svfprintf_r+0x388>)
- 800eb32: 9311 str r3, [sp, #68] ; 0x44
- 800eb34: 06af lsls r7, r5, #26
- 800eb36: f140 8476 bpl.w 800f426 <_svfprintf_r+0xb66>
- 800eb3a: 3607 adds r6, #7
- 800eb3c: f026 0607 bic.w r6, r6, #7
- 800eb40: f106 0308 add.w r3, r6, #8
- 800eb44: e9d6 6700 ldrd r6, r7, [r6]
- 800eb48: 9306 str r3, [sp, #24]
- 800eb4a: 07eb lsls r3, r5, #31
- 800eb4c: d50a bpl.n 800eb64 <_svfprintf_r+0x2a4>
- 800eb4e: ea56 0307 orrs.w r3, r6, r7
- 800eb52: d007 beq.n 800eb64 <_svfprintf_r+0x2a4>
- 800eb54: 2330 movs r3, #48 ; 0x30
- 800eb56: f88d 305c strb.w r3, [sp, #92] ; 0x5c
- 800eb5a: 9b04 ldr r3, [sp, #16]
- 800eb5c: f88d 305d strb.w r3, [sp, #93] ; 0x5d
- 800eb60: f045 0502 orr.w r5, r5, #2
- 800eb64: f425 6580 bic.w r5, r5, #1024 ; 0x400
- 800eb68: 2302 movs r3, #2
- 800eb6a: e31b b.n 800f1a4 <_svfprintf_r+0x8e4>
- 800eb6c: 9802 ldr r0, [sp, #8]
- 800eb6e: f002 f98b bl 8010e88 <_localeconv_r>
- 800eb72: 6843 ldr r3, [r0, #4]
- 800eb74: 9312 str r3, [sp, #72] ; 0x48
- 800eb76: 4618 mov r0, r3
- 800eb78: f7f8 f92c bl 8006dd4 <strlen>
- 800eb7c: 900e str r0, [sp, #56] ; 0x38
- 800eb7e: 9802 ldr r0, [sp, #8]
- 800eb80: f002 f982 bl 8010e88 <_localeconv_r>
- 800eb84: 6883 ldr r3, [r0, #8]
- 800eb86: 9307 str r3, [sp, #28]
- 800eb88: 9b0e ldr r3, [sp, #56] ; 0x38
- 800eb8a: 2b00 cmp r3, #0
- 800eb8c: f43f aefd beq.w 800e98a <_svfprintf_r+0xca>
- 800eb90: 9b07 ldr r3, [sp, #28]
- 800eb92: 2b00 cmp r3, #0
- 800eb94: f43f aef9 beq.w 800e98a <_svfprintf_r+0xca>
- 800eb98: 781b ldrb r3, [r3, #0]
- 800eb9a: 2b00 cmp r3, #0
- 800eb9c: f43f aef5 beq.w 800e98a <_svfprintf_r+0xca>
- 800eba0: f445 6580 orr.w r5, r5, #1024 ; 0x400
- 800eba4: e6f1 b.n 800e98a <_svfprintf_r+0xca>
- 800eba6: f89d 305b ldrb.w r3, [sp, #91] ; 0x5b
- 800ebaa: 2b00 cmp r3, #0
- 800ebac: f47f aeed bne.w 800e98a <_svfprintf_r+0xca>
- 800ebb0: 2320 movs r3, #32
- 800ebb2: f88d 305b strb.w r3, [sp, #91] ; 0x5b
- 800ebb6: e6e8 b.n 800e98a <_svfprintf_r+0xca>
- 800ebb8: f045 0501 orr.w r5, r5, #1
- 800ebbc: e6e5 b.n 800e98a <_svfprintf_r+0xca>
- 800ebbe: 6832 ldr r2, [r6, #0]
- 800ebc0: 920b str r2, [sp, #44] ; 0x2c
- 800ebc2: 2a00 cmp r2, #0
- 800ebc4: f106 0304 add.w r3, r6, #4
- 800ebc8: dab0 bge.n 800eb2c <_svfprintf_r+0x26c>
- 800ebca: 4252 negs r2, r2
- 800ebcc: 920b str r2, [sp, #44] ; 0x2c
- 800ebce: 461e mov r6, r3
- 800ebd0: f045 0504 orr.w r5, r5, #4
- 800ebd4: e6d9 b.n 800e98a <_svfprintf_r+0xca>
- 800ebd6: 232b movs r3, #43 ; 0x2b
- 800ebd8: e7eb b.n 800ebb2 <_svfprintf_r+0x2f2>
- 800ebda: 9a08 ldr r2, [sp, #32]
- 800ebdc: 9b08 ldr r3, [sp, #32]
- 800ebde: 7812 ldrb r2, [r2, #0]
- 800ebe0: 9204 str r2, [sp, #16]
- 800ebe2: 2a2a cmp r2, #42 ; 0x2a
- 800ebe4: f103 0301 add.w r3, r3, #1
- 800ebe8: d110 bne.n 800ec0c <_svfprintf_r+0x34c>
- 800ebea: 6832 ldr r2, [r6, #0]
- 800ebec: 9308 str r3, [sp, #32]
- 800ebee: ea42 78e2 orr.w r8, r2, r2, asr #31
- 800ebf2: 3604 adds r6, #4
- 800ebf4: e6c9 b.n 800e98a <_svfprintf_r+0xca>
- 800ebf6: 210a movs r1, #10
- 800ebf8: fb01 2808 mla r8, r1, r8, r2
- 800ebfc: f813 2b01 ldrb.w r2, [r3], #1
- 800ec00: 9204 str r2, [sp, #16]
- 800ec02: 9a04 ldr r2, [sp, #16]
- 800ec04: 3a30 subs r2, #48 ; 0x30
- 800ec06: 2a09 cmp r2, #9
- 800ec08: d9f5 bls.n 800ebf6 <_svfprintf_r+0x336>
- 800ec0a: e6c3 b.n 800e994 <_svfprintf_r+0xd4>
- 800ec0c: f04f 0800 mov.w r8, #0
- 800ec10: e7f7 b.n 800ec02 <_svfprintf_r+0x342>
- 800ec12: f045 0580 orr.w r5, r5, #128 ; 0x80
- 800ec16: e6b8 b.n 800e98a <_svfprintf_r+0xca>
- 800ec18: 2200 movs r2, #0
- 800ec1a: 9b08 ldr r3, [sp, #32]
- 800ec1c: 920b str r2, [sp, #44] ; 0x2c
- 800ec1e: 9a04 ldr r2, [sp, #16]
- 800ec20: 990b ldr r1, [sp, #44] ; 0x2c
- 800ec22: 3a30 subs r2, #48 ; 0x30
- 800ec24: 200a movs r0, #10
- 800ec26: fb00 2201 mla r2, r0, r1, r2
- 800ec2a: 920b str r2, [sp, #44] ; 0x2c
- 800ec2c: f813 2b01 ldrb.w r2, [r3], #1
- 800ec30: 9204 str r2, [sp, #16]
- 800ec32: 3a30 subs r2, #48 ; 0x30
- 800ec34: 2a09 cmp r2, #9
- 800ec36: d9f2 bls.n 800ec1e <_svfprintf_r+0x35e>
- 800ec38: e6ac b.n 800e994 <_svfprintf_r+0xd4>
- 800ec3a: f045 0508 orr.w r5, r5, #8
- 800ec3e: e6a4 b.n 800e98a <_svfprintf_r+0xca>
- ...
- 800ec48: 08012e51 .word 0x08012e51
- 800ec4c: 9b08 ldr r3, [sp, #32]
- 800ec4e: 781b ldrb r3, [r3, #0]
- 800ec50: 2b68 cmp r3, #104 ; 0x68
- 800ec52: bf01 itttt eq
- 800ec54: 9b08 ldreq r3, [sp, #32]
- 800ec56: 3301 addeq r3, #1
- 800ec58: 9308 streq r3, [sp, #32]
- 800ec5a: f445 7500 orreq.w r5, r5, #512 ; 0x200
- 800ec5e: bf18 it ne
- 800ec60: f045 0540 orrne.w r5, r5, #64 ; 0x40
- 800ec64: e691 b.n 800e98a <_svfprintf_r+0xca>
- 800ec66: 9b08 ldr r3, [sp, #32]
- 800ec68: 781b ldrb r3, [r3, #0]
- 800ec6a: 2b6c cmp r3, #108 ; 0x6c
- 800ec6c: d105 bne.n 800ec7a <_svfprintf_r+0x3ba>
- 800ec6e: 9b08 ldr r3, [sp, #32]
- 800ec70: 3301 adds r3, #1
- 800ec72: 9308 str r3, [sp, #32]
- 800ec74: f045 0520 orr.w r5, r5, #32
- 800ec78: e687 b.n 800e98a <_svfprintf_r+0xca>
- 800ec7a: f045 0510 orr.w r5, r5, #16
- 800ec7e: e684 b.n 800e98a <_svfprintf_r+0xca>
- 800ec80: 1d33 adds r3, r6, #4
- 800ec82: 9306 str r3, [sp, #24]
- 800ec84: 6833 ldr r3, [r6, #0]
- 800ec86: f88d 30c4 strb.w r3, [sp, #196] ; 0xc4
- 800ec8a: 2300 movs r3, #0
- 800ec8c: f88d 305b strb.w r3, [sp, #91] ; 0x5b
- 800ec90: 469a mov sl, r3
- 800ec92: f04f 0801 mov.w r8, #1
- 800ec96: 930c str r3, [sp, #48] ; 0x30
- 800ec98: 461f mov r7, r3
- 800ec9a: 9305 str r3, [sp, #20]
- 800ec9c: 461e mov r6, r3
- 800ec9e: f10d 09c4 add.w r9, sp, #196 ; 0xc4
- 800eca2: e2ce b.n 800f242 <_svfprintf_r+0x982>
- 800eca4: f045 0510 orr.w r5, r5, #16
- 800eca8: 06a9 lsls r1, r5, #26
- 800ecaa: d521 bpl.n 800ecf0 <_svfprintf_r+0x430>
- 800ecac: 3607 adds r6, #7
- 800ecae: f026 0607 bic.w r6, r6, #7
- 800ecb2: f106 0308 add.w r3, r6, #8
- 800ecb6: e9d6 6700 ldrd r6, r7, [r6]
- 800ecba: 9306 str r3, [sp, #24]
- 800ecbc: 2e00 cmp r6, #0
- 800ecbe: f177 0300 sbcs.w r3, r7, #0
- 800ecc2: da06 bge.n 800ecd2 <_svfprintf_r+0x412>
- 800ecc4: 4276 negs r6, r6
- 800ecc6: f04f 032d mov.w r3, #45 ; 0x2d
- 800ecca: eb67 0747 sbc.w r7, r7, r7, lsl #1
- 800ecce: f88d 305b strb.w r3, [sp, #91] ; 0x5b
- 800ecd2: f1b8 3fff cmp.w r8, #4294967295 ; 0xffffffff
- 800ecd6: f040 83b6 bne.w 800f446 <_svfprintf_r+0xb86>
- 800ecda: 2f00 cmp r7, #0
- 800ecdc: bf08 it eq
- 800ecde: 2e0a cmpeq r6, #10
- 800ece0: f080 83e8 bcs.w 800f4b4 <_svfprintf_r+0xbf4>
- 800ece4: f50d 7994 add.w r9, sp, #296 ; 0x128
- 800ece8: 3630 adds r6, #48 ; 0x30
- 800ecea: f809 6d01 strb.w r6, [r9, #-1]!
- 800ecee: e3cc b.n 800f48a <_svfprintf_r+0xbca>
- 800ecf0: 1d33 adds r3, r6, #4
- 800ecf2: 06ea lsls r2, r5, #27
- 800ecf4: 9306 str r3, [sp, #24]
- 800ecf6: d502 bpl.n 800ecfe <_svfprintf_r+0x43e>
- 800ecf8: 6836 ldr r6, [r6, #0]
- 800ecfa: 17f7 asrs r7, r6, #31
- 800ecfc: e7de b.n 800ecbc <_svfprintf_r+0x3fc>
- 800ecfe: f015 0f40 tst.w r5, #64 ; 0x40
- 800ed02: 6836 ldr r6, [r6, #0]
- 800ed04: d001 beq.n 800ed0a <_svfprintf_r+0x44a>
- 800ed06: b236 sxth r6, r6
- 800ed08: e7f7 b.n 800ecfa <_svfprintf_r+0x43a>
- 800ed0a: 05ab lsls r3, r5, #22
- 800ed0c: bf48 it mi
- 800ed0e: b276 sxtbmi r6, r6
- 800ed10: e7f3 b.n 800ecfa <_svfprintf_r+0x43a>
- 800ed12: 3607 adds r6, #7
- 800ed14: f026 0607 bic.w r6, r6, #7
- 800ed18: ed96 8b00 vldr d8, [r6]
- 800ed1c: ed9f 7bb0 vldr d7, [pc, #704] ; 800efe0 <_svfprintf_r+0x720>
- 800ed20: eeb0 6bc8 vabs.f64 d6, d8
- 800ed24: f106 0308 add.w r3, r6, #8
- 800ed28: eeb4 6b47 vcmp.f64 d6, d7
- 800ed2c: eef1 fa10 vmrs APSR_nzcv, fpscr
- 800ed30: 9306 str r3, [sp, #24]
- 800ed32: dd17 ble.n 800ed64 <_svfprintf_r+0x4a4>
- 800ed34: eeb5 8bc0 vcmpe.f64 d8, #0.0
- 800ed38: eef1 fa10 vmrs APSR_nzcv, fpscr
- 800ed3c: d502 bpl.n 800ed44 <_svfprintf_r+0x484>
- 800ed3e: 232d movs r3, #45 ; 0x2d
- 800ed40: f88d 305b strb.w r3, [sp, #91] ; 0x5b
- 800ed44: 4aa8 ldr r2, [pc, #672] ; (800efe8 <_svfprintf_r+0x728>)
- 800ed46: 4ba9 ldr r3, [pc, #676] ; (800efec <_svfprintf_r+0x72c>)
- 800ed48: 9904 ldr r1, [sp, #16]
- 800ed4a: f025 0580 bic.w r5, r5, #128 ; 0x80
- 800ed4e: 2947 cmp r1, #71 ; 0x47
- 800ed50: bfcc ite gt
- 800ed52: 4691 movgt r9, r2
- 800ed54: 4699 movle r9, r3
- 800ed56: f04f 0a00 mov.w sl, #0
- 800ed5a: f04f 0803 mov.w r8, #3
- 800ed5e: f8cd a030 str.w sl, [sp, #48] ; 0x30
- 800ed62: e399 b.n 800f498 <_svfprintf_r+0xbd8>
- 800ed64: eeb4 8b48 vcmp.f64 d8, d8
- 800ed68: eef1 fa10 vmrs APSR_nzcv, fpscr
- 800ed6c: d709 bvc.n 800ed82 <_svfprintf_r+0x4c2>
- 800ed6e: ee18 3a90 vmov r3, s17
- 800ed72: 2b00 cmp r3, #0
- 800ed74: bfbc itt lt
- 800ed76: 232d movlt r3, #45 ; 0x2d
- 800ed78: f88d 305b strblt.w r3, [sp, #91] ; 0x5b
- 800ed7c: 4a9c ldr r2, [pc, #624] ; (800eff0 <_svfprintf_r+0x730>)
- 800ed7e: 4b9d ldr r3, [pc, #628] ; (800eff4 <_svfprintf_r+0x734>)
- 800ed80: e7e2 b.n 800ed48 <_svfprintf_r+0x488>
- 800ed82: 9b04 ldr r3, [sp, #16]
- 800ed84: f023 0720 bic.w r7, r3, #32
- 800ed88: 2f41 cmp r7, #65 ; 0x41
- 800ed8a: d126 bne.n 800edda <_svfprintf_r+0x51a>
- 800ed8c: 2330 movs r3, #48 ; 0x30
- 800ed8e: f88d 305c strb.w r3, [sp, #92] ; 0x5c
- 800ed92: 9b04 ldr r3, [sp, #16]
- 800ed94: 2b61 cmp r3, #97 ; 0x61
- 800ed96: bf14 ite ne
- 800ed98: 2358 movne r3, #88 ; 0x58
- 800ed9a: 2378 moveq r3, #120 ; 0x78
- 800ed9c: f1b8 0f63 cmp.w r8, #99 ; 0x63
- 800eda0: f88d 305d strb.w r3, [sp, #93] ; 0x5d
- 800eda4: f045 0502 orr.w r5, r5, #2
- 800eda8: dd24 ble.n 800edf4 <_svfprintf_r+0x534>
- 800edaa: f108 0101 add.w r1, r8, #1
- 800edae: 9802 ldr r0, [sp, #8]
- 800edb0: f7ff f89c bl 800deec <_malloc_r>
- 800edb4: 4681 mov r9, r0
- 800edb6: 2800 cmp r0, #0
- 800edb8: f040 80ec bne.w 800ef94 <_svfprintf_r+0x6d4>
- 800edbc: f8bb 300c ldrh.w r3, [fp, #12]
- 800edc0: f043 0340 orr.w r3, r3, #64 ; 0x40
- 800edc4: f8ab 300c strh.w r3, [fp, #12]
- 800edc8: f8bb 300c ldrh.w r3, [fp, #12]
- 800edcc: f013 0f40 tst.w r3, #64 ; 0x40
- 800edd0: 9b0a ldr r3, [sp, #40] ; 0x28
- 800edd2: bf18 it ne
- 800edd4: f04f 33ff movne.w r3, #4294967295 ; 0xffffffff
- 800edd8: e598 b.n 800e90c <_svfprintf_r+0x4c>
- 800edda: f1b8 3fff cmp.w r8, #4294967295 ; 0xffffffff
- 800edde: f000 80db beq.w 800ef98 <_svfprintf_r+0x6d8>
- 800ede2: 2f47 cmp r7, #71 ; 0x47
- 800ede4: d103 bne.n 800edee <_svfprintf_r+0x52e>
- 800ede6: f1b8 0f00 cmp.w r8, #0
- 800edea: f000 80da beq.w 800efa2 <_svfprintf_r+0x6e2>
- 800edee: f04f 0a00 mov.w sl, #0
- 800edf2: e003 b.n 800edfc <_svfprintf_r+0x53c>
- 800edf4: f04f 0a00 mov.w sl, #0
- 800edf8: f10d 09c4 add.w r9, sp, #196 ; 0xc4
- 800edfc: f445 7380 orr.w r3, r5, #256 ; 0x100
- 800ee00: 930c str r3, [sp, #48] ; 0x30
- 800ee02: ee18 3a90 vmov r3, s17
- 800ee06: 2b00 cmp r3, #0
- 800ee08: f280 80cf bge.w 800efaa <_svfprintf_r+0x6ea>
- 800ee0c: eeb1 9b48 vneg.f64 d9, d8
- 800ee10: 232d movs r3, #45 ; 0x2d
- 800ee12: 2f41 cmp r7, #65 ; 0x41
- 800ee14: 930d str r3, [sp, #52] ; 0x34
- 800ee16: f040 80d9 bne.w 800efcc <_svfprintf_r+0x70c>
- 800ee1a: eeb0 0b49 vmov.f64 d0, d9
- 800ee1e: a818 add r0, sp, #96 ; 0x60
- 800ee20: f002 fb5e bl 80114e0 <frexp>
- 800ee24: eeb4 7b00 vmov.f64 d7, #64 ; 0x3e000000 0.125
- 800ee28: ee20 0b07 vmul.f64 d0, d0, d7
- 800ee2c: eeb5 0b40 vcmp.f64 d0, #0.0
- 800ee30: eef1 fa10 vmrs APSR_nzcv, fpscr
- 800ee34: bf04 itt eq
- 800ee36: 2301 moveq r3, #1
- 800ee38: 9318 streq r3, [sp, #96] ; 0x60
- 800ee3a: 9a04 ldr r2, [sp, #16]
- 800ee3c: 4b6e ldr r3, [pc, #440] ; (800eff8 <_svfprintf_r+0x738>)
- 800ee3e: 496f ldr r1, [pc, #444] ; (800effc <_svfprintf_r+0x73c>)
- 800ee40: eeb3 7b00 vmov.f64 d7, #48 ; 0x41800000 16.0
- 800ee44: 2a61 cmp r2, #97 ; 0x61
- 800ee46: bf08 it eq
- 800ee48: 4619 moveq r1, r3
- 800ee4a: f108 32ff add.w r2, r8, #4294967295 ; 0xffffffff
- 800ee4e: 464b mov r3, r9
- 800ee50: ee20 0b07 vmul.f64 d0, d0, d7
- 800ee54: eefd 6bc0 vcvt.s32.f64 s13, d0
- 800ee58: f1b2 3fff cmp.w r2, #4294967295 ; 0xffffffff
- 800ee5c: ee16 0a90 vmov r0, s13
- 800ee60: 5c0e ldrb r6, [r1, r0]
- 800ee62: f803 6b01 strb.w r6, [r3], #1
- 800ee66: eeb8 6be6 vcvt.f64.s32 d6, s13
- 800ee6a: 4616 mov r6, r2
- 800ee6c: ee30 0b46 vsub.f64 d0, d0, d6
- 800ee70: d006 beq.n 800ee80 <_svfprintf_r+0x5c0>
- 800ee72: eeb5 0b40 vcmp.f64 d0, #0.0
- 800ee76: eef1 fa10 vmrs APSR_nzcv, fpscr
- 800ee7a: f102 32ff add.w r2, r2, #4294967295 ; 0xffffffff
- 800ee7e: d1e7 bne.n 800ee50 <_svfprintf_r+0x590>
- 800ee80: eeb6 7b00 vmov.f64 d7, #96 ; 0x3f000000 0.5
- 800ee84: eeb4 0bc7 vcmpe.f64 d0, d7
- 800ee88: eef1 fa10 vmrs APSR_nzcv, fpscr
- 800ee8c: dc08 bgt.n 800eea0 <_svfprintf_r+0x5e0>
- 800ee8e: eeb4 0b47 vcmp.f64 d0, d7
- 800ee92: eef1 fa10 vmrs APSR_nzcv, fpscr
- 800ee96: f040 8095 bne.w 800efc4 <_svfprintf_r+0x704>
- 800ee9a: 07c0 lsls r0, r0, #31
- 800ee9c: f140 8092 bpl.w 800efc4 <_svfprintf_r+0x704>
- 800eea0: 7bce ldrb r6, [r1, #15]
- 800eea2: 931c str r3, [sp, #112] ; 0x70
- 800eea4: f04f 0c30 mov.w ip, #48 ; 0x30
- 800eea8: 981c ldr r0, [sp, #112] ; 0x70
- 800eeaa: 1e42 subs r2, r0, #1
- 800eeac: 921c str r2, [sp, #112] ; 0x70
- 800eeae: f810 2c01 ldrb.w r2, [r0, #-1]
- 800eeb2: 42b2 cmp r2, r6
- 800eeb4: d07d beq.n 800efb2 <_svfprintf_r+0x6f2>
- 800eeb6: 2a39 cmp r2, #57 ; 0x39
- 800eeb8: bf16 itet ne
- 800eeba: 3201 addne r2, #1
- 800eebc: 7a8a ldrbeq r2, [r1, #10]
- 800eebe: b2d2 uxtbne r2, r2
- 800eec0: f800 2c01 strb.w r2, [r0, #-1]
- 800eec4: 461a mov r2, r3
- 800eec6: eba2 0309 sub.w r3, r2, r9
- 800eeca: 2f47 cmp r7, #71 ; 0x47
- 800eecc: 9303 str r3, [sp, #12]
- 800eece: 9e18 ldr r6, [sp, #96] ; 0x60
- 800eed0: f040 80ce bne.w 800f070 <_svfprintf_r+0x7b0>
- 800eed4: 1cf2 adds r2, r6, #3
- 800eed6: db02 blt.n 800eede <_svfprintf_r+0x61e>
- 800eed8: 45b0 cmp r8, r6
- 800eeda: f280 80f5 bge.w 800f0c8 <_svfprintf_r+0x808>
- 800eede: 9b04 ldr r3, [sp, #16]
- 800eee0: 3b02 subs r3, #2
- 800eee2: 9304 str r3, [sp, #16]
- 800eee4: 9904 ldr r1, [sp, #16]
- 800eee6: f89d 2010 ldrb.w r2, [sp, #16]
- 800eeea: f021 0120 bic.w r1, r1, #32
- 800eeee: 2941 cmp r1, #65 ; 0x41
- 800eef0: bf08 it eq
- 800eef2: 320f addeq r2, #15
- 800eef4: f106 33ff add.w r3, r6, #4294967295 ; 0xffffffff
- 800eef8: bf06 itte eq
- 800eefa: b2d2 uxtbeq r2, r2
- 800eefc: 2101 moveq r1, #1
- 800eefe: 2100 movne r1, #0
- 800ef00: 2b00 cmp r3, #0
- 800ef02: 9318 str r3, [sp, #96] ; 0x60
- 800ef04: bfb8 it lt
- 800ef06: f1c6 0301 rsblt r3, r6, #1
- 800ef0a: f88d 2068 strb.w r2, [sp, #104] ; 0x68
- 800ef0e: bfb4 ite lt
- 800ef10: 222d movlt r2, #45 ; 0x2d
- 800ef12: 222b movge r2, #43 ; 0x2b
- 800ef14: 2b09 cmp r3, #9
- 800ef16: f88d 2069 strb.w r2, [sp, #105] ; 0x69
- 800ef1a: f340 80c0 ble.w 800f09e <_svfprintf_r+0x7de>
- 800ef1e: f10d 0277 add.w r2, sp, #119 ; 0x77
- 800ef22: 260a movs r6, #10
- 800ef24: fb93 f0f6 sdiv r0, r3, r6
- 800ef28: fb06 3310 mls r3, r6, r0, r3
- 800ef2c: 3330 adds r3, #48 ; 0x30
- 800ef2e: 2809 cmp r0, #9
- 800ef30: f802 3c01 strb.w r3, [r2, #-1]
- 800ef34: f102 31ff add.w r1, r2, #4294967295 ; 0xffffffff
- 800ef38: 4603 mov r3, r0
- 800ef3a: f300 80a9 bgt.w 800f090 <_svfprintf_r+0x7d0>
- 800ef3e: 3330 adds r3, #48 ; 0x30
- 800ef40: f801 3c01 strb.w r3, [r1, #-1]
- 800ef44: 3a02 subs r2, #2
- 800ef46: f10d 036a add.w r3, sp, #106 ; 0x6a
- 800ef4a: f10d 0077 add.w r0, sp, #119 ; 0x77
- 800ef4e: 4282 cmp r2, r0
- 800ef50: 4619 mov r1, r3
- 800ef52: f0c0 809f bcc.w 800f094 <_svfprintf_r+0x7d4>
- 800ef56: 9a03 ldr r2, [sp, #12]
- 800ef58: ab1a add r3, sp, #104 ; 0x68
- 800ef5a: 1acb subs r3, r1, r3
- 800ef5c: 2a01 cmp r2, #1
- 800ef5e: 9310 str r3, [sp, #64] ; 0x40
- 800ef60: eb03 0802 add.w r8, r3, r2
- 800ef64: dc01 bgt.n 800ef6a <_svfprintf_r+0x6aa>
- 800ef66: 07eb lsls r3, r5, #31
- 800ef68: d501 bpl.n 800ef6e <_svfprintf_r+0x6ae>
- 800ef6a: 9b09 ldr r3, [sp, #36] ; 0x24
- 800ef6c: 4498 add r8, r3
- 800ef6e: f425 6580 bic.w r5, r5, #1024 ; 0x400
- 800ef72: 2700 movs r7, #0
- 800ef74: f445 7380 orr.w r3, r5, #256 ; 0x100
- 800ef78: 930c str r3, [sp, #48] ; 0x30
- 800ef7a: 9705 str r7, [sp, #20]
- 800ef7c: 463e mov r6, r7
- 800ef7e: 9b0d ldr r3, [sp, #52] ; 0x34
- 800ef80: 2b00 cmp r3, #0
- 800ef82: f000 82fe beq.w 800f582 <_svfprintf_r+0xcc2>
- 800ef86: 232d movs r3, #45 ; 0x2d
- 800ef88: 9d0c ldr r5, [sp, #48] ; 0x30
- 800ef8a: f88d 305b strb.w r3, [sp, #91] ; 0x5b
- 800ef8e: 2300 movs r3, #0
- 800ef90: 930c str r3, [sp, #48] ; 0x30
- 800ef92: e156 b.n 800f242 <_svfprintf_r+0x982>
- 800ef94: 4682 mov sl, r0
- 800ef96: e731 b.n 800edfc <_svfprintf_r+0x53c>
- 800ef98: f04f 0a00 mov.w sl, #0
- 800ef9c: f04f 0806 mov.w r8, #6
- 800efa0: e72c b.n 800edfc <_svfprintf_r+0x53c>
- 800efa2: 46c2 mov sl, r8
- 800efa4: f04f 0801 mov.w r8, #1
- 800efa8: e728 b.n 800edfc <_svfprintf_r+0x53c>
- 800efaa: eeb0 9b48 vmov.f64 d9, d8
- 800efae: 2300 movs r3, #0
- 800efb0: e72f b.n 800ee12 <_svfprintf_r+0x552>
- 800efb2: f800 cc01 strb.w ip, [r0, #-1]
- 800efb6: e777 b.n 800eea8 <_svfprintf_r+0x5e8>
- 800efb8: f802 0b01 strb.w r0, [r2], #1
- 800efbc: 1a99 subs r1, r3, r2
- 800efbe: 2900 cmp r1, #0
- 800efc0: dafa bge.n 800efb8 <_svfprintf_r+0x6f8>
- 800efc2: e780 b.n 800eec6 <_svfprintf_r+0x606>
- 800efc4: 461a mov r2, r3
- 800efc6: 2030 movs r0, #48 ; 0x30
- 800efc8: 4433 add r3, r6
- 800efca: e7f7 b.n 800efbc <_svfprintf_r+0x6fc>
- 800efcc: 2f46 cmp r7, #70 ; 0x46
- 800efce: d017 beq.n 800f000 <_svfprintf_r+0x740>
- 800efd0: 2f45 cmp r7, #69 ; 0x45
- 800efd2: d146 bne.n 800f062 <_svfprintf_r+0x7a2>
- 800efd4: f108 0601 add.w r6, r8, #1
- 800efd8: 2102 movs r1, #2
- 800efda: e013 b.n 800f004 <_svfprintf_r+0x744>
- 800efdc: f3af 8000 nop.w
- 800efe0: ffffffff .word 0xffffffff
- 800efe4: 7fefffff .word 0x7fefffff
- 800efe8: 08012e34 .word 0x08012e34
- 800efec: 08012e30 .word 0x08012e30
- 800eff0: 08012e3c .word 0x08012e3c
- 800eff4: 08012e38 .word 0x08012e38
- 800eff8: 08012e40 .word 0x08012e40
- 800effc: 08012e51 .word 0x08012e51
- 800f000: 4646 mov r6, r8
- 800f002: 2103 movs r1, #3
- 800f004: ab1c add r3, sp, #112 ; 0x70
- 800f006: 9301 str r3, [sp, #4]
- 800f008: ab19 add r3, sp, #100 ; 0x64
- 800f00a: 9300 str r3, [sp, #0]
- 800f00c: 4632 mov r2, r6
- 800f00e: ab18 add r3, sp, #96 ; 0x60
- 800f010: eeb0 0b49 vmov.f64 d0, d9
- 800f014: 9802 ldr r0, [sp, #8]
- 800f016: f000 ff9b bl 800ff50 <_dtoa_r>
- 800f01a: 2f47 cmp r7, #71 ; 0x47
- 800f01c: 4681 mov r9, r0
- 800f01e: d101 bne.n 800f024 <_svfprintf_r+0x764>
- 800f020: 07e9 lsls r1, r5, #31
- 800f022: d521 bpl.n 800f068 <_svfprintf_r+0x7a8>
- 800f024: 2f46 cmp r7, #70 ; 0x46
- 800f026: eb09 0306 add.w r3, r9, r6
- 800f02a: d10d bne.n 800f048 <_svfprintf_r+0x788>
- 800f02c: f899 2000 ldrb.w r2, [r9]
- 800f030: 2a30 cmp r2, #48 ; 0x30
- 800f032: d107 bne.n 800f044 <_svfprintf_r+0x784>
- 800f034: eeb5 9b40 vcmp.f64 d9, #0.0
- 800f038: eef1 fa10 vmrs APSR_nzcv, fpscr
- 800f03c: bf1c itt ne
- 800f03e: f1c6 0601 rsbne r6, r6, #1
- 800f042: 9618 strne r6, [sp, #96] ; 0x60
- 800f044: 9a18 ldr r2, [sp, #96] ; 0x60
- 800f046: 4413 add r3, r2
- 800f048: eeb5 9b40 vcmp.f64 d9, #0.0
- 800f04c: eef1 fa10 vmrs APSR_nzcv, fpscr
- 800f050: d009 beq.n 800f066 <_svfprintf_r+0x7a6>
- 800f052: 2130 movs r1, #48 ; 0x30
- 800f054: 9a1c ldr r2, [sp, #112] ; 0x70
- 800f056: 4293 cmp r3, r2
- 800f058: d906 bls.n 800f068 <_svfprintf_r+0x7a8>
- 800f05a: 1c50 adds r0, r2, #1
- 800f05c: 901c str r0, [sp, #112] ; 0x70
- 800f05e: 7011 strb r1, [r2, #0]
- 800f060: e7f8 b.n 800f054 <_svfprintf_r+0x794>
- 800f062: 4646 mov r6, r8
- 800f064: e7b8 b.n 800efd8 <_svfprintf_r+0x718>
- 800f066: 931c str r3, [sp, #112] ; 0x70
- 800f068: 9b1c ldr r3, [sp, #112] ; 0x70
- 800f06a: eba3 0309 sub.w r3, r3, r9
- 800f06e: e72c b.n 800eeca <_svfprintf_r+0x60a>
- 800f070: 2f46 cmp r7, #70 ; 0x46
- 800f072: f47f af37 bne.w 800eee4 <_svfprintf_r+0x624>
- 800f076: 2e00 cmp r6, #0
- 800f078: dd1e ble.n 800f0b8 <_svfprintf_r+0x7f8>
- 800f07a: f1b8 0f00 cmp.w r8, #0
- 800f07e: d101 bne.n 800f084 <_svfprintf_r+0x7c4>
- 800f080: 07ef lsls r7, r5, #31
- 800f082: d535 bpl.n 800f0f0 <_svfprintf_r+0x830>
- 800f084: 9b09 ldr r3, [sp, #36] ; 0x24
- 800f086: 18f3 adds r3, r6, r3
- 800f088: 4498 add r8, r3
- 800f08a: 2366 movs r3, #102 ; 0x66
- 800f08c: 9304 str r3, [sp, #16]
- 800f08e: e035 b.n 800f0fc <_svfprintf_r+0x83c>
- 800f090: 460a mov r2, r1
- 800f092: e746 b.n 800ef22 <_svfprintf_r+0x662>
- 800f094: f812 1b01 ldrb.w r1, [r2], #1
- 800f098: f803 1b01 strb.w r1, [r3], #1
- 800f09c: e757 b.n 800ef4e <_svfprintf_r+0x68e>
- 800f09e: b941 cbnz r1, 800f0b2 <_svfprintf_r+0x7f2>
- 800f0a0: 2230 movs r2, #48 ; 0x30
- 800f0a2: f88d 206a strb.w r2, [sp, #106] ; 0x6a
- 800f0a6: f10d 026b add.w r2, sp, #107 ; 0x6b
- 800f0aa: 3330 adds r3, #48 ; 0x30
- 800f0ac: 1c51 adds r1, r2, #1
- 800f0ae: 7013 strb r3, [r2, #0]
- 800f0b0: e751 b.n 800ef56 <_svfprintf_r+0x696>
- 800f0b2: f10d 026a add.w r2, sp, #106 ; 0x6a
- 800f0b6: e7f8 b.n 800f0aa <_svfprintf_r+0x7ea>
- 800f0b8: f1b8 0f00 cmp.w r8, #0
- 800f0bc: d101 bne.n 800f0c2 <_svfprintf_r+0x802>
- 800f0be: 07e8 lsls r0, r5, #31
- 800f0c0: d518 bpl.n 800f0f4 <_svfprintf_r+0x834>
- 800f0c2: 9b09 ldr r3, [sp, #36] ; 0x24
- 800f0c4: 3301 adds r3, #1
- 800f0c6: e7df b.n 800f088 <_svfprintf_r+0x7c8>
- 800f0c8: 9b03 ldr r3, [sp, #12]
- 800f0ca: 42b3 cmp r3, r6
- 800f0cc: dc06 bgt.n 800f0dc <_svfprintf_r+0x81c>
- 800f0ce: 07e9 lsls r1, r5, #31
- 800f0d0: d527 bpl.n 800f122 <_svfprintf_r+0x862>
- 800f0d2: 9b09 ldr r3, [sp, #36] ; 0x24
- 800f0d4: eb06 0803 add.w r8, r6, r3
- 800f0d8: 2367 movs r3, #103 ; 0x67
- 800f0da: e7d7 b.n 800f08c <_svfprintf_r+0x7cc>
- 800f0dc: 9b03 ldr r3, [sp, #12]
- 800f0de: 9a09 ldr r2, [sp, #36] ; 0x24
- 800f0e0: 2e00 cmp r6, #0
- 800f0e2: eb03 0802 add.w r8, r3, r2
- 800f0e6: dcf7 bgt.n 800f0d8 <_svfprintf_r+0x818>
- 800f0e8: f1c6 0301 rsb r3, r6, #1
- 800f0ec: 4498 add r8, r3
- 800f0ee: e7f3 b.n 800f0d8 <_svfprintf_r+0x818>
- 800f0f0: 46b0 mov r8, r6
- 800f0f2: e7ca b.n 800f08a <_svfprintf_r+0x7ca>
- 800f0f4: 2366 movs r3, #102 ; 0x66
- 800f0f6: 9304 str r3, [sp, #16]
- 800f0f8: f04f 0801 mov.w r8, #1
- 800f0fc: f415 6380 ands.w r3, r5, #1024 ; 0x400
- 800f100: 9305 str r3, [sp, #20]
- 800f102: d01f beq.n 800f144 <_svfprintf_r+0x884>
- 800f104: 2700 movs r7, #0
- 800f106: 2e00 cmp r6, #0
- 800f108: 9705 str r7, [sp, #20]
- 800f10a: f77f af38 ble.w 800ef7e <_svfprintf_r+0x6be>
- 800f10e: 9b07 ldr r3, [sp, #28]
- 800f110: 781b ldrb r3, [r3, #0]
- 800f112: 2bff cmp r3, #255 ; 0xff
- 800f114: d107 bne.n 800f126 <_svfprintf_r+0x866>
- 800f116: 9b05 ldr r3, [sp, #20]
- 800f118: 9a0e ldr r2, [sp, #56] ; 0x38
- 800f11a: 443b add r3, r7
- 800f11c: fb02 8803 mla r8, r2, r3, r8
- 800f120: e72d b.n 800ef7e <_svfprintf_r+0x6be>
- 800f122: 46b0 mov r8, r6
- 800f124: e7d8 b.n 800f0d8 <_svfprintf_r+0x818>
- 800f126: 42b3 cmp r3, r6
- 800f128: daf5 bge.n 800f116 <_svfprintf_r+0x856>
- 800f12a: 1af6 subs r6, r6, r3
- 800f12c: 9b07 ldr r3, [sp, #28]
- 800f12e: 785b ldrb r3, [r3, #1]
- 800f130: b133 cbz r3, 800f140 <_svfprintf_r+0x880>
- 800f132: 9b05 ldr r3, [sp, #20]
- 800f134: 3301 adds r3, #1
- 800f136: 9305 str r3, [sp, #20]
- 800f138: 9b07 ldr r3, [sp, #28]
- 800f13a: 3301 adds r3, #1
- 800f13c: 9307 str r3, [sp, #28]
- 800f13e: e7e6 b.n 800f10e <_svfprintf_r+0x84e>
- 800f140: 3701 adds r7, #1
- 800f142: e7e4 b.n 800f10e <_svfprintf_r+0x84e>
- 800f144: 9f05 ldr r7, [sp, #20]
- 800f146: e71a b.n 800ef7e <_svfprintf_r+0x6be>
- 800f148: 4632 mov r2, r6
- 800f14a: f852 3b04 ldr.w r3, [r2], #4
- 800f14e: 9206 str r2, [sp, #24]
- 800f150: 06aa lsls r2, r5, #26
- 800f152: d509 bpl.n 800f168 <_svfprintf_r+0x8a8>
- 800f154: 9a0a ldr r2, [sp, #40] ; 0x28
- 800f156: 4610 mov r0, r2
- 800f158: 17d1 asrs r1, r2, #31
- 800f15a: e9c3 0100 strd r0, r1, [r3]
- 800f15e: 9e06 ldr r6, [sp, #24]
- 800f160: f8dd 9020 ldr.w r9, [sp, #32]
- 800f164: f7ff bbea b.w 800e93c <_svfprintf_r+0x7c>
- 800f168: 06ef lsls r7, r5, #27
- 800f16a: d502 bpl.n 800f172 <_svfprintf_r+0x8b2>
- 800f16c: 9a0a ldr r2, [sp, #40] ; 0x28
- 800f16e: 601a str r2, [r3, #0]
- 800f170: e7f5 b.n 800f15e <_svfprintf_r+0x89e>
- 800f172: 066e lsls r6, r5, #25
- 800f174: d502 bpl.n 800f17c <_svfprintf_r+0x8bc>
- 800f176: 9a0a ldr r2, [sp, #40] ; 0x28
- 800f178: 801a strh r2, [r3, #0]
- 800f17a: e7f0 b.n 800f15e <_svfprintf_r+0x89e>
- 800f17c: 05a8 lsls r0, r5, #22
- 800f17e: d5f5 bpl.n 800f16c <_svfprintf_r+0x8ac>
- 800f180: 9a0a ldr r2, [sp, #40] ; 0x28
- 800f182: 701a strb r2, [r3, #0]
- 800f184: e7eb b.n 800f15e <_svfprintf_r+0x89e>
- 800f186: f045 0510 orr.w r5, r5, #16
- 800f18a: 06a9 lsls r1, r5, #26
- 800f18c: d520 bpl.n 800f1d0 <_svfprintf_r+0x910>
- 800f18e: 3607 adds r6, #7
- 800f190: f026 0607 bic.w r6, r6, #7
- 800f194: f106 0308 add.w r3, r6, #8
- 800f198: e9d6 6700 ldrd r6, r7, [r6]
- 800f19c: 9306 str r3, [sp, #24]
- 800f19e: f425 6580 bic.w r5, r5, #1024 ; 0x400
- 800f1a2: 2300 movs r3, #0
- 800f1a4: 2200 movs r2, #0
- 800f1a6: f1b8 3fff cmp.w r8, #4294967295 ; 0xffffffff
- 800f1aa: f88d 205b strb.w r2, [sp, #91] ; 0x5b
- 800f1ae: f000 814d beq.w 800f44c <_svfprintf_r+0xb8c>
- 800f1b2: 462a mov r2, r5
- 800f1b4: ea56 0107 orrs.w r1, r6, r7
- 800f1b8: f025 0580 bic.w r5, r5, #128 ; 0x80
- 800f1bc: f040 8146 bne.w 800f44c <_svfprintf_r+0xb8c>
- 800f1c0: f1b8 0f00 cmp.w r8, #0
- 800f1c4: f000 81c7 beq.w 800f556 <_svfprintf_r+0xc96>
- 800f1c8: 2b01 cmp r3, #1
- 800f1ca: f040 8142 bne.w 800f452 <_svfprintf_r+0xb92>
- 800f1ce: e589 b.n 800ece4 <_svfprintf_r+0x424>
- 800f1d0: 1d33 adds r3, r6, #4
- 800f1d2: 06ea lsls r2, r5, #27
- 800f1d4: 9306 str r3, [sp, #24]
- 800f1d6: d501 bpl.n 800f1dc <_svfprintf_r+0x91c>
- 800f1d8: 6836 ldr r6, [r6, #0]
- 800f1da: e002 b.n 800f1e2 <_svfprintf_r+0x922>
- 800f1dc: 066b lsls r3, r5, #25
- 800f1de: d502 bpl.n 800f1e6 <_svfprintf_r+0x926>
- 800f1e0: 8836 ldrh r6, [r6, #0]
- 800f1e2: 2700 movs r7, #0
- 800f1e4: e7db b.n 800f19e <_svfprintf_r+0x8de>
- 800f1e6: 05af lsls r7, r5, #22
- 800f1e8: d5f6 bpl.n 800f1d8 <_svfprintf_r+0x918>
- 800f1ea: 7836 ldrb r6, [r6, #0]
- 800f1ec: e7f9 b.n 800f1e2 <_svfprintf_r+0x922>
- 800f1ee: 1d33 adds r3, r6, #4
- 800f1f0: 9306 str r3, [sp, #24]
- 800f1f2: f647 0330 movw r3, #30768 ; 0x7830
- 800f1f6: f8ad 305c strh.w r3, [sp, #92] ; 0x5c
- 800f1fa: 2278 movs r2, #120 ; 0x78
- 800f1fc: 4baa ldr r3, [pc, #680] ; (800f4a8 <_svfprintf_r+0xbe8>)
- 800f1fe: 9311 str r3, [sp, #68] ; 0x44
- 800f200: 6836 ldr r6, [r6, #0]
- 800f202: 9204 str r2, [sp, #16]
- 800f204: 2700 movs r7, #0
- 800f206: f045 0502 orr.w r5, r5, #2
- 800f20a: 2302 movs r3, #2
- 800f20c: e7ca b.n 800f1a4 <_svfprintf_r+0x8e4>
- 800f20e: 1d33 adds r3, r6, #4
- 800f210: f8d6 9000 ldr.w r9, [r6]
- 800f214: 9306 str r3, [sp, #24]
- 800f216: 2600 movs r6, #0
- 800f218: f1b8 3fff cmp.w r8, #4294967295 ; 0xffffffff
- 800f21c: f88d 605b strb.w r6, [sp, #91] ; 0x5b
- 800f220: f000 80db beq.w 800f3da <_svfprintf_r+0xb1a>
- 800f224: 4642 mov r2, r8
- 800f226: 4631 mov r1, r6
- 800f228: 4648 mov r0, r9
- 800f22a: f7f7 fd79 bl 8006d20 <memchr>
- 800f22e: 4682 mov sl, r0
- 800f230: 2800 cmp r0, #0
- 800f232: f43f ad94 beq.w 800ed5e <_svfprintf_r+0x49e>
- 800f236: eba0 0809 sub.w r8, r0, r9
- 800f23a: 46b2 mov sl, r6
- 800f23c: 960c str r6, [sp, #48] ; 0x30
- 800f23e: 4637 mov r7, r6
- 800f240: 9605 str r6, [sp, #20]
- 800f242: 9b0c ldr r3, [sp, #48] ; 0x30
- 800f244: 4543 cmp r3, r8
- 800f246: bfb8 it lt
- 800f248: 4643 movlt r3, r8
- 800f24a: 930d str r3, [sp, #52] ; 0x34
- 800f24c: f89d 305b ldrb.w r3, [sp, #91] ; 0x5b
- 800f250: b113 cbz r3, 800f258 <_svfprintf_r+0x998>
- 800f252: 9b0d ldr r3, [sp, #52] ; 0x34
- 800f254: 3301 adds r3, #1
- 800f256: 930d str r3, [sp, #52] ; 0x34
- 800f258: f015 0302 ands.w r3, r5, #2
- 800f25c: 9313 str r3, [sp, #76] ; 0x4c
- 800f25e: bf1e ittt ne
- 800f260: 9b0d ldrne r3, [sp, #52] ; 0x34
- 800f262: 3302 addne r3, #2
- 800f264: 930d strne r3, [sp, #52] ; 0x34
- 800f266: f015 0384 ands.w r3, r5, #132 ; 0x84
- 800f26a: 9314 str r3, [sp, #80] ; 0x50
- 800f26c: d120 bne.n 800f2b0 <_svfprintf_r+0x9f0>
- 800f26e: 9b0b ldr r3, [sp, #44] ; 0x2c
- 800f270: 9a0d ldr r2, [sp, #52] ; 0x34
- 800f272: 1a9b subs r3, r3, r2
- 800f274: 2b00 cmp r3, #0
- 800f276: dd1b ble.n 800f2b0 <_svfprintf_r+0x9f0>
- 800f278: e9dd 2c1f ldrd r2, ip, [sp, #124] ; 0x7c
- 800f27c: 498b ldr r1, [pc, #556] ; (800f4ac <_svfprintf_r+0xbec>)
- 800f27e: 6021 str r1, [r4, #0]
- 800f280: 2b10 cmp r3, #16
- 800f282: f102 0201 add.w r2, r2, #1
- 800f286: f104 0008 add.w r0, r4, #8
- 800f28a: f300 817d bgt.w 800f588 <_svfprintf_r+0xcc8>
- 800f28e: eb0c 0103 add.w r1, ip, r3
- 800f292: 2a07 cmp r2, #7
- 800f294: 6063 str r3, [r4, #4]
- 800f296: e9cd 211f strd r2, r1, [sp, #124] ; 0x7c
- 800f29a: f340 818a ble.w 800f5b2 <_svfprintf_r+0xcf2>
- 800f29e: aa1e add r2, sp, #120 ; 0x78
- 800f2a0: 4659 mov r1, fp
- 800f2a2: 9802 ldr r0, [sp, #8]
- 800f2a4: f002 f9ae bl 8011604 <__ssprint_r>
- 800f2a8: 2800 cmp r0, #0
- 800f2aa: f040 84b7 bne.w 800fc1c <_svfprintf_r+0x135c>
- 800f2ae: ac21 add r4, sp, #132 ; 0x84
- 800f2b0: f89d 305b ldrb.w r3, [sp, #91] ; 0x5b
- 800f2b4: b173 cbz r3, 800f2d4 <_svfprintf_r+0xa14>
- 800f2b6: f10d 035b add.w r3, sp, #91 ; 0x5b
- 800f2ba: 6023 str r3, [r4, #0]
- 800f2bc: 2301 movs r3, #1
- 800f2be: 6063 str r3, [r4, #4]
- 800f2c0: 9b20 ldr r3, [sp, #128] ; 0x80
- 800f2c2: 3301 adds r3, #1
- 800f2c4: 9320 str r3, [sp, #128] ; 0x80
- 800f2c6: 9b1f ldr r3, [sp, #124] ; 0x7c
- 800f2c8: 3301 adds r3, #1
- 800f2ca: 2b07 cmp r3, #7
- 800f2cc: 931f str r3, [sp, #124] ; 0x7c
- 800f2ce: f300 8172 bgt.w 800f5b6 <_svfprintf_r+0xcf6>
- 800f2d2: 3408 adds r4, #8
- 800f2d4: 9b13 ldr r3, [sp, #76] ; 0x4c
- 800f2d6: b16b cbz r3, 800f2f4 <_svfprintf_r+0xa34>
- 800f2d8: ab17 add r3, sp, #92 ; 0x5c
- 800f2da: 6023 str r3, [r4, #0]
- 800f2dc: 2302 movs r3, #2
- 800f2de: 6063 str r3, [r4, #4]
- 800f2e0: 9b20 ldr r3, [sp, #128] ; 0x80
- 800f2e2: 3302 adds r3, #2
- 800f2e4: 9320 str r3, [sp, #128] ; 0x80
- 800f2e6: 9b1f ldr r3, [sp, #124] ; 0x7c
- 800f2e8: 3301 adds r3, #1
- 800f2ea: 2b07 cmp r3, #7
- 800f2ec: 931f str r3, [sp, #124] ; 0x7c
- 800f2ee: f300 816c bgt.w 800f5ca <_svfprintf_r+0xd0a>
- 800f2f2: 3408 adds r4, #8
- 800f2f4: 9b14 ldr r3, [sp, #80] ; 0x50
- 800f2f6: 2b80 cmp r3, #128 ; 0x80
- 800f2f8: d120 bne.n 800f33c <_svfprintf_r+0xa7c>
- 800f2fa: 9b0b ldr r3, [sp, #44] ; 0x2c
- 800f2fc: 9a0d ldr r2, [sp, #52] ; 0x34
- 800f2fe: 1a9b subs r3, r3, r2
- 800f300: 2b00 cmp r3, #0
- 800f302: dd1b ble.n 800f33c <_svfprintf_r+0xa7c>
- 800f304: e9dd 2c1f ldrd r2, ip, [sp, #124] ; 0x7c
- 800f308: 4969 ldr r1, [pc, #420] ; (800f4b0 <_svfprintf_r+0xbf0>)
- 800f30a: 6021 str r1, [r4, #0]
- 800f30c: 2b10 cmp r3, #16
- 800f30e: f102 0201 add.w r2, r2, #1
- 800f312: f104 0008 add.w r0, r4, #8
- 800f316: f300 8162 bgt.w 800f5de <_svfprintf_r+0xd1e>
- 800f31a: eb0c 0103 add.w r1, ip, r3
- 800f31e: 2a07 cmp r2, #7
- 800f320: 6063 str r3, [r4, #4]
- 800f322: e9cd 211f strd r2, r1, [sp, #124] ; 0x7c
- 800f326: f340 816f ble.w 800f608 <_svfprintf_r+0xd48>
- 800f32a: aa1e add r2, sp, #120 ; 0x78
- 800f32c: 4659 mov r1, fp
- 800f32e: 9802 ldr r0, [sp, #8]
- 800f330: f002 f968 bl 8011604 <__ssprint_r>
- 800f334: 2800 cmp r0, #0
- 800f336: f040 8471 bne.w 800fc1c <_svfprintf_r+0x135c>
- 800f33a: ac21 add r4, sp, #132 ; 0x84
- 800f33c: 9b0c ldr r3, [sp, #48] ; 0x30
- 800f33e: eba3 0308 sub.w r3, r3, r8
- 800f342: 2b00 cmp r3, #0
- 800f344: 930c str r3, [sp, #48] ; 0x30
- 800f346: dd1c ble.n 800f382 <_svfprintf_r+0xac2>
- 800f348: 980c ldr r0, [sp, #48] ; 0x30
- 800f34a: e9dd 231f ldrd r2, r3, [sp, #124] ; 0x7c
- 800f34e: 2810 cmp r0, #16
- 800f350: 4857 ldr r0, [pc, #348] ; (800f4b0 <_svfprintf_r+0xbf0>)
- 800f352: 6020 str r0, [r4, #0]
- 800f354: f102 0201 add.w r2, r2, #1
- 800f358: f104 0108 add.w r1, r4, #8
- 800f35c: f300 8156 bgt.w 800f60c <_svfprintf_r+0xd4c>
- 800f360: 980c ldr r0, [sp, #48] ; 0x30
- 800f362: 6060 str r0, [r4, #4]
- 800f364: 4403 add r3, r0
- 800f366: 2a07 cmp r2, #7
- 800f368: e9cd 231f strd r2, r3, [sp, #124] ; 0x7c
- 800f36c: f340 8163 ble.w 800f636 <_svfprintf_r+0xd76>
- 800f370: aa1e add r2, sp, #120 ; 0x78
- 800f372: 4659 mov r1, fp
- 800f374: 9802 ldr r0, [sp, #8]
- 800f376: f002 f945 bl 8011604 <__ssprint_r>
- 800f37a: 2800 cmp r0, #0
- 800f37c: f040 844e bne.w 800fc1c <_svfprintf_r+0x135c>
- 800f380: ac21 add r4, sp, #132 ; 0x84
- 800f382: 05e8 lsls r0, r5, #23
- 800f384: 9b20 ldr r3, [sp, #128] ; 0x80
- 800f386: f100 8158 bmi.w 800f63a <_svfprintf_r+0xd7a>
- 800f38a: 4443 add r3, r8
- 800f38c: 9320 str r3, [sp, #128] ; 0x80
- 800f38e: 9b1f ldr r3, [sp, #124] ; 0x7c
- 800f390: 3301 adds r3, #1
- 800f392: 2b07 cmp r3, #7
- 800f394: e9c4 9800 strd r9, r8, [r4]
- 800f398: 931f str r3, [sp, #124] ; 0x7c
- 800f39a: f300 8190 bgt.w 800f6be <_svfprintf_r+0xdfe>
- 800f39e: 3408 adds r4, #8
- 800f3a0: 076b lsls r3, r5, #29
- 800f3a2: f100 841d bmi.w 800fbe0 <_svfprintf_r+0x1320>
- 800f3a6: e9dd 320a ldrd r3, r2, [sp, #40] ; 0x28
- 800f3aa: 990d ldr r1, [sp, #52] ; 0x34
- 800f3ac: 428a cmp r2, r1
- 800f3ae: bfac ite ge
- 800f3b0: 189b addge r3, r3, r2
- 800f3b2: 185b addlt r3, r3, r1
- 800f3b4: 930a str r3, [sp, #40] ; 0x28
- 800f3b6: 9b20 ldr r3, [sp, #128] ; 0x80
- 800f3b8: b13b cbz r3, 800f3ca <_svfprintf_r+0xb0a>
- 800f3ba: aa1e add r2, sp, #120 ; 0x78
- 800f3bc: 4659 mov r1, fp
- 800f3be: 9802 ldr r0, [sp, #8]
- 800f3c0: f002 f920 bl 8011604 <__ssprint_r>
- 800f3c4: 2800 cmp r0, #0
- 800f3c6: f040 8429 bne.w 800fc1c <_svfprintf_r+0x135c>
- 800f3ca: 2300 movs r3, #0
- 800f3cc: 931f str r3, [sp, #124] ; 0x7c
- 800f3ce: f1ba 0f00 cmp.w sl, #0
- 800f3d2: f040 843f bne.w 800fc54 <_svfprintf_r+0x1394>
- 800f3d6: ac21 add r4, sp, #132 ; 0x84
- 800f3d8: e6c1 b.n 800f15e <_svfprintf_r+0x89e>
- 800f3da: 4648 mov r0, r9
- 800f3dc: f7f7 fcfa bl 8006dd4 <strlen>
- 800f3e0: 46b2 mov sl, r6
- 800f3e2: 4680 mov r8, r0
- 800f3e4: e4bb b.n 800ed5e <_svfprintf_r+0x49e>
- 800f3e6: f045 0510 orr.w r5, r5, #16
- 800f3ea: 06a8 lsls r0, r5, #26
- 800f3ec: d509 bpl.n 800f402 <_svfprintf_r+0xb42>
- 800f3ee: 3607 adds r6, #7
- 800f3f0: f026 0607 bic.w r6, r6, #7
- 800f3f4: f106 0308 add.w r3, r6, #8
- 800f3f8: e9d6 6700 ldrd r6, r7, [r6]
- 800f3fc: 9306 str r3, [sp, #24]
- 800f3fe: 2301 movs r3, #1
- 800f400: e6d0 b.n 800f1a4 <_svfprintf_r+0x8e4>
- 800f402: 1d33 adds r3, r6, #4
- 800f404: 06e9 lsls r1, r5, #27
- 800f406: 9306 str r3, [sp, #24]
- 800f408: d501 bpl.n 800f40e <_svfprintf_r+0xb4e>
- 800f40a: 6836 ldr r6, [r6, #0]
- 800f40c: e002 b.n 800f414 <_svfprintf_r+0xb54>
- 800f40e: 066a lsls r2, r5, #25
- 800f410: d502 bpl.n 800f418 <_svfprintf_r+0xb58>
- 800f412: 8836 ldrh r6, [r6, #0]
- 800f414: 2700 movs r7, #0
- 800f416: e7f2 b.n 800f3fe <_svfprintf_r+0xb3e>
- 800f418: 05ab lsls r3, r5, #22
- 800f41a: d5f6 bpl.n 800f40a <_svfprintf_r+0xb4a>
- 800f41c: 7836 ldrb r6, [r6, #0]
- 800f41e: e7f9 b.n 800f414 <_svfprintf_r+0xb54>
- 800f420: 4b21 ldr r3, [pc, #132] ; (800f4a8 <_svfprintf_r+0xbe8>)
- 800f422: f7ff bb86 b.w 800eb32 <_svfprintf_r+0x272>
- 800f426: 1d33 adds r3, r6, #4
- 800f428: 06e8 lsls r0, r5, #27
- 800f42a: 9306 str r3, [sp, #24]
- 800f42c: d501 bpl.n 800f432 <_svfprintf_r+0xb72>
- 800f42e: 6836 ldr r6, [r6, #0]
- 800f430: e002 b.n 800f438 <_svfprintf_r+0xb78>
- 800f432: 0669 lsls r1, r5, #25
- 800f434: d503 bpl.n 800f43e <_svfprintf_r+0xb7e>
- 800f436: 8836 ldrh r6, [r6, #0]
- 800f438: 2700 movs r7, #0
- 800f43a: f7ff bb86 b.w 800eb4a <_svfprintf_r+0x28a>
- 800f43e: 05aa lsls r2, r5, #22
- 800f440: d5f5 bpl.n 800f42e <_svfprintf_r+0xb6e>
- 800f442: 7836 ldrb r6, [r6, #0]
- 800f444: e7f8 b.n 800f438 <_svfprintf_r+0xb78>
- 800f446: 462a mov r2, r5
- 800f448: 2301 movs r3, #1
- 800f44a: e6b3 b.n 800f1b4 <_svfprintf_r+0x8f4>
- 800f44c: 2b01 cmp r3, #1
- 800f44e: f43f ac44 beq.w 800ecda <_svfprintf_r+0x41a>
- 800f452: 2b02 cmp r3, #2
- 800f454: d06d beq.n 800f532 <_svfprintf_r+0xc72>
- 800f456: ab4a add r3, sp, #296 ; 0x128
- 800f458: 08f1 lsrs r1, r6, #3
- 800f45a: ea41 7147 orr.w r1, r1, r7, lsl #29
- 800f45e: 08f8 lsrs r0, r7, #3
- 800f460: f006 0207 and.w r2, r6, #7
- 800f464: 4607 mov r7, r0
- 800f466: 460e mov r6, r1
- 800f468: 3230 adds r2, #48 ; 0x30
- 800f46a: ea56 0107 orrs.w r1, r6, r7
- 800f46e: f103 39ff add.w r9, r3, #4294967295 ; 0xffffffff
- 800f472: f803 2c01 strb.w r2, [r3, #-1]
- 800f476: d114 bne.n 800f4a2 <_svfprintf_r+0xbe2>
- 800f478: 07ef lsls r7, r5, #31
- 800f47a: d506 bpl.n 800f48a <_svfprintf_r+0xbca>
- 800f47c: 2a30 cmp r2, #48 ; 0x30
- 800f47e: d004 beq.n 800f48a <_svfprintf_r+0xbca>
- 800f480: 2230 movs r2, #48 ; 0x30
- 800f482: f809 2c01 strb.w r2, [r9, #-1]
- 800f486: f1a3 0902 sub.w r9, r3, #2
- 800f48a: ab4a add r3, sp, #296 ; 0x128
- 800f48c: f8cd 8030 str.w r8, [sp, #48] ; 0x30
- 800f490: f04f 0a00 mov.w sl, #0
- 800f494: eba3 0809 sub.w r8, r3, r9
- 800f498: 4657 mov r7, sl
- 800f49a: f8cd a014 str.w sl, [sp, #20]
- 800f49e: 4656 mov r6, sl
- 800f4a0: e6cf b.n 800f242 <_svfprintf_r+0x982>
- 800f4a2: 464b mov r3, r9
- 800f4a4: e7d8 b.n 800f458 <_svfprintf_r+0xb98>
- 800f4a6: bf00 nop
- 800f4a8: 08012e40 .word 0x08012e40
- 800f4ac: 08012e64 .word 0x08012e64
- 800f4b0: 08012e74 .word 0x08012e74
- 800f4b4: 2300 movs r3, #0
- 800f4b6: 9303 str r3, [sp, #12]
- 800f4b8: f405 6380 and.w r3, r5, #1024 ; 0x400
- 800f4bc: f50d 7a94 add.w sl, sp, #296 ; 0x128
- 800f4c0: 9305 str r3, [sp, #20]
- 800f4c2: 220a movs r2, #10
- 800f4c4: 2300 movs r3, #0
- 800f4c6: 4630 mov r0, r6
- 800f4c8: 4639 mov r1, r7
- 800f4ca: f7f7 fc8b bl 8006de4 <__aeabi_uldivmod>
- 800f4ce: 9b03 ldr r3, [sp, #12]
- 800f4d0: 3301 adds r3, #1
- 800f4d2: 9303 str r3, [sp, #12]
- 800f4d4: 9b05 ldr r3, [sp, #20]
- 800f4d6: 3230 adds r2, #48 ; 0x30
- 800f4d8: f10a 39ff add.w r9, sl, #4294967295 ; 0xffffffff
- 800f4dc: f80a 2c01 strb.w r2, [sl, #-1]
- 800f4e0: b1d3 cbz r3, 800f518 <_svfprintf_r+0xc58>
- 800f4e2: 9b07 ldr r3, [sp, #28]
- 800f4e4: 9a03 ldr r2, [sp, #12]
- 800f4e6: 781b ldrb r3, [r3, #0]
- 800f4e8: 429a cmp r2, r3
- 800f4ea: d115 bne.n 800f518 <_svfprintf_r+0xc58>
- 800f4ec: 2aff cmp r2, #255 ; 0xff
- 800f4ee: d013 beq.n 800f518 <_svfprintf_r+0xc58>
- 800f4f0: 2f00 cmp r7, #0
- 800f4f2: bf08 it eq
- 800f4f4: 2e0a cmpeq r6, #10
- 800f4f6: d30f bcc.n 800f518 <_svfprintf_r+0xc58>
- 800f4f8: 9b0e ldr r3, [sp, #56] ; 0x38
- 800f4fa: 9912 ldr r1, [sp, #72] ; 0x48
- 800f4fc: eba9 0903 sub.w r9, r9, r3
- 800f500: 461a mov r2, r3
- 800f502: 4648 mov r0, r9
- 800f504: f002 f869 bl 80115da <strncpy>
- 800f508: 9b07 ldr r3, [sp, #28]
- 800f50a: 785b ldrb r3, [r3, #1]
- 800f50c: b11b cbz r3, 800f516 <_svfprintf_r+0xc56>
- 800f50e: 9b07 ldr r3, [sp, #28]
- 800f510: 3301 adds r3, #1
- 800f512: 9307 str r3, [sp, #28]
- 800f514: 2300 movs r3, #0
- 800f516: 9303 str r3, [sp, #12]
- 800f518: 2300 movs r3, #0
- 800f51a: 4630 mov r0, r6
- 800f51c: 4639 mov r1, r7
- 800f51e: 220a movs r2, #10
- 800f520: f7f7 fc60 bl 8006de4 <__aeabi_uldivmod>
- 800f524: 4606 mov r6, r0
- 800f526: 460f mov r7, r1
- 800f528: ea56 0307 orrs.w r3, r6, r7
- 800f52c: d0ad beq.n 800f48a <_svfprintf_r+0xbca>
- 800f52e: 46ca mov sl, r9
- 800f530: e7c7 b.n 800f4c2 <_svfprintf_r+0xc02>
- 800f532: f50d 7994 add.w r9, sp, #296 ; 0x128
- 800f536: f006 030f and.w r3, r6, #15
- 800f53a: 9a11 ldr r2, [sp, #68] ; 0x44
- 800f53c: 5cd3 ldrb r3, [r2, r3]
- 800f53e: f809 3d01 strb.w r3, [r9, #-1]!
- 800f542: 0933 lsrs r3, r6, #4
- 800f544: ea43 7307 orr.w r3, r3, r7, lsl #28
- 800f548: 093a lsrs r2, r7, #4
- 800f54a: 461e mov r6, r3
- 800f54c: 4617 mov r7, r2
- 800f54e: ea56 0307 orrs.w r3, r6, r7
- 800f552: d1f0 bne.n 800f536 <_svfprintf_r+0xc76>
- 800f554: e799 b.n 800f48a <_svfprintf_r+0xbca>
- 800f556: f50d 7994 add.w r9, sp, #296 ; 0x128
- 800f55a: 2b00 cmp r3, #0
- 800f55c: d195 bne.n 800f48a <_svfprintf_r+0xbca>
- 800f55e: 07d6 lsls r6, r2, #31
- 800f560: bf44 itt mi
- 800f562: 2330 movmi r3, #48 ; 0x30
- 800f564: f809 3d01 strbmi.w r3, [r9, #-1]!
- 800f568: e78f b.n 800f48a <_svfprintf_r+0xbca>
- 800f56a: 9b04 ldr r3, [sp, #16]
- 800f56c: 2b00 cmp r3, #0
- 800f56e: f000 8377 beq.w 800fc60 <_svfprintf_r+0x13a0>
- 800f572: f88d 30c4 strb.w r3, [sp, #196] ; 0xc4
- 800f576: 2300 movs r3, #0
- 800f578: f88d 305b strb.w r3, [sp, #91] ; 0x5b
- 800f57c: 9606 str r6, [sp, #24]
- 800f57e: f7ff bb87 b.w 800ec90 <_svfprintf_r+0x3d0>
- 800f582: e9dd 530c ldrd r5, r3, [sp, #48] ; 0x30
- 800f586: e503 b.n 800ef90 <_svfprintf_r+0x6d0>
- 800f588: 2110 movs r1, #16
- 800f58a: 6061 str r1, [r4, #4]
- 800f58c: 2a07 cmp r2, #7
- 800f58e: 4461 add r1, ip
- 800f590: e9cd 211f strd r2, r1, [sp, #124] ; 0x7c
- 800f594: dd0a ble.n 800f5ac <_svfprintf_r+0xcec>
- 800f596: aa1e add r2, sp, #120 ; 0x78
- 800f598: 4659 mov r1, fp
- 800f59a: 9802 ldr r0, [sp, #8]
- 800f59c: 9315 str r3, [sp, #84] ; 0x54
- 800f59e: f002 f831 bl 8011604 <__ssprint_r>
- 800f5a2: 2800 cmp r0, #0
- 800f5a4: f040 833a bne.w 800fc1c <_svfprintf_r+0x135c>
- 800f5a8: 9b15 ldr r3, [sp, #84] ; 0x54
- 800f5aa: a821 add r0, sp, #132 ; 0x84
- 800f5ac: 3b10 subs r3, #16
- 800f5ae: 4604 mov r4, r0
- 800f5b0: e662 b.n 800f278 <_svfprintf_r+0x9b8>
- 800f5b2: 4604 mov r4, r0
- 800f5b4: e67c b.n 800f2b0 <_svfprintf_r+0x9f0>
- 800f5b6: aa1e add r2, sp, #120 ; 0x78
- 800f5b8: 4659 mov r1, fp
- 800f5ba: 9802 ldr r0, [sp, #8]
- 800f5bc: f002 f822 bl 8011604 <__ssprint_r>
- 800f5c0: 2800 cmp r0, #0
- 800f5c2: f040 832b bne.w 800fc1c <_svfprintf_r+0x135c>
- 800f5c6: ac21 add r4, sp, #132 ; 0x84
- 800f5c8: e684 b.n 800f2d4 <_svfprintf_r+0xa14>
- 800f5ca: aa1e add r2, sp, #120 ; 0x78
- 800f5cc: 4659 mov r1, fp
- 800f5ce: 9802 ldr r0, [sp, #8]
- 800f5d0: f002 f818 bl 8011604 <__ssprint_r>
- 800f5d4: 2800 cmp r0, #0
- 800f5d6: f040 8321 bne.w 800fc1c <_svfprintf_r+0x135c>
- 800f5da: ac21 add r4, sp, #132 ; 0x84
- 800f5dc: e68a b.n 800f2f4 <_svfprintf_r+0xa34>
- 800f5de: 2110 movs r1, #16
- 800f5e0: 6061 str r1, [r4, #4]
- 800f5e2: 2a07 cmp r2, #7
- 800f5e4: 4461 add r1, ip
- 800f5e6: e9cd 211f strd r2, r1, [sp, #124] ; 0x7c
- 800f5ea: dd0a ble.n 800f602 <_svfprintf_r+0xd42>
- 800f5ec: aa1e add r2, sp, #120 ; 0x78
- 800f5ee: 4659 mov r1, fp
- 800f5f0: 9802 ldr r0, [sp, #8]
- 800f5f2: 9313 str r3, [sp, #76] ; 0x4c
- 800f5f4: f002 f806 bl 8011604 <__ssprint_r>
- 800f5f8: 2800 cmp r0, #0
- 800f5fa: f040 830f bne.w 800fc1c <_svfprintf_r+0x135c>
- 800f5fe: 9b13 ldr r3, [sp, #76] ; 0x4c
- 800f600: a821 add r0, sp, #132 ; 0x84
- 800f602: 3b10 subs r3, #16
- 800f604: 4604 mov r4, r0
- 800f606: e67d b.n 800f304 <_svfprintf_r+0xa44>
- 800f608: 4604 mov r4, r0
- 800f60a: e697 b.n 800f33c <_svfprintf_r+0xa7c>
- 800f60c: 2010 movs r0, #16
- 800f60e: 4403 add r3, r0
- 800f610: 2a07 cmp r2, #7
- 800f612: 6060 str r0, [r4, #4]
- 800f614: e9cd 231f strd r2, r3, [sp, #124] ; 0x7c
- 800f618: dd08 ble.n 800f62c <_svfprintf_r+0xd6c>
- 800f61a: aa1e add r2, sp, #120 ; 0x78
- 800f61c: 4659 mov r1, fp
- 800f61e: 9802 ldr r0, [sp, #8]
- 800f620: f001 fff0 bl 8011604 <__ssprint_r>
- 800f624: 2800 cmp r0, #0
- 800f626: f040 82f9 bne.w 800fc1c <_svfprintf_r+0x135c>
- 800f62a: a921 add r1, sp, #132 ; 0x84
- 800f62c: 9b0c ldr r3, [sp, #48] ; 0x30
- 800f62e: 3b10 subs r3, #16
- 800f630: 930c str r3, [sp, #48] ; 0x30
- 800f632: 460c mov r4, r1
- 800f634: e688 b.n 800f348 <_svfprintf_r+0xa88>
- 800f636: 460c mov r4, r1
- 800f638: e6a3 b.n 800f382 <_svfprintf_r+0xac2>
- 800f63a: 9a04 ldr r2, [sp, #16]
- 800f63c: 2a65 cmp r2, #101 ; 0x65
- 800f63e: f340 8243 ble.w 800fac8 <_svfprintf_r+0x1208>
- 800f642: eeb5 8b40 vcmp.f64 d8, #0.0
- 800f646: eef1 fa10 vmrs APSR_nzcv, fpscr
- 800f64a: d169 bne.n 800f720 <_svfprintf_r+0xe60>
- 800f64c: 4a72 ldr r2, [pc, #456] ; (800f818 <_svfprintf_r+0xf58>)
- 800f64e: 6022 str r2, [r4, #0]
- 800f650: 2201 movs r2, #1
- 800f652: 4413 add r3, r2
- 800f654: 9320 str r3, [sp, #128] ; 0x80
- 800f656: 9b1f ldr r3, [sp, #124] ; 0x7c
- 800f658: 6062 str r2, [r4, #4]
- 800f65a: 4413 add r3, r2
- 800f65c: 2b07 cmp r3, #7
- 800f65e: 931f str r3, [sp, #124] ; 0x7c
- 800f660: dc37 bgt.n 800f6d2 <_svfprintf_r+0xe12>
- 800f662: 3408 adds r4, #8
- 800f664: 9b18 ldr r3, [sp, #96] ; 0x60
- 800f666: 9a03 ldr r2, [sp, #12]
- 800f668: 4293 cmp r3, r2
- 800f66a: db02 blt.n 800f672 <_svfprintf_r+0xdb2>
- 800f66c: 07e9 lsls r1, r5, #31
- 800f66e: f57f ae97 bpl.w 800f3a0 <_svfprintf_r+0xae0>
- 800f672: 9b0f ldr r3, [sp, #60] ; 0x3c
- 800f674: 6023 str r3, [r4, #0]
- 800f676: 9b09 ldr r3, [sp, #36] ; 0x24
- 800f678: 6063 str r3, [r4, #4]
- 800f67a: 9a09 ldr r2, [sp, #36] ; 0x24
- 800f67c: 9b20 ldr r3, [sp, #128] ; 0x80
- 800f67e: 4413 add r3, r2
- 800f680: 9320 str r3, [sp, #128] ; 0x80
- 800f682: 9b1f ldr r3, [sp, #124] ; 0x7c
- 800f684: 3301 adds r3, #1
- 800f686: 2b07 cmp r3, #7
- 800f688: 931f str r3, [sp, #124] ; 0x7c
- 800f68a: dc2c bgt.n 800f6e6 <_svfprintf_r+0xe26>
- 800f68c: 3408 adds r4, #8
- 800f68e: 9b03 ldr r3, [sp, #12]
- 800f690: 1e5e subs r6, r3, #1
- 800f692: 2e00 cmp r6, #0
- 800f694: f77f ae84 ble.w 800f3a0 <_svfprintf_r+0xae0>
- 800f698: 4f60 ldr r7, [pc, #384] ; (800f81c <_svfprintf_r+0xf5c>)
- 800f69a: f04f 0810 mov.w r8, #16
- 800f69e: e9dd 321f ldrd r3, r2, [sp, #124] ; 0x7c
- 800f6a2: 2e10 cmp r6, #16
- 800f6a4: f103 0301 add.w r3, r3, #1
- 800f6a8: f104 0108 add.w r1, r4, #8
- 800f6ac: 6027 str r7, [r4, #0]
- 800f6ae: dc24 bgt.n 800f6fa <_svfprintf_r+0xe3a>
- 800f6b0: 6066 str r6, [r4, #4]
- 800f6b2: 2b07 cmp r3, #7
- 800f6b4: 4416 add r6, r2
- 800f6b6: e9cd 361f strd r3, r6, [sp, #124] ; 0x7c
- 800f6ba: f340 828e ble.w 800fbda <_svfprintf_r+0x131a>
- 800f6be: aa1e add r2, sp, #120 ; 0x78
- 800f6c0: 4659 mov r1, fp
- 800f6c2: 9802 ldr r0, [sp, #8]
- 800f6c4: f001 ff9e bl 8011604 <__ssprint_r>
- 800f6c8: 2800 cmp r0, #0
- 800f6ca: f040 82a7 bne.w 800fc1c <_svfprintf_r+0x135c>
- 800f6ce: ac21 add r4, sp, #132 ; 0x84
- 800f6d0: e666 b.n 800f3a0 <_svfprintf_r+0xae0>
- 800f6d2: aa1e add r2, sp, #120 ; 0x78
- 800f6d4: 4659 mov r1, fp
- 800f6d6: 9802 ldr r0, [sp, #8]
- 800f6d8: f001 ff94 bl 8011604 <__ssprint_r>
- 800f6dc: 2800 cmp r0, #0
- 800f6de: f040 829d bne.w 800fc1c <_svfprintf_r+0x135c>
- 800f6e2: ac21 add r4, sp, #132 ; 0x84
- 800f6e4: e7be b.n 800f664 <_svfprintf_r+0xda4>
- 800f6e6: aa1e add r2, sp, #120 ; 0x78
- 800f6e8: 4659 mov r1, fp
- 800f6ea: 9802 ldr r0, [sp, #8]
- 800f6ec: f001 ff8a bl 8011604 <__ssprint_r>
- 800f6f0: 2800 cmp r0, #0
- 800f6f2: f040 8293 bne.w 800fc1c <_svfprintf_r+0x135c>
- 800f6f6: ac21 add r4, sp, #132 ; 0x84
- 800f6f8: e7c9 b.n 800f68e <_svfprintf_r+0xdce>
- 800f6fa: 3210 adds r2, #16
- 800f6fc: 2b07 cmp r3, #7
- 800f6fe: f8c4 8004 str.w r8, [r4, #4]
- 800f702: e9cd 321f strd r3, r2, [sp, #124] ; 0x7c
- 800f706: dd08 ble.n 800f71a <_svfprintf_r+0xe5a>
- 800f708: aa1e add r2, sp, #120 ; 0x78
- 800f70a: 4659 mov r1, fp
- 800f70c: 9802 ldr r0, [sp, #8]
- 800f70e: f001 ff79 bl 8011604 <__ssprint_r>
- 800f712: 2800 cmp r0, #0
- 800f714: f040 8282 bne.w 800fc1c <_svfprintf_r+0x135c>
- 800f718: a921 add r1, sp, #132 ; 0x84
- 800f71a: 3e10 subs r6, #16
- 800f71c: 460c mov r4, r1
- 800f71e: e7be b.n 800f69e <_svfprintf_r+0xdde>
- 800f720: 9a18 ldr r2, [sp, #96] ; 0x60
- 800f722: 2a00 cmp r2, #0
- 800f724: dc7c bgt.n 800f820 <_svfprintf_r+0xf60>
- 800f726: 4a3c ldr r2, [pc, #240] ; (800f818 <_svfprintf_r+0xf58>)
- 800f728: 6022 str r2, [r4, #0]
- 800f72a: 2201 movs r2, #1
- 800f72c: 4413 add r3, r2
- 800f72e: 9320 str r3, [sp, #128] ; 0x80
- 800f730: 9b1f ldr r3, [sp, #124] ; 0x7c
- 800f732: 6062 str r2, [r4, #4]
- 800f734: 4413 add r3, r2
- 800f736: 2b07 cmp r3, #7
- 800f738: 931f str r3, [sp, #124] ; 0x7c
- 800f73a: dc46 bgt.n 800f7ca <_svfprintf_r+0xf0a>
- 800f73c: 3408 adds r4, #8
- 800f73e: 9b18 ldr r3, [sp, #96] ; 0x60
- 800f740: b923 cbnz r3, 800f74c <_svfprintf_r+0xe8c>
- 800f742: 9b03 ldr r3, [sp, #12]
- 800f744: b913 cbnz r3, 800f74c <_svfprintf_r+0xe8c>
- 800f746: 07ea lsls r2, r5, #31
- 800f748: f57f ae2a bpl.w 800f3a0 <_svfprintf_r+0xae0>
- 800f74c: 9b0f ldr r3, [sp, #60] ; 0x3c
- 800f74e: 6023 str r3, [r4, #0]
- 800f750: 9b09 ldr r3, [sp, #36] ; 0x24
- 800f752: 6063 str r3, [r4, #4]
- 800f754: 9a09 ldr r2, [sp, #36] ; 0x24
- 800f756: 9b20 ldr r3, [sp, #128] ; 0x80
- 800f758: 4413 add r3, r2
- 800f75a: 9320 str r3, [sp, #128] ; 0x80
- 800f75c: 9b1f ldr r3, [sp, #124] ; 0x7c
- 800f75e: 3301 adds r3, #1
- 800f760: 2b07 cmp r3, #7
- 800f762: 931f str r3, [sp, #124] ; 0x7c
- 800f764: dc3b bgt.n 800f7de <_svfprintf_r+0xf1e>
- 800f766: f104 0308 add.w r3, r4, #8
- 800f76a: 9e18 ldr r6, [sp, #96] ; 0x60
- 800f76c: 2e00 cmp r6, #0
- 800f76e: da1b bge.n 800f7a8 <_svfprintf_r+0xee8>
- 800f770: 4f2a ldr r7, [pc, #168] ; (800f81c <_svfprintf_r+0xf5c>)
- 800f772: 4276 negs r6, r6
- 800f774: 461a mov r2, r3
- 800f776: 2410 movs r4, #16
- 800f778: e9dd 101f ldrd r1, r0, [sp, #124] ; 0x7c
- 800f77c: 2e10 cmp r6, #16
- 800f77e: f101 0101 add.w r1, r1, #1
- 800f782: f103 0308 add.w r3, r3, #8
- 800f786: 6017 str r7, [r2, #0]
- 800f788: dc33 bgt.n 800f7f2 <_svfprintf_r+0xf32>
- 800f78a: 6056 str r6, [r2, #4]
- 800f78c: 2907 cmp r1, #7
- 800f78e: 4406 add r6, r0
- 800f790: e9cd 161f strd r1, r6, [sp, #124] ; 0x7c
- 800f794: dd08 ble.n 800f7a8 <_svfprintf_r+0xee8>
- 800f796: aa1e add r2, sp, #120 ; 0x78
- 800f798: 4659 mov r1, fp
- 800f79a: 9802 ldr r0, [sp, #8]
- 800f79c: f001 ff32 bl 8011604 <__ssprint_r>
- 800f7a0: 2800 cmp r0, #0
- 800f7a2: f040 823b bne.w 800fc1c <_svfprintf_r+0x135c>
- 800f7a6: ab21 add r3, sp, #132 ; 0x84
- 800f7a8: 9a03 ldr r2, [sp, #12]
- 800f7aa: 605a str r2, [r3, #4]
- 800f7ac: 9903 ldr r1, [sp, #12]
- 800f7ae: 9a20 ldr r2, [sp, #128] ; 0x80
- 800f7b0: f8c3 9000 str.w r9, [r3]
- 800f7b4: 440a add r2, r1
- 800f7b6: 9220 str r2, [sp, #128] ; 0x80
- 800f7b8: 9a1f ldr r2, [sp, #124] ; 0x7c
- 800f7ba: 3201 adds r2, #1
- 800f7bc: 2a07 cmp r2, #7
- 800f7be: 921f str r2, [sp, #124] ; 0x7c
- 800f7c0: f73f af7d bgt.w 800f6be <_svfprintf_r+0xdfe>
- 800f7c4: f103 0408 add.w r4, r3, #8
- 800f7c8: e5ea b.n 800f3a0 <_svfprintf_r+0xae0>
- 800f7ca: aa1e add r2, sp, #120 ; 0x78
- 800f7cc: 4659 mov r1, fp
- 800f7ce: 9802 ldr r0, [sp, #8]
- 800f7d0: f001 ff18 bl 8011604 <__ssprint_r>
- 800f7d4: 2800 cmp r0, #0
- 800f7d6: f040 8221 bne.w 800fc1c <_svfprintf_r+0x135c>
- 800f7da: ac21 add r4, sp, #132 ; 0x84
- 800f7dc: e7af b.n 800f73e <_svfprintf_r+0xe7e>
- 800f7de: aa1e add r2, sp, #120 ; 0x78
- 800f7e0: 4659 mov r1, fp
- 800f7e2: 9802 ldr r0, [sp, #8]
- 800f7e4: f001 ff0e bl 8011604 <__ssprint_r>
- 800f7e8: 2800 cmp r0, #0
- 800f7ea: f040 8217 bne.w 800fc1c <_svfprintf_r+0x135c>
- 800f7ee: ab21 add r3, sp, #132 ; 0x84
- 800f7f0: e7bb b.n 800f76a <_svfprintf_r+0xeaa>
- 800f7f2: 3010 adds r0, #16
- 800f7f4: 2907 cmp r1, #7
- 800f7f6: 6054 str r4, [r2, #4]
- 800f7f8: e9cd 101f strd r1, r0, [sp, #124] ; 0x7c
- 800f7fc: dd08 ble.n 800f810 <_svfprintf_r+0xf50>
- 800f7fe: aa1e add r2, sp, #120 ; 0x78
- 800f800: 4659 mov r1, fp
- 800f802: 9802 ldr r0, [sp, #8]
- 800f804: f001 fefe bl 8011604 <__ssprint_r>
- 800f808: 2800 cmp r0, #0
- 800f80a: f040 8207 bne.w 800fc1c <_svfprintf_r+0x135c>
- 800f80e: ab21 add r3, sp, #132 ; 0x84
- 800f810: 3e10 subs r6, #16
- 800f812: 461a mov r2, r3
- 800f814: e7b0 b.n 800f778 <_svfprintf_r+0xeb8>
- 800f816: bf00 nop
- 800f818: 08012e62 .word 0x08012e62
- 800f81c: 08012e74 .word 0x08012e74
- 800f820: 9a03 ldr r2, [sp, #12]
- 800f822: 42b2 cmp r2, r6
- 800f824: bfa8 it ge
- 800f826: 4632 movge r2, r6
- 800f828: 2a00 cmp r2, #0
- 800f82a: 4690 mov r8, r2
- 800f82c: dd0a ble.n 800f844 <_svfprintf_r+0xf84>
- 800f82e: 4413 add r3, r2
- 800f830: 9320 str r3, [sp, #128] ; 0x80
- 800f832: 9b1f ldr r3, [sp, #124] ; 0x7c
- 800f834: 3301 adds r3, #1
- 800f836: 2b07 cmp r3, #7
- 800f838: e9c4 9200 strd r9, r2, [r4]
- 800f83c: 931f str r3, [sp, #124] ; 0x7c
- 800f83e: f300 808a bgt.w 800f956 <_svfprintf_r+0x1096>
- 800f842: 3408 adds r4, #8
- 800f844: f1b8 0f00 cmp.w r8, #0
- 800f848: bfac ite ge
- 800f84a: eba6 0808 subge.w r8, r6, r8
- 800f84e: 46b0 movlt r8, r6
- 800f850: f1b8 0f00 cmp.w r8, #0
- 800f854: dd1b ble.n 800f88e <_svfprintf_r+0xfce>
- 800f856: e9dd 231f ldrd r2, r3, [sp, #124] ; 0x7c
- 800f85a: 489a ldr r0, [pc, #616] ; (800fac4 <_svfprintf_r+0x1204>)
- 800f85c: 6020 str r0, [r4, #0]
- 800f85e: f1b8 0f10 cmp.w r8, #16
- 800f862: f102 0201 add.w r2, r2, #1
- 800f866: f104 0108 add.w r1, r4, #8
- 800f86a: dc7e bgt.n 800f96a <_svfprintf_r+0x10aa>
- 800f86c: 4443 add r3, r8
- 800f86e: 2a07 cmp r2, #7
- 800f870: f8c4 8004 str.w r8, [r4, #4]
- 800f874: e9cd 231f strd r2, r3, [sp, #124] ; 0x7c
- 800f878: f340 808b ble.w 800f992 <_svfprintf_r+0x10d2>
- 800f87c: aa1e add r2, sp, #120 ; 0x78
- 800f87e: 4659 mov r1, fp
- 800f880: 9802 ldr r0, [sp, #8]
- 800f882: f001 febf bl 8011604 <__ssprint_r>
- 800f886: 2800 cmp r0, #0
- 800f888: f040 81c8 bne.w 800fc1c <_svfprintf_r+0x135c>
- 800f88c: ac21 add r4, sp, #132 ; 0x84
- 800f88e: 056b lsls r3, r5, #21
- 800f890: 444e add r6, r9
- 800f892: d509 bpl.n 800f8a8 <_svfprintf_r+0xfe8>
- 800f894: 9b05 ldr r3, [sp, #20]
- 800f896: 2b00 cmp r3, #0
- 800f898: d17d bne.n 800f996 <_svfprintf_r+0x10d6>
- 800f89a: 2f00 cmp r7, #0
- 800f89c: d17d bne.n 800f99a <_svfprintf_r+0x10da>
- 800f89e: 9b03 ldr r3, [sp, #12]
- 800f8a0: 444b add r3, r9
- 800f8a2: 429e cmp r6, r3
- 800f8a4: bf28 it cs
- 800f8a6: 461e movcs r6, r3
- 800f8a8: 9b18 ldr r3, [sp, #96] ; 0x60
- 800f8aa: 9a03 ldr r2, [sp, #12]
- 800f8ac: 4293 cmp r3, r2
- 800f8ae: db01 blt.n 800f8b4 <_svfprintf_r+0xff4>
- 800f8b0: 07ef lsls r7, r5, #31
- 800f8b2: d50e bpl.n 800f8d2 <_svfprintf_r+0x1012>
- 800f8b4: 9b0f ldr r3, [sp, #60] ; 0x3c
- 800f8b6: 6023 str r3, [r4, #0]
- 800f8b8: 9b09 ldr r3, [sp, #36] ; 0x24
- 800f8ba: 6063 str r3, [r4, #4]
- 800f8bc: 9a09 ldr r2, [sp, #36] ; 0x24
- 800f8be: 9b20 ldr r3, [sp, #128] ; 0x80
- 800f8c0: 4413 add r3, r2
- 800f8c2: 9320 str r3, [sp, #128] ; 0x80
- 800f8c4: 9b1f ldr r3, [sp, #124] ; 0x7c
- 800f8c6: 3301 adds r3, #1
- 800f8c8: 2b07 cmp r3, #7
- 800f8ca: 931f str r3, [sp, #124] ; 0x7c
- 800f8cc: f300 80e5 bgt.w 800fa9a <_svfprintf_r+0x11da>
- 800f8d0: 3408 adds r4, #8
- 800f8d2: 9b03 ldr r3, [sp, #12]
- 800f8d4: 9a03 ldr r2, [sp, #12]
- 800f8d6: eb09 0703 add.w r7, r9, r3
- 800f8da: 1bbb subs r3, r7, r6
- 800f8dc: 9f18 ldr r7, [sp, #96] ; 0x60
- 800f8de: 1bd7 subs r7, r2, r7
- 800f8e0: 429f cmp r7, r3
- 800f8e2: bfa8 it ge
- 800f8e4: 461f movge r7, r3
- 800f8e6: 2f00 cmp r7, #0
- 800f8e8: dd0b ble.n 800f902 <_svfprintf_r+0x1042>
- 800f8ea: 9b20 ldr r3, [sp, #128] ; 0x80
- 800f8ec: 443b add r3, r7
- 800f8ee: 9320 str r3, [sp, #128] ; 0x80
- 800f8f0: 9b1f ldr r3, [sp, #124] ; 0x7c
- 800f8f2: 3301 adds r3, #1
- 800f8f4: 2b07 cmp r3, #7
- 800f8f6: e9c4 6700 strd r6, r7, [r4]
- 800f8fa: 931f str r3, [sp, #124] ; 0x7c
- 800f8fc: f300 80d7 bgt.w 800faae <_svfprintf_r+0x11ee>
- 800f900: 3408 adds r4, #8
- 800f902: 9e18 ldr r6, [sp, #96] ; 0x60
- 800f904: 9b03 ldr r3, [sp, #12]
- 800f906: 2f00 cmp r7, #0
- 800f908: eba3 0606 sub.w r6, r3, r6
- 800f90c: bfa8 it ge
- 800f90e: 1bf6 subge r6, r6, r7
- 800f910: 2e00 cmp r6, #0
- 800f912: f77f ad45 ble.w 800f3a0 <_svfprintf_r+0xae0>
- 800f916: 4f6b ldr r7, [pc, #428] ; (800fac4 <_svfprintf_r+0x1204>)
- 800f918: f04f 0810 mov.w r8, #16
- 800f91c: e9dd 321f ldrd r3, r2, [sp, #124] ; 0x7c
- 800f920: 2e10 cmp r6, #16
- 800f922: f103 0301 add.w r3, r3, #1
- 800f926: f104 0108 add.w r1, r4, #8
- 800f92a: 6027 str r7, [r4, #0]
- 800f92c: f77f aec0 ble.w 800f6b0 <_svfprintf_r+0xdf0>
- 800f930: 3210 adds r2, #16
- 800f932: 2b07 cmp r3, #7
- 800f934: f8c4 8004 str.w r8, [r4, #4]
- 800f938: e9cd 321f strd r3, r2, [sp, #124] ; 0x7c
- 800f93c: dd08 ble.n 800f950 <_svfprintf_r+0x1090>
- 800f93e: aa1e add r2, sp, #120 ; 0x78
- 800f940: 4659 mov r1, fp
- 800f942: 9802 ldr r0, [sp, #8]
- 800f944: f001 fe5e bl 8011604 <__ssprint_r>
- 800f948: 2800 cmp r0, #0
- 800f94a: f040 8167 bne.w 800fc1c <_svfprintf_r+0x135c>
- 800f94e: a921 add r1, sp, #132 ; 0x84
- 800f950: 3e10 subs r6, #16
- 800f952: 460c mov r4, r1
- 800f954: e7e2 b.n 800f91c <_svfprintf_r+0x105c>
- 800f956: aa1e add r2, sp, #120 ; 0x78
- 800f958: 4659 mov r1, fp
- 800f95a: 9802 ldr r0, [sp, #8]
- 800f95c: f001 fe52 bl 8011604 <__ssprint_r>
- 800f960: 2800 cmp r0, #0
- 800f962: f040 815b bne.w 800fc1c <_svfprintf_r+0x135c>
- 800f966: ac21 add r4, sp, #132 ; 0x84
- 800f968: e76c b.n 800f844 <_svfprintf_r+0xf84>
- 800f96a: 2010 movs r0, #16
- 800f96c: 4403 add r3, r0
- 800f96e: 2a07 cmp r2, #7
- 800f970: 6060 str r0, [r4, #4]
- 800f972: e9cd 231f strd r2, r3, [sp, #124] ; 0x7c
- 800f976: dd08 ble.n 800f98a <_svfprintf_r+0x10ca>
- 800f978: aa1e add r2, sp, #120 ; 0x78
- 800f97a: 4659 mov r1, fp
- 800f97c: 9802 ldr r0, [sp, #8]
- 800f97e: f001 fe41 bl 8011604 <__ssprint_r>
- 800f982: 2800 cmp r0, #0
- 800f984: f040 814a bne.w 800fc1c <_svfprintf_r+0x135c>
- 800f988: a921 add r1, sp, #132 ; 0x84
- 800f98a: f1a8 0810 sub.w r8, r8, #16
- 800f98e: 460c mov r4, r1
- 800f990: e761 b.n 800f856 <_svfprintf_r+0xf96>
- 800f992: 460c mov r4, r1
- 800f994: e77b b.n 800f88e <_svfprintf_r+0xfce>
- 800f996: 2f00 cmp r7, #0
- 800f998: d04e beq.n 800fa38 <_svfprintf_r+0x1178>
- 800f99a: 3f01 subs r7, #1
- 800f99c: 9b12 ldr r3, [sp, #72] ; 0x48
- 800f99e: 6023 str r3, [r4, #0]
- 800f9a0: 9b0e ldr r3, [sp, #56] ; 0x38
- 800f9a2: 6063 str r3, [r4, #4]
- 800f9a4: 9a0e ldr r2, [sp, #56] ; 0x38
- 800f9a6: 9b20 ldr r3, [sp, #128] ; 0x80
- 800f9a8: 4413 add r3, r2
- 800f9aa: 9320 str r3, [sp, #128] ; 0x80
- 800f9ac: 9b1f ldr r3, [sp, #124] ; 0x7c
- 800f9ae: 3301 adds r3, #1
- 800f9b0: 2b07 cmp r3, #7
- 800f9b2: 931f str r3, [sp, #124] ; 0x7c
- 800f9b4: dc47 bgt.n 800fa46 <_svfprintf_r+0x1186>
- 800f9b6: 3408 adds r4, #8
- 800f9b8: 9b03 ldr r3, [sp, #12]
- 800f9ba: 444b add r3, r9
- 800f9bc: 1b9a subs r2, r3, r6
- 800f9be: 9b07 ldr r3, [sp, #28]
- 800f9c0: 781b ldrb r3, [r3, #0]
- 800f9c2: 4293 cmp r3, r2
- 800f9c4: bfa8 it ge
- 800f9c6: 4613 movge r3, r2
- 800f9c8: 2b00 cmp r3, #0
- 800f9ca: 4698 mov r8, r3
- 800f9cc: dd0a ble.n 800f9e4 <_svfprintf_r+0x1124>
- 800f9ce: e9c4 6300 strd r6, r3, [r4]
- 800f9d2: 9b20 ldr r3, [sp, #128] ; 0x80
- 800f9d4: 4443 add r3, r8
- 800f9d6: 9320 str r3, [sp, #128] ; 0x80
- 800f9d8: 9b1f ldr r3, [sp, #124] ; 0x7c
- 800f9da: 3301 adds r3, #1
- 800f9dc: 2b07 cmp r3, #7
- 800f9de: 931f str r3, [sp, #124] ; 0x7c
- 800f9e0: dc3b bgt.n 800fa5a <_svfprintf_r+0x119a>
- 800f9e2: 3408 adds r4, #8
- 800f9e4: 9b07 ldr r3, [sp, #28]
- 800f9e6: 781b ldrb r3, [r3, #0]
- 800f9e8: f1b8 0f00 cmp.w r8, #0
- 800f9ec: bfac ite ge
- 800f9ee: eba3 0808 subge.w r8, r3, r8
- 800f9f2: 4698 movlt r8, r3
- 800f9f4: f1b8 0f00 cmp.w r8, #0
- 800f9f8: dd1a ble.n 800fa30 <_svfprintf_r+0x1170>
- 800f9fa: e9dd 231f ldrd r2, r3, [sp, #124] ; 0x7c
- 800f9fe: 4831 ldr r0, [pc, #196] ; (800fac4 <_svfprintf_r+0x1204>)
- 800fa00: 6020 str r0, [r4, #0]
- 800fa02: f1b8 0f10 cmp.w r8, #16
- 800fa06: f102 0201 add.w r2, r2, #1
- 800fa0a: f104 0108 add.w r1, r4, #8
- 800fa0e: dc2e bgt.n 800fa6e <_svfprintf_r+0x11ae>
- 800fa10: 4443 add r3, r8
- 800fa12: 2a07 cmp r2, #7
- 800fa14: f8c4 8004 str.w r8, [r4, #4]
- 800fa18: e9cd 231f strd r2, r3, [sp, #124] ; 0x7c
- 800fa1c: dd3b ble.n 800fa96 <_svfprintf_r+0x11d6>
- 800fa1e: aa1e add r2, sp, #120 ; 0x78
- 800fa20: 4659 mov r1, fp
- 800fa22: 9802 ldr r0, [sp, #8]
- 800fa24: f001 fdee bl 8011604 <__ssprint_r>
- 800fa28: 2800 cmp r0, #0
- 800fa2a: f040 80f7 bne.w 800fc1c <_svfprintf_r+0x135c>
- 800fa2e: ac21 add r4, sp, #132 ; 0x84
- 800fa30: 9b07 ldr r3, [sp, #28]
- 800fa32: 781b ldrb r3, [r3, #0]
- 800fa34: 441e add r6, r3
- 800fa36: e72d b.n 800f894 <_svfprintf_r+0xfd4>
- 800fa38: 9b07 ldr r3, [sp, #28]
- 800fa3a: 3b01 subs r3, #1
- 800fa3c: 9307 str r3, [sp, #28]
- 800fa3e: 9b05 ldr r3, [sp, #20]
- 800fa40: 3b01 subs r3, #1
- 800fa42: 9305 str r3, [sp, #20]
- 800fa44: e7aa b.n 800f99c <_svfprintf_r+0x10dc>
- 800fa46: aa1e add r2, sp, #120 ; 0x78
- 800fa48: 4659 mov r1, fp
- 800fa4a: 9802 ldr r0, [sp, #8]
- 800fa4c: f001 fdda bl 8011604 <__ssprint_r>
- 800fa50: 2800 cmp r0, #0
- 800fa52: f040 80e3 bne.w 800fc1c <_svfprintf_r+0x135c>
- 800fa56: ac21 add r4, sp, #132 ; 0x84
- 800fa58: e7ae b.n 800f9b8 <_svfprintf_r+0x10f8>
- 800fa5a: aa1e add r2, sp, #120 ; 0x78
- 800fa5c: 4659 mov r1, fp
- 800fa5e: 9802 ldr r0, [sp, #8]
- 800fa60: f001 fdd0 bl 8011604 <__ssprint_r>
- 800fa64: 2800 cmp r0, #0
- 800fa66: f040 80d9 bne.w 800fc1c <_svfprintf_r+0x135c>
- 800fa6a: ac21 add r4, sp, #132 ; 0x84
- 800fa6c: e7ba b.n 800f9e4 <_svfprintf_r+0x1124>
- 800fa6e: 2010 movs r0, #16
- 800fa70: 4403 add r3, r0
- 800fa72: 2a07 cmp r2, #7
- 800fa74: 6060 str r0, [r4, #4]
- 800fa76: e9cd 231f strd r2, r3, [sp, #124] ; 0x7c
- 800fa7a: dd08 ble.n 800fa8e <_svfprintf_r+0x11ce>
- 800fa7c: aa1e add r2, sp, #120 ; 0x78
- 800fa7e: 4659 mov r1, fp
- 800fa80: 9802 ldr r0, [sp, #8]
- 800fa82: f001 fdbf bl 8011604 <__ssprint_r>
- 800fa86: 2800 cmp r0, #0
- 800fa88: f040 80c8 bne.w 800fc1c <_svfprintf_r+0x135c>
- 800fa8c: a921 add r1, sp, #132 ; 0x84
- 800fa8e: f1a8 0810 sub.w r8, r8, #16
- 800fa92: 460c mov r4, r1
- 800fa94: e7b1 b.n 800f9fa <_svfprintf_r+0x113a>
- 800fa96: 460c mov r4, r1
- 800fa98: e7ca b.n 800fa30 <_svfprintf_r+0x1170>
- 800fa9a: aa1e add r2, sp, #120 ; 0x78
- 800fa9c: 4659 mov r1, fp
- 800fa9e: 9802 ldr r0, [sp, #8]
- 800faa0: f001 fdb0 bl 8011604 <__ssprint_r>
- 800faa4: 2800 cmp r0, #0
- 800faa6: f040 80b9 bne.w 800fc1c <_svfprintf_r+0x135c>
- 800faaa: ac21 add r4, sp, #132 ; 0x84
- 800faac: e711 b.n 800f8d2 <_svfprintf_r+0x1012>
- 800faae: aa1e add r2, sp, #120 ; 0x78
- 800fab0: 4659 mov r1, fp
- 800fab2: 9802 ldr r0, [sp, #8]
- 800fab4: f001 fda6 bl 8011604 <__ssprint_r>
- 800fab8: 2800 cmp r0, #0
- 800faba: f040 80af bne.w 800fc1c <_svfprintf_r+0x135c>
- 800fabe: ac21 add r4, sp, #132 ; 0x84
- 800fac0: e71f b.n 800f902 <_svfprintf_r+0x1042>
- 800fac2: bf00 nop
- 800fac4: 08012e74 .word 0x08012e74
- 800fac8: 9803 ldr r0, [sp, #12]
- 800faca: 991f ldr r1, [sp, #124] ; 0x7c
- 800facc: 2801 cmp r0, #1
- 800face: f103 0201 add.w r2, r3, #1
- 800fad2: f101 0101 add.w r1, r1, #1
- 800fad6: f104 0308 add.w r3, r4, #8
- 800fada: dc01 bgt.n 800fae0 <_svfprintf_r+0x1220>
- 800fadc: 07e8 lsls r0, r5, #31
- 800fade: d571 bpl.n 800fbc4 <_svfprintf_r+0x1304>
- 800fae0: 2001 movs r0, #1
- 800fae2: 2907 cmp r1, #7
- 800fae4: f8c4 9000 str.w r9, [r4]
- 800fae8: 6060 str r0, [r4, #4]
- 800faea: e9cd 121f strd r1, r2, [sp, #124] ; 0x7c
- 800faee: dd08 ble.n 800fb02 <_svfprintf_r+0x1242>
- 800faf0: aa1e add r2, sp, #120 ; 0x78
- 800faf2: 4659 mov r1, fp
- 800faf4: 9802 ldr r0, [sp, #8]
- 800faf6: f001 fd85 bl 8011604 <__ssprint_r>
- 800fafa: 2800 cmp r0, #0
- 800fafc: f040 808e bne.w 800fc1c <_svfprintf_r+0x135c>
- 800fb00: ab21 add r3, sp, #132 ; 0x84
- 800fb02: 9a0f ldr r2, [sp, #60] ; 0x3c
- 800fb04: 601a str r2, [r3, #0]
- 800fb06: 9a09 ldr r2, [sp, #36] ; 0x24
- 800fb08: 605a str r2, [r3, #4]
- 800fb0a: 9909 ldr r1, [sp, #36] ; 0x24
- 800fb0c: 9a20 ldr r2, [sp, #128] ; 0x80
- 800fb0e: 440a add r2, r1
- 800fb10: 9220 str r2, [sp, #128] ; 0x80
- 800fb12: 9a1f ldr r2, [sp, #124] ; 0x7c
- 800fb14: 3201 adds r2, #1
- 800fb16: 2a07 cmp r2, #7
- 800fb18: 921f str r2, [sp, #124] ; 0x7c
- 800fb1a: dc25 bgt.n 800fb68 <_svfprintf_r+0x12a8>
- 800fb1c: 3308 adds r3, #8
- 800fb1e: 9a03 ldr r2, [sp, #12]
- 800fb20: eeb5 8b40 vcmp.f64 d8, #0.0
- 800fb24: eef1 fa10 vmrs APSR_nzcv, fpscr
- 800fb28: f102 34ff add.w r4, r2, #4294967295 ; 0xffffffff
- 800fb2c: d025 beq.n 800fb7a <_svfprintf_r+0x12ba>
- 800fb2e: f109 0201 add.w r2, r9, #1
- 800fb32: 991f ldr r1, [sp, #124] ; 0x7c
- 800fb34: 9803 ldr r0, [sp, #12]
- 800fb36: e9c3 2400 strd r2, r4, [r3]
- 800fb3a: 9a20 ldr r2, [sp, #128] ; 0x80
- 800fb3c: 3101 adds r1, #1
- 800fb3e: 3a01 subs r2, #1
- 800fb40: 4402 add r2, r0
- 800fb42: 2907 cmp r1, #7
- 800fb44: e9cd 121f strd r1, r2, [sp, #124] ; 0x7c
- 800fb48: dd45 ble.n 800fbd6 <_svfprintf_r+0x1316>
- 800fb4a: aa1e add r2, sp, #120 ; 0x78
- 800fb4c: 4659 mov r1, fp
- 800fb4e: 9802 ldr r0, [sp, #8]
- 800fb50: f001 fd58 bl 8011604 <__ssprint_r>
- 800fb54: 2800 cmp r0, #0
- 800fb56: d161 bne.n 800fc1c <_svfprintf_r+0x135c>
- 800fb58: ab21 add r3, sp, #132 ; 0x84
- 800fb5a: aa1a add r2, sp, #104 ; 0x68
- 800fb5c: 601a str r2, [r3, #0]
- 800fb5e: 9a10 ldr r2, [sp, #64] ; 0x40
- 800fb60: 605a str r2, [r3, #4]
- 800fb62: 9910 ldr r1, [sp, #64] ; 0x40
- 800fb64: 9a20 ldr r2, [sp, #128] ; 0x80
- 800fb66: e625 b.n 800f7b4 <_svfprintf_r+0xef4>
- 800fb68: aa1e add r2, sp, #120 ; 0x78
- 800fb6a: 4659 mov r1, fp
- 800fb6c: 9802 ldr r0, [sp, #8]
- 800fb6e: f001 fd49 bl 8011604 <__ssprint_r>
- 800fb72: 2800 cmp r0, #0
- 800fb74: d152 bne.n 800fc1c <_svfprintf_r+0x135c>
- 800fb76: ab21 add r3, sp, #132 ; 0x84
- 800fb78: e7d1 b.n 800fb1e <_svfprintf_r+0x125e>
- 800fb7a: 2c00 cmp r4, #0
- 800fb7c: dded ble.n 800fb5a <_svfprintf_r+0x129a>
- 800fb7e: 4e3e ldr r6, [pc, #248] ; (800fc78 <_svfprintf_r+0x13b8>)
- 800fb80: 2710 movs r7, #16
- 800fb82: e9dd 211f ldrd r2, r1, [sp, #124] ; 0x7c
- 800fb86: 2c10 cmp r4, #16
- 800fb88: f102 0201 add.w r2, r2, #1
- 800fb8c: f103 0008 add.w r0, r3, #8
- 800fb90: 601e str r6, [r3, #0]
- 800fb92: dc07 bgt.n 800fba4 <_svfprintf_r+0x12e4>
- 800fb94: 605c str r4, [r3, #4]
- 800fb96: 2a07 cmp r2, #7
- 800fb98: 440c add r4, r1
- 800fb9a: e9cd 241f strd r2, r4, [sp, #124] ; 0x7c
- 800fb9e: dcd4 bgt.n 800fb4a <_svfprintf_r+0x128a>
- 800fba0: 4603 mov r3, r0
- 800fba2: e7da b.n 800fb5a <_svfprintf_r+0x129a>
- 800fba4: 3110 adds r1, #16
- 800fba6: 2a07 cmp r2, #7
- 800fba8: 605f str r7, [r3, #4]
- 800fbaa: e9cd 211f strd r2, r1, [sp, #124] ; 0x7c
- 800fbae: dd06 ble.n 800fbbe <_svfprintf_r+0x12fe>
- 800fbb0: aa1e add r2, sp, #120 ; 0x78
- 800fbb2: 4659 mov r1, fp
- 800fbb4: 9802 ldr r0, [sp, #8]
- 800fbb6: f001 fd25 bl 8011604 <__ssprint_r>
- 800fbba: bb78 cbnz r0, 800fc1c <_svfprintf_r+0x135c>
- 800fbbc: a821 add r0, sp, #132 ; 0x84
- 800fbbe: 3c10 subs r4, #16
- 800fbc0: 4603 mov r3, r0
- 800fbc2: e7de b.n 800fb82 <_svfprintf_r+0x12c2>
- 800fbc4: 2001 movs r0, #1
- 800fbc6: 2907 cmp r1, #7
- 800fbc8: f8c4 9000 str.w r9, [r4]
- 800fbcc: 6060 str r0, [r4, #4]
- 800fbce: e9cd 121f strd r1, r2, [sp, #124] ; 0x7c
- 800fbd2: ddc2 ble.n 800fb5a <_svfprintf_r+0x129a>
- 800fbd4: e7b9 b.n 800fb4a <_svfprintf_r+0x128a>
- 800fbd6: 3308 adds r3, #8
- 800fbd8: e7bf b.n 800fb5a <_svfprintf_r+0x129a>
- 800fbda: 460c mov r4, r1
- 800fbdc: f7ff bbe0 b.w 800f3a0 <_svfprintf_r+0xae0>
- 800fbe0: 9b0b ldr r3, [sp, #44] ; 0x2c
- 800fbe2: 9a0d ldr r2, [sp, #52] ; 0x34
- 800fbe4: 1a9d subs r5, r3, r2
- 800fbe6: 2d00 cmp r5, #0
- 800fbe8: f77f abdd ble.w 800f3a6 <_svfprintf_r+0xae6>
- 800fbec: 4e23 ldr r6, [pc, #140] ; (800fc7c <_svfprintf_r+0x13bc>)
- 800fbee: 2710 movs r7, #16
- 800fbf0: e9dd 321f ldrd r3, r2, [sp, #124] ; 0x7c
- 800fbf4: 2d10 cmp r5, #16
- 800fbf6: f103 0301 add.w r3, r3, #1
- 800fbfa: 6026 str r6, [r4, #0]
- 800fbfc: dc18 bgt.n 800fc30 <_svfprintf_r+0x1370>
- 800fbfe: 6065 str r5, [r4, #4]
- 800fc00: 2b07 cmp r3, #7
- 800fc02: 4415 add r5, r2
- 800fc04: e9cd 351f strd r3, r5, [sp, #124] ; 0x7c
- 800fc08: f77f abcd ble.w 800f3a6 <_svfprintf_r+0xae6>
- 800fc0c: aa1e add r2, sp, #120 ; 0x78
- 800fc0e: 4659 mov r1, fp
- 800fc10: 9802 ldr r0, [sp, #8]
- 800fc12: f001 fcf7 bl 8011604 <__ssprint_r>
- 800fc16: 2800 cmp r0, #0
- 800fc18: f43f abc5 beq.w 800f3a6 <_svfprintf_r+0xae6>
- 800fc1c: f1ba 0f00 cmp.w sl, #0
- 800fc20: f43f a8d2 beq.w 800edc8 <_svfprintf_r+0x508>
- 800fc24: 4651 mov r1, sl
- 800fc26: 9802 ldr r0, [sp, #8]
- 800fc28: f001 f854 bl 8010cd4 <_free_r>
- 800fc2c: f7ff b8cc b.w 800edc8 <_svfprintf_r+0x508>
- 800fc30: 3210 adds r2, #16
- 800fc32: 2b07 cmp r3, #7
- 800fc34: 6067 str r7, [r4, #4]
- 800fc36: e9cd 321f strd r3, r2, [sp, #124] ; 0x7c
- 800fc3a: dc02 bgt.n 800fc42 <_svfprintf_r+0x1382>
- 800fc3c: 3408 adds r4, #8
- 800fc3e: 3d10 subs r5, #16
- 800fc40: e7d6 b.n 800fbf0 <_svfprintf_r+0x1330>
- 800fc42: aa1e add r2, sp, #120 ; 0x78
- 800fc44: 4659 mov r1, fp
- 800fc46: 9802 ldr r0, [sp, #8]
- 800fc48: f001 fcdc bl 8011604 <__ssprint_r>
- 800fc4c: 2800 cmp r0, #0
- 800fc4e: d1e5 bne.n 800fc1c <_svfprintf_r+0x135c>
- 800fc50: ac21 add r4, sp, #132 ; 0x84
- 800fc52: e7f4 b.n 800fc3e <_svfprintf_r+0x137e>
- 800fc54: 4651 mov r1, sl
- 800fc56: 9802 ldr r0, [sp, #8]
- 800fc58: f001 f83c bl 8010cd4 <_free_r>
- 800fc5c: f7ff bbbb b.w 800f3d6 <_svfprintf_r+0xb16>
- 800fc60: 9b20 ldr r3, [sp, #128] ; 0x80
- 800fc62: 2b00 cmp r3, #0
- 800fc64: f43f a8b0 beq.w 800edc8 <_svfprintf_r+0x508>
- 800fc68: aa1e add r2, sp, #120 ; 0x78
- 800fc6a: 4659 mov r1, fp
- 800fc6c: 9802 ldr r0, [sp, #8]
- 800fc6e: f001 fcc9 bl 8011604 <__ssprint_r>
- 800fc72: f7ff b8a9 b.w 800edc8 <_svfprintf_r+0x508>
- 800fc76: bf00 nop
- 800fc78: 08012e74 .word 0x08012e74
- 800fc7c: 08012e64 .word 0x08012e64
-
-0800fc80 <sysconf>:
- 800fc80: 2808 cmp r0, #8
- 800fc82: b508 push {r3, lr}
- 800fc84: d006 beq.n 800fc94 <sysconf+0x14>
- 800fc86: f7fd fedf bl 800da48 <__errno>
- 800fc8a: 2316 movs r3, #22
- 800fc8c: 6003 str r3, [r0, #0]
- 800fc8e: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
- 800fc92: bd08 pop {r3, pc}
- 800fc94: f44f 5080 mov.w r0, #4096 ; 0x1000
- 800fc98: e7fb b.n 800fc92 <sysconf+0x12>
- ...
-
-0800fc9c <write>:
- 800fc9c: 4613 mov r3, r2
- 800fc9e: 460a mov r2, r1
- 800fca0: 4601 mov r1, r0
- 800fca2: 4802 ldr r0, [pc, #8] ; (800fcac <write+0x10>)
- 800fca4: 6800 ldr r0, [r0, #0]
- 800fca6: f000 b84d b.w 800fd44 <_write_r>
- 800fcaa: bf00 nop
- 800fcac: 20000014 .word 0x20000014
-
-0800fcb0 <__swbuf_r>:
- 800fcb0: b5f8 push {r3, r4, r5, r6, r7, lr}
- 800fcb2: 460d mov r5, r1
- 800fcb4: 4614 mov r4, r2
- 800fcb6: 4606 mov r6, r0
- 800fcb8: b118 cbz r0, 800fcc2 <__swbuf_r+0x12>
- 800fcba: 6b83 ldr r3, [r0, #56] ; 0x38
- 800fcbc: b90b cbnz r3, 800fcc2 <__swbuf_r+0x12>
- 800fcbe: f000 ff79 bl 8010bb4 <__sinit>
- 800fcc2: 69a3 ldr r3, [r4, #24]
- 800fcc4: 60a3 str r3, [r4, #8]
- 800fcc6: 89a3 ldrh r3, [r4, #12]
- 800fcc8: 0719 lsls r1, r3, #28
- 800fcca: d528 bpl.n 800fd1e <__swbuf_r+0x6e>
- 800fccc: 6923 ldr r3, [r4, #16]
- 800fcce: b333 cbz r3, 800fd1e <__swbuf_r+0x6e>
- 800fcd0: f9b4 300c ldrsh.w r3, [r4, #12]
- 800fcd4: b2ed uxtb r5, r5
- 800fcd6: 049a lsls r2, r3, #18
- 800fcd8: 462f mov r7, r5
- 800fcda: d52a bpl.n 800fd32 <__swbuf_r+0x82>
- 800fcdc: 6923 ldr r3, [r4, #16]
- 800fcde: 6820 ldr r0, [r4, #0]
- 800fce0: 1ac0 subs r0, r0, r3
- 800fce2: 6963 ldr r3, [r4, #20]
- 800fce4: 4283 cmp r3, r0
- 800fce6: dc04 bgt.n 800fcf2 <__swbuf_r+0x42>
- 800fce8: 4621 mov r1, r4
- 800fcea: 4630 mov r0, r6
- 800fcec: f000 fef6 bl 8010adc <_fflush_r>
- 800fcf0: b9d8 cbnz r0, 800fd2a <__swbuf_r+0x7a>
- 800fcf2: 68a3 ldr r3, [r4, #8]
- 800fcf4: 3b01 subs r3, #1
- 800fcf6: 60a3 str r3, [r4, #8]
- 800fcf8: 6823 ldr r3, [r4, #0]
- 800fcfa: 1c5a adds r2, r3, #1
- 800fcfc: 6022 str r2, [r4, #0]
- 800fcfe: 701d strb r5, [r3, #0]
- 800fd00: 6963 ldr r3, [r4, #20]
- 800fd02: 3001 adds r0, #1
- 800fd04: 4283 cmp r3, r0
- 800fd06: d004 beq.n 800fd12 <__swbuf_r+0x62>
- 800fd08: 89a3 ldrh r3, [r4, #12]
- 800fd0a: 07db lsls r3, r3, #31
- 800fd0c: d50f bpl.n 800fd2e <__swbuf_r+0x7e>
- 800fd0e: 2d0a cmp r5, #10
- 800fd10: d10d bne.n 800fd2e <__swbuf_r+0x7e>
- 800fd12: 4621 mov r1, r4
- 800fd14: 4630 mov r0, r6
- 800fd16: f000 fee1 bl 8010adc <_fflush_r>
- 800fd1a: b140 cbz r0, 800fd2e <__swbuf_r+0x7e>
- 800fd1c: e005 b.n 800fd2a <__swbuf_r+0x7a>
- 800fd1e: 4621 mov r1, r4
- 800fd20: 4630 mov r0, r6
- 800fd22: f000 f821 bl 800fd68 <__swsetup_r>
- 800fd26: 2800 cmp r0, #0
- 800fd28: d0d2 beq.n 800fcd0 <__swbuf_r+0x20>
- 800fd2a: f04f 37ff mov.w r7, #4294967295 ; 0xffffffff
- 800fd2e: 4638 mov r0, r7
- 800fd30: bdf8 pop {r3, r4, r5, r6, r7, pc}
- 800fd32: f443 5300 orr.w r3, r3, #8192 ; 0x2000
- 800fd36: 81a3 strh r3, [r4, #12]
- 800fd38: 6e63 ldr r3, [r4, #100] ; 0x64
- 800fd3a: f423 5300 bic.w r3, r3, #8192 ; 0x2000
- 800fd3e: 6663 str r3, [r4, #100] ; 0x64
- 800fd40: e7cc b.n 800fcdc <__swbuf_r+0x2c>
- ...
-
-0800fd44 <_write_r>:
- 800fd44: b538 push {r3, r4, r5, lr}
- 800fd46: 4c07 ldr r4, [pc, #28] ; (800fd64 <_write_r+0x20>)
- 800fd48: 4605 mov r5, r0
- 800fd4a: 4608 mov r0, r1
- 800fd4c: 4611 mov r1, r2
- 800fd4e: 2200 movs r2, #0
- 800fd50: 6022 str r2, [r4, #0]
- 800fd52: 461a mov r2, r3
- 800fd54: f7fc fd01 bl 800c75a <_write>
- 800fd58: 1c43 adds r3, r0, #1
- 800fd5a: d102 bne.n 800fd62 <_write_r+0x1e>
- 800fd5c: 6823 ldr r3, [r4, #0]
- 800fd5e: b103 cbz r3, 800fd62 <_write_r+0x1e>
- 800fd60: 602b str r3, [r5, #0]
- 800fd62: bd38 pop {r3, r4, r5, pc}
- 800fd64: 20000b08 .word 0x20000b08
-
-0800fd68 <__swsetup_r>:
- 800fd68: b538 push {r3, r4, r5, lr}
- 800fd6a: 4b2a ldr r3, [pc, #168] ; (800fe14 <__swsetup_r+0xac>)
- 800fd6c: 4605 mov r5, r0
- 800fd6e: 6818 ldr r0, [r3, #0]
- 800fd70: 460c mov r4, r1
- 800fd72: b118 cbz r0, 800fd7c <__swsetup_r+0x14>
- 800fd74: 6b83 ldr r3, [r0, #56] ; 0x38
- 800fd76: b90b cbnz r3, 800fd7c <__swsetup_r+0x14>
- 800fd78: f000 ff1c bl 8010bb4 <__sinit>
- 800fd7c: f9b4 300c ldrsh.w r3, [r4, #12]
- 800fd80: b29a uxth r2, r3
- 800fd82: 0711 lsls r1, r2, #28
- 800fd84: d422 bmi.n 800fdcc <__swsetup_r+0x64>
- 800fd86: 06d0 lsls r0, r2, #27
- 800fd88: d407 bmi.n 800fd9a <__swsetup_r+0x32>
- 800fd8a: 2209 movs r2, #9
- 800fd8c: 602a str r2, [r5, #0]
- 800fd8e: f043 0340 orr.w r3, r3, #64 ; 0x40
- 800fd92: 81a3 strh r3, [r4, #12]
- 800fd94: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
- 800fd98: e034 b.n 800fe04 <__swsetup_r+0x9c>
- 800fd9a: 0751 lsls r1, r2, #29
- 800fd9c: d512 bpl.n 800fdc4 <__swsetup_r+0x5c>
- 800fd9e: 6b21 ldr r1, [r4, #48] ; 0x30
- 800fda0: b141 cbz r1, 800fdb4 <__swsetup_r+0x4c>
- 800fda2: f104 0340 add.w r3, r4, #64 ; 0x40
- 800fda6: 4299 cmp r1, r3
- 800fda8: d002 beq.n 800fdb0 <__swsetup_r+0x48>
- 800fdaa: 4628 mov r0, r5
- 800fdac: f000 ff92 bl 8010cd4 <_free_r>
- 800fdb0: 2300 movs r3, #0
- 800fdb2: 6323 str r3, [r4, #48] ; 0x30
- 800fdb4: 89a3 ldrh r3, [r4, #12]
- 800fdb6: f023 0324 bic.w r3, r3, #36 ; 0x24
- 800fdba: 81a3 strh r3, [r4, #12]
- 800fdbc: 2300 movs r3, #0
- 800fdbe: 6063 str r3, [r4, #4]
- 800fdc0: 6923 ldr r3, [r4, #16]
- 800fdc2: 6023 str r3, [r4, #0]
- 800fdc4: 89a3 ldrh r3, [r4, #12]
- 800fdc6: f043 0308 orr.w r3, r3, #8
- 800fdca: 81a3 strh r3, [r4, #12]
- 800fdcc: 6923 ldr r3, [r4, #16]
- 800fdce: b94b cbnz r3, 800fde4 <__swsetup_r+0x7c>
- 800fdd0: 89a3 ldrh r3, [r4, #12]
- 800fdd2: f403 7320 and.w r3, r3, #640 ; 0x280
- 800fdd6: f5b3 7f00 cmp.w r3, #512 ; 0x200
- 800fdda: d003 beq.n 800fde4 <__swsetup_r+0x7c>
- 800fddc: 4621 mov r1, r4
- 800fdde: 4628 mov r0, r5
- 800fde0: f001 f88c bl 8010efc <__smakebuf_r>
- 800fde4: 89a2 ldrh r2, [r4, #12]
- 800fde6: f012 0301 ands.w r3, r2, #1
- 800fdea: d00c beq.n 800fe06 <__swsetup_r+0x9e>
- 800fdec: 2300 movs r3, #0
- 800fdee: 60a3 str r3, [r4, #8]
- 800fdf0: 6963 ldr r3, [r4, #20]
- 800fdf2: 425b negs r3, r3
- 800fdf4: 61a3 str r3, [r4, #24]
- 800fdf6: 6923 ldr r3, [r4, #16]
- 800fdf8: b953 cbnz r3, 800fe10 <__swsetup_r+0xa8>
- 800fdfa: f9b4 300c ldrsh.w r3, [r4, #12]
- 800fdfe: f013 0080 ands.w r0, r3, #128 ; 0x80
- 800fe02: d1c4 bne.n 800fd8e <__swsetup_r+0x26>
- 800fe04: bd38 pop {r3, r4, r5, pc}
- 800fe06: 0792 lsls r2, r2, #30
- 800fe08: bf58 it pl
- 800fe0a: 6963 ldrpl r3, [r4, #20]
- 800fe0c: 60a3 str r3, [r4, #8]
- 800fe0e: e7f2 b.n 800fdf6 <__swsetup_r+0x8e>
- 800fe10: 2000 movs r0, #0
- 800fe12: e7f7 b.n 800fe04 <__swsetup_r+0x9c>
- 800fe14: 20000014 .word 0x20000014
-
-0800fe18 <register_fini>:
- 800fe18: 4b02 ldr r3, [pc, #8] ; (800fe24 <register_fini+0xc>)
- 800fe1a: b113 cbz r3, 800fe22 <register_fini+0xa>
- 800fe1c: 4802 ldr r0, [pc, #8] ; (800fe28 <register_fini+0x10>)
- 800fe1e: f000 b805 b.w 800fe2c <atexit>
- 800fe22: 4770 bx lr
- 800fe24: 00000000 .word 0x00000000
- 800fe28: 08010c05 .word 0x08010c05
-
-0800fe2c <atexit>:
- 800fe2c: 2300 movs r3, #0
- 800fe2e: 4601 mov r1, r0
- 800fe30: 461a mov r2, r3
- 800fe32: 4618 mov r0, r3
- 800fe34: f001 bc5e b.w 80116f4 <__register_exitproc>
-
-0800fe38 <quorem>:
- 800fe38: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
- 800fe3c: 6903 ldr r3, [r0, #16]
- 800fe3e: 690c ldr r4, [r1, #16]
- 800fe40: 42a3 cmp r3, r4
- 800fe42: 4680 mov r8, r0
- 800fe44: f2c0 8082 blt.w 800ff4c <quorem+0x114>
- 800fe48: 3c01 subs r4, #1
- 800fe4a: f101 0714 add.w r7, r1, #20
- 800fe4e: ea4f 0c84 mov.w ip, r4, lsl #2
- 800fe52: f100 0614 add.w r6, r0, #20
- 800fe56: f857 5024 ldr.w r5, [r7, r4, lsl #2]
- 800fe5a: f856 0024 ldr.w r0, [r6, r4, lsl #2]
- 800fe5e: eb06 030c add.w r3, r6, ip
- 800fe62: 3501 adds r5, #1
- 800fe64: eb07 090c add.w r9, r7, ip
- 800fe68: 9301 str r3, [sp, #4]
- 800fe6a: fbb0 f5f5 udiv r5, r0, r5
- 800fe6e: b395 cbz r5, 800fed6 <quorem+0x9e>
- 800fe70: f04f 0a00 mov.w sl, #0
- 800fe74: 4638 mov r0, r7
- 800fe76: 46b6 mov lr, r6
- 800fe78: 46d3 mov fp, sl
- 800fe7a: f850 2b04 ldr.w r2, [r0], #4
- 800fe7e: b293 uxth r3, r2
- 800fe80: fb05 a303 mla r3, r5, r3, sl
- 800fe84: ea4f 4a13 mov.w sl, r3, lsr #16
- 800fe88: b29b uxth r3, r3
- 800fe8a: ebab 0303 sub.w r3, fp, r3
- 800fe8e: 0c12 lsrs r2, r2, #16
- 800fe90: f8de b000 ldr.w fp, [lr]
- 800fe94: fb05 a202 mla r2, r5, r2, sl
- 800fe98: fa13 f38b uxtah r3, r3, fp
- 800fe9c: ea4f 4a12 mov.w sl, r2, lsr #16
- 800fea0: fa1f fb82 uxth.w fp, r2
- 800fea4: f8de 2000 ldr.w r2, [lr]
- 800fea8: ebcb 4212 rsb r2, fp, r2, lsr #16
- 800feac: eb02 4223 add.w r2, r2, r3, asr #16
- 800feb0: b29b uxth r3, r3
- 800feb2: ea43 4302 orr.w r3, r3, r2, lsl #16
- 800feb6: 4581 cmp r9, r0
- 800feb8: ea4f 4b22 mov.w fp, r2, asr #16
- 800febc: f84e 3b04 str.w r3, [lr], #4
- 800fec0: d2db bcs.n 800fe7a <quorem+0x42>
- 800fec2: f856 300c ldr.w r3, [r6, ip]
- 800fec6: b933 cbnz r3, 800fed6 <quorem+0x9e>
- 800fec8: 9b01 ldr r3, [sp, #4]
- 800feca: 3b04 subs r3, #4
- 800fecc: 429e cmp r6, r3
- 800fece: 461a mov r2, r3
- 800fed0: d330 bcc.n 800ff34 <quorem+0xfc>
- 800fed2: f8c8 4010 str.w r4, [r8, #16]
- 800fed6: 4640 mov r0, r8
- 800fed8: f001 fa3a bl 8011350 <__mcmp>
- 800fedc: 2800 cmp r0, #0
- 800fede: db25 blt.n 800ff2c <quorem+0xf4>
- 800fee0: 3501 adds r5, #1
- 800fee2: 4630 mov r0, r6
- 800fee4: f04f 0c00 mov.w ip, #0
- 800fee8: f857 2b04 ldr.w r2, [r7], #4
- 800feec: f8d0 e000 ldr.w lr, [r0]
- 800fef0: b293 uxth r3, r2
- 800fef2: ebac 0303 sub.w r3, ip, r3
- 800fef6: 0c12 lsrs r2, r2, #16
- 800fef8: fa13 f38e uxtah r3, r3, lr
- 800fefc: ebc2 421e rsb r2, r2, lr, lsr #16
- 800ff00: eb02 4223 add.w r2, r2, r3, asr #16
- 800ff04: b29b uxth r3, r3
- 800ff06: ea43 4302 orr.w r3, r3, r2, lsl #16
- 800ff0a: 45b9 cmp r9, r7
- 800ff0c: ea4f 4c22 mov.w ip, r2, asr #16
- 800ff10: f840 3b04 str.w r3, [r0], #4
- 800ff14: d2e8 bcs.n 800fee8 <quorem+0xb0>
- 800ff16: f856 2024 ldr.w r2, [r6, r4, lsl #2]
- 800ff1a: eb06 0384 add.w r3, r6, r4, lsl #2
- 800ff1e: b92a cbnz r2, 800ff2c <quorem+0xf4>
- 800ff20: 3b04 subs r3, #4
- 800ff22: 429e cmp r6, r3
- 800ff24: 461a mov r2, r3
- 800ff26: d30b bcc.n 800ff40 <quorem+0x108>
- 800ff28: f8c8 4010 str.w r4, [r8, #16]
- 800ff2c: 4628 mov r0, r5
- 800ff2e: b003 add sp, #12
- 800ff30: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
- 800ff34: 6812 ldr r2, [r2, #0]
- 800ff36: 3b04 subs r3, #4
- 800ff38: 2a00 cmp r2, #0
- 800ff3a: d1ca bne.n 800fed2 <quorem+0x9a>
- 800ff3c: 3c01 subs r4, #1
- 800ff3e: e7c5 b.n 800fecc <quorem+0x94>
- 800ff40: 6812 ldr r2, [r2, #0]
- 800ff42: 3b04 subs r3, #4
- 800ff44: 2a00 cmp r2, #0
- 800ff46: d1ef bne.n 800ff28 <quorem+0xf0>
- 800ff48: 3c01 subs r4, #1
- 800ff4a: e7ea b.n 800ff22 <quorem+0xea>
- 800ff4c: 2000 movs r0, #0
- 800ff4e: e7ee b.n 800ff2e <quorem+0xf6>
-
-0800ff50 <_dtoa_r>:
- 800ff50: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
- 800ff54: b095 sub sp, #84 ; 0x54
- 800ff56: ec57 6b10 vmov r6, r7, d0
- 800ff5a: 9108 str r1, [sp, #32]
- 800ff5c: 6c01 ldr r1, [r0, #64] ; 0x40
- 800ff5e: 920a str r2, [sp, #40] ; 0x28
- 800ff60: 4604 mov r4, r0
- 800ff62: 9311 str r3, [sp, #68] ; 0x44
- 800ff64: 9d1e ldr r5, [sp, #120] ; 0x78
- 800ff66: e9cd 6704 strd r6, r7, [sp, #16]
- 800ff6a: b141 cbz r1, 800ff7e <_dtoa_r+0x2e>
- 800ff6c: 6c42 ldr r2, [r0, #68] ; 0x44
- 800ff6e: 604a str r2, [r1, #4]
- 800ff70: 2301 movs r3, #1
- 800ff72: 4093 lsls r3, r2
- 800ff74: 608b str r3, [r1, #8]
- 800ff76: f001 f826 bl 8010fc6 <_Bfree>
- 800ff7a: 2300 movs r3, #0
- 800ff7c: 6423 str r3, [r4, #64] ; 0x40
- 800ff7e: 1e3b subs r3, r7, #0
- 800ff80: bfbb ittet lt
- 800ff82: f023 4300 biclt.w r3, r3, #2147483648 ; 0x80000000
- 800ff86: 9305 strlt r3, [sp, #20]
- 800ff88: 2300 movge r3, #0
- 800ff8a: 2201 movlt r2, #1
- 800ff8c: bfac ite ge
- 800ff8e: 602b strge r3, [r5, #0]
- 800ff90: 602a strlt r2, [r5, #0]
- 800ff92: 4ba9 ldr r3, [pc, #676] ; (8010238 <_dtoa_r+0x2e8>)
- 800ff94: 9d05 ldr r5, [sp, #20]
- 800ff96: 43ab bics r3, r5
- 800ff98: d11b bne.n 800ffd2 <_dtoa_r+0x82>
- 800ff9a: 9a11 ldr r2, [sp, #68] ; 0x44
- 800ff9c: f242 730f movw r3, #9999 ; 0x270f
- 800ffa0: 6013 str r3, [r2, #0]
- 800ffa2: 9b04 ldr r3, [sp, #16]
- 800ffa4: b923 cbnz r3, 800ffb0 <_dtoa_r+0x60>
- 800ffa6: f3c5 0513 ubfx r5, r5, #0, #20
- 800ffaa: 2d00 cmp r5, #0
- 800ffac: f000 84d9 beq.w 8010962 <_dtoa_r+0xa12>
- 800ffb0: 9b1f ldr r3, [sp, #124] ; 0x7c
- 800ffb2: b90b cbnz r3, 800ffb8 <_dtoa_r+0x68>
- 800ffb4: 4ba1 ldr r3, [pc, #644] ; (801023c <_dtoa_r+0x2ec>)
- 800ffb6: e020 b.n 800fffa <_dtoa_r+0xaa>
- 800ffb8: 4ba0 ldr r3, [pc, #640] ; (801023c <_dtoa_r+0x2ec>)
- 800ffba: 9302 str r3, [sp, #8]
- 800ffbc: 3303 adds r3, #3
- 800ffbe: 9a1f ldr r2, [sp, #124] ; 0x7c
- 800ffc0: 6013 str r3, [r2, #0]
- 800ffc2: 9802 ldr r0, [sp, #8]
- 800ffc4: b015 add sp, #84 ; 0x54
- 800ffc6: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
- 800ffca: 4b9d ldr r3, [pc, #628] ; (8010240 <_dtoa_r+0x2f0>)
- 800ffcc: 9302 str r3, [sp, #8]
- 800ffce: 3308 adds r3, #8
- 800ffd0: e7f5 b.n 800ffbe <_dtoa_r+0x6e>
- 800ffd2: ed9d 7b04 vldr d7, [sp, #16]
- 800ffd6: eeb5 7b40 vcmp.f64 d7, #0.0
- 800ffda: eef1 fa10 vmrs APSR_nzcv, fpscr
- 800ffde: ed8d 7b02 vstr d7, [sp, #8]
- 800ffe2: d10c bne.n 800fffe <_dtoa_r+0xae>
- 800ffe4: 9a11 ldr r2, [sp, #68] ; 0x44
- 800ffe6: 2301 movs r3, #1
- 800ffe8: 6013 str r3, [r2, #0]
- 800ffea: 9b1f ldr r3, [sp, #124] ; 0x7c
- 800ffec: 2b00 cmp r3, #0
- 800ffee: f000 84b5 beq.w 801095c <_dtoa_r+0xa0c>
- 800fff2: 4b94 ldr r3, [pc, #592] ; (8010244 <_dtoa_r+0x2f4>)
- 800fff4: 9a1f ldr r2, [sp, #124] ; 0x7c
- 800fff6: 6013 str r3, [r2, #0]
- 800fff8: 3b01 subs r3, #1
- 800fffa: 9302 str r3, [sp, #8]
- 800fffc: e7e1 b.n 800ffc2 <_dtoa_r+0x72>
- 800fffe: a913 add r1, sp, #76 ; 0x4c
- 8010000: aa12 add r2, sp, #72 ; 0x48
- 8010002: ed9d 0b02 vldr d0, [sp, #8]
- 8010006: 4620 mov r0, r4
- 8010008: f001 fa19 bl 801143e <__d2b>
- 801000c: f3c5 560a ubfx r6, r5, #20, #11
- 8010010: 9001 str r0, [sp, #4]
- 8010012: 9912 ldr r1, [sp, #72] ; 0x48
- 8010014: 2e00 cmp r6, #0
- 8010016: d046 beq.n 80100a6 <_dtoa_r+0x156>
- 8010018: 9803 ldr r0, [sp, #12]
- 801001a: f3c0 0013 ubfx r0, r0, #0, #20
- 801001e: e9dd 2302 ldrd r2, r3, [sp, #8]
- 8010022: f040 537f orr.w r3, r0, #1069547520 ; 0x3fc00000
- 8010026: f443 1340 orr.w r3, r3, #3145728 ; 0x300000
- 801002a: f2a6 3aff subw sl, r6, #1023 ; 0x3ff
- 801002e: 2700 movs r7, #0
- 8010030: ee07 aa90 vmov s15, sl
- 8010034: ec43 2b16 vmov d6, r2, r3
- 8010038: eeb8 5be7 vcvt.f64.s32 d5, s15
- 801003c: ed9f 4b78 vldr d4, [pc, #480] ; 8010220 <_dtoa_r+0x2d0>
- 8010040: eeb7 7b08 vmov.f64 d7, #120 ; 0x3fc00000 1.5
- 8010044: ee36 7b47 vsub.f64 d7, d6, d7
- 8010048: ed9f 6b77 vldr d6, [pc, #476] ; 8010228 <_dtoa_r+0x2d8>
- 801004c: eea7 6b04 vfma.f64 d6, d7, d4
- 8010050: eeb0 7b46 vmov.f64 d7, d6
- 8010054: ed9f 6b76 vldr d6, [pc, #472] ; 8010230 <_dtoa_r+0x2e0>
- 8010058: eea5 7b06 vfma.f64 d7, d5, d6
- 801005c: eefd 6bc7 vcvt.s32.f64 s13, d7
- 8010060: eeb5 7bc0 vcmpe.f64 d7, #0.0
- 8010064: eef1 fa10 vmrs APSR_nzcv, fpscr
- 8010068: ee16 ba90 vmov fp, s13
- 801006c: d508 bpl.n 8010080 <_dtoa_r+0x130>
- 801006e: eeb8 6be6 vcvt.f64.s32 d6, s13
- 8010072: eeb4 6b47 vcmp.f64 d6, d7
- 8010076: eef1 fa10 vmrs APSR_nzcv, fpscr
- 801007a: bf18 it ne
- 801007c: f10b 3bff addne.w fp, fp, #4294967295 ; 0xffffffff
- 8010080: f1bb 0f16 cmp.w fp, #22
- 8010084: d834 bhi.n 80100f0 <_dtoa_r+0x1a0>
- 8010086: 4b70 ldr r3, [pc, #448] ; (8010248 <_dtoa_r+0x2f8>)
- 8010088: eb03 03cb add.w r3, r3, fp, lsl #3
- 801008c: ed93 7b00 vldr d7, [r3]
- 8010090: ed9d 6b04 vldr d6, [sp, #16]
- 8010094: eeb4 7bc6 vcmpe.f64 d7, d6
- 8010098: eef1 fa10 vmrs APSR_nzcv, fpscr
- 801009c: dd01 ble.n 80100a2 <_dtoa_r+0x152>
- 801009e: f10b 3bff add.w fp, fp, #4294967295 ; 0xffffffff
- 80100a2: 2300 movs r3, #0
- 80100a4: e025 b.n 80100f2 <_dtoa_r+0x1a2>
- 80100a6: 9b13 ldr r3, [sp, #76] ; 0x4c
- 80100a8: eb01 0a03 add.w sl, r1, r3
- 80100ac: f20a 4332 addw r3, sl, #1074 ; 0x432
- 80100b0: 2b20 cmp r3, #32
- 80100b2: dd17 ble.n 80100e4 <_dtoa_r+0x194>
- 80100b4: f1c3 0340 rsb r3, r3, #64 ; 0x40
- 80100b8: 9a04 ldr r2, [sp, #16]
- 80100ba: 409d lsls r5, r3
- 80100bc: f20a 4312 addw r3, sl, #1042 ; 0x412
- 80100c0: fa22 f303 lsr.w r3, r2, r3
- 80100c4: 432b orrs r3, r5
- 80100c6: ee07 3a90 vmov s15, r3
- 80100ca: eeb8 7b67 vcvt.f64.u32 d7, s15
- 80100ce: f10a 3aff add.w sl, sl, #4294967295 ; 0xffffffff
- 80100d2: ed8d 7b02 vstr d7, [sp, #8]
- 80100d6: 9803 ldr r0, [sp, #12]
- 80100d8: e9dd 2302 ldrd r2, r3, [sp, #8]
- 80100dc: 2701 movs r7, #1
- 80100de: f1a0 73f8 sub.w r3, r0, #32505856 ; 0x1f00000
- 80100e2: e7a5 b.n 8010030 <_dtoa_r+0xe0>
- 80100e4: 9a04 ldr r2, [sp, #16]
- 80100e6: f1c3 0320 rsb r3, r3, #32
- 80100ea: fa02 f303 lsl.w r3, r2, r3
- 80100ee: e7ea b.n 80100c6 <_dtoa_r+0x176>
- 80100f0: 2301 movs r3, #1
- 80100f2: eba1 0a0a sub.w sl, r1, sl
- 80100f6: 9310 str r3, [sp, #64] ; 0x40
- 80100f8: f1ba 0301 subs.w r3, sl, #1
- 80100fc: 9307 str r3, [sp, #28]
- 80100fe: bf43 ittte mi
- 8010100: 2300 movmi r3, #0
- 8010102: f1ca 0a01 rsbmi sl, sl, #1
- 8010106: 9307 strmi r3, [sp, #28]
- 8010108: f04f 0a00 movpl.w sl, #0
- 801010c: f1bb 0f00 cmp.w fp, #0
- 8010110: db19 blt.n 8010146 <_dtoa_r+0x1f6>
- 8010112: 9b07 ldr r3, [sp, #28]
- 8010114: f8cd b02c str.w fp, [sp, #44] ; 0x2c
- 8010118: 445b add r3, fp
- 801011a: 9307 str r3, [sp, #28]
- 801011c: f04f 0800 mov.w r8, #0
- 8010120: 9b08 ldr r3, [sp, #32]
- 8010122: 2b09 cmp r3, #9
- 8010124: d863 bhi.n 80101ee <_dtoa_r+0x29e>
- 8010126: 2b05 cmp r3, #5
- 8010128: bfc4 itt gt
- 801012a: 3b04 subgt r3, #4
- 801012c: 9308 strgt r3, [sp, #32]
- 801012e: 9b08 ldr r3, [sp, #32]
- 8010130: f1a3 0302 sub.w r3, r3, #2
- 8010134: bfcc ite gt
- 8010136: 2500 movgt r5, #0
- 8010138: 2501 movle r5, #1
- 801013a: 2b03 cmp r3, #3
- 801013c: d863 bhi.n 8010206 <_dtoa_r+0x2b6>
- 801013e: e8df f003 tbb [pc, r3]
- 8010142: 5452 .short 0x5452
- 8010144: 4609 .short 0x4609
- 8010146: 2300 movs r3, #0
- 8010148: ebaa 0a0b sub.w sl, sl, fp
- 801014c: f1cb 0800 rsb r8, fp, #0
- 8010150: 930b str r3, [sp, #44] ; 0x2c
- 8010152: e7e5 b.n 8010120 <_dtoa_r+0x1d0>
- 8010154: 2301 movs r3, #1
- 8010156: 9309 str r3, [sp, #36] ; 0x24
- 8010158: 9b0a ldr r3, [sp, #40] ; 0x28
- 801015a: 2b00 cmp r3, #0
- 801015c: dd56 ble.n 801020c <_dtoa_r+0x2bc>
- 801015e: 9306 str r3, [sp, #24]
- 8010160: 4699 mov r9, r3
- 8010162: 2200 movs r2, #0
- 8010164: 6462 str r2, [r4, #68] ; 0x44
- 8010166: 2204 movs r2, #4
- 8010168: f102 0014 add.w r0, r2, #20
- 801016c: 4298 cmp r0, r3
- 801016e: 6c61 ldr r1, [r4, #68] ; 0x44
- 8010170: d951 bls.n 8010216 <_dtoa_r+0x2c6>
- 8010172: 4620 mov r0, r4
- 8010174: f000 ff02 bl 8010f7c <_Balloc>
- 8010178: f1b9 0f0e cmp.w r9, #14
- 801017c: 9002 str r0, [sp, #8]
- 801017e: 6420 str r0, [r4, #64] ; 0x40
- 8010180: f200 80c1 bhi.w 8010306 <_dtoa_r+0x3b6>
- 8010184: 2d00 cmp r5, #0
- 8010186: f000 80be beq.w 8010306 <_dtoa_r+0x3b6>
- 801018a: ed9d 7b04 vldr d7, [sp, #16]
- 801018e: f1bb 0f00 cmp.w fp, #0
- 8010192: ed8d 7b0e vstr d7, [sp, #56] ; 0x38
- 8010196: f340 80e5 ble.w 8010364 <_dtoa_r+0x414>
- 801019a: 4a2b ldr r2, [pc, #172] ; (8010248 <_dtoa_r+0x2f8>)
- 801019c: f00b 030f and.w r3, fp, #15
- 80101a0: eb02 03c3 add.w r3, r2, r3, lsl #3
- 80101a4: ed93 7b00 vldr d7, [r3]
- 80101a8: ea4f 132b mov.w r3, fp, asr #4
- 80101ac: 06da lsls r2, r3, #27
- 80101ae: f140 80d7 bpl.w 8010360 <_dtoa_r+0x410>
- 80101b2: 4a26 ldr r2, [pc, #152] ; (801024c <_dtoa_r+0x2fc>)
- 80101b4: ed9d 5b0e vldr d5, [sp, #56] ; 0x38
- 80101b8: ed92 6b08 vldr d6, [r2, #32]
- 80101bc: ee85 6b06 vdiv.f64 d6, d5, d6
- 80101c0: ed8d 6b04 vstr d6, [sp, #16]
- 80101c4: f003 030f and.w r3, r3, #15
- 80101c8: 2203 movs r2, #3
- 80101ca: 4920 ldr r1, [pc, #128] ; (801024c <_dtoa_r+0x2fc>)
- 80101cc: e049 b.n 8010262 <_dtoa_r+0x312>
- 80101ce: 2301 movs r3, #1
- 80101d0: 9309 str r3, [sp, #36] ; 0x24
- 80101d2: 9b0a ldr r3, [sp, #40] ; 0x28
- 80101d4: 445b add r3, fp
- 80101d6: f103 0901 add.w r9, r3, #1
- 80101da: 9306 str r3, [sp, #24]
- 80101dc: 464b mov r3, r9
- 80101de: 2b01 cmp r3, #1
- 80101e0: bfb8 it lt
- 80101e2: 2301 movlt r3, #1
- 80101e4: e7bd b.n 8010162 <_dtoa_r+0x212>
- 80101e6: 2300 movs r3, #0
- 80101e8: e7b5 b.n 8010156 <_dtoa_r+0x206>
- 80101ea: 2300 movs r3, #0
- 80101ec: e7f0 b.n 80101d0 <_dtoa_r+0x280>
- 80101ee: 2501 movs r5, #1
- 80101f0: 2300 movs r3, #0
- 80101f2: e9cd 3508 strd r3, r5, [sp, #32]
- 80101f6: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff
- 80101fa: 9306 str r3, [sp, #24]
- 80101fc: 4699 mov r9, r3
- 80101fe: 2200 movs r2, #0
- 8010200: 2312 movs r3, #18
- 8010202: 920a str r2, [sp, #40] ; 0x28
- 8010204: e7ad b.n 8010162 <_dtoa_r+0x212>
- 8010206: 2301 movs r3, #1
- 8010208: 9309 str r3, [sp, #36] ; 0x24
- 801020a: e7f4 b.n 80101f6 <_dtoa_r+0x2a6>
- 801020c: 2301 movs r3, #1
- 801020e: 9306 str r3, [sp, #24]
- 8010210: 4699 mov r9, r3
- 8010212: 461a mov r2, r3
- 8010214: e7f5 b.n 8010202 <_dtoa_r+0x2b2>
- 8010216: 3101 adds r1, #1
- 8010218: 6461 str r1, [r4, #68] ; 0x44
- 801021a: 0052 lsls r2, r2, #1
- 801021c: e7a4 b.n 8010168 <_dtoa_r+0x218>
- 801021e: bf00 nop
- 8010220: 636f4361 .word 0x636f4361
- 8010224: 3fd287a7 .word 0x3fd287a7
- 8010228: 8b60c8b3 .word 0x8b60c8b3
- 801022c: 3fc68a28 .word 0x3fc68a28
- 8010230: 509f79fb .word 0x509f79fb
- 8010234: 3fd34413 .word 0x3fd34413
- 8010238: 7ff00000 .word 0x7ff00000
- 801023c: 08012e8d .word 0x08012e8d
- 8010240: 08012e84 .word 0x08012e84
- 8010244: 08012e63 .word 0x08012e63
- 8010248: 08012ec0 .word 0x08012ec0
- 801024c: 08012e98 .word 0x08012e98
- 8010250: 07de lsls r6, r3, #31
- 8010252: d504 bpl.n 801025e <_dtoa_r+0x30e>
- 8010254: ed91 6b00 vldr d6, [r1]
- 8010258: 3201 adds r2, #1
- 801025a: ee27 7b06 vmul.f64 d7, d7, d6
- 801025e: 105b asrs r3, r3, #1
- 8010260: 3108 adds r1, #8
- 8010262: 2b00 cmp r3, #0
- 8010264: d1f4 bne.n 8010250 <_dtoa_r+0x300>
- 8010266: ed9d 6b04 vldr d6, [sp, #16]
- 801026a: ee86 7b07 vdiv.f64 d7, d6, d7
- 801026e: ed8d 7b04 vstr d7, [sp, #16]
- 8010272: 9b10 ldr r3, [sp, #64] ; 0x40
- 8010274: 2b00 cmp r3, #0
- 8010276: f000 80a7 beq.w 80103c8 <_dtoa_r+0x478>
- 801027a: eeb7 6b00 vmov.f64 d6, #112 ; 0x3f800000 1.0
- 801027e: ed9d 7b04 vldr d7, [sp, #16]
- 8010282: eeb4 7bc6 vcmpe.f64 d7, d6
- 8010286: eef1 fa10 vmrs APSR_nzcv, fpscr
- 801028a: f140 809d bpl.w 80103c8 <_dtoa_r+0x478>
- 801028e: f1b9 0f00 cmp.w r9, #0
- 8010292: f000 8099 beq.w 80103c8 <_dtoa_r+0x478>
- 8010296: 9b06 ldr r3, [sp, #24]
- 8010298: 2b00 cmp r3, #0
- 801029a: dd30 ble.n 80102fe <_dtoa_r+0x3ae>
- 801029c: eeb2 6b04 vmov.f64 d6, #36 ; 0x41200000 10.0
- 80102a0: ee27 7b06 vmul.f64 d7, d7, d6
- 80102a4: ed8d 7b04 vstr d7, [sp, #16]
- 80102a8: 9d06 ldr r5, [sp, #24]
- 80102aa: f10b 33ff add.w r3, fp, #4294967295 ; 0xffffffff
- 80102ae: 3201 adds r2, #1
- 80102b0: ed9d 6b04 vldr d6, [sp, #16]
- 80102b4: eeb1 5b0c vmov.f64 d5, #28 ; 0x40e00000 7.0
- 80102b8: ee07 2a90 vmov s15, r2
- 80102bc: eeb8 7be7 vcvt.f64.s32 d7, s15
- 80102c0: eea7 5b06 vfma.f64 d5, d7, d6
- 80102c4: ed8d 5b04 vstr d5, [sp, #16]
- 80102c8: 9a05 ldr r2, [sp, #20]
- 80102ca: e9dd 0104 ldrd r0, r1, [sp, #16]
- 80102ce: f1a2 7150 sub.w r1, r2, #54525952 ; 0x3400000
- 80102d2: 2d00 cmp r5, #0
- 80102d4: d17b bne.n 80103ce <_dtoa_r+0x47e>
- 80102d6: eeb1 7b04 vmov.f64 d7, #20 ; 0x40a00000 5.0
- 80102da: ee36 6b47 vsub.f64 d6, d6, d7
- 80102de: ec41 0b17 vmov d7, r0, r1
- 80102e2: eeb4 6bc7 vcmpe.f64 d6, d7
- 80102e6: eef1 fa10 vmrs APSR_nzcv, fpscr
- 80102ea: f300 8253 bgt.w 8010794 <_dtoa_r+0x844>
- 80102ee: eeb1 7b47 vneg.f64 d7, d7
- 80102f2: eeb4 6bc7 vcmpe.f64 d6, d7
- 80102f6: eef1 fa10 vmrs APSR_nzcv, fpscr
- 80102fa: f100 8249 bmi.w 8010790 <_dtoa_r+0x840>
- 80102fe: e9dd 230e ldrd r2, r3, [sp, #56] ; 0x38
- 8010302: e9cd 2304 strd r2, r3, [sp, #16]
- 8010306: 9b13 ldr r3, [sp, #76] ; 0x4c
- 8010308: 2b00 cmp r3, #0
- 801030a: f2c0 8119 blt.w 8010540 <_dtoa_r+0x5f0>
- 801030e: f1bb 0f0e cmp.w fp, #14
- 8010312: f300 8115 bgt.w 8010540 <_dtoa_r+0x5f0>
- 8010316: 4bc3 ldr r3, [pc, #780] ; (8010624 <_dtoa_r+0x6d4>)
- 8010318: eb03 03cb add.w r3, r3, fp, lsl #3
- 801031c: ed93 6b00 vldr d6, [r3]
- 8010320: 9b0a ldr r3, [sp, #40] ; 0x28
- 8010322: 2b00 cmp r3, #0
- 8010324: f280 80ba bge.w 801049c <_dtoa_r+0x54c>
- 8010328: f1b9 0f00 cmp.w r9, #0
- 801032c: f300 80b6 bgt.w 801049c <_dtoa_r+0x54c>
- 8010330: f040 822d bne.w 801078e <_dtoa_r+0x83e>
- 8010334: eeb1 7b04 vmov.f64 d7, #20 ; 0x40a00000 5.0
- 8010338: ee26 6b07 vmul.f64 d6, d6, d7
- 801033c: ed9d 7b04 vldr d7, [sp, #16]
- 8010340: eeb4 6bc7 vcmpe.f64 d6, d7
- 8010344: eef1 fa10 vmrs APSR_nzcv, fpscr
- 8010348: 464d mov r5, r9
- 801034a: 464f mov r7, r9
- 801034c: f280 8204 bge.w 8010758 <_dtoa_r+0x808>
- 8010350: 9b02 ldr r3, [sp, #8]
- 8010352: 9a02 ldr r2, [sp, #8]
- 8010354: 1c5e adds r6, r3, #1
- 8010356: 2331 movs r3, #49 ; 0x31
- 8010358: 7013 strb r3, [r2, #0]
- 801035a: f10b 0b01 add.w fp, fp, #1
- 801035e: e1ff b.n 8010760 <_dtoa_r+0x810>
- 8010360: 2202 movs r2, #2
- 8010362: e732 b.n 80101ca <_dtoa_r+0x27a>
- 8010364: d02e beq.n 80103c4 <_dtoa_r+0x474>
- 8010366: f1cb 0300 rsb r3, fp, #0
- 801036a: 4aae ldr r2, [pc, #696] ; (8010624 <_dtoa_r+0x6d4>)
- 801036c: f003 010f and.w r1, r3, #15
- 8010370: eb02 02c1 add.w r2, r2, r1, lsl #3
- 8010374: ed92 7b00 vldr d7, [r2]
- 8010378: ed9d 6b0e vldr d6, [sp, #56] ; 0x38
- 801037c: ee26 7b07 vmul.f64 d7, d6, d7
- 8010380: ed8d 7b0c vstr d7, [sp, #48] ; 0x30
- 8010384: e9dd 120c ldrd r1, r2, [sp, #48] ; 0x30
- 8010388: e9cd 1204 strd r1, r2, [sp, #16]
- 801038c: 49a6 ldr r1, [pc, #664] ; (8010628 <_dtoa_r+0x6d8>)
- 801038e: 111b asrs r3, r3, #4
- 8010390: 2000 movs r0, #0
- 8010392: 2202 movs r2, #2
- 8010394: b93b cbnz r3, 80103a6 <_dtoa_r+0x456>
- 8010396: 2800 cmp r0, #0
- 8010398: f43f af6b beq.w 8010272 <_dtoa_r+0x322>
- 801039c: e9dd 010c ldrd r0, r1, [sp, #48] ; 0x30
- 80103a0: e9cd 0104 strd r0, r1, [sp, #16]
- 80103a4: e765 b.n 8010272 <_dtoa_r+0x322>
- 80103a6: 07dd lsls r5, r3, #31
- 80103a8: d509 bpl.n 80103be <_dtoa_r+0x46e>
- 80103aa: ed9d 6b0c vldr d6, [sp, #48] ; 0x30
- 80103ae: ed91 7b00 vldr d7, [r1]
- 80103b2: ee26 7b07 vmul.f64 d7, d6, d7
- 80103b6: ed8d 7b0c vstr d7, [sp, #48] ; 0x30
- 80103ba: 3201 adds r2, #1
- 80103bc: 2001 movs r0, #1
- 80103be: 105b asrs r3, r3, #1
- 80103c0: 3108 adds r1, #8
- 80103c2: e7e7 b.n 8010394 <_dtoa_r+0x444>
- 80103c4: 2202 movs r2, #2
- 80103c6: e754 b.n 8010272 <_dtoa_r+0x322>
- 80103c8: 465b mov r3, fp
- 80103ca: 464d mov r5, r9
- 80103cc: e770 b.n 80102b0 <_dtoa_r+0x360>
- 80103ce: 4a95 ldr r2, [pc, #596] ; (8010624 <_dtoa_r+0x6d4>)
- 80103d0: eb02 02c5 add.w r2, r2, r5, lsl #3
- 80103d4: ed12 4b02 vldr d4, [r2, #-8]
- 80103d8: 9a09 ldr r2, [sp, #36] ; 0x24
- 80103da: ec41 0b17 vmov d7, r0, r1
- 80103de: b35a cbz r2, 8010438 <_dtoa_r+0x4e8>
- 80103e0: eeb6 3b00 vmov.f64 d3, #96 ; 0x3f000000 0.5
- 80103e4: eeb7 2b00 vmov.f64 d2, #112 ; 0x3f800000 1.0
- 80103e8: 9e02 ldr r6, [sp, #8]
- 80103ea: ee83 5b04 vdiv.f64 d5, d3, d4
- 80103ee: eeb2 3b04 vmov.f64 d3, #36 ; 0x41200000 10.0
- 80103f2: ee35 7b47 vsub.f64 d7, d5, d7
- 80103f6: eefd 4bc6 vcvt.s32.f64 s9, d6
- 80103fa: ee14 2a90 vmov r2, s9
- 80103fe: eeb8 5be4 vcvt.f64.s32 d5, s9
- 8010402: 3230 adds r2, #48 ; 0x30
- 8010404: ee36 6b45 vsub.f64 d6, d6, d5
- 8010408: eeb4 6bc7 vcmpe.f64 d6, d7
- 801040c: eef1 fa10 vmrs APSR_nzcv, fpscr
- 8010410: f806 2b01 strb.w r2, [r6], #1
- 8010414: d43b bmi.n 801048e <_dtoa_r+0x53e>
- 8010416: ee32 5b46 vsub.f64 d5, d2, d6
- 801041a: eeb4 5bc7 vcmpe.f64 d5, d7
- 801041e: eef1 fa10 vmrs APSR_nzcv, fpscr
- 8010422: d472 bmi.n 801050a <_dtoa_r+0x5ba>
- 8010424: 9a02 ldr r2, [sp, #8]
- 8010426: 1ab2 subs r2, r6, r2
- 8010428: 4295 cmp r5, r2
- 801042a: f77f af68 ble.w 80102fe <_dtoa_r+0x3ae>
- 801042e: ee27 7b03 vmul.f64 d7, d7, d3
- 8010432: ee26 6b03 vmul.f64 d6, d6, d3
- 8010436: e7de b.n 80103f6 <_dtoa_r+0x4a6>
- 8010438: 9a02 ldr r2, [sp, #8]
- 801043a: ee24 7b07 vmul.f64 d7, d4, d7
- 801043e: 1956 adds r6, r2, r5
- 8010440: 4611 mov r1, r2
- 8010442: eeb2 3b04 vmov.f64 d3, #36 ; 0x41200000 10.0
- 8010446: eefd 4bc6 vcvt.s32.f64 s9, d6
- 801044a: ee14 2a90 vmov r2, s9
- 801044e: 3230 adds r2, #48 ; 0x30
- 8010450: f801 2b01 strb.w r2, [r1], #1
- 8010454: 42b1 cmp r1, r6
- 8010456: eeb8 5be4 vcvt.f64.s32 d5, s9
- 801045a: ee36 6b45 vsub.f64 d6, d6, d5
- 801045e: d11a bne.n 8010496 <_dtoa_r+0x546>
- 8010460: eeb6 5b00 vmov.f64 d5, #96 ; 0x3f000000 0.5
- 8010464: ee37 4b05 vadd.f64 d4, d7, d5
- 8010468: eeb4 6bc4 vcmpe.f64 d6, d4
- 801046c: eef1 fa10 vmrs APSR_nzcv, fpscr
- 8010470: dc4b bgt.n 801050a <_dtoa_r+0x5ba>
- 8010472: ee35 7b47 vsub.f64 d7, d5, d7
- 8010476: eeb4 6bc7 vcmpe.f64 d6, d7
- 801047a: eef1 fa10 vmrs APSR_nzcv, fpscr
- 801047e: f57f af3e bpl.w 80102fe <_dtoa_r+0x3ae>
- 8010482: f816 2c01 ldrb.w r2, [r6, #-1]
- 8010486: 2a30 cmp r2, #48 ; 0x30
- 8010488: f106 31ff add.w r1, r6, #4294967295 ; 0xffffffff
- 801048c: d001 beq.n 8010492 <_dtoa_r+0x542>
- 801048e: 469b mov fp, r3
- 8010490: e02a b.n 80104e8 <_dtoa_r+0x598>
- 8010492: 460e mov r6, r1
- 8010494: e7f5 b.n 8010482 <_dtoa_r+0x532>
- 8010496: ee26 6b03 vmul.f64 d6, d6, d3
- 801049a: e7d4 b.n 8010446 <_dtoa_r+0x4f6>
- 801049c: ed9d 7b04 vldr d7, [sp, #16]
- 80104a0: eeb2 4b04 vmov.f64 d4, #36 ; 0x41200000 10.0
- 80104a4: 9e02 ldr r6, [sp, #8]
- 80104a6: ee87 5b06 vdiv.f64 d5, d7, d6
- 80104aa: eebd 5bc5 vcvt.s32.f64 s10, d5
- 80104ae: ee15 3a10 vmov r3, s10
- 80104b2: 3330 adds r3, #48 ; 0x30
- 80104b4: f806 3b01 strb.w r3, [r6], #1
- 80104b8: 9b02 ldr r3, [sp, #8]
- 80104ba: 1af3 subs r3, r6, r3
- 80104bc: 4599 cmp r9, r3
- 80104be: eeb8 3bc5 vcvt.f64.s32 d3, s10
- 80104c2: eea3 7b46 vfms.f64 d7, d3, d6
- 80104c6: d133 bne.n 8010530 <_dtoa_r+0x5e0>
- 80104c8: ee37 7b07 vadd.f64 d7, d7, d7
- 80104cc: eeb4 7bc6 vcmpe.f64 d7, d6
- 80104d0: eef1 fa10 vmrs APSR_nzcv, fpscr
- 80104d4: dc18 bgt.n 8010508 <_dtoa_r+0x5b8>
- 80104d6: eeb4 7b46 vcmp.f64 d7, d6
- 80104da: eef1 fa10 vmrs APSR_nzcv, fpscr
- 80104de: d103 bne.n 80104e8 <_dtoa_r+0x598>
- 80104e0: ee15 3a10 vmov r3, s10
- 80104e4: 07db lsls r3, r3, #31
- 80104e6: d40f bmi.n 8010508 <_dtoa_r+0x5b8>
- 80104e8: 9901 ldr r1, [sp, #4]
- 80104ea: 4620 mov r0, r4
- 80104ec: f000 fd6b bl 8010fc6 <_Bfree>
- 80104f0: 2300 movs r3, #0
- 80104f2: 9a11 ldr r2, [sp, #68] ; 0x44
- 80104f4: 7033 strb r3, [r6, #0]
- 80104f6: f10b 0301 add.w r3, fp, #1
- 80104fa: 6013 str r3, [r2, #0]
- 80104fc: 9b1f ldr r3, [sp, #124] ; 0x7c
- 80104fe: 2b00 cmp r3, #0
- 8010500: f43f ad5f beq.w 800ffc2 <_dtoa_r+0x72>
- 8010504: 601e str r6, [r3, #0]
- 8010506: e55c b.n 800ffc2 <_dtoa_r+0x72>
- 8010508: 465b mov r3, fp
- 801050a: f816 1c01 ldrb.w r1, [r6, #-1]
- 801050e: 2939 cmp r1, #57 ; 0x39
- 8010510: f106 32ff add.w r2, r6, #4294967295 ; 0xffffffff
- 8010514: d106 bne.n 8010524 <_dtoa_r+0x5d4>
- 8010516: 9902 ldr r1, [sp, #8]
- 8010518: 4291 cmp r1, r2
- 801051a: d107 bne.n 801052c <_dtoa_r+0x5dc>
- 801051c: 2230 movs r2, #48 ; 0x30
- 801051e: 700a strb r2, [r1, #0]
- 8010520: 3301 adds r3, #1
- 8010522: 460a mov r2, r1
- 8010524: 7811 ldrb r1, [r2, #0]
- 8010526: 3101 adds r1, #1
- 8010528: 7011 strb r1, [r2, #0]
- 801052a: e7b0 b.n 801048e <_dtoa_r+0x53e>
- 801052c: 4616 mov r6, r2
- 801052e: e7ec b.n 801050a <_dtoa_r+0x5ba>
- 8010530: ee27 7b04 vmul.f64 d7, d7, d4
- 8010534: eeb5 7b40 vcmp.f64 d7, #0.0
- 8010538: eef1 fa10 vmrs APSR_nzcv, fpscr
- 801053c: d1b3 bne.n 80104a6 <_dtoa_r+0x556>
- 801053e: e7d3 b.n 80104e8 <_dtoa_r+0x598>
- 8010540: 9a09 ldr r2, [sp, #36] ; 0x24
- 8010542: 2a00 cmp r2, #0
- 8010544: f000 808d beq.w 8010662 <_dtoa_r+0x712>
- 8010548: 9a08 ldr r2, [sp, #32]
- 801054a: 2a01 cmp r2, #1
- 801054c: dc72 bgt.n 8010634 <_dtoa_r+0x6e4>
- 801054e: 2f00 cmp r7, #0
- 8010550: d06c beq.n 801062c <_dtoa_r+0x6dc>
- 8010552: f203 4333 addw r3, r3, #1075 ; 0x433
- 8010556: 4645 mov r5, r8
- 8010558: 4656 mov r6, sl
- 801055a: 9a07 ldr r2, [sp, #28]
- 801055c: 2101 movs r1, #1
- 801055e: 441a add r2, r3
- 8010560: 4620 mov r0, r4
- 8010562: 449a add sl, r3
- 8010564: 9207 str r2, [sp, #28]
- 8010566: f000 fdc0 bl 80110ea <__i2b>
- 801056a: 4607 mov r7, r0
- 801056c: 2e00 cmp r6, #0
- 801056e: dd0b ble.n 8010588 <_dtoa_r+0x638>
- 8010570: 9b07 ldr r3, [sp, #28]
- 8010572: 2b00 cmp r3, #0
- 8010574: dd08 ble.n 8010588 <_dtoa_r+0x638>
- 8010576: 42b3 cmp r3, r6
- 8010578: 9a07 ldr r2, [sp, #28]
- 801057a: bfa8 it ge
- 801057c: 4633 movge r3, r6
- 801057e: ebaa 0a03 sub.w sl, sl, r3
- 8010582: 1af6 subs r6, r6, r3
- 8010584: 1ad3 subs r3, r2, r3
- 8010586: 9307 str r3, [sp, #28]
- 8010588: f1b8 0f00 cmp.w r8, #0
- 801058c: d01d beq.n 80105ca <_dtoa_r+0x67a>
- 801058e: 9b09 ldr r3, [sp, #36] ; 0x24
- 8010590: 2b00 cmp r3, #0
- 8010592: d06a beq.n 801066a <_dtoa_r+0x71a>
- 8010594: b18d cbz r5, 80105ba <_dtoa_r+0x66a>
- 8010596: 4639 mov r1, r7
- 8010598: 462a mov r2, r5
- 801059a: 4620 mov r0, r4
- 801059c: f000 fe44 bl 8011228 <__pow5mult>
- 80105a0: 9a01 ldr r2, [sp, #4]
- 80105a2: 4601 mov r1, r0
- 80105a4: 4607 mov r7, r0
- 80105a6: 4620 mov r0, r4
- 80105a8: f000 fda8 bl 80110fc <__multiply>
- 80105ac: 9901 ldr r1, [sp, #4]
- 80105ae: 900c str r0, [sp, #48] ; 0x30
- 80105b0: 4620 mov r0, r4
- 80105b2: f000 fd08 bl 8010fc6 <_Bfree>
- 80105b6: 9b0c ldr r3, [sp, #48] ; 0x30
- 80105b8: 9301 str r3, [sp, #4]
- 80105ba: ebb8 0205 subs.w r2, r8, r5
- 80105be: d004 beq.n 80105ca <_dtoa_r+0x67a>
- 80105c0: 9901 ldr r1, [sp, #4]
- 80105c2: 4620 mov r0, r4
- 80105c4: f000 fe30 bl 8011228 <__pow5mult>
- 80105c8: 9001 str r0, [sp, #4]
- 80105ca: 2101 movs r1, #1
- 80105cc: 4620 mov r0, r4
- 80105ce: f000 fd8c bl 80110ea <__i2b>
- 80105d2: 9b0b ldr r3, [sp, #44] ; 0x2c
- 80105d4: 4605 mov r5, r0
- 80105d6: 2b00 cmp r3, #0
- 80105d8: f000 81ca beq.w 8010970 <_dtoa_r+0xa20>
- 80105dc: 461a mov r2, r3
- 80105de: 4601 mov r1, r0
- 80105e0: 4620 mov r0, r4
- 80105e2: f000 fe21 bl 8011228 <__pow5mult>
- 80105e6: 9b08 ldr r3, [sp, #32]
- 80105e8: 2b01 cmp r3, #1
- 80105ea: 4605 mov r5, r0
- 80105ec: dc44 bgt.n 8010678 <_dtoa_r+0x728>
- 80105ee: 9b04 ldr r3, [sp, #16]
- 80105f0: 2b00 cmp r3, #0
- 80105f2: d13c bne.n 801066e <_dtoa_r+0x71e>
- 80105f4: 9b05 ldr r3, [sp, #20]
- 80105f6: f3c3 0313 ubfx r3, r3, #0, #20
- 80105fa: 2b00 cmp r3, #0
- 80105fc: d137 bne.n 801066e <_dtoa_r+0x71e>
- 80105fe: 9b05 ldr r3, [sp, #20]
- 8010600: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000
- 8010604: 0d1b lsrs r3, r3, #20
- 8010606: 051b lsls r3, r3, #20
- 8010608: 2b00 cmp r3, #0
- 801060a: d033 beq.n 8010674 <_dtoa_r+0x724>
- 801060c: 9b07 ldr r3, [sp, #28]
- 801060e: 3301 adds r3, #1
- 8010610: f10a 0a01 add.w sl, sl, #1
- 8010614: 9307 str r3, [sp, #28]
- 8010616: f04f 0801 mov.w r8, #1
- 801061a: 9b0b ldr r3, [sp, #44] ; 0x2c
- 801061c: bb73 cbnz r3, 801067c <_dtoa_r+0x72c>
- 801061e: 2001 movs r0, #1
- 8010620: e034 b.n 801068c <_dtoa_r+0x73c>
- 8010622: bf00 nop
- 8010624: 08012ec0 .word 0x08012ec0
- 8010628: 08012e98 .word 0x08012e98
- 801062c: 9b12 ldr r3, [sp, #72] ; 0x48
- 801062e: f1c3 0336 rsb r3, r3, #54 ; 0x36
- 8010632: e790 b.n 8010556 <_dtoa_r+0x606>
- 8010634: f109 35ff add.w r5, r9, #4294967295 ; 0xffffffff
- 8010638: 45a8 cmp r8, r5
- 801063a: bfbf itttt lt
- 801063c: 9b0b ldrlt r3, [sp, #44] ; 0x2c
- 801063e: eba5 0808 sublt.w r8, r5, r8
- 8010642: 4443 addlt r3, r8
- 8010644: 930b strlt r3, [sp, #44] ; 0x2c
- 8010646: bfb6 itet lt
- 8010648: 46a8 movlt r8, r5
- 801064a: eba8 0505 subge.w r5, r8, r5
- 801064e: 2500 movlt r5, #0
- 8010650: f1b9 0f00 cmp.w r9, #0
- 8010654: bfb9 ittee lt
- 8010656: ebaa 0609 sublt.w r6, sl, r9
- 801065a: 2300 movlt r3, #0
- 801065c: 4656 movge r6, sl
- 801065e: 464b movge r3, r9
- 8010660: e77b b.n 801055a <_dtoa_r+0x60a>
- 8010662: 4645 mov r5, r8
- 8010664: 4656 mov r6, sl
- 8010666: 9f09 ldr r7, [sp, #36] ; 0x24
- 8010668: e780 b.n 801056c <_dtoa_r+0x61c>
- 801066a: 4642 mov r2, r8
- 801066c: e7a8 b.n 80105c0 <_dtoa_r+0x670>
- 801066e: f04f 0800 mov.w r8, #0
- 8010672: e7d2 b.n 801061a <_dtoa_r+0x6ca>
- 8010674: 4698 mov r8, r3
- 8010676: e7d0 b.n 801061a <_dtoa_r+0x6ca>
- 8010678: f04f 0800 mov.w r8, #0
- 801067c: 692b ldr r3, [r5, #16]
- 801067e: eb05 0383 add.w r3, r5, r3, lsl #2
- 8010682: 6918 ldr r0, [r3, #16]
- 8010684: f000 fce3 bl 801104e <__hi0bits>
- 8010688: f1c0 0020 rsb r0, r0, #32
- 801068c: 9b07 ldr r3, [sp, #28]
- 801068e: 4418 add r0, r3
- 8010690: f010 001f ands.w r0, r0, #31
- 8010694: d047 beq.n 8010726 <_dtoa_r+0x7d6>
- 8010696: f1c0 0320 rsb r3, r0, #32
- 801069a: 2b04 cmp r3, #4
- 801069c: dd3b ble.n 8010716 <_dtoa_r+0x7c6>
- 801069e: 9b07 ldr r3, [sp, #28]
- 80106a0: f1c0 001c rsb r0, r0, #28
- 80106a4: 4482 add sl, r0
- 80106a6: 4406 add r6, r0
- 80106a8: 4403 add r3, r0
- 80106aa: 9307 str r3, [sp, #28]
- 80106ac: f1ba 0f00 cmp.w sl, #0
- 80106b0: dd05 ble.n 80106be <_dtoa_r+0x76e>
- 80106b2: 4652 mov r2, sl
- 80106b4: 9901 ldr r1, [sp, #4]
- 80106b6: 4620 mov r0, r4
- 80106b8: f000 fdf6 bl 80112a8 <__lshift>
- 80106bc: 9001 str r0, [sp, #4]
- 80106be: 9b07 ldr r3, [sp, #28]
- 80106c0: 2b00 cmp r3, #0
- 80106c2: dd05 ble.n 80106d0 <_dtoa_r+0x780>
- 80106c4: 4629 mov r1, r5
- 80106c6: 461a mov r2, r3
- 80106c8: 4620 mov r0, r4
- 80106ca: f000 fded bl 80112a8 <__lshift>
- 80106ce: 4605 mov r5, r0
- 80106d0: 9b10 ldr r3, [sp, #64] ; 0x40
- 80106d2: b353 cbz r3, 801072a <_dtoa_r+0x7da>
- 80106d4: 4629 mov r1, r5
- 80106d6: 9801 ldr r0, [sp, #4]
- 80106d8: f000 fe3a bl 8011350 <__mcmp>
- 80106dc: 2800 cmp r0, #0
- 80106de: da24 bge.n 801072a <_dtoa_r+0x7da>
- 80106e0: 2300 movs r3, #0
- 80106e2: 220a movs r2, #10
- 80106e4: 9901 ldr r1, [sp, #4]
- 80106e6: 4620 mov r0, r4
- 80106e8: f000 fc76 bl 8010fd8 <__multadd>
- 80106ec: 9b09 ldr r3, [sp, #36] ; 0x24
- 80106ee: 9001 str r0, [sp, #4]
- 80106f0: f10b 3bff add.w fp, fp, #4294967295 ; 0xffffffff
- 80106f4: 2b00 cmp r3, #0
- 80106f6: f000 8142 beq.w 801097e <_dtoa_r+0xa2e>
- 80106fa: 2300 movs r3, #0
- 80106fc: 4639 mov r1, r7
- 80106fe: 220a movs r2, #10
- 8010700: 4620 mov r0, r4
- 8010702: f000 fc69 bl 8010fd8 <__multadd>
- 8010706: 9b06 ldr r3, [sp, #24]
- 8010708: 2b00 cmp r3, #0
- 801070a: 4607 mov r7, r0
- 801070c: dc4b bgt.n 80107a6 <_dtoa_r+0x856>
- 801070e: 9b08 ldr r3, [sp, #32]
- 8010710: 2b02 cmp r3, #2
- 8010712: dd48 ble.n 80107a6 <_dtoa_r+0x856>
- 8010714: e011 b.n 801073a <_dtoa_r+0x7ea>
- 8010716: d0c9 beq.n 80106ac <_dtoa_r+0x75c>
- 8010718: 9a07 ldr r2, [sp, #28]
- 801071a: 331c adds r3, #28
- 801071c: 441a add r2, r3
- 801071e: 449a add sl, r3
- 8010720: 441e add r6, r3
- 8010722: 4613 mov r3, r2
- 8010724: e7c1 b.n 80106aa <_dtoa_r+0x75a>
- 8010726: 4603 mov r3, r0
- 8010728: e7f6 b.n 8010718 <_dtoa_r+0x7c8>
- 801072a: f1b9 0f00 cmp.w r9, #0
- 801072e: dc34 bgt.n 801079a <_dtoa_r+0x84a>
- 8010730: 9b08 ldr r3, [sp, #32]
- 8010732: 2b02 cmp r3, #2
- 8010734: dd31 ble.n 801079a <_dtoa_r+0x84a>
- 8010736: f8cd 9018 str.w r9, [sp, #24]
- 801073a: 9b06 ldr r3, [sp, #24]
- 801073c: b963 cbnz r3, 8010758 <_dtoa_r+0x808>
- 801073e: 4629 mov r1, r5
- 8010740: 2205 movs r2, #5
- 8010742: 4620 mov r0, r4
- 8010744: f000 fc48 bl 8010fd8 <__multadd>
- 8010748: 4601 mov r1, r0
- 801074a: 4605 mov r5, r0
- 801074c: 9801 ldr r0, [sp, #4]
- 801074e: f000 fdff bl 8011350 <__mcmp>
- 8010752: 2800 cmp r0, #0
- 8010754: f73f adfc bgt.w 8010350 <_dtoa_r+0x400>
- 8010758: 9b0a ldr r3, [sp, #40] ; 0x28
- 801075a: 9e02 ldr r6, [sp, #8]
- 801075c: ea6f 0b03 mvn.w fp, r3
- 8010760: f04f 0900 mov.w r9, #0
- 8010764: 4629 mov r1, r5
- 8010766: 4620 mov r0, r4
- 8010768: f000 fc2d bl 8010fc6 <_Bfree>
- 801076c: 2f00 cmp r7, #0
- 801076e: f43f aebb beq.w 80104e8 <_dtoa_r+0x598>
- 8010772: f1b9 0f00 cmp.w r9, #0
- 8010776: d005 beq.n 8010784 <_dtoa_r+0x834>
- 8010778: 45b9 cmp r9, r7
- 801077a: d003 beq.n 8010784 <_dtoa_r+0x834>
- 801077c: 4649 mov r1, r9
- 801077e: 4620 mov r0, r4
- 8010780: f000 fc21 bl 8010fc6 <_Bfree>
- 8010784: 4639 mov r1, r7
- 8010786: 4620 mov r0, r4
- 8010788: f000 fc1d bl 8010fc6 <_Bfree>
- 801078c: e6ac b.n 80104e8 <_dtoa_r+0x598>
- 801078e: 2500 movs r5, #0
- 8010790: 462f mov r7, r5
- 8010792: e7e1 b.n 8010758 <_dtoa_r+0x808>
- 8010794: 469b mov fp, r3
- 8010796: 462f mov r7, r5
- 8010798: e5da b.n 8010350 <_dtoa_r+0x400>
- 801079a: 9b09 ldr r3, [sp, #36] ; 0x24
- 801079c: f8cd 9018 str.w r9, [sp, #24]
- 80107a0: 2b00 cmp r3, #0
- 80107a2: f000 80f3 beq.w 801098c <_dtoa_r+0xa3c>
- 80107a6: 2e00 cmp r6, #0
- 80107a8: dd05 ble.n 80107b6 <_dtoa_r+0x866>
- 80107aa: 4639 mov r1, r7
- 80107ac: 4632 mov r2, r6
- 80107ae: 4620 mov r0, r4
- 80107b0: f000 fd7a bl 80112a8 <__lshift>
- 80107b4: 4607 mov r7, r0
- 80107b6: f1b8 0f00 cmp.w r8, #0
- 80107ba: d04c beq.n 8010856 <_dtoa_r+0x906>
- 80107bc: 6879 ldr r1, [r7, #4]
- 80107be: 4620 mov r0, r4
- 80107c0: f000 fbdc bl 8010f7c <_Balloc>
- 80107c4: 693a ldr r2, [r7, #16]
- 80107c6: 3202 adds r2, #2
- 80107c8: 4606 mov r6, r0
- 80107ca: 0092 lsls r2, r2, #2
- 80107cc: f107 010c add.w r1, r7, #12
- 80107d0: 300c adds r0, #12
- 80107d2: f7fd fdd0 bl 800e376 <memcpy>
- 80107d6: 2201 movs r2, #1
- 80107d8: 4631 mov r1, r6
- 80107da: 4620 mov r0, r4
- 80107dc: f000 fd64 bl 80112a8 <__lshift>
- 80107e0: 9b04 ldr r3, [sp, #16]
- 80107e2: f8dd a008 ldr.w sl, [sp, #8]
- 80107e6: f003 0301 and.w r3, r3, #1
- 80107ea: 46b9 mov r9, r7
- 80107ec: 9307 str r3, [sp, #28]
- 80107ee: 4607 mov r7, r0
- 80107f0: 4629 mov r1, r5
- 80107f2: 9801 ldr r0, [sp, #4]
- 80107f4: f7ff fb20 bl 800fe38 <quorem>
- 80107f8: 4649 mov r1, r9
- 80107fa: 4606 mov r6, r0
- 80107fc: f100 0830 add.w r8, r0, #48 ; 0x30
- 8010800: 9801 ldr r0, [sp, #4]
- 8010802: f000 fda5 bl 8011350 <__mcmp>
- 8010806: 463a mov r2, r7
- 8010808: 9004 str r0, [sp, #16]
- 801080a: 4629 mov r1, r5
- 801080c: 4620 mov r0, r4
- 801080e: f000 fdb9 bl 8011384 <__mdiff>
- 8010812: 68c3 ldr r3, [r0, #12]
- 8010814: 4602 mov r2, r0
- 8010816: bb03 cbnz r3, 801085a <_dtoa_r+0x90a>
- 8010818: 4601 mov r1, r0
- 801081a: 9009 str r0, [sp, #36] ; 0x24
- 801081c: 9801 ldr r0, [sp, #4]
- 801081e: f000 fd97 bl 8011350 <__mcmp>
- 8010822: 9a09 ldr r2, [sp, #36] ; 0x24
- 8010824: 4603 mov r3, r0
- 8010826: 4611 mov r1, r2
- 8010828: 4620 mov r0, r4
- 801082a: 9309 str r3, [sp, #36] ; 0x24
- 801082c: f000 fbcb bl 8010fc6 <_Bfree>
- 8010830: 9b09 ldr r3, [sp, #36] ; 0x24
- 8010832: b9a3 cbnz r3, 801085e <_dtoa_r+0x90e>
- 8010834: 9a08 ldr r2, [sp, #32]
- 8010836: b992 cbnz r2, 801085e <_dtoa_r+0x90e>
- 8010838: 9a07 ldr r2, [sp, #28]
- 801083a: b982 cbnz r2, 801085e <_dtoa_r+0x90e>
- 801083c: f1b8 0f39 cmp.w r8, #57 ; 0x39
- 8010840: d029 beq.n 8010896 <_dtoa_r+0x946>
- 8010842: 9b04 ldr r3, [sp, #16]
- 8010844: 2b00 cmp r3, #0
- 8010846: dd01 ble.n 801084c <_dtoa_r+0x8fc>
- 8010848: f106 0831 add.w r8, r6, #49 ; 0x31
- 801084c: f10a 0601 add.w r6, sl, #1
- 8010850: f88a 8000 strb.w r8, [sl]
- 8010854: e786 b.n 8010764 <_dtoa_r+0x814>
- 8010856: 4638 mov r0, r7
- 8010858: e7c2 b.n 80107e0 <_dtoa_r+0x890>
- 801085a: 2301 movs r3, #1
- 801085c: e7e3 b.n 8010826 <_dtoa_r+0x8d6>
- 801085e: 9a04 ldr r2, [sp, #16]
- 8010860: 2a00 cmp r2, #0
- 8010862: db04 blt.n 801086e <_dtoa_r+0x91e>
- 8010864: d124 bne.n 80108b0 <_dtoa_r+0x960>
- 8010866: 9a08 ldr r2, [sp, #32]
- 8010868: bb12 cbnz r2, 80108b0 <_dtoa_r+0x960>
- 801086a: 9a07 ldr r2, [sp, #28]
- 801086c: bb02 cbnz r2, 80108b0 <_dtoa_r+0x960>
- 801086e: 2b00 cmp r3, #0
- 8010870: ddec ble.n 801084c <_dtoa_r+0x8fc>
- 8010872: 2201 movs r2, #1
- 8010874: 9901 ldr r1, [sp, #4]
- 8010876: 4620 mov r0, r4
- 8010878: f000 fd16 bl 80112a8 <__lshift>
- 801087c: 4629 mov r1, r5
- 801087e: 9001 str r0, [sp, #4]
- 8010880: f000 fd66 bl 8011350 <__mcmp>
- 8010884: 2800 cmp r0, #0
- 8010886: dc03 bgt.n 8010890 <_dtoa_r+0x940>
- 8010888: d1e0 bne.n 801084c <_dtoa_r+0x8fc>
- 801088a: f018 0f01 tst.w r8, #1
- 801088e: d0dd beq.n 801084c <_dtoa_r+0x8fc>
- 8010890: f1b8 0f39 cmp.w r8, #57 ; 0x39
- 8010894: d1d8 bne.n 8010848 <_dtoa_r+0x8f8>
- 8010896: 2339 movs r3, #57 ; 0x39
- 8010898: f10a 0601 add.w r6, sl, #1
- 801089c: f88a 3000 strb.w r3, [sl]
- 80108a0: f816 3c01 ldrb.w r3, [r6, #-1]
- 80108a4: 2b39 cmp r3, #57 ; 0x39
- 80108a6: f106 32ff add.w r2, r6, #4294967295 ; 0xffffffff
- 80108aa: d04c beq.n 8010946 <_dtoa_r+0x9f6>
- 80108ac: 3301 adds r3, #1
- 80108ae: e051 b.n 8010954 <_dtoa_r+0xa04>
- 80108b0: 2b00 cmp r3, #0
- 80108b2: f10a 0601 add.w r6, sl, #1
- 80108b6: dd05 ble.n 80108c4 <_dtoa_r+0x974>
- 80108b8: f1b8 0f39 cmp.w r8, #57 ; 0x39
- 80108bc: d0eb beq.n 8010896 <_dtoa_r+0x946>
- 80108be: f108 0801 add.w r8, r8, #1
- 80108c2: e7c5 b.n 8010850 <_dtoa_r+0x900>
- 80108c4: 9b02 ldr r3, [sp, #8]
- 80108c6: 9a06 ldr r2, [sp, #24]
- 80108c8: f806 8c01 strb.w r8, [r6, #-1]
- 80108cc: 1af3 subs r3, r6, r3
- 80108ce: 4293 cmp r3, r2
- 80108d0: d021 beq.n 8010916 <_dtoa_r+0x9c6>
- 80108d2: 2300 movs r3, #0
- 80108d4: 220a movs r2, #10
- 80108d6: 9901 ldr r1, [sp, #4]
- 80108d8: 4620 mov r0, r4
- 80108da: f000 fb7d bl 8010fd8 <__multadd>
- 80108de: 45b9 cmp r9, r7
- 80108e0: 9001 str r0, [sp, #4]
- 80108e2: f04f 0300 mov.w r3, #0
- 80108e6: f04f 020a mov.w r2, #10
- 80108ea: 4649 mov r1, r9
- 80108ec: 4620 mov r0, r4
- 80108ee: d105 bne.n 80108fc <_dtoa_r+0x9ac>
- 80108f0: f000 fb72 bl 8010fd8 <__multadd>
- 80108f4: 4681 mov r9, r0
- 80108f6: 4607 mov r7, r0
- 80108f8: 46b2 mov sl, r6
- 80108fa: e779 b.n 80107f0 <_dtoa_r+0x8a0>
- 80108fc: f000 fb6c bl 8010fd8 <__multadd>
- 8010900: 4639 mov r1, r7
- 8010902: 4681 mov r9, r0
- 8010904: 2300 movs r3, #0
- 8010906: 220a movs r2, #10
- 8010908: 4620 mov r0, r4
- 801090a: f000 fb65 bl 8010fd8 <__multadd>
- 801090e: 4607 mov r7, r0
- 8010910: e7f2 b.n 80108f8 <_dtoa_r+0x9a8>
- 8010912: f04f 0900 mov.w r9, #0
- 8010916: 2201 movs r2, #1
- 8010918: 9901 ldr r1, [sp, #4]
- 801091a: 4620 mov r0, r4
- 801091c: f000 fcc4 bl 80112a8 <__lshift>
- 8010920: 4629 mov r1, r5
- 8010922: 9001 str r0, [sp, #4]
- 8010924: f000 fd14 bl 8011350 <__mcmp>
- 8010928: 2800 cmp r0, #0
- 801092a: dcb9 bgt.n 80108a0 <_dtoa_r+0x950>
- 801092c: d102 bne.n 8010934 <_dtoa_r+0x9e4>
- 801092e: f018 0f01 tst.w r8, #1
- 8010932: d1b5 bne.n 80108a0 <_dtoa_r+0x950>
- 8010934: f816 3c01 ldrb.w r3, [r6, #-1]
- 8010938: 2b30 cmp r3, #48 ; 0x30
- 801093a: f106 32ff add.w r2, r6, #4294967295 ; 0xffffffff
- 801093e: f47f af11 bne.w 8010764 <_dtoa_r+0x814>
- 8010942: 4616 mov r6, r2
- 8010944: e7f6 b.n 8010934 <_dtoa_r+0x9e4>
- 8010946: 9b02 ldr r3, [sp, #8]
- 8010948: 4293 cmp r3, r2
- 801094a: d105 bne.n 8010958 <_dtoa_r+0xa08>
- 801094c: 9a02 ldr r2, [sp, #8]
- 801094e: f10b 0b01 add.w fp, fp, #1
- 8010952: 2331 movs r3, #49 ; 0x31
- 8010954: 7013 strb r3, [r2, #0]
- 8010956: e705 b.n 8010764 <_dtoa_r+0x814>
- 8010958: 4616 mov r6, r2
- 801095a: e7a1 b.n 80108a0 <_dtoa_r+0x950>
- 801095c: 4b16 ldr r3, [pc, #88] ; (80109b8 <_dtoa_r+0xa68>)
- 801095e: f7ff bb4c b.w 800fffa <_dtoa_r+0xaa>
- 8010962: 9b1f ldr r3, [sp, #124] ; 0x7c
- 8010964: 2b00 cmp r3, #0
- 8010966: f47f ab30 bne.w 800ffca <_dtoa_r+0x7a>
- 801096a: 4b14 ldr r3, [pc, #80] ; (80109bc <_dtoa_r+0xa6c>)
- 801096c: f7ff bb45 b.w 800fffa <_dtoa_r+0xaa>
- 8010970: 9b08 ldr r3, [sp, #32]
- 8010972: 2b01 cmp r3, #1
- 8010974: f77f ae3b ble.w 80105ee <_dtoa_r+0x69e>
- 8010978: f8dd 802c ldr.w r8, [sp, #44] ; 0x2c
- 801097c: e64f b.n 801061e <_dtoa_r+0x6ce>
- 801097e: 9b06 ldr r3, [sp, #24]
- 8010980: 2b00 cmp r3, #0
- 8010982: dc03 bgt.n 801098c <_dtoa_r+0xa3c>
- 8010984: 9b08 ldr r3, [sp, #32]
- 8010986: 2b02 cmp r3, #2
- 8010988: f73f aed7 bgt.w 801073a <_dtoa_r+0x7ea>
- 801098c: 9e02 ldr r6, [sp, #8]
- 801098e: 9801 ldr r0, [sp, #4]
- 8010990: 4629 mov r1, r5
- 8010992: f7ff fa51 bl 800fe38 <quorem>
- 8010996: f100 0830 add.w r8, r0, #48 ; 0x30
- 801099a: f806 8b01 strb.w r8, [r6], #1
- 801099e: 9b02 ldr r3, [sp, #8]
- 80109a0: 9a06 ldr r2, [sp, #24]
- 80109a2: 1af3 subs r3, r6, r3
- 80109a4: 429a cmp r2, r3
- 80109a6: ddb4 ble.n 8010912 <_dtoa_r+0x9c2>
- 80109a8: 2300 movs r3, #0
- 80109aa: 220a movs r2, #10
- 80109ac: 9901 ldr r1, [sp, #4]
- 80109ae: 4620 mov r0, r4
- 80109b0: f000 fb12 bl 8010fd8 <__multadd>
- 80109b4: 9001 str r0, [sp, #4]
- 80109b6: e7ea b.n 801098e <_dtoa_r+0xa3e>
- 80109b8: 08012e62 .word 0x08012e62
- 80109bc: 08012e84 .word 0x08012e84
-
-080109c0 <__sflush_r>:
- 80109c0: f9b1 200c ldrsh.w r2, [r1, #12]
- 80109c4: b293 uxth r3, r2
- 80109c6: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
- 80109ca: 4605 mov r5, r0
- 80109cc: 0718 lsls r0, r3, #28
- 80109ce: 460c mov r4, r1
- 80109d0: d45f bmi.n 8010a92 <__sflush_r+0xd2>
- 80109d2: 684b ldr r3, [r1, #4]
- 80109d4: f442 6200 orr.w r2, r2, #2048 ; 0x800
- 80109d8: 2b00 cmp r3, #0
- 80109da: 818a strh r2, [r1, #12]
- 80109dc: dc05 bgt.n 80109ea <__sflush_r+0x2a>
- 80109de: 6bcb ldr r3, [r1, #60] ; 0x3c
- 80109e0: 2b00 cmp r3, #0
- 80109e2: dc02 bgt.n 80109ea <__sflush_r+0x2a>
- 80109e4: 2000 movs r0, #0
- 80109e6: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
- 80109ea: 6aa6 ldr r6, [r4, #40] ; 0x28
- 80109ec: 2e00 cmp r6, #0
- 80109ee: d0f9 beq.n 80109e4 <__sflush_r+0x24>
- 80109f0: 2300 movs r3, #0
- 80109f2: f412 5280 ands.w r2, r2, #4096 ; 0x1000
- 80109f6: 682f ldr r7, [r5, #0]
- 80109f8: 69e1 ldr r1, [r4, #28]
- 80109fa: 602b str r3, [r5, #0]
- 80109fc: d036 beq.n 8010a6c <__sflush_r+0xac>
- 80109fe: 6d20 ldr r0, [r4, #80] ; 0x50
- 8010a00: 89a3 ldrh r3, [r4, #12]
- 8010a02: 075a lsls r2, r3, #29
- 8010a04: d505 bpl.n 8010a12 <__sflush_r+0x52>
- 8010a06: 6863 ldr r3, [r4, #4]
- 8010a08: 1ac0 subs r0, r0, r3
- 8010a0a: 6b23 ldr r3, [r4, #48] ; 0x30
- 8010a0c: b10b cbz r3, 8010a12 <__sflush_r+0x52>
- 8010a0e: 6be3 ldr r3, [r4, #60] ; 0x3c
- 8010a10: 1ac0 subs r0, r0, r3
- 8010a12: 2300 movs r3, #0
- 8010a14: 4602 mov r2, r0
- 8010a16: 6aa6 ldr r6, [r4, #40] ; 0x28
- 8010a18: 69e1 ldr r1, [r4, #28]
- 8010a1a: 4628 mov r0, r5
- 8010a1c: 47b0 blx r6
- 8010a1e: 1c43 adds r3, r0, #1
- 8010a20: 89a3 ldrh r3, [r4, #12]
- 8010a22: d106 bne.n 8010a32 <__sflush_r+0x72>
- 8010a24: 6829 ldr r1, [r5, #0]
- 8010a26: 291d cmp r1, #29
- 8010a28: d84c bhi.n 8010ac4 <__sflush_r+0x104>
- 8010a2a: 4a2b ldr r2, [pc, #172] ; (8010ad8 <__sflush_r+0x118>)
- 8010a2c: 40ca lsrs r2, r1
- 8010a2e: 07d6 lsls r6, r2, #31
- 8010a30: d548 bpl.n 8010ac4 <__sflush_r+0x104>
- 8010a32: f423 6300 bic.w r3, r3, #2048 ; 0x800
- 8010a36: b21b sxth r3, r3
- 8010a38: 2200 movs r2, #0
- 8010a3a: 6062 str r2, [r4, #4]
- 8010a3c: 04d9 lsls r1, r3, #19
- 8010a3e: 6922 ldr r2, [r4, #16]
- 8010a40: 81a3 strh r3, [r4, #12]
- 8010a42: 6022 str r2, [r4, #0]
- 8010a44: d504 bpl.n 8010a50 <__sflush_r+0x90>
- 8010a46: 1c42 adds r2, r0, #1
- 8010a48: d101 bne.n 8010a4e <__sflush_r+0x8e>
- 8010a4a: 682b ldr r3, [r5, #0]
- 8010a4c: b903 cbnz r3, 8010a50 <__sflush_r+0x90>
- 8010a4e: 6520 str r0, [r4, #80] ; 0x50
- 8010a50: 6b21 ldr r1, [r4, #48] ; 0x30
- 8010a52: 602f str r7, [r5, #0]
- 8010a54: 2900 cmp r1, #0
- 8010a56: d0c5 beq.n 80109e4 <__sflush_r+0x24>
- 8010a58: f104 0340 add.w r3, r4, #64 ; 0x40
- 8010a5c: 4299 cmp r1, r3
- 8010a5e: d002 beq.n 8010a66 <__sflush_r+0xa6>
- 8010a60: 4628 mov r0, r5
- 8010a62: f000 f937 bl 8010cd4 <_free_r>
- 8010a66: 2000 movs r0, #0
- 8010a68: 6320 str r0, [r4, #48] ; 0x30
- 8010a6a: e7bc b.n 80109e6 <__sflush_r+0x26>
- 8010a6c: 2301 movs r3, #1
- 8010a6e: 4628 mov r0, r5
- 8010a70: 47b0 blx r6
- 8010a72: 1c41 adds r1, r0, #1
- 8010a74: d1c4 bne.n 8010a00 <__sflush_r+0x40>
- 8010a76: 682b ldr r3, [r5, #0]
- 8010a78: 2b00 cmp r3, #0
- 8010a7a: d0c1 beq.n 8010a00 <__sflush_r+0x40>
- 8010a7c: 2b1d cmp r3, #29
- 8010a7e: d001 beq.n 8010a84 <__sflush_r+0xc4>
- 8010a80: 2b16 cmp r3, #22
- 8010a82: d101 bne.n 8010a88 <__sflush_r+0xc8>
- 8010a84: 602f str r7, [r5, #0]
- 8010a86: e7ad b.n 80109e4 <__sflush_r+0x24>
- 8010a88: 89a3 ldrh r3, [r4, #12]
- 8010a8a: f043 0340 orr.w r3, r3, #64 ; 0x40
- 8010a8e: 81a3 strh r3, [r4, #12]
- 8010a90: e7a9 b.n 80109e6 <__sflush_r+0x26>
- 8010a92: 690f ldr r7, [r1, #16]
- 8010a94: 2f00 cmp r7, #0
- 8010a96: d0a5 beq.n 80109e4 <__sflush_r+0x24>
- 8010a98: 079b lsls r3, r3, #30
- 8010a9a: 680e ldr r6, [r1, #0]
- 8010a9c: bf08 it eq
- 8010a9e: 694b ldreq r3, [r1, #20]
- 8010aa0: 600f str r7, [r1, #0]
- 8010aa2: bf18 it ne
- 8010aa4: 2300 movne r3, #0
- 8010aa6: eba6 0807 sub.w r8, r6, r7
- 8010aaa: 608b str r3, [r1, #8]
- 8010aac: f1b8 0f00 cmp.w r8, #0
- 8010ab0: dd98 ble.n 80109e4 <__sflush_r+0x24>
- 8010ab2: 4643 mov r3, r8
- 8010ab4: 463a mov r2, r7
- 8010ab6: 69e1 ldr r1, [r4, #28]
- 8010ab8: 6a66 ldr r6, [r4, #36] ; 0x24
- 8010aba: 4628 mov r0, r5
- 8010abc: 47b0 blx r6
- 8010abe: 2800 cmp r0, #0
- 8010ac0: dc06 bgt.n 8010ad0 <__sflush_r+0x110>
- 8010ac2: 89a3 ldrh r3, [r4, #12]
- 8010ac4: f043 0340 orr.w r3, r3, #64 ; 0x40
- 8010ac8: 81a3 strh r3, [r4, #12]
- 8010aca: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
- 8010ace: e78a b.n 80109e6 <__sflush_r+0x26>
- 8010ad0: 4407 add r7, r0
- 8010ad2: eba8 0800 sub.w r8, r8, r0
- 8010ad6: e7e9 b.n 8010aac <__sflush_r+0xec>
- 8010ad8: 20400001 .word 0x20400001
-
-08010adc <_fflush_r>:
- 8010adc: b538 push {r3, r4, r5, lr}
- 8010ade: 460c mov r4, r1
- 8010ae0: 4605 mov r5, r0
- 8010ae2: b118 cbz r0, 8010aec <_fflush_r+0x10>
- 8010ae4: 6b83 ldr r3, [r0, #56] ; 0x38
- 8010ae6: b90b cbnz r3, 8010aec <_fflush_r+0x10>
- 8010ae8: f000 f864 bl 8010bb4 <__sinit>
- 8010aec: f9b4 000c ldrsh.w r0, [r4, #12]
- 8010af0: b1b8 cbz r0, 8010b22 <_fflush_r+0x46>
- 8010af2: 6e63 ldr r3, [r4, #100] ; 0x64
- 8010af4: 07db lsls r3, r3, #31
- 8010af6: d404 bmi.n 8010b02 <_fflush_r+0x26>
- 8010af8: 0581 lsls r1, r0, #22
- 8010afa: d402 bmi.n 8010b02 <_fflush_r+0x26>
- 8010afc: 6da0 ldr r0, [r4, #88] ; 0x58
- 8010afe: f7fd f9e3 bl 800dec8 <__retarget_lock_acquire_recursive>
- 8010b02: 4628 mov r0, r5
- 8010b04: 4621 mov r1, r4
- 8010b06: f7ff ff5b bl 80109c0 <__sflush_r>
- 8010b0a: 6e63 ldr r3, [r4, #100] ; 0x64
- 8010b0c: 07da lsls r2, r3, #31
- 8010b0e: 4605 mov r5, r0
- 8010b10: d405 bmi.n 8010b1e <_fflush_r+0x42>
- 8010b12: 89a3 ldrh r3, [r4, #12]
- 8010b14: 059b lsls r3, r3, #22
- 8010b16: d402 bmi.n 8010b1e <_fflush_r+0x42>
- 8010b18: 6da0 ldr r0, [r4, #88] ; 0x58
- 8010b1a: f7fd f9d6 bl 800deca <__retarget_lock_release_recursive>
- 8010b1e: 4628 mov r0, r5
- 8010b20: bd38 pop {r3, r4, r5, pc}
- 8010b22: 4605 mov r5, r0
- 8010b24: e7fb b.n 8010b1e <_fflush_r+0x42>
- ...
-
-08010b28 <std>:
- 8010b28: 2300 movs r3, #0
- 8010b2a: b510 push {r4, lr}
- 8010b2c: 4604 mov r4, r0
- 8010b2e: e9c0 3300 strd r3, r3, [r0]
- 8010b32: 6083 str r3, [r0, #8]
- 8010b34: 8181 strh r1, [r0, #12]
- 8010b36: 6643 str r3, [r0, #100] ; 0x64
- 8010b38: 81c2 strh r2, [r0, #14]
- 8010b3a: e9c0 3304 strd r3, r3, [r0, #16]
- 8010b3e: 6183 str r3, [r0, #24]
- 8010b40: 4619 mov r1, r3
- 8010b42: 2208 movs r2, #8
- 8010b44: 305c adds r0, #92 ; 0x5c
- 8010b46: f7fd fc3a bl 800e3be <memset>
- 8010b4a: 4b07 ldr r3, [pc, #28] ; (8010b68 <std+0x40>)
- 8010b4c: 6223 str r3, [r4, #32]
- 8010b4e: 4b07 ldr r3, [pc, #28] ; (8010b6c <std+0x44>)
- 8010b50: 6263 str r3, [r4, #36] ; 0x24
- 8010b52: 4b07 ldr r3, [pc, #28] ; (8010b70 <std+0x48>)
- 8010b54: 62a3 str r3, [r4, #40] ; 0x28
- 8010b56: 4b07 ldr r3, [pc, #28] ; (8010b74 <std+0x4c>)
- 8010b58: 61e4 str r4, [r4, #28]
- 8010b5a: 62e3 str r3, [r4, #44] ; 0x2c
- 8010b5c: f104 0058 add.w r0, r4, #88 ; 0x58
- 8010b60: e8bd 4010 ldmia.w sp!, {r4, lr}
- 8010b64: f7fd b9ae b.w 800dec4 <__retarget_lock_init_recursive>
- 8010b68: 08011555 .word 0x08011555
- 8010b6c: 08011577 .word 0x08011577
- 8010b70: 080115af .word 0x080115af
- 8010b74: 080115d3 .word 0x080115d3
-
-08010b78 <_cleanup_r>:
- 8010b78: 4901 ldr r1, [pc, #4] ; (8010b80 <_cleanup_r+0x8>)
- 8010b7a: f000 b967 b.w 8010e4c <_fwalk_reent>
- 8010b7e: bf00 nop
- 8010b80: 0801181d .word 0x0801181d
-
-08010b84 <__sfp_lock_acquire>:
- 8010b84: 4801 ldr r0, [pc, #4] ; (8010b8c <__sfp_lock_acquire+0x8>)
- 8010b86: f7fd b99f b.w 800dec8 <__retarget_lock_acquire_recursive>
- 8010b8a: bf00 nop
- 8010b8c: 20000b04 .word 0x20000b04
-
-08010b90 <__sfp_lock_release>:
- 8010b90: 4801 ldr r0, [pc, #4] ; (8010b98 <__sfp_lock_release+0x8>)
- 8010b92: f7fd b99a b.w 800deca <__retarget_lock_release_recursive>
- 8010b96: bf00 nop
- 8010b98: 20000b04 .word 0x20000b04
-
-08010b9c <__sinit_lock_acquire>:
- 8010b9c: 4801 ldr r0, [pc, #4] ; (8010ba4 <__sinit_lock_acquire+0x8>)
- 8010b9e: f7fd b993 b.w 800dec8 <__retarget_lock_acquire_recursive>
- 8010ba2: bf00 nop
- 8010ba4: 20000aff .word 0x20000aff
-
-08010ba8 <__sinit_lock_release>:
- 8010ba8: 4801 ldr r0, [pc, #4] ; (8010bb0 <__sinit_lock_release+0x8>)
- 8010baa: f7fd b98e b.w 800deca <__retarget_lock_release_recursive>
- 8010bae: bf00 nop
- 8010bb0: 20000aff .word 0x20000aff
-
-08010bb4 <__sinit>:
- 8010bb4: b510 push {r4, lr}
- 8010bb6: 4604 mov r4, r0
- 8010bb8: f7ff fff0 bl 8010b9c <__sinit_lock_acquire>
- 8010bbc: 6ba2 ldr r2, [r4, #56] ; 0x38
- 8010bbe: b11a cbz r2, 8010bc8 <__sinit+0x14>
- 8010bc0: e8bd 4010 ldmia.w sp!, {r4, lr}
- 8010bc4: f7ff bff0 b.w 8010ba8 <__sinit_lock_release>
- 8010bc8: 4b0d ldr r3, [pc, #52] ; (8010c00 <__sinit+0x4c>)
- 8010bca: 63e3 str r3, [r4, #60] ; 0x3c
- 8010bcc: 2303 movs r3, #3
- 8010bce: f8c4 32e4 str.w r3, [r4, #740] ; 0x2e4
- 8010bd2: f504 733b add.w r3, r4, #748 ; 0x2ec
- 8010bd6: f8c4 32e8 str.w r3, [r4, #744] ; 0x2e8
- 8010bda: f8c4 22e0 str.w r2, [r4, #736] ; 0x2e0
- 8010bde: 2104 movs r1, #4
- 8010be0: 6860 ldr r0, [r4, #4]
- 8010be2: f7ff ffa1 bl 8010b28 <std>
- 8010be6: 2201 movs r2, #1
- 8010be8: 2109 movs r1, #9
- 8010bea: 68a0 ldr r0, [r4, #8]
- 8010bec: f7ff ff9c bl 8010b28 <std>
- 8010bf0: 2202 movs r2, #2
- 8010bf2: 2112 movs r1, #18
- 8010bf4: 68e0 ldr r0, [r4, #12]
- 8010bf6: f7ff ff97 bl 8010b28 <std>
- 8010bfa: 2301 movs r3, #1
- 8010bfc: 63a3 str r3, [r4, #56] ; 0x38
- 8010bfe: e7df b.n 8010bc0 <__sinit+0xc>
- 8010c00: 08010b79 .word 0x08010b79
-
-08010c04 <__libc_fini_array>:
- 8010c04: b538 push {r3, r4, r5, lr}
- 8010c06: 4d07 ldr r5, [pc, #28] ; (8010c24 <__libc_fini_array+0x20>)
- 8010c08: 4c07 ldr r4, [pc, #28] ; (8010c28 <__libc_fini_array+0x24>)
- 8010c0a: 1b64 subs r4, r4, r5
- 8010c0c: 10a4 asrs r4, r4, #2
- 8010c0e: b91c cbnz r4, 8010c18 <__libc_fini_array+0x14>
- 8010c10: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr}
- 8010c14: f000 bec6 b.w 80119a4 <_fini>
- 8010c18: 3c01 subs r4, #1
- 8010c1a: f855 3024 ldr.w r3, [r5, r4, lsl #2]
- 8010c1e: 4798 blx r3
- 8010c20: e7f5 b.n 8010c0e <__libc_fini_array+0xa>
- 8010c22: bf00 nop
- 8010c24: 08013334 .word 0x08013334
- 8010c28: 08013338 .word 0x08013338
-
-08010c2c <_malloc_trim_r>:
- 8010c2c: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
- 8010c30: 4605 mov r5, r0
- 8010c32: 2008 movs r0, #8
- 8010c34: 460c mov r4, r1
- 8010c36: f7ff f823 bl 800fc80 <sysconf>
- 8010c3a: 4f23 ldr r7, [pc, #140] ; (8010cc8 <_malloc_trim_r+0x9c>)
- 8010c3c: 4680 mov r8, r0
- 8010c3e: 4628 mov r0, r5
- 8010c40: f7fd fbc6 bl 800e3d0 <__malloc_lock>
- 8010c44: 68bb ldr r3, [r7, #8]
- 8010c46: 685e ldr r6, [r3, #4]
- 8010c48: f026 0603 bic.w r6, r6, #3
- 8010c4c: 1b34 subs r4, r6, r4
- 8010c4e: 3c11 subs r4, #17
- 8010c50: 4444 add r4, r8
- 8010c52: fbb4 f4f8 udiv r4, r4, r8
- 8010c56: 3c01 subs r4, #1
- 8010c58: fb08 f404 mul.w r4, r8, r4
- 8010c5c: 45a0 cmp r8, r4
- 8010c5e: dd05 ble.n 8010c6c <_malloc_trim_r+0x40>
- 8010c60: 4628 mov r0, r5
- 8010c62: f7fd fbbb bl 800e3dc <__malloc_unlock>
- 8010c66: 2000 movs r0, #0
- 8010c68: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
- 8010c6c: 2100 movs r1, #0
- 8010c6e: 4628 mov r0, r5
- 8010c70: f7fd fd9e bl 800e7b0 <_sbrk_r>
- 8010c74: 68bb ldr r3, [r7, #8]
- 8010c76: 4433 add r3, r6
- 8010c78: 4298 cmp r0, r3
- 8010c7a: d1f1 bne.n 8010c60 <_malloc_trim_r+0x34>
- 8010c7c: 4261 negs r1, r4
- 8010c7e: 4628 mov r0, r5
- 8010c80: f7fd fd96 bl 800e7b0 <_sbrk_r>
- 8010c84: 3001 adds r0, #1
- 8010c86: d110 bne.n 8010caa <_malloc_trim_r+0x7e>
- 8010c88: 2100 movs r1, #0
- 8010c8a: 4628 mov r0, r5
- 8010c8c: f7fd fd90 bl 800e7b0 <_sbrk_r>
- 8010c90: 68ba ldr r2, [r7, #8]
- 8010c92: 1a83 subs r3, r0, r2
- 8010c94: 2b0f cmp r3, #15
- 8010c96: dde3 ble.n 8010c60 <_malloc_trim_r+0x34>
- 8010c98: 490c ldr r1, [pc, #48] ; (8010ccc <_malloc_trim_r+0xa0>)
- 8010c9a: 6809 ldr r1, [r1, #0]
- 8010c9c: 1a40 subs r0, r0, r1
- 8010c9e: 490c ldr r1, [pc, #48] ; (8010cd0 <_malloc_trim_r+0xa4>)
- 8010ca0: f043 0301 orr.w r3, r3, #1
- 8010ca4: 6008 str r0, [r1, #0]
- 8010ca6: 6053 str r3, [r2, #4]
- 8010ca8: e7da b.n 8010c60 <_malloc_trim_r+0x34>
- 8010caa: 68bb ldr r3, [r7, #8]
- 8010cac: 4a08 ldr r2, [pc, #32] ; (8010cd0 <_malloc_trim_r+0xa4>)
- 8010cae: 1b36 subs r6, r6, r4
- 8010cb0: f046 0601 orr.w r6, r6, #1
- 8010cb4: 605e str r6, [r3, #4]
- 8010cb6: 6813 ldr r3, [r2, #0]
- 8010cb8: 4628 mov r0, r5
- 8010cba: 1b1c subs r4, r3, r4
- 8010cbc: 6014 str r4, [r2, #0]
- 8010cbe: f7fd fb8d bl 800e3dc <__malloc_unlock>
- 8010cc2: 2001 movs r0, #1
- 8010cc4: e7d0 b.n 8010c68 <_malloc_trim_r+0x3c>
- 8010cc6: bf00 nop
- 8010cc8: 20000440 .word 0x20000440
- 8010ccc: 20000848 .word 0x20000848
- 8010cd0: 20000ac4 .word 0x20000ac4
-
-08010cd4 <_free_r>:
- 8010cd4: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
- 8010cd8: 4604 mov r4, r0
- 8010cda: 4688 mov r8, r1
- 8010cdc: 2900 cmp r1, #0
- 8010cde: f000 80ab beq.w 8010e38 <_free_r+0x164>
- 8010ce2: f7fd fb75 bl 800e3d0 <__malloc_lock>
- 8010ce6: f858 2c04 ldr.w r2, [r8, #-4]
- 8010cea: 4d54 ldr r5, [pc, #336] ; (8010e3c <_free_r+0x168>)
- 8010cec: f022 0001 bic.w r0, r2, #1
- 8010cf0: f1a8 0308 sub.w r3, r8, #8
- 8010cf4: 181f adds r7, r3, r0
- 8010cf6: 68a9 ldr r1, [r5, #8]
- 8010cf8: 687e ldr r6, [r7, #4]
- 8010cfa: 42b9 cmp r1, r7
- 8010cfc: f026 0603 bic.w r6, r6, #3
- 8010d00: f002 0201 and.w r2, r2, #1
- 8010d04: d11b bne.n 8010d3e <_free_r+0x6a>
- 8010d06: 4430 add r0, r6
- 8010d08: b93a cbnz r2, 8010d1a <_free_r+0x46>
- 8010d0a: f858 2c08 ldr.w r2, [r8, #-8]
- 8010d0e: 1a9b subs r3, r3, r2
- 8010d10: 4410 add r0, r2
- 8010d12: e9d3 1202 ldrd r1, r2, [r3, #8]
- 8010d16: 60ca str r2, [r1, #12]
- 8010d18: 6091 str r1, [r2, #8]
- 8010d1a: f040 0201 orr.w r2, r0, #1
- 8010d1e: 605a str r2, [r3, #4]
- 8010d20: 60ab str r3, [r5, #8]
- 8010d22: 4b47 ldr r3, [pc, #284] ; (8010e40 <_free_r+0x16c>)
- 8010d24: 681b ldr r3, [r3, #0]
- 8010d26: 4283 cmp r3, r0
- 8010d28: d804 bhi.n 8010d34 <_free_r+0x60>
- 8010d2a: 4b46 ldr r3, [pc, #280] ; (8010e44 <_free_r+0x170>)
- 8010d2c: 4620 mov r0, r4
- 8010d2e: 6819 ldr r1, [r3, #0]
- 8010d30: f7ff ff7c bl 8010c2c <_malloc_trim_r>
- 8010d34: 4620 mov r0, r4
- 8010d36: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr}
- 8010d3a: f7fd bb4f b.w 800e3dc <__malloc_unlock>
- 8010d3e: 607e str r6, [r7, #4]
- 8010d40: 2a00 cmp r2, #0
- 8010d42: d139 bne.n 8010db8 <_free_r+0xe4>
- 8010d44: f858 1c08 ldr.w r1, [r8, #-8]
- 8010d48: 1a5b subs r3, r3, r1
- 8010d4a: 4408 add r0, r1
- 8010d4c: 6899 ldr r1, [r3, #8]
- 8010d4e: f105 0c08 add.w ip, r5, #8
- 8010d52: 4561 cmp r1, ip
- 8010d54: d032 beq.n 8010dbc <_free_r+0xe8>
- 8010d56: f8d3 c00c ldr.w ip, [r3, #12]
- 8010d5a: f8c1 c00c str.w ip, [r1, #12]
- 8010d5e: f8cc 1008 str.w r1, [ip, #8]
- 8010d62: 19b9 adds r1, r7, r6
- 8010d64: 6849 ldr r1, [r1, #4]
- 8010d66: 07c9 lsls r1, r1, #31
- 8010d68: d40a bmi.n 8010d80 <_free_r+0xac>
- 8010d6a: 4430 add r0, r6
- 8010d6c: 68b9 ldr r1, [r7, #8]
- 8010d6e: bb3a cbnz r2, 8010dc0 <_free_r+0xec>
- 8010d70: 4e35 ldr r6, [pc, #212] ; (8010e48 <_free_r+0x174>)
- 8010d72: 42b1 cmp r1, r6
- 8010d74: d124 bne.n 8010dc0 <_free_r+0xec>
- 8010d76: e9c5 3304 strd r3, r3, [r5, #16]
- 8010d7a: e9c3 1102 strd r1, r1, [r3, #8]
- 8010d7e: 2201 movs r2, #1
- 8010d80: f040 0101 orr.w r1, r0, #1
- 8010d84: 6059 str r1, [r3, #4]
- 8010d86: 5018 str r0, [r3, r0]
- 8010d88: 2a00 cmp r2, #0
- 8010d8a: d1d3 bne.n 8010d34 <_free_r+0x60>
- 8010d8c: f5b0 7f00 cmp.w r0, #512 ; 0x200
- 8010d90: d21a bcs.n 8010dc8 <_free_r+0xf4>
- 8010d92: 08c0 lsrs r0, r0, #3
- 8010d94: 1081 asrs r1, r0, #2
- 8010d96: 2201 movs r2, #1
- 8010d98: 408a lsls r2, r1
- 8010d9a: 6869 ldr r1, [r5, #4]
- 8010d9c: 3001 adds r0, #1
- 8010d9e: 430a orrs r2, r1
- 8010da0: 606a str r2, [r5, #4]
- 8010da2: f855 1030 ldr.w r1, [r5, r0, lsl #3]
- 8010da6: eb05 02c0 add.w r2, r5, r0, lsl #3
- 8010daa: 3a08 subs r2, #8
- 8010dac: e9c3 1202 strd r1, r2, [r3, #8]
- 8010db0: f845 3030 str.w r3, [r5, r0, lsl #3]
- 8010db4: 60cb str r3, [r1, #12]
- 8010db6: e7bd b.n 8010d34 <_free_r+0x60>
- 8010db8: 2200 movs r2, #0
- 8010dba: e7d2 b.n 8010d62 <_free_r+0x8e>
- 8010dbc: 2201 movs r2, #1
- 8010dbe: e7d0 b.n 8010d62 <_free_r+0x8e>
- 8010dc0: 68fe ldr r6, [r7, #12]
- 8010dc2: 60ce str r6, [r1, #12]
- 8010dc4: 60b1 str r1, [r6, #8]
- 8010dc6: e7db b.n 8010d80 <_free_r+0xac>
- 8010dc8: 0a42 lsrs r2, r0, #9
- 8010dca: 2a04 cmp r2, #4
- 8010dcc: d813 bhi.n 8010df6 <_free_r+0x122>
- 8010dce: 0982 lsrs r2, r0, #6
- 8010dd0: 3238 adds r2, #56 ; 0x38
- 8010dd2: 1c51 adds r1, r2, #1
- 8010dd4: eb05 06c2 add.w r6, r5, r2, lsl #3
- 8010dd8: f855 1031 ldr.w r1, [r5, r1, lsl #3]
- 8010ddc: 428e cmp r6, r1
- 8010dde: d124 bne.n 8010e2a <_free_r+0x156>
- 8010de0: 2001 movs r0, #1
- 8010de2: 1092 asrs r2, r2, #2
- 8010de4: fa00 f202 lsl.w r2, r0, r2
- 8010de8: 6868 ldr r0, [r5, #4]
- 8010dea: 4302 orrs r2, r0
- 8010dec: 606a str r2, [r5, #4]
- 8010dee: e9c3 1602 strd r1, r6, [r3, #8]
- 8010df2: 60b3 str r3, [r6, #8]
- 8010df4: e7de b.n 8010db4 <_free_r+0xe0>
- 8010df6: 2a14 cmp r2, #20
- 8010df8: d801 bhi.n 8010dfe <_free_r+0x12a>
- 8010dfa: 325b adds r2, #91 ; 0x5b
- 8010dfc: e7e9 b.n 8010dd2 <_free_r+0xfe>
- 8010dfe: 2a54 cmp r2, #84 ; 0x54
- 8010e00: d802 bhi.n 8010e08 <_free_r+0x134>
- 8010e02: 0b02 lsrs r2, r0, #12
- 8010e04: 326e adds r2, #110 ; 0x6e
- 8010e06: e7e4 b.n 8010dd2 <_free_r+0xfe>
- 8010e08: f5b2 7faa cmp.w r2, #340 ; 0x154
- 8010e0c: d802 bhi.n 8010e14 <_free_r+0x140>
- 8010e0e: 0bc2 lsrs r2, r0, #15
- 8010e10: 3277 adds r2, #119 ; 0x77
- 8010e12: e7de b.n 8010dd2 <_free_r+0xfe>
- 8010e14: f240 5154 movw r1, #1364 ; 0x554
- 8010e18: 428a cmp r2, r1
- 8010e1a: bf9a itte ls
- 8010e1c: 0c82 lsrls r2, r0, #18
- 8010e1e: 327c addls r2, #124 ; 0x7c
- 8010e20: 227e movhi r2, #126 ; 0x7e
- 8010e22: e7d6 b.n 8010dd2 <_free_r+0xfe>
- 8010e24: 6889 ldr r1, [r1, #8]
- 8010e26: 428e cmp r6, r1
- 8010e28: d004 beq.n 8010e34 <_free_r+0x160>
- 8010e2a: 684a ldr r2, [r1, #4]
- 8010e2c: f022 0203 bic.w r2, r2, #3
- 8010e30: 4282 cmp r2, r0
- 8010e32: d8f7 bhi.n 8010e24 <_free_r+0x150>
- 8010e34: 68ce ldr r6, [r1, #12]
- 8010e36: e7da b.n 8010dee <_free_r+0x11a>
- 8010e38: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
- 8010e3c: 20000440 .word 0x20000440
- 8010e40: 2000084c .word 0x2000084c
- 8010e44: 20000af4 .word 0x20000af4
- 8010e48: 20000448 .word 0x20000448
-
-08010e4c <_fwalk_reent>:
- 8010e4c: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
- 8010e50: 4680 mov r8, r0
- 8010e52: 4689 mov r9, r1
- 8010e54: f500 7438 add.w r4, r0, #736 ; 0x2e0
- 8010e58: 2600 movs r6, #0
- 8010e5a: b914 cbnz r4, 8010e62 <_fwalk_reent+0x16>
- 8010e5c: 4630 mov r0, r6
- 8010e5e: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
- 8010e62: e9d4 7501 ldrd r7, r5, [r4, #4]
- 8010e66: 3f01 subs r7, #1
- 8010e68: d501 bpl.n 8010e6e <_fwalk_reent+0x22>
- 8010e6a: 6824 ldr r4, [r4, #0]
- 8010e6c: e7f5 b.n 8010e5a <_fwalk_reent+0xe>
- 8010e6e: 89ab ldrh r3, [r5, #12]
- 8010e70: 2b01 cmp r3, #1
- 8010e72: d907 bls.n 8010e84 <_fwalk_reent+0x38>
- 8010e74: f9b5 300e ldrsh.w r3, [r5, #14]
- 8010e78: 3301 adds r3, #1
- 8010e7a: d003 beq.n 8010e84 <_fwalk_reent+0x38>
- 8010e7c: 4629 mov r1, r5
- 8010e7e: 4640 mov r0, r8
- 8010e80: 47c8 blx r9
- 8010e82: 4306 orrs r6, r0
- 8010e84: 3568 adds r5, #104 ; 0x68
- 8010e86: e7ee b.n 8010e66 <_fwalk_reent+0x1a>
-
-08010e88 <_localeconv_r>:
- 8010e88: 4b04 ldr r3, [pc, #16] ; (8010e9c <_localeconv_r+0x14>)
- 8010e8a: 681b ldr r3, [r3, #0]
- 8010e8c: 6b58 ldr r0, [r3, #52] ; 0x34
- 8010e8e: 4b04 ldr r3, [pc, #16] ; (8010ea0 <_localeconv_r+0x18>)
- 8010e90: 2800 cmp r0, #0
- 8010e92: bf08 it eq
- 8010e94: 4618 moveq r0, r3
- 8010e96: 30f0 adds r0, #240 ; 0xf0
- 8010e98: 4770 bx lr
- 8010e9a: bf00 nop
- 8010e9c: 20000014 .word 0x20000014
- 8010ea0: 20000854 .word 0x20000854
-
-08010ea4 <__swhatbuf_r>:
- 8010ea4: b570 push {r4, r5, r6, lr}
- 8010ea6: 460e mov r6, r1
- 8010ea8: f9b1 100e ldrsh.w r1, [r1, #14]
- 8010eac: 2900 cmp r1, #0
- 8010eae: b096 sub sp, #88 ; 0x58
- 8010eb0: 4614 mov r4, r2
- 8010eb2: 461d mov r5, r3
- 8010eb4: da09 bge.n 8010eca <__swhatbuf_r+0x26>
- 8010eb6: 89b3 ldrh r3, [r6, #12]
- 8010eb8: 2200 movs r2, #0
- 8010eba: f013 0080 ands.w r0, r3, #128 ; 0x80
- 8010ebe: 602a str r2, [r5, #0]
- 8010ec0: d116 bne.n 8010ef0 <__swhatbuf_r+0x4c>
- 8010ec2: f44f 6380 mov.w r3, #1024 ; 0x400
- 8010ec6: 6023 str r3, [r4, #0]
- 8010ec8: e015 b.n 8010ef6 <__swhatbuf_r+0x52>
- 8010eca: 466a mov r2, sp
- 8010ecc: f000 fcfe bl 80118cc <_fstat_r>
- 8010ed0: 2800 cmp r0, #0
- 8010ed2: dbf0 blt.n 8010eb6 <__swhatbuf_r+0x12>
- 8010ed4: 9a01 ldr r2, [sp, #4]
- 8010ed6: f402 4270 and.w r2, r2, #61440 ; 0xf000
- 8010eda: f5a2 5300 sub.w r3, r2, #8192 ; 0x2000
- 8010ede: 425a negs r2, r3
- 8010ee0: 415a adcs r2, r3
- 8010ee2: f44f 6380 mov.w r3, #1024 ; 0x400
- 8010ee6: 602a str r2, [r5, #0]
- 8010ee8: f44f 6000 mov.w r0, #2048 ; 0x800
- 8010eec: 6023 str r3, [r4, #0]
- 8010eee: e002 b.n 8010ef6 <__swhatbuf_r+0x52>
- 8010ef0: 2340 movs r3, #64 ; 0x40
- 8010ef2: 6023 str r3, [r4, #0]
- 8010ef4: 4610 mov r0, r2
- 8010ef6: b016 add sp, #88 ; 0x58
- 8010ef8: bd70 pop {r4, r5, r6, pc}
- ...
-
-08010efc <__smakebuf_r>:
- 8010efc: 898b ldrh r3, [r1, #12]
- 8010efe: b573 push {r0, r1, r4, r5, r6, lr}
- 8010f00: 079d lsls r5, r3, #30
- 8010f02: 4606 mov r6, r0
- 8010f04: 460c mov r4, r1
- 8010f06: d507 bpl.n 8010f18 <__smakebuf_r+0x1c>
- 8010f08: f104 0343 add.w r3, r4, #67 ; 0x43
- 8010f0c: 6023 str r3, [r4, #0]
- 8010f0e: 6123 str r3, [r4, #16]
- 8010f10: 2301 movs r3, #1
- 8010f12: 6163 str r3, [r4, #20]
- 8010f14: b002 add sp, #8
- 8010f16: bd70 pop {r4, r5, r6, pc}
- 8010f18: ab01 add r3, sp, #4
- 8010f1a: 466a mov r2, sp
- 8010f1c: f7ff ffc2 bl 8010ea4 <__swhatbuf_r>
- 8010f20: 9900 ldr r1, [sp, #0]
- 8010f22: 4605 mov r5, r0
- 8010f24: 4630 mov r0, r6
- 8010f26: f7fc ffe1 bl 800deec <_malloc_r>
- 8010f2a: b948 cbnz r0, 8010f40 <__smakebuf_r+0x44>
- 8010f2c: f9b4 300c ldrsh.w r3, [r4, #12]
- 8010f30: 059a lsls r2, r3, #22
- 8010f32: d4ef bmi.n 8010f14 <__smakebuf_r+0x18>
- 8010f34: f023 0303 bic.w r3, r3, #3
- 8010f38: f043 0302 orr.w r3, r3, #2
- 8010f3c: 81a3 strh r3, [r4, #12]
- 8010f3e: e7e3 b.n 8010f08 <__smakebuf_r+0xc>
- 8010f40: 4b0d ldr r3, [pc, #52] ; (8010f78 <__smakebuf_r+0x7c>)
- 8010f42: 63f3 str r3, [r6, #60] ; 0x3c
- 8010f44: 89a3 ldrh r3, [r4, #12]
- 8010f46: 6020 str r0, [r4, #0]
- 8010f48: f043 0380 orr.w r3, r3, #128 ; 0x80
- 8010f4c: 81a3 strh r3, [r4, #12]
- 8010f4e: 9b00 ldr r3, [sp, #0]
- 8010f50: 6163 str r3, [r4, #20]
- 8010f52: 9b01 ldr r3, [sp, #4]
- 8010f54: 6120 str r0, [r4, #16]
- 8010f56: b15b cbz r3, 8010f70 <__smakebuf_r+0x74>
- 8010f58: f9b4 100e ldrsh.w r1, [r4, #14]
- 8010f5c: 4630 mov r0, r6
- 8010f5e: f000 fcc7 bl 80118f0 <_isatty_r>
- 8010f62: b128 cbz r0, 8010f70 <__smakebuf_r+0x74>
- 8010f64: 89a3 ldrh r3, [r4, #12]
- 8010f66: f023 0303 bic.w r3, r3, #3
- 8010f6a: f043 0301 orr.w r3, r3, #1
- 8010f6e: 81a3 strh r3, [r4, #12]
- 8010f70: 89a3 ldrh r3, [r4, #12]
- 8010f72: 431d orrs r5, r3
- 8010f74: 81a5 strh r5, [r4, #12]
- 8010f76: e7cd b.n 8010f14 <__smakebuf_r+0x18>
- 8010f78: 08010b79 .word 0x08010b79
-
-08010f7c <_Balloc>:
- 8010f7c: 6cc3 ldr r3, [r0, #76] ; 0x4c
- 8010f7e: b570 push {r4, r5, r6, lr}
- 8010f80: 4605 mov r5, r0
- 8010f82: 460c mov r4, r1
- 8010f84: b17b cbz r3, 8010fa6 <_Balloc+0x2a>
- 8010f86: 6ceb ldr r3, [r5, #76] ; 0x4c
- 8010f88: f853 0024 ldr.w r0, [r3, r4, lsl #2]
- 8010f8c: b9a0 cbnz r0, 8010fb8 <_Balloc+0x3c>
- 8010f8e: 2101 movs r1, #1
- 8010f90: fa01 f604 lsl.w r6, r1, r4
- 8010f94: 1d72 adds r2, r6, #5
- 8010f96: 0092 lsls r2, r2, #2
- 8010f98: 4628 mov r0, r5
- 8010f9a: f000 fc01 bl 80117a0 <_calloc_r>
- 8010f9e: b148 cbz r0, 8010fb4 <_Balloc+0x38>
- 8010fa0: e9c0 4601 strd r4, r6, [r0, #4]
- 8010fa4: e00b b.n 8010fbe <_Balloc+0x42>
- 8010fa6: 2221 movs r2, #33 ; 0x21
- 8010fa8: 2104 movs r1, #4
- 8010faa: f000 fbf9 bl 80117a0 <_calloc_r>
- 8010fae: 64e8 str r0, [r5, #76] ; 0x4c
- 8010fb0: 2800 cmp r0, #0
- 8010fb2: d1e8 bne.n 8010f86 <_Balloc+0xa>
- 8010fb4: 2000 movs r0, #0
- 8010fb6: bd70 pop {r4, r5, r6, pc}
- 8010fb8: 6802 ldr r2, [r0, #0]
- 8010fba: f843 2024 str.w r2, [r3, r4, lsl #2]
- 8010fbe: 2300 movs r3, #0
- 8010fc0: e9c0 3303 strd r3, r3, [r0, #12]
- 8010fc4: e7f7 b.n 8010fb6 <_Balloc+0x3a>
-
-08010fc6 <_Bfree>:
- 8010fc6: b131 cbz r1, 8010fd6 <_Bfree+0x10>
- 8010fc8: 6cc3 ldr r3, [r0, #76] ; 0x4c
- 8010fca: 684a ldr r2, [r1, #4]
- 8010fcc: f853 0022 ldr.w r0, [r3, r2, lsl #2]
- 8010fd0: 6008 str r0, [r1, #0]
- 8010fd2: f843 1022 str.w r1, [r3, r2, lsl #2]
- 8010fd6: 4770 bx lr
-
-08010fd8 <__multadd>:
- 8010fd8: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
- 8010fdc: 690d ldr r5, [r1, #16]
- 8010fde: 461f mov r7, r3
- 8010fe0: 4606 mov r6, r0
- 8010fe2: 460c mov r4, r1
- 8010fe4: f101 0c14 add.w ip, r1, #20
- 8010fe8: 2300 movs r3, #0
- 8010fea: f8dc 0000 ldr.w r0, [ip]
- 8010fee: b281 uxth r1, r0
- 8010ff0: fb02 7101 mla r1, r2, r1, r7
- 8010ff4: 0c0f lsrs r7, r1, #16
- 8010ff6: 0c00 lsrs r0, r0, #16
- 8010ff8: fb02 7000 mla r0, r2, r0, r7
- 8010ffc: b289 uxth r1, r1
- 8010ffe: 3301 adds r3, #1
- 8011000: eb01 4100 add.w r1, r1, r0, lsl #16
- 8011004: 429d cmp r5, r3
- 8011006: ea4f 4710 mov.w r7, r0, lsr #16
- 801100a: f84c 1b04 str.w r1, [ip], #4
- 801100e: dcec bgt.n 8010fea <__multadd+0x12>
- 8011010: b1d7 cbz r7, 8011048 <__multadd+0x70>
- 8011012: 68a3 ldr r3, [r4, #8]
- 8011014: 42ab cmp r3, r5
- 8011016: dc12 bgt.n 801103e <__multadd+0x66>
- 8011018: 6861 ldr r1, [r4, #4]
- 801101a: 4630 mov r0, r6
- 801101c: 3101 adds r1, #1
- 801101e: f7ff ffad bl 8010f7c <_Balloc>
- 8011022: 6922 ldr r2, [r4, #16]
- 8011024: 3202 adds r2, #2
- 8011026: f104 010c add.w r1, r4, #12
- 801102a: 4680 mov r8, r0
- 801102c: 0092 lsls r2, r2, #2
- 801102e: 300c adds r0, #12
- 8011030: f7fd f9a1 bl 800e376 <memcpy>
- 8011034: 4621 mov r1, r4
- 8011036: 4630 mov r0, r6
- 8011038: f7ff ffc5 bl 8010fc6 <_Bfree>
- 801103c: 4644 mov r4, r8
- 801103e: eb04 0385 add.w r3, r4, r5, lsl #2
- 8011042: 3501 adds r5, #1
- 8011044: 615f str r7, [r3, #20]
- 8011046: 6125 str r5, [r4, #16]
- 8011048: 4620 mov r0, r4
- 801104a: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
-
-0801104e <__hi0bits>:
- 801104e: 0c02 lsrs r2, r0, #16
- 8011050: 0412 lsls r2, r2, #16
- 8011052: 4603 mov r3, r0
- 8011054: b9b2 cbnz r2, 8011084 <__hi0bits+0x36>
- 8011056: 0403 lsls r3, r0, #16
- 8011058: 2010 movs r0, #16
- 801105a: f013 4f7f tst.w r3, #4278190080 ; 0xff000000
- 801105e: bf04 itt eq
- 8011060: 021b lsleq r3, r3, #8
- 8011062: 3008 addeq r0, #8
- 8011064: f013 4f70 tst.w r3, #4026531840 ; 0xf0000000
- 8011068: bf04 itt eq
- 801106a: 011b lsleq r3, r3, #4
- 801106c: 3004 addeq r0, #4
- 801106e: f013 4f40 tst.w r3, #3221225472 ; 0xc0000000
- 8011072: bf04 itt eq
- 8011074: 009b lsleq r3, r3, #2
- 8011076: 3002 addeq r0, #2
- 8011078: 2b00 cmp r3, #0
- 801107a: db06 blt.n 801108a <__hi0bits+0x3c>
- 801107c: 005b lsls r3, r3, #1
- 801107e: d503 bpl.n 8011088 <__hi0bits+0x3a>
- 8011080: 3001 adds r0, #1
- 8011082: 4770 bx lr
- 8011084: 2000 movs r0, #0
- 8011086: e7e8 b.n 801105a <__hi0bits+0xc>
- 8011088: 2020 movs r0, #32
- 801108a: 4770 bx lr
-
-0801108c <__lo0bits>:
- 801108c: 6803 ldr r3, [r0, #0]
- 801108e: f013 0207 ands.w r2, r3, #7
- 8011092: 4601 mov r1, r0
- 8011094: d00b beq.n 80110ae <__lo0bits+0x22>
- 8011096: 07da lsls r2, r3, #31
- 8011098: d423 bmi.n 80110e2 <__lo0bits+0x56>
- 801109a: 0798 lsls r0, r3, #30
- 801109c: bf49 itett mi
- 801109e: 085b lsrmi r3, r3, #1
- 80110a0: 089b lsrpl r3, r3, #2
- 80110a2: 2001 movmi r0, #1
- 80110a4: 600b strmi r3, [r1, #0]
- 80110a6: bf5c itt pl
- 80110a8: 600b strpl r3, [r1, #0]
- 80110aa: 2002 movpl r0, #2
- 80110ac: 4770 bx lr
- 80110ae: b298 uxth r0, r3
- 80110b0: b9a8 cbnz r0, 80110de <__lo0bits+0x52>
- 80110b2: 0c1b lsrs r3, r3, #16
- 80110b4: 2010 movs r0, #16
- 80110b6: f013 0fff tst.w r3, #255 ; 0xff
- 80110ba: bf04 itt eq
- 80110bc: 0a1b lsreq r3, r3, #8
- 80110be: 3008 addeq r0, #8
- 80110c0: 071a lsls r2, r3, #28
- 80110c2: bf04 itt eq
- 80110c4: 091b lsreq r3, r3, #4
- 80110c6: 3004 addeq r0, #4
- 80110c8: 079a lsls r2, r3, #30
- 80110ca: bf04 itt eq
- 80110cc: 089b lsreq r3, r3, #2
- 80110ce: 3002 addeq r0, #2
- 80110d0: 07da lsls r2, r3, #31
- 80110d2: d402 bmi.n 80110da <__lo0bits+0x4e>
- 80110d4: 085b lsrs r3, r3, #1
- 80110d6: d006 beq.n 80110e6 <__lo0bits+0x5a>
- 80110d8: 3001 adds r0, #1
- 80110da: 600b str r3, [r1, #0]
- 80110dc: 4770 bx lr
- 80110de: 4610 mov r0, r2
- 80110e0: e7e9 b.n 80110b6 <__lo0bits+0x2a>
- 80110e2: 2000 movs r0, #0
- 80110e4: 4770 bx lr
- 80110e6: 2020 movs r0, #32
- 80110e8: 4770 bx lr
-
-080110ea <__i2b>:
- 80110ea: b510 push {r4, lr}
- 80110ec: 460c mov r4, r1
- 80110ee: 2101 movs r1, #1
- 80110f0: f7ff ff44 bl 8010f7c <_Balloc>
- 80110f4: 2201 movs r2, #1
- 80110f6: 6144 str r4, [r0, #20]
- 80110f8: 6102 str r2, [r0, #16]
- 80110fa: bd10 pop {r4, pc}
-
-080110fc <__multiply>:
- 80110fc: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
- 8011100: 4614 mov r4, r2
- 8011102: 690a ldr r2, [r1, #16]
- 8011104: 6923 ldr r3, [r4, #16]
- 8011106: 429a cmp r2, r3
- 8011108: bfb8 it lt
- 801110a: 460b movlt r3, r1
- 801110c: 4688 mov r8, r1
- 801110e: bfbc itt lt
- 8011110: 46a0 movlt r8, r4
- 8011112: 461c movlt r4, r3
- 8011114: f8d8 7010 ldr.w r7, [r8, #16]
- 8011118: f8d4 9010 ldr.w r9, [r4, #16]
- 801111c: f8d8 3008 ldr.w r3, [r8, #8]
- 8011120: f8d8 1004 ldr.w r1, [r8, #4]
- 8011124: eb07 0609 add.w r6, r7, r9
- 8011128: 42b3 cmp r3, r6
- 801112a: bfb8 it lt
- 801112c: 3101 addlt r1, #1
- 801112e: f7ff ff25 bl 8010f7c <_Balloc>
- 8011132: f100 0514 add.w r5, r0, #20
- 8011136: eb05 0e86 add.w lr, r5, r6, lsl #2
- 801113a: 462b mov r3, r5
- 801113c: 2200 movs r2, #0
- 801113e: 4573 cmp r3, lr
- 8011140: d316 bcc.n 8011170 <__multiply+0x74>
- 8011142: f104 0214 add.w r2, r4, #20
- 8011146: f108 0114 add.w r1, r8, #20
- 801114a: eb02 0389 add.w r3, r2, r9, lsl #2
- 801114e: eb01 0787 add.w r7, r1, r7, lsl #2
- 8011152: 9300 str r3, [sp, #0]
- 8011154: 9b00 ldr r3, [sp, #0]
- 8011156: 9201 str r2, [sp, #4]
- 8011158: 4293 cmp r3, r2
- 801115a: d80c bhi.n 8011176 <__multiply+0x7a>
- 801115c: 2e00 cmp r6, #0
- 801115e: dd03 ble.n 8011168 <__multiply+0x6c>
- 8011160: f85e 3d04 ldr.w r3, [lr, #-4]!
- 8011164: 2b00 cmp r3, #0
- 8011166: d05d beq.n 8011224 <__multiply+0x128>
- 8011168: 6106 str r6, [r0, #16]
- 801116a: b003 add sp, #12
- 801116c: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
- 8011170: f843 2b04 str.w r2, [r3], #4
- 8011174: e7e3 b.n 801113e <__multiply+0x42>
- 8011176: f8b2 b000 ldrh.w fp, [r2]
- 801117a: f1bb 0f00 cmp.w fp, #0
- 801117e: d023 beq.n 80111c8 <__multiply+0xcc>
- 8011180: 4689 mov r9, r1
- 8011182: 46ac mov ip, r5
- 8011184: f04f 0800 mov.w r8, #0
- 8011188: f859 4b04 ldr.w r4, [r9], #4
- 801118c: f8dc a000 ldr.w sl, [ip]
- 8011190: b2a3 uxth r3, r4
- 8011192: fa1f fa8a uxth.w sl, sl
- 8011196: fb0b a303 mla r3, fp, r3, sl
- 801119a: ea4f 4a14 mov.w sl, r4, lsr #16
- 801119e: f8dc 4000 ldr.w r4, [ip]
- 80111a2: 4443 add r3, r8
- 80111a4: ea4f 4814 mov.w r8, r4, lsr #16
- 80111a8: fb0b 840a mla r4, fp, sl, r8
- 80111ac: eb04 4413 add.w r4, r4, r3, lsr #16
- 80111b0: 46e2 mov sl, ip
- 80111b2: b29b uxth r3, r3
- 80111b4: ea43 4304 orr.w r3, r3, r4, lsl #16
- 80111b8: 454f cmp r7, r9
- 80111ba: ea4f 4814 mov.w r8, r4, lsr #16
- 80111be: f84a 3b04 str.w r3, [sl], #4
- 80111c2: d82b bhi.n 801121c <__multiply+0x120>
- 80111c4: f8cc 8004 str.w r8, [ip, #4]
- 80111c8: 9b01 ldr r3, [sp, #4]
- 80111ca: f8b3 a002 ldrh.w sl, [r3, #2]
- 80111ce: 3204 adds r2, #4
- 80111d0: f1ba 0f00 cmp.w sl, #0
- 80111d4: d020 beq.n 8011218 <__multiply+0x11c>
- 80111d6: 682b ldr r3, [r5, #0]
- 80111d8: 4689 mov r9, r1
- 80111da: 46a8 mov r8, r5
- 80111dc: f04f 0b00 mov.w fp, #0
- 80111e0: f8b9 c000 ldrh.w ip, [r9]
- 80111e4: f8b8 4002 ldrh.w r4, [r8, #2]
- 80111e8: fb0a 440c mla r4, sl, ip, r4
- 80111ec: 445c add r4, fp
- 80111ee: 46c4 mov ip, r8
- 80111f0: b29b uxth r3, r3
- 80111f2: ea43 4304 orr.w r3, r3, r4, lsl #16
- 80111f6: f84c 3b04 str.w r3, [ip], #4
- 80111fa: f859 3b04 ldr.w r3, [r9], #4
- 80111fe: f8b8 b004 ldrh.w fp, [r8, #4]
- 8011202: 0c1b lsrs r3, r3, #16
- 8011204: fb0a b303 mla r3, sl, r3, fp
- 8011208: eb03 4314 add.w r3, r3, r4, lsr #16
- 801120c: 454f cmp r7, r9
- 801120e: ea4f 4b13 mov.w fp, r3, lsr #16
- 8011212: d805 bhi.n 8011220 <__multiply+0x124>
- 8011214: f8c8 3004 str.w r3, [r8, #4]
- 8011218: 3504 adds r5, #4
- 801121a: e79b b.n 8011154 <__multiply+0x58>
- 801121c: 46d4 mov ip, sl
- 801121e: e7b3 b.n 8011188 <__multiply+0x8c>
- 8011220: 46e0 mov r8, ip
- 8011222: e7dd b.n 80111e0 <__multiply+0xe4>
- 8011224: 3e01 subs r6, #1
- 8011226: e799 b.n 801115c <__multiply+0x60>
-
-08011228 <__pow5mult>:
- 8011228: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
- 801122c: 4615 mov r5, r2
- 801122e: f012 0203 ands.w r2, r2, #3
- 8011232: 4606 mov r6, r0
- 8011234: 460f mov r7, r1
- 8011236: d007 beq.n 8011248 <__pow5mult+0x20>
- 8011238: 3a01 subs r2, #1
- 801123a: 4c1a ldr r4, [pc, #104] ; (80112a4 <__pow5mult+0x7c>)
- 801123c: 2300 movs r3, #0
- 801123e: f854 2022 ldr.w r2, [r4, r2, lsl #2]
- 8011242: f7ff fec9 bl 8010fd8 <__multadd>
- 8011246: 4607 mov r7, r0
- 8011248: 10ad asrs r5, r5, #2
- 801124a: d027 beq.n 801129c <__pow5mult+0x74>
- 801124c: 6cb4 ldr r4, [r6, #72] ; 0x48
- 801124e: b944 cbnz r4, 8011262 <__pow5mult+0x3a>
- 8011250: f240 2171 movw r1, #625 ; 0x271
- 8011254: 4630 mov r0, r6
- 8011256: f7ff ff48 bl 80110ea <__i2b>
- 801125a: 2300 movs r3, #0
- 801125c: 64b0 str r0, [r6, #72] ; 0x48
- 801125e: 4604 mov r4, r0
- 8011260: 6003 str r3, [r0, #0]
- 8011262: f04f 0800 mov.w r8, #0
- 8011266: 07eb lsls r3, r5, #31
- 8011268: d50a bpl.n 8011280 <__pow5mult+0x58>
- 801126a: 4639 mov r1, r7
- 801126c: 4622 mov r2, r4
- 801126e: 4630 mov r0, r6
- 8011270: f7ff ff44 bl 80110fc <__multiply>
- 8011274: 4639 mov r1, r7
- 8011276: 4681 mov r9, r0
- 8011278: 4630 mov r0, r6
- 801127a: f7ff fea4 bl 8010fc6 <_Bfree>
- 801127e: 464f mov r7, r9
- 8011280: 106d asrs r5, r5, #1
- 8011282: d00b beq.n 801129c <__pow5mult+0x74>
- 8011284: 6820 ldr r0, [r4, #0]
- 8011286: b938 cbnz r0, 8011298 <__pow5mult+0x70>
- 8011288: 4622 mov r2, r4
- 801128a: 4621 mov r1, r4
- 801128c: 4630 mov r0, r6
- 801128e: f7ff ff35 bl 80110fc <__multiply>
- 8011292: 6020 str r0, [r4, #0]
- 8011294: f8c0 8000 str.w r8, [r0]
- 8011298: 4604 mov r4, r0
- 801129a: e7e4 b.n 8011266 <__pow5mult+0x3e>
- 801129c: 4638 mov r0, r7
- 801129e: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
- 80112a2: bf00 nop
- 80112a4: 08012f88 .word 0x08012f88
-
-080112a8 <__lshift>:
- 80112a8: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
- 80112ac: 460c mov r4, r1
- 80112ae: ea4f 1a62 mov.w sl, r2, asr #5
- 80112b2: 6923 ldr r3, [r4, #16]
- 80112b4: 6849 ldr r1, [r1, #4]
- 80112b6: eb0a 0903 add.w r9, sl, r3
- 80112ba: 68a3 ldr r3, [r4, #8]
- 80112bc: 4607 mov r7, r0
- 80112be: 4616 mov r6, r2
- 80112c0: f109 0501 add.w r5, r9, #1
- 80112c4: 42ab cmp r3, r5
- 80112c6: db32 blt.n 801132e <__lshift+0x86>
- 80112c8: 4638 mov r0, r7
- 80112ca: f7ff fe57 bl 8010f7c <_Balloc>
- 80112ce: 2300 movs r3, #0
- 80112d0: 4680 mov r8, r0
- 80112d2: f100 0114 add.w r1, r0, #20
- 80112d6: 461a mov r2, r3
- 80112d8: 4553 cmp r3, sl
- 80112da: db2b blt.n 8011334 <__lshift+0x8c>
- 80112dc: 6920 ldr r0, [r4, #16]
- 80112de: ea2a 7aea bic.w sl, sl, sl, asr #31
- 80112e2: f104 0314 add.w r3, r4, #20
- 80112e6: f016 021f ands.w r2, r6, #31
- 80112ea: eb01 018a add.w r1, r1, sl, lsl #2
- 80112ee: eb03 0c80 add.w ip, r3, r0, lsl #2
- 80112f2: d025 beq.n 8011340 <__lshift+0x98>
- 80112f4: f1c2 0e20 rsb lr, r2, #32
- 80112f8: 2000 movs r0, #0
- 80112fa: 681e ldr r6, [r3, #0]
- 80112fc: 468a mov sl, r1
- 80112fe: 4096 lsls r6, r2
- 8011300: 4330 orrs r0, r6
- 8011302: f84a 0b04 str.w r0, [sl], #4
- 8011306: f853 0b04 ldr.w r0, [r3], #4
- 801130a: 459c cmp ip, r3
- 801130c: fa20 f00e lsr.w r0, r0, lr
- 8011310: d814 bhi.n 801133c <__lshift+0x94>
- 8011312: 6048 str r0, [r1, #4]
- 8011314: b108 cbz r0, 801131a <__lshift+0x72>
- 8011316: f109 0502 add.w r5, r9, #2
- 801131a: 3d01 subs r5, #1
- 801131c: 4638 mov r0, r7
- 801131e: f8c8 5010 str.w r5, [r8, #16]
- 8011322: 4621 mov r1, r4
- 8011324: f7ff fe4f bl 8010fc6 <_Bfree>
- 8011328: 4640 mov r0, r8
- 801132a: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
- 801132e: 3101 adds r1, #1
- 8011330: 005b lsls r3, r3, #1
- 8011332: e7c7 b.n 80112c4 <__lshift+0x1c>
- 8011334: f841 2023 str.w r2, [r1, r3, lsl #2]
- 8011338: 3301 adds r3, #1
- 801133a: e7cd b.n 80112d8 <__lshift+0x30>
- 801133c: 4651 mov r1, sl
- 801133e: e7dc b.n 80112fa <__lshift+0x52>
- 8011340: 3904 subs r1, #4
- 8011342: f853 2b04 ldr.w r2, [r3], #4
- 8011346: f841 2f04 str.w r2, [r1, #4]!
- 801134a: 459c cmp ip, r3
- 801134c: d8f9 bhi.n 8011342 <__lshift+0x9a>
- 801134e: e7e4 b.n 801131a <__lshift+0x72>
-
-08011350 <__mcmp>:
- 8011350: 6903 ldr r3, [r0, #16]
- 8011352: 690a ldr r2, [r1, #16]
- 8011354: 1a9b subs r3, r3, r2
- 8011356: b530 push {r4, r5, lr}
- 8011358: d10c bne.n 8011374 <__mcmp+0x24>
- 801135a: 0092 lsls r2, r2, #2
- 801135c: 3014 adds r0, #20
- 801135e: 3114 adds r1, #20
- 8011360: 1884 adds r4, r0, r2
- 8011362: 4411 add r1, r2
- 8011364: f854 5d04 ldr.w r5, [r4, #-4]!
- 8011368: f851 2d04 ldr.w r2, [r1, #-4]!
- 801136c: 4295 cmp r5, r2
- 801136e: d003 beq.n 8011378 <__mcmp+0x28>
- 8011370: d305 bcc.n 801137e <__mcmp+0x2e>
- 8011372: 2301 movs r3, #1
- 8011374: 4618 mov r0, r3
- 8011376: bd30 pop {r4, r5, pc}
- 8011378: 42a0 cmp r0, r4
- 801137a: d3f3 bcc.n 8011364 <__mcmp+0x14>
- 801137c: e7fa b.n 8011374 <__mcmp+0x24>
- 801137e: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff
- 8011382: e7f7 b.n 8011374 <__mcmp+0x24>
-
-08011384 <__mdiff>:
- 8011384: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
- 8011388: 460d mov r5, r1
- 801138a: 4607 mov r7, r0
- 801138c: 4611 mov r1, r2
- 801138e: 4628 mov r0, r5
- 8011390: 4614 mov r4, r2
- 8011392: f7ff ffdd bl 8011350 <__mcmp>
- 8011396: 1e06 subs r6, r0, #0
- 8011398: d108 bne.n 80113ac <__mdiff+0x28>
- 801139a: 4631 mov r1, r6
- 801139c: 4638 mov r0, r7
- 801139e: f7ff fded bl 8010f7c <_Balloc>
- 80113a2: 2301 movs r3, #1
- 80113a4: e9c0 3604 strd r3, r6, [r0, #16]
- 80113a8: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
- 80113ac: bfa4 itt ge
- 80113ae: 4623 movge r3, r4
- 80113b0: 462c movge r4, r5
- 80113b2: 4638 mov r0, r7
- 80113b4: 6861 ldr r1, [r4, #4]
- 80113b6: bfa6 itte ge
- 80113b8: 461d movge r5, r3
- 80113ba: 2600 movge r6, #0
- 80113bc: 2601 movlt r6, #1
- 80113be: f7ff fddd bl 8010f7c <_Balloc>
- 80113c2: 692b ldr r3, [r5, #16]
- 80113c4: 60c6 str r6, [r0, #12]
- 80113c6: 6926 ldr r6, [r4, #16]
- 80113c8: f105 0914 add.w r9, r5, #20
- 80113cc: f104 0214 add.w r2, r4, #20
- 80113d0: eb02 0786 add.w r7, r2, r6, lsl #2
- 80113d4: eb09 0883 add.w r8, r9, r3, lsl #2
- 80113d8: f100 0514 add.w r5, r0, #20
- 80113dc: f04f 0e00 mov.w lr, #0
- 80113e0: f852 ab04 ldr.w sl, [r2], #4
- 80113e4: f859 4b04 ldr.w r4, [r9], #4
- 80113e8: fa1e f18a uxtah r1, lr, sl
- 80113ec: b2a3 uxth r3, r4
- 80113ee: 1ac9 subs r1, r1, r3
- 80113f0: 0c23 lsrs r3, r4, #16
- 80113f2: ebc3 431a rsb r3, r3, sl, lsr #16
- 80113f6: eb03 4321 add.w r3, r3, r1, asr #16
- 80113fa: b289 uxth r1, r1
- 80113fc: ea4f 4e23 mov.w lr, r3, asr #16
- 8011400: 45c8 cmp r8, r9
- 8011402: ea41 4303 orr.w r3, r1, r3, lsl #16
- 8011406: 4694 mov ip, r2
- 8011408: f845 3b04 str.w r3, [r5], #4
- 801140c: d8e8 bhi.n 80113e0 <__mdiff+0x5c>
- 801140e: 45bc cmp ip, r7
- 8011410: d304 bcc.n 801141c <__mdiff+0x98>
- 8011412: f855 3d04 ldr.w r3, [r5, #-4]!
- 8011416: b183 cbz r3, 801143a <__mdiff+0xb6>
- 8011418: 6106 str r6, [r0, #16]
- 801141a: e7c5 b.n 80113a8 <__mdiff+0x24>
- 801141c: f85c 1b04 ldr.w r1, [ip], #4
- 8011420: fa1e f381 uxtah r3, lr, r1
- 8011424: 141a asrs r2, r3, #16
- 8011426: eb02 4211 add.w r2, r2, r1, lsr #16
- 801142a: b29b uxth r3, r3
- 801142c: ea43 4302 orr.w r3, r3, r2, lsl #16
- 8011430: ea4f 4e22 mov.w lr, r2, asr #16
- 8011434: f845 3b04 str.w r3, [r5], #4
- 8011438: e7e9 b.n 801140e <__mdiff+0x8a>
- 801143a: 3e01 subs r6, #1
- 801143c: e7e9 b.n 8011412 <__mdiff+0x8e>
-
-0801143e <__d2b>:
- 801143e: e92d 43f7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
- 8011442: 460e mov r6, r1
- 8011444: 2101 movs r1, #1
- 8011446: ec59 8b10 vmov r8, r9, d0
- 801144a: 4615 mov r5, r2
- 801144c: f7ff fd96 bl 8010f7c <_Balloc>
- 8011450: f3c9 540a ubfx r4, r9, #20, #11
- 8011454: 4607 mov r7, r0
- 8011456: f3c9 0313 ubfx r3, r9, #0, #20
- 801145a: bb34 cbnz r4, 80114aa <__d2b+0x6c>
- 801145c: 9301 str r3, [sp, #4]
- 801145e: f1b8 0300 subs.w r3, r8, #0
- 8011462: d027 beq.n 80114b4 <__d2b+0x76>
- 8011464: a802 add r0, sp, #8
- 8011466: f840 3d08 str.w r3, [r0, #-8]!
- 801146a: f7ff fe0f bl 801108c <__lo0bits>
- 801146e: 9900 ldr r1, [sp, #0]
- 8011470: b1f0 cbz r0, 80114b0 <__d2b+0x72>
- 8011472: 9a01 ldr r2, [sp, #4]
- 8011474: f1c0 0320 rsb r3, r0, #32
- 8011478: fa02 f303 lsl.w r3, r2, r3
- 801147c: 430b orrs r3, r1
- 801147e: 40c2 lsrs r2, r0
- 8011480: 617b str r3, [r7, #20]
- 8011482: 9201 str r2, [sp, #4]
- 8011484: 9b01 ldr r3, [sp, #4]
- 8011486: 61bb str r3, [r7, #24]
- 8011488: 2b00 cmp r3, #0
- 801148a: bf14 ite ne
- 801148c: 2102 movne r1, #2
- 801148e: 2101 moveq r1, #1
- 8011490: 6139 str r1, [r7, #16]
- 8011492: b1c4 cbz r4, 80114c6 <__d2b+0x88>
- 8011494: f2a4 4433 subw r4, r4, #1075 ; 0x433
- 8011498: 4404 add r4, r0
- 801149a: 6034 str r4, [r6, #0]
- 801149c: f1c0 0035 rsb r0, r0, #53 ; 0x35
- 80114a0: 6028 str r0, [r5, #0]
- 80114a2: 4638 mov r0, r7
- 80114a4: b003 add sp, #12
- 80114a6: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc}
- 80114aa: f443 1380 orr.w r3, r3, #1048576 ; 0x100000
- 80114ae: e7d5 b.n 801145c <__d2b+0x1e>
- 80114b0: 6179 str r1, [r7, #20]
- 80114b2: e7e7 b.n 8011484 <__d2b+0x46>
- 80114b4: a801 add r0, sp, #4
- 80114b6: f7ff fde9 bl 801108c <__lo0bits>
- 80114ba: 9b01 ldr r3, [sp, #4]
- 80114bc: 617b str r3, [r7, #20]
- 80114be: 2101 movs r1, #1
- 80114c0: 6139 str r1, [r7, #16]
- 80114c2: 3020 adds r0, #32
- 80114c4: e7e5 b.n 8011492 <__d2b+0x54>
- 80114c6: eb07 0381 add.w r3, r7, r1, lsl #2
- 80114ca: f2a0 4032 subw r0, r0, #1074 ; 0x432
- 80114ce: 6030 str r0, [r6, #0]
- 80114d0: 6918 ldr r0, [r3, #16]
- 80114d2: f7ff fdbc bl 801104e <__hi0bits>
- 80114d6: ebc0 1041 rsb r0, r0, r1, lsl #5
- 80114da: e7e1 b.n 80114a0 <__d2b+0x62>
- 80114dc: 0000 movs r0, r0
- ...
-
-080114e0 <frexp>:
- 80114e0: b082 sub sp, #8
- 80114e2: ed8d 0b00 vstr d0, [sp]
- 80114e6: 2100 movs r1, #0
- 80114e8: 9a01 ldr r2, [sp, #4]
- 80114ea: 6001 str r1, [r0, #0]
- 80114ec: 4918 ldr r1, [pc, #96] ; (8011550 <frexp+0x70>)
- 80114ee: f022 4300 bic.w r3, r2, #2147483648 ; 0x80000000
- 80114f2: 428b cmp r3, r1
- 80114f4: dc23 bgt.n 801153e <frexp+0x5e>
- 80114f6: 9900 ldr r1, [sp, #0]
- 80114f8: 4319 orrs r1, r3
- 80114fa: d020 beq.n 801153e <frexp+0x5e>
- 80114fc: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000
- 8011500: da0b bge.n 801151a <frexp+0x3a>
- 8011502: ed9f 7b11 vldr d7, [pc, #68] ; 8011548 <frexp+0x68>
- 8011506: ee20 7b07 vmul.f64 d7, d0, d7
- 801150a: ed8d 7b00 vstr d7, [sp]
- 801150e: 9a01 ldr r2, [sp, #4]
- 8011510: f06f 0135 mvn.w r1, #53 ; 0x35
- 8011514: f022 4300 bic.w r3, r2, #2147483648 ; 0x80000000
- 8011518: 6001 str r1, [r0, #0]
- 801151a: 6801 ldr r1, [r0, #0]
- 801151c: 151b asrs r3, r3, #20
- 801151e: f2a3 33fe subw r3, r3, #1022 ; 0x3fe
- 8011522: 440b add r3, r1
- 8011524: f022 42ff bic.w r2, r2, #2139095040 ; 0x7f800000
- 8011528: 6003 str r3, [r0, #0]
- 801152a: f422 02e0 bic.w r2, r2, #7340032 ; 0x700000
- 801152e: e9dd 0100 ldrd r0, r1, [sp]
- 8011532: f042 517f orr.w r1, r2, #1069547520 ; 0x3fc00000
- 8011536: f441 1100 orr.w r1, r1, #2097152 ; 0x200000
- 801153a: e9cd 0100 strd r0, r1, [sp]
- 801153e: ed9d 0b00 vldr d0, [sp]
- 8011542: b002 add sp, #8
- 8011544: 4770 bx lr
- 8011546: bf00 nop
- 8011548: 00000000 .word 0x00000000
- 801154c: 43500000 .word 0x43500000
- 8011550: 7fefffff .word 0x7fefffff
-
-08011554 <__sread>:
- 8011554: b510 push {r4, lr}
- 8011556: 460c mov r4, r1
- 8011558: f9b1 100e ldrsh.w r1, [r1, #14]
- 801155c: f000 f9fc bl 8011958 <_read_r>
- 8011560: 2800 cmp r0, #0
- 8011562: bfab itete ge
- 8011564: 6d23 ldrge r3, [r4, #80] ; 0x50
- 8011566: 89a3 ldrhlt r3, [r4, #12]
- 8011568: 181b addge r3, r3, r0
- 801156a: f423 5380 biclt.w r3, r3, #4096 ; 0x1000
- 801156e: bfac ite ge
- 8011570: 6523 strge r3, [r4, #80] ; 0x50
- 8011572: 81a3 strhlt r3, [r4, #12]
- 8011574: bd10 pop {r4, pc}
-
-08011576 <__swrite>:
- 8011576: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
- 801157a: 461f mov r7, r3
- 801157c: 898b ldrh r3, [r1, #12]
- 801157e: 05db lsls r3, r3, #23
- 8011580: 4605 mov r5, r0
- 8011582: 460c mov r4, r1
- 8011584: 4616 mov r6, r2
- 8011586: d505 bpl.n 8011594 <__swrite+0x1e>
- 8011588: 2302 movs r3, #2
- 801158a: 2200 movs r2, #0
- 801158c: f9b1 100e ldrsh.w r1, [r1, #14]
- 8011590: f000 f9be bl 8011910 <_lseek_r>
- 8011594: 89a3 ldrh r3, [r4, #12]
- 8011596: f9b4 100e ldrsh.w r1, [r4, #14]
- 801159a: f423 5380 bic.w r3, r3, #4096 ; 0x1000
- 801159e: 81a3 strh r3, [r4, #12]
- 80115a0: 4632 mov r2, r6
- 80115a2: 463b mov r3, r7
- 80115a4: 4628 mov r0, r5
- 80115a6: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr}
- 80115aa: f7fe bbcb b.w 800fd44 <_write_r>
-
-080115ae <__sseek>:
- 80115ae: b510 push {r4, lr}
- 80115b0: 460c mov r4, r1
- 80115b2: f9b1 100e ldrsh.w r1, [r1, #14]
- 80115b6: f000 f9ab bl 8011910 <_lseek_r>
- 80115ba: 1c43 adds r3, r0, #1
- 80115bc: 89a3 ldrh r3, [r4, #12]
- 80115be: bf15 itete ne
- 80115c0: 6520 strne r0, [r4, #80] ; 0x50
- 80115c2: f423 5380 biceq.w r3, r3, #4096 ; 0x1000
- 80115c6: f443 5380 orrne.w r3, r3, #4096 ; 0x1000
- 80115ca: 81a3 strheq r3, [r4, #12]
- 80115cc: bf18 it ne
- 80115ce: 81a3 strhne r3, [r4, #12]
- 80115d0: bd10 pop {r4, pc}
-
-080115d2 <__sclose>:
- 80115d2: f9b1 100e ldrsh.w r1, [r1, #14]
- 80115d6: f000 b911 b.w 80117fc <_close_r>
-
-080115da <strncpy>:
- 80115da: b570 push {r4, r5, r6, lr}
- 80115dc: 3901 subs r1, #1
- 80115de: 4604 mov r4, r0
- 80115e0: b902 cbnz r2, 80115e4 <strncpy+0xa>
- 80115e2: bd70 pop {r4, r5, r6, pc}
- 80115e4: 4623 mov r3, r4
- 80115e6: f811 5f01 ldrb.w r5, [r1, #1]!
- 80115ea: f803 5b01 strb.w r5, [r3], #1
- 80115ee: 1e56 subs r6, r2, #1
- 80115f0: b92d cbnz r5, 80115fe <strncpy+0x24>
- 80115f2: 4414 add r4, r2
- 80115f4: 42a3 cmp r3, r4
- 80115f6: d0f4 beq.n 80115e2 <strncpy+0x8>
- 80115f8: f803 5b01 strb.w r5, [r3], #1
- 80115fc: e7fa b.n 80115f4 <strncpy+0x1a>
- 80115fe: 461c mov r4, r3
- 8011600: 4632 mov r2, r6
- 8011602: e7ed b.n 80115e0 <strncpy+0x6>
-
-08011604 <__ssprint_r>:
- 8011604: 6893 ldr r3, [r2, #8]
- 8011606: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
- 801160a: 4681 mov r9, r0
- 801160c: 460c mov r4, r1
- 801160e: 4616 mov r6, r2
- 8011610: 2b00 cmp r3, #0
- 8011612: d05e beq.n 80116d2 <__ssprint_r+0xce>
- 8011614: f04f 0b00 mov.w fp, #0
- 8011618: f8d2 a000 ldr.w sl, [r2]
- 801161c: 465f mov r7, fp
- 801161e: b357 cbz r7, 8011676 <__ssprint_r+0x72>
- 8011620: 68a3 ldr r3, [r4, #8]
- 8011622: 429f cmp r7, r3
- 8011624: d340 bcc.n 80116a8 <__ssprint_r+0xa4>
- 8011626: 89a2 ldrh r2, [r4, #12]
- 8011628: f412 6f90 tst.w r2, #1152 ; 0x480
- 801162c: d03c beq.n 80116a8 <__ssprint_r+0xa4>
- 801162e: 6825 ldr r5, [r4, #0]
- 8011630: 6921 ldr r1, [r4, #16]
- 8011632: eba5 0801 sub.w r8, r5, r1
- 8011636: 6965 ldr r5, [r4, #20]
- 8011638: 2302 movs r3, #2
- 801163a: eb05 0545 add.w r5, r5, r5, lsl #1
- 801163e: fb95 f5f3 sdiv r5, r5, r3
- 8011642: f108 0301 add.w r3, r8, #1
- 8011646: 443b add r3, r7
- 8011648: 429d cmp r5, r3
- 801164a: bf38 it cc
- 801164c: 461d movcc r5, r3
- 801164e: 0553 lsls r3, r2, #21
- 8011650: d544 bpl.n 80116dc <__ssprint_r+0xd8>
- 8011652: 4629 mov r1, r5
- 8011654: 4648 mov r0, r9
- 8011656: f7fc fc49 bl 800deec <_malloc_r>
- 801165a: b988 cbnz r0, 8011680 <__ssprint_r+0x7c>
- 801165c: 230c movs r3, #12
- 801165e: f8c9 3000 str.w r3, [r9]
- 8011662: 89a3 ldrh r3, [r4, #12]
- 8011664: f043 0340 orr.w r3, r3, #64 ; 0x40
- 8011668: 81a3 strh r3, [r4, #12]
- 801166a: 2300 movs r3, #0
- 801166c: e9c6 3301 strd r3, r3, [r6, #4]
- 8011670: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
- 8011674: e02f b.n 80116d6 <__ssprint_r+0xd2>
- 8011676: e9da b700 ldrd fp, r7, [sl]
- 801167a: f10a 0a08 add.w sl, sl, #8
- 801167e: e7ce b.n 801161e <__ssprint_r+0x1a>
- 8011680: 4642 mov r2, r8
- 8011682: 6921 ldr r1, [r4, #16]
- 8011684: 9001 str r0, [sp, #4]
- 8011686: f7fc fe76 bl 800e376 <memcpy>
- 801168a: 89a2 ldrh r2, [r4, #12]
- 801168c: 9b01 ldr r3, [sp, #4]
- 801168e: f422 6290 bic.w r2, r2, #1152 ; 0x480
- 8011692: f042 0280 orr.w r2, r2, #128 ; 0x80
- 8011696: 81a2 strh r2, [r4, #12]
- 8011698: 6123 str r3, [r4, #16]
- 801169a: 6165 str r5, [r4, #20]
- 801169c: 4443 add r3, r8
- 801169e: eba5 0508 sub.w r5, r5, r8
- 80116a2: 6023 str r3, [r4, #0]
- 80116a4: 60a5 str r5, [r4, #8]
- 80116a6: 463b mov r3, r7
- 80116a8: 42bb cmp r3, r7
- 80116aa: bf28 it cs
- 80116ac: 463b movcs r3, r7
- 80116ae: 461a mov r2, r3
- 80116b0: 4659 mov r1, fp
- 80116b2: 6820 ldr r0, [r4, #0]
- 80116b4: 9301 str r3, [sp, #4]
- 80116b6: f7fc fe69 bl 800e38c <memmove>
- 80116ba: 68a2 ldr r2, [r4, #8]
- 80116bc: 9b01 ldr r3, [sp, #4]
- 80116be: 1ad2 subs r2, r2, r3
- 80116c0: 60a2 str r2, [r4, #8]
- 80116c2: 6822 ldr r2, [r4, #0]
- 80116c4: 4413 add r3, r2
- 80116c6: 6023 str r3, [r4, #0]
- 80116c8: 68b3 ldr r3, [r6, #8]
- 80116ca: 1bdf subs r7, r3, r7
- 80116cc: 60b7 str r7, [r6, #8]
- 80116ce: 2f00 cmp r7, #0
- 80116d0: d1d1 bne.n 8011676 <__ssprint_r+0x72>
- 80116d2: 2000 movs r0, #0
- 80116d4: 6070 str r0, [r6, #4]
- 80116d6: b003 add sp, #12
- 80116d8: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
- 80116dc: 462a mov r2, r5
- 80116de: 4648 mov r0, r9
- 80116e0: f7fc febe bl 800e460 <_realloc_r>
- 80116e4: 4603 mov r3, r0
- 80116e6: 2800 cmp r0, #0
- 80116e8: d1d6 bne.n 8011698 <__ssprint_r+0x94>
- 80116ea: 6921 ldr r1, [r4, #16]
- 80116ec: 4648 mov r0, r9
- 80116ee: f7ff faf1 bl 8010cd4 <_free_r>
- 80116f2: e7b3 b.n 801165c <__ssprint_r+0x58>
-
-080116f4 <__register_exitproc>:
- 80116f4: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
- 80116f8: 4c26 ldr r4, [pc, #152] ; (8011794 <__register_exitproc+0xa0>)
- 80116fa: 4606 mov r6, r0
- 80116fc: 6820 ldr r0, [r4, #0]
- 80116fe: 4698 mov r8, r3
- 8011700: 460f mov r7, r1
- 8011702: 4691 mov r9, r2
- 8011704: f7fc fbe0 bl 800dec8 <__retarget_lock_acquire_recursive>
- 8011708: 4b23 ldr r3, [pc, #140] ; (8011798 <__register_exitproc+0xa4>)
- 801170a: 681d ldr r5, [r3, #0]
- 801170c: f8d5 0148 ldr.w r0, [r5, #328] ; 0x148
- 8011710: b918 cbnz r0, 801171a <__register_exitproc+0x26>
- 8011712: f505 70a6 add.w r0, r5, #332 ; 0x14c
- 8011716: f8c5 0148 str.w r0, [r5, #328] ; 0x148
- 801171a: 6843 ldr r3, [r0, #4]
- 801171c: 2b1f cmp r3, #31
- 801171e: dd19 ble.n 8011754 <__register_exitproc+0x60>
- 8011720: 4b1e ldr r3, [pc, #120] ; (801179c <__register_exitproc+0xa8>)
- 8011722: b933 cbnz r3, 8011732 <__register_exitproc+0x3e>
- 8011724: 6820 ldr r0, [r4, #0]
- 8011726: f7fc fbd0 bl 800deca <__retarget_lock_release_recursive>
- 801172a: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
- 801172e: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
- 8011732: f44f 70c8 mov.w r0, #400 ; 0x190
- 8011736: f7fc fbc9 bl 800decc <malloc>
- 801173a: 2800 cmp r0, #0
- 801173c: d0f2 beq.n 8011724 <__register_exitproc+0x30>
- 801173e: f8d5 3148 ldr.w r3, [r5, #328] ; 0x148
- 8011742: 6003 str r3, [r0, #0]
- 8011744: 2200 movs r2, #0
- 8011746: 6042 str r2, [r0, #4]
- 8011748: f8c5 0148 str.w r0, [r5, #328] ; 0x148
- 801174c: f8c0 2188 str.w r2, [r0, #392] ; 0x188
- 8011750: f8c0 218c str.w r2, [r0, #396] ; 0x18c
- 8011754: 6843 ldr r3, [r0, #4]
- 8011756: b19e cbz r6, 8011780 <__register_exitproc+0x8c>
- 8011758: eb00 0583 add.w r5, r0, r3, lsl #2
- 801175c: 2201 movs r2, #1
- 801175e: f8c5 9088 str.w r9, [r5, #136] ; 0x88
- 8011762: f8d0 1188 ldr.w r1, [r0, #392] ; 0x188
- 8011766: 409a lsls r2, r3
- 8011768: 4311 orrs r1, r2
- 801176a: 2e02 cmp r6, #2
- 801176c: f8c0 1188 str.w r1, [r0, #392] ; 0x188
- 8011770: f8c5 8108 str.w r8, [r5, #264] ; 0x108
- 8011774: bf02 ittt eq
- 8011776: f8d0 118c ldreq.w r1, [r0, #396] ; 0x18c
- 801177a: 430a orreq r2, r1
- 801177c: f8c0 218c streq.w r2, [r0, #396] ; 0x18c
- 8011780: 1c5a adds r2, r3, #1
- 8011782: 3302 adds r3, #2
- 8011784: 6042 str r2, [r0, #4]
- 8011786: f840 7023 str.w r7, [r0, r3, lsl #2]
- 801178a: 6820 ldr r0, [r4, #0]
- 801178c: f7fc fb9d bl 800deca <__retarget_lock_release_recursive>
- 8011790: 2000 movs r0, #0
- 8011792: e7cc b.n 801172e <__register_exitproc+0x3a>
- 8011794: 20000850 .word 0x20000850
- 8011798: 08012e2c .word 0x08012e2c
- 801179c: 0800decd .word 0x0800decd
-
-080117a0 <_calloc_r>:
- 80117a0: b510 push {r4, lr}
- 80117a2: 4351 muls r1, r2
- 80117a4: f7fc fba2 bl 800deec <_malloc_r>
- 80117a8: 4604 mov r4, r0
- 80117aa: b198 cbz r0, 80117d4 <_calloc_r+0x34>
- 80117ac: f850 2c04 ldr.w r2, [r0, #-4]
- 80117b0: f022 0203 bic.w r2, r2, #3
- 80117b4: 3a04 subs r2, #4
- 80117b6: 2a24 cmp r2, #36 ; 0x24
- 80117b8: d81b bhi.n 80117f2 <_calloc_r+0x52>
- 80117ba: 2a13 cmp r2, #19
- 80117bc: d917 bls.n 80117ee <_calloc_r+0x4e>
- 80117be: 2100 movs r1, #0
- 80117c0: 2a1b cmp r2, #27
- 80117c2: e9c0 1100 strd r1, r1, [r0]
- 80117c6: d807 bhi.n 80117d8 <_calloc_r+0x38>
- 80117c8: f100 0308 add.w r3, r0, #8
- 80117cc: 2200 movs r2, #0
- 80117ce: e9c3 2200 strd r2, r2, [r3]
- 80117d2: 609a str r2, [r3, #8]
- 80117d4: 4620 mov r0, r4
- 80117d6: bd10 pop {r4, pc}
- 80117d8: 2a24 cmp r2, #36 ; 0x24
- 80117da: e9c0 1102 strd r1, r1, [r0, #8]
- 80117de: bf11 iteee ne
- 80117e0: f100 0310 addne.w r3, r0, #16
- 80117e4: 6101 streq r1, [r0, #16]
- 80117e6: f100 0318 addeq.w r3, r0, #24
- 80117ea: 6141 streq r1, [r0, #20]
- 80117ec: e7ee b.n 80117cc <_calloc_r+0x2c>
- 80117ee: 4603 mov r3, r0
- 80117f0: e7ec b.n 80117cc <_calloc_r+0x2c>
- 80117f2: 2100 movs r1, #0
- 80117f4: f7fc fde3 bl 800e3be <memset>
- 80117f8: e7ec b.n 80117d4 <_calloc_r+0x34>
- ...
-
-080117fc <_close_r>:
- 80117fc: b538 push {r3, r4, r5, lr}
- 80117fe: 4c06 ldr r4, [pc, #24] ; (8011818 <_close_r+0x1c>)
- 8011800: 2300 movs r3, #0
- 8011802: 4605 mov r5, r0
- 8011804: 4608 mov r0, r1
- 8011806: 6023 str r3, [r4, #0]
- 8011808: f7fa ffc3 bl 800c792 <_close>
- 801180c: 1c43 adds r3, r0, #1
- 801180e: d102 bne.n 8011816 <_close_r+0x1a>
- 8011810: 6823 ldr r3, [r4, #0]
- 8011812: b103 cbz r3, 8011816 <_close_r+0x1a>
- 8011814: 602b str r3, [r5, #0]
- 8011816: bd38 pop {r3, r4, r5, pc}
- 8011818: 20000b08 .word 0x20000b08
-
-0801181c <_fclose_r>:
- 801181c: b570 push {r4, r5, r6, lr}
- 801181e: 4606 mov r6, r0
- 8011820: 460c mov r4, r1
- 8011822: b911 cbnz r1, 801182a <_fclose_r+0xe>
- 8011824: 2500 movs r5, #0
- 8011826: 4628 mov r0, r5
- 8011828: bd70 pop {r4, r5, r6, pc}
- 801182a: b118 cbz r0, 8011834 <_fclose_r+0x18>
- 801182c: 6b83 ldr r3, [r0, #56] ; 0x38
- 801182e: b90b cbnz r3, 8011834 <_fclose_r+0x18>
- 8011830: f7ff f9c0 bl 8010bb4 <__sinit>
- 8011834: 6e63 ldr r3, [r4, #100] ; 0x64
- 8011836: 07d8 lsls r0, r3, #31
- 8011838: d405 bmi.n 8011846 <_fclose_r+0x2a>
- 801183a: 89a3 ldrh r3, [r4, #12]
- 801183c: 0599 lsls r1, r3, #22
- 801183e: d402 bmi.n 8011846 <_fclose_r+0x2a>
- 8011840: 6da0 ldr r0, [r4, #88] ; 0x58
- 8011842: f7fc fb41 bl 800dec8 <__retarget_lock_acquire_recursive>
- 8011846: f9b4 300c ldrsh.w r3, [r4, #12]
- 801184a: b93b cbnz r3, 801185c <_fclose_r+0x40>
- 801184c: 6e65 ldr r5, [r4, #100] ; 0x64
- 801184e: f015 0501 ands.w r5, r5, #1
- 8011852: d1e7 bne.n 8011824 <_fclose_r+0x8>
- 8011854: 6da0 ldr r0, [r4, #88] ; 0x58
- 8011856: f7fc fb38 bl 800deca <__retarget_lock_release_recursive>
- 801185a: e7e4 b.n 8011826 <_fclose_r+0xa>
- 801185c: 4621 mov r1, r4
- 801185e: 4630 mov r0, r6
- 8011860: f7ff f8ae bl 80109c0 <__sflush_r>
- 8011864: 6ae3 ldr r3, [r4, #44] ; 0x2c
- 8011866: 4605 mov r5, r0
- 8011868: b133 cbz r3, 8011878 <_fclose_r+0x5c>
- 801186a: 69e1 ldr r1, [r4, #28]
- 801186c: 4630 mov r0, r6
- 801186e: 4798 blx r3
- 8011870: 2800 cmp r0, #0
- 8011872: bfb8 it lt
- 8011874: f04f 35ff movlt.w r5, #4294967295 ; 0xffffffff
- 8011878: 89a3 ldrh r3, [r4, #12]
- 801187a: 061a lsls r2, r3, #24
- 801187c: d503 bpl.n 8011886 <_fclose_r+0x6a>
- 801187e: 6921 ldr r1, [r4, #16]
- 8011880: 4630 mov r0, r6
- 8011882: f7ff fa27 bl 8010cd4 <_free_r>
- 8011886: 6b21 ldr r1, [r4, #48] ; 0x30
- 8011888: b141 cbz r1, 801189c <_fclose_r+0x80>
- 801188a: f104 0340 add.w r3, r4, #64 ; 0x40
- 801188e: 4299 cmp r1, r3
- 8011890: d002 beq.n 8011898 <_fclose_r+0x7c>
- 8011892: 4630 mov r0, r6
- 8011894: f7ff fa1e bl 8010cd4 <_free_r>
- 8011898: 2300 movs r3, #0
- 801189a: 6323 str r3, [r4, #48] ; 0x30
- 801189c: 6c61 ldr r1, [r4, #68] ; 0x44
- 801189e: b121 cbz r1, 80118aa <_fclose_r+0x8e>
- 80118a0: 4630 mov r0, r6
- 80118a2: f7ff fa17 bl 8010cd4 <_free_r>
- 80118a6: 2300 movs r3, #0
- 80118a8: 6463 str r3, [r4, #68] ; 0x44
- 80118aa: f7ff f96b bl 8010b84 <__sfp_lock_acquire>
- 80118ae: 2300 movs r3, #0
- 80118b0: 81a3 strh r3, [r4, #12]
- 80118b2: 6e63 ldr r3, [r4, #100] ; 0x64
- 80118b4: 07db lsls r3, r3, #31
- 80118b6: d402 bmi.n 80118be <_fclose_r+0xa2>
- 80118b8: 6da0 ldr r0, [r4, #88] ; 0x58
- 80118ba: f7fc fb06 bl 800deca <__retarget_lock_release_recursive>
- 80118be: 6da0 ldr r0, [r4, #88] ; 0x58
- 80118c0: f7fc fb01 bl 800dec6 <__retarget_lock_close_recursive>
- 80118c4: f7ff f964 bl 8010b90 <__sfp_lock_release>
- 80118c8: e7ad b.n 8011826 <_fclose_r+0xa>
- ...
-
-080118cc <_fstat_r>:
- 80118cc: b538 push {r3, r4, r5, lr}
- 80118ce: 4c07 ldr r4, [pc, #28] ; (80118ec <_fstat_r+0x20>)
- 80118d0: 2300 movs r3, #0
- 80118d2: 4605 mov r5, r0
- 80118d4: 4608 mov r0, r1
- 80118d6: 4611 mov r1, r2
- 80118d8: 6023 str r3, [r4, #0]
- 80118da: f7fa ff66 bl 800c7aa <_fstat>
- 80118de: 1c43 adds r3, r0, #1
- 80118e0: d102 bne.n 80118e8 <_fstat_r+0x1c>
- 80118e2: 6823 ldr r3, [r4, #0]
- 80118e4: b103 cbz r3, 80118e8 <_fstat_r+0x1c>
- 80118e6: 602b str r3, [r5, #0]
- 80118e8: bd38 pop {r3, r4, r5, pc}
- 80118ea: bf00 nop
- 80118ec: 20000b08 .word 0x20000b08
-
-080118f0 <_isatty_r>:
- 80118f0: b538 push {r3, r4, r5, lr}
- 80118f2: 4c06 ldr r4, [pc, #24] ; (801190c <_isatty_r+0x1c>)
- 80118f4: 2300 movs r3, #0
- 80118f6: 4605 mov r5, r0
- 80118f8: 4608 mov r0, r1
- 80118fa: 6023 str r3, [r4, #0]
- 80118fc: f7fa ff65 bl 800c7ca <_isatty>
- 8011900: 1c43 adds r3, r0, #1
- 8011902: d102 bne.n 801190a <_isatty_r+0x1a>
- 8011904: 6823 ldr r3, [r4, #0]
- 8011906: b103 cbz r3, 801190a <_isatty_r+0x1a>
- 8011908: 602b str r3, [r5, #0]
- 801190a: bd38 pop {r3, r4, r5, pc}
- 801190c: 20000b08 .word 0x20000b08
-
-08011910 <_lseek_r>:
- 8011910: b538 push {r3, r4, r5, lr}
- 8011912: 4c07 ldr r4, [pc, #28] ; (8011930 <_lseek_r+0x20>)
- 8011914: 4605 mov r5, r0
- 8011916: 4608 mov r0, r1
- 8011918: 4611 mov r1, r2
- 801191a: 2200 movs r2, #0
- 801191c: 6022 str r2, [r4, #0]
- 801191e: 461a mov r2, r3
- 8011920: f7fa ff5e bl 800c7e0 <_lseek>
- 8011924: 1c43 adds r3, r0, #1
- 8011926: d102 bne.n 801192e <_lseek_r+0x1e>
- 8011928: 6823 ldr r3, [r4, #0]
- 801192a: b103 cbz r3, 801192e <_lseek_r+0x1e>
- 801192c: 602b str r3, [r5, #0]
- 801192e: bd38 pop {r3, r4, r5, pc}
- 8011930: 20000b08 .word 0x20000b08
-
-08011934 <__ascii_mbtowc>:
- 8011934: b082 sub sp, #8
- 8011936: b901 cbnz r1, 801193a <__ascii_mbtowc+0x6>
- 8011938: a901 add r1, sp, #4
- 801193a: b142 cbz r2, 801194e <__ascii_mbtowc+0x1a>
- 801193c: b14b cbz r3, 8011952 <__ascii_mbtowc+0x1e>
- 801193e: 7813 ldrb r3, [r2, #0]
- 8011940: 600b str r3, [r1, #0]
- 8011942: 7812 ldrb r2, [r2, #0]
- 8011944: 1c10 adds r0, r2, #0
- 8011946: bf18 it ne
- 8011948: 2001 movne r0, #1
- 801194a: b002 add sp, #8
- 801194c: 4770 bx lr
- 801194e: 4610 mov r0, r2
- 8011950: e7fb b.n 801194a <__ascii_mbtowc+0x16>
- 8011952: f06f 0001 mvn.w r0, #1
- 8011956: e7f8 b.n 801194a <__ascii_mbtowc+0x16>
-
-08011958 <_read_r>:
- 8011958: b538 push {r3, r4, r5, lr}
- 801195a: 4c07 ldr r4, [pc, #28] ; (8011978 <_read_r+0x20>)
- 801195c: 4605 mov r5, r0
- 801195e: 4608 mov r0, r1
- 8011960: 4611 mov r1, r2
- 8011962: 2200 movs r2, #0
- 8011964: 6022 str r2, [r4, #0]
- 8011966: 461a mov r2, r3
- 8011968: f7fa feda bl 800c720 <_read>
- 801196c: 1c43 adds r3, r0, #1
- 801196e: d102 bne.n 8011976 <_read_r+0x1e>
- 8011970: 6823 ldr r3, [r4, #0]
- 8011972: b103 cbz r3, 8011976 <_read_r+0x1e>
- 8011974: 602b str r3, [r5, #0]
- 8011976: bd38 pop {r3, r4, r5, pc}
- 8011978: 20000b08 .word 0x20000b08
-
-0801197c <__ascii_wctomb>:
- 801197c: b149 cbz r1, 8011992 <__ascii_wctomb+0x16>
- 801197e: 2aff cmp r2, #255 ; 0xff
- 8011980: bf85 ittet hi
- 8011982: 238a movhi r3, #138 ; 0x8a
- 8011984: 6003 strhi r3, [r0, #0]
- 8011986: 700a strbls r2, [r1, #0]
- 8011988: f04f 30ff movhi.w r0, #4294967295 ; 0xffffffff
- 801198c: bf98 it ls
- 801198e: 2001 movls r0, #1
- 8011990: 4770 bx lr
- 8011992: 4608 mov r0, r1
- 8011994: 4770 bx lr
- ...
-
-08011998 <_init>:
- 8011998: b5f8 push {r3, r4, r5, r6, r7, lr}
- 801199a: bf00 nop
- 801199c: bcf8 pop {r3, r4, r5, r6, r7}
- 801199e: bc08 pop {r3}
- 80119a0: 469e mov lr, r3
- 80119a2: 4770 bx lr
-
-080119a4 <_fini>:
- 80119a4: b5f8 push {r3, r4, r5, r6, r7, lr}
- 80119a6: bf00 nop
- 80119a8: bcf8 pop {r3, r4, r5, r6, r7}
- 80119aa: bc08 pop {r3}
- 80119ac: 469e mov lr, r3
- 80119ae: 4770 bx lr
projects / pioneer-stm32 / commitdiff