+++ /dev/null
-
-otto_controller_source.elf: file format elf32-littlearm
-
-Sections:
-Idx Name Size VMA LMA File off Algn
- 0 .isr_vector 000001f8 08000000 08000000 00010000 2**0
- CONTENTS, ALLOC, LOAD, READONLY, DATA
- 1 .text 0000a910 080001f8 080001f8 000101f8 2**3
- CONTENTS, ALLOC, LOAD, READONLY, CODE
- 2 .rodata 00000c20 0800ab08 0800ab08 0001ab08 2**3
- CONTENTS, ALLOC, LOAD, READONLY, DATA
- 3 .ARM.extab 00000000 0800b728 0800b728 00020084 2**0
- CONTENTS
- 4 .ARM 00000008 0800b728 0800b728 0001b728 2**2
- CONTENTS, ALLOC, LOAD, READONLY, DATA
- 5 .preinit_array 00000000 0800b730 0800b730 00020084 2**0
- CONTENTS, ALLOC, LOAD, DATA
- 6 .init_array 00000008 0800b730 0800b730 0001b730 2**2
- CONTENTS, ALLOC, LOAD, DATA
- 7 .fini_array 00000004 0800b738 0800b738 0001b738 2**2
- CONTENTS, ALLOC, LOAD, DATA
- 8 .data 00000084 20000000 0800b73c 00020000 2**2
- CONTENTS, ALLOC, LOAD, DATA
- 9 .bss 00000fa0 20000084 0800b7c0 00020084 2**2
- ALLOC
- 10 ._user_heap_stack 00000604 20001024 0800b7c0 00021024 2**0
- ALLOC
- 11 .ARM.attributes 0000002e 00000000 00000000 00020084 2**0
- CONTENTS, READONLY
- 12 .debug_info 0001f51a 00000000 00000000 000200b2 2**0
- CONTENTS, READONLY, DEBUGGING
- 13 .debug_abbrev 0000349a 00000000 00000000 0003f5cc 2**0
- CONTENTS, READONLY, DEBUGGING
- 14 .debug_aranges 00001300 00000000 00000000 00042a68 2**3
- CONTENTS, READONLY, DEBUGGING
- 15 .debug_ranges 000011f0 00000000 00000000 00043d68 2**3
- CONTENTS, READONLY, DEBUGGING
- 16 .debug_macro 0002a838 00000000 00000000 00044f58 2**0
- CONTENTS, READONLY, DEBUGGING
- 17 .debug_line 0000dfbb 00000000 00000000 0006f790 2**0
- CONTENTS, READONLY, DEBUGGING
- 18 .debug_str 0010372b 00000000 00000000 0007d74b 2**0
- CONTENTS, READONLY, DEBUGGING
- 19 .comment 0000007b 00000000 00000000 00180e76 2**0
- CONTENTS, READONLY
- 20 .debug_frame 000058d4 00000000 00000000 00180ef4 2**2
- CONTENTS, READONLY, DEBUGGING
-
-Disassembly of section .text:
-
-080001f8 <__do_global_dtors_aux>:
- 80001f8: b510 push {r4, lr}
- 80001fa: 4c05 ldr r4, [pc, #20] ; (8000210 <__do_global_dtors_aux+0x18>)
- 80001fc: 7823 ldrb r3, [r4, #0]
- 80001fe: b933 cbnz r3, 800020e <__do_global_dtors_aux+0x16>
- 8000200: 4b04 ldr r3, [pc, #16] ; (8000214 <__do_global_dtors_aux+0x1c>)
- 8000202: b113 cbz r3, 800020a <__do_global_dtors_aux+0x12>
- 8000204: 4804 ldr r0, [pc, #16] ; (8000218 <__do_global_dtors_aux+0x20>)
- 8000206: f3af 8000 nop.w
- 800020a: 2301 movs r3, #1
- 800020c: 7023 strb r3, [r4, #0]
- 800020e: bd10 pop {r4, pc}
- 8000210: 20000084 .word 0x20000084
- 8000214: 00000000 .word 0x00000000
- 8000218: 0800aaf0 .word 0x0800aaf0
-
-0800021c <frame_dummy>:
- 800021c: b508 push {r3, lr}
- 800021e: 4b03 ldr r3, [pc, #12] ; (800022c <frame_dummy+0x10>)
- 8000220: b11b cbz r3, 800022a <frame_dummy+0xe>
- 8000222: 4903 ldr r1, [pc, #12] ; (8000230 <frame_dummy+0x14>)
- 8000224: 4803 ldr r0, [pc, #12] ; (8000234 <frame_dummy+0x18>)
- 8000226: f3af 8000 nop.w
- 800022a: bd08 pop {r3, pc}
- 800022c: 00000000 .word 0x00000000
- 8000230: 20000088 .word 0x20000088
- 8000234: 0800aaf0 .word 0x0800aaf0
-
-08000238 <strlen>:
- 8000238: 4603 mov r3, r0
- 800023a: f813 2b01 ldrb.w r2, [r3], #1
- 800023e: 2a00 cmp r2, #0
- 8000240: d1fb bne.n 800023a <strlen+0x2>
- 8000242: 1a18 subs r0, r3, r0
- 8000244: 3801 subs r0, #1
- 8000246: 4770 bx lr
-
-08000248 <__aeabi_uldivmod>:
- 8000248: b953 cbnz r3, 8000260 <__aeabi_uldivmod+0x18>
- 800024a: b94a cbnz r2, 8000260 <__aeabi_uldivmod+0x18>
- 800024c: 2900 cmp r1, #0
- 800024e: bf08 it eq
- 8000250: 2800 cmpeq r0, #0
- 8000252: bf1c itt ne
- 8000254: f04f 31ff movne.w r1, #4294967295 ; 0xffffffff
- 8000258: f04f 30ff movne.w r0, #4294967295 ; 0xffffffff
- 800025c: f000 b972 b.w 8000544 <__aeabi_idiv0>
- 8000260: f1ad 0c08 sub.w ip, sp, #8
- 8000264: e96d ce04 strd ip, lr, [sp, #-16]!
- 8000268: f000 f806 bl 8000278 <__udivmoddi4>
- 800026c: f8dd e004 ldr.w lr, [sp, #4]
- 8000270: e9dd 2302 ldrd r2, r3, [sp, #8]
- 8000274: b004 add sp, #16
- 8000276: 4770 bx lr
-
-08000278 <__udivmoddi4>:
- 8000278: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
- 800027c: 9e08 ldr r6, [sp, #32]
- 800027e: 4604 mov r4, r0
- 8000280: 4688 mov r8, r1
- 8000282: 2b00 cmp r3, #0
- 8000284: d14b bne.n 800031e <__udivmoddi4+0xa6>
- 8000286: 428a cmp r2, r1
- 8000288: 4615 mov r5, r2
- 800028a: d967 bls.n 800035c <__udivmoddi4+0xe4>
- 800028c: fab2 f282 clz r2, r2
- 8000290: b14a cbz r2, 80002a6 <__udivmoddi4+0x2e>
- 8000292: f1c2 0720 rsb r7, r2, #32
- 8000296: fa01 f302 lsl.w r3, r1, r2
- 800029a: fa20 f707 lsr.w r7, r0, r7
- 800029e: 4095 lsls r5, r2
- 80002a0: ea47 0803 orr.w r8, r7, r3
- 80002a4: 4094 lsls r4, r2
- 80002a6: ea4f 4e15 mov.w lr, r5, lsr #16
- 80002aa: 0c23 lsrs r3, r4, #16
- 80002ac: fbb8 f7fe udiv r7, r8, lr
- 80002b0: fa1f fc85 uxth.w ip, r5
- 80002b4: fb0e 8817 mls r8, lr, r7, r8
- 80002b8: ea43 4308 orr.w r3, r3, r8, lsl #16
- 80002bc: fb07 f10c mul.w r1, r7, ip
- 80002c0: 4299 cmp r1, r3
- 80002c2: d909 bls.n 80002d8 <__udivmoddi4+0x60>
- 80002c4: 18eb adds r3, r5, r3
- 80002c6: f107 30ff add.w r0, r7, #4294967295 ; 0xffffffff
- 80002ca: f080 811b bcs.w 8000504 <__udivmoddi4+0x28c>
- 80002ce: 4299 cmp r1, r3
- 80002d0: f240 8118 bls.w 8000504 <__udivmoddi4+0x28c>
- 80002d4: 3f02 subs r7, #2
- 80002d6: 442b add r3, r5
- 80002d8: 1a5b subs r3, r3, r1
- 80002da: b2a4 uxth r4, r4
- 80002dc: fbb3 f0fe udiv r0, r3, lr
- 80002e0: fb0e 3310 mls r3, lr, r0, r3
- 80002e4: ea44 4403 orr.w r4, r4, r3, lsl #16
- 80002e8: fb00 fc0c mul.w ip, r0, ip
- 80002ec: 45a4 cmp ip, r4
- 80002ee: d909 bls.n 8000304 <__udivmoddi4+0x8c>
- 80002f0: 192c adds r4, r5, r4
- 80002f2: f100 33ff add.w r3, r0, #4294967295 ; 0xffffffff
- 80002f6: f080 8107 bcs.w 8000508 <__udivmoddi4+0x290>
- 80002fa: 45a4 cmp ip, r4
- 80002fc: f240 8104 bls.w 8000508 <__udivmoddi4+0x290>
- 8000300: 3802 subs r0, #2
- 8000302: 442c add r4, r5
- 8000304: ea40 4007 orr.w r0, r0, r7, lsl #16
- 8000308: eba4 040c sub.w r4, r4, ip
- 800030c: 2700 movs r7, #0
- 800030e: b11e cbz r6, 8000318 <__udivmoddi4+0xa0>
- 8000310: 40d4 lsrs r4, r2
- 8000312: 2300 movs r3, #0
- 8000314: e9c6 4300 strd r4, r3, [r6]
- 8000318: 4639 mov r1, r7
- 800031a: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
- 800031e: 428b cmp r3, r1
- 8000320: d909 bls.n 8000336 <__udivmoddi4+0xbe>
- 8000322: 2e00 cmp r6, #0
- 8000324: f000 80eb beq.w 80004fe <__udivmoddi4+0x286>
- 8000328: 2700 movs r7, #0
- 800032a: e9c6 0100 strd r0, r1, [r6]
- 800032e: 4638 mov r0, r7
- 8000330: 4639 mov r1, r7
- 8000332: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
- 8000336: fab3 f783 clz r7, r3
- 800033a: 2f00 cmp r7, #0
- 800033c: d147 bne.n 80003ce <__udivmoddi4+0x156>
- 800033e: 428b cmp r3, r1
- 8000340: d302 bcc.n 8000348 <__udivmoddi4+0xd0>
- 8000342: 4282 cmp r2, r0
- 8000344: f200 80fa bhi.w 800053c <__udivmoddi4+0x2c4>
- 8000348: 1a84 subs r4, r0, r2
- 800034a: eb61 0303 sbc.w r3, r1, r3
- 800034e: 2001 movs r0, #1
- 8000350: 4698 mov r8, r3
- 8000352: 2e00 cmp r6, #0
- 8000354: d0e0 beq.n 8000318 <__udivmoddi4+0xa0>
- 8000356: e9c6 4800 strd r4, r8, [r6]
- 800035a: e7dd b.n 8000318 <__udivmoddi4+0xa0>
- 800035c: b902 cbnz r2, 8000360 <__udivmoddi4+0xe8>
- 800035e: deff udf #255 ; 0xff
- 8000360: fab2 f282 clz r2, r2
- 8000364: 2a00 cmp r2, #0
- 8000366: f040 808f bne.w 8000488 <__udivmoddi4+0x210>
- 800036a: 1b49 subs r1, r1, r5
- 800036c: ea4f 4e15 mov.w lr, r5, lsr #16
- 8000370: fa1f f885 uxth.w r8, r5
- 8000374: 2701 movs r7, #1
- 8000376: fbb1 fcfe udiv ip, r1, lr
- 800037a: 0c23 lsrs r3, r4, #16
- 800037c: fb0e 111c mls r1, lr, ip, r1
- 8000380: ea43 4301 orr.w r3, r3, r1, lsl #16
- 8000384: fb08 f10c mul.w r1, r8, ip
- 8000388: 4299 cmp r1, r3
- 800038a: d907 bls.n 800039c <__udivmoddi4+0x124>
- 800038c: 18eb adds r3, r5, r3
- 800038e: f10c 30ff add.w r0, ip, #4294967295 ; 0xffffffff
- 8000392: d202 bcs.n 800039a <__udivmoddi4+0x122>
- 8000394: 4299 cmp r1, r3
- 8000396: f200 80cd bhi.w 8000534 <__udivmoddi4+0x2bc>
- 800039a: 4684 mov ip, r0
- 800039c: 1a59 subs r1, r3, r1
- 800039e: b2a3 uxth r3, r4
- 80003a0: fbb1 f0fe udiv r0, r1, lr
- 80003a4: fb0e 1410 mls r4, lr, r0, r1
- 80003a8: ea43 4404 orr.w r4, r3, r4, lsl #16
- 80003ac: fb08 f800 mul.w r8, r8, r0
- 80003b0: 45a0 cmp r8, r4
- 80003b2: d907 bls.n 80003c4 <__udivmoddi4+0x14c>
- 80003b4: 192c adds r4, r5, r4
- 80003b6: f100 33ff add.w r3, r0, #4294967295 ; 0xffffffff
- 80003ba: d202 bcs.n 80003c2 <__udivmoddi4+0x14a>
- 80003bc: 45a0 cmp r8, r4
- 80003be: f200 80b6 bhi.w 800052e <__udivmoddi4+0x2b6>
- 80003c2: 4618 mov r0, r3
- 80003c4: eba4 0408 sub.w r4, r4, r8
- 80003c8: ea40 400c orr.w r0, r0, ip, lsl #16
- 80003cc: e79f b.n 800030e <__udivmoddi4+0x96>
- 80003ce: f1c7 0c20 rsb ip, r7, #32
- 80003d2: 40bb lsls r3, r7
- 80003d4: fa22 fe0c lsr.w lr, r2, ip
- 80003d8: ea4e 0e03 orr.w lr, lr, r3
- 80003dc: fa01 f407 lsl.w r4, r1, r7
- 80003e0: fa20 f50c lsr.w r5, r0, ip
- 80003e4: fa21 f30c lsr.w r3, r1, ip
- 80003e8: ea4f 481e mov.w r8, lr, lsr #16
- 80003ec: 4325 orrs r5, r4
- 80003ee: fbb3 f9f8 udiv r9, r3, r8
- 80003f2: 0c2c lsrs r4, r5, #16
- 80003f4: fb08 3319 mls r3, r8, r9, r3
- 80003f8: fa1f fa8e uxth.w sl, lr
- 80003fc: ea44 4303 orr.w r3, r4, r3, lsl #16
- 8000400: fb09 f40a mul.w r4, r9, sl
- 8000404: 429c cmp r4, r3
- 8000406: fa02 f207 lsl.w r2, r2, r7
- 800040a: fa00 f107 lsl.w r1, r0, r7
- 800040e: d90b bls.n 8000428 <__udivmoddi4+0x1b0>
- 8000410: eb1e 0303 adds.w r3, lr, r3
- 8000414: f109 30ff add.w r0, r9, #4294967295 ; 0xffffffff
- 8000418: f080 8087 bcs.w 800052a <__udivmoddi4+0x2b2>
- 800041c: 429c cmp r4, r3
- 800041e: f240 8084 bls.w 800052a <__udivmoddi4+0x2b2>
- 8000422: f1a9 0902 sub.w r9, r9, #2
- 8000426: 4473 add r3, lr
- 8000428: 1b1b subs r3, r3, r4
- 800042a: b2ad uxth r5, r5
- 800042c: fbb3 f0f8 udiv r0, r3, r8
- 8000430: fb08 3310 mls r3, r8, r0, r3
- 8000434: ea45 4403 orr.w r4, r5, r3, lsl #16
- 8000438: fb00 fa0a mul.w sl, r0, sl
- 800043c: 45a2 cmp sl, r4
- 800043e: d908 bls.n 8000452 <__udivmoddi4+0x1da>
- 8000440: eb1e 0404 adds.w r4, lr, r4
- 8000444: f100 33ff add.w r3, r0, #4294967295 ; 0xffffffff
- 8000448: d26b bcs.n 8000522 <__udivmoddi4+0x2aa>
- 800044a: 45a2 cmp sl, r4
- 800044c: d969 bls.n 8000522 <__udivmoddi4+0x2aa>
- 800044e: 3802 subs r0, #2
- 8000450: 4474 add r4, lr
- 8000452: ea40 4009 orr.w r0, r0, r9, lsl #16
- 8000456: fba0 8902 umull r8, r9, r0, r2
- 800045a: eba4 040a sub.w r4, r4, sl
- 800045e: 454c cmp r4, r9
- 8000460: 46c2 mov sl, r8
- 8000462: 464b mov r3, r9
- 8000464: d354 bcc.n 8000510 <__udivmoddi4+0x298>
- 8000466: d051 beq.n 800050c <__udivmoddi4+0x294>
- 8000468: 2e00 cmp r6, #0
- 800046a: d069 beq.n 8000540 <__udivmoddi4+0x2c8>
- 800046c: ebb1 050a subs.w r5, r1, sl
- 8000470: eb64 0403 sbc.w r4, r4, r3
- 8000474: fa04 fc0c lsl.w ip, r4, ip
- 8000478: 40fd lsrs r5, r7
- 800047a: 40fc lsrs r4, r7
- 800047c: ea4c 0505 orr.w r5, ip, r5
- 8000480: e9c6 5400 strd r5, r4, [r6]
- 8000484: 2700 movs r7, #0
- 8000486: e747 b.n 8000318 <__udivmoddi4+0xa0>
- 8000488: f1c2 0320 rsb r3, r2, #32
- 800048c: fa20 f703 lsr.w r7, r0, r3
- 8000490: 4095 lsls r5, r2
- 8000492: fa01 f002 lsl.w r0, r1, r2
- 8000496: fa21 f303 lsr.w r3, r1, r3
- 800049a: ea4f 4e15 mov.w lr, r5, lsr #16
- 800049e: 4338 orrs r0, r7
- 80004a0: 0c01 lsrs r1, r0, #16
- 80004a2: fbb3 f7fe udiv r7, r3, lr
- 80004a6: fa1f f885 uxth.w r8, r5
- 80004aa: fb0e 3317 mls r3, lr, r7, r3
- 80004ae: ea41 4103 orr.w r1, r1, r3, lsl #16
- 80004b2: fb07 f308 mul.w r3, r7, r8
- 80004b6: 428b cmp r3, r1
- 80004b8: fa04 f402 lsl.w r4, r4, r2
- 80004bc: d907 bls.n 80004ce <__udivmoddi4+0x256>
- 80004be: 1869 adds r1, r5, r1
- 80004c0: f107 3cff add.w ip, r7, #4294967295 ; 0xffffffff
- 80004c4: d22f bcs.n 8000526 <__udivmoddi4+0x2ae>
- 80004c6: 428b cmp r3, r1
- 80004c8: d92d bls.n 8000526 <__udivmoddi4+0x2ae>
- 80004ca: 3f02 subs r7, #2
- 80004cc: 4429 add r1, r5
- 80004ce: 1acb subs r3, r1, r3
- 80004d0: b281 uxth r1, r0
- 80004d2: fbb3 f0fe udiv r0, r3, lr
- 80004d6: fb0e 3310 mls r3, lr, r0, r3
- 80004da: ea41 4103 orr.w r1, r1, r3, lsl #16
- 80004de: fb00 f308 mul.w r3, r0, r8
- 80004e2: 428b cmp r3, r1
- 80004e4: d907 bls.n 80004f6 <__udivmoddi4+0x27e>
- 80004e6: 1869 adds r1, r5, r1
- 80004e8: f100 3cff add.w ip, r0, #4294967295 ; 0xffffffff
- 80004ec: d217 bcs.n 800051e <__udivmoddi4+0x2a6>
- 80004ee: 428b cmp r3, r1
- 80004f0: d915 bls.n 800051e <__udivmoddi4+0x2a6>
- 80004f2: 3802 subs r0, #2
- 80004f4: 4429 add r1, r5
- 80004f6: 1ac9 subs r1, r1, r3
- 80004f8: ea40 4707 orr.w r7, r0, r7, lsl #16
- 80004fc: e73b b.n 8000376 <__udivmoddi4+0xfe>
- 80004fe: 4637 mov r7, r6
- 8000500: 4630 mov r0, r6
- 8000502: e709 b.n 8000318 <__udivmoddi4+0xa0>
- 8000504: 4607 mov r7, r0
- 8000506: e6e7 b.n 80002d8 <__udivmoddi4+0x60>
- 8000508: 4618 mov r0, r3
- 800050a: e6fb b.n 8000304 <__udivmoddi4+0x8c>
- 800050c: 4541 cmp r1, r8
- 800050e: d2ab bcs.n 8000468 <__udivmoddi4+0x1f0>
- 8000510: ebb8 0a02 subs.w sl, r8, r2
- 8000514: eb69 020e sbc.w r2, r9, lr
- 8000518: 3801 subs r0, #1
- 800051a: 4613 mov r3, r2
- 800051c: e7a4 b.n 8000468 <__udivmoddi4+0x1f0>
- 800051e: 4660 mov r0, ip
- 8000520: e7e9 b.n 80004f6 <__udivmoddi4+0x27e>
- 8000522: 4618 mov r0, r3
- 8000524: e795 b.n 8000452 <__udivmoddi4+0x1da>
- 8000526: 4667 mov r7, ip
- 8000528: e7d1 b.n 80004ce <__udivmoddi4+0x256>
- 800052a: 4681 mov r9, r0
- 800052c: e77c b.n 8000428 <__udivmoddi4+0x1b0>
- 800052e: 3802 subs r0, #2
- 8000530: 442c add r4, r5
- 8000532: e747 b.n 80003c4 <__udivmoddi4+0x14c>
- 8000534: f1ac 0c02 sub.w ip, ip, #2
- 8000538: 442b add r3, r5
- 800053a: e72f b.n 800039c <__udivmoddi4+0x124>
- 800053c: 4638 mov r0, r7
- 800053e: e708 b.n 8000352 <__udivmoddi4+0xda>
- 8000540: 4637 mov r7, r6
- 8000542: e6e9 b.n 8000318 <__udivmoddi4+0xa0>
-
-08000544 <__aeabi_idiv0>:
- 8000544: 4770 bx lr
- 8000546: bf00 nop
-
-08000548 <_ZN7Encoder8GetCountEv>:
-
- Encoder(TIM_HandleTypeDef* timer);
-
- void Setup();
-
- int GetCount() {
- 8000548: b480 push {r7}
- 800054a: b085 sub sp, #20
- 800054c: af00 add r7, sp, #0
- 800054e: 6078 str r0, [r7, #4]
- int count = ((int)__HAL_TIM_GET_COUNTER(this->timer_) -
- 8000550: 687b ldr r3, [r7, #4]
- 8000552: 681b ldr r3, [r3, #0]
- 8000554: 681b ldr r3, [r3, #0]
- 8000556: 6a5a ldr r2, [r3, #36] ; 0x24
- ((this->timer_->Init.Period)/2));
- 8000558: 687b ldr r3, [r7, #4]
- 800055a: 681b ldr r3, [r3, #0]
- 800055c: 68db ldr r3, [r3, #12]
- 800055e: 085b lsrs r3, r3, #1
- int count = ((int)__HAL_TIM_GET_COUNTER(this->timer_) -
- 8000560: 1ad3 subs r3, r2, r3
- ((this->timer_->Init.Period)/2));
- 8000562: 60fb str r3, [r7, #12]
- return count;
- 8000564: 68fb ldr r3, [r7, #12]
- }
- 8000566: 4618 mov r0, r3
- 8000568: 3714 adds r7, #20
- 800056a: 46bd mov sp, r7
- 800056c: f85d 7b04 ldr.w r7, [sp], #4
- 8000570: 4770 bx lr
-
-08000572 <_ZN7Encoder10ResetCountEv>:
-
- void ResetCount() {
- 8000572: b480 push {r7}
- 8000574: b083 sub sp, #12
- 8000576: af00 add r7, sp, #0
- 8000578: 6078 str r0, [r7, #4]
- //set counter to half its maximum value
- __HAL_TIM_SET_COUNTER(timer_, (timer_->Init.Period)/2);
- 800057a: 687b ldr r3, [r7, #4]
- 800057c: 681b ldr r3, [r3, #0]
- 800057e: 68da ldr r2, [r3, #12]
- 8000580: 687b ldr r3, [r7, #4]
- 8000582: 681b ldr r3, [r3, #0]
- 8000584: 681b ldr r3, [r3, #0]
- 8000586: 0852 lsrs r2, r2, #1
- 8000588: 625a str r2, [r3, #36] ; 0x24
- }
- 800058a: bf00 nop
- 800058c: 370c adds r7, #12
- 800058e: 46bd mov sp, r7
- 8000590: f85d 7b04 ldr.w r7, [sp], #4
- 8000594: 4770 bx lr
- ...
-
-08000598 <_ZN7EncoderC1EP17TIM_HandleTypeDef>:
-#include "encoder.h"
-
-Encoder::Encoder(TIM_HandleTypeDef* timer) {
- 8000598: b480 push {r7}
- 800059a: b083 sub sp, #12
- 800059c: af00 add r7, sp, #0
- 800059e: 6078 str r0, [r7, #4]
- 80005a0: 6039 str r1, [r7, #0]
- 80005a2: 687b ldr r3, [r7, #4]
- 80005a4: 4a08 ldr r2, [pc, #32] ; (80005c8 <_ZN7EncoderC1EP17TIM_HandleTypeDef+0x30>)
- 80005a6: 611a str r2, [r3, #16]
- 80005a8: 687b ldr r3, [r7, #4]
- 80005aa: 4a08 ldr r2, [pc, #32] ; (80005cc <_ZN7EncoderC1EP17TIM_HandleTypeDef+0x34>)
- 80005ac: 615a str r2, [r3, #20]
- 80005ae: 687b ldr r3, [r7, #4]
- 80005b0: 4a07 ldr r2, [pc, #28] ; (80005d0 <_ZN7EncoderC1EP17TIM_HandleTypeDef+0x38>)
- 80005b2: 619a str r2, [r3, #24]
- timer_ = timer;
- 80005b4: 687b ldr r3, [r7, #4]
- 80005b6: 683a ldr r2, [r7, #0]
- 80005b8: 601a str r2, [r3, #0]
-}
- 80005ba: 687b ldr r3, [r7, #4]
- 80005bc: 4618 mov r0, r3
- 80005be: 370c adds r7, #12
- 80005c0: 46bd mov sp, r7
- 80005c2: f85d 7b04 ldr.w r7, [sp], #4
- 80005c6: 4770 bx lr
- 80005c8: 00012110 .word 0x00012110
- 80005cc: 40490fd0 .word 0x40490fd0
- 80005d0: 3f40ff97 .word 0x3f40ff97
-
-080005d4 <_ZN7Encoder5SetupEv>:
-
-void Encoder::Setup() {
- 80005d4: b580 push {r7, lr}
- 80005d6: b082 sub sp, #8
- 80005d8: af00 add r7, sp, #0
- 80005da: 6078 str r0, [r7, #4]
- HAL_TIM_Encoder_Start(timer_, TIM_CHANNEL_ALL);
- 80005dc: 687b ldr r3, [r7, #4]
- 80005de: 681b ldr r3, [r3, #0]
- 80005e0: 213c movs r1, #60 ; 0x3c
- 80005e2: 4618 mov r0, r3
- 80005e4: f006 fe60 bl 80072a8 <HAL_TIM_Encoder_Start>
- this->ResetCount();
- 80005e8: 6878 ldr r0, [r7, #4]
- 80005ea: f7ff ffc2 bl 8000572 <_ZN7Encoder10ResetCountEv>
- this->previous_millis_ = 0;
- 80005ee: 687b ldr r3, [r7, #4]
- 80005f0: 2200 movs r2, #0
- 80005f2: 605a str r2, [r3, #4]
- this->current_millis_ = HAL_GetTick();
- 80005f4: f004 fe64 bl 80052c0 <HAL_GetTick>
- 80005f8: 4602 mov r2, r0
- 80005fa: 687b ldr r3, [r7, #4]
- 80005fc: 609a str r2, [r3, #8]
-}
- 80005fe: bf00 nop
- 8000600: 3708 adds r7, #8
- 8000602: 46bd mov sp, r7
- 8000604: bd80 pop {r7, pc}
-
-08000606 <_ZN7Encoder12UpdateValuesEv>:
-
-void Encoder::UpdateValues() {
- 8000606: b580 push {r7, lr}
- 8000608: b082 sub sp, #8
- 800060a: af00 add r7, sp, #0
- 800060c: 6078 str r0, [r7, #4]
- this->previous_millis_ = this->current_millis_;
- 800060e: 687b ldr r3, [r7, #4]
- 8000610: 689a ldr r2, [r3, #8]
- 8000612: 687b ldr r3, [r7, #4]
- 8000614: 605a str r2, [r3, #4]
- this->current_millis_ = HAL_GetTick();
- 8000616: f004 fe53 bl 80052c0 <HAL_GetTick>
- 800061a: 4602 mov r2, r0
- 800061c: 687b ldr r3, [r7, #4]
- 800061e: 609a str r2, [r3, #8]
- this->ticks_ = this->GetCount();
- 8000620: 6878 ldr r0, [r7, #4]
- 8000622: f7ff ff91 bl 8000548 <_ZN7Encoder8GetCountEv>
- 8000626: 4602 mov r2, r0
- 8000628: 687b ldr r3, [r7, #4]
- 800062a: 60da str r2, [r3, #12]
- this->ResetCount();
- 800062c: 6878 ldr r0, [r7, #4]
- 800062e: f7ff ffa0 bl 8000572 <_ZN7Encoder10ResetCountEv>
-}
- 8000632: bf00 nop
- 8000634: 3708 adds r7, #8
- 8000636: 46bd mov sp, r7
- 8000638: bd80 pop {r7, pc}
- ...
-
-0800063c <_ZN7Encoder17GetLinearVelocityEv>:
- float meters = ((float) this->ticks_ * kWheelCircumference)
- / kTicksPerRevolution;
- return meters;
-}
-
-float Encoder::GetLinearVelocity() {
- 800063c: b580 push {r7, lr}
- 800063e: b086 sub sp, #24
- 8000640: af00 add r7, sp, #0
- 8000642: 6078 str r0, [r7, #4]
- this->UpdateValues();
- 8000644: 6878 ldr r0, [r7, #4]
- 8000646: f7ff ffde bl 8000606 <_ZN7Encoder12UpdateValuesEv>
- float meters = ((float) this->ticks_ * kWheelCircumference)
- 800064a: 687b ldr r3, [r7, #4]
- 800064c: 68db ldr r3, [r3, #12]
- 800064e: ee07 3a90 vmov s15, r3
- 8000652: eeb8 7ae7 vcvt.f32.s32 s14, s15
- 8000656: 687b ldr r3, [r7, #4]
- 8000658: edd3 7a06 vldr s15, [r3, #24]
- 800065c: ee67 6a27 vmul.f32 s13, s14, s15
- / kTicksPerRevolution;
- 8000660: 687b ldr r3, [r7, #4]
- 8000662: 691b ldr r3, [r3, #16]
- 8000664: ee07 3a90 vmov s15, r3
- 8000668: eeb8 7a67 vcvt.f32.u32 s14, s15
- float meters = ((float) this->ticks_ * kWheelCircumference)
- 800066c: eec6 7a87 vdiv.f32 s15, s13, s14
- 8000670: edc7 7a05 vstr s15, [r7, #20]
- float deltaTime = this->current_millis_ - this->previous_millis_;
- 8000674: 687b ldr r3, [r7, #4]
- 8000676: 689a ldr r2, [r3, #8]
- 8000678: 687b ldr r3, [r7, #4]
- 800067a: 685b ldr r3, [r3, #4]
- 800067c: 1ad3 subs r3, r2, r3
- 800067e: ee07 3a90 vmov s15, r3
- 8000682: eef8 7a67 vcvt.f32.u32 s15, s15
- 8000686: edc7 7a04 vstr s15, [r7, #16]
- float linear_velocity = (meters / (deltaTime / 1000));
- 800068a: edd7 7a04 vldr s15, [r7, #16]
- 800068e: eddf 6a09 vldr s13, [pc, #36] ; 80006b4 <_ZN7Encoder17GetLinearVelocityEv+0x78>
- 8000692: ee87 7aa6 vdiv.f32 s14, s15, s13
- 8000696: edd7 6a05 vldr s13, [r7, #20]
- 800069a: eec6 7a87 vdiv.f32 s15, s13, s14
- 800069e: edc7 7a03 vstr s15, [r7, #12]
- return linear_velocity;
- 80006a2: 68fb ldr r3, [r7, #12]
- 80006a4: ee07 3a90 vmov s15, r3
-}
- 80006a8: eeb0 0a67 vmov.f32 s0, s15
- 80006ac: 3718 adds r7, #24
- 80006ae: 46bd mov sp, r7
- 80006b0: bd80 pop {r7, pc}
- 80006b2: bf00 nop
- 80006b4: 447a0000 .word 0x447a0000
-
-080006b8 <_ZN3ros3Msg19serializeAvrFloat64EPhf>:
- * @param[in] f value to serialize.
- *
- * @return number of bytes to advance the buffer pointer.
- *
- */
- static int serializeAvrFloat64(unsigned char* outbuffer, const float f)
- 80006b8: b480 push {r7}
- 80006ba: b087 sub sp, #28
- 80006bc: af00 add r7, sp, #0
- 80006be: 6078 str r0, [r7, #4]
- 80006c0: ed87 0a00 vstr s0, [r7]
- {
- const int32_t* val = (int32_t*) &f;
- 80006c4: 463b mov r3, r7
- 80006c6: 613b str r3, [r7, #16]
- int32_t exp = ((*val >> 23) & 255);
- 80006c8: 693b ldr r3, [r7, #16]
- 80006ca: 681b ldr r3, [r3, #0]
- 80006cc: 15db asrs r3, r3, #23
- 80006ce: b2db uxtb r3, r3
- 80006d0: 617b str r3, [r7, #20]
- if (exp != 0)
- 80006d2: 697b ldr r3, [r7, #20]
- 80006d4: 2b00 cmp r3, #0
- 80006d6: d003 beq.n 80006e0 <_ZN3ros3Msg19serializeAvrFloat64EPhf+0x28>
- {
- exp += 1023 - 127;
- 80006d8: 697b ldr r3, [r7, #20]
- 80006da: f503 7360 add.w r3, r3, #896 ; 0x380
- 80006de: 617b str r3, [r7, #20]
- }
-
- int32_t sig = *val;
- 80006e0: 693b ldr r3, [r7, #16]
- 80006e2: 681b ldr r3, [r3, #0]
- 80006e4: 60fb str r3, [r7, #12]
- *(outbuffer++) = 0;
- 80006e6: 687b ldr r3, [r7, #4]
- 80006e8: 1c5a adds r2, r3, #1
- 80006ea: 607a str r2, [r7, #4]
- 80006ec: 2200 movs r2, #0
- 80006ee: 701a strb r2, [r3, #0]
- *(outbuffer++) = 0;
- 80006f0: 687b ldr r3, [r7, #4]
- 80006f2: 1c5a adds r2, r3, #1
- 80006f4: 607a str r2, [r7, #4]
- 80006f6: 2200 movs r2, #0
- 80006f8: 701a strb r2, [r3, #0]
- *(outbuffer++) = 0;
- 80006fa: 687b ldr r3, [r7, #4]
- 80006fc: 1c5a adds r2, r3, #1
- 80006fe: 607a str r2, [r7, #4]
- 8000700: 2200 movs r2, #0
- 8000702: 701a strb r2, [r3, #0]
- *(outbuffer++) = (sig << 5) & 0xff;
- 8000704: 68fb ldr r3, [r7, #12]
- 8000706: 0159 lsls r1, r3, #5
- 8000708: 687b ldr r3, [r7, #4]
- 800070a: 1c5a adds r2, r3, #1
- 800070c: 607a str r2, [r7, #4]
- 800070e: b2ca uxtb r2, r1
- 8000710: 701a strb r2, [r3, #0]
- *(outbuffer++) = (sig >> 3) & 0xff;
- 8000712: 68fb ldr r3, [r7, #12]
- 8000714: 10d9 asrs r1, r3, #3
- 8000716: 687b ldr r3, [r7, #4]
- 8000718: 1c5a adds r2, r3, #1
- 800071a: 607a str r2, [r7, #4]
- 800071c: b2ca uxtb r2, r1
- 800071e: 701a strb r2, [r3, #0]
- *(outbuffer++) = (sig >> 11) & 0xff;
- 8000720: 68fb ldr r3, [r7, #12]
- 8000722: 12d9 asrs r1, r3, #11
- 8000724: 687b ldr r3, [r7, #4]
- 8000726: 1c5a adds r2, r3, #1
- 8000728: 607a str r2, [r7, #4]
- 800072a: b2ca uxtb r2, r1
- 800072c: 701a strb r2, [r3, #0]
- *(outbuffer++) = ((exp << 4) & 0xF0) | ((sig >> 19) & 0x0F);
- 800072e: 697b ldr r3, [r7, #20]
- 8000730: 011b lsls r3, r3, #4
- 8000732: b25a sxtb r2, r3
- 8000734: 68fb ldr r3, [r7, #12]
- 8000736: 14db asrs r3, r3, #19
- 8000738: b25b sxtb r3, r3
- 800073a: f003 030f and.w r3, r3, #15
- 800073e: b25b sxtb r3, r3
- 8000740: 4313 orrs r3, r2
- 8000742: b259 sxtb r1, r3
- 8000744: 687b ldr r3, [r7, #4]
- 8000746: 1c5a adds r2, r3, #1
- 8000748: 607a str r2, [r7, #4]
- 800074a: b2ca uxtb r2, r1
- 800074c: 701a strb r2, [r3, #0]
- *(outbuffer++) = (exp >> 4) & 0x7F;
- 800074e: 697b ldr r3, [r7, #20]
- 8000750: 111b asrs r3, r3, #4
- 8000752: b2da uxtb r2, r3
- 8000754: 687b ldr r3, [r7, #4]
- 8000756: 1c59 adds r1, r3, #1
- 8000758: 6079 str r1, [r7, #4]
- 800075a: f002 027f and.w r2, r2, #127 ; 0x7f
- 800075e: b2d2 uxtb r2, r2
- 8000760: 701a strb r2, [r3, #0]
-
- // Mark negative bit as necessary.
- if (f < 0)
- 8000762: edd7 7a00 vldr s15, [r7]
- 8000766: eef5 7ac0 vcmpe.f32 s15, #0.0
- 800076a: eef1 fa10 vmrs APSR_nzcv, fpscr
- 800076e: d508 bpl.n 8000782 <_ZN3ros3Msg19serializeAvrFloat64EPhf+0xca>
- {
- *(outbuffer - 1) |= 0x80;
- 8000770: 687b ldr r3, [r7, #4]
- 8000772: 3b01 subs r3, #1
- 8000774: 781a ldrb r2, [r3, #0]
- 8000776: 687b ldr r3, [r7, #4]
- 8000778: 3b01 subs r3, #1
- 800077a: f062 027f orn r2, r2, #127 ; 0x7f
- 800077e: b2d2 uxtb r2, r2
- 8000780: 701a strb r2, [r3, #0]
- }
-
- return 8;
- 8000782: 2308 movs r3, #8
- }
- 8000784: 4618 mov r0, r3
- 8000786: 371c adds r7, #28
- 8000788: 46bd mov sp, r7
- 800078a: f85d 7b04 ldr.w r7, [sp], #4
- 800078e: 4770 bx lr
-
-08000790 <_ZN3ros3Msg21deserializeAvrFloat64EPKhPf>:
- * @param[in] inbuffer pointer for buffer to deserialize from.
- * @param[out] f pointer to place the deserialized value in.
- *
- * @return number of bytes to advance the buffer pointer.
- */
- static int deserializeAvrFloat64(const unsigned char* inbuffer, float* f)
- 8000790: b480 push {r7}
- 8000792: b085 sub sp, #20
- 8000794: af00 add r7, sp, #0
- 8000796: 6078 str r0, [r7, #4]
- 8000798: 6039 str r1, [r7, #0]
- {
- uint32_t* val = (uint32_t*)f;
- 800079a: 683b ldr r3, [r7, #0]
- 800079c: 60fb str r3, [r7, #12]
- inbuffer += 3;
- 800079e: 687b ldr r3, [r7, #4]
- 80007a0: 3303 adds r3, #3
- 80007a2: 607b str r3, [r7, #4]
-
- // Copy truncated mantissa.
- *val = ((uint32_t)(*(inbuffer++)) >> 5 & 0x07);
- 80007a4: 687b ldr r3, [r7, #4]
- 80007a6: 1c5a adds r2, r3, #1
- 80007a8: 607a str r2, [r7, #4]
- 80007aa: 781b ldrb r3, [r3, #0]
- 80007ac: 095b lsrs r3, r3, #5
- 80007ae: f003 0207 and.w r2, r3, #7
- 80007b2: 68fb ldr r3, [r7, #12]
- 80007b4: 601a str r2, [r3, #0]
- *val |= ((uint32_t)(*(inbuffer++)) & 0xff) << 3;
- 80007b6: 687b ldr r3, [r7, #4]
- 80007b8: 1c5a adds r2, r3, #1
- 80007ba: 607a str r2, [r7, #4]
- 80007bc: 781b ldrb r3, [r3, #0]
- 80007be: 00da lsls r2, r3, #3
- 80007c0: 68fb ldr r3, [r7, #12]
- 80007c2: 681b ldr r3, [r3, #0]
- 80007c4: 431a orrs r2, r3
- 80007c6: 68fb ldr r3, [r7, #12]
- 80007c8: 601a str r2, [r3, #0]
- *val |= ((uint32_t)(*(inbuffer++)) & 0xff) << 11;
- 80007ca: 687b ldr r3, [r7, #4]
- 80007cc: 1c5a adds r2, r3, #1
- 80007ce: 607a str r2, [r7, #4]
- 80007d0: 781b ldrb r3, [r3, #0]
- 80007d2: 02da lsls r2, r3, #11
- 80007d4: 68fb ldr r3, [r7, #12]
- 80007d6: 681b ldr r3, [r3, #0]
- 80007d8: 431a orrs r2, r3
- 80007da: 68fb ldr r3, [r7, #12]
- 80007dc: 601a str r2, [r3, #0]
- *val |= ((uint32_t)(*inbuffer) & 0x0f) << 19;
- 80007de: 68fb ldr r3, [r7, #12]
- 80007e0: 681a ldr r2, [r3, #0]
- 80007e2: 687b ldr r3, [r7, #4]
- 80007e4: 781b ldrb r3, [r3, #0]
- 80007e6: 04db lsls r3, r3, #19
- 80007e8: f403 03f0 and.w r3, r3, #7864320 ; 0x780000
- 80007ec: 431a orrs r2, r3
- 80007ee: 68fb ldr r3, [r7, #12]
- 80007f0: 601a str r2, [r3, #0]
-
- // Copy truncated exponent.
- uint32_t exp = ((uint32_t)(*(inbuffer++)) & 0xf0) >> 4;
- 80007f2: 687b ldr r3, [r7, #4]
- 80007f4: 1c5a adds r2, r3, #1
- 80007f6: 607a str r2, [r7, #4]
- 80007f8: 781b ldrb r3, [r3, #0]
- 80007fa: 091b lsrs r3, r3, #4
- 80007fc: f003 030f and.w r3, r3, #15
- 8000800: 60bb str r3, [r7, #8]
- exp |= ((uint32_t)(*inbuffer) & 0x7f) << 4;
- 8000802: 687b ldr r3, [r7, #4]
- 8000804: 781b ldrb r3, [r3, #0]
- 8000806: 011b lsls r3, r3, #4
- 8000808: f403 62fe and.w r2, r3, #2032 ; 0x7f0
- 800080c: 68bb ldr r3, [r7, #8]
- 800080e: 4313 orrs r3, r2
- 8000810: 60bb str r3, [r7, #8]
- if (exp != 0)
- 8000812: 68bb ldr r3, [r7, #8]
- 8000814: 2b00 cmp r3, #0
- 8000816: d008 beq.n 800082a <_ZN3ros3Msg21deserializeAvrFloat64EPKhPf+0x9a>
- {
- *val |= ((exp) - 1023 + 127) << 23;
- 8000818: 68fb ldr r3, [r7, #12]
- 800081a: 681a ldr r2, [r3, #0]
- 800081c: 68bb ldr r3, [r7, #8]
- 800081e: f5a3 7360 sub.w r3, r3, #896 ; 0x380
- 8000822: 05db lsls r3, r3, #23
- 8000824: 431a orrs r2, r3
- 8000826: 68fb ldr r3, [r7, #12]
- 8000828: 601a str r2, [r3, #0]
- }
-
- // Copy negative sign.
- *val |= ((uint32_t)(*(inbuffer++)) & 0x80) << 24;
- 800082a: 687b ldr r3, [r7, #4]
- 800082c: 1c5a adds r2, r3, #1
- 800082e: 607a str r2, [r7, #4]
- 8000830: 781b ldrb r3, [r3, #0]
- 8000832: 061b lsls r3, r3, #24
- 8000834: f003 4200 and.w r2, r3, #2147483648 ; 0x80000000
- 8000838: 68fb ldr r3, [r7, #12]
- 800083a: 681b ldr r3, [r3, #0]
- 800083c: 431a orrs r2, r3
- 800083e: 68fb ldr r3, [r7, #12]
- 8000840: 601a str r2, [r3, #0]
-
- return 8;
- 8000842: 2308 movs r3, #8
- }
- 8000844: 4618 mov r0, r3
- 8000846: 3714 adds r7, #20
- 8000848: 46bd mov sp, r7
- 800084a: f85d 7b04 ldr.w r7, [sp], #4
- 800084e: 4770 bx lr
-
-08000850 <_ZN3ros3MsgC1Ev>:
-class Msg
- 8000850: b480 push {r7}
- 8000852: b083 sub sp, #12
- 8000854: af00 add r7, sp, #0
- 8000856: 6078 str r0, [r7, #4]
- 8000858: 4a04 ldr r2, [pc, #16] ; (800086c <_ZN3ros3MsgC1Ev+0x1c>)
- 800085a: 687b ldr r3, [r7, #4]
- 800085c: 601a str r2, [r3, #0]
- 800085e: 687b ldr r3, [r7, #4]
- 8000860: 4618 mov r0, r3
- 8000862: 370c adds r7, #12
- 8000864: 46bd mov sp, r7
- 8000866: f85d 7b04 ldr.w r7, [sp], #4
- 800086a: 4770 bx lr
- 800086c: 0800b14c .word 0x0800b14c
-
-08000870 <_ZN8std_msgs6StringC1Ev>:
- {
- public:
- typedef const char* _data_type;
- _data_type data;
-
- String():
- 8000870: b580 push {r7, lr}
- 8000872: b082 sub sp, #8
- 8000874: af00 add r7, sp, #0
- 8000876: 6078 str r0, [r7, #4]
- data("")
- 8000878: 687b ldr r3, [r7, #4]
- 800087a: 4618 mov r0, r3
- 800087c: f7ff ffe8 bl 8000850 <_ZN3ros3MsgC1Ev>
- 8000880: 4a05 ldr r2, [pc, #20] ; (8000898 <_ZN8std_msgs6StringC1Ev+0x28>)
- 8000882: 687b ldr r3, [r7, #4]
- 8000884: 601a str r2, [r3, #0]
- 8000886: 687b ldr r3, [r7, #4]
- 8000888: 4a04 ldr r2, [pc, #16] ; (800089c <_ZN8std_msgs6StringC1Ev+0x2c>)
- 800088a: 605a str r2, [r3, #4]
- {
- }
- 800088c: 687b ldr r3, [r7, #4]
- 800088e: 4618 mov r0, r3
- 8000890: 3708 adds r7, #8
- 8000892: 46bd mov sp, r7
- 8000894: bd80 pop {r7, pc}
- 8000896: bf00 nop
- 8000898: 0800b134 .word 0x0800b134
- 800089c: 0800ab08 .word 0x0800ab08
-
-080008a0 <_ZNK8std_msgs6String9serializeEPh>:
-
- virtual int serialize(unsigned char *outbuffer) const
- 80008a0: b580 push {r7, lr}
- 80008a2: b084 sub sp, #16
- 80008a4: af00 add r7, sp, #0
- 80008a6: 6078 str r0, [r7, #4]
- 80008a8: 6039 str r1, [r7, #0]
- {
- int offset = 0;
- 80008aa: 2300 movs r3, #0
- 80008ac: 60fb str r3, [r7, #12]
- uint32_t length_data = strlen(this->data);
- 80008ae: 687b ldr r3, [r7, #4]
- 80008b0: 685b ldr r3, [r3, #4]
- 80008b2: 4618 mov r0, r3
- 80008b4: f7ff fcc0 bl 8000238 <strlen>
- 80008b8: 60b8 str r0, [r7, #8]
- varToArr(outbuffer + offset, length_data);
- 80008ba: 68fb ldr r3, [r7, #12]
- 80008bc: 683a ldr r2, [r7, #0]
- 80008be: 4413 add r3, r2
- 80008c0: 68b9 ldr r1, [r7, #8]
- 80008c2: 4618 mov r0, r3
- 80008c4: f003 f973 bl 8003bae <_ZN3ros3Msg8varToArrIPhmEEvT_T0_>
- offset += 4;
- 80008c8: 68fb ldr r3, [r7, #12]
- 80008ca: 3304 adds r3, #4
- 80008cc: 60fb str r3, [r7, #12]
- memcpy(outbuffer + offset, this->data, length_data);
- 80008ce: 68fb ldr r3, [r7, #12]
- 80008d0: 683a ldr r2, [r7, #0]
- 80008d2: 18d0 adds r0, r2, r3
- 80008d4: 687b ldr r3, [r7, #4]
- 80008d6: 685b ldr r3, [r3, #4]
- 80008d8: 68ba ldr r2, [r7, #8]
- 80008da: 4619 mov r1, r3
- 80008dc: f009 ffc0 bl 800a860 <memcpy>
- offset += length_data;
- 80008e0: 68fa ldr r2, [r7, #12]
- 80008e2: 68bb ldr r3, [r7, #8]
- 80008e4: 4413 add r3, r2
- 80008e6: 60fb str r3, [r7, #12]
- return offset;
- 80008e8: 68fb ldr r3, [r7, #12]
- }
- 80008ea: 4618 mov r0, r3
- 80008ec: 3710 adds r7, #16
- 80008ee: 46bd mov sp, r7
- 80008f0: bd80 pop {r7, pc}
-
-080008f2 <_ZN8std_msgs6String11deserializeEPh>:
-
- virtual int deserialize(unsigned char *inbuffer)
- 80008f2: b580 push {r7, lr}
- 80008f4: b086 sub sp, #24
- 80008f6: af00 add r7, sp, #0
- 80008f8: 6078 str r0, [r7, #4]
- 80008fa: 6039 str r1, [r7, #0]
- {
- int offset = 0;
- 80008fc: 2300 movs r3, #0
- 80008fe: 613b str r3, [r7, #16]
- uint32_t length_data;
- arrToVar(length_data, (inbuffer + offset));
- 8000900: 693b ldr r3, [r7, #16]
- 8000902: 683a ldr r2, [r7, #0]
- 8000904: 441a add r2, r3
- 8000906: f107 030c add.w r3, r7, #12
- 800090a: 4611 mov r1, r2
- 800090c: 4618 mov r0, r3
- 800090e: f003 f96c bl 8003bea <_ZN3ros3Msg8arrToVarImPhEEvRT_T0_>
- offset += 4;
- 8000912: 693b ldr r3, [r7, #16]
- 8000914: 3304 adds r3, #4
- 8000916: 613b str r3, [r7, #16]
- for(unsigned int k= offset; k< offset+length_data; ++k){
- 8000918: 693b ldr r3, [r7, #16]
- 800091a: 617b str r3, [r7, #20]
- 800091c: 693a ldr r2, [r7, #16]
- 800091e: 68fb ldr r3, [r7, #12]
- 8000920: 4413 add r3, r2
- 8000922: 697a ldr r2, [r7, #20]
- 8000924: 429a cmp r2, r3
- 8000926: d20c bcs.n 8000942 <_ZN8std_msgs6String11deserializeEPh+0x50>
- inbuffer[k-1]=inbuffer[k];
- 8000928: 683a ldr r2, [r7, #0]
- 800092a: 697b ldr r3, [r7, #20]
- 800092c: 441a add r2, r3
- 800092e: 697b ldr r3, [r7, #20]
- 8000930: 3b01 subs r3, #1
- 8000932: 6839 ldr r1, [r7, #0]
- 8000934: 440b add r3, r1
- 8000936: 7812 ldrb r2, [r2, #0]
- 8000938: 701a strb r2, [r3, #0]
- for(unsigned int k= offset; k< offset+length_data; ++k){
- 800093a: 697b ldr r3, [r7, #20]
- 800093c: 3301 adds r3, #1
- 800093e: 617b str r3, [r7, #20]
- 8000940: e7ec b.n 800091c <_ZN8std_msgs6String11deserializeEPh+0x2a>
- }
- inbuffer[offset+length_data-1]=0;
- 8000942: 693a ldr r2, [r7, #16]
- 8000944: 68fb ldr r3, [r7, #12]
- 8000946: 4413 add r3, r2
- 8000948: 3b01 subs r3, #1
- 800094a: 683a ldr r2, [r7, #0]
- 800094c: 4413 add r3, r2
- 800094e: 2200 movs r2, #0
- 8000950: 701a strb r2, [r3, #0]
- this->data = (char *)(inbuffer + offset-1);
- 8000952: 693b ldr r3, [r7, #16]
- 8000954: 3b01 subs r3, #1
- 8000956: 683a ldr r2, [r7, #0]
- 8000958: 441a add r2, r3
- 800095a: 687b ldr r3, [r7, #4]
- 800095c: 605a str r2, [r3, #4]
- offset += length_data;
- 800095e: 693a ldr r2, [r7, #16]
- 8000960: 68fb ldr r3, [r7, #12]
- 8000962: 4413 add r3, r2
- 8000964: 613b str r3, [r7, #16]
- return offset;
- 8000966: 693b ldr r3, [r7, #16]
- }
- 8000968: 4618 mov r0, r3
- 800096a: 3718 adds r7, #24
- 800096c: 46bd mov sp, r7
- 800096e: bd80 pop {r7, pc}
-
-08000970 <_ZN8std_msgs6String7getTypeEv>:
-
- const char * getType(){ return "std_msgs/String"; };
- 8000970: b480 push {r7}
- 8000972: b083 sub sp, #12
- 8000974: af00 add r7, sp, #0
- 8000976: 6078 str r0, [r7, #4]
- 8000978: 4b03 ldr r3, [pc, #12] ; (8000988 <_ZN8std_msgs6String7getTypeEv+0x18>)
- 800097a: 4618 mov r0, r3
- 800097c: 370c adds r7, #12
- 800097e: 46bd mov sp, r7
- 8000980: f85d 7b04 ldr.w r7, [sp], #4
- 8000984: 4770 bx lr
- 8000986: bf00 nop
- 8000988: 0800ab0c .word 0x0800ab0c
-
-0800098c <_ZN8std_msgs6String6getMD5Ev>:
- const char * getMD5(){ return "992ce8a1687cec8c8bd883ec73ca41d1"; };
- 800098c: b480 push {r7}
- 800098e: b083 sub sp, #12
- 8000990: af00 add r7, sp, #0
- 8000992: 6078 str r0, [r7, #4]
- 8000994: 4b03 ldr r3, [pc, #12] ; (80009a4 <_ZN8std_msgs6String6getMD5Ev+0x18>)
- 8000996: 4618 mov r0, r3
- 8000998: 370c adds r7, #12
- 800099a: 46bd mov sp, r7
- 800099c: f85d 7b04 ldr.w r7, [sp], #4
- 80009a0: 4770 bx lr
- 80009a2: bf00 nop
- 80009a4: 0800ab1c .word 0x0800ab1c
-
-080009a8 <_ZN3ros4TimeC1Ev>:
-class Time
-{
-public:
- uint32_t sec, nsec;
-
- Time() : sec(0), nsec(0) {}
- 80009a8: b480 push {r7}
- 80009aa: b083 sub sp, #12
- 80009ac: af00 add r7, sp, #0
- 80009ae: 6078 str r0, [r7, #4]
- 80009b0: 687b ldr r3, [r7, #4]
- 80009b2: 2200 movs r2, #0
- 80009b4: 601a str r2, [r3, #0]
- 80009b6: 687b ldr r3, [r7, #4]
- 80009b8: 2200 movs r2, #0
- 80009ba: 605a str r2, [r3, #4]
- 80009bc: 687b ldr r3, [r7, #4]
- 80009be: 4618 mov r0, r3
- 80009c0: 370c adds r7, #12
- 80009c2: 46bd mov sp, r7
- 80009c4: f85d 7b04 ldr.w r7, [sp], #4
- 80009c8: 4770 bx lr
- ...
-
-080009cc <_ZN8std_msgs4TimeC1Ev>:
- {
- public:
- typedef ros::Time _data_type;
- _data_type data;
-
- Time():
- 80009cc: b580 push {r7, lr}
- 80009ce: b082 sub sp, #8
- 80009d0: af00 add r7, sp, #0
- 80009d2: 6078 str r0, [r7, #4]
- data()
- 80009d4: 687b ldr r3, [r7, #4]
- 80009d6: 4618 mov r0, r3
- 80009d8: f7ff ff3a bl 8000850 <_ZN3ros3MsgC1Ev>
- 80009dc: 4a06 ldr r2, [pc, #24] ; (80009f8 <_ZN8std_msgs4TimeC1Ev+0x2c>)
- 80009de: 687b ldr r3, [r7, #4]
- 80009e0: 601a str r2, [r3, #0]
- 80009e2: 687b ldr r3, [r7, #4]
- 80009e4: 3304 adds r3, #4
- 80009e6: 4618 mov r0, r3
- 80009e8: f7ff ffde bl 80009a8 <_ZN3ros4TimeC1Ev>
- {
- }
- 80009ec: 687b ldr r3, [r7, #4]
- 80009ee: 4618 mov r0, r3
- 80009f0: 3708 adds r7, #8
- 80009f2: 46bd mov sp, r7
- 80009f4: bd80 pop {r7, pc}
- 80009f6: bf00 nop
- 80009f8: 0800b11c .word 0x0800b11c
-
-080009fc <_ZNK8std_msgs4Time9serializeEPh>:
-
- virtual int serialize(unsigned char *outbuffer) const
- 80009fc: b480 push {r7}
- 80009fe: b085 sub sp, #20
- 8000a00: af00 add r7, sp, #0
- 8000a02: 6078 str r0, [r7, #4]
- 8000a04: 6039 str r1, [r7, #0]
- {
- int offset = 0;
- 8000a06: 2300 movs r3, #0
- 8000a08: 60fb str r3, [r7, #12]
- *(outbuffer + offset + 0) = (this->data.sec >> (8 * 0)) & 0xFF;
- 8000a0a: 687b ldr r3, [r7, #4]
- 8000a0c: 6859 ldr r1, [r3, #4]
- 8000a0e: 68fb ldr r3, [r7, #12]
- 8000a10: 683a ldr r2, [r7, #0]
- 8000a12: 4413 add r3, r2
- 8000a14: b2ca uxtb r2, r1
- 8000a16: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 1) = (this->data.sec >> (8 * 1)) & 0xFF;
- 8000a18: 687b ldr r3, [r7, #4]
- 8000a1a: 685b ldr r3, [r3, #4]
- 8000a1c: 0a19 lsrs r1, r3, #8
- 8000a1e: 68fb ldr r3, [r7, #12]
- 8000a20: 3301 adds r3, #1
- 8000a22: 683a ldr r2, [r7, #0]
- 8000a24: 4413 add r3, r2
- 8000a26: b2ca uxtb r2, r1
- 8000a28: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 2) = (this->data.sec >> (8 * 2)) & 0xFF;
- 8000a2a: 687b ldr r3, [r7, #4]
- 8000a2c: 685b ldr r3, [r3, #4]
- 8000a2e: 0c19 lsrs r1, r3, #16
- 8000a30: 68fb ldr r3, [r7, #12]
- 8000a32: 3302 adds r3, #2
- 8000a34: 683a ldr r2, [r7, #0]
- 8000a36: 4413 add r3, r2
- 8000a38: b2ca uxtb r2, r1
- 8000a3a: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 3) = (this->data.sec >> (8 * 3)) & 0xFF;
- 8000a3c: 687b ldr r3, [r7, #4]
- 8000a3e: 685b ldr r3, [r3, #4]
- 8000a40: 0e19 lsrs r1, r3, #24
- 8000a42: 68fb ldr r3, [r7, #12]
- 8000a44: 3303 adds r3, #3
- 8000a46: 683a ldr r2, [r7, #0]
- 8000a48: 4413 add r3, r2
- 8000a4a: b2ca uxtb r2, r1
- 8000a4c: 701a strb r2, [r3, #0]
- offset += sizeof(this->data.sec);
- 8000a4e: 68fb ldr r3, [r7, #12]
- 8000a50: 3304 adds r3, #4
- 8000a52: 60fb str r3, [r7, #12]
- *(outbuffer + offset + 0) = (this->data.nsec >> (8 * 0)) & 0xFF;
- 8000a54: 687b ldr r3, [r7, #4]
- 8000a56: 6899 ldr r1, [r3, #8]
- 8000a58: 68fb ldr r3, [r7, #12]
- 8000a5a: 683a ldr r2, [r7, #0]
- 8000a5c: 4413 add r3, r2
- 8000a5e: b2ca uxtb r2, r1
- 8000a60: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 1) = (this->data.nsec >> (8 * 1)) & 0xFF;
- 8000a62: 687b ldr r3, [r7, #4]
- 8000a64: 689b ldr r3, [r3, #8]
- 8000a66: 0a19 lsrs r1, r3, #8
- 8000a68: 68fb ldr r3, [r7, #12]
- 8000a6a: 3301 adds r3, #1
- 8000a6c: 683a ldr r2, [r7, #0]
- 8000a6e: 4413 add r3, r2
- 8000a70: b2ca uxtb r2, r1
- 8000a72: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 2) = (this->data.nsec >> (8 * 2)) & 0xFF;
- 8000a74: 687b ldr r3, [r7, #4]
- 8000a76: 689b ldr r3, [r3, #8]
- 8000a78: 0c19 lsrs r1, r3, #16
- 8000a7a: 68fb ldr r3, [r7, #12]
- 8000a7c: 3302 adds r3, #2
- 8000a7e: 683a ldr r2, [r7, #0]
- 8000a80: 4413 add r3, r2
- 8000a82: b2ca uxtb r2, r1
- 8000a84: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 3) = (this->data.nsec >> (8 * 3)) & 0xFF;
- 8000a86: 687b ldr r3, [r7, #4]
- 8000a88: 689b ldr r3, [r3, #8]
- 8000a8a: 0e19 lsrs r1, r3, #24
- 8000a8c: 68fb ldr r3, [r7, #12]
- 8000a8e: 3303 adds r3, #3
- 8000a90: 683a ldr r2, [r7, #0]
- 8000a92: 4413 add r3, r2
- 8000a94: b2ca uxtb r2, r1
- 8000a96: 701a strb r2, [r3, #0]
- offset += sizeof(this->data.nsec);
- 8000a98: 68fb ldr r3, [r7, #12]
- 8000a9a: 3304 adds r3, #4
- 8000a9c: 60fb str r3, [r7, #12]
- return offset;
- 8000a9e: 68fb ldr r3, [r7, #12]
- }
- 8000aa0: 4618 mov r0, r3
- 8000aa2: 3714 adds r7, #20
- 8000aa4: 46bd mov sp, r7
- 8000aa6: f85d 7b04 ldr.w r7, [sp], #4
- 8000aaa: 4770 bx lr
-
-08000aac <_ZN8std_msgs4Time11deserializeEPh>:
-
- virtual int deserialize(unsigned char *inbuffer)
- 8000aac: b480 push {r7}
- 8000aae: b085 sub sp, #20
- 8000ab0: af00 add r7, sp, #0
- 8000ab2: 6078 str r0, [r7, #4]
- 8000ab4: 6039 str r1, [r7, #0]
- {
- int offset = 0;
- 8000ab6: 2300 movs r3, #0
- 8000ab8: 60fb str r3, [r7, #12]
- this->data.sec = ((uint32_t) (*(inbuffer + offset)));
- 8000aba: 68fb ldr r3, [r7, #12]
- 8000abc: 683a ldr r2, [r7, #0]
- 8000abe: 4413 add r3, r2
- 8000ac0: 781b ldrb r3, [r3, #0]
- 8000ac2: 461a mov r2, r3
- 8000ac4: 687b ldr r3, [r7, #4]
- 8000ac6: 605a str r2, [r3, #4]
- this->data.sec |= ((uint32_t) (*(inbuffer + offset + 1))) << (8 * 1);
- 8000ac8: 687b ldr r3, [r7, #4]
- 8000aca: 685a ldr r2, [r3, #4]
- 8000acc: 68fb ldr r3, [r7, #12]
- 8000ace: 3301 adds r3, #1
- 8000ad0: 6839 ldr r1, [r7, #0]
- 8000ad2: 440b add r3, r1
- 8000ad4: 781b ldrb r3, [r3, #0]
- 8000ad6: 021b lsls r3, r3, #8
- 8000ad8: 431a orrs r2, r3
- 8000ada: 687b ldr r3, [r7, #4]
- 8000adc: 605a str r2, [r3, #4]
- this->data.sec |= ((uint32_t) (*(inbuffer + offset + 2))) << (8 * 2);
- 8000ade: 687b ldr r3, [r7, #4]
- 8000ae0: 685a ldr r2, [r3, #4]
- 8000ae2: 68fb ldr r3, [r7, #12]
- 8000ae4: 3302 adds r3, #2
- 8000ae6: 6839 ldr r1, [r7, #0]
- 8000ae8: 440b add r3, r1
- 8000aea: 781b ldrb r3, [r3, #0]
- 8000aec: 041b lsls r3, r3, #16
- 8000aee: 431a orrs r2, r3
- 8000af0: 687b ldr r3, [r7, #4]
- 8000af2: 605a str r2, [r3, #4]
- this->data.sec |= ((uint32_t) (*(inbuffer + offset + 3))) << (8 * 3);
- 8000af4: 687b ldr r3, [r7, #4]
- 8000af6: 685a ldr r2, [r3, #4]
- 8000af8: 68fb ldr r3, [r7, #12]
- 8000afa: 3303 adds r3, #3
- 8000afc: 6839 ldr r1, [r7, #0]
- 8000afe: 440b add r3, r1
- 8000b00: 781b ldrb r3, [r3, #0]
- 8000b02: 061b lsls r3, r3, #24
- 8000b04: 431a orrs r2, r3
- 8000b06: 687b ldr r3, [r7, #4]
- 8000b08: 605a str r2, [r3, #4]
- offset += sizeof(this->data.sec);
- 8000b0a: 68fb ldr r3, [r7, #12]
- 8000b0c: 3304 adds r3, #4
- 8000b0e: 60fb str r3, [r7, #12]
- this->data.nsec = ((uint32_t) (*(inbuffer + offset)));
- 8000b10: 68fb ldr r3, [r7, #12]
- 8000b12: 683a ldr r2, [r7, #0]
- 8000b14: 4413 add r3, r2
- 8000b16: 781b ldrb r3, [r3, #0]
- 8000b18: 461a mov r2, r3
- 8000b1a: 687b ldr r3, [r7, #4]
- 8000b1c: 609a str r2, [r3, #8]
- this->data.nsec |= ((uint32_t) (*(inbuffer + offset + 1))) << (8 * 1);
- 8000b1e: 687b ldr r3, [r7, #4]
- 8000b20: 689a ldr r2, [r3, #8]
- 8000b22: 68fb ldr r3, [r7, #12]
- 8000b24: 3301 adds r3, #1
- 8000b26: 6839 ldr r1, [r7, #0]
- 8000b28: 440b add r3, r1
- 8000b2a: 781b ldrb r3, [r3, #0]
- 8000b2c: 021b lsls r3, r3, #8
- 8000b2e: 431a orrs r2, r3
- 8000b30: 687b ldr r3, [r7, #4]
- 8000b32: 609a str r2, [r3, #8]
- this->data.nsec |= ((uint32_t) (*(inbuffer + offset + 2))) << (8 * 2);
- 8000b34: 687b ldr r3, [r7, #4]
- 8000b36: 689a ldr r2, [r3, #8]
- 8000b38: 68fb ldr r3, [r7, #12]
- 8000b3a: 3302 adds r3, #2
- 8000b3c: 6839 ldr r1, [r7, #0]
- 8000b3e: 440b add r3, r1
- 8000b40: 781b ldrb r3, [r3, #0]
- 8000b42: 041b lsls r3, r3, #16
- 8000b44: 431a orrs r2, r3
- 8000b46: 687b ldr r3, [r7, #4]
- 8000b48: 609a str r2, [r3, #8]
- this->data.nsec |= ((uint32_t) (*(inbuffer + offset + 3))) << (8 * 3);
- 8000b4a: 687b ldr r3, [r7, #4]
- 8000b4c: 689a ldr r2, [r3, #8]
- 8000b4e: 68fb ldr r3, [r7, #12]
- 8000b50: 3303 adds r3, #3
- 8000b52: 6839 ldr r1, [r7, #0]
- 8000b54: 440b add r3, r1
- 8000b56: 781b ldrb r3, [r3, #0]
- 8000b58: 061b lsls r3, r3, #24
- 8000b5a: 431a orrs r2, r3
- 8000b5c: 687b ldr r3, [r7, #4]
- 8000b5e: 609a str r2, [r3, #8]
- offset += sizeof(this->data.nsec);
- 8000b60: 68fb ldr r3, [r7, #12]
- 8000b62: 3304 adds r3, #4
- 8000b64: 60fb str r3, [r7, #12]
- return offset;
- 8000b66: 68fb ldr r3, [r7, #12]
- }
- 8000b68: 4618 mov r0, r3
- 8000b6a: 3714 adds r7, #20
- 8000b6c: 46bd mov sp, r7
- 8000b6e: f85d 7b04 ldr.w r7, [sp], #4
- 8000b72: 4770 bx lr
-
-08000b74 <_ZN8std_msgs4Time7getTypeEv>:
-
- const char * getType(){ return "std_msgs/Time"; };
- 8000b74: b480 push {r7}
- 8000b76: b083 sub sp, #12
- 8000b78: af00 add r7, sp, #0
- 8000b7a: 6078 str r0, [r7, #4]
- 8000b7c: 4b03 ldr r3, [pc, #12] ; (8000b8c <_ZN8std_msgs4Time7getTypeEv+0x18>)
- 8000b7e: 4618 mov r0, r3
- 8000b80: 370c adds r7, #12
- 8000b82: 46bd mov sp, r7
- 8000b84: f85d 7b04 ldr.w r7, [sp], #4
- 8000b88: 4770 bx lr
- 8000b8a: bf00 nop
- 8000b8c: 0800ab40 .word 0x0800ab40
-
-08000b90 <_ZN8std_msgs4Time6getMD5Ev>:
- const char * getMD5(){ return "cd7166c74c552c311fbcc2fe5a7bc289"; };
- 8000b90: b480 push {r7}
- 8000b92: b083 sub sp, #12
- 8000b94: af00 add r7, sp, #0
- 8000b96: 6078 str r0, [r7, #4]
- 8000b98: 4b03 ldr r3, [pc, #12] ; (8000ba8 <_ZN8std_msgs4Time6getMD5Ev+0x18>)
- 8000b9a: 4618 mov r0, r3
- 8000b9c: 370c adds r7, #12
- 8000b9e: 46bd mov sp, r7
- 8000ba0: f85d 7b04 ldr.w r7, [sp], #4
- 8000ba4: 4770 bx lr
- 8000ba6: bf00 nop
- 8000ba8: 0800ab50 .word 0x0800ab50
-
-08000bac <_ZN14rosserial_msgs9TopicInfoC1Ev>:
- enum { ID_PARAMETER_REQUEST = 6 };
- enum { ID_LOG = 7 };
- enum { ID_TIME = 10 };
- enum { ID_TX_STOP = 11 };
-
- TopicInfo():
- 8000bac: b580 push {r7, lr}
- 8000bae: b082 sub sp, #8
- 8000bb0: af00 add r7, sp, #0
- 8000bb2: 6078 str r0, [r7, #4]
- topic_id(0),
- topic_name(""),
- message_type(""),
- md5sum(""),
- buffer_size(0)
- 8000bb4: 687b ldr r3, [r7, #4]
- 8000bb6: 4618 mov r0, r3
- 8000bb8: f7ff fe4a bl 8000850 <_ZN3ros3MsgC1Ev>
- 8000bbc: 4a0b ldr r2, [pc, #44] ; (8000bec <_ZN14rosserial_msgs9TopicInfoC1Ev+0x40>)
- 8000bbe: 687b ldr r3, [r7, #4]
- 8000bc0: 601a str r2, [r3, #0]
- 8000bc2: 687b ldr r3, [r7, #4]
- 8000bc4: 2200 movs r2, #0
- 8000bc6: 809a strh r2, [r3, #4]
- 8000bc8: 687b ldr r3, [r7, #4]
- 8000bca: 4a09 ldr r2, [pc, #36] ; (8000bf0 <_ZN14rosserial_msgs9TopicInfoC1Ev+0x44>)
- 8000bcc: 609a str r2, [r3, #8]
- 8000bce: 687b ldr r3, [r7, #4]
- 8000bd0: 4a07 ldr r2, [pc, #28] ; (8000bf0 <_ZN14rosserial_msgs9TopicInfoC1Ev+0x44>)
- 8000bd2: 60da str r2, [r3, #12]
- 8000bd4: 687b ldr r3, [r7, #4]
- 8000bd6: 4a06 ldr r2, [pc, #24] ; (8000bf0 <_ZN14rosserial_msgs9TopicInfoC1Ev+0x44>)
- 8000bd8: 611a str r2, [r3, #16]
- 8000bda: 687b ldr r3, [r7, #4]
- 8000bdc: 2200 movs r2, #0
- 8000bde: 615a str r2, [r3, #20]
- {
- }
- 8000be0: 687b ldr r3, [r7, #4]
- 8000be2: 4618 mov r0, r3
- 8000be4: 3708 adds r7, #8
- 8000be6: 46bd mov sp, r7
- 8000be8: bd80 pop {r7, pc}
- 8000bea: bf00 nop
- 8000bec: 0800b104 .word 0x0800b104
- 8000bf0: 0800ab08 .word 0x0800ab08
-
-08000bf4 <_ZNK14rosserial_msgs9TopicInfo9serializeEPh>:
-
- virtual int serialize(unsigned char *outbuffer) const
- 8000bf4: b580 push {r7, lr}
- 8000bf6: b088 sub sp, #32
- 8000bf8: af00 add r7, sp, #0
- 8000bfa: 6078 str r0, [r7, #4]
- 8000bfc: 6039 str r1, [r7, #0]
- {
- int offset = 0;
- 8000bfe: 2300 movs r3, #0
- 8000c00: 61fb str r3, [r7, #28]
- *(outbuffer + offset + 0) = (this->topic_id >> (8 * 0)) & 0xFF;
- 8000c02: 687b ldr r3, [r7, #4]
- 8000c04: 8899 ldrh r1, [r3, #4]
- 8000c06: 69fb ldr r3, [r7, #28]
- 8000c08: 683a ldr r2, [r7, #0]
- 8000c0a: 4413 add r3, r2
- 8000c0c: b2ca uxtb r2, r1
- 8000c0e: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 1) = (this->topic_id >> (8 * 1)) & 0xFF;
- 8000c10: 687b ldr r3, [r7, #4]
- 8000c12: 889b ldrh r3, [r3, #4]
- 8000c14: 0a1b lsrs r3, r3, #8
- 8000c16: b299 uxth r1, r3
- 8000c18: 69fb ldr r3, [r7, #28]
- 8000c1a: 3301 adds r3, #1
- 8000c1c: 683a ldr r2, [r7, #0]
- 8000c1e: 4413 add r3, r2
- 8000c20: b2ca uxtb r2, r1
- 8000c22: 701a strb r2, [r3, #0]
- offset += sizeof(this->topic_id);
- 8000c24: 69fb ldr r3, [r7, #28]
- 8000c26: 3302 adds r3, #2
- 8000c28: 61fb str r3, [r7, #28]
- uint32_t length_topic_name = strlen(this->topic_name);
- 8000c2a: 687b ldr r3, [r7, #4]
- 8000c2c: 689b ldr r3, [r3, #8]
- 8000c2e: 4618 mov r0, r3
- 8000c30: f7ff fb02 bl 8000238 <strlen>
- 8000c34: 61b8 str r0, [r7, #24]
- varToArr(outbuffer + offset, length_topic_name);
- 8000c36: 69fb ldr r3, [r7, #28]
- 8000c38: 683a ldr r2, [r7, #0]
- 8000c3a: 4413 add r3, r2
- 8000c3c: 69b9 ldr r1, [r7, #24]
- 8000c3e: 4618 mov r0, r3
- 8000c40: f002 ffb5 bl 8003bae <_ZN3ros3Msg8varToArrIPhmEEvT_T0_>
- offset += 4;
- 8000c44: 69fb ldr r3, [r7, #28]
- 8000c46: 3304 adds r3, #4
- 8000c48: 61fb str r3, [r7, #28]
- memcpy(outbuffer + offset, this->topic_name, length_topic_name);
- 8000c4a: 69fb ldr r3, [r7, #28]
- 8000c4c: 683a ldr r2, [r7, #0]
- 8000c4e: 18d0 adds r0, r2, r3
- 8000c50: 687b ldr r3, [r7, #4]
- 8000c52: 689b ldr r3, [r3, #8]
- 8000c54: 69ba ldr r2, [r7, #24]
- 8000c56: 4619 mov r1, r3
- 8000c58: f009 fe02 bl 800a860 <memcpy>
- offset += length_topic_name;
- 8000c5c: 69fa ldr r2, [r7, #28]
- 8000c5e: 69bb ldr r3, [r7, #24]
- 8000c60: 4413 add r3, r2
- 8000c62: 61fb str r3, [r7, #28]
- uint32_t length_message_type = strlen(this->message_type);
- 8000c64: 687b ldr r3, [r7, #4]
- 8000c66: 68db ldr r3, [r3, #12]
- 8000c68: 4618 mov r0, r3
- 8000c6a: f7ff fae5 bl 8000238 <strlen>
- 8000c6e: 6178 str r0, [r7, #20]
- varToArr(outbuffer + offset, length_message_type);
- 8000c70: 69fb ldr r3, [r7, #28]
- 8000c72: 683a ldr r2, [r7, #0]
- 8000c74: 4413 add r3, r2
- 8000c76: 6979 ldr r1, [r7, #20]
- 8000c78: 4618 mov r0, r3
- 8000c7a: f002 ff98 bl 8003bae <_ZN3ros3Msg8varToArrIPhmEEvT_T0_>
- offset += 4;
- 8000c7e: 69fb ldr r3, [r7, #28]
- 8000c80: 3304 adds r3, #4
- 8000c82: 61fb str r3, [r7, #28]
- memcpy(outbuffer + offset, this->message_type, length_message_type);
- 8000c84: 69fb ldr r3, [r7, #28]
- 8000c86: 683a ldr r2, [r7, #0]
- 8000c88: 18d0 adds r0, r2, r3
- 8000c8a: 687b ldr r3, [r7, #4]
- 8000c8c: 68db ldr r3, [r3, #12]
- 8000c8e: 697a ldr r2, [r7, #20]
- 8000c90: 4619 mov r1, r3
- 8000c92: f009 fde5 bl 800a860 <memcpy>
- offset += length_message_type;
- 8000c96: 69fa ldr r2, [r7, #28]
- 8000c98: 697b ldr r3, [r7, #20]
- 8000c9a: 4413 add r3, r2
- 8000c9c: 61fb str r3, [r7, #28]
- uint32_t length_md5sum = strlen(this->md5sum);
- 8000c9e: 687b ldr r3, [r7, #4]
- 8000ca0: 691b ldr r3, [r3, #16]
- 8000ca2: 4618 mov r0, r3
- 8000ca4: f7ff fac8 bl 8000238 <strlen>
- 8000ca8: 6138 str r0, [r7, #16]
- varToArr(outbuffer + offset, length_md5sum);
- 8000caa: 69fb ldr r3, [r7, #28]
- 8000cac: 683a ldr r2, [r7, #0]
- 8000cae: 4413 add r3, r2
- 8000cb0: 6939 ldr r1, [r7, #16]
- 8000cb2: 4618 mov r0, r3
- 8000cb4: f002 ff7b bl 8003bae <_ZN3ros3Msg8varToArrIPhmEEvT_T0_>
- offset += 4;
- 8000cb8: 69fb ldr r3, [r7, #28]
- 8000cba: 3304 adds r3, #4
- 8000cbc: 61fb str r3, [r7, #28]
- memcpy(outbuffer + offset, this->md5sum, length_md5sum);
- 8000cbe: 69fb ldr r3, [r7, #28]
- 8000cc0: 683a ldr r2, [r7, #0]
- 8000cc2: 18d0 adds r0, r2, r3
- 8000cc4: 687b ldr r3, [r7, #4]
- 8000cc6: 691b ldr r3, [r3, #16]
- 8000cc8: 693a ldr r2, [r7, #16]
- 8000cca: 4619 mov r1, r3
- 8000ccc: f009 fdc8 bl 800a860 <memcpy>
- offset += length_md5sum;
- 8000cd0: 69fa ldr r2, [r7, #28]
- 8000cd2: 693b ldr r3, [r7, #16]
- 8000cd4: 4413 add r3, r2
- 8000cd6: 61fb str r3, [r7, #28]
- union {
- int32_t real;
- uint32_t base;
- } u_buffer_size;
- u_buffer_size.real = this->buffer_size;
- 8000cd8: 687b ldr r3, [r7, #4]
- 8000cda: 695b ldr r3, [r3, #20]
- 8000cdc: 60fb str r3, [r7, #12]
- *(outbuffer + offset + 0) = (u_buffer_size.base >> (8 * 0)) & 0xFF;
- 8000cde: 68f9 ldr r1, [r7, #12]
- 8000ce0: 69fb ldr r3, [r7, #28]
- 8000ce2: 683a ldr r2, [r7, #0]
- 8000ce4: 4413 add r3, r2
- 8000ce6: b2ca uxtb r2, r1
- 8000ce8: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 1) = (u_buffer_size.base >> (8 * 1)) & 0xFF;
- 8000cea: 68fb ldr r3, [r7, #12]
- 8000cec: 0a19 lsrs r1, r3, #8
- 8000cee: 69fb ldr r3, [r7, #28]
- 8000cf0: 3301 adds r3, #1
- 8000cf2: 683a ldr r2, [r7, #0]
- 8000cf4: 4413 add r3, r2
- 8000cf6: b2ca uxtb r2, r1
- 8000cf8: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 2) = (u_buffer_size.base >> (8 * 2)) & 0xFF;
- 8000cfa: 68fb ldr r3, [r7, #12]
- 8000cfc: 0c19 lsrs r1, r3, #16
- 8000cfe: 69fb ldr r3, [r7, #28]
- 8000d00: 3302 adds r3, #2
- 8000d02: 683a ldr r2, [r7, #0]
- 8000d04: 4413 add r3, r2
- 8000d06: b2ca uxtb r2, r1
- 8000d08: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 3) = (u_buffer_size.base >> (8 * 3)) & 0xFF;
- 8000d0a: 68fb ldr r3, [r7, #12]
- 8000d0c: 0e19 lsrs r1, r3, #24
- 8000d0e: 69fb ldr r3, [r7, #28]
- 8000d10: 3303 adds r3, #3
- 8000d12: 683a ldr r2, [r7, #0]
- 8000d14: 4413 add r3, r2
- 8000d16: b2ca uxtb r2, r1
- 8000d18: 701a strb r2, [r3, #0]
- offset += sizeof(this->buffer_size);
- 8000d1a: 69fb ldr r3, [r7, #28]
- 8000d1c: 3304 adds r3, #4
- 8000d1e: 61fb str r3, [r7, #28]
- return offset;
- 8000d20: 69fb ldr r3, [r7, #28]
- }
- 8000d22: 4618 mov r0, r3
- 8000d24: 3720 adds r7, #32
- 8000d26: 46bd mov sp, r7
- 8000d28: bd80 pop {r7, pc}
-
-08000d2a <_ZN14rosserial_msgs9TopicInfo11deserializeEPh>:
-
- virtual int deserialize(unsigned char *inbuffer)
- 8000d2a: b580 push {r7, lr}
- 8000d2c: b08a sub sp, #40 ; 0x28
- 8000d2e: af00 add r7, sp, #0
- 8000d30: 6078 str r0, [r7, #4]
- 8000d32: 6039 str r1, [r7, #0]
- {
- int offset = 0;
- 8000d34: 2300 movs r3, #0
- 8000d36: 61bb str r3, [r7, #24]
- this->topic_id = ((uint16_t) (*(inbuffer + offset)));
- 8000d38: 69bb ldr r3, [r7, #24]
- 8000d3a: 683a ldr r2, [r7, #0]
- 8000d3c: 4413 add r3, r2
- 8000d3e: 781b ldrb r3, [r3, #0]
- 8000d40: b29a uxth r2, r3
- 8000d42: 687b ldr r3, [r7, #4]
- 8000d44: 809a strh r2, [r3, #4]
- this->topic_id |= ((uint16_t) (*(inbuffer + offset + 1))) << (8 * 1);
- 8000d46: 687b ldr r3, [r7, #4]
- 8000d48: 889b ldrh r3, [r3, #4]
- 8000d4a: b21a sxth r2, r3
- 8000d4c: 69bb ldr r3, [r7, #24]
- 8000d4e: 3301 adds r3, #1
- 8000d50: 6839 ldr r1, [r7, #0]
- 8000d52: 440b add r3, r1
- 8000d54: 781b ldrb r3, [r3, #0]
- 8000d56: 021b lsls r3, r3, #8
- 8000d58: b21b sxth r3, r3
- 8000d5a: 4313 orrs r3, r2
- 8000d5c: b21b sxth r3, r3
- 8000d5e: b29a uxth r2, r3
- 8000d60: 687b ldr r3, [r7, #4]
- 8000d62: 809a strh r2, [r3, #4]
- offset += sizeof(this->topic_id);
- 8000d64: 69bb ldr r3, [r7, #24]
- 8000d66: 3302 adds r3, #2
- 8000d68: 61bb str r3, [r7, #24]
- uint32_t length_topic_name;
- arrToVar(length_topic_name, (inbuffer + offset));
- 8000d6a: 69bb ldr r3, [r7, #24]
- 8000d6c: 683a ldr r2, [r7, #0]
- 8000d6e: 441a add r2, r3
- 8000d70: f107 0314 add.w r3, r7, #20
- 8000d74: 4611 mov r1, r2
- 8000d76: 4618 mov r0, r3
- 8000d78: f002 ff37 bl 8003bea <_ZN3ros3Msg8arrToVarImPhEEvRT_T0_>
- offset += 4;
- 8000d7c: 69bb ldr r3, [r7, #24]
- 8000d7e: 3304 adds r3, #4
- 8000d80: 61bb str r3, [r7, #24]
- for(unsigned int k= offset; k< offset+length_topic_name; ++k){
- 8000d82: 69bb ldr r3, [r7, #24]
- 8000d84: 627b str r3, [r7, #36] ; 0x24
- 8000d86: 69ba ldr r2, [r7, #24]
- 8000d88: 697b ldr r3, [r7, #20]
- 8000d8a: 4413 add r3, r2
- 8000d8c: 6a7a ldr r2, [r7, #36] ; 0x24
- 8000d8e: 429a cmp r2, r3
- 8000d90: d20c bcs.n 8000dac <_ZN14rosserial_msgs9TopicInfo11deserializeEPh+0x82>
- inbuffer[k-1]=inbuffer[k];
- 8000d92: 683a ldr r2, [r7, #0]
- 8000d94: 6a7b ldr r3, [r7, #36] ; 0x24
- 8000d96: 441a add r2, r3
- 8000d98: 6a7b ldr r3, [r7, #36] ; 0x24
- 8000d9a: 3b01 subs r3, #1
- 8000d9c: 6839 ldr r1, [r7, #0]
- 8000d9e: 440b add r3, r1
- 8000da0: 7812 ldrb r2, [r2, #0]
- 8000da2: 701a strb r2, [r3, #0]
- for(unsigned int k= offset; k< offset+length_topic_name; ++k){
- 8000da4: 6a7b ldr r3, [r7, #36] ; 0x24
- 8000da6: 3301 adds r3, #1
- 8000da8: 627b str r3, [r7, #36] ; 0x24
- 8000daa: e7ec b.n 8000d86 <_ZN14rosserial_msgs9TopicInfo11deserializeEPh+0x5c>
- }
- inbuffer[offset+length_topic_name-1]=0;
- 8000dac: 69ba ldr r2, [r7, #24]
- 8000dae: 697b ldr r3, [r7, #20]
- 8000db0: 4413 add r3, r2
- 8000db2: 3b01 subs r3, #1
- 8000db4: 683a ldr r2, [r7, #0]
- 8000db6: 4413 add r3, r2
- 8000db8: 2200 movs r2, #0
- 8000dba: 701a strb r2, [r3, #0]
- this->topic_name = (char *)(inbuffer + offset-1);
- 8000dbc: 69bb ldr r3, [r7, #24]
- 8000dbe: 3b01 subs r3, #1
- 8000dc0: 683a ldr r2, [r7, #0]
- 8000dc2: 441a add r2, r3
- 8000dc4: 687b ldr r3, [r7, #4]
- 8000dc6: 609a str r2, [r3, #8]
- offset += length_topic_name;
- 8000dc8: 69ba ldr r2, [r7, #24]
- 8000dca: 697b ldr r3, [r7, #20]
- 8000dcc: 4413 add r3, r2
- 8000dce: 61bb str r3, [r7, #24]
- uint32_t length_message_type;
- arrToVar(length_message_type, (inbuffer + offset));
- 8000dd0: 69bb ldr r3, [r7, #24]
- 8000dd2: 683a ldr r2, [r7, #0]
- 8000dd4: 441a add r2, r3
- 8000dd6: f107 0310 add.w r3, r7, #16
- 8000dda: 4611 mov r1, r2
- 8000ddc: 4618 mov r0, r3
- 8000dde: f002 ff04 bl 8003bea <_ZN3ros3Msg8arrToVarImPhEEvRT_T0_>
- offset += 4;
- 8000de2: 69bb ldr r3, [r7, #24]
- 8000de4: 3304 adds r3, #4
- 8000de6: 61bb str r3, [r7, #24]
- for(unsigned int k= offset; k< offset+length_message_type; ++k){
- 8000de8: 69bb ldr r3, [r7, #24]
- 8000dea: 623b str r3, [r7, #32]
- 8000dec: 69ba ldr r2, [r7, #24]
- 8000dee: 693b ldr r3, [r7, #16]
- 8000df0: 4413 add r3, r2
- 8000df2: 6a3a ldr r2, [r7, #32]
- 8000df4: 429a cmp r2, r3
- 8000df6: d20c bcs.n 8000e12 <_ZN14rosserial_msgs9TopicInfo11deserializeEPh+0xe8>
- inbuffer[k-1]=inbuffer[k];
- 8000df8: 683a ldr r2, [r7, #0]
- 8000dfa: 6a3b ldr r3, [r7, #32]
- 8000dfc: 441a add r2, r3
- 8000dfe: 6a3b ldr r3, [r7, #32]
- 8000e00: 3b01 subs r3, #1
- 8000e02: 6839 ldr r1, [r7, #0]
- 8000e04: 440b add r3, r1
- 8000e06: 7812 ldrb r2, [r2, #0]
- 8000e08: 701a strb r2, [r3, #0]
- for(unsigned int k= offset; k< offset+length_message_type; ++k){
- 8000e0a: 6a3b ldr r3, [r7, #32]
- 8000e0c: 3301 adds r3, #1
- 8000e0e: 623b str r3, [r7, #32]
- 8000e10: e7ec b.n 8000dec <_ZN14rosserial_msgs9TopicInfo11deserializeEPh+0xc2>
- }
- inbuffer[offset+length_message_type-1]=0;
- 8000e12: 69ba ldr r2, [r7, #24]
- 8000e14: 693b ldr r3, [r7, #16]
- 8000e16: 4413 add r3, r2
- 8000e18: 3b01 subs r3, #1
- 8000e1a: 683a ldr r2, [r7, #0]
- 8000e1c: 4413 add r3, r2
- 8000e1e: 2200 movs r2, #0
- 8000e20: 701a strb r2, [r3, #0]
- this->message_type = (char *)(inbuffer + offset-1);
- 8000e22: 69bb ldr r3, [r7, #24]
- 8000e24: 3b01 subs r3, #1
- 8000e26: 683a ldr r2, [r7, #0]
- 8000e28: 441a add r2, r3
- 8000e2a: 687b ldr r3, [r7, #4]
- 8000e2c: 60da str r2, [r3, #12]
- offset += length_message_type;
- 8000e2e: 69ba ldr r2, [r7, #24]
- 8000e30: 693b ldr r3, [r7, #16]
- 8000e32: 4413 add r3, r2
- 8000e34: 61bb str r3, [r7, #24]
- uint32_t length_md5sum;
- arrToVar(length_md5sum, (inbuffer + offset));
- 8000e36: 69bb ldr r3, [r7, #24]
- 8000e38: 683a ldr r2, [r7, #0]
- 8000e3a: 441a add r2, r3
- 8000e3c: f107 030c add.w r3, r7, #12
- 8000e40: 4611 mov r1, r2
- 8000e42: 4618 mov r0, r3
- 8000e44: f002 fed1 bl 8003bea <_ZN3ros3Msg8arrToVarImPhEEvRT_T0_>
- offset += 4;
- 8000e48: 69bb ldr r3, [r7, #24]
- 8000e4a: 3304 adds r3, #4
- 8000e4c: 61bb str r3, [r7, #24]
- for(unsigned int k= offset; k< offset+length_md5sum; ++k){
- 8000e4e: 69bb ldr r3, [r7, #24]
- 8000e50: 61fb str r3, [r7, #28]
- 8000e52: 69ba ldr r2, [r7, #24]
- 8000e54: 68fb ldr r3, [r7, #12]
- 8000e56: 4413 add r3, r2
- 8000e58: 69fa ldr r2, [r7, #28]
- 8000e5a: 429a cmp r2, r3
- 8000e5c: d20c bcs.n 8000e78 <_ZN14rosserial_msgs9TopicInfo11deserializeEPh+0x14e>
- inbuffer[k-1]=inbuffer[k];
- 8000e5e: 683a ldr r2, [r7, #0]
- 8000e60: 69fb ldr r3, [r7, #28]
- 8000e62: 441a add r2, r3
- 8000e64: 69fb ldr r3, [r7, #28]
- 8000e66: 3b01 subs r3, #1
- 8000e68: 6839 ldr r1, [r7, #0]
- 8000e6a: 440b add r3, r1
- 8000e6c: 7812 ldrb r2, [r2, #0]
- 8000e6e: 701a strb r2, [r3, #0]
- for(unsigned int k= offset; k< offset+length_md5sum; ++k){
- 8000e70: 69fb ldr r3, [r7, #28]
- 8000e72: 3301 adds r3, #1
- 8000e74: 61fb str r3, [r7, #28]
- 8000e76: e7ec b.n 8000e52 <_ZN14rosserial_msgs9TopicInfo11deserializeEPh+0x128>
- }
- inbuffer[offset+length_md5sum-1]=0;
- 8000e78: 69ba ldr r2, [r7, #24]
- 8000e7a: 68fb ldr r3, [r7, #12]
- 8000e7c: 4413 add r3, r2
- 8000e7e: 3b01 subs r3, #1
- 8000e80: 683a ldr r2, [r7, #0]
- 8000e82: 4413 add r3, r2
- 8000e84: 2200 movs r2, #0
- 8000e86: 701a strb r2, [r3, #0]
- this->md5sum = (char *)(inbuffer + offset-1);
- 8000e88: 69bb ldr r3, [r7, #24]
- 8000e8a: 3b01 subs r3, #1
- 8000e8c: 683a ldr r2, [r7, #0]
- 8000e8e: 441a add r2, r3
- 8000e90: 687b ldr r3, [r7, #4]
- 8000e92: 611a str r2, [r3, #16]
- offset += length_md5sum;
- 8000e94: 69ba ldr r2, [r7, #24]
- 8000e96: 68fb ldr r3, [r7, #12]
- 8000e98: 4413 add r3, r2
- 8000e9a: 61bb str r3, [r7, #24]
- union {
- int32_t real;
- uint32_t base;
- } u_buffer_size;
- u_buffer_size.base = 0;
- 8000e9c: 2300 movs r3, #0
- 8000e9e: 60bb str r3, [r7, #8]
- u_buffer_size.base |= ((uint32_t) (*(inbuffer + offset + 0))) << (8 * 0);
- 8000ea0: 68bb ldr r3, [r7, #8]
- 8000ea2: 69ba ldr r2, [r7, #24]
- 8000ea4: 6839 ldr r1, [r7, #0]
- 8000ea6: 440a add r2, r1
- 8000ea8: 7812 ldrb r2, [r2, #0]
- 8000eaa: 4313 orrs r3, r2
- 8000eac: 60bb str r3, [r7, #8]
- u_buffer_size.base |= ((uint32_t) (*(inbuffer + offset + 1))) << (8 * 1);
- 8000eae: 68ba ldr r2, [r7, #8]
- 8000eb0: 69bb ldr r3, [r7, #24]
- 8000eb2: 3301 adds r3, #1
- 8000eb4: 6839 ldr r1, [r7, #0]
- 8000eb6: 440b add r3, r1
- 8000eb8: 781b ldrb r3, [r3, #0]
- 8000eba: 021b lsls r3, r3, #8
- 8000ebc: 4313 orrs r3, r2
- 8000ebe: 60bb str r3, [r7, #8]
- u_buffer_size.base |= ((uint32_t) (*(inbuffer + offset + 2))) << (8 * 2);
- 8000ec0: 68ba ldr r2, [r7, #8]
- 8000ec2: 69bb ldr r3, [r7, #24]
- 8000ec4: 3302 adds r3, #2
- 8000ec6: 6839 ldr r1, [r7, #0]
- 8000ec8: 440b add r3, r1
- 8000eca: 781b ldrb r3, [r3, #0]
- 8000ecc: 041b lsls r3, r3, #16
- 8000ece: 4313 orrs r3, r2
- 8000ed0: 60bb str r3, [r7, #8]
- u_buffer_size.base |= ((uint32_t) (*(inbuffer + offset + 3))) << (8 * 3);
- 8000ed2: 68ba ldr r2, [r7, #8]
- 8000ed4: 69bb ldr r3, [r7, #24]
- 8000ed6: 3303 adds r3, #3
- 8000ed8: 6839 ldr r1, [r7, #0]
- 8000eda: 440b add r3, r1
- 8000edc: 781b ldrb r3, [r3, #0]
- 8000ede: 061b lsls r3, r3, #24
- 8000ee0: 4313 orrs r3, r2
- 8000ee2: 60bb str r3, [r7, #8]
- this->buffer_size = u_buffer_size.real;
- 8000ee4: 68ba ldr r2, [r7, #8]
- 8000ee6: 687b ldr r3, [r7, #4]
- 8000ee8: 615a str r2, [r3, #20]
- offset += sizeof(this->buffer_size);
- 8000eea: 69bb ldr r3, [r7, #24]
- 8000eec: 3304 adds r3, #4
- 8000eee: 61bb str r3, [r7, #24]
- return offset;
- 8000ef0: 69bb ldr r3, [r7, #24]
- }
- 8000ef2: 4618 mov r0, r3
- 8000ef4: 3728 adds r7, #40 ; 0x28
- 8000ef6: 46bd mov sp, r7
- 8000ef8: bd80 pop {r7, pc}
- ...
-
-08000efc <_ZN14rosserial_msgs9TopicInfo7getTypeEv>:
-
- const char * getType(){ return "rosserial_msgs/TopicInfo"; };
- 8000efc: b480 push {r7}
- 8000efe: b083 sub sp, #12
- 8000f00: af00 add r7, sp, #0
- 8000f02: 6078 str r0, [r7, #4]
- 8000f04: 4b03 ldr r3, [pc, #12] ; (8000f14 <_ZN14rosserial_msgs9TopicInfo7getTypeEv+0x18>)
- 8000f06: 4618 mov r0, r3
- 8000f08: 370c adds r7, #12
- 8000f0a: 46bd mov sp, r7
- 8000f0c: f85d 7b04 ldr.w r7, [sp], #4
- 8000f10: 4770 bx lr
- 8000f12: bf00 nop
- 8000f14: 0800ab74 .word 0x0800ab74
-
-08000f18 <_ZN14rosserial_msgs9TopicInfo6getMD5Ev>:
- const char * getMD5(){ return "0ad51f88fc44892f8c10684077646005"; };
- 8000f18: b480 push {r7}
- 8000f1a: b083 sub sp, #12
- 8000f1c: af00 add r7, sp, #0
- 8000f1e: 6078 str r0, [r7, #4]
- 8000f20: 4b03 ldr r3, [pc, #12] ; (8000f30 <_ZN14rosserial_msgs9TopicInfo6getMD5Ev+0x18>)
- 8000f22: 4618 mov r0, r3
- 8000f24: 370c adds r7, #12
- 8000f26: 46bd mov sp, r7
- 8000f28: f85d 7b04 ldr.w r7, [sp], #4
- 8000f2c: 4770 bx lr
- 8000f2e: bf00 nop
- 8000f30: 0800ab90 .word 0x0800ab90
-
-08000f34 <_ZN14rosserial_msgs3LogC1Ev>:
- enum { INFO = 1 };
- enum { WARN = 2 };
- enum { ERROR = 3 };
- enum { FATAL = 4 };
-
- Log():
- 8000f34: b580 push {r7, lr}
- 8000f36: b082 sub sp, #8
- 8000f38: af00 add r7, sp, #0
- 8000f3a: 6078 str r0, [r7, #4]
- level(0),
- msg("")
- 8000f3c: 687b ldr r3, [r7, #4]
- 8000f3e: 4618 mov r0, r3
- 8000f40: f7ff fc86 bl 8000850 <_ZN3ros3MsgC1Ev>
- 8000f44: 4a06 ldr r2, [pc, #24] ; (8000f60 <_ZN14rosserial_msgs3LogC1Ev+0x2c>)
- 8000f46: 687b ldr r3, [r7, #4]
- 8000f48: 601a str r2, [r3, #0]
- 8000f4a: 687b ldr r3, [r7, #4]
- 8000f4c: 2200 movs r2, #0
- 8000f4e: 711a strb r2, [r3, #4]
- 8000f50: 687b ldr r3, [r7, #4]
- 8000f52: 4a04 ldr r2, [pc, #16] ; (8000f64 <_ZN14rosserial_msgs3LogC1Ev+0x30>)
- 8000f54: 609a str r2, [r3, #8]
- {
- }
- 8000f56: 687b ldr r3, [r7, #4]
- 8000f58: 4618 mov r0, r3
- 8000f5a: 3708 adds r7, #8
- 8000f5c: 46bd mov sp, r7
- 8000f5e: bd80 pop {r7, pc}
- 8000f60: 0800b0ec .word 0x0800b0ec
- 8000f64: 0800ab08 .word 0x0800ab08
-
-08000f68 <_ZNK14rosserial_msgs3Log9serializeEPh>:
-
- virtual int serialize(unsigned char *outbuffer) const
- 8000f68: b580 push {r7, lr}
- 8000f6a: b084 sub sp, #16
- 8000f6c: af00 add r7, sp, #0
- 8000f6e: 6078 str r0, [r7, #4]
- 8000f70: 6039 str r1, [r7, #0]
- {
- int offset = 0;
- 8000f72: 2300 movs r3, #0
- 8000f74: 60fb str r3, [r7, #12]
- *(outbuffer + offset + 0) = (this->level >> (8 * 0)) & 0xFF;
- 8000f76: 68fb ldr r3, [r7, #12]
- 8000f78: 683a ldr r2, [r7, #0]
- 8000f7a: 4413 add r3, r2
- 8000f7c: 687a ldr r2, [r7, #4]
- 8000f7e: 7912 ldrb r2, [r2, #4]
- 8000f80: 701a strb r2, [r3, #0]
- offset += sizeof(this->level);
- 8000f82: 68fb ldr r3, [r7, #12]
- 8000f84: 3301 adds r3, #1
- 8000f86: 60fb str r3, [r7, #12]
- uint32_t length_msg = strlen(this->msg);
- 8000f88: 687b ldr r3, [r7, #4]
- 8000f8a: 689b ldr r3, [r3, #8]
- 8000f8c: 4618 mov r0, r3
- 8000f8e: f7ff f953 bl 8000238 <strlen>
- 8000f92: 60b8 str r0, [r7, #8]
- varToArr(outbuffer + offset, length_msg);
- 8000f94: 68fb ldr r3, [r7, #12]
- 8000f96: 683a ldr r2, [r7, #0]
- 8000f98: 4413 add r3, r2
- 8000f9a: 68b9 ldr r1, [r7, #8]
- 8000f9c: 4618 mov r0, r3
- 8000f9e: f002 fe06 bl 8003bae <_ZN3ros3Msg8varToArrIPhmEEvT_T0_>
- offset += 4;
- 8000fa2: 68fb ldr r3, [r7, #12]
- 8000fa4: 3304 adds r3, #4
- 8000fa6: 60fb str r3, [r7, #12]
- memcpy(outbuffer + offset, this->msg, length_msg);
- 8000fa8: 68fb ldr r3, [r7, #12]
- 8000faa: 683a ldr r2, [r7, #0]
- 8000fac: 18d0 adds r0, r2, r3
- 8000fae: 687b ldr r3, [r7, #4]
- 8000fb0: 689b ldr r3, [r3, #8]
- 8000fb2: 68ba ldr r2, [r7, #8]
- 8000fb4: 4619 mov r1, r3
- 8000fb6: f009 fc53 bl 800a860 <memcpy>
- offset += length_msg;
- 8000fba: 68fa ldr r2, [r7, #12]
- 8000fbc: 68bb ldr r3, [r7, #8]
- 8000fbe: 4413 add r3, r2
- 8000fc0: 60fb str r3, [r7, #12]
- return offset;
- 8000fc2: 68fb ldr r3, [r7, #12]
- }
- 8000fc4: 4618 mov r0, r3
- 8000fc6: 3710 adds r7, #16
- 8000fc8: 46bd mov sp, r7
- 8000fca: bd80 pop {r7, pc}
-
-08000fcc <_ZN14rosserial_msgs3Log11deserializeEPh>:
-
- virtual int deserialize(unsigned char *inbuffer)
- 8000fcc: b580 push {r7, lr}
- 8000fce: b086 sub sp, #24
- 8000fd0: af00 add r7, sp, #0
- 8000fd2: 6078 str r0, [r7, #4]
- 8000fd4: 6039 str r1, [r7, #0]
- {
- int offset = 0;
- 8000fd6: 2300 movs r3, #0
- 8000fd8: 613b str r3, [r7, #16]
- this->level = ((uint8_t) (*(inbuffer + offset)));
- 8000fda: 693b ldr r3, [r7, #16]
- 8000fdc: 683a ldr r2, [r7, #0]
- 8000fde: 4413 add r3, r2
- 8000fe0: 781a ldrb r2, [r3, #0]
- 8000fe2: 687b ldr r3, [r7, #4]
- 8000fe4: 711a strb r2, [r3, #4]
- offset += sizeof(this->level);
- 8000fe6: 693b ldr r3, [r7, #16]
- 8000fe8: 3301 adds r3, #1
- 8000fea: 613b str r3, [r7, #16]
- uint32_t length_msg;
- arrToVar(length_msg, (inbuffer + offset));
- 8000fec: 693b ldr r3, [r7, #16]
- 8000fee: 683a ldr r2, [r7, #0]
- 8000ff0: 441a add r2, r3
- 8000ff2: f107 030c add.w r3, r7, #12
- 8000ff6: 4611 mov r1, r2
- 8000ff8: 4618 mov r0, r3
- 8000ffa: f002 fdf6 bl 8003bea <_ZN3ros3Msg8arrToVarImPhEEvRT_T0_>
- offset += 4;
- 8000ffe: 693b ldr r3, [r7, #16]
- 8001000: 3304 adds r3, #4
- 8001002: 613b str r3, [r7, #16]
- for(unsigned int k= offset; k< offset+length_msg; ++k){
- 8001004: 693b ldr r3, [r7, #16]
- 8001006: 617b str r3, [r7, #20]
- 8001008: 693a ldr r2, [r7, #16]
- 800100a: 68fb ldr r3, [r7, #12]
- 800100c: 4413 add r3, r2
- 800100e: 697a ldr r2, [r7, #20]
- 8001010: 429a cmp r2, r3
- 8001012: d20c bcs.n 800102e <_ZN14rosserial_msgs3Log11deserializeEPh+0x62>
- inbuffer[k-1]=inbuffer[k];
- 8001014: 683a ldr r2, [r7, #0]
- 8001016: 697b ldr r3, [r7, #20]
- 8001018: 441a add r2, r3
- 800101a: 697b ldr r3, [r7, #20]
- 800101c: 3b01 subs r3, #1
- 800101e: 6839 ldr r1, [r7, #0]
- 8001020: 440b add r3, r1
- 8001022: 7812 ldrb r2, [r2, #0]
- 8001024: 701a strb r2, [r3, #0]
- for(unsigned int k= offset; k< offset+length_msg; ++k){
- 8001026: 697b ldr r3, [r7, #20]
- 8001028: 3301 adds r3, #1
- 800102a: 617b str r3, [r7, #20]
- 800102c: e7ec b.n 8001008 <_ZN14rosserial_msgs3Log11deserializeEPh+0x3c>
- }
- inbuffer[offset+length_msg-1]=0;
- 800102e: 693a ldr r2, [r7, #16]
- 8001030: 68fb ldr r3, [r7, #12]
- 8001032: 4413 add r3, r2
- 8001034: 3b01 subs r3, #1
- 8001036: 683a ldr r2, [r7, #0]
- 8001038: 4413 add r3, r2
- 800103a: 2200 movs r2, #0
- 800103c: 701a strb r2, [r3, #0]
- this->msg = (char *)(inbuffer + offset-1);
- 800103e: 693b ldr r3, [r7, #16]
- 8001040: 3b01 subs r3, #1
- 8001042: 683a ldr r2, [r7, #0]
- 8001044: 441a add r2, r3
- 8001046: 687b ldr r3, [r7, #4]
- 8001048: 609a str r2, [r3, #8]
- offset += length_msg;
- 800104a: 693a ldr r2, [r7, #16]
- 800104c: 68fb ldr r3, [r7, #12]
- 800104e: 4413 add r3, r2
- 8001050: 613b str r3, [r7, #16]
- return offset;
- 8001052: 693b ldr r3, [r7, #16]
- }
- 8001054: 4618 mov r0, r3
- 8001056: 3718 adds r7, #24
- 8001058: 46bd mov sp, r7
- 800105a: bd80 pop {r7, pc}
-
-0800105c <_ZN14rosserial_msgs3Log7getTypeEv>:
-
- const char * getType(){ return "rosserial_msgs/Log"; };
- 800105c: b480 push {r7}
- 800105e: b083 sub sp, #12
- 8001060: af00 add r7, sp, #0
- 8001062: 6078 str r0, [r7, #4]
- 8001064: 4b03 ldr r3, [pc, #12] ; (8001074 <_ZN14rosserial_msgs3Log7getTypeEv+0x18>)
- 8001066: 4618 mov r0, r3
- 8001068: 370c adds r7, #12
- 800106a: 46bd mov sp, r7
- 800106c: f85d 7b04 ldr.w r7, [sp], #4
- 8001070: 4770 bx lr
- 8001072: bf00 nop
- 8001074: 0800abb4 .word 0x0800abb4
-
-08001078 <_ZN14rosserial_msgs3Log6getMD5Ev>:
- const char * getMD5(){ return "11abd731c25933261cd6183bd12d6295"; };
- 8001078: b480 push {r7}
- 800107a: b083 sub sp, #12
- 800107c: af00 add r7, sp, #0
- 800107e: 6078 str r0, [r7, #4]
- 8001080: 4b03 ldr r3, [pc, #12] ; (8001090 <_ZN14rosserial_msgs3Log6getMD5Ev+0x18>)
- 8001082: 4618 mov r0, r3
- 8001084: 370c adds r7, #12
- 8001086: 46bd mov sp, r7
- 8001088: f85d 7b04 ldr.w r7, [sp], #4
- 800108c: 4770 bx lr
- 800108e: bf00 nop
- 8001090: 0800abc8 .word 0x0800abc8
-
-08001094 <_ZN14rosserial_msgs20RequestParamResponseC1Ev>:
- uint32_t strings_length;
- typedef char* _strings_type;
- _strings_type st_strings;
- _strings_type * strings;
-
- RequestParamResponse():
- 8001094: b580 push {r7, lr}
- 8001096: b082 sub sp, #8
- 8001098: af00 add r7, sp, #0
- 800109a: 6078 str r0, [r7, #4]
- ints_length(0), ints(NULL),
- floats_length(0), floats(NULL),
- strings_length(0), strings(NULL)
- 800109c: 687b ldr r3, [r7, #4]
- 800109e: 4618 mov r0, r3
- 80010a0: f7ff fbd6 bl 8000850 <_ZN3ros3MsgC1Ev>
- 80010a4: 4a0c ldr r2, [pc, #48] ; (80010d8 <_ZN14rosserial_msgs20RequestParamResponseC1Ev+0x44>)
- 80010a6: 687b ldr r3, [r7, #4]
- 80010a8: 601a str r2, [r3, #0]
- 80010aa: 687b ldr r3, [r7, #4]
- 80010ac: 2200 movs r2, #0
- 80010ae: 605a str r2, [r3, #4]
- 80010b0: 687b ldr r3, [r7, #4]
- 80010b2: 2200 movs r2, #0
- 80010b4: 60da str r2, [r3, #12]
- 80010b6: 687b ldr r3, [r7, #4]
- 80010b8: 2200 movs r2, #0
- 80010ba: 611a str r2, [r3, #16]
- 80010bc: 687b ldr r3, [r7, #4]
- 80010be: 2200 movs r2, #0
- 80010c0: 619a str r2, [r3, #24]
- 80010c2: 687b ldr r3, [r7, #4]
- 80010c4: 2200 movs r2, #0
- 80010c6: 61da str r2, [r3, #28]
- 80010c8: 687b ldr r3, [r7, #4]
- 80010ca: 2200 movs r2, #0
- 80010cc: 625a str r2, [r3, #36] ; 0x24
- {
- }
- 80010ce: 687b ldr r3, [r7, #4]
- 80010d0: 4618 mov r0, r3
- 80010d2: 3708 adds r7, #8
- 80010d4: 46bd mov sp, r7
- 80010d6: bd80 pop {r7, pc}
- 80010d8: 0800b0d4 .word 0x0800b0d4
-
-080010dc <_ZNK14rosserial_msgs20RequestParamResponse9serializeEPh>:
-
- virtual int serialize(unsigned char *outbuffer) const
- 80010dc: b580 push {r7, lr}
- 80010de: b08a sub sp, #40 ; 0x28
- 80010e0: af00 add r7, sp, #0
- 80010e2: 6078 str r0, [r7, #4]
- 80010e4: 6039 str r1, [r7, #0]
- {
- int offset = 0;
- 80010e6: 2300 movs r3, #0
- 80010e8: 627b str r3, [r7, #36] ; 0x24
- *(outbuffer + offset + 0) = (this->ints_length >> (8 * 0)) & 0xFF;
- 80010ea: 687b ldr r3, [r7, #4]
- 80010ec: 6859 ldr r1, [r3, #4]
- 80010ee: 6a7b ldr r3, [r7, #36] ; 0x24
- 80010f0: 683a ldr r2, [r7, #0]
- 80010f2: 4413 add r3, r2
- 80010f4: b2ca uxtb r2, r1
- 80010f6: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 1) = (this->ints_length >> (8 * 1)) & 0xFF;
- 80010f8: 687b ldr r3, [r7, #4]
- 80010fa: 685b ldr r3, [r3, #4]
- 80010fc: 0a19 lsrs r1, r3, #8
- 80010fe: 6a7b ldr r3, [r7, #36] ; 0x24
- 8001100: 3301 adds r3, #1
- 8001102: 683a ldr r2, [r7, #0]
- 8001104: 4413 add r3, r2
- 8001106: b2ca uxtb r2, r1
- 8001108: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 2) = (this->ints_length >> (8 * 2)) & 0xFF;
- 800110a: 687b ldr r3, [r7, #4]
- 800110c: 685b ldr r3, [r3, #4]
- 800110e: 0c19 lsrs r1, r3, #16
- 8001110: 6a7b ldr r3, [r7, #36] ; 0x24
- 8001112: 3302 adds r3, #2
- 8001114: 683a ldr r2, [r7, #0]
- 8001116: 4413 add r3, r2
- 8001118: b2ca uxtb r2, r1
- 800111a: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 3) = (this->ints_length >> (8 * 3)) & 0xFF;
- 800111c: 687b ldr r3, [r7, #4]
- 800111e: 685b ldr r3, [r3, #4]
- 8001120: 0e19 lsrs r1, r3, #24
- 8001122: 6a7b ldr r3, [r7, #36] ; 0x24
- 8001124: 3303 adds r3, #3
- 8001126: 683a ldr r2, [r7, #0]
- 8001128: 4413 add r3, r2
- 800112a: b2ca uxtb r2, r1
- 800112c: 701a strb r2, [r3, #0]
- offset += sizeof(this->ints_length);
- 800112e: 6a7b ldr r3, [r7, #36] ; 0x24
- 8001130: 3304 adds r3, #4
- 8001132: 627b str r3, [r7, #36] ; 0x24
- for( uint32_t i = 0; i < ints_length; i++){
- 8001134: 2300 movs r3, #0
- 8001136: 623b str r3, [r7, #32]
- 8001138: 687b ldr r3, [r7, #4]
- 800113a: 685b ldr r3, [r3, #4]
- 800113c: 6a3a ldr r2, [r7, #32]
- 800113e: 429a cmp r2, r3
- 8001140: d22b bcs.n 800119a <_ZNK14rosserial_msgs20RequestParamResponse9serializeEPh+0xbe>
- union {
- int32_t real;
- uint32_t base;
- } u_intsi;
- u_intsi.real = this->ints[i];
- 8001142: 687b ldr r3, [r7, #4]
- 8001144: 68da ldr r2, [r3, #12]
- 8001146: 6a3b ldr r3, [r7, #32]
- 8001148: 009b lsls r3, r3, #2
- 800114a: 4413 add r3, r2
- 800114c: 681b ldr r3, [r3, #0]
- 800114e: 613b str r3, [r7, #16]
- *(outbuffer + offset + 0) = (u_intsi.base >> (8 * 0)) & 0xFF;
- 8001150: 6939 ldr r1, [r7, #16]
- 8001152: 6a7b ldr r3, [r7, #36] ; 0x24
- 8001154: 683a ldr r2, [r7, #0]
- 8001156: 4413 add r3, r2
- 8001158: b2ca uxtb r2, r1
- 800115a: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 1) = (u_intsi.base >> (8 * 1)) & 0xFF;
- 800115c: 693b ldr r3, [r7, #16]
- 800115e: 0a19 lsrs r1, r3, #8
- 8001160: 6a7b ldr r3, [r7, #36] ; 0x24
- 8001162: 3301 adds r3, #1
- 8001164: 683a ldr r2, [r7, #0]
- 8001166: 4413 add r3, r2
- 8001168: b2ca uxtb r2, r1
- 800116a: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 2) = (u_intsi.base >> (8 * 2)) & 0xFF;
- 800116c: 693b ldr r3, [r7, #16]
- 800116e: 0c19 lsrs r1, r3, #16
- 8001170: 6a7b ldr r3, [r7, #36] ; 0x24
- 8001172: 3302 adds r3, #2
- 8001174: 683a ldr r2, [r7, #0]
- 8001176: 4413 add r3, r2
- 8001178: b2ca uxtb r2, r1
- 800117a: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 3) = (u_intsi.base >> (8 * 3)) & 0xFF;
- 800117c: 693b ldr r3, [r7, #16]
- 800117e: 0e19 lsrs r1, r3, #24
- 8001180: 6a7b ldr r3, [r7, #36] ; 0x24
- 8001182: 3303 adds r3, #3
- 8001184: 683a ldr r2, [r7, #0]
- 8001186: 4413 add r3, r2
- 8001188: b2ca uxtb r2, r1
- 800118a: 701a strb r2, [r3, #0]
- offset += sizeof(this->ints[i]);
- 800118c: 6a7b ldr r3, [r7, #36] ; 0x24
- 800118e: 3304 adds r3, #4
- 8001190: 627b str r3, [r7, #36] ; 0x24
- for( uint32_t i = 0; i < ints_length; i++){
- 8001192: 6a3b ldr r3, [r7, #32]
- 8001194: 3301 adds r3, #1
- 8001196: 623b str r3, [r7, #32]
- 8001198: e7ce b.n 8001138 <_ZNK14rosserial_msgs20RequestParamResponse9serializeEPh+0x5c>
- }
- *(outbuffer + offset + 0) = (this->floats_length >> (8 * 0)) & 0xFF;
- 800119a: 687b ldr r3, [r7, #4]
- 800119c: 6919 ldr r1, [r3, #16]
- 800119e: 6a7b ldr r3, [r7, #36] ; 0x24
- 80011a0: 683a ldr r2, [r7, #0]
- 80011a2: 4413 add r3, r2
- 80011a4: b2ca uxtb r2, r1
- 80011a6: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 1) = (this->floats_length >> (8 * 1)) & 0xFF;
- 80011a8: 687b ldr r3, [r7, #4]
- 80011aa: 691b ldr r3, [r3, #16]
- 80011ac: 0a19 lsrs r1, r3, #8
- 80011ae: 6a7b ldr r3, [r7, #36] ; 0x24
- 80011b0: 3301 adds r3, #1
- 80011b2: 683a ldr r2, [r7, #0]
- 80011b4: 4413 add r3, r2
- 80011b6: b2ca uxtb r2, r1
- 80011b8: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 2) = (this->floats_length >> (8 * 2)) & 0xFF;
- 80011ba: 687b ldr r3, [r7, #4]
- 80011bc: 691b ldr r3, [r3, #16]
- 80011be: 0c19 lsrs r1, r3, #16
- 80011c0: 6a7b ldr r3, [r7, #36] ; 0x24
- 80011c2: 3302 adds r3, #2
- 80011c4: 683a ldr r2, [r7, #0]
- 80011c6: 4413 add r3, r2
- 80011c8: b2ca uxtb r2, r1
- 80011ca: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 3) = (this->floats_length >> (8 * 3)) & 0xFF;
- 80011cc: 687b ldr r3, [r7, #4]
- 80011ce: 691b ldr r3, [r3, #16]
- 80011d0: 0e19 lsrs r1, r3, #24
- 80011d2: 6a7b ldr r3, [r7, #36] ; 0x24
- 80011d4: 3303 adds r3, #3
- 80011d6: 683a ldr r2, [r7, #0]
- 80011d8: 4413 add r3, r2
- 80011da: b2ca uxtb r2, r1
- 80011dc: 701a strb r2, [r3, #0]
- offset += sizeof(this->floats_length);
- 80011de: 6a7b ldr r3, [r7, #36] ; 0x24
- 80011e0: 3304 adds r3, #4
- 80011e2: 627b str r3, [r7, #36] ; 0x24
- for( uint32_t i = 0; i < floats_length; i++){
- 80011e4: 2300 movs r3, #0
- 80011e6: 61fb str r3, [r7, #28]
- 80011e8: 687b ldr r3, [r7, #4]
- 80011ea: 691b ldr r3, [r3, #16]
- 80011ec: 69fa ldr r2, [r7, #28]
- 80011ee: 429a cmp r2, r3
- 80011f0: d22b bcs.n 800124a <_ZNK14rosserial_msgs20RequestParamResponse9serializeEPh+0x16e>
- union {
- float real;
- uint32_t base;
- } u_floatsi;
- u_floatsi.real = this->floats[i];
- 80011f2: 687b ldr r3, [r7, #4]
- 80011f4: 699a ldr r2, [r3, #24]
- 80011f6: 69fb ldr r3, [r7, #28]
- 80011f8: 009b lsls r3, r3, #2
- 80011fa: 4413 add r3, r2
- 80011fc: 681b ldr r3, [r3, #0]
- 80011fe: 60fb str r3, [r7, #12]
- *(outbuffer + offset + 0) = (u_floatsi.base >> (8 * 0)) & 0xFF;
- 8001200: 68f9 ldr r1, [r7, #12]
- 8001202: 6a7b ldr r3, [r7, #36] ; 0x24
- 8001204: 683a ldr r2, [r7, #0]
- 8001206: 4413 add r3, r2
- 8001208: b2ca uxtb r2, r1
- 800120a: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 1) = (u_floatsi.base >> (8 * 1)) & 0xFF;
- 800120c: 68fb ldr r3, [r7, #12]
- 800120e: 0a19 lsrs r1, r3, #8
- 8001210: 6a7b ldr r3, [r7, #36] ; 0x24
- 8001212: 3301 adds r3, #1
- 8001214: 683a ldr r2, [r7, #0]
- 8001216: 4413 add r3, r2
- 8001218: b2ca uxtb r2, r1
- 800121a: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 2) = (u_floatsi.base >> (8 * 2)) & 0xFF;
- 800121c: 68fb ldr r3, [r7, #12]
- 800121e: 0c19 lsrs r1, r3, #16
- 8001220: 6a7b ldr r3, [r7, #36] ; 0x24
- 8001222: 3302 adds r3, #2
- 8001224: 683a ldr r2, [r7, #0]
- 8001226: 4413 add r3, r2
- 8001228: b2ca uxtb r2, r1
- 800122a: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 3) = (u_floatsi.base >> (8 * 3)) & 0xFF;
- 800122c: 68fb ldr r3, [r7, #12]
- 800122e: 0e19 lsrs r1, r3, #24
- 8001230: 6a7b ldr r3, [r7, #36] ; 0x24
- 8001232: 3303 adds r3, #3
- 8001234: 683a ldr r2, [r7, #0]
- 8001236: 4413 add r3, r2
- 8001238: b2ca uxtb r2, r1
- 800123a: 701a strb r2, [r3, #0]
- offset += sizeof(this->floats[i]);
- 800123c: 6a7b ldr r3, [r7, #36] ; 0x24
- 800123e: 3304 adds r3, #4
- 8001240: 627b str r3, [r7, #36] ; 0x24
- for( uint32_t i = 0; i < floats_length; i++){
- 8001242: 69fb ldr r3, [r7, #28]
- 8001244: 3301 adds r3, #1
- 8001246: 61fb str r3, [r7, #28]
- 8001248: e7ce b.n 80011e8 <_ZNK14rosserial_msgs20RequestParamResponse9serializeEPh+0x10c>
- }
- *(outbuffer + offset + 0) = (this->strings_length >> (8 * 0)) & 0xFF;
- 800124a: 687b ldr r3, [r7, #4]
- 800124c: 69d9 ldr r1, [r3, #28]
- 800124e: 6a7b ldr r3, [r7, #36] ; 0x24
- 8001250: 683a ldr r2, [r7, #0]
- 8001252: 4413 add r3, r2
- 8001254: b2ca uxtb r2, r1
- 8001256: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 1) = (this->strings_length >> (8 * 1)) & 0xFF;
- 8001258: 687b ldr r3, [r7, #4]
- 800125a: 69db ldr r3, [r3, #28]
- 800125c: 0a19 lsrs r1, r3, #8
- 800125e: 6a7b ldr r3, [r7, #36] ; 0x24
- 8001260: 3301 adds r3, #1
- 8001262: 683a ldr r2, [r7, #0]
- 8001264: 4413 add r3, r2
- 8001266: b2ca uxtb r2, r1
- 8001268: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 2) = (this->strings_length >> (8 * 2)) & 0xFF;
- 800126a: 687b ldr r3, [r7, #4]
- 800126c: 69db ldr r3, [r3, #28]
- 800126e: 0c19 lsrs r1, r3, #16
- 8001270: 6a7b ldr r3, [r7, #36] ; 0x24
- 8001272: 3302 adds r3, #2
- 8001274: 683a ldr r2, [r7, #0]
- 8001276: 4413 add r3, r2
- 8001278: b2ca uxtb r2, r1
- 800127a: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 3) = (this->strings_length >> (8 * 3)) & 0xFF;
- 800127c: 687b ldr r3, [r7, #4]
- 800127e: 69db ldr r3, [r3, #28]
- 8001280: 0e19 lsrs r1, r3, #24
- 8001282: 6a7b ldr r3, [r7, #36] ; 0x24
- 8001284: 3303 adds r3, #3
- 8001286: 683a ldr r2, [r7, #0]
- 8001288: 4413 add r3, r2
- 800128a: b2ca uxtb r2, r1
- 800128c: 701a strb r2, [r3, #0]
- offset += sizeof(this->strings_length);
- 800128e: 6a7b ldr r3, [r7, #36] ; 0x24
- 8001290: 3304 adds r3, #4
- 8001292: 627b str r3, [r7, #36] ; 0x24
- for( uint32_t i = 0; i < strings_length; i++){
- 8001294: 2300 movs r3, #0
- 8001296: 61bb str r3, [r7, #24]
- 8001298: 687b ldr r3, [r7, #4]
- 800129a: 69db ldr r3, [r3, #28]
- 800129c: 69ba ldr r2, [r7, #24]
- 800129e: 429a cmp r2, r3
- 80012a0: d228 bcs.n 80012f4 <_ZNK14rosserial_msgs20RequestParamResponse9serializeEPh+0x218>
- uint32_t length_stringsi = strlen(this->strings[i]);
- 80012a2: 687b ldr r3, [r7, #4]
- 80012a4: 6a5a ldr r2, [r3, #36] ; 0x24
- 80012a6: 69bb ldr r3, [r7, #24]
- 80012a8: 009b lsls r3, r3, #2
- 80012aa: 4413 add r3, r2
- 80012ac: 681b ldr r3, [r3, #0]
- 80012ae: 4618 mov r0, r3
- 80012b0: f7fe ffc2 bl 8000238 <strlen>
- 80012b4: 6178 str r0, [r7, #20]
- varToArr(outbuffer + offset, length_stringsi);
- 80012b6: 6a7b ldr r3, [r7, #36] ; 0x24
- 80012b8: 683a ldr r2, [r7, #0]
- 80012ba: 4413 add r3, r2
- 80012bc: 6979 ldr r1, [r7, #20]
- 80012be: 4618 mov r0, r3
- 80012c0: f002 fc75 bl 8003bae <_ZN3ros3Msg8varToArrIPhmEEvT_T0_>
- offset += 4;
- 80012c4: 6a7b ldr r3, [r7, #36] ; 0x24
- 80012c6: 3304 adds r3, #4
- 80012c8: 627b str r3, [r7, #36] ; 0x24
- memcpy(outbuffer + offset, this->strings[i], length_stringsi);
- 80012ca: 6a7b ldr r3, [r7, #36] ; 0x24
- 80012cc: 683a ldr r2, [r7, #0]
- 80012ce: 18d0 adds r0, r2, r3
- 80012d0: 687b ldr r3, [r7, #4]
- 80012d2: 6a5a ldr r2, [r3, #36] ; 0x24
- 80012d4: 69bb ldr r3, [r7, #24]
- 80012d6: 009b lsls r3, r3, #2
- 80012d8: 4413 add r3, r2
- 80012da: 681b ldr r3, [r3, #0]
- 80012dc: 697a ldr r2, [r7, #20]
- 80012de: 4619 mov r1, r3
- 80012e0: f009 fabe bl 800a860 <memcpy>
- offset += length_stringsi;
- 80012e4: 6a7a ldr r2, [r7, #36] ; 0x24
- 80012e6: 697b ldr r3, [r7, #20]
- 80012e8: 4413 add r3, r2
- 80012ea: 627b str r3, [r7, #36] ; 0x24
- for( uint32_t i = 0; i < strings_length; i++){
- 80012ec: 69bb ldr r3, [r7, #24]
- 80012ee: 3301 adds r3, #1
- 80012f0: 61bb str r3, [r7, #24]
- 80012f2: e7d1 b.n 8001298 <_ZNK14rosserial_msgs20RequestParamResponse9serializeEPh+0x1bc>
- }
- return offset;
- 80012f4: 6a7b ldr r3, [r7, #36] ; 0x24
- }
- 80012f6: 4618 mov r0, r3
- 80012f8: 3728 adds r7, #40 ; 0x28
- 80012fa: 46bd mov sp, r7
- 80012fc: bd80 pop {r7, pc}
-
-080012fe <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh>:
-
- virtual int deserialize(unsigned char *inbuffer)
- 80012fe: b580 push {r7, lr}
- 8001300: b08e sub sp, #56 ; 0x38
- 8001302: af00 add r7, sp, #0
- 8001304: 6078 str r0, [r7, #4]
- 8001306: 6039 str r1, [r7, #0]
- {
- int offset = 0;
- 8001308: 2300 movs r3, #0
- 800130a: 637b str r3, [r7, #52] ; 0x34
- uint32_t ints_lengthT = ((uint32_t) (*(inbuffer + offset)));
- 800130c: 6b7b ldr r3, [r7, #52] ; 0x34
- 800130e: 683a ldr r2, [r7, #0]
- 8001310: 4413 add r3, r2
- 8001312: 781b ldrb r3, [r3, #0]
- 8001314: 623b str r3, [r7, #32]
- ints_lengthT |= ((uint32_t) (*(inbuffer + offset + 1))) << (8 * 1);
- 8001316: 6b7b ldr r3, [r7, #52] ; 0x34
- 8001318: 3301 adds r3, #1
- 800131a: 683a ldr r2, [r7, #0]
- 800131c: 4413 add r3, r2
- 800131e: 781b ldrb r3, [r3, #0]
- 8001320: 021b lsls r3, r3, #8
- 8001322: 6a3a ldr r2, [r7, #32]
- 8001324: 4313 orrs r3, r2
- 8001326: 623b str r3, [r7, #32]
- ints_lengthT |= ((uint32_t) (*(inbuffer + offset + 2))) << (8 * 2);
- 8001328: 6b7b ldr r3, [r7, #52] ; 0x34
- 800132a: 3302 adds r3, #2
- 800132c: 683a ldr r2, [r7, #0]
- 800132e: 4413 add r3, r2
- 8001330: 781b ldrb r3, [r3, #0]
- 8001332: 041b lsls r3, r3, #16
- 8001334: 6a3a ldr r2, [r7, #32]
- 8001336: 4313 orrs r3, r2
- 8001338: 623b str r3, [r7, #32]
- ints_lengthT |= ((uint32_t) (*(inbuffer + offset + 3))) << (8 * 3);
- 800133a: 6b7b ldr r3, [r7, #52] ; 0x34
- 800133c: 3303 adds r3, #3
- 800133e: 683a ldr r2, [r7, #0]
- 8001340: 4413 add r3, r2
- 8001342: 781b ldrb r3, [r3, #0]
- 8001344: 061b lsls r3, r3, #24
- 8001346: 6a3a ldr r2, [r7, #32]
- 8001348: 4313 orrs r3, r2
- 800134a: 623b str r3, [r7, #32]
- offset += sizeof(this->ints_length);
- 800134c: 6b7b ldr r3, [r7, #52] ; 0x34
- 800134e: 3304 adds r3, #4
- 8001350: 637b str r3, [r7, #52] ; 0x34
- if(ints_lengthT > ints_length)
- 8001352: 687b ldr r3, [r7, #4]
- 8001354: 685b ldr r3, [r3, #4]
- 8001356: 6a3a ldr r2, [r7, #32]
- 8001358: 429a cmp r2, r3
- 800135a: d90a bls.n 8001372 <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x74>
- this->ints = (int32_t*)realloc(this->ints, ints_lengthT * sizeof(int32_t));
- 800135c: 687b ldr r3, [r7, #4]
- 800135e: 68da ldr r2, [r3, #12]
- 8001360: 6a3b ldr r3, [r7, #32]
- 8001362: 009b lsls r3, r3, #2
- 8001364: 4619 mov r1, r3
- 8001366: 4610 mov r0, r2
- 8001368: f009 fa8e bl 800a888 <realloc>
- 800136c: 4602 mov r2, r0
- 800136e: 687b ldr r3, [r7, #4]
- 8001370: 60da str r2, [r3, #12]
- ints_length = ints_lengthT;
- 8001372: 687b ldr r3, [r7, #4]
- 8001374: 6a3a ldr r2, [r7, #32]
- 8001376: 605a str r2, [r3, #4]
- for( uint32_t i = 0; i < ints_length; i++){
- 8001378: 2300 movs r3, #0
- 800137a: 633b str r3, [r7, #48] ; 0x30
- 800137c: 687b ldr r3, [r7, #4]
- 800137e: 685b ldr r3, [r3, #4]
- 8001380: 6b3a ldr r2, [r7, #48] ; 0x30
- 8001382: 429a cmp r2, r3
- 8001384: d236 bcs.n 80013f4 <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0xf6>
- union {
- int32_t real;
- uint32_t base;
- } u_st_ints;
- u_st_ints.base = 0;
- 8001386: 2300 movs r3, #0
- 8001388: 617b str r3, [r7, #20]
- u_st_ints.base |= ((uint32_t) (*(inbuffer + offset + 0))) << (8 * 0);
- 800138a: 697b ldr r3, [r7, #20]
- 800138c: 6b7a ldr r2, [r7, #52] ; 0x34
- 800138e: 6839 ldr r1, [r7, #0]
- 8001390: 440a add r2, r1
- 8001392: 7812 ldrb r2, [r2, #0]
- 8001394: 4313 orrs r3, r2
- 8001396: 617b str r3, [r7, #20]
- u_st_ints.base |= ((uint32_t) (*(inbuffer + offset + 1))) << (8 * 1);
- 8001398: 697a ldr r2, [r7, #20]
- 800139a: 6b7b ldr r3, [r7, #52] ; 0x34
- 800139c: 3301 adds r3, #1
- 800139e: 6839 ldr r1, [r7, #0]
- 80013a0: 440b add r3, r1
- 80013a2: 781b ldrb r3, [r3, #0]
- 80013a4: 021b lsls r3, r3, #8
- 80013a6: 4313 orrs r3, r2
- 80013a8: 617b str r3, [r7, #20]
- u_st_ints.base |= ((uint32_t) (*(inbuffer + offset + 2))) << (8 * 2);
- 80013aa: 697a ldr r2, [r7, #20]
- 80013ac: 6b7b ldr r3, [r7, #52] ; 0x34
- 80013ae: 3302 adds r3, #2
- 80013b0: 6839 ldr r1, [r7, #0]
- 80013b2: 440b add r3, r1
- 80013b4: 781b ldrb r3, [r3, #0]
- 80013b6: 041b lsls r3, r3, #16
- 80013b8: 4313 orrs r3, r2
- 80013ba: 617b str r3, [r7, #20]
- u_st_ints.base |= ((uint32_t) (*(inbuffer + offset + 3))) << (8 * 3);
- 80013bc: 697a ldr r2, [r7, #20]
- 80013be: 6b7b ldr r3, [r7, #52] ; 0x34
- 80013c0: 3303 adds r3, #3
- 80013c2: 6839 ldr r1, [r7, #0]
- 80013c4: 440b add r3, r1
- 80013c6: 781b ldrb r3, [r3, #0]
- 80013c8: 061b lsls r3, r3, #24
- 80013ca: 4313 orrs r3, r2
- 80013cc: 617b str r3, [r7, #20]
- this->st_ints = u_st_ints.real;
- 80013ce: 697a ldr r2, [r7, #20]
- 80013d0: 687b ldr r3, [r7, #4]
- 80013d2: 609a str r2, [r3, #8]
- offset += sizeof(this->st_ints);
- 80013d4: 6b7b ldr r3, [r7, #52] ; 0x34
- 80013d6: 3304 adds r3, #4
- 80013d8: 637b str r3, [r7, #52] ; 0x34
- memcpy( &(this->ints[i]), &(this->st_ints), sizeof(int32_t));
- 80013da: 687b ldr r3, [r7, #4]
- 80013dc: 68da ldr r2, [r3, #12]
- 80013de: 6b3b ldr r3, [r7, #48] ; 0x30
- 80013e0: 009b lsls r3, r3, #2
- 80013e2: 4413 add r3, r2
- 80013e4: 687a ldr r2, [r7, #4]
- 80013e6: 3208 adds r2, #8
- 80013e8: 6812 ldr r2, [r2, #0]
- 80013ea: 601a str r2, [r3, #0]
- for( uint32_t i = 0; i < ints_length; i++){
- 80013ec: 6b3b ldr r3, [r7, #48] ; 0x30
- 80013ee: 3301 adds r3, #1
- 80013f0: 633b str r3, [r7, #48] ; 0x30
- 80013f2: e7c3 b.n 800137c <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x7e>
- }
- uint32_t floats_lengthT = ((uint32_t) (*(inbuffer + offset)));
- 80013f4: 6b7b ldr r3, [r7, #52] ; 0x34
- 80013f6: 683a ldr r2, [r7, #0]
- 80013f8: 4413 add r3, r2
- 80013fa: 781b ldrb r3, [r3, #0]
- 80013fc: 61fb str r3, [r7, #28]
- floats_lengthT |= ((uint32_t) (*(inbuffer + offset + 1))) << (8 * 1);
- 80013fe: 6b7b ldr r3, [r7, #52] ; 0x34
- 8001400: 3301 adds r3, #1
- 8001402: 683a ldr r2, [r7, #0]
- 8001404: 4413 add r3, r2
- 8001406: 781b ldrb r3, [r3, #0]
- 8001408: 021b lsls r3, r3, #8
- 800140a: 69fa ldr r2, [r7, #28]
- 800140c: 4313 orrs r3, r2
- 800140e: 61fb str r3, [r7, #28]
- floats_lengthT |= ((uint32_t) (*(inbuffer + offset + 2))) << (8 * 2);
- 8001410: 6b7b ldr r3, [r7, #52] ; 0x34
- 8001412: 3302 adds r3, #2
- 8001414: 683a ldr r2, [r7, #0]
- 8001416: 4413 add r3, r2
- 8001418: 781b ldrb r3, [r3, #0]
- 800141a: 041b lsls r3, r3, #16
- 800141c: 69fa ldr r2, [r7, #28]
- 800141e: 4313 orrs r3, r2
- 8001420: 61fb str r3, [r7, #28]
- floats_lengthT |= ((uint32_t) (*(inbuffer + offset + 3))) << (8 * 3);
- 8001422: 6b7b ldr r3, [r7, #52] ; 0x34
- 8001424: 3303 adds r3, #3
- 8001426: 683a ldr r2, [r7, #0]
- 8001428: 4413 add r3, r2
- 800142a: 781b ldrb r3, [r3, #0]
- 800142c: 061b lsls r3, r3, #24
- 800142e: 69fa ldr r2, [r7, #28]
- 8001430: 4313 orrs r3, r2
- 8001432: 61fb str r3, [r7, #28]
- offset += sizeof(this->floats_length);
- 8001434: 6b7b ldr r3, [r7, #52] ; 0x34
- 8001436: 3304 adds r3, #4
- 8001438: 637b str r3, [r7, #52] ; 0x34
- if(floats_lengthT > floats_length)
- 800143a: 687b ldr r3, [r7, #4]
- 800143c: 691b ldr r3, [r3, #16]
- 800143e: 69fa ldr r2, [r7, #28]
- 8001440: 429a cmp r2, r3
- 8001442: d90a bls.n 800145a <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x15c>
- this->floats = (float*)realloc(this->floats, floats_lengthT * sizeof(float));
- 8001444: 687b ldr r3, [r7, #4]
- 8001446: 699a ldr r2, [r3, #24]
- 8001448: 69fb ldr r3, [r7, #28]
- 800144a: 009b lsls r3, r3, #2
- 800144c: 4619 mov r1, r3
- 800144e: 4610 mov r0, r2
- 8001450: f009 fa1a bl 800a888 <realloc>
- 8001454: 4602 mov r2, r0
- 8001456: 687b ldr r3, [r7, #4]
- 8001458: 619a str r2, [r3, #24]
- floats_length = floats_lengthT;
- 800145a: 687b ldr r3, [r7, #4]
- 800145c: 69fa ldr r2, [r7, #28]
- 800145e: 611a str r2, [r3, #16]
- for( uint32_t i = 0; i < floats_length; i++){
- 8001460: 2300 movs r3, #0
- 8001462: 62fb str r3, [r7, #44] ; 0x2c
- 8001464: 687b ldr r3, [r7, #4]
- 8001466: 691b ldr r3, [r3, #16]
- 8001468: 6afa ldr r2, [r7, #44] ; 0x2c
- 800146a: 429a cmp r2, r3
- 800146c: d236 bcs.n 80014dc <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x1de>
- union {
- float real;
- uint32_t base;
- } u_st_floats;
- u_st_floats.base = 0;
- 800146e: 2300 movs r3, #0
- 8001470: 613b str r3, [r7, #16]
- u_st_floats.base |= ((uint32_t) (*(inbuffer + offset + 0))) << (8 * 0);
- 8001472: 693b ldr r3, [r7, #16]
- 8001474: 6b7a ldr r2, [r7, #52] ; 0x34
- 8001476: 6839 ldr r1, [r7, #0]
- 8001478: 440a add r2, r1
- 800147a: 7812 ldrb r2, [r2, #0]
- 800147c: 4313 orrs r3, r2
- 800147e: 613b str r3, [r7, #16]
- u_st_floats.base |= ((uint32_t) (*(inbuffer + offset + 1))) << (8 * 1);
- 8001480: 693a ldr r2, [r7, #16]
- 8001482: 6b7b ldr r3, [r7, #52] ; 0x34
- 8001484: 3301 adds r3, #1
- 8001486: 6839 ldr r1, [r7, #0]
- 8001488: 440b add r3, r1
- 800148a: 781b ldrb r3, [r3, #0]
- 800148c: 021b lsls r3, r3, #8
- 800148e: 4313 orrs r3, r2
- 8001490: 613b str r3, [r7, #16]
- u_st_floats.base |= ((uint32_t) (*(inbuffer + offset + 2))) << (8 * 2);
- 8001492: 693a ldr r2, [r7, #16]
- 8001494: 6b7b ldr r3, [r7, #52] ; 0x34
- 8001496: 3302 adds r3, #2
- 8001498: 6839 ldr r1, [r7, #0]
- 800149a: 440b add r3, r1
- 800149c: 781b ldrb r3, [r3, #0]
- 800149e: 041b lsls r3, r3, #16
- 80014a0: 4313 orrs r3, r2
- 80014a2: 613b str r3, [r7, #16]
- u_st_floats.base |= ((uint32_t) (*(inbuffer + offset + 3))) << (8 * 3);
- 80014a4: 693a ldr r2, [r7, #16]
- 80014a6: 6b7b ldr r3, [r7, #52] ; 0x34
- 80014a8: 3303 adds r3, #3
- 80014aa: 6839 ldr r1, [r7, #0]
- 80014ac: 440b add r3, r1
- 80014ae: 781b ldrb r3, [r3, #0]
- 80014b0: 061b lsls r3, r3, #24
- 80014b2: 4313 orrs r3, r2
- 80014b4: 613b str r3, [r7, #16]
- this->st_floats = u_st_floats.real;
- 80014b6: 693a ldr r2, [r7, #16]
- 80014b8: 687b ldr r3, [r7, #4]
- 80014ba: 615a str r2, [r3, #20]
- offset += sizeof(this->st_floats);
- 80014bc: 6b7b ldr r3, [r7, #52] ; 0x34
- 80014be: 3304 adds r3, #4
- 80014c0: 637b str r3, [r7, #52] ; 0x34
- memcpy( &(this->floats[i]), &(this->st_floats), sizeof(float));
- 80014c2: 687b ldr r3, [r7, #4]
- 80014c4: 699a ldr r2, [r3, #24]
- 80014c6: 6afb ldr r3, [r7, #44] ; 0x2c
- 80014c8: 009b lsls r3, r3, #2
- 80014ca: 4413 add r3, r2
- 80014cc: 687a ldr r2, [r7, #4]
- 80014ce: 3214 adds r2, #20
- 80014d0: 6812 ldr r2, [r2, #0]
- 80014d2: 601a str r2, [r3, #0]
- for( uint32_t i = 0; i < floats_length; i++){
- 80014d4: 6afb ldr r3, [r7, #44] ; 0x2c
- 80014d6: 3301 adds r3, #1
- 80014d8: 62fb str r3, [r7, #44] ; 0x2c
- 80014da: e7c3 b.n 8001464 <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x166>
- }
- uint32_t strings_lengthT = ((uint32_t) (*(inbuffer + offset)));
- 80014dc: 6b7b ldr r3, [r7, #52] ; 0x34
- 80014de: 683a ldr r2, [r7, #0]
- 80014e0: 4413 add r3, r2
- 80014e2: 781b ldrb r3, [r3, #0]
- 80014e4: 61bb str r3, [r7, #24]
- strings_lengthT |= ((uint32_t) (*(inbuffer + offset + 1))) << (8 * 1);
- 80014e6: 6b7b ldr r3, [r7, #52] ; 0x34
- 80014e8: 3301 adds r3, #1
- 80014ea: 683a ldr r2, [r7, #0]
- 80014ec: 4413 add r3, r2
- 80014ee: 781b ldrb r3, [r3, #0]
- 80014f0: 021b lsls r3, r3, #8
- 80014f2: 69ba ldr r2, [r7, #24]
- 80014f4: 4313 orrs r3, r2
- 80014f6: 61bb str r3, [r7, #24]
- strings_lengthT |= ((uint32_t) (*(inbuffer + offset + 2))) << (8 * 2);
- 80014f8: 6b7b ldr r3, [r7, #52] ; 0x34
- 80014fa: 3302 adds r3, #2
- 80014fc: 683a ldr r2, [r7, #0]
- 80014fe: 4413 add r3, r2
- 8001500: 781b ldrb r3, [r3, #0]
- 8001502: 041b lsls r3, r3, #16
- 8001504: 69ba ldr r2, [r7, #24]
- 8001506: 4313 orrs r3, r2
- 8001508: 61bb str r3, [r7, #24]
- strings_lengthT |= ((uint32_t) (*(inbuffer + offset + 3))) << (8 * 3);
- 800150a: 6b7b ldr r3, [r7, #52] ; 0x34
- 800150c: 3303 adds r3, #3
- 800150e: 683a ldr r2, [r7, #0]
- 8001510: 4413 add r3, r2
- 8001512: 781b ldrb r3, [r3, #0]
- 8001514: 061b lsls r3, r3, #24
- 8001516: 69ba ldr r2, [r7, #24]
- 8001518: 4313 orrs r3, r2
- 800151a: 61bb str r3, [r7, #24]
- offset += sizeof(this->strings_length);
- 800151c: 6b7b ldr r3, [r7, #52] ; 0x34
- 800151e: 3304 adds r3, #4
- 8001520: 637b str r3, [r7, #52] ; 0x34
- if(strings_lengthT > strings_length)
- 8001522: 687b ldr r3, [r7, #4]
- 8001524: 69db ldr r3, [r3, #28]
- 8001526: 69ba ldr r2, [r7, #24]
- 8001528: 429a cmp r2, r3
- 800152a: d90a bls.n 8001542 <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x244>
- this->strings = (char**)realloc(this->strings, strings_lengthT * sizeof(char*));
- 800152c: 687b ldr r3, [r7, #4]
- 800152e: 6a5a ldr r2, [r3, #36] ; 0x24
- 8001530: 69bb ldr r3, [r7, #24]
- 8001532: 009b lsls r3, r3, #2
- 8001534: 4619 mov r1, r3
- 8001536: 4610 mov r0, r2
- 8001538: f009 f9a6 bl 800a888 <realloc>
- 800153c: 4602 mov r2, r0
- 800153e: 687b ldr r3, [r7, #4]
- 8001540: 625a str r2, [r3, #36] ; 0x24
- strings_length = strings_lengthT;
- 8001542: 687b ldr r3, [r7, #4]
- 8001544: 69ba ldr r2, [r7, #24]
- 8001546: 61da str r2, [r3, #28]
- for( uint32_t i = 0; i < strings_length; i++){
- 8001548: 2300 movs r3, #0
- 800154a: 62bb str r3, [r7, #40] ; 0x28
- 800154c: 687b ldr r3, [r7, #4]
- 800154e: 69db ldr r3, [r3, #28]
- 8001550: 6aba ldr r2, [r7, #40] ; 0x28
- 8001552: 429a cmp r2, r3
- 8001554: d23f bcs.n 80015d6 <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x2d8>
- uint32_t length_st_strings;
- arrToVar(length_st_strings, (inbuffer + offset));
- 8001556: 6b7b ldr r3, [r7, #52] ; 0x34
- 8001558: 683a ldr r2, [r7, #0]
- 800155a: 441a add r2, r3
- 800155c: f107 030c add.w r3, r7, #12
- 8001560: 4611 mov r1, r2
- 8001562: 4618 mov r0, r3
- 8001564: f002 fb41 bl 8003bea <_ZN3ros3Msg8arrToVarImPhEEvRT_T0_>
- offset += 4;
- 8001568: 6b7b ldr r3, [r7, #52] ; 0x34
- 800156a: 3304 adds r3, #4
- 800156c: 637b str r3, [r7, #52] ; 0x34
- for(unsigned int k= offset; k< offset+length_st_strings; ++k){
- 800156e: 6b7b ldr r3, [r7, #52] ; 0x34
- 8001570: 627b str r3, [r7, #36] ; 0x24
- 8001572: 6b7a ldr r2, [r7, #52] ; 0x34
- 8001574: 68fb ldr r3, [r7, #12]
- 8001576: 4413 add r3, r2
- 8001578: 6a7a ldr r2, [r7, #36] ; 0x24
- 800157a: 429a cmp r2, r3
- 800157c: d20c bcs.n 8001598 <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x29a>
- inbuffer[k-1]=inbuffer[k];
- 800157e: 683a ldr r2, [r7, #0]
- 8001580: 6a7b ldr r3, [r7, #36] ; 0x24
- 8001582: 441a add r2, r3
- 8001584: 6a7b ldr r3, [r7, #36] ; 0x24
- 8001586: 3b01 subs r3, #1
- 8001588: 6839 ldr r1, [r7, #0]
- 800158a: 440b add r3, r1
- 800158c: 7812 ldrb r2, [r2, #0]
- 800158e: 701a strb r2, [r3, #0]
- for(unsigned int k= offset; k< offset+length_st_strings; ++k){
- 8001590: 6a7b ldr r3, [r7, #36] ; 0x24
- 8001592: 3301 adds r3, #1
- 8001594: 627b str r3, [r7, #36] ; 0x24
- 8001596: e7ec b.n 8001572 <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x274>
- }
- inbuffer[offset+length_st_strings-1]=0;
- 8001598: 6b7a ldr r2, [r7, #52] ; 0x34
- 800159a: 68fb ldr r3, [r7, #12]
- 800159c: 4413 add r3, r2
- 800159e: 3b01 subs r3, #1
- 80015a0: 683a ldr r2, [r7, #0]
- 80015a2: 4413 add r3, r2
- 80015a4: 2200 movs r2, #0
- 80015a6: 701a strb r2, [r3, #0]
- this->st_strings = (char *)(inbuffer + offset-1);
- 80015a8: 6b7b ldr r3, [r7, #52] ; 0x34
- 80015aa: 3b01 subs r3, #1
- 80015ac: 683a ldr r2, [r7, #0]
- 80015ae: 441a add r2, r3
- 80015b0: 687b ldr r3, [r7, #4]
- 80015b2: 621a str r2, [r3, #32]
- offset += length_st_strings;
- 80015b4: 6b7a ldr r2, [r7, #52] ; 0x34
- 80015b6: 68fb ldr r3, [r7, #12]
- 80015b8: 4413 add r3, r2
- 80015ba: 637b str r3, [r7, #52] ; 0x34
- memcpy( &(this->strings[i]), &(this->st_strings), sizeof(char*));
- 80015bc: 687b ldr r3, [r7, #4]
- 80015be: 6a5a ldr r2, [r3, #36] ; 0x24
- 80015c0: 6abb ldr r3, [r7, #40] ; 0x28
- 80015c2: 009b lsls r3, r3, #2
- 80015c4: 4413 add r3, r2
- 80015c6: 687a ldr r2, [r7, #4]
- 80015c8: 3220 adds r2, #32
- 80015ca: 6812 ldr r2, [r2, #0]
- 80015cc: 601a str r2, [r3, #0]
- for( uint32_t i = 0; i < strings_length; i++){
- 80015ce: 6abb ldr r3, [r7, #40] ; 0x28
- 80015d0: 3301 adds r3, #1
- 80015d2: 62bb str r3, [r7, #40] ; 0x28
- 80015d4: e7ba b.n 800154c <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh+0x24e>
- }
- return offset;
- 80015d6: 6b7b ldr r3, [r7, #52] ; 0x34
- }
- 80015d8: 4618 mov r0, r3
- 80015da: 3738 adds r7, #56 ; 0x38
- 80015dc: 46bd mov sp, r7
- 80015de: bd80 pop {r7, pc}
-
-080015e0 <_ZN14rosserial_msgs20RequestParamResponse7getTypeEv>:
-
- const char * getType(){ return REQUESTPARAM; };
- 80015e0: b480 push {r7}
- 80015e2: b083 sub sp, #12
- 80015e4: af00 add r7, sp, #0
- 80015e6: 6078 str r0, [r7, #4]
- 80015e8: 4b03 ldr r3, [pc, #12] ; (80015f8 <_ZN14rosserial_msgs20RequestParamResponse7getTypeEv+0x18>)
- 80015ea: 4618 mov r0, r3
- 80015ec: 370c adds r7, #12
- 80015ee: 46bd mov sp, r7
- 80015f0: f85d 7b04 ldr.w r7, [sp], #4
- 80015f4: 4770 bx lr
- 80015f6: bf00 nop
- 80015f8: 0800af50 .word 0x0800af50
-
-080015fc <_ZN14rosserial_msgs20RequestParamResponse6getMD5Ev>:
- const char * getMD5(){ return "9f0e98bda65981986ddf53afa7a40e49"; };
- 80015fc: b480 push {r7}
- 80015fe: b083 sub sp, #12
- 8001600: af00 add r7, sp, #0
- 8001602: 6078 str r0, [r7, #4]
- 8001604: 4b03 ldr r3, [pc, #12] ; (8001614 <_ZN14rosserial_msgs20RequestParamResponse6getMD5Ev+0x18>)
- 8001606: 4618 mov r0, r3
- 8001608: 370c adds r7, #12
- 800160a: 46bd mov sp, r7
- 800160c: f85d 7b04 ldr.w r7, [sp], #4
- 8001610: 4770 bx lr
- 8001612: bf00 nop
- 8001614: 0800abec .word 0x0800abec
-
-08001618 <_ZN3ros9PublisherC1EPKcPNS_3MsgEi>:
-
-/* Generic Publisher */
-class Publisher
-{
-public:
- Publisher(const char * topic_name, Msg * msg, int endpoint = rosserial_msgs::TopicInfo::ID_PUBLISHER) :
- 8001618: b480 push {r7}
- 800161a: b085 sub sp, #20
- 800161c: af00 add r7, sp, #0
- 800161e: 60f8 str r0, [r7, #12]
- 8001620: 60b9 str r1, [r7, #8]
- 8001622: 607a str r2, [r7, #4]
- 8001624: 603b str r3, [r7, #0]
- topic_(topic_name),
- msg_(msg),
- endpoint_(endpoint) {};
- 8001626: 68fb ldr r3, [r7, #12]
- 8001628: 68ba ldr r2, [r7, #8]
- 800162a: 601a str r2, [r3, #0]
- 800162c: 68fb ldr r3, [r7, #12]
- 800162e: 687a ldr r2, [r7, #4]
- 8001630: 605a str r2, [r3, #4]
- 8001632: 68fb ldr r3, [r7, #12]
- 8001634: 683a ldr r2, [r7, #0]
- 8001636: 611a str r2, [r3, #16]
- 8001638: 68fb ldr r3, [r7, #12]
- 800163a: 4618 mov r0, r3
- 800163c: 3714 adds r7, #20
- 800163e: 46bd mov sp, r7
- 8001640: f85d 7b04 ldr.w r7, [sp], #4
- 8001644: 4770 bx lr
-
-08001646 <_ZN3ros9Publisher7publishEPKNS_3MsgE>:
-
- int publish(const Msg * msg)
- 8001646: b580 push {r7, lr}
- 8001648: b082 sub sp, #8
- 800164a: af00 add r7, sp, #0
- 800164c: 6078 str r0, [r7, #4]
- 800164e: 6039 str r1, [r7, #0]
- {
- return nh_->publish(id_, msg);
- 8001650: 687b ldr r3, [r7, #4]
- 8001652: 68d8 ldr r0, [r3, #12]
- 8001654: 687b ldr r3, [r7, #4]
- 8001656: 68db ldr r3, [r3, #12]
- 8001658: 681b ldr r3, [r3, #0]
- 800165a: 681b ldr r3, [r3, #0]
- 800165c: 687a ldr r2, [r7, #4]
- 800165e: 6891 ldr r1, [r2, #8]
- 8001660: 683a ldr r2, [r7, #0]
- 8001662: 4798 blx r3
- 8001664: 4603 mov r3, r0
- };
- 8001666: 4618 mov r0, r3
- 8001668: 3708 adds r7, #8
- 800166a: 46bd mov sp, r7
- 800166c: bd80 pop {r7, pc}
-
-0800166e <_ZN3ros9Publisher15getEndpointTypeEv>:
- int getEndpointType()
- 800166e: b480 push {r7}
- 8001670: b083 sub sp, #12
- 8001672: af00 add r7, sp, #0
- 8001674: 6078 str r0, [r7, #4]
- {
- return endpoint_;
- 8001676: 687b ldr r3, [r7, #4]
- 8001678: 691b ldr r3, [r3, #16]
- }
- 800167a: 4618 mov r0, r3
- 800167c: 370c adds r7, #12
- 800167e: 46bd mov sp, r7
- 8001680: f85d 7b04 ldr.w r7, [sp], #4
- 8001684: 4770 bx lr
-
-08001686 <_ZN13STM32Hardware10getRdmaIndEv>:
- UART_HandleTypeDef *huart;
-
- const static uint16_t rbuflen = 128;
- uint8_t rbuf[rbuflen];
- uint32_t rind;
- inline uint32_t getRdmaInd(void){ return (rbuflen - huart->hdmarx->Instance->NDTR) & (rbuflen - 1); }
- 8001686: b480 push {r7}
- 8001688: b083 sub sp, #12
- 800168a: af00 add r7, sp, #0
- 800168c: 6078 str r0, [r7, #4]
- 800168e: 687b ldr r3, [r7, #4]
- 8001690: 681b ldr r3, [r3, #0]
- 8001692: 6edb ldr r3, [r3, #108] ; 0x6c
- 8001694: 681b ldr r3, [r3, #0]
- 8001696: 685b ldr r3, [r3, #4]
- 8001698: 425b negs r3, r3
- 800169a: f003 037f and.w r3, r3, #127 ; 0x7f
- 800169e: 4618 mov r0, r3
- 80016a0: 370c adds r7, #12
- 80016a2: 46bd mov sp, r7
- 80016a4: f85d 7b04 ldr.w r7, [sp], #4
- 80016a8: 4770 bx lr
- ...
-
-080016ac <_ZN13STM32HardwareC1Ev>:
- const static uint16_t tbuflen = 256;
- uint8_t tbuf[tbuflen];
- uint32_t twind, tfind;
-
- public:
- STM32Hardware():
- 80016ac: b480 push {r7}
- 80016ae: b083 sub sp, #12
- 80016b0: af00 add r7, sp, #0
- 80016b2: 6078 str r0, [r7, #4]
- huart(&huart3), rind(0), twind(0), tfind(0){
- 80016b4: 687b ldr r3, [r7, #4]
- 80016b6: 4a0a ldr r2, [pc, #40] ; (80016e0 <_ZN13STM32HardwareC1Ev+0x34>)
- 80016b8: 601a str r2, [r3, #0]
- 80016ba: 687b ldr r3, [r7, #4]
- 80016bc: 2200 movs r2, #0
- 80016be: f8c3 2084 str.w r2, [r3, #132] ; 0x84
- 80016c2: 687b ldr r3, [r7, #4]
- 80016c4: 2200 movs r2, #0
- 80016c6: f8c3 2188 str.w r2, [r3, #392] ; 0x188
- 80016ca: 687b ldr r3, [r7, #4]
- 80016cc: 2200 movs r2, #0
- 80016ce: f8c3 218c str.w r2, [r3, #396] ; 0x18c
- }
- 80016d2: 687b ldr r3, [r7, #4]
- 80016d4: 4618 mov r0, r3
- 80016d6: 370c adds r7, #12
- 80016d8: 46bd mov sp, r7
- 80016da: f85d 7b04 ldr.w r7, [sp], #4
- 80016de: 4770 bx lr
- 80016e0: 200001a4 .word 0x200001a4
-
-080016e4 <_ZN13STM32Hardware4initEv>:
-
- STM32Hardware(UART_HandleTypeDef *huart_):
- huart(huart_), rind(0), twind(0), tfind(0){
- }
-
- void init(){
- 80016e4: b580 push {r7, lr}
- 80016e6: b082 sub sp, #8
- 80016e8: af00 add r7, sp, #0
- 80016ea: 6078 str r0, [r7, #4]
- reset_rbuf();
- 80016ec: 6878 ldr r0, [r7, #4]
- 80016ee: f000 f804 bl 80016fa <_ZN13STM32Hardware10reset_rbufEv>
- }
- 80016f2: bf00 nop
- 80016f4: 3708 adds r7, #8
- 80016f6: 46bd mov sp, r7
- 80016f8: bd80 pop {r7, pc}
-
-080016fa <_ZN13STM32Hardware10reset_rbufEv>:
-
- void reset_rbuf(void){
- 80016fa: b580 push {r7, lr}
- 80016fc: b082 sub sp, #8
- 80016fe: af00 add r7, sp, #0
- 8001700: 6078 str r0, [r7, #4]
- HAL_UART_Receive_DMA(huart, rbuf, rbuflen);
- 8001702: 687b ldr r3, [r7, #4]
- 8001704: 6818 ldr r0, [r3, #0]
- 8001706: 687b ldr r3, [r7, #4]
- 8001708: 3304 adds r3, #4
- 800170a: 2280 movs r2, #128 ; 0x80
- 800170c: 4619 mov r1, r3
- 800170e: f006 fe1d bl 800834c <HAL_UART_Receive_DMA>
- }
- 8001712: bf00 nop
- 8001714: 3708 adds r7, #8
- 8001716: 46bd mov sp, r7
- 8001718: bd80 pop {r7, pc}
-
-0800171a <_ZN13STM32Hardware4readEv>:
-
- int read(){
- 800171a: b590 push {r4, r7, lr}
- 800171c: b085 sub sp, #20
- 800171e: af00 add r7, sp, #0
- 8001720: 6078 str r0, [r7, #4]
- int c = -1;
- 8001722: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff
- 8001726: 60fb str r3, [r7, #12]
- if(rind != getRdmaInd()){
- 8001728: 687b ldr r3, [r7, #4]
- 800172a: f8d3 4084 ldr.w r4, [r3, #132] ; 0x84
- 800172e: 6878 ldr r0, [r7, #4]
- 8001730: f7ff ffa9 bl 8001686 <_ZN13STM32Hardware10getRdmaIndEv>
- 8001734: 4603 mov r3, r0
- 8001736: 429c cmp r4, r3
- 8001738: bf14 ite ne
- 800173a: 2301 movne r3, #1
- 800173c: 2300 moveq r3, #0
- 800173e: b2db uxtb r3, r3
- 8001740: 2b00 cmp r3, #0
- 8001742: d012 beq.n 800176a <_ZN13STM32Hardware4readEv+0x50>
- c = rbuf[rind++];
- 8001744: 687b ldr r3, [r7, #4]
- 8001746: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84
- 800174a: 1c59 adds r1, r3, #1
- 800174c: 687a ldr r2, [r7, #4]
- 800174e: f8c2 1084 str.w r1, [r2, #132] ; 0x84
- 8001752: 687a ldr r2, [r7, #4]
- 8001754: 4413 add r3, r2
- 8001756: 791b ldrb r3, [r3, #4]
- 8001758: 60fb str r3, [r7, #12]
- rind &= rbuflen - 1;
- 800175a: 687b ldr r3, [r7, #4]
- 800175c: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84
- 8001760: f003 027f and.w r2, r3, #127 ; 0x7f
- 8001764: 687b ldr r3, [r7, #4]
- 8001766: f8c3 2084 str.w r2, [r3, #132] ; 0x84
- }
- return c;
- 800176a: 68fb ldr r3, [r7, #12]
- }
- 800176c: 4618 mov r0, r3
- 800176e: 3714 adds r7, #20
- 8001770: 46bd mov sp, r7
- 8001772: bd90 pop {r4, r7, pc}
-
-08001774 <_ZN13STM32Hardware5flushEv>:
-
- void flush(void){
- 8001774: b580 push {r7, lr}
- 8001776: b084 sub sp, #16
- 8001778: af00 add r7, sp, #0
- 800177a: 6078 str r0, [r7, #4]
- static bool mutex = false;
-
- if((huart->gState == HAL_UART_STATE_READY) && !mutex){
- 800177c: 687b ldr r3, [r7, #4]
- 800177e: 681b ldr r3, [r3, #0]
- 8001780: 6f5b ldr r3, [r3, #116] ; 0x74
- 8001782: 2b20 cmp r3, #32
- 8001784: d108 bne.n 8001798 <_ZN13STM32Hardware5flushEv+0x24>
- 8001786: 4b27 ldr r3, [pc, #156] ; (8001824 <_ZN13STM32Hardware5flushEv+0xb0>)
- 8001788: 781b ldrb r3, [r3, #0]
- 800178a: f083 0301 eor.w r3, r3, #1
- 800178e: b2db uxtb r3, r3
- 8001790: 2b00 cmp r3, #0
- 8001792: d001 beq.n 8001798 <_ZN13STM32Hardware5flushEv+0x24>
- 8001794: 2301 movs r3, #1
- 8001796: e000 b.n 800179a <_ZN13STM32Hardware5flushEv+0x26>
- 8001798: 2300 movs r3, #0
- 800179a: 2b00 cmp r3, #0
- 800179c: d03d beq.n 800181a <_ZN13STM32Hardware5flushEv+0xa6>
- mutex = true;
- 800179e: 4b21 ldr r3, [pc, #132] ; (8001824 <_ZN13STM32Hardware5flushEv+0xb0>)
- 80017a0: 2201 movs r2, #1
- 80017a2: 701a strb r2, [r3, #0]
-
- if(twind != tfind){
- 80017a4: 687b ldr r3, [r7, #4]
- 80017a6: f8d3 2188 ldr.w r2, [r3, #392] ; 0x188
- 80017aa: 687b ldr r3, [r7, #4]
- 80017ac: f8d3 318c ldr.w r3, [r3, #396] ; 0x18c
- 80017b0: 429a cmp r2, r3
- 80017b2: d02f beq.n 8001814 <_ZN13STM32Hardware5flushEv+0xa0>
- uint16_t len = tfind < twind ? twind - tfind : tbuflen - tfind;
- 80017b4: 687b ldr r3, [r7, #4]
- 80017b6: f8d3 218c ldr.w r2, [r3, #396] ; 0x18c
- 80017ba: 687b ldr r3, [r7, #4]
- 80017bc: f8d3 3188 ldr.w r3, [r3, #392] ; 0x188
- 80017c0: 429a cmp r2, r3
- 80017c2: d20a bcs.n 80017da <_ZN13STM32Hardware5flushEv+0x66>
- 80017c4: 687b ldr r3, [r7, #4]
- 80017c6: f8d3 3188 ldr.w r3, [r3, #392] ; 0x188
- 80017ca: b29a uxth r2, r3
- 80017cc: 687b ldr r3, [r7, #4]
- 80017ce: f8d3 318c ldr.w r3, [r3, #396] ; 0x18c
- 80017d2: b29b uxth r3, r3
- 80017d4: 1ad3 subs r3, r2, r3
- 80017d6: b29b uxth r3, r3
- 80017d8: e006 b.n 80017e8 <_ZN13STM32Hardware5flushEv+0x74>
- 80017da: 687b ldr r3, [r7, #4]
- 80017dc: f8d3 318c ldr.w r3, [r3, #396] ; 0x18c
- 80017e0: b29b uxth r3, r3
- 80017e2: f5c3 7380 rsb r3, r3, #256 ; 0x100
- 80017e6: b29b uxth r3, r3
- 80017e8: 81fb strh r3, [r7, #14]
- HAL_UART_Transmit_DMA(huart, &(tbuf[tfind]), len);
- 80017ea: 687b ldr r3, [r7, #4]
- 80017ec: 6818 ldr r0, [r3, #0]
- 80017ee: 687b ldr r3, [r7, #4]
- 80017f0: f8d3 318c ldr.w r3, [r3, #396] ; 0x18c
- 80017f4: 3388 adds r3, #136 ; 0x88
- 80017f6: 687a ldr r2, [r7, #4]
- 80017f8: 4413 add r3, r2
- 80017fa: 89fa ldrh r2, [r7, #14]
- 80017fc: 4619 mov r1, r3
- 80017fe: f006 fd29 bl 8008254 <HAL_UART_Transmit_DMA>
- tfind = (tfind + len) & (tbuflen - 1);
- 8001802: 687b ldr r3, [r7, #4]
- 8001804: f8d3 218c ldr.w r2, [r3, #396] ; 0x18c
- 8001808: 89fb ldrh r3, [r7, #14]
- 800180a: 4413 add r3, r2
- 800180c: b2da uxtb r2, r3
- 800180e: 687b ldr r3, [r7, #4]
- 8001810: f8c3 218c str.w r2, [r3, #396] ; 0x18c
- }
- mutex = false;
- 8001814: 4b03 ldr r3, [pc, #12] ; (8001824 <_ZN13STM32Hardware5flushEv+0xb0>)
- 8001816: 2200 movs r2, #0
- 8001818: 701a strb r2, [r3, #0]
- }
- }
- 800181a: bf00 nop
- 800181c: 3710 adds r7, #16
- 800181e: 46bd mov sp, r7
- 8001820: bd80 pop {r7, pc}
- 8001822: bf00 nop
- 8001824: 200000a0 .word 0x200000a0
-
-08001828 <_ZN13STM32Hardware5writeEPhi>:
-
- void write(uint8_t* data, int length){
- 8001828: b580 push {r7, lr}
- 800182a: b086 sub sp, #24
- 800182c: af00 add r7, sp, #0
- 800182e: 60f8 str r0, [r7, #12]
- 8001830: 60b9 str r1, [r7, #8]
- 8001832: 607a str r2, [r7, #4]
-
-
- int n = length;
- 8001834: 687b ldr r3, [r7, #4]
- 8001836: 617b str r3, [r7, #20]
- n = n <= tbuflen ? n : tbuflen;
- 8001838: 697b ldr r3, [r7, #20]
- 800183a: f5b3 7f80 cmp.w r3, #256 ; 0x100
- 800183e: bfa8 it ge
- 8001840: f44f 7380 movge.w r3, #256 ; 0x100
- 8001844: 617b str r3, [r7, #20]
-
- int n_tail = n <= tbuflen - twind ? n : tbuflen - twind;
- 8001846: 68fb ldr r3, [r7, #12]
- 8001848: f8d3 3188 ldr.w r3, [r3, #392] ; 0x188
- 800184c: f5c3 7280 rsb r2, r3, #256 ; 0x100
- 8001850: 697b ldr r3, [r7, #20]
- 8001852: 4293 cmp r3, r2
- 8001854: bf28 it cs
- 8001856: 4613 movcs r3, r2
- 8001858: 613b str r3, [r7, #16]
- memcpy(&(tbuf[twind]), data, n_tail);
- 800185a: 68fb ldr r3, [r7, #12]
- 800185c: f8d3 3188 ldr.w r3, [r3, #392] ; 0x188
- 8001860: 3388 adds r3, #136 ; 0x88
- 8001862: 68fa ldr r2, [r7, #12]
- 8001864: 4413 add r3, r2
- 8001866: 693a ldr r2, [r7, #16]
- 8001868: 68b9 ldr r1, [r7, #8]
- 800186a: 4618 mov r0, r3
- 800186c: f008 fff8 bl 800a860 <memcpy>
- twind = (twind + n) & (tbuflen - 1);
- 8001870: 68fb ldr r3, [r7, #12]
- 8001872: f8d3 2188 ldr.w r2, [r3, #392] ; 0x188
- 8001876: 697b ldr r3, [r7, #20]
- 8001878: 4413 add r3, r2
- 800187a: b2da uxtb r2, r3
- 800187c: 68fb ldr r3, [r7, #12]
- 800187e: f8c3 2188 str.w r2, [r3, #392] ; 0x188
-
- if(n != n_tail){
- 8001882: 697a ldr r2, [r7, #20]
- 8001884: 693b ldr r3, [r7, #16]
- 8001886: 429a cmp r2, r3
- 8001888: d00b beq.n 80018a2 <_ZN13STM32Hardware5writeEPhi+0x7a>
- memcpy(tbuf, &(data[n_tail]), n - n_tail);
- 800188a: 68fb ldr r3, [r7, #12]
- 800188c: f103 0088 add.w r0, r3, #136 ; 0x88
- 8001890: 693b ldr r3, [r7, #16]
- 8001892: 68ba ldr r2, [r7, #8]
- 8001894: 18d1 adds r1, r2, r3
- 8001896: 697a ldr r2, [r7, #20]
- 8001898: 693b ldr r3, [r7, #16]
- 800189a: 1ad3 subs r3, r2, r3
- 800189c: 461a mov r2, r3
- 800189e: f008 ffdf bl 800a860 <memcpy>
- }
-
- flush();
- 80018a2: 68f8 ldr r0, [r7, #12]
- 80018a4: f7ff ff66 bl 8001774 <_ZN13STM32Hardware5flushEv>
- }
- 80018a8: bf00 nop
- 80018aa: 3718 adds r7, #24
- 80018ac: 46bd mov sp, r7
- 80018ae: bd80 pop {r7, pc}
-
-080018b0 <_ZN13STM32Hardware4timeEv>:
-
- unsigned long time(){ return HAL_GetTick(); }
- 80018b0: b580 push {r7, lr}
- 80018b2: b082 sub sp, #8
- 80018b4: af00 add r7, sp, #0
- 80018b6: 6078 str r0, [r7, #4]
- 80018b8: f003 fd02 bl 80052c0 <HAL_GetTick>
- 80018bc: 4603 mov r3, r0
- 80018be: 4618 mov r0, r3
- 80018c0: 3708 adds r7, #8
- 80018c2: 46bd mov sp, r7
- 80018c4: bd80 pop {r7, pc}
- ...
-
-080018c8 <_ZN8std_msgs6HeaderC1Ev>:
- typedef ros::Time _stamp_type;
- _stamp_type stamp;
- typedef const char* _frame_id_type;
- _frame_id_type frame_id;
-
- Header():
- 80018c8: b580 push {r7, lr}
- 80018ca: b082 sub sp, #8
- 80018cc: af00 add r7, sp, #0
- 80018ce: 6078 str r0, [r7, #4]
- seq(0),
- stamp(),
- frame_id("")
- 80018d0: 687b ldr r3, [r7, #4]
- 80018d2: 4618 mov r0, r3
- 80018d4: f7fe ffbc bl 8000850 <_ZN3ros3MsgC1Ev>
- 80018d8: 4a09 ldr r2, [pc, #36] ; (8001900 <_ZN8std_msgs6HeaderC1Ev+0x38>)
- 80018da: 687b ldr r3, [r7, #4]
- 80018dc: 601a str r2, [r3, #0]
- 80018de: 687b ldr r3, [r7, #4]
- 80018e0: 2200 movs r2, #0
- 80018e2: 605a str r2, [r3, #4]
- 80018e4: 687b ldr r3, [r7, #4]
- 80018e6: 3308 adds r3, #8
- 80018e8: 4618 mov r0, r3
- 80018ea: f7ff f85d bl 80009a8 <_ZN3ros4TimeC1Ev>
- 80018ee: 687b ldr r3, [r7, #4]
- 80018f0: 4a04 ldr r2, [pc, #16] ; (8001904 <_ZN8std_msgs6HeaderC1Ev+0x3c>)
- 80018f2: 611a str r2, [r3, #16]
- {
- }
- 80018f4: 687b ldr r3, [r7, #4]
- 80018f6: 4618 mov r0, r3
- 80018f8: 3708 adds r7, #8
- 80018fa: 46bd mov sp, r7
- 80018fc: bd80 pop {r7, pc}
- 80018fe: bf00 nop
- 8001900: 0800b0a8 .word 0x0800b0a8
- 8001904: 0800ab08 .word 0x0800ab08
-
-08001908 <_ZNK8std_msgs6Header9serializeEPh>:
-
- virtual int serialize(unsigned char *outbuffer) const
- 8001908: b580 push {r7, lr}
- 800190a: b084 sub sp, #16
- 800190c: af00 add r7, sp, #0
- 800190e: 6078 str r0, [r7, #4]
- 8001910: 6039 str r1, [r7, #0]
- {
- int offset = 0;
- 8001912: 2300 movs r3, #0
- 8001914: 60fb str r3, [r7, #12]
- *(outbuffer + offset + 0) = (this->seq >> (8 * 0)) & 0xFF;
- 8001916: 687b ldr r3, [r7, #4]
- 8001918: 6859 ldr r1, [r3, #4]
- 800191a: 68fb ldr r3, [r7, #12]
- 800191c: 683a ldr r2, [r7, #0]
- 800191e: 4413 add r3, r2
- 8001920: b2ca uxtb r2, r1
- 8001922: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 1) = (this->seq >> (8 * 1)) & 0xFF;
- 8001924: 687b ldr r3, [r7, #4]
- 8001926: 685b ldr r3, [r3, #4]
- 8001928: 0a19 lsrs r1, r3, #8
- 800192a: 68fb ldr r3, [r7, #12]
- 800192c: 3301 adds r3, #1
- 800192e: 683a ldr r2, [r7, #0]
- 8001930: 4413 add r3, r2
- 8001932: b2ca uxtb r2, r1
- 8001934: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 2) = (this->seq >> (8 * 2)) & 0xFF;
- 8001936: 687b ldr r3, [r7, #4]
- 8001938: 685b ldr r3, [r3, #4]
- 800193a: 0c19 lsrs r1, r3, #16
- 800193c: 68fb ldr r3, [r7, #12]
- 800193e: 3302 adds r3, #2
- 8001940: 683a ldr r2, [r7, #0]
- 8001942: 4413 add r3, r2
- 8001944: b2ca uxtb r2, r1
- 8001946: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 3) = (this->seq >> (8 * 3)) & 0xFF;
- 8001948: 687b ldr r3, [r7, #4]
- 800194a: 685b ldr r3, [r3, #4]
- 800194c: 0e19 lsrs r1, r3, #24
- 800194e: 68fb ldr r3, [r7, #12]
- 8001950: 3303 adds r3, #3
- 8001952: 683a ldr r2, [r7, #0]
- 8001954: 4413 add r3, r2
- 8001956: b2ca uxtb r2, r1
- 8001958: 701a strb r2, [r3, #0]
- offset += sizeof(this->seq);
- 800195a: 68fb ldr r3, [r7, #12]
- 800195c: 3304 adds r3, #4
- 800195e: 60fb str r3, [r7, #12]
- *(outbuffer + offset + 0) = (this->stamp.sec >> (8 * 0)) & 0xFF;
- 8001960: 687b ldr r3, [r7, #4]
- 8001962: 6899 ldr r1, [r3, #8]
- 8001964: 68fb ldr r3, [r7, #12]
- 8001966: 683a ldr r2, [r7, #0]
- 8001968: 4413 add r3, r2
- 800196a: b2ca uxtb r2, r1
- 800196c: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 1) = (this->stamp.sec >> (8 * 1)) & 0xFF;
- 800196e: 687b ldr r3, [r7, #4]
- 8001970: 689b ldr r3, [r3, #8]
- 8001972: 0a19 lsrs r1, r3, #8
- 8001974: 68fb ldr r3, [r7, #12]
- 8001976: 3301 adds r3, #1
- 8001978: 683a ldr r2, [r7, #0]
- 800197a: 4413 add r3, r2
- 800197c: b2ca uxtb r2, r1
- 800197e: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 2) = (this->stamp.sec >> (8 * 2)) & 0xFF;
- 8001980: 687b ldr r3, [r7, #4]
- 8001982: 689b ldr r3, [r3, #8]
- 8001984: 0c19 lsrs r1, r3, #16
- 8001986: 68fb ldr r3, [r7, #12]
- 8001988: 3302 adds r3, #2
- 800198a: 683a ldr r2, [r7, #0]
- 800198c: 4413 add r3, r2
- 800198e: b2ca uxtb r2, r1
- 8001990: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 3) = (this->stamp.sec >> (8 * 3)) & 0xFF;
- 8001992: 687b ldr r3, [r7, #4]
- 8001994: 689b ldr r3, [r3, #8]
- 8001996: 0e19 lsrs r1, r3, #24
- 8001998: 68fb ldr r3, [r7, #12]
- 800199a: 3303 adds r3, #3
- 800199c: 683a ldr r2, [r7, #0]
- 800199e: 4413 add r3, r2
- 80019a0: b2ca uxtb r2, r1
- 80019a2: 701a strb r2, [r3, #0]
- offset += sizeof(this->stamp.sec);
- 80019a4: 68fb ldr r3, [r7, #12]
- 80019a6: 3304 adds r3, #4
- 80019a8: 60fb str r3, [r7, #12]
- *(outbuffer + offset + 0) = (this->stamp.nsec >> (8 * 0)) & 0xFF;
- 80019aa: 687b ldr r3, [r7, #4]
- 80019ac: 68d9 ldr r1, [r3, #12]
- 80019ae: 68fb ldr r3, [r7, #12]
- 80019b0: 683a ldr r2, [r7, #0]
- 80019b2: 4413 add r3, r2
- 80019b4: b2ca uxtb r2, r1
- 80019b6: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 1) = (this->stamp.nsec >> (8 * 1)) & 0xFF;
- 80019b8: 687b ldr r3, [r7, #4]
- 80019ba: 68db ldr r3, [r3, #12]
- 80019bc: 0a19 lsrs r1, r3, #8
- 80019be: 68fb ldr r3, [r7, #12]
- 80019c0: 3301 adds r3, #1
- 80019c2: 683a ldr r2, [r7, #0]
- 80019c4: 4413 add r3, r2
- 80019c6: b2ca uxtb r2, r1
- 80019c8: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 2) = (this->stamp.nsec >> (8 * 2)) & 0xFF;
- 80019ca: 687b ldr r3, [r7, #4]
- 80019cc: 68db ldr r3, [r3, #12]
- 80019ce: 0c19 lsrs r1, r3, #16
- 80019d0: 68fb ldr r3, [r7, #12]
- 80019d2: 3302 adds r3, #2
- 80019d4: 683a ldr r2, [r7, #0]
- 80019d6: 4413 add r3, r2
- 80019d8: b2ca uxtb r2, r1
- 80019da: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 3) = (this->stamp.nsec >> (8 * 3)) & 0xFF;
- 80019dc: 687b ldr r3, [r7, #4]
- 80019de: 68db ldr r3, [r3, #12]
- 80019e0: 0e19 lsrs r1, r3, #24
- 80019e2: 68fb ldr r3, [r7, #12]
- 80019e4: 3303 adds r3, #3
- 80019e6: 683a ldr r2, [r7, #0]
- 80019e8: 4413 add r3, r2
- 80019ea: b2ca uxtb r2, r1
- 80019ec: 701a strb r2, [r3, #0]
- offset += sizeof(this->stamp.nsec);
- 80019ee: 68fb ldr r3, [r7, #12]
- 80019f0: 3304 adds r3, #4
- 80019f2: 60fb str r3, [r7, #12]
- uint32_t length_frame_id = strlen(this->frame_id);
- 80019f4: 687b ldr r3, [r7, #4]
- 80019f6: 691b ldr r3, [r3, #16]
- 80019f8: 4618 mov r0, r3
- 80019fa: f7fe fc1d bl 8000238 <strlen>
- 80019fe: 60b8 str r0, [r7, #8]
- varToArr(outbuffer + offset, length_frame_id);
- 8001a00: 68fb ldr r3, [r7, #12]
- 8001a02: 683a ldr r2, [r7, #0]
- 8001a04: 4413 add r3, r2
- 8001a06: 68b9 ldr r1, [r7, #8]
- 8001a08: 4618 mov r0, r3
- 8001a0a: f002 f8d0 bl 8003bae <_ZN3ros3Msg8varToArrIPhmEEvT_T0_>
- offset += 4;
- 8001a0e: 68fb ldr r3, [r7, #12]
- 8001a10: 3304 adds r3, #4
- 8001a12: 60fb str r3, [r7, #12]
- memcpy(outbuffer + offset, this->frame_id, length_frame_id);
- 8001a14: 68fb ldr r3, [r7, #12]
- 8001a16: 683a ldr r2, [r7, #0]
- 8001a18: 18d0 adds r0, r2, r3
- 8001a1a: 687b ldr r3, [r7, #4]
- 8001a1c: 691b ldr r3, [r3, #16]
- 8001a1e: 68ba ldr r2, [r7, #8]
- 8001a20: 4619 mov r1, r3
- 8001a22: f008 ff1d bl 800a860 <memcpy>
- offset += length_frame_id;
- 8001a26: 68fa ldr r2, [r7, #12]
- 8001a28: 68bb ldr r3, [r7, #8]
- 8001a2a: 4413 add r3, r2
- 8001a2c: 60fb str r3, [r7, #12]
- return offset;
- 8001a2e: 68fb ldr r3, [r7, #12]
- }
- 8001a30: 4618 mov r0, r3
- 8001a32: 3710 adds r7, #16
- 8001a34: 46bd mov sp, r7
- 8001a36: bd80 pop {r7, pc}
-
-08001a38 <_ZN8std_msgs6Header11deserializeEPh>:
-
- virtual int deserialize(unsigned char *inbuffer)
- 8001a38: b580 push {r7, lr}
- 8001a3a: b086 sub sp, #24
- 8001a3c: af00 add r7, sp, #0
- 8001a3e: 6078 str r0, [r7, #4]
- 8001a40: 6039 str r1, [r7, #0]
- {
- int offset = 0;
- 8001a42: 2300 movs r3, #0
- 8001a44: 613b str r3, [r7, #16]
- this->seq = ((uint32_t) (*(inbuffer + offset)));
- 8001a46: 693b ldr r3, [r7, #16]
- 8001a48: 683a ldr r2, [r7, #0]
- 8001a4a: 4413 add r3, r2
- 8001a4c: 781b ldrb r3, [r3, #0]
- 8001a4e: 461a mov r2, r3
- 8001a50: 687b ldr r3, [r7, #4]
- 8001a52: 605a str r2, [r3, #4]
- this->seq |= ((uint32_t) (*(inbuffer + offset + 1))) << (8 * 1);
- 8001a54: 687b ldr r3, [r7, #4]
- 8001a56: 685a ldr r2, [r3, #4]
- 8001a58: 693b ldr r3, [r7, #16]
- 8001a5a: 3301 adds r3, #1
- 8001a5c: 6839 ldr r1, [r7, #0]
- 8001a5e: 440b add r3, r1
- 8001a60: 781b ldrb r3, [r3, #0]
- 8001a62: 021b lsls r3, r3, #8
- 8001a64: 431a orrs r2, r3
- 8001a66: 687b ldr r3, [r7, #4]
- 8001a68: 605a str r2, [r3, #4]
- this->seq |= ((uint32_t) (*(inbuffer + offset + 2))) << (8 * 2);
- 8001a6a: 687b ldr r3, [r7, #4]
- 8001a6c: 685a ldr r2, [r3, #4]
- 8001a6e: 693b ldr r3, [r7, #16]
- 8001a70: 3302 adds r3, #2
- 8001a72: 6839 ldr r1, [r7, #0]
- 8001a74: 440b add r3, r1
- 8001a76: 781b ldrb r3, [r3, #0]
- 8001a78: 041b lsls r3, r3, #16
- 8001a7a: 431a orrs r2, r3
- 8001a7c: 687b ldr r3, [r7, #4]
- 8001a7e: 605a str r2, [r3, #4]
- this->seq |= ((uint32_t) (*(inbuffer + offset + 3))) << (8 * 3);
- 8001a80: 687b ldr r3, [r7, #4]
- 8001a82: 685a ldr r2, [r3, #4]
- 8001a84: 693b ldr r3, [r7, #16]
- 8001a86: 3303 adds r3, #3
- 8001a88: 6839 ldr r1, [r7, #0]
- 8001a8a: 440b add r3, r1
- 8001a8c: 781b ldrb r3, [r3, #0]
- 8001a8e: 061b lsls r3, r3, #24
- 8001a90: 431a orrs r2, r3
- 8001a92: 687b ldr r3, [r7, #4]
- 8001a94: 605a str r2, [r3, #4]
- offset += sizeof(this->seq);
- 8001a96: 693b ldr r3, [r7, #16]
- 8001a98: 3304 adds r3, #4
- 8001a9a: 613b str r3, [r7, #16]
- this->stamp.sec = ((uint32_t) (*(inbuffer + offset)));
- 8001a9c: 693b ldr r3, [r7, #16]
- 8001a9e: 683a ldr r2, [r7, #0]
- 8001aa0: 4413 add r3, r2
- 8001aa2: 781b ldrb r3, [r3, #0]
- 8001aa4: 461a mov r2, r3
- 8001aa6: 687b ldr r3, [r7, #4]
- 8001aa8: 609a str r2, [r3, #8]
- this->stamp.sec |= ((uint32_t) (*(inbuffer + offset + 1))) << (8 * 1);
- 8001aaa: 687b ldr r3, [r7, #4]
- 8001aac: 689a ldr r2, [r3, #8]
- 8001aae: 693b ldr r3, [r7, #16]
- 8001ab0: 3301 adds r3, #1
- 8001ab2: 6839 ldr r1, [r7, #0]
- 8001ab4: 440b add r3, r1
- 8001ab6: 781b ldrb r3, [r3, #0]
- 8001ab8: 021b lsls r3, r3, #8
- 8001aba: 431a orrs r2, r3
- 8001abc: 687b ldr r3, [r7, #4]
- 8001abe: 609a str r2, [r3, #8]
- this->stamp.sec |= ((uint32_t) (*(inbuffer + offset + 2))) << (8 * 2);
- 8001ac0: 687b ldr r3, [r7, #4]
- 8001ac2: 689a ldr r2, [r3, #8]
- 8001ac4: 693b ldr r3, [r7, #16]
- 8001ac6: 3302 adds r3, #2
- 8001ac8: 6839 ldr r1, [r7, #0]
- 8001aca: 440b add r3, r1
- 8001acc: 781b ldrb r3, [r3, #0]
- 8001ace: 041b lsls r3, r3, #16
- 8001ad0: 431a orrs r2, r3
- 8001ad2: 687b ldr r3, [r7, #4]
- 8001ad4: 609a str r2, [r3, #8]
- this->stamp.sec |= ((uint32_t) (*(inbuffer + offset + 3))) << (8 * 3);
- 8001ad6: 687b ldr r3, [r7, #4]
- 8001ad8: 689a ldr r2, [r3, #8]
- 8001ada: 693b ldr r3, [r7, #16]
- 8001adc: 3303 adds r3, #3
- 8001ade: 6839 ldr r1, [r7, #0]
- 8001ae0: 440b add r3, r1
- 8001ae2: 781b ldrb r3, [r3, #0]
- 8001ae4: 061b lsls r3, r3, #24
- 8001ae6: 431a orrs r2, r3
- 8001ae8: 687b ldr r3, [r7, #4]
- 8001aea: 609a str r2, [r3, #8]
- offset += sizeof(this->stamp.sec);
- 8001aec: 693b ldr r3, [r7, #16]
- 8001aee: 3304 adds r3, #4
- 8001af0: 613b str r3, [r7, #16]
- this->stamp.nsec = ((uint32_t) (*(inbuffer + offset)));
- 8001af2: 693b ldr r3, [r7, #16]
- 8001af4: 683a ldr r2, [r7, #0]
- 8001af6: 4413 add r3, r2
- 8001af8: 781b ldrb r3, [r3, #0]
- 8001afa: 461a mov r2, r3
- 8001afc: 687b ldr r3, [r7, #4]
- 8001afe: 60da str r2, [r3, #12]
- this->stamp.nsec |= ((uint32_t) (*(inbuffer + offset + 1))) << (8 * 1);
- 8001b00: 687b ldr r3, [r7, #4]
- 8001b02: 68da ldr r2, [r3, #12]
- 8001b04: 693b ldr r3, [r7, #16]
- 8001b06: 3301 adds r3, #1
- 8001b08: 6839 ldr r1, [r7, #0]
- 8001b0a: 440b add r3, r1
- 8001b0c: 781b ldrb r3, [r3, #0]
- 8001b0e: 021b lsls r3, r3, #8
- 8001b10: 431a orrs r2, r3
- 8001b12: 687b ldr r3, [r7, #4]
- 8001b14: 60da str r2, [r3, #12]
- this->stamp.nsec |= ((uint32_t) (*(inbuffer + offset + 2))) << (8 * 2);
- 8001b16: 687b ldr r3, [r7, #4]
- 8001b18: 68da ldr r2, [r3, #12]
- 8001b1a: 693b ldr r3, [r7, #16]
- 8001b1c: 3302 adds r3, #2
- 8001b1e: 6839 ldr r1, [r7, #0]
- 8001b20: 440b add r3, r1
- 8001b22: 781b ldrb r3, [r3, #0]
- 8001b24: 041b lsls r3, r3, #16
- 8001b26: 431a orrs r2, r3
- 8001b28: 687b ldr r3, [r7, #4]
- 8001b2a: 60da str r2, [r3, #12]
- this->stamp.nsec |= ((uint32_t) (*(inbuffer + offset + 3))) << (8 * 3);
- 8001b2c: 687b ldr r3, [r7, #4]
- 8001b2e: 68da ldr r2, [r3, #12]
- 8001b30: 693b ldr r3, [r7, #16]
- 8001b32: 3303 adds r3, #3
- 8001b34: 6839 ldr r1, [r7, #0]
- 8001b36: 440b add r3, r1
- 8001b38: 781b ldrb r3, [r3, #0]
- 8001b3a: 061b lsls r3, r3, #24
- 8001b3c: 431a orrs r2, r3
- 8001b3e: 687b ldr r3, [r7, #4]
- 8001b40: 60da str r2, [r3, #12]
- offset += sizeof(this->stamp.nsec);
- 8001b42: 693b ldr r3, [r7, #16]
- 8001b44: 3304 adds r3, #4
- 8001b46: 613b str r3, [r7, #16]
- uint32_t length_frame_id;
- arrToVar(length_frame_id, (inbuffer + offset));
- 8001b48: 693b ldr r3, [r7, #16]
- 8001b4a: 683a ldr r2, [r7, #0]
- 8001b4c: 441a add r2, r3
- 8001b4e: f107 030c add.w r3, r7, #12
- 8001b52: 4611 mov r1, r2
- 8001b54: 4618 mov r0, r3
- 8001b56: f002 f848 bl 8003bea <_ZN3ros3Msg8arrToVarImPhEEvRT_T0_>
- offset += 4;
- 8001b5a: 693b ldr r3, [r7, #16]
- 8001b5c: 3304 adds r3, #4
- 8001b5e: 613b str r3, [r7, #16]
- for(unsigned int k= offset; k< offset+length_frame_id; ++k){
- 8001b60: 693b ldr r3, [r7, #16]
- 8001b62: 617b str r3, [r7, #20]
- 8001b64: 693a ldr r2, [r7, #16]
- 8001b66: 68fb ldr r3, [r7, #12]
- 8001b68: 4413 add r3, r2
- 8001b6a: 697a ldr r2, [r7, #20]
- 8001b6c: 429a cmp r2, r3
- 8001b6e: d20c bcs.n 8001b8a <_ZN8std_msgs6Header11deserializeEPh+0x152>
- inbuffer[k-1]=inbuffer[k];
- 8001b70: 683a ldr r2, [r7, #0]
- 8001b72: 697b ldr r3, [r7, #20]
- 8001b74: 441a add r2, r3
- 8001b76: 697b ldr r3, [r7, #20]
- 8001b78: 3b01 subs r3, #1
- 8001b7a: 6839 ldr r1, [r7, #0]
- 8001b7c: 440b add r3, r1
- 8001b7e: 7812 ldrb r2, [r2, #0]
- 8001b80: 701a strb r2, [r3, #0]
- for(unsigned int k= offset; k< offset+length_frame_id; ++k){
- 8001b82: 697b ldr r3, [r7, #20]
- 8001b84: 3301 adds r3, #1
- 8001b86: 617b str r3, [r7, #20]
- 8001b88: e7ec b.n 8001b64 <_ZN8std_msgs6Header11deserializeEPh+0x12c>
- }
- inbuffer[offset+length_frame_id-1]=0;
- 8001b8a: 693a ldr r2, [r7, #16]
- 8001b8c: 68fb ldr r3, [r7, #12]
- 8001b8e: 4413 add r3, r2
- 8001b90: 3b01 subs r3, #1
- 8001b92: 683a ldr r2, [r7, #0]
- 8001b94: 4413 add r3, r2
- 8001b96: 2200 movs r2, #0
- 8001b98: 701a strb r2, [r3, #0]
- this->frame_id = (char *)(inbuffer + offset-1);
- 8001b9a: 693b ldr r3, [r7, #16]
- 8001b9c: 3b01 subs r3, #1
- 8001b9e: 683a ldr r2, [r7, #0]
- 8001ba0: 441a add r2, r3
- 8001ba2: 687b ldr r3, [r7, #4]
- 8001ba4: 611a str r2, [r3, #16]
- offset += length_frame_id;
- 8001ba6: 693a ldr r2, [r7, #16]
- 8001ba8: 68fb ldr r3, [r7, #12]
- 8001baa: 4413 add r3, r2
- 8001bac: 613b str r3, [r7, #16]
- return offset;
- 8001bae: 693b ldr r3, [r7, #16]
- }
- 8001bb0: 4618 mov r0, r3
- 8001bb2: 3718 adds r7, #24
- 8001bb4: 46bd mov sp, r7
- 8001bb6: bd80 pop {r7, pc}
-
-08001bb8 <_ZN8std_msgs6Header7getTypeEv>:
-
- const char * getType(){ return "std_msgs/Header"; };
- 8001bb8: b480 push {r7}
- 8001bba: b083 sub sp, #12
- 8001bbc: af00 add r7, sp, #0
- 8001bbe: 6078 str r0, [r7, #4]
- 8001bc0: 4b03 ldr r3, [pc, #12] ; (8001bd0 <_ZN8std_msgs6Header7getTypeEv+0x18>)
- 8001bc2: 4618 mov r0, r3
- 8001bc4: 370c adds r7, #12
- 8001bc6: 46bd mov sp, r7
- 8001bc8: f85d 7b04 ldr.w r7, [sp], #4
- 8001bcc: 4770 bx lr
- 8001bce: bf00 nop
- 8001bd0: 0800ac10 .word 0x0800ac10
-
-08001bd4 <_ZN8std_msgs6Header6getMD5Ev>:
- const char * getMD5(){ return "2176decaecbce78abc3b96ef049fabed"; };
- 8001bd4: b480 push {r7}
- 8001bd6: b083 sub sp, #12
- 8001bd8: af00 add r7, sp, #0
- 8001bda: 6078 str r0, [r7, #4]
- 8001bdc: 4b03 ldr r3, [pc, #12] ; (8001bec <_ZN8std_msgs6Header6getMD5Ev+0x18>)
- 8001bde: 4618 mov r0, r3
- 8001be0: 370c adds r7, #12
- 8001be2: 46bd mov sp, r7
- 8001be4: f85d 7b04 ldr.w r7, [sp], #4
- 8001be8: 4770 bx lr
- 8001bea: bf00 nop
- 8001bec: 0800ac20 .word 0x0800ac20
-
-08001bf0 <_ZN13geometry_msgs7Vector3C1Ev>:
- typedef float _y_type;
- _y_type y;
- typedef float _z_type;
- _z_type z;
-
- Vector3():
- 8001bf0: b580 push {r7, lr}
- 8001bf2: b082 sub sp, #8
- 8001bf4: af00 add r7, sp, #0
- 8001bf6: 6078 str r0, [r7, #4]
- x(0),
- y(0),
- z(0)
- 8001bf8: 687b ldr r3, [r7, #4]
- 8001bfa: 4618 mov r0, r3
- 8001bfc: f7fe fe28 bl 8000850 <_ZN3ros3MsgC1Ev>
- 8001c00: 4a09 ldr r2, [pc, #36] ; (8001c28 <_ZN13geometry_msgs7Vector3C1Ev+0x38>)
- 8001c02: 687b ldr r3, [r7, #4]
- 8001c04: 601a str r2, [r3, #0]
- 8001c06: 687b ldr r3, [r7, #4]
- 8001c08: f04f 0200 mov.w r2, #0
- 8001c0c: 605a str r2, [r3, #4]
- 8001c0e: 687b ldr r3, [r7, #4]
- 8001c10: f04f 0200 mov.w r2, #0
- 8001c14: 609a str r2, [r3, #8]
- 8001c16: 687b ldr r3, [r7, #4]
- 8001c18: f04f 0200 mov.w r2, #0
- 8001c1c: 60da str r2, [r3, #12]
- {
- }
- 8001c1e: 687b ldr r3, [r7, #4]
- 8001c20: 4618 mov r0, r3
- 8001c22: 3708 adds r7, #8
- 8001c24: 46bd mov sp, r7
- 8001c26: bd80 pop {r7, pc}
- 8001c28: 0800b090 .word 0x0800b090
-
-08001c2c <_ZNK13geometry_msgs7Vector39serializeEPh>:
-
- virtual int serialize(unsigned char *outbuffer) const
- 8001c2c: b580 push {r7, lr}
- 8001c2e: b084 sub sp, #16
- 8001c30: af00 add r7, sp, #0
- 8001c32: 6078 str r0, [r7, #4]
- 8001c34: 6039 str r1, [r7, #0]
- {
- int offset = 0;
- 8001c36: 2300 movs r3, #0
- 8001c38: 60fb str r3, [r7, #12]
- offset += serializeAvrFloat64(outbuffer + offset, this->x);
- 8001c3a: 68fb ldr r3, [r7, #12]
- 8001c3c: 683a ldr r2, [r7, #0]
- 8001c3e: 441a add r2, r3
- 8001c40: 687b ldr r3, [r7, #4]
- 8001c42: edd3 7a01 vldr s15, [r3, #4]
- 8001c46: eeb0 0a67 vmov.f32 s0, s15
- 8001c4a: 4610 mov r0, r2
- 8001c4c: f7fe fd34 bl 80006b8 <_ZN3ros3Msg19serializeAvrFloat64EPhf>
- 8001c50: 4602 mov r2, r0
- 8001c52: 68fb ldr r3, [r7, #12]
- 8001c54: 4413 add r3, r2
- 8001c56: 60fb str r3, [r7, #12]
- offset += serializeAvrFloat64(outbuffer + offset, this->y);
- 8001c58: 68fb ldr r3, [r7, #12]
- 8001c5a: 683a ldr r2, [r7, #0]
- 8001c5c: 441a add r2, r3
- 8001c5e: 687b ldr r3, [r7, #4]
- 8001c60: edd3 7a02 vldr s15, [r3, #8]
- 8001c64: eeb0 0a67 vmov.f32 s0, s15
- 8001c68: 4610 mov r0, r2
- 8001c6a: f7fe fd25 bl 80006b8 <_ZN3ros3Msg19serializeAvrFloat64EPhf>
- 8001c6e: 4602 mov r2, r0
- 8001c70: 68fb ldr r3, [r7, #12]
- 8001c72: 4413 add r3, r2
- 8001c74: 60fb str r3, [r7, #12]
- offset += serializeAvrFloat64(outbuffer + offset, this->z);
- 8001c76: 68fb ldr r3, [r7, #12]
- 8001c78: 683a ldr r2, [r7, #0]
- 8001c7a: 441a add r2, r3
- 8001c7c: 687b ldr r3, [r7, #4]
- 8001c7e: edd3 7a03 vldr s15, [r3, #12]
- 8001c82: eeb0 0a67 vmov.f32 s0, s15
- 8001c86: 4610 mov r0, r2
- 8001c88: f7fe fd16 bl 80006b8 <_ZN3ros3Msg19serializeAvrFloat64EPhf>
- 8001c8c: 4602 mov r2, r0
- 8001c8e: 68fb ldr r3, [r7, #12]
- 8001c90: 4413 add r3, r2
- 8001c92: 60fb str r3, [r7, #12]
- return offset;
- 8001c94: 68fb ldr r3, [r7, #12]
- }
- 8001c96: 4618 mov r0, r3
- 8001c98: 3710 adds r7, #16
- 8001c9a: 46bd mov sp, r7
- 8001c9c: bd80 pop {r7, pc}
-
-08001c9e <_ZN13geometry_msgs7Vector311deserializeEPh>:
-
- virtual int deserialize(unsigned char *inbuffer)
- 8001c9e: b580 push {r7, lr}
- 8001ca0: b084 sub sp, #16
- 8001ca2: af00 add r7, sp, #0
- 8001ca4: 6078 str r0, [r7, #4]
- 8001ca6: 6039 str r1, [r7, #0]
- {
- int offset = 0;
- 8001ca8: 2300 movs r3, #0
- 8001caa: 60fb str r3, [r7, #12]
- offset += deserializeAvrFloat64(inbuffer + offset, &(this->x));
- 8001cac: 68fb ldr r3, [r7, #12]
- 8001cae: 683a ldr r2, [r7, #0]
- 8001cb0: 441a add r2, r3
- 8001cb2: 687b ldr r3, [r7, #4]
- 8001cb4: 3304 adds r3, #4
- 8001cb6: 4619 mov r1, r3
- 8001cb8: 4610 mov r0, r2
- 8001cba: f7fe fd69 bl 8000790 <_ZN3ros3Msg21deserializeAvrFloat64EPKhPf>
- 8001cbe: 4602 mov r2, r0
- 8001cc0: 68fb ldr r3, [r7, #12]
- 8001cc2: 4413 add r3, r2
- 8001cc4: 60fb str r3, [r7, #12]
- offset += deserializeAvrFloat64(inbuffer + offset, &(this->y));
- 8001cc6: 68fb ldr r3, [r7, #12]
- 8001cc8: 683a ldr r2, [r7, #0]
- 8001cca: 441a add r2, r3
- 8001ccc: 687b ldr r3, [r7, #4]
- 8001cce: 3308 adds r3, #8
- 8001cd0: 4619 mov r1, r3
- 8001cd2: 4610 mov r0, r2
- 8001cd4: f7fe fd5c bl 8000790 <_ZN3ros3Msg21deserializeAvrFloat64EPKhPf>
- 8001cd8: 4602 mov r2, r0
- 8001cda: 68fb ldr r3, [r7, #12]
- 8001cdc: 4413 add r3, r2
- 8001cde: 60fb str r3, [r7, #12]
- offset += deserializeAvrFloat64(inbuffer + offset, &(this->z));
- 8001ce0: 68fb ldr r3, [r7, #12]
- 8001ce2: 683a ldr r2, [r7, #0]
- 8001ce4: 441a add r2, r3
- 8001ce6: 687b ldr r3, [r7, #4]
- 8001ce8: 330c adds r3, #12
- 8001cea: 4619 mov r1, r3
- 8001cec: 4610 mov r0, r2
- 8001cee: f7fe fd4f bl 8000790 <_ZN3ros3Msg21deserializeAvrFloat64EPKhPf>
- 8001cf2: 4602 mov r2, r0
- 8001cf4: 68fb ldr r3, [r7, #12]
- 8001cf6: 4413 add r3, r2
- 8001cf8: 60fb str r3, [r7, #12]
- return offset;
- 8001cfa: 68fb ldr r3, [r7, #12]
- }
- 8001cfc: 4618 mov r0, r3
- 8001cfe: 3710 adds r7, #16
- 8001d00: 46bd mov sp, r7
- 8001d02: bd80 pop {r7, pc}
-
-08001d04 <_ZN13geometry_msgs7Vector37getTypeEv>:
-
- const char * getType(){ return "geometry_msgs/Vector3"; };
- 8001d04: b480 push {r7}
- 8001d06: b083 sub sp, #12
- 8001d08: af00 add r7, sp, #0
- 8001d0a: 6078 str r0, [r7, #4]
- 8001d0c: 4b03 ldr r3, [pc, #12] ; (8001d1c <_ZN13geometry_msgs7Vector37getTypeEv+0x18>)
- 8001d0e: 4618 mov r0, r3
- 8001d10: 370c adds r7, #12
- 8001d12: 46bd mov sp, r7
- 8001d14: f85d 7b04 ldr.w r7, [sp], #4
- 8001d18: 4770 bx lr
- 8001d1a: bf00 nop
- 8001d1c: 0800ac44 .word 0x0800ac44
-
-08001d20 <_ZN13geometry_msgs7Vector36getMD5Ev>:
- const char * getMD5(){ return "4a842b65f413084dc2b10fb484ea7f17"; };
- 8001d20: b480 push {r7}
- 8001d22: b083 sub sp, #12
- 8001d24: af00 add r7, sp, #0
- 8001d26: 6078 str r0, [r7, #4]
- 8001d28: 4b03 ldr r3, [pc, #12] ; (8001d38 <_ZN13geometry_msgs7Vector36getMD5Ev+0x18>)
- 8001d2a: 4618 mov r0, r3
- 8001d2c: 370c adds r7, #12
- 8001d2e: 46bd mov sp, r7
- 8001d30: f85d 7b04 ldr.w r7, [sp], #4
- 8001d34: 4770 bx lr
- 8001d36: bf00 nop
- 8001d38: 0800ac5c .word 0x0800ac5c
-
-08001d3c <_ZN13geometry_msgs10QuaternionC1Ev>:
- typedef float _z_type;
- _z_type z;
- typedef float _w_type;
- _w_type w;
-
- Quaternion():
- 8001d3c: b580 push {r7, lr}
- 8001d3e: b082 sub sp, #8
- 8001d40: af00 add r7, sp, #0
- 8001d42: 6078 str r0, [r7, #4]
- x(0),
- y(0),
- z(0),
- w(0)
- 8001d44: 687b ldr r3, [r7, #4]
- 8001d46: 4618 mov r0, r3
- 8001d48: f7fe fd82 bl 8000850 <_ZN3ros3MsgC1Ev>
- 8001d4c: 4a0b ldr r2, [pc, #44] ; (8001d7c <_ZN13geometry_msgs10QuaternionC1Ev+0x40>)
- 8001d4e: 687b ldr r3, [r7, #4]
- 8001d50: 601a str r2, [r3, #0]
- 8001d52: 687b ldr r3, [r7, #4]
- 8001d54: f04f 0200 mov.w r2, #0
- 8001d58: 605a str r2, [r3, #4]
- 8001d5a: 687b ldr r3, [r7, #4]
- 8001d5c: f04f 0200 mov.w r2, #0
- 8001d60: 609a str r2, [r3, #8]
- 8001d62: 687b ldr r3, [r7, #4]
- 8001d64: f04f 0200 mov.w r2, #0
- 8001d68: 60da str r2, [r3, #12]
- 8001d6a: 687b ldr r3, [r7, #4]
- 8001d6c: f04f 0200 mov.w r2, #0
- 8001d70: 611a str r2, [r3, #16]
- {
- }
- 8001d72: 687b ldr r3, [r7, #4]
- 8001d74: 4618 mov r0, r3
- 8001d76: 3708 adds r7, #8
- 8001d78: 46bd mov sp, r7
- 8001d7a: bd80 pop {r7, pc}
- 8001d7c: 0800b078 .word 0x0800b078
-
-08001d80 <_ZNK13geometry_msgs10Quaternion9serializeEPh>:
-
- virtual int serialize(unsigned char *outbuffer) const
- 8001d80: b580 push {r7, lr}
- 8001d82: b084 sub sp, #16
- 8001d84: af00 add r7, sp, #0
- 8001d86: 6078 str r0, [r7, #4]
- 8001d88: 6039 str r1, [r7, #0]
- {
- int offset = 0;
- 8001d8a: 2300 movs r3, #0
- 8001d8c: 60fb str r3, [r7, #12]
- offset += serializeAvrFloat64(outbuffer + offset, this->x);
- 8001d8e: 68fb ldr r3, [r7, #12]
- 8001d90: 683a ldr r2, [r7, #0]
- 8001d92: 441a add r2, r3
- 8001d94: 687b ldr r3, [r7, #4]
- 8001d96: edd3 7a01 vldr s15, [r3, #4]
- 8001d9a: eeb0 0a67 vmov.f32 s0, s15
- 8001d9e: 4610 mov r0, r2
- 8001da0: f7fe fc8a bl 80006b8 <_ZN3ros3Msg19serializeAvrFloat64EPhf>
- 8001da4: 4602 mov r2, r0
- 8001da6: 68fb ldr r3, [r7, #12]
- 8001da8: 4413 add r3, r2
- 8001daa: 60fb str r3, [r7, #12]
- offset += serializeAvrFloat64(outbuffer + offset, this->y);
- 8001dac: 68fb ldr r3, [r7, #12]
- 8001dae: 683a ldr r2, [r7, #0]
- 8001db0: 441a add r2, r3
- 8001db2: 687b ldr r3, [r7, #4]
- 8001db4: edd3 7a02 vldr s15, [r3, #8]
- 8001db8: eeb0 0a67 vmov.f32 s0, s15
- 8001dbc: 4610 mov r0, r2
- 8001dbe: f7fe fc7b bl 80006b8 <_ZN3ros3Msg19serializeAvrFloat64EPhf>
- 8001dc2: 4602 mov r2, r0
- 8001dc4: 68fb ldr r3, [r7, #12]
- 8001dc6: 4413 add r3, r2
- 8001dc8: 60fb str r3, [r7, #12]
- offset += serializeAvrFloat64(outbuffer + offset, this->z);
- 8001dca: 68fb ldr r3, [r7, #12]
- 8001dcc: 683a ldr r2, [r7, #0]
- 8001dce: 441a add r2, r3
- 8001dd0: 687b ldr r3, [r7, #4]
- 8001dd2: edd3 7a03 vldr s15, [r3, #12]
- 8001dd6: eeb0 0a67 vmov.f32 s0, s15
- 8001dda: 4610 mov r0, r2
- 8001ddc: f7fe fc6c bl 80006b8 <_ZN3ros3Msg19serializeAvrFloat64EPhf>
- 8001de0: 4602 mov r2, r0
- 8001de2: 68fb ldr r3, [r7, #12]
- 8001de4: 4413 add r3, r2
- 8001de6: 60fb str r3, [r7, #12]
- offset += serializeAvrFloat64(outbuffer + offset, this->w);
- 8001de8: 68fb ldr r3, [r7, #12]
- 8001dea: 683a ldr r2, [r7, #0]
- 8001dec: 441a add r2, r3
- 8001dee: 687b ldr r3, [r7, #4]
- 8001df0: edd3 7a04 vldr s15, [r3, #16]
- 8001df4: eeb0 0a67 vmov.f32 s0, s15
- 8001df8: 4610 mov r0, r2
- 8001dfa: f7fe fc5d bl 80006b8 <_ZN3ros3Msg19serializeAvrFloat64EPhf>
- 8001dfe: 4602 mov r2, r0
- 8001e00: 68fb ldr r3, [r7, #12]
- 8001e02: 4413 add r3, r2
- 8001e04: 60fb str r3, [r7, #12]
- return offset;
- 8001e06: 68fb ldr r3, [r7, #12]
- }
- 8001e08: 4618 mov r0, r3
- 8001e0a: 3710 adds r7, #16
- 8001e0c: 46bd mov sp, r7
- 8001e0e: bd80 pop {r7, pc}
-
-08001e10 <_ZN13geometry_msgs10Quaternion11deserializeEPh>:
-
- virtual int deserialize(unsigned char *inbuffer)
- 8001e10: b580 push {r7, lr}
- 8001e12: b084 sub sp, #16
- 8001e14: af00 add r7, sp, #0
- 8001e16: 6078 str r0, [r7, #4]
- 8001e18: 6039 str r1, [r7, #0]
- {
- int offset = 0;
- 8001e1a: 2300 movs r3, #0
- 8001e1c: 60fb str r3, [r7, #12]
- offset += deserializeAvrFloat64(inbuffer + offset, &(this->x));
- 8001e1e: 68fb ldr r3, [r7, #12]
- 8001e20: 683a ldr r2, [r7, #0]
- 8001e22: 441a add r2, r3
- 8001e24: 687b ldr r3, [r7, #4]
- 8001e26: 3304 adds r3, #4
- 8001e28: 4619 mov r1, r3
- 8001e2a: 4610 mov r0, r2
- 8001e2c: f7fe fcb0 bl 8000790 <_ZN3ros3Msg21deserializeAvrFloat64EPKhPf>
- 8001e30: 4602 mov r2, r0
- 8001e32: 68fb ldr r3, [r7, #12]
- 8001e34: 4413 add r3, r2
- 8001e36: 60fb str r3, [r7, #12]
- offset += deserializeAvrFloat64(inbuffer + offset, &(this->y));
- 8001e38: 68fb ldr r3, [r7, #12]
- 8001e3a: 683a ldr r2, [r7, #0]
- 8001e3c: 441a add r2, r3
- 8001e3e: 687b ldr r3, [r7, #4]
- 8001e40: 3308 adds r3, #8
- 8001e42: 4619 mov r1, r3
- 8001e44: 4610 mov r0, r2
- 8001e46: f7fe fca3 bl 8000790 <_ZN3ros3Msg21deserializeAvrFloat64EPKhPf>
- 8001e4a: 4602 mov r2, r0
- 8001e4c: 68fb ldr r3, [r7, #12]
- 8001e4e: 4413 add r3, r2
- 8001e50: 60fb str r3, [r7, #12]
- offset += deserializeAvrFloat64(inbuffer + offset, &(this->z));
- 8001e52: 68fb ldr r3, [r7, #12]
- 8001e54: 683a ldr r2, [r7, #0]
- 8001e56: 441a add r2, r3
- 8001e58: 687b ldr r3, [r7, #4]
- 8001e5a: 330c adds r3, #12
- 8001e5c: 4619 mov r1, r3
- 8001e5e: 4610 mov r0, r2
- 8001e60: f7fe fc96 bl 8000790 <_ZN3ros3Msg21deserializeAvrFloat64EPKhPf>
- 8001e64: 4602 mov r2, r0
- 8001e66: 68fb ldr r3, [r7, #12]
- 8001e68: 4413 add r3, r2
- 8001e6a: 60fb str r3, [r7, #12]
- offset += deserializeAvrFloat64(inbuffer + offset, &(this->w));
- 8001e6c: 68fb ldr r3, [r7, #12]
- 8001e6e: 683a ldr r2, [r7, #0]
- 8001e70: 441a add r2, r3
- 8001e72: 687b ldr r3, [r7, #4]
- 8001e74: 3310 adds r3, #16
- 8001e76: 4619 mov r1, r3
- 8001e78: 4610 mov r0, r2
- 8001e7a: f7fe fc89 bl 8000790 <_ZN3ros3Msg21deserializeAvrFloat64EPKhPf>
- 8001e7e: 4602 mov r2, r0
- 8001e80: 68fb ldr r3, [r7, #12]
- 8001e82: 4413 add r3, r2
- 8001e84: 60fb str r3, [r7, #12]
- return offset;
- 8001e86: 68fb ldr r3, [r7, #12]
- }
- 8001e88: 4618 mov r0, r3
- 8001e8a: 3710 adds r7, #16
- 8001e8c: 46bd mov sp, r7
- 8001e8e: bd80 pop {r7, pc}
-
-08001e90 <_ZN13geometry_msgs10Quaternion7getTypeEv>:
-
- const char * getType(){ return "geometry_msgs/Quaternion"; };
- 8001e90: b480 push {r7}
- 8001e92: b083 sub sp, #12
- 8001e94: af00 add r7, sp, #0
- 8001e96: 6078 str r0, [r7, #4]
- 8001e98: 4b03 ldr r3, [pc, #12] ; (8001ea8 <_ZN13geometry_msgs10Quaternion7getTypeEv+0x18>)
- 8001e9a: 4618 mov r0, r3
- 8001e9c: 370c adds r7, #12
- 8001e9e: 46bd mov sp, r7
- 8001ea0: f85d 7b04 ldr.w r7, [sp], #4
- 8001ea4: 4770 bx lr
- 8001ea6: bf00 nop
- 8001ea8: 0800ac80 .word 0x0800ac80
-
-08001eac <_ZN13geometry_msgs10Quaternion6getMD5Ev>:
- const char * getMD5(){ return "a779879fadf0160734f906b8c19c7004"; };
- 8001eac: b480 push {r7}
- 8001eae: b083 sub sp, #12
- 8001eb0: af00 add r7, sp, #0
- 8001eb2: 6078 str r0, [r7, #4]
- 8001eb4: 4b03 ldr r3, [pc, #12] ; (8001ec4 <_ZN13geometry_msgs10Quaternion6getMD5Ev+0x18>)
- 8001eb6: 4618 mov r0, r3
- 8001eb8: 370c adds r7, #12
- 8001eba: 46bd mov sp, r7
- 8001ebc: f85d 7b04 ldr.w r7, [sp], #4
- 8001ec0: 4770 bx lr
- 8001ec2: bf00 nop
- 8001ec4: 0800ac9c .word 0x0800ac9c
-
-08001ec8 <_ZN13geometry_msgs9TransformC1Ev>:
- typedef geometry_msgs::Vector3 _translation_type;
- _translation_type translation;
- typedef geometry_msgs::Quaternion _rotation_type;
- _rotation_type rotation;
-
- Transform():
- 8001ec8: b580 push {r7, lr}
- 8001eca: b082 sub sp, #8
- 8001ecc: af00 add r7, sp, #0
- 8001ece: 6078 str r0, [r7, #4]
- translation(),
- rotation()
- 8001ed0: 687b ldr r3, [r7, #4]
- 8001ed2: 4618 mov r0, r3
- 8001ed4: f7fe fcbc bl 8000850 <_ZN3ros3MsgC1Ev>
- 8001ed8: 4a08 ldr r2, [pc, #32] ; (8001efc <_ZN13geometry_msgs9TransformC1Ev+0x34>)
- 8001eda: 687b ldr r3, [r7, #4]
- 8001edc: 601a str r2, [r3, #0]
- 8001ede: 687b ldr r3, [r7, #4]
- 8001ee0: 3304 adds r3, #4
- 8001ee2: 4618 mov r0, r3
- 8001ee4: f7ff fe84 bl 8001bf0 <_ZN13geometry_msgs7Vector3C1Ev>
- 8001ee8: 687b ldr r3, [r7, #4]
- 8001eea: 3314 adds r3, #20
- 8001eec: 4618 mov r0, r3
- 8001eee: f7ff ff25 bl 8001d3c <_ZN13geometry_msgs10QuaternionC1Ev>
- {
- }
- 8001ef2: 687b ldr r3, [r7, #4]
- 8001ef4: 4618 mov r0, r3
- 8001ef6: 3708 adds r7, #8
- 8001ef8: 46bd mov sp, r7
- 8001efa: bd80 pop {r7, pc}
- 8001efc: 0800b060 .word 0x0800b060
-
-08001f00 <_ZNK13geometry_msgs9Transform9serializeEPh>:
-
- virtual int serialize(unsigned char *outbuffer) const
- 8001f00: b580 push {r7, lr}
- 8001f02: b084 sub sp, #16
- 8001f04: af00 add r7, sp, #0
- 8001f06: 6078 str r0, [r7, #4]
- 8001f08: 6039 str r1, [r7, #0]
- {
- int offset = 0;
- 8001f0a: 2300 movs r3, #0
- 8001f0c: 60fb str r3, [r7, #12]
- offset += this->translation.serialize(outbuffer + offset);
- 8001f0e: 687b ldr r3, [r7, #4]
- 8001f10: 1d18 adds r0, r3, #4
- 8001f12: 68fb ldr r3, [r7, #12]
- 8001f14: 683a ldr r2, [r7, #0]
- 8001f16: 4413 add r3, r2
- 8001f18: 4619 mov r1, r3
- 8001f1a: f7ff fe87 bl 8001c2c <_ZNK13geometry_msgs7Vector39serializeEPh>
- 8001f1e: 4602 mov r2, r0
- 8001f20: 68fb ldr r3, [r7, #12]
- 8001f22: 4413 add r3, r2
- 8001f24: 60fb str r3, [r7, #12]
- offset += this->rotation.serialize(outbuffer + offset);
- 8001f26: 687b ldr r3, [r7, #4]
- 8001f28: f103 0014 add.w r0, r3, #20
- 8001f2c: 68fb ldr r3, [r7, #12]
- 8001f2e: 683a ldr r2, [r7, #0]
- 8001f30: 4413 add r3, r2
- 8001f32: 4619 mov r1, r3
- 8001f34: f7ff ff24 bl 8001d80 <_ZNK13geometry_msgs10Quaternion9serializeEPh>
- 8001f38: 4602 mov r2, r0
- 8001f3a: 68fb ldr r3, [r7, #12]
- 8001f3c: 4413 add r3, r2
- 8001f3e: 60fb str r3, [r7, #12]
- return offset;
- 8001f40: 68fb ldr r3, [r7, #12]
- }
- 8001f42: 4618 mov r0, r3
- 8001f44: 3710 adds r7, #16
- 8001f46: 46bd mov sp, r7
- 8001f48: bd80 pop {r7, pc}
-
-08001f4a <_ZN13geometry_msgs9Transform11deserializeEPh>:
-
- virtual int deserialize(unsigned char *inbuffer)
- 8001f4a: b580 push {r7, lr}
- 8001f4c: b084 sub sp, #16
- 8001f4e: af00 add r7, sp, #0
- 8001f50: 6078 str r0, [r7, #4]
- 8001f52: 6039 str r1, [r7, #0]
- {
- int offset = 0;
- 8001f54: 2300 movs r3, #0
- 8001f56: 60fb str r3, [r7, #12]
- offset += this->translation.deserialize(inbuffer + offset);
- 8001f58: 687b ldr r3, [r7, #4]
- 8001f5a: 1d18 adds r0, r3, #4
- 8001f5c: 68fb ldr r3, [r7, #12]
- 8001f5e: 683a ldr r2, [r7, #0]
- 8001f60: 4413 add r3, r2
- 8001f62: 4619 mov r1, r3
- 8001f64: f7ff fe9b bl 8001c9e <_ZN13geometry_msgs7Vector311deserializeEPh>
- 8001f68: 4602 mov r2, r0
- 8001f6a: 68fb ldr r3, [r7, #12]
- 8001f6c: 4413 add r3, r2
- 8001f6e: 60fb str r3, [r7, #12]
- offset += this->rotation.deserialize(inbuffer + offset);
- 8001f70: 687b ldr r3, [r7, #4]
- 8001f72: f103 0014 add.w r0, r3, #20
- 8001f76: 68fb ldr r3, [r7, #12]
- 8001f78: 683a ldr r2, [r7, #0]
- 8001f7a: 4413 add r3, r2
- 8001f7c: 4619 mov r1, r3
- 8001f7e: f7ff ff47 bl 8001e10 <_ZN13geometry_msgs10Quaternion11deserializeEPh>
- 8001f82: 4602 mov r2, r0
- 8001f84: 68fb ldr r3, [r7, #12]
- 8001f86: 4413 add r3, r2
- 8001f88: 60fb str r3, [r7, #12]
- return offset;
- 8001f8a: 68fb ldr r3, [r7, #12]
- }
- 8001f8c: 4618 mov r0, r3
- 8001f8e: 3710 adds r7, #16
- 8001f90: 46bd mov sp, r7
- 8001f92: bd80 pop {r7, pc}
-
-08001f94 <_ZN13geometry_msgs9Transform7getTypeEv>:
-
- const char * getType(){ return "geometry_msgs/Transform"; };
- 8001f94: b480 push {r7}
- 8001f96: b083 sub sp, #12
- 8001f98: af00 add r7, sp, #0
- 8001f9a: 6078 str r0, [r7, #4]
- 8001f9c: 4b03 ldr r3, [pc, #12] ; (8001fac <_ZN13geometry_msgs9Transform7getTypeEv+0x18>)
- 8001f9e: 4618 mov r0, r3
- 8001fa0: 370c adds r7, #12
- 8001fa2: 46bd mov sp, r7
- 8001fa4: f85d 7b04 ldr.w r7, [sp], #4
- 8001fa8: 4770 bx lr
- 8001faa: bf00 nop
- 8001fac: 0800acc0 .word 0x0800acc0
-
-08001fb0 <_ZN13geometry_msgs9Transform6getMD5Ev>:
- const char * getMD5(){ return "ac9eff44abf714214112b05d54a3cf9b"; };
- 8001fb0: b480 push {r7}
- 8001fb2: b083 sub sp, #12
- 8001fb4: af00 add r7, sp, #0
- 8001fb6: 6078 str r0, [r7, #4]
- 8001fb8: 4b03 ldr r3, [pc, #12] ; (8001fc8 <_ZN13geometry_msgs9Transform6getMD5Ev+0x18>)
- 8001fba: 4618 mov r0, r3
- 8001fbc: 370c adds r7, #12
- 8001fbe: 46bd mov sp, r7
- 8001fc0: f85d 7b04 ldr.w r7, [sp], #4
- 8001fc4: 4770 bx lr
- 8001fc6: bf00 nop
- 8001fc8: 0800acd8 .word 0x0800acd8
-
-08001fcc <_ZN13geometry_msgs16TransformStampedC1Ev>:
- typedef const char* _child_frame_id_type;
- _child_frame_id_type child_frame_id;
- typedef geometry_msgs::Transform _transform_type;
- _transform_type transform;
-
- TransformStamped():
- 8001fcc: b580 push {r7, lr}
- 8001fce: b082 sub sp, #8
- 8001fd0: af00 add r7, sp, #0
- 8001fd2: 6078 str r0, [r7, #4]
- header(),
- child_frame_id(""),
- transform()
- 8001fd4: 687b ldr r3, [r7, #4]
- 8001fd6: 4618 mov r0, r3
- 8001fd8: f7fe fc3a bl 8000850 <_ZN3ros3MsgC1Ev>
- 8001fdc: 4a0a ldr r2, [pc, #40] ; (8002008 <_ZN13geometry_msgs16TransformStampedC1Ev+0x3c>)
- 8001fde: 687b ldr r3, [r7, #4]
- 8001fe0: 601a str r2, [r3, #0]
- 8001fe2: 687b ldr r3, [r7, #4]
- 8001fe4: 3304 adds r3, #4
- 8001fe6: 4618 mov r0, r3
- 8001fe8: f7ff fc6e bl 80018c8 <_ZN8std_msgs6HeaderC1Ev>
- 8001fec: 687b ldr r3, [r7, #4]
- 8001fee: 4a07 ldr r2, [pc, #28] ; (800200c <_ZN13geometry_msgs16TransformStampedC1Ev+0x40>)
- 8001ff0: 619a str r2, [r3, #24]
- 8001ff2: 687b ldr r3, [r7, #4]
- 8001ff4: 331c adds r3, #28
- 8001ff6: 4618 mov r0, r3
- 8001ff8: f7ff ff66 bl 8001ec8 <_ZN13geometry_msgs9TransformC1Ev>
- {
- }
- 8001ffc: 687b ldr r3, [r7, #4]
- 8001ffe: 4618 mov r0, r3
- 8002000: 3708 adds r7, #8
- 8002002: 46bd mov sp, r7
- 8002004: bd80 pop {r7, pc}
- 8002006: bf00 nop
- 8002008: 0800b048 .word 0x0800b048
- 800200c: 0800ab08 .word 0x0800ab08
-
-08002010 <_ZNK13geometry_msgs16TransformStamped9serializeEPh>:
-
- virtual int serialize(unsigned char *outbuffer) const
- 8002010: b580 push {r7, lr}
- 8002012: b084 sub sp, #16
- 8002014: af00 add r7, sp, #0
- 8002016: 6078 str r0, [r7, #4]
- 8002018: 6039 str r1, [r7, #0]
- {
- int offset = 0;
- 800201a: 2300 movs r3, #0
- 800201c: 60fb str r3, [r7, #12]
- offset += this->header.serialize(outbuffer + offset);
- 800201e: 687b ldr r3, [r7, #4]
- 8002020: 1d18 adds r0, r3, #4
- 8002022: 68fb ldr r3, [r7, #12]
- 8002024: 683a ldr r2, [r7, #0]
- 8002026: 4413 add r3, r2
- 8002028: 4619 mov r1, r3
- 800202a: f7ff fc6d bl 8001908 <_ZNK8std_msgs6Header9serializeEPh>
- 800202e: 4602 mov r2, r0
- 8002030: 68fb ldr r3, [r7, #12]
- 8002032: 4413 add r3, r2
- 8002034: 60fb str r3, [r7, #12]
- uint32_t length_child_frame_id = strlen(this->child_frame_id);
- 8002036: 687b ldr r3, [r7, #4]
- 8002038: 699b ldr r3, [r3, #24]
- 800203a: 4618 mov r0, r3
- 800203c: f7fe f8fc bl 8000238 <strlen>
- 8002040: 60b8 str r0, [r7, #8]
- varToArr(outbuffer + offset, length_child_frame_id);
- 8002042: 68fb ldr r3, [r7, #12]
- 8002044: 683a ldr r2, [r7, #0]
- 8002046: 4413 add r3, r2
- 8002048: 68b9 ldr r1, [r7, #8]
- 800204a: 4618 mov r0, r3
- 800204c: f001 fdaf bl 8003bae <_ZN3ros3Msg8varToArrIPhmEEvT_T0_>
- offset += 4;
- 8002050: 68fb ldr r3, [r7, #12]
- 8002052: 3304 adds r3, #4
- 8002054: 60fb str r3, [r7, #12]
- memcpy(outbuffer + offset, this->child_frame_id, length_child_frame_id);
- 8002056: 68fb ldr r3, [r7, #12]
- 8002058: 683a ldr r2, [r7, #0]
- 800205a: 18d0 adds r0, r2, r3
- 800205c: 687b ldr r3, [r7, #4]
- 800205e: 699b ldr r3, [r3, #24]
- 8002060: 68ba ldr r2, [r7, #8]
- 8002062: 4619 mov r1, r3
- 8002064: f008 fbfc bl 800a860 <memcpy>
- offset += length_child_frame_id;
- 8002068: 68fa ldr r2, [r7, #12]
- 800206a: 68bb ldr r3, [r7, #8]
- 800206c: 4413 add r3, r2
- 800206e: 60fb str r3, [r7, #12]
- offset += this->transform.serialize(outbuffer + offset);
- 8002070: 687b ldr r3, [r7, #4]
- 8002072: f103 001c add.w r0, r3, #28
- 8002076: 68fb ldr r3, [r7, #12]
- 8002078: 683a ldr r2, [r7, #0]
- 800207a: 4413 add r3, r2
- 800207c: 4619 mov r1, r3
- 800207e: f7ff ff3f bl 8001f00 <_ZNK13geometry_msgs9Transform9serializeEPh>
- 8002082: 4602 mov r2, r0
- 8002084: 68fb ldr r3, [r7, #12]
- 8002086: 4413 add r3, r2
- 8002088: 60fb str r3, [r7, #12]
- return offset;
- 800208a: 68fb ldr r3, [r7, #12]
- }
- 800208c: 4618 mov r0, r3
- 800208e: 3710 adds r7, #16
- 8002090: 46bd mov sp, r7
- 8002092: bd80 pop {r7, pc}
-
-08002094 <_ZN13geometry_msgs16TransformStamped11deserializeEPh>:
-
- virtual int deserialize(unsigned char *inbuffer)
- 8002094: b580 push {r7, lr}
- 8002096: b086 sub sp, #24
- 8002098: af00 add r7, sp, #0
- 800209a: 6078 str r0, [r7, #4]
- 800209c: 6039 str r1, [r7, #0]
- {
- int offset = 0;
- 800209e: 2300 movs r3, #0
- 80020a0: 613b str r3, [r7, #16]
- offset += this->header.deserialize(inbuffer + offset);
- 80020a2: 687b ldr r3, [r7, #4]
- 80020a4: 1d18 adds r0, r3, #4
- 80020a6: 693b ldr r3, [r7, #16]
- 80020a8: 683a ldr r2, [r7, #0]
- 80020aa: 4413 add r3, r2
- 80020ac: 4619 mov r1, r3
- 80020ae: f7ff fcc3 bl 8001a38 <_ZN8std_msgs6Header11deserializeEPh>
- 80020b2: 4602 mov r2, r0
- 80020b4: 693b ldr r3, [r7, #16]
- 80020b6: 4413 add r3, r2
- 80020b8: 613b str r3, [r7, #16]
- uint32_t length_child_frame_id;
- arrToVar(length_child_frame_id, (inbuffer + offset));
- 80020ba: 693b ldr r3, [r7, #16]
- 80020bc: 683a ldr r2, [r7, #0]
- 80020be: 441a add r2, r3
- 80020c0: f107 030c add.w r3, r7, #12
- 80020c4: 4611 mov r1, r2
- 80020c6: 4618 mov r0, r3
- 80020c8: f001 fd8f bl 8003bea <_ZN3ros3Msg8arrToVarImPhEEvRT_T0_>
- offset += 4;
- 80020cc: 693b ldr r3, [r7, #16]
- 80020ce: 3304 adds r3, #4
- 80020d0: 613b str r3, [r7, #16]
- for(unsigned int k= offset; k< offset+length_child_frame_id; ++k){
- 80020d2: 693b ldr r3, [r7, #16]
- 80020d4: 617b str r3, [r7, #20]
- 80020d6: 693a ldr r2, [r7, #16]
- 80020d8: 68fb ldr r3, [r7, #12]
- 80020da: 4413 add r3, r2
- 80020dc: 697a ldr r2, [r7, #20]
- 80020de: 429a cmp r2, r3
- 80020e0: d20c bcs.n 80020fc <_ZN13geometry_msgs16TransformStamped11deserializeEPh+0x68>
- inbuffer[k-1]=inbuffer[k];
- 80020e2: 683a ldr r2, [r7, #0]
- 80020e4: 697b ldr r3, [r7, #20]
- 80020e6: 441a add r2, r3
- 80020e8: 697b ldr r3, [r7, #20]
- 80020ea: 3b01 subs r3, #1
- 80020ec: 6839 ldr r1, [r7, #0]
- 80020ee: 440b add r3, r1
- 80020f0: 7812 ldrb r2, [r2, #0]
- 80020f2: 701a strb r2, [r3, #0]
- for(unsigned int k= offset; k< offset+length_child_frame_id; ++k){
- 80020f4: 697b ldr r3, [r7, #20]
- 80020f6: 3301 adds r3, #1
- 80020f8: 617b str r3, [r7, #20]
- 80020fa: e7ec b.n 80020d6 <_ZN13geometry_msgs16TransformStamped11deserializeEPh+0x42>
- }
- inbuffer[offset+length_child_frame_id-1]=0;
- 80020fc: 693a ldr r2, [r7, #16]
- 80020fe: 68fb ldr r3, [r7, #12]
- 8002100: 4413 add r3, r2
- 8002102: 3b01 subs r3, #1
- 8002104: 683a ldr r2, [r7, #0]
- 8002106: 4413 add r3, r2
- 8002108: 2200 movs r2, #0
- 800210a: 701a strb r2, [r3, #0]
- this->child_frame_id = (char *)(inbuffer + offset-1);
- 800210c: 693b ldr r3, [r7, #16]
- 800210e: 3b01 subs r3, #1
- 8002110: 683a ldr r2, [r7, #0]
- 8002112: 441a add r2, r3
- 8002114: 687b ldr r3, [r7, #4]
- 8002116: 619a str r2, [r3, #24]
- offset += length_child_frame_id;
- 8002118: 693a ldr r2, [r7, #16]
- 800211a: 68fb ldr r3, [r7, #12]
- 800211c: 4413 add r3, r2
- 800211e: 613b str r3, [r7, #16]
- offset += this->transform.deserialize(inbuffer + offset);
- 8002120: 687b ldr r3, [r7, #4]
- 8002122: f103 001c add.w r0, r3, #28
- 8002126: 693b ldr r3, [r7, #16]
- 8002128: 683a ldr r2, [r7, #0]
- 800212a: 4413 add r3, r2
- 800212c: 4619 mov r1, r3
- 800212e: f7ff ff0c bl 8001f4a <_ZN13geometry_msgs9Transform11deserializeEPh>
- 8002132: 4602 mov r2, r0
- 8002134: 693b ldr r3, [r7, #16]
- 8002136: 4413 add r3, r2
- 8002138: 613b str r3, [r7, #16]
- return offset;
- 800213a: 693b ldr r3, [r7, #16]
- }
- 800213c: 4618 mov r0, r3
- 800213e: 3718 adds r7, #24
- 8002140: 46bd mov sp, r7
- 8002142: bd80 pop {r7, pc}
-
-08002144 <_ZN13geometry_msgs16TransformStamped7getTypeEv>:
-
- const char * getType(){ return "geometry_msgs/TransformStamped"; };
- 8002144: b480 push {r7}
- 8002146: b083 sub sp, #12
- 8002148: af00 add r7, sp, #0
- 800214a: 6078 str r0, [r7, #4]
- 800214c: 4b03 ldr r3, [pc, #12] ; (800215c <_ZN13geometry_msgs16TransformStamped7getTypeEv+0x18>)
- 800214e: 4618 mov r0, r3
- 8002150: 370c adds r7, #12
- 8002152: 46bd mov sp, r7
- 8002154: f85d 7b04 ldr.w r7, [sp], #4
- 8002158: 4770 bx lr
- 800215a: bf00 nop
- 800215c: 0800acfc .word 0x0800acfc
-
-08002160 <_ZN13geometry_msgs16TransformStamped6getMD5Ev>:
- const char * getMD5(){ return "b5764a33bfeb3588febc2682852579b0"; };
- 8002160: b480 push {r7}
- 8002162: b083 sub sp, #12
- 8002164: af00 add r7, sp, #0
- 8002166: 6078 str r0, [r7, #4]
- 8002168: 4b03 ldr r3, [pc, #12] ; (8002178 <_ZN13geometry_msgs16TransformStamped6getMD5Ev+0x18>)
- 800216a: 4618 mov r0, r3
- 800216c: 370c adds r7, #12
- 800216e: 46bd mov sp, r7
- 8002170: f85d 7b04 ldr.w r7, [sp], #4
- 8002174: 4770 bx lr
- 8002176: bf00 nop
- 8002178: 0800ad1c .word 0x0800ad1c
-
-0800217c <_ZN2tf9tfMessageC1Ev>:
- uint32_t transforms_length;
- typedef geometry_msgs::TransformStamped _transforms_type;
- _transforms_type st_transforms;
- _transforms_type * transforms;
-
- tfMessage():
- 800217c: b580 push {r7, lr}
- 800217e: b082 sub sp, #8
- 8002180: af00 add r7, sp, #0
- 8002182: 6078 str r0, [r7, #4]
- transforms_length(0), transforms(NULL)
- 8002184: 687b ldr r3, [r7, #4]
- 8002186: 4618 mov r0, r3
- 8002188: f7fe fb62 bl 8000850 <_ZN3ros3MsgC1Ev>
- 800218c: 4a09 ldr r2, [pc, #36] ; (80021b4 <_ZN2tf9tfMessageC1Ev+0x38>)
- 800218e: 687b ldr r3, [r7, #4]
- 8002190: 601a str r2, [r3, #0]
- 8002192: 687b ldr r3, [r7, #4]
- 8002194: 2200 movs r2, #0
- 8002196: 605a str r2, [r3, #4]
- 8002198: 687b ldr r3, [r7, #4]
- 800219a: 3308 adds r3, #8
- 800219c: 4618 mov r0, r3
- 800219e: f7ff ff15 bl 8001fcc <_ZN13geometry_msgs16TransformStampedC1Ev>
- 80021a2: 687b ldr r3, [r7, #4]
- 80021a4: 2200 movs r2, #0
- 80021a6: 64da str r2, [r3, #76] ; 0x4c
- {
- }
- 80021a8: 687b ldr r3, [r7, #4]
- 80021aa: 4618 mov r0, r3
- 80021ac: 3708 adds r7, #8
- 80021ae: 46bd mov sp, r7
- 80021b0: bd80 pop {r7, pc}
- 80021b2: bf00 nop
- 80021b4: 0800b030 .word 0x0800b030
-
-080021b8 <_ZNK2tf9tfMessage9serializeEPh>:
-
- virtual int serialize(unsigned char *outbuffer) const
- 80021b8: b580 push {r7, lr}
- 80021ba: b084 sub sp, #16
- 80021bc: af00 add r7, sp, #0
- 80021be: 6078 str r0, [r7, #4]
- 80021c0: 6039 str r1, [r7, #0]
- {
- int offset = 0;
- 80021c2: 2300 movs r3, #0
- 80021c4: 60fb str r3, [r7, #12]
- *(outbuffer + offset + 0) = (this->transforms_length >> (8 * 0)) & 0xFF;
- 80021c6: 687b ldr r3, [r7, #4]
- 80021c8: 6859 ldr r1, [r3, #4]
- 80021ca: 68fb ldr r3, [r7, #12]
- 80021cc: 683a ldr r2, [r7, #0]
- 80021ce: 4413 add r3, r2
- 80021d0: b2ca uxtb r2, r1
- 80021d2: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 1) = (this->transforms_length >> (8 * 1)) & 0xFF;
- 80021d4: 687b ldr r3, [r7, #4]
- 80021d6: 685b ldr r3, [r3, #4]
- 80021d8: 0a19 lsrs r1, r3, #8
- 80021da: 68fb ldr r3, [r7, #12]
- 80021dc: 3301 adds r3, #1
- 80021de: 683a ldr r2, [r7, #0]
- 80021e0: 4413 add r3, r2
- 80021e2: b2ca uxtb r2, r1
- 80021e4: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 2) = (this->transforms_length >> (8 * 2)) & 0xFF;
- 80021e6: 687b ldr r3, [r7, #4]
- 80021e8: 685b ldr r3, [r3, #4]
- 80021ea: 0c19 lsrs r1, r3, #16
- 80021ec: 68fb ldr r3, [r7, #12]
- 80021ee: 3302 adds r3, #2
- 80021f0: 683a ldr r2, [r7, #0]
- 80021f2: 4413 add r3, r2
- 80021f4: b2ca uxtb r2, r1
- 80021f6: 701a strb r2, [r3, #0]
- *(outbuffer + offset + 3) = (this->transforms_length >> (8 * 3)) & 0xFF;
- 80021f8: 687b ldr r3, [r7, #4]
- 80021fa: 685b ldr r3, [r3, #4]
- 80021fc: 0e19 lsrs r1, r3, #24
- 80021fe: 68fb ldr r3, [r7, #12]
- 8002200: 3303 adds r3, #3
- 8002202: 683a ldr r2, [r7, #0]
- 8002204: 4413 add r3, r2
- 8002206: b2ca uxtb r2, r1
- 8002208: 701a strb r2, [r3, #0]
- offset += sizeof(this->transforms_length);
- 800220a: 68fb ldr r3, [r7, #12]
- 800220c: 3304 adds r3, #4
- 800220e: 60fb str r3, [r7, #12]
- for( uint32_t i = 0; i < transforms_length; i++){
- 8002210: 2300 movs r3, #0
- 8002212: 60bb str r3, [r7, #8]
- 8002214: 687b ldr r3, [r7, #4]
- 8002216: 685b ldr r3, [r3, #4]
- 8002218: 68ba ldr r2, [r7, #8]
- 800221a: 429a cmp r2, r3
- 800221c: d223 bcs.n 8002266 <_ZNK2tf9tfMessage9serializeEPh+0xae>
- offset += this->transforms[i].serialize(outbuffer + offset);
- 800221e: 687b ldr r3, [r7, #4]
- 8002220: 6cd9 ldr r1, [r3, #76] ; 0x4c
- 8002222: 68ba ldr r2, [r7, #8]
- 8002224: 4613 mov r3, r2
- 8002226: 011b lsls r3, r3, #4
- 8002228: 4413 add r3, r2
- 800222a: 009b lsls r3, r3, #2
- 800222c: 18c8 adds r0, r1, r3
- 800222e: 68ba ldr r2, [r7, #8]
- 8002230: 4613 mov r3, r2
- 8002232: 011b lsls r3, r3, #4
- 8002234: 4413 add r3, r2
- 8002236: 009b lsls r3, r3, #2
- 8002238: 687b ldr r3, [r7, #4]
- 800223a: 6cd9 ldr r1, [r3, #76] ; 0x4c
- 800223c: 68ba ldr r2, [r7, #8]
- 800223e: 4613 mov r3, r2
- 8002240: 011b lsls r3, r3, #4
- 8002242: 4413 add r3, r2
- 8002244: 009b lsls r3, r3, #2
- 8002246: 440b add r3, r1
- 8002248: 681b ldr r3, [r3, #0]
- 800224a: 681b ldr r3, [r3, #0]
- 800224c: 68fa ldr r2, [r7, #12]
- 800224e: 6839 ldr r1, [r7, #0]
- 8002250: 440a add r2, r1
- 8002252: 4611 mov r1, r2
- 8002254: 4798 blx r3
- 8002256: 4602 mov r2, r0
- 8002258: 68fb ldr r3, [r7, #12]
- 800225a: 4413 add r3, r2
- 800225c: 60fb str r3, [r7, #12]
- for( uint32_t i = 0; i < transforms_length; i++){
- 800225e: 68bb ldr r3, [r7, #8]
- 8002260: 3301 adds r3, #1
- 8002262: 60bb str r3, [r7, #8]
- 8002264: e7d6 b.n 8002214 <_ZNK2tf9tfMessage9serializeEPh+0x5c>
- }
- return offset;
- 8002266: 68fb ldr r3, [r7, #12]
- }
- 8002268: 4618 mov r0, r3
- 800226a: 3710 adds r7, #16
- 800226c: 46bd mov sp, r7
- 800226e: bd80 pop {r7, pc}
-
-08002270 <_ZN2tf9tfMessage11deserializeEPh>:
-
- virtual int deserialize(unsigned char *inbuffer)
- 8002270: b580 push {r7, lr}
- 8002272: b086 sub sp, #24
- 8002274: af00 add r7, sp, #0
- 8002276: 6078 str r0, [r7, #4]
- 8002278: 6039 str r1, [r7, #0]
- {
- int offset = 0;
- 800227a: 2300 movs r3, #0
- 800227c: 617b str r3, [r7, #20]
- uint32_t transforms_lengthT = ((uint32_t) (*(inbuffer + offset)));
- 800227e: 697b ldr r3, [r7, #20]
- 8002280: 683a ldr r2, [r7, #0]
- 8002282: 4413 add r3, r2
- 8002284: 781b ldrb r3, [r3, #0]
- 8002286: 60fb str r3, [r7, #12]
- transforms_lengthT |= ((uint32_t) (*(inbuffer + offset + 1))) << (8 * 1);
- 8002288: 697b ldr r3, [r7, #20]
- 800228a: 3301 adds r3, #1
- 800228c: 683a ldr r2, [r7, #0]
- 800228e: 4413 add r3, r2
- 8002290: 781b ldrb r3, [r3, #0]
- 8002292: 021b lsls r3, r3, #8
- 8002294: 68fa ldr r2, [r7, #12]
- 8002296: 4313 orrs r3, r2
- 8002298: 60fb str r3, [r7, #12]
- transforms_lengthT |= ((uint32_t) (*(inbuffer + offset + 2))) << (8 * 2);
- 800229a: 697b ldr r3, [r7, #20]
- 800229c: 3302 adds r3, #2
- 800229e: 683a ldr r2, [r7, #0]
- 80022a0: 4413 add r3, r2
- 80022a2: 781b ldrb r3, [r3, #0]
- 80022a4: 041b lsls r3, r3, #16
- 80022a6: 68fa ldr r2, [r7, #12]
- 80022a8: 4313 orrs r3, r2
- 80022aa: 60fb str r3, [r7, #12]
- transforms_lengthT |= ((uint32_t) (*(inbuffer + offset + 3))) << (8 * 3);
- 80022ac: 697b ldr r3, [r7, #20]
- 80022ae: 3303 adds r3, #3
- 80022b0: 683a ldr r2, [r7, #0]
- 80022b2: 4413 add r3, r2
- 80022b4: 781b ldrb r3, [r3, #0]
- 80022b6: 061b lsls r3, r3, #24
- 80022b8: 68fa ldr r2, [r7, #12]
- 80022ba: 4313 orrs r3, r2
- 80022bc: 60fb str r3, [r7, #12]
- offset += sizeof(this->transforms_length);
- 80022be: 697b ldr r3, [r7, #20]
- 80022c0: 3304 adds r3, #4
- 80022c2: 617b str r3, [r7, #20]
- if(transforms_lengthT > transforms_length)
- 80022c4: 687b ldr r3, [r7, #4]
- 80022c6: 685b ldr r3, [r3, #4]
- 80022c8: 68fa ldr r2, [r7, #12]
- 80022ca: 429a cmp r2, r3
- 80022cc: d90c bls.n 80022e8 <_ZN2tf9tfMessage11deserializeEPh+0x78>
- this->transforms = (geometry_msgs::TransformStamped*)realloc(this->transforms, transforms_lengthT * sizeof(geometry_msgs::TransformStamped));
- 80022ce: 687b ldr r3, [r7, #4]
- 80022d0: 6cd8 ldr r0, [r3, #76] ; 0x4c
- 80022d2: 68fa ldr r2, [r7, #12]
- 80022d4: 4613 mov r3, r2
- 80022d6: 011b lsls r3, r3, #4
- 80022d8: 4413 add r3, r2
- 80022da: 009b lsls r3, r3, #2
- 80022dc: 4619 mov r1, r3
- 80022de: f008 fad3 bl 800a888 <realloc>
- 80022e2: 4602 mov r2, r0
- 80022e4: 687b ldr r3, [r7, #4]
- 80022e6: 64da str r2, [r3, #76] ; 0x4c
- transforms_length = transforms_lengthT;
- 80022e8: 687b ldr r3, [r7, #4]
- 80022ea: 68fa ldr r2, [r7, #12]
- 80022ec: 605a str r2, [r3, #4]
- for( uint32_t i = 0; i < transforms_length; i++){
- 80022ee: 2300 movs r3, #0
- 80022f0: 613b str r3, [r7, #16]
- 80022f2: 687b ldr r3, [r7, #4]
- 80022f4: 685b ldr r3, [r3, #4]
- 80022f6: 693a ldr r2, [r7, #16]
- 80022f8: 429a cmp r2, r3
- 80022fa: d21e bcs.n 800233a <_ZN2tf9tfMessage11deserializeEPh+0xca>
- offset += this->st_transforms.deserialize(inbuffer + offset);
- 80022fc: 687b ldr r3, [r7, #4]
- 80022fe: f103 0008 add.w r0, r3, #8
- 8002302: 697b ldr r3, [r7, #20]
- 8002304: 683a ldr r2, [r7, #0]
- 8002306: 4413 add r3, r2
- 8002308: 4619 mov r1, r3
- 800230a: f7ff fec3 bl 8002094 <_ZN13geometry_msgs16TransformStamped11deserializeEPh>
- 800230e: 4602 mov r2, r0
- 8002310: 697b ldr r3, [r7, #20]
- 8002312: 4413 add r3, r2
- 8002314: 617b str r3, [r7, #20]
- memcpy( &(this->transforms[i]), &(this->st_transforms), sizeof(geometry_msgs::TransformStamped));
- 8002316: 687b ldr r3, [r7, #4]
- 8002318: 6cd9 ldr r1, [r3, #76] ; 0x4c
- 800231a: 693a ldr r2, [r7, #16]
- 800231c: 4613 mov r3, r2
- 800231e: 011b lsls r3, r3, #4
- 8002320: 4413 add r3, r2
- 8002322: 009b lsls r3, r3, #2
- 8002324: 18c8 adds r0, r1, r3
- 8002326: 687b ldr r3, [r7, #4]
- 8002328: 3308 adds r3, #8
- 800232a: 2244 movs r2, #68 ; 0x44
- 800232c: 4619 mov r1, r3
- 800232e: f008 fa97 bl 800a860 <memcpy>
- for( uint32_t i = 0; i < transforms_length; i++){
- 8002332: 693b ldr r3, [r7, #16]
- 8002334: 3301 adds r3, #1
- 8002336: 613b str r3, [r7, #16]
- 8002338: e7db b.n 80022f2 <_ZN2tf9tfMessage11deserializeEPh+0x82>
- }
- return offset;
- 800233a: 697b ldr r3, [r7, #20]
- }
- 800233c: 4618 mov r0, r3
- 800233e: 3718 adds r7, #24
- 8002340: 46bd mov sp, r7
- 8002342: bd80 pop {r7, pc}
-
-08002344 <_ZN2tf9tfMessage7getTypeEv>:
-
- const char * getType(){ return "tf/tfMessage"; };
- 8002344: b480 push {r7}
- 8002346: b083 sub sp, #12
- 8002348: af00 add r7, sp, #0
- 800234a: 6078 str r0, [r7, #4]
- 800234c: 4b03 ldr r3, [pc, #12] ; (800235c <_ZN2tf9tfMessage7getTypeEv+0x18>)
- 800234e: 4618 mov r0, r3
- 8002350: 370c adds r7, #12
- 8002352: 46bd mov sp, r7
- 8002354: f85d 7b04 ldr.w r7, [sp], #4
- 8002358: 4770 bx lr
- 800235a: bf00 nop
- 800235c: 0800ad40 .word 0x0800ad40
-
-08002360 <_ZN2tf9tfMessage6getMD5Ev>:
- const char * getMD5(){ return "94810edda583a504dfda3829e70d7eec"; };
- 8002360: b480 push {r7}
- 8002362: b083 sub sp, #12
- 8002364: af00 add r7, sp, #0
- 8002366: 6078 str r0, [r7, #4]
- 8002368: 4b03 ldr r3, [pc, #12] ; (8002378 <_ZN2tf9tfMessage6getMD5Ev+0x18>)
- 800236a: 4618 mov r0, r3
- 800236c: 370c adds r7, #12
- 800236e: 46bd mov sp, r7
- 8002370: f85d 7b04 ldr.w r7, [sp], #4
- 8002374: 4770 bx lr
- 8002376: bf00 nop
- 8002378: 0800ad50 .word 0x0800ad50
-
-0800237c <_ZN2tf20TransformBroadcasterC1Ev>:
-{
-
-class TransformBroadcaster
-{
-public:
- TransformBroadcaster() : publisher_("/tf", &internal_msg) {}
- 800237c: b580 push {r7, lr}
- 800237e: b082 sub sp, #8
- 8002380: af00 add r7, sp, #0
- 8002382: 6078 str r0, [r7, #4]
- 8002384: 687b ldr r3, [r7, #4]
- 8002386: 4618 mov r0, r3
- 8002388: f7ff fef8 bl 800217c <_ZN2tf9tfMessageC1Ev>
- 800238c: 687b ldr r3, [r7, #4]
- 800238e: f103 0050 add.w r0, r3, #80 ; 0x50
- 8002392: 687a ldr r2, [r7, #4]
- 8002394: 2300 movs r3, #0
- 8002396: 4904 ldr r1, [pc, #16] ; (80023a8 <_ZN2tf20TransformBroadcasterC1Ev+0x2c>)
- 8002398: f7ff f93e bl 8001618 <_ZN3ros9PublisherC1EPKcPNS_3MsgEi>
- 800239c: 687b ldr r3, [r7, #4]
- 800239e: 4618 mov r0, r3
- 80023a0: 3708 adds r7, #8
- 80023a2: 46bd mov sp, r7
- 80023a4: bd80 pop {r7, pc}
- 80023a6: bf00 nop
- 80023a8: 0800ad74 .word 0x0800ad74
-
-080023ac <_ZN2tf20TransformBroadcaster4initERN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEE>:
-
- void init(ros::NodeHandle &nh)
- 80023ac: b580 push {r7, lr}
- 80023ae: b082 sub sp, #8
- 80023b0: af00 add r7, sp, #0
- 80023b2: 6078 str r0, [r7, #4]
- 80023b4: 6039 str r1, [r7, #0]
- {
- nh.advertise(publisher_);
- 80023b6: 687b ldr r3, [r7, #4]
- 80023b8: 3350 adds r3, #80 ; 0x50
- 80023ba: 4619 mov r1, r3
- 80023bc: 6838 ldr r0, [r7, #0]
- 80023be: f001 fc39 bl 8003c34 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE9advertiseERNS_9PublisherE>
- }
- 80023c2: bf00 nop
- 80023c4: 3708 adds r7, #8
- 80023c6: 46bd mov sp, r7
- 80023c8: bd80 pop {r7, pc}
-
-080023ca <_ZN2tf20TransformBroadcaster13sendTransformERN13geometry_msgs16TransformStampedE>:
-
- void sendTransform(geometry_msgs::TransformStamped &transform)
- 80023ca: b580 push {r7, lr}
- 80023cc: b082 sub sp, #8
- 80023ce: af00 add r7, sp, #0
- 80023d0: 6078 str r0, [r7, #4]
- 80023d2: 6039 str r1, [r7, #0]
- {
- internal_msg.transforms_length = 1;
- 80023d4: 687b ldr r3, [r7, #4]
- 80023d6: 2201 movs r2, #1
- 80023d8: 605a str r2, [r3, #4]
- internal_msg.transforms = &transform;
- 80023da: 687b ldr r3, [r7, #4]
- 80023dc: 683a ldr r2, [r7, #0]
- 80023de: 64da str r2, [r3, #76] ; 0x4c
- publisher_.publish(&internal_msg);
- 80023e0: 687b ldr r3, [r7, #4]
- 80023e2: 3350 adds r3, #80 ; 0x50
- 80023e4: 687a ldr r2, [r7, #4]
- 80023e6: 4611 mov r1, r2
- 80023e8: 4618 mov r0, r3
- 80023ea: f7ff f92c bl 8001646 <_ZN3ros9Publisher7publishEPKNS_3MsgE>
- }
- 80023ee: bf00 nop
- 80023f0: 3708 adds r7, #8
- 80023f2: 46bd mov sp, r7
- 80023f4: bd80 pop {r7, pc}
- ...
-
-080023f8 <_ZN7EncoderC1Ev>:
- Encoder(){
- 80023f8: b480 push {r7}
- 80023fa: b083 sub sp, #12
- 80023fc: af00 add r7, sp, #0
- 80023fe: 6078 str r0, [r7, #4]
- 8002400: 687b ldr r3, [r7, #4]
- 8002402: 4a09 ldr r2, [pc, #36] ; (8002428 <_ZN7EncoderC1Ev+0x30>)
- 8002404: 611a str r2, [r3, #16]
- 8002406: 687b ldr r3, [r7, #4]
- 8002408: 4a08 ldr r2, [pc, #32] ; (800242c <_ZN7EncoderC1Ev+0x34>)
- 800240a: 615a str r2, [r3, #20]
- 800240c: 687b ldr r3, [r7, #4]
- 800240e: 4a08 ldr r2, [pc, #32] ; (8002430 <_ZN7EncoderC1Ev+0x38>)
- 8002410: 619a str r2, [r3, #24]
- timer_ = NULL;
- 8002412: 687b ldr r3, [r7, #4]
- 8002414: 2200 movs r2, #0
- 8002416: 601a str r2, [r3, #0]
- }
- 8002418: 687b ldr r3, [r7, #4]
- 800241a: 4618 mov r0, r3
- 800241c: 370c adds r7, #12
- 800241e: 46bd mov sp, r7
- 8002420: f85d 7b04 ldr.w r7, [sp], #4
- 8002424: 4770 bx lr
- 8002426: bf00 nop
- 8002428: 00012110 .word 0x00012110
- 800242c: 40490fd0 .word 0x40490fd0
- 8002430: 3f40ff97 .word 0x3f40ff97
-
-08002434 <_ZN13geometry_msgs5PointC1Ev>:
- typedef float _y_type;
- _y_type y;
- typedef float _z_type;
- _z_type z;
-
- Point():
- 8002434: b580 push {r7, lr}
- 8002436: b082 sub sp, #8
- 8002438: af00 add r7, sp, #0
- 800243a: 6078 str r0, [r7, #4]
- x(0),
- y(0),
- z(0)
- 800243c: 687b ldr r3, [r7, #4]
- 800243e: 4618 mov r0, r3
- 8002440: f7fe fa06 bl 8000850 <_ZN3ros3MsgC1Ev>
- 8002444: 4a09 ldr r2, [pc, #36] ; (800246c <_ZN13geometry_msgs5PointC1Ev+0x38>)
- 8002446: 687b ldr r3, [r7, #4]
- 8002448: 601a str r2, [r3, #0]
- 800244a: 687b ldr r3, [r7, #4]
- 800244c: f04f 0200 mov.w r2, #0
- 8002450: 605a str r2, [r3, #4]
- 8002452: 687b ldr r3, [r7, #4]
- 8002454: f04f 0200 mov.w r2, #0
- 8002458: 609a str r2, [r3, #8]
- 800245a: 687b ldr r3, [r7, #4]
- 800245c: f04f 0200 mov.w r2, #0
- 8002460: 60da str r2, [r3, #12]
- {
- }
- 8002462: 687b ldr r3, [r7, #4]
- 8002464: 4618 mov r0, r3
- 8002466: 3708 adds r7, #8
- 8002468: 46bd mov sp, r7
- 800246a: bd80 pop {r7, pc}
- 800246c: 0800b004 .word 0x0800b004
-
-08002470 <_ZNK13geometry_msgs5Point9serializeEPh>:
-
- virtual int serialize(unsigned char *outbuffer) const
- 8002470: b580 push {r7, lr}
- 8002472: b084 sub sp, #16
- 8002474: af00 add r7, sp, #0
- 8002476: 6078 str r0, [r7, #4]
- 8002478: 6039 str r1, [r7, #0]
- {
- int offset = 0;
- 800247a: 2300 movs r3, #0
- 800247c: 60fb str r3, [r7, #12]
- offset += serializeAvrFloat64(outbuffer + offset, this->x);
- 800247e: 68fb ldr r3, [r7, #12]
- 8002480: 683a ldr r2, [r7, #0]
- 8002482: 441a add r2, r3
- 8002484: 687b ldr r3, [r7, #4]
- 8002486: edd3 7a01 vldr s15, [r3, #4]
- 800248a: eeb0 0a67 vmov.f32 s0, s15
- 800248e: 4610 mov r0, r2
- 8002490: f7fe f912 bl 80006b8 <_ZN3ros3Msg19serializeAvrFloat64EPhf>
- 8002494: 4602 mov r2, r0
- 8002496: 68fb ldr r3, [r7, #12]
- 8002498: 4413 add r3, r2
- 800249a: 60fb str r3, [r7, #12]
- offset += serializeAvrFloat64(outbuffer + offset, this->y);
- 800249c: 68fb ldr r3, [r7, #12]
- 800249e: 683a ldr r2, [r7, #0]
- 80024a0: 441a add r2, r3
- 80024a2: 687b ldr r3, [r7, #4]
- 80024a4: edd3 7a02 vldr s15, [r3, #8]
- 80024a8: eeb0 0a67 vmov.f32 s0, s15
- 80024ac: 4610 mov r0, r2
- 80024ae: f7fe f903 bl 80006b8 <_ZN3ros3Msg19serializeAvrFloat64EPhf>
- 80024b2: 4602 mov r2, r0
- 80024b4: 68fb ldr r3, [r7, #12]
- 80024b6: 4413 add r3, r2
- 80024b8: 60fb str r3, [r7, #12]
- offset += serializeAvrFloat64(outbuffer + offset, this->z);
- 80024ba: 68fb ldr r3, [r7, #12]
- 80024bc: 683a ldr r2, [r7, #0]
- 80024be: 441a add r2, r3
- 80024c0: 687b ldr r3, [r7, #4]
- 80024c2: edd3 7a03 vldr s15, [r3, #12]
- 80024c6: eeb0 0a67 vmov.f32 s0, s15
- 80024ca: 4610 mov r0, r2
- 80024cc: f7fe f8f4 bl 80006b8 <_ZN3ros3Msg19serializeAvrFloat64EPhf>
- 80024d0: 4602 mov r2, r0
- 80024d2: 68fb ldr r3, [r7, #12]
- 80024d4: 4413 add r3, r2
- 80024d6: 60fb str r3, [r7, #12]
- return offset;
- 80024d8: 68fb ldr r3, [r7, #12]
- }
- 80024da: 4618 mov r0, r3
- 80024dc: 3710 adds r7, #16
- 80024de: 46bd mov sp, r7
- 80024e0: bd80 pop {r7, pc}
-
-080024e2 <_ZN13geometry_msgs5Point11deserializeEPh>:
-
- virtual int deserialize(unsigned char *inbuffer)
- 80024e2: b580 push {r7, lr}
- 80024e4: b084 sub sp, #16
- 80024e6: af00 add r7, sp, #0
- 80024e8: 6078 str r0, [r7, #4]
- 80024ea: 6039 str r1, [r7, #0]
- {
- int offset = 0;
- 80024ec: 2300 movs r3, #0
- 80024ee: 60fb str r3, [r7, #12]
- offset += deserializeAvrFloat64(inbuffer + offset, &(this->x));
- 80024f0: 68fb ldr r3, [r7, #12]
- 80024f2: 683a ldr r2, [r7, #0]
- 80024f4: 441a add r2, r3
- 80024f6: 687b ldr r3, [r7, #4]
- 80024f8: 3304 adds r3, #4
- 80024fa: 4619 mov r1, r3
- 80024fc: 4610 mov r0, r2
- 80024fe: f7fe f947 bl 8000790 <_ZN3ros3Msg21deserializeAvrFloat64EPKhPf>
- 8002502: 4602 mov r2, r0
- 8002504: 68fb ldr r3, [r7, #12]
- 8002506: 4413 add r3, r2
- 8002508: 60fb str r3, [r7, #12]
- offset += deserializeAvrFloat64(inbuffer + offset, &(this->y));
- 800250a: 68fb ldr r3, [r7, #12]
- 800250c: 683a ldr r2, [r7, #0]
- 800250e: 441a add r2, r3
- 8002510: 687b ldr r3, [r7, #4]
- 8002512: 3308 adds r3, #8
- 8002514: 4619 mov r1, r3
- 8002516: 4610 mov r0, r2
- 8002518: f7fe f93a bl 8000790 <_ZN3ros3Msg21deserializeAvrFloat64EPKhPf>
- 800251c: 4602 mov r2, r0
- 800251e: 68fb ldr r3, [r7, #12]
- 8002520: 4413 add r3, r2
- 8002522: 60fb str r3, [r7, #12]
- offset += deserializeAvrFloat64(inbuffer + offset, &(this->z));
- 8002524: 68fb ldr r3, [r7, #12]
- 8002526: 683a ldr r2, [r7, #0]
- 8002528: 441a add r2, r3
- 800252a: 687b ldr r3, [r7, #4]
- 800252c: 330c adds r3, #12
- 800252e: 4619 mov r1, r3
- 8002530: 4610 mov r0, r2
- 8002532: f7fe f92d bl 8000790 <_ZN3ros3Msg21deserializeAvrFloat64EPKhPf>
- 8002536: 4602 mov r2, r0
- 8002538: 68fb ldr r3, [r7, #12]
- 800253a: 4413 add r3, r2
- 800253c: 60fb str r3, [r7, #12]
- return offset;
- 800253e: 68fb ldr r3, [r7, #12]
- }
- 8002540: 4618 mov r0, r3
- 8002542: 3710 adds r7, #16
- 8002544: 46bd mov sp, r7
- 8002546: bd80 pop {r7, pc}
-
-08002548 <_ZN13geometry_msgs5Point7getTypeEv>:
-
- const char * getType(){ return "geometry_msgs/Point"; };
- 8002548: b480 push {r7}
- 800254a: b083 sub sp, #12
- 800254c: af00 add r7, sp, #0
- 800254e: 6078 str r0, [r7, #4]
- 8002550: 4b03 ldr r3, [pc, #12] ; (8002560 <_ZN13geometry_msgs5Point7getTypeEv+0x18>)
- 8002552: 4618 mov r0, r3
- 8002554: 370c adds r7, #12
- 8002556: 46bd mov sp, r7
- 8002558: f85d 7b04 ldr.w r7, [sp], #4
- 800255c: 4770 bx lr
- 800255e: bf00 nop
- 8002560: 0800ad78 .word 0x0800ad78
-
-08002564 <_ZN13geometry_msgs5Point6getMD5Ev>:
- const char * getMD5(){ return "4a842b65f413084dc2b10fb484ea7f17"; };
- 8002564: b480 push {r7}
- 8002566: b083 sub sp, #12
- 8002568: af00 add r7, sp, #0
- 800256a: 6078 str r0, [r7, #4]
- 800256c: 4b03 ldr r3, [pc, #12] ; (800257c <_ZN13geometry_msgs5Point6getMD5Ev+0x18>)
- 800256e: 4618 mov r0, r3
- 8002570: 370c adds r7, #12
- 8002572: 46bd mov sp, r7
- 8002574: f85d 7b04 ldr.w r7, [sp], #4
- 8002578: 4770 bx lr
- 800257a: bf00 nop
- 800257c: 0800ac5c .word 0x0800ac5c
-
-08002580 <_ZN13geometry_msgs4PoseC1Ev>:
- typedef geometry_msgs::Point _position_type;
- _position_type position;
- typedef geometry_msgs::Quaternion _orientation_type;
- _orientation_type orientation;
-
- Pose():
- 8002580: b580 push {r7, lr}
- 8002582: b082 sub sp, #8
- 8002584: af00 add r7, sp, #0
- 8002586: 6078 str r0, [r7, #4]
- position(),
- orientation()
- 8002588: 687b ldr r3, [r7, #4]
- 800258a: 4618 mov r0, r3
- 800258c: f7fe f960 bl 8000850 <_ZN3ros3MsgC1Ev>
- 8002590: 4a08 ldr r2, [pc, #32] ; (80025b4 <_ZN13geometry_msgs4PoseC1Ev+0x34>)
- 8002592: 687b ldr r3, [r7, #4]
- 8002594: 601a str r2, [r3, #0]
- 8002596: 687b ldr r3, [r7, #4]
- 8002598: 3304 adds r3, #4
- 800259a: 4618 mov r0, r3
- 800259c: f7ff ff4a bl 8002434 <_ZN13geometry_msgs5PointC1Ev>
- 80025a0: 687b ldr r3, [r7, #4]
- 80025a2: 3314 adds r3, #20
- 80025a4: 4618 mov r0, r3
- 80025a6: f7ff fbc9 bl 8001d3c <_ZN13geometry_msgs10QuaternionC1Ev>
- {
- }
- 80025aa: 687b ldr r3, [r7, #4]
- 80025ac: 4618 mov r0, r3
- 80025ae: 3708 adds r7, #8
- 80025b0: 46bd mov sp, r7
- 80025b2: bd80 pop {r7, pc}
- 80025b4: 0800afec .word 0x0800afec
-
-080025b8 <_ZNK13geometry_msgs4Pose9serializeEPh>:
-
- virtual int serialize(unsigned char *outbuffer) const
- 80025b8: b580 push {r7, lr}
- 80025ba: b084 sub sp, #16
- 80025bc: af00 add r7, sp, #0
- 80025be: 6078 str r0, [r7, #4]
- 80025c0: 6039 str r1, [r7, #0]
- {
- int offset = 0;
- 80025c2: 2300 movs r3, #0
- 80025c4: 60fb str r3, [r7, #12]
- offset += this->position.serialize(outbuffer + offset);
- 80025c6: 687b ldr r3, [r7, #4]
- 80025c8: 1d18 adds r0, r3, #4
- 80025ca: 68fb ldr r3, [r7, #12]
- 80025cc: 683a ldr r2, [r7, #0]
- 80025ce: 4413 add r3, r2
- 80025d0: 4619 mov r1, r3
- 80025d2: f7ff ff4d bl 8002470 <_ZNK13geometry_msgs5Point9serializeEPh>
- 80025d6: 4602 mov r2, r0
- 80025d8: 68fb ldr r3, [r7, #12]
- 80025da: 4413 add r3, r2
- 80025dc: 60fb str r3, [r7, #12]
- offset += this->orientation.serialize(outbuffer + offset);
- 80025de: 687b ldr r3, [r7, #4]
- 80025e0: f103 0014 add.w r0, r3, #20
- 80025e4: 68fb ldr r3, [r7, #12]
- 80025e6: 683a ldr r2, [r7, #0]
- 80025e8: 4413 add r3, r2
- 80025ea: 4619 mov r1, r3
- 80025ec: f7ff fbc8 bl 8001d80 <_ZNK13geometry_msgs10Quaternion9serializeEPh>
- 80025f0: 4602 mov r2, r0
- 80025f2: 68fb ldr r3, [r7, #12]
- 80025f4: 4413 add r3, r2
- 80025f6: 60fb str r3, [r7, #12]
- return offset;
- 80025f8: 68fb ldr r3, [r7, #12]
- }
- 80025fa: 4618 mov r0, r3
- 80025fc: 3710 adds r7, #16
- 80025fe: 46bd mov sp, r7
- 8002600: bd80 pop {r7, pc}
-
-08002602 <_ZN13geometry_msgs4Pose11deserializeEPh>:
-
- virtual int deserialize(unsigned char *inbuffer)
- 8002602: b580 push {r7, lr}
- 8002604: b084 sub sp, #16
- 8002606: af00 add r7, sp, #0
- 8002608: 6078 str r0, [r7, #4]
- 800260a: 6039 str r1, [r7, #0]
- {
- int offset = 0;
- 800260c: 2300 movs r3, #0
- 800260e: 60fb str r3, [r7, #12]
- offset += this->position.deserialize(inbuffer + offset);
- 8002610: 687b ldr r3, [r7, #4]
- 8002612: 1d18 adds r0, r3, #4
- 8002614: 68fb ldr r3, [r7, #12]
- 8002616: 683a ldr r2, [r7, #0]
- 8002618: 4413 add r3, r2
- 800261a: 4619 mov r1, r3
- 800261c: f7ff ff61 bl 80024e2 <_ZN13geometry_msgs5Point11deserializeEPh>
- 8002620: 4602 mov r2, r0
- 8002622: 68fb ldr r3, [r7, #12]
- 8002624: 4413 add r3, r2
- 8002626: 60fb str r3, [r7, #12]
- offset += this->orientation.deserialize(inbuffer + offset);
- 8002628: 687b ldr r3, [r7, #4]
- 800262a: f103 0014 add.w r0, r3, #20
- 800262e: 68fb ldr r3, [r7, #12]
- 8002630: 683a ldr r2, [r7, #0]
- 8002632: 4413 add r3, r2
- 8002634: 4619 mov r1, r3
- 8002636: f7ff fbeb bl 8001e10 <_ZN13geometry_msgs10Quaternion11deserializeEPh>
- 800263a: 4602 mov r2, r0
- 800263c: 68fb ldr r3, [r7, #12]
- 800263e: 4413 add r3, r2
- 8002640: 60fb str r3, [r7, #12]
- return offset;
- 8002642: 68fb ldr r3, [r7, #12]
- }
- 8002644: 4618 mov r0, r3
- 8002646: 3710 adds r7, #16
- 8002648: 46bd mov sp, r7
- 800264a: bd80 pop {r7, pc}
-
-0800264c <_ZN13geometry_msgs4Pose7getTypeEv>:
-
- const char * getType(){ return "geometry_msgs/Pose"; };
- 800264c: b480 push {r7}
- 800264e: b083 sub sp, #12
- 8002650: af00 add r7, sp, #0
- 8002652: 6078 str r0, [r7, #4]
- 8002654: 4b03 ldr r3, [pc, #12] ; (8002664 <_ZN13geometry_msgs4Pose7getTypeEv+0x18>)
- 8002656: 4618 mov r0, r3
- 8002658: 370c adds r7, #12
- 800265a: 46bd mov sp, r7
- 800265c: f85d 7b04 ldr.w r7, [sp], #4
- 8002660: 4770 bx lr
- 8002662: bf00 nop
- 8002664: 0800ad8c .word 0x0800ad8c
-
-08002668 <_ZN13geometry_msgs4Pose6getMD5Ev>:
- const char * getMD5(){ return "e45d45a5a1ce597b249e23fb30fc871f"; };
- 8002668: b480 push {r7}
- 800266a: b083 sub sp, #12
- 800266c: af00 add r7, sp, #0
- 800266e: 6078 str r0, [r7, #4]
- 8002670: 4b03 ldr r3, [pc, #12] ; (8002680 <_ZN13geometry_msgs4Pose6getMD5Ev+0x18>)
- 8002672: 4618 mov r0, r3
- 8002674: 370c adds r7, #12
- 8002676: 46bd mov sp, r7
- 8002678: f85d 7b04 ldr.w r7, [sp], #4
- 800267c: 4770 bx lr
- 800267e: bf00 nop
- 8002680: 0800ada0 .word 0x0800ada0
-
-08002684 <_ZN13geometry_msgs18PoseWithCovarianceC1Ev>:
- public:
- typedef geometry_msgs::Pose _pose_type;
- _pose_type pose;
- float covariance[36];
-
- PoseWithCovariance():
- 8002684: b580 push {r7, lr}
- 8002686: b082 sub sp, #8
- 8002688: af00 add r7, sp, #0
- 800268a: 6078 str r0, [r7, #4]
- pose(),
- covariance()
- 800268c: 687b ldr r3, [r7, #4]
- 800268e: 4618 mov r0, r3
- 8002690: f7fe f8de bl 8000850 <_ZN3ros3MsgC1Ev>
- 8002694: 4a0c ldr r2, [pc, #48] ; (80026c8 <_ZN13geometry_msgs18PoseWithCovarianceC1Ev+0x44>)
- 8002696: 687b ldr r3, [r7, #4]
- 8002698: 601a str r2, [r3, #0]
- 800269a: 687b ldr r3, [r7, #4]
- 800269c: 3304 adds r3, #4
- 800269e: 4618 mov r0, r3
- 80026a0: f7ff ff6e bl 8002580 <_ZN13geometry_msgs4PoseC1Ev>
- 80026a4: 687b ldr r3, [r7, #4]
- 80026a6: f103 022c add.w r2, r3, #44 ; 0x2c
- 80026aa: 2323 movs r3, #35 ; 0x23
- 80026ac: 2b00 cmp r3, #0
- 80026ae: db05 blt.n 80026bc <_ZN13geometry_msgs18PoseWithCovarianceC1Ev+0x38>
- 80026b0: f04f 0100 mov.w r1, #0
- 80026b4: 6011 str r1, [r2, #0]
- 80026b6: 3204 adds r2, #4
- 80026b8: 3b01 subs r3, #1
- 80026ba: e7f7 b.n 80026ac <_ZN13geometry_msgs18PoseWithCovarianceC1Ev+0x28>
- {
- }
- 80026bc: 687b ldr r3, [r7, #4]
- 80026be: 4618 mov r0, r3
- 80026c0: 3708 adds r7, #8
- 80026c2: 46bd mov sp, r7
- 80026c4: bd80 pop {r7, pc}
- 80026c6: bf00 nop
- 80026c8: 0800afd4 .word 0x0800afd4
-
-080026cc <_ZNK13geometry_msgs18PoseWithCovariance9serializeEPh>:
-
- virtual int serialize(unsigned char *outbuffer) const
- 80026cc: b580 push {r7, lr}
- 80026ce: b084 sub sp, #16
- 80026d0: af00 add r7, sp, #0
- 80026d2: 6078 str r0, [r7, #4]
- 80026d4: 6039 str r1, [r7, #0]
- {
- int offset = 0;
- 80026d6: 2300 movs r3, #0
- 80026d8: 60fb str r3, [r7, #12]
- offset += this->pose.serialize(outbuffer + offset);
- 80026da: 687b ldr r3, [r7, #4]
- 80026dc: 1d18 adds r0, r3, #4
- 80026de: 68fb ldr r3, [r7, #12]
- 80026e0: 683a ldr r2, [r7, #0]
- 80026e2: 4413 add r3, r2
- 80026e4: 4619 mov r1, r3
- 80026e6: f7ff ff67 bl 80025b8 <_ZNK13geometry_msgs4Pose9serializeEPh>
- 80026ea: 4602 mov r2, r0
- 80026ec: 68fb ldr r3, [r7, #12]
- 80026ee: 4413 add r3, r2
- 80026f0: 60fb str r3, [r7, #12]
- for( uint32_t i = 0; i < 36; i++){
- 80026f2: 2300 movs r3, #0
- 80026f4: 60bb str r3, [r7, #8]
- 80026f6: 68bb ldr r3, [r7, #8]
- 80026f8: 2b23 cmp r3, #35 ; 0x23
- 80026fa: d817 bhi.n 800272c <_ZNK13geometry_msgs18PoseWithCovariance9serializeEPh+0x60>
- offset += serializeAvrFloat64(outbuffer + offset, this->covariance[i]);
- 80026fc: 68fb ldr r3, [r7, #12]
- 80026fe: 683a ldr r2, [r7, #0]
- 8002700: 18d1 adds r1, r2, r3
- 8002702: 687a ldr r2, [r7, #4]
- 8002704: 68bb ldr r3, [r7, #8]
- 8002706: 330a adds r3, #10
- 8002708: 009b lsls r3, r3, #2
- 800270a: 4413 add r3, r2
- 800270c: 3304 adds r3, #4
- 800270e: edd3 7a00 vldr s15, [r3]
- 8002712: eeb0 0a67 vmov.f32 s0, s15
- 8002716: 4608 mov r0, r1
- 8002718: f7fd ffce bl 80006b8 <_ZN3ros3Msg19serializeAvrFloat64EPhf>
- 800271c: 4602 mov r2, r0
- 800271e: 68fb ldr r3, [r7, #12]
- 8002720: 4413 add r3, r2
- 8002722: 60fb str r3, [r7, #12]
- for( uint32_t i = 0; i < 36; i++){
- 8002724: 68bb ldr r3, [r7, #8]
- 8002726: 3301 adds r3, #1
- 8002728: 60bb str r3, [r7, #8]
- 800272a: e7e4 b.n 80026f6 <_ZNK13geometry_msgs18PoseWithCovariance9serializeEPh+0x2a>
- }
- return offset;
- 800272c: 68fb ldr r3, [r7, #12]
- }
- 800272e: 4618 mov r0, r3
- 8002730: 3710 adds r7, #16
- 8002732: 46bd mov sp, r7
- 8002734: bd80 pop {r7, pc}
-
-08002736 <_ZN13geometry_msgs18PoseWithCovariance11deserializeEPh>:
-
- virtual int deserialize(unsigned char *inbuffer)
- 8002736: b580 push {r7, lr}
- 8002738: b084 sub sp, #16
- 800273a: af00 add r7, sp, #0
- 800273c: 6078 str r0, [r7, #4]
- 800273e: 6039 str r1, [r7, #0]
- {
- int offset = 0;
- 8002740: 2300 movs r3, #0
- 8002742: 60fb str r3, [r7, #12]
- offset += this->pose.deserialize(inbuffer + offset);
- 8002744: 687b ldr r3, [r7, #4]
- 8002746: 1d18 adds r0, r3, #4
- 8002748: 68fb ldr r3, [r7, #12]
- 800274a: 683a ldr r2, [r7, #0]
- 800274c: 4413 add r3, r2
- 800274e: 4619 mov r1, r3
- 8002750: f7ff ff57 bl 8002602 <_ZN13geometry_msgs4Pose11deserializeEPh>
- 8002754: 4602 mov r2, r0
- 8002756: 68fb ldr r3, [r7, #12]
- 8002758: 4413 add r3, r2
- 800275a: 60fb str r3, [r7, #12]
- for( uint32_t i = 0; i < 36; i++){
- 800275c: 2300 movs r3, #0
- 800275e: 60bb str r3, [r7, #8]
- 8002760: 68bb ldr r3, [r7, #8]
- 8002762: 2b23 cmp r3, #35 ; 0x23
- 8002764: d813 bhi.n 800278e <_ZN13geometry_msgs18PoseWithCovariance11deserializeEPh+0x58>
- offset += deserializeAvrFloat64(inbuffer + offset, &(this->covariance[i]));
- 8002766: 68fb ldr r3, [r7, #12]
- 8002768: 683a ldr r2, [r7, #0]
- 800276a: 18d0 adds r0, r2, r3
- 800276c: 68bb ldr r3, [r7, #8]
- 800276e: 330a adds r3, #10
- 8002770: 009b lsls r3, r3, #2
- 8002772: 687a ldr r2, [r7, #4]
- 8002774: 4413 add r3, r2
- 8002776: 3304 adds r3, #4
- 8002778: 4619 mov r1, r3
- 800277a: f7fe f809 bl 8000790 <_ZN3ros3Msg21deserializeAvrFloat64EPKhPf>
- 800277e: 4602 mov r2, r0
- 8002780: 68fb ldr r3, [r7, #12]
- 8002782: 4413 add r3, r2
- 8002784: 60fb str r3, [r7, #12]
- for( uint32_t i = 0; i < 36; i++){
- 8002786: 68bb ldr r3, [r7, #8]
- 8002788: 3301 adds r3, #1
- 800278a: 60bb str r3, [r7, #8]
- 800278c: e7e8 b.n 8002760 <_ZN13geometry_msgs18PoseWithCovariance11deserializeEPh+0x2a>
- }
- return offset;
- 800278e: 68fb ldr r3, [r7, #12]
- }
- 8002790: 4618 mov r0, r3
- 8002792: 3710 adds r7, #16
- 8002794: 46bd mov sp, r7
- 8002796: bd80 pop {r7, pc}
-
-08002798 <_ZN13geometry_msgs18PoseWithCovariance7getTypeEv>:
-
- const char * getType(){ return "geometry_msgs/PoseWithCovariance"; };
- 8002798: b480 push {r7}
- 800279a: b083 sub sp, #12
- 800279c: af00 add r7, sp, #0
- 800279e: 6078 str r0, [r7, #4]
- 80027a0: 4b03 ldr r3, [pc, #12] ; (80027b0 <_ZN13geometry_msgs18PoseWithCovariance7getTypeEv+0x18>)
- 80027a2: 4618 mov r0, r3
- 80027a4: 370c adds r7, #12
- 80027a6: 46bd mov sp, r7
- 80027a8: f85d 7b04 ldr.w r7, [sp], #4
- 80027ac: 4770 bx lr
- 80027ae: bf00 nop
- 80027b0: 0800adc4 .word 0x0800adc4
-
-080027b4 <_ZN13geometry_msgs18PoseWithCovariance6getMD5Ev>:
- const char * getMD5(){ return "c23e848cf1b7533a8d7c259073a97e6f"; };
- 80027b4: b480 push {r7}
- 80027b6: b083 sub sp, #12
- 80027b8: af00 add r7, sp, #0
- 80027ba: 6078 str r0, [r7, #4]
- 80027bc: 4b03 ldr r3, [pc, #12] ; (80027cc <_ZN13geometry_msgs18PoseWithCovariance6getMD5Ev+0x18>)
- 80027be: 4618 mov r0, r3
- 80027c0: 370c adds r7, #12
- 80027c2: 46bd mov sp, r7
- 80027c4: f85d 7b04 ldr.w r7, [sp], #4
- 80027c8: 4770 bx lr
- 80027ca: bf00 nop
- 80027cc: 0800ade8 .word 0x0800ade8
-
-080027d0 <_ZN13geometry_msgs5TwistC1Ev>:
- typedef geometry_msgs::Vector3 _linear_type;
- _linear_type linear;
- typedef geometry_msgs::Vector3 _angular_type;
- _angular_type angular;
-
- Twist():
- 80027d0: b580 push {r7, lr}
- 80027d2: b082 sub sp, #8
- 80027d4: af00 add r7, sp, #0
- 80027d6: 6078 str r0, [r7, #4]
- linear(),
- angular()
- 80027d8: 687b ldr r3, [r7, #4]
- 80027da: 4618 mov r0, r3
- 80027dc: f7fe f838 bl 8000850 <_ZN3ros3MsgC1Ev>
- 80027e0: 4a08 ldr r2, [pc, #32] ; (8002804 <_ZN13geometry_msgs5TwistC1Ev+0x34>)
- 80027e2: 687b ldr r3, [r7, #4]
- 80027e4: 601a str r2, [r3, #0]
- 80027e6: 687b ldr r3, [r7, #4]
- 80027e8: 3304 adds r3, #4
- 80027ea: 4618 mov r0, r3
- 80027ec: f7ff fa00 bl 8001bf0 <_ZN13geometry_msgs7Vector3C1Ev>
- 80027f0: 687b ldr r3, [r7, #4]
- 80027f2: 3314 adds r3, #20
- 80027f4: 4618 mov r0, r3
- 80027f6: f7ff f9fb bl 8001bf0 <_ZN13geometry_msgs7Vector3C1Ev>
- {
- }
- 80027fa: 687b ldr r3, [r7, #4]
- 80027fc: 4618 mov r0, r3
- 80027fe: 3708 adds r7, #8
- 8002800: 46bd mov sp, r7
- 8002802: bd80 pop {r7, pc}
- 8002804: 0800afbc .word 0x0800afbc
-
-08002808 <_ZNK13geometry_msgs5Twist9serializeEPh>:
-
- virtual int serialize(unsigned char *outbuffer) const
- 8002808: b580 push {r7, lr}
- 800280a: b084 sub sp, #16
- 800280c: af00 add r7, sp, #0
- 800280e: 6078 str r0, [r7, #4]
- 8002810: 6039 str r1, [r7, #0]
- {
- int offset = 0;
- 8002812: 2300 movs r3, #0
- 8002814: 60fb str r3, [r7, #12]
- offset += this->linear.serialize(outbuffer + offset);
- 8002816: 687b ldr r3, [r7, #4]
- 8002818: 1d18 adds r0, r3, #4
- 800281a: 68fb ldr r3, [r7, #12]
- 800281c: 683a ldr r2, [r7, #0]
- 800281e: 4413 add r3, r2
- 8002820: 4619 mov r1, r3
- 8002822: f7ff fa03 bl 8001c2c <_ZNK13geometry_msgs7Vector39serializeEPh>
- 8002826: 4602 mov r2, r0
- 8002828: 68fb ldr r3, [r7, #12]
- 800282a: 4413 add r3, r2
- 800282c: 60fb str r3, [r7, #12]
- offset += this->angular.serialize(outbuffer + offset);
- 800282e: 687b ldr r3, [r7, #4]
- 8002830: f103 0014 add.w r0, r3, #20
- 8002834: 68fb ldr r3, [r7, #12]
- 8002836: 683a ldr r2, [r7, #0]
- 8002838: 4413 add r3, r2
- 800283a: 4619 mov r1, r3
- 800283c: f7ff f9f6 bl 8001c2c <_ZNK13geometry_msgs7Vector39serializeEPh>
- 8002840: 4602 mov r2, r0
- 8002842: 68fb ldr r3, [r7, #12]
- 8002844: 4413 add r3, r2
- 8002846: 60fb str r3, [r7, #12]
- return offset;
- 8002848: 68fb ldr r3, [r7, #12]
- }
- 800284a: 4618 mov r0, r3
- 800284c: 3710 adds r7, #16
- 800284e: 46bd mov sp, r7
- 8002850: bd80 pop {r7, pc}
-
-08002852 <_ZN13geometry_msgs5Twist11deserializeEPh>:
-
- virtual int deserialize(unsigned char *inbuffer)
- 8002852: b580 push {r7, lr}
- 8002854: b084 sub sp, #16
- 8002856: af00 add r7, sp, #0
- 8002858: 6078 str r0, [r7, #4]
- 800285a: 6039 str r1, [r7, #0]
- {
- int offset = 0;
- 800285c: 2300 movs r3, #0
- 800285e: 60fb str r3, [r7, #12]
- offset += this->linear.deserialize(inbuffer + offset);
- 8002860: 687b ldr r3, [r7, #4]
- 8002862: 1d18 adds r0, r3, #4
- 8002864: 68fb ldr r3, [r7, #12]
- 8002866: 683a ldr r2, [r7, #0]
- 8002868: 4413 add r3, r2
- 800286a: 4619 mov r1, r3
- 800286c: f7ff fa17 bl 8001c9e <_ZN13geometry_msgs7Vector311deserializeEPh>
- 8002870: 4602 mov r2, r0
- 8002872: 68fb ldr r3, [r7, #12]
- 8002874: 4413 add r3, r2
- 8002876: 60fb str r3, [r7, #12]
- offset += this->angular.deserialize(inbuffer + offset);
- 8002878: 687b ldr r3, [r7, #4]
- 800287a: f103 0014 add.w r0, r3, #20
- 800287e: 68fb ldr r3, [r7, #12]
- 8002880: 683a ldr r2, [r7, #0]
- 8002882: 4413 add r3, r2
- 8002884: 4619 mov r1, r3
- 8002886: f7ff fa0a bl 8001c9e <_ZN13geometry_msgs7Vector311deserializeEPh>
- 800288a: 4602 mov r2, r0
- 800288c: 68fb ldr r3, [r7, #12]
- 800288e: 4413 add r3, r2
- 8002890: 60fb str r3, [r7, #12]
- return offset;
- 8002892: 68fb ldr r3, [r7, #12]
- }
- 8002894: 4618 mov r0, r3
- 8002896: 3710 adds r7, #16
- 8002898: 46bd mov sp, r7
- 800289a: bd80 pop {r7, pc}
-
-0800289c <_ZN13geometry_msgs5Twist7getTypeEv>:
-
- const char * getType(){ return "geometry_msgs/Twist"; };
- 800289c: b480 push {r7}
- 800289e: b083 sub sp, #12
- 80028a0: af00 add r7, sp, #0
- 80028a2: 6078 str r0, [r7, #4]
- 80028a4: 4b03 ldr r3, [pc, #12] ; (80028b4 <_ZN13geometry_msgs5Twist7getTypeEv+0x18>)
- 80028a6: 4618 mov r0, r3
- 80028a8: 370c adds r7, #12
- 80028aa: 46bd mov sp, r7
- 80028ac: f85d 7b04 ldr.w r7, [sp], #4
- 80028b0: 4770 bx lr
- 80028b2: bf00 nop
- 80028b4: 0800ae0c .word 0x0800ae0c
-
-080028b8 <_ZN13geometry_msgs5Twist6getMD5Ev>:
- const char * getMD5(){ return "9f195f881246fdfa2798d1d3eebca84a"; };
- 80028b8: b480 push {r7}
- 80028ba: b083 sub sp, #12
- 80028bc: af00 add r7, sp, #0
- 80028be: 6078 str r0, [r7, #4]
- 80028c0: 4b03 ldr r3, [pc, #12] ; (80028d0 <_ZN13geometry_msgs5Twist6getMD5Ev+0x18>)
- 80028c2: 4618 mov r0, r3
- 80028c4: 370c adds r7, #12
- 80028c6: 46bd mov sp, r7
- 80028c8: f85d 7b04 ldr.w r7, [sp], #4
- 80028cc: 4770 bx lr
- 80028ce: bf00 nop
- 80028d0: 0800ae20 .word 0x0800ae20
-
-080028d4 <_ZN13geometry_msgs19TwistWithCovarianceC1Ev>:
- public:
- typedef geometry_msgs::Twist _twist_type;
- _twist_type twist;
- float covariance[36];
-
- TwistWithCovariance():
- 80028d4: b580 push {r7, lr}
- 80028d6: b082 sub sp, #8
- 80028d8: af00 add r7, sp, #0
- 80028da: 6078 str r0, [r7, #4]
- twist(),
- covariance()
- 80028dc: 687b ldr r3, [r7, #4]
- 80028de: 4618 mov r0, r3
- 80028e0: f7fd ffb6 bl 8000850 <_ZN3ros3MsgC1Ev>
- 80028e4: 4a0c ldr r2, [pc, #48] ; (8002918 <_ZN13geometry_msgs19TwistWithCovarianceC1Ev+0x44>)
- 80028e6: 687b ldr r3, [r7, #4]
- 80028e8: 601a str r2, [r3, #0]
- 80028ea: 687b ldr r3, [r7, #4]
- 80028ec: 3304 adds r3, #4
- 80028ee: 4618 mov r0, r3
- 80028f0: f7ff ff6e bl 80027d0 <_ZN13geometry_msgs5TwistC1Ev>
- 80028f4: 687b ldr r3, [r7, #4]
- 80028f6: f103 0228 add.w r2, r3, #40 ; 0x28
- 80028fa: 2323 movs r3, #35 ; 0x23
- 80028fc: 2b00 cmp r3, #0
- 80028fe: db05 blt.n 800290c <_ZN13geometry_msgs19TwistWithCovarianceC1Ev+0x38>
- 8002900: f04f 0100 mov.w r1, #0
- 8002904: 6011 str r1, [r2, #0]
- 8002906: 3204 adds r2, #4
- 8002908: 3b01 subs r3, #1
- 800290a: e7f7 b.n 80028fc <_ZN13geometry_msgs19TwistWithCovarianceC1Ev+0x28>
- {
- }
- 800290c: 687b ldr r3, [r7, #4]
- 800290e: 4618 mov r0, r3
- 8002910: 3708 adds r7, #8
- 8002912: 46bd mov sp, r7
- 8002914: bd80 pop {r7, pc}
- 8002916: bf00 nop
- 8002918: 0800afa4 .word 0x0800afa4
-
-0800291c <_ZNK13geometry_msgs19TwistWithCovariance9serializeEPh>:
-
- virtual int serialize(unsigned char *outbuffer) const
- 800291c: b580 push {r7, lr}
- 800291e: b084 sub sp, #16
- 8002920: af00 add r7, sp, #0
- 8002922: 6078 str r0, [r7, #4]
- 8002924: 6039 str r1, [r7, #0]
- {
- int offset = 0;
- 8002926: 2300 movs r3, #0
- 8002928: 60fb str r3, [r7, #12]
- offset += this->twist.serialize(outbuffer + offset);
- 800292a: 687b ldr r3, [r7, #4]
- 800292c: 1d18 adds r0, r3, #4
- 800292e: 68fb ldr r3, [r7, #12]
- 8002930: 683a ldr r2, [r7, #0]
- 8002932: 4413 add r3, r2
- 8002934: 4619 mov r1, r3
- 8002936: f7ff ff67 bl 8002808 <_ZNK13geometry_msgs5Twist9serializeEPh>
- 800293a: 4602 mov r2, r0
- 800293c: 68fb ldr r3, [r7, #12]
- 800293e: 4413 add r3, r2
- 8002940: 60fb str r3, [r7, #12]
- for( uint32_t i = 0; i < 36; i++){
- 8002942: 2300 movs r3, #0
- 8002944: 60bb str r3, [r7, #8]
- 8002946: 68bb ldr r3, [r7, #8]
- 8002948: 2b23 cmp r3, #35 ; 0x23
- 800294a: d816 bhi.n 800297a <_ZNK13geometry_msgs19TwistWithCovariance9serializeEPh+0x5e>
- offset += serializeAvrFloat64(outbuffer + offset, this->covariance[i]);
- 800294c: 68fb ldr r3, [r7, #12]
- 800294e: 683a ldr r2, [r7, #0]
- 8002950: 18d1 adds r1, r2, r3
- 8002952: 687a ldr r2, [r7, #4]
- 8002954: 68bb ldr r3, [r7, #8]
- 8002956: 330a adds r3, #10
- 8002958: 009b lsls r3, r3, #2
- 800295a: 4413 add r3, r2
- 800295c: edd3 7a00 vldr s15, [r3]
- 8002960: eeb0 0a67 vmov.f32 s0, s15
- 8002964: 4608 mov r0, r1
- 8002966: f7fd fea7 bl 80006b8 <_ZN3ros3Msg19serializeAvrFloat64EPhf>
- 800296a: 4602 mov r2, r0
- 800296c: 68fb ldr r3, [r7, #12]
- 800296e: 4413 add r3, r2
- 8002970: 60fb str r3, [r7, #12]
- for( uint32_t i = 0; i < 36; i++){
- 8002972: 68bb ldr r3, [r7, #8]
- 8002974: 3301 adds r3, #1
- 8002976: 60bb str r3, [r7, #8]
- 8002978: e7e5 b.n 8002946 <_ZNK13geometry_msgs19TwistWithCovariance9serializeEPh+0x2a>
- }
- return offset;
- 800297a: 68fb ldr r3, [r7, #12]
- }
- 800297c: 4618 mov r0, r3
- 800297e: 3710 adds r7, #16
- 8002980: 46bd mov sp, r7
- 8002982: bd80 pop {r7, pc}
-
-08002984 <_ZN13geometry_msgs19TwistWithCovariance11deserializeEPh>:
-
- virtual int deserialize(unsigned char *inbuffer)
- 8002984: b580 push {r7, lr}
- 8002986: b084 sub sp, #16
- 8002988: af00 add r7, sp, #0
- 800298a: 6078 str r0, [r7, #4]
- 800298c: 6039 str r1, [r7, #0]
- {
- int offset = 0;
- 800298e: 2300 movs r3, #0
- 8002990: 60fb str r3, [r7, #12]
- offset += this->twist.deserialize(inbuffer + offset);
- 8002992: 687b ldr r3, [r7, #4]
- 8002994: 1d18 adds r0, r3, #4
- 8002996: 68fb ldr r3, [r7, #12]
- 8002998: 683a ldr r2, [r7, #0]
- 800299a: 4413 add r3, r2
- 800299c: 4619 mov r1, r3
- 800299e: f7ff ff58 bl 8002852 <_ZN13geometry_msgs5Twist11deserializeEPh>
- 80029a2: 4602 mov r2, r0
- 80029a4: 68fb ldr r3, [r7, #12]
- 80029a6: 4413 add r3, r2
- 80029a8: 60fb str r3, [r7, #12]
- for( uint32_t i = 0; i < 36; i++){
- 80029aa: 2300 movs r3, #0
- 80029ac: 60bb str r3, [r7, #8]
- 80029ae: 68bb ldr r3, [r7, #8]
- 80029b0: 2b23 cmp r3, #35 ; 0x23
- 80029b2: d812 bhi.n 80029da <_ZN13geometry_msgs19TwistWithCovariance11deserializeEPh+0x56>
- offset += deserializeAvrFloat64(inbuffer + offset, &(this->covariance[i]));
- 80029b4: 68fb ldr r3, [r7, #12]
- 80029b6: 683a ldr r2, [r7, #0]
- 80029b8: 18d0 adds r0, r2, r3
- 80029ba: 68bb ldr r3, [r7, #8]
- 80029bc: 330a adds r3, #10
- 80029be: 009b lsls r3, r3, #2
- 80029c0: 687a ldr r2, [r7, #4]
- 80029c2: 4413 add r3, r2
- 80029c4: 4619 mov r1, r3
- 80029c6: f7fd fee3 bl 8000790 <_ZN3ros3Msg21deserializeAvrFloat64EPKhPf>
- 80029ca: 4602 mov r2, r0
- 80029cc: 68fb ldr r3, [r7, #12]
- 80029ce: 4413 add r3, r2
- 80029d0: 60fb str r3, [r7, #12]
- for( uint32_t i = 0; i < 36; i++){
- 80029d2: 68bb ldr r3, [r7, #8]
- 80029d4: 3301 adds r3, #1
- 80029d6: 60bb str r3, [r7, #8]
- 80029d8: e7e9 b.n 80029ae <_ZN13geometry_msgs19TwistWithCovariance11deserializeEPh+0x2a>
- }
- return offset;
- 80029da: 68fb ldr r3, [r7, #12]
- }
- 80029dc: 4618 mov r0, r3
- 80029de: 3710 adds r7, #16
- 80029e0: 46bd mov sp, r7
- 80029e2: bd80 pop {r7, pc}
-
-080029e4 <_ZN13geometry_msgs19TwistWithCovariance7getTypeEv>:
-
- const char * getType(){ return "geometry_msgs/TwistWithCovariance"; };
- 80029e4: b480 push {r7}
- 80029e6: b083 sub sp, #12
- 80029e8: af00 add r7, sp, #0
- 80029ea: 6078 str r0, [r7, #4]
- 80029ec: 4b03 ldr r3, [pc, #12] ; (80029fc <_ZN13geometry_msgs19TwistWithCovariance7getTypeEv+0x18>)
- 80029ee: 4618 mov r0, r3
- 80029f0: 370c adds r7, #12
- 80029f2: 46bd mov sp, r7
- 80029f4: f85d 7b04 ldr.w r7, [sp], #4
- 80029f8: 4770 bx lr
- 80029fa: bf00 nop
- 80029fc: 0800ae44 .word 0x0800ae44
-
-08002a00 <_ZN13geometry_msgs19TwistWithCovariance6getMD5Ev>:
- const char * getMD5(){ return "1fe8a28e6890a4cc3ae4c3ca5c7d82e6"; };
- 8002a00: b480 push {r7}
- 8002a02: b083 sub sp, #12
- 8002a04: af00 add r7, sp, #0
- 8002a06: 6078 str r0, [r7, #4]
- 8002a08: 4b03 ldr r3, [pc, #12] ; (8002a18 <_ZN13geometry_msgs19TwistWithCovariance6getMD5Ev+0x18>)
- 8002a0a: 4618 mov r0, r3
- 8002a0c: 370c adds r7, #12
- 8002a0e: 46bd mov sp, r7
- 8002a10: f85d 7b04 ldr.w r7, [sp], #4
- 8002a14: 4770 bx lr
- 8002a16: bf00 nop
- 8002a18: 0800ae68 .word 0x0800ae68
-
-08002a1c <_ZN8nav_msgs8OdometryC1Ev>:
- typedef geometry_msgs::PoseWithCovariance _pose_type;
- _pose_type pose;
- typedef geometry_msgs::TwistWithCovariance _twist_type;
- _twist_type twist;
-
- Odometry():
- 8002a1c: b580 push {r7, lr}
- 8002a1e: b082 sub sp, #8
- 8002a20: af00 add r7, sp, #0
- 8002a22: 6078 str r0, [r7, #4]
- header(),
- child_frame_id(""),
- pose(),
- twist()
- 8002a24: 687b ldr r3, [r7, #4]
- 8002a26: 4618 mov r0, r3
- 8002a28: f7fd ff12 bl 8000850 <_ZN3ros3MsgC1Ev>
- 8002a2c: 4a0c ldr r2, [pc, #48] ; (8002a60 <_ZN8nav_msgs8OdometryC1Ev+0x44>)
- 8002a2e: 687b ldr r3, [r7, #4]
- 8002a30: 601a str r2, [r3, #0]
- 8002a32: 687b ldr r3, [r7, #4]
- 8002a34: 3304 adds r3, #4
- 8002a36: 4618 mov r0, r3
- 8002a38: f7fe ff46 bl 80018c8 <_ZN8std_msgs6HeaderC1Ev>
- 8002a3c: 687b ldr r3, [r7, #4]
- 8002a3e: 4a09 ldr r2, [pc, #36] ; (8002a64 <_ZN8nav_msgs8OdometryC1Ev+0x48>)
- 8002a40: 619a str r2, [r3, #24]
- 8002a42: 687b ldr r3, [r7, #4]
- 8002a44: 331c adds r3, #28
- 8002a46: 4618 mov r0, r3
- 8002a48: f7ff fe1c bl 8002684 <_ZN13geometry_msgs18PoseWithCovarianceC1Ev>
- 8002a4c: 687b ldr r3, [r7, #4]
- 8002a4e: 33d8 adds r3, #216 ; 0xd8
- 8002a50: 4618 mov r0, r3
- 8002a52: f7ff ff3f bl 80028d4 <_ZN13geometry_msgs19TwistWithCovarianceC1Ev>
- {
- }
- 8002a56: 687b ldr r3, [r7, #4]
- 8002a58: 4618 mov r0, r3
- 8002a5a: 3708 adds r7, #8
- 8002a5c: 46bd mov sp, r7
- 8002a5e: bd80 pop {r7, pc}
- 8002a60: 0800af8c .word 0x0800af8c
- 8002a64: 0800ab08 .word 0x0800ab08
-
-08002a68 <_ZNK8nav_msgs8Odometry9serializeEPh>:
-
- virtual int serialize(unsigned char *outbuffer) const
- 8002a68: b580 push {r7, lr}
- 8002a6a: b084 sub sp, #16
- 8002a6c: af00 add r7, sp, #0
- 8002a6e: 6078 str r0, [r7, #4]
- 8002a70: 6039 str r1, [r7, #0]
- {
- int offset = 0;
- 8002a72: 2300 movs r3, #0
- 8002a74: 60fb str r3, [r7, #12]
- offset += this->header.serialize(outbuffer + offset);
- 8002a76: 687b ldr r3, [r7, #4]
- 8002a78: 1d18 adds r0, r3, #4
- 8002a7a: 68fb ldr r3, [r7, #12]
- 8002a7c: 683a ldr r2, [r7, #0]
- 8002a7e: 4413 add r3, r2
- 8002a80: 4619 mov r1, r3
- 8002a82: f7fe ff41 bl 8001908 <_ZNK8std_msgs6Header9serializeEPh>
- 8002a86: 4602 mov r2, r0
- 8002a88: 68fb ldr r3, [r7, #12]
- 8002a8a: 4413 add r3, r2
- 8002a8c: 60fb str r3, [r7, #12]
- uint32_t length_child_frame_id = strlen(this->child_frame_id);
- 8002a8e: 687b ldr r3, [r7, #4]
- 8002a90: 699b ldr r3, [r3, #24]
- 8002a92: 4618 mov r0, r3
- 8002a94: f7fd fbd0 bl 8000238 <strlen>
- 8002a98: 60b8 str r0, [r7, #8]
- varToArr(outbuffer + offset, length_child_frame_id);
- 8002a9a: 68fb ldr r3, [r7, #12]
- 8002a9c: 683a ldr r2, [r7, #0]
- 8002a9e: 4413 add r3, r2
- 8002aa0: 68b9 ldr r1, [r7, #8]
- 8002aa2: 4618 mov r0, r3
- 8002aa4: f001 f883 bl 8003bae <_ZN3ros3Msg8varToArrIPhmEEvT_T0_>
- offset += 4;
- 8002aa8: 68fb ldr r3, [r7, #12]
- 8002aaa: 3304 adds r3, #4
- 8002aac: 60fb str r3, [r7, #12]
- memcpy(outbuffer + offset, this->child_frame_id, length_child_frame_id);
- 8002aae: 68fb ldr r3, [r7, #12]
- 8002ab0: 683a ldr r2, [r7, #0]
- 8002ab2: 18d0 adds r0, r2, r3
- 8002ab4: 687b ldr r3, [r7, #4]
- 8002ab6: 699b ldr r3, [r3, #24]
- 8002ab8: 68ba ldr r2, [r7, #8]
- 8002aba: 4619 mov r1, r3
- 8002abc: f007 fed0 bl 800a860 <memcpy>
- offset += length_child_frame_id;
- 8002ac0: 68fa ldr r2, [r7, #12]
- 8002ac2: 68bb ldr r3, [r7, #8]
- 8002ac4: 4413 add r3, r2
- 8002ac6: 60fb str r3, [r7, #12]
- offset += this->pose.serialize(outbuffer + offset);
- 8002ac8: 687b ldr r3, [r7, #4]
- 8002aca: f103 001c add.w r0, r3, #28
- 8002ace: 68fb ldr r3, [r7, #12]
- 8002ad0: 683a ldr r2, [r7, #0]
- 8002ad2: 4413 add r3, r2
- 8002ad4: 4619 mov r1, r3
- 8002ad6: f7ff fdf9 bl 80026cc <_ZNK13geometry_msgs18PoseWithCovariance9serializeEPh>
- 8002ada: 4602 mov r2, r0
- 8002adc: 68fb ldr r3, [r7, #12]
- 8002ade: 4413 add r3, r2
- 8002ae0: 60fb str r3, [r7, #12]
- offset += this->twist.serialize(outbuffer + offset);
- 8002ae2: 687b ldr r3, [r7, #4]
- 8002ae4: f103 00d8 add.w r0, r3, #216 ; 0xd8
- 8002ae8: 68fb ldr r3, [r7, #12]
- 8002aea: 683a ldr r2, [r7, #0]
- 8002aec: 4413 add r3, r2
- 8002aee: 4619 mov r1, r3
- 8002af0: f7ff ff14 bl 800291c <_ZNK13geometry_msgs19TwistWithCovariance9serializeEPh>
- 8002af4: 4602 mov r2, r0
- 8002af6: 68fb ldr r3, [r7, #12]
- 8002af8: 4413 add r3, r2
- 8002afa: 60fb str r3, [r7, #12]
- return offset;
- 8002afc: 68fb ldr r3, [r7, #12]
- }
- 8002afe: 4618 mov r0, r3
- 8002b00: 3710 adds r7, #16
- 8002b02: 46bd mov sp, r7
- 8002b04: bd80 pop {r7, pc}
-
-08002b06 <_ZN8nav_msgs8Odometry11deserializeEPh>:
-
- virtual int deserialize(unsigned char *inbuffer)
- 8002b06: b580 push {r7, lr}
- 8002b08: b086 sub sp, #24
- 8002b0a: af00 add r7, sp, #0
- 8002b0c: 6078 str r0, [r7, #4]
- 8002b0e: 6039 str r1, [r7, #0]
- {
- int offset = 0;
- 8002b10: 2300 movs r3, #0
- 8002b12: 613b str r3, [r7, #16]
- offset += this->header.deserialize(inbuffer + offset);
- 8002b14: 687b ldr r3, [r7, #4]
- 8002b16: 1d18 adds r0, r3, #4
- 8002b18: 693b ldr r3, [r7, #16]
- 8002b1a: 683a ldr r2, [r7, #0]
- 8002b1c: 4413 add r3, r2
- 8002b1e: 4619 mov r1, r3
- 8002b20: f7fe ff8a bl 8001a38 <_ZN8std_msgs6Header11deserializeEPh>
- 8002b24: 4602 mov r2, r0
- 8002b26: 693b ldr r3, [r7, #16]
- 8002b28: 4413 add r3, r2
- 8002b2a: 613b str r3, [r7, #16]
- uint32_t length_child_frame_id;
- arrToVar(length_child_frame_id, (inbuffer + offset));
- 8002b2c: 693b ldr r3, [r7, #16]
- 8002b2e: 683a ldr r2, [r7, #0]
- 8002b30: 441a add r2, r3
- 8002b32: f107 030c add.w r3, r7, #12
- 8002b36: 4611 mov r1, r2
- 8002b38: 4618 mov r0, r3
- 8002b3a: f001 f856 bl 8003bea <_ZN3ros3Msg8arrToVarImPhEEvRT_T0_>
- offset += 4;
- 8002b3e: 693b ldr r3, [r7, #16]
- 8002b40: 3304 adds r3, #4
- 8002b42: 613b str r3, [r7, #16]
- for(unsigned int k= offset; k< offset+length_child_frame_id; ++k){
- 8002b44: 693b ldr r3, [r7, #16]
- 8002b46: 617b str r3, [r7, #20]
- 8002b48: 693a ldr r2, [r7, #16]
- 8002b4a: 68fb ldr r3, [r7, #12]
- 8002b4c: 4413 add r3, r2
- 8002b4e: 697a ldr r2, [r7, #20]
- 8002b50: 429a cmp r2, r3
- 8002b52: d20c bcs.n 8002b6e <_ZN8nav_msgs8Odometry11deserializeEPh+0x68>
- inbuffer[k-1]=inbuffer[k];
- 8002b54: 683a ldr r2, [r7, #0]
- 8002b56: 697b ldr r3, [r7, #20]
- 8002b58: 441a add r2, r3
- 8002b5a: 697b ldr r3, [r7, #20]
- 8002b5c: 3b01 subs r3, #1
- 8002b5e: 6839 ldr r1, [r7, #0]
- 8002b60: 440b add r3, r1
- 8002b62: 7812 ldrb r2, [r2, #0]
- 8002b64: 701a strb r2, [r3, #0]
- for(unsigned int k= offset; k< offset+length_child_frame_id; ++k){
- 8002b66: 697b ldr r3, [r7, #20]
- 8002b68: 3301 adds r3, #1
- 8002b6a: 617b str r3, [r7, #20]
- 8002b6c: e7ec b.n 8002b48 <_ZN8nav_msgs8Odometry11deserializeEPh+0x42>
- }
- inbuffer[offset+length_child_frame_id-1]=0;
- 8002b6e: 693a ldr r2, [r7, #16]
- 8002b70: 68fb ldr r3, [r7, #12]
- 8002b72: 4413 add r3, r2
- 8002b74: 3b01 subs r3, #1
- 8002b76: 683a ldr r2, [r7, #0]
- 8002b78: 4413 add r3, r2
- 8002b7a: 2200 movs r2, #0
- 8002b7c: 701a strb r2, [r3, #0]
- this->child_frame_id = (char *)(inbuffer + offset-1);
- 8002b7e: 693b ldr r3, [r7, #16]
- 8002b80: 3b01 subs r3, #1
- 8002b82: 683a ldr r2, [r7, #0]
- 8002b84: 441a add r2, r3
- 8002b86: 687b ldr r3, [r7, #4]
- 8002b88: 619a str r2, [r3, #24]
- offset += length_child_frame_id;
- 8002b8a: 693a ldr r2, [r7, #16]
- 8002b8c: 68fb ldr r3, [r7, #12]
- 8002b8e: 4413 add r3, r2
- 8002b90: 613b str r3, [r7, #16]
- offset += this->pose.deserialize(inbuffer + offset);
- 8002b92: 687b ldr r3, [r7, #4]
- 8002b94: f103 001c add.w r0, r3, #28
- 8002b98: 693b ldr r3, [r7, #16]
- 8002b9a: 683a ldr r2, [r7, #0]
- 8002b9c: 4413 add r3, r2
- 8002b9e: 4619 mov r1, r3
- 8002ba0: f7ff fdc9 bl 8002736 <_ZN13geometry_msgs18PoseWithCovariance11deserializeEPh>
- 8002ba4: 4602 mov r2, r0
- 8002ba6: 693b ldr r3, [r7, #16]
- 8002ba8: 4413 add r3, r2
- 8002baa: 613b str r3, [r7, #16]
- offset += this->twist.deserialize(inbuffer + offset);
- 8002bac: 687b ldr r3, [r7, #4]
- 8002bae: f103 00d8 add.w r0, r3, #216 ; 0xd8
- 8002bb2: 693b ldr r3, [r7, #16]
- 8002bb4: 683a ldr r2, [r7, #0]
- 8002bb6: 4413 add r3, r2
- 8002bb8: 4619 mov r1, r3
- 8002bba: f7ff fee3 bl 8002984 <_ZN13geometry_msgs19TwistWithCovariance11deserializeEPh>
- 8002bbe: 4602 mov r2, r0
- 8002bc0: 693b ldr r3, [r7, #16]
- 8002bc2: 4413 add r3, r2
- 8002bc4: 613b str r3, [r7, #16]
- return offset;
- 8002bc6: 693b ldr r3, [r7, #16]
- }
- 8002bc8: 4618 mov r0, r3
- 8002bca: 3718 adds r7, #24
- 8002bcc: 46bd mov sp, r7
- 8002bce: bd80 pop {r7, pc}
-
-08002bd0 <_ZN8nav_msgs8Odometry7getTypeEv>:
-
- const char * getType(){ return "nav_msgs/Odometry"; };
- 8002bd0: b480 push {r7}
- 8002bd2: b083 sub sp, #12
- 8002bd4: af00 add r7, sp, #0
- 8002bd6: 6078 str r0, [r7, #4]
- 8002bd8: 4b03 ldr r3, [pc, #12] ; (8002be8 <_ZN8nav_msgs8Odometry7getTypeEv+0x18>)
- 8002bda: 4618 mov r0, r3
- 8002bdc: 370c adds r7, #12
- 8002bde: 46bd mov sp, r7
- 8002be0: f85d 7b04 ldr.w r7, [sp], #4
- 8002be4: 4770 bx lr
- 8002be6: bf00 nop
- 8002be8: 0800ae8c .word 0x0800ae8c
-
-08002bec <_ZN8nav_msgs8Odometry6getMD5Ev>:
- const char * getMD5(){ return "cd5e73d190d741a2f92e81eda573aca7"; };
- 8002bec: b480 push {r7}
- 8002bee: b083 sub sp, #12
- 8002bf0: af00 add r7, sp, #0
- 8002bf2: 6078 str r0, [r7, #4]
- 8002bf4: 4b03 ldr r3, [pc, #12] ; (8002c04 <_ZN8nav_msgs8Odometry6getMD5Ev+0x18>)
- 8002bf6: 4618 mov r0, r3
- 8002bf8: 370c adds r7, #12
- 8002bfa: 46bd mov sp, r7
- 8002bfc: f85d 7b04 ldr.w r7, [sp], #4
- 8002c00: 4770 bx lr
- 8002c02: bf00 nop
- 8002c04: 0800aea0 .word 0x0800aea0
-
-08002c08 <_ZN12OdometryCalcC1E7EncoderS0_>:
- odometry_.twist.twist.linear.x = 0;
-
- kBaseline = 0.35; //in meters
- }
-
- OdometryCalc(Encoder left, Encoder right){
- 8002c08: b084 sub sp, #16
- 8002c0a: b5b0 push {r4, r5, r7, lr}
- 8002c0c: b082 sub sp, #8
- 8002c0e: af00 add r7, sp, #0
- 8002c10: 6078 str r0, [r7, #4]
- 8002c12: f107 001c add.w r0, r7, #28
- 8002c16: e880 000e stmia.w r0, {r1, r2, r3}
- 8002c1a: 687b ldr r3, [r7, #4]
- 8002c1c: 4618 mov r0, r3
- 8002c1e: f7ff fbeb bl 80023f8 <_ZN7EncoderC1Ev>
- 8002c22: 687b ldr r3, [r7, #4]
- 8002c24: 331c adds r3, #28
- 8002c26: 4618 mov r0, r3
- 8002c28: f7ff fbe6 bl 80023f8 <_ZN7EncoderC1Ev>
- 8002c2c: 687b ldr r3, [r7, #4]
- 8002c2e: 333c adds r3, #60 ; 0x3c
- 8002c30: 4618 mov r0, r3
- 8002c32: f7ff fef3 bl 8002a1c <_ZN8nav_msgs8OdometryC1Ev>
-
- left_encoder_ = left;
- 8002c36: 687b ldr r3, [r7, #4]
- 8002c38: 461d mov r5, r3
- 8002c3a: f107 041c add.w r4, r7, #28
- 8002c3e: cc0f ldmia r4!, {r0, r1, r2, r3}
- 8002c40: c50f stmia r5!, {r0, r1, r2, r3}
- 8002c42: e894 0007 ldmia.w r4, {r0, r1, r2}
- 8002c46: e885 0007 stmia.w r5, {r0, r1, r2}
- right_encoder_ = right;
- 8002c4a: 687b ldr r3, [r7, #4]
- 8002c4c: f103 041c add.w r4, r3, #28
- 8002c50: f107 0538 add.w r5, r7, #56 ; 0x38
- 8002c54: cd0f ldmia r5!, {r0, r1, r2, r3}
- 8002c56: c40f stmia r4!, {r0, r1, r2, r3}
- 8002c58: e895 0007 ldmia.w r5, {r0, r1, r2}
- 8002c5c: e884 0007 stmia.w r4, {r0, r1, r2}
-
- theta_ = 0;
- 8002c60: 687b ldr r3, [r7, #4]
- 8002c62: f04f 0200 mov.w r2, #0
- 8002c66: 639a str r2, [r3, #56] ; 0x38
-
- odometry_.header.frame_id = "odom";
- 8002c68: 687b ldr r3, [r7, #4]
- 8002c6a: 4a1c ldr r2, [pc, #112] ; (8002cdc <_ZN12OdometryCalcC1E7EncoderS0_+0xd4>)
- 8002c6c: 651a str r2, [r3, #80] ; 0x50
- odometry_.child_frame_id = "base_link";
- 8002c6e: 687b ldr r3, [r7, #4]
- 8002c70: 4a1b ldr r2, [pc, #108] ; (8002ce0 <_ZN12OdometryCalcC1E7EncoderS0_+0xd8>)
- 8002c72: 655a str r2, [r3, #84] ; 0x54
-
- // odometry_.pose.covariance = 0.0;
- odometry_.pose.pose.position.x = 0.0;
- 8002c74: 687b ldr r3, [r7, #4]
- 8002c76: f04f 0200 mov.w r2, #0
- 8002c7a: 665a str r2, [r3, #100] ; 0x64
- odometry_.pose.pose.position.y = 0.0;
- 8002c7c: 687b ldr r3, [r7, #4]
- 8002c7e: f04f 0200 mov.w r2, #0
- 8002c82: 669a str r2, [r3, #104] ; 0x68
- odometry_.pose.pose.position.z = 0.0;
- 8002c84: 687b ldr r3, [r7, #4]
- 8002c86: f04f 0200 mov.w r2, #0
- 8002c8a: 66da str r2, [r3, #108] ; 0x6c
-
- //orientation è il quaternione
- odometry_.pose.pose.orientation.x = 0.0;
- 8002c8c: 687b ldr r3, [r7, #4]
- 8002c8e: f04f 0200 mov.w r2, #0
- 8002c92: 675a str r2, [r3, #116] ; 0x74
- odometry_.pose.pose.orientation.y = 0.0;
- 8002c94: 687b ldr r3, [r7, #4]
- 8002c96: f04f 0200 mov.w r2, #0
- 8002c9a: 679a str r2, [r3, #120] ; 0x78
- odometry_.pose.pose.orientation.z = 0.0;
- 8002c9c: 687b ldr r3, [r7, #4]
- 8002c9e: f04f 0200 mov.w r2, #0
- 8002ca2: 67da str r2, [r3, #124] ; 0x7c
- odometry_.pose.pose.orientation.w = 0.0;
- 8002ca4: 687b ldr r3, [r7, #4]
- 8002ca6: f04f 0200 mov.w r2, #0
- 8002caa: f8c3 2080 str.w r2, [r3, #128] ; 0x80
-
- //odometry_.twist.covariance = 0.0;
- odometry_.twist.twist.angular.z = 0;
- 8002cae: 687b ldr r3, [r7, #4]
- 8002cb0: f04f 0200 mov.w r2, #0
- 8002cb4: f8c3 2138 str.w r2, [r3, #312] ; 0x138
- odometry_.twist.twist.linear.x = 0;
- 8002cb8: 687b ldr r3, [r7, #4]
- 8002cba: f04f 0200 mov.w r2, #0
- 8002cbe: f8c3 2120 str.w r2, [r3, #288] ; 0x120
-
- kBaseline = 0.35; //in meters
- 8002cc2: 687b ldr r3, [r7, #4]
- 8002cc4: 4a07 ldr r2, [pc, #28] ; (8002ce4 <_ZN12OdometryCalcC1E7EncoderS0_+0xdc>)
- 8002cc6: f8c3 21cc str.w r2, [r3, #460] ; 0x1cc
- }
- 8002cca: 687b ldr r3, [r7, #4]
- 8002ccc: 4618 mov r0, r3
- 8002cce: 3708 adds r7, #8
- 8002cd0: 46bd mov sp, r7
- 8002cd2: e8bd 40b0 ldmia.w sp!, {r4, r5, r7, lr}
- 8002cd6: b004 add sp, #16
- 8002cd8: 4770 bx lr
- 8002cda: bf00 nop
- 8002cdc: 0800aec4 .word 0x0800aec4
- 8002ce0: 0800aecc .word 0x0800aecc
- 8002ce4: 3eb33333 .word 0x3eb33333
-
-08002ce8 <_ZN11sensor_msgs3ImuC1Ev>:
- float angular_velocity_covariance[9];
- typedef geometry_msgs::Vector3 _linear_acceleration_type;
- _linear_acceleration_type linear_acceleration;
- float linear_acceleration_covariance[9];
-
- Imu():
- 8002ce8: b580 push {r7, lr}
- 8002cea: b082 sub sp, #8
- 8002cec: af00 add r7, sp, #0
- 8002cee: 6078 str r0, [r7, #4]
- orientation(),
- orientation_covariance(),
- angular_velocity(),
- angular_velocity_covariance(),
- linear_acceleration(),
- linear_acceleration_covariance()
- 8002cf0: 687b ldr r3, [r7, #4]
- 8002cf2: 4618 mov r0, r3
- 8002cf4: f7fd fdac bl 8000850 <_ZN3ros3MsgC1Ev>
- 8002cf8: 4a1f ldr r2, [pc, #124] ; (8002d78 <_ZN11sensor_msgs3ImuC1Ev+0x90>)
- 8002cfa: 687b ldr r3, [r7, #4]
- 8002cfc: 601a str r2, [r3, #0]
- 8002cfe: 687b ldr r3, [r7, #4]
- 8002d00: 3304 adds r3, #4
- 8002d02: 4618 mov r0, r3
- 8002d04: f7fe fde0 bl 80018c8 <_ZN8std_msgs6HeaderC1Ev>
- 8002d08: 687b ldr r3, [r7, #4]
- 8002d0a: 3318 adds r3, #24
- 8002d0c: 4618 mov r0, r3
- 8002d0e: f7ff f815 bl 8001d3c <_ZN13geometry_msgs10QuaternionC1Ev>
- 8002d12: 687b ldr r3, [r7, #4]
- 8002d14: f103 022c add.w r2, r3, #44 ; 0x2c
- 8002d18: 2308 movs r3, #8
- 8002d1a: 2b00 cmp r3, #0
- 8002d1c: db05 blt.n 8002d2a <_ZN11sensor_msgs3ImuC1Ev+0x42>
- 8002d1e: f04f 0100 mov.w r1, #0
- 8002d22: 6011 str r1, [r2, #0]
- 8002d24: 3204 adds r2, #4
- 8002d26: 3b01 subs r3, #1
- 8002d28: e7f7 b.n 8002d1a <_ZN11sensor_msgs3ImuC1Ev+0x32>
- 8002d2a: 687b ldr r3, [r7, #4]
- 8002d2c: 3350 adds r3, #80 ; 0x50
- 8002d2e: 4618 mov r0, r3
- 8002d30: f7fe ff5e bl 8001bf0 <_ZN13geometry_msgs7Vector3C1Ev>
- 8002d34: 687b ldr r3, [r7, #4]
- 8002d36: f103 0260 add.w r2, r3, #96 ; 0x60
- 8002d3a: 2308 movs r3, #8
- 8002d3c: 2b00 cmp r3, #0
- 8002d3e: db05 blt.n 8002d4c <_ZN11sensor_msgs3ImuC1Ev+0x64>
- 8002d40: f04f 0100 mov.w r1, #0
- 8002d44: 6011 str r1, [r2, #0]
- 8002d46: 3204 adds r2, #4
- 8002d48: 3b01 subs r3, #1
- 8002d4a: e7f7 b.n 8002d3c <_ZN11sensor_msgs3ImuC1Ev+0x54>
- 8002d4c: 687b ldr r3, [r7, #4]
- 8002d4e: 3384 adds r3, #132 ; 0x84
- 8002d50: 4618 mov r0, r3
- 8002d52: f7fe ff4d bl 8001bf0 <_ZN13geometry_msgs7Vector3C1Ev>
- 8002d56: 687b ldr r3, [r7, #4]
- 8002d58: f103 0294 add.w r2, r3, #148 ; 0x94
- 8002d5c: 2308 movs r3, #8
- 8002d5e: 2b00 cmp r3, #0
- 8002d60: db05 blt.n 8002d6e <_ZN11sensor_msgs3ImuC1Ev+0x86>
- 8002d62: f04f 0100 mov.w r1, #0
- 8002d66: 6011 str r1, [r2, #0]
- 8002d68: 3204 adds r2, #4
- 8002d6a: 3b01 subs r3, #1
- 8002d6c: e7f7 b.n 8002d5e <_ZN11sensor_msgs3ImuC1Ev+0x76>
- {
- }
- 8002d6e: 687b ldr r3, [r7, #4]
- 8002d70: 4618 mov r0, r3
- 8002d72: 3708 adds r7, #8
- 8002d74: 46bd mov sp, r7
- 8002d76: bd80 pop {r7, pc}
- 8002d78: 0800af74 .word 0x0800af74
-
-08002d7c <_ZNK11sensor_msgs3Imu9serializeEPh>:
-
- virtual int serialize(unsigned char *outbuffer) const
- 8002d7c: b580 push {r7, lr}
- 8002d7e: b086 sub sp, #24
- 8002d80: af00 add r7, sp, #0
- 8002d82: 6078 str r0, [r7, #4]
- 8002d84: 6039 str r1, [r7, #0]
- {
- int offset = 0;
- 8002d86: 2300 movs r3, #0
- 8002d88: 617b str r3, [r7, #20]
- offset += this->header.serialize(outbuffer + offset);
- 8002d8a: 687b ldr r3, [r7, #4]
- 8002d8c: 1d18 adds r0, r3, #4
- 8002d8e: 697b ldr r3, [r7, #20]
- 8002d90: 683a ldr r2, [r7, #0]
- 8002d92: 4413 add r3, r2
- 8002d94: 4619 mov r1, r3
- 8002d96: f7fe fdb7 bl 8001908 <_ZNK8std_msgs6Header9serializeEPh>
- 8002d9a: 4602 mov r2, r0
- 8002d9c: 697b ldr r3, [r7, #20]
- 8002d9e: 4413 add r3, r2
- 8002da0: 617b str r3, [r7, #20]
- offset += this->orientation.serialize(outbuffer + offset);
- 8002da2: 687b ldr r3, [r7, #4]
- 8002da4: f103 0018 add.w r0, r3, #24
- 8002da8: 697b ldr r3, [r7, #20]
- 8002daa: 683a ldr r2, [r7, #0]
- 8002dac: 4413 add r3, r2
- 8002dae: 4619 mov r1, r3
- 8002db0: f7fe ffe6 bl 8001d80 <_ZNK13geometry_msgs10Quaternion9serializeEPh>
- 8002db4: 4602 mov r2, r0
- 8002db6: 697b ldr r3, [r7, #20]
- 8002db8: 4413 add r3, r2
- 8002dba: 617b str r3, [r7, #20]
- for( uint32_t i = 0; i < 9; i++){
- 8002dbc: 2300 movs r3, #0
- 8002dbe: 613b str r3, [r7, #16]
- 8002dc0: 693b ldr r3, [r7, #16]
- 8002dc2: 2b08 cmp r3, #8
- 8002dc4: d817 bhi.n 8002df6 <_ZNK11sensor_msgs3Imu9serializeEPh+0x7a>
- offset += serializeAvrFloat64(outbuffer + offset, this->orientation_covariance[i]);
- 8002dc6: 697b ldr r3, [r7, #20]
- 8002dc8: 683a ldr r2, [r7, #0]
- 8002dca: 18d1 adds r1, r2, r3
- 8002dcc: 687a ldr r2, [r7, #4]
- 8002dce: 693b ldr r3, [r7, #16]
- 8002dd0: 330a adds r3, #10
- 8002dd2: 009b lsls r3, r3, #2
- 8002dd4: 4413 add r3, r2
- 8002dd6: 3304 adds r3, #4
- 8002dd8: edd3 7a00 vldr s15, [r3]
- 8002ddc: eeb0 0a67 vmov.f32 s0, s15
- 8002de0: 4608 mov r0, r1
- 8002de2: f7fd fc69 bl 80006b8 <_ZN3ros3Msg19serializeAvrFloat64EPhf>
- 8002de6: 4602 mov r2, r0
- 8002de8: 697b ldr r3, [r7, #20]
- 8002dea: 4413 add r3, r2
- 8002dec: 617b str r3, [r7, #20]
- for( uint32_t i = 0; i < 9; i++){
- 8002dee: 693b ldr r3, [r7, #16]
- 8002df0: 3301 adds r3, #1
- 8002df2: 613b str r3, [r7, #16]
- 8002df4: e7e4 b.n 8002dc0 <_ZNK11sensor_msgs3Imu9serializeEPh+0x44>
- }
- offset += this->angular_velocity.serialize(outbuffer + offset);
- 8002df6: 687b ldr r3, [r7, #4]
- 8002df8: f103 0050 add.w r0, r3, #80 ; 0x50
- 8002dfc: 697b ldr r3, [r7, #20]
- 8002dfe: 683a ldr r2, [r7, #0]
- 8002e00: 4413 add r3, r2
- 8002e02: 4619 mov r1, r3
- 8002e04: f7fe ff12 bl 8001c2c <_ZNK13geometry_msgs7Vector39serializeEPh>
- 8002e08: 4602 mov r2, r0
- 8002e0a: 697b ldr r3, [r7, #20]
- 8002e0c: 4413 add r3, r2
- 8002e0e: 617b str r3, [r7, #20]
- for( uint32_t i = 0; i < 9; i++){
- 8002e10: 2300 movs r3, #0
- 8002e12: 60fb str r3, [r7, #12]
- 8002e14: 68fb ldr r3, [r7, #12]
- 8002e16: 2b08 cmp r3, #8
- 8002e18: d816 bhi.n 8002e48 <_ZNK11sensor_msgs3Imu9serializeEPh+0xcc>
- offset += serializeAvrFloat64(outbuffer + offset, this->angular_velocity_covariance[i]);
- 8002e1a: 697b ldr r3, [r7, #20]
- 8002e1c: 683a ldr r2, [r7, #0]
- 8002e1e: 18d1 adds r1, r2, r3
- 8002e20: 687a ldr r2, [r7, #4]
- 8002e22: 68fb ldr r3, [r7, #12]
- 8002e24: 3318 adds r3, #24
- 8002e26: 009b lsls r3, r3, #2
- 8002e28: 4413 add r3, r2
- 8002e2a: edd3 7a00 vldr s15, [r3]
- 8002e2e: eeb0 0a67 vmov.f32 s0, s15
- 8002e32: 4608 mov r0, r1
- 8002e34: f7fd fc40 bl 80006b8 <_ZN3ros3Msg19serializeAvrFloat64EPhf>
- 8002e38: 4602 mov r2, r0
- 8002e3a: 697b ldr r3, [r7, #20]
- 8002e3c: 4413 add r3, r2
- 8002e3e: 617b str r3, [r7, #20]
- for( uint32_t i = 0; i < 9; i++){
- 8002e40: 68fb ldr r3, [r7, #12]
- 8002e42: 3301 adds r3, #1
- 8002e44: 60fb str r3, [r7, #12]
- 8002e46: e7e5 b.n 8002e14 <_ZNK11sensor_msgs3Imu9serializeEPh+0x98>
- }
- offset += this->linear_acceleration.serialize(outbuffer + offset);
- 8002e48: 687b ldr r3, [r7, #4]
- 8002e4a: f103 0084 add.w r0, r3, #132 ; 0x84
- 8002e4e: 697b ldr r3, [r7, #20]
- 8002e50: 683a ldr r2, [r7, #0]
- 8002e52: 4413 add r3, r2
- 8002e54: 4619 mov r1, r3
- 8002e56: f7fe fee9 bl 8001c2c <_ZNK13geometry_msgs7Vector39serializeEPh>
- 8002e5a: 4602 mov r2, r0
- 8002e5c: 697b ldr r3, [r7, #20]
- 8002e5e: 4413 add r3, r2
- 8002e60: 617b str r3, [r7, #20]
- for( uint32_t i = 0; i < 9; i++){
- 8002e62: 2300 movs r3, #0
- 8002e64: 60bb str r3, [r7, #8]
- 8002e66: 68bb ldr r3, [r7, #8]
- 8002e68: 2b08 cmp r3, #8
- 8002e6a: d817 bhi.n 8002e9c <_ZNK11sensor_msgs3Imu9serializeEPh+0x120>
- offset += serializeAvrFloat64(outbuffer + offset, this->linear_acceleration_covariance[i]);
- 8002e6c: 697b ldr r3, [r7, #20]
- 8002e6e: 683a ldr r2, [r7, #0]
- 8002e70: 18d1 adds r1, r2, r3
- 8002e72: 687a ldr r2, [r7, #4]
- 8002e74: 68bb ldr r3, [r7, #8]
- 8002e76: 3324 adds r3, #36 ; 0x24
- 8002e78: 009b lsls r3, r3, #2
- 8002e7a: 4413 add r3, r2
- 8002e7c: 3304 adds r3, #4
- 8002e7e: edd3 7a00 vldr s15, [r3]
- 8002e82: eeb0 0a67 vmov.f32 s0, s15
- 8002e86: 4608 mov r0, r1
- 8002e88: f7fd fc16 bl 80006b8 <_ZN3ros3Msg19serializeAvrFloat64EPhf>
- 8002e8c: 4602 mov r2, r0
- 8002e8e: 697b ldr r3, [r7, #20]
- 8002e90: 4413 add r3, r2
- 8002e92: 617b str r3, [r7, #20]
- for( uint32_t i = 0; i < 9; i++){
- 8002e94: 68bb ldr r3, [r7, #8]
- 8002e96: 3301 adds r3, #1
- 8002e98: 60bb str r3, [r7, #8]
- 8002e9a: e7e4 b.n 8002e66 <_ZNK11sensor_msgs3Imu9serializeEPh+0xea>
- }
- return offset;
- 8002e9c: 697b ldr r3, [r7, #20]
- }
- 8002e9e: 4618 mov r0, r3
- 8002ea0: 3718 adds r7, #24
- 8002ea2: 46bd mov sp, r7
- 8002ea4: bd80 pop {r7, pc}
-
-08002ea6 <_ZN11sensor_msgs3Imu11deserializeEPh>:
-
- virtual int deserialize(unsigned char *inbuffer)
- 8002ea6: b580 push {r7, lr}
- 8002ea8: b086 sub sp, #24
- 8002eaa: af00 add r7, sp, #0
- 8002eac: 6078 str r0, [r7, #4]
- 8002eae: 6039 str r1, [r7, #0]
- {
- int offset = 0;
- 8002eb0: 2300 movs r3, #0
- 8002eb2: 617b str r3, [r7, #20]
- offset += this->header.deserialize(inbuffer + offset);
- 8002eb4: 687b ldr r3, [r7, #4]
- 8002eb6: 1d18 adds r0, r3, #4
- 8002eb8: 697b ldr r3, [r7, #20]
- 8002eba: 683a ldr r2, [r7, #0]
- 8002ebc: 4413 add r3, r2
- 8002ebe: 4619 mov r1, r3
- 8002ec0: f7fe fdba bl 8001a38 <_ZN8std_msgs6Header11deserializeEPh>
- 8002ec4: 4602 mov r2, r0
- 8002ec6: 697b ldr r3, [r7, #20]
- 8002ec8: 4413 add r3, r2
- 8002eca: 617b str r3, [r7, #20]
- offset += this->orientation.deserialize(inbuffer + offset);
- 8002ecc: 687b ldr r3, [r7, #4]
- 8002ece: f103 0018 add.w r0, r3, #24
- 8002ed2: 697b ldr r3, [r7, #20]
- 8002ed4: 683a ldr r2, [r7, #0]
- 8002ed6: 4413 add r3, r2
- 8002ed8: 4619 mov r1, r3
- 8002eda: f7fe ff99 bl 8001e10 <_ZN13geometry_msgs10Quaternion11deserializeEPh>
- 8002ede: 4602 mov r2, r0
- 8002ee0: 697b ldr r3, [r7, #20]
- 8002ee2: 4413 add r3, r2
- 8002ee4: 617b str r3, [r7, #20]
- for( uint32_t i = 0; i < 9; i++){
- 8002ee6: 2300 movs r3, #0
- 8002ee8: 613b str r3, [r7, #16]
- 8002eea: 693b ldr r3, [r7, #16]
- 8002eec: 2b08 cmp r3, #8
- 8002eee: d813 bhi.n 8002f18 <_ZN11sensor_msgs3Imu11deserializeEPh+0x72>
- offset += deserializeAvrFloat64(inbuffer + offset, &(this->orientation_covariance[i]));
- 8002ef0: 697b ldr r3, [r7, #20]
- 8002ef2: 683a ldr r2, [r7, #0]
- 8002ef4: 18d0 adds r0, r2, r3
- 8002ef6: 693b ldr r3, [r7, #16]
- 8002ef8: 330a adds r3, #10
- 8002efa: 009b lsls r3, r3, #2
- 8002efc: 687a ldr r2, [r7, #4]
- 8002efe: 4413 add r3, r2
- 8002f00: 3304 adds r3, #4
- 8002f02: 4619 mov r1, r3
- 8002f04: f7fd fc44 bl 8000790 <_ZN3ros3Msg21deserializeAvrFloat64EPKhPf>
- 8002f08: 4602 mov r2, r0
- 8002f0a: 697b ldr r3, [r7, #20]
- 8002f0c: 4413 add r3, r2
- 8002f0e: 617b str r3, [r7, #20]
- for( uint32_t i = 0; i < 9; i++){
- 8002f10: 693b ldr r3, [r7, #16]
- 8002f12: 3301 adds r3, #1
- 8002f14: 613b str r3, [r7, #16]
- 8002f16: e7e8 b.n 8002eea <_ZN11sensor_msgs3Imu11deserializeEPh+0x44>
- }
- offset += this->angular_velocity.deserialize(inbuffer + offset);
- 8002f18: 687b ldr r3, [r7, #4]
- 8002f1a: f103 0050 add.w r0, r3, #80 ; 0x50
- 8002f1e: 697b ldr r3, [r7, #20]
- 8002f20: 683a ldr r2, [r7, #0]
- 8002f22: 4413 add r3, r2
- 8002f24: 4619 mov r1, r3
- 8002f26: f7fe feba bl 8001c9e <_ZN13geometry_msgs7Vector311deserializeEPh>
- 8002f2a: 4602 mov r2, r0
- 8002f2c: 697b ldr r3, [r7, #20]
- 8002f2e: 4413 add r3, r2
- 8002f30: 617b str r3, [r7, #20]
- for( uint32_t i = 0; i < 9; i++){
- 8002f32: 2300 movs r3, #0
- 8002f34: 60fb str r3, [r7, #12]
- 8002f36: 68fb ldr r3, [r7, #12]
- 8002f38: 2b08 cmp r3, #8
- 8002f3a: d812 bhi.n 8002f62 <_ZN11sensor_msgs3Imu11deserializeEPh+0xbc>
- offset += deserializeAvrFloat64(inbuffer + offset, &(this->angular_velocity_covariance[i]));
- 8002f3c: 697b ldr r3, [r7, #20]
- 8002f3e: 683a ldr r2, [r7, #0]
- 8002f40: 18d0 adds r0, r2, r3
- 8002f42: 68fb ldr r3, [r7, #12]
- 8002f44: 3318 adds r3, #24
- 8002f46: 009b lsls r3, r3, #2
- 8002f48: 687a ldr r2, [r7, #4]
- 8002f4a: 4413 add r3, r2
- 8002f4c: 4619 mov r1, r3
- 8002f4e: f7fd fc1f bl 8000790 <_ZN3ros3Msg21deserializeAvrFloat64EPKhPf>
- 8002f52: 4602 mov r2, r0
- 8002f54: 697b ldr r3, [r7, #20]
- 8002f56: 4413 add r3, r2
- 8002f58: 617b str r3, [r7, #20]
- for( uint32_t i = 0; i < 9; i++){
- 8002f5a: 68fb ldr r3, [r7, #12]
- 8002f5c: 3301 adds r3, #1
- 8002f5e: 60fb str r3, [r7, #12]
- 8002f60: e7e9 b.n 8002f36 <_ZN11sensor_msgs3Imu11deserializeEPh+0x90>
- }
- offset += this->linear_acceleration.deserialize(inbuffer + offset);
- 8002f62: 687b ldr r3, [r7, #4]
- 8002f64: f103 0084 add.w r0, r3, #132 ; 0x84
- 8002f68: 697b ldr r3, [r7, #20]
- 8002f6a: 683a ldr r2, [r7, #0]
- 8002f6c: 4413 add r3, r2
- 8002f6e: 4619 mov r1, r3
- 8002f70: f7fe fe95 bl 8001c9e <_ZN13geometry_msgs7Vector311deserializeEPh>
- 8002f74: 4602 mov r2, r0
- 8002f76: 697b ldr r3, [r7, #20]
- 8002f78: 4413 add r3, r2
- 8002f7a: 617b str r3, [r7, #20]
- for( uint32_t i = 0; i < 9; i++){
- 8002f7c: 2300 movs r3, #0
- 8002f7e: 60bb str r3, [r7, #8]
- 8002f80: 68bb ldr r3, [r7, #8]
- 8002f82: 2b08 cmp r3, #8
- 8002f84: d813 bhi.n 8002fae <_ZN11sensor_msgs3Imu11deserializeEPh+0x108>
- offset += deserializeAvrFloat64(inbuffer + offset, &(this->linear_acceleration_covariance[i]));
- 8002f86: 697b ldr r3, [r7, #20]
- 8002f88: 683a ldr r2, [r7, #0]
- 8002f8a: 18d0 adds r0, r2, r3
- 8002f8c: 68bb ldr r3, [r7, #8]
- 8002f8e: 3324 adds r3, #36 ; 0x24
- 8002f90: 009b lsls r3, r3, #2
- 8002f92: 687a ldr r2, [r7, #4]
- 8002f94: 4413 add r3, r2
- 8002f96: 3304 adds r3, #4
- 8002f98: 4619 mov r1, r3
- 8002f9a: f7fd fbf9 bl 8000790 <_ZN3ros3Msg21deserializeAvrFloat64EPKhPf>
- 8002f9e: 4602 mov r2, r0
- 8002fa0: 697b ldr r3, [r7, #20]
- 8002fa2: 4413 add r3, r2
- 8002fa4: 617b str r3, [r7, #20]
- for( uint32_t i = 0; i < 9; i++){
- 8002fa6: 68bb ldr r3, [r7, #8]
- 8002fa8: 3301 adds r3, #1
- 8002faa: 60bb str r3, [r7, #8]
- 8002fac: e7e8 b.n 8002f80 <_ZN11sensor_msgs3Imu11deserializeEPh+0xda>
- }
- return offset;
- 8002fae: 697b ldr r3, [r7, #20]
- }
- 8002fb0: 4618 mov r0, r3
- 8002fb2: 3718 adds r7, #24
- 8002fb4: 46bd mov sp, r7
- 8002fb6: bd80 pop {r7, pc}
-
-08002fb8 <_ZN11sensor_msgs3Imu7getTypeEv>:
-
- const char * getType(){ return "sensor_msgs/Imu"; };
- 8002fb8: b480 push {r7}
- 8002fba: b083 sub sp, #12
- 8002fbc: af00 add r7, sp, #0
- 8002fbe: 6078 str r0, [r7, #4]
- 8002fc0: 4b03 ldr r3, [pc, #12] ; (8002fd0 <_ZN11sensor_msgs3Imu7getTypeEv+0x18>)
- 8002fc2: 4618 mov r0, r3
- 8002fc4: 370c adds r7, #12
- 8002fc6: 46bd mov sp, r7
- 8002fc8: f85d 7b04 ldr.w r7, [sp], #4
- 8002fcc: 4770 bx lr
- 8002fce: bf00 nop
- 8002fd0: 0800aed8 .word 0x0800aed8
-
-08002fd4 <_ZN11sensor_msgs3Imu6getMD5Ev>:
- const char * getMD5(){ return "6a62c6daae103f4ff57a132d6f95cec2"; };
- 8002fd4: b480 push {r7}
- 8002fd6: b083 sub sp, #12
- 8002fd8: af00 add r7, sp, #0
- 8002fda: 6078 str r0, [r7, #4]
- 8002fdc: 4b03 ldr r3, [pc, #12] ; (8002fec <_ZN11sensor_msgs3Imu6getMD5Ev+0x18>)
- 8002fde: 4618 mov r0, r3
- 8002fe0: 370c adds r7, #12
- 8002fe2: 46bd mov sp, r7
- 8002fe4: f85d 7b04 ldr.w r7, [sp], #4
- 8002fe8: 4770 bx lr
- 8002fea: bf00 nop
- 8002fec: 0800aee8 .word 0x0800aee8
-
-08002ff0 <_ZN3ros3MsgaSERKS0_>:
- 8002ff0: b480 push {r7}
- 8002ff2: b083 sub sp, #12
- 8002ff4: af00 add r7, sp, #0
- 8002ff6: 6078 str r0, [r7, #4]
- 8002ff8: 6039 str r1, [r7, #0]
- 8002ffa: 687b ldr r3, [r7, #4]
- 8002ffc: 4618 mov r0, r3
- 8002ffe: 370c adds r7, #12
- 8003000: 46bd mov sp, r7
- 8003002: f85d 7b04 ldr.w r7, [sp], #4
- 8003006: 4770 bx lr
-
-08003008 <_ZN13geometry_msgs10QuaternionaSERKS0_>:
- class Quaternion : public ros::Msg
- 8003008: b580 push {r7, lr}
- 800300a: b082 sub sp, #8
- 800300c: af00 add r7, sp, #0
- 800300e: 6078 str r0, [r7, #4]
- 8003010: 6039 str r1, [r7, #0]
- 8003012: 687b ldr r3, [r7, #4]
- 8003014: 683a ldr r2, [r7, #0]
- 8003016: 4611 mov r1, r2
- 8003018: 4618 mov r0, r3
- 800301a: f7ff ffe9 bl 8002ff0 <_ZN3ros3MsgaSERKS0_>
- 800301e: 683b ldr r3, [r7, #0]
- 8003020: 685a ldr r2, [r3, #4]
- 8003022: 687b ldr r3, [r7, #4]
- 8003024: 605a str r2, [r3, #4]
- 8003026: 683b ldr r3, [r7, #0]
- 8003028: 689a ldr r2, [r3, #8]
- 800302a: 687b ldr r3, [r7, #4]
- 800302c: 609a str r2, [r3, #8]
- 800302e: 683b ldr r3, [r7, #0]
- 8003030: 68da ldr r2, [r3, #12]
- 8003032: 687b ldr r3, [r7, #4]
- 8003034: 60da str r2, [r3, #12]
- 8003036: 683b ldr r3, [r7, #0]
- 8003038: 691a ldr r2, [r3, #16]
- 800303a: 687b ldr r3, [r7, #4]
- 800303c: 611a str r2, [r3, #16]
- 800303e: 687b ldr r3, [r7, #4]
- 8003040: 4618 mov r0, r3
- 8003042: 3708 adds r7, #8
- 8003044: 46bd mov sp, r7
- 8003046: bd80 pop {r7, pc}
-
-08003048 <main>:
-
-/**
- * @brief The application entry point.
- * @retval int
- */
-int main(void) {
- 8003048: b590 push {r4, r7, lr}
- 800304a: b083 sub sp, #12
- 800304c: af00 add r7, sp, #0
- /* USER CODE END 1 */
-
- /* MCU Configuration--------------------------------------------------------*/
-
- /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
- HAL_Init();
- 800304e: f002 f8e6 bl 800521e <HAL_Init>
- /* USER CODE BEGIN Init */
-
- /* USER CODE END Init */
-
- /* Configure the system clock */
- SystemClock_Config();
- 8003052: f000 f895 bl 8003180 <_Z18SystemClock_Configv>
- /* USER CODE BEGIN SysInit */
-
- /* USER CODE END SysInit */
-
- /* Initialize all configured peripherals */
- MX_GPIO_Init();
- 8003056: f000 fb85 bl 8003764 <_ZL12MX_GPIO_Initv>
- MX_DMA_Init();
- 800305a: f000 fb41 bl 80036e0 <_ZL11MX_DMA_Initv>
- MX_TIM2_Init();
- 800305e: f000 f91b bl 8003298 <_ZL12MX_TIM2_Initv>
- MX_TIM3_Init();
- 8003062: f000 f977 bl 8003354 <_ZL12MX_TIM3_Initv>
- MX_TIM4_Init();
- 8003066: f000 f9d3 bl 8003410 <_ZL12MX_TIM4_Initv>
- MX_TIM5_Init();
- 800306a: f000 fa71 bl 8003550 <_ZL12MX_TIM5_Initv>
- MX_USART3_UART_Init();
- 800306e: f000 facf bl 8003610 <_ZL19MX_USART3_UART_Initv>
- MX_USART6_UART_Init();
- 8003072: f000 fb01 bl 8003678 <_ZL19MX_USART6_UART_Initv>
- /* USER CODE BEGIN 2 */
-
- nh.initNode();
- 8003076: 4831 ldr r0, [pc, #196] ; (800313c <main+0xf4>)
- 8003078: f000 fe9c bl 8003db4 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8initNodeEv>
- nh.advertise(chatter);
- 800307c: 4930 ldr r1, [pc, #192] ; (8003140 <main+0xf8>)
- 800307e: 482f ldr r0, [pc, #188] ; (800313c <main+0xf4>)
- 8003080: f000 fdd8 bl 8003c34 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE9advertiseERNS_9PublisherE>
- nh.advertise(odom_pub);
- 8003084: 492f ldr r1, [pc, #188] ; (8003144 <main+0xfc>)
- 8003086: 482d ldr r0, [pc, #180] ; (800313c <main+0xf4>)
- 8003088: f000 fdd4 bl 8003c34 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE9advertiseERNS_9PublisherE>
- br.init(nh);
- 800308c: 492b ldr r1, [pc, #172] ; (800313c <main+0xf4>)
- 800308e: 482e ldr r0, [pc, #184] ; (8003148 <main+0x100>)
- 8003090: f7ff f98c bl 80023ac <_ZN2tf20TransformBroadcaster4initERN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEE>
- str_msg.data = hello;
- 8003094: 4b2d ldr r3, [pc, #180] ; (800314c <main+0x104>)
- 8003096: 4a2e ldr r2, [pc, #184] ; (8003150 <main+0x108>)
- 8003098: 605a str r2, [r3, #4]
-
- left_encoder.Setup();
- 800309a: 482e ldr r0, [pc, #184] ; (8003154 <main+0x10c>)
- 800309c: f7fd fa9a bl 80005d4 <_ZN7Encoder5SetupEv>
- right_encoder.Setup();
- 80030a0: 482d ldr r0, [pc, #180] ; (8003158 <main+0x110>)
- 80030a2: f7fd fa97 bl 80005d4 <_ZN7Encoder5SetupEv>
- /* USER CODE END 2 */
-
- /* Infinite loop */
- /* USER CODE BEGIN WHILE */
- while (1) {
- velocity_l = left_encoder.GetCount();
- 80030a6: 482b ldr r0, [pc, #172] ; (8003154 <main+0x10c>)
- 80030a8: f7fd fa4e bl 8000548 <_ZN7Encoder8GetCountEv>
- 80030ac: ee07 0a90 vmov s15, r0
- 80030b0: eef8 7ae7 vcvt.f32.s32 s15, s15
- 80030b4: 4b29 ldr r3, [pc, #164] ; (800315c <main+0x114>)
- 80030b6: edc3 7a00 vstr s15, [r3]
- velocity_r = right_encoder.GetCount();
- 80030ba: 4827 ldr r0, [pc, #156] ; (8003158 <main+0x110>)
- 80030bc: f7fd fa44 bl 8000548 <_ZN7Encoder8GetCountEv>
- 80030c0: ee07 0a90 vmov s15, r0
- 80030c4: eef8 7ae7 vcvt.f32.s32 s15, s15
- 80030c8: 4b25 ldr r3, [pc, #148] ; (8003160 <main+0x118>)
- 80030ca: edc3 7a00 vstr s15, [r3]
-
- //odom.OdometryUpdateMessage();
- //odom.odometry_.header.stamp = nh.now();
-
- //odometry = odom.odometry_;
- odom_pub.publish(&imu);
- 80030ce: 4925 ldr r1, [pc, #148] ; (8003164 <main+0x11c>)
- 80030d0: 481c ldr r0, [pc, #112] ; (8003144 <main+0xfc>)
- 80030d2: f7fe fab8 bl 8001646 <_ZN3ros9Publisher7publishEPKNS_3MsgE>
-
- chatter.publish(&str_msg);
- 80030d6: 491d ldr r1, [pc, #116] ; (800314c <main+0x104>)
- 80030d8: 4819 ldr r0, [pc, #100] ; (8003140 <main+0xf8>)
- 80030da: f7fe fab4 bl 8001646 <_ZN3ros9Publisher7publishEPKNS_3MsgE>
-
- odom_trans.header.stamp = nh.now();
- 80030de: 4c22 ldr r4, [pc, #136] ; (8003168 <main+0x120>)
- 80030e0: 463b mov r3, r7
- 80030e2: 4916 ldr r1, [pc, #88] ; (800313c <main+0xf4>)
- 80030e4: 4618 mov r0, r3
- 80030e6: f000 fe83 bl 8003df0 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE3nowEv>
- 80030ea: f104 030c add.w r3, r4, #12
- 80030ee: 463a mov r2, r7
- 80030f0: e892 0003 ldmia.w r2, {r0, r1}
- 80030f4: e883 0003 stmia.w r3, {r0, r1}
- odom_trans.header.frame_id = "odom";
- 80030f8: 4b1b ldr r3, [pc, #108] ; (8003168 <main+0x120>)
- 80030fa: 4a1c ldr r2, [pc, #112] ; (800316c <main+0x124>)
- 80030fc: 615a str r2, [r3, #20]
- odom_trans.child_frame_id = "base_link";
- 80030fe: 4b1a ldr r3, [pc, #104] ; (8003168 <main+0x120>)
- 8003100: 4a1b ldr r2, [pc, #108] ; (8003170 <main+0x128>)
- 8003102: 619a str r2, [r3, #24]
- odom_trans.transform.translation.x = odometry.pose.pose.position.x;
- 8003104: 4b1b ldr r3, [pc, #108] ; (8003174 <main+0x12c>)
- 8003106: 6a9b ldr r3, [r3, #40] ; 0x28
- 8003108: 4a17 ldr r2, [pc, #92] ; (8003168 <main+0x120>)
- 800310a: 6253 str r3, [r2, #36] ; 0x24
- odom_trans.transform.translation.y = odometry.pose.pose.position.x;
- 800310c: 4b19 ldr r3, [pc, #100] ; (8003174 <main+0x12c>)
- 800310e: 6a9b ldr r3, [r3, #40] ; 0x28
- 8003110: 4a15 ldr r2, [pc, #84] ; (8003168 <main+0x120>)
- 8003112: 6293 str r3, [r2, #40] ; 0x28
- odom_trans.transform.translation.z = 0;
- 8003114: 4b14 ldr r3, [pc, #80] ; (8003168 <main+0x120>)
- 8003116: f04f 0200 mov.w r2, #0
- 800311a: 62da str r2, [r3, #44] ; 0x2c
- odom_trans.transform.rotation = odometry.pose.pose.orientation;
- 800311c: 4916 ldr r1, [pc, #88] ; (8003178 <main+0x130>)
- 800311e: 4817 ldr r0, [pc, #92] ; (800317c <main+0x134>)
- 8003120: f7ff ff72 bl 8003008 <_ZN13geometry_msgs10QuaternionaSERKS0_>
- br.sendTransform(odom_trans);
- 8003124: 4910 ldr r1, [pc, #64] ; (8003168 <main+0x120>)
- 8003126: 4808 ldr r0, [pc, #32] ; (8003148 <main+0x100>)
- 8003128: f7ff f94f bl 80023ca <_ZN2tf20TransformBroadcaster13sendTransformERN13geometry_msgs16TransformStampedE>
-
- nh.spinOnce();
- 800312c: 4803 ldr r0, [pc, #12] ; (800313c <main+0xf4>)
- 800312e: f000 fe9b bl 8003e68 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv>
-
- HAL_Delay(1000);
- 8003132: f44f 707a mov.w r0, #1000 ; 0x3e8
- 8003136: f002 f8cf bl 80052d8 <HAL_Delay>
- velocity_l = left_encoder.GetCount();
- 800313a: e7b4 b.n 80030a6 <main+0x5e>
- 800313c: 20000634 .word 0x20000634
- 8003140: 20000cf8 .word 0x20000cf8
- 8003144: 20000f54 .word 0x20000f54
- 8003148: 20000f68 .word 0x20000f68
- 800314c: 20000cf0 .word 0x20000cf0
- 8003150: 20000000 .word 0x20000000
- 8003154: 20000424 .word 0x20000424
- 8003158: 20000440 .word 0x20000440
- 800315c: 2000062c .word 0x2000062c
- 8003160: 20000630 .word 0x20000630
- 8003164: 20000e9c .word 0x20000e9c
- 8003168: 20000fcc .word 0x20000fcc
- 800316c: 0800aec4 .word 0x0800aec4
- 8003170: 0800aecc .word 0x0800aecc
- 8003174: 20000d0c .word 0x20000d0c
- 8003178: 20000d40 .word 0x20000d40
- 800317c: 20000ffc .word 0x20000ffc
-
-08003180 <_Z18SystemClock_Configv>:
-
-/**
- * @brief System Clock Configuration
- * @retval None
- */
-void SystemClock_Config(void) {
- 8003180: b580 push {r7, lr}
- 8003182: b0b8 sub sp, #224 ; 0xe0
- 8003184: af00 add r7, sp, #0
- RCC_OscInitTypeDef RCC_OscInitStruct = { 0 };
- 8003186: f107 03ac add.w r3, r7, #172 ; 0xac
- 800318a: 2234 movs r2, #52 ; 0x34
- 800318c: 2100 movs r1, #0
- 800318e: 4618 mov r0, r3
- 8003190: f007 fb71 bl 800a876 <memset>
- RCC_ClkInitTypeDef RCC_ClkInitStruct = { 0 };
- 8003194: f107 0398 add.w r3, r7, #152 ; 0x98
- 8003198: 2200 movs r2, #0
- 800319a: 601a str r2, [r3, #0]
- 800319c: 605a str r2, [r3, #4]
- 800319e: 609a str r2, [r3, #8]
- 80031a0: 60da str r2, [r3, #12]
- 80031a2: 611a str r2, [r3, #16]
- RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = { 0 };
- 80031a4: f107 0308 add.w r3, r7, #8
- 80031a8: 2290 movs r2, #144 ; 0x90
- 80031aa: 2100 movs r1, #0
- 80031ac: 4618 mov r0, r3
- 80031ae: f007 fb62 bl 800a876 <memset>
-
- /** Configure the main internal regulator output voltage
- */
- __HAL_RCC_PWR_CLK_ENABLE();
- 80031b2: 4b37 ldr r3, [pc, #220] ; (8003290 <_Z18SystemClock_Configv+0x110>)
- 80031b4: 6c1b ldr r3, [r3, #64] ; 0x40
- 80031b6: 4a36 ldr r2, [pc, #216] ; (8003290 <_Z18SystemClock_Configv+0x110>)
- 80031b8: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
- 80031bc: 6413 str r3, [r2, #64] ; 0x40
- 80031be: 4b34 ldr r3, [pc, #208] ; (8003290 <_Z18SystemClock_Configv+0x110>)
- 80031c0: 6c1b ldr r3, [r3, #64] ; 0x40
- 80031c2: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
- 80031c6: 607b str r3, [r7, #4]
- 80031c8: 687b ldr r3, [r7, #4]
- __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE3);
- 80031ca: 4b32 ldr r3, [pc, #200] ; (8003294 <_Z18SystemClock_Configv+0x114>)
- 80031cc: 681b ldr r3, [r3, #0]
- 80031ce: f423 4340 bic.w r3, r3, #49152 ; 0xc000
- 80031d2: 4a30 ldr r2, [pc, #192] ; (8003294 <_Z18SystemClock_Configv+0x114>)
- 80031d4: f443 4380 orr.w r3, r3, #16384 ; 0x4000
- 80031d8: 6013 str r3, [r2, #0]
- 80031da: 4b2e ldr r3, [pc, #184] ; (8003294 <_Z18SystemClock_Configv+0x114>)
- 80031dc: 681b ldr r3, [r3, #0]
- 80031de: f403 4340 and.w r3, r3, #49152 ; 0xc000
- 80031e2: 603b str r3, [r7, #0]
- 80031e4: 683b ldr r3, [r7, #0]
- /** Initializes the CPU, AHB and APB busses clocks
- */
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
- 80031e6: 2302 movs r3, #2
- 80031e8: f8c7 30ac str.w r3, [r7, #172] ; 0xac
- RCC_OscInitStruct.HSIState = RCC_HSI_ON;
- 80031ec: 2301 movs r3, #1
- 80031ee: f8c7 30b8 str.w r3, [r7, #184] ; 0xb8
- RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
- 80031f2: 2310 movs r3, #16
- 80031f4: f8c7 30bc str.w r3, [r7, #188] ; 0xbc
- RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
- 80031f8: 2300 movs r3, #0
- 80031fa: f8c7 30c4 str.w r3, [r7, #196] ; 0xc4
- if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
- 80031fe: f107 03ac add.w r3, r7, #172 ; 0xac
- 8003202: 4618 mov r0, r3
- 8003204: f002 fef8 bl 8005ff8 <HAL_RCC_OscConfig>
- 8003208: 4603 mov r3, r0
- 800320a: 2b00 cmp r3, #0
- 800320c: bf14 ite ne
- 800320e: 2301 movne r3, #1
- 8003210: 2300 moveq r3, #0
- 8003212: b2db uxtb r3, r3
- 8003214: 2b00 cmp r3, #0
- 8003216: d001 beq.n 800321c <_Z18SystemClock_Configv+0x9c>
- Error_Handler();
- 8003218: f000 fcc2 bl 8003ba0 <Error_Handler>
- }
- /** Initializes the CPU, AHB and APB busses clocks
- */
- RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
- 800321c: 230f movs r3, #15
- 800321e: f8c7 3098 str.w r3, [r7, #152] ; 0x98
- | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
- RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI;
- 8003222: 2300 movs r3, #0
- 8003224: f8c7 309c str.w r3, [r7, #156] ; 0x9c
- RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
- 8003228: 2300 movs r3, #0
- 800322a: f8c7 30a0 str.w r3, [r7, #160] ; 0xa0
- RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
- 800322e: 2300 movs r3, #0
- 8003230: f8c7 30a4 str.w r3, [r7, #164] ; 0xa4
- RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
- 8003234: 2300 movs r3, #0
- 8003236: f8c7 30a8 str.w r3, [r7, #168] ; 0xa8
-
- if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) {
- 800323a: f107 0398 add.w r3, r7, #152 ; 0x98
- 800323e: 2100 movs r1, #0
- 8003240: 4618 mov r0, r3
- 8003242: f003 f94b bl 80064dc <HAL_RCC_ClockConfig>
- 8003246: 4603 mov r3, r0
- 8003248: 2b00 cmp r3, #0
- 800324a: bf14 ite ne
- 800324c: 2301 movne r3, #1
- 800324e: 2300 moveq r3, #0
- 8003250: b2db uxtb r3, r3
- 8003252: 2b00 cmp r3, #0
- 8003254: d001 beq.n 800325a <_Z18SystemClock_Configv+0xda>
- Error_Handler();
- 8003256: f000 fca3 bl 8003ba0 <Error_Handler>
- }
- PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART3
- 800325a: f44f 6310 mov.w r3, #2304 ; 0x900
- 800325e: 60bb str r3, [r7, #8]
- | RCC_PERIPHCLK_USART6;
- PeriphClkInitStruct.Usart3ClockSelection = RCC_USART3CLKSOURCE_PCLK1;
- 8003260: 2300 movs r3, #0
- 8003262: 657b str r3, [r7, #84] ; 0x54
- PeriphClkInitStruct.Usart6ClockSelection = RCC_USART6CLKSOURCE_PCLK2;
- 8003264: 2300 movs r3, #0
- 8003266: 663b str r3, [r7, #96] ; 0x60
- if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
- 8003268: f107 0308 add.w r3, r7, #8
- 800326c: 4618 mov r0, r3
- 800326e: f003 fb03 bl 8006878 <HAL_RCCEx_PeriphCLKConfig>
- 8003272: 4603 mov r3, r0
- 8003274: 2b00 cmp r3, #0
- 8003276: bf14 ite ne
- 8003278: 2301 movne r3, #1
- 800327a: 2300 moveq r3, #0
- 800327c: b2db uxtb r3, r3
- 800327e: 2b00 cmp r3, #0
- 8003280: d001 beq.n 8003286 <_Z18SystemClock_Configv+0x106>
- Error_Handler();
- 8003282: f000 fc8d bl 8003ba0 <Error_Handler>
- }
-}
- 8003286: bf00 nop
- 8003288: 37e0 adds r7, #224 ; 0xe0
- 800328a: 46bd mov sp, r7
- 800328c: bd80 pop {r7, pc}
- 800328e: bf00 nop
- 8003290: 40023800 .word 0x40023800
- 8003294: 40007000 .word 0x40007000
-
-08003298 <_ZL12MX_TIM2_Initv>:
-/**
- * @brief TIM2 Initialization Function
- * @param None
- * @retval None
- */
-static void MX_TIM2_Init(void) {
- 8003298: b580 push {r7, lr}
- 800329a: b08c sub sp, #48 ; 0x30
- 800329c: af00 add r7, sp, #0
-
- /* USER CODE BEGIN TIM2_Init 0 */
-
- /* USER CODE END TIM2_Init 0 */
-
- TIM_Encoder_InitTypeDef sConfig = { 0 };
- 800329e: f107 030c add.w r3, r7, #12
- 80032a2: 2224 movs r2, #36 ; 0x24
- 80032a4: 2100 movs r1, #0
- 80032a6: 4618 mov r0, r3
- 80032a8: f007 fae5 bl 800a876 <memset>
- TIM_MasterConfigTypeDef sMasterConfig = { 0 };
- 80032ac: 463b mov r3, r7
- 80032ae: 2200 movs r2, #0
- 80032b0: 601a str r2, [r3, #0]
- 80032b2: 605a str r2, [r3, #4]
- 80032b4: 609a str r2, [r3, #8]
-
- /* USER CODE BEGIN TIM2_Init 1 */
-
- /* USER CODE END TIM2_Init 1 */
- htim2.Instance = TIM2;
- 80032b6: 4b26 ldr r3, [pc, #152] ; (8003350 <_ZL12MX_TIM2_Initv+0xb8>)
- 80032b8: f04f 4280 mov.w r2, #1073741824 ; 0x40000000
- 80032bc: 601a str r2, [r3, #0]
- htim2.Init.Prescaler = 0;
- 80032be: 4b24 ldr r3, [pc, #144] ; (8003350 <_ZL12MX_TIM2_Initv+0xb8>)
- 80032c0: 2200 movs r2, #0
- 80032c2: 605a str r2, [r3, #4]
- htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
- 80032c4: 4b22 ldr r3, [pc, #136] ; (8003350 <_ZL12MX_TIM2_Initv+0xb8>)
- 80032c6: 2200 movs r2, #0
- 80032c8: 609a str r2, [r3, #8]
- htim2.Init.Period = 4294967295;
- 80032ca: 4b21 ldr r3, [pc, #132] ; (8003350 <_ZL12MX_TIM2_Initv+0xb8>)
- 80032cc: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff
- 80032d0: 60da str r2, [r3, #12]
- htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
- 80032d2: 4b1f ldr r3, [pc, #124] ; (8003350 <_ZL12MX_TIM2_Initv+0xb8>)
- 80032d4: 2200 movs r2, #0
- 80032d6: 611a str r2, [r3, #16]
- htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
- 80032d8: 4b1d ldr r3, [pc, #116] ; (8003350 <_ZL12MX_TIM2_Initv+0xb8>)
- 80032da: 2200 movs r2, #0
- 80032dc: 619a str r2, [r3, #24]
- sConfig.EncoderMode = TIM_ENCODERMODE_TI12;
- 80032de: 2303 movs r3, #3
- 80032e0: 60fb str r3, [r7, #12]
- sConfig.IC1Polarity = TIM_ICPOLARITY_RISING;
- 80032e2: 2300 movs r3, #0
- 80032e4: 613b str r3, [r7, #16]
- sConfig.IC1Selection = TIM_ICSELECTION_DIRECTTI;
- 80032e6: 2301 movs r3, #1
- 80032e8: 617b str r3, [r7, #20]
- sConfig.IC1Prescaler = TIM_ICPSC_DIV1;
- 80032ea: 2300 movs r3, #0
- 80032ec: 61bb str r3, [r7, #24]
- sConfig.IC1Filter = 0;
- 80032ee: 2300 movs r3, #0
- 80032f0: 61fb str r3, [r7, #28]
- sConfig.IC2Polarity = TIM_ICPOLARITY_RISING;
- 80032f2: 2300 movs r3, #0
- 80032f4: 623b str r3, [r7, #32]
- sConfig.IC2Selection = TIM_ICSELECTION_DIRECTTI;
- 80032f6: 2301 movs r3, #1
- 80032f8: 627b str r3, [r7, #36] ; 0x24
- sConfig.IC2Prescaler = TIM_ICPSC_DIV1;
- 80032fa: 2300 movs r3, #0
- 80032fc: 62bb str r3, [r7, #40] ; 0x28
- sConfig.IC2Filter = 0;
- 80032fe: 2300 movs r3, #0
- 8003300: 62fb str r3, [r7, #44] ; 0x2c
- if (HAL_TIM_Encoder_Init(&htim2, &sConfig) != HAL_OK) {
- 8003302: f107 030c add.w r3, r7, #12
- 8003306: 4619 mov r1, r3
- 8003308: 4811 ldr r0, [pc, #68] ; (8003350 <_ZL12MX_TIM2_Initv+0xb8>)
- 800330a: f003 ff3b bl 8007184 <HAL_TIM_Encoder_Init>
- 800330e: 4603 mov r3, r0
- 8003310: 2b00 cmp r3, #0
- 8003312: bf14 ite ne
- 8003314: 2301 movne r3, #1
- 8003316: 2300 moveq r3, #0
- 8003318: b2db uxtb r3, r3
- 800331a: 2b00 cmp r3, #0
- 800331c: d001 beq.n 8003322 <_ZL12MX_TIM2_Initv+0x8a>
- Error_Handler();
- 800331e: f000 fc3f bl 8003ba0 <Error_Handler>
- }
- sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
- 8003322: 2300 movs r3, #0
- 8003324: 603b str r3, [r7, #0]
- sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
- 8003326: 2300 movs r3, #0
- 8003328: 60bb str r3, [r7, #8]
- if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig)
- 800332a: 463b mov r3, r7
- 800332c: 4619 mov r1, r3
- 800332e: 4808 ldr r0, [pc, #32] ; (8003350 <_ZL12MX_TIM2_Initv+0xb8>)
- 8003330: f004 fec8 bl 80080c4 <HAL_TIMEx_MasterConfigSynchronization>
- 8003334: 4603 mov r3, r0
- != HAL_OK) {
- 8003336: 2b00 cmp r3, #0
- 8003338: bf14 ite ne
- 800333a: 2301 movne r3, #1
- 800333c: 2300 moveq r3, #0
- 800333e: b2db uxtb r3, r3
- if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig)
- 8003340: 2b00 cmp r3, #0
- 8003342: d001 beq.n 8003348 <_ZL12MX_TIM2_Initv+0xb0>
- Error_Handler();
- 8003344: f000 fc2c bl 8003ba0 <Error_Handler>
- }
- /* USER CODE BEGIN TIM2_Init 2 */
-
- /* USER CODE END TIM2_Init 2 */
-
-}
- 8003348: bf00 nop
- 800334a: 3730 adds r7, #48 ; 0x30
- 800334c: 46bd mov sp, r7
- 800334e: bd80 pop {r7, pc}
- 8003350: 200000a4 .word 0x200000a4
-
-08003354 <_ZL12MX_TIM3_Initv>:
-/**
- * @brief TIM3 Initialization Function
- * @param None
- * @retval None
- */
-static void MX_TIM3_Init(void) {
- 8003354: b580 push {r7, lr}
- 8003356: b088 sub sp, #32
- 8003358: af00 add r7, sp, #0
-
- /* USER CODE BEGIN TIM3_Init 0 */
-
- /* USER CODE END TIM3_Init 0 */
-
- TIM_ClockConfigTypeDef sClockSourceConfig = { 0 };
- 800335a: f107 0310 add.w r3, r7, #16
- 800335e: 2200 movs r2, #0
- 8003360: 601a str r2, [r3, #0]
- 8003362: 605a str r2, [r3, #4]
- 8003364: 609a str r2, [r3, #8]
- 8003366: 60da str r2, [r3, #12]
- TIM_MasterConfigTypeDef sMasterConfig = { 0 };
- 8003368: 1d3b adds r3, r7, #4
- 800336a: 2200 movs r2, #0
- 800336c: 601a str r2, [r3, #0]
- 800336e: 605a str r2, [r3, #4]
- 8003370: 609a str r2, [r3, #8]
-
- /* USER CODE BEGIN TIM3_Init 1 */
-
- /* USER CODE END TIM3_Init 1 */
- htim3.Instance = TIM3;
- 8003372: 4b25 ldr r3, [pc, #148] ; (8003408 <_ZL12MX_TIM3_Initv+0xb4>)
- 8003374: 4a25 ldr r2, [pc, #148] ; (800340c <_ZL12MX_TIM3_Initv+0xb8>)
- 8003376: 601a str r2, [r3, #0]
- htim3.Init.Prescaler = 39999;
- 8003378: 4b23 ldr r3, [pc, #140] ; (8003408 <_ZL12MX_TIM3_Initv+0xb4>)
- 800337a: f649 423f movw r2, #39999 ; 0x9c3f
- 800337e: 605a str r2, [r3, #4]
- htim3.Init.CounterMode = TIM_COUNTERMODE_UP;
- 8003380: 4b21 ldr r3, [pc, #132] ; (8003408 <_ZL12MX_TIM3_Initv+0xb4>)
- 8003382: 2200 movs r2, #0
- 8003384: 609a str r2, [r3, #8]
- htim3.Init.Period = 9;
- 8003386: 4b20 ldr r3, [pc, #128] ; (8003408 <_ZL12MX_TIM3_Initv+0xb4>)
- 8003388: 2209 movs r2, #9
- 800338a: 60da str r2, [r3, #12]
- htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
- 800338c: 4b1e ldr r3, [pc, #120] ; (8003408 <_ZL12MX_TIM3_Initv+0xb4>)
- 800338e: 2200 movs r2, #0
- 8003390: 611a str r2, [r3, #16]
- htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
- 8003392: 4b1d ldr r3, [pc, #116] ; (8003408 <_ZL12MX_TIM3_Initv+0xb4>)
- 8003394: 2200 movs r2, #0
- 8003396: 619a str r2, [r3, #24]
- if (HAL_TIM_Base_Init(&htim3) != HAL_OK) {
- 8003398: 481b ldr r0, [pc, #108] ; (8003408 <_ZL12MX_TIM3_Initv+0xb4>)
- 800339a: f003 fe93 bl 80070c4 <HAL_TIM_Base_Init>
- 800339e: 4603 mov r3, r0
- 80033a0: 2b00 cmp r3, #0
- 80033a2: bf14 ite ne
- 80033a4: 2301 movne r3, #1
- 80033a6: 2300 moveq r3, #0
- 80033a8: b2db uxtb r3, r3
- 80033aa: 2b00 cmp r3, #0
- 80033ac: d001 beq.n 80033b2 <_ZL12MX_TIM3_Initv+0x5e>
- Error_Handler();
- 80033ae: f000 fbf7 bl 8003ba0 <Error_Handler>
- }
- sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
- 80033b2: f44f 5380 mov.w r3, #4096 ; 0x1000
- 80033b6: 613b str r3, [r7, #16]
- if (HAL_TIM_ConfigClockSource(&htim3, &sClockSourceConfig) != HAL_OK) {
- 80033b8: f107 0310 add.w r3, r7, #16
- 80033bc: 4619 mov r1, r3
- 80033be: 4812 ldr r0, [pc, #72] ; (8003408 <_ZL12MX_TIM3_Initv+0xb4>)
- 80033c0: f004 f9e0 bl 8007784 <HAL_TIM_ConfigClockSource>
- 80033c4: 4603 mov r3, r0
- 80033c6: 2b00 cmp r3, #0
- 80033c8: bf14 ite ne
- 80033ca: 2301 movne r3, #1
- 80033cc: 2300 moveq r3, #0
- 80033ce: b2db uxtb r3, r3
- 80033d0: 2b00 cmp r3, #0
- 80033d2: d001 beq.n 80033d8 <_ZL12MX_TIM3_Initv+0x84>
- Error_Handler();
- 80033d4: f000 fbe4 bl 8003ba0 <Error_Handler>
- }
- sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
- 80033d8: 2300 movs r3, #0
- 80033da: 607b str r3, [r7, #4]
- sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
- 80033dc: 2300 movs r3, #0
- 80033de: 60fb str r3, [r7, #12]
- if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig)
- 80033e0: 1d3b adds r3, r7, #4
- 80033e2: 4619 mov r1, r3
- 80033e4: 4808 ldr r0, [pc, #32] ; (8003408 <_ZL12MX_TIM3_Initv+0xb4>)
- 80033e6: f004 fe6d bl 80080c4 <HAL_TIMEx_MasterConfigSynchronization>
- 80033ea: 4603 mov r3, r0
- != HAL_OK) {
- 80033ec: 2b00 cmp r3, #0
- 80033ee: bf14 ite ne
- 80033f0: 2301 movne r3, #1
- 80033f2: 2300 moveq r3, #0
- 80033f4: b2db uxtb r3, r3
- if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig)
- 80033f6: 2b00 cmp r3, #0
- 80033f8: d001 beq.n 80033fe <_ZL12MX_TIM3_Initv+0xaa>
- Error_Handler();
- 80033fa: f000 fbd1 bl 8003ba0 <Error_Handler>
- }
- /* USER CODE BEGIN TIM3_Init 2 */
-
- /* USER CODE END TIM3_Init 2 */
-
-}
- 80033fe: bf00 nop
- 8003400: 3720 adds r7, #32
- 8003402: 46bd mov sp, r7
- 8003404: bd80 pop {r7, pc}
- 8003406: bf00 nop
- 8003408: 200000e4 .word 0x200000e4
- 800340c: 40000400 .word 0x40000400
-
-08003410 <_ZL12MX_TIM4_Initv>:
-/**
- * @brief TIM4 Initialization Function
- * @param None
- * @retval None
- */
-static void MX_TIM4_Init(void) {
- 8003410: b580 push {r7, lr}
- 8003412: b08e sub sp, #56 ; 0x38
- 8003414: af00 add r7, sp, #0
-
- /* USER CODE BEGIN TIM4_Init 0 */
-
- /* USER CODE END TIM4_Init 0 */
-
- TIM_ClockConfigTypeDef sClockSourceConfig = { 0 };
- 8003416: f107 0328 add.w r3, r7, #40 ; 0x28
- 800341a: 2200 movs r2, #0
- 800341c: 601a str r2, [r3, #0]
- 800341e: 605a str r2, [r3, #4]
- 8003420: 609a str r2, [r3, #8]
- 8003422: 60da str r2, [r3, #12]
- TIM_MasterConfigTypeDef sMasterConfig = { 0 };
- 8003424: f107 031c add.w r3, r7, #28
- 8003428: 2200 movs r2, #0
- 800342a: 601a str r2, [r3, #0]
- 800342c: 605a str r2, [r3, #4]
- 800342e: 609a str r2, [r3, #8]
- TIM_OC_InitTypeDef sConfigOC = { 0 };
- 8003430: 463b mov r3, r7
- 8003432: 2200 movs r2, #0
- 8003434: 601a str r2, [r3, #0]
- 8003436: 605a str r2, [r3, #4]
- 8003438: 609a str r2, [r3, #8]
- 800343a: 60da str r2, [r3, #12]
- 800343c: 611a str r2, [r3, #16]
- 800343e: 615a str r2, [r3, #20]
- 8003440: 619a str r2, [r3, #24]
-
- /* USER CODE BEGIN TIM4_Init 1 */
-
- /* USER CODE END TIM4_Init 1 */
- htim4.Instance = TIM4;
- 8003442: 4b41 ldr r3, [pc, #260] ; (8003548 <_ZL12MX_TIM4_Initv+0x138>)
- 8003444: 4a41 ldr r2, [pc, #260] ; (800354c <_ZL12MX_TIM4_Initv+0x13c>)
- 8003446: 601a str r2, [r3, #0]
- htim4.Init.Prescaler = 0;
- 8003448: 4b3f ldr r3, [pc, #252] ; (8003548 <_ZL12MX_TIM4_Initv+0x138>)
- 800344a: 2200 movs r2, #0
- 800344c: 605a str r2, [r3, #4]
- htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
- 800344e: 4b3e ldr r3, [pc, #248] ; (8003548 <_ZL12MX_TIM4_Initv+0x138>)
- 8003450: 2200 movs r2, #0
- 8003452: 609a str r2, [r3, #8]
- htim4.Init.Period = 0;
- 8003454: 4b3c ldr r3, [pc, #240] ; (8003548 <_ZL12MX_TIM4_Initv+0x138>)
- 8003456: 2200 movs r2, #0
- 8003458: 60da str r2, [r3, #12]
- htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
- 800345a: 4b3b ldr r3, [pc, #236] ; (8003548 <_ZL12MX_TIM4_Initv+0x138>)
- 800345c: 2200 movs r2, #0
- 800345e: 611a str r2, [r3, #16]
- htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
- 8003460: 4b39 ldr r3, [pc, #228] ; (8003548 <_ZL12MX_TIM4_Initv+0x138>)
- 8003462: 2200 movs r2, #0
- 8003464: 619a str r2, [r3, #24]
- if (HAL_TIM_Base_Init(&htim4) != HAL_OK) {
- 8003466: 4838 ldr r0, [pc, #224] ; (8003548 <_ZL12MX_TIM4_Initv+0x138>)
- 8003468: f003 fe2c bl 80070c4 <HAL_TIM_Base_Init>
- 800346c: 4603 mov r3, r0
- 800346e: 2b00 cmp r3, #0
- 8003470: bf14 ite ne
- 8003472: 2301 movne r3, #1
- 8003474: 2300 moveq r3, #0
- 8003476: b2db uxtb r3, r3
- 8003478: 2b00 cmp r3, #0
- 800347a: d001 beq.n 8003480 <_ZL12MX_TIM4_Initv+0x70>
- Error_Handler();
- 800347c: f000 fb90 bl 8003ba0 <Error_Handler>
- }
- sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
- 8003480: f44f 5380 mov.w r3, #4096 ; 0x1000
- 8003484: 62bb str r3, [r7, #40] ; 0x28
- if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) {
- 8003486: f107 0328 add.w r3, r7, #40 ; 0x28
- 800348a: 4619 mov r1, r3
- 800348c: 482e ldr r0, [pc, #184] ; (8003548 <_ZL12MX_TIM4_Initv+0x138>)
- 800348e: f004 f979 bl 8007784 <HAL_TIM_ConfigClockSource>
- 8003492: 4603 mov r3, r0
- 8003494: 2b00 cmp r3, #0
- 8003496: bf14 ite ne
- 8003498: 2301 movne r3, #1
- 800349a: 2300 moveq r3, #0
- 800349c: b2db uxtb r3, r3
- 800349e: 2b00 cmp r3, #0
- 80034a0: d001 beq.n 80034a6 <_ZL12MX_TIM4_Initv+0x96>
- Error_Handler();
- 80034a2: f000 fb7d bl 8003ba0 <Error_Handler>
- }
- if (HAL_TIM_PWM_Init(&htim4) != HAL_OK) {
- 80034a6: 4828 ldr r0, [pc, #160] ; (8003548 <_ZL12MX_TIM4_Initv+0x138>)
- 80034a8: f003 fe37 bl 800711a <HAL_TIM_PWM_Init>
- 80034ac: 4603 mov r3, r0
- 80034ae: 2b00 cmp r3, #0
- 80034b0: bf14 ite ne
- 80034b2: 2301 movne r3, #1
- 80034b4: 2300 moveq r3, #0
- 80034b6: b2db uxtb r3, r3
- 80034b8: 2b00 cmp r3, #0
- 80034ba: d001 beq.n 80034c0 <_ZL12MX_TIM4_Initv+0xb0>
- Error_Handler();
- 80034bc: f000 fb70 bl 8003ba0 <Error_Handler>
- }
- sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
- 80034c0: 2300 movs r3, #0
- 80034c2: 61fb str r3, [r7, #28]
- sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
- 80034c4: 2300 movs r3, #0
- 80034c6: 627b str r3, [r7, #36] ; 0x24
- if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig)
- 80034c8: f107 031c add.w r3, r7, #28
- 80034cc: 4619 mov r1, r3
- 80034ce: 481e ldr r0, [pc, #120] ; (8003548 <_ZL12MX_TIM4_Initv+0x138>)
- 80034d0: f004 fdf8 bl 80080c4 <HAL_TIMEx_MasterConfigSynchronization>
- 80034d4: 4603 mov r3, r0
- != HAL_OK) {
- 80034d6: 2b00 cmp r3, #0
- 80034d8: bf14 ite ne
- 80034da: 2301 movne r3, #1
- 80034dc: 2300 moveq r3, #0
- 80034de: b2db uxtb r3, r3
- if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig)
- 80034e0: 2b00 cmp r3, #0
- 80034e2: d001 beq.n 80034e8 <_ZL12MX_TIM4_Initv+0xd8>
- Error_Handler();
- 80034e4: f000 fb5c bl 8003ba0 <Error_Handler>
- }
- sConfigOC.OCMode = TIM_OCMODE_PWM1;
- 80034e8: 2360 movs r3, #96 ; 0x60
- 80034ea: 603b str r3, [r7, #0]
- sConfigOC.Pulse = 0;
- 80034ec: 2300 movs r3, #0
- 80034ee: 607b str r3, [r7, #4]
- sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
- 80034f0: 2300 movs r3, #0
- 80034f2: 60bb str r3, [r7, #8]
- sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
- 80034f4: 2300 movs r3, #0
- 80034f6: 613b str r3, [r7, #16]
- if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3)
- 80034f8: 463b mov r3, r7
- 80034fa: 2208 movs r2, #8
- 80034fc: 4619 mov r1, r3
- 80034fe: 4812 ldr r0, [pc, #72] ; (8003548 <_ZL12MX_TIM4_Initv+0x138>)
- 8003500: f004 f828 bl 8007554 <HAL_TIM_PWM_ConfigChannel>
- 8003504: 4603 mov r3, r0
- != HAL_OK) {
- 8003506: 2b00 cmp r3, #0
- 8003508: bf14 ite ne
- 800350a: 2301 movne r3, #1
- 800350c: 2300 moveq r3, #0
- 800350e: b2db uxtb r3, r3
- if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3)
- 8003510: 2b00 cmp r3, #0
- 8003512: d001 beq.n 8003518 <_ZL12MX_TIM4_Initv+0x108>
- Error_Handler();
- 8003514: f000 fb44 bl 8003ba0 <Error_Handler>
- }
- if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_4)
- 8003518: 463b mov r3, r7
- 800351a: 220c movs r2, #12
- 800351c: 4619 mov r1, r3
- 800351e: 480a ldr r0, [pc, #40] ; (8003548 <_ZL12MX_TIM4_Initv+0x138>)
- 8003520: f004 f818 bl 8007554 <HAL_TIM_PWM_ConfigChannel>
- 8003524: 4603 mov r3, r0
- != HAL_OK) {
- 8003526: 2b00 cmp r3, #0
- 8003528: bf14 ite ne
- 800352a: 2301 movne r3, #1
- 800352c: 2300 moveq r3, #0
- 800352e: b2db uxtb r3, r3
- if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_4)
- 8003530: 2b00 cmp r3, #0
- 8003532: d001 beq.n 8003538 <_ZL12MX_TIM4_Initv+0x128>
- Error_Handler();
- 8003534: f000 fb34 bl 8003ba0 <Error_Handler>
- }
- /* USER CODE BEGIN TIM4_Init 2 */
-
- /* USER CODE END TIM4_Init 2 */
- HAL_TIM_MspPostInit(&htim4);
- 8003538: 4803 ldr r0, [pc, #12] ; (8003548 <_ZL12MX_TIM4_Initv+0x138>)
- 800353a: f001 fb9b bl 8004c74 <HAL_TIM_MspPostInit>
-
-}
- 800353e: bf00 nop
- 8003540: 3738 adds r7, #56 ; 0x38
- 8003542: 46bd mov sp, r7
- 8003544: bd80 pop {r7, pc}
- 8003546: bf00 nop
- 8003548: 20000124 .word 0x20000124
- 800354c: 40000800 .word 0x40000800
-
-08003550 <_ZL12MX_TIM5_Initv>:
-/**
- * @brief TIM5 Initialization Function
- * @param None
- * @retval None
- */
-static void MX_TIM5_Init(void) {
- 8003550: b580 push {r7, lr}
- 8003552: b08c sub sp, #48 ; 0x30
- 8003554: af00 add r7, sp, #0
-
- /* USER CODE BEGIN TIM5_Init 0 */
-
- /* USER CODE END TIM5_Init 0 */
-
- TIM_Encoder_InitTypeDef sConfig = { 0 };
- 8003556: f107 030c add.w r3, r7, #12
- 800355a: 2224 movs r2, #36 ; 0x24
- 800355c: 2100 movs r1, #0
- 800355e: 4618 mov r0, r3
- 8003560: f007 f989 bl 800a876 <memset>
- TIM_MasterConfigTypeDef sMasterConfig = { 0 };
- 8003564: 463b mov r3, r7
- 8003566: 2200 movs r2, #0
- 8003568: 601a str r2, [r3, #0]
- 800356a: 605a str r2, [r3, #4]
- 800356c: 609a str r2, [r3, #8]
-
- /* USER CODE BEGIN TIM5_Init 1 */
-
- /* USER CODE END TIM5_Init 1 */
- htim5.Instance = TIM5;
- 800356e: 4b26 ldr r3, [pc, #152] ; (8003608 <_ZL12MX_TIM5_Initv+0xb8>)
- 8003570: 4a26 ldr r2, [pc, #152] ; (800360c <_ZL12MX_TIM5_Initv+0xbc>)
- 8003572: 601a str r2, [r3, #0]
- htim5.Init.Prescaler = 0;
- 8003574: 4b24 ldr r3, [pc, #144] ; (8003608 <_ZL12MX_TIM5_Initv+0xb8>)
- 8003576: 2200 movs r2, #0
- 8003578: 605a str r2, [r3, #4]
- htim5.Init.CounterMode = TIM_COUNTERMODE_UP;
- 800357a: 4b23 ldr r3, [pc, #140] ; (8003608 <_ZL12MX_TIM5_Initv+0xb8>)
- 800357c: 2200 movs r2, #0
- 800357e: 609a str r2, [r3, #8]
- htim5.Init.Period = 4294967295;
- 8003580: 4b21 ldr r3, [pc, #132] ; (8003608 <_ZL12MX_TIM5_Initv+0xb8>)
- 8003582: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff
- 8003586: 60da str r2, [r3, #12]
- htim5.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
- 8003588: 4b1f ldr r3, [pc, #124] ; (8003608 <_ZL12MX_TIM5_Initv+0xb8>)
- 800358a: 2200 movs r2, #0
- 800358c: 611a str r2, [r3, #16]
- htim5.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
- 800358e: 4b1e ldr r3, [pc, #120] ; (8003608 <_ZL12MX_TIM5_Initv+0xb8>)
- 8003590: 2200 movs r2, #0
- 8003592: 619a str r2, [r3, #24]
- sConfig.EncoderMode = TIM_ENCODERMODE_TI12;
- 8003594: 2303 movs r3, #3
- 8003596: 60fb str r3, [r7, #12]
- sConfig.IC1Polarity = TIM_ICPOLARITY_RISING;
- 8003598: 2300 movs r3, #0
- 800359a: 613b str r3, [r7, #16]
- sConfig.IC1Selection = TIM_ICSELECTION_DIRECTTI;
- 800359c: 2301 movs r3, #1
- 800359e: 617b str r3, [r7, #20]
- sConfig.IC1Prescaler = TIM_ICPSC_DIV1;
- 80035a0: 2300 movs r3, #0
- 80035a2: 61bb str r3, [r7, #24]
- sConfig.IC1Filter = 0;
- 80035a4: 2300 movs r3, #0
- 80035a6: 61fb str r3, [r7, #28]
- sConfig.IC2Polarity = TIM_ICPOLARITY_RISING;
- 80035a8: 2300 movs r3, #0
- 80035aa: 623b str r3, [r7, #32]
- sConfig.IC2Selection = TIM_ICSELECTION_DIRECTTI;
- 80035ac: 2301 movs r3, #1
- 80035ae: 627b str r3, [r7, #36] ; 0x24
- sConfig.IC2Prescaler = TIM_ICPSC_DIV1;
- 80035b0: 2300 movs r3, #0
- 80035b2: 62bb str r3, [r7, #40] ; 0x28
- sConfig.IC2Filter = 0;
- 80035b4: 2300 movs r3, #0
- 80035b6: 62fb str r3, [r7, #44] ; 0x2c
- if (HAL_TIM_Encoder_Init(&htim5, &sConfig) != HAL_OK) {
- 80035b8: f107 030c add.w r3, r7, #12
- 80035bc: 4619 mov r1, r3
- 80035be: 4812 ldr r0, [pc, #72] ; (8003608 <_ZL12MX_TIM5_Initv+0xb8>)
- 80035c0: f003 fde0 bl 8007184 <HAL_TIM_Encoder_Init>
- 80035c4: 4603 mov r3, r0
- 80035c6: 2b00 cmp r3, #0
- 80035c8: bf14 ite ne
- 80035ca: 2301 movne r3, #1
- 80035cc: 2300 moveq r3, #0
- 80035ce: b2db uxtb r3, r3
- 80035d0: 2b00 cmp r3, #0
- 80035d2: d001 beq.n 80035d8 <_ZL12MX_TIM5_Initv+0x88>
- Error_Handler();
- 80035d4: f000 fae4 bl 8003ba0 <Error_Handler>
- }
- sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
- 80035d8: 2300 movs r3, #0
- 80035da: 603b str r3, [r7, #0]
- sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
- 80035dc: 2300 movs r3, #0
- 80035de: 60bb str r3, [r7, #8]
- if (HAL_TIMEx_MasterConfigSynchronization(&htim5, &sMasterConfig)
- 80035e0: 463b mov r3, r7
- 80035e2: 4619 mov r1, r3
- 80035e4: 4808 ldr r0, [pc, #32] ; (8003608 <_ZL12MX_TIM5_Initv+0xb8>)
- 80035e6: f004 fd6d bl 80080c4 <HAL_TIMEx_MasterConfigSynchronization>
- 80035ea: 4603 mov r3, r0
- != HAL_OK) {
- 80035ec: 2b00 cmp r3, #0
- 80035ee: bf14 ite ne
- 80035f0: 2301 movne r3, #1
- 80035f2: 2300 moveq r3, #0
- 80035f4: b2db uxtb r3, r3
- if (HAL_TIMEx_MasterConfigSynchronization(&htim5, &sMasterConfig)
- 80035f6: 2b00 cmp r3, #0
- 80035f8: d001 beq.n 80035fe <_ZL12MX_TIM5_Initv+0xae>
- Error_Handler();
- 80035fa: f000 fad1 bl 8003ba0 <Error_Handler>
- }
- /* USER CODE BEGIN TIM5_Init 2 */
-
- /* USER CODE END TIM5_Init 2 */
-
-}
- 80035fe: bf00 nop
- 8003600: 3730 adds r7, #48 ; 0x30
- 8003602: 46bd mov sp, r7
- 8003604: bd80 pop {r7, pc}
- 8003606: bf00 nop
- 8003608: 20000164 .word 0x20000164
- 800360c: 40000c00 .word 0x40000c00
-
-08003610 <_ZL19MX_USART3_UART_Initv>:
-/**
- * @brief USART3 Initialization Function
- * @param None
- * @retval None
- */
-static void MX_USART3_UART_Init(void) {
- 8003610: b580 push {r7, lr}
- 8003612: af00 add r7, sp, #0
- /* USER CODE END USART3_Init 0 */
-
- /* USER CODE BEGIN USART3_Init 1 */
-
- /* USER CODE END USART3_Init 1 */
- huart3.Instance = USART3;
- 8003614: 4b16 ldr r3, [pc, #88] ; (8003670 <_ZL19MX_USART3_UART_Initv+0x60>)
- 8003616: 4a17 ldr r2, [pc, #92] ; (8003674 <_ZL19MX_USART3_UART_Initv+0x64>)
- 8003618: 601a str r2, [r3, #0]
- huart3.Init.BaudRate = 115200;
- 800361a: 4b15 ldr r3, [pc, #84] ; (8003670 <_ZL19MX_USART3_UART_Initv+0x60>)
- 800361c: f44f 32e1 mov.w r2, #115200 ; 0x1c200
- 8003620: 605a str r2, [r3, #4]
- huart3.Init.WordLength = UART_WORDLENGTH_8B;
- 8003622: 4b13 ldr r3, [pc, #76] ; (8003670 <_ZL19MX_USART3_UART_Initv+0x60>)
- 8003624: 2200 movs r2, #0
- 8003626: 609a str r2, [r3, #8]
- huart3.Init.StopBits = UART_STOPBITS_1;
- 8003628: 4b11 ldr r3, [pc, #68] ; (8003670 <_ZL19MX_USART3_UART_Initv+0x60>)
- 800362a: 2200 movs r2, #0
- 800362c: 60da str r2, [r3, #12]
- huart3.Init.Parity = UART_PARITY_NONE;
- 800362e: 4b10 ldr r3, [pc, #64] ; (8003670 <_ZL19MX_USART3_UART_Initv+0x60>)
- 8003630: 2200 movs r2, #0
- 8003632: 611a str r2, [r3, #16]
- huart3.Init.Mode = UART_MODE_TX_RX;
- 8003634: 4b0e ldr r3, [pc, #56] ; (8003670 <_ZL19MX_USART3_UART_Initv+0x60>)
- 8003636: 220c movs r2, #12
- 8003638: 615a str r2, [r3, #20]
- huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE;
- 800363a: 4b0d ldr r3, [pc, #52] ; (8003670 <_ZL19MX_USART3_UART_Initv+0x60>)
- 800363c: 2200 movs r2, #0
- 800363e: 619a str r2, [r3, #24]
- huart3.Init.OverSampling = UART_OVERSAMPLING_16;
- 8003640: 4b0b ldr r3, [pc, #44] ; (8003670 <_ZL19MX_USART3_UART_Initv+0x60>)
- 8003642: 2200 movs r2, #0
- 8003644: 61da str r2, [r3, #28]
- huart3.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
- 8003646: 4b0a ldr r3, [pc, #40] ; (8003670 <_ZL19MX_USART3_UART_Initv+0x60>)
- 8003648: 2200 movs r2, #0
- 800364a: 621a str r2, [r3, #32]
- huart3.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
- 800364c: 4b08 ldr r3, [pc, #32] ; (8003670 <_ZL19MX_USART3_UART_Initv+0x60>)
- 800364e: 2200 movs r2, #0
- 8003650: 625a str r2, [r3, #36] ; 0x24
- if (HAL_UART_Init(&huart3) != HAL_OK) {
- 8003652: 4807 ldr r0, [pc, #28] ; (8003670 <_ZL19MX_USART3_UART_Initv+0x60>)
- 8003654: f004 fdb0 bl 80081b8 <HAL_UART_Init>
- 8003658: 4603 mov r3, r0
- 800365a: 2b00 cmp r3, #0
- 800365c: bf14 ite ne
- 800365e: 2301 movne r3, #1
- 8003660: 2300 moveq r3, #0
- 8003662: b2db uxtb r3, r3
- 8003664: 2b00 cmp r3, #0
- 8003666: d001 beq.n 800366c <_ZL19MX_USART3_UART_Initv+0x5c>
- Error_Handler();
- 8003668: f000 fa9a bl 8003ba0 <Error_Handler>
- }
- /* USER CODE BEGIN USART3_Init 2 */
-
- /* USER CODE END USART3_Init 2 */
-
-}
- 800366c: bf00 nop
- 800366e: bd80 pop {r7, pc}
- 8003670: 200001a4 .word 0x200001a4
- 8003674: 40004800 .word 0x40004800
-
-08003678 <_ZL19MX_USART6_UART_Initv>:
-/**
- * @brief USART6 Initialization Function
- * @param None
- * @retval None
- */
-static void MX_USART6_UART_Init(void) {
- 8003678: b580 push {r7, lr}
- 800367a: af00 add r7, sp, #0
- /* USER CODE END USART6_Init 0 */
-
- /* USER CODE BEGIN USART6_Init 1 */
-
- /* USER CODE END USART6_Init 1 */
- huart6.Instance = USART6;
- 800367c: 4b16 ldr r3, [pc, #88] ; (80036d8 <_ZL19MX_USART6_UART_Initv+0x60>)
- 800367e: 4a17 ldr r2, [pc, #92] ; (80036dc <_ZL19MX_USART6_UART_Initv+0x64>)
- 8003680: 601a str r2, [r3, #0]
- huart6.Init.BaudRate = 115200;
- 8003682: 4b15 ldr r3, [pc, #84] ; (80036d8 <_ZL19MX_USART6_UART_Initv+0x60>)
- 8003684: f44f 32e1 mov.w r2, #115200 ; 0x1c200
- 8003688: 605a str r2, [r3, #4]
- huart6.Init.WordLength = UART_WORDLENGTH_8B;
- 800368a: 4b13 ldr r3, [pc, #76] ; (80036d8 <_ZL19MX_USART6_UART_Initv+0x60>)
- 800368c: 2200 movs r2, #0
- 800368e: 609a str r2, [r3, #8]
- huart6.Init.StopBits = UART_STOPBITS_1;
- 8003690: 4b11 ldr r3, [pc, #68] ; (80036d8 <_ZL19MX_USART6_UART_Initv+0x60>)
- 8003692: 2200 movs r2, #0
- 8003694: 60da str r2, [r3, #12]
- huart6.Init.Parity = UART_PARITY_NONE;
- 8003696: 4b10 ldr r3, [pc, #64] ; (80036d8 <_ZL19MX_USART6_UART_Initv+0x60>)
- 8003698: 2200 movs r2, #0
- 800369a: 611a str r2, [r3, #16]
- huart6.Init.Mode = UART_MODE_TX_RX;
- 800369c: 4b0e ldr r3, [pc, #56] ; (80036d8 <_ZL19MX_USART6_UART_Initv+0x60>)
- 800369e: 220c movs r2, #12
- 80036a0: 615a str r2, [r3, #20]
- huart6.Init.HwFlowCtl = UART_HWCONTROL_NONE;
- 80036a2: 4b0d ldr r3, [pc, #52] ; (80036d8 <_ZL19MX_USART6_UART_Initv+0x60>)
- 80036a4: 2200 movs r2, #0
- 80036a6: 619a str r2, [r3, #24]
- huart6.Init.OverSampling = UART_OVERSAMPLING_16;
- 80036a8: 4b0b ldr r3, [pc, #44] ; (80036d8 <_ZL19MX_USART6_UART_Initv+0x60>)
- 80036aa: 2200 movs r2, #0
- 80036ac: 61da str r2, [r3, #28]
- huart6.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
- 80036ae: 4b0a ldr r3, [pc, #40] ; (80036d8 <_ZL19MX_USART6_UART_Initv+0x60>)
- 80036b0: 2200 movs r2, #0
- 80036b2: 621a str r2, [r3, #32]
- huart6.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
- 80036b4: 4b08 ldr r3, [pc, #32] ; (80036d8 <_ZL19MX_USART6_UART_Initv+0x60>)
- 80036b6: 2200 movs r2, #0
- 80036b8: 625a str r2, [r3, #36] ; 0x24
- if (HAL_UART_Init(&huart6) != HAL_OK) {
- 80036ba: 4807 ldr r0, [pc, #28] ; (80036d8 <_ZL19MX_USART6_UART_Initv+0x60>)
- 80036bc: f004 fd7c bl 80081b8 <HAL_UART_Init>
- 80036c0: 4603 mov r3, r0
- 80036c2: 2b00 cmp r3, #0
- 80036c4: bf14 ite ne
- 80036c6: 2301 movne r3, #1
- 80036c8: 2300 moveq r3, #0
- 80036ca: b2db uxtb r3, r3
- 80036cc: 2b00 cmp r3, #0
- 80036ce: d001 beq.n 80036d4 <_ZL19MX_USART6_UART_Initv+0x5c>
- Error_Handler();
- 80036d0: f000 fa66 bl 8003ba0 <Error_Handler>
- }
- /* USER CODE BEGIN USART6_Init 2 */
-
- /* USER CODE END USART6_Init 2 */
-
-}
- 80036d4: bf00 nop
- 80036d6: bd80 pop {r7, pc}
- 80036d8: 20000224 .word 0x20000224
- 80036dc: 40011400 .word 0x40011400
-
-080036e0 <_ZL11MX_DMA_Initv>:
-
-/**
- * Enable DMA controller clock
- */
-static void MX_DMA_Init(void) {
- 80036e0: b580 push {r7, lr}
- 80036e2: b082 sub sp, #8
- 80036e4: af00 add r7, sp, #0
-
- /* DMA controller clock enable */
- __HAL_RCC_DMA1_CLK_ENABLE();
- 80036e6: 4b1e ldr r3, [pc, #120] ; (8003760 <_ZL11MX_DMA_Initv+0x80>)
- 80036e8: 6b1b ldr r3, [r3, #48] ; 0x30
- 80036ea: 4a1d ldr r2, [pc, #116] ; (8003760 <_ZL11MX_DMA_Initv+0x80>)
- 80036ec: f443 1300 orr.w r3, r3, #2097152 ; 0x200000
- 80036f0: 6313 str r3, [r2, #48] ; 0x30
- 80036f2: 4b1b ldr r3, [pc, #108] ; (8003760 <_ZL11MX_DMA_Initv+0x80>)
- 80036f4: 6b1b ldr r3, [r3, #48] ; 0x30
- 80036f6: f403 1300 and.w r3, r3, #2097152 ; 0x200000
- 80036fa: 607b str r3, [r7, #4]
- 80036fc: 687b ldr r3, [r7, #4]
- __HAL_RCC_DMA2_CLK_ENABLE();
- 80036fe: 4b18 ldr r3, [pc, #96] ; (8003760 <_ZL11MX_DMA_Initv+0x80>)
- 8003700: 6b1b ldr r3, [r3, #48] ; 0x30
- 8003702: 4a17 ldr r2, [pc, #92] ; (8003760 <_ZL11MX_DMA_Initv+0x80>)
- 8003704: f443 0380 orr.w r3, r3, #4194304 ; 0x400000
- 8003708: 6313 str r3, [r2, #48] ; 0x30
- 800370a: 4b15 ldr r3, [pc, #84] ; (8003760 <_ZL11MX_DMA_Initv+0x80>)
- 800370c: 6b1b ldr r3, [r3, #48] ; 0x30
- 800370e: f403 0380 and.w r3, r3, #4194304 ; 0x400000
- 8003712: 603b str r3, [r7, #0]
- 8003714: 683b ldr r3, [r7, #0]
-
- /* DMA interrupt init */
- /* DMA1_Stream1_IRQn interrupt configuration */
- HAL_NVIC_SetPriority(DMA1_Stream1_IRQn, 0, 0);
- 8003716: 2200 movs r2, #0
- 8003718: 2100 movs r1, #0
- 800371a: 200c movs r0, #12
- 800371c: f001 fed9 bl 80054d2 <HAL_NVIC_SetPriority>
- HAL_NVIC_EnableIRQ(DMA1_Stream1_IRQn);
- 8003720: 200c movs r0, #12
- 8003722: f001 fef2 bl 800550a <HAL_NVIC_EnableIRQ>
- /* DMA1_Stream3_IRQn interrupt configuration */
- HAL_NVIC_SetPriority(DMA1_Stream3_IRQn, 0, 0);
- 8003726: 2200 movs r2, #0
- 8003728: 2100 movs r1, #0
- 800372a: 200e movs r0, #14
- 800372c: f001 fed1 bl 80054d2 <HAL_NVIC_SetPriority>
- HAL_NVIC_EnableIRQ(DMA1_Stream3_IRQn);
- 8003730: 200e movs r0, #14
- 8003732: f001 feea bl 800550a <HAL_NVIC_EnableIRQ>
- /* DMA2_Stream1_IRQn interrupt configuration */
- HAL_NVIC_SetPriority(DMA2_Stream1_IRQn, 0, 0);
- 8003736: 2200 movs r2, #0
- 8003738: 2100 movs r1, #0
- 800373a: 2039 movs r0, #57 ; 0x39
- 800373c: f001 fec9 bl 80054d2 <HAL_NVIC_SetPriority>
- HAL_NVIC_EnableIRQ(DMA2_Stream1_IRQn);
- 8003740: 2039 movs r0, #57 ; 0x39
- 8003742: f001 fee2 bl 800550a <HAL_NVIC_EnableIRQ>
- /* DMA2_Stream6_IRQn interrupt configuration */
- HAL_NVIC_SetPriority(DMA2_Stream6_IRQn, 0, 0);
- 8003746: 2200 movs r2, #0
- 8003748: 2100 movs r1, #0
- 800374a: 2045 movs r0, #69 ; 0x45
- 800374c: f001 fec1 bl 80054d2 <HAL_NVIC_SetPriority>
- HAL_NVIC_EnableIRQ(DMA2_Stream6_IRQn);
- 8003750: 2045 movs r0, #69 ; 0x45
- 8003752: f001 feda bl 800550a <HAL_NVIC_EnableIRQ>
-
-}
- 8003756: bf00 nop
- 8003758: 3708 adds r7, #8
- 800375a: 46bd mov sp, r7
- 800375c: bd80 pop {r7, pc}
- 800375e: bf00 nop
- 8003760: 40023800 .word 0x40023800
-
-08003764 <_ZL12MX_GPIO_Initv>:
-/**
- * @brief GPIO Initialization Function
- * @param None
- * @retval None
- */
-static void MX_GPIO_Init(void) {
- 8003764: b580 push {r7, lr}
- 8003766: b08c sub sp, #48 ; 0x30
- 8003768: af00 add r7, sp, #0
- GPIO_InitTypeDef GPIO_InitStruct = { 0 };
- 800376a: f107 031c add.w r3, r7, #28
- 800376e: 2200 movs r2, #0
- 8003770: 601a str r2, [r3, #0]
- 8003772: 605a str r2, [r3, #4]
- 8003774: 609a str r2, [r3, #8]
- 8003776: 60da str r2, [r3, #12]
- 8003778: 611a str r2, [r3, #16]
-
- /* GPIO Ports Clock Enable */
- __HAL_RCC_GPIOC_CLK_ENABLE();
- 800377a: 4b53 ldr r3, [pc, #332] ; (80038c8 <_ZL12MX_GPIO_Initv+0x164>)
- 800377c: 6b1b ldr r3, [r3, #48] ; 0x30
- 800377e: 4a52 ldr r2, [pc, #328] ; (80038c8 <_ZL12MX_GPIO_Initv+0x164>)
- 8003780: f043 0304 orr.w r3, r3, #4
- 8003784: 6313 str r3, [r2, #48] ; 0x30
- 8003786: 4b50 ldr r3, [pc, #320] ; (80038c8 <_ZL12MX_GPIO_Initv+0x164>)
- 8003788: 6b1b ldr r3, [r3, #48] ; 0x30
- 800378a: f003 0304 and.w r3, r3, #4
- 800378e: 61bb str r3, [r7, #24]
- 8003790: 69bb ldr r3, [r7, #24]
- __HAL_RCC_GPIOA_CLK_ENABLE();
- 8003792: 4b4d ldr r3, [pc, #308] ; (80038c8 <_ZL12MX_GPIO_Initv+0x164>)
- 8003794: 6b1b ldr r3, [r3, #48] ; 0x30
- 8003796: 4a4c ldr r2, [pc, #304] ; (80038c8 <_ZL12MX_GPIO_Initv+0x164>)
- 8003798: f043 0301 orr.w r3, r3, #1
- 800379c: 6313 str r3, [r2, #48] ; 0x30
- 800379e: 4b4a ldr r3, [pc, #296] ; (80038c8 <_ZL12MX_GPIO_Initv+0x164>)
- 80037a0: 6b1b ldr r3, [r3, #48] ; 0x30
- 80037a2: f003 0301 and.w r3, r3, #1
- 80037a6: 617b str r3, [r7, #20]
- 80037a8: 697b ldr r3, [r7, #20]
- __HAL_RCC_GPIOF_CLK_ENABLE();
- 80037aa: 4b47 ldr r3, [pc, #284] ; (80038c8 <_ZL12MX_GPIO_Initv+0x164>)
- 80037ac: 6b1b ldr r3, [r3, #48] ; 0x30
- 80037ae: 4a46 ldr r2, [pc, #280] ; (80038c8 <_ZL12MX_GPIO_Initv+0x164>)
- 80037b0: f043 0320 orr.w r3, r3, #32
- 80037b4: 6313 str r3, [r2, #48] ; 0x30
- 80037b6: 4b44 ldr r3, [pc, #272] ; (80038c8 <_ZL12MX_GPIO_Initv+0x164>)
- 80037b8: 6b1b ldr r3, [r3, #48] ; 0x30
- 80037ba: f003 0320 and.w r3, r3, #32
- 80037be: 613b str r3, [r7, #16]
- 80037c0: 693b ldr r3, [r7, #16]
- __HAL_RCC_GPIOE_CLK_ENABLE();
- 80037c2: 4b41 ldr r3, [pc, #260] ; (80038c8 <_ZL12MX_GPIO_Initv+0x164>)
- 80037c4: 6b1b ldr r3, [r3, #48] ; 0x30
- 80037c6: 4a40 ldr r2, [pc, #256] ; (80038c8 <_ZL12MX_GPIO_Initv+0x164>)
- 80037c8: f043 0310 orr.w r3, r3, #16
- 80037cc: 6313 str r3, [r2, #48] ; 0x30
- 80037ce: 4b3e ldr r3, [pc, #248] ; (80038c8 <_ZL12MX_GPIO_Initv+0x164>)
- 80037d0: 6b1b ldr r3, [r3, #48] ; 0x30
- 80037d2: f003 0310 and.w r3, r3, #16
- 80037d6: 60fb str r3, [r7, #12]
- 80037d8: 68fb ldr r3, [r7, #12]
- __HAL_RCC_GPIOD_CLK_ENABLE();
- 80037da: 4b3b ldr r3, [pc, #236] ; (80038c8 <_ZL12MX_GPIO_Initv+0x164>)
- 80037dc: 6b1b ldr r3, [r3, #48] ; 0x30
- 80037de: 4a3a ldr r2, [pc, #232] ; (80038c8 <_ZL12MX_GPIO_Initv+0x164>)
- 80037e0: f043 0308 orr.w r3, r3, #8
- 80037e4: 6313 str r3, [r2, #48] ; 0x30
- 80037e6: 4b38 ldr r3, [pc, #224] ; (80038c8 <_ZL12MX_GPIO_Initv+0x164>)
- 80037e8: 6b1b ldr r3, [r3, #48] ; 0x30
- 80037ea: f003 0308 and.w r3, r3, #8
- 80037ee: 60bb str r3, [r7, #8]
- 80037f0: 68bb ldr r3, [r7, #8]
- __HAL_RCC_GPIOB_CLK_ENABLE();
- 80037f2: 4b35 ldr r3, [pc, #212] ; (80038c8 <_ZL12MX_GPIO_Initv+0x164>)
- 80037f4: 6b1b ldr r3, [r3, #48] ; 0x30
- 80037f6: 4a34 ldr r2, [pc, #208] ; (80038c8 <_ZL12MX_GPIO_Initv+0x164>)
- 80037f8: f043 0302 orr.w r3, r3, #2
- 80037fc: 6313 str r3, [r2, #48] ; 0x30
- 80037fe: 4b32 ldr r3, [pc, #200] ; (80038c8 <_ZL12MX_GPIO_Initv+0x164>)
- 8003800: 6b1b ldr r3, [r3, #48] ; 0x30
- 8003802: f003 0302 and.w r3, r3, #2
- 8003806: 607b str r3, [r7, #4]
- 8003808: 687b ldr r3, [r7, #4]
-
- /*Configure GPIO pin Output Level */
- HAL_GPIO_WritePin(GPIOF, dir1_Pin | sleep2_Pin | sleep1_Pin,
- 800380a: 2200 movs r2, #0
- 800380c: f44f 4160 mov.w r1, #57344 ; 0xe000
- 8003810: 482e ldr r0, [pc, #184] ; (80038cc <_ZL12MX_GPIO_Initv+0x168>)
- 8003812: f002 fbd7 bl 8005fc4 <HAL_GPIO_WritePin>
- GPIO_PIN_RESET);
-
- /*Configure GPIO pin Output Level */
- HAL_GPIO_WritePin(GPIOB, GPIO_PIN_8, GPIO_PIN_RESET);
- 8003816: 2200 movs r2, #0
- 8003818: f44f 7180 mov.w r1, #256 ; 0x100
- 800381c: 482c ldr r0, [pc, #176] ; (80038d0 <_ZL12MX_GPIO_Initv+0x16c>)
- 800381e: f002 fbd1 bl 8005fc4 <HAL_GPIO_WritePin>
-
- /*Configure GPIO pin : PC0 */
- GPIO_InitStruct.Pin = GPIO_PIN_0;
- 8003822: 2301 movs r3, #1
- 8003824: 61fb str r3, [r7, #28]
- GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
- 8003826: 2303 movs r3, #3
- 8003828: 623b str r3, [r7, #32]
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- 800382a: 2300 movs r3, #0
- 800382c: 627b str r3, [r7, #36] ; 0x24
- HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
- 800382e: f107 031c add.w r3, r7, #28
- 8003832: 4619 mov r1, r3
- 8003834: 4827 ldr r0, [pc, #156] ; (80038d4 <_ZL12MX_GPIO_Initv+0x170>)
- 8003836: f002 fa1b bl 8005c70 <HAL_GPIO_Init>
-
- /*Configure GPIO pin : current1_Pin */
- GPIO_InitStruct.Pin = current1_Pin;
- 800383a: 2308 movs r3, #8
- 800383c: 61fb str r3, [r7, #28]
- GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
- 800383e: 2303 movs r3, #3
- 8003840: 623b str r3, [r7, #32]
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8003842: 2300 movs r3, #0
- 8003844: 627b str r3, [r7, #36] ; 0x24
- HAL_GPIO_Init(current1_GPIO_Port, &GPIO_InitStruct);
- 8003846: f107 031c add.w r3, r7, #28
- 800384a: 4619 mov r1, r3
- 800384c: 4822 ldr r0, [pc, #136] ; (80038d8 <_ZL12MX_GPIO_Initv+0x174>)
- 800384e: f002 fa0f bl 8005c70 <HAL_GPIO_Init>
-
- /*Configure GPIO pin : fault2_Pin */
- GPIO_InitStruct.Pin = fault2_Pin;
- 8003852: 2340 movs r3, #64 ; 0x40
- 8003854: 61fb str r3, [r7, #28]
- GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
- 8003856: 2300 movs r3, #0
- 8003858: 623b str r3, [r7, #32]
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- 800385a: 2300 movs r3, #0
- 800385c: 627b str r3, [r7, #36] ; 0x24
- HAL_GPIO_Init(fault2_GPIO_Port, &GPIO_InitStruct);
- 800385e: f107 031c add.w r3, r7, #28
- 8003862: 4619 mov r1, r3
- 8003864: 481c ldr r0, [pc, #112] ; (80038d8 <_ZL12MX_GPIO_Initv+0x174>)
- 8003866: f002 fa03 bl 8005c70 <HAL_GPIO_Init>
-
- /*Configure GPIO pins : dir1_Pin sleep2_Pin sleep1_Pin */
- GPIO_InitStruct.Pin = dir1_Pin | sleep2_Pin | sleep1_Pin;
- 800386a: f44f 4360 mov.w r3, #57344 ; 0xe000
- 800386e: 61fb str r3, [r7, #28]
- GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- 8003870: 2301 movs r3, #1
- 8003872: 623b str r3, [r7, #32]
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8003874: 2300 movs r3, #0
- 8003876: 627b str r3, [r7, #36] ; 0x24
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 8003878: 2300 movs r3, #0
- 800387a: 62bb str r3, [r7, #40] ; 0x28
- HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
- 800387c: f107 031c add.w r3, r7, #28
- 8003880: 4619 mov r1, r3
- 8003882: 4812 ldr r0, [pc, #72] ; (80038cc <_ZL12MX_GPIO_Initv+0x168>)
- 8003884: f002 f9f4 bl 8005c70 <HAL_GPIO_Init>
-
- /*Configure GPIO pin : fault1_Pin */
- GPIO_InitStruct.Pin = fault1_Pin;
- 8003888: f44f 7300 mov.w r3, #512 ; 0x200
- 800388c: 61fb str r3, [r7, #28]
- GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
- 800388e: 2300 movs r3, #0
- 8003890: 623b str r3, [r7, #32]
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8003892: 2300 movs r3, #0
- 8003894: 627b str r3, [r7, #36] ; 0x24
- HAL_GPIO_Init(fault1_GPIO_Port, &GPIO_InitStruct);
- 8003896: f107 031c add.w r3, r7, #28
- 800389a: 4619 mov r1, r3
- 800389c: 480f ldr r0, [pc, #60] ; (80038dc <_ZL12MX_GPIO_Initv+0x178>)
- 800389e: f002 f9e7 bl 8005c70 <HAL_GPIO_Init>
-
- /*Configure GPIO pin : PB8 */
- GPIO_InitStruct.Pin = GPIO_PIN_8;
- 80038a2: f44f 7380 mov.w r3, #256 ; 0x100
- 80038a6: 61fb str r3, [r7, #28]
- GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- 80038a8: 2301 movs r3, #1
- 80038aa: 623b str r3, [r7, #32]
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- 80038ac: 2300 movs r3, #0
- 80038ae: 627b str r3, [r7, #36] ; 0x24
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 80038b0: 2300 movs r3, #0
- 80038b2: 62bb str r3, [r7, #40] ; 0x28
- HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
- 80038b4: f107 031c add.w r3, r7, #28
- 80038b8: 4619 mov r1, r3
- 80038ba: 4805 ldr r0, [pc, #20] ; (80038d0 <_ZL12MX_GPIO_Initv+0x16c>)
- 80038bc: f002 f9d8 bl 8005c70 <HAL_GPIO_Init>
-
-}
- 80038c0: bf00 nop
- 80038c2: 3730 adds r7, #48 ; 0x30
- 80038c4: 46bd mov sp, r7
- 80038c6: bd80 pop {r7, pc}
- 80038c8: 40023800 .word 0x40023800
- 80038cc: 40021400 .word 0x40021400
- 80038d0: 40020400 .word 0x40020400
- 80038d4: 40020800 .word 0x40020800
- 80038d8: 40020000 .word 0x40020000
- 80038dc: 40021000 .word 0x40021000
-
-080038e0 <_ZN8std_msgs6HeaderaSERKS0_>:
- class Header : public ros::Msg
- 80038e0: b580 push {r7, lr}
- 80038e2: b082 sub sp, #8
- 80038e4: af00 add r7, sp, #0
- 80038e6: 6078 str r0, [r7, #4]
- 80038e8: 6039 str r1, [r7, #0]
- 80038ea: 687b ldr r3, [r7, #4]
- 80038ec: 683a ldr r2, [r7, #0]
- 80038ee: 4611 mov r1, r2
- 80038f0: 4618 mov r0, r3
- 80038f2: f7ff fb7d bl 8002ff0 <_ZN3ros3MsgaSERKS0_>
- 80038f6: 683b ldr r3, [r7, #0]
- 80038f8: 685a ldr r2, [r3, #4]
- 80038fa: 687b ldr r3, [r7, #4]
- 80038fc: 605a str r2, [r3, #4]
- 80038fe: 687b ldr r3, [r7, #4]
- 8003900: 683a ldr r2, [r7, #0]
- 8003902: 3308 adds r3, #8
- 8003904: 3208 adds r2, #8
- 8003906: e892 0003 ldmia.w r2, {r0, r1}
- 800390a: e883 0003 stmia.w r3, {r0, r1}
- 800390e: 683b ldr r3, [r7, #0]
- 8003910: 691a ldr r2, [r3, #16]
- 8003912: 687b ldr r3, [r7, #4]
- 8003914: 611a str r2, [r3, #16]
- 8003916: 687b ldr r3, [r7, #4]
- 8003918: 4618 mov r0, r3
- 800391a: 3708 adds r7, #8
- 800391c: 46bd mov sp, r7
- 800391e: bd80 pop {r7, pc}
-
-08003920 <_ZN13geometry_msgs5PointaSERKS0_>:
- class Point : public ros::Msg
- 8003920: b580 push {r7, lr}
- 8003922: b082 sub sp, #8
- 8003924: af00 add r7, sp, #0
- 8003926: 6078 str r0, [r7, #4]
- 8003928: 6039 str r1, [r7, #0]
- 800392a: 687b ldr r3, [r7, #4]
- 800392c: 683a ldr r2, [r7, #0]
- 800392e: 4611 mov r1, r2
- 8003930: 4618 mov r0, r3
- 8003932: f7ff fb5d bl 8002ff0 <_ZN3ros3MsgaSERKS0_>
- 8003936: 683b ldr r3, [r7, #0]
- 8003938: 685a ldr r2, [r3, #4]
- 800393a: 687b ldr r3, [r7, #4]
- 800393c: 605a str r2, [r3, #4]
- 800393e: 683b ldr r3, [r7, #0]
- 8003940: 689a ldr r2, [r3, #8]
- 8003942: 687b ldr r3, [r7, #4]
- 8003944: 609a str r2, [r3, #8]
- 8003946: 683b ldr r3, [r7, #0]
- 8003948: 68da ldr r2, [r3, #12]
- 800394a: 687b ldr r3, [r7, #4]
- 800394c: 60da str r2, [r3, #12]
- 800394e: 687b ldr r3, [r7, #4]
- 8003950: 4618 mov r0, r3
- 8003952: 3708 adds r7, #8
- 8003954: 46bd mov sp, r7
- 8003956: bd80 pop {r7, pc}
-
-08003958 <_ZN13geometry_msgs4PoseaSERKS0_>:
- class Pose : public ros::Msg
- 8003958: b580 push {r7, lr}
- 800395a: b082 sub sp, #8
- 800395c: af00 add r7, sp, #0
- 800395e: 6078 str r0, [r7, #4]
- 8003960: 6039 str r1, [r7, #0]
- 8003962: 687b ldr r3, [r7, #4]
- 8003964: 683a ldr r2, [r7, #0]
- 8003966: 4611 mov r1, r2
- 8003968: 4618 mov r0, r3
- 800396a: f7ff fb41 bl 8002ff0 <_ZN3ros3MsgaSERKS0_>
- 800396e: 687b ldr r3, [r7, #4]
- 8003970: 1d1a adds r2, r3, #4
- 8003972: 683b ldr r3, [r7, #0]
- 8003974: 3304 adds r3, #4
- 8003976: 4619 mov r1, r3
- 8003978: 4610 mov r0, r2
- 800397a: f7ff ffd1 bl 8003920 <_ZN13geometry_msgs5PointaSERKS0_>
- 800397e: 687b ldr r3, [r7, #4]
- 8003980: f103 0214 add.w r2, r3, #20
- 8003984: 683b ldr r3, [r7, #0]
- 8003986: 3314 adds r3, #20
- 8003988: 4619 mov r1, r3
- 800398a: 4610 mov r0, r2
- 800398c: f7ff fb3c bl 8003008 <_ZN13geometry_msgs10QuaternionaSERKS0_>
- 8003990: 687b ldr r3, [r7, #4]
- 8003992: 4618 mov r0, r3
- 8003994: 3708 adds r7, #8
- 8003996: 46bd mov sp, r7
- 8003998: bd80 pop {r7, pc}
-
-0800399a <_ZN13geometry_msgs18PoseWithCovarianceaSERKS0_>:
- class PoseWithCovariance : public ros::Msg
- 800399a: b580 push {r7, lr}
- 800399c: b082 sub sp, #8
- 800399e: af00 add r7, sp, #0
- 80039a0: 6078 str r0, [r7, #4]
- 80039a2: 6039 str r1, [r7, #0]
- 80039a4: 687b ldr r3, [r7, #4]
- 80039a6: 683a ldr r2, [r7, #0]
- 80039a8: 4611 mov r1, r2
- 80039aa: 4618 mov r0, r3
- 80039ac: f7ff fb20 bl 8002ff0 <_ZN3ros3MsgaSERKS0_>
- 80039b0: 687b ldr r3, [r7, #4]
- 80039b2: 1d1a adds r2, r3, #4
- 80039b4: 683b ldr r3, [r7, #0]
- 80039b6: 3304 adds r3, #4
- 80039b8: 4619 mov r1, r3
- 80039ba: 4610 mov r0, r2
- 80039bc: f7ff ffcc bl 8003958 <_ZN13geometry_msgs4PoseaSERKS0_>
- 80039c0: 687b ldr r3, [r7, #4]
- 80039c2: f103 012c add.w r1, r3, #44 ; 0x2c
- 80039c6: 2223 movs r2, #35 ; 0x23
- 80039c8: 683b ldr r3, [r7, #0]
- 80039ca: 332c adds r3, #44 ; 0x2c
- 80039cc: 2a00 cmp r2, #0
- 80039ce: db05 blt.n 80039dc <_ZN13geometry_msgs18PoseWithCovarianceaSERKS0_+0x42>
- 80039d0: 6818 ldr r0, [r3, #0]
- 80039d2: 6008 str r0, [r1, #0]
- 80039d4: 3104 adds r1, #4
- 80039d6: 3304 adds r3, #4
- 80039d8: 3a01 subs r2, #1
- 80039da: e7f7 b.n 80039cc <_ZN13geometry_msgs18PoseWithCovarianceaSERKS0_+0x32>
- 80039dc: 687b ldr r3, [r7, #4]
- 80039de: 4618 mov r0, r3
- 80039e0: 3708 adds r7, #8
- 80039e2: 46bd mov sp, r7
- 80039e4: bd80 pop {r7, pc}
-
-080039e6 <_ZN13geometry_msgs7Vector3aSERKS0_>:
- class Vector3 : public ros::Msg
- 80039e6: b580 push {r7, lr}
- 80039e8: b082 sub sp, #8
- 80039ea: af00 add r7, sp, #0
- 80039ec: 6078 str r0, [r7, #4]
- 80039ee: 6039 str r1, [r7, #0]
- 80039f0: 687b ldr r3, [r7, #4]
- 80039f2: 683a ldr r2, [r7, #0]
- 80039f4: 4611 mov r1, r2
- 80039f6: 4618 mov r0, r3
- 80039f8: f7ff fafa bl 8002ff0 <_ZN3ros3MsgaSERKS0_>
- 80039fc: 683b ldr r3, [r7, #0]
- 80039fe: 685a ldr r2, [r3, #4]
- 8003a00: 687b ldr r3, [r7, #4]
- 8003a02: 605a str r2, [r3, #4]
- 8003a04: 683b ldr r3, [r7, #0]
- 8003a06: 689a ldr r2, [r3, #8]
- 8003a08: 687b ldr r3, [r7, #4]
- 8003a0a: 609a str r2, [r3, #8]
- 8003a0c: 683b ldr r3, [r7, #0]
- 8003a0e: 68da ldr r2, [r3, #12]
- 8003a10: 687b ldr r3, [r7, #4]
- 8003a12: 60da str r2, [r3, #12]
- 8003a14: 687b ldr r3, [r7, #4]
- 8003a16: 4618 mov r0, r3
- 8003a18: 3708 adds r7, #8
- 8003a1a: 46bd mov sp, r7
- 8003a1c: bd80 pop {r7, pc}
-
-08003a1e <_ZN13geometry_msgs5TwistaSERKS0_>:
- class Twist : public ros::Msg
- 8003a1e: b580 push {r7, lr}
- 8003a20: b082 sub sp, #8
- 8003a22: af00 add r7, sp, #0
- 8003a24: 6078 str r0, [r7, #4]
- 8003a26: 6039 str r1, [r7, #0]
- 8003a28: 687b ldr r3, [r7, #4]
- 8003a2a: 683a ldr r2, [r7, #0]
- 8003a2c: 4611 mov r1, r2
- 8003a2e: 4618 mov r0, r3
- 8003a30: f7ff fade bl 8002ff0 <_ZN3ros3MsgaSERKS0_>
- 8003a34: 687b ldr r3, [r7, #4]
- 8003a36: 1d1a adds r2, r3, #4
- 8003a38: 683b ldr r3, [r7, #0]
- 8003a3a: 3304 adds r3, #4
- 8003a3c: 4619 mov r1, r3
- 8003a3e: 4610 mov r0, r2
- 8003a40: f7ff ffd1 bl 80039e6 <_ZN13geometry_msgs7Vector3aSERKS0_>
- 8003a44: 687b ldr r3, [r7, #4]
- 8003a46: f103 0214 add.w r2, r3, #20
- 8003a4a: 683b ldr r3, [r7, #0]
- 8003a4c: 3314 adds r3, #20
- 8003a4e: 4619 mov r1, r3
- 8003a50: 4610 mov r0, r2
- 8003a52: f7ff ffc8 bl 80039e6 <_ZN13geometry_msgs7Vector3aSERKS0_>
- 8003a56: 687b ldr r3, [r7, #4]
- 8003a58: 4618 mov r0, r3
- 8003a5a: 3708 adds r7, #8
- 8003a5c: 46bd mov sp, r7
- 8003a5e: bd80 pop {r7, pc}
-
-08003a60 <_ZN13geometry_msgs19TwistWithCovarianceaSERKS0_>:
- class TwistWithCovariance : public ros::Msg
- 8003a60: b580 push {r7, lr}
- 8003a62: b082 sub sp, #8
- 8003a64: af00 add r7, sp, #0
- 8003a66: 6078 str r0, [r7, #4]
- 8003a68: 6039 str r1, [r7, #0]
- 8003a6a: 687b ldr r3, [r7, #4]
- 8003a6c: 683a ldr r2, [r7, #0]
- 8003a6e: 4611 mov r1, r2
- 8003a70: 4618 mov r0, r3
- 8003a72: f7ff fabd bl 8002ff0 <_ZN3ros3MsgaSERKS0_>
- 8003a76: 687b ldr r3, [r7, #4]
- 8003a78: 1d1a adds r2, r3, #4
- 8003a7a: 683b ldr r3, [r7, #0]
- 8003a7c: 3304 adds r3, #4
- 8003a7e: 4619 mov r1, r3
- 8003a80: 4610 mov r0, r2
- 8003a82: f7ff ffcc bl 8003a1e <_ZN13geometry_msgs5TwistaSERKS0_>
- 8003a86: 687b ldr r3, [r7, #4]
- 8003a88: f103 0128 add.w r1, r3, #40 ; 0x28
- 8003a8c: 2223 movs r2, #35 ; 0x23
- 8003a8e: 683b ldr r3, [r7, #0]
- 8003a90: 3328 adds r3, #40 ; 0x28
- 8003a92: 2a00 cmp r2, #0
- 8003a94: db05 blt.n 8003aa2 <_ZN13geometry_msgs19TwistWithCovarianceaSERKS0_+0x42>
- 8003a96: 6818 ldr r0, [r3, #0]
- 8003a98: 6008 str r0, [r1, #0]
- 8003a9a: 3104 adds r1, #4
- 8003a9c: 3304 adds r3, #4
- 8003a9e: 3a01 subs r2, #1
- 8003aa0: e7f7 b.n 8003a92 <_ZN13geometry_msgs19TwistWithCovarianceaSERKS0_+0x32>
- 8003aa2: 687b ldr r3, [r7, #4]
- 8003aa4: 4618 mov r0, r3
- 8003aa6: 3708 adds r7, #8
- 8003aa8: 46bd mov sp, r7
- 8003aaa: bd80 pop {r7, pc}
-
-08003aac <_ZN8nav_msgs8OdometryaSERKS0_>:
- class Odometry : public ros::Msg
- 8003aac: b580 push {r7, lr}
- 8003aae: b082 sub sp, #8
- 8003ab0: af00 add r7, sp, #0
- 8003ab2: 6078 str r0, [r7, #4]
- 8003ab4: 6039 str r1, [r7, #0]
- 8003ab6: 687b ldr r3, [r7, #4]
- 8003ab8: 683a ldr r2, [r7, #0]
- 8003aba: 4611 mov r1, r2
- 8003abc: 4618 mov r0, r3
- 8003abe: f7ff fa97 bl 8002ff0 <_ZN3ros3MsgaSERKS0_>
- 8003ac2: 687b ldr r3, [r7, #4]
- 8003ac4: 1d1a adds r2, r3, #4
- 8003ac6: 683b ldr r3, [r7, #0]
- 8003ac8: 3304 adds r3, #4
- 8003aca: 4619 mov r1, r3
- 8003acc: 4610 mov r0, r2
- 8003ace: f7ff ff07 bl 80038e0 <_ZN8std_msgs6HeaderaSERKS0_>
- 8003ad2: 683b ldr r3, [r7, #0]
- 8003ad4: 699a ldr r2, [r3, #24]
- 8003ad6: 687b ldr r3, [r7, #4]
- 8003ad8: 619a str r2, [r3, #24]
- 8003ada: 687b ldr r3, [r7, #4]
- 8003adc: f103 021c add.w r2, r3, #28
- 8003ae0: 683b ldr r3, [r7, #0]
- 8003ae2: 331c adds r3, #28
- 8003ae4: 4619 mov r1, r3
- 8003ae6: 4610 mov r0, r2
- 8003ae8: f7ff ff57 bl 800399a <_ZN13geometry_msgs18PoseWithCovarianceaSERKS0_>
- 8003aec: 687b ldr r3, [r7, #4]
- 8003aee: f103 02d8 add.w r2, r3, #216 ; 0xd8
- 8003af2: 683b ldr r3, [r7, #0]
- 8003af4: 33d8 adds r3, #216 ; 0xd8
- 8003af6: 4619 mov r1, r3
- 8003af8: 4610 mov r0, r2
- 8003afa: f7ff ffb1 bl 8003a60 <_ZN13geometry_msgs19TwistWithCovarianceaSERKS0_>
- 8003afe: 687b ldr r3, [r7, #4]
- 8003b00: 4618 mov r0, r3
- 8003b02: 3708 adds r7, #8
- 8003b04: 46bd mov sp, r7
- 8003b06: bd80 pop {r7, pc}
-
-08003b08 <HAL_TIM_PeriodElapsedCallback>:
-
-/* USER CODE BEGIN 4 */
-void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) {
- 8003b08: b580 push {r7, lr}
- 8003b0a: b082 sub sp, #8
- 8003b0c: af00 add r7, sp, #0
- 8003b0e: 6078 str r0, [r7, #4]
- if (htim->Instance == TIM3) {
- 8003b10: 687b ldr r3, [r7, #4]
- 8003b12: 681b ldr r3, [r3, #0]
- 8003b14: 4a0a ldr r2, [pc, #40] ; (8003b40 <HAL_TIM_PeriodElapsedCallback+0x38>)
- 8003b16: 4293 cmp r3, r2
- 8003b18: d10d bne.n 8003b36 <HAL_TIM_PeriodElapsedCallback+0x2e>
-
- odom.OdometryUpdateMessage();
- 8003b1a: 480a ldr r0, [pc, #40] ; (8003b44 <HAL_TIM_PeriodElapsedCallback+0x3c>)
- 8003b1c: f000 fea9 bl 8004872 <_ZN12OdometryCalc21OdometryUpdateMessageEv>
- odometry = odom.odometry_;
- 8003b20: 4909 ldr r1, [pc, #36] ; (8003b48 <HAL_TIM_PeriodElapsedCallback+0x40>)
- 8003b22: 480a ldr r0, [pc, #40] ; (8003b4c <HAL_TIM_PeriodElapsedCallback+0x44>)
- 8003b24: f7ff ffc2 bl 8003aac <_ZN8nav_msgs8OdometryaSERKS0_>
- odom_pub.publish(&odometry);
- 8003b28: 4908 ldr r1, [pc, #32] ; (8003b4c <HAL_TIM_PeriodElapsedCallback+0x44>)
- 8003b2a: 4809 ldr r0, [pc, #36] ; (8003b50 <HAL_TIM_PeriodElapsedCallback+0x48>)
- 8003b2c: f7fd fd8b bl 8001646 <_ZN3ros9Publisher7publishEPKNS_3MsgE>
-
-// chatter.publish(&str_msg);
- nh.spinOnce();
- 8003b30: 4808 ldr r0, [pc, #32] ; (8003b54 <HAL_TIM_PeriodElapsedCallback+0x4c>)
- 8003b32: f000 f999 bl 8003e68 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv>
-
- }
-}
- 8003b36: bf00 nop
- 8003b38: 3708 adds r7, #8
- 8003b3a: 46bd mov sp, r7
- 8003b3c: bd80 pop {r7, pc}
- 8003b3e: bf00 nop
- 8003b40: 40000400 .word 0x40000400
- 8003b44: 2000045c .word 0x2000045c
- 8003b48: 20000498 .word 0x20000498
- 8003b4c: 20000d0c .word 0x20000d0c
- 8003b50: 20000f54 .word 0x20000f54
- 8003b54: 20000634 .word 0x20000634
-
-08003b58 <HAL_UART_TxCpltCallback>:
-void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) {
- 8003b58: b580 push {r7, lr}
- 8003b5a: b082 sub sp, #8
- 8003b5c: af00 add r7, sp, #0
- 8003b5e: 6078 str r0, [r7, #4]
- nh.getHardware()->flush();
- 8003b60: 4805 ldr r0, [pc, #20] ; (8003b78 <HAL_UART_TxCpltCallback+0x20>)
- 8003b62: f000 fb5d bl 8004220 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE11getHardwareEv>
- 8003b66: 4603 mov r3, r0
- 8003b68: 4618 mov r0, r3
- 8003b6a: f7fd fe03 bl 8001774 <_ZN13STM32Hardware5flushEv>
-}
- 8003b6e: bf00 nop
- 8003b70: 3708 adds r7, #8
- 8003b72: 46bd mov sp, r7
- 8003b74: bd80 pop {r7, pc}
- 8003b76: bf00 nop
- 8003b78: 20000634 .word 0x20000634
-
-08003b7c <HAL_UART_RxCpltCallback>:
-
-void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) {
- 8003b7c: b580 push {r7, lr}
- 8003b7e: b082 sub sp, #8
- 8003b80: af00 add r7, sp, #0
- 8003b82: 6078 str r0, [r7, #4]
- nh.getHardware()->reset_rbuf();
- 8003b84: 4805 ldr r0, [pc, #20] ; (8003b9c <HAL_UART_RxCpltCallback+0x20>)
- 8003b86: f000 fb4b bl 8004220 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE11getHardwareEv>
- 8003b8a: 4603 mov r3, r0
- 8003b8c: 4618 mov r0, r3
- 8003b8e: f7fd fdb4 bl 80016fa <_ZN13STM32Hardware10reset_rbufEv>
-}
- 8003b92: bf00 nop
- 8003b94: 3708 adds r7, #8
- 8003b96: 46bd mov sp, r7
- 8003b98: bd80 pop {r7, pc}
- 8003b9a: bf00 nop
- 8003b9c: 20000634 .word 0x20000634
-
-08003ba0 <Error_Handler>:
-
-/**
- * @brief This function is executed in case of error occurrence.
- * @retval None
- */
-void Error_Handler(void) {
- 8003ba0: b480 push {r7}
- 8003ba2: af00 add r7, sp, #0
- /* USER CODE BEGIN Error_Handler_Debug */
- /* User can add his own implementation to report the HAL error return state */
-
- /* USER CODE END Error_Handler_Debug */
-}
- 8003ba4: bf00 nop
- 8003ba6: 46bd mov sp, r7
- 8003ba8: f85d 7b04 ldr.w r7, [sp], #4
- 8003bac: 4770 bx lr
-
-08003bae <_ZN3ros3Msg8varToArrIPhmEEvT_T0_>:
-
- // Copy data from variable into a byte array
- template<typename A, typename V>
- static void varToArr(A arr, const V var)
- 8003bae: b480 push {r7}
- 8003bb0: b085 sub sp, #20
- 8003bb2: af00 add r7, sp, #0
- 8003bb4: 6078 str r0, [r7, #4]
- 8003bb6: 6039 str r1, [r7, #0]
- {
- for (size_t i = 0; i < sizeof(V); i++)
- 8003bb8: 2300 movs r3, #0
- 8003bba: 60fb str r3, [r7, #12]
- 8003bbc: 68fb ldr r3, [r7, #12]
- 8003bbe: 2b03 cmp r3, #3
- 8003bc0: d80d bhi.n 8003bde <_ZN3ros3Msg8varToArrIPhmEEvT_T0_+0x30>
- arr[i] = (var >> (8 * i));
- 8003bc2: 68fb ldr r3, [r7, #12]
- 8003bc4: 00db lsls r3, r3, #3
- 8003bc6: 683a ldr r2, [r7, #0]
- 8003bc8: fa22 f103 lsr.w r1, r2, r3
- 8003bcc: 687a ldr r2, [r7, #4]
- 8003bce: 68fb ldr r3, [r7, #12]
- 8003bd0: 4413 add r3, r2
- 8003bd2: b2ca uxtb r2, r1
- 8003bd4: 701a strb r2, [r3, #0]
- for (size_t i = 0; i < sizeof(V); i++)
- 8003bd6: 68fb ldr r3, [r7, #12]
- 8003bd8: 3301 adds r3, #1
- 8003bda: 60fb str r3, [r7, #12]
- 8003bdc: e7ee b.n 8003bbc <_ZN3ros3Msg8varToArrIPhmEEvT_T0_+0xe>
- }
- 8003bde: bf00 nop
- 8003be0: 3714 adds r7, #20
- 8003be2: 46bd mov sp, r7
- 8003be4: f85d 7b04 ldr.w r7, [sp], #4
- 8003be8: 4770 bx lr
-
-08003bea <_ZN3ros3Msg8arrToVarImPhEEvRT_T0_>:
-
- // Copy data from a byte array into variable
- template<typename V, typename A>
- static void arrToVar(V& var, const A arr)
- 8003bea: b480 push {r7}
- 8003bec: b085 sub sp, #20
- 8003bee: af00 add r7, sp, #0
- 8003bf0: 6078 str r0, [r7, #4]
- 8003bf2: 6039 str r1, [r7, #0]
- {
- var = 0;
- 8003bf4: 687b ldr r3, [r7, #4]
- 8003bf6: 2200 movs r2, #0
- 8003bf8: 601a str r2, [r3, #0]
- for (size_t i = 0; i < sizeof(V); i++)
- 8003bfa: 2300 movs r3, #0
- 8003bfc: 60fb str r3, [r7, #12]
- 8003bfe: 68fb ldr r3, [r7, #12]
- 8003c00: 2b03 cmp r3, #3
- 8003c02: d811 bhi.n 8003c28 <_ZN3ros3Msg8arrToVarImPhEEvRT_T0_+0x3e>
- var |= (arr[i] << (8 * i));
- 8003c04: 687b ldr r3, [r7, #4]
- 8003c06: 681b ldr r3, [r3, #0]
- 8003c08: 6839 ldr r1, [r7, #0]
- 8003c0a: 68fa ldr r2, [r7, #12]
- 8003c0c: 440a add r2, r1
- 8003c0e: 7812 ldrb r2, [r2, #0]
- 8003c10: 4611 mov r1, r2
- 8003c12: 68fa ldr r2, [r7, #12]
- 8003c14: 00d2 lsls r2, r2, #3
- 8003c16: fa01 f202 lsl.w r2, r1, r2
- 8003c1a: 431a orrs r2, r3
- 8003c1c: 687b ldr r3, [r7, #4]
- 8003c1e: 601a str r2, [r3, #0]
- for (size_t i = 0; i < sizeof(V); i++)
- 8003c20: 68fb ldr r3, [r7, #12]
- 8003c22: 3301 adds r3, #1
- 8003c24: 60fb str r3, [r7, #12]
- 8003c26: e7ea b.n 8003bfe <_ZN3ros3Msg8arrToVarImPhEEvRT_T0_+0x14>
- }
- 8003c28: bf00 nop
- 8003c2a: 3714 adds r7, #20
- 8003c2c: 46bd mov sp, r7
- 8003c2e: f85d 7b04 ldr.w r7, [sp], #4
- 8003c32: 4770 bx lr
-
-08003c34 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE9advertiseERNS_9PublisherE>:
- /********************************************************************
- * Topic Management
- */
-
- /* Register a new publisher */
- bool advertise(Publisher & p)
- 8003c34: b480 push {r7}
- 8003c36: b085 sub sp, #20
- 8003c38: af00 add r7, sp, #0
- 8003c3a: 6078 str r0, [r7, #4]
- 8003c3c: 6039 str r1, [r7, #0]
- {
- for (int i = 0; i < MAX_PUBLISHERS; i++)
- 8003c3e: 2300 movs r3, #0
- 8003c40: 60fb str r3, [r7, #12]
- 8003c42: 68fb ldr r3, [r7, #12]
- 8003c44: 2b18 cmp r3, #24
- 8003c46: dc1e bgt.n 8003c86 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE9advertiseERNS_9PublisherE+0x52>
- {
- if (publishers[i] == 0) // empty slot
- 8003c48: 687a ldr r2, [r7, #4]
- 8003c4a: 68fb ldr r3, [r7, #12]
- 8003c4c: f503 73b4 add.w r3, r3, #360 ; 0x168
- 8003c50: 009b lsls r3, r3, #2
- 8003c52: 4413 add r3, r2
- 8003c54: 685b ldr r3, [r3, #4]
- 8003c56: 2b00 cmp r3, #0
- 8003c58: d111 bne.n 8003c7e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE9advertiseERNS_9PublisherE+0x4a>
- {
- publishers[i] = &p;
- 8003c5a: 687a ldr r2, [r7, #4]
- 8003c5c: 68fb ldr r3, [r7, #12]
- 8003c5e: f503 73b4 add.w r3, r3, #360 ; 0x168
- 8003c62: 009b lsls r3, r3, #2
- 8003c64: 4413 add r3, r2
- 8003c66: 683a ldr r2, [r7, #0]
- 8003c68: 605a str r2, [r3, #4]
- p.id_ = i + 100 + MAX_SUBSCRIBERS;
- 8003c6a: 68fb ldr r3, [r7, #12]
- 8003c6c: f103 027d add.w r2, r3, #125 ; 0x7d
- 8003c70: 683b ldr r3, [r7, #0]
- 8003c72: 609a str r2, [r3, #8]
- p.nh_ = this;
- 8003c74: 687a ldr r2, [r7, #4]
- 8003c76: 683b ldr r3, [r7, #0]
- 8003c78: 60da str r2, [r3, #12]
- return true;
- 8003c7a: 2301 movs r3, #1
- 8003c7c: e004 b.n 8003c88 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE9advertiseERNS_9PublisherE+0x54>
- for (int i = 0; i < MAX_PUBLISHERS; i++)
- 8003c7e: 68fb ldr r3, [r7, #12]
- 8003c80: 3301 adds r3, #1
- 8003c82: 60fb str r3, [r7, #12]
- 8003c84: e7dd b.n 8003c42 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE9advertiseERNS_9PublisherE+0xe>
- }
- }
- return false;
- 8003c86: 2300 movs r3, #0
- }
- 8003c88: 4618 mov r0, r3
- 8003c8a: 3714 adds r7, #20
- 8003c8c: 46bd mov sp, r7
- 8003c8e: f85d 7b04 ldr.w r7, [sp], #4
- 8003c92: 4770 bx lr
-
-08003c94 <_ZN3ros15NodeHandleBase_C1Ev>:
-class NodeHandleBase_
- 8003c94: b480 push {r7}
- 8003c96: b083 sub sp, #12
- 8003c98: af00 add r7, sp, #0
- 8003c9a: 6078 str r0, [r7, #4]
- 8003c9c: 4a04 ldr r2, [pc, #16] ; (8003cb0 <_ZN3ros15NodeHandleBase_C1Ev+0x1c>)
- 8003c9e: 687b ldr r3, [r7, #4]
- 8003ca0: 601a str r2, [r3, #0]
- 8003ca2: 687b ldr r3, [r7, #4]
- 8003ca4: 4618 mov r0, r3
- 8003ca6: 370c adds r7, #12
- 8003ca8: 46bd mov sp, r7
- 8003caa: f85d 7b04 ldr.w r7, [sp], #4
- 8003cae: 4770 bx lr
- 8003cb0: 0800b0c0 .word 0x0800b0c0
-
-08003cb4 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev>:
- NodeHandle_() : configured_(false)
- 8003cb4: b580 push {r7, lr}
- 8003cb6: b086 sub sp, #24
- 8003cb8: af00 add r7, sp, #0
- 8003cba: 6078 str r0, [r7, #4]
- 8003cbc: 687b ldr r3, [r7, #4]
- 8003cbe: 4618 mov r0, r3
- 8003cc0: f7ff ffe8 bl 8003c94 <_ZN3ros15NodeHandleBase_C1Ev>
- 8003cc4: 4a3a ldr r2, [pc, #232] ; (8003db0 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev+0xfc>)
- 8003cc6: 687b ldr r3, [r7, #4]
- 8003cc8: 601a str r2, [r3, #0]
- 8003cca: 687b ldr r3, [r7, #4]
- 8003ccc: 3304 adds r3, #4
- 8003cce: 4618 mov r0, r3
- 8003cd0: f7fd fcec bl 80016ac <_ZN13STM32HardwareC1Ev>
- 8003cd4: 687b ldr r3, [r7, #4]
- 8003cd6: 2200 movs r2, #0
- 8003cd8: f883 2680 strb.w r2, [r3, #1664] ; 0x680
- 8003cdc: 687b ldr r3, [r7, #4]
- 8003cde: f203 6394 addw r3, r3, #1684 ; 0x694
- 8003ce2: 4618 mov r0, r3
- 8003ce4: f7fd f9d6 bl 8001094 <_ZN14rosserial_msgs20RequestParamResponseC1Ev>
- for (unsigned int i = 0; i < MAX_PUBLISHERS; i++)
- 8003ce8: 2300 movs r3, #0
- 8003cea: 617b str r3, [r7, #20]
- 8003cec: 697b ldr r3, [r7, #20]
- 8003cee: 2b18 cmp r3, #24
- 8003cf0: d80b bhi.n 8003d0a <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev+0x56>
- publishers[i] = 0;
- 8003cf2: 687a ldr r2, [r7, #4]
- 8003cf4: 697b ldr r3, [r7, #20]
- 8003cf6: f503 73b4 add.w r3, r3, #360 ; 0x168
- 8003cfa: 009b lsls r3, r3, #2
- 8003cfc: 4413 add r3, r2
- 8003cfe: 2200 movs r2, #0
- 8003d00: 605a str r2, [r3, #4]
- for (unsigned int i = 0; i < MAX_PUBLISHERS; i++)
- 8003d02: 697b ldr r3, [r7, #20]
- 8003d04: 3301 adds r3, #1
- 8003d06: 617b str r3, [r7, #20]
- 8003d08: e7f0 b.n 8003cec <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev+0x38>
- for (unsigned int i = 0; i < MAX_SUBSCRIBERS; i++)
- 8003d0a: 2300 movs r3, #0
- 8003d0c: 613b str r3, [r7, #16]
- 8003d0e: 693b ldr r3, [r7, #16]
- 8003d10: 2b18 cmp r3, #24
- 8003d12: d80a bhi.n 8003d2a <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev+0x76>
- subscribers[i] = 0;
- 8003d14: 687b ldr r3, [r7, #4]
- 8003d16: 693a ldr r2, [r7, #16]
- 8003d18: f502 72c1 add.w r2, r2, #386 ; 0x182
- 8003d1c: 2100 movs r1, #0
- 8003d1e: f843 1022 str.w r1, [r3, r2, lsl #2]
- for (unsigned int i = 0; i < MAX_SUBSCRIBERS; i++)
- 8003d22: 693b ldr r3, [r7, #16]
- 8003d24: 3301 adds r3, #1
- 8003d26: 613b str r3, [r7, #16]
- 8003d28: e7f1 b.n 8003d0e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev+0x5a>
- for (unsigned int i = 0; i < INPUT_SIZE; i++)
- 8003d2a: 2300 movs r3, #0
- 8003d2c: 60fb str r3, [r7, #12]
- 8003d2e: 68fb ldr r3, [r7, #12]
- 8003d30: f5b3 7f00 cmp.w r3, #512 ; 0x200
- 8003d34: d20a bcs.n 8003d4c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev+0x98>
- message_in[i] = 0;
- 8003d36: 687a ldr r2, [r7, #4]
- 8003d38: 68fb ldr r3, [r7, #12]
- 8003d3a: 4413 add r3, r2
- 8003d3c: f503 73d2 add.w r3, r3, #420 ; 0x1a4
- 8003d40: 2200 movs r2, #0
- 8003d42: 701a strb r2, [r3, #0]
- for (unsigned int i = 0; i < INPUT_SIZE; i++)
- 8003d44: 68fb ldr r3, [r7, #12]
- 8003d46: 3301 adds r3, #1
- 8003d48: 60fb str r3, [r7, #12]
- 8003d4a: e7f0 b.n 8003d2e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev+0x7a>
- for (unsigned int i = 0; i < OUTPUT_SIZE; i++)
- 8003d4c: 2300 movs r3, #0
- 8003d4e: 60bb str r3, [r7, #8]
- 8003d50: 68bb ldr r3, [r7, #8]
- 8003d52: f5b3 7f00 cmp.w r3, #512 ; 0x200
- 8003d56: d20a bcs.n 8003d6e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev+0xba>
- message_out[i] = 0;
- 8003d58: 687a ldr r2, [r7, #4]
- 8003d5a: 68bb ldr r3, [r7, #8]
- 8003d5c: 4413 add r3, r2
- 8003d5e: f503 7369 add.w r3, r3, #932 ; 0x3a4
- 8003d62: 2200 movs r2, #0
- 8003d64: 701a strb r2, [r3, #0]
- for (unsigned int i = 0; i < OUTPUT_SIZE; i++)
- 8003d66: 68bb ldr r3, [r7, #8]
- 8003d68: 3301 adds r3, #1
- 8003d6a: 60bb str r3, [r7, #8]
- 8003d6c: e7f0 b.n 8003d50 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev+0x9c>
- req_param_resp.ints_length = 0;
- 8003d6e: 687b ldr r3, [r7, #4]
- 8003d70: 2200 movs r2, #0
- 8003d72: f8c3 2698 str.w r2, [r3, #1688] ; 0x698
- req_param_resp.ints = NULL;
- 8003d76: 687b ldr r3, [r7, #4]
- 8003d78: 2200 movs r2, #0
- 8003d7a: f8c3 26a0 str.w r2, [r3, #1696] ; 0x6a0
- req_param_resp.floats_length = 0;
- 8003d7e: 687b ldr r3, [r7, #4]
- 8003d80: 2200 movs r2, #0
- 8003d82: f8c3 26a4 str.w r2, [r3, #1700] ; 0x6a4
- req_param_resp.floats = NULL;
- 8003d86: 687b ldr r3, [r7, #4]
- 8003d88: 2200 movs r2, #0
- 8003d8a: f8c3 26ac str.w r2, [r3, #1708] ; 0x6ac
- req_param_resp.ints_length = 0;
- 8003d8e: 687b ldr r3, [r7, #4]
- 8003d90: 2200 movs r2, #0
- 8003d92: f8c3 2698 str.w r2, [r3, #1688] ; 0x698
- req_param_resp.ints = NULL;
- 8003d96: 687b ldr r3, [r7, #4]
- 8003d98: 2200 movs r2, #0
- 8003d9a: f8c3 26a0 str.w r2, [r3, #1696] ; 0x6a0
- spin_timeout_ = 0;
- 8003d9e: 687b ldr r3, [r7, #4]
- 8003da0: 2200 movs r2, #0
- 8003da2: f8c3 21a0 str.w r2, [r3, #416] ; 0x1a0
- }
- 8003da6: 687b ldr r3, [r7, #4]
- 8003da8: 4618 mov r0, r3
- 8003daa: 3718 adds r7, #24
- 8003dac: 46bd mov sp, r7
- 8003dae: bd80 pop {r7, pc}
- 8003db0: 0800b01c .word 0x0800b01c
-
-08003db4 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8initNodeEv>:
- void initNode()
- 8003db4: b580 push {r7, lr}
- 8003db6: b082 sub sp, #8
- 8003db8: af00 add r7, sp, #0
- 8003dba: 6078 str r0, [r7, #4]
- hardware_.init();
- 8003dbc: 687b ldr r3, [r7, #4]
- 8003dbe: 3304 adds r3, #4
- 8003dc0: 4618 mov r0, r3
- 8003dc2: f7fd fc8f bl 80016e4 <_ZN13STM32Hardware4initEv>
- mode_ = 0;
- 8003dc6: 687b ldr r3, [r7, #4]
- 8003dc8: 2200 movs r2, #0
- 8003dca: f8c3 266c str.w r2, [r3, #1644] ; 0x66c
- bytes_ = 0;
- 8003dce: 687b ldr r3, [r7, #4]
- 8003dd0: 2200 movs r2, #0
- 8003dd2: f8c3 2670 str.w r2, [r3, #1648] ; 0x670
- index_ = 0;
- 8003dd6: 687b ldr r3, [r7, #4]
- 8003dd8: 2200 movs r2, #0
- 8003dda: f8c3 2678 str.w r2, [r3, #1656] ; 0x678
- topic_ = 0;
- 8003dde: 687b ldr r3, [r7, #4]
- 8003de0: 2200 movs r2, #0
- 8003de2: f8c3 2674 str.w r2, [r3, #1652] ; 0x674
- };
- 8003de6: bf00 nop
- 8003de8: 3708 adds r7, #8
- 8003dea: 46bd mov sp, r7
- 8003dec: bd80 pop {r7, pc}
- ...
-
-08003df0 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE3nowEv>:
- Time now()
- 8003df0: b580 push {r7, lr}
- 8003df2: b084 sub sp, #16
- 8003df4: af00 add r7, sp, #0
- 8003df6: 6078 str r0, [r7, #4]
- 8003df8: 6039 str r1, [r7, #0]
- uint32_t ms = hardware_.time();
- 8003dfa: 683b ldr r3, [r7, #0]
- 8003dfc: 3304 adds r3, #4
- 8003dfe: 4618 mov r0, r3
- 8003e00: f7fd fd56 bl 80018b0 <_ZN13STM32Hardware4timeEv>
- 8003e04: 60f8 str r0, [r7, #12]
- Time current_time;
- 8003e06: 6878 ldr r0, [r7, #4]
- 8003e08: f7fc fdce bl 80009a8 <_ZN3ros4TimeC1Ev>
- current_time.sec = ms / 1000 + sec_offset;
- 8003e0c: 68fb ldr r3, [r7, #12]
- 8003e0e: 4a14 ldr r2, [pc, #80] ; (8003e60 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE3nowEv+0x70>)
- 8003e10: fba2 2303 umull r2, r3, r2, r3
- 8003e14: 099a lsrs r2, r3, #6
- 8003e16: 683b ldr r3, [r7, #0]
- 8003e18: f8d3 3198 ldr.w r3, [r3, #408] ; 0x198
- 8003e1c: 441a add r2, r3
- 8003e1e: 687b ldr r3, [r7, #4]
- 8003e20: 601a str r2, [r3, #0]
- current_time.nsec = (ms % 1000) * 1000000UL + nsec_offset;
- 8003e22: 68fa ldr r2, [r7, #12]
- 8003e24: 4b0e ldr r3, [pc, #56] ; (8003e60 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE3nowEv+0x70>)
- 8003e26: fba3 1302 umull r1, r3, r3, r2
- 8003e2a: 099b lsrs r3, r3, #6
- 8003e2c: f44f 717a mov.w r1, #1000 ; 0x3e8
- 8003e30: fb01 f303 mul.w r3, r1, r3
- 8003e34: 1ad3 subs r3, r2, r3
- 8003e36: 4a0b ldr r2, [pc, #44] ; (8003e64 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE3nowEv+0x74>)
- 8003e38: fb02 f203 mul.w r2, r2, r3
- 8003e3c: 683b ldr r3, [r7, #0]
- 8003e3e: f8d3 319c ldr.w r3, [r3, #412] ; 0x19c
- 8003e42: 441a add r2, r3
- 8003e44: 687b ldr r3, [r7, #4]
- 8003e46: 605a str r2, [r3, #4]
- normalizeSecNSec(current_time.sec, current_time.nsec);
- 8003e48: 687b ldr r3, [r7, #4]
- 8003e4a: 3304 adds r3, #4
- 8003e4c: 4619 mov r1, r3
- 8003e4e: 6878 ldr r0, [r7, #4]
- 8003e50: f001 f990 bl 8005174 <_ZN3ros16normalizeSecNSecERmS0_>
- return current_time;
- 8003e54: bf00 nop
- }
- 8003e56: 6878 ldr r0, [r7, #4]
- 8003e58: 3710 adds r7, #16
- 8003e5a: 46bd mov sp, r7
- 8003e5c: bd80 pop {r7, pc}
- 8003e5e: bf00 nop
- 8003e60: 10624dd3 .word 0x10624dd3
- 8003e64: 000f4240 .word 0x000f4240
-
-08003e68 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv>:
- virtual int spinOnce()
- 8003e68: b580 push {r7, lr}
- 8003e6a: b084 sub sp, #16
- 8003e6c: af00 add r7, sp, #0
- 8003e6e: 6078 str r0, [r7, #4]
- uint32_t c_time = hardware_.time();
- 8003e70: 687b ldr r3, [r7, #4]
- 8003e72: 3304 adds r3, #4
- 8003e74: 4618 mov r0, r3
- 8003e76: f7fd fd1b bl 80018b0 <_ZN13STM32Hardware4timeEv>
- 8003e7a: 60f8 str r0, [r7, #12]
- if ((c_time - last_sync_receive_time) > (SYNC_SECONDS * 2200))
- 8003e7c: 687b ldr r3, [r7, #4]
- 8003e7e: f8d3 3688 ldr.w r3, [r3, #1672] ; 0x688
- 8003e82: 68fa ldr r2, [r7, #12]
- 8003e84: 1ad3 subs r3, r2, r3
- 8003e86: f642 22f8 movw r2, #11000 ; 0x2af8
- 8003e8a: 4293 cmp r3, r2
- 8003e8c: d903 bls.n 8003e96 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x2e>
- configured_ = false;
- 8003e8e: 687b ldr r3, [r7, #4]
- 8003e90: 2200 movs r2, #0
- 8003e92: f883 2680 strb.w r2, [r3, #1664] ; 0x680
- if (mode_ != MODE_FIRST_FF)
- 8003e96: 687b ldr r3, [r7, #4]
- 8003e98: f8d3 366c ldr.w r3, [r3, #1644] ; 0x66c
- 8003e9c: 2b00 cmp r3, #0
- 8003e9e: d009 beq.n 8003eb4 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
- if (c_time > last_msg_timeout_time)
- 8003ea0: 687b ldr r3, [r7, #4]
- 8003ea2: f8d3 368c ldr.w r3, [r3, #1676] ; 0x68c
- 8003ea6: 68fa ldr r2, [r7, #12]
- 8003ea8: 429a cmp r2, r3
- 8003eaa: d903 bls.n 8003eb4 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
- mode_ = MODE_FIRST_FF;
- 8003eac: 687b ldr r3, [r7, #4]
- 8003eae: 2200 movs r2, #0
- 8003eb0: f8c3 266c str.w r2, [r3, #1644] ; 0x66c
- if (spin_timeout_ > 0)
- 8003eb4: 687b ldr r3, [r7, #4]
- 8003eb6: f8d3 31a0 ldr.w r3, [r3, #416] ; 0x1a0
- 8003eba: 2b00 cmp r3, #0
- 8003ebc: d014 beq.n 8003ee8 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x80>
- if ((hardware_.time() - c_time) > spin_timeout_)
- 8003ebe: 687b ldr r3, [r7, #4]
- 8003ec0: 3304 adds r3, #4
- 8003ec2: 4618 mov r0, r3
- 8003ec4: f7fd fcf4 bl 80018b0 <_ZN13STM32Hardware4timeEv>
- 8003ec8: 4602 mov r2, r0
- 8003eca: 68fb ldr r3, [r7, #12]
- 8003ecc: 1ad2 subs r2, r2, r3
- 8003ece: 687b ldr r3, [r7, #4]
- 8003ed0: f8d3 31a0 ldr.w r3, [r3, #416] ; 0x1a0
- 8003ed4: 429a cmp r2, r3
- 8003ed6: bf8c ite hi
- 8003ed8: 2301 movhi r3, #1
- 8003eda: 2300 movls r3, #0
- 8003edc: b2db uxtb r3, r3
- 8003ede: 2b00 cmp r3, #0
- 8003ee0: d002 beq.n 8003ee8 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x80>
- return SPIN_TIMEOUT;
- 8003ee2: f06f 0301 mvn.w r3, #1
- 8003ee6: e197 b.n 8004218 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x3b0>
- int data = hardware_.read();
- 8003ee8: 687b ldr r3, [r7, #4]
- 8003eea: 3304 adds r3, #4
- 8003eec: 4618 mov r0, r3
- 8003eee: f7fd fc14 bl 800171a <_ZN13STM32Hardware4readEv>
- 8003ef2: 60b8 str r0, [r7, #8]
- if (data < 0)
- 8003ef4: 68bb ldr r3, [r7, #8]
- 8003ef6: 2b00 cmp r3, #0
- 8003ef8: f2c0 8177 blt.w 80041ea <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x382>
- checksum_ += data;
- 8003efc: 687b ldr r3, [r7, #4]
- 8003efe: f8d3 267c ldr.w r2, [r3, #1660] ; 0x67c
- 8003f02: 68bb ldr r3, [r7, #8]
- 8003f04: 441a add r2, r3
- 8003f06: 687b ldr r3, [r7, #4]
- 8003f08: f8c3 267c str.w r2, [r3, #1660] ; 0x67c
- if (mode_ == MODE_MESSAGE) /* message data being recieved */
- 8003f0c: 687b ldr r3, [r7, #4]
- 8003f0e: f8d3 366c ldr.w r3, [r3, #1644] ; 0x66c
- 8003f12: 2b07 cmp r3, #7
- 8003f14: d11e bne.n 8003f54 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0xec>
- message_in[index_++] = data;
- 8003f16: 687b ldr r3, [r7, #4]
- 8003f18: f8d3 3678 ldr.w r3, [r3, #1656] ; 0x678
- 8003f1c: 1c59 adds r1, r3, #1
- 8003f1e: 687a ldr r2, [r7, #4]
- 8003f20: f8c2 1678 str.w r1, [r2, #1656] ; 0x678
- 8003f24: 68ba ldr r2, [r7, #8]
- 8003f26: b2d1 uxtb r1, r2
- 8003f28: 687a ldr r2, [r7, #4]
- 8003f2a: 4413 add r3, r2
- 8003f2c: 460a mov r2, r1
- 8003f2e: f883 21a4 strb.w r2, [r3, #420] ; 0x1a4
- bytes_--;
- 8003f32: 687b ldr r3, [r7, #4]
- 8003f34: f8d3 3670 ldr.w r3, [r3, #1648] ; 0x670
- 8003f38: 1e5a subs r2, r3, #1
- 8003f3a: 687b ldr r3, [r7, #4]
- 8003f3c: f8c3 2670 str.w r2, [r3, #1648] ; 0x670
- if (bytes_ == 0) /* is message complete? if so, checksum */
- 8003f40: 687b ldr r3, [r7, #4]
- 8003f42: f8d3 3670 ldr.w r3, [r3, #1648] ; 0x670
- 8003f46: 2b00 cmp r3, #0
- 8003f48: d1b4 bne.n 8003eb4 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
- mode_ = MODE_MSG_CHECKSUM;
- 8003f4a: 687b ldr r3, [r7, #4]
- 8003f4c: 2208 movs r2, #8
- 8003f4e: f8c3 266c str.w r2, [r3, #1644] ; 0x66c
- 8003f52: e7af b.n 8003eb4 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
- else if (mode_ == MODE_FIRST_FF)
- 8003f54: 687b ldr r3, [r7, #4]
- 8003f56: f8d3 366c ldr.w r3, [r3, #1644] ; 0x66c
- 8003f5a: 2b00 cmp r3, #0
- 8003f5c: d128 bne.n 8003fb0 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x148>
- if (data == 0xff)
- 8003f5e: 68bb ldr r3, [r7, #8]
- 8003f60: 2bff cmp r3, #255 ; 0xff
- 8003f62: d10d bne.n 8003f80 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x118>
- mode_++;
- 8003f64: 687b ldr r3, [r7, #4]
- 8003f66: f8d3 366c ldr.w r3, [r3, #1644] ; 0x66c
- 8003f6a: 1c5a adds r2, r3, #1
- 8003f6c: 687b ldr r3, [r7, #4]
- 8003f6e: f8c3 266c str.w r2, [r3, #1644] ; 0x66c
- last_msg_timeout_time = c_time + SERIAL_MSG_TIMEOUT;
- 8003f72: 68fb ldr r3, [r7, #12]
- 8003f74: f103 0214 add.w r2, r3, #20
- 8003f78: 687b ldr r3, [r7, #4]
- 8003f7a: f8c3 268c str.w r2, [r3, #1676] ; 0x68c
- 8003f7e: e799 b.n 8003eb4 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
- else if (hardware_.time() - c_time > (SYNC_SECONDS * 1000))
- 8003f80: 687b ldr r3, [r7, #4]
- 8003f82: 3304 adds r3, #4
- 8003f84: 4618 mov r0, r3
- 8003f86: f7fd fc93 bl 80018b0 <_ZN13STM32Hardware4timeEv>
- 8003f8a: 4602 mov r2, r0
- 8003f8c: 68fb ldr r3, [r7, #12]
- 8003f8e: 1ad3 subs r3, r2, r3
- 8003f90: f241 3288 movw r2, #5000 ; 0x1388
- 8003f94: 4293 cmp r3, r2
- 8003f96: bf8c ite hi
- 8003f98: 2301 movhi r3, #1
- 8003f9a: 2300 movls r3, #0
- 8003f9c: b2db uxtb r3, r3
- 8003f9e: 2b00 cmp r3, #0
- 8003fa0: d088 beq.n 8003eb4 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
- configured_ = false;
- 8003fa2: 687b ldr r3, [r7, #4]
- 8003fa4: 2200 movs r2, #0
- 8003fa6: f883 2680 strb.w r2, [r3, #1664] ; 0x680
- return SPIN_TIMEOUT;
- 8003faa: f06f 0301 mvn.w r3, #1
- 8003fae: e133 b.n 8004218 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x3b0>
- else if (mode_ == MODE_PROTOCOL_VER)
- 8003fb0: 687b ldr r3, [r7, #4]
- 8003fb2: f8d3 366c ldr.w r3, [r3, #1644] ; 0x66c
- 8003fb6: 2b01 cmp r3, #1
- 8003fb8: d11b bne.n 8003ff2 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x18a>
- if (data == PROTOCOL_VER)
- 8003fba: 68bb ldr r3, [r7, #8]
- 8003fbc: 2bfe cmp r3, #254 ; 0xfe
- 8003fbe: d107 bne.n 8003fd0 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x168>
- mode_++;
- 8003fc0: 687b ldr r3, [r7, #4]
- 8003fc2: f8d3 366c ldr.w r3, [r3, #1644] ; 0x66c
- 8003fc6: 1c5a adds r2, r3, #1
- 8003fc8: 687b ldr r3, [r7, #4]
- 8003fca: f8c3 266c str.w r2, [r3, #1644] ; 0x66c
- 8003fce: e771 b.n 8003eb4 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
- mode_ = MODE_FIRST_FF;
- 8003fd0: 687b ldr r3, [r7, #4]
- 8003fd2: 2200 movs r2, #0
- 8003fd4: f8c3 266c str.w r2, [r3, #1644] ; 0x66c
- if (configured_ == false)
- 8003fd8: 687b ldr r3, [r7, #4]
- 8003fda: f893 3680 ldrb.w r3, [r3, #1664] ; 0x680
- 8003fde: f083 0301 eor.w r3, r3, #1
- 8003fe2: b2db uxtb r3, r3
- 8003fe4: 2b00 cmp r3, #0
- 8003fe6: f43f af65 beq.w 8003eb4 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
- requestSyncTime(); /* send a msg back showing our protocol version */
- 8003fea: 6878 ldr r0, [r7, #4]
- 8003fec: f000 f924 bl 8004238 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15requestSyncTimeEv>
- 8003ff0: e760 b.n 8003eb4 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
- else if (mode_ == MODE_SIZE_L) /* bottom half of message size */
- 8003ff2: 687b ldr r3, [r7, #4]
- 8003ff4: f8d3 366c ldr.w r3, [r3, #1644] ; 0x66c
- 8003ff8: 2b02 cmp r3, #2
- 8003ffa: d113 bne.n 8004024 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x1bc>
- bytes_ = data;
- 8003ffc: 687b ldr r3, [r7, #4]
- 8003ffe: 68ba ldr r2, [r7, #8]
- 8004000: f8c3 2670 str.w r2, [r3, #1648] ; 0x670
- index_ = 0;
- 8004004: 687b ldr r3, [r7, #4]
- 8004006: 2200 movs r2, #0
- 8004008: f8c3 2678 str.w r2, [r3, #1656] ; 0x678
- mode_++;
- 800400c: 687b ldr r3, [r7, #4]
- 800400e: f8d3 366c ldr.w r3, [r3, #1644] ; 0x66c
- 8004012: 1c5a adds r2, r3, #1
- 8004014: 687b ldr r3, [r7, #4]
- 8004016: f8c3 266c str.w r2, [r3, #1644] ; 0x66c
- checksum_ = data; /* first byte for calculating size checksum */
- 800401a: 687b ldr r3, [r7, #4]
- 800401c: 68ba ldr r2, [r7, #8]
- 800401e: f8c3 267c str.w r2, [r3, #1660] ; 0x67c
- 8004022: e747 b.n 8003eb4 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
- else if (mode_ == MODE_SIZE_H) /* top half of message size */
- 8004024: 687b ldr r3, [r7, #4]
- 8004026: f8d3 366c ldr.w r3, [r3, #1644] ; 0x66c
- 800402a: 2b03 cmp r3, #3
- 800402c: d110 bne.n 8004050 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x1e8>
- bytes_ += data << 8;
- 800402e: 687b ldr r3, [r7, #4]
- 8004030: f8d3 2670 ldr.w r2, [r3, #1648] ; 0x670
- 8004034: 68bb ldr r3, [r7, #8]
- 8004036: 021b lsls r3, r3, #8
- 8004038: 441a add r2, r3
- 800403a: 687b ldr r3, [r7, #4]
- 800403c: f8c3 2670 str.w r2, [r3, #1648] ; 0x670
- mode_++;
- 8004040: 687b ldr r3, [r7, #4]
- 8004042: f8d3 366c ldr.w r3, [r3, #1644] ; 0x66c
- 8004046: 1c5a adds r2, r3, #1
- 8004048: 687b ldr r3, [r7, #4]
- 800404a: f8c3 266c str.w r2, [r3, #1644] ; 0x66c
- 800404e: e731 b.n 8003eb4 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
- else if (mode_ == MODE_SIZE_CHECKSUM)
- 8004050: 687b ldr r3, [r7, #4]
- 8004052: f8d3 366c ldr.w r3, [r3, #1644] ; 0x66c
- 8004056: 2b04 cmp r3, #4
- 8004058: d116 bne.n 8004088 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x220>
- if ((checksum_ % 256) == 255)
- 800405a: 687b ldr r3, [r7, #4]
- 800405c: f8d3 367c ldr.w r3, [r3, #1660] ; 0x67c
- 8004060: 425a negs r2, r3
- 8004062: b2db uxtb r3, r3
- 8004064: b2d2 uxtb r2, r2
- 8004066: bf58 it pl
- 8004068: 4253 negpl r3, r2
- 800406a: 2bff cmp r3, #255 ; 0xff
- 800406c: d107 bne.n 800407e <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x216>
- mode_++;
- 800406e: 687b ldr r3, [r7, #4]
- 8004070: f8d3 366c ldr.w r3, [r3, #1644] ; 0x66c
- 8004074: 1c5a adds r2, r3, #1
- 8004076: 687b ldr r3, [r7, #4]
- 8004078: f8c3 266c str.w r2, [r3, #1644] ; 0x66c
- 800407c: e71a b.n 8003eb4 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
- mode_ = MODE_FIRST_FF; /* Abandon the frame if the msg len is wrong */
- 800407e: 687b ldr r3, [r7, #4]
- 8004080: 2200 movs r2, #0
- 8004082: f8c3 266c str.w r2, [r3, #1644] ; 0x66c
- 8004086: e715 b.n 8003eb4 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
- else if (mode_ == MODE_TOPIC_L) /* bottom half of topic id */
- 8004088: 687b ldr r3, [r7, #4]
- 800408a: f8d3 366c ldr.w r3, [r3, #1644] ; 0x66c
- 800408e: 2b05 cmp r3, #5
- 8004090: d10f bne.n 80040b2 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x24a>
- topic_ = data;
- 8004092: 687b ldr r3, [r7, #4]
- 8004094: 68ba ldr r2, [r7, #8]
- 8004096: f8c3 2674 str.w r2, [r3, #1652] ; 0x674
- mode_++;
- 800409a: 687b ldr r3, [r7, #4]
- 800409c: f8d3 366c ldr.w r3, [r3, #1644] ; 0x66c
- 80040a0: 1c5a adds r2, r3, #1
- 80040a2: 687b ldr r3, [r7, #4]
- 80040a4: f8c3 266c str.w r2, [r3, #1644] ; 0x66c
- checksum_ = data; /* first byte included in checksum */
- 80040a8: 687b ldr r3, [r7, #4]
- 80040aa: 68ba ldr r2, [r7, #8]
- 80040ac: f8c3 267c str.w r2, [r3, #1660] ; 0x67c
- 80040b0: e700 b.n 8003eb4 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
- else if (mode_ == MODE_TOPIC_H) /* top half of topic id */
- 80040b2: 687b ldr r3, [r7, #4]
- 80040b4: f8d3 366c ldr.w r3, [r3, #1644] ; 0x66c
- 80040b8: 2b06 cmp r3, #6
- 80040ba: d117 bne.n 80040ec <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x284>
- topic_ += data << 8;
- 80040bc: 687b ldr r3, [r7, #4]
- 80040be: f8d3 2674 ldr.w r2, [r3, #1652] ; 0x674
- 80040c2: 68bb ldr r3, [r7, #8]
- 80040c4: 021b lsls r3, r3, #8
- 80040c6: 441a add r2, r3
- 80040c8: 687b ldr r3, [r7, #4]
- 80040ca: f8c3 2674 str.w r2, [r3, #1652] ; 0x674
- mode_ = MODE_MESSAGE;
- 80040ce: 687b ldr r3, [r7, #4]
- 80040d0: 2207 movs r2, #7
- 80040d2: f8c3 266c str.w r2, [r3, #1644] ; 0x66c
- if (bytes_ == 0)
- 80040d6: 687b ldr r3, [r7, #4]
- 80040d8: f8d3 3670 ldr.w r3, [r3, #1648] ; 0x670
- 80040dc: 2b00 cmp r3, #0
- 80040de: f47f aee9 bne.w 8003eb4 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
- mode_ = MODE_MSG_CHECKSUM;
- 80040e2: 687b ldr r3, [r7, #4]
- 80040e4: 2208 movs r2, #8
- 80040e6: f8c3 266c str.w r2, [r3, #1644] ; 0x66c
- 80040ea: e6e3 b.n 8003eb4 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
- else if (mode_ == MODE_MSG_CHECKSUM) /* do checksum */
- 80040ec: 687b ldr r3, [r7, #4]
- 80040ee: f8d3 366c ldr.w r3, [r3, #1644] ; 0x66c
- 80040f2: 2b08 cmp r3, #8
- 80040f4: f47f aede bne.w 8003eb4 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
- mode_ = MODE_FIRST_FF;
- 80040f8: 687b ldr r3, [r7, #4]
- 80040fa: 2200 movs r2, #0
- 80040fc: f8c3 266c str.w r2, [r3, #1644] ; 0x66c
- if ((checksum_ % 256) == 255)
- 8004100: 687b ldr r3, [r7, #4]
- 8004102: f8d3 367c ldr.w r3, [r3, #1660] ; 0x67c
- 8004106: 425a negs r2, r3
- 8004108: b2db uxtb r3, r3
- 800410a: b2d2 uxtb r2, r2
- 800410c: bf58 it pl
- 800410e: 4253 negpl r3, r2
- 8004110: 2bff cmp r3, #255 ; 0xff
- 8004112: f47f aecf bne.w 8003eb4 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
- if (topic_ == TopicInfo::ID_PUBLISHER)
- 8004116: 687b ldr r3, [r7, #4]
- 8004118: f8d3 3674 ldr.w r3, [r3, #1652] ; 0x674
- 800411c: 2b00 cmp r3, #0
- 800411e: d110 bne.n 8004142 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x2da>
- requestSyncTime();
- 8004120: 6878 ldr r0, [r7, #4]
- 8004122: f000 f889 bl 8004238 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15requestSyncTimeEv>
- negotiateTopics();
- 8004126: 6878 ldr r0, [r7, #4]
- 8004128: f000 f8a4 bl 8004274 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv>
- last_sync_time = c_time;
- 800412c: 687b ldr r3, [r7, #4]
- 800412e: 68fa ldr r2, [r7, #12]
- 8004130: f8c3 2684 str.w r2, [r3, #1668] ; 0x684
- last_sync_receive_time = c_time;
- 8004134: 687b ldr r3, [r7, #4]
- 8004136: 68fa ldr r2, [r7, #12]
- 8004138: f8c3 2688 str.w r2, [r3, #1672] ; 0x688
- return SPIN_ERR;
- 800413c: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff
- 8004140: e06a b.n 8004218 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x3b0>
- else if (topic_ == TopicInfo::ID_TIME)
- 8004142: 687b ldr r3, [r7, #4]
- 8004144: f8d3 3674 ldr.w r3, [r3, #1652] ; 0x674
- 8004148: 2b0a cmp r3, #10
- 800414a: d107 bne.n 800415c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x2f4>
- syncTime(message_in);
- 800414c: 687b ldr r3, [r7, #4]
- 800414e: f503 73d2 add.w r3, r3, #420 ; 0x1a4
- 8004152: 4619 mov r1, r3
- 8004154: 6878 ldr r0, [r7, #4]
- 8004156: f000 f96d bl 8004434 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8syncTimeEPh>
- 800415a: e6ab b.n 8003eb4 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
- else if (topic_ == TopicInfo::ID_PARAMETER_REQUEST)
- 800415c: 687b ldr r3, [r7, #4]
- 800415e: f8d3 3674 ldr.w r3, [r3, #1652] ; 0x674
- 8004162: 2b06 cmp r3, #6
- 8004164: d10e bne.n 8004184 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x31c>
- req_param_resp.deserialize(message_in);
- 8004166: 687b ldr r3, [r7, #4]
- 8004168: f203 6294 addw r2, r3, #1684 ; 0x694
- 800416c: 687b ldr r3, [r7, #4]
- 800416e: f503 73d2 add.w r3, r3, #420 ; 0x1a4
- 8004172: 4619 mov r1, r3
- 8004174: 4610 mov r0, r2
- 8004176: f7fd f8c2 bl 80012fe <_ZN14rosserial_msgs20RequestParamResponse11deserializeEPh>
- param_recieved = true;
- 800417a: 687b ldr r3, [r7, #4]
- 800417c: 2201 movs r2, #1
- 800417e: f883 2690 strb.w r2, [r3, #1680] ; 0x690
- 8004182: e697 b.n 8003eb4 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
- else if (topic_ == TopicInfo::ID_TX_STOP)
- 8004184: 687b ldr r3, [r7, #4]
- 8004186: f8d3 3674 ldr.w r3, [r3, #1652] ; 0x674
- 800418a: 2b0b cmp r3, #11
- 800418c: d104 bne.n 8004198 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x330>
- configured_ = false;
- 800418e: 687b ldr r3, [r7, #4]
- 8004190: 2200 movs r2, #0
- 8004192: f883 2680 strb.w r2, [r3, #1664] ; 0x680
- 8004196: e68d b.n 8003eb4 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
- if (subscribers[topic_ - 100])
- 8004198: 687b ldr r3, [r7, #4]
- 800419a: f8d3 3674 ldr.w r3, [r3, #1652] ; 0x674
- 800419e: f1a3 0264 sub.w r2, r3, #100 ; 0x64
- 80041a2: 687b ldr r3, [r7, #4]
- 80041a4: f502 72c1 add.w r2, r2, #386 ; 0x182
- 80041a8: f853 3022 ldr.w r3, [r3, r2, lsl #2]
- 80041ac: 2b00 cmp r3, #0
- 80041ae: f43f ae81 beq.w 8003eb4 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
- subscribers[topic_ - 100]->callback(message_in);
- 80041b2: 687b ldr r3, [r7, #4]
- 80041b4: f8d3 3674 ldr.w r3, [r3, #1652] ; 0x674
- 80041b8: f1a3 0264 sub.w r2, r3, #100 ; 0x64
- 80041bc: 687b ldr r3, [r7, #4]
- 80041be: f502 72c1 add.w r2, r2, #386 ; 0x182
- 80041c2: f853 0022 ldr.w r0, [r3, r2, lsl #2]
- 80041c6: 687b ldr r3, [r7, #4]
- 80041c8: f8d3 3674 ldr.w r3, [r3, #1652] ; 0x674
- 80041cc: f1a3 0264 sub.w r2, r3, #100 ; 0x64
- 80041d0: 687b ldr r3, [r7, #4]
- 80041d2: f502 72c1 add.w r2, r2, #386 ; 0x182
- 80041d6: f853 3022 ldr.w r3, [r3, r2, lsl #2]
- 80041da: 681b ldr r3, [r3, #0]
- 80041dc: 681b ldr r3, [r3, #0]
- 80041de: 687a ldr r2, [r7, #4]
- 80041e0: f502 72d2 add.w r2, r2, #420 ; 0x1a4
- 80041e4: 4611 mov r1, r2
- 80041e6: 4798 blx r3
- while (true)
- 80041e8: e664 b.n 8003eb4 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x4c>
- break;
- 80041ea: bf00 nop
- if (configured_ && ((c_time - last_sync_time) > (SYNC_SECONDS * 500)))
- 80041ec: 687b ldr r3, [r7, #4]
- 80041ee: f893 3680 ldrb.w r3, [r3, #1664] ; 0x680
- 80041f2: 2b00 cmp r3, #0
- 80041f4: d00f beq.n 8004216 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x3ae>
- 80041f6: 687b ldr r3, [r7, #4]
- 80041f8: f8d3 3684 ldr.w r3, [r3, #1668] ; 0x684
- 80041fc: 68fa ldr r2, [r7, #12]
- 80041fe: 1ad3 subs r3, r2, r3
- 8004200: f640 12c4 movw r2, #2500 ; 0x9c4
- 8004204: 4293 cmp r3, r2
- 8004206: d906 bls.n 8004216 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8spinOnceEv+0x3ae>
- requestSyncTime();
- 8004208: 6878 ldr r0, [r7, #4]
- 800420a: f000 f815 bl 8004238 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15requestSyncTimeEv>
- last_sync_time = c_time;
- 800420e: 687b ldr r3, [r7, #4]
- 8004210: 68fa ldr r2, [r7, #12]
- 8004212: f8c3 2684 str.w r2, [r3, #1668] ; 0x684
- return SPIN_OK;
- 8004216: 2300 movs r3, #0
- }
- 8004218: 4618 mov r0, r3
- 800421a: 3710 adds r7, #16
- 800421c: 46bd mov sp, r7
- 800421e: bd80 pop {r7, pc}
-
-08004220 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE11getHardwareEv>:
- Hardware* getHardware()
- 8004220: b480 push {r7}
- 8004222: b083 sub sp, #12
- 8004224: af00 add r7, sp, #0
- 8004226: 6078 str r0, [r7, #4]
- return &hardware_;
- 8004228: 687b ldr r3, [r7, #4]
- 800422a: 3304 adds r3, #4
- }
- 800422c: 4618 mov r0, r3
- 800422e: 370c adds r7, #12
- 8004230: 46bd mov sp, r7
- 8004232: f85d 7b04 ldr.w r7, [sp], #4
- 8004236: 4770 bx lr
-
-08004238 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15requestSyncTimeEv>:
- void requestSyncTime()
- 8004238: b580 push {r7, lr}
- 800423a: b086 sub sp, #24
- 800423c: af00 add r7, sp, #0
- 800423e: 6078 str r0, [r7, #4]
- std_msgs::Time t;
- 8004240: f107 030c add.w r3, r7, #12
- 8004244: 4618 mov r0, r3
- 8004246: f7fc fbc1 bl 80009cc <_ZN8std_msgs4TimeC1Ev>
- publish(TopicInfo::ID_TIME, &t);
- 800424a: 687b ldr r3, [r7, #4]
- 800424c: 681b ldr r3, [r3, #0]
- 800424e: 681b ldr r3, [r3, #0]
- 8004250: f107 020c add.w r2, r7, #12
- 8004254: 210a movs r1, #10
- 8004256: 6878 ldr r0, [r7, #4]
- 8004258: 4798 blx r3
- rt_time = hardware_.time();
- 800425a: 687b ldr r3, [r7, #4]
- 800425c: 3304 adds r3, #4
- 800425e: 4618 mov r0, r3
- 8004260: f7fd fb26 bl 80018b0 <_ZN13STM32Hardware4timeEv>
- 8004264: 4602 mov r2, r0
- 8004266: 687b ldr r3, [r7, #4]
- 8004268: f8c3 2194 str.w r2, [r3, #404] ; 0x194
- }
- 800426c: bf00 nop
- 800426e: 3718 adds r7, #24
- 8004270: 46bd mov sp, r7
- 8004272: bd80 pop {r7, pc}
-
-08004274 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv>:
- }
- }
- return false;
- }
-
- void negotiateTopics()
- 8004274: b590 push {r4, r7, lr}
- 8004276: b08b sub sp, #44 ; 0x2c
- 8004278: af00 add r7, sp, #0
- 800427a: 6078 str r0, [r7, #4]
- {
- rosserial_msgs::TopicInfo ti;
- 800427c: f107 030c add.w r3, r7, #12
- 8004280: 4618 mov r0, r3
- 8004282: f7fc fc93 bl 8000bac <_ZN14rosserial_msgs9TopicInfoC1Ev>
- int i;
- for (i = 0; i < MAX_PUBLISHERS; i++)
- 8004286: 2300 movs r3, #0
- 8004288: 627b str r3, [r7, #36] ; 0x24
- 800428a: 6a7b ldr r3, [r7, #36] ; 0x24
- 800428c: 2b18 cmp r3, #24
- 800428e: dc63 bgt.n 8004358 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0xe4>
- {
- if (publishers[i] != 0) // non-empty slot
- 8004290: 687a ldr r2, [r7, #4]
- 8004292: 6a7b ldr r3, [r7, #36] ; 0x24
- 8004294: f503 73b4 add.w r3, r3, #360 ; 0x168
- 8004298: 009b lsls r3, r3, #2
- 800429a: 4413 add r3, r2
- 800429c: 685b ldr r3, [r3, #4]
- 800429e: 2b00 cmp r3, #0
- 80042a0: d056 beq.n 8004350 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0xdc>
- {
- ti.topic_id = publishers[i]->id_;
- 80042a2: 687a ldr r2, [r7, #4]
- 80042a4: 6a7b ldr r3, [r7, #36] ; 0x24
- 80042a6: f503 73b4 add.w r3, r3, #360 ; 0x168
- 80042aa: 009b lsls r3, r3, #2
- 80042ac: 4413 add r3, r2
- 80042ae: 685b ldr r3, [r3, #4]
- 80042b0: 689b ldr r3, [r3, #8]
- 80042b2: b29b uxth r3, r3
- 80042b4: 823b strh r3, [r7, #16]
- ti.topic_name = (char *) publishers[i]->topic_;
- 80042b6: 687a ldr r2, [r7, #4]
- 80042b8: 6a7b ldr r3, [r7, #36] ; 0x24
- 80042ba: f503 73b4 add.w r3, r3, #360 ; 0x168
- 80042be: 009b lsls r3, r3, #2
- 80042c0: 4413 add r3, r2
- 80042c2: 685b ldr r3, [r3, #4]
- 80042c4: 681b ldr r3, [r3, #0]
- 80042c6: 617b str r3, [r7, #20]
- ti.message_type = (char *) publishers[i]->msg_->getType();
- 80042c8: 687a ldr r2, [r7, #4]
- 80042ca: 6a7b ldr r3, [r7, #36] ; 0x24
- 80042cc: f503 73b4 add.w r3, r3, #360 ; 0x168
- 80042d0: 009b lsls r3, r3, #2
- 80042d2: 4413 add r3, r2
- 80042d4: 685b ldr r3, [r3, #4]
- 80042d6: 6859 ldr r1, [r3, #4]
- 80042d8: 687a ldr r2, [r7, #4]
- 80042da: 6a7b ldr r3, [r7, #36] ; 0x24
- 80042dc: f503 73b4 add.w r3, r3, #360 ; 0x168
- 80042e0: 009b lsls r3, r3, #2
- 80042e2: 4413 add r3, r2
- 80042e4: 685b ldr r3, [r3, #4]
- 80042e6: 685b ldr r3, [r3, #4]
- 80042e8: 681b ldr r3, [r3, #0]
- 80042ea: 3308 adds r3, #8
- 80042ec: 681b ldr r3, [r3, #0]
- 80042ee: 4608 mov r0, r1
- 80042f0: 4798 blx r3
- 80042f2: 4603 mov r3, r0
- 80042f4: 61bb str r3, [r7, #24]
- ti.md5sum = (char *) publishers[i]->msg_->getMD5();
- 80042f6: 687a ldr r2, [r7, #4]
- 80042f8: 6a7b ldr r3, [r7, #36] ; 0x24
- 80042fa: f503 73b4 add.w r3, r3, #360 ; 0x168
- 80042fe: 009b lsls r3, r3, #2
- 8004300: 4413 add r3, r2
- 8004302: 685b ldr r3, [r3, #4]
- 8004304: 6859 ldr r1, [r3, #4]
- 8004306: 687a ldr r2, [r7, #4]
- 8004308: 6a7b ldr r3, [r7, #36] ; 0x24
- 800430a: f503 73b4 add.w r3, r3, #360 ; 0x168
- 800430e: 009b lsls r3, r3, #2
- 8004310: 4413 add r3, r2
- 8004312: 685b ldr r3, [r3, #4]
- 8004314: 685b ldr r3, [r3, #4]
- 8004316: 681b ldr r3, [r3, #0]
- 8004318: 330c adds r3, #12
- 800431a: 681b ldr r3, [r3, #0]
- 800431c: 4608 mov r0, r1
- 800431e: 4798 blx r3
- 8004320: 4603 mov r3, r0
- 8004322: 61fb str r3, [r7, #28]
- ti.buffer_size = OUTPUT_SIZE;
- 8004324: f44f 7300 mov.w r3, #512 ; 0x200
- 8004328: 623b str r3, [r7, #32]
- publish(publishers[i]->getEndpointType(), &ti);
- 800432a: 687b ldr r3, [r7, #4]
- 800432c: 681b ldr r3, [r3, #0]
- 800432e: 681c ldr r4, [r3, #0]
- 8004330: 687a ldr r2, [r7, #4]
- 8004332: 6a7b ldr r3, [r7, #36] ; 0x24
- 8004334: f503 73b4 add.w r3, r3, #360 ; 0x168
- 8004338: 009b lsls r3, r3, #2
- 800433a: 4413 add r3, r2
- 800433c: 685b ldr r3, [r3, #4]
- 800433e: 4618 mov r0, r3
- 8004340: f7fd f995 bl 800166e <_ZN3ros9Publisher15getEndpointTypeEv>
- 8004344: 4601 mov r1, r0
- 8004346: f107 030c add.w r3, r7, #12
- 800434a: 461a mov r2, r3
- 800434c: 6878 ldr r0, [r7, #4]
- 800434e: 47a0 blx r4
- for (i = 0; i < MAX_PUBLISHERS; i++)
- 8004350: 6a7b ldr r3, [r7, #36] ; 0x24
- 8004352: 3301 adds r3, #1
- 8004354: 627b str r3, [r7, #36] ; 0x24
- 8004356: e798 b.n 800428a <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x16>
- }
- }
- for (i = 0; i < MAX_SUBSCRIBERS; i++)
- 8004358: 2300 movs r3, #0
- 800435a: 627b str r3, [r7, #36] ; 0x24
- 800435c: 6a7b ldr r3, [r7, #36] ; 0x24
- 800435e: 2b18 cmp r3, #24
- 8004360: dc5f bgt.n 8004422 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x1ae>
- {
- if (subscribers[i] != 0) // non-empty slot
- 8004362: 687b ldr r3, [r7, #4]
- 8004364: 6a7a ldr r2, [r7, #36] ; 0x24
- 8004366: f502 72c1 add.w r2, r2, #386 ; 0x182
- 800436a: f853 3022 ldr.w r3, [r3, r2, lsl #2]
- 800436e: 2b00 cmp r3, #0
- 8004370: d053 beq.n 800441a <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0x1a6>
- {
- ti.topic_id = subscribers[i]->id_;
- 8004372: 687b ldr r3, [r7, #4]
- 8004374: 6a7a ldr r2, [r7, #36] ; 0x24
- 8004376: f502 72c1 add.w r2, r2, #386 ; 0x182
- 800437a: f853 3022 ldr.w r3, [r3, r2, lsl #2]
- 800437e: 685b ldr r3, [r3, #4]
- 8004380: b29b uxth r3, r3
- 8004382: 823b strh r3, [r7, #16]
- ti.topic_name = (char *) subscribers[i]->topic_;
- 8004384: 687b ldr r3, [r7, #4]
- 8004386: 6a7a ldr r2, [r7, #36] ; 0x24
- 8004388: f502 72c1 add.w r2, r2, #386 ; 0x182
- 800438c: f853 3022 ldr.w r3, [r3, r2, lsl #2]
- 8004390: 689b ldr r3, [r3, #8]
- 8004392: 617b str r3, [r7, #20]
- ti.message_type = (char *) subscribers[i]->getMsgType();
- 8004394: 687b ldr r3, [r7, #4]
- 8004396: 6a7a ldr r2, [r7, #36] ; 0x24
- 8004398: f502 72c1 add.w r2, r2, #386 ; 0x182
- 800439c: f853 1022 ldr.w r1, [r3, r2, lsl #2]
- 80043a0: 687b ldr r3, [r7, #4]
- 80043a2: 6a7a ldr r2, [r7, #36] ; 0x24
- 80043a4: f502 72c1 add.w r2, r2, #386 ; 0x182
- 80043a8: f853 3022 ldr.w r3, [r3, r2, lsl #2]
- 80043ac: 681b ldr r3, [r3, #0]
- 80043ae: 3308 adds r3, #8
- 80043b0: 681b ldr r3, [r3, #0]
- 80043b2: 4608 mov r0, r1
- 80043b4: 4798 blx r3
- 80043b6: 4603 mov r3, r0
- 80043b8: 61bb str r3, [r7, #24]
- ti.md5sum = (char *) subscribers[i]->getMsgMD5();
- 80043ba: 687b ldr r3, [r7, #4]
- 80043bc: 6a7a ldr r2, [r7, #36] ; 0x24
- 80043be: f502 72c1 add.w r2, r2, #386 ; 0x182
- 80043c2: f853 1022 ldr.w r1, [r3, r2, lsl #2]
- 80043c6: 687b ldr r3, [r7, #4]
- 80043c8: 6a7a ldr r2, [r7, #36] ; 0x24
- 80043ca: f502 72c1 add.w r2, r2, #386 ; 0x182
- 80043ce: f853 3022 ldr.w r3, [r3, r2, lsl #2]
- 80043d2: 681b ldr r3, [r3, #0]
- 80043d4: 330c adds r3, #12
- 80043d6: 681b ldr r3, [r3, #0]
- 80043d8: 4608 mov r0, r1
- 80043da: 4798 blx r3
- 80043dc: 4603 mov r3, r0
- 80043de: 61fb str r3, [r7, #28]
- ti.buffer_size = INPUT_SIZE;
- 80043e0: f44f 7300 mov.w r3, #512 ; 0x200
- 80043e4: 623b str r3, [r7, #32]
- publish(subscribers[i]->getEndpointType(), &ti);
- 80043e6: 687b ldr r3, [r7, #4]
- 80043e8: 681b ldr r3, [r3, #0]
- 80043ea: 681c ldr r4, [r3, #0]
- 80043ec: 687b ldr r3, [r7, #4]
- 80043ee: 6a7a ldr r2, [r7, #36] ; 0x24
- 80043f0: f502 72c1 add.w r2, r2, #386 ; 0x182
- 80043f4: f853 1022 ldr.w r1, [r3, r2, lsl #2]
- 80043f8: 687b ldr r3, [r7, #4]
- 80043fa: 6a7a ldr r2, [r7, #36] ; 0x24
- 80043fc: f502 72c1 add.w r2, r2, #386 ; 0x182
- 8004400: f853 3022 ldr.w r3, [r3, r2, lsl #2]
- 8004404: 681b ldr r3, [r3, #0]
- 8004406: 3304 adds r3, #4
- 8004408: 681b ldr r3, [r3, #0]
- 800440a: 4608 mov r0, r1
- 800440c: 4798 blx r3
- 800440e: 4601 mov r1, r0
- 8004410: f107 030c add.w r3, r7, #12
- 8004414: 461a mov r2, r3
- 8004416: 6878 ldr r0, [r7, #4]
- 8004418: 47a0 blx r4
- for (i = 0; i < MAX_SUBSCRIBERS; i++)
- 800441a: 6a7b ldr r3, [r7, #36] ; 0x24
- 800441c: 3301 adds r3, #1
- 800441e: 627b str r3, [r7, #36] ; 0x24
- 8004420: e79c b.n 800435c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE15negotiateTopicsEv+0xe8>
- }
- }
- configured_ = true;
- 8004422: 687b ldr r3, [r7, #4]
- 8004424: 2201 movs r2, #1
- 8004426: f883 2680 strb.w r2, [r3, #1664] ; 0x680
- }
- 800442a: bf00 nop
- 800442c: 372c adds r7, #44 ; 0x2c
- 800442e: 46bd mov sp, r7
- 8004430: bd90 pop {r4, r7, pc}
- ...
-
-08004434 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8syncTimeEPh>:
- void syncTime(uint8_t * data)
- 8004434: b580 push {r7, lr}
- 8004436: b086 sub sp, #24
- 8004438: af00 add r7, sp, #0
- 800443a: 6078 str r0, [r7, #4]
- 800443c: 6039 str r1, [r7, #0]
- std_msgs::Time t;
- 800443e: f107 0308 add.w r3, r7, #8
- 8004442: 4618 mov r0, r3
- 8004444: f7fc fac2 bl 80009cc <_ZN8std_msgs4TimeC1Ev>
- uint32_t offset = hardware_.time() - rt_time;
- 8004448: 687b ldr r3, [r7, #4]
- 800444a: 3304 adds r3, #4
- 800444c: 4618 mov r0, r3
- 800444e: f7fd fa2f bl 80018b0 <_ZN13STM32Hardware4timeEv>
- 8004452: 4602 mov r2, r0
- 8004454: 687b ldr r3, [r7, #4]
- 8004456: f8d3 3194 ldr.w r3, [r3, #404] ; 0x194
- 800445a: 1ad3 subs r3, r2, r3
- 800445c: 617b str r3, [r7, #20]
- t.deserialize(data);
- 800445e: f107 0308 add.w r3, r7, #8
- 8004462: 6839 ldr r1, [r7, #0]
- 8004464: 4618 mov r0, r3
- 8004466: f7fc fb21 bl 8000aac <_ZN8std_msgs4Time11deserializeEPh>
- t.data.sec += offset / 1000;
- 800446a: 68fa ldr r2, [r7, #12]
- 800446c: 697b ldr r3, [r7, #20]
- 800446e: 4915 ldr r1, [pc, #84] ; (80044c4 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8syncTimeEPh+0x90>)
- 8004470: fba1 1303 umull r1, r3, r1, r3
- 8004474: 099b lsrs r3, r3, #6
- 8004476: 4413 add r3, r2
- 8004478: 60fb str r3, [r7, #12]
- t.data.nsec += (offset % 1000) * 1000000UL;
- 800447a: 6939 ldr r1, [r7, #16]
- 800447c: 697a ldr r2, [r7, #20]
- 800447e: 4b11 ldr r3, [pc, #68] ; (80044c4 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8syncTimeEPh+0x90>)
- 8004480: fba3 0302 umull r0, r3, r3, r2
- 8004484: 099b lsrs r3, r3, #6
- 8004486: f44f 707a mov.w r0, #1000 ; 0x3e8
- 800448a: fb00 f303 mul.w r3, r0, r3
- 800448e: 1ad3 subs r3, r2, r3
- 8004490: 4a0d ldr r2, [pc, #52] ; (80044c8 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8syncTimeEPh+0x94>)
- 8004492: fb02 f303 mul.w r3, r2, r3
- 8004496: 440b add r3, r1
- 8004498: 613b str r3, [r7, #16]
- this->setNow(t.data);
- 800449a: f107 0308 add.w r3, r7, #8
- 800449e: 3304 adds r3, #4
- 80044a0: 4619 mov r1, r3
- 80044a2: 6878 ldr r0, [r7, #4]
- 80044a4: f000 f8a4 bl 80045f0 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE6setNowERNS_4TimeE>
- last_sync_receive_time = hardware_.time();
- 80044a8: 687b ldr r3, [r7, #4]
- 80044aa: 3304 adds r3, #4
- 80044ac: 4618 mov r0, r3
- 80044ae: f7fd f9ff bl 80018b0 <_ZN13STM32Hardware4timeEv>
- 80044b2: 4602 mov r2, r0
- 80044b4: 687b ldr r3, [r7, #4]
- 80044b6: f8c3 2688 str.w r2, [r3, #1672] ; 0x688
- }
- 80044ba: bf00 nop
- 80044bc: 3718 adds r7, #24
- 80044be: 46bd mov sp, r7
- 80044c0: bd80 pop {r7, pc}
- 80044c2: bf00 nop
- 80044c4: 10624dd3 .word 0x10624dd3
- 80044c8: 000f4240 .word 0x000f4240
-
-080044cc <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE>:
-
- virtual int publish(int id, const Msg * msg)
- 80044cc: b580 push {r7, lr}
- 80044ce: b088 sub sp, #32
- 80044d0: af00 add r7, sp, #0
- 80044d2: 60f8 str r0, [r7, #12]
- 80044d4: 60b9 str r1, [r7, #8]
- 80044d6: 607a str r2, [r7, #4]
- {
- if (id >= 100 && !configured_)
- 80044d8: 68bb ldr r3, [r7, #8]
- 80044da: 2b63 cmp r3, #99 ; 0x63
- 80044dc: dd09 ble.n 80044f2 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x26>
- 80044de: 68fb ldr r3, [r7, #12]
- 80044e0: f893 3680 ldrb.w r3, [r3, #1664] ; 0x680
- 80044e4: f083 0301 eor.w r3, r3, #1
- 80044e8: b2db uxtb r3, r3
- 80044ea: 2b00 cmp r3, #0
- 80044ec: d001 beq.n 80044f2 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x26>
- return 0;
- 80044ee: 2300 movs r3, #0
- 80044f0: e077 b.n 80045e2 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x116>
-
- /* serialize message */
- int l = msg->serialize(message_out + 7);
- 80044f2: 687b ldr r3, [r7, #4]
- 80044f4: 681b ldr r3, [r3, #0]
- 80044f6: 681b ldr r3, [r3, #0]
- 80044f8: 68fa ldr r2, [r7, #12]
- 80044fa: f502 7269 add.w r2, r2, #932 ; 0x3a4
- 80044fe: 3207 adds r2, #7
- 8004500: 4611 mov r1, r2
- 8004502: 6878 ldr r0, [r7, #4]
- 8004504: 4798 blx r3
- 8004506: 6178 str r0, [r7, #20]
-
- /* setup the header */
- message_out[0] = 0xff;
- 8004508: 68fb ldr r3, [r7, #12]
- 800450a: 22ff movs r2, #255 ; 0xff
- 800450c: f883 23a4 strb.w r2, [r3, #932] ; 0x3a4
- message_out[1] = PROTOCOL_VER;
- 8004510: 68fb ldr r3, [r7, #12]
- 8004512: 22fe movs r2, #254 ; 0xfe
- 8004514: f883 23a5 strb.w r2, [r3, #933] ; 0x3a5
- message_out[2] = (uint8_t)((uint16_t)l & 255);
- 8004518: 697b ldr r3, [r7, #20]
- 800451a: b2da uxtb r2, r3
- 800451c: 68fb ldr r3, [r7, #12]
- 800451e: f883 23a6 strb.w r2, [r3, #934] ; 0x3a6
- message_out[3] = (uint8_t)((uint16_t)l >> 8);
- 8004522: 697b ldr r3, [r7, #20]
- 8004524: b29b uxth r3, r3
- 8004526: 121b asrs r3, r3, #8
- 8004528: b2da uxtb r2, r3
- 800452a: 68fb ldr r3, [r7, #12]
- 800452c: f883 23a7 strb.w r2, [r3, #935] ; 0x3a7
- message_out[4] = 255 - ((message_out[2] + message_out[3]) % 256);
- 8004530: 68fb ldr r3, [r7, #12]
- 8004532: f893 23a6 ldrb.w r2, [r3, #934] ; 0x3a6
- 8004536: 68fb ldr r3, [r7, #12]
- 8004538: f893 33a7 ldrb.w r3, [r3, #935] ; 0x3a7
- 800453c: 4413 add r3, r2
- 800453e: b2db uxtb r3, r3
- 8004540: 43db mvns r3, r3
- 8004542: b2da uxtb r2, r3
- 8004544: 68fb ldr r3, [r7, #12]
- 8004546: f883 23a8 strb.w r2, [r3, #936] ; 0x3a8
- message_out[5] = (uint8_t)((int16_t)id & 255);
- 800454a: 68bb ldr r3, [r7, #8]
- 800454c: b2da uxtb r2, r3
- 800454e: 68fb ldr r3, [r7, #12]
- 8004550: f883 23a9 strb.w r2, [r3, #937] ; 0x3a9
- message_out[6] = (uint8_t)((int16_t)id >> 8);
- 8004554: 68bb ldr r3, [r7, #8]
- 8004556: b21b sxth r3, r3
- 8004558: 121b asrs r3, r3, #8
- 800455a: b2da uxtb r2, r3
- 800455c: 68fb ldr r3, [r7, #12]
- 800455e: f883 23aa strb.w r2, [r3, #938] ; 0x3aa
-
- /* calculate checksum */
- int chk = 0;
- 8004562: 2300 movs r3, #0
- 8004564: 61fb str r3, [r7, #28]
- for (int i = 5; i < l + 7; i++)
- 8004566: 2305 movs r3, #5
- 8004568: 61bb str r3, [r7, #24]
- 800456a: 697b ldr r3, [r7, #20]
- 800456c: 3307 adds r3, #7
- 800456e: 69ba ldr r2, [r7, #24]
- 8004570: 429a cmp r2, r3
- 8004572: da0d bge.n 8004590 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0xc4>
- chk += message_out[i];
- 8004574: 68fa ldr r2, [r7, #12]
- 8004576: 69bb ldr r3, [r7, #24]
- 8004578: 4413 add r3, r2
- 800457a: f503 7369 add.w r3, r3, #932 ; 0x3a4
- 800457e: 781b ldrb r3, [r3, #0]
- 8004580: 461a mov r2, r3
- 8004582: 69fb ldr r3, [r7, #28]
- 8004584: 4413 add r3, r2
- 8004586: 61fb str r3, [r7, #28]
- for (int i = 5; i < l + 7; i++)
- 8004588: 69bb ldr r3, [r7, #24]
- 800458a: 3301 adds r3, #1
- 800458c: 61bb str r3, [r7, #24]
- 800458e: e7ec b.n 800456a <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x9e>
- l += 7;
- 8004590: 697b ldr r3, [r7, #20]
- 8004592: 3307 adds r3, #7
- 8004594: 617b str r3, [r7, #20]
- message_out[l++] = 255 - (chk % 256);
- 8004596: 69fb ldr r3, [r7, #28]
- 8004598: 425a negs r2, r3
- 800459a: b2db uxtb r3, r3
- 800459c: b2d2 uxtb r2, r2
- 800459e: bf58 it pl
- 80045a0: 4253 negpl r3, r2
- 80045a2: b2da uxtb r2, r3
- 80045a4: 697b ldr r3, [r7, #20]
- 80045a6: 1c59 adds r1, r3, #1
- 80045a8: 6179 str r1, [r7, #20]
- 80045aa: 43d2 mvns r2, r2
- 80045ac: b2d1 uxtb r1, r2
- 80045ae: 68fa ldr r2, [r7, #12]
- 80045b0: 4413 add r3, r2
- 80045b2: 460a mov r2, r1
- 80045b4: f883 23a4 strb.w r2, [r3, #932] ; 0x3a4
-
- if (l <= OUTPUT_SIZE)
- 80045b8: 697b ldr r3, [r7, #20]
- 80045ba: f5b3 7f00 cmp.w r3, #512 ; 0x200
- 80045be: dc0a bgt.n 80045d6 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x10a>
- {
- hardware_.write(message_out, l);
- 80045c0: 68fb ldr r3, [r7, #12]
- 80045c2: 1d18 adds r0, r3, #4
- 80045c4: 68fb ldr r3, [r7, #12]
- 80045c6: f503 7369 add.w r3, r3, #932 ; 0x3a4
- 80045ca: 697a ldr r2, [r7, #20]
- 80045cc: 4619 mov r1, r3
- 80045ce: f7fd f92b bl 8001828 <_ZN13STM32Hardware5writeEPhi>
- return l;
- 80045d2: 697b ldr r3, [r7, #20]
- 80045d4: e005 b.n 80045e2 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x116>
- }
- else
- {
- logerror("Message from device dropped: message larger than buffer.");
- 80045d6: 4905 ldr r1, [pc, #20] ; (80045ec <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE7publishEiPKNS_3MsgE+0x120>)
- 80045d8: 68f8 ldr r0, [r7, #12]
- 80045da: f000 f849 bl 8004670 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8logerrorEPKc>
- return -1;
- 80045de: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff
- }
- }
- 80045e2: 4618 mov r0, r3
- 80045e4: 3720 adds r7, #32
- 80045e6: 46bd mov sp, r7
- 80045e8: bd80 pop {r7, pc}
- 80045ea: bf00 nop
- 80045ec: 0800af0c .word 0x0800af0c
-
-080045f0 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE6setNowERNS_4TimeE>:
- void setNow(Time & new_now)
- 80045f0: b580 push {r7, lr}
- 80045f2: b084 sub sp, #16
- 80045f4: af00 add r7, sp, #0
- 80045f6: 6078 str r0, [r7, #4]
- 80045f8: 6039 str r1, [r7, #0]
- uint32_t ms = hardware_.time();
- 80045fa: 687b ldr r3, [r7, #4]
- 80045fc: 3304 adds r3, #4
- 80045fe: 4618 mov r0, r3
- 8004600: f7fd f956 bl 80018b0 <_ZN13STM32Hardware4timeEv>
- 8004604: 60f8 str r0, [r7, #12]
- sec_offset = new_now.sec - ms / 1000 - 1;
- 8004606: 683b ldr r3, [r7, #0]
- 8004608: 681a ldr r2, [r3, #0]
- 800460a: 68fb ldr r3, [r7, #12]
- 800460c: 4915 ldr r1, [pc, #84] ; (8004664 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE6setNowERNS_4TimeE+0x74>)
- 800460e: fba1 1303 umull r1, r3, r1, r3
- 8004612: 099b lsrs r3, r3, #6
- 8004614: 1ad3 subs r3, r2, r3
- 8004616: 1e5a subs r2, r3, #1
- 8004618: 687b ldr r3, [r7, #4]
- 800461a: f8c3 2198 str.w r2, [r3, #408] ; 0x198
- nsec_offset = new_now.nsec - (ms % 1000) * 1000000UL + 1000000000UL;
- 800461e: 683b ldr r3, [r7, #0]
- 8004620: 6859 ldr r1, [r3, #4]
- 8004622: 68fa ldr r2, [r7, #12]
- 8004624: 4b0f ldr r3, [pc, #60] ; (8004664 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE6setNowERNS_4TimeE+0x74>)
- 8004626: fba3 0302 umull r0, r3, r3, r2
- 800462a: 099b lsrs r3, r3, #6
- 800462c: f44f 707a mov.w r0, #1000 ; 0x3e8
- 8004630: fb00 f303 mul.w r3, r0, r3
- 8004634: 1ad3 subs r3, r2, r3
- 8004636: 4a0c ldr r2, [pc, #48] ; (8004668 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE6setNowERNS_4TimeE+0x78>)
- 8004638: fb02 f303 mul.w r3, r2, r3
- 800463c: 1aca subs r2, r1, r3
- 800463e: 4b0b ldr r3, [pc, #44] ; (800466c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE6setNowERNS_4TimeE+0x7c>)
- 8004640: 4413 add r3, r2
- 8004642: 687a ldr r2, [r7, #4]
- 8004644: f8c2 319c str.w r3, [r2, #412] ; 0x19c
- normalizeSecNSec(sec_offset, nsec_offset);
- 8004648: 687b ldr r3, [r7, #4]
- 800464a: f503 72cc add.w r2, r3, #408 ; 0x198
- 800464e: 687b ldr r3, [r7, #4]
- 8004650: f503 73ce add.w r3, r3, #412 ; 0x19c
- 8004654: 4619 mov r1, r3
- 8004656: 4610 mov r0, r2
- 8004658: f000 fd8c bl 8005174 <_ZN3ros16normalizeSecNSecERmS0_>
- }
- 800465c: bf00 nop
- 800465e: 3710 adds r7, #16
- 8004660: 46bd mov sp, r7
- 8004662: bd80 pop {r7, pc}
- 8004664: 10624dd3 .word 0x10624dd3
- 8004668: 000f4240 .word 0x000f4240
- 800466c: 3b9aca00 .word 0x3b9aca00
-
-08004670 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE8logerrorEPKc>:
- }
- void logwarn(const char *msg)
- {
- log(rosserial_msgs::Log::WARN, msg);
- }
- void logerror(const char*msg)
- 8004670: b580 push {r7, lr}
- 8004672: b082 sub sp, #8
- 8004674: af00 add r7, sp, #0
- 8004676: 6078 str r0, [r7, #4]
- 8004678: 6039 str r1, [r7, #0]
- {
- log(rosserial_msgs::Log::ERROR, msg);
- 800467a: 683a ldr r2, [r7, #0]
- 800467c: 2103 movs r1, #3
- 800467e: 6878 ldr r0, [r7, #4]
- 8004680: f000 f804 bl 800468c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE3logEcPKc>
- }
- 8004684: bf00 nop
- 8004686: 3708 adds r7, #8
- 8004688: 46bd mov sp, r7
- 800468a: bd80 pop {r7, pc}
-
-0800468c <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE3logEcPKc>:
- void log(char byte, const char * msg)
- 800468c: b580 push {r7, lr}
- 800468e: b088 sub sp, #32
- 8004690: af00 add r7, sp, #0
- 8004692: 60f8 str r0, [r7, #12]
- 8004694: 460b mov r3, r1
- 8004696: 607a str r2, [r7, #4]
- 8004698: 72fb strb r3, [r7, #11]
- rosserial_msgs::Log l;
- 800469a: f107 0314 add.w r3, r7, #20
- 800469e: 4618 mov r0, r3
- 80046a0: f7fc fc48 bl 8000f34 <_ZN14rosserial_msgs3LogC1Ev>
- l.level = byte;
- 80046a4: 7afb ldrb r3, [r7, #11]
- 80046a6: 763b strb r3, [r7, #24]
- l.msg = (char*)msg;
- 80046a8: 687b ldr r3, [r7, #4]
- 80046aa: 61fb str r3, [r7, #28]
- publish(rosserial_msgs::TopicInfo::ID_LOG, &l);
- 80046ac: 68fb ldr r3, [r7, #12]
- 80046ae: 681b ldr r3, [r3, #0]
- 80046b0: 681b ldr r3, [r3, #0]
- 80046b2: f107 0214 add.w r2, r7, #20
- 80046b6: 2107 movs r1, #7
- 80046b8: 68f8 ldr r0, [r7, #12]
- 80046ba: 4798 blx r3
- }
- 80046bc: bf00 nop
- 80046be: 3720 adds r7, #32
- 80046c0: 46bd mov sp, r7
- 80046c2: bd80 pop {r7, pc}
-
-080046c4 <_Z41__static_initialization_and_destruction_0ii>:
- 80046c4: b5f0 push {r4, r5, r6, r7, lr}
- 80046c6: b08f sub sp, #60 ; 0x3c
- 80046c8: af0c add r7, sp, #48 ; 0x30
- 80046ca: 6078 str r0, [r7, #4]
- 80046cc: 6039 str r1, [r7, #0]
- 80046ce: 687b ldr r3, [r7, #4]
- 80046d0: 2b01 cmp r3, #1
- 80046d2: d13f bne.n 8004754 <_Z41__static_initialization_and_destruction_0ii+0x90>
- 80046d4: 683b ldr r3, [r7, #0]
- 80046d6: f64f 72ff movw r2, #65535 ; 0xffff
- 80046da: 4293 cmp r3, r2
- 80046dc: d13a bne.n 8004754 <_Z41__static_initialization_and_destruction_0ii+0x90>
-Encoder left_encoder = Encoder(&htim5);
- 80046de: 491f ldr r1, [pc, #124] ; (800475c <_Z41__static_initialization_and_destruction_0ii+0x98>)
- 80046e0: 481f ldr r0, [pc, #124] ; (8004760 <_Z41__static_initialization_and_destruction_0ii+0x9c>)
- 80046e2: f7fb ff59 bl 8000598 <_ZN7EncoderC1EP17TIM_HandleTypeDef>
-Encoder right_encoder = Encoder(&htim2);
- 80046e6: 491f ldr r1, [pc, #124] ; (8004764 <_Z41__static_initialization_and_destruction_0ii+0xa0>)
- 80046e8: 481f ldr r0, [pc, #124] ; (8004768 <_Z41__static_initialization_and_destruction_0ii+0xa4>)
- 80046ea: f7fb ff55 bl 8000598 <_ZN7EncoderC1EP17TIM_HandleTypeDef>
-OdometryCalc odom = OdometryCalc(left_encoder, right_encoder);
- 80046ee: 4e1c ldr r6, [pc, #112] ; (8004760 <_Z41__static_initialization_and_destruction_0ii+0x9c>)
- 80046f0: 4b1d ldr r3, [pc, #116] ; (8004768 <_Z41__static_initialization_and_destruction_0ii+0xa4>)
- 80046f2: ac04 add r4, sp, #16
- 80046f4: 461d mov r5, r3
- 80046f6: cd0f ldmia r5!, {r0, r1, r2, r3}
- 80046f8: c40f stmia r4!, {r0, r1, r2, r3}
- 80046fa: e895 0007 ldmia.w r5, {r0, r1, r2}
- 80046fe: e884 0007 stmia.w r4, {r0, r1, r2}
- 8004702: 466c mov r4, sp
- 8004704: f106 030c add.w r3, r6, #12
- 8004708: cb0f ldmia r3, {r0, r1, r2, r3}
- 800470a: e884 000f stmia.w r4, {r0, r1, r2, r3}
- 800470e: e896 000e ldmia.w r6, {r1, r2, r3}
- 8004712: 4816 ldr r0, [pc, #88] ; (800476c <_Z41__static_initialization_and_destruction_0ii+0xa8>)
- 8004714: f7fe fa78 bl 8002c08 <_ZN12OdometryCalcC1E7EncoderS0_>
-ros::NodeHandle nh;
- 8004718: 4815 ldr r0, [pc, #84] ; (8004770 <_Z41__static_initialization_and_destruction_0ii+0xac>)
- 800471a: f7ff facb bl 8003cb4 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EEC1Ev>
-std_msgs::String str_msg;
- 800471e: 4815 ldr r0, [pc, #84] ; (8004774 <_Z41__static_initialization_and_destruction_0ii+0xb0>)
- 8004720: f7fc f8a6 bl 8000870 <_ZN8std_msgs6StringC1Ev>
-ros::Publisher chatter("chatter", &str_msg);
- 8004724: 2300 movs r3, #0
- 8004726: 4a13 ldr r2, [pc, #76] ; (8004774 <_Z41__static_initialization_and_destruction_0ii+0xb0>)
- 8004728: 4913 ldr r1, [pc, #76] ; (8004778 <_Z41__static_initialization_and_destruction_0ii+0xb4>)
- 800472a: 4814 ldr r0, [pc, #80] ; (800477c <_Z41__static_initialization_and_destruction_0ii+0xb8>)
- 800472c: f7fc ff74 bl 8001618 <_ZN3ros9PublisherC1EPKcPNS_3MsgEi>
-nav_msgs::Odometry odometry;
- 8004730: 4813 ldr r0, [pc, #76] ; (8004780 <_Z41__static_initialization_and_destruction_0ii+0xbc>)
- 8004732: f7fe f973 bl 8002a1c <_ZN8nav_msgs8OdometryC1Ev>
-sensor_msgs::Imu imu;
- 8004736: 4813 ldr r0, [pc, #76] ; (8004784 <_Z41__static_initialization_and_destruction_0ii+0xc0>)
- 8004738: f7fe fad6 bl 8002ce8 <_ZN11sensor_msgs3ImuC1Ev>
-ros::Publisher odom_pub("odom", &imu);
- 800473c: 2300 movs r3, #0
- 800473e: 4a11 ldr r2, [pc, #68] ; (8004784 <_Z41__static_initialization_and_destruction_0ii+0xc0>)
- 8004740: 4911 ldr r1, [pc, #68] ; (8004788 <_Z41__static_initialization_and_destruction_0ii+0xc4>)
- 8004742: 4812 ldr r0, [pc, #72] ; (800478c <_Z41__static_initialization_and_destruction_0ii+0xc8>)
- 8004744: f7fc ff68 bl 8001618 <_ZN3ros9PublisherC1EPKcPNS_3MsgEi>
-tf::TransformBroadcaster br;
- 8004748: 4811 ldr r0, [pc, #68] ; (8004790 <_Z41__static_initialization_and_destruction_0ii+0xcc>)
- 800474a: f7fd fe17 bl 800237c <_ZN2tf20TransformBroadcasterC1Ev>
-geometry_msgs::TransformStamped odom_trans;
- 800474e: 4811 ldr r0, [pc, #68] ; (8004794 <_Z41__static_initialization_and_destruction_0ii+0xd0>)
- 8004750: f7fd fc3c bl 8001fcc <_ZN13geometry_msgs16TransformStampedC1Ev>
-}
- 8004754: bf00 nop
- 8004756: 370c adds r7, #12
- 8004758: 46bd mov sp, r7
- 800475a: bdf0 pop {r4, r5, r6, r7, pc}
- 800475c: 20000164 .word 0x20000164
- 8004760: 20000424 .word 0x20000424
- 8004764: 200000a4 .word 0x200000a4
- 8004768: 20000440 .word 0x20000440
- 800476c: 2000045c .word 0x2000045c
- 8004770: 20000634 .word 0x20000634
- 8004774: 20000cf0 .word 0x20000cf0
- 8004778: 0800af48 .word 0x0800af48
- 800477c: 20000cf8 .word 0x20000cf8
- 8004780: 20000d0c .word 0x20000d0c
- 8004784: 20000e9c .word 0x20000e9c
- 8004788: 0800aec4 .word 0x0800aec4
- 800478c: 20000f54 .word 0x20000f54
- 8004790: 20000f68 .word 0x20000f68
- 8004794: 20000fcc .word 0x20000fcc
-
-08004798 <_ZN3ros11NodeHandle_I13STM32HardwareLi25ELi25ELi512ELi512EE9connectedEv>:
- virtual bool connected()
- 8004798: b480 push {r7}
- 800479a: b083 sub sp, #12
- 800479c: af00 add r7, sp, #0
- 800479e: 6078 str r0, [r7, #4]
- return configured_;
- 80047a0: 687b ldr r3, [r7, #4]
- 80047a2: f893 3680 ldrb.w r3, [r3, #1664] ; 0x680
- };
- 80047a6: 4618 mov r0, r3
- 80047a8: 370c adds r7, #12
- 80047aa: 46bd mov sp, r7
- 80047ac: f85d 7b04 ldr.w r7, [sp], #4
- 80047b0: 4770 bx lr
-
-080047b2 <_GLOBAL__sub_I_htim2>:
- 80047b2: b580 push {r7, lr}
- 80047b4: af00 add r7, sp, #0
- 80047b6: f64f 71ff movw r1, #65535 ; 0xffff
- 80047ba: 2001 movs r0, #1
- 80047bc: f7ff ff82 bl 80046c4 <_Z41__static_initialization_and_destruction_0ii>
- 80047c0: bd80 pop {r7, pc}
-
-080047c2 <_ZSt3cosf>:
- using ::cos;
-
-#ifndef __CORRECT_ISO_CPP_MATH_H_PROTO
- inline _GLIBCXX_CONSTEXPR float
- cos(float __x)
- { return __builtin_cosf(__x); }
- 80047c2: b580 push {r7, lr}
- 80047c4: b082 sub sp, #8
- 80047c6: af00 add r7, sp, #0
- 80047c8: ed87 0a01 vstr s0, [r7, #4]
- 80047cc: ed97 0a01 vldr s0, [r7, #4]
- 80047d0: f004 fcda bl 8009188 <cosf>
- 80047d4: eef0 7a40 vmov.f32 s15, s0
- 80047d8: eeb0 0a67 vmov.f32 s0, s15
- 80047dc: 3708 adds r7, #8
- 80047de: 46bd mov sp, r7
- 80047e0: bd80 pop {r7, pc}
-
-080047e2 <_ZSt3sinf>:
- using ::sin;
-
-#ifndef __CORRECT_ISO_CPP_MATH_H_PROTO
- inline _GLIBCXX_CONSTEXPR float
- sin(float __x)
- { return __builtin_sinf(__x); }
- 80047e2: b580 push {r7, lr}
- 80047e4: b082 sub sp, #8
- 80047e6: af00 add r7, sp, #0
- 80047e8: ed87 0a01 vstr s0, [r7, #4]
- 80047ec: ed97 0a01 vldr s0, [r7, #4]
- 80047f0: f004 fd0a bl 8009208 <sinf>
- 80047f4: eef0 7a40 vmov.f32 s15, s0
- 80047f8: eeb0 0a67 vmov.f32 s0, s15
- 80047fc: 3708 adds r7, #8
- 80047fe: 46bd mov sp, r7
- 8004800: bd80 pop {r7, pc}
-
-08004802 <_ZN2tfL23createQuaternionFromYawEd>:
-
-namespace tf
-{
-
-static inline geometry_msgs::Quaternion createQuaternionFromYaw(double yaw)
-{
- 8004802: b580 push {r7, lr}
- 8004804: b084 sub sp, #16
- 8004806: af00 add r7, sp, #0
- 8004808: 60f8 str r0, [r7, #12]
- 800480a: ed87 0b00 vstr d0, [r7]
- geometry_msgs::Quaternion q;
- 800480e: 68f8 ldr r0, [r7, #12]
- 8004810: f7fd fa94 bl 8001d3c <_ZN13geometry_msgs10QuaternionC1Ev>
- q.x = 0;
- 8004814: 68fb ldr r3, [r7, #12]
- 8004816: f04f 0200 mov.w r2, #0
- 800481a: 605a str r2, [r3, #4]
- q.y = 0;
- 800481c: 68fb ldr r3, [r7, #12]
- 800481e: f04f 0200 mov.w r2, #0
- 8004822: 609a str r2, [r3, #8]
- q.z = sin(yaw * 0.5);
- 8004824: ed97 7b00 vldr d7, [r7]
- 8004828: eeb6 6b00 vmov.f64 d6, #96 ; 0x3f000000 0.5
- 800482c: ee27 7b06 vmul.f64 d7, d7, d6
- 8004830: eeb0 0b47 vmov.f64 d0, d7
- 8004834: f004 fc6c bl 8009110 <sin>
- 8004838: eeb0 7b40 vmov.f64 d7, d0
- 800483c: eef7 7bc7 vcvt.f32.f64 s15, d7
- 8004840: 68fb ldr r3, [r7, #12]
- 8004842: edc3 7a03 vstr s15, [r3, #12]
- q.w = cos(yaw * 0.5);
- 8004846: ed97 7b00 vldr d7, [r7]
- 800484a: eeb6 6b00 vmov.f64 d6, #96 ; 0x3f000000 0.5
- 800484e: ee27 7b06 vmul.f64 d7, d7, d6
- 8004852: eeb0 0b47 vmov.f64 d0, d7
- 8004856: f004 fc1f bl 8009098 <cos>
- 800485a: eeb0 7b40 vmov.f64 d7, d0
- 800485e: eef7 7bc7 vcvt.f32.f64 s15, d7
- 8004862: 68fb ldr r3, [r7, #12]
- 8004864: edc3 7a04 vstr s15, [r3, #16]
- return q;
- 8004868: bf00 nop
-}
- 800486a: 68f8 ldr r0, [r7, #12]
- 800486c: 3710 adds r7, #16
- 800486e: 46bd mov sp, r7
- 8004870: bd80 pop {r7, pc}
-
-08004872 <_ZN12OdometryCalc21OdometryUpdateMessageEv>:
-#include "odometry_calc.h"
-
-void OdometryCalc::OdometryUpdateMessage(){
- 8004872: b580 push {r7, lr}
- 8004874: ed2d 8b02 vpush {d8}
- 8004878: b094 sub sp, #80 ; 0x50
- 800487a: af00 add r7, sp, #0
- 800487c: 6078 str r0, [r7, #4]
- float left_velocity = left_encoder_.GetLinearVelocity();
- 800487e: 687b ldr r3, [r7, #4]
- 8004880: 4618 mov r0, r3
- 8004882: f7fb fedb bl 800063c <_ZN7Encoder17GetLinearVelocityEv>
- 8004886: ed87 0a12 vstr s0, [r7, #72] ; 0x48
- float right_velocity = right_encoder_.GetLinearVelocity();
- 800488a: 687b ldr r3, [r7, #4]
- 800488c: 331c adds r3, #28
- 800488e: 4618 mov r0, r3
- 8004890: f7fb fed4 bl 800063c <_ZN7Encoder17GetLinearVelocityEv>
- 8004894: ed87 0a11 vstr s0, [r7, #68] ; 0x44
-
- float x = odometry_.pose.pose.position.x;
- 8004898: 687b ldr r3, [r7, #4]
- 800489a: 6e5b ldr r3, [r3, #100] ; 0x64
- 800489c: 643b str r3, [r7, #64] ; 0x40
- float y = odometry_.pose.pose.position.y;
- 800489e: 687b ldr r3, [r7, #4]
- 80048a0: 6e9b ldr r3, [r3, #104] ; 0x68
- 80048a2: 63fb str r3, [r7, #60] ; 0x3c
-
- //verificato che delta_r == delta_l
- float delta_time = left_encoder_.current_millis_ -
- 80048a4: 687b ldr r3, [r7, #4]
- 80048a6: 689a ldr r2, [r3, #8]
- left_encoder_.previous_millis_;
- 80048a8: 687b ldr r3, [r7, #4]
- 80048aa: 685b ldr r3, [r3, #4]
- float delta_time = left_encoder_.current_millis_ -
- 80048ac: 1ad3 subs r3, r2, r3
- 80048ae: ee07 3a90 vmov s15, r3
- 80048b2: eef8 7a67 vcvt.f32.u32 s15, s15
- 80048b6: edc7 7a0e vstr s15, [r7, #56] ; 0x38
-
- // calcoli vari
- float linear_velocity = (left_velocity + right_velocity) / 2;
- 80048ba: ed97 7a12 vldr s14, [r7, #72] ; 0x48
- 80048be: edd7 7a11 vldr s15, [r7, #68] ; 0x44
- 80048c2: ee37 7a27 vadd.f32 s14, s14, s15
- 80048c6: eef0 6a00 vmov.f32 s13, #0 ; 0x40000000 2.0
- 80048ca: eec7 7a26 vdiv.f32 s15, s14, s13
- 80048ce: edc7 7a0d vstr s15, [r7, #52] ; 0x34
- float angular_velocity;
- if (right_velocity - left_velocity == 0)
- 80048d2: ed97 7a11 vldr s14, [r7, #68] ; 0x44
- 80048d6: edd7 7a12 vldr s15, [r7, #72] ; 0x48
- 80048da: ee77 7a67 vsub.f32 s15, s14, s15
- 80048de: eef5 7a40 vcmp.f32 s15, #0.0
- 80048e2: eef1 fa10 vmrs APSR_nzcv, fpscr
- 80048e6: d103 bne.n 80048f0 <_ZN12OdometryCalc21OdometryUpdateMessageEv+0x7e>
- angular_velocity = 0;
- 80048e8: f04f 0300 mov.w r3, #0
- 80048ec: 64fb str r3, [r7, #76] ; 0x4c
- 80048ee: e00c b.n 800490a <_ZN12OdometryCalc21OdometryUpdateMessageEv+0x98>
- else
- angular_velocity = (right_velocity - left_velocity) / kBaseline;
- 80048f0: ed97 7a11 vldr s14, [r7, #68] ; 0x44
- 80048f4: edd7 7a12 vldr s15, [r7, #72] ; 0x48
- 80048f8: ee77 6a67 vsub.f32 s13, s14, s15
- 80048fc: 687b ldr r3, [r7, #4]
- 80048fe: ed93 7a73 vldr s14, [r3, #460] ; 0x1cc
- 8004902: eec6 7a87 vdiv.f32 s15, s13, s14
- 8004906: edc7 7a13 vstr s15, [r7, #76] ; 0x4c
- float diff = angular_velocity / delta_time;
- 800490a: edd7 6a13 vldr s13, [r7, #76] ; 0x4c
- 800490e: ed97 7a0e vldr s14, [r7, #56] ; 0x38
- 8004912: eec6 7a87 vdiv.f32 s15, s13, s14
- 8004916: edc7 7a0c vstr s15, [r7, #48] ; 0x30
- float r = (kBaseline / 2) * ((right_velocity + left_velocity) /
- 800491a: 687b ldr r3, [r7, #4]
- 800491c: edd3 7a73 vldr s15, [r3, #460] ; 0x1cc
- 8004920: eef0 6a00 vmov.f32 s13, #0 ; 0x40000000 2.0
- 8004924: ee87 7aa6 vdiv.f32 s14, s15, s13
- 8004928: edd7 6a11 vldr s13, [r7, #68] ; 0x44
- 800492c: edd7 7a12 vldr s15, [r7, #72] ; 0x48
- 8004930: ee36 6aa7 vadd.f32 s12, s13, s15
- (right_velocity - left_velocity));
- 8004934: edd7 6a11 vldr s13, [r7, #68] ; 0x44
- 8004938: edd7 7a12 vldr s15, [r7, #72] ; 0x48
- 800493c: ee76 6ae7 vsub.f32 s13, s13, s15
- float r = (kBaseline / 2) * ((right_velocity + left_velocity) /
- 8004940: eec6 7a26 vdiv.f32 s15, s12, s13
- 8004944: ee67 7a27 vmul.f32 s15, s14, s15
- 8004948: edc7 7a0b vstr s15, [r7, #44] ; 0x2c
- float icc_x = x - r * std::sin(theta_);
- 800494c: 687b ldr r3, [r7, #4]
- 800494e: edd3 7a0e vldr s15, [r3, #56] ; 0x38
- 8004952: eeb0 0a67 vmov.f32 s0, s15
- 8004956: f7ff ff44 bl 80047e2 <_ZSt3sinf>
- 800495a: eeb0 7a40 vmov.f32 s14, s0
- 800495e: edd7 7a0b vldr s15, [r7, #44] ; 0x2c
- 8004962: ee67 7a27 vmul.f32 s15, s14, s15
- 8004966: ed97 7a10 vldr s14, [r7, #64] ; 0x40
- 800496a: ee77 7a67 vsub.f32 s15, s14, s15
- 800496e: edc7 7a0a vstr s15, [r7, #40] ; 0x28
- float icc_y = y + r * std::cos(theta_);
- 8004972: 687b ldr r3, [r7, #4]
- 8004974: edd3 7a0e vldr s15, [r3, #56] ; 0x38
- 8004978: eeb0 0a67 vmov.f32 s0, s15
- 800497c: f7ff ff21 bl 80047c2 <_ZSt3cosf>
- 8004980: eeb0 7a40 vmov.f32 s14, s0
- 8004984: edd7 7a0b vldr s15, [r7, #44] ; 0x2c
- 8004988: ee67 7a27 vmul.f32 s15, s14, s15
- 800498c: ed97 7a0f vldr s14, [r7, #60] ; 0x3c
- 8004990: ee77 7a27 vadd.f32 s15, s14, s15
- 8004994: edc7 7a09 vstr s15, [r7, #36] ; 0x24
- float new_x = std::cos(diff) * (x - icc_x) -
- 8004998: ed97 0a0c vldr s0, [r7, #48] ; 0x30
- 800499c: f7ff ff11 bl 80047c2 <_ZSt3cosf>
- 80049a0: eef0 6a40 vmov.f32 s13, s0
- 80049a4: ed97 7a10 vldr s14, [r7, #64] ; 0x40
- 80049a8: edd7 7a0a vldr s15, [r7, #40] ; 0x28
- 80049ac: ee77 7a67 vsub.f32 s15, s14, s15
- 80049b0: ee26 8aa7 vmul.f32 s16, s13, s15
- std::sin(diff) * (y - icc_y) + icc_x;
- 80049b4: ed97 0a0c vldr s0, [r7, #48] ; 0x30
- 80049b8: f7ff ff13 bl 80047e2 <_ZSt3sinf>
- 80049bc: eef0 6a40 vmov.f32 s13, s0
- 80049c0: ed97 7a0f vldr s14, [r7, #60] ; 0x3c
- 80049c4: edd7 7a09 vldr s15, [r7, #36] ; 0x24
- 80049c8: ee77 7a67 vsub.f32 s15, s14, s15
- 80049cc: ee66 7aa7 vmul.f32 s15, s13, s15
- float new_x = std::cos(diff) * (x - icc_x) -
- 80049d0: ee78 7a67 vsub.f32 s15, s16, s15
- std::sin(diff) * (y - icc_y) + icc_x;
- 80049d4: ed97 7a0a vldr s14, [r7, #40] ; 0x28
- 80049d8: ee77 7a27 vadd.f32 s15, s14, s15
- 80049dc: edc7 7a08 vstr s15, [r7, #32]
- float new_y = std::sin(diff) * (y - icc_y) +
- 80049e0: ed97 0a0c vldr s0, [r7, #48] ; 0x30
- 80049e4: f7ff fefd bl 80047e2 <_ZSt3sinf>
- 80049e8: eef0 6a40 vmov.f32 s13, s0
- 80049ec: ed97 7a0f vldr s14, [r7, #60] ; 0x3c
- 80049f0: edd7 7a09 vldr s15, [r7, #36] ; 0x24
- 80049f4: ee77 7a67 vsub.f32 s15, s14, s15
- 80049f8: ee26 8aa7 vmul.f32 s16, s13, s15
- std::cos(diff) * (y - icc_y) + icc_y;
- 80049fc: ed97 0a0c vldr s0, [r7, #48] ; 0x30
- 8004a00: f7ff fedf bl 80047c2 <_ZSt3cosf>
- 8004a04: eef0 6a40 vmov.f32 s13, s0
- 8004a08: ed97 7a0f vldr s14, [r7, #60] ; 0x3c
- 8004a0c: edd7 7a09 vldr s15, [r7, #36] ; 0x24
- 8004a10: ee77 7a67 vsub.f32 s15, s14, s15
- 8004a14: ee66 7aa7 vmul.f32 s15, s13, s15
- float new_y = std::sin(diff) * (y - icc_y) +
- 8004a18: ee78 7a27 vadd.f32 s15, s16, s15
- std::cos(diff) * (y - icc_y) + icc_y;
- 8004a1c: ed97 7a09 vldr s14, [r7, #36] ; 0x24
- 8004a20: ee77 7a27 vadd.f32 s15, s14, s15
- 8004a24: edc7 7a07 vstr s15, [r7, #28]
- theta_ = theta_ + diff;
- 8004a28: 687b ldr r3, [r7, #4]
- 8004a2a: ed93 7a0e vldr s14, [r3, #56] ; 0x38
- 8004a2e: edd7 7a0c vldr s15, [r7, #48] ; 0x30
- 8004a32: ee77 7a27 vadd.f32 s15, s14, s15
- 8004a36: 687b ldr r3, [r7, #4]
- 8004a38: edc3 7a0e vstr s15, [r3, #56] ; 0x38
- geometry_msgs::Quaternion q = tf::createQuaternionFromYaw(theta_);
- 8004a3c: 687b ldr r3, [r7, #4]
- 8004a3e: edd3 7a0e vldr s15, [r3, #56] ; 0x38
- 8004a42: eeb7 7ae7 vcvt.f64.f32 d7, s15
- 8004a46: f107 0308 add.w r3, r7, #8
- 8004a4a: eeb0 0b47 vmov.f64 d0, d7
- 8004a4e: 4618 mov r0, r3
- 8004a50: f7ff fed7 bl 8004802 <_ZN2tfL23createQuaternionFromYawEd>
-
- //update msg
- odometry_.pose.pose.position.x = new_x;
- 8004a54: 687b ldr r3, [r7, #4]
- 8004a56: 6a3a ldr r2, [r7, #32]
- 8004a58: 665a str r2, [r3, #100] ; 0x64
- odometry_.pose.pose.position.y = new_y;
- 8004a5a: 687b ldr r3, [r7, #4]
- 8004a5c: 69fa ldr r2, [r7, #28]
- 8004a5e: 669a str r2, [r3, #104] ; 0x68
- odometry_.pose.pose.orientation.x = q.x;
- 8004a60: 68fa ldr r2, [r7, #12]
- 8004a62: 687b ldr r3, [r7, #4]
- 8004a64: 675a str r2, [r3, #116] ; 0x74
- odometry_.pose.pose.orientation.y = q.y;
- 8004a66: 693a ldr r2, [r7, #16]
- 8004a68: 687b ldr r3, [r7, #4]
- 8004a6a: 679a str r2, [r3, #120] ; 0x78
- odometry_.pose.pose.orientation.z = q.z;
- 8004a6c: 697a ldr r2, [r7, #20]
- 8004a6e: 687b ldr r3, [r7, #4]
- 8004a70: 67da str r2, [r3, #124] ; 0x7c
- odometry_.pose.pose.orientation.w = q.w;
- 8004a72: 69ba ldr r2, [r7, #24]
- 8004a74: 687b ldr r3, [r7, #4]
- 8004a76: f8c3 2080 str.w r2, [r3, #128] ; 0x80
- odometry_.twist.twist.linear.x = linear_velocity;
- 8004a7a: 687b ldr r3, [r7, #4]
- 8004a7c: 6b7a ldr r2, [r7, #52] ; 0x34
- 8004a7e: f8c3 2120 str.w r2, [r3, #288] ; 0x120
- odometry_.twist.twist.angular.z = angular_velocity;
- 8004a82: 687b ldr r3, [r7, #4]
- 8004a84: 6cfa ldr r2, [r7, #76] ; 0x4c
- 8004a86: f8c3 2138 str.w r2, [r3, #312] ; 0x138
-
- return;
- 8004a8a: bf00 nop
-}
- 8004a8c: 3750 adds r7, #80 ; 0x50
- 8004a8e: 46bd mov sp, r7
- 8004a90: ecbd 8b02 vpop {d8}
- 8004a94: bd80 pop {r7, pc}
- ...
-
-08004a98 <HAL_MspInit>:
-void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
- /**
- * Initializes the Global MSP.
- */
-void HAL_MspInit(void)
-{
- 8004a98: b480 push {r7}
- 8004a9a: b083 sub sp, #12
- 8004a9c: af00 add r7, sp, #0
- /* USER CODE BEGIN MspInit 0 */
-
- /* USER CODE END MspInit 0 */
-
- __HAL_RCC_PWR_CLK_ENABLE();
- 8004a9e: 4b0f ldr r3, [pc, #60] ; (8004adc <HAL_MspInit+0x44>)
- 8004aa0: 6c1b ldr r3, [r3, #64] ; 0x40
- 8004aa2: 4a0e ldr r2, [pc, #56] ; (8004adc <HAL_MspInit+0x44>)
- 8004aa4: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
- 8004aa8: 6413 str r3, [r2, #64] ; 0x40
- 8004aaa: 4b0c ldr r3, [pc, #48] ; (8004adc <HAL_MspInit+0x44>)
- 8004aac: 6c1b ldr r3, [r3, #64] ; 0x40
- 8004aae: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
- 8004ab2: 607b str r3, [r7, #4]
- 8004ab4: 687b ldr r3, [r7, #4]
- __HAL_RCC_SYSCFG_CLK_ENABLE();
- 8004ab6: 4b09 ldr r3, [pc, #36] ; (8004adc <HAL_MspInit+0x44>)
- 8004ab8: 6c5b ldr r3, [r3, #68] ; 0x44
- 8004aba: 4a08 ldr r2, [pc, #32] ; (8004adc <HAL_MspInit+0x44>)
- 8004abc: f443 4380 orr.w r3, r3, #16384 ; 0x4000
- 8004ac0: 6453 str r3, [r2, #68] ; 0x44
- 8004ac2: 4b06 ldr r3, [pc, #24] ; (8004adc <HAL_MspInit+0x44>)
- 8004ac4: 6c5b ldr r3, [r3, #68] ; 0x44
- 8004ac6: f403 4380 and.w r3, r3, #16384 ; 0x4000
- 8004aca: 603b str r3, [r7, #0]
- 8004acc: 683b ldr r3, [r7, #0]
- /* System interrupt init*/
-
- /* USER CODE BEGIN MspInit 1 */
-
- /* USER CODE END MspInit 1 */
-}
- 8004ace: bf00 nop
- 8004ad0: 370c adds r7, #12
- 8004ad2: 46bd mov sp, r7
- 8004ad4: f85d 7b04 ldr.w r7, [sp], #4
- 8004ad8: 4770 bx lr
- 8004ada: bf00 nop
- 8004adc: 40023800 .word 0x40023800
-
-08004ae0 <HAL_TIM_Encoder_MspInit>:
-* This function configures the hardware resources used in this example
-* @param htim_encoder: TIM_Encoder handle pointer
-* @retval None
-*/
-void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef* htim_encoder)
-{
- 8004ae0: b580 push {r7, lr}
- 8004ae2: b08c sub sp, #48 ; 0x30
- 8004ae4: af00 add r7, sp, #0
- 8004ae6: 6078 str r0, [r7, #4]
- GPIO_InitTypeDef GPIO_InitStruct = {0};
- 8004ae8: f107 031c add.w r3, r7, #28
- 8004aec: 2200 movs r2, #0
- 8004aee: 601a str r2, [r3, #0]
- 8004af0: 605a str r2, [r3, #4]
- 8004af2: 609a str r2, [r3, #8]
- 8004af4: 60da str r2, [r3, #12]
- 8004af6: 611a str r2, [r3, #16]
- if(htim_encoder->Instance==TIM2)
- 8004af8: 687b ldr r3, [r7, #4]
- 8004afa: 681b ldr r3, [r3, #0]
- 8004afc: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000
- 8004b00: d144 bne.n 8004b8c <HAL_TIM_Encoder_MspInit+0xac>
- {
- /* USER CODE BEGIN TIM2_MspInit 0 */
-
- /* USER CODE END TIM2_MspInit 0 */
- /* Peripheral clock enable */
- __HAL_RCC_TIM2_CLK_ENABLE();
- 8004b02: 4b3b ldr r3, [pc, #236] ; (8004bf0 <HAL_TIM_Encoder_MspInit+0x110>)
- 8004b04: 6c1b ldr r3, [r3, #64] ; 0x40
- 8004b06: 4a3a ldr r2, [pc, #232] ; (8004bf0 <HAL_TIM_Encoder_MspInit+0x110>)
- 8004b08: f043 0301 orr.w r3, r3, #1
- 8004b0c: 6413 str r3, [r2, #64] ; 0x40
- 8004b0e: 4b38 ldr r3, [pc, #224] ; (8004bf0 <HAL_TIM_Encoder_MspInit+0x110>)
- 8004b10: 6c1b ldr r3, [r3, #64] ; 0x40
- 8004b12: f003 0301 and.w r3, r3, #1
- 8004b16: 61bb str r3, [r7, #24]
- 8004b18: 69bb ldr r3, [r7, #24]
-
- __HAL_RCC_GPIOA_CLK_ENABLE();
- 8004b1a: 4b35 ldr r3, [pc, #212] ; (8004bf0 <HAL_TIM_Encoder_MspInit+0x110>)
- 8004b1c: 6b1b ldr r3, [r3, #48] ; 0x30
- 8004b1e: 4a34 ldr r2, [pc, #208] ; (8004bf0 <HAL_TIM_Encoder_MspInit+0x110>)
- 8004b20: f043 0301 orr.w r3, r3, #1
- 8004b24: 6313 str r3, [r2, #48] ; 0x30
- 8004b26: 4b32 ldr r3, [pc, #200] ; (8004bf0 <HAL_TIM_Encoder_MspInit+0x110>)
- 8004b28: 6b1b ldr r3, [r3, #48] ; 0x30
- 8004b2a: f003 0301 and.w r3, r3, #1
- 8004b2e: 617b str r3, [r7, #20]
- 8004b30: 697b ldr r3, [r7, #20]
- __HAL_RCC_GPIOB_CLK_ENABLE();
- 8004b32: 4b2f ldr r3, [pc, #188] ; (8004bf0 <HAL_TIM_Encoder_MspInit+0x110>)
- 8004b34: 6b1b ldr r3, [r3, #48] ; 0x30
- 8004b36: 4a2e ldr r2, [pc, #184] ; (8004bf0 <HAL_TIM_Encoder_MspInit+0x110>)
- 8004b38: f043 0302 orr.w r3, r3, #2
- 8004b3c: 6313 str r3, [r2, #48] ; 0x30
- 8004b3e: 4b2c ldr r3, [pc, #176] ; (8004bf0 <HAL_TIM_Encoder_MspInit+0x110>)
- 8004b40: 6b1b ldr r3, [r3, #48] ; 0x30
- 8004b42: f003 0302 and.w r3, r3, #2
- 8004b46: 613b str r3, [r7, #16]
- 8004b48: 693b ldr r3, [r7, #16]
- /**TIM2 GPIO Configuration
- PA5 ------> TIM2_CH1
- PB3 ------> TIM2_CH2
- */
- GPIO_InitStruct.Pin = GPIO_PIN_5;
- 8004b4a: 2320 movs r3, #32
- 8004b4c: 61fb str r3, [r7, #28]
- GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 8004b4e: 2302 movs r3, #2
- 8004b50: 623b str r3, [r7, #32]
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8004b52: 2300 movs r3, #0
- 8004b54: 627b str r3, [r7, #36] ; 0x24
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 8004b56: 2300 movs r3, #0
- 8004b58: 62bb str r3, [r7, #40] ; 0x28
- GPIO_InitStruct.Alternate = GPIO_AF1_TIM2;
- 8004b5a: 2301 movs r3, #1
- 8004b5c: 62fb str r3, [r7, #44] ; 0x2c
- HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 8004b5e: f107 031c add.w r3, r7, #28
- 8004b62: 4619 mov r1, r3
- 8004b64: 4823 ldr r0, [pc, #140] ; (8004bf4 <HAL_TIM_Encoder_MspInit+0x114>)
- 8004b66: f001 f883 bl 8005c70 <HAL_GPIO_Init>
-
- GPIO_InitStruct.Pin = GPIO_PIN_3;
- 8004b6a: 2308 movs r3, #8
- 8004b6c: 61fb str r3, [r7, #28]
- GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 8004b6e: 2302 movs r3, #2
- 8004b70: 623b str r3, [r7, #32]
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8004b72: 2300 movs r3, #0
- 8004b74: 627b str r3, [r7, #36] ; 0x24
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 8004b76: 2300 movs r3, #0
- 8004b78: 62bb str r3, [r7, #40] ; 0x28
- GPIO_InitStruct.Alternate = GPIO_AF1_TIM2;
- 8004b7a: 2301 movs r3, #1
- 8004b7c: 62fb str r3, [r7, #44] ; 0x2c
- HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
- 8004b7e: f107 031c add.w r3, r7, #28
- 8004b82: 4619 mov r1, r3
- 8004b84: 481c ldr r0, [pc, #112] ; (8004bf8 <HAL_TIM_Encoder_MspInit+0x118>)
- 8004b86: f001 f873 bl 8005c70 <HAL_GPIO_Init>
- /* USER CODE BEGIN TIM5_MspInit 1 */
-
- /* USER CODE END TIM5_MspInit 1 */
- }
-
-}
- 8004b8a: e02c b.n 8004be6 <HAL_TIM_Encoder_MspInit+0x106>
- else if(htim_encoder->Instance==TIM5)
- 8004b8c: 687b ldr r3, [r7, #4]
- 8004b8e: 681b ldr r3, [r3, #0]
- 8004b90: 4a1a ldr r2, [pc, #104] ; (8004bfc <HAL_TIM_Encoder_MspInit+0x11c>)
- 8004b92: 4293 cmp r3, r2
- 8004b94: d127 bne.n 8004be6 <HAL_TIM_Encoder_MspInit+0x106>
- __HAL_RCC_TIM5_CLK_ENABLE();
- 8004b96: 4b16 ldr r3, [pc, #88] ; (8004bf0 <HAL_TIM_Encoder_MspInit+0x110>)
- 8004b98: 6c1b ldr r3, [r3, #64] ; 0x40
- 8004b9a: 4a15 ldr r2, [pc, #84] ; (8004bf0 <HAL_TIM_Encoder_MspInit+0x110>)
- 8004b9c: f043 0308 orr.w r3, r3, #8
- 8004ba0: 6413 str r3, [r2, #64] ; 0x40
- 8004ba2: 4b13 ldr r3, [pc, #76] ; (8004bf0 <HAL_TIM_Encoder_MspInit+0x110>)
- 8004ba4: 6c1b ldr r3, [r3, #64] ; 0x40
- 8004ba6: f003 0308 and.w r3, r3, #8
- 8004baa: 60fb str r3, [r7, #12]
- 8004bac: 68fb ldr r3, [r7, #12]
- __HAL_RCC_GPIOA_CLK_ENABLE();
- 8004bae: 4b10 ldr r3, [pc, #64] ; (8004bf0 <HAL_TIM_Encoder_MspInit+0x110>)
- 8004bb0: 6b1b ldr r3, [r3, #48] ; 0x30
- 8004bb2: 4a0f ldr r2, [pc, #60] ; (8004bf0 <HAL_TIM_Encoder_MspInit+0x110>)
- 8004bb4: f043 0301 orr.w r3, r3, #1
- 8004bb8: 6313 str r3, [r2, #48] ; 0x30
- 8004bba: 4b0d ldr r3, [pc, #52] ; (8004bf0 <HAL_TIM_Encoder_MspInit+0x110>)
- 8004bbc: 6b1b ldr r3, [r3, #48] ; 0x30
- 8004bbe: f003 0301 and.w r3, r3, #1
- 8004bc2: 60bb str r3, [r7, #8]
- 8004bc4: 68bb ldr r3, [r7, #8]
- GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1;
- 8004bc6: 2303 movs r3, #3
- 8004bc8: 61fb str r3, [r7, #28]
- GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 8004bca: 2302 movs r3, #2
- 8004bcc: 623b str r3, [r7, #32]
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8004bce: 2300 movs r3, #0
- 8004bd0: 627b str r3, [r7, #36] ; 0x24
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 8004bd2: 2300 movs r3, #0
- 8004bd4: 62bb str r3, [r7, #40] ; 0x28
- GPIO_InitStruct.Alternate = GPIO_AF2_TIM5;
- 8004bd6: 2302 movs r3, #2
- 8004bd8: 62fb str r3, [r7, #44] ; 0x2c
- HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 8004bda: f107 031c add.w r3, r7, #28
- 8004bde: 4619 mov r1, r3
- 8004be0: 4804 ldr r0, [pc, #16] ; (8004bf4 <HAL_TIM_Encoder_MspInit+0x114>)
- 8004be2: f001 f845 bl 8005c70 <HAL_GPIO_Init>
-}
- 8004be6: bf00 nop
- 8004be8: 3730 adds r7, #48 ; 0x30
- 8004bea: 46bd mov sp, r7
- 8004bec: bd80 pop {r7, pc}
- 8004bee: bf00 nop
- 8004bf0: 40023800 .word 0x40023800
- 8004bf4: 40020000 .word 0x40020000
- 8004bf8: 40020400 .word 0x40020400
- 8004bfc: 40000c00 .word 0x40000c00
-
-08004c00 <HAL_TIM_Base_MspInit>:
-* This function configures the hardware resources used in this example
-* @param htim_base: TIM_Base handle pointer
-* @retval None
-*/
-void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
-{
- 8004c00: b580 push {r7, lr}
- 8004c02: b084 sub sp, #16
- 8004c04: af00 add r7, sp, #0
- 8004c06: 6078 str r0, [r7, #4]
- if(htim_base->Instance==TIM3)
- 8004c08: 687b ldr r3, [r7, #4]
- 8004c0a: 681b ldr r3, [r3, #0]
- 8004c0c: 4a16 ldr r2, [pc, #88] ; (8004c68 <HAL_TIM_Base_MspInit+0x68>)
- 8004c0e: 4293 cmp r3, r2
- 8004c10: d114 bne.n 8004c3c <HAL_TIM_Base_MspInit+0x3c>
- {
- /* USER CODE BEGIN TIM3_MspInit 0 */
-
- /* USER CODE END TIM3_MspInit 0 */
- /* Peripheral clock enable */
- __HAL_RCC_TIM3_CLK_ENABLE();
- 8004c12: 4b16 ldr r3, [pc, #88] ; (8004c6c <HAL_TIM_Base_MspInit+0x6c>)
- 8004c14: 6c1b ldr r3, [r3, #64] ; 0x40
- 8004c16: 4a15 ldr r2, [pc, #84] ; (8004c6c <HAL_TIM_Base_MspInit+0x6c>)
- 8004c18: f043 0302 orr.w r3, r3, #2
- 8004c1c: 6413 str r3, [r2, #64] ; 0x40
- 8004c1e: 4b13 ldr r3, [pc, #76] ; (8004c6c <HAL_TIM_Base_MspInit+0x6c>)
- 8004c20: 6c1b ldr r3, [r3, #64] ; 0x40
- 8004c22: f003 0302 and.w r3, r3, #2
- 8004c26: 60fb str r3, [r7, #12]
- 8004c28: 68fb ldr r3, [r7, #12]
- /* TIM3 interrupt Init */
- HAL_NVIC_SetPriority(TIM3_IRQn, 0, 0);
- 8004c2a: 2200 movs r2, #0
- 8004c2c: 2100 movs r1, #0
- 8004c2e: 201d movs r0, #29
- 8004c30: f000 fc4f bl 80054d2 <HAL_NVIC_SetPriority>
- HAL_NVIC_EnableIRQ(TIM3_IRQn);
- 8004c34: 201d movs r0, #29
- 8004c36: f000 fc68 bl 800550a <HAL_NVIC_EnableIRQ>
- /* USER CODE BEGIN TIM4_MspInit 1 */
-
- /* USER CODE END TIM4_MspInit 1 */
- }
-
-}
- 8004c3a: e010 b.n 8004c5e <HAL_TIM_Base_MspInit+0x5e>
- else if(htim_base->Instance==TIM4)
- 8004c3c: 687b ldr r3, [r7, #4]
- 8004c3e: 681b ldr r3, [r3, #0]
- 8004c40: 4a0b ldr r2, [pc, #44] ; (8004c70 <HAL_TIM_Base_MspInit+0x70>)
- 8004c42: 4293 cmp r3, r2
- 8004c44: d10b bne.n 8004c5e <HAL_TIM_Base_MspInit+0x5e>
- __HAL_RCC_TIM4_CLK_ENABLE();
- 8004c46: 4b09 ldr r3, [pc, #36] ; (8004c6c <HAL_TIM_Base_MspInit+0x6c>)
- 8004c48: 6c1b ldr r3, [r3, #64] ; 0x40
- 8004c4a: 4a08 ldr r2, [pc, #32] ; (8004c6c <HAL_TIM_Base_MspInit+0x6c>)
- 8004c4c: f043 0304 orr.w r3, r3, #4
- 8004c50: 6413 str r3, [r2, #64] ; 0x40
- 8004c52: 4b06 ldr r3, [pc, #24] ; (8004c6c <HAL_TIM_Base_MspInit+0x6c>)
- 8004c54: 6c1b ldr r3, [r3, #64] ; 0x40
- 8004c56: f003 0304 and.w r3, r3, #4
- 8004c5a: 60bb str r3, [r7, #8]
- 8004c5c: 68bb ldr r3, [r7, #8]
-}
- 8004c5e: bf00 nop
- 8004c60: 3710 adds r7, #16
- 8004c62: 46bd mov sp, r7
- 8004c64: bd80 pop {r7, pc}
- 8004c66: bf00 nop
- 8004c68: 40000400 .word 0x40000400
- 8004c6c: 40023800 .word 0x40023800
- 8004c70: 40000800 .word 0x40000800
-
-08004c74 <HAL_TIM_MspPostInit>:
-
-void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
-{
- 8004c74: b580 push {r7, lr}
- 8004c76: b088 sub sp, #32
- 8004c78: af00 add r7, sp, #0
- 8004c7a: 6078 str r0, [r7, #4]
- GPIO_InitTypeDef GPIO_InitStruct = {0};
- 8004c7c: f107 030c add.w r3, r7, #12
- 8004c80: 2200 movs r2, #0
- 8004c82: 601a str r2, [r3, #0]
- 8004c84: 605a str r2, [r3, #4]
- 8004c86: 609a str r2, [r3, #8]
- 8004c88: 60da str r2, [r3, #12]
- 8004c8a: 611a str r2, [r3, #16]
- if(htim->Instance==TIM4)
- 8004c8c: 687b ldr r3, [r7, #4]
- 8004c8e: 681b ldr r3, [r3, #0]
- 8004c90: 4a11 ldr r2, [pc, #68] ; (8004cd8 <HAL_TIM_MspPostInit+0x64>)
- 8004c92: 4293 cmp r3, r2
- 8004c94: d11c bne.n 8004cd0 <HAL_TIM_MspPostInit+0x5c>
- {
- /* USER CODE BEGIN TIM4_MspPostInit 0 */
-
- /* USER CODE END TIM4_MspPostInit 0 */
-
- __HAL_RCC_GPIOD_CLK_ENABLE();
- 8004c96: 4b11 ldr r3, [pc, #68] ; (8004cdc <HAL_TIM_MspPostInit+0x68>)
- 8004c98: 6b1b ldr r3, [r3, #48] ; 0x30
- 8004c9a: 4a10 ldr r2, [pc, #64] ; (8004cdc <HAL_TIM_MspPostInit+0x68>)
- 8004c9c: f043 0308 orr.w r3, r3, #8
- 8004ca0: 6313 str r3, [r2, #48] ; 0x30
- 8004ca2: 4b0e ldr r3, [pc, #56] ; (8004cdc <HAL_TIM_MspPostInit+0x68>)
- 8004ca4: 6b1b ldr r3, [r3, #48] ; 0x30
- 8004ca6: f003 0308 and.w r3, r3, #8
- 8004caa: 60bb str r3, [r7, #8]
- 8004cac: 68bb ldr r3, [r7, #8]
- /**TIM4 GPIO Configuration
- PD14 ------> TIM4_CH3
- PD15 ------> TIM4_CH4
- */
- GPIO_InitStruct.Pin = pwm2_Pin|pwm1_Pin;
- 8004cae: f44f 4340 mov.w r3, #49152 ; 0xc000
- 8004cb2: 60fb str r3, [r7, #12]
- GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 8004cb4: 2302 movs r3, #2
- 8004cb6: 613b str r3, [r7, #16]
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8004cb8: 2300 movs r3, #0
- 8004cba: 617b str r3, [r7, #20]
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 8004cbc: 2300 movs r3, #0
- 8004cbe: 61bb str r3, [r7, #24]
- GPIO_InitStruct.Alternate = GPIO_AF2_TIM4;
- 8004cc0: 2302 movs r3, #2
- 8004cc2: 61fb str r3, [r7, #28]
- HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
- 8004cc4: f107 030c add.w r3, r7, #12
- 8004cc8: 4619 mov r1, r3
- 8004cca: 4805 ldr r0, [pc, #20] ; (8004ce0 <HAL_TIM_MspPostInit+0x6c>)
- 8004ccc: f000 ffd0 bl 8005c70 <HAL_GPIO_Init>
- /* USER CODE BEGIN TIM4_MspPostInit 1 */
-
- /* USER CODE END TIM4_MspPostInit 1 */
- }
-
-}
- 8004cd0: bf00 nop
- 8004cd2: 3720 adds r7, #32
- 8004cd4: 46bd mov sp, r7
- 8004cd6: bd80 pop {r7, pc}
- 8004cd8: 40000800 .word 0x40000800
- 8004cdc: 40023800 .word 0x40023800
- 8004ce0: 40020c00 .word 0x40020c00
-
-08004ce4 <HAL_UART_MspInit>:
-* This function configures the hardware resources used in this example
-* @param huart: UART handle pointer
-* @retval None
-*/
-void HAL_UART_MspInit(UART_HandleTypeDef* huart)
-{
- 8004ce4: b580 push {r7, lr}
- 8004ce6: b08c sub sp, #48 ; 0x30
- 8004ce8: af00 add r7, sp, #0
- 8004cea: 6078 str r0, [r7, #4]
- GPIO_InitTypeDef GPIO_InitStruct = {0};
- 8004cec: f107 031c add.w r3, r7, #28
- 8004cf0: 2200 movs r2, #0
- 8004cf2: 601a str r2, [r3, #0]
- 8004cf4: 605a str r2, [r3, #4]
- 8004cf6: 609a str r2, [r3, #8]
- 8004cf8: 60da str r2, [r3, #12]
- 8004cfa: 611a str r2, [r3, #16]
- if(huart->Instance==USART3)
- 8004cfc: 687b ldr r3, [r7, #4]
- 8004cfe: 681b ldr r3, [r3, #0]
- 8004d00: 4a93 ldr r2, [pc, #588] ; (8004f50 <HAL_UART_MspInit+0x26c>)
- 8004d02: 4293 cmp r3, r2
- 8004d04: f040 808e bne.w 8004e24 <HAL_UART_MspInit+0x140>
- {
- /* USER CODE BEGIN USART3_MspInit 0 */
-
- /* USER CODE END USART3_MspInit 0 */
- /* Peripheral clock enable */
- __HAL_RCC_USART3_CLK_ENABLE();
- 8004d08: 4b92 ldr r3, [pc, #584] ; (8004f54 <HAL_UART_MspInit+0x270>)
- 8004d0a: 6c1b ldr r3, [r3, #64] ; 0x40
- 8004d0c: 4a91 ldr r2, [pc, #580] ; (8004f54 <HAL_UART_MspInit+0x270>)
- 8004d0e: f443 2380 orr.w r3, r3, #262144 ; 0x40000
- 8004d12: 6413 str r3, [r2, #64] ; 0x40
- 8004d14: 4b8f ldr r3, [pc, #572] ; (8004f54 <HAL_UART_MspInit+0x270>)
- 8004d16: 6c1b ldr r3, [r3, #64] ; 0x40
- 8004d18: f403 2380 and.w r3, r3, #262144 ; 0x40000
- 8004d1c: 61bb str r3, [r7, #24]
- 8004d1e: 69bb ldr r3, [r7, #24]
-
- __HAL_RCC_GPIOD_CLK_ENABLE();
- 8004d20: 4b8c ldr r3, [pc, #560] ; (8004f54 <HAL_UART_MspInit+0x270>)
- 8004d22: 6b1b ldr r3, [r3, #48] ; 0x30
- 8004d24: 4a8b ldr r2, [pc, #556] ; (8004f54 <HAL_UART_MspInit+0x270>)
- 8004d26: f043 0308 orr.w r3, r3, #8
- 8004d2a: 6313 str r3, [r2, #48] ; 0x30
- 8004d2c: 4b89 ldr r3, [pc, #548] ; (8004f54 <HAL_UART_MspInit+0x270>)
- 8004d2e: 6b1b ldr r3, [r3, #48] ; 0x30
- 8004d30: f003 0308 and.w r3, r3, #8
- 8004d34: 617b str r3, [r7, #20]
- 8004d36: 697b ldr r3, [r7, #20]
- /**USART3 GPIO Configuration
- PD8 ------> USART3_TX
- PD9 ------> USART3_RX
- */
- GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9;
- 8004d38: f44f 7340 mov.w r3, #768 ; 0x300
- 8004d3c: 61fb str r3, [r7, #28]
- GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 8004d3e: 2302 movs r3, #2
- 8004d40: 623b str r3, [r7, #32]
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8004d42: 2300 movs r3, #0
- 8004d44: 627b str r3, [r7, #36] ; 0x24
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- 8004d46: 2303 movs r3, #3
- 8004d48: 62bb str r3, [r7, #40] ; 0x28
- GPIO_InitStruct.Alternate = GPIO_AF7_USART3;
- 8004d4a: 2307 movs r3, #7
- 8004d4c: 62fb str r3, [r7, #44] ; 0x2c
- HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
- 8004d4e: f107 031c add.w r3, r7, #28
- 8004d52: 4619 mov r1, r3
- 8004d54: 4880 ldr r0, [pc, #512] ; (8004f58 <HAL_UART_MspInit+0x274>)
- 8004d56: f000 ff8b bl 8005c70 <HAL_GPIO_Init>
-
- /* USART3 DMA Init */
- /* USART3_RX Init */
- hdma_usart3_rx.Instance = DMA1_Stream1;
- 8004d5a: 4b80 ldr r3, [pc, #512] ; (8004f5c <HAL_UART_MspInit+0x278>)
- 8004d5c: 4a80 ldr r2, [pc, #512] ; (8004f60 <HAL_UART_MspInit+0x27c>)
- 8004d5e: 601a str r2, [r3, #0]
- hdma_usart3_rx.Init.Channel = DMA_CHANNEL_4;
- 8004d60: 4b7e ldr r3, [pc, #504] ; (8004f5c <HAL_UART_MspInit+0x278>)
- 8004d62: f04f 6200 mov.w r2, #134217728 ; 0x8000000
- 8004d66: 605a str r2, [r3, #4]
- hdma_usart3_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
- 8004d68: 4b7c ldr r3, [pc, #496] ; (8004f5c <HAL_UART_MspInit+0x278>)
- 8004d6a: 2200 movs r2, #0
- 8004d6c: 609a str r2, [r3, #8]
- hdma_usart3_rx.Init.PeriphInc = DMA_PINC_DISABLE;
- 8004d6e: 4b7b ldr r3, [pc, #492] ; (8004f5c <HAL_UART_MspInit+0x278>)
- 8004d70: 2200 movs r2, #0
- 8004d72: 60da str r2, [r3, #12]
- hdma_usart3_rx.Init.MemInc = DMA_MINC_ENABLE;
- 8004d74: 4b79 ldr r3, [pc, #484] ; (8004f5c <HAL_UART_MspInit+0x278>)
- 8004d76: f44f 6280 mov.w r2, #1024 ; 0x400
- 8004d7a: 611a str r2, [r3, #16]
- hdma_usart3_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
- 8004d7c: 4b77 ldr r3, [pc, #476] ; (8004f5c <HAL_UART_MspInit+0x278>)
- 8004d7e: 2200 movs r2, #0
- 8004d80: 615a str r2, [r3, #20]
- hdma_usart3_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
- 8004d82: 4b76 ldr r3, [pc, #472] ; (8004f5c <HAL_UART_MspInit+0x278>)
- 8004d84: 2200 movs r2, #0
- 8004d86: 619a str r2, [r3, #24]
- hdma_usart3_rx.Init.Mode = DMA_NORMAL;
- 8004d88: 4b74 ldr r3, [pc, #464] ; (8004f5c <HAL_UART_MspInit+0x278>)
- 8004d8a: 2200 movs r2, #0
- 8004d8c: 61da str r2, [r3, #28]
- hdma_usart3_rx.Init.Priority = DMA_PRIORITY_LOW;
- 8004d8e: 4b73 ldr r3, [pc, #460] ; (8004f5c <HAL_UART_MspInit+0x278>)
- 8004d90: 2200 movs r2, #0
- 8004d92: 621a str r2, [r3, #32]
- hdma_usart3_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
- 8004d94: 4b71 ldr r3, [pc, #452] ; (8004f5c <HAL_UART_MspInit+0x278>)
- 8004d96: 2200 movs r2, #0
- 8004d98: 625a str r2, [r3, #36] ; 0x24
- if (HAL_DMA_Init(&hdma_usart3_rx) != HAL_OK)
- 8004d9a: 4870 ldr r0, [pc, #448] ; (8004f5c <HAL_UART_MspInit+0x278>)
- 8004d9c: f000 fbd0 bl 8005540 <HAL_DMA_Init>
- 8004da0: 4603 mov r3, r0
- 8004da2: 2b00 cmp r3, #0
- 8004da4: d001 beq.n 8004daa <HAL_UART_MspInit+0xc6>
- {
- Error_Handler();
- 8004da6: f7fe fefb bl 8003ba0 <Error_Handler>
- }
-
- __HAL_LINKDMA(huart,hdmarx,hdma_usart3_rx);
- 8004daa: 687b ldr r3, [r7, #4]
- 8004dac: 4a6b ldr r2, [pc, #428] ; (8004f5c <HAL_UART_MspInit+0x278>)
- 8004dae: 66da str r2, [r3, #108] ; 0x6c
- 8004db0: 4a6a ldr r2, [pc, #424] ; (8004f5c <HAL_UART_MspInit+0x278>)
- 8004db2: 687b ldr r3, [r7, #4]
- 8004db4: 6393 str r3, [r2, #56] ; 0x38
-
- /* USART3_TX Init */
- hdma_usart3_tx.Instance = DMA1_Stream3;
- 8004db6: 4b6b ldr r3, [pc, #428] ; (8004f64 <HAL_UART_MspInit+0x280>)
- 8004db8: 4a6b ldr r2, [pc, #428] ; (8004f68 <HAL_UART_MspInit+0x284>)
- 8004dba: 601a str r2, [r3, #0]
- hdma_usart3_tx.Init.Channel = DMA_CHANNEL_4;
- 8004dbc: 4b69 ldr r3, [pc, #420] ; (8004f64 <HAL_UART_MspInit+0x280>)
- 8004dbe: f04f 6200 mov.w r2, #134217728 ; 0x8000000
- 8004dc2: 605a str r2, [r3, #4]
- hdma_usart3_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
- 8004dc4: 4b67 ldr r3, [pc, #412] ; (8004f64 <HAL_UART_MspInit+0x280>)
- 8004dc6: 2240 movs r2, #64 ; 0x40
- 8004dc8: 609a str r2, [r3, #8]
- hdma_usart3_tx.Init.PeriphInc = DMA_PINC_DISABLE;
- 8004dca: 4b66 ldr r3, [pc, #408] ; (8004f64 <HAL_UART_MspInit+0x280>)
- 8004dcc: 2200 movs r2, #0
- 8004dce: 60da str r2, [r3, #12]
- hdma_usart3_tx.Init.MemInc = DMA_MINC_ENABLE;
- 8004dd0: 4b64 ldr r3, [pc, #400] ; (8004f64 <HAL_UART_MspInit+0x280>)
- 8004dd2: f44f 6280 mov.w r2, #1024 ; 0x400
- 8004dd6: 611a str r2, [r3, #16]
- hdma_usart3_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
- 8004dd8: 4b62 ldr r3, [pc, #392] ; (8004f64 <HAL_UART_MspInit+0x280>)
- 8004dda: 2200 movs r2, #0
- 8004ddc: 615a str r2, [r3, #20]
- hdma_usart3_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
- 8004dde: 4b61 ldr r3, [pc, #388] ; (8004f64 <HAL_UART_MspInit+0x280>)
- 8004de0: 2200 movs r2, #0
- 8004de2: 619a str r2, [r3, #24]
- hdma_usart3_tx.Init.Mode = DMA_NORMAL;
- 8004de4: 4b5f ldr r3, [pc, #380] ; (8004f64 <HAL_UART_MspInit+0x280>)
- 8004de6: 2200 movs r2, #0
- 8004de8: 61da str r2, [r3, #28]
- hdma_usart3_tx.Init.Priority = DMA_PRIORITY_LOW;
- 8004dea: 4b5e ldr r3, [pc, #376] ; (8004f64 <HAL_UART_MspInit+0x280>)
- 8004dec: 2200 movs r2, #0
- 8004dee: 621a str r2, [r3, #32]
- hdma_usart3_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
- 8004df0: 4b5c ldr r3, [pc, #368] ; (8004f64 <HAL_UART_MspInit+0x280>)
- 8004df2: 2200 movs r2, #0
- 8004df4: 625a str r2, [r3, #36] ; 0x24
- if (HAL_DMA_Init(&hdma_usart3_tx) != HAL_OK)
- 8004df6: 485b ldr r0, [pc, #364] ; (8004f64 <HAL_UART_MspInit+0x280>)
- 8004df8: f000 fba2 bl 8005540 <HAL_DMA_Init>
- 8004dfc: 4603 mov r3, r0
- 8004dfe: 2b00 cmp r3, #0
- 8004e00: d001 beq.n 8004e06 <HAL_UART_MspInit+0x122>
- {
- Error_Handler();
- 8004e02: f7fe fecd bl 8003ba0 <Error_Handler>
- }
-
- __HAL_LINKDMA(huart,hdmatx,hdma_usart3_tx);
- 8004e06: 687b ldr r3, [r7, #4]
- 8004e08: 4a56 ldr r2, [pc, #344] ; (8004f64 <HAL_UART_MspInit+0x280>)
- 8004e0a: 669a str r2, [r3, #104] ; 0x68
- 8004e0c: 4a55 ldr r2, [pc, #340] ; (8004f64 <HAL_UART_MspInit+0x280>)
- 8004e0e: 687b ldr r3, [r7, #4]
- 8004e10: 6393 str r3, [r2, #56] ; 0x38
-
- /* USART3 interrupt Init */
- HAL_NVIC_SetPriority(USART3_IRQn, 0, 0);
- 8004e12: 2200 movs r2, #0
- 8004e14: 2100 movs r1, #0
- 8004e16: 2027 movs r0, #39 ; 0x27
- 8004e18: f000 fb5b bl 80054d2 <HAL_NVIC_SetPriority>
- HAL_NVIC_EnableIRQ(USART3_IRQn);
- 8004e1c: 2027 movs r0, #39 ; 0x27
- 8004e1e: f000 fb74 bl 800550a <HAL_NVIC_EnableIRQ>
- /* USER CODE BEGIN USART6_MspInit 1 */
-
- /* USER CODE END USART6_MspInit 1 */
- }
-
-}
- 8004e22: e091 b.n 8004f48 <HAL_UART_MspInit+0x264>
- else if(huart->Instance==USART6)
- 8004e24: 687b ldr r3, [r7, #4]
- 8004e26: 681b ldr r3, [r3, #0]
- 8004e28: 4a50 ldr r2, [pc, #320] ; (8004f6c <HAL_UART_MspInit+0x288>)
- 8004e2a: 4293 cmp r3, r2
- 8004e2c: f040 808c bne.w 8004f48 <HAL_UART_MspInit+0x264>
- __HAL_RCC_USART6_CLK_ENABLE();
- 8004e30: 4b48 ldr r3, [pc, #288] ; (8004f54 <HAL_UART_MspInit+0x270>)
- 8004e32: 6c5b ldr r3, [r3, #68] ; 0x44
- 8004e34: 4a47 ldr r2, [pc, #284] ; (8004f54 <HAL_UART_MspInit+0x270>)
- 8004e36: f043 0320 orr.w r3, r3, #32
- 8004e3a: 6453 str r3, [r2, #68] ; 0x44
- 8004e3c: 4b45 ldr r3, [pc, #276] ; (8004f54 <HAL_UART_MspInit+0x270>)
- 8004e3e: 6c5b ldr r3, [r3, #68] ; 0x44
- 8004e40: f003 0320 and.w r3, r3, #32
- 8004e44: 613b str r3, [r7, #16]
- 8004e46: 693b ldr r3, [r7, #16]
- __HAL_RCC_GPIOC_CLK_ENABLE();
- 8004e48: 4b42 ldr r3, [pc, #264] ; (8004f54 <HAL_UART_MspInit+0x270>)
- 8004e4a: 6b1b ldr r3, [r3, #48] ; 0x30
- 8004e4c: 4a41 ldr r2, [pc, #260] ; (8004f54 <HAL_UART_MspInit+0x270>)
- 8004e4e: f043 0304 orr.w r3, r3, #4
- 8004e52: 6313 str r3, [r2, #48] ; 0x30
- 8004e54: 4b3f ldr r3, [pc, #252] ; (8004f54 <HAL_UART_MspInit+0x270>)
- 8004e56: 6b1b ldr r3, [r3, #48] ; 0x30
- 8004e58: f003 0304 and.w r3, r3, #4
- 8004e5c: 60fb str r3, [r7, #12]
- 8004e5e: 68fb ldr r3, [r7, #12]
- GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7;
- 8004e60: 23c0 movs r3, #192 ; 0xc0
- 8004e62: 61fb str r3, [r7, #28]
- GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 8004e64: 2302 movs r3, #2
- 8004e66: 623b str r3, [r7, #32]
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8004e68: 2300 movs r3, #0
- 8004e6a: 627b str r3, [r7, #36] ; 0x24
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- 8004e6c: 2303 movs r3, #3
- 8004e6e: 62bb str r3, [r7, #40] ; 0x28
- GPIO_InitStruct.Alternate = GPIO_AF8_USART6;
- 8004e70: 2308 movs r3, #8
- 8004e72: 62fb str r3, [r7, #44] ; 0x2c
- HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
- 8004e74: f107 031c add.w r3, r7, #28
- 8004e78: 4619 mov r1, r3
- 8004e7a: 483d ldr r0, [pc, #244] ; (8004f70 <HAL_UART_MspInit+0x28c>)
- 8004e7c: f000 fef8 bl 8005c70 <HAL_GPIO_Init>
- hdma_usart6_rx.Instance = DMA2_Stream1;
- 8004e80: 4b3c ldr r3, [pc, #240] ; (8004f74 <HAL_UART_MspInit+0x290>)
- 8004e82: 4a3d ldr r2, [pc, #244] ; (8004f78 <HAL_UART_MspInit+0x294>)
- 8004e84: 601a str r2, [r3, #0]
- hdma_usart6_rx.Init.Channel = DMA_CHANNEL_5;
- 8004e86: 4b3b ldr r3, [pc, #236] ; (8004f74 <HAL_UART_MspInit+0x290>)
- 8004e88: f04f 6220 mov.w r2, #167772160 ; 0xa000000
- 8004e8c: 605a str r2, [r3, #4]
- hdma_usart6_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
- 8004e8e: 4b39 ldr r3, [pc, #228] ; (8004f74 <HAL_UART_MspInit+0x290>)
- 8004e90: 2200 movs r2, #0
- 8004e92: 609a str r2, [r3, #8]
- hdma_usart6_rx.Init.PeriphInc = DMA_PINC_DISABLE;
- 8004e94: 4b37 ldr r3, [pc, #220] ; (8004f74 <HAL_UART_MspInit+0x290>)
- 8004e96: 2200 movs r2, #0
- 8004e98: 60da str r2, [r3, #12]
- hdma_usart6_rx.Init.MemInc = DMA_MINC_ENABLE;
- 8004e9a: 4b36 ldr r3, [pc, #216] ; (8004f74 <HAL_UART_MspInit+0x290>)
- 8004e9c: f44f 6280 mov.w r2, #1024 ; 0x400
- 8004ea0: 611a str r2, [r3, #16]
- hdma_usart6_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
- 8004ea2: 4b34 ldr r3, [pc, #208] ; (8004f74 <HAL_UART_MspInit+0x290>)
- 8004ea4: 2200 movs r2, #0
- 8004ea6: 615a str r2, [r3, #20]
- hdma_usart6_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
- 8004ea8: 4b32 ldr r3, [pc, #200] ; (8004f74 <HAL_UART_MspInit+0x290>)
- 8004eaa: 2200 movs r2, #0
- 8004eac: 619a str r2, [r3, #24]
- hdma_usart6_rx.Init.Mode = DMA_NORMAL;
- 8004eae: 4b31 ldr r3, [pc, #196] ; (8004f74 <HAL_UART_MspInit+0x290>)
- 8004eb0: 2200 movs r2, #0
- 8004eb2: 61da str r2, [r3, #28]
- hdma_usart6_rx.Init.Priority = DMA_PRIORITY_LOW;
- 8004eb4: 4b2f ldr r3, [pc, #188] ; (8004f74 <HAL_UART_MspInit+0x290>)
- 8004eb6: 2200 movs r2, #0
- 8004eb8: 621a str r2, [r3, #32]
- hdma_usart6_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
- 8004eba: 4b2e ldr r3, [pc, #184] ; (8004f74 <HAL_UART_MspInit+0x290>)
- 8004ebc: 2200 movs r2, #0
- 8004ebe: 625a str r2, [r3, #36] ; 0x24
- if (HAL_DMA_Init(&hdma_usart6_rx) != HAL_OK)
- 8004ec0: 482c ldr r0, [pc, #176] ; (8004f74 <HAL_UART_MspInit+0x290>)
- 8004ec2: f000 fb3d bl 8005540 <HAL_DMA_Init>
- 8004ec6: 4603 mov r3, r0
- 8004ec8: 2b00 cmp r3, #0
- 8004eca: d001 beq.n 8004ed0 <HAL_UART_MspInit+0x1ec>
- Error_Handler();
- 8004ecc: f7fe fe68 bl 8003ba0 <Error_Handler>
- __HAL_LINKDMA(huart,hdmarx,hdma_usart6_rx);
- 8004ed0: 687b ldr r3, [r7, #4]
- 8004ed2: 4a28 ldr r2, [pc, #160] ; (8004f74 <HAL_UART_MspInit+0x290>)
- 8004ed4: 66da str r2, [r3, #108] ; 0x6c
- 8004ed6: 4a27 ldr r2, [pc, #156] ; (8004f74 <HAL_UART_MspInit+0x290>)
- 8004ed8: 687b ldr r3, [r7, #4]
- 8004eda: 6393 str r3, [r2, #56] ; 0x38
- hdma_usart6_tx.Instance = DMA2_Stream6;
- 8004edc: 4b27 ldr r3, [pc, #156] ; (8004f7c <HAL_UART_MspInit+0x298>)
- 8004ede: 4a28 ldr r2, [pc, #160] ; (8004f80 <HAL_UART_MspInit+0x29c>)
- 8004ee0: 601a str r2, [r3, #0]
- hdma_usart6_tx.Init.Channel = DMA_CHANNEL_5;
- 8004ee2: 4b26 ldr r3, [pc, #152] ; (8004f7c <HAL_UART_MspInit+0x298>)
- 8004ee4: f04f 6220 mov.w r2, #167772160 ; 0xa000000
- 8004ee8: 605a str r2, [r3, #4]
- hdma_usart6_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
- 8004eea: 4b24 ldr r3, [pc, #144] ; (8004f7c <HAL_UART_MspInit+0x298>)
- 8004eec: 2240 movs r2, #64 ; 0x40
- 8004eee: 609a str r2, [r3, #8]
- hdma_usart6_tx.Init.PeriphInc = DMA_PINC_DISABLE;
- 8004ef0: 4b22 ldr r3, [pc, #136] ; (8004f7c <HAL_UART_MspInit+0x298>)
- 8004ef2: 2200 movs r2, #0
- 8004ef4: 60da str r2, [r3, #12]
- hdma_usart6_tx.Init.MemInc = DMA_MINC_ENABLE;
- 8004ef6: 4b21 ldr r3, [pc, #132] ; (8004f7c <HAL_UART_MspInit+0x298>)
- 8004ef8: f44f 6280 mov.w r2, #1024 ; 0x400
- 8004efc: 611a str r2, [r3, #16]
- hdma_usart6_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
- 8004efe: 4b1f ldr r3, [pc, #124] ; (8004f7c <HAL_UART_MspInit+0x298>)
- 8004f00: 2200 movs r2, #0
- 8004f02: 615a str r2, [r3, #20]
- hdma_usart6_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
- 8004f04: 4b1d ldr r3, [pc, #116] ; (8004f7c <HAL_UART_MspInit+0x298>)
- 8004f06: 2200 movs r2, #0
- 8004f08: 619a str r2, [r3, #24]
- hdma_usart6_tx.Init.Mode = DMA_NORMAL;
- 8004f0a: 4b1c ldr r3, [pc, #112] ; (8004f7c <HAL_UART_MspInit+0x298>)
- 8004f0c: 2200 movs r2, #0
- 8004f0e: 61da str r2, [r3, #28]
- hdma_usart6_tx.Init.Priority = DMA_PRIORITY_LOW;
- 8004f10: 4b1a ldr r3, [pc, #104] ; (8004f7c <HAL_UART_MspInit+0x298>)
- 8004f12: 2200 movs r2, #0
- 8004f14: 621a str r2, [r3, #32]
- hdma_usart6_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
- 8004f16: 4b19 ldr r3, [pc, #100] ; (8004f7c <HAL_UART_MspInit+0x298>)
- 8004f18: 2200 movs r2, #0
- 8004f1a: 625a str r2, [r3, #36] ; 0x24
- if (HAL_DMA_Init(&hdma_usart6_tx) != HAL_OK)
- 8004f1c: 4817 ldr r0, [pc, #92] ; (8004f7c <HAL_UART_MspInit+0x298>)
- 8004f1e: f000 fb0f bl 8005540 <HAL_DMA_Init>
- 8004f22: 4603 mov r3, r0
- 8004f24: 2b00 cmp r3, #0
- 8004f26: d001 beq.n 8004f2c <HAL_UART_MspInit+0x248>
- Error_Handler();
- 8004f28: f7fe fe3a bl 8003ba0 <Error_Handler>
- __HAL_LINKDMA(huart,hdmatx,hdma_usart6_tx);
- 8004f2c: 687b ldr r3, [r7, #4]
- 8004f2e: 4a13 ldr r2, [pc, #76] ; (8004f7c <HAL_UART_MspInit+0x298>)
- 8004f30: 669a str r2, [r3, #104] ; 0x68
- 8004f32: 4a12 ldr r2, [pc, #72] ; (8004f7c <HAL_UART_MspInit+0x298>)
- 8004f34: 687b ldr r3, [r7, #4]
- 8004f36: 6393 str r3, [r2, #56] ; 0x38
- HAL_NVIC_SetPriority(USART6_IRQn, 0, 0);
- 8004f38: 2200 movs r2, #0
- 8004f3a: 2100 movs r1, #0
- 8004f3c: 2047 movs r0, #71 ; 0x47
- 8004f3e: f000 fac8 bl 80054d2 <HAL_NVIC_SetPriority>
- HAL_NVIC_EnableIRQ(USART6_IRQn);
- 8004f42: 2047 movs r0, #71 ; 0x47
- 8004f44: f000 fae1 bl 800550a <HAL_NVIC_EnableIRQ>
-}
- 8004f48: bf00 nop
- 8004f4a: 3730 adds r7, #48 ; 0x30
- 8004f4c: 46bd mov sp, r7
- 8004f4e: bd80 pop {r7, pc}
- 8004f50: 40004800 .word 0x40004800
- 8004f54: 40023800 .word 0x40023800
- 8004f58: 40020c00 .word 0x40020c00
- 8004f5c: 200002a4 .word 0x200002a4
- 8004f60: 40026028 .word 0x40026028
- 8004f64: 20000304 .word 0x20000304
- 8004f68: 40026058 .word 0x40026058
- 8004f6c: 40011400 .word 0x40011400
- 8004f70: 40020800 .word 0x40020800
- 8004f74: 20000364 .word 0x20000364
- 8004f78: 40026428 .word 0x40026428
- 8004f7c: 200003c4 .word 0x200003c4
- 8004f80: 400264a0 .word 0x400264a0
-
-08004f84 <NMI_Handler>:
-/******************************************************************************/
-/**
- * @brief This function handles Non maskable interrupt.
- */
-void NMI_Handler(void)
-{
- 8004f84: b480 push {r7}
- 8004f86: af00 add r7, sp, #0
-
- /* USER CODE END NonMaskableInt_IRQn 0 */
- /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
-
- /* USER CODE END NonMaskableInt_IRQn 1 */
-}
- 8004f88: bf00 nop
- 8004f8a: 46bd mov sp, r7
- 8004f8c: f85d 7b04 ldr.w r7, [sp], #4
- 8004f90: 4770 bx lr
-
-08004f92 <HardFault_Handler>:
-
-/**
- * @brief This function handles Hard fault interrupt.
- */
-void HardFault_Handler(void)
-{
- 8004f92: b480 push {r7}
- 8004f94: af00 add r7, sp, #0
- /* USER CODE BEGIN HardFault_IRQn 0 */
-
- /* USER CODE END HardFault_IRQn 0 */
- while (1)
- 8004f96: e7fe b.n 8004f96 <HardFault_Handler+0x4>
-
-08004f98 <MemManage_Handler>:
-
-/**
- * @brief This function handles Memory management fault.
- */
-void MemManage_Handler(void)
-{
- 8004f98: b480 push {r7}
- 8004f9a: af00 add r7, sp, #0
- /* USER CODE BEGIN MemoryManagement_IRQn 0 */
-
- /* USER CODE END MemoryManagement_IRQn 0 */
- while (1)
- 8004f9c: e7fe b.n 8004f9c <MemManage_Handler+0x4>
-
-08004f9e <BusFault_Handler>:
-
-/**
- * @brief This function handles Pre-fetch fault, memory access fault.
- */
-void BusFault_Handler(void)
-{
- 8004f9e: b480 push {r7}
- 8004fa0: af00 add r7, sp, #0
- /* USER CODE BEGIN BusFault_IRQn 0 */
-
- /* USER CODE END BusFault_IRQn 0 */
- while (1)
- 8004fa2: e7fe b.n 8004fa2 <BusFault_Handler+0x4>
-
-08004fa4 <UsageFault_Handler>:
-
-/**
- * @brief This function handles Undefined instruction or illegal state.
- */
-void UsageFault_Handler(void)
-{
- 8004fa4: b480 push {r7}
- 8004fa6: af00 add r7, sp, #0
- /* USER CODE BEGIN UsageFault_IRQn 0 */
-
- /* USER CODE END UsageFault_IRQn 0 */
- while (1)
- 8004fa8: e7fe b.n 8004fa8 <UsageFault_Handler+0x4>
-
-08004faa <SVC_Handler>:
-
-/**
- * @brief This function handles System service call via SWI instruction.
- */
-void SVC_Handler(void)
-{
- 8004faa: b480 push {r7}
- 8004fac: af00 add r7, sp, #0
-
- /* USER CODE END SVCall_IRQn 0 */
- /* USER CODE BEGIN SVCall_IRQn 1 */
-
- /* USER CODE END SVCall_IRQn 1 */
-}
- 8004fae: bf00 nop
- 8004fb0: 46bd mov sp, r7
- 8004fb2: f85d 7b04 ldr.w r7, [sp], #4
- 8004fb6: 4770 bx lr
-
-08004fb8 <DebugMon_Handler>:
-
-/**
- * @brief This function handles Debug monitor.
- */
-void DebugMon_Handler(void)
-{
- 8004fb8: b480 push {r7}
- 8004fba: af00 add r7, sp, #0
-
- /* USER CODE END DebugMonitor_IRQn 0 */
- /* USER CODE BEGIN DebugMonitor_IRQn 1 */
-
- /* USER CODE END DebugMonitor_IRQn 1 */
-}
- 8004fbc: bf00 nop
- 8004fbe: 46bd mov sp, r7
- 8004fc0: f85d 7b04 ldr.w r7, [sp], #4
- 8004fc4: 4770 bx lr
-
-08004fc6 <PendSV_Handler>:
-
-/**
- * @brief This function handles Pendable request for system service.
- */
-void PendSV_Handler(void)
-{
- 8004fc6: b480 push {r7}
- 8004fc8: af00 add r7, sp, #0
-
- /* USER CODE END PendSV_IRQn 0 */
- /* USER CODE BEGIN PendSV_IRQn 1 */
-
- /* USER CODE END PendSV_IRQn 1 */
-}
- 8004fca: bf00 nop
- 8004fcc: 46bd mov sp, r7
- 8004fce: f85d 7b04 ldr.w r7, [sp], #4
- 8004fd2: 4770 bx lr
-
-08004fd4 <SysTick_Handler>:
-
-/**
- * @brief This function handles System tick timer.
- */
-void SysTick_Handler(void)
-{
- 8004fd4: b580 push {r7, lr}
- 8004fd6: af00 add r7, sp, #0
- /* USER CODE BEGIN SysTick_IRQn 0 */
-
- /* USER CODE END SysTick_IRQn 0 */
- HAL_IncTick();
- 8004fd8: f000 f95e bl 8005298 <HAL_IncTick>
- /* USER CODE BEGIN SysTick_IRQn 1 */
-
- /* USER CODE END SysTick_IRQn 1 */
-}
- 8004fdc: bf00 nop
- 8004fde: bd80 pop {r7, pc}
-
-08004fe0 <DMA1_Stream1_IRQHandler>:
-
-/**
- * @brief This function handles DMA1 stream1 global interrupt.
- */
-void DMA1_Stream1_IRQHandler(void)
-{
- 8004fe0: b580 push {r7, lr}
- 8004fe2: af00 add r7, sp, #0
- /* USER CODE BEGIN DMA1_Stream1_IRQn 0 */
-
- /* USER CODE END DMA1_Stream1_IRQn 0 */
- HAL_DMA_IRQHandler(&hdma_usart3_rx);
- 8004fe4: 4802 ldr r0, [pc, #8] ; (8004ff0 <DMA1_Stream1_IRQHandler+0x10>)
- 8004fe6: f000 fbdb bl 80057a0 <HAL_DMA_IRQHandler>
- /* USER CODE BEGIN DMA1_Stream1_IRQn 1 */
-
- /* USER CODE END DMA1_Stream1_IRQn 1 */
-}
- 8004fea: bf00 nop
- 8004fec: bd80 pop {r7, pc}
- 8004fee: bf00 nop
- 8004ff0: 200002a4 .word 0x200002a4
-
-08004ff4 <DMA1_Stream3_IRQHandler>:
-
-/**
- * @brief This function handles DMA1 stream3 global interrupt.
- */
-void DMA1_Stream3_IRQHandler(void)
-{
- 8004ff4: b580 push {r7, lr}
- 8004ff6: af00 add r7, sp, #0
- /* USER CODE BEGIN DMA1_Stream3_IRQn 0 */
-
- /* USER CODE END DMA1_Stream3_IRQn 0 */
- HAL_DMA_IRQHandler(&hdma_usart3_tx);
- 8004ff8: 4802 ldr r0, [pc, #8] ; (8005004 <DMA1_Stream3_IRQHandler+0x10>)
- 8004ffa: f000 fbd1 bl 80057a0 <HAL_DMA_IRQHandler>
- /* USER CODE BEGIN DMA1_Stream3_IRQn 1 */
-
- /* USER CODE END DMA1_Stream3_IRQn 1 */
-}
- 8004ffe: bf00 nop
- 8005000: bd80 pop {r7, pc}
- 8005002: bf00 nop
- 8005004: 20000304 .word 0x20000304
-
-08005008 <TIM3_IRQHandler>:
-
-/**
- * @brief This function handles TIM3 global interrupt.
- */
-void TIM3_IRQHandler(void)
-{
- 8005008: b580 push {r7, lr}
- 800500a: af00 add r7, sp, #0
- /* USER CODE BEGIN TIM3_IRQn 0 */
-
- /* USER CODE END TIM3_IRQn 0 */
- HAL_TIM_IRQHandler(&htim3);
- 800500c: 4802 ldr r0, [pc, #8] ; (8005018 <TIM3_IRQHandler+0x10>)
- 800500e: f002 f982 bl 8007316 <HAL_TIM_IRQHandler>
- /* USER CODE BEGIN TIM3_IRQn 1 */
-
- /* USER CODE END TIM3_IRQn 1 */
-}
- 8005012: bf00 nop
- 8005014: bd80 pop {r7, pc}
- 8005016: bf00 nop
- 8005018: 200000e4 .word 0x200000e4
-
-0800501c <USART3_IRQHandler>:
-
-/**
- * @brief This function handles USART3 global interrupt.
- */
-void USART3_IRQHandler(void)
-{
- 800501c: b580 push {r7, lr}
- 800501e: af00 add r7, sp, #0
- /* USER CODE BEGIN USART3_IRQn 0 */
-
- /* USER CODE END USART3_IRQn 0 */
- HAL_UART_IRQHandler(&huart3);
- 8005020: 4802 ldr r0, [pc, #8] ; (800502c <USART3_IRQHandler+0x10>)
- 8005022: f003 fa17 bl 8008454 <HAL_UART_IRQHandler>
- /* USER CODE BEGIN USART3_IRQn 1 */
-
- /* USER CODE END USART3_IRQn 1 */
-}
- 8005026: bf00 nop
- 8005028: bd80 pop {r7, pc}
- 800502a: bf00 nop
- 800502c: 200001a4 .word 0x200001a4
-
-08005030 <DMA2_Stream1_IRQHandler>:
-
-/**
- * @brief This function handles DMA2 stream1 global interrupt.
- */
-void DMA2_Stream1_IRQHandler(void)
-{
- 8005030: b580 push {r7, lr}
- 8005032: af00 add r7, sp, #0
- /* USER CODE BEGIN DMA2_Stream1_IRQn 0 */
-
- /* USER CODE END DMA2_Stream1_IRQn 0 */
- HAL_DMA_IRQHandler(&hdma_usart6_rx);
- 8005034: 4802 ldr r0, [pc, #8] ; (8005040 <DMA2_Stream1_IRQHandler+0x10>)
- 8005036: f000 fbb3 bl 80057a0 <HAL_DMA_IRQHandler>
- /* USER CODE BEGIN DMA2_Stream1_IRQn 1 */
-
- /* USER CODE END DMA2_Stream1_IRQn 1 */
-}
- 800503a: bf00 nop
- 800503c: bd80 pop {r7, pc}
- 800503e: bf00 nop
- 8005040: 20000364 .word 0x20000364
-
-08005044 <DMA2_Stream6_IRQHandler>:
-
-/**
- * @brief This function handles DMA2 stream6 global interrupt.
- */
-void DMA2_Stream6_IRQHandler(void)
-{
- 8005044: b580 push {r7, lr}
- 8005046: af00 add r7, sp, #0
- /* USER CODE BEGIN DMA2_Stream6_IRQn 0 */
-
- /* USER CODE END DMA2_Stream6_IRQn 0 */
- HAL_DMA_IRQHandler(&hdma_usart6_tx);
- 8005048: 4802 ldr r0, [pc, #8] ; (8005054 <DMA2_Stream6_IRQHandler+0x10>)
- 800504a: f000 fba9 bl 80057a0 <HAL_DMA_IRQHandler>
- /* USER CODE BEGIN DMA2_Stream6_IRQn 1 */
-
- /* USER CODE END DMA2_Stream6_IRQn 1 */
-}
- 800504e: bf00 nop
- 8005050: bd80 pop {r7, pc}
- 8005052: bf00 nop
- 8005054: 200003c4 .word 0x200003c4
-
-08005058 <USART6_IRQHandler>:
-
-/**
- * @brief This function handles USART6 global interrupt.
- */
-void USART6_IRQHandler(void)
-{
- 8005058: b580 push {r7, lr}
- 800505a: af00 add r7, sp, #0
- /* USER CODE BEGIN USART6_IRQn 0 */
-
- /* USER CODE END USART6_IRQn 0 */
- HAL_UART_IRQHandler(&huart6);
- 800505c: 4802 ldr r0, [pc, #8] ; (8005068 <USART6_IRQHandler+0x10>)
- 800505e: f003 f9f9 bl 8008454 <HAL_UART_IRQHandler>
- /* USER CODE BEGIN USART6_IRQn 1 */
-
- /* USER CODE END USART6_IRQn 1 */
-}
- 8005062: bf00 nop
- 8005064: bd80 pop {r7, pc}
- 8005066: bf00 nop
- 8005068: 20000224 .word 0x20000224
-
-0800506c <_getpid>:
-void initialise_monitor_handles()
-{
-}
-
-int _getpid(void)
-{
- 800506c: b480 push {r7}
- 800506e: af00 add r7, sp, #0
- return 1;
- 8005070: 2301 movs r3, #1
-}
- 8005072: 4618 mov r0, r3
- 8005074: 46bd mov sp, r7
- 8005076: f85d 7b04 ldr.w r7, [sp], #4
- 800507a: 4770 bx lr
-
-0800507c <_kill>:
-
-int _kill(int pid, int sig)
-{
- 800507c: b580 push {r7, lr}
- 800507e: b082 sub sp, #8
- 8005080: af00 add r7, sp, #0
- 8005082: 6078 str r0, [r7, #4]
- 8005084: 6039 str r1, [r7, #0]
- errno = EINVAL;
- 8005086: f005 fbc1 bl 800a80c <__errno>
- 800508a: 4602 mov r2, r0
- 800508c: 2316 movs r3, #22
- 800508e: 6013 str r3, [r2, #0]
- return -1;
- 8005090: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff
-}
- 8005094: 4618 mov r0, r3
- 8005096: 3708 adds r7, #8
- 8005098: 46bd mov sp, r7
- 800509a: bd80 pop {r7, pc}
-
-0800509c <_exit>:
-
-void _exit (int status)
-{
- 800509c: b580 push {r7, lr}
- 800509e: b082 sub sp, #8
- 80050a0: af00 add r7, sp, #0
- 80050a2: 6078 str r0, [r7, #4]
- _kill(status, -1);
- 80050a4: f04f 31ff mov.w r1, #4294967295 ; 0xffffffff
- 80050a8: 6878 ldr r0, [r7, #4]
- 80050aa: f7ff ffe7 bl 800507c <_kill>
- while (1) {} /* Make sure we hang here */
- 80050ae: e7fe b.n 80050ae <_exit+0x12>
-
-080050b0 <_sbrk>:
-/**
- _sbrk
- Increase program data space. Malloc and related functions depend on this
-**/
-caddr_t _sbrk(int incr)
-{
- 80050b0: b580 push {r7, lr}
- 80050b2: b084 sub sp, #16
- 80050b4: af00 add r7, sp, #0
- 80050b6: 6078 str r0, [r7, #4]
- extern char end asm("end");
- static char *heap_end;
- char *prev_heap_end;
-
- if (heap_end == 0)
- 80050b8: 4b11 ldr r3, [pc, #68] ; (8005100 <_sbrk+0x50>)
- 80050ba: 681b ldr r3, [r3, #0]
- 80050bc: 2b00 cmp r3, #0
- 80050be: d102 bne.n 80050c6 <_sbrk+0x16>
- heap_end = &end;
- 80050c0: 4b0f ldr r3, [pc, #60] ; (8005100 <_sbrk+0x50>)
- 80050c2: 4a10 ldr r2, [pc, #64] ; (8005104 <_sbrk+0x54>)
- 80050c4: 601a str r2, [r3, #0]
-
- prev_heap_end = heap_end;
- 80050c6: 4b0e ldr r3, [pc, #56] ; (8005100 <_sbrk+0x50>)
- 80050c8: 681b ldr r3, [r3, #0]
- 80050ca: 60fb str r3, [r7, #12]
- if (heap_end + incr > stack_ptr)
- 80050cc: 4b0c ldr r3, [pc, #48] ; (8005100 <_sbrk+0x50>)
- 80050ce: 681a ldr r2, [r3, #0]
- 80050d0: 687b ldr r3, [r7, #4]
- 80050d2: 4413 add r3, r2
- 80050d4: 466a mov r2, sp
- 80050d6: 4293 cmp r3, r2
- 80050d8: d907 bls.n 80050ea <_sbrk+0x3a>
- {
- errno = ENOMEM;
- 80050da: f005 fb97 bl 800a80c <__errno>
- 80050de: 4602 mov r2, r0
- 80050e0: 230c movs r3, #12
- 80050e2: 6013 str r3, [r2, #0]
- return (caddr_t) -1;
- 80050e4: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff
- 80050e8: e006 b.n 80050f8 <_sbrk+0x48>
- }
-
- heap_end += incr;
- 80050ea: 4b05 ldr r3, [pc, #20] ; (8005100 <_sbrk+0x50>)
- 80050ec: 681a ldr r2, [r3, #0]
- 80050ee: 687b ldr r3, [r7, #4]
- 80050f0: 4413 add r3, r2
- 80050f2: 4a03 ldr r2, [pc, #12] ; (8005100 <_sbrk+0x50>)
- 80050f4: 6013 str r3, [r2, #0]
-
- return (caddr_t) prev_heap_end;
- 80050f6: 68fb ldr r3, [r7, #12]
-}
- 80050f8: 4618 mov r0, r3
- 80050fa: 3710 adds r7, #16
- 80050fc: 46bd mov sp, r7
- 80050fe: bd80 pop {r7, pc}
- 8005100: 20001010 .word 0x20001010
- 8005104: 20001028 .word 0x20001028
-
-08005108 <SystemInit>:
- * SystemFrequency variable.
- * @param None
- * @retval None
- */
-void SystemInit(void)
-{
- 8005108: b480 push {r7}
- 800510a: af00 add r7, sp, #0
- /* FPU settings ------------------------------------------------------------*/
- #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
- SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
- 800510c: 4b15 ldr r3, [pc, #84] ; (8005164 <SystemInit+0x5c>)
- 800510e: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88
- 8005112: 4a14 ldr r2, [pc, #80] ; (8005164 <SystemInit+0x5c>)
- 8005114: f443 0370 orr.w r3, r3, #15728640 ; 0xf00000
- 8005118: f8c2 3088 str.w r3, [r2, #136] ; 0x88
- #endif
- /* Reset the RCC clock configuration to the default reset state ------------*/
- /* Set HSION bit */
- RCC->CR |= (uint32_t)0x00000001;
- 800511c: 4b12 ldr r3, [pc, #72] ; (8005168 <SystemInit+0x60>)
- 800511e: 681b ldr r3, [r3, #0]
- 8005120: 4a11 ldr r2, [pc, #68] ; (8005168 <SystemInit+0x60>)
- 8005122: f043 0301 orr.w r3, r3, #1
- 8005126: 6013 str r3, [r2, #0]
-
- /* Reset CFGR register */
- RCC->CFGR = 0x00000000;
- 8005128: 4b0f ldr r3, [pc, #60] ; (8005168 <SystemInit+0x60>)
- 800512a: 2200 movs r2, #0
- 800512c: 609a str r2, [r3, #8]
-
- /* Reset HSEON, CSSON and PLLON bits */
- RCC->CR &= (uint32_t)0xFEF6FFFF;
- 800512e: 4b0e ldr r3, [pc, #56] ; (8005168 <SystemInit+0x60>)
- 8005130: 681a ldr r2, [r3, #0]
- 8005132: 490d ldr r1, [pc, #52] ; (8005168 <SystemInit+0x60>)
- 8005134: 4b0d ldr r3, [pc, #52] ; (800516c <SystemInit+0x64>)
- 8005136: 4013 ands r3, r2
- 8005138: 600b str r3, [r1, #0]
-
- /* Reset PLLCFGR register */
- RCC->PLLCFGR = 0x24003010;
- 800513a: 4b0b ldr r3, [pc, #44] ; (8005168 <SystemInit+0x60>)
- 800513c: 4a0c ldr r2, [pc, #48] ; (8005170 <SystemInit+0x68>)
- 800513e: 605a str r2, [r3, #4]
-
- /* Reset HSEBYP bit */
- RCC->CR &= (uint32_t)0xFFFBFFFF;
- 8005140: 4b09 ldr r3, [pc, #36] ; (8005168 <SystemInit+0x60>)
- 8005142: 681b ldr r3, [r3, #0]
- 8005144: 4a08 ldr r2, [pc, #32] ; (8005168 <SystemInit+0x60>)
- 8005146: f423 2380 bic.w r3, r3, #262144 ; 0x40000
- 800514a: 6013 str r3, [r2, #0]
-
- /* Disable all interrupts */
- RCC->CIR = 0x00000000;
- 800514c: 4b06 ldr r3, [pc, #24] ; (8005168 <SystemInit+0x60>)
- 800514e: 2200 movs r2, #0
- 8005150: 60da str r2, [r3, #12]
-
- /* Configure the Vector Table location add offset address ------------------*/
-#ifdef VECT_TAB_SRAM
- SCB->VTOR = RAMDTCM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
-#else
- SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
- 8005152: 4b04 ldr r3, [pc, #16] ; (8005164 <SystemInit+0x5c>)
- 8005154: f04f 6200 mov.w r2, #134217728 ; 0x8000000
- 8005158: 609a str r2, [r3, #8]
-#endif
-}
- 800515a: bf00 nop
- 800515c: 46bd mov sp, r7
- 800515e: f85d 7b04 ldr.w r7, [sp], #4
- 8005162: 4770 bx lr
- 8005164: e000ed00 .word 0xe000ed00
- 8005168: 40023800 .word 0x40023800
- 800516c: fef6ffff .word 0xfef6ffff
- 8005170: 24003010 .word 0x24003010
-
-08005174 <_ZN3ros16normalizeSecNSecERmS0_>:
-#include "ros/time.h"
-
-namespace ros
-{
-void normalizeSecNSec(uint32_t& sec, uint32_t& nsec)
-{
- 8005174: b480 push {r7}
- 8005176: b085 sub sp, #20
- 8005178: af00 add r7, sp, #0
- 800517a: 6078 str r0, [r7, #4]
- 800517c: 6039 str r1, [r7, #0]
- uint32_t nsec_part = nsec % 1000000000UL;
- 800517e: 683b ldr r3, [r7, #0]
- 8005180: 681b ldr r3, [r3, #0]
- 8005182: 0a5a lsrs r2, r3, #9
- 8005184: 490f ldr r1, [pc, #60] ; (80051c4 <_ZN3ros16normalizeSecNSecERmS0_+0x50>)
- 8005186: fba1 1202 umull r1, r2, r1, r2
- 800518a: 09d2 lsrs r2, r2, #7
- 800518c: 490e ldr r1, [pc, #56] ; (80051c8 <_ZN3ros16normalizeSecNSecERmS0_+0x54>)
- 800518e: fb01 f202 mul.w r2, r1, r2
- 8005192: 1a9b subs r3, r3, r2
- 8005194: 60fb str r3, [r7, #12]
- uint32_t sec_part = nsec / 1000000000UL;
- 8005196: 683b ldr r3, [r7, #0]
- 8005198: 681b ldr r3, [r3, #0]
- 800519a: 0a5b lsrs r3, r3, #9
- 800519c: 4a09 ldr r2, [pc, #36] ; (80051c4 <_ZN3ros16normalizeSecNSecERmS0_+0x50>)
- 800519e: fba2 2303 umull r2, r3, r2, r3
- 80051a2: 09db lsrs r3, r3, #7
- 80051a4: 60bb str r3, [r7, #8]
- sec += sec_part;
- 80051a6: 687b ldr r3, [r7, #4]
- 80051a8: 681a ldr r2, [r3, #0]
- 80051aa: 68bb ldr r3, [r7, #8]
- 80051ac: 441a add r2, r3
- 80051ae: 687b ldr r3, [r7, #4]
- 80051b0: 601a str r2, [r3, #0]
- nsec = nsec_part;
- 80051b2: 683b ldr r3, [r7, #0]
- 80051b4: 68fa ldr r2, [r7, #12]
- 80051b6: 601a str r2, [r3, #0]
-}
- 80051b8: bf00 nop
- 80051ba: 3714 adds r7, #20
- 80051bc: 46bd mov sp, r7
- 80051be: f85d 7b04 ldr.w r7, [sp], #4
- 80051c2: 4770 bx lr
- 80051c4: 00044b83 .word 0x00044b83
- 80051c8: 3b9aca00 .word 0x3b9aca00
-
-080051cc <Reset_Handler>:
-
- .section .text.Reset_Handler
- .weak Reset_Handler
- .type Reset_Handler, %function
-Reset_Handler:
- ldr sp, =_estack /* set stack pointer */
- 80051cc: f8df d034 ldr.w sp, [pc, #52] ; 8005204 <LoopFillZerobss+0x14>
-
-/* Copy the data segment initializers from flash to SRAM */
- movs r1, #0
- 80051d0: 2100 movs r1, #0
- b LoopCopyDataInit
- 80051d2: e003 b.n 80051dc <LoopCopyDataInit>
-
-080051d4 <CopyDataInit>:
-
-CopyDataInit:
- ldr r3, =_sidata
- 80051d4: 4b0c ldr r3, [pc, #48] ; (8005208 <LoopFillZerobss+0x18>)
- ldr r3, [r3, r1]
- 80051d6: 585b ldr r3, [r3, r1]
- str r3, [r0, r1]
- 80051d8: 5043 str r3, [r0, r1]
- adds r1, r1, #4
- 80051da: 3104 adds r1, #4
-
-080051dc <LoopCopyDataInit>:
-
-LoopCopyDataInit:
- ldr r0, =_sdata
- 80051dc: 480b ldr r0, [pc, #44] ; (800520c <LoopFillZerobss+0x1c>)
- ldr r3, =_edata
- 80051de: 4b0c ldr r3, [pc, #48] ; (8005210 <LoopFillZerobss+0x20>)
- adds r2, r0, r1
- 80051e0: 1842 adds r2, r0, r1
- cmp r2, r3
- 80051e2: 429a cmp r2, r3
- bcc CopyDataInit
- 80051e4: d3f6 bcc.n 80051d4 <CopyDataInit>
- ldr r2, =_sbss
- 80051e6: 4a0b ldr r2, [pc, #44] ; (8005214 <LoopFillZerobss+0x24>)
- b LoopFillZerobss
- 80051e8: e002 b.n 80051f0 <LoopFillZerobss>
-
-080051ea <FillZerobss>:
-/* Zero fill the bss segment. */
-FillZerobss:
- movs r3, #0
- 80051ea: 2300 movs r3, #0
- str r3, [r2], #4
- 80051ec: f842 3b04 str.w r3, [r2], #4
-
-080051f0 <LoopFillZerobss>:
-
-LoopFillZerobss:
- ldr r3, = _ebss
- 80051f0: 4b09 ldr r3, [pc, #36] ; (8005218 <LoopFillZerobss+0x28>)
- cmp r2, r3
- 80051f2: 429a cmp r2, r3
- bcc FillZerobss
- 80051f4: d3f9 bcc.n 80051ea <FillZerobss>
-
-/* Call the clock system initialization function.*/
- bl SystemInit
- 80051f6: f7ff ff87 bl 8005108 <SystemInit>
-/* Call static constructors */
- bl __libc_init_array
- 80051fa: f005 fb0d bl 800a818 <__libc_init_array>
-/* Call the application's entry point.*/
- bl main
- 80051fe: f7fd ff23 bl 8003048 <main>
- bx lr
- 8005202: 4770 bx lr
- ldr sp, =_estack /* set stack pointer */
- 8005204: 20080000 .word 0x20080000
- ldr r3, =_sidata
- 8005208: 0800b73c .word 0x0800b73c
- ldr r0, =_sdata
- 800520c: 20000000 .word 0x20000000
- ldr r3, =_edata
- 8005210: 20000084 .word 0x20000084
- ldr r2, =_sbss
- 8005214: 20000084 .word 0x20000084
- ldr r3, = _ebss
- 8005218: 20001024 .word 0x20001024
-
-0800521c <ADC_IRQHandler>:
- * @retval None
-*/
- .section .text.Default_Handler,"ax",%progbits
-Default_Handler:
-Infinite_Loop:
- b Infinite_Loop
- 800521c: e7fe b.n 800521c <ADC_IRQHandler>
-
-0800521e <HAL_Init>:
- * need to ensure that the SysTick time base is always set to 1 millisecond
- * to have correct HAL operation.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_Init(void)
-{
- 800521e: b580 push {r7, lr}
- 8005220: af00 add r7, sp, #0
-#if (PREFETCH_ENABLE != 0U)
- __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
-#endif /* PREFETCH_ENABLE */
-
- /* Set Interrupt Group Priority */
- HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
- 8005222: 2003 movs r0, #3
- 8005224: f000 f94a bl 80054bc <HAL_NVIC_SetPriorityGrouping>
-
- /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
- HAL_InitTick(TICK_INT_PRIORITY);
- 8005228: 2000 movs r0, #0
- 800522a: f000 f805 bl 8005238 <HAL_InitTick>
-
- /* Init the low level hardware */
- HAL_MspInit();
- 800522e: f7ff fc33 bl 8004a98 <HAL_MspInit>
-
- /* Return function status */
- return HAL_OK;
- 8005232: 2300 movs r3, #0
-}
- 8005234: 4618 mov r0, r3
- 8005236: bd80 pop {r7, pc}
-
-08005238 <HAL_InitTick>:
- * implementation in user file.
- * @param TickPriority Tick interrupt priority.
- * @retval HAL status
- */
-__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
-{
- 8005238: b580 push {r7, lr}
- 800523a: b082 sub sp, #8
- 800523c: af00 add r7, sp, #0
- 800523e: 6078 str r0, [r7, #4]
- /* Configure the SysTick to have interrupt in 1ms time basis*/
- if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
- 8005240: 4b12 ldr r3, [pc, #72] ; (800528c <HAL_InitTick+0x54>)
- 8005242: 681a ldr r2, [r3, #0]
- 8005244: 4b12 ldr r3, [pc, #72] ; (8005290 <HAL_InitTick+0x58>)
- 8005246: 781b ldrb r3, [r3, #0]
- 8005248: 4619 mov r1, r3
- 800524a: f44f 737a mov.w r3, #1000 ; 0x3e8
- 800524e: fbb3 f3f1 udiv r3, r3, r1
- 8005252: fbb2 f3f3 udiv r3, r2, r3
- 8005256: 4618 mov r0, r3
- 8005258: f000 f965 bl 8005526 <HAL_SYSTICK_Config>
- 800525c: 4603 mov r3, r0
- 800525e: 2b00 cmp r3, #0
- 8005260: d001 beq.n 8005266 <HAL_InitTick+0x2e>
- {
- return HAL_ERROR;
- 8005262: 2301 movs r3, #1
- 8005264: e00e b.n 8005284 <HAL_InitTick+0x4c>
- }
-
- /* Configure the SysTick IRQ priority */
- if (TickPriority < (1UL << __NVIC_PRIO_BITS))
- 8005266: 687b ldr r3, [r7, #4]
- 8005268: 2b0f cmp r3, #15
- 800526a: d80a bhi.n 8005282 <HAL_InitTick+0x4a>
- {
- HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
- 800526c: 2200 movs r2, #0
- 800526e: 6879 ldr r1, [r7, #4]
- 8005270: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
- 8005274: f000 f92d bl 80054d2 <HAL_NVIC_SetPriority>
- uwTickPrio = TickPriority;
- 8005278: 4a06 ldr r2, [pc, #24] ; (8005294 <HAL_InitTick+0x5c>)
- 800527a: 687b ldr r3, [r7, #4]
- 800527c: 6013 str r3, [r2, #0]
- {
- return HAL_ERROR;
- }
-
- /* Return function status */
- return HAL_OK;
- 800527e: 2300 movs r3, #0
- 8005280: e000 b.n 8005284 <HAL_InitTick+0x4c>
- return HAL_ERROR;
- 8005282: 2301 movs r3, #1
-}
- 8005284: 4618 mov r0, r3
- 8005286: 3708 adds r7, #8
- 8005288: 46bd mov sp, r7
- 800528a: bd80 pop {r7, pc}
- 800528c: 20000010 .word 0x20000010
- 8005290: 20000018 .word 0x20000018
- 8005294: 20000014 .word 0x20000014
-
-08005298 <HAL_IncTick>:
- * @note This function is declared as __weak to be overwritten in case of other
- * implementations in user file.
- * @retval None
- */
-__weak void HAL_IncTick(void)
-{
- 8005298: b480 push {r7}
- 800529a: af00 add r7, sp, #0
- uwTick += uwTickFreq;
- 800529c: 4b06 ldr r3, [pc, #24] ; (80052b8 <HAL_IncTick+0x20>)
- 800529e: 781b ldrb r3, [r3, #0]
- 80052a0: 461a mov r2, r3
- 80052a2: 4b06 ldr r3, [pc, #24] ; (80052bc <HAL_IncTick+0x24>)
- 80052a4: 681b ldr r3, [r3, #0]
- 80052a6: 4413 add r3, r2
- 80052a8: 4a04 ldr r2, [pc, #16] ; (80052bc <HAL_IncTick+0x24>)
- 80052aa: 6013 str r3, [r2, #0]
-}
- 80052ac: bf00 nop
- 80052ae: 46bd mov sp, r7
- 80052b0: f85d 7b04 ldr.w r7, [sp], #4
- 80052b4: 4770 bx lr
- 80052b6: bf00 nop
- 80052b8: 20000018 .word 0x20000018
- 80052bc: 2000101c .word 0x2000101c
-
-080052c0 <HAL_GetTick>:
- * @note This function is declared as __weak to be overwritten in case of other
- * implementations in user file.
- * @retval tick value
- */
-__weak uint32_t HAL_GetTick(void)
-{
- 80052c0: b480 push {r7}
- 80052c2: af00 add r7, sp, #0
- return uwTick;
- 80052c4: 4b03 ldr r3, [pc, #12] ; (80052d4 <HAL_GetTick+0x14>)
- 80052c6: 681b ldr r3, [r3, #0]
-}
- 80052c8: 4618 mov r0, r3
- 80052ca: 46bd mov sp, r7
- 80052cc: f85d 7b04 ldr.w r7, [sp], #4
- 80052d0: 4770 bx lr
- 80052d2: bf00 nop
- 80052d4: 2000101c .word 0x2000101c
-
-080052d8 <HAL_Delay>:
- * implementations in user file.
- * @param Delay specifies the delay time length, in milliseconds.
- * @retval None
- */
-__weak void HAL_Delay(uint32_t Delay)
-{
- 80052d8: b580 push {r7, lr}
- 80052da: b084 sub sp, #16
- 80052dc: af00 add r7, sp, #0
- 80052de: 6078 str r0, [r7, #4]
- uint32_t tickstart = HAL_GetTick();
- 80052e0: f7ff ffee bl 80052c0 <HAL_GetTick>
- 80052e4: 60b8 str r0, [r7, #8]
- uint32_t wait = Delay;
- 80052e6: 687b ldr r3, [r7, #4]
- 80052e8: 60fb str r3, [r7, #12]
-
- /* Add a freq to guarantee minimum wait */
- if (wait < HAL_MAX_DELAY)
- 80052ea: 68fb ldr r3, [r7, #12]
- 80052ec: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff
- 80052f0: d005 beq.n 80052fe <HAL_Delay+0x26>
- {
- wait += (uint32_t)(uwTickFreq);
- 80052f2: 4b09 ldr r3, [pc, #36] ; (8005318 <HAL_Delay+0x40>)
- 80052f4: 781b ldrb r3, [r3, #0]
- 80052f6: 461a mov r2, r3
- 80052f8: 68fb ldr r3, [r7, #12]
- 80052fa: 4413 add r3, r2
- 80052fc: 60fb str r3, [r7, #12]
- }
-
- while ((HAL_GetTick() - tickstart) < wait)
- 80052fe: bf00 nop
- 8005300: f7ff ffde bl 80052c0 <HAL_GetTick>
- 8005304: 4602 mov r2, r0
- 8005306: 68bb ldr r3, [r7, #8]
- 8005308: 1ad3 subs r3, r2, r3
- 800530a: 68fa ldr r2, [r7, #12]
- 800530c: 429a cmp r2, r3
- 800530e: d8f7 bhi.n 8005300 <HAL_Delay+0x28>
- {
- }
-}
- 8005310: bf00 nop
- 8005312: 3710 adds r7, #16
- 8005314: 46bd mov sp, r7
- 8005316: bd80 pop {r7, pc}
- 8005318: 20000018 .word 0x20000018
-
-0800531c <__NVIC_SetPriorityGrouping>:
- In case of a conflict between priority grouping and available
- priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
- \param [in] PriorityGroup Priority grouping field.
- */
-__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
-{
- 800531c: b480 push {r7}
- 800531e: b085 sub sp, #20
- 8005320: af00 add r7, sp, #0
- 8005322: 6078 str r0, [r7, #4]
- uint32_t reg_value;
- uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
- 8005324: 687b ldr r3, [r7, #4]
- 8005326: f003 0307 and.w r3, r3, #7
- 800532a: 60fb str r3, [r7, #12]
-
- reg_value = SCB->AIRCR; /* read old register configuration */
- 800532c: 4b0b ldr r3, [pc, #44] ; (800535c <__NVIC_SetPriorityGrouping+0x40>)
- 800532e: 68db ldr r3, [r3, #12]
- 8005330: 60bb str r3, [r7, #8]
- reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
- 8005332: 68ba ldr r2, [r7, #8]
- 8005334: f64f 03ff movw r3, #63743 ; 0xf8ff
- 8005338: 4013 ands r3, r2
- 800533a: 60bb str r3, [r7, #8]
- reg_value = (reg_value |
- ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
- (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */
- 800533c: 68fb ldr r3, [r7, #12]
- 800533e: 021a lsls r2, r3, #8
- ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
- 8005340: 68bb ldr r3, [r7, #8]
- 8005342: 431a orrs r2, r3
- reg_value = (reg_value |
- 8005344: 4b06 ldr r3, [pc, #24] ; (8005360 <__NVIC_SetPriorityGrouping+0x44>)
- 8005346: 4313 orrs r3, r2
- 8005348: 60bb str r3, [r7, #8]
- SCB->AIRCR = reg_value;
- 800534a: 4a04 ldr r2, [pc, #16] ; (800535c <__NVIC_SetPriorityGrouping+0x40>)
- 800534c: 68bb ldr r3, [r7, #8]
- 800534e: 60d3 str r3, [r2, #12]
-}
- 8005350: bf00 nop
- 8005352: 3714 adds r7, #20
- 8005354: 46bd mov sp, r7
- 8005356: f85d 7b04 ldr.w r7, [sp], #4
- 800535a: 4770 bx lr
- 800535c: e000ed00 .word 0xe000ed00
- 8005360: 05fa0000 .word 0x05fa0000
-
-08005364 <__NVIC_GetPriorityGrouping>:
- \brief Get Priority Grouping
- \details Reads the priority grouping field from the NVIC Interrupt Controller.
- \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
- */
-__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
-{
- 8005364: b480 push {r7}
- 8005366: af00 add r7, sp, #0
- return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
- 8005368: 4b04 ldr r3, [pc, #16] ; (800537c <__NVIC_GetPriorityGrouping+0x18>)
- 800536a: 68db ldr r3, [r3, #12]
- 800536c: 0a1b lsrs r3, r3, #8
- 800536e: f003 0307 and.w r3, r3, #7
-}
- 8005372: 4618 mov r0, r3
- 8005374: 46bd mov sp, r7
- 8005376: f85d 7b04 ldr.w r7, [sp], #4
- 800537a: 4770 bx lr
- 800537c: e000ed00 .word 0xe000ed00
-
-08005380 <__NVIC_EnableIRQ>:
- \details Enables a device specific interrupt in the NVIC interrupt controller.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
-{
- 8005380: b480 push {r7}
- 8005382: b083 sub sp, #12
- 8005384: af00 add r7, sp, #0
- 8005386: 4603 mov r3, r0
- 8005388: 71fb strb r3, [r7, #7]
- if ((int32_t)(IRQn) >= 0)
- 800538a: f997 3007 ldrsb.w r3, [r7, #7]
- 800538e: 2b00 cmp r3, #0
- 8005390: db0b blt.n 80053aa <__NVIC_EnableIRQ+0x2a>
- {
- NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- 8005392: 79fb ldrb r3, [r7, #7]
- 8005394: f003 021f and.w r2, r3, #31
- 8005398: 4907 ldr r1, [pc, #28] ; (80053b8 <__NVIC_EnableIRQ+0x38>)
- 800539a: f997 3007 ldrsb.w r3, [r7, #7]
- 800539e: 095b lsrs r3, r3, #5
- 80053a0: 2001 movs r0, #1
- 80053a2: fa00 f202 lsl.w r2, r0, r2
- 80053a6: f841 2023 str.w r2, [r1, r3, lsl #2]
- }
-}
- 80053aa: bf00 nop
- 80053ac: 370c adds r7, #12
- 80053ae: 46bd mov sp, r7
- 80053b0: f85d 7b04 ldr.w r7, [sp], #4
- 80053b4: 4770 bx lr
- 80053b6: bf00 nop
- 80053b8: e000e100 .word 0xe000e100
-
-080053bc <__NVIC_SetPriority>:
- \param [in] IRQn Interrupt number.
- \param [in] priority Priority to set.
- \note The priority cannot be set for every processor exception.
- */
-__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
- 80053bc: b480 push {r7}
- 80053be: b083 sub sp, #12
- 80053c0: af00 add r7, sp, #0
- 80053c2: 4603 mov r3, r0
- 80053c4: 6039 str r1, [r7, #0]
- 80053c6: 71fb strb r3, [r7, #7]
- if ((int32_t)(IRQn) >= 0)
- 80053c8: f997 3007 ldrsb.w r3, [r7, #7]
- 80053cc: 2b00 cmp r3, #0
- 80053ce: db0a blt.n 80053e6 <__NVIC_SetPriority+0x2a>
- {
- NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
- 80053d0: 683b ldr r3, [r7, #0]
- 80053d2: b2da uxtb r2, r3
- 80053d4: 490c ldr r1, [pc, #48] ; (8005408 <__NVIC_SetPriority+0x4c>)
- 80053d6: f997 3007 ldrsb.w r3, [r7, #7]
- 80053da: 0112 lsls r2, r2, #4
- 80053dc: b2d2 uxtb r2, r2
- 80053de: 440b add r3, r1
- 80053e0: f883 2300 strb.w r2, [r3, #768] ; 0x300
- }
- else
- {
- SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
- }
-}
- 80053e4: e00a b.n 80053fc <__NVIC_SetPriority+0x40>
- SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
- 80053e6: 683b ldr r3, [r7, #0]
- 80053e8: b2da uxtb r2, r3
- 80053ea: 4908 ldr r1, [pc, #32] ; (800540c <__NVIC_SetPriority+0x50>)
- 80053ec: 79fb ldrb r3, [r7, #7]
- 80053ee: f003 030f and.w r3, r3, #15
- 80053f2: 3b04 subs r3, #4
- 80053f4: 0112 lsls r2, r2, #4
- 80053f6: b2d2 uxtb r2, r2
- 80053f8: 440b add r3, r1
- 80053fa: 761a strb r2, [r3, #24]
-}
- 80053fc: bf00 nop
- 80053fe: 370c adds r7, #12
- 8005400: 46bd mov sp, r7
- 8005402: f85d 7b04 ldr.w r7, [sp], #4
- 8005406: 4770 bx lr
- 8005408: e000e100 .word 0xe000e100
- 800540c: e000ed00 .word 0xe000ed00
-
-08005410 <NVIC_EncodePriority>:
- \param [in] PreemptPriority Preemptive priority value (starting from 0).
- \param [in] SubPriority Subpriority value (starting from 0).
- \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
- */
-__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
-{
- 8005410: b480 push {r7}
- 8005412: b089 sub sp, #36 ; 0x24
- 8005414: af00 add r7, sp, #0
- 8005416: 60f8 str r0, [r7, #12]
- 8005418: 60b9 str r1, [r7, #8]
- 800541a: 607a str r2, [r7, #4]
- uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
- 800541c: 68fb ldr r3, [r7, #12]
- 800541e: f003 0307 and.w r3, r3, #7
- 8005422: 61fb str r3, [r7, #28]
- uint32_t PreemptPriorityBits;
- uint32_t SubPriorityBits;
-
- PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
- 8005424: 69fb ldr r3, [r7, #28]
- 8005426: f1c3 0307 rsb r3, r3, #7
- 800542a: 2b04 cmp r3, #4
- 800542c: bf28 it cs
- 800542e: 2304 movcs r3, #4
- 8005430: 61bb str r3, [r7, #24]
- SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
- 8005432: 69fb ldr r3, [r7, #28]
- 8005434: 3304 adds r3, #4
- 8005436: 2b06 cmp r3, #6
- 8005438: d902 bls.n 8005440 <NVIC_EncodePriority+0x30>
- 800543a: 69fb ldr r3, [r7, #28]
- 800543c: 3b03 subs r3, #3
- 800543e: e000 b.n 8005442 <NVIC_EncodePriority+0x32>
- 8005440: 2300 movs r3, #0
- 8005442: 617b str r3, [r7, #20]
-
- return (
- ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
- 8005444: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff
- 8005448: 69bb ldr r3, [r7, #24]
- 800544a: fa02 f303 lsl.w r3, r2, r3
- 800544e: 43da mvns r2, r3
- 8005450: 68bb ldr r3, [r7, #8]
- 8005452: 401a ands r2, r3
- 8005454: 697b ldr r3, [r7, #20]
- 8005456: 409a lsls r2, r3
- ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
- 8005458: f04f 31ff mov.w r1, #4294967295 ; 0xffffffff
- 800545c: 697b ldr r3, [r7, #20]
- 800545e: fa01 f303 lsl.w r3, r1, r3
- 8005462: 43d9 mvns r1, r3
- 8005464: 687b ldr r3, [r7, #4]
- 8005466: 400b ands r3, r1
- ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
- 8005468: 4313 orrs r3, r2
- );
-}
- 800546a: 4618 mov r0, r3
- 800546c: 3724 adds r7, #36 ; 0x24
- 800546e: 46bd mov sp, r7
- 8005470: f85d 7b04 ldr.w r7, [sp], #4
- 8005474: 4770 bx lr
- ...
-
-08005478 <SysTick_Config>:
- \note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
- function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
- must contain a vendor-specific implementation of this function.
- */
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
-{
- 8005478: b580 push {r7, lr}
- 800547a: b082 sub sp, #8
- 800547c: af00 add r7, sp, #0
- 800547e: 6078 str r0, [r7, #4]
- if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
- 8005480: 687b ldr r3, [r7, #4]
- 8005482: 3b01 subs r3, #1
- 8005484: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000
- 8005488: d301 bcc.n 800548e <SysTick_Config+0x16>
- {
- return (1UL); /* Reload value impossible */
- 800548a: 2301 movs r3, #1
- 800548c: e00f b.n 80054ae <SysTick_Config+0x36>
- }
-
- SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
- 800548e: 4a0a ldr r2, [pc, #40] ; (80054b8 <SysTick_Config+0x40>)
- 8005490: 687b ldr r3, [r7, #4]
- 8005492: 3b01 subs r3, #1
- 8005494: 6053 str r3, [r2, #4]
- NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
- 8005496: 210f movs r1, #15
- 8005498: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
- 800549c: f7ff ff8e bl 80053bc <__NVIC_SetPriority>
- SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
- 80054a0: 4b05 ldr r3, [pc, #20] ; (80054b8 <SysTick_Config+0x40>)
- 80054a2: 2200 movs r2, #0
- 80054a4: 609a str r2, [r3, #8]
- SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
- 80054a6: 4b04 ldr r3, [pc, #16] ; (80054b8 <SysTick_Config+0x40>)
- 80054a8: 2207 movs r2, #7
- 80054aa: 601a str r2, [r3, #0]
- SysTick_CTRL_TICKINT_Msk |
- SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
- return (0UL); /* Function successful */
- 80054ac: 2300 movs r3, #0
-}
- 80054ae: 4618 mov r0, r3
- 80054b0: 3708 adds r7, #8
- 80054b2: 46bd mov sp, r7
- 80054b4: bd80 pop {r7, pc}
- 80054b6: bf00 nop
- 80054b8: e000e010 .word 0xe000e010
-
-080054bc <HAL_NVIC_SetPriorityGrouping>:
- * @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible.
- * The pending IRQ priority will be managed only by the subpriority.
- * @retval None
- */
-void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
-{
- 80054bc: b580 push {r7, lr}
- 80054be: b082 sub sp, #8
- 80054c0: af00 add r7, sp, #0
- 80054c2: 6078 str r0, [r7, #4]
- /* Check the parameters */
- assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
-
- /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
- NVIC_SetPriorityGrouping(PriorityGroup);
- 80054c4: 6878 ldr r0, [r7, #4]
- 80054c6: f7ff ff29 bl 800531c <__NVIC_SetPriorityGrouping>
-}
- 80054ca: bf00 nop
- 80054cc: 3708 adds r7, #8
- 80054ce: 46bd mov sp, r7
- 80054d0: bd80 pop {r7, pc}
-
-080054d2 <HAL_NVIC_SetPriority>:
- * This parameter can be a value between 0 and 15
- * A lower priority value indicates a higher priority.
- * @retval None
- */
-void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
-{
- 80054d2: b580 push {r7, lr}
- 80054d4: b086 sub sp, #24
- 80054d6: af00 add r7, sp, #0
- 80054d8: 4603 mov r3, r0
- 80054da: 60b9 str r1, [r7, #8]
- 80054dc: 607a str r2, [r7, #4]
- 80054de: 73fb strb r3, [r7, #15]
- uint32_t prioritygroup = 0x00;
- 80054e0: 2300 movs r3, #0
- 80054e2: 617b str r3, [r7, #20]
-
- /* Check the parameters */
- assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
- assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
-
- prioritygroup = NVIC_GetPriorityGrouping();
- 80054e4: f7ff ff3e bl 8005364 <__NVIC_GetPriorityGrouping>
- 80054e8: 6178 str r0, [r7, #20]
-
- NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
- 80054ea: 687a ldr r2, [r7, #4]
- 80054ec: 68b9 ldr r1, [r7, #8]
- 80054ee: 6978 ldr r0, [r7, #20]
- 80054f0: f7ff ff8e bl 8005410 <NVIC_EncodePriority>
- 80054f4: 4602 mov r2, r0
- 80054f6: f997 300f ldrsb.w r3, [r7, #15]
- 80054fa: 4611 mov r1, r2
- 80054fc: 4618 mov r0, r3
- 80054fe: f7ff ff5d bl 80053bc <__NVIC_SetPriority>
-}
- 8005502: bf00 nop
- 8005504: 3718 adds r7, #24
- 8005506: 46bd mov sp, r7
- 8005508: bd80 pop {r7, pc}
-
-0800550a <HAL_NVIC_EnableIRQ>:
- * This parameter can be an enumerator of IRQn_Type enumeration
- * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f7xxxx.h))
- * @retval None
- */
-void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
-{
- 800550a: b580 push {r7, lr}
- 800550c: b082 sub sp, #8
- 800550e: af00 add r7, sp, #0
- 8005510: 4603 mov r3, r0
- 8005512: 71fb strb r3, [r7, #7]
- /* Check the parameters */
- assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
-
- /* Enable interrupt */
- NVIC_EnableIRQ(IRQn);
- 8005514: f997 3007 ldrsb.w r3, [r7, #7]
- 8005518: 4618 mov r0, r3
- 800551a: f7ff ff31 bl 8005380 <__NVIC_EnableIRQ>
-}
- 800551e: bf00 nop
- 8005520: 3708 adds r7, #8
- 8005522: 46bd mov sp, r7
- 8005524: bd80 pop {r7, pc}
-
-08005526 <HAL_SYSTICK_Config>:
- * @param TicksNumb Specifies the ticks Number of ticks between two interrupts.
- * @retval status: - 0 Function succeeded.
- * - 1 Function failed.
- */
-uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
-{
- 8005526: b580 push {r7, lr}
- 8005528: b082 sub sp, #8
- 800552a: af00 add r7, sp, #0
- 800552c: 6078 str r0, [r7, #4]
- return SysTick_Config(TicksNumb);
- 800552e: 6878 ldr r0, [r7, #4]
- 8005530: f7ff ffa2 bl 8005478 <SysTick_Config>
- 8005534: 4603 mov r3, r0
-}
- 8005536: 4618 mov r0, r3
- 8005538: 3708 adds r7, #8
- 800553a: 46bd mov sp, r7
- 800553c: bd80 pop {r7, pc}
- ...
-
-08005540 <HAL_DMA_Init>:
- * @param hdma Pointer to a DMA_HandleTypeDef structure that contains
- * the configuration information for the specified DMA Stream.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
-{
- 8005540: b580 push {r7, lr}
- 8005542: b086 sub sp, #24
- 8005544: af00 add r7, sp, #0
- 8005546: 6078 str r0, [r7, #4]
- uint32_t tmp = 0U;
- 8005548: 2300 movs r3, #0
- 800554a: 617b str r3, [r7, #20]
- uint32_t tickstart = HAL_GetTick();
- 800554c: f7ff feb8 bl 80052c0 <HAL_GetTick>
- 8005550: 6138 str r0, [r7, #16]
- DMA_Base_Registers *regs;
-
- /* Check the DMA peripheral state */
- if(hdma == NULL)
- 8005552: 687b ldr r3, [r7, #4]
- 8005554: 2b00 cmp r3, #0
- 8005556: d101 bne.n 800555c <HAL_DMA_Init+0x1c>
- {
- return HAL_ERROR;
- 8005558: 2301 movs r3, #1
- 800555a: e099 b.n 8005690 <HAL_DMA_Init+0x150>
- assert_param(IS_DMA_MEMORY_BURST(hdma->Init.MemBurst));
- assert_param(IS_DMA_PERIPHERAL_BURST(hdma->Init.PeriphBurst));
- }
-
- /* Allocate lock resource */
- __HAL_UNLOCK(hdma);
- 800555c: 687b ldr r3, [r7, #4]
- 800555e: 2200 movs r2, #0
- 8005560: f883 2034 strb.w r2, [r3, #52] ; 0x34
-
- /* Change DMA peripheral state */
- hdma->State = HAL_DMA_STATE_BUSY;
- 8005564: 687b ldr r3, [r7, #4]
- 8005566: 2202 movs r2, #2
- 8005568: f883 2035 strb.w r2, [r3, #53] ; 0x35
-
- /* Disable the peripheral */
- __HAL_DMA_DISABLE(hdma);
- 800556c: 687b ldr r3, [r7, #4]
- 800556e: 681b ldr r3, [r3, #0]
- 8005570: 681a ldr r2, [r3, #0]
- 8005572: 687b ldr r3, [r7, #4]
- 8005574: 681b ldr r3, [r3, #0]
- 8005576: f022 0201 bic.w r2, r2, #1
- 800557a: 601a str r2, [r3, #0]
-
- /* Check if the DMA Stream is effectively disabled */
- while((hdma->Instance->CR & DMA_SxCR_EN) != RESET)
- 800557c: e00f b.n 800559e <HAL_DMA_Init+0x5e>
- {
- /* Check for the Timeout */
- if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA_ABORT)
- 800557e: f7ff fe9f bl 80052c0 <HAL_GetTick>
- 8005582: 4602 mov r2, r0
- 8005584: 693b ldr r3, [r7, #16]
- 8005586: 1ad3 subs r3, r2, r3
- 8005588: 2b05 cmp r3, #5
- 800558a: d908 bls.n 800559e <HAL_DMA_Init+0x5e>
- {
- /* Update error code */
- hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT;
- 800558c: 687b ldr r3, [r7, #4]
- 800558e: 2220 movs r2, #32
- 8005590: 655a str r2, [r3, #84] ; 0x54
-
- /* Change the DMA state */
- hdma->State = HAL_DMA_STATE_TIMEOUT;
- 8005592: 687b ldr r3, [r7, #4]
- 8005594: 2203 movs r2, #3
- 8005596: f883 2035 strb.w r2, [r3, #53] ; 0x35
-
- return HAL_TIMEOUT;
- 800559a: 2303 movs r3, #3
- 800559c: e078 b.n 8005690 <HAL_DMA_Init+0x150>
- while((hdma->Instance->CR & DMA_SxCR_EN) != RESET)
- 800559e: 687b ldr r3, [r7, #4]
- 80055a0: 681b ldr r3, [r3, #0]
- 80055a2: 681b ldr r3, [r3, #0]
- 80055a4: f003 0301 and.w r3, r3, #1
- 80055a8: 2b00 cmp r3, #0
- 80055aa: d1e8 bne.n 800557e <HAL_DMA_Init+0x3e>
- }
- }
-
- /* Get the CR register value */
- tmp = hdma->Instance->CR;
- 80055ac: 687b ldr r3, [r7, #4]
- 80055ae: 681b ldr r3, [r3, #0]
- 80055b0: 681b ldr r3, [r3, #0]
- 80055b2: 617b str r3, [r7, #20]
-
- /* Clear CHSEL, MBURST, PBURST, PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR, CT and DBM bits */
- tmp &= ((uint32_t)~(DMA_SxCR_CHSEL | DMA_SxCR_MBURST | DMA_SxCR_PBURST | \
- 80055b4: 697a ldr r2, [r7, #20]
- 80055b6: 4b38 ldr r3, [pc, #224] ; (8005698 <HAL_DMA_Init+0x158>)
- 80055b8: 4013 ands r3, r2
- 80055ba: 617b str r3, [r7, #20]
- DMA_SxCR_PL | DMA_SxCR_MSIZE | DMA_SxCR_PSIZE | \
- DMA_SxCR_MINC | DMA_SxCR_PINC | DMA_SxCR_CIRC | \
- DMA_SxCR_DIR | DMA_SxCR_CT | DMA_SxCR_DBM));
-
- /* Prepare the DMA Stream configuration */
- tmp |= hdma->Init.Channel | hdma->Init.Direction |
- 80055bc: 687b ldr r3, [r7, #4]
- 80055be: 685a ldr r2, [r3, #4]
- 80055c0: 687b ldr r3, [r7, #4]
- 80055c2: 689b ldr r3, [r3, #8]
- 80055c4: 431a orrs r2, r3
- hdma->Init.PeriphInc | hdma->Init.MemInc |
- 80055c6: 687b ldr r3, [r7, #4]
- 80055c8: 68db ldr r3, [r3, #12]
- tmp |= hdma->Init.Channel | hdma->Init.Direction |
- 80055ca: 431a orrs r2, r3
- hdma->Init.PeriphInc | hdma->Init.MemInc |
- 80055cc: 687b ldr r3, [r7, #4]
- 80055ce: 691b ldr r3, [r3, #16]
- 80055d0: 431a orrs r2, r3
- hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
- 80055d2: 687b ldr r3, [r7, #4]
- 80055d4: 695b ldr r3, [r3, #20]
- hdma->Init.PeriphInc | hdma->Init.MemInc |
- 80055d6: 431a orrs r2, r3
- hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
- 80055d8: 687b ldr r3, [r7, #4]
- 80055da: 699b ldr r3, [r3, #24]
- 80055dc: 431a orrs r2, r3
- hdma->Init.Mode | hdma->Init.Priority;
- 80055de: 687b ldr r3, [r7, #4]
- 80055e0: 69db ldr r3, [r3, #28]
- hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
- 80055e2: 431a orrs r2, r3
- hdma->Init.Mode | hdma->Init.Priority;
- 80055e4: 687b ldr r3, [r7, #4]
- 80055e6: 6a1b ldr r3, [r3, #32]
- 80055e8: 4313 orrs r3, r2
- tmp |= hdma->Init.Channel | hdma->Init.Direction |
- 80055ea: 697a ldr r2, [r7, #20]
- 80055ec: 4313 orrs r3, r2
- 80055ee: 617b str r3, [r7, #20]
-
- /* the Memory burst and peripheral burst are not used when the FIFO is disabled */
- if(hdma->Init.FIFOMode == DMA_FIFOMODE_ENABLE)
- 80055f0: 687b ldr r3, [r7, #4]
- 80055f2: 6a5b ldr r3, [r3, #36] ; 0x24
- 80055f4: 2b04 cmp r3, #4
- 80055f6: d107 bne.n 8005608 <HAL_DMA_Init+0xc8>
- {
- /* Get memory burst and peripheral burst */
- tmp |= hdma->Init.MemBurst | hdma->Init.PeriphBurst;
- 80055f8: 687b ldr r3, [r7, #4]
- 80055fa: 6ada ldr r2, [r3, #44] ; 0x2c
- 80055fc: 687b ldr r3, [r7, #4]
- 80055fe: 6b1b ldr r3, [r3, #48] ; 0x30
- 8005600: 4313 orrs r3, r2
- 8005602: 697a ldr r2, [r7, #20]
- 8005604: 4313 orrs r3, r2
- 8005606: 617b str r3, [r7, #20]
- }
-
- /* Write to DMA Stream CR register */
- hdma->Instance->CR = tmp;
- 8005608: 687b ldr r3, [r7, #4]
- 800560a: 681b ldr r3, [r3, #0]
- 800560c: 697a ldr r2, [r7, #20]
- 800560e: 601a str r2, [r3, #0]
-
- /* Get the FCR register value */
- tmp = hdma->Instance->FCR;
- 8005610: 687b ldr r3, [r7, #4]
- 8005612: 681b ldr r3, [r3, #0]
- 8005614: 695b ldr r3, [r3, #20]
- 8005616: 617b str r3, [r7, #20]
-
- /* Clear Direct mode and FIFO threshold bits */
- tmp &= (uint32_t)~(DMA_SxFCR_DMDIS | DMA_SxFCR_FTH);
- 8005618: 697b ldr r3, [r7, #20]
- 800561a: f023 0307 bic.w r3, r3, #7
- 800561e: 617b str r3, [r7, #20]
-
- /* Prepare the DMA Stream FIFO configuration */
- tmp |= hdma->Init.FIFOMode;
- 8005620: 687b ldr r3, [r7, #4]
- 8005622: 6a5b ldr r3, [r3, #36] ; 0x24
- 8005624: 697a ldr r2, [r7, #20]
- 8005626: 4313 orrs r3, r2
- 8005628: 617b str r3, [r7, #20]
-
- /* The FIFO threshold is not used when the FIFO mode is disabled */
- if(hdma->Init.FIFOMode == DMA_FIFOMODE_ENABLE)
- 800562a: 687b ldr r3, [r7, #4]
- 800562c: 6a5b ldr r3, [r3, #36] ; 0x24
- 800562e: 2b04 cmp r3, #4
- 8005630: d117 bne.n 8005662 <HAL_DMA_Init+0x122>
- {
- /* Get the FIFO threshold */
- tmp |= hdma->Init.FIFOThreshold;
- 8005632: 687b ldr r3, [r7, #4]
- 8005634: 6a9b ldr r3, [r3, #40] ; 0x28
- 8005636: 697a ldr r2, [r7, #20]
- 8005638: 4313 orrs r3, r2
- 800563a: 617b str r3, [r7, #20]
-
- /* Check compatibility between FIFO threshold level and size of the memory burst */
- /* for INCR4, INCR8, INCR16 bursts */
- if (hdma->Init.MemBurst != DMA_MBURST_SINGLE)
- 800563c: 687b ldr r3, [r7, #4]
- 800563e: 6adb ldr r3, [r3, #44] ; 0x2c
- 8005640: 2b00 cmp r3, #0
- 8005642: d00e beq.n 8005662 <HAL_DMA_Init+0x122>
- {
- if (DMA_CheckFifoParam(hdma) != HAL_OK)
- 8005644: 6878 ldr r0, [r7, #4]
- 8005646: f000 fa99 bl 8005b7c <DMA_CheckFifoParam>
- 800564a: 4603 mov r3, r0
- 800564c: 2b00 cmp r3, #0
- 800564e: d008 beq.n 8005662 <HAL_DMA_Init+0x122>
- {
- /* Update error code */
- hdma->ErrorCode = HAL_DMA_ERROR_PARAM;
- 8005650: 687b ldr r3, [r7, #4]
- 8005652: 2240 movs r2, #64 ; 0x40
- 8005654: 655a str r2, [r3, #84] ; 0x54
-
- /* Change the DMA state */
- hdma->State = HAL_DMA_STATE_READY;
- 8005656: 687b ldr r3, [r7, #4]
- 8005658: 2201 movs r2, #1
- 800565a: f883 2035 strb.w r2, [r3, #53] ; 0x35
-
- return HAL_ERROR;
- 800565e: 2301 movs r3, #1
- 8005660: e016 b.n 8005690 <HAL_DMA_Init+0x150>
- }
- }
- }
-
- /* Write to DMA Stream FCR */
- hdma->Instance->FCR = tmp;
- 8005662: 687b ldr r3, [r7, #4]
- 8005664: 681b ldr r3, [r3, #0]
- 8005666: 697a ldr r2, [r7, #20]
- 8005668: 615a str r2, [r3, #20]
-
- /* Initialize StreamBaseAddress and StreamIndex parameters to be used to calculate
- DMA steam Base Address needed by HAL_DMA_IRQHandler() and HAL_DMA_PollForTransfer() */
- regs = (DMA_Base_Registers *)DMA_CalcBaseAndBitshift(hdma);
- 800566a: 6878 ldr r0, [r7, #4]
- 800566c: f000 fa50 bl 8005b10 <DMA_CalcBaseAndBitshift>
- 8005670: 4603 mov r3, r0
- 8005672: 60fb str r3, [r7, #12]
-
- /* Clear all interrupt flags */
- regs->IFCR = 0x3FU << hdma->StreamIndex;
- 8005674: 687b ldr r3, [r7, #4]
- 8005676: 6ddb ldr r3, [r3, #92] ; 0x5c
- 8005678: 223f movs r2, #63 ; 0x3f
- 800567a: 409a lsls r2, r3
- 800567c: 68fb ldr r3, [r7, #12]
- 800567e: 609a str r2, [r3, #8]
-
- /* Initialize the error code */
- hdma->ErrorCode = HAL_DMA_ERROR_NONE;
- 8005680: 687b ldr r3, [r7, #4]
- 8005682: 2200 movs r2, #0
- 8005684: 655a str r2, [r3, #84] ; 0x54
-
- /* Initialize the DMA state */
- hdma->State = HAL_DMA_STATE_READY;
- 8005686: 687b ldr r3, [r7, #4]
- 8005688: 2201 movs r2, #1
- 800568a: f883 2035 strb.w r2, [r3, #53] ; 0x35
-
- return HAL_OK;
- 800568e: 2300 movs r3, #0
-}
- 8005690: 4618 mov r0, r3
- 8005692: 3718 adds r7, #24
- 8005694: 46bd mov sp, r7
- 8005696: bd80 pop {r7, pc}
- 8005698: e010803f .word 0xe010803f
-
-0800569c <HAL_DMA_Start_IT>:
- * @param DstAddress The destination memory Buffer address
- * @param DataLength The length of data to be transferred from source to destination
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
-{
- 800569c: b580 push {r7, lr}
- 800569e: b086 sub sp, #24
- 80056a0: af00 add r7, sp, #0
- 80056a2: 60f8 str r0, [r7, #12]
- 80056a4: 60b9 str r1, [r7, #8]
- 80056a6: 607a str r2, [r7, #4]
- 80056a8: 603b str r3, [r7, #0]
- HAL_StatusTypeDef status = HAL_OK;
- 80056aa: 2300 movs r3, #0
- 80056ac: 75fb strb r3, [r7, #23]
-
- /* calculate DMA base and stream number */
- DMA_Base_Registers *regs = (DMA_Base_Registers *)hdma->StreamBaseAddress;
- 80056ae: 68fb ldr r3, [r7, #12]
- 80056b0: 6d9b ldr r3, [r3, #88] ; 0x58
- 80056b2: 613b str r3, [r7, #16]
-
- /* Check the parameters */
- assert_param(IS_DMA_BUFFER_SIZE(DataLength));
-
- /* Process locked */
- __HAL_LOCK(hdma);
- 80056b4: 68fb ldr r3, [r7, #12]
- 80056b6: f893 3034 ldrb.w r3, [r3, #52] ; 0x34
- 80056ba: 2b01 cmp r3, #1
- 80056bc: d101 bne.n 80056c2 <HAL_DMA_Start_IT+0x26>
- 80056be: 2302 movs r3, #2
- 80056c0: e048 b.n 8005754 <HAL_DMA_Start_IT+0xb8>
- 80056c2: 68fb ldr r3, [r7, #12]
- 80056c4: 2201 movs r2, #1
- 80056c6: f883 2034 strb.w r2, [r3, #52] ; 0x34
-
- if(HAL_DMA_STATE_READY == hdma->State)
- 80056ca: 68fb ldr r3, [r7, #12]
- 80056cc: f893 3035 ldrb.w r3, [r3, #53] ; 0x35
- 80056d0: b2db uxtb r3, r3
- 80056d2: 2b01 cmp r3, #1
- 80056d4: d137 bne.n 8005746 <HAL_DMA_Start_IT+0xaa>
- {
- /* Change DMA peripheral state */
- hdma->State = HAL_DMA_STATE_BUSY;
- 80056d6: 68fb ldr r3, [r7, #12]
- 80056d8: 2202 movs r2, #2
- 80056da: f883 2035 strb.w r2, [r3, #53] ; 0x35
-
- /* Initialize the error code */
- hdma->ErrorCode = HAL_DMA_ERROR_NONE;
- 80056de: 68fb ldr r3, [r7, #12]
- 80056e0: 2200 movs r2, #0
- 80056e2: 655a str r2, [r3, #84] ; 0x54
-
- /* Configure the source, destination address and the data length */
- DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
- 80056e4: 683b ldr r3, [r7, #0]
- 80056e6: 687a ldr r2, [r7, #4]
- 80056e8: 68b9 ldr r1, [r7, #8]
- 80056ea: 68f8 ldr r0, [r7, #12]
- 80056ec: f000 f9e2 bl 8005ab4 <DMA_SetConfig>
-
- /* Clear all interrupt flags at correct offset within the register */
- regs->IFCR = 0x3FU << hdma->StreamIndex;
- 80056f0: 68fb ldr r3, [r7, #12]
- 80056f2: 6ddb ldr r3, [r3, #92] ; 0x5c
- 80056f4: 223f movs r2, #63 ; 0x3f
- 80056f6: 409a lsls r2, r3
- 80056f8: 693b ldr r3, [r7, #16]
- 80056fa: 609a str r2, [r3, #8]
-
- /* Enable Common interrupts*/
- hdma->Instance->CR |= DMA_IT_TC | DMA_IT_TE | DMA_IT_DME;
- 80056fc: 68fb ldr r3, [r7, #12]
- 80056fe: 681b ldr r3, [r3, #0]
- 8005700: 681a ldr r2, [r3, #0]
- 8005702: 68fb ldr r3, [r7, #12]
- 8005704: 681b ldr r3, [r3, #0]
- 8005706: f042 0216 orr.w r2, r2, #22
- 800570a: 601a str r2, [r3, #0]
- hdma->Instance->FCR |= DMA_IT_FE;
- 800570c: 68fb ldr r3, [r7, #12]
- 800570e: 681b ldr r3, [r3, #0]
- 8005710: 695a ldr r2, [r3, #20]
- 8005712: 68fb ldr r3, [r7, #12]
- 8005714: 681b ldr r3, [r3, #0]
- 8005716: f042 0280 orr.w r2, r2, #128 ; 0x80
- 800571a: 615a str r2, [r3, #20]
-
- if(hdma->XferHalfCpltCallback != NULL)
- 800571c: 68fb ldr r3, [r7, #12]
- 800571e: 6c1b ldr r3, [r3, #64] ; 0x40
- 8005720: 2b00 cmp r3, #0
- 8005722: d007 beq.n 8005734 <HAL_DMA_Start_IT+0x98>
- {
- hdma->Instance->CR |= DMA_IT_HT;
- 8005724: 68fb ldr r3, [r7, #12]
- 8005726: 681b ldr r3, [r3, #0]
- 8005728: 681a ldr r2, [r3, #0]
- 800572a: 68fb ldr r3, [r7, #12]
- 800572c: 681b ldr r3, [r3, #0]
- 800572e: f042 0208 orr.w r2, r2, #8
- 8005732: 601a str r2, [r3, #0]
- }
-
- /* Enable the Peripheral */
- __HAL_DMA_ENABLE(hdma);
- 8005734: 68fb ldr r3, [r7, #12]
- 8005736: 681b ldr r3, [r3, #0]
- 8005738: 681a ldr r2, [r3, #0]
- 800573a: 68fb ldr r3, [r7, #12]
- 800573c: 681b ldr r3, [r3, #0]
- 800573e: f042 0201 orr.w r2, r2, #1
- 8005742: 601a str r2, [r3, #0]
- 8005744: e005 b.n 8005752 <HAL_DMA_Start_IT+0xb6>
- }
- else
- {
- /* Process unlocked */
- __HAL_UNLOCK(hdma);
- 8005746: 68fb ldr r3, [r7, #12]
- 8005748: 2200 movs r2, #0
- 800574a: f883 2034 strb.w r2, [r3, #52] ; 0x34
-
- /* Return error status */
- status = HAL_BUSY;
- 800574e: 2302 movs r3, #2
- 8005750: 75fb strb r3, [r7, #23]
- }
-
- return status;
- 8005752: 7dfb ldrb r3, [r7, #23]
-}
- 8005754: 4618 mov r0, r3
- 8005756: 3718 adds r7, #24
- 8005758: 46bd mov sp, r7
- 800575a: bd80 pop {r7, pc}
-
-0800575c <HAL_DMA_Abort_IT>:
- * @param hdma pointer to a DMA_HandleTypeDef structure that contains
- * the configuration information for the specified DMA Stream.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
-{
- 800575c: b480 push {r7}
- 800575e: b083 sub sp, #12
- 8005760: af00 add r7, sp, #0
- 8005762: 6078 str r0, [r7, #4]
- if(hdma->State != HAL_DMA_STATE_BUSY)
- 8005764: 687b ldr r3, [r7, #4]
- 8005766: f893 3035 ldrb.w r3, [r3, #53] ; 0x35
- 800576a: b2db uxtb r3, r3
- 800576c: 2b02 cmp r3, #2
- 800576e: d004 beq.n 800577a <HAL_DMA_Abort_IT+0x1e>
- {
- hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
- 8005770: 687b ldr r3, [r7, #4]
- 8005772: 2280 movs r2, #128 ; 0x80
- 8005774: 655a str r2, [r3, #84] ; 0x54
- return HAL_ERROR;
- 8005776: 2301 movs r3, #1
- 8005778: e00c b.n 8005794 <HAL_DMA_Abort_IT+0x38>
- }
- else
- {
- /* Set Abort State */
- hdma->State = HAL_DMA_STATE_ABORT;
- 800577a: 687b ldr r3, [r7, #4]
- 800577c: 2205 movs r2, #5
- 800577e: f883 2035 strb.w r2, [r3, #53] ; 0x35
-
- /* Disable the stream */
- __HAL_DMA_DISABLE(hdma);
- 8005782: 687b ldr r3, [r7, #4]
- 8005784: 681b ldr r3, [r3, #0]
- 8005786: 681a ldr r2, [r3, #0]
- 8005788: 687b ldr r3, [r7, #4]
- 800578a: 681b ldr r3, [r3, #0]
- 800578c: f022 0201 bic.w r2, r2, #1
- 8005790: 601a str r2, [r3, #0]
- }
-
- return HAL_OK;
- 8005792: 2300 movs r3, #0
-}
- 8005794: 4618 mov r0, r3
- 8005796: 370c adds r7, #12
- 8005798: 46bd mov sp, r7
- 800579a: f85d 7b04 ldr.w r7, [sp], #4
- 800579e: 4770 bx lr
-
-080057a0 <HAL_DMA_IRQHandler>:
- * @param hdma pointer to a DMA_HandleTypeDef structure that contains
- * the configuration information for the specified DMA Stream.
- * @retval None
- */
-void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
-{
- 80057a0: b580 push {r7, lr}
- 80057a2: b086 sub sp, #24
- 80057a4: af00 add r7, sp, #0
- 80057a6: 6078 str r0, [r7, #4]
- uint32_t tmpisr;
- __IO uint32_t count = 0;
- 80057a8: 2300 movs r3, #0
- 80057aa: 60bb str r3, [r7, #8]
- uint32_t timeout = SystemCoreClock / 9600;
- 80057ac: 4b92 ldr r3, [pc, #584] ; (80059f8 <HAL_DMA_IRQHandler+0x258>)
- 80057ae: 681b ldr r3, [r3, #0]
- 80057b0: 4a92 ldr r2, [pc, #584] ; (80059fc <HAL_DMA_IRQHandler+0x25c>)
- 80057b2: fba2 2303 umull r2, r3, r2, r3
- 80057b6: 0a9b lsrs r3, r3, #10
- 80057b8: 617b str r3, [r7, #20]
-
- /* calculate DMA base and stream number */
- DMA_Base_Registers *regs = (DMA_Base_Registers *)hdma->StreamBaseAddress;
- 80057ba: 687b ldr r3, [r7, #4]
- 80057bc: 6d9b ldr r3, [r3, #88] ; 0x58
- 80057be: 613b str r3, [r7, #16]
-
- tmpisr = regs->ISR;
- 80057c0: 693b ldr r3, [r7, #16]
- 80057c2: 681b ldr r3, [r3, #0]
- 80057c4: 60fb str r3, [r7, #12]
-
- /* Transfer Error Interrupt management ***************************************/
- if ((tmpisr & (DMA_FLAG_TEIF0_4 << hdma->StreamIndex)) != RESET)
- 80057c6: 687b ldr r3, [r7, #4]
- 80057c8: 6ddb ldr r3, [r3, #92] ; 0x5c
- 80057ca: 2208 movs r2, #8
- 80057cc: 409a lsls r2, r3
- 80057ce: 68fb ldr r3, [r7, #12]
- 80057d0: 4013 ands r3, r2
- 80057d2: 2b00 cmp r3, #0
- 80057d4: d01a beq.n 800580c <HAL_DMA_IRQHandler+0x6c>
- {
- if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TE) != RESET)
- 80057d6: 687b ldr r3, [r7, #4]
- 80057d8: 681b ldr r3, [r3, #0]
- 80057da: 681b ldr r3, [r3, #0]
- 80057dc: f003 0304 and.w r3, r3, #4
- 80057e0: 2b00 cmp r3, #0
- 80057e2: d013 beq.n 800580c <HAL_DMA_IRQHandler+0x6c>
- {
- /* Disable the transfer error interrupt */
- hdma->Instance->CR &= ~(DMA_IT_TE);
- 80057e4: 687b ldr r3, [r7, #4]
- 80057e6: 681b ldr r3, [r3, #0]
- 80057e8: 681a ldr r2, [r3, #0]
- 80057ea: 687b ldr r3, [r7, #4]
- 80057ec: 681b ldr r3, [r3, #0]
- 80057ee: f022 0204 bic.w r2, r2, #4
- 80057f2: 601a str r2, [r3, #0]
-
- /* Clear the transfer error flag */
- regs->IFCR = DMA_FLAG_TEIF0_4 << hdma->StreamIndex;
- 80057f4: 687b ldr r3, [r7, #4]
- 80057f6: 6ddb ldr r3, [r3, #92] ; 0x5c
- 80057f8: 2208 movs r2, #8
- 80057fa: 409a lsls r2, r3
- 80057fc: 693b ldr r3, [r7, #16]
- 80057fe: 609a str r2, [r3, #8]
-
- /* Update error code */
- hdma->ErrorCode |= HAL_DMA_ERROR_TE;
- 8005800: 687b ldr r3, [r7, #4]
- 8005802: 6d5b ldr r3, [r3, #84] ; 0x54
- 8005804: f043 0201 orr.w r2, r3, #1
- 8005808: 687b ldr r3, [r7, #4]
- 800580a: 655a str r2, [r3, #84] ; 0x54
- }
- }
- /* FIFO Error Interrupt management ******************************************/
- if ((tmpisr & (DMA_FLAG_FEIF0_4 << hdma->StreamIndex)) != RESET)
- 800580c: 687b ldr r3, [r7, #4]
- 800580e: 6ddb ldr r3, [r3, #92] ; 0x5c
- 8005810: 2201 movs r2, #1
- 8005812: 409a lsls r2, r3
- 8005814: 68fb ldr r3, [r7, #12]
- 8005816: 4013 ands r3, r2
- 8005818: 2b00 cmp r3, #0
- 800581a: d012 beq.n 8005842 <HAL_DMA_IRQHandler+0xa2>
- {
- if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_FE) != RESET)
- 800581c: 687b ldr r3, [r7, #4]
- 800581e: 681b ldr r3, [r3, #0]
- 8005820: 695b ldr r3, [r3, #20]
- 8005822: f003 0380 and.w r3, r3, #128 ; 0x80
- 8005826: 2b00 cmp r3, #0
- 8005828: d00b beq.n 8005842 <HAL_DMA_IRQHandler+0xa2>
- {
- /* Clear the FIFO error flag */
- regs->IFCR = DMA_FLAG_FEIF0_4 << hdma->StreamIndex;
- 800582a: 687b ldr r3, [r7, #4]
- 800582c: 6ddb ldr r3, [r3, #92] ; 0x5c
- 800582e: 2201 movs r2, #1
- 8005830: 409a lsls r2, r3
- 8005832: 693b ldr r3, [r7, #16]
- 8005834: 609a str r2, [r3, #8]
-
- /* Update error code */
- hdma->ErrorCode |= HAL_DMA_ERROR_FE;
- 8005836: 687b ldr r3, [r7, #4]
- 8005838: 6d5b ldr r3, [r3, #84] ; 0x54
- 800583a: f043 0202 orr.w r2, r3, #2
- 800583e: 687b ldr r3, [r7, #4]
- 8005840: 655a str r2, [r3, #84] ; 0x54
- }
- }
- /* Direct Mode Error Interrupt management ***********************************/
- if ((tmpisr & (DMA_FLAG_DMEIF0_4 << hdma->StreamIndex)) != RESET)
- 8005842: 687b ldr r3, [r7, #4]
- 8005844: 6ddb ldr r3, [r3, #92] ; 0x5c
- 8005846: 2204 movs r2, #4
- 8005848: 409a lsls r2, r3
- 800584a: 68fb ldr r3, [r7, #12]
- 800584c: 4013 ands r3, r2
- 800584e: 2b00 cmp r3, #0
- 8005850: d012 beq.n 8005878 <HAL_DMA_IRQHandler+0xd8>
- {
- if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_DME) != RESET)
- 8005852: 687b ldr r3, [r7, #4]
- 8005854: 681b ldr r3, [r3, #0]
- 8005856: 681b ldr r3, [r3, #0]
- 8005858: f003 0302 and.w r3, r3, #2
- 800585c: 2b00 cmp r3, #0
- 800585e: d00b beq.n 8005878 <HAL_DMA_IRQHandler+0xd8>
- {
- /* Clear the direct mode error flag */
- regs->IFCR = DMA_FLAG_DMEIF0_4 << hdma->StreamIndex;
- 8005860: 687b ldr r3, [r7, #4]
- 8005862: 6ddb ldr r3, [r3, #92] ; 0x5c
- 8005864: 2204 movs r2, #4
- 8005866: 409a lsls r2, r3
- 8005868: 693b ldr r3, [r7, #16]
- 800586a: 609a str r2, [r3, #8]
-
- /* Update error code */
- hdma->ErrorCode |= HAL_DMA_ERROR_DME;
- 800586c: 687b ldr r3, [r7, #4]
- 800586e: 6d5b ldr r3, [r3, #84] ; 0x54
- 8005870: f043 0204 orr.w r2, r3, #4
- 8005874: 687b ldr r3, [r7, #4]
- 8005876: 655a str r2, [r3, #84] ; 0x54
- }
- }
- /* Half Transfer Complete Interrupt management ******************************/
- if ((tmpisr & (DMA_FLAG_HTIF0_4 << hdma->StreamIndex)) != RESET)
- 8005878: 687b ldr r3, [r7, #4]
- 800587a: 6ddb ldr r3, [r3, #92] ; 0x5c
- 800587c: 2210 movs r2, #16
- 800587e: 409a lsls r2, r3
- 8005880: 68fb ldr r3, [r7, #12]
- 8005882: 4013 ands r3, r2
- 8005884: 2b00 cmp r3, #0
- 8005886: d043 beq.n 8005910 <HAL_DMA_IRQHandler+0x170>
- {
- if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_HT) != RESET)
- 8005888: 687b ldr r3, [r7, #4]
- 800588a: 681b ldr r3, [r3, #0]
- 800588c: 681b ldr r3, [r3, #0]
- 800588e: f003 0308 and.w r3, r3, #8
- 8005892: 2b00 cmp r3, #0
- 8005894: d03c beq.n 8005910 <HAL_DMA_IRQHandler+0x170>
- {
- /* Clear the half transfer complete flag */
- regs->IFCR = DMA_FLAG_HTIF0_4 << hdma->StreamIndex;
- 8005896: 687b ldr r3, [r7, #4]
- 8005898: 6ddb ldr r3, [r3, #92] ; 0x5c
- 800589a: 2210 movs r2, #16
- 800589c: 409a lsls r2, r3
- 800589e: 693b ldr r3, [r7, #16]
- 80058a0: 609a str r2, [r3, #8]
-
- /* Multi_Buffering mode enabled */
- if(((hdma->Instance->CR) & (uint32_t)(DMA_SxCR_DBM)) != RESET)
- 80058a2: 687b ldr r3, [r7, #4]
- 80058a4: 681b ldr r3, [r3, #0]
- 80058a6: 681b ldr r3, [r3, #0]
- 80058a8: f403 2380 and.w r3, r3, #262144 ; 0x40000
- 80058ac: 2b00 cmp r3, #0
- 80058ae: d018 beq.n 80058e2 <HAL_DMA_IRQHandler+0x142>
- {
- /* Current memory buffer used is Memory 0 */
- if((hdma->Instance->CR & DMA_SxCR_CT) == RESET)
- 80058b0: 687b ldr r3, [r7, #4]
- 80058b2: 681b ldr r3, [r3, #0]
- 80058b4: 681b ldr r3, [r3, #0]
- 80058b6: f403 2300 and.w r3, r3, #524288 ; 0x80000
- 80058ba: 2b00 cmp r3, #0
- 80058bc: d108 bne.n 80058d0 <HAL_DMA_IRQHandler+0x130>
- {
- if(hdma->XferHalfCpltCallback != NULL)
- 80058be: 687b ldr r3, [r7, #4]
- 80058c0: 6c1b ldr r3, [r3, #64] ; 0x40
- 80058c2: 2b00 cmp r3, #0
- 80058c4: d024 beq.n 8005910 <HAL_DMA_IRQHandler+0x170>
- {
- /* Half transfer callback */
- hdma->XferHalfCpltCallback(hdma);
- 80058c6: 687b ldr r3, [r7, #4]
- 80058c8: 6c1b ldr r3, [r3, #64] ; 0x40
- 80058ca: 6878 ldr r0, [r7, #4]
- 80058cc: 4798 blx r3
- 80058ce: e01f b.n 8005910 <HAL_DMA_IRQHandler+0x170>
- }
- }
- /* Current memory buffer used is Memory 1 */
- else
- {
- if(hdma->XferM1HalfCpltCallback != NULL)
- 80058d0: 687b ldr r3, [r7, #4]
- 80058d2: 6c9b ldr r3, [r3, #72] ; 0x48
- 80058d4: 2b00 cmp r3, #0
- 80058d6: d01b beq.n 8005910 <HAL_DMA_IRQHandler+0x170>
- {
- /* Half transfer callback */
- hdma->XferM1HalfCpltCallback(hdma);
- 80058d8: 687b ldr r3, [r7, #4]
- 80058da: 6c9b ldr r3, [r3, #72] ; 0x48
- 80058dc: 6878 ldr r0, [r7, #4]
- 80058de: 4798 blx r3
- 80058e0: e016 b.n 8005910 <HAL_DMA_IRQHandler+0x170>
- }
- }
- else
- {
- /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */
- if((hdma->Instance->CR & DMA_SxCR_CIRC) == RESET)
- 80058e2: 687b ldr r3, [r7, #4]
- 80058e4: 681b ldr r3, [r3, #0]
- 80058e6: 681b ldr r3, [r3, #0]
- 80058e8: f403 7380 and.w r3, r3, #256 ; 0x100
- 80058ec: 2b00 cmp r3, #0
- 80058ee: d107 bne.n 8005900 <HAL_DMA_IRQHandler+0x160>
- {
- /* Disable the half transfer interrupt */
- hdma->Instance->CR &= ~(DMA_IT_HT);
- 80058f0: 687b ldr r3, [r7, #4]
- 80058f2: 681b ldr r3, [r3, #0]
- 80058f4: 681a ldr r2, [r3, #0]
- 80058f6: 687b ldr r3, [r7, #4]
- 80058f8: 681b ldr r3, [r3, #0]
- 80058fa: f022 0208 bic.w r2, r2, #8
- 80058fe: 601a str r2, [r3, #0]
- }
-
- if(hdma->XferHalfCpltCallback != NULL)
- 8005900: 687b ldr r3, [r7, #4]
- 8005902: 6c1b ldr r3, [r3, #64] ; 0x40
- 8005904: 2b00 cmp r3, #0
- 8005906: d003 beq.n 8005910 <HAL_DMA_IRQHandler+0x170>
- {
- /* Half transfer callback */
- hdma->XferHalfCpltCallback(hdma);
- 8005908: 687b ldr r3, [r7, #4]
- 800590a: 6c1b ldr r3, [r3, #64] ; 0x40
- 800590c: 6878 ldr r0, [r7, #4]
- 800590e: 4798 blx r3
- }
- }
- }
- }
- /* Transfer Complete Interrupt management ***********************************/
- if ((tmpisr & (DMA_FLAG_TCIF0_4 << hdma->StreamIndex)) != RESET)
- 8005910: 687b ldr r3, [r7, #4]
- 8005912: 6ddb ldr r3, [r3, #92] ; 0x5c
- 8005914: 2220 movs r2, #32
- 8005916: 409a lsls r2, r3
- 8005918: 68fb ldr r3, [r7, #12]
- 800591a: 4013 ands r3, r2
- 800591c: 2b00 cmp r3, #0
- 800591e: f000 808e beq.w 8005a3e <HAL_DMA_IRQHandler+0x29e>
- {
- if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TC) != RESET)
- 8005922: 687b ldr r3, [r7, #4]
- 8005924: 681b ldr r3, [r3, #0]
- 8005926: 681b ldr r3, [r3, #0]
- 8005928: f003 0310 and.w r3, r3, #16
- 800592c: 2b00 cmp r3, #0
- 800592e: f000 8086 beq.w 8005a3e <HAL_DMA_IRQHandler+0x29e>
- {
- /* Clear the transfer complete flag */
- regs->IFCR = DMA_FLAG_TCIF0_4 << hdma->StreamIndex;
- 8005932: 687b ldr r3, [r7, #4]
- 8005934: 6ddb ldr r3, [r3, #92] ; 0x5c
- 8005936: 2220 movs r2, #32
- 8005938: 409a lsls r2, r3
- 800593a: 693b ldr r3, [r7, #16]
- 800593c: 609a str r2, [r3, #8]
-
- if(HAL_DMA_STATE_ABORT == hdma->State)
- 800593e: 687b ldr r3, [r7, #4]
- 8005940: f893 3035 ldrb.w r3, [r3, #53] ; 0x35
- 8005944: b2db uxtb r3, r3
- 8005946: 2b05 cmp r3, #5
- 8005948: d136 bne.n 80059b8 <HAL_DMA_IRQHandler+0x218>
- {
- /* Disable all the transfer interrupts */
- hdma->Instance->CR &= ~(DMA_IT_TC | DMA_IT_TE | DMA_IT_DME);
- 800594a: 687b ldr r3, [r7, #4]
- 800594c: 681b ldr r3, [r3, #0]
- 800594e: 681a ldr r2, [r3, #0]
- 8005950: 687b ldr r3, [r7, #4]
- 8005952: 681b ldr r3, [r3, #0]
- 8005954: f022 0216 bic.w r2, r2, #22
- 8005958: 601a str r2, [r3, #0]
- hdma->Instance->FCR &= ~(DMA_IT_FE);
- 800595a: 687b ldr r3, [r7, #4]
- 800595c: 681b ldr r3, [r3, #0]
- 800595e: 695a ldr r2, [r3, #20]
- 8005960: 687b ldr r3, [r7, #4]
- 8005962: 681b ldr r3, [r3, #0]
- 8005964: f022 0280 bic.w r2, r2, #128 ; 0x80
- 8005968: 615a str r2, [r3, #20]
-
- if((hdma->XferHalfCpltCallback != NULL) || (hdma->XferM1HalfCpltCallback != NULL))
- 800596a: 687b ldr r3, [r7, #4]
- 800596c: 6c1b ldr r3, [r3, #64] ; 0x40
- 800596e: 2b00 cmp r3, #0
- 8005970: d103 bne.n 800597a <HAL_DMA_IRQHandler+0x1da>
- 8005972: 687b ldr r3, [r7, #4]
- 8005974: 6c9b ldr r3, [r3, #72] ; 0x48
- 8005976: 2b00 cmp r3, #0
- 8005978: d007 beq.n 800598a <HAL_DMA_IRQHandler+0x1ea>
- {
- hdma->Instance->CR &= ~(DMA_IT_HT);
- 800597a: 687b ldr r3, [r7, #4]
- 800597c: 681b ldr r3, [r3, #0]
- 800597e: 681a ldr r2, [r3, #0]
- 8005980: 687b ldr r3, [r7, #4]
- 8005982: 681b ldr r3, [r3, #0]
- 8005984: f022 0208 bic.w r2, r2, #8
- 8005988: 601a str r2, [r3, #0]
- }
-
- /* Clear all interrupt flags at correct offset within the register */
- regs->IFCR = 0x3FU << hdma->StreamIndex;
- 800598a: 687b ldr r3, [r7, #4]
- 800598c: 6ddb ldr r3, [r3, #92] ; 0x5c
- 800598e: 223f movs r2, #63 ; 0x3f
- 8005990: 409a lsls r2, r3
- 8005992: 693b ldr r3, [r7, #16]
- 8005994: 609a str r2, [r3, #8]
-
- /* Process Unlocked */
- __HAL_UNLOCK(hdma);
- 8005996: 687b ldr r3, [r7, #4]
- 8005998: 2200 movs r2, #0
- 800599a: f883 2034 strb.w r2, [r3, #52] ; 0x34
-
- /* Change the DMA state */
- hdma->State = HAL_DMA_STATE_READY;
- 800599e: 687b ldr r3, [r7, #4]
- 80059a0: 2201 movs r2, #1
- 80059a2: f883 2035 strb.w r2, [r3, #53] ; 0x35
-
- if(hdma->XferAbortCallback != NULL)
- 80059a6: 687b ldr r3, [r7, #4]
- 80059a8: 6d1b ldr r3, [r3, #80] ; 0x50
- 80059aa: 2b00 cmp r3, #0
- 80059ac: d07d beq.n 8005aaa <HAL_DMA_IRQHandler+0x30a>
- {
- hdma->XferAbortCallback(hdma);
- 80059ae: 687b ldr r3, [r7, #4]
- 80059b0: 6d1b ldr r3, [r3, #80] ; 0x50
- 80059b2: 6878 ldr r0, [r7, #4]
- 80059b4: 4798 blx r3
- }
- return;
- 80059b6: e078 b.n 8005aaa <HAL_DMA_IRQHandler+0x30a>
- }
-
- if(((hdma->Instance->CR) & (uint32_t)(DMA_SxCR_DBM)) != RESET)
- 80059b8: 687b ldr r3, [r7, #4]
- 80059ba: 681b ldr r3, [r3, #0]
- 80059bc: 681b ldr r3, [r3, #0]
- 80059be: f403 2380 and.w r3, r3, #262144 ; 0x40000
- 80059c2: 2b00 cmp r3, #0
- 80059c4: d01c beq.n 8005a00 <HAL_DMA_IRQHandler+0x260>
- {
- /* Current memory buffer used is Memory 0 */
- if((hdma->Instance->CR & DMA_SxCR_CT) == RESET)
- 80059c6: 687b ldr r3, [r7, #4]
- 80059c8: 681b ldr r3, [r3, #0]
- 80059ca: 681b ldr r3, [r3, #0]
- 80059cc: f403 2300 and.w r3, r3, #524288 ; 0x80000
- 80059d0: 2b00 cmp r3, #0
- 80059d2: d108 bne.n 80059e6 <HAL_DMA_IRQHandler+0x246>
- {
- if(hdma->XferM1CpltCallback != NULL)
- 80059d4: 687b ldr r3, [r7, #4]
- 80059d6: 6c5b ldr r3, [r3, #68] ; 0x44
- 80059d8: 2b00 cmp r3, #0
- 80059da: d030 beq.n 8005a3e <HAL_DMA_IRQHandler+0x29e>
- {
- /* Transfer complete Callback for memory1 */
- hdma->XferM1CpltCallback(hdma);
- 80059dc: 687b ldr r3, [r7, #4]
- 80059de: 6c5b ldr r3, [r3, #68] ; 0x44
- 80059e0: 6878 ldr r0, [r7, #4]
- 80059e2: 4798 blx r3
- 80059e4: e02b b.n 8005a3e <HAL_DMA_IRQHandler+0x29e>
- }
- }
- /* Current memory buffer used is Memory 1 */
- else
- {
- if(hdma->XferCpltCallback != NULL)
- 80059e6: 687b ldr r3, [r7, #4]
- 80059e8: 6bdb ldr r3, [r3, #60] ; 0x3c
- 80059ea: 2b00 cmp r3, #0
- 80059ec: d027 beq.n 8005a3e <HAL_DMA_IRQHandler+0x29e>
- {
- /* Transfer complete Callback for memory0 */
- hdma->XferCpltCallback(hdma);
- 80059ee: 687b ldr r3, [r7, #4]
- 80059f0: 6bdb ldr r3, [r3, #60] ; 0x3c
- 80059f2: 6878 ldr r0, [r7, #4]
- 80059f4: 4798 blx r3
- 80059f6: e022 b.n 8005a3e <HAL_DMA_IRQHandler+0x29e>
- 80059f8: 20000010 .word 0x20000010
- 80059fc: 1b4e81b5 .word 0x1b4e81b5
- }
- }
- /* Disable the transfer complete interrupt if the DMA mode is not CIRCULAR */
- else
- {
- if((hdma->Instance->CR & DMA_SxCR_CIRC) == RESET)
- 8005a00: 687b ldr r3, [r7, #4]
- 8005a02: 681b ldr r3, [r3, #0]
- 8005a04: 681b ldr r3, [r3, #0]
- 8005a06: f403 7380 and.w r3, r3, #256 ; 0x100
- 8005a0a: 2b00 cmp r3, #0
- 8005a0c: d10f bne.n 8005a2e <HAL_DMA_IRQHandler+0x28e>
- {
- /* Disable the transfer complete interrupt */
- hdma->Instance->CR &= ~(DMA_IT_TC);
- 8005a0e: 687b ldr r3, [r7, #4]
- 8005a10: 681b ldr r3, [r3, #0]
- 8005a12: 681a ldr r2, [r3, #0]
- 8005a14: 687b ldr r3, [r7, #4]
- 8005a16: 681b ldr r3, [r3, #0]
- 8005a18: f022 0210 bic.w r2, r2, #16
- 8005a1c: 601a str r2, [r3, #0]
-
- /* Process Unlocked */
- __HAL_UNLOCK(hdma);
- 8005a1e: 687b ldr r3, [r7, #4]
- 8005a20: 2200 movs r2, #0
- 8005a22: f883 2034 strb.w r2, [r3, #52] ; 0x34
-
- /* Change the DMA state */
- hdma->State = HAL_DMA_STATE_READY;
- 8005a26: 687b ldr r3, [r7, #4]
- 8005a28: 2201 movs r2, #1
- 8005a2a: f883 2035 strb.w r2, [r3, #53] ; 0x35
- }
-
- if(hdma->XferCpltCallback != NULL)
- 8005a2e: 687b ldr r3, [r7, #4]
- 8005a30: 6bdb ldr r3, [r3, #60] ; 0x3c
- 8005a32: 2b00 cmp r3, #0
- 8005a34: d003 beq.n 8005a3e <HAL_DMA_IRQHandler+0x29e>
- {
- /* Transfer complete callback */
- hdma->XferCpltCallback(hdma);
- 8005a36: 687b ldr r3, [r7, #4]
- 8005a38: 6bdb ldr r3, [r3, #60] ; 0x3c
- 8005a3a: 6878 ldr r0, [r7, #4]
- 8005a3c: 4798 blx r3
- }
- }
- }
-
- /* manage error case */
- if(hdma->ErrorCode != HAL_DMA_ERROR_NONE)
- 8005a3e: 687b ldr r3, [r7, #4]
- 8005a40: 6d5b ldr r3, [r3, #84] ; 0x54
- 8005a42: 2b00 cmp r3, #0
- 8005a44: d032 beq.n 8005aac <HAL_DMA_IRQHandler+0x30c>
- {
- if((hdma->ErrorCode & HAL_DMA_ERROR_TE) != RESET)
- 8005a46: 687b ldr r3, [r7, #4]
- 8005a48: 6d5b ldr r3, [r3, #84] ; 0x54
- 8005a4a: f003 0301 and.w r3, r3, #1
- 8005a4e: 2b00 cmp r3, #0
- 8005a50: d022 beq.n 8005a98 <HAL_DMA_IRQHandler+0x2f8>
- {
- hdma->State = HAL_DMA_STATE_ABORT;
- 8005a52: 687b ldr r3, [r7, #4]
- 8005a54: 2205 movs r2, #5
- 8005a56: f883 2035 strb.w r2, [r3, #53] ; 0x35
-
- /* Disable the stream */
- __HAL_DMA_DISABLE(hdma);
- 8005a5a: 687b ldr r3, [r7, #4]
- 8005a5c: 681b ldr r3, [r3, #0]
- 8005a5e: 681a ldr r2, [r3, #0]
- 8005a60: 687b ldr r3, [r7, #4]
- 8005a62: 681b ldr r3, [r3, #0]
- 8005a64: f022 0201 bic.w r2, r2, #1
- 8005a68: 601a str r2, [r3, #0]
-
- do
- {
- if (++count > timeout)
- 8005a6a: 68bb ldr r3, [r7, #8]
- 8005a6c: 3301 adds r3, #1
- 8005a6e: 60bb str r3, [r7, #8]
- 8005a70: 697a ldr r2, [r7, #20]
- 8005a72: 429a cmp r2, r3
- 8005a74: d307 bcc.n 8005a86 <HAL_DMA_IRQHandler+0x2e6>
- {
- break;
- }
- }
- while((hdma->Instance->CR & DMA_SxCR_EN) != RESET);
- 8005a76: 687b ldr r3, [r7, #4]
- 8005a78: 681b ldr r3, [r3, #0]
- 8005a7a: 681b ldr r3, [r3, #0]
- 8005a7c: f003 0301 and.w r3, r3, #1
- 8005a80: 2b00 cmp r3, #0
- 8005a82: d1f2 bne.n 8005a6a <HAL_DMA_IRQHandler+0x2ca>
- 8005a84: e000 b.n 8005a88 <HAL_DMA_IRQHandler+0x2e8>
- break;
- 8005a86: bf00 nop
-
- /* Process Unlocked */
- __HAL_UNLOCK(hdma);
- 8005a88: 687b ldr r3, [r7, #4]
- 8005a8a: 2200 movs r2, #0
- 8005a8c: f883 2034 strb.w r2, [r3, #52] ; 0x34
-
- /* Change the DMA state */
- hdma->State = HAL_DMA_STATE_READY;
- 8005a90: 687b ldr r3, [r7, #4]
- 8005a92: 2201 movs r2, #1
- 8005a94: f883 2035 strb.w r2, [r3, #53] ; 0x35
- }
-
- if(hdma->XferErrorCallback != NULL)
- 8005a98: 687b ldr r3, [r7, #4]
- 8005a9a: 6cdb ldr r3, [r3, #76] ; 0x4c
- 8005a9c: 2b00 cmp r3, #0
- 8005a9e: d005 beq.n 8005aac <HAL_DMA_IRQHandler+0x30c>
- {
- /* Transfer error callback */
- hdma->XferErrorCallback(hdma);
- 8005aa0: 687b ldr r3, [r7, #4]
- 8005aa2: 6cdb ldr r3, [r3, #76] ; 0x4c
- 8005aa4: 6878 ldr r0, [r7, #4]
- 8005aa6: 4798 blx r3
- 8005aa8: e000 b.n 8005aac <HAL_DMA_IRQHandler+0x30c>
- return;
- 8005aaa: bf00 nop
- }
- }
-}
- 8005aac: 3718 adds r7, #24
- 8005aae: 46bd mov sp, r7
- 8005ab0: bd80 pop {r7, pc}
- 8005ab2: bf00 nop
-
-08005ab4 <DMA_SetConfig>:
- * @param DstAddress The destination memory Buffer address
- * @param DataLength The length of data to be transferred from source to destination
- * @retval HAL status
- */
-static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
-{
- 8005ab4: b480 push {r7}
- 8005ab6: b085 sub sp, #20
- 8005ab8: af00 add r7, sp, #0
- 8005aba: 60f8 str r0, [r7, #12]
- 8005abc: 60b9 str r1, [r7, #8]
- 8005abe: 607a str r2, [r7, #4]
- 8005ac0: 603b str r3, [r7, #0]
- /* Clear DBM bit */
- hdma->Instance->CR &= (uint32_t)(~DMA_SxCR_DBM);
- 8005ac2: 68fb ldr r3, [r7, #12]
- 8005ac4: 681b ldr r3, [r3, #0]
- 8005ac6: 681a ldr r2, [r3, #0]
- 8005ac8: 68fb ldr r3, [r7, #12]
- 8005aca: 681b ldr r3, [r3, #0]
- 8005acc: f422 2280 bic.w r2, r2, #262144 ; 0x40000
- 8005ad0: 601a str r2, [r3, #0]
-
- /* Configure DMA Stream data length */
- hdma->Instance->NDTR = DataLength;
- 8005ad2: 68fb ldr r3, [r7, #12]
- 8005ad4: 681b ldr r3, [r3, #0]
- 8005ad6: 683a ldr r2, [r7, #0]
- 8005ad8: 605a str r2, [r3, #4]
-
- /* Memory to Peripheral */
- if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
- 8005ada: 68fb ldr r3, [r7, #12]
- 8005adc: 689b ldr r3, [r3, #8]
- 8005ade: 2b40 cmp r3, #64 ; 0x40
- 8005ae0: d108 bne.n 8005af4 <DMA_SetConfig+0x40>
- {
- /* Configure DMA Stream destination address */
- hdma->Instance->PAR = DstAddress;
- 8005ae2: 68fb ldr r3, [r7, #12]
- 8005ae4: 681b ldr r3, [r3, #0]
- 8005ae6: 687a ldr r2, [r7, #4]
- 8005ae8: 609a str r2, [r3, #8]
-
- /* Configure DMA Stream source address */
- hdma->Instance->M0AR = SrcAddress;
- 8005aea: 68fb ldr r3, [r7, #12]
- 8005aec: 681b ldr r3, [r3, #0]
- 8005aee: 68ba ldr r2, [r7, #8]
- 8005af0: 60da str r2, [r3, #12]
- hdma->Instance->PAR = SrcAddress;
-
- /* Configure DMA Stream destination address */
- hdma->Instance->M0AR = DstAddress;
- }
-}
- 8005af2: e007 b.n 8005b04 <DMA_SetConfig+0x50>
- hdma->Instance->PAR = SrcAddress;
- 8005af4: 68fb ldr r3, [r7, #12]
- 8005af6: 681b ldr r3, [r3, #0]
- 8005af8: 68ba ldr r2, [r7, #8]
- 8005afa: 609a str r2, [r3, #8]
- hdma->Instance->M0AR = DstAddress;
- 8005afc: 68fb ldr r3, [r7, #12]
- 8005afe: 681b ldr r3, [r3, #0]
- 8005b00: 687a ldr r2, [r7, #4]
- 8005b02: 60da str r2, [r3, #12]
-}
- 8005b04: bf00 nop
- 8005b06: 3714 adds r7, #20
- 8005b08: 46bd mov sp, r7
- 8005b0a: f85d 7b04 ldr.w r7, [sp], #4
- 8005b0e: 4770 bx lr
-
-08005b10 <DMA_CalcBaseAndBitshift>:
- * @param hdma pointer to a DMA_HandleTypeDef structure that contains
- * the configuration information for the specified DMA Stream.
- * @retval Stream base address
- */
-static uint32_t DMA_CalcBaseAndBitshift(DMA_HandleTypeDef *hdma)
-{
- 8005b10: b480 push {r7}
- 8005b12: b085 sub sp, #20
- 8005b14: af00 add r7, sp, #0
- 8005b16: 6078 str r0, [r7, #4]
- uint32_t stream_number = (((uint32_t)hdma->Instance & 0xFFU) - 16U) / 24U;
- 8005b18: 687b ldr r3, [r7, #4]
- 8005b1a: 681b ldr r3, [r3, #0]
- 8005b1c: b2db uxtb r3, r3
- 8005b1e: 3b10 subs r3, #16
- 8005b20: 4a13 ldr r2, [pc, #76] ; (8005b70 <DMA_CalcBaseAndBitshift+0x60>)
- 8005b22: fba2 2303 umull r2, r3, r2, r3
- 8005b26: 091b lsrs r3, r3, #4
- 8005b28: 60fb str r3, [r7, #12]
-
- /* lookup table for necessary bitshift of flags within status registers */
- static const uint8_t flagBitshiftOffset[8U] = {0U, 6U, 16U, 22U, 0U, 6U, 16U, 22U};
- hdma->StreamIndex = flagBitshiftOffset[stream_number];
- 8005b2a: 4a12 ldr r2, [pc, #72] ; (8005b74 <DMA_CalcBaseAndBitshift+0x64>)
- 8005b2c: 68fb ldr r3, [r7, #12]
- 8005b2e: 4413 add r3, r2
- 8005b30: 781b ldrb r3, [r3, #0]
- 8005b32: 461a mov r2, r3
- 8005b34: 687b ldr r3, [r7, #4]
- 8005b36: 65da str r2, [r3, #92] ; 0x5c
-
- if (stream_number > 3U)
- 8005b38: 68fb ldr r3, [r7, #12]
- 8005b3a: 2b03 cmp r3, #3
- 8005b3c: d908 bls.n 8005b50 <DMA_CalcBaseAndBitshift+0x40>
- {
- /* return pointer to HISR and HIFCR */
- hdma->StreamBaseAddress = (((uint32_t)hdma->Instance & (uint32_t)(~0x3FFU)) + 4U);
- 8005b3e: 687b ldr r3, [r7, #4]
- 8005b40: 681b ldr r3, [r3, #0]
- 8005b42: 461a mov r2, r3
- 8005b44: 4b0c ldr r3, [pc, #48] ; (8005b78 <DMA_CalcBaseAndBitshift+0x68>)
- 8005b46: 4013 ands r3, r2
- 8005b48: 1d1a adds r2, r3, #4
- 8005b4a: 687b ldr r3, [r7, #4]
- 8005b4c: 659a str r2, [r3, #88] ; 0x58
- 8005b4e: e006 b.n 8005b5e <DMA_CalcBaseAndBitshift+0x4e>
- }
- else
- {
- /* return pointer to LISR and LIFCR */
- hdma->StreamBaseAddress = ((uint32_t)hdma->Instance & (uint32_t)(~0x3FFU));
- 8005b50: 687b ldr r3, [r7, #4]
- 8005b52: 681b ldr r3, [r3, #0]
- 8005b54: 461a mov r2, r3
- 8005b56: 4b08 ldr r3, [pc, #32] ; (8005b78 <DMA_CalcBaseAndBitshift+0x68>)
- 8005b58: 4013 ands r3, r2
- 8005b5a: 687a ldr r2, [r7, #4]
- 8005b5c: 6593 str r3, [r2, #88] ; 0x58
- }
-
- return hdma->StreamBaseAddress;
- 8005b5e: 687b ldr r3, [r7, #4]
- 8005b60: 6d9b ldr r3, [r3, #88] ; 0x58
-}
- 8005b62: 4618 mov r0, r3
- 8005b64: 3714 adds r7, #20
- 8005b66: 46bd mov sp, r7
- 8005b68: f85d 7b04 ldr.w r7, [sp], #4
- 8005b6c: 4770 bx lr
- 8005b6e: bf00 nop
- 8005b70: aaaaaaab .word 0xaaaaaaab
- 8005b74: 0800b174 .word 0x0800b174
- 8005b78: fffffc00 .word 0xfffffc00
-
-08005b7c <DMA_CheckFifoParam>:
- * @param hdma pointer to a DMA_HandleTypeDef structure that contains
- * the configuration information for the specified DMA Stream.
- * @retval HAL status
- */
-static HAL_StatusTypeDef DMA_CheckFifoParam(DMA_HandleTypeDef *hdma)
-{
- 8005b7c: b480 push {r7}
- 8005b7e: b085 sub sp, #20
- 8005b80: af00 add r7, sp, #0
- 8005b82: 6078 str r0, [r7, #4]
- HAL_StatusTypeDef status = HAL_OK;
- 8005b84: 2300 movs r3, #0
- 8005b86: 73fb strb r3, [r7, #15]
- uint32_t tmp = hdma->Init.FIFOThreshold;
- 8005b88: 687b ldr r3, [r7, #4]
- 8005b8a: 6a9b ldr r3, [r3, #40] ; 0x28
- 8005b8c: 60bb str r3, [r7, #8]
-
- /* Memory Data size equal to Byte */
- if(hdma->Init.MemDataAlignment == DMA_MDATAALIGN_BYTE)
- 8005b8e: 687b ldr r3, [r7, #4]
- 8005b90: 699b ldr r3, [r3, #24]
- 8005b92: 2b00 cmp r3, #0
- 8005b94: d11f bne.n 8005bd6 <DMA_CheckFifoParam+0x5a>
- {
- switch (tmp)
- 8005b96: 68bb ldr r3, [r7, #8]
- 8005b98: 2b03 cmp r3, #3
- 8005b9a: d855 bhi.n 8005c48 <DMA_CheckFifoParam+0xcc>
- 8005b9c: a201 add r2, pc, #4 ; (adr r2, 8005ba4 <DMA_CheckFifoParam+0x28>)
- 8005b9e: f852 f023 ldr.w pc, [r2, r3, lsl #2]
- 8005ba2: bf00 nop
- 8005ba4: 08005bb5 .word 0x08005bb5
- 8005ba8: 08005bc7 .word 0x08005bc7
- 8005bac: 08005bb5 .word 0x08005bb5
- 8005bb0: 08005c49 .word 0x08005c49
- {
- case DMA_FIFO_THRESHOLD_1QUARTERFULL:
- case DMA_FIFO_THRESHOLD_3QUARTERSFULL:
- if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1)
- 8005bb4: 687b ldr r3, [r7, #4]
- 8005bb6: 6adb ldr r3, [r3, #44] ; 0x2c
- 8005bb8: f003 7380 and.w r3, r3, #16777216 ; 0x1000000
- 8005bbc: 2b00 cmp r3, #0
- 8005bbe: d045 beq.n 8005c4c <DMA_CheckFifoParam+0xd0>
- {
- status = HAL_ERROR;
- 8005bc0: 2301 movs r3, #1
- 8005bc2: 73fb strb r3, [r7, #15]
- }
- break;
- 8005bc4: e042 b.n 8005c4c <DMA_CheckFifoParam+0xd0>
- case DMA_FIFO_THRESHOLD_HALFFULL:
- if (hdma->Init.MemBurst == DMA_MBURST_INC16)
- 8005bc6: 687b ldr r3, [r7, #4]
- 8005bc8: 6adb ldr r3, [r3, #44] ; 0x2c
- 8005bca: f1b3 7fc0 cmp.w r3, #25165824 ; 0x1800000
- 8005bce: d13f bne.n 8005c50 <DMA_CheckFifoParam+0xd4>
- {
- status = HAL_ERROR;
- 8005bd0: 2301 movs r3, #1
- 8005bd2: 73fb strb r3, [r7, #15]
- }
- break;
- 8005bd4: e03c b.n 8005c50 <DMA_CheckFifoParam+0xd4>
- break;
- }
- }
-
- /* Memory Data size equal to Half-Word */
- else if (hdma->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD)
- 8005bd6: 687b ldr r3, [r7, #4]
- 8005bd8: 699b ldr r3, [r3, #24]
- 8005bda: f5b3 5f00 cmp.w r3, #8192 ; 0x2000
- 8005bde: d121 bne.n 8005c24 <DMA_CheckFifoParam+0xa8>
- {
- switch (tmp)
- 8005be0: 68bb ldr r3, [r7, #8]
- 8005be2: 2b03 cmp r3, #3
- 8005be4: d836 bhi.n 8005c54 <DMA_CheckFifoParam+0xd8>
- 8005be6: a201 add r2, pc, #4 ; (adr r2, 8005bec <DMA_CheckFifoParam+0x70>)
- 8005be8: f852 f023 ldr.w pc, [r2, r3, lsl #2]
- 8005bec: 08005bfd .word 0x08005bfd
- 8005bf0: 08005c03 .word 0x08005c03
- 8005bf4: 08005bfd .word 0x08005bfd
- 8005bf8: 08005c15 .word 0x08005c15
- {
- case DMA_FIFO_THRESHOLD_1QUARTERFULL:
- case DMA_FIFO_THRESHOLD_3QUARTERSFULL:
- status = HAL_ERROR;
- 8005bfc: 2301 movs r3, #1
- 8005bfe: 73fb strb r3, [r7, #15]
- break;
- 8005c00: e02f b.n 8005c62 <DMA_CheckFifoParam+0xe6>
- case DMA_FIFO_THRESHOLD_HALFFULL:
- if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1)
- 8005c02: 687b ldr r3, [r7, #4]
- 8005c04: 6adb ldr r3, [r3, #44] ; 0x2c
- 8005c06: f003 7380 and.w r3, r3, #16777216 ; 0x1000000
- 8005c0a: 2b00 cmp r3, #0
- 8005c0c: d024 beq.n 8005c58 <DMA_CheckFifoParam+0xdc>
- {
- status = HAL_ERROR;
- 8005c0e: 2301 movs r3, #1
- 8005c10: 73fb strb r3, [r7, #15]
- }
- break;
- 8005c12: e021 b.n 8005c58 <DMA_CheckFifoParam+0xdc>
- case DMA_FIFO_THRESHOLD_FULL:
- if (hdma->Init.MemBurst == DMA_MBURST_INC16)
- 8005c14: 687b ldr r3, [r7, #4]
- 8005c16: 6adb ldr r3, [r3, #44] ; 0x2c
- 8005c18: f1b3 7fc0 cmp.w r3, #25165824 ; 0x1800000
- 8005c1c: d11e bne.n 8005c5c <DMA_CheckFifoParam+0xe0>
- {
- status = HAL_ERROR;
- 8005c1e: 2301 movs r3, #1
- 8005c20: 73fb strb r3, [r7, #15]
- }
- break;
- 8005c22: e01b b.n 8005c5c <DMA_CheckFifoParam+0xe0>
- }
-
- /* Memory Data size equal to Word */
- else
- {
- switch (tmp)
- 8005c24: 68bb ldr r3, [r7, #8]
- 8005c26: 2b02 cmp r3, #2
- 8005c28: d902 bls.n 8005c30 <DMA_CheckFifoParam+0xb4>
- 8005c2a: 2b03 cmp r3, #3
- 8005c2c: d003 beq.n 8005c36 <DMA_CheckFifoParam+0xba>
- {
- status = HAL_ERROR;
- }
- break;
- default:
- break;
- 8005c2e: e018 b.n 8005c62 <DMA_CheckFifoParam+0xe6>
- status = HAL_ERROR;
- 8005c30: 2301 movs r3, #1
- 8005c32: 73fb strb r3, [r7, #15]
- break;
- 8005c34: e015 b.n 8005c62 <DMA_CheckFifoParam+0xe6>
- if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1)
- 8005c36: 687b ldr r3, [r7, #4]
- 8005c38: 6adb ldr r3, [r3, #44] ; 0x2c
- 8005c3a: f003 7380 and.w r3, r3, #16777216 ; 0x1000000
- 8005c3e: 2b00 cmp r3, #0
- 8005c40: d00e beq.n 8005c60 <DMA_CheckFifoParam+0xe4>
- status = HAL_ERROR;
- 8005c42: 2301 movs r3, #1
- 8005c44: 73fb strb r3, [r7, #15]
- break;
- 8005c46: e00b b.n 8005c60 <DMA_CheckFifoParam+0xe4>
- break;
- 8005c48: bf00 nop
- 8005c4a: e00a b.n 8005c62 <DMA_CheckFifoParam+0xe6>
- break;
- 8005c4c: bf00 nop
- 8005c4e: e008 b.n 8005c62 <DMA_CheckFifoParam+0xe6>
- break;
- 8005c50: bf00 nop
- 8005c52: e006 b.n 8005c62 <DMA_CheckFifoParam+0xe6>
- break;
- 8005c54: bf00 nop
- 8005c56: e004 b.n 8005c62 <DMA_CheckFifoParam+0xe6>
- break;
- 8005c58: bf00 nop
- 8005c5a: e002 b.n 8005c62 <DMA_CheckFifoParam+0xe6>
- break;
- 8005c5c: bf00 nop
- 8005c5e: e000 b.n 8005c62 <DMA_CheckFifoParam+0xe6>
- break;
- 8005c60: bf00 nop
- }
- }
-
- return status;
- 8005c62: 7bfb ldrb r3, [r7, #15]
-}
- 8005c64: 4618 mov r0, r3
- 8005c66: 3714 adds r7, #20
- 8005c68: 46bd mov sp, r7
- 8005c6a: f85d 7b04 ldr.w r7, [sp], #4
- 8005c6e: 4770 bx lr
-
-08005c70 <HAL_GPIO_Init>:
- * @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains
- * the configuration information for the specified GPIO peripheral.
- * @retval None
- */
-void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
-{
- 8005c70: b480 push {r7}
- 8005c72: b089 sub sp, #36 ; 0x24
- 8005c74: af00 add r7, sp, #0
- 8005c76: 6078 str r0, [r7, #4]
- 8005c78: 6039 str r1, [r7, #0]
- uint32_t position = 0x00;
- 8005c7a: 2300 movs r3, #0
- 8005c7c: 61fb str r3, [r7, #28]
- uint32_t ioposition = 0x00;
- 8005c7e: 2300 movs r3, #0
- 8005c80: 617b str r3, [r7, #20]
- uint32_t iocurrent = 0x00;
- 8005c82: 2300 movs r3, #0
- 8005c84: 613b str r3, [r7, #16]
- uint32_t temp = 0x00;
- 8005c86: 2300 movs r3, #0
- 8005c88: 61bb str r3, [r7, #24]
- assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
- assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
- assert_param(IS_GPIO_PULL(GPIO_Init->Pull));
-
- /* Configure the port pins */
- for(position = 0; position < GPIO_NUMBER; position++)
- 8005c8a: 2300 movs r3, #0
- 8005c8c: 61fb str r3, [r7, #28]
- 8005c8e: e175 b.n 8005f7c <HAL_GPIO_Init+0x30c>
- {
- /* Get the IO position */
- ioposition = ((uint32_t)0x01) << position;
- 8005c90: 2201 movs r2, #1
- 8005c92: 69fb ldr r3, [r7, #28]
- 8005c94: fa02 f303 lsl.w r3, r2, r3
- 8005c98: 617b str r3, [r7, #20]
- /* Get the current IO position */
- iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
- 8005c9a: 683b ldr r3, [r7, #0]
- 8005c9c: 681b ldr r3, [r3, #0]
- 8005c9e: 697a ldr r2, [r7, #20]
- 8005ca0: 4013 ands r3, r2
- 8005ca2: 613b str r3, [r7, #16]
-
- if(iocurrent == ioposition)
- 8005ca4: 693a ldr r2, [r7, #16]
- 8005ca6: 697b ldr r3, [r7, #20]
- 8005ca8: 429a cmp r2, r3
- 8005caa: f040 8164 bne.w 8005f76 <HAL_GPIO_Init+0x306>
- {
- /*--------------------- GPIO Mode Configuration ------------------------*/
- /* In case of Alternate function mode selection */
- if((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
- 8005cae: 683b ldr r3, [r7, #0]
- 8005cb0: 685b ldr r3, [r3, #4]
- 8005cb2: 2b02 cmp r3, #2
- 8005cb4: d003 beq.n 8005cbe <HAL_GPIO_Init+0x4e>
- 8005cb6: 683b ldr r3, [r7, #0]
- 8005cb8: 685b ldr r3, [r3, #4]
- 8005cba: 2b12 cmp r3, #18
- 8005cbc: d123 bne.n 8005d06 <HAL_GPIO_Init+0x96>
- {
- /* Check the Alternate function parameter */
- assert_param(IS_GPIO_AF(GPIO_Init->Alternate));
-
- /* Configure Alternate function mapped with the current IO */
- temp = GPIOx->AFR[position >> 3];
- 8005cbe: 69fb ldr r3, [r7, #28]
- 8005cc0: 08da lsrs r2, r3, #3
- 8005cc2: 687b ldr r3, [r7, #4]
- 8005cc4: 3208 adds r2, #8
- 8005cc6: f853 3022 ldr.w r3, [r3, r2, lsl #2]
- 8005cca: 61bb str r3, [r7, #24]
- temp &= ~((uint32_t)0xF << ((uint32_t)(position & (uint32_t)0x07) * 4)) ;
- 8005ccc: 69fb ldr r3, [r7, #28]
- 8005cce: f003 0307 and.w r3, r3, #7
- 8005cd2: 009b lsls r3, r3, #2
- 8005cd4: 220f movs r2, #15
- 8005cd6: fa02 f303 lsl.w r3, r2, r3
- 8005cda: 43db mvns r3, r3
- 8005cdc: 69ba ldr r2, [r7, #24]
- 8005cde: 4013 ands r3, r2
- 8005ce0: 61bb str r3, [r7, #24]
- temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & (uint32_t)0x07) * 4));
- 8005ce2: 683b ldr r3, [r7, #0]
- 8005ce4: 691a ldr r2, [r3, #16]
- 8005ce6: 69fb ldr r3, [r7, #28]
- 8005ce8: f003 0307 and.w r3, r3, #7
- 8005cec: 009b lsls r3, r3, #2
- 8005cee: fa02 f303 lsl.w r3, r2, r3
- 8005cf2: 69ba ldr r2, [r7, #24]
- 8005cf4: 4313 orrs r3, r2
- 8005cf6: 61bb str r3, [r7, #24]
- GPIOx->AFR[position >> 3] = temp;
- 8005cf8: 69fb ldr r3, [r7, #28]
- 8005cfa: 08da lsrs r2, r3, #3
- 8005cfc: 687b ldr r3, [r7, #4]
- 8005cfe: 3208 adds r2, #8
- 8005d00: 69b9 ldr r1, [r7, #24]
- 8005d02: f843 1022 str.w r1, [r3, r2, lsl #2]
- }
-
- /* Configure IO Direction mode (Input, Output, Alternate or Analog) */
- temp = GPIOx->MODER;
- 8005d06: 687b ldr r3, [r7, #4]
- 8005d08: 681b ldr r3, [r3, #0]
- 8005d0a: 61bb str r3, [r7, #24]
- temp &= ~(GPIO_MODER_MODER0 << (position * 2));
- 8005d0c: 69fb ldr r3, [r7, #28]
- 8005d0e: 005b lsls r3, r3, #1
- 8005d10: 2203 movs r2, #3
- 8005d12: fa02 f303 lsl.w r3, r2, r3
- 8005d16: 43db mvns r3, r3
- 8005d18: 69ba ldr r2, [r7, #24]
- 8005d1a: 4013 ands r3, r2
- 8005d1c: 61bb str r3, [r7, #24]
- temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2));
- 8005d1e: 683b ldr r3, [r7, #0]
- 8005d20: 685b ldr r3, [r3, #4]
- 8005d22: f003 0203 and.w r2, r3, #3
- 8005d26: 69fb ldr r3, [r7, #28]
- 8005d28: 005b lsls r3, r3, #1
- 8005d2a: fa02 f303 lsl.w r3, r2, r3
- 8005d2e: 69ba ldr r2, [r7, #24]
- 8005d30: 4313 orrs r3, r2
- 8005d32: 61bb str r3, [r7, #24]
- GPIOx->MODER = temp;
- 8005d34: 687b ldr r3, [r7, #4]
- 8005d36: 69ba ldr r2, [r7, #24]
- 8005d38: 601a str r2, [r3, #0]
-
- /* In case of Output or Alternate function mode selection */
- if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) ||
- 8005d3a: 683b ldr r3, [r7, #0]
- 8005d3c: 685b ldr r3, [r3, #4]
- 8005d3e: 2b01 cmp r3, #1
- 8005d40: d00b beq.n 8005d5a <HAL_GPIO_Init+0xea>
- 8005d42: 683b ldr r3, [r7, #0]
- 8005d44: 685b ldr r3, [r3, #4]
- 8005d46: 2b02 cmp r3, #2
- 8005d48: d007 beq.n 8005d5a <HAL_GPIO_Init+0xea>
- (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
- 8005d4a: 683b ldr r3, [r7, #0]
- 8005d4c: 685b ldr r3, [r3, #4]
- if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) ||
- 8005d4e: 2b11 cmp r3, #17
- 8005d50: d003 beq.n 8005d5a <HAL_GPIO_Init+0xea>
- (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
- 8005d52: 683b ldr r3, [r7, #0]
- 8005d54: 685b ldr r3, [r3, #4]
- 8005d56: 2b12 cmp r3, #18
- 8005d58: d130 bne.n 8005dbc <HAL_GPIO_Init+0x14c>
- {
- /* Check the Speed parameter */
- assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
- /* Configure the IO Speed */
- temp = GPIOx->OSPEEDR;
- 8005d5a: 687b ldr r3, [r7, #4]
- 8005d5c: 689b ldr r3, [r3, #8]
- 8005d5e: 61bb str r3, [r7, #24]
- temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2));
- 8005d60: 69fb ldr r3, [r7, #28]
- 8005d62: 005b lsls r3, r3, #1
- 8005d64: 2203 movs r2, #3
- 8005d66: fa02 f303 lsl.w r3, r2, r3
- 8005d6a: 43db mvns r3, r3
- 8005d6c: 69ba ldr r2, [r7, #24]
- 8005d6e: 4013 ands r3, r2
- 8005d70: 61bb str r3, [r7, #24]
- temp |= (GPIO_Init->Speed << (position * 2));
- 8005d72: 683b ldr r3, [r7, #0]
- 8005d74: 68da ldr r2, [r3, #12]
- 8005d76: 69fb ldr r3, [r7, #28]
- 8005d78: 005b lsls r3, r3, #1
- 8005d7a: fa02 f303 lsl.w r3, r2, r3
- 8005d7e: 69ba ldr r2, [r7, #24]
- 8005d80: 4313 orrs r3, r2
- 8005d82: 61bb str r3, [r7, #24]
- GPIOx->OSPEEDR = temp;
- 8005d84: 687b ldr r3, [r7, #4]
- 8005d86: 69ba ldr r2, [r7, #24]
- 8005d88: 609a str r2, [r3, #8]
-
- /* Configure the IO Output Type */
- temp = GPIOx->OTYPER;
- 8005d8a: 687b ldr r3, [r7, #4]
- 8005d8c: 685b ldr r3, [r3, #4]
- 8005d8e: 61bb str r3, [r7, #24]
- temp &= ~(GPIO_OTYPER_OT_0 << position) ;
- 8005d90: 2201 movs r2, #1
- 8005d92: 69fb ldr r3, [r7, #28]
- 8005d94: fa02 f303 lsl.w r3, r2, r3
- 8005d98: 43db mvns r3, r3
- 8005d9a: 69ba ldr r2, [r7, #24]
- 8005d9c: 4013 ands r3, r2
- 8005d9e: 61bb str r3, [r7, #24]
- temp |= (((GPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4) << position);
- 8005da0: 683b ldr r3, [r7, #0]
- 8005da2: 685b ldr r3, [r3, #4]
- 8005da4: 091b lsrs r3, r3, #4
- 8005da6: f003 0201 and.w r2, r3, #1
- 8005daa: 69fb ldr r3, [r7, #28]
- 8005dac: fa02 f303 lsl.w r3, r2, r3
- 8005db0: 69ba ldr r2, [r7, #24]
- 8005db2: 4313 orrs r3, r2
- 8005db4: 61bb str r3, [r7, #24]
- GPIOx->OTYPER = temp;
- 8005db6: 687b ldr r3, [r7, #4]
- 8005db8: 69ba ldr r2, [r7, #24]
- 8005dba: 605a str r2, [r3, #4]
- }
-
- /* Activate the Pull-up or Pull down resistor for the current IO */
- temp = GPIOx->PUPDR;
- 8005dbc: 687b ldr r3, [r7, #4]
- 8005dbe: 68db ldr r3, [r3, #12]
- 8005dc0: 61bb str r3, [r7, #24]
- temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2));
- 8005dc2: 69fb ldr r3, [r7, #28]
- 8005dc4: 005b lsls r3, r3, #1
- 8005dc6: 2203 movs r2, #3
- 8005dc8: fa02 f303 lsl.w r3, r2, r3
- 8005dcc: 43db mvns r3, r3
- 8005dce: 69ba ldr r2, [r7, #24]
- 8005dd0: 4013 ands r3, r2
- 8005dd2: 61bb str r3, [r7, #24]
- temp |= ((GPIO_Init->Pull) << (position * 2));
- 8005dd4: 683b ldr r3, [r7, #0]
- 8005dd6: 689a ldr r2, [r3, #8]
- 8005dd8: 69fb ldr r3, [r7, #28]
- 8005dda: 005b lsls r3, r3, #1
- 8005ddc: fa02 f303 lsl.w r3, r2, r3
- 8005de0: 69ba ldr r2, [r7, #24]
- 8005de2: 4313 orrs r3, r2
- 8005de4: 61bb str r3, [r7, #24]
- GPIOx->PUPDR = temp;
- 8005de6: 687b ldr r3, [r7, #4]
- 8005de8: 69ba ldr r2, [r7, #24]
- 8005dea: 60da str r2, [r3, #12]
-
- /*--------------------- EXTI Mode Configuration ------------------------*/
- /* Configure the External Interrupt or event for the current IO */
- if((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
- 8005dec: 683b ldr r3, [r7, #0]
- 8005dee: 685b ldr r3, [r3, #4]
- 8005df0: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
- 8005df4: 2b00 cmp r3, #0
- 8005df6: f000 80be beq.w 8005f76 <HAL_GPIO_Init+0x306>
- {
- /* Enable SYSCFG Clock */
- __HAL_RCC_SYSCFG_CLK_ENABLE();
- 8005dfa: 4b65 ldr r3, [pc, #404] ; (8005f90 <HAL_GPIO_Init+0x320>)
- 8005dfc: 6c5b ldr r3, [r3, #68] ; 0x44
- 8005dfe: 4a64 ldr r2, [pc, #400] ; (8005f90 <HAL_GPIO_Init+0x320>)
- 8005e00: f443 4380 orr.w r3, r3, #16384 ; 0x4000
- 8005e04: 6453 str r3, [r2, #68] ; 0x44
- 8005e06: 4b62 ldr r3, [pc, #392] ; (8005f90 <HAL_GPIO_Init+0x320>)
- 8005e08: 6c5b ldr r3, [r3, #68] ; 0x44
- 8005e0a: f403 4380 and.w r3, r3, #16384 ; 0x4000
- 8005e0e: 60fb str r3, [r7, #12]
- 8005e10: 68fb ldr r3, [r7, #12]
-
- temp = SYSCFG->EXTICR[position >> 2];
- 8005e12: 4a60 ldr r2, [pc, #384] ; (8005f94 <HAL_GPIO_Init+0x324>)
- 8005e14: 69fb ldr r3, [r7, #28]
- 8005e16: 089b lsrs r3, r3, #2
- 8005e18: 3302 adds r3, #2
- 8005e1a: f852 3023 ldr.w r3, [r2, r3, lsl #2]
- 8005e1e: 61bb str r3, [r7, #24]
- temp &= ~(((uint32_t)0x0F) << (4 * (position & 0x03)));
- 8005e20: 69fb ldr r3, [r7, #28]
- 8005e22: f003 0303 and.w r3, r3, #3
- 8005e26: 009b lsls r3, r3, #2
- 8005e28: 220f movs r2, #15
- 8005e2a: fa02 f303 lsl.w r3, r2, r3
- 8005e2e: 43db mvns r3, r3
- 8005e30: 69ba ldr r2, [r7, #24]
- 8005e32: 4013 ands r3, r2
- 8005e34: 61bb str r3, [r7, #24]
- temp |= ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4 * (position & 0x03)));
- 8005e36: 687b ldr r3, [r7, #4]
- 8005e38: 4a57 ldr r2, [pc, #348] ; (8005f98 <HAL_GPIO_Init+0x328>)
- 8005e3a: 4293 cmp r3, r2
- 8005e3c: d037 beq.n 8005eae <HAL_GPIO_Init+0x23e>
- 8005e3e: 687b ldr r3, [r7, #4]
- 8005e40: 4a56 ldr r2, [pc, #344] ; (8005f9c <HAL_GPIO_Init+0x32c>)
- 8005e42: 4293 cmp r3, r2
- 8005e44: d031 beq.n 8005eaa <HAL_GPIO_Init+0x23a>
- 8005e46: 687b ldr r3, [r7, #4]
- 8005e48: 4a55 ldr r2, [pc, #340] ; (8005fa0 <HAL_GPIO_Init+0x330>)
- 8005e4a: 4293 cmp r3, r2
- 8005e4c: d02b beq.n 8005ea6 <HAL_GPIO_Init+0x236>
- 8005e4e: 687b ldr r3, [r7, #4]
- 8005e50: 4a54 ldr r2, [pc, #336] ; (8005fa4 <HAL_GPIO_Init+0x334>)
- 8005e52: 4293 cmp r3, r2
- 8005e54: d025 beq.n 8005ea2 <HAL_GPIO_Init+0x232>
- 8005e56: 687b ldr r3, [r7, #4]
- 8005e58: 4a53 ldr r2, [pc, #332] ; (8005fa8 <HAL_GPIO_Init+0x338>)
- 8005e5a: 4293 cmp r3, r2
- 8005e5c: d01f beq.n 8005e9e <HAL_GPIO_Init+0x22e>
- 8005e5e: 687b ldr r3, [r7, #4]
- 8005e60: 4a52 ldr r2, [pc, #328] ; (8005fac <HAL_GPIO_Init+0x33c>)
- 8005e62: 4293 cmp r3, r2
- 8005e64: d019 beq.n 8005e9a <HAL_GPIO_Init+0x22a>
- 8005e66: 687b ldr r3, [r7, #4]
- 8005e68: 4a51 ldr r2, [pc, #324] ; (8005fb0 <HAL_GPIO_Init+0x340>)
- 8005e6a: 4293 cmp r3, r2
- 8005e6c: d013 beq.n 8005e96 <HAL_GPIO_Init+0x226>
- 8005e6e: 687b ldr r3, [r7, #4]
- 8005e70: 4a50 ldr r2, [pc, #320] ; (8005fb4 <HAL_GPIO_Init+0x344>)
- 8005e72: 4293 cmp r3, r2
- 8005e74: d00d beq.n 8005e92 <HAL_GPIO_Init+0x222>
- 8005e76: 687b ldr r3, [r7, #4]
- 8005e78: 4a4f ldr r2, [pc, #316] ; (8005fb8 <HAL_GPIO_Init+0x348>)
- 8005e7a: 4293 cmp r3, r2
- 8005e7c: d007 beq.n 8005e8e <HAL_GPIO_Init+0x21e>
- 8005e7e: 687b ldr r3, [r7, #4]
- 8005e80: 4a4e ldr r2, [pc, #312] ; (8005fbc <HAL_GPIO_Init+0x34c>)
- 8005e82: 4293 cmp r3, r2
- 8005e84: d101 bne.n 8005e8a <HAL_GPIO_Init+0x21a>
- 8005e86: 2309 movs r3, #9
- 8005e88: e012 b.n 8005eb0 <HAL_GPIO_Init+0x240>
- 8005e8a: 230a movs r3, #10
- 8005e8c: e010 b.n 8005eb0 <HAL_GPIO_Init+0x240>
- 8005e8e: 2308 movs r3, #8
- 8005e90: e00e b.n 8005eb0 <HAL_GPIO_Init+0x240>
- 8005e92: 2307 movs r3, #7
- 8005e94: e00c b.n 8005eb0 <HAL_GPIO_Init+0x240>
- 8005e96: 2306 movs r3, #6
- 8005e98: e00a b.n 8005eb0 <HAL_GPIO_Init+0x240>
- 8005e9a: 2305 movs r3, #5
- 8005e9c: e008 b.n 8005eb0 <HAL_GPIO_Init+0x240>
- 8005e9e: 2304 movs r3, #4
- 8005ea0: e006 b.n 8005eb0 <HAL_GPIO_Init+0x240>
- 8005ea2: 2303 movs r3, #3
- 8005ea4: e004 b.n 8005eb0 <HAL_GPIO_Init+0x240>
- 8005ea6: 2302 movs r3, #2
- 8005ea8: e002 b.n 8005eb0 <HAL_GPIO_Init+0x240>
- 8005eaa: 2301 movs r3, #1
- 8005eac: e000 b.n 8005eb0 <HAL_GPIO_Init+0x240>
- 8005eae: 2300 movs r3, #0
- 8005eb0: 69fa ldr r2, [r7, #28]
- 8005eb2: f002 0203 and.w r2, r2, #3
- 8005eb6: 0092 lsls r2, r2, #2
- 8005eb8: 4093 lsls r3, r2
- 8005eba: 69ba ldr r2, [r7, #24]
- 8005ebc: 4313 orrs r3, r2
- 8005ebe: 61bb str r3, [r7, #24]
- SYSCFG->EXTICR[position >> 2] = temp;
- 8005ec0: 4934 ldr r1, [pc, #208] ; (8005f94 <HAL_GPIO_Init+0x324>)
- 8005ec2: 69fb ldr r3, [r7, #28]
- 8005ec4: 089b lsrs r3, r3, #2
- 8005ec6: 3302 adds r3, #2
- 8005ec8: 69ba ldr r2, [r7, #24]
- 8005eca: f841 2023 str.w r2, [r1, r3, lsl #2]
-
- /* Clear EXTI line configuration */
- temp = EXTI->IMR;
- 8005ece: 4b3c ldr r3, [pc, #240] ; (8005fc0 <HAL_GPIO_Init+0x350>)
- 8005ed0: 681b ldr r3, [r3, #0]
- 8005ed2: 61bb str r3, [r7, #24]
- temp &= ~((uint32_t)iocurrent);
- 8005ed4: 693b ldr r3, [r7, #16]
- 8005ed6: 43db mvns r3, r3
- 8005ed8: 69ba ldr r2, [r7, #24]
- 8005eda: 4013 ands r3, r2
- 8005edc: 61bb str r3, [r7, #24]
- if((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
- 8005ede: 683b ldr r3, [r7, #0]
- 8005ee0: 685b ldr r3, [r3, #4]
- 8005ee2: f403 3380 and.w r3, r3, #65536 ; 0x10000
- 8005ee6: 2b00 cmp r3, #0
- 8005ee8: d003 beq.n 8005ef2 <HAL_GPIO_Init+0x282>
- {
- temp |= iocurrent;
- 8005eea: 69ba ldr r2, [r7, #24]
- 8005eec: 693b ldr r3, [r7, #16]
- 8005eee: 4313 orrs r3, r2
- 8005ef0: 61bb str r3, [r7, #24]
- }
- EXTI->IMR = temp;
- 8005ef2: 4a33 ldr r2, [pc, #204] ; (8005fc0 <HAL_GPIO_Init+0x350>)
- 8005ef4: 69bb ldr r3, [r7, #24]
- 8005ef6: 6013 str r3, [r2, #0]
-
- temp = EXTI->EMR;
- 8005ef8: 4b31 ldr r3, [pc, #196] ; (8005fc0 <HAL_GPIO_Init+0x350>)
- 8005efa: 685b ldr r3, [r3, #4]
- 8005efc: 61bb str r3, [r7, #24]
- temp &= ~((uint32_t)iocurrent);
- 8005efe: 693b ldr r3, [r7, #16]
- 8005f00: 43db mvns r3, r3
- 8005f02: 69ba ldr r2, [r7, #24]
- 8005f04: 4013 ands r3, r2
- 8005f06: 61bb str r3, [r7, #24]
- if((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
- 8005f08: 683b ldr r3, [r7, #0]
- 8005f0a: 685b ldr r3, [r3, #4]
- 8005f0c: f403 3300 and.w r3, r3, #131072 ; 0x20000
- 8005f10: 2b00 cmp r3, #0
- 8005f12: d003 beq.n 8005f1c <HAL_GPIO_Init+0x2ac>
- {
- temp |= iocurrent;
- 8005f14: 69ba ldr r2, [r7, #24]
- 8005f16: 693b ldr r3, [r7, #16]
- 8005f18: 4313 orrs r3, r2
- 8005f1a: 61bb str r3, [r7, #24]
- }
- EXTI->EMR = temp;
- 8005f1c: 4a28 ldr r2, [pc, #160] ; (8005fc0 <HAL_GPIO_Init+0x350>)
- 8005f1e: 69bb ldr r3, [r7, #24]
- 8005f20: 6053 str r3, [r2, #4]
-
- /* Clear Rising Falling edge configuration */
- temp = EXTI->RTSR;
- 8005f22: 4b27 ldr r3, [pc, #156] ; (8005fc0 <HAL_GPIO_Init+0x350>)
- 8005f24: 689b ldr r3, [r3, #8]
- 8005f26: 61bb str r3, [r7, #24]
- temp &= ~((uint32_t)iocurrent);
- 8005f28: 693b ldr r3, [r7, #16]
- 8005f2a: 43db mvns r3, r3
- 8005f2c: 69ba ldr r2, [r7, #24]
- 8005f2e: 4013 ands r3, r2
- 8005f30: 61bb str r3, [r7, #24]
- if((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
- 8005f32: 683b ldr r3, [r7, #0]
- 8005f34: 685b ldr r3, [r3, #4]
- 8005f36: f403 1380 and.w r3, r3, #1048576 ; 0x100000
- 8005f3a: 2b00 cmp r3, #0
- 8005f3c: d003 beq.n 8005f46 <HAL_GPIO_Init+0x2d6>
- {
- temp |= iocurrent;
- 8005f3e: 69ba ldr r2, [r7, #24]
- 8005f40: 693b ldr r3, [r7, #16]
- 8005f42: 4313 orrs r3, r2
- 8005f44: 61bb str r3, [r7, #24]
- }
- EXTI->RTSR = temp;
- 8005f46: 4a1e ldr r2, [pc, #120] ; (8005fc0 <HAL_GPIO_Init+0x350>)
- 8005f48: 69bb ldr r3, [r7, #24]
- 8005f4a: 6093 str r3, [r2, #8]
-
- temp = EXTI->FTSR;
- 8005f4c: 4b1c ldr r3, [pc, #112] ; (8005fc0 <HAL_GPIO_Init+0x350>)
- 8005f4e: 68db ldr r3, [r3, #12]
- 8005f50: 61bb str r3, [r7, #24]
- temp &= ~((uint32_t)iocurrent);
- 8005f52: 693b ldr r3, [r7, #16]
- 8005f54: 43db mvns r3, r3
- 8005f56: 69ba ldr r2, [r7, #24]
- 8005f58: 4013 ands r3, r2
- 8005f5a: 61bb str r3, [r7, #24]
- if((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
- 8005f5c: 683b ldr r3, [r7, #0]
- 8005f5e: 685b ldr r3, [r3, #4]
- 8005f60: f403 1300 and.w r3, r3, #2097152 ; 0x200000
- 8005f64: 2b00 cmp r3, #0
- 8005f66: d003 beq.n 8005f70 <HAL_GPIO_Init+0x300>
- {
- temp |= iocurrent;
- 8005f68: 69ba ldr r2, [r7, #24]
- 8005f6a: 693b ldr r3, [r7, #16]
- 8005f6c: 4313 orrs r3, r2
- 8005f6e: 61bb str r3, [r7, #24]
- }
- EXTI->FTSR = temp;
- 8005f70: 4a13 ldr r2, [pc, #76] ; (8005fc0 <HAL_GPIO_Init+0x350>)
- 8005f72: 69bb ldr r3, [r7, #24]
- 8005f74: 60d3 str r3, [r2, #12]
- for(position = 0; position < GPIO_NUMBER; position++)
- 8005f76: 69fb ldr r3, [r7, #28]
- 8005f78: 3301 adds r3, #1
- 8005f7a: 61fb str r3, [r7, #28]
- 8005f7c: 69fb ldr r3, [r7, #28]
- 8005f7e: 2b0f cmp r3, #15
- 8005f80: f67f ae86 bls.w 8005c90 <HAL_GPIO_Init+0x20>
- }
- }
- }
-}
- 8005f84: bf00 nop
- 8005f86: 3724 adds r7, #36 ; 0x24
- 8005f88: 46bd mov sp, r7
- 8005f8a: f85d 7b04 ldr.w r7, [sp], #4
- 8005f8e: 4770 bx lr
- 8005f90: 40023800 .word 0x40023800
- 8005f94: 40013800 .word 0x40013800
- 8005f98: 40020000 .word 0x40020000
- 8005f9c: 40020400 .word 0x40020400
- 8005fa0: 40020800 .word 0x40020800
- 8005fa4: 40020c00 .word 0x40020c00
- 8005fa8: 40021000 .word 0x40021000
- 8005fac: 40021400 .word 0x40021400
- 8005fb0: 40021800 .word 0x40021800
- 8005fb4: 40021c00 .word 0x40021c00
- 8005fb8: 40022000 .word 0x40022000
- 8005fbc: 40022400 .word 0x40022400
- 8005fc0: 40013c00 .word 0x40013c00
-
-08005fc4 <HAL_GPIO_WritePin>:
- * @arg GPIO_PIN_RESET: to clear the port pin
- * @arg GPIO_PIN_SET: to set the port pin
- * @retval None
- */
-void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
-{
- 8005fc4: b480 push {r7}
- 8005fc6: b083 sub sp, #12
- 8005fc8: af00 add r7, sp, #0
- 8005fca: 6078 str r0, [r7, #4]
- 8005fcc: 460b mov r3, r1
- 8005fce: 807b strh r3, [r7, #2]
- 8005fd0: 4613 mov r3, r2
- 8005fd2: 707b strb r3, [r7, #1]
- /* Check the parameters */
- assert_param(IS_GPIO_PIN(GPIO_Pin));
- assert_param(IS_GPIO_PIN_ACTION(PinState));
-
- if(PinState != GPIO_PIN_RESET)
- 8005fd4: 787b ldrb r3, [r7, #1]
- 8005fd6: 2b00 cmp r3, #0
- 8005fd8: d003 beq.n 8005fe2 <HAL_GPIO_WritePin+0x1e>
- {
- GPIOx->BSRR = GPIO_Pin;
- 8005fda: 887a ldrh r2, [r7, #2]
- 8005fdc: 687b ldr r3, [r7, #4]
- 8005fde: 619a str r2, [r3, #24]
- }
- else
- {
- GPIOx->BSRR = (uint32_t)GPIO_Pin << 16;
- }
-}
- 8005fe0: e003 b.n 8005fea <HAL_GPIO_WritePin+0x26>
- GPIOx->BSRR = (uint32_t)GPIO_Pin << 16;
- 8005fe2: 887b ldrh r3, [r7, #2]
- 8005fe4: 041a lsls r2, r3, #16
- 8005fe6: 687b ldr r3, [r7, #4]
- 8005fe8: 619a str r2, [r3, #24]
-}
- 8005fea: bf00 nop
- 8005fec: 370c adds r7, #12
- 8005fee: 46bd mov sp, r7
- 8005ff0: f85d 7b04 ldr.w r7, [sp], #4
- 8005ff4: 4770 bx lr
- ...
-
-08005ff8 <HAL_RCC_OscConfig>:
- * supported by this function. User should request a transition to HSE Off
- * first and then HSE On or HSE Bypass.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
-{
- 8005ff8: b580 push {r7, lr}
- 8005ffa: b086 sub sp, #24
- 8005ffc: af00 add r7, sp, #0
- 8005ffe: 6078 str r0, [r7, #4]
- uint32_t tickstart;
- FlagStatus pwrclkchanged = RESET;
- 8006000: 2300 movs r3, #0
- 8006002: 75fb strb r3, [r7, #23]
-
- /* Check Null pointer */
- if(RCC_OscInitStruct == NULL)
- 8006004: 687b ldr r3, [r7, #4]
- 8006006: 2b00 cmp r3, #0
- 8006008: d101 bne.n 800600e <HAL_RCC_OscConfig+0x16>
- {
- return HAL_ERROR;
- 800600a: 2301 movs r3, #1
- 800600c: e25e b.n 80064cc <HAL_RCC_OscConfig+0x4d4>
-
- /* Check the parameters */
- assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
-
- /*------------------------------- HSE Configuration ------------------------*/
- if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
- 800600e: 687b ldr r3, [r7, #4]
- 8006010: 681b ldr r3, [r3, #0]
- 8006012: f003 0301 and.w r3, r3, #1
- 8006016: 2b00 cmp r3, #0
- 8006018: f000 8087 beq.w 800612a <HAL_RCC_OscConfig+0x132>
- {
- /* Check the parameters */
- assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
- /* When the HSE is used as system clock or clock source for PLL, It can not be disabled */
- if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE)
- 800601c: 4b96 ldr r3, [pc, #600] ; (8006278 <HAL_RCC_OscConfig+0x280>)
- 800601e: 689b ldr r3, [r3, #8]
- 8006020: f003 030c and.w r3, r3, #12
- 8006024: 2b04 cmp r3, #4
- 8006026: d00c beq.n 8006042 <HAL_RCC_OscConfig+0x4a>
- || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)))
- 8006028: 4b93 ldr r3, [pc, #588] ; (8006278 <HAL_RCC_OscConfig+0x280>)
- 800602a: 689b ldr r3, [r3, #8]
- 800602c: f003 030c and.w r3, r3, #12
- 8006030: 2b08 cmp r3, #8
- 8006032: d112 bne.n 800605a <HAL_RCC_OscConfig+0x62>
- 8006034: 4b90 ldr r3, [pc, #576] ; (8006278 <HAL_RCC_OscConfig+0x280>)
- 8006036: 685b ldr r3, [r3, #4]
- 8006038: f403 0380 and.w r3, r3, #4194304 ; 0x400000
- 800603c: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000
- 8006040: d10b bne.n 800605a <HAL_RCC_OscConfig+0x62>
- {
- if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
- 8006042: 4b8d ldr r3, [pc, #564] ; (8006278 <HAL_RCC_OscConfig+0x280>)
- 8006044: 681b ldr r3, [r3, #0]
- 8006046: f403 3300 and.w r3, r3, #131072 ; 0x20000
- 800604a: 2b00 cmp r3, #0
- 800604c: d06c beq.n 8006128 <HAL_RCC_OscConfig+0x130>
- 800604e: 687b ldr r3, [r7, #4]
- 8006050: 685b ldr r3, [r3, #4]
- 8006052: 2b00 cmp r3, #0
- 8006054: d168 bne.n 8006128 <HAL_RCC_OscConfig+0x130>
- {
- return HAL_ERROR;
- 8006056: 2301 movs r3, #1
- 8006058: e238 b.n 80064cc <HAL_RCC_OscConfig+0x4d4>
- }
- }
- else
- {
- /* Set the new HSE configuration ---------------------------------------*/
- __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
- 800605a: 687b ldr r3, [r7, #4]
- 800605c: 685b ldr r3, [r3, #4]
- 800605e: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
- 8006062: d106 bne.n 8006072 <HAL_RCC_OscConfig+0x7a>
- 8006064: 4b84 ldr r3, [pc, #528] ; (8006278 <HAL_RCC_OscConfig+0x280>)
- 8006066: 681b ldr r3, [r3, #0]
- 8006068: 4a83 ldr r2, [pc, #524] ; (8006278 <HAL_RCC_OscConfig+0x280>)
- 800606a: f443 3380 orr.w r3, r3, #65536 ; 0x10000
- 800606e: 6013 str r3, [r2, #0]
- 8006070: e02e b.n 80060d0 <HAL_RCC_OscConfig+0xd8>
- 8006072: 687b ldr r3, [r7, #4]
- 8006074: 685b ldr r3, [r3, #4]
- 8006076: 2b00 cmp r3, #0
- 8006078: d10c bne.n 8006094 <HAL_RCC_OscConfig+0x9c>
- 800607a: 4b7f ldr r3, [pc, #508] ; (8006278 <HAL_RCC_OscConfig+0x280>)
- 800607c: 681b ldr r3, [r3, #0]
- 800607e: 4a7e ldr r2, [pc, #504] ; (8006278 <HAL_RCC_OscConfig+0x280>)
- 8006080: f423 3380 bic.w r3, r3, #65536 ; 0x10000
- 8006084: 6013 str r3, [r2, #0]
- 8006086: 4b7c ldr r3, [pc, #496] ; (8006278 <HAL_RCC_OscConfig+0x280>)
- 8006088: 681b ldr r3, [r3, #0]
- 800608a: 4a7b ldr r2, [pc, #492] ; (8006278 <HAL_RCC_OscConfig+0x280>)
- 800608c: f423 2380 bic.w r3, r3, #262144 ; 0x40000
- 8006090: 6013 str r3, [r2, #0]
- 8006092: e01d b.n 80060d0 <HAL_RCC_OscConfig+0xd8>
- 8006094: 687b ldr r3, [r7, #4]
- 8006096: 685b ldr r3, [r3, #4]
- 8006098: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000
- 800609c: d10c bne.n 80060b8 <HAL_RCC_OscConfig+0xc0>
- 800609e: 4b76 ldr r3, [pc, #472] ; (8006278 <HAL_RCC_OscConfig+0x280>)
- 80060a0: 681b ldr r3, [r3, #0]
- 80060a2: 4a75 ldr r2, [pc, #468] ; (8006278 <HAL_RCC_OscConfig+0x280>)
- 80060a4: f443 2380 orr.w r3, r3, #262144 ; 0x40000
- 80060a8: 6013 str r3, [r2, #0]
- 80060aa: 4b73 ldr r3, [pc, #460] ; (8006278 <HAL_RCC_OscConfig+0x280>)
- 80060ac: 681b ldr r3, [r3, #0]
- 80060ae: 4a72 ldr r2, [pc, #456] ; (8006278 <HAL_RCC_OscConfig+0x280>)
- 80060b0: f443 3380 orr.w r3, r3, #65536 ; 0x10000
- 80060b4: 6013 str r3, [r2, #0]
- 80060b6: e00b b.n 80060d0 <HAL_RCC_OscConfig+0xd8>
- 80060b8: 4b6f ldr r3, [pc, #444] ; (8006278 <HAL_RCC_OscConfig+0x280>)
- 80060ba: 681b ldr r3, [r3, #0]
- 80060bc: 4a6e ldr r2, [pc, #440] ; (8006278 <HAL_RCC_OscConfig+0x280>)
- 80060be: f423 3380 bic.w r3, r3, #65536 ; 0x10000
- 80060c2: 6013 str r3, [r2, #0]
- 80060c4: 4b6c ldr r3, [pc, #432] ; (8006278 <HAL_RCC_OscConfig+0x280>)
- 80060c6: 681b ldr r3, [r3, #0]
- 80060c8: 4a6b ldr r2, [pc, #428] ; (8006278 <HAL_RCC_OscConfig+0x280>)
- 80060ca: f423 2380 bic.w r3, r3, #262144 ; 0x40000
- 80060ce: 6013 str r3, [r2, #0]
-
- /* Check the HSE State */
- if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
- 80060d0: 687b ldr r3, [r7, #4]
- 80060d2: 685b ldr r3, [r3, #4]
- 80060d4: 2b00 cmp r3, #0
- 80060d6: d013 beq.n 8006100 <HAL_RCC_OscConfig+0x108>
- {
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 80060d8: f7ff f8f2 bl 80052c0 <HAL_GetTick>
- 80060dc: 6138 str r0, [r7, #16]
-
- /* Wait till HSE is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
- 80060de: e008 b.n 80060f2 <HAL_RCC_OscConfig+0xfa>
- {
- if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
- 80060e0: f7ff f8ee bl 80052c0 <HAL_GetTick>
- 80060e4: 4602 mov r2, r0
- 80060e6: 693b ldr r3, [r7, #16]
- 80060e8: 1ad3 subs r3, r2, r3
- 80060ea: 2b64 cmp r3, #100 ; 0x64
- 80060ec: d901 bls.n 80060f2 <HAL_RCC_OscConfig+0xfa>
- {
- return HAL_TIMEOUT;
- 80060ee: 2303 movs r3, #3
- 80060f0: e1ec b.n 80064cc <HAL_RCC_OscConfig+0x4d4>
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
- 80060f2: 4b61 ldr r3, [pc, #388] ; (8006278 <HAL_RCC_OscConfig+0x280>)
- 80060f4: 681b ldr r3, [r3, #0]
- 80060f6: f403 3300 and.w r3, r3, #131072 ; 0x20000
- 80060fa: 2b00 cmp r3, #0
- 80060fc: d0f0 beq.n 80060e0 <HAL_RCC_OscConfig+0xe8>
- 80060fe: e014 b.n 800612a <HAL_RCC_OscConfig+0x132>
- }
- }
- else
- {
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 8006100: f7ff f8de bl 80052c0 <HAL_GetTick>
- 8006104: 6138 str r0, [r7, #16]
-
- /* Wait till HSE is bypassed or disabled */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
- 8006106: e008 b.n 800611a <HAL_RCC_OscConfig+0x122>
- {
- if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
- 8006108: f7ff f8da bl 80052c0 <HAL_GetTick>
- 800610c: 4602 mov r2, r0
- 800610e: 693b ldr r3, [r7, #16]
- 8006110: 1ad3 subs r3, r2, r3
- 8006112: 2b64 cmp r3, #100 ; 0x64
- 8006114: d901 bls.n 800611a <HAL_RCC_OscConfig+0x122>
- {
- return HAL_TIMEOUT;
- 8006116: 2303 movs r3, #3
- 8006118: e1d8 b.n 80064cc <HAL_RCC_OscConfig+0x4d4>
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
- 800611a: 4b57 ldr r3, [pc, #348] ; (8006278 <HAL_RCC_OscConfig+0x280>)
- 800611c: 681b ldr r3, [r3, #0]
- 800611e: f403 3300 and.w r3, r3, #131072 ; 0x20000
- 8006122: 2b00 cmp r3, #0
- 8006124: d1f0 bne.n 8006108 <HAL_RCC_OscConfig+0x110>
- 8006126: e000 b.n 800612a <HAL_RCC_OscConfig+0x132>
- if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
- 8006128: bf00 nop
- }
- }
- }
- }
- /*----------------------------- HSI Configuration --------------------------*/
- if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
- 800612a: 687b ldr r3, [r7, #4]
- 800612c: 681b ldr r3, [r3, #0]
- 800612e: f003 0302 and.w r3, r3, #2
- 8006132: 2b00 cmp r3, #0
- 8006134: d069 beq.n 800620a <HAL_RCC_OscConfig+0x212>
- /* Check the parameters */
- assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
- assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
-
- /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
- if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI)
- 8006136: 4b50 ldr r3, [pc, #320] ; (8006278 <HAL_RCC_OscConfig+0x280>)
- 8006138: 689b ldr r3, [r3, #8]
- 800613a: f003 030c and.w r3, r3, #12
- 800613e: 2b00 cmp r3, #0
- 8006140: d00b beq.n 800615a <HAL_RCC_OscConfig+0x162>
- || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)))
- 8006142: 4b4d ldr r3, [pc, #308] ; (8006278 <HAL_RCC_OscConfig+0x280>)
- 8006144: 689b ldr r3, [r3, #8]
- 8006146: f003 030c and.w r3, r3, #12
- 800614a: 2b08 cmp r3, #8
- 800614c: d11c bne.n 8006188 <HAL_RCC_OscConfig+0x190>
- 800614e: 4b4a ldr r3, [pc, #296] ; (8006278 <HAL_RCC_OscConfig+0x280>)
- 8006150: 685b ldr r3, [r3, #4]
- 8006152: f403 0380 and.w r3, r3, #4194304 ; 0x400000
- 8006156: 2b00 cmp r3, #0
- 8006158: d116 bne.n 8006188 <HAL_RCC_OscConfig+0x190>
- {
- /* When HSI is used as system clock it will not disabled */
- if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
- 800615a: 4b47 ldr r3, [pc, #284] ; (8006278 <HAL_RCC_OscConfig+0x280>)
- 800615c: 681b ldr r3, [r3, #0]
- 800615e: f003 0302 and.w r3, r3, #2
- 8006162: 2b00 cmp r3, #0
- 8006164: d005 beq.n 8006172 <HAL_RCC_OscConfig+0x17a>
- 8006166: 687b ldr r3, [r7, #4]
- 8006168: 68db ldr r3, [r3, #12]
- 800616a: 2b01 cmp r3, #1
- 800616c: d001 beq.n 8006172 <HAL_RCC_OscConfig+0x17a>
- {
- return HAL_ERROR;
- 800616e: 2301 movs r3, #1
- 8006170: e1ac b.n 80064cc <HAL_RCC_OscConfig+0x4d4>
- }
- /* Otherwise, just the calibration is allowed */
- else
- {
- /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
- __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
- 8006172: 4b41 ldr r3, [pc, #260] ; (8006278 <HAL_RCC_OscConfig+0x280>)
- 8006174: 681b ldr r3, [r3, #0]
- 8006176: f023 02f8 bic.w r2, r3, #248 ; 0xf8
- 800617a: 687b ldr r3, [r7, #4]
- 800617c: 691b ldr r3, [r3, #16]
- 800617e: 00db lsls r3, r3, #3
- 8006180: 493d ldr r1, [pc, #244] ; (8006278 <HAL_RCC_OscConfig+0x280>)
- 8006182: 4313 orrs r3, r2
- 8006184: 600b str r3, [r1, #0]
- if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
- 8006186: e040 b.n 800620a <HAL_RCC_OscConfig+0x212>
- }
- }
- else
- {
- /* Check the HSI State */
- if((RCC_OscInitStruct->HSIState)!= RCC_HSI_OFF)
- 8006188: 687b ldr r3, [r7, #4]
- 800618a: 68db ldr r3, [r3, #12]
- 800618c: 2b00 cmp r3, #0
- 800618e: d023 beq.n 80061d8 <HAL_RCC_OscConfig+0x1e0>
- {
- /* Enable the Internal High Speed oscillator (HSI). */
- __HAL_RCC_HSI_ENABLE();
- 8006190: 4b39 ldr r3, [pc, #228] ; (8006278 <HAL_RCC_OscConfig+0x280>)
- 8006192: 681b ldr r3, [r3, #0]
- 8006194: 4a38 ldr r2, [pc, #224] ; (8006278 <HAL_RCC_OscConfig+0x280>)
- 8006196: f043 0301 orr.w r3, r3, #1
- 800619a: 6013 str r3, [r2, #0]
-
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 800619c: f7ff f890 bl 80052c0 <HAL_GetTick>
- 80061a0: 6138 str r0, [r7, #16]
-
- /* Wait till HSI is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
- 80061a2: e008 b.n 80061b6 <HAL_RCC_OscConfig+0x1be>
- {
- if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
- 80061a4: f7ff f88c bl 80052c0 <HAL_GetTick>
- 80061a8: 4602 mov r2, r0
- 80061aa: 693b ldr r3, [r7, #16]
- 80061ac: 1ad3 subs r3, r2, r3
- 80061ae: 2b02 cmp r3, #2
- 80061b0: d901 bls.n 80061b6 <HAL_RCC_OscConfig+0x1be>
- {
- return HAL_TIMEOUT;
- 80061b2: 2303 movs r3, #3
- 80061b4: e18a b.n 80064cc <HAL_RCC_OscConfig+0x4d4>
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
- 80061b6: 4b30 ldr r3, [pc, #192] ; (8006278 <HAL_RCC_OscConfig+0x280>)
- 80061b8: 681b ldr r3, [r3, #0]
- 80061ba: f003 0302 and.w r3, r3, #2
- 80061be: 2b00 cmp r3, #0
- 80061c0: d0f0 beq.n 80061a4 <HAL_RCC_OscConfig+0x1ac>
- }
- }
-
- /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
- __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
- 80061c2: 4b2d ldr r3, [pc, #180] ; (8006278 <HAL_RCC_OscConfig+0x280>)
- 80061c4: 681b ldr r3, [r3, #0]
- 80061c6: f023 02f8 bic.w r2, r3, #248 ; 0xf8
- 80061ca: 687b ldr r3, [r7, #4]
- 80061cc: 691b ldr r3, [r3, #16]
- 80061ce: 00db lsls r3, r3, #3
- 80061d0: 4929 ldr r1, [pc, #164] ; (8006278 <HAL_RCC_OscConfig+0x280>)
- 80061d2: 4313 orrs r3, r2
- 80061d4: 600b str r3, [r1, #0]
- 80061d6: e018 b.n 800620a <HAL_RCC_OscConfig+0x212>
- }
- else
- {
- /* Disable the Internal High Speed oscillator (HSI). */
- __HAL_RCC_HSI_DISABLE();
- 80061d8: 4b27 ldr r3, [pc, #156] ; (8006278 <HAL_RCC_OscConfig+0x280>)
- 80061da: 681b ldr r3, [r3, #0]
- 80061dc: 4a26 ldr r2, [pc, #152] ; (8006278 <HAL_RCC_OscConfig+0x280>)
- 80061de: f023 0301 bic.w r3, r3, #1
- 80061e2: 6013 str r3, [r2, #0]
-
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 80061e4: f7ff f86c bl 80052c0 <HAL_GetTick>
- 80061e8: 6138 str r0, [r7, #16]
-
- /* Wait till HSI is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
- 80061ea: e008 b.n 80061fe <HAL_RCC_OscConfig+0x206>
- {
- if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
- 80061ec: f7ff f868 bl 80052c0 <HAL_GetTick>
- 80061f0: 4602 mov r2, r0
- 80061f2: 693b ldr r3, [r7, #16]
- 80061f4: 1ad3 subs r3, r2, r3
- 80061f6: 2b02 cmp r3, #2
- 80061f8: d901 bls.n 80061fe <HAL_RCC_OscConfig+0x206>
- {
- return HAL_TIMEOUT;
- 80061fa: 2303 movs r3, #3
- 80061fc: e166 b.n 80064cc <HAL_RCC_OscConfig+0x4d4>
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
- 80061fe: 4b1e ldr r3, [pc, #120] ; (8006278 <HAL_RCC_OscConfig+0x280>)
- 8006200: 681b ldr r3, [r3, #0]
- 8006202: f003 0302 and.w r3, r3, #2
- 8006206: 2b00 cmp r3, #0
- 8006208: d1f0 bne.n 80061ec <HAL_RCC_OscConfig+0x1f4>
- }
- }
- }
- }
- /*------------------------------ LSI Configuration -------------------------*/
- if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
- 800620a: 687b ldr r3, [r7, #4]
- 800620c: 681b ldr r3, [r3, #0]
- 800620e: f003 0308 and.w r3, r3, #8
- 8006212: 2b00 cmp r3, #0
- 8006214: d038 beq.n 8006288 <HAL_RCC_OscConfig+0x290>
- {
- /* Check the parameters */
- assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
-
- /* Check the LSI State */
- if((RCC_OscInitStruct->LSIState)!= RCC_LSI_OFF)
- 8006216: 687b ldr r3, [r7, #4]
- 8006218: 695b ldr r3, [r3, #20]
- 800621a: 2b00 cmp r3, #0
- 800621c: d019 beq.n 8006252 <HAL_RCC_OscConfig+0x25a>
- {
- /* Enable the Internal Low Speed oscillator (LSI). */
- __HAL_RCC_LSI_ENABLE();
- 800621e: 4b16 ldr r3, [pc, #88] ; (8006278 <HAL_RCC_OscConfig+0x280>)
- 8006220: 6f5b ldr r3, [r3, #116] ; 0x74
- 8006222: 4a15 ldr r2, [pc, #84] ; (8006278 <HAL_RCC_OscConfig+0x280>)
- 8006224: f043 0301 orr.w r3, r3, #1
- 8006228: 6753 str r3, [r2, #116] ; 0x74
-
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 800622a: f7ff f849 bl 80052c0 <HAL_GetTick>
- 800622e: 6138 str r0, [r7, #16]
-
- /* Wait till LSI is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
- 8006230: e008 b.n 8006244 <HAL_RCC_OscConfig+0x24c>
- {
- if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
- 8006232: f7ff f845 bl 80052c0 <HAL_GetTick>
- 8006236: 4602 mov r2, r0
- 8006238: 693b ldr r3, [r7, #16]
- 800623a: 1ad3 subs r3, r2, r3
- 800623c: 2b02 cmp r3, #2
- 800623e: d901 bls.n 8006244 <HAL_RCC_OscConfig+0x24c>
- {
- return HAL_TIMEOUT;
- 8006240: 2303 movs r3, #3
- 8006242: e143 b.n 80064cc <HAL_RCC_OscConfig+0x4d4>
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
- 8006244: 4b0c ldr r3, [pc, #48] ; (8006278 <HAL_RCC_OscConfig+0x280>)
- 8006246: 6f5b ldr r3, [r3, #116] ; 0x74
- 8006248: f003 0302 and.w r3, r3, #2
- 800624c: 2b00 cmp r3, #0
- 800624e: d0f0 beq.n 8006232 <HAL_RCC_OscConfig+0x23a>
- 8006250: e01a b.n 8006288 <HAL_RCC_OscConfig+0x290>
- }
- }
- else
- {
- /* Disable the Internal Low Speed oscillator (LSI). */
- __HAL_RCC_LSI_DISABLE();
- 8006252: 4b09 ldr r3, [pc, #36] ; (8006278 <HAL_RCC_OscConfig+0x280>)
- 8006254: 6f5b ldr r3, [r3, #116] ; 0x74
- 8006256: 4a08 ldr r2, [pc, #32] ; (8006278 <HAL_RCC_OscConfig+0x280>)
- 8006258: f023 0301 bic.w r3, r3, #1
- 800625c: 6753 str r3, [r2, #116] ; 0x74
-
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 800625e: f7ff f82f bl 80052c0 <HAL_GetTick>
- 8006262: 6138 str r0, [r7, #16]
-
- /* Wait till LSI is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
- 8006264: e00a b.n 800627c <HAL_RCC_OscConfig+0x284>
- {
- if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
- 8006266: f7ff f82b bl 80052c0 <HAL_GetTick>
- 800626a: 4602 mov r2, r0
- 800626c: 693b ldr r3, [r7, #16]
- 800626e: 1ad3 subs r3, r2, r3
- 8006270: 2b02 cmp r3, #2
- 8006272: d903 bls.n 800627c <HAL_RCC_OscConfig+0x284>
- {
- return HAL_TIMEOUT;
- 8006274: 2303 movs r3, #3
- 8006276: e129 b.n 80064cc <HAL_RCC_OscConfig+0x4d4>
- 8006278: 40023800 .word 0x40023800
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
- 800627c: 4b95 ldr r3, [pc, #596] ; (80064d4 <HAL_RCC_OscConfig+0x4dc>)
- 800627e: 6f5b ldr r3, [r3, #116] ; 0x74
- 8006280: f003 0302 and.w r3, r3, #2
- 8006284: 2b00 cmp r3, #0
- 8006286: d1ee bne.n 8006266 <HAL_RCC_OscConfig+0x26e>
- }
- }
- }
- }
- /*------------------------------ LSE Configuration -------------------------*/
- if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
- 8006288: 687b ldr r3, [r7, #4]
- 800628a: 681b ldr r3, [r3, #0]
- 800628c: f003 0304 and.w r3, r3, #4
- 8006290: 2b00 cmp r3, #0
- 8006292: f000 80a4 beq.w 80063de <HAL_RCC_OscConfig+0x3e6>
- /* Check the parameters */
- assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
-
- /* Update LSE configuration in Backup Domain control register */
- /* Requires to enable write access to Backup Domain of necessary */
- if(__HAL_RCC_PWR_IS_CLK_DISABLED())
- 8006296: 4b8f ldr r3, [pc, #572] ; (80064d4 <HAL_RCC_OscConfig+0x4dc>)
- 8006298: 6c1b ldr r3, [r3, #64] ; 0x40
- 800629a: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
- 800629e: 2b00 cmp r3, #0
- 80062a0: d10d bne.n 80062be <HAL_RCC_OscConfig+0x2c6>
- {
- /* Enable Power Clock*/
- __HAL_RCC_PWR_CLK_ENABLE();
- 80062a2: 4b8c ldr r3, [pc, #560] ; (80064d4 <HAL_RCC_OscConfig+0x4dc>)
- 80062a4: 6c1b ldr r3, [r3, #64] ; 0x40
- 80062a6: 4a8b ldr r2, [pc, #556] ; (80064d4 <HAL_RCC_OscConfig+0x4dc>)
- 80062a8: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
- 80062ac: 6413 str r3, [r2, #64] ; 0x40
- 80062ae: 4b89 ldr r3, [pc, #548] ; (80064d4 <HAL_RCC_OscConfig+0x4dc>)
- 80062b0: 6c1b ldr r3, [r3, #64] ; 0x40
- 80062b2: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
- 80062b6: 60fb str r3, [r7, #12]
- 80062b8: 68fb ldr r3, [r7, #12]
- pwrclkchanged = SET;
- 80062ba: 2301 movs r3, #1
- 80062bc: 75fb strb r3, [r7, #23]
- }
-
- if(HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP))
- 80062be: 4b86 ldr r3, [pc, #536] ; (80064d8 <HAL_RCC_OscConfig+0x4e0>)
- 80062c0: 681b ldr r3, [r3, #0]
- 80062c2: f403 7380 and.w r3, r3, #256 ; 0x100
- 80062c6: 2b00 cmp r3, #0
- 80062c8: d118 bne.n 80062fc <HAL_RCC_OscConfig+0x304>
- {
- /* Enable write access to Backup domain */
- PWR->CR1 |= PWR_CR1_DBP;
- 80062ca: 4b83 ldr r3, [pc, #524] ; (80064d8 <HAL_RCC_OscConfig+0x4e0>)
- 80062cc: 681b ldr r3, [r3, #0]
- 80062ce: 4a82 ldr r2, [pc, #520] ; (80064d8 <HAL_RCC_OscConfig+0x4e0>)
- 80062d0: f443 7380 orr.w r3, r3, #256 ; 0x100
- 80062d4: 6013 str r3, [r2, #0]
-
- /* Wait for Backup domain Write protection disable */
- tickstart = HAL_GetTick();
- 80062d6: f7fe fff3 bl 80052c0 <HAL_GetTick>
- 80062da: 6138 str r0, [r7, #16]
-
- while(HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP))
- 80062dc: e008 b.n 80062f0 <HAL_RCC_OscConfig+0x2f8>
- {
- if((HAL_GetTick() - tickstart ) > RCC_DBP_TIMEOUT_VALUE)
- 80062de: f7fe ffef bl 80052c0 <HAL_GetTick>
- 80062e2: 4602 mov r2, r0
- 80062e4: 693b ldr r3, [r7, #16]
- 80062e6: 1ad3 subs r3, r2, r3
- 80062e8: 2b64 cmp r3, #100 ; 0x64
- 80062ea: d901 bls.n 80062f0 <HAL_RCC_OscConfig+0x2f8>
- {
- return HAL_TIMEOUT;
- 80062ec: 2303 movs r3, #3
- 80062ee: e0ed b.n 80064cc <HAL_RCC_OscConfig+0x4d4>
- while(HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP))
- 80062f0: 4b79 ldr r3, [pc, #484] ; (80064d8 <HAL_RCC_OscConfig+0x4e0>)
- 80062f2: 681b ldr r3, [r3, #0]
- 80062f4: f403 7380 and.w r3, r3, #256 ; 0x100
- 80062f8: 2b00 cmp r3, #0
- 80062fa: d0f0 beq.n 80062de <HAL_RCC_OscConfig+0x2e6>
- }
- }
- }
-
- /* Set the new LSE configuration -----------------------------------------*/
- __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
- 80062fc: 687b ldr r3, [r7, #4]
- 80062fe: 689b ldr r3, [r3, #8]
- 8006300: 2b01 cmp r3, #1
- 8006302: d106 bne.n 8006312 <HAL_RCC_OscConfig+0x31a>
- 8006304: 4b73 ldr r3, [pc, #460] ; (80064d4 <HAL_RCC_OscConfig+0x4dc>)
- 8006306: 6f1b ldr r3, [r3, #112] ; 0x70
- 8006308: 4a72 ldr r2, [pc, #456] ; (80064d4 <HAL_RCC_OscConfig+0x4dc>)
- 800630a: f043 0301 orr.w r3, r3, #1
- 800630e: 6713 str r3, [r2, #112] ; 0x70
- 8006310: e02d b.n 800636e <HAL_RCC_OscConfig+0x376>
- 8006312: 687b ldr r3, [r7, #4]
- 8006314: 689b ldr r3, [r3, #8]
- 8006316: 2b00 cmp r3, #0
- 8006318: d10c bne.n 8006334 <HAL_RCC_OscConfig+0x33c>
- 800631a: 4b6e ldr r3, [pc, #440] ; (80064d4 <HAL_RCC_OscConfig+0x4dc>)
- 800631c: 6f1b ldr r3, [r3, #112] ; 0x70
- 800631e: 4a6d ldr r2, [pc, #436] ; (80064d4 <HAL_RCC_OscConfig+0x4dc>)
- 8006320: f023 0301 bic.w r3, r3, #1
- 8006324: 6713 str r3, [r2, #112] ; 0x70
- 8006326: 4b6b ldr r3, [pc, #428] ; (80064d4 <HAL_RCC_OscConfig+0x4dc>)
- 8006328: 6f1b ldr r3, [r3, #112] ; 0x70
- 800632a: 4a6a ldr r2, [pc, #424] ; (80064d4 <HAL_RCC_OscConfig+0x4dc>)
- 800632c: f023 0304 bic.w r3, r3, #4
- 8006330: 6713 str r3, [r2, #112] ; 0x70
- 8006332: e01c b.n 800636e <HAL_RCC_OscConfig+0x376>
- 8006334: 687b ldr r3, [r7, #4]
- 8006336: 689b ldr r3, [r3, #8]
- 8006338: 2b05 cmp r3, #5
- 800633a: d10c bne.n 8006356 <HAL_RCC_OscConfig+0x35e>
- 800633c: 4b65 ldr r3, [pc, #404] ; (80064d4 <HAL_RCC_OscConfig+0x4dc>)
- 800633e: 6f1b ldr r3, [r3, #112] ; 0x70
- 8006340: 4a64 ldr r2, [pc, #400] ; (80064d4 <HAL_RCC_OscConfig+0x4dc>)
- 8006342: f043 0304 orr.w r3, r3, #4
- 8006346: 6713 str r3, [r2, #112] ; 0x70
- 8006348: 4b62 ldr r3, [pc, #392] ; (80064d4 <HAL_RCC_OscConfig+0x4dc>)
- 800634a: 6f1b ldr r3, [r3, #112] ; 0x70
- 800634c: 4a61 ldr r2, [pc, #388] ; (80064d4 <HAL_RCC_OscConfig+0x4dc>)
- 800634e: f043 0301 orr.w r3, r3, #1
- 8006352: 6713 str r3, [r2, #112] ; 0x70
- 8006354: e00b b.n 800636e <HAL_RCC_OscConfig+0x376>
- 8006356: 4b5f ldr r3, [pc, #380] ; (80064d4 <HAL_RCC_OscConfig+0x4dc>)
- 8006358: 6f1b ldr r3, [r3, #112] ; 0x70
- 800635a: 4a5e ldr r2, [pc, #376] ; (80064d4 <HAL_RCC_OscConfig+0x4dc>)
- 800635c: f023 0301 bic.w r3, r3, #1
- 8006360: 6713 str r3, [r2, #112] ; 0x70
- 8006362: 4b5c ldr r3, [pc, #368] ; (80064d4 <HAL_RCC_OscConfig+0x4dc>)
- 8006364: 6f1b ldr r3, [r3, #112] ; 0x70
- 8006366: 4a5b ldr r2, [pc, #364] ; (80064d4 <HAL_RCC_OscConfig+0x4dc>)
- 8006368: f023 0304 bic.w r3, r3, #4
- 800636c: 6713 str r3, [r2, #112] ; 0x70
- /* Check the LSE State */
- if((RCC_OscInitStruct->LSEState) != RCC_LSE_OFF)
- 800636e: 687b ldr r3, [r7, #4]
- 8006370: 689b ldr r3, [r3, #8]
- 8006372: 2b00 cmp r3, #0
- 8006374: d015 beq.n 80063a2 <HAL_RCC_OscConfig+0x3aa>
- {
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 8006376: f7fe ffa3 bl 80052c0 <HAL_GetTick>
- 800637a: 6138 str r0, [r7, #16]
-
- /* Wait till LSE is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
- 800637c: e00a b.n 8006394 <HAL_RCC_OscConfig+0x39c>
- {
- if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
- 800637e: f7fe ff9f bl 80052c0 <HAL_GetTick>
- 8006382: 4602 mov r2, r0
- 8006384: 693b ldr r3, [r7, #16]
- 8006386: 1ad3 subs r3, r2, r3
- 8006388: f241 3288 movw r2, #5000 ; 0x1388
- 800638c: 4293 cmp r3, r2
- 800638e: d901 bls.n 8006394 <HAL_RCC_OscConfig+0x39c>
- {
- return HAL_TIMEOUT;
- 8006390: 2303 movs r3, #3
- 8006392: e09b b.n 80064cc <HAL_RCC_OscConfig+0x4d4>
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
- 8006394: 4b4f ldr r3, [pc, #316] ; (80064d4 <HAL_RCC_OscConfig+0x4dc>)
- 8006396: 6f1b ldr r3, [r3, #112] ; 0x70
- 8006398: f003 0302 and.w r3, r3, #2
- 800639c: 2b00 cmp r3, #0
- 800639e: d0ee beq.n 800637e <HAL_RCC_OscConfig+0x386>
- 80063a0: e014 b.n 80063cc <HAL_RCC_OscConfig+0x3d4>
- }
- }
- else
- {
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 80063a2: f7fe ff8d bl 80052c0 <HAL_GetTick>
- 80063a6: 6138 str r0, [r7, #16]
-
- /* Wait till LSE is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
- 80063a8: e00a b.n 80063c0 <HAL_RCC_OscConfig+0x3c8>
- {
- if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
- 80063aa: f7fe ff89 bl 80052c0 <HAL_GetTick>
- 80063ae: 4602 mov r2, r0
- 80063b0: 693b ldr r3, [r7, #16]
- 80063b2: 1ad3 subs r3, r2, r3
- 80063b4: f241 3288 movw r2, #5000 ; 0x1388
- 80063b8: 4293 cmp r3, r2
- 80063ba: d901 bls.n 80063c0 <HAL_RCC_OscConfig+0x3c8>
- {
- return HAL_TIMEOUT;
- 80063bc: 2303 movs r3, #3
- 80063be: e085 b.n 80064cc <HAL_RCC_OscConfig+0x4d4>
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
- 80063c0: 4b44 ldr r3, [pc, #272] ; (80064d4 <HAL_RCC_OscConfig+0x4dc>)
- 80063c2: 6f1b ldr r3, [r3, #112] ; 0x70
- 80063c4: f003 0302 and.w r3, r3, #2
- 80063c8: 2b00 cmp r3, #0
- 80063ca: d1ee bne.n 80063aa <HAL_RCC_OscConfig+0x3b2>
- }
- }
- }
-
- /* Restore clock configuration if changed */
- if(pwrclkchanged == SET)
- 80063cc: 7dfb ldrb r3, [r7, #23]
- 80063ce: 2b01 cmp r3, #1
- 80063d0: d105 bne.n 80063de <HAL_RCC_OscConfig+0x3e6>
- {
- __HAL_RCC_PWR_CLK_DISABLE();
- 80063d2: 4b40 ldr r3, [pc, #256] ; (80064d4 <HAL_RCC_OscConfig+0x4dc>)
- 80063d4: 6c1b ldr r3, [r3, #64] ; 0x40
- 80063d6: 4a3f ldr r2, [pc, #252] ; (80064d4 <HAL_RCC_OscConfig+0x4dc>)
- 80063d8: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000
- 80063dc: 6413 str r3, [r2, #64] ; 0x40
- }
- }
- /*-------------------------------- PLL Configuration -----------------------*/
- /* Check the parameters */
- assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
- if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
- 80063de: 687b ldr r3, [r7, #4]
- 80063e0: 699b ldr r3, [r3, #24]
- 80063e2: 2b00 cmp r3, #0
- 80063e4: d071 beq.n 80064ca <HAL_RCC_OscConfig+0x4d2>
- {
- /* Check if the PLL is used as system clock or not */
- if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
- 80063e6: 4b3b ldr r3, [pc, #236] ; (80064d4 <HAL_RCC_OscConfig+0x4dc>)
- 80063e8: 689b ldr r3, [r3, #8]
- 80063ea: f003 030c and.w r3, r3, #12
- 80063ee: 2b08 cmp r3, #8
- 80063f0: d069 beq.n 80064c6 <HAL_RCC_OscConfig+0x4ce>
- {
- if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
- 80063f2: 687b ldr r3, [r7, #4]
- 80063f4: 699b ldr r3, [r3, #24]
- 80063f6: 2b02 cmp r3, #2
- 80063f8: d14b bne.n 8006492 <HAL_RCC_OscConfig+0x49a>
-#if defined (RCC_PLLCFGR_PLLR)
- assert_param(IS_RCC_PLLR_VALUE(RCC_OscInitStruct->PLL.PLLR));
-#endif
-
- /* Disable the main PLL. */
- __HAL_RCC_PLL_DISABLE();
- 80063fa: 4b36 ldr r3, [pc, #216] ; (80064d4 <HAL_RCC_OscConfig+0x4dc>)
- 80063fc: 681b ldr r3, [r3, #0]
- 80063fe: 4a35 ldr r2, [pc, #212] ; (80064d4 <HAL_RCC_OscConfig+0x4dc>)
- 8006400: f023 7380 bic.w r3, r3, #16777216 ; 0x1000000
- 8006404: 6013 str r3, [r2, #0]
-
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 8006406: f7fe ff5b bl 80052c0 <HAL_GetTick>
- 800640a: 6138 str r0, [r7, #16]
-
- /* Wait till PLL is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
- 800640c: e008 b.n 8006420 <HAL_RCC_OscConfig+0x428>
- {
- if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
- 800640e: f7fe ff57 bl 80052c0 <HAL_GetTick>
- 8006412: 4602 mov r2, r0
- 8006414: 693b ldr r3, [r7, #16]
- 8006416: 1ad3 subs r3, r2, r3
- 8006418: 2b02 cmp r3, #2
- 800641a: d901 bls.n 8006420 <HAL_RCC_OscConfig+0x428>
- {
- return HAL_TIMEOUT;
- 800641c: 2303 movs r3, #3
- 800641e: e055 b.n 80064cc <HAL_RCC_OscConfig+0x4d4>
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
- 8006420: 4b2c ldr r3, [pc, #176] ; (80064d4 <HAL_RCC_OscConfig+0x4dc>)
- 8006422: 681b ldr r3, [r3, #0]
- 8006424: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
- 8006428: 2b00 cmp r3, #0
- 800642a: d1f0 bne.n 800640e <HAL_RCC_OscConfig+0x416>
- }
- }
-
- /* Configure the main PLL clock source, multiplication and division factors. */
-#if defined (RCC_PLLCFGR_PLLR)
- __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
- 800642c: 687b ldr r3, [r7, #4]
- 800642e: 69da ldr r2, [r3, #28]
- 8006430: 687b ldr r3, [r7, #4]
- 8006432: 6a1b ldr r3, [r3, #32]
- 8006434: 431a orrs r2, r3
- 8006436: 687b ldr r3, [r7, #4]
- 8006438: 6a5b ldr r3, [r3, #36] ; 0x24
- 800643a: 019b lsls r3, r3, #6
- 800643c: 431a orrs r2, r3
- 800643e: 687b ldr r3, [r7, #4]
- 8006440: 6a9b ldr r3, [r3, #40] ; 0x28
- 8006442: 085b lsrs r3, r3, #1
- 8006444: 3b01 subs r3, #1
- 8006446: 041b lsls r3, r3, #16
- 8006448: 431a orrs r2, r3
- 800644a: 687b ldr r3, [r7, #4]
- 800644c: 6adb ldr r3, [r3, #44] ; 0x2c
- 800644e: 061b lsls r3, r3, #24
- 8006450: 431a orrs r2, r3
- 8006452: 687b ldr r3, [r7, #4]
- 8006454: 6b1b ldr r3, [r3, #48] ; 0x30
- 8006456: 071b lsls r3, r3, #28
- 8006458: 491e ldr r1, [pc, #120] ; (80064d4 <HAL_RCC_OscConfig+0x4dc>)
- 800645a: 4313 orrs r3, r2
- 800645c: 604b str r3, [r1, #4]
- RCC_OscInitStruct->PLL.PLLP,
- RCC_OscInitStruct->PLL.PLLQ);
-#endif
-
- /* Enable the main PLL. */
- __HAL_RCC_PLL_ENABLE();
- 800645e: 4b1d ldr r3, [pc, #116] ; (80064d4 <HAL_RCC_OscConfig+0x4dc>)
- 8006460: 681b ldr r3, [r3, #0]
- 8006462: 4a1c ldr r2, [pc, #112] ; (80064d4 <HAL_RCC_OscConfig+0x4dc>)
- 8006464: f043 7380 orr.w r3, r3, #16777216 ; 0x1000000
- 8006468: 6013 str r3, [r2, #0]
-
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 800646a: f7fe ff29 bl 80052c0 <HAL_GetTick>
- 800646e: 6138 str r0, [r7, #16]
-
- /* Wait till PLL is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
- 8006470: e008 b.n 8006484 <HAL_RCC_OscConfig+0x48c>
- {
- if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
- 8006472: f7fe ff25 bl 80052c0 <HAL_GetTick>
- 8006476: 4602 mov r2, r0
- 8006478: 693b ldr r3, [r7, #16]
- 800647a: 1ad3 subs r3, r2, r3
- 800647c: 2b02 cmp r3, #2
- 800647e: d901 bls.n 8006484 <HAL_RCC_OscConfig+0x48c>
- {
- return HAL_TIMEOUT;
- 8006480: 2303 movs r3, #3
- 8006482: e023 b.n 80064cc <HAL_RCC_OscConfig+0x4d4>
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
- 8006484: 4b13 ldr r3, [pc, #76] ; (80064d4 <HAL_RCC_OscConfig+0x4dc>)
- 8006486: 681b ldr r3, [r3, #0]
- 8006488: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
- 800648c: 2b00 cmp r3, #0
- 800648e: d0f0 beq.n 8006472 <HAL_RCC_OscConfig+0x47a>
- 8006490: e01b b.n 80064ca <HAL_RCC_OscConfig+0x4d2>
- }
- }
- else
- {
- /* Disable the main PLL. */
- __HAL_RCC_PLL_DISABLE();
- 8006492: 4b10 ldr r3, [pc, #64] ; (80064d4 <HAL_RCC_OscConfig+0x4dc>)
- 8006494: 681b ldr r3, [r3, #0]
- 8006496: 4a0f ldr r2, [pc, #60] ; (80064d4 <HAL_RCC_OscConfig+0x4dc>)
- 8006498: f023 7380 bic.w r3, r3, #16777216 ; 0x1000000
- 800649c: 6013 str r3, [r2, #0]
-
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 800649e: f7fe ff0f bl 80052c0 <HAL_GetTick>
- 80064a2: 6138 str r0, [r7, #16]
-
- /* Wait till PLL is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
- 80064a4: e008 b.n 80064b8 <HAL_RCC_OscConfig+0x4c0>
- {
- if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
- 80064a6: f7fe ff0b bl 80052c0 <HAL_GetTick>
- 80064aa: 4602 mov r2, r0
- 80064ac: 693b ldr r3, [r7, #16]
- 80064ae: 1ad3 subs r3, r2, r3
- 80064b0: 2b02 cmp r3, #2
- 80064b2: d901 bls.n 80064b8 <HAL_RCC_OscConfig+0x4c0>
- {
- return HAL_TIMEOUT;
- 80064b4: 2303 movs r3, #3
- 80064b6: e009 b.n 80064cc <HAL_RCC_OscConfig+0x4d4>
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
- 80064b8: 4b06 ldr r3, [pc, #24] ; (80064d4 <HAL_RCC_OscConfig+0x4dc>)
- 80064ba: 681b ldr r3, [r3, #0]
- 80064bc: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
- 80064c0: 2b00 cmp r3, #0
- 80064c2: d1f0 bne.n 80064a6 <HAL_RCC_OscConfig+0x4ae>
- 80064c4: e001 b.n 80064ca <HAL_RCC_OscConfig+0x4d2>
- }
- }
- }
- else
- {
- return HAL_ERROR;
- 80064c6: 2301 movs r3, #1
- 80064c8: e000 b.n 80064cc <HAL_RCC_OscConfig+0x4d4>
- }
- }
- return HAL_OK;
- 80064ca: 2300 movs r3, #0
-}
- 80064cc: 4618 mov r0, r3
- 80064ce: 3718 adds r7, #24
- 80064d0: 46bd mov sp, r7
- 80064d2: bd80 pop {r7, pc}
- 80064d4: 40023800 .word 0x40023800
- 80064d8: 40007000 .word 0x40007000
-
-080064dc <HAL_RCC_ClockConfig>:
- * HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency
- * (for more details refer to section above "Initialization/de-initialization functions")
- * @retval None
- */
-HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
-{
- 80064dc: b580 push {r7, lr}
- 80064de: b084 sub sp, #16
- 80064e0: af00 add r7, sp, #0
- 80064e2: 6078 str r0, [r7, #4]
- 80064e4: 6039 str r1, [r7, #0]
- uint32_t tickstart = 0;
- 80064e6: 2300 movs r3, #0
- 80064e8: 60fb str r3, [r7, #12]
-
- /* Check Null pointer */
- if(RCC_ClkInitStruct == NULL)
- 80064ea: 687b ldr r3, [r7, #4]
- 80064ec: 2b00 cmp r3, #0
- 80064ee: d101 bne.n 80064f4 <HAL_RCC_ClockConfig+0x18>
- {
- return HAL_ERROR;
- 80064f0: 2301 movs r3, #1
- 80064f2: e0ce b.n 8006692 <HAL_RCC_ClockConfig+0x1b6>
- /* To correctly read data from FLASH memory, the number of wait states (LATENCY)
- must be correctly programmed according to the frequency of the CPU clock
- (HCLK) and the supply voltage of the device. */
-
- /* Increasing the CPU frequency */
- if(FLatency > __HAL_FLASH_GET_LATENCY())
- 80064f4: 4b69 ldr r3, [pc, #420] ; (800669c <HAL_RCC_ClockConfig+0x1c0>)
- 80064f6: 681b ldr r3, [r3, #0]
- 80064f8: f003 030f and.w r3, r3, #15
- 80064fc: 683a ldr r2, [r7, #0]
- 80064fe: 429a cmp r2, r3
- 8006500: d910 bls.n 8006524 <HAL_RCC_ClockConfig+0x48>
- {
- /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
- __HAL_FLASH_SET_LATENCY(FLatency);
- 8006502: 4b66 ldr r3, [pc, #408] ; (800669c <HAL_RCC_ClockConfig+0x1c0>)
- 8006504: 681b ldr r3, [r3, #0]
- 8006506: f023 020f bic.w r2, r3, #15
- 800650a: 4964 ldr r1, [pc, #400] ; (800669c <HAL_RCC_ClockConfig+0x1c0>)
- 800650c: 683b ldr r3, [r7, #0]
- 800650e: 4313 orrs r3, r2
- 8006510: 600b str r3, [r1, #0]
-
- /* Check that the new number of wait states is taken into account to access the Flash
- memory by reading the FLASH_ACR register */
- if(__HAL_FLASH_GET_LATENCY() != FLatency)
- 8006512: 4b62 ldr r3, [pc, #392] ; (800669c <HAL_RCC_ClockConfig+0x1c0>)
- 8006514: 681b ldr r3, [r3, #0]
- 8006516: f003 030f and.w r3, r3, #15
- 800651a: 683a ldr r2, [r7, #0]
- 800651c: 429a cmp r2, r3
- 800651e: d001 beq.n 8006524 <HAL_RCC_ClockConfig+0x48>
- {
- return HAL_ERROR;
- 8006520: 2301 movs r3, #1
- 8006522: e0b6 b.n 8006692 <HAL_RCC_ClockConfig+0x1b6>
- }
- }
-
- /*-------------------------- HCLK Configuration --------------------------*/
- if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
- 8006524: 687b ldr r3, [r7, #4]
- 8006526: 681b ldr r3, [r3, #0]
- 8006528: f003 0302 and.w r3, r3, #2
- 800652c: 2b00 cmp r3, #0
- 800652e: d020 beq.n 8006572 <HAL_RCC_ClockConfig+0x96>
- {
- /* Set the highest APBx dividers in order to ensure that we do not go through
- a non-spec phase whatever we decrease or increase HCLK. */
- if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
- 8006530: 687b ldr r3, [r7, #4]
- 8006532: 681b ldr r3, [r3, #0]
- 8006534: f003 0304 and.w r3, r3, #4
- 8006538: 2b00 cmp r3, #0
- 800653a: d005 beq.n 8006548 <HAL_RCC_ClockConfig+0x6c>
- {
- MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
- 800653c: 4b58 ldr r3, [pc, #352] ; (80066a0 <HAL_RCC_ClockConfig+0x1c4>)
- 800653e: 689b ldr r3, [r3, #8]
- 8006540: 4a57 ldr r2, [pc, #348] ; (80066a0 <HAL_RCC_ClockConfig+0x1c4>)
- 8006542: f443 53e0 orr.w r3, r3, #7168 ; 0x1c00
- 8006546: 6093 str r3, [r2, #8]
- }
-
- if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
- 8006548: 687b ldr r3, [r7, #4]
- 800654a: 681b ldr r3, [r3, #0]
- 800654c: f003 0308 and.w r3, r3, #8
- 8006550: 2b00 cmp r3, #0
- 8006552: d005 beq.n 8006560 <HAL_RCC_ClockConfig+0x84>
- {
- MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
- 8006554: 4b52 ldr r3, [pc, #328] ; (80066a0 <HAL_RCC_ClockConfig+0x1c4>)
- 8006556: 689b ldr r3, [r3, #8]
- 8006558: 4a51 ldr r2, [pc, #324] ; (80066a0 <HAL_RCC_ClockConfig+0x1c4>)
- 800655a: f443 4360 orr.w r3, r3, #57344 ; 0xe000
- 800655e: 6093 str r3, [r2, #8]
- }
-
- /* Set the new HCLK clock divider */
- assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
- MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
- 8006560: 4b4f ldr r3, [pc, #316] ; (80066a0 <HAL_RCC_ClockConfig+0x1c4>)
- 8006562: 689b ldr r3, [r3, #8]
- 8006564: f023 02f0 bic.w r2, r3, #240 ; 0xf0
- 8006568: 687b ldr r3, [r7, #4]
- 800656a: 689b ldr r3, [r3, #8]
- 800656c: 494c ldr r1, [pc, #304] ; (80066a0 <HAL_RCC_ClockConfig+0x1c4>)
- 800656e: 4313 orrs r3, r2
- 8006570: 608b str r3, [r1, #8]
- }
-
- /*------------------------- SYSCLK Configuration ---------------------------*/
- if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
- 8006572: 687b ldr r3, [r7, #4]
- 8006574: 681b ldr r3, [r3, #0]
- 8006576: f003 0301 and.w r3, r3, #1
- 800657a: 2b00 cmp r3, #0
- 800657c: d040 beq.n 8006600 <HAL_RCC_ClockConfig+0x124>
- {
- assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
-
- /* HSE is selected as System Clock Source */
- if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
- 800657e: 687b ldr r3, [r7, #4]
- 8006580: 685b ldr r3, [r3, #4]
- 8006582: 2b01 cmp r3, #1
- 8006584: d107 bne.n 8006596 <HAL_RCC_ClockConfig+0xba>
- {
- /* Check the HSE ready flag */
- if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
- 8006586: 4b46 ldr r3, [pc, #280] ; (80066a0 <HAL_RCC_ClockConfig+0x1c4>)
- 8006588: 681b ldr r3, [r3, #0]
- 800658a: f403 3300 and.w r3, r3, #131072 ; 0x20000
- 800658e: 2b00 cmp r3, #0
- 8006590: d115 bne.n 80065be <HAL_RCC_ClockConfig+0xe2>
- {
- return HAL_ERROR;
- 8006592: 2301 movs r3, #1
- 8006594: e07d b.n 8006692 <HAL_RCC_ClockConfig+0x1b6>
- }
- }
- /* PLL is selected as System Clock Source */
- else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
- 8006596: 687b ldr r3, [r7, #4]
- 8006598: 685b ldr r3, [r3, #4]
- 800659a: 2b02 cmp r3, #2
- 800659c: d107 bne.n 80065ae <HAL_RCC_ClockConfig+0xd2>
- {
- /* Check the PLL ready flag */
- if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
- 800659e: 4b40 ldr r3, [pc, #256] ; (80066a0 <HAL_RCC_ClockConfig+0x1c4>)
- 80065a0: 681b ldr r3, [r3, #0]
- 80065a2: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
- 80065a6: 2b00 cmp r3, #0
- 80065a8: d109 bne.n 80065be <HAL_RCC_ClockConfig+0xe2>
- {
- return HAL_ERROR;
- 80065aa: 2301 movs r3, #1
- 80065ac: e071 b.n 8006692 <HAL_RCC_ClockConfig+0x1b6>
- }
- /* HSI is selected as System Clock Source */
- else
- {
- /* Check the HSI ready flag */
- if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
- 80065ae: 4b3c ldr r3, [pc, #240] ; (80066a0 <HAL_RCC_ClockConfig+0x1c4>)
- 80065b0: 681b ldr r3, [r3, #0]
- 80065b2: f003 0302 and.w r3, r3, #2
- 80065b6: 2b00 cmp r3, #0
- 80065b8: d101 bne.n 80065be <HAL_RCC_ClockConfig+0xe2>
- {
- return HAL_ERROR;
- 80065ba: 2301 movs r3, #1
- 80065bc: e069 b.n 8006692 <HAL_RCC_ClockConfig+0x1b6>
- }
- }
-
- __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
- 80065be: 4b38 ldr r3, [pc, #224] ; (80066a0 <HAL_RCC_ClockConfig+0x1c4>)
- 80065c0: 689b ldr r3, [r3, #8]
- 80065c2: f023 0203 bic.w r2, r3, #3
- 80065c6: 687b ldr r3, [r7, #4]
- 80065c8: 685b ldr r3, [r3, #4]
- 80065ca: 4935 ldr r1, [pc, #212] ; (80066a0 <HAL_RCC_ClockConfig+0x1c4>)
- 80065cc: 4313 orrs r3, r2
- 80065ce: 608b str r3, [r1, #8]
-
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 80065d0: f7fe fe76 bl 80052c0 <HAL_GetTick>
- 80065d4: 60f8 str r0, [r7, #12]
-
- while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
- 80065d6: e00a b.n 80065ee <HAL_RCC_ClockConfig+0x112>
- {
- if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
- 80065d8: f7fe fe72 bl 80052c0 <HAL_GetTick>
- 80065dc: 4602 mov r2, r0
- 80065de: 68fb ldr r3, [r7, #12]
- 80065e0: 1ad3 subs r3, r2, r3
- 80065e2: f241 3288 movw r2, #5000 ; 0x1388
- 80065e6: 4293 cmp r3, r2
- 80065e8: d901 bls.n 80065ee <HAL_RCC_ClockConfig+0x112>
- {
- return HAL_TIMEOUT;
- 80065ea: 2303 movs r3, #3
- 80065ec: e051 b.n 8006692 <HAL_RCC_ClockConfig+0x1b6>
- while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
- 80065ee: 4b2c ldr r3, [pc, #176] ; (80066a0 <HAL_RCC_ClockConfig+0x1c4>)
- 80065f0: 689b ldr r3, [r3, #8]
- 80065f2: f003 020c and.w r2, r3, #12
- 80065f6: 687b ldr r3, [r7, #4]
- 80065f8: 685b ldr r3, [r3, #4]
- 80065fa: 009b lsls r3, r3, #2
- 80065fc: 429a cmp r2, r3
- 80065fe: d1eb bne.n 80065d8 <HAL_RCC_ClockConfig+0xfc>
- }
- }
- }
-
- /* Decreasing the number of wait states because of lower CPU frequency */
- if(FLatency < __HAL_FLASH_GET_LATENCY())
- 8006600: 4b26 ldr r3, [pc, #152] ; (800669c <HAL_RCC_ClockConfig+0x1c0>)
- 8006602: 681b ldr r3, [r3, #0]
- 8006604: f003 030f and.w r3, r3, #15
- 8006608: 683a ldr r2, [r7, #0]
- 800660a: 429a cmp r2, r3
- 800660c: d210 bcs.n 8006630 <HAL_RCC_ClockConfig+0x154>
- {
- /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
- __HAL_FLASH_SET_LATENCY(FLatency);
- 800660e: 4b23 ldr r3, [pc, #140] ; (800669c <HAL_RCC_ClockConfig+0x1c0>)
- 8006610: 681b ldr r3, [r3, #0]
- 8006612: f023 020f bic.w r2, r3, #15
- 8006616: 4921 ldr r1, [pc, #132] ; (800669c <HAL_RCC_ClockConfig+0x1c0>)
- 8006618: 683b ldr r3, [r7, #0]
- 800661a: 4313 orrs r3, r2
- 800661c: 600b str r3, [r1, #0]
-
- /* Check that the new number of wait states is taken into account to access the Flash
- memory by reading the FLASH_ACR register */
- if(__HAL_FLASH_GET_LATENCY() != FLatency)
- 800661e: 4b1f ldr r3, [pc, #124] ; (800669c <HAL_RCC_ClockConfig+0x1c0>)
- 8006620: 681b ldr r3, [r3, #0]
- 8006622: f003 030f and.w r3, r3, #15
- 8006626: 683a ldr r2, [r7, #0]
- 8006628: 429a cmp r2, r3
- 800662a: d001 beq.n 8006630 <HAL_RCC_ClockConfig+0x154>
- {
- return HAL_ERROR;
- 800662c: 2301 movs r3, #1
- 800662e: e030 b.n 8006692 <HAL_RCC_ClockConfig+0x1b6>
- }
- }
-
- /*-------------------------- PCLK1 Configuration ---------------------------*/
- if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
- 8006630: 687b ldr r3, [r7, #4]
- 8006632: 681b ldr r3, [r3, #0]
- 8006634: f003 0304 and.w r3, r3, #4
- 8006638: 2b00 cmp r3, #0
- 800663a: d008 beq.n 800664e <HAL_RCC_ClockConfig+0x172>
- {
- assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
- MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
- 800663c: 4b18 ldr r3, [pc, #96] ; (80066a0 <HAL_RCC_ClockConfig+0x1c4>)
- 800663e: 689b ldr r3, [r3, #8]
- 8006640: f423 52e0 bic.w r2, r3, #7168 ; 0x1c00
- 8006644: 687b ldr r3, [r7, #4]
- 8006646: 68db ldr r3, [r3, #12]
- 8006648: 4915 ldr r1, [pc, #84] ; (80066a0 <HAL_RCC_ClockConfig+0x1c4>)
- 800664a: 4313 orrs r3, r2
- 800664c: 608b str r3, [r1, #8]
- }
-
- /*-------------------------- PCLK2 Configuration ---------------------------*/
- if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
- 800664e: 687b ldr r3, [r7, #4]
- 8006650: 681b ldr r3, [r3, #0]
- 8006652: f003 0308 and.w r3, r3, #8
- 8006656: 2b00 cmp r3, #0
- 8006658: d009 beq.n 800666e <HAL_RCC_ClockConfig+0x192>
- {
- assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
- MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
- 800665a: 4b11 ldr r3, [pc, #68] ; (80066a0 <HAL_RCC_ClockConfig+0x1c4>)
- 800665c: 689b ldr r3, [r3, #8]
- 800665e: f423 4260 bic.w r2, r3, #57344 ; 0xe000
- 8006662: 687b ldr r3, [r7, #4]
- 8006664: 691b ldr r3, [r3, #16]
- 8006666: 00db lsls r3, r3, #3
- 8006668: 490d ldr r1, [pc, #52] ; (80066a0 <HAL_RCC_ClockConfig+0x1c4>)
- 800666a: 4313 orrs r3, r2
- 800666c: 608b str r3, [r1, #8]
- }
-
- /* Update the SystemCoreClock global variable */
- SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos];
- 800666e: f000 f81d bl 80066ac <HAL_RCC_GetSysClockFreq>
- 8006672: 4601 mov r1, r0
- 8006674: 4b0a ldr r3, [pc, #40] ; (80066a0 <HAL_RCC_ClockConfig+0x1c4>)
- 8006676: 689b ldr r3, [r3, #8]
- 8006678: 091b lsrs r3, r3, #4
- 800667a: f003 030f and.w r3, r3, #15
- 800667e: 4a09 ldr r2, [pc, #36] ; (80066a4 <HAL_RCC_ClockConfig+0x1c8>)
- 8006680: 5cd3 ldrb r3, [r2, r3]
- 8006682: fa21 f303 lsr.w r3, r1, r3
- 8006686: 4a08 ldr r2, [pc, #32] ; (80066a8 <HAL_RCC_ClockConfig+0x1cc>)
- 8006688: 6013 str r3, [r2, #0]
-
- /* Configure the source of time base considering new system clocks settings*/
- HAL_InitTick (TICK_INT_PRIORITY);
- 800668a: 2000 movs r0, #0
- 800668c: f7fe fdd4 bl 8005238 <HAL_InitTick>
-
- return HAL_OK;
- 8006690: 2300 movs r3, #0
-}
- 8006692: 4618 mov r0, r3
- 8006694: 3710 adds r7, #16
- 8006696: 46bd mov sp, r7
- 8006698: bd80 pop {r7, pc}
- 800669a: bf00 nop
- 800669c: 40023c00 .word 0x40023c00
- 80066a0: 40023800 .word 0x40023800
- 80066a4: 0800b15c .word 0x0800b15c
- 80066a8: 20000010 .word 0x20000010
-
-080066ac <HAL_RCC_GetSysClockFreq>:
- *
- *
- * @retval SYSCLK frequency
- */
-uint32_t HAL_RCC_GetSysClockFreq(void)
-{
- 80066ac: b5f0 push {r4, r5, r6, r7, lr}
- 80066ae: b085 sub sp, #20
- 80066b0: af00 add r7, sp, #0
- uint32_t pllm = 0, pllvco = 0, pllp = 0;
- 80066b2: 2300 movs r3, #0
- 80066b4: 607b str r3, [r7, #4]
- 80066b6: 2300 movs r3, #0
- 80066b8: 60fb str r3, [r7, #12]
- 80066ba: 2300 movs r3, #0
- 80066bc: 603b str r3, [r7, #0]
- uint32_t sysclockfreq = 0;
- 80066be: 2300 movs r3, #0
- 80066c0: 60bb str r3, [r7, #8]
-
- /* Get SYSCLK source -------------------------------------------------------*/
- switch (RCC->CFGR & RCC_CFGR_SWS)
- 80066c2: 4b50 ldr r3, [pc, #320] ; (8006804 <HAL_RCC_GetSysClockFreq+0x158>)
- 80066c4: 689b ldr r3, [r3, #8]
- 80066c6: f003 030c and.w r3, r3, #12
- 80066ca: 2b04 cmp r3, #4
- 80066cc: d007 beq.n 80066de <HAL_RCC_GetSysClockFreq+0x32>
- 80066ce: 2b08 cmp r3, #8
- 80066d0: d008 beq.n 80066e4 <HAL_RCC_GetSysClockFreq+0x38>
- 80066d2: 2b00 cmp r3, #0
- 80066d4: f040 808d bne.w 80067f2 <HAL_RCC_GetSysClockFreq+0x146>
- {
- case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */
- {
- sysclockfreq = HSI_VALUE;
- 80066d8: 4b4b ldr r3, [pc, #300] ; (8006808 <HAL_RCC_GetSysClockFreq+0x15c>)
- 80066da: 60bb str r3, [r7, #8]
- break;
- 80066dc: e08c b.n 80067f8 <HAL_RCC_GetSysClockFreq+0x14c>
- }
- case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock source */
- {
- sysclockfreq = HSE_VALUE;
- 80066de: 4b4b ldr r3, [pc, #300] ; (800680c <HAL_RCC_GetSysClockFreq+0x160>)
- 80066e0: 60bb str r3, [r7, #8]
- break;
- 80066e2: e089 b.n 80067f8 <HAL_RCC_GetSysClockFreq+0x14c>
- }
- case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock source */
- {
- /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
- SYSCLK = PLL_VCO / PLLP */
- pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
- 80066e4: 4b47 ldr r3, [pc, #284] ; (8006804 <HAL_RCC_GetSysClockFreq+0x158>)
- 80066e6: 685b ldr r3, [r3, #4]
- 80066e8: f003 033f and.w r3, r3, #63 ; 0x3f
- 80066ec: 607b str r3, [r7, #4]
- if (__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLCFGR_PLLSRC_HSI)
- 80066ee: 4b45 ldr r3, [pc, #276] ; (8006804 <HAL_RCC_GetSysClockFreq+0x158>)
- 80066f0: 685b ldr r3, [r3, #4]
- 80066f2: f403 0380 and.w r3, r3, #4194304 ; 0x400000
- 80066f6: 2b00 cmp r3, #0
- 80066f8: d023 beq.n 8006742 <HAL_RCC_GetSysClockFreq+0x96>
- {
- /* HSE used as PLL clock source */
- pllvco = (uint32_t) ((((uint64_t) HSE_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm);
- 80066fa: 4b42 ldr r3, [pc, #264] ; (8006804 <HAL_RCC_GetSysClockFreq+0x158>)
- 80066fc: 685b ldr r3, [r3, #4]
- 80066fe: 099b lsrs r3, r3, #6
- 8006700: f04f 0400 mov.w r4, #0
- 8006704: f240 11ff movw r1, #511 ; 0x1ff
- 8006708: f04f 0200 mov.w r2, #0
- 800670c: ea03 0501 and.w r5, r3, r1
- 8006710: ea04 0602 and.w r6, r4, r2
- 8006714: 4a3d ldr r2, [pc, #244] ; (800680c <HAL_RCC_GetSysClockFreq+0x160>)
- 8006716: fb02 f106 mul.w r1, r2, r6
- 800671a: 2200 movs r2, #0
- 800671c: fb02 f205 mul.w r2, r2, r5
- 8006720: 440a add r2, r1
- 8006722: 493a ldr r1, [pc, #232] ; (800680c <HAL_RCC_GetSysClockFreq+0x160>)
- 8006724: fba5 0101 umull r0, r1, r5, r1
- 8006728: 1853 adds r3, r2, r1
- 800672a: 4619 mov r1, r3
- 800672c: 687b ldr r3, [r7, #4]
- 800672e: f04f 0400 mov.w r4, #0
- 8006732: 461a mov r2, r3
- 8006734: 4623 mov r3, r4
- 8006736: f7f9 fd87 bl 8000248 <__aeabi_uldivmod>
- 800673a: 4603 mov r3, r0
- 800673c: 460c mov r4, r1
- 800673e: 60fb str r3, [r7, #12]
- 8006740: e049 b.n 80067d6 <HAL_RCC_GetSysClockFreq+0x12a>
- }
- else
- {
- /* HSI used as PLL clock source */
- pllvco = (uint32_t) ((((uint64_t) HSI_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm);
- 8006742: 4b30 ldr r3, [pc, #192] ; (8006804 <HAL_RCC_GetSysClockFreq+0x158>)
- 8006744: 685b ldr r3, [r3, #4]
- 8006746: 099b lsrs r3, r3, #6
- 8006748: f04f 0400 mov.w r4, #0
- 800674c: f240 11ff movw r1, #511 ; 0x1ff
- 8006750: f04f 0200 mov.w r2, #0
- 8006754: ea03 0501 and.w r5, r3, r1
- 8006758: ea04 0602 and.w r6, r4, r2
- 800675c: 4629 mov r1, r5
- 800675e: 4632 mov r2, r6
- 8006760: f04f 0300 mov.w r3, #0
- 8006764: f04f 0400 mov.w r4, #0
- 8006768: 0154 lsls r4, r2, #5
- 800676a: ea44 64d1 orr.w r4, r4, r1, lsr #27
- 800676e: 014b lsls r3, r1, #5
- 8006770: 4619 mov r1, r3
- 8006772: 4622 mov r2, r4
- 8006774: 1b49 subs r1, r1, r5
- 8006776: eb62 0206 sbc.w r2, r2, r6
- 800677a: f04f 0300 mov.w r3, #0
- 800677e: f04f 0400 mov.w r4, #0
- 8006782: 0194 lsls r4, r2, #6
- 8006784: ea44 6491 orr.w r4, r4, r1, lsr #26
- 8006788: 018b lsls r3, r1, #6
- 800678a: 1a5b subs r3, r3, r1
- 800678c: eb64 0402 sbc.w r4, r4, r2
- 8006790: f04f 0100 mov.w r1, #0
- 8006794: f04f 0200 mov.w r2, #0
- 8006798: 00e2 lsls r2, r4, #3
- 800679a: ea42 7253 orr.w r2, r2, r3, lsr #29
- 800679e: 00d9 lsls r1, r3, #3
- 80067a0: 460b mov r3, r1
- 80067a2: 4614 mov r4, r2
- 80067a4: 195b adds r3, r3, r5
- 80067a6: eb44 0406 adc.w r4, r4, r6
- 80067aa: f04f 0100 mov.w r1, #0
- 80067ae: f04f 0200 mov.w r2, #0
- 80067b2: 02a2 lsls r2, r4, #10
- 80067b4: ea42 5293 orr.w r2, r2, r3, lsr #22
- 80067b8: 0299 lsls r1, r3, #10
- 80067ba: 460b mov r3, r1
- 80067bc: 4614 mov r4, r2
- 80067be: 4618 mov r0, r3
- 80067c0: 4621 mov r1, r4
- 80067c2: 687b ldr r3, [r7, #4]
- 80067c4: f04f 0400 mov.w r4, #0
- 80067c8: 461a mov r2, r3
- 80067ca: 4623 mov r3, r4
- 80067cc: f7f9 fd3c bl 8000248 <__aeabi_uldivmod>
- 80067d0: 4603 mov r3, r0
- 80067d2: 460c mov r4, r1
- 80067d4: 60fb str r3, [r7, #12]
- }
- pllp = ((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >> RCC_PLLCFGR_PLLP_Pos) + 1 ) *2);
- 80067d6: 4b0b ldr r3, [pc, #44] ; (8006804 <HAL_RCC_GetSysClockFreq+0x158>)
- 80067d8: 685b ldr r3, [r3, #4]
- 80067da: 0c1b lsrs r3, r3, #16
- 80067dc: f003 0303 and.w r3, r3, #3
- 80067e0: 3301 adds r3, #1
- 80067e2: 005b lsls r3, r3, #1
- 80067e4: 603b str r3, [r7, #0]
-
- sysclockfreq = pllvco/pllp;
- 80067e6: 68fa ldr r2, [r7, #12]
- 80067e8: 683b ldr r3, [r7, #0]
- 80067ea: fbb2 f3f3 udiv r3, r2, r3
- 80067ee: 60bb str r3, [r7, #8]
- break;
- 80067f0: e002 b.n 80067f8 <HAL_RCC_GetSysClockFreq+0x14c>
- }
- default:
- {
- sysclockfreq = HSI_VALUE;
- 80067f2: 4b05 ldr r3, [pc, #20] ; (8006808 <HAL_RCC_GetSysClockFreq+0x15c>)
- 80067f4: 60bb str r3, [r7, #8]
- break;
- 80067f6: bf00 nop
- }
- }
- return sysclockfreq;
- 80067f8: 68bb ldr r3, [r7, #8]
-}
- 80067fa: 4618 mov r0, r3
- 80067fc: 3714 adds r7, #20
- 80067fe: 46bd mov sp, r7
- 8006800: bdf0 pop {r4, r5, r6, r7, pc}
- 8006802: bf00 nop
- 8006804: 40023800 .word 0x40023800
- 8006808: 00f42400 .word 0x00f42400
- 800680c: 017d7840 .word 0x017d7840
-
-08006810 <HAL_RCC_GetHCLKFreq>:
- * right HCLK value. Otherwise, any configuration based on this function will be incorrect.
- * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency.
- * @retval HCLK frequency
- */
-uint32_t HAL_RCC_GetHCLKFreq(void)
-{
- 8006810: b480 push {r7}
- 8006812: af00 add r7, sp, #0
- return SystemCoreClock;
- 8006814: 4b03 ldr r3, [pc, #12] ; (8006824 <HAL_RCC_GetHCLKFreq+0x14>)
- 8006816: 681b ldr r3, [r3, #0]
-}
- 8006818: 4618 mov r0, r3
- 800681a: 46bd mov sp, r7
- 800681c: f85d 7b04 ldr.w r7, [sp], #4
- 8006820: 4770 bx lr
- 8006822: bf00 nop
- 8006824: 20000010 .word 0x20000010
-
-08006828 <HAL_RCC_GetPCLK1Freq>:
- * @note Each time PCLK1 changes, this function must be called to update the
- * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
- * @retval PCLK1 frequency
- */
-uint32_t HAL_RCC_GetPCLK1Freq(void)
-{
- 8006828: b580 push {r7, lr}
- 800682a: af00 add r7, sp, #0
- /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
- return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1)>> RCC_CFGR_PPRE1_Pos]);
- 800682c: f7ff fff0 bl 8006810 <HAL_RCC_GetHCLKFreq>
- 8006830: 4601 mov r1, r0
- 8006832: 4b05 ldr r3, [pc, #20] ; (8006848 <HAL_RCC_GetPCLK1Freq+0x20>)
- 8006834: 689b ldr r3, [r3, #8]
- 8006836: 0a9b lsrs r3, r3, #10
- 8006838: f003 0307 and.w r3, r3, #7
- 800683c: 4a03 ldr r2, [pc, #12] ; (800684c <HAL_RCC_GetPCLK1Freq+0x24>)
- 800683e: 5cd3 ldrb r3, [r2, r3]
- 8006840: fa21 f303 lsr.w r3, r1, r3
-}
- 8006844: 4618 mov r0, r3
- 8006846: bd80 pop {r7, pc}
- 8006848: 40023800 .word 0x40023800
- 800684c: 0800b16c .word 0x0800b16c
-
-08006850 <HAL_RCC_GetPCLK2Freq>:
- * @note Each time PCLK2 changes, this function must be called to update the
- * right PCLK2 value. Otherwise, any configuration based on this function will be incorrect.
- * @retval PCLK2 frequency
- */
-uint32_t HAL_RCC_GetPCLK2Freq(void)
-{
- 8006850: b580 push {r7, lr}
- 8006852: af00 add r7, sp, #0
- /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/
- return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2)>> RCC_CFGR_PPRE2_Pos]);
- 8006854: f7ff ffdc bl 8006810 <HAL_RCC_GetHCLKFreq>
- 8006858: 4601 mov r1, r0
- 800685a: 4b05 ldr r3, [pc, #20] ; (8006870 <HAL_RCC_GetPCLK2Freq+0x20>)
- 800685c: 689b ldr r3, [r3, #8]
- 800685e: 0b5b lsrs r3, r3, #13
- 8006860: f003 0307 and.w r3, r3, #7
- 8006864: 4a03 ldr r2, [pc, #12] ; (8006874 <HAL_RCC_GetPCLK2Freq+0x24>)
- 8006866: 5cd3 ldrb r3, [r2, r3]
- 8006868: fa21 f303 lsr.w r3, r1, r3
-}
- 800686c: 4618 mov r0, r3
- 800686e: bd80 pop {r7, pc}
- 8006870: 40023800 .word 0x40023800
- 8006874: 0800b16c .word 0x0800b16c
-
-08006878 <HAL_RCCEx_PeriphCLKConfig>:
- * the backup registers) are set to their reset values.
- *
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
-{
- 8006878: b580 push {r7, lr}
- 800687a: b088 sub sp, #32
- 800687c: af00 add r7, sp, #0
- 800687e: 6078 str r0, [r7, #4]
- uint32_t tickstart = 0;
- 8006880: 2300 movs r3, #0
- 8006882: 617b str r3, [r7, #20]
- uint32_t tmpreg0 = 0;
- 8006884: 2300 movs r3, #0
- 8006886: 613b str r3, [r7, #16]
- uint32_t tmpreg1 = 0;
- 8006888: 2300 movs r3, #0
- 800688a: 60fb str r3, [r7, #12]
- uint32_t plli2sused = 0;
- 800688c: 2300 movs r3, #0
- 800688e: 61fb str r3, [r7, #28]
- uint32_t pllsaiused = 0;
- 8006890: 2300 movs r3, #0
- 8006892: 61bb str r3, [r7, #24]
-
- /* Check the parameters */
- assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
-
- /*----------------------------------- I2S configuration ----------------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S) == (RCC_PERIPHCLK_I2S))
- 8006894: 687b ldr r3, [r7, #4]
- 8006896: 681b ldr r3, [r3, #0]
- 8006898: f003 0301 and.w r3, r3, #1
- 800689c: 2b00 cmp r3, #0
- 800689e: d012 beq.n 80068c6 <HAL_RCCEx_PeriphCLKConfig+0x4e>
- {
- /* Check the parameters */
- assert_param(IS_RCC_I2SCLKSOURCE(PeriphClkInit->I2sClockSelection));
-
- /* Configure I2S Clock source */
- __HAL_RCC_I2S_CONFIG(PeriphClkInit->I2sClockSelection);
- 80068a0: 4b69 ldr r3, [pc, #420] ; (8006a48 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 80068a2: 689b ldr r3, [r3, #8]
- 80068a4: 4a68 ldr r2, [pc, #416] ; (8006a48 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 80068a6: f423 0300 bic.w r3, r3, #8388608 ; 0x800000
- 80068aa: 6093 str r3, [r2, #8]
- 80068ac: 4b66 ldr r3, [pc, #408] ; (8006a48 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 80068ae: 689a ldr r2, [r3, #8]
- 80068b0: 687b ldr r3, [r7, #4]
- 80068b2: 6b5b ldr r3, [r3, #52] ; 0x34
- 80068b4: 4964 ldr r1, [pc, #400] ; (8006a48 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 80068b6: 4313 orrs r3, r2
- 80068b8: 608b str r3, [r1, #8]
-
- /* Enable the PLLI2S when it's used as clock source for I2S */
- if(PeriphClkInit->I2sClockSelection == RCC_I2SCLKSOURCE_PLLI2S)
- 80068ba: 687b ldr r3, [r7, #4]
- 80068bc: 6b5b ldr r3, [r3, #52] ; 0x34
- 80068be: 2b00 cmp r3, #0
- 80068c0: d101 bne.n 80068c6 <HAL_RCCEx_PeriphCLKConfig+0x4e>
- {
- plli2sused = 1;
- 80068c2: 2301 movs r3, #1
- 80068c4: 61fb str r3, [r7, #28]
- }
- }
-
- /*------------------------------------ SAI1 configuration --------------------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == (RCC_PERIPHCLK_SAI1))
- 80068c6: 687b ldr r3, [r7, #4]
- 80068c8: 681b ldr r3, [r3, #0]
- 80068ca: f403 2300 and.w r3, r3, #524288 ; 0x80000
- 80068ce: 2b00 cmp r3, #0
- 80068d0: d017 beq.n 8006902 <HAL_RCCEx_PeriphCLKConfig+0x8a>
- {
- /* Check the parameters */
- assert_param(IS_RCC_SAI1CLKSOURCE(PeriphClkInit->Sai1ClockSelection));
-
- /* Configure SAI1 Clock source */
- __HAL_RCC_SAI1_CONFIG(PeriphClkInit->Sai1ClockSelection);
- 80068d2: 4b5d ldr r3, [pc, #372] ; (8006a48 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 80068d4: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c
- 80068d8: f423 1240 bic.w r2, r3, #3145728 ; 0x300000
- 80068dc: 687b ldr r3, [r7, #4]
- 80068de: 6bdb ldr r3, [r3, #60] ; 0x3c
- 80068e0: 4959 ldr r1, [pc, #356] ; (8006a48 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 80068e2: 4313 orrs r3, r2
- 80068e4: f8c1 308c str.w r3, [r1, #140] ; 0x8c
- /* Enable the PLLI2S when it's used as clock source for SAI */
- if(PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLI2S)
- 80068e8: 687b ldr r3, [r7, #4]
- 80068ea: 6bdb ldr r3, [r3, #60] ; 0x3c
- 80068ec: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000
- 80068f0: d101 bne.n 80068f6 <HAL_RCCEx_PeriphCLKConfig+0x7e>
- {
- plli2sused = 1;
- 80068f2: 2301 movs r3, #1
- 80068f4: 61fb str r3, [r7, #28]
- }
- /* Enable the PLLSAI when it's used as clock source for SAI */
- if(PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLSAI)
- 80068f6: 687b ldr r3, [r7, #4]
- 80068f8: 6bdb ldr r3, [r3, #60] ; 0x3c
- 80068fa: 2b00 cmp r3, #0
- 80068fc: d101 bne.n 8006902 <HAL_RCCEx_PeriphCLKConfig+0x8a>
- {
- pllsaiused = 1;
- 80068fe: 2301 movs r3, #1
- 8006900: 61bb str r3, [r7, #24]
- }
- }
-
- /*------------------------------------ SAI2 configuration --------------------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == (RCC_PERIPHCLK_SAI2))
- 8006902: 687b ldr r3, [r7, #4]
- 8006904: 681b ldr r3, [r3, #0]
- 8006906: f403 1380 and.w r3, r3, #1048576 ; 0x100000
- 800690a: 2b00 cmp r3, #0
- 800690c: d017 beq.n 800693e <HAL_RCCEx_PeriphCLKConfig+0xc6>
- {
- /* Check the parameters */
- assert_param(IS_RCC_SAI2CLKSOURCE(PeriphClkInit->Sai2ClockSelection));
-
- /* Configure SAI2 Clock source */
- __HAL_RCC_SAI2_CONFIG(PeriphClkInit->Sai2ClockSelection);
- 800690e: 4b4e ldr r3, [pc, #312] ; (8006a48 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 8006910: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c
- 8006914: f423 0240 bic.w r2, r3, #12582912 ; 0xc00000
- 8006918: 687b ldr r3, [r7, #4]
- 800691a: 6c1b ldr r3, [r3, #64] ; 0x40
- 800691c: 494a ldr r1, [pc, #296] ; (8006a48 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 800691e: 4313 orrs r3, r2
- 8006920: f8c1 308c str.w r3, [r1, #140] ; 0x8c
-
- /* Enable the PLLI2S when it's used as clock source for SAI */
- if(PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLI2S)
- 8006924: 687b ldr r3, [r7, #4]
- 8006926: 6c1b ldr r3, [r3, #64] ; 0x40
- 8006928: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000
- 800692c: d101 bne.n 8006932 <HAL_RCCEx_PeriphCLKConfig+0xba>
- {
- plli2sused = 1;
- 800692e: 2301 movs r3, #1
- 8006930: 61fb str r3, [r7, #28]
- }
- /* Enable the PLLSAI when it's used as clock source for SAI */
- if(PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLSAI)
- 8006932: 687b ldr r3, [r7, #4]
- 8006934: 6c1b ldr r3, [r3, #64] ; 0x40
- 8006936: 2b00 cmp r3, #0
- 8006938: d101 bne.n 800693e <HAL_RCCEx_PeriphCLKConfig+0xc6>
- {
- pllsaiused = 1;
- 800693a: 2301 movs r3, #1
- 800693c: 61bb str r3, [r7, #24]
- }
- }
-
- /*-------------------------------------- SPDIF-RX Configuration -----------------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPDIFRX) == RCC_PERIPHCLK_SPDIFRX)
- 800693e: 687b ldr r3, [r7, #4]
- 8006940: 681b ldr r3, [r3, #0]
- 8006942: f003 7380 and.w r3, r3, #16777216 ; 0x1000000
- 8006946: 2b00 cmp r3, #0
- 8006948: d001 beq.n 800694e <HAL_RCCEx_PeriphCLKConfig+0xd6>
- {
- plli2sused = 1;
- 800694a: 2301 movs r3, #1
- 800694c: 61fb str r3, [r7, #28]
- }
-
- /*------------------------------------ RTC configuration --------------------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == (RCC_PERIPHCLK_RTC))
- 800694e: 687b ldr r3, [r7, #4]
- 8006950: 681b ldr r3, [r3, #0]
- 8006952: f003 0320 and.w r3, r3, #32
- 8006956: 2b00 cmp r3, #0
- 8006958: f000 808b beq.w 8006a72 <HAL_RCCEx_PeriphCLKConfig+0x1fa>
- {
- /* Check for RTC Parameters used to output RTCCLK */
- assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection));
-
- /* Enable Power Clock*/
- __HAL_RCC_PWR_CLK_ENABLE();
- 800695c: 4b3a ldr r3, [pc, #232] ; (8006a48 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 800695e: 6c1b ldr r3, [r3, #64] ; 0x40
- 8006960: 4a39 ldr r2, [pc, #228] ; (8006a48 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 8006962: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
- 8006966: 6413 str r3, [r2, #64] ; 0x40
- 8006968: 4b37 ldr r3, [pc, #220] ; (8006a48 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 800696a: 6c1b ldr r3, [r3, #64] ; 0x40
- 800696c: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
- 8006970: 60bb str r3, [r7, #8]
- 8006972: 68bb ldr r3, [r7, #8]
-
- /* Enable write access to Backup domain */
- PWR->CR1 |= PWR_CR1_DBP;
- 8006974: 4b35 ldr r3, [pc, #212] ; (8006a4c <HAL_RCCEx_PeriphCLKConfig+0x1d4>)
- 8006976: 681b ldr r3, [r3, #0]
- 8006978: 4a34 ldr r2, [pc, #208] ; (8006a4c <HAL_RCCEx_PeriphCLKConfig+0x1d4>)
- 800697a: f443 7380 orr.w r3, r3, #256 ; 0x100
- 800697e: 6013 str r3, [r2, #0]
-
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 8006980: f7fe fc9e bl 80052c0 <HAL_GetTick>
- 8006984: 6178 str r0, [r7, #20]
-
- /* Wait for Backup domain Write protection disable */
- while((PWR->CR1 & PWR_CR1_DBP) == RESET)
- 8006986: e008 b.n 800699a <HAL_RCCEx_PeriphCLKConfig+0x122>
- {
- if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
- 8006988: f7fe fc9a bl 80052c0 <HAL_GetTick>
- 800698c: 4602 mov r2, r0
- 800698e: 697b ldr r3, [r7, #20]
- 8006990: 1ad3 subs r3, r2, r3
- 8006992: 2b64 cmp r3, #100 ; 0x64
- 8006994: d901 bls.n 800699a <HAL_RCCEx_PeriphCLKConfig+0x122>
- {
- return HAL_TIMEOUT;
- 8006996: 2303 movs r3, #3
- 8006998: e38d b.n 80070b6 <HAL_RCCEx_PeriphCLKConfig+0x83e>
- while((PWR->CR1 & PWR_CR1_DBP) == RESET)
- 800699a: 4b2c ldr r3, [pc, #176] ; (8006a4c <HAL_RCCEx_PeriphCLKConfig+0x1d4>)
- 800699c: 681b ldr r3, [r3, #0]
- 800699e: f403 7380 and.w r3, r3, #256 ; 0x100
- 80069a2: 2b00 cmp r3, #0
- 80069a4: d0f0 beq.n 8006988 <HAL_RCCEx_PeriphCLKConfig+0x110>
- }
- }
-
- /* Reset the Backup domain only if the RTC Clock source selection is modified */
- tmpreg0 = (RCC->BDCR & RCC_BDCR_RTCSEL);
- 80069a6: 4b28 ldr r3, [pc, #160] ; (8006a48 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 80069a8: 6f1b ldr r3, [r3, #112] ; 0x70
- 80069aa: f403 7340 and.w r3, r3, #768 ; 0x300
- 80069ae: 613b str r3, [r7, #16]
-
- if((tmpreg0 != 0x00000000U) && (tmpreg0 != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)))
- 80069b0: 693b ldr r3, [r7, #16]
- 80069b2: 2b00 cmp r3, #0
- 80069b4: d035 beq.n 8006a22 <HAL_RCCEx_PeriphCLKConfig+0x1aa>
- 80069b6: 687b ldr r3, [r7, #4]
- 80069b8: 6b1b ldr r3, [r3, #48] ; 0x30
- 80069ba: f403 7340 and.w r3, r3, #768 ; 0x300
- 80069be: 693a ldr r2, [r7, #16]
- 80069c0: 429a cmp r2, r3
- 80069c2: d02e beq.n 8006a22 <HAL_RCCEx_PeriphCLKConfig+0x1aa>
- {
- /* Store the content of BDCR register before the reset of Backup Domain */
- tmpreg0 = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
- 80069c4: 4b20 ldr r3, [pc, #128] ; (8006a48 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 80069c6: 6f1b ldr r3, [r3, #112] ; 0x70
- 80069c8: f423 7340 bic.w r3, r3, #768 ; 0x300
- 80069cc: 613b str r3, [r7, #16]
-
- /* RTC Clock selection can be changed only if the Backup Domain is reset */
- __HAL_RCC_BACKUPRESET_FORCE();
- 80069ce: 4b1e ldr r3, [pc, #120] ; (8006a48 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 80069d0: 6f1b ldr r3, [r3, #112] ; 0x70
- 80069d2: 4a1d ldr r2, [pc, #116] ; (8006a48 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 80069d4: f443 3380 orr.w r3, r3, #65536 ; 0x10000
- 80069d8: 6713 str r3, [r2, #112] ; 0x70
- __HAL_RCC_BACKUPRESET_RELEASE();
- 80069da: 4b1b ldr r3, [pc, #108] ; (8006a48 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 80069dc: 6f1b ldr r3, [r3, #112] ; 0x70
- 80069de: 4a1a ldr r2, [pc, #104] ; (8006a48 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 80069e0: f423 3380 bic.w r3, r3, #65536 ; 0x10000
- 80069e4: 6713 str r3, [r2, #112] ; 0x70
-
- /* Restore the Content of BDCR register */
- RCC->BDCR = tmpreg0;
- 80069e6: 4a18 ldr r2, [pc, #96] ; (8006a48 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 80069e8: 693b ldr r3, [r7, #16]
- 80069ea: 6713 str r3, [r2, #112] ; 0x70
-
- /* Wait for LSE reactivation if LSE was enable prior to Backup Domain reset */
- if (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSEON))
- 80069ec: 4b16 ldr r3, [pc, #88] ; (8006a48 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 80069ee: 6f1b ldr r3, [r3, #112] ; 0x70
- 80069f0: f003 0301 and.w r3, r3, #1
- 80069f4: 2b01 cmp r3, #1
- 80069f6: d114 bne.n 8006a22 <HAL_RCCEx_PeriphCLKConfig+0x1aa>
- {
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 80069f8: f7fe fc62 bl 80052c0 <HAL_GetTick>
- 80069fc: 6178 str r0, [r7, #20]
-
- /* Wait till LSE is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
- 80069fe: e00a b.n 8006a16 <HAL_RCCEx_PeriphCLKConfig+0x19e>
- {
- if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
- 8006a00: f7fe fc5e bl 80052c0 <HAL_GetTick>
- 8006a04: 4602 mov r2, r0
- 8006a06: 697b ldr r3, [r7, #20]
- 8006a08: 1ad3 subs r3, r2, r3
- 8006a0a: f241 3288 movw r2, #5000 ; 0x1388
- 8006a0e: 4293 cmp r3, r2
- 8006a10: d901 bls.n 8006a16 <HAL_RCCEx_PeriphCLKConfig+0x19e>
- {
- return HAL_TIMEOUT;
- 8006a12: 2303 movs r3, #3
- 8006a14: e34f b.n 80070b6 <HAL_RCCEx_PeriphCLKConfig+0x83e>
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
- 8006a16: 4b0c ldr r3, [pc, #48] ; (8006a48 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 8006a18: 6f1b ldr r3, [r3, #112] ; 0x70
- 8006a1a: f003 0302 and.w r3, r3, #2
- 8006a1e: 2b00 cmp r3, #0
- 8006a20: d0ee beq.n 8006a00 <HAL_RCCEx_PeriphCLKConfig+0x188>
- }
- }
- }
- }
- __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
- 8006a22: 687b ldr r3, [r7, #4]
- 8006a24: 6b1b ldr r3, [r3, #48] ; 0x30
- 8006a26: f403 7340 and.w r3, r3, #768 ; 0x300
- 8006a2a: f5b3 7f40 cmp.w r3, #768 ; 0x300
- 8006a2e: d111 bne.n 8006a54 <HAL_RCCEx_PeriphCLKConfig+0x1dc>
- 8006a30: 4b05 ldr r3, [pc, #20] ; (8006a48 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 8006a32: 689b ldr r3, [r3, #8]
- 8006a34: f423 12f8 bic.w r2, r3, #2031616 ; 0x1f0000
- 8006a38: 687b ldr r3, [r7, #4]
- 8006a3a: 6b19 ldr r1, [r3, #48] ; 0x30
- 8006a3c: 4b04 ldr r3, [pc, #16] ; (8006a50 <HAL_RCCEx_PeriphCLKConfig+0x1d8>)
- 8006a3e: 400b ands r3, r1
- 8006a40: 4901 ldr r1, [pc, #4] ; (8006a48 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 8006a42: 4313 orrs r3, r2
- 8006a44: 608b str r3, [r1, #8]
- 8006a46: e00b b.n 8006a60 <HAL_RCCEx_PeriphCLKConfig+0x1e8>
- 8006a48: 40023800 .word 0x40023800
- 8006a4c: 40007000 .word 0x40007000
- 8006a50: 0ffffcff .word 0x0ffffcff
- 8006a54: 4bb3 ldr r3, [pc, #716] ; (8006d24 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8006a56: 689b ldr r3, [r3, #8]
- 8006a58: 4ab2 ldr r2, [pc, #712] ; (8006d24 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8006a5a: f423 13f8 bic.w r3, r3, #2031616 ; 0x1f0000
- 8006a5e: 6093 str r3, [r2, #8]
- 8006a60: 4bb0 ldr r3, [pc, #704] ; (8006d24 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8006a62: 6f1a ldr r2, [r3, #112] ; 0x70
- 8006a64: 687b ldr r3, [r7, #4]
- 8006a66: 6b1b ldr r3, [r3, #48] ; 0x30
- 8006a68: f3c3 030b ubfx r3, r3, #0, #12
- 8006a6c: 49ad ldr r1, [pc, #692] ; (8006d24 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8006a6e: 4313 orrs r3, r2
- 8006a70: 670b str r3, [r1, #112] ; 0x70
- }
-
- /*------------------------------------ TIM configuration --------------------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM) == (RCC_PERIPHCLK_TIM))
- 8006a72: 687b ldr r3, [r7, #4]
- 8006a74: 681b ldr r3, [r3, #0]
- 8006a76: f003 0310 and.w r3, r3, #16
- 8006a7a: 2b00 cmp r3, #0
- 8006a7c: d010 beq.n 8006aa0 <HAL_RCCEx_PeriphCLKConfig+0x228>
- {
- /* Check the parameters */
- assert_param(IS_RCC_TIMPRES(PeriphClkInit->TIMPresSelection));
-
- /* Configure Timer Prescaler */
- __HAL_RCC_TIMCLKPRESCALER(PeriphClkInit->TIMPresSelection);
- 8006a7e: 4ba9 ldr r3, [pc, #676] ; (8006d24 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8006a80: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c
- 8006a84: 4aa7 ldr r2, [pc, #668] ; (8006d24 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8006a86: f023 7380 bic.w r3, r3, #16777216 ; 0x1000000
- 8006a8a: f8c2 308c str.w r3, [r2, #140] ; 0x8c
- 8006a8e: 4ba5 ldr r3, [pc, #660] ; (8006d24 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8006a90: f8d3 208c ldr.w r2, [r3, #140] ; 0x8c
- 8006a94: 687b ldr r3, [r7, #4]
- 8006a96: 6b9b ldr r3, [r3, #56] ; 0x38
- 8006a98: 49a2 ldr r1, [pc, #648] ; (8006d24 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8006a9a: 4313 orrs r3, r2
- 8006a9c: f8c1 308c str.w r3, [r1, #140] ; 0x8c
- }
-
- /*-------------------------------------- I2C1 Configuration -----------------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1)
- 8006aa0: 687b ldr r3, [r7, #4]
- 8006aa2: 681b ldr r3, [r3, #0]
- 8006aa4: f403 4380 and.w r3, r3, #16384 ; 0x4000
- 8006aa8: 2b00 cmp r3, #0
- 8006aaa: d00a beq.n 8006ac2 <HAL_RCCEx_PeriphCLKConfig+0x24a>
- {
- /* Check the parameters */
- assert_param(IS_RCC_I2C1CLKSOURCE(PeriphClkInit->I2c1ClockSelection));
-
- /* Configure the I2C1 clock source */
- __HAL_RCC_I2C1_CONFIG(PeriphClkInit->I2c1ClockSelection);
- 8006aac: 4b9d ldr r3, [pc, #628] ; (8006d24 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8006aae: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 8006ab2: f423 3240 bic.w r2, r3, #196608 ; 0x30000
- 8006ab6: 687b ldr r3, [r7, #4]
- 8006ab8: 6e5b ldr r3, [r3, #100] ; 0x64
- 8006aba: 499a ldr r1, [pc, #616] ; (8006d24 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8006abc: 4313 orrs r3, r2
- 8006abe: f8c1 3090 str.w r3, [r1, #144] ; 0x90
- }
-
- /*-------------------------------------- I2C2 Configuration -----------------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C2) == RCC_PERIPHCLK_I2C2)
- 8006ac2: 687b ldr r3, [r7, #4]
- 8006ac4: 681b ldr r3, [r3, #0]
- 8006ac6: f403 4300 and.w r3, r3, #32768 ; 0x8000
- 8006aca: 2b00 cmp r3, #0
- 8006acc: d00a beq.n 8006ae4 <HAL_RCCEx_PeriphCLKConfig+0x26c>
- {
- /* Check the parameters */
- assert_param(IS_RCC_I2C2CLKSOURCE(PeriphClkInit->I2c2ClockSelection));
-
- /* Configure the I2C2 clock source */
- __HAL_RCC_I2C2_CONFIG(PeriphClkInit->I2c2ClockSelection);
- 8006ace: 4b95 ldr r3, [pc, #596] ; (8006d24 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8006ad0: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 8006ad4: f423 2240 bic.w r2, r3, #786432 ; 0xc0000
- 8006ad8: 687b ldr r3, [r7, #4]
- 8006ada: 6e9b ldr r3, [r3, #104] ; 0x68
- 8006adc: 4991 ldr r1, [pc, #580] ; (8006d24 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8006ade: 4313 orrs r3, r2
- 8006ae0: f8c1 3090 str.w r3, [r1, #144] ; 0x90
- }
-
- /*-------------------------------------- I2C3 Configuration -----------------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C3) == RCC_PERIPHCLK_I2C3)
- 8006ae4: 687b ldr r3, [r7, #4]
- 8006ae6: 681b ldr r3, [r3, #0]
- 8006ae8: f403 3380 and.w r3, r3, #65536 ; 0x10000
- 8006aec: 2b00 cmp r3, #0
- 8006aee: d00a beq.n 8006b06 <HAL_RCCEx_PeriphCLKConfig+0x28e>
- {
- /* Check the parameters */
- assert_param(IS_RCC_I2C3CLKSOURCE(PeriphClkInit->I2c3ClockSelection));
-
- /* Configure the I2C3 clock source */
- __HAL_RCC_I2C3_CONFIG(PeriphClkInit->I2c3ClockSelection);
- 8006af0: 4b8c ldr r3, [pc, #560] ; (8006d24 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8006af2: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 8006af6: f423 1240 bic.w r2, r3, #3145728 ; 0x300000
- 8006afa: 687b ldr r3, [r7, #4]
- 8006afc: 6edb ldr r3, [r3, #108] ; 0x6c
- 8006afe: 4989 ldr r1, [pc, #548] ; (8006d24 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8006b00: 4313 orrs r3, r2
- 8006b02: f8c1 3090 str.w r3, [r1, #144] ; 0x90
- }
-
- /*-------------------------------------- I2C4 Configuration -----------------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C4) == RCC_PERIPHCLK_I2C4)
- 8006b06: 687b ldr r3, [r7, #4]
- 8006b08: 681b ldr r3, [r3, #0]
- 8006b0a: f403 3300 and.w r3, r3, #131072 ; 0x20000
- 8006b0e: 2b00 cmp r3, #0
- 8006b10: d00a beq.n 8006b28 <HAL_RCCEx_PeriphCLKConfig+0x2b0>
- {
- /* Check the parameters */
- assert_param(IS_RCC_I2C4CLKSOURCE(PeriphClkInit->I2c4ClockSelection));
-
- /* Configure the I2C4 clock source */
- __HAL_RCC_I2C4_CONFIG(PeriphClkInit->I2c4ClockSelection);
- 8006b12: 4b84 ldr r3, [pc, #528] ; (8006d24 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8006b14: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 8006b18: f423 0240 bic.w r2, r3, #12582912 ; 0xc00000
- 8006b1c: 687b ldr r3, [r7, #4]
- 8006b1e: 6f1b ldr r3, [r3, #112] ; 0x70
- 8006b20: 4980 ldr r1, [pc, #512] ; (8006d24 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8006b22: 4313 orrs r3, r2
- 8006b24: f8c1 3090 str.w r3, [r1, #144] ; 0x90
- }
-
- /*-------------------------------------- USART1 Configuration -----------------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1)
- 8006b28: 687b ldr r3, [r7, #4]
- 8006b2a: 681b ldr r3, [r3, #0]
- 8006b2c: f003 0340 and.w r3, r3, #64 ; 0x40
- 8006b30: 2b00 cmp r3, #0
- 8006b32: d00a beq.n 8006b4a <HAL_RCCEx_PeriphCLKConfig+0x2d2>
- {
- /* Check the parameters */
- assert_param(IS_RCC_USART1CLKSOURCE(PeriphClkInit->Usart1ClockSelection));
-
- /* Configure the USART1 clock source */
- __HAL_RCC_USART1_CONFIG(PeriphClkInit->Usart1ClockSelection);
- 8006b34: 4b7b ldr r3, [pc, #492] ; (8006d24 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8006b36: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 8006b3a: f023 0203 bic.w r2, r3, #3
- 8006b3e: 687b ldr r3, [r7, #4]
- 8006b40: 6c5b ldr r3, [r3, #68] ; 0x44
- 8006b42: 4978 ldr r1, [pc, #480] ; (8006d24 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8006b44: 4313 orrs r3, r2
- 8006b46: f8c1 3090 str.w r3, [r1, #144] ; 0x90
- }
-
- /*-------------------------------------- USART2 Configuration -----------------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2)
- 8006b4a: 687b ldr r3, [r7, #4]
- 8006b4c: 681b ldr r3, [r3, #0]
- 8006b4e: f003 0380 and.w r3, r3, #128 ; 0x80
- 8006b52: 2b00 cmp r3, #0
- 8006b54: d00a beq.n 8006b6c <HAL_RCCEx_PeriphCLKConfig+0x2f4>
- {
- /* Check the parameters */
- assert_param(IS_RCC_USART2CLKSOURCE(PeriphClkInit->Usart2ClockSelection));
-
- /* Configure the USART2 clock source */
- __HAL_RCC_USART2_CONFIG(PeriphClkInit->Usart2ClockSelection);
- 8006b56: 4b73 ldr r3, [pc, #460] ; (8006d24 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8006b58: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 8006b5c: f023 020c bic.w r2, r3, #12
- 8006b60: 687b ldr r3, [r7, #4]
- 8006b62: 6c9b ldr r3, [r3, #72] ; 0x48
- 8006b64: 496f ldr r1, [pc, #444] ; (8006d24 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8006b66: 4313 orrs r3, r2
- 8006b68: f8c1 3090 str.w r3, [r1, #144] ; 0x90
- }
-
- /*-------------------------------------- USART3 Configuration -----------------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART3) == RCC_PERIPHCLK_USART3)
- 8006b6c: 687b ldr r3, [r7, #4]
- 8006b6e: 681b ldr r3, [r3, #0]
- 8006b70: f403 7380 and.w r3, r3, #256 ; 0x100
- 8006b74: 2b00 cmp r3, #0
- 8006b76: d00a beq.n 8006b8e <HAL_RCCEx_PeriphCLKConfig+0x316>
- {
- /* Check the parameters */
- assert_param(IS_RCC_USART3CLKSOURCE(PeriphClkInit->Usart3ClockSelection));
-
- /* Configure the USART3 clock source */
- __HAL_RCC_USART3_CONFIG(PeriphClkInit->Usart3ClockSelection);
- 8006b78: 4b6a ldr r3, [pc, #424] ; (8006d24 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8006b7a: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 8006b7e: f023 0230 bic.w r2, r3, #48 ; 0x30
- 8006b82: 687b ldr r3, [r7, #4]
- 8006b84: 6cdb ldr r3, [r3, #76] ; 0x4c
- 8006b86: 4967 ldr r1, [pc, #412] ; (8006d24 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8006b88: 4313 orrs r3, r2
- 8006b8a: f8c1 3090 str.w r3, [r1, #144] ; 0x90
- }
-
- /*-------------------------------------- UART4 Configuration -----------------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART4) == RCC_PERIPHCLK_UART4)
- 8006b8e: 687b ldr r3, [r7, #4]
- 8006b90: 681b ldr r3, [r3, #0]
- 8006b92: f403 7300 and.w r3, r3, #512 ; 0x200
- 8006b96: 2b00 cmp r3, #0
- 8006b98: d00a beq.n 8006bb0 <HAL_RCCEx_PeriphCLKConfig+0x338>
- {
- /* Check the parameters */
- assert_param(IS_RCC_UART4CLKSOURCE(PeriphClkInit->Uart4ClockSelection));
-
- /* Configure the UART4 clock source */
- __HAL_RCC_UART4_CONFIG(PeriphClkInit->Uart4ClockSelection);
- 8006b9a: 4b62 ldr r3, [pc, #392] ; (8006d24 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8006b9c: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 8006ba0: f023 02c0 bic.w r2, r3, #192 ; 0xc0
- 8006ba4: 687b ldr r3, [r7, #4]
- 8006ba6: 6d1b ldr r3, [r3, #80] ; 0x50
- 8006ba8: 495e ldr r1, [pc, #376] ; (8006d24 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8006baa: 4313 orrs r3, r2
- 8006bac: f8c1 3090 str.w r3, [r1, #144] ; 0x90
- }
-
- /*-------------------------------------- UART5 Configuration -----------------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART5) == RCC_PERIPHCLK_UART5)
- 8006bb0: 687b ldr r3, [r7, #4]
- 8006bb2: 681b ldr r3, [r3, #0]
- 8006bb4: f403 6380 and.w r3, r3, #1024 ; 0x400
- 8006bb8: 2b00 cmp r3, #0
- 8006bba: d00a beq.n 8006bd2 <HAL_RCCEx_PeriphCLKConfig+0x35a>
- {
- /* Check the parameters */
- assert_param(IS_RCC_UART5CLKSOURCE(PeriphClkInit->Uart5ClockSelection));
-
- /* Configure the UART5 clock source */
- __HAL_RCC_UART5_CONFIG(PeriphClkInit->Uart5ClockSelection);
- 8006bbc: 4b59 ldr r3, [pc, #356] ; (8006d24 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8006bbe: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 8006bc2: f423 7240 bic.w r2, r3, #768 ; 0x300
- 8006bc6: 687b ldr r3, [r7, #4]
- 8006bc8: 6d5b ldr r3, [r3, #84] ; 0x54
- 8006bca: 4956 ldr r1, [pc, #344] ; (8006d24 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8006bcc: 4313 orrs r3, r2
- 8006bce: f8c1 3090 str.w r3, [r1, #144] ; 0x90
- }
-
- /*-------------------------------------- USART6 Configuration -----------------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART6) == RCC_PERIPHCLK_USART6)
- 8006bd2: 687b ldr r3, [r7, #4]
- 8006bd4: 681b ldr r3, [r3, #0]
- 8006bd6: f403 6300 and.w r3, r3, #2048 ; 0x800
- 8006bda: 2b00 cmp r3, #0
- 8006bdc: d00a beq.n 8006bf4 <HAL_RCCEx_PeriphCLKConfig+0x37c>
- {
- /* Check the parameters */
- assert_param(IS_RCC_USART6CLKSOURCE(PeriphClkInit->Usart6ClockSelection));
-
- /* Configure the USART6 clock source */
- __HAL_RCC_USART6_CONFIG(PeriphClkInit->Usart6ClockSelection);
- 8006bde: 4b51 ldr r3, [pc, #324] ; (8006d24 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8006be0: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 8006be4: f423 6240 bic.w r2, r3, #3072 ; 0xc00
- 8006be8: 687b ldr r3, [r7, #4]
- 8006bea: 6d9b ldr r3, [r3, #88] ; 0x58
- 8006bec: 494d ldr r1, [pc, #308] ; (8006d24 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8006bee: 4313 orrs r3, r2
- 8006bf0: f8c1 3090 str.w r3, [r1, #144] ; 0x90
- }
-
- /*-------------------------------------- UART7 Configuration -----------------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART7) == RCC_PERIPHCLK_UART7)
- 8006bf4: 687b ldr r3, [r7, #4]
- 8006bf6: 681b ldr r3, [r3, #0]
- 8006bf8: f403 5380 and.w r3, r3, #4096 ; 0x1000
- 8006bfc: 2b00 cmp r3, #0
- 8006bfe: d00a beq.n 8006c16 <HAL_RCCEx_PeriphCLKConfig+0x39e>
- {
- /* Check the parameters */
- assert_param(IS_RCC_UART7CLKSOURCE(PeriphClkInit->Uart7ClockSelection));
-
- /* Configure the UART7 clock source */
- __HAL_RCC_UART7_CONFIG(PeriphClkInit->Uart7ClockSelection);
- 8006c00: 4b48 ldr r3, [pc, #288] ; (8006d24 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8006c02: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 8006c06: f423 5240 bic.w r2, r3, #12288 ; 0x3000
- 8006c0a: 687b ldr r3, [r7, #4]
- 8006c0c: 6ddb ldr r3, [r3, #92] ; 0x5c
- 8006c0e: 4945 ldr r1, [pc, #276] ; (8006d24 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8006c10: 4313 orrs r3, r2
- 8006c12: f8c1 3090 str.w r3, [r1, #144] ; 0x90
- }
-
- /*-------------------------------------- UART8 Configuration -----------------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART8) == RCC_PERIPHCLK_UART8)
- 8006c16: 687b ldr r3, [r7, #4]
- 8006c18: 681b ldr r3, [r3, #0]
- 8006c1a: f403 5300 and.w r3, r3, #8192 ; 0x2000
- 8006c1e: 2b00 cmp r3, #0
- 8006c20: d00a beq.n 8006c38 <HAL_RCCEx_PeriphCLKConfig+0x3c0>
- {
- /* Check the parameters */
- assert_param(IS_RCC_UART8CLKSOURCE(PeriphClkInit->Uart8ClockSelection));
-
- /* Configure the UART8 clock source */
- __HAL_RCC_UART8_CONFIG(PeriphClkInit->Uart8ClockSelection);
- 8006c22: 4b40 ldr r3, [pc, #256] ; (8006d24 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8006c24: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 8006c28: f423 4240 bic.w r2, r3, #49152 ; 0xc000
- 8006c2c: 687b ldr r3, [r7, #4]
- 8006c2e: 6e1b ldr r3, [r3, #96] ; 0x60
- 8006c30: 493c ldr r1, [pc, #240] ; (8006d24 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8006c32: 4313 orrs r3, r2
- 8006c34: f8c1 3090 str.w r3, [r1, #144] ; 0x90
- }
-
- /*--------------------------------------- CEC Configuration -----------------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CEC) == RCC_PERIPHCLK_CEC)
- 8006c38: 687b ldr r3, [r7, #4]
- 8006c3a: 681b ldr r3, [r3, #0]
- 8006c3c: f403 0380 and.w r3, r3, #4194304 ; 0x400000
- 8006c40: 2b00 cmp r3, #0
- 8006c42: d00a beq.n 8006c5a <HAL_RCCEx_PeriphCLKConfig+0x3e2>
- {
- /* Check the parameters */
- assert_param(IS_RCC_CECCLKSOURCE(PeriphClkInit->CecClockSelection));
-
- /* Configure the CEC clock source */
- __HAL_RCC_CEC_CONFIG(PeriphClkInit->CecClockSelection);
- 8006c44: 4b37 ldr r3, [pc, #220] ; (8006d24 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8006c46: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 8006c4a: f023 6280 bic.w r2, r3, #67108864 ; 0x4000000
- 8006c4e: 687b ldr r3, [r7, #4]
- 8006c50: 6f9b ldr r3, [r3, #120] ; 0x78
- 8006c52: 4934 ldr r1, [pc, #208] ; (8006d24 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8006c54: 4313 orrs r3, r2
- 8006c56: f8c1 3090 str.w r3, [r1, #144] ; 0x90
- }
-
- /*-------------------------------------- CK48 Configuration -----------------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CLK48) == RCC_PERIPHCLK_CLK48)
- 8006c5a: 687b ldr r3, [r7, #4]
- 8006c5c: 681b ldr r3, [r3, #0]
- 8006c5e: f403 1300 and.w r3, r3, #2097152 ; 0x200000
- 8006c62: 2b00 cmp r3, #0
- 8006c64: d011 beq.n 8006c8a <HAL_RCCEx_PeriphCLKConfig+0x412>
- {
- /* Check the parameters */
- assert_param(IS_RCC_CLK48SOURCE(PeriphClkInit->Clk48ClockSelection));
-
- /* Configure the CLK48 source */
- __HAL_RCC_CLK48_CONFIG(PeriphClkInit->Clk48ClockSelection);
- 8006c66: 4b2f ldr r3, [pc, #188] ; (8006d24 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8006c68: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 8006c6c: f023 6200 bic.w r2, r3, #134217728 ; 0x8000000
- 8006c70: 687b ldr r3, [r7, #4]
- 8006c72: 6fdb ldr r3, [r3, #124] ; 0x7c
- 8006c74: 492b ldr r1, [pc, #172] ; (8006d24 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8006c76: 4313 orrs r3, r2
- 8006c78: f8c1 3090 str.w r3, [r1, #144] ; 0x90
-
- /* Enable the PLLSAI when it's used as clock source for CK48 */
- if(PeriphClkInit->Clk48ClockSelection == RCC_CLK48SOURCE_PLLSAIP)
- 8006c7c: 687b ldr r3, [r7, #4]
- 8006c7e: 6fdb ldr r3, [r3, #124] ; 0x7c
- 8006c80: f1b3 6f00 cmp.w r3, #134217728 ; 0x8000000
- 8006c84: d101 bne.n 8006c8a <HAL_RCCEx_PeriphCLKConfig+0x412>
- {
- pllsaiused = 1;
- 8006c86: 2301 movs r3, #1
- 8006c88: 61bb str r3, [r7, #24]
- }
- }
-
- /*-------------------------------------- LTDC Configuration -----------------------------------*/
-#if defined(STM32F746xx) || defined(STM32F756xx) || defined (STM32F767xx) || defined (STM32F769xx) || defined (STM32F777xx) || defined (STM32F779xx) || defined (STM32F750xx)
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LTDC) == RCC_PERIPHCLK_LTDC)
- 8006c8a: 687b ldr r3, [r7, #4]
- 8006c8c: 681b ldr r3, [r3, #0]
- 8006c8e: f003 0308 and.w r3, r3, #8
- 8006c92: 2b00 cmp r3, #0
- 8006c94: d001 beq.n 8006c9a <HAL_RCCEx_PeriphCLKConfig+0x422>
- {
- pllsaiused = 1;
- 8006c96: 2301 movs r3, #1
- 8006c98: 61bb str r3, [r7, #24]
- }
-#endif /* STM32F746xx || STM32F756xx || STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx || STM32F750xx */
-
- /*-------------------------------------- LPTIM1 Configuration -----------------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM1) == RCC_PERIPHCLK_LPTIM1)
- 8006c9a: 687b ldr r3, [r7, #4]
- 8006c9c: 681b ldr r3, [r3, #0]
- 8006c9e: f403 2380 and.w r3, r3, #262144 ; 0x40000
- 8006ca2: 2b00 cmp r3, #0
- 8006ca4: d00a beq.n 8006cbc <HAL_RCCEx_PeriphCLKConfig+0x444>
- {
- /* Check the parameters */
- assert_param(IS_RCC_LPTIM1CLK(PeriphClkInit->Lptim1ClockSelection));
-
- /* Configure the LTPIM1 clock source */
- __HAL_RCC_LPTIM1_CONFIG(PeriphClkInit->Lptim1ClockSelection);
- 8006ca6: 4b1f ldr r3, [pc, #124] ; (8006d24 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8006ca8: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 8006cac: f023 7240 bic.w r2, r3, #50331648 ; 0x3000000
- 8006cb0: 687b ldr r3, [r7, #4]
- 8006cb2: 6f5b ldr r3, [r3, #116] ; 0x74
- 8006cb4: 491b ldr r1, [pc, #108] ; (8006d24 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8006cb6: 4313 orrs r3, r2
- 8006cb8: f8c1 3090 str.w r3, [r1, #144] ; 0x90
- }
-
- /*------------------------------------- SDMMC1 Configuration ------------------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SDMMC1) == RCC_PERIPHCLK_SDMMC1)
- 8006cbc: 687b ldr r3, [r7, #4]
- 8006cbe: 681b ldr r3, [r3, #0]
- 8006cc0: f403 0300 and.w r3, r3, #8388608 ; 0x800000
- 8006cc4: 2b00 cmp r3, #0
- 8006cc6: d00b beq.n 8006ce0 <HAL_RCCEx_PeriphCLKConfig+0x468>
- {
- /* Check the parameters */
- assert_param(IS_RCC_SDMMC1CLKSOURCE(PeriphClkInit->Sdmmc1ClockSelection));
-
- /* Configure the SDMMC1 clock source */
- __HAL_RCC_SDMMC1_CONFIG(PeriphClkInit->Sdmmc1ClockSelection);
- 8006cc8: 4b16 ldr r3, [pc, #88] ; (8006d24 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8006cca: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 8006cce: f023 5280 bic.w r2, r3, #268435456 ; 0x10000000
- 8006cd2: 687b ldr r3, [r7, #4]
- 8006cd4: f8d3 3080 ldr.w r3, [r3, #128] ; 0x80
- 8006cd8: 4912 ldr r1, [pc, #72] ; (8006d24 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8006cda: 4313 orrs r3, r2
- 8006cdc: f8c1 3090 str.w r3, [r1, #144] ; 0x90
- }
-
-#if defined (STM32F765xx) || defined (STM32F767xx) || defined (STM32F769xx) || defined (STM32F777xx) || defined (STM32F779xx)
- /*------------------------------------- SDMMC2 Configuration ------------------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SDMMC2) == RCC_PERIPHCLK_SDMMC2)
- 8006ce0: 687b ldr r3, [r7, #4]
- 8006ce2: 681b ldr r3, [r3, #0]
- 8006ce4: f003 6380 and.w r3, r3, #67108864 ; 0x4000000
- 8006ce8: 2b00 cmp r3, #0
- 8006cea: d00b beq.n 8006d04 <HAL_RCCEx_PeriphCLKConfig+0x48c>
- {
- /* Check the parameters */
- assert_param(IS_RCC_SDMMC2CLKSOURCE(PeriphClkInit->Sdmmc2ClockSelection));
-
- /* Configure the SDMMC2 clock source */
- __HAL_RCC_SDMMC2_CONFIG(PeriphClkInit->Sdmmc2ClockSelection);
- 8006cec: 4b0d ldr r3, [pc, #52] ; (8006d24 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8006cee: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 8006cf2: f023 5200 bic.w r2, r3, #536870912 ; 0x20000000
- 8006cf6: 687b ldr r3, [r7, #4]
- 8006cf8: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84
- 8006cfc: 4909 ldr r1, [pc, #36] ; (8006d24 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8006cfe: 4313 orrs r3, r2
- 8006d00: f8c1 3090 str.w r3, [r1, #144] ; 0x90
- }
-
- /*------------------------------------- DFSDM1 Configuration -------------------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_DFSDM1) == RCC_PERIPHCLK_DFSDM1)
- 8006d04: 687b ldr r3, [r7, #4]
- 8006d06: 681b ldr r3, [r3, #0]
- 8006d08: f003 6300 and.w r3, r3, #134217728 ; 0x8000000
- 8006d0c: 2b00 cmp r3, #0
- 8006d0e: d00f beq.n 8006d30 <HAL_RCCEx_PeriphCLKConfig+0x4b8>
- {
- /* Check the parameters */
- assert_param(IS_RCC_DFSDM1CLKSOURCE(PeriphClkInit->Dfsdm1ClockSelection));
-
- /* Configure the DFSDM1 interface clock source */
- __HAL_RCC_DFSDM1_CONFIG(PeriphClkInit->Dfsdm1ClockSelection);
- 8006d10: 4b04 ldr r3, [pc, #16] ; (8006d24 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8006d12: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c
- 8006d16: f023 7200 bic.w r2, r3, #33554432 ; 0x2000000
- 8006d1a: 687b ldr r3, [r7, #4]
- 8006d1c: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88
- 8006d20: e002 b.n 8006d28 <HAL_RCCEx_PeriphCLKConfig+0x4b0>
- 8006d22: bf00 nop
- 8006d24: 40023800 .word 0x40023800
- 8006d28: 4985 ldr r1, [pc, #532] ; (8006f40 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8006d2a: 4313 orrs r3, r2
- 8006d2c: f8c1 308c str.w r3, [r1, #140] ; 0x8c
- }
-
- /*------------------------------------- DFSDM AUDIO Configuration -------------------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_DFSDM1_AUDIO) == RCC_PERIPHCLK_DFSDM1_AUDIO)
- 8006d30: 687b ldr r3, [r7, #4]
- 8006d32: 681b ldr r3, [r3, #0]
- 8006d34: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
- 8006d38: 2b00 cmp r3, #0
- 8006d3a: d00b beq.n 8006d54 <HAL_RCCEx_PeriphCLKConfig+0x4dc>
- {
- /* Check the parameters */
- assert_param(IS_RCC_DFSDM1AUDIOCLKSOURCE(PeriphClkInit->Dfsdm1AudioClockSelection));
-
- /* Configure the DFSDM interface clock source */
- __HAL_RCC_DFSDM1AUDIO_CONFIG(PeriphClkInit->Dfsdm1AudioClockSelection);
- 8006d3c: 4b80 ldr r3, [pc, #512] ; (8006f40 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8006d3e: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c
- 8006d42: f023 6280 bic.w r2, r3, #67108864 ; 0x4000000
- 8006d46: 687b ldr r3, [r7, #4]
- 8006d48: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c
- 8006d4c: 497c ldr r1, [pc, #496] ; (8006f40 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8006d4e: 4313 orrs r3, r2
- 8006d50: f8c1 308c str.w r3, [r1, #140] ; 0x8c
- }
-#endif /* STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */
-
- /*-------------------------------------- PLLI2S Configuration ---------------------------------*/
- /* PLLI2S is configured when a peripheral will use it as source clock : SAI1, SAI2, I2S or SPDIF-RX */
- if((plli2sused == 1) || (PeriphClkInit->PeriphClockSelection == RCC_PERIPHCLK_PLLI2S))
- 8006d54: 69fb ldr r3, [r7, #28]
- 8006d56: 2b01 cmp r3, #1
- 8006d58: d005 beq.n 8006d66 <HAL_RCCEx_PeriphCLKConfig+0x4ee>
- 8006d5a: 687b ldr r3, [r7, #4]
- 8006d5c: 681b ldr r3, [r3, #0]
- 8006d5e: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000
- 8006d62: f040 80d6 bne.w 8006f12 <HAL_RCCEx_PeriphCLKConfig+0x69a>
- {
- /* Disable the PLLI2S */
- __HAL_RCC_PLLI2S_DISABLE();
- 8006d66: 4b76 ldr r3, [pc, #472] ; (8006f40 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8006d68: 681b ldr r3, [r3, #0]
- 8006d6a: 4a75 ldr r2, [pc, #468] ; (8006f40 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8006d6c: f023 6380 bic.w r3, r3, #67108864 ; 0x4000000
- 8006d70: 6013 str r3, [r2, #0]
-
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 8006d72: f7fe faa5 bl 80052c0 <HAL_GetTick>
- 8006d76: 6178 str r0, [r7, #20]
-
- /* Wait till PLLI2S is disabled */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) != RESET)
- 8006d78: e008 b.n 8006d8c <HAL_RCCEx_PeriphCLKConfig+0x514>
- {
- if((HAL_GetTick() - tickstart) > PLLI2S_TIMEOUT_VALUE)
- 8006d7a: f7fe faa1 bl 80052c0 <HAL_GetTick>
- 8006d7e: 4602 mov r2, r0
- 8006d80: 697b ldr r3, [r7, #20]
- 8006d82: 1ad3 subs r3, r2, r3
- 8006d84: 2b64 cmp r3, #100 ; 0x64
- 8006d86: d901 bls.n 8006d8c <HAL_RCCEx_PeriphCLKConfig+0x514>
- {
- /* return in case of Timeout detected */
- return HAL_TIMEOUT;
- 8006d88: 2303 movs r3, #3
- 8006d8a: e194 b.n 80070b6 <HAL_RCCEx_PeriphCLKConfig+0x83e>
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) != RESET)
- 8006d8c: 4b6c ldr r3, [pc, #432] ; (8006f40 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8006d8e: 681b ldr r3, [r3, #0]
- 8006d90: f003 6300 and.w r3, r3, #134217728 ; 0x8000000
- 8006d94: 2b00 cmp r3, #0
- 8006d96: d1f0 bne.n 8006d7a <HAL_RCCEx_PeriphCLKConfig+0x502>
-
- /* check for common PLLI2S Parameters */
- assert_param(IS_RCC_PLLI2SN_VALUE(PeriphClkInit->PLLI2S.PLLI2SN));
-
- /*----------------- In Case of PLLI2S is selected as source clock for I2S -------------------*/
- if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S) == RCC_PERIPHCLK_I2S) && (PeriphClkInit->I2sClockSelection == RCC_I2SCLKSOURCE_PLLI2S)))
- 8006d98: 687b ldr r3, [r7, #4]
- 8006d9a: 681b ldr r3, [r3, #0]
- 8006d9c: f003 0301 and.w r3, r3, #1
- 8006da0: 2b00 cmp r3, #0
- 8006da2: d021 beq.n 8006de8 <HAL_RCCEx_PeriphCLKConfig+0x570>
- 8006da4: 687b ldr r3, [r7, #4]
- 8006da6: 6b5b ldr r3, [r3, #52] ; 0x34
- 8006da8: 2b00 cmp r3, #0
- 8006daa: d11d bne.n 8006de8 <HAL_RCCEx_PeriphCLKConfig+0x570>
- {
- /* check for Parameters */
- assert_param(IS_RCC_PLLI2SR_VALUE(PeriphClkInit->PLLI2S.PLLI2SR));
-
- /* Read PLLI2SP and PLLI2SQ value from PLLI2SCFGR register (this value is not needed for I2S configuration) */
- tmpreg0 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SP) >> RCC_PLLI2SCFGR_PLLI2SP_Pos);
- 8006dac: 4b64 ldr r3, [pc, #400] ; (8006f40 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8006dae: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84
- 8006db2: 0c1b lsrs r3, r3, #16
- 8006db4: f003 0303 and.w r3, r3, #3
- 8006db8: 613b str r3, [r7, #16]
- tmpreg1 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SQ) >> RCC_PLLI2SCFGR_PLLI2SQ_Pos);
- 8006dba: 4b61 ldr r3, [pc, #388] ; (8006f40 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8006dbc: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84
- 8006dc0: 0e1b lsrs r3, r3, #24
- 8006dc2: f003 030f and.w r3, r3, #15
- 8006dc6: 60fb str r3, [r7, #12]
- /* Configure the PLLI2S division factors */
- /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) x (PLLI2SN/PLLM) */
- /* I2SCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SR */
- __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN , tmpreg0, tmpreg1, PeriphClkInit->PLLI2S.PLLI2SR);
- 8006dc8: 687b ldr r3, [r7, #4]
- 8006dca: 685b ldr r3, [r3, #4]
- 8006dcc: 019a lsls r2, r3, #6
- 8006dce: 693b ldr r3, [r7, #16]
- 8006dd0: 041b lsls r3, r3, #16
- 8006dd2: 431a orrs r2, r3
- 8006dd4: 68fb ldr r3, [r7, #12]
- 8006dd6: 061b lsls r3, r3, #24
- 8006dd8: 431a orrs r2, r3
- 8006dda: 687b ldr r3, [r7, #4]
- 8006ddc: 689b ldr r3, [r3, #8]
- 8006dde: 071b lsls r3, r3, #28
- 8006de0: 4957 ldr r1, [pc, #348] ; (8006f40 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8006de2: 4313 orrs r3, r2
- 8006de4: f8c1 3084 str.w r3, [r1, #132] ; 0x84
- }
-
- /*----------------- In Case of PLLI2S is selected as source clock for SAI -------------------*/
- if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) && (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLI2S)) ||
- 8006de8: 687b ldr r3, [r7, #4]
- 8006dea: 681b ldr r3, [r3, #0]
- 8006dec: f403 2300 and.w r3, r3, #524288 ; 0x80000
- 8006df0: 2b00 cmp r3, #0
- 8006df2: d004 beq.n 8006dfe <HAL_RCCEx_PeriphCLKConfig+0x586>
- 8006df4: 687b ldr r3, [r7, #4]
- 8006df6: 6bdb ldr r3, [r3, #60] ; 0x3c
- 8006df8: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000
- 8006dfc: d00a beq.n 8006e14 <HAL_RCCEx_PeriphCLKConfig+0x59c>
- ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLI2S)))
- 8006dfe: 687b ldr r3, [r7, #4]
- 8006e00: 681b ldr r3, [r3, #0]
- 8006e02: f403 1380 and.w r3, r3, #1048576 ; 0x100000
- if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) && (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLI2S)) ||
- 8006e06: 2b00 cmp r3, #0
- 8006e08: d02e beq.n 8006e68 <HAL_RCCEx_PeriphCLKConfig+0x5f0>
- ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLI2S)))
- 8006e0a: 687b ldr r3, [r7, #4]
- 8006e0c: 6c1b ldr r3, [r3, #64] ; 0x40
- 8006e0e: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000
- 8006e12: d129 bne.n 8006e68 <HAL_RCCEx_PeriphCLKConfig+0x5f0>
- assert_param(IS_RCC_PLLI2SQ_VALUE(PeriphClkInit->PLLI2S.PLLI2SQ));
- /* Check for PLLI2S/DIVQ parameters */
- assert_param(IS_RCC_PLLI2S_DIVQ_VALUE(PeriphClkInit->PLLI2SDivQ));
-
- /* Read PLLI2SP and PLLI2SR values from PLLI2SCFGR register (this value is not needed for SAI configuration) */
- tmpreg0 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SP) >> RCC_PLLI2SCFGR_PLLI2SP_Pos);
- 8006e14: 4b4a ldr r3, [pc, #296] ; (8006f40 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8006e16: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84
- 8006e1a: 0c1b lsrs r3, r3, #16
- 8006e1c: f003 0303 and.w r3, r3, #3
- 8006e20: 613b str r3, [r7, #16]
- tmpreg1 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos);
- 8006e22: 4b47 ldr r3, [pc, #284] ; (8006f40 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8006e24: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84
- 8006e28: 0f1b lsrs r3, r3, #28
- 8006e2a: f003 0307 and.w r3, r3, #7
- 8006e2e: 60fb str r3, [r7, #12]
- /* Configure the PLLI2S division factors */
- /* PLLI2S_VCO Input = PLL_SOURCE/PLLM */
- /* PLLI2S_VCO Output = PLLI2S_VCO Input * PLLI2SN */
- /* SAI_CLK(first level) = PLLI2S_VCO Output/PLLI2SQ */
- __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN, tmpreg0, PeriphClkInit->PLLI2S.PLLI2SQ, tmpreg1);
- 8006e30: 687b ldr r3, [r7, #4]
- 8006e32: 685b ldr r3, [r3, #4]
- 8006e34: 019a lsls r2, r3, #6
- 8006e36: 693b ldr r3, [r7, #16]
- 8006e38: 041b lsls r3, r3, #16
- 8006e3a: 431a orrs r2, r3
- 8006e3c: 687b ldr r3, [r7, #4]
- 8006e3e: 68db ldr r3, [r3, #12]
- 8006e40: 061b lsls r3, r3, #24
- 8006e42: 431a orrs r2, r3
- 8006e44: 68fb ldr r3, [r7, #12]
- 8006e46: 071b lsls r3, r3, #28
- 8006e48: 493d ldr r1, [pc, #244] ; (8006f40 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8006e4a: 4313 orrs r3, r2
- 8006e4c: f8c1 3084 str.w r3, [r1, #132] ; 0x84
-
- /* SAI_CLK_x = SAI_CLK(first level)/PLLI2SDIVQ */
- __HAL_RCC_PLLI2S_PLLSAICLKDIVQ_CONFIG(PeriphClkInit->PLLI2SDivQ);
- 8006e50: 4b3b ldr r3, [pc, #236] ; (8006f40 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8006e52: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c
- 8006e56: f023 021f bic.w r2, r3, #31
- 8006e5a: 687b ldr r3, [r7, #4]
- 8006e5c: 6a5b ldr r3, [r3, #36] ; 0x24
- 8006e5e: 3b01 subs r3, #1
- 8006e60: 4937 ldr r1, [pc, #220] ; (8006f40 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8006e62: 4313 orrs r3, r2
- 8006e64: f8c1 308c str.w r3, [r1, #140] ; 0x8c
- }
-
- /*----------------- In Case of PLLI2S is selected as source clock for SPDIF-RX -------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPDIFRX) == RCC_PERIPHCLK_SPDIFRX)
- 8006e68: 687b ldr r3, [r7, #4]
- 8006e6a: 681b ldr r3, [r3, #0]
- 8006e6c: f003 7380 and.w r3, r3, #16777216 ; 0x1000000
- 8006e70: 2b00 cmp r3, #0
- 8006e72: d01d beq.n 8006eb0 <HAL_RCCEx_PeriphCLKConfig+0x638>
- {
- /* check for Parameters */
- assert_param(IS_RCC_PLLI2SP_VALUE(PeriphClkInit->PLLI2S.PLLI2SP));
-
- /* Read PLLI2SR value from PLLI2SCFGR register (this value is not needed for SPDIF-RX configuration) */
- tmpreg0 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SQ) >> RCC_PLLI2SCFGR_PLLI2SQ_Pos);
- 8006e74: 4b32 ldr r3, [pc, #200] ; (8006f40 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8006e76: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84
- 8006e7a: 0e1b lsrs r3, r3, #24
- 8006e7c: f003 030f and.w r3, r3, #15
- 8006e80: 613b str r3, [r7, #16]
- tmpreg1 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos);
- 8006e82: 4b2f ldr r3, [pc, #188] ; (8006f40 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8006e84: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84
- 8006e88: 0f1b lsrs r3, r3, #28
- 8006e8a: f003 0307 and.w r3, r3, #7
- 8006e8e: 60fb str r3, [r7, #12]
- /* Configure the PLLI2S division factors */
- /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) x (PLLI2SN/PLLM) */
- /* SPDIFCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SP */
- __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN , PeriphClkInit->PLLI2S.PLLI2SP, tmpreg0, tmpreg1);
- 8006e90: 687b ldr r3, [r7, #4]
- 8006e92: 685b ldr r3, [r3, #4]
- 8006e94: 019a lsls r2, r3, #6
- 8006e96: 687b ldr r3, [r7, #4]
- 8006e98: 691b ldr r3, [r3, #16]
- 8006e9a: 041b lsls r3, r3, #16
- 8006e9c: 431a orrs r2, r3
- 8006e9e: 693b ldr r3, [r7, #16]
- 8006ea0: 061b lsls r3, r3, #24
- 8006ea2: 431a orrs r2, r3
- 8006ea4: 68fb ldr r3, [r7, #12]
- 8006ea6: 071b lsls r3, r3, #28
- 8006ea8: 4925 ldr r1, [pc, #148] ; (8006f40 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8006eaa: 4313 orrs r3, r2
- 8006eac: f8c1 3084 str.w r3, [r1, #132] ; 0x84
- }
-
- /*----------------- In Case of PLLI2S is just selected -----------------*/
- if((PeriphClkInit->PeriphClockSelection & RCC_PERIPHCLK_PLLI2S) == RCC_PERIPHCLK_PLLI2S)
- 8006eb0: 687b ldr r3, [r7, #4]
- 8006eb2: 681b ldr r3, [r3, #0]
- 8006eb4: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
- 8006eb8: 2b00 cmp r3, #0
- 8006eba: d011 beq.n 8006ee0 <HAL_RCCEx_PeriphCLKConfig+0x668>
- assert_param(IS_RCC_PLLI2SQ_VALUE(PeriphClkInit->PLLI2S.PLLI2SQ));
-
- /* Configure the PLLI2S division factors */
- /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) x (PLLI2SN/PLLI2SM) */
- /* SPDIFRXCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SP */
- __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN , PeriphClkInit->PLLI2S.PLLI2SP, PeriphClkInit->PLLI2S.PLLI2SQ, PeriphClkInit->PLLI2S.PLLI2SR);
- 8006ebc: 687b ldr r3, [r7, #4]
- 8006ebe: 685b ldr r3, [r3, #4]
- 8006ec0: 019a lsls r2, r3, #6
- 8006ec2: 687b ldr r3, [r7, #4]
- 8006ec4: 691b ldr r3, [r3, #16]
- 8006ec6: 041b lsls r3, r3, #16
- 8006ec8: 431a orrs r2, r3
- 8006eca: 687b ldr r3, [r7, #4]
- 8006ecc: 68db ldr r3, [r3, #12]
- 8006ece: 061b lsls r3, r3, #24
- 8006ed0: 431a orrs r2, r3
- 8006ed2: 687b ldr r3, [r7, #4]
- 8006ed4: 689b ldr r3, [r3, #8]
- 8006ed6: 071b lsls r3, r3, #28
- 8006ed8: 4919 ldr r1, [pc, #100] ; (8006f40 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8006eda: 4313 orrs r3, r2
- 8006edc: f8c1 3084 str.w r3, [r1, #132] ; 0x84
- }
-
- /* Enable the PLLI2S */
- __HAL_RCC_PLLI2S_ENABLE();
- 8006ee0: 4b17 ldr r3, [pc, #92] ; (8006f40 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8006ee2: 681b ldr r3, [r3, #0]
- 8006ee4: 4a16 ldr r2, [pc, #88] ; (8006f40 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8006ee6: f043 6380 orr.w r3, r3, #67108864 ; 0x4000000
- 8006eea: 6013 str r3, [r2, #0]
-
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 8006eec: f7fe f9e8 bl 80052c0 <HAL_GetTick>
- 8006ef0: 6178 str r0, [r7, #20]
-
- /* Wait till PLLI2S is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) == RESET)
- 8006ef2: e008 b.n 8006f06 <HAL_RCCEx_PeriphCLKConfig+0x68e>
- {
- if((HAL_GetTick() - tickstart) > PLLI2S_TIMEOUT_VALUE)
- 8006ef4: f7fe f9e4 bl 80052c0 <HAL_GetTick>
- 8006ef8: 4602 mov r2, r0
- 8006efa: 697b ldr r3, [r7, #20]
- 8006efc: 1ad3 subs r3, r2, r3
- 8006efe: 2b64 cmp r3, #100 ; 0x64
- 8006f00: d901 bls.n 8006f06 <HAL_RCCEx_PeriphCLKConfig+0x68e>
- {
- /* return in case of Timeout detected */
- return HAL_TIMEOUT;
- 8006f02: 2303 movs r3, #3
- 8006f04: e0d7 b.n 80070b6 <HAL_RCCEx_PeriphCLKConfig+0x83e>
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) == RESET)
- 8006f06: 4b0e ldr r3, [pc, #56] ; (8006f40 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8006f08: 681b ldr r3, [r3, #0]
- 8006f0a: f003 6300 and.w r3, r3, #134217728 ; 0x8000000
- 8006f0e: 2b00 cmp r3, #0
- 8006f10: d0f0 beq.n 8006ef4 <HAL_RCCEx_PeriphCLKConfig+0x67c>
- }
- }
-
- /*-------------------------------------- PLLSAI Configuration ---------------------------------*/
- /* PLLSAI is configured when a peripheral will use it as source clock : SAI1, SAI2, LTDC or CK48 */
- if(pllsaiused == 1)
- 8006f12: 69bb ldr r3, [r7, #24]
- 8006f14: 2b01 cmp r3, #1
- 8006f16: f040 80cd bne.w 80070b4 <HAL_RCCEx_PeriphCLKConfig+0x83c>
- {
- /* Disable PLLSAI Clock */
- __HAL_RCC_PLLSAI_DISABLE();
- 8006f1a: 4b09 ldr r3, [pc, #36] ; (8006f40 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8006f1c: 681b ldr r3, [r3, #0]
- 8006f1e: 4a08 ldr r2, [pc, #32] ; (8006f40 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8006f20: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000
- 8006f24: 6013 str r3, [r2, #0]
-
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 8006f26: f7fe f9cb bl 80052c0 <HAL_GetTick>
- 8006f2a: 6178 str r0, [r7, #20]
-
- /* Wait till PLLSAI is disabled */
- while(__HAL_RCC_PLLSAI_GET_FLAG() != RESET)
- 8006f2c: e00a b.n 8006f44 <HAL_RCCEx_PeriphCLKConfig+0x6cc>
- {
- if((HAL_GetTick() - tickstart) > PLLSAI_TIMEOUT_VALUE)
- 8006f2e: f7fe f9c7 bl 80052c0 <HAL_GetTick>
- 8006f32: 4602 mov r2, r0
- 8006f34: 697b ldr r3, [r7, #20]
- 8006f36: 1ad3 subs r3, r2, r3
- 8006f38: 2b64 cmp r3, #100 ; 0x64
- 8006f3a: d903 bls.n 8006f44 <HAL_RCCEx_PeriphCLKConfig+0x6cc>
- {
- /* return in case of Timeout detected */
- return HAL_TIMEOUT;
- 8006f3c: 2303 movs r3, #3
- 8006f3e: e0ba b.n 80070b6 <HAL_RCCEx_PeriphCLKConfig+0x83e>
- 8006f40: 40023800 .word 0x40023800
- while(__HAL_RCC_PLLSAI_GET_FLAG() != RESET)
- 8006f44: 4b5e ldr r3, [pc, #376] ; (80070c0 <HAL_RCCEx_PeriphCLKConfig+0x848>)
- 8006f46: 681b ldr r3, [r3, #0]
- 8006f48: f003 5300 and.w r3, r3, #536870912 ; 0x20000000
- 8006f4c: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000
- 8006f50: d0ed beq.n 8006f2e <HAL_RCCEx_PeriphCLKConfig+0x6b6>
-
- /* Check the PLLSAI division factors */
- assert_param(IS_RCC_PLLSAIN_VALUE(PeriphClkInit->PLLSAI.PLLSAIN));
-
- /*----------------- In Case of PLLSAI is selected as source clock for SAI -------------------*/
- if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) && (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLSAI)) ||\
- 8006f52: 687b ldr r3, [r7, #4]
- 8006f54: 681b ldr r3, [r3, #0]
- 8006f56: f403 2300 and.w r3, r3, #524288 ; 0x80000
- 8006f5a: 2b00 cmp r3, #0
- 8006f5c: d003 beq.n 8006f66 <HAL_RCCEx_PeriphCLKConfig+0x6ee>
- 8006f5e: 687b ldr r3, [r7, #4]
- 8006f60: 6bdb ldr r3, [r3, #60] ; 0x3c
- 8006f62: 2b00 cmp r3, #0
- 8006f64: d009 beq.n 8006f7a <HAL_RCCEx_PeriphCLKConfig+0x702>
- ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLSAI)))
- 8006f66: 687b ldr r3, [r7, #4]
- 8006f68: 681b ldr r3, [r3, #0]
- 8006f6a: f403 1380 and.w r3, r3, #1048576 ; 0x100000
- if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) && (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLSAI)) ||\
- 8006f6e: 2b00 cmp r3, #0
- 8006f70: d02e beq.n 8006fd0 <HAL_RCCEx_PeriphCLKConfig+0x758>
- ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLSAI)))
- 8006f72: 687b ldr r3, [r7, #4]
- 8006f74: 6c1b ldr r3, [r3, #64] ; 0x40
- 8006f76: 2b00 cmp r3, #0
- 8006f78: d12a bne.n 8006fd0 <HAL_RCCEx_PeriphCLKConfig+0x758>
- assert_param(IS_RCC_PLLSAIQ_VALUE(PeriphClkInit->PLLSAI.PLLSAIQ));
- /* check for PLLSAI/DIVQ Parameter */
- assert_param(IS_RCC_PLLSAI_DIVQ_VALUE(PeriphClkInit->PLLSAIDivQ));
-
- /* Read PLLSAIP value from PLLSAICFGR register (this value is not needed for SAI configuration) */
- tmpreg0 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIP) >> RCC_PLLSAICFGR_PLLSAIP_Pos);
- 8006f7a: 4b51 ldr r3, [pc, #324] ; (80070c0 <HAL_RCCEx_PeriphCLKConfig+0x848>)
- 8006f7c: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88
- 8006f80: 0c1b lsrs r3, r3, #16
- 8006f82: f003 0303 and.w r3, r3, #3
- 8006f86: 613b str r3, [r7, #16]
- tmpreg1 = ((RCC->PLLSAICFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLSAICFGR_PLLSAIR_Pos);
- 8006f88: 4b4d ldr r3, [pc, #308] ; (80070c0 <HAL_RCCEx_PeriphCLKConfig+0x848>)
- 8006f8a: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88
- 8006f8e: 0f1b lsrs r3, r3, #28
- 8006f90: f003 0307 and.w r3, r3, #7
- 8006f94: 60fb str r3, [r7, #12]
- /* PLLSAI_VCO Input = PLL_SOURCE/PLLM */
- /* PLLSAI_VCO Output = PLLSAI_VCO Input * PLLSAIN */
- /* SAI_CLK(first level) = PLLSAI_VCO Output/PLLSAIQ */
- __HAL_RCC_PLLSAI_CONFIG(PeriphClkInit->PLLSAI.PLLSAIN , tmpreg0, PeriphClkInit->PLLSAI.PLLSAIQ, tmpreg1);
- 8006f96: 687b ldr r3, [r7, #4]
- 8006f98: 695b ldr r3, [r3, #20]
- 8006f9a: 019a lsls r2, r3, #6
- 8006f9c: 693b ldr r3, [r7, #16]
- 8006f9e: 041b lsls r3, r3, #16
- 8006fa0: 431a orrs r2, r3
- 8006fa2: 687b ldr r3, [r7, #4]
- 8006fa4: 699b ldr r3, [r3, #24]
- 8006fa6: 061b lsls r3, r3, #24
- 8006fa8: 431a orrs r2, r3
- 8006faa: 68fb ldr r3, [r7, #12]
- 8006fac: 071b lsls r3, r3, #28
- 8006fae: 4944 ldr r1, [pc, #272] ; (80070c0 <HAL_RCCEx_PeriphCLKConfig+0x848>)
- 8006fb0: 4313 orrs r3, r2
- 8006fb2: f8c1 3088 str.w r3, [r1, #136] ; 0x88
-
- /* SAI_CLK_x = SAI_CLK(first level)/PLLSAIDIVQ */
- __HAL_RCC_PLLSAI_PLLSAICLKDIVQ_CONFIG(PeriphClkInit->PLLSAIDivQ);
- 8006fb6: 4b42 ldr r3, [pc, #264] ; (80070c0 <HAL_RCCEx_PeriphCLKConfig+0x848>)
- 8006fb8: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c
- 8006fbc: f423 52f8 bic.w r2, r3, #7936 ; 0x1f00
- 8006fc0: 687b ldr r3, [r7, #4]
- 8006fc2: 6a9b ldr r3, [r3, #40] ; 0x28
- 8006fc4: 3b01 subs r3, #1
- 8006fc6: 021b lsls r3, r3, #8
- 8006fc8: 493d ldr r1, [pc, #244] ; (80070c0 <HAL_RCCEx_PeriphCLKConfig+0x848>)
- 8006fca: 4313 orrs r3, r2
- 8006fcc: f8c1 308c str.w r3, [r1, #140] ; 0x8c
- }
-
- /*----------------- In Case of PLLSAI is selected as source clock for CLK48 -------------------*/
- /* In Case of PLLI2S is selected as source clock for CK48 */
- if((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CLK48) == RCC_PERIPHCLK_CLK48) && (PeriphClkInit->Clk48ClockSelection == RCC_CLK48SOURCE_PLLSAIP))
- 8006fd0: 687b ldr r3, [r7, #4]
- 8006fd2: 681b ldr r3, [r3, #0]
- 8006fd4: f403 1300 and.w r3, r3, #2097152 ; 0x200000
- 8006fd8: 2b00 cmp r3, #0
- 8006fda: d022 beq.n 8007022 <HAL_RCCEx_PeriphCLKConfig+0x7aa>
- 8006fdc: 687b ldr r3, [r7, #4]
- 8006fde: 6fdb ldr r3, [r3, #124] ; 0x7c
- 8006fe0: f1b3 6f00 cmp.w r3, #134217728 ; 0x8000000
- 8006fe4: d11d bne.n 8007022 <HAL_RCCEx_PeriphCLKConfig+0x7aa>
- {
- /* check for Parameters */
- assert_param(IS_RCC_PLLSAIP_VALUE(PeriphClkInit->PLLSAI.PLLSAIP));
- /* Read PLLSAIQ and PLLSAIR value from PLLSAICFGR register (this value is not needed for CK48 configuration) */
- tmpreg0 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIQ) >> RCC_PLLSAICFGR_PLLSAIQ_Pos);
- 8006fe6: 4b36 ldr r3, [pc, #216] ; (80070c0 <HAL_RCCEx_PeriphCLKConfig+0x848>)
- 8006fe8: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88
- 8006fec: 0e1b lsrs r3, r3, #24
- 8006fee: f003 030f and.w r3, r3, #15
- 8006ff2: 613b str r3, [r7, #16]
- tmpreg1 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIR) >> RCC_PLLSAICFGR_PLLSAIR_Pos);
- 8006ff4: 4b32 ldr r3, [pc, #200] ; (80070c0 <HAL_RCCEx_PeriphCLKConfig+0x848>)
- 8006ff6: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88
- 8006ffa: 0f1b lsrs r3, r3, #28
- 8006ffc: f003 0307 and.w r3, r3, #7
- 8007000: 60fb str r3, [r7, #12]
-
- /* Configure the PLLSAI division factors */
- /* PLLSAI_VCO = f(VCO clock) = f(PLLSAI clock input) x (PLLI2SN/PLLM) */
- /* 48CLK = f(PLLSAI clock output) = f(VCO clock) / PLLSAIP */
- __HAL_RCC_PLLSAI_CONFIG(PeriphClkInit->PLLSAI.PLLSAIN , PeriphClkInit->PLLSAI.PLLSAIP, tmpreg0, tmpreg1);
- 8007002: 687b ldr r3, [r7, #4]
- 8007004: 695b ldr r3, [r3, #20]
- 8007006: 019a lsls r2, r3, #6
- 8007008: 687b ldr r3, [r7, #4]
- 800700a: 6a1b ldr r3, [r3, #32]
- 800700c: 041b lsls r3, r3, #16
- 800700e: 431a orrs r2, r3
- 8007010: 693b ldr r3, [r7, #16]
- 8007012: 061b lsls r3, r3, #24
- 8007014: 431a orrs r2, r3
- 8007016: 68fb ldr r3, [r7, #12]
- 8007018: 071b lsls r3, r3, #28
- 800701a: 4929 ldr r1, [pc, #164] ; (80070c0 <HAL_RCCEx_PeriphCLKConfig+0x848>)
- 800701c: 4313 orrs r3, r2
- 800701e: f8c1 3088 str.w r3, [r1, #136] ; 0x88
- }
-
-#if defined(STM32F746xx) || defined(STM32F756xx) || defined (STM32F767xx) || defined (STM32F769xx) || defined (STM32F777xx) || defined (STM32F779xx) || defined (STM32F750xx)
- /*---------------------------- LTDC configuration -------------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LTDC) == (RCC_PERIPHCLK_LTDC))
- 8007022: 687b ldr r3, [r7, #4]
- 8007024: 681b ldr r3, [r3, #0]
- 8007026: f003 0308 and.w r3, r3, #8
- 800702a: 2b00 cmp r3, #0
- 800702c: d028 beq.n 8007080 <HAL_RCCEx_PeriphCLKConfig+0x808>
- {
- assert_param(IS_RCC_PLLSAIR_VALUE(PeriphClkInit->PLLSAI.PLLSAIR));
- assert_param(IS_RCC_PLLSAI_DIVR_VALUE(PeriphClkInit->PLLSAIDivR));
-
- /* Read PLLSAIP and PLLSAIQ value from PLLSAICFGR register (these value are not needed for LTDC configuration) */
- tmpreg0 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIQ) >> RCC_PLLSAICFGR_PLLSAIQ_Pos);
- 800702e: 4b24 ldr r3, [pc, #144] ; (80070c0 <HAL_RCCEx_PeriphCLKConfig+0x848>)
- 8007030: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88
- 8007034: 0e1b lsrs r3, r3, #24
- 8007036: f003 030f and.w r3, r3, #15
- 800703a: 613b str r3, [r7, #16]
- tmpreg1 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIP) >> RCC_PLLSAICFGR_PLLSAIP_Pos);
- 800703c: 4b20 ldr r3, [pc, #128] ; (80070c0 <HAL_RCCEx_PeriphCLKConfig+0x848>)
- 800703e: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88
- 8007042: 0c1b lsrs r3, r3, #16
- 8007044: f003 0303 and.w r3, r3, #3
- 8007048: 60fb str r3, [r7, #12]
-
- /* PLLSAI_VCO Input = PLL_SOURCE/PLLM */
- /* PLLSAI_VCO Output = PLLSAI_VCO Input * PLLSAIN */
- /* LTDC_CLK(first level) = PLLSAI_VCO Output/PLLSAIR */
- __HAL_RCC_PLLSAI_CONFIG(PeriphClkInit->PLLSAI.PLLSAIN , tmpreg1, tmpreg0, PeriphClkInit->PLLSAI.PLLSAIR);
- 800704a: 687b ldr r3, [r7, #4]
- 800704c: 695b ldr r3, [r3, #20]
- 800704e: 019a lsls r2, r3, #6
- 8007050: 68fb ldr r3, [r7, #12]
- 8007052: 041b lsls r3, r3, #16
- 8007054: 431a orrs r2, r3
- 8007056: 693b ldr r3, [r7, #16]
- 8007058: 061b lsls r3, r3, #24
- 800705a: 431a orrs r2, r3
- 800705c: 687b ldr r3, [r7, #4]
- 800705e: 69db ldr r3, [r3, #28]
- 8007060: 071b lsls r3, r3, #28
- 8007062: 4917 ldr r1, [pc, #92] ; (80070c0 <HAL_RCCEx_PeriphCLKConfig+0x848>)
- 8007064: 4313 orrs r3, r2
- 8007066: f8c1 3088 str.w r3, [r1, #136] ; 0x88
-
- /* LTDC_CLK = LTDC_CLK(first level)/PLLSAIDIVR */
- __HAL_RCC_PLLSAI_PLLSAICLKDIVR_CONFIG(PeriphClkInit->PLLSAIDivR);
- 800706a: 4b15 ldr r3, [pc, #84] ; (80070c0 <HAL_RCCEx_PeriphCLKConfig+0x848>)
- 800706c: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c
- 8007070: f423 3240 bic.w r2, r3, #196608 ; 0x30000
- 8007074: 687b ldr r3, [r7, #4]
- 8007076: 6adb ldr r3, [r3, #44] ; 0x2c
- 8007078: 4911 ldr r1, [pc, #68] ; (80070c0 <HAL_RCCEx_PeriphCLKConfig+0x848>)
- 800707a: 4313 orrs r3, r2
- 800707c: f8c1 308c str.w r3, [r1, #140] ; 0x8c
- }
-#endif /* STM32F746xx || STM32F756xx || STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx || STM32F750xx */
-
- /* Enable PLLSAI Clock */
- __HAL_RCC_PLLSAI_ENABLE();
- 8007080: 4b0f ldr r3, [pc, #60] ; (80070c0 <HAL_RCCEx_PeriphCLKConfig+0x848>)
- 8007082: 681b ldr r3, [r3, #0]
- 8007084: 4a0e ldr r2, [pc, #56] ; (80070c0 <HAL_RCCEx_PeriphCLKConfig+0x848>)
- 8007086: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
- 800708a: 6013 str r3, [r2, #0]
-
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- 800708c: f7fe f918 bl 80052c0 <HAL_GetTick>
- 8007090: 6178 str r0, [r7, #20]
-
- /* Wait till PLLSAI is ready */
- while(__HAL_RCC_PLLSAI_GET_FLAG() == RESET)
- 8007092: e008 b.n 80070a6 <HAL_RCCEx_PeriphCLKConfig+0x82e>
- {
- if((HAL_GetTick() - tickstart) > PLLSAI_TIMEOUT_VALUE)
- 8007094: f7fe f914 bl 80052c0 <HAL_GetTick>
- 8007098: 4602 mov r2, r0
- 800709a: 697b ldr r3, [r7, #20]
- 800709c: 1ad3 subs r3, r2, r3
- 800709e: 2b64 cmp r3, #100 ; 0x64
- 80070a0: d901 bls.n 80070a6 <HAL_RCCEx_PeriphCLKConfig+0x82e>
- {
- /* return in case of Timeout detected */
- return HAL_TIMEOUT;
- 80070a2: 2303 movs r3, #3
- 80070a4: e007 b.n 80070b6 <HAL_RCCEx_PeriphCLKConfig+0x83e>
- while(__HAL_RCC_PLLSAI_GET_FLAG() == RESET)
- 80070a6: 4b06 ldr r3, [pc, #24] ; (80070c0 <HAL_RCCEx_PeriphCLKConfig+0x848>)
- 80070a8: 681b ldr r3, [r3, #0]
- 80070aa: f003 5300 and.w r3, r3, #536870912 ; 0x20000000
- 80070ae: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000
- 80070b2: d1ef bne.n 8007094 <HAL_RCCEx_PeriphCLKConfig+0x81c>
- }
- }
- }
- return HAL_OK;
- 80070b4: 2300 movs r3, #0
-}
- 80070b6: 4618 mov r0, r3
- 80070b8: 3720 adds r7, #32
- 80070ba: 46bd mov sp, r7
- 80070bc: bd80 pop {r7, pc}
- 80070be: bf00 nop
- 80070c0: 40023800 .word 0x40023800
-
-080070c4 <HAL_TIM_Base_Init>:
- * Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init()
- * @param htim TIM Base handle
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim)
-{
- 80070c4: b580 push {r7, lr}
- 80070c6: b082 sub sp, #8
- 80070c8: af00 add r7, sp, #0
- 80070ca: 6078 str r0, [r7, #4]
- /* Check the TIM handle allocation */
- if (htim == NULL)
- 80070cc: 687b ldr r3, [r7, #4]
- 80070ce: 2b00 cmp r3, #0
- 80070d0: d101 bne.n 80070d6 <HAL_TIM_Base_Init+0x12>
- {
- return HAL_ERROR;
- 80070d2: 2301 movs r3, #1
- 80070d4: e01d b.n 8007112 <HAL_TIM_Base_Init+0x4e>
- assert_param(IS_TIM_INSTANCE(htim->Instance));
- assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
- assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
- assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
-
- if (htim->State == HAL_TIM_STATE_RESET)
- 80070d6: 687b ldr r3, [r7, #4]
- 80070d8: f893 303d ldrb.w r3, [r3, #61] ; 0x3d
- 80070dc: b2db uxtb r3, r3
- 80070de: 2b00 cmp r3, #0
- 80070e0: d106 bne.n 80070f0 <HAL_TIM_Base_Init+0x2c>
- {
- /* Allocate lock resource and initialize it */
- htim->Lock = HAL_UNLOCKED;
- 80070e2: 687b ldr r3, [r7, #4]
- 80070e4: 2200 movs r2, #0
- 80070e6: f883 203c strb.w r2, [r3, #60] ; 0x3c
- }
- /* Init the low level hardware : GPIO, CLOCK, NVIC */
- htim->Base_MspInitCallback(htim);
-#else
- /* Init the low level hardware : GPIO, CLOCK, NVIC */
- HAL_TIM_Base_MspInit(htim);
- 80070ea: 6878 ldr r0, [r7, #4]
- 80070ec: f7fd fd88 bl 8004c00 <HAL_TIM_Base_MspInit>
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
- }
-
- /* Set the TIM state */
- htim->State = HAL_TIM_STATE_BUSY;
- 80070f0: 687b ldr r3, [r7, #4]
- 80070f2: 2202 movs r2, #2
- 80070f4: f883 203d strb.w r2, [r3, #61] ; 0x3d
-
- /* Set the Time Base configuration */
- TIM_Base_SetConfig(htim->Instance, &htim->Init);
- 80070f8: 687b ldr r3, [r7, #4]
- 80070fa: 681a ldr r2, [r3, #0]
- 80070fc: 687b ldr r3, [r7, #4]
- 80070fe: 3304 adds r3, #4
- 8007100: 4619 mov r1, r3
- 8007102: 4610 mov r0, r2
- 8007104: f000 fc20 bl 8007948 <TIM_Base_SetConfig>
-
- /* Initialize the TIM state*/
- htim->State = HAL_TIM_STATE_READY;
- 8007108: 687b ldr r3, [r7, #4]
- 800710a: 2201 movs r2, #1
- 800710c: f883 203d strb.w r2, [r3, #61] ; 0x3d
-
- return HAL_OK;
- 8007110: 2300 movs r3, #0
-}
- 8007112: 4618 mov r0, r3
- 8007114: 3708 adds r7, #8
- 8007116: 46bd mov sp, r7
- 8007118: bd80 pop {r7, pc}
-
-0800711a <HAL_TIM_PWM_Init>:
- * Ex: call @ref HAL_TIM_PWM_DeInit() before HAL_TIM_PWM_Init()
- * @param htim TIM PWM handle
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim)
-{
- 800711a: b580 push {r7, lr}
- 800711c: b082 sub sp, #8
- 800711e: af00 add r7, sp, #0
- 8007120: 6078 str r0, [r7, #4]
- /* Check the TIM handle allocation */
- if (htim == NULL)
- 8007122: 687b ldr r3, [r7, #4]
- 8007124: 2b00 cmp r3, #0
- 8007126: d101 bne.n 800712c <HAL_TIM_PWM_Init+0x12>
- {
- return HAL_ERROR;
- 8007128: 2301 movs r3, #1
- 800712a: e01d b.n 8007168 <HAL_TIM_PWM_Init+0x4e>
- assert_param(IS_TIM_INSTANCE(htim->Instance));
- assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
- assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
- assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
-
- if (htim->State == HAL_TIM_STATE_RESET)
- 800712c: 687b ldr r3, [r7, #4]
- 800712e: f893 303d ldrb.w r3, [r3, #61] ; 0x3d
- 8007132: b2db uxtb r3, r3
- 8007134: 2b00 cmp r3, #0
- 8007136: d106 bne.n 8007146 <HAL_TIM_PWM_Init+0x2c>
- {
- /* Allocate lock resource and initialize it */
- htim->Lock = HAL_UNLOCKED;
- 8007138: 687b ldr r3, [r7, #4]
- 800713a: 2200 movs r2, #0
- 800713c: f883 203c strb.w r2, [r3, #60] ; 0x3c
- }
- /* Init the low level hardware : GPIO, CLOCK, NVIC */
- htim->PWM_MspInitCallback(htim);
-#else
- /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
- HAL_TIM_PWM_MspInit(htim);
- 8007140: 6878 ldr r0, [r7, #4]
- 8007142: f000 f815 bl 8007170 <HAL_TIM_PWM_MspInit>
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
- }
-
- /* Set the TIM state */
- htim->State = HAL_TIM_STATE_BUSY;
- 8007146: 687b ldr r3, [r7, #4]
- 8007148: 2202 movs r2, #2
- 800714a: f883 203d strb.w r2, [r3, #61] ; 0x3d
-
- /* Init the base time for the PWM */
- TIM_Base_SetConfig(htim->Instance, &htim->Init);
- 800714e: 687b ldr r3, [r7, #4]
- 8007150: 681a ldr r2, [r3, #0]
- 8007152: 687b ldr r3, [r7, #4]
- 8007154: 3304 adds r3, #4
- 8007156: 4619 mov r1, r3
- 8007158: 4610 mov r0, r2
- 800715a: f000 fbf5 bl 8007948 <TIM_Base_SetConfig>
-
- /* Initialize the TIM state*/
- htim->State = HAL_TIM_STATE_READY;
- 800715e: 687b ldr r3, [r7, #4]
- 8007160: 2201 movs r2, #1
- 8007162: f883 203d strb.w r2, [r3, #61] ; 0x3d
-
- return HAL_OK;
- 8007166: 2300 movs r3, #0
-}
- 8007168: 4618 mov r0, r3
- 800716a: 3708 adds r7, #8
- 800716c: 46bd mov sp, r7
- 800716e: bd80 pop {r7, pc}
-
-08007170 <HAL_TIM_PWM_MspInit>:
- * @brief Initializes the TIM PWM MSP.
- * @param htim TIM PWM handle
- * @retval None
- */
-__weak void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim)
-{
- 8007170: b480 push {r7}
- 8007172: b083 sub sp, #12
- 8007174: af00 add r7, sp, #0
- 8007176: 6078 str r0, [r7, #4]
- UNUSED(htim);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_TIM_PWM_MspInit could be implemented in the user file
- */
-}
- 8007178: bf00 nop
- 800717a: 370c adds r7, #12
- 800717c: 46bd mov sp, r7
- 800717e: f85d 7b04 ldr.w r7, [sp], #4
- 8007182: 4770 bx lr
-
-08007184 <HAL_TIM_Encoder_Init>:
- * @param htim TIM Encoder Interface handle
- * @param sConfig TIM Encoder Interface configuration structure
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *htim, TIM_Encoder_InitTypeDef *sConfig)
-{
- 8007184: b580 push {r7, lr}
- 8007186: b086 sub sp, #24
- 8007188: af00 add r7, sp, #0
- 800718a: 6078 str r0, [r7, #4]
- 800718c: 6039 str r1, [r7, #0]
- uint32_t tmpsmcr;
- uint32_t tmpccmr1;
- uint32_t tmpccer;
-
- /* Check the TIM handle allocation */
- if (htim == NULL)
- 800718e: 687b ldr r3, [r7, #4]
- 8007190: 2b00 cmp r3, #0
- 8007192: d101 bne.n 8007198 <HAL_TIM_Encoder_Init+0x14>
- {
- return HAL_ERROR;
- 8007194: 2301 movs r3, #1
- 8007196: e07b b.n 8007290 <HAL_TIM_Encoder_Init+0x10c>
- assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler));
- assert_param(IS_TIM_IC_PRESCALER(sConfig->IC2Prescaler));
- assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter));
- assert_param(IS_TIM_IC_FILTER(sConfig->IC2Filter));
-
- if (htim->State == HAL_TIM_STATE_RESET)
- 8007198: 687b ldr r3, [r7, #4]
- 800719a: f893 303d ldrb.w r3, [r3, #61] ; 0x3d
- 800719e: b2db uxtb r3, r3
- 80071a0: 2b00 cmp r3, #0
- 80071a2: d106 bne.n 80071b2 <HAL_TIM_Encoder_Init+0x2e>
- {
- /* Allocate lock resource and initialize it */
- htim->Lock = HAL_UNLOCKED;
- 80071a4: 687b ldr r3, [r7, #4]
- 80071a6: 2200 movs r2, #0
- 80071a8: f883 203c strb.w r2, [r3, #60] ; 0x3c
- }
- /* Init the low level hardware : GPIO, CLOCK, NVIC */
- htim->Encoder_MspInitCallback(htim);
-#else
- /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
- HAL_TIM_Encoder_MspInit(htim);
- 80071ac: 6878 ldr r0, [r7, #4]
- 80071ae: f7fd fc97 bl 8004ae0 <HAL_TIM_Encoder_MspInit>
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
- }
-
- /* Set the TIM state */
- htim->State = HAL_TIM_STATE_BUSY;
- 80071b2: 687b ldr r3, [r7, #4]
- 80071b4: 2202 movs r2, #2
- 80071b6: f883 203d strb.w r2, [r3, #61] ; 0x3d
-
- /* Reset the SMS and ECE bits */
- htim->Instance->SMCR &= ~(TIM_SMCR_SMS | TIM_SMCR_ECE);
- 80071ba: 687b ldr r3, [r7, #4]
- 80071bc: 681b ldr r3, [r3, #0]
- 80071be: 6899 ldr r1, [r3, #8]
- 80071c0: 687b ldr r3, [r7, #4]
- 80071c2: 681a ldr r2, [r3, #0]
- 80071c4: 4b34 ldr r3, [pc, #208] ; (8007298 <HAL_TIM_Encoder_Init+0x114>)
- 80071c6: 400b ands r3, r1
- 80071c8: 6093 str r3, [r2, #8]
-
- /* Configure the Time base in the Encoder Mode */
- TIM_Base_SetConfig(htim->Instance, &htim->Init);
- 80071ca: 687b ldr r3, [r7, #4]
- 80071cc: 681a ldr r2, [r3, #0]
- 80071ce: 687b ldr r3, [r7, #4]
- 80071d0: 3304 adds r3, #4
- 80071d2: 4619 mov r1, r3
- 80071d4: 4610 mov r0, r2
- 80071d6: f000 fbb7 bl 8007948 <TIM_Base_SetConfig>
-
- /* Get the TIMx SMCR register value */
- tmpsmcr = htim->Instance->SMCR;
- 80071da: 687b ldr r3, [r7, #4]
- 80071dc: 681b ldr r3, [r3, #0]
- 80071de: 689b ldr r3, [r3, #8]
- 80071e0: 617b str r3, [r7, #20]
-
- /* Get the TIMx CCMR1 register value */
- tmpccmr1 = htim->Instance->CCMR1;
- 80071e2: 687b ldr r3, [r7, #4]
- 80071e4: 681b ldr r3, [r3, #0]
- 80071e6: 699b ldr r3, [r3, #24]
- 80071e8: 613b str r3, [r7, #16]
-
- /* Get the TIMx CCER register value */
- tmpccer = htim->Instance->CCER;
- 80071ea: 687b ldr r3, [r7, #4]
- 80071ec: 681b ldr r3, [r3, #0]
- 80071ee: 6a1b ldr r3, [r3, #32]
- 80071f0: 60fb str r3, [r7, #12]
-
- /* Set the encoder Mode */
- tmpsmcr |= sConfig->EncoderMode;
- 80071f2: 683b ldr r3, [r7, #0]
- 80071f4: 681b ldr r3, [r3, #0]
- 80071f6: 697a ldr r2, [r7, #20]
- 80071f8: 4313 orrs r3, r2
- 80071fa: 617b str r3, [r7, #20]
-
- /* Select the Capture Compare 1 and the Capture Compare 2 as input */
- tmpccmr1 &= ~(TIM_CCMR1_CC1S | TIM_CCMR1_CC2S);
- 80071fc: 693a ldr r2, [r7, #16]
- 80071fe: 4b27 ldr r3, [pc, #156] ; (800729c <HAL_TIM_Encoder_Init+0x118>)
- 8007200: 4013 ands r3, r2
- 8007202: 613b str r3, [r7, #16]
- tmpccmr1 |= (sConfig->IC1Selection | (sConfig->IC2Selection << 8U));
- 8007204: 683b ldr r3, [r7, #0]
- 8007206: 689a ldr r2, [r3, #8]
- 8007208: 683b ldr r3, [r7, #0]
- 800720a: 699b ldr r3, [r3, #24]
- 800720c: 021b lsls r3, r3, #8
- 800720e: 4313 orrs r3, r2
- 8007210: 693a ldr r2, [r7, #16]
- 8007212: 4313 orrs r3, r2
- 8007214: 613b str r3, [r7, #16]
-
- /* Set the Capture Compare 1 and the Capture Compare 2 prescalers and filters */
- tmpccmr1 &= ~(TIM_CCMR1_IC1PSC | TIM_CCMR1_IC2PSC);
- 8007216: 693a ldr r2, [r7, #16]
- 8007218: 4b21 ldr r3, [pc, #132] ; (80072a0 <HAL_TIM_Encoder_Init+0x11c>)
- 800721a: 4013 ands r3, r2
- 800721c: 613b str r3, [r7, #16]
- tmpccmr1 &= ~(TIM_CCMR1_IC1F | TIM_CCMR1_IC2F);
- 800721e: 693a ldr r2, [r7, #16]
- 8007220: 4b20 ldr r3, [pc, #128] ; (80072a4 <HAL_TIM_Encoder_Init+0x120>)
- 8007222: 4013 ands r3, r2
- 8007224: 613b str r3, [r7, #16]
- tmpccmr1 |= sConfig->IC1Prescaler | (sConfig->IC2Prescaler << 8U);
- 8007226: 683b ldr r3, [r7, #0]
- 8007228: 68da ldr r2, [r3, #12]
- 800722a: 683b ldr r3, [r7, #0]
- 800722c: 69db ldr r3, [r3, #28]
- 800722e: 021b lsls r3, r3, #8
- 8007230: 4313 orrs r3, r2
- 8007232: 693a ldr r2, [r7, #16]
- 8007234: 4313 orrs r3, r2
- 8007236: 613b str r3, [r7, #16]
- tmpccmr1 |= (sConfig->IC1Filter << 4U) | (sConfig->IC2Filter << 12U);
- 8007238: 683b ldr r3, [r7, #0]
- 800723a: 691b ldr r3, [r3, #16]
- 800723c: 011a lsls r2, r3, #4
- 800723e: 683b ldr r3, [r7, #0]
- 8007240: 6a1b ldr r3, [r3, #32]
- 8007242: 031b lsls r3, r3, #12
- 8007244: 4313 orrs r3, r2
- 8007246: 693a ldr r2, [r7, #16]
- 8007248: 4313 orrs r3, r2
- 800724a: 613b str r3, [r7, #16]
-
- /* Set the TI1 and the TI2 Polarities */
- tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC2P);
- 800724c: 68fb ldr r3, [r7, #12]
- 800724e: f023 0322 bic.w r3, r3, #34 ; 0x22
- 8007252: 60fb str r3, [r7, #12]
- tmpccer &= ~(TIM_CCER_CC1NP | TIM_CCER_CC2NP);
- 8007254: 68fb ldr r3, [r7, #12]
- 8007256: f023 0388 bic.w r3, r3, #136 ; 0x88
- 800725a: 60fb str r3, [r7, #12]
- tmpccer |= sConfig->IC1Polarity | (sConfig->IC2Polarity << 4U);
- 800725c: 683b ldr r3, [r7, #0]
- 800725e: 685a ldr r2, [r3, #4]
- 8007260: 683b ldr r3, [r7, #0]
- 8007262: 695b ldr r3, [r3, #20]
- 8007264: 011b lsls r3, r3, #4
- 8007266: 4313 orrs r3, r2
- 8007268: 68fa ldr r2, [r7, #12]
- 800726a: 4313 orrs r3, r2
- 800726c: 60fb str r3, [r7, #12]
-
- /* Write to TIMx SMCR */
- htim->Instance->SMCR = tmpsmcr;
- 800726e: 687b ldr r3, [r7, #4]
- 8007270: 681b ldr r3, [r3, #0]
- 8007272: 697a ldr r2, [r7, #20]
- 8007274: 609a str r2, [r3, #8]
-
- /* Write to TIMx CCMR1 */
- htim->Instance->CCMR1 = tmpccmr1;
- 8007276: 687b ldr r3, [r7, #4]
- 8007278: 681b ldr r3, [r3, #0]
- 800727a: 693a ldr r2, [r7, #16]
- 800727c: 619a str r2, [r3, #24]
-
- /* Write to TIMx CCER */
- htim->Instance->CCER = tmpccer;
- 800727e: 687b ldr r3, [r7, #4]
- 8007280: 681b ldr r3, [r3, #0]
- 8007282: 68fa ldr r2, [r7, #12]
- 8007284: 621a str r2, [r3, #32]
-
- /* Initialize the TIM state*/
- htim->State = HAL_TIM_STATE_READY;
- 8007286: 687b ldr r3, [r7, #4]
- 8007288: 2201 movs r2, #1
- 800728a: f883 203d strb.w r2, [r3, #61] ; 0x3d
-
- return HAL_OK;
- 800728e: 2300 movs r3, #0
-}
- 8007290: 4618 mov r0, r3
- 8007292: 3718 adds r7, #24
- 8007294: 46bd mov sp, r7
- 8007296: bd80 pop {r7, pc}
- 8007298: fffebff8 .word 0xfffebff8
- 800729c: fffffcfc .word 0xfffffcfc
- 80072a0: fffff3f3 .word 0xfffff3f3
- 80072a4: ffff0f0f .word 0xffff0f0f
-
-080072a8 <HAL_TIM_Encoder_Start>:
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_Encoder_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
- 80072a8: b580 push {r7, lr}
- 80072aa: b082 sub sp, #8
- 80072ac: af00 add r7, sp, #0
- 80072ae: 6078 str r0, [r7, #4]
- 80072b0: 6039 str r1, [r7, #0]
- /* Check the parameters */
- assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
-
- /* Enable the encoder interface channels */
- switch (Channel)
- 80072b2: 683b ldr r3, [r7, #0]
- 80072b4: 2b00 cmp r3, #0
- 80072b6: d002 beq.n 80072be <HAL_TIM_Encoder_Start+0x16>
- 80072b8: 2b04 cmp r3, #4
- 80072ba: d008 beq.n 80072ce <HAL_TIM_Encoder_Start+0x26>
- 80072bc: e00f b.n 80072de <HAL_TIM_Encoder_Start+0x36>
- {
- case TIM_CHANNEL_1:
- {
- TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
- 80072be: 687b ldr r3, [r7, #4]
- 80072c0: 681b ldr r3, [r3, #0]
- 80072c2: 2201 movs r2, #1
- 80072c4: 2100 movs r1, #0
- 80072c6: 4618 mov r0, r3
- 80072c8: f000 fed6 bl 8008078 <TIM_CCxChannelCmd>
- break;
- 80072cc: e016 b.n 80072fc <HAL_TIM_Encoder_Start+0x54>
- }
-
- case TIM_CHANNEL_2:
- {
- TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
- 80072ce: 687b ldr r3, [r7, #4]
- 80072d0: 681b ldr r3, [r3, #0]
- 80072d2: 2201 movs r2, #1
- 80072d4: 2104 movs r1, #4
- 80072d6: 4618 mov r0, r3
- 80072d8: f000 fece bl 8008078 <TIM_CCxChannelCmd>
- break;
- 80072dc: e00e b.n 80072fc <HAL_TIM_Encoder_Start+0x54>
- }
-
- default :
- {
- TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
- 80072de: 687b ldr r3, [r7, #4]
- 80072e0: 681b ldr r3, [r3, #0]
- 80072e2: 2201 movs r2, #1
- 80072e4: 2100 movs r1, #0
- 80072e6: 4618 mov r0, r3
- 80072e8: f000 fec6 bl 8008078 <TIM_CCxChannelCmd>
- TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
- 80072ec: 687b ldr r3, [r7, #4]
- 80072ee: 681b ldr r3, [r3, #0]
- 80072f0: 2201 movs r2, #1
- 80072f2: 2104 movs r1, #4
- 80072f4: 4618 mov r0, r3
- 80072f6: f000 febf bl 8008078 <TIM_CCxChannelCmd>
- break;
- 80072fa: bf00 nop
- }
- }
- /* Enable the Peripheral */
- __HAL_TIM_ENABLE(htim);
- 80072fc: 687b ldr r3, [r7, #4]
- 80072fe: 681b ldr r3, [r3, #0]
- 8007300: 681a ldr r2, [r3, #0]
- 8007302: 687b ldr r3, [r7, #4]
- 8007304: 681b ldr r3, [r3, #0]
- 8007306: f042 0201 orr.w r2, r2, #1
- 800730a: 601a str r2, [r3, #0]
-
- /* Return function status */
- return HAL_OK;
- 800730c: 2300 movs r3, #0
-}
- 800730e: 4618 mov r0, r3
- 8007310: 3708 adds r7, #8
- 8007312: 46bd mov sp, r7
- 8007314: bd80 pop {r7, pc}
-
-08007316 <HAL_TIM_IRQHandler>:
- * @brief This function handles TIM interrupts requests.
- * @param htim TIM handle
- * @retval None
- */
-void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
-{
- 8007316: b580 push {r7, lr}
- 8007318: b082 sub sp, #8
- 800731a: af00 add r7, sp, #0
- 800731c: 6078 str r0, [r7, #4]
- /* Capture compare 1 event */
- if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
- 800731e: 687b ldr r3, [r7, #4]
- 8007320: 681b ldr r3, [r3, #0]
- 8007322: 691b ldr r3, [r3, #16]
- 8007324: f003 0302 and.w r3, r3, #2
- 8007328: 2b02 cmp r3, #2
- 800732a: d122 bne.n 8007372 <HAL_TIM_IRQHandler+0x5c>
- {
- if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) != RESET)
- 800732c: 687b ldr r3, [r7, #4]
- 800732e: 681b ldr r3, [r3, #0]
- 8007330: 68db ldr r3, [r3, #12]
- 8007332: f003 0302 and.w r3, r3, #2
- 8007336: 2b02 cmp r3, #2
- 8007338: d11b bne.n 8007372 <HAL_TIM_IRQHandler+0x5c>
- {
- {
- __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1);
- 800733a: 687b ldr r3, [r7, #4]
- 800733c: 681b ldr r3, [r3, #0]
- 800733e: f06f 0202 mvn.w r2, #2
- 8007342: 611a str r2, [r3, #16]
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
- 8007344: 687b ldr r3, [r7, #4]
- 8007346: 2201 movs r2, #1
- 8007348: 771a strb r2, [r3, #28]
-
- /* Input capture event */
- if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U)
- 800734a: 687b ldr r3, [r7, #4]
- 800734c: 681b ldr r3, [r3, #0]
- 800734e: 699b ldr r3, [r3, #24]
- 8007350: f003 0303 and.w r3, r3, #3
- 8007354: 2b00 cmp r3, #0
- 8007356: d003 beq.n 8007360 <HAL_TIM_IRQHandler+0x4a>
- {
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- htim->IC_CaptureCallback(htim);
-#else
- HAL_TIM_IC_CaptureCallback(htim);
- 8007358: 6878 ldr r0, [r7, #4]
- 800735a: f000 fad7 bl 800790c <HAL_TIM_IC_CaptureCallback>
- 800735e: e005 b.n 800736c <HAL_TIM_IRQHandler+0x56>
- {
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- htim->OC_DelayElapsedCallback(htim);
- htim->PWM_PulseFinishedCallback(htim);
-#else
- HAL_TIM_OC_DelayElapsedCallback(htim);
- 8007360: 6878 ldr r0, [r7, #4]
- 8007362: f000 fac9 bl 80078f8 <HAL_TIM_OC_DelayElapsedCallback>
- HAL_TIM_PWM_PulseFinishedCallback(htim);
- 8007366: 6878 ldr r0, [r7, #4]
- 8007368: f000 fada bl 8007920 <HAL_TIM_PWM_PulseFinishedCallback>
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
- }
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
- 800736c: 687b ldr r3, [r7, #4]
- 800736e: 2200 movs r2, #0
- 8007370: 771a strb r2, [r3, #28]
- }
- }
- }
- /* Capture compare 2 event */
- if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET)
- 8007372: 687b ldr r3, [r7, #4]
- 8007374: 681b ldr r3, [r3, #0]
- 8007376: 691b ldr r3, [r3, #16]
- 8007378: f003 0304 and.w r3, r3, #4
- 800737c: 2b04 cmp r3, #4
- 800737e: d122 bne.n 80073c6 <HAL_TIM_IRQHandler+0xb0>
- {
- if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) != RESET)
- 8007380: 687b ldr r3, [r7, #4]
- 8007382: 681b ldr r3, [r3, #0]
- 8007384: 68db ldr r3, [r3, #12]
- 8007386: f003 0304 and.w r3, r3, #4
- 800738a: 2b04 cmp r3, #4
- 800738c: d11b bne.n 80073c6 <HAL_TIM_IRQHandler+0xb0>
- {
- __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2);
- 800738e: 687b ldr r3, [r7, #4]
- 8007390: 681b ldr r3, [r3, #0]
- 8007392: f06f 0204 mvn.w r2, #4
- 8007396: 611a str r2, [r3, #16]
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
- 8007398: 687b ldr r3, [r7, #4]
- 800739a: 2202 movs r2, #2
- 800739c: 771a strb r2, [r3, #28]
- /* Input capture event */
- if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
- 800739e: 687b ldr r3, [r7, #4]
- 80073a0: 681b ldr r3, [r3, #0]
- 80073a2: 699b ldr r3, [r3, #24]
- 80073a4: f403 7340 and.w r3, r3, #768 ; 0x300
- 80073a8: 2b00 cmp r3, #0
- 80073aa: d003 beq.n 80073b4 <HAL_TIM_IRQHandler+0x9e>
- {
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- htim->IC_CaptureCallback(htim);
-#else
- HAL_TIM_IC_CaptureCallback(htim);
- 80073ac: 6878 ldr r0, [r7, #4]
- 80073ae: f000 faad bl 800790c <HAL_TIM_IC_CaptureCallback>
- 80073b2: e005 b.n 80073c0 <HAL_TIM_IRQHandler+0xaa>
- {
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- htim->OC_DelayElapsedCallback(htim);
- htim->PWM_PulseFinishedCallback(htim);
-#else
- HAL_TIM_OC_DelayElapsedCallback(htim);
- 80073b4: 6878 ldr r0, [r7, #4]
- 80073b6: f000 fa9f bl 80078f8 <HAL_TIM_OC_DelayElapsedCallback>
- HAL_TIM_PWM_PulseFinishedCallback(htim);
- 80073ba: 6878 ldr r0, [r7, #4]
- 80073bc: f000 fab0 bl 8007920 <HAL_TIM_PWM_PulseFinishedCallback>
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
- }
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
- 80073c0: 687b ldr r3, [r7, #4]
- 80073c2: 2200 movs r2, #0
- 80073c4: 771a strb r2, [r3, #28]
- }
- }
- /* Capture compare 3 event */
- if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET)
- 80073c6: 687b ldr r3, [r7, #4]
- 80073c8: 681b ldr r3, [r3, #0]
- 80073ca: 691b ldr r3, [r3, #16]
- 80073cc: f003 0308 and.w r3, r3, #8
- 80073d0: 2b08 cmp r3, #8
- 80073d2: d122 bne.n 800741a <HAL_TIM_IRQHandler+0x104>
- {
- if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) != RESET)
- 80073d4: 687b ldr r3, [r7, #4]
- 80073d6: 681b ldr r3, [r3, #0]
- 80073d8: 68db ldr r3, [r3, #12]
- 80073da: f003 0308 and.w r3, r3, #8
- 80073de: 2b08 cmp r3, #8
- 80073e0: d11b bne.n 800741a <HAL_TIM_IRQHandler+0x104>
- {
- __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3);
- 80073e2: 687b ldr r3, [r7, #4]
- 80073e4: 681b ldr r3, [r3, #0]
- 80073e6: f06f 0208 mvn.w r2, #8
- 80073ea: 611a str r2, [r3, #16]
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
- 80073ec: 687b ldr r3, [r7, #4]
- 80073ee: 2204 movs r2, #4
- 80073f0: 771a strb r2, [r3, #28]
- /* Input capture event */
- if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
- 80073f2: 687b ldr r3, [r7, #4]
- 80073f4: 681b ldr r3, [r3, #0]
- 80073f6: 69db ldr r3, [r3, #28]
- 80073f8: f003 0303 and.w r3, r3, #3
- 80073fc: 2b00 cmp r3, #0
- 80073fe: d003 beq.n 8007408 <HAL_TIM_IRQHandler+0xf2>
- {
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- htim->IC_CaptureCallback(htim);
-#else
- HAL_TIM_IC_CaptureCallback(htim);
- 8007400: 6878 ldr r0, [r7, #4]
- 8007402: f000 fa83 bl 800790c <HAL_TIM_IC_CaptureCallback>
- 8007406: e005 b.n 8007414 <HAL_TIM_IRQHandler+0xfe>
- {
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- htim->OC_DelayElapsedCallback(htim);
- htim->PWM_PulseFinishedCallback(htim);
-#else
- HAL_TIM_OC_DelayElapsedCallback(htim);
- 8007408: 6878 ldr r0, [r7, #4]
- 800740a: f000 fa75 bl 80078f8 <HAL_TIM_OC_DelayElapsedCallback>
- HAL_TIM_PWM_PulseFinishedCallback(htim);
- 800740e: 6878 ldr r0, [r7, #4]
- 8007410: f000 fa86 bl 8007920 <HAL_TIM_PWM_PulseFinishedCallback>
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
- }
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
- 8007414: 687b ldr r3, [r7, #4]
- 8007416: 2200 movs r2, #0
- 8007418: 771a strb r2, [r3, #28]
- }
- }
- /* Capture compare 4 event */
- if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET)
- 800741a: 687b ldr r3, [r7, #4]
- 800741c: 681b ldr r3, [r3, #0]
- 800741e: 691b ldr r3, [r3, #16]
- 8007420: f003 0310 and.w r3, r3, #16
- 8007424: 2b10 cmp r3, #16
- 8007426: d122 bne.n 800746e <HAL_TIM_IRQHandler+0x158>
- {
- if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) != RESET)
- 8007428: 687b ldr r3, [r7, #4]
- 800742a: 681b ldr r3, [r3, #0]
- 800742c: 68db ldr r3, [r3, #12]
- 800742e: f003 0310 and.w r3, r3, #16
- 8007432: 2b10 cmp r3, #16
- 8007434: d11b bne.n 800746e <HAL_TIM_IRQHandler+0x158>
- {
- __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4);
- 8007436: 687b ldr r3, [r7, #4]
- 8007438: 681b ldr r3, [r3, #0]
- 800743a: f06f 0210 mvn.w r2, #16
- 800743e: 611a str r2, [r3, #16]
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
- 8007440: 687b ldr r3, [r7, #4]
- 8007442: 2208 movs r2, #8
- 8007444: 771a strb r2, [r3, #28]
- /* Input capture event */
- if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
- 8007446: 687b ldr r3, [r7, #4]
- 8007448: 681b ldr r3, [r3, #0]
- 800744a: 69db ldr r3, [r3, #28]
- 800744c: f403 7340 and.w r3, r3, #768 ; 0x300
- 8007450: 2b00 cmp r3, #0
- 8007452: d003 beq.n 800745c <HAL_TIM_IRQHandler+0x146>
- {
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- htim->IC_CaptureCallback(htim);
-#else
- HAL_TIM_IC_CaptureCallback(htim);
- 8007454: 6878 ldr r0, [r7, #4]
- 8007456: f000 fa59 bl 800790c <HAL_TIM_IC_CaptureCallback>
- 800745a: e005 b.n 8007468 <HAL_TIM_IRQHandler+0x152>
- {
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- htim->OC_DelayElapsedCallback(htim);
- htim->PWM_PulseFinishedCallback(htim);
-#else
- HAL_TIM_OC_DelayElapsedCallback(htim);
- 800745c: 6878 ldr r0, [r7, #4]
- 800745e: f000 fa4b bl 80078f8 <HAL_TIM_OC_DelayElapsedCallback>
- HAL_TIM_PWM_PulseFinishedCallback(htim);
- 8007462: 6878 ldr r0, [r7, #4]
- 8007464: f000 fa5c bl 8007920 <HAL_TIM_PWM_PulseFinishedCallback>
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
- }
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
- 8007468: 687b ldr r3, [r7, #4]
- 800746a: 2200 movs r2, #0
- 800746c: 771a strb r2, [r3, #28]
- }
- }
- /* TIM Update event */
- if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET)
- 800746e: 687b ldr r3, [r7, #4]
- 8007470: 681b ldr r3, [r3, #0]
- 8007472: 691b ldr r3, [r3, #16]
- 8007474: f003 0301 and.w r3, r3, #1
- 8007478: 2b01 cmp r3, #1
- 800747a: d10e bne.n 800749a <HAL_TIM_IRQHandler+0x184>
- {
- if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) != RESET)
- 800747c: 687b ldr r3, [r7, #4]
- 800747e: 681b ldr r3, [r3, #0]
- 8007480: 68db ldr r3, [r3, #12]
- 8007482: f003 0301 and.w r3, r3, #1
- 8007486: 2b01 cmp r3, #1
- 8007488: d107 bne.n 800749a <HAL_TIM_IRQHandler+0x184>
- {
- __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE);
- 800748a: 687b ldr r3, [r7, #4]
- 800748c: 681b ldr r3, [r3, #0]
- 800748e: f06f 0201 mvn.w r2, #1
- 8007492: 611a str r2, [r3, #16]
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- htim->PeriodElapsedCallback(htim);
-#else
- HAL_TIM_PeriodElapsedCallback(htim);
- 8007494: 6878 ldr r0, [r7, #4]
- 8007496: f7fc fb37 bl 8003b08 <HAL_TIM_PeriodElapsedCallback>
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
- }
- }
- /* TIM Break input event */
- if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET)
- 800749a: 687b ldr r3, [r7, #4]
- 800749c: 681b ldr r3, [r3, #0]
- 800749e: 691b ldr r3, [r3, #16]
- 80074a0: f003 0380 and.w r3, r3, #128 ; 0x80
- 80074a4: 2b80 cmp r3, #128 ; 0x80
- 80074a6: d10e bne.n 80074c6 <HAL_TIM_IRQHandler+0x1b0>
- {
- if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) != RESET)
- 80074a8: 687b ldr r3, [r7, #4]
- 80074aa: 681b ldr r3, [r3, #0]
- 80074ac: 68db ldr r3, [r3, #12]
- 80074ae: f003 0380 and.w r3, r3, #128 ; 0x80
- 80074b2: 2b80 cmp r3, #128 ; 0x80
- 80074b4: d107 bne.n 80074c6 <HAL_TIM_IRQHandler+0x1b0>
- {
- __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK);
- 80074b6: 687b ldr r3, [r7, #4]
- 80074b8: 681b ldr r3, [r3, #0]
- 80074ba: f06f 0280 mvn.w r2, #128 ; 0x80
- 80074be: 611a str r2, [r3, #16]
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- htim->BreakCallback(htim);
-#else
- HAL_TIMEx_BreakCallback(htim);
- 80074c0: 6878 ldr r0, [r7, #4]
- 80074c2: f000 fe65 bl 8008190 <HAL_TIMEx_BreakCallback>
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
- }
- }
- /* TIM Break2 input event */
- if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK2) != RESET)
- 80074c6: 687b ldr r3, [r7, #4]
- 80074c8: 681b ldr r3, [r3, #0]
- 80074ca: 691b ldr r3, [r3, #16]
- 80074cc: f403 7380 and.w r3, r3, #256 ; 0x100
- 80074d0: f5b3 7f80 cmp.w r3, #256 ; 0x100
- 80074d4: d10e bne.n 80074f4 <HAL_TIM_IRQHandler+0x1de>
- {
- if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) != RESET)
- 80074d6: 687b ldr r3, [r7, #4]
- 80074d8: 681b ldr r3, [r3, #0]
- 80074da: 68db ldr r3, [r3, #12]
- 80074dc: f003 0380 and.w r3, r3, #128 ; 0x80
- 80074e0: 2b80 cmp r3, #128 ; 0x80
- 80074e2: d107 bne.n 80074f4 <HAL_TIM_IRQHandler+0x1de>
- {
- __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_BREAK2);
- 80074e4: 687b ldr r3, [r7, #4]
- 80074e6: 681b ldr r3, [r3, #0]
- 80074e8: f46f 7280 mvn.w r2, #256 ; 0x100
- 80074ec: 611a str r2, [r3, #16]
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- htim->Break2Callback(htim);
-#else
- HAL_TIMEx_Break2Callback(htim);
- 80074ee: 6878 ldr r0, [r7, #4]
- 80074f0: f000 fe58 bl 80081a4 <HAL_TIMEx_Break2Callback>
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
- }
- }
- /* TIM Trigger detection event */
- if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET)
- 80074f4: 687b ldr r3, [r7, #4]
- 80074f6: 681b ldr r3, [r3, #0]
- 80074f8: 691b ldr r3, [r3, #16]
- 80074fa: f003 0340 and.w r3, r3, #64 ; 0x40
- 80074fe: 2b40 cmp r3, #64 ; 0x40
- 8007500: d10e bne.n 8007520 <HAL_TIM_IRQHandler+0x20a>
- {
- if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) != RESET)
- 8007502: 687b ldr r3, [r7, #4]
- 8007504: 681b ldr r3, [r3, #0]
- 8007506: 68db ldr r3, [r3, #12]
- 8007508: f003 0340 and.w r3, r3, #64 ; 0x40
- 800750c: 2b40 cmp r3, #64 ; 0x40
- 800750e: d107 bne.n 8007520 <HAL_TIM_IRQHandler+0x20a>
- {
- __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER);
- 8007510: 687b ldr r3, [r7, #4]
- 8007512: 681b ldr r3, [r3, #0]
- 8007514: f06f 0240 mvn.w r2, #64 ; 0x40
- 8007518: 611a str r2, [r3, #16]
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- htim->TriggerCallback(htim);
-#else
- HAL_TIM_TriggerCallback(htim);
- 800751a: 6878 ldr r0, [r7, #4]
- 800751c: f000 fa0a bl 8007934 <HAL_TIM_TriggerCallback>
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
- }
- }
- /* TIM commutation event */
- if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET)
- 8007520: 687b ldr r3, [r7, #4]
- 8007522: 681b ldr r3, [r3, #0]
- 8007524: 691b ldr r3, [r3, #16]
- 8007526: f003 0320 and.w r3, r3, #32
- 800752a: 2b20 cmp r3, #32
- 800752c: d10e bne.n 800754c <HAL_TIM_IRQHandler+0x236>
- {
- if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) != RESET)
- 800752e: 687b ldr r3, [r7, #4]
- 8007530: 681b ldr r3, [r3, #0]
- 8007532: 68db ldr r3, [r3, #12]
- 8007534: f003 0320 and.w r3, r3, #32
- 8007538: 2b20 cmp r3, #32
- 800753a: d107 bne.n 800754c <HAL_TIM_IRQHandler+0x236>
- {
- __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM);
- 800753c: 687b ldr r3, [r7, #4]
- 800753e: 681b ldr r3, [r3, #0]
- 8007540: f06f 0220 mvn.w r2, #32
- 8007544: 611a str r2, [r3, #16]
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- htim->CommutationCallback(htim);
-#else
- HAL_TIMEx_CommutCallback(htim);
- 8007546: 6878 ldr r0, [r7, #4]
- 8007548: f000 fe18 bl 800817c <HAL_TIMEx_CommutCallback>
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
- }
- }
-}
- 800754c: bf00 nop
- 800754e: 3708 adds r7, #8
- 8007550: 46bd mov sp, r7
- 8007552: bd80 pop {r7, pc}
-
-08007554 <HAL_TIM_PWM_ConfigChannel>:
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim,
- TIM_OC_InitTypeDef *sConfig,
- uint32_t Channel)
-{
- 8007554: b580 push {r7, lr}
- 8007556: b084 sub sp, #16
- 8007558: af00 add r7, sp, #0
- 800755a: 60f8 str r0, [r7, #12]
- 800755c: 60b9 str r1, [r7, #8]
- 800755e: 607a str r2, [r7, #4]
- assert_param(IS_TIM_PWM_MODE(sConfig->OCMode));
- assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity));
- assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode));
-
- /* Process Locked */
- __HAL_LOCK(htim);
- 8007560: 68fb ldr r3, [r7, #12]
- 8007562: f893 303c ldrb.w r3, [r3, #60] ; 0x3c
- 8007566: 2b01 cmp r3, #1
- 8007568: d101 bne.n 800756e <HAL_TIM_PWM_ConfigChannel+0x1a>
- 800756a: 2302 movs r3, #2
- 800756c: e105 b.n 800777a <HAL_TIM_PWM_ConfigChannel+0x226>
- 800756e: 68fb ldr r3, [r7, #12]
- 8007570: 2201 movs r2, #1
- 8007572: f883 203c strb.w r2, [r3, #60] ; 0x3c
-
- htim->State = HAL_TIM_STATE_BUSY;
- 8007576: 68fb ldr r3, [r7, #12]
- 8007578: 2202 movs r2, #2
- 800757a: f883 203d strb.w r2, [r3, #61] ; 0x3d
-
- switch (Channel)
- 800757e: 687b ldr r3, [r7, #4]
- 8007580: 2b14 cmp r3, #20
- 8007582: f200 80f0 bhi.w 8007766 <HAL_TIM_PWM_ConfigChannel+0x212>
- 8007586: a201 add r2, pc, #4 ; (adr r2, 800758c <HAL_TIM_PWM_ConfigChannel+0x38>)
- 8007588: f852 f023 ldr.w pc, [r2, r3, lsl #2]
- 800758c: 080075e1 .word 0x080075e1
- 8007590: 08007767 .word 0x08007767
- 8007594: 08007767 .word 0x08007767
- 8007598: 08007767 .word 0x08007767
- 800759c: 08007621 .word 0x08007621
- 80075a0: 08007767 .word 0x08007767
- 80075a4: 08007767 .word 0x08007767
- 80075a8: 08007767 .word 0x08007767
- 80075ac: 08007663 .word 0x08007663
- 80075b0: 08007767 .word 0x08007767
- 80075b4: 08007767 .word 0x08007767
- 80075b8: 08007767 .word 0x08007767
- 80075bc: 080076a3 .word 0x080076a3
- 80075c0: 08007767 .word 0x08007767
- 80075c4: 08007767 .word 0x08007767
- 80075c8: 08007767 .word 0x08007767
- 80075cc: 080076e5 .word 0x080076e5
- 80075d0: 08007767 .word 0x08007767
- 80075d4: 08007767 .word 0x08007767
- 80075d8: 08007767 .word 0x08007767
- 80075dc: 08007725 .word 0x08007725
- {
- /* Check the parameters */
- assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
-
- /* Configure the Channel 1 in PWM mode */
- TIM_OC1_SetConfig(htim->Instance, sConfig);
- 80075e0: 68fb ldr r3, [r7, #12]
- 80075e2: 681b ldr r3, [r3, #0]
- 80075e4: 68b9 ldr r1, [r7, #8]
- 80075e6: 4618 mov r0, r3
- 80075e8: f000 fa4e bl 8007a88 <TIM_OC1_SetConfig>
-
- /* Set the Preload enable bit for channel1 */
- htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE;
- 80075ec: 68fb ldr r3, [r7, #12]
- 80075ee: 681b ldr r3, [r3, #0]
- 80075f0: 699a ldr r2, [r3, #24]
- 80075f2: 68fb ldr r3, [r7, #12]
- 80075f4: 681b ldr r3, [r3, #0]
- 80075f6: f042 0208 orr.w r2, r2, #8
- 80075fa: 619a str r2, [r3, #24]
-
- /* Configure the Output Fast mode */
- htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE;
- 80075fc: 68fb ldr r3, [r7, #12]
- 80075fe: 681b ldr r3, [r3, #0]
- 8007600: 699a ldr r2, [r3, #24]
- 8007602: 68fb ldr r3, [r7, #12]
- 8007604: 681b ldr r3, [r3, #0]
- 8007606: f022 0204 bic.w r2, r2, #4
- 800760a: 619a str r2, [r3, #24]
- htim->Instance->CCMR1 |= sConfig->OCFastMode;
- 800760c: 68fb ldr r3, [r7, #12]
- 800760e: 681b ldr r3, [r3, #0]
- 8007610: 6999 ldr r1, [r3, #24]
- 8007612: 68bb ldr r3, [r7, #8]
- 8007614: 691a ldr r2, [r3, #16]
- 8007616: 68fb ldr r3, [r7, #12]
- 8007618: 681b ldr r3, [r3, #0]
- 800761a: 430a orrs r2, r1
- 800761c: 619a str r2, [r3, #24]
- break;
- 800761e: e0a3 b.n 8007768 <HAL_TIM_PWM_ConfigChannel+0x214>
- {
- /* Check the parameters */
- assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
-
- /* Configure the Channel 2 in PWM mode */
- TIM_OC2_SetConfig(htim->Instance, sConfig);
- 8007620: 68fb ldr r3, [r7, #12]
- 8007622: 681b ldr r3, [r3, #0]
- 8007624: 68b9 ldr r1, [r7, #8]
- 8007626: 4618 mov r0, r3
- 8007628: f000 faa0 bl 8007b6c <TIM_OC2_SetConfig>
-
- /* Set the Preload enable bit for channel2 */
- htim->Instance->CCMR1 |= TIM_CCMR1_OC2PE;
- 800762c: 68fb ldr r3, [r7, #12]
- 800762e: 681b ldr r3, [r3, #0]
- 8007630: 699a ldr r2, [r3, #24]
- 8007632: 68fb ldr r3, [r7, #12]
- 8007634: 681b ldr r3, [r3, #0]
- 8007636: f442 6200 orr.w r2, r2, #2048 ; 0x800
- 800763a: 619a str r2, [r3, #24]
-
- /* Configure the Output Fast mode */
- htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE;
- 800763c: 68fb ldr r3, [r7, #12]
- 800763e: 681b ldr r3, [r3, #0]
- 8007640: 699a ldr r2, [r3, #24]
- 8007642: 68fb ldr r3, [r7, #12]
- 8007644: 681b ldr r3, [r3, #0]
- 8007646: f422 6280 bic.w r2, r2, #1024 ; 0x400
- 800764a: 619a str r2, [r3, #24]
- htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U;
- 800764c: 68fb ldr r3, [r7, #12]
- 800764e: 681b ldr r3, [r3, #0]
- 8007650: 6999 ldr r1, [r3, #24]
- 8007652: 68bb ldr r3, [r7, #8]
- 8007654: 691b ldr r3, [r3, #16]
- 8007656: 021a lsls r2, r3, #8
- 8007658: 68fb ldr r3, [r7, #12]
- 800765a: 681b ldr r3, [r3, #0]
- 800765c: 430a orrs r2, r1
- 800765e: 619a str r2, [r3, #24]
- break;
- 8007660: e082 b.n 8007768 <HAL_TIM_PWM_ConfigChannel+0x214>
- {
- /* Check the parameters */
- assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
-
- /* Configure the Channel 3 in PWM mode */
- TIM_OC3_SetConfig(htim->Instance, sConfig);
- 8007662: 68fb ldr r3, [r7, #12]
- 8007664: 681b ldr r3, [r3, #0]
- 8007666: 68b9 ldr r1, [r7, #8]
- 8007668: 4618 mov r0, r3
- 800766a: f000 faf7 bl 8007c5c <TIM_OC3_SetConfig>
-
- /* Set the Preload enable bit for channel3 */
- htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE;
- 800766e: 68fb ldr r3, [r7, #12]
- 8007670: 681b ldr r3, [r3, #0]
- 8007672: 69da ldr r2, [r3, #28]
- 8007674: 68fb ldr r3, [r7, #12]
- 8007676: 681b ldr r3, [r3, #0]
- 8007678: f042 0208 orr.w r2, r2, #8
- 800767c: 61da str r2, [r3, #28]
-
- /* Configure the Output Fast mode */
- htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE;
- 800767e: 68fb ldr r3, [r7, #12]
- 8007680: 681b ldr r3, [r3, #0]
- 8007682: 69da ldr r2, [r3, #28]
- 8007684: 68fb ldr r3, [r7, #12]
- 8007686: 681b ldr r3, [r3, #0]
- 8007688: f022 0204 bic.w r2, r2, #4
- 800768c: 61da str r2, [r3, #28]
- htim->Instance->CCMR2 |= sConfig->OCFastMode;
- 800768e: 68fb ldr r3, [r7, #12]
- 8007690: 681b ldr r3, [r3, #0]
- 8007692: 69d9 ldr r1, [r3, #28]
- 8007694: 68bb ldr r3, [r7, #8]
- 8007696: 691a ldr r2, [r3, #16]
- 8007698: 68fb ldr r3, [r7, #12]
- 800769a: 681b ldr r3, [r3, #0]
- 800769c: 430a orrs r2, r1
- 800769e: 61da str r2, [r3, #28]
- break;
- 80076a0: e062 b.n 8007768 <HAL_TIM_PWM_ConfigChannel+0x214>
- {
- /* Check the parameters */
- assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
-
- /* Configure the Channel 4 in PWM mode */
- TIM_OC4_SetConfig(htim->Instance, sConfig);
- 80076a2: 68fb ldr r3, [r7, #12]
- 80076a4: 681b ldr r3, [r3, #0]
- 80076a6: 68b9 ldr r1, [r7, #8]
- 80076a8: 4618 mov r0, r3
- 80076aa: f000 fb4d bl 8007d48 <TIM_OC4_SetConfig>
-
- /* Set the Preload enable bit for channel4 */
- htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE;
- 80076ae: 68fb ldr r3, [r7, #12]
- 80076b0: 681b ldr r3, [r3, #0]
- 80076b2: 69da ldr r2, [r3, #28]
- 80076b4: 68fb ldr r3, [r7, #12]
- 80076b6: 681b ldr r3, [r3, #0]
- 80076b8: f442 6200 orr.w r2, r2, #2048 ; 0x800
- 80076bc: 61da str r2, [r3, #28]
-
- /* Configure the Output Fast mode */
- htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE;
- 80076be: 68fb ldr r3, [r7, #12]
- 80076c0: 681b ldr r3, [r3, #0]
- 80076c2: 69da ldr r2, [r3, #28]
- 80076c4: 68fb ldr r3, [r7, #12]
- 80076c6: 681b ldr r3, [r3, #0]
- 80076c8: f422 6280 bic.w r2, r2, #1024 ; 0x400
- 80076cc: 61da str r2, [r3, #28]
- htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U;
- 80076ce: 68fb ldr r3, [r7, #12]
- 80076d0: 681b ldr r3, [r3, #0]
- 80076d2: 69d9 ldr r1, [r3, #28]
- 80076d4: 68bb ldr r3, [r7, #8]
- 80076d6: 691b ldr r3, [r3, #16]
- 80076d8: 021a lsls r2, r3, #8
- 80076da: 68fb ldr r3, [r7, #12]
- 80076dc: 681b ldr r3, [r3, #0]
- 80076de: 430a orrs r2, r1
- 80076e0: 61da str r2, [r3, #28]
- break;
- 80076e2: e041 b.n 8007768 <HAL_TIM_PWM_ConfigChannel+0x214>
- {
- /* Check the parameters */
- assert_param(IS_TIM_CC5_INSTANCE(htim->Instance));
-
- /* Configure the Channel 5 in PWM mode */
- TIM_OC5_SetConfig(htim->Instance, sConfig);
- 80076e4: 68fb ldr r3, [r7, #12]
- 80076e6: 681b ldr r3, [r3, #0]
- 80076e8: 68b9 ldr r1, [r7, #8]
- 80076ea: 4618 mov r0, r3
- 80076ec: f000 fb84 bl 8007df8 <TIM_OC5_SetConfig>
-
- /* Set the Preload enable bit for channel5*/
- htim->Instance->CCMR3 |= TIM_CCMR3_OC5PE;
- 80076f0: 68fb ldr r3, [r7, #12]
- 80076f2: 681b ldr r3, [r3, #0]
- 80076f4: 6d5a ldr r2, [r3, #84] ; 0x54
- 80076f6: 68fb ldr r3, [r7, #12]
- 80076f8: 681b ldr r3, [r3, #0]
- 80076fa: f042 0208 orr.w r2, r2, #8
- 80076fe: 655a str r2, [r3, #84] ; 0x54
-
- /* Configure the Output Fast mode */
- htim->Instance->CCMR3 &= ~TIM_CCMR3_OC5FE;
- 8007700: 68fb ldr r3, [r7, #12]
- 8007702: 681b ldr r3, [r3, #0]
- 8007704: 6d5a ldr r2, [r3, #84] ; 0x54
- 8007706: 68fb ldr r3, [r7, #12]
- 8007708: 681b ldr r3, [r3, #0]
- 800770a: f022 0204 bic.w r2, r2, #4
- 800770e: 655a str r2, [r3, #84] ; 0x54
- htim->Instance->CCMR3 |= sConfig->OCFastMode;
- 8007710: 68fb ldr r3, [r7, #12]
- 8007712: 681b ldr r3, [r3, #0]
- 8007714: 6d59 ldr r1, [r3, #84] ; 0x54
- 8007716: 68bb ldr r3, [r7, #8]
- 8007718: 691a ldr r2, [r3, #16]
- 800771a: 68fb ldr r3, [r7, #12]
- 800771c: 681b ldr r3, [r3, #0]
- 800771e: 430a orrs r2, r1
- 8007720: 655a str r2, [r3, #84] ; 0x54
- break;
- 8007722: e021 b.n 8007768 <HAL_TIM_PWM_ConfigChannel+0x214>
- {
- /* Check the parameters */
- assert_param(IS_TIM_CC6_INSTANCE(htim->Instance));
-
- /* Configure the Channel 6 in PWM mode */
- TIM_OC6_SetConfig(htim->Instance, sConfig);
- 8007724: 68fb ldr r3, [r7, #12]
- 8007726: 681b ldr r3, [r3, #0]
- 8007728: 68b9 ldr r1, [r7, #8]
- 800772a: 4618 mov r0, r3
- 800772c: f000 fbb6 bl 8007e9c <TIM_OC6_SetConfig>
-
- /* Set the Preload enable bit for channel6 */
- htim->Instance->CCMR3 |= TIM_CCMR3_OC6PE;
- 8007730: 68fb ldr r3, [r7, #12]
- 8007732: 681b ldr r3, [r3, #0]
- 8007734: 6d5a ldr r2, [r3, #84] ; 0x54
- 8007736: 68fb ldr r3, [r7, #12]
- 8007738: 681b ldr r3, [r3, #0]
- 800773a: f442 6200 orr.w r2, r2, #2048 ; 0x800
- 800773e: 655a str r2, [r3, #84] ; 0x54
-
- /* Configure the Output Fast mode */
- htim->Instance->CCMR3 &= ~TIM_CCMR3_OC6FE;
- 8007740: 68fb ldr r3, [r7, #12]
- 8007742: 681b ldr r3, [r3, #0]
- 8007744: 6d5a ldr r2, [r3, #84] ; 0x54
- 8007746: 68fb ldr r3, [r7, #12]
- 8007748: 681b ldr r3, [r3, #0]
- 800774a: f422 6280 bic.w r2, r2, #1024 ; 0x400
- 800774e: 655a str r2, [r3, #84] ; 0x54
- htim->Instance->CCMR3 |= sConfig->OCFastMode << 8U;
- 8007750: 68fb ldr r3, [r7, #12]
- 8007752: 681b ldr r3, [r3, #0]
- 8007754: 6d59 ldr r1, [r3, #84] ; 0x54
- 8007756: 68bb ldr r3, [r7, #8]
- 8007758: 691b ldr r3, [r3, #16]
- 800775a: 021a lsls r2, r3, #8
- 800775c: 68fb ldr r3, [r7, #12]
- 800775e: 681b ldr r3, [r3, #0]
- 8007760: 430a orrs r2, r1
- 8007762: 655a str r2, [r3, #84] ; 0x54
- break;
- 8007764: e000 b.n 8007768 <HAL_TIM_PWM_ConfigChannel+0x214>
- }
-
- default:
- break;
- 8007766: bf00 nop
- }
-
- htim->State = HAL_TIM_STATE_READY;
- 8007768: 68fb ldr r3, [r7, #12]
- 800776a: 2201 movs r2, #1
- 800776c: f883 203d strb.w r2, [r3, #61] ; 0x3d
-
- __HAL_UNLOCK(htim);
- 8007770: 68fb ldr r3, [r7, #12]
- 8007772: 2200 movs r2, #0
- 8007774: f883 203c strb.w r2, [r3, #60] ; 0x3c
-
- return HAL_OK;
- 8007778: 2300 movs r3, #0
-}
- 800777a: 4618 mov r0, r3
- 800777c: 3710 adds r7, #16
- 800777e: 46bd mov sp, r7
- 8007780: bd80 pop {r7, pc}
- 8007782: bf00 nop
-
-08007784 <HAL_TIM_ConfigClockSource>:
- * @param sClockSourceConfig pointer to a TIM_ClockConfigTypeDef structure that
- * contains the clock source information for the TIM peripheral.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, TIM_ClockConfigTypeDef *sClockSourceConfig)
-{
- 8007784: b580 push {r7, lr}
- 8007786: b084 sub sp, #16
- 8007788: af00 add r7, sp, #0
- 800778a: 6078 str r0, [r7, #4]
- 800778c: 6039 str r1, [r7, #0]
- uint32_t tmpsmcr;
-
- /* Process Locked */
- __HAL_LOCK(htim);
- 800778e: 687b ldr r3, [r7, #4]
- 8007790: f893 303c ldrb.w r3, [r3, #60] ; 0x3c
- 8007794: 2b01 cmp r3, #1
- 8007796: d101 bne.n 800779c <HAL_TIM_ConfigClockSource+0x18>
- 8007798: 2302 movs r3, #2
- 800779a: e0a6 b.n 80078ea <HAL_TIM_ConfigClockSource+0x166>
- 800779c: 687b ldr r3, [r7, #4]
- 800779e: 2201 movs r2, #1
- 80077a0: f883 203c strb.w r2, [r3, #60] ; 0x3c
-
- htim->State = HAL_TIM_STATE_BUSY;
- 80077a4: 687b ldr r3, [r7, #4]
- 80077a6: 2202 movs r2, #2
- 80077a8: f883 203d strb.w r2, [r3, #61] ; 0x3d
-
- /* Check the parameters */
- assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource));
-
- /* Reset the SMS, TS, ECE, ETPS and ETRF bits */
- tmpsmcr = htim->Instance->SMCR;
- 80077ac: 687b ldr r3, [r7, #4]
- 80077ae: 681b ldr r3, [r3, #0]
- 80077b0: 689b ldr r3, [r3, #8]
- 80077b2: 60fb str r3, [r7, #12]
- tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS);
- 80077b4: 68fa ldr r2, [r7, #12]
- 80077b6: 4b4f ldr r3, [pc, #316] ; (80078f4 <HAL_TIM_ConfigClockSource+0x170>)
- 80077b8: 4013 ands r3, r2
- 80077ba: 60fb str r3, [r7, #12]
- tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
- 80077bc: 68fb ldr r3, [r7, #12]
- 80077be: f423 437f bic.w r3, r3, #65280 ; 0xff00
- 80077c2: 60fb str r3, [r7, #12]
- htim->Instance->SMCR = tmpsmcr;
- 80077c4: 687b ldr r3, [r7, #4]
- 80077c6: 681b ldr r3, [r3, #0]
- 80077c8: 68fa ldr r2, [r7, #12]
- 80077ca: 609a str r2, [r3, #8]
-
- switch (sClockSourceConfig->ClockSource)
- 80077cc: 683b ldr r3, [r7, #0]
- 80077ce: 681b ldr r3, [r3, #0]
- 80077d0: 2b40 cmp r3, #64 ; 0x40
- 80077d2: d067 beq.n 80078a4 <HAL_TIM_ConfigClockSource+0x120>
- 80077d4: 2b40 cmp r3, #64 ; 0x40
- 80077d6: d80b bhi.n 80077f0 <HAL_TIM_ConfigClockSource+0x6c>
- 80077d8: 2b10 cmp r3, #16
- 80077da: d073 beq.n 80078c4 <HAL_TIM_ConfigClockSource+0x140>
- 80077dc: 2b10 cmp r3, #16
- 80077de: d802 bhi.n 80077e6 <HAL_TIM_ConfigClockSource+0x62>
- 80077e0: 2b00 cmp r3, #0
- 80077e2: d06f beq.n 80078c4 <HAL_TIM_ConfigClockSource+0x140>
- TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource);
- break;
- }
-
- default:
- break;
- 80077e4: e078 b.n 80078d8 <HAL_TIM_ConfigClockSource+0x154>
- switch (sClockSourceConfig->ClockSource)
- 80077e6: 2b20 cmp r3, #32
- 80077e8: d06c beq.n 80078c4 <HAL_TIM_ConfigClockSource+0x140>
- 80077ea: 2b30 cmp r3, #48 ; 0x30
- 80077ec: d06a beq.n 80078c4 <HAL_TIM_ConfigClockSource+0x140>
- break;
- 80077ee: e073 b.n 80078d8 <HAL_TIM_ConfigClockSource+0x154>
- switch (sClockSourceConfig->ClockSource)
- 80077f0: 2b70 cmp r3, #112 ; 0x70
- 80077f2: d00d beq.n 8007810 <HAL_TIM_ConfigClockSource+0x8c>
- 80077f4: 2b70 cmp r3, #112 ; 0x70
- 80077f6: d804 bhi.n 8007802 <HAL_TIM_ConfigClockSource+0x7e>
- 80077f8: 2b50 cmp r3, #80 ; 0x50
- 80077fa: d033 beq.n 8007864 <HAL_TIM_ConfigClockSource+0xe0>
- 80077fc: 2b60 cmp r3, #96 ; 0x60
- 80077fe: d041 beq.n 8007884 <HAL_TIM_ConfigClockSource+0x100>
- break;
- 8007800: e06a b.n 80078d8 <HAL_TIM_ConfigClockSource+0x154>
- switch (sClockSourceConfig->ClockSource)
- 8007802: f5b3 5f80 cmp.w r3, #4096 ; 0x1000
- 8007806: d066 beq.n 80078d6 <HAL_TIM_ConfigClockSource+0x152>
- 8007808: f5b3 5f00 cmp.w r3, #8192 ; 0x2000
- 800780c: d017 beq.n 800783e <HAL_TIM_ConfigClockSource+0xba>
- break;
- 800780e: e063 b.n 80078d8 <HAL_TIM_ConfigClockSource+0x154>
- TIM_ETR_SetConfig(htim->Instance,
- 8007810: 687b ldr r3, [r7, #4]
- 8007812: 6818 ldr r0, [r3, #0]
- 8007814: 683b ldr r3, [r7, #0]
- 8007816: 6899 ldr r1, [r3, #8]
- 8007818: 683b ldr r3, [r7, #0]
- 800781a: 685a ldr r2, [r3, #4]
- 800781c: 683b ldr r3, [r7, #0]
- 800781e: 68db ldr r3, [r3, #12]
- 8007820: f000 fc0a bl 8008038 <TIM_ETR_SetConfig>
- tmpsmcr = htim->Instance->SMCR;
- 8007824: 687b ldr r3, [r7, #4]
- 8007826: 681b ldr r3, [r3, #0]
- 8007828: 689b ldr r3, [r3, #8]
- 800782a: 60fb str r3, [r7, #12]
- tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1);
- 800782c: 68fb ldr r3, [r7, #12]
- 800782e: f043 0377 orr.w r3, r3, #119 ; 0x77
- 8007832: 60fb str r3, [r7, #12]
- htim->Instance->SMCR = tmpsmcr;
- 8007834: 687b ldr r3, [r7, #4]
- 8007836: 681b ldr r3, [r3, #0]
- 8007838: 68fa ldr r2, [r7, #12]
- 800783a: 609a str r2, [r3, #8]
- break;
- 800783c: e04c b.n 80078d8 <HAL_TIM_ConfigClockSource+0x154>
- TIM_ETR_SetConfig(htim->Instance,
- 800783e: 687b ldr r3, [r7, #4]
- 8007840: 6818 ldr r0, [r3, #0]
- 8007842: 683b ldr r3, [r7, #0]
- 8007844: 6899 ldr r1, [r3, #8]
- 8007846: 683b ldr r3, [r7, #0]
- 8007848: 685a ldr r2, [r3, #4]
- 800784a: 683b ldr r3, [r7, #0]
- 800784c: 68db ldr r3, [r3, #12]
- 800784e: f000 fbf3 bl 8008038 <TIM_ETR_SetConfig>
- htim->Instance->SMCR |= TIM_SMCR_ECE;
- 8007852: 687b ldr r3, [r7, #4]
- 8007854: 681b ldr r3, [r3, #0]
- 8007856: 689a ldr r2, [r3, #8]
- 8007858: 687b ldr r3, [r7, #4]
- 800785a: 681b ldr r3, [r3, #0]
- 800785c: f442 4280 orr.w r2, r2, #16384 ; 0x4000
- 8007860: 609a str r2, [r3, #8]
- break;
- 8007862: e039 b.n 80078d8 <HAL_TIM_ConfigClockSource+0x154>
- TIM_TI1_ConfigInputStage(htim->Instance,
- 8007864: 687b ldr r3, [r7, #4]
- 8007866: 6818 ldr r0, [r3, #0]
- 8007868: 683b ldr r3, [r7, #0]
- 800786a: 6859 ldr r1, [r3, #4]
- 800786c: 683b ldr r3, [r7, #0]
- 800786e: 68db ldr r3, [r3, #12]
- 8007870: 461a mov r2, r3
- 8007872: f000 fb67 bl 8007f44 <TIM_TI1_ConfigInputStage>
- TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1);
- 8007876: 687b ldr r3, [r7, #4]
- 8007878: 681b ldr r3, [r3, #0]
- 800787a: 2150 movs r1, #80 ; 0x50
- 800787c: 4618 mov r0, r3
- 800787e: f000 fbc0 bl 8008002 <TIM_ITRx_SetConfig>
- break;
- 8007882: e029 b.n 80078d8 <HAL_TIM_ConfigClockSource+0x154>
- TIM_TI2_ConfigInputStage(htim->Instance,
- 8007884: 687b ldr r3, [r7, #4]
- 8007886: 6818 ldr r0, [r3, #0]
- 8007888: 683b ldr r3, [r7, #0]
- 800788a: 6859 ldr r1, [r3, #4]
- 800788c: 683b ldr r3, [r7, #0]
- 800788e: 68db ldr r3, [r3, #12]
- 8007890: 461a mov r2, r3
- 8007892: f000 fb86 bl 8007fa2 <TIM_TI2_ConfigInputStage>
- TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2);
- 8007896: 687b ldr r3, [r7, #4]
- 8007898: 681b ldr r3, [r3, #0]
- 800789a: 2160 movs r1, #96 ; 0x60
- 800789c: 4618 mov r0, r3
- 800789e: f000 fbb0 bl 8008002 <TIM_ITRx_SetConfig>
- break;
- 80078a2: e019 b.n 80078d8 <HAL_TIM_ConfigClockSource+0x154>
- TIM_TI1_ConfigInputStage(htim->Instance,
- 80078a4: 687b ldr r3, [r7, #4]
- 80078a6: 6818 ldr r0, [r3, #0]
- 80078a8: 683b ldr r3, [r7, #0]
- 80078aa: 6859 ldr r1, [r3, #4]
- 80078ac: 683b ldr r3, [r7, #0]
- 80078ae: 68db ldr r3, [r3, #12]
- 80078b0: 461a mov r2, r3
- 80078b2: f000 fb47 bl 8007f44 <TIM_TI1_ConfigInputStage>
- TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED);
- 80078b6: 687b ldr r3, [r7, #4]
- 80078b8: 681b ldr r3, [r3, #0]
- 80078ba: 2140 movs r1, #64 ; 0x40
- 80078bc: 4618 mov r0, r3
- 80078be: f000 fba0 bl 8008002 <TIM_ITRx_SetConfig>
- break;
- 80078c2: e009 b.n 80078d8 <HAL_TIM_ConfigClockSource+0x154>
- TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource);
- 80078c4: 687b ldr r3, [r7, #4]
- 80078c6: 681a ldr r2, [r3, #0]
- 80078c8: 683b ldr r3, [r7, #0]
- 80078ca: 681b ldr r3, [r3, #0]
- 80078cc: 4619 mov r1, r3
- 80078ce: 4610 mov r0, r2
- 80078d0: f000 fb97 bl 8008002 <TIM_ITRx_SetConfig>
- break;
- 80078d4: e000 b.n 80078d8 <HAL_TIM_ConfigClockSource+0x154>
- break;
- 80078d6: bf00 nop
- }
- htim->State = HAL_TIM_STATE_READY;
- 80078d8: 687b ldr r3, [r7, #4]
- 80078da: 2201 movs r2, #1
- 80078dc: f883 203d strb.w r2, [r3, #61] ; 0x3d
-
- __HAL_UNLOCK(htim);
- 80078e0: 687b ldr r3, [r7, #4]
- 80078e2: 2200 movs r2, #0
- 80078e4: f883 203c strb.w r2, [r3, #60] ; 0x3c
-
- return HAL_OK;
- 80078e8: 2300 movs r3, #0
-}
- 80078ea: 4618 mov r0, r3
- 80078ec: 3710 adds r7, #16
- 80078ee: 46bd mov sp, r7
- 80078f0: bd80 pop {r7, pc}
- 80078f2: bf00 nop
- 80078f4: fffeff88 .word 0xfffeff88
-
-080078f8 <HAL_TIM_OC_DelayElapsedCallback>:
- * @brief Output Compare callback in non-blocking mode
- * @param htim TIM OC handle
- * @retval None
- */
-__weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim)
-{
- 80078f8: b480 push {r7}
- 80078fa: b083 sub sp, #12
- 80078fc: af00 add r7, sp, #0
- 80078fe: 6078 str r0, [r7, #4]
- UNUSED(htim);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file
- */
-}
- 8007900: bf00 nop
- 8007902: 370c adds r7, #12
- 8007904: 46bd mov sp, r7
- 8007906: f85d 7b04 ldr.w r7, [sp], #4
- 800790a: 4770 bx lr
-
-0800790c <HAL_TIM_IC_CaptureCallback>:
- * @brief Input Capture callback in non-blocking mode
- * @param htim TIM IC handle
- * @retval None
- */
-__weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim)
-{
- 800790c: b480 push {r7}
- 800790e: b083 sub sp, #12
- 8007910: af00 add r7, sp, #0
- 8007912: 6078 str r0, [r7, #4]
- UNUSED(htim);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_TIM_IC_CaptureCallback could be implemented in the user file
- */
-}
- 8007914: bf00 nop
- 8007916: 370c adds r7, #12
- 8007918: 46bd mov sp, r7
- 800791a: f85d 7b04 ldr.w r7, [sp], #4
- 800791e: 4770 bx lr
-
-08007920 <HAL_TIM_PWM_PulseFinishedCallback>:
- * @brief PWM Pulse finished callback in non-blocking mode
- * @param htim TIM handle
- * @retval None
- */
-__weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim)
-{
- 8007920: b480 push {r7}
- 8007922: b083 sub sp, #12
- 8007924: af00 add r7, sp, #0
- 8007926: 6078 str r0, [r7, #4]
- UNUSED(htim);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file
- */
-}
- 8007928: bf00 nop
- 800792a: 370c adds r7, #12
- 800792c: 46bd mov sp, r7
- 800792e: f85d 7b04 ldr.w r7, [sp], #4
- 8007932: 4770 bx lr
-
-08007934 <HAL_TIM_TriggerCallback>:
- * @brief Hall Trigger detection callback in non-blocking mode
- * @param htim TIM handle
- * @retval None
- */
-__weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim)
-{
- 8007934: b480 push {r7}
- 8007936: b083 sub sp, #12
- 8007938: af00 add r7, sp, #0
- 800793a: 6078 str r0, [r7, #4]
- UNUSED(htim);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_TIM_TriggerCallback could be implemented in the user file
- */
-}
- 800793c: bf00 nop
- 800793e: 370c adds r7, #12
- 8007940: 46bd mov sp, r7
- 8007942: f85d 7b04 ldr.w r7, [sp], #4
- 8007946: 4770 bx lr
-
-08007948 <TIM_Base_SetConfig>:
- * @param TIMx TIM peripheral
- * @param Structure TIM Base configuration structure
- * @retval None
- */
-void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure)
-{
- 8007948: b480 push {r7}
- 800794a: b085 sub sp, #20
- 800794c: af00 add r7, sp, #0
- 800794e: 6078 str r0, [r7, #4]
- 8007950: 6039 str r1, [r7, #0]
- uint32_t tmpcr1;
- tmpcr1 = TIMx->CR1;
- 8007952: 687b ldr r3, [r7, #4]
- 8007954: 681b ldr r3, [r3, #0]
- 8007956: 60fb str r3, [r7, #12]
-
- /* Set TIM Time Base Unit parameters ---------------------------------------*/
- if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
- 8007958: 687b ldr r3, [r7, #4]
- 800795a: 4a40 ldr r2, [pc, #256] ; (8007a5c <TIM_Base_SetConfig+0x114>)
- 800795c: 4293 cmp r3, r2
- 800795e: d013 beq.n 8007988 <TIM_Base_SetConfig+0x40>
- 8007960: 687b ldr r3, [r7, #4]
- 8007962: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000
- 8007966: d00f beq.n 8007988 <TIM_Base_SetConfig+0x40>
- 8007968: 687b ldr r3, [r7, #4]
- 800796a: 4a3d ldr r2, [pc, #244] ; (8007a60 <TIM_Base_SetConfig+0x118>)
- 800796c: 4293 cmp r3, r2
- 800796e: d00b beq.n 8007988 <TIM_Base_SetConfig+0x40>
- 8007970: 687b ldr r3, [r7, #4]
- 8007972: 4a3c ldr r2, [pc, #240] ; (8007a64 <TIM_Base_SetConfig+0x11c>)
- 8007974: 4293 cmp r3, r2
- 8007976: d007 beq.n 8007988 <TIM_Base_SetConfig+0x40>
- 8007978: 687b ldr r3, [r7, #4]
- 800797a: 4a3b ldr r2, [pc, #236] ; (8007a68 <TIM_Base_SetConfig+0x120>)
- 800797c: 4293 cmp r3, r2
- 800797e: d003 beq.n 8007988 <TIM_Base_SetConfig+0x40>
- 8007980: 687b ldr r3, [r7, #4]
- 8007982: 4a3a ldr r2, [pc, #232] ; (8007a6c <TIM_Base_SetConfig+0x124>)
- 8007984: 4293 cmp r3, r2
- 8007986: d108 bne.n 800799a <TIM_Base_SetConfig+0x52>
- {
- /* Select the Counter Mode */
- tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
- 8007988: 68fb ldr r3, [r7, #12]
- 800798a: f023 0370 bic.w r3, r3, #112 ; 0x70
- 800798e: 60fb str r3, [r7, #12]
- tmpcr1 |= Structure->CounterMode;
- 8007990: 683b ldr r3, [r7, #0]
- 8007992: 685b ldr r3, [r3, #4]
- 8007994: 68fa ldr r2, [r7, #12]
- 8007996: 4313 orrs r3, r2
- 8007998: 60fb str r3, [r7, #12]
- }
-
- if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
- 800799a: 687b ldr r3, [r7, #4]
- 800799c: 4a2f ldr r2, [pc, #188] ; (8007a5c <TIM_Base_SetConfig+0x114>)
- 800799e: 4293 cmp r3, r2
- 80079a0: d02b beq.n 80079fa <TIM_Base_SetConfig+0xb2>
- 80079a2: 687b ldr r3, [r7, #4]
- 80079a4: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000
- 80079a8: d027 beq.n 80079fa <TIM_Base_SetConfig+0xb2>
- 80079aa: 687b ldr r3, [r7, #4]
- 80079ac: 4a2c ldr r2, [pc, #176] ; (8007a60 <TIM_Base_SetConfig+0x118>)
- 80079ae: 4293 cmp r3, r2
- 80079b0: d023 beq.n 80079fa <TIM_Base_SetConfig+0xb2>
- 80079b2: 687b ldr r3, [r7, #4]
- 80079b4: 4a2b ldr r2, [pc, #172] ; (8007a64 <TIM_Base_SetConfig+0x11c>)
- 80079b6: 4293 cmp r3, r2
- 80079b8: d01f beq.n 80079fa <TIM_Base_SetConfig+0xb2>
- 80079ba: 687b ldr r3, [r7, #4]
- 80079bc: 4a2a ldr r2, [pc, #168] ; (8007a68 <TIM_Base_SetConfig+0x120>)
- 80079be: 4293 cmp r3, r2
- 80079c0: d01b beq.n 80079fa <TIM_Base_SetConfig+0xb2>
- 80079c2: 687b ldr r3, [r7, #4]
- 80079c4: 4a29 ldr r2, [pc, #164] ; (8007a6c <TIM_Base_SetConfig+0x124>)
- 80079c6: 4293 cmp r3, r2
- 80079c8: d017 beq.n 80079fa <TIM_Base_SetConfig+0xb2>
- 80079ca: 687b ldr r3, [r7, #4]
- 80079cc: 4a28 ldr r2, [pc, #160] ; (8007a70 <TIM_Base_SetConfig+0x128>)
- 80079ce: 4293 cmp r3, r2
- 80079d0: d013 beq.n 80079fa <TIM_Base_SetConfig+0xb2>
- 80079d2: 687b ldr r3, [r7, #4]
- 80079d4: 4a27 ldr r2, [pc, #156] ; (8007a74 <TIM_Base_SetConfig+0x12c>)
- 80079d6: 4293 cmp r3, r2
- 80079d8: d00f beq.n 80079fa <TIM_Base_SetConfig+0xb2>
- 80079da: 687b ldr r3, [r7, #4]
- 80079dc: 4a26 ldr r2, [pc, #152] ; (8007a78 <TIM_Base_SetConfig+0x130>)
- 80079de: 4293 cmp r3, r2
- 80079e0: d00b beq.n 80079fa <TIM_Base_SetConfig+0xb2>
- 80079e2: 687b ldr r3, [r7, #4]
- 80079e4: 4a25 ldr r2, [pc, #148] ; (8007a7c <TIM_Base_SetConfig+0x134>)
- 80079e6: 4293 cmp r3, r2
- 80079e8: d007 beq.n 80079fa <TIM_Base_SetConfig+0xb2>
- 80079ea: 687b ldr r3, [r7, #4]
- 80079ec: 4a24 ldr r2, [pc, #144] ; (8007a80 <TIM_Base_SetConfig+0x138>)
- 80079ee: 4293 cmp r3, r2
- 80079f0: d003 beq.n 80079fa <TIM_Base_SetConfig+0xb2>
- 80079f2: 687b ldr r3, [r7, #4]
- 80079f4: 4a23 ldr r2, [pc, #140] ; (8007a84 <TIM_Base_SetConfig+0x13c>)
- 80079f6: 4293 cmp r3, r2
- 80079f8: d108 bne.n 8007a0c <TIM_Base_SetConfig+0xc4>
- {
- /* Set the clock division */
- tmpcr1 &= ~TIM_CR1_CKD;
- 80079fa: 68fb ldr r3, [r7, #12]
- 80079fc: f423 7340 bic.w r3, r3, #768 ; 0x300
- 8007a00: 60fb str r3, [r7, #12]
- tmpcr1 |= (uint32_t)Structure->ClockDivision;
- 8007a02: 683b ldr r3, [r7, #0]
- 8007a04: 68db ldr r3, [r3, #12]
- 8007a06: 68fa ldr r2, [r7, #12]
- 8007a08: 4313 orrs r3, r2
- 8007a0a: 60fb str r3, [r7, #12]
- }
-
- /* Set the auto-reload preload */
- MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload);
- 8007a0c: 68fb ldr r3, [r7, #12]
- 8007a0e: f023 0280 bic.w r2, r3, #128 ; 0x80
- 8007a12: 683b ldr r3, [r7, #0]
- 8007a14: 695b ldr r3, [r3, #20]
- 8007a16: 4313 orrs r3, r2
- 8007a18: 60fb str r3, [r7, #12]
-
- TIMx->CR1 = tmpcr1;
- 8007a1a: 687b ldr r3, [r7, #4]
- 8007a1c: 68fa ldr r2, [r7, #12]
- 8007a1e: 601a str r2, [r3, #0]
-
- /* Set the Autoreload value */
- TIMx->ARR = (uint32_t)Structure->Period ;
- 8007a20: 683b ldr r3, [r7, #0]
- 8007a22: 689a ldr r2, [r3, #8]
- 8007a24: 687b ldr r3, [r7, #4]
- 8007a26: 62da str r2, [r3, #44] ; 0x2c
-
- /* Set the Prescaler value */
- TIMx->PSC = Structure->Prescaler;
- 8007a28: 683b ldr r3, [r7, #0]
- 8007a2a: 681a ldr r2, [r3, #0]
- 8007a2c: 687b ldr r3, [r7, #4]
- 8007a2e: 629a str r2, [r3, #40] ; 0x28
-
- if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx))
- 8007a30: 687b ldr r3, [r7, #4]
- 8007a32: 4a0a ldr r2, [pc, #40] ; (8007a5c <TIM_Base_SetConfig+0x114>)
- 8007a34: 4293 cmp r3, r2
- 8007a36: d003 beq.n 8007a40 <TIM_Base_SetConfig+0xf8>
- 8007a38: 687b ldr r3, [r7, #4]
- 8007a3a: 4a0c ldr r2, [pc, #48] ; (8007a6c <TIM_Base_SetConfig+0x124>)
- 8007a3c: 4293 cmp r3, r2
- 8007a3e: d103 bne.n 8007a48 <TIM_Base_SetConfig+0x100>
- {
- /* Set the Repetition Counter value */
- TIMx->RCR = Structure->RepetitionCounter;
- 8007a40: 683b ldr r3, [r7, #0]
- 8007a42: 691a ldr r2, [r3, #16]
- 8007a44: 687b ldr r3, [r7, #4]
- 8007a46: 631a str r2, [r3, #48] ; 0x30
- }
-
- /* Generate an update event to reload the Prescaler
- and the repetition counter (only for advanced timer) value immediately */
- TIMx->EGR = TIM_EGR_UG;
- 8007a48: 687b ldr r3, [r7, #4]
- 8007a4a: 2201 movs r2, #1
- 8007a4c: 615a str r2, [r3, #20]
-}
- 8007a4e: bf00 nop
- 8007a50: 3714 adds r7, #20
- 8007a52: 46bd mov sp, r7
- 8007a54: f85d 7b04 ldr.w r7, [sp], #4
- 8007a58: 4770 bx lr
- 8007a5a: bf00 nop
- 8007a5c: 40010000 .word 0x40010000
- 8007a60: 40000400 .word 0x40000400
- 8007a64: 40000800 .word 0x40000800
- 8007a68: 40000c00 .word 0x40000c00
- 8007a6c: 40010400 .word 0x40010400
- 8007a70: 40014000 .word 0x40014000
- 8007a74: 40014400 .word 0x40014400
- 8007a78: 40014800 .word 0x40014800
- 8007a7c: 40001800 .word 0x40001800
- 8007a80: 40001c00 .word 0x40001c00
- 8007a84: 40002000 .word 0x40002000
-
-08007a88 <TIM_OC1_SetConfig>:
- * @param TIMx to select the TIM peripheral
- * @param OC_Config The ouput configuration structure
- * @retval None
- */
-static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
-{
- 8007a88: b480 push {r7}
- 8007a8a: b087 sub sp, #28
- 8007a8c: af00 add r7, sp, #0
- 8007a8e: 6078 str r0, [r7, #4]
- 8007a90: 6039 str r1, [r7, #0]
- uint32_t tmpccmrx;
- uint32_t tmpccer;
- uint32_t tmpcr2;
-
- /* Disable the Channel 1: Reset the CC1E Bit */
- TIMx->CCER &= ~TIM_CCER_CC1E;
- 8007a92: 687b ldr r3, [r7, #4]
- 8007a94: 6a1b ldr r3, [r3, #32]
- 8007a96: f023 0201 bic.w r2, r3, #1
- 8007a9a: 687b ldr r3, [r7, #4]
- 8007a9c: 621a str r2, [r3, #32]
-
- /* Get the TIMx CCER register value */
- tmpccer = TIMx->CCER;
- 8007a9e: 687b ldr r3, [r7, #4]
- 8007aa0: 6a1b ldr r3, [r3, #32]
- 8007aa2: 617b str r3, [r7, #20]
- /* Get the TIMx CR2 register value */
- tmpcr2 = TIMx->CR2;
- 8007aa4: 687b ldr r3, [r7, #4]
- 8007aa6: 685b ldr r3, [r3, #4]
- 8007aa8: 613b str r3, [r7, #16]
-
- /* Get the TIMx CCMR1 register value */
- tmpccmrx = TIMx->CCMR1;
- 8007aaa: 687b ldr r3, [r7, #4]
- 8007aac: 699b ldr r3, [r3, #24]
- 8007aae: 60fb str r3, [r7, #12]
-
- /* Reset the Output Compare Mode Bits */
- tmpccmrx &= ~TIM_CCMR1_OC1M;
- 8007ab0: 68fa ldr r2, [r7, #12]
- 8007ab2: 4b2b ldr r3, [pc, #172] ; (8007b60 <TIM_OC1_SetConfig+0xd8>)
- 8007ab4: 4013 ands r3, r2
- 8007ab6: 60fb str r3, [r7, #12]
- tmpccmrx &= ~TIM_CCMR1_CC1S;
- 8007ab8: 68fb ldr r3, [r7, #12]
- 8007aba: f023 0303 bic.w r3, r3, #3
- 8007abe: 60fb str r3, [r7, #12]
- /* Select the Output Compare Mode */
- tmpccmrx |= OC_Config->OCMode;
- 8007ac0: 683b ldr r3, [r7, #0]
- 8007ac2: 681b ldr r3, [r3, #0]
- 8007ac4: 68fa ldr r2, [r7, #12]
- 8007ac6: 4313 orrs r3, r2
- 8007ac8: 60fb str r3, [r7, #12]
-
- /* Reset the Output Polarity level */
- tmpccer &= ~TIM_CCER_CC1P;
- 8007aca: 697b ldr r3, [r7, #20]
- 8007acc: f023 0302 bic.w r3, r3, #2
- 8007ad0: 617b str r3, [r7, #20]
- /* Set the Output Compare Polarity */
- tmpccer |= OC_Config->OCPolarity;
- 8007ad2: 683b ldr r3, [r7, #0]
- 8007ad4: 689b ldr r3, [r3, #8]
- 8007ad6: 697a ldr r2, [r7, #20]
- 8007ad8: 4313 orrs r3, r2
- 8007ada: 617b str r3, [r7, #20]
-
- if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_1))
- 8007adc: 687b ldr r3, [r7, #4]
- 8007ade: 4a21 ldr r2, [pc, #132] ; (8007b64 <TIM_OC1_SetConfig+0xdc>)
- 8007ae0: 4293 cmp r3, r2
- 8007ae2: d003 beq.n 8007aec <TIM_OC1_SetConfig+0x64>
- 8007ae4: 687b ldr r3, [r7, #4]
- 8007ae6: 4a20 ldr r2, [pc, #128] ; (8007b68 <TIM_OC1_SetConfig+0xe0>)
- 8007ae8: 4293 cmp r3, r2
- 8007aea: d10c bne.n 8007b06 <TIM_OC1_SetConfig+0x7e>
- {
- /* Check parameters */
- assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
-
- /* Reset the Output N Polarity level */
- tmpccer &= ~TIM_CCER_CC1NP;
- 8007aec: 697b ldr r3, [r7, #20]
- 8007aee: f023 0308 bic.w r3, r3, #8
- 8007af2: 617b str r3, [r7, #20]
- /* Set the Output N Polarity */
- tmpccer |= OC_Config->OCNPolarity;
- 8007af4: 683b ldr r3, [r7, #0]
- 8007af6: 68db ldr r3, [r3, #12]
- 8007af8: 697a ldr r2, [r7, #20]
- 8007afa: 4313 orrs r3, r2
- 8007afc: 617b str r3, [r7, #20]
- /* Reset the Output N State */
- tmpccer &= ~TIM_CCER_CC1NE;
- 8007afe: 697b ldr r3, [r7, #20]
- 8007b00: f023 0304 bic.w r3, r3, #4
- 8007b04: 617b str r3, [r7, #20]
- }
-
- if (IS_TIM_BREAK_INSTANCE(TIMx))
- 8007b06: 687b ldr r3, [r7, #4]
- 8007b08: 4a16 ldr r2, [pc, #88] ; (8007b64 <TIM_OC1_SetConfig+0xdc>)
- 8007b0a: 4293 cmp r3, r2
- 8007b0c: d003 beq.n 8007b16 <TIM_OC1_SetConfig+0x8e>
- 8007b0e: 687b ldr r3, [r7, #4]
- 8007b10: 4a15 ldr r2, [pc, #84] ; (8007b68 <TIM_OC1_SetConfig+0xe0>)
- 8007b12: 4293 cmp r3, r2
- 8007b14: d111 bne.n 8007b3a <TIM_OC1_SetConfig+0xb2>
- /* Check parameters */
- assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
- assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
-
- /* Reset the Output Compare and Output Compare N IDLE State */
- tmpcr2 &= ~TIM_CR2_OIS1;
- 8007b16: 693b ldr r3, [r7, #16]
- 8007b18: f423 7380 bic.w r3, r3, #256 ; 0x100
- 8007b1c: 613b str r3, [r7, #16]
- tmpcr2 &= ~TIM_CR2_OIS1N;
- 8007b1e: 693b ldr r3, [r7, #16]
- 8007b20: f423 7300 bic.w r3, r3, #512 ; 0x200
- 8007b24: 613b str r3, [r7, #16]
- /* Set the Output Idle state */
- tmpcr2 |= OC_Config->OCIdleState;
- 8007b26: 683b ldr r3, [r7, #0]
- 8007b28: 695b ldr r3, [r3, #20]
- 8007b2a: 693a ldr r2, [r7, #16]
- 8007b2c: 4313 orrs r3, r2
- 8007b2e: 613b str r3, [r7, #16]
- /* Set the Output N Idle state */
- tmpcr2 |= OC_Config->OCNIdleState;
- 8007b30: 683b ldr r3, [r7, #0]
- 8007b32: 699b ldr r3, [r3, #24]
- 8007b34: 693a ldr r2, [r7, #16]
- 8007b36: 4313 orrs r3, r2
- 8007b38: 613b str r3, [r7, #16]
- }
-
- /* Write to TIMx CR2 */
- TIMx->CR2 = tmpcr2;
- 8007b3a: 687b ldr r3, [r7, #4]
- 8007b3c: 693a ldr r2, [r7, #16]
- 8007b3e: 605a str r2, [r3, #4]
-
- /* Write to TIMx CCMR1 */
- TIMx->CCMR1 = tmpccmrx;
- 8007b40: 687b ldr r3, [r7, #4]
- 8007b42: 68fa ldr r2, [r7, #12]
- 8007b44: 619a str r2, [r3, #24]
-
- /* Set the Capture Compare Register value */
- TIMx->CCR1 = OC_Config->Pulse;
- 8007b46: 683b ldr r3, [r7, #0]
- 8007b48: 685a ldr r2, [r3, #4]
- 8007b4a: 687b ldr r3, [r7, #4]
- 8007b4c: 635a str r2, [r3, #52] ; 0x34
-
- /* Write to TIMx CCER */
- TIMx->CCER = tmpccer;
- 8007b4e: 687b ldr r3, [r7, #4]
- 8007b50: 697a ldr r2, [r7, #20]
- 8007b52: 621a str r2, [r3, #32]
-}
- 8007b54: bf00 nop
- 8007b56: 371c adds r7, #28
- 8007b58: 46bd mov sp, r7
- 8007b5a: f85d 7b04 ldr.w r7, [sp], #4
- 8007b5e: 4770 bx lr
- 8007b60: fffeff8f .word 0xfffeff8f
- 8007b64: 40010000 .word 0x40010000
- 8007b68: 40010400 .word 0x40010400
-
-08007b6c <TIM_OC2_SetConfig>:
- * @param TIMx to select the TIM peripheral
- * @param OC_Config The ouput configuration structure
- * @retval None
- */
-void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
-{
- 8007b6c: b480 push {r7}
- 8007b6e: b087 sub sp, #28
- 8007b70: af00 add r7, sp, #0
- 8007b72: 6078 str r0, [r7, #4]
- 8007b74: 6039 str r1, [r7, #0]
- uint32_t tmpccmrx;
- uint32_t tmpccer;
- uint32_t tmpcr2;
-
- /* Disable the Channel 2: Reset the CC2E Bit */
- TIMx->CCER &= ~TIM_CCER_CC2E;
- 8007b76: 687b ldr r3, [r7, #4]
- 8007b78: 6a1b ldr r3, [r3, #32]
- 8007b7a: f023 0210 bic.w r2, r3, #16
- 8007b7e: 687b ldr r3, [r7, #4]
- 8007b80: 621a str r2, [r3, #32]
-
- /* Get the TIMx CCER register value */
- tmpccer = TIMx->CCER;
- 8007b82: 687b ldr r3, [r7, #4]
- 8007b84: 6a1b ldr r3, [r3, #32]
- 8007b86: 617b str r3, [r7, #20]
- /* Get the TIMx CR2 register value */
- tmpcr2 = TIMx->CR2;
- 8007b88: 687b ldr r3, [r7, #4]
- 8007b8a: 685b ldr r3, [r3, #4]
- 8007b8c: 613b str r3, [r7, #16]
-
- /* Get the TIMx CCMR1 register value */
- tmpccmrx = TIMx->CCMR1;
- 8007b8e: 687b ldr r3, [r7, #4]
- 8007b90: 699b ldr r3, [r3, #24]
- 8007b92: 60fb str r3, [r7, #12]
-
- /* Reset the Output Compare mode and Capture/Compare selection Bits */
- tmpccmrx &= ~TIM_CCMR1_OC2M;
- 8007b94: 68fa ldr r2, [r7, #12]
- 8007b96: 4b2e ldr r3, [pc, #184] ; (8007c50 <TIM_OC2_SetConfig+0xe4>)
- 8007b98: 4013 ands r3, r2
- 8007b9a: 60fb str r3, [r7, #12]
- tmpccmrx &= ~TIM_CCMR1_CC2S;
- 8007b9c: 68fb ldr r3, [r7, #12]
- 8007b9e: f423 7340 bic.w r3, r3, #768 ; 0x300
- 8007ba2: 60fb str r3, [r7, #12]
-
- /* Select the Output Compare Mode */
- tmpccmrx |= (OC_Config->OCMode << 8U);
- 8007ba4: 683b ldr r3, [r7, #0]
- 8007ba6: 681b ldr r3, [r3, #0]
- 8007ba8: 021b lsls r3, r3, #8
- 8007baa: 68fa ldr r2, [r7, #12]
- 8007bac: 4313 orrs r3, r2
- 8007bae: 60fb str r3, [r7, #12]
-
- /* Reset the Output Polarity level */
- tmpccer &= ~TIM_CCER_CC2P;
- 8007bb0: 697b ldr r3, [r7, #20]
- 8007bb2: f023 0320 bic.w r3, r3, #32
- 8007bb6: 617b str r3, [r7, #20]
- /* Set the Output Compare Polarity */
- tmpccer |= (OC_Config->OCPolarity << 4U);
- 8007bb8: 683b ldr r3, [r7, #0]
- 8007bba: 689b ldr r3, [r3, #8]
- 8007bbc: 011b lsls r3, r3, #4
- 8007bbe: 697a ldr r2, [r7, #20]
- 8007bc0: 4313 orrs r3, r2
- 8007bc2: 617b str r3, [r7, #20]
-
- if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_2))
- 8007bc4: 687b ldr r3, [r7, #4]
- 8007bc6: 4a23 ldr r2, [pc, #140] ; (8007c54 <TIM_OC2_SetConfig+0xe8>)
- 8007bc8: 4293 cmp r3, r2
- 8007bca: d003 beq.n 8007bd4 <TIM_OC2_SetConfig+0x68>
- 8007bcc: 687b ldr r3, [r7, #4]
- 8007bce: 4a22 ldr r2, [pc, #136] ; (8007c58 <TIM_OC2_SetConfig+0xec>)
- 8007bd0: 4293 cmp r3, r2
- 8007bd2: d10d bne.n 8007bf0 <TIM_OC2_SetConfig+0x84>
- {
- assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
-
- /* Reset the Output N Polarity level */
- tmpccer &= ~TIM_CCER_CC2NP;
- 8007bd4: 697b ldr r3, [r7, #20]
- 8007bd6: f023 0380 bic.w r3, r3, #128 ; 0x80
- 8007bda: 617b str r3, [r7, #20]
- /* Set the Output N Polarity */
- tmpccer |= (OC_Config->OCNPolarity << 4U);
- 8007bdc: 683b ldr r3, [r7, #0]
- 8007bde: 68db ldr r3, [r3, #12]
- 8007be0: 011b lsls r3, r3, #4
- 8007be2: 697a ldr r2, [r7, #20]
- 8007be4: 4313 orrs r3, r2
- 8007be6: 617b str r3, [r7, #20]
- /* Reset the Output N State */
- tmpccer &= ~TIM_CCER_CC2NE;
- 8007be8: 697b ldr r3, [r7, #20]
- 8007bea: f023 0340 bic.w r3, r3, #64 ; 0x40
- 8007bee: 617b str r3, [r7, #20]
-
- }
-
- if (IS_TIM_BREAK_INSTANCE(TIMx))
- 8007bf0: 687b ldr r3, [r7, #4]
- 8007bf2: 4a18 ldr r2, [pc, #96] ; (8007c54 <TIM_OC2_SetConfig+0xe8>)
- 8007bf4: 4293 cmp r3, r2
- 8007bf6: d003 beq.n 8007c00 <TIM_OC2_SetConfig+0x94>
- 8007bf8: 687b ldr r3, [r7, #4]
- 8007bfa: 4a17 ldr r2, [pc, #92] ; (8007c58 <TIM_OC2_SetConfig+0xec>)
- 8007bfc: 4293 cmp r3, r2
- 8007bfe: d113 bne.n 8007c28 <TIM_OC2_SetConfig+0xbc>
- /* Check parameters */
- assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
- assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
-
- /* Reset the Output Compare and Output Compare N IDLE State */
- tmpcr2 &= ~TIM_CR2_OIS2;
- 8007c00: 693b ldr r3, [r7, #16]
- 8007c02: f423 6380 bic.w r3, r3, #1024 ; 0x400
- 8007c06: 613b str r3, [r7, #16]
- tmpcr2 &= ~TIM_CR2_OIS2N;
- 8007c08: 693b ldr r3, [r7, #16]
- 8007c0a: f423 6300 bic.w r3, r3, #2048 ; 0x800
- 8007c0e: 613b str r3, [r7, #16]
- /* Set the Output Idle state */
- tmpcr2 |= (OC_Config->OCIdleState << 2U);
- 8007c10: 683b ldr r3, [r7, #0]
- 8007c12: 695b ldr r3, [r3, #20]
- 8007c14: 009b lsls r3, r3, #2
- 8007c16: 693a ldr r2, [r7, #16]
- 8007c18: 4313 orrs r3, r2
- 8007c1a: 613b str r3, [r7, #16]
- /* Set the Output N Idle state */
- tmpcr2 |= (OC_Config->OCNIdleState << 2U);
- 8007c1c: 683b ldr r3, [r7, #0]
- 8007c1e: 699b ldr r3, [r3, #24]
- 8007c20: 009b lsls r3, r3, #2
- 8007c22: 693a ldr r2, [r7, #16]
- 8007c24: 4313 orrs r3, r2
- 8007c26: 613b str r3, [r7, #16]
- }
-
- /* Write to TIMx CR2 */
- TIMx->CR2 = tmpcr2;
- 8007c28: 687b ldr r3, [r7, #4]
- 8007c2a: 693a ldr r2, [r7, #16]
- 8007c2c: 605a str r2, [r3, #4]
-
- /* Write to TIMx CCMR1 */
- TIMx->CCMR1 = tmpccmrx;
- 8007c2e: 687b ldr r3, [r7, #4]
- 8007c30: 68fa ldr r2, [r7, #12]
- 8007c32: 619a str r2, [r3, #24]
-
- /* Set the Capture Compare Register value */
- TIMx->CCR2 = OC_Config->Pulse;
- 8007c34: 683b ldr r3, [r7, #0]
- 8007c36: 685a ldr r2, [r3, #4]
- 8007c38: 687b ldr r3, [r7, #4]
- 8007c3a: 639a str r2, [r3, #56] ; 0x38
-
- /* Write to TIMx CCER */
- TIMx->CCER = tmpccer;
- 8007c3c: 687b ldr r3, [r7, #4]
- 8007c3e: 697a ldr r2, [r7, #20]
- 8007c40: 621a str r2, [r3, #32]
-}
- 8007c42: bf00 nop
- 8007c44: 371c adds r7, #28
- 8007c46: 46bd mov sp, r7
- 8007c48: f85d 7b04 ldr.w r7, [sp], #4
- 8007c4c: 4770 bx lr
- 8007c4e: bf00 nop
- 8007c50: feff8fff .word 0xfeff8fff
- 8007c54: 40010000 .word 0x40010000
- 8007c58: 40010400 .word 0x40010400
-
-08007c5c <TIM_OC3_SetConfig>:
- * @param TIMx to select the TIM peripheral
- * @param OC_Config The ouput configuration structure
- * @retval None
- */
-static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
-{
- 8007c5c: b480 push {r7}
- 8007c5e: b087 sub sp, #28
- 8007c60: af00 add r7, sp, #0
- 8007c62: 6078 str r0, [r7, #4]
- 8007c64: 6039 str r1, [r7, #0]
- uint32_t tmpccmrx;
- uint32_t tmpccer;
- uint32_t tmpcr2;
-
- /* Disable the Channel 3: Reset the CC2E Bit */
- TIMx->CCER &= ~TIM_CCER_CC3E;
- 8007c66: 687b ldr r3, [r7, #4]
- 8007c68: 6a1b ldr r3, [r3, #32]
- 8007c6a: f423 7280 bic.w r2, r3, #256 ; 0x100
- 8007c6e: 687b ldr r3, [r7, #4]
- 8007c70: 621a str r2, [r3, #32]
-
- /* Get the TIMx CCER register value */
- tmpccer = TIMx->CCER;
- 8007c72: 687b ldr r3, [r7, #4]
- 8007c74: 6a1b ldr r3, [r3, #32]
- 8007c76: 617b str r3, [r7, #20]
- /* Get the TIMx CR2 register value */
- tmpcr2 = TIMx->CR2;
- 8007c78: 687b ldr r3, [r7, #4]
- 8007c7a: 685b ldr r3, [r3, #4]
- 8007c7c: 613b str r3, [r7, #16]
-
- /* Get the TIMx CCMR2 register value */
- tmpccmrx = TIMx->CCMR2;
- 8007c7e: 687b ldr r3, [r7, #4]
- 8007c80: 69db ldr r3, [r3, #28]
- 8007c82: 60fb str r3, [r7, #12]
-
- /* Reset the Output Compare mode and Capture/Compare selection Bits */
- tmpccmrx &= ~TIM_CCMR2_OC3M;
- 8007c84: 68fa ldr r2, [r7, #12]
- 8007c86: 4b2d ldr r3, [pc, #180] ; (8007d3c <TIM_OC3_SetConfig+0xe0>)
- 8007c88: 4013 ands r3, r2
- 8007c8a: 60fb str r3, [r7, #12]
- tmpccmrx &= ~TIM_CCMR2_CC3S;
- 8007c8c: 68fb ldr r3, [r7, #12]
- 8007c8e: f023 0303 bic.w r3, r3, #3
- 8007c92: 60fb str r3, [r7, #12]
- /* Select the Output Compare Mode */
- tmpccmrx |= OC_Config->OCMode;
- 8007c94: 683b ldr r3, [r7, #0]
- 8007c96: 681b ldr r3, [r3, #0]
- 8007c98: 68fa ldr r2, [r7, #12]
- 8007c9a: 4313 orrs r3, r2
- 8007c9c: 60fb str r3, [r7, #12]
-
- /* Reset the Output Polarity level */
- tmpccer &= ~TIM_CCER_CC3P;
- 8007c9e: 697b ldr r3, [r7, #20]
- 8007ca0: f423 7300 bic.w r3, r3, #512 ; 0x200
- 8007ca4: 617b str r3, [r7, #20]
- /* Set the Output Compare Polarity */
- tmpccer |= (OC_Config->OCPolarity << 8U);
- 8007ca6: 683b ldr r3, [r7, #0]
- 8007ca8: 689b ldr r3, [r3, #8]
- 8007caa: 021b lsls r3, r3, #8
- 8007cac: 697a ldr r2, [r7, #20]
- 8007cae: 4313 orrs r3, r2
- 8007cb0: 617b str r3, [r7, #20]
-
- if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_3))
- 8007cb2: 687b ldr r3, [r7, #4]
- 8007cb4: 4a22 ldr r2, [pc, #136] ; (8007d40 <TIM_OC3_SetConfig+0xe4>)
- 8007cb6: 4293 cmp r3, r2
- 8007cb8: d003 beq.n 8007cc2 <TIM_OC3_SetConfig+0x66>
- 8007cba: 687b ldr r3, [r7, #4]
- 8007cbc: 4a21 ldr r2, [pc, #132] ; (8007d44 <TIM_OC3_SetConfig+0xe8>)
- 8007cbe: 4293 cmp r3, r2
- 8007cc0: d10d bne.n 8007cde <TIM_OC3_SetConfig+0x82>
- {
- assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
-
- /* Reset the Output N Polarity level */
- tmpccer &= ~TIM_CCER_CC3NP;
- 8007cc2: 697b ldr r3, [r7, #20]
- 8007cc4: f423 6300 bic.w r3, r3, #2048 ; 0x800
- 8007cc8: 617b str r3, [r7, #20]
- /* Set the Output N Polarity */
- tmpccer |= (OC_Config->OCNPolarity << 8U);
- 8007cca: 683b ldr r3, [r7, #0]
- 8007ccc: 68db ldr r3, [r3, #12]
- 8007cce: 021b lsls r3, r3, #8
- 8007cd0: 697a ldr r2, [r7, #20]
- 8007cd2: 4313 orrs r3, r2
- 8007cd4: 617b str r3, [r7, #20]
- /* Reset the Output N State */
- tmpccer &= ~TIM_CCER_CC3NE;
- 8007cd6: 697b ldr r3, [r7, #20]
- 8007cd8: f423 6380 bic.w r3, r3, #1024 ; 0x400
- 8007cdc: 617b str r3, [r7, #20]
- }
-
- if (IS_TIM_BREAK_INSTANCE(TIMx))
- 8007cde: 687b ldr r3, [r7, #4]
- 8007ce0: 4a17 ldr r2, [pc, #92] ; (8007d40 <TIM_OC3_SetConfig+0xe4>)
- 8007ce2: 4293 cmp r3, r2
- 8007ce4: d003 beq.n 8007cee <TIM_OC3_SetConfig+0x92>
- 8007ce6: 687b ldr r3, [r7, #4]
- 8007ce8: 4a16 ldr r2, [pc, #88] ; (8007d44 <TIM_OC3_SetConfig+0xe8>)
- 8007cea: 4293 cmp r3, r2
- 8007cec: d113 bne.n 8007d16 <TIM_OC3_SetConfig+0xba>
- /* Check parameters */
- assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
- assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
-
- /* Reset the Output Compare and Output Compare N IDLE State */
- tmpcr2 &= ~TIM_CR2_OIS3;
- 8007cee: 693b ldr r3, [r7, #16]
- 8007cf0: f423 5380 bic.w r3, r3, #4096 ; 0x1000
- 8007cf4: 613b str r3, [r7, #16]
- tmpcr2 &= ~TIM_CR2_OIS3N;
- 8007cf6: 693b ldr r3, [r7, #16]
- 8007cf8: f423 5300 bic.w r3, r3, #8192 ; 0x2000
- 8007cfc: 613b str r3, [r7, #16]
- /* Set the Output Idle state */
- tmpcr2 |= (OC_Config->OCIdleState << 4U);
- 8007cfe: 683b ldr r3, [r7, #0]
- 8007d00: 695b ldr r3, [r3, #20]
- 8007d02: 011b lsls r3, r3, #4
- 8007d04: 693a ldr r2, [r7, #16]
- 8007d06: 4313 orrs r3, r2
- 8007d08: 613b str r3, [r7, #16]
- /* Set the Output N Idle state */
- tmpcr2 |= (OC_Config->OCNIdleState << 4U);
- 8007d0a: 683b ldr r3, [r7, #0]
- 8007d0c: 699b ldr r3, [r3, #24]
- 8007d0e: 011b lsls r3, r3, #4
- 8007d10: 693a ldr r2, [r7, #16]
- 8007d12: 4313 orrs r3, r2
- 8007d14: 613b str r3, [r7, #16]
- }
-
- /* Write to TIMx CR2 */
- TIMx->CR2 = tmpcr2;
- 8007d16: 687b ldr r3, [r7, #4]
- 8007d18: 693a ldr r2, [r7, #16]
- 8007d1a: 605a str r2, [r3, #4]
-
- /* Write to TIMx CCMR2 */
- TIMx->CCMR2 = tmpccmrx;
- 8007d1c: 687b ldr r3, [r7, #4]
- 8007d1e: 68fa ldr r2, [r7, #12]
- 8007d20: 61da str r2, [r3, #28]
-
- /* Set the Capture Compare Register value */
- TIMx->CCR3 = OC_Config->Pulse;
- 8007d22: 683b ldr r3, [r7, #0]
- 8007d24: 685a ldr r2, [r3, #4]
- 8007d26: 687b ldr r3, [r7, #4]
- 8007d28: 63da str r2, [r3, #60] ; 0x3c
-
- /* Write to TIMx CCER */
- TIMx->CCER = tmpccer;
- 8007d2a: 687b ldr r3, [r7, #4]
- 8007d2c: 697a ldr r2, [r7, #20]
- 8007d2e: 621a str r2, [r3, #32]
-}
- 8007d30: bf00 nop
- 8007d32: 371c adds r7, #28
- 8007d34: 46bd mov sp, r7
- 8007d36: f85d 7b04 ldr.w r7, [sp], #4
- 8007d3a: 4770 bx lr
- 8007d3c: fffeff8f .word 0xfffeff8f
- 8007d40: 40010000 .word 0x40010000
- 8007d44: 40010400 .word 0x40010400
-
-08007d48 <TIM_OC4_SetConfig>:
- * @param TIMx to select the TIM peripheral
- * @param OC_Config The ouput configuration structure
- * @retval None
- */
-static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
-{
- 8007d48: b480 push {r7}
- 8007d4a: b087 sub sp, #28
- 8007d4c: af00 add r7, sp, #0
- 8007d4e: 6078 str r0, [r7, #4]
- 8007d50: 6039 str r1, [r7, #0]
- uint32_t tmpccmrx;
- uint32_t tmpccer;
- uint32_t tmpcr2;
-
- /* Disable the Channel 4: Reset the CC4E Bit */
- TIMx->CCER &= ~TIM_CCER_CC4E;
- 8007d52: 687b ldr r3, [r7, #4]
- 8007d54: 6a1b ldr r3, [r3, #32]
- 8007d56: f423 5280 bic.w r2, r3, #4096 ; 0x1000
- 8007d5a: 687b ldr r3, [r7, #4]
- 8007d5c: 621a str r2, [r3, #32]
-
- /* Get the TIMx CCER register value */
- tmpccer = TIMx->CCER;
- 8007d5e: 687b ldr r3, [r7, #4]
- 8007d60: 6a1b ldr r3, [r3, #32]
- 8007d62: 613b str r3, [r7, #16]
- /* Get the TIMx CR2 register value */
- tmpcr2 = TIMx->CR2;
- 8007d64: 687b ldr r3, [r7, #4]
- 8007d66: 685b ldr r3, [r3, #4]
- 8007d68: 617b str r3, [r7, #20]
-
- /* Get the TIMx CCMR2 register value */
- tmpccmrx = TIMx->CCMR2;
- 8007d6a: 687b ldr r3, [r7, #4]
- 8007d6c: 69db ldr r3, [r3, #28]
- 8007d6e: 60fb str r3, [r7, #12]
-
- /* Reset the Output Compare mode and Capture/Compare selection Bits */
- tmpccmrx &= ~TIM_CCMR2_OC4M;
- 8007d70: 68fa ldr r2, [r7, #12]
- 8007d72: 4b1e ldr r3, [pc, #120] ; (8007dec <TIM_OC4_SetConfig+0xa4>)
- 8007d74: 4013 ands r3, r2
- 8007d76: 60fb str r3, [r7, #12]
- tmpccmrx &= ~TIM_CCMR2_CC4S;
- 8007d78: 68fb ldr r3, [r7, #12]
- 8007d7a: f423 7340 bic.w r3, r3, #768 ; 0x300
- 8007d7e: 60fb str r3, [r7, #12]
-
- /* Select the Output Compare Mode */
- tmpccmrx |= (OC_Config->OCMode << 8U);
- 8007d80: 683b ldr r3, [r7, #0]
- 8007d82: 681b ldr r3, [r3, #0]
- 8007d84: 021b lsls r3, r3, #8
- 8007d86: 68fa ldr r2, [r7, #12]
- 8007d88: 4313 orrs r3, r2
- 8007d8a: 60fb str r3, [r7, #12]
-
- /* Reset the Output Polarity level */
- tmpccer &= ~TIM_CCER_CC4P;
- 8007d8c: 693b ldr r3, [r7, #16]
- 8007d8e: f423 5300 bic.w r3, r3, #8192 ; 0x2000
- 8007d92: 613b str r3, [r7, #16]
- /* Set the Output Compare Polarity */
- tmpccer |= (OC_Config->OCPolarity << 12U);
- 8007d94: 683b ldr r3, [r7, #0]
- 8007d96: 689b ldr r3, [r3, #8]
- 8007d98: 031b lsls r3, r3, #12
- 8007d9a: 693a ldr r2, [r7, #16]
- 8007d9c: 4313 orrs r3, r2
- 8007d9e: 613b str r3, [r7, #16]
-
- if (IS_TIM_BREAK_INSTANCE(TIMx))
- 8007da0: 687b ldr r3, [r7, #4]
- 8007da2: 4a13 ldr r2, [pc, #76] ; (8007df0 <TIM_OC4_SetConfig+0xa8>)
- 8007da4: 4293 cmp r3, r2
- 8007da6: d003 beq.n 8007db0 <TIM_OC4_SetConfig+0x68>
- 8007da8: 687b ldr r3, [r7, #4]
- 8007daa: 4a12 ldr r2, [pc, #72] ; (8007df4 <TIM_OC4_SetConfig+0xac>)
- 8007dac: 4293 cmp r3, r2
- 8007dae: d109 bne.n 8007dc4 <TIM_OC4_SetConfig+0x7c>
- {
- /* Check parameters */
- assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
-
- /* Reset the Output Compare IDLE State */
- tmpcr2 &= ~TIM_CR2_OIS4;
- 8007db0: 697b ldr r3, [r7, #20]
- 8007db2: f423 4380 bic.w r3, r3, #16384 ; 0x4000
- 8007db6: 617b str r3, [r7, #20]
-
- /* Set the Output Idle state */
- tmpcr2 |= (OC_Config->OCIdleState << 6U);
- 8007db8: 683b ldr r3, [r7, #0]
- 8007dba: 695b ldr r3, [r3, #20]
- 8007dbc: 019b lsls r3, r3, #6
- 8007dbe: 697a ldr r2, [r7, #20]
- 8007dc0: 4313 orrs r3, r2
- 8007dc2: 617b str r3, [r7, #20]
- }
-
- /* Write to TIMx CR2 */
- TIMx->CR2 = tmpcr2;
- 8007dc4: 687b ldr r3, [r7, #4]
- 8007dc6: 697a ldr r2, [r7, #20]
- 8007dc8: 605a str r2, [r3, #4]
-
- /* Write to TIMx CCMR2 */
- TIMx->CCMR2 = tmpccmrx;
- 8007dca: 687b ldr r3, [r7, #4]
- 8007dcc: 68fa ldr r2, [r7, #12]
- 8007dce: 61da str r2, [r3, #28]
-
- /* Set the Capture Compare Register value */
- TIMx->CCR4 = OC_Config->Pulse;
- 8007dd0: 683b ldr r3, [r7, #0]
- 8007dd2: 685a ldr r2, [r3, #4]
- 8007dd4: 687b ldr r3, [r7, #4]
- 8007dd6: 641a str r2, [r3, #64] ; 0x40
-
- /* Write to TIMx CCER */
- TIMx->CCER = tmpccer;
- 8007dd8: 687b ldr r3, [r7, #4]
- 8007dda: 693a ldr r2, [r7, #16]
- 8007ddc: 621a str r2, [r3, #32]
-}
- 8007dde: bf00 nop
- 8007de0: 371c adds r7, #28
- 8007de2: 46bd mov sp, r7
- 8007de4: f85d 7b04 ldr.w r7, [sp], #4
- 8007de8: 4770 bx lr
- 8007dea: bf00 nop
- 8007dec: feff8fff .word 0xfeff8fff
- 8007df0: 40010000 .word 0x40010000
- 8007df4: 40010400 .word 0x40010400
-
-08007df8 <TIM_OC5_SetConfig>:
- * @param OC_Config The ouput configuration structure
- * @retval None
- */
-static void TIM_OC5_SetConfig(TIM_TypeDef *TIMx,
- TIM_OC_InitTypeDef *OC_Config)
-{
- 8007df8: b480 push {r7}
- 8007dfa: b087 sub sp, #28
- 8007dfc: af00 add r7, sp, #0
- 8007dfe: 6078 str r0, [r7, #4]
- 8007e00: 6039 str r1, [r7, #0]
- uint32_t tmpccmrx;
- uint32_t tmpccer;
- uint32_t tmpcr2;
-
- /* Disable the output: Reset the CCxE Bit */
- TIMx->CCER &= ~TIM_CCER_CC5E;
- 8007e02: 687b ldr r3, [r7, #4]
- 8007e04: 6a1b ldr r3, [r3, #32]
- 8007e06: f423 3280 bic.w r2, r3, #65536 ; 0x10000
- 8007e0a: 687b ldr r3, [r7, #4]
- 8007e0c: 621a str r2, [r3, #32]
-
- /* Get the TIMx CCER register value */
- tmpccer = TIMx->CCER;
- 8007e0e: 687b ldr r3, [r7, #4]
- 8007e10: 6a1b ldr r3, [r3, #32]
- 8007e12: 613b str r3, [r7, #16]
- /* Get the TIMx CR2 register value */
- tmpcr2 = TIMx->CR2;
- 8007e14: 687b ldr r3, [r7, #4]
- 8007e16: 685b ldr r3, [r3, #4]
- 8007e18: 617b str r3, [r7, #20]
- /* Get the TIMx CCMR1 register value */
- tmpccmrx = TIMx->CCMR3;
- 8007e1a: 687b ldr r3, [r7, #4]
- 8007e1c: 6d5b ldr r3, [r3, #84] ; 0x54
- 8007e1e: 60fb str r3, [r7, #12]
-
- /* Reset the Output Compare Mode Bits */
- tmpccmrx &= ~(TIM_CCMR3_OC5M);
- 8007e20: 68fa ldr r2, [r7, #12]
- 8007e22: 4b1b ldr r3, [pc, #108] ; (8007e90 <TIM_OC5_SetConfig+0x98>)
- 8007e24: 4013 ands r3, r2
- 8007e26: 60fb str r3, [r7, #12]
- /* Select the Output Compare Mode */
- tmpccmrx |= OC_Config->OCMode;
- 8007e28: 683b ldr r3, [r7, #0]
- 8007e2a: 681b ldr r3, [r3, #0]
- 8007e2c: 68fa ldr r2, [r7, #12]
- 8007e2e: 4313 orrs r3, r2
- 8007e30: 60fb str r3, [r7, #12]
-
- /* Reset the Output Polarity level */
- tmpccer &= ~TIM_CCER_CC5P;
- 8007e32: 693b ldr r3, [r7, #16]
- 8007e34: f423 3300 bic.w r3, r3, #131072 ; 0x20000
- 8007e38: 613b str r3, [r7, #16]
- /* Set the Output Compare Polarity */
- tmpccer |= (OC_Config->OCPolarity << 16U);
- 8007e3a: 683b ldr r3, [r7, #0]
- 8007e3c: 689b ldr r3, [r3, #8]
- 8007e3e: 041b lsls r3, r3, #16
- 8007e40: 693a ldr r2, [r7, #16]
- 8007e42: 4313 orrs r3, r2
- 8007e44: 613b str r3, [r7, #16]
-
- if (IS_TIM_BREAK_INSTANCE(TIMx))
- 8007e46: 687b ldr r3, [r7, #4]
- 8007e48: 4a12 ldr r2, [pc, #72] ; (8007e94 <TIM_OC5_SetConfig+0x9c>)
- 8007e4a: 4293 cmp r3, r2
- 8007e4c: d003 beq.n 8007e56 <TIM_OC5_SetConfig+0x5e>
- 8007e4e: 687b ldr r3, [r7, #4]
- 8007e50: 4a11 ldr r2, [pc, #68] ; (8007e98 <TIM_OC5_SetConfig+0xa0>)
- 8007e52: 4293 cmp r3, r2
- 8007e54: d109 bne.n 8007e6a <TIM_OC5_SetConfig+0x72>
- {
- /* Reset the Output Compare IDLE State */
- tmpcr2 &= ~TIM_CR2_OIS5;
- 8007e56: 697b ldr r3, [r7, #20]
- 8007e58: f423 3380 bic.w r3, r3, #65536 ; 0x10000
- 8007e5c: 617b str r3, [r7, #20]
- /* Set the Output Idle state */
- tmpcr2 |= (OC_Config->OCIdleState << 8U);
- 8007e5e: 683b ldr r3, [r7, #0]
- 8007e60: 695b ldr r3, [r3, #20]
- 8007e62: 021b lsls r3, r3, #8
- 8007e64: 697a ldr r2, [r7, #20]
- 8007e66: 4313 orrs r3, r2
- 8007e68: 617b str r3, [r7, #20]
- }
- /* Write to TIMx CR2 */
- TIMx->CR2 = tmpcr2;
- 8007e6a: 687b ldr r3, [r7, #4]
- 8007e6c: 697a ldr r2, [r7, #20]
- 8007e6e: 605a str r2, [r3, #4]
-
- /* Write to TIMx CCMR3 */
- TIMx->CCMR3 = tmpccmrx;
- 8007e70: 687b ldr r3, [r7, #4]
- 8007e72: 68fa ldr r2, [r7, #12]
- 8007e74: 655a str r2, [r3, #84] ; 0x54
-
- /* Set the Capture Compare Register value */
- TIMx->CCR5 = OC_Config->Pulse;
- 8007e76: 683b ldr r3, [r7, #0]
- 8007e78: 685a ldr r2, [r3, #4]
- 8007e7a: 687b ldr r3, [r7, #4]
- 8007e7c: 659a str r2, [r3, #88] ; 0x58
-
- /* Write to TIMx CCER */
- TIMx->CCER = tmpccer;
- 8007e7e: 687b ldr r3, [r7, #4]
- 8007e80: 693a ldr r2, [r7, #16]
- 8007e82: 621a str r2, [r3, #32]
-}
- 8007e84: bf00 nop
- 8007e86: 371c adds r7, #28
- 8007e88: 46bd mov sp, r7
- 8007e8a: f85d 7b04 ldr.w r7, [sp], #4
- 8007e8e: 4770 bx lr
- 8007e90: fffeff8f .word 0xfffeff8f
- 8007e94: 40010000 .word 0x40010000
- 8007e98: 40010400 .word 0x40010400
-
-08007e9c <TIM_OC6_SetConfig>:
- * @param OC_Config The ouput configuration structure
- * @retval None
- */
-static void TIM_OC6_SetConfig(TIM_TypeDef *TIMx,
- TIM_OC_InitTypeDef *OC_Config)
-{
- 8007e9c: b480 push {r7}
- 8007e9e: b087 sub sp, #28
- 8007ea0: af00 add r7, sp, #0
- 8007ea2: 6078 str r0, [r7, #4]
- 8007ea4: 6039 str r1, [r7, #0]
- uint32_t tmpccmrx;
- uint32_t tmpccer;
- uint32_t tmpcr2;
-
- /* Disable the output: Reset the CCxE Bit */
- TIMx->CCER &= ~TIM_CCER_CC6E;
- 8007ea6: 687b ldr r3, [r7, #4]
- 8007ea8: 6a1b ldr r3, [r3, #32]
- 8007eaa: f423 1280 bic.w r2, r3, #1048576 ; 0x100000
- 8007eae: 687b ldr r3, [r7, #4]
- 8007eb0: 621a str r2, [r3, #32]
-
- /* Get the TIMx CCER register value */
- tmpccer = TIMx->CCER;
- 8007eb2: 687b ldr r3, [r7, #4]
- 8007eb4: 6a1b ldr r3, [r3, #32]
- 8007eb6: 613b str r3, [r7, #16]
- /* Get the TIMx CR2 register value */
- tmpcr2 = TIMx->CR2;
- 8007eb8: 687b ldr r3, [r7, #4]
- 8007eba: 685b ldr r3, [r3, #4]
- 8007ebc: 617b str r3, [r7, #20]
- /* Get the TIMx CCMR1 register value */
- tmpccmrx = TIMx->CCMR3;
- 8007ebe: 687b ldr r3, [r7, #4]
- 8007ec0: 6d5b ldr r3, [r3, #84] ; 0x54
- 8007ec2: 60fb str r3, [r7, #12]
-
- /* Reset the Output Compare Mode Bits */
- tmpccmrx &= ~(TIM_CCMR3_OC6M);
- 8007ec4: 68fa ldr r2, [r7, #12]
- 8007ec6: 4b1c ldr r3, [pc, #112] ; (8007f38 <TIM_OC6_SetConfig+0x9c>)
- 8007ec8: 4013 ands r3, r2
- 8007eca: 60fb str r3, [r7, #12]
- /* Select the Output Compare Mode */
- tmpccmrx |= (OC_Config->OCMode << 8U);
- 8007ecc: 683b ldr r3, [r7, #0]
- 8007ece: 681b ldr r3, [r3, #0]
- 8007ed0: 021b lsls r3, r3, #8
- 8007ed2: 68fa ldr r2, [r7, #12]
- 8007ed4: 4313 orrs r3, r2
- 8007ed6: 60fb str r3, [r7, #12]
-
- /* Reset the Output Polarity level */
- tmpccer &= (uint32_t)~TIM_CCER_CC6P;
- 8007ed8: 693b ldr r3, [r7, #16]
- 8007eda: f423 1300 bic.w r3, r3, #2097152 ; 0x200000
- 8007ede: 613b str r3, [r7, #16]
- /* Set the Output Compare Polarity */
- tmpccer |= (OC_Config->OCPolarity << 20U);
- 8007ee0: 683b ldr r3, [r7, #0]
- 8007ee2: 689b ldr r3, [r3, #8]
- 8007ee4: 051b lsls r3, r3, #20
- 8007ee6: 693a ldr r2, [r7, #16]
- 8007ee8: 4313 orrs r3, r2
- 8007eea: 613b str r3, [r7, #16]
-
- if (IS_TIM_BREAK_INSTANCE(TIMx))
- 8007eec: 687b ldr r3, [r7, #4]
- 8007eee: 4a13 ldr r2, [pc, #76] ; (8007f3c <TIM_OC6_SetConfig+0xa0>)
- 8007ef0: 4293 cmp r3, r2
- 8007ef2: d003 beq.n 8007efc <TIM_OC6_SetConfig+0x60>
- 8007ef4: 687b ldr r3, [r7, #4]
- 8007ef6: 4a12 ldr r2, [pc, #72] ; (8007f40 <TIM_OC6_SetConfig+0xa4>)
- 8007ef8: 4293 cmp r3, r2
- 8007efa: d109 bne.n 8007f10 <TIM_OC6_SetConfig+0x74>
- {
- /* Reset the Output Compare IDLE State */
- tmpcr2 &= ~TIM_CR2_OIS6;
- 8007efc: 697b ldr r3, [r7, #20]
- 8007efe: f423 2380 bic.w r3, r3, #262144 ; 0x40000
- 8007f02: 617b str r3, [r7, #20]
- /* Set the Output Idle state */
- tmpcr2 |= (OC_Config->OCIdleState << 10U);
- 8007f04: 683b ldr r3, [r7, #0]
- 8007f06: 695b ldr r3, [r3, #20]
- 8007f08: 029b lsls r3, r3, #10
- 8007f0a: 697a ldr r2, [r7, #20]
- 8007f0c: 4313 orrs r3, r2
- 8007f0e: 617b str r3, [r7, #20]
- }
-
- /* Write to TIMx CR2 */
- TIMx->CR2 = tmpcr2;
- 8007f10: 687b ldr r3, [r7, #4]
- 8007f12: 697a ldr r2, [r7, #20]
- 8007f14: 605a str r2, [r3, #4]
-
- /* Write to TIMx CCMR3 */
- TIMx->CCMR3 = tmpccmrx;
- 8007f16: 687b ldr r3, [r7, #4]
- 8007f18: 68fa ldr r2, [r7, #12]
- 8007f1a: 655a str r2, [r3, #84] ; 0x54
-
- /* Set the Capture Compare Register value */
- TIMx->CCR6 = OC_Config->Pulse;
- 8007f1c: 683b ldr r3, [r7, #0]
- 8007f1e: 685a ldr r2, [r3, #4]
- 8007f20: 687b ldr r3, [r7, #4]
- 8007f22: 65da str r2, [r3, #92] ; 0x5c
-
- /* Write to TIMx CCER */
- TIMx->CCER = tmpccer;
- 8007f24: 687b ldr r3, [r7, #4]
- 8007f26: 693a ldr r2, [r7, #16]
- 8007f28: 621a str r2, [r3, #32]
-}
- 8007f2a: bf00 nop
- 8007f2c: 371c adds r7, #28
- 8007f2e: 46bd mov sp, r7
- 8007f30: f85d 7b04 ldr.w r7, [sp], #4
- 8007f34: 4770 bx lr
- 8007f36: bf00 nop
- 8007f38: feff8fff .word 0xfeff8fff
- 8007f3c: 40010000 .word 0x40010000
- 8007f40: 40010400 .word 0x40010400
-
-08007f44 <TIM_TI1_ConfigInputStage>:
- * @param TIM_ICFilter Specifies the Input Capture Filter.
- * This parameter must be a value between 0x00 and 0x0F.
- * @retval None
- */
-static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
-{
- 8007f44: b480 push {r7}
- 8007f46: b087 sub sp, #28
- 8007f48: af00 add r7, sp, #0
- 8007f4a: 60f8 str r0, [r7, #12]
- 8007f4c: 60b9 str r1, [r7, #8]
- 8007f4e: 607a str r2, [r7, #4]
- uint32_t tmpccmr1;
- uint32_t tmpccer;
-
- /* Disable the Channel 1: Reset the CC1E Bit */
- tmpccer = TIMx->CCER;
- 8007f50: 68fb ldr r3, [r7, #12]
- 8007f52: 6a1b ldr r3, [r3, #32]
- 8007f54: 617b str r3, [r7, #20]
- TIMx->CCER &= ~TIM_CCER_CC1E;
- 8007f56: 68fb ldr r3, [r7, #12]
- 8007f58: 6a1b ldr r3, [r3, #32]
- 8007f5a: f023 0201 bic.w r2, r3, #1
- 8007f5e: 68fb ldr r3, [r7, #12]
- 8007f60: 621a str r2, [r3, #32]
- tmpccmr1 = TIMx->CCMR1;
- 8007f62: 68fb ldr r3, [r7, #12]
- 8007f64: 699b ldr r3, [r3, #24]
- 8007f66: 613b str r3, [r7, #16]
-
- /* Set the filter */
- tmpccmr1 &= ~TIM_CCMR1_IC1F;
- 8007f68: 693b ldr r3, [r7, #16]
- 8007f6a: f023 03f0 bic.w r3, r3, #240 ; 0xf0
- 8007f6e: 613b str r3, [r7, #16]
- tmpccmr1 |= (TIM_ICFilter << 4U);
- 8007f70: 687b ldr r3, [r7, #4]
- 8007f72: 011b lsls r3, r3, #4
- 8007f74: 693a ldr r2, [r7, #16]
- 8007f76: 4313 orrs r3, r2
- 8007f78: 613b str r3, [r7, #16]
-
- /* Select the Polarity and set the CC1E Bit */
- tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP);
- 8007f7a: 697b ldr r3, [r7, #20]
- 8007f7c: f023 030a bic.w r3, r3, #10
- 8007f80: 617b str r3, [r7, #20]
- tmpccer |= TIM_ICPolarity;
- 8007f82: 697a ldr r2, [r7, #20]
- 8007f84: 68bb ldr r3, [r7, #8]
- 8007f86: 4313 orrs r3, r2
- 8007f88: 617b str r3, [r7, #20]
-
- /* Write to TIMx CCMR1 and CCER registers */
- TIMx->CCMR1 = tmpccmr1;
- 8007f8a: 68fb ldr r3, [r7, #12]
- 8007f8c: 693a ldr r2, [r7, #16]
- 8007f8e: 619a str r2, [r3, #24]
- TIMx->CCER = tmpccer;
- 8007f90: 68fb ldr r3, [r7, #12]
- 8007f92: 697a ldr r2, [r7, #20]
- 8007f94: 621a str r2, [r3, #32]
-}
- 8007f96: bf00 nop
- 8007f98: 371c adds r7, #28
- 8007f9a: 46bd mov sp, r7
- 8007f9c: f85d 7b04 ldr.w r7, [sp], #4
- 8007fa0: 4770 bx lr
-
-08007fa2 <TIM_TI2_ConfigInputStage>:
- * @param TIM_ICFilter Specifies the Input Capture Filter.
- * This parameter must be a value between 0x00 and 0x0F.
- * @retval None
- */
-static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
-{
- 8007fa2: b480 push {r7}
- 8007fa4: b087 sub sp, #28
- 8007fa6: af00 add r7, sp, #0
- 8007fa8: 60f8 str r0, [r7, #12]
- 8007faa: 60b9 str r1, [r7, #8]
- 8007fac: 607a str r2, [r7, #4]
- uint32_t tmpccmr1;
- uint32_t tmpccer;
-
- /* Disable the Channel 2: Reset the CC2E Bit */
- TIMx->CCER &= ~TIM_CCER_CC2E;
- 8007fae: 68fb ldr r3, [r7, #12]
- 8007fb0: 6a1b ldr r3, [r3, #32]
- 8007fb2: f023 0210 bic.w r2, r3, #16
- 8007fb6: 68fb ldr r3, [r7, #12]
- 8007fb8: 621a str r2, [r3, #32]
- tmpccmr1 = TIMx->CCMR1;
- 8007fba: 68fb ldr r3, [r7, #12]
- 8007fbc: 699b ldr r3, [r3, #24]
- 8007fbe: 617b str r3, [r7, #20]
- tmpccer = TIMx->CCER;
- 8007fc0: 68fb ldr r3, [r7, #12]
- 8007fc2: 6a1b ldr r3, [r3, #32]
- 8007fc4: 613b str r3, [r7, #16]
-
- /* Set the filter */
- tmpccmr1 &= ~TIM_CCMR1_IC2F;
- 8007fc6: 697b ldr r3, [r7, #20]
- 8007fc8: f423 4370 bic.w r3, r3, #61440 ; 0xf000
- 8007fcc: 617b str r3, [r7, #20]
- tmpccmr1 |= (TIM_ICFilter << 12U);
- 8007fce: 687b ldr r3, [r7, #4]
- 8007fd0: 031b lsls r3, r3, #12
- 8007fd2: 697a ldr r2, [r7, #20]
- 8007fd4: 4313 orrs r3, r2
- 8007fd6: 617b str r3, [r7, #20]
-
- /* Select the Polarity and set the CC2E Bit */
- tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP);
- 8007fd8: 693b ldr r3, [r7, #16]
- 8007fda: f023 03a0 bic.w r3, r3, #160 ; 0xa0
- 8007fde: 613b str r3, [r7, #16]
- tmpccer |= (TIM_ICPolarity << 4U);
- 8007fe0: 68bb ldr r3, [r7, #8]
- 8007fe2: 011b lsls r3, r3, #4
- 8007fe4: 693a ldr r2, [r7, #16]
- 8007fe6: 4313 orrs r3, r2
- 8007fe8: 613b str r3, [r7, #16]
-
- /* Write to TIMx CCMR1 and CCER registers */
- TIMx->CCMR1 = tmpccmr1 ;
- 8007fea: 68fb ldr r3, [r7, #12]
- 8007fec: 697a ldr r2, [r7, #20]
- 8007fee: 619a str r2, [r3, #24]
- TIMx->CCER = tmpccer;
- 8007ff0: 68fb ldr r3, [r7, #12]
- 8007ff2: 693a ldr r2, [r7, #16]
- 8007ff4: 621a str r2, [r3, #32]
-}
- 8007ff6: bf00 nop
- 8007ff8: 371c adds r7, #28
- 8007ffa: 46bd mov sp, r7
- 8007ffc: f85d 7b04 ldr.w r7, [sp], #4
- 8008000: 4770 bx lr
-
-08008002 <TIM_ITRx_SetConfig>:
- * @arg TIM_TS_TI2FP2: Filtered Timer Input 2
- * @arg TIM_TS_ETRF: External Trigger input
- * @retval None
- */
-static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource)
-{
- 8008002: b480 push {r7}
- 8008004: b085 sub sp, #20
- 8008006: af00 add r7, sp, #0
- 8008008: 6078 str r0, [r7, #4]
- 800800a: 6039 str r1, [r7, #0]
- uint32_t tmpsmcr;
-
- /* Get the TIMx SMCR register value */
- tmpsmcr = TIMx->SMCR;
- 800800c: 687b ldr r3, [r7, #4]
- 800800e: 689b ldr r3, [r3, #8]
- 8008010: 60fb str r3, [r7, #12]
- /* Reset the TS Bits */
- tmpsmcr &= ~TIM_SMCR_TS;
- 8008012: 68fb ldr r3, [r7, #12]
- 8008014: f023 0370 bic.w r3, r3, #112 ; 0x70
- 8008018: 60fb str r3, [r7, #12]
- /* Set the Input Trigger source and the slave mode*/
- tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1);
- 800801a: 683a ldr r2, [r7, #0]
- 800801c: 68fb ldr r3, [r7, #12]
- 800801e: 4313 orrs r3, r2
- 8008020: f043 0307 orr.w r3, r3, #7
- 8008024: 60fb str r3, [r7, #12]
- /* Write to TIMx SMCR */
- TIMx->SMCR = tmpsmcr;
- 8008026: 687b ldr r3, [r7, #4]
- 8008028: 68fa ldr r2, [r7, #12]
- 800802a: 609a str r2, [r3, #8]
-}
- 800802c: bf00 nop
- 800802e: 3714 adds r7, #20
- 8008030: 46bd mov sp, r7
- 8008032: f85d 7b04 ldr.w r7, [sp], #4
- 8008036: 4770 bx lr
-
-08008038 <TIM_ETR_SetConfig>:
- * This parameter must be a value between 0x00 and 0x0F
- * @retval None
- */
-void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler,
- uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter)
-{
- 8008038: b480 push {r7}
- 800803a: b087 sub sp, #28
- 800803c: af00 add r7, sp, #0
- 800803e: 60f8 str r0, [r7, #12]
- 8008040: 60b9 str r1, [r7, #8]
- 8008042: 607a str r2, [r7, #4]
- 8008044: 603b str r3, [r7, #0]
- uint32_t tmpsmcr;
-
- tmpsmcr = TIMx->SMCR;
- 8008046: 68fb ldr r3, [r7, #12]
- 8008048: 689b ldr r3, [r3, #8]
- 800804a: 617b str r3, [r7, #20]
-
- /* Reset the ETR Bits */
- tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
- 800804c: 697b ldr r3, [r7, #20]
- 800804e: f423 437f bic.w r3, r3, #65280 ; 0xff00
- 8008052: 617b str r3, [r7, #20]
-
- /* Set the Prescaler, the Filter value and the Polarity */
- tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U)));
- 8008054: 683b ldr r3, [r7, #0]
- 8008056: 021a lsls r2, r3, #8
- 8008058: 687b ldr r3, [r7, #4]
- 800805a: 431a orrs r2, r3
- 800805c: 68bb ldr r3, [r7, #8]
- 800805e: 4313 orrs r3, r2
- 8008060: 697a ldr r2, [r7, #20]
- 8008062: 4313 orrs r3, r2
- 8008064: 617b str r3, [r7, #20]
-
- /* Write to TIMx SMCR */
- TIMx->SMCR = tmpsmcr;
- 8008066: 68fb ldr r3, [r7, #12]
- 8008068: 697a ldr r2, [r7, #20]
- 800806a: 609a str r2, [r3, #8]
-}
- 800806c: bf00 nop
- 800806e: 371c adds r7, #28
- 8008070: 46bd mov sp, r7
- 8008072: f85d 7b04 ldr.w r7, [sp], #4
- 8008076: 4770 bx lr
-
-08008078 <TIM_CCxChannelCmd>:
- * @param ChannelState specifies the TIM Channel CCxE bit new state.
- * This parameter can be: TIM_CCx_ENABLE or TIM_CCx_DISABLE.
- * @retval None
- */
-void TIM_CCxChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelState)
-{
- 8008078: b480 push {r7}
- 800807a: b087 sub sp, #28
- 800807c: af00 add r7, sp, #0
- 800807e: 60f8 str r0, [r7, #12]
- 8008080: 60b9 str r1, [r7, #8]
- 8008082: 607a str r2, [r7, #4]
-
- /* Check the parameters */
- assert_param(IS_TIM_CC1_INSTANCE(TIMx));
- assert_param(IS_TIM_CHANNELS(Channel));
-
- tmp = TIM_CCER_CC1E << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */
- 8008084: 68bb ldr r3, [r7, #8]
- 8008086: f003 031f and.w r3, r3, #31
- 800808a: 2201 movs r2, #1
- 800808c: fa02 f303 lsl.w r3, r2, r3
- 8008090: 617b str r3, [r7, #20]
-
- /* Reset the CCxE Bit */
- TIMx->CCER &= ~tmp;
- 8008092: 68fb ldr r3, [r7, #12]
- 8008094: 6a1a ldr r2, [r3, #32]
- 8008096: 697b ldr r3, [r7, #20]
- 8008098: 43db mvns r3, r3
- 800809a: 401a ands r2, r3
- 800809c: 68fb ldr r3, [r7, #12]
- 800809e: 621a str r2, [r3, #32]
-
- /* Set or reset the CCxE Bit */
- TIMx->CCER |= (uint32_t)(ChannelState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */
- 80080a0: 68fb ldr r3, [r7, #12]
- 80080a2: 6a1a ldr r2, [r3, #32]
- 80080a4: 68bb ldr r3, [r7, #8]
- 80080a6: f003 031f and.w r3, r3, #31
- 80080aa: 6879 ldr r1, [r7, #4]
- 80080ac: fa01 f303 lsl.w r3, r1, r3
- 80080b0: 431a orrs r2, r3
- 80080b2: 68fb ldr r3, [r7, #12]
- 80080b4: 621a str r2, [r3, #32]
-}
- 80080b6: bf00 nop
- 80080b8: 371c adds r7, #28
- 80080ba: 46bd mov sp, r7
- 80080bc: f85d 7b04 ldr.w r7, [sp], #4
- 80080c0: 4770 bx lr
- ...
-
-080080c4 <HAL_TIMEx_MasterConfigSynchronization>:
- * mode.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
- TIM_MasterConfigTypeDef *sMasterConfig)
-{
- 80080c4: b480 push {r7}
- 80080c6: b085 sub sp, #20
- 80080c8: af00 add r7, sp, #0
- 80080ca: 6078 str r0, [r7, #4]
- 80080cc: 6039 str r1, [r7, #0]
- assert_param(IS_TIM_SYNCHRO_INSTANCE(htim->Instance));
- assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
- assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
-
- /* Check input state */
- __HAL_LOCK(htim);
- 80080ce: 687b ldr r3, [r7, #4]
- 80080d0: f893 303c ldrb.w r3, [r3, #60] ; 0x3c
- 80080d4: 2b01 cmp r3, #1
- 80080d6: d101 bne.n 80080dc <HAL_TIMEx_MasterConfigSynchronization+0x18>
- 80080d8: 2302 movs r3, #2
- 80080da: e045 b.n 8008168 <HAL_TIMEx_MasterConfigSynchronization+0xa4>
- 80080dc: 687b ldr r3, [r7, #4]
- 80080de: 2201 movs r2, #1
- 80080e0: f883 203c strb.w r2, [r3, #60] ; 0x3c
-
- /* Change the handler state */
- htim->State = HAL_TIM_STATE_BUSY;
- 80080e4: 687b ldr r3, [r7, #4]
- 80080e6: 2202 movs r2, #2
- 80080e8: f883 203d strb.w r2, [r3, #61] ; 0x3d
-
- /* Get the TIMx CR2 register value */
- tmpcr2 = htim->Instance->CR2;
- 80080ec: 687b ldr r3, [r7, #4]
- 80080ee: 681b ldr r3, [r3, #0]
- 80080f0: 685b ldr r3, [r3, #4]
- 80080f2: 60fb str r3, [r7, #12]
-
- /* Get the TIMx SMCR register value */
- tmpsmcr = htim->Instance->SMCR;
- 80080f4: 687b ldr r3, [r7, #4]
- 80080f6: 681b ldr r3, [r3, #0]
- 80080f8: 689b ldr r3, [r3, #8]
- 80080fa: 60bb str r3, [r7, #8]
-
- /* If the timer supports ADC synchronization through TRGO2, set the master mode selection 2 */
- if (IS_TIM_TRGO2_INSTANCE(htim->Instance))
- 80080fc: 687b ldr r3, [r7, #4]
- 80080fe: 681b ldr r3, [r3, #0]
- 8008100: 4a1c ldr r2, [pc, #112] ; (8008174 <HAL_TIMEx_MasterConfigSynchronization+0xb0>)
- 8008102: 4293 cmp r3, r2
- 8008104: d004 beq.n 8008110 <HAL_TIMEx_MasterConfigSynchronization+0x4c>
- 8008106: 687b ldr r3, [r7, #4]
- 8008108: 681b ldr r3, [r3, #0]
- 800810a: 4a1b ldr r2, [pc, #108] ; (8008178 <HAL_TIMEx_MasterConfigSynchronization+0xb4>)
- 800810c: 4293 cmp r3, r2
- 800810e: d108 bne.n 8008122 <HAL_TIMEx_MasterConfigSynchronization+0x5e>
- {
- /* Check the parameters */
- assert_param(IS_TIM_TRGO2_SOURCE(sMasterConfig->MasterOutputTrigger2));
-
- /* Clear the MMS2 bits */
- tmpcr2 &= ~TIM_CR2_MMS2;
- 8008110: 68fb ldr r3, [r7, #12]
- 8008112: f423 0370 bic.w r3, r3, #15728640 ; 0xf00000
- 8008116: 60fb str r3, [r7, #12]
- /* Select the TRGO2 source*/
- tmpcr2 |= sMasterConfig->MasterOutputTrigger2;
- 8008118: 683b ldr r3, [r7, #0]
- 800811a: 685b ldr r3, [r3, #4]
- 800811c: 68fa ldr r2, [r7, #12]
- 800811e: 4313 orrs r3, r2
- 8008120: 60fb str r3, [r7, #12]
- }
-
- /* Reset the MMS Bits */
- tmpcr2 &= ~TIM_CR2_MMS;
- 8008122: 68fb ldr r3, [r7, #12]
- 8008124: f023 0370 bic.w r3, r3, #112 ; 0x70
- 8008128: 60fb str r3, [r7, #12]
- /* Select the TRGO source */
- tmpcr2 |= sMasterConfig->MasterOutputTrigger;
- 800812a: 683b ldr r3, [r7, #0]
- 800812c: 681b ldr r3, [r3, #0]
- 800812e: 68fa ldr r2, [r7, #12]
- 8008130: 4313 orrs r3, r2
- 8008132: 60fb str r3, [r7, #12]
-
- /* Reset the MSM Bit */
- tmpsmcr &= ~TIM_SMCR_MSM;
- 8008134: 68bb ldr r3, [r7, #8]
- 8008136: f023 0380 bic.w r3, r3, #128 ; 0x80
- 800813a: 60bb str r3, [r7, #8]
- /* Set master mode */
- tmpsmcr |= sMasterConfig->MasterSlaveMode;
- 800813c: 683b ldr r3, [r7, #0]
- 800813e: 689b ldr r3, [r3, #8]
- 8008140: 68ba ldr r2, [r7, #8]
- 8008142: 4313 orrs r3, r2
- 8008144: 60bb str r3, [r7, #8]
-
- /* Update TIMx CR2 */
- htim->Instance->CR2 = tmpcr2;
- 8008146: 687b ldr r3, [r7, #4]
- 8008148: 681b ldr r3, [r3, #0]
- 800814a: 68fa ldr r2, [r7, #12]
- 800814c: 605a str r2, [r3, #4]
-
- /* Update TIMx SMCR */
- htim->Instance->SMCR = tmpsmcr;
- 800814e: 687b ldr r3, [r7, #4]
- 8008150: 681b ldr r3, [r3, #0]
- 8008152: 68ba ldr r2, [r7, #8]
- 8008154: 609a str r2, [r3, #8]
-
- /* Change the htim state */
- htim->State = HAL_TIM_STATE_READY;
- 8008156: 687b ldr r3, [r7, #4]
- 8008158: 2201 movs r2, #1
- 800815a: f883 203d strb.w r2, [r3, #61] ; 0x3d
-
- __HAL_UNLOCK(htim);
- 800815e: 687b ldr r3, [r7, #4]
- 8008160: 2200 movs r2, #0
- 8008162: f883 203c strb.w r2, [r3, #60] ; 0x3c
-
- return HAL_OK;
- 8008166: 2300 movs r3, #0
-}
- 8008168: 4618 mov r0, r3
- 800816a: 3714 adds r7, #20
- 800816c: 46bd mov sp, r7
- 800816e: f85d 7b04 ldr.w r7, [sp], #4
- 8008172: 4770 bx lr
- 8008174: 40010000 .word 0x40010000
- 8008178: 40010400 .word 0x40010400
-
-0800817c <HAL_TIMEx_CommutCallback>:
- * @brief Hall commutation changed callback in non-blocking mode
- * @param htim TIM handle
- * @retval None
- */
-__weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim)
-{
- 800817c: b480 push {r7}
- 800817e: b083 sub sp, #12
- 8008180: af00 add r7, sp, #0
- 8008182: 6078 str r0, [r7, #4]
- UNUSED(htim);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_TIMEx_CommutCallback could be implemented in the user file
- */
-}
- 8008184: bf00 nop
- 8008186: 370c adds r7, #12
- 8008188: 46bd mov sp, r7
- 800818a: f85d 7b04 ldr.w r7, [sp], #4
- 800818e: 4770 bx lr
-
-08008190 <HAL_TIMEx_BreakCallback>:
- * @brief Hall Break detection callback in non-blocking mode
- * @param htim TIM handle
- * @retval None
- */
-__weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
-{
- 8008190: b480 push {r7}
- 8008192: b083 sub sp, #12
- 8008194: af00 add r7, sp, #0
- 8008196: 6078 str r0, [r7, #4]
- UNUSED(htim);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_TIMEx_BreakCallback could be implemented in the user file
- */
-}
- 8008198: bf00 nop
- 800819a: 370c adds r7, #12
- 800819c: 46bd mov sp, r7
- 800819e: f85d 7b04 ldr.w r7, [sp], #4
- 80081a2: 4770 bx lr
-
-080081a4 <HAL_TIMEx_Break2Callback>:
- * @brief Hall Break2 detection callback in non blocking mode
- * @param htim: TIM handle
- * @retval None
- */
-__weak void HAL_TIMEx_Break2Callback(TIM_HandleTypeDef *htim)
-{
- 80081a4: b480 push {r7}
- 80081a6: b083 sub sp, #12
- 80081a8: af00 add r7, sp, #0
- 80081aa: 6078 str r0, [r7, #4]
- UNUSED(htim);
-
- /* NOTE : This function Should not be modified, when the callback is needed,
- the HAL_TIMEx_Break2Callback could be implemented in the user file
- */
-}
- 80081ac: bf00 nop
- 80081ae: 370c adds r7, #12
- 80081b0: 46bd mov sp, r7
- 80081b2: f85d 7b04 ldr.w r7, [sp], #4
- 80081b6: 4770 bx lr
-
-080081b8 <HAL_UART_Init>:
- * parameters in the UART_InitTypeDef and initialize the associated handle.
- * @param huart UART handle.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
-{
- 80081b8: b580 push {r7, lr}
- 80081ba: b082 sub sp, #8
- 80081bc: af00 add r7, sp, #0
- 80081be: 6078 str r0, [r7, #4]
- /* Check the UART handle allocation */
- if (huart == NULL)
- 80081c0: 687b ldr r3, [r7, #4]
- 80081c2: 2b00 cmp r3, #0
- 80081c4: d101 bne.n 80081ca <HAL_UART_Init+0x12>
- {
- return HAL_ERROR;
- 80081c6: 2301 movs r3, #1
- 80081c8: e040 b.n 800824c <HAL_UART_Init+0x94>
- {
- /* Check the parameters */
- assert_param(IS_UART_INSTANCE(huart->Instance));
- }
-
- if (huart->gState == HAL_UART_STATE_RESET)
- 80081ca: 687b ldr r3, [r7, #4]
- 80081cc: 6f5b ldr r3, [r3, #116] ; 0x74
- 80081ce: 2b00 cmp r3, #0
- 80081d0: d106 bne.n 80081e0 <HAL_UART_Init+0x28>
- {
- /* Allocate lock resource and initialize it */
- huart->Lock = HAL_UNLOCKED;
- 80081d2: 687b ldr r3, [r7, #4]
- 80081d4: 2200 movs r2, #0
- 80081d6: f883 2070 strb.w r2, [r3, #112] ; 0x70
-
- /* Init the low level hardware */
- huart->MspInitCallback(huart);
-#else
- /* Init the low level hardware : GPIO, CLOCK */
- HAL_UART_MspInit(huart);
- 80081da: 6878 ldr r0, [r7, #4]
- 80081dc: f7fc fd82 bl 8004ce4 <HAL_UART_MspInit>
-#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
- }
-
- huart->gState = HAL_UART_STATE_BUSY;
- 80081e0: 687b ldr r3, [r7, #4]
- 80081e2: 2224 movs r2, #36 ; 0x24
- 80081e4: 675a str r2, [r3, #116] ; 0x74
-
- /* Disable the Peripheral */
- __HAL_UART_DISABLE(huart);
- 80081e6: 687b ldr r3, [r7, #4]
- 80081e8: 681b ldr r3, [r3, #0]
- 80081ea: 681a ldr r2, [r3, #0]
- 80081ec: 687b ldr r3, [r7, #4]
- 80081ee: 681b ldr r3, [r3, #0]
- 80081f0: f022 0201 bic.w r2, r2, #1
- 80081f4: 601a str r2, [r3, #0]
-
- /* Set the UART Communication parameters */
- if (UART_SetConfig(huart) == HAL_ERROR)
- 80081f6: 6878 ldr r0, [r7, #4]
- 80081f8: f000 fa66 bl 80086c8 <UART_SetConfig>
- 80081fc: 4603 mov r3, r0
- 80081fe: 2b01 cmp r3, #1
- 8008200: d101 bne.n 8008206 <HAL_UART_Init+0x4e>
- {
- return HAL_ERROR;
- 8008202: 2301 movs r3, #1
- 8008204: e022 b.n 800824c <HAL_UART_Init+0x94>
- }
-
- if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
- 8008206: 687b ldr r3, [r7, #4]
- 8008208: 6a5b ldr r3, [r3, #36] ; 0x24
- 800820a: 2b00 cmp r3, #0
- 800820c: d002 beq.n 8008214 <HAL_UART_Init+0x5c>
- {
- UART_AdvFeatureConfig(huart);
- 800820e: 6878 ldr r0, [r7, #4]
- 8008210: f000 fcfe bl 8008c10 <UART_AdvFeatureConfig>
- }
-
- /* In asynchronous mode, the following bits must be kept cleared:
- - LINEN and CLKEN bits in the USART_CR2 register,
- - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/
- CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
- 8008214: 687b ldr r3, [r7, #4]
- 8008216: 681b ldr r3, [r3, #0]
- 8008218: 685a ldr r2, [r3, #4]
- 800821a: 687b ldr r3, [r7, #4]
- 800821c: 681b ldr r3, [r3, #0]
- 800821e: f422 4290 bic.w r2, r2, #18432 ; 0x4800
- 8008222: 605a str r2, [r3, #4]
- CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
- 8008224: 687b ldr r3, [r7, #4]
- 8008226: 681b ldr r3, [r3, #0]
- 8008228: 689a ldr r2, [r3, #8]
- 800822a: 687b ldr r3, [r7, #4]
- 800822c: 681b ldr r3, [r3, #0]
- 800822e: f022 022a bic.w r2, r2, #42 ; 0x2a
- 8008232: 609a str r2, [r3, #8]
-
- /* Enable the Peripheral */
- __HAL_UART_ENABLE(huart);
- 8008234: 687b ldr r3, [r7, #4]
- 8008236: 681b ldr r3, [r3, #0]
- 8008238: 681a ldr r2, [r3, #0]
- 800823a: 687b ldr r3, [r7, #4]
- 800823c: 681b ldr r3, [r3, #0]
- 800823e: f042 0201 orr.w r2, r2, #1
- 8008242: 601a str r2, [r3, #0]
-
- /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
- return (UART_CheckIdleState(huart));
- 8008244: 6878 ldr r0, [r7, #4]
- 8008246: f000 fd85 bl 8008d54 <UART_CheckIdleState>
- 800824a: 4603 mov r3, r0
-}
- 800824c: 4618 mov r0, r3
- 800824e: 3708 adds r7, #8
- 8008250: 46bd mov sp, r7
- 8008252: bd80 pop {r7, pc}
-
-08008254 <HAL_UART_Transmit_DMA>:
- * @param pData Pointer to data buffer.
- * @param Size Amount of data to be sent.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
-{
- 8008254: b580 push {r7, lr}
- 8008256: b084 sub sp, #16
- 8008258: af00 add r7, sp, #0
- 800825a: 60f8 str r0, [r7, #12]
- 800825c: 60b9 str r1, [r7, #8]
- 800825e: 4613 mov r3, r2
- 8008260: 80fb strh r3, [r7, #6]
- /* Check that a Tx process is not already ongoing */
- if (huart->gState == HAL_UART_STATE_READY)
- 8008262: 68fb ldr r3, [r7, #12]
- 8008264: 6f5b ldr r3, [r3, #116] ; 0x74
- 8008266: 2b20 cmp r3, #32
- 8008268: d164 bne.n 8008334 <HAL_UART_Transmit_DMA+0xe0>
- {
- if ((pData == NULL) || (Size == 0U))
- 800826a: 68bb ldr r3, [r7, #8]
- 800826c: 2b00 cmp r3, #0
- 800826e: d002 beq.n 8008276 <HAL_UART_Transmit_DMA+0x22>
- 8008270: 88fb ldrh r3, [r7, #6]
- 8008272: 2b00 cmp r3, #0
- 8008274: d101 bne.n 800827a <HAL_UART_Transmit_DMA+0x26>
- {
- return HAL_ERROR;
- 8008276: 2301 movs r3, #1
- 8008278: e05d b.n 8008336 <HAL_UART_Transmit_DMA+0xe2>
- }
-
- /* Process Locked */
- __HAL_LOCK(huart);
- 800827a: 68fb ldr r3, [r7, #12]
- 800827c: f893 3070 ldrb.w r3, [r3, #112] ; 0x70
- 8008280: 2b01 cmp r3, #1
- 8008282: d101 bne.n 8008288 <HAL_UART_Transmit_DMA+0x34>
- 8008284: 2302 movs r3, #2
- 8008286: e056 b.n 8008336 <HAL_UART_Transmit_DMA+0xe2>
- 8008288: 68fb ldr r3, [r7, #12]
- 800828a: 2201 movs r2, #1
- 800828c: f883 2070 strb.w r2, [r3, #112] ; 0x70
-
- huart->pTxBuffPtr = pData;
- 8008290: 68fb ldr r3, [r7, #12]
- 8008292: 68ba ldr r2, [r7, #8]
- 8008294: 64da str r2, [r3, #76] ; 0x4c
- huart->TxXferSize = Size;
- 8008296: 68fb ldr r3, [r7, #12]
- 8008298: 88fa ldrh r2, [r7, #6]
- 800829a: f8a3 2050 strh.w r2, [r3, #80] ; 0x50
- huart->TxXferCount = Size;
- 800829e: 68fb ldr r3, [r7, #12]
- 80082a0: 88fa ldrh r2, [r7, #6]
- 80082a2: f8a3 2052 strh.w r2, [r3, #82] ; 0x52
-
- huart->ErrorCode = HAL_UART_ERROR_NONE;
- 80082a6: 68fb ldr r3, [r7, #12]
- 80082a8: 2200 movs r2, #0
- 80082aa: 67da str r2, [r3, #124] ; 0x7c
- huart->gState = HAL_UART_STATE_BUSY_TX;
- 80082ac: 68fb ldr r3, [r7, #12]
- 80082ae: 2221 movs r2, #33 ; 0x21
- 80082b0: 675a str r2, [r3, #116] ; 0x74
-
- if (huart->hdmatx != NULL)
- 80082b2: 68fb ldr r3, [r7, #12]
- 80082b4: 6e9b ldr r3, [r3, #104] ; 0x68
- 80082b6: 2b00 cmp r3, #0
- 80082b8: d02a beq.n 8008310 <HAL_UART_Transmit_DMA+0xbc>
- {
- /* Set the UART DMA transfer complete callback */
- huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt;
- 80082ba: 68fb ldr r3, [r7, #12]
- 80082bc: 6e9b ldr r3, [r3, #104] ; 0x68
- 80082be: 4a20 ldr r2, [pc, #128] ; (8008340 <HAL_UART_Transmit_DMA+0xec>)
- 80082c0: 63da str r2, [r3, #60] ; 0x3c
-
- /* Set the UART DMA Half transfer complete callback */
- huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt;
- 80082c2: 68fb ldr r3, [r7, #12]
- 80082c4: 6e9b ldr r3, [r3, #104] ; 0x68
- 80082c6: 4a1f ldr r2, [pc, #124] ; (8008344 <HAL_UART_Transmit_DMA+0xf0>)
- 80082c8: 641a str r2, [r3, #64] ; 0x40
-
- /* Set the DMA error callback */
- huart->hdmatx->XferErrorCallback = UART_DMAError;
- 80082ca: 68fb ldr r3, [r7, #12]
- 80082cc: 6e9b ldr r3, [r3, #104] ; 0x68
- 80082ce: 4a1e ldr r2, [pc, #120] ; (8008348 <HAL_UART_Transmit_DMA+0xf4>)
- 80082d0: 64da str r2, [r3, #76] ; 0x4c
-
- /* Set the DMA abort callback */
- huart->hdmatx->XferAbortCallback = NULL;
- 80082d2: 68fb ldr r3, [r7, #12]
- 80082d4: 6e9b ldr r3, [r3, #104] ; 0x68
- 80082d6: 2200 movs r2, #0
- 80082d8: 651a str r2, [r3, #80] ; 0x50
-
- /* Enable the UART transmit DMA channel */
- if (HAL_DMA_Start_IT(huart->hdmatx, (uint32_t)huart->pTxBuffPtr, (uint32_t)&huart->Instance->TDR, Size) != HAL_OK)
- 80082da: 68fb ldr r3, [r7, #12]
- 80082dc: 6e98 ldr r0, [r3, #104] ; 0x68
- 80082de: 68fb ldr r3, [r7, #12]
- 80082e0: 6cdb ldr r3, [r3, #76] ; 0x4c
- 80082e2: 4619 mov r1, r3
- 80082e4: 68fb ldr r3, [r7, #12]
- 80082e6: 681b ldr r3, [r3, #0]
- 80082e8: 3328 adds r3, #40 ; 0x28
- 80082ea: 461a mov r2, r3
- 80082ec: 88fb ldrh r3, [r7, #6]
- 80082ee: f7fd f9d5 bl 800569c <HAL_DMA_Start_IT>
- 80082f2: 4603 mov r3, r0
- 80082f4: 2b00 cmp r3, #0
- 80082f6: d00b beq.n 8008310 <HAL_UART_Transmit_DMA+0xbc>
- {
- /* Set error code to DMA */
- huart->ErrorCode = HAL_UART_ERROR_DMA;
- 80082f8: 68fb ldr r3, [r7, #12]
- 80082fa: 2210 movs r2, #16
- 80082fc: 67da str r2, [r3, #124] ; 0x7c
-
- /* Process Unlocked */
- __HAL_UNLOCK(huart);
- 80082fe: 68fb ldr r3, [r7, #12]
- 8008300: 2200 movs r2, #0
- 8008302: f883 2070 strb.w r2, [r3, #112] ; 0x70
-
- /* Restore huart->gState to ready */
- huart->gState = HAL_UART_STATE_READY;
- 8008306: 68fb ldr r3, [r7, #12]
- 8008308: 2220 movs r2, #32
- 800830a: 675a str r2, [r3, #116] ; 0x74
-
- return HAL_ERROR;
- 800830c: 2301 movs r3, #1
- 800830e: e012 b.n 8008336 <HAL_UART_Transmit_DMA+0xe2>
- }
- }
- /* Clear the TC flag in the ICR register */
- __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_TCF);
- 8008310: 68fb ldr r3, [r7, #12]
- 8008312: 681b ldr r3, [r3, #0]
- 8008314: 2240 movs r2, #64 ; 0x40
- 8008316: 621a str r2, [r3, #32]
-
- /* Process Unlocked */
- __HAL_UNLOCK(huart);
- 8008318: 68fb ldr r3, [r7, #12]
- 800831a: 2200 movs r2, #0
- 800831c: f883 2070 strb.w r2, [r3, #112] ; 0x70
-
- /* Enable the DMA transfer for transmit request by setting the DMAT bit
- in the UART CR3 register */
- SET_BIT(huart->Instance->CR3, USART_CR3_DMAT);
- 8008320: 68fb ldr r3, [r7, #12]
- 8008322: 681b ldr r3, [r3, #0]
- 8008324: 689a ldr r2, [r3, #8]
- 8008326: 68fb ldr r3, [r7, #12]
- 8008328: 681b ldr r3, [r3, #0]
- 800832a: f042 0280 orr.w r2, r2, #128 ; 0x80
- 800832e: 609a str r2, [r3, #8]
-
- return HAL_OK;
- 8008330: 2300 movs r3, #0
- 8008332: e000 b.n 8008336 <HAL_UART_Transmit_DMA+0xe2>
- }
- else
- {
- return HAL_BUSY;
- 8008334: 2302 movs r3, #2
- }
-}
- 8008336: 4618 mov r0, r3
- 8008338: 3710 adds r7, #16
- 800833a: 46bd mov sp, r7
- 800833c: bd80 pop {r7, pc}
- 800833e: bf00 nop
- 8008340: 08008ead .word 0x08008ead
- 8008344: 08008efd .word 0x08008efd
- 8008348: 08008f99 .word 0x08008f99
-
-0800834c <HAL_UART_Receive_DMA>:
- * @param pData Pointer to data buffer.
- * @param Size Amount of data to be received.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
-{
- 800834c: b580 push {r7, lr}
- 800834e: b084 sub sp, #16
- 8008350: af00 add r7, sp, #0
- 8008352: 60f8 str r0, [r7, #12]
- 8008354: 60b9 str r1, [r7, #8]
- 8008356: 4613 mov r3, r2
- 8008358: 80fb strh r3, [r7, #6]
- /* Check that a Rx process is not already ongoing */
- if (huart->RxState == HAL_UART_STATE_READY)
- 800835a: 68fb ldr r3, [r7, #12]
- 800835c: 6f9b ldr r3, [r3, #120] ; 0x78
- 800835e: 2b20 cmp r3, #32
- 8008360: d16c bne.n 800843c <HAL_UART_Receive_DMA+0xf0>
- {
- if ((pData == NULL) || (Size == 0U))
- 8008362: 68bb ldr r3, [r7, #8]
- 8008364: 2b00 cmp r3, #0
- 8008366: d002 beq.n 800836e <HAL_UART_Receive_DMA+0x22>
- 8008368: 88fb ldrh r3, [r7, #6]
- 800836a: 2b00 cmp r3, #0
- 800836c: d101 bne.n 8008372 <HAL_UART_Receive_DMA+0x26>
- {
- return HAL_ERROR;
- 800836e: 2301 movs r3, #1
- 8008370: e065 b.n 800843e <HAL_UART_Receive_DMA+0xf2>
- }
-
- /* Process Locked */
- __HAL_LOCK(huart);
- 8008372: 68fb ldr r3, [r7, #12]
- 8008374: f893 3070 ldrb.w r3, [r3, #112] ; 0x70
- 8008378: 2b01 cmp r3, #1
- 800837a: d101 bne.n 8008380 <HAL_UART_Receive_DMA+0x34>
- 800837c: 2302 movs r3, #2
- 800837e: e05e b.n 800843e <HAL_UART_Receive_DMA+0xf2>
- 8008380: 68fb ldr r3, [r7, #12]
- 8008382: 2201 movs r2, #1
- 8008384: f883 2070 strb.w r2, [r3, #112] ; 0x70
-
- huart->pRxBuffPtr = pData;
- 8008388: 68fb ldr r3, [r7, #12]
- 800838a: 68ba ldr r2, [r7, #8]
- 800838c: 655a str r2, [r3, #84] ; 0x54
- huart->RxXferSize = Size;
- 800838e: 68fb ldr r3, [r7, #12]
- 8008390: 88fa ldrh r2, [r7, #6]
- 8008392: f8a3 2058 strh.w r2, [r3, #88] ; 0x58
-
- huart->ErrorCode = HAL_UART_ERROR_NONE;
- 8008396: 68fb ldr r3, [r7, #12]
- 8008398: 2200 movs r2, #0
- 800839a: 67da str r2, [r3, #124] ; 0x7c
- huart->RxState = HAL_UART_STATE_BUSY_RX;
- 800839c: 68fb ldr r3, [r7, #12]
- 800839e: 2222 movs r2, #34 ; 0x22
- 80083a0: 679a str r2, [r3, #120] ; 0x78
-
- if (huart->hdmarx != NULL)
- 80083a2: 68fb ldr r3, [r7, #12]
- 80083a4: 6edb ldr r3, [r3, #108] ; 0x6c
- 80083a6: 2b00 cmp r3, #0
- 80083a8: d02a beq.n 8008400 <HAL_UART_Receive_DMA+0xb4>
- {
- /* Set the UART DMA transfer complete callback */
- huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt;
- 80083aa: 68fb ldr r3, [r7, #12]
- 80083ac: 6edb ldr r3, [r3, #108] ; 0x6c
- 80083ae: 4a26 ldr r2, [pc, #152] ; (8008448 <HAL_UART_Receive_DMA+0xfc>)
- 80083b0: 63da str r2, [r3, #60] ; 0x3c
-
- /* Set the UART DMA Half transfer complete callback */
- huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt;
- 80083b2: 68fb ldr r3, [r7, #12]
- 80083b4: 6edb ldr r3, [r3, #108] ; 0x6c
- 80083b6: 4a25 ldr r2, [pc, #148] ; (800844c <HAL_UART_Receive_DMA+0x100>)
- 80083b8: 641a str r2, [r3, #64] ; 0x40
-
- /* Set the DMA error callback */
- huart->hdmarx->XferErrorCallback = UART_DMAError;
- 80083ba: 68fb ldr r3, [r7, #12]
- 80083bc: 6edb ldr r3, [r3, #108] ; 0x6c
- 80083be: 4a24 ldr r2, [pc, #144] ; (8008450 <HAL_UART_Receive_DMA+0x104>)
- 80083c0: 64da str r2, [r3, #76] ; 0x4c
-
- /* Set the DMA abort callback */
- huart->hdmarx->XferAbortCallback = NULL;
- 80083c2: 68fb ldr r3, [r7, #12]
- 80083c4: 6edb ldr r3, [r3, #108] ; 0x6c
- 80083c6: 2200 movs r2, #0
- 80083c8: 651a str r2, [r3, #80] ; 0x50
-
- /* Enable the DMA channel */
- if (HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->RDR, (uint32_t)huart->pRxBuffPtr, Size) != HAL_OK)
- 80083ca: 68fb ldr r3, [r7, #12]
- 80083cc: 6ed8 ldr r0, [r3, #108] ; 0x6c
- 80083ce: 68fb ldr r3, [r7, #12]
- 80083d0: 681b ldr r3, [r3, #0]
- 80083d2: 3324 adds r3, #36 ; 0x24
- 80083d4: 4619 mov r1, r3
- 80083d6: 68fb ldr r3, [r7, #12]
- 80083d8: 6d5b ldr r3, [r3, #84] ; 0x54
- 80083da: 461a mov r2, r3
- 80083dc: 88fb ldrh r3, [r7, #6]
- 80083de: f7fd f95d bl 800569c <HAL_DMA_Start_IT>
- 80083e2: 4603 mov r3, r0
- 80083e4: 2b00 cmp r3, #0
- 80083e6: d00b beq.n 8008400 <HAL_UART_Receive_DMA+0xb4>
- {
- /* Set error code to DMA */
- huart->ErrorCode = HAL_UART_ERROR_DMA;
- 80083e8: 68fb ldr r3, [r7, #12]
- 80083ea: 2210 movs r2, #16
- 80083ec: 67da str r2, [r3, #124] ; 0x7c
-
- /* Process Unlocked */
- __HAL_UNLOCK(huart);
- 80083ee: 68fb ldr r3, [r7, #12]
- 80083f0: 2200 movs r2, #0
- 80083f2: f883 2070 strb.w r2, [r3, #112] ; 0x70
-
- /* Restore huart->gState to ready */
- huart->gState = HAL_UART_STATE_READY;
- 80083f6: 68fb ldr r3, [r7, #12]
- 80083f8: 2220 movs r2, #32
- 80083fa: 675a str r2, [r3, #116] ; 0x74
-
- return HAL_ERROR;
- 80083fc: 2301 movs r3, #1
- 80083fe: e01e b.n 800843e <HAL_UART_Receive_DMA+0xf2>
- }
- }
- /* Process Unlocked */
- __HAL_UNLOCK(huart);
- 8008400: 68fb ldr r3, [r7, #12]
- 8008402: 2200 movs r2, #0
- 8008404: f883 2070 strb.w r2, [r3, #112] ; 0x70
-
- /* Enable the UART Parity Error Interrupt */
- SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
- 8008408: 68fb ldr r3, [r7, #12]
- 800840a: 681b ldr r3, [r3, #0]
- 800840c: 681a ldr r2, [r3, #0]
- 800840e: 68fb ldr r3, [r7, #12]
- 8008410: 681b ldr r3, [r3, #0]
- 8008412: f442 7280 orr.w r2, r2, #256 ; 0x100
- 8008416: 601a str r2, [r3, #0]
-
- /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
- SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
- 8008418: 68fb ldr r3, [r7, #12]
- 800841a: 681b ldr r3, [r3, #0]
- 800841c: 689a ldr r2, [r3, #8]
- 800841e: 68fb ldr r3, [r7, #12]
- 8008420: 681b ldr r3, [r3, #0]
- 8008422: f042 0201 orr.w r2, r2, #1
- 8008426: 609a str r2, [r3, #8]
-
- /* Enable the DMA transfer for the receiver request by setting the DMAR bit
- in the UART CR3 register */
- SET_BIT(huart->Instance->CR3, USART_CR3_DMAR);
- 8008428: 68fb ldr r3, [r7, #12]
- 800842a: 681b ldr r3, [r3, #0]
- 800842c: 689a ldr r2, [r3, #8]
- 800842e: 68fb ldr r3, [r7, #12]
- 8008430: 681b ldr r3, [r3, #0]
- 8008432: f042 0240 orr.w r2, r2, #64 ; 0x40
- 8008436: 609a str r2, [r3, #8]
-
- return HAL_OK;
- 8008438: 2300 movs r3, #0
- 800843a: e000 b.n 800843e <HAL_UART_Receive_DMA+0xf2>
- }
- else
- {
- return HAL_BUSY;
- 800843c: 2302 movs r3, #2
- }
-}
- 800843e: 4618 mov r0, r3
- 8008440: 3710 adds r7, #16
- 8008442: 46bd mov sp, r7
- 8008444: bd80 pop {r7, pc}
- 8008446: bf00 nop
- 8008448: 08008f19 .word 0x08008f19
- 800844c: 08008f7d .word 0x08008f7d
- 8008450: 08008f99 .word 0x08008f99
-
-08008454 <HAL_UART_IRQHandler>:
- * @brief Handle UART interrupt request.
- * @param huart UART handle.
- * @retval None
- */
-void HAL_UART_IRQHandler(UART_HandleTypeDef *huart)
-{
- 8008454: b580 push {r7, lr}
- 8008456: b088 sub sp, #32
- 8008458: af00 add r7, sp, #0
- 800845a: 6078 str r0, [r7, #4]
- uint32_t isrflags = READ_REG(huart->Instance->ISR);
- 800845c: 687b ldr r3, [r7, #4]
- 800845e: 681b ldr r3, [r3, #0]
- 8008460: 69db ldr r3, [r3, #28]
- 8008462: 61fb str r3, [r7, #28]
- uint32_t cr1its = READ_REG(huart->Instance->CR1);
- 8008464: 687b ldr r3, [r7, #4]
- 8008466: 681b ldr r3, [r3, #0]
- 8008468: 681b ldr r3, [r3, #0]
- 800846a: 61bb str r3, [r7, #24]
- uint32_t cr3its = READ_REG(huart->Instance->CR3);
- 800846c: 687b ldr r3, [r7, #4]
- 800846e: 681b ldr r3, [r3, #0]
- 8008470: 689b ldr r3, [r3, #8]
- 8008472: 617b str r3, [r7, #20]
-
- uint32_t errorflags;
- uint32_t errorcode;
-
- /* If no error occurs */
- errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE));
- 8008474: 69fb ldr r3, [r7, #28]
- 8008476: f003 030f and.w r3, r3, #15
- 800847a: 613b str r3, [r7, #16]
- if (errorflags == 0U)
- 800847c: 693b ldr r3, [r7, #16]
- 800847e: 2b00 cmp r3, #0
- 8008480: d113 bne.n 80084aa <HAL_UART_IRQHandler+0x56>
- {
- /* UART in mode Receiver ---------------------------------------------------*/
- if (((isrflags & USART_ISR_RXNE) != 0U)
- 8008482: 69fb ldr r3, [r7, #28]
- 8008484: f003 0320 and.w r3, r3, #32
- 8008488: 2b00 cmp r3, #0
- 800848a: d00e beq.n 80084aa <HAL_UART_IRQHandler+0x56>
- && ((cr1its & USART_CR1_RXNEIE) != 0U))
- 800848c: 69bb ldr r3, [r7, #24]
- 800848e: f003 0320 and.w r3, r3, #32
- 8008492: 2b00 cmp r3, #0
- 8008494: d009 beq.n 80084aa <HAL_UART_IRQHandler+0x56>
- {
- if (huart->RxISR != NULL)
- 8008496: 687b ldr r3, [r7, #4]
- 8008498: 6e1b ldr r3, [r3, #96] ; 0x60
- 800849a: 2b00 cmp r3, #0
- 800849c: f000 80eb beq.w 8008676 <HAL_UART_IRQHandler+0x222>
- {
- huart->RxISR(huart);
- 80084a0: 687b ldr r3, [r7, #4]
- 80084a2: 6e1b ldr r3, [r3, #96] ; 0x60
- 80084a4: 6878 ldr r0, [r7, #4]
- 80084a6: 4798 blx r3
- }
- return;
- 80084a8: e0e5 b.n 8008676 <HAL_UART_IRQHandler+0x222>
- }
- }
-
- /* If some errors occur */
- if ((errorflags != 0U)
- 80084aa: 693b ldr r3, [r7, #16]
- 80084ac: 2b00 cmp r3, #0
- 80084ae: f000 80c0 beq.w 8008632 <HAL_UART_IRQHandler+0x1de>
- && (((cr3its & USART_CR3_EIE) != 0U)
- 80084b2: 697b ldr r3, [r7, #20]
- 80084b4: f003 0301 and.w r3, r3, #1
- 80084b8: 2b00 cmp r3, #0
- 80084ba: d105 bne.n 80084c8 <HAL_UART_IRQHandler+0x74>
- || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != 0U)))
- 80084bc: 69bb ldr r3, [r7, #24]
- 80084be: f403 7390 and.w r3, r3, #288 ; 0x120
- 80084c2: 2b00 cmp r3, #0
- 80084c4: f000 80b5 beq.w 8008632 <HAL_UART_IRQHandler+0x1de>
- {
- /* UART parity error interrupt occurred -------------------------------------*/
- if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U))
- 80084c8: 69fb ldr r3, [r7, #28]
- 80084ca: f003 0301 and.w r3, r3, #1
- 80084ce: 2b00 cmp r3, #0
- 80084d0: d00e beq.n 80084f0 <HAL_UART_IRQHandler+0x9c>
- 80084d2: 69bb ldr r3, [r7, #24]
- 80084d4: f403 7380 and.w r3, r3, #256 ; 0x100
- 80084d8: 2b00 cmp r3, #0
- 80084da: d009 beq.n 80084f0 <HAL_UART_IRQHandler+0x9c>
- {
- __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF);
- 80084dc: 687b ldr r3, [r7, #4]
- 80084de: 681b ldr r3, [r3, #0]
- 80084e0: 2201 movs r2, #1
- 80084e2: 621a str r2, [r3, #32]
-
- huart->ErrorCode |= HAL_UART_ERROR_PE;
- 80084e4: 687b ldr r3, [r7, #4]
- 80084e6: 6fdb ldr r3, [r3, #124] ; 0x7c
- 80084e8: f043 0201 orr.w r2, r3, #1
- 80084ec: 687b ldr r3, [r7, #4]
- 80084ee: 67da str r2, [r3, #124] ; 0x7c
- }
-
- /* UART frame error interrupt occurred --------------------------------------*/
- if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
- 80084f0: 69fb ldr r3, [r7, #28]
- 80084f2: f003 0302 and.w r3, r3, #2
- 80084f6: 2b00 cmp r3, #0
- 80084f8: d00e beq.n 8008518 <HAL_UART_IRQHandler+0xc4>
- 80084fa: 697b ldr r3, [r7, #20]
- 80084fc: f003 0301 and.w r3, r3, #1
- 8008500: 2b00 cmp r3, #0
- 8008502: d009 beq.n 8008518 <HAL_UART_IRQHandler+0xc4>
- {
- __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF);
- 8008504: 687b ldr r3, [r7, #4]
- 8008506: 681b ldr r3, [r3, #0]
- 8008508: 2202 movs r2, #2
- 800850a: 621a str r2, [r3, #32]
-
- huart->ErrorCode |= HAL_UART_ERROR_FE;
- 800850c: 687b ldr r3, [r7, #4]
- 800850e: 6fdb ldr r3, [r3, #124] ; 0x7c
- 8008510: f043 0204 orr.w r2, r3, #4
- 8008514: 687b ldr r3, [r7, #4]
- 8008516: 67da str r2, [r3, #124] ; 0x7c
- }
-
- /* UART noise error interrupt occurred --------------------------------------*/
- if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
- 8008518: 69fb ldr r3, [r7, #28]
- 800851a: f003 0304 and.w r3, r3, #4
- 800851e: 2b00 cmp r3, #0
- 8008520: d00e beq.n 8008540 <HAL_UART_IRQHandler+0xec>
- 8008522: 697b ldr r3, [r7, #20]
- 8008524: f003 0301 and.w r3, r3, #1
- 8008528: 2b00 cmp r3, #0
- 800852a: d009 beq.n 8008540 <HAL_UART_IRQHandler+0xec>
- {
- __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF);
- 800852c: 687b ldr r3, [r7, #4]
- 800852e: 681b ldr r3, [r3, #0]
- 8008530: 2204 movs r2, #4
- 8008532: 621a str r2, [r3, #32]
-
- huart->ErrorCode |= HAL_UART_ERROR_NE;
- 8008534: 687b ldr r3, [r7, #4]
- 8008536: 6fdb ldr r3, [r3, #124] ; 0x7c
- 8008538: f043 0202 orr.w r2, r3, #2
- 800853c: 687b ldr r3, [r7, #4]
- 800853e: 67da str r2, [r3, #124] ; 0x7c
- }
-
- /* UART Over-Run interrupt occurred -----------------------------------------*/
- if (((isrflags & USART_ISR_ORE) != 0U)
- 8008540: 69fb ldr r3, [r7, #28]
- 8008542: f003 0308 and.w r3, r3, #8
- 8008546: 2b00 cmp r3, #0
- 8008548: d013 beq.n 8008572 <HAL_UART_IRQHandler+0x11e>
- && (((cr1its & USART_CR1_RXNEIE) != 0U) ||
- 800854a: 69bb ldr r3, [r7, #24]
- 800854c: f003 0320 and.w r3, r3, #32
- 8008550: 2b00 cmp r3, #0
- 8008552: d104 bne.n 800855e <HAL_UART_IRQHandler+0x10a>
- ((cr3its & USART_CR3_EIE) != 0U)))
- 8008554: 697b ldr r3, [r7, #20]
- 8008556: f003 0301 and.w r3, r3, #1
- && (((cr1its & USART_CR1_RXNEIE) != 0U) ||
- 800855a: 2b00 cmp r3, #0
- 800855c: d009 beq.n 8008572 <HAL_UART_IRQHandler+0x11e>
- {
- __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF);
- 800855e: 687b ldr r3, [r7, #4]
- 8008560: 681b ldr r3, [r3, #0]
- 8008562: 2208 movs r2, #8
- 8008564: 621a str r2, [r3, #32]
-
- huart->ErrorCode |= HAL_UART_ERROR_ORE;
- 8008566: 687b ldr r3, [r7, #4]
- 8008568: 6fdb ldr r3, [r3, #124] ; 0x7c
- 800856a: f043 0208 orr.w r2, r3, #8
- 800856e: 687b ldr r3, [r7, #4]
- 8008570: 67da str r2, [r3, #124] ; 0x7c
- }
-
- /* Call UART Error Call back function if need be --------------------------*/
- if (huart->ErrorCode != HAL_UART_ERROR_NONE)
- 8008572: 687b ldr r3, [r7, #4]
- 8008574: 6fdb ldr r3, [r3, #124] ; 0x7c
- 8008576: 2b00 cmp r3, #0
- 8008578: d07f beq.n 800867a <HAL_UART_IRQHandler+0x226>
- {
- /* UART in mode Receiver ---------------------------------------------------*/
- if (((isrflags & USART_ISR_RXNE) != 0U)
- 800857a: 69fb ldr r3, [r7, #28]
- 800857c: f003 0320 and.w r3, r3, #32
- 8008580: 2b00 cmp r3, #0
- 8008582: d00c beq.n 800859e <HAL_UART_IRQHandler+0x14a>
- && ((cr1its & USART_CR1_RXNEIE) != 0U))
- 8008584: 69bb ldr r3, [r7, #24]
- 8008586: f003 0320 and.w r3, r3, #32
- 800858a: 2b00 cmp r3, #0
- 800858c: d007 beq.n 800859e <HAL_UART_IRQHandler+0x14a>
- {
- if (huart->RxISR != NULL)
- 800858e: 687b ldr r3, [r7, #4]
- 8008590: 6e1b ldr r3, [r3, #96] ; 0x60
- 8008592: 2b00 cmp r3, #0
- 8008594: d003 beq.n 800859e <HAL_UART_IRQHandler+0x14a>
- {
- huart->RxISR(huart);
- 8008596: 687b ldr r3, [r7, #4]
- 8008598: 6e1b ldr r3, [r3, #96] ; 0x60
- 800859a: 6878 ldr r0, [r7, #4]
- 800859c: 4798 blx r3
- }
- }
-
- /* If Overrun error occurs, or if any error occurs in DMA mode reception,
- consider error as blocking */
- errorcode = huart->ErrorCode;
- 800859e: 687b ldr r3, [r7, #4]
- 80085a0: 6fdb ldr r3, [r3, #124] ; 0x7c
- 80085a2: 60fb str r3, [r7, #12]
- if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) ||
- 80085a4: 687b ldr r3, [r7, #4]
- 80085a6: 681b ldr r3, [r3, #0]
- 80085a8: 689b ldr r3, [r3, #8]
- 80085aa: f003 0340 and.w r3, r3, #64 ; 0x40
- 80085ae: 2b40 cmp r3, #64 ; 0x40
- 80085b0: d004 beq.n 80085bc <HAL_UART_IRQHandler+0x168>
- ((errorcode & HAL_UART_ERROR_ORE) != 0U))
- 80085b2: 68fb ldr r3, [r7, #12]
- 80085b4: f003 0308 and.w r3, r3, #8
- if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) ||
- 80085b8: 2b00 cmp r3, #0
- 80085ba: d031 beq.n 8008620 <HAL_UART_IRQHandler+0x1cc>
- {
- /* Blocking error : transfer is aborted
- Set the UART state ready to be able to start again the process,
- Disable Rx Interrupts, and disable Rx DMA request, if ongoing */
- UART_EndRxTransfer(huart);
- 80085bc: 6878 ldr r0, [r7, #4]
- 80085be: f000 fc55 bl 8008e6c <UART_EndRxTransfer>
-
- /* Disable the UART DMA Rx request if enabled */
- if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
- 80085c2: 687b ldr r3, [r7, #4]
- 80085c4: 681b ldr r3, [r3, #0]
- 80085c6: 689b ldr r3, [r3, #8]
- 80085c8: f003 0340 and.w r3, r3, #64 ; 0x40
- 80085cc: 2b40 cmp r3, #64 ; 0x40
- 80085ce: d123 bne.n 8008618 <HAL_UART_IRQHandler+0x1c4>
- {
- CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
- 80085d0: 687b ldr r3, [r7, #4]
- 80085d2: 681b ldr r3, [r3, #0]
- 80085d4: 689a ldr r2, [r3, #8]
- 80085d6: 687b ldr r3, [r7, #4]
- 80085d8: 681b ldr r3, [r3, #0]
- 80085da: f022 0240 bic.w r2, r2, #64 ; 0x40
- 80085de: 609a str r2, [r3, #8]
-
- /* Abort the UART DMA Rx channel */
- if (huart->hdmarx != NULL)
- 80085e0: 687b ldr r3, [r7, #4]
- 80085e2: 6edb ldr r3, [r3, #108] ; 0x6c
- 80085e4: 2b00 cmp r3, #0
- 80085e6: d013 beq.n 8008610 <HAL_UART_IRQHandler+0x1bc>
- {
- /* Set the UART DMA Abort callback :
- will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */
- huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError;
- 80085e8: 687b ldr r3, [r7, #4]
- 80085ea: 6edb ldr r3, [r3, #108] ; 0x6c
- 80085ec: 4a26 ldr r2, [pc, #152] ; (8008688 <HAL_UART_IRQHandler+0x234>)
- 80085ee: 651a str r2, [r3, #80] ; 0x50
-
- /* Abort DMA RX */
- if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
- 80085f0: 687b ldr r3, [r7, #4]
- 80085f2: 6edb ldr r3, [r3, #108] ; 0x6c
- 80085f4: 4618 mov r0, r3
- 80085f6: f7fd f8b1 bl 800575c <HAL_DMA_Abort_IT>
- 80085fa: 4603 mov r3, r0
- 80085fc: 2b00 cmp r3, #0
- 80085fe: d016 beq.n 800862e <HAL_UART_IRQHandler+0x1da>
- {
- /* Call Directly huart->hdmarx->XferAbortCallback function in case of error */
- huart->hdmarx->XferAbortCallback(huart->hdmarx);
- 8008600: 687b ldr r3, [r7, #4]
- 8008602: 6edb ldr r3, [r3, #108] ; 0x6c
- 8008604: 6d1b ldr r3, [r3, #80] ; 0x50
- 8008606: 687a ldr r2, [r7, #4]
- 8008608: 6ed2 ldr r2, [r2, #108] ; 0x6c
- 800860a: 4610 mov r0, r2
- 800860c: 4798 blx r3
- if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
- 800860e: e00e b.n 800862e <HAL_UART_IRQHandler+0x1da>
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /*Call registered error callback*/
- huart->ErrorCallback(huart);
-#else
- /*Call legacy weak error callback*/
- HAL_UART_ErrorCallback(huart);
- 8008610: 6878 ldr r0, [r7, #4]
- 8008612: f000 f84f bl 80086b4 <HAL_UART_ErrorCallback>
- if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
- 8008616: e00a b.n 800862e <HAL_UART_IRQHandler+0x1da>
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /*Call registered error callback*/
- huart->ErrorCallback(huart);
-#else
- /*Call legacy weak error callback*/
- HAL_UART_ErrorCallback(huart);
- 8008618: 6878 ldr r0, [r7, #4]
- 800861a: f000 f84b bl 80086b4 <HAL_UART_ErrorCallback>
- if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
- 800861e: e006 b.n 800862e <HAL_UART_IRQHandler+0x1da>
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /*Call registered error callback*/
- huart->ErrorCallback(huart);
-#else
- /*Call legacy weak error callback*/
- HAL_UART_ErrorCallback(huart);
- 8008620: 6878 ldr r0, [r7, #4]
- 8008622: f000 f847 bl 80086b4 <HAL_UART_ErrorCallback>
-#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
- huart->ErrorCode = HAL_UART_ERROR_NONE;
- 8008626: 687b ldr r3, [r7, #4]
- 8008628: 2200 movs r2, #0
- 800862a: 67da str r2, [r3, #124] ; 0x7c
- }
- }
- return;
- 800862c: e025 b.n 800867a <HAL_UART_IRQHandler+0x226>
- if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
- 800862e: bf00 nop
- return;
- 8008630: e023 b.n 800867a <HAL_UART_IRQHandler+0x226>
-
- } /* End if some error occurs */
-
- /* UART in mode Transmitter ------------------------------------------------*/
- if (((isrflags & USART_ISR_TXE) != 0U)
- 8008632: 69fb ldr r3, [r7, #28]
- 8008634: f003 0380 and.w r3, r3, #128 ; 0x80
- 8008638: 2b00 cmp r3, #0
- 800863a: d00d beq.n 8008658 <HAL_UART_IRQHandler+0x204>
- && ((cr1its & USART_CR1_TXEIE) != 0U))
- 800863c: 69bb ldr r3, [r7, #24]
- 800863e: f003 0380 and.w r3, r3, #128 ; 0x80
- 8008642: 2b00 cmp r3, #0
- 8008644: d008 beq.n 8008658 <HAL_UART_IRQHandler+0x204>
- {
- if (huart->TxISR != NULL)
- 8008646: 687b ldr r3, [r7, #4]
- 8008648: 6e5b ldr r3, [r3, #100] ; 0x64
- 800864a: 2b00 cmp r3, #0
- 800864c: d017 beq.n 800867e <HAL_UART_IRQHandler+0x22a>
- {
- huart->TxISR(huart);
- 800864e: 687b ldr r3, [r7, #4]
- 8008650: 6e5b ldr r3, [r3, #100] ; 0x64
- 8008652: 6878 ldr r0, [r7, #4]
- 8008654: 4798 blx r3
- }
- return;
- 8008656: e012 b.n 800867e <HAL_UART_IRQHandler+0x22a>
- }
-
- /* UART in mode Transmitter (transmission end) -----------------------------*/
- if (((isrflags & USART_ISR_TC) != 0U) && ((cr1its & USART_CR1_TCIE) != 0U))
- 8008658: 69fb ldr r3, [r7, #28]
- 800865a: f003 0340 and.w r3, r3, #64 ; 0x40
- 800865e: 2b00 cmp r3, #0
- 8008660: d00e beq.n 8008680 <HAL_UART_IRQHandler+0x22c>
- 8008662: 69bb ldr r3, [r7, #24]
- 8008664: f003 0340 and.w r3, r3, #64 ; 0x40
- 8008668: 2b00 cmp r3, #0
- 800866a: d009 beq.n 8008680 <HAL_UART_IRQHandler+0x22c>
- {
- UART_EndTransmit_IT(huart);
- 800866c: 6878 ldr r0, [r7, #4]
- 800866e: f000 fce5 bl 800903c <UART_EndTransmit_IT>
- return;
- 8008672: bf00 nop
- 8008674: e004 b.n 8008680 <HAL_UART_IRQHandler+0x22c>
- return;
- 8008676: bf00 nop
- 8008678: e002 b.n 8008680 <HAL_UART_IRQHandler+0x22c>
- return;
- 800867a: bf00 nop
- 800867c: e000 b.n 8008680 <HAL_UART_IRQHandler+0x22c>
- return;
- 800867e: bf00 nop
- }
-
-}
- 8008680: 3720 adds r7, #32
- 8008682: 46bd mov sp, r7
- 8008684: bd80 pop {r7, pc}
- 8008686: bf00 nop
- 8008688: 08009011 .word 0x08009011
-
-0800868c <HAL_UART_TxHalfCpltCallback>:
- * @brief Tx Half Transfer completed callback.
- * @param huart UART handle.
- * @retval None
- */
-__weak void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart)
-{
- 800868c: b480 push {r7}
- 800868e: b083 sub sp, #12
- 8008690: af00 add r7, sp, #0
- 8008692: 6078 str r0, [r7, #4]
- UNUSED(huart);
-
- /* NOTE: This function should not be modified, when the callback is needed,
- the HAL_UART_TxHalfCpltCallback can be implemented in the user file.
- */
-}
- 8008694: bf00 nop
- 8008696: 370c adds r7, #12
- 8008698: 46bd mov sp, r7
- 800869a: f85d 7b04 ldr.w r7, [sp], #4
- 800869e: 4770 bx lr
-
-080086a0 <HAL_UART_RxHalfCpltCallback>:
- * @brief Rx Half Transfer completed callback.
- * @param huart UART handle.
- * @retval None
- */
-__weak void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart)
-{
- 80086a0: b480 push {r7}
- 80086a2: b083 sub sp, #12
- 80086a4: af00 add r7, sp, #0
- 80086a6: 6078 str r0, [r7, #4]
- UNUSED(huart);
-
- /* NOTE: This function should not be modified, when the callback is needed,
- the HAL_UART_RxHalfCpltCallback can be implemented in the user file.
- */
-}
- 80086a8: bf00 nop
- 80086aa: 370c adds r7, #12
- 80086ac: 46bd mov sp, r7
- 80086ae: f85d 7b04 ldr.w r7, [sp], #4
- 80086b2: 4770 bx lr
-
-080086b4 <HAL_UART_ErrorCallback>:
- * @brief UART error callback.
- * @param huart UART handle.
- * @retval None
- */
-__weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
-{
- 80086b4: b480 push {r7}
- 80086b6: b083 sub sp, #12
- 80086b8: af00 add r7, sp, #0
- 80086ba: 6078 str r0, [r7, #4]
- UNUSED(huart);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_UART_ErrorCallback can be implemented in the user file.
- */
-}
- 80086bc: bf00 nop
- 80086be: 370c adds r7, #12
- 80086c0: 46bd mov sp, r7
- 80086c2: f85d 7b04 ldr.w r7, [sp], #4
- 80086c6: 4770 bx lr
-
-080086c8 <UART_SetConfig>:
- * @brief Configure the UART peripheral.
- * @param huart UART handle.
- * @retval HAL status
- */
-HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart)
-{
- 80086c8: b580 push {r7, lr}
- 80086ca: b088 sub sp, #32
- 80086cc: af00 add r7, sp, #0
- 80086ce: 6078 str r0, [r7, #4]
- uint32_t tmpreg;
- uint16_t brrtemp;
- UART_ClockSourceTypeDef clocksource;
- uint32_t usartdiv = 0x00000000U;
- 80086d0: 2300 movs r3, #0
- 80086d2: 61bb str r3, [r7, #24]
- HAL_StatusTypeDef ret = HAL_OK;
- 80086d4: 2300 movs r3, #0
- 80086d6: 75fb strb r3, [r7, #23]
- * the UART Word Length, Parity, Mode and oversampling:
- * set the M bits according to huart->Init.WordLength value
- * set PCE and PS bits according to huart->Init.Parity value
- * set TE and RE bits according to huart->Init.Mode value
- * set OVER8 bit according to huart->Init.OverSampling value */
- tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling ;
- 80086d8: 687b ldr r3, [r7, #4]
- 80086da: 689a ldr r2, [r3, #8]
- 80086dc: 687b ldr r3, [r7, #4]
- 80086de: 691b ldr r3, [r3, #16]
- 80086e0: 431a orrs r2, r3
- 80086e2: 687b ldr r3, [r7, #4]
- 80086e4: 695b ldr r3, [r3, #20]
- 80086e6: 431a orrs r2, r3
- 80086e8: 687b ldr r3, [r7, #4]
- 80086ea: 69db ldr r3, [r3, #28]
- 80086ec: 4313 orrs r3, r2
- 80086ee: 613b str r3, [r7, #16]
- MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg);
- 80086f0: 687b ldr r3, [r7, #4]
- 80086f2: 681b ldr r3, [r3, #0]
- 80086f4: 681a ldr r2, [r3, #0]
- 80086f6: 4bb1 ldr r3, [pc, #708] ; (80089bc <UART_SetConfig+0x2f4>)
- 80086f8: 4013 ands r3, r2
- 80086fa: 687a ldr r2, [r7, #4]
- 80086fc: 6812 ldr r2, [r2, #0]
- 80086fe: 6939 ldr r1, [r7, #16]
- 8008700: 430b orrs r3, r1
- 8008702: 6013 str r3, [r2, #0]
-
- /*-------------------------- USART CR2 Configuration -----------------------*/
- /* Configure the UART Stop Bits: Set STOP[13:12] bits according
- * to huart->Init.StopBits value */
- MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
- 8008704: 687b ldr r3, [r7, #4]
- 8008706: 681b ldr r3, [r3, #0]
- 8008708: 685b ldr r3, [r3, #4]
- 800870a: f423 5140 bic.w r1, r3, #12288 ; 0x3000
- 800870e: 687b ldr r3, [r7, #4]
- 8008710: 68da ldr r2, [r3, #12]
- 8008712: 687b ldr r3, [r7, #4]
- 8008714: 681b ldr r3, [r3, #0]
- 8008716: 430a orrs r2, r1
- 8008718: 605a str r2, [r3, #4]
- /* Configure
- * - UART HardWare Flow Control: set CTSE and RTSE bits according
- * to huart->Init.HwFlowCtl value
- * - one-bit sampling method versus three samples' majority rule according
- * to huart->Init.OneBitSampling (not applicable to LPUART) */
- tmpreg = (uint32_t)huart->Init.HwFlowCtl;
- 800871a: 687b ldr r3, [r7, #4]
- 800871c: 699b ldr r3, [r3, #24]
- 800871e: 613b str r3, [r7, #16]
-
- tmpreg |= huart->Init.OneBitSampling;
- 8008720: 687b ldr r3, [r7, #4]
- 8008722: 6a1b ldr r3, [r3, #32]
- 8008724: 693a ldr r2, [r7, #16]
- 8008726: 4313 orrs r3, r2
- 8008728: 613b str r3, [r7, #16]
- MODIFY_REG(huart->Instance->CR3, USART_CR3_FIELDS, tmpreg);
- 800872a: 687b ldr r3, [r7, #4]
- 800872c: 681b ldr r3, [r3, #0]
- 800872e: 689b ldr r3, [r3, #8]
- 8008730: f423 6130 bic.w r1, r3, #2816 ; 0xb00
- 8008734: 687b ldr r3, [r7, #4]
- 8008736: 681b ldr r3, [r3, #0]
- 8008738: 693a ldr r2, [r7, #16]
- 800873a: 430a orrs r2, r1
- 800873c: 609a str r2, [r3, #8]
-
-
- /*-------------------------- USART BRR Configuration -----------------------*/
- UART_GETCLOCKSOURCE(huart, clocksource);
- 800873e: 687b ldr r3, [r7, #4]
- 8008740: 681b ldr r3, [r3, #0]
- 8008742: 4a9f ldr r2, [pc, #636] ; (80089c0 <UART_SetConfig+0x2f8>)
- 8008744: 4293 cmp r3, r2
- 8008746: d121 bne.n 800878c <UART_SetConfig+0xc4>
- 8008748: 4b9e ldr r3, [pc, #632] ; (80089c4 <UART_SetConfig+0x2fc>)
- 800874a: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 800874e: f003 0303 and.w r3, r3, #3
- 8008752: 2b03 cmp r3, #3
- 8008754: d816 bhi.n 8008784 <UART_SetConfig+0xbc>
- 8008756: a201 add r2, pc, #4 ; (adr r2, 800875c <UART_SetConfig+0x94>)
- 8008758: f852 f023 ldr.w pc, [r2, r3, lsl #2]
- 800875c: 0800876d .word 0x0800876d
- 8008760: 08008779 .word 0x08008779
- 8008764: 08008773 .word 0x08008773
- 8008768: 0800877f .word 0x0800877f
- 800876c: 2301 movs r3, #1
- 800876e: 77fb strb r3, [r7, #31]
- 8008770: e151 b.n 8008a16 <UART_SetConfig+0x34e>
- 8008772: 2302 movs r3, #2
- 8008774: 77fb strb r3, [r7, #31]
- 8008776: e14e b.n 8008a16 <UART_SetConfig+0x34e>
- 8008778: 2304 movs r3, #4
- 800877a: 77fb strb r3, [r7, #31]
- 800877c: e14b b.n 8008a16 <UART_SetConfig+0x34e>
- 800877e: 2308 movs r3, #8
- 8008780: 77fb strb r3, [r7, #31]
- 8008782: e148 b.n 8008a16 <UART_SetConfig+0x34e>
- 8008784: 2310 movs r3, #16
- 8008786: 77fb strb r3, [r7, #31]
- 8008788: bf00 nop
- 800878a: e144 b.n 8008a16 <UART_SetConfig+0x34e>
- 800878c: 687b ldr r3, [r7, #4]
- 800878e: 681b ldr r3, [r3, #0]
- 8008790: 4a8d ldr r2, [pc, #564] ; (80089c8 <UART_SetConfig+0x300>)
- 8008792: 4293 cmp r3, r2
- 8008794: d134 bne.n 8008800 <UART_SetConfig+0x138>
- 8008796: 4b8b ldr r3, [pc, #556] ; (80089c4 <UART_SetConfig+0x2fc>)
- 8008798: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 800879c: f003 030c and.w r3, r3, #12
- 80087a0: 2b0c cmp r3, #12
- 80087a2: d829 bhi.n 80087f8 <UART_SetConfig+0x130>
- 80087a4: a201 add r2, pc, #4 ; (adr r2, 80087ac <UART_SetConfig+0xe4>)
- 80087a6: f852 f023 ldr.w pc, [r2, r3, lsl #2]
- 80087aa: bf00 nop
- 80087ac: 080087e1 .word 0x080087e1
- 80087b0: 080087f9 .word 0x080087f9
- 80087b4: 080087f9 .word 0x080087f9
- 80087b8: 080087f9 .word 0x080087f9
- 80087bc: 080087ed .word 0x080087ed
- 80087c0: 080087f9 .word 0x080087f9
- 80087c4: 080087f9 .word 0x080087f9
- 80087c8: 080087f9 .word 0x080087f9
- 80087cc: 080087e7 .word 0x080087e7
- 80087d0: 080087f9 .word 0x080087f9
- 80087d4: 080087f9 .word 0x080087f9
- 80087d8: 080087f9 .word 0x080087f9
- 80087dc: 080087f3 .word 0x080087f3
- 80087e0: 2300 movs r3, #0
- 80087e2: 77fb strb r3, [r7, #31]
- 80087e4: e117 b.n 8008a16 <UART_SetConfig+0x34e>
- 80087e6: 2302 movs r3, #2
- 80087e8: 77fb strb r3, [r7, #31]
- 80087ea: e114 b.n 8008a16 <UART_SetConfig+0x34e>
- 80087ec: 2304 movs r3, #4
- 80087ee: 77fb strb r3, [r7, #31]
- 80087f0: e111 b.n 8008a16 <UART_SetConfig+0x34e>
- 80087f2: 2308 movs r3, #8
- 80087f4: 77fb strb r3, [r7, #31]
- 80087f6: e10e b.n 8008a16 <UART_SetConfig+0x34e>
- 80087f8: 2310 movs r3, #16
- 80087fa: 77fb strb r3, [r7, #31]
- 80087fc: bf00 nop
- 80087fe: e10a b.n 8008a16 <UART_SetConfig+0x34e>
- 8008800: 687b ldr r3, [r7, #4]
- 8008802: 681b ldr r3, [r3, #0]
- 8008804: 4a71 ldr r2, [pc, #452] ; (80089cc <UART_SetConfig+0x304>)
- 8008806: 4293 cmp r3, r2
- 8008808: d120 bne.n 800884c <UART_SetConfig+0x184>
- 800880a: 4b6e ldr r3, [pc, #440] ; (80089c4 <UART_SetConfig+0x2fc>)
- 800880c: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 8008810: f003 0330 and.w r3, r3, #48 ; 0x30
- 8008814: 2b10 cmp r3, #16
- 8008816: d00f beq.n 8008838 <UART_SetConfig+0x170>
- 8008818: 2b10 cmp r3, #16
- 800881a: d802 bhi.n 8008822 <UART_SetConfig+0x15a>
- 800881c: 2b00 cmp r3, #0
- 800881e: d005 beq.n 800882c <UART_SetConfig+0x164>
- 8008820: e010 b.n 8008844 <UART_SetConfig+0x17c>
- 8008822: 2b20 cmp r3, #32
- 8008824: d005 beq.n 8008832 <UART_SetConfig+0x16a>
- 8008826: 2b30 cmp r3, #48 ; 0x30
- 8008828: d009 beq.n 800883e <UART_SetConfig+0x176>
- 800882a: e00b b.n 8008844 <UART_SetConfig+0x17c>
- 800882c: 2300 movs r3, #0
- 800882e: 77fb strb r3, [r7, #31]
- 8008830: e0f1 b.n 8008a16 <UART_SetConfig+0x34e>
- 8008832: 2302 movs r3, #2
- 8008834: 77fb strb r3, [r7, #31]
- 8008836: e0ee b.n 8008a16 <UART_SetConfig+0x34e>
- 8008838: 2304 movs r3, #4
- 800883a: 77fb strb r3, [r7, #31]
- 800883c: e0eb b.n 8008a16 <UART_SetConfig+0x34e>
- 800883e: 2308 movs r3, #8
- 8008840: 77fb strb r3, [r7, #31]
- 8008842: e0e8 b.n 8008a16 <UART_SetConfig+0x34e>
- 8008844: 2310 movs r3, #16
- 8008846: 77fb strb r3, [r7, #31]
- 8008848: bf00 nop
- 800884a: e0e4 b.n 8008a16 <UART_SetConfig+0x34e>
- 800884c: 687b ldr r3, [r7, #4]
- 800884e: 681b ldr r3, [r3, #0]
- 8008850: 4a5f ldr r2, [pc, #380] ; (80089d0 <UART_SetConfig+0x308>)
- 8008852: 4293 cmp r3, r2
- 8008854: d120 bne.n 8008898 <UART_SetConfig+0x1d0>
- 8008856: 4b5b ldr r3, [pc, #364] ; (80089c4 <UART_SetConfig+0x2fc>)
- 8008858: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 800885c: f003 03c0 and.w r3, r3, #192 ; 0xc0
- 8008860: 2b40 cmp r3, #64 ; 0x40
- 8008862: d00f beq.n 8008884 <UART_SetConfig+0x1bc>
- 8008864: 2b40 cmp r3, #64 ; 0x40
- 8008866: d802 bhi.n 800886e <UART_SetConfig+0x1a6>
- 8008868: 2b00 cmp r3, #0
- 800886a: d005 beq.n 8008878 <UART_SetConfig+0x1b0>
- 800886c: e010 b.n 8008890 <UART_SetConfig+0x1c8>
- 800886e: 2b80 cmp r3, #128 ; 0x80
- 8008870: d005 beq.n 800887e <UART_SetConfig+0x1b6>
- 8008872: 2bc0 cmp r3, #192 ; 0xc0
- 8008874: d009 beq.n 800888a <UART_SetConfig+0x1c2>
- 8008876: e00b b.n 8008890 <UART_SetConfig+0x1c8>
- 8008878: 2300 movs r3, #0
- 800887a: 77fb strb r3, [r7, #31]
- 800887c: e0cb b.n 8008a16 <UART_SetConfig+0x34e>
- 800887e: 2302 movs r3, #2
- 8008880: 77fb strb r3, [r7, #31]
- 8008882: e0c8 b.n 8008a16 <UART_SetConfig+0x34e>
- 8008884: 2304 movs r3, #4
- 8008886: 77fb strb r3, [r7, #31]
- 8008888: e0c5 b.n 8008a16 <UART_SetConfig+0x34e>
- 800888a: 2308 movs r3, #8
- 800888c: 77fb strb r3, [r7, #31]
- 800888e: e0c2 b.n 8008a16 <UART_SetConfig+0x34e>
- 8008890: 2310 movs r3, #16
- 8008892: 77fb strb r3, [r7, #31]
- 8008894: bf00 nop
- 8008896: e0be b.n 8008a16 <UART_SetConfig+0x34e>
- 8008898: 687b ldr r3, [r7, #4]
- 800889a: 681b ldr r3, [r3, #0]
- 800889c: 4a4d ldr r2, [pc, #308] ; (80089d4 <UART_SetConfig+0x30c>)
- 800889e: 4293 cmp r3, r2
- 80088a0: d124 bne.n 80088ec <UART_SetConfig+0x224>
- 80088a2: 4b48 ldr r3, [pc, #288] ; (80089c4 <UART_SetConfig+0x2fc>)
- 80088a4: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 80088a8: f403 7340 and.w r3, r3, #768 ; 0x300
- 80088ac: f5b3 7f80 cmp.w r3, #256 ; 0x100
- 80088b0: d012 beq.n 80088d8 <UART_SetConfig+0x210>
- 80088b2: f5b3 7f80 cmp.w r3, #256 ; 0x100
- 80088b6: d802 bhi.n 80088be <UART_SetConfig+0x1f6>
- 80088b8: 2b00 cmp r3, #0
- 80088ba: d007 beq.n 80088cc <UART_SetConfig+0x204>
- 80088bc: e012 b.n 80088e4 <UART_SetConfig+0x21c>
- 80088be: f5b3 7f00 cmp.w r3, #512 ; 0x200
- 80088c2: d006 beq.n 80088d2 <UART_SetConfig+0x20a>
- 80088c4: f5b3 7f40 cmp.w r3, #768 ; 0x300
- 80088c8: d009 beq.n 80088de <UART_SetConfig+0x216>
- 80088ca: e00b b.n 80088e4 <UART_SetConfig+0x21c>
- 80088cc: 2300 movs r3, #0
- 80088ce: 77fb strb r3, [r7, #31]
- 80088d0: e0a1 b.n 8008a16 <UART_SetConfig+0x34e>
- 80088d2: 2302 movs r3, #2
- 80088d4: 77fb strb r3, [r7, #31]
- 80088d6: e09e b.n 8008a16 <UART_SetConfig+0x34e>
- 80088d8: 2304 movs r3, #4
- 80088da: 77fb strb r3, [r7, #31]
- 80088dc: e09b b.n 8008a16 <UART_SetConfig+0x34e>
- 80088de: 2308 movs r3, #8
- 80088e0: 77fb strb r3, [r7, #31]
- 80088e2: e098 b.n 8008a16 <UART_SetConfig+0x34e>
- 80088e4: 2310 movs r3, #16
- 80088e6: 77fb strb r3, [r7, #31]
- 80088e8: bf00 nop
- 80088ea: e094 b.n 8008a16 <UART_SetConfig+0x34e>
- 80088ec: 687b ldr r3, [r7, #4]
- 80088ee: 681b ldr r3, [r3, #0]
- 80088f0: 4a39 ldr r2, [pc, #228] ; (80089d8 <UART_SetConfig+0x310>)
- 80088f2: 4293 cmp r3, r2
- 80088f4: d124 bne.n 8008940 <UART_SetConfig+0x278>
- 80088f6: 4b33 ldr r3, [pc, #204] ; (80089c4 <UART_SetConfig+0x2fc>)
- 80088f8: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 80088fc: f403 6340 and.w r3, r3, #3072 ; 0xc00
- 8008900: f5b3 6f80 cmp.w r3, #1024 ; 0x400
- 8008904: d012 beq.n 800892c <UART_SetConfig+0x264>
- 8008906: f5b3 6f80 cmp.w r3, #1024 ; 0x400
- 800890a: d802 bhi.n 8008912 <UART_SetConfig+0x24a>
- 800890c: 2b00 cmp r3, #0
- 800890e: d007 beq.n 8008920 <UART_SetConfig+0x258>
- 8008910: e012 b.n 8008938 <UART_SetConfig+0x270>
- 8008912: f5b3 6f00 cmp.w r3, #2048 ; 0x800
- 8008916: d006 beq.n 8008926 <UART_SetConfig+0x25e>
- 8008918: f5b3 6f40 cmp.w r3, #3072 ; 0xc00
- 800891c: d009 beq.n 8008932 <UART_SetConfig+0x26a>
- 800891e: e00b b.n 8008938 <UART_SetConfig+0x270>
- 8008920: 2301 movs r3, #1
- 8008922: 77fb strb r3, [r7, #31]
- 8008924: e077 b.n 8008a16 <UART_SetConfig+0x34e>
- 8008926: 2302 movs r3, #2
- 8008928: 77fb strb r3, [r7, #31]
- 800892a: e074 b.n 8008a16 <UART_SetConfig+0x34e>
- 800892c: 2304 movs r3, #4
- 800892e: 77fb strb r3, [r7, #31]
- 8008930: e071 b.n 8008a16 <UART_SetConfig+0x34e>
- 8008932: 2308 movs r3, #8
- 8008934: 77fb strb r3, [r7, #31]
- 8008936: e06e b.n 8008a16 <UART_SetConfig+0x34e>
- 8008938: 2310 movs r3, #16
- 800893a: 77fb strb r3, [r7, #31]
- 800893c: bf00 nop
- 800893e: e06a b.n 8008a16 <UART_SetConfig+0x34e>
- 8008940: 687b ldr r3, [r7, #4]
- 8008942: 681b ldr r3, [r3, #0]
- 8008944: 4a25 ldr r2, [pc, #148] ; (80089dc <UART_SetConfig+0x314>)
- 8008946: 4293 cmp r3, r2
- 8008948: d124 bne.n 8008994 <UART_SetConfig+0x2cc>
- 800894a: 4b1e ldr r3, [pc, #120] ; (80089c4 <UART_SetConfig+0x2fc>)
- 800894c: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 8008950: f403 5340 and.w r3, r3, #12288 ; 0x3000
- 8008954: f5b3 5f80 cmp.w r3, #4096 ; 0x1000
- 8008958: d012 beq.n 8008980 <UART_SetConfig+0x2b8>
- 800895a: f5b3 5f80 cmp.w r3, #4096 ; 0x1000
- 800895e: d802 bhi.n 8008966 <UART_SetConfig+0x29e>
- 8008960: 2b00 cmp r3, #0
- 8008962: d007 beq.n 8008974 <UART_SetConfig+0x2ac>
- 8008964: e012 b.n 800898c <UART_SetConfig+0x2c4>
- 8008966: f5b3 5f00 cmp.w r3, #8192 ; 0x2000
- 800896a: d006 beq.n 800897a <UART_SetConfig+0x2b2>
- 800896c: f5b3 5f40 cmp.w r3, #12288 ; 0x3000
- 8008970: d009 beq.n 8008986 <UART_SetConfig+0x2be>
- 8008972: e00b b.n 800898c <UART_SetConfig+0x2c4>
- 8008974: 2300 movs r3, #0
- 8008976: 77fb strb r3, [r7, #31]
- 8008978: e04d b.n 8008a16 <UART_SetConfig+0x34e>
- 800897a: 2302 movs r3, #2
- 800897c: 77fb strb r3, [r7, #31]
- 800897e: e04a b.n 8008a16 <UART_SetConfig+0x34e>
- 8008980: 2304 movs r3, #4
- 8008982: 77fb strb r3, [r7, #31]
- 8008984: e047 b.n 8008a16 <UART_SetConfig+0x34e>
- 8008986: 2308 movs r3, #8
- 8008988: 77fb strb r3, [r7, #31]
- 800898a: e044 b.n 8008a16 <UART_SetConfig+0x34e>
- 800898c: 2310 movs r3, #16
- 800898e: 77fb strb r3, [r7, #31]
- 8008990: bf00 nop
- 8008992: e040 b.n 8008a16 <UART_SetConfig+0x34e>
- 8008994: 687b ldr r3, [r7, #4]
- 8008996: 681b ldr r3, [r3, #0]
- 8008998: 4a11 ldr r2, [pc, #68] ; (80089e0 <UART_SetConfig+0x318>)
- 800899a: 4293 cmp r3, r2
- 800899c: d139 bne.n 8008a12 <UART_SetConfig+0x34a>
- 800899e: 4b09 ldr r3, [pc, #36] ; (80089c4 <UART_SetConfig+0x2fc>)
- 80089a0: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 80089a4: f403 4340 and.w r3, r3, #49152 ; 0xc000
- 80089a8: f5b3 4f80 cmp.w r3, #16384 ; 0x4000
- 80089ac: d027 beq.n 80089fe <UART_SetConfig+0x336>
- 80089ae: f5b3 4f80 cmp.w r3, #16384 ; 0x4000
- 80089b2: d817 bhi.n 80089e4 <UART_SetConfig+0x31c>
- 80089b4: 2b00 cmp r3, #0
- 80089b6: d01c beq.n 80089f2 <UART_SetConfig+0x32a>
- 80089b8: e027 b.n 8008a0a <UART_SetConfig+0x342>
- 80089ba: bf00 nop
- 80089bc: efff69f3 .word 0xefff69f3
- 80089c0: 40011000 .word 0x40011000
- 80089c4: 40023800 .word 0x40023800
- 80089c8: 40004400 .word 0x40004400
- 80089cc: 40004800 .word 0x40004800
- 80089d0: 40004c00 .word 0x40004c00
- 80089d4: 40005000 .word 0x40005000
- 80089d8: 40011400 .word 0x40011400
- 80089dc: 40007800 .word 0x40007800
- 80089e0: 40007c00 .word 0x40007c00
- 80089e4: f5b3 4f00 cmp.w r3, #32768 ; 0x8000
- 80089e8: d006 beq.n 80089f8 <UART_SetConfig+0x330>
- 80089ea: f5b3 4f40 cmp.w r3, #49152 ; 0xc000
- 80089ee: d009 beq.n 8008a04 <UART_SetConfig+0x33c>
- 80089f0: e00b b.n 8008a0a <UART_SetConfig+0x342>
- 80089f2: 2300 movs r3, #0
- 80089f4: 77fb strb r3, [r7, #31]
- 80089f6: e00e b.n 8008a16 <UART_SetConfig+0x34e>
- 80089f8: 2302 movs r3, #2
- 80089fa: 77fb strb r3, [r7, #31]
- 80089fc: e00b b.n 8008a16 <UART_SetConfig+0x34e>
- 80089fe: 2304 movs r3, #4
- 8008a00: 77fb strb r3, [r7, #31]
- 8008a02: e008 b.n 8008a16 <UART_SetConfig+0x34e>
- 8008a04: 2308 movs r3, #8
- 8008a06: 77fb strb r3, [r7, #31]
- 8008a08: e005 b.n 8008a16 <UART_SetConfig+0x34e>
- 8008a0a: 2310 movs r3, #16
- 8008a0c: 77fb strb r3, [r7, #31]
- 8008a0e: bf00 nop
- 8008a10: e001 b.n 8008a16 <UART_SetConfig+0x34e>
- 8008a12: 2310 movs r3, #16
- 8008a14: 77fb strb r3, [r7, #31]
-
- if (huart->Init.OverSampling == UART_OVERSAMPLING_8)
- 8008a16: 687b ldr r3, [r7, #4]
- 8008a18: 69db ldr r3, [r3, #28]
- 8008a1a: f5b3 4f00 cmp.w r3, #32768 ; 0x8000
- 8008a1e: d17c bne.n 8008b1a <UART_SetConfig+0x452>
- {
- switch (clocksource)
- 8008a20: 7ffb ldrb r3, [r7, #31]
- 8008a22: 2b08 cmp r3, #8
- 8008a24: d859 bhi.n 8008ada <UART_SetConfig+0x412>
- 8008a26: a201 add r2, pc, #4 ; (adr r2, 8008a2c <UART_SetConfig+0x364>)
- 8008a28: f852 f023 ldr.w pc, [r2, r3, lsl #2]
- 8008a2c: 08008a51 .word 0x08008a51
- 8008a30: 08008a6f .word 0x08008a6f
- 8008a34: 08008a8d .word 0x08008a8d
- 8008a38: 08008adb .word 0x08008adb
- 8008a3c: 08008aa5 .word 0x08008aa5
- 8008a40: 08008adb .word 0x08008adb
- 8008a44: 08008adb .word 0x08008adb
- 8008a48: 08008adb .word 0x08008adb
- 8008a4c: 08008ac3 .word 0x08008ac3
- {
- case UART_CLOCKSOURCE_PCLK1:
- usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate));
- 8008a50: f7fd feea bl 8006828 <HAL_RCC_GetPCLK1Freq>
- 8008a54: 4603 mov r3, r0
- 8008a56: 005a lsls r2, r3, #1
- 8008a58: 687b ldr r3, [r7, #4]
- 8008a5a: 685b ldr r3, [r3, #4]
- 8008a5c: 085b lsrs r3, r3, #1
- 8008a5e: 441a add r2, r3
- 8008a60: 687b ldr r3, [r7, #4]
- 8008a62: 685b ldr r3, [r3, #4]
- 8008a64: fbb2 f3f3 udiv r3, r2, r3
- 8008a68: b29b uxth r3, r3
- 8008a6a: 61bb str r3, [r7, #24]
- break;
- 8008a6c: e038 b.n 8008ae0 <UART_SetConfig+0x418>
- case UART_CLOCKSOURCE_PCLK2:
- usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate));
- 8008a6e: f7fd feef bl 8006850 <HAL_RCC_GetPCLK2Freq>
- 8008a72: 4603 mov r3, r0
- 8008a74: 005a lsls r2, r3, #1
- 8008a76: 687b ldr r3, [r7, #4]
- 8008a78: 685b ldr r3, [r3, #4]
- 8008a7a: 085b lsrs r3, r3, #1
- 8008a7c: 441a add r2, r3
- 8008a7e: 687b ldr r3, [r7, #4]
- 8008a80: 685b ldr r3, [r3, #4]
- 8008a82: fbb2 f3f3 udiv r3, r2, r3
- 8008a86: b29b uxth r3, r3
- 8008a88: 61bb str r3, [r7, #24]
- break;
- 8008a8a: e029 b.n 8008ae0 <UART_SetConfig+0x418>
- case UART_CLOCKSOURCE_HSI:
- usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HSI_VALUE, huart->Init.BaudRate));
- 8008a8c: 687b ldr r3, [r7, #4]
- 8008a8e: 685b ldr r3, [r3, #4]
- 8008a90: 085a lsrs r2, r3, #1
- 8008a92: 4b5d ldr r3, [pc, #372] ; (8008c08 <UART_SetConfig+0x540>)
- 8008a94: 4413 add r3, r2
- 8008a96: 687a ldr r2, [r7, #4]
- 8008a98: 6852 ldr r2, [r2, #4]
- 8008a9a: fbb3 f3f2 udiv r3, r3, r2
- 8008a9e: b29b uxth r3, r3
- 8008aa0: 61bb str r3, [r7, #24]
- break;
- 8008aa2: e01d b.n 8008ae0 <UART_SetConfig+0x418>
- case UART_CLOCKSOURCE_SYSCLK:
- usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HAL_RCC_GetSysClockFreq(), huart->Init.BaudRate));
- 8008aa4: f7fd fe02 bl 80066ac <HAL_RCC_GetSysClockFreq>
- 8008aa8: 4603 mov r3, r0
- 8008aaa: 005a lsls r2, r3, #1
- 8008aac: 687b ldr r3, [r7, #4]
- 8008aae: 685b ldr r3, [r3, #4]
- 8008ab0: 085b lsrs r3, r3, #1
- 8008ab2: 441a add r2, r3
- 8008ab4: 687b ldr r3, [r7, #4]
- 8008ab6: 685b ldr r3, [r3, #4]
- 8008ab8: fbb2 f3f3 udiv r3, r2, r3
- 8008abc: b29b uxth r3, r3
- 8008abe: 61bb str r3, [r7, #24]
- break;
- 8008ac0: e00e b.n 8008ae0 <UART_SetConfig+0x418>
- case UART_CLOCKSOURCE_LSE:
- usartdiv = (uint16_t)(UART_DIV_SAMPLING8(LSE_VALUE, huart->Init.BaudRate));
- 8008ac2: 687b ldr r3, [r7, #4]
- 8008ac4: 685b ldr r3, [r3, #4]
- 8008ac6: 085b lsrs r3, r3, #1
- 8008ac8: f503 3280 add.w r2, r3, #65536 ; 0x10000
- 8008acc: 687b ldr r3, [r7, #4]
- 8008ace: 685b ldr r3, [r3, #4]
- 8008ad0: fbb2 f3f3 udiv r3, r2, r3
- 8008ad4: b29b uxth r3, r3
- 8008ad6: 61bb str r3, [r7, #24]
- break;
- 8008ad8: e002 b.n 8008ae0 <UART_SetConfig+0x418>
- case UART_CLOCKSOURCE_UNDEFINED:
- default:
- ret = HAL_ERROR;
- 8008ada: 2301 movs r3, #1
- 8008adc: 75fb strb r3, [r7, #23]
- break;
- 8008ade: bf00 nop
- }
-
- /* USARTDIV must be greater than or equal to 0d16 */
- if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
- 8008ae0: 69bb ldr r3, [r7, #24]
- 8008ae2: 2b0f cmp r3, #15
- 8008ae4: d916 bls.n 8008b14 <UART_SetConfig+0x44c>
- 8008ae6: 69bb ldr r3, [r7, #24]
- 8008ae8: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
- 8008aec: d212 bcs.n 8008b14 <UART_SetConfig+0x44c>
- {
- brrtemp = (uint16_t)(usartdiv & 0xFFF0U);
- 8008aee: 69bb ldr r3, [r7, #24]
- 8008af0: b29b uxth r3, r3
- 8008af2: f023 030f bic.w r3, r3, #15
- 8008af6: 81fb strh r3, [r7, #14]
- brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U);
- 8008af8: 69bb ldr r3, [r7, #24]
- 8008afa: 085b lsrs r3, r3, #1
- 8008afc: b29b uxth r3, r3
- 8008afe: f003 0307 and.w r3, r3, #7
- 8008b02: b29a uxth r2, r3
- 8008b04: 89fb ldrh r3, [r7, #14]
- 8008b06: 4313 orrs r3, r2
- 8008b08: 81fb strh r3, [r7, #14]
- huart->Instance->BRR = brrtemp;
- 8008b0a: 687b ldr r3, [r7, #4]
- 8008b0c: 681b ldr r3, [r3, #0]
- 8008b0e: 89fa ldrh r2, [r7, #14]
- 8008b10: 60da str r2, [r3, #12]
- 8008b12: e06e b.n 8008bf2 <UART_SetConfig+0x52a>
- }
- else
- {
- ret = HAL_ERROR;
- 8008b14: 2301 movs r3, #1
- 8008b16: 75fb strb r3, [r7, #23]
- 8008b18: e06b b.n 8008bf2 <UART_SetConfig+0x52a>
- }
- }
- else
- {
- switch (clocksource)
- 8008b1a: 7ffb ldrb r3, [r7, #31]
- 8008b1c: 2b08 cmp r3, #8
- 8008b1e: d857 bhi.n 8008bd0 <UART_SetConfig+0x508>
- 8008b20: a201 add r2, pc, #4 ; (adr r2, 8008b28 <UART_SetConfig+0x460>)
- 8008b22: f852 f023 ldr.w pc, [r2, r3, lsl #2]
- 8008b26: bf00 nop
- 8008b28: 08008b4d .word 0x08008b4d
- 8008b2c: 08008b69 .word 0x08008b69
- 8008b30: 08008b85 .word 0x08008b85
- 8008b34: 08008bd1 .word 0x08008bd1
- 8008b38: 08008b9d .word 0x08008b9d
- 8008b3c: 08008bd1 .word 0x08008bd1
- 8008b40: 08008bd1 .word 0x08008bd1
- 8008b44: 08008bd1 .word 0x08008bd1
- 8008b48: 08008bb9 .word 0x08008bb9
- {
- case UART_CLOCKSOURCE_PCLK1:
- usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate));
- 8008b4c: f7fd fe6c bl 8006828 <HAL_RCC_GetPCLK1Freq>
- 8008b50: 4602 mov r2, r0
- 8008b52: 687b ldr r3, [r7, #4]
- 8008b54: 685b ldr r3, [r3, #4]
- 8008b56: 085b lsrs r3, r3, #1
- 8008b58: 441a add r2, r3
- 8008b5a: 687b ldr r3, [r7, #4]
- 8008b5c: 685b ldr r3, [r3, #4]
- 8008b5e: fbb2 f3f3 udiv r3, r2, r3
- 8008b62: b29b uxth r3, r3
- 8008b64: 61bb str r3, [r7, #24]
- break;
- 8008b66: e036 b.n 8008bd6 <UART_SetConfig+0x50e>
- case UART_CLOCKSOURCE_PCLK2:
- usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate));
- 8008b68: f7fd fe72 bl 8006850 <HAL_RCC_GetPCLK2Freq>
- 8008b6c: 4602 mov r2, r0
- 8008b6e: 687b ldr r3, [r7, #4]
- 8008b70: 685b ldr r3, [r3, #4]
- 8008b72: 085b lsrs r3, r3, #1
- 8008b74: 441a add r2, r3
- 8008b76: 687b ldr r3, [r7, #4]
- 8008b78: 685b ldr r3, [r3, #4]
- 8008b7a: fbb2 f3f3 udiv r3, r2, r3
- 8008b7e: b29b uxth r3, r3
- 8008b80: 61bb str r3, [r7, #24]
- break;
- 8008b82: e028 b.n 8008bd6 <UART_SetConfig+0x50e>
- case UART_CLOCKSOURCE_HSI:
- usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HSI_VALUE, huart->Init.BaudRate));
- 8008b84: 687b ldr r3, [r7, #4]
- 8008b86: 685b ldr r3, [r3, #4]
- 8008b88: 085a lsrs r2, r3, #1
- 8008b8a: 4b20 ldr r3, [pc, #128] ; (8008c0c <UART_SetConfig+0x544>)
- 8008b8c: 4413 add r3, r2
- 8008b8e: 687a ldr r2, [r7, #4]
- 8008b90: 6852 ldr r2, [r2, #4]
- 8008b92: fbb3 f3f2 udiv r3, r3, r2
- 8008b96: b29b uxth r3, r3
- 8008b98: 61bb str r3, [r7, #24]
- break;
- 8008b9a: e01c b.n 8008bd6 <UART_SetConfig+0x50e>
- case UART_CLOCKSOURCE_SYSCLK:
- usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetSysClockFreq(), huart->Init.BaudRate));
- 8008b9c: f7fd fd86 bl 80066ac <HAL_RCC_GetSysClockFreq>
- 8008ba0: 4602 mov r2, r0
- 8008ba2: 687b ldr r3, [r7, #4]
- 8008ba4: 685b ldr r3, [r3, #4]
- 8008ba6: 085b lsrs r3, r3, #1
- 8008ba8: 441a add r2, r3
- 8008baa: 687b ldr r3, [r7, #4]
- 8008bac: 685b ldr r3, [r3, #4]
- 8008bae: fbb2 f3f3 udiv r3, r2, r3
- 8008bb2: b29b uxth r3, r3
- 8008bb4: 61bb str r3, [r7, #24]
- break;
- 8008bb6: e00e b.n 8008bd6 <UART_SetConfig+0x50e>
- case UART_CLOCKSOURCE_LSE:
- usartdiv = (uint16_t)(UART_DIV_SAMPLING16(LSE_VALUE, huart->Init.BaudRate));
- 8008bb8: 687b ldr r3, [r7, #4]
- 8008bba: 685b ldr r3, [r3, #4]
- 8008bbc: 085b lsrs r3, r3, #1
- 8008bbe: f503 4200 add.w r2, r3, #32768 ; 0x8000
- 8008bc2: 687b ldr r3, [r7, #4]
- 8008bc4: 685b ldr r3, [r3, #4]
- 8008bc6: fbb2 f3f3 udiv r3, r2, r3
- 8008bca: b29b uxth r3, r3
- 8008bcc: 61bb str r3, [r7, #24]
- break;
- 8008bce: e002 b.n 8008bd6 <UART_SetConfig+0x50e>
- case UART_CLOCKSOURCE_UNDEFINED:
- default:
- ret = HAL_ERROR;
- 8008bd0: 2301 movs r3, #1
- 8008bd2: 75fb strb r3, [r7, #23]
- break;
- 8008bd4: bf00 nop
- }
-
- /* USARTDIV must be greater than or equal to 0d16 */
- if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
- 8008bd6: 69bb ldr r3, [r7, #24]
- 8008bd8: 2b0f cmp r3, #15
- 8008bda: d908 bls.n 8008bee <UART_SetConfig+0x526>
- 8008bdc: 69bb ldr r3, [r7, #24]
- 8008bde: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
- 8008be2: d204 bcs.n 8008bee <UART_SetConfig+0x526>
- {
- huart->Instance->BRR = usartdiv;
- 8008be4: 687b ldr r3, [r7, #4]
- 8008be6: 681b ldr r3, [r3, #0]
- 8008be8: 69ba ldr r2, [r7, #24]
- 8008bea: 60da str r2, [r3, #12]
- 8008bec: e001 b.n 8008bf2 <UART_SetConfig+0x52a>
- }
- else
- {
- ret = HAL_ERROR;
- 8008bee: 2301 movs r3, #1
- 8008bf0: 75fb strb r3, [r7, #23]
- }
- }
-
-
- /* Clear ISR function pointers */
- huart->RxISR = NULL;
- 8008bf2: 687b ldr r3, [r7, #4]
- 8008bf4: 2200 movs r2, #0
- 8008bf6: 661a str r2, [r3, #96] ; 0x60
- huart->TxISR = NULL;
- 8008bf8: 687b ldr r3, [r7, #4]
- 8008bfa: 2200 movs r2, #0
- 8008bfc: 665a str r2, [r3, #100] ; 0x64
-
- return ret;
- 8008bfe: 7dfb ldrb r3, [r7, #23]
-}
- 8008c00: 4618 mov r0, r3
- 8008c02: 3720 adds r7, #32
- 8008c04: 46bd mov sp, r7
- 8008c06: bd80 pop {r7, pc}
- 8008c08: 01e84800 .word 0x01e84800
- 8008c0c: 00f42400 .word 0x00f42400
-
-08008c10 <UART_AdvFeatureConfig>:
- * @brief Configure the UART peripheral advanced features.
- * @param huart UART handle.
- * @retval None
- */
-void UART_AdvFeatureConfig(UART_HandleTypeDef *huart)
-{
- 8008c10: b480 push {r7}
- 8008c12: b083 sub sp, #12
- 8008c14: af00 add r7, sp, #0
- 8008c16: 6078 str r0, [r7, #4]
- /* Check whether the set of advanced features to configure is properly set */
- assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit));
-
- /* if required, configure TX pin active level inversion */
- if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT))
- 8008c18: 687b ldr r3, [r7, #4]
- 8008c1a: 6a5b ldr r3, [r3, #36] ; 0x24
- 8008c1c: f003 0301 and.w r3, r3, #1
- 8008c20: 2b00 cmp r3, #0
- 8008c22: d00a beq.n 8008c3a <UART_AdvFeatureConfig+0x2a>
- {
- assert_param(IS_UART_ADVFEATURE_TXINV(huart->AdvancedInit.TxPinLevelInvert));
- MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert);
- 8008c24: 687b ldr r3, [r7, #4]
- 8008c26: 681b ldr r3, [r3, #0]
- 8008c28: 685b ldr r3, [r3, #4]
- 8008c2a: f423 3100 bic.w r1, r3, #131072 ; 0x20000
- 8008c2e: 687b ldr r3, [r7, #4]
- 8008c30: 6a9a ldr r2, [r3, #40] ; 0x28
- 8008c32: 687b ldr r3, [r7, #4]
- 8008c34: 681b ldr r3, [r3, #0]
- 8008c36: 430a orrs r2, r1
- 8008c38: 605a str r2, [r3, #4]
- }
-
- /* if required, configure RX pin active level inversion */
- if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXINVERT_INIT))
- 8008c3a: 687b ldr r3, [r7, #4]
- 8008c3c: 6a5b ldr r3, [r3, #36] ; 0x24
- 8008c3e: f003 0302 and.w r3, r3, #2
- 8008c42: 2b00 cmp r3, #0
- 8008c44: d00a beq.n 8008c5c <UART_AdvFeatureConfig+0x4c>
- {
- assert_param(IS_UART_ADVFEATURE_RXINV(huart->AdvancedInit.RxPinLevelInvert));
- MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert);
- 8008c46: 687b ldr r3, [r7, #4]
- 8008c48: 681b ldr r3, [r3, #0]
- 8008c4a: 685b ldr r3, [r3, #4]
- 8008c4c: f423 3180 bic.w r1, r3, #65536 ; 0x10000
- 8008c50: 687b ldr r3, [r7, #4]
- 8008c52: 6ada ldr r2, [r3, #44] ; 0x2c
- 8008c54: 687b ldr r3, [r7, #4]
- 8008c56: 681b ldr r3, [r3, #0]
- 8008c58: 430a orrs r2, r1
- 8008c5a: 605a str r2, [r3, #4]
- }
-
- /* if required, configure data inversion */
- if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DATAINVERT_INIT))
- 8008c5c: 687b ldr r3, [r7, #4]
- 8008c5e: 6a5b ldr r3, [r3, #36] ; 0x24
- 8008c60: f003 0304 and.w r3, r3, #4
- 8008c64: 2b00 cmp r3, #0
- 8008c66: d00a beq.n 8008c7e <UART_AdvFeatureConfig+0x6e>
- {
- assert_param(IS_UART_ADVFEATURE_DATAINV(huart->AdvancedInit.DataInvert));
- MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert);
- 8008c68: 687b ldr r3, [r7, #4]
- 8008c6a: 681b ldr r3, [r3, #0]
- 8008c6c: 685b ldr r3, [r3, #4]
- 8008c6e: f423 2180 bic.w r1, r3, #262144 ; 0x40000
- 8008c72: 687b ldr r3, [r7, #4]
- 8008c74: 6b1a ldr r2, [r3, #48] ; 0x30
- 8008c76: 687b ldr r3, [r7, #4]
- 8008c78: 681b ldr r3, [r3, #0]
- 8008c7a: 430a orrs r2, r1
- 8008c7c: 605a str r2, [r3, #4]
- }
-
- /* if required, configure RX/TX pins swap */
- if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT))
- 8008c7e: 687b ldr r3, [r7, #4]
- 8008c80: 6a5b ldr r3, [r3, #36] ; 0x24
- 8008c82: f003 0308 and.w r3, r3, #8
- 8008c86: 2b00 cmp r3, #0
- 8008c88: d00a beq.n 8008ca0 <UART_AdvFeatureConfig+0x90>
- {
- assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap));
- MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap);
- 8008c8a: 687b ldr r3, [r7, #4]
- 8008c8c: 681b ldr r3, [r3, #0]
- 8008c8e: 685b ldr r3, [r3, #4]
- 8008c90: f423 4100 bic.w r1, r3, #32768 ; 0x8000
- 8008c94: 687b ldr r3, [r7, #4]
- 8008c96: 6b5a ldr r2, [r3, #52] ; 0x34
- 8008c98: 687b ldr r3, [r7, #4]
- 8008c9a: 681b ldr r3, [r3, #0]
- 8008c9c: 430a orrs r2, r1
- 8008c9e: 605a str r2, [r3, #4]
- }
-
- /* if required, configure RX overrun detection disabling */
- if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT))
- 8008ca0: 687b ldr r3, [r7, #4]
- 8008ca2: 6a5b ldr r3, [r3, #36] ; 0x24
- 8008ca4: f003 0310 and.w r3, r3, #16
- 8008ca8: 2b00 cmp r3, #0
- 8008caa: d00a beq.n 8008cc2 <UART_AdvFeatureConfig+0xb2>
- {
- assert_param(IS_UART_OVERRUN(huart->AdvancedInit.OverrunDisable));
- MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable);
- 8008cac: 687b ldr r3, [r7, #4]
- 8008cae: 681b ldr r3, [r3, #0]
- 8008cb0: 689b ldr r3, [r3, #8]
- 8008cb2: f423 5180 bic.w r1, r3, #4096 ; 0x1000
- 8008cb6: 687b ldr r3, [r7, #4]
- 8008cb8: 6b9a ldr r2, [r3, #56] ; 0x38
- 8008cba: 687b ldr r3, [r7, #4]
- 8008cbc: 681b ldr r3, [r3, #0]
- 8008cbe: 430a orrs r2, r1
- 8008cc0: 609a str r2, [r3, #8]
- }
-
- /* if required, configure DMA disabling on reception error */
- if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DMADISABLEONERROR_INIT))
- 8008cc2: 687b ldr r3, [r7, #4]
- 8008cc4: 6a5b ldr r3, [r3, #36] ; 0x24
- 8008cc6: f003 0320 and.w r3, r3, #32
- 8008cca: 2b00 cmp r3, #0
- 8008ccc: d00a beq.n 8008ce4 <UART_AdvFeatureConfig+0xd4>
- {
- assert_param(IS_UART_ADVFEATURE_DMAONRXERROR(huart->AdvancedInit.DMADisableonRxError));
- MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError);
- 8008cce: 687b ldr r3, [r7, #4]
- 8008cd0: 681b ldr r3, [r3, #0]
- 8008cd2: 689b ldr r3, [r3, #8]
- 8008cd4: f423 5100 bic.w r1, r3, #8192 ; 0x2000
- 8008cd8: 687b ldr r3, [r7, #4]
- 8008cda: 6bda ldr r2, [r3, #60] ; 0x3c
- 8008cdc: 687b ldr r3, [r7, #4]
- 8008cde: 681b ldr r3, [r3, #0]
- 8008ce0: 430a orrs r2, r1
- 8008ce2: 609a str r2, [r3, #8]
- }
-
- /* if required, configure auto Baud rate detection scheme */
- if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_AUTOBAUDRATE_INIT))
- 8008ce4: 687b ldr r3, [r7, #4]
- 8008ce6: 6a5b ldr r3, [r3, #36] ; 0x24
- 8008ce8: f003 0340 and.w r3, r3, #64 ; 0x40
- 8008cec: 2b00 cmp r3, #0
- 8008cee: d01a beq.n 8008d26 <UART_AdvFeatureConfig+0x116>
- {
- assert_param(IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(huart->Instance));
- assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATE(huart->AdvancedInit.AutoBaudRateEnable));
- MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable);
- 8008cf0: 687b ldr r3, [r7, #4]
- 8008cf2: 681b ldr r3, [r3, #0]
- 8008cf4: 685b ldr r3, [r3, #4]
- 8008cf6: f423 1180 bic.w r1, r3, #1048576 ; 0x100000
- 8008cfa: 687b ldr r3, [r7, #4]
- 8008cfc: 6c1a ldr r2, [r3, #64] ; 0x40
- 8008cfe: 687b ldr r3, [r7, #4]
- 8008d00: 681b ldr r3, [r3, #0]
- 8008d02: 430a orrs r2, r1
- 8008d04: 605a str r2, [r3, #4]
- /* set auto Baudrate detection parameters if detection is enabled */
- if (huart->AdvancedInit.AutoBaudRateEnable == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)
- 8008d06: 687b ldr r3, [r7, #4]
- 8008d08: 6c1b ldr r3, [r3, #64] ; 0x40
- 8008d0a: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000
- 8008d0e: d10a bne.n 8008d26 <UART_AdvFeatureConfig+0x116>
- {
- assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(huart->AdvancedInit.AutoBaudRateMode));
- MODIFY_REG(huart->Instance->CR2, USART_CR2_ABRMODE, huart->AdvancedInit.AutoBaudRateMode);
- 8008d10: 687b ldr r3, [r7, #4]
- 8008d12: 681b ldr r3, [r3, #0]
- 8008d14: 685b ldr r3, [r3, #4]
- 8008d16: f423 01c0 bic.w r1, r3, #6291456 ; 0x600000
- 8008d1a: 687b ldr r3, [r7, #4]
- 8008d1c: 6c5a ldr r2, [r3, #68] ; 0x44
- 8008d1e: 687b ldr r3, [r7, #4]
- 8008d20: 681b ldr r3, [r3, #0]
- 8008d22: 430a orrs r2, r1
- 8008d24: 605a str r2, [r3, #4]
- }
- }
-
- /* if required, configure MSB first on communication line */
- if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_MSBFIRST_INIT))
- 8008d26: 687b ldr r3, [r7, #4]
- 8008d28: 6a5b ldr r3, [r3, #36] ; 0x24
- 8008d2a: f003 0380 and.w r3, r3, #128 ; 0x80
- 8008d2e: 2b00 cmp r3, #0
- 8008d30: d00a beq.n 8008d48 <UART_AdvFeatureConfig+0x138>
- {
- assert_param(IS_UART_ADVFEATURE_MSBFIRST(huart->AdvancedInit.MSBFirst));
- MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst);
- 8008d32: 687b ldr r3, [r7, #4]
- 8008d34: 681b ldr r3, [r3, #0]
- 8008d36: 685b ldr r3, [r3, #4]
- 8008d38: f423 2100 bic.w r1, r3, #524288 ; 0x80000
- 8008d3c: 687b ldr r3, [r7, #4]
- 8008d3e: 6c9a ldr r2, [r3, #72] ; 0x48
- 8008d40: 687b ldr r3, [r7, #4]
- 8008d42: 681b ldr r3, [r3, #0]
- 8008d44: 430a orrs r2, r1
- 8008d46: 605a str r2, [r3, #4]
- }
-}
- 8008d48: bf00 nop
- 8008d4a: 370c adds r7, #12
- 8008d4c: 46bd mov sp, r7
- 8008d4e: f85d 7b04 ldr.w r7, [sp], #4
- 8008d52: 4770 bx lr
-
-08008d54 <UART_CheckIdleState>:
- * @brief Check the UART Idle State.
- * @param huart UART handle.
- * @retval HAL status
- */
-HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart)
-{
- 8008d54: b580 push {r7, lr}
- 8008d56: b086 sub sp, #24
- 8008d58: af02 add r7, sp, #8
- 8008d5a: 6078 str r0, [r7, #4]
- uint32_t tickstart;
-
- /* Initialize the UART ErrorCode */
- huart->ErrorCode = HAL_UART_ERROR_NONE;
- 8008d5c: 687b ldr r3, [r7, #4]
- 8008d5e: 2200 movs r2, #0
- 8008d60: 67da str r2, [r3, #124] ; 0x7c
-
- /* Init tickstart for timeout managment*/
- tickstart = HAL_GetTick();
- 8008d62: f7fc faad bl 80052c0 <HAL_GetTick>
- 8008d66: 60f8 str r0, [r7, #12]
-
- /* Check if the Transmitter is enabled */
- if ((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE)
- 8008d68: 687b ldr r3, [r7, #4]
- 8008d6a: 681b ldr r3, [r3, #0]
- 8008d6c: 681b ldr r3, [r3, #0]
- 8008d6e: f003 0308 and.w r3, r3, #8
- 8008d72: 2b08 cmp r3, #8
- 8008d74: d10e bne.n 8008d94 <UART_CheckIdleState+0x40>
- {
- /* Wait until TEACK flag is set */
- if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
- 8008d76: f06f 437e mvn.w r3, #4261412864 ; 0xfe000000
- 8008d7a: 9300 str r3, [sp, #0]
- 8008d7c: 68fb ldr r3, [r7, #12]
- 8008d7e: 2200 movs r2, #0
- 8008d80: f44f 1100 mov.w r1, #2097152 ; 0x200000
- 8008d84: 6878 ldr r0, [r7, #4]
- 8008d86: f000 f814 bl 8008db2 <UART_WaitOnFlagUntilTimeout>
- 8008d8a: 4603 mov r3, r0
- 8008d8c: 2b00 cmp r3, #0
- 8008d8e: d001 beq.n 8008d94 <UART_CheckIdleState+0x40>
- {
- /* Timeout occurred */
- return HAL_TIMEOUT;
- 8008d90: 2303 movs r3, #3
- 8008d92: e00a b.n 8008daa <UART_CheckIdleState+0x56>
- }
- }
-
- /* Initialize the UART State */
- huart->gState = HAL_UART_STATE_READY;
- 8008d94: 687b ldr r3, [r7, #4]
- 8008d96: 2220 movs r2, #32
- 8008d98: 675a str r2, [r3, #116] ; 0x74
- huart->RxState = HAL_UART_STATE_READY;
- 8008d9a: 687b ldr r3, [r7, #4]
- 8008d9c: 2220 movs r2, #32
- 8008d9e: 679a str r2, [r3, #120] ; 0x78
-
- /* Process Unlocked */
- __HAL_UNLOCK(huart);
- 8008da0: 687b ldr r3, [r7, #4]
- 8008da2: 2200 movs r2, #0
- 8008da4: f883 2070 strb.w r2, [r3, #112] ; 0x70
-
- return HAL_OK;
- 8008da8: 2300 movs r3, #0
-}
- 8008daa: 4618 mov r0, r3
- 8008dac: 3710 adds r7, #16
- 8008dae: 46bd mov sp, r7
- 8008db0: bd80 pop {r7, pc}
-
-08008db2 <UART_WaitOnFlagUntilTimeout>:
- * @param Tickstart Tick start value
- * @param Timeout Timeout duration
- * @retval HAL status
- */
-HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout)
-{
- 8008db2: b580 push {r7, lr}
- 8008db4: b084 sub sp, #16
- 8008db6: af00 add r7, sp, #0
- 8008db8: 60f8 str r0, [r7, #12]
- 8008dba: 60b9 str r1, [r7, #8]
- 8008dbc: 603b str r3, [r7, #0]
- 8008dbe: 4613 mov r3, r2
- 8008dc0: 71fb strb r3, [r7, #7]
- /* Wait until flag is set */
- while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
- 8008dc2: e02a b.n 8008e1a <UART_WaitOnFlagUntilTimeout+0x68>
- {
- /* Check for the Timeout */
- if (Timeout != HAL_MAX_DELAY)
- 8008dc4: 69bb ldr r3, [r7, #24]
- 8008dc6: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff
- 8008dca: d026 beq.n 8008e1a <UART_WaitOnFlagUntilTimeout+0x68>
- {
- if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
- 8008dcc: f7fc fa78 bl 80052c0 <HAL_GetTick>
- 8008dd0: 4602 mov r2, r0
- 8008dd2: 683b ldr r3, [r7, #0]
- 8008dd4: 1ad3 subs r3, r2, r3
- 8008dd6: 69ba ldr r2, [r7, #24]
- 8008dd8: 429a cmp r2, r3
- 8008dda: d302 bcc.n 8008de2 <UART_WaitOnFlagUntilTimeout+0x30>
- 8008ddc: 69bb ldr r3, [r7, #24]
- 8008dde: 2b00 cmp r3, #0
- 8008de0: d11b bne.n 8008e1a <UART_WaitOnFlagUntilTimeout+0x68>
- {
- /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
- CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
- 8008de2: 68fb ldr r3, [r7, #12]
- 8008de4: 681b ldr r3, [r3, #0]
- 8008de6: 681a ldr r2, [r3, #0]
- 8008de8: 68fb ldr r3, [r7, #12]
- 8008dea: 681b ldr r3, [r3, #0]
- 8008dec: f422 72d0 bic.w r2, r2, #416 ; 0x1a0
- 8008df0: 601a str r2, [r3, #0]
- CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
- 8008df2: 68fb ldr r3, [r7, #12]
- 8008df4: 681b ldr r3, [r3, #0]
- 8008df6: 689a ldr r2, [r3, #8]
- 8008df8: 68fb ldr r3, [r7, #12]
- 8008dfa: 681b ldr r3, [r3, #0]
- 8008dfc: f022 0201 bic.w r2, r2, #1
- 8008e00: 609a str r2, [r3, #8]
-
- huart->gState = HAL_UART_STATE_READY;
- 8008e02: 68fb ldr r3, [r7, #12]
- 8008e04: 2220 movs r2, #32
- 8008e06: 675a str r2, [r3, #116] ; 0x74
- huart->RxState = HAL_UART_STATE_READY;
- 8008e08: 68fb ldr r3, [r7, #12]
- 8008e0a: 2220 movs r2, #32
- 8008e0c: 679a str r2, [r3, #120] ; 0x78
-
- /* Process Unlocked */
- __HAL_UNLOCK(huart);
- 8008e0e: 68fb ldr r3, [r7, #12]
- 8008e10: 2200 movs r2, #0
- 8008e12: f883 2070 strb.w r2, [r3, #112] ; 0x70
-
- return HAL_TIMEOUT;
- 8008e16: 2303 movs r3, #3
- 8008e18: e00f b.n 8008e3a <UART_WaitOnFlagUntilTimeout+0x88>
- while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
- 8008e1a: 68fb ldr r3, [r7, #12]
- 8008e1c: 681b ldr r3, [r3, #0]
- 8008e1e: 69da ldr r2, [r3, #28]
- 8008e20: 68bb ldr r3, [r7, #8]
- 8008e22: 4013 ands r3, r2
- 8008e24: 68ba ldr r2, [r7, #8]
- 8008e26: 429a cmp r2, r3
- 8008e28: bf0c ite eq
- 8008e2a: 2301 moveq r3, #1
- 8008e2c: 2300 movne r3, #0
- 8008e2e: b2db uxtb r3, r3
- 8008e30: 461a mov r2, r3
- 8008e32: 79fb ldrb r3, [r7, #7]
- 8008e34: 429a cmp r2, r3
- 8008e36: d0c5 beq.n 8008dc4 <UART_WaitOnFlagUntilTimeout+0x12>
- }
- }
- }
- return HAL_OK;
- 8008e38: 2300 movs r3, #0
-}
- 8008e3a: 4618 mov r0, r3
- 8008e3c: 3710 adds r7, #16
- 8008e3e: 46bd mov sp, r7
- 8008e40: bd80 pop {r7, pc}
-
-08008e42 <UART_EndTxTransfer>:
- * @brief End ongoing Tx transfer on UART peripheral (following error detection or Transmit completion).
- * @param huart UART handle.
- * @retval None
- */
-static void UART_EndTxTransfer(UART_HandleTypeDef *huart)
-{
- 8008e42: b480 push {r7}
- 8008e44: b083 sub sp, #12
- 8008e46: af00 add r7, sp, #0
- 8008e48: 6078 str r0, [r7, #4]
- /* Disable TXEIE and TCIE interrupts */
- CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
- 8008e4a: 687b ldr r3, [r7, #4]
- 8008e4c: 681b ldr r3, [r3, #0]
- 8008e4e: 681a ldr r2, [r3, #0]
- 8008e50: 687b ldr r3, [r7, #4]
- 8008e52: 681b ldr r3, [r3, #0]
- 8008e54: f022 02c0 bic.w r2, r2, #192 ; 0xc0
- 8008e58: 601a str r2, [r3, #0]
-
- /* At end of Tx process, restore huart->gState to Ready */
- huart->gState = HAL_UART_STATE_READY;
- 8008e5a: 687b ldr r3, [r7, #4]
- 8008e5c: 2220 movs r2, #32
- 8008e5e: 675a str r2, [r3, #116] ; 0x74
-}
- 8008e60: bf00 nop
- 8008e62: 370c adds r7, #12
- 8008e64: 46bd mov sp, r7
- 8008e66: f85d 7b04 ldr.w r7, [sp], #4
- 8008e6a: 4770 bx lr
-
-08008e6c <UART_EndRxTransfer>:
- * @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion).
- * @param huart UART handle.
- * @retval None
- */
-static void UART_EndRxTransfer(UART_HandleTypeDef *huart)
-{
- 8008e6c: b480 push {r7}
- 8008e6e: b083 sub sp, #12
- 8008e70: af00 add r7, sp, #0
- 8008e72: 6078 str r0, [r7, #4]
- /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
- CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
- 8008e74: 687b ldr r3, [r7, #4]
- 8008e76: 681b ldr r3, [r3, #0]
- 8008e78: 681a ldr r2, [r3, #0]
- 8008e7a: 687b ldr r3, [r7, #4]
- 8008e7c: 681b ldr r3, [r3, #0]
- 8008e7e: f422 7290 bic.w r2, r2, #288 ; 0x120
- 8008e82: 601a str r2, [r3, #0]
- CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
- 8008e84: 687b ldr r3, [r7, #4]
- 8008e86: 681b ldr r3, [r3, #0]
- 8008e88: 689a ldr r2, [r3, #8]
- 8008e8a: 687b ldr r3, [r7, #4]
- 8008e8c: 681b ldr r3, [r3, #0]
- 8008e8e: f022 0201 bic.w r2, r2, #1
- 8008e92: 609a str r2, [r3, #8]
-
- /* At end of Rx process, restore huart->RxState to Ready */
- huart->RxState = HAL_UART_STATE_READY;
- 8008e94: 687b ldr r3, [r7, #4]
- 8008e96: 2220 movs r2, #32
- 8008e98: 679a str r2, [r3, #120] ; 0x78
-
- /* Reset RxIsr function pointer */
- huart->RxISR = NULL;
- 8008e9a: 687b ldr r3, [r7, #4]
- 8008e9c: 2200 movs r2, #0
- 8008e9e: 661a str r2, [r3, #96] ; 0x60
-}
- 8008ea0: bf00 nop
- 8008ea2: 370c adds r7, #12
- 8008ea4: 46bd mov sp, r7
- 8008ea6: f85d 7b04 ldr.w r7, [sp], #4
- 8008eaa: 4770 bx lr
-
-08008eac <UART_DMATransmitCplt>:
- * @brief DMA UART transmit process complete callback.
- * @param hdma DMA handle.
- * @retval None
- */
-static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma)
-{
- 8008eac: b580 push {r7, lr}
- 8008eae: b084 sub sp, #16
- 8008eb0: af00 add r7, sp, #0
- 8008eb2: 6078 str r0, [r7, #4]
- UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
- 8008eb4: 687b ldr r3, [r7, #4]
- 8008eb6: 6b9b ldr r3, [r3, #56] ; 0x38
- 8008eb8: 60fb str r3, [r7, #12]
-
- /* DMA Normal mode */
- if (hdma->Init.Mode != DMA_CIRCULAR)
- 8008eba: 687b ldr r3, [r7, #4]
- 8008ebc: 69db ldr r3, [r3, #28]
- 8008ebe: f5b3 7f80 cmp.w r3, #256 ; 0x100
- 8008ec2: d014 beq.n 8008eee <UART_DMATransmitCplt+0x42>
- {
- huart->TxXferCount = 0U;
- 8008ec4: 68fb ldr r3, [r7, #12]
- 8008ec6: 2200 movs r2, #0
- 8008ec8: f8a3 2052 strh.w r2, [r3, #82] ; 0x52
-
- /* Disable the DMA transfer for transmit request by resetting the DMAT bit
- in the UART CR3 register */
- CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
- 8008ecc: 68fb ldr r3, [r7, #12]
- 8008ece: 681b ldr r3, [r3, #0]
- 8008ed0: 689a ldr r2, [r3, #8]
- 8008ed2: 68fb ldr r3, [r7, #12]
- 8008ed4: 681b ldr r3, [r3, #0]
- 8008ed6: f022 0280 bic.w r2, r2, #128 ; 0x80
- 8008eda: 609a str r2, [r3, #8]
-
- /* Enable the UART Transmit Complete Interrupt */
- SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
- 8008edc: 68fb ldr r3, [r7, #12]
- 8008ede: 681b ldr r3, [r3, #0]
- 8008ee0: 681a ldr r2, [r3, #0]
- 8008ee2: 68fb ldr r3, [r7, #12]
- 8008ee4: 681b ldr r3, [r3, #0]
- 8008ee6: f042 0240 orr.w r2, r2, #64 ; 0x40
- 8008eea: 601a str r2, [r3, #0]
-#else
- /*Call legacy weak Tx complete callback*/
- HAL_UART_TxCpltCallback(huart);
-#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
- }
-}
- 8008eec: e002 b.n 8008ef4 <UART_DMATransmitCplt+0x48>
- HAL_UART_TxCpltCallback(huart);
- 8008eee: 68f8 ldr r0, [r7, #12]
- 8008ef0: f7fa fe32 bl 8003b58 <HAL_UART_TxCpltCallback>
-}
- 8008ef4: bf00 nop
- 8008ef6: 3710 adds r7, #16
- 8008ef8: 46bd mov sp, r7
- 8008efa: bd80 pop {r7, pc}
-
-08008efc <UART_DMATxHalfCplt>:
- * @brief DMA UART transmit process half complete callback.
- * @param hdma DMA handle.
- * @retval None
- */
-static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
-{
- 8008efc: b580 push {r7, lr}
- 8008efe: b084 sub sp, #16
- 8008f00: af00 add r7, sp, #0
- 8008f02: 6078 str r0, [r7, #4]
- UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
- 8008f04: 687b ldr r3, [r7, #4]
- 8008f06: 6b9b ldr r3, [r3, #56] ; 0x38
- 8008f08: 60fb str r3, [r7, #12]
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /*Call registered Tx Half complete callback*/
- huart->TxHalfCpltCallback(huart);
-#else
- /*Call legacy weak Tx Half complete callback*/
- HAL_UART_TxHalfCpltCallback(huart);
- 8008f0a: 68f8 ldr r0, [r7, #12]
- 8008f0c: f7ff fbbe bl 800868c <HAL_UART_TxHalfCpltCallback>
-#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
-}
- 8008f10: bf00 nop
- 8008f12: 3710 adds r7, #16
- 8008f14: 46bd mov sp, r7
- 8008f16: bd80 pop {r7, pc}
-
-08008f18 <UART_DMAReceiveCplt>:
- * @brief DMA UART receive process complete callback.
- * @param hdma DMA handle.
- * @retval None
- */
-static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
-{
- 8008f18: b580 push {r7, lr}
- 8008f1a: b084 sub sp, #16
- 8008f1c: af00 add r7, sp, #0
- 8008f1e: 6078 str r0, [r7, #4]
- UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
- 8008f20: 687b ldr r3, [r7, #4]
- 8008f22: 6b9b ldr r3, [r3, #56] ; 0x38
- 8008f24: 60fb str r3, [r7, #12]
-
- /* DMA Normal mode */
- if (hdma->Init.Mode != DMA_CIRCULAR)
- 8008f26: 687b ldr r3, [r7, #4]
- 8008f28: 69db ldr r3, [r3, #28]
- 8008f2a: f5b3 7f80 cmp.w r3, #256 ; 0x100
- 8008f2e: d01e beq.n 8008f6e <UART_DMAReceiveCplt+0x56>
- {
- huart->RxXferCount = 0U;
- 8008f30: 68fb ldr r3, [r7, #12]
- 8008f32: 2200 movs r2, #0
- 8008f34: f8a3 205a strh.w r2, [r3, #90] ; 0x5a
-
- /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
- CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
- 8008f38: 68fb ldr r3, [r7, #12]
- 8008f3a: 681b ldr r3, [r3, #0]
- 8008f3c: 681a ldr r2, [r3, #0]
- 8008f3e: 68fb ldr r3, [r7, #12]
- 8008f40: 681b ldr r3, [r3, #0]
- 8008f42: f422 7280 bic.w r2, r2, #256 ; 0x100
- 8008f46: 601a str r2, [r3, #0]
- CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
- 8008f48: 68fb ldr r3, [r7, #12]
- 8008f4a: 681b ldr r3, [r3, #0]
- 8008f4c: 689a ldr r2, [r3, #8]
- 8008f4e: 68fb ldr r3, [r7, #12]
- 8008f50: 681b ldr r3, [r3, #0]
- 8008f52: f022 0201 bic.w r2, r2, #1
- 8008f56: 609a str r2, [r3, #8]
-
- /* Disable the DMA transfer for the receiver request by resetting the DMAR bit
- in the UART CR3 register */
- CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
- 8008f58: 68fb ldr r3, [r7, #12]
- 8008f5a: 681b ldr r3, [r3, #0]
- 8008f5c: 689a ldr r2, [r3, #8]
- 8008f5e: 68fb ldr r3, [r7, #12]
- 8008f60: 681b ldr r3, [r3, #0]
- 8008f62: f022 0240 bic.w r2, r2, #64 ; 0x40
- 8008f66: 609a str r2, [r3, #8]
-
- /* At end of Rx process, restore huart->RxState to Ready */
- huart->RxState = HAL_UART_STATE_READY;
- 8008f68: 68fb ldr r3, [r7, #12]
- 8008f6a: 2220 movs r2, #32
- 8008f6c: 679a str r2, [r3, #120] ; 0x78
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /*Call registered Rx complete callback*/
- huart->RxCpltCallback(huart);
-#else
- /*Call legacy weak Rx complete callback*/
- HAL_UART_RxCpltCallback(huart);
- 8008f6e: 68f8 ldr r0, [r7, #12]
- 8008f70: f7fa fe04 bl 8003b7c <HAL_UART_RxCpltCallback>
-#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
-}
- 8008f74: bf00 nop
- 8008f76: 3710 adds r7, #16
- 8008f78: 46bd mov sp, r7
- 8008f7a: bd80 pop {r7, pc}
-
-08008f7c <UART_DMARxHalfCplt>:
- * @brief DMA UART receive process half complete callback.
- * @param hdma DMA handle.
- * @retval None
- */
-static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
-{
- 8008f7c: b580 push {r7, lr}
- 8008f7e: b084 sub sp, #16
- 8008f80: af00 add r7, sp, #0
- 8008f82: 6078 str r0, [r7, #4]
- UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
- 8008f84: 687b ldr r3, [r7, #4]
- 8008f86: 6b9b ldr r3, [r3, #56] ; 0x38
- 8008f88: 60fb str r3, [r7, #12]
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /*Call registered Rx Half complete callback*/
- huart->RxHalfCpltCallback(huart);
-#else
- /*Call legacy weak Rx Half complete callback*/
- HAL_UART_RxHalfCpltCallback(huart);
- 8008f8a: 68f8 ldr r0, [r7, #12]
- 8008f8c: f7ff fb88 bl 80086a0 <HAL_UART_RxHalfCpltCallback>
-#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
-}
- 8008f90: bf00 nop
- 8008f92: 3710 adds r7, #16
- 8008f94: 46bd mov sp, r7
- 8008f96: bd80 pop {r7, pc}
-
-08008f98 <UART_DMAError>:
- * @brief DMA UART communication error callback.
- * @param hdma DMA handle.
- * @retval None
- */
-static void UART_DMAError(DMA_HandleTypeDef *hdma)
-{
- 8008f98: b580 push {r7, lr}
- 8008f9a: b086 sub sp, #24
- 8008f9c: af00 add r7, sp, #0
- 8008f9e: 6078 str r0, [r7, #4]
- UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
- 8008fa0: 687b ldr r3, [r7, #4]
- 8008fa2: 6b9b ldr r3, [r3, #56] ; 0x38
- 8008fa4: 617b str r3, [r7, #20]
-
- const HAL_UART_StateTypeDef gstate = huart->gState;
- 8008fa6: 697b ldr r3, [r7, #20]
- 8008fa8: 6f5b ldr r3, [r3, #116] ; 0x74
- 8008faa: 613b str r3, [r7, #16]
- const HAL_UART_StateTypeDef rxstate = huart->RxState;
- 8008fac: 697b ldr r3, [r7, #20]
- 8008fae: 6f9b ldr r3, [r3, #120] ; 0x78
- 8008fb0: 60fb str r3, [r7, #12]
-
- /* Stop UART DMA Tx request if ongoing */
- if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) &&
- 8008fb2: 697b ldr r3, [r7, #20]
- 8008fb4: 681b ldr r3, [r3, #0]
- 8008fb6: 689b ldr r3, [r3, #8]
- 8008fb8: f003 0380 and.w r3, r3, #128 ; 0x80
- 8008fbc: 2b80 cmp r3, #128 ; 0x80
- 8008fbe: d109 bne.n 8008fd4 <UART_DMAError+0x3c>
- 8008fc0: 693b ldr r3, [r7, #16]
- 8008fc2: 2b21 cmp r3, #33 ; 0x21
- 8008fc4: d106 bne.n 8008fd4 <UART_DMAError+0x3c>
- (gstate == HAL_UART_STATE_BUSY_TX))
- {
- huart->TxXferCount = 0U;
- 8008fc6: 697b ldr r3, [r7, #20]
- 8008fc8: 2200 movs r2, #0
- 8008fca: f8a3 2052 strh.w r2, [r3, #82] ; 0x52
- UART_EndTxTransfer(huart);
- 8008fce: 6978 ldr r0, [r7, #20]
- 8008fd0: f7ff ff37 bl 8008e42 <UART_EndTxTransfer>
- }
-
- /* Stop UART DMA Rx request if ongoing */
- if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) &&
- 8008fd4: 697b ldr r3, [r7, #20]
- 8008fd6: 681b ldr r3, [r3, #0]
- 8008fd8: 689b ldr r3, [r3, #8]
- 8008fda: f003 0340 and.w r3, r3, #64 ; 0x40
- 8008fde: 2b40 cmp r3, #64 ; 0x40
- 8008fe0: d109 bne.n 8008ff6 <UART_DMAError+0x5e>
- 8008fe2: 68fb ldr r3, [r7, #12]
- 8008fe4: 2b22 cmp r3, #34 ; 0x22
- 8008fe6: d106 bne.n 8008ff6 <UART_DMAError+0x5e>
- (rxstate == HAL_UART_STATE_BUSY_RX))
- {
- huart->RxXferCount = 0U;
- 8008fe8: 697b ldr r3, [r7, #20]
- 8008fea: 2200 movs r2, #0
- 8008fec: f8a3 205a strh.w r2, [r3, #90] ; 0x5a
- UART_EndRxTransfer(huart);
- 8008ff0: 6978 ldr r0, [r7, #20]
- 8008ff2: f7ff ff3b bl 8008e6c <UART_EndRxTransfer>
- }
-
- huart->ErrorCode |= HAL_UART_ERROR_DMA;
- 8008ff6: 697b ldr r3, [r7, #20]
- 8008ff8: 6fdb ldr r3, [r3, #124] ; 0x7c
- 8008ffa: f043 0210 orr.w r2, r3, #16
- 8008ffe: 697b ldr r3, [r7, #20]
- 8009000: 67da str r2, [r3, #124] ; 0x7c
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /*Call registered error callback*/
- huart->ErrorCallback(huart);
-#else
- /*Call legacy weak error callback*/
- HAL_UART_ErrorCallback(huart);
- 8009002: 6978 ldr r0, [r7, #20]
- 8009004: f7ff fb56 bl 80086b4 <HAL_UART_ErrorCallback>
-#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
-}
- 8009008: bf00 nop
- 800900a: 3718 adds r7, #24
- 800900c: 46bd mov sp, r7
- 800900e: bd80 pop {r7, pc}
-
-08009010 <UART_DMAAbortOnError>:
- * (To be called at end of DMA Abort procedure following error occurrence).
- * @param hdma DMA handle.
- * @retval None
- */
-static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma)
-{
- 8009010: b580 push {r7, lr}
- 8009012: b084 sub sp, #16
- 8009014: af00 add r7, sp, #0
- 8009016: 6078 str r0, [r7, #4]
- UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
- 8009018: 687b ldr r3, [r7, #4]
- 800901a: 6b9b ldr r3, [r3, #56] ; 0x38
- 800901c: 60fb str r3, [r7, #12]
- huart->RxXferCount = 0U;
- 800901e: 68fb ldr r3, [r7, #12]
- 8009020: 2200 movs r2, #0
- 8009022: f8a3 205a strh.w r2, [r3, #90] ; 0x5a
- huart->TxXferCount = 0U;
- 8009026: 68fb ldr r3, [r7, #12]
- 8009028: 2200 movs r2, #0
- 800902a: f8a3 2052 strh.w r2, [r3, #82] ; 0x52
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /*Call registered error callback*/
- huart->ErrorCallback(huart);
-#else
- /*Call legacy weak error callback*/
- HAL_UART_ErrorCallback(huart);
- 800902e: 68f8 ldr r0, [r7, #12]
- 8009030: f7ff fb40 bl 80086b4 <HAL_UART_ErrorCallback>
-#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
-}
- 8009034: bf00 nop
- 8009036: 3710 adds r7, #16
- 8009038: 46bd mov sp, r7
- 800903a: bd80 pop {r7, pc}
-
-0800903c <UART_EndTransmit_IT>:
- * @param huart pointer to a UART_HandleTypeDef structure that contains
- * the configuration information for the specified UART module.
- * @retval None
- */
-static void UART_EndTransmit_IT(UART_HandleTypeDef *huart)
-{
- 800903c: b580 push {r7, lr}
- 800903e: b082 sub sp, #8
- 8009040: af00 add r7, sp, #0
- 8009042: 6078 str r0, [r7, #4]
- /* Disable the UART Transmit Complete Interrupt */
- CLEAR_BIT(huart->Instance->CR1, USART_CR1_TCIE);
- 8009044: 687b ldr r3, [r7, #4]
- 8009046: 681b ldr r3, [r3, #0]
- 8009048: 681a ldr r2, [r3, #0]
- 800904a: 687b ldr r3, [r7, #4]
- 800904c: 681b ldr r3, [r3, #0]
- 800904e: f022 0240 bic.w r2, r2, #64 ; 0x40
- 8009052: 601a str r2, [r3, #0]
-
- /* Tx process is ended, restore huart->gState to Ready */
- huart->gState = HAL_UART_STATE_READY;
- 8009054: 687b ldr r3, [r7, #4]
- 8009056: 2220 movs r2, #32
- 8009058: 675a str r2, [r3, #116] ; 0x74
-
- /* Cleat TxISR function pointer */
- huart->TxISR = NULL;
- 800905a: 687b ldr r3, [r7, #4]
- 800905c: 2200 movs r2, #0
- 800905e: 665a str r2, [r3, #100] ; 0x64
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /*Call registered Tx complete callback*/
- huart->TxCpltCallback(huart);
-#else
- /*Call legacy weak Tx complete callback*/
- HAL_UART_TxCpltCallback(huart);
- 8009060: 6878 ldr r0, [r7, #4]
- 8009062: f7fa fd79 bl 8003b58 <HAL_UART_TxCpltCallback>
-#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
-}
- 8009066: bf00 nop
- 8009068: 3708 adds r7, #8
- 800906a: 46bd mov sp, r7
- 800906c: bd80 pop {r7, pc}
-
-0800906e <__cxa_pure_virtual>:
- 800906e: b508 push {r3, lr}
- 8009070: f000 f80c bl 800908c <_ZSt9terminatev>
-
-08009074 <_ZN10__cxxabiv111__terminateEPFvvE>:
- 8009074: b508 push {r3, lr}
- 8009076: 4780 blx r0
- 8009078: f001 fbc1 bl 800a7fe <abort>
-
-0800907c <_ZSt13get_terminatev>:
- 800907c: 4b02 ldr r3, [pc, #8] ; (8009088 <_ZSt13get_terminatev+0xc>)
- 800907e: 6818 ldr r0, [r3, #0]
- 8009080: f3bf 8f5b dmb ish
- 8009084: 4770 bx lr
- 8009086: bf00 nop
- 8009088: 2000001c .word 0x2000001c
-
-0800908c <_ZSt9terminatev>:
- 800908c: b508 push {r3, lr}
- 800908e: f7ff fff5 bl 800907c <_ZSt13get_terminatev>
- 8009092: f7ff ffef bl 8009074 <_ZN10__cxxabiv111__terminateEPFvvE>
- ...
-
-08009098 <cos>:
- 8009098: b51f push {r0, r1, r2, r3, r4, lr}
- 800909a: eeb0 7b40 vmov.f64 d7, d0
- 800909e: ee17 3a90 vmov r3, s15
- 80090a2: 4a19 ldr r2, [pc, #100] ; (8009108 <cos+0x70>)
- 80090a4: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000
- 80090a8: 4293 cmp r3, r2
- 80090aa: dc04 bgt.n 80090b6 <cos+0x1e>
- 80090ac: ed9f 1b14 vldr d1, [pc, #80] ; 8009100 <cos+0x68>
- 80090b0: f000 fb56 bl 8009760 <__kernel_cos>
- 80090b4: e004 b.n 80090c0 <cos+0x28>
- 80090b6: 4a15 ldr r2, [pc, #84] ; (800910c <cos+0x74>)
- 80090b8: 4293 cmp r3, r2
- 80090ba: dd04 ble.n 80090c6 <cos+0x2e>
- 80090bc: ee30 0b40 vsub.f64 d0, d0, d0
- 80090c0: b005 add sp, #20
- 80090c2: f85d fb04 ldr.w pc, [sp], #4
- 80090c6: 4668 mov r0, sp
- 80090c8: f000 f8e2 bl 8009290 <__ieee754_rem_pio2>
- 80090cc: f000 0003 and.w r0, r0, #3
- 80090d0: 2801 cmp r0, #1
- 80090d2: ed9d 1b02 vldr d1, [sp, #8]
- 80090d6: ed9d 0b00 vldr d0, [sp]
- 80090da: d007 beq.n 80090ec <cos+0x54>
- 80090dc: 2802 cmp r0, #2
- 80090de: d00a beq.n 80090f6 <cos+0x5e>
- 80090e0: 2800 cmp r0, #0
- 80090e2: d0e5 beq.n 80090b0 <cos+0x18>
- 80090e4: 2001 movs r0, #1
- 80090e6: f000 fe43 bl 8009d70 <__kernel_sin>
- 80090ea: e7e9 b.n 80090c0 <cos+0x28>
- 80090ec: f000 fe40 bl 8009d70 <__kernel_sin>
- 80090f0: eeb1 0b40 vneg.f64 d0, d0
- 80090f4: e7e4 b.n 80090c0 <cos+0x28>
- 80090f6: f000 fb33 bl 8009760 <__kernel_cos>
- 80090fa: e7f9 b.n 80090f0 <cos+0x58>
- 80090fc: f3af 8000 nop.w
- ...
- 8009108: 3fe921fb .word 0x3fe921fb
- 800910c: 7fefffff .word 0x7fefffff
-
-08009110 <sin>:
- 8009110: b51f push {r0, r1, r2, r3, r4, lr}
- 8009112: eeb0 7b40 vmov.f64 d7, d0
- 8009116: ee17 3a90 vmov r3, s15
- 800911a: 4a19 ldr r2, [pc, #100] ; (8009180 <sin+0x70>)
- 800911c: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000
- 8009120: 4293 cmp r3, r2
- 8009122: dc05 bgt.n 8009130 <sin+0x20>
- 8009124: ed9f 1b14 vldr d1, [pc, #80] ; 8009178 <sin+0x68>
- 8009128: 2000 movs r0, #0
- 800912a: f000 fe21 bl 8009d70 <__kernel_sin>
- 800912e: e004 b.n 800913a <sin+0x2a>
- 8009130: 4a14 ldr r2, [pc, #80] ; (8009184 <sin+0x74>)
- 8009132: 4293 cmp r3, r2
- 8009134: dd04 ble.n 8009140 <sin+0x30>
- 8009136: ee30 0b40 vsub.f64 d0, d0, d0
- 800913a: b005 add sp, #20
- 800913c: f85d fb04 ldr.w pc, [sp], #4
- 8009140: 4668 mov r0, sp
- 8009142: f000 f8a5 bl 8009290 <__ieee754_rem_pio2>
- 8009146: f000 0003 and.w r0, r0, #3
- 800914a: 2801 cmp r0, #1
- 800914c: ed9d 1b02 vldr d1, [sp, #8]
- 8009150: ed9d 0b00 vldr d0, [sp]
- 8009154: d004 beq.n 8009160 <sin+0x50>
- 8009156: 2802 cmp r0, #2
- 8009158: d005 beq.n 8009166 <sin+0x56>
- 800915a: b950 cbnz r0, 8009172 <sin+0x62>
- 800915c: 2001 movs r0, #1
- 800915e: e7e4 b.n 800912a <sin+0x1a>
- 8009160: f000 fafe bl 8009760 <__kernel_cos>
- 8009164: e7e9 b.n 800913a <sin+0x2a>
- 8009166: 2001 movs r0, #1
- 8009168: f000 fe02 bl 8009d70 <__kernel_sin>
- 800916c: eeb1 0b40 vneg.f64 d0, d0
- 8009170: e7e3 b.n 800913a <sin+0x2a>
- 8009172: f000 faf5 bl 8009760 <__kernel_cos>
- 8009176: e7f9 b.n 800916c <sin+0x5c>
- ...
- 8009180: 3fe921fb .word 0x3fe921fb
- 8009184: 7fefffff .word 0x7fefffff
-
-08009188 <cosf>:
- 8009188: ee10 3a10 vmov r3, s0
- 800918c: b507 push {r0, r1, r2, lr}
- 800918e: 4a1c ldr r2, [pc, #112] ; (8009200 <cosf+0x78>)
- 8009190: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000
- 8009194: 4293 cmp r3, r2
- 8009196: dc04 bgt.n 80091a2 <cosf+0x1a>
- 8009198: eddf 0a1a vldr s1, [pc, #104] ; 8009204 <cosf+0x7c>
- 800919c: f000 fe40 bl 8009e20 <__kernel_cosf>
- 80091a0: e004 b.n 80091ac <cosf+0x24>
- 80091a2: f1b3 4fff cmp.w r3, #2139095040 ; 0x7f800000
- 80091a6: db04 blt.n 80091b2 <cosf+0x2a>
- 80091a8: ee30 0a40 vsub.f32 s0, s0, s0
- 80091ac: b003 add sp, #12
- 80091ae: f85d fb04 ldr.w pc, [sp], #4
- 80091b2: 4668 mov r0, sp
- 80091b4: f000 f9a8 bl 8009508 <__ieee754_rem_pio2f>
- 80091b8: f000 0003 and.w r0, r0, #3
- 80091bc: 2801 cmp r0, #1
- 80091be: d007 beq.n 80091d0 <cosf+0x48>
- 80091c0: 2802 cmp r0, #2
- 80091c2: d00e beq.n 80091e2 <cosf+0x5a>
- 80091c4: b9a0 cbnz r0, 80091f0 <cosf+0x68>
- 80091c6: eddd 0a01 vldr s1, [sp, #4]
- 80091ca: ed9d 0a00 vldr s0, [sp]
- 80091ce: e7e5 b.n 800919c <cosf+0x14>
- 80091d0: eddd 0a01 vldr s1, [sp, #4]
- 80091d4: ed9d 0a00 vldr s0, [sp]
- 80091d8: f001 f902 bl 800a3e0 <__kernel_sinf>
- 80091dc: eeb1 0a40 vneg.f32 s0, s0
- 80091e0: e7e4 b.n 80091ac <cosf+0x24>
- 80091e2: eddd 0a01 vldr s1, [sp, #4]
- 80091e6: ed9d 0a00 vldr s0, [sp]
- 80091ea: f000 fe19 bl 8009e20 <__kernel_cosf>
- 80091ee: e7f5 b.n 80091dc <cosf+0x54>
- 80091f0: 2001 movs r0, #1
- 80091f2: eddd 0a01 vldr s1, [sp, #4]
- 80091f6: ed9d 0a00 vldr s0, [sp]
- 80091fa: f001 f8f1 bl 800a3e0 <__kernel_sinf>
- 80091fe: e7d5 b.n 80091ac <cosf+0x24>
- 8009200: 3f490fd8 .word 0x3f490fd8
- 8009204: 00000000 .word 0x00000000
-
-08009208 <sinf>:
- 8009208: ee10 3a10 vmov r3, s0
- 800920c: b507 push {r0, r1, r2, lr}
- 800920e: 4a1d ldr r2, [pc, #116] ; (8009284 <sinf+0x7c>)
- 8009210: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000
- 8009214: 4293 cmp r3, r2
- 8009216: dc05 bgt.n 8009224 <sinf+0x1c>
- 8009218: eddf 0a1b vldr s1, [pc, #108] ; 8009288 <sinf+0x80>
- 800921c: 2000 movs r0, #0
- 800921e: f001 f8df bl 800a3e0 <__kernel_sinf>
- 8009222: e004 b.n 800922e <sinf+0x26>
- 8009224: f1b3 4fff cmp.w r3, #2139095040 ; 0x7f800000
- 8009228: db04 blt.n 8009234 <sinf+0x2c>
- 800922a: ee30 0a40 vsub.f32 s0, s0, s0
- 800922e: b003 add sp, #12
- 8009230: f85d fb04 ldr.w pc, [sp], #4
- 8009234: 4668 mov r0, sp
- 8009236: f000 f967 bl 8009508 <__ieee754_rem_pio2f>
- 800923a: f000 0003 and.w r0, r0, #3
- 800923e: 2801 cmp r0, #1
- 8009240: d008 beq.n 8009254 <sinf+0x4c>
- 8009242: 2802 cmp r0, #2
- 8009244: d00d beq.n 8009262 <sinf+0x5a>
- 8009246: b9b0 cbnz r0, 8009276 <sinf+0x6e>
- 8009248: 2001 movs r0, #1
- 800924a: eddd 0a01 vldr s1, [sp, #4]
- 800924e: ed9d 0a00 vldr s0, [sp]
- 8009252: e7e4 b.n 800921e <sinf+0x16>
- 8009254: eddd 0a01 vldr s1, [sp, #4]
- 8009258: ed9d 0a00 vldr s0, [sp]
- 800925c: f000 fde0 bl 8009e20 <__kernel_cosf>
- 8009260: e7e5 b.n 800922e <sinf+0x26>
- 8009262: 2001 movs r0, #1
- 8009264: eddd 0a01 vldr s1, [sp, #4]
- 8009268: ed9d 0a00 vldr s0, [sp]
- 800926c: f001 f8b8 bl 800a3e0 <__kernel_sinf>
- 8009270: eeb1 0a40 vneg.f32 s0, s0
- 8009274: e7db b.n 800922e <sinf+0x26>
- 8009276: eddd 0a01 vldr s1, [sp, #4]
- 800927a: ed9d 0a00 vldr s0, [sp]
- 800927e: f000 fdcf bl 8009e20 <__kernel_cosf>
- 8009282: e7f5 b.n 8009270 <sinf+0x68>
- 8009284: 3f490fd8 .word 0x3f490fd8
- ...
-
-08009290 <__ieee754_rem_pio2>:
- 8009290: b570 push {r4, r5, r6, lr}
- 8009292: eeb0 7b40 vmov.f64 d7, d0
- 8009296: ee17 5a90 vmov r5, s15
- 800929a: 4b95 ldr r3, [pc, #596] ; (80094f0 <__ieee754_rem_pio2+0x260>)
- 800929c: f025 4600 bic.w r6, r5, #2147483648 ; 0x80000000
- 80092a0: 429e cmp r6, r3
- 80092a2: b088 sub sp, #32
- 80092a4: 4604 mov r4, r0
- 80092a6: dc07 bgt.n 80092b8 <__ieee754_rem_pio2+0x28>
- 80092a8: 2200 movs r2, #0
- 80092aa: 2300 movs r3, #0
- 80092ac: ed84 0b00 vstr d0, [r4]
- 80092b0: e9c0 2302 strd r2, r3, [r0, #8]
- 80092b4: 2000 movs r0, #0
- 80092b6: e01b b.n 80092f0 <__ieee754_rem_pio2+0x60>
- 80092b8: 4b8e ldr r3, [pc, #568] ; (80094f4 <__ieee754_rem_pio2+0x264>)
- 80092ba: 429e cmp r6, r3
- 80092bc: dc3b bgt.n 8009336 <__ieee754_rem_pio2+0xa6>
- 80092be: f5a3 231b sub.w r3, r3, #634880 ; 0x9b000
- 80092c2: 2d00 cmp r5, #0
- 80092c4: ed9f 6b7a vldr d6, [pc, #488] ; 80094b0 <__ieee754_rem_pio2+0x220>
- 80092c8: f5a3 63f0 sub.w r3, r3, #1920 ; 0x780
- 80092cc: dd19 ble.n 8009302 <__ieee754_rem_pio2+0x72>
- 80092ce: ee30 7b46 vsub.f64 d7, d0, d6
- 80092d2: 429e cmp r6, r3
- 80092d4: d00e beq.n 80092f4 <__ieee754_rem_pio2+0x64>
- 80092d6: ed9f 6b78 vldr d6, [pc, #480] ; 80094b8 <__ieee754_rem_pio2+0x228>
- 80092da: ee37 5b46 vsub.f64 d5, d7, d6
- 80092de: ee37 7b45 vsub.f64 d7, d7, d5
- 80092e2: ed84 5b00 vstr d5, [r4]
- 80092e6: ee37 7b46 vsub.f64 d7, d7, d6
- 80092ea: ed84 7b02 vstr d7, [r4, #8]
- 80092ee: 2001 movs r0, #1
- 80092f0: b008 add sp, #32
- 80092f2: bd70 pop {r4, r5, r6, pc}
- 80092f4: ed9f 6b72 vldr d6, [pc, #456] ; 80094c0 <__ieee754_rem_pio2+0x230>
- 80092f8: ee37 7b46 vsub.f64 d7, d7, d6
- 80092fc: ed9f 6b72 vldr d6, [pc, #456] ; 80094c8 <__ieee754_rem_pio2+0x238>
- 8009300: e7eb b.n 80092da <__ieee754_rem_pio2+0x4a>
- 8009302: 429e cmp r6, r3
- 8009304: ee30 7b06 vadd.f64 d7, d0, d6
- 8009308: d00e beq.n 8009328 <__ieee754_rem_pio2+0x98>
- 800930a: ed9f 6b6b vldr d6, [pc, #428] ; 80094b8 <__ieee754_rem_pio2+0x228>
- 800930e: ee37 5b06 vadd.f64 d5, d7, d6
- 8009312: ee37 7b45 vsub.f64 d7, d7, d5
- 8009316: ed84 5b00 vstr d5, [r4]
- 800931a: ee37 7b06 vadd.f64 d7, d7, d6
- 800931e: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
- 8009322: ed84 7b02 vstr d7, [r4, #8]
- 8009326: e7e3 b.n 80092f0 <__ieee754_rem_pio2+0x60>
- 8009328: ed9f 6b65 vldr d6, [pc, #404] ; 80094c0 <__ieee754_rem_pio2+0x230>
- 800932c: ee37 7b06 vadd.f64 d7, d7, d6
- 8009330: ed9f 6b65 vldr d6, [pc, #404] ; 80094c8 <__ieee754_rem_pio2+0x238>
- 8009334: e7eb b.n 800930e <__ieee754_rem_pio2+0x7e>
- 8009336: 4b70 ldr r3, [pc, #448] ; (80094f8 <__ieee754_rem_pio2+0x268>)
- 8009338: 429e cmp r6, r3
- 800933a: dc6c bgt.n 8009416 <__ieee754_rem_pio2+0x186>
- 800933c: f001 f898 bl 800a470 <fabs>
- 8009340: eeb6 7b00 vmov.f64 d7, #96 ; 0x3f000000 0.5
- 8009344: ed9f 6b62 vldr d6, [pc, #392] ; 80094d0 <__ieee754_rem_pio2+0x240>
- 8009348: eea0 7b06 vfma.f64 d7, d0, d6
- 800934c: eefd 7bc7 vcvt.s32.f64 s15, d7
- 8009350: eeb8 4be7 vcvt.f64.s32 d4, s15
- 8009354: ee17 0a90 vmov r0, s15
- 8009358: eeb1 5b44 vneg.f64 d5, d4
- 800935c: ed9f 7b54 vldr d7, [pc, #336] ; 80094b0 <__ieee754_rem_pio2+0x220>
- 8009360: eea5 0b07 vfma.f64 d0, d5, d7
- 8009364: ed9f 7b54 vldr d7, [pc, #336] ; 80094b8 <__ieee754_rem_pio2+0x228>
- 8009368: 281f cmp r0, #31
- 800936a: ee24 7b07 vmul.f64 d7, d4, d7
- 800936e: ee30 6b47 vsub.f64 d6, d0, d7
- 8009372: dc08 bgt.n 8009386 <__ieee754_rem_pio2+0xf6>
- 8009374: 1e42 subs r2, r0, #1
- 8009376: 4b61 ldr r3, [pc, #388] ; (80094fc <__ieee754_rem_pio2+0x26c>)
- 8009378: f853 3022 ldr.w r3, [r3, r2, lsl #2]
- 800937c: 42b3 cmp r3, r6
- 800937e: d002 beq.n 8009386 <__ieee754_rem_pio2+0xf6>
- 8009380: ed84 6b00 vstr d6, [r4]
- 8009384: e022 b.n 80093cc <__ieee754_rem_pio2+0x13c>
- 8009386: ee16 3a90 vmov r3, s13
- 800938a: 1536 asrs r6, r6, #20
- 800938c: f3c3 530a ubfx r3, r3, #20, #11
- 8009390: 1af3 subs r3, r6, r3
- 8009392: 2b10 cmp r3, #16
- 8009394: ddf4 ble.n 8009380 <__ieee754_rem_pio2+0xf0>
- 8009396: eeb0 6b40 vmov.f64 d6, d0
- 800939a: ed9f 3b49 vldr d3, [pc, #292] ; 80094c0 <__ieee754_rem_pio2+0x230>
- 800939e: eea5 6b03 vfma.f64 d6, d5, d3
- 80093a2: ee30 7b46 vsub.f64 d7, d0, d6
- 80093a6: eea5 7b03 vfma.f64 d7, d5, d3
- 80093aa: ed9f 3b47 vldr d3, [pc, #284] ; 80094c8 <__ieee754_rem_pio2+0x238>
- 80093ae: ee94 7b03 vfnms.f64 d7, d4, d3
- 80093b2: ee36 3b47 vsub.f64 d3, d6, d7
- 80093b6: ee13 3a90 vmov r3, s7
- 80093ba: f3c3 530a ubfx r3, r3, #20, #11
- 80093be: 1af6 subs r6, r6, r3
- 80093c0: 2e31 cmp r6, #49 ; 0x31
- 80093c2: dc17 bgt.n 80093f4 <__ieee754_rem_pio2+0x164>
- 80093c4: eeb0 0b46 vmov.f64 d0, d6
- 80093c8: ed84 3b00 vstr d3, [r4]
- 80093cc: ed94 6b00 vldr d6, [r4]
- 80093d0: 2d00 cmp r5, #0
- 80093d2: ee30 0b46 vsub.f64 d0, d0, d6
- 80093d6: ee30 7b47 vsub.f64 d7, d0, d7
- 80093da: ed84 7b02 vstr d7, [r4, #8]
- 80093de: da87 bge.n 80092f0 <__ieee754_rem_pio2+0x60>
- 80093e0: eeb1 6b46 vneg.f64 d6, d6
- 80093e4: ed84 6b00 vstr d6, [r4]
- 80093e8: eeb1 7b47 vneg.f64 d7, d7
- 80093ec: 4240 negs r0, r0
- 80093ee: ed84 7b02 vstr d7, [r4, #8]
- 80093f2: e77d b.n 80092f0 <__ieee754_rem_pio2+0x60>
- 80093f4: ed9f 3b38 vldr d3, [pc, #224] ; 80094d8 <__ieee754_rem_pio2+0x248>
- 80093f8: eeb0 0b46 vmov.f64 d0, d6
- 80093fc: eea5 0b03 vfma.f64 d0, d5, d3
- 8009400: ee36 7b40 vsub.f64 d7, d6, d0
- 8009404: ed9f 6b36 vldr d6, [pc, #216] ; 80094e0 <__ieee754_rem_pio2+0x250>
- 8009408: eea5 7b03 vfma.f64 d7, d5, d3
- 800940c: ee94 7b06 vfnms.f64 d7, d4, d6
- 8009410: ee30 6b47 vsub.f64 d6, d0, d7
- 8009414: e7b4 b.n 8009380 <__ieee754_rem_pio2+0xf0>
- 8009416: 4b3a ldr r3, [pc, #232] ; (8009500 <__ieee754_rem_pio2+0x270>)
- 8009418: 429e cmp r6, r3
- 800941a: dd06 ble.n 800942a <__ieee754_rem_pio2+0x19a>
- 800941c: ee30 7b40 vsub.f64 d7, d0, d0
- 8009420: ed80 7b02 vstr d7, [r0, #8]
- 8009424: ed80 7b00 vstr d7, [r0]
- 8009428: e744 b.n 80092b4 <__ieee754_rem_pio2+0x24>
- 800942a: 1532 asrs r2, r6, #20
- 800942c: f2a2 4216 subw r2, r2, #1046 ; 0x416
- 8009430: ee10 0a10 vmov r0, s0
- 8009434: eba6 5102 sub.w r1, r6, r2, lsl #20
- 8009438: ec41 0b17 vmov d7, r0, r1
- 800943c: eebd 6bc7 vcvt.s32.f64 s12, d7
- 8009440: ed9f 5b29 vldr d5, [pc, #164] ; 80094e8 <__ieee754_rem_pio2+0x258>
- 8009444: eeb8 6bc6 vcvt.f64.s32 d6, s12
- 8009448: ee37 7b46 vsub.f64 d7, d7, d6
- 800944c: ed8d 6b02 vstr d6, [sp, #8]
- 8009450: ee27 7b05 vmul.f64 d7, d7, d5
- 8009454: eebd 6bc7 vcvt.s32.f64 s12, d7
- 8009458: a908 add r1, sp, #32
- 800945a: eeb8 6bc6 vcvt.f64.s32 d6, s12
- 800945e: ee37 7b46 vsub.f64 d7, d7, d6
- 8009462: ed8d 6b04 vstr d6, [sp, #16]
- 8009466: ee27 7b05 vmul.f64 d7, d7, d5
- 800946a: ed8d 7b06 vstr d7, [sp, #24]
- 800946e: 2303 movs r3, #3
- 8009470: ed31 7b02 vldmdb r1!, {d7}
- 8009474: eeb5 7b40 vcmp.f64 d7, #0.0
- 8009478: eef1 fa10 vmrs APSR_nzcv, fpscr
- 800947c: f103 30ff add.w r0, r3, #4294967295 ; 0xffffffff
- 8009480: d013 beq.n 80094aa <__ieee754_rem_pio2+0x21a>
- 8009482: 4920 ldr r1, [pc, #128] ; (8009504 <__ieee754_rem_pio2+0x274>)
- 8009484: 9101 str r1, [sp, #4]
- 8009486: 2102 movs r1, #2
- 8009488: 9100 str r1, [sp, #0]
- 800948a: a802 add r0, sp, #8
- 800948c: 4621 mov r1, r4
- 800948e: f000 f9d3 bl 8009838 <__kernel_rem_pio2>
- 8009492: 2d00 cmp r5, #0
- 8009494: f6bf af2c bge.w 80092f0 <__ieee754_rem_pio2+0x60>
- 8009498: ed94 7b00 vldr d7, [r4]
- 800949c: eeb1 7b47 vneg.f64 d7, d7
- 80094a0: ed84 7b00 vstr d7, [r4]
- 80094a4: ed94 7b02 vldr d7, [r4, #8]
- 80094a8: e79e b.n 80093e8 <__ieee754_rem_pio2+0x158>
- 80094aa: 4603 mov r3, r0
- 80094ac: e7e0 b.n 8009470 <__ieee754_rem_pio2+0x1e0>
- 80094ae: bf00 nop
- 80094b0: 54400000 .word 0x54400000
- 80094b4: 3ff921fb .word 0x3ff921fb
- 80094b8: 1a626331 .word 0x1a626331
- 80094bc: 3dd0b461 .word 0x3dd0b461
- 80094c0: 1a600000 .word 0x1a600000
- 80094c4: 3dd0b461 .word 0x3dd0b461
- 80094c8: 2e037073 .word 0x2e037073
- 80094cc: 3ba3198a .word 0x3ba3198a
- 80094d0: 6dc9c883 .word 0x6dc9c883
- 80094d4: 3fe45f30 .word 0x3fe45f30
- 80094d8: 2e000000 .word 0x2e000000
- 80094dc: 3ba3198a .word 0x3ba3198a
- 80094e0: 252049c1 .word 0x252049c1
- 80094e4: 397b839a .word 0x397b839a
- 80094e8: 00000000 .word 0x00000000
- 80094ec: 41700000 .word 0x41700000
- 80094f0: 3fe921fb .word 0x3fe921fb
- 80094f4: 4002d97b .word 0x4002d97b
- 80094f8: 413921fb .word 0x413921fb
- 80094fc: 0800b17c .word 0x0800b17c
- 8009500: 7fefffff .word 0x7fefffff
- 8009504: 0800b1fc .word 0x0800b1fc
-
-08009508 <__ieee754_rem_pio2f>:
- 8009508: b5f0 push {r4, r5, r6, r7, lr}
- 800950a: ee10 6a10 vmov r6, s0
- 800950e: 4b86 ldr r3, [pc, #536] ; (8009728 <__ieee754_rem_pio2f+0x220>)
- 8009510: f026 4400 bic.w r4, r6, #2147483648 ; 0x80000000
- 8009514: 429c cmp r4, r3
- 8009516: b087 sub sp, #28
- 8009518: 4605 mov r5, r0
- 800951a: dc05 bgt.n 8009528 <__ieee754_rem_pio2f+0x20>
- 800951c: 2300 movs r3, #0
- 800951e: ed85 0a00 vstr s0, [r5]
- 8009522: 6043 str r3, [r0, #4]
- 8009524: 2000 movs r0, #0
- 8009526: e020 b.n 800956a <__ieee754_rem_pio2f+0x62>
- 8009528: 4b80 ldr r3, [pc, #512] ; (800972c <__ieee754_rem_pio2f+0x224>)
- 800952a: 429c cmp r4, r3
- 800952c: dc38 bgt.n 80095a0 <__ieee754_rem_pio2f+0x98>
- 800952e: 2e00 cmp r6, #0
- 8009530: f024 040f bic.w r4, r4, #15
- 8009534: ed9f 7a7e vldr s14, [pc, #504] ; 8009730 <__ieee754_rem_pio2f+0x228>
- 8009538: 4b7e ldr r3, [pc, #504] ; (8009734 <__ieee754_rem_pio2f+0x22c>)
- 800953a: dd18 ble.n 800956e <__ieee754_rem_pio2f+0x66>
- 800953c: 429c cmp r4, r3
- 800953e: ee70 7a47 vsub.f32 s15, s0, s14
- 8009542: bf09 itett eq
- 8009544: ed9f 7a7c vldreq s14, [pc, #496] ; 8009738 <__ieee754_rem_pio2f+0x230>
- 8009548: ed9f 7a7c vldrne s14, [pc, #496] ; 800973c <__ieee754_rem_pio2f+0x234>
- 800954c: ee77 7ac7 vsubeq.f32 s15, s15, s14
- 8009550: ed9f 7a7b vldreq s14, [pc, #492] ; 8009740 <__ieee754_rem_pio2f+0x238>
- 8009554: ee77 6ac7 vsub.f32 s13, s15, s14
- 8009558: ee77 7ae6 vsub.f32 s15, s15, s13
- 800955c: edc0 6a00 vstr s13, [r0]
- 8009560: ee77 7ac7 vsub.f32 s15, s15, s14
- 8009564: edc0 7a01 vstr s15, [r0, #4]
- 8009568: 2001 movs r0, #1
- 800956a: b007 add sp, #28
- 800956c: bdf0 pop {r4, r5, r6, r7, pc}
- 800956e: 429c cmp r4, r3
- 8009570: ee70 7a07 vadd.f32 s15, s0, s14
- 8009574: bf09 itett eq
- 8009576: ed9f 7a70 vldreq s14, [pc, #448] ; 8009738 <__ieee754_rem_pio2f+0x230>
- 800957a: ed9f 7a70 vldrne s14, [pc, #448] ; 800973c <__ieee754_rem_pio2f+0x234>
- 800957e: ee77 7a87 vaddeq.f32 s15, s15, s14
- 8009582: ed9f 7a6f vldreq s14, [pc, #444] ; 8009740 <__ieee754_rem_pio2f+0x238>
- 8009586: ee77 6a87 vadd.f32 s13, s15, s14
- 800958a: ee77 7ae6 vsub.f32 s15, s15, s13
- 800958e: edc0 6a00 vstr s13, [r0]
- 8009592: ee77 7a87 vadd.f32 s15, s15, s14
- 8009596: edc0 7a01 vstr s15, [r0, #4]
- 800959a: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
- 800959e: e7e4 b.n 800956a <__ieee754_rem_pio2f+0x62>
- 80095a0: 4b68 ldr r3, [pc, #416] ; (8009744 <__ieee754_rem_pio2f+0x23c>)
- 80095a2: 429c cmp r4, r3
- 80095a4: dc71 bgt.n 800968a <__ieee754_rem_pio2f+0x182>
- 80095a6: f001 f865 bl 800a674 <fabsf>
- 80095aa: ed9f 7a67 vldr s14, [pc, #412] ; 8009748 <__ieee754_rem_pio2f+0x240>
- 80095ae: eef6 7a00 vmov.f32 s15, #96 ; 0x3f000000 0.5
- 80095b2: eee0 7a07 vfma.f32 s15, s0, s14
- 80095b6: eefd 7ae7 vcvt.s32.f32 s15, s15
- 80095ba: eeb8 6ae7 vcvt.f32.s32 s12, s15
- 80095be: ee17 0a90 vmov r0, s15
- 80095c2: eddf 7a5b vldr s15, [pc, #364] ; 8009730 <__ieee754_rem_pio2f+0x228>
- 80095c6: eeb1 7a46 vneg.f32 s14, s12
- 80095ca: eea7 0a27 vfma.f32 s0, s14, s15
- 80095ce: 281f cmp r0, #31
- 80095d0: eddf 7a5a vldr s15, [pc, #360] ; 800973c <__ieee754_rem_pio2f+0x234>
- 80095d4: ee66 7a27 vmul.f32 s15, s12, s15
- 80095d8: ee70 6a67 vsub.f32 s13, s0, s15
- 80095dc: ee16 3a90 vmov r3, s13
- 80095e0: dc1c bgt.n 800961c <__ieee754_rem_pio2f+0x114>
- 80095e2: 1e47 subs r7, r0, #1
- 80095e4: 4959 ldr r1, [pc, #356] ; (800974c <__ieee754_rem_pio2f+0x244>)
- 80095e6: f851 1027 ldr.w r1, [r1, r7, lsl #2]
- 80095ea: f024 02ff bic.w r2, r4, #255 ; 0xff
- 80095ee: 428a cmp r2, r1
- 80095f0: d014 beq.n 800961c <__ieee754_rem_pio2f+0x114>
- 80095f2: 602b str r3, [r5, #0]
- 80095f4: ed95 7a00 vldr s14, [r5]
- 80095f8: ee30 0a47 vsub.f32 s0, s0, s14
- 80095fc: 2e00 cmp r6, #0
- 80095fe: ee30 0a67 vsub.f32 s0, s0, s15
- 8009602: ed85 0a01 vstr s0, [r5, #4]
- 8009606: dab0 bge.n 800956a <__ieee754_rem_pio2f+0x62>
- 8009608: eeb1 7a47 vneg.f32 s14, s14
- 800960c: eeb1 0a40 vneg.f32 s0, s0
- 8009610: ed85 7a00 vstr s14, [r5]
- 8009614: ed85 0a01 vstr s0, [r5, #4]
- 8009618: 4240 negs r0, r0
- 800961a: e7a6 b.n 800956a <__ieee754_rem_pio2f+0x62>
- 800961c: 15e4 asrs r4, r4, #23
- 800961e: f3c3 52c7 ubfx r2, r3, #23, #8
- 8009622: 1aa2 subs r2, r4, r2
- 8009624: 2a08 cmp r2, #8
- 8009626: dde4 ble.n 80095f2 <__ieee754_rem_pio2f+0xea>
- 8009628: eddf 7a43 vldr s15, [pc, #268] ; 8009738 <__ieee754_rem_pio2f+0x230>
- 800962c: eef0 6a40 vmov.f32 s13, s0
- 8009630: eee7 6a27 vfma.f32 s13, s14, s15
- 8009634: ee30 0a66 vsub.f32 s0, s0, s13
- 8009638: eea7 0a27 vfma.f32 s0, s14, s15
- 800963c: eddf 7a40 vldr s15, [pc, #256] ; 8009740 <__ieee754_rem_pio2f+0x238>
- 8009640: ee96 0a27 vfnms.f32 s0, s12, s15
- 8009644: ee76 5ac0 vsub.f32 s11, s13, s0
- 8009648: eef0 7a40 vmov.f32 s15, s0
- 800964c: ee15 3a90 vmov r3, s11
- 8009650: f3c3 52c7 ubfx r2, r3, #23, #8
- 8009654: 1aa4 subs r4, r4, r2
- 8009656: 2c19 cmp r4, #25
- 8009658: dc04 bgt.n 8009664 <__ieee754_rem_pio2f+0x15c>
- 800965a: edc5 5a00 vstr s11, [r5]
- 800965e: eeb0 0a66 vmov.f32 s0, s13
- 8009662: e7c7 b.n 80095f4 <__ieee754_rem_pio2f+0xec>
- 8009664: eddf 5a3a vldr s11, [pc, #232] ; 8009750 <__ieee754_rem_pio2f+0x248>
- 8009668: eeb0 0a66 vmov.f32 s0, s13
- 800966c: eea7 0a25 vfma.f32 s0, s14, s11
- 8009670: ee76 7ac0 vsub.f32 s15, s13, s0
- 8009674: eee7 7a25 vfma.f32 s15, s14, s11
- 8009678: ed9f 7a36 vldr s14, [pc, #216] ; 8009754 <__ieee754_rem_pio2f+0x24c>
- 800967c: eed6 7a07 vfnms.f32 s15, s12, s14
- 8009680: ee30 7a67 vsub.f32 s14, s0, s15
- 8009684: ed85 7a00 vstr s14, [r5]
- 8009688: e7b4 b.n 80095f4 <__ieee754_rem_pio2f+0xec>
- 800968a: f1b4 4fff cmp.w r4, #2139095040 ; 0x7f800000
- 800968e: db06 blt.n 800969e <__ieee754_rem_pio2f+0x196>
- 8009690: ee70 7a40 vsub.f32 s15, s0, s0
- 8009694: edc0 7a01 vstr s15, [r0, #4]
- 8009698: edc0 7a00 vstr s15, [r0]
- 800969c: e742 b.n 8009524 <__ieee754_rem_pio2f+0x1c>
- 800969e: 15e2 asrs r2, r4, #23
- 80096a0: 3a86 subs r2, #134 ; 0x86
- 80096a2: eba4 53c2 sub.w r3, r4, r2, lsl #23
- 80096a6: ee07 3a90 vmov s15, r3
- 80096aa: eebd 7ae7 vcvt.s32.f32 s14, s15
- 80096ae: eddf 6a2a vldr s13, [pc, #168] ; 8009758 <__ieee754_rem_pio2f+0x250>
- 80096b2: eeb8 7ac7 vcvt.f32.s32 s14, s14
- 80096b6: ee77 7ac7 vsub.f32 s15, s15, s14
- 80096ba: ed8d 7a03 vstr s14, [sp, #12]
- 80096be: ee67 7aa6 vmul.f32 s15, s15, s13
- 80096c2: eebd 7ae7 vcvt.s32.f32 s14, s15
- 80096c6: eeb8 7ac7 vcvt.f32.s32 s14, s14
- 80096ca: ee77 7ac7 vsub.f32 s15, s15, s14
- 80096ce: ed8d 7a04 vstr s14, [sp, #16]
- 80096d2: ee67 7aa6 vmul.f32 s15, s15, s13
- 80096d6: eef5 7a40 vcmp.f32 s15, #0.0
- 80096da: eef1 fa10 vmrs APSR_nzcv, fpscr
- 80096de: edcd 7a05 vstr s15, [sp, #20]
- 80096e2: d11e bne.n 8009722 <__ieee754_rem_pio2f+0x21a>
- 80096e4: eeb5 7a40 vcmp.f32 s14, #0.0
- 80096e8: eef1 fa10 vmrs APSR_nzcv, fpscr
- 80096ec: bf0c ite eq
- 80096ee: 2301 moveq r3, #1
- 80096f0: 2302 movne r3, #2
- 80096f2: 491a ldr r1, [pc, #104] ; (800975c <__ieee754_rem_pio2f+0x254>)
- 80096f4: 9101 str r1, [sp, #4]
- 80096f6: 2102 movs r1, #2
- 80096f8: 9100 str r1, [sp, #0]
- 80096fa: a803 add r0, sp, #12
- 80096fc: 4629 mov r1, r5
- 80096fe: f000 fbed bl 8009edc <__kernel_rem_pio2f>
- 8009702: 2e00 cmp r6, #0
- 8009704: f6bf af31 bge.w 800956a <__ieee754_rem_pio2f+0x62>
- 8009708: edd5 7a00 vldr s15, [r5]
- 800970c: eef1 7a67 vneg.f32 s15, s15
- 8009710: edc5 7a00 vstr s15, [r5]
- 8009714: edd5 7a01 vldr s15, [r5, #4]
- 8009718: eef1 7a67 vneg.f32 s15, s15
- 800971c: edc5 7a01 vstr s15, [r5, #4]
- 8009720: e77a b.n 8009618 <__ieee754_rem_pio2f+0x110>
- 8009722: 2303 movs r3, #3
- 8009724: e7e5 b.n 80096f2 <__ieee754_rem_pio2f+0x1ea>
- 8009726: bf00 nop
- 8009728: 3f490fd8 .word 0x3f490fd8
- 800972c: 4016cbe3 .word 0x4016cbe3
- 8009730: 3fc90f80 .word 0x3fc90f80
- 8009734: 3fc90fd0 .word 0x3fc90fd0
- 8009738: 37354400 .word 0x37354400
- 800973c: 37354443 .word 0x37354443
- 8009740: 2e85a308 .word 0x2e85a308
- 8009744: 43490f80 .word 0x43490f80
- 8009748: 3f22f984 .word 0x3f22f984
- 800974c: 0800b304 .word 0x0800b304
- 8009750: 2e85a300 .word 0x2e85a300
- 8009754: 248d3132 .word 0x248d3132
- 8009758: 43800000 .word 0x43800000
- 800975c: 0800b384 .word 0x0800b384
-
-08009760 <__kernel_cos>:
- 8009760: ee10 1a90 vmov r1, s1
- 8009764: eeb7 7b00 vmov.f64 d7, #112 ; 0x3f800000 1.0
- 8009768: f021 4100 bic.w r1, r1, #2147483648 ; 0x80000000
- 800976c: f1b1 5f79 cmp.w r1, #1044381696 ; 0x3e400000
- 8009770: da05 bge.n 800977e <__kernel_cos+0x1e>
- 8009772: eefd 6bc0 vcvt.s32.f64 s13, d0
- 8009776: ee16 3a90 vmov r3, s13
- 800977a: 2b00 cmp r3, #0
- 800977c: d03d beq.n 80097fa <__kernel_cos+0x9a>
- 800977e: ee20 4b00 vmul.f64 d4, d0, d0
- 8009782: eeb6 6b00 vmov.f64 d6, #96 ; 0x3f000000 0.5
- 8009786: ed9f 3b1e vldr d3, [pc, #120] ; 8009800 <__kernel_cos+0xa0>
- 800978a: ee21 1b40 vnmul.f64 d1, d1, d0
- 800978e: ee24 6b06 vmul.f64 d6, d4, d6
- 8009792: ed9f 5b1d vldr d5, [pc, #116] ; 8009808 <__kernel_cos+0xa8>
- 8009796: eea4 5b03 vfma.f64 d5, d4, d3
- 800979a: ed9f 3b1d vldr d3, [pc, #116] ; 8009810 <__kernel_cos+0xb0>
- 800979e: eea5 3b04 vfma.f64 d3, d5, d4
- 80097a2: ed9f 5b1d vldr d5, [pc, #116] ; 8009818 <__kernel_cos+0xb8>
- 80097a6: eea3 5b04 vfma.f64 d5, d3, d4
- 80097aa: ed9f 3b1d vldr d3, [pc, #116] ; 8009820 <__kernel_cos+0xc0>
- 80097ae: 4b20 ldr r3, [pc, #128] ; (8009830 <__kernel_cos+0xd0>)
- 80097b0: eea5 3b04 vfma.f64 d3, d5, d4
- 80097b4: ed9f 5b1c vldr d5, [pc, #112] ; 8009828 <__kernel_cos+0xc8>
- 80097b8: 4299 cmp r1, r3
- 80097ba: eea3 5b04 vfma.f64 d5, d3, d4
- 80097be: ee25 5b04 vmul.f64 d5, d5, d4
- 80097c2: eea4 1b05 vfma.f64 d1, d4, d5
- 80097c6: dc04 bgt.n 80097d2 <__kernel_cos+0x72>
- 80097c8: ee36 6b41 vsub.f64 d6, d6, d1
- 80097cc: ee37 0b46 vsub.f64 d0, d7, d6
- 80097d0: 4770 bx lr
- 80097d2: 4b18 ldr r3, [pc, #96] ; (8009834 <__kernel_cos+0xd4>)
- 80097d4: 4299 cmp r1, r3
- 80097d6: dc0d bgt.n 80097f4 <__kernel_cos+0x94>
- 80097d8: 2200 movs r2, #0
- 80097da: f5a1 1300 sub.w r3, r1, #2097152 ; 0x200000
- 80097de: ec43 2b15 vmov d5, r2, r3
- 80097e2: ee37 0b45 vsub.f64 d0, d7, d5
- 80097e6: ee36 6b45 vsub.f64 d6, d6, d5
- 80097ea: ee36 6b41 vsub.f64 d6, d6, d1
- 80097ee: ee30 0b46 vsub.f64 d0, d0, d6
- 80097f2: 4770 bx lr
- 80097f4: eeb5 5b02 vmov.f64 d5, #82 ; 0x3e900000 0.2812500
- 80097f8: e7f3 b.n 80097e2 <__kernel_cos+0x82>
- 80097fa: eeb0 0b47 vmov.f64 d0, d7
- 80097fe: 4770 bx lr
- 8009800: be8838d4 .word 0xbe8838d4
- 8009804: bda8fae9 .word 0xbda8fae9
- 8009808: bdb4b1c4 .word 0xbdb4b1c4
- 800980c: 3e21ee9e .word 0x3e21ee9e
- 8009810: 809c52ad .word 0x809c52ad
- 8009814: be927e4f .word 0xbe927e4f
- 8009818: 19cb1590 .word 0x19cb1590
- 800981c: 3efa01a0 .word 0x3efa01a0
- 8009820: 16c15177 .word 0x16c15177
- 8009824: bf56c16c .word 0xbf56c16c
- 8009828: 5555554c .word 0x5555554c
- 800982c: 3fa55555 .word 0x3fa55555
- 8009830: 3fd33332 .word 0x3fd33332
- 8009834: 3fe90000 .word 0x3fe90000
-
-08009838 <__kernel_rem_pio2>:
- 8009838: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
- 800983c: ed2d 8b06 vpush {d8-d10}
- 8009840: f5ad 7d13 sub.w sp, sp, #588 ; 0x24c
- 8009844: 469b mov fp, r3
- 8009846: 460e mov r6, r1
- 8009848: 4bc7 ldr r3, [pc, #796] ; (8009b68 <__kernel_rem_pio2+0x330>)
- 800984a: 99a2 ldr r1, [sp, #648] ; 0x288
- 800984c: 9002 str r0, [sp, #8]
- 800984e: f853 9021 ldr.w r9, [r3, r1, lsl #2]
- 8009852: 98a3 ldr r0, [sp, #652] ; 0x28c
- 8009854: 1ed1 subs r1, r2, #3
- 8009856: 2318 movs r3, #24
- 8009858: f06f 0417 mvn.w r4, #23
- 800985c: fb91 f1f3 sdiv r1, r1, r3
- 8009860: ea21 71e1 bic.w r1, r1, r1, asr #31
- 8009864: f10b 3aff add.w sl, fp, #4294967295 ; 0xffffffff
- 8009868: fb01 4404 mla r4, r1, r4, r4
- 800986c: ed9f 6bb8 vldr d6, [pc, #736] ; 8009b50 <__kernel_rem_pio2+0x318>
- 8009870: 4414 add r4, r2
- 8009872: eba1 050a sub.w r5, r1, sl
- 8009876: aa1a add r2, sp, #104 ; 0x68
- 8009878: eb09 070a add.w r7, r9, sl
- 800987c: eb00 0c85 add.w ip, r0, r5, lsl #2
- 8009880: 4696 mov lr, r2
- 8009882: 2300 movs r3, #0
- 8009884: 42bb cmp r3, r7
- 8009886: dd0f ble.n 80098a8 <__kernel_rem_pio2+0x70>
- 8009888: af6a add r7, sp, #424 ; 0x1a8
- 800988a: 2200 movs r2, #0
- 800988c: 454a cmp r2, r9
- 800988e: dc28 bgt.n 80098e2 <__kernel_rem_pio2+0xaa>
- 8009890: f10d 0c68 add.w ip, sp, #104 ; 0x68
- 8009894: eb0b 0302 add.w r3, fp, r2
- 8009898: eb0c 03c3 add.w r3, ip, r3, lsl #3
- 800989c: 9d02 ldr r5, [sp, #8]
- 800989e: ed9f 7bac vldr d7, [pc, #688] ; 8009b50 <__kernel_rem_pio2+0x318>
- 80098a2: f04f 0c00 mov.w ip, #0
- 80098a6: e016 b.n 80098d6 <__kernel_rem_pio2+0x9e>
- 80098a8: 42dd cmn r5, r3
- 80098aa: d409 bmi.n 80098c0 <__kernel_rem_pio2+0x88>
- 80098ac: f85c 2023 ldr.w r2, [ip, r3, lsl #2]
- 80098b0: ee07 2a90 vmov s15, r2
- 80098b4: eeb8 7be7 vcvt.f64.s32 d7, s15
- 80098b8: ecae 7b02 vstmia lr!, {d7}
- 80098bc: 3301 adds r3, #1
- 80098be: e7e1 b.n 8009884 <__kernel_rem_pio2+0x4c>
- 80098c0: eeb0 7b46 vmov.f64 d7, d6
- 80098c4: e7f8 b.n 80098b8 <__kernel_rem_pio2+0x80>
- 80098c6: ecb5 5b02 vldmia r5!, {d5}
- 80098ca: ed33 6b02 vldmdb r3!, {d6}
- 80098ce: f10c 0c01 add.w ip, ip, #1
- 80098d2: eea5 7b06 vfma.f64 d7, d5, d6
- 80098d6: 45d4 cmp ip, sl
- 80098d8: ddf5 ble.n 80098c6 <__kernel_rem_pio2+0x8e>
- 80098da: eca7 7b02 vstmia r7!, {d7}
- 80098de: 3201 adds r2, #1
- 80098e0: e7d4 b.n 800988c <__kernel_rem_pio2+0x54>
- 80098e2: ab06 add r3, sp, #24
- 80098e4: eb03 0389 add.w r3, r3, r9, lsl #2
- 80098e8: ed9f 9b9b vldr d9, [pc, #620] ; 8009b58 <__kernel_rem_pio2+0x320>
- 80098ec: ed9f ab9c vldr d10, [pc, #624] ; 8009b60 <__kernel_rem_pio2+0x328>
- 80098f0: 9304 str r3, [sp, #16]
- 80098f2: eb00 0381 add.w r3, r0, r1, lsl #2
- 80098f6: 9303 str r3, [sp, #12]
- 80098f8: 464d mov r5, r9
- 80098fa: ab92 add r3, sp, #584 ; 0x248
- 80098fc: f105 5700 add.w r7, r5, #536870912 ; 0x20000000
- 8009900: eb03 03c5 add.w r3, r3, r5, lsl #3
- 8009904: 3f01 subs r7, #1
- 8009906: ed13 0b28 vldr d0, [r3, #-160] ; 0xffffff60
- 800990a: 00ff lsls r7, r7, #3
- 800990c: ab92 add r3, sp, #584 ; 0x248
- 800990e: 19da adds r2, r3, r7
- 8009910: 3a98 subs r2, #152 ; 0x98
- 8009912: 2300 movs r3, #0
- 8009914: 1ae9 subs r1, r5, r3
- 8009916: 2900 cmp r1, #0
- 8009918: dc4e bgt.n 80099b8 <__kernel_rem_pio2+0x180>
- 800991a: 4620 mov r0, r4
- 800991c: f000 fe2c bl 800a578 <scalbn>
- 8009920: eeb0 8b40 vmov.f64 d8, d0
- 8009924: eeb4 0b00 vmov.f64 d0, #64 ; 0x3e000000 0.125
- 8009928: ee28 0b00 vmul.f64 d0, d8, d0
- 800992c: f000 fdac bl 800a488 <floor>
- 8009930: eeb2 7b00 vmov.f64 d7, #32 ; 0x41000000 8.0
- 8009934: eea0 8b47 vfms.f64 d8, d0, d7
- 8009938: eefd 7bc8 vcvt.s32.f64 s15, d8
- 800993c: 2c00 cmp r4, #0
- 800993e: edcd 7a01 vstr s15, [sp, #4]
- 8009942: eeb8 7be7 vcvt.f64.s32 d7, s15
- 8009946: ee38 8b47 vsub.f64 d8, d8, d7
- 800994a: dd4a ble.n 80099e2 <__kernel_rem_pio2+0x1aa>
- 800994c: 1e69 subs r1, r5, #1
- 800994e: ab06 add r3, sp, #24
- 8009950: f1c4 0018 rsb r0, r4, #24
- 8009954: f853 c021 ldr.w ip, [r3, r1, lsl #2]
- 8009958: 9a01 ldr r2, [sp, #4]
- 800995a: fa4c f300 asr.w r3, ip, r0
- 800995e: 441a add r2, r3
- 8009960: 4083 lsls r3, r0
- 8009962: 9201 str r2, [sp, #4]
- 8009964: ebac 0203 sub.w r2, ip, r3
- 8009968: ab06 add r3, sp, #24
- 800996a: f843 2021 str.w r2, [r3, r1, lsl #2]
- 800996e: f1c4 0317 rsb r3, r4, #23
- 8009972: fa42 f803 asr.w r8, r2, r3
- 8009976: f1b8 0f00 cmp.w r8, #0
- 800997a: dd43 ble.n 8009a04 <__kernel_rem_pio2+0x1cc>
- 800997c: 9b01 ldr r3, [sp, #4]
- 800997e: 2000 movs r0, #0
- 8009980: 3301 adds r3, #1
- 8009982: 9301 str r3, [sp, #4]
- 8009984: 4601 mov r1, r0
- 8009986: f06f 4c7f mvn.w ip, #4278190080 ; 0xff000000
- 800998a: 4285 cmp r5, r0
- 800998c: dc6e bgt.n 8009a6c <__kernel_rem_pio2+0x234>
- 800998e: 2c00 cmp r4, #0
- 8009990: dd04 ble.n 800999c <__kernel_rem_pio2+0x164>
- 8009992: 2c01 cmp r4, #1
- 8009994: d07f beq.n 8009a96 <__kernel_rem_pio2+0x25e>
- 8009996: 2c02 cmp r4, #2
- 8009998: f000 8087 beq.w 8009aaa <__kernel_rem_pio2+0x272>
- 800999c: f1b8 0f02 cmp.w r8, #2
- 80099a0: d130 bne.n 8009a04 <__kernel_rem_pio2+0x1cc>
- 80099a2: eeb7 0b00 vmov.f64 d0, #112 ; 0x3f800000 1.0
- 80099a6: ee30 8b48 vsub.f64 d8, d0, d8
- 80099aa: b359 cbz r1, 8009a04 <__kernel_rem_pio2+0x1cc>
- 80099ac: 4620 mov r0, r4
- 80099ae: f000 fde3 bl 800a578 <scalbn>
- 80099b2: ee38 8b40 vsub.f64 d8, d8, d0
- 80099b6: e025 b.n 8009a04 <__kernel_rem_pio2+0x1cc>
- 80099b8: ee20 7b09 vmul.f64 d7, d0, d9
- 80099bc: eebd 7bc7 vcvt.s32.f64 s14, d7
- 80099c0: a806 add r0, sp, #24
- 80099c2: eeb8 7bc7 vcvt.f64.s32 d7, s14
- 80099c6: eea7 0b4a vfms.f64 d0, d7, d10
- 80099ca: eebd 0bc0 vcvt.s32.f64 s0, d0
- 80099ce: ee10 1a10 vmov r1, s0
- 80099d2: ed32 0b02 vldmdb r2!, {d0}
- 80099d6: f840 1023 str.w r1, [r0, r3, lsl #2]
- 80099da: ee37 0b00 vadd.f64 d0, d7, d0
- 80099de: 3301 adds r3, #1
- 80099e0: e798 b.n 8009914 <__kernel_rem_pio2+0xdc>
- 80099e2: d106 bne.n 80099f2 <__kernel_rem_pio2+0x1ba>
- 80099e4: 1e6b subs r3, r5, #1
- 80099e6: aa06 add r2, sp, #24
- 80099e8: f852 2023 ldr.w r2, [r2, r3, lsl #2]
- 80099ec: ea4f 58e2 mov.w r8, r2, asr #23
- 80099f0: e7c1 b.n 8009976 <__kernel_rem_pio2+0x13e>
- 80099f2: eeb6 7b00 vmov.f64 d7, #96 ; 0x3f000000 0.5
- 80099f6: eeb4 8bc7 vcmpe.f64 d8, d7
- 80099fa: eef1 fa10 vmrs APSR_nzcv, fpscr
- 80099fe: da32 bge.n 8009a66 <__kernel_rem_pio2+0x22e>
- 8009a00: f04f 0800 mov.w r8, #0
- 8009a04: eeb5 8b40 vcmp.f64 d8, #0.0
- 8009a08: eef1 fa10 vmrs APSR_nzcv, fpscr
- 8009a0c: f040 80b0 bne.w 8009b70 <__kernel_rem_pio2+0x338>
- 8009a10: 1e6b subs r3, r5, #1
- 8009a12: 4618 mov r0, r3
- 8009a14: 2200 movs r2, #0
- 8009a16: 4548 cmp r0, r9
- 8009a18: da4e bge.n 8009ab8 <__kernel_rem_pio2+0x280>
- 8009a1a: 2a00 cmp r2, #0
- 8009a1c: f000 8088 beq.w 8009b30 <__kernel_rem_pio2+0x2f8>
- 8009a20: aa06 add r2, sp, #24
- 8009a22: 3c18 subs r4, #24
- 8009a24: f852 1023 ldr.w r1, [r2, r3, lsl #2]
- 8009a28: 2900 cmp r1, #0
- 8009a2a: f000 808e beq.w 8009b4a <__kernel_rem_pio2+0x312>
- 8009a2e: eeb7 0b00 vmov.f64 d0, #112 ; 0x3f800000 1.0
- 8009a32: 4620 mov r0, r4
- 8009a34: 9302 str r3, [sp, #8]
- 8009a36: f000 fd9f bl 800a578 <scalbn>
- 8009a3a: 9b02 ldr r3, [sp, #8]
- 8009a3c: aa6a add r2, sp, #424 ; 0x1a8
- 8009a3e: 00d9 lsls r1, r3, #3
- 8009a40: ed9f 6b45 vldr d6, [pc, #276] ; 8009b58 <__kernel_rem_pio2+0x320>
- 8009a44: 1850 adds r0, r2, r1
- 8009a46: f100 0508 add.w r5, r0, #8
- 8009a4a: 461c mov r4, r3
- 8009a4c: 2c00 cmp r4, #0
- 8009a4e: f280 80bd bge.w 8009bcc <__kernel_rem_pio2+0x394>
- 8009a52: 2500 movs r5, #0
- 8009a54: 1b5c subs r4, r3, r5
- 8009a56: 2c00 cmp r4, #0
- 8009a58: f2c0 80dd blt.w 8009c16 <__kernel_rem_pio2+0x3de>
- 8009a5c: 4f43 ldr r7, [pc, #268] ; (8009b6c <__kernel_rem_pio2+0x334>)
- 8009a5e: ed9f 7b3c vldr d7, [pc, #240] ; 8009b50 <__kernel_rem_pio2+0x318>
- 8009a62: 2400 movs r4, #0
- 8009a64: e0cb b.n 8009bfe <__kernel_rem_pio2+0x3c6>
- 8009a66: f04f 0802 mov.w r8, #2
- 8009a6a: e787 b.n 800997c <__kernel_rem_pio2+0x144>
- 8009a6c: ab06 add r3, sp, #24
- 8009a6e: f853 3020 ldr.w r3, [r3, r0, lsl #2]
- 8009a72: b949 cbnz r1, 8009a88 <__kernel_rem_pio2+0x250>
- 8009a74: b12b cbz r3, 8009a82 <__kernel_rem_pio2+0x24a>
- 8009a76: aa06 add r2, sp, #24
- 8009a78: f1c3 7380 rsb r3, r3, #16777216 ; 0x1000000
- 8009a7c: f842 3020 str.w r3, [r2, r0, lsl #2]
- 8009a80: 2301 movs r3, #1
- 8009a82: 3001 adds r0, #1
- 8009a84: 4619 mov r1, r3
- 8009a86: e780 b.n 800998a <__kernel_rem_pio2+0x152>
- 8009a88: aa06 add r2, sp, #24
- 8009a8a: ebac 0303 sub.w r3, ip, r3
- 8009a8e: f842 3020 str.w r3, [r2, r0, lsl #2]
- 8009a92: 460b mov r3, r1
- 8009a94: e7f5 b.n 8009a82 <__kernel_rem_pio2+0x24a>
- 8009a96: 1e68 subs r0, r5, #1
- 8009a98: ab06 add r3, sp, #24
- 8009a9a: f853 3020 ldr.w r3, [r3, r0, lsl #2]
- 8009a9e: f3c3 0316 ubfx r3, r3, #0, #23
- 8009aa2: aa06 add r2, sp, #24
- 8009aa4: f842 3020 str.w r3, [r2, r0, lsl #2]
- 8009aa8: e778 b.n 800999c <__kernel_rem_pio2+0x164>
- 8009aaa: 1e68 subs r0, r5, #1
- 8009aac: ab06 add r3, sp, #24
- 8009aae: f853 3020 ldr.w r3, [r3, r0, lsl #2]
- 8009ab2: f3c3 0315 ubfx r3, r3, #0, #22
- 8009ab6: e7f4 b.n 8009aa2 <__kernel_rem_pio2+0x26a>
- 8009ab8: a906 add r1, sp, #24
- 8009aba: f851 1020 ldr.w r1, [r1, r0, lsl #2]
- 8009abe: 3801 subs r0, #1
- 8009ac0: 430a orrs r2, r1
- 8009ac2: e7a8 b.n 8009a16 <__kernel_rem_pio2+0x1de>
- 8009ac4: f10c 0c01 add.w ip, ip, #1
- 8009ac8: f853 2d04 ldr.w r2, [r3, #-4]!
- 8009acc: 2a00 cmp r2, #0
- 8009ace: d0f9 beq.n 8009ac4 <__kernel_rem_pio2+0x28c>
- 8009ad0: eb0b 0305 add.w r3, fp, r5
- 8009ad4: aa1a add r2, sp, #104 ; 0x68
- 8009ad6: 00db lsls r3, r3, #3
- 8009ad8: 1898 adds r0, r3, r2
- 8009ada: 3008 adds r0, #8
- 8009adc: 1c69 adds r1, r5, #1
- 8009ade: 3708 adds r7, #8
- 8009ae0: 2200 movs r2, #0
- 8009ae2: 4465 add r5, ip
- 8009ae4: 9005 str r0, [sp, #20]
- 8009ae6: 428d cmp r5, r1
- 8009ae8: f6ff af07 blt.w 80098fa <__kernel_rem_pio2+0xc2>
- 8009aec: a81a add r0, sp, #104 ; 0x68
- 8009aee: eb02 0c03 add.w ip, r2, r3
- 8009af2: 4484 add ip, r0
- 8009af4: 9803 ldr r0, [sp, #12]
- 8009af6: f8dd e008 ldr.w lr, [sp, #8]
- 8009afa: f850 0021 ldr.w r0, [r0, r1, lsl #2]
- 8009afe: 9001 str r0, [sp, #4]
- 8009b00: ee07 0a90 vmov s15, r0
- 8009b04: eeb8 7be7 vcvt.f64.s32 d7, s15
- 8009b08: 9805 ldr r0, [sp, #20]
- 8009b0a: ed8c 7b00 vstr d7, [ip]
- 8009b0e: ed9f 7b10 vldr d7, [pc, #64] ; 8009b50 <__kernel_rem_pio2+0x318>
- 8009b12: eb00 0802 add.w r8, r0, r2
- 8009b16: f04f 0c00 mov.w ip, #0
- 8009b1a: 45d4 cmp ip, sl
- 8009b1c: dd0c ble.n 8009b38 <__kernel_rem_pio2+0x300>
- 8009b1e: eb02 0c07 add.w ip, r2, r7
- 8009b22: a86a add r0, sp, #424 ; 0x1a8
- 8009b24: 4484 add ip, r0
- 8009b26: ed8c 7b02 vstr d7, [ip, #8]
- 8009b2a: 3101 adds r1, #1
- 8009b2c: 3208 adds r2, #8
- 8009b2e: e7da b.n 8009ae6 <__kernel_rem_pio2+0x2ae>
- 8009b30: 9b04 ldr r3, [sp, #16]
- 8009b32: f04f 0c01 mov.w ip, #1
- 8009b36: e7c7 b.n 8009ac8 <__kernel_rem_pio2+0x290>
- 8009b38: ecbe 5b02 vldmia lr!, {d5}
- 8009b3c: ed38 6b02 vldmdb r8!, {d6}
- 8009b40: f10c 0c01 add.w ip, ip, #1
- 8009b44: eea5 7b06 vfma.f64 d7, d5, d6
- 8009b48: e7e7 b.n 8009b1a <__kernel_rem_pio2+0x2e2>
- 8009b4a: 3b01 subs r3, #1
- 8009b4c: e768 b.n 8009a20 <__kernel_rem_pio2+0x1e8>
- 8009b4e: bf00 nop
- ...
- 8009b5c: 3e700000 .word 0x3e700000
- 8009b60: 00000000 .word 0x00000000
- 8009b64: 41700000 .word 0x41700000
- 8009b68: 0800b6e0 .word 0x0800b6e0
- 8009b6c: 0800b6a0 .word 0x0800b6a0
- 8009b70: 4260 negs r0, r4
- 8009b72: eeb0 0b48 vmov.f64 d0, d8
- 8009b76: f000 fcff bl 800a578 <scalbn>
- 8009b7a: ed9f 6b77 vldr d6, [pc, #476] ; 8009d58 <__kernel_rem_pio2+0x520>
- 8009b7e: eeb4 0bc6 vcmpe.f64 d0, d6
- 8009b82: eef1 fa10 vmrs APSR_nzcv, fpscr
- 8009b86: db18 blt.n 8009bba <__kernel_rem_pio2+0x382>
- 8009b88: ed9f 7b75 vldr d7, [pc, #468] ; 8009d60 <__kernel_rem_pio2+0x528>
- 8009b8c: ee20 7b07 vmul.f64 d7, d0, d7
- 8009b90: eebd 7bc7 vcvt.s32.f64 s14, d7
- 8009b94: aa06 add r2, sp, #24
- 8009b96: eeb8 5bc7 vcvt.f64.s32 d5, s14
- 8009b9a: eea5 0b46 vfms.f64 d0, d5, d6
- 8009b9e: eebd 0bc0 vcvt.s32.f64 s0, d0
- 8009ba2: a906 add r1, sp, #24
- 8009ba4: ee10 3a10 vmov r3, s0
- 8009ba8: f842 3025 str.w r3, [r2, r5, lsl #2]
- 8009bac: 1c6b adds r3, r5, #1
- 8009bae: ee17 2a10 vmov r2, s14
- 8009bb2: 3418 adds r4, #24
- 8009bb4: f841 2023 str.w r2, [r1, r3, lsl #2]
- 8009bb8: e739 b.n 8009a2e <__kernel_rem_pio2+0x1f6>
- 8009bba: eebd 0bc0 vcvt.s32.f64 s0, d0
- 8009bbe: aa06 add r2, sp, #24
- 8009bc0: ee10 3a10 vmov r3, s0
- 8009bc4: f842 3025 str.w r3, [r2, r5, lsl #2]
- 8009bc8: 462b mov r3, r5
- 8009bca: e730 b.n 8009a2e <__kernel_rem_pio2+0x1f6>
- 8009bcc: aa06 add r2, sp, #24
- 8009bce: f852 2024 ldr.w r2, [r2, r4, lsl #2]
- 8009bd2: 9202 str r2, [sp, #8]
- 8009bd4: ee07 2a90 vmov s15, r2
- 8009bd8: 3c01 subs r4, #1
- 8009bda: eeb8 7be7 vcvt.f64.s32 d7, s15
- 8009bde: ee27 7b00 vmul.f64 d7, d7, d0
- 8009be2: ee20 0b06 vmul.f64 d0, d0, d6
- 8009be6: ed25 7b02 vstmdb r5!, {d7}
- 8009bea: e72f b.n 8009a4c <__kernel_rem_pio2+0x214>
- 8009bec: eb00 0cc4 add.w ip, r0, r4, lsl #3
- 8009bf0: ecb7 5b02 vldmia r7!, {d5}
- 8009bf4: ed9c 6b00 vldr d6, [ip]
- 8009bf8: 3401 adds r4, #1
- 8009bfa: eea5 7b06 vfma.f64 d7, d5, d6
- 8009bfe: 454c cmp r4, r9
- 8009c00: dc01 bgt.n 8009c06 <__kernel_rem_pio2+0x3ce>
- 8009c02: 42a5 cmp r5, r4
- 8009c04: daf2 bge.n 8009bec <__kernel_rem_pio2+0x3b4>
- 8009c06: aa42 add r2, sp, #264 ; 0x108
- 8009c08: eb02 04c5 add.w r4, r2, r5, lsl #3
- 8009c0c: ed84 7b00 vstr d7, [r4]
- 8009c10: 3501 adds r5, #1
- 8009c12: 3808 subs r0, #8
- 8009c14: e71e b.n 8009a54 <__kernel_rem_pio2+0x21c>
- 8009c16: 9aa2 ldr r2, [sp, #648] ; 0x288
- 8009c18: 2a03 cmp r2, #3
- 8009c1a: d84e bhi.n 8009cba <__kernel_rem_pio2+0x482>
- 8009c1c: e8df f002 tbb [pc, r2]
- 8009c20: 021f1f3e .word 0x021f1f3e
- 8009c24: 3108 adds r1, #8
- 8009c26: aa42 add r2, sp, #264 ; 0x108
- 8009c28: 4411 add r1, r2
- 8009c2a: 4608 mov r0, r1
- 8009c2c: 461c mov r4, r3
- 8009c2e: 2c00 cmp r4, #0
- 8009c30: dc61 bgt.n 8009cf6 <__kernel_rem_pio2+0x4be>
- 8009c32: 4608 mov r0, r1
- 8009c34: 461c mov r4, r3
- 8009c36: 2c01 cmp r4, #1
- 8009c38: dc6d bgt.n 8009d16 <__kernel_rem_pio2+0x4de>
- 8009c3a: ed9f 7b4b vldr d7, [pc, #300] ; 8009d68 <__kernel_rem_pio2+0x530>
- 8009c3e: 2b01 cmp r3, #1
- 8009c40: dc79 bgt.n 8009d36 <__kernel_rem_pio2+0x4fe>
- 8009c42: ed9d 5b42 vldr d5, [sp, #264] ; 0x108
- 8009c46: ed9d 6b44 vldr d6, [sp, #272] ; 0x110
- 8009c4a: f1b8 0f00 cmp.w r8, #0
- 8009c4e: d178 bne.n 8009d42 <__kernel_rem_pio2+0x50a>
- 8009c50: ed86 5b00 vstr d5, [r6]
- 8009c54: ed86 6b02 vstr d6, [r6, #8]
- 8009c58: ed86 7b04 vstr d7, [r6, #16]
- 8009c5c: e02d b.n 8009cba <__kernel_rem_pio2+0x482>
- 8009c5e: ed9f 6b42 vldr d6, [pc, #264] ; 8009d68 <__kernel_rem_pio2+0x530>
- 8009c62: 3108 adds r1, #8
- 8009c64: aa42 add r2, sp, #264 ; 0x108
- 8009c66: 4411 add r1, r2
- 8009c68: 4618 mov r0, r3
- 8009c6a: 2800 cmp r0, #0
- 8009c6c: da34 bge.n 8009cd8 <__kernel_rem_pio2+0x4a0>
- 8009c6e: f1b8 0f00 cmp.w r8, #0
- 8009c72: d037 beq.n 8009ce4 <__kernel_rem_pio2+0x4ac>
- 8009c74: eeb1 7b46 vneg.f64 d7, d6
- 8009c78: ed86 7b00 vstr d7, [r6]
- 8009c7c: ed9d 7b42 vldr d7, [sp, #264] ; 0x108
- 8009c80: a844 add r0, sp, #272 ; 0x110
- 8009c82: 2101 movs r1, #1
- 8009c84: ee37 7b46 vsub.f64 d7, d7, d6
- 8009c88: 428b cmp r3, r1
- 8009c8a: da2e bge.n 8009cea <__kernel_rem_pio2+0x4b2>
- 8009c8c: f1b8 0f00 cmp.w r8, #0
- 8009c90: d001 beq.n 8009c96 <__kernel_rem_pio2+0x45e>
- 8009c92: eeb1 7b47 vneg.f64 d7, d7
- 8009c96: ed86 7b02 vstr d7, [r6, #8]
- 8009c9a: e00e b.n 8009cba <__kernel_rem_pio2+0x482>
- 8009c9c: aa92 add r2, sp, #584 ; 0x248
- 8009c9e: ed9f 7b32 vldr d7, [pc, #200] ; 8009d68 <__kernel_rem_pio2+0x530>
- 8009ca2: 4411 add r1, r2
- 8009ca4: f5a1 719c sub.w r1, r1, #312 ; 0x138
- 8009ca8: 2b00 cmp r3, #0
- 8009caa: da0f bge.n 8009ccc <__kernel_rem_pio2+0x494>
- 8009cac: f1b8 0f00 cmp.w r8, #0
- 8009cb0: d001 beq.n 8009cb6 <__kernel_rem_pio2+0x47e>
- 8009cb2: eeb1 7b47 vneg.f64 d7, d7
- 8009cb6: ed86 7b00 vstr d7, [r6]
- 8009cba: 9b01 ldr r3, [sp, #4]
- 8009cbc: f003 0007 and.w r0, r3, #7
- 8009cc0: f50d 7d13 add.w sp, sp, #588 ; 0x24c
- 8009cc4: ecbd 8b06 vpop {d8-d10}
- 8009cc8: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
- 8009ccc: ed31 6b02 vldmdb r1!, {d6}
- 8009cd0: 3b01 subs r3, #1
- 8009cd2: ee37 7b06 vadd.f64 d7, d7, d6
- 8009cd6: e7e7 b.n 8009ca8 <__kernel_rem_pio2+0x470>
- 8009cd8: ed31 7b02 vldmdb r1!, {d7}
- 8009cdc: 3801 subs r0, #1
- 8009cde: ee36 6b07 vadd.f64 d6, d6, d7
- 8009ce2: e7c2 b.n 8009c6a <__kernel_rem_pio2+0x432>
- 8009ce4: eeb0 7b46 vmov.f64 d7, d6
- 8009ce8: e7c6 b.n 8009c78 <__kernel_rem_pio2+0x440>
- 8009cea: ecb0 6b02 vldmia r0!, {d6}
- 8009cee: 3101 adds r1, #1
- 8009cf0: ee37 7b06 vadd.f64 d7, d7, d6
- 8009cf4: e7c8 b.n 8009c88 <__kernel_rem_pio2+0x450>
- 8009cf6: ed10 7b04 vldr d7, [r0, #-16]
- 8009cfa: ed30 5b02 vldmdb r0!, {d5}
- 8009cfe: 3c01 subs r4, #1
- 8009d00: ee37 6b05 vadd.f64 d6, d7, d5
- 8009d04: ee37 7b46 vsub.f64 d7, d7, d6
- 8009d08: ed00 6b02 vstr d6, [r0, #-8]
- 8009d0c: ee37 7b05 vadd.f64 d7, d7, d5
- 8009d10: ed80 7b00 vstr d7, [r0]
- 8009d14: e78b b.n 8009c2e <__kernel_rem_pio2+0x3f6>
- 8009d16: ed10 7b04 vldr d7, [r0, #-16]
- 8009d1a: ed30 5b02 vldmdb r0!, {d5}
- 8009d1e: 3c01 subs r4, #1
- 8009d20: ee37 6b05 vadd.f64 d6, d7, d5
- 8009d24: ee37 7b46 vsub.f64 d7, d7, d6
- 8009d28: ed00 6b02 vstr d6, [r0, #-8]
- 8009d2c: ee37 7b05 vadd.f64 d7, d7, d5
- 8009d30: ed80 7b00 vstr d7, [r0]
- 8009d34: e77f b.n 8009c36 <__kernel_rem_pio2+0x3fe>
- 8009d36: ed31 6b02 vldmdb r1!, {d6}
- 8009d3a: 3b01 subs r3, #1
- 8009d3c: ee37 7b06 vadd.f64 d7, d7, d6
- 8009d40: e77d b.n 8009c3e <__kernel_rem_pio2+0x406>
- 8009d42: eeb1 5b45 vneg.f64 d5, d5
- 8009d46: eeb1 6b46 vneg.f64 d6, d6
- 8009d4a: ed86 5b00 vstr d5, [r6]
- 8009d4e: eeb1 7b47 vneg.f64 d7, d7
- 8009d52: ed86 6b02 vstr d6, [r6, #8]
- 8009d56: e77f b.n 8009c58 <__kernel_rem_pio2+0x420>
- 8009d58: 00000000 .word 0x00000000
- 8009d5c: 41700000 .word 0x41700000
- 8009d60: 00000000 .word 0x00000000
- 8009d64: 3e700000 .word 0x3e700000
- ...
-
-08009d70 <__kernel_sin>:
- 8009d70: ee10 3a90 vmov r3, s1
- 8009d74: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000
- 8009d78: f1b3 5f79 cmp.w r3, #1044381696 ; 0x3e400000
- 8009d7c: da04 bge.n 8009d88 <__kernel_sin+0x18>
- 8009d7e: eefd 7bc0 vcvt.s32.f64 s15, d0
- 8009d82: ee17 3a90 vmov r3, s15
- 8009d86: b35b cbz r3, 8009de0 <__kernel_sin+0x70>
- 8009d88: ee20 6b00 vmul.f64 d6, d0, d0
- 8009d8c: ee20 5b06 vmul.f64 d5, d0, d6
- 8009d90: ed9f 7b15 vldr d7, [pc, #84] ; 8009de8 <__kernel_sin+0x78>
- 8009d94: ed9f 4b16 vldr d4, [pc, #88] ; 8009df0 <__kernel_sin+0x80>
- 8009d98: eea6 4b07 vfma.f64 d4, d6, d7
- 8009d9c: ed9f 7b16 vldr d7, [pc, #88] ; 8009df8 <__kernel_sin+0x88>
- 8009da0: eea4 7b06 vfma.f64 d7, d4, d6
- 8009da4: ed9f 4b16 vldr d4, [pc, #88] ; 8009e00 <__kernel_sin+0x90>
- 8009da8: eea7 4b06 vfma.f64 d4, d7, d6
- 8009dac: ed9f 7b16 vldr d7, [pc, #88] ; 8009e08 <__kernel_sin+0x98>
- 8009db0: eea4 7b06 vfma.f64 d7, d4, d6
- 8009db4: b930 cbnz r0, 8009dc4 <__kernel_sin+0x54>
- 8009db6: ed9f 4b16 vldr d4, [pc, #88] ; 8009e10 <__kernel_sin+0xa0>
- 8009dba: eea6 4b07 vfma.f64 d4, d6, d7
- 8009dbe: eea4 0b05 vfma.f64 d0, d4, d5
- 8009dc2: 4770 bx lr
- 8009dc4: ee27 7b45 vnmul.f64 d7, d7, d5
- 8009dc8: eeb6 4b00 vmov.f64 d4, #96 ; 0x3f000000 0.5
- 8009dcc: eea1 7b04 vfma.f64 d7, d1, d4
- 8009dd0: ee97 1b06 vfnms.f64 d1, d7, d6
- 8009dd4: ed9f 7b10 vldr d7, [pc, #64] ; 8009e18 <__kernel_sin+0xa8>
- 8009dd8: eea5 1b07 vfma.f64 d1, d5, d7
- 8009ddc: ee30 0b41 vsub.f64 d0, d0, d1
- 8009de0: 4770 bx lr
- 8009de2: bf00 nop
- 8009de4: f3af 8000 nop.w
- 8009de8: 5acfd57c .word 0x5acfd57c
- 8009dec: 3de5d93a .word 0x3de5d93a
- 8009df0: 8a2b9ceb .word 0x8a2b9ceb
- 8009df4: be5ae5e6 .word 0xbe5ae5e6
- 8009df8: 57b1fe7d .word 0x57b1fe7d
- 8009dfc: 3ec71de3 .word 0x3ec71de3
- 8009e00: 19c161d5 .word 0x19c161d5
- 8009e04: bf2a01a0 .word 0xbf2a01a0
- 8009e08: 1110f8a6 .word 0x1110f8a6
- 8009e0c: 3f811111 .word 0x3f811111
- 8009e10: 55555549 .word 0x55555549
- 8009e14: bfc55555 .word 0xbfc55555
- 8009e18: 55555549 .word 0x55555549
- 8009e1c: 3fc55555 .word 0x3fc55555
-
-08009e20 <__kernel_cosf>:
- 8009e20: ee10 3a10 vmov r3, s0
- 8009e24: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000
- 8009e28: f1b3 5f48 cmp.w r3, #838860800 ; 0x32000000
- 8009e2c: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0
- 8009e30: da05 bge.n 8009e3e <__kernel_cosf+0x1e>
- 8009e32: eefd 7ac0 vcvt.s32.f32 s15, s0
- 8009e36: ee17 2a90 vmov r2, s15
- 8009e3a: 2a00 cmp r2, #0
- 8009e3c: d03b beq.n 8009eb6 <__kernel_cosf+0x96>
- 8009e3e: ee20 6a00 vmul.f32 s12, s0, s0
- 8009e42: eeb6 7a00 vmov.f32 s14, #96 ; 0x3f000000 0.5
- 8009e46: eddf 5a1d vldr s11, [pc, #116] ; 8009ebc <__kernel_cosf+0x9c>
- 8009e4a: 4a1d ldr r2, [pc, #116] ; (8009ec0 <__kernel_cosf+0xa0>)
- 8009e4c: ee66 7a07 vmul.f32 s15, s12, s14
- 8009e50: ed9f 7a1c vldr s14, [pc, #112] ; 8009ec4 <__kernel_cosf+0xa4>
- 8009e54: eea6 7a25 vfma.f32 s14, s12, s11
- 8009e58: 4293 cmp r3, r2
- 8009e5a: eddf 5a1b vldr s11, [pc, #108] ; 8009ec8 <__kernel_cosf+0xa8>
- 8009e5e: eee7 5a06 vfma.f32 s11, s14, s12
- 8009e62: ed9f 7a1a vldr s14, [pc, #104] ; 8009ecc <__kernel_cosf+0xac>
- 8009e66: eea5 7a86 vfma.f32 s14, s11, s12
- 8009e6a: eddf 5a19 vldr s11, [pc, #100] ; 8009ed0 <__kernel_cosf+0xb0>
- 8009e6e: eee7 5a06 vfma.f32 s11, s14, s12
- 8009e72: ed9f 7a18 vldr s14, [pc, #96] ; 8009ed4 <__kernel_cosf+0xb4>
- 8009e76: eea5 7a86 vfma.f32 s14, s11, s12
- 8009e7a: ee60 0ac0 vnmul.f32 s1, s1, s0
- 8009e7e: ee27 7a06 vmul.f32 s14, s14, s12
- 8009e82: eee6 0a07 vfma.f32 s1, s12, s14
- 8009e86: dc04 bgt.n 8009e92 <__kernel_cosf+0x72>
- 8009e88: ee77 0ae0 vsub.f32 s1, s15, s1
- 8009e8c: ee36 0ae0 vsub.f32 s0, s13, s1
- 8009e90: 4770 bx lr
- 8009e92: 4a11 ldr r2, [pc, #68] ; (8009ed8 <__kernel_cosf+0xb8>)
- 8009e94: 4293 cmp r3, r2
- 8009e96: bfda itte le
- 8009e98: f103 437f addle.w r3, r3, #4278190080 ; 0xff000000
- 8009e9c: ee07 3a10 vmovle s14, r3
- 8009ea0: eeb5 7a02 vmovgt.f32 s14, #82 ; 0x3e900000 0.2812500
- 8009ea4: ee77 7ac7 vsub.f32 s15, s15, s14
- 8009ea8: ee36 0ac7 vsub.f32 s0, s13, s14
- 8009eac: ee77 7ae0 vsub.f32 s15, s15, s1
- 8009eb0: ee30 0a67 vsub.f32 s0, s0, s15
- 8009eb4: 4770 bx lr
- 8009eb6: eeb0 0a66 vmov.f32 s0, s13
- 8009eba: 4770 bx lr
- 8009ebc: ad47d74e .word 0xad47d74e
- 8009ec0: 3e999999 .word 0x3e999999
- 8009ec4: 310f74f6 .word 0x310f74f6
- 8009ec8: b493f27c .word 0xb493f27c
- 8009ecc: 37d00d01 .word 0x37d00d01
- 8009ed0: bab60b61 .word 0xbab60b61
- 8009ed4: 3d2aaaab .word 0x3d2aaaab
- 8009ed8: 3f480000 .word 0x3f480000
-
-08009edc <__kernel_rem_pio2f>:
- 8009edc: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
- 8009ee0: ed2d 8b04 vpush {d8-d9}
- 8009ee4: b0d7 sub sp, #348 ; 0x15c
- 8009ee6: 469b mov fp, r3
- 8009ee8: 460e mov r6, r1
- 8009eea: 4bbe ldr r3, [pc, #760] ; (800a1e4 <__kernel_rem_pio2f+0x308>)
- 8009eec: 9964 ldr r1, [sp, #400] ; 0x190
- 8009eee: 9002 str r0, [sp, #8]
- 8009ef0: f853 9021 ldr.w r9, [r3, r1, lsl #2]
- 8009ef4: 9865 ldr r0, [sp, #404] ; 0x194
- 8009ef6: ed9f 7abf vldr s14, [pc, #764] ; 800a1f4 <__kernel_rem_pio2f+0x318>
- 8009efa: 1ed1 subs r1, r2, #3
- 8009efc: 2308 movs r3, #8
- 8009efe: fb91 f1f3 sdiv r1, r1, r3
- 8009f02: ea21 71e1 bic.w r1, r1, r1, asr #31
- 8009f06: f10b 3aff add.w sl, fp, #4294967295 ; 0xffffffff
- 8009f0a: 1c4c adds r4, r1, #1
- 8009f0c: eba2 04c4 sub.w r4, r2, r4, lsl #3
- 8009f10: eba1 050a sub.w r5, r1, sl
- 8009f14: aa1a add r2, sp, #104 ; 0x68
- 8009f16: eb09 070a add.w r7, r9, sl
- 8009f1a: eb00 0c85 add.w ip, r0, r5, lsl #2
- 8009f1e: 4696 mov lr, r2
- 8009f20: 2300 movs r3, #0
- 8009f22: 42bb cmp r3, r7
- 8009f24: dd0f ble.n 8009f46 <__kernel_rem_pio2f+0x6a>
- 8009f26: af42 add r7, sp, #264 ; 0x108
- 8009f28: 2200 movs r2, #0
- 8009f2a: 454a cmp r2, r9
- 8009f2c: dc27 bgt.n 8009f7e <__kernel_rem_pio2f+0xa2>
- 8009f2e: f10d 0c68 add.w ip, sp, #104 ; 0x68
- 8009f32: eb0b 0302 add.w r3, fp, r2
- 8009f36: eb0c 0383 add.w r3, ip, r3, lsl #2
- 8009f3a: 9d02 ldr r5, [sp, #8]
- 8009f3c: eddf 7aad vldr s15, [pc, #692] ; 800a1f4 <__kernel_rem_pio2f+0x318>
- 8009f40: f04f 0c00 mov.w ip, #0
- 8009f44: e015 b.n 8009f72 <__kernel_rem_pio2f+0x96>
- 8009f46: 42dd cmn r5, r3
- 8009f48: bf5d ittte pl
- 8009f4a: f85c 2023 ldrpl.w r2, [ip, r3, lsl #2]
- 8009f4e: ee07 2a90 vmovpl s15, r2
- 8009f52: eef8 7ae7 vcvtpl.f32.s32 s15, s15
- 8009f56: eef0 7a47 vmovmi.f32 s15, s14
- 8009f5a: ecee 7a01 vstmia lr!, {s15}
- 8009f5e: 3301 adds r3, #1
- 8009f60: e7df b.n 8009f22 <__kernel_rem_pio2f+0x46>
- 8009f62: ecf5 6a01 vldmia r5!, {s13}
- 8009f66: ed33 7a01 vldmdb r3!, {s14}
- 8009f6a: eee6 7a87 vfma.f32 s15, s13, s14
- 8009f6e: f10c 0c01 add.w ip, ip, #1
- 8009f72: 45d4 cmp ip, sl
- 8009f74: ddf5 ble.n 8009f62 <__kernel_rem_pio2f+0x86>
- 8009f76: ece7 7a01 vstmia r7!, {s15}
- 8009f7a: 3201 adds r2, #1
- 8009f7c: e7d5 b.n 8009f2a <__kernel_rem_pio2f+0x4e>
- 8009f7e: ab06 add r3, sp, #24
- 8009f80: eb03 0389 add.w r3, r3, r9, lsl #2
- 8009f84: 9304 str r3, [sp, #16]
- 8009f86: eddf 8a9a vldr s17, [pc, #616] ; 800a1f0 <__kernel_rem_pio2f+0x314>
- 8009f8a: ed9f 9a98 vldr s18, [pc, #608] ; 800a1ec <__kernel_rem_pio2f+0x310>
- 8009f8e: eb00 0381 add.w r3, r0, r1, lsl #2
- 8009f92: 9303 str r3, [sp, #12]
- 8009f94: 464d mov r5, r9
- 8009f96: ab56 add r3, sp, #344 ; 0x158
- 8009f98: f105 4780 add.w r7, r5, #1073741824 ; 0x40000000
- 8009f9c: eb03 0385 add.w r3, r3, r5, lsl #2
- 8009fa0: 3f01 subs r7, #1
- 8009fa2: ed13 0a14 vldr s0, [r3, #-80] ; 0xffffffb0
- 8009fa6: 00bf lsls r7, r7, #2
- 8009fa8: ab56 add r3, sp, #344 ; 0x158
- 8009faa: 19da adds r2, r3, r7
- 8009fac: 3a4c subs r2, #76 ; 0x4c
- 8009fae: 2300 movs r3, #0
- 8009fb0: 1ae9 subs r1, r5, r3
- 8009fb2: 2900 cmp r1, #0
- 8009fb4: dc4c bgt.n 800a050 <__kernel_rem_pio2f+0x174>
- 8009fb6: 4620 mov r0, r4
- 8009fb8: f000 fba6 bl 800a708 <scalbnf>
- 8009fbc: eeb0 8a40 vmov.f32 s16, s0
- 8009fc0: eeb4 0a00 vmov.f32 s0, #64 ; 0x3e000000 0.125
- 8009fc4: ee28 0a00 vmul.f32 s0, s16, s0
- 8009fc8: f000 fb5c bl 800a684 <floorf>
- 8009fcc: eef2 7a00 vmov.f32 s15, #32 ; 0x41000000 8.0
- 8009fd0: eea0 8a67 vfms.f32 s16, s0, s15
- 8009fd4: 2c00 cmp r4, #0
- 8009fd6: eefd 7ac8 vcvt.s32.f32 s15, s16
- 8009fda: edcd 7a01 vstr s15, [sp, #4]
- 8009fde: eef8 7ae7 vcvt.f32.s32 s15, s15
- 8009fe2: ee38 8a67 vsub.f32 s16, s16, s15
- 8009fe6: dd48 ble.n 800a07a <__kernel_rem_pio2f+0x19e>
- 8009fe8: 1e69 subs r1, r5, #1
- 8009fea: ab06 add r3, sp, #24
- 8009fec: f1c4 0008 rsb r0, r4, #8
- 8009ff0: f853 c021 ldr.w ip, [r3, r1, lsl #2]
- 8009ff4: 9a01 ldr r2, [sp, #4]
- 8009ff6: fa4c f300 asr.w r3, ip, r0
- 8009ffa: 441a add r2, r3
- 8009ffc: 4083 lsls r3, r0
- 8009ffe: 9201 str r2, [sp, #4]
- 800a000: ebac 0203 sub.w r2, ip, r3
- 800a004: ab06 add r3, sp, #24
- 800a006: f843 2021 str.w r2, [r3, r1, lsl #2]
- 800a00a: f1c4 0307 rsb r3, r4, #7
- 800a00e: fa42 f803 asr.w r8, r2, r3
- 800a012: f1b8 0f00 cmp.w r8, #0
- 800a016: dd41 ble.n 800a09c <__kernel_rem_pio2f+0x1c0>
- 800a018: 9b01 ldr r3, [sp, #4]
- 800a01a: 2000 movs r0, #0
- 800a01c: 3301 adds r3, #1
- 800a01e: 9301 str r3, [sp, #4]
- 800a020: 4601 mov r1, r0
- 800a022: 4285 cmp r5, r0
- 800a024: dc6d bgt.n 800a102 <__kernel_rem_pio2f+0x226>
- 800a026: 2c00 cmp r4, #0
- 800a028: dd04 ble.n 800a034 <__kernel_rem_pio2f+0x158>
- 800a02a: 2c01 cmp r4, #1
- 800a02c: d07e beq.n 800a12c <__kernel_rem_pio2f+0x250>
- 800a02e: 2c02 cmp r4, #2
- 800a030: f000 8086 beq.w 800a140 <__kernel_rem_pio2f+0x264>
- 800a034: f1b8 0f02 cmp.w r8, #2
- 800a038: d130 bne.n 800a09c <__kernel_rem_pio2f+0x1c0>
- 800a03a: eeb7 0a00 vmov.f32 s0, #112 ; 0x3f800000 1.0
- 800a03e: ee30 8a48 vsub.f32 s16, s0, s16
- 800a042: b359 cbz r1, 800a09c <__kernel_rem_pio2f+0x1c0>
- 800a044: 4620 mov r0, r4
- 800a046: f000 fb5f bl 800a708 <scalbnf>
- 800a04a: ee38 8a40 vsub.f32 s16, s16, s0
- 800a04e: e025 b.n 800a09c <__kernel_rem_pio2f+0x1c0>
- 800a050: ee60 7a28 vmul.f32 s15, s0, s17
- 800a054: a806 add r0, sp, #24
- 800a056: eefd 7ae7 vcvt.s32.f32 s15, s15
- 800a05a: eef8 7ae7 vcvt.f32.s32 s15, s15
- 800a05e: eea7 0ac9 vfms.f32 s0, s15, s18
- 800a062: eebd 0ac0 vcvt.s32.f32 s0, s0
- 800a066: ee10 1a10 vmov r1, s0
- 800a06a: ed32 0a01 vldmdb r2!, {s0}
- 800a06e: f840 1023 str.w r1, [r0, r3, lsl #2]
- 800a072: ee37 0a80 vadd.f32 s0, s15, s0
- 800a076: 3301 adds r3, #1
- 800a078: e79a b.n 8009fb0 <__kernel_rem_pio2f+0xd4>
- 800a07a: d106 bne.n 800a08a <__kernel_rem_pio2f+0x1ae>
- 800a07c: 1e6b subs r3, r5, #1
- 800a07e: aa06 add r2, sp, #24
- 800a080: f852 2023 ldr.w r2, [r2, r3, lsl #2]
- 800a084: ea4f 2822 mov.w r8, r2, asr #8
- 800a088: e7c3 b.n 800a012 <__kernel_rem_pio2f+0x136>
- 800a08a: eef6 7a00 vmov.f32 s15, #96 ; 0x3f000000 0.5
- 800a08e: eeb4 8ae7 vcmpe.f32 s16, s15
- 800a092: eef1 fa10 vmrs APSR_nzcv, fpscr
- 800a096: da31 bge.n 800a0fc <__kernel_rem_pio2f+0x220>
- 800a098: f04f 0800 mov.w r8, #0
- 800a09c: eeb5 8a40 vcmp.f32 s16, #0.0
- 800a0a0: eef1 fa10 vmrs APSR_nzcv, fpscr
- 800a0a4: f040 80a8 bne.w 800a1f8 <__kernel_rem_pio2f+0x31c>
- 800a0a8: 1e6b subs r3, r5, #1
- 800a0aa: 4618 mov r0, r3
- 800a0ac: 2200 movs r2, #0
- 800a0ae: 4548 cmp r0, r9
- 800a0b0: da4d bge.n 800a14e <__kernel_rem_pio2f+0x272>
- 800a0b2: 2a00 cmp r2, #0
- 800a0b4: f000 8087 beq.w 800a1c6 <__kernel_rem_pio2f+0x2ea>
- 800a0b8: aa06 add r2, sp, #24
- 800a0ba: 3c08 subs r4, #8
- 800a0bc: f852 1023 ldr.w r1, [r2, r3, lsl #2]
- 800a0c0: 2900 cmp r1, #0
- 800a0c2: f000 808d beq.w 800a1e0 <__kernel_rem_pio2f+0x304>
- 800a0c6: 4620 mov r0, r4
- 800a0c8: eeb7 0a00 vmov.f32 s0, #112 ; 0x3f800000 1.0
- 800a0cc: 9302 str r3, [sp, #8]
- 800a0ce: f000 fb1b bl 800a708 <scalbnf>
- 800a0d2: 9b02 ldr r3, [sp, #8]
- 800a0d4: ed9f 7a46 vldr s14, [pc, #280] ; 800a1f0 <__kernel_rem_pio2f+0x314>
- 800a0d8: 0099 lsls r1, r3, #2
- 800a0da: aa42 add r2, sp, #264 ; 0x108
- 800a0dc: 1850 adds r0, r2, r1
- 800a0de: 1d05 adds r5, r0, #4
- 800a0e0: 461c mov r4, r3
- 800a0e2: 2c00 cmp r4, #0
- 800a0e4: f280 80b8 bge.w 800a258 <__kernel_rem_pio2f+0x37c>
- 800a0e8: 2500 movs r5, #0
- 800a0ea: 1b5c subs r4, r3, r5
- 800a0ec: 2c00 cmp r4, #0
- 800a0ee: f2c0 80d8 blt.w 800a2a2 <__kernel_rem_pio2f+0x3c6>
- 800a0f2: 4f3d ldr r7, [pc, #244] ; (800a1e8 <__kernel_rem_pio2f+0x30c>)
- 800a0f4: eddf 7a3f vldr s15, [pc, #252] ; 800a1f4 <__kernel_rem_pio2f+0x318>
- 800a0f8: 2400 movs r4, #0
- 800a0fa: e0c6 b.n 800a28a <__kernel_rem_pio2f+0x3ae>
- 800a0fc: f04f 0802 mov.w r8, #2
- 800a100: e78a b.n 800a018 <__kernel_rem_pio2f+0x13c>
- 800a102: ab06 add r3, sp, #24
- 800a104: f853 3020 ldr.w r3, [r3, r0, lsl #2]
- 800a108: b949 cbnz r1, 800a11e <__kernel_rem_pio2f+0x242>
- 800a10a: b12b cbz r3, 800a118 <__kernel_rem_pio2f+0x23c>
- 800a10c: aa06 add r2, sp, #24
- 800a10e: f5c3 7380 rsb r3, r3, #256 ; 0x100
- 800a112: f842 3020 str.w r3, [r2, r0, lsl #2]
- 800a116: 2301 movs r3, #1
- 800a118: 3001 adds r0, #1
- 800a11a: 4619 mov r1, r3
- 800a11c: e781 b.n 800a022 <__kernel_rem_pio2f+0x146>
- 800a11e: aa06 add r2, sp, #24
- 800a120: f1c3 03ff rsb r3, r3, #255 ; 0xff
- 800a124: f842 3020 str.w r3, [r2, r0, lsl #2]
- 800a128: 460b mov r3, r1
- 800a12a: e7f5 b.n 800a118 <__kernel_rem_pio2f+0x23c>
- 800a12c: 1e68 subs r0, r5, #1
- 800a12e: ab06 add r3, sp, #24
- 800a130: f853 3020 ldr.w r3, [r3, r0, lsl #2]
- 800a134: f003 037f and.w r3, r3, #127 ; 0x7f
- 800a138: aa06 add r2, sp, #24
- 800a13a: f842 3020 str.w r3, [r2, r0, lsl #2]
- 800a13e: e779 b.n 800a034 <__kernel_rem_pio2f+0x158>
- 800a140: 1e68 subs r0, r5, #1
- 800a142: ab06 add r3, sp, #24
- 800a144: f853 3020 ldr.w r3, [r3, r0, lsl #2]
- 800a148: f003 033f and.w r3, r3, #63 ; 0x3f
- 800a14c: e7f4 b.n 800a138 <__kernel_rem_pio2f+0x25c>
- 800a14e: a906 add r1, sp, #24
- 800a150: f851 1020 ldr.w r1, [r1, r0, lsl #2]
- 800a154: 3801 subs r0, #1
- 800a156: 430a orrs r2, r1
- 800a158: e7a9 b.n 800a0ae <__kernel_rem_pio2f+0x1d2>
- 800a15a: f10c 0c01 add.w ip, ip, #1
- 800a15e: f853 2d04 ldr.w r2, [r3, #-4]!
- 800a162: 2a00 cmp r2, #0
- 800a164: d0f9 beq.n 800a15a <__kernel_rem_pio2f+0x27e>
- 800a166: eb0b 0305 add.w r3, fp, r5
- 800a16a: aa1a add r2, sp, #104 ; 0x68
- 800a16c: 009b lsls r3, r3, #2
- 800a16e: 1898 adds r0, r3, r2
- 800a170: 3004 adds r0, #4
- 800a172: 1c69 adds r1, r5, #1
- 800a174: 3704 adds r7, #4
- 800a176: 2200 movs r2, #0
- 800a178: 4465 add r5, ip
- 800a17a: 9005 str r0, [sp, #20]
- 800a17c: 428d cmp r5, r1
- 800a17e: f6ff af0a blt.w 8009f96 <__kernel_rem_pio2f+0xba>
- 800a182: a81a add r0, sp, #104 ; 0x68
- 800a184: eb02 0c03 add.w ip, r2, r3
- 800a188: 4484 add ip, r0
- 800a18a: 9803 ldr r0, [sp, #12]
- 800a18c: f8dd e008 ldr.w lr, [sp, #8]
- 800a190: f850 0021 ldr.w r0, [r0, r1, lsl #2]
- 800a194: 9001 str r0, [sp, #4]
- 800a196: ee07 0a90 vmov s15, r0
- 800a19a: eef8 7ae7 vcvt.f32.s32 s15, s15
- 800a19e: 9805 ldr r0, [sp, #20]
- 800a1a0: edcc 7a00 vstr s15, [ip]
- 800a1a4: eddf 7a13 vldr s15, [pc, #76] ; 800a1f4 <__kernel_rem_pio2f+0x318>
- 800a1a8: eb00 0802 add.w r8, r0, r2
- 800a1ac: f04f 0c00 mov.w ip, #0
- 800a1b0: 45d4 cmp ip, sl
- 800a1b2: dd0c ble.n 800a1ce <__kernel_rem_pio2f+0x2f2>
- 800a1b4: eb02 0c07 add.w ip, r2, r7
- 800a1b8: a842 add r0, sp, #264 ; 0x108
- 800a1ba: 4484 add ip, r0
- 800a1bc: edcc 7a01 vstr s15, [ip, #4]
- 800a1c0: 3101 adds r1, #1
- 800a1c2: 3204 adds r2, #4
- 800a1c4: e7da b.n 800a17c <__kernel_rem_pio2f+0x2a0>
- 800a1c6: 9b04 ldr r3, [sp, #16]
- 800a1c8: f04f 0c01 mov.w ip, #1
- 800a1cc: e7c7 b.n 800a15e <__kernel_rem_pio2f+0x282>
- 800a1ce: ecfe 6a01 vldmia lr!, {s13}
- 800a1d2: ed38 7a01 vldmdb r8!, {s14}
- 800a1d6: f10c 0c01 add.w ip, ip, #1
- 800a1da: eee6 7a87 vfma.f32 s15, s13, s14
- 800a1de: e7e7 b.n 800a1b0 <__kernel_rem_pio2f+0x2d4>
- 800a1e0: 3b01 subs r3, #1
- 800a1e2: e769 b.n 800a0b8 <__kernel_rem_pio2f+0x1dc>
- 800a1e4: 0800b71c .word 0x0800b71c
- 800a1e8: 0800b6f0 .word 0x0800b6f0
- 800a1ec: 43800000 .word 0x43800000
- 800a1f0: 3b800000 .word 0x3b800000
- 800a1f4: 00000000 .word 0x00000000
- 800a1f8: 4260 negs r0, r4
- 800a1fa: eeb0 0a48 vmov.f32 s0, s16
- 800a1fe: f000 fa83 bl 800a708 <scalbnf>
- 800a202: ed1f 7a06 vldr s14, [pc, #-24] ; 800a1ec <__kernel_rem_pio2f+0x310>
- 800a206: eeb4 0ac7 vcmpe.f32 s0, s14
- 800a20a: eef1 fa10 vmrs APSR_nzcv, fpscr
- 800a20e: db1a blt.n 800a246 <__kernel_rem_pio2f+0x36a>
- 800a210: ed5f 7a09 vldr s15, [pc, #-36] ; 800a1f0 <__kernel_rem_pio2f+0x314>
- 800a214: ee60 7a27 vmul.f32 s15, s0, s15
- 800a218: aa06 add r2, sp, #24
- 800a21a: eefd 7ae7 vcvt.s32.f32 s15, s15
- 800a21e: a906 add r1, sp, #24
- 800a220: eef8 7ae7 vcvt.f32.s32 s15, s15
- 800a224: 3408 adds r4, #8
- 800a226: eea7 0ac7 vfms.f32 s0, s15, s14
- 800a22a: eefd 7ae7 vcvt.s32.f32 s15, s15
- 800a22e: eebd 0ac0 vcvt.s32.f32 s0, s0
- 800a232: ee10 3a10 vmov r3, s0
- 800a236: f842 3025 str.w r3, [r2, r5, lsl #2]
- 800a23a: 1c6b adds r3, r5, #1
- 800a23c: ee17 2a90 vmov r2, s15
- 800a240: f841 2023 str.w r2, [r1, r3, lsl #2]
- 800a244: e73f b.n 800a0c6 <__kernel_rem_pio2f+0x1ea>
- 800a246: eebd 0ac0 vcvt.s32.f32 s0, s0
- 800a24a: aa06 add r2, sp, #24
- 800a24c: ee10 3a10 vmov r3, s0
- 800a250: f842 3025 str.w r3, [r2, r5, lsl #2]
- 800a254: 462b mov r3, r5
- 800a256: e736 b.n 800a0c6 <__kernel_rem_pio2f+0x1ea>
- 800a258: aa06 add r2, sp, #24
- 800a25a: f852 2024 ldr.w r2, [r2, r4, lsl #2]
- 800a25e: 9202 str r2, [sp, #8]
- 800a260: ee07 2a90 vmov s15, r2
- 800a264: eef8 7ae7 vcvt.f32.s32 s15, s15
- 800a268: 3c01 subs r4, #1
- 800a26a: ee67 7a80 vmul.f32 s15, s15, s0
- 800a26e: ee20 0a07 vmul.f32 s0, s0, s14
- 800a272: ed65 7a01 vstmdb r5!, {s15}
- 800a276: e734 b.n 800a0e2 <__kernel_rem_pio2f+0x206>
- 800a278: eb00 0c84 add.w ip, r0, r4, lsl #2
- 800a27c: ecf7 6a01 vldmia r7!, {s13}
- 800a280: ed9c 7a00 vldr s14, [ip]
- 800a284: eee6 7a87 vfma.f32 s15, s13, s14
- 800a288: 3401 adds r4, #1
- 800a28a: 454c cmp r4, r9
- 800a28c: dc01 bgt.n 800a292 <__kernel_rem_pio2f+0x3b6>
- 800a28e: 42a5 cmp r5, r4
- 800a290: daf2 bge.n 800a278 <__kernel_rem_pio2f+0x39c>
- 800a292: aa56 add r2, sp, #344 ; 0x158
- 800a294: eb02 0485 add.w r4, r2, r5, lsl #2
- 800a298: ed44 7a28 vstr s15, [r4, #-160] ; 0xffffff60
- 800a29c: 3501 adds r5, #1
- 800a29e: 3804 subs r0, #4
- 800a2a0: e723 b.n 800a0ea <__kernel_rem_pio2f+0x20e>
- 800a2a2: 9a64 ldr r2, [sp, #400] ; 0x190
- 800a2a4: 2a03 cmp r2, #3
- 800a2a6: d84d bhi.n 800a344 <__kernel_rem_pio2f+0x468>
- 800a2a8: e8df f002 tbb [pc, r2]
- 800a2ac: 021f1f3e .word 0x021f1f3e
- 800a2b0: aa56 add r2, sp, #344 ; 0x158
- 800a2b2: 4411 add r1, r2
- 800a2b4: 399c subs r1, #156 ; 0x9c
- 800a2b6: 4608 mov r0, r1
- 800a2b8: 461c mov r4, r3
- 800a2ba: 2c00 cmp r4, #0
- 800a2bc: dc5f bgt.n 800a37e <__kernel_rem_pio2f+0x4a2>
- 800a2be: 4608 mov r0, r1
- 800a2c0: 461c mov r4, r3
- 800a2c2: 2c01 cmp r4, #1
- 800a2c4: dc6b bgt.n 800a39e <__kernel_rem_pio2f+0x4c2>
- 800a2c6: ed5f 7a35 vldr s15, [pc, #-212] ; 800a1f4 <__kernel_rem_pio2f+0x318>
- 800a2ca: 2b01 cmp r3, #1
- 800a2cc: dc77 bgt.n 800a3be <__kernel_rem_pio2f+0x4e2>
- 800a2ce: eddd 6a2e vldr s13, [sp, #184] ; 0xb8
- 800a2d2: ed9d 7a2f vldr s14, [sp, #188] ; 0xbc
- 800a2d6: f1b8 0f00 cmp.w r8, #0
- 800a2da: d176 bne.n 800a3ca <__kernel_rem_pio2f+0x4ee>
- 800a2dc: edc6 6a00 vstr s13, [r6]
- 800a2e0: ed86 7a01 vstr s14, [r6, #4]
- 800a2e4: edc6 7a02 vstr s15, [r6, #8]
- 800a2e8: e02c b.n 800a344 <__kernel_rem_pio2f+0x468>
- 800a2ea: aa56 add r2, sp, #344 ; 0x158
- 800a2ec: 4411 add r1, r2
- 800a2ee: ed1f 7a3f vldr s14, [pc, #-252] ; 800a1f4 <__kernel_rem_pio2f+0x318>
- 800a2f2: 399c subs r1, #156 ; 0x9c
- 800a2f4: 4618 mov r0, r3
- 800a2f6: 2800 cmp r0, #0
- 800a2f8: da32 bge.n 800a360 <__kernel_rem_pio2f+0x484>
- 800a2fa: f1b8 0f00 cmp.w r8, #0
- 800a2fe: d035 beq.n 800a36c <__kernel_rem_pio2f+0x490>
- 800a300: eef1 7a47 vneg.f32 s15, s14
- 800a304: edc6 7a00 vstr s15, [r6]
- 800a308: eddd 7a2e vldr s15, [sp, #184] ; 0xb8
- 800a30c: ee77 7ac7 vsub.f32 s15, s15, s14
- 800a310: a82f add r0, sp, #188 ; 0xbc
- 800a312: 2101 movs r1, #1
- 800a314: 428b cmp r3, r1
- 800a316: da2c bge.n 800a372 <__kernel_rem_pio2f+0x496>
- 800a318: f1b8 0f00 cmp.w r8, #0
- 800a31c: d001 beq.n 800a322 <__kernel_rem_pio2f+0x446>
- 800a31e: eef1 7a67 vneg.f32 s15, s15
- 800a322: edc6 7a01 vstr s15, [r6, #4]
- 800a326: e00d b.n 800a344 <__kernel_rem_pio2f+0x468>
- 800a328: aa56 add r2, sp, #344 ; 0x158
- 800a32a: 4411 add r1, r2
- 800a32c: ed5f 7a4f vldr s15, [pc, #-316] ; 800a1f4 <__kernel_rem_pio2f+0x318>
- 800a330: 399c subs r1, #156 ; 0x9c
- 800a332: 2b00 cmp r3, #0
- 800a334: da0e bge.n 800a354 <__kernel_rem_pio2f+0x478>
- 800a336: f1b8 0f00 cmp.w r8, #0
- 800a33a: d001 beq.n 800a340 <__kernel_rem_pio2f+0x464>
- 800a33c: eef1 7a67 vneg.f32 s15, s15
- 800a340: edc6 7a00 vstr s15, [r6]
- 800a344: 9b01 ldr r3, [sp, #4]
- 800a346: f003 0007 and.w r0, r3, #7
- 800a34a: b057 add sp, #348 ; 0x15c
- 800a34c: ecbd 8b04 vpop {d8-d9}
- 800a350: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
- 800a354: ed31 7a01 vldmdb r1!, {s14}
- 800a358: 3b01 subs r3, #1
- 800a35a: ee77 7a87 vadd.f32 s15, s15, s14
- 800a35e: e7e8 b.n 800a332 <__kernel_rem_pio2f+0x456>
- 800a360: ed71 7a01 vldmdb r1!, {s15}
- 800a364: 3801 subs r0, #1
- 800a366: ee37 7a27 vadd.f32 s14, s14, s15
- 800a36a: e7c4 b.n 800a2f6 <__kernel_rem_pio2f+0x41a>
- 800a36c: eef0 7a47 vmov.f32 s15, s14
- 800a370: e7c8 b.n 800a304 <__kernel_rem_pio2f+0x428>
- 800a372: ecb0 7a01 vldmia r0!, {s14}
- 800a376: 3101 adds r1, #1
- 800a378: ee77 7a87 vadd.f32 s15, s15, s14
- 800a37c: e7ca b.n 800a314 <__kernel_rem_pio2f+0x438>
- 800a37e: ed50 7a02 vldr s15, [r0, #-8]
- 800a382: ed70 6a01 vldmdb r0!, {s13}
- 800a386: ee37 7aa6 vadd.f32 s14, s15, s13
- 800a38a: 3c01 subs r4, #1
- 800a38c: ee77 7ac7 vsub.f32 s15, s15, s14
- 800a390: ed00 7a01 vstr s14, [r0, #-4]
- 800a394: ee77 7aa6 vadd.f32 s15, s15, s13
- 800a398: edc0 7a00 vstr s15, [r0]
- 800a39c: e78d b.n 800a2ba <__kernel_rem_pio2f+0x3de>
- 800a39e: ed50 7a02 vldr s15, [r0, #-8]
- 800a3a2: ed70 6a01 vldmdb r0!, {s13}
- 800a3a6: ee37 7aa6 vadd.f32 s14, s15, s13
- 800a3aa: 3c01 subs r4, #1
- 800a3ac: ee77 7ac7 vsub.f32 s15, s15, s14
- 800a3b0: ed00 7a01 vstr s14, [r0, #-4]
- 800a3b4: ee77 7aa6 vadd.f32 s15, s15, s13
- 800a3b8: edc0 7a00 vstr s15, [r0]
- 800a3bc: e781 b.n 800a2c2 <__kernel_rem_pio2f+0x3e6>
- 800a3be: ed31 7a01 vldmdb r1!, {s14}
- 800a3c2: 3b01 subs r3, #1
- 800a3c4: ee77 7a87 vadd.f32 s15, s15, s14
- 800a3c8: e77f b.n 800a2ca <__kernel_rem_pio2f+0x3ee>
- 800a3ca: eef1 6a66 vneg.f32 s13, s13
- 800a3ce: eeb1 7a47 vneg.f32 s14, s14
- 800a3d2: edc6 6a00 vstr s13, [r6]
- 800a3d6: ed86 7a01 vstr s14, [r6, #4]
- 800a3da: eef1 7a67 vneg.f32 s15, s15
- 800a3de: e781 b.n 800a2e4 <__kernel_rem_pio2f+0x408>
-
-0800a3e0 <__kernel_sinf>:
- 800a3e0: ee10 3a10 vmov r3, s0
- 800a3e4: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000
- 800a3e8: f1b3 5f48 cmp.w r3, #838860800 ; 0x32000000
- 800a3ec: da04 bge.n 800a3f8 <__kernel_sinf+0x18>
- 800a3ee: eefd 7ac0 vcvt.s32.f32 s15, s0
- 800a3f2: ee17 3a90 vmov r3, s15
- 800a3f6: b35b cbz r3, 800a450 <__kernel_sinf+0x70>
- 800a3f8: ee20 7a00 vmul.f32 s14, s0, s0
- 800a3fc: eddf 7a15 vldr s15, [pc, #84] ; 800a454 <__kernel_sinf+0x74>
- 800a400: ed9f 6a15 vldr s12, [pc, #84] ; 800a458 <__kernel_sinf+0x78>
- 800a404: eea7 6a27 vfma.f32 s12, s14, s15
- 800a408: eddf 7a14 vldr s15, [pc, #80] ; 800a45c <__kernel_sinf+0x7c>
- 800a40c: eee6 7a07 vfma.f32 s15, s12, s14
- 800a410: ed9f 6a13 vldr s12, [pc, #76] ; 800a460 <__kernel_sinf+0x80>
- 800a414: eea7 6a87 vfma.f32 s12, s15, s14
- 800a418: eddf 7a12 vldr s15, [pc, #72] ; 800a464 <__kernel_sinf+0x84>
- 800a41c: ee60 6a07 vmul.f32 s13, s0, s14
- 800a420: eee6 7a07 vfma.f32 s15, s12, s14
- 800a424: b930 cbnz r0, 800a434 <__kernel_sinf+0x54>
- 800a426: ed9f 6a10 vldr s12, [pc, #64] ; 800a468 <__kernel_sinf+0x88>
- 800a42a: eea7 6a27 vfma.f32 s12, s14, s15
- 800a42e: eea6 0a26 vfma.f32 s0, s12, s13
- 800a432: 4770 bx lr
- 800a434: ee67 7ae6 vnmul.f32 s15, s15, s13
- 800a438: eeb6 6a00 vmov.f32 s12, #96 ; 0x3f000000 0.5
- 800a43c: eee0 7a86 vfma.f32 s15, s1, s12
- 800a440: eed7 0a87 vfnms.f32 s1, s15, s14
- 800a444: eddf 7a09 vldr s15, [pc, #36] ; 800a46c <__kernel_sinf+0x8c>
- 800a448: eee6 0aa7 vfma.f32 s1, s13, s15
- 800a44c: ee30 0a60 vsub.f32 s0, s0, s1
- 800a450: 4770 bx lr
- 800a452: bf00 nop
- 800a454: 2f2ec9d3 .word 0x2f2ec9d3
- 800a458: b2d72f34 .word 0xb2d72f34
- 800a45c: 3638ef1b .word 0x3638ef1b
- 800a460: b9500d01 .word 0xb9500d01
- 800a464: 3c088889 .word 0x3c088889
- 800a468: be2aaaab .word 0xbe2aaaab
- 800a46c: 3e2aaaab .word 0x3e2aaaab
-
-0800a470 <fabs>:
- 800a470: ec51 0b10 vmov r0, r1, d0
- 800a474: ee10 2a10 vmov r2, s0
- 800a478: f021 4300 bic.w r3, r1, #2147483648 ; 0x80000000
- 800a47c: ec43 2b10 vmov d0, r2, r3
- 800a480: 4770 bx lr
- 800a482: 0000 movs r0, r0
- 800a484: 0000 movs r0, r0
- ...
-
-0800a488 <floor>:
- 800a488: ee10 1a90 vmov r1, s1
- 800a48c: f3c1 520a ubfx r2, r1, #20, #11
- 800a490: f2a2 33ff subw r3, r2, #1023 ; 0x3ff
- 800a494: 2b13 cmp r3, #19
- 800a496: b530 push {r4, r5, lr}
- 800a498: ee10 0a10 vmov r0, s0
- 800a49c: ee10 5a10 vmov r5, s0
- 800a4a0: dc33 bgt.n 800a50a <floor+0x82>
- 800a4a2: 2b00 cmp r3, #0
- 800a4a4: da17 bge.n 800a4d6 <floor+0x4e>
- 800a4a6: ed9f 7b30 vldr d7, [pc, #192] ; 800a568 <floor+0xe0>
- 800a4aa: ee30 0b07 vadd.f64 d0, d0, d7
- 800a4ae: eeb5 0bc0 vcmpe.f64 d0, #0.0
- 800a4b2: eef1 fa10 vmrs APSR_nzcv, fpscr
- 800a4b6: dd09 ble.n 800a4cc <floor+0x44>
- 800a4b8: 2900 cmp r1, #0
- 800a4ba: da50 bge.n 800a55e <floor+0xd6>
- 800a4bc: f021 4300 bic.w r3, r1, #2147483648 ; 0x80000000
- 800a4c0: 4a2b ldr r2, [pc, #172] ; (800a570 <floor+0xe8>)
- 800a4c2: 4303 orrs r3, r0
- 800a4c4: 2000 movs r0, #0
- 800a4c6: 4283 cmp r3, r0
- 800a4c8: bf18 it ne
- 800a4ca: 4611 movne r1, r2
- 800a4cc: 460b mov r3, r1
- 800a4ce: 4602 mov r2, r0
- 800a4d0: ec43 2b10 vmov d0, r2, r3
- 800a4d4: e020 b.n 800a518 <floor+0x90>
- 800a4d6: 4a27 ldr r2, [pc, #156] ; (800a574 <floor+0xec>)
- 800a4d8: 411a asrs r2, r3
- 800a4da: ea01 0402 and.w r4, r1, r2
- 800a4de: 4304 orrs r4, r0
- 800a4e0: d01a beq.n 800a518 <floor+0x90>
- 800a4e2: ed9f 7b21 vldr d7, [pc, #132] ; 800a568 <floor+0xe0>
- 800a4e6: ee30 0b07 vadd.f64 d0, d0, d7
- 800a4ea: eeb5 0bc0 vcmpe.f64 d0, #0.0
- 800a4ee: eef1 fa10 vmrs APSR_nzcv, fpscr
- 800a4f2: ddeb ble.n 800a4cc <floor+0x44>
- 800a4f4: 2900 cmp r1, #0
- 800a4f6: bfbe ittt lt
- 800a4f8: f44f 1080 movlt.w r0, #1048576 ; 0x100000
- 800a4fc: fa40 f303 asrlt.w r3, r0, r3
- 800a500: 18c9 addlt r1, r1, r3
- 800a502: ea21 0102 bic.w r1, r1, r2
- 800a506: 2000 movs r0, #0
- 800a508: e7e0 b.n 800a4cc <floor+0x44>
- 800a50a: 2b33 cmp r3, #51 ; 0x33
- 800a50c: dd05 ble.n 800a51a <floor+0x92>
- 800a50e: f5b3 6f80 cmp.w r3, #1024 ; 0x400
- 800a512: d101 bne.n 800a518 <floor+0x90>
- 800a514: ee30 0b00 vadd.f64 d0, d0, d0
- 800a518: bd30 pop {r4, r5, pc}
- 800a51a: f2a2 4413 subw r4, r2, #1043 ; 0x413
- 800a51e: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff
- 800a522: 40e2 lsrs r2, r4
- 800a524: 4202 tst r2, r0
- 800a526: d0f7 beq.n 800a518 <floor+0x90>
- 800a528: ed9f 7b0f vldr d7, [pc, #60] ; 800a568 <floor+0xe0>
- 800a52c: ee30 0b07 vadd.f64 d0, d0, d7
- 800a530: eeb5 0bc0 vcmpe.f64 d0, #0.0
- 800a534: eef1 fa10 vmrs APSR_nzcv, fpscr
- 800a538: ddc8 ble.n 800a4cc <floor+0x44>
- 800a53a: 2900 cmp r1, #0
- 800a53c: da02 bge.n 800a544 <floor+0xbc>
- 800a53e: 2b14 cmp r3, #20
- 800a540: d103 bne.n 800a54a <floor+0xc2>
- 800a542: 3101 adds r1, #1
- 800a544: ea20 0002 bic.w r0, r0, r2
- 800a548: e7c0 b.n 800a4cc <floor+0x44>
- 800a54a: 2401 movs r4, #1
- 800a54c: f1c3 0334 rsb r3, r3, #52 ; 0x34
- 800a550: fa04 f303 lsl.w r3, r4, r3
- 800a554: 4418 add r0, r3
- 800a556: 42a8 cmp r0, r5
- 800a558: bf38 it cc
- 800a55a: 1909 addcc r1, r1, r4
- 800a55c: e7f2 b.n 800a544 <floor+0xbc>
- 800a55e: 2000 movs r0, #0
- 800a560: 4601 mov r1, r0
- 800a562: e7b3 b.n 800a4cc <floor+0x44>
- 800a564: f3af 8000 nop.w
- 800a568: 8800759c .word 0x8800759c
- 800a56c: 7e37e43c .word 0x7e37e43c
- 800a570: bff00000 .word 0xbff00000
- 800a574: 000fffff .word 0x000fffff
-
-0800a578 <scalbn>:
- 800a578: b500 push {lr}
- 800a57a: ed2d 8b02 vpush {d8}
- 800a57e: b083 sub sp, #12
- 800a580: ed8d 0b00 vstr d0, [sp]
- 800a584: 9b01 ldr r3, [sp, #4]
- 800a586: f3c3 520a ubfx r2, r3, #20, #11
- 800a58a: b9a2 cbnz r2, 800a5b6 <scalbn+0x3e>
- 800a58c: 9a00 ldr r2, [sp, #0]
- 800a58e: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000
- 800a592: 4313 orrs r3, r2
- 800a594: d03a beq.n 800a60c <scalbn+0x94>
- 800a596: ed9f 7b2e vldr d7, [pc, #184] ; 800a650 <scalbn+0xd8>
- 800a59a: 4b35 ldr r3, [pc, #212] ; (800a670 <scalbn+0xf8>)
- 800a59c: ee20 7b07 vmul.f64 d7, d0, d7
- 800a5a0: 4298 cmp r0, r3
- 800a5a2: ed8d 7b00 vstr d7, [sp]
- 800a5a6: da11 bge.n 800a5cc <scalbn+0x54>
- 800a5a8: ed9f 7b2b vldr d7, [pc, #172] ; 800a658 <scalbn+0xe0>
- 800a5ac: ed9d 6b00 vldr d6, [sp]
- 800a5b0: ee27 7b06 vmul.f64 d7, d7, d6
- 800a5b4: e007 b.n 800a5c6 <scalbn+0x4e>
- 800a5b6: f240 71ff movw r1, #2047 ; 0x7ff
- 800a5ba: 428a cmp r2, r1
- 800a5bc: d10a bne.n 800a5d4 <scalbn+0x5c>
- 800a5be: ed9d 7b00 vldr d7, [sp]
- 800a5c2: ee37 7b07 vadd.f64 d7, d7, d7
- 800a5c6: ed8d 7b00 vstr d7, [sp]
- 800a5ca: e01f b.n 800a60c <scalbn+0x94>
- 800a5cc: 9b01 ldr r3, [sp, #4]
- 800a5ce: f3c3 520a ubfx r2, r3, #20, #11
- 800a5d2: 3a36 subs r2, #54 ; 0x36
- 800a5d4: 4402 add r2, r0
- 800a5d6: f240 71fe movw r1, #2046 ; 0x7fe
- 800a5da: 428a cmp r2, r1
- 800a5dc: dd0a ble.n 800a5f4 <scalbn+0x7c>
- 800a5de: ed9f 8b20 vldr d8, [pc, #128] ; 800a660 <scalbn+0xe8>
- 800a5e2: eeb0 0b48 vmov.f64 d0, d8
- 800a5e6: ed9d 1b00 vldr d1, [sp]
- 800a5ea: f000 f8ed bl 800a7c8 <copysign>
- 800a5ee: ee20 7b08 vmul.f64 d7, d0, d8
- 800a5f2: e7e8 b.n 800a5c6 <scalbn+0x4e>
- 800a5f4: 2a00 cmp r2, #0
- 800a5f6: dd10 ble.n 800a61a <scalbn+0xa2>
- 800a5f8: e9dd 0100 ldrd r0, r1, [sp]
- 800a5fc: f023 43ff bic.w r3, r3, #2139095040 ; 0x7f800000
- 800a600: f423 03e0 bic.w r3, r3, #7340032 ; 0x700000
- 800a604: ea43 5102 orr.w r1, r3, r2, lsl #20
- 800a608: e9cd 0100 strd r0, r1, [sp]
- 800a60c: ed9d 0b00 vldr d0, [sp]
- 800a610: b003 add sp, #12
- 800a612: ecbd 8b02 vpop {d8}
- 800a616: f85d fb04 ldr.w pc, [sp], #4
- 800a61a: f112 0f35 cmn.w r2, #53 ; 0x35
- 800a61e: da06 bge.n 800a62e <scalbn+0xb6>
- 800a620: f24c 3350 movw r3, #50000 ; 0xc350
- 800a624: 4298 cmp r0, r3
- 800a626: dcda bgt.n 800a5de <scalbn+0x66>
- 800a628: ed9f 8b0b vldr d8, [pc, #44] ; 800a658 <scalbn+0xe0>
- 800a62c: e7d9 b.n 800a5e2 <scalbn+0x6a>
- 800a62e: e9dd 0100 ldrd r0, r1, [sp]
- 800a632: f023 43ff bic.w r3, r3, #2139095040 ; 0x7f800000
- 800a636: 3236 adds r2, #54 ; 0x36
- 800a638: f423 03e0 bic.w r3, r3, #7340032 ; 0x700000
- 800a63c: ea43 5102 orr.w r1, r3, r2, lsl #20
- 800a640: ec41 0b17 vmov d7, r0, r1
- 800a644: ed9f 6b08 vldr d6, [pc, #32] ; 800a668 <scalbn+0xf0>
- 800a648: e7b2 b.n 800a5b0 <scalbn+0x38>
- 800a64a: bf00 nop
- 800a64c: f3af 8000 nop.w
- 800a650: 00000000 .word 0x00000000
- 800a654: 43500000 .word 0x43500000
- 800a658: c2f8f359 .word 0xc2f8f359
- 800a65c: 01a56e1f .word 0x01a56e1f
- 800a660: 8800759c .word 0x8800759c
- 800a664: 7e37e43c .word 0x7e37e43c
- 800a668: 00000000 .word 0x00000000
- 800a66c: 3c900000 .word 0x3c900000
- 800a670: ffff3cb0 .word 0xffff3cb0
-
-0800a674 <fabsf>:
- 800a674: ee10 3a10 vmov r3, s0
- 800a678: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000
- 800a67c: ee00 3a10 vmov s0, r3
- 800a680: 4770 bx lr
- ...
-
-0800a684 <floorf>:
- 800a684: ee10 3a10 vmov r3, s0
- 800a688: f023 4100 bic.w r1, r3, #2147483648 ; 0x80000000
- 800a68c: 0dca lsrs r2, r1, #23
- 800a68e: 3a7f subs r2, #127 ; 0x7f
- 800a690: 2a16 cmp r2, #22
- 800a692: dc2a bgt.n 800a6ea <floorf+0x66>
- 800a694: 2a00 cmp r2, #0
- 800a696: da11 bge.n 800a6bc <floorf+0x38>
- 800a698: eddf 7a18 vldr s15, [pc, #96] ; 800a6fc <floorf+0x78>
- 800a69c: ee30 0a27 vadd.f32 s0, s0, s15
- 800a6a0: eeb5 0ac0 vcmpe.f32 s0, #0.0
- 800a6a4: eef1 fa10 vmrs APSR_nzcv, fpscr
- 800a6a8: dd05 ble.n 800a6b6 <floorf+0x32>
- 800a6aa: 2b00 cmp r3, #0
- 800a6ac: da23 bge.n 800a6f6 <floorf+0x72>
- 800a6ae: 4a14 ldr r2, [pc, #80] ; (800a700 <floorf+0x7c>)
- 800a6b0: 2900 cmp r1, #0
- 800a6b2: bf18 it ne
- 800a6b4: 4613 movne r3, r2
- 800a6b6: ee00 3a10 vmov s0, r3
- 800a6ba: 4770 bx lr
- 800a6bc: 4911 ldr r1, [pc, #68] ; (800a704 <floorf+0x80>)
- 800a6be: 4111 asrs r1, r2
- 800a6c0: 420b tst r3, r1
- 800a6c2: d0fa beq.n 800a6ba <floorf+0x36>
- 800a6c4: eddf 7a0d vldr s15, [pc, #52] ; 800a6fc <floorf+0x78>
- 800a6c8: ee30 0a27 vadd.f32 s0, s0, s15
- 800a6cc: eeb5 0ac0 vcmpe.f32 s0, #0.0
- 800a6d0: eef1 fa10 vmrs APSR_nzcv, fpscr
- 800a6d4: ddef ble.n 800a6b6 <floorf+0x32>
- 800a6d6: 2b00 cmp r3, #0
- 800a6d8: bfbe ittt lt
- 800a6da: f44f 0000 movlt.w r0, #8388608 ; 0x800000
- 800a6de: fa40 f202 asrlt.w r2, r0, r2
- 800a6e2: 189b addlt r3, r3, r2
- 800a6e4: ea23 0301 bic.w r3, r3, r1
- 800a6e8: e7e5 b.n 800a6b6 <floorf+0x32>
- 800a6ea: f1b1 4fff cmp.w r1, #2139095040 ; 0x7f800000
- 800a6ee: d3e4 bcc.n 800a6ba <floorf+0x36>
- 800a6f0: ee30 0a00 vadd.f32 s0, s0, s0
- 800a6f4: 4770 bx lr
- 800a6f6: 2300 movs r3, #0
- 800a6f8: e7dd b.n 800a6b6 <floorf+0x32>
- 800a6fa: bf00 nop
- 800a6fc: 7149f2ca .word 0x7149f2ca
- 800a700: bf800000 .word 0xbf800000
- 800a704: 007fffff .word 0x007fffff
-
-0800a708 <scalbnf>:
- 800a708: b508 push {r3, lr}
- 800a70a: ee10 2a10 vmov r2, s0
- 800a70e: f032 4300 bics.w r3, r2, #2147483648 ; 0x80000000
- 800a712: ed2d 8b02 vpush {d8}
- 800a716: eef0 0a40 vmov.f32 s1, s0
- 800a71a: d004 beq.n 800a726 <scalbnf+0x1e>
- 800a71c: f1b3 4fff cmp.w r3, #2139095040 ; 0x7f800000
- 800a720: d306 bcc.n 800a730 <scalbnf+0x28>
- 800a722: ee70 0a00 vadd.f32 s1, s0, s0
- 800a726: ecbd 8b02 vpop {d8}
- 800a72a: eeb0 0a60 vmov.f32 s0, s1
- 800a72e: bd08 pop {r3, pc}
- 800a730: f5b3 0f00 cmp.w r3, #8388608 ; 0x800000
- 800a734: d21c bcs.n 800a770 <scalbnf+0x68>
- 800a736: 4b1f ldr r3, [pc, #124] ; (800a7b4 <scalbnf+0xac>)
- 800a738: eddf 7a1f vldr s15, [pc, #124] ; 800a7b8 <scalbnf+0xb0>
- 800a73c: 4298 cmp r0, r3
- 800a73e: ee60 0a27 vmul.f32 s1, s0, s15
- 800a742: db10 blt.n 800a766 <scalbnf+0x5e>
- 800a744: ee10 2a90 vmov r2, s1
- 800a748: f3c2 53c7 ubfx r3, r2, #23, #8
- 800a74c: 3b19 subs r3, #25
- 800a74e: 4403 add r3, r0
- 800a750: 2bfe cmp r3, #254 ; 0xfe
- 800a752: dd0f ble.n 800a774 <scalbnf+0x6c>
- 800a754: ed9f 8a19 vldr s16, [pc, #100] ; 800a7bc <scalbnf+0xb4>
- 800a758: eeb0 0a48 vmov.f32 s0, s16
- 800a75c: f000 f843 bl 800a7e6 <copysignf>
- 800a760: ee60 0a08 vmul.f32 s1, s0, s16
- 800a764: e7df b.n 800a726 <scalbnf+0x1e>
- 800a766: eddf 7a16 vldr s15, [pc, #88] ; 800a7c0 <scalbnf+0xb8>
- 800a76a: ee60 0aa7 vmul.f32 s1, s1, s15
- 800a76e: e7da b.n 800a726 <scalbnf+0x1e>
- 800a770: 0ddb lsrs r3, r3, #23
- 800a772: e7ec b.n 800a74e <scalbnf+0x46>
- 800a774: 2b00 cmp r3, #0
- 800a776: dd06 ble.n 800a786 <scalbnf+0x7e>
- 800a778: f022 42ff bic.w r2, r2, #2139095040 ; 0x7f800000
- 800a77c: ea42 53c3 orr.w r3, r2, r3, lsl #23
- 800a780: ee00 3a90 vmov s1, r3
- 800a784: e7cf b.n 800a726 <scalbnf+0x1e>
- 800a786: f113 0f16 cmn.w r3, #22
- 800a78a: da06 bge.n 800a79a <scalbnf+0x92>
- 800a78c: f24c 3350 movw r3, #50000 ; 0xc350
- 800a790: 4298 cmp r0, r3
- 800a792: dcdf bgt.n 800a754 <scalbnf+0x4c>
- 800a794: ed9f 8a0a vldr s16, [pc, #40] ; 800a7c0 <scalbnf+0xb8>
- 800a798: e7de b.n 800a758 <scalbnf+0x50>
- 800a79a: 3319 adds r3, #25
- 800a79c: f022 42ff bic.w r2, r2, #2139095040 ; 0x7f800000
- 800a7a0: ea42 53c3 orr.w r3, r2, r3, lsl #23
- 800a7a4: eddf 7a07 vldr s15, [pc, #28] ; 800a7c4 <scalbnf+0xbc>
- 800a7a8: ee07 3a10 vmov s14, r3
- 800a7ac: ee67 0a27 vmul.f32 s1, s14, s15
- 800a7b0: e7b9 b.n 800a726 <scalbnf+0x1e>
- 800a7b2: bf00 nop
- 800a7b4: ffff3cb0 .word 0xffff3cb0
- 800a7b8: 4c000000 .word 0x4c000000
- 800a7bc: 7149f2ca .word 0x7149f2ca
- 800a7c0: 0da24260 .word 0x0da24260
- 800a7c4: 33000000 .word 0x33000000
-
-0800a7c8 <copysign>:
- 800a7c8: ec51 0b10 vmov r0, r1, d0
- 800a7cc: ee11 0a90 vmov r0, s3
- 800a7d0: ee10 2a10 vmov r2, s0
- 800a7d4: f021 4100 bic.w r1, r1, #2147483648 ; 0x80000000
- 800a7d8: f000 4000 and.w r0, r0, #2147483648 ; 0x80000000
- 800a7dc: ea41 0300 orr.w r3, r1, r0
- 800a7e0: ec43 2b10 vmov d0, r2, r3
- 800a7e4: 4770 bx lr
-
-0800a7e6 <copysignf>:
- 800a7e6: ee10 3a10 vmov r3, s0
- 800a7ea: ee10 2a90 vmov r2, s1
- 800a7ee: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000
- 800a7f2: f002 4200 and.w r2, r2, #2147483648 ; 0x80000000
- 800a7f6: 4313 orrs r3, r2
- 800a7f8: ee00 3a10 vmov s0, r3
- 800a7fc: 4770 bx lr
-
-0800a7fe <abort>:
- 800a7fe: b508 push {r3, lr}
- 800a800: 2006 movs r0, #6
- 800a802: f000 f871 bl 800a8e8 <raise>
- 800a806: 2001 movs r0, #1
- 800a808: f7fa fc48 bl 800509c <_exit>
-
-0800a80c <__errno>:
- 800a80c: 4b01 ldr r3, [pc, #4] ; (800a814 <__errno+0x8>)
- 800a80e: 6818 ldr r0, [r3, #0]
- 800a810: 4770 bx lr
- 800a812: bf00 nop
- 800a814: 20000020 .word 0x20000020
-
-0800a818 <__libc_init_array>:
- 800a818: b570 push {r4, r5, r6, lr}
- 800a81a: 4e0d ldr r6, [pc, #52] ; (800a850 <__libc_init_array+0x38>)
- 800a81c: 4c0d ldr r4, [pc, #52] ; (800a854 <__libc_init_array+0x3c>)
- 800a81e: 1ba4 subs r4, r4, r6
- 800a820: 10a4 asrs r4, r4, #2
- 800a822: 2500 movs r5, #0
- 800a824: 42a5 cmp r5, r4
- 800a826: d109 bne.n 800a83c <__libc_init_array+0x24>
- 800a828: 4e0b ldr r6, [pc, #44] ; (800a858 <__libc_init_array+0x40>)
- 800a82a: 4c0c ldr r4, [pc, #48] ; (800a85c <__libc_init_array+0x44>)
- 800a82c: f000 f960 bl 800aaf0 <_init>
- 800a830: 1ba4 subs r4, r4, r6
- 800a832: 10a4 asrs r4, r4, #2
- 800a834: 2500 movs r5, #0
- 800a836: 42a5 cmp r5, r4
- 800a838: d105 bne.n 800a846 <__libc_init_array+0x2e>
- 800a83a: bd70 pop {r4, r5, r6, pc}
- 800a83c: f856 3025 ldr.w r3, [r6, r5, lsl #2]
- 800a840: 4798 blx r3
- 800a842: 3501 adds r5, #1
- 800a844: e7ee b.n 800a824 <__libc_init_array+0xc>
- 800a846: f856 3025 ldr.w r3, [r6, r5, lsl #2]
- 800a84a: 4798 blx r3
- 800a84c: 3501 adds r5, #1
- 800a84e: e7f2 b.n 800a836 <__libc_init_array+0x1e>
- 800a850: 0800b730 .word 0x0800b730
- 800a854: 0800b730 .word 0x0800b730
- 800a858: 0800b730 .word 0x0800b730
- 800a85c: 0800b738 .word 0x0800b738
-
-0800a860 <memcpy>:
- 800a860: b510 push {r4, lr}
- 800a862: 1e43 subs r3, r0, #1
- 800a864: 440a add r2, r1
- 800a866: 4291 cmp r1, r2
- 800a868: d100 bne.n 800a86c <memcpy+0xc>
- 800a86a: bd10 pop {r4, pc}
- 800a86c: f811 4b01 ldrb.w r4, [r1], #1
- 800a870: f803 4f01 strb.w r4, [r3, #1]!
- 800a874: e7f7 b.n 800a866 <memcpy+0x6>
-
-0800a876 <memset>:
- 800a876: 4402 add r2, r0
- 800a878: 4603 mov r3, r0
- 800a87a: 4293 cmp r3, r2
- 800a87c: d100 bne.n 800a880 <memset+0xa>
- 800a87e: 4770 bx lr
- 800a880: f803 1b01 strb.w r1, [r3], #1
- 800a884: e7f9 b.n 800a87a <memset+0x4>
- ...
-
-0800a888 <realloc>:
- 800a888: 4b02 ldr r3, [pc, #8] ; (800a894 <realloc+0xc>)
- 800a88a: 460a mov r2, r1
- 800a88c: 4601 mov r1, r0
- 800a88e: 6818 ldr r0, [r3, #0]
- 800a890: f000 b8a0 b.w 800a9d4 <_realloc_r>
- 800a894: 20000020 .word 0x20000020
-
-0800a898 <_raise_r>:
- 800a898: 291f cmp r1, #31
- 800a89a: b538 push {r3, r4, r5, lr}
- 800a89c: 4604 mov r4, r0
- 800a89e: 460d mov r5, r1
- 800a8a0: d904 bls.n 800a8ac <_raise_r+0x14>
- 800a8a2: 2316 movs r3, #22
- 800a8a4: 6003 str r3, [r0, #0]
- 800a8a6: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
- 800a8aa: bd38 pop {r3, r4, r5, pc}
- 800a8ac: 6c42 ldr r2, [r0, #68] ; 0x44
- 800a8ae: b112 cbz r2, 800a8b6 <_raise_r+0x1e>
- 800a8b0: f852 3021 ldr.w r3, [r2, r1, lsl #2]
- 800a8b4: b94b cbnz r3, 800a8ca <_raise_r+0x32>
- 800a8b6: 4620 mov r0, r4
- 800a8b8: f000 f830 bl 800a91c <_getpid_r>
- 800a8bc: 462a mov r2, r5
- 800a8be: 4601 mov r1, r0
- 800a8c0: 4620 mov r0, r4
- 800a8c2: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr}
- 800a8c6: f000 b817 b.w 800a8f8 <_kill_r>
- 800a8ca: 2b01 cmp r3, #1
- 800a8cc: d00a beq.n 800a8e4 <_raise_r+0x4c>
- 800a8ce: 1c59 adds r1, r3, #1
- 800a8d0: d103 bne.n 800a8da <_raise_r+0x42>
- 800a8d2: 2316 movs r3, #22
- 800a8d4: 6003 str r3, [r0, #0]
- 800a8d6: 2001 movs r0, #1
- 800a8d8: e7e7 b.n 800a8aa <_raise_r+0x12>
- 800a8da: 2400 movs r4, #0
- 800a8dc: f842 4025 str.w r4, [r2, r5, lsl #2]
- 800a8e0: 4628 mov r0, r5
- 800a8e2: 4798 blx r3
- 800a8e4: 2000 movs r0, #0
- 800a8e6: e7e0 b.n 800a8aa <_raise_r+0x12>
-
-0800a8e8 <raise>:
- 800a8e8: 4b02 ldr r3, [pc, #8] ; (800a8f4 <raise+0xc>)
- 800a8ea: 4601 mov r1, r0
- 800a8ec: 6818 ldr r0, [r3, #0]
- 800a8ee: f7ff bfd3 b.w 800a898 <_raise_r>
- 800a8f2: bf00 nop
- 800a8f4: 20000020 .word 0x20000020
-
-0800a8f8 <_kill_r>:
- 800a8f8: b538 push {r3, r4, r5, lr}
- 800a8fa: 4c07 ldr r4, [pc, #28] ; (800a918 <_kill_r+0x20>)
- 800a8fc: 2300 movs r3, #0
- 800a8fe: 4605 mov r5, r0
- 800a900: 4608 mov r0, r1
- 800a902: 4611 mov r1, r2
- 800a904: 6023 str r3, [r4, #0]
- 800a906: f7fa fbb9 bl 800507c <_kill>
- 800a90a: 1c43 adds r3, r0, #1
- 800a90c: d102 bne.n 800a914 <_kill_r+0x1c>
- 800a90e: 6823 ldr r3, [r4, #0]
- 800a910: b103 cbz r3, 800a914 <_kill_r+0x1c>
- 800a912: 602b str r3, [r5, #0]
- 800a914: bd38 pop {r3, r4, r5, pc}
- 800a916: bf00 nop
- 800a918: 20001020 .word 0x20001020
-
-0800a91c <_getpid_r>:
- 800a91c: f7fa bba6 b.w 800506c <_getpid>
-
-0800a920 <_malloc_r>:
- 800a920: b570 push {r4, r5, r6, lr}
- 800a922: 1ccd adds r5, r1, #3
- 800a924: f025 0503 bic.w r5, r5, #3
- 800a928: 3508 adds r5, #8
- 800a92a: 2d0c cmp r5, #12
- 800a92c: bf38 it cc
- 800a92e: 250c movcc r5, #12
- 800a930: 2d00 cmp r5, #0
- 800a932: 4606 mov r6, r0
- 800a934: db01 blt.n 800a93a <_malloc_r+0x1a>
- 800a936: 42a9 cmp r1, r5
- 800a938: d903 bls.n 800a942 <_malloc_r+0x22>
- 800a93a: 230c movs r3, #12
- 800a93c: 6033 str r3, [r6, #0]
- 800a93e: 2000 movs r0, #0
- 800a940: bd70 pop {r4, r5, r6, pc}
- 800a942: f000 f87d bl 800aa40 <__malloc_lock>
- 800a946: 4a21 ldr r2, [pc, #132] ; (800a9cc <_malloc_r+0xac>)
- 800a948: 6814 ldr r4, [r2, #0]
- 800a94a: 4621 mov r1, r4
- 800a94c: b991 cbnz r1, 800a974 <_malloc_r+0x54>
- 800a94e: 4c20 ldr r4, [pc, #128] ; (800a9d0 <_malloc_r+0xb0>)
- 800a950: 6823 ldr r3, [r4, #0]
- 800a952: b91b cbnz r3, 800a95c <_malloc_r+0x3c>
- 800a954: 4630 mov r0, r6
- 800a956: f000 f863 bl 800aa20 <_sbrk_r>
- 800a95a: 6020 str r0, [r4, #0]
- 800a95c: 4629 mov r1, r5
- 800a95e: 4630 mov r0, r6
- 800a960: f000 f85e bl 800aa20 <_sbrk_r>
- 800a964: 1c43 adds r3, r0, #1
- 800a966: d124 bne.n 800a9b2 <_malloc_r+0x92>
- 800a968: 230c movs r3, #12
- 800a96a: 6033 str r3, [r6, #0]
- 800a96c: 4630 mov r0, r6
- 800a96e: f000 f868 bl 800aa42 <__malloc_unlock>
- 800a972: e7e4 b.n 800a93e <_malloc_r+0x1e>
- 800a974: 680b ldr r3, [r1, #0]
- 800a976: 1b5b subs r3, r3, r5
- 800a978: d418 bmi.n 800a9ac <_malloc_r+0x8c>
- 800a97a: 2b0b cmp r3, #11
- 800a97c: d90f bls.n 800a99e <_malloc_r+0x7e>
- 800a97e: 600b str r3, [r1, #0]
- 800a980: 50cd str r5, [r1, r3]
- 800a982: 18cc adds r4, r1, r3
- 800a984: 4630 mov r0, r6
- 800a986: f000 f85c bl 800aa42 <__malloc_unlock>
- 800a98a: f104 000b add.w r0, r4, #11
- 800a98e: 1d23 adds r3, r4, #4
- 800a990: f020 0007 bic.w r0, r0, #7
- 800a994: 1ac3 subs r3, r0, r3
- 800a996: d0d3 beq.n 800a940 <_malloc_r+0x20>
- 800a998: 425a negs r2, r3
- 800a99a: 50e2 str r2, [r4, r3]
- 800a99c: e7d0 b.n 800a940 <_malloc_r+0x20>
- 800a99e: 428c cmp r4, r1
- 800a9a0: 684b ldr r3, [r1, #4]
- 800a9a2: bf16 itet ne
- 800a9a4: 6063 strne r3, [r4, #4]
- 800a9a6: 6013 streq r3, [r2, #0]
- 800a9a8: 460c movne r4, r1
- 800a9aa: e7eb b.n 800a984 <_malloc_r+0x64>
- 800a9ac: 460c mov r4, r1
- 800a9ae: 6849 ldr r1, [r1, #4]
- 800a9b0: e7cc b.n 800a94c <_malloc_r+0x2c>
- 800a9b2: 1cc4 adds r4, r0, #3
- 800a9b4: f024 0403 bic.w r4, r4, #3
- 800a9b8: 42a0 cmp r0, r4
- 800a9ba: d005 beq.n 800a9c8 <_malloc_r+0xa8>
- 800a9bc: 1a21 subs r1, r4, r0
- 800a9be: 4630 mov r0, r6
- 800a9c0: f000 f82e bl 800aa20 <_sbrk_r>
- 800a9c4: 3001 adds r0, #1
- 800a9c6: d0cf beq.n 800a968 <_malloc_r+0x48>
- 800a9c8: 6025 str r5, [r4, #0]
- 800a9ca: e7db b.n 800a984 <_malloc_r+0x64>
- 800a9cc: 20001014 .word 0x20001014
- 800a9d0: 20001018 .word 0x20001018
-
-0800a9d4 <_realloc_r>:
- 800a9d4: b5f8 push {r3, r4, r5, r6, r7, lr}
- 800a9d6: 4607 mov r7, r0
- 800a9d8: 4614 mov r4, r2
- 800a9da: 460e mov r6, r1
- 800a9dc: b921 cbnz r1, 800a9e8 <_realloc_r+0x14>
- 800a9de: 4611 mov r1, r2
- 800a9e0: e8bd 40f8 ldmia.w sp!, {r3, r4, r5, r6, r7, lr}
- 800a9e4: f7ff bf9c b.w 800a920 <_malloc_r>
- 800a9e8: b922 cbnz r2, 800a9f4 <_realloc_r+0x20>
- 800a9ea: f000 f82b bl 800aa44 <_free_r>
- 800a9ee: 4625 mov r5, r4
- 800a9f0: 4628 mov r0, r5
- 800a9f2: bdf8 pop {r3, r4, r5, r6, r7, pc}
- 800a9f4: f000 f874 bl 800aae0 <_malloc_usable_size_r>
- 800a9f8: 42a0 cmp r0, r4
- 800a9fa: d20f bcs.n 800aa1c <_realloc_r+0x48>
- 800a9fc: 4621 mov r1, r4
- 800a9fe: 4638 mov r0, r7
- 800aa00: f7ff ff8e bl 800a920 <_malloc_r>
- 800aa04: 4605 mov r5, r0
- 800aa06: 2800 cmp r0, #0
- 800aa08: d0f2 beq.n 800a9f0 <_realloc_r+0x1c>
- 800aa0a: 4631 mov r1, r6
- 800aa0c: 4622 mov r2, r4
- 800aa0e: f7ff ff27 bl 800a860 <memcpy>
- 800aa12: 4631 mov r1, r6
- 800aa14: 4638 mov r0, r7
- 800aa16: f000 f815 bl 800aa44 <_free_r>
- 800aa1a: e7e9 b.n 800a9f0 <_realloc_r+0x1c>
- 800aa1c: 4635 mov r5, r6
- 800aa1e: e7e7 b.n 800a9f0 <_realloc_r+0x1c>
-
-0800aa20 <_sbrk_r>:
- 800aa20: b538 push {r3, r4, r5, lr}
- 800aa22: 4c06 ldr r4, [pc, #24] ; (800aa3c <_sbrk_r+0x1c>)
- 800aa24: 2300 movs r3, #0
- 800aa26: 4605 mov r5, r0
- 800aa28: 4608 mov r0, r1
- 800aa2a: 6023 str r3, [r4, #0]
- 800aa2c: f7fa fb40 bl 80050b0 <_sbrk>
- 800aa30: 1c43 adds r3, r0, #1
- 800aa32: d102 bne.n 800aa3a <_sbrk_r+0x1a>
- 800aa34: 6823 ldr r3, [r4, #0]
- 800aa36: b103 cbz r3, 800aa3a <_sbrk_r+0x1a>
- 800aa38: 602b str r3, [r5, #0]
- 800aa3a: bd38 pop {r3, r4, r5, pc}
- 800aa3c: 20001020 .word 0x20001020
-
-0800aa40 <__malloc_lock>:
- 800aa40: 4770 bx lr
-
-0800aa42 <__malloc_unlock>:
- 800aa42: 4770 bx lr
-
-0800aa44 <_free_r>:
- 800aa44: b538 push {r3, r4, r5, lr}
- 800aa46: 4605 mov r5, r0
- 800aa48: 2900 cmp r1, #0
- 800aa4a: d045 beq.n 800aad8 <_free_r+0x94>
- 800aa4c: f851 3c04 ldr.w r3, [r1, #-4]
- 800aa50: 1f0c subs r4, r1, #4
- 800aa52: 2b00 cmp r3, #0
- 800aa54: bfb8 it lt
- 800aa56: 18e4 addlt r4, r4, r3
- 800aa58: f7ff fff2 bl 800aa40 <__malloc_lock>
- 800aa5c: 4a1f ldr r2, [pc, #124] ; (800aadc <_free_r+0x98>)
- 800aa5e: 6813 ldr r3, [r2, #0]
- 800aa60: 4610 mov r0, r2
- 800aa62: b933 cbnz r3, 800aa72 <_free_r+0x2e>
- 800aa64: 6063 str r3, [r4, #4]
- 800aa66: 6014 str r4, [r2, #0]
- 800aa68: 4628 mov r0, r5
- 800aa6a: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr}
- 800aa6e: f7ff bfe8 b.w 800aa42 <__malloc_unlock>
- 800aa72: 42a3 cmp r3, r4
- 800aa74: d90c bls.n 800aa90 <_free_r+0x4c>
- 800aa76: 6821 ldr r1, [r4, #0]
- 800aa78: 1862 adds r2, r4, r1
- 800aa7a: 4293 cmp r3, r2
- 800aa7c: bf04 itt eq
- 800aa7e: 681a ldreq r2, [r3, #0]
- 800aa80: 685b ldreq r3, [r3, #4]
- 800aa82: 6063 str r3, [r4, #4]
- 800aa84: bf04 itt eq
- 800aa86: 1852 addeq r2, r2, r1
- 800aa88: 6022 streq r2, [r4, #0]
- 800aa8a: 6004 str r4, [r0, #0]
- 800aa8c: e7ec b.n 800aa68 <_free_r+0x24>
- 800aa8e: 4613 mov r3, r2
- 800aa90: 685a ldr r2, [r3, #4]
- 800aa92: b10a cbz r2, 800aa98 <_free_r+0x54>
- 800aa94: 42a2 cmp r2, r4
- 800aa96: d9fa bls.n 800aa8e <_free_r+0x4a>
- 800aa98: 6819 ldr r1, [r3, #0]
- 800aa9a: 1858 adds r0, r3, r1
- 800aa9c: 42a0 cmp r0, r4
- 800aa9e: d10b bne.n 800aab8 <_free_r+0x74>
- 800aaa0: 6820 ldr r0, [r4, #0]
- 800aaa2: 4401 add r1, r0
- 800aaa4: 1858 adds r0, r3, r1
- 800aaa6: 4282 cmp r2, r0
- 800aaa8: 6019 str r1, [r3, #0]
- 800aaaa: d1dd bne.n 800aa68 <_free_r+0x24>
- 800aaac: 6810 ldr r0, [r2, #0]
- 800aaae: 6852 ldr r2, [r2, #4]
- 800aab0: 605a str r2, [r3, #4]
- 800aab2: 4401 add r1, r0
- 800aab4: 6019 str r1, [r3, #0]
- 800aab6: e7d7 b.n 800aa68 <_free_r+0x24>
- 800aab8: d902 bls.n 800aac0 <_free_r+0x7c>
- 800aaba: 230c movs r3, #12
- 800aabc: 602b str r3, [r5, #0]
- 800aabe: e7d3 b.n 800aa68 <_free_r+0x24>
- 800aac0: 6820 ldr r0, [r4, #0]
- 800aac2: 1821 adds r1, r4, r0
- 800aac4: 428a cmp r2, r1
- 800aac6: bf04 itt eq
- 800aac8: 6811 ldreq r1, [r2, #0]
- 800aaca: 6852 ldreq r2, [r2, #4]
- 800aacc: 6062 str r2, [r4, #4]
- 800aace: bf04 itt eq
- 800aad0: 1809 addeq r1, r1, r0
- 800aad2: 6021 streq r1, [r4, #0]
- 800aad4: 605c str r4, [r3, #4]
- 800aad6: e7c7 b.n 800aa68 <_free_r+0x24>
- 800aad8: bd38 pop {r3, r4, r5, pc}
- 800aada: bf00 nop
- 800aadc: 20001014 .word 0x20001014
-
-0800aae0 <_malloc_usable_size_r>:
- 800aae0: f851 3c04 ldr.w r3, [r1, #-4]
- 800aae4: 1f18 subs r0, r3, #4
- 800aae6: 2b00 cmp r3, #0
- 800aae8: bfbc itt lt
- 800aaea: 580b ldrlt r3, [r1, r0]
- 800aaec: 18c0 addlt r0, r0, r3
- 800aaee: 4770 bx lr
-
-0800aaf0 <_init>:
- 800aaf0: b5f8 push {r3, r4, r5, r6, r7, lr}
- 800aaf2: bf00 nop
- 800aaf4: bcf8 pop {r3, r4, r5, r6, r7}
- 800aaf6: bc08 pop {r3}
- 800aaf8: 469e mov lr, r3
- 800aafa: 4770 bx lr
-
-0800aafc <_fini>:
- 800aafc: b5f8 push {r3, r4, r5, r6, r7, lr}
- 800aafe: bf00 nop
- 800ab00: bcf8 pop {r3, r4, r5, r6, r7}
- 800ab02: bc08 pop {r3}
- 800ab04: 469e mov lr, r3
- 800ab06: 4770 bx lr
Idx Name Size VMA LMA File off Algn
0 .isr_vector 000001f8 08000000 08000000 00010000 2**0
CONTENTS, ALLOC, LOAD, READONLY, DATA
- 1 .text 00002854 080001f8 080001f8 000101f8 2**2
+ 1 .text 000036f4 080001f8 080001f8 000101f8 2**2
CONTENTS, ALLOC, LOAD, READONLY, CODE
- 2 .rodata 00000028 08002a4c 08002a4c 00012a4c 2**2
+ 2 .rodata 00000018 080038ec 080038ec 000138ec 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
- 3 .ARM.extab 00000000 08002a74 08002a74 0002000c 2**0
+ 3 .ARM.extab 00000000 08003904 08003904 0002000c 2**0
CONTENTS
- 4 .ARM 00000008 08002a74 08002a74 00012a74 2**2
+ 4 .ARM 00000008 08003904 08003904 00013904 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
- 5 .preinit_array 00000000 08002a7c 08002a7c 0002000c 2**0
+ 5 .preinit_array 00000000 0800390c 0800390c 0002000c 2**0
CONTENTS, ALLOC, LOAD, DATA
- 6 .init_array 00000004 08002a7c 08002a7c 00012a7c 2**2
+ 6 .init_array 00000004 0800390c 0800390c 0001390c 2**2
CONTENTS, ALLOC, LOAD, DATA
- 7 .fini_array 00000004 08002a80 08002a80 00012a80 2**2
+ 7 .fini_array 00000004 08003910 08003910 00013910 2**2
CONTENTS, ALLOC, LOAD, DATA
- 8 .data 0000000c 20000000 08002a84 00020000 2**2
+ 8 .data 0000000c 20000000 08003914 00020000 2**2
CONTENTS, ALLOC, LOAD, DATA
- 9 .bss 000000a0 2000000c 08002a90 0002000c 2**2
+ 9 .bss 00000100 2000000c 08003920 0002000c 2**2
ALLOC
- 10 ._user_heap_stack 00000604 200000ac 08002a90 000200ac 2**0
+ 10 ._user_heap_stack 00000604 2000010c 08003920 0002010c 2**0
ALLOC
11 .ARM.attributes 0000002e 00000000 00000000 0002000c 2**0
CONTENTS, READONLY
- 12 .debug_info 00006bb7 00000000 00000000 0002003a 2**0
+ 12 .debug_info 0000bfe0 00000000 00000000 0002003a 2**0
CONTENTS, READONLY, DEBUGGING
- 13 .debug_abbrev 0000122e 00000000 00000000 00026bf1 2**0
+ 13 .debug_abbrev 000019c5 00000000 00000000 0002c01a 2**0
CONTENTS, READONLY, DEBUGGING
- 14 .debug_aranges 00000670 00000000 00000000 00027e20 2**3
+ 14 .debug_aranges 00000c60 00000000 00000000 0002d9e0 2**3
CONTENTS, READONLY, DEBUGGING
- 15 .debug_ranges 000005c8 00000000 00000000 00028490 2**3
+ 15 .debug_ranges 00000b88 00000000 00000000 0002e640 2**3
CONTENTS, READONLY, DEBUGGING
- 16 .debug_macro 00024e43 00000000 00000000 00028a58 2**0
+ 16 .debug_macro 00025f5e 00000000 00000000 0002f1c8 2**0
CONTENTS, READONLY, DEBUGGING
- 17 .debug_line 00005b3e 00000000 00000000 0004d89b 2**0
+ 17 .debug_line 00008ef9 00000000 00000000 00055126 2**0
CONTENTS, READONLY, DEBUGGING
- 18 .debug_str 000e7b3b 00000000 00000000 000533d9 2**0
+ 18 .debug_str 000f0c7a 00000000 00000000 0005e01f 2**0
CONTENTS, READONLY, DEBUGGING
- 19 .comment 0000007b 00000000 00000000 0013af14 2**0
+ 19 .comment 0000007b 00000000 00000000 0014ec99 2**0
CONTENTS, READONLY
- 20 .debug_frame 00001924 00000000 00000000 0013af90 2**2
+ 20 .debug_frame 00003400 00000000 00000000 0014ed14 2**2
CONTENTS, READONLY, DEBUGGING
Disassembly of section .text:
800020e: bd10 pop {r4, pc}
8000210: 2000000c .word 0x2000000c
8000214: 00000000 .word 0x00000000
- 8000218: 08002a34 .word 0x08002a34
+ 8000218: 080038d4 .word 0x080038d4
0800021c <frame_dummy>:
800021c: b508 push {r3, lr}
800022a: bd08 pop {r3, pc}
800022c: 00000000 .word 0x00000000
8000230: 20000010 .word 0x20000010
- 8000234: 08002a34 .word 0x08002a34
+ 8000234: 080038d4 .word 0x080038d4
08000238 <__aeabi_uldivmod>:
8000238: b953 cbnz r3, 8000250 <__aeabi_uldivmod+0x18>
*/
int main(void)
{
- 8000538: b590 push {r4, r7, lr}
- 800053a: b08d sub sp, #52 ; 0x34
- 800053c: af00 add r7, sp, #0
+ 8000538: b580 push {r7, lr}
+ 800053a: af00 add r7, sp, #0
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
- 800053e: f000 fa3a bl 80009b6 <HAL_Init>
+ 800053c: f000 fac3 bl 8000ac6 <HAL_Init>
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config();
- 8000542: f000 f84b bl 80005dc <SystemClock_Config>
+ 8000540: f000 f82c bl 800059c <SystemClock_Config>
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
- 8000546: f000 f8f7 bl 8000738 <MX_GPIO_Init>
+ 8000544: f000 f924 bl 8000790 <MX_GPIO_Init>
MX_USART6_UART_Init();
- 800054a: f000 f8c1 bl 80006d0 <MX_USART6_UART_Init>
+ 8000548: f000 f8f0 bl 800072c <MX_USART6_UART_Init>
+ MX_TIM3_Init();
+ 800054c: f000 f8a0 bl 8000690 <MX_TIM3_Init>
/* USER CODE BEGIN 2 */
- char hello[] = "Hello world! \n";
- 800054e: 4b1e ldr r3, [pc, #120] ; (80005c8 <main+0x90>)
- 8000550: f107 041c add.w r4, r7, #28
- 8000554: cb0f ldmia r3, {r0, r1, r2, r3}
- 8000556: c407 stmia r4!, {r0, r1, r2}
- 8000558: 8023 strh r3, [r4, #0]
- 800055a: 3402 adds r4, #2
- 800055c: 0c1b lsrs r3, r3, #16
- 800055e: 7023 strb r3, [r4, #0]
- float delta_time;
- } odometry_msg;
-
- float odometry_values[3];
-
- odometry_values[0] = 0.5;
- 8000560: f04f 537c mov.w r3, #1056964608 ; 0x3f000000
- 8000564: 613b str r3, [r7, #16]
- odometry_values[1] = 1.5;
- 8000566: f04f 537f mov.w r3, #1069547520 ; 0x3fc00000
- 800056a: 617b str r3, [r7, #20]
- odometry_values[2] = 9.5;
- 800056c: 4b17 ldr r3, [pc, #92] ; (80005cc <main+0x94>)
- 800056e: 61bb str r3, [r7, #24]
-
- odometry_msg out_msg;
- out_msg.angular_velocity = 0.2;
- 8000570: 4b17 ldr r3, [pc, #92] ; (80005d0 <main+0x98>)
- 8000572: 607b str r3, [r7, #4]
- out_msg.linear_velocity = 1.5;
- 8000574: f04f 537f mov.w r3, #1069547520 ; 0x3fc00000
- 8000578: 60bb str r3, [r7, #8]
- out_msg.delta_time = 2.6;
- 800057a: 4b16 ldr r3, [pc, #88] ; (80005d4 <main+0x9c>)
- 800057c: 60fb str r3, [r7, #12]
- uint8_t *buffer = &out_msg;
- 800057e: 1d3b adds r3, r7, #4
- 8000580: 62fb str r3, [r7, #44] ; 0x2c
+
+ odom_msg.angular_velocity = 0.2;
+ 8000550: 4b0b ldr r3, [pc, #44] ; (8000580 <main+0x48>)
+ 8000552: 4a0c ldr r2, [pc, #48] ; (8000584 <main+0x4c>)
+ 8000554: 601a str r2, [r3, #0]
+ odom_msg.linear_velocity = 1.5;
+ 8000556: 4b0a ldr r3, [pc, #40] ; (8000580 <main+0x48>)
+ 8000558: f04f 527f mov.w r2, #1069547520 ; 0x3fc00000
+ 800055c: 605a str r2, [r3, #4]
+ odom_msg.delta_time = 2.6;
+ 800055e: 4b08 ldr r3, [pc, #32] ; (8000580 <main+0x48>)
+ 8000560: 4a09 ldr r2, [pc, #36] ; (8000588 <main+0x50>)
+ 8000562: 609a str r2, [r3, #8]
+
+ out_buffer = (uint8_t *) &odom_msg;
+ 8000564: 4b09 ldr r3, [pc, #36] ; (800058c <main+0x54>)
+ 8000566: 4a06 ldr r2, [pc, #24] ; (8000580 <main+0x48>)
+ 8000568: 601a str r2, [r3, #0]
+ in_buffer = (uint8_t*) &vel_msg;
+ 800056a: 4b09 ldr r3, [pc, #36] ; (8000590 <main+0x58>)
+ 800056c: 4a09 ldr r2, [pc, #36] ; (8000594 <main+0x5c>)
+ 800056e: 601a str r2, [r3, #0]
+
+
+// HAL_TIM_Base_Start_IT(&htim3);
+ HAL_UART_Receive_IT(&huart6, in_buffer, 8);
+ 8000570: 4b07 ldr r3, [pc, #28] ; (8000590 <main+0x58>)
+ 8000572: 681b ldr r3, [r3, #0]
+ 8000574: 2208 movs r2, #8
+ 8000576: 4619 mov r1, r3
+ 8000578: 4807 ldr r0, [pc, #28] ; (8000598 <main+0x60>)
+ 800057a: f002 fb05 bl 8002b88 <HAL_UART_Receive_IT>
+
/* USER CODE END 2 */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
while (1) {
- HAL_UART_Transmit(&huart6, buffer, 12, 100);
- 8000582: 2364 movs r3, #100 ; 0x64
- 8000584: 220c movs r2, #12
- 8000586: 6af9 ldr r1, [r7, #44] ; 0x2c
- 8000588: 4813 ldr r0, [pc, #76] ; (80005d8 <main+0xa0>)
- 800058a: f001 fdd7 bl 800213c <HAL_UART_Transmit>
- out_msg.angular_velocity++;
- 800058e: edd7 7a01 vldr s15, [r7, #4]
- 8000592: eeb7 7a00 vmov.f32 s14, #112 ; 0x3f800000 1.0
- 8000596: ee77 7a87 vadd.f32 s15, s15, s14
- 800059a: edc7 7a01 vstr s15, [r7, #4]
- out_msg.linear_velocity++;
- 800059e: edd7 7a02 vldr s15, [r7, #8]
- 80005a2: eeb7 7a00 vmov.f32 s14, #112 ; 0x3f800000 1.0
- 80005a6: ee77 7a87 vadd.f32 s15, s15, s14
- 80005aa: edc7 7a02 vstr s15, [r7, #8]
- out_msg.delta_time++;
- 80005ae: edd7 7a03 vldr s15, [r7, #12]
- 80005b2: eeb7 7a00 vmov.f32 s14, #112 ; 0x3f800000 1.0
- 80005b6: ee77 7a87 vadd.f32 s15, s15, s14
- 80005ba: edc7 7a03 vstr s15, [r7, #12]
-
- //HAL_UART_Transmit(&huart6, (uint8_t)* hello, 15, 100);
-
- HAL_Delay(100);
- 80005be: 2064 movs r0, #100 ; 0x64
- 80005c0: f000 fa56 bl 8000a70 <HAL_Delay>
- HAL_UART_Transmit(&huart6, buffer, 12, 100);
- 80005c4: e7dd b.n 8000582 <main+0x4a>
- 80005c6: bf00 nop
- 80005c8: 08002a4c .word 0x08002a4c
- 80005cc: 41180000 .word 0x41180000
- 80005d0: 3e4ccccd .word 0x3e4ccccd
- 80005d4: 40266666 .word 0x40266666
- 80005d8: 20000028 .word 0x20000028
-
-080005dc <SystemClock_Config>:
+ 800057e: e7fe b.n 800057e <main+0x46>
+ 8000580: 20000034 .word 0x20000034
+ 8000584: 3e4ccccd .word 0x3e4ccccd
+ 8000588: 40266666 .word 0x40266666
+ 800058c: 20000040 .word 0x20000040
+ 8000590: 20000044 .word 0x20000044
+ 8000594: 2000002c .word 0x2000002c
+ 8000598: 20000088 .word 0x20000088
+
+0800059c <SystemClock_Config>:
/**
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void)
{
- 80005dc: b580 push {r7, lr}
- 80005de: b0b8 sub sp, #224 ; 0xe0
- 80005e0: af00 add r7, sp, #0
+ 800059c: b580 push {r7, lr}
+ 800059e: b0b8 sub sp, #224 ; 0xe0
+ 80005a0: af00 add r7, sp, #0
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
- 80005e2: f107 03ac add.w r3, r7, #172 ; 0xac
- 80005e6: 2234 movs r2, #52 ; 0x34
- 80005e8: 2100 movs r1, #0
- 80005ea: 4618 mov r0, r3
- 80005ec: f002 fa1a bl 8002a24 <memset>
+ 80005a2: f107 03ac add.w r3, r7, #172 ; 0xac
+ 80005a6: 2234 movs r2, #52 ; 0x34
+ 80005a8: 2100 movs r1, #0
+ 80005aa: 4618 mov r0, r3
+ 80005ac: f003 f98a bl 80038c4 <memset>
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
- 80005f0: f107 0398 add.w r3, r7, #152 ; 0x98
- 80005f4: 2200 movs r2, #0
- 80005f6: 601a str r2, [r3, #0]
- 80005f8: 605a str r2, [r3, #4]
- 80005fa: 609a str r2, [r3, #8]
- 80005fc: 60da str r2, [r3, #12]
- 80005fe: 611a str r2, [r3, #16]
+ 80005b0: f107 0398 add.w r3, r7, #152 ; 0x98
+ 80005b4: 2200 movs r2, #0
+ 80005b6: 601a str r2, [r3, #0]
+ 80005b8: 605a str r2, [r3, #4]
+ 80005ba: 609a str r2, [r3, #8]
+ 80005bc: 60da str r2, [r3, #12]
+ 80005be: 611a str r2, [r3, #16]
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
- 8000600: f107 0308 add.w r3, r7, #8
- 8000604: 2290 movs r2, #144 ; 0x90
- 8000606: 2100 movs r1, #0
- 8000608: 4618 mov r0, r3
- 800060a: f002 fa0b bl 8002a24 <memset>
+ 80005c0: f107 0308 add.w r3, r7, #8
+ 80005c4: 2290 movs r2, #144 ; 0x90
+ 80005c6: 2100 movs r1, #0
+ 80005c8: 4618 mov r0, r3
+ 80005ca: f003 f97b bl 80038c4 <memset>
/** Configure the main internal regulator output voltage
*/
__HAL_RCC_PWR_CLK_ENABLE();
- 800060e: 4b2e ldr r3, [pc, #184] ; (80006c8 <SystemClock_Config+0xec>)
- 8000610: 6c1b ldr r3, [r3, #64] ; 0x40
- 8000612: 4a2d ldr r2, [pc, #180] ; (80006c8 <SystemClock_Config+0xec>)
- 8000614: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
- 8000618: 6413 str r3, [r2, #64] ; 0x40
- 800061a: 4b2b ldr r3, [pc, #172] ; (80006c8 <SystemClock_Config+0xec>)
- 800061c: 6c1b ldr r3, [r3, #64] ; 0x40
- 800061e: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
- 8000622: 607b str r3, [r7, #4]
- 8000624: 687b ldr r3, [r7, #4]
+ 80005ce: 4b2e ldr r3, [pc, #184] ; (8000688 <SystemClock_Config+0xec>)
+ 80005d0: 6c1b ldr r3, [r3, #64] ; 0x40
+ 80005d2: 4a2d ldr r2, [pc, #180] ; (8000688 <SystemClock_Config+0xec>)
+ 80005d4: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
+ 80005d8: 6413 str r3, [r2, #64] ; 0x40
+ 80005da: 4b2b ldr r3, [pc, #172] ; (8000688 <SystemClock_Config+0xec>)
+ 80005dc: 6c1b ldr r3, [r3, #64] ; 0x40
+ 80005de: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
+ 80005e2: 607b str r3, [r7, #4]
+ 80005e4: 687b ldr r3, [r7, #4]
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE3);
- 8000626: 4b29 ldr r3, [pc, #164] ; (80006cc <SystemClock_Config+0xf0>)
- 8000628: 681b ldr r3, [r3, #0]
- 800062a: f423 4340 bic.w r3, r3, #49152 ; 0xc000
- 800062e: 4a27 ldr r2, [pc, #156] ; (80006cc <SystemClock_Config+0xf0>)
- 8000630: f443 4380 orr.w r3, r3, #16384 ; 0x4000
- 8000634: 6013 str r3, [r2, #0]
- 8000636: 4b25 ldr r3, [pc, #148] ; (80006cc <SystemClock_Config+0xf0>)
- 8000638: 681b ldr r3, [r3, #0]
- 800063a: f403 4340 and.w r3, r3, #49152 ; 0xc000
- 800063e: 603b str r3, [r7, #0]
- 8000640: 683b ldr r3, [r7, #0]
+ 80005e6: 4b29 ldr r3, [pc, #164] ; (800068c <SystemClock_Config+0xf0>)
+ 80005e8: 681b ldr r3, [r3, #0]
+ 80005ea: f423 4340 bic.w r3, r3, #49152 ; 0xc000
+ 80005ee: 4a27 ldr r2, [pc, #156] ; (800068c <SystemClock_Config+0xf0>)
+ 80005f0: f443 4380 orr.w r3, r3, #16384 ; 0x4000
+ 80005f4: 6013 str r3, [r2, #0]
+ 80005f6: 4b25 ldr r3, [pc, #148] ; (800068c <SystemClock_Config+0xf0>)
+ 80005f8: 681b ldr r3, [r3, #0]
+ 80005fa: f403 4340 and.w r3, r3, #49152 ; 0xc000
+ 80005fe: 603b str r3, [r7, #0]
+ 8000600: 683b ldr r3, [r7, #0]
/** Initializes the CPU, AHB and APB busses clocks
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
- 8000642: 2302 movs r3, #2
- 8000644: f8c7 30ac str.w r3, [r7, #172] ; 0xac
+ 8000602: 2302 movs r3, #2
+ 8000604: f8c7 30ac str.w r3, [r7, #172] ; 0xac
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
- 8000648: 2301 movs r3, #1
- 800064a: f8c7 30b8 str.w r3, [r7, #184] ; 0xb8
+ 8000608: 2301 movs r3, #1
+ 800060a: f8c7 30b8 str.w r3, [r7, #184] ; 0xb8
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
- 800064e: 2310 movs r3, #16
- 8000650: f8c7 30bc str.w r3, [r7, #188] ; 0xbc
+ 800060e: 2310 movs r3, #16
+ 8000610: f8c7 30bc str.w r3, [r7, #188] ; 0xbc
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
- 8000654: 2300 movs r3, #0
- 8000656: f8c7 30c4 str.w r3, [r7, #196] ; 0xc4
+ 8000614: 2300 movs r3, #0
+ 8000616: f8c7 30c4 str.w r3, [r7, #196] ; 0xc4
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
- 800065a: f107 03ac add.w r3, r7, #172 ; 0xac
- 800065e: 4618 mov r0, r3
- 8000660: f000 fcb8 bl 8000fd4 <HAL_RCC_OscConfig>
- 8000664: 4603 mov r3, r0
- 8000666: 2b00 cmp r3, #0
- 8000668: d001 beq.n 800066e <SystemClock_Config+0x92>
+ 800061a: f107 03ac add.w r3, r7, #172 ; 0xac
+ 800061e: 4618 mov r0, r3
+ 8000620: f000 fd8c bl 800113c <HAL_RCC_OscConfig>
+ 8000624: 4603 mov r3, r0
+ 8000626: 2b00 cmp r3, #0
+ 8000628: d001 beq.n 800062e <SystemClock_Config+0x92>
{
Error_Handler();
- 800066a: f000 f889 bl 8000780 <Error_Handler>
+ 800062a: f000 f90d bl 8000848 <Error_Handler>
}
/** Initializes the CPU, AHB and APB busses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
- 800066e: 230f movs r3, #15
- 8000670: f8c7 3098 str.w r3, [r7, #152] ; 0x98
+ 800062e: 230f movs r3, #15
+ 8000630: f8c7 3098 str.w r3, [r7, #152] ; 0x98
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI;
- 8000674: 2300 movs r3, #0
- 8000676: f8c7 309c str.w r3, [r7, #156] ; 0x9c
+ 8000634: 2300 movs r3, #0
+ 8000636: f8c7 309c str.w r3, [r7, #156] ; 0x9c
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
- 800067a: 2300 movs r3, #0
- 800067c: f8c7 30a0 str.w r3, [r7, #160] ; 0xa0
+ 800063a: 2300 movs r3, #0
+ 800063c: f8c7 30a0 str.w r3, [r7, #160] ; 0xa0
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
- 8000680: 2300 movs r3, #0
- 8000682: f8c7 30a4 str.w r3, [r7, #164] ; 0xa4
+ 8000640: 2300 movs r3, #0
+ 8000642: f8c7 30a4 str.w r3, [r7, #164] ; 0xa4
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
- 8000686: 2300 movs r3, #0
- 8000688: f8c7 30a8 str.w r3, [r7, #168] ; 0xa8
+ 8000646: 2300 movs r3, #0
+ 8000648: f8c7 30a8 str.w r3, [r7, #168] ; 0xa8
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
- 800068c: f107 0398 add.w r3, r7, #152 ; 0x98
- 8000690: 2100 movs r1, #0
- 8000692: 4618 mov r0, r3
- 8000694: f000 ff10 bl 80014b8 <HAL_RCC_ClockConfig>
- 8000698: 4603 mov r3, r0
- 800069a: 2b00 cmp r3, #0
- 800069c: d001 beq.n 80006a2 <SystemClock_Config+0xc6>
+ 800064c: f107 0398 add.w r3, r7, #152 ; 0x98
+ 8000650: 2100 movs r1, #0
+ 8000652: 4618 mov r0, r3
+ 8000654: f000 ffe4 bl 8001620 <HAL_RCC_ClockConfig>
+ 8000658: 4603 mov r3, r0
+ 800065a: 2b00 cmp r3, #0
+ 800065c: d001 beq.n 8000662 <SystemClock_Config+0xc6>
{
Error_Handler();
- 800069e: f000 f86f bl 8000780 <Error_Handler>
+ 800065e: f000 f8f3 bl 8000848 <Error_Handler>
}
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART6;
- 80006a2: f44f 6300 mov.w r3, #2048 ; 0x800
- 80006a6: 60bb str r3, [r7, #8]
+ 8000662: f44f 6300 mov.w r3, #2048 ; 0x800
+ 8000666: 60bb str r3, [r7, #8]
PeriphClkInitStruct.Usart6ClockSelection = RCC_USART6CLKSOURCE_PCLK2;
- 80006a8: 2300 movs r3, #0
- 80006aa: 663b str r3, [r7, #96] ; 0x60
+ 8000668: 2300 movs r3, #0
+ 800066a: 663b str r3, [r7, #96] ; 0x60
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
- 80006ac: f107 0308 add.w r3, r7, #8
- 80006b0: 4618 mov r0, r3
- 80006b2: f001 f8cf bl 8001854 <HAL_RCCEx_PeriphCLKConfig>
- 80006b6: 4603 mov r3, r0
- 80006b8: 2b00 cmp r3, #0
- 80006ba: d001 beq.n 80006c0 <SystemClock_Config+0xe4>
+ 800066c: f107 0308 add.w r3, r7, #8
+ 8000670: 4618 mov r0, r3
+ 8000672: f001 f9a3 bl 80019bc <HAL_RCCEx_PeriphCLKConfig>
+ 8000676: 4603 mov r3, r0
+ 8000678: 2b00 cmp r3, #0
+ 800067a: d001 beq.n 8000680 <SystemClock_Config+0xe4>
+ {
+ Error_Handler();
+ 800067c: f000 f8e4 bl 8000848 <Error_Handler>
+ }
+}
+ 8000680: bf00 nop
+ 8000682: 37e0 adds r7, #224 ; 0xe0
+ 8000684: 46bd mov sp, r7
+ 8000686: bd80 pop {r7, pc}
+ 8000688: 40023800 .word 0x40023800
+ 800068c: 40007000 .word 0x40007000
+
+08000690 <MX_TIM3_Init>:
+ * @brief TIM3 Initialization Function
+ * @param None
+ * @retval None
+ */
+static void MX_TIM3_Init(void)
+{
+ 8000690: b580 push {r7, lr}
+ 8000692: b088 sub sp, #32
+ 8000694: af00 add r7, sp, #0
+
+ /* USER CODE BEGIN TIM3_Init 0 */
+
+ /* USER CODE END TIM3_Init 0 */
+
+ TIM_ClockConfigTypeDef sClockSourceConfig = {0};
+ 8000696: f107 0310 add.w r3, r7, #16
+ 800069a: 2200 movs r2, #0
+ 800069c: 601a str r2, [r3, #0]
+ 800069e: 605a str r2, [r3, #4]
+ 80006a0: 609a str r2, [r3, #8]
+ 80006a2: 60da str r2, [r3, #12]
+ TIM_MasterConfigTypeDef sMasterConfig = {0};
+ 80006a4: 1d3b adds r3, r7, #4
+ 80006a6: 2200 movs r2, #0
+ 80006a8: 601a str r2, [r3, #0]
+ 80006aa: 605a str r2, [r3, #4]
+ 80006ac: 609a str r2, [r3, #8]
+
+ /* USER CODE BEGIN TIM3_Init 1 */
+
+ /* USER CODE END TIM3_Init 1 */
+ htim3.Instance = TIM3;
+ 80006ae: 4b1d ldr r3, [pc, #116] ; (8000724 <MX_TIM3_Init+0x94>)
+ 80006b0: 4a1d ldr r2, [pc, #116] ; (8000728 <MX_TIM3_Init+0x98>)
+ 80006b2: 601a str r2, [r3, #0]
+ htim3.Init.Prescaler = 39999;
+ 80006b4: 4b1b ldr r3, [pc, #108] ; (8000724 <MX_TIM3_Init+0x94>)
+ 80006b6: f649 423f movw r2, #39999 ; 0x9c3f
+ 80006ba: 605a str r2, [r3, #4]
+ htim3.Init.CounterMode = TIM_COUNTERMODE_UP;
+ 80006bc: 4b19 ldr r3, [pc, #100] ; (8000724 <MX_TIM3_Init+0x94>)
+ 80006be: 2200 movs r2, #0
+ 80006c0: 609a str r2, [r3, #8]
+ htim3.Init.Period = 9;
+ 80006c2: 4b18 ldr r3, [pc, #96] ; (8000724 <MX_TIM3_Init+0x94>)
+ 80006c4: 2209 movs r2, #9
+ 80006c6: 60da str r2, [r3, #12]
+ htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+ 80006c8: 4b16 ldr r3, [pc, #88] ; (8000724 <MX_TIM3_Init+0x94>)
+ 80006ca: 2200 movs r2, #0
+ 80006cc: 611a str r2, [r3, #16]
+ htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+ 80006ce: 4b15 ldr r3, [pc, #84] ; (8000724 <MX_TIM3_Init+0x94>)
+ 80006d0: 2200 movs r2, #0
+ 80006d2: 619a str r2, [r3, #24]
+ if (HAL_TIM_Base_Init(&htim3) != HAL_OK)
+ 80006d4: 4813 ldr r0, [pc, #76] ; (8000724 <MX_TIM3_Init+0x94>)
+ 80006d6: f001 fd97 bl 8002208 <HAL_TIM_Base_Init>
+ 80006da: 4603 mov r3, r0
+ 80006dc: 2b00 cmp r3, #0
+ 80006de: d001 beq.n 80006e4 <MX_TIM3_Init+0x54>
+ {
+ Error_Handler();
+ 80006e0: f000 f8b2 bl 8000848 <Error_Handler>
+ }
+ sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
+ 80006e4: f44f 5380 mov.w r3, #4096 ; 0x1000
+ 80006e8: 613b str r3, [r7, #16]
+ if (HAL_TIM_ConfigClockSource(&htim3, &sClockSourceConfig) != HAL_OK)
+ 80006ea: f107 0310 add.w r3, r7, #16
+ 80006ee: 4619 mov r1, r3
+ 80006f0: 480c ldr r0, [pc, #48] ; (8000724 <MX_TIM3_Init+0x94>)
+ 80006f2: f001 fed3 bl 800249c <HAL_TIM_ConfigClockSource>
+ 80006f6: 4603 mov r3, r0
+ 80006f8: 2b00 cmp r3, #0
+ 80006fa: d001 beq.n 8000700 <MX_TIM3_Init+0x70>
+ {
+ Error_Handler();
+ 80006fc: f000 f8a4 bl 8000848 <Error_Handler>
+ }
+ sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
+ 8000700: 2300 movs r3, #0
+ 8000702: 607b str r3, [r7, #4]
+ sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+ 8000704: 2300 movs r3, #0
+ 8000706: 60fb str r3, [r7, #12]
+ if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK)
+ 8000708: 1d3b adds r3, r7, #4
+ 800070a: 4619 mov r1, r3
+ 800070c: 4805 ldr r0, [pc, #20] ; (8000724 <MX_TIM3_Init+0x94>)
+ 800070e: f002 f8e1 bl 80028d4 <HAL_TIMEx_MasterConfigSynchronization>
+ 8000712: 4603 mov r3, r0
+ 8000714: 2b00 cmp r3, #0
+ 8000716: d001 beq.n 800071c <MX_TIM3_Init+0x8c>
{
Error_Handler();
- 80006bc: f000 f860 bl 8000780 <Error_Handler>
+ 8000718: f000 f896 bl 8000848 <Error_Handler>
}
+ /* USER CODE BEGIN TIM3_Init 2 */
+
+ /* USER CODE END TIM3_Init 2 */
+
}
- 80006c0: bf00 nop
- 80006c2: 37e0 adds r7, #224 ; 0xe0
- 80006c4: 46bd mov sp, r7
- 80006c6: bd80 pop {r7, pc}
- 80006c8: 40023800 .word 0x40023800
- 80006cc: 40007000 .word 0x40007000
-
-080006d0 <MX_USART6_UART_Init>:
+ 800071c: bf00 nop
+ 800071e: 3720 adds r7, #32
+ 8000720: 46bd mov sp, r7
+ 8000722: bd80 pop {r7, pc}
+ 8000724: 20000048 .word 0x20000048
+ 8000728: 40000400 .word 0x40000400
+
+0800072c <MX_USART6_UART_Init>:
* @brief USART6 Initialization Function
* @param None
* @retval None
*/
static void MX_USART6_UART_Init(void)
{
- 80006d0: b580 push {r7, lr}
- 80006d2: af00 add r7, sp, #0
+ 800072c: b580 push {r7, lr}
+ 800072e: af00 add r7, sp, #0
/* USER CODE END USART6_Init 0 */
/* USER CODE BEGIN USART6_Init 1 */
/* USER CODE END USART6_Init 1 */
huart6.Instance = USART6;
- 80006d4: 4b16 ldr r3, [pc, #88] ; (8000730 <MX_USART6_UART_Init+0x60>)
- 80006d6: 4a17 ldr r2, [pc, #92] ; (8000734 <MX_USART6_UART_Init+0x64>)
- 80006d8: 601a str r2, [r3, #0]
+ 8000730: 4b15 ldr r3, [pc, #84] ; (8000788 <MX_USART6_UART_Init+0x5c>)
+ 8000732: 4a16 ldr r2, [pc, #88] ; (800078c <MX_USART6_UART_Init+0x60>)
+ 8000734: 601a str r2, [r3, #0]
huart6.Init.BaudRate = 115200;
- 80006da: 4b15 ldr r3, [pc, #84] ; (8000730 <MX_USART6_UART_Init+0x60>)
- 80006dc: f44f 32e1 mov.w r2, #115200 ; 0x1c200
- 80006e0: 605a str r2, [r3, #4]
+ 8000736: 4b14 ldr r3, [pc, #80] ; (8000788 <MX_USART6_UART_Init+0x5c>)
+ 8000738: f44f 32e1 mov.w r2, #115200 ; 0x1c200
+ 800073c: 605a str r2, [r3, #4]
huart6.Init.WordLength = UART_WORDLENGTH_9B;
- 80006e2: 4b13 ldr r3, [pc, #76] ; (8000730 <MX_USART6_UART_Init+0x60>)
- 80006e4: f44f 5280 mov.w r2, #4096 ; 0x1000
- 80006e8: 609a str r2, [r3, #8]
- huart6.Init.StopBits = UART_STOPBITS_2;
- 80006ea: 4b11 ldr r3, [pc, #68] ; (8000730 <MX_USART6_UART_Init+0x60>)
- 80006ec: f44f 5200 mov.w r2, #8192 ; 0x2000
- 80006f0: 60da str r2, [r3, #12]
+ 800073e: 4b12 ldr r3, [pc, #72] ; (8000788 <MX_USART6_UART_Init+0x5c>)
+ 8000740: f44f 5280 mov.w r2, #4096 ; 0x1000
+ 8000744: 609a str r2, [r3, #8]
+ huart6.Init.StopBits = UART_STOPBITS_1;
+ 8000746: 4b10 ldr r3, [pc, #64] ; (8000788 <MX_USART6_UART_Init+0x5c>)
+ 8000748: 2200 movs r2, #0
+ 800074a: 60da str r2, [r3, #12]
huart6.Init.Parity = UART_PARITY_ODD;
- 80006f2: 4b0f ldr r3, [pc, #60] ; (8000730 <MX_USART6_UART_Init+0x60>)
- 80006f4: f44f 62c0 mov.w r2, #1536 ; 0x600
- 80006f8: 611a str r2, [r3, #16]
+ 800074c: 4b0e ldr r3, [pc, #56] ; (8000788 <MX_USART6_UART_Init+0x5c>)
+ 800074e: f44f 62c0 mov.w r2, #1536 ; 0x600
+ 8000752: 611a str r2, [r3, #16]
huart6.Init.Mode = UART_MODE_TX_RX;
- 80006fa: 4b0d ldr r3, [pc, #52] ; (8000730 <MX_USART6_UART_Init+0x60>)
- 80006fc: 220c movs r2, #12
- 80006fe: 615a str r2, [r3, #20]
- huart6.Init.HwFlowCtl = UART_HWCONTROL_RTS_CTS;
- 8000700: 4b0b ldr r3, [pc, #44] ; (8000730 <MX_USART6_UART_Init+0x60>)
- 8000702: f44f 7240 mov.w r2, #768 ; 0x300
- 8000706: 619a str r2, [r3, #24]
+ 8000754: 4b0c ldr r3, [pc, #48] ; (8000788 <MX_USART6_UART_Init+0x5c>)
+ 8000756: 220c movs r2, #12
+ 8000758: 615a str r2, [r3, #20]
+ huart6.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+ 800075a: 4b0b ldr r3, [pc, #44] ; (8000788 <MX_USART6_UART_Init+0x5c>)
+ 800075c: 2200 movs r2, #0
+ 800075e: 619a str r2, [r3, #24]
huart6.Init.OverSampling = UART_OVERSAMPLING_16;
- 8000708: 4b09 ldr r3, [pc, #36] ; (8000730 <MX_USART6_UART_Init+0x60>)
- 800070a: 2200 movs r2, #0
- 800070c: 61da str r2, [r3, #28]
+ 8000760: 4b09 ldr r3, [pc, #36] ; (8000788 <MX_USART6_UART_Init+0x5c>)
+ 8000762: 2200 movs r2, #0
+ 8000764: 61da str r2, [r3, #28]
huart6.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
- 800070e: 4b08 ldr r3, [pc, #32] ; (8000730 <MX_USART6_UART_Init+0x60>)
- 8000710: 2200 movs r2, #0
- 8000712: 621a str r2, [r3, #32]
+ 8000766: 4b08 ldr r3, [pc, #32] ; (8000788 <MX_USART6_UART_Init+0x5c>)
+ 8000768: 2200 movs r2, #0
+ 800076a: 621a str r2, [r3, #32]
huart6.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
- 8000714: 4b06 ldr r3, [pc, #24] ; (8000730 <MX_USART6_UART_Init+0x60>)
- 8000716: 2200 movs r2, #0
- 8000718: 625a str r2, [r3, #36] ; 0x24
+ 800076c: 4b06 ldr r3, [pc, #24] ; (8000788 <MX_USART6_UART_Init+0x5c>)
+ 800076e: 2200 movs r2, #0
+ 8000770: 625a str r2, [r3, #36] ; 0x24
if (HAL_UART_Init(&huart6) != HAL_OK)
- 800071a: 4805 ldr r0, [pc, #20] ; (8000730 <MX_USART6_UART_Init+0x60>)
- 800071c: f001 fcc0 bl 80020a0 <HAL_UART_Init>
- 8000720: 4603 mov r3, r0
- 8000722: 2b00 cmp r3, #0
- 8000724: d001 beq.n 800072a <MX_USART6_UART_Init+0x5a>
+ 8000772: 4805 ldr r0, [pc, #20] ; (8000788 <MX_USART6_UART_Init+0x5c>)
+ 8000774: f002 f928 bl 80029c8 <HAL_UART_Init>
+ 8000778: 4603 mov r3, r0
+ 800077a: 2b00 cmp r3, #0
+ 800077c: d001 beq.n 8000782 <MX_USART6_UART_Init+0x56>
{
Error_Handler();
- 8000726: f000 f82b bl 8000780 <Error_Handler>
+ 800077e: f000 f863 bl 8000848 <Error_Handler>
}
/* USER CODE BEGIN USART6_Init 2 */
/* USER CODE END USART6_Init 2 */
}
- 800072a: bf00 nop
- 800072c: bd80 pop {r7, pc}
- 800072e: bf00 nop
- 8000730: 20000028 .word 0x20000028
- 8000734: 40011400 .word 0x40011400
+ 8000782: bf00 nop
+ 8000784: bd80 pop {r7, pc}
+ 8000786: bf00 nop
+ 8000788: 20000088 .word 0x20000088
+ 800078c: 40011400 .word 0x40011400
-08000738 <MX_GPIO_Init>:
+08000790 <MX_GPIO_Init>:
* @brief GPIO Initialization Function
* @param None
* @retval None
*/
static void MX_GPIO_Init(void)
{
- 8000738: b480 push {r7}
- 800073a: b083 sub sp, #12
- 800073c: af00 add r7, sp, #0
+ 8000790: b480 push {r7}
+ 8000792: b083 sub sp, #12
+ 8000794: af00 add r7, sp, #0
/* GPIO Ports Clock Enable */
- __HAL_RCC_GPIOG_CLK_ENABLE();
- 800073e: 4b0f ldr r3, [pc, #60] ; (800077c <MX_GPIO_Init+0x44>)
- 8000740: 6b1b ldr r3, [r3, #48] ; 0x30
- 8000742: 4a0e ldr r2, [pc, #56] ; (800077c <MX_GPIO_Init+0x44>)
- 8000744: f043 0340 orr.w r3, r3, #64 ; 0x40
- 8000748: 6313 str r3, [r2, #48] ; 0x30
- 800074a: 4b0c ldr r3, [pc, #48] ; (800077c <MX_GPIO_Init+0x44>)
- 800074c: 6b1b ldr r3, [r3, #48] ; 0x30
- 800074e: f003 0340 and.w r3, r3, #64 ; 0x40
- 8000752: 607b str r3, [r7, #4]
- 8000754: 687b ldr r3, [r7, #4]
__HAL_RCC_GPIOC_CLK_ENABLE();
- 8000756: 4b09 ldr r3, [pc, #36] ; (800077c <MX_GPIO_Init+0x44>)
- 8000758: 6b1b ldr r3, [r3, #48] ; 0x30
- 800075a: 4a08 ldr r2, [pc, #32] ; (800077c <MX_GPIO_Init+0x44>)
- 800075c: f043 0304 orr.w r3, r3, #4
- 8000760: 6313 str r3, [r2, #48] ; 0x30
- 8000762: 4b06 ldr r3, [pc, #24] ; (800077c <MX_GPIO_Init+0x44>)
- 8000764: 6b1b ldr r3, [r3, #48] ; 0x30
- 8000766: f003 0304 and.w r3, r3, #4
- 800076a: 603b str r3, [r7, #0]
- 800076c: 683b ldr r3, [r7, #0]
+ 8000796: 4b09 ldr r3, [pc, #36] ; (80007bc <MX_GPIO_Init+0x2c>)
+ 8000798: 6b1b ldr r3, [r3, #48] ; 0x30
+ 800079a: 4a08 ldr r2, [pc, #32] ; (80007bc <MX_GPIO_Init+0x2c>)
+ 800079c: f043 0304 orr.w r3, r3, #4
+ 80007a0: 6313 str r3, [r2, #48] ; 0x30
+ 80007a2: 4b06 ldr r3, [pc, #24] ; (80007bc <MX_GPIO_Init+0x2c>)
+ 80007a4: 6b1b ldr r3, [r3, #48] ; 0x30
+ 80007a6: f003 0304 and.w r3, r3, #4
+ 80007aa: 607b str r3, [r7, #4]
+ 80007ac: 687b ldr r3, [r7, #4]
}
- 800076e: bf00 nop
- 8000770: 370c adds r7, #12
- 8000772: 46bd mov sp, r7
- 8000774: f85d 7b04 ldr.w r7, [sp], #4
- 8000778: 4770 bx lr
- 800077a: bf00 nop
- 800077c: 40023800 .word 0x40023800
-
-08000780 <Error_Handler>:
+ 80007ae: bf00 nop
+ 80007b0: 370c adds r7, #12
+ 80007b2: 46bd mov sp, r7
+ 80007b4: f85d 7b04 ldr.w r7, [sp], #4
+ 80007b8: 4770 bx lr
+ 80007ba: bf00 nop
+ 80007bc: 40023800 .word 0x40023800
+
+080007c0 <HAL_TIM_PeriodElapsedCallback>:
+
+/* USER CODE BEGIN 4 */
+void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) {
+ 80007c0: b580 push {r7, lr}
+ 80007c2: b082 sub sp, #8
+ 80007c4: af00 add r7, sp, #0
+ 80007c6: 6078 str r0, [r7, #4]
+ if (htim->Instance == TIM3) {
+ 80007c8: 687b ldr r3, [r7, #4]
+ 80007ca: 681b ldr r3, [r3, #0]
+ 80007cc: 4a06 ldr r2, [pc, #24] ; (80007e8 <HAL_TIM_PeriodElapsedCallback+0x28>)
+ 80007ce: 4293 cmp r3, r2
+ 80007d0: d106 bne.n 80007e0 <HAL_TIM_PeriodElapsedCallback+0x20>
+ HAL_UART_Transmit(&huart6, out_buffer, 12, 100);
+ 80007d2: 4b06 ldr r3, [pc, #24] ; (80007ec <HAL_TIM_PeriodElapsedCallback+0x2c>)
+ 80007d4: 6819 ldr r1, [r3, #0]
+ 80007d6: 2364 movs r3, #100 ; 0x64
+ 80007d8: 220c movs r2, #12
+ 80007da: 4805 ldr r0, [pc, #20] ; (80007f0 <HAL_TIM_PeriodElapsedCallback+0x30>)
+ 80007dc: f002 f942 bl 8002a64 <HAL_UART_Transmit>
+ }
+}
+ 80007e0: bf00 nop
+ 80007e2: 3708 adds r7, #8
+ 80007e4: 46bd mov sp, r7
+ 80007e6: bd80 pop {r7, pc}
+ 80007e8: 40000400 .word 0x40000400
+ 80007ec: 20000040 .word 0x20000040
+ 80007f0: 20000088 .word 0x20000088
+
+080007f4 <HAL_UART_RxCpltCallback>:
+
+void HAL_UART_RxCpltCallback(UART_HandleTypeDef *UartHandle) {
+ 80007f4: b580 push {r7, lr}
+ 80007f6: b082 sub sp, #8
+ 80007f8: af00 add r7, sp, #0
+ 80007fa: 6078 str r0, [r7, #4]
+ test++;
+ 80007fc: 4b07 ldr r3, [pc, #28] ; (800081c <HAL_UART_RxCpltCallback+0x28>)
+ 80007fe: 681b ldr r3, [r3, #0]
+ 8000800: 3301 adds r3, #1
+ 8000802: 4a06 ldr r2, [pc, #24] ; (800081c <HAL_UART_RxCpltCallback+0x28>)
+ 8000804: 6013 str r3, [r2, #0]
+ HAL_UART_Receive_IT(&huart6, out_buffer, 8);
+ 8000806: 4b06 ldr r3, [pc, #24] ; (8000820 <HAL_UART_RxCpltCallback+0x2c>)
+ 8000808: 681b ldr r3, [r3, #0]
+ 800080a: 2208 movs r2, #8
+ 800080c: 4619 mov r1, r3
+ 800080e: 4805 ldr r0, [pc, #20] ; (8000824 <HAL_UART_RxCpltCallback+0x30>)
+ 8000810: f002 f9ba bl 8002b88 <HAL_UART_Receive_IT>
+}
+ 8000814: bf00 nop
+ 8000816: 3708 adds r7, #8
+ 8000818: 46bd mov sp, r7
+ 800081a: bd80 pop {r7, pc}
+ 800081c: 20000028 .word 0x20000028
+ 8000820: 20000040 .word 0x20000040
+ 8000824: 20000088 .word 0x20000088
+
+08000828 <HAL_UART_ErrorCallback>:
+
+void HAL_UART_ErrorCallback(UART_HandleTypeDef *UartHandle){
+ 8000828: b480 push {r7}
+ 800082a: b083 sub sp, #12
+ 800082c: af00 add r7, sp, #0
+ 800082e: 6078 str r0, [r7, #4]
+ test = 9;
+ 8000830: 4b04 ldr r3, [pc, #16] ; (8000844 <HAL_UART_ErrorCallback+0x1c>)
+ 8000832: 2209 movs r2, #9
+ 8000834: 601a str r2, [r3, #0]
+}
+ 8000836: bf00 nop
+ 8000838: 370c adds r7, #12
+ 800083a: 46bd mov sp, r7
+ 800083c: f85d 7b04 ldr.w r7, [sp], #4
+ 8000840: 4770 bx lr
+ 8000842: bf00 nop
+ 8000844: 20000028 .word 0x20000028
+
+08000848 <Error_Handler>:
/**
* @brief This function is executed in case of error occurrence.
* @retval None
*/
void Error_Handler(void)
{
- 8000780: b480 push {r7}
- 8000782: af00 add r7, sp, #0
+ 8000848: b480 push {r7}
+ 800084a: af00 add r7, sp, #0
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
/* USER CODE END Error_Handler_Debug */
}
- 8000784: bf00 nop
- 8000786: 46bd mov sp, r7
- 8000788: f85d 7b04 ldr.w r7, [sp], #4
- 800078c: 4770 bx lr
+ 800084c: bf00 nop
+ 800084e: 46bd mov sp, r7
+ 8000850: f85d 7b04 ldr.w r7, [sp], #4
+ 8000854: 4770 bx lr
...
-08000790 <HAL_MspInit>:
+08000858 <HAL_MspInit>:
/* USER CODE END 0 */
/**
* Initializes the Global MSP.
*/
void HAL_MspInit(void)
{
- 8000790: b480 push {r7}
- 8000792: b083 sub sp, #12
- 8000794: af00 add r7, sp, #0
+ 8000858: b480 push {r7}
+ 800085a: b083 sub sp, #12
+ 800085c: af00 add r7, sp, #0
/* USER CODE BEGIN MspInit 0 */
/* USER CODE END MspInit 0 */
__HAL_RCC_PWR_CLK_ENABLE();
- 8000796: 4b0f ldr r3, [pc, #60] ; (80007d4 <HAL_MspInit+0x44>)
- 8000798: 6c1b ldr r3, [r3, #64] ; 0x40
- 800079a: 4a0e ldr r2, [pc, #56] ; (80007d4 <HAL_MspInit+0x44>)
- 800079c: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
- 80007a0: 6413 str r3, [r2, #64] ; 0x40
- 80007a2: 4b0c ldr r3, [pc, #48] ; (80007d4 <HAL_MspInit+0x44>)
- 80007a4: 6c1b ldr r3, [r3, #64] ; 0x40
- 80007a6: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
- 80007aa: 607b str r3, [r7, #4]
- 80007ac: 687b ldr r3, [r7, #4]
+ 800085e: 4b0f ldr r3, [pc, #60] ; (800089c <HAL_MspInit+0x44>)
+ 8000860: 6c1b ldr r3, [r3, #64] ; 0x40
+ 8000862: 4a0e ldr r2, [pc, #56] ; (800089c <HAL_MspInit+0x44>)
+ 8000864: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
+ 8000868: 6413 str r3, [r2, #64] ; 0x40
+ 800086a: 4b0c ldr r3, [pc, #48] ; (800089c <HAL_MspInit+0x44>)
+ 800086c: 6c1b ldr r3, [r3, #64] ; 0x40
+ 800086e: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
+ 8000872: 607b str r3, [r7, #4]
+ 8000874: 687b ldr r3, [r7, #4]
__HAL_RCC_SYSCFG_CLK_ENABLE();
- 80007ae: 4b09 ldr r3, [pc, #36] ; (80007d4 <HAL_MspInit+0x44>)
- 80007b0: 6c5b ldr r3, [r3, #68] ; 0x44
- 80007b2: 4a08 ldr r2, [pc, #32] ; (80007d4 <HAL_MspInit+0x44>)
- 80007b4: f443 4380 orr.w r3, r3, #16384 ; 0x4000
- 80007b8: 6453 str r3, [r2, #68] ; 0x44
- 80007ba: 4b06 ldr r3, [pc, #24] ; (80007d4 <HAL_MspInit+0x44>)
- 80007bc: 6c5b ldr r3, [r3, #68] ; 0x44
- 80007be: f403 4380 and.w r3, r3, #16384 ; 0x4000
- 80007c2: 603b str r3, [r7, #0]
- 80007c4: 683b ldr r3, [r7, #0]
+ 8000876: 4b09 ldr r3, [pc, #36] ; (800089c <HAL_MspInit+0x44>)
+ 8000878: 6c5b ldr r3, [r3, #68] ; 0x44
+ 800087a: 4a08 ldr r2, [pc, #32] ; (800089c <HAL_MspInit+0x44>)
+ 800087c: f443 4380 orr.w r3, r3, #16384 ; 0x4000
+ 8000880: 6453 str r3, [r2, #68] ; 0x44
+ 8000882: 4b06 ldr r3, [pc, #24] ; (800089c <HAL_MspInit+0x44>)
+ 8000884: 6c5b ldr r3, [r3, #68] ; 0x44
+ 8000886: f403 4380 and.w r3, r3, #16384 ; 0x4000
+ 800088a: 603b str r3, [r7, #0]
+ 800088c: 683b ldr r3, [r7, #0]
/* System interrupt init*/
/* USER CODE BEGIN MspInit 1 */
/* USER CODE END MspInit 1 */
}
- 80007c6: bf00 nop
- 80007c8: 370c adds r7, #12
- 80007ca: 46bd mov sp, r7
- 80007cc: f85d 7b04 ldr.w r7, [sp], #4
- 80007d0: 4770 bx lr
- 80007d2: bf00 nop
- 80007d4: 40023800 .word 0x40023800
-
-080007d8 <HAL_UART_MspInit>:
+ 800088e: bf00 nop
+ 8000890: 370c adds r7, #12
+ 8000892: 46bd mov sp, r7
+ 8000894: f85d 7b04 ldr.w r7, [sp], #4
+ 8000898: 4770 bx lr
+ 800089a: bf00 nop
+ 800089c: 40023800 .word 0x40023800
+
+080008a0 <HAL_TIM_Base_MspInit>:
+* This function configures the hardware resources used in this example
+* @param htim_base: TIM_Base handle pointer
+* @retval None
+*/
+void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
+{
+ 80008a0: b580 push {r7, lr}
+ 80008a2: b084 sub sp, #16
+ 80008a4: af00 add r7, sp, #0
+ 80008a6: 6078 str r0, [r7, #4]
+ if(htim_base->Instance==TIM3)
+ 80008a8: 687b ldr r3, [r7, #4]
+ 80008aa: 681b ldr r3, [r3, #0]
+ 80008ac: 4a0d ldr r2, [pc, #52] ; (80008e4 <HAL_TIM_Base_MspInit+0x44>)
+ 80008ae: 4293 cmp r3, r2
+ 80008b0: d113 bne.n 80008da <HAL_TIM_Base_MspInit+0x3a>
+ {
+ /* USER CODE BEGIN TIM3_MspInit 0 */
+
+ /* USER CODE END TIM3_MspInit 0 */
+ /* Peripheral clock enable */
+ __HAL_RCC_TIM3_CLK_ENABLE();
+ 80008b2: 4b0d ldr r3, [pc, #52] ; (80008e8 <HAL_TIM_Base_MspInit+0x48>)
+ 80008b4: 6c1b ldr r3, [r3, #64] ; 0x40
+ 80008b6: 4a0c ldr r2, [pc, #48] ; (80008e8 <HAL_TIM_Base_MspInit+0x48>)
+ 80008b8: f043 0302 orr.w r3, r3, #2
+ 80008bc: 6413 str r3, [r2, #64] ; 0x40
+ 80008be: 4b0a ldr r3, [pc, #40] ; (80008e8 <HAL_TIM_Base_MspInit+0x48>)
+ 80008c0: 6c1b ldr r3, [r3, #64] ; 0x40
+ 80008c2: f003 0302 and.w r3, r3, #2
+ 80008c6: 60fb str r3, [r7, #12]
+ 80008c8: 68fb ldr r3, [r7, #12]
+ /* TIM3 interrupt Init */
+ HAL_NVIC_SetPriority(TIM3_IRQn, 0, 0);
+ 80008ca: 2200 movs r2, #0
+ 80008cc: 2100 movs r1, #0
+ 80008ce: 201d movs r0, #29
+ 80008d0: f000 fa31 bl 8000d36 <HAL_NVIC_SetPriority>
+ HAL_NVIC_EnableIRQ(TIM3_IRQn);
+ 80008d4: 201d movs r0, #29
+ 80008d6: f000 fa4a bl 8000d6e <HAL_NVIC_EnableIRQ>
+ /* USER CODE BEGIN TIM3_MspInit 1 */
+
+ /* USER CODE END TIM3_MspInit 1 */
+ }
+
+}
+ 80008da: bf00 nop
+ 80008dc: 3710 adds r7, #16
+ 80008de: 46bd mov sp, r7
+ 80008e0: bd80 pop {r7, pc}
+ 80008e2: bf00 nop
+ 80008e4: 40000400 .word 0x40000400
+ 80008e8: 40023800 .word 0x40023800
+
+080008ec <HAL_UART_MspInit>:
* This function configures the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
{
- 80007d8: b580 push {r7, lr}
- 80007da: b08a sub sp, #40 ; 0x28
- 80007dc: af00 add r7, sp, #0
- 80007de: 6078 str r0, [r7, #4]
+ 80008ec: b580 push {r7, lr}
+ 80008ee: b08a sub sp, #40 ; 0x28
+ 80008f0: af00 add r7, sp, #0
+ 80008f2: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
- 80007e0: f107 0314 add.w r3, r7, #20
- 80007e4: 2200 movs r2, #0
- 80007e6: 601a str r2, [r3, #0]
- 80007e8: 605a str r2, [r3, #4]
- 80007ea: 609a str r2, [r3, #8]
- 80007ec: 60da str r2, [r3, #12]
- 80007ee: 611a str r2, [r3, #16]
+ 80008f4: f107 0314 add.w r3, r7, #20
+ 80008f8: 2200 movs r2, #0
+ 80008fa: 601a str r2, [r3, #0]
+ 80008fc: 605a str r2, [r3, #4]
+ 80008fe: 609a str r2, [r3, #8]
+ 8000900: 60da str r2, [r3, #12]
+ 8000902: 611a str r2, [r3, #16]
if(huart->Instance==USART6)
- 80007f0: 687b ldr r3, [r7, #4]
- 80007f2: 681b ldr r3, [r3, #0]
- 80007f4: 4a25 ldr r2, [pc, #148] ; (800088c <HAL_UART_MspInit+0xb4>)
- 80007f6: 4293 cmp r3, r2
- 80007f8: d144 bne.n 8000884 <HAL_UART_MspInit+0xac>
+ 8000904: 687b ldr r3, [r7, #4]
+ 8000906: 681b ldr r3, [r3, #0]
+ 8000908: 4a1b ldr r2, [pc, #108] ; (8000978 <HAL_UART_MspInit+0x8c>)
+ 800090a: 4293 cmp r3, r2
+ 800090c: d12f bne.n 800096e <HAL_UART_MspInit+0x82>
{
/* USER CODE BEGIN USART6_MspInit 0 */
/* USER CODE END USART6_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_USART6_CLK_ENABLE();
- 80007fa: 4b25 ldr r3, [pc, #148] ; (8000890 <HAL_UART_MspInit+0xb8>)
- 80007fc: 6c5b ldr r3, [r3, #68] ; 0x44
- 80007fe: 4a24 ldr r2, [pc, #144] ; (8000890 <HAL_UART_MspInit+0xb8>)
- 8000800: f043 0320 orr.w r3, r3, #32
- 8000804: 6453 str r3, [r2, #68] ; 0x44
- 8000806: 4b22 ldr r3, [pc, #136] ; (8000890 <HAL_UART_MspInit+0xb8>)
- 8000808: 6c5b ldr r3, [r3, #68] ; 0x44
- 800080a: f003 0320 and.w r3, r3, #32
- 800080e: 613b str r3, [r7, #16]
- 8000810: 693b ldr r3, [r7, #16]
+ 800090e: 4b1b ldr r3, [pc, #108] ; (800097c <HAL_UART_MspInit+0x90>)
+ 8000910: 6c5b ldr r3, [r3, #68] ; 0x44
+ 8000912: 4a1a ldr r2, [pc, #104] ; (800097c <HAL_UART_MspInit+0x90>)
+ 8000914: f043 0320 orr.w r3, r3, #32
+ 8000918: 6453 str r3, [r2, #68] ; 0x44
+ 800091a: 4b18 ldr r3, [pc, #96] ; (800097c <HAL_UART_MspInit+0x90>)
+ 800091c: 6c5b ldr r3, [r3, #68] ; 0x44
+ 800091e: f003 0320 and.w r3, r3, #32
+ 8000922: 613b str r3, [r7, #16]
+ 8000924: 693b ldr r3, [r7, #16]
- __HAL_RCC_GPIOG_CLK_ENABLE();
- 8000812: 4b1f ldr r3, [pc, #124] ; (8000890 <HAL_UART_MspInit+0xb8>)
- 8000814: 6b1b ldr r3, [r3, #48] ; 0x30
- 8000816: 4a1e ldr r2, [pc, #120] ; (8000890 <HAL_UART_MspInit+0xb8>)
- 8000818: f043 0340 orr.w r3, r3, #64 ; 0x40
- 800081c: 6313 str r3, [r2, #48] ; 0x30
- 800081e: 4b1c ldr r3, [pc, #112] ; (8000890 <HAL_UART_MspInit+0xb8>)
- 8000820: 6b1b ldr r3, [r3, #48] ; 0x30
- 8000822: f003 0340 and.w r3, r3, #64 ; 0x40
- 8000826: 60fb str r3, [r7, #12]
- 8000828: 68fb ldr r3, [r7, #12]
__HAL_RCC_GPIOC_CLK_ENABLE();
- 800082a: 4b19 ldr r3, [pc, #100] ; (8000890 <HAL_UART_MspInit+0xb8>)
- 800082c: 6b1b ldr r3, [r3, #48] ; 0x30
- 800082e: 4a18 ldr r2, [pc, #96] ; (8000890 <HAL_UART_MspInit+0xb8>)
- 8000830: f043 0304 orr.w r3, r3, #4
- 8000834: 6313 str r3, [r2, #48] ; 0x30
- 8000836: 4b16 ldr r3, [pc, #88] ; (8000890 <HAL_UART_MspInit+0xb8>)
- 8000838: 6b1b ldr r3, [r3, #48] ; 0x30
- 800083a: f003 0304 and.w r3, r3, #4
- 800083e: 60bb str r3, [r7, #8]
- 8000840: 68bb ldr r3, [r7, #8]
- PG8 ------> USART6_RTS
+ 8000926: 4b15 ldr r3, [pc, #84] ; (800097c <HAL_UART_MspInit+0x90>)
+ 8000928: 6b1b ldr r3, [r3, #48] ; 0x30
+ 800092a: 4a14 ldr r2, [pc, #80] ; (800097c <HAL_UART_MspInit+0x90>)
+ 800092c: f043 0304 orr.w r3, r3, #4
+ 8000930: 6313 str r3, [r2, #48] ; 0x30
+ 8000932: 4b12 ldr r3, [pc, #72] ; (800097c <HAL_UART_MspInit+0x90>)
+ 8000934: 6b1b ldr r3, [r3, #48] ; 0x30
+ 8000936: f003 0304 and.w r3, r3, #4
+ 800093a: 60fb str r3, [r7, #12]
+ 800093c: 68fb ldr r3, [r7, #12]
+ /**USART6 GPIO Configuration
PC6 ------> USART6_TX
- PC7 ------> USART6_RX
- PG13 ------> USART6_CTS
+ PC7 ------> USART6_RX
*/
- GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_13;
- 8000842: f44f 5304 mov.w r3, #8448 ; 0x2100
- 8000846: 617b str r3, [r7, #20]
- GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 8000848: 2302 movs r3, #2
- 800084a: 61bb str r3, [r7, #24]
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- 800084c: 2300 movs r3, #0
- 800084e: 61fb str r3, [r7, #28]
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- 8000850: 2303 movs r3, #3
- 8000852: 623b str r3, [r7, #32]
- GPIO_InitStruct.Alternate = GPIO_AF8_USART6;
- 8000854: 2308 movs r3, #8
- 8000856: 627b str r3, [r7, #36] ; 0x24
- HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
- 8000858: f107 0314 add.w r3, r7, #20
- 800085c: 4619 mov r1, r3
- 800085e: 480d ldr r0, [pc, #52] ; (8000894 <HAL_UART_MspInit+0xbc>)
- 8000860: f000 fa0e bl 8000c80 <HAL_GPIO_Init>
-
GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7;
- 8000864: 23c0 movs r3, #192 ; 0xc0
- 8000866: 617b str r3, [r7, #20]
+ 800093e: 23c0 movs r3, #192 ; 0xc0
+ 8000940: 617b str r3, [r7, #20]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 8000868: 2302 movs r3, #2
- 800086a: 61bb str r3, [r7, #24]
+ 8000942: 2302 movs r3, #2
+ 8000944: 61bb str r3, [r7, #24]
GPIO_InitStruct.Pull = GPIO_NOPULL;
- 800086c: 2300 movs r3, #0
- 800086e: 61fb str r3, [r7, #28]
+ 8000946: 2300 movs r3, #0
+ 8000948: 61fb str r3, [r7, #28]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- 8000870: 2303 movs r3, #3
- 8000872: 623b str r3, [r7, #32]
+ 800094a: 2303 movs r3, #3
+ 800094c: 623b str r3, [r7, #32]
GPIO_InitStruct.Alternate = GPIO_AF8_USART6;
- 8000874: 2308 movs r3, #8
- 8000876: 627b str r3, [r7, #36] ; 0x24
+ 800094e: 2308 movs r3, #8
+ 8000950: 627b str r3, [r7, #36] ; 0x24
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
- 8000878: f107 0314 add.w r3, r7, #20
- 800087c: 4619 mov r1, r3
- 800087e: 4806 ldr r0, [pc, #24] ; (8000898 <HAL_UART_MspInit+0xc0>)
- 8000880: f000 f9fe bl 8000c80 <HAL_GPIO_Init>
+ 8000952: f107 0314 add.w r3, r7, #20
+ 8000956: 4619 mov r1, r3
+ 8000958: 4809 ldr r0, [pc, #36] ; (8000980 <HAL_UART_MspInit+0x94>)
+ 800095a: f000 fa45 bl 8000de8 <HAL_GPIO_Init>
+
+ /* USART6 interrupt Init */
+ HAL_NVIC_SetPriority(USART6_IRQn, 0, 0);
+ 800095e: 2200 movs r2, #0
+ 8000960: 2100 movs r1, #0
+ 8000962: 2047 movs r0, #71 ; 0x47
+ 8000964: f000 f9e7 bl 8000d36 <HAL_NVIC_SetPriority>
+ HAL_NVIC_EnableIRQ(USART6_IRQn);
+ 8000968: 2047 movs r0, #71 ; 0x47
+ 800096a: f000 fa00 bl 8000d6e <HAL_NVIC_EnableIRQ>
/* USER CODE BEGIN USART6_MspInit 1 */
/* USER CODE END USART6_MspInit 1 */
}
}
- 8000884: bf00 nop
- 8000886: 3728 adds r7, #40 ; 0x28
- 8000888: 46bd mov sp, r7
- 800088a: bd80 pop {r7, pc}
- 800088c: 40011400 .word 0x40011400
- 8000890: 40023800 .word 0x40023800
- 8000894: 40021800 .word 0x40021800
- 8000898: 40020800 .word 0x40020800
-
-0800089c <NMI_Handler>:
+ 800096e: bf00 nop
+ 8000970: 3728 adds r7, #40 ; 0x28
+ 8000972: 46bd mov sp, r7
+ 8000974: bd80 pop {r7, pc}
+ 8000976: bf00 nop
+ 8000978: 40011400 .word 0x40011400
+ 800097c: 40023800 .word 0x40023800
+ 8000980: 40020800 .word 0x40020800
+
+08000984 <NMI_Handler>:
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
*/
void NMI_Handler(void)
{
- 800089c: b480 push {r7}
- 800089e: af00 add r7, sp, #0
+ 8000984: b480 push {r7}
+ 8000986: af00 add r7, sp, #0
/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
/* USER CODE END NonMaskableInt_IRQn 1 */
}
- 80008a0: bf00 nop
- 80008a2: 46bd mov sp, r7
- 80008a4: f85d 7b04 ldr.w r7, [sp], #4
- 80008a8: 4770 bx lr
+ 8000988: bf00 nop
+ 800098a: 46bd mov sp, r7
+ 800098c: f85d 7b04 ldr.w r7, [sp], #4
+ 8000990: 4770 bx lr
-080008aa <HardFault_Handler>:
+08000992 <HardFault_Handler>:
/**
* @brief This function handles Hard fault interrupt.
*/
void HardFault_Handler(void)
{
- 80008aa: b480 push {r7}
- 80008ac: af00 add r7, sp, #0
+ 8000992: b480 push {r7}
+ 8000994: af00 add r7, sp, #0
/* USER CODE BEGIN HardFault_IRQn 0 */
/* USER CODE END HardFault_IRQn 0 */
while (1)
- 80008ae: e7fe b.n 80008ae <HardFault_Handler+0x4>
+ 8000996: e7fe b.n 8000996 <HardFault_Handler+0x4>
-080008b0 <MemManage_Handler>:
+08000998 <MemManage_Handler>:
/**
* @brief This function handles Memory management fault.
*/
void MemManage_Handler(void)
{
- 80008b0: b480 push {r7}
- 80008b2: af00 add r7, sp, #0
+ 8000998: b480 push {r7}
+ 800099a: af00 add r7, sp, #0
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
/* USER CODE END MemoryManagement_IRQn 0 */
while (1)
- 80008b4: e7fe b.n 80008b4 <MemManage_Handler+0x4>
+ 800099c: e7fe b.n 800099c <MemManage_Handler+0x4>
-080008b6 <BusFault_Handler>:
+0800099e <BusFault_Handler>:
/**
* @brief This function handles Pre-fetch fault, memory access fault.
*/
void BusFault_Handler(void)
{
- 80008b6: b480 push {r7}
- 80008b8: af00 add r7, sp, #0
+ 800099e: b480 push {r7}
+ 80009a0: af00 add r7, sp, #0
/* USER CODE BEGIN BusFault_IRQn 0 */
/* USER CODE END BusFault_IRQn 0 */
while (1)
- 80008ba: e7fe b.n 80008ba <BusFault_Handler+0x4>
+ 80009a2: e7fe b.n 80009a2 <BusFault_Handler+0x4>
-080008bc <UsageFault_Handler>:
+080009a4 <UsageFault_Handler>:
/**
* @brief This function handles Undefined instruction or illegal state.
*/
void UsageFault_Handler(void)
{
- 80008bc: b480 push {r7}
- 80008be: af00 add r7, sp, #0
+ 80009a4: b480 push {r7}
+ 80009a6: af00 add r7, sp, #0
/* USER CODE BEGIN UsageFault_IRQn 0 */
/* USER CODE END UsageFault_IRQn 0 */
while (1)
- 80008c0: e7fe b.n 80008c0 <UsageFault_Handler+0x4>
+ 80009a8: e7fe b.n 80009a8 <UsageFault_Handler+0x4>
-080008c2 <SVC_Handler>:
+080009aa <SVC_Handler>:
/**
* @brief This function handles System service call via SWI instruction.
*/
void SVC_Handler(void)
{
- 80008c2: b480 push {r7}
- 80008c4: af00 add r7, sp, #0
+ 80009aa: b480 push {r7}
+ 80009ac: af00 add r7, sp, #0
/* USER CODE END SVCall_IRQn 0 */
/* USER CODE BEGIN SVCall_IRQn 1 */
/* USER CODE END SVCall_IRQn 1 */
}
- 80008c6: bf00 nop
- 80008c8: 46bd mov sp, r7
- 80008ca: f85d 7b04 ldr.w r7, [sp], #4
- 80008ce: 4770 bx lr
+ 80009ae: bf00 nop
+ 80009b0: 46bd mov sp, r7
+ 80009b2: f85d 7b04 ldr.w r7, [sp], #4
+ 80009b6: 4770 bx lr
-080008d0 <DebugMon_Handler>:
+080009b8 <DebugMon_Handler>:
/**
* @brief This function handles Debug monitor.
*/
void DebugMon_Handler(void)
{
- 80008d0: b480 push {r7}
- 80008d2: af00 add r7, sp, #0
+ 80009b8: b480 push {r7}
+ 80009ba: af00 add r7, sp, #0
/* USER CODE END DebugMonitor_IRQn 0 */
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
/* USER CODE END DebugMonitor_IRQn 1 */
}
- 80008d4: bf00 nop
- 80008d6: 46bd mov sp, r7
- 80008d8: f85d 7b04 ldr.w r7, [sp], #4
- 80008dc: 4770 bx lr
+ 80009bc: bf00 nop
+ 80009be: 46bd mov sp, r7
+ 80009c0: f85d 7b04 ldr.w r7, [sp], #4
+ 80009c4: 4770 bx lr
-08000
8de <PendSV_Handler>:
+08000
9c6 <PendSV_Handler>:
/**
* @brief This function handles Pendable request for system service.
*/
void PendSV_Handler(void)
{
- 80008de: b480 push {r7}
- 80008e0: af00 add r7, sp, #0
+ 80009c6: b480 push {r7}
+ 80009c8: af00 add r7, sp, #0
/* USER CODE END PendSV_IRQn 0 */
/* USER CODE BEGIN PendSV_IRQn 1 */
/* USER CODE END PendSV_IRQn 1 */
}
- 80008e2: bf00 nop
- 80008e4: 46bd mov sp, r7
- 80008e6: f85d 7b04 ldr.w r7, [sp], #4
- 80008ea: 4770 bx lr
+ 80009ca: bf00 nop
+ 80009cc: 46bd mov sp, r7
+ 80009ce: f85d 7b04 ldr.w r7, [sp], #4
+ 80009d2: 4770 bx lr
-080008ec <SysTick_Handler>:
+080009d4 <SysTick_Handler>:
/**
* @brief This function handles System tick timer.
*/
void SysTick_Handler(void)
{
- 80008ec: b580 push {r7, lr}
- 80008ee: af00 add r7, sp, #0
+ 80009d4: b580 push {r7, lr}
+ 80009d6: af00 add r7, sp, #0
/* USER CODE BEGIN SysTick_IRQn 0 */
/* USER CODE END SysTick_IRQn 0 */
HAL_IncTick();
- 80008f0: f000 f89e bl 8000a30 <HAL_IncTick>
+ 80009d8: f000 f8b2 bl 8000b40 <HAL_IncTick>
/* USER CODE BEGIN SysTick_IRQn 1 */
/* USER CODE END SysTick_IRQn 1 */
}
- 80008f4: bf00 nop
- 80008f6: bd80 pop {r7, pc}
+ 80009dc: bf00 nop
+ 80009de: bd80 pop {r7, pc}
+
+080009e0 <TIM3_IRQHandler>:
+
+/**
+ * @brief This function handles TIM3 global interrupt.
+ */
+void TIM3_IRQHandler(void)
+{
+ 80009e0: b580 push {r7, lr}
+ 80009e2: af00 add r7, sp, #0
+ /* USER CODE BEGIN TIM3_IRQn 0 */
+
+ /* USER CODE END TIM3_IRQn 0 */
+ HAL_TIM_IRQHandler(&htim3);
+ 80009e4: 4802 ldr r0, [pc, #8] ; (80009f0 <TIM3_IRQHandler+0x10>)
+ 80009e6: f001 fc3a bl 800225e <HAL_TIM_IRQHandler>
+ /* USER CODE BEGIN TIM3_IRQn 1 */
+
+ /* USER CODE END TIM3_IRQn 1 */
+}
+ 80009ea: bf00 nop
+ 80009ec: bd80 pop {r7, pc}
+ 80009ee: bf00 nop
+ 80009f0: 20000048 .word 0x20000048
+
+080009f4 <USART6_IRQHandler>:
+
+/**
+ * @brief This function handles USART6 global interrupt.
+ */
+void USART6_IRQHandler(void)
+{
+ 80009f4: b580 push {r7, lr}
+ 80009f6: af00 add r7, sp, #0
+ /* USER CODE BEGIN USART6_IRQn 0 */
+
+ /* USER CODE END USART6_IRQn 0 */
+ HAL_UART_IRQHandler(&huart6);
+ 80009f8: 4802 ldr r0, [pc, #8] ; (8000a04 <USART6_IRQHandler+0x10>)
+ 80009fa: f002 f967 bl 8002ccc <HAL_UART_IRQHandler>
+ /* USER CODE BEGIN USART6_IRQn 1 */
+
+ /* USER CODE END USART6_IRQn 1 */
+}
+ 80009fe: bf00 nop
+ 8000a00: bd80 pop {r7, pc}
+ 8000a02: bf00 nop
+ 8000a04: 20000088 .word 0x20000088
-080008f8 <SystemInit>:
+08000a08 <SystemInit>:
* SystemFrequency variable.
* @param None
* @retval None
*/
void SystemInit(void)
{
- 80008f8: b480 push {r7}
- 80008fa: af00 add r7, sp, #0
+ 8000a08: b480 push {r7}
+ 8000a0a: af00 add r7, sp, #0
/* FPU settings ------------------------------------------------------------*/
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
- 80008fc: 4b15 ldr r3, [pc, #84] ; (8000954 <SystemInit+0x5c>)
- 80008fe: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88
- 8000902: 4a14 ldr r2, [pc, #80] ; (8000954 <SystemInit+0x5c>)
- 8000904: f443 0370 orr.w r3, r3, #15728640 ; 0xf00000
- 8000908: f8c2 3088 str.w r3, [r2, #136] ; 0x88
+ 8000a0c: 4b15 ldr r3, [pc, #84] ; (8000a64 <SystemInit+0x5c>)
+ 8000a0e: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88
+ 8000a12: 4a14 ldr r2, [pc, #80] ; (8000a64 <SystemInit+0x5c>)
+ 8000a14: f443 0370 orr.w r3, r3, #15728640 ; 0xf00000
+ 8000a18: f8c2 3088 str.w r3, [r2, #136] ; 0x88
#endif
/* Reset the RCC clock configuration to the default reset state ------------*/
/* Set HSION bit */
RCC->CR |= (uint32_t)0x00000001;
- 800090c: 4b12 ldr r3, [pc, #72] ; (8000958 <SystemInit+0x60>)
- 800090e: 681b ldr r3, [r3, #0]
- 8000910: 4a11 ldr r2, [pc, #68] ; (8000958 <SystemInit+0x60>)
- 8000912: f043 0301 orr.w r3, r3, #1
- 8000916: 6013 str r3, [r2, #0]
+ 8000a1c: 4b12 ldr r3, [pc, #72] ; (8000a68 <SystemInit+0x60>)
+ 8000a1e: 681b ldr r3, [r3, #0]
+ 8000a20: 4a11 ldr r2, [pc, #68] ; (8000a68 <SystemInit+0x60>)
+ 8000a22: f043 0301 orr.w r3, r3, #1
+ 8000a26: 6013 str r3, [r2, #0]
/* Reset CFGR register */
RCC->CFGR = 0x00000000;
- 8000918: 4b0f ldr r3, [pc, #60] ; (8000958 <SystemInit+0x60>)
- 800091a: 2200 movs r2, #0
- 800091c: 609a str r2, [r3, #8]
+ 8000a28: 4b0f ldr r3, [pc, #60] ; (8000a68 <SystemInit+0x60>)
+ 8000a2a: 2200 movs r2, #0
+ 8000a2c: 609a str r2, [r3, #8]
/* Reset HSEON, CSSON and PLLON bits */
RCC->CR &= (uint32_t)0xFEF6FFFF;
- 800091e: 4b0e ldr r3, [pc, #56] ; (8000958 <SystemInit+0x60>)
- 8000920: 681a ldr r2, [r3, #0]
- 8000922: 490d ldr r1, [pc, #52] ; (8000958 <SystemInit+0x60>)
- 8000924: 4b0d ldr r3, [pc, #52] ; (800095c <SystemInit+0x64>)
- 8000926: 4013 ands r3, r2
- 8000928: 600b str r3, [r1, #0]
+ 8000a2e: 4b0e ldr r3, [pc, #56] ; (8000a68 <SystemInit+0x60>)
+ 8000a30: 681a ldr r2, [r3, #0]
+ 8000a32: 490d ldr r1, [pc, #52] ; (8000a68 <SystemInit+0x60>)
+ 8000a34: 4b0d ldr r3, [pc, #52] ; (8000a6c <SystemInit+0x64>)
+ 8000a36: 4013 ands r3, r2
+ 8000a38: 600b str r3, [r1, #0]
/* Reset PLLCFGR register */
RCC->PLLCFGR = 0x24003010;
- 800092a: 4b0b ldr r3, [pc, #44] ; (8000958 <SystemInit+0x60>)
- 800092c: 4a0c ldr r2, [pc, #48] ; (8000960 <SystemInit+0x68>)
- 800092e: 605a str r2, [r3, #4]
+ 8000a3a: 4b0b ldr r3, [pc, #44] ; (8000a68 <SystemInit+0x60>)
+ 8000a3c: 4a0c ldr r2, [pc, #48] ; (8000a70 <SystemInit+0x68>)
+ 8000a3e: 605a str r2, [r3, #4]
/* Reset HSEBYP bit */
RCC->CR &= (uint32_t)0xFFFBFFFF;
- 8000930: 4b09 ldr r3, [pc, #36] ; (8000958 <SystemInit+0x60>)
- 8000932: 681b ldr r3, [r3, #0]
- 8000934: 4a08 ldr r2, [pc, #32] ; (8000958 <SystemInit+0x60>)
- 8000936: f423 2380 bic.w r3, r3, #262144 ; 0x40000
- 800093a: 6013 str r3, [r2, #0]
+ 8000a40: 4b09 ldr r3, [pc, #36] ; (8000a68 <SystemInit+0x60>)
+ 8000a42: 681b ldr r3, [r3, #0]
+ 8000a44: 4a08 ldr r2, [pc, #32] ; (8000a68 <SystemInit+0x60>)
+ 8000a46: f423 2380 bic.w r3, r3, #262144 ; 0x40000
+ 8000a4a: 6013 str r3, [r2, #0]
/* Disable all interrupts */
RCC->CIR = 0x00000000;
- 800093c: 4b06 ldr r3, [pc, #24] ; (8000958 <SystemInit+0x60>)
- 800093e: 2200 movs r2, #0
- 8000940: 60da str r2, [r3, #12]
+ 8000a4c: 4b06 ldr r3, [pc, #24] ; (8000a68 <SystemInit+0x60>)
+ 8000a4e: 2200 movs r2, #0
+ 8000a50: 60da str r2, [r3, #12]
/* Configure the Vector Table location add offset address ------------------*/
#ifdef VECT_TAB_SRAM
SCB->VTOR = RAMDTCM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
#else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
- 8000942: 4b04 ldr r3, [pc, #16] ; (8000954 <SystemInit+0x5c>)
- 8000944: f04f 6200 mov.w r2, #134217728 ; 0x8000000
- 8000948: 609a str r2, [r3, #8]
+ 8000a52: 4b04 ldr r3, [pc, #16] ; (8000a64 <SystemInit+0x5c>)
+ 8000a54: f04f 6200 mov.w r2, #134217728 ; 0x8000000
+ 8000a58: 609a str r2, [r3, #8]
#endif
}
- 800094a: bf00 nop
- 800094c: 46bd mov sp, r7
- 800094e: f85d 7b04 ldr.w r7, [sp], #4
- 8000952: 4770 bx lr
- 8000954: e000ed00 .word 0xe000ed00
- 8000958: 40023800 .word 0x40023800
- 800095c: fef6ffff .word 0xfef6ffff
- 8000960: 24003010 .word 0x24003010
+ 8000a5a: bf00 nop
+ 8000a5c: 46bd mov sp, r7
+ 8000a5e: f85d 7b04 ldr.w r7, [sp], #4
+ 8000a62: 4770 bx lr
+ 8000a64: e000ed00 .word 0xe000ed00
+ 8000a68: 40023800 .word 0x40023800
+ 8000a6c: fef6ffff .word 0xfef6ffff
+ 8000a70: 24003010 .word 0x24003010
-08000964 <Reset_Handler>:
+08000a74 <Reset_Handler>:
.section .text.Reset_Handler
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
ldr sp, =_estack /* set stack pointer */
- 8000964: f8df d034 ldr.w sp, [pc, #52] ; 800099c <LoopFillZerobss+0x14>
+ 8000a74: f8df d034 ldr.w sp, [pc, #52] ; 8000aac <LoopFillZerobss+0x14>
/* Copy the data segment initializers from flash to SRAM */
movs r1, #0
- 8000968: 2100 movs r1, #0
+ 8000a78: 2100 movs r1, #0
b LoopCopyDataInit
- 800096a: e003 b.n 8000974 <LoopCopyDataInit>
+ 8000a7a: e003 b.n 8000a84 <LoopCopyDataInit>
-0800096c <CopyDataInit>:
+08000a7c <CopyDataInit>:
CopyDataInit:
ldr r3, =_sidata
- 800096c: 4b0c ldr r3, [pc, #48] ; (80009a0 <LoopFillZerobss+0x18>)
+ 8000a7c: 4b0c ldr r3, [pc, #48] ; (8000ab0 <LoopFillZerobss+0x18>)
ldr r3, [r3, r1]
- 800096e: 585b ldr r3, [r3, r1]
+ 8000a7e: 585b ldr r3, [r3, r1]
str r3, [r0, r1]
- 8000970: 5043 str r3, [r0, r1]
+ 8000a80: 5043 str r3, [r0, r1]
adds r1, r1, #4
- 8000972: 3104 adds r1, #4
+ 8000a82: 3104 adds r1, #4
-08000974 <LoopCopyDataInit>:
+08000a84 <LoopCopyDataInit>:
LoopCopyDataInit:
ldr r0, =_sdata
- 8000974: 480b ldr r0, [pc, #44] ; (80009a4 <LoopFillZerobss+0x1c>)
+ 8000a84: 480b ldr r0, [pc, #44] ; (8000ab4 <LoopFillZerobss+0x1c>)
ldr r3, =_edata
- 8000976: 4b0c ldr r3, [pc, #48] ; (80009a8 <LoopFillZerobss+0x20>)
+ 8000a86: 4b0c ldr r3, [pc, #48] ; (8000ab8 <LoopFillZerobss+0x20>)
adds r2, r0, r1
- 8000978: 1842 adds r2, r0, r1
+ 8000a88: 1842 adds r2, r0, r1
cmp r2, r3
- 800097a: 429a cmp r2, r3
+ 8000a8a: 429a cmp r2, r3
bcc CopyDataInit
- 800097c: d3f6 bcc.n 800096c <CopyDataInit>
+ 8000a8c: d3f6 bcc.n 8000a7c <CopyDataInit>
ldr r2, =_sbss
- 800097e: 4a0b ldr r2, [pc, #44] ; (80009ac <LoopFillZerobss+0x24>)
+ 8000a8e: 4a0b ldr r2, [pc, #44] ; (8000abc <LoopFillZerobss+0x24>)
b LoopFillZerobss
- 8000980: e002 b.n 8000988 <LoopFillZerobss>
+ 8000a90: e002 b.n 8000a98 <LoopFillZerobss>
-08000982 <FillZerobss>:
+08000a92 <FillZerobss>:
/* Zero fill the bss segment. */
FillZerobss:
movs r3, #0
- 8000982: 2300 movs r3, #0
+ 8000a92: 2300 movs r3, #0
str r3, [r2], #4
- 8000984: f842 3b04 str.w r3, [r2], #4
+ 8000a94: f842 3b04 str.w r3, [r2], #4
-08000988 <LoopFillZerobss>:
+08000a98 <LoopFillZerobss>:
LoopFillZerobss:
ldr r3, = _ebss
- 8000988: 4b09 ldr r3, [pc, #36] ; (80009b0 <LoopFillZerobss+0x28>)
+ 8000a98: 4b09 ldr r3, [pc, #36] ; (8000ac0 <LoopFillZerobss+0x28>)
cmp r2, r3
- 800098a: 429a cmp r2, r3
+ 8000a9a: 429a cmp r2, r3
bcc FillZerobss
- 800098c: d3f9 bcc.n 8000982 <FillZerobss>
+ 8000a9c: d3f9 bcc.n 8000a92 <FillZerobss>
/* Call the clock system initialization function.*/
bl SystemInit
- 800098e: f7ff ffb3 bl 80008f8 <SystemInit>
+ 8000a9e: f7ff ffb3 bl 8000a08 <SystemInit>
/* Call static constructors */
bl __libc_init_array
- 8000992: f002 f823 bl 80029dc <__libc_init_array>
+ 8000aa2: f002 feeb bl 800387c <__libc_init_array>
/* Call the application's entry point.*/
bl main
- 8000996: f7ff fdcf bl 8000538 <main>
+ 8000aa6: f7ff fd47 bl 8000538 <main>
bx lr
- 800099a: 4770 bx lr
+ 8000aaa: 4770 bx lr
ldr sp, =_estack /* set stack pointer */
- 800099c: 20080000 .word 0x20080000
+ 8000aac: 20080000 .word 0x20080000
ldr r3, =_sidata
- 80009a0: 08002a84 .word 0x08002a84
+ 8000ab0: 08003914 .word 0x08003914
ldr r0, =_sdata
- 80009a4: 20000000 .word 0x20000000
+ 8000ab4: 20000000 .word 0x20000000
ldr r3, =_edata
- 80009a8: 2000000c .word 0x2000000c
+ 8000ab8: 2000000c .word 0x2000000c
ldr r2, =_sbss
- 80009ac: 2000000c .word 0x2000000c
+ 8000abc: 2000000c .word 0x2000000c
ldr r3, = _ebss
- 80009b0: 200000ac .word 0x200000ac
+ 8000ac0: 2000010c .word 0x2000010c
-08000
9b4 <ADC_IRQHandler>:
+08000
ac4 <ADC_IRQHandler>:
* @retval None
*/
.section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
b Infinite_Loop
- 8000
9b4: e7fe b.n 80009b4 <ADC_IRQHandler>
+ 8000
ac4: e7fe b.n 8000ac4 <ADC_IRQHandler>
-080009b6 <HAL_Init>:
+08000ac6 <HAL_Init>:
* need to ensure that the SysTick time base is always set to 1 millisecond
* to have correct HAL operation.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_Init(void)
{
- 80009b6: b580 push {r7, lr}
- 80009b8: af00 add r7, sp, #0
+ 8000ac6: b580 push {r7, lr}
+ 8000ac8: af00 add r7, sp, #0
#if (PREFETCH_ENABLE != 0U)
__HAL_FLASH_PREFETCH_BUFFER_ENABLE();
#endif /* PREFETCH_ENABLE */
/* Set Interrupt Group Priority */
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
- 80009ba: 2003 movs r0, #3
- 80009bc: f000 f92c bl 8000c18 <HAL_NVIC_SetPriorityGrouping>
+ 8000aca: 2003 movs r0, #3
+ 8000acc: f000 f928 bl 8000d20 <HAL_NVIC_SetPriorityGrouping>
/* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
HAL_InitTick(TICK_INT_PRIORITY);
- 80009c0: 2000 movs r0, #0
- 80009c2: f000 f805 bl 80009d0 <HAL_InitTick>
+ 8000ad0: 2000 movs r0, #0
+ 8000ad2: f000 f805 bl 8000ae0 <HAL_InitTick>
/* Init the low level hardware */
HAL_MspInit();
- 80009c6: f7ff fee3 bl 8000790 <HAL_MspInit>
+ 8000ad6: f7ff febf bl 8000858 <HAL_MspInit>
/* Return function status */
return HAL_OK;
- 80009ca: 2300 movs r3, #0
+ 8000ada: 2300 movs r3, #0
}
- 80009cc: 4618 mov r0, r3
- 80009ce: bd80 pop {r7, pc}
+ 8000adc: 4618 mov r0, r3
+ 8000ade: bd80 pop {r7, pc}
-080009d0 <HAL_InitTick>:
+08000ae0 <HAL_InitTick>:
* implementation in user file.
* @param TickPriority Tick interrupt priority.
* @retval HAL status
*/
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{
- 80009d0: b580 push {r7, lr}
- 80009d2: b082 sub sp, #8
- 80009d4: af00 add r7, sp, #0
- 80009d6: 6078 str r0, [r7, #4]
+ 8000ae0: b580 push {r7, lr}
+ 8000ae2: b082 sub sp, #8
+ 8000ae4: af00 add r7, sp, #0
+ 8000ae6: 6078 str r0, [r7, #4]
/* Configure the SysTick to have interrupt in 1ms time basis*/
if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
- 80009d8: 4b12 ldr r3, [pc, #72] ; (8000a24 <HAL_InitTick+0x54>)
- 80009da: 681a ldr r2, [r3, #0]
- 80009dc: 4b12 ldr r3, [pc, #72] ; (8000a28 <HAL_InitTick+0x58>)
- 80009de: 781b ldrb r3, [r3, #0]
- 80009e0: 4619 mov r1, r3
- 80009e2: f44f 737a mov.w r3, #1000 ; 0x3e8
- 80009e6: fbb3 f3f1 udiv r3, r3, r1
- 80009ea: fbb2 f3f3 udiv r3, r2, r3
- 80009ee: 4618 mov r0, r3
- 80009f0: f000 f939 bl 8000c66 <HAL_SYSTICK_Config>
- 80009f4: 4603 mov r3, r0
- 80009f6: 2b00 cmp r3, #0
- 80009f8: d001 beq.n 80009fe <HAL_InitTick+0x2e>
+ 8000ae8: 4b12 ldr r3, [pc, #72] ; (8000b34 <HAL_InitTick+0x54>)
+ 8000aea: 681a ldr r2, [r3, #0]
+ 8000aec: 4b12 ldr r3, [pc, #72] ; (8000b38 <HAL_InitTick+0x58>)
+ 8000aee: 781b ldrb r3, [r3, #0]
+ 8000af0: 4619 mov r1, r3
+ 8000af2: f44f 737a mov.w r3, #1000 ; 0x3e8
+ 8000af6: fbb3 f3f1 udiv r3, r3, r1
+ 8000afa: fbb2 f3f3 udiv r3, r2, r3
+ 8000afe: 4618 mov r0, r3
+ 8000b00: f000 f943 bl 8000d8a <HAL_SYSTICK_Config>
+ 8000b04: 4603 mov r3, r0
+ 8000b06: 2b00 cmp r3, #0
+ 8000b08: d001 beq.n 8000b0e <HAL_InitTick+0x2e>
{
return HAL_ERROR;
- 80009fa: 2301 movs r3, #1
- 80009fc: e00e b.n 8000a1c <HAL_InitTick+0x4c>
+ 8000b0a: 2301 movs r3, #1
+ 8000b0c: e00e b.n 8000b2c <HAL_InitTick+0x4c>
}
/* Configure the SysTick IRQ priority */
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
- 80009fe: 687b ldr r3, [r7, #4]
- 8000a00: 2b0f cmp r3, #15
- 8000a02: d80a bhi.n 8000a1a <HAL_InitTick+0x4a>
+ 8000b0e: 687b ldr r3, [r7, #4]
+ 8000b10: 2b0f cmp r3, #15
+ 8000b12: d80a bhi.n 8000b2a <HAL_InitTick+0x4a>
{
HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
- 8000a04: 2200 movs r2, #0
- 8000a06: 6879 ldr r1, [r7, #4]
- 8000a08: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
- 8000a0c: f000 f90f bl 8000c2e <HAL_NVIC_SetPriority>
+ 8000b14: 2200 movs r2, #0
+ 8000b16: 6879 ldr r1, [r7, #4]
+ 8000b18: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
+ 8000b1c: f000 f90b bl 8000d36 <HAL_NVIC_SetPriority>
uwTickPrio = TickPriority;
- 8000a10: 4a06 ldr r2, [pc, #24] ; (8000a2c <HAL_InitTick+0x5c>)
- 8000a12: 687b ldr r3, [r7, #4]
- 8000a14: 6013 str r3, [r2, #0]
+ 8000b20: 4a06 ldr r2, [pc, #24] ; (8000b3c <HAL_InitTick+0x5c>)
+ 8000b22: 687b ldr r3, [r7, #4]
+ 8000b24: 6013 str r3, [r2, #0]
{
return HAL_ERROR;
}
/* Return function status */
return HAL_OK;
- 8000a16: 2300 movs r3, #0
- 8000a18: e000 b.n 8000a1c <HAL_InitTick+0x4c>
+ 8000b26: 2300 movs r3, #0
+ 8000b28: e000 b.n 8000b2c <HAL_InitTick+0x4c>
return HAL_ERROR;
- 8000a1a: 2301 movs r3, #1
+ 8000b2a: 2301 movs r3, #1
}
- 8000a1c: 4618 mov r0, r3
- 8000a1e: 3708 adds r7, #8
- 8000a20: 46bd mov sp, r7
- 8000a22: bd80 pop {r7, pc}
- 8000a24: 20000000 .word 0x20000000
- 8000a28: 20000008 .word 0x20000008
- 8000a2c: 20000004 .word 0x20000004
-
-08000a30 <HAL_IncTick>:
+ 8000b2c: 4618 mov r0, r3
+ 8000b2e: 3708 adds r7, #8
+ 8000b30: 46bd mov sp, r7
+ 8000b32: bd80 pop {r7, pc}
+ 8000b34: 20000000 .word 0x20000000
+ 8000b38: 20000008 .word 0x20000008
+ 8000b3c: 20000004 .word 0x20000004
+
+08000b40 <HAL_IncTick>:
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval None
*/
__weak void HAL_IncTick(void)
{
- 8000a30: b480 push {r7}
- 8000a32: af00 add r7, sp, #0
+ 8000b40: b480 push {r7}
+ 8000b42: af00 add r7, sp, #0
uwTick += uwTickFreq;
- 8000a34: 4b06 ldr r3, [pc, #24] ; (8000a50 <HAL_IncTick+0x20>)
- 8000a36: 781b ldrb r3, [r3, #0]
- 8000a38: 461a mov r2, r3
- 8000a3a: 4b06 ldr r3, [pc, #24] ; (8000a54 <HAL_IncTick+0x24>)
- 8000a3c: 681b ldr r3, [r3, #0]
- 8000a3e: 4413 add r3, r2
- 8000a40: 4a04 ldr r2, [pc, #16] ; (8000a54 <HAL_IncTick+0x24>)
- 8000a42: 6013 str r3, [r2, #0]
+ 8000b44: 4b06 ldr r3, [pc, #24] ; (8000b60 <HAL_IncTick+0x20>)
+ 8000b46: 781b ldrb r3, [r3, #0]
+ 8000b48: 461a mov r2, r3
+ 8000b4a: 4b06 ldr r3, [pc, #24] ; (8000b64 <HAL_IncTick+0x24>)
+ 8000b4c: 681b ldr r3, [r3, #0]
+ 8000b4e: 4413 add r3, r2
+ 8000b50: 4a04 ldr r2, [pc, #16] ; (8000b64 <HAL_IncTick+0x24>)
+ 8000b52: 6013 str r3, [r2, #0]
}
- 8000a44: bf00 nop
- 8000a46: 46bd mov sp, r7
- 8000a48: f85d 7b04 ldr.w r7, [sp], #4
- 8000a4c: 4770 bx lr
- 8000a4e: bf00 nop
- 8000a50: 20000008 .word 0x20000008
- 8000a54: 200000a8 .word 0x200000a8
-
-08000a58 <HAL_GetTick>:
+ 8000b54: bf00 nop
+ 8000b56: 46bd mov sp, r7
+ 8000b58: f85d 7b04 ldr.w r7, [sp], #4
+ 8000b5c: 4770 bx lr
+ 8000b5e: bf00 nop
+ 8000b60: 20000008 .word 0x20000008
+ 8000b64: 20000108 .word 0x20000108
+
+08000b68 <HAL_GetTick>:
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval tick value
*/
__weak uint32_t HAL_GetTick(void)
{
- 8000a58: b480 push {r7}
- 8000a5a: af00 add r7, sp, #0
+ 8000b68: b480 push {r7}
+ 8000b6a: af00 add r7, sp, #0
return uwTick;
- 8000a5c: 4b03 ldr r3, [pc, #12] ; (8000a6c <HAL_GetTick+0x14>)
- 8000a5e: 681b ldr r3, [r3, #0]
-}
- 8000a60: 4618 mov r0, r3
- 8000a62: 46bd mov sp, r7
- 8000a64: f85d 7b04 ldr.w r7, [sp], #4
- 8000a68: 4770 bx lr
- 8000a6a: bf00 nop
- 8000a6c: 200000a8 .word 0x200000a8
-
-08000a70 <HAL_Delay>:
- * implementations in user file.
- * @param Delay specifies the delay time length, in milliseconds.
- * @retval None
- */
-__weak void HAL_Delay(uint32_t Delay)
-{
- 8000a70: b580 push {r7, lr}
- 8000a72: b084 sub sp, #16
- 8000a74: af00 add r7, sp, #0
- 8000a76: 6078 str r0, [r7, #4]
- uint32_t tickstart = HAL_GetTick();
- 8000a78: f7ff ffee bl 8000a58 <HAL_GetTick>
- 8000a7c: 60b8 str r0, [r7, #8]
- uint32_t wait = Delay;
- 8000a7e: 687b ldr r3, [r7, #4]
- 8000a80: 60fb str r3, [r7, #12]
-
- /* Add a freq to guarantee minimum wait */
- if (wait < HAL_MAX_DELAY)
- 8000a82: 68fb ldr r3, [r7, #12]
- 8000a84: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff
- 8000a88: d005 beq.n 8000a96 <HAL_Delay+0x26>
- {
- wait += (uint32_t)(uwTickFreq);
- 8000a8a: 4b09 ldr r3, [pc, #36] ; (8000ab0 <HAL_Delay+0x40>)
- 8000a8c: 781b ldrb r3, [r3, #0]
- 8000a8e: 461a mov r2, r3
- 8000a90: 68fb ldr r3, [r7, #12]
- 8000a92: 4413 add r3, r2
- 8000a94: 60fb str r3, [r7, #12]
- }
-
- while ((HAL_GetTick() - tickstart) < wait)
- 8000a96: bf00 nop
- 8000a98: f7ff ffde bl 8000a58 <HAL_GetTick>
- 8000a9c: 4602 mov r2, r0
- 8000a9e: 68bb ldr r3, [r7, #8]
- 8000aa0: 1ad3 subs r3, r2, r3
- 8000aa2: 68fa ldr r2, [r7, #12]
- 8000aa4: 429a cmp r2, r3
- 8000aa6: d8f7 bhi.n 8000a98 <HAL_Delay+0x28>
- {
- }
+ 8000b6c: 4b03 ldr r3, [pc, #12] ; (8000b7c <HAL_GetTick+0x14>)
+ 8000b6e: 681b ldr r3, [r3, #0]
}
- 8000aa8: bf00 nop
- 8000aaa: 3710 adds r7, #16
- 8000aac: 46bd mov sp, r7
- 8000aae: bd80 pop {r7, pc}
- 8000ab0: 20000008 .word 0x20000008
-
-08000ab4 <__NVIC_SetPriorityGrouping>:
+ 8000b70: 4618 mov r0, r3
+ 8000b72: 46bd mov sp, r7
+ 8000b74: f85d 7b04 ldr.w r7, [sp], #4
+ 8000b78: 4770 bx lr
+ 8000b7a: bf00 nop
+ 8000b7c: 20000108 .word 0x20000108
+
+08000b80 <__NVIC_SetPriorityGrouping>:
In case of a conflict between priority grouping and available
priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
\param [in] PriorityGroup Priority grouping field.
*/
__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
- 8000ab4: b480 push {r7}
- 8000ab6: b085 sub sp, #20
- 8000ab8: af00 add r7, sp, #0
- 8000aba: 6078 str r0, [r7, #4]
+ 8000b80: b480 push {r7}
+ 8000b82: b085 sub sp, #20
+ 8000b84: af00 add r7, sp, #0
+ 8000b86: 6078 str r0, [r7, #4]
uint32_t reg_value;
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
- 8000abc: 687b ldr r3, [r7, #4]
- 8000abe: f003 0307 and.w r3, r3, #7
- 8000ac2: 60fb str r3, [r7, #12]
+ 8000b88: 687b ldr r3, [r7, #4]
+ 8000b8a: f003 0307 and.w r3, r3, #7
+ 8000b8e: 60fb str r3, [r7, #12]
reg_value = SCB->AIRCR; /* read old register configuration */
- 8000ac4: 4b0b ldr r3, [pc, #44] ; (8000af4 <__NVIC_SetPriorityGrouping+0x40>)
- 8000ac6: 68db ldr r3, [r3, #12]
- 8000ac8: 60bb str r3, [r7, #8]
+ 8000b90: 4b0b ldr r3, [pc, #44] ; (8000bc0 <__NVIC_SetPriorityGrouping+0x40>)
+ 8000b92: 68db ldr r3, [r3, #12]
+ 8000b94: 60bb str r3, [r7, #8]
reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
- 8000aca: 68ba ldr r2, [r7, #8]
- 8000acc: f64f 03ff movw r3, #63743 ; 0xf8ff
- 8000ad0: 4013 ands r3, r2
- 8000ad2: 60bb str r3, [r7, #8]
+ 8000b96: 68ba ldr r2, [r7, #8]
+ 8000b98: f64f 03ff movw r3, #63743 ; 0xf8ff
+ 8000b9c: 4013 ands r3, r2
+ 8000b9e: 60bb str r3, [r7, #8]
reg_value = (reg_value |
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
(PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */
- 8000ad4: 68fb ldr r3, [r7, #12]
- 8000ad6: 021a lsls r2, r3, #8
+ 8000ba0: 68fb ldr r3, [r7, #12]
+ 8000ba2: 021a lsls r2, r3, #8
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
- 8000ad8: 68bb ldr r3, [r7, #8]
- 8000ada: 431a orrs r2, r3
+ 8000ba4: 68bb ldr r3, [r7, #8]
+ 8000ba6: 431a orrs r2, r3
reg_value = (reg_value |
- 8000adc: 4b06 ldr r3, [pc, #24] ; (8000af8 <__NVIC_SetPriorityGrouping+0x44>)
- 8000ade: 4313 orrs r3, r2
- 8000ae0: 60bb str r3, [r7, #8]
+ 8000ba8: 4b06 ldr r3, [pc, #24] ; (8000bc4 <__NVIC_SetPriorityGrouping+0x44>)
+ 8000baa: 4313 orrs r3, r2
+ 8000bac: 60bb str r3, [r7, #8]
SCB->AIRCR = reg_value;
- 8000ae2: 4a04 ldr r2, [pc, #16] ; (8000af4 <__NVIC_SetPriorityGrouping+0x40>)
- 8000ae4: 68bb ldr r3, [r7, #8]
- 8000ae6: 60d3 str r3, [r2, #12]
+ 8000bae: 4a04 ldr r2, [pc, #16] ; (8000bc0 <__NVIC_SetPriorityGrouping+0x40>)
+ 8000bb0: 68bb ldr r3, [r7, #8]
+ 8000bb2: 60d3 str r3, [r2, #12]
}
- 8000ae8: bf00 nop
- 8000aea: 3714 adds r7, #20
- 8000aec: 46bd mov sp, r7
- 8000aee: f85d 7b04 ldr.w r7, [sp], #4
- 8000af2: 4770 bx lr
- 8000af4: e000ed00 .word 0xe000ed00
- 8000af8: 05fa0000 .word 0x05fa0000
-
-08000afc <__NVIC_GetPriorityGrouping>:
+ 8000bb4: bf00 nop
+ 8000bb6: 3714 adds r7, #20
+ 8000bb8: 46bd mov sp, r7
+ 8000bba: f85d 7b04 ldr.w r7, [sp], #4
+ 8000bbe: 4770 bx lr
+ 8000bc0: e000ed00 .word 0xe000ed00
+ 8000bc4: 05fa0000 .word 0x05fa0000
+
+08000bc8 <__NVIC_GetPriorityGrouping>:
\brief Get Priority Grouping
\details Reads the priority grouping field from the NVIC Interrupt Controller.
\return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
*/
__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
{
- 8000afc: b480 push {r7}
- 8000afe: af00 add r7, sp, #0
+ 8000bc8: b480 push {r7}
+ 8000bca: af00 add r7, sp, #0
return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
- 8000b00: 4b04 ldr r3, [pc, #16] ; (8000b14 <__NVIC_GetPriorityGrouping+0x18>)
- 8000b02: 68db ldr r3, [r3, #12]
- 8000b04: 0a1b lsrs r3, r3, #8
- 8000b06: f003 0307 and.w r3, r3, #7
+ 8000bcc: 4b04 ldr r3, [pc, #16] ; (8000be0 <__NVIC_GetPriorityGrouping+0x18>)
+ 8000bce: 68db ldr r3, [r3, #12]
+ 8000bd0: 0a1b lsrs r3, r3, #8
+ 8000bd2: f003 0307 and.w r3, r3, #7
}
- 8000b0a: 4618 mov r0, r3
- 8000b0c: 46bd mov sp, r7
- 8000b0e: f85d 7b04 ldr.w r7, [sp], #4
- 8000b12: 4770 bx lr
- 8000b14: e000ed00 .word 0xe000ed00
-
-08000b18 <__NVIC_SetPriority>:
+ 8000bd6: 4618 mov r0, r3
+ 8000bd8: 46bd mov sp, r7
+ 8000bda: f85d 7b04 ldr.w r7, [sp], #4
+ 8000bde: 4770 bx lr
+ 8000be0: e000ed00 .word 0xe000ed00
+
+08000be4 <__NVIC_EnableIRQ>:
+ \details Enables a device specific interrupt in the NVIC interrupt controller.
+ \param [in] IRQn Device specific interrupt number.
+ \note IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+ 8000be4: b480 push {r7}
+ 8000be6: b083 sub sp, #12
+ 8000be8: af00 add r7, sp, #0
+ 8000bea: 4603 mov r3, r0
+ 8000bec: 71fb strb r3, [r7, #7]
+ if ((int32_t)(IRQn) >= 0)
+ 8000bee: f997 3007 ldrsb.w r3, [r7, #7]
+ 8000bf2: 2b00 cmp r3, #0
+ 8000bf4: db0b blt.n 8000c0e <__NVIC_EnableIRQ+0x2a>
+ {
+ NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+ 8000bf6: 79fb ldrb r3, [r7, #7]
+ 8000bf8: f003 021f and.w r2, r3, #31
+ 8000bfc: 4907 ldr r1, [pc, #28] ; (8000c1c <__NVIC_EnableIRQ+0x38>)
+ 8000bfe: f997 3007 ldrsb.w r3, [r7, #7]
+ 8000c02: 095b lsrs r3, r3, #5
+ 8000c04: 2001 movs r0, #1
+ 8000c06: fa00 f202 lsl.w r2, r0, r2
+ 8000c0a: f841 2023 str.w r2, [r1, r3, lsl #2]
+ }
+}
+ 8000c0e: bf00 nop
+ 8000c10: 370c adds r7, #12
+ 8000c12: 46bd mov sp, r7
+ 8000c14: f85d 7b04 ldr.w r7, [sp], #4
+ 8000c18: 4770 bx lr
+ 8000c1a: bf00 nop
+ 8000c1c: e000e100 .word 0xe000e100
+
+08000c20 <__NVIC_SetPriority>:
\param [in] IRQn Interrupt number.
\param [in] priority Priority to set.
\note The priority cannot be set for every processor exception.
*/
__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
{
- 8000b18: b480 push {r7}
- 8000b1a: b083 sub sp, #12
- 8000b1c: af00 add r7, sp, #0
- 8000b1e: 4603 mov r3, r0
- 8000b20: 6039 str r1, [r7, #0]
- 8000b22: 71fb strb r3, [r7, #7]
+ 8000c20: b480 push {r7}
+ 8000c22: b083 sub sp, #12
+ 8000c24: af00 add r7, sp, #0
+ 8000c26: 4603 mov r3, r0
+ 8000c28: 6039 str r1, [r7, #0]
+ 8000c2a: 71fb strb r3, [r7, #7]
if ((int32_t)(IRQn) >= 0)
- 8000b24: f997 3007 ldrsb.w r3, [r7, #7]
- 8000b28: 2b00 cmp r3, #0
- 8000b2a: db0a blt.n 8000b42 <__NVIC_SetPriority+0x2a>
+ 8000c2c: f997 3007 ldrsb.w r3, [r7, #7]
+ 8000c30: 2b00 cmp r3, #0
+ 8000c32: db0a blt.n 8000c4a <__NVIC_SetPriority+0x2a>
{
NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
- 8000b2c: 683b ldr r3, [r7, #0]
- 8000b2e: b2da uxtb r2, r3
- 8000b30: 490c ldr r1, [pc, #48] ; (8000b64 <__NVIC_SetPriority+0x4c>)
- 8000b32: f997 3007 ldrsb.w r3, [r7, #7]
- 8000b36: 0112 lsls r2, r2, #4
- 8000b38: b2d2 uxtb r2, r2
- 8000b3a: 440b add r3, r1
- 8000b3c: f883 2300 strb.w r2, [r3, #768] ; 0x300
+ 8000c34: 683b ldr r3, [r7, #0]
+ 8000c36: b2da uxtb r2, r3
+ 8000c38: 490c ldr r1, [pc, #48] ; (8000c6c <__NVIC_SetPriority+0x4c>)
+ 8000c3a: f997 3007 ldrsb.w r3, [r7, #7]
+ 8000c3e: 0112 lsls r2, r2, #4
+ 8000c40: b2d2 uxtb r2, r2
+ 8000c42: 440b add r3, r1
+ 8000c44: f883 2300 strb.w r2, [r3, #768] ; 0x300
}
else
{
SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
}
}
- 8000b40: e00a b.n 8000b58 <__NVIC_SetPriority+0x40>
+ 8000c48: e00a b.n 8000c60 <__NVIC_SetPriority+0x40>
SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
- 8000b42: 683b ldr r3, [r7, #0]
- 8000b44: b2da uxtb r2, r3
- 8000b46: 4908 ldr r1, [pc, #32] ; (8000b68 <__NVIC_SetPriority+0x50>)
- 8000b48: 79fb ldrb r3, [r7, #7]
- 8000b4a: f003 030f and.w r3, r3, #15
- 8000b4e: 3b04 subs r3, #4
- 8000b50: 0112 lsls r2, r2, #4
- 8000b52: b2d2 uxtb r2, r2
- 8000b54: 440b add r3, r1
- 8000b56: 761a strb r2, [r3, #24]
+ 8000c4a: 683b ldr r3, [r7, #0]
+ 8000c4c: b2da uxtb r2, r3
+ 8000c4e: 4908 ldr r1, [pc, #32] ; (8000c70 <__NVIC_SetPriority+0x50>)
+ 8000c50: 79fb ldrb r3, [r7, #7]
+ 8000c52: f003 030f and.w r3, r3, #15
+ 8000c56: 3b04 subs r3, #4
+ 8000c58: 0112 lsls r2, r2, #4
+ 8000c5a: b2d2 uxtb r2, r2
+ 8000c5c: 440b add r3, r1
+ 8000c5e: 761a strb r2, [r3, #24]
}
- 8000b58: bf00 nop
- 8000b5a: 370c adds r7, #12
- 8000b5c: 46bd mov sp, r7
- 8000b5e: f85d 7b04 ldr.w r7, [sp], #4
- 8000b62: 4770 bx lr
- 8000b64: e000e100 .word 0xe000e100
- 8000b68: e000ed00 .word 0xe000ed00
-
-08000b6c <NVIC_EncodePriority>:
+ 8000c60: bf00 nop
+ 8000c62: 370c adds r7, #12
+ 8000c64: 46bd mov sp, r7
+ 8000c66: f85d 7b04 ldr.w r7, [sp], #4
+ 8000c6a: 4770 bx lr
+ 8000c6c: e000e100 .word 0xe000e100
+ 8000c70: e000ed00 .word 0xe000ed00
+
+08000c74 <NVIC_EncodePriority>:
\param [in] PreemptPriority Preemptive priority value (starting from 0).
\param [in] SubPriority Subpriority value (starting from 0).
\return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
*/
__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
{
- 8000b6c: b480 push {r7}
- 8000b6e: b089 sub sp, #36 ; 0x24
- 8000b70: af00 add r7, sp, #0
- 8000b72: 60f8 str r0, [r7, #12]
- 8000b74: 60b9 str r1, [r7, #8]
- 8000b76: 607a str r2, [r7, #4]
+ 8000c74: b480 push {r7}
+ 8000c76: b089 sub sp, #36 ; 0x24
+ 8000c78: af00 add r7, sp, #0
+ 8000c7a: 60f8 str r0, [r7, #12]
+ 8000c7c: 60b9 str r1, [r7, #8]
+ 8000c7e: 607a str r2, [r7, #4]
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
- 8000b78: 68fb ldr r3, [r7, #12]
- 8000b7a: f003 0307 and.w r3, r3, #7
- 8000b7e: 61fb str r3, [r7, #28]
+ 8000c80: 68fb ldr r3, [r7, #12]
+ 8000c82: f003 0307 and.w r3, r3, #7
+ 8000c86: 61fb str r3, [r7, #28]
uint32_t PreemptPriorityBits;
uint32_t SubPriorityBits;
PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
- 8000b80: 69fb ldr r3, [r7, #28]
- 8000b82: f1c3 0307 rsb r3, r3, #7
- 8000b86: 2b04 cmp r3, #4
- 8000b88: bf28 it cs
- 8000b8a: 2304 movcs r3, #4
- 8000b8c: 61bb str r3, [r7, #24]
+ 8000c88: 69fb ldr r3, [r7, #28]
+ 8000c8a: f1c3 0307 rsb r3, r3, #7
+ 8000c8e: 2b04 cmp r3, #4
+ 8000c90: bf28 it cs
+ 8000c92: 2304 movcs r3, #4
+ 8000c94: 61bb str r3, [r7, #24]
SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
- 8000b8e: 69fb ldr r3, [r7, #28]
- 8000b90: 3304 adds r3, #4
- 8000b92: 2b06 cmp r3, #6
- 8000b94: d902 bls.n 8000b9c <NVIC_EncodePriority+0x30>
- 8000b96: 69fb ldr r3, [r7, #28]
- 8000b98: 3b03 subs r3, #3
- 8000b9a: e000 b.n 8000b9e <NVIC_EncodePriority+0x32>
- 8000b9c: 2300 movs r3, #0
- 8000b9e: 617b str r3, [r7, #20]
+ 8000c96: 69fb ldr r3, [r7, #28]
+ 8000c98: 3304 adds r3, #4
+ 8000c9a: 2b06 cmp r3, #6
+ 8000c9c: d902 bls.n 8000ca4 <NVIC_EncodePriority+0x30>
+ 8000c9e: 69fb ldr r3, [r7, #28]
+ 8000ca0: 3b03 subs r3, #3
+ 8000ca2: e000 b.n 8000ca6 <NVIC_EncodePriority+0x32>
+ 8000ca4: 2300 movs r3, #0
+ 8000ca6: 617b str r3, [r7, #20]
return (
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
- 8000ba0: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff
- 8000ba4: 69bb ldr r3, [r7, #24]
- 8000ba6: fa02 f303 lsl.w r3, r2, r3
- 8000baa: 43da mvns r2, r3
- 8000bac: 68bb ldr r3, [r7, #8]
- 8000bae: 401a ands r2, r3
- 8000bb0: 697b ldr r3, [r7, #20]
- 8000bb2: 409a lsls r2, r3
+ 8000ca8: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff
+ 8000cac: 69bb ldr r3, [r7, #24]
+ 8000cae: fa02 f303 lsl.w r3, r2, r3
+ 8000cb2: 43da mvns r2, r3
+ 8000cb4: 68bb ldr r3, [r7, #8]
+ 8000cb6: 401a ands r2, r3
+ 8000cb8: 697b ldr r3, [r7, #20]
+ 8000cba: 409a lsls r2, r3
((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
- 8000bb4: f04f 31ff mov.w r1, #4294967295 ; 0xffffffff
- 8000bb8: 697b ldr r3, [r7, #20]
- 8000bba: fa01 f303 lsl.w r3, r1, r3
- 8000bbe: 43d9 mvns r1, r3
- 8000bc0: 687b ldr r3, [r7, #4]
- 8000bc2: 400b ands r3, r1
+ 8000cbc: f04f 31ff mov.w r1, #4294967295 ; 0xffffffff
+ 8000cc0: 697b ldr r3, [r7, #20]
+ 8000cc2: fa01 f303 lsl.w r3, r1, r3
+ 8000cc6: 43d9 mvns r1, r3
+ 8000cc8: 687b ldr r3, [r7, #4]
+ 8000cca: 400b ands r3, r1
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
- 8000bc4: 4313 orrs r3, r2
+ 8000ccc: 4313 orrs r3, r2
);
}
- 8000bc6: 4618 mov r0, r3
- 8000bc8: 3724 adds r7, #36 ; 0x24
- 8000bca: 46bd mov sp, r7
- 8000bcc: f85d 7b04 ldr.w r7, [sp], #4
- 8000bd0: 4770 bx lr
+ 8000cce: 4618 mov r0, r3
+ 8000cd0: 3724 adds r7, #36 ; 0x24
+ 8000cd2: 46bd mov sp, r7
+ 8000cd4: f85d 7b04 ldr.w r7, [sp], #4
+ 8000cd8: 4770 bx lr
...
-08000bd4 <SysTick_Config>:
+08000cdc <SysTick_Config>:
\note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
must contain a vendor-specific implementation of this function.
*/
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
{
- 8000bd4: b580 push {r7, lr}
- 8000bd6: b082 sub sp, #8
- 8000bd8: af00 add r7, sp, #0
- 8000bda: 6078 str r0, [r7, #4]
+ 8000cdc: b580 push {r7, lr}
+ 8000cde: b082 sub sp, #8
+ 8000ce0: af00 add r7, sp, #0
+ 8000ce2: 6078 str r0, [r7, #4]
if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
- 8000bdc: 687b ldr r3, [r7, #4]
- 8000bde: 3b01 subs r3, #1
- 8000be0: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000
- 8000be4: d301 bcc.n 8000bea <SysTick_Config+0x16>
+ 8000ce4: 687b ldr r3, [r7, #4]
+ 8000ce6: 3b01 subs r3, #1
+ 8000ce8: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000
+ 8000cec: d301 bcc.n 8000cf2 <SysTick_Config+0x16>
{
return (1UL); /* Reload value impossible */
- 8000be6: 2301 movs r3, #1
- 8000be8: e00f b.n 8000c0a <SysTick_Config+0x36>
+ 8000cee: 2301 movs r3, #1
+ 8000cf0: e00f b.n 8000d12 <SysTick_Config+0x36>
}
SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
- 8000bea: 4a0a ldr r2, [pc, #40] ; (8000c14 <SysTick_Config+0x40>)
- 8000bec: 687b ldr r3, [r7, #4]
- 8000bee: 3b01 subs r3, #1
- 8000bf0: 6053 str r3, [r2, #4]
+ 8000cf2: 4a0a ldr r2, [pc, #40] ; (8000d1c <SysTick_Config+0x40>)
+ 8000cf4: 687b ldr r3, [r7, #4]
+ 8000cf6: 3b01 subs r3, #1
+ 8000cf8: 6053 str r3, [r2, #4]
NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
- 8000bf2: 210f movs r1, #15
- 8000bf4: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
- 8000bf8: f7ff ff8e bl 8000b18 <__NVIC_SetPriority>
+ 8000cfa: 210f movs r1, #15
+ 8000cfc: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
+ 8000d00: f7ff ff8e bl 8000c20 <__NVIC_SetPriority>
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
- 8000bfc: 4b05 ldr r3, [pc, #20] ; (8000c14 <SysTick_Config+0x40>)
- 8000bfe: 2200 movs r2, #0
- 8000c00: 609a str r2, [r3, #8]
+ 8000d04: 4b05 ldr r3, [pc, #20] ; (8000d1c <SysTick_Config+0x40>)
+ 8000d06: 2200 movs r2, #0
+ 8000d08: 609a str r2, [r3, #8]
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
- 8000c02: 4b04 ldr r3, [pc, #16] ; (8000c14 <SysTick_Config+0x40>)
- 8000c04: 2207 movs r2, #7
- 8000c06: 601a str r2, [r3, #0]
+ 8000d0a: 4b04 ldr r3, [pc, #16] ; (8000d1c <SysTick_Config+0x40>)
+ 8000d0c: 2207 movs r2, #7
+ 8000d0e: 601a str r2, [r3, #0]
SysTick_CTRL_TICKINT_Msk |
SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
return (0UL); /* Function successful */
- 8000c08: 2300 movs r3, #0
+ 8000d10: 2300 movs r3, #0
}
- 8000c0a: 4618 mov r0, r3
- 8000c0c: 3708 adds r7, #8
- 8000c0e: 46bd mov sp, r7
- 8000c10: bd80 pop {r7, pc}
- 8000c12: bf00 nop
- 8000c14: e000e010 .word 0xe000e010
-
-08000c18 <HAL_NVIC_SetPriorityGrouping>:
+ 8000d12: 4618 mov r0, r3
+ 8000d14: 3708 adds r7, #8
+ 8000d16: 46bd mov sp, r7
+ 8000d18: bd80 pop {r7, pc}
+ 8000d1a: bf00 nop
+ 8000d1c: e000e010 .word 0xe000e010
+
+08000d20 <HAL_NVIC_SetPriorityGrouping>:
* @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible.
* The pending IRQ priority will be managed only by the subpriority.
* @retval None
*/
void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
- 8000c18: b580 push {r7, lr}
- 8000c1a: b082 sub sp, #8
- 8000c1c: af00 add r7, sp, #0
- 8000c1e: 6078 str r0, [r7, #4]
+ 8000d20: b580 push {r7, lr}
+ 8000d22: b082 sub sp, #8
+ 8000d24: af00 add r7, sp, #0
+ 8000d26: 6078 str r0, [r7, #4]
/* Check the parameters */
assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
/* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
NVIC_SetPriorityGrouping(PriorityGroup);
- 8000c20: 6878 ldr r0, [r7, #4]
- 8000c22: f7ff ff47 bl 8000ab4 <__NVIC_SetPriorityGrouping>
+ 8000d28: 6878 ldr r0, [r7, #4]
+ 8000d2a: f7ff ff29 bl 8000b80 <__NVIC_SetPriorityGrouping>
}
- 8000c26: bf00 nop
- 8000c28: 3708 adds r7, #8
- 8000c2a: 46bd mov sp, r7
- 8000c2c: bd80 pop {r7, pc}
+ 8000d2e: bf00 nop
+ 8000d30: 3708 adds r7, #8
+ 8000d32: 46bd mov sp, r7
+ 8000d34: bd80 pop {r7, pc}
-08000c2e <HAL_NVIC_SetPriority>:
+08000d36 <HAL_NVIC_SetPriority>:
* This parameter can be a value between 0 and 15
* A lower priority value indicates a higher priority.
* @retval None
*/
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
{
- 8000c2e: b580 push {r7, lr}
- 8000c30: b086 sub sp, #24
- 8000c32: af00 add r7, sp, #0
- 8000c34: 4603 mov r3, r0
- 8000c36: 60b9 str r1, [r7, #8]
- 8000c38: 607a str r2, [r7, #4]
- 8000c3a: 73fb strb r3, [r7, #15]
+ 8000d36: b580 push {r7, lr}
+ 8000d38: b086 sub sp, #24
+ 8000d3a: af00 add r7, sp, #0
+ 8000d3c: 4603 mov r3, r0
+ 8000d3e: 60b9 str r1, [r7, #8]
+ 8000d40: 607a str r2, [r7, #4]
+ 8000d42: 73fb strb r3, [r7, #15]
uint32_t prioritygroup = 0x00;
- 8000c3c: 2300 movs r3, #0
- 8000c3e: 617b str r3, [r7, #20]
+ 8000d44: 2300 movs r3, #0
+ 8000d46: 617b str r3, [r7, #20]
/* Check the parameters */
assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
prioritygroup = NVIC_GetPriorityGrouping();
- 8000c40: f7ff ff5c bl 8000afc <__NVIC_GetPriorityGrouping>
- 8000c44: 6178 str r0, [r7, #20]
+ 8000d48: f7ff ff3e bl 8000bc8 <__NVIC_GetPriorityGrouping>
+ 8000d4c: 6178 str r0, [r7, #20]
NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
- 8000c46: 687a ldr r2, [r7, #4]
- 8000c48: 68b9 ldr r1, [r7, #8]
- 8000c4a: 6978 ldr r0, [r7, #20]
- 8000c4c: f7ff ff8e bl 8000b6c <NVIC_EncodePriority>
- 8000c50: 4602 mov r2, r0
- 8000c52: f997 300f ldrsb.w r3, [r7, #15]
- 8000c56: 4611 mov r1, r2
- 8000c58: 4618 mov r0, r3
- 8000c5a: f7ff ff5d bl 8000b18 <__NVIC_SetPriority>
+ 8000d4e: 687a ldr r2, [r7, #4]
+ 8000d50: 68b9 ldr r1, [r7, #8]
+ 8000d52: 6978 ldr r0, [r7, #20]
+ 8000d54: f7ff ff8e bl 8000c74 <NVIC_EncodePriority>
+ 8000d58: 4602 mov r2, r0
+ 8000d5a: f997 300f ldrsb.w r3, [r7, #15]
+ 8000d5e: 4611 mov r1, r2
+ 8000d60: 4618 mov r0, r3
+ 8000d62: f7ff ff5d bl 8000c20 <__NVIC_SetPriority>
+}
+ 8000d66: bf00 nop
+ 8000d68: 3718 adds r7, #24
+ 8000d6a: 46bd mov sp, r7
+ 8000d6c: bd80 pop {r7, pc}
+
+08000d6e <HAL_NVIC_EnableIRQ>:
+ * This parameter can be an enumerator of IRQn_Type enumeration
+ * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f7xxxx.h))
+ * @retval None
+ */
+void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+ 8000d6e: b580 push {r7, lr}
+ 8000d70: b082 sub sp, #8
+ 8000d72: af00 add r7, sp, #0
+ 8000d74: 4603 mov r3, r0
+ 8000d76: 71fb strb r3, [r7, #7]
+ /* Check the parameters */
+ assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
+
+ /* Enable interrupt */
+ NVIC_EnableIRQ(IRQn);
+ 8000d78: f997 3007 ldrsb.w r3, [r7, #7]
+ 8000d7c: 4618 mov r0, r3
+ 8000d7e: f7ff ff31 bl 8000be4 <__NVIC_EnableIRQ>
}
- 8000c5e: bf00 nop
- 8000c60: 3718 adds r7, #24
- 8000c62: 46bd mov sp, r7
- 8000c64: bd80 pop {r7, pc}
+ 8000d82: bf00 nop
+ 8000d84: 3708 adds r7, #8
+ 8000d86: 46bd mov sp, r7
+ 8000d88: bd80 pop {r7, pc}
-08000c66 <HAL_SYSTICK_Config>:
+08000d8a <HAL_SYSTICK_Config>:
* @param TicksNumb Specifies the ticks Number of ticks between two interrupts.
* @retval status: - 0 Function succeeded.
* - 1 Function failed.
*/
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
{
- 8000c66: b580 push {r7, lr}
- 8000c68: b082 sub sp, #8
- 8000c6a: af00 add r7, sp, #0
- 8000c6c: 6078 str r0, [r7, #4]
+ 8000d8a: b580 push {r7, lr}
+ 8000d8c: b082 sub sp, #8
+ 8000d8e: af00 add r7, sp, #0
+ 8000d90: 6078 str r0, [r7, #4]
return SysTick_Config(TicksNumb);
- 8000c6e: 6878 ldr r0, [r7, #4]
- 8000c70: f7ff ffb0 bl 8000bd4 <SysTick_Config>
- 8000c74: 4603 mov r3, r0
+ 8000d92: 6878 ldr r0, [r7, #4]
+ 8000d94: f7ff ffa2 bl 8000cdc <SysTick_Config>
+ 8000d98: 4603 mov r3, r0
+}
+ 8000d9a: 4618 mov r0, r3
+ 8000d9c: 3708 adds r7, #8
+ 8000d9e: 46bd mov sp, r7
+ 8000da0: bd80 pop {r7, pc}
+
+08000da2 <HAL_DMA_Abort_IT>:
+ * @param hdma pointer to a DMA_HandleTypeDef structure that contains
+ * the configuration information for the specified DMA Stream.
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
+{
+ 8000da2: b480 push {r7}
+ 8000da4: b083 sub sp, #12
+ 8000da6: af00 add r7, sp, #0
+ 8000da8: 6078 str r0, [r7, #4]
+ if(hdma->State != HAL_DMA_STATE_BUSY)
+ 8000daa: 687b ldr r3, [r7, #4]
+ 8000dac: f893 3035 ldrb.w r3, [r3, #53] ; 0x35
+ 8000db0: b2db uxtb r3, r3
+ 8000db2: 2b02 cmp r3, #2
+ 8000db4: d004 beq.n 8000dc0 <HAL_DMA_Abort_IT+0x1e>
+ {
+ hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
+ 8000db6: 687b ldr r3, [r7, #4]
+ 8000db8: 2280 movs r2, #128 ; 0x80
+ 8000dba: 655a str r2, [r3, #84] ; 0x54
+ return HAL_ERROR;
+ 8000dbc: 2301 movs r3, #1
+ 8000dbe: e00c b.n 8000dda <HAL_DMA_Abort_IT+0x38>
+ }
+ else
+ {
+ /* Set Abort State */
+ hdma->State = HAL_DMA_STATE_ABORT;
+ 8000dc0: 687b ldr r3, [r7, #4]
+ 8000dc2: 2205 movs r2, #5
+ 8000dc4: f883 2035 strb.w r2, [r3, #53] ; 0x35
+
+ /* Disable the stream */
+ __HAL_DMA_DISABLE(hdma);
+ 8000dc8: 687b ldr r3, [r7, #4]
+ 8000dca: 681b ldr r3, [r3, #0]
+ 8000dcc: 681a ldr r2, [r3, #0]
+ 8000dce: 687b ldr r3, [r7, #4]
+ 8000dd0: 681b ldr r3, [r3, #0]
+ 8000dd2: f022 0201 bic.w r2, r2, #1
+ 8000dd6: 601a str r2, [r3, #0]
+ }
+
+ return HAL_OK;
+ 8000dd8: 2300 movs r3, #0
}
- 8000c76: 4618 mov r0, r3
- 8000c78: 3708 adds r7, #8
- 8000c7a: 46bd mov sp, r7
- 8000c7c: bd80 pop {r7, pc}
+ 8000dda: 4618 mov r0, r3
+ 8000ddc: 370c adds r7, #12
+ 8000dde: 46bd mov sp, r7
+ 8000de0: f85d 7b04 ldr.w r7, [sp], #4
+ 8000de4: 4770 bx lr
...
-08000c80 <HAL_GPIO_Init>:
+08000de8 <HAL_GPIO_Init>:
* @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains
* the configuration information for the specified GPIO peripheral.
* @retval None
*/
void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
{
- 8000c80: b480 push {r7}
- 8000c82: b089 sub sp, #36 ; 0x24
- 8000c84: af00 add r7, sp, #0
- 8000c86: 6078 str r0, [r7, #4]
- 8000c88: 6039 str r1, [r7, #0]
+ 8000de8: b480 push {r7}
+ 8000dea: b089 sub sp, #36 ; 0x24
+ 8000dec: af00 add r7, sp, #0
+ 8000dee: 6078 str r0, [r7, #4]
+ 8000df0: 6039 str r1, [r7, #0]
uint32_t position = 0x00;
- 8000c8a: 2300 movs r3, #0
- 8000c8c: 61fb str r3, [r7, #28]
+ 8000df2: 2300 movs r3, #0
+ 8000df4: 61fb str r3, [r7, #28]
uint32_t ioposition = 0x00;
- 8000c8e: 2300 movs r3, #0
- 8000c90: 617b str r3, [r7, #20]
+ 8000df6: 2300 movs r3, #0
+ 8000df8: 617b str r3, [r7, #20]
uint32_t iocurrent = 0x00;
- 8000c92: 2300 movs r3, #0
- 8000c94: 613b str r3, [r7, #16]
+ 8000dfa: 2300 movs r3, #0
+ 8000dfc: 613b str r3, [r7, #16]
uint32_t temp = 0x00;
- 8000c96: 2300 movs r3, #0
- 8000c98: 61bb str r3, [r7, #24]
+ 8000dfe: 2300 movs r3, #0
+ 8000e00: 61bb str r3, [r7, #24]
assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
assert_param(IS_GPIO_PULL(GPIO_Init->Pull));
/* Configure the port pins */
for(position = 0; position < GPIO_NUMBER; position++)
- 8000c9a: 2300 movs r3, #0
- 8000c9c: 61fb str r3, [r7, #28]
- 8000c9e: e175 b.n 8000f8c <HAL_GPIO_Init+0x30c>
+ 8000e02: 2300 movs r3, #0
+ 8000e04: 61fb str r3, [r7, #28]
+ 8000e06: e175 b.n 80010f4 <HAL_GPIO_Init+0x30c>
{
/* Get the IO position */
ioposition = ((uint32_t)0x01) << position;
- 8000ca0: 2201 movs r2, #1
- 8000ca2: 69fb ldr r3, [r7, #28]
- 8000ca4: fa02 f303 lsl.w r3, r2, r3
- 8000ca8: 617b str r3, [r7, #20]
+ 8000e08: 2201 movs r2, #1
+ 8000e0a: 69fb ldr r3, [r7, #28]
+ 8000e0c: fa02 f303 lsl.w r3, r2, r3
+ 8000e10: 617b str r3, [r7, #20]
/* Get the current IO position */
iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
- 8000caa: 683b ldr r3, [r7, #0]
- 8000cac: 681b ldr r3, [r3, #0]
- 8000cae: 697a ldr r2, [r7, #20]
- 8000cb0: 4013 ands r3, r2
- 8000cb2: 613b str r3, [r7, #16]
+ 8000e12: 683b ldr r3, [r7, #0]
+ 8000e14: 681b ldr r3, [r3, #0]
+ 8000e16: 697a ldr r2, [r7, #20]
+ 8000e18: 4013 ands r3, r2
+ 8000e1a: 613b str r3, [r7, #16]
if(iocurrent == ioposition)
- 8000cb4: 693a ldr r2, [r7, #16]
- 8000cb6: 697b ldr r3, [r7, #20]
- 8000cb8: 429a cmp r2, r3
- 8000cba: f040 8164 bne.w 8000f86 <HAL_GPIO_Init+0x306>
+ 8000e1c: 693a ldr r2, [r7, #16]
+ 8000e1e: 697b ldr r3, [r7, #20]
+ 8000e20: 429a cmp r2, r3
+ 8000e22: f040 8164 bne.w 80010ee <HAL_GPIO_Init+0x306>
{
/*--------------------- GPIO Mode Configuration ------------------------*/
/* In case of Alternate function mode selection */
if((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
- 8000cbe: 683b ldr r3, [r7, #0]
- 8000cc0: 685b ldr r3, [r3, #4]
- 8000cc2: 2b02 cmp r3, #2
- 8000cc4: d003 beq.n 8000cce <HAL_GPIO_Init+0x4e>
- 8000cc6: 683b ldr r3, [r7, #0]
- 8000cc8: 685b ldr r3, [r3, #4]
- 8000cca: 2b12 cmp r3, #18
- 8000ccc: d123 bne.n 8000d16 <HAL_GPIO_Init+0x96>
+ 8000e26: 683b ldr r3, [r7, #0]
+ 8000e28: 685b ldr r3, [r3, #4]
+ 8000e2a: 2b02 cmp r3, #2
+ 8000e2c: d003 beq.n 8000e36 <HAL_GPIO_Init+0x4e>
+ 8000e2e: 683b ldr r3, [r7, #0]
+ 8000e30: 685b ldr r3, [r3, #4]
+ 8000e32: 2b12 cmp r3, #18
+ 8000e34: d123 bne.n 8000e7e <HAL_GPIO_Init+0x96>
{
/* Check the Alternate function parameter */
assert_param(IS_GPIO_AF(GPIO_Init->Alternate));
/* Configure Alternate function mapped with the current IO */
temp = GPIOx->AFR[position >> 3];
- 8000cce: 69fb ldr r3, [r7, #28]
- 8000cd0: 08da lsrs r2, r3, #3
- 8000cd2: 687b ldr r3, [r7, #4]
- 8000cd4: 3208 adds r2, #8
- 8000cd6: f853 3022 ldr.w r3, [r3, r2, lsl #2]
- 8000cda: 61bb str r3, [r7, #24]
+ 8000e36: 69fb ldr r3, [r7, #28]
+ 8000e38: 08da lsrs r2, r3, #3
+ 8000e3a: 687b ldr r3, [r7, #4]
+ 8000e3c: 3208 adds r2, #8
+ 8000e3e: f853 3022 ldr.w r3, [r3, r2, lsl #2]
+ 8000e42: 61bb str r3, [r7, #24]
temp &= ~((uint32_t)0xF << ((uint32_t)(position & (uint32_t)0x07) * 4)) ;
- 8000cdc: 69fb ldr r3, [r7, #28]
- 8000cde: f003 0307 and.w r3, r3, #7
- 8000ce2: 009b lsls r3, r3, #2
- 8000ce4: 220f movs r2, #15
- 8000ce6: fa02 f303 lsl.w r3, r2, r3
- 8000cea: 43db mvns r3, r3
- 8000cec: 69ba ldr r2, [r7, #24]
- 8000cee: 4013 ands r3, r2
- 8000cf0: 61bb str r3, [r7, #24]
+ 8000e44: 69fb ldr r3, [r7, #28]
+ 8000e46: f003 0307 and.w r3, r3, #7
+ 8000e4a: 009b lsls r3, r3, #2
+ 8000e4c: 220f movs r2, #15
+ 8000e4e: fa02 f303 lsl.w r3, r2, r3
+ 8000e52: 43db mvns r3, r3
+ 8000e54: 69ba ldr r2, [r7, #24]
+ 8000e56: 4013 ands r3, r2
+ 8000e58: 61bb str r3, [r7, #24]
temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & (uint32_t)0x07) * 4));
- 8000cf2: 683b ldr r3, [r7, #0]
- 8000cf4: 691a ldr r2, [r3, #16]
- 8000cf6: 69fb ldr r3, [r7, #28]
- 8000cf8: f003 0307 and.w r3, r3, #7
- 8000cfc: 009b lsls r3, r3, #2
- 8000cfe: fa02 f303 lsl.w r3, r2, r3
- 8000d02: 69ba ldr r2, [r7, #24]
- 8000d04: 4313 orrs r3, r2
- 8000d06: 61bb str r3, [r7, #24]
+ 8000e5a: 683b ldr r3, [r7, #0]
+ 8000e5c: 691a ldr r2, [r3, #16]
+ 8000e5e: 69fb ldr r3, [r7, #28]
+ 8000e60: f003 0307 and.w r3, r3, #7
+ 8000e64: 009b lsls r3, r3, #2
+ 8000e66: fa02 f303 lsl.w r3, r2, r3
+ 8000e6a: 69ba ldr r2, [r7, #24]
+ 8000e6c: 4313 orrs r3, r2
+ 8000e6e: 61bb str r3, [r7, #24]
GPIOx->AFR[position >> 3] = temp;
- 8000d08: 69fb ldr r3, [r7, #28]
- 8000d0a: 08da lsrs r2, r3, #3
- 8000d0c: 687b ldr r3, [r7, #4]
- 8000d0e: 3208 adds r2, #8
- 8000d10: 69b9 ldr r1, [r7, #24]
- 8000d12: f843 1022 str.w r1, [r3, r2, lsl #2]
+ 8000e70: 69fb ldr r3, [r7, #28]
+ 8000e72: 08da lsrs r2, r3, #3
+ 8000e74: 687b ldr r3, [r7, #4]
+ 8000e76: 3208 adds r2, #8
+ 8000e78: 69b9 ldr r1, [r7, #24]
+ 8000e7a: f843 1022 str.w r1, [r3, r2, lsl #2]
}
/* Configure IO Direction mode (Input, Output, Alternate or Analog) */
temp = GPIOx->MODER;
- 8000d16: 687b ldr r3, [r7, #4]
- 8000d18: 681b ldr r3, [r3, #0]
- 8000d1a: 61bb str r3, [r7, #24]
+ 8000e7e: 687b ldr r3, [r7, #4]
+ 8000e80: 681b ldr r3, [r3, #0]
+ 8000e82: 61bb str r3, [r7, #24]
temp &= ~(GPIO_MODER_MODER0 << (position * 2));
- 8000d1c: 69fb ldr r3, [r7, #28]
- 8000d1e: 005b lsls r3, r3, #1
- 8000d20: 2203 movs r2, #3
- 8000d22: fa02 f303 lsl.w r3, r2, r3
- 8000d26: 43db mvns r3, r3
- 8000d28: 69ba ldr r2, [r7, #24]
- 8000d2a: 4013 ands r3, r2
- 8000d2c: 61bb str r3, [r7, #24]
+ 8000e84: 69fb ldr r3, [r7, #28]
+ 8000e86: 005b lsls r3, r3, #1
+ 8000e88: 2203 movs r2, #3
+ 8000e8a: fa02 f303 lsl.w r3, r2, r3
+ 8000e8e: 43db mvns r3, r3
+ 8000e90: 69ba ldr r2, [r7, #24]
+ 8000e92: 4013 ands r3, r2
+ 8000e94: 61bb str r3, [r7, #24]
temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2));
- 8000d2e: 683b ldr r3, [r7, #0]
- 8000d30: 685b ldr r3, [r3, #4]
- 8000d32: f003 0203 and.w r2, r3, #3
- 8000d36: 69fb ldr r3, [r7, #28]
- 8000d38: 005b lsls r3, r3, #1
- 8000d3a: fa02 f303 lsl.w r3, r2, r3
- 8000d3e: 69ba ldr r2, [r7, #24]
- 8000d40: 4313 orrs r3, r2
- 8000d42: 61bb str r3, [r7, #24]
+ 8000e96: 683b ldr r3, [r7, #0]
+ 8000e98: 685b ldr r3, [r3, #4]
+ 8000e9a: f003 0203 and.w r2, r3, #3
+ 8000e9e: 69fb ldr r3, [r7, #28]
+ 8000ea0: 005b lsls r3, r3, #1
+ 8000ea2: fa02 f303 lsl.w r3, r2, r3
+ 8000ea6: 69ba ldr r2, [r7, #24]
+ 8000ea8: 4313 orrs r3, r2
+ 8000eaa: 61bb str r3, [r7, #24]
GPIOx->MODER = temp;
- 8000d44: 687b ldr r3, [r7, #4]
- 8000d46: 69ba ldr r2, [r7, #24]
- 8000d48: 601a str r2, [r3, #0]
+ 8000eac: 687b ldr r3, [r7, #4]
+ 8000eae: 69ba ldr r2, [r7, #24]
+ 8000eb0: 601a str r2, [r3, #0]
/* In case of Output or Alternate function mode selection */
if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) ||
- 8000d4a: 683b ldr r3, [r7, #0]
- 8000d4c: 685b ldr r3, [r3, #4]
- 8000d4e: 2b01 cmp r3, #1
- 8000d50: d00b beq.n 8000d6a <HAL_GPIO_Init+0xea>
- 8000d52: 683b ldr r3, [r7, #0]
- 8000d54: 685b ldr r3, [r3, #4]
- 8000d56: 2b02 cmp r3, #2
- 8000d58: d007 beq.n 8000d6a <HAL_GPIO_Init+0xea>
+ 8000eb2: 683b ldr r3, [r7, #0]
+ 8000eb4: 685b ldr r3, [r3, #4]
+ 8000eb6: 2b01 cmp r3, #1
+ 8000eb8: d00b beq.n 8000ed2 <HAL_GPIO_Init+0xea>
+ 8000eba: 683b ldr r3, [r7, #0]
+ 8000ebc: 685b ldr r3, [r3, #4]
+ 8000ebe: 2b02 cmp r3, #2
+ 8000ec0: d007 beq.n 8000ed2 <HAL_GPIO_Init+0xea>
(GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
- 8000d5a: 683b ldr r3, [r7, #0]
- 8000d5c: 685b ldr r3, [r3, #4]
+ 8000ec2: 683b ldr r3, [r7, #0]
+ 8000ec4: 685b ldr r3, [r3, #4]
if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) ||
- 8000d5e: 2b11 cmp r3, #17
- 8000d60: d003 beq.n 8000d6a <HAL_GPIO_Init+0xea>
+ 8000ec6: 2b11 cmp r3, #17
+ 8000ec8: d003 beq.n 8000ed2 <HAL_GPIO_Init+0xea>
(GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
- 8000d62: 683b ldr r3, [r7, #0]
- 8000d64: 685b ldr r3, [r3, #4]
- 8000d66: 2b12 cmp r3, #18
- 8000d68: d130 bne.n 8000dcc <HAL_GPIO_Init+0x14c>
+ 8000eca: 683b ldr r3, [r7, #0]
+ 8000ecc: 685b ldr r3, [r3, #4]
+ 8000ece: 2b12 cmp r3, #18
+ 8000ed0: d130 bne.n 8000f34 <HAL_GPIO_Init+0x14c>
{
/* Check the Speed parameter */
assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
/* Configure the IO Speed */
temp = GPIOx->OSPEEDR;
- 8000d6a: 687b ldr r3, [r7, #4]
- 8000d6c: 689b ldr r3, [r3, #8]
- 8000d6e: 61bb str r3, [r7, #24]
+ 8000ed2: 687b ldr r3, [r7, #4]
+ 8000ed4: 689b ldr r3, [r3, #8]
+ 8000ed6: 61bb str r3, [r7, #24]
temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2));
- 8000d70: 69fb ldr r3, [r7, #28]
- 8000d72: 005b lsls r3, r3, #1
- 8000d74: 2203 movs r2, #3
- 8000d76: fa02 f303 lsl.w r3, r2, r3
- 8000d7a: 43db mvns r3, r3
- 8000d7c: 69ba ldr r2, [r7, #24]
- 8000d7e: 4013 ands r3, r2
- 8000d80: 61bb str r3, [r7, #24]
+ 8000ed8: 69fb ldr r3, [r7, #28]
+ 8000eda: 005b lsls r3, r3, #1
+ 8000edc: 2203 movs r2, #3
+ 8000ede: fa02 f303 lsl.w r3, r2, r3
+ 8000ee2: 43db mvns r3, r3
+ 8000ee4: 69ba ldr r2, [r7, #24]
+ 8000ee6: 4013 ands r3, r2
+ 8000ee8: 61bb str r3, [r7, #24]
temp |= (GPIO_Init->Speed << (position * 2));
- 8000d82: 683b ldr r3, [r7, #0]
- 8000d84: 68da ldr r2, [r3, #12]
- 8000d86: 69fb ldr r3, [r7, #28]
- 8000d88: 005b lsls r3, r3, #1
- 8000d8a: fa02 f303 lsl.w r3, r2, r3
- 8000d8e: 69ba ldr r2, [r7, #24]
- 8000d90: 4313 orrs r3, r2
- 8000d92: 61bb str r3, [r7, #24]
+ 8000eea: 683b ldr r3, [r7, #0]
+ 8000eec: 68da ldr r2, [r3, #12]
+ 8000eee: 69fb ldr r3, [r7, #28]
+ 8000ef0: 005b lsls r3, r3, #1
+ 8000ef2: fa02 f303 lsl.w r3, r2, r3
+ 8000ef6: 69ba ldr r2, [r7, #24]
+ 8000ef8: 4313 orrs r3, r2
+ 8000efa: 61bb str r3, [r7, #24]
GPIOx->OSPEEDR = temp;
- 8000d94: 687b ldr r3, [r7, #4]
- 8000d96: 69ba ldr r2, [r7, #24]
- 8000d98: 609a str r2, [r3, #8]
+ 8000efc: 687b ldr r3, [r7, #4]
+ 8000efe: 69ba ldr r2, [r7, #24]
+ 8000f00: 609a str r2, [r3, #8]
/* Configure the IO Output Type */
temp = GPIOx->OTYPER;
- 8000d9a: 687b ldr r3, [r7, #4]
- 8000d9c: 685b ldr r3, [r3, #4]
- 8000d9e: 61bb str r3, [r7, #24]
+ 8000f02: 687b ldr r3, [r7, #4]
+ 8000f04: 685b ldr r3, [r3, #4]
+ 8000f06: 61bb str r3, [r7, #24]
temp &= ~(GPIO_OTYPER_OT_0 << position) ;
- 8000da0: 2201 movs r2, #1
- 8000da2: 69fb ldr r3, [r7, #28]
- 8000da4: fa02 f303 lsl.w r3, r2, r3
- 8000da8: 43db mvns r3, r3
- 8000daa: 69ba ldr r2, [r7, #24]
- 8000dac: 4013 ands r3, r2
- 8000dae: 61bb str r3, [r7, #24]
+ 8000f08: 2201 movs r2, #1
+ 8000f0a: 69fb ldr r3, [r7, #28]
+ 8000f0c: fa02 f303 lsl.w r3, r2, r3
+ 8000f10: 43db mvns r3, r3
+ 8000f12: 69ba ldr r2, [r7, #24]
+ 8000f14: 4013 ands r3, r2
+ 8000f16: 61bb str r3, [r7, #24]
temp |= (((GPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4) << position);
- 8000db0: 683b ldr r3, [r7, #0]
- 8000db2: 685b ldr r3, [r3, #4]
- 8000db4: 091b lsrs r3, r3, #4
- 8000db6: f003 0201 and.w r2, r3, #1
- 8000dba: 69fb ldr r3, [r7, #28]
- 8000dbc: fa02 f303 lsl.w r3, r2, r3
- 8000dc0: 69ba ldr r2, [r7, #24]
- 8000dc2: 4313 orrs r3, r2
- 8000dc4: 61bb str r3, [r7, #24]
+ 8000f18: 683b ldr r3, [r7, #0]
+ 8000f1a: 685b ldr r3, [r3, #4]
+ 8000f1c: 091b lsrs r3, r3, #4
+ 8000f1e: f003 0201 and.w r2, r3, #1
+ 8000f22: 69fb ldr r3, [r7, #28]
+ 8000f24: fa02 f303 lsl.w r3, r2, r3
+ 8000f28: 69ba ldr r2, [r7, #24]
+ 8000f2a: 4313 orrs r3, r2
+ 8000f2c: 61bb str r3, [r7, #24]
GPIOx->OTYPER = temp;
- 8000dc6: 687b ldr r3, [r7, #4]
- 8000dc8: 69ba ldr r2, [r7, #24]
- 8000dca: 605a str r2, [r3, #4]
+ 8000f2e: 687b ldr r3, [r7, #4]
+ 8000f30: 69ba ldr r2, [r7, #24]
+ 8000f32: 605a str r2, [r3, #4]
}
/* Activate the Pull-up or Pull down resistor for the current IO */
temp = GPIOx->PUPDR;
- 8000dcc: 687b ldr r3, [r7, #4]
- 8000dce: 68db ldr r3, [r3, #12]
- 8000dd0: 61bb str r3, [r7, #24]
+ 8000f34: 687b ldr r3, [r7, #4]
+ 8000f36: 68db ldr r3, [r3, #12]
+ 8000f38: 61bb str r3, [r7, #24]
temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2));
- 8000dd2: 69fb ldr r3, [r7, #28]
- 8000dd4: 005b lsls r3, r3, #1
- 8000dd6: 2203 movs r2, #3
- 8000dd8: fa02 f303 lsl.w r3, r2, r3
- 8000ddc: 43db mvns r3, r3
- 8000dde: 69ba ldr r2, [r7, #24]
- 8000de0: 4013 ands r3, r2
- 8000de2: 61bb str r3, [r7, #24]
+ 8000f3a: 69fb ldr r3, [r7, #28]
+ 8000f3c: 005b lsls r3, r3, #1
+ 8000f3e: 2203 movs r2, #3
+ 8000f40: fa02 f303 lsl.w r3, r2, r3
+ 8000f44: 43db mvns r3, r3
+ 8000f46: 69ba ldr r2, [r7, #24]
+ 8000f48: 4013 ands r3, r2
+ 8000f4a: 61bb str r3, [r7, #24]
temp |= ((GPIO_Init->Pull) << (position * 2));
- 8000de4: 683b ldr r3, [r7, #0]
- 8000de6: 689a ldr r2, [r3, #8]
- 8000de8: 69fb ldr r3, [r7, #28]
- 8000dea: 005b lsls r3, r3, #1
- 8000dec: fa02 f303 lsl.w r3, r2, r3
- 8000df0: 69ba ldr r2, [r7, #24]
- 8000df2: 4313 orrs r3, r2
- 8000df4: 61bb str r3, [r7, #24]
+ 8000f4c: 683b ldr r3, [r7, #0]
+ 8000f4e: 689a ldr r2, [r3, #8]
+ 8000f50: 69fb ldr r3, [r7, #28]
+ 8000f52: 005b lsls r3, r3, #1
+ 8000f54: fa02 f303 lsl.w r3, r2, r3
+ 8000f58: 69ba ldr r2, [r7, #24]
+ 8000f5a: 4313 orrs r3, r2
+ 8000f5c: 61bb str r3, [r7, #24]
GPIOx->PUPDR = temp;
- 8000df6: 687b ldr r3, [r7, #4]
- 8000df8: 69ba ldr r2, [r7, #24]
- 8000dfa: 60da str r2, [r3, #12]
+ 8000f5e: 687b ldr r3, [r7, #4]
+ 8000f60: 69ba ldr r2, [r7, #24]
+ 8000f62: 60da str r2, [r3, #12]
/*--------------------- EXTI Mode Configuration ------------------------*/
/* Configure the External Interrupt or event for the current IO */
if((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
- 8000dfc: 683b ldr r3, [r7, #0]
- 8000dfe: 685b ldr r3, [r3, #4]
- 8000e00: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
- 8000e04: 2b00 cmp r3, #0
- 8000e06: f000 80be beq.w 8000f86 <HAL_GPIO_Init+0x306>
+ 8000f64: 683b ldr r3, [r7, #0]
+ 8000f66: 685b ldr r3, [r3, #4]
+ 8000f68: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
+ 8000f6c: 2b00 cmp r3, #0
+ 8000f6e: f000 80be beq.w 80010ee <HAL_GPIO_Init+0x306>
{
/* Enable SYSCFG Clock */
__HAL_RCC_SYSCFG_CLK_ENABLE();
- 8000e0a: 4b65 ldr r3, [pc, #404] ; (8000fa0 <HAL_GPIO_Init+0x320>)
- 8000e0c: 6c5b ldr r3, [r3, #68] ; 0x44
- 8000e0e: 4a64 ldr r2, [pc, #400] ; (8000fa0 <HAL_GPIO_Init+0x320>)
- 8000e10: f443 4380 orr.w r3, r3, #16384 ; 0x4000
- 8000e14: 6453 str r3, [r2, #68] ; 0x44
- 8000e16: 4b62 ldr r3, [pc, #392] ; (8000fa0 <HAL_GPIO_Init+0x320>)
- 8000e18: 6c5b ldr r3, [r3, #68] ; 0x44
- 8000e1a: f403 4380 and.w r3, r3, #16384 ; 0x4000
- 8000e1e: 60fb str r3, [r7, #12]
- 8000e20: 68fb ldr r3, [r7, #12]
+ 8000f72: 4b65 ldr r3, [pc, #404] ; (8001108 <HAL_GPIO_Init+0x320>)
+ 8000f74: 6c5b ldr r3, [r3, #68] ; 0x44
+ 8000f76: 4a64 ldr r2, [pc, #400] ; (8001108 <HAL_GPIO_Init+0x320>)
+ 8000f78: f443 4380 orr.w r3, r3, #16384 ; 0x4000
+ 8000f7c: 6453 str r3, [r2, #68] ; 0x44
+ 8000f7e: 4b62 ldr r3, [pc, #392] ; (8001108 <HAL_GPIO_Init+0x320>)
+ 8000f80: 6c5b ldr r3, [r3, #68] ; 0x44
+ 8000f82: f403 4380 and.w r3, r3, #16384 ; 0x4000
+ 8000f86: 60fb str r3, [r7, #12]
+ 8000f88: 68fb ldr r3, [r7, #12]
temp = SYSCFG->EXTICR[position >> 2];
- 8000e22: 4a60 ldr r2, [pc, #384] ; (8000fa4 <HAL_GPIO_Init+0x324>)
- 8000e24: 69fb ldr r3, [r7, #28]
- 8000e26: 089b lsrs r3, r3, #2
- 8000e28: 3302 adds r3, #2
- 8000e2a: f852 3023 ldr.w r3, [r2, r3, lsl #2]
- 8000e2e: 61bb str r3, [r7, #24]
+ 8000f8a: 4a60 ldr r2, [pc, #384] ; (800110c <HAL_GPIO_Init+0x324>)
+ 8000f8c: 69fb ldr r3, [r7, #28]
+ 8000f8e: 089b lsrs r3, r3, #2
+ 8000f90: 3302 adds r3, #2
+ 8000f92: f852 3023 ldr.w r3, [r2, r3, lsl #2]
+ 8000f96: 61bb str r3, [r7, #24]
temp &= ~(((uint32_t)0x0F) << (4 * (position & 0x03)));
- 8000e30: 69fb ldr r3, [r7, #28]
- 8000e32: f003 0303 and.w r3, r3, #3
- 8000e36: 009b lsls r3, r3, #2
- 8000e38: 220f movs r2, #15
- 8000e3a: fa02 f303 lsl.w r3, r2, r3
- 8000e3e: 43db mvns r3, r3
- 8000e40: 69ba ldr r2, [r7, #24]
- 8000e42: 4013 ands r3, r2
- 8000e44: 61bb str r3, [r7, #24]
+ 8000f98: 69fb ldr r3, [r7, #28]
+ 8000f9a: f003 0303 and.w r3, r3, #3
+ 8000f9e: 009b lsls r3, r3, #2
+ 8000fa0: 220f movs r2, #15
+ 8000fa2: fa02 f303 lsl.w r3, r2, r3
+ 8000fa6: 43db mvns r3, r3
+ 8000fa8: 69ba ldr r2, [r7, #24]
+ 8000faa: 4013 ands r3, r2
+ 8000fac: 61bb str r3, [r7, #24]
temp |= ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4 * (position & 0x03)));
- 8000e46: 687b ldr r3, [r7, #4]
- 8000e48: 4a57 ldr r2, [pc, #348] ; (8000fa8 <HAL_GPIO_Init+0x328>)
- 8000e4a: 4293 cmp r3, r2
- 8000e4c: d037 beq.n 8000ebe <HAL_GPIO_Init+0x23e>
- 8000e4e: 687b ldr r3, [r7, #4]
- 8000e50: 4a56 ldr r2, [pc, #344] ; (8000fac <HAL_GPIO_Init+0x32c>)
- 8000e52: 4293 cmp r3, r2
- 8000e54: d031 beq.n 8000eba <HAL_GPIO_Init+0x23a>
- 8000e56: 687b ldr r3, [r7, #4]
- 8000e58: 4a55 ldr r2, [pc, #340] ; (8000fb0 <HAL_GPIO_Init+0x330>)
- 8000e5a: 4293 cmp r3, r2
- 8000e5c: d02b beq.n 8000eb6 <HAL_GPIO_Init+0x236>
- 8000e5e: 687b ldr r3, [r7, #4]
- 8000e60: 4a54 ldr r2, [pc, #336] ; (8000fb4 <HAL_GPIO_Init+0x334>)
- 8000e62: 4293 cmp r3, r2
- 8000e64: d025 beq.n 8000eb2 <HAL_GPIO_Init+0x232>
- 8000e66: 687b ldr r3, [r7, #4]
- 8000e68: 4a53 ldr r2, [pc, #332] ; (8000fb8 <HAL_GPIO_Init+0x338>)
- 8000e6a: 4293 cmp r3, r2
- 8000e6c: d01f beq.n 8000eae <HAL_GPIO_Init+0x22e>
- 8000e6e: 687b ldr r3, [r7, #4]
- 8000e70: 4a52 ldr r2, [pc, #328] ; (8000fbc <HAL_GPIO_Init+0x33c>)
- 8000e72: 4293 cmp r3, r2
- 8000e74: d019 beq.n 8000eaa <HAL_GPIO_Init+0x22a>
- 8000e76: 687b ldr r3, [r7, #4]
- 8000e78: 4a51 ldr r2, [pc, #324] ; (8000fc0 <HAL_GPIO_Init+0x340>)
- 8000e7a: 4293 cmp r3, r2
- 8000e7c: d013 beq.n 8000ea6 <HAL_GPIO_Init+0x226>
- 8000e7e: 687b ldr r3, [r7, #4]
- 8000e80: 4a50 ldr r2, [pc, #320] ; (8000fc4 <HAL_GPIO_Init+0x344>)
- 8000e82: 4293 cmp r3, r2
- 8000e84: d00d beq.n 8000ea2 <HAL_GPIO_Init+0x222>
- 8000e86: 687b ldr r3, [r7, #4]
- 8000e88: 4a4f ldr r2, [pc, #316] ; (8000fc8 <HAL_GPIO_Init+0x348>)
- 8000e8a: 4293 cmp r3, r2
- 8000e8c: d007 beq.n 8000e9e <HAL_GPIO_Init+0x21e>
- 8000e8e: 687b ldr r3, [r7, #4]
- 8000e90: 4a4e ldr r2, [pc, #312] ; (8000fcc <HAL_GPIO_Init+0x34c>)
- 8000e92: 4293 cmp r3, r2
- 8000e94: d101 bne.n 8000e9a <HAL_GPIO_Init+0x21a>
- 8000e96: 2309 movs r3, #9
- 8000e98: e012 b.n 8000ec0 <HAL_GPIO_Init+0x240>
- 8000e9a: 230a movs r3, #10
- 8000e9c: e010 b.n 8000ec0 <HAL_GPIO_Init+0x240>
- 8000e9e: 2308 movs r3, #8
- 8000ea0: e00e b.n 8000ec0 <HAL_GPIO_Init+0x240>
- 8000ea2: 2307 movs r3, #7
- 8000ea4: e00c b.n 8000ec0 <HAL_GPIO_Init+0x240>
- 8000ea6: 2306 movs r3, #6
- 8000ea8: e00a b.n 8000ec0 <HAL_GPIO_Init+0x240>
- 8000eaa: 2305 movs r3, #5
- 8000eac: e008 b.n 8000ec0 <HAL_GPIO_Init+0x240>
- 8000eae: 2304 movs r3, #4
- 8000eb0: e006 b.n 8000ec0 <HAL_GPIO_Init+0x240>
- 8000eb2: 2303 movs r3, #3
- 8000eb4: e004 b.n 8000ec0 <HAL_GPIO_Init+0x240>
- 8000eb6: 2302 movs r3, #2
- 8000eb8: e002 b.n 8000ec0 <HAL_GPIO_Init+0x240>
- 8000eba: 2301 movs r3, #1
- 8000ebc: e000 b.n 8000ec0 <HAL_GPIO_Init+0x240>
- 8000ebe: 2300 movs r3, #0
- 8000ec0: 69fa ldr r2, [r7, #28]
- 8000ec2: f002 0203 and.w r2, r2, #3
- 8000ec6: 0092 lsls r2, r2, #2
- 8000ec8: 4093 lsls r3, r2
- 8000eca: 69ba ldr r2, [r7, #24]
- 8000ecc: 4313 orrs r3, r2
- 8000ece: 61bb str r3, [r7, #24]
+ 8000fae: 687b ldr r3, [r7, #4]
+ 8000fb0: 4a57 ldr r2, [pc, #348] ; (8001110 <HAL_GPIO_Init+0x328>)
+ 8000fb2: 4293 cmp r3, r2
+ 8000fb4: d037 beq.n 8001026 <HAL_GPIO_Init+0x23e>
+ 8000fb6: 687b ldr r3, [r7, #4]
+ 8000fb8: 4a56 ldr r2, [pc, #344] ; (8001114 <HAL_GPIO_Init+0x32c>)
+ 8000fba: 4293 cmp r3, r2
+ 8000fbc: d031 beq.n 8001022 <HAL_GPIO_Init+0x23a>
+ 8000fbe: 687b ldr r3, [r7, #4]
+ 8000fc0: 4a55 ldr r2, [pc, #340] ; (8001118 <HAL_GPIO_Init+0x330>)
+ 8000fc2: 4293 cmp r3, r2
+ 8000fc4: d02b beq.n 800101e <HAL_GPIO_Init+0x236>
+ 8000fc6: 687b ldr r3, [r7, #4]
+ 8000fc8: 4a54 ldr r2, [pc, #336] ; (800111c <HAL_GPIO_Init+0x334>)
+ 8000fca: 4293 cmp r3, r2
+ 8000fcc: d025 beq.n 800101a <HAL_GPIO_Init+0x232>
+ 8000fce: 687b ldr r3, [r7, #4]
+ 8000fd0: 4a53 ldr r2, [pc, #332] ; (8001120 <HAL_GPIO_Init+0x338>)
+ 8000fd2: 4293 cmp r3, r2
+ 8000fd4: d01f beq.n 8001016 <HAL_GPIO_Init+0x22e>
+ 8000fd6: 687b ldr r3, [r7, #4]
+ 8000fd8: 4a52 ldr r2, [pc, #328] ; (8001124 <HAL_GPIO_Init+0x33c>)
+ 8000fda: 4293 cmp r3, r2
+ 8000fdc: d019 beq.n 8001012 <HAL_GPIO_Init+0x22a>
+ 8000fde: 687b ldr r3, [r7, #4]
+ 8000fe0: 4a51 ldr r2, [pc, #324] ; (8001128 <HAL_GPIO_Init+0x340>)
+ 8000fe2: 4293 cmp r3, r2
+ 8000fe4: d013 beq.n 800100e <HAL_GPIO_Init+0x226>
+ 8000fe6: 687b ldr r3, [r7, #4]
+ 8000fe8: 4a50 ldr r2, [pc, #320] ; (800112c <HAL_GPIO_Init+0x344>)
+ 8000fea: 4293 cmp r3, r2
+ 8000fec: d00d beq.n 800100a <HAL_GPIO_Init+0x222>
+ 8000fee: 687b ldr r3, [r7, #4]
+ 8000ff0: 4a4f ldr r2, [pc, #316] ; (8001130 <HAL_GPIO_Init+0x348>)
+ 8000ff2: 4293 cmp r3, r2
+ 8000ff4: d007 beq.n 8001006 <HAL_GPIO_Init+0x21e>
+ 8000ff6: 687b ldr r3, [r7, #4]
+ 8000ff8: 4a4e ldr r2, [pc, #312] ; (8001134 <HAL_GPIO_Init+0x34c>)
+ 8000ffa: 4293 cmp r3, r2
+ 8000ffc: d101 bne.n 8001002 <HAL_GPIO_Init+0x21a>
+ 8000ffe: 2309 movs r3, #9
+ 8001000: e012 b.n 8001028 <HAL_GPIO_Init+0x240>
+ 8001002: 230a movs r3, #10
+ 8001004: e010 b.n 8001028 <HAL_GPIO_Init+0x240>
+ 8001006: 2308 movs r3, #8
+ 8001008: e00e b.n 8001028 <HAL_GPIO_Init+0x240>
+ 800100a: 2307 movs r3, #7
+ 800100c: e00c b.n 8001028 <HAL_GPIO_Init+0x240>
+ 800100e: 2306 movs r3, #6
+ 8001010: e00a b.n 8001028 <HAL_GPIO_Init+0x240>
+ 8001012: 2305 movs r3, #5
+ 8001014: e008 b.n 8001028 <HAL_GPIO_Init+0x240>
+ 8001016: 2304 movs r3, #4
+ 8001018: e006 b.n 8001028 <HAL_GPIO_Init+0x240>
+ 800101a: 2303 movs r3, #3
+ 800101c: e004 b.n 8001028 <HAL_GPIO_Init+0x240>
+ 800101e: 2302 movs r3, #2
+ 8001020: e002 b.n 8001028 <HAL_GPIO_Init+0x240>
+ 8001022: 2301 movs r3, #1
+ 8001024: e000 b.n 8001028 <HAL_GPIO_Init+0x240>
+ 8001026: 2300 movs r3, #0
+ 8001028: 69fa ldr r2, [r7, #28]
+ 800102a: f002 0203 and.w r2, r2, #3
+ 800102e: 0092 lsls r2, r2, #2
+ 8001030: 4093 lsls r3, r2
+ 8001032: 69ba ldr r2, [r7, #24]
+ 8001034: 4313 orrs r3, r2
+ 8001036: 61bb str r3, [r7, #24]
SYSCFG->EXTICR[position >> 2] = temp;
- 8000ed0: 4934 ldr r1, [pc, #208] ; (8000fa4 <HAL_GPIO_Init+0x324>)
- 8000ed2: 69fb ldr r3, [r7, #28]
- 8000ed4: 089b lsrs r3, r3, #2
- 8000ed6: 3302 adds r3, #2
- 8000ed8: 69ba ldr r2, [r7, #24]
- 8000eda: f841 2023 str.w r2, [r1, r3, lsl #2]
+ 8001038: 4934 ldr r1, [pc, #208] ; (800110c <HAL_GPIO_Init+0x324>)
+ 800103a: 69fb ldr r3, [r7, #28]
+ 800103c: 089b lsrs r3, r3, #2
+ 800103e: 3302 adds r3, #2
+ 8001040: 69ba ldr r2, [r7, #24]
+ 8001042: f841 2023 str.w r2, [r1, r3, lsl #2]
/* Clear EXTI line configuration */
temp = EXTI->IMR;
- 8000ede: 4b3c ldr r3, [pc, #240] ; (8000fd0 <HAL_GPIO_Init+0x350>)
- 8000ee0: 681b ldr r3, [r3, #0]
- 8000ee2: 61bb str r3, [r7, #24]
+ 8001046: 4b3c ldr r3, [pc, #240] ; (8001138 <HAL_GPIO_Init+0x350>)
+ 8001048: 681b ldr r3, [r3, #0]
+ 800104a: 61bb str r3, [r7, #24]
temp &= ~((uint32_t)iocurrent);
- 8000ee4: 693b ldr r3, [r7, #16]
- 8000ee6: 43db mvns r3, r3
- 8000ee8: 69ba ldr r2, [r7, #24]
- 8000eea: 4013 ands r3, r2
- 8000eec: 61bb str r3, [r7, #24]
+ 800104c: 693b ldr r3, [r7, #16]
+ 800104e: 43db mvns r3, r3
+ 8001050: 69ba ldr r2, [r7, #24]
+ 8001052: 4013 ands r3, r2
+ 8001054: 61bb str r3, [r7, #24]
if((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
- 8000eee: 683b ldr r3, [r7, #0]
- 8000ef0: 685b ldr r3, [r3, #4]
- 8000ef2: f403 3380 and.w r3, r3, #65536 ; 0x10000
- 8000ef6: 2b00 cmp r3, #0
- 8000ef8: d003 beq.n 8000f02 <HAL_GPIO_Init+0x282>
+ 8001056: 683b ldr r3, [r7, #0]
+ 8001058: 685b ldr r3, [r3, #4]
+ 800105a: f403 3380 and.w r3, r3, #65536 ; 0x10000
+ 800105e: 2b00 cmp r3, #0
+ 8001060: d003 beq.n 800106a <HAL_GPIO_Init+0x282>
{
temp |= iocurrent;
- 8000efa: 69ba ldr r2, [r7, #24]
- 8000efc: 693b ldr r3, [r7, #16]
- 8000efe: 4313 orrs r3, r2
- 8000f00: 61bb str r3, [r7, #24]
+ 8001062: 69ba ldr r2, [r7, #24]
+ 8001064: 693b ldr r3, [r7, #16]
+ 8001066: 4313 orrs r3, r2
+ 8001068: 61bb str r3, [r7, #24]
}
EXTI->IMR = temp;
- 8000f02: 4a33 ldr r2, [pc, #204] ; (8000fd0 <HAL_GPIO_Init+0x350>)
- 8000f04: 69bb ldr r3, [r7, #24]
- 8000f06: 6013 str r3, [r2, #0]
+ 800106a: 4a33 ldr r2, [pc, #204] ; (8001138 <HAL_GPIO_Init+0x350>)
+ 800106c: 69bb ldr r3, [r7, #24]
+ 800106e: 6013 str r3, [r2, #0]
temp = EXTI->EMR;
- 8000f08: 4b31 ldr r3, [pc, #196] ; (8000fd0 <HAL_GPIO_Init+0x350>)
- 8000f0a: 685b ldr r3, [r3, #4]
- 8000f0c: 61bb str r3, [r7, #24]
+ 8001070: 4b31 ldr r3, [pc, #196] ; (8001138 <HAL_GPIO_Init+0x350>)
+ 8001072: 685b ldr r3, [r3, #4]
+ 8001074: 61bb str r3, [r7, #24]
temp &= ~((uint32_t)iocurrent);
- 8000f0e: 693b ldr r3, [r7, #16]
- 8000f10: 43db mvns r3, r3
- 8000f12: 69ba ldr r2, [r7, #24]
- 8000f14: 4013 ands r3, r2
- 8000f16: 61bb str r3, [r7, #24]
+ 8001076: 693b ldr r3, [r7, #16]
+ 8001078: 43db mvns r3, r3
+ 800107a: 69ba ldr r2, [r7, #24]
+ 800107c: 4013 ands r3, r2
+ 800107e: 61bb str r3, [r7, #24]
if((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
- 8000f18: 683b ldr r3, [r7, #0]
- 8000f1a: 685b ldr r3, [r3, #4]
- 8000f1c: f403 3300 and.w r3, r3, #131072 ; 0x20000
- 8000f20: 2b00 cmp r3, #0
- 8000f22: d003 beq.n 8000f2c <HAL_GPIO_Init+0x2ac>
+ 8001080: 683b ldr r3, [r7, #0]
+ 8001082: 685b ldr r3, [r3, #4]
+ 8001084: f403 3300 and.w r3, r3, #131072 ; 0x20000
+ 8001088: 2b00 cmp r3, #0
+ 800108a: d003 beq.n 8001094 <HAL_GPIO_Init+0x2ac>
{
temp |= iocurrent;
- 8000f24: 69ba ldr r2, [r7, #24]
- 8000f26: 693b ldr r3, [r7, #16]
- 8000f28: 4313 orrs r3, r2
- 8000f2a: 61bb str r3, [r7, #24]
+ 800108c: 69ba ldr r2, [r7, #24]
+ 800108e: 693b ldr r3, [r7, #16]
+ 8001090: 4313 orrs r3, r2
+ 8001092: 61bb str r3, [r7, #24]
}
EXTI->EMR = temp;
- 8000f2c: 4a28 ldr r2, [pc, #160] ; (8000fd0 <HAL_GPIO_Init+0x350>)
- 8000f2e: 69bb ldr r3, [r7, #24]
- 8000f30: 6053 str r3, [r2, #4]
+ 8001094: 4a28 ldr r2, [pc, #160] ; (8001138 <HAL_GPIO_Init+0x350>)
+ 8001096: 69bb ldr r3, [r7, #24]
+ 8001098: 6053 str r3, [r2, #4]
/* Clear Rising Falling edge configuration */
temp = EXTI->RTSR;
- 8000f32: 4b27 ldr r3, [pc, #156] ; (8000fd0 <HAL_GPIO_Init+0x350>)
- 8000f34: 689b ldr r3, [r3, #8]
- 8000f36: 61bb str r3, [r7, #24]
+ 800109a: 4b27 ldr r3, [pc, #156] ; (8001138 <HAL_GPIO_Init+0x350>)
+ 800109c: 689b ldr r3, [r3, #8]
+ 800109e: 61bb str r3, [r7, #24]
temp &= ~((uint32_t)iocurrent);
- 8000f38: 693b ldr r3, [r7, #16]
- 8000f3a: 43db mvns r3, r3
- 8000f3c: 69ba ldr r2, [r7, #24]
- 8000f3e: 4013 ands r3, r2
- 8000f40: 61bb str r3, [r7, #24]
+ 80010a0: 693b ldr r3, [r7, #16]
+ 80010a2: 43db mvns r3, r3
+ 80010a4: 69ba ldr r2, [r7, #24]
+ 80010a6: 4013 ands r3, r2
+ 80010a8: 61bb str r3, [r7, #24]
if((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
- 8000f42: 683b ldr r3, [r7, #0]
- 8000f44: 685b ldr r3, [r3, #4]
- 8000f46: f403 1380 and.w r3, r3, #1048576 ; 0x100000
- 8000f4a: 2b00 cmp r3, #0
- 8000f4c: d003 beq.n 8000f56 <HAL_GPIO_Init+0x2d6>
+ 80010aa: 683b ldr r3, [r7, #0]
+ 80010ac: 685b ldr r3, [r3, #4]
+ 80010ae: f403 1380 and.w r3, r3, #1048576 ; 0x100000
+ 80010b2: 2b00 cmp r3, #0
+ 80010b4: d003 beq.n 80010be <HAL_GPIO_Init+0x2d6>
{
temp |= iocurrent;
- 8000f4e: 69ba ldr r2, [r7, #24]
- 8000f50: 693b ldr r3, [r7, #16]
- 8000f52: 4313 orrs r3, r2
- 8000f54: 61bb str r3, [r7, #24]
+ 80010b6: 69ba ldr r2, [r7, #24]
+ 80010b8: 693b ldr r3, [r7, #16]
+ 80010ba: 4313 orrs r3, r2
+ 80010bc: 61bb str r3, [r7, #24]
}
EXTI->RTSR = temp;
- 8000f56: 4a1e ldr r2, [pc, #120] ; (8000fd0 <HAL_GPIO_Init+0x350>)
- 8000f58: 69bb ldr r3, [r7, #24]
- 8000f5a: 6093 str r3, [r2, #8]
+ 80010be: 4a1e ldr r2, [pc, #120] ; (8001138 <HAL_GPIO_Init+0x350>)
+ 80010c0: 69bb ldr r3, [r7, #24]
+ 80010c2: 6093 str r3, [r2, #8]
temp = EXTI->FTSR;
- 8000f5c: 4b1c ldr r3, [pc, #112] ; (8000fd0 <HAL_GPIO_Init+0x350>)
- 8000f5e: 68db ldr r3, [r3, #12]
- 8000f60: 61bb str r3, [r7, #24]
+ 80010c4: 4b1c ldr r3, [pc, #112] ; (8001138 <HAL_GPIO_Init+0x350>)
+ 80010c6: 68db ldr r3, [r3, #12]
+ 80010c8: 61bb str r3, [r7, #24]
temp &= ~((uint32_t)iocurrent);
- 8000f62: 693b ldr r3, [r7, #16]
- 8000f64: 43db mvns r3, r3
- 8000f66: 69ba ldr r2, [r7, #24]
- 8000f68: 4013 ands r3, r2
- 8000f6a: 61bb str r3, [r7, #24]
+ 80010ca: 693b ldr r3, [r7, #16]
+ 80010cc: 43db mvns r3, r3
+ 80010ce: 69ba ldr r2, [r7, #24]
+ 80010d0: 4013 ands r3, r2
+ 80010d2: 61bb str r3, [r7, #24]
if((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
- 8000f6c: 683b ldr r3, [r7, #0]
- 8000f6e: 685b ldr r3, [r3, #4]
- 8000f70: f403 1300 and.w r3, r3, #2097152 ; 0x200000
- 8000f74: 2b00 cmp r3, #0
- 8000f76: d003 beq.n 8000f80 <HAL_GPIO_Init+0x300>
+ 80010d4: 683b ldr r3, [r7, #0]
+ 80010d6: 685b ldr r3, [r3, #4]
+ 80010d8: f403 1300 and.w r3, r3, #2097152 ; 0x200000
+ 80010dc: 2b00 cmp r3, #0
+ 80010de: d003 beq.n 80010e8 <HAL_GPIO_Init+0x300>
{
temp |= iocurrent;
- 8000f78: 69ba ldr r2, [r7, #24]
- 8000f7a: 693b ldr r3, [r7, #16]
- 8000f7c: 4313 orrs r3, r2
- 8000f7e: 61bb str r3, [r7, #24]
+ 80010e0: 69ba ldr r2, [r7, #24]
+ 80010e2: 693b ldr r3, [r7, #16]
+ 80010e4: 4313 orrs r3, r2
+ 80010e6: 61bb str r3, [r7, #24]
}
EXTI->FTSR = temp;
- 8000f80: 4a13 ldr r2, [pc, #76] ; (8000fd0 <HAL_GPIO_Init+0x350>)
- 8000f82: 69bb ldr r3, [r7, #24]
- 8000f84: 60d3 str r3, [r2, #12]
+ 80010e8: 4a13 ldr r2, [pc, #76] ; (8001138 <HAL_GPIO_Init+0x350>)
+ 80010ea: 69bb ldr r3, [r7, #24]
+ 80010ec: 60d3 str r3, [r2, #12]
for(position = 0; position < GPIO_NUMBER; position++)
- 8000f86: 69fb ldr r3, [r7, #28]
- 8000f88: 3301 adds r3, #1
- 8000f8a: 61fb str r3, [r7, #28]
- 8000f8c: 69fb ldr r3, [r7, #28]
- 8000f8e: 2b0f cmp r3, #15
- 8000f90: f67f ae86 bls.w 8000ca0 <HAL_GPIO_Init+0x20>
+ 80010ee: 69fb ldr r3, [r7, #28]
+ 80010f0: 3301 adds r3, #1
+ 80010f2: 61fb str r3, [r7, #28]
+ 80010f4: 69fb ldr r3, [r7, #28]
+ 80010f6: 2b0f cmp r3, #15
+ 80010f8: f67f ae86 bls.w 8000e08 <HAL_GPIO_Init+0x20>
}
}
}
}
- 8000f94: bf00 nop
- 8000f96: 3724 adds r7, #36 ; 0x24
- 8000f98: 46bd mov sp, r7
- 8000f9a: f85d 7b04 ldr.w r7, [sp], #4
- 8000f9e: 4770 bx lr
- 8000fa0: 40023800 .word 0x40023800
- 8000fa4: 40013800 .word 0x40013800
- 8000fa8: 40020000 .word 0x40020000
- 8000fac: 40020400 .word 0x40020400
- 8000fb0: 40020800 .word 0x40020800
- 8000fb4: 40020c00 .word 0x40020c00
- 8000fb8: 40021000 .word 0x40021000
- 8000fbc: 40021400 .word 0x40021400
- 8000fc0: 40021800 .word 0x40021800
- 8000fc4: 40021c00 .word 0x40021c00
- 8000fc8: 40022000 .word 0x40022000
- 8000fcc: 40022400 .word 0x40022400
- 8000fd0: 40013c00 .word 0x40013c00
-
-08000fd4 <HAL_RCC_OscConfig>:
+ 80010fc: bf00 nop
+ 80010fe: 3724 adds r7, #36 ; 0x24
+ 8001100: 46bd mov sp, r7
+ 8001102: f85d 7b04 ldr.w r7, [sp], #4
+ 8001106: 4770 bx lr
+ 8001108: 40023800 .word 0x40023800
+ 800110c: 40013800 .word 0x40013800
+ 8001110: 40020000 .word 0x40020000
+ 8001114: 40020400 .word 0x40020400
+ 8001118: 40020800 .word 0x40020800
+ 800111c: 40020c00 .word 0x40020c00
+ 8001120: 40021000 .word 0x40021000
+ 8001124: 40021400 .word 0x40021400
+ 8001128: 40021800 .word 0x40021800
+ 800112c: 40021c00 .word 0x40021c00
+ 8001130: 40022000 .word 0x40022000
+ 8001134: 40022400 .word 0x40022400
+ 8001138: 40013c00 .word 0x40013c00
+
+0800113c <HAL_RCC_OscConfig>:
* supported by this function. User should request a transition to HSE Off
* first and then HSE On or HSE Bypass.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
{
- 8000fd4: b580 push {r7, lr}
- 8000fd6: b086 sub sp, #24
- 8000fd8: af00 add r7, sp, #0
- 8000fda: 6078 str r0, [r7, #4]
+ 800113c: b580 push {r7, lr}
+ 800113e: b086 sub sp, #24
+ 8001140: af00 add r7, sp, #0
+ 8001142: 6078 str r0, [r7, #4]
uint32_t tickstart;
FlagStatus pwrclkchanged = RESET;
- 8000fdc: 2300 movs r3, #0
- 8000fde: 75fb strb r3, [r7, #23]
+ 8001144: 2300 movs r3, #0
+ 8001146: 75fb strb r3, [r7, #23]
/* Check Null pointer */
if(RCC_OscInitStruct == NULL)
- 8000fe0: 687b ldr r3, [r7, #4]
- 8000fe2: 2b00 cmp r3, #0
- 8000fe4: d101 bne.n 8000fea <HAL_RCC_OscConfig+0x16>
+ 8001148: 687b ldr r3, [r7, #4]
+ 800114a: 2b00 cmp r3, #0
+ 800114c: d101 bne.n 8001152 <HAL_RCC_OscConfig+0x16>
{
return HAL_ERROR;
- 8000fe6: 2301 movs r3, #1
- 8000fe8: e25e b.n 80014a8 <HAL_RCC_OscConfig+0x4d4>
+ 800114e: 2301 movs r3, #1
+ 8001150: e25e b.n 8001610 <HAL_RCC_OscConfig+0x4d4>
/* Check the parameters */
assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
/*------------------------------- HSE Configuration ------------------------*/
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
- 8000fea: 687b ldr r3, [r7, #4]
- 8000fec: 681b ldr r3, [r3, #0]
- 8000fee: f003 0301 and.w r3, r3, #1
- 8000ff2: 2b00 cmp r3, #0
- 8000ff4: f000 8087 beq.w 8001106 <HAL_RCC_OscConfig+0x132>
+ 8001152: 687b ldr r3, [r7, #4]
+ 8001154: 681b ldr r3, [r3, #0]
+ 8001156: f003 0301 and.w r3, r3, #1
+ 800115a: 2b00 cmp r3, #0
+ 800115c: f000 8087 beq.w 800126e <HAL_RCC_OscConfig+0x132>
{
/* Check the parameters */
assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
/* When the HSE is used as system clock or clock source for PLL, It can not be disabled */
if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE)
- 8000ff8: 4b96 ldr r3, [pc, #600] ; (8001254 <HAL_RCC_OscConfig+0x280>)
- 8000ffa: 689b ldr r3, [r3, #8]
- 8000ffc: f003 030c and.w r3, r3, #12
- 8001000: 2b04 cmp r3, #4
- 8001002: d00c beq.n 800101e <HAL_RCC_OscConfig+0x4a>
+ 8001160: 4b96 ldr r3, [pc, #600] ; (80013bc <HAL_RCC_OscConfig+0x280>)
+ 8001162: 689b ldr r3, [r3, #8]
+ 8001164: f003 030c and.w r3, r3, #12
+ 8001168: 2b04 cmp r3, #4
+ 800116a: d00c beq.n 8001186 <HAL_RCC_OscConfig+0x4a>
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)))
- 8001004: 4b93 ldr r3, [pc, #588] ; (8001254 <HAL_RCC_OscConfig+0x280>)
- 8001006: 689b ldr r3, [r3, #8]
- 8001008: f003 030c and.w r3, r3, #12
- 800100c: 2b08 cmp r3, #8
- 800100e: d112 bne.n 8001036 <HAL_RCC_OscConfig+0x62>
- 8001010: 4b90 ldr r3, [pc, #576] ; (8001254 <HAL_RCC_OscConfig+0x280>)
- 8001012: 685b ldr r3, [r3, #4]
- 8001014: f403 0380 and.w r3, r3, #4194304 ; 0x400000
- 8001018: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000
- 800101c: d10b bne.n 8001036 <HAL_RCC_OscConfig+0x62>
+ 800116c: 4b93 ldr r3, [pc, #588] ; (80013bc <HAL_RCC_OscConfig+0x280>)
+ 800116e: 689b ldr r3, [r3, #8]
+ 8001170: f003 030c and.w r3, r3, #12
+ 8001174: 2b08 cmp r3, #8
+ 8001176: d112 bne.n 800119e <HAL_RCC_OscConfig+0x62>
+ 8001178: 4b90 ldr r3, [pc, #576] ; (80013bc <HAL_RCC_OscConfig+0x280>)
+ 800117a: 685b ldr r3, [r3, #4]
+ 800117c: f403 0380 and.w r3, r3, #4194304 ; 0x400000
+ 8001180: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000
+ 8001184: d10b bne.n 800119e <HAL_RCC_OscConfig+0x62>
{
if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
- 800101e: 4b8d ldr r3, [pc, #564] ; (8001254 <HAL_RCC_OscConfig+0x280>)
- 8001020: 681b ldr r3, [r3, #0]
- 8001022: f403 3300 and.w r3, r3, #131072 ; 0x20000
- 8001026: 2b00 cmp r3, #0
- 8001028: d06c beq.n 8001104 <HAL_RCC_OscConfig+0x130>
- 800102a: 687b ldr r3, [r7, #4]
- 800102c: 685b ldr r3, [r3, #4]
- 800102e: 2b00 cmp r3, #0
- 8001030: d168 bne.n 8001104 <HAL_RCC_OscConfig+0x130>
+ 8001186: 4b8d ldr r3, [pc, #564] ; (80013bc <HAL_RCC_OscConfig+0x280>)
+ 8001188: 681b ldr r3, [r3, #0]
+ 800118a: f403 3300 and.w r3, r3, #131072 ; 0x20000
+ 800118e: 2b00 cmp r3, #0
+ 8001190: d06c beq.n 800126c <HAL_RCC_OscConfig+0x130>
+ 8001192: 687b ldr r3, [r7, #4]
+ 8001194: 685b ldr r3, [r3, #4]
+ 8001196: 2b00 cmp r3, #0
+ 8001198: d168 bne.n 800126c <HAL_RCC_OscConfig+0x130>
{
return HAL_ERROR;
- 8001032: 2301 movs r3, #1
- 8001034: e238 b.n 80014a8 <HAL_RCC_OscConfig+0x4d4>
+ 800119a: 2301 movs r3, #1
+ 800119c: e238 b.n 8001610 <HAL_RCC_OscConfig+0x4d4>
}
}
else
{
/* Set the new HSE configuration ---------------------------------------*/
__HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
- 8001036: 687b ldr r3, [r7, #4]
- 8001038: 685b ldr r3, [r3, #4]
- 800103a: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
- 800103e: d106 bne.n 800104e <HAL_RCC_OscConfig+0x7a>
- 8001040: 4b84 ldr r3, [pc, #528] ; (8001254 <HAL_RCC_OscConfig+0x280>)
- 8001042: 681b ldr r3, [r3, #0]
- 8001044: 4a83 ldr r2, [pc, #524] ; (8001254 <HAL_RCC_OscConfig+0x280>)
- 8001046: f443 3380 orr.w r3, r3, #65536 ; 0x10000
- 800104a: 6013 str r3, [r2, #0]
- 800104c: e02e b.n 80010ac <HAL_RCC_OscConfig+0xd8>
- 800104e: 687b ldr r3, [r7, #4]
- 8001050: 685b ldr r3, [r3, #4]
- 8001052: 2b00 cmp r3, #0
- 8001054: d10c bne.n 8001070 <HAL_RCC_OscConfig+0x9c>
- 8001056: 4b7f ldr r3, [pc, #508] ; (8001254 <HAL_RCC_OscConfig+0x280>)
- 8001058: 681b ldr r3, [r3, #0]
- 800105a: 4a7e ldr r2, [pc, #504] ; (8001254 <HAL_RCC_OscConfig+0x280>)
- 800105c: f423 3380 bic.w r3, r3, #65536 ; 0x10000
- 8001060: 6013 str r3, [r2, #0]
- 8001062: 4b7c ldr r3, [pc, #496] ; (8001254 <HAL_RCC_OscConfig+0x280>)
- 8001064: 681b ldr r3, [r3, #0]
- 8001066: 4a7b ldr r2, [pc, #492] ; (8001254 <HAL_RCC_OscConfig+0x280>)
- 8001068: f423 2380 bic.w r3, r3, #262144 ; 0x40000
- 800106c: 6013 str r3, [r2, #0]
- 800106e: e01d b.n 80010ac <HAL_RCC_OscConfig+0xd8>
- 8001070: 687b ldr r3, [r7, #4]
- 8001072: 685b ldr r3, [r3, #4]
- 8001074: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000
- 8001078: d10c bne.n 8001094 <HAL_RCC_OscConfig+0xc0>
- 800107a: 4b76 ldr r3, [pc, #472] ; (8001254 <HAL_RCC_OscConfig+0x280>)
- 800107c: 681b ldr r3, [r3, #0]
- 800107e: 4a75 ldr r2, [pc, #468] ; (8001254 <HAL_RCC_OscConfig+0x280>)
- 8001080: f443 2380 orr.w r3, r3, #262144 ; 0x40000
- 8001084: 6013 str r3, [r2, #0]
- 8001086: 4b73 ldr r3, [pc, #460] ; (8001254 <HAL_RCC_OscConfig+0x280>)
- 8001088: 681b ldr r3, [r3, #0]
- 800108a: 4a72 ldr r2, [pc, #456] ; (8001254 <HAL_RCC_OscConfig+0x280>)
- 800108c: f443 3380 orr.w r3, r3, #65536 ; 0x10000
- 8001090: 6013 str r3, [r2, #0]
- 8001092: e00b b.n 80010ac <HAL_RCC_OscConfig+0xd8>
- 8001094: 4b6f ldr r3, [pc, #444] ; (8001254 <HAL_RCC_OscConfig+0x280>)
- 8001096: 681b ldr r3, [r3, #0]
- 8001098: 4a6e ldr r2, [pc, #440] ; (8001254 <HAL_RCC_OscConfig+0x280>)
- 800109a: f423 3380 bic.w r3, r3, #65536 ; 0x10000
- 800109e: 6013 str r3, [r2, #0]
- 80010a0: 4b6c ldr r3, [pc, #432] ; (8001254 <HAL_RCC_OscConfig+0x280>)
- 80010a2: 681b ldr r3, [r3, #0]
- 80010a4: 4a6b ldr r2, [pc, #428] ; (8001254 <HAL_RCC_OscConfig+0x280>)
- 80010a6: f423 2380 bic.w r3, r3, #262144 ; 0x40000
- 80010aa: 6013 str r3, [r2, #0]
+ 800119e: 687b ldr r3, [r7, #4]
+ 80011a0: 685b ldr r3, [r3, #4]
+ 80011a2: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
+ 80011a6: d106 bne.n 80011b6 <HAL_RCC_OscConfig+0x7a>
+ 80011a8: 4b84 ldr r3, [pc, #528] ; (80013bc <HAL_RCC_OscConfig+0x280>)
+ 80011aa: 681b ldr r3, [r3, #0]
+ 80011ac: 4a83 ldr r2, [pc, #524] ; (80013bc <HAL_RCC_OscConfig+0x280>)
+ 80011ae: f443 3380 orr.w r3, r3, #65536 ; 0x10000
+ 80011b2: 6013 str r3, [r2, #0]
+ 80011b4: e02e b.n 8001214 <HAL_RCC_OscConfig+0xd8>
+ 80011b6: 687b ldr r3, [r7, #4]
+ 80011b8: 685b ldr r3, [r3, #4]
+ 80011ba: 2b00 cmp r3, #0
+ 80011bc: d10c bne.n 80011d8 <HAL_RCC_OscConfig+0x9c>
+ 80011be: 4b7f ldr r3, [pc, #508] ; (80013bc <HAL_RCC_OscConfig+0x280>)
+ 80011c0: 681b ldr r3, [r3, #0]
+ 80011c2: 4a7e ldr r2, [pc, #504] ; (80013bc <HAL_RCC_OscConfig+0x280>)
+ 80011c4: f423 3380 bic.w r3, r3, #65536 ; 0x10000
+ 80011c8: 6013 str r3, [r2, #0]
+ 80011ca: 4b7c ldr r3, [pc, #496] ; (80013bc <HAL_RCC_OscConfig+0x280>)
+ 80011cc: 681b ldr r3, [r3, #0]
+ 80011ce: 4a7b ldr r2, [pc, #492] ; (80013bc <HAL_RCC_OscConfig+0x280>)
+ 80011d0: f423 2380 bic.w r3, r3, #262144 ; 0x40000
+ 80011d4: 6013 str r3, [r2, #0]
+ 80011d6: e01d b.n 8001214 <HAL_RCC_OscConfig+0xd8>
+ 80011d8: 687b ldr r3, [r7, #4]
+ 80011da: 685b ldr r3, [r3, #4]
+ 80011dc: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000
+ 80011e0: d10c bne.n 80011fc <HAL_RCC_OscConfig+0xc0>
+ 80011e2: 4b76 ldr r3, [pc, #472] ; (80013bc <HAL_RCC_OscConfig+0x280>)
+ 80011e4: 681b ldr r3, [r3, #0]
+ 80011e6: 4a75 ldr r2, [pc, #468] ; (80013bc <HAL_RCC_OscConfig+0x280>)
+ 80011e8: f443 2380 orr.w r3, r3, #262144 ; 0x40000
+ 80011ec: 6013 str r3, [r2, #0]
+ 80011ee: 4b73 ldr r3, [pc, #460] ; (80013bc <HAL_RCC_OscConfig+0x280>)
+ 80011f0: 681b ldr r3, [r3, #0]
+ 80011f2: 4a72 ldr r2, [pc, #456] ; (80013bc <HAL_RCC_OscConfig+0x280>)
+ 80011f4: f443 3380 orr.w r3, r3, #65536 ; 0x10000
+ 80011f8: 6013 str r3, [r2, #0]
+ 80011fa: e00b b.n 8001214 <HAL_RCC_OscConfig+0xd8>
+ 80011fc: 4b6f ldr r3, [pc, #444] ; (80013bc <HAL_RCC_OscConfig+0x280>)
+ 80011fe: 681b ldr r3, [r3, #0]
+ 8001200: 4a6e ldr r2, [pc, #440] ; (80013bc <HAL_RCC_OscConfig+0x280>)
+ 8001202: f423 3380 bic.w r3, r3, #65536 ; 0x10000
+ 8001206: 6013 str r3, [r2, #0]
+ 8001208: 4b6c ldr r3, [pc, #432] ; (80013bc <HAL_RCC_OscConfig+0x280>)
+ 800120a: 681b ldr r3, [r3, #0]
+ 800120c: 4a6b ldr r2, [pc, #428] ; (80013bc <HAL_RCC_OscConfig+0x280>)
+ 800120e: f423 2380 bic.w r3, r3, #262144 ; 0x40000
+ 8001212: 6013 str r3, [r2, #0]
/* Check the HSE State */
if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
- 80010ac: 687b ldr r3, [r7, #4]
- 80010ae: 685b ldr r3, [r3, #4]
- 80010b0: 2b00 cmp r3, #0
- 80010b2: d013 beq.n 80010dc <HAL_RCC_OscConfig+0x108>
+ 8001214: 687b ldr r3, [r7, #4]
+ 8001216: 685b ldr r3, [r3, #4]
+ 8001218: 2b00 cmp r3, #0
+ 800121a: d013 beq.n 8001244 <HAL_RCC_OscConfig+0x108>
{
/* Get Start Tick*/
tickstart = HAL_GetTick();
- 80010b4: f7ff fcd0 bl 8000a58 <HAL_GetTick>
- 80010b8: 6138 str r0, [r7, #16]
+ 800121c: f7ff fca4 bl 8000b68 <HAL_GetTick>
+ 8001220: 6138 str r0, [r7, #16]
/* Wait till HSE is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
- 80010ba: e008 b.n 80010ce <HAL_RCC_OscConfig+0xfa>
+ 8001222: e008 b.n 8001236 <HAL_RCC_OscConfig+0xfa>
{
if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
- 80010bc: f7ff fccc bl 8000a58 <HAL_GetTick>
- 80010c0: 4602 mov r2, r0
- 80010c2: 693b ldr r3, [r7, #16]
- 80010c4: 1ad3 subs r3, r2, r3
- 80010c6: 2b64 cmp r3, #100 ; 0x64
- 80010c8: d901 bls.n 80010ce <HAL_RCC_OscConfig+0xfa>
+ 8001224: f7ff fca0 bl 8000b68 <HAL_GetTick>
+ 8001228: 4602 mov r2, r0
+ 800122a: 693b ldr r3, [r7, #16]
+ 800122c: 1ad3 subs r3, r2, r3
+ 800122e: 2b64 cmp r3, #100 ; 0x64
+ 8001230: d901 bls.n 8001236 <HAL_RCC_OscConfig+0xfa>
{
return HAL_TIMEOUT;
- 80010ca: 2303 movs r3, #3
- 80010cc: e1ec b.n 80014a8 <HAL_RCC_OscConfig+0x4d4>
+ 8001232: 2303 movs r3, #3
+ 8001234: e1ec b.n 8001610 <HAL_RCC_OscConfig+0x4d4>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
- 80010ce: 4b61 ldr r3, [pc, #388] ; (8001254 <HAL_RCC_OscConfig+0x280>)
- 80010d0: 681b ldr r3, [r3, #0]
- 80010d2: f403 3300 and.w r3, r3, #131072 ; 0x20000
- 80010d6: 2b00 cmp r3, #0
- 80010d8: d0f0 beq.n 80010bc <HAL_RCC_OscConfig+0xe8>
- 80010da: e014 b.n 8001106 <HAL_RCC_OscConfig+0x132>
+ 8001236: 4b61 ldr r3, [pc, #388] ; (80013bc <HAL_RCC_OscConfig+0x280>)
+ 8001238: 681b ldr r3, [r3, #0]
+ 800123a: f403 3300 and.w r3, r3, #131072 ; 0x20000
+ 800123e: 2b00 cmp r3, #0
+ 8001240: d0f0 beq.n 8001224 <HAL_RCC_OscConfig+0xe8>
+ 8001242: e014 b.n 800126e <HAL_RCC_OscConfig+0x132>
}
}
else
{
/* Get Start Tick*/
tickstart = HAL_GetTick();
- 80010dc: f7ff fcbc bl 8000a58 <HAL_GetTick>
- 80010e0: 6138 str r0, [r7, #16]
+ 8001244: f7ff fc90 bl 8000b68 <HAL_GetTick>
+ 8001248: 6138 str r0, [r7, #16]
/* Wait till HSE is bypassed or disabled */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
- 80010e2: e008 b.n 80010f6 <HAL_RCC_OscConfig+0x122>
+ 800124a: e008 b.n 800125e <HAL_RCC_OscConfig+0x122>
{
if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
- 80010e4: f7ff fcb8 bl 8000a58 <HAL_GetTick>
- 80010e8: 4602 mov r2, r0
- 80010ea: 693b ldr r3, [r7, #16]
- 80010ec: 1ad3 subs r3, r2, r3
- 80010ee: 2b64 cmp r3, #100 ; 0x64
- 80010f0: d901 bls.n 80010f6 <HAL_RCC_OscConfig+0x122>
+ 800124c: f7ff fc8c bl 8000b68 <HAL_GetTick>
+ 8001250: 4602 mov r2, r0
+ 8001252: 693b ldr r3, [r7, #16]
+ 8001254: 1ad3 subs r3, r2, r3
+ 8001256: 2b64 cmp r3, #100 ; 0x64
+ 8001258: d901 bls.n 800125e <HAL_RCC_OscConfig+0x122>
{
return HAL_TIMEOUT;
- 80010f2: 2303 movs r3, #3
- 80010f4: e1d8 b.n 80014a8 <HAL_RCC_OscConfig+0x4d4>
+ 800125a: 2303 movs r3, #3
+ 800125c: e1d8 b.n 8001610 <HAL_RCC_OscConfig+0x4d4>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
- 80010f6: 4b57 ldr r3, [pc, #348] ; (8001254 <HAL_RCC_OscConfig+0x280>)
- 80010f8: 681b ldr r3, [r3, #0]
- 80010fa: f403 3300 and.w r3, r3, #131072 ; 0x20000
- 80010fe: 2b00 cmp r3, #0
- 8001100: d1f0 bne.n 80010e4 <HAL_RCC_OscConfig+0x110>
- 8001102: e000 b.n 8001106 <HAL_RCC_OscConfig+0x132>
+ 800125e: 4b57 ldr r3, [pc, #348] ; (80013bc <HAL_RCC_OscConfig+0x280>)
+ 8001260: 681b ldr r3, [r3, #0]
+ 8001262: f403 3300 and.w r3, r3, #131072 ; 0x20000
+ 8001266: 2b00 cmp r3, #0
+ 8001268: d1f0 bne.n 800124c <HAL_RCC_OscConfig+0x110>
+ 800126a: e000 b.n 800126e <HAL_RCC_OscConfig+0x132>
if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
- 8001104: bf00 nop
+ 800126c: bf00 nop
}
}
}
}
/*----------------------------- HSI Configuration --------------------------*/
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
- 8001106: 687b ldr r3, [r7, #4]
- 8001108: 681b ldr r3, [r3, #0]
- 800110a: f003 0302 and.w r3, r3, #2
- 800110e: 2b00 cmp r3, #0
- 8001110: d069 beq.n 80011e6 <HAL_RCC_OscConfig+0x212>
+ 800126e: 687b ldr r3, [r7, #4]
+ 8001270: 681b ldr r3, [r3, #0]
+ 8001272: f003 0302 and.w r3, r3, #2
+ 8001276: 2b00 cmp r3, #0
+ 8001278: d069 beq.n 800134e <HAL_RCC_OscConfig+0x212>
/* Check the parameters */
assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
/* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI)
- 8001112: 4b50 ldr r3, [pc, #320] ; (8001254 <HAL_RCC_OscConfig+0x280>)
- 8001114: 689b ldr r3, [r3, #8]
- 8001116: f003 030c and.w r3, r3, #12
- 800111a: 2b00 cmp r3, #0
- 800111c: d00b beq.n 8001136 <HAL_RCC_OscConfig+0x162>
+ 800127a: 4b50 ldr r3, [pc, #320] ; (80013bc <HAL_RCC_OscConfig+0x280>)
+ 800127c: 689b ldr r3, [r3, #8]
+ 800127e: f003 030c and.w r3, r3, #12
+ 8001282: 2b00 cmp r3, #0
+ 8001284: d00b beq.n 800129e <HAL_RCC_OscConfig+0x162>
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)))
- 800111e: 4b4d ldr r3, [pc, #308] ; (8001254 <HAL_RCC_OscConfig+0x280>)
- 8001120: 689b ldr r3, [r3, #8]
- 8001122: f003 030c and.w r3, r3, #12
- 8001126: 2b08 cmp r3, #8
- 8001128: d11c bne.n 8001164 <HAL_RCC_OscConfig+0x190>
- 800112a: 4b4a ldr r3, [pc, #296] ; (8001254 <HAL_RCC_OscConfig+0x280>)
- 800112c: 685b ldr r3, [r3, #4]
- 800112e: f403 0380 and.w r3, r3, #4194304 ; 0x400000
- 8001132: 2b00 cmp r3, #0
- 8001134: d116 bne.n 8001164 <HAL_RCC_OscConfig+0x190>
+ 8001286: 4b4d ldr r3, [pc, #308] ; (80013bc <HAL_RCC_OscConfig+0x280>)
+ 8001288: 689b ldr r3, [r3, #8]
+ 800128a: f003 030c and.w r3, r3, #12
+ 800128e: 2b08 cmp r3, #8
+ 8001290: d11c bne.n 80012cc <HAL_RCC_OscConfig+0x190>
+ 8001292: 4b4a ldr r3, [pc, #296] ; (80013bc <HAL_RCC_OscConfig+0x280>)
+ 8001294: 685b ldr r3, [r3, #4]
+ 8001296: f403 0380 and.w r3, r3, #4194304 ; 0x400000
+ 800129a: 2b00 cmp r3, #0
+ 800129c: d116 bne.n 80012cc <HAL_RCC_OscConfig+0x190>
{
/* When HSI is used as system clock it will not disabled */
if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
- 8001136: 4b47 ldr r3, [pc, #284] ; (8001254 <HAL_RCC_OscConfig+0x280>)
- 8001138: 681b ldr r3, [r3, #0]
- 800113a: f003 0302 and.w r3, r3, #2
- 800113e: 2b00 cmp r3, #0
- 8001140: d005 beq.n 800114e <HAL_RCC_OscConfig+0x17a>
- 8001142: 687b ldr r3, [r7, #4]
- 8001144: 68db ldr r3, [r3, #12]
- 8001146: 2b01 cmp r3, #1
- 8001148: d001 beq.n 800114e <HAL_RCC_OscConfig+0x17a>
+ 800129e: 4b47 ldr r3, [pc, #284] ; (80013bc <HAL_RCC_OscConfig+0x280>)
+ 80012a0: 681b ldr r3, [r3, #0]
+ 80012a2: f003 0302 and.w r3, r3, #2
+ 80012a6: 2b00 cmp r3, #0
+ 80012a8: d005 beq.n 80012b6 <HAL_RCC_OscConfig+0x17a>
+ 80012aa: 687b ldr r3, [r7, #4]
+ 80012ac: 68db ldr r3, [r3, #12]
+ 80012ae: 2b01 cmp r3, #1
+ 80012b0: d001 beq.n 80012b6 <HAL_RCC_OscConfig+0x17a>
{
return HAL_ERROR;
- 800114a: 2301 movs r3, #1
- 800114c: e1ac b.n 80014a8 <HAL_RCC_OscConfig+0x4d4>
+ 80012b2: 2301 movs r3, #1
+ 80012b4: e1ac b.n 8001610 <HAL_RCC_OscConfig+0x4d4>
}
/* Otherwise, just the calibration is allowed */
else
{
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
- 800114e: 4b41 ldr r3, [pc, #260] ; (8001254 <HAL_RCC_OscConfig+0x280>)
- 8001150: 681b ldr r3, [r3, #0]
- 8001152: f023 02f8 bic.w r2, r3, #248 ; 0xf8
- 8001156: 687b ldr r3, [r7, #4]
- 8001158: 691b ldr r3, [r3, #16]
- 800115a: 00db lsls r3, r3, #3
- 800115c: 493d ldr r1, [pc, #244] ; (8001254 <HAL_RCC_OscConfig+0x280>)
- 800115e: 4313 orrs r3, r2
- 8001160: 600b str r3, [r1, #0]
+ 80012b6: 4b41 ldr r3, [pc, #260] ; (80013bc <HAL_RCC_OscConfig+0x280>)
+ 80012b8: 681b ldr r3, [r3, #0]
+ 80012ba: f023 02f8 bic.w r2, r3, #248 ; 0xf8
+ 80012be: 687b ldr r3, [r7, #4]
+ 80012c0: 691b ldr r3, [r3, #16]
+ 80012c2: 00db lsls r3, r3, #3
+ 80012c4: 493d ldr r1, [pc, #244] ; (80013bc <HAL_RCC_OscConfig+0x280>)
+ 80012c6: 4313 orrs r3, r2
+ 80012c8: 600b str r3, [r1, #0]
if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
- 8001162: e040 b.n 80011e6 <HAL_RCC_OscConfig+0x212>
+ 80012ca: e040 b.n 800134e <HAL_RCC_OscConfig+0x212>
}
}
else
{
/* Check the HSI State */
if((RCC_OscInitStruct->HSIState)!= RCC_HSI_OFF)
- 8001164: 687b ldr r3, [r7, #4]
- 8001166: 68db ldr r3, [r3, #12]
- 8001168: 2b00 cmp r3, #0
- 800116a: d023 beq.n 80011b4 <HAL_RCC_OscConfig+0x1e0>
+ 80012cc: 687b ldr r3, [r7, #4]
+ 80012ce: 68db ldr r3, [r3, #12]
+ 80012d0: 2b00 cmp r3, #0
+ 80012d2: d023 beq.n 800131c <HAL_RCC_OscConfig+0x1e0>
{
/* Enable the Internal High Speed oscillator (HSI). */
__HAL_RCC_HSI_ENABLE();
- 800116c: 4b39 ldr r3, [pc, #228] ; (8001254 <HAL_RCC_OscConfig+0x280>)
- 800116e: 681b ldr r3, [r3, #0]
- 8001170: 4a38 ldr r2, [pc, #224] ; (8001254 <HAL_RCC_OscConfig+0x280>)
- 8001172: f043 0301 orr.w r3, r3, #1
- 8001176: 6013 str r3, [r2, #0]
+ 80012d4: 4b39 ldr r3, [pc, #228] ; (80013bc <HAL_RCC_OscConfig+0x280>)
+ 80012d6: 681b ldr r3, [r3, #0]
+ 80012d8: 4a38 ldr r2, [pc, #224] ; (80013bc <HAL_RCC_OscConfig+0x280>)
+ 80012da: f043 0301 orr.w r3, r3, #1
+ 80012de: 6013 str r3, [r2, #0]
/* Get Start Tick*/
tickstart = HAL_GetTick();
- 8001178: f7ff fc6e bl 8000a58 <HAL_GetTick>
- 800117c: 6138 str r0, [r7, #16]
+ 80012e0: f7ff fc42 bl 8000b68 <HAL_GetTick>
+ 80012e4: 6138 str r0, [r7, #16]
/* Wait till HSI is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
- 800117e: e008 b.n 8001192 <HAL_RCC_OscConfig+0x1be>
+ 80012e6: e008 b.n 80012fa <HAL_RCC_OscConfig+0x1be>
{
if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
- 8001180: f7ff fc6a bl 8000a58 <HAL_GetTick>
- 8001184: 4602 mov r2, r0
- 8001186: 693b ldr r3, [r7, #16]
- 8001188: 1ad3 subs r3, r2, r3
- 800118a: 2b02 cmp r3, #2
- 800118c: d901 bls.n 8001192 <HAL_RCC_OscConfig+0x1be>
+ 80012e8: f7ff fc3e bl 8000b68 <HAL_GetTick>
+ 80012ec: 4602 mov r2, r0
+ 80012ee: 693b ldr r3, [r7, #16]
+ 80012f0: 1ad3 subs r3, r2, r3
+ 80012f2: 2b02 cmp r3, #2
+ 80012f4: d901 bls.n 80012fa <HAL_RCC_OscConfig+0x1be>
{
return HAL_TIMEOUT;
- 800118e: 2303 movs r3, #3
- 8001190: e18a b.n 80014a8 <HAL_RCC_OscConfig+0x4d4>
+ 80012f6: 2303 movs r3, #3
+ 80012f8: e18a b.n 8001610 <HAL_RCC_OscConfig+0x4d4>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
- 8001192: 4b30 ldr r3, [pc, #192] ; (8001254 <HAL_RCC_OscConfig+0x280>)
- 8001194: 681b ldr r3, [r3, #0]
- 8001196: f003 0302 and.w r3, r3, #2
- 800119a: 2b00 cmp r3, #0
- 800119c: d0f0 beq.n 8001180 <HAL_RCC_OscConfig+0x1ac>
+ 80012fa: 4b30 ldr r3, [pc, #192] ; (80013bc <HAL_RCC_OscConfig+0x280>)
+ 80012fc: 681b ldr r3, [r3, #0]
+ 80012fe: f003 0302 and.w r3, r3, #2
+ 8001302: 2b00 cmp r3, #0
+ 8001304: d0f0 beq.n 80012e8 <HAL_RCC_OscConfig+0x1ac>
}
}
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
- 800119e: 4b2d ldr r3, [pc, #180] ; (8001254 <HAL_RCC_OscConfig+0x280>)
- 80011a0: 681b ldr r3, [r3, #0]
- 80011a2: f023 02f8 bic.w r2, r3, #248 ; 0xf8
- 80011a6: 687b ldr r3, [r7, #4]
- 80011a8: 691b ldr r3, [r3, #16]
- 80011aa: 00db lsls r3, r3, #3
- 80011ac: 4929 ldr r1, [pc, #164] ; (8001254 <HAL_RCC_OscConfig+0x280>)
- 80011ae: 4313 orrs r3, r2
- 80011b0: 600b str r3, [r1, #0]
- 80011b2: e018 b.n 80011e6 <HAL_RCC_OscConfig+0x212>
+ 8001306: 4b2d ldr r3, [pc, #180] ; (80013bc <HAL_RCC_OscConfig+0x280>)
+ 8001308: 681b ldr r3, [r3, #0]
+ 800130a: f023 02f8 bic.w r2, r3, #248 ; 0xf8
+ 800130e: 687b ldr r3, [r7, #4]
+ 8001310: 691b ldr r3, [r3, #16]
+ 8001312: 00db lsls r3, r3, #3
+ 8001314: 4929 ldr r1, [pc, #164] ; (80013bc <HAL_RCC_OscConfig+0x280>)
+ 8001316: 4313 orrs r3, r2
+ 8001318: 600b str r3, [r1, #0]
+ 800131a: e018 b.n 800134e <HAL_RCC_OscConfig+0x212>
}
else
{
/* Disable the Internal High Speed oscillator (HSI). */
__HAL_RCC_HSI_DISABLE();
- 80011b4: 4b27 ldr r3, [pc, #156] ; (8001254 <HAL_RCC_OscConfig+0x280>)
- 80011b6: 681b ldr r3, [r3, #0]
- 80011b8: 4a26 ldr r2, [pc, #152] ; (8001254 <HAL_RCC_OscConfig+0x280>)
- 80011ba: f023 0301 bic.w r3, r3, #1
- 80011be: 6013 str r3, [r2, #0]
+ 800131c: 4b27 ldr r3, [pc, #156] ; (80013bc <HAL_RCC_OscConfig+0x280>)
+ 800131e: 681b ldr r3, [r3, #0]
+ 8001320: 4a26 ldr r2, [pc, #152] ; (80013bc <HAL_RCC_OscConfig+0x280>)
+ 8001322: f023 0301 bic.w r3, r3, #1
+ 8001326: 6013 str r3, [r2, #0]
/* Get Start Tick*/
tickstart = HAL_GetTick();
- 80011c0: f7ff fc4a bl 8000a58 <HAL_GetTick>
- 80011c4: 6138 str r0, [r7, #16]
+ 8001328: f7ff fc1e bl 8000b68 <HAL_GetTick>
+ 800132c: 6138 str r0, [r7, #16]
/* Wait till HSI is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
- 80011c6: e008 b.n 80011da <HAL_RCC_OscConfig+0x206>
+ 800132e: e008 b.n 8001342 <HAL_RCC_OscConfig+0x206>
{
if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
- 80011c8: f7ff fc46 bl 8000a58 <HAL_GetTick>
- 80011cc: 4602 mov r2, r0
- 80011ce: 693b ldr r3, [r7, #16]
- 80011d0: 1ad3 subs r3, r2, r3
- 80011d2: 2b02 cmp r3, #2
- 80011d4: d901 bls.n 80011da <HAL_RCC_OscConfig+0x206>
+ 8001330: f7ff fc1a bl 8000b68 <HAL_GetTick>
+ 8001334: 4602 mov r2, r0
+ 8001336: 693b ldr r3, [r7, #16]
+ 8001338: 1ad3 subs r3, r2, r3
+ 800133a: 2b02 cmp r3, #2
+ 800133c: d901 bls.n 8001342 <HAL_RCC_OscConfig+0x206>
{
return HAL_TIMEOUT;
- 80011d6: 2303 movs r3, #3
- 80011d8: e166 b.n 80014a8 <HAL_RCC_OscConfig+0x4d4>
+ 800133e: 2303 movs r3, #3
+ 8001340: e166 b.n 8001610 <HAL_RCC_OscConfig+0x4d4>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
- 80011da: 4b1e ldr r3, [pc, #120] ; (8001254 <HAL_RCC_OscConfig+0x280>)
- 80011dc: 681b ldr r3, [r3, #0]
- 80011de: f003 0302 and.w r3, r3, #2
- 80011e2: 2b00 cmp r3, #0
- 80011e4: d1f0 bne.n 80011c8 <HAL_RCC_OscConfig+0x1f4>
+ 8001342: 4b1e ldr r3, [pc, #120] ; (80013bc <HAL_RCC_OscConfig+0x280>)
+ 8001344: 681b ldr r3, [r3, #0]
+ 8001346: f003 0302 and.w r3, r3, #2
+ 800134a: 2b00 cmp r3, #0
+ 800134c: d1f0 bne.n 8001330 <HAL_RCC_OscConfig+0x1f4>
}
}
}
}
/*------------------------------ LSI Configuration -------------------------*/
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
- 80011e6: 687b ldr r3, [r7, #4]
- 80011e8: 681b ldr r3, [r3, #0]
- 80011ea: f003 0308 and.w r3, r3, #8
- 80011ee: 2b00 cmp r3, #0
- 80011f0: d038 beq.n 8001264 <HAL_RCC_OscConfig+0x290>
+ 800134e: 687b ldr r3, [r7, #4]
+ 8001350: 681b ldr r3, [r3, #0]
+ 8001352: f003 0308 and.w r3, r3, #8
+ 8001356: 2b00 cmp r3, #0
+ 8001358: d038 beq.n 80013cc <HAL_RCC_OscConfig+0x290>
{
/* Check the parameters */
assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
/* Check the LSI State */
if((RCC_OscInitStruct->LSIState)!= RCC_LSI_OFF)
- 80011f2: 687b ldr r3, [r7, #4]
- 80011f4: 695b ldr r3, [r3, #20]
- 80011f6: 2b00 cmp r3, #0
- 80011f8: d019 beq.n 800122e <HAL_RCC_OscConfig+0x25a>
+ 800135a: 687b ldr r3, [r7, #4]
+ 800135c: 695b ldr r3, [r3, #20]
+ 800135e: 2b00 cmp r3, #0
+ 8001360: d019 beq.n 8001396 <HAL_RCC_OscConfig+0x25a>
{
/* Enable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_ENABLE();
- 80011fa: 4b16 ldr r3, [pc, #88] ; (8001254 <HAL_RCC_OscConfig+0x280>)
- 80011fc: 6f5b ldr r3, [r3, #116] ; 0x74
- 80011fe: 4a15 ldr r2, [pc, #84] ; (8001254 <HAL_RCC_OscConfig+0x280>)
- 8001200: f043 0301 orr.w r3, r3, #1
- 8001204: 6753 str r3, [r2, #116] ; 0x74
+ 8001362: 4b16 ldr r3, [pc, #88] ; (80013bc <HAL_RCC_OscConfig+0x280>)
+ 8001364: 6f5b ldr r3, [r3, #116] ; 0x74
+ 8001366: 4a15 ldr r2, [pc, #84] ; (80013bc <HAL_RCC_OscConfig+0x280>)
+ 8001368: f043 0301 orr.w r3, r3, #1
+ 800136c: 6753 str r3, [r2, #116] ; 0x74
/* Get Start Tick*/
tickstart = HAL_GetTick();
- 8001206: f7ff fc27 bl 8000a58 <HAL_GetTick>
- 800120a: 6138 str r0, [r7, #16]
+ 800136e: f7ff fbfb bl 8000b68 <HAL_GetTick>
+ 8001372: 6138 str r0, [r7, #16]
/* Wait till LSI is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
- 800120c: e008 b.n 8001220 <HAL_RCC_OscConfig+0x24c>
+ 8001374: e008 b.n 8001388 <HAL_RCC_OscConfig+0x24c>
{
if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
- 800120e: f7ff fc23 bl 8000a58 <HAL_GetTick>
- 8001212: 4602 mov r2, r0
- 8001214: 693b ldr r3, [r7, #16]
- 8001216: 1ad3 subs r3, r2, r3
- 8001218: 2b02 cmp r3, #2
- 800121a: d901 bls.n 8001220 <HAL_RCC_OscConfig+0x24c>
+ 8001376: f7ff fbf7 bl 8000b68 <HAL_GetTick>
+ 800137a: 4602 mov r2, r0
+ 800137c: 693b ldr r3, [r7, #16]
+ 800137e: 1ad3 subs r3, r2, r3
+ 8001380: 2b02 cmp r3, #2
+ 8001382: d901 bls.n 8001388 <HAL_RCC_OscConfig+0x24c>
{
return HAL_TIMEOUT;
- 800121c: 2303 movs r3, #3
- 800121e: e143 b.n 80014a8 <HAL_RCC_OscConfig+0x4d4>
+ 8001384: 2303 movs r3, #3
+ 8001386: e143 b.n 8001610 <HAL_RCC_OscConfig+0x4d4>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
- 8001220: 4b0c ldr r3, [pc, #48] ; (8001254 <HAL_RCC_OscConfig+0x280>)
- 8001222: 6f5b ldr r3, [r3, #116] ; 0x74
- 8001224: f003 0302 and.w r3, r3, #2
- 8001228: 2b00 cmp r3, #0
- 800122a: d0f0 beq.n 800120e <HAL_RCC_OscConfig+0x23a>
- 800122c: e01a b.n 8001264 <HAL_RCC_OscConfig+0x290>
+ 8001388: 4b0c ldr r3, [pc, #48] ; (80013bc <HAL_RCC_OscConfig+0x280>)
+ 800138a: 6f5b ldr r3, [r3, #116] ; 0x74
+ 800138c: f003 0302 and.w r3, r3, #2
+ 8001390: 2b00 cmp r3, #0
+ 8001392: d0f0 beq.n 8001376 <HAL_RCC_OscConfig+0x23a>
+ 8001394: e01a b.n 80013cc <HAL_RCC_OscConfig+0x290>
}
}
else
{
/* Disable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_DISABLE();
- 800122e: 4b09 ldr r3, [pc, #36] ; (8001254 <HAL_RCC_OscConfig+0x280>)
- 8001230: 6f5b ldr r3, [r3, #116] ; 0x74
- 8001232: 4a08 ldr r2, [pc, #32] ; (8001254 <HAL_RCC_OscConfig+0x280>)
- 8001234: f023 0301 bic.w r3, r3, #1
- 8001238: 6753 str r3, [r2, #116] ; 0x74
+ 8001396: 4b09 ldr r3, [pc, #36] ; (80013bc <HAL_RCC_OscConfig+0x280>)
+ 8001398: 6f5b ldr r3, [r3, #116] ; 0x74
+ 800139a: 4a08 ldr r2, [pc, #32] ; (80013bc <HAL_RCC_OscConfig+0x280>)
+ 800139c: f023 0301 bic.w r3, r3, #1
+ 80013a0: 6753 str r3, [r2, #116] ; 0x74
/* Get Start Tick*/
tickstart = HAL_GetTick();
- 800123a: f7ff fc0d bl 8000a58 <HAL_GetTick>
- 800123e: 6138 str r0, [r7, #16]
+ 80013a2: f7ff fbe1 bl 8000b68 <HAL_GetTick>
+ 80013a6: 6138 str r0, [r7, #16]
/* Wait till LSI is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
- 8001240: e00a b.n 8001258 <HAL_RCC_OscConfig+0x284>
+ 80013a8: e00a b.n 80013c0 <HAL_RCC_OscConfig+0x284>
{
if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
- 8001242: f7ff fc09 bl 8000a58 <HAL_GetTick>
- 8001246: 4602 mov r2, r0
- 8001248: 693b ldr r3, [r7, #16]
- 800124a: 1ad3 subs r3, r2, r3
- 800124c: 2b02 cmp r3, #2
- 800124e: d903 bls.n 8001258 <HAL_RCC_OscConfig+0x284>
+ 80013aa: f7ff fbdd bl 8000b68 <HAL_GetTick>
+ 80013ae: 4602 mov r2, r0
+ 80013b0: 693b ldr r3, [r7, #16]
+ 80013b2: 1ad3 subs r3, r2, r3
+ 80013b4: 2b02 cmp r3, #2
+ 80013b6: d903 bls.n 80013c0 <HAL_RCC_OscConfig+0x284>
{
return HAL_TIMEOUT;
- 8001250: 2303 movs r3, #3
- 8001252: e129 b.n 80014a8 <HAL_RCC_OscConfig+0x4d4>
- 8001254: 40023800 .word 0x40023800
+ 80013b8: 2303 movs r3, #3
+ 80013ba: e129 b.n 8001610 <HAL_RCC_OscConfig+0x4d4>
+ 80013bc: 40023800 .word 0x40023800
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
- 8001258: 4b95 ldr r3, [pc, #596] ; (80014b0 <HAL_RCC_OscConfig+0x4dc>)
- 800125a: 6f5b ldr r3, [r3, #116] ; 0x74
- 800125c: f003 0302 and.w r3, r3, #2
- 8001260: 2b00 cmp r3, #0
- 8001262: d1ee bne.n 8001242 <HAL_RCC_OscConfig+0x26e>
+ 80013c0: 4b95 ldr r3, [pc, #596] ; (8001618 <HAL_RCC_OscConfig+0x4dc>)
+ 80013c2: 6f5b ldr r3, [r3, #116] ; 0x74
+ 80013c4: f003 0302 and.w r3, r3, #2
+ 80013c8: 2b00 cmp r3, #0
+ 80013ca: d1ee bne.n 80013aa <HAL_RCC_OscConfig+0x26e>
}
}
}
}
/*------------------------------ LSE Configuration -------------------------*/
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
- 8001264: 687b ldr r3, [r7, #4]
- 8001266: 681b ldr r3, [r3, #0]
- 8001268: f003 0304 and.w r3, r3, #4
- 800126c: 2b00 cmp r3, #0
- 800126e: f000 80a4 beq.w 80013ba <HAL_RCC_OscConfig+0x3e6>
+ 80013cc: 687b ldr r3, [r7, #4]
+ 80013ce: 681b ldr r3, [r3, #0]
+ 80013d0: f003 0304 and.w r3, r3, #4
+ 80013d4: 2b00 cmp r3, #0
+ 80013d6: f000 80a4 beq.w 8001522 <HAL_RCC_OscConfig+0x3e6>
/* Check the parameters */
assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
/* Update LSE configuration in Backup Domain control register */
/* Requires to enable write access to Backup Domain of necessary */
if(__HAL_RCC_PWR_IS_CLK_DISABLED())
- 8001272: 4b8f ldr r3, [pc, #572] ; (80014b0 <HAL_RCC_OscConfig+0x4dc>)
- 8001274: 6c1b ldr r3, [r3, #64] ; 0x40
- 8001276: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
- 800127a: 2b00 cmp r3, #0
- 800127c: d10d bne.n 800129a <HAL_RCC_OscConfig+0x2c6>
+ 80013da: 4b8f ldr r3, [pc, #572] ; (8001618 <HAL_RCC_OscConfig+0x4dc>)
+ 80013dc: 6c1b ldr r3, [r3, #64] ; 0x40
+ 80013de: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
+ 80013e2: 2b00 cmp r3, #0
+ 80013e4: d10d bne.n 8001402 <HAL_RCC_OscConfig+0x2c6>
{
/* Enable Power Clock*/
__HAL_RCC_PWR_CLK_ENABLE();
- 800127e: 4b8c ldr r3, [pc, #560] ; (80014b0 <HAL_RCC_OscConfig+0x4dc>)
- 8001280: 6c1b ldr r3, [r3, #64] ; 0x40
- 8001282: 4a8b ldr r2, [pc, #556] ; (80014b0 <HAL_RCC_OscConfig+0x4dc>)
- 8001284: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
- 8001288: 6413 str r3, [r2, #64] ; 0x40
- 800128a: 4b89 ldr r3, [pc, #548] ; (80014b0 <HAL_RCC_OscConfig+0x4dc>)
- 800128c: 6c1b ldr r3, [r3, #64] ; 0x40
- 800128e: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
- 8001292: 60fb str r3, [r7, #12]
- 8001294: 68fb ldr r3, [r7, #12]
+ 80013e6: 4b8c ldr r3, [pc, #560] ; (8001618 <HAL_RCC_OscConfig+0x4dc>)
+ 80013e8: 6c1b ldr r3, [r3, #64] ; 0x40
+ 80013ea: 4a8b ldr r2, [pc, #556] ; (8001618 <HAL_RCC_OscConfig+0x4dc>)
+ 80013ec: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
+ 80013f0: 6413 str r3, [r2, #64] ; 0x40
+ 80013f2: 4b89 ldr r3, [pc, #548] ; (8001618 <HAL_RCC_OscConfig+0x4dc>)
+ 80013f4: 6c1b ldr r3, [r3, #64] ; 0x40
+ 80013f6: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
+ 80013fa: 60fb str r3, [r7, #12]
+ 80013fc: 68fb ldr r3, [r7, #12]
pwrclkchanged = SET;
- 8001296: 2301 movs r3, #1
- 8001298: 75fb strb r3, [r7, #23]
+ 80013fe: 2301 movs r3, #1
+ 8001400: 75fb strb r3, [r7, #23]
}
if(HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP))
- 800129a: 4b86 ldr r3, [pc, #536] ; (80014b4 <HAL_RCC_OscConfig+0x4e0>)
- 800129c: 681b ldr r3, [r3, #0]
- 800129e: f403 7380 and.w r3, r3, #256 ; 0x100
- 80012a2: 2b00 cmp r3, #0
- 80012a4: d118 bne.n 80012d8 <HAL_RCC_OscConfig+0x304>
+ 8001402: 4b86 ldr r3, [pc, #536] ; (800161c <HAL_RCC_OscConfig+0x4e0>)
+ 8001404: 681b ldr r3, [r3, #0]
+ 8001406: f403 7380 and.w r3, r3, #256 ; 0x100
+ 800140a: 2b00 cmp r3, #0
+ 800140c: d118 bne.n 8001440 <HAL_RCC_OscConfig+0x304>
{
/* Enable write access to Backup domain */
PWR->CR1 |= PWR_CR1_DBP;
- 80012a6: 4b83 ldr r3, [pc, #524] ; (80014b4 <HAL_RCC_OscConfig+0x4e0>)
- 80012a8: 681b ldr r3, [r3, #0]
- 80012aa: 4a82 ldr r2, [pc, #520] ; (80014b4 <HAL_RCC_OscConfig+0x4e0>)
- 80012ac: f443 7380 orr.w r3, r3, #256 ; 0x100
- 80012b0: 6013 str r3, [r2, #0]
+ 800140e: 4b83 ldr r3, [pc, #524] ; (800161c <HAL_RCC_OscConfig+0x4e0>)
+ 8001410: 681b ldr r3, [r3, #0]
+ 8001412: 4a82 ldr r2, [pc, #520] ; (800161c <HAL_RCC_OscConfig+0x4e0>)
+ 8001414: f443 7380 orr.w r3, r3, #256 ; 0x100
+ 8001418: 6013 str r3, [r2, #0]
/* Wait for Backup domain Write protection disable */
tickstart = HAL_GetTick();
- 80012b2: f7ff fbd1 bl 8000a58 <HAL_GetTick>
- 80012b6: 6138 str r0, [r7, #16]
+ 800141a: f7ff fba5 bl 8000b68 <HAL_GetTick>
+ 800141e: 6138 str r0, [r7, #16]
while(HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP))
- 80012b8: e008 b.n 80012cc <HAL_RCC_OscConfig+0x2f8>
+ 8001420: e008 b.n 8001434 <HAL_RCC_OscConfig+0x2f8>
{
if((HAL_GetTick() - tickstart ) > RCC_DBP_TIMEOUT_VALUE)
- 80012ba: f7ff fbcd bl 8000a58 <HAL_GetTick>
- 80012be: 4602 mov r2, r0
- 80012c0: 693b ldr r3, [r7, #16]
- 80012c2: 1ad3 subs r3, r2, r3
- 80012c4: 2b64 cmp r3, #100 ; 0x64
- 80012c6: d901 bls.n 80012cc <HAL_RCC_OscConfig+0x2f8>
+ 8001422: f7ff fba1 bl 8000b68 <HAL_GetTick>
+ 8001426: 4602 mov r2, r0
+ 8001428: 693b ldr r3, [r7, #16]
+ 800142a: 1ad3 subs r3, r2, r3
+ 800142c: 2b64 cmp r3, #100 ; 0x64
+ 800142e: d901 bls.n 8001434 <HAL_RCC_OscConfig+0x2f8>
{
return HAL_TIMEOUT;
- 80012c8: 2303 movs r3, #3
- 80012ca: e0ed b.n 80014a8 <HAL_RCC_OscConfig+0x4d4>
+ 8001430: 2303 movs r3, #3
+ 8001432: e0ed b.n 8001610 <HAL_RCC_OscConfig+0x4d4>
while(HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP))
- 80012cc: 4b79 ldr r3, [pc, #484] ; (80014b4 <HAL_RCC_OscConfig+0x4e0>)
- 80012ce: 681b ldr r3, [r3, #0]
- 80012d0: f403 7380 and.w r3, r3, #256 ; 0x100
- 80012d4: 2b00 cmp r3, #0
- 80012d6: d0f0 beq.n 80012ba <HAL_RCC_OscConfig+0x2e6>
+ 8001434: 4b79 ldr r3, [pc, #484] ; (800161c <HAL_RCC_OscConfig+0x4e0>)
+ 8001436: 681b ldr r3, [r3, #0]
+ 8001438: f403 7380 and.w r3, r3, #256 ; 0x100
+ 800143c: 2b00 cmp r3, #0
+ 800143e: d0f0 beq.n 8001422 <HAL_RCC_OscConfig+0x2e6>
}
}
}
/* Set the new LSE configuration -----------------------------------------*/
__HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
- 80012d8: 687b ldr r3, [r7, #4]
- 80012da: 689b ldr r3, [r3, #8]
- 80012dc: 2b01 cmp r3, #1
- 80012de: d106 bne.n 80012ee <HAL_RCC_OscConfig+0x31a>
- 80012e0: 4b73 ldr r3, [pc, #460] ; (80014b0 <HAL_RCC_OscConfig+0x4dc>)
- 80012e2: 6f1b ldr r3, [r3, #112] ; 0x70
- 80012e4: 4a72 ldr r2, [pc, #456] ; (80014b0 <HAL_RCC_OscConfig+0x4dc>)
- 80012e6: f043 0301 orr.w r3, r3, #1
- 80012ea: 6713 str r3, [r2, #112] ; 0x70
- 80012ec: e02d b.n 800134a <HAL_RCC_OscConfig+0x376>
- 80012ee: 687b ldr r3, [r7, #4]
- 80012f0: 689b ldr r3, [r3, #8]
- 80012f2: 2b00 cmp r3, #0
- 80012f4: d10c bne.n 8001310 <HAL_RCC_OscConfig+0x33c>
- 80012f6: 4b6e ldr r3, [pc, #440] ; (80014b0 <HAL_RCC_OscConfig+0x4dc>)
- 80012f8: 6f1b ldr r3, [r3, #112] ; 0x70
- 80012fa: 4a6d ldr r2, [pc, #436] ; (80014b0 <HAL_RCC_OscConfig+0x4dc>)
- 80012fc: f023 0301 bic.w r3, r3, #1
- 8001300: 6713 str r3, [r2, #112] ; 0x70
- 8001302: 4b6b ldr r3, [pc, #428] ; (80014b0 <HAL_RCC_OscConfig+0x4dc>)
- 8001304: 6f1b ldr r3, [r3, #112] ; 0x70
- 8001306: 4a6a ldr r2, [pc, #424] ; (80014b0 <HAL_RCC_OscConfig+0x4dc>)
- 8001308: f023 0304 bic.w r3, r3, #4
- 800130c: 6713 str r3, [r2, #112] ; 0x70
- 800130e: e01c b.n 800134a <HAL_RCC_OscConfig+0x376>
- 8001310: 687b ldr r3, [r7, #4]
- 8001312: 689b ldr r3, [r3, #8]
- 8001314: 2b05 cmp r3, #5
- 8001316: d10c bne.n 8001332 <HAL_RCC_OscConfig+0x35e>
- 8001318: 4b65 ldr r3, [pc, #404] ; (80014b0 <HAL_RCC_OscConfig+0x4dc>)
- 800131a: 6f1b ldr r3, [r3, #112] ; 0x70
- 800131c: 4a64 ldr r2, [pc, #400] ; (80014b0 <HAL_RCC_OscConfig+0x4dc>)
- 800131e: f043 0304 orr.w r3, r3, #4
- 8001322: 6713 str r3, [r2, #112] ; 0x70
- 8001324: 4b62 ldr r3, [pc, #392] ; (80014b0 <HAL_RCC_OscConfig+0x4dc>)
- 8001326: 6f1b ldr r3, [r3, #112] ; 0x70
- 8001328: 4a61 ldr r2, [pc, #388] ; (80014b0 <HAL_RCC_OscConfig+0x4dc>)
- 800132a: f043 0301 orr.w r3, r3, #1
- 800132e: 6713 str r3, [r2, #112] ; 0x70
- 8001330: e00b b.n 800134a <HAL_RCC_OscConfig+0x376>
- 8001332: 4b5f ldr r3, [pc, #380] ; (80014b0 <HAL_RCC_OscConfig+0x4dc>)
- 8001334: 6f1b ldr r3, [r3, #112] ; 0x70
- 8001336: 4a5e ldr r2, [pc, #376] ; (80014b0 <HAL_RCC_OscConfig+0x4dc>)
- 8001338: f023 0301 bic.w r3, r3, #1
- 800133c: 6713 str r3, [r2, #112] ; 0x70
- 800133e: 4b5c ldr r3, [pc, #368] ; (80014b0 <HAL_RCC_OscConfig+0x4dc>)
- 8001340: 6f1b ldr r3, [r3, #112] ; 0x70
- 8001342: 4a5b ldr r2, [pc, #364] ; (80014b0 <HAL_RCC_OscConfig+0x4dc>)
- 8001344: f023 0304 bic.w r3, r3, #4
- 8001348: 6713 str r3, [r2, #112] ; 0x70
+ 8001440: 687b ldr r3, [r7, #4]
+ 8001442: 689b ldr r3, [r3, #8]
+ 8001444: 2b01 cmp r3, #1
+ 8001446: d106 bne.n 8001456 <HAL_RCC_OscConfig+0x31a>
+ 8001448: 4b73 ldr r3, [pc, #460] ; (8001618 <HAL_RCC_OscConfig+0x4dc>)
+ 800144a: 6f1b ldr r3, [r3, #112] ; 0x70
+ 800144c: 4a72 ldr r2, [pc, #456] ; (8001618 <HAL_RCC_OscConfig+0x4dc>)
+ 800144e: f043 0301 orr.w r3, r3, #1
+ 8001452: 6713 str r3, [r2, #112] ; 0x70
+ 8001454: e02d b.n 80014b2 <HAL_RCC_OscConfig+0x376>
+ 8001456: 687b ldr r3, [r7, #4]
+ 8001458: 689b ldr r3, [r3, #8]
+ 800145a: 2b00 cmp r3, #0
+ 800145c: d10c bne.n 8001478 <HAL_RCC_OscConfig+0x33c>
+ 800145e: 4b6e ldr r3, [pc, #440] ; (8001618 <HAL_RCC_OscConfig+0x4dc>)
+ 8001460: 6f1b ldr r3, [r3, #112] ; 0x70
+ 8001462: 4a6d ldr r2, [pc, #436] ; (8001618 <HAL_RCC_OscConfig+0x4dc>)
+ 8001464: f023 0301 bic.w r3, r3, #1
+ 8001468: 6713 str r3, [r2, #112] ; 0x70
+ 800146a: 4b6b ldr r3, [pc, #428] ; (8001618 <HAL_RCC_OscConfig+0x4dc>)
+ 800146c: 6f1b ldr r3, [r3, #112] ; 0x70
+ 800146e: 4a6a ldr r2, [pc, #424] ; (8001618 <HAL_RCC_OscConfig+0x4dc>)
+ 8001470: f023 0304 bic.w r3, r3, #4
+ 8001474: 6713 str r3, [r2, #112] ; 0x70
+ 8001476: e01c b.n 80014b2 <HAL_RCC_OscConfig+0x376>
+ 8001478: 687b ldr r3, [r7, #4]
+ 800147a: 689b ldr r3, [r3, #8]
+ 800147c: 2b05 cmp r3, #5
+ 800147e: d10c bne.n 800149a <HAL_RCC_OscConfig+0x35e>
+ 8001480: 4b65 ldr r3, [pc, #404] ; (8001618 <HAL_RCC_OscConfig+0x4dc>)
+ 8001482: 6f1b ldr r3, [r3, #112] ; 0x70
+ 8001484: 4a64 ldr r2, [pc, #400] ; (8001618 <HAL_RCC_OscConfig+0x4dc>)
+ 8001486: f043 0304 orr.w r3, r3, #4
+ 800148a: 6713 str r3, [r2, #112] ; 0x70
+ 800148c: 4b62 ldr r3, [pc, #392] ; (8001618 <HAL_RCC_OscConfig+0x4dc>)
+ 800148e: 6f1b ldr r3, [r3, #112] ; 0x70
+ 8001490: 4a61 ldr r2, [pc, #388] ; (8001618 <HAL_RCC_OscConfig+0x4dc>)
+ 8001492: f043 0301 orr.w r3, r3, #1
+ 8001496: 6713 str r3, [r2, #112] ; 0x70
+ 8001498: e00b b.n 80014b2 <HAL_RCC_OscConfig+0x376>
+ 800149a: 4b5f ldr r3, [pc, #380] ; (8001618 <HAL_RCC_OscConfig+0x4dc>)
+ 800149c: 6f1b ldr r3, [r3, #112] ; 0x70
+ 800149e: 4a5e ldr r2, [pc, #376] ; (8001618 <HAL_RCC_OscConfig+0x4dc>)
+ 80014a0: f023 0301 bic.w r3, r3, #1
+ 80014a4: 6713 str r3, [r2, #112] ; 0x70
+ 80014a6: 4b5c ldr r3, [pc, #368] ; (8001618 <HAL_RCC_OscConfig+0x4dc>)
+ 80014a8: 6f1b ldr r3, [r3, #112] ; 0x70
+ 80014aa: 4a5b ldr r2, [pc, #364] ; (8001618 <HAL_RCC_OscConfig+0x4dc>)
+ 80014ac: f023 0304 bic.w r3, r3, #4
+ 80014b0: 6713 str r3, [r2, #112] ; 0x70
/* Check the LSE State */
if((RCC_OscInitStruct->LSEState) != RCC_LSE_OFF)
- 800134a: 687b ldr r3, [r7, #4]
- 800134c: 689b ldr r3, [r3, #8]
- 800134e: 2b00 cmp r3, #0
- 8001350: d015 beq.n 800137e <HAL_RCC_OscConfig+0x3aa>
+ 80014b2: 687b ldr r3, [r7, #4]
+ 80014b4: 689b ldr r3, [r3, #8]
+ 80014b6: 2b00 cmp r3, #0
+ 80014b8: d015 beq.n 80014e6 <HAL_RCC_OscConfig+0x3aa>
{
/* Get Start Tick*/
tickstart = HAL_GetTick();
- 8001352: f7ff fb81 bl 8000a58 <HAL_GetTick>
- 8001356: 6138 str r0, [r7, #16]
+ 80014ba: f7ff fb55 bl 8000b68 <HAL_GetTick>
+ 80014be: 6138 str r0, [r7, #16]
/* Wait till LSE is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
- 8001358: e00a b.n 8001370 <HAL_RCC_OscConfig+0x39c>
+ 80014c0: e00a b.n 80014d8 <HAL_RCC_OscConfig+0x39c>
{
if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
- 800135a: f7ff fb7d bl 8000a58 <HAL_GetTick>
- 800135e: 4602 mov r2, r0
- 8001360: 693b ldr r3, [r7, #16]
- 8001362: 1ad3 subs r3, r2, r3
- 8001364: f241 3288 movw r2, #5000 ; 0x1388
- 8001368: 4293 cmp r3, r2
- 800136a: d901 bls.n 8001370 <HAL_RCC_OscConfig+0x39c>
+ 80014c2: f7ff fb51 bl 8000b68 <HAL_GetTick>
+ 80014c6: 4602 mov r2, r0
+ 80014c8: 693b ldr r3, [r7, #16]
+ 80014ca: 1ad3 subs r3, r2, r3
+ 80014cc: f241 3288 movw r2, #5000 ; 0x1388
+ 80014d0: 4293 cmp r3, r2
+ 80014d2: d901 bls.n 80014d8 <HAL_RCC_OscConfig+0x39c>
{
return HAL_TIMEOUT;
- 800136c: 2303 movs r3, #3
- 800136e: e09b b.n 80014a8 <HAL_RCC_OscConfig+0x4d4>
+ 80014d4: 2303 movs r3, #3
+ 80014d6: e09b b.n 8001610 <HAL_RCC_OscConfig+0x4d4>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
- 8001370: 4b4f ldr r3, [pc, #316] ; (80014b0 <HAL_RCC_OscConfig+0x4dc>)
- 8001372: 6f1b ldr r3, [r3, #112] ; 0x70
- 8001374: f003 0302 and.w r3, r3, #2
- 8001378: 2b00 cmp r3, #0
- 800137a: d0ee beq.n 800135a <HAL_RCC_OscConfig+0x386>
- 800137c: e014 b.n 80013a8 <HAL_RCC_OscConfig+0x3d4>
+ 80014d8: 4b4f ldr r3, [pc, #316] ; (8001618 <HAL_RCC_OscConfig+0x4dc>)
+ 80014da: 6f1b ldr r3, [r3, #112] ; 0x70
+ 80014dc: f003 0302 and.w r3, r3, #2
+ 80014e0: 2b00 cmp r3, #0
+ 80014e2: d0ee beq.n 80014c2 <HAL_RCC_OscConfig+0x386>
+ 80014e4: e014 b.n 8001510 <HAL_RCC_OscConfig+0x3d4>
}
}
else
{
/* Get Start Tick*/
tickstart = HAL_GetTick();
- 800137e: f7ff fb6b bl 8000a58 <HAL_GetTick>
- 8001382: 6138 str r0, [r7, #16]
+ 80014e6: f7ff fb3f bl 8000b68 <HAL_GetTick>
+ 80014ea: 6138 str r0, [r7, #16]
/* Wait till LSE is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
- 8001384: e00a b.n 800139c <HAL_RCC_OscConfig+0x3c8>
+ 80014ec: e00a b.n 8001504 <HAL_RCC_OscConfig+0x3c8>
{
if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
- 8001386: f7ff fb67 bl 8000a58 <HAL_GetTick>
- 800138a: 4602 mov r2, r0
- 800138c: 693b ldr r3, [r7, #16]
- 800138e: 1ad3 subs r3, r2, r3
- 8001390: f241 3288 movw r2, #5000 ; 0x1388
- 8001394: 4293 cmp r3, r2
- 8001396: d901 bls.n 800139c <HAL_RCC_OscConfig+0x3c8>
+ 80014ee: f7ff fb3b bl 8000b68 <HAL_GetTick>
+ 80014f2: 4602 mov r2, r0
+ 80014f4: 693b ldr r3, [r7, #16]
+ 80014f6: 1ad3 subs r3, r2, r3
+ 80014f8: f241 3288 movw r2, #5000 ; 0x1388
+ 80014fc: 4293 cmp r3, r2
+ 80014fe: d901 bls.n 8001504 <HAL_RCC_OscConfig+0x3c8>
{
return HAL_TIMEOUT;
- 8001398: 2303 movs r3, #3
- 800139a: e085 b.n 80014a8 <HAL_RCC_OscConfig+0x4d4>
+ 8001500: 2303 movs r3, #3
+ 8001502: e085 b.n 8001610 <HAL_RCC_OscConfig+0x4d4>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
- 800139c: 4b44 ldr r3, [pc, #272] ; (80014b0 <HAL_RCC_OscConfig+0x4dc>)
- 800139e: 6f1b ldr r3, [r3, #112] ; 0x70
- 80013a0: f003 0302 and.w r3, r3, #2
- 80013a4: 2b00 cmp r3, #0
- 80013a6: d1ee bne.n 8001386 <HAL_RCC_OscConfig+0x3b2>
+ 8001504: 4b44 ldr r3, [pc, #272] ; (8001618 <HAL_RCC_OscConfig+0x4dc>)
+ 8001506: 6f1b ldr r3, [r3, #112] ; 0x70
+ 8001508: f003 0302 and.w r3, r3, #2
+ 800150c: 2b00 cmp r3, #0
+ 800150e: d1ee bne.n 80014ee <HAL_RCC_OscConfig+0x3b2>
}
}
}
/* Restore clock configuration if changed */
if(pwrclkchanged == SET)
- 80013a8: 7dfb ldrb r3, [r7, #23]
- 80013aa: 2b01 cmp r3, #1
- 80013ac: d105 bne.n 80013ba <HAL_RCC_OscConfig+0x3e6>
+ 8001510: 7dfb ldrb r3, [r7, #23]
+ 8001512: 2b01 cmp r3, #1
+ 8001514: d105 bne.n 8001522 <HAL_RCC_OscConfig+0x3e6>
{
__HAL_RCC_PWR_CLK_DISABLE();
- 80013ae: 4b40 ldr r3, [pc, #256] ; (80014b0 <HAL_RCC_OscConfig+0x4dc>)
- 80013b0: 6c1b ldr r3, [r3, #64] ; 0x40
- 80013b2: 4a3f ldr r2, [pc, #252] ; (80014b0 <HAL_RCC_OscConfig+0x4dc>)
- 80013b4: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000
- 80013b8: 6413 str r3, [r2, #64] ; 0x40
+ 8001516: 4b40 ldr r3, [pc, #256] ; (8001618 <HAL_RCC_OscConfig+0x4dc>)
+ 8001518: 6c1b ldr r3, [r3, #64] ; 0x40
+ 800151a: 4a3f ldr r2, [pc, #252] ; (8001618 <HAL_RCC_OscConfig+0x4dc>)
+ 800151c: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000
+ 8001520: 6413 str r3, [r2, #64] ; 0x40
}
}
/*-------------------------------- PLL Configuration -----------------------*/
/* Check the parameters */
assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
- 80013ba: 687b ldr r3, [r7, #4]
- 80013bc: 699b ldr r3, [r3, #24]
- 80013be: 2b00 cmp r3, #0
- 80013c0: d071 beq.n 80014a6 <HAL_RCC_OscConfig+0x4d2>
+ 8001522: 687b ldr r3, [r7, #4]
+ 8001524: 699b ldr r3, [r3, #24]
+ 8001526: 2b00 cmp r3, #0
+ 8001528: d071 beq.n 800160e <HAL_RCC_OscConfig+0x4d2>
{
/* Check if the PLL is used as system clock or not */
if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
- 80013c2: 4b3b ldr r3, [pc, #236] ; (80014b0 <HAL_RCC_OscConfig+0x4dc>)
- 80013c4: 689b ldr r3, [r3, #8]
- 80013c6: f003 030c and.w r3, r3, #12
- 80013ca: 2b08 cmp r3, #8
- 80013cc: d069 beq.n 80014a2 <HAL_RCC_OscConfig+0x4ce>
+ 800152a: 4b3b ldr r3, [pc, #236] ; (8001618 <HAL_RCC_OscConfig+0x4dc>)
+ 800152c: 689b ldr r3, [r3, #8]
+ 800152e: f003 030c and.w r3, r3, #12
+ 8001532: 2b08 cmp r3, #8
+ 8001534: d069 beq.n 800160a <HAL_RCC_OscConfig+0x4ce>
{
if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
- 80013ce: 687b ldr r3, [r7, #4]
- 80013d0: 699b ldr r3, [r3, #24]
- 80013d2: 2b02 cmp r3, #2
- 80013d4: d14b bne.n 800146e <HAL_RCC_OscConfig+0x49a>
+ 8001536: 687b ldr r3, [r7, #4]
+ 8001538: 699b ldr r3, [r3, #24]
+ 800153a: 2b02 cmp r3, #2
+ 800153c: d14b bne.n 80015d6 <HAL_RCC_OscConfig+0x49a>
#if defined (RCC_PLLCFGR_PLLR)
assert_param(IS_RCC_PLLR_VALUE(RCC_OscInitStruct->PLL.PLLR));
#endif
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
- 80013d6: 4b36 ldr r3, [pc, #216] ; (80014b0 <HAL_RCC_OscConfig+0x4dc>)
- 80013d8: 681b ldr r3, [r3, #0]
- 80013da: 4a35 ldr r2, [pc, #212] ; (80014b0 <HAL_RCC_OscConfig+0x4dc>)
- 80013dc: f023 7380 bic.w r3, r3, #16777216 ; 0x1000000
- 80013e0: 6013 str r3, [r2, #0]
+ 800153e: 4b36 ldr r3, [pc, #216] ; (8001618 <HAL_RCC_OscConfig+0x4dc>)
+ 8001540: 681b ldr r3, [r3, #0]
+ 8001542: 4a35 ldr r2, [pc, #212] ; (8001618 <HAL_RCC_OscConfig+0x4dc>)
+ 8001544: f023 7380 bic.w r3, r3, #16777216 ; 0x1000000
+ 8001548: 6013 str r3, [r2, #0]
/* Get Start Tick*/
tickstart = HAL_GetTick();
- 80013e2: f7ff fb39 bl 8000a58 <HAL_GetTick>
- 80013e6: 6138 str r0, [r7, #16]
+ 800154a: f7ff fb0d bl 8000b68 <HAL_GetTick>
+ 800154e: 6138 str r0, [r7, #16]
/* Wait till PLL is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
- 80013e8: e008 b.n 80013fc <HAL_RCC_OscConfig+0x428>
+ 8001550: e008 b.n 8001564 <HAL_RCC_OscConfig+0x428>
{
if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
- 80013ea: f7ff fb35 bl 8000a58 <HAL_GetTick>
- 80013ee: 4602 mov r2, r0
- 80013f0: 693b ldr r3, [r7, #16]
- 80013f2: 1ad3 subs r3, r2, r3
- 80013f4: 2b02 cmp r3, #2
- 80013f6: d901 bls.n 80013fc <HAL_RCC_OscConfig+0x428>
+ 8001552: f7ff fb09 bl 8000b68 <HAL_GetTick>
+ 8001556: 4602 mov r2, r0
+ 8001558: 693b ldr r3, [r7, #16]
+ 800155a: 1ad3 subs r3, r2, r3
+ 800155c: 2b02 cmp r3, #2
+ 800155e: d901 bls.n 8001564 <HAL_RCC_OscConfig+0x428>
{
return HAL_TIMEOUT;
- 80013f8: 2303 movs r3, #3
- 80013fa: e055 b.n 80014a8 <HAL_RCC_OscConfig+0x4d4>
+ 8001560: 2303 movs r3, #3
+ 8001562: e055 b.n 8001610 <HAL_RCC_OscConfig+0x4d4>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
- 80013fc: 4b2c ldr r3, [pc, #176] ; (80014b0 <HAL_RCC_OscConfig+0x4dc>)
- 80013fe: 681b ldr r3, [r3, #0]
- 8001400: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
- 8001404: 2b00 cmp r3, #0
- 8001406: d1f0 bne.n 80013ea <HAL_RCC_OscConfig+0x416>
+ 8001564: 4b2c ldr r3, [pc, #176] ; (8001618 <HAL_RCC_OscConfig+0x4dc>)
+ 8001566: 681b ldr r3, [r3, #0]
+ 8001568: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
+ 800156c: 2b00 cmp r3, #0
+ 800156e: d1f0 bne.n 8001552 <HAL_RCC_OscConfig+0x416>
}
}
/* Configure the main PLL clock source, multiplication and division factors. */
#if defined (RCC_PLLCFGR_PLLR)
__HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
- 8001408: 687b ldr r3, [r7, #4]
- 800140a: 69da ldr r2, [r3, #28]
- 800140c: 687b ldr r3, [r7, #4]
- 800140e: 6a1b ldr r3, [r3, #32]
- 8001410: 431a orrs r2, r3
- 8001412: 687b ldr r3, [r7, #4]
- 8001414: 6a5b ldr r3, [r3, #36] ; 0x24
- 8001416: 019b lsls r3, r3, #6
- 8001418: 431a orrs r2, r3
- 800141a: 687b ldr r3, [r7, #4]
- 800141c: 6a9b ldr r3, [r3, #40] ; 0x28
- 800141e: 085b lsrs r3, r3, #1
- 8001420: 3b01 subs r3, #1
- 8001422: 041b lsls r3, r3, #16
- 8001424: 431a orrs r2, r3
- 8001426: 687b ldr r3, [r7, #4]
- 8001428: 6adb ldr r3, [r3, #44] ; 0x2c
- 800142a: 061b lsls r3, r3, #24
- 800142c: 431a orrs r2, r3
- 800142e: 687b ldr r3, [r7, #4]
- 8001430: 6b1b ldr r3, [r3, #48] ; 0x30
- 8001432: 071b lsls r3, r3, #28
- 8001434: 491e ldr r1, [pc, #120] ; (80014b0 <HAL_RCC_OscConfig+0x4dc>)
- 8001436: 4313 orrs r3, r2
- 8001438: 604b str r3, [r1, #4]
+ 8001570: 687b ldr r3, [r7, #4]
+ 8001572: 69da ldr r2, [r3, #28]
+ 8001574: 687b ldr r3, [r7, #4]
+ 8001576: 6a1b ldr r3, [r3, #32]
+ 8001578: 431a orrs r2, r3
+ 800157a: 687b ldr r3, [r7, #4]
+ 800157c: 6a5b ldr r3, [r3, #36] ; 0x24
+ 800157e: 019b lsls r3, r3, #6
+ 8001580: 431a orrs r2, r3
+ 8001582: 687b ldr r3, [r7, #4]
+ 8001584: 6a9b ldr r3, [r3, #40] ; 0x28
+ 8001586: 085b lsrs r3, r3, #1
+ 8001588: 3b01 subs r3, #1
+ 800158a: 041b lsls r3, r3, #16
+ 800158c: 431a orrs r2, r3
+ 800158e: 687b ldr r3, [r7, #4]
+ 8001590: 6adb ldr r3, [r3, #44] ; 0x2c
+ 8001592: 061b lsls r3, r3, #24
+ 8001594: 431a orrs r2, r3
+ 8001596: 687b ldr r3, [r7, #4]
+ 8001598: 6b1b ldr r3, [r3, #48] ; 0x30
+ 800159a: 071b lsls r3, r3, #28
+ 800159c: 491e ldr r1, [pc, #120] ; (8001618 <HAL_RCC_OscConfig+0x4dc>)
+ 800159e: 4313 orrs r3, r2
+ 80015a0: 604b str r3, [r1, #4]
RCC_OscInitStruct->PLL.PLLP,
RCC_OscInitStruct->PLL.PLLQ);
#endif
/* Enable the main PLL. */
__HAL_RCC_PLL_ENABLE();
- 800143a: 4b1d ldr r3, [pc, #116] ; (80014b0 <HAL_RCC_OscConfig+0x4dc>)
- 800143c: 681b ldr r3, [r3, #0]
- 800143e: 4a1c ldr r2, [pc, #112] ; (80014b0 <HAL_RCC_OscConfig+0x4dc>)
- 8001440: f043 7380 orr.w r3, r3, #16777216 ; 0x1000000
- 8001444: 6013 str r3, [r2, #0]
+ 80015a2: 4b1d ldr r3, [pc, #116] ; (8001618 <HAL_RCC_OscConfig+0x4dc>)
+ 80015a4: 681b ldr r3, [r3, #0]
+ 80015a6: 4a1c ldr r2, [pc, #112] ; (8001618 <HAL_RCC_OscConfig+0x4dc>)
+ 80015a8: f043 7380 orr.w r3, r3, #16777216 ; 0x1000000
+ 80015ac: 6013 str r3, [r2, #0]
/* Get Start Tick*/
tickstart = HAL_GetTick();
- 8001446: f7ff fb07 bl 8000a58 <HAL_GetTick>
- 800144a: 6138 str r0, [r7, #16]
+ 80015ae: f7ff fadb bl 8000b68 <HAL_GetTick>
+ 80015b2: 6138 str r0, [r7, #16]
/* Wait till PLL is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
- 800144c: e008 b.n 8001460 <HAL_RCC_OscConfig+0x48c>
+ 80015b4: e008 b.n 80015c8 <HAL_RCC_OscConfig+0x48c>
{
if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
- 800144e: f7ff fb03 bl 8000a58 <HAL_GetTick>
- 8001452: 4602 mov r2, r0
- 8001454: 693b ldr r3, [r7, #16]
- 8001456: 1ad3 subs r3, r2, r3
- 8001458: 2b02 cmp r3, #2
- 800145a: d901 bls.n 8001460 <HAL_RCC_OscConfig+0x48c>
+ 80015b6: f7ff fad7 bl 8000b68 <HAL_GetTick>
+ 80015ba: 4602 mov r2, r0
+ 80015bc: 693b ldr r3, [r7, #16]
+ 80015be: 1ad3 subs r3, r2, r3
+ 80015c0: 2b02 cmp r3, #2
+ 80015c2: d901 bls.n 80015c8 <HAL_RCC_OscConfig+0x48c>
{
return HAL_TIMEOUT;
- 800145c: 2303 movs r3, #3
- 800145e: e023 b.n 80014a8 <HAL_RCC_OscConfig+0x4d4>
+ 80015c4: 2303 movs r3, #3
+ 80015c6: e023 b.n 8001610 <HAL_RCC_OscConfig+0x4d4>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
- 8001460: 4b13 ldr r3, [pc, #76] ; (80014b0 <HAL_RCC_OscConfig+0x4dc>)
- 8001462: 681b ldr r3, [r3, #0]
- 8001464: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
- 8001468: 2b00 cmp r3, #0
- 800146a: d0f0 beq.n 800144e <HAL_RCC_OscConfig+0x47a>
- 800146c: e01b b.n 80014a6 <HAL_RCC_OscConfig+0x4d2>
+ 80015c8: 4b13 ldr r3, [pc, #76] ; (8001618 <HAL_RCC_OscConfig+0x4dc>)
+ 80015ca: 681b ldr r3, [r3, #0]
+ 80015cc: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
+ 80015d0: 2b00 cmp r3, #0
+ 80015d2: d0f0 beq.n 80015b6 <HAL_RCC_OscConfig+0x47a>
+ 80015d4: e01b b.n 800160e <HAL_RCC_OscConfig+0x4d2>
}
}
else
{
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
- 800146e: 4b10 ldr r3, [pc, #64] ; (80014b0 <HAL_RCC_OscConfig+0x4dc>)
- 8001470: 681b ldr r3, [r3, #0]
- 8001472: 4a0f ldr r2, [pc, #60] ; (80014b0 <HAL_RCC_OscConfig+0x4dc>)
- 8001474: f023 7380 bic.w r3, r3, #16777216 ; 0x1000000
- 8001478: 6013 str r3, [r2, #0]
+ 80015d6: 4b10 ldr r3, [pc, #64] ; (8001618 <HAL_RCC_OscConfig+0x4dc>)
+ 80015d8: 681b ldr r3, [r3, #0]
+ 80015da: 4a0f ldr r2, [pc, #60] ; (8001618 <HAL_RCC_OscConfig+0x4dc>)
+ 80015dc: f023 7380 bic.w r3, r3, #16777216 ; 0x1000000
+ 80015e0: 6013 str r3, [r2, #0]
/* Get Start Tick*/
tickstart = HAL_GetTick();
- 800147a: f7ff faed bl 8000a58 <HAL_GetTick>
- 800147e: 6138 str r0, [r7, #16]
+ 80015e2: f7ff fac1 bl 8000b68 <HAL_GetTick>
+ 80015e6: 6138 str r0, [r7, #16]
/* Wait till PLL is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
- 8001480: e008 b.n 8001494 <HAL_RCC_OscConfig+0x4c0>
+ 80015e8: e008 b.n 80015fc <HAL_RCC_OscConfig+0x4c0>
{
if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
- 8001482: f7ff fae9 bl 8000a58 <HAL_GetTick>
- 8001486: 4602 mov r2, r0
- 8001488: 693b ldr r3, [r7, #16]
- 800148a: 1ad3 subs r3, r2, r3
- 800148c: 2b02 cmp r3, #2
- 800148e: d901 bls.n 8001494 <HAL_RCC_OscConfig+0x4c0>
+ 80015ea: f7ff fabd bl 8000b68 <HAL_GetTick>
+ 80015ee: 4602 mov r2, r0
+ 80015f0: 693b ldr r3, [r7, #16]
+ 80015f2: 1ad3 subs r3, r2, r3
+ 80015f4: 2b02 cmp r3, #2
+ 80015f6: d901 bls.n 80015fc <HAL_RCC_OscConfig+0x4c0>
{
return HAL_TIMEOUT;
- 8001490: 2303 movs r3, #3
- 8001492: e009 b.n 80014a8 <HAL_RCC_OscConfig+0x4d4>
+ 80015f8: 2303 movs r3, #3
+ 80015fa: e009 b.n 8001610 <HAL_RCC_OscConfig+0x4d4>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
- 8001494: 4b06 ldr r3, [pc, #24] ; (80014b0 <HAL_RCC_OscConfig+0x4dc>)
- 8001496: 681b ldr r3, [r3, #0]
- 8001498: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
- 800149c: 2b00 cmp r3, #0
- 800149e: d1f0 bne.n 8001482 <HAL_RCC_OscConfig+0x4ae>
- 80014a0: e001 b.n 80014a6 <HAL_RCC_OscConfig+0x4d2>
+ 80015fc: 4b06 ldr r3, [pc, #24] ; (8001618 <HAL_RCC_OscConfig+0x4dc>)
+ 80015fe: 681b ldr r3, [r3, #0]
+ 8001600: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
+ 8001604: 2b00 cmp r3, #0
+ 8001606: d1f0 bne.n 80015ea <HAL_RCC_OscConfig+0x4ae>
+ 8001608: e001 b.n 800160e <HAL_RCC_OscConfig+0x4d2>
}
}
}
else
{
return HAL_ERROR;
- 80014a2: 2301 movs r3, #1
- 80014a4: e000 b.n 80014a8 <HAL_RCC_OscConfig+0x4d4>
+ 800160a: 2301 movs r3, #1
+ 800160c: e000 b.n 8001610 <HAL_RCC_OscConfig+0x4d4>
}
}
return HAL_OK;
- 80014a6: 2300 movs r3, #0
+ 800160e: 2300 movs r3, #0
}
- 80014a8: 4618 mov r0, r3
- 80014aa: 3718 adds r7, #24
- 80014ac: 46bd mov sp, r7
- 80014ae: bd80 pop {r7, pc}
- 80014b0: 40023800 .word 0x40023800
- 80014b4: 40007000 .word 0x40007000
-
-080014b8 <HAL_RCC_ClockConfig>:
+ 8001610: 4618 mov r0, r3
+ 8001612: 3718 adds r7, #24
+ 8001614: 46bd mov sp, r7
+ 8001616: bd80 pop {r7, pc}
+ 8001618: 40023800 .word 0x40023800
+ 800161c: 40007000 .word 0x40007000
+
+08001620 <HAL_RCC_ClockConfig>:
* HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency
* (for more details refer to section above "Initialization/de-initialization functions")
* @retval None
*/
HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
{
- 80014b8: b580 push {r7, lr}
- 80014ba: b084 sub sp, #16
- 80014bc: af00 add r7, sp, #0
- 80014be: 6078 str r0, [r7, #4]
- 80014c0: 6039 str r1, [r7, #0]
+ 8001620: b580 push {r7, lr}
+ 8001622: b084 sub sp, #16
+ 8001624: af00 add r7, sp, #0
+ 8001626: 6078 str r0, [r7, #4]
+ 8001628: 6039 str r1, [r7, #0]
uint32_t tickstart = 0;
- 80014c2: 2300 movs r3, #0
- 80014c4: 60fb str r3, [r7, #12]
+ 800162a: 2300 movs r3, #0
+ 800162c: 60fb str r3, [r7, #12]
/* Check Null pointer */
if(RCC_ClkInitStruct == NULL)
- 80014c6: 687b ldr r3, [r7, #4]
- 80014c8: 2b00 cmp r3, #0
- 80014ca: d101 bne.n 80014d0 <HAL_RCC_ClockConfig+0x18>
+ 800162e: 687b ldr r3, [r7, #4]
+ 8001630: 2b00 cmp r3, #0
+ 8001632: d101 bne.n 8001638 <HAL_RCC_ClockConfig+0x18>
{
return HAL_ERROR;
- 80014cc: 2301 movs r3, #1
- 80014ce: e0ce b.n 800166e <HAL_RCC_ClockConfig+0x1b6>
+ 8001634: 2301 movs r3, #1
+ 8001636: e0ce b.n 80017d6 <HAL_RCC_ClockConfig+0x1b6>
/* To correctly read data from FLASH memory, the number of wait states (LATENCY)
must be correctly programmed according to the frequency of the CPU clock
(HCLK) and the supply voltage of the device. */
/* Increasing the CPU frequency */
if(FLatency > __HAL_FLASH_GET_LATENCY())
- 80014d0: 4b69 ldr r3, [pc, #420] ; (8001678 <HAL_RCC_ClockConfig+0x1c0>)
- 80014d2: 681b ldr r3, [r3, #0]
- 80014d4: f003 030f and.w r3, r3, #15
- 80014d8: 683a ldr r2, [r7, #0]
- 80014da: 429a cmp r2, r3
- 80014dc: d910 bls.n 8001500 <HAL_RCC_ClockConfig+0x48>
+ 8001638: 4b69 ldr r3, [pc, #420] ; (80017e0 <HAL_RCC_ClockConfig+0x1c0>)
+ 800163a: 681b ldr r3, [r3, #0]
+ 800163c: f003 030f and.w r3, r3, #15
+ 8001640: 683a ldr r2, [r7, #0]
+ 8001642: 429a cmp r2, r3
+ 8001644: d910 bls.n 8001668 <HAL_RCC_ClockConfig+0x48>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
__HAL_FLASH_SET_LATENCY(FLatency);
- 80014de: 4b66 ldr r3, [pc, #408] ; (8001678 <HAL_RCC_ClockConfig+0x1c0>)
- 80014e0: 681b ldr r3, [r3, #0]
- 80014e2: f023 020f bic.w r2, r3, #15
- 80014e6: 4964 ldr r1, [pc, #400] ; (8001678 <HAL_RCC_ClockConfig+0x1c0>)
- 80014e8: 683b ldr r3, [r7, #0]
- 80014ea: 4313 orrs r3, r2
- 80014ec: 600b str r3, [r1, #0]
+ 8001646: 4b66 ldr r3, [pc, #408] ; (80017e0 <HAL_RCC_ClockConfig+0x1c0>)
+ 8001648: 681b ldr r3, [r3, #0]
+ 800164a: f023 020f bic.w r2, r3, #15
+ 800164e: 4964 ldr r1, [pc, #400] ; (80017e0 <HAL_RCC_ClockConfig+0x1c0>)
+ 8001650: 683b ldr r3, [r7, #0]
+ 8001652: 4313 orrs r3, r2
+ 8001654: 600b str r3, [r1, #0]
/* Check that the new number of wait states is taken into account to access the Flash
memory by reading the FLASH_ACR register */
if(__HAL_FLASH_GET_LATENCY() != FLatency)
- 80014ee: 4b62 ldr r3, [pc, #392] ; (8001678 <HAL_RCC_ClockConfig+0x1c0>)
- 80014f0: 681b ldr r3, [r3, #0]
- 80014f2: f003 030f and.w r3, r3, #15
- 80014f6: 683a ldr r2, [r7, #0]
- 80014f8: 429a cmp r2, r3
- 80014fa: d001 beq.n 8001500 <HAL_RCC_ClockConfig+0x48>
+ 8001656: 4b62 ldr r3, [pc, #392] ; (80017e0 <HAL_RCC_ClockConfig+0x1c0>)
+ 8001658: 681b ldr r3, [r3, #0]
+ 800165a: f003 030f and.w r3, r3, #15
+ 800165e: 683a ldr r2, [r7, #0]
+ 8001660: 429a cmp r2, r3
+ 8001662: d001 beq.n 8001668 <HAL_RCC_ClockConfig+0x48>
{
return HAL_ERROR;
- 80014fc: 2301 movs r3, #1
- 80014fe: e0b6 b.n 800166e <HAL_RCC_ClockConfig+0x1b6>
+ 8001664: 2301 movs r3, #1
+ 8001666: e0b6 b.n 80017d6 <HAL_RCC_ClockConfig+0x1b6>
}
}
/*-------------------------- HCLK Configuration --------------------------*/
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
- 8001500: 687b ldr r3, [r7, #4]
- 8001502: 681b ldr r3, [r3, #0]
- 8001504: f003 0302 and.w r3, r3, #2
- 8001508: 2b00 cmp r3, #0
- 800150a: d020 beq.n 800154e <HAL_RCC_ClockConfig+0x96>
+ 8001668: 687b ldr r3, [r7, #4]
+ 800166a: 681b ldr r3, [r3, #0]
+ 800166c: f003 0302 and.w r3, r3, #2
+ 8001670: 2b00 cmp r3, #0
+ 8001672: d020 beq.n 80016b6 <HAL_RCC_ClockConfig+0x96>
{
/* Set the highest APBx dividers in order to ensure that we do not go through
a non-spec phase whatever we decrease or increase HCLK. */
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
- 800150c: 687b ldr r3, [r7, #4]
- 800150e: 681b ldr r3, [r3, #0]
- 8001510: f003 0304 and.w r3, r3, #4
- 8001514: 2b00 cmp r3, #0
- 8001516: d005 beq.n 8001524 <HAL_RCC_ClockConfig+0x6c>
+ 8001674: 687b ldr r3, [r7, #4]
+ 8001676: 681b ldr r3, [r3, #0]
+ 8001678: f003 0304 and.w r3, r3, #4
+ 800167c: 2b00 cmp r3, #0
+ 800167e: d005 beq.n 800168c <HAL_RCC_ClockConfig+0x6c>
{
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
- 8001518: 4b58 ldr r3, [pc, #352] ; (800167c <HAL_RCC_ClockConfig+0x1c4>)
- 800151a: 689b ldr r3, [r3, #8]
- 800151c: 4a57 ldr r2, [pc, #348] ; (800167c <HAL_RCC_ClockConfig+0x1c4>)
- 800151e: f443 53e0 orr.w r3, r3, #7168 ; 0x1c00
- 8001522: 6093 str r3, [r2, #8]
+ 8001680: 4b58 ldr r3, [pc, #352] ; (80017e4 <HAL_RCC_ClockConfig+0x1c4>)
+ 8001682: 689b ldr r3, [r3, #8]
+ 8001684: 4a57 ldr r2, [pc, #348] ; (80017e4 <HAL_RCC_ClockConfig+0x1c4>)
+ 8001686: f443 53e0 orr.w r3, r3, #7168 ; 0x1c00
+ 800168a: 6093 str r3, [r2, #8]
}
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
- 8001524: 687b ldr r3, [r7, #4]
- 8001526: 681b ldr r3, [r3, #0]
- 8001528: f003 0308 and.w r3, r3, #8
- 800152c: 2b00 cmp r3, #0
- 800152e: d005 beq.n 800153c <HAL_RCC_ClockConfig+0x84>
+ 800168c: 687b ldr r3, [r7, #4]
+ 800168e: 681b ldr r3, [r3, #0]
+ 8001690: f003 0308 and.w r3, r3, #8
+ 8001694: 2b00 cmp r3, #0
+ 8001696: d005 beq.n 80016a4 <HAL_RCC_ClockConfig+0x84>
{
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
- 8001530: 4b52 ldr r3, [pc, #328] ; (800167c <HAL_RCC_ClockConfig+0x1c4>)
- 8001532: 689b ldr r3, [r3, #8]
- 8001534: 4a51 ldr r2, [pc, #324] ; (800167c <HAL_RCC_ClockConfig+0x1c4>)
- 8001536: f443 4360 orr.w r3, r3, #57344 ; 0xe000
- 800153a: 6093 str r3, [r2, #8]
+ 8001698: 4b52 ldr r3, [pc, #328] ; (80017e4 <HAL_RCC_ClockConfig+0x1c4>)
+ 800169a: 689b ldr r3, [r3, #8]
+ 800169c: 4a51 ldr r2, [pc, #324] ; (80017e4 <HAL_RCC_ClockConfig+0x1c4>)
+ 800169e: f443 4360 orr.w r3, r3, #57344 ; 0xe000
+ 80016a2: 6093 str r3, [r2, #8]
}
/* Set the new HCLK clock divider */
assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
- 800153c: 4b4f ldr r3, [pc, #316] ; (800167c <HAL_RCC_ClockConfig+0x1c4>)
- 800153e: 689b ldr r3, [r3, #8]
- 8001540: f023 02f0 bic.w r2, r3, #240 ; 0xf0
- 8001544: 687b ldr r3, [r7, #4]
- 8001546: 689b ldr r3, [r3, #8]
- 8001548: 494c ldr r1, [pc, #304] ; (800167c <HAL_RCC_ClockConfig+0x1c4>)
- 800154a: 4313 orrs r3, r2
- 800154c: 608b str r3, [r1, #8]
+ 80016a4: 4b4f ldr r3, [pc, #316] ; (80017e4 <HAL_RCC_ClockConfig+0x1c4>)
+ 80016a6: 689b ldr r3, [r3, #8]
+ 80016a8: f023 02f0 bic.w r2, r3, #240 ; 0xf0
+ 80016ac: 687b ldr r3, [r7, #4]
+ 80016ae: 689b ldr r3, [r3, #8]
+ 80016b0: 494c ldr r1, [pc, #304] ; (80017e4 <HAL_RCC_ClockConfig+0x1c4>)
+ 80016b2: 4313 orrs r3, r2
+ 80016b4: 608b str r3, [r1, #8]
}
/*------------------------- SYSCLK Configuration ---------------------------*/
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
- 800154e: 687b ldr r3, [r7, #4]
- 8001550: 681b ldr r3, [r3, #0]
- 8001552: f003 0301 and.w r3, r3, #1
- 8001556: 2b00 cmp r3, #0
- 8001558: d040 beq.n 80015dc <HAL_RCC_ClockConfig+0x124>
+ 80016b6: 687b ldr r3, [r7, #4]
+ 80016b8: 681b ldr r3, [r3, #0]
+ 80016ba: f003 0301 and.w r3, r3, #1
+ 80016be: 2b00 cmp r3, #0
+ 80016c0: d040 beq.n 8001744 <HAL_RCC_ClockConfig+0x124>
{
assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
/* HSE is selected as System Clock Source */
if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
- 800155a: 687b ldr r3, [r7, #4]
- 800155c: 685b ldr r3, [r3, #4]
- 800155e: 2b01 cmp r3, #1
- 8001560: d107 bne.n 8001572 <HAL_RCC_ClockConfig+0xba>
+ 80016c2: 687b ldr r3, [r7, #4]
+ 80016c4: 685b ldr r3, [r3, #4]
+ 80016c6: 2b01 cmp r3, #1
+ 80016c8: d107 bne.n 80016da <HAL_RCC_ClockConfig+0xba>
{
/* Check the HSE ready flag */
if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
- 8001562: 4b46 ldr r3, [pc, #280] ; (800167c <HAL_RCC_ClockConfig+0x1c4>)
- 8001564: 681b ldr r3, [r3, #0]
- 8001566: f403 3300 and.w r3, r3, #131072 ; 0x20000
- 800156a: 2b00 cmp r3, #0
- 800156c: d115 bne.n 800159a <HAL_RCC_ClockConfig+0xe2>
+ 80016ca: 4b46 ldr r3, [pc, #280] ; (80017e4 <HAL_RCC_ClockConfig+0x1c4>)
+ 80016cc: 681b ldr r3, [r3, #0]
+ 80016ce: f403 3300 and.w r3, r3, #131072 ; 0x20000
+ 80016d2: 2b00 cmp r3, #0
+ 80016d4: d115 bne.n 8001702 <HAL_RCC_ClockConfig+0xe2>
{
return HAL_ERROR;
- 800156e: 2301 movs r3, #1
- 8001570: e07d b.n 800166e <HAL_RCC_ClockConfig+0x1b6>
+ 80016d6: 2301 movs r3, #1
+ 80016d8: e07d b.n 80017d6 <HAL_RCC_ClockConfig+0x1b6>
}
}
/* PLL is selected as System Clock Source */
else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
- 8001572: 687b ldr r3, [r7, #4]
- 8001574: 685b ldr r3, [r3, #4]
- 8001576: 2b02 cmp r3, #2
- 8001578: d107 bne.n 800158a <HAL_RCC_ClockConfig+0xd2>
+ 80016da: 687b ldr r3, [r7, #4]
+ 80016dc: 685b ldr r3, [r3, #4]
+ 80016de: 2b02 cmp r3, #2
+ 80016e0: d107 bne.n 80016f2 <HAL_RCC_ClockConfig+0xd2>
{
/* Check the PLL ready flag */
if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
- 800157a: 4b40 ldr r3, [pc, #256] ; (800167c <HAL_RCC_ClockConfig+0x1c4>)
- 800157c: 681b ldr r3, [r3, #0]
- 800157e: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
- 8001582: 2b00 cmp r3, #0
- 8001584: d109 bne.n 800159a <HAL_RCC_ClockConfig+0xe2>
+ 80016e2: 4b40 ldr r3, [pc, #256] ; (80017e4 <HAL_RCC_ClockConfig+0x1c4>)
+ 80016e4: 681b ldr r3, [r3, #0]
+ 80016e6: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
+ 80016ea: 2b00 cmp r3, #0
+ 80016ec: d109 bne.n 8001702 <HAL_RCC_ClockConfig+0xe2>
{
return HAL_ERROR;
- 8001586: 2301 movs r3, #1
- 8001588: e071 b.n 800166e <HAL_RCC_ClockConfig+0x1b6>
+ 80016ee: 2301 movs r3, #1
+ 80016f0: e071 b.n 80017d6 <HAL_RCC_ClockConfig+0x1b6>
}
/* HSI is selected as System Clock Source */
else
{
/* Check the HSI ready flag */
if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
- 800158a: 4b3c ldr r3, [pc, #240] ; (800167c <HAL_RCC_ClockConfig+0x1c4>)
- 800158c: 681b ldr r3, [r3, #0]
- 800158e: f003 0302 and.w r3, r3, #2
- 8001592: 2b00 cmp r3, #0
- 8001594: d101 bne.n 800159a <HAL_RCC_ClockConfig+0xe2>
+ 80016f2: 4b3c ldr r3, [pc, #240] ; (80017e4 <HAL_RCC_ClockConfig+0x1c4>)
+ 80016f4: 681b ldr r3, [r3, #0]
+ 80016f6: f003 0302 and.w r3, r3, #2
+ 80016fa: 2b00 cmp r3, #0
+ 80016fc: d101 bne.n 8001702 <HAL_RCC_ClockConfig+0xe2>
{
return HAL_ERROR;
- 8001596: 2301 movs r3, #1
- 8001598: e069 b.n 800166e <HAL_RCC_ClockConfig+0x1b6>
+ 80016fe: 2301 movs r3, #1
+ 8001700: e069 b.n 80017d6 <HAL_RCC_ClockConfig+0x1b6>
}
}
__HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
- 800159a: 4b38 ldr r3, [pc, #224] ; (800167c <HAL_RCC_ClockConfig+0x1c4>)
- 800159c: 689b ldr r3, [r3, #8]
- 800159e: f023 0203 bic.w r2, r3, #3
- 80015a2: 687b ldr r3, [r7, #4]
- 80015a4: 685b ldr r3, [r3, #4]
- 80015a6: 4935 ldr r1, [pc, #212] ; (800167c <HAL_RCC_ClockConfig+0x1c4>)
- 80015a8: 4313 orrs r3, r2
- 80015aa: 608b str r3, [r1, #8]
+ 8001702: 4b38 ldr r3, [pc, #224] ; (80017e4 <HAL_RCC_ClockConfig+0x1c4>)
+ 8001704: 689b ldr r3, [r3, #8]
+ 8001706: f023 0203 bic.w r2, r3, #3
+ 800170a: 687b ldr r3, [r7, #4]
+ 800170c: 685b ldr r3, [r3, #4]
+ 800170e: 4935 ldr r1, [pc, #212] ; (80017e4 <HAL_RCC_ClockConfig+0x1c4>)
+ 8001710: 4313 orrs r3, r2
+ 8001712: 608b str r3, [r1, #8]
/* Get Start Tick*/
tickstart = HAL_GetTick();
- 80015ac: f7ff fa54 bl 8000a58 <HAL_GetTick>
- 80015b0: 60f8 str r0, [r7, #12]
+ 8001714: f7ff fa28 bl 8000b68 <HAL_GetTick>
+ 8001718: 60f8 str r0, [r7, #12]
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
- 80015b2: e00a b.n 80015ca <HAL_RCC_ClockConfig+0x112>
+ 800171a: e00a b.n 8001732 <HAL_RCC_ClockConfig+0x112>
{
if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
- 80015b4: f7ff fa50 bl 8000a58 <HAL_GetTick>
- 80015b8: 4602 mov r2, r0
- 80015ba: 68fb ldr r3, [r7, #12]
- 80015bc: 1ad3 subs r3, r2, r3
- 80015be: f241 3288 movw r2, #5000 ; 0x1388
- 80015c2: 4293 cmp r3, r2
- 80015c4: d901 bls.n 80015ca <HAL_RCC_ClockConfig+0x112>
+ 800171c: f7ff fa24 bl 8000b68 <HAL_GetTick>
+ 8001720: 4602 mov r2, r0
+ 8001722: 68fb ldr r3, [r7, #12]
+ 8001724: 1ad3 subs r3, r2, r3
+ 8001726: f241 3288 movw r2, #5000 ; 0x1388
+ 800172a: 4293 cmp r3, r2
+ 800172c: d901 bls.n 8001732 <HAL_RCC_ClockConfig+0x112>
{
return HAL_TIMEOUT;
- 80015c6: 2303 movs r3, #3
- 80015c8: e051 b.n 800166e <HAL_RCC_ClockConfig+0x1b6>
+ 800172e: 2303 movs r3, #3
+ 8001730: e051 b.n 80017d6 <HAL_RCC_ClockConfig+0x1b6>
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
- 80015ca: 4b2c ldr r3, [pc, #176] ; (800167c <HAL_RCC_ClockConfig+0x1c4>)
- 80015cc: 689b ldr r3, [r3, #8]
- 80015ce: f003 020c and.w r2, r3, #12
- 80015d2: 687b ldr r3, [r7, #4]
- 80015d4: 685b ldr r3, [r3, #4]
- 80015d6: 009b lsls r3, r3, #2
- 80015d8: 429a cmp r2, r3
- 80015da: d1eb bne.n 80015b4 <HAL_RCC_ClockConfig+0xfc>
+ 8001732: 4b2c ldr r3, [pc, #176] ; (80017e4 <HAL_RCC_ClockConfig+0x1c4>)
+ 8001734: 689b ldr r3, [r3, #8]
+ 8001736: f003 020c and.w r2, r3, #12
+ 800173a: 687b ldr r3, [r7, #4]
+ 800173c: 685b ldr r3, [r3, #4]
+ 800173e: 009b lsls r3, r3, #2
+ 8001740: 429a cmp r2, r3
+ 8001742: d1eb bne.n 800171c <HAL_RCC_ClockConfig+0xfc>
}
}
}
/* Decreasing the number of wait states because of lower CPU frequency */
if(FLatency < __HAL_FLASH_GET_LATENCY())
- 80015dc: 4b26 ldr r3, [pc, #152] ; (8001678 <HAL_RCC_ClockConfig+0x1c0>)
- 80015de: 681b ldr r3, [r3, #0]
- 80015e0: f003 030f and.w r3, r3, #15
- 80015e4: 683a ldr r2, [r7, #0]
- 80015e6: 429a cmp r2, r3
- 80015e8: d210 bcs.n 800160c <HAL_RCC_ClockConfig+0x154>
+ 8001744: 4b26 ldr r3, [pc, #152] ; (80017e0 <HAL_RCC_ClockConfig+0x1c0>)
+ 8001746: 681b ldr r3, [r3, #0]
+ 8001748: f003 030f and.w r3, r3, #15
+ 800174c: 683a ldr r2, [r7, #0]
+ 800174e: 429a cmp r2, r3
+ 8001750: d210 bcs.n 8001774 <HAL_RCC_ClockConfig+0x154>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
__HAL_FLASH_SET_LATENCY(FLatency);
- 80015ea: 4b23 ldr r3, [pc, #140] ; (8001678 <HAL_RCC_ClockConfig+0x1c0>)
- 80015ec: 681b ldr r3, [r3, #0]
- 80015ee: f023 020f bic.w r2, r3, #15
- 80015f2: 4921 ldr r1, [pc, #132] ; (8001678 <HAL_RCC_ClockConfig+0x1c0>)
- 80015f4: 683b ldr r3, [r7, #0]
- 80015f6: 4313 orrs r3, r2
- 80015f8: 600b str r3, [r1, #0]
+ 8001752: 4b23 ldr r3, [pc, #140] ; (80017e0 <HAL_RCC_ClockConfig+0x1c0>)
+ 8001754: 681b ldr r3, [r3, #0]
+ 8001756: f023 020f bic.w r2, r3, #15
+ 800175a: 4921 ldr r1, [pc, #132] ; (80017e0 <HAL_RCC_ClockConfig+0x1c0>)
+ 800175c: 683b ldr r3, [r7, #0]
+ 800175e: 4313 orrs r3, r2
+ 8001760: 600b str r3, [r1, #0]
/* Check that the new number of wait states is taken into account to access the Flash
memory by reading the FLASH_ACR register */
if(__HAL_FLASH_GET_LATENCY() != FLatency)
- 80015fa: 4b1f ldr r3, [pc, #124] ; (8001678 <HAL_RCC_ClockConfig+0x1c0>)
- 80015fc: 681b ldr r3, [r3, #0]
- 80015fe: f003 030f and.w r3, r3, #15
- 8001602: 683a ldr r2, [r7, #0]
- 8001604: 429a cmp r2, r3
- 8001606: d001 beq.n 800160c <HAL_RCC_ClockConfig+0x154>
+ 8001762: 4b1f ldr r3, [pc, #124] ; (80017e0 <HAL_RCC_ClockConfig+0x1c0>)
+ 8001764: 681b ldr r3, [r3, #0]
+ 8001766: f003 030f and.w r3, r3, #15
+ 800176a: 683a ldr r2, [r7, #0]
+ 800176c: 429a cmp r2, r3
+ 800176e: d001 beq.n 8001774 <HAL_RCC_ClockConfig+0x154>
{
return HAL_ERROR;
- 8001608: 2301 movs r3, #1
- 800160a: e030 b.n 800166e <HAL_RCC_ClockConfig+0x1b6>
+ 8001770: 2301 movs r3, #1
+ 8001772: e030 b.n 80017d6 <HAL_RCC_ClockConfig+0x1b6>
}
}
/*-------------------------- PCLK1 Configuration ---------------------------*/
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
- 800160c: 687b ldr r3, [r7, #4]
- 800160e: 681b ldr r3, [r3, #0]
- 8001610: f003 0304 and.w r3, r3, #4
- 8001614: 2b00 cmp r3, #0
- 8001616: d008 beq.n 800162a <HAL_RCC_ClockConfig+0x172>
+ 8001774: 687b ldr r3, [r7, #4]
+ 8001776: 681b ldr r3, [r3, #0]
+ 8001778: f003 0304 and.w r3, r3, #4
+ 800177c: 2b00 cmp r3, #0
+ 800177e: d008 beq.n 8001792 <HAL_RCC_ClockConfig+0x172>
{
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
- 8001618: 4b18 ldr r3, [pc, #96] ; (800167c <HAL_RCC_ClockConfig+0x1c4>)
- 800161a: 689b ldr r3, [r3, #8]
- 800161c: f423 52e0 bic.w r2, r3, #7168 ; 0x1c00
- 8001620: 687b ldr r3, [r7, #4]
- 8001622: 68db ldr r3, [r3, #12]
- 8001624: 4915 ldr r1, [pc, #84] ; (800167c <HAL_RCC_ClockConfig+0x1c4>)
- 8001626: 4313 orrs r3, r2
- 8001628: 608b str r3, [r1, #8]
+ 8001780: 4b18 ldr r3, [pc, #96] ; (80017e4 <HAL_RCC_ClockConfig+0x1c4>)
+ 8001782: 689b ldr r3, [r3, #8]
+ 8001784: f423 52e0 bic.w r2, r3, #7168 ; 0x1c00
+ 8001788: 687b ldr r3, [r7, #4]
+ 800178a: 68db ldr r3, [r3, #12]
+ 800178c: 4915 ldr r1, [pc, #84] ; (80017e4 <HAL_RCC_ClockConfig+0x1c4>)
+ 800178e: 4313 orrs r3, r2
+ 8001790: 608b str r3, [r1, #8]
}
/*-------------------------- PCLK2 Configuration ---------------------------*/
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
- 800162a: 687b ldr r3, [r7, #4]
- 800162c: 681b ldr r3, [r3, #0]
- 800162e: f003 0308 and.w r3, r3, #8
- 8001632: 2b00 cmp r3, #0
- 8001634: d009 beq.n 800164a <HAL_RCC_ClockConfig+0x192>
+ 8001792: 687b ldr r3, [r7, #4]
+ 8001794: 681b ldr r3, [r3, #0]
+ 8001796: f003 0308 and.w r3, r3, #8
+ 800179a: 2b00 cmp r3, #0
+ 800179c: d009 beq.n 80017b2 <HAL_RCC_ClockConfig+0x192>
{
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
- 8001636: 4b11 ldr r3, [pc, #68] ; (800167c <HAL_RCC_ClockConfig+0x1c4>)
- 8001638: 689b ldr r3, [r3, #8]
- 800163a: f423 4260 bic.w r2, r3, #57344 ; 0xe000
- 800163e: 687b ldr r3, [r7, #4]
- 8001640: 691b ldr r3, [r3, #16]
- 8001642: 00db lsls r3, r3, #3
- 8001644: 490d ldr r1, [pc, #52] ; (800167c <HAL_RCC_ClockConfig+0x1c4>)
- 8001646: 4313 orrs r3, r2
- 8001648: 608b str r3, [r1, #8]
+ 800179e: 4b11 ldr r3, [pc, #68] ; (80017e4 <HAL_RCC_ClockConfig+0x1c4>)
+ 80017a0: 689b ldr r3, [r3, #8]
+ 80017a2: f423 4260 bic.w r2, r3, #57344 ; 0xe000
+ 80017a6: 687b ldr r3, [r7, #4]
+ 80017a8: 691b ldr r3, [r3, #16]
+ 80017aa: 00db lsls r3, r3, #3
+ 80017ac: 490d ldr r1, [pc, #52] ; (80017e4 <HAL_RCC_ClockConfig+0x1c4>)
+ 80017ae: 4313 orrs r3, r2
+ 80017b0: 608b str r3, [r1, #8]
}
/* Update the SystemCoreClock global variable */
SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos];
- 800164a: f000 f81d bl 8001688 <HAL_RCC_GetSysClockFreq>
- 800164e: 4601 mov r1, r0
- 8001650: 4b0a ldr r3, [pc, #40] ; (800167c <HAL_RCC_ClockConfig+0x1c4>)
- 8001652: 689b ldr r3, [r3, #8]
- 8001654: 091b lsrs r3, r3, #4
- 8001656: f003 030f and.w r3, r3, #15
- 800165a: 4a09 ldr r2, [pc, #36] ; (8001680 <HAL_RCC_ClockConfig+0x1c8>)
- 800165c: 5cd3 ldrb r3, [r2, r3]
- 800165e: fa21 f303 lsr.w r3, r1, r3
- 8001662: 4a08 ldr r2, [pc, #32] ; (8001684 <HAL_RCC_ClockConfig+0x1cc>)
- 8001664: 6013 str r3, [r2, #0]
+ 80017b2: f000 f81d bl 80017f0 <HAL_RCC_GetSysClockFreq>
+ 80017b6: 4601 mov r1, r0
+ 80017b8: 4b0a ldr r3, [pc, #40] ; (80017e4 <HAL_RCC_ClockConfig+0x1c4>)
+ 80017ba: 689b ldr r3, [r3, #8]
+ 80017bc: 091b lsrs r3, r3, #4
+ 80017be: f003 030f and.w r3, r3, #15
+ 80017c2: 4a09 ldr r2, [pc, #36] ; (80017e8 <HAL_RCC_ClockConfig+0x1c8>)
+ 80017c4: 5cd3 ldrb r3, [r2, r3]
+ 80017c6: fa21 f303 lsr.w r3, r1, r3
+ 80017ca: 4a08 ldr r2, [pc, #32] ; (80017ec <HAL_RCC_ClockConfig+0x1cc>)
+ 80017cc: 6013 str r3, [r2, #0]
/* Configure the source of time base considering new system clocks settings*/
HAL_InitTick (TICK_INT_PRIORITY);
- 8001666: 2000 movs r0, #0
- 8001668: f7ff f9b2 bl 80009d0 <HAL_InitTick>
+ 80017ce: 2000 movs r0, #0
+ 80017d0: f7ff f986 bl 8000ae0 <HAL_InitTick>
return HAL_OK;
- 800166c: 2300 movs r3, #0
+ 80017d4: 2300 movs r3, #0
}
- 800166e: 4618 mov r0, r3
- 8001670: 3710 adds r7, #16
- 8001672: 46bd mov sp, r7
- 8001674: bd80 pop {r7, pc}
- 8001676: bf00 nop
- 8001678: 40023c00 .word 0x40023c00
- 800167c: 40023800 .word 0x40023800
- 8001680: 08002a5c .word 0x08002a5c
- 8001684: 20000000 .word 0x20000000
-
-08001688 <HAL_RCC_GetSysClockFreq>:
+ 80017d6: 4618 mov r0, r3
+ 80017d8: 3710 adds r7, #16
+ 80017da: 46bd mov sp, r7
+ 80017dc: bd80 pop {r7, pc}
+ 80017de: bf00 nop
+ 80017e0: 40023c00 .word 0x40023c00
+ 80017e4: 40023800 .word 0x40023800
+ 80017e8: 080038ec .word 0x080038ec
+ 80017ec: 20000000 .word 0x20000000
+
+080017f0 <HAL_RCC_GetSysClockFreq>:
*
*
* @retval SYSCLK frequency
*/
uint32_t HAL_RCC_GetSysClockFreq(void)
{
- 8001688: b5f0 push {r4, r5, r6, r7, lr}
- 800168a: b085 sub sp, #20
- 800168c: af00 add r7, sp, #0
+ 80017f0: b5f0 push {r4, r5, r6, r7, lr}
+ 80017f2: b085 sub sp, #20
+ 80017f4: af00 add r7, sp, #0
uint32_t pllm = 0, pllvco = 0, pllp = 0;
- 800168e: 2300 movs r3, #0
- 8001690: 607b str r3, [r7, #4]
- 8001692: 2300 movs r3, #0
- 8001694: 60fb str r3, [r7, #12]
- 8001696: 2300 movs r3, #0
- 8001698: 603b str r3, [r7, #0]
+ 80017f6: 2300 movs r3, #0
+ 80017f8: 607b str r3, [r7, #4]
+ 80017fa: 2300 movs r3, #0
+ 80017fc: 60fb str r3, [r7, #12]
+ 80017fe: 2300 movs r3, #0
+ 8001800: 603b str r3, [r7, #0]
uint32_t sysclockfreq = 0;
- 800169a: 2300 movs r3, #0
- 800169c: 60bb str r3, [r7, #8]
+ 8001802: 2300 movs r3, #0
+ 8001804: 60bb str r3, [r7, #8]
/* Get SYSCLK source -------------------------------------------------------*/
switch (RCC->CFGR & RCC_CFGR_SWS)
- 800169e: 4b50 ldr r3, [pc, #320] ; (80017e0 <HAL_RCC_GetSysClockFreq+0x158>)
- 80016a0: 689b ldr r3, [r3, #8]
- 80016a2: f003 030c and.w r3, r3, #12
- 80016a6: 2b04 cmp r3, #4
- 80016a8: d007 beq.n 80016ba <HAL_RCC_GetSysClockFreq+0x32>
- 80016aa: 2b08 cmp r3, #8
- 80016ac: d008 beq.n 80016c0 <HAL_RCC_GetSysClockFreq+0x38>
- 80016ae: 2b00 cmp r3, #0
- 80016b0: f040 808d bne.w 80017ce <HAL_RCC_GetSysClockFreq+0x146>
+ 8001806: 4b50 ldr r3, [pc, #320] ; (8001948 <HAL_RCC_GetSysClockFreq+0x158>)
+ 8001808: 689b ldr r3, [r3, #8]
+ 800180a: f003 030c and.w r3, r3, #12
+ 800180e: 2b04 cmp r3, #4
+ 8001810: d007 beq.n 8001822 <HAL_RCC_GetSysClockFreq+0x32>
+ 8001812: 2b08 cmp r3, #8
+ 8001814: d008 beq.n 8001828 <HAL_RCC_GetSysClockFreq+0x38>
+ 8001816: 2b00 cmp r3, #0
+ 8001818: f040 808d bne.w 8001936 <HAL_RCC_GetSysClockFreq+0x146>
{
case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */
{
sysclockfreq = HSI_VALUE;
- 80016b4: 4b4b ldr r3, [pc, #300] ; (80017e4 <HAL_RCC_GetSysClockFreq+0x15c>)
- 80016b6: 60bb str r3, [r7, #8]
+ 800181c: 4b4b ldr r3, [pc, #300] ; (800194c <HAL_RCC_GetSysClockFreq+0x15c>)
+ 800181e: 60bb str r3, [r7, #8]
break;
- 80016b8: e08c b.n 80017d4 <HAL_RCC_GetSysClockFreq+0x14c>
+ 8001820: e08c b.n 800193c <HAL_RCC_GetSysClockFreq+0x14c>
}
case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock source */
{
sysclockfreq = HSE_VALUE;
- 80016ba: 4b4b ldr r3, [pc, #300] ; (80017e8 <HAL_RCC_GetSysClockFreq+0x160>)
- 80016bc: 60bb str r3, [r7, #8]
+ 8001822: 4b4b ldr r3, [pc, #300] ; (8001950 <HAL_RCC_GetSysClockFreq+0x160>)
+ 8001824: 60bb str r3, [r7, #8]
break;
- 80016be: e089 b.n 80017d4 <HAL_RCC_GetSysClockFreq+0x14c>
+ 8001826: e089 b.n 800193c <HAL_RCC_GetSysClockFreq+0x14c>
}
case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock source */
{
/* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
SYSCLK = PLL_VCO / PLLP */
pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
- 80016c0: 4b47 ldr r3, [pc, #284] ; (80017e0 <HAL_RCC_GetSysClockFreq+0x158>)
- 80016c2: 685b ldr r3, [r3, #4]
- 80016c4: f003 033f and.w r3, r3, #63 ; 0x3f
- 80016c8: 607b str r3, [r7, #4]
+ 8001828: 4b47 ldr r3, [pc, #284] ; (8001948 <HAL_RCC_GetSysClockFreq+0x158>)
+ 800182a: 685b ldr r3, [r3, #4]
+ 800182c: f003 033f and.w r3, r3, #63 ; 0x3f
+ 8001830: 607b str r3, [r7, #4]
if (__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLCFGR_PLLSRC_HSI)
- 80016ca: 4b45 ldr r3, [pc, #276] ; (80017e0 <HAL_RCC_GetSysClockFreq+0x158>)
- 80016cc: 685b ldr r3, [r3, #4]
- 80016ce: f403 0380 and.w r3, r3, #4194304 ; 0x400000
- 80016d2: 2b00 cmp r3, #0
- 80016d4: d023 beq.n 800171e <HAL_RCC_GetSysClockFreq+0x96>
+ 8001832: 4b45 ldr r3, [pc, #276] ; (8001948 <HAL_RCC_GetSysClockFreq+0x158>)
+ 8001834: 685b ldr r3, [r3, #4]
+ 8001836: f403 0380 and.w r3, r3, #4194304 ; 0x400000
+ 800183a: 2b00 cmp r3, #0
+ 800183c: d023 beq.n 8001886 <HAL_RCC_GetSysClockFreq+0x96>
{
/* HSE used as PLL clock source */
pllvco = (uint32_t) ((((uint64_t) HSE_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm);
- 80016d6: 4b42 ldr r3, [pc, #264] ; (80017e0 <HAL_RCC_GetSysClockFreq+0x158>)
- 80016d8: 685b ldr r3, [r3, #4]
- 80016da: 099b lsrs r3, r3, #6
- 80016dc: f04f 0400 mov.w r4, #0
- 80016e0: f240 11ff movw r1, #511 ; 0x1ff
- 80016e4: f04f 0200 mov.w r2, #0
- 80016e8: ea03 0501 and.w r5, r3, r1
- 80016ec: ea04 0602 and.w r6, r4, r2
- 80016f0: 4a3d ldr r2, [pc, #244] ; (80017e8 <HAL_RCC_GetSysClockFreq+0x160>)
- 80016f2: fb02 f106 mul.w r1, r2, r6
- 80016f6: 2200 movs r2, #0
- 80016f8: fb02 f205 mul.w r2, r2, r5
- 80016fc: 440a add r2, r1
- 80016fe: 493a ldr r1, [pc, #232] ; (80017e8 <HAL_RCC_GetSysClockFreq+0x160>)
- 8001700: fba5 0101 umull r0, r1, r5, r1
- 8001704: 1853 adds r3, r2, r1
- 8001706: 4619 mov r1, r3
- 8001708: 687b ldr r3, [r7, #4]
- 800170a: f04f 0400 mov.w r4, #0
- 800170e: 461a mov r2, r3
- 8001710: 4623 mov r3, r4
- 8001712: f7fe fd91 bl 8000238 <__aeabi_uldivmod>
- 8001716: 4603 mov r3, r0
- 8001718: 460c mov r4, r1
- 800171a: 60fb str r3, [r7, #12]
- 800171c: e049 b.n 80017b2 <HAL_RCC_GetSysClockFreq+0x12a>
+ 800183e: 4b42 ldr r3, [pc, #264] ; (8001948 <HAL_RCC_GetSysClockFreq+0x158>)
+ 8001840: 685b ldr r3, [r3, #4]
+ 8001842: 099b lsrs r3, r3, #6
+ 8001844: f04f 0400 mov.w r4, #0
+ 8001848: f240 11ff movw r1, #511 ; 0x1ff
+ 800184c: f04f 0200 mov.w r2, #0
+ 8001850: ea03 0501 and.w r5, r3, r1
+ 8001854: ea04 0602 and.w r6, r4, r2
+ 8001858: 4a3d ldr r2, [pc, #244] ; (8001950 <HAL_RCC_GetSysClockFreq+0x160>)
+ 800185a: fb02 f106 mul.w r1, r2, r6
+ 800185e: 2200 movs r2, #0
+ 8001860: fb02 f205 mul.w r2, r2, r5
+ 8001864: 440a add r2, r1
+ 8001866: 493a ldr r1, [pc, #232] ; (8001950 <HAL_RCC_GetSysClockFreq+0x160>)
+ 8001868: fba5 0101 umull r0, r1, r5, r1
+ 800186c: 1853 adds r3, r2, r1
+ 800186e: 4619 mov r1, r3
+ 8001870: 687b ldr r3, [r7, #4]
+ 8001872: f04f 0400 mov.w r4, #0
+ 8001876: 461a mov r2, r3
+ 8001878: 4623 mov r3, r4
+ 800187a: f7fe fcdd bl 8000238 <__aeabi_uldivmod>
+ 800187e: 4603 mov r3, r0
+ 8001880: 460c mov r4, r1
+ 8001882: 60fb str r3, [r7, #12]
+ 8001884: e049 b.n 800191a <HAL_RCC_GetSysClockFreq+0x12a>
}
else
{
/* HSI used as PLL clock source */
pllvco = (uint32_t) ((((uint64_t) HSI_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm);
- 800171e: 4b30 ldr r3, [pc, #192] ; (80017e0 <HAL_RCC_GetSysClockFreq+0x158>)
- 8001720: 685b ldr r3, [r3, #4]
- 8001722: 099b lsrs r3, r3, #6
- 8001724: f04f 0400 mov.w r4, #0
- 8001728: f240 11ff movw r1, #511 ; 0x1ff
- 800172c: f04f 0200 mov.w r2, #0
- 8001730: ea03 0501 and.w r5, r3, r1
- 8001734: ea04 0602 and.w r6, r4, r2
- 8001738: 4629 mov r1, r5
- 800173a: 4632 mov r2, r6
- 800173c: f04f 0300 mov.w r3, #0
- 8001740: f04f 0400 mov.w r4, #0
- 8001744: 0154 lsls r4, r2, #5
- 8001746: ea44 64d1 orr.w r4, r4, r1, lsr #27
- 800174a: 014b lsls r3, r1, #5
- 800174c: 4619 mov r1, r3
- 800174e: 4622 mov r2, r4
- 8001750: 1b49 subs r1, r1, r5
- 8001752: eb62 0206 sbc.w r2, r2, r6
- 8001756: f04f 0300 mov.w r3, #0
- 800175a: f04f 0400 mov.w r4, #0
- 800175e: 0194 lsls r4, r2, #6
- 8001760: ea44 6491 orr.w r4, r4, r1, lsr #26
- 8001764: 018b lsls r3, r1, #6
- 8001766: 1a5b subs r3, r3, r1
- 8001768: eb64 0402 sbc.w r4, r4, r2
- 800176c: f04f 0100 mov.w r1, #0
- 8001770: f04f 0200 mov.w r2, #0
- 8001774: 00e2 lsls r2, r4, #3
- 8001776: ea42 7253 orr.w r2, r2, r3, lsr #29
- 800177a: 00d9 lsls r1, r3, #3
- 800177c: 460b mov r3, r1
- 800177e: 4614 mov r4, r2
- 8001780: 195b adds r3, r3, r5
- 8001782: eb44 0406 adc.w r4, r4, r6
- 8001786: f04f 0100 mov.w r1, #0
- 800178a: f04f 0200 mov.w r2, #0
- 800178e: 02a2 lsls r2, r4, #10
- 8001790: ea42 5293 orr.w r2, r2, r3, lsr #22
- 8001794: 0299 lsls r1, r3, #10
- 8001796: 460b mov r3, r1
- 8001798: 4614 mov r4, r2
- 800179a: 4618 mov r0, r3
- 800179c: 4621 mov r1, r4
- 800179e: 687b ldr r3, [r7, #4]
- 80017a0: f04f 0400 mov.w r4, #0
- 80017a4: 461a mov r2, r3
- 80017a6: 4623 mov r3, r4
- 80017a8: f7fe fd46 bl 8000238 <__aeabi_uldivmod>
- 80017ac: 4603 mov r3, r0
- 80017ae: 460c mov r4, r1
- 80017b0: 60fb str r3, [r7, #12]
+ 8001886: 4b30 ldr r3, [pc, #192] ; (8001948 <HAL_RCC_GetSysClockFreq+0x158>)
+ 8001888: 685b ldr r3, [r3, #4]
+ 800188a: 099b lsrs r3, r3, #6
+ 800188c: f04f 0400 mov.w r4, #0
+ 8001890: f240 11ff movw r1, #511 ; 0x1ff
+ 8001894: f04f 0200 mov.w r2, #0
+ 8001898: ea03 0501 and.w r5, r3, r1
+ 800189c: ea04 0602 and.w r6, r4, r2
+ 80018a0: 4629 mov r1, r5
+ 80018a2: 4632 mov r2, r6
+ 80018a4: f04f 0300 mov.w r3, #0
+ 80018a8: f04f 0400 mov.w r4, #0
+ 80018ac: 0154 lsls r4, r2, #5
+ 80018ae: ea44 64d1 orr.w r4, r4, r1, lsr #27
+ 80018b2: 014b lsls r3, r1, #5
+ 80018b4: 4619 mov r1, r3
+ 80018b6: 4622 mov r2, r4
+ 80018b8: 1b49 subs r1, r1, r5
+ 80018ba: eb62 0206 sbc.w r2, r2, r6
+ 80018be: f04f 0300 mov.w r3, #0
+ 80018c2: f04f 0400 mov.w r4, #0
+ 80018c6: 0194 lsls r4, r2, #6
+ 80018c8: ea44 6491 orr.w r4, r4, r1, lsr #26
+ 80018cc: 018b lsls r3, r1, #6
+ 80018ce: 1a5b subs r3, r3, r1
+ 80018d0: eb64 0402 sbc.w r4, r4, r2
+ 80018d4: f04f 0100 mov.w r1, #0
+ 80018d8: f04f 0200 mov.w r2, #0
+ 80018dc: 00e2 lsls r2, r4, #3
+ 80018de: ea42 7253 orr.w r2, r2, r3, lsr #29
+ 80018e2: 00d9 lsls r1, r3, #3
+ 80018e4: 460b mov r3, r1
+ 80018e6: 4614 mov r4, r2
+ 80018e8: 195b adds r3, r3, r5
+ 80018ea: eb44 0406 adc.w r4, r4, r6
+ 80018ee: f04f 0100 mov.w r1, #0
+ 80018f2: f04f 0200 mov.w r2, #0
+ 80018f6: 02a2 lsls r2, r4, #10
+ 80018f8: ea42 5293 orr.w r2, r2, r3, lsr #22
+ 80018fc: 0299 lsls r1, r3, #10
+ 80018fe: 460b mov r3, r1
+ 8001900: 4614 mov r4, r2
+ 8001902: 4618 mov r0, r3
+ 8001904: 4621 mov r1, r4
+ 8001906: 687b ldr r3, [r7, #4]
+ 8001908: f04f 0400 mov.w r4, #0
+ 800190c: 461a mov r2, r3
+ 800190e: 4623 mov r3, r4
+ 8001910: f7fe fc92 bl 8000238 <__aeabi_uldivmod>
+ 8001914: 4603 mov r3, r0
+ 8001916: 460c mov r4, r1
+ 8001918: 60fb str r3, [r7, #12]
}
pllp = ((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >> RCC_PLLCFGR_PLLP_Pos) + 1 ) *2);
- 80017b2: 4b0b ldr r3, [pc, #44] ; (80017e0 <HAL_RCC_GetSysClockFreq+0x158>)
- 80017b4: 685b ldr r3, [r3, #4]
- 80017b6: 0c1b lsrs r3, r3, #16
- 80017b8: f003 0303 and.w r3, r3, #3
- 80017bc: 3301 adds r3, #1
- 80017be: 005b lsls r3, r3, #1
- 80017c0: 603b str r3, [r7, #0]
+ 800191a: 4b0b ldr r3, [pc, #44] ; (8001948 <HAL_RCC_GetSysClockFreq+0x158>)
+ 800191c: 685b ldr r3, [r3, #4]
+ 800191e: 0c1b lsrs r3, r3, #16
+ 8001920: f003 0303 and.w r3, r3, #3
+ 8001924: 3301 adds r3, #1
+ 8001926: 005b lsls r3, r3, #1
+ 8001928: 603b str r3, [r7, #0]
sysclockfreq = pllvco/pllp;
- 80017c2: 68fa ldr r2, [r7, #12]
- 80017c4: 683b ldr r3, [r7, #0]
- 80017c6: fbb2 f3f3 udiv r3, r2, r3
- 80017ca: 60bb str r3, [r7, #8]
+ 800192a: 68fa ldr r2, [r7, #12]
+ 800192c: 683b ldr r3, [r7, #0]
+ 800192e: fbb2 f3f3 udiv r3, r2, r3
+ 8001932: 60bb str r3, [r7, #8]
break;
- 80017cc: e002 b.n 80017d4 <HAL_RCC_GetSysClockFreq+0x14c>
+ 8001934: e002 b.n 800193c <HAL_RCC_GetSysClockFreq+0x14c>
}
default:
{
sysclockfreq = HSI_VALUE;
- 80017ce: 4b05 ldr r3, [pc, #20] ; (80017e4 <HAL_RCC_GetSysClockFreq+0x15c>)
- 80017d0: 60bb str r3, [r7, #8]
+ 8001936: 4b05 ldr r3, [pc, #20] ; (800194c <HAL_RCC_GetSysClockFreq+0x15c>)
+ 8001938: 60bb str r3, [r7, #8]
break;
- 80017d2: bf00 nop
+ 800193a: bf00 nop
}
}
return sysclockfreq;
- 80017d4: 68bb ldr r3, [r7, #8]
+ 800193c: 68bb ldr r3, [r7, #8]
}
- 80017d6: 4618 mov r0, r3
- 80017d8: 3714 adds r7, #20
- 80017da: 46bd mov sp, r7
- 80017dc: bdf0 pop {r4, r5, r6, r7, pc}
- 80017de: bf00 nop
- 80017e0: 40023800 .word 0x40023800
- 80017e4: 00f42400 .word 0x00f42400
- 80017e8: 017d7840 .word 0x017d7840
-
-080017ec <HAL_RCC_GetHCLKFreq>:
+ 800193e: 4618 mov r0, r3
+ 8001940: 3714 adds r7, #20
+ 8001942: 46bd mov sp, r7
+ 8001944: bdf0 pop {r4, r5, r6, r7, pc}
+ 8001946: bf00 nop
+ 8001948: 40023800 .word 0x40023800
+ 800194c: 00f42400 .word 0x00f42400
+ 8001950: 017d7840 .word 0x017d7840
+
+08001954 <HAL_RCC_GetHCLKFreq>:
* right HCLK value. Otherwise, any configuration based on this function will be incorrect.
* @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency.
* @retval HCLK frequency
*/
uint32_t HAL_RCC_GetHCLKFreq(void)
{
- 80017ec: b480 push {r7}
- 80017ee: af00 add r7, sp, #0
+ 8001954: b480 push {r7}
+ 8001956: af00 add r7, sp, #0
return SystemCoreClock;
- 80017f0: 4b03 ldr r3, [pc, #12] ; (8001800 <HAL_RCC_GetHCLKFreq+0x14>)
- 80017f2: 681b ldr r3, [r3, #0]
+ 8001958: 4b03 ldr r3, [pc, #12] ; (8001968 <HAL_RCC_GetHCLKFreq+0x14>)
+ 800195a: 681b ldr r3, [r3, #0]
}
- 80017f4: 4618 mov r0, r3
- 80017f6: 46bd mov sp, r7
- 80017f8: f85d 7b04 ldr.w r7, [sp], #4
- 80017fc: 4770 bx lr
- 80017fe: bf00 nop
- 8001800: 20000000 .word 0x20000000
-
-08001804 <HAL_RCC_GetPCLK1Freq>:
+ 800195c: 4618 mov r0, r3
+ 800195e: 46bd mov sp, r7
+ 8001960: f85d 7b04 ldr.w r7, [sp], #4
+ 8001964: 4770 bx lr
+ 8001966: bf00 nop
+ 8001968: 20000000 .word 0x20000000
+
+0800196c <HAL_RCC_GetPCLK1Freq>:
* @note Each time PCLK1 changes, this function must be called to update the
* right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
* @retval PCLK1 frequency
*/
uint32_t HAL_RCC_GetPCLK1Freq(void)
{
- 8001804: b580 push {r7, lr}
- 8001806: af00 add r7, sp, #0
+ 800196c: b580 push {r7, lr}
+ 800196e: af00 add r7, sp, #0
/* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1)>> RCC_CFGR_PPRE1_Pos]);
- 8001808: f7ff fff0 bl 80017ec <HAL_RCC_GetHCLKFreq>
- 800180c: 4601 mov r1, r0
- 800180e: 4b05 ldr r3, [pc, #20] ; (8001824 <HAL_RCC_GetPCLK1Freq+0x20>)
- 8001810: 689b ldr r3, [r3, #8]
- 8001812: 0a9b lsrs r3, r3, #10
- 8001814: f003 0307 and.w r3, r3, #7
- 8001818: 4a03 ldr r2, [pc, #12] ; (8001828 <HAL_RCC_GetPCLK1Freq+0x24>)
- 800181a: 5cd3 ldrb r3, [r2, r3]
- 800181c: fa21 f303 lsr.w r3, r1, r3
+ 8001970: f7ff fff0 bl 8001954 <HAL_RCC_GetHCLKFreq>
+ 8001974: 4601 mov r1, r0
+ 8001976: 4b05 ldr r3, [pc, #20] ; (800198c <HAL_RCC_GetPCLK1Freq+0x20>)
+ 8001978: 689b ldr r3, [r3, #8]
+ 800197a: 0a9b lsrs r3, r3, #10
+ 800197c: f003 0307 and.w r3, r3, #7
+ 8001980: 4a03 ldr r2, [pc, #12] ; (8001990 <HAL_RCC_GetPCLK1Freq+0x24>)
+ 8001982: 5cd3 ldrb r3, [r2, r3]
+ 8001984: fa21 f303 lsr.w r3, r1, r3
}
- 8001820: 4618 mov r0, r3
- 8001822: bd80 pop {r7, pc}
- 8001824: 40023800 .word 0x40023800
- 8001828: 08002a6c .word 0x08002a6c
+ 8001988: 4618 mov r0, r3
+ 800198a: bd80 pop {r7, pc}
+ 800198c: 40023800 .word 0x40023800
+ 8001990: 080038fc .word 0x080038fc
-0800182c <HAL_RCC_GetPCLK2Freq>:
+08001994 <HAL_RCC_GetPCLK2Freq>:
* @note Each time PCLK2 changes, this function must be called to update the
* right PCLK2 value. Otherwise, any configuration based on this function will be incorrect.
* @retval PCLK2 frequency
*/
uint32_t HAL_RCC_GetPCLK2Freq(void)
{
- 800182c: b580 push {r7, lr}
- 800182e: af00 add r7, sp, #0
+ 8001994: b580 push {r7, lr}
+ 8001996: af00 add r7, sp, #0
/* Get HCLK source and Compute PCLK2 frequency ---------------------------*/
return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2)>> RCC_CFGR_PPRE2_Pos]);
- 8001830: f7ff ffdc bl 80017ec <HAL_RCC_GetHCLKFreq>
- 8001834: 4601 mov r1, r0
- 8001836: 4b05 ldr r3, [pc, #20] ; (800184c <HAL_RCC_GetPCLK2Freq+0x20>)
- 8001838: 689b ldr r3, [r3, #8]
- 800183a: 0b5b lsrs r3, r3, #13
- 800183c: f003 0307 and.w r3, r3, #7
- 8001840: 4a03 ldr r2, [pc, #12] ; (8001850 <HAL_RCC_GetPCLK2Freq+0x24>)
- 8001842: 5cd3 ldrb r3, [r2, r3]
- 8001844: fa21 f303 lsr.w r3, r1, r3
+ 8001998: f7ff ffdc bl 8001954 <HAL_RCC_GetHCLKFreq>
+ 800199c: 4601 mov r1, r0
+ 800199e: 4b05 ldr r3, [pc, #20] ; (80019b4 <HAL_RCC_GetPCLK2Freq+0x20>)
+ 80019a0: 689b ldr r3, [r3, #8]
+ 80019a2: 0b5b lsrs r3, r3, #13
+ 80019a4: f003 0307 and.w r3, r3, #7
+ 80019a8: 4a03 ldr r2, [pc, #12] ; (80019b8 <HAL_RCC_GetPCLK2Freq+0x24>)
+ 80019aa: 5cd3 ldrb r3, [r2, r3]
+ 80019ac: fa21 f303 lsr.w r3, r1, r3
}
- 8001848: 4618 mov r0, r3
- 800184a: bd80 pop {r7, pc}
- 800184c: 40023800 .word 0x40023800
- 8001850: 08002a6c .word 0x08002a6c
+ 80019b0: 4618 mov r0, r3
+ 80019b2: bd80 pop {r7, pc}
+ 80019b4: 40023800 .word 0x40023800
+ 80019b8: 080038fc .word 0x080038fc
-08001854 <HAL_RCCEx_PeriphCLKConfig>:
+080019bc <HAL_RCCEx_PeriphCLKConfig>:
* the backup registers) are set to their reset values.
*
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
{
- 8001854: b580 push {r7, lr}
- 8001856: b088 sub sp, #32
- 8001858: af00 add r7, sp, #0
- 800185a: 6078 str r0, [r7, #4]
+ 80019bc: b580 push {r7, lr}
+ 80019be: b088 sub sp, #32
+ 80019c0: af00 add r7, sp, #0
+ 80019c2: 6078 str r0, [r7, #4]
uint32_t tickstart = 0;
- 800185c: 2300 movs r3, #0
- 800185e: 617b str r3, [r7, #20]
+ 80019c4: 2300 movs r3, #0
+ 80019c6: 617b str r3, [r7, #20]
uint32_t tmpreg0 = 0;
- 8001860: 2300 movs r3, #0
- 8001862: 613b str r3, [r7, #16]
+ 80019c8: 2300 movs r3, #0
+ 80019ca: 613b str r3, [r7, #16]
uint32_t tmpreg1 = 0;
- 8001864: 2300 movs r3, #0
- 8001866: 60fb str r3, [r7, #12]
+ 80019cc: 2300 movs r3, #0
+ 80019ce: 60fb str r3, [r7, #12]
uint32_t plli2sused = 0;
- 8001868: 2300 movs r3, #0
- 800186a: 61fb str r3, [r7, #28]
+ 80019d0: 2300 movs r3, #0
+ 80019d2: 61fb str r3, [r7, #28]
uint32_t pllsaiused = 0;
- 800186c: 2300 movs r3, #0
- 800186e: 61bb str r3, [r7, #24]
+ 80019d4: 2300 movs r3, #0
+ 80019d6: 61bb str r3, [r7, #24]
/* Check the parameters */
assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
/*----------------------------------- I2S configuration ----------------------------------*/
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S) == (RCC_PERIPHCLK_I2S))
- 8001870: 687b ldr r3, [r7, #4]
- 8001872: 681b ldr r3, [r3, #0]
- 8001874: f003 0301 and.w r3, r3, #1
- 8001878: 2b00 cmp r3, #0
- 800187a: d012 beq.n 80018a2 <HAL_RCCEx_PeriphCLKConfig+0x4e>
+ 80019d8: 687b ldr r3, [r7, #4]
+ 80019da: 681b ldr r3, [r3, #0]
+ 80019dc: f003 0301 and.w r3, r3, #1
+ 80019e0: 2b00 cmp r3, #0
+ 80019e2: d012 beq.n 8001a0a <HAL_RCCEx_PeriphCLKConfig+0x4e>
{
/* Check the parameters */
assert_param(IS_RCC_I2SCLKSOURCE(PeriphClkInit->I2sClockSelection));
/* Configure I2S Clock source */
__HAL_RCC_I2S_CONFIG(PeriphClkInit->I2sClockSelection);
- 800187c: 4b69 ldr r3, [pc, #420] ; (8001a24 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 800187e: 689b ldr r3, [r3, #8]
- 8001880: 4a68 ldr r2, [pc, #416] ; (8001a24 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 8001882: f423 0300 bic.w r3, r3, #8388608 ; 0x800000
- 8001886: 6093 str r3, [r2, #8]
- 8001888: 4b66 ldr r3, [pc, #408] ; (8001a24 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 800188a: 689a ldr r2, [r3, #8]
- 800188c: 687b ldr r3, [r7, #4]
- 800188e: 6b5b ldr r3, [r3, #52] ; 0x34
- 8001890: 4964 ldr r1, [pc, #400] ; (8001a24 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 8001892: 4313 orrs r3, r2
- 8001894: 608b str r3, [r1, #8]
+ 80019e4: 4b69 ldr r3, [pc, #420] ; (8001b8c <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 80019e6: 689b ldr r3, [r3, #8]
+ 80019e8: 4a68 ldr r2, [pc, #416] ; (8001b8c <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 80019ea: f423 0300 bic.w r3, r3, #8388608 ; 0x800000
+ 80019ee: 6093 str r3, [r2, #8]
+ 80019f0: 4b66 ldr r3, [pc, #408] ; (8001b8c <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 80019f2: 689a ldr r2, [r3, #8]
+ 80019f4: 687b ldr r3, [r7, #4]
+ 80019f6: 6b5b ldr r3, [r3, #52] ; 0x34
+ 80019f8: 4964 ldr r1, [pc, #400] ; (8001b8c <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 80019fa: 4313 orrs r3, r2
+ 80019fc: 608b str r3, [r1, #8]
/* Enable the PLLI2S when it's used as clock source for I2S */
if(PeriphClkInit->I2sClockSelection == RCC_I2SCLKSOURCE_PLLI2S)
- 8001896: 687b ldr r3, [r7, #4]
- 8001898: 6b5b ldr r3, [r3, #52] ; 0x34
- 800189a: 2b00 cmp r3, #0
- 800189c: d101 bne.n 80018a2 <HAL_RCCEx_PeriphCLKConfig+0x4e>
+ 80019fe: 687b ldr r3, [r7, #4]
+ 8001a00: 6b5b ldr r3, [r3, #52] ; 0x34
+ 8001a02: 2b00 cmp r3, #0
+ 8001a04: d101 bne.n 8001a0a <HAL_RCCEx_PeriphCLKConfig+0x4e>
{
plli2sused = 1;
- 800189e: 2301 movs r3, #1
- 80018a0: 61fb str r3, [r7, #28]
+ 8001a06: 2301 movs r3, #1
+ 8001a08: 61fb str r3, [r7, #28]
}
}
/*------------------------------------ SAI1 configuration --------------------------------------*/
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == (RCC_PERIPHCLK_SAI1))
- 80018a2: 687b ldr r3, [r7, #4]
- 80018a4: 681b ldr r3, [r3, #0]
- 80018a6: f403 2300 and.w r3, r3, #524288 ; 0x80000
- 80018aa: 2b00 cmp r3, #0
- 80018ac: d017 beq.n 80018de <HAL_RCCEx_PeriphCLKConfig+0x8a>
+ 8001a0a: 687b ldr r3, [r7, #4]
+ 8001a0c: 681b ldr r3, [r3, #0]
+ 8001a0e: f403 2300 and.w r3, r3, #524288 ; 0x80000
+ 8001a12: 2b00 cmp r3, #0
+ 8001a14: d017 beq.n 8001a46 <HAL_RCCEx_PeriphCLKConfig+0x8a>
{
/* Check the parameters */
assert_param(IS_RCC_SAI1CLKSOURCE(PeriphClkInit->Sai1ClockSelection));
/* Configure SAI1 Clock source */
__HAL_RCC_SAI1_CONFIG(PeriphClkInit->Sai1ClockSelection);
- 80018ae: 4b5d ldr r3, [pc, #372] ; (8001a24 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 80018b0: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c
- 80018b4: f423 1240 bic.w r2, r3, #3145728 ; 0x300000
- 80018b8: 687b ldr r3, [r7, #4]
- 80018ba: 6bdb ldr r3, [r3, #60] ; 0x3c
- 80018bc: 4959 ldr r1, [pc, #356] ; (8001a24 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 80018be: 4313 orrs r3, r2
- 80018c0: f8c1 308c str.w r3, [r1, #140] ; 0x8c
+ 8001a16: 4b5d ldr r3, [pc, #372] ; (8001b8c <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 8001a18: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c
+ 8001a1c: f423 1240 bic.w r2, r3, #3145728 ; 0x300000
+ 8001a20: 687b ldr r3, [r7, #4]
+ 8001a22: 6bdb ldr r3, [r3, #60] ; 0x3c
+ 8001a24: 4959 ldr r1, [pc, #356] ; (8001b8c <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 8001a26: 4313 orrs r3, r2
+ 8001a28: f8c1 308c str.w r3, [r1, #140] ; 0x8c
/* Enable the PLLI2S when it's used as clock source for SAI */
if(PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLI2S)
- 80018c4: 687b ldr r3, [r7, #4]
- 80018c6: 6bdb ldr r3, [r3, #60] ; 0x3c
- 80018c8: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000
- 80018cc: d101 bne.n 80018d2 <HAL_RCCEx_PeriphCLKConfig+0x7e>
+ 8001a2c: 687b ldr r3, [r7, #4]
+ 8001a2e: 6bdb ldr r3, [r3, #60] ; 0x3c
+ 8001a30: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000
+ 8001a34: d101 bne.n 8001a3a <HAL_RCCEx_PeriphCLKConfig+0x7e>
{
plli2sused = 1;
- 80018ce: 2301 movs r3, #1
- 80018d0: 61fb str r3, [r7, #28]
+ 8001a36: 2301 movs r3, #1
+ 8001a38: 61fb str r3, [r7, #28]
}
/* Enable the PLLSAI when it's used as clock source for SAI */
if(PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLSAI)
- 80018d2: 687b ldr r3, [r7, #4]
- 80018d4: 6bdb ldr r3, [r3, #60] ; 0x3c
- 80018d6: 2b00 cmp r3, #0
- 80018d8: d101 bne.n 80018de <HAL_RCCEx_PeriphCLKConfig+0x8a>
+ 8001a3a: 687b ldr r3, [r7, #4]
+ 8001a3c: 6bdb ldr r3, [r3, #60] ; 0x3c
+ 8001a3e: 2b00 cmp r3, #0
+ 8001a40: d101 bne.n 8001a46 <HAL_RCCEx_PeriphCLKConfig+0x8a>
{
pllsaiused = 1;
- 80018da: 2301 movs r3, #1
- 80018dc: 61bb str r3, [r7, #24]
+ 8001a42: 2301 movs r3, #1
+ 8001a44: 61bb str r3, [r7, #24]
}
}
/*------------------------------------ SAI2 configuration --------------------------------------*/
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == (RCC_PERIPHCLK_SAI2))
- 80018de: 687b ldr r3, [r7, #4]
- 80018e0: 681b ldr r3, [r3, #0]
- 80018e2: f403 1380 and.w r3, r3, #1048576 ; 0x100000
- 80018e6: 2b00 cmp r3, #0
- 80018e8: d017 beq.n 800191a <HAL_RCCEx_PeriphCLKConfig+0xc6>
+ 8001a46: 687b ldr r3, [r7, #4]
+ 8001a48: 681b ldr r3, [r3, #0]
+ 8001a4a: f403 1380 and.w r3, r3, #1048576 ; 0x100000
+ 8001a4e: 2b00 cmp r3, #0
+ 8001a50: d017 beq.n 8001a82 <HAL_RCCEx_PeriphCLKConfig+0xc6>
{
/* Check the parameters */
assert_param(IS_RCC_SAI2CLKSOURCE(PeriphClkInit->Sai2ClockSelection));
/* Configure SAI2 Clock source */
__HAL_RCC_SAI2_CONFIG(PeriphClkInit->Sai2ClockSelection);
- 80018ea: 4b4e ldr r3, [pc, #312] ; (8001a24 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 80018ec: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c
- 80018f0: f423 0240 bic.w r2, r3, #12582912 ; 0xc00000
- 80018f4: 687b ldr r3, [r7, #4]
- 80018f6: 6c1b ldr r3, [r3, #64] ; 0x40
- 80018f8: 494a ldr r1, [pc, #296] ; (8001a24 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 80018fa: 4313 orrs r3, r2
- 80018fc: f8c1 308c str.w r3, [r1, #140] ; 0x8c
+ 8001a52: 4b4e ldr r3, [pc, #312] ; (8001b8c <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 8001a54: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c
+ 8001a58: f423 0240 bic.w r2, r3, #12582912 ; 0xc00000
+ 8001a5c: 687b ldr r3, [r7, #4]
+ 8001a5e: 6c1b ldr r3, [r3, #64] ; 0x40
+ 8001a60: 494a ldr r1, [pc, #296] ; (8001b8c <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 8001a62: 4313 orrs r3, r2
+ 8001a64: f8c1 308c str.w r3, [r1, #140] ; 0x8c
/* Enable the PLLI2S when it's used as clock source for SAI */
if(PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLI2S)
- 8001900: 687b ldr r3, [r7, #4]
- 8001902: 6c1b ldr r3, [r3, #64] ; 0x40
- 8001904: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000
- 8001908: d101 bne.n 800190e <HAL_RCCEx_PeriphCLKConfig+0xba>
+ 8001a68: 687b ldr r3, [r7, #4]
+ 8001a6a: 6c1b ldr r3, [r3, #64] ; 0x40
+ 8001a6c: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000
+ 8001a70: d101 bne.n 8001a76 <HAL_RCCEx_PeriphCLKConfig+0xba>
{
plli2sused = 1;
- 800190a: 2301 movs r3, #1
- 800190c: 61fb str r3, [r7, #28]
+ 8001a72: 2301 movs r3, #1
+ 8001a74: 61fb str r3, [r7, #28]
}
/* Enable the PLLSAI when it's used as clock source for SAI */
if(PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLSAI)
- 800190e: 687b ldr r3, [r7, #4]
- 8001910: 6c1b ldr r3, [r3, #64] ; 0x40
- 8001912: 2b00 cmp r3, #0
- 8001914: d101 bne.n 800191a <HAL_RCCEx_PeriphCLKConfig+0xc6>
+ 8001a76: 687b ldr r3, [r7, #4]
+ 8001a78: 6c1b ldr r3, [r3, #64] ; 0x40
+ 8001a7a: 2b00 cmp r3, #0
+ 8001a7c: d101 bne.n 8001a82 <HAL_RCCEx_PeriphCLKConfig+0xc6>
{
pllsaiused = 1;
- 8001916: 2301 movs r3, #1
- 8001918: 61bb str r3, [r7, #24]
+ 8001a7e: 2301 movs r3, #1
+ 8001a80: 61bb str r3, [r7, #24]
}
}
/*-------------------------------------- SPDIF-RX Configuration -----------------------------------*/
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPDIFRX) == RCC_PERIPHCLK_SPDIFRX)
- 800191a: 687b ldr r3, [r7, #4]
- 800191c: 681b ldr r3, [r3, #0]
- 800191e: f003 7380 and.w r3, r3, #16777216 ; 0x1000000
- 8001922: 2b00 cmp r3, #0
- 8001924: d001 beq.n 800192a <HAL_RCCEx_PeriphCLKConfig+0xd6>
+ 8001a82: 687b ldr r3, [r7, #4]
+ 8001a84: 681b ldr r3, [r3, #0]
+ 8001a86: f003 7380 and.w r3, r3, #16777216 ; 0x1000000
+ 8001a8a: 2b00 cmp r3, #0
+ 8001a8c: d001 beq.n 8001a92 <HAL_RCCEx_PeriphCLKConfig+0xd6>
{
plli2sused = 1;
- 8001926: 2301 movs r3, #1
- 8001928: 61fb str r3, [r7, #28]
+ 8001a8e: 2301 movs r3, #1
+ 8001a90: 61fb str r3, [r7, #28]
}
/*------------------------------------ RTC configuration --------------------------------------*/
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == (RCC_PERIPHCLK_RTC))
- 800192a: 687b ldr r3, [r7, #4]
- 800192c: 681b ldr r3, [r3, #0]
- 800192e: f003 0320 and.w r3, r3, #32
- 8001932: 2b00 cmp r3, #0
- 8001934: f000 808b beq.w 8001a4e <HAL_RCCEx_PeriphCLKConfig+0x1fa>
+ 8001a92: 687b ldr r3, [r7, #4]
+ 8001a94: 681b ldr r3, [r3, #0]
+ 8001a96: f003 0320 and.w r3, r3, #32
+ 8001a9a: 2b00 cmp r3, #0
+ 8001a9c: f000 808b beq.w 8001bb6 <HAL_RCCEx_PeriphCLKConfig+0x1fa>
{
/* Check for RTC Parameters used to output RTCCLK */
assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection));
/* Enable Power Clock*/
__HAL_RCC_PWR_CLK_ENABLE();
- 8001938: 4b3a ldr r3, [pc, #232] ; (8001a24 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 800193a: 6c1b ldr r3, [r3, #64] ; 0x40
- 800193c: 4a39 ldr r2, [pc, #228] ; (8001a24 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 800193e: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
- 8001942: 6413 str r3, [r2, #64] ; 0x40
- 8001944: 4b37 ldr r3, [pc, #220] ; (8001a24 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 8001946: 6c1b ldr r3, [r3, #64] ; 0x40
- 8001948: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
- 800194c: 60bb str r3, [r7, #8]
- 800194e: 68bb ldr r3, [r7, #8]
+ 8001aa0: 4b3a ldr r3, [pc, #232] ; (8001b8c <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 8001aa2: 6c1b ldr r3, [r3, #64] ; 0x40
+ 8001aa4: 4a39 ldr r2, [pc, #228] ; (8001b8c <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 8001aa6: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
+ 8001aaa: 6413 str r3, [r2, #64] ; 0x40
+ 8001aac: 4b37 ldr r3, [pc, #220] ; (8001b8c <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 8001aae: 6c1b ldr r3, [r3, #64] ; 0x40
+ 8001ab0: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
+ 8001ab4: 60bb str r3, [r7, #8]
+ 8001ab6: 68bb ldr r3, [r7, #8]
/* Enable write access to Backup domain */
PWR->CR1 |= PWR_CR1_DBP;
- 8001950: 4b35 ldr r3, [pc, #212] ; (8001a28 <HAL_RCCEx_PeriphCLKConfig+0x1d4>)
- 8001952: 681b ldr r3, [r3, #0]
- 8001954: 4a34 ldr r2, [pc, #208] ; (8001a28 <HAL_RCCEx_PeriphCLKConfig+0x1d4>)
- 8001956: f443 7380 orr.w r3, r3, #256 ; 0x100
- 800195a: 6013 str r3, [r2, #0]
+ 8001ab8: 4b35 ldr r3, [pc, #212] ; (8001b90 <HAL_RCCEx_PeriphCLKConfig+0x1d4>)
+ 8001aba: 681b ldr r3, [r3, #0]
+ 8001abc: 4a34 ldr r2, [pc, #208] ; (8001b90 <HAL_RCCEx_PeriphCLKConfig+0x1d4>)
+ 8001abe: f443 7380 orr.w r3, r3, #256 ; 0x100
+ 8001ac2: 6013 str r3, [r2, #0]
/* Get Start Tick*/
tickstart = HAL_GetTick();
- 800195c: f7ff f87c bl 8000a58 <HAL_GetTick>
- 8001960: 6178 str r0, [r7, #20]
+ 8001ac4: f7ff f850 bl 8000b68 <HAL_GetTick>
+ 8001ac8: 6178 str r0, [r7, #20]
/* Wait for Backup domain Write protection disable */
while((PWR->CR1 & PWR_CR1_DBP) == RESET)
- 8001962: e008 b.n 8001976 <HAL_RCCEx_PeriphCLKConfig+0x122>
+ 8001aca: e008 b.n 8001ade <HAL_RCCEx_PeriphCLKConfig+0x122>
{
if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
- 8001964: f7ff f878 bl 8000a58 <HAL_GetTick>
- 8001968: 4602 mov r2, r0
- 800196a: 697b ldr r3, [r7, #20]
- 800196c: 1ad3 subs r3, r2, r3
- 800196e: 2b64 cmp r3, #100 ; 0x64
- 8001970: d901 bls.n 8001976 <HAL_RCCEx_PeriphCLKConfig+0x122>
+ 8001acc: f7ff f84c bl 8000b68 <HAL_GetTick>
+ 8001ad0: 4602 mov r2, r0
+ 8001ad2: 697b ldr r3, [r7, #20]
+ 8001ad4: 1ad3 subs r3, r2, r3
+ 8001ad6: 2b64 cmp r3, #100 ; 0x64
+ 8001ad8: d901 bls.n 8001ade <HAL_RCCEx_PeriphCLKConfig+0x122>
{
return HAL_TIMEOUT;
- 8001972: 2303 movs r3, #3
- 8001974: e38d b.n 8002092 <HAL_RCCEx_PeriphCLKConfig+0x83e>
+ 8001ada: 2303 movs r3, #3
+ 8001adc: e38d b.n 80021fa <HAL_RCCEx_PeriphCLKConfig+0x83e>
while((PWR->CR1 & PWR_CR1_DBP) == RESET)
- 8001976: 4b2c ldr r3, [pc, #176] ; (8001a28 <HAL_RCCEx_PeriphCLKConfig+0x1d4>)
- 8001978: 681b ldr r3, [r3, #0]
- 800197a: f403 7380 and.w r3, r3, #256 ; 0x100
- 800197e: 2b00 cmp r3, #0
- 8001980: d0f0 beq.n 8001964 <HAL_RCCEx_PeriphCLKConfig+0x110>
+ 8001ade: 4b2c ldr r3, [pc, #176] ; (8001b90 <HAL_RCCEx_PeriphCLKConfig+0x1d4>)
+ 8001ae0: 681b ldr r3, [r3, #0]
+ 8001ae2: f403 7380 and.w r3, r3, #256 ; 0x100
+ 8001ae6: 2b00 cmp r3, #0
+ 8001ae8: d0f0 beq.n 8001acc <HAL_RCCEx_PeriphCLKConfig+0x110>
}
}
/* Reset the Backup domain only if the RTC Clock source selection is modified */
tmpreg0 = (RCC->BDCR & RCC_BDCR_RTCSEL);
- 8001982: 4b28 ldr r3, [pc, #160] ; (8001a24 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 8001984: 6f1b ldr r3, [r3, #112] ; 0x70
- 8001986: f403 7340 and.w r3, r3, #768 ; 0x300
- 800198a: 613b str r3, [r7, #16]
+ 8001aea: 4b28 ldr r3, [pc, #160] ; (8001b8c <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 8001aec: 6f1b ldr r3, [r3, #112] ; 0x70
+ 8001aee: f403 7340 and.w r3, r3, #768 ; 0x300
+ 8001af2: 613b str r3, [r7, #16]
if((tmpreg0 != 0x00000000U) && (tmpreg0 != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)))
- 800198c: 693b ldr r3, [r7, #16]
- 800198e: 2b00 cmp r3, #0
- 8001990: d035 beq.n 80019fe <HAL_RCCEx_PeriphCLKConfig+0x1aa>
- 8001992: 687b ldr r3, [r7, #4]
- 8001994: 6b1b ldr r3, [r3, #48] ; 0x30
- 8001996: f403 7340 and.w r3, r3, #768 ; 0x300
- 800199a: 693a ldr r2, [r7, #16]
- 800199c: 429a cmp r2, r3
- 800199e: d02e beq.n 80019fe <HAL_RCCEx_PeriphCLKConfig+0x1aa>
+ 8001af4: 693b ldr r3, [r7, #16]
+ 8001af6: 2b00 cmp r3, #0
+ 8001af8: d035 beq.n 8001b66 <HAL_RCCEx_PeriphCLKConfig+0x1aa>
+ 8001afa: 687b ldr r3, [r7, #4]
+ 8001afc: 6b1b ldr r3, [r3, #48] ; 0x30
+ 8001afe: f403 7340 and.w r3, r3, #768 ; 0x300
+ 8001b02: 693a ldr r2, [r7, #16]
+ 8001b04: 429a cmp r2, r3
+ 8001b06: d02e beq.n 8001b66 <HAL_RCCEx_PeriphCLKConfig+0x1aa>
{
/* Store the content of BDCR register before the reset of Backup Domain */
tmpreg0 = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
- 80019a0: 4b20 ldr r3, [pc, #128] ; (8001a24 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 80019a2: 6f1b ldr r3, [r3, #112] ; 0x70
- 80019a4: f423 7340 bic.w r3, r3, #768 ; 0x300
- 80019a8: 613b str r3, [r7, #16]
+ 8001b08: 4b20 ldr r3, [pc, #128] ; (8001b8c <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 8001b0a: 6f1b ldr r3, [r3, #112] ; 0x70
+ 8001b0c: f423 7340 bic.w r3, r3, #768 ; 0x300
+ 8001b10: 613b str r3, [r7, #16]
/* RTC Clock selection can be changed only if the Backup Domain is reset */
__HAL_RCC_BACKUPRESET_FORCE();
- 80019aa: 4b1e ldr r3, [pc, #120] ; (8001a24 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 80019ac: 6f1b ldr r3, [r3, #112] ; 0x70
- 80019ae: 4a1d ldr r2, [pc, #116] ; (8001a24 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 80019b0: f443 3380 orr.w r3, r3, #65536 ; 0x10000
- 80019b4: 6713 str r3, [r2, #112] ; 0x70
+ 8001b12: 4b1e ldr r3, [pc, #120] ; (8001b8c <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 8001b14: 6f1b ldr r3, [r3, #112] ; 0x70
+ 8001b16: 4a1d ldr r2, [pc, #116] ; (8001b8c <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 8001b18: f443 3380 orr.w r3, r3, #65536 ; 0x10000
+ 8001b1c: 6713 str r3, [r2, #112] ; 0x70
__HAL_RCC_BACKUPRESET_RELEASE();
- 80019b6: 4b1b ldr r3, [pc, #108] ; (8001a24 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 80019b8: 6f1b ldr r3, [r3, #112] ; 0x70
- 80019ba: 4a1a ldr r2, [pc, #104] ; (8001a24 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 80019bc: f423 3380 bic.w r3, r3, #65536 ; 0x10000
- 80019c0: 6713 str r3, [r2, #112] ; 0x70
+ 8001b1e: 4b1b ldr r3, [pc, #108] ; (8001b8c <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 8001b20: 6f1b ldr r3, [r3, #112] ; 0x70
+ 8001b22: 4a1a ldr r2, [pc, #104] ; (8001b8c <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 8001b24: f423 3380 bic.w r3, r3, #65536 ; 0x10000
+ 8001b28: 6713 str r3, [r2, #112] ; 0x70
/* Restore the Content of BDCR register */
RCC->BDCR = tmpreg0;
- 80019c2: 4a18 ldr r2, [pc, #96] ; (8001a24 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 80019c4: 693b ldr r3, [r7, #16]
- 80019c6: 6713 str r3, [r2, #112] ; 0x70
+ 8001b2a: 4a18 ldr r2, [pc, #96] ; (8001b8c <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 8001b2c: 693b ldr r3, [r7, #16]
+ 8001b2e: 6713 str r3, [r2, #112] ; 0x70
/* Wait for LSE reactivation if LSE was enable prior to Backup Domain reset */
if (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSEON))
- 80019c8: 4b16 ldr r3, [pc, #88] ; (8001a24 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 80019ca: 6f1b ldr r3, [r3, #112] ; 0x70
- 80019cc: f003 0301 and.w r3, r3, #1
- 80019d0: 2b01 cmp r3, #1
- 80019d2: d114 bne.n 80019fe <HAL_RCCEx_PeriphCLKConfig+0x1aa>
+ 8001b30: 4b16 ldr r3, [pc, #88] ; (8001b8c <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 8001b32: 6f1b ldr r3, [r3, #112] ; 0x70
+ 8001b34: f003 0301 and.w r3, r3, #1
+ 8001b38: 2b01 cmp r3, #1
+ 8001b3a: d114 bne.n 8001b66 <HAL_RCCEx_PeriphCLKConfig+0x1aa>
{
/* Get Start Tick*/
tickstart = HAL_GetTick();
- 80019d4: f7ff f840 bl 8000a58 <HAL_GetTick>
- 80019d8: 6178 str r0, [r7, #20]
+ 8001b3c: f7ff f814 bl 8000b68 <HAL_GetTick>
+ 8001b40: 6178 str r0, [r7, #20]
/* Wait till LSE is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
- 80019da: e00a b.n 80019f2 <HAL_RCCEx_PeriphCLKConfig+0x19e>
+ 8001b42: e00a b.n 8001b5a <HAL_RCCEx_PeriphCLKConfig+0x19e>
{
if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
- 80019dc: f7ff f83c bl 8000a58 <HAL_GetTick>
- 80019e0: 4602 mov r2, r0
- 80019e2: 697b ldr r3, [r7, #20]
- 80019e4: 1ad3 subs r3, r2, r3
- 80019e6: f241 3288 movw r2, #5000 ; 0x1388
- 80019ea: 4293 cmp r3, r2
- 80019ec: d901 bls.n 80019f2 <HAL_RCCEx_PeriphCLKConfig+0x19e>
+ 8001b44: f7ff f810 bl 8000b68 <HAL_GetTick>
+ 8001b48: 4602 mov r2, r0
+ 8001b4a: 697b ldr r3, [r7, #20]
+ 8001b4c: 1ad3 subs r3, r2, r3
+ 8001b4e: f241 3288 movw r2, #5000 ; 0x1388
+ 8001b52: 4293 cmp r3, r2
+ 8001b54: d901 bls.n 8001b5a <HAL_RCCEx_PeriphCLKConfig+0x19e>
{
return HAL_TIMEOUT;
- 80019ee: 2303 movs r3, #3
- 80019f0: e34f b.n 8002092 <HAL_RCCEx_PeriphCLKConfig+0x83e>
+ 8001b56: 2303 movs r3, #3
+ 8001b58: e34f b.n 80021fa <HAL_RCCEx_PeriphCLKConfig+0x83e>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
- 80019f2: 4b0c ldr r3, [pc, #48] ; (8001a24 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 80019f4: 6f1b ldr r3, [r3, #112] ; 0x70
- 80019f6: f003 0302 and.w r3, r3, #2
- 80019fa: 2b00 cmp r3, #0
- 80019fc: d0ee beq.n 80019dc <HAL_RCCEx_PeriphCLKConfig+0x188>
+ 8001b5a: 4b0c ldr r3, [pc, #48] ; (8001b8c <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 8001b5c: 6f1b ldr r3, [r3, #112] ; 0x70
+ 8001b5e: f003 0302 and.w r3, r3, #2
+ 8001b62: 2b00 cmp r3, #0
+ 8001b64: d0ee beq.n 8001b44 <HAL_RCCEx_PeriphCLKConfig+0x188>
}
}
}
}
__HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
- 80019fe: 687b ldr r3, [r7, #4]
- 8001a00: 6b1b ldr r3, [r3, #48] ; 0x30
- 8001a02: f403 7340 and.w r3, r3, #768 ; 0x300
- 8001a06: f5b3 7f40 cmp.w r3, #768 ; 0x300
- 8001a0a: d111 bne.n 8001a30 <HAL_RCCEx_PeriphCLKConfig+0x1dc>
- 8001a0c: 4b05 ldr r3, [pc, #20] ; (8001a24 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 8001a0e: 689b ldr r3, [r3, #8]
- 8001a10: f423 12f8 bic.w r2, r3, #2031616 ; 0x1f0000
- 8001a14: 687b ldr r3, [r7, #4]
- 8001a16: 6b19 ldr r1, [r3, #48] ; 0x30
- 8001a18: 4b04 ldr r3, [pc, #16] ; (8001a2c <HAL_RCCEx_PeriphCLKConfig+0x1d8>)
- 8001a1a: 400b ands r3, r1
- 8001a1c: 4901 ldr r1, [pc, #4] ; (8001a24 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 8001a1e: 4313 orrs r3, r2
- 8001a20: 608b str r3, [r1, #8]
- 8001a22: e00b b.n 8001a3c <HAL_RCCEx_PeriphCLKConfig+0x1e8>
- 8001a24: 40023800 .word 0x40023800
- 8001a28: 40007000 .word 0x40007000
- 8001a2c: 0ffffcff .word 0x0ffffcff
- 8001a30: 4bb3 ldr r3, [pc, #716] ; (8001d00 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8001a32: 689b ldr r3, [r3, #8]
- 8001a34: 4ab2 ldr r2, [pc, #712] ; (8001d00 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8001a36: f423 13f8 bic.w r3, r3, #2031616 ; 0x1f0000
- 8001a3a: 6093 str r3, [r2, #8]
- 8001a3c: 4bb0 ldr r3, [pc, #704] ; (8001d00 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8001a3e: 6f1a ldr r2, [r3, #112] ; 0x70
- 8001a40: 687b ldr r3, [r7, #4]
- 8001a42: 6b1b ldr r3, [r3, #48] ; 0x30
- 8001a44: f3c3 030b ubfx r3, r3, #0, #12
- 8001a48: 49ad ldr r1, [pc, #692] ; (8001d00 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8001a4a: 4313 orrs r3, r2
- 8001a4c: 670b str r3, [r1, #112] ; 0x70
+ 8001b66: 687b ldr r3, [r7, #4]
+ 8001b68: 6b1b ldr r3, [r3, #48] ; 0x30
+ 8001b6a: f403 7340 and.w r3, r3, #768 ; 0x300
+ 8001b6e: f5b3 7f40 cmp.w r3, #768 ; 0x300
+ 8001b72: d111 bne.n 8001b98 <HAL_RCCEx_PeriphCLKConfig+0x1dc>
+ 8001b74: 4b05 ldr r3, [pc, #20] ; (8001b8c <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 8001b76: 689b ldr r3, [r3, #8]
+ 8001b78: f423 12f8 bic.w r2, r3, #2031616 ; 0x1f0000
+ 8001b7c: 687b ldr r3, [r7, #4]
+ 8001b7e: 6b19 ldr r1, [r3, #48] ; 0x30
+ 8001b80: 4b04 ldr r3, [pc, #16] ; (8001b94 <HAL_RCCEx_PeriphCLKConfig+0x1d8>)
+ 8001b82: 400b ands r3, r1
+ 8001b84: 4901 ldr r1, [pc, #4] ; (8001b8c <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 8001b86: 4313 orrs r3, r2
+ 8001b88: 608b str r3, [r1, #8]
+ 8001b8a: e00b b.n 8001ba4 <HAL_RCCEx_PeriphCLKConfig+0x1e8>
+ 8001b8c: 40023800 .word 0x40023800
+ 8001b90: 40007000 .word 0x40007000
+ 8001b94: 0ffffcff .word 0x0ffffcff
+ 8001b98: 4bb3 ldr r3, [pc, #716] ; (8001e68 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001b9a: 689b ldr r3, [r3, #8]
+ 8001b9c: 4ab2 ldr r2, [pc, #712] ; (8001e68 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001b9e: f423 13f8 bic.w r3, r3, #2031616 ; 0x1f0000
+ 8001ba2: 6093 str r3, [r2, #8]
+ 8001ba4: 4bb0 ldr r3, [pc, #704] ; (8001e68 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001ba6: 6f1a ldr r2, [r3, #112] ; 0x70
+ 8001ba8: 687b ldr r3, [r7, #4]
+ 8001baa: 6b1b ldr r3, [r3, #48] ; 0x30
+ 8001bac: f3c3 030b ubfx r3, r3, #0, #12
+ 8001bb0: 49ad ldr r1, [pc, #692] ; (8001e68 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001bb2: 4313 orrs r3, r2
+ 8001bb4: 670b str r3, [r1, #112] ; 0x70
}
/*------------------------------------ TIM configuration --------------------------------------*/
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM) == (RCC_PERIPHCLK_TIM))
- 8001a4e: 687b ldr r3, [r7, #4]
- 8001a50: 681b ldr r3, [r3, #0]
- 8001a52: f003 0310 and.w r3, r3, #16
- 8001a56: 2b00 cmp r3, #0
- 8001a58: d010 beq.n 8001a7c <HAL_RCCEx_PeriphCLKConfig+0x228>
+ 8001bb6: 687b ldr r3, [r7, #4]
+ 8001bb8: 681b ldr r3, [r3, #0]
+ 8001bba: f003 0310 and.w r3, r3, #16
+ 8001bbe: 2b00 cmp r3, #0
+ 8001bc0: d010 beq.n 8001be4 <HAL_RCCEx_PeriphCLKConfig+0x228>
{
/* Check the parameters */
assert_param(IS_RCC_TIMPRES(PeriphClkInit->TIMPresSelection));
/* Configure Timer Prescaler */
__HAL_RCC_TIMCLKPRESCALER(PeriphClkInit->TIMPresSelection);
- 8001a5a: 4ba9 ldr r3, [pc, #676] ; (8001d00 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8001a5c: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c
- 8001a60: 4aa7 ldr r2, [pc, #668] ; (8001d00 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8001a62: f023 7380 bic.w r3, r3, #16777216 ; 0x1000000
- 8001a66: f8c2 308c str.w r3, [r2, #140] ; 0x8c
- 8001a6a: 4ba5 ldr r3, [pc, #660] ; (8001d00 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8001a6c: f8d3 208c ldr.w r2, [r3, #140] ; 0x8c
- 8001a70: 687b ldr r3, [r7, #4]
- 8001a72: 6b9b ldr r3, [r3, #56] ; 0x38
- 8001a74: 49a2 ldr r1, [pc, #648] ; (8001d00 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8001a76: 4313 orrs r3, r2
- 8001a78: f8c1 308c str.w r3, [r1, #140] ; 0x8c
+ 8001bc2: 4ba9 ldr r3, [pc, #676] ; (8001e68 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001bc4: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c
+ 8001bc8: 4aa7 ldr r2, [pc, #668] ; (8001e68 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001bca: f023 7380 bic.w r3, r3, #16777216 ; 0x1000000
+ 8001bce: f8c2 308c str.w r3, [r2, #140] ; 0x8c
+ 8001bd2: 4ba5 ldr r3, [pc, #660] ; (8001e68 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001bd4: f8d3 208c ldr.w r2, [r3, #140] ; 0x8c
+ 8001bd8: 687b ldr r3, [r7, #4]
+ 8001bda: 6b9b ldr r3, [r3, #56] ; 0x38
+ 8001bdc: 49a2 ldr r1, [pc, #648] ; (8001e68 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001bde: 4313 orrs r3, r2
+ 8001be0: f8c1 308c str.w r3, [r1, #140] ; 0x8c
}
/*-------------------------------------- I2C1 Configuration -----------------------------------*/
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1)
- 8001a7c: 687b ldr r3, [r7, #4]
- 8001a7e: 681b ldr r3, [r3, #0]
- 8001a80: f403 4380 and.w r3, r3, #16384 ; 0x4000
- 8001a84: 2b00 cmp r3, #0
- 8001a86: d00a beq.n 8001a9e <HAL_RCCEx_PeriphCLKConfig+0x24a>
+ 8001be4: 687b ldr r3, [r7, #4]
+ 8001be6: 681b ldr r3, [r3, #0]
+ 8001be8: f403 4380 and.w r3, r3, #16384 ; 0x4000
+ 8001bec: 2b00 cmp r3, #0
+ 8001bee: d00a beq.n 8001c06 <HAL_RCCEx_PeriphCLKConfig+0x24a>
{
/* Check the parameters */
assert_param(IS_RCC_I2C1CLKSOURCE(PeriphClkInit->I2c1ClockSelection));
/* Configure the I2C1 clock source */
__HAL_RCC_I2C1_CONFIG(PeriphClkInit->I2c1ClockSelection);
- 8001a88: 4b9d ldr r3, [pc, #628] ; (8001d00 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8001a8a: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 8001a8e: f423 3240 bic.w r2, r3, #196608 ; 0x30000
- 8001a92: 687b ldr r3, [r7, #4]
- 8001a94: 6e5b ldr r3, [r3, #100] ; 0x64
- 8001a96: 499a ldr r1, [pc, #616] ; (8001d00 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8001a98: 4313 orrs r3, r2
- 8001a9a: f8c1 3090 str.w r3, [r1, #144] ; 0x90
+ 8001bf0: 4b9d ldr r3, [pc, #628] ; (8001e68 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001bf2: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
+ 8001bf6: f423 3240 bic.w r2, r3, #196608 ; 0x30000
+ 8001bfa: 687b ldr r3, [r7, #4]
+ 8001bfc: 6e5b ldr r3, [r3, #100] ; 0x64
+ 8001bfe: 499a ldr r1, [pc, #616] ; (8001e68 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001c00: 4313 orrs r3, r2
+ 8001c02: f8c1 3090 str.w r3, [r1, #144] ; 0x90
}
/*-------------------------------------- I2C2 Configuration -----------------------------------*/
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C2) == RCC_PERIPHCLK_I2C2)
- 8001a9e: 687b ldr r3, [r7, #4]
- 8001aa0: 681b ldr r3, [r3, #0]
- 8001aa2: f403 4300 and.w r3, r3, #32768 ; 0x8000
- 8001aa6: 2b00 cmp r3, #0
- 8001aa8: d00a beq.n 8001ac0 <HAL_RCCEx_PeriphCLKConfig+0x26c>
+ 8001c06: 687b ldr r3, [r7, #4]
+ 8001c08: 681b ldr r3, [r3, #0]
+ 8001c0a: f403 4300 and.w r3, r3, #32768 ; 0x8000
+ 8001c0e: 2b00 cmp r3, #0
+ 8001c10: d00a beq.n 8001c28 <HAL_RCCEx_PeriphCLKConfig+0x26c>
{
/* Check the parameters */
assert_param(IS_RCC_I2C2CLKSOURCE(PeriphClkInit->I2c2ClockSelection));
/* Configure the I2C2 clock source */
__HAL_RCC_I2C2_CONFIG(PeriphClkInit->I2c2ClockSelection);
- 8001aaa: 4b95 ldr r3, [pc, #596] ; (8001d00 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8001aac: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 8001ab0: f423 2240 bic.w r2, r3, #786432 ; 0xc0000
- 8001ab4: 687b ldr r3, [r7, #4]
- 8001ab6: 6e9b ldr r3, [r3, #104] ; 0x68
- 8001ab8: 4991 ldr r1, [pc, #580] ; (8001d00 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8001aba: 4313 orrs r3, r2
- 8001abc: f8c1 3090 str.w r3, [r1, #144] ; 0x90
+ 8001c12: 4b95 ldr r3, [pc, #596] ; (8001e68 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001c14: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
+ 8001c18: f423 2240 bic.w r2, r3, #786432 ; 0xc0000
+ 8001c1c: 687b ldr r3, [r7, #4]
+ 8001c1e: 6e9b ldr r3, [r3, #104] ; 0x68
+ 8001c20: 4991 ldr r1, [pc, #580] ; (8001e68 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001c22: 4313 orrs r3, r2
+ 8001c24: f8c1 3090 str.w r3, [r1, #144] ; 0x90
}
/*-------------------------------------- I2C3 Configuration -----------------------------------*/
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C3) == RCC_PERIPHCLK_I2C3)
- 8001ac0: 687b ldr r3, [r7, #4]
- 8001ac2: 681b ldr r3, [r3, #0]
- 8001ac4: f403 3380 and.w r3, r3, #65536 ; 0x10000
- 8001ac8: 2b00 cmp r3, #0
- 8001aca: d00a beq.n 8001ae2 <HAL_RCCEx_PeriphCLKConfig+0x28e>
+ 8001c28: 687b ldr r3, [r7, #4]
+ 8001c2a: 681b ldr r3, [r3, #0]
+ 8001c2c: f403 3380 and.w r3, r3, #65536 ; 0x10000
+ 8001c30: 2b00 cmp r3, #0
+ 8001c32: d00a beq.n 8001c4a <HAL_RCCEx_PeriphCLKConfig+0x28e>
{
/* Check the parameters */
assert_param(IS_RCC_I2C3CLKSOURCE(PeriphClkInit->I2c3ClockSelection));
/* Configure the I2C3 clock source */
__HAL_RCC_I2C3_CONFIG(PeriphClkInit->I2c3ClockSelection);
- 8001acc: 4b8c ldr r3, [pc, #560] ; (8001d00 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8001ace: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 8001ad2: f423 1240 bic.w r2, r3, #3145728 ; 0x300000
- 8001ad6: 687b ldr r3, [r7, #4]
- 8001ad8: 6edb ldr r3, [r3, #108] ; 0x6c
- 8001ada: 4989 ldr r1, [pc, #548] ; (8001d00 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8001adc: 4313 orrs r3, r2
- 8001ade: f8c1 3090 str.w r3, [r1, #144] ; 0x90
+ 8001c34: 4b8c ldr r3, [pc, #560] ; (8001e68 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001c36: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
+ 8001c3a: f423 1240 bic.w r2, r3, #3145728 ; 0x300000
+ 8001c3e: 687b ldr r3, [r7, #4]
+ 8001c40: 6edb ldr r3, [r3, #108] ; 0x6c
+ 8001c42: 4989 ldr r1, [pc, #548] ; (8001e68 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001c44: 4313 orrs r3, r2
+ 8001c46: f8c1 3090 str.w r3, [r1, #144] ; 0x90
}
/*-------------------------------------- I2C4 Configuration -----------------------------------*/
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C4) == RCC_PERIPHCLK_I2C4)
- 8001ae2: 687b ldr r3, [r7, #4]
- 8001ae4: 681b ldr r3, [r3, #0]
- 8001ae6: f403 3300 and.w r3, r3, #131072 ; 0x20000
- 8001aea: 2b00 cmp r3, #0
- 8001aec: d00a beq.n 8001b04 <HAL_RCCEx_PeriphCLKConfig+0x2b0>
+ 8001c4a: 687b ldr r3, [r7, #4]
+ 8001c4c: 681b ldr r3, [r3, #0]
+ 8001c4e: f403 3300 and.w r3, r3, #131072 ; 0x20000
+ 8001c52: 2b00 cmp r3, #0
+ 8001c54: d00a beq.n 8001c6c <HAL_RCCEx_PeriphCLKConfig+0x2b0>
{
/* Check the parameters */
assert_param(IS_RCC_I2C4CLKSOURCE(PeriphClkInit->I2c4ClockSelection));
/* Configure the I2C4 clock source */
__HAL_RCC_I2C4_CONFIG(PeriphClkInit->I2c4ClockSelection);
- 8001aee: 4b84 ldr r3, [pc, #528] ; (8001d00 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8001af0: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 8001af4: f423 0240 bic.w r2, r3, #12582912 ; 0xc00000
- 8001af8: 687b ldr r3, [r7, #4]
- 8001afa: 6f1b ldr r3, [r3, #112] ; 0x70
- 8001afc: 4980 ldr r1, [pc, #512] ; (8001d00 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8001afe: 4313 orrs r3, r2
- 8001b00: f8c1 3090 str.w r3, [r1, #144] ; 0x90
+ 8001c56: 4b84 ldr r3, [pc, #528] ; (8001e68 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001c58: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
+ 8001c5c: f423 0240 bic.w r2, r3, #12582912 ; 0xc00000
+ 8001c60: 687b ldr r3, [r7, #4]
+ 8001c62: 6f1b ldr r3, [r3, #112] ; 0x70
+ 8001c64: 4980 ldr r1, [pc, #512] ; (8001e68 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001c66: 4313 orrs r3, r2
+ 8001c68: f8c1 3090 str.w r3, [r1, #144] ; 0x90
}
/*-------------------------------------- USART1 Configuration -----------------------------------*/
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1)
- 8001b04: 687b ldr r3, [r7, #4]
- 8001b06: 681b ldr r3, [r3, #0]
- 8001b08: f003 0340 and.w r3, r3, #64 ; 0x40
- 8001b0c: 2b00 cmp r3, #0
- 8001b0e: d00a beq.n 8001b26 <HAL_RCCEx_PeriphCLKConfig+0x2d2>
+ 8001c6c: 687b ldr r3, [r7, #4]
+ 8001c6e: 681b ldr r3, [r3, #0]
+ 8001c70: f003 0340 and.w r3, r3, #64 ; 0x40
+ 8001c74: 2b00 cmp r3, #0
+ 8001c76: d00a beq.n 8001c8e <HAL_RCCEx_PeriphCLKConfig+0x2d2>
{
/* Check the parameters */
assert_param(IS_RCC_USART1CLKSOURCE(PeriphClkInit->Usart1ClockSelection));
/* Configure the USART1 clock source */
__HAL_RCC_USART1_CONFIG(PeriphClkInit->Usart1ClockSelection);
- 8001b10: 4b7b ldr r3, [pc, #492] ; (8001d00 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8001b12: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 8001b16: f023 0203 bic.w r2, r3, #3
- 8001b1a: 687b ldr r3, [r7, #4]
- 8001b1c: 6c5b ldr r3, [r3, #68] ; 0x44
- 8001b1e: 4978 ldr r1, [pc, #480] ; (8001d00 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8001b20: 4313 orrs r3, r2
- 8001b22: f8c1 3090 str.w r3, [r1, #144] ; 0x90
+ 8001c78: 4b7b ldr r3, [pc, #492] ; (8001e68 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001c7a: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
+ 8001c7e: f023 0203 bic.w r2, r3, #3
+ 8001c82: 687b ldr r3, [r7, #4]
+ 8001c84: 6c5b ldr r3, [r3, #68] ; 0x44
+ 8001c86: 4978 ldr r1, [pc, #480] ; (8001e68 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001c88: 4313 orrs r3, r2
+ 8001c8a: f8c1 3090 str.w r3, [r1, #144] ; 0x90
}
/*-------------------------------------- USART2 Configuration -----------------------------------*/
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2)
- 8001b26: 687b ldr r3, [r7, #4]
- 8001b28: 681b ldr r3, [r3, #0]
- 8001b2a: f003 0380 and.w r3, r3, #128 ; 0x80
- 8001b2e: 2b00 cmp r3, #0
- 8001b30: d00a beq.n 8001b48 <HAL_RCCEx_PeriphCLKConfig+0x2f4>
+ 8001c8e: 687b ldr r3, [r7, #4]
+ 8001c90: 681b ldr r3, [r3, #0]
+ 8001c92: f003 0380 and.w r3, r3, #128 ; 0x80
+ 8001c96: 2b00 cmp r3, #0
+ 8001c98: d00a beq.n 8001cb0 <HAL_RCCEx_PeriphCLKConfig+0x2f4>
{
/* Check the parameters */
assert_param(IS_RCC_USART2CLKSOURCE(PeriphClkInit->Usart2ClockSelection));
/* Configure the USART2 clock source */
__HAL_RCC_USART2_CONFIG(PeriphClkInit->Usart2ClockSelection);
- 8001b32: 4b73 ldr r3, [pc, #460] ; (8001d00 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8001b34: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 8001b38: f023 020c bic.w r2, r3, #12
- 8001b3c: 687b ldr r3, [r7, #4]
- 8001b3e: 6c9b ldr r3, [r3, #72] ; 0x48
- 8001b40: 496f ldr r1, [pc, #444] ; (8001d00 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8001b42: 4313 orrs r3, r2
- 8001b44: f8c1 3090 str.w r3, [r1, #144] ; 0x90
+ 8001c9a: 4b73 ldr r3, [pc, #460] ; (8001e68 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001c9c: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
+ 8001ca0: f023 020c bic.w r2, r3, #12
+ 8001ca4: 687b ldr r3, [r7, #4]
+ 8001ca6: 6c9b ldr r3, [r3, #72] ; 0x48
+ 8001ca8: 496f ldr r1, [pc, #444] ; (8001e68 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001caa: 4313 orrs r3, r2
+ 8001cac: f8c1 3090 str.w r3, [r1, #144] ; 0x90
}
/*-------------------------------------- USART3 Configuration -----------------------------------*/
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART3) == RCC_PERIPHCLK_USART3)
- 8001b48: 687b ldr r3, [r7, #4]
- 8001b4a: 681b ldr r3, [r3, #0]
- 8001b4c: f403 7380 and.w r3, r3, #256 ; 0x100
- 8001b50: 2b00 cmp r3, #0
- 8001b52: d00a beq.n 8001b6a <HAL_RCCEx_PeriphCLKConfig+0x316>
+ 8001cb0: 687b ldr r3, [r7, #4]
+ 8001cb2: 681b ldr r3, [r3, #0]
+ 8001cb4: f403 7380 and.w r3, r3, #256 ; 0x100
+ 8001cb8: 2b00 cmp r3, #0
+ 8001cba: d00a beq.n 8001cd2 <HAL_RCCEx_PeriphCLKConfig+0x316>
{
/* Check the parameters */
assert_param(IS_RCC_USART3CLKSOURCE(PeriphClkInit->Usart3ClockSelection));
/* Configure the USART3 clock source */
__HAL_RCC_USART3_CONFIG(PeriphClkInit->Usart3ClockSelection);
- 8001b54: 4b6a ldr r3, [pc, #424] ; (8001d00 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8001b56: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 8001b5a: f023 0230 bic.w r2, r3, #48 ; 0x30
- 8001b5e: 687b ldr r3, [r7, #4]
- 8001b60: 6cdb ldr r3, [r3, #76] ; 0x4c
- 8001b62: 4967 ldr r1, [pc, #412] ; (8001d00 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8001b64: 4313 orrs r3, r2
- 8001b66: f8c1 3090 str.w r3, [r1, #144] ; 0x90
+ 8001cbc: 4b6a ldr r3, [pc, #424] ; (8001e68 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001cbe: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
+ 8001cc2: f023 0230 bic.w r2, r3, #48 ; 0x30
+ 8001cc6: 687b ldr r3, [r7, #4]
+ 8001cc8: 6cdb ldr r3, [r3, #76] ; 0x4c
+ 8001cca: 4967 ldr r1, [pc, #412] ; (8001e68 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001ccc: 4313 orrs r3, r2
+ 8001cce: f8c1 3090 str.w r3, [r1, #144] ; 0x90
}
/*-------------------------------------- UART4 Configuration -----------------------------------*/
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART4) == RCC_PERIPHCLK_UART4)
- 8001b6a: 687b ldr r3, [r7, #4]
- 8001b6c: 681b ldr r3, [r3, #0]
- 8001b6e: f403 7300 and.w r3, r3, #512 ; 0x200
- 8001b72: 2b00 cmp r3, #0
- 8001b74: d00a beq.n 8001b8c <HAL_RCCEx_PeriphCLKConfig+0x338>
+ 8001cd2: 687b ldr r3, [r7, #4]
+ 8001cd4: 681b ldr r3, [r3, #0]
+ 8001cd6: f403 7300 and.w r3, r3, #512 ; 0x200
+ 8001cda: 2b00 cmp r3, #0
+ 8001cdc: d00a beq.n 8001cf4 <HAL_RCCEx_PeriphCLKConfig+0x338>
{
/* Check the parameters */
assert_param(IS_RCC_UART4CLKSOURCE(PeriphClkInit->Uart4ClockSelection));
/* Configure the UART4 clock source */
__HAL_RCC_UART4_CONFIG(PeriphClkInit->Uart4ClockSelection);
- 8001b76: 4b62 ldr r3, [pc, #392] ; (8001d00 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8001b78: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 8001b7c: f023 02c0 bic.w r2, r3, #192 ; 0xc0
- 8001b80: 687b ldr r3, [r7, #4]
- 8001b82: 6d1b ldr r3, [r3, #80] ; 0x50
- 8001b84: 495e ldr r1, [pc, #376] ; (8001d00 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8001b86: 4313 orrs r3, r2
- 8001b88: f8c1 3090 str.w r3, [r1, #144] ; 0x90
+ 8001cde: 4b62 ldr r3, [pc, #392] ; (8001e68 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001ce0: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
+ 8001ce4: f023 02c0 bic.w r2, r3, #192 ; 0xc0
+ 8001ce8: 687b ldr r3, [r7, #4]
+ 8001cea: 6d1b ldr r3, [r3, #80] ; 0x50
+ 8001cec: 495e ldr r1, [pc, #376] ; (8001e68 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001cee: 4313 orrs r3, r2
+ 8001cf0: f8c1 3090 str.w r3, [r1, #144] ; 0x90
}
/*-------------------------------------- UART5 Configuration -----------------------------------*/
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART5) == RCC_PERIPHCLK_UART5)
- 8001b8c: 687b ldr r3, [r7, #4]
- 8001b8e: 681b ldr r3, [r3, #0]
- 8001b90: f403 6380 and.w r3, r3, #1024 ; 0x400
- 8001b94: 2b00 cmp r3, #0
- 8001b96: d00a beq.n 8001bae <HAL_RCCEx_PeriphCLKConfig+0x35a>
+ 8001cf4: 687b ldr r3, [r7, #4]
+ 8001cf6: 681b ldr r3, [r3, #0]
+ 8001cf8: f403 6380 and.w r3, r3, #1024 ; 0x400
+ 8001cfc: 2b00 cmp r3, #0
+ 8001cfe: d00a beq.n 8001d16 <HAL_RCCEx_PeriphCLKConfig+0x35a>
{
/* Check the parameters */
assert_param(IS_RCC_UART5CLKSOURCE(PeriphClkInit->Uart5ClockSelection));
/* Configure the UART5 clock source */
__HAL_RCC_UART5_CONFIG(PeriphClkInit->Uart5ClockSelection);
- 8001b98: 4b59 ldr r3, [pc, #356] ; (8001d00 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8001b9a: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 8001b9e: f423 7240 bic.w r2, r3, #768 ; 0x300
- 8001ba2: 687b ldr r3, [r7, #4]
- 8001ba4: 6d5b ldr r3, [r3, #84] ; 0x54
- 8001ba6: 4956 ldr r1, [pc, #344] ; (8001d00 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8001ba8: 4313 orrs r3, r2
- 8001baa: f8c1 3090 str.w r3, [r1, #144] ; 0x90
+ 8001d00: 4b59 ldr r3, [pc, #356] ; (8001e68 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001d02: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
+ 8001d06: f423 7240 bic.w r2, r3, #768 ; 0x300
+ 8001d0a: 687b ldr r3, [r7, #4]
+ 8001d0c: 6d5b ldr r3, [r3, #84] ; 0x54
+ 8001d0e: 4956 ldr r1, [pc, #344] ; (8001e68 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001d10: 4313 orrs r3, r2
+ 8001d12: f8c1 3090 str.w r3, [r1, #144] ; 0x90
}
/*-------------------------------------- USART6 Configuration -----------------------------------*/
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART6) == RCC_PERIPHCLK_USART6)
- 8001bae: 687b ldr r3, [r7, #4]
- 8001bb0: 681b ldr r3, [r3, #0]
- 8001bb2: f403 6300 and.w r3, r3, #2048 ; 0x800
- 8001bb6: 2b00 cmp r3, #0
- 8001bb8: d00a beq.n 8001bd0 <HAL_RCCEx_PeriphCLKConfig+0x37c>
+ 8001d16: 687b ldr r3, [r7, #4]
+ 8001d18: 681b ldr r3, [r3, #0]
+ 8001d1a: f403 6300 and.w r3, r3, #2048 ; 0x800
+ 8001d1e: 2b00 cmp r3, #0
+ 8001d20: d00a beq.n 8001d38 <HAL_RCCEx_PeriphCLKConfig+0x37c>
{
/* Check the parameters */
assert_param(IS_RCC_USART6CLKSOURCE(PeriphClkInit->Usart6ClockSelection));
/* Configure the USART6 clock source */
__HAL_RCC_USART6_CONFIG(PeriphClkInit->Usart6ClockSelection);
- 8001bba: 4b51 ldr r3, [pc, #324] ; (8001d00 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8001bbc: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 8001bc0: f423 6240 bic.w r2, r3, #3072 ; 0xc00
- 8001bc4: 687b ldr r3, [r7, #4]
- 8001bc6: 6d9b ldr r3, [r3, #88] ; 0x58
- 8001bc8: 494d ldr r1, [pc, #308] ; (8001d00 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8001bca: 4313 orrs r3, r2
- 8001bcc: f8c1 3090 str.w r3, [r1, #144] ; 0x90
+ 8001d22: 4b51 ldr r3, [pc, #324] ; (8001e68 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001d24: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
+ 8001d28: f423 6240 bic.w r2, r3, #3072 ; 0xc00
+ 8001d2c: 687b ldr r3, [r7, #4]
+ 8001d2e: 6d9b ldr r3, [r3, #88] ; 0x58
+ 8001d30: 494d ldr r1, [pc, #308] ; (8001e68 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001d32: 4313 orrs r3, r2
+ 8001d34: f8c1 3090 str.w r3, [r1, #144] ; 0x90
}
/*-------------------------------------- UART7 Configuration -----------------------------------*/
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART7) == RCC_PERIPHCLK_UART7)
- 8001bd0: 687b ldr r3, [r7, #4]
- 8001bd2: 681b ldr r3, [r3, #0]
- 8001bd4: f403 5380 and.w r3, r3, #4096 ; 0x1000
- 8001bd8: 2b00 cmp r3, #0
- 8001bda: d00a beq.n 8001bf2 <HAL_RCCEx_PeriphCLKConfig+0x39e>
+ 8001d38: 687b ldr r3, [r7, #4]
+ 8001d3a: 681b ldr r3, [r3, #0]
+ 8001d3c: f403 5380 and.w r3, r3, #4096 ; 0x1000
+ 8001d40: 2b00 cmp r3, #0
+ 8001d42: d00a beq.n 8001d5a <HAL_RCCEx_PeriphCLKConfig+0x39e>
{
/* Check the parameters */
assert_param(IS_RCC_UART7CLKSOURCE(PeriphClkInit->Uart7ClockSelection));
/* Configure the UART7 clock source */
__HAL_RCC_UART7_CONFIG(PeriphClkInit->Uart7ClockSelection);
- 8001bdc: 4b48 ldr r3, [pc, #288] ; (8001d00 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8001bde: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 8001be2: f423 5240 bic.w r2, r3, #12288 ; 0x3000
- 8001be6: 687b ldr r3, [r7, #4]
- 8001be8: 6ddb ldr r3, [r3, #92] ; 0x5c
- 8001bea: 4945 ldr r1, [pc, #276] ; (8001d00 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8001bec: 4313 orrs r3, r2
- 8001bee: f8c1 3090 str.w r3, [r1, #144] ; 0x90
+ 8001d44: 4b48 ldr r3, [pc, #288] ; (8001e68 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001d46: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
+ 8001d4a: f423 5240 bic.w r2, r3, #12288 ; 0x3000
+ 8001d4e: 687b ldr r3, [r7, #4]
+ 8001d50: 6ddb ldr r3, [r3, #92] ; 0x5c
+ 8001d52: 4945 ldr r1, [pc, #276] ; (8001e68 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001d54: 4313 orrs r3, r2
+ 8001d56: f8c1 3090 str.w r3, [r1, #144] ; 0x90
}
/*-------------------------------------- UART8 Configuration -----------------------------------*/
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART8) == RCC_PERIPHCLK_UART8)
- 8001bf2: 687b ldr r3, [r7, #4]
- 8001bf4: 681b ldr r3, [r3, #0]
- 8001bf6: f403 5300 and.w r3, r3, #8192 ; 0x2000
- 8001bfa: 2b00 cmp r3, #0
- 8001bfc: d00a beq.n 8001c14 <HAL_RCCEx_PeriphCLKConfig+0x3c0>
+ 8001d5a: 687b ldr r3, [r7, #4]
+ 8001d5c: 681b ldr r3, [r3, #0]
+ 8001d5e: f403 5300 and.w r3, r3, #8192 ; 0x2000
+ 8001d62: 2b00 cmp r3, #0
+ 8001d64: d00a beq.n 8001d7c <HAL_RCCEx_PeriphCLKConfig+0x3c0>
{
/* Check the parameters */
assert_param(IS_RCC_UART8CLKSOURCE(PeriphClkInit->Uart8ClockSelection));
/* Configure the UART8 clock source */
__HAL_RCC_UART8_CONFIG(PeriphClkInit->Uart8ClockSelection);
- 8001bfe: 4b40 ldr r3, [pc, #256] ; (8001d00 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8001c00: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 8001c04: f423 4240 bic.w r2, r3, #49152 ; 0xc000
- 8001c08: 687b ldr r3, [r7, #4]
- 8001c0a: 6e1b ldr r3, [r3, #96] ; 0x60
- 8001c0c: 493c ldr r1, [pc, #240] ; (8001d00 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8001c0e: 4313 orrs r3, r2
- 8001c10: f8c1 3090 str.w r3, [r1, #144] ; 0x90
+ 8001d66: 4b40 ldr r3, [pc, #256] ; (8001e68 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001d68: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
+ 8001d6c: f423 4240 bic.w r2, r3, #49152 ; 0xc000
+ 8001d70: 687b ldr r3, [r7, #4]
+ 8001d72: 6e1b ldr r3, [r3, #96] ; 0x60
+ 8001d74: 493c ldr r1, [pc, #240] ; (8001e68 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001d76: 4313 orrs r3, r2
+ 8001d78: f8c1 3090 str.w r3, [r1, #144] ; 0x90
}
/*--------------------------------------- CEC Configuration -----------------------------------*/
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CEC) == RCC_PERIPHCLK_CEC)
- 8001c14: 687b ldr r3, [r7, #4]
- 8001c16: 681b ldr r3, [r3, #0]
- 8001c18: f403 0380 and.w r3, r3, #4194304 ; 0x400000
- 8001c1c: 2b00 cmp r3, #0
- 8001c1e: d00a beq.n 8001c36 <HAL_RCCEx_PeriphCLKConfig+0x3e2>
+ 8001d7c: 687b ldr r3, [r7, #4]
+ 8001d7e: 681b ldr r3, [r3, #0]
+ 8001d80: f403 0380 and.w r3, r3, #4194304 ; 0x400000
+ 8001d84: 2b00 cmp r3, #0
+ 8001d86: d00a beq.n 8001d9e <HAL_RCCEx_PeriphCLKConfig+0x3e2>
{
/* Check the parameters */
assert_param(IS_RCC_CECCLKSOURCE(PeriphClkInit->CecClockSelection));
/* Configure the CEC clock source */
__HAL_RCC_CEC_CONFIG(PeriphClkInit->CecClockSelection);
- 8001c20: 4b37 ldr r3, [pc, #220] ; (8001d00 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8001c22: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 8001c26: f023 6280 bic.w r2, r3, #67108864 ; 0x4000000
- 8001c2a: 687b ldr r3, [r7, #4]
- 8001c2c: 6f9b ldr r3, [r3, #120] ; 0x78
- 8001c2e: 4934 ldr r1, [pc, #208] ; (8001d00 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8001c30: 4313 orrs r3, r2
- 8001c32: f8c1 3090 str.w r3, [r1, #144] ; 0x90
+ 8001d88: 4b37 ldr r3, [pc, #220] ; (8001e68 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001d8a: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
+ 8001d8e: f023 6280 bic.w r2, r3, #67108864 ; 0x4000000
+ 8001d92: 687b ldr r3, [r7, #4]
+ 8001d94: 6f9b ldr r3, [r3, #120] ; 0x78
+ 8001d96: 4934 ldr r1, [pc, #208] ; (8001e68 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001d98: 4313 orrs r3, r2
+ 8001d9a: f8c1 3090 str.w r3, [r1, #144] ; 0x90
}
/*-------------------------------------- CK48 Configuration -----------------------------------*/
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CLK48) == RCC_PERIPHCLK_CLK48)
- 8001c36: 687b ldr r3, [r7, #4]
- 8001c38: 681b ldr r3, [r3, #0]
- 8001c3a: f403 1300 and.w r3, r3, #2097152 ; 0x200000
- 8001c3e: 2b00 cmp r3, #0
- 8001c40: d011 beq.n 8001c66 <HAL_RCCEx_PeriphCLKConfig+0x412>
+ 8001d9e: 687b ldr r3, [r7, #4]
+ 8001da0: 681b ldr r3, [r3, #0]
+ 8001da2: f403 1300 and.w r3, r3, #2097152 ; 0x200000
+ 8001da6: 2b00 cmp r3, #0
+ 8001da8: d011 beq.n 8001dce <HAL_RCCEx_PeriphCLKConfig+0x412>
{
/* Check the parameters */
assert_param(IS_RCC_CLK48SOURCE(PeriphClkInit->Clk48ClockSelection));
/* Configure the CLK48 source */
__HAL_RCC_CLK48_CONFIG(PeriphClkInit->Clk48ClockSelection);
- 8001c42: 4b2f ldr r3, [pc, #188] ; (8001d00 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8001c44: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 8001c48: f023 6200 bic.w r2, r3, #134217728 ; 0x8000000
- 8001c4c: 687b ldr r3, [r7, #4]
- 8001c4e: 6fdb ldr r3, [r3, #124] ; 0x7c
- 8001c50: 492b ldr r1, [pc, #172] ; (8001d00 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8001c52: 4313 orrs r3, r2
- 8001c54: f8c1 3090 str.w r3, [r1, #144] ; 0x90
+ 8001daa: 4b2f ldr r3, [pc, #188] ; (8001e68 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001dac: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
+ 8001db0: f023 6200 bic.w r2, r3, #134217728 ; 0x8000000
+ 8001db4: 687b ldr r3, [r7, #4]
+ 8001db6: 6fdb ldr r3, [r3, #124] ; 0x7c
+ 8001db8: 492b ldr r1, [pc, #172] ; (8001e68 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001dba: 4313 orrs r3, r2
+ 8001dbc: f8c1 3090 str.w r3, [r1, #144] ; 0x90
/* Enable the PLLSAI when it's used as clock source for CK48 */
if(PeriphClkInit->Clk48ClockSelection == RCC_CLK48SOURCE_PLLSAIP)
- 8001c58: 687b ldr r3, [r7, #4]
- 8001c5a: 6fdb ldr r3, [r3, #124] ; 0x7c
- 8001c5c: f1b3 6f00 cmp.w r3, #134217728 ; 0x8000000
- 8001c60: d101 bne.n 8001c66 <HAL_RCCEx_PeriphCLKConfig+0x412>
+ 8001dc0: 687b ldr r3, [r7, #4]
+ 8001dc2: 6fdb ldr r3, [r3, #124] ; 0x7c
+ 8001dc4: f1b3 6f00 cmp.w r3, #134217728 ; 0x8000000
+ 8001dc8: d101 bne.n 8001dce <HAL_RCCEx_PeriphCLKConfig+0x412>
{
pllsaiused = 1;
- 8001c62: 2301 movs r3, #1
- 8001c64: 61bb str r3, [r7, #24]
+ 8001dca: 2301 movs r3, #1
+ 8001dcc: 61bb str r3, [r7, #24]
}
}
/*-------------------------------------- LTDC Configuration -----------------------------------*/
#if defined(STM32F746xx) || defined(STM32F756xx) || defined (STM32F767xx) || defined (STM32F769xx) || defined (STM32F777xx) || defined (STM32F779xx) || defined (STM32F750xx)
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LTDC) == RCC_PERIPHCLK_LTDC)
- 8001c66: 687b ldr r3, [r7, #4]
- 8001c68: 681b ldr r3, [r3, #0]
- 8001c6a: f003 0308 and.w r3, r3, #8
- 8001c6e: 2b00 cmp r3, #0
- 8001c70: d001 beq.n 8001c76 <HAL_RCCEx_PeriphCLKConfig+0x422>
+ 8001dce: 687b ldr r3, [r7, #4]
+ 8001dd0: 681b ldr r3, [r3, #0]
+ 8001dd2: f003 0308 and.w r3, r3, #8
+ 8001dd6: 2b00 cmp r3, #0
+ 8001dd8: d001 beq.n 8001dde <HAL_RCCEx_PeriphCLKConfig+0x422>
{
pllsaiused = 1;
- 8001c72: 2301 movs r3, #1
- 8001c74: 61bb str r3, [r7, #24]
+ 8001dda: 2301 movs r3, #1
+ 8001ddc: 61bb str r3, [r7, #24]
}
#endif /* STM32F746xx || STM32F756xx || STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx || STM32F750xx */
/*-------------------------------------- LPTIM1 Configuration -----------------------------------*/
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM1) == RCC_PERIPHCLK_LPTIM1)
- 8001c76: 687b ldr r3, [r7, #4]
- 8001c78: 681b ldr r3, [r3, #0]
- 8001c7a: f403 2380 and.w r3, r3, #262144 ; 0x40000
- 8001c7e: 2b00 cmp r3, #0
- 8001c80: d00a beq.n 8001c98 <HAL_RCCEx_PeriphCLKConfig+0x444>
+ 8001dde: 687b ldr r3, [r7, #4]
+ 8001de0: 681b ldr r3, [r3, #0]
+ 8001de2: f403 2380 and.w r3, r3, #262144 ; 0x40000
+ 8001de6: 2b00 cmp r3, #0
+ 8001de8: d00a beq.n 8001e00 <HAL_RCCEx_PeriphCLKConfig+0x444>
{
/* Check the parameters */
assert_param(IS_RCC_LPTIM1CLK(PeriphClkInit->Lptim1ClockSelection));
/* Configure the LTPIM1 clock source */
__HAL_RCC_LPTIM1_CONFIG(PeriphClkInit->Lptim1ClockSelection);
- 8001c82: 4b1f ldr r3, [pc, #124] ; (8001d00 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8001c84: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 8001c88: f023 7240 bic.w r2, r3, #50331648 ; 0x3000000
- 8001c8c: 687b ldr r3, [r7, #4]
- 8001c8e: 6f5b ldr r3, [r3, #116] ; 0x74
- 8001c90: 491b ldr r1, [pc, #108] ; (8001d00 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8001c92: 4313 orrs r3, r2
- 8001c94: f8c1 3090 str.w r3, [r1, #144] ; 0x90
+ 8001dea: 4b1f ldr r3, [pc, #124] ; (8001e68 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001dec: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
+ 8001df0: f023 7240 bic.w r2, r3, #50331648 ; 0x3000000
+ 8001df4: 687b ldr r3, [r7, #4]
+ 8001df6: 6f5b ldr r3, [r3, #116] ; 0x74
+ 8001df8: 491b ldr r1, [pc, #108] ; (8001e68 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001dfa: 4313 orrs r3, r2
+ 8001dfc: f8c1 3090 str.w r3, [r1, #144] ; 0x90
}
/*------------------------------------- SDMMC1 Configuration ------------------------------------*/
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SDMMC1) == RCC_PERIPHCLK_SDMMC1)
- 8001c98: 687b ldr r3, [r7, #4]
- 8001c9a: 681b ldr r3, [r3, #0]
- 8001c9c: f403 0300 and.w r3, r3, #8388608 ; 0x800000
- 8001ca0: 2b00 cmp r3, #0
- 8001ca2: d00b beq.n 8001cbc <HAL_RCCEx_PeriphCLKConfig+0x468>
+ 8001e00: 687b ldr r3, [r7, #4]
+ 8001e02: 681b ldr r3, [r3, #0]
+ 8001e04: f403 0300 and.w r3, r3, #8388608 ; 0x800000
+ 8001e08: 2b00 cmp r3, #0
+ 8001e0a: d00b beq.n 8001e24 <HAL_RCCEx_PeriphCLKConfig+0x468>
{
/* Check the parameters */
assert_param(IS_RCC_SDMMC1CLKSOURCE(PeriphClkInit->Sdmmc1ClockSelection));
/* Configure the SDMMC1 clock source */
__HAL_RCC_SDMMC1_CONFIG(PeriphClkInit->Sdmmc1ClockSelection);
- 8001ca4: 4b16 ldr r3, [pc, #88] ; (8001d00 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8001ca6: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 8001caa: f023 5280 bic.w r2, r3, #268435456 ; 0x10000000
- 8001cae: 687b ldr r3, [r7, #4]
- 8001cb0: f8d3 3080 ldr.w r3, [r3, #128] ; 0x80
- 8001cb4: 4912 ldr r1, [pc, #72] ; (8001d00 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8001cb6: 4313 orrs r3, r2
- 8001cb8: f8c1 3090 str.w r3, [r1, #144] ; 0x90
+ 8001e0c: 4b16 ldr r3, [pc, #88] ; (8001e68 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001e0e: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
+ 8001e12: f023 5280 bic.w r2, r3, #268435456 ; 0x10000000
+ 8001e16: 687b ldr r3, [r7, #4]
+ 8001e18: f8d3 3080 ldr.w r3, [r3, #128] ; 0x80
+ 8001e1c: 4912 ldr r1, [pc, #72] ; (8001e68 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001e1e: 4313 orrs r3, r2
+ 8001e20: f8c1 3090 str.w r3, [r1, #144] ; 0x90
}
#if defined (STM32F765xx) || defined (STM32F767xx) || defined (STM32F769xx) || defined (STM32F777xx) || defined (STM32F779xx)
/*------------------------------------- SDMMC2 Configuration ------------------------------------*/
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SDMMC2) == RCC_PERIPHCLK_SDMMC2)
- 8001cbc: 687b ldr r3, [r7, #4]
- 8001cbe: 681b ldr r3, [r3, #0]
- 8001cc0: f003 6380 and.w r3, r3, #67108864 ; 0x4000000
- 8001cc4: 2b00 cmp r3, #0
- 8001cc6: d00b beq.n 8001ce0 <HAL_RCCEx_PeriphCLKConfig+0x48c>
+ 8001e24: 687b ldr r3, [r7, #4]
+ 8001e26: 681b ldr r3, [r3, #0]
+ 8001e28: f003 6380 and.w r3, r3, #67108864 ; 0x4000000
+ 8001e2c: 2b00 cmp r3, #0
+ 8001e2e: d00b beq.n 8001e48 <HAL_RCCEx_PeriphCLKConfig+0x48c>
{
/* Check the parameters */
assert_param(IS_RCC_SDMMC2CLKSOURCE(PeriphClkInit->Sdmmc2ClockSelection));
/* Configure the SDMMC2 clock source */
__HAL_RCC_SDMMC2_CONFIG(PeriphClkInit->Sdmmc2ClockSelection);
- 8001cc8: 4b0d ldr r3, [pc, #52] ; (8001d00 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8001cca: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 8001cce: f023 5200 bic.w r2, r3, #536870912 ; 0x20000000
- 8001cd2: 687b ldr r3, [r7, #4]
- 8001cd4: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84
- 8001cd8: 4909 ldr r1, [pc, #36] ; (8001d00 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8001cda: 4313 orrs r3, r2
- 8001cdc: f8c1 3090 str.w r3, [r1, #144] ; 0x90
+ 8001e30: 4b0d ldr r3, [pc, #52] ; (8001e68 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001e32: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
+ 8001e36: f023 5200 bic.w r2, r3, #536870912 ; 0x20000000
+ 8001e3a: 687b ldr r3, [r7, #4]
+ 8001e3c: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84
+ 8001e40: 4909 ldr r1, [pc, #36] ; (8001e68 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001e42: 4313 orrs r3, r2
+ 8001e44: f8c1 3090 str.w r3, [r1, #144] ; 0x90
}
/*------------------------------------- DFSDM1 Configuration -------------------------------------*/
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_DFSDM1) == RCC_PERIPHCLK_DFSDM1)
- 8001ce0: 687b ldr r3, [r7, #4]
- 8001ce2: 681b ldr r3, [r3, #0]
- 8001ce4: f003 6300 and.w r3, r3, #134217728 ; 0x8000000
- 8001ce8: 2b00 cmp r3, #0
- 8001cea: d00f beq.n 8001d0c <HAL_RCCEx_PeriphCLKConfig+0x4b8>
+ 8001e48: 687b ldr r3, [r7, #4]
+ 8001e4a: 681b ldr r3, [r3, #0]
+ 8001e4c: f003 6300 and.w r3, r3, #134217728 ; 0x8000000
+ 8001e50: 2b00 cmp r3, #0
+ 8001e52: d00f beq.n 8001e74 <HAL_RCCEx_PeriphCLKConfig+0x4b8>
{
/* Check the parameters */
assert_param(IS_RCC_DFSDM1CLKSOURCE(PeriphClkInit->Dfsdm1ClockSelection));
/* Configure the DFSDM1 interface clock source */
__HAL_RCC_DFSDM1_CONFIG(PeriphClkInit->Dfsdm1ClockSelection);
- 8001cec: 4b04 ldr r3, [pc, #16] ; (8001d00 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
- 8001cee: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c
- 8001cf2: f023 7200 bic.w r2, r3, #33554432 ; 0x2000000
- 8001cf6: 687b ldr r3, [r7, #4]
- 8001cf8: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88
- 8001cfc: e002 b.n 8001d04 <HAL_RCCEx_PeriphCLKConfig+0x4b0>
- 8001cfe: bf00 nop
- 8001d00: 40023800 .word 0x40023800
- 8001d04: 4985 ldr r1, [pc, #532] ; (8001f1c <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8001d06: 4313 orrs r3, r2
- 8001d08: f8c1 308c str.w r3, [r1, #140] ; 0x8c
+ 8001e54: 4b04 ldr r3, [pc, #16] ; (8001e68 <HAL_RCCEx_PeriphCLKConfig+0x4ac>)
+ 8001e56: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c
+ 8001e5a: f023 7200 bic.w r2, r3, #33554432 ; 0x2000000
+ 8001e5e: 687b ldr r3, [r7, #4]
+ 8001e60: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88
+ 8001e64: e002 b.n 8001e6c <HAL_RCCEx_PeriphCLKConfig+0x4b0>
+ 8001e66: bf00 nop
+ 8001e68: 40023800 .word 0x40023800
+ 8001e6c: 4985 ldr r1, [pc, #532] ; (8002084 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
+ 8001e6e: 4313 orrs r3, r2
+ 8001e70: f8c1 308c str.w r3, [r1, #140] ; 0x8c
}
/*------------------------------------- DFSDM AUDIO Configuration -------------------------------------*/
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_DFSDM1_AUDIO) == RCC_PERIPHCLK_DFSDM1_AUDIO)
- 8001d0c: 687b ldr r3, [r7, #4]
- 8001d0e: 681b ldr r3, [r3, #0]
- 8001d10: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
- 8001d14: 2b00 cmp r3, #0
- 8001d16: d00b beq.n 8001d30 <HAL_RCCEx_PeriphCLKConfig+0x4dc>
+ 8001e74: 687b ldr r3, [r7, #4]
+ 8001e76: 681b ldr r3, [r3, #0]
+ 8001e78: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
+ 8001e7c: 2b00 cmp r3, #0
+ 8001e7e: d00b beq.n 8001e98 <HAL_RCCEx_PeriphCLKConfig+0x4dc>
{
/* Check the parameters */
assert_param(IS_RCC_DFSDM1AUDIOCLKSOURCE(PeriphClkInit->Dfsdm1AudioClockSelection));
/* Configure the DFSDM interface clock source */
__HAL_RCC_DFSDM1AUDIO_CONFIG(PeriphClkInit->Dfsdm1AudioClockSelection);
- 8001d18: 4b80 ldr r3, [pc, #512] ; (8001f1c <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8001d1a: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c
- 8001d1e: f023 6280 bic.w r2, r3, #67108864 ; 0x4000000
- 8001d22: 687b ldr r3, [r7, #4]
- 8001d24: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c
- 8001d28: 497c ldr r1, [pc, #496] ; (8001f1c <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8001d2a: 4313 orrs r3, r2
- 8001d2c: f8c1 308c str.w r3, [r1, #140] ; 0x8c
+ 8001e80: 4b80 ldr r3, [pc, #512] ; (8002084 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
+ 8001e82: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c
+ 8001e86: f023 6280 bic.w r2, r3, #67108864 ; 0x4000000
+ 8001e8a: 687b ldr r3, [r7, #4]
+ 8001e8c: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c
+ 8001e90: 497c ldr r1, [pc, #496] ; (8002084 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
+ 8001e92: 4313 orrs r3, r2
+ 8001e94: f8c1 308c str.w r3, [r1, #140] ; 0x8c
}
#endif /* STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */
/*-------------------------------------- PLLI2S Configuration ---------------------------------*/
/* PLLI2S is configured when a peripheral will use it as source clock : SAI1, SAI2, I2S or SPDIF-RX */
if((plli2sused == 1) || (PeriphClkInit->PeriphClockSelection == RCC_PERIPHCLK_PLLI2S))
- 8001d30: 69fb ldr r3, [r7, #28]
- 8001d32: 2b01 cmp r3, #1
- 8001d34: d005 beq.n 8001d42 <HAL_RCCEx_PeriphCLKConfig+0x4ee>
- 8001d36: 687b ldr r3, [r7, #4]
- 8001d38: 681b ldr r3, [r3, #0]
- 8001d3a: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000
- 8001d3e: f040 80d6 bne.w 8001eee <HAL_RCCEx_PeriphCLKConfig+0x69a>
+ 8001e98: 69fb ldr r3, [r7, #28]
+ 8001e9a: 2b01 cmp r3, #1
+ 8001e9c: d005 beq.n 8001eaa <HAL_RCCEx_PeriphCLKConfig+0x4ee>
+ 8001e9e: 687b ldr r3, [r7, #4]
+ 8001ea0: 681b ldr r3, [r3, #0]
+ 8001ea2: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000
+ 8001ea6: f040 80d6 bne.w 8002056 <HAL_RCCEx_PeriphCLKConfig+0x69a>
{
/* Disable the PLLI2S */
__HAL_RCC_PLLI2S_DISABLE();
- 8001d42: 4b76 ldr r3, [pc, #472] ; (8001f1c <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8001d44: 681b ldr r3, [r3, #0]
- 8001d46: 4a75 ldr r2, [pc, #468] ; (8001f1c <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8001d48: f023 6380 bic.w r3, r3, #67108864 ; 0x4000000
- 8001d4c: 6013 str r3, [r2, #0]
+ 8001eaa: 4b76 ldr r3, [pc, #472] ; (8002084 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
+ 8001eac: 681b ldr r3, [r3, #0]
+ 8001eae: 4a75 ldr r2, [pc, #468] ; (8002084 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
+ 8001eb0: f023 6380 bic.w r3, r3, #67108864 ; 0x4000000
+ 8001eb4: 6013 str r3, [r2, #0]
/* Get Start Tick*/
tickstart = HAL_GetTick();
- 8001d4e: f7fe fe83 bl 8000a58 <HAL_GetTick>
- 8001d52: 6178 str r0, [r7, #20]
+ 8001eb6: f7fe fe57 bl 8000b68 <HAL_GetTick>
+ 8001eba: 6178 str r0, [r7, #20]
/* Wait till PLLI2S is disabled */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) != RESET)
- 8001d54: e008 b.n 8001d68 <HAL_RCCEx_PeriphCLKConfig+0x514>
+ 8001ebc: e008 b.n 8001ed0 <HAL_RCCEx_PeriphCLKConfig+0x514>
{
if((HAL_GetTick() - tickstart) > PLLI2S_TIMEOUT_VALUE)
- 8001d56: f7fe fe7f bl 8000a58 <HAL_GetTick>
- 8001d5a: 4602 mov r2, r0
- 8001d5c: 697b ldr r3, [r7, #20]
- 8001d5e: 1ad3 subs r3, r2, r3
- 8001d60: 2b64 cmp r3, #100 ; 0x64
- 8001d62: d901 bls.n 8001d68 <HAL_RCCEx_PeriphCLKConfig+0x514>
+ 8001ebe: f7fe fe53 bl 8000b68 <HAL_GetTick>
+ 8001ec2: 4602 mov r2, r0
+ 8001ec4: 697b ldr r3, [r7, #20]
+ 8001ec6: 1ad3 subs r3, r2, r3
+ 8001ec8: 2b64 cmp r3, #100 ; 0x64
+ 8001eca: d901 bls.n 8001ed0 <HAL_RCCEx_PeriphCLKConfig+0x514>
{
/* return in case of Timeout detected */
return HAL_TIMEOUT;
- 8001d64: 2303 movs r3, #3
- 8001d66: e194 b.n 8002092 <HAL_RCCEx_PeriphCLKConfig+0x83e>
+ 8001ecc: 2303 movs r3, #3
+ 8001ece: e194 b.n 80021fa <HAL_RCCEx_PeriphCLKConfig+0x83e>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) != RESET)
- 8001d68: 4b6c ldr r3, [pc, #432] ; (8001f1c <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8001d6a: 681b ldr r3, [r3, #0]
- 8001d6c: f003 6300 and.w r3, r3, #134217728 ; 0x8000000
- 8001d70: 2b00 cmp r3, #0
- 8001d72: d1f0 bne.n 8001d56 <HAL_RCCEx_PeriphCLKConfig+0x502>
+ 8001ed0: 4b6c ldr r3, [pc, #432] ; (8002084 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
+ 8001ed2: 681b ldr r3, [r3, #0]
+ 8001ed4: f003 6300 and.w r3, r3, #134217728 ; 0x8000000
+ 8001ed8: 2b00 cmp r3, #0
+ 8001eda: d1f0 bne.n 8001ebe <HAL_RCCEx_PeriphCLKConfig+0x502>
/* check for common PLLI2S Parameters */
assert_param(IS_RCC_PLLI2SN_VALUE(PeriphClkInit->PLLI2S.PLLI2SN));
/*----------------- In Case of PLLI2S is selected as source clock for I2S -------------------*/
if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S) == RCC_PERIPHCLK_I2S) && (PeriphClkInit->I2sClockSelection == RCC_I2SCLKSOURCE_PLLI2S)))
- 8001d74: 687b ldr r3, [r7, #4]
- 8001d76: 681b ldr r3, [r3, #0]
- 8001d78: f003 0301 and.w r3, r3, #1
- 8001d7c: 2b00 cmp r3, #0
- 8001d7e: d021 beq.n 8001dc4 <HAL_RCCEx_PeriphCLKConfig+0x570>
- 8001d80: 687b ldr r3, [r7, #4]
- 8001d82: 6b5b ldr r3, [r3, #52] ; 0x34
- 8001d84: 2b00 cmp r3, #0
- 8001d86: d11d bne.n 8001dc4 <HAL_RCCEx_PeriphCLKConfig+0x570>
+ 8001edc: 687b ldr r3, [r7, #4]
+ 8001ede: 681b ldr r3, [r3, #0]
+ 8001ee0: f003 0301 and.w r3, r3, #1
+ 8001ee4: 2b00 cmp r3, #0
+ 8001ee6: d021 beq.n 8001f2c <HAL_RCCEx_PeriphCLKConfig+0x570>
+ 8001ee8: 687b ldr r3, [r7, #4]
+ 8001eea: 6b5b ldr r3, [r3, #52] ; 0x34
+ 8001eec: 2b00 cmp r3, #0
+ 8001eee: d11d bne.n 8001f2c <HAL_RCCEx_PeriphCLKConfig+0x570>
{
/* check for Parameters */
assert_param(IS_RCC_PLLI2SR_VALUE(PeriphClkInit->PLLI2S.PLLI2SR));
/* Read PLLI2SP and PLLI2SQ value from PLLI2SCFGR register (this value is not needed for I2S configuration) */
tmpreg0 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SP) >> RCC_PLLI2SCFGR_PLLI2SP_Pos);
- 8001d88: 4b64 ldr r3, [pc, #400] ; (8001f1c <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8001d8a: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84
- 8001d8e: 0c1b lsrs r3, r3, #16
- 8001d90: f003 0303 and.w r3, r3, #3
- 8001d94: 613b str r3, [r7, #16]
+ 8001ef0: 4b64 ldr r3, [pc, #400] ; (8002084 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
+ 8001ef2: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84
+ 8001ef6: 0c1b lsrs r3, r3, #16
+ 8001ef8: f003 0303 and.w r3, r3, #3
+ 8001efc: 613b str r3, [r7, #16]
tmpreg1 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SQ) >> RCC_PLLI2SCFGR_PLLI2SQ_Pos);
- 8001d96: 4b61 ldr r3, [pc, #388] ; (8001f1c <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8001d98: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84
- 8001d9c: 0e1b lsrs r3, r3, #24
- 8001d9e: f003 030f and.w r3, r3, #15
- 8001da2: 60fb str r3, [r7, #12]
+ 8001efe: 4b61 ldr r3, [pc, #388] ; (8002084 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
+ 8001f00: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84
+ 8001f04: 0e1b lsrs r3, r3, #24
+ 8001f06: f003 030f and.w r3, r3, #15
+ 8001f0a: 60fb str r3, [r7, #12]
/* Configure the PLLI2S division factors */
/* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) x (PLLI2SN/PLLM) */
/* I2SCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SR */
__HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN , tmpreg0, tmpreg1, PeriphClkInit->PLLI2S.PLLI2SR);
- 8001da4: 687b ldr r3, [r7, #4]
- 8001da6: 685b ldr r3, [r3, #4]
- 8001da8: 019a lsls r2, r3, #6
- 8001daa: 693b ldr r3, [r7, #16]
- 8001dac: 041b lsls r3, r3, #16
- 8001dae: 431a orrs r2, r3
- 8001db0: 68fb ldr r3, [r7, #12]
- 8001db2: 061b lsls r3, r3, #24
- 8001db4: 431a orrs r2, r3
- 8001db6: 687b ldr r3, [r7, #4]
- 8001db8: 689b ldr r3, [r3, #8]
- 8001dba: 071b lsls r3, r3, #28
- 8001dbc: 4957 ldr r1, [pc, #348] ; (8001f1c <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8001dbe: 4313 orrs r3, r2
- 8001dc0: f8c1 3084 str.w r3, [r1, #132] ; 0x84
+ 8001f0c: 687b ldr r3, [r7, #4]
+ 8001f0e: 685b ldr r3, [r3, #4]
+ 8001f10: 019a lsls r2, r3, #6
+ 8001f12: 693b ldr r3, [r7, #16]
+ 8001f14: 041b lsls r3, r3, #16
+ 8001f16: 431a orrs r2, r3
+ 8001f18: 68fb ldr r3, [r7, #12]
+ 8001f1a: 061b lsls r3, r3, #24
+ 8001f1c: 431a orrs r2, r3
+ 8001f1e: 687b ldr r3, [r7, #4]
+ 8001f20: 689b ldr r3, [r3, #8]
+ 8001f22: 071b lsls r3, r3, #28
+ 8001f24: 4957 ldr r1, [pc, #348] ; (8002084 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
+ 8001f26: 4313 orrs r3, r2
+ 8001f28: f8c1 3084 str.w r3, [r1, #132] ; 0x84
}
/*----------------- In Case of PLLI2S is selected as source clock for SAI -------------------*/
if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) && (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLI2S)) ||
- 8001dc4: 687b ldr r3, [r7, #4]
- 8001dc6: 681b ldr r3, [r3, #0]
- 8001dc8: f403 2300 and.w r3, r3, #524288 ; 0x80000
- 8001dcc: 2b00 cmp r3, #0
- 8001dce: d004 beq.n 8001dda <HAL_RCCEx_PeriphCLKConfig+0x586>
- 8001dd0: 687b ldr r3, [r7, #4]
- 8001dd2: 6bdb ldr r3, [r3, #60] ; 0x3c
- 8001dd4: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000
- 8001dd8: d00a beq.n 8001df0 <HAL_RCCEx_PeriphCLKConfig+0x59c>
+ 8001f2c: 687b ldr r3, [r7, #4]
+ 8001f2e: 681b ldr r3, [r3, #0]
+ 8001f30: f403 2300 and.w r3, r3, #524288 ; 0x80000
+ 8001f34: 2b00 cmp r3, #0
+ 8001f36: d004 beq.n 8001f42 <HAL_RCCEx_PeriphCLKConfig+0x586>
+ 8001f38: 687b ldr r3, [r7, #4]
+ 8001f3a: 6bdb ldr r3, [r3, #60] ; 0x3c
+ 8001f3c: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000
+ 8001f40: d00a beq.n 8001f58 <HAL_RCCEx_PeriphCLKConfig+0x59c>
((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLI2S)))
- 8001dda: 687b ldr r3, [r7, #4]
- 8001ddc: 681b ldr r3, [r3, #0]
- 8001dde: f403 1380 and.w r3, r3, #1048576 ; 0x100000
+ 8001f42: 687b ldr r3, [r7, #4]
+ 8001f44: 681b ldr r3, [r3, #0]
+ 8001f46: f403 1380 and.w r3, r3, #1048576 ; 0x100000
if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) && (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLI2S)) ||
- 8001de2: 2b00 cmp r3, #0
- 8001de4: d02e beq.n 8001e44 <HAL_RCCEx_PeriphCLKConfig+0x5f0>
+ 8001f4a: 2b00 cmp r3, #0
+ 8001f4c: d02e beq.n 8001fac <HAL_RCCEx_PeriphCLKConfig+0x5f0>
((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLI2S)))
- 8001de6: 687b ldr r3, [r7, #4]
- 8001de8: 6c1b ldr r3, [r3, #64] ; 0x40
- 8001dea: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000
- 8001dee: d129 bne.n 8001e44 <HAL_RCCEx_PeriphCLKConfig+0x5f0>
+ 8001f4e: 687b ldr r3, [r7, #4]
+ 8001f50: 6c1b ldr r3, [r3, #64] ; 0x40
+ 8001f52: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000
+ 8001f56: d129 bne.n 8001fac <HAL_RCCEx_PeriphCLKConfig+0x5f0>
assert_param(IS_RCC_PLLI2SQ_VALUE(PeriphClkInit->PLLI2S.PLLI2SQ));
/* Check for PLLI2S/DIVQ parameters */
assert_param(IS_RCC_PLLI2S_DIVQ_VALUE(PeriphClkInit->PLLI2SDivQ));
/* Read PLLI2SP and PLLI2SR values from PLLI2SCFGR register (this value is not needed for SAI configuration) */
tmpreg0 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SP) >> RCC_PLLI2SCFGR_PLLI2SP_Pos);
- 8001df0: 4b4a ldr r3, [pc, #296] ; (8001f1c <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8001df2: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84
- 8001df6: 0c1b lsrs r3, r3, #16
- 8001df8: f003 0303 and.w r3, r3, #3
- 8001dfc: 613b str r3, [r7, #16]
+ 8001f58: 4b4a ldr r3, [pc, #296] ; (8002084 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
+ 8001f5a: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84
+ 8001f5e: 0c1b lsrs r3, r3, #16
+ 8001f60: f003 0303 and.w r3, r3, #3
+ 8001f64: 613b str r3, [r7, #16]
tmpreg1 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos);
- 8001dfe: 4b47 ldr r3, [pc, #284] ; (8001f1c <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8001e00: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84
- 8001e04: 0f1b lsrs r3, r3, #28
- 8001e06: f003 0307 and.w r3, r3, #7
- 8001e0a: 60fb str r3, [r7, #12]
+ 8001f66: 4b47 ldr r3, [pc, #284] ; (8002084 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
+ 8001f68: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84
+ 8001f6c: 0f1b lsrs r3, r3, #28
+ 8001f6e: f003 0307 and.w r3, r3, #7
+ 8001f72: 60fb str r3, [r7, #12]
/* Configure the PLLI2S division factors */
/* PLLI2S_VCO Input = PLL_SOURCE/PLLM */
/* PLLI2S_VCO Output = PLLI2S_VCO Input * PLLI2SN */
/* SAI_CLK(first level) = PLLI2S_VCO Output/PLLI2SQ */
__HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN, tmpreg0, PeriphClkInit->PLLI2S.PLLI2SQ, tmpreg1);
- 8001e0c: 687b ldr r3, [r7, #4]
- 8001e0e: 685b ldr r3, [r3, #4]
- 8001e10: 019a lsls r2, r3, #6
- 8001e12: 693b ldr r3, [r7, #16]
- 8001e14: 041b lsls r3, r3, #16
- 8001e16: 431a orrs r2, r3
- 8001e18: 687b ldr r3, [r7, #4]
- 8001e1a: 68db ldr r3, [r3, #12]
- 8001e1c: 061b lsls r3, r3, #24
- 8001e1e: 431a orrs r2, r3
- 8001e20: 68fb ldr r3, [r7, #12]
- 8001e22: 071b lsls r3, r3, #28
- 8001e24: 493d ldr r1, [pc, #244] ; (8001f1c <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8001e26: 4313 orrs r3, r2
- 8001e28: f8c1 3084 str.w r3, [r1, #132] ; 0x84
+ 8001f74: 687b ldr r3, [r7, #4]
+ 8001f76: 685b ldr r3, [r3, #4]
+ 8001f78: 019a lsls r2, r3, #6
+ 8001f7a: 693b ldr r3, [r7, #16]
+ 8001f7c: 041b lsls r3, r3, #16
+ 8001f7e: 431a orrs r2, r3
+ 8001f80: 687b ldr r3, [r7, #4]
+ 8001f82: 68db ldr r3, [r3, #12]
+ 8001f84: 061b lsls r3, r3, #24
+ 8001f86: 431a orrs r2, r3
+ 8001f88: 68fb ldr r3, [r7, #12]
+ 8001f8a: 071b lsls r3, r3, #28
+ 8001f8c: 493d ldr r1, [pc, #244] ; (8002084 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
+ 8001f8e: 4313 orrs r3, r2
+ 8001f90: f8c1 3084 str.w r3, [r1, #132] ; 0x84
/* SAI_CLK_x = SAI_CLK(first level)/PLLI2SDIVQ */
__HAL_RCC_PLLI2S_PLLSAICLKDIVQ_CONFIG(PeriphClkInit->PLLI2SDivQ);
- 8001e2c: 4b3b ldr r3, [pc, #236] ; (8001f1c <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8001e2e: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c
- 8001e32: f023 021f bic.w r2, r3, #31
- 8001e36: 687b ldr r3, [r7, #4]
- 8001e38: 6a5b ldr r3, [r3, #36] ; 0x24
- 8001e3a: 3b01 subs r3, #1
- 8001e3c: 4937 ldr r1, [pc, #220] ; (8001f1c <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8001e3e: 4313 orrs r3, r2
- 8001e40: f8c1 308c str.w r3, [r1, #140] ; 0x8c
+ 8001f94: 4b3b ldr r3, [pc, #236] ; (8002084 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
+ 8001f96: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c
+ 8001f9a: f023 021f bic.w r2, r3, #31
+ 8001f9e: 687b ldr r3, [r7, #4]
+ 8001fa0: 6a5b ldr r3, [r3, #36] ; 0x24
+ 8001fa2: 3b01 subs r3, #1
+ 8001fa4: 4937 ldr r1, [pc, #220] ; (8002084 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
+ 8001fa6: 4313 orrs r3, r2
+ 8001fa8: f8c1 308c str.w r3, [r1, #140] ; 0x8c
}
/*----------------- In Case of PLLI2S is selected as source clock for SPDIF-RX -------------------*/
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPDIFRX) == RCC_PERIPHCLK_SPDIFRX)
- 8001e44: 687b ldr r3, [r7, #4]
- 8001e46: 681b ldr r3, [r3, #0]
- 8001e48: f003 7380 and.w r3, r3, #16777216 ; 0x1000000
- 8001e4c: 2b00 cmp r3, #0
- 8001e4e: d01d beq.n 8001e8c <HAL_RCCEx_PeriphCLKConfig+0x638>
+ 8001fac: 687b ldr r3, [r7, #4]
+ 8001fae: 681b ldr r3, [r3, #0]
+ 8001fb0: f003 7380 and.w r3, r3, #16777216 ; 0x1000000
+ 8001fb4: 2b00 cmp r3, #0
+ 8001fb6: d01d beq.n 8001ff4 <HAL_RCCEx_PeriphCLKConfig+0x638>
{
/* check for Parameters */
assert_param(IS_RCC_PLLI2SP_VALUE(PeriphClkInit->PLLI2S.PLLI2SP));
/* Read PLLI2SR value from PLLI2SCFGR register (this value is not needed for SPDIF-RX configuration) */
tmpreg0 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SQ) >> RCC_PLLI2SCFGR_PLLI2SQ_Pos);
- 8001e50: 4b32 ldr r3, [pc, #200] ; (8001f1c <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8001e52: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84
- 8001e56: 0e1b lsrs r3, r3, #24
- 8001e58: f003 030f and.w r3, r3, #15
- 8001e5c: 613b str r3, [r7, #16]
+ 8001fb8: 4b32 ldr r3, [pc, #200] ; (8002084 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
+ 8001fba: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84
+ 8001fbe: 0e1b lsrs r3, r3, #24
+ 8001fc0: f003 030f and.w r3, r3, #15
+ 8001fc4: 613b str r3, [r7, #16]
tmpreg1 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos);
- 8001e5e: 4b2f ldr r3, [pc, #188] ; (8001f1c <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8001e60: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84
- 8001e64: 0f1b lsrs r3, r3, #28
- 8001e66: f003 0307 and.w r3, r3, #7
- 8001e6a: 60fb str r3, [r7, #12]
+ 8001fc6: 4b2f ldr r3, [pc, #188] ; (8002084 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
+ 8001fc8: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84
+ 8001fcc: 0f1b lsrs r3, r3, #28
+ 8001fce: f003 0307 and.w r3, r3, #7
+ 8001fd2: 60fb str r3, [r7, #12]
/* Configure the PLLI2S division factors */
/* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) x (PLLI2SN/PLLM) */
/* SPDIFCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SP */
__HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN , PeriphClkInit->PLLI2S.PLLI2SP, tmpreg0, tmpreg1);
- 8001e6c: 687b ldr r3, [r7, #4]
- 8001e6e: 685b ldr r3, [r3, #4]
- 8001e70: 019a lsls r2, r3, #6
- 8001e72: 687b ldr r3, [r7, #4]
- 8001e74: 691b ldr r3, [r3, #16]
- 8001e76: 041b lsls r3, r3, #16
- 8001e78: 431a orrs r2, r3
- 8001e7a: 693b ldr r3, [r7, #16]
- 8001e7c: 061b lsls r3, r3, #24
- 8001e7e: 431a orrs r2, r3
- 8001e80: 68fb ldr r3, [r7, #12]
- 8001e82: 071b lsls r3, r3, #28
- 8001e84: 4925 ldr r1, [pc, #148] ; (8001f1c <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8001e86: 4313 orrs r3, r2
- 8001e88: f8c1 3084 str.w r3, [r1, #132] ; 0x84
+ 8001fd4: 687b ldr r3, [r7, #4]
+ 8001fd6: 685b ldr r3, [r3, #4]
+ 8001fd8: 019a lsls r2, r3, #6
+ 8001fda: 687b ldr r3, [r7, #4]
+ 8001fdc: 691b ldr r3, [r3, #16]
+ 8001fde: 041b lsls r3, r3, #16
+ 8001fe0: 431a orrs r2, r3
+ 8001fe2: 693b ldr r3, [r7, #16]
+ 8001fe4: 061b lsls r3, r3, #24
+ 8001fe6: 431a orrs r2, r3
+ 8001fe8: 68fb ldr r3, [r7, #12]
+ 8001fea: 071b lsls r3, r3, #28
+ 8001fec: 4925 ldr r1, [pc, #148] ; (8002084 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
+ 8001fee: 4313 orrs r3, r2
+ 8001ff0: f8c1 3084 str.w r3, [r1, #132] ; 0x84
}
/*----------------- In Case of PLLI2S is just selected -----------------*/
if((PeriphClkInit->PeriphClockSelection & RCC_PERIPHCLK_PLLI2S) == RCC_PERIPHCLK_PLLI2S)
- 8001e8c: 687b ldr r3, [r7, #4]
- 8001e8e: 681b ldr r3, [r3, #0]
- 8001e90: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
- 8001e94: 2b00 cmp r3, #0
- 8001e96: d011 beq.n 8001ebc <HAL_RCCEx_PeriphCLKConfig+0x668>
+ 8001ff4: 687b ldr r3, [r7, #4]
+ 8001ff6: 681b ldr r3, [r3, #0]
+ 8001ff8: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
+ 8001ffc: 2b00 cmp r3, #0
+ 8001ffe: d011 beq.n 8002024 <HAL_RCCEx_PeriphCLKConfig+0x668>
assert_param(IS_RCC_PLLI2SQ_VALUE(PeriphClkInit->PLLI2S.PLLI2SQ));
/* Configure the PLLI2S division factors */
/* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) x (PLLI2SN/PLLI2SM) */
/* SPDIFRXCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SP */
__HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN , PeriphClkInit->PLLI2S.PLLI2SP, PeriphClkInit->PLLI2S.PLLI2SQ, PeriphClkInit->PLLI2S.PLLI2SR);
- 8001e98: 687b ldr r3, [r7, #4]
- 8001e9a: 685b ldr r3, [r3, #4]
- 8001e9c: 019a lsls r2, r3, #6
- 8001e9e: 687b ldr r3, [r7, #4]
- 8001ea0: 691b ldr r3, [r3, #16]
- 8001ea2: 041b lsls r3, r3, #16
- 8001ea4: 431a orrs r2, r3
- 8001ea6: 687b ldr r3, [r7, #4]
- 8001ea8: 68db ldr r3, [r3, #12]
- 8001eaa: 061b lsls r3, r3, #24
- 8001eac: 431a orrs r2, r3
- 8001eae: 687b ldr r3, [r7, #4]
- 8001eb0: 689b ldr r3, [r3, #8]
- 8001eb2: 071b lsls r3, r3, #28
- 8001eb4: 4919 ldr r1, [pc, #100] ; (8001f1c <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8001eb6: 4313 orrs r3, r2
- 8001eb8: f8c1 3084 str.w r3, [r1, #132] ; 0x84
+ 8002000: 687b ldr r3, [r7, #4]
+ 8002002: 685b ldr r3, [r3, #4]
+ 8002004: 019a lsls r2, r3, #6
+ 8002006: 687b ldr r3, [r7, #4]
+ 8002008: 691b ldr r3, [r3, #16]
+ 800200a: 041b lsls r3, r3, #16
+ 800200c: 431a orrs r2, r3
+ 800200e: 687b ldr r3, [r7, #4]
+ 8002010: 68db ldr r3, [r3, #12]
+ 8002012: 061b lsls r3, r3, #24
+ 8002014: 431a orrs r2, r3
+ 8002016: 687b ldr r3, [r7, #4]
+ 8002018: 689b ldr r3, [r3, #8]
+ 800201a: 071b lsls r3, r3, #28
+ 800201c: 4919 ldr r1, [pc, #100] ; (8002084 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
+ 800201e: 4313 orrs r3, r2
+ 8002020: f8c1 3084 str.w r3, [r1, #132] ; 0x84
}
/* Enable the PLLI2S */
__HAL_RCC_PLLI2S_ENABLE();
- 8001ebc: 4b17 ldr r3, [pc, #92] ; (8001f1c <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8001ebe: 681b ldr r3, [r3, #0]
- 8001ec0: 4a16 ldr r2, [pc, #88] ; (8001f1c <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8001ec2: f043 6380 orr.w r3, r3, #67108864 ; 0x4000000
- 8001ec6: 6013 str r3, [r2, #0]
+ 8002024: 4b17 ldr r3, [pc, #92] ; (8002084 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
+ 8002026: 681b ldr r3, [r3, #0]
+ 8002028: 4a16 ldr r2, [pc, #88] ; (8002084 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
+ 800202a: f043 6380 orr.w r3, r3, #67108864 ; 0x4000000
+ 800202e: 6013 str r3, [r2, #0]
/* Get Start Tick*/
tickstart = HAL_GetTick();
- 8001ec8: f7fe fdc6 bl 8000a58 <HAL_GetTick>
- 8001ecc: 6178 str r0, [r7, #20]
+ 8002030: f7fe fd9a bl 8000b68 <HAL_GetTick>
+ 8002034: 6178 str r0, [r7, #20]
/* Wait till PLLI2S is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) == RESET)
- 8001ece: e008 b.n 8001ee2 <HAL_RCCEx_PeriphCLKConfig+0x68e>
+ 8002036: e008 b.n 800204a <HAL_RCCEx_PeriphCLKConfig+0x68e>
{
if((HAL_GetTick() - tickstart) > PLLI2S_TIMEOUT_VALUE)
- 8001ed0: f7fe fdc2 bl 8000a58 <HAL_GetTick>
- 8001ed4: 4602 mov r2, r0
- 8001ed6: 697b ldr r3, [r7, #20]
- 8001ed8: 1ad3 subs r3, r2, r3
- 8001eda: 2b64 cmp r3, #100 ; 0x64
- 8001edc: d901 bls.n 8001ee2 <HAL_RCCEx_PeriphCLKConfig+0x68e>
+ 8002038: f7fe fd96 bl 8000b68 <HAL_GetTick>
+ 800203c: 4602 mov r2, r0
+ 800203e: 697b ldr r3, [r7, #20]
+ 8002040: 1ad3 subs r3, r2, r3
+ 8002042: 2b64 cmp r3, #100 ; 0x64
+ 8002044: d901 bls.n 800204a <HAL_RCCEx_PeriphCLKConfig+0x68e>
{
/* return in case of Timeout detected */
return HAL_TIMEOUT;
- 8001ede: 2303 movs r3, #3
- 8001ee0: e0d7 b.n 8002092 <HAL_RCCEx_PeriphCLKConfig+0x83e>
+ 8002046: 2303 movs r3, #3
+ 8002048: e0d7 b.n 80021fa <HAL_RCCEx_PeriphCLKConfig+0x83e>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) == RESET)
- 8001ee2: 4b0e ldr r3, [pc, #56] ; (8001f1c <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8001ee4: 681b ldr r3, [r3, #0]
- 8001ee6: f003 6300 and.w r3, r3, #134217728 ; 0x8000000
- 8001eea: 2b00 cmp r3, #0
- 8001eec: d0f0 beq.n 8001ed0 <HAL_RCCEx_PeriphCLKConfig+0x67c>
+ 800204a: 4b0e ldr r3, [pc, #56] ; (8002084 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
+ 800204c: 681b ldr r3, [r3, #0]
+ 800204e: f003 6300 and.w r3, r3, #134217728 ; 0x8000000
+ 8002052: 2b00 cmp r3, #0
+ 8002054: d0f0 beq.n 8002038 <HAL_RCCEx_PeriphCLKConfig+0x67c>
}
}
/*-------------------------------------- PLLSAI Configuration ---------------------------------*/
/* PLLSAI is configured when a peripheral will use it as source clock : SAI1, SAI2, LTDC or CK48 */
if(pllsaiused == 1)
- 8001eee: 69bb ldr r3, [r7, #24]
- 8001ef0: 2b01 cmp r3, #1
- 8001ef2: f040 80cd bne.w 8002090 <HAL_RCCEx_PeriphCLKConfig+0x83c>
+ 8002056: 69bb ldr r3, [r7, #24]
+ 8002058: 2b01 cmp r3, #1
+ 800205a: f040 80cd bne.w 80021f8 <HAL_RCCEx_PeriphCLKConfig+0x83c>
{
/* Disable PLLSAI Clock */
__HAL_RCC_PLLSAI_DISABLE();
- 8001ef6: 4b09 ldr r3, [pc, #36] ; (8001f1c <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8001ef8: 681b ldr r3, [r3, #0]
- 8001efa: 4a08 ldr r2, [pc, #32] ; (8001f1c <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
- 8001efc: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000
- 8001f00: 6013 str r3, [r2, #0]
+ 800205e: 4b09 ldr r3, [pc, #36] ; (8002084 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
+ 8002060: 681b ldr r3, [r3, #0]
+ 8002062: 4a08 ldr r2, [pc, #32] ; (8002084 <HAL_RCCEx_PeriphCLKConfig+0x6c8>)
+ 8002064: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000
+ 8002068: 6013 str r3, [r2, #0]
/* Get Start Tick*/
tickstart = HAL_GetTick();
- 8001f02: f7fe fda9 bl 8000a58 <HAL_GetTick>
- 8001f06: 6178 str r0, [r7, #20]
+ 800206a: f7fe fd7d bl 8000b68 <HAL_GetTick>
+ 800206e: 6178 str r0, [r7, #20]
/* Wait till PLLSAI is disabled */
while(__HAL_RCC_PLLSAI_GET_FLAG() != RESET)
- 8001f08: e00a b.n 8001f20 <HAL_RCCEx_PeriphCLKConfig+0x6cc>
+ 8002070: e00a b.n 8002088 <HAL_RCCEx_PeriphCLKConfig+0x6cc>
{
if((HAL_GetTick() - tickstart) > PLLSAI_TIMEOUT_VALUE)
- 8001f0a: f7fe fda5 bl 8000a58 <HAL_GetTick>
- 8001f0e: 4602 mov r2, r0
- 8001f10: 697b ldr r3, [r7, #20]
- 8001f12: 1ad3 subs r3, r2, r3
- 8001f14: 2b64 cmp r3, #100 ; 0x64
- 8001f16: d903 bls.n 8001f20 <HAL_RCCEx_PeriphCLKConfig+0x6cc>
+ 8002072: f7fe fd79 bl 8000b68 <HAL_GetTick>
+ 8002076: 4602 mov r2, r0
+ 8002078: 697b ldr r3, [r7, #20]
+ 800207a: 1ad3 subs r3, r2, r3
+ 800207c: 2b64 cmp r3, #100 ; 0x64
+ 800207e: d903 bls.n 8002088 <HAL_RCCEx_PeriphCLKConfig+0x6cc>
{
/* return in case of Timeout detected */
return HAL_TIMEOUT;
- 8001f18: 2303 movs r3, #3
- 8001f1a: e0ba b.n 8002092 <HAL_RCCEx_PeriphCLKConfig+0x83e>
- 8001f1c: 40023800 .word 0x40023800
+ 8002080: 2303 movs r3, #3
+ 8002082: e0ba b.n 80021fa <HAL_RCCEx_PeriphCLKConfig+0x83e>
+ 8002084: 40023800 .word 0x40023800
while(__HAL_RCC_PLLSAI_GET_FLAG() != RESET)
- 8001f20: 4b5e ldr r3, [pc, #376] ; (800209c <HAL_RCCEx_PeriphCLKConfig+0x848>)
- 8001f22: 681b ldr r3, [r3, #0]
- 8001f24: f003 5300 and.w r3, r3, #536870912 ; 0x20000000
- 8001f28: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000
- 8001f2c: d0ed beq.n 8001f0a <HAL_RCCEx_PeriphCLKConfig+0x6b6>
+ 8002088: 4b5e ldr r3, [pc, #376] ; (8002204 <HAL_RCCEx_PeriphCLKConfig+0x848>)
+ 800208a: 681b ldr r3, [r3, #0]
+ 800208c: f003 5300 and.w r3, r3, #536870912 ; 0x20000000
+ 8002090: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000
+ 8002094: d0ed beq.n 8002072 <HAL_RCCEx_PeriphCLKConfig+0x6b6>
/* Check the PLLSAI division factors */
assert_param(IS_RCC_PLLSAIN_VALUE(PeriphClkInit->PLLSAI.PLLSAIN));
/*----------------- In Case of PLLSAI is selected as source clock for SAI -------------------*/
if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) && (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLSAI)) ||\
- 8001f2e: 687b ldr r3, [r7, #4]
- 8001f30: 681b ldr r3, [r3, #0]
- 8001f32: f403 2300 and.w r3, r3, #524288 ; 0x80000
- 8001f36: 2b00 cmp r3, #0
- 8001f38: d003 beq.n 8001f42 <HAL_RCCEx_PeriphCLKConfig+0x6ee>
- 8001f3a: 687b ldr r3, [r7, #4]
- 8001f3c: 6bdb ldr r3, [r3, #60] ; 0x3c
- 8001f3e: 2b00 cmp r3, #0
- 8001f40: d009 beq.n 8001f56 <HAL_RCCEx_PeriphCLKConfig+0x702>
+ 8002096: 687b ldr r3, [r7, #4]
+ 8002098: 681b ldr r3, [r3, #0]
+ 800209a: f403 2300 and.w r3, r3, #524288 ; 0x80000
+ 800209e: 2b00 cmp r3, #0
+ 80020a0: d003 beq.n 80020aa <HAL_RCCEx_PeriphCLKConfig+0x6ee>
+ 80020a2: 687b ldr r3, [r7, #4]
+ 80020a4: 6bdb ldr r3, [r3, #60] ; 0x3c
+ 80020a6: 2b00 cmp r3, #0
+ 80020a8: d009 beq.n 80020be <HAL_RCCEx_PeriphCLKConfig+0x702>
((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLSAI)))
- 8001f42: 687b ldr r3, [r7, #4]
- 8001f44: 681b ldr r3, [r3, #0]
- 8001f46: f403 1380 and.w r3, r3, #1048576 ; 0x100000
+ 80020aa: 687b ldr r3, [r7, #4]
+ 80020ac: 681b ldr r3, [r3, #0]
+ 80020ae: f403 1380 and.w r3, r3, #1048576 ; 0x100000
if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) && (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLSAI)) ||\
- 8001f4a: 2b00 cmp r3, #0
- 8001f4c: d02e beq.n 8001fac <HAL_RCCEx_PeriphCLKConfig+0x758>
+ 80020b2: 2b00 cmp r3, #0
+ 80020b4: d02e beq.n 8002114 <HAL_RCCEx_PeriphCLKConfig+0x758>
((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLSAI)))
- 8001f4e: 687b ldr r3, [r7, #4]
- 8001f50: 6c1b ldr r3, [r3, #64] ; 0x40
- 8001f52: 2b00 cmp r3, #0
- 8001f54: d12a bne.n 8001fac <HAL_RCCEx_PeriphCLKConfig+0x758>
+ 80020b6: 687b ldr r3, [r7, #4]
+ 80020b8: 6c1b ldr r3, [r3, #64] ; 0x40
+ 80020ba: 2b00 cmp r3, #0
+ 80020bc: d12a bne.n 8002114 <HAL_RCCEx_PeriphCLKConfig+0x758>
assert_param(IS_RCC_PLLSAIQ_VALUE(PeriphClkInit->PLLSAI.PLLSAIQ));
/* check for PLLSAI/DIVQ Parameter */
assert_param(IS_RCC_PLLSAI_DIVQ_VALUE(PeriphClkInit->PLLSAIDivQ));
/* Read PLLSAIP value from PLLSAICFGR register (this value is not needed for SAI configuration) */
tmpreg0 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIP) >> RCC_PLLSAICFGR_PLLSAIP_Pos);
- 8001f56: 4b51 ldr r3, [pc, #324] ; (800209c <HAL_RCCEx_PeriphCLKConfig+0x848>)
- 8001f58: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88
- 8001f5c: 0c1b lsrs r3, r3, #16
- 8001f5e: f003 0303 and.w r3, r3, #3
- 8001f62: 613b str r3, [r7, #16]
+ 80020be: 4b51 ldr r3, [pc, #324] ; (8002204 <HAL_RCCEx_PeriphCLKConfig+0x848>)
+ 80020c0: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88
+ 80020c4: 0c1b lsrs r3, r3, #16
+ 80020c6: f003 0303 and.w r3, r3, #3
+ 80020ca: 613b str r3, [r7, #16]
tmpreg1 = ((RCC->PLLSAICFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLSAICFGR_PLLSAIR_Pos);
- 8001f64: 4b4d ldr r3, [pc, #308] ; (800209c <HAL_RCCEx_PeriphCLKConfig+0x848>)
- 8001f66: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88
- 8001f6a: 0f1b lsrs r3, r3, #28
- 8001f6c: f003 0307 and.w r3, r3, #7
- 8001f70: 60fb str r3, [r7, #12]
+ 80020cc: 4b4d ldr r3, [pc, #308] ; (8002204 <HAL_RCCEx_PeriphCLKConfig+0x848>)
+ 80020ce: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88
+ 80020d2: 0f1b lsrs r3, r3, #28
+ 80020d4: f003 0307 and.w r3, r3, #7
+ 80020d8: 60fb str r3, [r7, #12]
/* PLLSAI_VCO Input = PLL_SOURCE/PLLM */
/* PLLSAI_VCO Output = PLLSAI_VCO Input * PLLSAIN */
/* SAI_CLK(first level) = PLLSAI_VCO Output/PLLSAIQ */
__HAL_RCC_PLLSAI_CONFIG(PeriphClkInit->PLLSAI.PLLSAIN , tmpreg0, PeriphClkInit->PLLSAI.PLLSAIQ, tmpreg1);
- 8001f72: 687b ldr r3, [r7, #4]
- 8001f74: 695b ldr r3, [r3, #20]
- 8001f76: 019a lsls r2, r3, #6
- 8001f78: 693b ldr r3, [r7, #16]
- 8001f7a: 041b lsls r3, r3, #16
- 8001f7c: 431a orrs r2, r3
- 8001f7e: 687b ldr r3, [r7, #4]
- 8001f80: 699b ldr r3, [r3, #24]
- 8001f82: 061b lsls r3, r3, #24
- 8001f84: 431a orrs r2, r3
- 8001f86: 68fb ldr r3, [r7, #12]
- 8001f88: 071b lsls r3, r3, #28
- 8001f8a: 4944 ldr r1, [pc, #272] ; (800209c <HAL_RCCEx_PeriphCLKConfig+0x848>)
- 8001f8c: 4313 orrs r3, r2
- 8001f8e: f8c1 3088 str.w r3, [r1, #136] ; 0x88
+ 80020da: 687b ldr r3, [r7, #4]
+ 80020dc: 695b ldr r3, [r3, #20]
+ 80020de: 019a lsls r2, r3, #6
+ 80020e0: 693b ldr r3, [r7, #16]
+ 80020e2: 041b lsls r3, r3, #16
+ 80020e4: 431a orrs r2, r3
+ 80020e6: 687b ldr r3, [r7, #4]
+ 80020e8: 699b ldr r3, [r3, #24]
+ 80020ea: 061b lsls r3, r3, #24
+ 80020ec: 431a orrs r2, r3
+ 80020ee: 68fb ldr r3, [r7, #12]
+ 80020f0: 071b lsls r3, r3, #28
+ 80020f2: 4944 ldr r1, [pc, #272] ; (8002204 <HAL_RCCEx_PeriphCLKConfig+0x848>)
+ 80020f4: 4313 orrs r3, r2
+ 80020f6: f8c1 3088 str.w r3, [r1, #136] ; 0x88
/* SAI_CLK_x = SAI_CLK(first level)/PLLSAIDIVQ */
__HAL_RCC_PLLSAI_PLLSAICLKDIVQ_CONFIG(PeriphClkInit->PLLSAIDivQ);
- 8001f92: 4b42 ldr r3, [pc, #264] ; (800209c <HAL_RCCEx_PeriphCLKConfig+0x848>)
- 8001f94: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c
- 8001f98: f423 52f8 bic.w r2, r3, #7936 ; 0x1f00
- 8001f9c: 687b ldr r3, [r7, #4]
- 8001f9e: 6a9b ldr r3, [r3, #40] ; 0x28
- 8001fa0: 3b01 subs r3, #1
- 8001fa2: 021b lsls r3, r3, #8
- 8001fa4: 493d ldr r1, [pc, #244] ; (800209c <HAL_RCCEx_PeriphCLKConfig+0x848>)
- 8001fa6: 4313 orrs r3, r2
- 8001fa8: f8c1 308c str.w r3, [r1, #140] ; 0x8c
+ 80020fa: 4b42 ldr r3, [pc, #264] ; (8002204 <HAL_RCCEx_PeriphCLKConfig+0x848>)
+ 80020fc: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c
+ 8002100: f423 52f8 bic.w r2, r3, #7936 ; 0x1f00
+ 8002104: 687b ldr r3, [r7, #4]
+ 8002106: 6a9b ldr r3, [r3, #40] ; 0x28
+ 8002108: 3b01 subs r3, #1
+ 800210a: 021b lsls r3, r3, #8
+ 800210c: 493d ldr r1, [pc, #244] ; (8002204 <HAL_RCCEx_PeriphCLKConfig+0x848>)
+ 800210e: 4313 orrs r3, r2
+ 8002110: f8c1 308c str.w r3, [r1, #140] ; 0x8c
}
/*----------------- In Case of PLLSAI is selected as source clock for CLK48 -------------------*/
/* In Case of PLLI2S is selected as source clock for CK48 */
if((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CLK48) == RCC_PERIPHCLK_CLK48) && (PeriphClkInit->Clk48ClockSelection == RCC_CLK48SOURCE_PLLSAIP))
- 8001fac: 687b ldr r3, [r7, #4]
- 8001fae: 681b ldr r3, [r3, #0]
- 8001fb0: f403 1300 and.w r3, r3, #2097152 ; 0x200000
- 8001fb4: 2b00 cmp r3, #0
- 8001fb6: d022 beq.n 8001ffe <HAL_RCCEx_PeriphCLKConfig+0x7aa>
- 8001fb8: 687b ldr r3, [r7, #4]
- 8001fba: 6fdb ldr r3, [r3, #124] ; 0x7c
- 8001fbc: f1b3 6f00 cmp.w r3, #134217728 ; 0x8000000
- 8001fc0: d11d bne.n 8001ffe <HAL_RCCEx_PeriphCLKConfig+0x7aa>
+ 8002114: 687b ldr r3, [r7, #4]
+ 8002116: 681b ldr r3, [r3, #0]
+ 8002118: f403 1300 and.w r3, r3, #2097152 ; 0x200000
+ 800211c: 2b00 cmp r3, #0
+ 800211e: d022 beq.n 8002166 <HAL_RCCEx_PeriphCLKConfig+0x7aa>
+ 8002120: 687b ldr r3, [r7, #4]
+ 8002122: 6fdb ldr r3, [r3, #124] ; 0x7c
+ 8002124: f1b3 6f00 cmp.w r3, #134217728 ; 0x8000000
+ 8002128: d11d bne.n 8002166 <HAL_RCCEx_PeriphCLKConfig+0x7aa>
{
/* check for Parameters */
assert_param(IS_RCC_PLLSAIP_VALUE(PeriphClkInit->PLLSAI.PLLSAIP));
/* Read PLLSAIQ and PLLSAIR value from PLLSAICFGR register (this value is not needed for CK48 configuration) */
tmpreg0 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIQ) >> RCC_PLLSAICFGR_PLLSAIQ_Pos);
- 8001fc2: 4b36 ldr r3, [pc, #216] ; (800209c <HAL_RCCEx_PeriphCLKConfig+0x848>)
- 8001fc4: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88
- 8001fc8: 0e1b lsrs r3, r3, #24
- 8001fca: f003 030f and.w r3, r3, #15
- 8001fce: 613b str r3, [r7, #16]
+ 800212a: 4b36 ldr r3, [pc, #216] ; (8002204 <HAL_RCCEx_PeriphCLKConfig+0x848>)
+ 800212c: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88
+ 8002130: 0e1b lsrs r3, r3, #24
+ 8002132: f003 030f and.w r3, r3, #15
+ 8002136: 613b str r3, [r7, #16]
tmpreg1 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIR) >> RCC_PLLSAICFGR_PLLSAIR_Pos);
- 8001fd0: 4b32 ldr r3, [pc, #200] ; (800209c <HAL_RCCEx_PeriphCLKConfig+0x848>)
- 8001fd2: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88
- 8001fd6: 0f1b lsrs r3, r3, #28
- 8001fd8: f003 0307 and.w r3, r3, #7
- 8001fdc: 60fb str r3, [r7, #12]
+ 8002138: 4b32 ldr r3, [pc, #200] ; (8002204 <HAL_RCCEx_PeriphCLKConfig+0x848>)
+ 800213a: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88
+ 800213e: 0f1b lsrs r3, r3, #28
+ 8002140: f003 0307 and.w r3, r3, #7
+ 8002144: 60fb str r3, [r7, #12]
/* Configure the PLLSAI division factors */
/* PLLSAI_VCO = f(VCO clock) = f(PLLSAI clock input) x (PLLI2SN/PLLM) */
/* 48CLK = f(PLLSAI clock output) = f(VCO clock) / PLLSAIP */
__HAL_RCC_PLLSAI_CONFIG(PeriphClkInit->PLLSAI.PLLSAIN , PeriphClkInit->PLLSAI.PLLSAIP, tmpreg0, tmpreg1);
- 8001fde: 687b ldr r3, [r7, #4]
- 8001fe0: 695b ldr r3, [r3, #20]
- 8001fe2: 019a lsls r2, r3, #6
- 8001fe4: 687b ldr r3, [r7, #4]
- 8001fe6: 6a1b ldr r3, [r3, #32]
- 8001fe8: 041b lsls r3, r3, #16
- 8001fea: 431a orrs r2, r3
- 8001fec: 693b ldr r3, [r7, #16]
- 8001fee: 061b lsls r3, r3, #24
- 8001ff0: 431a orrs r2, r3
- 8001ff2: 68fb ldr r3, [r7, #12]
- 8001ff4: 071b lsls r3, r3, #28
- 8001ff6: 4929 ldr r1, [pc, #164] ; (800209c <HAL_RCCEx_PeriphCLKConfig+0x848>)
- 8001ff8: 4313 orrs r3, r2
- 8001ffa: f8c1 3088 str.w r3, [r1, #136] ; 0x88
+ 8002146: 687b ldr r3, [r7, #4]
+ 8002148: 695b ldr r3, [r3, #20]
+ 800214a: 019a lsls r2, r3, #6
+ 800214c: 687b ldr r3, [r7, #4]
+ 800214e: 6a1b ldr r3, [r3, #32]
+ 8002150: 041b lsls r3, r3, #16
+ 8002152: 431a orrs r2, r3
+ 8002154: 693b ldr r3, [r7, #16]
+ 8002156: 061b lsls r3, r3, #24
+ 8002158: 431a orrs r2, r3
+ 800215a: 68fb ldr r3, [r7, #12]
+ 800215c: 071b lsls r3, r3, #28
+ 800215e: 4929 ldr r1, [pc, #164] ; (8002204 <HAL_RCCEx_PeriphCLKConfig+0x848>)
+ 8002160: 4313 orrs r3, r2
+ 8002162: f8c1 3088 str.w r3, [r1, #136] ; 0x88
}
#if defined(STM32F746xx) || defined(STM32F756xx) || defined (STM32F767xx) || defined (STM32F769xx) || defined (STM32F777xx) || defined (STM32F779xx) || defined (STM32F750xx)
/*---------------------------- LTDC configuration -------------------------------*/
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LTDC) == (RCC_PERIPHCLK_LTDC))
- 8001ffe: 687b ldr r3, [r7, #4]
- 8002000: 681b ldr r3, [r3, #0]
- 8002002: f003 0308 and.w r3, r3, #8
- 8002006: 2b00 cmp r3, #0
- 8002008: d028 beq.n 800205c <HAL_RCCEx_PeriphCLKConfig+0x808>
+ 8002166: 687b ldr r3, [r7, #4]
+ 8002168: 681b ldr r3, [r3, #0]
+ 800216a: f003 0308 and.w r3, r3, #8
+ 800216e: 2b00 cmp r3, #0
+ 8002170: d028 beq.n 80021c4 <HAL_RCCEx_PeriphCLKConfig+0x808>
{
assert_param(IS_RCC_PLLSAIR_VALUE(PeriphClkInit->PLLSAI.PLLSAIR));
assert_param(IS_RCC_PLLSAI_DIVR_VALUE(PeriphClkInit->PLLSAIDivR));
/* Read PLLSAIP and PLLSAIQ value from PLLSAICFGR register (these value are not needed for LTDC configuration) */
tmpreg0 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIQ) >> RCC_PLLSAICFGR_PLLSAIQ_Pos);
- 800200a: 4b24 ldr r3, [pc, #144] ; (800209c <HAL_RCCEx_PeriphCLKConfig+0x848>)
- 800200c: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88
- 8002010: 0e1b lsrs r3, r3, #24
- 8002012: f003 030f and.w r3, r3, #15
- 8002016: 613b str r3, [r7, #16]
+ 8002172: 4b24 ldr r3, [pc, #144] ; (8002204 <HAL_RCCEx_PeriphCLKConfig+0x848>)
+ 8002174: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88
+ 8002178: 0e1b lsrs r3, r3, #24
+ 800217a: f003 030f and.w r3, r3, #15
+ 800217e: 613b str r3, [r7, #16]
tmpreg1 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIP) >> RCC_PLLSAICFGR_PLLSAIP_Pos);
- 8002018: 4b20 ldr r3, [pc, #128] ; (800209c <HAL_RCCEx_PeriphCLKConfig+0x848>)
- 800201a: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88
- 800201e: 0c1b lsrs r3, r3, #16
- 8002020: f003 0303 and.w r3, r3, #3
- 8002024: 60fb str r3, [r7, #12]
+ 8002180: 4b20 ldr r3, [pc, #128] ; (8002204 <HAL_RCCEx_PeriphCLKConfig+0x848>)
+ 8002182: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88
+ 8002186: 0c1b lsrs r3, r3, #16
+ 8002188: f003 0303 and.w r3, r3, #3
+ 800218c: 60fb str r3, [r7, #12]
/* PLLSAI_VCO Input = PLL_SOURCE/PLLM */
/* PLLSAI_VCO Output = PLLSAI_VCO Input * PLLSAIN */
/* LTDC_CLK(first level) = PLLSAI_VCO Output/PLLSAIR */
__HAL_RCC_PLLSAI_CONFIG(PeriphClkInit->PLLSAI.PLLSAIN , tmpreg1, tmpreg0, PeriphClkInit->PLLSAI.PLLSAIR);
- 8002026: 687b ldr r3, [r7, #4]
- 8002028: 695b ldr r3, [r3, #20]
- 800202a: 019a lsls r2, r3, #6
- 800202c: 68fb ldr r3, [r7, #12]
- 800202e: 041b lsls r3, r3, #16
- 8002030: 431a orrs r2, r3
- 8002032: 693b ldr r3, [r7, #16]
- 8002034: 061b lsls r3, r3, #24
- 8002036: 431a orrs r2, r3
- 8002038: 687b ldr r3, [r7, #4]
- 800203a: 69db ldr r3, [r3, #28]
- 800203c: 071b lsls r3, r3, #28
- 800203e: 4917 ldr r1, [pc, #92] ; (800209c <HAL_RCCEx_PeriphCLKConfig+0x848>)
- 8002040: 4313 orrs r3, r2
- 8002042: f8c1 3088 str.w r3, [r1, #136] ; 0x88
+ 800218e: 687b ldr r3, [r7, #4]
+ 8002190: 695b ldr r3, [r3, #20]
+ 8002192: 019a lsls r2, r3, #6
+ 8002194: 68fb ldr r3, [r7, #12]
+ 8002196: 041b lsls r3, r3, #16
+ 8002198: 431a orrs r2, r3
+ 800219a: 693b ldr r3, [r7, #16]
+ 800219c: 061b lsls r3, r3, #24
+ 800219e: 431a orrs r2, r3
+ 80021a0: 687b ldr r3, [r7, #4]
+ 80021a2: 69db ldr r3, [r3, #28]
+ 80021a4: 071b lsls r3, r3, #28
+ 80021a6: 4917 ldr r1, [pc, #92] ; (8002204 <HAL_RCCEx_PeriphCLKConfig+0x848>)
+ 80021a8: 4313 orrs r3, r2
+ 80021aa: f8c1 3088 str.w r3, [r1, #136] ; 0x88
/* LTDC_CLK = LTDC_CLK(first level)/PLLSAIDIVR */
__HAL_RCC_PLLSAI_PLLSAICLKDIVR_CONFIG(PeriphClkInit->PLLSAIDivR);
- 8002046: 4b15 ldr r3, [pc, #84] ; (800209c <HAL_RCCEx_PeriphCLKConfig+0x848>)
- 8002048: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c
- 800204c: f423 3240 bic.w r2, r3, #196608 ; 0x30000
- 8002050: 687b ldr r3, [r7, #4]
- 8002052: 6adb ldr r3, [r3, #44] ; 0x2c
- 8002054: 4911 ldr r1, [pc, #68] ; (800209c <HAL_RCCEx_PeriphCLKConfig+0x848>)
- 8002056: 4313 orrs r3, r2
- 8002058: f8c1 308c str.w r3, [r1, #140] ; 0x8c
+ 80021ae: 4b15 ldr r3, [pc, #84] ; (8002204 <HAL_RCCEx_PeriphCLKConfig+0x848>)
+ 80021b0: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c
+ 80021b4: f423 3240 bic.w r2, r3, #196608 ; 0x30000
+ 80021b8: 687b ldr r3, [r7, #4]
+ 80021ba: 6adb ldr r3, [r3, #44] ; 0x2c
+ 80021bc: 4911 ldr r1, [pc, #68] ; (8002204 <HAL_RCCEx_PeriphCLKConfig+0x848>)
+ 80021be: 4313 orrs r3, r2
+ 80021c0: f8c1 308c str.w r3, [r1, #140] ; 0x8c
}
#endif /* STM32F746xx || STM32F756xx || STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx || STM32F750xx */
/* Enable PLLSAI Clock */
__HAL_RCC_PLLSAI_ENABLE();
- 800205c: 4b0f ldr r3, [pc, #60] ; (800209c <HAL_RCCEx_PeriphCLKConfig+0x848>)
- 800205e: 681b ldr r3, [r3, #0]
- 8002060: 4a0e ldr r2, [pc, #56] ; (800209c <HAL_RCCEx_PeriphCLKConfig+0x848>)
- 8002062: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
- 8002066: 6013 str r3, [r2, #0]
+ 80021c4: 4b0f ldr r3, [pc, #60] ; (8002204 <HAL_RCCEx_PeriphCLKConfig+0x848>)
+ 80021c6: 681b ldr r3, [r3, #0]
+ 80021c8: 4a0e ldr r2, [pc, #56] ; (8002204 <HAL_RCCEx_PeriphCLKConfig+0x848>)
+ 80021ca: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
+ 80021ce: 6013 str r3, [r2, #0]
/* Get Start Tick*/
tickstart = HAL_GetTick();
- 8002068: f7fe fcf6 bl 8000a58 <HAL_GetTick>
- 800206c: 6178 str r0, [r7, #20]
+ 80021d0: f7fe fcca bl 8000b68 <HAL_GetTick>
+ 80021d4: 6178 str r0, [r7, #20]
/* Wait till PLLSAI is ready */
while(__HAL_RCC_PLLSAI_GET_FLAG() == RESET)
- 800206e: e008 b.n 8002082 <HAL_RCCEx_PeriphCLKConfig+0x82e>
+ 80021d6: e008 b.n 80021ea <HAL_RCCEx_PeriphCLKConfig+0x82e>
{
if((HAL_GetTick() - tickstart) > PLLSAI_TIMEOUT_VALUE)
- 8002070: f7fe fcf2 bl 8000a58 <HAL_GetTick>
- 8002074: 4602 mov r2, r0
- 8002076: 697b ldr r3, [r7, #20]
- 8002078: 1ad3 subs r3, r2, r3
- 800207a: 2b64 cmp r3, #100 ; 0x64
- 800207c: d901 bls.n 8002082 <HAL_RCCEx_PeriphCLKConfig+0x82e>
+ 80021d8: f7fe fcc6 bl 8000b68 <HAL_GetTick>
+ 80021dc: 4602 mov r2, r0
+ 80021de: 697b ldr r3, [r7, #20]
+ 80021e0: 1ad3 subs r3, r2, r3
+ 80021e2: 2b64 cmp r3, #100 ; 0x64
+ 80021e4: d901 bls.n 80021ea <HAL_RCCEx_PeriphCLKConfig+0x82e>
{
/* return in case of Timeout detected */
return HAL_TIMEOUT;
- 800207e: 2303 movs r3, #3
- 8002080: e007 b.n 8002092 <HAL_RCCEx_PeriphCLKConfig+0x83e>
+ 80021e6: 2303 movs r3, #3
+ 80021e8: e007 b.n 80021fa <HAL_RCCEx_PeriphCLKConfig+0x83e>
while(__HAL_RCC_PLLSAI_GET_FLAG() == RESET)
- 8002082: 4b06 ldr r3, [pc, #24] ; (800209c <HAL_RCCEx_PeriphCLKConfig+0x848>)
- 8002084: 681b ldr r3, [r3, #0]
- 8002086: f003 5300 and.w r3, r3, #536870912 ; 0x20000000
- 800208a: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000
- 800208e: d1ef bne.n 8002070 <HAL_RCCEx_PeriphCLKConfig+0x81c>
+ 80021ea: 4b06 ldr r3, [pc, #24] ; (8002204 <HAL_RCCEx_PeriphCLKConfig+0x848>)
+ 80021ec: 681b ldr r3, [r3, #0]
+ 80021ee: f003 5300 and.w r3, r3, #536870912 ; 0x20000000
+ 80021f2: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000
+ 80021f6: d1ef bne.n 80021d8 <HAL_RCCEx_PeriphCLKConfig+0x81c>
}
}
}
return HAL_OK;
- 8002090: 2300 movs r3, #0
+ 80021f8: 2300 movs r3, #0
+}
+ 80021fa: 4618 mov r0, r3
+ 80021fc: 3720 adds r7, #32
+ 80021fe: 46bd mov sp, r7
+ 8002200: bd80 pop {r7, pc}
+ 8002202: bf00 nop
+ 8002204: 40023800 .word 0x40023800
+
+08002208 <HAL_TIM_Base_Init>:
+ * Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init()
+ * @param htim TIM Base handle
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim)
+{
+ 8002208: b580 push {r7, lr}
+ 800220a: b082 sub sp, #8
+ 800220c: af00 add r7, sp, #0
+ 800220e: 6078 str r0, [r7, #4]
+ /* Check the TIM handle allocation */
+ if (htim == NULL)
+ 8002210: 687b ldr r3, [r7, #4]
+ 8002212: 2b00 cmp r3, #0
+ 8002214: d101 bne.n 800221a <HAL_TIM_Base_Init+0x12>
+ {
+ return HAL_ERROR;
+ 8002216: 2301 movs r3, #1
+ 8002218: e01d b.n 8002256 <HAL_TIM_Base_Init+0x4e>
+ assert_param(IS_TIM_INSTANCE(htim->Instance));
+ assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
+ assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
+ assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
+
+ if (htim->State == HAL_TIM_STATE_RESET)
+ 800221a: 687b ldr r3, [r7, #4]
+ 800221c: f893 303d ldrb.w r3, [r3, #61] ; 0x3d
+ 8002220: b2db uxtb r3, r3
+ 8002222: 2b00 cmp r3, #0
+ 8002224: d106 bne.n 8002234 <HAL_TIM_Base_Init+0x2c>
+ {
+ /* Allocate lock resource and initialize it */
+ htim->Lock = HAL_UNLOCKED;
+ 8002226: 687b ldr r3, [r7, #4]
+ 8002228: 2200 movs r2, #0
+ 800222a: f883 203c strb.w r2, [r3, #60] ; 0x3c
+ }
+ /* Init the low level hardware : GPIO, CLOCK, NVIC */
+ htim->Base_MspInitCallback(htim);
+#else
+ /* Init the low level hardware : GPIO, CLOCK, NVIC */
+ HAL_TIM_Base_MspInit(htim);
+ 800222e: 6878 ldr r0, [r7, #4]
+ 8002230: f7fe fb36 bl 80008a0 <HAL_TIM_Base_MspInit>
+#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
+ }
+
+ /* Set the TIM state */
+ htim->State = HAL_TIM_STATE_BUSY;
+ 8002234: 687b ldr r3, [r7, #4]
+ 8002236: 2202 movs r2, #2
+ 8002238: f883 203d strb.w r2, [r3, #61] ; 0x3d
+
+ /* Set the Time Base configuration */
+ TIM_Base_SetConfig(htim->Instance, &htim->Init);
+ 800223c: 687b ldr r3, [r7, #4]
+ 800223e: 681a ldr r2, [r3, #0]
+ 8002240: 687b ldr r3, [r7, #4]
+ 8002242: 3304 adds r3, #4
+ 8002244: 4619 mov r1, r3
+ 8002246: 4610 mov r0, r2
+ 8002248: f000 fa0a bl 8002660 <TIM_Base_SetConfig>
+
+ /* Initialize the TIM state*/
+ htim->State = HAL_TIM_STATE_READY;
+ 800224c: 687b ldr r3, [r7, #4]
+ 800224e: 2201 movs r2, #1
+ 8002250: f883 203d strb.w r2, [r3, #61] ; 0x3d
+
+ return HAL_OK;
+ 8002254: 2300 movs r3, #0
}
- 8002092: 4618 mov r0, r3
- 8002094: 3720 adds r7, #32
- 8002096: 46bd mov sp, r7
- 8002098: bd80 pop {r7, pc}
- 800209a: bf00 nop
- 800209c: 40023800 .word 0x40023800
-
-080020a0 <HAL_UART_Init>:
+ 8002256: 4618 mov r0, r3
+ 8002258: 3708 adds r7, #8
+ 800225a: 46bd mov sp, r7
+ 800225c: bd80 pop {r7, pc}
+
+0800225e <HAL_TIM_IRQHandler>:
+ * @brief This function handles TIM interrupts requests.
+ * @param htim TIM handle
+ * @retval None
+ */
+void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
+{
+ 800225e: b580 push {r7, lr}
+ 8002260: b082 sub sp, #8
+ 8002262: af00 add r7, sp, #0
+ 8002264: 6078 str r0, [r7, #4]
+ /* Capture compare 1 event */
+ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
+ 8002266: 687b ldr r3, [r7, #4]
+ 8002268: 681b ldr r3, [r3, #0]
+ 800226a: 691b ldr r3, [r3, #16]
+ 800226c: f003 0302 and.w r3, r3, #2
+ 8002270: 2b02 cmp r3, #2
+ 8002272: d122 bne.n 80022ba <HAL_TIM_IRQHandler+0x5c>
+ {
+ if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) != RESET)
+ 8002274: 687b ldr r3, [r7, #4]
+ 8002276: 681b ldr r3, [r3, #0]
+ 8002278: 68db ldr r3, [r3, #12]
+ 800227a: f003 0302 and.w r3, r3, #2
+ 800227e: 2b02 cmp r3, #2
+ 8002280: d11b bne.n 80022ba <HAL_TIM_IRQHandler+0x5c>
+ {
+ {
+ __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1);
+ 8002282: 687b ldr r3, [r7, #4]
+ 8002284: 681b ldr r3, [r3, #0]
+ 8002286: f06f 0202 mvn.w r2, #2
+ 800228a: 611a str r2, [r3, #16]
+ htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
+ 800228c: 687b ldr r3, [r7, #4]
+ 800228e: 2201 movs r2, #1
+ 8002290: 771a strb r2, [r3, #28]
+
+ /* Input capture event */
+ if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U)
+ 8002292: 687b ldr r3, [r7, #4]
+ 8002294: 681b ldr r3, [r3, #0]
+ 8002296: 699b ldr r3, [r3, #24]
+ 8002298: f003 0303 and.w r3, r3, #3
+ 800229c: 2b00 cmp r3, #0
+ 800229e: d003 beq.n 80022a8 <HAL_TIM_IRQHandler+0x4a>
+ {
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
+ htim->IC_CaptureCallback(htim);
+#else
+ HAL_TIM_IC_CaptureCallback(htim);
+ 80022a0: 6878 ldr r0, [r7, #4]
+ 80022a2: f000 f9bf bl 8002624 <HAL_TIM_IC_CaptureCallback>
+ 80022a6: e005 b.n 80022b4 <HAL_TIM_IRQHandler+0x56>
+ {
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
+ htim->OC_DelayElapsedCallback(htim);
+ htim->PWM_PulseFinishedCallback(htim);
+#else
+ HAL_TIM_OC_DelayElapsedCallback(htim);
+ 80022a8: 6878 ldr r0, [r7, #4]
+ 80022aa: f000 f9b1 bl 8002610 <HAL_TIM_OC_DelayElapsedCallback>
+ HAL_TIM_PWM_PulseFinishedCallback(htim);
+ 80022ae: 6878 ldr r0, [r7, #4]
+ 80022b0: f000 f9c2 bl 8002638 <HAL_TIM_PWM_PulseFinishedCallback>
+#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
+ }
+ htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
+ 80022b4: 687b ldr r3, [r7, #4]
+ 80022b6: 2200 movs r2, #0
+ 80022b8: 771a strb r2, [r3, #28]
+ }
+ }
+ }
+ /* Capture compare 2 event */
+ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET)
+ 80022ba: 687b ldr r3, [r7, #4]
+ 80022bc: 681b ldr r3, [r3, #0]
+ 80022be: 691b ldr r3, [r3, #16]
+ 80022c0: f003 0304 and.w r3, r3, #4
+ 80022c4: 2b04 cmp r3, #4
+ 80022c6: d122 bne.n 800230e <HAL_TIM_IRQHandler+0xb0>
+ {
+ if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) != RESET)
+ 80022c8: 687b ldr r3, [r7, #4]
+ 80022ca: 681b ldr r3, [r3, #0]
+ 80022cc: 68db ldr r3, [r3, #12]
+ 80022ce: f003 0304 and.w r3, r3, #4
+ 80022d2: 2b04 cmp r3, #4
+ 80022d4: d11b bne.n 800230e <HAL_TIM_IRQHandler+0xb0>
+ {
+ __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2);
+ 80022d6: 687b ldr r3, [r7, #4]
+ 80022d8: 681b ldr r3, [r3, #0]
+ 80022da: f06f 0204 mvn.w r2, #4
+ 80022de: 611a str r2, [r3, #16]
+ htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
+ 80022e0: 687b ldr r3, [r7, #4]
+ 80022e2: 2202 movs r2, #2
+ 80022e4: 771a strb r2, [r3, #28]
+ /* Input capture event */
+ if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
+ 80022e6: 687b ldr r3, [r7, #4]
+ 80022e8: 681b ldr r3, [r3, #0]
+ 80022ea: 699b ldr r3, [r3, #24]
+ 80022ec: f403 7340 and.w r3, r3, #768 ; 0x300
+ 80022f0: 2b00 cmp r3, #0
+ 80022f2: d003 beq.n 80022fc <HAL_TIM_IRQHandler+0x9e>
+ {
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
+ htim->IC_CaptureCallback(htim);
+#else
+ HAL_TIM_IC_CaptureCallback(htim);
+ 80022f4: 6878 ldr r0, [r7, #4]
+ 80022f6: f000 f995 bl 8002624 <HAL_TIM_IC_CaptureCallback>
+ 80022fa: e005 b.n 8002308 <HAL_TIM_IRQHandler+0xaa>
+ {
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
+ htim->OC_DelayElapsedCallback(htim);
+ htim->PWM_PulseFinishedCallback(htim);
+#else
+ HAL_TIM_OC_DelayElapsedCallback(htim);
+ 80022fc: 6878 ldr r0, [r7, #4]
+ 80022fe: f000 f987 bl 8002610 <HAL_TIM_OC_DelayElapsedCallback>
+ HAL_TIM_PWM_PulseFinishedCallback(htim);
+ 8002302: 6878 ldr r0, [r7, #4]
+ 8002304: f000 f998 bl 8002638 <HAL_TIM_PWM_PulseFinishedCallback>
+#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
+ }
+ htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
+ 8002308: 687b ldr r3, [r7, #4]
+ 800230a: 2200 movs r2, #0
+ 800230c: 771a strb r2, [r3, #28]
+ }
+ }
+ /* Capture compare 3 event */
+ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET)
+ 800230e: 687b ldr r3, [r7, #4]
+ 8002310: 681b ldr r3, [r3, #0]
+ 8002312: 691b ldr r3, [r3, #16]
+ 8002314: f003 0308 and.w r3, r3, #8
+ 8002318: 2b08 cmp r3, #8
+ 800231a: d122 bne.n 8002362 <HAL_TIM_IRQHandler+0x104>
+ {
+ if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) != RESET)
+ 800231c: 687b ldr r3, [r7, #4]
+ 800231e: 681b ldr r3, [r3, #0]
+ 8002320: 68db ldr r3, [r3, #12]
+ 8002322: f003 0308 and.w r3, r3, #8
+ 8002326: 2b08 cmp r3, #8
+ 8002328: d11b bne.n 8002362 <HAL_TIM_IRQHandler+0x104>
+ {
+ __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3);
+ 800232a: 687b ldr r3, [r7, #4]
+ 800232c: 681b ldr r3, [r3, #0]
+ 800232e: f06f 0208 mvn.w r2, #8
+ 8002332: 611a str r2, [r3, #16]
+ htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
+ 8002334: 687b ldr r3, [r7, #4]
+ 8002336: 2204 movs r2, #4
+ 8002338: 771a strb r2, [r3, #28]
+ /* Input capture event */
+ if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
+ 800233a: 687b ldr r3, [r7, #4]
+ 800233c: 681b ldr r3, [r3, #0]
+ 800233e: 69db ldr r3, [r3, #28]
+ 8002340: f003 0303 and.w r3, r3, #3
+ 8002344: 2b00 cmp r3, #0
+ 8002346: d003 beq.n 8002350 <HAL_TIM_IRQHandler+0xf2>
+ {
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
+ htim->IC_CaptureCallback(htim);
+#else
+ HAL_TIM_IC_CaptureCallback(htim);
+ 8002348: 6878 ldr r0, [r7, #4]
+ 800234a: f000 f96b bl 8002624 <HAL_TIM_IC_CaptureCallback>
+ 800234e: e005 b.n 800235c <HAL_TIM_IRQHandler+0xfe>
+ {
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
+ htim->OC_DelayElapsedCallback(htim);
+ htim->PWM_PulseFinishedCallback(htim);
+#else
+ HAL_TIM_OC_DelayElapsedCallback(htim);
+ 8002350: 6878 ldr r0, [r7, #4]
+ 8002352: f000 f95d bl 8002610 <HAL_TIM_OC_DelayElapsedCallback>
+ HAL_TIM_PWM_PulseFinishedCallback(htim);
+ 8002356: 6878 ldr r0, [r7, #4]
+ 8002358: f000 f96e bl 8002638 <HAL_TIM_PWM_PulseFinishedCallback>
+#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
+ }
+ htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
+ 800235c: 687b ldr r3, [r7, #4]
+ 800235e: 2200 movs r2, #0
+ 8002360: 771a strb r2, [r3, #28]
+ }
+ }
+ /* Capture compare 4 event */
+ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET)
+ 8002362: 687b ldr r3, [r7, #4]
+ 8002364: 681b ldr r3, [r3, #0]
+ 8002366: 691b ldr r3, [r3, #16]
+ 8002368: f003 0310 and.w r3, r3, #16
+ 800236c: 2b10 cmp r3, #16
+ 800236e: d122 bne.n 80023b6 <HAL_TIM_IRQHandler+0x158>
+ {
+ if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) != RESET)
+ 8002370: 687b ldr r3, [r7, #4]
+ 8002372: 681b ldr r3, [r3, #0]
+ 8002374: 68db ldr r3, [r3, #12]
+ 8002376: f003 0310 and.w r3, r3, #16
+ 800237a: 2b10 cmp r3, #16
+ 800237c: d11b bne.n 80023b6 <HAL_TIM_IRQHandler+0x158>
+ {
+ __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4);
+ 800237e: 687b ldr r3, [r7, #4]
+ 8002380: 681b ldr r3, [r3, #0]
+ 8002382: f06f 0210 mvn.w r2, #16
+ 8002386: 611a str r2, [r3, #16]
+ htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
+ 8002388: 687b ldr r3, [r7, #4]
+ 800238a: 2208 movs r2, #8
+ 800238c: 771a strb r2, [r3, #28]
+ /* Input capture event */
+ if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
+ 800238e: 687b ldr r3, [r7, #4]
+ 8002390: 681b ldr r3, [r3, #0]
+ 8002392: 69db ldr r3, [r3, #28]
+ 8002394: f403 7340 and.w r3, r3, #768 ; 0x300
+ 8002398: 2b00 cmp r3, #0
+ 800239a: d003 beq.n 80023a4 <HAL_TIM_IRQHandler+0x146>
+ {
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
+ htim->IC_CaptureCallback(htim);
+#else
+ HAL_TIM_IC_CaptureCallback(htim);
+ 800239c: 6878 ldr r0, [r7, #4]
+ 800239e: f000 f941 bl 8002624 <HAL_TIM_IC_CaptureCallback>
+ 80023a2: e005 b.n 80023b0 <HAL_TIM_IRQHandler+0x152>
+ {
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
+ htim->OC_DelayElapsedCallback(htim);
+ htim->PWM_PulseFinishedCallback(htim);
+#else
+ HAL_TIM_OC_DelayElapsedCallback(htim);
+ 80023a4: 6878 ldr r0, [r7, #4]
+ 80023a6: f000 f933 bl 8002610 <HAL_TIM_OC_DelayElapsedCallback>
+ HAL_TIM_PWM_PulseFinishedCallback(htim);
+ 80023aa: 6878 ldr r0, [r7, #4]
+ 80023ac: f000 f944 bl 8002638 <HAL_TIM_PWM_PulseFinishedCallback>
+#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
+ }
+ htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
+ 80023b0: 687b ldr r3, [r7, #4]
+ 80023b2: 2200 movs r2, #0
+ 80023b4: 771a strb r2, [r3, #28]
+ }
+ }
+ /* TIM Update event */
+ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET)
+ 80023b6: 687b ldr r3, [r7, #4]
+ 80023b8: 681b ldr r3, [r3, #0]
+ 80023ba: 691b ldr r3, [r3, #16]
+ 80023bc: f003 0301 and.w r3, r3, #1
+ 80023c0: 2b01 cmp r3, #1
+ 80023c2: d10e bne.n 80023e2 <HAL_TIM_IRQHandler+0x184>
+ {
+ if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) != RESET)
+ 80023c4: 687b ldr r3, [r7, #4]
+ 80023c6: 681b ldr r3, [r3, #0]
+ 80023c8: 68db ldr r3, [r3, #12]
+ 80023ca: f003 0301 and.w r3, r3, #1
+ 80023ce: 2b01 cmp r3, #1
+ 80023d0: d107 bne.n 80023e2 <HAL_TIM_IRQHandler+0x184>
+ {
+ __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE);
+ 80023d2: 687b ldr r3, [r7, #4]
+ 80023d4: 681b ldr r3, [r3, #0]
+ 80023d6: f06f 0201 mvn.w r2, #1
+ 80023da: 611a str r2, [r3, #16]
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
+ htim->PeriodElapsedCallback(htim);
+#else
+ HAL_TIM_PeriodElapsedCallback(htim);
+ 80023dc: 6878 ldr r0, [r7, #4]
+ 80023de: f7fe f9ef bl 80007c0 <HAL_TIM_PeriodElapsedCallback>
+#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
+ }
+ }
+ /* TIM Break input event */
+ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET)
+ 80023e2: 687b ldr r3, [r7, #4]
+ 80023e4: 681b ldr r3, [r3, #0]
+ 80023e6: 691b ldr r3, [r3, #16]
+ 80023e8: f003 0380 and.w r3, r3, #128 ; 0x80
+ 80023ec: 2b80 cmp r3, #128 ; 0x80
+ 80023ee: d10e bne.n 800240e <HAL_TIM_IRQHandler+0x1b0>
+ {
+ if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) != RESET)
+ 80023f0: 687b ldr r3, [r7, #4]
+ 80023f2: 681b ldr r3, [r3, #0]
+ 80023f4: 68db ldr r3, [r3, #12]
+ 80023f6: f003 0380 and.w r3, r3, #128 ; 0x80
+ 80023fa: 2b80 cmp r3, #128 ; 0x80
+ 80023fc: d107 bne.n 800240e <HAL_TIM_IRQHandler+0x1b0>
+ {
+ __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK);
+ 80023fe: 687b ldr r3, [r7, #4]
+ 8002400: 681b ldr r3, [r3, #0]
+ 8002402: f06f 0280 mvn.w r2, #128 ; 0x80
+ 8002406: 611a str r2, [r3, #16]
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
+ htim->BreakCallback(htim);
+#else
+ HAL_TIMEx_BreakCallback(htim);
+ 8002408: 6878 ldr r0, [r7, #4]
+ 800240a: f000 fac9 bl 80029a0 <HAL_TIMEx_BreakCallback>
+#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
+ }
+ }
+ /* TIM Break2 input event */
+ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK2) != RESET)
+ 800240e: 687b ldr r3, [r7, #4]
+ 8002410: 681b ldr r3, [r3, #0]
+ 8002412: 691b ldr r3, [r3, #16]
+ 8002414: f403 7380 and.w r3, r3, #256 ; 0x100
+ 8002418: f5b3 7f80 cmp.w r3, #256 ; 0x100
+ 800241c: d10e bne.n 800243c <HAL_TIM_IRQHandler+0x1de>
+ {
+ if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) != RESET)
+ 800241e: 687b ldr r3, [r7, #4]
+ 8002420: 681b ldr r3, [r3, #0]
+ 8002422: 68db ldr r3, [r3, #12]
+ 8002424: f003 0380 and.w r3, r3, #128 ; 0x80
+ 8002428: 2b80 cmp r3, #128 ; 0x80
+ 800242a: d107 bne.n 800243c <HAL_TIM_IRQHandler+0x1de>
+ {
+ __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_BREAK2);
+ 800242c: 687b ldr r3, [r7, #4]
+ 800242e: 681b ldr r3, [r3, #0]
+ 8002430: f46f 7280 mvn.w r2, #256 ; 0x100
+ 8002434: 611a str r2, [r3, #16]
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
+ htim->Break2Callback(htim);
+#else
+ HAL_TIMEx_Break2Callback(htim);
+ 8002436: 6878 ldr r0, [r7, #4]
+ 8002438: f000 fabc bl 80029b4 <HAL_TIMEx_Break2Callback>
+#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
+ }
+ }
+ /* TIM Trigger detection event */
+ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET)
+ 800243c: 687b ldr r3, [r7, #4]
+ 800243e: 681b ldr r3, [r3, #0]
+ 8002440: 691b ldr r3, [r3, #16]
+ 8002442: f003 0340 and.w r3, r3, #64 ; 0x40
+ 8002446: 2b40 cmp r3, #64 ; 0x40
+ 8002448: d10e bne.n 8002468 <HAL_TIM_IRQHandler+0x20a>
+ {
+ if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) != RESET)
+ 800244a: 687b ldr r3, [r7, #4]
+ 800244c: 681b ldr r3, [r3, #0]
+ 800244e: 68db ldr r3, [r3, #12]
+ 8002450: f003 0340 and.w r3, r3, #64 ; 0x40
+ 8002454: 2b40 cmp r3, #64 ; 0x40
+ 8002456: d107 bne.n 8002468 <HAL_TIM_IRQHandler+0x20a>
+ {
+ __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER);
+ 8002458: 687b ldr r3, [r7, #4]
+ 800245a: 681b ldr r3, [r3, #0]
+ 800245c: f06f 0240 mvn.w r2, #64 ; 0x40
+ 8002460: 611a str r2, [r3, #16]
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
+ htim->TriggerCallback(htim);
+#else
+ HAL_TIM_TriggerCallback(htim);
+ 8002462: 6878 ldr r0, [r7, #4]
+ 8002464: f000 f8f2 bl 800264c <HAL_TIM_TriggerCallback>
+#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
+ }
+ }
+ /* TIM commutation event */
+ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET)
+ 8002468: 687b ldr r3, [r7, #4]
+ 800246a: 681b ldr r3, [r3, #0]
+ 800246c: 691b ldr r3, [r3, #16]
+ 800246e: f003 0320 and.w r3, r3, #32
+ 8002472: 2b20 cmp r3, #32
+ 8002474: d10e bne.n 8002494 <HAL_TIM_IRQHandler+0x236>
+ {
+ if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) != RESET)
+ 8002476: 687b ldr r3, [r7, #4]
+ 8002478: 681b ldr r3, [r3, #0]
+ 800247a: 68db ldr r3, [r3, #12]
+ 800247c: f003 0320 and.w r3, r3, #32
+ 8002480: 2b20 cmp r3, #32
+ 8002482: d107 bne.n 8002494 <HAL_TIM_IRQHandler+0x236>
+ {
+ __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM);
+ 8002484: 687b ldr r3, [r7, #4]
+ 8002486: 681b ldr r3, [r3, #0]
+ 8002488: f06f 0220 mvn.w r2, #32
+ 800248c: 611a str r2, [r3, #16]
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
+ htim->CommutationCallback(htim);
+#else
+ HAL_TIMEx_CommutCallback(htim);
+ 800248e: 6878 ldr r0, [r7, #4]
+ 8002490: f000 fa7c bl 800298c <HAL_TIMEx_CommutCallback>
+#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
+ }
+ }
+}
+ 8002494: bf00 nop
+ 8002496: 3708 adds r7, #8
+ 8002498: 46bd mov sp, r7
+ 800249a: bd80 pop {r7, pc}
+
+0800249c <HAL_TIM_ConfigClockSource>:
+ * @param sClockSourceConfig pointer to a TIM_ClockConfigTypeDef structure that
+ * contains the clock source information for the TIM peripheral.
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, TIM_ClockConfigTypeDef *sClockSourceConfig)
+{
+ 800249c: b580 push {r7, lr}
+ 800249e: b084 sub sp, #16
+ 80024a0: af00 add r7, sp, #0
+ 80024a2: 6078 str r0, [r7, #4]
+ 80024a4: 6039 str r1, [r7, #0]
+ uint32_t tmpsmcr;
+
+ /* Process Locked */
+ __HAL_LOCK(htim);
+ 80024a6: 687b ldr r3, [r7, #4]
+ 80024a8: f893 303c ldrb.w r3, [r3, #60] ; 0x3c
+ 80024ac: 2b01 cmp r3, #1
+ 80024ae: d101 bne.n 80024b4 <HAL_TIM_ConfigClockSource+0x18>
+ 80024b0: 2302 movs r3, #2
+ 80024b2: e0a6 b.n 8002602 <HAL_TIM_ConfigClockSource+0x166>
+ 80024b4: 687b ldr r3, [r7, #4]
+ 80024b6: 2201 movs r2, #1
+ 80024b8: f883 203c strb.w r2, [r3, #60] ; 0x3c
+
+ htim->State = HAL_TIM_STATE_BUSY;
+ 80024bc: 687b ldr r3, [r7, #4]
+ 80024be: 2202 movs r2, #2
+ 80024c0: f883 203d strb.w r2, [r3, #61] ; 0x3d
+
+ /* Check the parameters */
+ assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource));
+
+ /* Reset the SMS, TS, ECE, ETPS and ETRF bits */
+ tmpsmcr = htim->Instance->SMCR;
+ 80024c4: 687b ldr r3, [r7, #4]
+ 80024c6: 681b ldr r3, [r3, #0]
+ 80024c8: 689b ldr r3, [r3, #8]
+ 80024ca: 60fb str r3, [r7, #12]
+ tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS);
+ 80024cc: 68fa ldr r2, [r7, #12]
+ 80024ce: 4b4f ldr r3, [pc, #316] ; (800260c <HAL_TIM_ConfigClockSource+0x170>)
+ 80024d0: 4013 ands r3, r2
+ 80024d2: 60fb str r3, [r7, #12]
+ tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
+ 80024d4: 68fb ldr r3, [r7, #12]
+ 80024d6: f423 437f bic.w r3, r3, #65280 ; 0xff00
+ 80024da: 60fb str r3, [r7, #12]
+ htim->Instance->SMCR = tmpsmcr;
+ 80024dc: 687b ldr r3, [r7, #4]
+ 80024de: 681b ldr r3, [r3, #0]
+ 80024e0: 68fa ldr r2, [r7, #12]
+ 80024e2: 609a str r2, [r3, #8]
+
+ switch (sClockSourceConfig->ClockSource)
+ 80024e4: 683b ldr r3, [r7, #0]
+ 80024e6: 681b ldr r3, [r3, #0]
+ 80024e8: 2b40 cmp r3, #64 ; 0x40
+ 80024ea: d067 beq.n 80025bc <HAL_TIM_ConfigClockSource+0x120>
+ 80024ec: 2b40 cmp r3, #64 ; 0x40
+ 80024ee: d80b bhi.n 8002508 <HAL_TIM_ConfigClockSource+0x6c>
+ 80024f0: 2b10 cmp r3, #16
+ 80024f2: d073 beq.n 80025dc <HAL_TIM_ConfigClockSource+0x140>
+ 80024f4: 2b10 cmp r3, #16
+ 80024f6: d802 bhi.n 80024fe <HAL_TIM_ConfigClockSource+0x62>
+ 80024f8: 2b00 cmp r3, #0
+ 80024fa: d06f beq.n 80025dc <HAL_TIM_ConfigClockSource+0x140>
+ TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource);
+ break;
+ }
+
+ default:
+ break;
+ 80024fc: e078 b.n 80025f0 <HAL_TIM_ConfigClockSource+0x154>
+ switch (sClockSourceConfig->ClockSource)
+ 80024fe: 2b20 cmp r3, #32
+ 8002500: d06c beq.n 80025dc <HAL_TIM_ConfigClockSource+0x140>
+ 8002502: 2b30 cmp r3, #48 ; 0x30
+ 8002504: d06a beq.n 80025dc <HAL_TIM_ConfigClockSource+0x140>
+ break;
+ 8002506: e073 b.n 80025f0 <HAL_TIM_ConfigClockSource+0x154>
+ switch (sClockSourceConfig->ClockSource)
+ 8002508: 2b70 cmp r3, #112 ; 0x70
+ 800250a: d00d beq.n 8002528 <HAL_TIM_ConfigClockSource+0x8c>
+ 800250c: 2b70 cmp r3, #112 ; 0x70
+ 800250e: d804 bhi.n 800251a <HAL_TIM_ConfigClockSource+0x7e>
+ 8002510: 2b50 cmp r3, #80 ; 0x50
+ 8002512: d033 beq.n 800257c <HAL_TIM_ConfigClockSource+0xe0>
+ 8002514: 2b60 cmp r3, #96 ; 0x60
+ 8002516: d041 beq.n 800259c <HAL_TIM_ConfigClockSource+0x100>
+ break;
+ 8002518: e06a b.n 80025f0 <HAL_TIM_ConfigClockSource+0x154>
+ switch (sClockSourceConfig->ClockSource)
+ 800251a: f5b3 5f80 cmp.w r3, #4096 ; 0x1000
+ 800251e: d066 beq.n 80025ee <HAL_TIM_ConfigClockSource+0x152>
+ 8002520: f5b3 5f00 cmp.w r3, #8192 ; 0x2000
+ 8002524: d017 beq.n 8002556 <HAL_TIM_ConfigClockSource+0xba>
+ break;
+ 8002526: e063 b.n 80025f0 <HAL_TIM_ConfigClockSource+0x154>
+ TIM_ETR_SetConfig(htim->Instance,
+ 8002528: 687b ldr r3, [r7, #4]
+ 800252a: 6818 ldr r0, [r3, #0]
+ 800252c: 683b ldr r3, [r7, #0]
+ 800252e: 6899 ldr r1, [r3, #8]
+ 8002530: 683b ldr r3, [r7, #0]
+ 8002532: 685a ldr r2, [r3, #4]
+ 8002534: 683b ldr r3, [r7, #0]
+ 8002536: 68db ldr r3, [r3, #12]
+ 8002538: f000 f9ac bl 8002894 <TIM_ETR_SetConfig>
+ tmpsmcr = htim->Instance->SMCR;
+ 800253c: 687b ldr r3, [r7, #4]
+ 800253e: 681b ldr r3, [r3, #0]
+ 8002540: 689b ldr r3, [r3, #8]
+ 8002542: 60fb str r3, [r7, #12]
+ tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1);
+ 8002544: 68fb ldr r3, [r7, #12]
+ 8002546: f043 0377 orr.w r3, r3, #119 ; 0x77
+ 800254a: 60fb str r3, [r7, #12]
+ htim->Instance->SMCR = tmpsmcr;
+ 800254c: 687b ldr r3, [r7, #4]
+ 800254e: 681b ldr r3, [r3, #0]
+ 8002550: 68fa ldr r2, [r7, #12]
+ 8002552: 609a str r2, [r3, #8]
+ break;
+ 8002554: e04c b.n 80025f0 <HAL_TIM_ConfigClockSource+0x154>
+ TIM_ETR_SetConfig(htim->Instance,
+ 8002556: 687b ldr r3, [r7, #4]
+ 8002558: 6818 ldr r0, [r3, #0]
+ 800255a: 683b ldr r3, [r7, #0]
+ 800255c: 6899 ldr r1, [r3, #8]
+ 800255e: 683b ldr r3, [r7, #0]
+ 8002560: 685a ldr r2, [r3, #4]
+ 8002562: 683b ldr r3, [r7, #0]
+ 8002564: 68db ldr r3, [r3, #12]
+ 8002566: f000 f995 bl 8002894 <TIM_ETR_SetConfig>
+ htim->Instance->SMCR |= TIM_SMCR_ECE;
+ 800256a: 687b ldr r3, [r7, #4]
+ 800256c: 681b ldr r3, [r3, #0]
+ 800256e: 689a ldr r2, [r3, #8]
+ 8002570: 687b ldr r3, [r7, #4]
+ 8002572: 681b ldr r3, [r3, #0]
+ 8002574: f442 4280 orr.w r2, r2, #16384 ; 0x4000
+ 8002578: 609a str r2, [r3, #8]
+ break;
+ 800257a: e039 b.n 80025f0 <HAL_TIM_ConfigClockSource+0x154>
+ TIM_TI1_ConfigInputStage(htim->Instance,
+ 800257c: 687b ldr r3, [r7, #4]
+ 800257e: 6818 ldr r0, [r3, #0]
+ 8002580: 683b ldr r3, [r7, #0]
+ 8002582: 6859 ldr r1, [r3, #4]
+ 8002584: 683b ldr r3, [r7, #0]
+ 8002586: 68db ldr r3, [r3, #12]
+ 8002588: 461a mov r2, r3
+ 800258a: f000 f909 bl 80027a0 <TIM_TI1_ConfigInputStage>
+ TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1);
+ 800258e: 687b ldr r3, [r7, #4]
+ 8002590: 681b ldr r3, [r3, #0]
+ 8002592: 2150 movs r1, #80 ; 0x50
+ 8002594: 4618 mov r0, r3
+ 8002596: f000 f962 bl 800285e <TIM_ITRx_SetConfig>
+ break;
+ 800259a: e029 b.n 80025f0 <HAL_TIM_ConfigClockSource+0x154>
+ TIM_TI2_ConfigInputStage(htim->Instance,
+ 800259c: 687b ldr r3, [r7, #4]
+ 800259e: 6818 ldr r0, [r3, #0]
+ 80025a0: 683b ldr r3, [r7, #0]
+ 80025a2: 6859 ldr r1, [r3, #4]
+ 80025a4: 683b ldr r3, [r7, #0]
+ 80025a6: 68db ldr r3, [r3, #12]
+ 80025a8: 461a mov r2, r3
+ 80025aa: f000 f928 bl 80027fe <TIM_TI2_ConfigInputStage>
+ TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2);
+ 80025ae: 687b ldr r3, [r7, #4]
+ 80025b0: 681b ldr r3, [r3, #0]
+ 80025b2: 2160 movs r1, #96 ; 0x60
+ 80025b4: 4618 mov r0, r3
+ 80025b6: f000 f952 bl 800285e <TIM_ITRx_SetConfig>
+ break;
+ 80025ba: e019 b.n 80025f0 <HAL_TIM_ConfigClockSource+0x154>
+ TIM_TI1_ConfigInputStage(htim->Instance,
+ 80025bc: 687b ldr r3, [r7, #4]
+ 80025be: 6818 ldr r0, [r3, #0]
+ 80025c0: 683b ldr r3, [r7, #0]
+ 80025c2: 6859 ldr r1, [r3, #4]
+ 80025c4: 683b ldr r3, [r7, #0]
+ 80025c6: 68db ldr r3, [r3, #12]
+ 80025c8: 461a mov r2, r3
+ 80025ca: f000 f8e9 bl 80027a0 <TIM_TI1_ConfigInputStage>
+ TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED);
+ 80025ce: 687b ldr r3, [r7, #4]
+ 80025d0: 681b ldr r3, [r3, #0]
+ 80025d2: 2140 movs r1, #64 ; 0x40
+ 80025d4: 4618 mov r0, r3
+ 80025d6: f000 f942 bl 800285e <TIM_ITRx_SetConfig>
+ break;
+ 80025da: e009 b.n 80025f0 <HAL_TIM_ConfigClockSource+0x154>
+ TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource);
+ 80025dc: 687b ldr r3, [r7, #4]
+ 80025de: 681a ldr r2, [r3, #0]
+ 80025e0: 683b ldr r3, [r7, #0]
+ 80025e2: 681b ldr r3, [r3, #0]
+ 80025e4: 4619 mov r1, r3
+ 80025e6: 4610 mov r0, r2
+ 80025e8: f000 f939 bl 800285e <TIM_ITRx_SetConfig>
+ break;
+ 80025ec: e000 b.n 80025f0 <HAL_TIM_ConfigClockSource+0x154>
+ break;
+ 80025ee: bf00 nop
+ }
+ htim->State = HAL_TIM_STATE_READY;
+ 80025f0: 687b ldr r3, [r7, #4]
+ 80025f2: 2201 movs r2, #1
+ 80025f4: f883 203d strb.w r2, [r3, #61] ; 0x3d
+
+ __HAL_UNLOCK(htim);
+ 80025f8: 687b ldr r3, [r7, #4]
+ 80025fa: 2200 movs r2, #0
+ 80025fc: f883 203c strb.w r2, [r3, #60] ; 0x3c
+
+ return HAL_OK;
+ 8002600: 2300 movs r3, #0
+}
+ 8002602: 4618 mov r0, r3
+ 8002604: 3710 adds r7, #16
+ 8002606: 46bd mov sp, r7
+ 8002608: bd80 pop {r7, pc}
+ 800260a: bf00 nop
+ 800260c: fffeff88 .word 0xfffeff88
+
+08002610 <HAL_TIM_OC_DelayElapsedCallback>:
+ * @brief Output Compare callback in non-blocking mode
+ * @param htim TIM OC handle
+ * @retval None
+ */
+__weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim)
+{
+ 8002610: b480 push {r7}
+ 8002612: b083 sub sp, #12
+ 8002614: af00 add r7, sp, #0
+ 8002616: 6078 str r0, [r7, #4]
+ UNUSED(htim);
+
+ /* NOTE : This function should not be modified, when the callback is needed,
+ the HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file
+ */
+}
+ 8002618: bf00 nop
+ 800261a: 370c adds r7, #12
+ 800261c: 46bd mov sp, r7
+ 800261e: f85d 7b04 ldr.w r7, [sp], #4
+ 8002622: 4770 bx lr
+
+08002624 <HAL_TIM_IC_CaptureCallback>:
+ * @brief Input Capture callback in non-blocking mode
+ * @param htim TIM IC handle
+ * @retval None
+ */
+__weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim)
+{
+ 8002624: b480 push {r7}
+ 8002626: b083 sub sp, #12
+ 8002628: af00 add r7, sp, #0
+ 800262a: 6078 str r0, [r7, #4]
+ UNUSED(htim);
+
+ /* NOTE : This function should not be modified, when the callback is needed,
+ the HAL_TIM_IC_CaptureCallback could be implemented in the user file
+ */
+}
+ 800262c: bf00 nop
+ 800262e: 370c adds r7, #12
+ 8002630: 46bd mov sp, r7
+ 8002632: f85d 7b04 ldr.w r7, [sp], #4
+ 8002636: 4770 bx lr
+
+08002638 <HAL_TIM_PWM_PulseFinishedCallback>:
+ * @brief PWM Pulse finished callback in non-blocking mode
+ * @param htim TIM handle
+ * @retval None
+ */
+__weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim)
+{
+ 8002638: b480 push {r7}
+ 800263a: b083 sub sp, #12
+ 800263c: af00 add r7, sp, #0
+ 800263e: 6078 str r0, [r7, #4]
+ UNUSED(htim);
+
+ /* NOTE : This function should not be modified, when the callback is needed,
+ the HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file
+ */
+}
+ 8002640: bf00 nop
+ 8002642: 370c adds r7, #12
+ 8002644: 46bd mov sp, r7
+ 8002646: f85d 7b04 ldr.w r7, [sp], #4
+ 800264a: 4770 bx lr
+
+0800264c <HAL_TIM_TriggerCallback>:
+ * @brief Hall Trigger detection callback in non-blocking mode
+ * @param htim TIM handle
+ * @retval None
+ */
+__weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim)
+{
+ 800264c: b480 push {r7}
+ 800264e: b083 sub sp, #12
+ 8002650: af00 add r7, sp, #0
+ 8002652: 6078 str r0, [r7, #4]
+ UNUSED(htim);
+
+ /* NOTE : This function should not be modified, when the callback is needed,
+ the HAL_TIM_TriggerCallback could be implemented in the user file
+ */
+}
+ 8002654: bf00 nop
+ 8002656: 370c adds r7, #12
+ 8002658: 46bd mov sp, r7
+ 800265a: f85d 7b04 ldr.w r7, [sp], #4
+ 800265e: 4770 bx lr
+
+08002660 <TIM_Base_SetConfig>:
+ * @param TIMx TIM peripheral
+ * @param Structure TIM Base configuration structure
+ * @retval None
+ */
+void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure)
+{
+ 8002660: b480 push {r7}
+ 8002662: b085 sub sp, #20
+ 8002664: af00 add r7, sp, #0
+ 8002666: 6078 str r0, [r7, #4]
+ 8002668: 6039 str r1, [r7, #0]
+ uint32_t tmpcr1;
+ tmpcr1 = TIMx->CR1;
+ 800266a: 687b ldr r3, [r7, #4]
+ 800266c: 681b ldr r3, [r3, #0]
+ 800266e: 60fb str r3, [r7, #12]
+
+ /* Set TIM Time Base Unit parameters ---------------------------------------*/
+ if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
+ 8002670: 687b ldr r3, [r7, #4]
+ 8002672: 4a40 ldr r2, [pc, #256] ; (8002774 <TIM_Base_SetConfig+0x114>)
+ 8002674: 4293 cmp r3, r2
+ 8002676: d013 beq.n 80026a0 <TIM_Base_SetConfig+0x40>
+ 8002678: 687b ldr r3, [r7, #4]
+ 800267a: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000
+ 800267e: d00f beq.n 80026a0 <TIM_Base_SetConfig+0x40>
+ 8002680: 687b ldr r3, [r7, #4]
+ 8002682: 4a3d ldr r2, [pc, #244] ; (8002778 <TIM_Base_SetConfig+0x118>)
+ 8002684: 4293 cmp r3, r2
+ 8002686: d00b beq.n 80026a0 <TIM_Base_SetConfig+0x40>
+ 8002688: 687b ldr r3, [r7, #4]
+ 800268a: 4a3c ldr r2, [pc, #240] ; (800277c <TIM_Base_SetConfig+0x11c>)
+ 800268c: 4293 cmp r3, r2
+ 800268e: d007 beq.n 80026a0 <TIM_Base_SetConfig+0x40>
+ 8002690: 687b ldr r3, [r7, #4]
+ 8002692: 4a3b ldr r2, [pc, #236] ; (8002780 <TIM_Base_SetConfig+0x120>)
+ 8002694: 4293 cmp r3, r2
+ 8002696: d003 beq.n 80026a0 <TIM_Base_SetConfig+0x40>
+ 8002698: 687b ldr r3, [r7, #4]
+ 800269a: 4a3a ldr r2, [pc, #232] ; (8002784 <TIM_Base_SetConfig+0x124>)
+ 800269c: 4293 cmp r3, r2
+ 800269e: d108 bne.n 80026b2 <TIM_Base_SetConfig+0x52>
+ {
+ /* Select the Counter Mode */
+ tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
+ 80026a0: 68fb ldr r3, [r7, #12]
+ 80026a2: f023 0370 bic.w r3, r3, #112 ; 0x70
+ 80026a6: 60fb str r3, [r7, #12]
+ tmpcr1 |= Structure->CounterMode;
+ 80026a8: 683b ldr r3, [r7, #0]
+ 80026aa: 685b ldr r3, [r3, #4]
+ 80026ac: 68fa ldr r2, [r7, #12]
+ 80026ae: 4313 orrs r3, r2
+ 80026b0: 60fb str r3, [r7, #12]
+ }
+
+ if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
+ 80026b2: 687b ldr r3, [r7, #4]
+ 80026b4: 4a2f ldr r2, [pc, #188] ; (8002774 <TIM_Base_SetConfig+0x114>)
+ 80026b6: 4293 cmp r3, r2
+ 80026b8: d02b beq.n 8002712 <TIM_Base_SetConfig+0xb2>
+ 80026ba: 687b ldr r3, [r7, #4]
+ 80026bc: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000
+ 80026c0: d027 beq.n 8002712 <TIM_Base_SetConfig+0xb2>
+ 80026c2: 687b ldr r3, [r7, #4]
+ 80026c4: 4a2c ldr r2, [pc, #176] ; (8002778 <TIM_Base_SetConfig+0x118>)
+ 80026c6: 4293 cmp r3, r2
+ 80026c8: d023 beq.n 8002712 <TIM_Base_SetConfig+0xb2>
+ 80026ca: 687b ldr r3, [r7, #4]
+ 80026cc: 4a2b ldr r2, [pc, #172] ; (800277c <TIM_Base_SetConfig+0x11c>)
+ 80026ce: 4293 cmp r3, r2
+ 80026d0: d01f beq.n 8002712 <TIM_Base_SetConfig+0xb2>
+ 80026d2: 687b ldr r3, [r7, #4]
+ 80026d4: 4a2a ldr r2, [pc, #168] ; (8002780 <TIM_Base_SetConfig+0x120>)
+ 80026d6: 4293 cmp r3, r2
+ 80026d8: d01b beq.n 8002712 <TIM_Base_SetConfig+0xb2>
+ 80026da: 687b ldr r3, [r7, #4]
+ 80026dc: 4a29 ldr r2, [pc, #164] ; (8002784 <TIM_Base_SetConfig+0x124>)
+ 80026de: 4293 cmp r3, r2
+ 80026e0: d017 beq.n 8002712 <TIM_Base_SetConfig+0xb2>
+ 80026e2: 687b ldr r3, [r7, #4]
+ 80026e4: 4a28 ldr r2, [pc, #160] ; (8002788 <TIM_Base_SetConfig+0x128>)
+ 80026e6: 4293 cmp r3, r2
+ 80026e8: d013 beq.n 8002712 <TIM_Base_SetConfig+0xb2>
+ 80026ea: 687b ldr r3, [r7, #4]
+ 80026ec: 4a27 ldr r2, [pc, #156] ; (800278c <TIM_Base_SetConfig+0x12c>)
+ 80026ee: 4293 cmp r3, r2
+ 80026f0: d00f beq.n 8002712 <TIM_Base_SetConfig+0xb2>
+ 80026f2: 687b ldr r3, [r7, #4]
+ 80026f4: 4a26 ldr r2, [pc, #152] ; (8002790 <TIM_Base_SetConfig+0x130>)
+ 80026f6: 4293 cmp r3, r2
+ 80026f8: d00b beq.n 8002712 <TIM_Base_SetConfig+0xb2>
+ 80026fa: 687b ldr r3, [r7, #4]
+ 80026fc: 4a25 ldr r2, [pc, #148] ; (8002794 <TIM_Base_SetConfig+0x134>)
+ 80026fe: 4293 cmp r3, r2
+ 8002700: d007 beq.n 8002712 <TIM_Base_SetConfig+0xb2>
+ 8002702: 687b ldr r3, [r7, #4]
+ 8002704: 4a24 ldr r2, [pc, #144] ; (8002798 <TIM_Base_SetConfig+0x138>)
+ 8002706: 4293 cmp r3, r2
+ 8002708: d003 beq.n 8002712 <TIM_Base_SetConfig+0xb2>
+ 800270a: 687b ldr r3, [r7, #4]
+ 800270c: 4a23 ldr r2, [pc, #140] ; (800279c <TIM_Base_SetConfig+0x13c>)
+ 800270e: 4293 cmp r3, r2
+ 8002710: d108 bne.n 8002724 <TIM_Base_SetConfig+0xc4>
+ {
+ /* Set the clock division */
+ tmpcr1 &= ~TIM_CR1_CKD;
+ 8002712: 68fb ldr r3, [r7, #12]
+ 8002714: f423 7340 bic.w r3, r3, #768 ; 0x300
+ 8002718: 60fb str r3, [r7, #12]
+ tmpcr1 |= (uint32_t)Structure->ClockDivision;
+ 800271a: 683b ldr r3, [r7, #0]
+ 800271c: 68db ldr r3, [r3, #12]
+ 800271e: 68fa ldr r2, [r7, #12]
+ 8002720: 4313 orrs r3, r2
+ 8002722: 60fb str r3, [r7, #12]
+ }
+
+ /* Set the auto-reload preload */
+ MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload);
+ 8002724: 68fb ldr r3, [r7, #12]
+ 8002726: f023 0280 bic.w r2, r3, #128 ; 0x80
+ 800272a: 683b ldr r3, [r7, #0]
+ 800272c: 695b ldr r3, [r3, #20]
+ 800272e: 4313 orrs r3, r2
+ 8002730: 60fb str r3, [r7, #12]
+
+ TIMx->CR1 = tmpcr1;
+ 8002732: 687b ldr r3, [r7, #4]
+ 8002734: 68fa ldr r2, [r7, #12]
+ 8002736: 601a str r2, [r3, #0]
+
+ /* Set the Autoreload value */
+ TIMx->ARR = (uint32_t)Structure->Period ;
+ 8002738: 683b ldr r3, [r7, #0]
+ 800273a: 689a ldr r2, [r3, #8]
+ 800273c: 687b ldr r3, [r7, #4]
+ 800273e: 62da str r2, [r3, #44] ; 0x2c
+
+ /* Set the Prescaler value */
+ TIMx->PSC = Structure->Prescaler;
+ 8002740: 683b ldr r3, [r7, #0]
+ 8002742: 681a ldr r2, [r3, #0]
+ 8002744: 687b ldr r3, [r7, #4]
+ 8002746: 629a str r2, [r3, #40] ; 0x28
+
+ if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx))
+ 8002748: 687b ldr r3, [r7, #4]
+ 800274a: 4a0a ldr r2, [pc, #40] ; (8002774 <TIM_Base_SetConfig+0x114>)
+ 800274c: 4293 cmp r3, r2
+ 800274e: d003 beq.n 8002758 <TIM_Base_SetConfig+0xf8>
+ 8002750: 687b ldr r3, [r7, #4]
+ 8002752: 4a0c ldr r2, [pc, #48] ; (8002784 <TIM_Base_SetConfig+0x124>)
+ 8002754: 4293 cmp r3, r2
+ 8002756: d103 bne.n 8002760 <TIM_Base_SetConfig+0x100>
+ {
+ /* Set the Repetition Counter value */
+ TIMx->RCR = Structure->RepetitionCounter;
+ 8002758: 683b ldr r3, [r7, #0]
+ 800275a: 691a ldr r2, [r3, #16]
+ 800275c: 687b ldr r3, [r7, #4]
+ 800275e: 631a str r2, [r3, #48] ; 0x30
+ }
+
+ /* Generate an update event to reload the Prescaler
+ and the repetition counter (only for advanced timer) value immediately */
+ TIMx->EGR = TIM_EGR_UG;
+ 8002760: 687b ldr r3, [r7, #4]
+ 8002762: 2201 movs r2, #1
+ 8002764: 615a str r2, [r3, #20]
+}
+ 8002766: bf00 nop
+ 8002768: 3714 adds r7, #20
+ 800276a: 46bd mov sp, r7
+ 800276c: f85d 7b04 ldr.w r7, [sp], #4
+ 8002770: 4770 bx lr
+ 8002772: bf00 nop
+ 8002774: 40010000 .word 0x40010000
+ 8002778: 40000400 .word 0x40000400
+ 800277c: 40000800 .word 0x40000800
+ 8002780: 40000c00 .word 0x40000c00
+ 8002784: 40010400 .word 0x40010400
+ 8002788: 40014000 .word 0x40014000
+ 800278c: 40014400 .word 0x40014400
+ 8002790: 40014800 .word 0x40014800
+ 8002794: 40001800 .word 0x40001800
+ 8002798: 40001c00 .word 0x40001c00
+ 800279c: 40002000 .word 0x40002000
+
+080027a0 <TIM_TI1_ConfigInputStage>:
+ * @param TIM_ICFilter Specifies the Input Capture Filter.
+ * This parameter must be a value between 0x00 and 0x0F.
+ * @retval None
+ */
+static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
+{
+ 80027a0: b480 push {r7}
+ 80027a2: b087 sub sp, #28
+ 80027a4: af00 add r7, sp, #0
+ 80027a6: 60f8 str r0, [r7, #12]
+ 80027a8: 60b9 str r1, [r7, #8]
+ 80027aa: 607a str r2, [r7, #4]
+ uint32_t tmpccmr1;
+ uint32_t tmpccer;
+
+ /* Disable the Channel 1: Reset the CC1E Bit */
+ tmpccer = TIMx->CCER;
+ 80027ac: 68fb ldr r3, [r7, #12]
+ 80027ae: 6a1b ldr r3, [r3, #32]
+ 80027b0: 617b str r3, [r7, #20]
+ TIMx->CCER &= ~TIM_CCER_CC1E;
+ 80027b2: 68fb ldr r3, [r7, #12]
+ 80027b4: 6a1b ldr r3, [r3, #32]
+ 80027b6: f023 0201 bic.w r2, r3, #1
+ 80027ba: 68fb ldr r3, [r7, #12]
+ 80027bc: 621a str r2, [r3, #32]
+ tmpccmr1 = TIMx->CCMR1;
+ 80027be: 68fb ldr r3, [r7, #12]
+ 80027c0: 699b ldr r3, [r3, #24]
+ 80027c2: 613b str r3, [r7, #16]
+
+ /* Set the filter */
+ tmpccmr1 &= ~TIM_CCMR1_IC1F;
+ 80027c4: 693b ldr r3, [r7, #16]
+ 80027c6: f023 03f0 bic.w r3, r3, #240 ; 0xf0
+ 80027ca: 613b str r3, [r7, #16]
+ tmpccmr1 |= (TIM_ICFilter << 4U);
+ 80027cc: 687b ldr r3, [r7, #4]
+ 80027ce: 011b lsls r3, r3, #4
+ 80027d0: 693a ldr r2, [r7, #16]
+ 80027d2: 4313 orrs r3, r2
+ 80027d4: 613b str r3, [r7, #16]
+
+ /* Select the Polarity and set the CC1E Bit */
+ tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP);
+ 80027d6: 697b ldr r3, [r7, #20]
+ 80027d8: f023 030a bic.w r3, r3, #10
+ 80027dc: 617b str r3, [r7, #20]
+ tmpccer |= TIM_ICPolarity;
+ 80027de: 697a ldr r2, [r7, #20]
+ 80027e0: 68bb ldr r3, [r7, #8]
+ 80027e2: 4313 orrs r3, r2
+ 80027e4: 617b str r3, [r7, #20]
+
+ /* Write to TIMx CCMR1 and CCER registers */
+ TIMx->CCMR1 = tmpccmr1;
+ 80027e6: 68fb ldr r3, [r7, #12]
+ 80027e8: 693a ldr r2, [r7, #16]
+ 80027ea: 619a str r2, [r3, #24]
+ TIMx->CCER = tmpccer;
+ 80027ec: 68fb ldr r3, [r7, #12]
+ 80027ee: 697a ldr r2, [r7, #20]
+ 80027f0: 621a str r2, [r3, #32]
+}
+ 80027f2: bf00 nop
+ 80027f4: 371c adds r7, #28
+ 80027f6: 46bd mov sp, r7
+ 80027f8: f85d 7b04 ldr.w r7, [sp], #4
+ 80027fc: 4770 bx lr
+
+080027fe <TIM_TI2_ConfigInputStage>:
+ * @param TIM_ICFilter Specifies the Input Capture Filter.
+ * This parameter must be a value between 0x00 and 0x0F.
+ * @retval None
+ */
+static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
+{
+ 80027fe: b480 push {r7}
+ 8002800: b087 sub sp, #28
+ 8002802: af00 add r7, sp, #0
+ 8002804: 60f8 str r0, [r7, #12]
+ 8002806: 60b9 str r1, [r7, #8]
+ 8002808: 607a str r2, [r7, #4]
+ uint32_t tmpccmr1;
+ uint32_t tmpccer;
+
+ /* Disable the Channel 2: Reset the CC2E Bit */
+ TIMx->CCER &= ~TIM_CCER_CC2E;
+ 800280a: 68fb ldr r3, [r7, #12]
+ 800280c: 6a1b ldr r3, [r3, #32]
+ 800280e: f023 0210 bic.w r2, r3, #16
+ 8002812: 68fb ldr r3, [r7, #12]
+ 8002814: 621a str r2, [r3, #32]
+ tmpccmr1 = TIMx->CCMR1;
+ 8002816: 68fb ldr r3, [r7, #12]
+ 8002818: 699b ldr r3, [r3, #24]
+ 800281a: 617b str r3, [r7, #20]
+ tmpccer = TIMx->CCER;
+ 800281c: 68fb ldr r3, [r7, #12]
+ 800281e: 6a1b ldr r3, [r3, #32]
+ 8002820: 613b str r3, [r7, #16]
+
+ /* Set the filter */
+ tmpccmr1 &= ~TIM_CCMR1_IC2F;
+ 8002822: 697b ldr r3, [r7, #20]
+ 8002824: f423 4370 bic.w r3, r3, #61440 ; 0xf000
+ 8002828: 617b str r3, [r7, #20]
+ tmpccmr1 |= (TIM_ICFilter << 12U);
+ 800282a: 687b ldr r3, [r7, #4]
+ 800282c: 031b lsls r3, r3, #12
+ 800282e: 697a ldr r2, [r7, #20]
+ 8002830: 4313 orrs r3, r2
+ 8002832: 617b str r3, [r7, #20]
+
+ /* Select the Polarity and set the CC2E Bit */
+ tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP);
+ 8002834: 693b ldr r3, [r7, #16]
+ 8002836: f023 03a0 bic.w r3, r3, #160 ; 0xa0
+ 800283a: 613b str r3, [r7, #16]
+ tmpccer |= (TIM_ICPolarity << 4U);
+ 800283c: 68bb ldr r3, [r7, #8]
+ 800283e: 011b lsls r3, r3, #4
+ 8002840: 693a ldr r2, [r7, #16]
+ 8002842: 4313 orrs r3, r2
+ 8002844: 613b str r3, [r7, #16]
+
+ /* Write to TIMx CCMR1 and CCER registers */
+ TIMx->CCMR1 = tmpccmr1 ;
+ 8002846: 68fb ldr r3, [r7, #12]
+ 8002848: 697a ldr r2, [r7, #20]
+ 800284a: 619a str r2, [r3, #24]
+ TIMx->CCER = tmpccer;
+ 800284c: 68fb ldr r3, [r7, #12]
+ 800284e: 693a ldr r2, [r7, #16]
+ 8002850: 621a str r2, [r3, #32]
+}
+ 8002852: bf00 nop
+ 8002854: 371c adds r7, #28
+ 8002856: 46bd mov sp, r7
+ 8002858: f85d 7b04 ldr.w r7, [sp], #4
+ 800285c: 4770 bx lr
+
+0800285e <TIM_ITRx_SetConfig>:
+ * @arg TIM_TS_TI2FP2: Filtered Timer Input 2
+ * @arg TIM_TS_ETRF: External Trigger input
+ * @retval None
+ */
+static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource)
+{
+ 800285e: b480 push {r7}
+ 8002860: b085 sub sp, #20
+ 8002862: af00 add r7, sp, #0
+ 8002864: 6078 str r0, [r7, #4]
+ 8002866: 6039 str r1, [r7, #0]
+ uint32_t tmpsmcr;
+
+ /* Get the TIMx SMCR register value */
+ tmpsmcr = TIMx->SMCR;
+ 8002868: 687b ldr r3, [r7, #4]
+ 800286a: 689b ldr r3, [r3, #8]
+ 800286c: 60fb str r3, [r7, #12]
+ /* Reset the TS Bits */
+ tmpsmcr &= ~TIM_SMCR_TS;
+ 800286e: 68fb ldr r3, [r7, #12]
+ 8002870: f023 0370 bic.w r3, r3, #112 ; 0x70
+ 8002874: 60fb str r3, [r7, #12]
+ /* Set the Input Trigger source and the slave mode*/
+ tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1);
+ 8002876: 683a ldr r2, [r7, #0]
+ 8002878: 68fb ldr r3, [r7, #12]
+ 800287a: 4313 orrs r3, r2
+ 800287c: f043 0307 orr.w r3, r3, #7
+ 8002880: 60fb str r3, [r7, #12]
+ /* Write to TIMx SMCR */
+ TIMx->SMCR = tmpsmcr;
+ 8002882: 687b ldr r3, [r7, #4]
+ 8002884: 68fa ldr r2, [r7, #12]
+ 8002886: 609a str r2, [r3, #8]
+}
+ 8002888: bf00 nop
+ 800288a: 3714 adds r7, #20
+ 800288c: 46bd mov sp, r7
+ 800288e: f85d 7b04 ldr.w r7, [sp], #4
+ 8002892: 4770 bx lr
+
+08002894 <TIM_ETR_SetConfig>:
+ * This parameter must be a value between 0x00 and 0x0F
+ * @retval None
+ */
+void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler,
+ uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter)
+{
+ 8002894: b480 push {r7}
+ 8002896: b087 sub sp, #28
+ 8002898: af00 add r7, sp, #0
+ 800289a: 60f8 str r0, [r7, #12]
+ 800289c: 60b9 str r1, [r7, #8]
+ 800289e: 607a str r2, [r7, #4]
+ 80028a0: 603b str r3, [r7, #0]
+ uint32_t tmpsmcr;
+
+ tmpsmcr = TIMx->SMCR;
+ 80028a2: 68fb ldr r3, [r7, #12]
+ 80028a4: 689b ldr r3, [r3, #8]
+ 80028a6: 617b str r3, [r7, #20]
+
+ /* Reset the ETR Bits */
+ tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
+ 80028a8: 697b ldr r3, [r7, #20]
+ 80028aa: f423 437f bic.w r3, r3, #65280 ; 0xff00
+ 80028ae: 617b str r3, [r7, #20]
+
+ /* Set the Prescaler, the Filter value and the Polarity */
+ tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U)));
+ 80028b0: 683b ldr r3, [r7, #0]
+ 80028b2: 021a lsls r2, r3, #8
+ 80028b4: 687b ldr r3, [r7, #4]
+ 80028b6: 431a orrs r2, r3
+ 80028b8: 68bb ldr r3, [r7, #8]
+ 80028ba: 4313 orrs r3, r2
+ 80028bc: 697a ldr r2, [r7, #20]
+ 80028be: 4313 orrs r3, r2
+ 80028c0: 617b str r3, [r7, #20]
+
+ /* Write to TIMx SMCR */
+ TIMx->SMCR = tmpsmcr;
+ 80028c2: 68fb ldr r3, [r7, #12]
+ 80028c4: 697a ldr r2, [r7, #20]
+ 80028c6: 609a str r2, [r3, #8]
+}
+ 80028c8: bf00 nop
+ 80028ca: 371c adds r7, #28
+ 80028cc: 46bd mov sp, r7
+ 80028ce: f85d 7b04 ldr.w r7, [sp], #4
+ 80028d2: 4770 bx lr
+
+080028d4 <HAL_TIMEx_MasterConfigSynchronization>:
+ * mode.
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
+ TIM_MasterConfigTypeDef *sMasterConfig)
+{
+ 80028d4: b480 push {r7}
+ 80028d6: b085 sub sp, #20
+ 80028d8: af00 add r7, sp, #0
+ 80028da: 6078 str r0, [r7, #4]
+ 80028dc: 6039 str r1, [r7, #0]
+ assert_param(IS_TIM_SYNCHRO_INSTANCE(htim->Instance));
+ assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
+ assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
+
+ /* Check input state */
+ __HAL_LOCK(htim);
+ 80028de: 687b ldr r3, [r7, #4]
+ 80028e0: f893 303c ldrb.w r3, [r3, #60] ; 0x3c
+ 80028e4: 2b01 cmp r3, #1
+ 80028e6: d101 bne.n 80028ec <HAL_TIMEx_MasterConfigSynchronization+0x18>
+ 80028e8: 2302 movs r3, #2
+ 80028ea: e045 b.n 8002978 <HAL_TIMEx_MasterConfigSynchronization+0xa4>
+ 80028ec: 687b ldr r3, [r7, #4]
+ 80028ee: 2201 movs r2, #1
+ 80028f0: f883 203c strb.w r2, [r3, #60] ; 0x3c
+
+ /* Change the handler state */
+ htim->State = HAL_TIM_STATE_BUSY;
+ 80028f4: 687b ldr r3, [r7, #4]
+ 80028f6: 2202 movs r2, #2
+ 80028f8: f883 203d strb.w r2, [r3, #61] ; 0x3d
+
+ /* Get the TIMx CR2 register value */
+ tmpcr2 = htim->Instance->CR2;
+ 80028fc: 687b ldr r3, [r7, #4]
+ 80028fe: 681b ldr r3, [r3, #0]
+ 8002900: 685b ldr r3, [r3, #4]
+ 8002902: 60fb str r3, [r7, #12]
+
+ /* Get the TIMx SMCR register value */
+ tmpsmcr = htim->Instance->SMCR;
+ 8002904: 687b ldr r3, [r7, #4]
+ 8002906: 681b ldr r3, [r3, #0]
+ 8002908: 689b ldr r3, [r3, #8]
+ 800290a: 60bb str r3, [r7, #8]
+
+ /* If the timer supports ADC synchronization through TRGO2, set the master mode selection 2 */
+ if (IS_TIM_TRGO2_INSTANCE(htim->Instance))
+ 800290c: 687b ldr r3, [r7, #4]
+ 800290e: 681b ldr r3, [r3, #0]
+ 8002910: 4a1c ldr r2, [pc, #112] ; (8002984 <HAL_TIMEx_MasterConfigSynchronization+0xb0>)
+ 8002912: 4293 cmp r3, r2
+ 8002914: d004 beq.n 8002920 <HAL_TIMEx_MasterConfigSynchronization+0x4c>
+ 8002916: 687b ldr r3, [r7, #4]
+ 8002918: 681b ldr r3, [r3, #0]
+ 800291a: 4a1b ldr r2, [pc, #108] ; (8002988 <HAL_TIMEx_MasterConfigSynchronization+0xb4>)
+ 800291c: 4293 cmp r3, r2
+ 800291e: d108 bne.n 8002932 <HAL_TIMEx_MasterConfigSynchronization+0x5e>
+ {
+ /* Check the parameters */
+ assert_param(IS_TIM_TRGO2_SOURCE(sMasterConfig->MasterOutputTrigger2));
+
+ /* Clear the MMS2 bits */
+ tmpcr2 &= ~TIM_CR2_MMS2;
+ 8002920: 68fb ldr r3, [r7, #12]
+ 8002922: f423 0370 bic.w r3, r3, #15728640 ; 0xf00000
+ 8002926: 60fb str r3, [r7, #12]
+ /* Select the TRGO2 source*/
+ tmpcr2 |= sMasterConfig->MasterOutputTrigger2;
+ 8002928: 683b ldr r3, [r7, #0]
+ 800292a: 685b ldr r3, [r3, #4]
+ 800292c: 68fa ldr r2, [r7, #12]
+ 800292e: 4313 orrs r3, r2
+ 8002930: 60fb str r3, [r7, #12]
+ }
+
+ /* Reset the MMS Bits */
+ tmpcr2 &= ~TIM_CR2_MMS;
+ 8002932: 68fb ldr r3, [r7, #12]
+ 8002934: f023 0370 bic.w r3, r3, #112 ; 0x70
+ 8002938: 60fb str r3, [r7, #12]
+ /* Select the TRGO source */
+ tmpcr2 |= sMasterConfig->MasterOutputTrigger;
+ 800293a: 683b ldr r3, [r7, #0]
+ 800293c: 681b ldr r3, [r3, #0]
+ 800293e: 68fa ldr r2, [r7, #12]
+ 8002940: 4313 orrs r3, r2
+ 8002942: 60fb str r3, [r7, #12]
+
+ /* Reset the MSM Bit */
+ tmpsmcr &= ~TIM_SMCR_MSM;
+ 8002944: 68bb ldr r3, [r7, #8]
+ 8002946: f023 0380 bic.w r3, r3, #128 ; 0x80
+ 800294a: 60bb str r3, [r7, #8]
+ /* Set master mode */
+ tmpsmcr |= sMasterConfig->MasterSlaveMode;
+ 800294c: 683b ldr r3, [r7, #0]
+ 800294e: 689b ldr r3, [r3, #8]
+ 8002950: 68ba ldr r2, [r7, #8]
+ 8002952: 4313 orrs r3, r2
+ 8002954: 60bb str r3, [r7, #8]
+
+ /* Update TIMx CR2 */
+ htim->Instance->CR2 = tmpcr2;
+ 8002956: 687b ldr r3, [r7, #4]
+ 8002958: 681b ldr r3, [r3, #0]
+ 800295a: 68fa ldr r2, [r7, #12]
+ 800295c: 605a str r2, [r3, #4]
+
+ /* Update TIMx SMCR */
+ htim->Instance->SMCR = tmpsmcr;
+ 800295e: 687b ldr r3, [r7, #4]
+ 8002960: 681b ldr r3, [r3, #0]
+ 8002962: 68ba ldr r2, [r7, #8]
+ 8002964: 609a str r2, [r3, #8]
+
+ /* Change the htim state */
+ htim->State = HAL_TIM_STATE_READY;
+ 8002966: 687b ldr r3, [r7, #4]
+ 8002968: 2201 movs r2, #1
+ 800296a: f883 203d strb.w r2, [r3, #61] ; 0x3d
+
+ __HAL_UNLOCK(htim);
+ 800296e: 687b ldr r3, [r7, #4]
+ 8002970: 2200 movs r2, #0
+ 8002972: f883 203c strb.w r2, [r3, #60] ; 0x3c
+
+ return HAL_OK;
+ 8002976: 2300 movs r3, #0
+}
+ 8002978: 4618 mov r0, r3
+ 800297a: 3714 adds r7, #20
+ 800297c: 46bd mov sp, r7
+ 800297e: f85d 7b04 ldr.w r7, [sp], #4
+ 8002982: 4770 bx lr
+ 8002984: 40010000 .word 0x40010000
+ 8002988: 40010400 .word 0x40010400
+
+0800298c <HAL_TIMEx_CommutCallback>:
+ * @brief Hall commutation changed callback in non-blocking mode
+ * @param htim TIM handle
+ * @retval None
+ */
+__weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim)
+{
+ 800298c: b480 push {r7}
+ 800298e: b083 sub sp, #12
+ 8002990: af00 add r7, sp, #0
+ 8002992: 6078 str r0, [r7, #4]
+ UNUSED(htim);
+
+ /* NOTE : This function should not be modified, when the callback is needed,
+ the HAL_TIMEx_CommutCallback could be implemented in the user file
+ */
+}
+ 8002994: bf00 nop
+ 8002996: 370c adds r7, #12
+ 8002998: 46bd mov sp, r7
+ 800299a: f85d 7b04 ldr.w r7, [sp], #4
+ 800299e: 4770 bx lr
+
+080029a0 <HAL_TIMEx_BreakCallback>:
+ * @brief Hall Break detection callback in non-blocking mode
+ * @param htim TIM handle
+ * @retval None
+ */
+__weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
+{
+ 80029a0: b480 push {r7}
+ 80029a2: b083 sub sp, #12
+ 80029a4: af00 add r7, sp, #0
+ 80029a6: 6078 str r0, [r7, #4]
+ UNUSED(htim);
+
+ /* NOTE : This function should not be modified, when the callback is needed,
+ the HAL_TIMEx_BreakCallback could be implemented in the user file
+ */
+}
+ 80029a8: bf00 nop
+ 80029aa: 370c adds r7, #12
+ 80029ac: 46bd mov sp, r7
+ 80029ae: f85d 7b04 ldr.w r7, [sp], #4
+ 80029b2: 4770 bx lr
+
+080029b4 <HAL_TIMEx_Break2Callback>:
+ * @brief Hall Break2 detection callback in non blocking mode
+ * @param htim: TIM handle
+ * @retval None
+ */
+__weak void HAL_TIMEx_Break2Callback(TIM_HandleTypeDef *htim)
+{
+ 80029b4: b480 push {r7}
+ 80029b6: b083 sub sp, #12
+ 80029b8: af00 add r7, sp, #0
+ 80029ba: 6078 str r0, [r7, #4]
+ UNUSED(htim);
+
+ /* NOTE : This function Should not be modified, when the callback is needed,
+ the HAL_TIMEx_Break2Callback could be implemented in the user file
+ */
+}
+ 80029bc: bf00 nop
+ 80029be: 370c adds r7, #12
+ 80029c0: 46bd mov sp, r7
+ 80029c2: f85d 7b04 ldr.w r7, [sp], #4
+ 80029c6: 4770 bx lr
+
+080029c8 <HAL_UART_Init>:
* parameters in the UART_InitTypeDef and initialize the associated handle.
* @param huart UART handle.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
{
- 80020a0: b580 push {r7, lr}
- 80020a2: b082 sub sp, #8
- 80020a4: af00 add r7, sp, #0
- 80020a6: 6078 str r0, [r7, #4]
+ 80029c8: b580 push {r7, lr}
+ 80029ca: b082 sub sp, #8
+ 80029cc: af00 add r7, sp, #0
+ 80029ce: 6078 str r0, [r7, #4]
/* Check the UART handle allocation */
if (huart == NULL)
- 80020a8: 687b ldr r3, [r7, #4]
- 80020aa: 2b00 cmp r3, #0
- 80020ac: d101 bne.n 80020b2 <HAL_UART_Init+0x12>
+ 80029d0: 687b ldr r3, [r7, #4]
+ 80029d2: 2b00 cmp r3, #0
+ 80029d4: d101 bne.n 80029da <HAL_UART_Init+0x12>
{
return HAL_ERROR;
- 80020ae: 2301 movs r3, #1
- 80020b0: e040 b.n 8002134 <HAL_UART_Init+0x94>
+ 80029d6: 2301 movs r3, #1
+ 80029d8: e040 b.n 8002a5c <HAL_UART_Init+0x94>
{
/* Check the parameters */
assert_param(IS_UART_INSTANCE(huart->Instance));
}
if (huart->gState == HAL_UART_STATE_RESET)
- 80020b2: 687b ldr r3, [r7, #4]
- 80020b4: 6f5b ldr r3, [r3, #116] ; 0x74
- 80020b6: 2b00 cmp r3, #0
- 80020b8: d106 bne.n 80020c8 <HAL_UART_Init+0x28>
+ 80029da: 687b ldr r3, [r7, #4]
+ 80029dc: 6f5b ldr r3, [r3, #116] ; 0x74
+ 80029de: 2b00 cmp r3, #0
+ 80029e0: d106 bne.n 80029f0 <HAL_UART_Init+0x28>
{
/* Allocate lock resource and initialize it */
huart->Lock = HAL_UNLOCKED;
- 80020ba: 687b ldr r3, [r7, #4]
- 80020bc: 2200 movs r2, #0
- 80020be: f883 2070 strb.w r2, [r3, #112] ; 0x70
+ 80029e2: 687b ldr r3, [r7, #4]
+ 80029e4: 2200 movs r2, #0
+ 80029e6: f883 2070 strb.w r2, [r3, #112] ; 0x70
/* Init the low level hardware */
huart->MspInitCallback(huart);
#else
/* Init the low level hardware : GPIO, CLOCK */
HAL_UART_MspInit(huart);
- 80020c2: 6878 ldr r0, [r7, #4]
- 80020c4: f7fe fb88 bl 80007d8 <HAL_UART_MspInit>
+ 80029ea: 6878 ldr r0, [r7, #4]
+ 80029ec: f7fd ff7e bl 80008ec <HAL_UART_MspInit>
#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
}
huart->gState = HAL_UART_STATE_BUSY;
- 80020c8: 687b ldr r3, [r7, #4]
- 80020ca: 2224 movs r2, #36 ; 0x24
- 80020cc: 675a str r2, [r3, #116] ; 0x74
+ 80029f0: 687b ldr r3, [r7, #4]
+ 80029f2: 2224 movs r2, #36 ; 0x24
+ 80029f4: 675a str r2, [r3, #116] ; 0x74
/* Disable the Peripheral */
__HAL_UART_DISABLE(huart);
- 80020ce: 687b ldr r3, [r7, #4]
- 80020d0: 681b ldr r3, [r3, #0]
- 80020d2: 681a ldr r2, [r3, #0]
- 80020d4: 687b ldr r3, [r7, #4]
- 80020d6: 681b ldr r3, [r3, #0]
- 80020d8: f022 0201 bic.w r2, r2, #1
- 80020dc: 601a str r2, [r3, #0]
+ 80029f6: 687b ldr r3, [r7, #4]
+ 80029f8: 681b ldr r3, [r3, #0]
+ 80029fa: 681a ldr r2, [r3, #0]
+ 80029fc: 687b ldr r3, [r7, #4]
+ 80029fe: 681b ldr r3, [r3, #0]
+ 8002a00: f022 0201 bic.w r2, r2, #1
+ 8002a04: 601a str r2, [r3, #0]
/* Set the UART Communication parameters */
if (UART_SetConfig(huart) == HAL_ERROR)
- 80020de: 6878 ldr r0, [r7, #4]
- 80020e0: f000 f8be bl 8002260 <UART_SetConfig>
- 80020e4: 4603 mov r3, r0
- 80020e6: 2b01 cmp r3, #1
- 80020e8: d101 bne.n 80020ee <HAL_UART_Init+0x4e>
+ 8002a06: 6878 ldr r0, [r7, #4]
+ 8002a08: f000 fa86 bl 8002f18 <UART_SetConfig>
+ 8002a0c: 4603 mov r3, r0
+ 8002a0e: 2b01 cmp r3, #1
+ 8002a10: d101 bne.n 8002a16 <HAL_UART_Init+0x4e>
{
return HAL_ERROR;
- 80020ea: 2301 movs r3, #1
- 80020ec: e022 b.n 8002134 <HAL_UART_Init+0x94>
+ 8002a12: 2301 movs r3, #1
+ 8002a14: e022 b.n 8002a5c <HAL_UART_Init+0x94>
}
if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
- 80020ee: 687b ldr r3, [r7, #4]
- 80020f0: 6a5b ldr r3, [r3, #36] ; 0x24
- 80020f2: 2b00 cmp r3, #0
- 80020f4: d002 beq.n 80020fc <HAL_UART_Init+0x5c>
+ 8002a16: 687b ldr r3, [r7, #4]
+ 8002a18: 6a5b ldr r3, [r3, #36] ; 0x24
+ 8002a1a: 2b00 cmp r3, #0
+ 8002a1c: d002 beq.n 8002a24 <HAL_UART_Init+0x5c>
{
UART_AdvFeatureConfig(huart);
- 80020f6: 6878 ldr r0, [r7, #4]
- 80020f8: f000 fb56 bl 80027a8 <UART_AdvFeatureConfig>
+ 8002a1e: 6878 ldr r0, [r7, #4]
+ 8002a20: f000 fd1e bl 8003460 <UART_AdvFeatureConfig>
}
/* In asynchronous mode, the following bits must be kept cleared:
- LINEN and CLKEN bits in the USART_CR2 register,
- SCEN, HDSEL and IREN bits in the USART_CR3 register.*/
CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
- 80020fc: 687b ldr r3, [r7, #4]
- 80020fe: 681b ldr r3, [r3, #0]
- 8002100: 685a ldr r2, [r3, #4]
- 8002102: 687b ldr r3, [r7, #4]
- 8002104: 681b ldr r3, [r3, #0]
- 8002106: f422 4290 bic.w r2, r2, #18432 ; 0x4800
- 800210a: 605a str r2, [r3, #4]
+ 8002a24: 687b ldr r3, [r7, #4]
+ 8002a26: 681b ldr r3, [r3, #0]
+ 8002a28: 685a ldr r2, [r3, #4]
+ 8002a2a: 687b ldr r3, [r7, #4]
+ 8002a2c: 681b ldr r3, [r3, #0]
+ 8002a2e: f422 4290 bic.w r2, r2, #18432 ; 0x4800
+ 8002a32: 605a str r2, [r3, #4]
CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
- 800210c: 687b ldr r3, [r7, #4]
- 800210e: 681b ldr r3, [r3, #0]
- 8002110: 689a ldr r2, [r3, #8]
- 8002112: 687b ldr r3, [r7, #4]
- 8002114: 681b ldr r3, [r3, #0]
- 8002116: f022 022a bic.w r2, r2, #42 ; 0x2a
- 800211a: 609a str r2, [r3, #8]
+ 8002a34: 687b ldr r3, [r7, #4]
+ 8002a36: 681b ldr r3, [r3, #0]
+ 8002a38: 689a ldr r2, [r3, #8]
+ 8002a3a: 687b ldr r3, [r7, #4]
+ 8002a3c: 681b ldr r3, [r3, #0]
+ 8002a3e: f022 022a bic.w r2, r2, #42 ; 0x2a
+ 8002a42: 609a str r2, [r3, #8]
/* Enable the Peripheral */
__HAL_UART_ENABLE(huart);
- 800211c: 687b ldr r3, [r7, #4]
- 800211e: 681b ldr r3, [r3, #0]
- 8002120: 681a ldr r2, [r3, #0]
- 8002122: 687b ldr r3, [r7, #4]
- 8002124: 681b ldr r3, [r3, #0]
- 8002126: f042 0201 orr.w r2, r2, #1
- 800212a: 601a str r2, [r3, #0]
+ 8002a44: 687b ldr r3, [r7, #4]
+ 8002a46: 681b ldr r3, [r3, #0]
+ 8002a48: 681a ldr r2, [r3, #0]
+ 8002a4a: 687b ldr r3, [r7, #4]
+ 8002a4c: 681b ldr r3, [r3, #0]
+ 8002a4e: f042 0201 orr.w r2, r2, #1
+ 8002a52: 601a str r2, [r3, #0]
/* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
return (UART_CheckIdleState(huart));
- 800212c: 6878 ldr r0, [r7, #4]
- 800212e: f000 fbdd bl 80028ec <UART_CheckIdleState>
- 8002132: 4603 mov r3, r0
+ 8002a54: 6878 ldr r0, [r7, #4]
+ 8002a56: f000 fda5 bl 80035a4 <UART_CheckIdleState>
+ 8002a5a: 4603 mov r3, r0
}
- 8002134: 4618 mov r0, r3
- 8002136: 3708 adds r7, #8
- 8002138: 46bd mov sp, r7
- 800213a: bd80 pop {r7, pc}
+ 8002a5c: 4618 mov r0, r3
+ 8002a5e: 3708 adds r7, #8
+ 8002a60: 46bd mov sp, r7
+ 8002a62: bd80 pop {r7, pc}
-0800213c <HAL_UART_Transmit>:
+08002a64 <HAL_UART_Transmit>:
* @param Size Amount of data to be sent.
* @param Timeout Timeout duration.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout)
{
- 800213c: b580 push {r7, lr}
- 800213e: b08a sub sp, #40 ; 0x28
- 8002140: af02 add r7, sp, #8
- 8002142: 60f8 str r0, [r7, #12]
- 8002144: 60b9 str r1, [r7, #8]
- 8002146: 603b str r3, [r7, #0]
- 8002148: 4613 mov r3, r2
- 800214a: 80fb strh r3, [r7, #6]
+ 8002a64: b580 push {r7, lr}
+ 8002a66: b08a sub sp, #40 ; 0x28
+ 8002a68: af02 add r7, sp, #8
+ 8002a6a: 60f8 str r0, [r7, #12]
+ 8002a6c: 60b9 str r1, [r7, #8]
+ 8002a6e: 603b str r3, [r7, #0]
+ 8002a70: 4613 mov r3, r2
+ 8002a72: 80fb strh r3, [r7, #6]
uint8_t *pdata8bits;
uint16_t *pdata16bits;
uint32_t tickstart;
/* Check that a Tx process is not already ongoing */
if (huart->gState == HAL_UART_STATE_READY)
- 800214c: 68fb ldr r3, [r7, #12]
- 800214e: 6f5b ldr r3, [r3, #116] ; 0x74
- 8002150: 2b20 cmp r3, #32
- 8002152: d17f bne.n 8002254 <HAL_UART_Transmit+0x118>
+ 8002a74: 68fb ldr r3, [r7, #12]
+ 8002a76: 6f5b ldr r3, [r3, #116] ; 0x74
+ 8002a78: 2b20 cmp r3, #32
+ 8002a7a: d17f bne.n 8002b7c <HAL_UART_Transmit+0x118>
{
if ((pData == NULL) || (Size == 0U))
- 8002154: 68bb ldr r3, [r7, #8]
- 8002156: 2b00 cmp r3, #0
- 8002158: d002 beq.n 8002160 <HAL_UART_Transmit+0x24>
- 800215a: 88fb ldrh r3, [r7, #6]
- 800215c: 2b00 cmp r3, #0
- 800215e: d101 bne.n 8002164 <HAL_UART_Transmit+0x28>
+ 8002a7c: 68bb ldr r3, [r7, #8]
+ 8002a7e: 2b00 cmp r3, #0
+ 8002a80: d002 beq.n 8002a88 <HAL_UART_Transmit+0x24>
+ 8002a82: 88fb ldrh r3, [r7, #6]
+ 8002a84: 2b00 cmp r3, #0
+ 8002a86: d101 bne.n 8002a8c <HAL_UART_Transmit+0x28>
{
return HAL_ERROR;
- 8002160: 2301 movs r3, #1
- 8002162: e078 b.n 8002256 <HAL_UART_Transmit+0x11a>
+ 8002a88: 2301 movs r3, #1
+ 8002a8a: e078 b.n 8002b7e <HAL_UART_Transmit+0x11a>
}
/* Process Locked */
__HAL_LOCK(huart);
- 8002164: 68fb ldr r3, [r7, #12]
- 8002166: f893 3070 ldrb.w r3, [r3, #112] ; 0x70
- 800216a: 2b01 cmp r3, #1
- 800216c: d101 bne.n 8002172 <HAL_UART_Transmit+0x36>
- 800216e: 2302 movs r3, #2
- 8002170: e071 b.n 8002256 <HAL_UART_Transmit+0x11a>
- 8002172: 68fb ldr r3, [r7, #12]
- 8002174: 2201 movs r2, #1
- 8002176: f883 2070 strb.w r2, [r3, #112] ; 0x70
+ 8002a8c: 68fb ldr r3, [r7, #12]
+ 8002a8e: f893 3070 ldrb.w r3, [r3, #112] ; 0x70
+ 8002a92: 2b01 cmp r3, #1
+ 8002a94: d101 bne.n 8002a9a <HAL_UART_Transmit+0x36>
+ 8002a96: 2302 movs r3, #2
+ 8002a98: e071 b.n 8002b7e <HAL_UART_Transmit+0x11a>
+ 8002a9a: 68fb ldr r3, [r7, #12]
+ 8002a9c: 2201 movs r2, #1
+ 8002a9e: f883 2070 strb.w r2, [r3, #112] ; 0x70
huart->ErrorCode = HAL_UART_ERROR_NONE;
- 800217a: 68fb ldr r3, [r7, #12]
- 800217c: 2200 movs r2, #0
- 800217e: 67da str r2, [r3, #124] ; 0x7c
+ 8002aa2: 68fb ldr r3, [r7, #12]
+ 8002aa4: 2200 movs r2, #0
+ 8002aa6: 67da str r2, [r3, #124] ; 0x7c
huart->gState = HAL_UART_STATE_BUSY_TX;
- 8002180: 68fb ldr r3, [r7, #12]
- 8002182: 2221 movs r2, #33 ; 0x21
- 8002184: 675a str r2, [r3, #116] ; 0x74
+ 8002aa8: 68fb ldr r3, [r7, #12]
+ 8002aaa: 2221 movs r2, #33 ; 0x21
+ 8002aac: 675a str r2, [r3, #116] ; 0x74
/* Init tickstart for timeout managment*/
tickstart = HAL_GetTick();
- 8002186: f7fe fc67 bl 8000a58 <HAL_GetTick>
- 800218a: 6178 str r0, [r7, #20]
+ 8002aae: f7fe f85b bl 8000b68 <HAL_GetTick>
+ 8002ab2: 6178 str r0, [r7, #20]
huart->TxXferSize = Size;
- 800218c: 68fb ldr r3, [r7, #12]
- 800218e: 88fa ldrh r2, [r7, #6]
- 8002190: f8a3 2050 strh.w r2, [r3, #80] ; 0x50
+ 8002ab4: 68fb ldr r3, [r7, #12]
+ 8002ab6: 88fa ldrh r2, [r7, #6]
+ 8002ab8: f8a3 2050 strh.w r2, [r3, #80] ; 0x50
huart->TxXferCount = Size;
- 8002194: 68fb ldr r3, [r7, #12]
- 8002196: 88fa ldrh r2, [r7, #6]
- 8002198: f8a3 2052 strh.w r2, [r3, #82] ; 0x52
+ 8002abc: 68fb ldr r3, [r7, #12]
+ 8002abe: 88fa ldrh r2, [r7, #6]
+ 8002ac0: f8a3 2052 strh.w r2, [r3, #82] ; 0x52
/* In case of 9bits/No Parity transfer, pData needs to be handled as a uint16_t pointer */
if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
- 800219c: 68fb ldr r3, [r7, #12]
- 800219e: 689b ldr r3, [r3, #8]
- 80021a0: f5b3 5f80 cmp.w r3, #4096 ; 0x1000
- 80021a4: d108 bne.n 80021b8 <HAL_UART_Transmit+0x7c>
- 80021a6: 68fb ldr r3, [r7, #12]
- 80021a8: 691b ldr r3, [r3, #16]
- 80021aa: 2b00 cmp r3, #0
- 80021ac: d104 bne.n 80021b8 <HAL_UART_Transmit+0x7c>
+ 8002ac4: 68fb ldr r3, [r7, #12]
+ 8002ac6: 689b ldr r3, [r3, #8]
+ 8002ac8: f5b3 5f80 cmp.w r3, #4096 ; 0x1000
+ 8002acc: d108 bne.n 8002ae0 <HAL_UART_Transmit+0x7c>
+ 8002ace: 68fb ldr r3, [r7, #12]
+ 8002ad0: 691b ldr r3, [r3, #16]
+ 8002ad2: 2b00 cmp r3, #0
+ 8002ad4: d104 bne.n 8002ae0 <HAL_UART_Transmit+0x7c>
{
pdata8bits = NULL;
- 80021ae: 2300 movs r3, #0
- 80021b0: 61fb str r3, [r7, #28]
+ 8002ad6: 2300 movs r3, #0
+ 8002ad8: 61fb str r3, [r7, #28]
pdata16bits = (uint16_t *) pData;
- 80021b2: 68bb ldr r3, [r7, #8]
- 80021b4: 61bb str r3, [r7, #24]
- 80021b6: e003 b.n 80021c0 <HAL_UART_Transmit+0x84>
+ 8002ada: 68bb ldr r3, [r7, #8]
+ 8002adc: 61bb str r3, [r7, #24]
+ 8002ade: e003 b.n 8002ae8 <HAL_UART_Transmit+0x84>
}
else
{
pdata8bits = pData;
- 80021b8: 68bb ldr r3, [r7, #8]
- 80021ba: 61fb str r3, [r7, #28]
+ 8002ae0: 68bb ldr r3, [r7, #8]
+ 8002ae2: 61fb str r3, [r7, #28]
pdata16bits = NULL;
- 80021bc: 2300 movs r3, #0
- 80021be: 61bb str r3, [r7, #24]
+ 8002ae4: 2300 movs r3, #0
+ 8002ae6: 61bb str r3, [r7, #24]
}
while (huart->TxXferCount > 0U)
- 80021c0: e02c b.n 800221c <HAL_UART_Transmit+0xe0>
+ 8002ae8: e02c b.n 8002b44 <HAL_UART_Transmit+0xe0>
{
if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
- 80021c2: 683b ldr r3, [r7, #0]
- 80021c4: 9300 str r3, [sp, #0]
- 80021c6: 697b ldr r3, [r7, #20]
- 80021c8: 2200 movs r2, #0
- 80021ca: 2180 movs r1, #128 ; 0x80
- 80021cc: 68f8 ldr r0, [r7, #12]
- 80021ce: f000 fbbc bl 800294a <UART_WaitOnFlagUntilTimeout>
- 80021d2: 4603 mov r3, r0
- 80021d4: 2b00 cmp r3, #0
- 80021d6: d001 beq.n 80021dc <HAL_UART_Transmit+0xa0>
+ 8002aea: 683b ldr r3, [r7, #0]
+ 8002aec: 9300 str r3, [sp, #0]
+ 8002aee: 697b ldr r3, [r7, #20]
+ 8002af0: 2200 movs r2, #0
+ 8002af2: 2180 movs r1, #128 ; 0x80
+ 8002af4: 68f8 ldr r0, [r7, #12]
+ 8002af6: f000 fd84 bl 8003602 <UART_WaitOnFlagUntilTimeout>
+ 8002afa: 4603 mov r3, r0
+ 8002afc: 2b00 cmp r3, #0
+ 8002afe: d001 beq.n 8002b04 <HAL_UART_Transmit+0xa0>
{
return HAL_TIMEOUT;
- 80021d8: 2303 movs r3, #3
- 80021da: e03c b.n 8002256 <HAL_UART_Transmit+0x11a>
+ 8002b00: 2303 movs r3, #3
+ 8002b02: e03c b.n 8002b7e <HAL_UART_Transmit+0x11a>
}
if (pdata8bits == NULL)
- 80021dc: 69fb ldr r3, [r7, #28]
- 80021de: 2b00 cmp r3, #0
- 80021e0: d10b bne.n 80021fa <HAL_UART_Transmit+0xbe>
+ 8002b04: 69fb ldr r3, [r7, #28]
+ 8002b06: 2b00 cmp r3, #0
+ 8002b08: d10b bne.n 8002b22 <HAL_UART_Transmit+0xbe>
{
huart->Instance->TDR = (uint16_t)(*pdata16bits & 0x01FFU);
- 80021e2: 69bb ldr r3, [r7, #24]
- 80021e4: 881b ldrh r3, [r3, #0]
- 80021e6: 461a mov r2, r3
- 80021e8: 68fb ldr r3, [r7, #12]
- 80021ea: 681b ldr r3, [r3, #0]
- 80021ec: f3c2 0208 ubfx r2, r2, #0, #9
- 80021f0: 629a str r2, [r3, #40] ; 0x28
+ 8002b0a: 69bb ldr r3, [r7, #24]
+ 8002b0c: 881b ldrh r3, [r3, #0]
+ 8002b0e: 461a mov r2, r3
+ 8002b10: 68fb ldr r3, [r7, #12]
+ 8002b12: 681b ldr r3, [r3, #0]
+ 8002b14: f3c2 0208 ubfx r2, r2, #0, #9
+ 8002b18: 629a str r2, [r3, #40] ; 0x28
pdata16bits++;
- 80021f2: 69bb ldr r3, [r7, #24]
- 80021f4: 3302 adds r3, #2
- 80021f6: 61bb str r3, [r7, #24]
- 80021f8: e007 b.n 800220a <HAL_UART_Transmit+0xce>
+ 8002b1a: 69bb ldr r3, [r7, #24]
+ 8002b1c: 3302 adds r3, #2
+ 8002b1e: 61bb str r3, [r7, #24]
+ 8002b20: e007 b.n 8002b32 <HAL_UART_Transmit+0xce>
}
else
{
huart->Instance->TDR = (uint8_t)(*pdata8bits & 0xFFU);
- 80021fa: 69fb ldr r3, [r7, #28]
- 80021fc: 781a ldrb r2, [r3, #0]
- 80021fe: 68fb ldr r3, [r7, #12]
- 8002200: 681b ldr r3, [r3, #0]
- 8002202: 629a str r2, [r3, #40] ; 0x28
+ 8002b22: 69fb ldr r3, [r7, #28]
+ 8002b24: 781a ldrb r2, [r3, #0]
+ 8002b26: 68fb ldr r3, [r7, #12]
+ 8002b28: 681b ldr r3, [r3, #0]
+ 8002b2a: 629a str r2, [r3, #40] ; 0x28
pdata8bits++;
- 8002204: 69fb ldr r3, [r7, #28]
- 8002206: 3301 adds r3, #1
- 8002208: 61fb str r3, [r7, #28]
+ 8002b2c: 69fb ldr r3, [r7, #28]
+ 8002b2e: 3301 adds r3, #1
+ 8002b30: 61fb str r3, [r7, #28]
}
huart->TxXferCount--;
- 800220a: 68fb ldr r3, [r7, #12]
- 800220c: f8b3 3052 ldrh.w r3, [r3, #82] ; 0x52
- 8002210: b29b uxth r3, r3
- 8002212: 3b01 subs r3, #1
- 8002214: b29a uxth r2, r3
- 8002216: 68fb ldr r3, [r7, #12]
- 8002218: f8a3 2052 strh.w r2, [r3, #82] ; 0x52
+ 8002b32: 68fb ldr r3, [r7, #12]
+ 8002b34: f8b3 3052 ldrh.w r3, [r3, #82] ; 0x52
+ 8002b38: b29b uxth r3, r3
+ 8002b3a: 3b01 subs r3, #1
+ 8002b3c: b29a uxth r2, r3
+ 8002b3e: 68fb ldr r3, [r7, #12]
+ 8002b40: f8a3 2052 strh.w r2, [r3, #82] ; 0x52
while (huart->TxXferCount > 0U)
- 800221c: 68fb ldr r3, [r7, #12]
- 800221e: f8b3 3052 ldrh.w r3, [r3, #82] ; 0x52
- 8002222: b29b uxth r3, r3
- 8002224: 2b00 cmp r3, #0
- 8002226: d1cc bne.n 80021c2 <HAL_UART_Transmit+0x86>
+ 8002b44: 68fb ldr r3, [r7, #12]
+ 8002b46: f8b3 3052 ldrh.w r3, [r3, #82] ; 0x52
+ 8002b4a: b29b uxth r3, r3
+ 8002b4c: 2b00 cmp r3, #0
+ 8002b4e: d1cc bne.n 8002aea <HAL_UART_Transmit+0x86>
}
if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
- 8002228: 683b ldr r3, [r7, #0]
- 800222a: 9300 str r3, [sp, #0]
- 800222c: 697b ldr r3, [r7, #20]
- 800222e: 2200 movs r2, #0
- 8002230: 2140 movs r1, #64 ; 0x40
- 8002232: 68f8 ldr r0, [r7, #12]
- 8002234: f000 fb89 bl 800294a <UART_WaitOnFlagUntilTimeout>
- 8002238: 4603 mov r3, r0
- 800223a: 2b00 cmp r3, #0
- 800223c: d001 beq.n 8002242 <HAL_UART_Transmit+0x106>
+ 8002b50: 683b ldr r3, [r7, #0]
+ 8002b52: 9300 str r3, [sp, #0]
+ 8002b54: 697b ldr r3, [r7, #20]
+ 8002b56: 2200 movs r2, #0
+ 8002b58: 2140 movs r1, #64 ; 0x40
+ 8002b5a: 68f8 ldr r0, [r7, #12]
+ 8002b5c: f000 fd51 bl 8003602 <UART_WaitOnFlagUntilTimeout>
+ 8002b60: 4603 mov r3, r0
+ 8002b62: 2b00 cmp r3, #0
+ 8002b64: d001 beq.n 8002b6a <HAL_UART_Transmit+0x106>
{
return HAL_TIMEOUT;
- 800223e: 2303 movs r3, #3
- 8002240: e009 b.n 8002256 <HAL_UART_Transmit+0x11a>
+ 8002b66: 2303 movs r3, #3
+ 8002b68: e009 b.n 8002b7e <HAL_UART_Transmit+0x11a>
}
/* At end of Tx process, restore huart->gState to Ready */
huart->gState = HAL_UART_STATE_READY;
- 8002242: 68fb ldr r3, [r7, #12]
- 8002244: 2220 movs r2, #32
- 8002246: 675a str r2, [r3, #116] ; 0x74
+ 8002b6a: 68fb ldr r3, [r7, #12]
+ 8002b6c: 2220 movs r2, #32
+ 8002b6e: 675a str r2, [r3, #116] ; 0x74
/* Process Unlocked */
__HAL_UNLOCK(huart);
- 8002248: 68fb ldr r3, [r7, #12]
- 800224a: 2200 movs r2, #0
- 800224c: f883 2070 strb.w r2, [r3, #112] ; 0x70
+ 8002b70: 68fb ldr r3, [r7, #12]
+ 8002b72: 2200 movs r2, #0
+ 8002b74: f883 2070 strb.w r2, [r3, #112] ; 0x70
return HAL_OK;
- 8002250: 2300 movs r3, #0
- 8002252: e000 b.n 8002256 <HAL_UART_Transmit+0x11a>
+ 8002b78: 2300 movs r3, #0
+ 8002b7a: e000 b.n 8002b7e <HAL_UART_Transmit+0x11a>
}
else
{
return HAL_BUSY;
- 8002254: 2302 movs r3, #2
+ 8002b7c: 2302 movs r3, #2
}
}
- 8002256: 4618 mov r0, r3
- 8002258: 3720 adds r7, #32
- 800225a: 46bd mov sp, r7
- 800225c: bd80 pop {r7, pc}
+ 8002b7e: 4618 mov r0, r3
+ 8002b80: 3720 adds r7, #32
+ 8002b82: 46bd mov sp, r7
+ 8002b84: bd80 pop {r7, pc}
...
-08002260 <UART_SetConfig>:
+08002b88 <HAL_UART_Receive_IT>:
+ * @param pData Pointer to data buffer.
+ * @param Size Amount of data to be received.
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
+{
+ 8002b88: b480 push {r7}
+ 8002b8a: b085 sub sp, #20
+ 8002b8c: af00 add r7, sp, #0
+ 8002b8e: 60f8 str r0, [r7, #12]
+ 8002b90: 60b9 str r1, [r7, #8]
+ 8002b92: 4613 mov r3, r2
+ 8002b94: 80fb strh r3, [r7, #6]
+ /* Check that a Rx process is not already ongoing */
+ if (huart->RxState == HAL_UART_STATE_READY)
+ 8002b96: 68fb ldr r3, [r7, #12]
+ 8002b98: 6f9b ldr r3, [r3, #120] ; 0x78
+ 8002b9a: 2b20 cmp r3, #32
+ 8002b9c: f040 808a bne.w 8002cb4 <HAL_UART_Receive_IT+0x12c>
+ {
+ if ((pData == NULL) || (Size == 0U))
+ 8002ba0: 68bb ldr r3, [r7, #8]
+ 8002ba2: 2b00 cmp r3, #0
+ 8002ba4: d002 beq.n 8002bac <HAL_UART_Receive_IT+0x24>
+ 8002ba6: 88fb ldrh r3, [r7, #6]
+ 8002ba8: 2b00 cmp r3, #0
+ 8002baa: d101 bne.n 8002bb0 <HAL_UART_Receive_IT+0x28>
+ {
+ return HAL_ERROR;
+ 8002bac: 2301 movs r3, #1
+ 8002bae: e082 b.n 8002cb6 <HAL_UART_Receive_IT+0x12e>
+ }
+
+ /* Process Locked */
+ __HAL_LOCK(huart);
+ 8002bb0: 68fb ldr r3, [r7, #12]
+ 8002bb2: f893 3070 ldrb.w r3, [r3, #112] ; 0x70
+ 8002bb6: 2b01 cmp r3, #1
+ 8002bb8: d101 bne.n 8002bbe <HAL_UART_Receive_IT+0x36>
+ 8002bba: 2302 movs r3, #2
+ 8002bbc: e07b b.n 8002cb6 <HAL_UART_Receive_IT+0x12e>
+ 8002bbe: 68fb ldr r3, [r7, #12]
+ 8002bc0: 2201 movs r2, #1
+ 8002bc2: f883 2070 strb.w r2, [r3, #112] ; 0x70
+
+ huart->pRxBuffPtr = pData;
+ 8002bc6: 68fb ldr r3, [r7, #12]
+ 8002bc8: 68ba ldr r2, [r7, #8]
+ 8002bca: 655a str r2, [r3, #84] ; 0x54
+ huart->RxXferSize = Size;
+ 8002bcc: 68fb ldr r3, [r7, #12]
+ 8002bce: 88fa ldrh r2, [r7, #6]
+ 8002bd0: f8a3 2058 strh.w r2, [r3, #88] ; 0x58
+ huart->RxXferCount = Size;
+ 8002bd4: 68fb ldr r3, [r7, #12]
+ 8002bd6: 88fa ldrh r2, [r7, #6]
+ 8002bd8: f8a3 205a strh.w r2, [r3, #90] ; 0x5a
+ huart->RxISR = NULL;
+ 8002bdc: 68fb ldr r3, [r7, #12]
+ 8002bde: 2200 movs r2, #0
+ 8002be0: 661a str r2, [r3, #96] ; 0x60
+
+ /* Computation of UART mask to apply to RDR register */
+ UART_MASK_COMPUTATION(huart);
+ 8002be2: 68fb ldr r3, [r7, #12]
+ 8002be4: 689b ldr r3, [r3, #8]
+ 8002be6: f5b3 5f80 cmp.w r3, #4096 ; 0x1000
+ 8002bea: d10e bne.n 8002c0a <HAL_UART_Receive_IT+0x82>
+ 8002bec: 68fb ldr r3, [r7, #12]
+ 8002bee: 691b ldr r3, [r3, #16]
+ 8002bf0: 2b00 cmp r3, #0
+ 8002bf2: d105 bne.n 8002c00 <HAL_UART_Receive_IT+0x78>
+ 8002bf4: 68fb ldr r3, [r7, #12]
+ 8002bf6: f240 12ff movw r2, #511 ; 0x1ff
+ 8002bfa: f8a3 205c strh.w r2, [r3, #92] ; 0x5c
+ 8002bfe: e02d b.n 8002c5c <HAL_UART_Receive_IT+0xd4>
+ 8002c00: 68fb ldr r3, [r7, #12]
+ 8002c02: 22ff movs r2, #255 ; 0xff
+ 8002c04: f8a3 205c strh.w r2, [r3, #92] ; 0x5c
+ 8002c08: e028 b.n 8002c5c <HAL_UART_Receive_IT+0xd4>
+ 8002c0a: 68fb ldr r3, [r7, #12]
+ 8002c0c: 689b ldr r3, [r3, #8]
+ 8002c0e: 2b00 cmp r3, #0
+ 8002c10: d10d bne.n 8002c2e <HAL_UART_Receive_IT+0xa6>
+ 8002c12: 68fb ldr r3, [r7, #12]
+ 8002c14: 691b ldr r3, [r3, #16]
+ 8002c16: 2b00 cmp r3, #0
+ 8002c18: d104 bne.n 8002c24 <HAL_UART_Receive_IT+0x9c>
+ 8002c1a: 68fb ldr r3, [r7, #12]
+ 8002c1c: 22ff movs r2, #255 ; 0xff
+ 8002c1e: f8a3 205c strh.w r2, [r3, #92] ; 0x5c
+ 8002c22: e01b b.n 8002c5c <HAL_UART_Receive_IT+0xd4>
+ 8002c24: 68fb ldr r3, [r7, #12]
+ 8002c26: 227f movs r2, #127 ; 0x7f
+ 8002c28: f8a3 205c strh.w r2, [r3, #92] ; 0x5c
+ 8002c2c: e016 b.n 8002c5c <HAL_UART_Receive_IT+0xd4>
+ 8002c2e: 68fb ldr r3, [r7, #12]
+ 8002c30: 689b ldr r3, [r3, #8]
+ 8002c32: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000
+ 8002c36: d10d bne.n 8002c54 <HAL_UART_Receive_IT+0xcc>
+ 8002c38: 68fb ldr r3, [r7, #12]
+ 8002c3a: 691b ldr r3, [r3, #16]
+ 8002c3c: 2b00 cmp r3, #0
+ 8002c3e: d104 bne.n 8002c4a <HAL_UART_Receive_IT+0xc2>
+ 8002c40: 68fb ldr r3, [r7, #12]
+ 8002c42: 227f movs r2, #127 ; 0x7f
+ 8002c44: f8a3 205c strh.w r2, [r3, #92] ; 0x5c
+ 8002c48: e008 b.n 8002c5c <HAL_UART_Receive_IT+0xd4>
+ 8002c4a: 68fb ldr r3, [r7, #12]
+ 8002c4c: 223f movs r2, #63 ; 0x3f
+ 8002c4e: f8a3 205c strh.w r2, [r3, #92] ; 0x5c
+ 8002c52: e003 b.n 8002c5c <HAL_UART_Receive_IT+0xd4>
+ 8002c54: 68fb ldr r3, [r7, #12]
+ 8002c56: 2200 movs r2, #0
+ 8002c58: f8a3 205c strh.w r2, [r3, #92] ; 0x5c
+
+ huart->ErrorCode = HAL_UART_ERROR_NONE;
+ 8002c5c: 68fb ldr r3, [r7, #12]
+ 8002c5e: 2200 movs r2, #0
+ 8002c60: 67da str r2, [r3, #124] ; 0x7c
+ huart->RxState = HAL_UART_STATE_BUSY_RX;
+ 8002c62: 68fb ldr r3, [r7, #12]
+ 8002c64: 2222 movs r2, #34 ; 0x22
+ 8002c66: 679a str r2, [r3, #120] ; 0x78
+
+ /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
+ SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
+ 8002c68: 68fb ldr r3, [r7, #12]
+ 8002c6a: 681b ldr r3, [r3, #0]
+ 8002c6c: 689a ldr r2, [r3, #8]
+ 8002c6e: 68fb ldr r3, [r7, #12]
+ 8002c70: 681b ldr r3, [r3, #0]
+ 8002c72: f042 0201 orr.w r2, r2, #1
+ 8002c76: 609a str r2, [r3, #8]
+
+ /* Set the Rx ISR function pointer according to the data word length */
+ if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
+ 8002c78: 68fb ldr r3, [r7, #12]
+ 8002c7a: 689b ldr r3, [r3, #8]
+ 8002c7c: f5b3 5f80 cmp.w r3, #4096 ; 0x1000
+ 8002c80: d107 bne.n 8002c92 <HAL_UART_Receive_IT+0x10a>
+ 8002c82: 68fb ldr r3, [r7, #12]
+ 8002c84: 691b ldr r3, [r3, #16]
+ 8002c86: 2b00 cmp r3, #0
+ 8002c88: d103 bne.n 8002c92 <HAL_UART_Receive_IT+0x10a>
+ {
+ huart->RxISR = UART_RxISR_16BIT;
+ 8002c8a: 68fb ldr r3, [r7, #12]
+ 8002c8c: 4a0d ldr r2, [pc, #52] ; (8002cc4 <HAL_UART_Receive_IT+0x13c>)
+ 8002c8e: 661a str r2, [r3, #96] ; 0x60
+ 8002c90: e002 b.n 8002c98 <HAL_UART_Receive_IT+0x110>
+ }
+ else
+ {
+ huart->RxISR = UART_RxISR_8BIT;
+ 8002c92: 68fb ldr r3, [r7, #12]
+ 8002c94: 4a0c ldr r2, [pc, #48] ; (8002cc8 <HAL_UART_Receive_IT+0x140>)
+ 8002c96: 661a str r2, [r3, #96] ; 0x60
+ }
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(huart);
+ 8002c98: 68fb ldr r3, [r7, #12]
+ 8002c9a: 2200 movs r2, #0
+ 8002c9c: f883 2070 strb.w r2, [r3, #112] ; 0x70
+
+ /* Enable the UART Parity Error interrupt and Data Register Not Empty interrupt */
+ SET_BIT(huart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE);
+ 8002ca0: 68fb ldr r3, [r7, #12]
+ 8002ca2: 681b ldr r3, [r3, #0]
+ 8002ca4: 681a ldr r2, [r3, #0]
+ 8002ca6: 68fb ldr r3, [r7, #12]
+ 8002ca8: 681b ldr r3, [r3, #0]
+ 8002caa: f442 7290 orr.w r2, r2, #288 ; 0x120
+ 8002cae: 601a str r2, [r3, #0]
+
+ return HAL_OK;
+ 8002cb0: 2300 movs r3, #0
+ 8002cb2: e000 b.n 8002cb6 <HAL_UART_Receive_IT+0x12e>
+ }
+ else
+ {
+ return HAL_BUSY;
+ 8002cb4: 2302 movs r3, #2
+ }
+}
+ 8002cb6: 4618 mov r0, r3
+ 8002cb8: 3714 adds r7, #20
+ 8002cba: 46bd mov sp, r7
+ 8002cbc: f85d 7b04 ldr.w r7, [sp], #4
+ 8002cc0: 4770 bx lr
+ 8002cc2: bf00 nop
+ 8002cc4: 080037d7 .word 0x080037d7
+ 8002cc8: 08003731 .word 0x08003731
+
+08002ccc <HAL_UART_IRQHandler>:
+ * @brief Handle UART interrupt request.
+ * @param huart UART handle.
+ * @retval None
+ */
+void HAL_UART_IRQHandler(UART_HandleTypeDef *huart)
+{
+ 8002ccc: b580 push {r7, lr}
+ 8002cce: b088 sub sp, #32
+ 8002cd0: af00 add r7, sp, #0
+ 8002cd2: 6078 str r0, [r7, #4]
+ uint32_t isrflags = READ_REG(huart->Instance->ISR);
+ 8002cd4: 687b ldr r3, [r7, #4]
+ 8002cd6: 681b ldr r3, [r3, #0]
+ 8002cd8: 69db ldr r3, [r3, #28]
+ 8002cda: 61fb str r3, [r7, #28]
+ uint32_t cr1its = READ_REG(huart->Instance->CR1);
+ 8002cdc: 687b ldr r3, [r7, #4]
+ 8002cde: 681b ldr r3, [r3, #0]
+ 8002ce0: 681b ldr r3, [r3, #0]
+ 8002ce2: 61bb str r3, [r7, #24]
+ uint32_t cr3its = READ_REG(huart->Instance->CR3);
+ 8002ce4: 687b ldr r3, [r7, #4]
+ 8002ce6: 681b ldr r3, [r3, #0]
+ 8002ce8: 689b ldr r3, [r3, #8]
+ 8002cea: 617b str r3, [r7, #20]
+
+ uint32_t errorflags;
+ uint32_t errorcode;
+
+ /* If no error occurs */
+ errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE));
+ 8002cec: 69fb ldr r3, [r7, #28]
+ 8002cee: f003 030f and.w r3, r3, #15
+ 8002cf2: 613b str r3, [r7, #16]
+ if (errorflags == 0U)
+ 8002cf4: 693b ldr r3, [r7, #16]
+ 8002cf6: 2b00 cmp r3, #0
+ 8002cf8: d113 bne.n 8002d22 <HAL_UART_IRQHandler+0x56>
+ {
+ /* UART in mode Receiver ---------------------------------------------------*/
+ if (((isrflags & USART_ISR_RXNE) != 0U)
+ 8002cfa: 69fb ldr r3, [r7, #28]
+ 8002cfc: f003 0320 and.w r3, r3, #32
+ 8002d00: 2b00 cmp r3, #0
+ 8002d02: d00e beq.n 8002d22 <HAL_UART_IRQHandler+0x56>
+ && ((cr1its & USART_CR1_RXNEIE) != 0U))
+ 8002d04: 69bb ldr r3, [r7, #24]
+ 8002d06: f003 0320 and.w r3, r3, #32
+ 8002d0a: 2b00 cmp r3, #0
+ 8002d0c: d009 beq.n 8002d22 <HAL_UART_IRQHandler+0x56>
+ {
+ if (huart->RxISR != NULL)
+ 8002d0e: 687b ldr r3, [r7, #4]
+ 8002d10: 6e1b ldr r3, [r3, #96] ; 0x60
+ 8002d12: 2b00 cmp r3, #0
+ 8002d14: f000 80eb beq.w 8002eee <HAL_UART_IRQHandler+0x222>
+ {
+ huart->RxISR(huart);
+ 8002d18: 687b ldr r3, [r7, #4]
+ 8002d1a: 6e1b ldr r3, [r3, #96] ; 0x60
+ 8002d1c: 6878 ldr r0, [r7, #4]
+ 8002d1e: 4798 blx r3
+ }
+ return;
+ 8002d20: e0e5 b.n 8002eee <HAL_UART_IRQHandler+0x222>
+ }
+ }
+
+ /* If some errors occur */
+ if ((errorflags != 0U)
+ 8002d22: 693b ldr r3, [r7, #16]
+ 8002d24: 2b00 cmp r3, #0
+ 8002d26: f000 80c0 beq.w 8002eaa <HAL_UART_IRQHandler+0x1de>
+ && (((cr3its & USART_CR3_EIE) != 0U)
+ 8002d2a: 697b ldr r3, [r7, #20]
+ 8002d2c: f003 0301 and.w r3, r3, #1
+ 8002d30: 2b00 cmp r3, #0
+ 8002d32: d105 bne.n 8002d40 <HAL_UART_IRQHandler+0x74>
+ || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != 0U)))
+ 8002d34: 69bb ldr r3, [r7, #24]
+ 8002d36: f403 7390 and.w r3, r3, #288 ; 0x120
+ 8002d3a: 2b00 cmp r3, #0
+ 8002d3c: f000 80b5 beq.w 8002eaa <HAL_UART_IRQHandler+0x1de>
+ {
+ /* UART parity error interrupt occurred -------------------------------------*/
+ if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U))
+ 8002d40: 69fb ldr r3, [r7, #28]
+ 8002d42: f003 0301 and.w r3, r3, #1
+ 8002d46: 2b00 cmp r3, #0
+ 8002d48: d00e beq.n 8002d68 <HAL_UART_IRQHandler+0x9c>
+ 8002d4a: 69bb ldr r3, [r7, #24]
+ 8002d4c: f403 7380 and.w r3, r3, #256 ; 0x100
+ 8002d50: 2b00 cmp r3, #0
+ 8002d52: d009 beq.n 8002d68 <HAL_UART_IRQHandler+0x9c>
+ {
+ __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF);
+ 8002d54: 687b ldr r3, [r7, #4]
+ 8002d56: 681b ldr r3, [r3, #0]
+ 8002d58: 2201 movs r2, #1
+ 8002d5a: 621a str r2, [r3, #32]
+
+ huart->ErrorCode |= HAL_UART_ERROR_PE;
+ 8002d5c: 687b ldr r3, [r7, #4]
+ 8002d5e: 6fdb ldr r3, [r3, #124] ; 0x7c
+ 8002d60: f043 0201 orr.w r2, r3, #1
+ 8002d64: 687b ldr r3, [r7, #4]
+ 8002d66: 67da str r2, [r3, #124] ; 0x7c
+ }
+
+ /* UART frame error interrupt occurred --------------------------------------*/
+ if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
+ 8002d68: 69fb ldr r3, [r7, #28]
+ 8002d6a: f003 0302 and.w r3, r3, #2
+ 8002d6e: 2b00 cmp r3, #0
+ 8002d70: d00e beq.n 8002d90 <HAL_UART_IRQHandler+0xc4>
+ 8002d72: 697b ldr r3, [r7, #20]
+ 8002d74: f003 0301 and.w r3, r3, #1
+ 8002d78: 2b00 cmp r3, #0
+ 8002d7a: d009 beq.n 8002d90 <HAL_UART_IRQHandler+0xc4>
+ {
+ __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF);
+ 8002d7c: 687b ldr r3, [r7, #4]
+ 8002d7e: 681b ldr r3, [r3, #0]
+ 8002d80: 2202 movs r2, #2
+ 8002d82: 621a str r2, [r3, #32]
+
+ huart->ErrorCode |= HAL_UART_ERROR_FE;
+ 8002d84: 687b ldr r3, [r7, #4]
+ 8002d86: 6fdb ldr r3, [r3, #124] ; 0x7c
+ 8002d88: f043 0204 orr.w r2, r3, #4
+ 8002d8c: 687b ldr r3, [r7, #4]
+ 8002d8e: 67da str r2, [r3, #124] ; 0x7c
+ }
+
+ /* UART noise error interrupt occurred --------------------------------------*/
+ if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
+ 8002d90: 69fb ldr r3, [r7, #28]
+ 8002d92: f003 0304 and.w r3, r3, #4
+ 8002d96: 2b00 cmp r3, #0
+ 8002d98: d00e beq.n 8002db8 <HAL_UART_IRQHandler+0xec>
+ 8002d9a: 697b ldr r3, [r7, #20]
+ 8002d9c: f003 0301 and.w r3, r3, #1
+ 8002da0: 2b00 cmp r3, #0
+ 8002da2: d009 beq.n 8002db8 <HAL_UART_IRQHandler+0xec>
+ {
+ __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF);
+ 8002da4: 687b ldr r3, [r7, #4]
+ 8002da6: 681b ldr r3, [r3, #0]
+ 8002da8: 2204 movs r2, #4
+ 8002daa: 621a str r2, [r3, #32]
+
+ huart->ErrorCode |= HAL_UART_ERROR_NE;
+ 8002dac: 687b ldr r3, [r7, #4]
+ 8002dae: 6fdb ldr r3, [r3, #124] ; 0x7c
+ 8002db0: f043 0202 orr.w r2, r3, #2
+ 8002db4: 687b ldr r3, [r7, #4]
+ 8002db6: 67da str r2, [r3, #124] ; 0x7c
+ }
+
+ /* UART Over-Run interrupt occurred -----------------------------------------*/
+ if (((isrflags & USART_ISR_ORE) != 0U)
+ 8002db8: 69fb ldr r3, [r7, #28]
+ 8002dba: f003 0308 and.w r3, r3, #8
+ 8002dbe: 2b00 cmp r3, #0
+ 8002dc0: d013 beq.n 8002dea <HAL_UART_IRQHandler+0x11e>
+ && (((cr1its & USART_CR1_RXNEIE) != 0U) ||
+ 8002dc2: 69bb ldr r3, [r7, #24]
+ 8002dc4: f003 0320 and.w r3, r3, #32
+ 8002dc8: 2b00 cmp r3, #0
+ 8002dca: d104 bne.n 8002dd6 <HAL_UART_IRQHandler+0x10a>
+ ((cr3its & USART_CR3_EIE) != 0U)))
+ 8002dcc: 697b ldr r3, [r7, #20]
+ 8002dce: f003 0301 and.w r3, r3, #1
+ && (((cr1its & USART_CR1_RXNEIE) != 0U) ||
+ 8002dd2: 2b00 cmp r3, #0
+ 8002dd4: d009 beq.n 8002dea <HAL_UART_IRQHandler+0x11e>
+ {
+ __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF);
+ 8002dd6: 687b ldr r3, [r7, #4]
+ 8002dd8: 681b ldr r3, [r3, #0]
+ 8002dda: 2208 movs r2, #8
+ 8002ddc: 621a str r2, [r3, #32]
+
+ huart->ErrorCode |= HAL_UART_ERROR_ORE;
+ 8002dde: 687b ldr r3, [r7, #4]
+ 8002de0: 6fdb ldr r3, [r3, #124] ; 0x7c
+ 8002de2: f043 0208 orr.w r2, r3, #8
+ 8002de6: 687b ldr r3, [r7, #4]
+ 8002de8: 67da str r2, [r3, #124] ; 0x7c
+ }
+
+ /* Call UART Error Call back function if need be --------------------------*/
+ if (huart->ErrorCode != HAL_UART_ERROR_NONE)
+ 8002dea: 687b ldr r3, [r7, #4]
+ 8002dec: 6fdb ldr r3, [r3, #124] ; 0x7c
+ 8002dee: 2b00 cmp r3, #0
+ 8002df0: d07f beq.n 8002ef2 <HAL_UART_IRQHandler+0x226>
+ {
+ /* UART in mode Receiver ---------------------------------------------------*/
+ if (((isrflags & USART_ISR_RXNE) != 0U)
+ 8002df2: 69fb ldr r3, [r7, #28]
+ 8002df4: f003 0320 and.w r3, r3, #32
+ 8002df8: 2b00 cmp r3, #0
+ 8002dfa: d00c beq.n 8002e16 <HAL_UART_IRQHandler+0x14a>
+ && ((cr1its & USART_CR1_RXNEIE) != 0U))
+ 8002dfc: 69bb ldr r3, [r7, #24]
+ 8002dfe: f003 0320 and.w r3, r3, #32
+ 8002e02: 2b00 cmp r3, #0
+ 8002e04: d007 beq.n 8002e16 <HAL_UART_IRQHandler+0x14a>
+ {
+ if (huart->RxISR != NULL)
+ 8002e06: 687b ldr r3, [r7, #4]
+ 8002e08: 6e1b ldr r3, [r3, #96] ; 0x60
+ 8002e0a: 2b00 cmp r3, #0
+ 8002e0c: d003 beq.n 8002e16 <HAL_UART_IRQHandler+0x14a>
+ {
+ huart->RxISR(huart);
+ 8002e0e: 687b ldr r3, [r7, #4]
+ 8002e10: 6e1b ldr r3, [r3, #96] ; 0x60
+ 8002e12: 6878 ldr r0, [r7, #4]
+ 8002e14: 4798 blx r3
+ }
+ }
+
+ /* If Overrun error occurs, or if any error occurs in DMA mode reception,
+ consider error as blocking */
+ errorcode = huart->ErrorCode;
+ 8002e16: 687b ldr r3, [r7, #4]
+ 8002e18: 6fdb ldr r3, [r3, #124] ; 0x7c
+ 8002e1a: 60fb str r3, [r7, #12]
+ if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) ||
+ 8002e1c: 687b ldr r3, [r7, #4]
+ 8002e1e: 681b ldr r3, [r3, #0]
+ 8002e20: 689b ldr r3, [r3, #8]
+ 8002e22: f003 0340 and.w r3, r3, #64 ; 0x40
+ 8002e26: 2b40 cmp r3, #64 ; 0x40
+ 8002e28: d004 beq.n 8002e34 <HAL_UART_IRQHandler+0x168>
+ ((errorcode & HAL_UART_ERROR_ORE) != 0U))
+ 8002e2a: 68fb ldr r3, [r7, #12]
+ 8002e2c: f003 0308 and.w r3, r3, #8
+ if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) ||
+ 8002e30: 2b00 cmp r3, #0
+ 8002e32: d031 beq.n 8002e98 <HAL_UART_IRQHandler+0x1cc>
+ {
+ /* Blocking error : transfer is aborted
+ Set the UART state ready to be able to start again the process,
+ Disable Rx Interrupts, and disable Rx DMA request, if ongoing */
+ UART_EndRxTransfer(huart);
+ 8002e34: 6878 ldr r0, [r7, #4]
+ 8002e36: f000 fc2c bl 8003692 <UART_EndRxTransfer>
+
+ /* Disable the UART DMA Rx request if enabled */
+ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
+ 8002e3a: 687b ldr r3, [r7, #4]
+ 8002e3c: 681b ldr r3, [r3, #0]
+ 8002e3e: 689b ldr r3, [r3, #8]
+ 8002e40: f003 0340 and.w r3, r3, #64 ; 0x40
+ 8002e44: 2b40 cmp r3, #64 ; 0x40
+ 8002e46: d123 bne.n 8002e90 <HAL_UART_IRQHandler+0x1c4>
+ {
+ CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
+ 8002e48: 687b ldr r3, [r7, #4]
+ 8002e4a: 681b ldr r3, [r3, #0]
+ 8002e4c: 689a ldr r2, [r3, #8]
+ 8002e4e: 687b ldr r3, [r7, #4]
+ 8002e50: 681b ldr r3, [r3, #0]
+ 8002e52: f022 0240 bic.w r2, r2, #64 ; 0x40
+ 8002e56: 609a str r2, [r3, #8]
+
+ /* Abort the UART DMA Rx channel */
+ if (huart->hdmarx != NULL)
+ 8002e58: 687b ldr r3, [r7, #4]
+ 8002e5a: 6edb ldr r3, [r3, #108] ; 0x6c
+ 8002e5c: 2b00 cmp r3, #0
+ 8002e5e: d013 beq.n 8002e88 <HAL_UART_IRQHandler+0x1bc>
+ {
+ /* Set the UART DMA Abort callback :
+ will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */
+ huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError;
+ 8002e60: 687b ldr r3, [r7, #4]
+ 8002e62: 6edb ldr r3, [r3, #108] ; 0x6c
+ 8002e64: 4a26 ldr r2, [pc, #152] ; (8002f00 <HAL_UART_IRQHandler+0x234>)
+ 8002e66: 651a str r2, [r3, #80] ; 0x50
+
+ /* Abort DMA RX */
+ if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
+ 8002e68: 687b ldr r3, [r7, #4]
+ 8002e6a: 6edb ldr r3, [r3, #108] ; 0x6c
+ 8002e6c: 4618 mov r0, r3
+ 8002e6e: f7fd ff98 bl 8000da2 <HAL_DMA_Abort_IT>
+ 8002e72: 4603 mov r3, r0
+ 8002e74: 2b00 cmp r3, #0
+ 8002e76: d016 beq.n 8002ea6 <HAL_UART_IRQHandler+0x1da>
+ {
+ /* Call Directly huart->hdmarx->XferAbortCallback function in case of error */
+ huart->hdmarx->XferAbortCallback(huart->hdmarx);
+ 8002e78: 687b ldr r3, [r7, #4]
+ 8002e7a: 6edb ldr r3, [r3, #108] ; 0x6c
+ 8002e7c: 6d1b ldr r3, [r3, #80] ; 0x50
+ 8002e7e: 687a ldr r2, [r7, #4]
+ 8002e80: 6ed2 ldr r2, [r2, #108] ; 0x6c
+ 8002e82: 4610 mov r0, r2
+ 8002e84: 4798 blx r3
+ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
+ 8002e86: e00e b.n 8002ea6 <HAL_UART_IRQHandler+0x1da>
+#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
+ /*Call registered error callback*/
+ huart->ErrorCallback(huart);
+#else
+ /*Call legacy weak error callback*/
+ HAL_UART_ErrorCallback(huart);
+ 8002e88: 6878 ldr r0, [r7, #4]
+ 8002e8a: f7fd fccd bl 8000828 <HAL_UART_ErrorCallback>
+ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
+ 8002e8e: e00a b.n 8002ea6 <HAL_UART_IRQHandler+0x1da>
+#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
+ /*Call registered error callback*/
+ huart->ErrorCallback(huart);
+#else
+ /*Call legacy weak error callback*/
+ HAL_UART_ErrorCallback(huart);
+ 8002e90: 6878 ldr r0, [r7, #4]
+ 8002e92: f7fd fcc9 bl 8000828 <HAL_UART_ErrorCallback>
+ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
+ 8002e96: e006 b.n 8002ea6 <HAL_UART_IRQHandler+0x1da>
+#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
+ /*Call registered error callback*/
+ huart->ErrorCallback(huart);
+#else
+ /*Call legacy weak error callback*/
+ HAL_UART_ErrorCallback(huart);
+ 8002e98: 6878 ldr r0, [r7, #4]
+ 8002e9a: f7fd fcc5 bl 8000828 <HAL_UART_ErrorCallback>
+#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
+ huart->ErrorCode = HAL_UART_ERROR_NONE;
+ 8002e9e: 687b ldr r3, [r7, #4]
+ 8002ea0: 2200 movs r2, #0
+ 8002ea2: 67da str r2, [r3, #124] ; 0x7c
+ }
+ }
+ return;
+ 8002ea4: e025 b.n 8002ef2 <HAL_UART_IRQHandler+0x226>
+ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
+ 8002ea6: bf00 nop
+ return;
+ 8002ea8: e023 b.n 8002ef2 <HAL_UART_IRQHandler+0x226>
+
+ } /* End if some error occurs */
+
+ /* UART in mode Transmitter ------------------------------------------------*/
+ if (((isrflags & USART_ISR_TXE) != 0U)
+ 8002eaa: 69fb ldr r3, [r7, #28]
+ 8002eac: f003 0380 and.w r3, r3, #128 ; 0x80
+ 8002eb0: 2b00 cmp r3, #0
+ 8002eb2: d00d beq.n 8002ed0 <HAL_UART_IRQHandler+0x204>
+ && ((cr1its & USART_CR1_TXEIE) != 0U))
+ 8002eb4: 69bb ldr r3, [r7, #24]
+ 8002eb6: f003 0380 and.w r3, r3, #128 ; 0x80
+ 8002eba: 2b00 cmp r3, #0
+ 8002ebc: d008 beq.n 8002ed0 <HAL_UART_IRQHandler+0x204>
+ {
+ if (huart->TxISR != NULL)
+ 8002ebe: 687b ldr r3, [r7, #4]
+ 8002ec0: 6e5b ldr r3, [r3, #100] ; 0x64
+ 8002ec2: 2b00 cmp r3, #0
+ 8002ec4: d017 beq.n 8002ef6 <HAL_UART_IRQHandler+0x22a>
+ {
+ huart->TxISR(huart);
+ 8002ec6: 687b ldr r3, [r7, #4]
+ 8002ec8: 6e5b ldr r3, [r3, #100] ; 0x64
+ 8002eca: 6878 ldr r0, [r7, #4]
+ 8002ecc: 4798 blx r3
+ }
+ return;
+ 8002ece: e012 b.n 8002ef6 <HAL_UART_IRQHandler+0x22a>
+ }
+
+ /* UART in mode Transmitter (transmission end) -----------------------------*/
+ if (((isrflags & USART_ISR_TC) != 0U) && ((cr1its & USART_CR1_TCIE) != 0U))
+ 8002ed0: 69fb ldr r3, [r7, #28]
+ 8002ed2: f003 0340 and.w r3, r3, #64 ; 0x40
+ 8002ed6: 2b00 cmp r3, #0
+ 8002ed8: d00e beq.n 8002ef8 <HAL_UART_IRQHandler+0x22c>
+ 8002eda: 69bb ldr r3, [r7, #24]
+ 8002edc: f003 0340 and.w r3, r3, #64 ; 0x40
+ 8002ee0: 2b00 cmp r3, #0
+ 8002ee2: d009 beq.n 8002ef8 <HAL_UART_IRQHandler+0x22c>
+ {
+ UART_EndTransmit_IT(huart);
+ 8002ee4: 6878 ldr r0, [r7, #4]
+ 8002ee6: f000 fc0a bl 80036fe <UART_EndTransmit_IT>
+ return;
+ 8002eea: bf00 nop
+ 8002eec: e004 b.n 8002ef8 <HAL_UART_IRQHandler+0x22c>
+ return;
+ 8002eee: bf00 nop
+ 8002ef0: e002 b.n 8002ef8 <HAL_UART_IRQHandler+0x22c>
+ return;
+ 8002ef2: bf00 nop
+ 8002ef4: e000 b.n 8002ef8 <HAL_UART_IRQHandler+0x22c>
+ return;
+ 8002ef6: bf00 nop
+ }
+
+}
+ 8002ef8: 3720 adds r7, #32
+ 8002efa: 46bd mov sp, r7
+ 8002efc: bd80 pop {r7, pc}
+ 8002efe: bf00 nop
+ 8002f00: 080036d3 .word 0x080036d3
+
+08002f04 <HAL_UART_TxCpltCallback>:
+ * @brief Tx Transfer completed callback.
+ * @param huart UART handle.
+ * @retval None
+ */
+__weak void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
+{
+ 8002f04: b480 push {r7}
+ 8002f06: b083 sub sp, #12
+ 8002f08: af00 add r7, sp, #0
+ 8002f0a: 6078 str r0, [r7, #4]
+ UNUSED(huart);
+
+ /* NOTE : This function should not be modified, when the callback is needed,
+ the HAL_UART_TxCpltCallback can be implemented in the user file.
+ */
+}
+ 8002f0c: bf00 nop
+ 8002f0e: 370c adds r7, #12
+ 8002f10: 46bd mov sp, r7
+ 8002f12: f85d 7b04 ldr.w r7, [sp], #4
+ 8002f16: 4770 bx lr
+
+08002f18 <UART_SetConfig>:
* @brief Configure the UART peripheral.
* @param huart UART handle.
* @retval HAL status
*/
HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart)
{
- 8002260: b580 push {r7, lr}
- 8002262: b088 sub sp, #32
- 8002264: af00 add r7, sp, #0
- 8002266: 6078 str r0, [r7, #4]
+ 8002f18: b580 push {r7, lr}
+ 8002f1a: b088 sub sp, #32
+ 8002f1c: af00 add r7, sp, #0
+ 8002f1e: 6078 str r0, [r7, #4]
uint32_t tmpreg;
uint16_t brrtemp;
UART_ClockSourceTypeDef clocksource;
uint32_t usartdiv = 0x00000000U;
- 8002268: 2300 movs r3, #0
- 800226a: 61bb str r3, [r7, #24]
+ 8002f20: 2300 movs r3, #0
+ 8002f22: 61bb str r3, [r7, #24]
HAL_StatusTypeDef ret = HAL_OK;
- 800226c: 2300 movs r3, #0
- 800226e: 75fb strb r3, [r7, #23]
+ 8002f24: 2300 movs r3, #0
+ 8002f26: 75fb strb r3, [r7, #23]
* the UART Word Length, Parity, Mode and oversampling:
* set the M bits according to huart->Init.WordLength value
* set PCE and PS bits according to huart->Init.Parity value
* set TE and RE bits according to huart->Init.Mode value
* set OVER8 bit according to huart->Init.OverSampling value */
tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling ;
- 8002270: 687b ldr r3, [r7, #4]
- 8002272: 689a ldr r2, [r3, #8]
- 8002274: 687b ldr r3, [r7, #4]
- 8002276: 691b ldr r3, [r3, #16]
- 8002278: 431a orrs r2, r3
- 800227a: 687b ldr r3, [r7, #4]
- 800227c: 695b ldr r3, [r3, #20]
- 800227e: 431a orrs r2, r3
- 8002280: 687b ldr r3, [r7, #4]
- 8002282: 69db ldr r3, [r3, #28]
- 8002284: 4313 orrs r3, r2
- 8002286: 613b str r3, [r7, #16]
+ 8002f28: 687b ldr r3, [r7, #4]
+ 8002f2a: 689a ldr r2, [r3, #8]
+ 8002f2c: 687b ldr r3, [r7, #4]
+ 8002f2e: 691b ldr r3, [r3, #16]
+ 8002f30: 431a orrs r2, r3
+ 8002f32: 687b ldr r3, [r7, #4]
+ 8002f34: 695b ldr r3, [r3, #20]
+ 8002f36: 431a orrs r2, r3
+ 8002f38: 687b ldr r3, [r7, #4]
+ 8002f3a: 69db ldr r3, [r3, #28]
+ 8002f3c: 4313 orrs r3, r2
+ 8002f3e: 613b str r3, [r7, #16]
MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg);
- 8002288: 687b ldr r3, [r7, #4]
- 800228a: 681b ldr r3, [r3, #0]
- 800228c: 681a ldr r2, [r3, #0]
- 800228e: 4bb1 ldr r3, [pc, #708] ; (8002554 <UART_SetConfig+0x2f4>)
- 8002290: 4013 ands r3, r2
- 8002292: 687a ldr r2, [r7, #4]
- 8002294: 6812 ldr r2, [r2, #0]
- 8002296: 6939 ldr r1, [r7, #16]
- 8002298: 430b orrs r3, r1
- 800229a: 6013 str r3, [r2, #0]
+ 8002f40: 687b ldr r3, [r7, #4]
+ 8002f42: 681b ldr r3, [r3, #0]
+ 8002f44: 681a ldr r2, [r3, #0]
+ 8002f46: 4bb1 ldr r3, [pc, #708] ; (800320c <UART_SetConfig+0x2f4>)
+ 8002f48: 4013 ands r3, r2
+ 8002f4a: 687a ldr r2, [r7, #4]
+ 8002f4c: 6812 ldr r2, [r2, #0]
+ 8002f4e: 6939 ldr r1, [r7, #16]
+ 8002f50: 430b orrs r3, r1
+ 8002f52: 6013 str r3, [r2, #0]
/*-------------------------- USART CR2 Configuration -----------------------*/
/* Configure the UART Stop Bits: Set STOP[13:12] bits according
* to huart->Init.StopBits value */
MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
- 800229c: 687b ldr r3, [r7, #4]
- 800229e: 681b ldr r3, [r3, #0]
- 80022a0: 685b ldr r3, [r3, #4]
- 80022a2: f423 5140 bic.w r1, r3, #12288 ; 0x3000
- 80022a6: 687b ldr r3, [r7, #4]
- 80022a8: 68da ldr r2, [r3, #12]
- 80022aa: 687b ldr r3, [r7, #4]
- 80022ac: 681b ldr r3, [r3, #0]
- 80022ae: 430a orrs r2, r1
- 80022b0: 605a str r2, [r3, #4]
+ 8002f54: 687b ldr r3, [r7, #4]
+ 8002f56: 681b ldr r3, [r3, #0]
+ 8002f58: 685b ldr r3, [r3, #4]
+ 8002f5a: f423 5140 bic.w r1, r3, #12288 ; 0x3000
+ 8002f5e: 687b ldr r3, [r7, #4]
+ 8002f60: 68da ldr r2, [r3, #12]
+ 8002f62: 687b ldr r3, [r7, #4]
+ 8002f64: 681b ldr r3, [r3, #0]
+ 8002f66: 430a orrs r2, r1
+ 8002f68: 605a str r2, [r3, #4]
/* Configure
* - UART HardWare Flow Control: set CTSE and RTSE bits according
* to huart->Init.HwFlowCtl value
* - one-bit sampling method versus three samples' majority rule according
* to huart->Init.OneBitSampling (not applicable to LPUART) */
tmpreg = (uint32_t)huart->Init.HwFlowCtl;
- 80022b2: 687b ldr r3, [r7, #4]
- 80022b4: 699b ldr r3, [r3, #24]
- 80022b6: 613b str r3, [r7, #16]
+ 8002f6a: 687b ldr r3, [r7, #4]
+ 8002f6c: 699b ldr r3, [r3, #24]
+ 8002f6e: 613b str r3, [r7, #16]
tmpreg |= huart->Init.OneBitSampling;
- 80022b8: 687b ldr r3, [r7, #4]
- 80022ba: 6a1b ldr r3, [r3, #32]
- 80022bc: 693a ldr r2, [r7, #16]
- 80022be: 4313 orrs r3, r2
- 80022c0: 613b str r3, [r7, #16]
+ 8002f70: 687b ldr r3, [r7, #4]
+ 8002f72: 6a1b ldr r3, [r3, #32]
+ 8002f74: 693a ldr r2, [r7, #16]
+ 8002f76: 4313 orrs r3, r2
+ 8002f78: 613b str r3, [r7, #16]
MODIFY_REG(huart->Instance->CR3, USART_CR3_FIELDS, tmpreg);
- 80022c2: 687b ldr r3, [r7, #4]
- 80022c4: 681b ldr r3, [r3, #0]
- 80022c6: 689b ldr r3, [r3, #8]
- 80022c8: f423 6130 bic.w r1, r3, #2816 ; 0xb00
- 80022cc: 687b ldr r3, [r7, #4]
- 80022ce: 681b ldr r3, [r3, #0]
- 80022d0: 693a ldr r2, [r7, #16]
- 80022d2: 430a orrs r2, r1
- 80022d4: 609a str r2, [r3, #8]
+ 8002f7a: 687b ldr r3, [r7, #4]
+ 8002f7c: 681b ldr r3, [r3, #0]
+ 8002f7e: 689b ldr r3, [r3, #8]
+ 8002f80: f423 6130 bic.w r1, r3, #2816 ; 0xb00
+ 8002f84: 687b ldr r3, [r7, #4]
+ 8002f86: 681b ldr r3, [r3, #0]
+ 8002f88: 693a ldr r2, [r7, #16]
+ 8002f8a: 430a orrs r2, r1
+ 8002f8c: 609a str r2, [r3, #8]
/*-------------------------- USART BRR Configuration -----------------------*/
UART_GETCLOCKSOURCE(huart, clocksource);
- 80022d6: 687b ldr r3, [r7, #4]
- 80022d8: 681b ldr r3, [r3, #0]
- 80022da: 4a9f ldr r2, [pc, #636] ; (8002558 <UART_SetConfig+0x2f8>)
- 80022dc: 4293 cmp r3, r2
- 80022de: d121 bne.n 8002324 <UART_SetConfig+0xc4>
- 80022e0: 4b9e ldr r3, [pc, #632] ; (800255c <UART_SetConfig+0x2fc>)
- 80022e2: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 80022e6: f003 0303 and.w r3, r3, #3
- 80022ea: 2b03 cmp r3, #3
- 80022ec: d816 bhi.n 800231c <UART_SetConfig+0xbc>
- 80022ee: a201 add r2, pc, #4 ; (adr r2, 80022f4 <UART_SetConfig+0x94>)
- 80022f0: f852 f023 ldr.w pc, [r2, r3, lsl #2]
- 80022f4: 08002305 .word 0x08002305
- 80022f8: 08002311 .word 0x08002311
- 80022fc: 0800230b .word 0x0800230b
- 8002300: 08002317 .word 0x08002317
- 8002304: 2301 movs r3, #1
- 8002306: 77fb strb r3, [r7, #31]
- 8002308: e151 b.n 80025ae <UART_SetConfig+0x34e>
- 800230a: 2302 movs r3, #2
- 800230c: 77fb strb r3, [r7, #31]
- 800230e: e14e b.n 80025ae <UART_SetConfig+0x34e>
- 8002310: 2304 movs r3, #4
- 8002312: 77fb strb r3, [r7, #31]
- 8002314: e14b b.n 80025ae <UART_SetConfig+0x34e>
- 8002316: 2308 movs r3, #8
- 8002318: 77fb strb r3, [r7, #31]
- 800231a: e148 b.n 80025ae <UART_SetConfig+0x34e>
- 800231c: 2310 movs r3, #16
- 800231e: 77fb strb r3, [r7, #31]
- 8002320: bf00 nop
- 8002322: e144 b.n 80025ae <UART_SetConfig+0x34e>
- 8002324: 687b ldr r3, [r7, #4]
- 8002326: 681b ldr r3, [r3, #0]
- 8002328: 4a8d ldr r2, [pc, #564] ; (8002560 <UART_SetConfig+0x300>)
- 800232a: 4293 cmp r3, r2
- 800232c: d134 bne.n 8002398 <UART_SetConfig+0x138>
- 800232e: 4b8b ldr r3, [pc, #556] ; (800255c <UART_SetConfig+0x2fc>)
- 8002330: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 8002334: f003 030c and.w r3, r3, #12
- 8002338: 2b0c cmp r3, #12
- 800233a: d829 bhi.n 8002390 <UART_SetConfig+0x130>
- 800233c: a201 add r2, pc, #4 ; (adr r2, 8002344 <UART_SetConfig+0xe4>)
- 800233e: f852 f023 ldr.w pc, [r2, r3, lsl #2]
- 8002342: bf00 nop
- 8002344: 08002379 .word 0x08002379
- 8002348: 08002391 .word 0x08002391
- 800234c: 08002391 .word 0x08002391
- 8002350: 08002391 .word 0x08002391
- 8002354: 08002385 .word 0x08002385
- 8002358: 08002391 .word 0x08002391
- 800235c: 08002391 .word 0x08002391
- 8002360: 08002391 .word 0x08002391
- 8002364: 0800237f .word 0x0800237f
- 8002368: 08002391 .word 0x08002391
- 800236c: 08002391 .word 0x08002391
- 8002370: 08002391 .word 0x08002391
- 8002374: 0800238b .word 0x0800238b
- 8002378: 2300 movs r3, #0
- 800237a: 77fb strb r3, [r7, #31]
- 800237c: e117 b.n 80025ae <UART_SetConfig+0x34e>
- 800237e: 2302 movs r3, #2
- 8002380: 77fb strb r3, [r7, #31]
- 8002382: e114 b.n 80025ae <UART_SetConfig+0x34e>
- 8002384: 2304 movs r3, #4
- 8002386: 77fb strb r3, [r7, #31]
- 8002388: e111 b.n 80025ae <UART_SetConfig+0x34e>
- 800238a: 2308 movs r3, #8
- 800238c: 77fb strb r3, [r7, #31]
- 800238e: e10e b.n 80025ae <UART_SetConfig+0x34e>
- 8002390: 2310 movs r3, #16
- 8002392: 77fb strb r3, [r7, #31]
- 8002394: bf00 nop
- 8002396: e10a b.n 80025ae <UART_SetConfig+0x34e>
- 8002398: 687b ldr r3, [r7, #4]
- 800239a: 681b ldr r3, [r3, #0]
- 800239c: 4a71 ldr r2, [pc, #452] ; (8002564 <UART_SetConfig+0x304>)
- 800239e: 4293 cmp r3, r2
- 80023a0: d120 bne.n 80023e4 <UART_SetConfig+0x184>
- 80023a2: 4b6e ldr r3, [pc, #440] ; (800255c <UART_SetConfig+0x2fc>)
- 80023a4: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 80023a8: f003 0330 and.w r3, r3, #48 ; 0x30
- 80023ac: 2b10 cmp r3, #16
- 80023ae: d00f beq.n 80023d0 <UART_SetConfig+0x170>
- 80023b0: 2b10 cmp r3, #16
- 80023b2: d802 bhi.n 80023ba <UART_SetConfig+0x15a>
- 80023b4: 2b00 cmp r3, #0
- 80023b6: d005 beq.n 80023c4 <UART_SetConfig+0x164>
- 80023b8: e010 b.n 80023dc <UART_SetConfig+0x17c>
- 80023ba: 2b20 cmp r3, #32
- 80023bc: d005 beq.n 80023ca <UART_SetConfig+0x16a>
- 80023be: 2b30 cmp r3, #48 ; 0x30
- 80023c0: d009 beq.n 80023d6 <UART_SetConfig+0x176>
- 80023c2: e00b b.n 80023dc <UART_SetConfig+0x17c>
- 80023c4: 2300 movs r3, #0
- 80023c6: 77fb strb r3, [r7, #31]
- 80023c8: e0f1 b.n 80025ae <UART_SetConfig+0x34e>
- 80023ca: 2302 movs r3, #2
- 80023cc: 77fb strb r3, [r7, #31]
- 80023ce: e0ee b.n 80025ae <UART_SetConfig+0x34e>
- 80023d0: 2304 movs r3, #4
- 80023d2: 77fb strb r3, [r7, #31]
- 80023d4: e0eb b.n 80025ae <UART_SetConfig+0x34e>
- 80023d6: 2308 movs r3, #8
- 80023d8: 77fb strb r3, [r7, #31]
- 80023da: e0e8 b.n 80025ae <UART_SetConfig+0x34e>
- 80023dc: 2310 movs r3, #16
- 80023de: 77fb strb r3, [r7, #31]
- 80023e0: bf00 nop
- 80023e2: e0e4 b.n 80025ae <UART_SetConfig+0x34e>
- 80023e4: 687b ldr r3, [r7, #4]
- 80023e6: 681b ldr r3, [r3, #0]
- 80023e8: 4a5f ldr r2, [pc, #380] ; (8002568 <UART_SetConfig+0x308>)
- 80023ea: 4293 cmp r3, r2
- 80023ec: d120 bne.n 8002430 <UART_SetConfig+0x1d0>
- 80023ee: 4b5b ldr r3, [pc, #364] ; (800255c <UART_SetConfig+0x2fc>)
- 80023f0: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 80023f4: f003 03c0 and.w r3, r3, #192 ; 0xc0
- 80023f8: 2b40 cmp r3, #64 ; 0x40
- 80023fa: d00f beq.n 800241c <UART_SetConfig+0x1bc>
- 80023fc: 2b40 cmp r3, #64 ; 0x40
- 80023fe: d802 bhi.n 8002406 <UART_SetConfig+0x1a6>
- 8002400: 2b00 cmp r3, #0
- 8002402: d005 beq.n 8002410 <UART_SetConfig+0x1b0>
- 8002404: e010 b.n 8002428 <UART_SetConfig+0x1c8>
- 8002406: 2b80 cmp r3, #128 ; 0x80
- 8002408: d005 beq.n 8002416 <UART_SetConfig+0x1b6>
- 800240a: 2bc0 cmp r3, #192 ; 0xc0
- 800240c: d009 beq.n 8002422 <UART_SetConfig+0x1c2>
- 800240e: e00b b.n 8002428 <UART_SetConfig+0x1c8>
- 8002410: 2300 movs r3, #0
- 8002412: 77fb strb r3, [r7, #31]
- 8002414: e0cb b.n 80025ae <UART_SetConfig+0x34e>
- 8002416: 2302 movs r3, #2
- 8002418: 77fb strb r3, [r7, #31]
- 800241a: e0c8 b.n 80025ae <UART_SetConfig+0x34e>
- 800241c: 2304 movs r3, #4
- 800241e: 77fb strb r3, [r7, #31]
- 8002420: e0c5 b.n 80025ae <UART_SetConfig+0x34e>
- 8002422: 2308 movs r3, #8
- 8002424: 77fb strb r3, [r7, #31]
- 8002426: e0c2 b.n 80025ae <UART_SetConfig+0x34e>
- 8002428: 2310 movs r3, #16
- 800242a: 77fb strb r3, [r7, #31]
- 800242c: bf00 nop
- 800242e: e0be b.n 80025ae <UART_SetConfig+0x34e>
- 8002430: 687b ldr r3, [r7, #4]
- 8002432: 681b ldr r3, [r3, #0]
- 8002434: 4a4d ldr r2, [pc, #308] ; (800256c <UART_SetConfig+0x30c>)
- 8002436: 4293 cmp r3, r2
- 8002438: d124 bne.n 8002484 <UART_SetConfig+0x224>
- 800243a: 4b48 ldr r3, [pc, #288] ; (800255c <UART_SetConfig+0x2fc>)
- 800243c: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 8002440: f403 7340 and.w r3, r3, #768 ; 0x300
- 8002444: f5b3 7f80 cmp.w r3, #256 ; 0x100
- 8002448: d012 beq.n 8002470 <UART_SetConfig+0x210>
- 800244a: f5b3 7f80 cmp.w r3, #256 ; 0x100
- 800244e: d802 bhi.n 8002456 <UART_SetConfig+0x1f6>
- 8002450: 2b00 cmp r3, #0
- 8002452: d007 beq.n 8002464 <UART_SetConfig+0x204>
- 8002454: e012 b.n 800247c <UART_SetConfig+0x21c>
- 8002456: f5b3 7f00 cmp.w r3, #512 ; 0x200
- 800245a: d006 beq.n 800246a <UART_SetConfig+0x20a>
- 800245c: f5b3 7f40 cmp.w r3, #768 ; 0x300
- 8002460: d009 beq.n 8002476 <UART_SetConfig+0x216>
- 8002462: e00b b.n 800247c <UART_SetConfig+0x21c>
- 8002464: 2300 movs r3, #0
- 8002466: 77fb strb r3, [r7, #31]
- 8002468: e0a1 b.n 80025ae <UART_SetConfig+0x34e>
- 800246a: 2302 movs r3, #2
- 800246c: 77fb strb r3, [r7, #31]
- 800246e: e09e b.n 80025ae <UART_SetConfig+0x34e>
- 8002470: 2304 movs r3, #4
- 8002472: 77fb strb r3, [r7, #31]
- 8002474: e09b b.n 80025ae <UART_SetConfig+0x34e>
- 8002476: 2308 movs r3, #8
- 8002478: 77fb strb r3, [r7, #31]
- 800247a: e098 b.n 80025ae <UART_SetConfig+0x34e>
- 800247c: 2310 movs r3, #16
- 800247e: 77fb strb r3, [r7, #31]
- 8002480: bf00 nop
- 8002482: e094 b.n 80025ae <UART_SetConfig+0x34e>
- 8002484: 687b ldr r3, [r7, #4]
- 8002486: 681b ldr r3, [r3, #0]
- 8002488: 4a39 ldr r2, [pc, #228] ; (8002570 <UART_SetConfig+0x310>)
- 800248a: 4293 cmp r3, r2
- 800248c: d124 bne.n 80024d8 <UART_SetConfig+0x278>
- 800248e: 4b33 ldr r3, [pc, #204] ; (800255c <UART_SetConfig+0x2fc>)
- 8002490: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 8002494: f403 6340 and.w r3, r3, #3072 ; 0xc00
- 8002498: f5b3 6f80 cmp.w r3, #1024 ; 0x400
- 800249c: d012 beq.n 80024c4 <UART_SetConfig+0x264>
- 800249e: f5b3 6f80 cmp.w r3, #1024 ; 0x400
- 80024a2: d802 bhi.n 80024aa <UART_SetConfig+0x24a>
- 80024a4: 2b00 cmp r3, #0
- 80024a6: d007 beq.n 80024b8 <UART_SetConfig+0x258>
- 80024a8: e012 b.n 80024d0 <UART_SetConfig+0x270>
- 80024aa: f5b3 6f00 cmp.w r3, #2048 ; 0x800
- 80024ae: d006 beq.n 80024be <UART_SetConfig+0x25e>
- 80024b0: f5b3 6f40 cmp.w r3, #3072 ; 0xc00
- 80024b4: d009 beq.n 80024ca <UART_SetConfig+0x26a>
- 80024b6: e00b b.n 80024d0 <UART_SetConfig+0x270>
- 80024b8: 2301 movs r3, #1
- 80024ba: 77fb strb r3, [r7, #31]
- 80024bc: e077 b.n 80025ae <UART_SetConfig+0x34e>
- 80024be: 2302 movs r3, #2
- 80024c0: 77fb strb r3, [r7, #31]
- 80024c2: e074 b.n 80025ae <UART_SetConfig+0x34e>
- 80024c4: 2304 movs r3, #4
- 80024c6: 77fb strb r3, [r7, #31]
- 80024c8: e071 b.n 80025ae <UART_SetConfig+0x34e>
- 80024ca: 2308 movs r3, #8
- 80024cc: 77fb strb r3, [r7, #31]
- 80024ce: e06e b.n 80025ae <UART_SetConfig+0x34e>
- 80024d0: 2310 movs r3, #16
- 80024d2: 77fb strb r3, [r7, #31]
- 80024d4: bf00 nop
- 80024d6: e06a b.n 80025ae <UART_SetConfig+0x34e>
- 80024d8: 687b ldr r3, [r7, #4]
- 80024da: 681b ldr r3, [r3, #0]
- 80024dc: 4a25 ldr r2, [pc, #148] ; (8002574 <UART_SetConfig+0x314>)
- 80024de: 4293 cmp r3, r2
- 80024e0: d124 bne.n 800252c <UART_SetConfig+0x2cc>
- 80024e2: 4b1e ldr r3, [pc, #120] ; (800255c <UART_SetConfig+0x2fc>)
- 80024e4: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 80024e8: f403 5340 and.w r3, r3, #12288 ; 0x3000
- 80024ec: f5b3 5f80 cmp.w r3, #4096 ; 0x1000
- 80024f0: d012 beq.n 8002518 <UART_SetConfig+0x2b8>
- 80024f2: f5b3 5f80 cmp.w r3, #4096 ; 0x1000
- 80024f6: d802 bhi.n 80024fe <UART_SetConfig+0x29e>
- 80024f8: 2b00 cmp r3, #0
- 80024fa: d007 beq.n 800250c <UART_SetConfig+0x2ac>
- 80024fc: e012 b.n 8002524 <UART_SetConfig+0x2c4>
- 80024fe: f5b3 5f00 cmp.w r3, #8192 ; 0x2000
- 8002502: d006 beq.n 8002512 <UART_SetConfig+0x2b2>
- 8002504: f5b3 5f40 cmp.w r3, #12288 ; 0x3000
- 8002508: d009 beq.n 800251e <UART_SetConfig+0x2be>
- 800250a: e00b b.n 8002524 <UART_SetConfig+0x2c4>
- 800250c: 2300 movs r3, #0
- 800250e: 77fb strb r3, [r7, #31]
- 8002510: e04d b.n 80025ae <UART_SetConfig+0x34e>
- 8002512: 2302 movs r3, #2
- 8002514: 77fb strb r3, [r7, #31]
- 8002516: e04a b.n 80025ae <UART_SetConfig+0x34e>
- 8002518: 2304 movs r3, #4
- 800251a: 77fb strb r3, [r7, #31]
- 800251c: e047 b.n 80025ae <UART_SetConfig+0x34e>
- 800251e: 2308 movs r3, #8
- 8002520: 77fb strb r3, [r7, #31]
- 8002522: e044 b.n 80025ae <UART_SetConfig+0x34e>
- 8002524: 2310 movs r3, #16
- 8002526: 77fb strb r3, [r7, #31]
- 8002528: bf00 nop
- 800252a: e040 b.n 80025ae <UART_SetConfig+0x34e>
- 800252c: 687b ldr r3, [r7, #4]
- 800252e: 681b ldr r3, [r3, #0]
- 8002530: 4a11 ldr r2, [pc, #68] ; (8002578 <UART_SetConfig+0x318>)
- 8002532: 4293 cmp r3, r2
- 8002534: d139 bne.n 80025aa <UART_SetConfig+0x34a>
- 8002536: 4b09 ldr r3, [pc, #36] ; (800255c <UART_SetConfig+0x2fc>)
- 8002538: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
- 800253c: f403 4340 and.w r3, r3, #49152 ; 0xc000
- 8002540: f5b3 4f80 cmp.w r3, #16384 ; 0x4000
- 8002544: d027 beq.n 8002596 <UART_SetConfig+0x336>
- 8002546: f5b3 4f80 cmp.w r3, #16384 ; 0x4000
- 800254a: d817 bhi.n 800257c <UART_SetConfig+0x31c>
- 800254c: 2b00 cmp r3, #0
- 800254e: d01c beq.n 800258a <UART_SetConfig+0x32a>
- 8002550: e027 b.n 80025a2 <UART_SetConfig+0x342>
- 8002552: bf00 nop
- 8002554: efff69f3 .word 0xefff69f3
- 8002558: 40011000 .word 0x40011000
- 800255c: 40023800 .word 0x40023800
- 8002560: 40004400 .word 0x40004400
- 8002564: 40004800 .word 0x40004800
- 8002568: 40004c00 .word 0x40004c00
- 800256c: 40005000 .word 0x40005000
- 8002570: 40011400 .word 0x40011400
- 8002574: 40007800 .word 0x40007800
- 8002578: 40007c00 .word 0x40007c00
- 800257c: f5b3 4f00 cmp.w r3, #32768 ; 0x8000
- 8002580: d006 beq.n 8002590 <UART_SetConfig+0x330>
- 8002582: f5b3 4f40 cmp.w r3, #49152 ; 0xc000
- 8002586: d009 beq.n 800259c <UART_SetConfig+0x33c>
- 8002588: e00b b.n 80025a2 <UART_SetConfig+0x342>
- 800258a: 2300 movs r3, #0
- 800258c: 77fb strb r3, [r7, #31]
- 800258e: e00e b.n 80025ae <UART_SetConfig+0x34e>
- 8002590: 2302 movs r3, #2
- 8002592: 77fb strb r3, [r7, #31]
- 8002594: e00b b.n 80025ae <UART_SetConfig+0x34e>
- 8002596: 2304 movs r3, #4
- 8002598: 77fb strb r3, [r7, #31]
- 800259a: e008 b.n 80025ae <UART_SetConfig+0x34e>
- 800259c: 2308 movs r3, #8
- 800259e: 77fb strb r3, [r7, #31]
- 80025a0: e005 b.n 80025ae <UART_SetConfig+0x34e>
- 80025a2: 2310 movs r3, #16
- 80025a4: 77fb strb r3, [r7, #31]
- 80025a6: bf00 nop
- 80025a8: e001 b.n 80025ae <UART_SetConfig+0x34e>
- 80025aa: 2310 movs r3, #16
- 80025ac: 77fb strb r3, [r7, #31]
+ 8002f8e: 687b ldr r3, [r7, #4]
+ 8002f90: 681b ldr r3, [r3, #0]
+ 8002f92: 4a9f ldr r2, [pc, #636] ; (8003210 <UART_SetConfig+0x2f8>)
+ 8002f94: 4293 cmp r3, r2
+ 8002f96: d121 bne.n 8002fdc <UART_SetConfig+0xc4>
+ 8002f98: 4b9e ldr r3, [pc, #632] ; (8003214 <UART_SetConfig+0x2fc>)
+ 8002f9a: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
+ 8002f9e: f003 0303 and.w r3, r3, #3
+ 8002fa2: 2b03 cmp r3, #3
+ 8002fa4: d816 bhi.n 8002fd4 <UART_SetConfig+0xbc>
+ 8002fa6: a201 add r2, pc, #4 ; (adr r2, 8002fac <UART_SetConfig+0x94>)
+ 8002fa8: f852 f023 ldr.w pc, [r2, r3, lsl #2]
+ 8002fac: 08002fbd .word 0x08002fbd
+ 8002fb0: 08002fc9 .word 0x08002fc9
+ 8002fb4: 08002fc3 .word 0x08002fc3
+ 8002fb8: 08002fcf .word 0x08002fcf
+ 8002fbc: 2301 movs r3, #1
+ 8002fbe: 77fb strb r3, [r7, #31]
+ 8002fc0: e151 b.n 8003266 <UART_SetConfig+0x34e>
+ 8002fc2: 2302 movs r3, #2
+ 8002fc4: 77fb strb r3, [r7, #31]
+ 8002fc6: e14e b.n 8003266 <UART_SetConfig+0x34e>
+ 8002fc8: 2304 movs r3, #4
+ 8002fca: 77fb strb r3, [r7, #31]
+ 8002fcc: e14b b.n 8003266 <UART_SetConfig+0x34e>
+ 8002fce: 2308 movs r3, #8
+ 8002fd0: 77fb strb r3, [r7, #31]
+ 8002fd2: e148 b.n 8003266 <UART_SetConfig+0x34e>
+ 8002fd4: 2310 movs r3, #16
+ 8002fd6: 77fb strb r3, [r7, #31]
+ 8002fd8: bf00 nop
+ 8002fda: e144 b.n 8003266 <UART_SetConfig+0x34e>
+ 8002fdc: 687b ldr r3, [r7, #4]
+ 8002fde: 681b ldr r3, [r3, #0]
+ 8002fe0: 4a8d ldr r2, [pc, #564] ; (8003218 <UART_SetConfig+0x300>)
+ 8002fe2: 4293 cmp r3, r2
+ 8002fe4: d134 bne.n 8003050 <UART_SetConfig+0x138>
+ 8002fe6: 4b8b ldr r3, [pc, #556] ; (8003214 <UART_SetConfig+0x2fc>)
+ 8002fe8: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
+ 8002fec: f003 030c and.w r3, r3, #12
+ 8002ff0: 2b0c cmp r3, #12
+ 8002ff2: d829 bhi.n 8003048 <UART_SetConfig+0x130>
+ 8002ff4: a201 add r2, pc, #4 ; (adr r2, 8002ffc <UART_SetConfig+0xe4>)
+ 8002ff6: f852 f023 ldr.w pc, [r2, r3, lsl #2]
+ 8002ffa: bf00 nop
+ 8002ffc: 08003031 .word 0x08003031
+ 8003000: 08003049 .word 0x08003049
+ 8003004: 08003049 .word 0x08003049
+ 8003008: 08003049 .word 0x08003049
+ 800300c: 0800303d .word 0x0800303d
+ 8003010: 08003049 .word 0x08003049
+ 8003014: 08003049 .word 0x08003049
+ 8003018: 08003049 .word 0x08003049
+ 800301c: 08003037 .word 0x08003037
+ 8003020: 08003049 .word 0x08003049
+ 8003024: 08003049 .word 0x08003049
+ 8003028: 08003049 .word 0x08003049
+ 800302c: 08003043 .word 0x08003043
+ 8003030: 2300 movs r3, #0
+ 8003032: 77fb strb r3, [r7, #31]
+ 8003034: e117 b.n 8003266 <UART_SetConfig+0x34e>
+ 8003036: 2302 movs r3, #2
+ 8003038: 77fb strb r3, [r7, #31]
+ 800303a: e114 b.n 8003266 <UART_SetConfig+0x34e>
+ 800303c: 2304 movs r3, #4
+ 800303e: 77fb strb r3, [r7, #31]
+ 8003040: e111 b.n 8003266 <UART_SetConfig+0x34e>
+ 8003042: 2308 movs r3, #8
+ 8003044: 77fb strb r3, [r7, #31]
+ 8003046: e10e b.n 8003266 <UART_SetConfig+0x34e>
+ 8003048: 2310 movs r3, #16
+ 800304a: 77fb strb r3, [r7, #31]
+ 800304c: bf00 nop
+ 800304e: e10a b.n 8003266 <UART_SetConfig+0x34e>
+ 8003050: 687b ldr r3, [r7, #4]
+ 8003052: 681b ldr r3, [r3, #0]
+ 8003054: 4a71 ldr r2, [pc, #452] ; (800321c <UART_SetConfig+0x304>)
+ 8003056: 4293 cmp r3, r2
+ 8003058: d120 bne.n 800309c <UART_SetConfig+0x184>
+ 800305a: 4b6e ldr r3, [pc, #440] ; (8003214 <UART_SetConfig+0x2fc>)
+ 800305c: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
+ 8003060: f003 0330 and.w r3, r3, #48 ; 0x30
+ 8003064: 2b10 cmp r3, #16
+ 8003066: d00f beq.n 8003088 <UART_SetConfig+0x170>
+ 8003068: 2b10 cmp r3, #16
+ 800306a: d802 bhi.n 8003072 <UART_SetConfig+0x15a>
+ 800306c: 2b00 cmp r3, #0
+ 800306e: d005 beq.n 800307c <UART_SetConfig+0x164>
+ 8003070: e010 b.n 8003094 <UART_SetConfig+0x17c>
+ 8003072: 2b20 cmp r3, #32
+ 8003074: d005 beq.n 8003082 <UART_SetConfig+0x16a>
+ 8003076: 2b30 cmp r3, #48 ; 0x30
+ 8003078: d009 beq.n 800308e <UART_SetConfig+0x176>
+ 800307a: e00b b.n 8003094 <UART_SetConfig+0x17c>
+ 800307c: 2300 movs r3, #0
+ 800307e: 77fb strb r3, [r7, #31]
+ 8003080: e0f1 b.n 8003266 <UART_SetConfig+0x34e>
+ 8003082: 2302 movs r3, #2
+ 8003084: 77fb strb r3, [r7, #31]
+ 8003086: e0ee b.n 8003266 <UART_SetConfig+0x34e>
+ 8003088: 2304 movs r3, #4
+ 800308a: 77fb strb r3, [r7, #31]
+ 800308c: e0eb b.n 8003266 <UART_SetConfig+0x34e>
+ 800308e: 2308 movs r3, #8
+ 8003090: 77fb strb r3, [r7, #31]
+ 8003092: e0e8 b.n 8003266 <UART_SetConfig+0x34e>
+ 8003094: 2310 movs r3, #16
+ 8003096: 77fb strb r3, [r7, #31]
+ 8003098: bf00 nop
+ 800309a: e0e4 b.n 8003266 <UART_SetConfig+0x34e>
+ 800309c: 687b ldr r3, [r7, #4]
+ 800309e: 681b ldr r3, [r3, #0]
+ 80030a0: 4a5f ldr r2, [pc, #380] ; (8003220 <UART_SetConfig+0x308>)
+ 80030a2: 4293 cmp r3, r2
+ 80030a4: d120 bne.n 80030e8 <UART_SetConfig+0x1d0>
+ 80030a6: 4b5b ldr r3, [pc, #364] ; (8003214 <UART_SetConfig+0x2fc>)
+ 80030a8: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
+ 80030ac: f003 03c0 and.w r3, r3, #192 ; 0xc0
+ 80030b0: 2b40 cmp r3, #64 ; 0x40
+ 80030b2: d00f beq.n 80030d4 <UART_SetConfig+0x1bc>
+ 80030b4: 2b40 cmp r3, #64 ; 0x40
+ 80030b6: d802 bhi.n 80030be <UART_SetConfig+0x1a6>
+ 80030b8: 2b00 cmp r3, #0
+ 80030ba: d005 beq.n 80030c8 <UART_SetConfig+0x1b0>
+ 80030bc: e010 b.n 80030e0 <UART_SetConfig+0x1c8>
+ 80030be: 2b80 cmp r3, #128 ; 0x80
+ 80030c0: d005 beq.n 80030ce <UART_SetConfig+0x1b6>
+ 80030c2: 2bc0 cmp r3, #192 ; 0xc0
+ 80030c4: d009 beq.n 80030da <UART_SetConfig+0x1c2>
+ 80030c6: e00b b.n 80030e0 <UART_SetConfig+0x1c8>
+ 80030c8: 2300 movs r3, #0
+ 80030ca: 77fb strb r3, [r7, #31]
+ 80030cc: e0cb b.n 8003266 <UART_SetConfig+0x34e>
+ 80030ce: 2302 movs r3, #2
+ 80030d0: 77fb strb r3, [r7, #31]
+ 80030d2: e0c8 b.n 8003266 <UART_SetConfig+0x34e>
+ 80030d4: 2304 movs r3, #4
+ 80030d6: 77fb strb r3, [r7, #31]
+ 80030d8: e0c5 b.n 8003266 <UART_SetConfig+0x34e>
+ 80030da: 2308 movs r3, #8
+ 80030dc: 77fb strb r3, [r7, #31]
+ 80030de: e0c2 b.n 8003266 <UART_SetConfig+0x34e>
+ 80030e0: 2310 movs r3, #16
+ 80030e2: 77fb strb r3, [r7, #31]
+ 80030e4: bf00 nop
+ 80030e6: e0be b.n 8003266 <UART_SetConfig+0x34e>
+ 80030e8: 687b ldr r3, [r7, #4]
+ 80030ea: 681b ldr r3, [r3, #0]
+ 80030ec: 4a4d ldr r2, [pc, #308] ; (8003224 <UART_SetConfig+0x30c>)
+ 80030ee: 4293 cmp r3, r2
+ 80030f0: d124 bne.n 800313c <UART_SetConfig+0x224>
+ 80030f2: 4b48 ldr r3, [pc, #288] ; (8003214 <UART_SetConfig+0x2fc>)
+ 80030f4: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
+ 80030f8: f403 7340 and.w r3, r3, #768 ; 0x300
+ 80030fc: f5b3 7f80 cmp.w r3, #256 ; 0x100
+ 8003100: d012 beq.n 8003128 <UART_SetConfig+0x210>
+ 8003102: f5b3 7f80 cmp.w r3, #256 ; 0x100
+ 8003106: d802 bhi.n 800310e <UART_SetConfig+0x1f6>
+ 8003108: 2b00 cmp r3, #0
+ 800310a: d007 beq.n 800311c <UART_SetConfig+0x204>
+ 800310c: e012 b.n 8003134 <UART_SetConfig+0x21c>
+ 800310e: f5b3 7f00 cmp.w r3, #512 ; 0x200
+ 8003112: d006 beq.n 8003122 <UART_SetConfig+0x20a>
+ 8003114: f5b3 7f40 cmp.w r3, #768 ; 0x300
+ 8003118: d009 beq.n 800312e <UART_SetConfig+0x216>
+ 800311a: e00b b.n 8003134 <UART_SetConfig+0x21c>
+ 800311c: 2300 movs r3, #0
+ 800311e: 77fb strb r3, [r7, #31]
+ 8003120: e0a1 b.n 8003266 <UART_SetConfig+0x34e>
+ 8003122: 2302 movs r3, #2
+ 8003124: 77fb strb r3, [r7, #31]
+ 8003126: e09e b.n 8003266 <UART_SetConfig+0x34e>
+ 8003128: 2304 movs r3, #4
+ 800312a: 77fb strb r3, [r7, #31]
+ 800312c: e09b b.n 8003266 <UART_SetConfig+0x34e>
+ 800312e: 2308 movs r3, #8
+ 8003130: 77fb strb r3, [r7, #31]
+ 8003132: e098 b.n 8003266 <UART_SetConfig+0x34e>
+ 8003134: 2310 movs r3, #16
+ 8003136: 77fb strb r3, [r7, #31]
+ 8003138: bf00 nop
+ 800313a: e094 b.n 8003266 <UART_SetConfig+0x34e>
+ 800313c: 687b ldr r3, [r7, #4]
+ 800313e: 681b ldr r3, [r3, #0]
+ 8003140: 4a39 ldr r2, [pc, #228] ; (8003228 <UART_SetConfig+0x310>)
+ 8003142: 4293 cmp r3, r2
+ 8003144: d124 bne.n 8003190 <UART_SetConfig+0x278>
+ 8003146: 4b33 ldr r3, [pc, #204] ; (8003214 <UART_SetConfig+0x2fc>)
+ 8003148: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
+ 800314c: f403 6340 and.w r3, r3, #3072 ; 0xc00
+ 8003150: f5b3 6f80 cmp.w r3, #1024 ; 0x400
+ 8003154: d012 beq.n 800317c <UART_SetConfig+0x264>
+ 8003156: f5b3 6f80 cmp.w r3, #1024 ; 0x400
+ 800315a: d802 bhi.n 8003162 <UART_SetConfig+0x24a>
+ 800315c: 2b00 cmp r3, #0
+ 800315e: d007 beq.n 8003170 <UART_SetConfig+0x258>
+ 8003160: e012 b.n 8003188 <UART_SetConfig+0x270>
+ 8003162: f5b3 6f00 cmp.w r3, #2048 ; 0x800
+ 8003166: d006 beq.n 8003176 <UART_SetConfig+0x25e>
+ 8003168: f5b3 6f40 cmp.w r3, #3072 ; 0xc00
+ 800316c: d009 beq.n 8003182 <UART_SetConfig+0x26a>
+ 800316e: e00b b.n 8003188 <UART_SetConfig+0x270>
+ 8003170: 2301 movs r3, #1
+ 8003172: 77fb strb r3, [r7, #31]
+ 8003174: e077 b.n 8003266 <UART_SetConfig+0x34e>
+ 8003176: 2302 movs r3, #2
+ 8003178: 77fb strb r3, [r7, #31]
+ 800317a: e074 b.n 8003266 <UART_SetConfig+0x34e>
+ 800317c: 2304 movs r3, #4
+ 800317e: 77fb strb r3, [r7, #31]
+ 8003180: e071 b.n 8003266 <UART_SetConfig+0x34e>
+ 8003182: 2308 movs r3, #8
+ 8003184: 77fb strb r3, [r7, #31]
+ 8003186: e06e b.n 8003266 <UART_SetConfig+0x34e>
+ 8003188: 2310 movs r3, #16
+ 800318a: 77fb strb r3, [r7, #31]
+ 800318c: bf00 nop
+ 800318e: e06a b.n 8003266 <UART_SetConfig+0x34e>
+ 8003190: 687b ldr r3, [r7, #4]
+ 8003192: 681b ldr r3, [r3, #0]
+ 8003194: 4a25 ldr r2, [pc, #148] ; (800322c <UART_SetConfig+0x314>)
+ 8003196: 4293 cmp r3, r2
+ 8003198: d124 bne.n 80031e4 <UART_SetConfig+0x2cc>
+ 800319a: 4b1e ldr r3, [pc, #120] ; (8003214 <UART_SetConfig+0x2fc>)
+ 800319c: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
+ 80031a0: f403 5340 and.w r3, r3, #12288 ; 0x3000
+ 80031a4: f5b3 5f80 cmp.w r3, #4096 ; 0x1000
+ 80031a8: d012 beq.n 80031d0 <UART_SetConfig+0x2b8>
+ 80031aa: f5b3 5f80 cmp.w r3, #4096 ; 0x1000
+ 80031ae: d802 bhi.n 80031b6 <UART_SetConfig+0x29e>
+ 80031b0: 2b00 cmp r3, #0
+ 80031b2: d007 beq.n 80031c4 <UART_SetConfig+0x2ac>
+ 80031b4: e012 b.n 80031dc <UART_SetConfig+0x2c4>
+ 80031b6: f5b3 5f00 cmp.w r3, #8192 ; 0x2000
+ 80031ba: d006 beq.n 80031ca <UART_SetConfig+0x2b2>
+ 80031bc: f5b3 5f40 cmp.w r3, #12288 ; 0x3000
+ 80031c0: d009 beq.n 80031d6 <UART_SetConfig+0x2be>
+ 80031c2: e00b b.n 80031dc <UART_SetConfig+0x2c4>
+ 80031c4: 2300 movs r3, #0
+ 80031c6: 77fb strb r3, [r7, #31]
+ 80031c8: e04d b.n 8003266 <UART_SetConfig+0x34e>
+ 80031ca: 2302 movs r3, #2
+ 80031cc: 77fb strb r3, [r7, #31]
+ 80031ce: e04a b.n 8003266 <UART_SetConfig+0x34e>
+ 80031d0: 2304 movs r3, #4
+ 80031d2: 77fb strb r3, [r7, #31]
+ 80031d4: e047 b.n 8003266 <UART_SetConfig+0x34e>
+ 80031d6: 2308 movs r3, #8
+ 80031d8: 77fb strb r3, [r7, #31]
+ 80031da: e044 b.n 8003266 <UART_SetConfig+0x34e>
+ 80031dc: 2310 movs r3, #16
+ 80031de: 77fb strb r3, [r7, #31]
+ 80031e0: bf00 nop
+ 80031e2: e040 b.n 8003266 <UART_SetConfig+0x34e>
+ 80031e4: 687b ldr r3, [r7, #4]
+ 80031e6: 681b ldr r3, [r3, #0]
+ 80031e8: 4a11 ldr r2, [pc, #68] ; (8003230 <UART_SetConfig+0x318>)
+ 80031ea: 4293 cmp r3, r2
+ 80031ec: d139 bne.n 8003262 <UART_SetConfig+0x34a>
+ 80031ee: 4b09 ldr r3, [pc, #36] ; (8003214 <UART_SetConfig+0x2fc>)
+ 80031f0: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90
+ 80031f4: f403 4340 and.w r3, r3, #49152 ; 0xc000
+ 80031f8: f5b3 4f80 cmp.w r3, #16384 ; 0x4000
+ 80031fc: d027 beq.n 800324e <UART_SetConfig+0x336>
+ 80031fe: f5b3 4f80 cmp.w r3, #16384 ; 0x4000
+ 8003202: d817 bhi.n 8003234 <UART_SetConfig+0x31c>
+ 8003204: 2b00 cmp r3, #0
+ 8003206: d01c beq.n 8003242 <UART_SetConfig+0x32a>
+ 8003208: e027 b.n 800325a <UART_SetConfig+0x342>
+ 800320a: bf00 nop
+ 800320c: efff69f3 .word 0xefff69f3
+ 8003210: 40011000 .word 0x40011000
+ 8003214: 40023800 .word 0x40023800
+ 8003218: 40004400 .word 0x40004400
+ 800321c: 40004800 .word 0x40004800
+ 8003220: 40004c00 .word 0x40004c00
+ 8003224: 40005000 .word 0x40005000
+ 8003228: 40011400 .word 0x40011400
+ 800322c: 40007800 .word 0x40007800
+ 8003230: 40007c00 .word 0x40007c00
+ 8003234: f5b3 4f00 cmp.w r3, #32768 ; 0x8000
+ 8003238: d006 beq.n 8003248 <UART_SetConfig+0x330>
+ 800323a: f5b3 4f40 cmp.w r3, #49152 ; 0xc000
+ 800323e: d009 beq.n 8003254 <UART_SetConfig+0x33c>
+ 8003240: e00b b.n 800325a <UART_SetConfig+0x342>
+ 8003242: 2300 movs r3, #0
+ 8003244: 77fb strb r3, [r7, #31]
+ 8003246: e00e b.n 8003266 <UART_SetConfig+0x34e>
+ 8003248: 2302 movs r3, #2
+ 800324a: 77fb strb r3, [r7, #31]
+ 800324c: e00b b.n 8003266 <UART_SetConfig+0x34e>
+ 800324e: 2304 movs r3, #4
+ 8003250: 77fb strb r3, [r7, #31]
+ 8003252: e008 b.n 8003266 <UART_SetConfig+0x34e>
+ 8003254: 2308 movs r3, #8
+ 8003256: 77fb strb r3, [r7, #31]
+ 8003258: e005 b.n 8003266 <UART_SetConfig+0x34e>
+ 800325a: 2310 movs r3, #16
+ 800325c: 77fb strb r3, [r7, #31]
+ 800325e: bf00 nop
+ 8003260: e001 b.n 8003266 <UART_SetConfig+0x34e>
+ 8003262: 2310 movs r3, #16
+ 8003264: 77fb strb r3, [r7, #31]
if (huart->Init.OverSampling == UART_OVERSAMPLING_8)
- 80025ae: 687b ldr r3, [r7, #4]
- 80025b0: 69db ldr r3, [r3, #28]
- 80025b2: f5b3 4f00 cmp.w r3, #32768 ; 0x8000
- 80025b6: d17c bne.n 80026b2 <UART_SetConfig+0x452>
+ 8003266: 687b ldr r3, [r7, #4]
+ 8003268: 69db ldr r3, [r3, #28]
+ 800326a: f5b3 4f00 cmp.w r3, #32768 ; 0x8000
+ 800326e: d17c bne.n 800336a <UART_SetConfig+0x452>
{
switch (clocksource)
- 80025b8: 7ffb ldrb r3, [r7, #31]
- 80025ba: 2b08 cmp r3, #8
- 80025bc: d859 bhi.n 8002672 <UART_SetConfig+0x412>
- 80025be: a201 add r2, pc, #4 ; (adr r2, 80025c4 <UART_SetConfig+0x364>)
- 80025c0: f852 f023 ldr.w pc, [r2, r3, lsl #2]
- 80025c4: 080025e9 .word 0x080025e9
- 80025c8: 08002607 .word 0x08002607
- 80025cc: 08002625 .word 0x08002625
- 80025d0: 08002673 .word 0x08002673
- 80025d4: 0800263d .word 0x0800263d
- 80025d8: 08002673 .word 0x08002673
- 80025dc: 08002673 .word 0x08002673
- 80025e0: 08002673 .word 0x08002673
- 80025e4: 0800265b .word 0x0800265b
+ 8003270: 7ffb ldrb r3, [r7, #31]
+ 8003272: 2b08 cmp r3, #8
+ 8003274: d859 bhi.n 800332a <UART_SetConfig+0x412>
+ 8003276: a201 add r2, pc, #4 ; (adr r2, 800327c <UART_SetConfig+0x364>)
+ 8003278: f852 f023 ldr.w pc, [r2, r3, lsl #2]
+ 800327c: 080032a1 .word 0x080032a1
+ 8003280: 080032bf .word 0x080032bf
+ 8003284: 080032dd .word 0x080032dd
+ 8003288: 0800332b .word 0x0800332b
+ 800328c: 080032f5 .word 0x080032f5
+ 8003290: 0800332b .word 0x0800332b
+ 8003294: 0800332b .word 0x0800332b
+ 8003298: 0800332b .word 0x0800332b
+ 800329c: 08003313 .word 0x08003313
{
case UART_CLOCKSOURCE_PCLK1:
usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate));
- 80025e8: f7ff f90c bl 8001804 <HAL_RCC_GetPCLK1Freq>
- 80025ec: 4603 mov r3, r0
- 80025ee: 005a lsls r2, r3, #1
- 80025f0: 687b ldr r3, [r7, #4]
- 80025f2: 685b ldr r3, [r3, #4]
- 80025f4: 085b lsrs r3, r3, #1
- 80025f6: 441a add r2, r3
- 80025f8: 687b ldr r3, [r7, #4]
- 80025fa: 685b ldr r3, [r3, #4]
- 80025fc: fbb2 f3f3 udiv r3, r2, r3
- 8002600: b29b uxth r3, r3
- 8002602: 61bb str r3, [r7, #24]
+ 80032a0: f7fe fb64 bl 800196c <HAL_RCC_GetPCLK1Freq>
+ 80032a4: 4603 mov r3, r0
+ 80032a6: 005a lsls r2, r3, #1
+ 80032a8: 687b ldr r3, [r7, #4]
+ 80032aa: 685b ldr r3, [r3, #4]
+ 80032ac: 085b lsrs r3, r3, #1
+ 80032ae: 441a add r2, r3
+ 80032b0: 687b ldr r3, [r7, #4]
+ 80032b2: 685b ldr r3, [r3, #4]
+ 80032b4: fbb2 f3f3 udiv r3, r2, r3
+ 80032b8: b29b uxth r3, r3
+ 80032ba: 61bb str r3, [r7, #24]
break;
- 8002604: e038 b.n 8002678 <UART_SetConfig+0x418>
+ 80032bc: e038 b.n 8003330 <UART_SetConfig+0x418>
case UART_CLOCKSOURCE_PCLK2:
usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate));
- 8002606: f7ff f911 bl 800182c <HAL_RCC_GetPCLK2Freq>
- 800260a: 4603 mov r3, r0
- 800260c: 005a lsls r2, r3, #1
- 800260e: 687b ldr r3, [r7, #4]
- 8002610: 685b ldr r3, [r3, #4]
- 8002612: 085b lsrs r3, r3, #1
- 8002614: 441a add r2, r3
- 8002616: 687b ldr r3, [r7, #4]
- 8002618: 685b ldr r3, [r3, #4]
- 800261a: fbb2 f3f3 udiv r3, r2, r3
- 800261e: b29b uxth r3, r3
- 8002620: 61bb str r3, [r7, #24]
+ 80032be: f7fe fb69 bl 8001994 <HAL_RCC_GetPCLK2Freq>
+ 80032c2: 4603 mov r3, r0
+ 80032c4: 005a lsls r2, r3, #1
+ 80032c6: 687b ldr r3, [r7, #4]
+ 80032c8: 685b ldr r3, [r3, #4]
+ 80032ca: 085b lsrs r3, r3, #1
+ 80032cc: 441a add r2, r3
+ 80032ce: 687b ldr r3, [r7, #4]
+ 80032d0: 685b ldr r3, [r3, #4]
+ 80032d2: fbb2 f3f3 udiv r3, r2, r3
+ 80032d6: b29b uxth r3, r3
+ 80032d8: 61bb str r3, [r7, #24]
break;
- 8002622: e029 b.n 8002678 <UART_SetConfig+0x418>
+ 80032da: e029 b.n 8003330 <UART_SetConfig+0x418>
case UART_CLOCKSOURCE_HSI:
usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HSI_VALUE, huart->Init.BaudRate));
- 8002624: 687b ldr r3, [r7, #4]
- 8002626: 685b ldr r3, [r3, #4]
- 8002628: 085a lsrs r2, r3, #1
- 800262a: 4b5d ldr r3, [pc, #372] ; (80027a0 <UART_SetConfig+0x540>)
- 800262c: 4413 add r3, r2
- 800262e: 687a ldr r2, [r7, #4]
- 8002630: 6852 ldr r2, [r2, #4]
- 8002632: fbb3 f3f2 udiv r3, r3, r2
- 8002636: b29b uxth r3, r3
- 8002638: 61bb str r3, [r7, #24]
+ 80032dc: 687b ldr r3, [r7, #4]
+ 80032de: 685b ldr r3, [r3, #4]
+ 80032e0: 085a lsrs r2, r3, #1
+ 80032e2: 4b5d ldr r3, [pc, #372] ; (8003458 <UART_SetConfig+0x540>)
+ 80032e4: 4413 add r3, r2
+ 80032e6: 687a ldr r2, [r7, #4]
+ 80032e8: 6852 ldr r2, [r2, #4]
+ 80032ea: fbb3 f3f2 udiv r3, r3, r2
+ 80032ee: b29b uxth r3, r3
+ 80032f0: 61bb str r3, [r7, #24]
break;
- 800263a: e01d b.n 8002678 <UART_SetConfig+0x418>
+ 80032f2: e01d b.n 8003330 <UART_SetConfig+0x418>
case UART_CLOCKSOURCE_SYSCLK:
usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HAL_RCC_GetSysClockFreq(), huart->Init.BaudRate));
- 800263c: f7ff f824 bl 8001688 <HAL_RCC_GetSysClockFreq>
- 8002640: 4603 mov r3, r0
- 8002642: 005a lsls r2, r3, #1
- 8002644: 687b ldr r3, [r7, #4]
- 8002646: 685b ldr r3, [r3, #4]
- 8002648: 085b lsrs r3, r3, #1
- 800264a: 441a add r2, r3
- 800264c: 687b ldr r3, [r7, #4]
- 800264e: 685b ldr r3, [r3, #4]
- 8002650: fbb2 f3f3 udiv r3, r2, r3
- 8002654: b29b uxth r3, r3
- 8002656: 61bb str r3, [r7, #24]
+ 80032f4: f7fe fa7c bl 80017f0 <HAL_RCC_GetSysClockFreq>
+ 80032f8: 4603 mov r3, r0
+ 80032fa: 005a lsls r2, r3, #1
+ 80032fc: 687b ldr r3, [r7, #4]
+ 80032fe: 685b ldr r3, [r3, #4]
+ 8003300: 085b lsrs r3, r3, #1
+ 8003302: 441a add r2, r3
+ 8003304: 687b ldr r3, [r7, #4]
+ 8003306: 685b ldr r3, [r3, #4]
+ 8003308: fbb2 f3f3 udiv r3, r2, r3
+ 800330c: b29b uxth r3, r3
+ 800330e: 61bb str r3, [r7, #24]
break;
- 8002658: e00e b.n 8002678 <UART_SetConfig+0x418>
+ 8003310: e00e b.n 8003330 <UART_SetConfig+0x418>
case UART_CLOCKSOURCE_LSE:
usartdiv = (uint16_t)(UART_DIV_SAMPLING8(LSE_VALUE, huart->Init.BaudRate));
- 800265a: 687b ldr r3, [r7, #4]
- 800265c: 685b ldr r3, [r3, #4]
- 800265e: 085b lsrs r3, r3, #1
- 8002660: f503 3280 add.w r2, r3, #65536 ; 0x10000
- 8002664: 687b ldr r3, [r7, #4]
- 8002666: 685b ldr r3, [r3, #4]
- 8002668: fbb2 f3f3 udiv r3, r2, r3
- 800266c: b29b uxth r3, r3
- 800266e: 61bb str r3, [r7, #24]
+ 8003312: 687b ldr r3, [r7, #4]
+ 8003314: 685b ldr r3, [r3, #4]
+ 8003316: 085b lsrs r3, r3, #1
+ 8003318: f503 3280 add.w r2, r3, #65536 ; 0x10000
+ 800331c: 687b ldr r3, [r7, #4]
+ 800331e: 685b ldr r3, [r3, #4]
+ 8003320: fbb2 f3f3 udiv r3, r2, r3
+ 8003324: b29b uxth r3, r3
+ 8003326: 61bb str r3, [r7, #24]
break;
- 8002670: e002 b.n 8002678 <UART_SetConfig+0x418>
+ 8003328: e002 b.n 8003330 <UART_SetConfig+0x418>
case UART_CLOCKSOURCE_UNDEFINED:
default:
ret = HAL_ERROR;
- 8002672: 2301 movs r3, #1
- 8002674: 75fb strb r3, [r7, #23]
+ 800332a: 2301 movs r3, #1
+ 800332c: 75fb strb r3, [r7, #23]
break;
- 8002676: bf00 nop
+ 800332e: bf00 nop
}
/* USARTDIV must be greater than or equal to 0d16 */
if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
- 8002678: 69bb ldr r3, [r7, #24]
- 800267a: 2b0f cmp r3, #15
- 800267c: d916 bls.n 80026ac <UART_SetConfig+0x44c>
- 800267e: 69bb ldr r3, [r7, #24]
- 8002680: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
- 8002684: d212 bcs.n 80026ac <UART_SetConfig+0x44c>
+ 8003330: 69bb ldr r3, [r7, #24]
+ 8003332: 2b0f cmp r3, #15
+ 8003334: d916 bls.n 8003364 <UART_SetConfig+0x44c>
+ 8003336: 69bb ldr r3, [r7, #24]
+ 8003338: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
+ 800333c: d212 bcs.n 8003364 <UART_SetConfig+0x44c>
{
brrtemp = (uint16_t)(usartdiv & 0xFFF0U);
- 8002686: 69bb ldr r3, [r7, #24]
- 8002688: b29b uxth r3, r3
- 800268a: f023 030f bic.w r3, r3, #15
- 800268e: 81fb strh r3, [r7, #14]
+ 800333e: 69bb ldr r3, [r7, #24]
+ 8003340: b29b uxth r3, r3
+ 8003342: f023 030f bic.w r3, r3, #15
+ 8003346: 81fb strh r3, [r7, #14]
brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U);
- 8002690: 69bb ldr r3, [r7, #24]
- 8002692: 085b lsrs r3, r3, #1
- 8002694: b29b uxth r3, r3
- 8002696: f003 0307 and.w r3, r3, #7
- 800269a: b29a uxth r2, r3
- 800269c: 89fb ldrh r3, [r7, #14]
- 800269e: 4313 orrs r3, r2
- 80026a0: 81fb strh r3, [r7, #14]
+ 8003348: 69bb ldr r3, [r7, #24]
+ 800334a: 085b lsrs r3, r3, #1
+ 800334c: b29b uxth r3, r3
+ 800334e: f003 0307 and.w r3, r3, #7
+ 8003352: b29a uxth r2, r3
+ 8003354: 89fb ldrh r3, [r7, #14]
+ 8003356: 4313 orrs r3, r2
+ 8003358: 81fb strh r3, [r7, #14]
huart->Instance->BRR = brrtemp;
- 80026a2: 687b ldr r3, [r7, #4]
- 80026a4: 681b ldr r3, [r3, #0]
- 80026a6: 89fa ldrh r2, [r7, #14]
- 80026a8: 60da str r2, [r3, #12]
- 80026aa: e06e b.n 800278a <UART_SetConfig+0x52a>
+ 800335a: 687b ldr r3, [r7, #4]
+ 800335c: 681b ldr r3, [r3, #0]
+ 800335e: 89fa ldrh r2, [r7, #14]
+ 8003360: 60da str r2, [r3, #12]
+ 8003362: e06e b.n 8003442 <UART_SetConfig+0x52a>
}
else
{
ret = HAL_ERROR;
- 80026ac: 2301 movs r3, #1
- 80026ae: 75fb strb r3, [r7, #23]
- 80026b0: e06b b.n 800278a <UART_SetConfig+0x52a>
+ 8003364: 2301 movs r3, #1
+ 8003366: 75fb strb r3, [r7, #23]
+ 8003368: e06b b.n 8003442 <UART_SetConfig+0x52a>
}
}
else
{
switch (clocksource)
- 80026b2: 7ffb ldrb r3, [r7, #31]
- 80026b4: 2b08 cmp r3, #8
- 80026b6: d857 bhi.n 8002768 <UART_SetConfig+0x508>
- 80026b8: a201 add r2, pc, #4 ; (adr r2, 80026c0 <UART_SetConfig+0x460>)
- 80026ba: f852 f023 ldr.w pc, [r2, r3, lsl #2]
- 80026be: bf00 nop
- 80026c0: 080026e5 .word 0x080026e5
- 80026c4: 08002701 .word 0x08002701
- 80026c8: 0800271d .word 0x0800271d
- 80026cc: 08002769 .word 0x08002769
- 80026d0: 08002735 .word 0x08002735
- 80026d4: 08002769 .word 0x08002769
- 80026d8: 08002769 .word 0x08002769
- 80026dc: 08002769 .word 0x08002769
- 80026e0: 08002751 .word 0x08002751
+ 800336a: 7ffb ldrb r3, [r7, #31]
+ 800336c: 2b08 cmp r3, #8
+ 800336e: d857 bhi.n 8003420 <UART_SetConfig+0x508>
+ 8003370: a201 add r2, pc, #4 ; (adr r2, 8003378 <UART_SetConfig+0x460>)
+ 8003372: f852 f023 ldr.w pc, [r2, r3, lsl #2]
+ 8003376: bf00 nop
+ 8003378: 0800339d .word 0x0800339d
+ 800337c: 080033b9 .word 0x080033b9
+ 8003380: 080033d5 .word 0x080033d5
+ 8003384: 08003421 .word 0x08003421
+ 8003388: 080033ed .word 0x080033ed
+ 800338c: 08003421 .word 0x08003421
+ 8003390: 08003421 .word 0x08003421
+ 8003394: 08003421 .word 0x08003421
+ 8003398: 08003409 .word 0x08003409
{
case UART_CLOCKSOURCE_PCLK1:
usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate));
- 80026e4: f7ff f88e bl 8001804 <HAL_RCC_GetPCLK1Freq>
- 80026e8: 4602 mov r2, r0
- 80026ea: 687b ldr r3, [r7, #4]
- 80026ec: 685b ldr r3, [r3, #4]
- 80026ee: 085b lsrs r3, r3, #1
- 80026f0: 441a add r2, r3
- 80026f2: 687b ldr r3, [r7, #4]
- 80026f4: 685b ldr r3, [r3, #4]
- 80026f6: fbb2 f3f3 udiv r3, r2, r3
- 80026fa: b29b uxth r3, r3
- 80026fc: 61bb str r3, [r7, #24]
+ 800339c: f7fe fae6 bl 800196c <HAL_RCC_GetPCLK1Freq>
+ 80033a0: 4602 mov r2, r0
+ 80033a2: 687b ldr r3, [r7, #4]
+ 80033a4: 685b ldr r3, [r3, #4]
+ 80033a6: 085b lsrs r3, r3, #1
+ 80033a8: 441a add r2, r3
+ 80033aa: 687b ldr r3, [r7, #4]
+ 80033ac: 685b ldr r3, [r3, #4]
+ 80033ae: fbb2 f3f3 udiv r3, r2, r3
+ 80033b2: b29b uxth r3, r3
+ 80033b4: 61bb str r3, [r7, #24]
break;
- 80026fe: e036 b.n 800276e <UART_SetConfig+0x50e>
+ 80033b6: e036 b.n 8003426 <UART_SetConfig+0x50e>
case UART_CLOCKSOURCE_PCLK2:
usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate));
- 8002700: f7ff f894 bl 800182c <HAL_RCC_GetPCLK2Freq>
- 8002704: 4602 mov r2, r0
- 8002706: 687b ldr r3, [r7, #4]
- 8002708: 685b ldr r3, [r3, #4]
- 800270a: 085b lsrs r3, r3, #1
- 800270c: 441a add r2, r3
- 800270e: 687b ldr r3, [r7, #4]
- 8002710: 685b ldr r3, [r3, #4]
- 8002712: fbb2 f3f3 udiv r3, r2, r3
- 8002716: b29b uxth r3, r3
- 8002718: 61bb str r3, [r7, #24]
+ 80033b8: f7fe faec bl 8001994 <HAL_RCC_GetPCLK2Freq>
+ 80033bc: 4602 mov r2, r0
+ 80033be: 687b ldr r3, [r7, #4]
+ 80033c0: 685b ldr r3, [r3, #4]
+ 80033c2: 085b lsrs r3, r3, #1
+ 80033c4: 441a add r2, r3
+ 80033c6: 687b ldr r3, [r7, #4]
+ 80033c8: 685b ldr r3, [r3, #4]
+ 80033ca: fbb2 f3f3 udiv r3, r2, r3
+ 80033ce: b29b uxth r3, r3
+ 80033d0: 61bb str r3, [r7, #24]
break;
- 800271a: e028 b.n 800276e <UART_SetConfig+0x50e>
+ 80033d2: e028 b.n 8003426 <UART_SetConfig+0x50e>
case UART_CLOCKSOURCE_HSI:
usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HSI_VALUE, huart->Init.BaudRate));
- 800271c: 687b ldr r3, [r7, #4]
- 800271e: 685b ldr r3, [r3, #4]
- 8002720: 085a lsrs r2, r3, #1
- 8002722: 4b20 ldr r3, [pc, #128] ; (80027a4 <UART_SetConfig+0x544>)
- 8002724: 4413 add r3, r2
- 8002726: 687a ldr r2, [r7, #4]
- 8002728: 6852 ldr r2, [r2, #4]
- 800272a: fbb3 f3f2 udiv r3, r3, r2
- 800272e: b29b uxth r3, r3
- 8002730: 61bb str r3, [r7, #24]
+ 80033d4: 687b ldr r3, [r7, #4]
+ 80033d6: 685b ldr r3, [r3, #4]
+ 80033d8: 085a lsrs r2, r3, #1
+ 80033da: 4b20 ldr r3, [pc, #128] ; (800345c <UART_SetConfig+0x544>)
+ 80033dc: 4413 add r3, r2
+ 80033de: 687a ldr r2, [r7, #4]
+ 80033e0: 6852 ldr r2, [r2, #4]
+ 80033e2: fbb3 f3f2 udiv r3, r3, r2
+ 80033e6: b29b uxth r3, r3
+ 80033e8: 61bb str r3, [r7, #24]
break;
- 8002732: e01c b.n 800276e <UART_SetConfig+0x50e>
+ 80033ea: e01c b.n 8003426 <UART_SetConfig+0x50e>
case UART_CLOCKSOURCE_SYSCLK:
usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetSysClockFreq(), huart->Init.BaudRate));
- 8002734: f7fe ffa8 bl 8001688 <HAL_RCC_GetSysClockFreq>
- 8002738: 4602 mov r2, r0
- 800273a: 687b ldr r3, [r7, #4]
- 800273c: 685b ldr r3, [r3, #4]
- 800273e: 085b lsrs r3, r3, #1
- 8002740: 441a add r2, r3
- 8002742: 687b ldr r3, [r7, #4]
- 8002744: 685b ldr r3, [r3, #4]
- 8002746: fbb2 f3f3 udiv r3, r2, r3
- 800274a: b29b uxth r3, r3
- 800274c: 61bb str r3, [r7, #24]
+ 80033ec: f7fe fa00 bl 80017f0 <HAL_RCC_GetSysClockFreq>
+ 80033f0: 4602 mov r2, r0
+ 80033f2: 687b ldr r3, [r7, #4]
+ 80033f4: 685b ldr r3, [r3, #4]
+ 80033f6: 085b lsrs r3, r3, #1
+ 80033f8: 441a add r2, r3
+ 80033fa: 687b ldr r3, [r7, #4]
+ 80033fc: 685b ldr r3, [r3, #4]
+ 80033fe: fbb2 f3f3 udiv r3, r2, r3
+ 8003402: b29b uxth r3, r3
+ 8003404: 61bb str r3, [r7, #24]
break;
- 800274e: e00e b.n 800276e <UART_SetConfig+0x50e>
+ 8003406: e00e b.n 8003426 <UART_SetConfig+0x50e>
case UART_CLOCKSOURCE_LSE:
usartdiv = (uint16_t)(UART_DIV_SAMPLING16(LSE_VALUE, huart->Init.BaudRate));
- 8002750: 687b ldr r3, [r7, #4]
- 8002752: 685b ldr r3, [r3, #4]
- 8002754: 085b lsrs r3, r3, #1
- 8002756: f503 4200 add.w r2, r3, #32768 ; 0x8000
- 800275a: 687b ldr r3, [r7, #4]
- 800275c: 685b ldr r3, [r3, #4]
- 800275e: fbb2 f3f3 udiv r3, r2, r3
- 8002762: b29b uxth r3, r3
- 8002764: 61bb str r3, [r7, #24]
+ 8003408: 687b ldr r3, [r7, #4]
+ 800340a: 685b ldr r3, [r3, #4]
+ 800340c: 085b lsrs r3, r3, #1
+ 800340e: f503 4200 add.w r2, r3, #32768 ; 0x8000
+ 8003412: 687b ldr r3, [r7, #4]
+ 8003414: 685b ldr r3, [r3, #4]
+ 8003416: fbb2 f3f3 udiv r3, r2, r3
+ 800341a: b29b uxth r3, r3
+ 800341c: 61bb str r3, [r7, #24]
break;
- 8002766: e002 b.n 800276e <UART_SetConfig+0x50e>
+ 800341e: e002 b.n 8003426 <UART_SetConfig+0x50e>
case UART_CLOCKSOURCE_UNDEFINED:
default:
ret = HAL_ERROR;
- 8002768: 2301 movs r3, #1
- 800276a: 75fb strb r3, [r7, #23]
+ 8003420: 2301 movs r3, #1
+ 8003422: 75fb strb r3, [r7, #23]
break;
- 800276c: bf00 nop
+ 8003424: bf00 nop
}
/* USARTDIV must be greater than or equal to 0d16 */
if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
- 800276e: 69bb ldr r3, [r7, #24]
- 8002770: 2b0f cmp r3, #15
- 8002772: d908 bls.n 8002786 <UART_SetConfig+0x526>
- 8002774: 69bb ldr r3, [r7, #24]
- 8002776: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
- 800277a: d204 bcs.n 8002786 <UART_SetConfig+0x526>
+ 8003426: 69bb ldr r3, [r7, #24]
+ 8003428: 2b0f cmp r3, #15
+ 800342a: d908 bls.n 800343e <UART_SetConfig+0x526>
+ 800342c: 69bb ldr r3, [r7, #24]
+ 800342e: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
+ 8003432: d204 bcs.n 800343e <UART_SetConfig+0x526>
{
huart->Instance->BRR = usartdiv;
- 800277c: 687b ldr r3, [r7, #4]
- 800277e: 681b ldr r3, [r3, #0]
- 8002780: 69ba ldr r2, [r7, #24]
- 8002782: 60da str r2, [r3, #12]
- 8002784: e001 b.n 800278a <UART_SetConfig+0x52a>
+ 8003434: 687b ldr r3, [r7, #4]
+ 8003436: 681b ldr r3, [r3, #0]
+ 8003438: 69ba ldr r2, [r7, #24]
+ 800343a: 60da str r2, [r3, #12]
+ 800343c: e001 b.n 8003442 <UART_SetConfig+0x52a>
}
else
{
ret = HAL_ERROR;
- 8002786: 2301 movs r3, #1
- 8002788: 75fb strb r3, [r7, #23]
+ 800343e: 2301 movs r3, #1
+ 8003440: 75fb strb r3, [r7, #23]
}
}
/* Clear ISR function pointers */
huart->RxISR = NULL;
- 800278a: 687b ldr r3, [r7, #4]
- 800278c: 2200 movs r2, #0
- 800278e: 661a str r2, [r3, #96] ; 0x60
+ 8003442: 687b ldr r3, [r7, #4]
+ 8003444: 2200 movs r2, #0
+ 8003446: 661a str r2, [r3, #96] ; 0x60
huart->TxISR = NULL;
- 8002790: 687b ldr r3, [r7, #4]
- 8002792: 2200 movs r2, #0
- 8002794: 665a str r2, [r3, #100] ; 0x64
+ 8003448: 687b ldr r3, [r7, #4]
+ 800344a: 2200 movs r2, #0
+ 800344c: 665a str r2, [r3, #100] ; 0x64
return ret;
- 8002796: 7dfb ldrb r3, [r7, #23]
+ 800344e: 7dfb ldrb r3, [r7, #23]
}
- 8002798: 4618 mov r0, r3
- 800279a: 3720 adds r7, #32
- 800279c: 46bd mov sp, r7
- 800279e: bd80 pop {r7, pc}
- 80027a0: 01e84800 .word 0x01e84800
- 80027a4: 00f42400 .word 0x00f42400
-
-080027a8 <UART_AdvFeatureConfig>:
+ 8003450: 4618 mov r0, r3
+ 8003452: 3720 adds r7, #32
+ 8003454: 46bd mov sp, r7
+ 8003456: bd80 pop {r7, pc}
+ 8003458: 01e84800 .word 0x01e84800
+ 800345c: 00f42400 .word 0x00f42400
+
+08003460 <UART_AdvFeatureConfig>:
* @brief Configure the UART peripheral advanced features.
* @param huart UART handle.
* @retval None
*/
void UART_AdvFeatureConfig(UART_HandleTypeDef *huart)
{
- 80027a8: b480 push {r7}
- 80027aa: b083 sub sp, #12
- 80027ac: af00 add r7, sp, #0
- 80027ae: 6078 str r0, [r7, #4]
+ 8003460: b480 push {r7}
+ 8003462: b083 sub sp, #12
+ 8003464: af00 add r7, sp, #0
+ 8003466: 6078 str r0, [r7, #4]
/* Check whether the set of advanced features to configure is properly set */
assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit));
/* if required, configure TX pin active level inversion */
if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT))
- 80027b0: 687b ldr r3, [r7, #4]
- 80027b2: 6a5b ldr r3, [r3, #36] ; 0x24
- 80027b4: f003 0301 and.w r3, r3, #1
- 80027b8: 2b00 cmp r3, #0
- 80027ba: d00a beq.n 80027d2 <UART_AdvFeatureConfig+0x2a>
+ 8003468: 687b ldr r3, [r7, #4]
+ 800346a: 6a5b ldr r3, [r3, #36] ; 0x24
+ 800346c: f003 0301 and.w r3, r3, #1
+ 8003470: 2b00 cmp r3, #0
+ 8003472: d00a beq.n 800348a <UART_AdvFeatureConfig+0x2a>
{
assert_param(IS_UART_ADVFEATURE_TXINV(huart->AdvancedInit.TxPinLevelInvert));
MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert);
- 80027bc: 687b ldr r3, [r7, #4]
- 80027be: 681b ldr r3, [r3, #0]
- 80027c0: 685b ldr r3, [r3, #4]
- 80027c2: f423 3100 bic.w r1, r3, #131072 ; 0x20000
- 80027c6: 687b ldr r3, [r7, #4]
- 80027c8: 6a9a ldr r2, [r3, #40] ; 0x28
- 80027ca: 687b ldr r3, [r7, #4]
- 80027cc: 681b ldr r3, [r3, #0]
- 80027ce: 430a orrs r2, r1
- 80027d0: 605a str r2, [r3, #4]
+ 8003474: 687b ldr r3, [r7, #4]
+ 8003476: 681b ldr r3, [r3, #0]
+ 8003478: 685b ldr r3, [r3, #4]
+ 800347a: f423 3100 bic.w r1, r3, #131072 ; 0x20000
+ 800347e: 687b ldr r3, [r7, #4]
+ 8003480: 6a9a ldr r2, [r3, #40] ; 0x28
+ 8003482: 687b ldr r3, [r7, #4]
+ 8003484: 681b ldr r3, [r3, #0]
+ 8003486: 430a orrs r2, r1
+ 8003488: 605a str r2, [r3, #4]
}
/* if required, configure RX pin active level inversion */
if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXINVERT_INIT))
- 80027d2: 687b ldr r3, [r7, #4]
- 80027d4: 6a5b ldr r3, [r3, #36] ; 0x24
- 80027d6: f003 0302 and.w r3, r3, #2
- 80027da: 2b00 cmp r3, #0
- 80027dc: d00a beq.n 80027f4 <UART_AdvFeatureConfig+0x4c>
+ 800348a: 687b ldr r3, [r7, #4]
+ 800348c: 6a5b ldr r3, [r3, #36] ; 0x24
+ 800348e: f003 0302 and.w r3, r3, #2
+ 8003492: 2b00 cmp r3, #0
+ 8003494: d00a beq.n 80034ac <UART_AdvFeatureConfig+0x4c>
{
assert_param(IS_UART_ADVFEATURE_RXINV(huart->AdvancedInit.RxPinLevelInvert));
MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert);
- 80027de: 687b ldr r3, [r7, #4]
- 80027e0: 681b ldr r3, [r3, #0]
- 80027e2: 685b ldr r3, [r3, #4]
- 80027e4: f423 3180 bic.w r1, r3, #65536 ; 0x10000
- 80027e8: 687b ldr r3, [r7, #4]
- 80027ea: 6ada ldr r2, [r3, #44] ; 0x2c
- 80027ec: 687b ldr r3, [r7, #4]
- 80027ee: 681b ldr r3, [r3, #0]
- 80027f0: 430a orrs r2, r1
- 80027f2: 605a str r2, [r3, #4]
+ 8003496: 687b ldr r3, [r7, #4]
+ 8003498: 681b ldr r3, [r3, #0]
+ 800349a: 685b ldr r3, [r3, #4]
+ 800349c: f423 3180 bic.w r1, r3, #65536 ; 0x10000
+ 80034a0: 687b ldr r3, [r7, #4]
+ 80034a2: 6ada ldr r2, [r3, #44] ; 0x2c
+ 80034a4: 687b ldr r3, [r7, #4]
+ 80034a6: 681b ldr r3, [r3, #0]
+ 80034a8: 430a orrs r2, r1
+ 80034aa: 605a str r2, [r3, #4]
}
/* if required, configure data inversion */
if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DATAINVERT_INIT))
- 80027f4: 687b ldr r3, [r7, #4]
- 80027f6: 6a5b ldr r3, [r3, #36] ; 0x24
- 80027f8: f003 0304 and.w r3, r3, #4
- 80027fc: 2b00 cmp r3, #0
- 80027fe: d00a beq.n 8002816 <UART_AdvFeatureConfig+0x6e>
+ 80034ac: 687b ldr r3, [r7, #4]
+ 80034ae: 6a5b ldr r3, [r3, #36] ; 0x24
+ 80034b0: f003 0304 and.w r3, r3, #4
+ 80034b4: 2b00 cmp r3, #0
+ 80034b6: d00a beq.n 80034ce <UART_AdvFeatureConfig+0x6e>
{
assert_param(IS_UART_ADVFEATURE_DATAINV(huart->AdvancedInit.DataInvert));
MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert);
- 8002800: 687b ldr r3, [r7, #4]
- 8002802: 681b ldr r3, [r3, #0]
- 8002804: 685b ldr r3, [r3, #4]
- 8002806: f423 2180 bic.w r1, r3, #262144 ; 0x40000
- 800280a: 687b ldr r3, [r7, #4]
- 800280c: 6b1a ldr r2, [r3, #48] ; 0x30
- 800280e: 687b ldr r3, [r7, #4]
- 8002810: 681b ldr r3, [r3, #0]
- 8002812: 430a orrs r2, r1
- 8002814: 605a str r2, [r3, #4]
+ 80034b8: 687b ldr r3, [r7, #4]
+ 80034ba: 681b ldr r3, [r3, #0]
+ 80034bc: 685b ldr r3, [r3, #4]
+ 80034be: f423 2180 bic.w r1, r3, #262144 ; 0x40000
+ 80034c2: 687b ldr r3, [r7, #4]
+ 80034c4: 6b1a ldr r2, [r3, #48] ; 0x30
+ 80034c6: 687b ldr r3, [r7, #4]
+ 80034c8: 681b ldr r3, [r3, #0]
+ 80034ca: 430a orrs r2, r1
+ 80034cc: 605a str r2, [r3, #4]
}
/* if required, configure RX/TX pins swap */
if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT))
- 8002816: 687b ldr r3, [r7, #4]
- 8002818: 6a5b ldr r3, [r3, #36] ; 0x24
- 800281a: f003 0308 and.w r3, r3, #8
- 800281e: 2b00 cmp r3, #0
- 8002820: d00a beq.n 8002838 <UART_AdvFeatureConfig+0x90>
+ 80034ce: 687b ldr r3, [r7, #4]
+ 80034d0: 6a5b ldr r3, [r3, #36] ; 0x24
+ 80034d2: f003 0308 and.w r3, r3, #8
+ 80034d6: 2b00 cmp r3, #0
+ 80034d8: d00a beq.n 80034f0 <UART_AdvFeatureConfig+0x90>
{
assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap));
MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap);
- 8002822: 687b ldr r3, [r7, #4]
- 8002824: 681b ldr r3, [r3, #0]
- 8002826: 685b ldr r3, [r3, #4]
- 8002828: f423 4100 bic.w r1, r3, #32768 ; 0x8000
- 800282c: 687b ldr r3, [r7, #4]
- 800282e: 6b5a ldr r2, [r3, #52] ; 0x34
- 8002830: 687b ldr r3, [r7, #4]
- 8002832: 681b ldr r3, [r3, #0]
- 8002834: 430a orrs r2, r1
- 8002836: 605a str r2, [r3, #4]
+ 80034da: 687b ldr r3, [r7, #4]
+ 80034dc: 681b ldr r3, [r3, #0]
+ 80034de: 685b ldr r3, [r3, #4]
+ 80034e0: f423 4100 bic.w r1, r3, #32768 ; 0x8000
+ 80034e4: 687b ldr r3, [r7, #4]
+ 80034e6: 6b5a ldr r2, [r3, #52] ; 0x34
+ 80034e8: 687b ldr r3, [r7, #4]
+ 80034ea: 681b ldr r3, [r3, #0]
+ 80034ec: 430a orrs r2, r1
+ 80034ee: 605a str r2, [r3, #4]
}
/* if required, configure RX overrun detection disabling */
if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT))
- 8002838: 687b ldr r3, [r7, #4]
- 800283a: 6a5b ldr r3, [r3, #36] ; 0x24
- 800283c: f003 0310 and.w r3, r3, #16
- 8002840: 2b00 cmp r3, #0
- 8002842: d00a beq.n 800285a <UART_AdvFeatureConfig+0xb2>
+ 80034f0: 687b ldr r3, [r7, #4]
+ 80034f2: 6a5b ldr r3, [r3, #36] ; 0x24
+ 80034f4: f003 0310 and.w r3, r3, #16
+ 80034f8: 2b00 cmp r3, #0
+ 80034fa: d00a beq.n 8003512 <UART_AdvFeatureConfig+0xb2>
{
assert_param(IS_UART_OVERRUN(huart->AdvancedInit.OverrunDisable));
MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable);
- 8002844: 687b ldr r3, [r7, #4]
- 8002846: 681b ldr r3, [r3, #0]
- 8002848: 689b ldr r3, [r3, #8]
- 800284a: f423 5180 bic.w r1, r3, #4096 ; 0x1000
- 800284e: 687b ldr r3, [r7, #4]
- 8002850: 6b9a ldr r2, [r3, #56] ; 0x38
- 8002852: 687b ldr r3, [r7, #4]
- 8002854: 681b ldr r3, [r3, #0]
- 8002856: 430a orrs r2, r1
- 8002858: 609a str r2, [r3, #8]
+ 80034fc: 687b ldr r3, [r7, #4]
+ 80034fe: 681b ldr r3, [r3, #0]
+ 8003500: 689b ldr r3, [r3, #8]
+ 8003502: f423 5180 bic.w r1, r3, #4096 ; 0x1000
+ 8003506: 687b ldr r3, [r7, #4]
+ 8003508: 6b9a ldr r2, [r3, #56] ; 0x38
+ 800350a: 687b ldr r3, [r7, #4]
+ 800350c: 681b ldr r3, [r3, #0]
+ 800350e: 430a orrs r2, r1
+ 8003510: 609a str r2, [r3, #8]
}
/* if required, configure DMA disabling on reception error */
if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DMADISABLEONERROR_INIT))
- 800285a: 687b ldr r3, [r7, #4]
- 800285c: 6a5b ldr r3, [r3, #36] ; 0x24
- 800285e: f003 0320 and.w r3, r3, #32
- 8002862: 2b00 cmp r3, #0
- 8002864: d00a beq.n 800287c <UART_AdvFeatureConfig+0xd4>
+ 8003512: 687b ldr r3, [r7, #4]
+ 8003514: 6a5b ldr r3, [r3, #36] ; 0x24
+ 8003516: f003 0320 and.w r3, r3, #32
+ 800351a: 2b00 cmp r3, #0
+ 800351c: d00a beq.n 8003534 <UART_AdvFeatureConfig+0xd4>
{
assert_param(IS_UART_ADVFEATURE_DMAONRXERROR(huart->AdvancedInit.DMADisableonRxError));
MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError);
- 8002866: 687b ldr r3, [r7, #4]
- 8002868: 681b ldr r3, [r3, #0]
- 800286a: 689b ldr r3, [r3, #8]
- 800286c: f423 5100 bic.w r1, r3, #8192 ; 0x2000
- 8002870: 687b ldr r3, [r7, #4]
- 8002872: 6bda ldr r2, [r3, #60] ; 0x3c
- 8002874: 687b ldr r3, [r7, #4]
- 8002876: 681b ldr r3, [r3, #0]
- 8002878: 430a orrs r2, r1
- 800287a: 609a str r2, [r3, #8]
+ 800351e: 687b ldr r3, [r7, #4]
+ 8003520: 681b ldr r3, [r3, #0]
+ 8003522: 689b ldr r3, [r3, #8]
+ 8003524: f423 5100 bic.w r1, r3, #8192 ; 0x2000
+ 8003528: 687b ldr r3, [r7, #4]
+ 800352a: 6bda ldr r2, [r3, #60] ; 0x3c
+ 800352c: 687b ldr r3, [r7, #4]
+ 800352e: 681b ldr r3, [r3, #0]
+ 8003530: 430a orrs r2, r1
+ 8003532: 609a str r2, [r3, #8]
}
/* if required, configure auto Baud rate detection scheme */
if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_AUTOBAUDRATE_INIT))
- 800287c: 687b ldr r3, [r7, #4]
- 800287e: 6a5b ldr r3, [r3, #36] ; 0x24
- 8002880: f003 0340 and.w r3, r3, #64 ; 0x40
- 8002884: 2b00 cmp r3, #0
- 8002886: d01a beq.n 80028be <UART_AdvFeatureConfig+0x116>
+ 8003534: 687b ldr r3, [r7, #4]
+ 8003536: 6a5b ldr r3, [r3, #36] ; 0x24
+ 8003538: f003 0340 and.w r3, r3, #64 ; 0x40
+ 800353c: 2b00 cmp r3, #0
+ 800353e: d01a beq.n 8003576 <UART_AdvFeatureConfig+0x116>
{
assert_param(IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(huart->Instance));
assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATE(huart->AdvancedInit.AutoBaudRateEnable));
MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable);
- 8002888: 687b ldr r3, [r7, #4]
- 800288a: 681b ldr r3, [r3, #0]
- 800288c: 685b ldr r3, [r3, #4]
- 800288e: f423 1180 bic.w r1, r3, #1048576 ; 0x100000
- 8002892: 687b ldr r3, [r7, #4]
- 8002894: 6c1a ldr r2, [r3, #64] ; 0x40
- 8002896: 687b ldr r3, [r7, #4]
- 8002898: 681b ldr r3, [r3, #0]
- 800289a: 430a orrs r2, r1
- 800289c: 605a str r2, [r3, #4]
+ 8003540: 687b ldr r3, [r7, #4]
+ 8003542: 681b ldr r3, [r3, #0]
+ 8003544: 685b ldr r3, [r3, #4]
+ 8003546: f423 1180 bic.w r1, r3, #1048576 ; 0x100000
+ 800354a: 687b ldr r3, [r7, #4]
+ 800354c: 6c1a ldr r2, [r3, #64] ; 0x40
+ 800354e: 687b ldr r3, [r7, #4]
+ 8003550: 681b ldr r3, [r3, #0]
+ 8003552: 430a orrs r2, r1
+ 8003554: 605a str r2, [r3, #4]
/* set auto Baudrate detection parameters if detection is enabled */
if (huart->AdvancedInit.AutoBaudRateEnable == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)
- 800289e: 687b ldr r3, [r7, #4]
- 80028a0: 6c1b ldr r3, [r3, #64] ; 0x40
- 80028a2: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000
- 80028a6: d10a bne.n 80028be <UART_AdvFeatureConfig+0x116>
+ 8003556: 687b ldr r3, [r7, #4]
+ 8003558: 6c1b ldr r3, [r3, #64] ; 0x40
+ 800355a: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000
+ 800355e: d10a bne.n 8003576 <UART_AdvFeatureConfig+0x116>
{
assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(huart->AdvancedInit.AutoBaudRateMode));
MODIFY_REG(huart->Instance->CR2, USART_CR2_ABRMODE, huart->AdvancedInit.AutoBaudRateMode);
- 80028a8: 687b ldr r3, [r7, #4]
- 80028aa: 681b ldr r3, [r3, #0]
- 80028ac: 685b ldr r3, [r3, #4]
- 80028ae: f423 01c0 bic.w r1, r3, #6291456 ; 0x600000
- 80028b2: 687b ldr r3, [r7, #4]
- 80028b4: 6c5a ldr r2, [r3, #68] ; 0x44
- 80028b6: 687b ldr r3, [r7, #4]
- 80028b8: 681b ldr r3, [r3, #0]
- 80028ba: 430a orrs r2, r1
- 80028bc: 605a str r2, [r3, #4]
+ 8003560: 687b ldr r3, [r7, #4]
+ 8003562: 681b ldr r3, [r3, #0]
+ 8003564: 685b ldr r3, [r3, #4]
+ 8003566: f423 01c0 bic.w r1, r3, #6291456 ; 0x600000
+ 800356a: 687b ldr r3, [r7, #4]
+ 800356c: 6c5a ldr r2, [r3, #68] ; 0x44
+ 800356e: 687b ldr r3, [r7, #4]
+ 8003570: 681b ldr r3, [r3, #0]
+ 8003572: 430a orrs r2, r1
+ 8003574: 605a str r2, [r3, #4]
}
}
/* if required, configure MSB first on communication line */
if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_MSBFIRST_INIT))
- 80028be: 687b ldr r3, [r7, #4]
- 80028c0: 6a5b ldr r3, [r3, #36] ; 0x24
- 80028c2: f003 0380 and.w r3, r3, #128 ; 0x80
- 80028c6: 2b00 cmp r3, #0
- 80028c8: d00a beq.n 80028e0 <UART_AdvFeatureConfig+0x138>
+ 8003576: 687b ldr r3, [r7, #4]
+ 8003578: 6a5b ldr r3, [r3, #36] ; 0x24
+ 800357a: f003 0380 and.w r3, r3, #128 ; 0x80
+ 800357e: 2b00 cmp r3, #0
+ 8003580: d00a beq.n 8003598 <UART_AdvFeatureConfig+0x138>
{
assert_param(IS_UART_ADVFEATURE_MSBFIRST(huart->AdvancedInit.MSBFirst));
MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst);
- 80028ca: 687b ldr r3, [r7, #4]
- 80028cc: 681b ldr r3, [r3, #0]
- 80028ce: 685b ldr r3, [r3, #4]
- 80028d0: f423 2100 bic.w r1, r3, #524288 ; 0x80000
- 80028d4: 687b ldr r3, [r7, #4]
- 80028d6: 6c9a ldr r2, [r3, #72] ; 0x48
- 80028d8: 687b ldr r3, [r7, #4]
- 80028da: 681b ldr r3, [r3, #0]
- 80028dc: 430a orrs r2, r1
- 80028de: 605a str r2, [r3, #4]
+ 8003582: 687b ldr r3, [r7, #4]
+ 8003584: 681b ldr r3, [r3, #0]
+ 8003586: 685b ldr r3, [r3, #4]
+ 8003588: f423 2100 bic.w r1, r3, #524288 ; 0x80000
+ 800358c: 687b ldr r3, [r7, #4]
+ 800358e: 6c9a ldr r2, [r3, #72] ; 0x48
+ 8003590: 687b ldr r3, [r7, #4]
+ 8003592: 681b ldr r3, [r3, #0]
+ 8003594: 430a orrs r2, r1
+ 8003596: 605a str r2, [r3, #4]
}
}
- 80028e0: bf00 nop
- 80028e2: 370c adds r7, #12
- 80028e4: 46bd mov sp, r7
- 80028e6: f85d 7b04 ldr.w r7, [sp], #4
- 80028ea: 4770 bx lr
+ 8003598: bf00 nop
+ 800359a: 370c adds r7, #12
+ 800359c: 46bd mov sp, r7
+ 800359e: f85d 7b04 ldr.w r7, [sp], #4
+ 80035a2: 4770 bx lr
-080028ec <UART_CheckIdleState>:
+080035a4 <UART_CheckIdleState>:
* @brief Check the UART Idle State.
* @param huart UART handle.
* @retval HAL status
*/
HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart)
{
- 80028ec: b580 push {r7, lr}
- 80028ee: b086 sub sp, #24
- 80028f0: af02 add r7, sp, #8
- 80028f2: 6078 str r0, [r7, #4]
+ 80035a4: b580 push {r7, lr}
+ 80035a6: b086 sub sp, #24
+ 80035a8: af02 add r7, sp, #8
+ 80035aa: 6078 str r0, [r7, #4]
uint32_t tickstart;
/* Initialize the UART ErrorCode */
huart->ErrorCode = HAL_UART_ERROR_NONE;
- 80028f4: 687b ldr r3, [r7, #4]
- 80028f6: 2200 movs r2, #0
- 80028f8: 67da str r2, [r3, #124] ; 0x7c
+ 80035ac: 687b ldr r3, [r7, #4]
+ 80035ae: 2200 movs r2, #0
+ 80035b0: 67da str r2, [r3, #124] ; 0x7c
/* Init tickstart for timeout managment*/
tickstart = HAL_GetTick();
- 80028fa: f7fe f8ad bl 8000a58 <HAL_GetTick>
- 80028fe: 60f8 str r0, [r7, #12]
+ 80035b2: f7fd fad9 bl 8000b68 <HAL_GetTick>
+ 80035b6: 60f8 str r0, [r7, #12]
/* Check if the Transmitter is enabled */
if ((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE)
- 8002900: 687b ldr r3, [r7, #4]
- 8002902: 681b ldr r3, [r3, #0]
- 8002904: 681b ldr r3, [r3, #0]
- 8002906: f003 0308 and.w r3, r3, #8
- 800290a: 2b08 cmp r3, #8
- 800290c: d10e bne.n 800292c <UART_CheckIdleState+0x40>
+ 80035b8: 687b ldr r3, [r7, #4]
+ 80035ba: 681b ldr r3, [r3, #0]
+ 80035bc: 681b ldr r3, [r3, #0]
+ 80035be: f003 0308 and.w r3, r3, #8
+ 80035c2: 2b08 cmp r3, #8
+ 80035c4: d10e bne.n 80035e4 <UART_CheckIdleState+0x40>
{
/* Wait until TEACK flag is set */
if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
- 800290e: f06f 437e mvn.w r3, #4261412864 ; 0xfe000000
- 8002912: 9300 str r3, [sp, #0]
- 8002914: 68fb ldr r3, [r7, #12]
- 8002916: 2200 movs r2, #0
- 8002918: f44f 1100 mov.w r1, #2097152 ; 0x200000
- 800291c: 6878 ldr r0, [r7, #4]
- 800291e: f000 f814 bl 800294a <UART_WaitOnFlagUntilTimeout>
- 8002922: 4603 mov r3, r0
- 8002924: 2b00 cmp r3, #0
- 8002926: d001 beq.n 800292c <UART_CheckIdleState+0x40>
+ 80035c6: f06f 437e mvn.w r3, #4261412864 ; 0xfe000000
+ 80035ca: 9300 str r3, [sp, #0]
+ 80035cc: 68fb ldr r3, [r7, #12]
+ 80035ce: 2200 movs r2, #0
+ 80035d0: f44f 1100 mov.w r1, #2097152 ; 0x200000
+ 80035d4: 6878 ldr r0, [r7, #4]
+ 80035d6: f000 f814 bl 8003602 <UART_WaitOnFlagUntilTimeout>
+ 80035da: 4603 mov r3, r0
+ 80035dc: 2b00 cmp r3, #0
+ 80035de: d001 beq.n 80035e4 <UART_CheckIdleState+0x40>
{
/* Timeout occurred */
return HAL_TIMEOUT;
- 8002928: 2303 movs r3, #3
- 800292a: e00a b.n 8002942 <UART_CheckIdleState+0x56>
+ 80035e0: 2303 movs r3, #3
+ 80035e2: e00a b.n 80035fa <UART_CheckIdleState+0x56>
}
}
/* Initialize the UART State */
huart->gState = HAL_UART_STATE_READY;
- 800292c: 687b ldr r3, [r7, #4]
- 800292e: 2220 movs r2, #32
- 8002930: 675a str r2, [r3, #116] ; 0x74
+ 80035e4: 687b ldr r3, [r7, #4]
+ 80035e6: 2220 movs r2, #32
+ 80035e8: 675a str r2, [r3, #116] ; 0x74
huart->RxState = HAL_UART_STATE_READY;
- 8002932: 687b ldr r3, [r7, #4]
- 8002934: 2220 movs r2, #32
- 8002936: 679a str r2, [r3, #120] ; 0x78
+ 80035ea: 687b ldr r3, [r7, #4]
+ 80035ec: 2220 movs r2, #32
+ 80035ee: 679a str r2, [r3, #120] ; 0x78
/* Process Unlocked */
__HAL_UNLOCK(huart);
- 8002938: 687b ldr r3, [r7, #4]
- 800293a: 2200 movs r2, #0
- 800293c: f883 2070 strb.w r2, [r3, #112] ; 0x70
+ 80035f0: 687b ldr r3, [r7, #4]
+ 80035f2: 2200 movs r2, #0
+ 80035f4: f883 2070 strb.w r2, [r3, #112] ; 0x70
return HAL_OK;
- 8002940: 2300 movs r3, #0
+ 80035f8: 2300 movs r3, #0
}
- 8002942: 4618 mov r0, r3
- 8002944: 3710 adds r7, #16
- 8002946: 46bd mov sp, r7
- 8002948: bd80 pop {r7, pc}
+ 80035fa: 4618 mov r0, r3
+ 80035fc: 3710 adds r7, #16
+ 80035fe: 46bd mov sp, r7
+ 8003600: bd80 pop {r7, pc}
-0800294a <UART_WaitOnFlagUntilTimeout>:
+08003602 <UART_WaitOnFlagUntilTimeout>:
* @param Tickstart Tick start value
* @param Timeout Timeout duration
* @retval HAL status
*/
HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout)
{
- 800294a: b580 push {r7, lr}
- 800294c: b084 sub sp, #16
- 800294e: af00 add r7, sp, #0
- 8002950: 60f8 str r0, [r7, #12]
- 8002952: 60b9 str r1, [r7, #8]
- 8002954: 603b str r3, [r7, #0]
- 8002956: 4613 mov r3, r2
- 8002958: 71fb strb r3, [r7, #7]
+ 8003602: b580 push {r7, lr}
+ 8003604: b084 sub sp, #16
+ 8003606: af00 add r7, sp, #0
+ 8003608: 60f8 str r0, [r7, #12]
+ 800360a: 60b9 str r1, [r7, #8]
+ 800360c: 603b str r3, [r7, #0]
+ 800360e: 4613 mov r3, r2
+ 8003610: 71fb strb r3, [r7, #7]
/* Wait until flag is set */
while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
- 800295a: e02a b.n 80029b2 <UART_WaitOnFlagUntilTimeout+0x68>
+ 8003612: e02a b.n 800366a <UART_WaitOnFlagUntilTimeout+0x68>
{
/* Check for the Timeout */
if (Timeout != HAL_MAX_DELAY)
- 800295c: 69bb ldr r3, [r7, #24]
- 800295e: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff
- 8002962: d026 beq.n 80029b2 <UART_WaitOnFlagUntilTimeout+0x68>
+ 8003614: 69bb ldr r3, [r7, #24]
+ 8003616: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff
+ 800361a: d026 beq.n 800366a <UART_WaitOnFlagUntilTimeout+0x68>
{
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
- 8002964: f7fe f878 bl 8000a58 <HAL_GetTick>
- 8002968: 4602 mov r2, r0
- 800296a: 683b ldr r3, [r7, #0]
- 800296c: 1ad3 subs r3, r2, r3
- 800296e: 69ba ldr r2, [r7, #24]
- 8002970: 429a cmp r2, r3
- 8002972: d302 bcc.n 800297a <UART_WaitOnFlagUntilTimeout+0x30>
- 8002974: 69bb ldr r3, [r7, #24]
- 8002976: 2b00 cmp r3, #0
- 8002978: d11b bne.n 80029b2 <UART_WaitOnFlagUntilTimeout+0x68>
+ 800361c: f7fd faa4 bl 8000b68 <HAL_GetTick>
+ 8003620: 4602 mov r2, r0
+ 8003622: 683b ldr r3, [r7, #0]
+ 8003624: 1ad3 subs r3, r2, r3
+ 8003626: 69ba ldr r2, [r7, #24]
+ 8003628: 429a cmp r2, r3
+ 800362a: d302 bcc.n 8003632 <UART_WaitOnFlagUntilTimeout+0x30>
+ 800362c: 69bb ldr r3, [r7, #24]
+ 800362e: 2b00 cmp r3, #0
+ 8003630: d11b bne.n 800366a <UART_WaitOnFlagUntilTimeout+0x68>
{
/* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
- 800297a: 68fb ldr r3, [r7, #12]
- 800297c: 681b ldr r3, [r3, #0]
- 800297e: 681a ldr r2, [r3, #0]
- 8002980: 68fb ldr r3, [r7, #12]
- 8002982: 681b ldr r3, [r3, #0]
- 8002984: f422 72d0 bic.w r2, r2, #416 ; 0x1a0
- 8002988: 601a str r2, [r3, #0]
+ 8003632: 68fb ldr r3, [r7, #12]
+ 8003634: 681b ldr r3, [r3, #0]
+ 8003636: 681a ldr r2, [r3, #0]
+ 8003638: 68fb ldr r3, [r7, #12]
+ 800363a: 681b ldr r3, [r3, #0]
+ 800363c: f422 72d0 bic.w r2, r2, #416 ; 0x1a0
+ 8003640: 601a str r2, [r3, #0]
CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
- 800298a: 68fb ldr r3, [r7, #12]
- 800298c: 681b ldr r3, [r3, #0]
- 800298e: 689a ldr r2, [r3, #8]
- 8002990: 68fb ldr r3, [r7, #12]
- 8002992: 681b ldr r3, [r3, #0]
- 8002994: f022 0201 bic.w r2, r2, #1
- 8002998: 609a str r2, [r3, #8]
+ 8003642: 68fb ldr r3, [r7, #12]
+ 8003644: 681b ldr r3, [r3, #0]
+ 8003646: 689a ldr r2, [r3, #8]
+ 8003648: 68fb ldr r3, [r7, #12]
+ 800364a: 681b ldr r3, [r3, #0]
+ 800364c: f022 0201 bic.w r2, r2, #1
+ 8003650: 609a str r2, [r3, #8]
huart->gState = HAL_UART_STATE_READY;
- 800299a: 68fb ldr r3, [r7, #12]
- 800299c: 2220 movs r2, #32
- 800299e: 675a str r2, [r3, #116] ; 0x74
+ 8003652: 68fb ldr r3, [r7, #12]
+ 8003654: 2220 movs r2, #32
+ 8003656: 675a str r2, [r3, #116] ; 0x74
huart->RxState = HAL_UART_STATE_READY;
- 80029a0: 68fb ldr r3, [r7, #12]
- 80029a2: 2220 movs r2, #32
- 80029a4: 679a str r2, [r3, #120] ; 0x78
+ 8003658: 68fb ldr r3, [r7, #12]
+ 800365a: 2220 movs r2, #32
+ 800365c: 679a str r2, [r3, #120] ; 0x78
/* Process Unlocked */
__HAL_UNLOCK(huart);
- 80029a6: 68fb ldr r3, [r7, #12]
- 80029a8: 2200 movs r2, #0
- 80029aa: f883 2070 strb.w r2, [r3, #112] ; 0x70
+ 800365e: 68fb ldr r3, [r7, #12]
+ 8003660: 2200 movs r2, #0
+ 8003662: f883 2070 strb.w r2, [r3, #112] ; 0x70
return HAL_TIMEOUT;
- 80029ae: 2303 movs r3, #3
- 80029b0: e00f b.n 80029d2 <UART_WaitOnFlagUntilTimeout+0x88>
+ 8003666: 2303 movs r3, #3
+ 8003668: e00f b.n 800368a <UART_WaitOnFlagUntilTimeout+0x88>
while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
- 80029b2: 68fb ldr r3, [r7, #12]
- 80029b4: 681b ldr r3, [r3, #0]
- 80029b6: 69da ldr r2, [r3, #28]
- 80029b8: 68bb ldr r3, [r7, #8]
- 80029ba: 4013 ands r3, r2
- 80029bc: 68ba ldr r2, [r7, #8]
- 80029be: 429a cmp r2, r3
- 80029c0: bf0c ite eq
- 80029c2: 2301 moveq r3, #1
- 80029c4: 2300 movne r3, #0
- 80029c6: b2db uxtb r3, r3
- 80029c8: 461a mov r2, r3
- 80029ca: 79fb ldrb r3, [r7, #7]
- 80029cc: 429a cmp r2, r3
- 80029ce: d0c5 beq.n 800295c <UART_WaitOnFlagUntilTimeout+0x12>
+ 800366a: 68fb ldr r3, [r7, #12]
+ 800366c: 681b ldr r3, [r3, #0]
+ 800366e: 69da ldr r2, [r3, #28]
+ 8003670: 68bb ldr r3, [r7, #8]
+ 8003672: 4013 ands r3, r2
+ 8003674: 68ba ldr r2, [r7, #8]
+ 8003676: 429a cmp r2, r3
+ 8003678: bf0c ite eq
+ 800367a: 2301 moveq r3, #1
+ 800367c: 2300 movne r3, #0
+ 800367e: b2db uxtb r3, r3
+ 8003680: 461a mov r2, r3
+ 8003682: 79fb ldrb r3, [r7, #7]
+ 8003684: 429a cmp r2, r3
+ 8003686: d0c5 beq.n 8003614 <UART_WaitOnFlagUntilTimeout+0x12>
}
}
}
return HAL_OK;
- 80029d0: 2300 movs r3, #0
+ 8003688: 2300 movs r3, #0
}
- 80029d2: 4618 mov r0, r3
- 80029d4: 3710 adds r7, #16
- 80029d6: 46bd mov sp, r7
- 80029d8: bd80 pop {r7, pc}
- ...
+ 800368a: 4618 mov r0, r3
+ 800368c: 3710 adds r7, #16
+ 800368e: 46bd mov sp, r7
+ 8003690: bd80 pop {r7, pc}
+
+08003692 <UART_EndRxTransfer>:
+ * @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion).
+ * @param huart UART handle.
+ * @retval None
+ */
+static void UART_EndRxTransfer(UART_HandleTypeDef *huart)
+{
+ 8003692: b480 push {r7}
+ 8003694: b083 sub sp, #12
+ 8003696: af00 add r7, sp, #0
+ 8003698: 6078 str r0, [r7, #4]
+ /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
+ CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
+ 800369a: 687b ldr r3, [r7, #4]
+ 800369c: 681b ldr r3, [r3, #0]
+ 800369e: 681a ldr r2, [r3, #0]
+ 80036a0: 687b ldr r3, [r7, #4]
+ 80036a2: 681b ldr r3, [r3, #0]
+ 80036a4: f422 7290 bic.w r2, r2, #288 ; 0x120
+ 80036a8: 601a str r2, [r3, #0]
+ CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
+ 80036aa: 687b ldr r3, [r7, #4]
+ 80036ac: 681b ldr r3, [r3, #0]
+ 80036ae: 689a ldr r2, [r3, #8]
+ 80036b0: 687b ldr r3, [r7, #4]
+ 80036b2: 681b ldr r3, [r3, #0]
+ 80036b4: f022 0201 bic.w r2, r2, #1
+ 80036b8: 609a str r2, [r3, #8]
+
+ /* At end of Rx process, restore huart->RxState to Ready */
+ huart->RxState = HAL_UART_STATE_READY;
+ 80036ba: 687b ldr r3, [r7, #4]
+ 80036bc: 2220 movs r2, #32
+ 80036be: 679a str r2, [r3, #120] ; 0x78
-080029dc <__libc_init_array>:
- 80029dc: b570 push {r4, r5, r6, lr}
- 80029de: 4e0d ldr r6, [pc, #52] ; (8002a14 <__libc_init_array+0x38>)
- 80029e0: 4c0d ldr r4, [pc, #52] ; (8002a18 <__libc_init_array+0x3c>)
- 80029e2: 1ba4 subs r4, r4, r6
- 80029e4: 10a4 asrs r4, r4, #2
- 80029e6: 2500 movs r5, #0
- 80029e8: 42a5 cmp r5, r4
- 80029ea: d109 bne.n 8002a00 <__libc_init_array+0x24>
- 80029ec: 4e0b ldr r6, [pc, #44] ; (8002a1c <__libc_init_array+0x40>)
- 80029ee: 4c0c ldr r4, [pc, #48] ; (8002a20 <__libc_init_array+0x44>)
- 80029f0: f000 f820 bl 8002a34 <_init>
- 80029f4: 1ba4 subs r4, r4, r6
- 80029f6: 10a4 asrs r4, r4, #2
- 80029f8: 2500 movs r5, #0
- 80029fa: 42a5 cmp r5, r4
- 80029fc: d105 bne.n 8002a0a <__libc_init_array+0x2e>
- 80029fe: bd70 pop {r4, r5, r6, pc}
- 8002a00: f856 3025 ldr.w r3, [r6, r5, lsl #2]
- 8002a04: 4798 blx r3
- 8002a06: 3501 adds r5, #1
- 8002a08: e7ee b.n 80029e8 <__libc_init_array+0xc>
- 8002a0a: f856 3025 ldr.w r3, [r6, r5, lsl #2]
- 8002a0e: 4798 blx r3
- 8002a10: 3501 adds r5, #1
- 8002a12: e7f2 b.n 80029fa <__libc_init_array+0x1e>
- 8002a14: 08002a7c .word 0x08002a7c
- 8002a18: 08002a7c .word 0x08002a7c
- 8002a1c: 08002a7c .word 0x08002a7c
- 8002a20: 08002a80 .word 0x08002a80
-
-08002a24 <memset>:
- 8002a24: 4402 add r2, r0
- 8002a26: 4603 mov r3, r0
- 8002a28: 4293 cmp r3, r2
- 8002a2a: d100 bne.n 8002a2e <memset+0xa>
- 8002a2c: 4770 bx lr
- 8002a2e: f803 1b01 strb.w r1, [r3], #1
- 8002a32: e7f9 b.n 8002a28 <memset+0x4>
-
-08002a34 <_init>:
- 8002a34: b5f8 push {r3, r4, r5, r6, r7, lr}
- 8002a36: bf00 nop
- 8002a38: bcf8 pop {r3, r4, r5, r6, r7}
- 8002a3a: bc08 pop {r3}
- 8002a3c: 469e mov lr, r3
- 8002a3e: 4770 bx lr
-
-08002a40 <_fini>:
- 8002a40: b5f8 push {r3, r4, r5, r6, r7, lr}
- 8002a42: bf00 nop
- 8002a44: bcf8 pop {r3, r4, r5, r6, r7}
- 8002a46: bc08 pop {r3}
- 8002a48: 469e mov lr, r3
- 8002a4a: 4770 bx lr
+ /* Reset RxIsr function pointer */
+ huart->RxISR = NULL;
+ 80036c0: 687b ldr r3, [r7, #4]
+ 80036c2: 2200 movs r2, #0
+ 80036c4: 661a str r2, [r3, #96] ; 0x60
+}
+ 80036c6: bf00 nop
+ 80036c8: 370c adds r7, #12
+ 80036ca: 46bd mov sp, r7
+ 80036cc: f85d 7b04 ldr.w r7, [sp], #4
+ 80036d0: 4770 bx lr
+
+080036d2 <UART_DMAAbortOnError>:
+ * (To be called at end of DMA Abort procedure following error occurrence).
+ * @param hdma DMA handle.
+ * @retval None
+ */
+static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma)
+{
+ 80036d2: b580 push {r7, lr}
+ 80036d4: b084 sub sp, #16
+ 80036d6: af00 add r7, sp, #0
+ 80036d8: 6078 str r0, [r7, #4]
+ UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
+ 80036da: 687b ldr r3, [r7, #4]
+ 80036dc: 6b9b ldr r3, [r3, #56] ; 0x38
+ 80036de: 60fb str r3, [r7, #12]
+ huart->RxXferCount = 0U;
+ 80036e0: 68fb ldr r3, [r7, #12]
+ 80036e2: 2200 movs r2, #0
+ 80036e4: f8a3 205a strh.w r2, [r3, #90] ; 0x5a
+ huart->TxXferCount = 0U;
+ 80036e8: 68fb ldr r3, [r7, #12]
+ 80036ea: 2200 movs r2, #0
+ 80036ec: f8a3 2052 strh.w r2, [r3, #82] ; 0x52
+#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
+ /*Call registered error callback*/
+ huart->ErrorCallback(huart);
+#else
+ /*Call legacy weak error callback*/
+ HAL_UART_ErrorCallback(huart);
+ 80036f0: 68f8 ldr r0, [r7, #12]
+ 80036f2: f7fd f899 bl 8000828 <HAL_UART_ErrorCallback>
+#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
+}
+ 80036f6: bf00 nop
+ 80036f8: 3710 adds r7, #16
+ 80036fa: 46bd mov sp, r7
+ 80036fc: bd80 pop {r7, pc}
+
+080036fe <UART_EndTransmit_IT>:
+ * @param huart pointer to a UART_HandleTypeDef structure that contains
+ * the configuration information for the specified UART module.
+ * @retval None
+ */
+static void UART_EndTransmit_IT(UART_HandleTypeDef *huart)
+{
+ 80036fe: b580 push {r7, lr}
+ 8003700: b082 sub sp, #8
+ 8003702: af00 add r7, sp, #0
+ 8003704: 6078 str r0, [r7, #4]
+ /* Disable the UART Transmit Complete Interrupt */
+ CLEAR_BIT(huart->Instance->CR1, USART_CR1_TCIE);
+ 8003706: 687b ldr r3, [r7, #4]
+ 8003708: 681b ldr r3, [r3, #0]
+ 800370a: 681a ldr r2, [r3, #0]
+ 800370c: 687b ldr r3, [r7, #4]
+ 800370e: 681b ldr r3, [r3, #0]
+ 8003710: f022 0240 bic.w r2, r2, #64 ; 0x40
+ 8003714: 601a str r2, [r3, #0]
+
+ /* Tx process is ended, restore huart->gState to Ready */
+ huart->gState = HAL_UART_STATE_READY;
+ 8003716: 687b ldr r3, [r7, #4]
+ 8003718: 2220 movs r2, #32
+ 800371a: 675a str r2, [r3, #116] ; 0x74
+
+ /* Cleat TxISR function pointer */
+ huart->TxISR = NULL;
+ 800371c: 687b ldr r3, [r7, #4]
+ 800371e: 2200 movs r2, #0
+ 8003720: 665a str r2, [r3, #100] ; 0x64
+#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
+ /*Call registered Tx complete callback*/
+ huart->TxCpltCallback(huart);
+#else
+ /*Call legacy weak Tx complete callback*/
+ HAL_UART_TxCpltCallback(huart);
+ 8003722: 6878 ldr r0, [r7, #4]
+ 8003724: f7ff fbee bl 8002f04 <HAL_UART_TxCpltCallback>
+#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
+}
+ 8003728: bf00 nop
+ 800372a: 3708 adds r7, #8
+ 800372c: 46bd mov sp, r7
+ 800372e: bd80 pop {r7, pc}
+
+08003730 <UART_RxISR_8BIT>:
+ * @brief RX interrrupt handler for 7 or 8 bits data word length .
+ * @param huart UART handle.
+ * @retval None
+ */
+static void UART_RxISR_8BIT(UART_HandleTypeDef *huart)
+{
+ 8003730: b580 push {r7, lr}
+ 8003732: b084 sub sp, #16
+ 8003734: af00 add r7, sp, #0
+ 8003736: 6078 str r0, [r7, #4]
+ uint16_t uhMask = huart->Mask;
+ 8003738: 687b ldr r3, [r7, #4]
+ 800373a: f8b3 305c ldrh.w r3, [r3, #92] ; 0x5c
+ 800373e: 81fb strh r3, [r7, #14]
+ uint16_t uhdata;
+
+ /* Check that a Rx process is ongoing */
+ if (huart->RxState == HAL_UART_STATE_BUSY_RX)
+ 8003740: 687b ldr r3, [r7, #4]
+ 8003742: 6f9b ldr r3, [r3, #120] ; 0x78
+ 8003744: 2b22 cmp r3, #34 ; 0x22
+ 8003746: d13a bne.n 80037be <UART_RxISR_8BIT+0x8e>
+ {
+ uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
+ 8003748: 687b ldr r3, [r7, #4]
+ 800374a: 681b ldr r3, [r3, #0]
+ 800374c: 6a5b ldr r3, [r3, #36] ; 0x24
+ 800374e: 81bb strh r3, [r7, #12]
+ *huart->pRxBuffPtr = (uint8_t)(uhdata & (uint8_t)uhMask);
+ 8003750: 89bb ldrh r3, [r7, #12]
+ 8003752: b2d9 uxtb r1, r3
+ 8003754: 89fb ldrh r3, [r7, #14]
+ 8003756: b2da uxtb r2, r3
+ 8003758: 687b ldr r3, [r7, #4]
+ 800375a: 6d5b ldr r3, [r3, #84] ; 0x54
+ 800375c: 400a ands r2, r1
+ 800375e: b2d2 uxtb r2, r2
+ 8003760: 701a strb r2, [r3, #0]
+ huart->pRxBuffPtr++;
+ 8003762: 687b ldr r3, [r7, #4]
+ 8003764: 6d5b ldr r3, [r3, #84] ; 0x54
+ 8003766: 1c5a adds r2, r3, #1
+ 8003768: 687b ldr r3, [r7, #4]
+ 800376a: 655a str r2, [r3, #84] ; 0x54
+ huart->RxXferCount--;
+ 800376c: 687b ldr r3, [r7, #4]
+ 800376e: f8b3 305a ldrh.w r3, [r3, #90] ; 0x5a
+ 8003772: b29b uxth r3, r3
+ 8003774: 3b01 subs r3, #1
+ 8003776: b29a uxth r2, r3
+ 8003778: 687b ldr r3, [r7, #4]
+ 800377a: f8a3 205a strh.w r2, [r3, #90] ; 0x5a
+
+ if (huart->RxXferCount == 0U)
+ 800377e: 687b ldr r3, [r7, #4]
+ 8003780: f8b3 305a ldrh.w r3, [r3, #90] ; 0x5a
+ 8003784: b29b uxth r3, r3
+ 8003786: 2b00 cmp r3, #0
+ 8003788: d121 bne.n 80037ce <UART_RxISR_8BIT+0x9e>
+ {
+ /* Disable the UART Parity Error Interrupt and RXNE interrupts */
+ CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
+ 800378a: 687b ldr r3, [r7, #4]
+ 800378c: 681b ldr r3, [r3, #0]
+ 800378e: 681a ldr r2, [r3, #0]
+ 8003790: 687b ldr r3, [r7, #4]
+ 8003792: 681b ldr r3, [r3, #0]
+ 8003794: f422 7290 bic.w r2, r2, #288 ; 0x120
+ 8003798: 601a str r2, [r3, #0]
+
+ /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
+ CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
+ 800379a: 687b ldr r3, [r7, #4]
+ 800379c: 681b ldr r3, [r3, #0]
+ 800379e: 689a ldr r2, [r3, #8]
+ 80037a0: 687b ldr r3, [r7, #4]
+ 80037a2: 681b ldr r3, [r3, #0]
+ 80037a4: f022 0201 bic.w r2, r2, #1
+ 80037a8: 609a str r2, [r3, #8]
+
+ /* Rx process is completed, restore huart->RxState to Ready */
+ huart->RxState = HAL_UART_STATE_READY;
+ 80037aa: 687b ldr r3, [r7, #4]
+ 80037ac: 2220 movs r2, #32
+ 80037ae: 679a str r2, [r3, #120] ; 0x78
+
+ /* Clear RxISR function pointer */
+ huart->RxISR = NULL;
+ 80037b0: 687b ldr r3, [r7, #4]
+ 80037b2: 2200 movs r2, #0
+ 80037b4: 661a str r2, [r3, #96] ; 0x60
+#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
+ /*Call registered Rx complete callback*/
+ huart->RxCpltCallback(huart);
+#else
+ /*Call legacy weak Rx complete callback*/
+ HAL_UART_RxCpltCallback(huart);
+ 80037b6: 6878 ldr r0, [r7, #4]
+ 80037b8: f7fd f81c bl 80007f4 <HAL_UART_RxCpltCallback>
+ else
+ {
+ /* Clear RXNE interrupt flag */
+ __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
+ }
+}
+ 80037bc: e007 b.n 80037ce <UART_RxISR_8BIT+0x9e>
+ __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
+ 80037be: 687b ldr r3, [r7, #4]
+ 80037c0: 681b ldr r3, [r3, #0]
+ 80037c2: 699a ldr r2, [r3, #24]
+ 80037c4: 687b ldr r3, [r7, #4]
+ 80037c6: 681b ldr r3, [r3, #0]
+ 80037c8: f042 0208 orr.w r2, r2, #8
+ 80037cc: 619a str r2, [r3, #24]
+}
+ 80037ce: bf00 nop
+ 80037d0: 3710 adds r7, #16
+ 80037d2: 46bd mov sp, r7
+ 80037d4: bd80 pop {r7, pc}
+
+080037d6 <UART_RxISR_16BIT>:
+ * interruptions have been enabled by HAL_UART_Receive_IT()
+ * @param huart UART handle.
+ * @retval None
+ */
+static void UART_RxISR_16BIT(UART_HandleTypeDef *huart)
+{
+ 80037d6: b580 push {r7, lr}
+ 80037d8: b084 sub sp, #16
+ 80037da: af00 add r7, sp, #0
+ 80037dc: 6078 str r0, [r7, #4]
+ uint16_t *tmp;
+ uint16_t uhMask = huart->Mask;
+ 80037de: 687b ldr r3, [r7, #4]
+ 80037e0: f8b3 305c ldrh.w r3, [r3, #92] ; 0x5c
+ 80037e4: 81fb strh r3, [r7, #14]
+ uint16_t uhdata;
+
+ /* Check that a Rx process is ongoing */
+ if (huart->RxState == HAL_UART_STATE_BUSY_RX)
+ 80037e6: 687b ldr r3, [r7, #4]
+ 80037e8: 6f9b ldr r3, [r3, #120] ; 0x78
+ 80037ea: 2b22 cmp r3, #34 ; 0x22
+ 80037ec: d13a bne.n 8003864 <UART_RxISR_16BIT+0x8e>
+ {
+ uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
+ 80037ee: 687b ldr r3, [r7, #4]
+ 80037f0: 681b ldr r3, [r3, #0]
+ 80037f2: 6a5b ldr r3, [r3, #36] ; 0x24
+ 80037f4: 81bb strh r3, [r7, #12]
+ tmp = (uint16_t *) huart->pRxBuffPtr ;
+ 80037f6: 687b ldr r3, [r7, #4]
+ 80037f8: 6d5b ldr r3, [r3, #84] ; 0x54
+ 80037fa: 60bb str r3, [r7, #8]
+ *tmp = (uint16_t)(uhdata & uhMask);
+ 80037fc: 89ba ldrh r2, [r7, #12]
+ 80037fe: 89fb ldrh r3, [r7, #14]
+ 8003800: 4013 ands r3, r2
+ 8003802: b29a uxth r2, r3
+ 8003804: 68bb ldr r3, [r7, #8]
+ 8003806: 801a strh r2, [r3, #0]
+ huart->pRxBuffPtr += 2U;
+ 8003808: 687b ldr r3, [r7, #4]
+ 800380a: 6d5b ldr r3, [r3, #84] ; 0x54
+ 800380c: 1c9a adds r2, r3, #2
+ 800380e: 687b ldr r3, [r7, #4]
+ 8003810: 655a str r2, [r3, #84] ; 0x54
+ huart->RxXferCount--;
+ 8003812: 687b ldr r3, [r7, #4]
+ 8003814: f8b3 305a ldrh.w r3, [r3, #90] ; 0x5a
+ 8003818: b29b uxth r3, r3
+ 800381a: 3b01 subs r3, #1
+ 800381c: b29a uxth r2, r3
+ 800381e: 687b ldr r3, [r7, #4]
+ 8003820: f8a3 205a strh.w r2, [r3, #90] ; 0x5a
+
+ if (huart->RxXferCount == 0U)
+ 8003824: 687b ldr r3, [r7, #4]
+ 8003826: f8b3 305a ldrh.w r3, [r3, #90] ; 0x5a
+ 800382a: b29b uxth r3, r3
+ 800382c: 2b00 cmp r3, #0
+ 800382e: d121 bne.n 8003874 <UART_RxISR_16BIT+0x9e>
+ {
+ /* Disable the UART Parity Error Interrupt and RXNE interrupt*/
+ CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
+ 8003830: 687b ldr r3, [r7, #4]
+ 8003832: 681b ldr r3, [r3, #0]
+ 8003834: 681a ldr r2, [r3, #0]
+ 8003836: 687b ldr r3, [r7, #4]
+ 8003838: 681b ldr r3, [r3, #0]
+ 800383a: f422 7290 bic.w r2, r2, #288 ; 0x120
+ 800383e: 601a str r2, [r3, #0]
+
+ /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
+ CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
+ 8003840: 687b ldr r3, [r7, #4]
+ 8003842: 681b ldr r3, [r3, #0]
+ 8003844: 689a ldr r2, [r3, #8]
+ 8003846: 687b ldr r3, [r7, #4]
+ 8003848: 681b ldr r3, [r3, #0]
+ 800384a: f022 0201 bic.w r2, r2, #1
+ 800384e: 609a str r2, [r3, #8]
+
+ /* Rx process is completed, restore huart->RxState to Ready */
+ huart->RxState = HAL_UART_STATE_READY;
+ 8003850: 687b ldr r3, [r7, #4]
+ 8003852: 2220 movs r2, #32
+ 8003854: 679a str r2, [r3, #120] ; 0x78
+
+ /* Clear RxISR function pointer */
+ huart->RxISR = NULL;
+ 8003856: 687b ldr r3, [r7, #4]
+ 8003858: 2200 movs r2, #0
+ 800385a: 661a str r2, [r3, #96] ; 0x60
+#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
+ /*Call registered Rx complete callback*/
+ huart->RxCpltCallback(huart);
+#else
+ /*Call legacy weak Rx complete callback*/
+ HAL_UART_RxCpltCallback(huart);
+ 800385c: 6878 ldr r0, [r7, #4]
+ 800385e: f7fc ffc9 bl 80007f4 <HAL_UART_RxCpltCallback>
+ else
+ {
+ /* Clear RXNE interrupt flag */
+ __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
+ }
+}
+ 8003862: e007 b.n 8003874 <UART_RxISR_16BIT+0x9e>
+ __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
+ 8003864: 687b ldr r3, [r7, #4]
+ 8003866: 681b ldr r3, [r3, #0]
+ 8003868: 699a ldr r2, [r3, #24]
+ 800386a: 687b ldr r3, [r7, #4]
+ 800386c: 681b ldr r3, [r3, #0]
+ 800386e: f042 0208 orr.w r2, r2, #8
+ 8003872: 619a str r2, [r3, #24]
+}
+ 8003874: bf00 nop
+ 8003876: 3710 adds r7, #16
+ 8003878: 46bd mov sp, r7
+ 800387a: bd80 pop {r7, pc}
+
+0800387c <__libc_init_array>:
+ 800387c: b570 push {r4, r5, r6, lr}
+ 800387e: 4e0d ldr r6, [pc, #52] ; (80038b4 <__libc_init_array+0x38>)
+ 8003880: 4c0d ldr r4, [pc, #52] ; (80038b8 <__libc_init_array+0x3c>)
+ 8003882: 1ba4 subs r4, r4, r6
+ 8003884: 10a4 asrs r4, r4, #2
+ 8003886: 2500 movs r5, #0
+ 8003888: 42a5 cmp r5, r4
+ 800388a: d109 bne.n 80038a0 <__libc_init_array+0x24>
+ 800388c: 4e0b ldr r6, [pc, #44] ; (80038bc <__libc_init_array+0x40>)
+ 800388e: 4c0c ldr r4, [pc, #48] ; (80038c0 <__libc_init_array+0x44>)
+ 8003890: f000 f820 bl 80038d4 <_init>
+ 8003894: 1ba4 subs r4, r4, r6
+ 8003896: 10a4 asrs r4, r4, #2
+ 8003898: 2500 movs r5, #0
+ 800389a: 42a5 cmp r5, r4
+ 800389c: d105 bne.n 80038aa <__libc_init_array+0x2e>
+ 800389e: bd70 pop {r4, r5, r6, pc}
+ 80038a0: f856 3025 ldr.w r3, [r6, r5, lsl #2]
+ 80038a4: 4798 blx r3
+ 80038a6: 3501 adds r5, #1
+ 80038a8: e7ee b.n 8003888 <__libc_init_array+0xc>
+ 80038aa: f856 3025 ldr.w r3, [r6, r5, lsl #2]
+ 80038ae: 4798 blx r3
+ 80038b0: 3501 adds r5, #1
+ 80038b2: e7f2 b.n 800389a <__libc_init_array+0x1e>
+ 80038b4: 0800390c .word 0x0800390c
+ 80038b8: 0800390c .word 0x0800390c
+ 80038bc: 0800390c .word 0x0800390c
+ 80038c0: 08003910 .word 0x08003910
+
+080038c4 <memset>:
+ 80038c4: 4402 add r2, r0
+ 80038c6: 4603 mov r3, r0
+ 80038c8: 4293 cmp r3, r2
+ 80038ca: d100 bne.n 80038ce <memset+0xa>
+ 80038cc: 4770 bx lr
+ 80038ce: f803 1b01 strb.w r1, [r3], #1
+ 80038d2: e7f9 b.n 80038c8 <memset+0x4>
+
+080038d4 <_init>:
+ 80038d4: b5f8 push {r3, r4, r5, r6, r7, lr}
+ 80038d6: bf00 nop
+ 80038d8: bcf8 pop {r3, r4, r5, r6, r7}
+ 80038da: bc08 pop {r3}
+ 80038dc: 469e mov lr, r3
+ 80038de: 4770 bx lr
+
+080038e0 <_fini>:
+ 80038e0: b5f8 push {r3, r4, r5, r6, r7, lr}
+ 80038e2: bf00 nop
+ 80038e4: bcf8 pop {r3, r4, r5, r6, r7}
+ 80038e6: bc08 pop {r3}
+ 80038e8: 469e mov lr, r3
+ 80038ea: 4770 bx lr
projects / pioneer-stm32 / commitdiff